diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/flash.bat b/ARM_Tag_FW/OpenEPaperLink_TLSR/flash.bat
new file mode 100644
index 00000000..b4b578ab
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/flash.bat
@@ -0,0 +1,5 @@
+makeit.exe clean all
+flashing\telink_flasher.exe 1 8258 ac
+rem flashing\telink_flasher.exe 1 8258 wf 0 -s 512k -e
+flashing\telink_flasher.exe 1 8258 wf 0 -i TLSR_OpenEPaperLink.bin
+flashing\telink_flasher.exe 1 8258 rst -f
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/config.ini b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/config.ini
new file mode 100644
index 00000000..32a5092b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/config.ini
@@ -0,0 +1,53 @@
+[MCU]
+TYPE 3 0x0d = 8258	\bin\dut_8258_flash_v0003.bin	40000	b010b010	End
+default = 8258	End
+[MODE]
+MODE 0x01 = USB	End
+MODE 0x04 = EVK	End
+default = EVK	End
+[OBJ]
+OBJ	0x01 = FLASH	End       
+OBJ	0x02 = CORE		End		   
+OBJ	0x03 = ANALOG	End
+OBJ	0x04 = OTP	End
+default = CORE	End
+[SIZE]
+SIZE 0x01 = 1	End
+SIZE 0x02 = 2	End
+SIZE 0x03 = 4	End
+SIZE 0x04 = 8	End
+SIZE 0x05 = 16	End
+default = 1	End
+[DOWNLOAD_ADDR]
+DOWNLOAD 0x01 = 0 End
+DOWNLOAD 0x02 = 20000 End
+DOWNLOAD 0x03 = 40000 End
+default = 0	End
+[ERASE_ADDR]
+ERASE 0x01 = 0	End
+ERASE 0x02 = 20000	End
+ERASE 0x03 = 40000	End
+default = 0	End
+[ERASE_SIZE]
+SIZE  0x01 = 4	End
+SIZE  0x02 = 16	End
+SIZE  0x03 = 64	End
+SIZE  0x04 = 128	End
+SIZE  0x05 = 512	End
+default = 512 End
+[PAGE_DISPLAY]
+PAGE 0x01 = 0 Download	End
+PAGE 0x02 = 1 Tdebug	End
+PAGE 0x03 = 2 Log windows	End
+default = 0	End
+[SECTION]
+SECTION 0x01 = .data End
+SECTION 0x02 = .bss End
+SECTION 0x03 = .retention_data End
+SECTION 0x04 = .retention_bss End
+SECTION 0x05 = .no_ret_data End
+SECTION 0x06 = .no_ret_bss End
+default End
+[BUTTON]
+
+[PATH]
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/telink_flasher.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/telink_flasher.exe
new file mode 100644
index 00000000..965750c6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/telink_flasher.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/tl_usb2.2.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/tl_usb2.2.dll
new file mode 100644
index 00000000..907b58c0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/flashing/tl_usb2.2.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/make/div_mod.mk b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/div_mod.mk
new file mode 100644
index 00000000..2bc516f9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/div_mod.mk
@@ -0,0 +1,13 @@
+# Add inputs and outputs from these tool invocations to the build variables
+OUT_DIR += \
+/platform/tc32
+ 
+OBJS += \
+$(OUT_PATH)/platform/tc32/div_mod.o
+
+
+# Each subdirectory must supply rules for building sources it contributes
+$(OUT_PATH)/platform/tc32/%.o: $(SDK_PATH)/platform/tc32/%.S
+	@echo 'Building file: $<'
+	@$(CC) $(BOOT_FLAG) $(INCLUDE_PATHS) -c -o"$@" "$<"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platform.mk b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platform.mk
new file mode 100644
index 00000000..c152bbb4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platform.mk
@@ -0,0 +1,28 @@
+# Add inputs and outputs from these tool invocations to the build variables
+OUT_DIR += \
+/platform/chip_8258 \
+/platform/chip_8258/flash \
+/platform/services/b85m
+ 
+ 
+OBJS += \
+$(OUT_PATH)/platform/chip_8258/flash.o \
+$(OUT_PATH)/platform/chip_8258/adc.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid011460c8.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid1060c8.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid13325e.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid134051.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid136085.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid1360c8.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid1360eb.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid14325e.o \
+$(OUT_PATH)/platform/chip_8258/flash/flash_mid1460c8.o \
+$(OUT_PATH)/platform/services/b85m/irq_handler.o 
+
+
+
+# Each subdirectory must supply rules for building sources it contributes
+$(OUT_PATH)/platform/%.o: $(SDK_PATH)/platform/%.c
+	@echo 'Building file: $<'
+	@$(CC) $(GCC_FLAGS) $(INCLUDE_PATHS) -c -o"$@" "$<"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platformS.mk b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platformS.mk
new file mode 100644
index 00000000..4a2e916f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/platformS.mk
@@ -0,0 +1,16 @@
+# Add inputs and outputs from these tool invocations to the build variables
+OUT_DIR += \
+/platform/boot \
+/platform/boot/8258
+ 
+OBJS += \
+$(OUT_PATH)/platform/boot/link_cfg.o \
+$(OUT_PATH)/platform/boot/8258/cstartup_8258.o 
+
+
+
+# Each subdirectory must supply rules for building sources it contributes
+$(OUT_PATH)/platform/boot/%.o: $(SDK_PATH)/platform/boot/%.S
+	@echo 'Building file: $<'
+	@$(CC) $(BOOT_FLAG) $(INCLUDE_PATHS) -c -o"$@" "$<"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/make/proj.mk b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/proj.mk
new file mode 100644
index 00000000..9f996b7e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/make/proj.mk
@@ -0,0 +1,40 @@
+# Add inputs and outputs from these tool invocations to the build variables
+OUT_DIR += \
+/proj/common \
+/proj/drivers \
+/proj/drivers/usb \
+/proj/os
+ 
+OBJS += \
+$(OUT_PATH)/proj/common/list.o \
+$(OUT_PATH)/proj/common/mempool.o \
+$(OUT_PATH)/proj/common/string.o \
+$(OUT_PATH)/proj/common/tlPrintf.o \
+$(OUT_PATH)/proj/common/utility.o \
+$(OUT_PATH)/proj/drivers/drv_adc.o \
+$(OUT_PATH)/proj/drivers/drv_calibration.o \
+$(OUT_PATH)/proj/drivers/drv_flash.o \
+$(OUT_PATH)/proj/drivers/drv_gpio.o \
+$(OUT_PATH)/proj/drivers/drv_hw.o \
+$(OUT_PATH)/proj/drivers/drv_i2c.o \
+$(OUT_PATH)/proj/drivers/drv_keyboard.o \
+$(OUT_PATH)/proj/drivers/drv_nv.o \
+$(OUT_PATH)/proj/drivers/drv_pm.o \
+$(OUT_PATH)/proj/drivers/drv_pwm.o \
+$(OUT_PATH)/proj/drivers/drv_spi.o \
+$(OUT_PATH)/proj/drivers/drv_timer.o \
+$(OUT_PATH)/proj/drivers/drv_uart.o \
+$(OUT_PATH)/proj/os/ev.o \
+$(OUT_PATH)/proj/os/ev_buffer.o \
+$(OUT_PATH)/proj/os/ev_poll.o \
+$(OUT_PATH)/proj/os/ev_queue.o \
+$(OUT_PATH)/proj/os/ev_timer.o 
+
+
+
+# Each subdirectory must supply rules for building sources it contributes
+$(OUT_PATH)/proj/%.o: $(SDK_PATH)/proj/%.c 
+	@echo 'Building file: $<'
+	@$(CC) $(GCC_FLAGS) $(INCLUDE_PATHS) -c -o"$@" "$<"
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/makefile b/ARM_Tag_FW/OpenEPaperLink_TLSR/makefile
new file mode 100644
index 00000000..56ffaa99
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/makefile
@@ -0,0 +1,143 @@
+PROJECT_NAME := TLSR_OpenEPaperLink
+
+
+ifeq ($(OS), Windows_NT)
+	TC32_COMPILER_PATH := "tc32_windows\\bin\\"
+	WINDOWS_PREFIX :=$(TC32_COMPILER_PATH)
+	LINUX_CHMOD := 
+else
+	TC32_COMPILER_PATH := ./tc32_linux/bin/
+	WINDOWS_PREFIX :=
+	LINUX_CHMOD := chmod 777 -R ./tc32_linux/
+endif
+
+AS      = $(TC32_COMPILER_PATH)tc32-elf-as
+CC      = $(TC32_COMPILER_PATH)tc32-elf-gcc
+LD      = $(TC32_COMPILER_PATH)tc32-elf-ld
+NM      = $(TC32_COMPILER_PATH)tc32-elf-nm
+OBJCOPY = $(TC32_COMPILER_PATH)tc32-elf-objcopy
+OBJDUMP = $(TC32_COMPILER_PATH)tc32-elf-objdump
+ARCH	= $(TC32_COMPILER_PATH)tc32-elf-ar
+SIZE	= $(TC32_COMPILER_PATH)tc32-elf-size
+
+LIBS := -ldrivers_8258
+
+DEVICE_TYPE = -DEND_DEVICE=1
+MCU_TYPE = -DMCU_CORE_8258=1
+BOOT_FLAG = -DMCU_CORE_8258 -DMCU_STARTUP_8258
+
+SDK_PATH := ./tl_zigbee_sdk
+SRC_PATH := ./src
+OUT_PATH := ./out
+MAKE_INCLUDES := ./make
+
+INCLUDE_PATHS := \
+-I$(SDK_PATH)/platform \
+-I$(SDK_PATH)/proj/common \
+-I$(SDK_PATH)/proj \
+-I$(SDK_PATH)/zbhci \
+-I$(SRC_PATH) \
+-I./common
+ 
+
+LS_FLAGS := $(SDK_PATH)/platform/boot/8258/boot_8258.link
+
+GCC_FLAGS := \
+-ffunction-sections \
+-fdata-sections \
+-Wall \
+-O2 \
+-fpack-struct \
+-fshort-enums \
+-finline-small-functions \
+-std=gnu99 \
+-fshort-wchar \
+-fms-extensions
+
+GCC_FLAGS += \
+$(DEVICE_TYPE) \
+$(MCU_TYPE) \
+-D__PROJECT_TL_SWITCH__=1
+
+OBJ_SRCS := 
+S_SRCS := 
+ASM_SRCS := 
+C_SRCS := 
+S_UPPER_SRCS := 
+O_SRCS := 
+FLASH_IMAGE := 
+ELFS := 
+OBJS := 
+LST := 
+SIZEDUMMY := 
+
+
+RM := $(WINDOWS_PREFIX)rm -rf
+
+# All of the sources participating in the build are defined here
+-include $(MAKE_INCLUDES)/proj.mk
+-include $(MAKE_INCLUDES)/platformS.mk
+-include $(MAKE_INCLUDES)/div_mod.mk
+-include $(MAKE_INCLUDES)/platform.mk
+-include ./project.mk
+
+# Add inputs and outputs from these tool invocations to the build variables 
+LST_FILE := $(OUT_PATH)/$(PROJECT_NAME).lst
+BIN_FILE := $(OUT_PATH)/../$(PROJECT_NAME).bin
+ELF_FILE := $(OUT_PATH)/$(PROJECT_NAME).elf
+
+SIZEDUMMY += \
+sizedummy \
+
+
+# All Target
+all: chmod_all pre-build main-build
+
+# Main-build Target
+main-build: $(ELF_FILE) secondary-outputs
+
+# Tool invocations
+$(ELF_FILE): $(OBJS) $(USER_OBJS)
+	@echo 'Building target: $@'
+	@echo 'Invoking: TC32 C Linker'
+	$(LD) --gc-sections -L $(SDK_PATH)/zigbee/lib/tc32 -L $(SDK_PATH)/platform/lib -T $(LS_FLAGS) -o "$(ELF_FILE)" $(OBJS) $(USER_OBJS) $(LIBS)
+	@echo 'Finished building target: $@'
+	@echo ' '
+	
+
+$(LST_FILE): $(ELF_FILE)
+	@echo 'Invoking: TC32 Create Extended Listing'
+	$(OBJDUMP) -x -D -l -S $(ELF_FILE)  > $(LST_FILE)
+	@echo 'Finished building: $@'
+	@echo ' '
+
+$(BIN_FILE): $(ELF_FILE)
+	@echo 'Create Flash image (binary format)'
+	@$(OBJCOPY) -v -O binary $(ELF_FILE)  $(BIN_FILE)
+	@echo 'Finished building: $@'
+	@echo ' '
+
+
+sizedummy: $(ELF_FILE)
+	@echo 'Invoking: Print Size'
+	@$(SIZE) -t $(ELF_FILE)
+	@echo 'Finished building: $@'
+	@echo ' '
+
+clean:
+	-$(RM) $(FLASH_IMAGE) $(ELFS) $(OBJS) $(SIZEDUMMY) $(LST_FILE) $(ELF_FILE) $(BIN_FILE)
+	-@echo ' '
+	
+pre-build:
+	$(WINDOWS_PREFIX)mkdir -p $(foreach s,$(OUT_DIR),$(OUT_PATH)$(s))
+	-@echo ' '
+
+chmod_all:
+	-@$(LINUX_CHMOD)
+	-@echo 'chmod_all'
+	
+secondary-outputs: $(BIN_FILE) $(LST_FILE) $(FLASH_IMAGE) $(SIZEDUMMY)
+
+.PHONY: all clean dependents pre-build
+.SECONDARY: main-build pre-build
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/makeit.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/makeit.exe
new file mode 100644
index 00000000..4201fb40
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/makeit.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/project.mk b/ARM_Tag_FW/OpenEPaperLink_TLSR/project.mk
new file mode 100644
index 00000000..329230da
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/project.mk
@@ -0,0 +1,34 @@
+# Add inputs and outputs from these tool invocations to the build variables
+OUT_DIR += \
+/$(SRC_PATH) \
+ 
+OBJS += \
+$(OUT_PATH)/$(SRC_PATH)/main.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_spi.o \
+$(OUT_PATH)/$(SRC_PATH)/epd.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bw_213.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bwr_213.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bwr_350.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bwy_350.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bw_213_ice.o \
+$(OUT_PATH)/$(SRC_PATH)/epd_bwr_154.o \
+$(OUT_PATH)/$(SRC_PATH)/led.o \
+$(OUT_PATH)/$(SRC_PATH)/i2c.o \
+$(OUT_PATH)/$(SRC_PATH)/battery.o \
+$(OUT_PATH)/$(SRC_PATH)/nfc.o \
+$(OUT_PATH)/$(SRC_PATH)/uart.o \
+$(OUT_PATH)/$(SRC_PATH)/one_bit_display.o \
+$(OUT_PATH)/$(SRC_PATH)/eeprom.o \
+$(OUT_PATH)/$(SRC_PATH)/zigbee.o \
+$(OUT_PATH)/$(SRC_PATH)/comms.o \
+$(OUT_PATH)/$(SRC_PATH)/drawing.o \
+$(OUT_PATH)/$(SRC_PATH)/syncedproto.o \
+$(OUT_PATH)/$(SRC_PATH)/wdt.o \
+$(OUT_PATH)/$(SRC_PATH)/powermgt.o \
+
+# Each subdirectory must supply rules for building sources it contributes
+$(OUT_PATH)/$(SRC_PATH)/%.o: $(SRC_PATH)/%.c 
+	@echo 'Building file: $<'
+	@$(CC) $(GCC_FLAGS) $(INCLUDE_PATHS) -c -o"$@" "$<"
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.cpp b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.cpp
new file mode 100644
index 00000000..240c4897
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.cpp
@@ -0,0 +1,822 @@
+//
+// OneBitDisplay (OLED+LCD library)
+// Copyright (c) 2020 BitBank Software, Inc.
+// Written by Larry Bank (bitbank@pobox.com)
+// Project started 3/23/2020
+//
+// Licensed under the Apache License, Version 2.0 (the "License");
+// you may not use this file except in compliance with the License.
+// You may obtain a copy of the License at
+//    http://www.apache.org/licenses/LICENSE-2.0
+// Unless required by applicable law or agreed to in writing, software
+// distributed under the License is distributed on an "AS IS" BASIS,
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+// See the License for the specific language governing permissions and
+// limitations under the License.
+//
+#ifdef _LINUX_
+#include <stdint.h>
+#include <stdlib.h>
+#include <stdio.h>
+#include <string.h>
+// convert wire library constants into ArmbianIO values
+#define OUTPUT GPIO_OUT
+#define INPUT GPIO_IN
+#define INPUT_PULLUP GPIO_IN_PULLUP
+#define HIGH 1
+#define LOW 0
+void delay(int);
+#else // Arduino
+
+#include <Arduino.h>
+#ifdef __AVR__
+#include <avr/pgmspace.h>
+#endif
+#include <SPI.h>
+
+#endif // _LINUX_
+#include "OneBitDisplay.h"
+// All of the drawing code is in here
+#include "obd.inl"
+
+// Initialization sequences
+const unsigned char oled128_initbuf[] PROGMEM = {0x00, 0xae,0xdc,0x00,0x81,0x40,
+      0xa1,0xc8,0xa8,0x7f,0xd5,0x50,0xd9,0x22,0xdb,0x35,0xb0,0xda,0x12,
+      0xa4,0xa6,0xaf};
+
+const unsigned char oled64x128_initbuf[] PROGMEM ={
+0x00, 0xae, 0xd5, 0x51, 0x20, 0xa8, 0x3f, 0xdc, 0x00, 0xd3, 0x60, 0xad, 0x80, 0xa6, 0xa4, 0xa0, 0xc0, 0x81, 0x40, 0xd9, 0x22, 0xdb, 0x35, 0xaf
+};
+
+const unsigned char oled132_initbuf[] PROGMEM = {0x00,0xae,0x02,0x10,0x40,0x81,0xa0,0xc0,0xa6,0xa8,0x3f,0xd3,0x00,0xd5,0x80,0xd9,0xf1,0xda,0x12,0xdb,0x40,0x20,0x02,0xa4,0xa6};
+
+const unsigned char oled64_initbuf[] PROGMEM ={0x00,0xae,0xa8,0x3f,0xd3,0x00,0x40,0xa1,0xc8,
+      0xda,0x12,0x81,0xff,0xa4,0xa6,0xd5,0x80,0x8d,0x14,
+      0xaf,0x20,0x02};
+
+const unsigned char oled32_initbuf[] PROGMEM  = {
+0x00,0xae,0xd5,0x80,0xa8,0x1f,0xd3,0x00,0x40,0x8d,0x14,0xa1,0xc8,0xda,0x02,
+0x81,0x7f,0xd9,0xf1,0xdb,0x40,0xa4,0xa6,0xaf};
+
+const unsigned char oled72_initbuf[] PROGMEM ={0x00,0xae,0xa8,0x3f,0xd3,0x00,0x40,0xa1,0xc8,
+      0xda,0x12,0x81,0xff,0xad,0x30,0xd9,0xf1,0xa4,0xa6,0xd5,0x80,0x8d,0x14,
+      0xaf,0x20,0x02};
+
+const unsigned char uc1701_initbuf[] PROGMEM  = {0xe2, 0x40, 0xa0, 0xc8, 0xa2, 0x2c, 0x2e, 0x2f, 0xf8, 0x00, 0x23, 0x81, 0x28, 0xac, 0x00, 0xa6};
+
+const unsigned char hx1230_initbuf[] PROGMEM  = {0x2f, 0x90, 0xa6, 0xa4, 0xaf, 0x40, 0xb0, 0x10, 0x00};
+const unsigned char nokia5110_initbuf[] PROGMEM  = {0x21, 0xa4, 0xb1, 0x04,0x14,0x20,0x0c};
+
+static void obdCachedFlush(OBDISP *pOBD, int bRender);
+static void obdCachedWrite(OBDISP *pOBD, uint8_t *pData, uint8_t u8Len, int bRender);
+void obdSetPosition(OBDISP *pOBD, int x, int y, int bRender);
+void obdWriteCommand(OBDISP *pOBD, unsigned char c);
+void obdWriteDataBlock(OBDISP *pOBD, unsigned char *ucBuf, int iLen, int bRender);
+//static void SPI_BitBang(OBDISP *pOBD, uint8_t *pData, int iLen, uint8_t iMOSIPin, uint8_t iSCKPin);
+
+//
+// Draw the contents of a memory buffer onto a display
+// The sub-window will be clipped if it specifies too large an area
+// for the destination display. The source OBDISP structure must have
+// a valid back buffer defined
+// The top and bottom destination edges will be drawn on byte boundaries (8 rows)
+// The source top/bot edges can be on pixel boundaries
+// This can be used for partial screen updates
+//
+void obdDumpWindow(OBDISP *pOBDSrc, OBDISP *pOBDDest, int srcx, int srcy, int destx, int desty, int width, int height)
+{
+uint8_t *s,ucTemp[32]; // temp buffer to gather source pixels
+int x, y, tx, i;
+int iPitch;
+
+   if (pOBDSrc == NULL || pOBDDest == NULL || pOBDSrc->ucScreen == NULL)
+      return; // invalid pointers
+   if (width > pOBDDest->width)
+      width = pOBDDest->width;
+   if (height > pOBDDest->height)
+      height = pOBDDest->height;
+   iPitch = pOBDSrc->width;
+   for (y=0; y<height; y+=8)
+   {
+      obdSetPosition(pOBDDest, destx, (desty+y)/8, 1);
+      for (x=0; x<width; x+=32)
+      {
+         tx = 32;
+         if (width-x < 32) tx = width-x;
+         s = &pOBDSrc->ucScreen[((srcy+y)/8)*iPitch + srcx+x];
+	 if (srcy & 7) // need to shift the bits to get 8 rows of src data
+         {
+            uint8_t uc, ucShift = srcy & 7;
+            for (i=0; i<tx; i++)
+            { // combine current and next line to capture 8 pixels
+               uc = s[0] >> ucShift;
+               uc |= s[iPitch] << (7-ucShift);
+               ucTemp[i] = uc;
+            }
+            obdCachedWrite(pOBDDest, ucTemp, tx, 1);
+         }
+         else
+         { // simpler case
+            obdCachedWrite(pOBDDest, s, tx, 1); // just copy it
+         }
+      } // for x
+   } // for y
+   obdCachedFlush(pOBDDest, 1);
+} /* obdDumpWindow() */
+
+//
+// Write a single line to a Sharp memory LCD
+// You must provide the exact number of bytes needed for a complete line
+// e.g. for the 144x168 display, pSrc must provide 144 pixels (18 bytes) 
+//
+void obdWriteLCDLine(OBDISP *pOBD, uint8_t *pSrc, int iLine)
+{
+    int x;
+    uint8_t c, ucInvert, *d, ucStart;
+    uint8_t ucLineBuf[54]; // 400 pixels is max supported width = 50 bytes + 4
+    int iPitch = pOBD->width / 8;
+    static int iVCOM = 0;
+
+//    if (pOBD == NULL || pSrc == NULL || pOBD->type < SHARP_144x168)
+//        return; // invalid request
+    if (iLine < 0 || iLine >= pOBD->height)
+        return;
+    
+      ucInvert = (pOBD->invert) ? 0x00 : 0xff;
+      digitalWrite(pOBD->iCSPin, HIGH); // active high
+
+      ucStart = 0x80; // write command
+      iVCOM++;
+      if (iVCOM & 0x100) // flip it every 256 lines
+        ucStart |= 0x40; // VCOM bit
+      ucLineBuf[1] = ucStart;
+      // this code assumes I2C, so the first byte is ignored
+      _I2CWrite(pOBD, ucLineBuf, 2); // write command(01) + vcom(02)
+
+     d = &ucLineBuf[2];
+     ucLineBuf[1] = pgm_read_byte(&ucMirror[iLine+1]); // current line number
+     for (x=0; x<iPitch; x++)
+     {
+         c = pSrc[0] ^ ucInvert; // we need to brute-force invert it
+         *d++ = pgm_read_byte(&ucMirror[c]);
+         pSrc++;
+     } // for x
+    // write this line to the display
+    ucLineBuf[iPitch+2] = 0; // end of line
+    _I2CWrite(pOBD, ucLineBuf, iPitch+3);
+    ucLineBuf[1] = 0;
+    _I2CWrite(pOBD, ucLineBuf, 2); // final transfer
+    digitalWrite(pOBD->iCSPin, LOW); // de-activate
+} /* obdWriteLCDLine() */
+
+//
+// Turn the display on or off
+//
+void obdPower(OBDISP *pOBD, int bOn)
+{
+uint8_t ucCMD;
+
+  if (pOBD->type == LCD_NOKIA5110)
+    ucCMD = (bOn) ? 0x20 : 0x24;
+  else // all other supported displays
+    ucCMD = (bOn) ? 0xaf : 0xae;
+  obdWriteCommand(pOBD, ucCMD);
+} /* obdPower() */
+
+// Controls the LED backlight
+void obdBacklight(OBDISP *pOBD, int bOn)
+{
+  if (pOBD->iLEDPin != 0xff)
+  {
+     digitalWrite(pOBD->iLEDPin, (bOn) ? HIGH:LOW);
+  }
+} /* obdBacklight() */
+
+//
+// Initialize the display controller on an SPI bus
+//
+void obdSPIInit(OBDISP *pOBD, int iType, int iDC, int iCS, int iReset, int iMOSI, int iCLK, int iLED, int bFlip, int bInvert, int bBitBang, int32_t iSpeed)
+{
+} /* obdSPIInit() */
+//
+// Set the memory configuration to display the pixels at 0 or 180 degrees (flipped)
+// Pass true (1) to flip 180, false (0) to set to 0
+//
+void obdSetFlip(OBDISP *pOBD, int iOnOff)
+{
+   if (pOBD == NULL) return;
+   pOBD->flip = iOnOff;
+   if (pOBD->type == LCD_UC1701 || pOBD->type == LCD_UC1609)
+   {
+      if (iOnOff) // rotate display 180
+      {
+         obdWriteCommand(pOBD, 0xa1); // SEG direction (A1 to flip horizontal) 
+         obdWriteCommand(pOBD, 0xc0); // COM direction (C0 to flip vert)
+      } else { // non-rotated
+         obdWriteCommand(pOBD, 0xa0);       
+         obdWriteCommand(pOBD, 0xc8);
+      }
+   } else { // OLEDs
+      if (iOnOff)
+      {
+	 obdWriteCommand(pOBD, 0xa0);
+	 obdWriteCommand(pOBD, 0xc0);
+      } else {
+	 obdWriteCommand(pOBD, 0xa1);
+	 obdWriteCommand(pOBD, 0xc8);
+      }
+   }
+} /* obdSetFlip() */
+//
+// Initializes the OLED controller into "page mode"
+//
+int obdI2CInit(OBDISP *pOBD, int iType, int iAddr, int bFlip, int bInvert, int bWire, int sda, int scl, int reset, int32_t iSpeed)
+{
+	return 0;
+} /* obdInit() */
+//
+// Sends a command to turn on or off the OLED display
+//
+void oledPower(OBDISP *pOBD, uint8_t bOn)
+{
+    if (bOn)
+      obdWriteCommand(pOBD, 0xaf); // turn on OLED
+    else
+      obdWriteCommand(pOBD, 0xae); // turn off OLED
+} /* oledPower() */
+
+#ifdef _LINUX_
+void delay(int iDelay)
+{
+//	usleep(iDelay * 1000);
+} /* delay() */
+void delayMicroseconds(int iDelay)
+{
+	//usleep(iDelay);
+} /* delayMicroseconds() */
+#endif // _LINUX_
+//
+// Bit Bang the data on GPIO pins
+//
+void SPI_BitBang(OBDISP *pOBD, uint8_t *pData, int iLen, uint8_t iMOSIPin, uint8_t iSCKPin)
+{
+int i;
+uint8_t c;
+// We can access the GPIO ports much quicker on AVR by directly manipulating
+// the port registers
+#ifdef __AVR__
+volatile uint8_t *outSCK, *outMOSI; // port registers for fast I/O
+uint8_t port, bitSCK, bitMOSI; // bit mask for the chosen pins
+
+    port = digitalPinToPort(iMOSIPin);
+    outMOSI = portOutputRegister(port);
+    bitMOSI = digitalPinToBitMask(iMOSIPin);
+    port = digitalPinToPort(iSCKPin);
+    outSCK = portOutputRegister(port);
+    bitSCK = digitalPinToBitMask(iSCKPin);
+
+#endif
+
+   while (iLen)
+   {
+      c = *pData++;
+      if (pOBD->iDCPin == 0xff) // 3-wire SPI, write D/C bit first
+      {
+#ifdef __AVR__
+          if (pOBD->mode == MODE_DATA)
+             *outMOSI |= bitMOSI;
+          else
+             *outMOSI &= ~bitMOSI;
+          *outSCK |= bitSCK; // toggle clock
+          *outSCK &= ~bitSCK; // no delay needed on SPI devices since AVR is slow
+#else
+          digitalWrite(iMOSIPin, (pOBD->mode == MODE_DATA));
+          digitalWrite(iSCKPin, HIGH);
+          delayMicroseconds(0);
+	  digitalWrite(iSCKPin, LOW);
+#endif
+      }
+      if (c == 0 || c == 0xff) // quicker for all bits equal
+      {
+#ifdef __AVR__
+         if (c & 1)
+            *outMOSI |= bitMOSI;
+         else
+            *outMOSI &= ~bitMOSI;
+         for (i=0; i<8; i++)
+         {
+            *outSCK |= bitSCK;
+            *outSCK &= ~bitSCK;
+         }
+#else
+         digitalWrite(iMOSIPin, (c & 1));
+         for (i=0; i<8; i++)
+         {
+            digitalWrite(iSCKPin, HIGH);
+            delayMicroseconds(0);
+            digitalWrite(iSCKPin, LOW);
+         }
+#endif
+      }
+      else
+      {
+         for (i=0; i<8; i++)
+         {
+#ifdef __AVR__
+            if (c & 0x80) // MSB first
+               *outMOSI |= bitMOSI;
+            else
+               *outMOSI &= ~bitMOSI;
+            *outSCK |= bitSCK;
+            c <<= 1;
+            *outSCK &= ~bitSCK;
+#else
+            digitalWrite(iMOSIPin,  (c & 0x80) != 0); // MSB first
+            digitalWrite(iSCKPin, HIGH);
+            c <<= 1;
+            delayMicroseconds(0);
+            digitalWrite(iSCKPin, LOW);
+#endif
+        }
+      }
+      iLen--;
+   }
+} /* SPI_BitBang() */
+
+// Sets the D/C pin to data or command mode
+void obdSetDCMode(OBDISP *pOBD, int iMode)
+{
+  if (pOBD->iDCPin == 0xff) // 9-bit SPI
+      pOBD->mode = (uint8_t)iMode;
+  else // set the GPIO line
+      digitalWrite(pOBD->iDCPin, (iMode == MODE_DATA));
+} /* obdSetDCMode() */
+
+static void obdWriteCommand2(OBDISP *pOBD, unsigned char c, unsigned char d)
+{
+unsigned char buf[4];
+
+    if (pOBD->com_mode == COM_I2C) {// I2C device
+        buf[0] = 0x00;
+        buf[1] = c;
+        buf[2] = d;
+        _I2CWrite(pOBD, buf, 3);
+    } else { // must be SPI
+        obdWriteCommand(pOBD, c);
+        obdWriteCommand(pOBD, d);
+    }
+} /* obdWriteCommand2() */
+
+//
+// Sets the brightness (0=off, 255=brightest)
+//
+void obdSetContrast(OBDISP *pOBD, unsigned char ucContrast)
+{
+  if (pOBD->type == LCD_HX1230)
+  { // valid values are 0-31, so scale it
+      ucContrast >>= 3;
+      obdWriteCommand(pOBD, 0x80 + ucContrast);
+  }
+  else if (pOBD->type == LCD_NOKIA5110)
+  {
+      // we allow values of 0xb0-0xbf, so shrink the range
+      ucContrast >>= 4;
+      obdWriteCommand(pOBD, 0x21); // set advanced command mode
+      obdWriteCommand(pOBD, 0xb0 | ucContrast);
+      obdWriteCommand(pOBD, 0x20); // set simple command mode
+  }
+  else // OLEDs + UC1701
+      obdWriteCommand2(pOBD, 0x81, ucContrast);
+} /* obdSetContrast() */
+
+//
+// Special case for Sharp Memory LCD
+//
+static void SharpDumpBuffer(OBDISP *pOBD, uint8_t *pBuffer)
+{
+int x, y;
+uint8_t c, ucInvert, *s, *d, ucStart;
+uint8_t ucLineBuf[56];
+int iPitch = pOBD->width / 8;
+static uint8_t ucVCOM = 0;
+int iBit;
+uint8_t ucMask;
+
+  ucInvert = (pOBD->invert) ? 0x00 : 0xff;
+  digitalWrite(pOBD->iCSPin, HIGH); // active high
+ 
+    ucLineBuf[0] = 0;
+  ucStart = 0x80; // write command
+  if (ucVCOM)
+    ucStart |= 0x40; // VCOM bit
+  ucLineBuf[1] = ucStart;
+  // this code assumes I2C, so the first byte is ignored
+  _I2CWrite(pOBD, ucLineBuf, 2); // write command(01) + vcom(02)
+  ucVCOM = !ucVCOM; // need to toggle this each transaction
+
+ // We need to flip and invert the image in code because the Sharp memory LCD
+ // controller only has the simplest of commands for data writing
+  if (pOBD->flip)
+  {
+     for (y=0; y<pOBD->height; y++) // we have to write the memory in the wrong direction
+     {  
+         ucMask = 0x80 >> (y & 7);
+        s = &pBuffer[pOBD->width - 1 + (pOBD->width * ((pOBD->height - 1 - y) >> 3))]; // point to last line first
+        d = &ucLineBuf[2];
+        ucLineBuf[1] = pgm_read_byte(&ucMirror[y+1]); // current line number
+        for (x=0; x<pOBD->width/8; x++)
+        {  
+           c = ucInvert; // we need to brute-force invert it
+            for (iBit=7; iBit>=0; iBit--)
+            {
+                if (s[0] & ucMask)
+                    c ^= (1 << iBit);
+                s--;
+            }
+           *d++ = c;
+        } // for y
+        // write this line to the display
+        ucLineBuf[iPitch+2] = 0; // end of line
+        _I2CWrite(pOBD, ucLineBuf, iPitch+3);
+     } // for x
+  }
+  else // normal orientation
+  {
+     for (y=0; y<pOBD->height; y++) // we have to write the memory in the wrong direction
+     {
+        ucMask = 1 << (y & 7);
+        s = &pBuffer[pOBD->width * (y >> 3)]; // point to last line first
+        d = &ucLineBuf[2];
+        
+        ucLineBuf[1] = pgm_read_byte(&ucMirror[y+1]); // current line number
+        for (x=0; x<pOBD->width/8; x++)
+        {
+            c = ucInvert;
+            for (iBit=7; iBit>=0; iBit--)
+            {
+                if (s[0] & ucMask)
+                    c ^= (1 << iBit);
+                s++;
+            }
+           *d++ = c;
+        } // for y
+        // write this line to the display
+        ucLineBuf[iPitch+2] = 0; // end of line
+        _I2CWrite(pOBD, ucLineBuf, iPitch+3);
+     } // for x
+  }
+  ucLineBuf[1] = 0;
+  _I2CWrite(pOBD, ucLineBuf, 2); // final transfer
+  digitalWrite(pOBD->iCSPin, LOW); // de-activate
+} /* SharpDumpBuffer() */
+//
+// Dump a screen's worth of data directly to the display
+// Try to speed it up by comparing the new bytes with the existing buffer
+//
+void obdDumpBuffer(OBDISP *pOBD, uint8_t *pBuffer)
+{
+int x, y, iPitch;
+int iLines, iCols;
+uint8_t bNeedPos;
+uint8_t *pSrc = pOBD->ucScreen;
+    
+  iPitch = pOBD->width;
+  if (pOBD->type == LCD_VIRTUAL) // wrong function for this type of display
+    return;
+  if (pBuffer == NULL) // dump the internal buffer if none is given
+    pBuffer = pOBD->ucScreen;
+  if (pBuffer == NULL)
+    return; // no backbuffer and no provided buffer
+  
+  if (pOBD->type >= SHARP_144x168) // special case for Sharp Memory LCD
+  {
+    SharpDumpBuffer(pOBD, pBuffer);
+    return;
+  }
+  iLines = pOBD->height >> 3;
+  iCols = pOBD->width >> 4;
+  for (y=0; y<iLines; y++)
+  {
+    bNeedPos = 1; // start of a new line means we need to set the position too
+    for (x=0; x<iCols; x++) // wiring library has a 32-byte buffer, so send 16 bytes so that the data prefix (0x40) can fit
+    {
+      if (pOBD->ucScreen == NULL || pBuffer == pSrc || memcmp(pSrc, pBuffer, 16) != 0) // doesn't match, need to send it
+      {
+        if (bNeedPos) // need to reposition output cursor?
+        {
+           bNeedPos = 0;
+           obdCachedFlush(pOBD, 1);
+           obdSetPosition(pOBD, x*16, y, 1);
+        }
+        obdCachedWrite(pOBD, pBuffer, 16, 1);
+      }
+      else
+      {
+         bNeedPos = 1; // we're skipping a block, so next time will need to set the new position
+      }
+      pSrc += 16;
+      pBuffer += 16;
+    } // for x
+    pSrc += (iPitch - pOBD->width); // for narrow displays, skip to the next line
+    pBuffer += (iPitch - pOBD->width);
+  } // for y
+  obdCachedFlush(pOBD, 1);
+} /* obdDumpBuffer() */
+
+//
+// Menu functions are not (yet) supported on Linux
+//
+#ifndef _LINUX_
+// A valid CW or CCW move returns 1 or -1, invalid returns 0.
+static int obdMenuReadRotary(SIMPLEMENU *sm) {
+static int8_t rot_enc_table[] = {0,1,1,0,1,0,0,1,1,0,0,1,0,1,1,0};
+uint8_t c;
+int rc = 0;
+
+
+  sm->prevNextCode <<= 2;
+  if (digitalRead(sm->u8Dn) == sm->iPressed)
+     sm->prevNextCode |= 0x02;
+  if (digitalRead(sm->u8Up) == sm->iPressed)
+     sm->prevNextCode |= 0x01;
+  sm->prevNextCode &= 0x0f;
+
+   // If valid then store as 16 bit data.
+   if  (rot_enc_table[sm->prevNextCode]) {
+      sm->store <<= 4;
+      sm->store |= sm->prevNextCode;
+      c = sm->store & 0xff;
+      //if (store==0xd42b) return 1;
+      //if (store==0xe817) return -1;
+      if ((c & 0xf) == 2) rc = -1;
+      else if ((c & 0xf) == 1) rc = 1;
+   }
+//   Serial.printf("store = 0x%04x, val = %d\r\n", sm->store, rc);
+   return rc;
+} /* obdMenuReadRotary() */
+
+//
+// Initialize the simple menu structure
+//
+int obdMenuInit(OBDISP *pOBD, SIMPLEMENU *sm, char **pText, int iFontSize, int bCenter, int btnUp, int btnDn, int btnEnter, int iPressedState, int bIsRotary)
+{
+  int iLen;
+  if (sm == NULL || pText == NULL) return 0;
+  sm->pOBD = pOBD;
+  sm->u8Up = btnUp; // pin numbers of the action buttons
+  sm->u8Dn = btnDn; // or rotary A line
+  sm->u8Enter = btnEnter; // or rotary B line
+  sm->bIsRotary = bIsRotary;
+  sm->u8BtnState = 0; // no active buttons to start
+  sm->iPressed = iPressedState; // active state of a pressed button
+  sm->bCenter = bCenter;
+  sm->iFontSize = iFontSize;
+  sm->pMenuText = pText;
+  sm->iMenuIndex = 0; // start at first item
+  sm->iDispX = 128; // DEBUG
+  sm->iDispY = 64; // DEBUG
+  sm->bOneButton = (btnDn == -1 && btnEnter == -1); // only 1 button defined
+  sm->pfnCallback = NULL;
+  sm->prevNextCode = 0;
+  sm->store = 0;
+  iLen = 0;
+  while (pText[iLen] != NULL) {
+    iLen++;
+  }
+  sm->iMenuLen = iLen-1; // don't count the title text
+  return 1; // success
+} /* obdMenuInit() */
+
+//
+// Get the text and centering position for
+// a specific menu item
+// returns the X position
+//
+static int obdMenuGetItem(SIMPLEMENU *sm, int iItem, char *szText)
+{
+  int x, cx, len;
+
+  if (iItem > sm->iMenuLen)
+     return -1; // invalid request
+
+  if (sm->iFontSize == FONT_6x8)
+     cx = 6;
+  else if (sm->iFontSize == FONT_8x8)
+     cx = 8;
+  else cx = 16;
+  strcpy(szText, sm->pMenuText[iItem]);
+  if (sm->pfnCallback && iItem > 0) // don't add callback for menu title
+  {
+    strcat(szText, " ");
+    strcat(szText, (*sm->pfnCallback)(iItem-1));
+  }
+  x = 0;
+  if (sm->bCenter || iItem == 0) // always center the menu title
+  {
+    len = strlen(szText);
+     x = (sm->iDispX - (len * cx)) / 2;
+  }
+  return x;
+} /* obdMenuGetItem() */
+
+//
+// Erase the display and show the given menu
+//
+void obdMenuShow(SIMPLEMENU *sm, int iItem)
+{
+int i, x, iCount, iStart = 0;
+int iFirst, iLast;
+char szTemp[64];
+
+  iCount = (sm->iDispY / 8) - 1; // DEBUG - number of visible menu lines
+  iFirst = iLast = iItem;
+  if (iItem == -1) // show the entire menu
+  {
+    obdFill(sm->pOBD, 0, 0);
+    x = obdMenuGetItem(sm, 0, szTemp); // get the title text
+    obdMenuShowItem(sm->pOBD, x, 0, szTemp, 0, 0, sm->iFontSize, 0); // show title
+    iFirst = 0;
+    iLast = iCount-1;
+  }
+  if (sm->iMenuIndex >= iCount) // needs to scroll up
+     iStart = sm->iMenuIndex - (iCount-1);
+  if (sm->iMenuIndex < 0 || sm->iMenuIndex+iCount > sm->iMenuLen) { // invalid
+     sm->iMenuIndex = 0;
+     iStart = 0;
+  }
+
+  for (i=iFirst; i<=iLast && i+iStart < sm->iMenuLen; i++) // draw the visible menu lines
+  {
+    x = obdMenuGetItem(sm, i + iStart + 1, szTemp);
+    if (x >= 0) // display if valid
+       obdMenuShowItem(sm->pOBD, x, i+1, szTemp, (i+iStart == sm->iMenuIndex), (iFirst==iLast), sm->iFontSize, (iFirst==iLast));
+  }
+  if (iItem == -1) // now the display it in one shot
+    obdDumpBuffer(sm->pOBD, NULL);
+} /* obdMenuShow() */
+
+//
+// Set a callback function to return custom info/status
+// for each menu item
+//
+void obdMenuSetCallback(SIMPLEMENU *sm, SIMPLECALLBACK pfnCallBack)
+{
+  if (sm != NULL)
+    sm->pfnCallback = pfnCallBack;
+} /* obdMenuSetCallback() */
+//
+// Display the text of a single menu item
+// optionally erases what's under it to prevent left-over text when the length changes
+//
+void obdMenuShowItem(OBDISP *pOBD, int x, int y, char *szText, int bInvert, int bErase, int iFontSize, int bRender)
+{
+  static char *szBlank = (char *)"                      ";
+  if (bErase)
+    obdWriteString(pOBD, 0, 0, y, szBlank, iFontSize, 0, bRender); // erase old info
+  obdWriteString(pOBD, 0, x, y, szText, iFontSize, bInvert, bRender);
+} /* obdMenuShowItem() */
+
+//
+// Flash a menu item when it is selected
+//
+static void obdMenuFlash(SIMPLEMENU *sm, int iItem)
+{
+int x, y, i, iCount;
+char szTemp[64];
+
+  iCount = (sm->iDispY / 8) - 1; // DEBUG - number of visible menu lines
+  y = iItem+1;
+  if (y > iCount) // max bottom line
+     y = iCount;
+
+  x = obdMenuGetItem(sm, iItem+1, szTemp);
+  if (x < 0) return; // invalid request
+
+  for (i=0; i<3; i++)
+  {
+    obdMenuShowItem(sm->pOBD, x, y, szTemp, 0, 0, sm->iFontSize, 1); // show non-inverted
+    delay(200);
+    obdMenuShowItem(sm->pOBD, x, y, szTemp, 1, 0, sm->iFontSize, 1); // show inverted
+    delay(200);
+  }
+} /* obdMenuFlash() */
+
+//
+// Change the menu index incrementally
+// redraws the minimum amount of screen to show the new info
+// (this prevents flicker/flash and saves battery life)
+// returns the new menu index
+//
+int obdMenuDelta(SIMPLEMENU *sm, int iDelta)
+{
+  int i, x, iNewIndex, iCount;
+  int iStart1, iStart2;
+  char szTemp[64];
+
+  if (iDelta == 0) return sm->iMenuIndex; // nothing to do
+  
+  iNewIndex = sm->iMenuIndex + iDelta;
+  if (!sm->bOneButton && (iNewIndex < 0 || iNewIndex >= sm->iMenuLen)) // no change possible, exit
+     return sm->iMenuIndex; // unchanged
+  // If we are using a single button, wrap around the ends
+  if (iNewIndex < 0) iNewIndex = (sm->iMenuLen - 1);
+  else if (iNewIndex > sm->iMenuLen-1) iNewIndex = 0;
+     
+  iCount = (sm->iDispY / 8) - 1; // DEBUG - number of visible menu lines
+  iStart1 = iStart2 = 0;
+  if (sm->iMenuIndex > iCount-1)
+     iStart1 = sm->iMenuIndex - (iCount-1);
+  if (iNewIndex > iCount-1) // needs to scroll up
+     iStart2 = iNewIndex - (iCount-1);
+  if (iStart1 != iStart2) // need to redraw all items
+  {
+    for (i=0; i<iCount; i++)
+    {
+      x = obdMenuGetItem(sm, i+iStart2+1, szTemp);
+      if (x >= 0)
+         obdMenuShowItem(sm->pOBD, x, i+1, szTemp, (i+iStart2 == iNewIndex), 1, sm->iFontSize, 0);
+    }
+    obdDumpBuffer(sm->pOBD, NULL);
+  }
+  else // need to redraw only the new and old items
+  {
+      i = sm->iMenuIndex - iStart1;
+      x = obdMenuGetItem(sm, sm->iMenuIndex+1, szTemp);
+      if (x >= 0)
+         obdMenuShowItem(sm->pOBD, x, i+1, szTemp, 0, 0, sm->iFontSize, 1);
+      i = iNewIndex - iStart2;
+      x = obdMenuGetItem(sm, iNewIndex+1, szTemp);
+      if (x >= 0)
+         obdMenuShowItem(sm->pOBD, x, i+1, szTemp, 1, 0, sm->iFontSize, 1);
+  }
+  sm->iMenuIndex = iNewIndex;
+  return iNewIndex;
+} /* obdMenuDelta() */
+
+//
+// With the given setup, check for button presses
+// and act accordingly
+// returns -1 for normal interactions and the menu item index if the user presses the ENTER button
+//
+// time in milliseconds for a long press
+#define MENU_LONG_PRESS 600
+int obdMenuRun(SIMPLEMENU *sm)
+{
+uint8_t buttons = 0;
+unsigned long ul;
+int iDelta, rc = -1;
+
+  if (sm->bIsRotary) { // read the rotary encoder
+    if (digitalRead(sm->u8Enter) == sm->iPressed) {
+       buttons |= 1; // pressed
+       if (buttons != sm->u8BtnState)
+          rc = sm->iMenuIndex; // user pressed ENTER, return current menu index
+    } else { // check for rotary encoder activity
+      iDelta = obdMenuReadRotary(sm);
+      obdMenuDelta(sm, iDelta);
+    }
+    sm->u8BtnState = buttons;
+  } else {
+// check the button states
+    if (digitalRead(sm->u8Up) == sm->iPressed)
+       buttons |= 1;
+    if (buttons != sm->u8BtnState) // something changed
+    {
+      if (sm->bOneButton) // different logic for a single button system
+      {
+        if (sm->u8BtnState == 0 && buttons == 1) // up button just pressed
+        {
+           sm->ulPressTime = millis(); // record the press time
+        }
+        if (sm->u8BtnState == 1 && buttons == 0) // up button just released
+        {
+          ul = millis() - sm->ulPressTime;
+          if (ul < MENU_LONG_PRESS) // short press = navigate menu
+            obdMenuDelta(sm, 1);
+          else // treat it like a long press
+            rc = sm->iMenuIndex; // action
+        }
+      }
+      else // 3 button setup (UP/DOWN/ENTER)
+      {
+        if (digitalRead(sm->u8Dn) == sm->iPressed)
+           buttons |= 2;
+        if (digitalRead(sm->u8Enter) == sm->iPressed)
+           rc = sm->iMenuIndex; // user pressed ENTER, return current menu index
+        if ((sm->u8BtnState & 1) == 0 && (buttons & 1) == 1) // Up button pressed
+        {
+          obdMenuDelta(sm, -1);
+        }
+        if ((sm->u8BtnState & 2) == 0 && (buttons & 2) == 2) // Down button pressed
+        {
+          obdMenuDelta(sm, 1);
+        }
+      }
+      sm->u8BtnState = buttons; // save the latest state
+    }
+  }
+  if (rc != -1) // selected
+     obdMenuFlash(sm, sm->iMenuIndex);
+  return rc;
+} /* obdMenuRun() */
+#endif // !_LINUX_
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.h
new file mode 100644
index 00000000..08cc4bc1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/OneBitDisplay.h
@@ -0,0 +1,390 @@
+#ifndef __ONEBITDISPLAY__
+#define __ONEBITDISPLAY__
+
+// Proportional font data taken from Adafruit_GFX library
+/// Font data stored PER GLYPH
+#if !defined( _ADAFRUIT_GFX_H ) && !defined( _GFXFONT_H_ )
+#define _GFXFONT_H_
+typedef struct {
+  uint16_t bitmapOffset; ///< Pointer into GFXfont->bitmap
+  uint8_t width;         ///< Bitmap dimensions in pixels
+  uint8_t height;        ///< Bitmap dimensions in pixels
+  uint8_t xAdvance;      ///< Distance to advance cursor (x axis)
+  int8_t xOffset;        ///< X dist from cursor pos to UL corner
+  int8_t yOffset;        ///< Y dist from cursor pos to UL corner
+} GFXglyph;
+
+/// Data stored for FONT AS A WHOLE
+typedef struct {
+  uint8_t *bitmap;  ///< Glyph bitmaps, concatenated
+  GFXglyph *glyph;  ///< Glyph array
+  uint8_t first;    ///< ASCII extents (first char)
+  uint8_t last;     ///< ASCII extents (last char)
+  uint8_t yAdvance; ///< Newline distance (y axis)
+} GFXfont;
+#endif // _ADAFRUIT_GFX_H
+
+typedef struct obdstruct
+{
+uint8_t oled_addr; // requested address or 0xff for automatic detection
+uint8_t wrap, flip, invert, type;
+uint8_t *ucScreen;
+int iCursorX, iCursorY;
+int width, height;
+int iScreenOffset;
+//BBI2C bbi2c;
+uint8_t com_mode; // communication mode (I2C / SPI)
+uint8_t mode; // data/command mode for 9-bit SPI
+uint8_t iDCPin, iMOSIPin, iCLKPin, iCSPin;
+uint8_t iLEDPin; // backlight
+uint8_t bBitBang;
+} OBDISP;
+
+typedef char * (*SIMPLECALLBACK)(int iMenuItem);
+
+typedef struct smenu {
+  uint8_t u8Up, u8Dn, u8Enter; // button pin numbers
+  uint8_t bIsRotary; // rotary encoder or up/down buttons?
+  uint8_t bCenter; // center all menu text if true
+  uint8_t u8BtnState; // state of all buttons
+  uint8_t bOneButton; // flag indicating the menu operates from a single button
+  uint8_t prevNextCode; // rotary encoder state machine
+  int iMenuIndex; // current menu index
+  int iMenuLen; // number of entries in the menu (calculated at startup)
+  char **pMenuText; // string array with menu title and text
+  int iFontSize;
+  int iPressed; // polarity of button pressed state
+  unsigned long ulPressTime; // time in millis when button was pressed
+  int iDispX, iDispY; // display width/height in pixels
+  SIMPLECALLBACK pfnCallback;
+  OBDISP *pOBD; // display structureme
+  uint16_t store;
+} SIMPLEMENU;
+
+// Make the Linux library interface C instead of C++
+#if defined(_LINUX_) && defined(__cplusplus)
+extern "C" {
+#endif
+
+#if !defined(BITBANK_LCD_MODES)
+#define BITBANK_LCD_MODES
+typedef enum
+{
+ MODE_DATA = 0,
+ MODE_COMMAND
+} DC_MODE;
+#endif
+
+typedef enum
+{
+  COM_I2C = 0,
+  COM_SPI,
+} COM_MODE;
+
+typedef enum
+{
+  ROT_0 = 0,
+  ROT_90,
+  ROT_180,
+  ROT_270
+} FONT_ROTATION;
+
+// These are defined the same in my SPI_LCD library
+#ifndef SPI_LCD_H
+
+// 5 possible font sizes: 8x8, 16x32, 6x8, 12x16 (stretched from 6x8 with smoothing), 16x16 (stretched from 8x8)
+enum {
+   FONT_6x8 = 0,
+   FONT_8x8,
+   FONT_12x16,
+   FONT_16x16,
+   FONT_16x32,
+   FONT_COUNT
+};
+// For backwards compatibility, keep the old names valid
+#define FONT_NORMAL FONT_8x8
+#define FONT_SMALL FONT_6x8
+#define FONT_STRETCHED FONT_16x16
+#define FONT_LARGE FONT_16x32
+#endif
+
+// Display type for init function
+enum {
+  OLED_128x128 = 1,
+  OLED_128x32,
+  OLED_128x64,
+  OLED_132x64,
+  OLED_64x128,
+  OLED_64x32,
+  OLED_96x16,
+  OLED_72x40,
+  LCD_UC1701,
+  LCD_UC1609,
+  LCD_HX1230,
+  LCD_NOKIA5110,
+  LCD_VIRTUAL,
+  SHARP_144x168,
+  SHARP_400x240
+};
+
+// Rotation and flip angles to draw tiles
+enum {
+  ANGLE_0=0,
+  ANGLE_90,
+  ANGLE_180,
+  ANGLE_270,
+  ANGLE_FLIPX,
+  ANGLE_FLIPY
+};
+
+// Return value from obd obdI2CInit()
+enum {
+  OLED_NOT_FOUND = -1, // no display found
+  OLED_SSD1306_3C,  // SSD1306 found at 0x3C
+  OLED_SSD1306_3D,  // SSD1306 found at 0x3D
+  OLED_SH1106_3C,   // SH1106 found at 0x3C
+  OLED_SH1106_3D,   // SH1106 found at 0x3D
+  OLED_SH1107_3C,  // SH1107
+  OLED_SH1107_3D,
+  LCD_OK,
+  LCD_ERROR
+};
+//
+// Create a virtual display of any size
+// The memory buffer must be provided at the time of creation
+//
+void obdCreateVirtualDisplay(OBDISP *pOBD, int width, int height, uint8_t *buffer);
+// Constants for the obdCopy() function
+// Output format options -
+#define OBD_LSB_FIRST     0x001
+#define OBD_MSB_FIRST     0x002
+#define OBD_VERT_BYTES    0x004
+#define OBD_HORZ_BYTES    0x008
+// Orientation options -
+#define OBD_ROTATE_90     0x010
+#define OBD_FLIP_VERT     0x020
+#define OBD_FLIP_HORZ     0x040
+#define OBD_INVERT        0x080
+// Copy the current bitmap buffer from its native form (LSB_FIRST, VERTICAL_BYTES) to the requested form
+// A copy of the same format will just do a memcpy
+int obdCopy(OBDISP *pOBD, int iFlags, uint8_t *pDestination);
+//
+// Draw the contents of a memory buffer onto a display
+// The sub-window will be clipped if it specifies too large an area
+// for the destination display. The source OBDISP structure must have
+// a valid back buffer defined
+// The top and bottom destination edges will be drawn on byte boundaries (8 rows)
+// The source top/bot edges can be on pixel boundaries
+//
+void obdDumpWindow(OBDISP *pOBDSrc, OBDISP *pOBDDest, int srcx, int srcy, int destx, int desty, int width, int height);
+//
+// Write a single line to a Sharp memory LCD
+// You must provide the exact number of bytes needed for a complete line
+// e.g. for the 144x168 display, pSrc must provide 144 pixels (18 bytes)
+//
+void obdWriteLCDLine(OBDISP *pOBD, uint8_t *pSrc, int iLine);
+//
+// Initializes the display controller into "page mode" on I2C
+// If SDAPin and SCLPin are not -1, then bit bang I2C on those pins
+// Otherwise use the Wire library.
+// If you don't need to use a separate reset pin, set it to -1
+//
+int obdI2CInit(OBDISP *pOBD, int iType, int iAddr, int bFlip, int bInvert, int bWire, int iSDAPin, int iSCLPin, int iResetPin, int32_t iSpeed);
+//
+// Initialize an SPI version of the display
+//
+void obdSPIInit(OBDISP *pOBD, int iType, int iDC, int iCS, int iReset, int iMOSI, int iCLK, int iLED, int bFlip, int bInvert, int iBitBang, int32_t iSpeed);
+
+//
+// Set the memory configuration to display the pixels at 0 or 180 degrees (flipped)
+// pass true (1) to flip 180, false (0) to set to 0
+void obdSetFlip(OBDISP *pOBD, int iOnOff);
+//
+// Provide or revoke a back buffer for your OLED graphics
+// This allows you to manage the RAM used by ss_oled on tiny
+// embedded platforms like the ATmega series
+// Pass NULL to revoke the buffer. Make sure you provide a buffer
+// large enough for your display (e.g. 128x64 needs 1K - 1024 bytes)
+//
+void obdSetBackBuffer(OBDISP *pOBD, uint8_t *pBuffer);
+//
+// Sets the brightness (0=off, 255=brightest)
+//
+void obdSetContrast(OBDISP *pOBD, unsigned char ucContrast);
+//
+// Load a 1-bpp Windows bitmap
+// Pass the pointer to the beginning of the BMP file
+// First pass version assumes a full screen bitmap
+//
+int obdLoadBMP(OBDISP *pOBD, uint8_t *pBMP, int x, int y, int bInvert);
+//
+// Power up/down the display
+// useful for low power situations
+//
+void obdPower(OBDISP *pOBD, int bOn);
+//
+// Set the current cursor position
+// The column represents the pixel column (0-127)
+// The row represents the text row (0-7)
+//
+void obdSetCursor(OBDISP *pOBD, int x, int y);
+
+//
+// Turn text wrap on or off for the obdWriteString() function
+//
+void obdSetTextWrap(OBDISP *pOBD, int bWrap);
+//
+// Draw a string of normal (8x8), small (6x8) or large (16x32) characters
+// At the given col+row with the given scroll offset. The scroll offset allows you to
+// horizontally scroll text which does not fit on the width of the display. The offset
+// represents the pixels to skip when drawing the text. An offset of 0 starts at the beginning
+// of the text.
+// The system remembers where the last text was written (the cursor position)
+// To continue writing from the last position, set the x,y values to -1
+// The text can optionally wrap around to the next line by calling oledSetTextWrap(true);
+// otherwise text which would go off the right edge will not be drawn and the cursor will
+// be left "off screen" until set to a new position explicitly
+//
+//  Returns 0 for success, -1 for invalid parameter
+//
+int obdWriteString(OBDISP *pOBD, int iScrollX, int x, int y, char *szMsg, int iSize, int bInvert, int bRender);
+//
+// Draw a string with a fractional scale in both dimensions
+// the scale is a 16-bit integer with and 8-bit fraction and 8-bit mantissa
+// To draw at 1x scale, set the scale factor to 256. To draw at 2x, use 512
+// The output must be drawn into a memory buffer, not directly to the display
+// The string can be drawn in one of 4 rotations (ROT_0, ROT_90, ROT_180, ROT_270)
+//
+int obdScaledString(OBDISP *pOBD, int x, int y, char *szMsg, int iSize, int bInvert, int iXScale, int iYScale, int iRotation);
+//
+// Draw a string in a proportional font you supply
+// Requires a back buffer
+//
+int obdWriteStringCustom(OBDISP *pOBD, GFXfont *pFont, int x, int y, char *szMsg, uint8_t ucColor);
+//
+// Get the width of text in a custom font
+//
+void obdGetStringBox(GFXfont *pFont, char *szMsg, int *width, int *top, int *bottom);
+//
+// Fill the frame buffer with a byte pattern
+// e.g. all off (0x00) or all on (0xff)
+//
+void obdFill(OBDISP *pOBD, unsigned char ucData, int bRender);
+//
+// Set (or clear) an individual pixel
+// The local copy of the frame buffer is used to avoid
+// reading data from the display controller
+// (which isn't possible in most configurations)
+// This function needs the USE_BACKBUFFER macro to be defined
+// otherwise, new pixels will erase old pixels within the same byte
+//
+int obdSetPixel(OBDISP *pOBD, int x, int y, unsigned char ucColor, int bRender);
+//
+// Dump an entire custom buffer to the display
+// useful for custom animation effects
+//
+void obdDumpBuffer(OBDISP *pOBD, uint8_t *pBuffer);
+//
+// Render a window of pixels from a provided buffer or the library's internal buffer
+// to the display. The row values refer to byte rows, not pixel rows due to the memory
+// layout of OLEDs. Pass a src pointer of NULL to use the internal backing buffer
+// returns 0 for success, -1 for invalid parameter
+//
+int obdDrawGFX(OBDISP *pOBD, uint8_t *pSrc, int iSrcCol, int iSrcRow, int iDestCol, int iDestRow, int iWidth, int iHeight, int iSrcPitch);
+
+//
+// Draw a line between 2 points
+//
+void obdDrawLine(OBDISP *pOBD, int x1, int y1, int x2, int y2, uint8_t ucColor, int bRender);
+//
+// Play a frame of animation data
+// The animation data is assumed to be encoded for a full frame of the display
+// Given the pointer to the start of the compressed data,
+// it returns the pointer to the start of the next frame
+// Frame rate control is up to the calling program to manage
+// When it finishes the last frame, it will start again from the beginning
+//
+uint8_t * obdPlayAnimFrame(OBDISP *pOBD, uint8_t *pAnimation, uint8_t *pCurrent, int iLen);
+void obdWriteCommand(OBDISP *pOBD, unsigned char c);
+void obdSetPosition(OBDISP *pOBD, int x, int y, int bRender);
+void obdWriteDataBlock(OBDISP *pOBD, unsigned char *ucBuf, int iLen, int bRender);
+//
+// Scroll the internal buffer by 1 scanline (up/down)
+// width is in pixels, lines is group of 8 rows
+// Returns 0 for success, -1 for invalid parameter
+//
+int obdScrollBuffer(OBDISP *pOBD, int iStartCol, int iEndCol, int iStartRow, int iEndRow, int bUp);
+//
+// Draw a sprite of any size in any position
+// If it goes beyond the left/right or top/bottom edges
+// it's trimmed to show the valid parts
+// This function requires a back buffer to be defined
+// The priority color (0 or 1) determines which color is painted 
+// when a 1 is encountered in the source image.
+// e.g. when 0, the input bitmap acts like a mask to clear
+// the destination where bits are set.
+//
+void obdDrawSprite(OBDISP *pOBD, uint8_t *pSprite, int cx, int cy, int iPitch, int x, int y, uint8_t iPriority);
+//
+// Draw a 16x16 tile in any of 4 rotated positions
+// Assumes input image is laid out like "normal" graphics with
+// the MSB on the left and 2 bytes per line
+// On AVR, the source image is assumed to be in FLASH memory
+// The function can draw the tile on byte boundaries, so the x value
+// can be from 0 to 112 and y can be from 0 to 6
+//
+void obdDrawTile(OBDISP *pOBD, const uint8_t *pTile, int x, int y, int iRotation, int bInvert, int bRender);
+//
+// Draw an outline or filled ellipse
+//
+void obdEllipse(OBDISP *pOBD, int iCenterX, int iCenterY, int32_t iRadiusX, int32_t iRadiusY, uint8_t ucColor, uint8_t bFilled);
+//
+// Draw an outline or filled rectangle
+//
+void obdRectangle(OBDISP *pOBD, int x1, int y1, int x2, int y2, uint8_t ucColor, uint8_t bFilled);
+
+//
+// Turn the LCD backlight on or off
+//
+void obdBacklight(OBDISP *pODB, int bOn);
+
+//
+// Menu functions
+//
+// Initialize the simple menu structure
+//
+int obdMenuInit(OBDISP *pOBD, SIMPLEMENU *sm, char **pText, int iFontSize, int bCenter, int btnUp, int btnDn, int btnEnter, int iPressedState, int bIsRotary);
+//
+// Erase the display and show the given menu
+//
+void obdMenuShow(SIMPLEMENU *sm, int iItem);
+//
+// Set a callback function to return custom info/status
+// for each menu item
+//
+void obdMenuSetCallback(SIMPLEMENU *sm, SIMPLECALLBACK pfnCallBack);
+//
+// Display the text of a single menu item
+// optionally erases what's under it to prevent left-over text when the length changes
+//
+void obdMenuShowItem(OBDISP *pOBD, int x, int y, char *szText, int bInvert, int bErase, int iFontSize, int bRender);
+//
+// Change the menu index incrementally
+// redraws the minimum amount of screen to show the new info
+// (this prevents flicker/flash and saves battery life)
+// returns the new menu index
+//
+int obdMenuDelta(SIMPLEMENU *sm, int iDelta);
+//
+// With the given setup, check for button presses
+// and act accordingly
+// returns -1 for normal interactions and the menu item index if the user presses the ENTER button
+//
+int obdMenuRun(SIMPLEMENU *sm);
+
+#if defined(_LINUX_) && defined(__cplusplus)
+}
+#endif // _LINUX_
+
+#endif // __ONEBITDISPLAY__
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/Roboto_Black_80.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/Roboto_Black_80.h
new file mode 100644
index 00000000..8cd31e12
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/Roboto_Black_80.h
@@ -0,0 +1,200 @@
+// Created by http://oleddisplay.squix.ch/ Consider a donation
+// In case of problems make sure that you are using the font file with the correct version!
+const uint8_t Roboto_Black_80Bitmaps[] = {
+
+	// Bitmap Data:
+	0x00, // ' '
+	0xFF,0xFC,0xFF,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xFC,0x7F,0xF8,0x7F,0xF8,0x7F,0xF8,0x7F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x3F,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x0F,0xC0,0x3F,0xF0,0x7F,0xF8,0x7F,0xFC,0xFF,0xFC,0xFF,0xFE,0xFF,0xFE,0xFF,0xFE,0xFF,0xFC,0x7F,0xFC,0x7F,0xF8,0x3F,0xF0,0x0F,0xC0, // '!'
+	0xFF,0x83,0xFE,0xFF,0x83,0xFE,0xFF,0x83,0xFE,0xFF,0x83,0xFE,0xFF,0x83,0xFE,0xFF,0x83,0xFE,0xFF,0x83,0xFC,0xFF,0x83,0xFC,0xFF,0x83,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xFC,0xFF,0x03,0xF8,0xFF,0x03,0xF8,0xFF,0x03,0xF8,0xFE,0x03,0xF8,0xFE,0x03,0xF8,0xFE,0x03,0xF8, // '"'
+	0x00,0x01,0xFE,0x07,0xF8,0x00,0x00,0x0F,0xF0,0x3F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00,0x1F,0xC0,0x7F,0x80,0x00,0x01,0xFE,0x03,0xF8,0x00,0x00,0x0F,0xF0,0x3F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00,0x1F,0xE0,0x7F,0x80,0x00,0x00,0xFE,0x03,0xFC,0x00,0x00,0x07,0xF0,0x1F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00,0x1F,0xE0,0x7F,0x80,0x00,0x00,0xFF,0x03,0xFC,0x00,0x00,0x07,0xF8,0x1F,0xE0,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0x87,0xFF,0xFF,0xFF,0xFF,0xFC,0x3F,0xFF,0xFF,0xFF,0xFF,0xE1,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFE,0x00,0x1F,0xE0,0x7F,0x80,0x00,0x00,0xFF,0x03,0xFC,0x00,0x00,0x07,0xF8,0x1F,0xE0,0x00,0x00,0x3F,0xC0,0xFF,0x00,0x00,0x01,0xFE,0x07,0xF8,0x00,0x00,0x0F,0xE0,0x3F,0x80,0x00,0x00,0xFF,0x03,0xFC,0x00,0x00,0x07,0xF8,0x1F,0xE0,0x00,0x00,0x3F,0xC0,0xFF,0x00,0x00,0x01,0xFE,0x07,0xF8,0x00,0x3F,0xFF,0xFF,0xFF,0xFF,0xE1,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x03,0xF8,0x0F,0xE0,0x00,0x00,0x3F,0xC0,0xFF,0x00,0x00,0x01,0xFE,0x07,0xF8,0x00,0x00,0x0F,0xF0,0x3F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00,0x1F,0xC0,0x7F,0x00,0x00,0x01,0xFE,0x07,0xF8,0x00,0x00,0x0F,0xF0,0x3F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00,0x1F,0xE0,0x7F,0x80,0x00,0x00,0xFE,0x03,0xF8,0x00,0x00,0x0F,0xF0,0x3F,0xC0,0x00,0x00,0x7F,0x81,0xFE,0x00,0x00,0x03,0xFC,0x0F,0xF0,0x00,0x00, // '#'
+	0x00,0x00,0x3F,0x80,0x00,0x00,0x00,0x1F,0xC0,0x00,0x00,0x00,0x0F,0xE0,0x00,0x00,0x00,0x07,0xF0,0x00,0x00,0x00,0x03,0xF8,0x00,0x00,0x00,0x01,0xFC,0x00,0x00,0x00,0x00,0xFE,0x00,0x00,0x00,0x00,0x7F,0x00,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFE,0x00,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFF,0xFF,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xF0,0x7F,0xFF,0x03,0xFF,0xF0,0x0F,0xFF,0xC3,0xFF,0xF0,0x07,0xFF,0xE1,0xFF,0xF8,0x01,0xFF,0xF0,0xFF,0xFC,0x00,0xFF,0xFC,0x7F,0xFC,0x00,0x3F,0xFE,0x3F,0xFE,0x00,0x1F,0xFF,0x1F,0xFF,0x00,0x0F,0xFF,0x8F,0xFF,0xC0,0x07,0xFF,0xC7,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xFF,0x80,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x3F,0xFF,0xFE,0x00,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0x03,0xFF,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xFF,0x80,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xFE,0x00,0x00,0x00,0xFF,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x1F,0xFF,0xBF,0xFE,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x07,0xFF,0xEF,0xFF,0xC0,0x03,0xFF,0xF3,0xFF,0xE0,0x01,0xFF,0xF9,0xFF,0xF8,0x00,0xFF,0xF8,0xFF,0xFE,0x00,0xFF,0xFC,0x3F,0xFF,0xC1,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFF,0x07,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFF,0x80,0x0F,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0x80,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x00,0x7F,0xF8,0x00,0x00,0x00,0x07,0xE0,0x00,0x00,0x00,0x03,0xF0,0x00,0x00,0x00,0x01,0xF8,0x00,0x00,0x00,0x00,0xFC,0x00,0x00,0x00,0x00,0x7E,0x00,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x00,0x1F,0x80,0x00,0x00,0x00,0x0F,0xC0,0x00,0x00, // '$'
+	0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x03,0xFF,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0xF8,0x00,0x00,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0xFF,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x20,0x00,0x1F,0xF8,0x7F,0xE0,0x03,0xC0,0x00,0xFF,0x81,0xFF,0x00,0x1F,0x80,0x07,0xF8,0x07,0xFC,0x01,0xFF,0x00,0x3F,0xC0,0x3F,0xE0,0x0F,0xF0,0x01,0xFE,0x01,0xFF,0x00,0xFF,0x00,0x0F,0xF0,0x0F,0xF8,0x0F,0xF0,0x00,0x7F,0x80,0x7F,0xC0,0x7F,0x80,0x03,0xFC,0x03,0xFE,0x07,0xF8,0x00,0x1F,0xE0,0x1F,0xF0,0x7F,0xC0,0x00,0xFF,0x00,0xFF,0x83,0xFC,0x00,0x07,0xFC,0x0F,0xFC,0x3F,0xC0,0x00,0x3F,0xF0,0xFF,0xC1,0xFE,0x00,0x00,0xFF,0xFF,0xFE,0x1F,0xE0,0x00,0x07,0xFF,0xFF,0xE1,0xFF,0x00,0x00,0x1F,0xFF,0xFF,0x0F,0xF0,0x00,0x00,0x7F,0xFF,0xF0,0xFF,0x00,0x00,0x01,0xFF,0xFF,0x07,0xF8,0x00,0x00,0x07,0xFF,0xE0,0x7F,0x80,0x00,0x00,0x07,0xFC,0x07,0xF8,0x00,0x00,0x00,0x00,0x00,0x3F,0xC0,0x00,0x00,0x00,0x00,0x03,0xFC,0x00,0x00,0x00,0x00,0x00,0x3F,0xE0,0x00,0x00,0x00,0x00,0x01,0xFE,0x00,0x00,0x00,0x00,0x00,0x1F,0xE0,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x0F,0xF0,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0xFF,0x00,0x00,0x00,0x07,0xF8,0x3F,0xFF,0x00,0x00,0x00,0x7F,0x83,0xFF,0xFE,0x00,0x00,0x03,0xFC,0x3F,0xFF,0xF8,0x00,0x00,0x3F,0xC3,0xFF,0xFF,0xE0,0x00,0x03,0xFC,0x3F,0xFF,0xFF,0x00,0x00,0x1F,0xE1,0xFF,0xFF,0xFC,0x00,0x01,0xFE,0x1F,0xF8,0x7F,0xE0,0x00,0x1F,0xF0,0xFF,0x81,0xFF,0x80,0x00,0xFF,0x07,0xF8,0x07,0xFC,0x00,0x0F,0xF0,0x3F,0xC0,0x3F,0xE0,0x00,0x7F,0x81,0xFE,0x01,0xFF,0x00,0x07,0xF8,0x0F,0xF0,0x0F,0xF8,0x00,0x7F,0x80,0x7F,0x80,0x7F,0xC0,0x03,0xFC,0x03,0xFC,0x03,0xFE,0x00,0x3F,0xC0,0x1F,0xE0,0x1F,0xF0,0x03,0xFE,0x00,0xFF,0x00,0xFF,0x80,0x1F,0xE0,0x07,0xFC,0x07,0xFC,0x00,0x7E,0x00,0x3F,0xF0,0x7F,0xC0,0x00,0xF0,0x00,0xFF,0xFF,0xFE,0x00,0x01,0x00,0x07,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x1F,0xFF,0xFF,0x00,0x00,0x00,0x00,0x7F,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xFF,0x00,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x00,0x07,0xFC,0x00, // '%'
+	0x00,0x00,0x7F,0xC0,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x00,0x01,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x00,0x07,0xFF,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xE1,0xFF,0xF0,0x00,0x00,0x3F,0xFC,0x0F,0xFF,0x00,0x00,0x07,0xFF,0x80,0x7F,0xF0,0x00,0x00,0x7F,0xF8,0x07,0xFF,0x00,0x00,0x07,0xFF,0x80,0x3F,0xF0,0x00,0x00,0x7F,0xF8,0x03,0xFF,0x00,0x00,0x07,0xFF,0x80,0x7F,0xF0,0x00,0x00,0x7F,0xF8,0x07,0xFF,0x00,0x00,0x03,0xFF,0x80,0xFF,0xE0,0x00,0x00,0x3F,0xFC,0x1F,0xFE,0x00,0x00,0x03,0xFF,0xC3,0xFF,0xC0,0x00,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x07,0xFF,0xFF,0xC0,0x00,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x00,0x03,0xFF,0xFE,0x00,0x00,0x00,0x00,0x7F,0xFF,0xC0,0x00,0x00,0x00,0x0F,0xFF,0xFC,0x00,0xFF,0xE0,0x01,0xFF,0xFF,0xE0,0x0F,0xFE,0x00,0x3F,0xFF,0xFF,0x00,0xFF,0xE0,0x07,0xFF,0xFF,0xF0,0x0F,0xFE,0x00,0xFF,0xFF,0xFF,0x80,0xFF,0xE0,0x1F,0xFF,0xFF,0xFC,0x0F,0xFE,0x03,0xFF,0xFF,0xFF,0xE1,0xFF,0xE0,0x3F,0xFE,0x7F,0xFF,0x1F,0xFE,0x07,0xFF,0xC3,0xFF,0xF9,0xFF,0xC0,0x7F,0xFC,0x1F,0xFF,0xFF,0xFC,0x07,0xFF,0xC1,0xFF,0xFF,0xFF,0xC0,0xFF,0xF8,0x0F,0xFF,0xFF,0xFC,0x0F,0xFF,0x80,0x7F,0xFF,0xFF,0x80,0xFF,0xF8,0x03,0xFF,0xFF,0xF8,0x0F,0xFF,0xC0,0x1F,0xFF,0xFF,0x80,0xFF,0xFC,0x00,0xFF,0xFF,0xF0,0x0F,0xFF,0xC0,0x07,0xFF,0xFF,0x00,0x7F,0xFE,0x00,0x7F,0xFF,0xE0,0x07,0xFF,0xF0,0x03,0xFF,0xFC,0x00,0x7F,0xFF,0x81,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0xFF,0xFF,0xFF,0xF0,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x1F,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFB,0xFF,0xF0,0x00,0xFF,0xFF,0xFE,0x3F,0xFF,0x80,0x03,0xFF,0xFF,0x01,0xFF,0xFC,0x00,0x03,0xFF,0x80,0x00,0x00,0x20, // '&'
+	0xFF,0xDF,0xFB,0xFF,0x7F,0xEF,0xFD,0xFF,0xBF,0xF7,0xFE,0xFF,0xDF,0xFB,0xFE,0x7F,0xCF,0xF9,0xFF,0x3F,0xE7,0xFC,0xFF,0x9F,0xF3,0xFE,0x7F,0xCF,0xF9,0xFF,0x00, // '''
+	0x00,0x00,0x20,0x00,0x01,0xE0,0x00,0x07,0xC0,0x00,0x3F,0x80,0x00,0xFF,0x80,0x03,0xFF,0x00,0x0F,0xFF,0x00,0x1F,0xF8,0x00,0x7F,0xE0,0x01,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFC,0x00,0x3F,0xF0,0x00,0x7F,0xE0,0x01,0xFF,0x80,0x03,0xFF,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x7F,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x07,0xFE,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x03,0xFF,0x00,0x07,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x03,0xFF,0x00,0x07,0xFE,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x3F,0xF0,0x00,0x7F,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x03,0xFF,0x00,0x07,0xFE,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x3F,0xF0,0x00,0x7F,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x03,0xFF,0x80,0x07,0xFF,0x00,0x07,0xFE,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x3F,0xF0,0x00,0x7F,0xF0,0x00,0x7F,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0x80,0x01,0xFF,0x80,0x03,0xFF,0x00,0x07,0xFE,0x00,0x07,0xFE,0x00,0x0F,0xFC,0x00,0x0F,0xFC,0x00,0x1F,0xF8,0x00,0x1F,0xF8,0x00,0x3F,0xF0,0x00,0x3F,0xF0,0x00,0x7F,0xF0,0x00,0x7F,0xE0,0x00,0x7F,0xE0,0x00,0x7F,0xE0,0x00,0xFF,0xF0,0x00,0xFF,0xC0,0x00,0xFF,0x80,0x00,0xFE,0x00,0x00,0x7C,0x00,0x00,0x78,0x00,0x00,0x20, // '('
+	0x10,0x00,0x00,0x3C,0x00,0x00,0x3E,0x00,0x00,0x3F,0x80,0x00,0x7F,0xC0,0x00,0x7F,0xE0,0x00,0xFF,0xF0,0x00,0x3F,0xF8,0x00,0x1F,0xFC,0x00,0x0F,0xFC,0x00,0x0F,0xFE,0x00,0x07,0xFF,0x00,0x03,0xFF,0x00,0x03,0xFF,0x80,0x01,0xFF,0x80,0x01,0xFF,0xC0,0x00,0xFF,0xC0,0x00,0xFF,0xE0,0x00,0x7F,0xE0,0x00,0x7F,0xF0,0x00,0x7F,0xF0,0x00,0x3F,0xF0,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x0F,0xFE,0x00,0x1F,0xFE,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x3F,0xF8,0x00,0x3F,0xF0,0x00,0x7F,0xF0,0x00,0x7F,0xF0,0x00,0x7F,0xE0,0x00,0xFF,0xE0,0x00,0xFF,0xC0,0x01,0xFF,0xC0,0x01,0xFF,0x80,0x03,0xFF,0x80,0x03,0xFF,0x00,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x0F,0xFC,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0xFF,0xF0,0x00,0x7F,0xE0,0x00,0x7F,0xC0,0x00,0x3F,0x80,0x00,0x3F,0x00,0x00,0x3C,0x00,0x00,0x10,0x00,0x00, // ')'
+	0x00,0x03,0xFC,0x00,0x00,0x00,0x1F,0xE0,0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x07,0xF8,0x00,0x00,0x00,0x3F,0xC0,0x00,0x00,0x01,0xFE,0x00,0x00,0x00,0x07,0xF0,0x00,0x00,0x00,0x3F,0x80,0x00,0x00,0x01,0xFC,0x00,0x01,0xC0,0x0F,0xE0,0x06,0x0F,0x80,0x7F,0x01,0xF0,0x7F,0x83,0xF8,0x3F,0x87,0xFF,0x1F,0x8F,0xFE,0x3F,0xFE,0xFD,0xFF,0xF1,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xC0,0x1F,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0xF8,0x00,0x00,0x0F,0xFC,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0xFF,0xFF,0x00,0x00,0x0F,0xF7,0xF8,0x00,0x00,0xFF,0x9F,0xE0,0x00,0x0F,0xF8,0xFF,0x80,0x00,0x7F,0xC3,0xFE,0x00,0x07,0xFC,0x0F,0xF8,0x00,0x7F,0xC0,0x7F,0xE0,0x07,0xFE,0x01,0xFF,0x00,0x1F,0xE0,0x0F,0xFC,0x00,0x3E,0x00,0x3F,0x00,0x00,0xF0,0x00,0xF0,0x00,0x01,0x00,0x06,0x00,0x00, // '*'
+	0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x07,0xFF,0x80,0x00, // '+'
+	0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFE,0x0F,0xFC,0x0F,0xFC,0x0F,0xFC,0x0F,0xFC,0x1F,0xFC,0x1F,0xF8,0x1F,0xF8,0x3F,0xF0,0x3F,0xF0,0x7F,0xE0,0x7F,0xE0,0xFF,0xC0,0x7F,0x80,0x1F,0x00,0x06,0x00, // ','
+	0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE,0xFF,0xFF,0xFE, // '-'
+	0x0F,0xC0,0x7F,0xE1,0xFF,0xE7,0xFF,0xCF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xF1,0xFF,0xE1,0xFF,0x80,0xFC,0x00, // '.'
+	0x00,0x00,0x1F,0xF8,0x00,0x00,0x7F,0xC0,0x00,0x03,0xFF,0x00,0x00,0x0F,0xFC,0x00,0x00,0x3F,0xE0,0x00,0x00,0xFF,0x80,0x00,0x07,0xFE,0x00,0x00,0x1F,0xF0,0x00,0x00,0x7F,0xC0,0x00,0x03,0xFF,0x00,0x00,0x0F,0xF8,0x00,0x00,0x3F,0xE0,0x00,0x01,0xFF,0x80,0x00,0x07,0xFC,0x00,0x00,0x1F,0xF0,0x00,0x00,0xFF,0xC0,0x00,0x03,0xFE,0x00,0x00,0x0F,0xF8,0x00,0x00,0x7F,0xE0,0x00,0x01,0xFF,0x80,0x00,0x07,0xFC,0x00,0x00,0x1F,0xF0,0x00,0x00,0xFF,0xC0,0x00,0x03,0xFE,0x00,0x00,0x0F,0xF8,0x00,0x00,0x7F,0xE0,0x00,0x01,0xFF,0x00,0x00,0x07,0xFC,0x00,0x00,0x3F,0xF0,0x00,0x00,0xFF,0x80,0x00,0x03,0xFE,0x00,0x00,0x1F,0xF8,0x00,0x00,0x7F,0xC0,0x00,0x01,0xFF,0x00,0x00,0x0F,0xFC,0x00,0x00,0x3F,0xF0,0x00,0x00,0xFF,0x80,0x00,0x03,0xFE,0x00,0x00,0x1F,0xF8,0x00,0x00,0x7F,0xC0,0x00,0x01,0xFF,0x00,0x00,0x0F,0xFC,0x00,0x00,0x3F,0xE0,0x00,0x00,0xFF,0x80,0x00,0x07,0xFE,0x00,0x00,0x1F,0xF0,0x00,0x00,0x7F,0xC0,0x00,0x03,0xFF,0x00,0x00,0x0F,0xF8,0x00,0x00,0x3F,0xE0,0x00,0x01,0xFF,0x80,0x00,0x07,0xFE,0x00,0x00,0x1F,0xF0,0x00,0x00,0x7F,0xC0,0x00,0x03,0xFF,0x00,0x00,0x0F,0xF8,0x00,0x00,0x3F,0xE0,0x00,0x01,0xFF,0x80,0x00,0x07,0xFC,0x00,0x00,0x1F,0xF0,0x00,0x00,0xFF,0xC0,0x00,0x03,0xFE,0x00,0x00,0x00, // '/'
+	0x00,0x01,0xFF,0x80,0x00,0x00,0x07,0xFF,0xF8,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x1F,0xFF,0xFF,0xE0,0x00,0x1F,0xFF,0xFF,0xF8,0x00,0x1F,0xFF,0xFF,0xFE,0x00,0x1F,0xFF,0xFF,0xFF,0x80,0x1F,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xE0,0xFF,0xFE,0x07,0xFF,0xE0,0x1F,0xFF,0x83,0xFF,0xE0,0x07,0xFF,0xC1,0xFF,0xF0,0x03,0xFF,0xE1,0xFF,0xF0,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0x7F,0xFC,0x7F,0xFC,0x00,0x3F,0xFE,0x3F,0xFE,0x00,0x1F,0xFF,0x3F,0xFF,0x00,0x0F,0xFF,0x9F,0xFF,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x07,0xFF,0xDF,0xFF,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x07,0xFF,0xDF,0xFF,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x7F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x3F,0xFE,0x00,0x1F,0xFF,0x1F,0xFF,0x00,0x0F,0xFF,0x8F,0xFF,0x80,0x07,0xFF,0xC7,0xFF,0xC0,0x03,0xFF,0xE1,0xFF,0xF0,0x03,0xFF,0xE0,0xFF,0xF8,0x01,0xFF,0xF0,0x7F,0xFE,0x01,0xFF,0xF8,0x1F,0xFF,0xC3,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xFC,0x01,0xFF,0xFF,0xFF,0xFE,0x00,0x7F,0xFF,0xFF,0xFE,0x00,0x1F,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFE,0x00,0x01,0xFF,0xFF,0xFE,0x00,0x00,0x3F,0xFF,0xFC,0x00,0x00,0x07,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00, // '0'
+	0x00,0x00,0x00,0xE0,0x00,0x00,0x7E,0x00,0x00,0x1F,0xE0,0x00,0x0F,0xFE,0x00,0x07,0xFF,0xE0,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xE0,0x7F,0xFF,0xFE,0x3F,0xFF,0xFF,0xEF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xEF,0xFF,0x7F,0xFE,0xFF,0x87,0xFF,0xEF,0xC0,0x7F,0xFE,0xC0,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x07,0xFF,0xE0, // '1'
+	0x00,0x00,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xFF,0xF0,0x00,0x03,0xFF,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFC,0x1F,0xFF,0xE0,0xFF,0xFC,0x03,0xFF,0xF8,0x7F,0xFE,0x00,0x7F,0xFE,0x1F,0xFF,0x80,0x0F,0xFF,0x87,0xFF,0xC0,0x03,0xFF,0xF3,0xFF,0xF0,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x3F,0xFF,0x3F,0xFE,0x00,0x0F,0xFF,0xCF,0xFF,0x80,0x03,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFE,0x00,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x3F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFE,0x00,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xFE,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xE0, // '2'
+	0x00,0x01,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFE,0x00,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x07,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xE0,0x01,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xFF,0x80,0x7F,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFF,0x87,0xFF,0xF8,0x1F,0xFF,0xE1,0xFF,0xFC,0x01,0xFF,0xFC,0x7F,0xFE,0x00,0x3F,0xFF,0x1F,0xFF,0x00,0x0F,0xFF,0xC7,0xFF,0xC0,0x01,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x01,0xFF,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xFC,0x00,0x00,0x07,0xFF,0xFF,0x80,0x00,0x01,0xFF,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x1F,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x07,0xFF,0xEF,0xFF,0xE0,0x03,0xFF,0xF1,0xFF,0xFC,0x01,0xFF,0xFC,0x7F,0xFF,0x81,0xFF,0xFF,0x1F,0xFF,0xFF,0xFF,0xFF,0x83,0xFF,0xFF,0xFF,0xFF,0xE0,0x7F,0xFF,0xFF,0xFF,0xF0,0x1F,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFE,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x07,0xFF,0xFE,0x00,0x00,0x00,0x1F,0xF8,0x00,0x00, // '3'
+	0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xFF,0x80,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0xFF,0x80,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x01,0xFF,0xFF,0xFE,0x00,0x00,0x3F,0xF7,0xFF,0xC0,0x00,0x0F,0xFE,0xFF,0xF8,0x00,0x03,0xFF,0x9F,0xFF,0x00,0x00,0x7F,0xE3,0xFF,0xE0,0x00,0x1F,0xFC,0x7F,0xFC,0x00,0x03,0xFF,0x0F,0xFF,0x80,0x00,0xFF,0xE1,0xFF,0xF0,0x00,0x3F,0xF8,0x3F,0xFE,0x00,0x07,0xFF,0x07,0xFF,0xC0,0x01,0xFF,0xC0,0xFF,0xF8,0x00,0x7F,0xF0,0x1F,0xFF,0x00,0x0F,0xFE,0x03,0xFF,0xE0,0x03,0xFF,0x80,0x7F,0xFC,0x00,0x7F,0xF0,0x0F,0xFF,0x80,0x1F,0xFC,0x01,0xFF,0xF0,0x07,0xFF,0x80,0x3F,0xFE,0x00,0xFF,0xE0,0x07,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xCF,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xF0,0x00, // '4'
+	0x0F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFF,0xFE,0x03,0xFF,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xC0,0x7F,0xFF,0xFF,0xFF,0xE0,0x3F,0xFF,0xFF,0xFF,0xF0,0x1F,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0x80,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x01,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xF8,0x00,0x00,0x00,0x3F,0xFC,0x00,0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x07,0xFF,0x80,0x00,0x00,0x03,0xFF,0xC3,0xFE,0x00,0x01,0xFF,0xEF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFF,0x07,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xF0,0x1F,0xFF,0xE0,0x1F,0xE0,0x03,0xFF,0xF0,0x00,0x60,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x7F,0xFC,0x00,0x1F,0xFF,0xBF,0xFE,0x00,0x0F,0xFF,0x9F,0xFF,0x80,0x07,0xFF,0xCF,0xFF,0xC0,0x07,0xFF,0xE3,0xFF,0xF0,0x03,0xFF,0xF1,0xFF,0xFC,0x03,0xFF,0xF0,0xFF,0xFF,0x07,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFF,0xFC,0x01,0xFF,0xFF,0xFF,0xFE,0x00,0x7F,0xFF,0xFF,0xFE,0x00,0x1F,0xFF,0xFF,0xFE,0x00,0x03,0xFF,0xFF,0xFC,0x00,0x00,0xFF,0xFF,0xFC,0x00,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xC0,0x00,0x00, // '5'
+	0x00,0x00,0x00,0xFF,0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xFF,0xC0,0x00,0x01,0xFF,0xFF,0xF0,0x00,0x00,0xFF,0xFF,0xFC,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x3F,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFE,0x00,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x07,0xF8,0x00,0x1F,0xFF,0x0F,0xFF,0xC0,0x07,0xFF,0xCF,0xFF,0xF8,0x01,0xFF,0xF7,0xFF,0xFF,0x80,0x7F,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFF,0x83,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFF,0x8F,0xFF,0xF8,0x1F,0xFF,0xE3,0xFF,0xF8,0x01,0xFF,0xFC,0xFF,0xFC,0x00,0x3F,0xFF,0x3F,0xFF,0x00,0x0F,0xFF,0xCF,0xFF,0x80,0x01,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0xBF,0xFE,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x0F,0xFF,0x9F,0xFE,0x00,0x03,0xFF,0xE7,0xFF,0xC0,0x01,0xFF,0xF9,0xFF,0xF0,0x00,0x7F,0xFE,0x7F,0xFC,0x00,0x1F,0xFF,0x0F,0xFF,0x80,0x0F,0xFF,0xC3,0xFF,0xE0,0x03,0xFF,0xF0,0xFF,0xFC,0x01,0xFF,0xF8,0x1F,0xFF,0xC1,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0xFF,0xFF,0xC0,0x1F,0xFF,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFF,0xF0,0x00,0x7F,0xFF,0xFF,0xF8,0x00,0x0F,0xFF,0xFF,0xFC,0x00,0x01,0xFF,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFE,0x00,0x00,0x00,0x0F,0xFC,0x00,0x00, // '6'
+	0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFF,0xFF,0xC0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x01,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00, // '7'
+	0x00,0x01,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xFF,0x80,0x00,0x3F,0xFF,0xFF,0xF0,0x00,0x3F,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xF0,0xFF,0xFF,0x07,0xFF,0xE0,0x1F,0xFF,0x83,0xFF,0xE0,0x07,0xFF,0xC3,0xFF,0xF0,0x03,0xFF,0xF1,0xFF,0xF8,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x3F,0xFF,0x0F,0xFF,0x80,0x1F,0xFF,0x07,0xFF,0xC0,0x0F,0xFF,0x83,0xFF,0xE0,0x07,0xFF,0xC0,0xFF,0xF8,0x07,0xFF,0xC0,0x7F,0xFF,0x07,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xFF,0xE0,0x01,0xFF,0xFF,0xFF,0xE0,0x00,0x7F,0xFF,0xFF,0xE0,0x00,0x0F,0xFF,0xFF,0xE0,0x00,0x0F,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0xFF,0xFE,0x00,0x1F,0xFF,0xFF,0xFF,0x80,0x1F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xC0,0xFF,0xFC,0x0F,0xFF,0xC0,0x3F,0xFF,0x0F,0xFF,0xC0,0x0F,0xFF,0xC7,0xFF,0xC0,0x03,0xFF,0xE3,0xFF,0xE0,0x01,0xFF,0xF3,0xFF,0xF0,0x00,0xFF,0xF9,0xFF,0xF0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x07,0xFF,0xEF,0xFF,0xC0,0x03,0xFF,0xF7,0xFF,0xE0,0x01,0xFF,0xF9,0xFF,0xF8,0x01,0xFF,0xF8,0xFF,0xFE,0x01,0xFF,0xFC,0x7F,0xFF,0x81,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0xFF,0xFF,0x00,0x7F,0xFF,0xFF,0xFF,0x80,0x0F,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00, // '8'
+	0x00,0x01,0xFF,0x00,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFF,0xFF,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xF0,0xFF,0xFE,0x07,0xFF,0xE0,0x1F,0xFF,0x03,0xFF,0xF0,0x07,0xFF,0xC3,0xFF,0xF0,0x03,0xFF,0xE1,0xFF,0xF0,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xFC,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x1F,0xFF,0x3F,0xFE,0x00,0x0F,0xFF,0x9F,0xFF,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFD,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x0F,0xFF,0x9F,0xFF,0x80,0x0F,0xFF,0xCF,0xFF,0xC0,0x07,0xFF,0xE7,0xFF,0xF0,0x07,0xFF,0xF1,0xFF,0xFE,0x0F,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xFC,0x7F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFF,0x07,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFD,0xFF,0xF0,0x00,0xFF,0xF8,0xFF,0xF0,0x00,0x0F,0xF0,0x7F,0xF8,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x3F,0xFC,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x7F,0xFF,0x80,0x00,0x01,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0x07,0xFF,0xFF,0xC0,0x00,0x03,0xFF,0xFF,0x80,0x00,0x01,0xFF,0xFF,0x80,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xF8,0x00,0x00,0x00,0x1F,0xC0,0x00,0x00,0x00, // '9'
+	0x0F,0xC0,0x7F,0xE1,0xFF,0xE7,0xFF,0xCF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xF1,0xFF,0xE1,0xFF,0x80,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x3F,0xF0,0xFF,0xF3,0xFF,0xE7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xF8,0xFF,0xF0,0xFF,0xC0,0x7E,0x00, // ':'
+	0x03,0xF0,0x07,0xFE,0x07,0xFF,0x87,0xFF,0xC3,0xFF,0xF1,0xFF,0xF8,0xFF,0xFC,0x7F,0xFE,0x3F,0xFF,0x1F,0xFF,0x07,0xFF,0x81,0xFF,0x80,0x3F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFF,0x81,0xFF,0xC0,0xFF,0xE0,0x7F,0xF0,0x3F,0xF8,0x1F,0xFC,0x0F,0xFE,0x07,0xFF,0x03,0xFF,0x81,0xFF,0xC0,0xFF,0xC0,0x7F,0xE0,0x3F,0xF0,0x1F,0xF8,0x1F,0xFC,0x0F,0xFC,0x07,0xFE,0x07,0xFE,0x03,0xFF,0x03,0xFF,0x01,0xFF,0x81,0xFF,0x80,0x7F,0x80,0x0F,0x80,0x01,0x80,0x00, // ';'
+	0x00,0x00,0x00,0x00,0x40,0x00,0x00,0x00,0x38,0x00,0x00,0x00,0x3F,0x00,0x00,0x00,0x1F,0xE0,0x00,0x00,0x1F,0xFC,0x00,0x00,0x0F,0xFF,0x80,0x00,0x07,0xFF,0xF0,0x00,0x07,0xFF,0xFE,0x00,0x03,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFC,0x00,0x03,0xFF,0xFC,0x00,0x00,0x7F,0xFC,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x01,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0x00,0x07,0xFF,0xFF,0xF8,0x00,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0x80,0x00,0xFF,0xFF,0xF0,0x00,0x07,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0xFF,0xF8,0x00,0x00,0x07,0xFF,0x00,0x00,0x00,0x1F,0xE0,0x00,0x00,0x00,0xFC,0x00,0x00,0x00,0x03,0x80,0x00,0x00,0x00,0x10, // '<'
+	0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFC, // '='
+	0xC0,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0xFC,0x00,0x00,0x00,0x0F,0xF8,0x00,0x00,0x00,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0xFF,0xFF,0xF8,0x00,0x0F,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0x00,0x7F,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xE0,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x0F,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xF8,0x00,0x0F,0xFF,0xFC,0x00,0x00,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0xFF,0xE0,0x00,0x00,0x0F,0xF8,0x00,0x00,0x00,0xFC,0x00,0x00,0x00,0x0F,0x00,0x00,0x00,0x00,0xC0,0x00,0x00,0x00,0x00, // '>'
+	0x00,0x03,0xFF,0x00,0x00,0x00,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xC0,0x07,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xC7,0xFF,0xF8,0x7F,0xFF,0x1F,0xFF,0x80,0x7F,0xFE,0x7F,0xFE,0x01,0xFF,0xF9,0xFF,0xF0,0x03,0xFF,0xEF,0xFF,0xC0,0x0F,0xFF,0xBF,0xFF,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x7F,0xFE,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x03,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0xFF,0xFE,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x3F,0xFF,0x80,0x00,0x01,0xFF,0xFC,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x7F,0xF8,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00,0x07,0xFF,0x00,0x00,0x00,0x1F,0xFC,0x00,0x00,0x00,0x7F,0xF0,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xE0,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x7F,0xFE,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x07,0xFE,0x00,0x00,0x00,0x07,0xE0,0x00,0x00, // '?'
+	0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x00,0x00,0x00,0x07,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x00,0x03,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x00,0x3F,0xFF,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x3F,0xFF,0xC0,0x07,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xE0,0x00,0x07,0xFF,0xC0,0x00,0x00,0xFF,0xF0,0x00,0x00,0x1F,0xFE,0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x7F,0xF0,0x00,0x03,0xFF,0x80,0x00,0x00,0x01,0xFF,0x80,0x00,0x7F,0xF0,0x00,0x00,0x00,0x0F,0xFC,0x00,0x0F,0xFE,0x00,0x00,0x00,0x00,0x7F,0xC0,0x00,0xFF,0xC0,0x00,0x00,0x00,0x03,0xFE,0x00,0x1F,0xF8,0x00,0x00,0x00,0x00,0x3F,0xE0,0x03,0xFF,0x00,0x00,0x7F,0x80,0x01,0xFF,0x00,0x3F,0xE0,0x00,0x3F,0xFF,0x00,0x0F,0xF0,0x07,0xFE,0x00,0x0F,0xFF,0xFC,0x00,0xFF,0x00,0x7F,0xC0,0x01,0xFF,0xFF,0xF0,0x07,0xF8,0x0F,0xFC,0x00,0x7F,0xFF,0xFF,0x80,0x7F,0x80,0xFF,0x80,0x07,0xFF,0xFF,0xF8,0x07,0xF8,0x0F,0xF8,0x00,0xFF,0xFF,0xFF,0x80,0x3F,0xC1,0xFF,0x00,0x1F,0xFF,0xFF,0xF8,0x03,0xFC,0x1F,0xF0,0x03,0xFF,0xC0,0xFF,0x80,0x3F,0xC1,0xFE,0x00,0x3F,0xF0,0x0F,0xF8,0x03,0xFC,0x3F,0xE0,0x07,0xFE,0x00,0xFF,0x00,0x3F,0xC3,0xFE,0x00,0x7F,0xE0,0x0F,0xF0,0x01,0xFC,0x3F,0xE0,0x0F,0xFC,0x01,0xFF,0x00,0x1F,0xE3,0xFC,0x00,0xFF,0x80,0x1F,0xF0,0x01,0xFE,0x7F,0xC0,0x1F,0xF8,0x01,0xFF,0x00,0x1F,0xE7,0xFC,0x01,0xFF,0x80,0x1F,0xF0,0x01,0xFE,0x7F,0xC0,0x1F,0xF0,0x01,0xFF,0x00,0x1F,0xE7,0xFC,0x01,0xFF,0x00,0x1F,0xF0,0x01,0xFE,0x7F,0x80,0x3F,0xF0,0x01,0xFF,0x00,0x1F,0xE7,0xF8,0x03,0xFF,0x00,0x1F,0xF0,0x01,0xFC,0x7F,0x80,0x3F,0xF0,0x01,0xFF,0x00,0x1F,0xC7,0xF8,0x03,0xFF,0x00,0x1F,0xE0,0x03,0xFC,0x7F,0x80,0x3F,0xE0,0x01,0xFE,0x00,0x3F,0xC7,0xF8,0x03,0xFE,0x00,0x3F,0xE0,0x03,0xFC,0x7F,0x80,0x3F,0xE0,0x03,0xFE,0x00,0x3F,0xC7,0xF8,0x03,0xFE,0x00,0x3F,0xE0,0x03,0xFC,0x7F,0x80,0x3F,0xF0,0x03,0xFE,0x00,0x7F,0x87,0xF8,0x03,0xFF,0x00,0x3F,0xE0,0x07,0xF8,0x7F,0x80,0x3F,0xF0,0x07,0xFE,0x00,0xFF,0x87,0xFC,0x03,0xFF,0x00,0xFF,0xE0,0x0F,0xF0,0x7F,0xC0,0x3F,0xF8,0x0F,0xFE,0x01,0xFF,0x07,0xFC,0x01,0xFF,0xC3,0xFF,0xF0,0x3F,0xE0,0x7F,0xC0,0x1F,0xFF,0xFF,0xFF,0x8F,0xFE,0x03,0xFC,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0xC0,0x3F,0xE0,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x03,0xFE,0x00,0x7F,0xFF,0xEF,0xFF,0xFF,0x00,0x3F,0xE0,0x07,0xFF,0xFC,0x7F,0xFF,0xE0,0x01,0xFF,0x00,0x3F,0xFF,0x83,0xFF,0xFC,0x00,0x1F,0xF0,0x00,0xFF,0xE0,0x1F,0xFF,0x00,0x01,0xFF,0x80,0x03,0xF8,0x00,0x7F,0xC0,0x00,0x0F,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x07,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x7F,0xF0,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x04,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x01,0xC0,0x00,0x00,0x00,0x7F,0xFF,0xE0,0x01,0xFC,0x00,0x00,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x1F,0xFF,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x00,0x7F,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x00,0x3F,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x7F,0xFF,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFC,0x00,0x00,0x00,0x00, // '@'
+	0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0x00,0x00,0x1F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x3F,0xFF,0xF8,0x00,0x00,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x00,0x00,0x7F,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFF,0xFC,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x00,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xEF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xCF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xCF,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC7,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC7,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x87,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x87,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x83,0xFF,0xE0,0x00,0x00,0x1F,0xFF,0x03,0xFF,0xE0,0x00,0x00,0x1F,0xFF,0x03,0xFF,0xE0,0x00,0x00,0x1F,0xFF,0x01,0xFF,0xF0,0x00,0x00,0x3F,0xFE,0x01,0xFF,0xF0,0x00,0x00,0x3F,0xFE,0x01,0xFF,0xF8,0x00,0x00,0x3F,0xFE,0x00,0xFF,0xF8,0x00,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x00,0x00,0x7F,0xFC,0x00,0xFF,0xFC,0x00,0x00,0xFF,0xFC,0x00,0x7F,0xFC,0x00,0x00,0xFF,0xFC,0x00,0x7F,0xFC,0x00,0x00,0xFF,0xF8,0x00,0x7F,0xFE,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xFE,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xFE,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x07,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x07,0xFF,0xFF,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xC0,0x00,0x07,0xFF,0xE0,0x1F,0xFF,0x80,0x00,0x07,0xFF,0xE0,0x1F,0xFF,0x80,0x00,0x07,0xFF,0xF0,0x1F,0xFF,0x80,0x00,0x03,0xFF,0xF0,0x3F,0xFF,0x00,0x00,0x03,0xFF,0xF0,0x3F,0xFF,0x00,0x00,0x03,0xFF,0xF8,0x3F,0xFF,0x00,0x00,0x01,0xFF,0xF8,0x7F,0xFF,0x00,0x00,0x01,0xFF,0xF8,0x7F,0xFE,0x00,0x00,0x01,0xFF,0xFC,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFC,0xFF,0xFE,0x00,0x00,0x00,0xFF,0xFE, // 'A'
+	0xFF,0xFF,0xFF,0xF0,0x00,0x03,0xFF,0xFF,0xFF,0xFC,0x00,0x0F,0xFF,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0xFC,0x3F,0xFF,0x00,0x1F,0xFF,0xF8,0xFF,0xFC,0x00,0x1F,0xFF,0xE3,0xFF,0xF0,0x00,0x3F,0xFF,0x8F,0xFF,0xC0,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x03,0xFF,0xE3,0xFF,0xF0,0x00,0x0F,0xFF,0x8F,0xFF,0xC0,0x00,0x3F,0xFE,0x3F,0xFF,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x1F,0xFF,0x0F,0xFF,0xC0,0x00,0xFF,0xFC,0x3F,0xFF,0x00,0x1F,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xFF,0x83,0xFF,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xF0,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xF0,0x00,0x7F,0xFF,0x8F,0xFF,0xC0,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x03,0xFF,0xF3,0xFF,0xF0,0x00,0x07,0xFF,0xCF,0xFF,0xC0,0x00,0x1F,0xFF,0x3F,0xFF,0x00,0x00,0x7F,0xFC,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xCF,0xFF,0xC0,0x00,0x3F,0xFF,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x07,0xFF,0xF3,0xFF,0xF0,0x00,0x7F,0xFF,0xCF,0xFF,0xFF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xFF,0xE3,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFF,0xF0,0x00,0xFF,0xFF,0xFF,0xFC,0x00,0x00, // 'B'
+	0x00,0x00,0x1F,0xFC,0x00,0x00,0x00,0x00,0xFF,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xFF,0xFF,0x80,0x00,0x03,0xFF,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xFF,0xFC,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0x01,0xFF,0xFF,0x01,0xFF,0xFE,0x00,0x3F,0xFF,0xC0,0xFF,0xFC,0x00,0x07,0xFF,0xE0,0xFF,0xFE,0x00,0x03,0xFF,0xF0,0x7F,0xFE,0x00,0x00,0xFF,0xFC,0x3F,0xFF,0x00,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x00,0x1F,0xFF,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0x8F,0xFF,0xC0,0x00,0x07,0xFF,0xE7,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x00,0x3F,0xFE,0x3F,0xFF,0x00,0x00,0x1F,0xFF,0x1F,0xFF,0x80,0x00,0x1F,0xFF,0x87,0xFF,0xE0,0x00,0x0F,0xFF,0xC3,0xFF,0xF0,0x00,0x0F,0xFF,0xE0,0xFF,0xFC,0x00,0x07,0xFF,0xE0,0x7F,0xFF,0x00,0x0F,0xFF,0xF0,0x1F,0xFF,0xE0,0x1F,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFF,0xFF,0xFC,0x00,0x07,0xFF,0xFF,0xFF,0xFC,0x00,0x01,0xFF,0xFF,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00, // 'C'
+	0xFF,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xC0,0x3F,0xFF,0xF0,0x3F,0xFF,0x00,0x1F,0xFF,0xE0,0xFF,0xFC,0x00,0x3F,0xFF,0x83,0xFF,0xF0,0x00,0x7F,0xFF,0x0F,0xFF,0xC0,0x00,0xFF,0xFC,0x3F,0xFF,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x00,0x3F,0xFF,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x03,0xFF,0xF3,0xFF,0xF0,0x00,0x07,0xFF,0xCF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFC,0xFF,0xFC,0x00,0x03,0xFF,0xF3,0xFF,0xF0,0x00,0x0F,0xFF,0xCF,0xFF,0xC0,0x00,0x3F,0xFF,0x3F,0xFF,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x00,0xFF,0xFC,0x3F,0xFF,0x00,0x07,0xFF,0xF0,0xFF,0xFC,0x00,0x3F,0xFF,0x83,0xFF,0xF0,0x01,0xFF,0xFE,0x0F,0xFF,0xC0,0x3F,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFF,0xF8,0x00,0xFF,0xFF,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xFF,0xFC,0x00,0x0F,0xFF,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xFC,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00, // 'D'
+	0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xF0,0x7F,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xFC,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFF,0x07,0xFF,0xFF,0xFF,0xFF,0x83,0xFF,0xFF,0xFF,0xFF,0xC1,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xF0,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xCF,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xF3,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0xFE,0x00, // 'E'
+	0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0xF1,0xFF,0xFF,0xFF,0xFF,0xE3,0xFF,0xFF,0xFF,0xFF,0xC7,0xFF,0xFF,0xFF,0xFF,0x8F,0xFF,0xFF,0xFF,0xFF,0x1F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFC,0x7F,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF1,0xFF,0xFF,0xFF,0xFF,0xE3,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00, // 'F'
+	0x00,0x00,0x1F,0xFE,0x00,0x00,0x00,0x00,0x7F,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xC0,0x00,0x03,0xFF,0xFF,0xFF,0xF8,0x00,0x03,0xFF,0xFF,0xFF,0xFE,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFF,0xFF,0xF0,0x03,0xFF,0xFF,0xFF,0xFF,0xFC,0x01,0xFF,0xFF,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0x80,0xFF,0xFF,0x80,0xFF,0xFF,0x00,0x1F,0xFF,0xC0,0xFF,0xFF,0x00,0x07,0xFF,0xF0,0x7F,0xFF,0x00,0x01,0xFF,0xF8,0x7F,0xFF,0x00,0x00,0x7F,0xFC,0x3F,0xFF,0x80,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x1F,0xFF,0x9F,0xFF,0xC0,0x00,0x07,0xFF,0xCF,0xFF,0xC0,0x00,0x03,0xFF,0xE7,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x07,0xFF,0xFF,0xF7,0xFF,0xE0,0x03,0xFF,0xFF,0xFB,0xFF,0xF0,0x01,0xFF,0xFF,0xFD,0xFF,0xF8,0x00,0xFF,0xFF,0xFE,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0x7F,0xFE,0x00,0x3F,0xFF,0xFF,0x9F,0xFF,0x00,0x1F,0xFF,0xFF,0xCF,0xFF,0xC0,0x0F,0xFF,0xFF,0xE7,0xFF,0xE0,0x07,0xFF,0xFF,0xF3,0xFF,0xF0,0x00,0x01,0xFF,0xF9,0xFF,0xF8,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x00,0x7F,0xFE,0x7F,0xFF,0x00,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x00,0x0F,0xFF,0xC7,0xFF,0xF0,0x00,0x07,0xFF,0xE1,0xFF,0xFC,0x00,0x03,0xFF,0xF0,0xFF,0xFF,0x00,0x01,0xFF,0xF8,0x3F,0xFF,0xC0,0x01,0xFF,0xFC,0x1F,0xFF,0xFC,0x03,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xFF,0xE0,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0xFF,0x80,0x00,0x03,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFF,0xFC,0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00, // 'G'
+	0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x0F,0xFF,0xDF,0xFF,0x80,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x00, // 'H'
+	0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFC, // 'I'
+	0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x0F,0xFF,0x8F,0xFF,0x80,0x0F,0xFF,0xC7,0xFF,0xE0,0x07,0xFF,0xE3,0xFF,0xF0,0x03,0xFF,0xF1,0xFF,0xFC,0x03,0xFF,0xF0,0xFF,0xFF,0x07,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFF,0xFC,0x01,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFF,0xFC,0x00,0x07,0xFF,0xFF,0xFC,0x00,0x01,0xFF,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00, // 'J'
+	0xFF,0xFC,0x00,0x01,0xFF,0xFF,0x7F,0xFE,0x00,0x01,0xFF,0xFF,0x3F,0xFF,0x00,0x01,0xFF,0xFF,0x1F,0xFF,0x80,0x00,0xFF,0xFF,0x0F,0xFF,0xC0,0x00,0xFF,0xFF,0x07,0xFF,0xE0,0x00,0xFF,0xFF,0x83,0xFF,0xF0,0x00,0xFF,0xFF,0x81,0xFF,0xF8,0x00,0x7F,0xFF,0x80,0xFF,0xFC,0x00,0x7F,0xFF,0x80,0x7F,0xFE,0x00,0x7F,0xFF,0xC0,0x3F,0xFF,0x00,0x3F,0xFF,0xC0,0x1F,0xFF,0x80,0x3F,0xFF,0xC0,0x0F,0xFF,0xC0,0x3F,0xFF,0xC0,0x07,0xFF,0xE0,0x1F,0xFF,0xE0,0x03,0xFF,0xF0,0x1F,0xFF,0xE0,0x01,0xFF,0xF8,0x1F,0xFF,0xE0,0x00,0xFF,0xFC,0x0F,0xFF,0xE0,0x00,0x7F,0xFE,0x0F,0xFF,0xF0,0x00,0x3F,0xFF,0x0F,0xFF,0xF0,0x00,0x1F,0xFF,0x87,0xFF,0xF0,0x00,0x0F,0xFF,0xC7,0xFF,0xF0,0x00,0x07,0xFF,0xE7,0xFF,0xF8,0x00,0x03,0xFF,0xF3,0xFF,0xF8,0x00,0x01,0xFF,0xFB,0xFF,0xF8,0x00,0x00,0xFF,0xFF,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xFF,0xFF,0x80,0x00,0x0F,0xFF,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xFF,0xF0,0x00,0x03,0xFF,0xFF,0xFF,0xFC,0x00,0x01,0xFF,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x7F,0xFF,0xFF,0xFF,0xE0,0x00,0x3F,0xFF,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0xFF,0xFF,0xFC,0x00,0x0F,0xFF,0xFE,0xFF,0xFF,0x00,0x07,0xFF,0xFE,0x3F,0xFF,0x80,0x03,0xFF,0xFE,0x1F,0xFF,0xE0,0x01,0xFF,0xFE,0x07,0xFF,0xF0,0x00,0xFF,0xFE,0x03,0xFF,0xFC,0x00,0x7F,0xFE,0x00,0xFF,0xFF,0x00,0x3F,0xFF,0x00,0x7F,0xFF,0x80,0x1F,0xFF,0x80,0x1F,0xFF,0xE0,0x0F,0xFF,0xC0,0x07,0xFF,0xF0,0x07,0xFF,0xE0,0x03,0xFF,0xFC,0x03,0xFF,0xF0,0x00,0xFF,0xFF,0x01,0xFF,0xF8,0x00,0x7F,0xFF,0x80,0xFF,0xFC,0x00,0x1F,0xFF,0xE0,0x7F,0xFE,0x00,0x0F,0xFF,0xF0,0x3F,0xFF,0x00,0x03,0xFF,0xFC,0x1F,0xFF,0x80,0x00,0xFF,0xFF,0x0F,0xFF,0xC0,0x00,0x7F,0xFF,0x87,0xFF,0xE0,0x00,0x1F,0xFF,0xE3,0xFF,0xF0,0x00,0x0F,0xFF,0xF1,0xFF,0xF8,0x00,0x03,0xFF,0xFC,0xFF,0xFC,0x00,0x01,0xFF,0xFF,0x00, // 'K'
+	0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x7F,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFC, // 'L'
+	0xFF,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0xFD,0xFF,0xFF,0xC0,0x00,0x00,0x3F,0xFF,0xFB,0xFF,0xFF,0x80,0x00,0x00,0x7F,0xFF,0xF7,0xFF,0xFF,0x00,0x00,0x00,0xFF,0xFF,0xEF,0xFF,0xFF,0x00,0x00,0x03,0xFF,0xFF,0xDF,0xFF,0xFE,0x00,0x00,0x07,0xFF,0xFF,0xBF,0xFF,0xFC,0x00,0x00,0x0F,0xFF,0xFF,0x7F,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0xFE,0xFF,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFD,0xFF,0xFF,0xF0,0x00,0x00,0xFF,0xFF,0xFB,0xFF,0xFF,0xF0,0x00,0x03,0xFF,0xFF,0xF7,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xEF,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xDF,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xBF,0xFF,0xFF,0x80,0x00,0x7F,0xFF,0xFF,0x7F,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFD,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFB,0xFF,0xFF,0xFC,0x00,0x0F,0xFF,0xFF,0xF7,0xFF,0xDF,0xFC,0x00,0x3F,0xFB,0xFF,0xEF,0xFF,0xBF,0xF8,0x00,0x7F,0xF7,0xFF,0xDF,0xFF,0x7F,0xF0,0x00,0xFF,0xEF,0xFF,0xBF,0xFE,0x7F,0xF0,0x03,0xFF,0x9F,0xFF,0x7F,0xFC,0xFF,0xE0,0x07,0xFF,0x3F,0xFE,0xFF,0xF9,0xFF,0xC0,0x0F,0xFE,0x7F,0xFD,0xFF,0xF1,0xFF,0x80,0x3F,0xF8,0xFF,0xFB,0xFF,0xE3,0xFF,0x80,0x7F,0xF1,0xFF,0xF7,0xFF,0xC7,0xFF,0x00,0xFF,0xE3,0xFF,0xEF,0xFF,0x87,0xFE,0x01,0xFF,0x87,0xFF,0xDF,0xFF,0x0F,0xFE,0x07,0xFF,0x0F,0xFF,0xBF,0xFE,0x1F,0xFC,0x0F,0xFE,0x1F,0xFF,0x7F,0xFC,0x1F,0xF8,0x1F,0xF8,0x3F,0xFE,0xFF,0xF8,0x3F,0xF8,0x7F,0xF0,0xFF,0xFD,0xFF,0xF8,0x7F,0xF0,0xFF,0xE1,0xFF,0xFB,0xFF,0xF0,0x7F,0xE1,0xFF,0x83,0xFF,0xF7,0xFF,0xE0,0xFF,0xE7,0xFF,0x07,0xFF,0xEF,0xFF,0xC0,0xFF,0xCF,0xFE,0x0F,0xFF,0xDF,0xFF,0x81,0xFF,0x9F,0xF8,0x1F,0xFF,0xBF,0xFF,0x03,0xFF,0xFF,0xF0,0x3F,0xFF,0x7F,0xFE,0x03,0xFF,0xFF,0xC0,0x7F,0xFE,0xFF,0xFC,0x07,0xFF,0xFF,0x80,0xFF,0xFD,0xFF,0xF8,0x0F,0xFF,0xFF,0x01,0xFF,0xFB,0xFF,0xF0,0x0F,0xFF,0xFC,0x03,0xFF,0xF7,0xFF,0xE0,0x1F,0xFF,0xF8,0x07,0xFF,0xEF,0xFF,0xC0,0x3F,0xFF,0xF0,0x0F,0xFF,0xDF,0xFF,0x80,0x3F,0xFF,0xC0,0x1F,0xFF,0xBF,0xFF,0x00,0x7F,0xFF,0x80,0x3F,0xFF,0x7F,0xFE,0x00,0xFF,0xFF,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0xFF,0xFC,0x00,0xFF,0xFD,0xFF,0xF8,0x01,0xFF,0xF8,0x01,0xFF,0xFB,0xFF,0xF0,0x03,0xFF,0xF0,0x03,0xFF,0xF7,0xFF,0xE0,0x03,0xFF,0xC0,0x07,0xFF,0xEF,0xFF,0xC0,0x07,0xFF,0x80,0x0F,0xFF,0xDF,0xFF,0x80,0x0F,0xFF,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x0F,0xFC,0x00,0x3F,0xFF,0x7F,0xFE,0x00,0x1F,0xF8,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x3F,0xF0,0x00,0xFF,0xFC, // 'M'
+	0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x7F,0xFF,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x80,0x00,0x0F,0xFF,0xDF,0xFF,0xE0,0x00,0x07,0xFF,0xEF,0xFF,0xF0,0x00,0x03,0xFF,0xF7,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xFF,0x00,0x00,0xFF,0xFD,0xFF,0xFF,0x80,0x00,0x7F,0xFE,0xFF,0xFF,0xE0,0x00,0x3F,0xFF,0x7F,0xFF,0xF0,0x00,0x1F,0xFF,0xBF,0xFF,0xFC,0x00,0x0F,0xFF,0xDF,0xFF,0xFE,0x00,0x07,0xFF,0xEF,0xFF,0xFF,0x80,0x03,0xFF,0xF7,0xFF,0xFF,0xE0,0x01,0xFF,0xFB,0xFF,0xFF,0xF0,0x00,0xFF,0xFD,0xFF,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0x7F,0xFF,0xFF,0x80,0x1F,0xFF,0xBF,0xFF,0xFF,0xC0,0x0F,0xFF,0xDF,0xFF,0xFF,0xF0,0x07,0xFF,0xEF,0xFF,0xFF,0xFC,0x03,0xFF,0xF7,0xFF,0xFF,0xFE,0x01,0xFF,0xFB,0xFF,0xFF,0xFF,0x80,0xFF,0xFD,0xFF,0xFB,0xFF,0xC0,0x7F,0xFE,0xFF,0xFC,0xFF,0xF0,0x3F,0xFF,0x7F,0xFE,0x7F,0xF8,0x1F,0xFF,0xBF,0xFF,0x1F,0xFE,0x0F,0xFF,0xDF,0xFF,0x8F,0xFF,0x07,0xFF,0xEF,0xFF,0xC3,0xFF,0xC3,0xFF,0xF7,0xFF,0xE1,0xFF,0xF1,0xFF,0xFB,0xFF,0xF0,0x7F,0xF8,0xFF,0xFD,0xFF,0xF8,0x1F,0xFE,0x7F,0xFE,0xFF,0xFC,0x0F,0xFF,0x3F,0xFF,0x7F,0xFE,0x03,0xFF,0xDF,0xFF,0xBF,0xFF,0x01,0xFF,0xEF,0xFF,0xDF,0xFF,0x80,0x7F,0xFF,0xFF,0xEF,0xFF,0xC0,0x3F,0xFF,0xFF,0xF7,0xFF,0xE0,0x0F,0xFF,0xFF,0xFB,0xFF,0xF0,0x03,0xFF,0xFF,0xFD,0xFF,0xF8,0x01,0xFF,0xFF,0xFE,0xFF,0xFC,0x00,0x7F,0xFF,0xFF,0x7F,0xFE,0x00,0x3F,0xFF,0xFF,0xBF,0xFF,0x00,0x0F,0xFF,0xFF,0xDF,0xFF,0x80,0x07,0xFF,0xFF,0xEF,0xFF,0xC0,0x01,0xFF,0xFF,0xF7,0xFF,0xE0,0x00,0x7F,0xFF,0xFB,0xFF,0xF0,0x00,0x3F,0xFF,0xFD,0xFF,0xF8,0x00,0x0F,0xFF,0xFE,0xFF,0xFC,0x00,0x07,0xFF,0xFF,0x7F,0xFE,0x00,0x01,0xFF,0xFF,0xBF,0xFF,0x00,0x00,0xFF,0xFF,0xDF,0xFF,0x80,0x00,0x3F,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xF7,0xFF,0xE0,0x00,0x07,0xFF,0xFB,0xFF,0xF0,0x00,0x01,0xFF,0xFD,0xFF,0xF8,0x00,0x00,0xFF,0xFE,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x00, // 'N'
+	0x00,0x00,0x1F,0xFC,0x00,0x00,0x00,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xFF,0xF8,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xE0,0x3F,0xFF,0xE0,0x1F,0xFF,0xE0,0x03,0xFF,0xFC,0x07,0xFF,0xF0,0x00,0x7F,0xFF,0x03,0xFF,0xF8,0x00,0x0F,0xFF,0xE0,0xFF,0xFC,0x00,0x01,0xFF,0xF8,0x7F,0xFF,0x00,0x00,0x7F,0xFE,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0xC7,0xFF,0xE0,0x00,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xF9,0xFF,0xF8,0x00,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0xC7,0xFF,0xF0,0x00,0x07,0xFF,0xF0,0xFF,0xFC,0x00,0x01,0xFF,0xF8,0x3F,0xFF,0x80,0x00,0xFF,0xFE,0x07,0xFF,0xF0,0x00,0x7F,0xFF,0x01,0xFF,0xFE,0x00,0x3F,0xFF,0xC0,0x3F,0xFF,0xE0,0x3F,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x00,0x03,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x7F,0xFF,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00, // 'O'
+	0xFF,0xFF,0xFF,0xF0,0x00,0x03,0xFF,0xFF,0xFF,0xFC,0x00,0x0F,0xFF,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xC0,0x03,0xFF,0xFE,0x3F,0xFF,0x00,0x03,0xFF,0xFC,0xFF,0xFC,0x00,0x07,0xFF,0xF3,0xFF,0xF0,0x00,0x0F,0xFF,0xCF,0xFF,0xC0,0x00,0x3F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0xFF,0xFE,0xFF,0xFC,0x00,0x07,0xFF,0xF3,0xFF,0xF0,0x00,0x3F,0xFF,0xCF,0xFF,0xC0,0x03,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xFE,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xF8,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00, // 'P'
+	0x00,0x00,0x1F,0xFC,0x00,0x00,0x00,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x00,0x3F,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x00,0x0F,0xFF,0xFF,0xFF,0xF8,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0xE0,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xE0,0x3F,0xFF,0xE0,0x1F,0xFF,0xE0,0x03,0xFF,0xFC,0x07,0xFF,0xF0,0x00,0x7F,0xFF,0x03,0xFF,0xF8,0x00,0x0F,0xFF,0xE0,0xFF,0xFC,0x00,0x01,0xFF,0xF8,0x7F,0xFF,0x00,0x00,0x7F,0xFF,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0xC7,0xFF,0xE0,0x00,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x01,0xFF,0xF9,0xFF,0xF8,0x00,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0xC3,0xFF,0xF0,0x00,0x07,0xFF,0xF0,0xFF,0xFC,0x00,0x01,0xFF,0xF8,0x3F,0xFF,0x80,0x00,0xFF,0xFE,0x07,0xFF,0xF0,0x00,0x7F,0xFF,0x01,0xFF,0xFE,0x00,0x3F,0xFF,0xC0,0x3F,0xFF,0xE0,0x3F,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x00,0x03,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x00,0x07,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x00,0x1F,0xFF,0xF0,0x00,0x00,0x00,0x03,0xFF,0xFF,0x00,0x00,0x00,0x00,0x7F,0xFF,0xE0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x00,0xFF,0xF0,0x00,0x00,0x00,0x00,0x1F,0xF8,0x00,0x00,0x00,0x00,0x03,0xFC,0x00,0x00,0x00,0x00,0x00,0x3E,0x00,0x00,0x00,0x00,0x00,0x07,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00, // 'Q'
+	0xFF,0xFF,0xFF,0xF8,0x00,0x01,0xFF,0xFF,0xFF,0xFF,0x00,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0x07,0xFF,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xFF,0xC0,0x1F,0xFF,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xFF,0xC0,0x7F,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xFF,0xC1,0xFF,0xFF,0xFF,0xFF,0xFF,0x83,0xFF,0xFF,0xFF,0xFF,0xFF,0x87,0xFF,0xE0,0x01,0xFF,0xFF,0x0F,0xFF,0xC0,0x00,0xFF,0xFF,0x1F,0xFF,0x80,0x00,0xFF,0xFE,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x0F,0xFF,0xC7,0xFF,0xE0,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x03,0xFF,0xF0,0xFF,0xFC,0x00,0x0F,0xFF,0xE1,0xFF,0xF8,0x00,0x7F,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xFF,0x07,0xFF,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFF,0xE0,0x3F,0xFF,0xFF,0xFF,0xFF,0x80,0x7F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xF0,0x01,0xFF,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0xFF,0x80,0x07,0xFF,0xFF,0xFF,0xFF,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0x00,0x1F,0xFF,0x80,0x7F,0xFE,0x00,0x3F,0xFF,0x00,0xFF,0xFE,0x00,0x7F,0xFE,0x00,0xFF,0xFC,0x00,0xFF,0xFC,0x01,0xFF,0xFC,0x01,0xFF,0xF8,0x01,0xFF,0xF8,0x03,0xFF,0xF0,0x03,0xFF,0xF8,0x07,0xFF,0xE0,0x03,0xFF,0xF0,0x0F,0xFF,0xC0,0x07,0xFF,0xF0,0x1F,0xFF,0x80,0x07,0xFF,0xE0,0x3F,0xFF,0x00,0x0F,0xFF,0xE0,0x7F,0xFE,0x00,0x0F,0xFF,0xC0,0xFF,0xFC,0x00,0x1F,0xFF,0xC1,0xFF,0xF8,0x00,0x1F,0xFF,0x83,0xFF,0xF0,0x00,0x3F,0xFF,0x87,0xFF,0xE0,0x00,0x3F,0xFF,0x0F,0xFF,0xC0,0x00,0x7F,0xFF,0x1F,0xFF,0x80,0x00,0x7F,0xFF,0x3F,0xFF,0x00,0x00,0xFF,0xFE,0x7F,0xFE,0x00,0x00,0xFF,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFC, // 'R'
+	0x00,0x00,0x3F,0xF8,0x00,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xFF,0xE0,0x3F,0xFF,0xFF,0xFF,0xFF,0x81,0xFF,0xFF,0x01,0xFF,0xFF,0x07,0xFF,0xF0,0x01,0xFF,0xFC,0x1F,0xFF,0x80,0x03,0xFF,0xF0,0xFF,0xFC,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x00,0xFF,0xF8,0xFF,0xFC,0x00,0x03,0xFF,0xE3,0xFF,0xF0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x00,0x7F,0xFF,0xC0,0x00,0x00,0x00,0xFF,0xFF,0x80,0x00,0x00,0x03,0xFF,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xFF,0xF0,0x00,0x00,0x3F,0xFF,0xFF,0xF0,0x00,0x00,0x7F,0xFF,0xFF,0xF0,0x00,0x00,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0x00,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFF,0xFE,0x00,0x00,0x00,0x3F,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0x00,0x3F,0xFF,0xC0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xF9,0xFF,0xF0,0x00,0x07,0xFF,0xE7,0xFF,0xC0,0x00,0x0F,0xFF,0x9F,0xFF,0x80,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x01,0xFF,0xF9,0xFF,0xFC,0x00,0x07,0xFF,0xE3,0xFF,0xF0,0x00,0x1F,0xFF,0x8F,0xFF,0xF0,0x00,0xFF,0xFE,0x1F,0xFF,0xF0,0x0F,0xFF,0xF0,0x7F,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xFF,0xC0,0x07,0xFF,0xFF,0xFF,0xFE,0x00,0x0F,0xFF,0xFF,0xFF,0xF0,0x00,0x0F,0xFF,0xFF,0xFF,0x80,0x00,0x0F,0xFF,0xFF,0xF8,0x00,0x00,0x0F,0xFF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00, // 'S'
+	0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00, // 'T'
+	0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x07,0xFF,0xE7,0xFF,0xE0,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0xFF,0xFC,0x7F,0xFF,0x00,0x07,0xFF,0xF1,0xFF,0xFE,0x00,0x3F,0xFF,0xC3,0xFF,0xFE,0x03,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFF,0xC0,0x7F,0xFF,0xFF,0xFF,0xFE,0x00,0xFF,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0xF0,0x00,0x07,0xFF,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xFF,0x00,0x00,0x00,0x01,0xFF,0xC0,0x00,0x00, // 'U'
+	0xFF,0xFE,0x00,0x00,0x03,0xFF,0xFB,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xE7,0xFF,0xF0,0x00,0x00,0x7F,0xFF,0x1F,0xFF,0xC0,0x00,0x01,0xFF,0xFC,0x7F,0xFF,0x00,0x00,0x07,0xFF,0xF0,0xFF,0xFE,0x00,0x00,0x3F,0xFF,0x83,0xFF,0xF8,0x00,0x00,0xFF,0xFE,0x0F,0xFF,0xE0,0x00,0x03,0xFF,0xF8,0x1F,0xFF,0x80,0x00,0x1F,0xFF,0xC0,0x7F,0xFF,0x00,0x00,0x7F,0xFF,0x01,0xFF,0xFC,0x00,0x01,0xFF,0xFC,0x03,0xFF,0xF0,0x00,0x07,0xFF,0xE0,0x0F,0xFF,0xE0,0x00,0x3F,0xFF,0x80,0x3F,0xFF,0x80,0x00,0xFF,0xFE,0x00,0x7F,0xFE,0x00,0x03,0xFF,0xF0,0x01,0xFF,0xF8,0x00,0x0F,0xFF,0xC0,0x07,0xFF,0xF0,0x00,0x7F,0xFF,0x00,0x0F,0xFF,0xC0,0x01,0xFF,0xF8,0x00,0x3F,0xFF,0x00,0x07,0xFF,0xE0,0x00,0xFF,0xFC,0x00,0x3F,0xFF,0x80,0x01,0xFF,0xF8,0x00,0xFF,0xFC,0x00,0x07,0xFF,0xE0,0x03,0xFF,0xF0,0x00,0x1F,0xFF,0x80,0x0F,0xFF,0xC0,0x00,0x3F,0xFF,0x00,0x7F,0xFE,0x00,0x00,0xFF,0xFC,0x01,0xFF,0xF8,0x00,0x03,0xFF,0xF0,0x07,0xFF,0xE0,0x00,0x07,0xFF,0xC0,0x1F,0xFF,0x00,0x00,0x1F,0xFF,0x80,0xFF,0xFC,0x00,0x00,0x7F,0xFE,0x03,0xFF,0xF0,0x00,0x00,0xFF,0xF8,0x0F,0xFF,0x80,0x00,0x03,0xFF,0xE0,0x7F,0xFE,0x00,0x00,0x0F,0xFF,0xC1,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0x07,0xFF,0xC0,0x00,0x00,0x7F,0xFC,0x1F,0xFF,0x00,0x00,0x01,0xFF,0xF8,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xE3,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0x8F,0xFF,0x80,0x00,0x00,0x3F,0xFE,0x3F,0xFC,0x00,0x00,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xDF,0xFE,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFF,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x1F,0xFF,0xFF,0x80,0x00,0x00,0x00,0x3F,0xFF,0xFE,0x00,0x00,0x00,0x00,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x03,0xFF,0xFF,0xC0,0x00,0x00,0x00,0x07,0xFF,0xFF,0x00,0x00,0x00,0x00,0x1F,0xFF,0xFC,0x00,0x00,0x00,0x00,0x7F,0xFF,0xE0,0x00,0x00,0x00,0x00,0xFF,0xFF,0x80,0x00,0x00,0x00,0x03,0xFF,0xFE,0x00,0x00,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00, // 'V'
+	0xFF,0xFC,0x00,0x0F,0xFF,0x00,0x03,0xFF,0xF7,0xFF,0xE0,0x00,0x7F,0xF8,0x00,0x1F,0xFF,0x1F,0xFF,0x00,0x07,0xFF,0xC0,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0xC7,0xFF,0xC0,0x01,0xFF,0xF8,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0x0F,0xFF,0xC0,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0x7F,0xFE,0x00,0x1F,0xFF,0x07,0xFF,0xC0,0x07,0xFF,0xF0,0x00,0xFF,0xF8,0x3F,0xFE,0x00,0x3F,0xFF,0xC0,0x07,0xFF,0xC1,0xFF,0xF0,0x01,0xFF,0xFE,0x00,0x7F,0xFE,0x0F,0xFF,0xC0,0x0F,0xFF,0xF0,0x03,0xFF,0xE0,0x7F,0xFE,0x00,0xFF,0xFF,0x80,0x1F,0xFF,0x01,0xFF,0xF0,0x07,0xFF,0xFC,0x00,0xFF,0xF8,0x0F,0xFF,0x80,0x3F,0xFF,0xF0,0x07,0xFF,0xC0,0x7F,0xFC,0x01,0xFF,0xFF,0x80,0x7F,0xFE,0x03,0xFF,0xF0,0x0F,0xFF,0xFC,0x03,0xFF,0xE0,0x0F,0xFF,0x80,0xFF,0xFF,0xE0,0x1F,0xFF,0x00,0x7F,0xFC,0x07,0xFF,0xFF,0x80,0xFF,0xF8,0x03,0xFF,0xE0,0x3F,0xFF,0xFC,0x07,0xFF,0xC0,0x1F,0xFF,0x01,0xFF,0xFF,0xE0,0x3F,0xFE,0x00,0xFF,0xF8,0x0F,0xFF,0xFF,0x03,0xFF,0xE0,0x03,0xFF,0xE0,0xFF,0xFF,0xF8,0x1F,0xFF,0x00,0x1F,0xFF,0x07,0xFF,0xFF,0xE0,0xFF,0xF8,0x00,0xFF,0xF8,0x3F,0xFF,0xFF,0x07,0xFF,0xC0,0x07,0xFF,0xC1,0xFF,0xFF,0xF8,0x3F,0xFE,0x00,0x3F,0xFE,0x1F,0xFF,0xFF,0xC3,0xFF,0xE0,0x00,0xFF,0xF8,0xFF,0xEF,0xFF,0x1F,0xFF,0x00,0x07,0xFF,0xC7,0xFF,0x3F,0xF8,0xFF,0xF8,0x00,0x3F,0xFE,0x3F,0xF9,0xFF,0xC7,0xFF,0xC0,0x01,0xFF,0xF1,0xFF,0xCF,0xFE,0x3F,0xFC,0x00,0x07,0xFF,0x9F,0xFC,0x7F,0xF1,0xFF,0xE0,0x00,0x3F,0xFC,0xFF,0xE3,0xFF,0xDF,0xFF,0x00,0x01,0xFF,0xF7,0xFF,0x0F,0xFE,0xFF,0xF8,0x00,0x0F,0xFF,0xBF,0xF8,0x7F,0xF7,0xFF,0xC0,0x00,0x7F,0xFF,0xFF,0xC3,0xFF,0xBF,0xFC,0x00,0x01,0xFF,0xFF,0xFC,0x1F,0xFF,0xFF,0xE0,0x00,0x0F,0xFF,0xFF,0xE0,0x7F,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0xFF,0x03,0xFF,0xFF,0xF8,0x00,0x03,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xC0,0x00,0x1F,0xFF,0xFF,0x80,0xFF,0xFF,0xFC,0x00,0x00,0x7F,0xFF,0xFC,0x03,0xFF,0xFF,0xE0,0x00,0x03,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0x00,0x00,0x1F,0xFF,0xFF,0x00,0xFF,0xFF,0xF8,0x00,0x00,0xFF,0xFF,0xF0,0x07,0xFF,0xFF,0x80,0x00,0x07,0xFF,0xFF,0x80,0x3F,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0xFC,0x00,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0x00,0x00,0x07,0xFF,0xFF,0x00,0x3F,0xFF,0xF8,0x00,0x00,0x3F,0xFF,0xF0,0x01,0xFF,0xFF,0x80,0x00,0x00,0xFF,0xFF,0x80,0x07,0xFF,0xFC,0x00,0x00,0x07,0xFF,0xFC,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xE0,0x01,0xFF,0xFF,0x00,0x00,0x01,0xFF,0xFE,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x0F,0xFF,0xF0,0x00,0x3F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x80,0x01,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xFC,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x7F,0xFF,0x00,0x00, // 'W'
+	0x7F,0xFF,0x00,0x00,0x1F,0xFF,0xC7,0xFF,0xF8,0x00,0x03,0xFF,0xFC,0x3F,0xFF,0x80,0x00,0x3F,0xFF,0x81,0xFF,0xFC,0x00,0x07,0xFF,0xF8,0x1F,0xFF,0xC0,0x00,0x7F,0xFF,0x00,0xFF,0xFE,0x00,0x0F,0xFF,0xE0,0x0F,0xFF,0xE0,0x00,0xFF,0xFE,0x00,0x7F,0xFF,0x00,0x1F,0xFF,0xC0,0x07,0xFF,0xF0,0x01,0xFF,0xFC,0x00,0x3F,0xFF,0x80,0x3F,0xFF,0x80,0x03,0xFF,0xF8,0x03,0xFF,0xF8,0x00,0x1F,0xFF,0xC0,0x7F,0xFF,0x00,0x00,0xFF,0xFC,0x07,0xFF,0xE0,0x00,0x0F,0xFF,0xE0,0xFF,0xFE,0x00,0x00,0x7F,0xFE,0x0F,0xFF,0xC0,0x00,0x07,0xFF,0xF1,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x1F,0xFF,0x80,0x00,0x03,0xFF,0xFB,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFF,0xFE,0x00,0x00,0x00,0x7F,0xFF,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x3F,0xFF,0xFF,0x80,0x00,0x00,0x03,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x1F,0xFF,0xFF,0x00,0x00,0x00,0x01,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x00,0x00,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x0F,0xFF,0xFE,0x00,0x00,0x00,0x01,0xFF,0xFF,0xF0,0x00,0x00,0x00,0x1F,0xFF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xFF,0xF8,0x00,0x00,0x00,0x7F,0xFF,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFF,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFF,0xFF,0xF0,0x00,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x00,0x03,0xFF,0xFB,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0x1F,0xFF,0xC0,0x00,0x07,0xFF,0xF1,0xFF,0xFC,0x00,0x00,0xFF,0xFE,0x0F,0xFF,0xE0,0x00,0x0F,0xFF,0xE0,0xFF,0xFE,0x00,0x01,0xFF,0xFC,0x07,0xFF,0xF0,0x00,0x1F,0xFF,0xC0,0x7F,0xFF,0x00,0x03,0xFF,0xF8,0x03,0xFF,0xF8,0x00,0x3F,0xFF,0x80,0x3F,0xFF,0xC0,0x07,0xFF,0xF0,0x01,0xFF,0xFC,0x00,0xFF,0xFF,0x00,0x1F,0xFF,0xE0,0x0F,0xFF,0xE0,0x00,0xFF,0xFE,0x01,0xFF,0xFE,0x00,0x0F,0xFF,0xF0,0x1F,0xFF,0xC0,0x00,0x7F,0xFF,0x03,0xFF,0xFC,0x00,0x07,0xFF,0xF8,0x3F,0xFF,0x80,0x00,0x3F,0xFF,0x87,0xFF,0xF8,0x00,0x03,0xFF,0xFC,0xFF,0xFF,0x00,0x00,0x1F,0xFF,0xE0, // 'X'
+	0xFF,0xFE,0x00,0x00,0x1F,0xFF,0xCF,0xFF,0xC0,0x00,0x03,0xFF,0xF9,0xFF,0xFC,0x00,0x00,0x7F,0xFE,0x1F,0xFF,0x80,0x00,0x1F,0xFF,0xC3,0xFF,0xF8,0x00,0x03,0xFF,0xF0,0x3F,0xFF,0x00,0x00,0xFF,0xFE,0x07,0xFF,0xE0,0x00,0x1F,0xFF,0x80,0x7F,0xFE,0x00,0x07,0xFF,0xF0,0x0F,0xFF,0xC0,0x00,0xFF,0xFC,0x00,0xFF,0xFC,0x00,0x1F,0xFF,0x80,0x1F,0xFF,0x80,0x07,0xFF,0xE0,0x01,0xFF,0xF8,0x00,0xFF,0xFC,0x00,0x3F,0xFF,0x00,0x3F,0xFF,0x00,0x03,0xFF,0xE0,0x07,0xFF,0xE0,0x00,0x7F,0xFE,0x01,0xFF,0xF8,0x00,0x07,0xFF,0xC0,0x3F,0xFF,0x00,0x00,0xFF,0xFC,0x07,0xFF,0xC0,0x00,0x0F,0xFF,0x81,0xFF,0xF8,0x00,0x01,0xFF,0xF0,0x3F,0xFE,0x00,0x00,0x1F,0xFF,0x0F,0xFF,0xC0,0x00,0x03,0xFF,0xE1,0xFF,0xF0,0x00,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x00,0x07,0xFF,0xCF,0xFF,0x80,0x00,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x00,0x3F,0xFF,0xFF,0x00,0x00,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x00,0x07,0xFF,0xFF,0x00,0x00,0x00,0x00,0xFF,0xFF,0xC0,0x00,0x00,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x00,0x01,0xFF,0xFE,0x00,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00, // 'Y'
+	0xFF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0xFF,0xE3,0xFF,0xFF,0xFF,0xFF,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0x00,0x3F,0xFF,0x80,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x0F,0xFF,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFF,0xF8, // 'Z'
+	0xFF,0xFF,0xDF,0xFF,0xFB,0xFF,0xFF,0x7F,0xFF,0xEF,0xFF,0xFD,0xFF,0xFF,0xBF,0xFF,0xF7,0xFF,0xFE,0xFF,0xFF,0xDF,0xFF,0xFB,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xC0,0xFF,0xF8,0x1F,0xFF,0x03,0xFF,0xE0,0x7F,0xFC,0x0F,0xFF,0x81,0xFF,0xF0,0x3F,0xFE,0x07,0xFF,0xFE,0xFF,0xFF,0xDF,0xFF,0xFB,0xFF,0xFF,0x7F,0xFF,0xEF,0xFF,0xFD,0xFF,0xFF,0xBF,0xFF,0xF7,0xFF,0xFE,0xFF,0xFF,0xC0, // '['
+	0xFF,0xFC,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFE,0x00,0x00,0x00,0xFF,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80, // '\'
+	0xFF,0xFF,0xBF,0xFF,0xEF,0xFF,0xFB,0xFF,0xFE,0xFF,0xFF,0xBF,0xFF,0xEF,0xFF,0xFB,0xFF,0xFE,0xFF,0xFF,0xBF,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xF8,0x3F,0xFE,0x0F,0xFF,0x83,0xFF,0xE0,0xFF,0xFB,0xFF,0xFE,0xFF,0xFF,0xBF,0xFF,0xEF,0xFF,0xFB,0xFF,0xFE,0xFF,0xFF,0xBF,0xFF,0xEF,0xFF,0xFB,0xFF,0xFE,0xFF,0xFF,0x80, // ']'
+	0x00,0x1F,0xF8,0x00,0x00,0x07,0xFF,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x1F,0xFF,0x80,0x00,0x0F,0xFF,0xF0,0x00,0x03,0xFF,0xFC,0x00,0x00,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0xE0,0x00,0x1F,0xFF,0xF8,0x00,0x0F,0xFF,0xFF,0x00,0x03,0xFE,0x7F,0xC0,0x00,0xFF,0x9F,0xF8,0x00,0x7F,0xE3,0xFE,0x00,0x1F,0xF0,0xFF,0x80,0x0F,0xFC,0x3F,0xF0,0x03,0xFE,0x07,0xFC,0x01,0xFF,0x81,0xFF,0x80,0x7F,0xE0,0x7F,0xE0,0x1F,0xF0,0x0F,0xF8,0x0F,0xFC,0x03,0xFF,0x03,0xFF,0x00,0x7F,0xC1,0xFF,0x80,0x1F,0xF8,0x7F,0xE0,0x07,0xFE,0x1F,0xF0,0x00,0xFF,0xCF,0xFC,0x00,0x3F,0xF3,0xFF,0x00,0x07,0xFE, // '^'
+	0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE, // '_'
+	0xFF,0xFC,0x00,0xFF,0xFC,0x00,0xFF,0xFC,0x00,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xF0,0x00,0xFF,0xF0,0x00,0xFF,0xF0,0x00,0xFF,0xE0,0x00,0xFF,0xE0,0x00,0xFF,0xE0, // '`'
+	0x00,0x03,0xFF,0x80,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0x80,0x0F,0xFF,0xFF,0xFF,0xC0,0x1F,0xFF,0xFF,0xFF,0xC0,0x3F,0xFF,0xFF,0xFF,0xE0,0x3F,0xFF,0xFF,0xFF,0xF0,0x7F,0xFF,0x07,0xFF,0xF0,0x7F,0xFE,0x03,0xFF,0xF0,0x7F,0xFC,0x01,0xFF,0xF8,0x7F,0xFC,0x01,0xFF,0xF8,0x7F,0xFC,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x07,0xFF,0xFF,0xF8,0x00,0x7F,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xF8,0x07,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0x80,0xFF,0xF8,0xFF,0xFE,0x00,0xFF,0xF8,0xFF,0xFC,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xF8,0xFF,0xF8,0x01,0xFF,0xF8,0xFF,0xFC,0x03,0xFF,0xF8,0xFF,0xFE,0x0F,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xF8,0x7F,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFC,0x0F,0xFF,0xFE,0xFF,0xFC,0x07,0xFF,0xFC,0x7F,0xFC,0x01,0xFF,0xF8,0x7F,0xFE,0x00,0x3F,0xC0,0x00,0x00, // 'a'
+	0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x1F,0xE0,0x00,0xFF,0xF8,0xFF,0xFC,0x00,0xFF,0xF9,0xFF,0xFE,0x00,0xFF,0xFB,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0x03,0xFF,0xF8,0xFF,0xFC,0x01,0xFF,0xFC,0xFF,0xFC,0x00,0xFF,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0xFF,0xFC,0xFF,0xFC,0x01,0xFF,0xFC,0xFF,0xFF,0x03,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xF7,0xFF,0xFF,0xC0,0xFF,0xF3,0xFF,0xFF,0x80,0xFF,0xF1,0xFF,0xFE,0x00,0xFF,0xF0,0xFF,0xFC,0x00,0x00,0x00,0x1F,0xE0,0x00, // 'b'
+	0x00,0x01,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x07,0xFF,0xFF,0xF8,0x00,0x1F,0xFF,0xFF,0xF8,0x00,0x7F,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xF8,0x07,0xFF,0xFF,0xFF,0xF0,0x0F,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xE0,0xFF,0xFE,0x0F,0xFF,0xE1,0xFF,0xF8,0x07,0xFF,0xC3,0xFF,0xE0,0x0F,0xFF,0x8F,0xFF,0x80,0x0F,0xFF,0x9F,0xFF,0x00,0x1F,0xFF,0x3F,0xFE,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFD,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xF0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x03,0xFF,0xCF,0xFF,0x80,0x0F,0xFF,0x9F,0xFF,0x00,0x1F,0xFF,0x1F,0xFF,0x00,0x3F,0xFE,0x3F,0xFF,0x00,0xFF,0xF8,0x7F,0xFF,0x07,0xFF,0xF0,0x7F,0xFF,0xFF,0xFF,0xE0,0x7F,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0x00,0xFF,0xFF,0xFF,0xFC,0x00,0xFF,0xFF,0xFF,0xF0,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x3F,0xFF,0xC0,0x00,0x00,0x0F,0xFC,0x00,0x00, // 'c'
+	0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x0F,0xF0,0x3F,0xFE,0x00,0x7F,0xFC,0x3F,0xFE,0x00,0xFF,0xFF,0x3F,0xFE,0x03,0xFF,0xFF,0xBF,0xFE,0x07,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xC1,0xFF,0xFE,0x7F,0xFF,0x00,0xFF,0xFE,0x7F,0xFE,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x7F,0xFE,0x7F,0xFF,0x00,0xFF,0xFE,0x3F,0xFF,0x81,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xFF,0xDF,0xFE,0x01,0xFF,0xFF,0x9F,0xFE,0x00,0xFF,0xFF,0x1F,0xFE,0x00,0x7F,0xFC,0x1F,0xFE,0x00,0x0F,0xF0,0x00,0x00, // 'd'
+	0x00,0x00,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xFC,0x00,0x00,0x0F,0xFF,0xFF,0x80,0x00,0x0F,0xFF,0xFF,0xE0,0x00,0x1F,0xFF,0xFF,0xFC,0x00,0x1F,0xFF,0xFF,0xFF,0x00,0x1F,0xFF,0xFF,0xFF,0xC0,0x0F,0xFF,0xFF,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xF0,0x3F,0xFF,0x07,0xFF,0xF0,0x0F,0xFF,0x83,0xFF,0xF0,0x03,0xFF,0xE1,0xFF,0xF0,0x01,0xFF,0xF1,0xFF,0xF8,0x00,0x7F,0xF8,0xFF,0xF8,0x00,0x3F,0xFC,0x7F,0xFC,0x00,0x1F,0xFF,0x3F,0xFE,0x00,0x0F,0xFF,0x9F,0xFF,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xFF,0xFF,0x9F,0xFF,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xF0,0x00,0x04,0x00,0xFF,0xFC,0x00,0x03,0x00,0x7F,0xFE,0x00,0x03,0xC0,0x3F,0xFF,0xC0,0x07,0xE0,0x0F,0xFF,0xF8,0x0F,0xF8,0x07,0xFF,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0xFF,0xFF,0x80,0x7F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0xFF,0xE0,0x01,0xFF,0xFF,0xFF,0xE0,0x00,0x7F,0xFF,0xFF,0xE0,0x00,0x0F,0xFF,0xFF,0xC0,0x00,0x01,0xFF,0xFF,0x80,0x00,0x00,0x0F,0xFC,0x00,0x00, // 'e'
+	0x00,0x00,0x3F,0xE0,0x00,0x07,0xFF,0xE0,0x00,0x7F,0xFF,0x80,0x07,0xFF,0xFE,0x00,0x3F,0xFF,0xF8,0x00,0xFF,0xFF,0xE0,0x07,0xFF,0xFF,0x80,0x3F,0xFF,0xFE,0x00,0xFF,0xFF,0xF8,0x07,0xFF,0xFF,0xE0,0x1F,0xFF,0xE0,0x00,0x7F,0xFE,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x3F,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xF3,0xFF,0xFF,0xFF,0xCF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xF3,0xFF,0xFF,0xFF,0xCF,0xFF,0xFF,0xFF,0x3F,0xFF,0xFF,0xFC,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00,0x07,0xFF,0xC0,0x00,0x1F,0xFF,0x00,0x00,0x7F,0xFC,0x00,0x01,0xFF,0xF0,0x00, // 'f'
+	0x00,0x07,0xF8,0x00,0x00,0x00,0x1F,0xFF,0x87,0xFF,0x80,0x1F,0xFF,0xF3,0xFF,0xC0,0x3F,0xFF,0xFD,0xFF,0xE0,0x3F,0xFF,0xFF,0xFF,0xF0,0x3F,0xFF,0xFF,0xFF,0xF8,0x3F,0xFF,0xFF,0xFF,0xFC,0x1F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFF,0x0F,0xFF,0xFF,0xFF,0xFF,0x8F,0xFF,0xF0,0x3F,0xFF,0xC7,0xFF,0xF0,0x07,0xFF,0xE7,0xFF,0xF0,0x01,0xFF,0xF3,0xFF,0xF0,0x00,0xFF,0xF9,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x0F,0xFF,0xBF,0xFF,0x00,0x07,0xFF,0xDF,0xFF,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xF7,0xFF,0xC0,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x0F,0xFF,0xBF,0xFF,0x00,0x07,0xFF,0xCF,0xFF,0x80,0x03,0xFF,0xE7,0xFF,0xC0,0x01,0xFF,0xF3,0xFF,0xF0,0x00,0xFF,0xF9,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xFE,0x00,0x3F,0xFE,0x3F,0xFF,0x80,0x3F,0xFF,0x1F,0xFF,0xE0,0x7F,0xFF,0x87,0xFF,0xFF,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xF0,0x7F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xFC,0x07,0xFF,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0xDF,0xFF,0x00,0x3F,0xFF,0xCF,0xFF,0x80,0x0F,0xFF,0xC7,0xFF,0xC0,0x00,0xFF,0x03,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x01,0xFF,0xF8,0x02,0x00,0x00,0xFF,0xFC,0x03,0x80,0x00,0xFF,0xFC,0x01,0xF0,0x00,0xFF,0xFE,0x01,0xFE,0x01,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0x01,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0x80,0x3F,0xFF,0xFF,0xFF,0x80,0x0F,0xFF,0xFF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0x80,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xE0,0x00,0x00, // 'g'
+	0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x07,0xFF,0xC0,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x7F,0xFC,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xF0,0x0F,0xF0,0x03,0xFF,0xE0,0xFF,0xF8,0x07,0xFF,0xC7,0xFF,0xFC,0x0F,0xFF,0x9F,0xFF,0xFC,0x1F,0xFF,0x7F,0xFF,0xFC,0x3F,0xFF,0xFF,0xFF,0xFC,0x7F,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xF3,0xFF,0xFF,0xFF,0xFF,0xF7,0xFF,0xF8,0x1F,0xFF,0xEF,0xFF,0xC0,0x0F,0xFF,0xDF,0xFF,0x80,0x1F,0xFF,0xBF,0xFE,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0xFF,0xFB,0xFF,0xE0,0x01,0xFF,0xF7,0xFF,0xC0,0x03,0xFF,0xEF,0xFF,0x80,0x07,0xFF,0xDF,0xFF,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0xFF,0xFB,0xFF,0xE0,0x01,0xFF,0xF7,0xFF,0xC0,0x03,0xFF,0xEF,0xFF,0x80,0x07,0xFF,0xDF,0xFF,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0xFF,0xFB,0xFF,0xE0,0x01,0xFF,0xF7,0xFF,0xC0,0x03,0xFF,0xEF,0xFF,0x80,0x07,0xFF,0xDF,0xFF,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0xFF,0xFB,0xFF,0xE0,0x01,0xFF,0xF7,0xFF,0xC0,0x03,0xFF,0xE0, // 'h'
+	0x0F,0xC0,0x7F,0xE1,0xFF,0xE7,0xFF,0xCF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xF9,0xFF,0xE1,0xFF,0x80,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xE0, // 'i'
+	0x00,0x0F,0xC0,0x00,0x7F,0xE0,0x01,0xFF,0xE0,0x03,0xFF,0xE0,0x0F,0xFF,0xC0,0x1F,0xFF,0x80,0x3F,0xFF,0x00,0x7F,0xFE,0x00,0xFF,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xE0,0x01,0xFF,0x80,0x00,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0x7F,0xFC,0x00,0xFF,0xF8,0x01,0xFF,0xF0,0x03,0xFF,0xE0,0x07,0xFF,0xC0,0x0F,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFE,0x00,0xFF,0xFC,0x01,0xFF,0xF8,0x0F,0xFF,0xE7,0xFF,0xFF,0xCF,0xFF,0xFF,0x9F,0xFF,0xFE,0x3F,0xFF,0xFC,0x7F,0xFF,0xF0,0xFF,0xFF,0xC1,0xFF,0xFF,0x03,0xFF,0xFC,0x07,0xFF,0xE0,0x07,0xFE,0x00,0x00, // 'j'
+	0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x80,0x0F,0xFF,0xF3,0xFF,0xE0,0x07,0xFF,0xF8,0xFF,0xF8,0x03,0xFF,0xFC,0x3F,0xFE,0x01,0xFF,0xFE,0x0F,0xFF,0x80,0x7F,0xFF,0x03,0xFF,0xE0,0x3F,0xFF,0x80,0xFF,0xF8,0x1F,0xFF,0xC0,0x3F,0xFE,0x0F,0xFF,0xF0,0x0F,0xFF,0x87,0xFF,0xF8,0x03,0xFF,0xE1,0xFF,0xFC,0x00,0xFF,0xF8,0xFF,0xFE,0x00,0x3F,0xFE,0x7F,0xFF,0x00,0x0F,0xFF,0xBF,0xFF,0x80,0x03,0xFF,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xF0,0x00,0x3F,0xFF,0xFF,0xF8,0x00,0x0F,0xFF,0xFF,0xFC,0x00,0x03,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xF8,0x00,0x0F,0xFF,0xFF,0xFE,0x00,0x03,0xFF,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xF8,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x0F,0xFF,0xFF,0xFF,0xC0,0x03,0xFF,0xFF,0xFF,0xF0,0x00,0xFF,0xFF,0xFF,0xFE,0x00,0x3F,0xFF,0xDF,0xFF,0xC0,0x0F,0xFF,0xE3,0xFF,0xF0,0x03,0xFF,0xF0,0x7F,0xFE,0x00,0xFF,0xF8,0x1F,0xFF,0xC0,0x3F,0xFE,0x03,0xFF,0xF0,0x0F,0xFF,0x80,0xFF,0xFE,0x03,0xFF,0xE0,0x1F,0xFF,0xC0,0xFF,0xF8,0x07,0xFF,0xF0,0x3F,0xFE,0x00,0xFF,0xFE,0x0F,0xFF,0x80,0x1F,0xFF,0x83,0xFF,0xE0,0x07,0xFF,0xF0,0xFF,0xF8,0x00,0xFF,0xFE,0x3F,0xFE,0x00,0x3F,0xFF,0x8F,0xFF,0x80,0x07,0xFF,0xF3,0xFF,0xE0,0x00,0xFF,0xFE, // 'k'
+	0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xEF,0xFF,0xDF,0xFF,0xBF,0xFF,0x7F,0xFE,0xFF,0xFD,0xFF,0xFB,0xFF,0xF7,0xFF,0xE0, // 'l'
+	0x00,0x00,0x07,0xF8,0x00,0x0F,0xF0,0x03,0xFF,0xC0,0xFF,0xF8,0x01,0xFF,0xF8,0x0F,0xFF,0x0F,0xFF,0xF8,0x1F,0xFF,0xF0,0x3F,0xFC,0x7F,0xFF,0xF0,0xFF,0xFF,0xE0,0xFF,0xFB,0xFF,0xFF,0xC7,0xFF,0xFF,0xC3,0xFF,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0x8F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xF3,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xCF,0xFF,0xF0,0x7F,0xFF,0xF0,0x3F,0xFF,0xBF,0xFF,0x80,0x7F,0xFF,0x80,0x7F,0xFE,0xFF,0xFC,0x01,0xFF,0xFC,0x01,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0xBF,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xE0,0x03,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0x80, // 'm'
+	0x00,0x00,0x07,0xF8,0x01,0xFF,0xF0,0x7F,0xFE,0x03,0xFF,0xE1,0xFF,0xFF,0x07,0xFF,0xCF,0xFF,0xFF,0x0F,0xFF,0xBF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFC,0xFF,0xFF,0xFF,0xFF,0xF9,0xFF,0xFF,0xFF,0xFF,0xFB,0xFF,0xFE,0x0F,0xFF,0xF7,0xFF,0xF0,0x07,0xFF,0xEF,0xFF,0xC0,0x07,0xFF,0xDF,0xFF,0x80,0x0F,0xFF,0xBF,0xFF,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x7F,0xFD,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xF0,0x01,0xFF,0xF7,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0xC0,0x07,0xFF,0xDF,0xFF,0x80,0x0F,0xFF,0xBF,0xFF,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x7F,0xFD,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xF0,0x01,0xFF,0xF7,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0xC0,0x07,0xFF,0xDF,0xFF,0x80,0x0F,0xFF,0xBF,0xFF,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x7F,0xFD,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xF0,0x01,0xFF,0xF7,0xFF,0xE0,0x03,0xFF,0xEF,0xFF,0xC0,0x07,0xFF,0xDF,0xFF,0x80,0x0F,0xFF,0xBF,0xFF,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x7F,0xFD,0xFF,0xF8,0x00,0xFF,0xFB,0xFF,0xF0,0x01,0xFF,0xF0, // 'n'
+	0x00,0x01,0xFF,0x80,0x00,0x00,0x03,0xFF,0xFE,0x00,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x03,0xFF,0xFF,0xFE,0x00,0x01,0xFF,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xF8,0x00,0x7F,0xFF,0xFF,0xFF,0x00,0x3F,0xFF,0xFF,0xFF,0xE0,0x1F,0xFF,0xFF,0xFF,0xF8,0x07,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFC,0x1F,0xFF,0xC0,0xFF,0xFC,0x01,0xFF,0xF8,0x3F,0xFE,0x00,0x3F,0xFE,0x1F,0xFF,0x80,0x0F,0xFF,0xC7,0xFF,0xC0,0x01,0xFF,0xF1,0xFF,0xF0,0x00,0x7F,0xFC,0xFF,0xFC,0x00,0x1F,0xFF,0x3F,0xFE,0x00,0x07,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xFB,0xFF,0xE0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x03,0xFF,0xEF,0xFF,0x80,0x00,0xFF,0xFB,0xFF,0xE0,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x0F,0xFF,0xBF,0xFE,0x00,0x07,0xFF,0xEF,0xFF,0x80,0x01,0xFF,0xFB,0xFF,0xF0,0x00,0x7F,0xFC,0x7F,0xFC,0x00,0x1F,0xFF,0x1F,0xFF,0x00,0x07,0xFF,0xC7,0xFF,0xE0,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0xFF,0xF8,0x3F,0xFF,0x00,0x7F,0xFE,0x0F,0xFF,0xF0,0x7F,0xFF,0x81,0xFF,0xFF,0xFF,0xFF,0xC0,0x7F,0xFF,0xFF,0xFF,0xE0,0x0F,0xFF,0xFF,0xFF,0xF8,0x01,0xFF,0xFF,0xFF,0xFC,0x00,0x3F,0xFF,0xFF,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFF,0x80,0x00,0x0F,0xFF,0xFF,0x80,0x00,0x00,0xFF,0xFF,0x80,0x00,0x00,0x07,0xFF,0x00,0x00, // 'o'
+	0x00,0x00,0x1F,0xE0,0x00,0xFF,0xF0,0xFF,0xF8,0x00,0xFF,0xF1,0xFF,0xFE,0x00,0xFF,0xF3,0xFF,0xFF,0x00,0xFF,0xF7,0xFF,0xFF,0x80,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0x03,0xFF,0xF8,0xFF,0xFC,0x01,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xFC,0xFF,0xF8,0x00,0xFF,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x7F,0xFE,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0x7F,0xFC,0xFF,0xF8,0x00,0xFF,0xFC,0xFF,0xFC,0x00,0xFF,0xFC,0xFF,0xFC,0x01,0xFF,0xF8,0xFF,0xFF,0x03,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF8,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xF0,0xFF,0xFF,0xFF,0xFF,0xE0,0xFF,0xFF,0xFF,0xFF,0xC0,0xFF,0xFF,0xFF,0xFF,0x80,0xFF,0xFB,0xFF,0xFF,0x00,0xFF,0xF9,0xFF,0xFE,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0xFF,0xF8,0x1F,0xE0,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00, // 'p'
+	0x00,0x0F,0xF0,0x00,0x00,0x00,0x3F,0xFE,0x0F,0xFE,0x00,0xFF,0xFF,0x0F,0xFE,0x01,0xFF,0xFF,0x9F,0xFE,0x07,0xFF,0xFF,0xDF,0xFE,0x07,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0x81,0xFF,0xFE,0x7F,0xFF,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xF8,0x00,0x3F,0xFE,0xFF,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x3F,0xFE,0x7F,0xFE,0x00,0x7F,0xFE,0x3F,0xFF,0x00,0xFF,0xFE,0x3F,0xFF,0x81,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xFF,0xFE,0x07,0xFF,0xFF,0xFF,0xFE,0x03,0xFF,0xFF,0xFF,0xFE,0x01,0xFF,0xFF,0xBF,0xFE,0x00,0xFF,0xFF,0x3F,0xFE,0x00,0x3F,0xFE,0x3F,0xFE,0x00,0x0F,0xF0,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFE, // 'q'
+	0x00,0x00,0x1F,0xBF,0xFC,0x1F,0xEF,0xFF,0x1F,0xFB,0xFF,0xCF,0xFE,0xFF,0xF3,0xFF,0xBF,0xFD,0xFF,0xEF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFE,0xFF,0xFF,0x80,0x3F,0xFF,0x80,0x0F,0xFF,0xC0,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x03,0xFF,0xE0,0x00,0xFF,0xF8,0x00,0x3F,0xFE,0x00,0x0F,0xFF,0x80,0x00, // 'r'
+	0x00,0x03,0xFF,0x00,0x00,0x00,0x7F,0xFF,0xE0,0x00,0x03,0xFF,0xFF,0xF0,0x00,0x0F,0xFF,0xFF,0xF8,0x00,0x3F,0xFF,0xFF,0xF8,0x00,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xF8,0x0F,0xFF,0xFF,0xFF,0xF8,0x1F,0xFF,0xFF,0xFF,0xF0,0x7F,0xFF,0x07,0xFF,0xF0,0xFF,0xF8,0x07,0xFF,0xE1,0xFF,0xE0,0x07,0xFF,0xC3,0xFF,0xC0,0x0F,0xFF,0x87,0xFF,0x80,0x1F,0xFF,0x8F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0x80,0x00,0x00,0x3F,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0xFF,0xC0,0x00,0xFF,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xFF,0xF0,0x00,0x7F,0xFF,0xFF,0xF0,0x00,0x7F,0xFF,0xFF,0xF0,0x00,0x3F,0xFF,0xFF,0xF0,0x00,0x0F,0xFF,0xFF,0xE0,0x00,0x01,0xFF,0xFF,0xE0,0x00,0x00,0x7F,0xFF,0xC0,0x00,0x00,0x1F,0xFF,0x9F,0xFF,0x00,0x1F,0xFF,0x3F,0xFE,0x00,0x1F,0xFF,0x3F,0xFC,0x00,0x3F,0xFE,0x7F,0xFC,0x00,0x7F,0xF8,0xFF,0xF8,0x01,0xFF,0xF0,0xFF,0xFC,0x0F,0xFF,0xE1,0xFF,0xFF,0xFF,0xFF,0xC1,0xFF,0xFF,0xFF,0xFF,0x03,0xFF,0xFF,0xFF,0xFC,0x03,0xFF,0xFF,0xFF,0xF8,0x03,0xFF,0xFF,0xFF,0xC0,0x01,0xFF,0xFF,0xFF,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x7F,0xFF,0xC0,0x00,0x00,0x1F,0xFC,0x00,0x00, // 's'
+	0x03,0xFF,0xE0,0x00,0x7F,0xFC,0x00,0x0F,0xFF,0x80,0x01,0xFF,0xF0,0x00,0x3F,0xFE,0x00,0x07,0xFF,0xC0,0x00,0xFF,0xF8,0x00,0x1F,0xFF,0x00,0x03,0xFF,0xE0,0x00,0x7F,0xFC,0x00,0x0F,0xFF,0x80,0x7F,0xFF,0xFF,0xEF,0xFF,0xFF,0xFD,0xFF,0xFF,0xFF,0xBF,0xFF,0xFF,0xF7,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xDF,0xFF,0xFF,0xFB,0xFF,0xFF,0xFF,0x7F,0xFF,0xFF,0xE0,0x3F,0xFE,0x00,0x07,0xFF,0xC0,0x00,0xFF,0xF8,0x00,0x1F,0xFF,0x00,0x03,0xFF,0xE0,0x00,0x7F,0xFC,0x00,0x0F,0xFF,0x80,0x01,0xFF,0xF0,0x00,0x3F,0xFE,0x00,0x07,0xFF,0xC0,0x00,0xFF,0xF8,0x00,0x1F,0xFF,0x00,0x03,0xFF,0xE0,0x00,0x7F,0xFC,0x00,0x0F,0xFF,0x80,0x01,0xFF,0xF0,0x00,0x3F,0xFE,0x00,0x07,0xFF,0xC0,0x00,0xFF,0xF8,0x00,0x1F,0xFF,0x00,0x03,0xFF,0xE0,0x00,0x7F,0xFC,0x00,0x0F,0xFF,0x80,0x01,0xFF,0xF8,0x00,0x3F,0xFF,0xFC,0x07,0xFF,0xFF,0x80,0xFF,0xFF,0xF0,0x0F,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x1F,0xFF,0xF8,0x01,0xFF,0xFF,0x00,0x1F,0xFF,0xE0,0x01,0xFF,0xFC,0x00,0x07,0xFE,0x00, // 't'
+	0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0xFF,0xFC,0x00,0x7F,0xFE,0x7F,0xFC,0x00,0x7F,0xFE,0x7F,0xFE,0x00,0xFF,0xFE,0x7F,0xFF,0x03,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFE,0x7F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x3F,0xFF,0xFF,0xFF,0xFE,0x1F,0xFF,0xFF,0xFF,0xFE,0x0F,0xFF,0xFF,0xBF,0xFE,0x0F,0xFF,0xFF,0x3F,0xFE,0x03,0xFF,0xFE,0x3F,0xFE,0x01,0xFF,0xF8,0x3F,0xFE,0x00,0x3F,0xE0,0x00,0x00, // 'u'
+	0xFF,0xFC,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x07,0xFF,0xC7,0xFF,0xC0,0x03,0xFF,0xF1,0xFF,0xF8,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x3F,0xFE,0x0F,0xFF,0x80,0x0F,0xFF,0x83,0xFF,0xE0,0x07,0xFF,0xE0,0xFF,0xFC,0x01,0xFF,0xF0,0x1F,0xFF,0x00,0x7F,0xFC,0x07,0xFF,0xC0,0x1F,0xFF,0x01,0xFF,0xF0,0x0F,0xFF,0x80,0x3F,0xFE,0x03,0xFF,0xE0,0x0F,0xFF,0x80,0xFF,0xF8,0x03,0xFF,0xE0,0x3F,0xFE,0x00,0x7F,0xF8,0x1F,0xFF,0x00,0x1F,0xFF,0x07,0xFF,0xC0,0x07,0xFF,0xC1,0xFF,0xF0,0x00,0xFF,0xF0,0x7F,0xF8,0x00,0x3F,0xFC,0x3F,0xFE,0x00,0x0F,0xFF,0x8F,0xFF,0x80,0x01,0xFF,0xE3,0xFF,0xC0,0x00,0x7F,0xF8,0xFF,0xF0,0x00,0x1F,0xFE,0x7F,0xFC,0x00,0x03,0xFF,0xDF,0xFE,0x00,0x00,0xFF,0xF7,0xFF,0x80,0x00,0x3F,0xFD,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFF,0x80,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xF8,0x00,0x00,0x1F,0xFF,0xFC,0x00,0x00,0x07,0xFF,0xFF,0x00,0x00,0x01,0xFF,0xFF,0xC0,0x00,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x03,0xFF,0xFE,0x00,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00, // 'v'
+	0xFF,0xF8,0x01,0xFF,0x80,0x1F,0xFF,0x7F,0xFC,0x00,0xFF,0xC0,0x0F,0xFF,0xBF,0xFE,0x00,0x7F,0xE0,0x07,0xFF,0x8F,0xFF,0x00,0x7F,0xF0,0x03,0xFF,0xC7,0xFF,0x80,0x3F,0xFC,0x01,0xFF,0xE3,0xFF,0xC0,0x1F,0xFE,0x01,0xFF,0xF1,0xFF,0xF0,0x0F,0xFF,0x00,0xFF,0xF0,0x7F,0xF8,0x0F,0xFF,0xC0,0x7F,0xF8,0x3F,0xFC,0x07,0xFF,0xE0,0x3F,0xFC,0x1F,0xFE,0x03,0xFF,0xF0,0x1F,0xFE,0x0F,0xFF,0x01,0xFF,0xF8,0x0F,0xFF,0x03,0xFF,0x81,0xFF,0xFE,0x0F,0xFF,0x01,0xFF,0xC0,0xFF,0xFF,0x07,0xFF,0x80,0xFF,0xF0,0x7F,0xFF,0x83,0xFF,0xC0,0x7F,0xF8,0x7F,0xFF,0xC1,0xFF,0xE0,0x3F,0xFC,0x3F,0xFF,0xF0,0xFF,0xE0,0x0F,0xFE,0x1F,0xFF,0xF8,0x7F,0xF0,0x07,0xFF,0x0F,0xFF,0xFC,0x7F,0xF8,0x03,0xFF,0x8F,0xFF,0xFE,0x3F,0xFC,0x01,0xFF,0xE7,0xFC,0xFF,0x9F,0xFC,0x00,0x7F,0xF3,0xFE,0x7F,0xCF,0xFE,0x00,0x3F,0xF9,0xFF,0x3F,0xE7,0xFF,0x00,0x1F,0xFD,0xFF,0x1F,0xFB,0xFF,0x80,0x0F,0xFE,0xFF,0x87,0xFF,0xFF,0x80,0x03,0xFF,0x7F,0xC3,0xFF,0xFF,0xC0,0x01,0xFF,0xFF,0xE1,0xFF,0xFF,0xE0,0x00,0xFF,0xFF,0xE0,0x7F,0xFF,0xF0,0x00,0x7F,0xFF,0xF0,0x3F,0xFF,0xF8,0x00,0x1F,0xFF,0xF8,0x1F,0xFF,0xF8,0x00,0x0F,0xFF,0xF8,0x0F,0xFF,0xFC,0x00,0x07,0xFF,0xFC,0x03,0xFF,0xFE,0x00,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x00,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0x00,0x3F,0xFF,0x80,0x00,0x3F,0xFF,0x80,0x1F,0xFF,0xC0,0x00,0x1F,0xFF,0xC0,0x0F,0xFF,0xE0,0x00,0x0F,0xFF,0xC0,0x07,0xFF,0xE0,0x00,0x03,0xFF,0xE0,0x01,0xFF,0xF0,0x00,0x01,0xFF,0xF0,0x00,0xFF,0xF8,0x00,0x00,0xFF,0xF8,0x00,0x7F,0xFC,0x00,0x00,0x7F,0xF8,0x00,0x1F,0xFC,0x00,0x00,0x1F,0xFC,0x00,0x0F,0xFE,0x00,0x00, // 'w'
+	0x7F,0xFE,0x00,0x1F,0xFF,0x8F,0xFF,0xC0,0x0F,0xFF,0xC3,0xFF,0xF0,0x03,0xFF,0xE0,0x7F,0xFE,0x01,0xFF,0xF8,0x0F,0xFF,0x80,0x7F,0xFC,0x03,0xFF,0xF0,0x3F,0xFF,0x00,0x7F,0xFC,0x1F,0xFF,0x80,0x1F,0xFF,0x87,0xFF,0xE0,0x03,0xFF,0xE3,0xFF,0xF0,0x00,0xFF,0xFC,0xFF,0xF8,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x07,0xFF,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0x3F,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xF8,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0xFF,0x00,0x00,0x07,0xFF,0xFF,0x80,0x00,0x01,0xFF,0xFF,0xE0,0x00,0x00,0x3F,0xFF,0xF0,0x00,0x00,0x0F,0xFF,0xFC,0x00,0x00,0x03,0xFF,0xFF,0x00,0x00,0x01,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xF8,0x00,0x00,0x3F,0xFF,0xFF,0x00,0x00,0x1F,0xFF,0xFF,0xC0,0x00,0x07,0xFF,0xFF,0xF8,0x00,0x03,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0xC0,0x00,0x7F,0xFF,0xFF,0xF0,0x00,0x1F,0xFF,0x7F,0xFE,0x00,0x0F,0xFF,0xCF,0xFF,0x80,0x03,0xFF,0xE3,0xFF,0xF0,0x01,0xFF,0xF8,0x7F,0xFE,0x00,0xFF,0xFC,0x1F,0xFF,0x80,0x3F,0xFF,0x03,0xFF,0xF0,0x1F,0xFF,0x80,0xFF,0xFC,0x07,0xFF,0xE0,0x1F,0xFF,0x83,0xFF,0xF0,0x03,0xFF,0xE0,0xFF,0xFC,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x1F,0xFF,0x3F,0xFF,0x80,0x07,0xFF,0xE0, // 'x'
+	0xFF,0xFC,0x00,0x1F,0xFF,0xBF,0xFF,0x00,0x07,0xFF,0xEF,0xFF,0xC0,0x01,0xFF,0xF9,0xFF,0xF8,0x00,0xFF,0xFC,0x7F,0xFE,0x00,0x3F,0xFF,0x0F,0xFF,0x80,0x0F,0xFF,0xC3,0xFF,0xF0,0x07,0xFF,0xE0,0xFF,0xFC,0x01,0xFF,0xF8,0x1F,0xFF,0x00,0x7F,0xFE,0x07,0xFF,0xC0,0x1F,0xFF,0x01,0xFF,0xF8,0x0F,0xFF,0xC0,0x3F,0xFE,0x03,0xFF,0xE0,0x0F,0xFF,0x80,0xFF,0xF8,0x03,0xFF,0xE0,0x7F,0xFE,0x00,0x7F,0xFC,0x1F,0xFF,0x00,0x1F,0xFF,0x07,0xFF,0xC0,0x07,0xFF,0xC3,0xFF,0xF0,0x00,0xFF,0xF8,0xFF,0xF8,0x00,0x3F,0xFE,0x3F,0xFE,0x00,0x0F,0xFF,0x8F,0xFF,0x80,0x01,0xFF,0xE7,0xFF,0xC0,0x00,0x7F,0xFD,0xFF,0xF0,0x00,0x1F,0xFF,0x7F,0xFC,0x00,0x03,0xFF,0xFF,0xFE,0x00,0x00,0xFF,0xFF,0xFF,0x80,0x00,0x3F,0xFF,0xFF,0xE0,0x00,0x07,0xFF,0xFF,0xF0,0x00,0x01,0xFF,0xFF,0xFC,0x00,0x00,0x7F,0xFF,0xFF,0x00,0x00,0x0F,0xFF,0xFF,0x80,0x00,0x03,0xFF,0xFF,0xE0,0x00,0x00,0xFF,0xFF,0xF0,0x00,0x00,0x1F,0xFF,0xFC,0x00,0x00,0x07,0xFF,0xFF,0x00,0x00,0x00,0xFF,0xFF,0x80,0x00,0x00,0x3F,0xFF,0xE0,0x00,0x00,0x0F,0xFF,0xF8,0x00,0x00,0x01,0xFF,0xFC,0x00,0x00,0x00,0x7F,0xFF,0x00,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x03,0xFF,0xE0,0x00,0x00,0x00,0xFF,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x0F,0xFF,0x00,0x00,0x00,0x03,0xFF,0xC0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x7F,0xF8,0x00,0x00,0x00,0x3F,0xFE,0x00,0x00,0x00,0x3F,0xFF,0x00,0x00,0x01,0xFF,0xFF,0xC0,0x00,0x00,0x7F,0xFF,0xF0,0x00,0x00,0x1F,0xFF,0xF8,0x00,0x00,0x07,0xFF,0xFE,0x00,0x00,0x01,0xFF,0xFF,0x00,0x00,0x00,0x7F,0xFF,0x80,0x00,0x00,0x1F,0xFF,0xC0,0x00,0x00,0x07,0xFF,0xE0,0x00,0x00,0x01,0xFF,0xF0,0x00,0x00,0x00,0x3F,0xE0,0x00,0x00,0x00, // 'y'
+	0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xCF,0xFF,0xFF,0xFF,0xF8,0x00,0x00,0x3F,0xFF,0x00,0x00,0x07,0xFF,0xF0,0x00,0x00,0xFF,0xFE,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x01,0xFF,0xF8,0x00,0x00,0x3F,0xFF,0x80,0x00,0x07,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x0F,0xFF,0xC0,0x00,0x01,0xFF,0xFC,0x00,0x00,0x3F,0xFF,0x80,0x00,0x03,0xFF,0xF0,0x00,0x00,0x7F,0xFE,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x01,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0x80,0x00,0x03,0xFF,0xF0,0x00,0x00,0x7F,0xFF,0x00,0x00,0x0F,0xFF,0xE0,0x00,0x00,0xFF,0xFC,0x00,0x00,0x1F,0xFF,0x80,0x00,0x03,0xFF,0xF8,0x00,0x00,0x7F,0xFF,0xFF,0xFF,0xE7,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE,0xFF,0xFF,0xFF,0xFF,0xEF,0xFF,0xFF,0xFF,0xFE, // 'z'
+	0x00,0x00,0x30,0x00,0x01,0xE0,0x00,0x0F,0xE0,0x00,0x3F,0xC0,0x01,0xFF,0xC0,0x07,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFC,0x00,0xFF,0xF0,0x01,0xFF,0xC0,0x07,0xFF,0x80,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x7F,0xF8,0x00,0xFF,0xF0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0xFF,0xF0,0x01,0xFF,0xE0,0x03,0xFF,0x80,0x0F,0xFF,0x00,0x7F,0xFE,0x03,0xFF,0xF8,0x07,0xFF,0xE0,0x0F,0xFF,0x80,0x1F,0xFE,0x00,0x3F,0xF0,0x00,0x7F,0xF8,0x00,0xFF,0xF8,0x01,0xFF,0xF8,0x03,0xFF,0xF8,0x01,0xFF,0xF8,0x00,0xFF,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xF0,0x01,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0xC0,0x07,0xFF,0x80,0x07,0xFF,0x80,0x07,0xFF,0x80,0x0F,0xFF,0x80,0x0F,0xFF,0x00,0x0F,0xFE,0x00,0x0F,0xF8,0x00,0x07,0xF0,0x00,0x03,0xE0,0x00,0x01,0x80, // '{'
+	0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE,0xFE, // '|'
+	0x30,0x00,0x00,0x78,0x00,0x01,0xFC,0x00,0x03,0xFE,0x00,0x0F,0xFE,0x00,0x1F,0xFE,0x00,0x3F,0xFE,0x00,0x3F,0xFC,0x00,0x3F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xE0,0x03,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xF0,0x01,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0xC0,0x07,0xFF,0xE0,0x07,0xFF,0xF0,0x07,0xFF,0xE0,0x07,0xFF,0xC0,0x07,0xFF,0x80,0x03,0xFF,0x00,0x1F,0xFE,0x00,0x7F,0xFC,0x01,0xFF,0xF8,0x07,0xFF,0xF0,0x1F,0xFF,0x80,0x3F,0xFC,0x00,0x7F,0xF0,0x01,0xFF,0xE0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x01,0xFF,0xC0,0x03,0xFF,0x80,0x07,0xFF,0x00,0x0F,0xFE,0x00,0x1F,0xFC,0x00,0x3F,0xF8,0x00,0x7F,0xF0,0x00,0xFF,0xE0,0x03,0xFF,0xC0,0x07,0xFF,0x80,0x0F,0xFE,0x00,0x3F,0xFC,0x00,0x7F,0xF8,0x01,0xFF,0xE0,0x07,0xFF,0x80,0x1F,0xFF,0x00,0x3F,0xFC,0x00,0x7F,0xF0,0x00,0x7F,0xC0,0x00,0xFE,0x00,0x00,0xF0,0x00,0x01,0x80,0x00,0x00 // '}'
+};
+const GFXglyph Roboto_Black_80Glyphs[] = {
+// bitmapOffset, width, height, xAdvance, xOffset, yOffset
+	  {     0,   1,   1,  21,    0,    0 }, // ' '
+	  {     1,  16,  58,  23,    4,  -57 }, // '!'
+	  {   117,  24,  22,  26,    1,  -60 }, // '"'
+	  {   183,  45,  57,  47,    1,  -57 }, // '#'
+	  {   504,  41,  75,  47,    3,  -66 }, // '$'
+	  {   889,  53,  59,  60,    4,  -58 }, // '%'
+	  {  1280,  52,  59,  55,    2,  -58 }, // '&'
+	  {  1664,  11,  22,  13,    1,  -60 }, // '''
+	  {  1695,  23,  81,  29,    5,  -63 }, // '('
+	  {  1928,  24,  81,  29,    1,  -63 }, // ')'
+	  {  2171,  37,  34,  38,    1,  -57 }, // '*'
+	  {  2329,  40,  41,  44,    2,  -47 }, // '+'
+	  {  2534,  16,  25,  23,    2,  -10 }, // ','
+	  {  2584,  24,  10,  37,    6,  -30 }, // '-'
+	  {  2614,  15,  13,  25,    5,  -13 }, // '.'
+	  {  2639,  30,  62,  29,   -1,  -57 }, // '/'
+	  {  2872,  41,  59,  47,    3,  -58 }, // '0'
+	  {  3175,  28,  57,  47,    6,  -57 }, // '1'
+	  {  3375,  42,  58,  47,    2,  -58 }, // '2'
+	  {  3680,  42,  59,  47,    2,  -58 }, // '3'
+	  {  3990,  43,  57,  47,    2,  -57 }, // '4'
+	  {  4297,  41,  58,  47,    3,  -57 }, // '5'
+	  {  4595,  42,  59,  47,    3,  -58 }, // '6'
+	  {  4905,  42,  57,  47,    2,  -57 }, // '7'
+	  {  5205,  41,  59,  47,    3,  -58 }, // '8'
+	  {  5508,  41,  59,  47,    3,  -58 }, // '9'
+	  {  5811,  15,  44,  25,    5,  -44 }, // ':'
+	  {  5894,  17,  59,  24,    3,  -44 }, // ';'
+	  {  6020,  35,  39,  42,    2,  -43 }, // '<'
+	  {  6191,  37,  27,  48,    5,  -38 }, // '='
+	  {  6316,  36,  39,  42,    4,  -43 }, // '>'
+	  {  6492,  38,  58,  42,    1,  -58 }, // '?'
+	  {  6768,  68,  73,  73,    2,  -55 }, // '@'
+	  {  7389,  56,  57,  56,    0,  -57 }, // 'A'
+	  {  7788,  46,  57,  53,    4,  -57 }, // 'B'
+	  {  8116,  49,  59,  54,    3,  -58 }, // 'C'
+	  {  8478,  46,  57,  53,    4,  -57 }, // 'D'
+	  {  8806,  41,  57,  46,    4,  -57 }, // 'E'
+	  {  9099,  39,  57,  45,    4,  -57 }, // 'F'
+	  {  9377,  49,  59,  56,    3,  -58 }, // 'G'
+	  {  9739,  49,  57,  57,    4,  -57 }, // 'H'
+	  { 10089,  15,  57,  25,    5,  -57 }, // 'I'
+	  { 10196,  41,  58,  46,    1,  -57 }, // 'J'
+	  { 10494,  49,  57,  52,    4,  -57 }, // 'K'
+	  { 10844,  39,  57,  44,    4,  -57 }, // 'L'
+	  { 11122,  63,  57,  71,    4,  -57 }, // 'M'
+	  { 11571,  49,  57,  57,    4,  -57 }, // 'N'
+	  { 11921,  50,  59,  56,    3,  -58 }, // 'O'
+	  { 12290,  46,  57,  53,    4,  -57 }, // 'P'
+	  { 12618,  50,  69,  56,    3,  -58 }, // 'Q'
+	  { 13050,  47,  57,  53,    4,  -57 }, // 'R'
+	  { 13385,  46,  59,  51,    2,  -58 }, // 'S'
+	  { 13725,  49,  57,  51,    1,  -57 }, // 'T'
+	  { 14075,  46,  58,  54,    4,  -57 }, // 'U'
+	  { 14409,  54,  57,  54,    0,  -57 }, // 'V'
+	  { 14794,  69,  57,  71,    1,  -57 }, // 'W'
+	  { 15286,  52,  57,  52,    0,  -57 }, // 'X'
+	  { 15657,  51,  57,  51,    0,  -57 }, // 'Y'
+	  { 16021,  46,  57,  50,    2,  -57 }, // 'Z'
+	  { 16349,  19,  81,  24,    4,  -67 }, // '['
+	  { 16542,  39,  62,  35,   -1,  -57 }, // '\'
+	  { 16845,  18,  81,  24,    1,  -67 }, // ']'
+	  { 17028,  34,  28,  37,    2,  -57 }, // '^'
+	  { 17147,  36,  10,  36,    0,    0 }, // '_'
+	  { 17192,  23,  12,  28,    2,  -60 }, // '`'
+	  { 17227,  40,  44,  43,    2,  -43 }, // 'a'
+	  { 17447,  40,  61,  46,    4,  -60 }, // 'b'
+	  { 17752,  39,  44,  43,    2,  -43 }, // 'c'
+	  { 17967,  40,  61,  46,    2,  -60 }, // 'd'
+	  { 18272,  41,  44,  45,    2,  -43 }, // 'e'
+	  { 18498,  30,  61,  30,    0,  -61 }, // 'f'
+	  { 18727,  41,  60,  47,    2,  -43 }, // 'g'
+	  { 19035,  39,  60,  46,    3,  -60 }, // 'h'
+	  { 19328,  15,  60,  23,    4,  -60 }, // 'i'
+	  { 19441,  23,  77,  23,   -4,  -60 }, // 'j'
+	  { 19663,  42,  60,  45,    4,  -60 }, // 'k'
+	  { 19978,  15,  60,  23,    4,  -60 }, // 'l'
+	  { 20091,  62,  43,  70,    4,  -43 }, // 'm'
+	  { 20425,  39,  43,  46,    3,  -43 }, // 'n'
+	  { 20635,  42,  44,  46,    2,  -43 }, // 'o'
+	  { 20866,  40,  59,  46,    4,  -43 }, // 'p'
+	  { 21161,  40,  59,  46,    2,  -43 }, // 'q'
+	  { 21456,  26,  43,  31,    4,  -43 }, // 'r'
+	  { 21596,  39,  44,  42,    1,  -43 }, // 's'
+	  { 21811,  27,  54,  28,    0,  -53 }, // 't'
+	  { 21994,  40,  43,  46,    3,  -42 }, // 'u'
+	  { 22209,  42,  42,  42,    0,  -42 }, // 'v'
+	  { 22430,  57,  42,  59,    1,  -42 }, // 'w'
+	  { 22730,  42,  42,  42,    0,  -42 }, // 'x'
+	  { 22951,  42,  59,  42,    0,  -42 }, // 'y'
+	  { 23261,  36,  42,  42,    3,  -42 }, // 'z'
+	  { 23450,  23,  76,  27,    2,  -62 }, // '{'
+	  { 23669,   8,  68,  21,    7,  -57 }, // '|'
+	  { 23737,  23,  76,  27,    2,  -62 } // '}'
+};
+const GFXfont Roboto_Black_80 = {
+(uint8_t  *)Roboto_Black_80Bitmaps,(GFXglyph *)Roboto_Black_80Glyphs,0x20, 0x7E, 95};
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/app_cfg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/app_cfg.h
new file mode 100644
index 00000000..91bf13dd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/app_cfg.h
@@ -0,0 +1,128 @@
+/********************************************************************************************************
+ * @file    app_cfg.h
+ *
+ * @brief   This is the header file for app_cfg
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C"
+{
+#endif
+
+#define ON 1
+#define OFF 0
+
+#ifndef MCU_CORE_8258
+#define MCU_CORE_8258 1
+#endif
+
+#define RAM _attribute_data_retention_ // short version, this is needed to keep the values in ram after sleep
+
+/**********************************************************************
+ * Version configuration
+ */
+#include "version_cfg.h"
+
+/* PM */
+#define PM_ENABLE ON
+
+
+/* Board ID */
+#define BOARD_8258_DIY 10
+
+/* Board define */
+#if (CHIP_TYPE == TLSR_8258_1M)
+#define FLASH_CAP_SIZE_1M 1
+#endif
+#define BOARD BOARD_8258_DIY // BOARD_8258_DONGLE //BOARD_TB_04 //BOARD_8258_EVK //
+#define CLOCK_SYS_CLOCK_HZ 24000000
+/************************* For 512K Flash only ***************************************/
+/* Flash map:
+    0x00000 Old Firmware bin
+    0x34000 NV_1
+    0x40000 OTA New bin storage Area
+    0x76000 MAC address
+    0x77000 C_Cfg_Info
+    0x78000 U_Cfg_Info
+    0x7A000 NV_2
+    0x80000 End Flash
+ */
+#define USER_DATA_SIZE 0x34000
+#define BEGIN_USER_DATA1 0x00000
+#define END_USER_DATA1 (BEGIN_USER_DATA1 + USER_DATA_SIZE)
+#define BEGIN_USER_DATA2 0x40000
+#define END_USER_DATA2 (BEGIN_USER_DATA2 + USER_DATA_SIZE)
+    //    #define GEN_USER_CFG_DATA           END_USER_DATA2
+#define NV_ITEM_APP_USER_CFG (NV_ITEM_APP_GP_TRANS_TABLE + 1) // see sdk/proj/drivers/drv_nv.h
+
+/* Board include */
+#include "board_8258_diy.h"
+
+/* Voltage detect module */
+/* If VOLTAGE_DETECT_ENABLE is set,
+ * 1) if MCU_CORE_826x is defined, the DRV_ADC_VBAT_MODE mode is used by default,
+ * and there is no need to configure the detection IO port;
+ * 2) if MCU_CORE_8258 or MCU_CORE_8278 is defined, the DRV_ADC_VBAT_MODE mode is used by default,
+ * we need to configure the detection IO port, and the IO must be in a floating state.
+ * 3) if MCU_CORE_B91 is defined, the DRV_ADC_BASE_MODE mode is used by default,
+ * we need to configure the detection IO port, and the IO must be connected to the target under test,
+ * such as VCC.
+ */
+#define VOLTAGE_DETECT_ENABLE OFF
+
+#if defined(MCU_CORE_826x)
+#define VOLTAGE_DETECT_ADC_PIN 0
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+#define VOLTAGE_DETECT_ADC_PIN GPIO_PB7
+#elif defined(MCU_CORE_B91)
+#define VOLTAGE_DETECT_ADC_PIN ADC_GPIO_PB0
+#endif
+
+/* Watch dog module */
+#define MODULE_WATCHDOG_ENABLE OFF
+
+/* UART module */
+#define MODULE_UART_ENABLE OFF
+
+    /**********************************************************************
+     * EV configuration
+     */
+    typedef enum
+    {
+        EV_POLL_ED_DETECT,
+        EV_POLL_HCI,
+        EV_POLL_IDLE,
+        EV_POLL_MAX,
+    } ev_poll_e;
+
+enum{
+	CLOCK_SYS_CLOCK_1S = CLOCK_SYS_CLOCK_HZ,
+	CLOCK_SYS_CLOCK_1MS = (CLOCK_SYS_CLOCK_1S / 1000),
+	CLOCK_SYS_CLOCK_1US = (CLOCK_SYS_CLOCK_1S / 1000000),
+};
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.c
new file mode 100644
index 00000000..e2d6b908
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.c
@@ -0,0 +1,85 @@
+#include <stdint.h>
+#include "tl_common.h"
+
+#include "battery.h"
+
+RAM volatile unsigned int adc_dat_buf[8];
+
+void adc_bat_init(void)
+{
+	adc_power_on_sar_adc(0);
+	gpio_set_output_en(GPIO_PB7, 1);
+	gpio_set_input_en(GPIO_PB7, 0);
+	gpio_write(GPIO_PB7, 1);
+	adc_set_sample_clk(5);
+	adc_set_left_right_gain_bias(GAIN_STAGE_BIAS_PER100, GAIN_STAGE_BIAS_PER100);
+	adc_set_chn_enable_and_max_state_cnt(ADC_MISC_CHN, 2);
+	adc_set_state_length(240, 0, 10);
+	analog_write(anareg_adc_res_m, RES14 | FLD_ADC_EN_DIFF_CHN_M);
+	adc_set_ain_chn_misc(B7P, GND);
+	adc_set_ref_voltage(ADC_MISC_CHN, ADC_VREF_1P2V);
+	adc_set_tsample_cycle_chn_misc(SAMPLING_CYCLES_6);
+	adc_set_ain_pre_scaler(ADC_PRESCALER_1F8);
+	adc_power_on_sar_adc(1);
+}
+
+uint16_t get_battery_mv()
+{
+	uint16_t temp;
+	int i, j;
+	adc_bat_init();
+	adc_reset_adc_module();
+	u32 t0 = clock_time();
+
+	uint16_t adc_sample[8] = {0};
+	u32 adc_result;
+	for (i = 0; i < 8; i++)
+	{
+		adc_dat_buf[i] = 0;
+	}
+	while (!clock_time_exceed(t0, 25))
+		;
+	adc_config_misc_channel_buf((uint16_t *)adc_dat_buf, 8 << 2);
+	dfifo_enable_dfifo2();
+
+	for (i = 0; i < 8; i++)
+	{
+		while (!adc_dat_buf[i])
+			;
+		if (adc_dat_buf[i] & BIT(13))
+		{
+			adc_sample[i] = 0;
+		}
+		else
+		{
+			adc_sample[i] = ((uint16_t)adc_dat_buf[i] & 0x1FFF);
+		}
+		if (i)
+		{
+			if (adc_sample[i] < adc_sample[i - 1])
+			{
+				temp = adc_sample[i];
+				adc_sample[i] = adc_sample[i - 1];
+				for (j = i - 1; j >= 0 && adc_sample[j] > temp; j--)
+				{
+					adc_sample[j + 1] = adc_sample[j];
+				}
+				adc_sample[j + 1] = temp;
+			}
+		}
+	}
+	dfifo_disable_dfifo2();
+	u32 adc_average = (adc_sample[2] + adc_sample[3] + adc_sample[4] + adc_sample[5]) / 4;
+	adc_result = adc_average;
+	return (adc_result * 1175) >> 10;
+}
+
+uint8_t get_battery_level(uint16_t battery_mv)
+{
+	uint8_t battery_level = (battery_mv - 2200) / (31 - 22);
+	if (battery_level > 100)
+		battery_level = 100;
+	if (battery_mv < 2200)
+		battery_level = 0;
+	return battery_level;
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.h
new file mode 100644
index 00000000..8bb71657
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/battery.h
@@ -0,0 +1,6 @@
+#pragma once
+
+#include <stdint.h>
+
+uint16_t get_battery_mv();
+uint8_t get_battery_level(uint16_t battery_mv);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/bitmaps.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/bitmaps.h
new file mode 100644
index 00000000..645b82bc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/bitmaps.h
@@ -0,0 +1,298 @@
+#ifndef _BITMAPS_H_
+#define _BITMAPS_H_
+
+// images generated by https://lvgl.io/tools/imageconverter, prepended with width, height. "CF_INDEXED_1_BIT"-mode, little-endian
+#include <stdint.h>
+
+#include "screen.h"
+
+static const uint8_t  oepli[] = {
+  128, 26,
+    0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x1c, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x9f, 0x80, 0x00, 0x00, 0x00, 0x00, 0x38, 0x70, 0x01, 0xc0, 
+  0x7f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x9f, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x38, 0x70, 0x01, 0xc0, 
+  0x7f, 0x00, 0x00, 0x00, 0x00, 0x1f, 0x9f, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x38, 0x70, 0x01, 0xc0, 
+  0xf7, 0x80, 0x00, 0x00, 0x00, 0x1c, 0x1c, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x01, 0xc0, 
+  0xe3, 0x80, 0x00, 0x00, 0x00, 0x1c, 0x1c, 0xe0, 0x00, 0x00, 0x00, 0x00, 0x38, 0x00, 0x01, 0xc0, 
+  0xe3, 0x9d, 0xc1, 0xc7, 0x70, 0x1f, 0x9c, 0xe7, 0x73, 0xb8, 0x71, 0xd0, 0x38, 0x73, 0xb9, 0xc7, 
+  0xe3, 0x9f, 0xe3, 0xe7, 0xf8, 0x1f, 0x9f, 0xef, 0xf3, 0xfc, 0xf9, 0xf0, 0x38, 0x73, 0xfd, 0xce, 
+  0xe3, 0x9f, 0xe7, 0x77, 0xf8, 0x1f, 0x9f, 0xcf, 0xf3, 0xfd, 0xdd, 0xf0, 0x38, 0x73, 0xfd, 0xdc, 
+  0xe3, 0x9c, 0xe7, 0xf7, 0x38, 0x1c, 0x1f, 0x8e, 0x73, 0x9d, 0xfd, 0xc0, 0x38, 0x73, 0x9d, 0xf8, 
+  0xe3, 0x9c, 0xe7, 0xf7, 0x38, 0x1c, 0x1c, 0x0e, 0x73, 0x9d, 0xfd, 0xc0, 0x38, 0x73, 0x9d, 0xf8, 
+  0xf7, 0x9c, 0xe7, 0x07, 0x38, 0x1c, 0x1c, 0x0e, 0x73, 0x9d, 0xc1, 0xc0, 0x38, 0x73, 0x9d, 0xdc, 
+  0x7f, 0x1f, 0xe7, 0xf7, 0x38, 0x1f, 0x9c, 0x0f, 0xf3, 0xfd, 0xfd, 0xc0, 0x3f, 0x73, 0x9d, 0xdc, 
+  0x7f, 0x1f, 0xe3, 0xe7, 0x38, 0x1f, 0x9c, 0x0f, 0xf3, 0xfc, 0xf9, 0xc0, 0x3f, 0x73, 0x9d, 0xce, 
+  0x1e, 0x1d, 0xc1, 0xc7, 0x38, 0x1f, 0x9c, 0x07, 0x73, 0xb8, 0x71, 0xc0, 0x3f, 0x73, 0x9d, 0xc7, 
+  0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x1c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff,
+};
+
+static const uint8_t  cloud[] = {
+  128, 50, 
+  0x00, 0x08, 0x82, 0xa2, 0xab, 0x55, 0xbf, 0xff, 0xff, 0xff, 0x7d, 0xb4, 0x62, 0x28, 0x00, 0x00, 
+  0x00, 0x10, 0x10, 0x11, 0x76, 0xff, 0x7b, 0xff, 0xff, 0x7f, 0xb7, 0xa9, 0x55, 0x50, 0x51, 0x00, 
+  0x00, 0x29, 0x22, 0x96, 0x6f, 0xf7, 0xbf, 0xff, 0xff, 0xff, 0xea, 0xe6, 0x22, 0xaa, 0x08, 0x00, 
+  0x00, 0x02, 0x54, 0x2a, 0xbf, 0x3f, 0x7f, 0xff, 0xff, 0xff, 0xfd, 0x59, 0xb4, 0x10, 0x20, 0x00, 
+  0x00, 0x24, 0x23, 0xb5, 0xb5, 0xdf, 0xff, 0xff, 0xff, 0xff, 0xf6, 0xae, 0x48, 0x55, 0x10, 0x00, 
+  0x00, 0x88, 0x90, 0x54, 0x6a, 0xef, 0xff, 0xff, 0xff, 0xff, 0xfb, 0xf5, 0xa3, 0x82, 0x00, 0x00, 
+  0x00, 0x01, 0x2d, 0xa3, 0xb3, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf6, 0xbe, 0x4e, 0x52, 0x09, 0x00, 
+  0x04, 0x90, 0x02, 0x0d, 0x55, 0xdf, 0xff, 0xff, 0xff, 0xff, 0xfd, 0xdd, 0x68, 0xa9, 0x00, 0x10, 
+  0x00, 0x49, 0x0c, 0xfb, 0xab, 0x6f, 0xff, 0xff, 0xff, 0xff, 0xfe, 0xeb, 0x95, 0x5a, 0x00, 0x20, 
+  0x00, 0x12, 0x91, 0x22, 0xbf, 0xdf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf5, 0x65, 0x81, 0x40, 0x40, 
+  0x00, 0x28, 0x12, 0x7d, 0xef, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xef, 0xab, 0x28, 0x00, 0x00, 
+  0x00, 0x42, 0x0a, 0x97, 0x75, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xf7, 0x4a, 0xc2, 0x04, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x08, 0x02, 0x9c, 0xdf, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x6a, 0x6a, 0x8d, 0x00, 0x20, 
+  0x00, 0x04, 0x4d, 0x72, 0xaa, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xd5, 0xd5, 0x74, 0x80, 0x00, 
+  0x02, 0x40, 0x12, 0x8e, 0xdf, 0xfd, 0xff, 0xff, 0xff, 0xff, 0xff, 0xae, 0xaa, 0x0a, 0x11, 0x20, 
+  0x00, 0x20, 0x52, 0x5f, 0xf5, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xff, 0x72, 0x94, 0xaa, 0x24, 0x00, 
+  0x00, 0x01, 0x0a, 0xab, 0x6f, 0x77, 0xff, 0xff, 0xff, 0xff, 0xfd, 0xaf, 0x54, 0x54, 0x88, 0x00, 
+  0x00, 0x04, 0x80, 0x4d, 0x95, 0xeb, 0xff, 0xff, 0xff, 0xff, 0x5b, 0x58, 0xb5, 0x51, 0x40, 0x00, 
+  0x00, 0x08, 0x08, 0xa6, 0xb3, 0xf7, 0x7f, 0xff, 0xff, 0xff, 0xff, 0xad, 0x4a, 0xa0, 0x10, 0x00, 
+  0x00, 0x02, 0x96, 0x41, 0xdc, 0xae, 0xff, 0xff, 0xff, 0xff, 0xfd, 0xbf, 0xea, 0x48, 0x02, 0x00, 
+  0x00, 0x00, 0x09, 0x3e, 0xab, 0x75, 0xef, 0xff, 0xff, 0xff, 0xff, 0xd4, 0xb1, 0x21, 0x08, 0x00, 
+  0x00, 0x00, 0x0a, 0xc3, 0x5d, 0xff, 0x7f, 0xff, 0xff, 0xff, 0xef, 0xef, 0x44, 0x4a, 0x64, 0x80, 
+  0x00, 0x00, 0xa1, 0x52, 0xa6, 0xef, 0xef, 0xff, 0xff, 0xff, 0xd6, 0xca, 0xf5, 0x10, 0x18, 0x00, 
+  0x00, 0x00, 0x02, 0x15, 0x4b, 0xd5, 0xdf, 0xff, 0xff, 0xf7, 0xeb, 0xd4, 0xd8, 0x85, 0x00, 0x00, 
+};
+
+static const uint8_t  receive[] = {
+  56, 56, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xc0, 
+  0x00, 0x00, 0x00, 0x00, 0x01, 0xff, 0xf0, 
+  0x00, 0x00, 0x00, 0x00, 0x0f, 0xff, 0xf0, 
+  0x00, 0x00, 0x00, 0x00, 0x7f, 0xff, 0xf0, 
+  0x00, 0x00, 0x00, 0x01, 0xff, 0xff, 0xf0, 
+  0x00, 0x00, 0x00, 0x07, 0xff, 0xff, 0xc0, 
+  0x00, 0x00, 0x00, 0x1f, 0xff, 0x80, 0x00, 
+  0x00, 0x00, 0x00, 0x7f, 0xf8, 0x00, 0x00, 
+  0x00, 0x00, 0x00, 0xff, 0xe0, 0x00, 0x00, 
+  0x00, 0x00, 0x01, 0xff, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x07, 0xfe, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x0f, 0xf8, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x1f, 0xe0, 0x00, 0x00, 0x00, 
+  0x00, 0x00, 0x3f, 0xc0, 0x00, 0x03, 0xe0, 
+  0x00, 0x00, 0x7f, 0x80, 0x00, 0x7f, 0xf0, 
+  0x00, 0x00, 0xfe, 0x00, 0x03, 0xff, 0xf0, 
+  0x00, 0x01, 0xfc, 0x00, 0x0f, 0xff, 0xf0, 
+  0x00, 0x01, 0xf8, 0x00, 0x3f, 0xff, 0xf0, 
+  0x00, 0x03, 0xf8, 0x00, 0xff, 0xff, 0x80, 
+  0x00, 0x07, 0xf0, 0x01, 0xff, 0xe0, 0x00, 
+  0x00, 0x0f, 0xe0, 0x03, 0xff, 0x00, 0x00, 
+  0x00, 0x0f, 0xc0, 0x0f, 0xf8, 0x00, 0x00, 
+  0x00, 0x1f, 0x80, 0x1f, 0xf0, 0x00, 0x00, 
+  0x00, 0x1f, 0x80, 0x3f, 0xc0, 0x00, 0x00, 
+  0x00, 0x3f, 0x00, 0x3f, 0x80, 0x00, 0x00, 
+  0x00, 0x3f, 0x00, 0x7f, 0x00, 0x00, 0x00, 
+  0x00, 0x7e, 0x00, 0xfe, 0x00, 0x07, 0xe0, 
+  0x00, 0x7e, 0x01, 0xfc, 0x00, 0x1f, 0xf0, 
+  0x00, 0xfc, 0x01, 0xf8, 0x00, 0x7f, 0xf0, 
+  0x00, 0xfc, 0x03, 0xf0, 0x01, 0xff, 0xf0, 
+  0x00, 0xf8, 0x03, 0xf0, 0x03, 0xff, 0xf0, 
+  0x01, 0xf8, 0x07, 0xe0, 0x07, 0xff, 0x00, 
+  0x01, 0xf8, 0x07, 0xe0, 0x0f, 0xf0, 0x00, 
+  0x01, 0xf0, 0x0f, 0xc0, 0x1f, 0xe0, 0x00, 
+  0x01, 0xf0, 0x0f, 0xc0, 0x3f, 0x80, 0x00, 
+  0x03, 0xf0, 0x0f, 0x80, 0x3f, 0x00, 0x00, 
+  0x03, 0xf0, 0x1f, 0x80, 0x7e, 0x00, 0x00, 
+  0x03, 0xe0, 0x1f, 0x80, 0x7e, 0x00, 0x00, 
+  0x03, 0xe0, 0x1f, 0x00, 0xfc, 0x01, 0xe0, 
+  0x03, 0xe0, 0x1f, 0x00, 0xfc, 0x07, 0xf8, 
+  0x03, 0xe0, 0x1f, 0x00, 0xf8, 0x0f, 0xfc, 
+  0x03, 0xe0, 0x3f, 0x00, 0xf8, 0x0f, 0xfc, 
+  0x03, 0xe0, 0x3f, 0x01, 0xf8, 0x1f, 0xfe, 
+  0x03, 0xe0, 0x3f, 0x01, 0xf8, 0x1f, 0xfe, 
+  0x03, 0xe0, 0x3f, 0x01, 0xf8, 0x1f, 0xfe, 
+  0x03, 0xc0, 0x3e, 0x01, 0xf0, 0x1f, 0xfe, 
+  0x01, 0xc0, 0x1e, 0x00, 0xf0, 0x0f, 0xfc, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x0f, 0xfc, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x07, 0xf8, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x01, 0xe0, 
+  0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+};
+
+
+static const uint8_t  failed[] = {
+  48, 48,
+  0x00, 0x00, 0x1f, 0xf8, 0x00, 0x00, 
+  0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 
+  0x00, 0x03, 0xff, 0xff, 0xe0, 0x00, 
+  0x00, 0x0f, 0xff, 0xff, 0xf0, 0x00, 
+  0x00, 0x3f, 0xff, 0xff, 0xfc, 0x00, 
+  0x00, 0x7f, 0xf0, 0x0f, 0xfe, 0x00, 
+  0x00, 0xff, 0x80, 0x01, 0xff, 0x00, 
+  0x01, 0xfe, 0x00, 0x00, 0x7f, 0x80, 
+  0x03, 0xf8, 0x00, 0x00, 0x1f, 0xc0, 
+  0x07, 0xf0, 0x00, 0x00, 0x3f, 0xe0, 
+  0x0f, 0xe0, 0x00, 0x00, 0x7f, 0xf0, 
+  0x0f, 0xc0, 0x00, 0x00, 0xff, 0xf0, 
+  0x1f, 0x80, 0x00, 0x01, 0xff, 0xf8, 
+  0x1f, 0x00, 0x00, 0x03, 0xff, 0xf8, 
+  0x3f, 0x00, 0x00, 0x07, 0xfe, 0xfc, 
+  0x3e, 0x00, 0x00, 0x0f, 0xfc, 0x7c, 
+  0x7e, 0x00, 0x00, 0x1f, 0xf8, 0x7e, 
+  0x7c, 0x00, 0x00, 0x3f, 0xf0, 0x3e, 
+  0x7c, 0x00, 0x00, 0x7f, 0xe0, 0x3e, 
+  0xfc, 0x00, 0x00, 0xff, 0xc0, 0x3f, 
+  0xf8, 0x00, 0x01, 0xff, 0x80, 0x1f, 
+  0xf8, 0x00, 0x03, 0xff, 0x00, 0x1f, 
+  0xf8, 0x00, 0x07, 0xfe, 0x00, 0x1f, 
+  0xf8, 0x00, 0x0f, 0xfc, 0x00, 0x1f, 
+  0xf8, 0x00, 0x1f, 0xf8, 0x00, 0x1f, 
+  0xf8, 0x00, 0x3f, 0xf0, 0x00, 0x1f, 
+  0xf8, 0x00, 0x7f, 0xe0, 0x00, 0x1f, 
+  0xf8, 0x00, 0xff, 0xc0, 0x00, 0x1f, 
+  0xfc, 0x01, 0xff, 0x80, 0x00, 0x3f, 
+  0x7c, 0x03, 0xff, 0x00, 0x00, 0x3e, 
+  0x7c, 0x07, 0xfe, 0x00, 0x00, 0x3e, 
+  0x7e, 0x0f, 0xfc, 0x00, 0x00, 0x7e, 
+  0x3e, 0x1f, 0xf8, 0x00, 0x00, 0x7c, 
+  0x3f, 0x3f, 0xf0, 0x00, 0x00, 0xfc, 
+  0x3f, 0x7f, 0xe0, 0x00, 0x00, 0xfc, 
+  0x1f, 0xff, 0xc0, 0x00, 0x01, 0xf8, 
+  0x0f, 0xff, 0x80, 0x00, 0x03, 0xf0, 
+  0x0f, 0xff, 0x00, 0x00, 0x07, 0xf0, 
+  0x07, 0xfe, 0x00, 0x00, 0x0f, 0xe0, 
+  0x03, 0xfc, 0x00, 0x00, 0x1f, 0xc0, 
+  0x01, 0xfe, 0x00, 0x00, 0x7f, 0x80, 
+  0x00, 0xff, 0x80, 0x01, 0xff, 0x00, 
+  0x00, 0x7f, 0xf0, 0x0f, 0xfe, 0x00, 
+  0x00, 0x3f, 0xff, 0xff, 0xfc, 0x00, 
+  0x00, 0x0f, 0xff, 0xff, 0xf0, 0x00, 
+  0x00, 0x03, 0xff, 0xff, 0xe0, 0x00, 
+  0x00, 0x00, 0xff, 0xff, 0x00, 0x00, 
+  0x00, 0x00, 0x1f, 0xf8, 0x00, 0x00, 
+};
+
+#if (SCREEN_WIDTH != 128) 
+static const uint8_t  ant[] = {
+  16, 16,
+  0x00, 0x40, 
+  0x02, 0x20, 
+  0x01, 0x20, 
+  0x11, 0x20, 
+  0x11, 0x20, 
+  0x12, 0x20, 
+  0x28, 0x40, 
+  0x28, 0x00, 
+  0x28, 0x00, 
+  0x44, 0x00, 
+  0x44, 0x00, 
+  0x44, 0x00, 
+  0x44, 0x00, 
+  0x82, 0x00, 
+  0x82, 0x00, 
+  0xfe, 0x00, 
+};
+#else
+static const uint8_t  ant[] = {
+  // rotated 90 degrees
+  16,16,
+  0x00, 0x00, 
+  0x00, 0x00, 
+  0x00, 0x00, 
+  0x00, 0x00, 
+  0x00, 0x00, 
+  0x7c, 0x00, 
+  0x82, 0x00, 
+  0x00, 0x00, 
+  0x38, 0x00, 
+  0x44, 0x07, 
+  0x00, 0x79, 
+  0x03, 0x81, 
+  0x1c, 0x01, 
+  0x03, 0x81, 
+  0x00, 0x79, 
+  0x00, 0x07, 
+};
+#endif
+static const uint8_t  cross[] = {
+  8,8,
+  0x00, 
+  0x63, 
+  0x77, 
+  0x3e, 
+  0x1c, 
+  0x3e, 
+  0x77, 
+  0x63
+};
+
+#if (SCREEN_WIDTH != 128) 
+static const uint8_t  battery[] = {
+  16,10,
+  0x00, 0x00, 
+  0x7f, 0xfc, 
+  0x40, 0x04, 
+  0x58, 0x06, 
+  0x58, 0x06, 
+  0x58, 0x06, 
+  0x58, 0x06, 
+  0x40, 0x04, 
+  0x7f, 0xfc, 
+  0x00, 0x00, 
+};
+#else
+// this battery symbol is rotated 90'
+static const uint8_t  battery[] = {
+16,16,
+  0x00, 0x00, 
+  0x03, 0xc0, 
+  0x0f, 0xf0, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x08, 0x10, 
+  0x0b, 0xd0, 
+  0x0b, 0xd0, 
+  0x08, 0x10, 
+  0x0f, 0xf0, 
+  0x00, 0x00, 
+};
+
+#endif
+
+#endif
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board.h
new file mode 100644
index 00000000..39264a9e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board.h
@@ -0,0 +1,31 @@
+#ifndef _BOARD_H_
+#define _BOARD_H_
+
+#include <stdint.h>
+#include "proto.h"
+#include "main.h"
+
+//eeprom map
+#define EEPROM_SETTINGS_AREA_START		(0x40000UL)
+#define EEPROM_SETTINGS_AREA_LEN		(0x03000UL)
+
+#define EEPROM_UPDATA_AREA_START		(0x43000UL)
+#define EEPROM_UPDATE_AREA_LEN			(0x20000UL)
+
+#define EEPROM_IMG_START				(0x43000UL)
+#define EEPROM_IMG_EACH					(0x7000UL)
+#define EEPROM_IMG_LEN					(0x20000UL)
+
+#define EEPROM_PAGE_SIZE			(0x01000)
+//till end of eeprom really. do not put anything after - it will be erased at pairing time!!!
+#define EEPROM_PROGRESS_BYTES			(128)
+
+
+#define HAS_EEPROM 1
+#define HAS_SCREEN 1
+#define AP_EMULATE_TAG 1
+
+//hw types
+#define HW_TYPE					        0x60
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board_8258_diy.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board_8258_diy.h
new file mode 100644
index 00000000..2f42a45b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/board_8258_diy.h
@@ -0,0 +1,24 @@
+#ifndef SRC_INCLUDE_BOARD_8258_DIY_H_
+#define SRC_INCLUDE_BOARD_8258_DIY_H_
+
+/************************* For 512K Flash only ***************************************/
+/* Flash map:
+  0x00000 Old Firmware bin
+  0x34000 NV_1
+  0x40000 OTA New bin storage Area
+  0x76000 MAC address
+  0x77000 C_Cfg_Info
+  0x78000 U_Cfg_Info
+  0x7A000 NV_2
+  0x80000 End Flash
+ */
+#define USER_DATA_SIZE          0x34000
+#define BEGIN_USER_DATA1        0x00000
+#define END_USER_DATA1          (BEGIN_USER_DATA1 + USER_DATA_SIZE)
+#define BEGIN_USER_DATA2        0x40000
+#define END_USER_DATA2          (BEGIN_USER_DATA2 + USER_DATA_SIZE)
+#define GEN_USER_CFG_DATA       END_USER_DATA2
+
+
+
+#endif /* SRC_INCLUDE_BOARD_8258_DIY_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comm_cfg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comm_cfg.h
new file mode 100644
index 00000000..88e4f42b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comm_cfg.h
@@ -0,0 +1,83 @@
+/********************************************************************************************************
+ * @file    comm_cfg.h
+ *
+ * @brief   This is the header file for comm_cfg
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+/**********************************************************************
+ * User configuration whether to use boot loader mode.
+ *
+ * NOTE:
+ * We do not recommend using BootLoader mode on 512K flash chips,
+ * because in boot loader mode, it can only support up to 196k firmware
+ * according to the current default Flash Map.
+ *
+ * Please refer to the drv_nv.h file, and check if the firmware size
+ * exceeds the maximum limit.
+ *
+ * The user can configure the CHIP_TYPE used by the corresponding
+ * project in the version.h file according to the actual size
+ * of the flash at hand.
+ *
+ * If BOOT_LOADER_MODE is 0, it means that the SDK uses Normal Mode,
+ * hardware multi-address (0x0000 or 0x40000) startup mode.
+ * If BOOT_LOADER_MODE is 1, it means that the SDK uses Boot Loader Mode.
+ *
+ * Normal mode is used by default.
+ */
+#define BOOT_LOADER_MODE					0
+
+
+
+/* Boot loader address. */
+#define BOOT_LOADER_IMAGE_ADDR				0x0
+
+/* APP image address. */
+#if (BOOT_LOADER_MODE)
+	#define APP_IMAGE_ADDR					0x8000
+#else
+	#define APP_IMAGE_ADDR					0x0
+#endif
+
+
+/* Chip IDs */
+#define TLSR_8267							0x00
+#define TLSR_8269							0x01
+#define TLSR_8258_512K						0x02
+#define TLSR_8258_1M						0x03
+#define TLSR_8278							0x04
+#define TLSR_B91							0x05
+
+/* Image types */
+#if (BOOT_LOADER_MODE)
+	#define IMAGE_TYPE_BOOT_FLAG			1
+#else
+	#define IMAGE_TYPE_BOOT_FLAG			0
+#endif
+#define IMAGE_TYPE_BOOTLOADER				(0xFF)
+#define IMAGE_TYPE_GW						(0x00 | (IMAGE_TYPE_BOOT_FLAG << 7))
+#define IMAGE_TYPE_LIGHT					(0x01 | (IMAGE_TYPE_BOOT_FLAG << 7))
+#define IMAGE_TYPE_SWITCH					(0x02 | (IMAGE_TYPE_BOOT_FLAG << 7))
+#define IMAGE_TYPE_CONTACT_SENSOR			(0x03 | (IMAGE_TYPE_BOOT_FLAG << 7))
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.c
new file mode 100644
index 00000000..73d091e9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.c
@@ -0,0 +1,45 @@
+#include <string.h>
+#include <stdbool.h>
+#include "tl_common.h"
+#include "proto.h"
+#include "zigbee.h"
+#include "comms.h"
+
+#define ADDR_MODE_NONE (0)
+#define ADDR_MODE_SHORT (2)
+#define ADDR_MODE_LONG (3)
+
+#define FRAME_TYPE_BEACON (0)
+#define FRAME_TYPE_DATA (1)
+#define FRAME_TYPE_ACK (2)
+#define FRAME_TYPE_MAC_CMD (3)
+
+extern uint8_t mSelfMac[8];
+uint8_t mLastLqi = 0;
+int8_t mLastRSSI = 0;
+
+uint8_t commsGetLastPacketLQI(void)
+{
+    return mLastLqi;
+}
+
+int8_t commsGetLastPacketRSSI(void)
+{
+    return mLastRSSI;
+}
+
+int8_t commsRxUnencrypted(uint8_t *data)
+{
+    memset(data, 0, 128);
+    int8_t rxedLen = radioRxDequeuePkt(data, 128, &mLastRSSI, &mLastLqi);
+    if (rxedLen < 0)
+        return COMMS_RX_ERR_NO_PACKETS;
+    if (memcmp((void *)&data[5], mSelfMac, 8)) // Here we filter for our MAC Address... in software...
+        return COMMS_RX_ERR_INVALID_PACKET;
+    return rxedLen;
+}
+
+bool commsTxNoCpy(const void *packetp)
+{
+    return radioTxLL(packetp);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.h
new file mode 100644
index 00000000..8fba53a2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/comms.h
@@ -0,0 +1,24 @@
+#ifndef _COMMS_H_
+#define _COMMS_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+
+#define COMMS_MAX_RADIO_WAIT_MSEC		200
+
+#define COMMS_RX_ERR_NO_PACKETS			(-1)
+#define COMMS_RX_ERR_INVALID_PACKET		(-2)
+
+#define COMMS_MAX_PACKET_SZ				(127)
+
+extern uint8_t  mLastLqi;
+extern int8_t  mLastRSSI;
+
+int8_t commsRxUnencrypted(uint8_t  *data);
+bool commsTxUnencrypted(const void  *packetP, uint8_t len);
+
+bool commsTxNoCpy(const void  *packetp);
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.c
new file mode 100644
index 00000000..97887835
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.c
@@ -0,0 +1,67 @@
+#include "drawing.h"
+
+#include <stdbool.h>
+#include "tl_common.h"
+#include "board.h"
+#include "eeprom.h"
+#include "proto.h"
+#include "screen.h"
+#include "epd.h"
+
+static uint8_t mClutMap[256];
+void drawImageAtAddress(uint32_t addr, uint8_t lut)
+{
+    struct EepromImageHeader *eih = (struct EepromImageHeader *)mClutMap;
+    eepromRead(addr, mClutMap, sizeof(struct EepromImageHeader));
+    switch (eih->dataType)
+    {
+    case DATATYPE_IMG_RAW_1BPP:
+        printf("Doing raw 1bpp\r\n");
+        EPD_Display_start(1);
+        for (uint32_t c = 0; c < (SCREEN_HEIGHT * (SCREEN_WIDTH / 8)); c++)
+        {
+            if (c % 256 == 0)
+            {
+                eepromRead(addr + sizeof(struct EepromImageHeader) + c, mClutMap, 256);
+            }
+            EPD_Display_byte(mClutMap[c % 256]);
+        }
+        EPD_Display_color_change();
+        for (uint32_t c = 0; c < (SCREEN_HEIGHT * (SCREEN_WIDTH / 8)); c++)
+        {
+            EPD_Display_byte(0x00);
+        }
+        EPD_Display_end();
+        break;
+    case DATATYPE_IMG_RAW_2BPP:
+        printf("Doing raw 2bpp\r\n");
+        EPD_Display_start(1);
+        for (uint32_t c = 0; c < (SCREEN_HEIGHT * (SCREEN_WIDTH / 8)); c++)
+        {
+            if (c % 256 == 0)
+            {
+                eepromRead(addr + sizeof(struct EepromImageHeader) + c, mClutMap, 256);
+            }
+            EPD_Display_byte(mClutMap[c % 256]);
+        }
+        EPD_Display_color_change();
+        for (uint32_t c = 0; c < (SCREEN_HEIGHT * (SCREEN_WIDTH / 8)); c++)
+        {
+            if (c % 256 == 0)
+            {
+                eepromRead(addr + sizeof(struct EepromImageHeader) + (SCREEN_HEIGHT * (SCREEN_WIDTH / 8)) + c, mClutMap, 256);
+            }
+            EPD_Display_byte(mClutMap[c % 256]);
+        }
+        EPD_Display_end();
+        break;
+    case DATATYPE_IMG_BMP:;
+        printf("sending BMP to EPD - ");
+
+        printf(" complete.\r\n");
+        break;
+    default: // prevent drawing from an unknown file image type
+        printf("Image with type 0x%02X was requested, but we don't know what to do with that currently...\r\n", eih->dataType);
+        return;
+    }
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.h
new file mode 100644
index 00000000..205f4e3a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/drawing.h
@@ -0,0 +1,9 @@
+#ifndef _DRAWING_H_
+#define _DRAWING_H_
+
+#include <stdint.h>
+#include <stdbool.h>
+
+void drawImageAtAddress(uint32_t addr, uint8_t lut);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.c
new file mode 100644
index 00000000..af833629
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.c
@@ -0,0 +1,52 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "zigbee.h"
+#include "proto.h"
+#include "comms.h"
+#include "board.h"
+#include "powermgt.h"
+#include "eeprom.h"
+#include "tl_common.h"
+
+uint32_t eepromGetSize(void)
+{
+    return EEPROM_IMG_LEN;
+}
+
+void eepromRead(uint32_t addr, uint8_t *dstP, uint32_t len)
+{
+    printf("Eeprom read %X Len: %d\r\n", addr, len);
+    flash_read_page(addr, len, dstP);
+}
+
+bool eepromWrite(uint32_t addr, uint8_t *srcP, uint32_t len)
+{
+    printf("Eeprom write %X Len: %d\r\n", addr, len);
+    flash_write_page(addr, len, srcP);
+    return true;
+}
+
+bool eepromErase(uint32_t addr, uint32_t len)
+{
+    printf("Eeprom erase %X Len: %d\r\n", addr, len);
+    // round starting address down
+    if (addr % EEPROM_PAGE_SIZE)
+    {
+        len += addr % EEPROM_PAGE_SIZE;
+        addr = addr / EEPROM_PAGE_SIZE * EEPROM_PAGE_SIZE;
+    }
+    // round length up
+    len = (len + EEPROM_PAGE_SIZE - 1) / EEPROM_PAGE_SIZE * EEPROM_PAGE_SIZE;
+
+    while (len)
+    {
+        uint32_t now;
+        flash_erase_sector(addr);
+        now = 0x1000;
+
+        addr += now;
+        len -= now;
+    }
+    return true;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.h
new file mode 100644
index 00000000..f9af98bf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/eeprom.h
@@ -0,0 +1,31 @@
+#ifndef _EEPROM_H_
+#define _EEPROM_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+void eepromRead(uint32_t addr, uint8_t  *dst, uint32_t len) ;
+
+bool eepromWrite(uint32_t addr, uint8_t  *src, uint32_t len) ;
+
+bool eepromErase(uint32_t addr, uint32_t len) ;
+
+uint32_t eepromGetSize(void);
+
+#define EEPROM_IMG_VALID				(0x494d4721UL)
+#include "board.h"
+
+struct EepromImageHeader {				//each image space is 0x17000 bytes, we have space for ten of them
+	uint64_t version;
+	uint32_t validMarker;
+	uint32_t size;
+	uint8_t dataType;
+	uint32_t id;
+	
+	//image data here
+	//we pre-erase so progress can be calculated by finding the first non-0xff byte
+};
+
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.c
new file mode 100644
index 00000000..95b59f97
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.c
@@ -0,0 +1,432 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "eeprom.h"
+#include "epd_bw_213.h"
+#include "epd_bwr_213.h"
+#include "epd_bwr_350.h"
+#include "epd_bwy_350.h"
+#include "epd_bw_213_ice.h"
+#include "epd_bwr_154.h"
+#include "powermgt.h"
+
+#include "OneBitDisplay.h"
+extern const uint8_t ucMirror[];
+#include "Roboto_Black_80.h"
+#include "font.h"
+#include "font_60.h"
+#include "font16.h"
+#include "font30.h"
+
+RAM uint8_t epd_model = 0; // 0 = Undetected, 1 = BW213, 2 = BWR213, 3 = BWR154, 4 = BW213ICE, 5 = BWR350
+const char *epd_model_string[] = {"NC", "BW213", "BWR213", "BWR154", "213ICE", "BWR350", "BWY350"};
+RAM uint8_t epd_update_state = 0;
+
+const char *BLE_conn_string[] = {"", "B"};
+RAM uint8_t epd_temperature_is_read = 0;
+RAM uint8_t epd_temperature = 0;
+
+uint8_t epd_buffer[epd_buffer_size];
+uint8_t epd_temp[epd_buffer_size]; // for OneBitDisplay to draw into
+OBDISP obd;                        // virtual display structure
+
+// With this we can force a display if it wasnt detected correctly
+void set_EPD_model(uint8_t model_nr)
+{
+    epd_model = model_nr;
+}
+
+// Here we detect what E-Paper display is connected
+ void EPD_detect_model(void)
+{
+    epd_model = 6;
+    return;
+    EPD_init();
+    // system power
+    EPD_POWER_ON();
+
+    WaitMs(10);
+    // Reset the EPD driver IC
+    gpio_write(EPD_RESET, 0);
+    WaitMs(10);
+    gpio_write(EPD_RESET, 1);
+    WaitMs(10);
+
+    // Here we neeed to detect it
+    if (EPD_BWR_213_detect())
+    {
+        epd_model = 2;
+    }
+    else if (EPD_BWR_154_detect()) // Right now this will never trigger, the 154 is same to 213BWR right now.
+    {
+        epd_model = 3;
+    }
+    else if (EPD_BW_213_ice_detect())
+    {
+        epd_model = 4;
+    }
+    else
+    {
+        epd_model = 1;
+    }
+
+    EPD_POWER_OFF();
+}
+
+ uint8_t EPD_read_temp(void)
+{
+    if (epd_temperature_is_read)
+        return epd_temperature;
+
+    if (!epd_model)
+        EPD_detect_model();
+
+    EPD_init();
+    // system power
+    EPD_POWER_ON();
+    WaitMs(5);
+    // Reset the EPD driver IC
+    gpio_write(EPD_RESET, 0);
+    WaitMs(10);
+    gpio_write(EPD_RESET, 1);
+    WaitMs(10);
+
+    if (epd_model == 1)
+        epd_temperature = EPD_BW_213_read_temp();
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_read_temp();
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_read_temp();
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_read_temp();
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_read_temp();
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_read_temp();
+
+    EPD_POWER_OFF();
+
+    epd_temperature_is_read = 1;
+
+    return epd_temperature;
+}
+
+ void EPD_Display_start(uint8_t full_or_partial)
+{
+    if (!epd_model)
+        EPD_detect_model();
+
+    EPD_init();
+    // system power
+    EPD_POWER_ON();
+    WaitMs(5);
+    // Reset the EPD driver IC
+    gpio_write(EPD_RESET, 0);
+    WaitMs(20);
+    gpio_write(EPD_RESET, 1);
+    WaitMs(20);
+
+    /*if (epd_model == 1)
+        epd_temperature = EPD_BW_213_Display_start(full_or_partial);
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_Display_start(full_or_partial);
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_Display_start(full_or_partial);
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display_start(full_or_partial);
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display_start(full_or_partial);
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display_start(full_or_partial);*/
+
+    if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display_start(full_or_partial);
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display_start(full_or_partial);
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display_start(full_or_partial);
+    epd_temperature_is_read = 1;
+    epd_update_state = 1;
+}
+
+ void EPD_Display_byte(uint8_t data)
+{
+    /*if (epd_model == 1)
+        epd_temperature = EPD_BW_213_Display_byte(data);
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_Display_byte(data);
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_Display_byte(data);
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display_byte(data);
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display_byte(data);
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display_byte(data);*/
+
+    if (epd_model == 4)
+        EPD_BW_213_ice_Display_byte(data);
+    else if (epd_model == 5)
+        EPD_BWR_350_Display_byte(data);
+    else if (epd_model == 6)
+        EPD_BWY_350_Display_byte(data);
+}
+
+ void EPD_Display_buffer(unsigned char *image, int size)
+{
+    /*if (epd_model == 1)
+        epd_temperature = EPD_BW_213_Display_buffer(image, size);
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_Display_buffer(image, size);
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_Display_buffer(image, size);
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display_buffer(image, size);
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display_buffer(image, size);
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display_buffer(image, size);*/
+
+    if (epd_model == 4)
+        EPD_BW_213_ice_Display_buffer(image, size);
+    else if (epd_model == 5)
+        EPD_BWR_350_Display_buffer(image, size);
+    else if (epd_model == 6)
+        EPD_BWY_350_Display_buffer(image, size);
+}
+
+ void EPD_Display_color_change()
+{
+    if (epd_model == 5)
+        EPD_BWR_350_Display_color_change();
+    if (epd_model == 6)
+        EPD_BWY_350_Display_color_change();
+}
+
+ void EPD_Display_end()
+{
+    /*if (epd_model == 1)
+        epd_temperature = EPD_BW_213_Display_end();
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_Display_end();
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_Display_end();
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display_end();
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display_end();
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display_end();*/
+    if (epd_model == 4)
+        EPD_BW_213_ice_Display_end();
+    else if (epd_model == 5)
+        EPD_BWR_350_Display_end();
+    else if (epd_model == 6)
+        EPD_BWY_350_Display_end();
+    uint32_t timeout_counter = 60; // 60 Seconds timeout
+    while (epd_state_handler())
+    {
+        doSleepGpio(1000, EPD_BUSY);
+        timeout_counter--;
+        if (!timeout_counter)
+        {
+            epd_set_sleep();
+            printf("E-Paper Refresh timeout !!!\r\n");
+            break;
+        }
+    }
+}
+
+ void EPD_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    if (!epd_model)
+        EPD_detect_model();
+
+    EPD_init();
+    // system power
+    EPD_POWER_ON();
+    WaitMs(5);
+    // Reset the EPD driver IC
+    gpio_write(EPD_RESET, 0);
+    WaitMs(10);
+    gpio_write(EPD_RESET, 1);
+    WaitMs(10);
+
+    if (epd_model == 1)
+        epd_temperature = EPD_BW_213_Display(image, size, full_or_partial);
+    else if (epd_model == 2)
+        epd_temperature = EPD_BWR_213_Display(image, size, full_or_partial);
+    else if (epd_model == 3)
+        epd_temperature = EPD_BWR_154_Display(image, size, full_or_partial);
+    else if (epd_model == 4)
+        epd_temperature = EPD_BW_213_ice_Display(image, size, full_or_partial);
+    else if (epd_model == 5)
+        epd_temperature = EPD_BWR_350_Display(image, size, full_or_partial);
+    else if (epd_model == 6)
+        epd_temperature = EPD_BWY_350_Display(image, size, full_or_partial);
+
+    epd_temperature_is_read = 1;
+    epd_update_state = 1;
+    uint32_t timeout_counter = 60; // 60 Seconds timeout
+    while (epd_state_handler())
+    {
+        doSleepGpio(1000, EPD_BUSY);
+        timeout_counter--;
+        if (!timeout_counter)
+        {
+            epd_set_sleep();
+            printf("E-Paper Refresh timeout !!!\r\n");
+            break;
+        }
+    }
+}
+
+ void epd_set_sleep(void)
+{
+    if (!epd_model)
+        EPD_detect_model();
+
+    if (epd_model == 1)
+        EPD_BW_213_set_sleep();
+    else if (epd_model == 2)
+        EPD_BWR_213_set_sleep();
+    else if (epd_model == 3)
+        EPD_BWR_154_set_sleep();
+    else if (epd_model == 4)
+        EPD_BW_213_ice_set_sleep();
+    else if (epd_model == 5)
+        EPD_BWR_350_set_sleep();
+    else if (epd_model == 6)
+        EPD_BWY_350_set_sleep();
+
+    EPD_POWER_OFF();
+    epd_update_state = 0;
+}
+
+ uint8_t epd_state_handler(void)
+{
+    switch (epd_update_state)
+    {
+    case 0:
+        // Nothing todo
+        break;
+    case 1: // check if refresh is done and sleep epd if so
+        if (epd_model == 1 || epd_model == 6)
+        {
+            if (!EPD_IS_BUSY())
+                epd_set_sleep();
+        }
+        else
+        {
+            if (EPD_IS_BUSY())
+                epd_set_sleep();
+        }
+        break;
+    }
+    return epd_update_state;
+}
+
+ void FixBuffer(uint8_t *pSrc, uint8_t *pDst, uint16_t width, uint16_t height)
+{
+    int x, y;
+    uint8_t *s, *d;
+    for (y = 0; y < (height / 8); y++)
+    { // byte rows
+        d = &pDst[y];
+        s = &pSrc[y * width];
+        for (x = 0; x < width; x++)
+        {
+            d[x * (height / 8)] = ~ucMirror[s[width - 1 - x]]; // invert and flip
+        }                                                      // for x
+    }                                                          // for y
+}
+
+ void epd_display_this()
+{
+    // test G4 decoder
+    memset(epd_buffer, 0xff, epd_buffer_size); // clear to white
+    EPD_Display(epd_buffer, epd_buffer_size, 1);
+}
+
+ void epd_display(char *str1, uint16_t battery_mv, char *ownMacStr, uint8_t full_or_partial)
+{
+    if (epd_update_state)
+        return;
+
+    if (!epd_model)
+    {
+        EPD_detect_model();
+    }
+    uint16_t resolution_w = 250;
+    uint16_t resolution_h = 128; // 122 real pixel, but needed to have a full byte
+    if (epd_model == 1)
+    {
+        resolution_w = 250;
+        resolution_h = 128; // 122 real pixel, but needed to have a full byte
+    }
+    else if (epd_model == 2)
+    {
+        resolution_w = 250;
+        resolution_h = 128; // 122 real pixel, but needed to have a full byte
+    }
+    else if (epd_model == 3)
+    {
+        resolution_w = 200;
+        resolution_h = 200;
+    }
+    else if (epd_model == 4)
+    {
+        resolution_w = 212;
+        resolution_h = 104;
+    }
+    else if (epd_model == 5)
+    { // Just as placeholder right now, needs a complete different driving because of RAM limits
+        resolution_w = 200;
+        resolution_h = 184;
+    }
+    else if (epd_model == 6)
+    { // Just as placeholder right now, needs a complete different driving because of RAM limits
+        resolution_w = 210;
+        resolution_h = 184;
+    }
+
+    obdCreateVirtualDisplay(&obd, resolution_w, resolution_h, epd_temp);
+    obdFill(&obd, 0, 0); // fill with white
+
+    char buff[100];
+    sprintf(buff, "Compiled:");
+    obdWriteString(&obd, 0, 0, 20, (char *)buff, FONT_8x8, 0, 0);
+    sprintf(buff, "%s %s", __DATE__, __TIME__);
+    obdWriteString(&obd, 0, 0, 21, (char *)buff, FONT_8x8, 0, 0);
+    sprintf(buff, "Tag MAC:", ownMacStr);
+    // obdWriteStringCustom(&obd, FONT_8x8, 0, 18, (char *)buff, 1);
+    obdWriteString(&obd, 0, 0, 17, (char *)buff, FONT_8x8, 0, 0);
+    sprintf(buff, "%s", ownMacStr);
+    // obdWriteStringCustom(&obd, FONT_8x8, 0, 18, (char *)buff, 1);
+    obdWriteString(&obd, 0, 0, 18, (char *)buff, FONT_8x8, 0, 0);
+    sprintf(buff, "OpenEpaperLink");
+    obdWriteStringCustom(&obd, (GFXfont *)&Dialog_plain_16, 10, 50, (char *)buff, 1);
+    sprintf(buff, "%s", str1);
+    obdWriteStringCustom(&obd, (GFXfont *)&Special_Elite_Regular_30, 10, 95, (char *)buff, 1);
+    sprintf(buff, "Battery %dmV", battery_mv);
+    obdWriteStringCustom(&obd, (GFXfont *)&Dialog_plain_16, 10, 120, (char *)buff, 1);
+    FixBuffer(epd_temp, epd_buffer, resolution_w, resolution_h);
+    EPD_Display(epd_buffer, resolution_w * resolution_h / 8, full_or_partial);
+}
+
+ void epd_display_char(uint8_t data)
+{
+    int i;
+    for (i = 0; i < epd_buffer_size; i++)
+    {
+        epd_buffer[i] = data;
+    }
+    EPD_Display(epd_buffer, epd_buffer_size, 1);
+}
+
+ void epd_clear(void)
+{
+    memset(epd_buffer, 0x00, epd_buffer_size);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.h
new file mode 100644
index 00000000..ea723e08
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd.h
@@ -0,0 +1,23 @@
+#pragma once
+
+#define epd_height 200
+#define epd_width 200
+#define epd_buffer_size ((epd_height / 8) * epd_width)
+
+void set_EPD_model(uint8_t model_nr);
+void init_epd(void);
+uint8_t EPD_read_temp(void);
+
+void EPD_Display_start(uint8_t full_or_partial);
+void EPD_Display_byte(uint8_t data);
+void EPD_Display_buffer(unsigned char *image, int size);
+void EPD_Display_color_change();
+void EPD_Display_end();
+
+void EPD_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void epd_display_this();
+void epd_display(char *str1, uint16_t battery_mv, char *ownMacStr, uint8_t full_or_partial);
+void epd_set_sleep(void);
+uint8_t epd_state_handler(void);
+void epd_display_char(uint8_t data);
+void epd_clear(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.c
new file mode 100644
index 00000000..6f0bff99
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.c
@@ -0,0 +1,121 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bw_213.h"
+
+// UC8151C or similar EPD Controller
+
+#define lut_bw_213_refresh_time 10
+uint8_t lut_bw_213_20_part[] =
+    {
+        0x20, 0x00, lut_bw_213_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    };
+uint8_t lut_bw_213_22_part[] =
+    {
+        0x22, 0x80, lut_bw_213_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    };
+uint8_t lut_bw_213_23_part[] =
+    {
+        0x23, 0x40, lut_bw_213_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
+    };
+
+
+ uint8_t EPD_BW_213_read_temp(void)
+{
+    uint8_t epd_temperature = 0 ;
+    EPD_WriteCmd(0x04);
+
+    // check BUSY pin
+    EPD_CheckStatus(100);
+
+    EPD_WriteCmd(0x40);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    // power off
+    EPD_WriteCmd(0x02);
+
+    // deep sleep
+    EPD_WriteCmd(0x07);
+    EPD_WriteData(0xa5);
+
+    return epd_temperature;
+}
+
+ uint8_t EPD_BW_213_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0 ;
+    
+    // Booster soft start
+    EPD_WriteCmd(0x06);
+    EPD_WriteData(0x17);
+    EPD_WriteData(0x17);
+    EPD_WriteData(0x17);
+    // power on
+    EPD_WriteCmd(0x04);
+
+    // check BUSY pin
+    EPD_CheckStatus(100);
+
+    EPD_WriteCmd(0x40);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    // panel setting
+    EPD_WriteCmd(0x00);
+    if (full_or_partial)
+        EPD_WriteData(0b00011111);
+    else
+        EPD_WriteData(0b00111111);
+    EPD_WriteData(0x0f);
+
+    // resolution setting
+    EPD_WriteCmd(0x61);
+    EPD_WriteData(0x80);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x28);
+
+    // Vcom and data interval setting
+    EPD_WriteCmd(0X50);
+    EPD_WriteData(0x97);
+
+    if (!full_or_partial)
+    {
+        EPD_send_lut(lut_bw_213_20_part, sizeof(lut_bw_213_20_part));
+        EPD_send_empty_lut(0x21, 260);
+        EPD_send_lut(lut_bw_213_22_part, sizeof(lut_bw_213_22_part));
+        EPD_send_lut(lut_bw_213_23_part, sizeof(lut_bw_213_23_part));
+        EPD_send_empty_lut(0x24, 260);
+
+        EPD_WriteCmd(0x10);
+        int i;
+        for (i = 0; i < size; i++)
+        {
+            EPD_WriteData(~image[i]);
+        }
+    }
+    // load image data to EPD
+    EPD_LoadImage(image, size, 0x13);
+
+    // trigger display refresh
+    EPD_WriteCmd(0x12);
+
+    return epd_temperature;
+}
+
+ void EPD_BW_213_set_sleep(void)
+{
+    // Vcom and data interval setting
+    EPD_WriteCmd(0x50);
+    EPD_WriteData(0xf7);
+
+    // power off
+    EPD_WriteCmd(0x02);
+
+    // deep sleep
+    EPD_WriteCmd(0x07);
+    EPD_WriteData(0xa5);
+
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.h
new file mode 100644
index 00000000..4019d9cc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213.h
@@ -0,0 +1,5 @@
+#pragma once
+
+uint8_t EPD_BW_213_read_temp(void);
+uint8_t EPD_BW_213_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BW_213_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.c
new file mode 100644
index 00000000..21fb0fe7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.c
@@ -0,0 +1,488 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bw_213_ice.h"
+
+// SSD1675 mixed with SSD1680 EPD Controller
+
+#define BW_213_ice_Len 50
+uint8_t LUT_BW_213_ice_part[] = {
+
+    0x40,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x80,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x40,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x80,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+
+    BW_213_ice_Len,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+    0x00,
+
+};
+
+ uint8_t EPD_BW_213_ice_detect(void)
+{
+    // SW Reset
+    EPD_WriteCmd(0x12);
+    WaitMs(10);
+
+    EPD_WriteCmd(0x2F);
+    if (EPD_SPI_read() != 0x01)
+        return 0;
+    return 1;
+}
+
+ uint8_t EPD_BW_213_ice_read_temp(void)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // ACVCOM Setting
+    EPD_WriteCmd(0x2B);
+    EPD_WriteData(0x04);
+    EPD_WriteData(0x63);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0C);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x54);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x01);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xA1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x03);
+
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+    return epd_temperature;
+}
+
+ uint8_t EPD_BW_213_ice_Display_start(uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // ACVCOM Setting
+    EPD_WriteCmd(0x2B);
+    EPD_WriteData(0x04);
+    EPD_WriteData(0x63);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0C);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x54);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x01);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xA1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x03);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0x40);
+
+    int i;
+    if (!full_or_partial)
+    {
+        EPD_WriteCmd(0x32);
+        for (i = 0; i < sizeof(LUT_BW_213_ice_part); i++)
+        {
+            EPD_WriteData(LUT_BW_213_ice_part[i]);
+        }
+    }
+
+    EPD_WriteCmd(0x24);
+
+    return epd_temperature;
+}
+
+ void EPD_BW_213_ice_Display_byte(uint8_t data)
+{
+    EPD_WriteData(data);
+}
+
+ void EPD_BW_213_ice_Display_buffer(unsigned char *image, int size)
+{
+    for (int i = 0; i < size; i++)
+    {
+        EPD_WriteData(image[i]);
+    }
+}
+
+ void EPD_BW_213_ice_Display_end()
+{
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+}
+
+ uint8_t EPD_BW_213_ice_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // ACVCOM Setting
+    EPD_WriteCmd(0x2B);
+    EPD_WriteData(0x04);
+    EPD_WriteData(0x63);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0C);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x54);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x01);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xA1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x03);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    EPD_LoadImage(image, size, 0x24);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0x40);
+
+    int i;
+    if (!full_or_partial)
+    {
+        EPD_WriteCmd(0x32);
+        for (i = 0; i < sizeof(LUT_BW_213_ice_part); i++)
+        {
+            EPD_WriteData(LUT_BW_213_ice_part[i]);
+        }
+    }
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    return epd_temperature;
+}
+
+ void EPD_BW_213_ice_set_sleep(void)
+{
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.h
new file mode 100644
index 00000000..1824a291
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bw_213_ice.h
@@ -0,0 +1,12 @@
+#pragma once
+
+uint8_t EPD_BW_213_ice_detect(void);
+uint8_t EPD_BW_213_ice_read_temp(void);
+
+uint8_t EPD_BW_213_ice_Display_start(uint8_t full_or_partial);
+void EPD_BW_213_ice_Display_byte(uint8_t data);
+void EPD_BW_213_ice_Display_buffer(unsigned char *image, int size);
+void EPD_BW_213_ice_Display_end();
+
+uint8_t EPD_BW_213_ice_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BW_213_ice_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.c
new file mode 100644
index 00000000..94a2f34d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.c
@@ -0,0 +1,226 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bwr_154.h"
+
+// SSD1675 mixed with SSD1680 EPD Controller
+
+#define BWR_154_Len 50
+uint8_t LUT_bwr_154_part[] = {
+
+0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+BWR_154_Len, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 
+0x00, 0x00, 0x00, 
+
+};
+
+#define EPD_BWR_154_test_pattern 0xA5
+ uint8_t EPD_BWR_154_detect(void)
+{
+    // SW Reset
+    EPD_WriteCmd(0x12);
+    WaitMs(10);
+
+    EPD_WriteCmd(0x32);
+    int i;
+    for (i = 0; i < 65; i++)// This controller has a <100 bytes LUT storage so we test if thats existing.
+    {
+        EPD_WriteData(EPD_BWR_154_test_pattern);
+    }
+    EPD_WriteCmd(0x33);
+    for (i = 0; i < 65; i++)
+    {
+        if(EPD_SPI_read() != EPD_BWR_154_test_pattern)
+            return 0;
+    }
+    return 1;
+}
+
+ uint8_t EPD_BWR_154_read_temp(void)
+{
+    uint8_t epd_temperature = 0 ;
+    
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x18);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x61);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();    
+    EPD_SPI_read();
+
+    WaitMs(5);
+    
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+    return epd_temperature;
+}
+
+ uint8_t EPD_BWR_154_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0 ;
+    
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0xc7);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x18);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0xc7);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();    
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0xc7);
+    EPD_WriteData(0x00);
+
+    EPD_LoadImage(image, size, 0x24);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0xc7);
+    EPD_WriteData(0x00);
+
+    EPD_WriteCmd(0x26);// RED Color TODO make something out of it :)
+    int i;
+    for (i = 0; i < size; i++)
+    {
+        EPD_WriteData(0x00);
+    }
+
+    if (!full_or_partial)
+    {
+        EPD_WriteCmd(0x32);
+        for (i = 0; i < sizeof(LUT_bwr_154_part); i++)
+        {
+            EPD_WriteData(LUT_bwr_154_part[i]);
+        }
+    }
+    
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    return epd_temperature;
+}
+
+ void EPD_BWR_154_set_sleep(void)
+{
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.h
new file mode 100644
index 00000000..65ec3c21
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_154.h
@@ -0,0 +1,6 @@
+#pragma once
+
+uint8_t EPD_BWR_154_detect(void);
+uint8_t EPD_BWR_154_read_temp(void);
+uint8_t EPD_BWR_154_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BWR_154_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.c
new file mode 100644
index 00000000..b438842c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.c
@@ -0,0 +1,265 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bwr_213.h"
+
+// SSD1675 mixed with SSD1680 EPD Controller
+
+#define BWR_213_Len 50
+uint8_t LUT_bwr_213_part[] = {
+
+0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x80, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
+
+BWR_213_Len, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 
+0x22, 0x22, 0x22, 0x22, 0x22, 0x22, 
+0x00, 0x00, 0x00, 
+
+};
+
+#define EPD_BWR_213_test_pattern 0xA5
+ uint8_t EPD_BWR_213_detect(void)
+{
+    // SW Reset
+    EPD_WriteCmd(0x12);
+    WaitMs(10);
+
+    EPD_WriteCmd(0x32);
+    int i;
+    for (i = 0; i < 153; i++)// This model has a 159 bytes LUT storage so we test for that
+    {
+        EPD_WriteData(EPD_BWR_213_test_pattern);
+    }
+    EPD_WriteCmd(0x33);
+    for (i = 0; i < 153; i++)
+    {
+        if(EPD_SPI_read() != EPD_BWR_213_test_pattern)
+            return 0;
+    }
+    return 1;
+}
+
+ uint8_t EPD_BWR_213_read_temp(void)
+{
+    uint8_t epd_temperature = 0 ;
+    
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0F);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x2E);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x80);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();    
+    EPD_SPI_read();
+
+    WaitMs(5);
+    
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+    return epd_temperature;
+}
+
+ uint8_t EPD_BWR_213_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{    
+    uint8_t epd_temperature = 0 ;
+    
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0F);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x2E);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x80);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();    
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    EPD_LoadImage(image, size, 0x24);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    EPD_WriteCmd(0x26);// RED Color TODO make something out of it :)
+    int i;
+    for (i = 0; i < size; i++)
+    {
+        EPD_WriteData(0x00);
+    }
+
+    if (!full_or_partial)
+    {
+        EPD_WriteCmd(0x32);
+        for (i = 0; i < sizeof(LUT_bwr_213_part); i++)
+        {
+            EPD_WriteData(LUT_bwr_213_part[i]);
+        }
+    }
+    
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+    
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    return epd_temperature;
+}
+
+ void EPD_BWR_213_set_sleep(void)
+{
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.h
new file mode 100644
index 00000000..7c781256
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_213.h
@@ -0,0 +1,6 @@
+#pragma once
+
+uint8_t EPD_BWR_213_detect(void);
+uint8_t EPD_BWR_213_read_temp(void);
+uint8_t EPD_BWR_213_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BWR_213_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.c
new file mode 100644
index 00000000..5fe6de41
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.c
@@ -0,0 +1,363 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bwr_350.h"
+
+// SSD1675 mixed with SSD1680 EPD Controller
+
+#define BWR_350_Len 50
+uint8_t LUT_bwr_350_part[] = {
+
+    0x01, 0x10, 0x18, 0x01, 0x32, 0x02, 0x01, 0x10, 0x08, 0x01, 0x03, 0x02,
+    0x01, 0x01, 0x01, 0x0A, 0x05, 0x0A, 0x0F, 0x01, 0x01, 0x01, 0x14, 0x0F,
+    0x02, 0x02, 0x01, 0x14, 0x01, 0x02, 0x02, 0x04, 0x02, 0x14, 0x12, 0x01,
+    0x0A, 0x0F, 0x01, 0x02, 0x01, 0x01, 0x07, 0x05, 0x00, 0x22, 0x02, 0x01,
+    0x01, 0x00, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x01, 0x50, 0x18, 0x01,
+    0x72, 0x02, 0x01, 0x10, 0x88, 0x01, 0x43,
+    0x02, 0x01, 0x01, 0x01, 0x4A, 0x85, 0x4A,
+    0x8F, 0x01, 0x01, 0x01, 0x94, 0x8F, 0x82,
+    0x42, 0x01, 0x14, 0x01, 0x82, 0x42, 0x84,
+    0x42, 0x14, 0x12, 0x01, 0x4A, 0x4F, 0x01,
+    0x02, 0x01, 0x01, 0x07, 0x85, 0x00, 0xE2,
+    0x02, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x50, 0x58, 0x81,
+    0x72, 0x02, 0x01, 0x10, 0x88, 0x01, 0x43,
+    0x42, 0x01, 0x01, 0x01, 0x4A, 0x85, 0x4A,
+    0x8F, 0x01, 0x01, 0x01, 0x94, 0x8F, 0x82,
+    0x42, 0x01, 0x14, 0x01, 0x82, 0x42, 0x84,
+    0x42, 0x14, 0x12, 0x01, 0x4A, 0x4F, 0x01,
+    0x02, 0x01, 0x01, 0x07, 0x85, 0x00, 0x22,
+    0x02, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01, 0x01, 0x50, 0x58, 0x01,
+    0x72, 0x02, 0x01, 0x10, 0x88, 0x81, 0x43,
+    0x02, 0x01, 0x01, 0x01, 0x4A, 0x85, 0x4A,
+    0x8F, 0x01, 0x01, 0x01, 0x94, 0x8F, 0x82,
+    0x42, 0x01, 0x14, 0x01, 0x82, 0x42, 0x84,
+    0x42, 0x14, 0x12, 0x01, 0x4A, 0x4F, 0x01,
+    0x82, 0x01, 0x01, 0x07, 0x05, 0x00, 0x22,
+    0x42, 0x01, 0x01, 0x00, 0x01, 0x01, 0x01,
+    0x01, 0x01, 0x01,
+    0x02, 0x00, 0x00,
+    0x22, 0x17, 0x41, 0xA8, 0x32, 0x50};
+
+#define EPD_BWR_350_test_pattern 0xA5
+ uint8_t EPD_BWR_350_detect(void)
+{
+    // SW Reset
+    EPD_WriteCmd(0x12);
+    WaitMs(10);
+
+    EPD_WriteCmd(0x32);
+    int i;
+    for (i = 0; i < 153; i++) // This model has a 159 bytes LUT storage so we test for that
+    {
+        EPD_WriteData(EPD_BWR_350_test_pattern);
+    }
+    EPD_WriteCmd(0x33);
+    for (i = 0; i < 153; i++)
+    {
+        if (EPD_SPI_read() != EPD_BWR_350_test_pattern)
+            return 0;
+    }
+    return 1;
+}
+
+ uint8_t EPD_BWR_350_read_temp(void)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0F);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x2E);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x80);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+
+    return epd_temperature;
+}
+
+ uint8_t EPD_BWR_350_Display_start(uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+    EPD_WriteCmd(0x3c);
+    EPD_WriteData(0x05);
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xb1);
+
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0b00001000);
+    EPD_WriteData(0x00);
+
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x03);
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x17);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x7f);
+    EPD_WriteData(0x01);
+    
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x01);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x00);
+
+    EPD_WriteCmd(0x24);
+
+    return epd_temperature;
+}
+ void EPD_BWR_350_Display_byte(uint8_t data)
+{
+    EPD_WriteData(data);
+}
+ void EPD_BWR_350_Display_buffer(unsigned char *image, int size)
+{
+    for (int i = 0; i < size; i++)
+    {
+        EPD_WriteData(image[i]);
+    }
+}
+ void EPD_BWR_350_Display_end()
+{
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+}
+ void EPD_BWR_350_Display_color_change()
+{
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x01);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x00);
+
+    EPD_WriteCmd(0x26);
+}
+
+ uint8_t EPD_BWR_350_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // SW Reset
+    EPD_WriteCmd(0x12);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Set Analog Block control
+    EPD_WriteCmd(0x74);
+    EPD_WriteData(0x54);
+    // Set Digital Block control
+    EPD_WriteCmd(0x7E);
+    EPD_WriteData(0x3B);
+
+    // Booster soft start
+    EPD_WriteCmd(0x0C);
+    EPD_WriteData(0x8B);
+    EPD_WriteData(0x9C);
+    EPD_WriteData(0x96);
+    EPD_WriteData(0x0F);
+
+    // Driver output control
+    EPD_WriteCmd(0x01);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x01);
+
+    // Data entry mode setting
+    EPD_WriteCmd(0x11);
+    EPD_WriteData(0x01);
+
+    // Set RAM X- Address Start/End
+    EPD_WriteCmd(0x44);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x0F);
+
+    // Set RAM Y- Address Start/End
+    EPD_WriteCmd(0x45);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+    EPD_WriteData(0x2E);
+    EPD_WriteData(0x00);
+
+    // Border waveform control
+    EPD_WriteCmd(0x3C);
+    EPD_WriteData(0x05);
+
+    // Display update control
+    EPD_WriteCmd(0x21);
+    EPD_WriteData(0x00);
+    EPD_WriteData(0x80);
+
+    // Temperature sensor control
+    EPD_WriteCmd(0x18);
+    EPD_WriteData(0x80);
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xB1);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    EPD_CheckStatus_inverted(100);
+
+    // Temperature sensor read from register
+    EPD_WriteCmd(0x1B);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    WaitMs(5);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    EPD_LoadImage(image, size, 0x24);
+
+    // Set RAM X address
+    EPD_WriteCmd(0x4E);
+    EPD_WriteData(0x00);
+
+    // Set RAM Y address
+    EPD_WriteCmd(0x4F);
+    EPD_WriteData(0x28);
+    EPD_WriteData(0x01);
+
+    EPD_WriteCmd(0x26); // RED Color TODO make something out of it :)
+    int i;
+    for (i = 0; i < size; i++)
+    {
+        EPD_WriteData(0x00);
+    }
+
+    if (!full_or_partial)
+    {
+        EPD_WriteCmd(0x32);
+        for (i = 0; i < sizeof(LUT_bwr_350_part); i++)
+        {
+            EPD_WriteData(LUT_bwr_350_part[i]);
+        }
+    }
+
+    // Display update control
+    EPD_WriteCmd(0x22);
+    EPD_WriteData(0xC7);
+
+    // Master Activation
+    EPD_WriteCmd(0x20);
+
+    return epd_temperature;
+}
+
+ void EPD_BWR_350_set_sleep(void)
+{
+    // deep sleep
+    EPD_WriteCmd(0x10);
+    EPD_WriteData(0x01);
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.h
new file mode 100644
index 00000000..89e57d73
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwr_350.h
@@ -0,0 +1,13 @@
+#pragma once
+
+uint8_t EPD_BWR_350_detect(void);
+uint8_t EPD_BWR_350_read_temp(void);
+
+uint8_t EPD_BWR_350_Display_start(uint8_t full_or_partial);
+void EPD_BWR_350_Display_byte(uint8_t data);
+void EPD_BWR_350_Display_buffer(unsigned char *image, int size);
+void EPD_BWR_350_Display_end();
+void EPD_BWR_350_Display_color_change();
+
+uint8_t EPD_BWR_350_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BWR_350_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.c
new file mode 100644
index 00000000..64f2102b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.c
@@ -0,0 +1,205 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+#include "epd_bwy_350.h"
+
+// UC8151C or similar EPD Controller
+
+enum PSR_FLAGS
+{
+    RES_96x230 = 0b00000000,
+    RES_96x252 = 0b01000000,
+    RES_128x296 = 0b10000000,
+    RES_160x296 = 0b11000000,
+
+    LUT_OTP = 0b00000000,
+    LUT_REG = 0b00100000,
+
+    FORMAT_BWR = 0b00000000,
+    FORMAT_BW = 0b00010000,
+
+    SCAN_DOWN = 0b00000000,
+    SCAN_UP = 0b00001000,
+
+    SHIFT_LEFT = 0b00000000,
+    SHIFT_RIGHT = 0b00000100,
+
+    BOOSTER_OFF = 0b00000000,
+    BOOSTER_ON = 0b00000010,
+
+    RESET_SOFT = 0b00000000,
+    RESET_NONE = 0b00000001
+};
+
+#define lut_bwy_350_refresh_time 10
+uint8_t lut_bwy_350_20_part[] =
+    {
+        0x20, 0x00, lut_bwy_350_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+uint8_t lut_bwy_350_22_part[] =
+    {
+        0x22, 0x80, lut_bwy_350_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+uint8_t lut_bwy_350_23_part[] =
+    {
+        0x23, 0x40, lut_bwy_350_refresh_time, 0x01, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
+
+uint8_t EPD_BWY_350_detect(void)
+{
+    // SW Reset
+    /*EPD_WriteCmd(0x12);
+    WaitMs(10);
+
+    EPD_WriteCmd(0x2F);
+    if (EPD_SPI_read() != 0x01)
+        return 0;
+    return 1;*/
+    return 0;
+}
+
+uint8_t EPD_BWY_350_read_temp(void)
+{
+    uint8_t epd_temperature = 0;
+    EPD_WriteCmd(0x04);
+
+    WaitMs(1);
+
+    EPD_WriteCmd(0x40);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    // power off
+    EPD_WriteCmd(0x02);
+
+    // deep sleep
+    EPD_WriteCmd(0x07);
+    EPD_WriteData(0xa5);
+
+    return epd_temperature;
+}
+
+#define scan_direction (SCAN_UP | RES_160x296 | FORMAT_BWR | BOOSTER_ON | RESET_NONE | LUT_OTP | SHIFT_RIGHT)
+
+uint8_t EPD_BWY_350_Display_start(uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // power on
+    EPD_WriteCmd(0x04);
+
+    WaitMs(1);
+
+    /*EPD_WriteCmd(0X4D);
+    EPD_WriteData(0x55);
+    EPD_WriteCmd(0XF3);
+    EPD_WriteData(0x0A);
+    EPD_WriteCmd(0X50);
+    EPD_WriteData(0x57);*/
+
+    EPD_WriteCmd(0x00);
+    EPD_WriteData(scan_direction);
+    EPD_WriteData(0x0f);
+
+    EPD_WriteCmd(0x40);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    EPD_WriteCmd(0x10);
+
+    return epd_temperature;
+}
+void EPD_BWY_350_Display_byte(uint8_t data)
+{
+    EPD_WriteData(data);
+}
+void EPD_BWY_350_Display_buffer(unsigned char *image, int size)
+{
+    for (int i = 0; i < size; i++)
+    {
+        EPD_WriteData(image[i]);
+    }
+}
+
+void EPD_BWY_350_Display_color_change()
+{
+    EPD_WriteCmd(0x13);
+}
+
+void EPD_BWY_350_Display_end()
+{
+    EPD_WriteCmd(0x12);
+}
+
+uint8_t EPD_BWY_350_Display(unsigned char *image, int size, uint8_t full_or_partial)
+{
+    uint8_t epd_temperature = 0;
+
+    // power on
+    EPD_WriteCmd(0x04);
+
+    WaitMs(1);
+
+    /*EPD_WriteCmd(0X4D);
+    EPD_WriteData(0x55);
+    EPD_WriteCmd(0XF3);
+    EPD_WriteData(0x0A);
+    EPD_WriteCmd(0X50);
+    EPD_WriteData(0x57);*/
+    EPD_WriteCmd(0x00);
+    EPD_WriteData(scan_direction); //| LUT_REG);
+    EPD_WriteData(0x0f);
+
+    EPD_WriteCmd(0x40);
+    epd_temperature = EPD_SPI_read();
+    EPD_SPI_read();
+
+    /*EPD_send_lut(lut_bwy_350_20_part, sizeof(lut_bwy_350_20_part));
+    EPD_send_empty_lut(0x21, 260);
+    EPD_send_lut(lut_bwy_350_22_part, sizeof(lut_bwy_350_22_part));
+    EPD_send_lut(lut_bwy_350_23_part, sizeof(lut_bwy_350_23_part));
+    EPD_send_empty_lut(0x24, 260);*/
+
+    //////////////////////// This parts clears the full screen
+    EPD_WriteCmd(0x10);
+    int i;
+    for (i = 0; i < 8832; i++)
+    {
+        EPD_WriteData(0);
+    }
+
+    EPD_WriteCmd(0x13);
+    for (i = 0; i < 8832; i++)
+    {
+        EPD_WriteData(0);
+    }
+    //////////////////////// This parts clears the full screen
+
+    EPD_WriteCmd(0x10);
+    for (i = 0; i < size; i++)
+    {
+        EPD_WriteData(~image[i]);
+    }
+    // load image data to EPD
+    // EPD_LoadImage(image, size, 0x13);
+
+    // EPD_WriteCmd(0XB6);
+    // EPD_WriteData(0x12);
+    //  trigger display refresh
+    EPD_WriteCmd(0x12);
+
+    return epd_temperature;
+}
+
+void EPD_BWY_350_set_sleep(void)
+{
+    // Vcom and data interval setting
+    // EPD_WriteCmd(0x50);
+    // EPD_WriteData(0xf7);
+
+    // power off
+    EPD_WriteCmd(0x02);
+
+    // deep sleep
+    EPD_WriteCmd(0x07);
+    EPD_WriteData(0xa5);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.h
new file mode 100644
index 00000000..7d24ff80
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_bwy_350.h
@@ -0,0 +1,13 @@
+#pragma once
+
+uint8_t EPD_BWY_350_detect(void);
+uint8_t EPD_BWY_350_read_temp(void);
+
+uint8_t EPD_BWY_350_Display_start(uint8_t full_or_partial);
+void EPD_BWY_350_Display_byte(uint8_t data);
+void EPD_BWY_350_Display_buffer(unsigned char *image, int size);
+void EPD_BWY_350_Display_end();
+void EPD_BWY_350_Display_color_change();
+
+uint8_t EPD_BWY_350_Display(unsigned char *image, int size, uint8_t full_or_partial);
+void EPD_BWY_350_set_sleep(void);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.c
new file mode 100644
index 00000000..7dade036
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.c
@@ -0,0 +1,152 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "epd.h"
+#include "epd_spi.h"
+
+ void EPD_init(void)
+{
+    gpio_set_func(EPD_RESET, AS_GPIO);
+    gpio_set_output_en(EPD_RESET, 1);
+    gpio_setup_up_down_resistor(EPD_RESET, PM_PIN_PULLUP_1M);
+
+    gpio_set_func(EPD_DC, AS_GPIO);
+    gpio_set_output_en(EPD_DC, 1);
+    gpio_setup_up_down_resistor(EPD_DC, PM_PIN_PULLUP_1M);
+
+    gpio_set_func(EPD_BUSY, AS_GPIO);
+    gpio_set_output_en(EPD_BUSY, 0);
+    gpio_set_input_en(EPD_BUSY, 1);
+    gpio_setup_up_down_resistor(EPD_BUSY, PM_PIN_PULLUP_1M);
+
+    gpio_set_func(EPD_CS, AS_GPIO);
+    gpio_set_output_en(EPD_CS, 1);
+    gpio_setup_up_down_resistor(EPD_CS, PM_PIN_PULLUP_1M);
+
+    gpio_set_func(EPD_CLK, AS_GPIO);
+    gpio_set_output_en(EPD_CLK, 1);
+    gpio_setup_up_down_resistor(EPD_CLK, PM_PIN_PULLUP_1M);
+
+    gpio_set_func(EPD_MOSI, AS_GPIO);
+    gpio_set_output_en(EPD_MOSI, 1);
+    gpio_setup_up_down_resistor(EPD_MOSI, PM_PIN_PULLUP_1M);
+
+    gpio_set_output_en(EPD_ENABLE, 0);
+    gpio_set_input_en(EPD_ENABLE, 1);
+    gpio_setup_up_down_resistor(EPD_ENABLE, PM_PIN_PULLUP_1M);
+}
+
+ void EPD_SPI_Write(unsigned char value)
+{
+    unsigned char i;
+
+    WaitUs(10);
+    for (i = 0; i < 8; i++)
+    {
+        gpio_write(EPD_CLK, 0);
+        if (value & 0x80)
+        {
+            gpio_write(EPD_MOSI, 1);
+        }
+        else
+        {
+            gpio_write(EPD_MOSI, 0);
+        }
+        value = (value << 1);
+        gpio_write(EPD_CLK, 1);
+    }
+}
+
+ uint8_t EPD_SPI_read(void)
+{
+    unsigned char i;
+    uint8_t value = 0;
+
+    gpio_shutdown(EPD_MOSI);
+    gpio_set_output_en(EPD_MOSI, 0);
+    gpio_set_input_en(EPD_MOSI, 1);
+    gpio_write(EPD_CS, 0);
+    EPD_ENABLE_WRITE_DATA();
+    WaitUs(10);
+    for (i = 0; i < 8; i++)
+    {
+        gpio_write(EPD_CLK, 0);
+        gpio_write(EPD_CLK, 1);
+        value <<= 1;
+        if (gpio_read(EPD_MOSI) != 0)
+        {
+            value |= 1;
+        }
+    }
+    gpio_set_output_en(EPD_MOSI, 1);
+    gpio_set_input_en(EPD_MOSI, 0);
+    gpio_write(EPD_CS, 1);
+    return value;
+}
+
+ void EPD_WriteCmd(unsigned char cmd)
+{
+    gpio_write(EPD_CS, 0);
+    EPD_ENABLE_WRITE_CMD();
+    EPD_SPI_Write(cmd);
+    gpio_write(EPD_CS, 1);
+}
+
+ void EPD_WriteData(unsigned char data)
+{
+    gpio_write(EPD_CS, 0);
+    EPD_ENABLE_WRITE_DATA();
+    EPD_SPI_Write(data);
+    gpio_write(EPD_CS, 1);
+}
+
+ void EPD_CheckStatus(int max_ms)
+{
+    unsigned long timeout_start = clock_time();
+    unsigned long timeout_ticks = max_ms * CLOCK_16M_SYS_TIMER_CLK_1MS;
+    WaitMs(1);
+    while (EPD_IS_BUSY())
+    {
+        if (clock_time() - timeout_start >= timeout_ticks)
+            return; // Here we had a timeout
+    }
+}
+
+ void EPD_CheckStatus_inverted(int max_ms)
+{
+    unsigned long timeout_start = clock_time();
+    unsigned long timeout_ticks = max_ms * CLOCK_16M_SYS_TIMER_CLK_1MS;
+    WaitMs(1);
+    while (!EPD_IS_BUSY())
+    {
+        if (clock_time() - timeout_start >= timeout_ticks)
+            return; // Here we had a timeout
+    }
+}
+
+ void EPD_send_lut(uint8_t lut[], int len)
+{
+    EPD_WriteCmd(lut[0]);
+    for (int r = 1; r <= len; r++)
+    {
+        EPD_WriteData(lut[r]);
+    }
+}
+
+ void EPD_send_empty_lut(uint8_t lut, int len)
+{
+    EPD_WriteCmd(lut);
+    for (int r = 0; r <= len; r++)
+        EPD_WriteData(0x00);
+}
+
+ void EPD_LoadImage(unsigned char *image, int size, uint8_t cmd)
+{
+    int i;
+    EPD_WriteCmd(cmd);
+    for (i = 0; i < size; i++)
+    {
+        EPD_WriteData(image[i]);
+    }
+    WaitMs(2);
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.h
new file mode 100644
index 00000000..9cbc463d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/epd_spi.h
@@ -0,0 +1,22 @@
+#pragma once
+
+#define EPD_POWER_ON() gpio_write(EPD_ENABLE, 0)
+
+#define EPD_POWER_OFF() gpio_write(EPD_ENABLE, 1)
+
+#define EPD_ENABLE_WRITE_CMD() gpio_write(EPD_DC, 0)
+#define EPD_ENABLE_WRITE_DATA() gpio_write(EPD_DC, 1)
+
+#define EPD_IS_BUSY() (!gpio_read(EPD_BUSY))
+
+
+void EPD_init(void);
+void EPD_SPI_Write(unsigned char value);
+uint8_t EPD_SPI_read(void);
+void EPD_WriteCmd(unsigned char cmd);
+void EPD_WriteData(unsigned char data);
+void EPD_CheckStatus(int max_ms);
+void EPD_CheckStatus_inverted(int max_ms);
+void EPD_send_lut(uint8_t lut[], int len);
+void EPD_send_empty_lut(uint8_t lut, int len);
+void EPD_LoadImage(unsigned char *image, int size, uint8_t cmd);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font.h
new file mode 100644
index 00000000..22507207
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font.h
@@ -0,0 +1,259 @@
+#pragma once
+static const uint8_t font[256][20]={ // https://raw.githubusercontent.com/basti79/LCD-fonts/master/10x16_vertikal_MSB_1.h
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x00
+{0xE0,0x01,0x30,0x03,0x50,0x02,0x28,0x05,0x28,0x04,0x28,0x04,0x28,0x05,0x50,0x02,0x30,0x03,0xE0,0x01},	// 0x01
+{0xE0,0x01,0xF0,0x03,0xB0,0x03,0xD8,0x06,0xD8,0x07,0xD8,0x07,0xD8,0x06,0xB0,0x03,0xF0,0x03,0xE0,0x01},	// 0x02
+{0x00,0x3E,0x80,0x7F,0xE0,0x7F,0xF0,0x7F,0xF8,0x3F,0xF8,0x3F,0xF0,0x7F,0xE0,0x7F,0x80,0x7F,0x00,0x3E},	// 0x03
+{0x00,0x01,0x80,0x03,0xC0,0x0F,0xE0,0x1F,0xF8,0x7F,0xF0,0x1F,0xE0,0x0F,0xC0,0x07,0x80,0x03,0x00,0x01},	// 0x04
+{0x80,0x03,0xC0,0x07,0xC0,0x07,0xC0,0x3F,0xF8,0x7F,0xB8,0x7F,0xC0,0x3F,0xC0,0x07,0xC0,0x07,0x80,0x03},	// 0x05
+{0x80,0x03,0xC0,0x07,0xC0,0x0F,0xC0,0x1F,0xF8,0x3F,0xB8,0x7F,0xC0,0x1F,0xC0,0x0F,0xC0,0x07,0x80,0x03},	// 0x06
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x07
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x08
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x09
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x0A
+{0xE0,0x01,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x08,0x24,0x10,0x2E,0xE0,0x71,0x00,0x70,0x00,0x18},	// 0x0B
+{0x00,0x00,0x00,0x1E,0x20,0x21,0xA0,0x40,0xF8,0x40,0xA0,0x40,0xA0,0x41,0x00,0x21,0x00,0x1E,0x00,0x00},	// 0x0C
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x0D
+{0x06,0x00,0x0E,0x00,0x0E,0x00,0xFC,0x1F,0x00,0x18,0x30,0x10,0x70,0x30,0x70,0x20,0xE0,0x7F,0x00,0x00},	// 0x0E
+{0x00,0x01,0xC0,0x0F,0xC0,0x04,0x40,0x08,0x60,0x18,0x40,0x08,0x40,0x04,0xC0,0x0C,0xC0,0x0B,0x00,0x01},	// 0x0F
+{0xF8,0x0F,0xF0,0x07,0xF0,0x07,0xE0,0x03,0xE0,0x03,0xE0,0x03,0xC0,0x01,0xC0,0x01,0x80,0x00,0x80,0x00},	// 0x10
+{0x80,0x00,0x80,0x00,0xC0,0x01,0xC0,0x01,0xE0,0x03,0xE0,0x03,0xE0,0x03,0xF0,0x07,0xF0,0x07,0xF8,0x0F},	// 0x11
+{0x00,0x00,0x00,0x00,0x08,0x10,0x04,0x20,0xFE,0x7F,0x04,0x20,0x08,0x10,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x12
+{0x00,0x00,0x00,0x00,0xD8,0x7F,0x00,0x00,0x00,0x00,0xD8,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x13
+{0x00,0x00,0x00,0x38,0x00,0x7C,0x00,0x7E,0xFE,0x7F,0x00,0x40,0x00,0x40,0xFE,0x7F,0x00,0x00,0x00,0x00},	// 0x14
+{0x00,0x00,0x00,0x00,0x86,0x3B,0xC2,0x4C,0x42,0x44,0x62,0x46,0x32,0x42,0xDC,0x41,0x00,0x00,0x00,0x00},	// 0x15
+{0x00,0x00,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x07,0x00,0x00},	// 0x16
+{0x00,0x00,0x00,0x00,0x11,0x10,0x09,0x20,0xFD,0x7F,0x09,0x20,0x11,0x10,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x17
+{0x00,0x00,0x00,0x00,0x00,0x10,0x00,0x20,0xFE,0x7F,0x00,0x20,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x18
+{0x00,0x00,0x00,0x00,0x08,0x00,0x04,0x00,0xFE,0x7F,0x04,0x00,0x08,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x19
+{0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xA0,0x02,0xC0,0x01,0x80,0x00,0x00,0x00},	// 0x1A
+{0x00,0x00,0x80,0x00,0xC0,0x01,0xA0,0x02,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00,0x00},	// 0x1B
+{0x00,0x00,0xF8,0x07,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x00,0x00},	// 0x1C
+{0x00,0x00,0x80,0x00,0xC0,0x01,0xA0,0x02,0x80,0x00,0x80,0x00,0xA0,0x02,0xC0,0x01,0x80,0x00,0x00,0x00},	// 0x1D
+{0x08,0x00,0x18,0x00,0x78,0x00,0xF8,0x01,0xF8,0x03,0xF8,0x0F,0xF8,0x03,0xF8,0x00,0x38,0x00,0x08,0x00},	// 0x1E
+{0x00,0x08,0x00,0x0C,0x00,0x0F,0xC0,0x0F,0xE0,0x0F,0xF8,0x0F,0xE0,0x0F,0x80,0x0F,0x00,0x0E,0x00,0x08},	// 0x1F
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x20
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xD8,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x21
+{0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x22
+{0x80,0x00,0x98,0x04,0xE0,0x05,0x80,0x1E,0x98,0x64,0xE0,0x05,0x80,0x1E,0x80,0x64,0x80,0x04,0x00,0x00},	// 0x23
+{0x00,0x00,0x00,0x00,0x18,0x38,0x08,0x64,0x08,0x42,0xFC,0xFF,0x88,0x41,0xF0,0x40,0x00,0x00,0x00,0x00},	// 0x24
+{0x08,0x38,0x10,0x44,0x20,0x44,0xC0,0x44,0x00,0x39,0x70,0x02,0x88,0x0C,0x88,0x10,0x88,0x20,0x70,0x40},	// 0x25
+{0xE0,0x00,0x10,0x01,0x08,0x3A,0x08,0x46,0x88,0x45,0xC8,0x4C,0x38,0x38,0x18,0x00,0x68,0x00,0x80,0x01},	// 0x26
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x78,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x27
+{0x00,0x00,0x00,0x00,0x00,0x00,0xE0,0x07,0x18,0x18,0x0C,0x30,0x04,0x20,0x02,0x40,0x02,0x40,0x00,0x00},	// 0x28
+{0x00,0x00,0x02,0x40,0x02,0x40,0x04,0x20,0x0C,0x30,0x18,0x18,0xE0,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x29
+{0x00,0x00,0x00,0x10,0x00,0x18,0x00,0x0F,0x00,0x72,0x00,0x0F,0x00,0x18,0x00,0x10,0x00,0x00,0x00,0x00},	// 0x2A
+{0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0xF8,0x07,0x40,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x00,0x00},	// 0x2B
+{0x00,0x00,0x00,0x00,0x00,0x00,0x19,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x2C
+{0x00,0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00,0x00,0x00,0x00},	// 0x2D
+{0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x2E
+{0x00,0x00,0x02,0x00,0x0C,0x00,0x30,0x00,0xC0,0x00,0x00,0x03,0x00,0x0C,0x00,0x30,0x00,0x40,0x00,0x00},	// 0x2F
+{0x00,0x00,0xC0,0x0F,0x30,0x30,0x08,0x40,0x08,0x40,0x08,0x40,0x30,0x30,0xC0,0x0F,0x00,0x00,0x00,0x00},	// 0x30
+{0x00,0x00,0x08,0x20,0x08,0x20,0x08,0x20,0xF8,0x7F,0x08,0x00,0x08,0x00,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x31
+{0x00,0x00,0x18,0x60,0x28,0x40,0x48,0x40,0x88,0x40,0x08,0x43,0x08,0x3C,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x32
+{0x00,0x00,0x00,0x00,0x08,0x40,0x08,0x42,0x08,0x42,0x08,0x42,0xF0,0x3D,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x33
+{0xC0,0x00,0x40,0x03,0x40,0x04,0x40,0x18,0x40,0x20,0xF8,0x7F,0x40,0x00,0x40,0x00,0x00,0x00,0x00,0x00},	// 0x34
+{0x00,0x00,0x00,0x00,0x08,0x7C,0x08,0x44,0x08,0x44,0x10,0x42,0xE0,0x41,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x35
+{0x00,0x00,0xE0,0x0F,0x10,0x32,0x08,0x44,0x08,0x44,0x08,0x44,0x10,0x42,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x36
+{0x00,0x00,0x00,0x40,0x18,0x40,0xE0,0x40,0x00,0x43,0x00,0x4C,0x00,0x50,0x00,0x60,0x00,0x00,0x00,0x00},	// 0x37
+{0x00,0x00,0xF0,0x38,0x08,0x45,0x08,0x42,0x08,0x42,0x08,0x45,0x90,0x45,0x60,0x38,0x00,0x00,0x00,0x00},	// 0x38
+{0x00,0x00,0x00,0x1E,0x08,0x21,0x88,0x40,0x88,0x40,0x88,0x40,0x30,0x21,0xC0,0x1F,0x00,0x00,0x00,0x00},	// 0x39
+{0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x06,0x18,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x3A
+{0x00,0x00,0x00,0x00,0x00,0x00,0x19,0x06,0x1E,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x3B
+{0x00,0x00,0x00,0x00,0xC0,0x00,0xC0,0x00,0x20,0x01,0x20,0x01,0x10,0x02,0x10,0x02,0x08,0x04,0x00,0x00},	// 0x3C
+{0x00,0x00,0x20,0x01,0x20,0x01,0x20,0x01,0x20,0x01,0x20,0x01,0x20,0x01,0x20,0x01,0x20,0x01,0x00,0x00},	// 0x3D
+{0x00,0x00,0x08,0x04,0x10,0x02,0x10,0x02,0x20,0x01,0x20,0x01,0xC0,0x00,0xC0,0x00,0x00,0x00,0x00,0x00},	// 0x3E
+{0x00,0x00,0x00,0x70,0x00,0x40,0xD8,0x40,0x00,0x41,0x00,0x42,0x00,0x64,0x00,0x38,0x00,0x00,0x00,0x00},	// 0x3F
+{0xC0,0x0F,0x30,0x18,0x18,0x20,0xC8,0x47,0x28,0x48,0x68,0x50,0xD8,0x51,0xE0,0x3F,0x20,0x00,0x20,0x00},	// 0x40
+{0x08,0x00,0x70,0x00,0xC0,0x01,0x40,0x0E,0x40,0x18,0x40,0x0C,0x40,0x03,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0x41
+{0x00,0x00,0xF8,0x1F,0x08,0x11,0x08,0x11,0x08,0x11,0x08,0x11,0x88,0x12,0x70,0x0C,0x00,0x00,0x00,0x00},	// 0x42
+{0xC0,0x03,0x30,0x0C,0x10,0x08,0x08,0x10,0x08,0x10,0x08,0x10,0x08,0x10,0x08,0x18,0x00,0x00,0x00,0x00},	// 0x43
+{0x00,0x00,0xF8,0x1F,0x08,0x10,0x08,0x10,0x08,0x10,0x08,0x10,0x10,0x08,0xE0,0x07,0x00,0x00,0x00,0x00},	// 0x44
+{0x00,0x00,0xF8,0x1F,0x88,0x10,0x88,0x10,0x88,0x10,0x88,0x10,0x88,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0x45
+{0x00,0x00,0xF8,0x1F,0x80,0x10,0x80,0x10,0x80,0x10,0x80,0x10,0x80,0x10,0x00,0x10,0x00,0x00,0x00,0x00},	// 0x46
+{0x00,0x00,0xC0,0x03,0x30,0x0C,0x10,0x08,0x08,0x10,0x08,0x10,0x88,0x10,0x88,0x10,0xF8,0x18,0x00,0x00},	// 0x47
+{0x00,0x00,0xF8,0x1F,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xF8,0x1F,0x00,0x00,0x00,0x00},	// 0x48
+{0x00,0x00,0x08,0x10,0x08,0x10,0x08,0x10,0xF8,0x1F,0x08,0x10,0x08,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0x49
+{0x00,0x00,0x00,0x00,0x08,0x00,0x08,0x10,0x08,0x10,0x08,0x10,0xF0,0x1F,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x4A
+{0x00,0x00,0xF8,0x1F,0x00,0x01,0x80,0x01,0x40,0x02,0x20,0x04,0x20,0x08,0x10,0x10,0x08,0x00,0x00,0x00},	// 0x4B
+{0x00,0x00,0xF8,0x1F,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x4C
+{0xF8,0x1F,0x00,0x1C,0x80,0x07,0xE0,0x00,0x60,0x00,0x80,0x03,0x00,0x1C,0xF8,0x1F,0x00,0x00,0x00,0x00},	// 0x4D
+{0x00,0x00,0xF8,0x1F,0x00,0x08,0x00,0x06,0x80,0x01,0x60,0x00,0x10,0x00,0xF8,0x1F,0x00,0x00,0x00,0x00},	// 0x4E
+{0x00,0x00,0xE0,0x07,0x10,0x08,0x08,0x10,0x08,0x10,0x08,0x10,0x08,0x10,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0x4F
+{0x00,0x00,0xF8,0x1F,0x80,0x10,0x80,0x10,0x80,0x10,0x80,0x10,0x00,0x11,0x00,0x0E,0x00,0x00,0x00,0x00},	// 0x50
+{0x00,0x00,0xE0,0x07,0x10,0x08,0x08,0x10,0x08,0x10,0x08,0x10,0x0C,0x10,0x12,0x08,0xE2,0x07,0x00,0x00},	// 0x51
+{0x00,0x00,0xF8,0x1F,0x80,0x10,0x80,0x10,0xC0,0x10,0x20,0x11,0x10,0x0E,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x52
+{0x00,0x00,0x18,0x0E,0x08,0x12,0x08,0x11,0x08,0x11,0x88,0x10,0x90,0x10,0x70,0x18,0x00,0x00,0x00,0x00},	// 0x53
+{0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0xF8,0x1F,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x10,0x00,0x00},	// 0x54
+{0x00,0x00,0xE0,0x1F,0x18,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x10,0x00,0xE0,0x1F,0x00,0x00,0x00,0x00},	// 0x55
+{0x00,0x10,0x00,0x0C,0x80,0x03,0x60,0x00,0x18,0x00,0x18,0x00,0xE0,0x00,0x00,0x03,0x00,0x0C,0x00,0x10},	// 0x56
+{0x00,0x18,0xC0,0x07,0x38,0x00,0xF0,0x00,0x00,0x07,0x80,0x03,0x70,0x00,0x38,0x00,0xC0,0x07,0x00,0x18},	// 0x57
+{0x08,0x10,0x10,0x08,0x20,0x04,0x40,0x02,0x80,0x01,0x80,0x01,0x40,0x02,0x20,0x04,0x10,0x08,0x08,0x10},	// 0x58
+{0x00,0x10,0x00,0x08,0x00,0x06,0x00,0x01,0xF8,0x00,0x00,0x01,0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x10},	// 0x59
+{0x00,0x00,0x18,0x10,0x28,0x10,0x48,0x10,0x88,0x10,0x08,0x11,0x08,0x12,0x08,0x14,0x08,0x18,0x00,0x00},	// 0x5A
+{0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x7F,0x02,0x40,0x02,0x40,0x02,0x40,0x02,0x40,0x00,0x00,0x00,0x00},	// 0x5B
+{0x00,0x00,0x00,0x40,0x00,0x30,0x00,0x0C,0x00,0x03,0xC0,0x00,0x30,0x00,0x0C,0x00,0x02,0x00,0x00,0x00},	// 0x5C
+{0x00,0x00,0x02,0x40,0x02,0x40,0x02,0x40,0x02,0x40,0xFE,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x5D
+{0x00,0x00,0x20,0x00,0xC0,0x00,0x00,0x07,0x00,0x1C,0x00,0x70,0x00,0x0E,0xC0,0x01,0x20,0x00,0x00,0x00},	// 0x5E
+{0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00,0x04,0x00},	// 0x5F
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x60
+{0x00,0x00,0x30,0x00,0x48,0x04,0x88,0x04,0x88,0x04,0x90,0x04,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x61
+{0x00,0x00,0xF8,0x7F,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x06,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x62
+{0x00,0x00,0xE0,0x01,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x08,0x04,0x08,0x04,0x00,0x00,0x00,0x00},	// 0x63
+{0x00,0x00,0xE0,0x01,0x18,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x02,0xF8,0x7F,0x00,0x00,0x00,0x00},	// 0x64
+{0x00,0x00,0xE0,0x01,0x90,0x02,0x88,0x04,0x88,0x04,0x88,0x04,0x88,0x04,0x88,0x03,0x00,0x00,0x00,0x00},	// 0x65
+{0x00,0x00,0x00,0x04,0x00,0x04,0xF8,0x3F,0x00,0x24,0x00,0x44,0x00,0x44,0x00,0x44,0x00,0x44,0x00,0x00},	// 0x66
+{0x00,0x00,0xE0,0x01,0x19,0x02,0x09,0x04,0x09,0x04,0x09,0x04,0x12,0x02,0xFC,0x07,0x00,0x00,0x00,0x00},	// 0x67
+{0x00,0x00,0xF8,0x7F,0x00,0x01,0x00,0x02,0x00,0x04,0x00,0x04,0x00,0x04,0xF8,0x03,0x00,0x00,0x00,0x00},	// 0x68
+{0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x64,0xF8,0x67,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x69
+{0x00,0x00,0x01,0x00,0x01,0x04,0x01,0x04,0x01,0x64,0xFE,0x67,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x6A
+{0x00,0x00,0xF8,0x7F,0x80,0x00,0xC0,0x00,0x20,0x01,0x20,0x02,0x10,0x02,0x08,0x04,0x00,0x00,0x00,0x00},	// 0x6B
+{0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x40,0x00,0x40,0xF8,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x6C
+{0xF8,0x07,0x00,0x02,0x00,0x04,0x00,0x04,0xF8,0x03,0x00,0x02,0x00,0x04,0x00,0x04,0xF8,0x03,0x00,0x00},	// 0x6D
+{0x00,0x00,0xF8,0x07,0x00,0x03,0x00,0x02,0x00,0x04,0x00,0x04,0x00,0x04,0xF8,0x03,0x00,0x00,0x00,0x00},	// 0x6E
+{0x00,0x00,0xE0,0x01,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x02,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x6F
+{0x00,0x00,0xFF,0x07,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x06,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x70
+{0x00,0x00,0xE0,0x01,0x18,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x02,0xFF,0x07,0x00,0x00,0x00,0x00},	// 0x71
+{0x00,0x00,0x00,0x00,0xF8,0x07,0x00,0x01,0x00,0x02,0x00,0x04,0x00,0x04,0x00,0x07,0x00,0x00,0x00,0x00},	// 0x72
+{0x00,0x00,0x18,0x03,0x88,0x04,0x88,0x04,0x48,0x04,0x48,0x04,0x30,0x04,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x73
+{0x00,0x00,0x00,0x04,0x00,0x04,0xF0,0x1F,0x08,0x04,0x08,0x04,0x08,0x04,0x08,0x04,0x00,0x00,0x00,0x00},	// 0x74
+{0x00,0x00,0xF0,0x07,0x08,0x00,0x08,0x00,0x08,0x00,0x10,0x00,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x75
+{0x00,0x04,0x80,0x03,0x60,0x00,0x18,0x00,0x08,0x00,0x30,0x00,0xC0,0x00,0x00,0x03,0x00,0x04,0x00,0x00},	// 0x76
+{0x00,0x06,0xE0,0x01,0x18,0x00,0x70,0x00,0x80,0x03,0x80,0x01,0x70,0x00,0x18,0x00,0xE0,0x01,0x00,0x06},	// 0x77
+{0x00,0x00,0x08,0x04,0x10,0x02,0x20,0x01,0xC0,0x00,0xC0,0x00,0x20,0x01,0x10,0x02,0x08,0x04,0x00,0x00},	// 0x78
+{0x01,0x04,0x01,0x03,0xC1,0x00,0x62,0x00,0x1C,0x00,0x18,0x00,0x60,0x00,0x80,0x00,0x00,0x03,0x00,0x04},	// 0x79
+{0x00,0x00,0x08,0x04,0x18,0x04,0x28,0x04,0x48,0x04,0x88,0x04,0x08,0x05,0x08,0x06,0x08,0x04,0x00,0x00},	// 0x7A
+{0x00,0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x7C,0x3F,0x02,0x40,0x02,0x40,0x02,0x40,0x00,0x00,0x00,0x00},	// 0x7B
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFE,0x7F,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x7C
+{0x00,0x00,0x00,0x00,0x02,0x40,0x02,0x40,0x02,0x40,0x7C,0x3F,0x80,0x00,0x80,0x00,0x00,0x00,0x00,0x00},	// 0x7D
+{0xC0,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x80,0x00,0x80,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x80,0x01},	// 0x7E
+{0x00,0x00,0xF8,0x01,0x08,0x03,0x08,0x04,0x08,0x08,0x08,0x04,0x08,0x03,0xF8,0x01,0x00,0x00,0x00,0x00},	// 0x7F
+{0xC0,0x03,0x30,0x0C,0x10,0x08,0x08,0x10,0x08,0x10,0x09,0x10,0x0D,0x10,0x0B,0x18,0x00,0x00,0x00,0x00},	// 0x80
+{0x00,0x00,0xF0,0x07,0x08,0x20,0x08,0x00,0x08,0x00,0x10,0x20,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x81
+{0x00,0x00,0xE0,0x01,0x90,0x02,0x88,0x04,0x88,0x24,0x88,0x44,0x88,0x04,0x88,0x03,0x00,0x00,0x00,0x00},	// 0x82
+{0x00,0x00,0x30,0x00,0x48,0x24,0x88,0x44,0x88,0x44,0x90,0x24,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x83
+{0x00,0x00,0x30,0x00,0x48,0x24,0x88,0x04,0x88,0x04,0x90,0x24,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x84
+{0x00,0x00,0x30,0x00,0x48,0x44,0x88,0x24,0x88,0x04,0x90,0x04,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x85
+{0x00,0x00,0x30,0x00,0x48,0x04,0x88,0x44,0x88,0xA4,0x90,0x44,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0x86
+{0x00,0x00,0xE0,0x01,0x10,0x02,0x08,0x04,0x09,0x04,0x0D,0x04,0x0B,0x04,0x08,0x04,0x00,0x00,0x00,0x00},	// 0x87
+{0x00,0x00,0xE0,0x01,0x90,0x22,0x88,0x44,0x88,0x44,0x88,0x24,0x88,0x04,0x88,0x03,0x00,0x00,0x00,0x00},	// 0x88
+{0x00,0x00,0xE0,0x01,0x90,0x02,0x88,0x24,0x88,0x04,0x88,0x04,0x88,0x24,0x88,0x03,0x00,0x00,0x00,0x00},	// 0x89
+{0x00,0x00,0xE0,0x01,0x90,0x02,0x88,0x44,0x88,0x24,0x88,0x04,0x88,0x04,0x88,0x03,0x00,0x00,0x00,0x00},	// 0x8A
+{0x00,0x00,0x00,0x04,0x00,0x24,0x00,0x04,0xF8,0x07,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x8B
+{0x00,0x00,0x00,0x04,0x00,0x24,0x00,0x44,0xF8,0x47,0x00,0x20,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x8C
+{0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x44,0xF8,0x27,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x8D
+{0x08,0x00,0x70,0x00,0xC0,0x81,0x40,0x0E,0x40,0x18,0x40,0x0C,0x40,0x83,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0x8E
+{0x08,0x00,0x70,0x00,0xC0,0x01,0x40,0x4E,0x40,0xB0,0x40,0xB8,0x40,0x4F,0xC0,0x01,0x70,0x00,0x08,0x00},	// 0x8F
+{0x00,0x00,0xF8,0x1F,0x88,0x10,0x88,0x10,0x88,0x50,0x88,0x90,0x88,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0x90
+{0x70,0x04,0xC8,0x04,0x88,0x04,0x88,0x04,0xF0,0x03,0x98,0x04,0x88,0x04,0x88,0x04,0x88,0x03,0x00,0x00},	// 0x91
+{0x08,0x00,0x30,0x00,0xE0,0x01,0x20,0x06,0x20,0x18,0xF8,0x1F,0x88,0x10,0x88,0x10,0x08,0x10,0x00,0x00},	// 0x92
+{0x00,0x00,0xE0,0x01,0x10,0x22,0x08,0x44,0x08,0x44,0x08,0x24,0x10,0x02,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x93
+{0x00,0x00,0xE0,0x01,0x10,0x22,0x08,0x04,0x08,0x04,0x08,0x24,0x10,0x02,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x94
+{0x00,0x00,0xE0,0x01,0x10,0x42,0x08,0x24,0x08,0x04,0x08,0x04,0x10,0x02,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0x95
+{0x00,0x00,0xF0,0x07,0x08,0x20,0x08,0x40,0x08,0x40,0x10,0x20,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x96
+{0x00,0x00,0xF0,0x07,0x08,0x40,0x08,0x20,0x08,0x00,0x10,0x00,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0x97
+{0x01,0x04,0x01,0x03,0xC1,0x20,0x62,0x00,0x1C,0x00,0x18,0x20,0x60,0x00,0x80,0x00,0x00,0x03,0x00,0x04},	// 0x98
+{0x00,0x00,0xE0,0x07,0x10,0x88,0x08,0x10,0x08,0x10,0x08,0x10,0x08,0x90,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0x99
+{0x00,0x00,0xE0,0x1F,0x18,0x80,0x08,0x00,0x08,0x00,0x08,0x00,0x10,0x80,0xE0,0x1F,0x00,0x00,0x00,0x00},	// 0x9A
+{0x00,0x00,0xE8,0x01,0x10,0x02,0x28,0x04,0xC8,0x04,0x08,0x05,0x10,0x02,0xE0,0x05,0x00,0x00,0x00,0x00},	// 0x9B
+{0x00,0x00,0x00,0x00,0x08,0x00,0x18,0x02,0xE8,0x3F,0x08,0x42,0x08,0x42,0x08,0x40,0x00,0x00,0x00,0x00},	// 0x9C
+{0x00,0x00,0xE8,0x07,0x30,0x08,0x68,0x10,0x88,0x10,0x08,0x11,0x08,0x16,0x10,0x0C,0xE0,0x17,0x00,0x00},	// 0x9D
+{0x00,0x00,0x08,0x04,0x10,0x02,0x20,0x01,0xC0,0x00,0xC0,0x00,0x20,0x01,0x10,0x02,0x08,0x04,0x00,0x00},	// 0x9E
+{0x00,0x00,0x01,0x00,0x01,0x04,0x01,0x04,0xFE,0x7F,0x00,0x84,0x00,0x84,0x00,0x80,0x00,0x00,0x00,0x00},	// 0x9F
+{0x00,0x00,0x30,0x00,0x48,0x04,0x88,0x04,0x88,0x24,0x90,0x44,0xF8,0x03,0x08,0x00,0x00,0x00,0x00,0x00},	// 0xA0
+{0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x04,0xF8,0x27,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xA1
+{0x00,0x00,0xE0,0x01,0x10,0x02,0x08,0x04,0x08,0x24,0x08,0x44,0x10,0x02,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0xA2
+{0x00,0x00,0xF0,0x07,0x08,0x00,0x08,0x00,0x08,0x20,0x10,0x40,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xA3
+{0x00,0x00,0xF8,0x07,0x00,0x23,0x00,0x42,0x00,0x24,0x00,0x24,0x00,0x44,0xF8,0x03,0x00,0x00,0x00,0x00},	// 0xA4
+{0x00,0x00,0xF8,0x1F,0x00,0x48,0x00,0x86,0x80,0xC1,0x60,0x40,0x10,0x80,0xF8,0x1F,0x00,0x00,0x00,0x00},	// 0xA5
+{0x00,0x00,0x00,0x00,0x00,0x4C,0x00,0x52,0x00,0x52,0x00,0x52,0x00,0x3E,0x00,0x02,0x00,0x00,0x00,0x00},	// 0xA6
+{0x00,0x00,0x00,0x00,0x00,0x3C,0x00,0x42,0x00,0x42,0x00,0x42,0x00,0x42,0x00,0x3C,0x00,0x00,0x00,0x00},	// 0xA7
+{0x00,0x00,0x0E,0x00,0x13,0x00,0x11,0x00,0x21,0x00,0xC1,0x06,0x01,0x00,0x07,0x00,0x00,0x00,0x00,0x00},	// 0xA8
+{0x00,0x00,0x00,0x1C,0x00,0x22,0x00,0x5D,0x00,0x55,0x00,0x5D,0x00,0x22,0x00,0x1C,0x00,0x00,0x00,0x00},	// 0xA9
+{0x00,0x00,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0x00,0x01,0xE0,0x01,0x00,0x00},	// 0xAA
+{0x08,0x40,0x30,0x7E,0x40,0x00,0x80,0x01,0x00,0x06,0x00,0x08,0x08,0x31,0x38,0x41,0x28,0x01,0xC8,0x00},	// 0xAB
+{0x08,0x40,0x30,0x7E,0x40,0x00,0x80,0x01,0x00,0x06,0x60,0x08,0xA0,0x30,0x20,0x41,0xF8,0x01,0x20,0x00},	// 0xAC
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xAD
+{0x00,0x00,0x80,0x00,0x40,0x01,0x20,0x02,0x10,0x04,0x80,0x00,0x40,0x01,0x20,0x02,0x10,0x04,0x00,0x00},	// 0xAE
+{0x00,0x00,0x10,0x04,0x20,0x02,0x40,0x01,0x80,0x00,0x10,0x04,0x20,0x02,0x40,0x01,0x80,0x00,0x00,0x00},	// 0xAF
+{0x36,0xDB,0x36,0xDB,0x00,0x00,0x36,0xDB,0x36,0xDB,0x00,0x00,0x36,0xDB,0x36,0xDB,0x00,0x00,0x00,0x00},	// 0xB0
+{0xDB,0x36,0xDB,0x36,0x36,0xDB,0xFF,0xFF,0xDB,0x36,0x36,0xDB,0xFF,0xFF,0xDB,0x36,0x36,0xDB,0x36,0xDB},	// 0xB1
+{0xFF,0xFF,0xFF,0xFF,0x36,0xDB,0xFF,0xFF,0xFF,0xFF,0x36,0xDB,0xFF,0xFF,0xFF,0xFF,0x36,0xDB,0x36,0xDB},	// 0xB2
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xB3
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xB4
+{0x08,0x00,0x70,0x00,0xC0,0x01,0x40,0x0E,0x40,0x58,0x40,0x8C,0x40,0x03,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0xB5
+{0x08,0x00,0x70,0x00,0xC0,0x01,0x40,0x4E,0x40,0x98,0x40,0x8C,0x40,0x43,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0xB6
+{0x08,0x00,0x70,0x00,0xC0,0x01,0x40,0x8E,0x40,0x58,0x40,0x0C,0x40,0x03,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0xB7
+{0xC0,0x0F,0x30,0x30,0x98,0x67,0xC8,0x4C,0x48,0x48,0x48,0x48,0x58,0x68,0x30,0x30,0xC0,0x0F,0x00,0x00},	// 0xB8
+{0x40,0x01,0x40,0x01,0x40,0x01,0x7F,0xFF,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xB9
+{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0xFF,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xBA
+{0x40,0x01,0x40,0x01,0x40,0x01,0x7F,0x01,0x00,0x01,0xFF,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xBB
+{0x40,0x01,0x40,0x01,0x40,0x01,0x40,0xFF,0x40,0x00,0xC0,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xBC
+{0x00,0x00,0xC0,0x0F,0x20,0x10,0x30,0x20,0x10,0x20,0xF8,0x7F,0x10,0x20,0x10,0x20,0x00,0x00,0x00,0x00},	// 0xBD
+{0x00,0x40,0x00,0x20,0x20,0x19,0x20,0x05,0xF8,0x03,0x20,0x05,0x20,0x09,0x00,0x10,0x00,0x20,0x00,0x40},	// 0xBE
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xBF
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0xFF,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC0
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0xFF,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC1
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xFF,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC2
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC3
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC4
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0xFF,0xFF,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xC5
+{0x00,0x00,0x30,0x00,0x48,0x24,0x88,0x44,0x88,0x24,0x90,0x24,0xF8,0x43,0x08,0x00,0x00,0x00,0x00,0x00},	// 0xC6
+{0x08,0x00,0x70,0x00,0xC0,0x41,0x40,0x8E,0x40,0xD8,0x40,0x4C,0x40,0x83,0xC0,0x00,0x30,0x00,0x08,0x00},	// 0xC7
+{0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0xFF,0x40,0x00,0x40,0xFF,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xC8
+{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x01,0x00,0x01,0x7F,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xC9
+{0x40,0x01,0x40,0x01,0x40,0x01,0x40,0xFF,0x40,0x00,0x40,0xFF,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xCA
+{0x40,0x01,0x40,0x01,0x40,0x01,0x7F,0x01,0x00,0x01,0x7F,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xCB
+{0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0xFF,0x00,0x00,0x7F,0xFF,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xCC
+{0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xCD
+{0x40,0x01,0x40,0x01,0x40,0x01,0x7F,0xFF,0x00,0x00,0x7F,0xFF,0x40,0x01,0x40,0x01,0x40,0x01,0x40,0x01},	// 0xCE
+{0x00,0x00,0x20,0x10,0xC0,0x0F,0x40,0x08,0x40,0x08,0x40,0x08,0x40,0x08,0xC0,0x0F,0x20,0x10,0x00,0x00},	// 0xCF
+{0x00,0x00,0xE0,0x41,0x10,0x52,0x08,0x74,0x08,0x24,0x08,0x54,0x10,0x0E,0xE0,0x03,0x00,0x00,0x00,0x00},	// 0xD0
+{0x00,0x01,0xF8,0x1F,0x08,0x11,0x08,0x11,0x08,0x10,0x08,0x10,0x10,0x08,0xE0,0x07,0x00,0x00,0x00,0x00},	// 0xD1
+{0x00,0x00,0xF8,0x1F,0x88,0x10,0x88,0x50,0x88,0x90,0x88,0x90,0x88,0x50,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD2
+{0x00,0x00,0xF8,0x1F,0x88,0x90,0x88,0x10,0x88,0x10,0x88,0x10,0x88,0x90,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD3
+{0x00,0x00,0xF8,0x1F,0x88,0x10,0x88,0x10,0x88,0x90,0x88,0x50,0x88,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD4
+{0x00,0x00,0x00,0x04,0x00,0x04,0x00,0x04,0xF8,0x07,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xD5
+{0x00,0x00,0x08,0x10,0x08,0x10,0x08,0x10,0xF8,0x5F,0x08,0x90,0x08,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD6
+{0x00,0x00,0x08,0x10,0x08,0x10,0x08,0x50,0xF8,0x9F,0x08,0x90,0x08,0x50,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD7
+{0x00,0x00,0x08,0x10,0x08,0x90,0x08,0x10,0xF8,0x1F,0x08,0x10,0x08,0x90,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xD8
+{0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0xFF,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xD9
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00},	// 0xDA
+{0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF,0xFF},	// 0xDB
+{0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00},	// 0xDC
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3E,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xDD
+{0x00,0x00,0x08,0x10,0x08,0x10,0x08,0x90,0xF8,0x5F,0x08,0x10,0x08,0x10,0x08,0x10,0x00,0x00,0x00,0x00},	// 0xDE
+{0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF,0x00,0xFF},	// 0xDF
+{0x00,0x00,0xE0,0x07,0x10,0x08,0x08,0x10,0x08,0x50,0x08,0x90,0x08,0x10,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0xE0
+{0x00,0x00,0xF8,0x3F,0x00,0x40,0x00,0x40,0x08,0x47,0x88,0x38,0x48,0x00,0x30,0x00,0x00,0x00,0x00,0x00},	// 0xE1
+{0x00,0x00,0xE0,0x07,0x10,0x08,0x08,0x50,0x08,0x90,0x08,0x90,0x08,0x50,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0xE2
+{0x00,0x00,0xE0,0x07,0x10,0x08,0x08,0x90,0x08,0x50,0x08,0x10,0x08,0x10,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0xE3
+{0x00,0x00,0xE0,0x01,0x10,0x22,0x08,0x44,0x08,0x24,0x08,0x24,0x10,0x42,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0xE4
+{0x00,0x00,0xE0,0x07,0x10,0x48,0x08,0x90,0x08,0xD0,0x08,0x50,0x08,0x90,0x10,0x08,0xE0,0x07,0x00,0x00},	// 0xE5
+{0x00,0x00,0xFF,0x07,0x10,0x00,0x08,0x00,0x08,0x00,0x08,0x00,0x10,0x00,0xF8,0x07,0x00,0x00,0x00,0x00},	// 0xE6
+{0x00,0x00,0xFF,0x7F,0x10,0x02,0x08,0x04,0x08,0x04,0x08,0x04,0x10,0x06,0xE0,0x01,0x00,0x00,0x00,0x00},	// 0xE7
+{0x00,0x00,0xF8,0x1F,0x20,0x04,0x20,0x04,0x20,0x04,0x20,0x04,0x40,0x04,0x80,0x03,0x00,0x00,0x00,0x00},	// 0xE8
+{0x00,0x00,0xE0,0x1F,0x18,0x00,0x08,0x00,0x08,0x40,0x08,0x80,0x10,0x00,0xE0,0x1F,0x00,0x00,0x00,0x00},	// 0xE9
+{0x00,0x00,0xE0,0x1F,0x18,0x00,0x08,0x40,0x08,0x80,0x08,0x80,0x10,0x40,0xE0,0x1F,0x00,0x00,0x00,0x00},	// 0xEA
+{0x00,0x00,0xE0,0x1F,0x18,0x00,0x08,0x80,0x08,0x40,0x08,0x00,0x10,0x00,0xE0,0x1F,0x00,0x00,0x00,0x00},	// 0xEB
+{0x01,0x04,0x01,0x03,0xC1,0x00,0x62,0x00,0x1C,0x20,0x18,0x40,0x60,0x00,0x80,0x00,0x00,0x03,0x00,0x04},	// 0xEC
+{0x00,0x10,0x00,0x08,0x00,0x06,0x00,0x01,0xF8,0x40,0x00,0x81,0x00,0x02,0x00,0x04,0x00,0x08,0x00,0x10},	// 0xED
+{0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80},	// 0xEE
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xEF
+{0x00,0x00,0x00,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x80,0x00,0x00,0x00,0x00,0x00},	// 0xF0
+{0x00,0x00,0x08,0x01,0x08,0x01,0x08,0x01,0x08,0x01,0xC8,0x07,0x08,0x01,0x08,0x01,0x08,0x01,0x00,0x00},	// 0xF1
+{0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00,0x05,0x00},	// 0xF2
+{0x08,0x42,0x10,0x52,0x20,0x5A,0xC0,0x6C,0x00,0x01,0x60,0x02,0xA0,0x0C,0x20,0x11,0xF8,0x21,0x20,0x40},	// 0xF3
+{0x00,0x00,0x00,0x38,0x00,0x7C,0x00,0x7E,0xFE,0x7F,0x00,0x40,0x00,0x40,0xFE,0x7F,0x00,0x00,0x00,0x00},	// 0xF4
+{0x00,0x00,0x00,0x00,0x86,0x3B,0xC2,0x4C,0x42,0x44,0x62,0x46,0x32,0x42,0xDC,0x41,0x00,0x00,0x00,0x00},	// 0xF5
+{0x00,0x00,0x40,0x00,0x40,0x00,0x40,0x00,0x58,0x06,0x58,0x06,0x40,0x00,0x40,0x00,0x40,0x00,0x00,0x00},	// 0xF6
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x05,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xF7
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x48,0x00,0x48,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xF8
+{0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xF9
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0xC0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xFA
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x7E,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xFB
+{0x00,0x00,0x00,0x00,0x00,0x42,0x00,0x52,0x00,0x52,0x00,0x52,0x00,0x6C,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xFC
+{0x00,0x00,0x00,0x00,0x00,0x42,0x00,0x46,0x00,0x4A,0x00,0x4A,0x00,0x32,0x00,0x00,0x00,0x00,0x00,0x00},	// 0xFD
+{0x00,0x00,0xF8,0x07,0xF8,0x07,0xF8,0x07,0xF8,0x07,0xF8,0x07,0xF8,0x07,0xF8,0x07,0xF8,0x07,0x00,0x00},	// 0xFE
+{0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00} 	// 0xFF
+};
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font16.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font16.h
new file mode 100644
index 00000000..6b8936c8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font16.h
@@ -0,0 +1,199 @@
+// Created by http://oleddisplay.squix.ch/ Consider a donation
+// In case of problems make sure that you are using the font file with the correct version!
+const uint8_t Dialog_plain_16Bitmaps[]  = {
+
+	// Bitmap Data:
+	0x00, // ' '
+	0xAA,0xAA,0x0A, // '!'
+	0x94,0xA5,0x20, // '"'
+	0x0C,0x80,0x88,0x09,0x87,0xFE,0x19,0x01,0x10,0x13,0x0F,0xFC,0x32,0x02,0x20,0x26,0x00, // '#'
+	0x10,0x10,0x7C,0xD2,0x90,0x90,0x70,0x1C,0x12,0x12,0x96,0x7C,0x10,0x10, // '$'
+	0x70,0x42,0x21,0x08,0x88,0x22,0x60,0x89,0x01,0xC8,0x00,0x27,0x01,0x22,0x0C,0x88,0x22,0x21,0x08,0x84,0x1C, // '%'
+	0x3C,0x06,0x20,0x40,0x04,0x00,0x20,0x05,0x00,0x88,0x48,0x44,0x82,0x48,0x18,0x41,0x83,0xE4, // '&'
+	0xAA, // '''
+	0x33,0x10,0x88,0x42,0x10,0x84,0x10,0x86,0x18, // '('
+	0xC3,0x08,0x41,0x08,0x42,0x10,0x88,0x46,0x60, // ')'
+	0x10,0x10,0x92,0x7C,0x38,0xD6,0x10,0x10, // '*'
+	0x08,0x02,0x00,0x80,0x20,0xFF,0x82,0x00,0x80,0x20,0x08,0x00, // '+'
+	0x49,0x40, // ','
+	0xF0, // '-'
+	0xA0, // '.'
+	0x08,0x21,0x04,0x10,0x82,0x08,0x41,0x04,0x30,0x80, // '/'
+	0x3C,0x21,0x10,0x90,0x28,0x14,0x0A,0x05,0x02,0x81,0x21,0x10,0x87,0x80, // '0'
+	0x70,0xD0,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0x10,0xFE, // '1'
+	0x78,0xC4,0x82,0x02,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0xFE, // '2'
+	0x7C,0x41,0x80,0x40,0x20,0x31,0xE0,0x0C,0x02,0x01,0x00,0xA0,0x8F,0x80, // '3'
+	0x06,0x02,0x80,0xA0,0x48,0x22,0x10,0x84,0x22,0x08,0xFF,0x80,0x80,0x20,0x08, // '4'
+	0x7E,0x20,0x10,0x08,0x07,0xC2,0x10,0x04,0x02,0x01,0x00,0xA0,0x8F,0x80, // '5'
+	0x1C,0x31,0x10,0x10,0x0B,0xC6,0x12,0x05,0x02,0x81,0x40,0x90,0x87,0x80, // '6'
+	0xFF,0x00,0x80,0x80,0x40,0x40,0x20,0x20,0x10,0x08,0x08,0x04,0x04,0x00, // '7'
+	0x3C,0x61,0xA0,0x50,0x2C,0x31,0xE3,0x0D,0x02,0x81,0x40,0x90,0x87,0x80, // '8'
+	0x3C,0x21,0x20,0x90,0x28,0x14,0x09,0x0C,0x7A,0x01,0x01,0x11,0x87,0x00, // '9'
+	0xA0,0x0A, // ':'
+	0x48,0x00,0x12,0x50, // ';'
+	0x00,0x40,0x70,0x70,0x38,0x08,0x00,0xE0,0x07,0x00,0x1C,0x00,0x40, // '<'
+	0xFF,0xC0,0x00,0x00,0x7F,0xE0, // '='
+	0x80,0x0E,0x00,0x38,0x01,0xC0,0x04,0x07,0x03,0x83,0x80,0x80,0x00, // '>'
+	0x79,0x08,0x10,0x20,0xC3,0x0C,0x10,0x20,0x00,0x81,0x00, // '?'
+	0x0F,0xC0,0x30,0x60,0x80,0x62,0x3D,0x4C,0x86,0x52,0x04,0xA4,0x09,0x48,0x12,0x90,0x25,0x90,0xD1,0x1E,0xC1,0x00,0x01,0x83,0x00,0xFC,0x00, // '@'
+	0x04,0x00,0x40,0x0A,0x00,0xA0,0x11,0x01,0x10,0x20,0x82,0x08,0x3F,0x84,0x04,0x40,0x48,0x02, // 'A'
+	0xFE,0x20,0x68,0x0A,0x02,0x81,0xBF,0xC8,0x1A,0x02,0x80,0xA0,0x28,0x13,0xF8, // 'B'
+	0x1F,0x08,0x64,0x02,0x00,0x80,0x20,0x08,0x02,0x00,0x80,0x10,0x02,0x18,0x7C, // 'C'
+	0xFE,0x10,0x62,0x02,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x12,0x0C,0x7F,0x00, // 'D'
+	0xFF,0x40,0x20,0x10,0x08,0x07,0xFA,0x01,0x00,0x80,0x40,0x20,0x1F,0xE0, // 'E'
+	0xFE,0x80,0x80,0x80,0x80,0xFC,0x80,0x80,0x80,0x80,0x80,0x80, // 'F'
+	0x1F,0x84,0x19,0x01,0x40,0x08,0x01,0x00,0x20,0xF4,0x02,0x80,0x48,0x08,0x81,0x0F,0xC0, // 'G'
+	0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0xFF,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x20, // 'H'
+	0xAA,0xAA,0xAA, // 'I'
+	0x22,0x22,0x22,0x22,0x22,0x22,0x22,0xC0, // 'J'
+	0x81,0x20,0x88,0x42,0x20,0x90,0x38,0x0A,0x02,0x40,0x88,0x21,0x08,0x22,0x04, // 'K'
+	0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0x80,0xFE, // 'L'
+	0xC0,0x6C,0x06,0xA0,0xAA,0x0A,0xA0,0xA9,0x12,0x91,0x28,0xA2,0x8A,0x28,0x42,0x80,0x28,0x02, // 'M'
+	0xC0,0x54,0x0A,0x81,0x48,0x28,0x85,0x10,0xA1,0x14,0x12,0x82,0x50,0x2A,0x05,0x40,0x60, // 'N'
+	0x1F,0x02,0x08,0x40,0x48,0x02,0x80,0x28,0x02,0x80,0x28,0x02,0x80,0x24,0x04,0x20,0x81,0xF0, // 'O'
+	0xFC,0x41,0x20,0x50,0x28,0x14,0x13,0xF1,0x00,0x80,0x40,0x20,0x10,0x00, // 'P'
+	0x1F,0x02,0x08,0x40,0x48,0x02,0x80,0x28,0x02,0x80,0x28,0x02,0x80,0x24,0x04,0x20,0xC1,0xF0,0x00,0x80,0x04, // 'Q'
+	0xFC,0x10,0x42,0x04,0x40,0x88,0x11,0x04,0x3F,0x84,0x10,0x81,0x10,0x22,0x02,0x40,0x40, // 'R'
+	0x3C,0x63,0x20,0x10,0x08,0x03,0x80,0x78,0x06,0x01,0x40,0xB0,0xCF,0x80, // 'S'
+	0xFF,0x82,0x00,0x80,0x20,0x08,0x02,0x00,0x80,0x20,0x08,0x02,0x00,0x80,0x20, // 'T'
+	0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x09,0x02,0x1F,0x80, // 'U'
+	0x80,0x28,0x02,0x40,0x44,0x04,0x20,0x82,0x08,0x11,0x01,0x10,0x11,0x00,0xA0,0x0A,0x00,0x40, // 'V'
+	0x81,0x02,0x81,0x02,0x42,0x84,0x42,0x84,0x42,0x84,0x22,0x88,0x24,0x48,0x24,0x48,0x14,0x50,0x14,0x50,0x08,0x20,0x08,0x20, // 'W'
+	0xC1,0x90,0x42,0x20,0x88,0x14,0x02,0x00,0x80,0x50,0x22,0x08,0x84,0x12,0x02, // 'X'
+	0x80,0x90,0x42,0x20,0x88,0x14,0x02,0x00,0x80,0x20,0x08,0x02,0x00,0x80,0x20, // 'Y'
+	0xFF,0xC0,0x08,0x02,0x00,0x80,0x20,0x08,0x02,0x00,0x80,0x20,0x08,0x02,0x00,0x7F,0xE0, // 'Z'
+	0xE8,0x88,0x88,0x88,0x88,0x88,0x8E, // '['
+	0x83,0x04,0x10,0x40,0x82,0x08,0x10,0x41,0x02,0x08, // '\'
+	0xE2,0x22,0x22,0x22,0x22,0x22,0x2E, // ']'
+	0x0C,0x03,0xC0,0x84,0x20,0x40, // '^'
+	0xFF,0x00, // '_'
+	0xC3,0x0C, // '`'
+	0x3C,0x46,0x02,0x7E,0xC2,0x82,0x82,0xC6,0x7A, // 'a'
+	0x80,0x40,0x20,0x17,0x8C,0x24,0x0A,0x05,0x02,0x81,0x40,0xB0,0x97,0x80, // 'b'
+	0x3C,0x42,0x80,0x80,0x80,0x80,0x80,0x42,0x3C, // 'c'
+	0x01,0x00,0x80,0x47,0xA4,0x34,0x0A,0x05,0x02,0x81,0x40,0x90,0xC7,0xA0, // 'd'
+	0x38,0x44,0x82,0x82,0xFE,0x80,0x80,0x42,0x3C, // 'e'
+	0x39,0x04,0x3C,0x41,0x04,0x10,0x41,0x04,0x10, // 'f'
+	0x3D,0x21,0xA0,0x50,0x28,0x14,0x0A,0x04,0x86,0x3D,0x00,0x90,0x87,0x80, // 'g'
+	0x80,0x40,0x20,0x17,0x8C,0x24,0x0A,0x05,0x02,0x81,0x40,0xA0,0x50,0x20, // 'h'
+	0xA2,0xAA,0xAA, // 'i'
+	0x22,0x02,0x22,0x22,0x22,0x22,0x22,0xC0, // 'j'
+	0x80,0x40,0x20,0x10,0x48,0x44,0x42,0x41,0xC0,0x90,0x44,0x21,0x10,0x40, // 'k'
+	0xAA,0xAA,0xAA, // 'l'
+	0xBC,0xF3,0x1C,0x68,0x20,0xA0,0x82,0x82,0x0A,0x08,0x28,0x20,0xA0,0x82,0x82,0x08, // 'm'
+	0xBC,0x61,0x20,0x50,0x28,0x14,0x0A,0x05,0x02,0x81,0x00, // 'n'
+	0x3C,0x21,0x20,0x50,0x28,0x14,0x0A,0x04,0x84,0x3C,0x00, // 'o'
+	0xBC,0x61,0x20,0x50,0x28,0x14,0x0A,0x05,0x84,0xBC,0x40,0x20,0x10,0x00, // 'p'
+	0x3D,0x21,0xA0,0x50,0x28,0x14,0x0A,0x04,0x86,0x3D,0x00,0x80,0x40,0x20, // 'q'
+	0xBB,0x08,0x20,0x82,0x08,0x20,0x80, // 'r'
+	0x7C,0x82,0x80,0xC0,0x78,0x06,0x02,0x82,0x7C, // 's'
+	0x41,0x0F,0x90,0x41,0x04,0x10,0x41,0x03,0x80, // 't'
+	0x81,0x40,0xA0,0x50,0x28,0x14,0x0A,0x04,0x86,0x3D,0x00, // 'u'
+	0x80,0x90,0x11,0x04,0x20,0x82,0x20,0x44,0x05,0x00,0xE0,0x08,0x00, // 'v'
+	0x82,0x0A,0x08,0x24,0x51,0x11,0x44,0x48,0x90,0xA2,0x82,0x8A,0x04,0x10,0x10,0x40, // 'w'
+	0xC3,0x21,0x09,0x04,0x81,0x81,0x20,0x90,0x84,0xC3,0x00, // 'x'
+	0x80,0x90,0x44,0x10,0x84,0x22,0x08,0x81,0x40,0x50,0x0C,0x02,0x00,0x81,0xC0, // 'y'
+	0xFE,0x02,0x04,0x08,0x10,0x20,0x40,0x80,0xFE, // 'z'
+	0x18,0x82,0x08,0x20,0x82,0x30,0x20,0x82,0x08,0x20,0x81,0x80, // '{'
+	0xAA,0xAA,0xAA,0xAA, // '|'
+	0xC0,0x82,0x08,0x20,0x82,0x06,0x20,0x82,0x08,0x20,0x8C,0x00 // '}'
+};
+const GFXglyph Dialog_plain_16Glyphs[]  = {
+// bitmapOffset, width, height, xAdvance, xOffset, yOffset
+	  {     0,   1,   1,   6,    0,    0 }, // ' '
+	  {     1,   2,  12,   7,    2,  -12 }, // '!'
+	  {     4,   5,   4,   7,    1,  -12 }, // '"'
+	  {     7,  12,  11,  14,    1,  -11 }, // '#'
+	  {    24,   8,  14,  11,    2,  -12 }, // '$'
+	  {    38,  14,  12,  16,    1,  -12 }, // '%'
+	  {    59,  12,  12,  13,    1,  -12 }, // '&'
+	  {    77,   2,   4,   4,    1,  -12 }, // '''
+	  {    78,   5,  14,   7,    1,  -12 }, // '('
+	  {    87,   5,  14,   7,    1,  -12 }, // ')'
+	  {    96,   8,   8,   9,    1,  -12 }, // '*'
+	  {   104,  10,   9,  14,    2,   -9 }, // '+'
+	  {   116,   3,   4,   6,    1,   -2 }, // ','
+	  {   118,   5,   1,   7,    1,   -5 }, // '-'
+	  {   119,   2,   2,   6,    2,   -2 }, // '.'
+	  {   120,   6,  13,   6,    0,  -12 }, // '/'
+	  {   130,   9,  12,  11,    1,  -12 }, // '0'
+	  {   144,   8,  12,  11,    2,  -12 }, // '1'
+	  {   156,   8,  12,  11,    1,  -12 }, // '2'
+	  {   168,   9,  12,  11,    1,  -12 }, // '3'
+	  {   182,  10,  12,  11,    1,  -12 }, // '4'
+	  {   197,   9,  12,  11,    1,  -12 }, // '5'
+	  {   211,   9,  12,  11,    1,  -12 }, // '6'
+	  {   225,   9,  12,  11,    1,  -12 }, // '7'
+	  {   239,   9,  12,  11,    1,  -12 }, // '8'
+	  {   253,   9,  12,  11,    1,  -12 }, // '9'
+	  {   267,   2,   8,   6,    2,   -8 }, // ':'
+	  {   269,   3,  10,   6,    1,   -8 }, // ';'
+	  {   273,  11,   9,  14,    2,   -9 }, // '<'
+	  {   286,  11,   4,  14,    2,   -7 }, // '='
+	  {   292,  11,   9,  14,    2,   -9 }, // '>'
+	  {   305,   7,  12,  10,    1,  -12 }, // '?'
+	  {   316,  15,  14,  17,    1,  -12 }, // '@'
+	  {   343,  12,  12,  12,    0,  -12 }, // 'A'
+	  {   361,  10,  12,  12,    1,  -12 }, // 'B'
+	  {   376,  10,  12,  12,    1,  -12 }, // 'C'
+	  {   391,  11,  12,  13,    1,  -12 }, // 'D'
+	  {   408,   9,  12,  11,    1,  -12 }, // 'E'
+	  {   422,   8,  12,  10,    1,  -12 }, // 'F'
+	  {   434,  11,  12,  13,    1,  -12 }, // 'G'
+	  {   451,  11,  12,  13,    1,  -12 }, // 'H'
+	  {   468,   2,  12,   6,    2,  -12 }, // 'I'
+	  {   471,   4,  15,   6,    0,  -12 }, // 'J'
+	  {   479,  10,  12,  11,    1,  -12 }, // 'K'
+	  {   494,   8,  12,  10,    1,  -12 }, // 'L'
+	  {   506,  12,  12,  14,    1,  -12 }, // 'M'
+	  {   524,  11,  12,  13,    1,  -12 }, // 'N'
+	  {   541,  12,  12,  14,    1,  -12 }, // 'O'
+	  {   559,   9,  12,  11,    1,  -12 }, // 'P'
+	  {   573,  12,  14,  14,    1,  -12 }, // 'Q'
+	  {   594,  11,  12,  12,    1,  -12 }, // 'R'
+	  {   611,   9,  12,  11,    1,  -12 }, // 'S'
+	  {   625,  10,  12,  10,    0,  -12 }, // 'T'
+	  {   640,  11,  12,  13,    1,  -12 }, // 'U'
+	  {   657,  12,  12,  12,    0,  -12 }, // 'V'
+	  {   675,  16,  12,  18,    1,  -12 }, // 'W'
+	  {   699,  10,  12,  12,    1,  -12 }, // 'X'
+	  {   714,  10,  12,  10,    0,  -12 }, // 'Y'
+	  {   729,  11,  12,  13,    1,  -12 }, // 'Z'
+	  {   746,   4,  14,   7,    1,  -12 }, // '['
+	  {   753,   6,  13,   6,    0,  -12 }, // '\'
+	  {   763,   4,  14,   7,    2,  -12 }, // ']'
+	  {   770,  11,   4,  14,    2,  -12 }, // '^'
+	  {   776,   9,   1,   9,    0,    3 }, // '_'
+	  {   778,   5,   3,   9,    1,  -13 }, // '`'
+	  {   780,   8,   9,  10,    1,   -9 }, // 'a'
+	  {   789,   9,  12,  11,    1,  -12 }, // 'b'
+	  {   803,   8,   9,  10,    1,   -9 }, // 'c'
+	  {   812,   9,  12,  11,    1,  -12 }, // 'd'
+	  {   826,   8,   9,  10,    1,   -9 }, // 'e'
+	  {   835,   6,  12,   7,    1,  -12 }, // 'f'
+	  {   844,   9,  12,  11,    1,   -9 }, // 'g'
+	  {   858,   9,  12,  11,    1,  -12 }, // 'h'
+	  {   872,   2,  12,   4,    1,  -12 }, // 'i'
+	  {   875,   4,  15,   4,   -1,  -12 }, // 'j'
+	  {   883,   9,  12,  10,    1,  -12 }, // 'k'
+	  {   897,   2,  12,   4,    1,  -12 }, // 'l'
+	  {   900,  14,   9,  16,    1,   -9 }, // 'm'
+	  {   916,   9,   9,  11,    1,   -9 }, // 'n'
+	  {   927,   9,   9,  11,    1,   -9 }, // 'o'
+	  {   938,   9,  12,  11,    1,   -9 }, // 'p'
+	  {   952,   9,  12,  11,    1,   -9 }, // 'q'
+	  {   966,   6,   9,   8,    1,   -9 }, // 'r'
+	  {   973,   8,   9,  10,    1,   -9 }, // 's'
+	  {   982,   6,  11,   7,    0,  -11 }, // 't'
+	  {   991,   9,   9,  11,    1,   -9 }, // 'u'
+	  {  1002,  11,   9,  10,    0,   -9 }, // 'v'
+	  {  1015,  14,   9,  14,    0,   -9 }, // 'w'
+	  {  1031,   9,   9,  11,    1,   -9 }, // 'x'
+	  {  1042,  10,  12,  10,    0,   -9 }, // 'y'
+	  {  1057,   8,   9,  10,    1,   -9 }, // 'z'
+	  {  1066,   6,  15,  11,    2,  -12 }, // '{'
+	  {  1078,   2,  16,   6,    2,  -12 }, // '|'
+	  {  1082,   6,  15,  11,    2,  -12 } // '}'
+};
+const GFXfont Dialog_plain_16  = {
+(uint8_t  *)Dialog_plain_16Bitmaps,(GFXglyph *)Dialog_plain_16Glyphs,0x20, 0x7E, 19};
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font30.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font30.h
new file mode 100644
index 00000000..461ffa7e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font30.h
@@ -0,0 +1,199 @@
+// Created by http://oleddisplay.squix.ch/ Consider a donation
+// In case of problems make sure that you are using the font file with the correct version!
+const uint8_t Special_Elite_Regular_30Bitmaps[]  = {
+
+	// Bitmap Data:
+	0x00, // ' '
+	0x63,0xBD,0xE7,0x39,0xCE,0x73,0x98,0xC6,0x31,0x84,0x01,0x39,0xE6,0x00, // '!'
+	0x67,0x73,0x99,0xCC,0xE6,0x23,0x19,0x8C,0x44, // '"'
+	0x03,0x8C,0x03,0x9C,0x03,0x18,0x03,0x18,0x03,0x18,0x06,0x10,0x06,0x30,0x3E,0xF4,0x7F,0xFE,0x0C,0x60,0x0C,0x60,0x0C,0x40,0xFF,0xFC,0xFF,0xE8,0x10,0x80,0x31,0x80,0x31,0x80,0x71,0x80,0x63,0x00,0x63,0x00,0x63,0x00, // '#'
+	0x02,0x00,0x06,0x00,0x0C,0x00,0x38,0x00,0x30,0x00,0x60,0x00,0xC0,0x01,0x80,0x1F,0xE0,0xF6,0xF1,0x8C,0x62,0x19,0xCC,0x33,0x98,0x46,0x30,0x80,0x39,0x00,0x3F,0x00,0x0F,0xE0,0x08,0xE0,0x10,0x6E,0x20,0xDE,0x61,0xB0,0xC3,0x61,0x8C,0x73,0x38,0x7F,0xE0,0x3E,0x00,0x18,0x00,0x30,0x00,0x60,0x00,0xC0,0x01,0x80,0x03,0x00,0x06,0x00, // '$'
+	0x00,0x01,0xC0,0x00,0x78,0x00,0x1F,0x00,0x07,0xC0,0x01,0xF0,0x00,0xFE,0x07,0xFD,0x81,0xFC,0x70,0x31,0x8C,0x0E,0x33,0x01,0x86,0x60,0x31,0xD8,0x06,0x32,0x00,0xFC,0xC0,0x0F,0x10,0x00,0x06,0x00,0x01,0xCE,0x00,0x33,0xE0,0x0C,0xC4,0x01,0xB0,0xC0,0x66,0x18,0x0C,0xC7,0x03,0x18,0xC0,0x63,0xF0,0x18,0x3C,0x03,0x00,0x00,0xC0,0x00,0x38,0x00,0x06,0x00,0x01,0xC0,0x00,0x38,0x00,0x02,0x00,0x00, // '%'
+	0x03,0xC0,0x00,0xFC,0x00,0x39,0xC0,0x0E,0x18,0x01,0xC3,0x00,0x18,0xE0,0x03,0x98,0x00,0x36,0x00,0x07,0x83,0x81,0xE1,0xF8,0xF6,0x3F,0x38,0xC6,0xCE,0x0C,0x81,0x81,0xB0,0x20,0x1E,0x06,0x03,0x82,0xE0,0x30,0xCC,0x0F,0x19,0xFF,0x7F,0x1F,0xFF,0xC1,0xF8,0x70, // '&'
+	0x6E,0x66,0x66,0x62, // '''
+	0x18,0xE3,0x9C,0x71,0x86,0x30,0xC3,0x0C,0x30,0xC3,0x0C,0x30,0xC3,0x06,0x18,0x60,0x83,0x04,0x18, // '('
+	0xE1,0xC1,0xC3,0x83,0x87,0x06,0x0E,0x1C,0x18,0x70,0x60,0xC1,0x83,0x0C,0x18,0x30,0x40,0xC3,0x06,0x18,0x70,0x40, // ')'
+	0x18,0x60,0x38,0xC0,0x73,0x80,0x66,0x00,0x78,0x1F,0xFF,0xBF,0xFF,0x03,0xC0,0x0D,0x80,0x39,0x80,0x63,0x80,0xC7,0x00,0x04,0x00, // '*'
+	0x02,0x00,0x0C,0x00,0x30,0x00,0xC0,0x03,0x03,0xFF,0xCF,0xFF,0x80,0xC0,0x03,0x00,0x0C,0x00,0x30,0x01,0xC0,0x03,0x00, // '+'
+	0x08,0x3E,0x1F,0x0F,0xC7,0xF3,0xF9,0xF8,0x5C,0x0E,0x0E,0x0E,0x0F,0x0F,0x03,0x00, // ','
+	0xCA,0x94,0xBF,0xFE,0xFF,0xFE,0x00,0x0C, // '-'
+	0x7C,0xF8,0xFE,0xFE,0xFC,0xFC,0x78, // '.'
+	0x00,0x06,0x00,0x0E,0x00,0x1C,0x00,0x1C,0x00,0x38,0x00,0x30,0x00,0x70,0x00,0x60,0x00,0xE0,0x00,0xC0,0x01,0xC0,0x01,0x80,0x03,0x00,0x03,0x00,0x06,0x00,0x0E,0x00,0x0C,0x00,0x18,0x00,0x38,0x00,0x38,0x00,0x70,0x00,0xE0,0x00,0xE0,0x00,0xC0,0x00, // '/'
+	0x01,0x00,0x1F,0xE0,0x3C,0x70,0x70,0x38,0x60,0x18,0x60,0x0C,0xC0,0x0C,0xC0,0x04,0x80,0x04,0xC0,0x06,0x80,0x04,0x80,0x06,0x80,0x0C,0xC0,0x0E,0xC0,0x0C,0xC0,0x0C,0xC0,0x1C,0x60,0x1C,0x70,0x30,0x3F,0xF0,0x1F,0xE0,0x07,0xC0, // '0'
+	0x7F,0x80,0x7F,0xC0,0x12,0x60,0x00,0x30,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x80,0x01,0x80,0x00,0xC0,0x00,0x60,0x00,0x30,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x01,0x80,0x00,0xC0,0x10,0xF3,0x9F,0xFF,0xEF,0xFF,0xF0, // '1'
+	0x1F,0xE0,0xF0,0xC1,0x00,0xC6,0x00,0xCE,0x01,0x9E,0x07,0x3C,0x0E,0x00,0x38,0x00,0xE0,0x07,0x80,0x3E,0x01,0xF0,0x03,0x80,0x0E,0x00,0x38,0x00,0x60,0x00,0xFE,0x0D,0xEF,0x1B,0x8F,0xF6,0x07,0x84,0x00,0x00, // '2'
+	0x01,0xF8,0x7F,0xF1,0xC0,0xC3,0x03,0x82,0x0C,0x0C,0x30,0x00,0xE0,0x03,0xC0,0x0F,0xC0,0x37,0xE0,0x60,0xE0,0x00,0xC0,0x00,0xC0,0x01,0x98,0x03,0x78,0x06,0xF0,0x1D,0xC0,0x39,0x81,0xE3,0xFF,0x83,0xFF,0x00,0xF0,0x00, // '3'
+	0x00,0x38,0x00,0x1E,0x00,0x0F,0x80,0x03,0x60,0x01,0x98,0x00,0xE6,0x00,0x71,0x80,0x38,0x60,0x1C,0x18,0x07,0x06,0x03,0x81,0x81,0xC0,0x60,0x70,0x18,0x3F,0xFF,0xE7,0xFF,0xF8,0x00,0x60,0x00,0x18,0x00,0x0E,0x00,0x0F,0xF8,0x07,0xFE,0x01,0x3B,0x00, // '4'
+	0x30,0x20,0xFF,0xE1,0x8F,0x03,0x00,0x02,0x00,0x0E,0x00,0x0C,0x00,0x3B,0xE0,0x7F,0xE0,0xF0,0xE0,0xC0,0xE0,0x00,0xE0,0x00,0xC0,0x01,0x9C,0x03,0x78,0x06,0x70,0x18,0xE0,0x70,0xE1,0xC1,0xFF,0x00,0xFC,0x00, // '5'
+	0x01,0xF0,0x0F,0xF8,0x0E,0x1C,0x18,0x1E,0x30,0x3C,0x70,0x1C,0x60,0x00,0x60,0x00,0x67,0xC0,0x6F,0xF8,0x78,0x3C,0xF0,0x1E,0xE0,0x0E,0x60,0x06,0x60,0x06,0x60,0x0E,0x30,0x0E,0x38,0x1E,0x3C,0x7C,0x0F,0xF8,0x07,0xC0, // '6'
+	0x03,0xC0,0x1F,0xFB,0x8F,0xFF,0xCE,0x3F,0xE7,0x00,0x73,0x00,0x33,0x80,0x38,0x80,0x18,0x00,0x18,0x00,0x1C,0x00,0x0C,0x00,0x0E,0x00,0x06,0x00,0x07,0x00,0x03,0x00,0x01,0x80,0x01,0xC0,0x00,0xE0,0x00,0xF0,0x00,0x30,0x00,0x38,0x00,0x18,0x00,0x04,0x00, // '7'
+	0x03,0x00,0x1F,0xE0,0x3C,0xF0,0x70,0x38,0xE0,0x1C,0xE0,0x0C,0xE0,0x0C,0x60,0x18,0x70,0x18,0x3F,0xF8,0x3F,0xF0,0x78,0x70,0xE0,0x1C,0xC0,0x1C,0xC0,0x0C,0xC0,0x0E,0xC0,0x0C,0xE0,0x1C,0xF0,0x3C,0xFF,0xF8,0x7F,0xF0,0x0F,0x80, // '8'
+	0x0F,0xE0,0x1C,0xF0,0x30,0x38,0x60,0x10,0x60,0x0C,0x60,0x0C,0xC0,0x0E,0x60,0x0E,0x60,0x1E,0x78,0x1E,0x1F,0xFE,0x0F,0xEE,0x01,0x0E,0x00,0x0C,0x30,0x0C,0x78,0x18,0x68,0x18,0x7C,0xF0,0x3F,0xE0,0x1F,0xC0,0x0F,0x00, // '9'
+	0x20,0x78,0xFC,0xE8,0xFC,0x78,0x10,0x00,0x00,0x7C,0xF8,0xFE,0xFE,0xFC,0xFC,0x78, // ':'
+	0x10,0x1E,0x1F,0x8F,0x87,0xE1,0xE0,0x40,0x00,0x08,0x3F,0x1F,0x8F,0xC7,0xF3,0xF9,0xF8,0x5C,0x0E,0x0E,0x0E,0x0F,0x0F,0x03,0x00, // ';'
+	0x00,0xE0,0x1E,0x03,0xC0,0xF0,0x3E,0x07,0x80,0xF0,0x0E,0x00,0x70,0x03,0xE0,0x0F,0x00,0x3E,0x00,0xE0, // '<'
+	0xFF,0xFE,0xFF,0xFE,0x7F,0xFE,0x00,0x00,0x00,0x00,0x00,0x00,0xFF,0x5E,0xFF,0xFE,0xFF,0xFE, // '='
+	0xE0,0x0F,0x00,0x78,0x01,0xE0,0x0F,0x00,0x3C,0x01,0xE0,0x0E,0x01,0xC0,0xF8,0x3E,0x0F,0x80,0xE0,0x00, // '>'
+	0x0E,0x01,0xFC,0x1C,0x79,0xC0,0x4E,0x03,0x78,0x19,0xE0,0xCF,0x06,0x78,0x60,0x0F,0x01,0xE0,0x1E,0x00,0xE0,0x07,0x00,0x38,0x00,0xC0,0x00,0x00,0x00,0x03,0x00,0x3C,0x00,0xF0,0x07,0x00, // '?'
+	0x07,0xF8,0x01,0xE3,0x80,0x70,0x18,0x1C,0x01,0x83,0x0C,0x30,0xC7,0xFB,0x18,0xC7,0x63,0x38,0xCC,0xE6,0x19,0x9D,0xC2,0x33,0xB8,0xC6,0x77,0x18,0xC6,0xE7,0x30,0xCF,0xFC,0x18,0xE7,0x31,0x80,0x04,0x38,0x01,0x83,0x80,0xE0,0x1F,0x78,0x00,0xFC,0x00, // '@'
+	0x01,0xC0,0x00,0xF8,0x00,0x3E,0x00,0x0F,0x80,0x07,0xE0,0x01,0xF8,0x00,0x76,0x00,0x19,0xC0,0x0E,0x70,0x01,0x8C,0x00,0xE3,0x00,0x38,0xC0,0x0E,0x38,0x03,0xFE,0x00,0xFF,0x80,0x7A,0x60,0x1C,0x18,0x07,0x02,0x01,0x81,0xC1,0xF8,0xFE,0xFE,0x3F,0x00, // 'A'
+	0xFF,0xF0,0x7F,0xFC,0x0F,0x8F,0x03,0x01,0xC1,0x80,0x60,0xC0,0x30,0x60,0x18,0x30,0x1C,0x1C,0x3C,0x0F,0xFE,0x07,0xFF,0x03,0x83,0x81,0x80,0xE0,0xC0,0x38,0x60,0x1C,0x30,0x0E,0x18,0x04,0x0C,0x07,0x0E,0x07,0x0F,0xFF,0x07,0xFE,0x00, // 'B'
+	0x07,0xCC,0x1F,0xFE,0x3F,0xFE,0x38,0x7E,0x70,0x1E,0x70,0x1E,0x60,0x0E,0x60,0x06,0x60,0x0C,0x60,0x00,0xE0,0x00,0xE0,0x0C,0xE0,0x0E,0x60,0x0E,0x60,0x0E,0x60,0x1C,0x30,0x1C,0x30,0x78,0x1F,0xF8,0x0F,0xF0,0x07,0xC0, // 'C'
+	0x7F,0xE0,0x7F,0xF8,0x3F,0xFF,0x07,0x83,0x81,0xC0,0xE0,0xE0,0x30,0x70,0x1C,0x38,0x0E,0x1C,0x07,0x0E,0x01,0x87,0x00,0xC3,0x80,0x61,0xC0,0x30,0xE0,0x38,0x70,0x1C,0x30,0x0E,0x18,0x0E,0x0E,0x0F,0x07,0x9F,0x0F,0xFF,0x07,0xFF,0x00, // 'D'
+	0x0E,0xFE,0x3F,0xFF,0xC7,0xFF,0xB0,0xC0,0x0C,0x10,0x03,0x04,0x00,0xC1,0x06,0x38,0x41,0x04,0x10,0x60,0x07,0xF8,0x01,0x7C,0x00,0x7F,0x80,0x18,0x60,0x06,0x18,0xC1,0x86,0x30,0x60,0x0E,0x18,0x03,0x04,0x00,0xC3,0x80,0x71,0xFF,0xFC,0x7F,0xFE,0x00, // 'E'
+	0x7F,0xFE,0x3F,0xFF,0xC3,0xC7,0xF0,0x60,0x0C,0x18,0x03,0x86,0x18,0xE1,0x86,0x38,0x61,0x80,0x18,0xE0,0x07,0xF8,0x01,0xFE,0x00,0x7F,0x80,0x18,0x60,0x06,0x18,0x01,0x86,0x00,0x61,0x00,0x18,0x00,0x06,0x00,0x07,0xE0,0x03,0xFC,0x00,0xFF,0x00,0x00, // 'F'
+	0x07,0xC4,0x07,0xFF,0x03,0xC7,0xC0,0xE0,0x70,0x70,0x1C,0x18,0x03,0x86,0x00,0xC1,0x80,0x10,0x60,0x00,0x38,0x00,0x0E,0x03,0xF1,0x80,0xFE,0x60,0x1E,0x18,0x03,0x86,0x00,0xE1,0x80,0x38,0x30,0x1E,0x0E,0x07,0x81,0xC7,0xE0,0x3F,0xF8,0x03,0xC6,0x00, // 'G'
+	0x74,0x23,0x1F,0xC7,0xF1,0xF0,0x7C,0x0C,0x03,0x01,0x80,0x60,0x30,0x0C,0x06,0x01,0x80,0xC0,0x30,0x18,0x06,0x03,0xF9,0xC0,0x7F,0xF8,0x0F,0xE7,0x01,0x80,0x60,0x30,0x0C,0x06,0x01,0x80,0xC0,0x30,0x18,0x06,0x03,0x00,0xC0,0x70,0x18,0x7F,0x9F,0xCF,0xF3,0xFC,0x00,0x10,0x00, // 'H'
+	0x7F,0xFB,0xFF,0xEF,0xBF,0x01,0xC0,0x07,0x00,0x1C,0x00,0x70,0x01,0xC0,0x07,0x00,0x1C,0x00,0x70,0x00,0xC0,0x07,0x00,0x1C,0x00,0x70,0x01,0xC0,0x07,0x00,0x1C,0x00,0x70,0x3F,0xFE,0xFF,0xF9,0x00,0xC0, // 'I'
+	0x0F,0xFC,0x0F,0xFE,0x07,0xFE,0x00,0xE0,0x00,0xE0,0x00,0xE0,0x00,0x60,0x00,0x60,0x00,0xE0,0x00,0xE0,0x00,0x60,0x00,0x60,0x00,0xE0,0xE0,0x60,0xF0,0x60,0xF0,0x60,0xF0,0x60,0xE0,0xC0,0xE1,0x80,0x7F,0x80,0x1F,0x00, // 'J'
+	0xFE,0x3E,0x3F,0xDF,0xC3,0xC3,0x80,0x60,0xC0,0x18,0x60,0x06,0x38,0x01,0x9C,0x00,0x67,0x00,0x1B,0x80,0x07,0xE0,0x01,0xFC,0x00,0x73,0x80,0x18,0xE0,0x06,0x18,0x01,0x83,0x00,0x60,0xC0,0x18,0x10,0x06,0x06,0x03,0x81,0x81,0xF8,0xF8,0x7E,0x3F,0x80, // 'K'
+	0x02,0x00,0x7F,0xE0,0x3F,0xE0,0x13,0xC0,0x01,0xC0,0x00,0xC0,0x00,0x70,0x00,0x38,0x00,0x1C,0x00,0x0C,0x00,0x07,0x00,0x03,0x80,0x01,0xC0,0x00,0xE0,0x00,0x70,0x0C,0x38,0x06,0x1C,0x03,0x0E,0x01,0x87,0x00,0xCF,0xFF,0xE7,0xFF,0xF7,0xFF,0xF0, // 'L'
+	0x38,0x01,0x07,0xC0,0xFC,0x3C,0x0F,0xC3,0xE0,0xF0,0x3E,0x1F,0x03,0xE0,0xF0,0x1E,0x1F,0x81,0xF1,0xB8,0x13,0x1B,0x81,0xB1,0x90,0x1B,0x13,0x03,0xB1,0x30,0x39,0x11,0x03,0x91,0x30,0x19,0xB1,0x01,0x9F,0x10,0x19,0xF1,0x01,0x1A,0x10,0x78,0xE1,0x0F,0xCE,0x7E,0x7C,0x47,0xC0, // 'M'
+	0x78,0x3E,0x3F,0x1F,0xE7,0xE3,0xF0,0xF8,0x38,0x1E,0x0E,0x07,0xC3,0x81,0xB0,0xE0,0x6C,0x18,0x19,0x86,0x06,0x61,0x81,0x88,0x40,0x63,0x18,0x18,0x66,0x06,0x19,0x81,0x86,0x40,0x61,0xD0,0x18,0x36,0x06,0x07,0x81,0x81,0xE1,0xFC,0x78,0xFF,0x0C,0x00, // 'N'
+	0x03,0xF0,0x0F,0xFC,0x0F,0xFF,0x07,0x03,0x87,0x00,0xE3,0x80,0x31,0x80,0x19,0xC0,0x0E,0xE0,0x03,0x70,0x01,0x98,0x00,0xCC,0x00,0x66,0x00,0x33,0x00,0x19,0x80,0x0C,0xE0,0x0C,0x38,0x06,0x1E,0x07,0x0F,0x87,0x03,0xFF,0x80,0xFF,0x80,0x1F,0x00, // 'O'
+	0x15,0x00,0xFF,0xF0,0x3F,0xF8,0x18,0x1C,0x18,0x0E,0x18,0x0E,0x18,0x0E,0x10,0x0E,0x18,0x0C,0x1C,0xFC,0x1F,0xF8,0x1F,0xE0,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x18,0x00,0x1C,0x00,0x7E,0x00,0xFF,0x00, // 'P'
+	0x0F,0xE0,0x0F,0xF8,0x0E,0x0E,0x0E,0x01,0x86,0x00,0xC3,0x00,0x61,0x80,0x18,0xC0,0x0C,0xE0,0x06,0x60,0x03,0x10,0x00,0x88,0x00,0xC4,0x00,0x63,0x00,0x31,0x8E,0x18,0x6F,0xD8,0x3F,0xFC,0x1F,0x7C,0x07,0xFC,0x01,0xFE,0x00,0x1E,0x10,0x01,0x98,0x00,0xEC,0x00,0x38, // 'Q'
+	0x3F,0xFC,0x03,0xFF,0xE0,0x1E,0x0E,0x00,0xC0,0x30,0x0C,0x03,0x00,0xC0,0x30,0x0C,0x03,0x00,0xC0,0x70,0x0C,0x1F,0x00,0xFF,0xE0,0x0F,0xFC,0x00,0xE1,0xC0,0x0C,0x0C,0x00,0xC0,0xE0,0x0C,0x0E,0x00,0xC0,0x60,0x0C,0x0E,0x00,0xC0,0x64,0x0F,0x07,0xE7,0xF8,0x7C,0xFF,0x03,0xC0, // 'R'
+	0x00,0x10,0x3F,0xE0,0xFF,0xE3,0xC1,0xC6,0x03,0x9C,0x03,0x38,0x06,0x30,0x04,0x78,0x00,0x7F,0xC0,0x3F,0xE0,0x01,0xC8,0x01,0xD0,0x01,0xB0,0x03,0x60,0x06,0xC0,0x0D,0xC0,0x7B,0xC1,0xE7,0xFF,0x0F,0xFC,0x00, // 'S'
+	0xFF,0xFE,0x7F,0xF3,0xB0,0x60,0xD8,0x30,0xEC,0x18,0x76,0x0C,0x1B,0x06,0x0D,0x03,0x04,0x01,0x80,0x00,0xC0,0x00,0x60,0x00,0x30,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x01,0xC0,0x00,0xE0,0x03,0xFE,0x03,0xFF,0x01,0xF8,0x00, // 'T'
+	0xFE,0x7F,0xBF,0x9F,0xE3,0xC3,0xE0,0xE0,0x30,0x30,0x08,0x0C,0x03,0x03,0x00,0xC0,0xC0,0x30,0x30,0x0C,0x0C,0x03,0x03,0x00,0xC0,0xC0,0x30,0x30,0x0C,0x0E,0x03,0x03,0x80,0xC0,0x60,0x30,0x18,0x0C,0x06,0x06,0x01,0xE7,0x80,0x3E,0xC0,0x07,0xE0,0x00, // 'U'
+	0x00,0x07,0x1F,0xC7,0xFB,0xF8,0xFF,0x1F,0x0F,0x81,0xC0,0xE0,0x18,0x1C,0x03,0x03,0x00,0x60,0xE0,0x0C,0x1C,0x00,0xC3,0x80,0x38,0xE0,0x03,0x1C,0x00,0x63,0x80,0x0C,0x70,0x00,0xCE,0x00,0x19,0x80,0x03,0xF0,0x00,0x7E,0x00,0x0F,0x80,0x00,0xF0,0x00,0x1E,0x00,0x03,0xC0,0x00, // 'V'
+	0x01,0x21,0xDF,0xFF,0xF9,0xC3,0x8F,0x08,0x70,0xC1,0x0E,0x18,0x01,0xE2,0x04,0x38,0x40,0x85,0x98,0x18,0xB3,0x01,0x16,0x60,0x26,0xEC,0x06,0x99,0x80,0xD1,0xA0,0x1B,0x3C,0x03,0xC7,0x80,0x78,0xF0,0x0F,0x1E,0x00,0xE3,0xC0,0x1C,0x78,0x03,0x87,0x00,0x60,0xC0, // 'W'
+	0x7E,0x1F,0x3F,0x8F,0xE1,0xC1,0xC0,0x30,0x60,0x06,0x30,0x01,0x8C,0x00,0x36,0x00,0x0F,0x80,0x01,0xE0,0x00,0x70,0x00,0x1C,0x00,0x07,0x00,0x03,0xE0,0x00,0xF8,0x00,0x73,0x00,0x18,0xE0,0x0C,0x18,0x07,0x07,0x03,0xE3,0xFB,0xFC,0xFE,0xFE,0x3F,0x80, // 'X'
+	0x1C,0x08,0x8F,0xF7,0xFB,0xFE,0xFF,0x0F,0x87,0xC0,0x60,0xE0,0x0E,0x38,0x00,0xC6,0x00,0x1D,0xC0,0x01,0xF8,0x00,0x3E,0x00,0x03,0xC0,0x00,0x70,0x00,0x06,0x00,0x00,0xC0,0x00,0x18,0x00,0x03,0x00,0x00,0x60,0x00,0x0C,0x00,0x03,0x80,0x03,0xFF,0x01,0xFF,0xF0,0x3F,0xFE,0x00, // 'Y'
+	0xBF,0xF8,0xFF,0xF8,0xC0,0xF8,0xC0,0xF8,0xC0,0xF0,0xC1,0xE0,0xC1,0xE0,0x03,0xC0,0x07,0x80,0x07,0x00,0x0F,0x00,0x0E,0x00,0x3C,0x08,0x1C,0x0C,0x78,0x0E,0xF0,0x0C,0xF0,0x0E,0xF4,0x3C,0xFF,0xFC,0xFF,0xFC,0xFF,0xFC, // 'Z'
+	0x49,0xFB,0x86,0x0C,0x18,0x30,0x60,0xC1,0xC3,0x06,0x0E,0x18,0x38,0x70,0xC1,0xC3,0x87,0x0E,0x1C,0x30,0x78,0xF8, // '['
+	0xC0,0x00,0xE0,0x00,0x60,0x00,0x70,0x00,0x30,0x00,0x38,0x00,0x18,0x00,0x1C,0x00,0x0E,0x00,0x0E,0x00,0x07,0x00,0x03,0x00,0x01,0x80,0x01,0x80,0x00,0xC0,0x00,0xC0,0x00,0x60,0x00,0x60,0x00,0x30,0x00,0x38,0x00,0x1C,0x00,0x1C,0x00,0x0E,0x00,0x06, // '\'
+	0x24,0x7C,0x0C,0x0C,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0E,0x0C,0x7C,0xFC, // ']'
+	0x0E,0x00,0x78,0x07,0xC0,0x37,0x03,0x18,0x18,0x61,0x83,0x8C,0x0E,0xC0,0x36,0x01,0x80, // '^'
+	0x00,0x90,0xFF,0xFE,0xFF,0xFC, // '_'
+	0x80,0xC0,0xF0,0x38,0x0E,0x04, // '`'
+	0x0F,0xC0,0x1F,0xF0,0x0F,0x1C,0x0F,0x06,0x07,0x81,0x81,0xC0,0xC0,0x03,0xE0,0x3F,0xF0,0x7F,0x18,0x38,0x0C,0x38,0x06,0x18,0x07,0x0E,0x03,0xB3,0xFF,0xF8,0xFE,0x38, // 'a'
+	0x60,0x00,0x3E,0x00,0x07,0x80,0x00,0x60,0x00,0x18,0x00,0x06,0x00,0x01,0x84,0x00,0x3F,0xE0,0x0F,0xFE,0x07,0x81,0x81,0xC0,0x30,0x30,0x0C,0x1C,0x01,0x87,0x00,0x61,0xC0,0x30,0x20,0x0E,0x1C,0x03,0x07,0x01,0xC0,0xE0,0xE0,0x3F,0xF8,0x0B,0xFC,0x00, // 'b'
+	0x07,0xE0,0x7F,0xF1,0x7F,0xE3,0xC3,0xE7,0x07,0xCC,0x07,0x98,0x0E,0x70,0x00,0xE0,0x01,0xC0,0x01,0x80,0x63,0x80,0xE3,0x87,0xC3,0xFF,0x03,0xF8,0x00,0x40, // 'c'
+	0x00,0xE8,0x00,0x7F,0x00,0x0F,0xC0,0x00,0x70,0x00,0x1C,0x00,0x07,0x00,0x61,0xC0,0x7F,0xF0,0x3F,0xFC,0x1E,0x1F,0x07,0x01,0xC1,0x80,0x70,0xE0,0x0C,0x38,0x03,0x0E,0x01,0xC3,0x00,0x70,0x70,0x1C,0x1C,0x07,0x03,0x87,0xC0,0xFF,0xFE,0x0F,0xEF,0x80,0xE0,0x00, // 'd'
+	0x07,0x80,0x3F,0xC0,0xF3,0xC3,0x80,0xC6,0x00,0x9C,0x01,0x9C,0x47,0x7F,0xFE,0xF0,0x09,0xC0,0x01,0x80,0x03,0x80,0x63,0x81,0xC3,0xFF,0x03,0xFC,0x01,0xC0, // 'e'
+	0x01,0xF8,0x01,0xFE,0x01,0xEF,0x81,0xC3,0xC0,0xE1,0xF0,0x70,0x70,0x38,0x10,0xFF,0x80,0x7F,0xC0,0x07,0x00,0x03,0x80,0x01,0xC0,0x00,0xE0,0x00,0x70,0x00,0x38,0x00,0x1C,0x00,0x0E,0x00,0x06,0x00,0x03,0x80,0x1F,0xFC,0x0F,0xFE,0x07,0x06,0x00, // 'f'
+	0x00,0x06,0x07,0xEF,0x0F,0xFB,0xC7,0x0F,0xE3,0x03,0xC1,0x80,0xC0,0xC0,0xE0,0x70,0x60,0x18,0x70,0x1F,0xF0,0x1F,0xF0,0x0C,0x00,0x06,0x00,0x03,0xF7,0x01,0xFF,0xF0,0xF0,0x3C,0xE0,0x07,0x60,0x03,0xB8,0x01,0xCF,0x07,0xC3,0xFF,0x80,0x3C,0x00, // 'g'
+	0xF8,0x00,0x0F,0x00,0x00,0x60,0x00,0x0C,0x00,0x01,0x80,0x00,0x30,0x60,0x06,0x3F,0x00,0xFF,0xE0,0x1F,0x06,0x03,0xC0,0xC0,0x70,0x18,0x0E,0x03,0x01,0xC0,0x60,0x30,0x0C,0x03,0x00,0x80,0x60,0x10,0x1C,0x02,0x03,0x80,0xE1,0x7C,0x7F,0x3F,0x9F,0xE7,0xC1,0x00, // 'h'
+	0x07,0x00,0x07,0xC0,0x03,0xE0,0x00,0xE0,0x00,0x00,0x00,0x00,0x01,0xFC,0x01,0xFF,0x00,0x11,0x80,0x00,0xC0,0x00,0x60,0x00,0x38,0x00,0x1C,0x00,0x0E,0x00,0x07,0x00,0x03,0x80,0x01,0xC0,0x00,0xE0,0x12,0xFF,0x9F,0xF9,0xE7,0x80,0x20, // 'i'
+	0x07,0x81,0xF8,0x1F,0x03,0xA0,0x38,0x00,0x0F,0xE1,0xFE,0x01,0xC0,0x18,0x03,0x00,0x60,0x0C,0x01,0x80,0x30,0x06,0x00,0xC0,0x18,0x03,0x00,0x6E,0x0D,0xE1,0xBC,0x37,0x9E,0xF7,0x8F,0xC0,0xE0,0x00, // 'j'
+	0xF8,0x00,0x0F,0x00,0x00,0x60,0x00,0x0C,0x00,0x01,0x80,0x00,0x30,0x00,0x06,0x0F,0xE0,0x41,0xFC,0x08,0x38,0x01,0x0E,0x00,0x23,0x80,0x06,0xE0,0x00,0xFC,0x00,0x1F,0xC0,0x07,0x9C,0x00,0x61,0xC0,0x1C,0x18,0x07,0x83,0x83,0xFC,0xFE,0x3F,0x9F,0xE0,0x01,0xD8, // 'k'
+	0xFF,0x00,0x7F,0xC0,0x00,0x60,0x00,0x30,0x00,0x38,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x01,0x80,0x00,0xC0,0x00,0x60,0x00,0x30,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x01,0x80,0x01,0xC0,0x3F,0xFF,0xDF,0xFF,0xE7,0xA8,0xE0, // 'l'
+	0x01,0x0C,0x0E,0xFF,0xC3,0xFF,0xFC,0x1E,0x7B,0x83,0x8E,0x70,0x61,0xCE,0x0E,0x31,0xC1,0xC6,0x38,0x30,0xC3,0x06,0x18,0x60,0xE3,0x0C,0x1C,0x61,0x83,0x8C,0x70,0xF3,0xEF,0x9F,0x7B,0xF3,0x80,0x1A, // 'm'
+	0x20,0x70,0x3E,0x7F,0x0F,0xBF,0xC0,0xFC,0x38,0x1E,0x0E,0x07,0x01,0x81,0x80,0x60,0x60,0x38,0x18,0x0E,0x06,0x03,0x81,0x80,0xE0,0x60,0x18,0x18,0x06,0x1F,0x8F,0xEF,0xF3,0xF8,0xF8,0x28, // 'n'
+	0x01,0xC0,0x0F,0xF0,0x3F,0xF8,0x38,0x3C,0x70,0x0E,0x60,0x0E,0xE0,0x0E,0x60,0x0E,0xE0,0x02,0xE0,0x0E,0xE0,0x0E,0x70,0x1E,0x38,0x3C,0x1F,0xF8,0x0F,0xF0,0x03,0xE0, // 'o'
+	0x78,0xF0,0x7F,0xFE,0x07,0x83,0x81,0x80,0xC0,0xC0,0x30,0xE0,0x18,0x20,0x04,0x30,0x02,0x1C,0x03,0x06,0x01,0x83,0x00,0xC1,0x80,0xC0,0xF0,0xC0,0x7F,0xE0,0x23,0xC0,0x10,0x00,0x08,0x00,0x04,0x00,0x06,0x00,0x1F,0xE0,0x07,0x60,0x00, // 'p'
+	0x02,0x00,0x0F,0xEE,0x0F,0xFF,0x0F,0x0F,0x06,0x01,0x87,0x00,0xE3,0x80,0x71,0xC0,0x30,0xE0,0x18,0x30,0x0C,0x18,0x06,0x0E,0x07,0x03,0x87,0x80,0xFF,0xC0,0x3F,0x30,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x07,0xC0,0x07,0xF0, // 'q'
+	0x00,0x18,0x7E,0x7F,0x3F,0xFF,0x81,0xF9,0xE0,0xF0,0xF0,0x70,0x70,0x38,0x00,0x18,0x00,0x0C,0x00,0x06,0x00,0x03,0x00,0x01,0x80,0x00,0xE0,0x01,0xFE,0x03,0xFD,0x00, // 'r'
+	0x1F,0x80,0xFF,0xC7,0x3F,0x1C,0x0C,0x60,0x31,0xC0,0x47,0xFC,0x0D,0xFC,0x00,0x3B,0x00,0x66,0x01,0x98,0x06,0x70,0x79,0xFF,0xC7,0xFE,0x10,0x00, // 's'
+	0x04,0x00,0x0C,0x00,0x0E,0x00,0x0E,0x00,0x0C,0x00,0x0E,0x00,0x7F,0xF0,0xFF,0xF8,0x7F,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x00,0x0E,0x0E,0x0E,0x1E,0x0F,0x1C,0x0F,0x1C,0x07,0xFC,0x07,0xF8,0x01,0xE0, // 't'
+	0x30,0x02,0x0F,0xC3,0xE0,0x7C,0x3F,0x00,0xC0,0x70,0x0C,0x07,0x00,0xC0,0x70,0x0C,0x07,0x00,0xC0,0x60,0x0C,0x07,0x00,0xC0,0x60,0x0C,0x07,0x00,0xC0,0xE0,0x0C,0x3F,0xC0,0xFF,0xFE,0x07,0xF7,0xE0,0x38,0x1C, // 'u'
+	0xFF,0x3F,0xDF,0xE7,0xF8,0x70,0x38,0x06,0x06,0x00,0xC0,0xC0,0x1C,0x30,0x01,0x86,0x00,0x30,0xC0,0x07,0x38,0x00,0x66,0x00,0x0D,0xC0,0x01,0xF8,0x00,0x1E,0x00,0x03,0xC0,0x00,0x30,0x00, // 'v'
+	0x00,0x00,0xE7,0xF7,0xFF,0xBF,0xBE,0xFC,0xB1,0xE3,0x81,0x8F,0x18,0x06,0x78,0xC0,0x32,0x46,0x01,0x9B,0x30,0x0C,0xDB,0x80,0x6E,0xF8,0x03,0xE3,0xC0,0x0F,0x1E,0x00,0x78,0xF0,0x03,0xC7,0x80,0x0C,0x18,0x00, // 'w'
+	0xFF,0x9F,0xE7,0xF9,0xFE,0x07,0x0E,0x00,0x71,0xC0,0x03,0xB8,0x00,0x1F,0x00,0x00,0xF0,0x00,0x0F,0x00,0x00,0xF0,0x00,0x1F,0x80,0x03,0x9C,0x00,0x70,0xE0,0x3F,0x9F,0xC7,0xF9,0xFE,0x3F,0x0F,0xE0, // 'x'
+	0x00,0x01,0x1F,0xE7,0xFB,0xFC,0xFE,0x07,0x07,0x00,0xC0,0xC0,0x0C,0x18,0x01,0x87,0x00,0x18,0xC0,0x03,0x38,0x00,0x66,0x00,0x07,0xC0,0x00,0xF0,0x00,0x1E,0x00,0x01,0x80,0x00,0x30,0x01,0x06,0x00,0x79,0xC0,0x1F,0xB0,0x01,0xFE,0x00,0x3F,0x80,0x03,0xE0,0x00,0x38,0x00,0x00, // 'y'
+	0x7F,0xF8,0xFF,0xE1,0x81,0xC3,0x03,0x06,0x0C,0x0C,0x30,0x00,0xC0,0x03,0x00,0x0C,0x18,0x30,0x30,0xE0,0x63,0xC0,0xE7,0xFF,0xDF,0xFF,0x88,0x3E,0x00, // 'z'
+	0x08,0x38,0x71,0xC3,0x0E,0x18,0x18,0x10,0x70,0xE7,0x8E,0x0F,0x0E,0x1C,0x30,0x61,0xC3,0x83,0x87,0x07,0x04, // '{'
+	0xDB,0x6D,0xB6,0xDB,0x6D,0xB6,0xDB,0x6D,0xB0, // '|'
+	0x41,0xC1,0xC1,0x83,0x83,0x0E,0x18,0x70,0xE0,0xE0,0xE1,0xC7,0x9C,0x38,0x30,0x60,0x61,0xC3,0x8E,0x1C,0x30 // '}'
+};
+const GFXglyph Special_Elite_Regular_30Glyphs[]  = {
+// bitmapOffset, width, height, xAdvance, xOffset, yOffset
+	  {     0,   1,   1,  10,    0,    0 }, // ' '
+	  {     1,   5,  21,   9,    2,  -21 }, // '!'
+	  {    15,   9,   8,  12,    1,  -21 }, // '"'
+	  {    24,  16,  21,  18,    1,  -21 }, // '#'
+	  {    66,  15,  34,  17,    1,  -28 }, // '$'
+	  {   130,  19,  32,  21,    1,  -26 }, // '%'
+	  {   206,  19,  21,  21,    1,  -21 }, // '&'
+	  {   256,   4,   8,   7,    1,  -21 }, // '''
+	  {   260,   6,  25,   9,    2,  -23 }, // '('
+	  {   279,   7,  25,   9,    1,  -23 }, // ')'
+	  {   301,  15,  13,  17,    1,  -21 }, // '*'
+	  {   326,  14,  13,  16,    1,  -17 }, // '+'
+	  {   349,   9,  14,  11,    1,   -8 }, // ','
+	  {   365,  16,   4,  20,    2,  -12 }, // '-'
+	  {   373,   8,   7,  11,    2,   -7 }, // '.'
+	  {   380,  16,  24,  18,    1,  -23 }, // '/'
+	  {   428,  16,  22,  19,    2,  -22 }, // '0'
+	  {   472,  17,  21,  18,    1,  -21 }, // '1'
+	  {   517,  15,  21,  18,    2,  -20 }, // '2'
+	  {   557,  15,  22,  18,    1,  -21 }, // '3'
+	  {   599,  18,  21,  19,    0,  -21 }, // '4'
+	  {   647,  15,  21,  17,    1,  -21 }, // '5'
+	  {   687,  16,  21,  19,    1,  -21 }, // '6'
+	  {   729,  17,  23,  18,    0,  -22 }, // '7'
+	  {   778,  16,  22,  19,    2,  -22 }, // '8'
+	  {   822,  16,  21,  19,    1,  -21 }, // '9'
+	  {   864,   8,  16,  11,    2,  -16 }, // ':'
+	  {   880,   9,  22,  11,    1,  -16 }, // ';'
+	  {   905,  12,  13,  15,    1,  -17 }, // '<'
+	  {   925,  16,   9,  20,    2,  -15 }, // '='
+	  {   943,  12,  13,  15,    2,  -17 }, // '>'
+	  {   963,  13,  22,  15,    1,  -22 }, // '?'
+	  {   999,  19,  20,  21,    1,  -20 }, // '@'
+	  {  1047,  18,  21,  18,    0,  -21 }, // 'A'
+	  {  1095,  17,  21,  19,    1,  -21 }, // 'B'
+	  {  1140,  16,  21,  18,    1,  -21 }, // 'C'
+	  {  1182,  17,  21,  20,    1,  -21 }, // 'D'
+	  {  1227,  18,  21,  20,    1,  -21 }, // 'E'
+	  {  1275,  18,  21,  19,    1,  -21 }, // 'F'
+	  {  1323,  18,  21,  19,    1,  -21 }, // 'G'
+	  {  1371,  19,  22,  21,    1,  -21 }, // 'H'
+	  {  1424,  14,  22,  16,    1,  -21 }, // 'I'
+	  {  1463,  16,  21,  17,    1,  -21 }, // 'J'
+	  {  1505,  18,  21,  18,    1,  -21 }, // 'K'
+	  {  1553,  17,  22,  19,    1,  -22 }, // 'L'
+	  {  1600,  20,  21,  22,    1,  -21 }, // 'M'
+	  {  1653,  18,  21,  20,    1,  -21 }, // 'N'
+	  {  1701,  17,  22,  20,    1,  -21 }, // 'O'
+	  {  1748,  16,  21,  18,    1,  -21 }, // 'P'
+	  {  1790,  17,  24,  19,    1,  -21 }, // 'Q'
+	  {  1841,  20,  21,  20,    0,  -21 }, // 'R'
+	  {  1894,  15,  21,  19,    2,  -21 }, // 'S'
+	  {  1934,  17,  21,  19,    1,  -21 }, // 'T'
+	  {  1979,  18,  21,  20,    1,  -21 }, // 'U'
+	  {  2027,  19,  22,  19,    0,  -22 }, // 'V'
+	  {  2080,  19,  21,  20,    0,  -21 }, // 'W'
+	  {  2130,  18,  21,  18,    0,  -21 }, // 'X'
+	  {  2178,  19,  22,  18,   -1,  -22 }, // 'Y'
+	  {  2231,  16,  21,  19,    2,  -21 }, // 'Z'
+	  {  2273,   7,  25,  10,    3,  -23 }, // '['
+	  {  2295,  16,  24,  18,    1,  -23 }, // '\'
+	  {  2343,   8,  25,  10,    0,  -23 }, // ']'
+	  {  2368,  13,  10,  13,    0,  -21 }, // '^'
+	  {  2385,  16,   3,  21,    4,    3 }, // '_'
+	  {  2391,   8,   6,   8,    0,  -23 }, // '`'
+	  {  2397,  17,  15,  18,    1,  -15 }, // 'a'
+	  {  2429,  18,  21,  18,   -1,  -21 }, // 'b'
+	  {  2477,  15,  16,  17,    1,  -15 }, // 'c'
+	  {  2507,  18,  22,  19,    1,  -21 }, // 'd'
+	  {  2557,  15,  16,  17,    1,  -15 }, // 'e'
+	  {  2587,  17,  22,  15,    1,  -21 }, // 'f'
+	  {  2634,  17,  22,  18,    1,  -15 }, // 'g'
+	  {  2681,  19,  21,  20,    0,  -20 }, // 'h'
+	  {  2731,  17,  21,  18,    1,  -20 }, // 'i'
+	  {  2776,  11,  27,  13,    0,  -20 }, // 'j'
+	  {  2814,  19,  21,  20,    0,  -20 }, // 'k'
+	  {  2864,  17,  21,  17,    0,  -20 }, // 'l'
+	  {  2909,  19,  16,  21,    1,  -15 }, // 'm'
+	  {  2947,  18,  16,  20,    1,  -15 }, // 'n'
+	  {  2983,  16,  16,  19,    1,  -15 }, // 'o'
+	  {  3015,  17,  21,  19,    0,  -14 }, // 'p'
+	  {  3060,  17,  21,  18,    1,  -15 }, // 'q'
+	  {  3105,  17,  15,  18,    1,  -15 }, // 'r'
+	  {  3137,  14,  16,  17,    1,  -15 }, // 's'
+	  {  3165,  16,  22,  16,    0,  -21 }, // 't'
+	  {  3209,  20,  16,  20,    0,  -15 }, // 'u'
+	  {  3249,  19,  15,  19,    0,  -14 }, // 'v'
+	  {  3285,  21,  15,  21,    0,  -15 }, // 'w'
+	  {  3325,  20,  15,  21,    0,  -14 }, // 'x'
+	  {  3363,  19,  22,  19,    0,  -15 }, // 'y'
+	  {  3416,  15,  15,  17,    1,  -14 }, // 'z'
+	  {  3445,   7,  24,   9,    1,  -22 }, // '{'
+	  {  3466,   3,  23,   9,    3,  -22 }, // '|'
+	  {  3475,   7,  24,   9,    1,  -22 } // '}'
+};
+const GFXfont Special_Elite_Regular_30  = {
+(uint8_t  *)Special_Elite_Regular_30Bitmaps,(GFXglyph *)Special_Elite_Regular_30Glyphs,0x20, 0x7E, 31};
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font_60.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font_60.h
new file mode 100644
index 00000000..5906489d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/font_60.h
@@ -0,0 +1,199 @@
+// Created by http://oleddisplay.squix.ch/ Consider a donation
+// In case of problems make sure that you are using the font file with the correct version!
+const uint8_t DSEG14_Classic_Mini_Regular_40Bitmaps[] = {
+
+	// Bitmap Data:
+	0x00, // ' '
+	0x00, // '!'
+	0xC0,0x01,0xC0,0x03,0xC0,0x07,0x81,0xEF,0x03,0xDE,0x07,0xBC,0x0F,0x78,0x1E,0xF0,0x3D,0xE0,0x7B,0xC0,0xF7,0x81,0xEF,0x01,0xDE,0x03,0x38,0x02,0x60,0x00, // '"'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8, // '#'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x03,0xC0,0x03,0xC0,0xF0,0x00,0xF0,0x3C,0x00,0x3C,0x0F,0x00,0x0F,0x03,0xC0,0x03,0xC0,0xF0,0x00,0xF0,0x3C,0x00,0x3C,0x0F,0x00,0x0F,0x03,0xC0,0x03,0xC0,0x70,0x00,0xF0,0x18,0x00,0x38,0x02,0x00,0x0C,0x7C,0x3F,0x00,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x01,0xF0,0xFC,0x60,0x00,0x80,0x38,0x00,0x60,0x1E,0x00,0x1C,0x07,0x80,0x0F,0x01,0xE0,0x03,0xC0,0x78,0x00,0xF0,0x1E,0x00,0x3C,0x07,0x80,0x0F,0x01,0xE0,0x03,0xC0,0x78,0x00,0xF0,0x1E,0x00,0x3C,0x07,0x80,0x0F,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x07,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '$'
+	0xC0,0x00,0x00,0x38,0x00,0x00,0x0F,0x00,0x00,0x03,0xC8,0x00,0x80,0xF2,0x00,0x60,0x3C,0xC0,0x18,0x0F,0x30,0x0E,0x03,0xCE,0x03,0x80,0xF3,0x80,0xE0,0x3C,0xE0,0x38,0x0F,0x38,0x0C,0x03,0xC6,0x03,0x00,0xF0,0x80,0x80,0x3C,0x00,0x00,0x0E,0x00,0x00,0x03,0x1F,0x0F,0xC0,0x0F,0xE3,0xF8,0x03,0xF8,0xFE,0x00,0x7C,0x3F,0x18,0x00,0x00,0x0E,0x00,0x00,0x07,0x80,0x20,0x21,0xE0,0x18,0x0C,0x78,0x0E,0x03,0x1E,0x03,0x80,0xE7,0x80,0xE0,0x39,0xE0,0x38,0x0E,0x78,0x0C,0x03,0x9E,0x03,0x00,0x67,0x80,0x80,0x19,0xE0,0x20,0x02,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x00,0xC0, // '%'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x40,0x08,0x01,0x80,0x18,0x03,0x00,0x30,0x0E,0x00,0x70,0x1C,0x00,0xE0,0x38,0x01,0xC0,0x70,0x03,0x80,0xC0,0x03,0x01,0x80,0x02,0x02,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x00,0x07,0x00,0x00,0x1E,0x04,0x04,0x3C,0x18,0x0C,0x78,0x70,0x18,0xF0,0xE0,0x39,0xE1,0xC0,0x73,0xC3,0x80,0xE7,0x86,0x01,0xCF,0x0C,0x01,0x9E,0x10,0x03,0x3C,0x20,0x02,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // '&'
+	0xF7,0xBD,0xEF,0x7B,0xDE,0xF3,0x98,0x40, // '''
+	0x26,0x6E,0xEE,0xEC,0xC8,0x00,0x00,0x00,0x00,0x8C,0xCE,0xEE,0xE6,0x62, // '('
+	0x88,0xCC,0xEE,0xEE,0x62,0x00,0x00,0x00,0x00,0x26,0xEE,0xEE,0xCC,0x88, // ')'
+	0x11,0xE1,0x01,0x1E,0x30,0x19,0xE3,0x01,0x9E,0x70,0x1D,0xE7,0x01,0xDE,0x70,0x1D,0xE7,0x01,0xDE,0x60,0x0D,0xE6,0x00,0x4E,0x40,0x00,0xC0,0x00,0x04,0x00,0x3E,0x1F,0x87,0xF1,0xFC,0x7F,0x1F,0xC3,0xE1,0xF8,0x00,0x40,0x00,0x0C,0x00,0x04,0xE4,0x00,0xDE,0x60,0x1D,0xE6,0x01,0xDE,0x70,0x1D,0xE7,0x01,0xDE,0x70,0x19,0xE7,0x01,0x9E,0x30,0x11,0xE3,0x01,0x1E,0x10, // '*'
+	0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x0E,0x00,0x00,0xC0,0x00,0x04,0x00,0x3E,0x1F,0x87,0xF1,0xFC,0x7F,0x1F,0xC3,0xE1,0xF8,0x00,0x40,0x00,0x0C,0x00,0x00,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00, // '+'
+	0x26,0xEE,0xEE,0xCC,0x88, // ','
+	0x3E,0x1F,0x87,0xF1,0xFC,0x7F,0x1F,0xC3,0xE1,0xF8, // '-'
+	0x67,0xBD,0xE6,0x00, // '.'
+	0x00,0x08,0x00,0x60,0x01,0x80,0x0E,0x00,0x38,0x00,0xE0,0x03,0x80,0x0C,0x00,0x30,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x18,0x00,0xE0,0x03,0x80,0x0E,0x00,0x38,0x00,0xC0,0x03,0x00,0x08,0x00,0x20,0x00, // '/'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x02,0x7B,0xC0,0x01,0x9E,0xF0,0x00,0x67,0xBC,0x00,0x39,0xEF,0x00,0x0E,0x7B,0xC0,0x03,0x9E,0xF0,0x00,0xE7,0xBC,0x00,0x31,0xEF,0x00,0x0C,0x7B,0xC0,0x02,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x80,0x07,0xBC,0x60,0x01,0xEF,0x38,0x00,0x7B,0xCE,0x00,0x1E,0xF3,0x80,0x07,0xBC,0xE0,0x01,0xEF,0x30,0x00,0x7B,0xCC,0x00,0x1E,0xF2,0x00,0x07,0xBC,0x80,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '0'
+	0x67,0xBD,0xEF,0x7B,0xDE,0xF7,0xBD,0xEF,0x79,0xC6,0x00,0x0C,0xEF,0x7B,0xDE,0xF7,0xBD,0xEF,0x7B,0xDE,0xF3,0x00, // '1'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x80,0x1F,0xFF,0xCC,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x00,0xE0,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x0E,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0x80,0x00,0x00,0xC7,0xFF,0xF0,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '2'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x38,0xF8,0x7E,0x33,0xF8,0xFE,0x07,0xF1,0xFC,0x07,0xC3,0xF1,0x80,0x00,0x07,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // '3'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x1F,0x0F,0xC6,0x0F,0xE3,0xF8,0x03,0xF8,0xFE,0x00,0x7C,0x3F,0x18,0x00,0x00,0x0E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x00,0xC0, // '4'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x7C,0x3F,0x00,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x01,0xF0,0xFC,0x60,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x07,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '5'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x7C,0x3F,0x00,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '6'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x60,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x03,0x00, // '7'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '8'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x01,0xF0,0xFC,0x60,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x07,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '9'
+	0xF7,0xBD,0xE6,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x67,0xBD,0xEF,0x00, // ':'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8, // ';'
+	0x00,0x01,0x00,0x00,0x30,0x00,0x03,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x60,0x00,0x06,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x18,0x00,0x01,0x80,0x00,0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // '<'
+	0x3E,0x1F,0x87,0xF1,0xFC,0x7F,0x1F,0xC3,0xE1,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // '='
+	0x10,0x00,0x01,0x00,0x00,0x18,0x00,0x01,0x80,0x00,0x1C,0x00,0x01,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x0C,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0x60,0x00,0x06,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x30,0x00,0x03,0x00,0x00,0x10,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // '>'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x3F,0x18,0x00,0x0F,0xE0,0x00,0x03,0xF8,0x00,0x00,0xFC,0x00,0x00,0x80,0x00,0x00,0x60,0x00,0x00,0x1C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00, // '?'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x3F,0x18,0x00,0x0F,0xE0,0x00,0x03,0xF8,0x30,0x00,0xFC,0x6E,0x00,0x80,0x3B,0xC0,0x60,0x1E,0xF0,0x1C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // '@'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC0,0x00,0x03,0x00, // 'A'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0x70,0x1E,0x00,0xC0,0x3C,0x00,0x80,0x38,0x00,0x7E,0x30,0x00,0xFE,0x00,0x01,0xFC,0x00,0x03,0xF1,0x80,0x10,0x07,0x00,0x60,0x1E,0x00,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // 'B'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x7F,0xFF,0x01,0xFF,0xFF,0x07,0xFF,0xFF,0x0F,0xFF,0xFC, // 'C'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0x70,0x1E,0x00,0xC0,0x3C,0x00,0x80,0x38,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x10,0x07,0x00,0x60,0x1E,0x00,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // 'D'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x1F,0x0F,0xC0,0x7F,0x1F,0xC0,0xFE,0x3F,0x98,0xF8,0x7E,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x7F,0xFF,0x01,0xFF,0xFF,0x07,0xFF,0xFF,0x0F,0xFF,0xFC, // 'E'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x1F,0x0F,0xC0,0x7F,0x1F,0xC0,0xFE,0x3F,0x98,0xF8,0x7E,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x00,0x00,0x00, // 'F'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x00,0x3F,0x00,0x00,0x0F,0xE0,0x00,0x03,0xF8,0x30,0x00,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'G'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x1F,0x0F,0xC6,0x0F,0xE3,0xF8,0x03,0xF8,0xFE,0x0C,0x7C,0x3F,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'H'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x0E,0x00,0x00,0xC0,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x0C,0x00,0x00,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // 'I'
+	0x00,0x00,0x03,0x00,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x38,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB1,0xFF,0xFC,0xC0,0xFF,0xFF,0x80,0x7F,0xFF,0xF0,0x1F,0xFF,0xF8,0x00, // 'J'
+	0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x02,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0x8F,0x00,0x00,0xE0,0x00,0x0C,0x7C,0x00,0x0F,0xE0,0x00,0xFE,0x00,0xC7,0xC0,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x08,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0x2F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00, // 'K'
+	0xC0,0x00,0x01,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x38,0x00,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x07,0x00,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xE0,0x00,0x01,0x8F,0xFF,0xE0,0x3F,0xFF,0xE0,0xFF,0xFF,0xE1,0xFF,0xFF,0x80, // 'L'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC8,0x00,0x9E,0xF2,0x00,0x67,0xBC,0xC0,0x19,0xEF,0x30,0x0E,0x7B,0xCE,0x03,0x9E,0xF3,0x80,0xE7,0xBC,0xE0,0x39,0xEF,0x38,0x0C,0x7B,0xC6,0x03,0x1E,0xF0,0x80,0x87,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x20,0x0E,0xF0,0x18,0x07,0xBC,0x07,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'M'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC8,0x00,0x1E,0xF2,0x00,0x07,0xBC,0xC0,0x01,0xEF,0x30,0x00,0x7B,0xCE,0x00,0x1E,0xF3,0x80,0x07,0xBC,0xE0,0x01,0xEF,0x38,0x00,0x7B,0xC6,0x00,0x1E,0xF0,0x80,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x21,0xEF,0x00,0x0C,0x7B,0xC0,0x03,0x1E,0xF0,0x00,0xE7,0xBC,0x00,0x39,0xEF,0x00,0x0E,0x7B,0xC0,0x03,0x9E,0xF0,0x00,0x67,0xBC,0x00,0x19,0xEF,0x00,0x02,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'N'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'O'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x0E,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0x80,0x00,0x00,0xC0,0x00,0x00,0x00, // 'P'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x87,0xBC,0x00,0x31,0xEF,0x00,0x0C,0x7B,0xC0,0x03,0x9E,0xF0,0x00,0xE7,0xBC,0x00,0x39,0xEF,0x00,0x0E,0x7B,0xC0,0x01,0x9E,0xF0,0x00,0x67,0xBC,0x00,0x09,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'Q'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x0E,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x80,0x3C,0x00,0x30,0x0F,0x00,0x0C,0x03,0xC0,0x03,0x80,0xF0,0x00,0xE0,0x3C,0x00,0x38,0x0F,0x00,0x0E,0x03,0xC0,0x01,0x80,0xF0,0x00,0x60,0x3C,0x00,0x08,0x0F,0x00,0x00,0x03,0x80,0x00,0x00,0xC0,0x00,0x00,0x00, // 'R'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x20,0x00,0x03,0xC8,0x00,0x00,0xF3,0x00,0x00,0x3C,0xC0,0x00,0x0F,0x38,0x00,0x03,0xCE,0x00,0x00,0xF3,0x80,0x00,0x3C,0xE0,0x00,0x0F,0x18,0x00,0x03,0xC2,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x7C,0x3F,0x00,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x01,0xF0,0xFC,0x60,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x87,0x80,0x00,0x31,0xE0,0x00,0x0C,0x78,0x00,0x03,0x9E,0x00,0x00,0xE7,0x80,0x00,0x39,0xE0,0x00,0x0E,0x78,0x00,0x01,0x9E,0x00,0x00,0x67,0x80,0x00,0x09,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x07,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'S'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x0E,0x00,0x00,0xC0,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x0C,0x00,0x00,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00, // 'T'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB1,0xFF,0xFC,0xC0,0xFF,0xFF,0x80,0x7F,0xFF,0xF0,0x1F,0xFF,0xF8,0x00, // 'U'
+	0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x02,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0x8F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x08,0x00,0xF1,0x80,0x0F,0x38,0x00,0xF3,0x80,0x0F,0x38,0x00,0xF3,0x80,0x0F,0x30,0x00,0xF3,0x00,0x0F,0x20,0x00,0xF2,0x00,0x0F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00, // 'V'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x1C,0x07,0xBC,0x06,0x01,0xEE,0x00,0x80,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x20,0x21,0xEF,0x18,0x0C,0x7B,0xCE,0x03,0x1E,0xF3,0x80,0xE7,0xBC,0xE0,0x39,0xEF,0x38,0x0E,0x7B,0xCC,0x03,0x9E,0xF3,0x00,0x67,0xBC,0x80,0x19,0xEF,0x20,0x02,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'W'
+	0x80,0x0A,0x00,0x6C,0x01,0xB0,0x0E,0xE0,0x3B,0x80,0xEE,0x03,0xB8,0x0C,0x60,0x30,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x02,0x18,0x0C,0xE0,0x33,0x80,0xEE,0x03,0xB8,0x0E,0xC0,0x3B,0x00,0x68,0x01,0xA0,0x02, // 'X'
+	0x80,0x0A,0x00,0x6C,0x01,0xB0,0x0E,0xE0,0x3B,0x80,0xEE,0x03,0xB8,0x0C,0x60,0x30,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x18,0x00,0x70,0x03,0xC0,0x0F,0x00,0x3C,0x00,0xF0,0x03,0xC0,0x0F,0x00,0x3C,0x00,0xF0,0x03,0xC0, // 'Y'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x30,0x00,0x03,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x60,0x00,0x06,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x18,0x00,0x01,0x80,0x00,0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // 'Z'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8, // '['
+	0x80,0x02,0x00,0x0C,0x00,0x30,0x00,0xE0,0x03,0x80,0x0E,0x00,0x38,0x00,0x60,0x00,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x0C,0x00,0x30,0x00,0xE0,0x03,0x80,0x0E,0x00,0x38,0x00,0x60,0x01,0x80,0x02, // '\'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8, // ']'
+	0xC0,0x38,0x0F,0x03,0xC8,0xF2,0x3C,0xCF,0x33,0xCE,0xF3,0xBC,0xEF,0x3B,0xC6,0xF0,0xBC,0x0E,0x03,0x00, // '^'
+	0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // '_'
+	0x88,0xCC,0xEE,0xEE,0x62, // '`'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC0,0x00,0x03,0x00, // 'a'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0x70,0x1E,0x00,0xC0,0x3C,0x00,0x80,0x38,0x00,0x7E,0x30,0x00,0xFE,0x00,0x01,0xFC,0x00,0x03,0xF1,0x80,0x10,0x07,0x00,0x60,0x1E,0x00,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // 'b'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x18,0x00,0x00,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x7F,0xFF,0x01,0xFF,0xFF,0x07,0xFF,0xFF,0x0F,0xFF,0xFC, // 'c'
+	0xFF,0xFF,0xC1,0xFF,0xFF,0xC1,0xFF,0xFF,0x01,0xFF,0xFC,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0x70,0x1E,0x00,0xC0,0x3C,0x00,0x80,0x38,0x00,0x00,0x30,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x80,0x10,0x07,0x00,0x60,0x1E,0x00,0xE0,0x3C,0x03,0xC0,0x78,0x07,0x80,0xF0,0x0F,0x01,0xE0,0x1E,0x03,0xC0,0x3C,0x07,0x80,0x78,0x0F,0x00,0xF0,0x1E,0x01,0xE0,0x3C,0x03,0xC0,0x78,0x00,0x00,0xF0,0x00,0x01,0xE3,0xFF,0xF9,0x8F,0xFF,0xF8,0x3F,0xFF,0xF8,0x7F,0xFF,0xE0, // 'd'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x1F,0x0F,0xC0,0x7F,0x1F,0xC0,0xFE,0x3F,0x98,0xF8,0x7E,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x7F,0xFF,0x01,0xFF,0xFF,0x07,0xFF,0xFF,0x0F,0xFF,0xFC, // 'e'
+	0x1F,0xFF,0xF8,0x3F,0xFF,0xF8,0x3F,0xFF,0xE6,0x3F,0xFF,0x8E,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xC0,0x00,0x03,0x1F,0x0F,0xC0,0x7F,0x1F,0xC0,0xFE,0x3F,0x98,0xF8,0x7E,0x38,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x00,0x00,0x0C,0x00,0x00,0x00, // 'f'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x00,0x3F,0x00,0x00,0x0F,0xE0,0x00,0x03,0xF8,0x30,0x00,0xFC,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'g'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x1F,0x0F,0xC6,0x0F,0xE3,0xF8,0x03,0xF8,0xFE,0x0C,0x7C,0x3F,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'h'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x0E,0x00,0x00,0xC0,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x0C,0x00,0x00,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // 'i'
+	0x00,0x00,0x03,0x00,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x00,0x00,0x07,0x80,0x00,0x01,0xE0,0x00,0x00,0x38,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB1,0xFF,0xFC,0xC0,0xFF,0xFF,0x80,0x7F,0xFF,0xF0,0x1F,0xFF,0xF8,0x00, // 'j'
+	0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x02,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0x8F,0x00,0x00,0xE0,0x00,0x0C,0x7C,0x00,0x0F,0xE0,0x00,0xFE,0x00,0xC7,0xC0,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x08,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0x2F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00, // 'k'
+	0xC0,0x00,0x01,0xC0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x38,0x00,0x00,0x60,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x00,0x00,0x07,0x00,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xF0,0x00,0x01,0xE0,0x00,0x03,0xC0,0x00,0x07,0x80,0x00,0x0F,0x00,0x00,0x1E,0x00,0x00,0x3C,0x00,0x00,0x78,0x00,0x00,0xE0,0x00,0x01,0x8F,0xFF,0xE0,0x3F,0xFF,0xE0,0xFF,0xFF,0xE1,0xFF,0xFF,0x80, // 'l'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC8,0x00,0x9E,0xF2,0x00,0x67,0xBC,0xC0,0x19,0xEF,0x30,0x0E,0x7B,0xCE,0x03,0x9E,0xF3,0x80,0xE7,0xBC,0xE0,0x39,0xEF,0x38,0x0C,0x7B,0xC6,0x03,0x1E,0xF0,0x80,0x87,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x20,0x0E,0xF0,0x18,0x07,0xBC,0x07,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'm'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC8,0x00,0x1E,0xF2,0x00,0x07,0xBC,0xC0,0x01,0xEF,0x30,0x00,0x7B,0xCE,0x00,0x1E,0xF3,0x80,0x07,0xBC,0xE0,0x01,0xEF,0x38,0x00,0x7B,0xC6,0x00,0x1E,0xF0,0x80,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x21,0xEF,0x00,0x0C,0x7B,0xC0,0x03,0x1E,0xF0,0x00,0xE7,0xBC,0x00,0x39,0xEF,0x00,0x0E,0x7B,0xC0,0x03,0x9E,0xF0,0x00,0x67,0xBC,0x00,0x19,0xEF,0x00,0x02,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'n'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'o'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x0E,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x00,0x00,0x03,0x80,0x00,0x00,0xC0,0x00,0x00,0x00, // 'p'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x00,0x00,0x18,0x00,0x00,0x00,0x00,0x00,0x00,0x30,0x00,0x00,0x6E,0x00,0x00,0x3B,0xC0,0x00,0x1E,0xF0,0x00,0x87,0xBC,0x00,0x31,0xEF,0x00,0x0C,0x7B,0xC0,0x03,0x9E,0xF0,0x00,0xE7,0xBC,0x00,0x39,0xEF,0x00,0x0E,0x7B,0xC0,0x01,0x9E,0xF0,0x00,0x67,0xBC,0x00,0x09,0xEF,0x00,0x00,0x7B,0x80,0x00,0x1E,0xC7,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 'q'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xCC,0xE0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xB8,0x00,0x00,0xEC,0x7C,0x3F,0x18,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x31,0xF0,0xFC,0x0E,0x00,0x00,0x03,0xC0,0x00,0x00,0xF0,0x00,0x80,0x3C,0x00,0x30,0x0F,0x00,0x0C,0x03,0xC0,0x03,0x80,0xF0,0x00,0xE0,0x3C,0x00,0x38,0x0F,0x00,0x0E,0x03,0xC0,0x01,0x80,0xF0,0x00,0x60,0x3C,0x00,0x08,0x0F,0x00,0x00,0x03,0x80,0x00,0x00,0xC0,0x00,0x00,0x00, // 'r'
+	0x1F,0xFF,0xF8,0x07,0xFF,0xFF,0x00,0xFF,0xFF,0x83,0x1F,0xFF,0xC0,0xE0,0x00,0x00,0x3C,0x00,0x00,0x0F,0x20,0x00,0x03,0xC8,0x00,0x00,0xF3,0x00,0x00,0x3C,0xC0,0x00,0x0F,0x38,0x00,0x03,0xCE,0x00,0x00,0xF3,0x80,0x00,0x3C,0xE0,0x00,0x0F,0x18,0x00,0x03,0xC2,0x00,0x00,0xF0,0x00,0x00,0x38,0x00,0x00,0x0C,0x7C,0x3F,0x00,0x3F,0x8F,0xE0,0x0F,0xE3,0xF8,0x01,0xF0,0xFC,0x60,0x00,0x00,0x38,0x00,0x00,0x1E,0x00,0x00,0x87,0x80,0x00,0x31,0xE0,0x00,0x0C,0x78,0x00,0x03,0x9E,0x00,0x00,0xE7,0x80,0x00,0x39,0xE0,0x00,0x0E,0x78,0x00,0x01,0x9E,0x00,0x00,0x67,0x80,0x00,0x09,0xE0,0x00,0x00,0x78,0x00,0x00,0x1E,0x07,0xFF,0xF3,0x03,0xFF,0xFE,0x01,0xFF,0xFF,0xC0,0x7F,0xFF,0xE0, // 's'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x0E,0x00,0x00,0xC0,0x00,0x04,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x40,0x00,0x0C,0x00,0x00,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00,0x01,0xE0,0x00,0x1E,0x00, // 't'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEE,0x00,0x00,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xF0,0x00,0x07,0xBC,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB1,0xFF,0xFC,0xC0,0xFF,0xFF,0x80,0x7F,0xFF,0xF0,0x1F,0xFF,0xF8,0x00, // 'u'
+	0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x00,0x02,0xF0,0x00,0x6F,0x00,0x06,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xEF,0x00,0x0E,0xF0,0x00,0xCF,0x00,0x0C,0xF0,0x00,0x8F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xC0,0x00,0x0E,0x00,0x00,0xF0,0x00,0x0F,0x08,0x00,0xF1,0x80,0x0F,0x38,0x00,0xF3,0x80,0x0F,0x38,0x00,0xF3,0x80,0x0F,0x30,0x00,0xF3,0x00,0x0F,0x20,0x00,0xF2,0x00,0x0F,0x00,0x00,0xE0,0x00,0x0C,0x00,0x00, // 'v'
+	0xC0,0x00,0x03,0x38,0x00,0x01,0xEF,0x00,0x00,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x3C,0x07,0xBC,0x0F,0x01,0xEF,0x03,0xC0,0x7B,0xC0,0xF0,0x1E,0xF0,0x1C,0x07,0xBC,0x06,0x01,0xEE,0x00,0x80,0x3B,0x00,0x00,0x06,0x00,0x00,0x00,0x00,0x00,0x00,0x0C,0x00,0x00,0x1B,0x80,0x00,0x0E,0xF0,0x00,0x07,0xBC,0x20,0x21,0xEF,0x18,0x0C,0x7B,0xCE,0x03,0x1E,0xF3,0x80,0xE7,0xBC,0xE0,0x39,0xEF,0x38,0x0E,0x7B,0xCC,0x03,0x9E,0xF3,0x00,0x67,0xBC,0x80,0x19,0xEF,0x20,0x02,0x7B,0xC0,0x00,0x1E,0xE0,0x00,0x07,0xB0,0x00,0x00,0xC0, // 'w'
+	0x80,0x0A,0x00,0x6C,0x01,0xB0,0x0E,0xE0,0x3B,0x80,0xEE,0x03,0xB8,0x0C,0x60,0x30,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x02,0x18,0x0C,0xE0,0x33,0x80,0xEE,0x03,0xB8,0x0E,0xC0,0x3B,0x00,0x68,0x01,0xA0,0x02, // 'x'
+	0x80,0x0A,0x00,0x6C,0x01,0xB0,0x0E,0xE0,0x3B,0x80,0xEE,0x03,0xB8,0x0C,0x60,0x30,0x80,0x80,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x02,0x00,0x18,0x00,0x70,0x03,0xC0,0x0F,0x00,0x3C,0x00,0xF0,0x03,0xC0,0x0F,0x00,0x3C,0x00,0xF0,0x03,0xC0, // 'y'
+	0xFF,0xFF,0xCF,0xFF,0xFE,0x7F,0xFF,0xC3,0xFF,0xF8,0x00,0x00,0x00,0x00,0x00,0x00,0x01,0x00,0x00,0x30,0x00,0x03,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x70,0x00,0x07,0x00,0x00,0x60,0x00,0x06,0x00,0x00,0x40,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x04,0x00,0x00,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x1C,0x00,0x01,0xC0,0x00,0x18,0x00,0x01,0x80,0x00,0x10,0x00,0x01,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x3F,0xFF,0x87,0xFF,0xFC,0xFF,0xFF,0xEF,0xFF,0xFC, // 'z'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8, // '{'
+	0xF7,0xBD,0xEF,0x7B,0xDE,0xF3,0x98,0x40,0x00,0x00,0x23,0x1D,0xEF,0x7B,0xDE,0xF7,0xBD,0xE0, // '|'
+	0xFF,0xD0,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x50,0x0A,0x01,0x40,0x28,0x05,0x00,0xA0,0x14,0x02,0x80,0x5F,0xF8 // '}'
+};
+const GFXglyph DSEG14_Classic_Mini_Regular_40Glyphs[] = {
+// bitmapOffset, width, height, xAdvance, xOffset, yOffset
+	  {     0,   1,   1,   9,    0,    0 }, // ' '
+	  {     1,   1,   1,  34,    0,    0 }, // '!'
+	  {     2,  15,  16,  34,    4,  -37 }, // '"'
+	  {    32,  11,  26,  16,    1,  -26 }, // '#'
+	  {    68,  26,  40,  34,    4,  -40 }, // '$'
+	  {   198,  26,  34,  34,    4,  -37 }, // '%'
+	  {   309,  23,  40,  34,    7,  -40 }, // '&'
+	  {   424,   5,  12,  34,   14,  -34 }, // '''
+	  {   432,   4,  28,  34,   20,  -34 }, // '('
+	  {   446,   4,  28,  34,   10,  -34 }, // ')'
+	  {   460,  20,  28,  34,    7,  -34 }, // '*'
+	  {   530,  20,  28,  34,    7,  -34 }, // '+'
+	  {   600,   4,  10,  34,   10,  -16 }, // ','
+	  {   605,  20,   4,  34,    7,  -22 }, // '-'
+	  {   615,   5,   5,   1,   -2,   -5 }, // '.'
+	  {   619,  14,  28,  34,   10,  -34 }, // '/'
+	  {   668,  26,  40,  34,    4,  -40 }, // '0'
+	  {   798,   5,  34,  34,   25,  -37 }, // '1'
+	  {   820,  26,  40,  34,    4,  -40 }, // '2'
+	  {   950,  23,  40,  34,    7,  -40 }, // '3'
+	  {  1065,  26,  34,  34,    4,  -37 }, // '4'
+	  {  1176,  26,  40,  34,    4,  -40 }, // '5'
+	  {  1306,  26,  40,  34,    4,  -40 }, // '6'
+	  {  1436,  26,  37,  34,    4,  -40 }, // '7'
+	  {  1557,  26,  40,  34,    4,  -40 }, // '8'
+	  {  1687,  26,  40,  34,    4,  -40 }, // '9'
+	  {  1817,   5,  21,   9,    2,  -30 }, // ':'
+	  {  1831,  11,  26,  16,    1,  -26 }, // ';'
+	  {  1867,  20,  34,  34,    7,  -34 }, // '<'
+	  {  1952,  20,  22,  34,    7,  -22 }, // '='
+	  {  2007,  20,  34,  34,    7,  -34 }, // '>'
+	  {  2092,  26,  34,  34,    4,  -40 }, // '?'
+	  {  2203,  26,  40,  34,    4,  -40 }, // '@'
+	  {  2333,  26,  37,  34,    4,  -40 }, // 'A'
+	  {  2454,  23,  40,  34,    7,  -40 }, // 'B'
+	  {  2569,  23,  40,  34,    4,  -40 }, // 'C'
+	  {  2684,  23,  40,  34,    7,  -40 }, // 'D'
+	  {  2799,  23,  40,  34,    4,  -40 }, // 'E'
+	  {  2914,  23,  37,  34,    4,  -40 }, // 'F'
+	  {  3021,  26,  40,  34,    4,  -40 }, // 'G'
+	  {  3151,  26,  34,  34,    4,  -37 }, // 'H'
+	  {  3262,  20,  40,  34,    7,  -40 }, // 'I'
+	  {  3362,  26,  37,  34,    4,  -37 }, // 'J'
+	  {  3483,  20,  34,  34,    4,  -37 }, // 'K'
+	  {  3568,  23,  37,  34,    4,  -37 }, // 'L'
+	  {  3675,  26,  34,  34,    4,  -37 }, // 'M'
+	  {  3786,  26,  34,  34,    4,  -37 }, // 'N'
+	  {  3897,  26,  40,  34,    4,  -40 }, // 'O'
+	  {  4027,  26,  37,  34,    4,  -40 }, // 'P'
+	  {  4148,  26,  40,  34,    4,  -40 }, // 'Q'
+	  {  4278,  26,  37,  34,    4,  -40 }, // 'R'
+	  {  4399,  26,  40,  34,    4,  -40 }, // 'S'
+	  {  4529,  20,  34,  34,    7,  -40 }, // 'T'
+	  {  4614,  26,  37,  34,    4,  -37 }, // 'U'
+	  {  4735,  20,  34,  34,    4,  -37 }, // 'V'
+	  {  4820,  26,  34,  34,    4,  -37 }, // 'W'
+	  {  4931,  14,  28,  34,   10,  -34 }, // 'X'
+	  {  4980,  14,  28,  34,   10,  -34 }, // 'Y'
+	  {  5029,  20,  40,  34,    7,  -40 }, // 'Z'
+	  {  5129,  11,  26,  16,    1,  -26 }, // '['
+	  {  5165,  14,  28,  34,   10,  -34 }, // '\'
+	  {  5214,  11,  26,  16,    1,  -26 }, // ']'
+	  {  5250,  10,  16,  34,    4,  -37 }, // '^'
+	  {  5270,  20,   4,  34,    7,   -4 }, // '_'
+	  {  5280,   4,  10,  34,   10,  -34 }, // '`'
+	  {  5285,  26,  37,  34,    4,  -40 }, // 'a'
+	  {  5406,  23,  40,  34,    7,  -40 }, // 'b'
+	  {  5521,  23,  40,  34,    4,  -40 }, // 'c'
+	  {  5636,  23,  40,  34,    7,  -40 }, // 'd'
+	  {  5751,  23,  40,  34,    4,  -40 }, // 'e'
+	  {  5866,  23,  37,  34,    4,  -40 }, // 'f'
+	  {  5973,  26,  40,  34,    4,  -40 }, // 'g'
+	  {  6103,  26,  34,  34,    4,  -37 }, // 'h'
+	  {  6214,  20,  40,  34,    7,  -40 }, // 'i'
+	  {  6314,  26,  37,  34,    4,  -37 }, // 'j'
+	  {  6435,  20,  34,  34,    4,  -37 }, // 'k'
+	  {  6520,  23,  37,  34,    4,  -37 }, // 'l'
+	  {  6627,  26,  34,  34,    4,  -37 }, // 'm'
+	  {  6738,  26,  34,  34,    4,  -37 }, // 'n'
+	  {  6849,  26,  40,  34,    4,  -40 }, // 'o'
+	  {  6979,  26,  37,  34,    4,  -40 }, // 'p'
+	  {  7100,  26,  40,  34,    4,  -40 }, // 'q'
+	  {  7230,  26,  37,  34,    4,  -40 }, // 'r'
+	  {  7351,  26,  40,  34,    4,  -40 }, // 's'
+	  {  7481,  20,  34,  34,    7,  -40 }, // 't'
+	  {  7566,  26,  37,  34,    4,  -37 }, // 'u'
+	  {  7687,  20,  34,  34,    4,  -37 }, // 'v'
+	  {  7772,  26,  34,  34,    4,  -37 }, // 'w'
+	  {  7883,  14,  28,  34,   10,  -34 }, // 'x'
+	  {  7932,  14,  28,  34,   10,  -34 }, // 'y'
+	  {  7981,  20,  40,  34,    7,  -40 }, // 'z'
+	  {  8081,  11,  26,  16,    1,  -26 }, // '{'
+	  {  8117,   5,  28,  34,   14,  -34 }, // '|'
+	  {  8135,  11,  26,  16,    1,  -26 } // '}'
+};
+const GFXfont DSEG14_Classic_Mini_Regular_40 = {
+(uint8_t  *)DSEG14_Classic_Mini_Regular_40Bitmaps,(GFXglyph *)DSEG14_Classic_Mini_Regular_40Glyphs,0x20, 0x7E, 44};
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.c
new file mode 100644
index 00000000..9fe08f9b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.c
@@ -0,0 +1,36 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "main.h"
+#include "i2c.h"
+
+RAM bool i2c_sending;
+
+void init_i2c(void)
+{
+	i2c_gpio_set(I2C_GPIO_GROUP_C0C1);
+	i2c_master_init((uint8_t)(CLOCK_SYS_CLOCK_HZ / (4 * 400000)));
+	i2c_set_id(0x78);
+}
+
+void send_i2c(uint8_t device_id, uint8_t *buffer, int dataLen)
+{
+	if (i2c_sending)
+		return;
+	i2c_sending = true;
+	i2c_set_id(device_id);
+	i2c_write_series(0, 0, (uint8_t *)buffer, dataLen);
+	i2c_sending = false;
+}
+
+uint8_t test_i2c_device(uint8_t address)
+{
+	reg_i2c_id = address << 1;
+	reg_i2c_ctrl = FLD_I2C_CMD_START | FLD_I2C_CMD_ID;
+	while (reg_i2c_status & FLD_I2C_CMD_BUSY)
+		;
+	reg_i2c_ctrl = FLD_I2C_CMD_STOP;
+	while (reg_i2c_status & FLD_I2C_CMD_BUSY)
+		;
+
+	return (reg_i2c_status & FLD_I2C_NAK) ? 0 : 1;
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.h
new file mode 100644
index 00000000..ed4388a9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/i2c.h
@@ -0,0 +1,8 @@
+#pragma once
+
+#include <stdint.h>
+
+void init_i2c(void);
+void send_i2c(uint8_t device_id, uint8_t *buffer, int dataLen);
+uint8_t test_i2c_device(uint8_t address);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.c
new file mode 100644
index 00000000..6933b8f7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.c
@@ -0,0 +1,52 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "led.h"
+#include "main.h"
+
+ void init_led(void)
+{
+    gpio_setup_up_down_resistor(LED_BLUE, PM_PIN_PULLUP_1M);
+    gpio_write(LED_BLUE, 1);
+    gpio_set_func(LED_BLUE, AS_GPIO);
+    gpio_set_output_en(LED_BLUE, 1);
+    gpio_set_input_en(LED_BLUE, 0);
+
+    gpio_write(LED_RED, 1);
+    gpio_setup_up_down_resistor(LED_RED, PM_PIN_PULLUP_1M);
+    gpio_set_func(LED_RED, AS_GPIO);
+    gpio_set_output_en(LED_RED, 1);
+    gpio_set_input_en(LED_RED, 0);
+
+    gpio_setup_up_down_resistor(LED_GREEN, PM_PIN_PULLUP_1M);
+    gpio_write(LED_GREEN, 1);
+    gpio_set_func(LED_GREEN, AS_GPIO);
+    gpio_set_output_en(LED_GREEN, 1);
+    gpio_set_input_en(LED_GREEN, 0);
+}
+
+ void set_led_color(uint8_t color)
+{
+    switch (color)
+    {
+    case 1:
+        gpio_write(LED_BLUE, 1);
+        gpio_write(LED_RED, 0);
+        gpio_write(LED_GREEN, 1);
+        break;
+    case 2:
+        gpio_write(LED_BLUE, 1);
+        gpio_write(LED_RED, 1);
+        gpio_write(LED_GREEN, 0);
+        break;
+    case 3:
+        gpio_write(LED_BLUE, 0);
+        gpio_write(LED_RED, 1);
+        gpio_write(LED_GREEN, 1);
+        break;
+    default:
+        gpio_write(LED_BLUE, 1);
+        gpio_write(LED_RED, 1);
+        gpio_write(LED_GREEN, 1);
+        break;
+    }
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.h
new file mode 100644
index 00000000..a84afc9c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/led.h
@@ -0,0 +1,4 @@
+#pragma once
+
+void init_led(void);
+void set_led_color(uint8_t color);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/lut.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/lut.h
new file mode 100644
index 00000000..af49e59d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/lut.h
@@ -0,0 +1,53 @@
+#pragma once
+#include "screen.h"
+
+#define LUTGROUP_NEGATIVE           0
+#define LUTGROUP_FASTBLINK          1
+#define LUTGROUP_SLOWBLINK          2
+#define LUTGROUP_SET                3
+#define LUTGROUP_IMPROVE_SHARPNESS  4
+#define LUTGROUP_IMPROVE_REDS       5
+#define LUTGROUP_UNUSED             6
+
+#define LUTGROUP_UNKNOWN            7
+#define LUTGROUP_UNUSED3            8  
+#define LUTGROUP_UNUSED4            9
+
+
+struct vgroup {
+    uint8_t A : 2;
+    uint8_t B : 2;
+    uint8_t C : 2;
+    uint8_t D : 2;
+};
+
+struct lut {
+    struct vgroup group[7];
+};
+
+struct lut10 {
+    struct vgroup group[10];
+} ;
+
+struct group {
+    uint8_t phaselength[4];
+    uint8_t repeat;
+} ;
+
+struct waveform {
+    struct lut lut[5];
+    struct group group[7];
+    uint8_t gatelevel;
+    uint8_t sourcelevel[3];
+    uint8_t dummyline;
+    uint8_t gatewidth;
+} ;
+
+struct waveform10 {
+    struct lut10 lut[5];
+    struct group group[10];
+    uint8_t gatelevel;
+    uint8_t sourcelevel[3];
+    uint8_t dummyline;
+    uint8_t gatewidth;
+} ;
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.c
new file mode 100644
index 00000000..07eb7612
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.c
@@ -0,0 +1,259 @@
+#include "tl_common.h"
+#include "main.h"
+#include "led.h"
+#include "epd.h"
+#include "uart.h"
+#include "zigbee.h"
+#include "nfc.h"
+
+#include "proto.h"
+#include "syncedproto.h"
+#include "powermgt.h"
+#include "comms.h"
+#include "drawing.h"
+#include "wdt.h"
+#include "battery.h"
+
+extern uint8_t our_ch;
+RAM u8 ourmac[8] = {0xCC, 0xCC, 0xCC, 0xCC, 0xCC, 0x02, 0x00, 0x00};
+extern RAM uint8_t mSelfMac[8];
+RAM char ownMacString[100] = "";
+
+ uint8_t showChannelSelect()
+{ // returns 0 if no accesspoints were found
+	uint8_t result[sizeof(channelList)];
+	memset(result, 0, sizeof(result));
+	for (uint8_t i = 0; i < 4; i++)
+	{
+		for (uint8_t c = 0; c < sizeof(channelList); c++)
+		{
+			if (detectAP(channelList[c]))
+			{
+				if (mLastLqi > result[c])
+					result[c] = mLastLqi;
+				printf("Channel: %d - LQI: %d RSSI %d\r\n", channelList[c], mLastLqi, mLastRSSI);
+			}
+		}
+	}
+
+	uint8_t highestLqi = 0;
+	uint8_t highestSlot = 0;
+	for (uint8_t c = 0; c < sizeof(result); c++)
+	{
+		if (result[c] > highestLqi)
+		{
+			highestSlot = channelList[c];
+			highestLqi = result[c];
+		}
+	}
+	mLastLqi = highestLqi;
+	return highestSlot;
+}
+
+ uint8_t channelSelect()
+{ // returns 0 if no accesspoints were found
+	uint8_t result[16];
+	memset(result, 0, sizeof(result));
+
+	for (uint8_t i = 0; i < 2; i++)
+	{
+		for (uint8_t c = 0; c < sizeof(channelList); c++)
+		{
+			if (detectAP(channelList[c]))
+			{
+				if (mLastLqi > result[c])
+					result[c] = mLastLqi;
+			}
+		}
+	}
+
+	uint8_t highestLqi = 0;
+	uint8_t highestSlot = 0;
+	for (uint8_t c = 0; c < sizeof(result); c++)
+	{
+		if (result[c] > highestLqi)
+		{
+			highestSlot = channelList[c];
+			highestLqi = result[c];
+		}
+	}
+
+	mLastLqi = highestLqi;
+	return highestSlot;
+}
+
+ int main(void)
+{
+	startup_state_e state = drv_platform_init();
+	u8 isRetention = (state == SYSTEM_DEEP_RETENTION) ? 1 : 0;
+	isRetention = 0;// keep the compiler happy
+	drv_enable_irq();
+	init_led();
+	init_uart();
+	init_nfc();
+
+	printf("\r\n\r\n\r\nSTARTING\r\n\r\n\r\n\r\n");
+
+	u32 flash_mid = 0;
+	u8 flash_uid[16] = {0};
+	printf("Reading UID");
+	int flag = flash_read_mid_uid_with_check(&flash_mid, flash_uid);
+	if (flag)
+	{
+		for (int i = 0; i < 16; i++)
+		{
+			printf(" %02X", flash_uid[i]);
+		}
+		printf("\r\n");
+		for (int i = 0; i < 8; i++)
+		{
+			mSelfMac[i] = flash_uid[i + 8];
+		}
+	}
+	else
+	{
+		printf(" - Failed!\r\n");
+	}
+
+	sprintf(ownMacString, "%02X:%02X:%02X:%02X:%02X:%02X:%02X:%02X", mSelfMac[7], mSelfMac[6], mSelfMac[5], mSelfMac[4], mSelfMac[3], mSelfMac[2], mSelfMac[1], mSelfMac[0]);
+
+	batteryVoltage = get_battery_mv();
+
+	printf("Battery mv: %d Millis: %d\r\n", batteryVoltage, getMillis());
+
+	// epd_display("Boot", batteryVoltage, ownMacString, 1);
+
+	initializeProto();
+
+	currentChannel = showChannelSelect();
+
+	wdt10s();
+
+	if (currentChannel)
+	{
+		our_ch = currentChannel;
+		printf("AP Found\r\n");
+		epd_display("AP Found", batteryVoltage, ownMacString, 1);
+		initPowerSaving(INTERVAL_BASE);
+		doSleep(5000UL);
+	}
+	else
+	{
+		printf("No AP found\r\n");
+		epd_display("No AP Found", batteryVoltage, ownMacString, 1);
+		initPowerSaving(INTERVAL_AT_MAX_ATTEMPTS);
+		doSleep(120000UL);
+	}
+	while (1)
+	{
+		batteryVoltage = get_battery_mv();
+		uint32_t before = getMillis();
+		printf("Battery mv: %d Millis before: %d Uptime: %d\r\n", batteryVoltage, before, (getMillis() / 1000) / 60);
+		wdt10s();
+		if (currentChannel)
+		{
+			struct AvailDataInfo *avail;
+			avail = getAvailDataInfo();
+			// avail = getShortAvailDataInfo();
+			addAverageValue();
+
+			if (avail == NULL)
+			{
+				set_led_color(1);
+				printf("No data\r\n");
+				set_led_color(0);
+				// no data :(
+				nextCheckInFromAP = 0; // let the power-saving algorithm determine the next sleep period
+			}
+			else
+			{
+				nextCheckInFromAP = avail->nextCheckIn;
+				// got some data from the AP!
+				if (avail->dataType != DATATYPE_NOUPDATE)
+				{
+					set_led_color(2);
+					printf("Got data transfer\r\n");
+					set_led_color(0);
+					// data transfer
+					if (processAvailDataInfo(avail))
+					{
+						// succesful transfer, next wake time is determined by the NextCheckin;
+					}
+					else
+					{
+						// failed transfer, let the algorithm determine next sleep interval (not the AP)
+						nextCheckInFromAP = 0;
+					}
+				}
+				else
+				{
+					set_led_color(3);
+					printf("No data transfer\r\n");
+					set_led_color(0);
+					wakeUpReason = WAKEUP_REASON_TIMED; // Only one successfully AP communication we can have timed wakeups
+														// no data transfer, just sleep.
+				}
+			}
+
+			uint16_t nextCheckin = getNextSleep();
+			longDataReqCounter += nextCheckin;
+			if (nextCheckin == INTERVAL_AT_MAX_ATTEMPTS)
+			{
+				// disconnected, obviously...
+				currentChannel = 0;
+			}
+
+			doSleep(40 * 1000UL);
+			/*// if the AP told us to sleep for a specific period, do so.
+			if (nextCheckInFromAP)
+			{
+				doSleep(nextCheckInFromAP * 60000UL);
+			}
+			else
+			{
+				doSleep(getNextSleep() * 1000UL);
+			}*/
+		}
+		else
+		{
+			set_led_color(3);
+			// We sacrifice 10ms here to show a basic LED status as the scan itself takes more than a second
+			WaitMs(10);
+			set_led_color(0);
+			currentChannel = channelSelect();
+
+			if ((!currentChannel) || (lowBattery) || (scanAttempts == (INTERVAL_1_ATTEMPTS + INTERVAL_2_ATTEMPTS - 1)))
+			{
+				wdt60s();
+				if (curImgSlot != 0xFF)
+				{
+					drawImageFromEeprom(curImgSlot);
+				}
+				else if ((scanAttempts >= (INTERVAL_1_ATTEMPTS + INTERVAL_2_ATTEMPTS - 1)))
+				{
+					epd_display("Sleep", batteryVoltage, ownMacString, 1);
+				}
+				else
+				{
+					epd_display("No AP", batteryVoltage, ownMacString, 1);
+				}
+			}
+			// did we find a working channel?
+			if (currentChannel)
+			{
+				// now associated!
+				our_ch = currentChannel;
+				scanAttempts = 0;
+				wakeUpReason = WAKEUP_REASON_NETWORK_SCAN;
+				initPowerSaving(INTERVAL_BASE);
+				doSleep(40 * 1000UL);
+			}
+			else
+			{
+				// still not associated
+				doSleep(15 * 60 * 1000UL);
+			}
+		}
+	}
+	return 0;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.h
new file mode 100644
index 00000000..081b0ad6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/main.h
@@ -0,0 +1,24 @@
+#pragma once
+#include <stdint.h>
+
+#define LED_BLUE	GPIO_PA7
+#define LED_RED		GPIO_PD2
+#define LED_GREEN	GPIO_PD3
+
+#define RXD 		GPIO_PA0
+#define TXD			GPIO_PB1
+
+#define EPD_RESET 	GPIO_PD4
+#define EPD_DC 		GPIO_PD7
+#define EPD_BUSY 	GPIO_PA1
+#define EPD_CS		GPIO_PB4
+#define EPD_CLK		GPIO_PB5
+#define EPD_MOSI	GPIO_PB6
+#define EPD_ENABLE	GPIO_PC5
+
+#define NFC_SDA		GPIO_PC0
+#define NFC_SCL		GPIO_PC1
+#define NFC_CS		GPIO_PC6
+#define NFC_IRQ		GPIO_PC4
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.c
new file mode 100644
index 00000000..3fa77380
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.c
@@ -0,0 +1,26 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "nfc.h"
+#include "main.h"
+#include "i2c.h"
+
+uint8_t nfc_reset[] = {0x03, 0xb5, 0xa0};
+
+ void init_nfc(void)
+{
+    gpio_write(NFC_CS, 1);
+    gpio_set_func(NFC_CS, AS_GPIO);
+    gpio_set_output_en(NFC_CS, 1);
+    gpio_set_input_en(NFC_CS, 0);
+    gpio_setup_up_down_resistor(NFC_CS, PM_PIN_PULLUP_10K);
+
+    gpio_set_func(NFC_IRQ, AS_GPIO);
+    gpio_set_output_en(NFC_IRQ, 0);
+    gpio_set_input_en(NFC_IRQ, 1);
+    gpio_setup_up_down_resistor(NFC_IRQ, PM_PIN_PULLUP_10K);
+
+    gpio_write(NFC_CS, 0);
+    sleep_us(500);
+    send_i2c(0xae, nfc_reset, sizeof(nfc_reset));
+    gpio_write(NFC_CS, 1);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.h
new file mode 100644
index 00000000..49fef1d6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/nfc.h
@@ -0,0 +1,5 @@
+#pragma once
+#include <stdint.h>
+#include "main.h"
+
+void init_nfc(void);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/obd.inl b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/obd.inl
new file mode 100644
index 00000000..bac1c4b6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/obd.inl
@@ -0,0 +1,2459 @@
+//
+// obd.inl
+// Drawing code for OneBitDisplay library
+//
+#ifdef _LINUX_
+#define PROGMEM
+#define false 0
+#define true 1
+#define LOW 0
+#define HIGH 1
+#define memcpy_P memcpy
+#ifndef I2C_SLAVE
+#define I2C_SLAVE 0
+#endif
+static void digitalWrite(int iPin, int iState) {
+}
+//static int digitalRead(int iPin)
+//{
+//  return AIOReadGPIO(iPin);
+//} /* digitalRead() */
+
+#endif
+void obdSetDCMode(OBDISP *pOBD, int iMode);
+void InvertBytes(uint8_t *pData, uint8_t bLen);
+void SPI_BitBang(OBDISP *pOBD, uint8_t *pData, int iLen, uint8_t iMOSIPin, uint8_t iSCKPin);
+
+const uint8_t ucMirror[256] PROGMEM =
+     {0, 128, 64, 192, 32, 160, 96, 224, 16, 144, 80, 208, 48, 176, 112, 240,
+      8, 136, 72, 200, 40, 168, 104, 232, 24, 152, 88, 216, 56, 184, 120, 248,
+      4, 132, 68, 196, 36, 164, 100, 228, 20, 148, 84, 212, 52, 180, 116, 244,
+      12, 140, 76, 204, 44, 172, 108, 236, 28, 156, 92, 220, 60, 188, 124, 252,
+      2, 130, 66, 194, 34, 162, 98, 226, 18, 146, 82, 210, 50, 178, 114, 242,
+      10, 138, 74, 202, 42, 170, 106, 234, 26, 154, 90, 218, 58, 186, 122, 250,
+      6, 134, 70, 198, 38, 166, 102, 230, 22, 150, 86, 214, 54, 182, 118, 246,
+      14, 142, 78, 206, 46, 174, 110, 238, 30, 158, 94, 222, 62, 190, 126, 254,
+      1, 129, 65, 193, 33, 161, 97, 225, 17, 145, 81, 209, 49, 177, 113, 241,
+      9, 137, 73, 201, 41, 169, 105, 233, 25, 153, 89, 217, 57, 185, 121, 249,
+      5, 133, 69, 197, 37, 165, 101, 229, 21, 149, 85, 213, 53, 181, 117, 245,
+      13, 141, 77, 205, 45, 173, 109, 237, 29, 157, 93, 221, 61, 189, 125, 253,
+      3, 131, 67, 195, 35, 163, 99, 227, 19, 147, 83, 211, 51, 179, 115, 243,
+      11, 139, 75, 203, 43, 171, 107, 235, 27, 155, 91, 219, 59, 187, 123, 251,
+      7, 135, 71, 199, 39, 167, 103, 231, 23, 151, 87, 215, 55, 183, 119, 247,
+      15, 143, 79, 207, 47, 175, 111, 239, 31, 159, 95, 223, 63, 191, 127, 255};
+
+const uint8_t ucFont[]PROGMEM = {
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x06,0x5f,0x5f,0x06,0x00,
+  0x00,0x07,0x07,0x00,0x07,0x07,0x00,0x14,0x7f,0x7f,0x14,0x7f,0x7f,0x14,
+  0x24,0x2e,0x2a,0x6b,0x6b,0x3a,0x12,0x46,0x66,0x30,0x18,0x0c,0x66,0x62,
+  0x30,0x7a,0x4f,0x5d,0x37,0x7a,0x48,0x00,0x04,0x07,0x03,0x00,0x00,0x00,
+  0x00,0x1c,0x3e,0x63,0x41,0x00,0x00,0x00,0x41,0x63,0x3e,0x1c,0x00,0x00,
+  0x08,0x2a,0x3e,0x1c,0x3e,0x2a,0x08,0x00,0x08,0x08,0x3e,0x3e,0x08,0x08,
+  0x00,0x00,0x80,0xe0,0x60,0x00,0x00,0x00,0x08,0x08,0x08,0x08,0x08,0x08,
+  0x00,0x00,0x00,0x60,0x60,0x00,0x00,0x60,0x30,0x18,0x0c,0x06,0x03,0x01,
+  0x3e,0x7f,0x59,0x4d,0x47,0x7f,0x3e,0x40,0x42,0x7f,0x7f,0x40,0x40,0x00,
+  0x62,0x73,0x59,0x49,0x6f,0x66,0x00,0x22,0x63,0x49,0x49,0x7f,0x36,0x00,
+  0x18,0x1c,0x16,0x53,0x7f,0x7f,0x50,0x27,0x67,0x45,0x45,0x7d,0x39,0x00,
+  0x3c,0x7e,0x4b,0x49,0x79,0x30,0x00,0x03,0x03,0x71,0x79,0x0f,0x07,0x00,
+  0x36,0x7f,0x49,0x49,0x7f,0x36,0x00,0x06,0x4f,0x49,0x69,0x3f,0x1e,0x00,
+  0x00,0x00,0x00,0x66,0x66,0x00,0x00,0x00,0x00,0x80,0xe6,0x66,0x00,0x00,
+  0x08,0x1c,0x36,0x63,0x41,0x00,0x00,0x00,0x14,0x14,0x14,0x14,0x14,0x14,
+  0x00,0x41,0x63,0x36,0x1c,0x08,0x00,0x00,0x02,0x03,0x59,0x5d,0x07,0x02,
+  0x3e,0x7f,0x41,0x5d,0x5d,0x5f,0x0e,0x7c,0x7e,0x13,0x13,0x7e,0x7c,0x00,
+  0x41,0x7f,0x7f,0x49,0x49,0x7f,0x36,0x1c,0x3e,0x63,0x41,0x41,0x63,0x22,
+  0x41,0x7f,0x7f,0x41,0x63,0x3e,0x1c,0x41,0x7f,0x7f,0x49,0x5d,0x41,0x63,
+  0x41,0x7f,0x7f,0x49,0x1d,0x01,0x03,0x1c,0x3e,0x63,0x41,0x51,0x33,0x72,
+  0x7f,0x7f,0x08,0x08,0x7f,0x7f,0x00,0x00,0x41,0x7f,0x7f,0x41,0x00,0x00,
+  0x30,0x70,0x40,0x41,0x7f,0x3f,0x01,0x41,0x7f,0x7f,0x08,0x1c,0x77,0x63,
+  0x41,0x7f,0x7f,0x41,0x40,0x60,0x70,0x7f,0x7f,0x0e,0x1c,0x0e,0x7f,0x7f,
+  0x7f,0x7f,0x06,0x0c,0x18,0x7f,0x7f,0x1c,0x3e,0x63,0x41,0x63,0x3e,0x1c,
+  0x41,0x7f,0x7f,0x49,0x09,0x0f,0x06,0x1e,0x3f,0x21,0x31,0x61,0x7f,0x5e,
+  0x41,0x7f,0x7f,0x09,0x19,0x7f,0x66,0x26,0x6f,0x4d,0x49,0x59,0x73,0x32,
+  0x03,0x41,0x7f,0x7f,0x41,0x03,0x00,0x7f,0x7f,0x40,0x40,0x7f,0x7f,0x00,
+  0x1f,0x3f,0x60,0x60,0x3f,0x1f,0x00,0x3f,0x7f,0x60,0x30,0x60,0x7f,0x3f,
+  0x63,0x77,0x1c,0x08,0x1c,0x77,0x63,0x07,0x4f,0x78,0x78,0x4f,0x07,0x00,
+  0x47,0x63,0x71,0x59,0x4d,0x67,0x73,0x00,0x7f,0x7f,0x41,0x41,0x00,0x00,
+  0x01,0x03,0x06,0x0c,0x18,0x30,0x60,0x00,0x41,0x41,0x7f,0x7f,0x00,0x00,
+  0x08,0x0c,0x06,0x03,0x06,0x0c,0x08,0x80,0x80,0x80,0x80,0x80,0x80,0x80,
+  0x00,0x00,0x03,0x07,0x04,0x00,0x00,0x20,0x74,0x54,0x54,0x3c,0x78,0x40,
+  0x41,0x7f,0x3f,0x48,0x48,0x78,0x30,0x38,0x7c,0x44,0x44,0x6c,0x28,0x00,
+  0x30,0x78,0x48,0x49,0x3f,0x7f,0x40,0x38,0x7c,0x54,0x54,0x5c,0x18,0x00,
+  0x48,0x7e,0x7f,0x49,0x03,0x06,0x00,0x98,0xbc,0xa4,0xa4,0xf8,0x7c,0x04,
+  0x41,0x7f,0x7f,0x08,0x04,0x7c,0x78,0x00,0x44,0x7d,0x7d,0x40,0x00,0x00,
+  0x60,0xe0,0x80,0x84,0xfd,0x7d,0x00,0x41,0x7f,0x7f,0x10,0x38,0x6c,0x44,
+  0x00,0x41,0x7f,0x7f,0x40,0x00,0x00,0x7c,0x7c,0x18,0x78,0x1c,0x7c,0x78,
+  0x7c,0x78,0x04,0x04,0x7c,0x78,0x00,0x38,0x7c,0x44,0x44,0x7c,0x38,0x00,
+  0x84,0xfc,0xf8,0xa4,0x24,0x3c,0x18,0x18,0x3c,0x24,0xa4,0xf8,0xfc,0x84,
+  0x44,0x7c,0x78,0x4c,0x04,0x0c,0x18,0x48,0x5c,0x54,0x74,0x64,0x24,0x00,
+  0x04,0x04,0x3e,0x7f,0x44,0x24,0x00,0x3c,0x7c,0x40,0x40,0x3c,0x7c,0x40,
+  0x1c,0x3c,0x60,0x60,0x3c,0x1c,0x00,0x3c,0x7c,0x60,0x30,0x60,0x7c,0x3c,
+  0x44,0x6c,0x38,0x10,0x38,0x6c,0x44,0x9c,0xbc,0xa0,0xa0,0xfc,0x7c,0x00,
+  0x4c,0x64,0x74,0x5c,0x4c,0x64,0x00,0x08,0x08,0x3e,0x77,0x41,0x41,0x00,
+  0x00,0x00,0x00,0x77,0x77,0x00,0x00,0x41,0x41,0x77,0x3e,0x08,0x08,0x00,
+  0x02,0x03,0x01,0x03,0x02,0x03,0x01,0x70,0x78,0x4c,0x46,0x4c,0x78,0x70};
+// AVR MCUs have very little memory; save 6K of FLASH by stretching the 'normal'
+// font instead of using this large font
+#ifndef __AVR__
+const uint8_t ucBigFont[]PROGMEM = {
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xfc,0xfc,0xff,0xff,0xff,0xff,0xfc,0xfc,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x3f,0x3f,0x3f,0x3f,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0x00,0x00,0x0f,0x0f,0x3f,0x3f,0x00,0x00,0x00,0x00,0x3f,0x3f,0x0f,0x0f,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xfc,0xfc,0xfc,0xfc,0xc0,0xc0,0xfc,0xfc,0xfc,0xfc,0xc0,0xc0,0x00,0x00,
+  0xc0,0xc0,0xff,0xff,0xff,0xff,0xc0,0xc0,0xff,0xff,0xff,0xff,0xc0,0xc0,0x00,0x00,
+  0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xf0,0xf0,0xf0,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xfc,0xfc,0xff,0xff,0x03,0x03,0x03,0x03,0x03,0x03,0x0f,0x0f,0x3c,0x3c,0x00,0x00,
+  0xf0,0xf0,0xc3,0xc3,0x03,0x03,0x03,0x03,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,
+  0x00,0x00,0x03,0x03,0x03,0x03,0x3f,0x3f,0x3f,0x3f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xf0,0xf0,0xf0,0xf0,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xf0,0xf0,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xf0,0xf0,0x3c,0x3c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x3c,0x3c,0xff,0xff,0xc3,0xc3,0xff,0xff,0x3c,0x3c,0x00,0x00,0x00,0x00,
+  0xfc,0xfc,0xff,0xff,0x03,0x03,0x0f,0x0f,0xfc,0xfc,0xff,0xff,0x03,0x03,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x30,0x30,0x3f,0x3f,0x0f,0x0f,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xf0,0xf0,0xfc,0xfc,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x03,0x03,0x0f,0x0f,0xfc,0xfc,0xf0,0xf0,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0x0c,0x0c,0xcc,0xcc,0xff,0xff,0x3f,0x3f,0x3f,0x3f,0xff,0xff,0xcc,0xcc,0x0c,0x0c,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x0c,0x0c,0x0c,0x0c,0xff,0xff,0xff,0xff,0x0c,0x0c,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x30,0x30,0x3f,0x3f,0x0f,0x0f,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xf0,0xf0,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xf0,0xf0,0x3c,0x3c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xfc,0xfc,0xff,0xff,0x03,0x03,0x03,0x03,0xc3,0xc3,0xff,0xff,0xfc,0xfc,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x30,0x30,0x0f,0x0f,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x30,0x30,0x3c,0x3c,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x03,0x03,0xc3,0xc3,0xff,0xff,0x3c,0x3c,0x00,0x00,
+  0xc0,0xc0,0xf0,0xf0,0x3c,0x3c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x0f,0x0f,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x03,0x03,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xf0,0xf0,0x3c,0x3c,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+  0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0xff,0xff,0xff,0xff,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0c,0x0c,0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
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+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x00,0x00,0xff,0xff,0xff,0xff,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xff,0xff,0xff,0xff,0x03,0x03,0x00,0x00,0x03,0x03,0x0f,0x0f,0x00,0x00,
+  0x0c,0x0c,0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x3c,0x3c,0x30,0x30,0xf0,0xf0,0xc3,0xc3,0x03,0x03,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0xfc,0xfc,0xff,0xff,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x03,0x03,0x0f,0x0f,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x00,0x00,0xf0,0xf0,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0f,0x0f,0x03,0x03,0x0f,0x0f,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0x00,0x00,0x03,0x03,0xff,0xff,0xfc,0xfc,0xff,0xff,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,
+  0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0xcc,0xcc,0xff,0xff,0x3f,0x3f,0x00,0x00,
+  0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0xc0,0x00,0x00,
+  0x03,0x03,0xc3,0xc3,0xf0,0xf0,0x3c,0x3c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,
+  0x0f,0x0f,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x0f,0x0f,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0xfc,0xff,0xff,0x03,0x03,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x03,0x03,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0c,0x0c,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xff,0xff,0xff,0xff,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0xfc,0xfc,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x0f,0x0f,0x0f,0x0f,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x03,0x03,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0xfc,0xfc,0xff,0xff,0x03,0x03,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x0c,0x0c,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x0f,0x0f,0x0c,0x0c,0x0f,0x0f,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,
+  0x00,0x00,0x00,0x00,0xc0,0xc0,0xf0,0xf0,0xc0,0xc0,0x00,0x00,0x00,0x00,0x00,0x00,
+  0xfc,0xfc,0xff,0xff,0x03,0x03,0x00,0x00,0x03,0x03,0xff,0xff,0xfc,0xfc,0x00,0x00,
+  0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x03,0x00,0x00,
+  0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00};
+#endif // !__AVR__
+
+  // 5x7 font (in 6x8 cell)
+const uint8_t ucSmallFont[]PROGMEM = {
+0x00,0x00,0x00,0x00,0x00,
+0x00,0x06,0x5f,0x06,0x00,
+0x07,0x03,0x00,0x07,0x03,
+0x24,0x7e,0x24,0x7e,0x24,
+0x24,0x2b,0x6a,0x12,0x00,
+0x63,0x13,0x08,0x64,0x63,
+0x36,0x49,0x56,0x20,0x50,
+0x00,0x07,0x03,0x00,0x00,
+0x00,0x3e,0x41,0x00,0x00,
+0x00,0x41,0x3e,0x00,0x00,
+0x08,0x3e,0x1c,0x3e,0x08,
+0x08,0x08,0x3e,0x08,0x08,
+0x00,0xe0,0x60,0x00,0x00,
+0x08,0x08,0x08,0x08,0x08,
+0x00,0x60,0x60,0x00,0x00,
+0x20,0x10,0x08,0x04,0x02,
+0x3e,0x51,0x49,0x45,0x3e,
+0x00,0x42,0x7f,0x40,0x00,
+0x62,0x51,0x49,0x49,0x46,
+0x22,0x49,0x49,0x49,0x36,
+0x18,0x14,0x12,0x7f,0x10,
+0x2f,0x49,0x49,0x49,0x31,
+0x3c,0x4a,0x49,0x49,0x30,
+0x01,0x71,0x09,0x05,0x03,
+0x36,0x49,0x49,0x49,0x36,
+0x06,0x49,0x49,0x29,0x1e,
+0x00,0x6c,0x6c,0x00,0x00,
+0x00,0xec,0x6c,0x00,0x00,
+0x08,0x14,0x22,0x41,0x00,
+0x24,0x24,0x24,0x24,0x24,
+0x00,0x41,0x22,0x14,0x08,
+0x02,0x01,0x59,0x09,0x06,
+0x3e,0x41,0x5d,0x55,0x1e,
+0x7e,0x11,0x11,0x11,0x7e,
+0x7f,0x49,0x49,0x49,0x36,
+0x3e,0x41,0x41,0x41,0x22,
+0x7f,0x41,0x41,0x41,0x3e,
+0x7f,0x49,0x49,0x49,0x41,
+0x7f,0x09,0x09,0x09,0x01,
+0x3e,0x41,0x49,0x49,0x7a,
+0x7f,0x08,0x08,0x08,0x7f,
+0x00,0x41,0x7f,0x41,0x00,
+0x30,0x40,0x40,0x40,0x3f,
+0x7f,0x08,0x14,0x22,0x41,
+0x7f,0x40,0x40,0x40,0x40,
+0x7f,0x02,0x04,0x02,0x7f,
+0x7f,0x02,0x04,0x08,0x7f,
+0x3e,0x41,0x41,0x41,0x3e,
+0x7f,0x09,0x09,0x09,0x06,
+0x3e,0x41,0x51,0x21,0x5e,
+0x7f,0x09,0x09,0x19,0x66,
+0x26,0x49,0x49,0x49,0x32,
+0x01,0x01,0x7f,0x01,0x01,
+0x3f,0x40,0x40,0x40,0x3f,
+0x1f,0x20,0x40,0x20,0x1f,
+0x3f,0x40,0x3c,0x40,0x3f,
+0x63,0x14,0x08,0x14,0x63,
+0x07,0x08,0x70,0x08,0x07,
+0x71,0x49,0x45,0x43,0x00,
+0x00,0x7f,0x41,0x41,0x00,
+0x02,0x04,0x08,0x10,0x20,
+0x00,0x41,0x41,0x7f,0x00,
+0x04,0x02,0x01,0x02,0x04,
+0x80,0x80,0x80,0x80,0x80,
+0x00,0x03,0x07,0x00,0x00,
+0x20,0x54,0x54,0x54,0x78,
+0x7f,0x44,0x44,0x44,0x38,
+0x38,0x44,0x44,0x44,0x28,
+0x38,0x44,0x44,0x44,0x7f,
+0x38,0x54,0x54,0x54,0x08,
+0x08,0x7e,0x09,0x09,0x00,
+0x18,0xa4,0xa4,0xa4,0x7c,
+0x7f,0x04,0x04,0x78,0x00,
+0x00,0x00,0x7d,0x40,0x00,
+0x40,0x80,0x84,0x7d,0x00,
+0x7f,0x10,0x28,0x44,0x00,
+0x00,0x00,0x7f,0x40,0x00,
+0x7c,0x04,0x18,0x04,0x78,
+0x7c,0x04,0x04,0x78,0x00,
+0x38,0x44,0x44,0x44,0x38,
+0xfc,0x44,0x44,0x44,0x38,
+0x38,0x44,0x44,0x44,0xfc,
+0x44,0x78,0x44,0x04,0x08,
+0x08,0x54,0x54,0x54,0x20,
+0x04,0x3e,0x44,0x24,0x00,
+0x3c,0x40,0x20,0x7c,0x00,
+0x1c,0x20,0x40,0x20,0x1c,
+0x3c,0x60,0x30,0x60,0x3c,
+0x6c,0x10,0x10,0x6c,0x00,
+0x9c,0xa0,0x60,0x3c,0x00,
+0x64,0x54,0x54,0x4c,0x00,
+0x08,0x3e,0x41,0x41,0x00,
+0x00,0x00,0x77,0x00,0x00,
+0x00,0x41,0x41,0x3e,0x08,
+0x02,0x01,0x02,0x01,0x00,
+0x3c,0x26,0x23,0x26,0x3c};
+
+#define MAX_CACHE 192
+static uint8_t u8Cache[MAX_CACHE]; // for faster character drawing
+static volatile uint8_t u8End = 0;
+
+static void obdCachedFlush(OBDISP *pOBD, int bRender)
+{
+   if (u8End > 0) {
+      obdWriteDataBlock(pOBD, u8Cache, u8End, bRender);
+      u8End = 0;
+   }
+} /* obdCachedFlush() */
+
+static void obdCachedWrite(OBDISP *pOBD, uint8_t *pData, uint8_t u8Len, int bRender)
+{
+   if (u8End + u8Len > MAX_CACHE) // need to flush it
+   {
+       obdCachedFlush(pOBD, bRender); // write the old data
+   }
+   memcpy(&u8Cache[u8End], pData, u8Len);
+   u8End += u8Len;
+  
+} /* obdCachedWrite() */
+// wrapper/adapter functions to make the code work on Linux
+#ifdef _LINUX_
+static uint8_t pgm_read_byte(const uint8_t *ptr)
+{
+  return *ptr;
+}
+static int16_t pgm_read_word(const uint8_t *ptr)
+{
+  return ptr[0] + (ptr[1]<<8);
+}
+// Wrapper function to write I2C data
+static void _I2CWrite(OBDISP *pOBD, unsigned char *pData, int iLen)
+{
+}
+#else // Arduino
+static void _I2CWrite(OBDISP *pOBD, unsigned char *pData, int iLen)
+{
+#if !defined( __AVR_ATtiny85__ )
+  if (pOBD->com_mode == COM_SPI) // we're writing to SPI, treat it differently
+  {
+    if (pOBD->iDCPin != 0xff)
+    {
+      digitalWrite(pOBD->iDCPin, (pData[0] == 0) ? LOW : HIGH); // data versus command
+      digitalWrite(pOBD->iCSPin, LOW);
+    }
+#ifdef HAL_ESP32_HAL_H_
+   {
+   uint8_t ucTemp[1024];
+        SPI.transferBytes(&pData[1], ucTemp, iLen-1);
+   }
+#else
+    SPI.transfer(&pData[1], iLen-1);
+#endif
+    if (pOBD->type < SHARP_144x168)
+      digitalWrite(pOBD->iCSPin, HIGH);
+  }
+  else // must be I2C
+#endif // !ATtiny85
+  {
+    if (pOBD->bbi2c.bWire && iLen > 32) // Hardware I2C has write length limits
+    {
+       iLen--; // don't count the 0x40 byte the first time through
+       while (iLen >= 31) // max 31 data byes + data introducer
+       {
+          I2CWrite(&pOBD->bbi2c, pOBD->oled_addr, pData, 32);
+          iLen -= 31;
+          pData += 31;
+          pData[0] = 0x40;
+       }
+       if (iLen) iLen++; // If remaining data, add the last 0x40 byte
+    }
+    if (iLen) // if any data remaining
+    {
+      I2CWrite(&pOBD->bbi2c, pOBD->oled_addr, pData, iLen);
+    }
+  } // I2C
+} /* _I2CWrite() */
+#endif // _LINUX_
+
+// Send a single byte command to the OLED controller
+void obdWriteCommand(OBDISP *pOBD, unsigned char c)
+{
+} /* obdWriteCommand() */
+
+//
+// Byte operands for compressing the data
+// The first 2 bits are the type, followed by the counts
+#define OP_MASK 0xc0
+#define OP_SKIPCOPY 0x00
+#define OP_COPYSKIP 0x40
+#define OP_REPEATSKIP 0x80
+#define OP_REPEAT 0xc0
+//
+// Write a block of flash memory to the display
+//
+void oledWriteFlashBlock(OBDISP *pOBD, uint8_t *s, int iLen)
+{
+int j;
+int iWidthMask = pOBD->width -1;
+int iSizeMask = ((pOBD->width * pOBD->height)/8) - 1;
+int iWidthShift = (pOBD->width == 128) ? 7:6; // assume 128 or 64 wide
+uint8_t ucTemp[128];
+
+     while (((pOBD->iScreenOffset & iWidthMask) + iLen) >= pOBD->width) // if it will hit the page end
+     {
+        j = pOBD->width - (pOBD->iScreenOffset & iWidthMask); // amount we can write in one shot
+        memcpy_P(ucTemp, s, j);
+        obdWriteDataBlock(pOBD, ucTemp, j, 1);
+        s += j;
+        iLen -= j;
+        pOBD->iScreenOffset = (pOBD->iScreenOffset + j) & iSizeMask;
+        obdSetPosition(pOBD, pOBD->iScreenOffset & iWidthMask, (pOBD->iScreenOffset >> iWidthShift), 1);
+     } // while it needs some help
+  memcpy_P(ucTemp, s, iLen);
+  obdWriteDataBlock(pOBD, ucTemp, iLen, 1);
+  pOBD->iScreenOffset = (pOBD->iScreenOffset + iLen) & iSizeMask;
+} /* oledWriteFlashBlock() */
+
+//
+// Create a virtual display of any size
+// The memory buffer must be provided at the time of creation
+//
+void obdCreateVirtualDisplay(OBDISP *pOBD, int width, int height, uint8_t *buffer)
+{
+  if (pOBD != NULL && buffer != NULL)
+  {
+    pOBD->width = width;
+    pOBD->height = height;
+    pOBD->type = LCD_VIRTUAL;
+    pOBD->ucScreen = buffer;
+    pOBD->iCursorX = pOBD->iCursorY = 0;
+    pOBD->iScreenOffset = 0;
+  }
+} /* obdCreateVirtualDisplay() */
+//
+// Scroll the internal buffer by 1 scanline (up/down)
+// width is in pixels, lines is group of 8 rows
+//
+int obdScrollBuffer(OBDISP *pOBD, int iStartCol, int iEndCol, int iStartRow, int iEndRow, int bUp)
+{
+    uint8_t b, *s;
+    int col, row;
+    int iPitch;
+
+    if (iStartCol < 0 || iStartCol >= pOBD->width || iEndCol < 0 || iEndCol > pOBD->width || iStartCol > iEndCol) // invalid
+        return -1;
+    if (iStartRow < 0 || iStartRow >= (pOBD->height/8) || iEndRow < 0 || iEndRow >= (pOBD->height/8) || iStartRow > iEndRow)
+        return -1;
+    iPitch = pOBD->width;
+    if (bUp)
+    {
+        for (row=iStartRow; row<=iEndRow; row++)
+        {
+            s = &pOBD->ucScreen[(row * iPitch) + iStartCol];
+            for (col=iStartCol; col<=iEndCol; col++)
+            {
+                b = *s;
+                b >>= 1; // scroll pixels 'up'
+                if (row < iEndRow)
+                    b |= (s[iPitch] << 7); // capture pixel of row below, except for last row
+                *s++ = b;
+            } // for col
+        } // for row
+    } // up
+    else // down
+    {
+        for (row=iEndRow; row>=iStartRow; row--)
+        {
+            s = &pOBD->ucScreen[(row * iPitch)+iStartCol];
+            for (col=iStartCol; col<=iEndCol; col++)
+            {
+                b = *s;
+                b <<= 1; // scroll down
+                if (row > iStartRow)
+                    b |= (s[-iPitch] >> 7); // capture pixel of row above
+                *s++ = b;
+            } // for col
+        } // for row
+    }
+    return 0;
+} /* obdScrollBuffer() */
+//
+// Send commands to position the "cursor" (aka memory write address)
+// to the given row and column
+//
+void obdSetPosition(OBDISP *pOBD, int x, int y, int bRender)
+{
+unsigned char buf[4];
+int iPitch = pOBD->width;
+
+  obdCachedFlush(pOBD, bRender); // flush any cached data first
+    
+  pOBD->iScreenOffset = (y*iPitch)+x;
+  
+  if (pOBD->type == LCD_VIRTUAL || pOBD->type >= SHARP_144x168)
+    return; // nothing to do
+  if (!bRender)
+      return; // don't send the commands to the OLED if we're not rendering the graphics now
+  if (pOBD->type == LCD_NOKIA5110)
+  {
+      obdWriteCommand(pOBD, 0x40 | y);
+      obdWriteCommand(pOBD, 0x80 | x);
+      return;
+  }
+  if (pOBD->type == OLED_64x32) // visible display starts at column 32, row 4
+  {
+    x += 32; // display is centered in VRAM, so this is always true
+    if (pOBD->flip == 0) // non-flipped display starts from line 4
+       y += 4;
+  }
+  else if (pOBD->type == LCD_UC1701 && pOBD->flip)
+  {
+    x += 4;
+  }
+  else if (pOBD->type == OLED_132x64) // SH1106 has 128 pixels centered in 132
+  {
+    x += 2;
+  }
+  else if (pOBD->type == OLED_96x16) // visible display starts at line 2
+  { // mapping is a bit strange on the 96x16 OLED
+    if (pOBD->flip)
+      x += 32;
+    else
+      y += 2;
+  }
+  else if (pOBD->type == OLED_72x40) // starts at x=28,y=3
+  {
+    x += 28;
+    if (!pOBD->flip)
+    {
+      y += 3;
+    }
+  }
+    if (pOBD->com_mode == COM_I2C) { // I2C device
+      buf[0] = 0x00; // command introducer
+      buf[1] = 0xb0 | y; // set page to Y
+      buf[2] = x & 0xf; // lower column address
+      buf[3] = 0x10 | (x >> 4); // upper column addr
+      _I2CWrite(pOBD, buf, 4);
+    } else { // SPI mode
+        obdWriteCommand(pOBD, 0xb0 | y); // set Y
+        obdWriteCommand(pOBD, 0x10 | (x >> 4)); // set X MSB
+        obdWriteCommand(pOBD, 0x00 | (x & 0xf)); // set X LSB
+    }
+} /* obdSetPosition() */
+
+//
+// Write a block of pixel data to the OLED
+// Length can be anything from 1 to 1024 (whole display)
+//
+void obdWriteDataBlock(OBDISP *pOBD, unsigned char *ucBuf, int iLen, int bRender)
+{
+int iPitch, iBufferSize;
+
+  iPitch = pOBD->width;
+  iBufferSize = iPitch * (pOBD->height / 8);
+
+// Keep a copy in local buffer
+if (pOBD->ucScreen && (iLen + pOBD->iScreenOffset) <= iBufferSize)
+{
+  memcpy(&pOBD->ucScreen[pOBD->iScreenOffset], ucBuf, iLen);
+  pOBD->iScreenOffset += iLen;
+  // wrap around ?
+  if (pOBD->iScreenOffset >= iBufferSize)
+    pOBD->iScreenOffset -= iBufferSize;
+}
+if (pOBD->type == LCD_VIRTUAL || pOBD->type >= SHARP_144x168)
+  return; // nothing else to do
+} /* obdWriteDataBlock() */
+//
+// Write a repeating byte to the display
+//
+void obdRepeatByte(OBDISP *pOBD, uint8_t b, int iLen)
+{
+int j;
+int iWidthMask = pOBD->width -1;
+int iWidthShift = (pOBD->width == 128) ? 7:6; // assume 128 or 64 pixels wide
+int iSizeMask = ((pOBD->width * pOBD->height)/8) -1;
+uint8_t ucTemp[128];
+
+     memset(ucTemp, b, (iLen > 128) ? 128:iLen);
+     while (((pOBD->iScreenOffset & iWidthMask) + iLen) >= pOBD->width) // if it will hit the page end
+     {
+        j = pOBD->width - (pOBD->iScreenOffset & iWidthMask); // amount we can write in one shot
+        obdWriteDataBlock(pOBD, ucTemp, j, 1);
+        iLen -= j;
+        pOBD->iScreenOffset = (pOBD->iScreenOffset + j) & iSizeMask;
+        obdSetPosition(pOBD, pOBD->iScreenOffset & iWidthMask, (pOBD->iScreenOffset >> iWidthShift), 1);
+     } // while it needs some help
+  obdWriteDataBlock(pOBD, ucTemp, iLen, 1);
+  pOBD->iScreenOffset += iLen;
+} /* obdRepeatByte() */
+
+//
+// Play a frame of animation data
+// The animation data is assumed to be encoded for a full frame of the display
+// Given the pointer to the start of the compressed data,
+// it returns the pointer to the start of the next frame
+// Frame rate control is up to the calling program to manage
+// When it finishes the last frame, it will start again from the beginning
+//
+uint8_t * obdPlayAnimFrame(OBDISP *pOBD, uint8_t *pAnimation, uint8_t *pCurrent, int iLen)
+{
+uint8_t *s;
+int i, j;
+unsigned char b, bCode;
+int iBufferSize = (pOBD->width * pOBD->height)/8; // size in bytes of the display devce
+int iWidthMask, iWidthShift;
+
+  iWidthMask = pOBD->width - 1;
+  iWidthShift = (pOBD->width == 128) ? 7:6; // 128 or 64 pixels wide
+  if (pCurrent == NULL || pCurrent > pAnimation + iLen)
+     return NULL; // invalid starting point
+
+  s = (uint8_t *)pCurrent; // start of animation data
+  i = 0;
+  obdSetPosition(pOBD, 0,0,1);
+  while (i < iBufferSize) // run one frame
+  {
+    bCode = pgm_read_byte(s++);
+    switch (bCode & OP_MASK) // different compression types
+    {
+      case OP_SKIPCOPY: // skip/copy
+        if (bCode == OP_SKIPCOPY) // big skip
+        {
+           b = pgm_read_byte(s++);
+           i += b + 1;
+           obdSetPosition(pOBD, i & iWidthMask, (i >> iWidthShift), 1);
+        }
+        else // skip/copy
+        {
+          if (bCode & 0x38)
+          {
+            i += ((bCode & 0x38) >> 3); // skip amount
+            obdSetPosition(pOBD, i & iWidthMask, (i >> iWidthShift), 1);
+          }
+          if (bCode & 7)
+          {
+             oledWriteFlashBlock(pOBD, s, bCode & 7);
+             s += (bCode & 7);
+             i += bCode & 7;
+          }
+       }
+       break;
+     case OP_COPYSKIP: // copy/skip
+       if (bCode == OP_COPYSKIP) // big copy
+       {
+         b = pgm_read_byte(s++);
+         j = b + 1;
+         oledWriteFlashBlock(pOBD, s, j);
+         s += j;
+         i += j;
+       }
+       else
+       {
+         j = ((bCode & 0x38) >> 3);
+         if (j)
+         {
+           oledWriteFlashBlock(pOBD, s, j);
+           s += j;
+           i += j;
+         }
+         if (bCode & 7)
+         {
+           i += (bCode & 7); // skip
+           obdSetPosition(pOBD, i & iWidthMask, (i >> iWidthShift), 1);
+         }
+       }
+       break;
+     case OP_REPEATSKIP: // repeat/skip
+       j = (bCode & 0x38) >> 3; // repeat count
+       b = pgm_read_byte(s++);
+       obdRepeatByte(pOBD, b, j);
+       i += j;
+       if (bCode & 7)
+       {
+         i += (bCode & 7); // skip amount
+         obdSetPosition(pOBD, i & iWidthMask, (i >> iWidthShift), 1);
+       }
+       break;
+                  
+     case OP_REPEAT:
+       j = (bCode & 0x3f) + 1;
+       b = pgm_read_byte(s++);
+       obdRepeatByte(pOBD, b, j);
+       i += j;
+       break;
+    } // switch on code type
+  } // while rendering a frame
+  if (s >= pAnimation + iLen) // we've hit the end, restart from the beginning
+     s = pAnimation;
+  return s; // return pointer to start of next frame
+} /* obdPlayAnimFrame() */
+//
+// Draw a sprite of any size in any position
+// If it goes beyond the left/right or top/bottom edges
+// it's trimmed to show the valid parts
+// This function requires a back buffer to be defined
+// The priority color (0 or 1) determines which color is painted
+// when a 1 is encountered in the source image.
+//
+void obdDrawSprite(OBDISP *pOBD, uint8_t *pSprite, int cx, int cy, int iPitch, int x, int y, uint8_t iPriority)
+{
+    int tx, ty, dx, dy, iStartX;
+    uint8_t *s, *d, uc, pix, ucSrcMask, ucDstMask;
+    int iLocalPitch;
+
+    iLocalPitch = pOBD->width;
+    
+    if (x+cx < 0 || y+cy < 0 || x >= pOBD->width || y >= pOBD->height || pOBD->ucScreen == NULL)
+        return; // no backbuffer or out of bounds
+    dy = y; // destination y
+    if (y < 0) // skip the invisible parts
+    {
+        cy += y;
+        y = -y;
+        pSprite += (y * iPitch);
+        dy = 0;
+    }
+    if (y + cy > pOBD->height)
+        cy = pOBD->height - y;
+    iStartX = 0;
+    dx = x;
+    if (x < 0)
+    {
+        cx += x;
+        x = -x;
+        iStartX = x;
+        dx = 0;
+    }
+    if (x + cx > pOBD->width)
+        cx = pOBD->width - x;
+    for (ty=0; ty<cy; ty++)
+    {
+        s = &pSprite[iStartX >> 3];
+        d = &pOBD->ucScreen[(dy>>3) * iLocalPitch + dx];
+        ucSrcMask = 0x80 >> (iStartX & 7);
+        pix = *s++;
+        ucDstMask = 1 << (dy & 7);
+        if (iPriority) // priority color is 1
+        {
+          for (tx=0; tx<cx; tx++)
+          {
+            uc = d[0];
+            if (pix & ucSrcMask) // set pixel in source, set it in dest
+              d[0] = (uc | ucDstMask);
+            d++; // next pixel column
+            ucSrcMask >>= 1;
+            if (ucSrcMask == 0) // read next byte
+            {
+                ucSrcMask = 0x80;
+                pix = *s++;
+            }
+          } // for tx
+        } // priorty color 1
+        else
+        {
+          for (tx=0; tx<cx; tx++)
+          {
+            uc = d[0];
+            if (pix & ucSrcMask) // clr pixel in source, clr it in dest
+              d[0] = (uc & ~ucDstMask);
+            d++; // next pixel column
+            ucSrcMask >>= 1;
+            if (ucSrcMask == 0) // read next byte
+            {
+                ucSrcMask = 0x80;
+                pix = *s++;
+            }
+          } // for tx
+        } // priority color 0
+        dy++;
+        pSprite += iPitch;
+    } // for ty
+} /* obdDrawSprite() */
+//
+// Draw a 16x16 tile in any of 4 rotated positions
+// Assumes input image is laid out like "normal" graphics with
+// the MSB on the left and 2 bytes per line
+// On AVR, the source image is assumed to be in FLASH memory
+// The function can draw the tile on byte boundaries, so the x value
+// can be from 0 to width-16 and y can be from 0 to (height/8)-2
+//
+void obdDrawTile(OBDISP *pOBD, const uint8_t *pTile, int x, int y, int iRotation, int bInvert, int bRender)
+{
+    uint8_t ucTemp[32]; // prepare LCD data here
+    uint8_t i, j, k, iOffset, ucMask, uc, ucPixels;
+    uint8_t bFlipX=0, bFlipY=0;
+    
+    if (x < 0 || y < 0 || y > (pOBD->height/8)-2 || x > pOBD->width-16)
+        return; // out of bounds
+    if (pTile == NULL) return; // bad pointer; really? :(
+    if (iRotation == ANGLE_180 || iRotation == ANGLE_270 || iRotation == ANGLE_FLIPX)
+        bFlipX = 1;
+    if (iRotation == ANGLE_180 || iRotation == ANGLE_270 || iRotation == ANGLE_FLIPY)
+        bFlipY = 1;
+    
+    memset(ucTemp, 0, sizeof(ucTemp)); // we only set white pixels, so start from black
+    if (iRotation == ANGLE_0 || iRotation == ANGLE_180 || iRotation == ANGLE_FLIPX || iRotation == ANGLE_FLIPY)
+    {
+        for (j=0; j<16; j++) // y
+        {
+            for (i=0; i<16; i+=8) // x
+            {
+                ucPixels = pgm_read_byte((uint8_t*)pTile++);
+                ucMask = 0x80; // MSB is the first source pixel
+                for (k=0; k<8; k++)
+                {
+                    if (ucPixels & ucMask) // translate the pixel
+                    {
+                        if (bFlipY)
+                            uc = 0x80 >> (j & 7);
+                        else
+                            uc = 1 << (j & 7);
+                        iOffset = i+k;
+                        if (bFlipX) iOffset = 15-iOffset;
+                        iOffset += (j & 8)<<1; // top/bottom half of output
+                        if (bFlipY)
+                            iOffset ^= 16;
+                        ucTemp[iOffset] |= uc;
+                    }
+                    ucMask >>= 1;
+                } // for k
+            } // for i
+        } // for j
+    }
+    else // rotated 90/270
+    {
+        for (j=0; j<16; j++) // y
+        {
+            for (i=0; i<16; i+=8) // x
+            {
+                ucPixels = pgm_read_byte((uint8_t*)pTile++);
+                ucMask = 0x80; // MSB is the first source pixel
+                for (k=0; k<8; k++)
+                {
+                    if (ucPixels & ucMask) // translate the pixel
+                    {
+                        if (bFlipY)
+                            uc = 0x80 >> k;
+                        else
+                            uc = 1 << k;
+                        iOffset = 15-j;
+                        if (bFlipX) iOffset = 15-iOffset;
+                        iOffset += i<<1; // top/bottom half of output
+                        if (bFlipY)
+                            iOffset ^= 16;
+                        ucTemp[iOffset] |= uc;
+                    }
+                    ucMask >>= 1;
+                } // for k
+            } // for i
+        } // for j
+    }
+    if (bInvert) InvertBytes(ucTemp, 32);
+    // Send the data to the display
+    obdSetPosition(pOBD, x, y, bRender);
+    obdWriteDataBlock(pOBD, ucTemp, 16, bRender); // top half
+    obdSetPosition(pOBD, x,y+1, bRender);
+    obdWriteDataBlock(pOBD, &ucTemp[16], 16, bRender); // bottom half
+} /* obdDrawTile() */
+
+// Set (or clear) an individual pixel
+// The local copy of the frame buffer is used to avoid
+// reading data from the display controller
+int obdSetPixel(OBDISP *pOBD, int x, int y, unsigned char ucColor, int bRender)
+{
+int i;
+unsigned char uc, ucOld;
+int iPitch, iSize;
+
+  iPitch = pOBD->width;
+  iSize = iPitch * (pOBD->height/8);
+
+  i = ((y >> 3) * iPitch) + x;
+  if (i < 0 || i > iSize-1) // off the screen
+    return -1;
+  obdSetPosition(pOBD, x, y>>3, bRender);
+
+  if (pOBD->ucScreen)
+    uc = ucOld = pOBD->ucScreen[i];
+  else
+     uc = ucOld = 0;
+
+  uc &= ~(0x1 << (y & 7));
+  if (ucColor)
+  {
+    uc |= (0x1 << (y & 7));
+  }
+  if (uc != ucOld) // pixel changed
+  {
+//    obdSetPosition(x, y>>3);
+    if (pOBD->ucScreen)
+    {
+      obdWriteDataBlock(pOBD, &uc, 1, bRender);
+      pOBD->ucScreen[i] = uc;
+    }
+  }
+  return 0;
+} /* obdSetPixel() */
+
+//
+// Invert font data
+//
+void InvertBytes(uint8_t *pData, uint8_t bLen)
+{
+uint8_t i;
+   for (i=0; i<bLen; i++)
+   {
+      *pData = ~(*pData);
+      pData++;
+   }
+} /* InvertBytes() */
+
+//
+// Load a 1-bpp Windows bitmap
+// Pass the pointer to the beginning of the BMP file
+// First pass version assumes a full screen bitmap
+//
+int obdLoadBMP(OBDISP *pOBD, uint8_t *pBMP, int dx, int dy, int bInvert)
+{
+int16_t i16, cx, cy;
+int iOffBits; // offset to bitmap data
+int iPitch, iDestPitch;
+uint8_t x, y, b = 0, *s, *d;
+uint8_t dst_mask, src_mask;
+uint8_t bFlipped = false;
+
+  iDestPitch = pOBD->width;
+  i16 = pgm_read_word(pBMP);
+  if (i16 != 0x4d42) // must start with 'BM'
+     return -1; // not a BMP file
+  cx = pgm_read_word(pBMP + 18);
+  if (cx + dx > pOBD->width) // must fit on the display
+     return -1;
+  cy = pgm_read_word(pBMP + 22);
+  if (cy < 0) cy = -cy;
+  else bFlipped = true;
+  if (cy + dy > pOBD->height) // must fit on the display
+     return -1;
+  i16 = pgm_read_word(pBMP + 28);
+  if (i16 != 1) // must be 1 bit per pixel
+     return -1;
+  iOffBits = pgm_read_word(pBMP + 10);
+  iPitch = (((cx+7)>>3) + 3) & 0xfffc; // must be DWORD aligned
+  if (bFlipped)
+  {
+    iOffBits += ((cy-1) * iPitch); // start from bottom
+    iPitch = -iPitch;
+  }
+
+  for (y=0; y<cy; y++)
+  {
+     dst_mask = 1 << ((y+dy) & 7);
+     if (pOBD->ucScreen)
+        d = &pOBD->ucScreen[(((y+dy)>>3)*iDestPitch)+dx];
+     else
+     {
+        d = u8Cache;
+        if ((y & 7) == 0)
+           memset(u8Cache, 0, sizeof(u8Cache));
+     }
+     s = &pBMP[iOffBits + (y*iPitch)];
+     src_mask = 0;
+     for (x=0; x<cx; x++)
+     {
+        if (src_mask == 0) // need to load the next byte
+        {
+           b = pgm_read_byte(s++);
+           src_mask = 0x80; // MSB on left
+        }
+        if (b & src_mask)
+        {
+           if (bInvert)
+              d[0] &= ~dst_mask;
+           else
+              d[0] |= dst_mask;
+        } else {
+            if (bInvert)
+               d[0] |= dst_mask;
+            else
+               d[0] &= ~dst_mask;
+        }
+        d++;
+        src_mask >>= 1;
+     } // for x
+     if (pOBD->ucScreen == NULL && ((y & 7) == 7 || y == cy-1)) // dump to LCD
+     {
+       obdSetPosition(pOBD, dx, (y+dy)>>3, 1);
+       obdWriteDataBlock(pOBD, u8Cache, cx, 1);
+     }
+  } // for y
+  return 0;
+} /* obdLoadBMP() */
+//
+// Set the current cursor position
+// The column represents the pixel column (0-127)
+// The row represents the text row (0-7)
+//
+void obdSetCursor(OBDISP *pOBD, int x, int y)
+{
+  pOBD->iCursorX = x;
+  pOBD->iCursorY = y;
+} /* obdSetCursor() */
+//
+// Turn text wrap on or off for the oldWriteString() function
+//
+void obdSetTextWrap(OBDISP *pOBD, int bWrap)
+{
+  pOBD->wrap = bWrap;
+} /* obdSetTextWrap() */
+//
+// Draw a string with a fractional scale in both dimensions
+// the scale is a 16-bit integer with and 8-bit fraction and 8-bit mantissa
+// To draw at 1x scale, set the scale factor to 256. To draw at 2x, use 512
+// The output must be drawn into a memory buffer, not directly to the display
+//
+int obdScaledString(OBDISP *pOBD, int x, int y, char *szMsg, int iSize, int bInvert, int iXScale, int iYScale, int iRotation)
+{
+uint32_t row, col, dx, dy;
+uint32_t sx, sy;
+uint8_t c, uc, color, *d;
+const uint8_t *s;
+uint8_t ucTemp[16];
+int tx, ty, bit, iFontOff;
+int iPitch;
+int iFontWidth;
+
+   if (iXScale == 0 || iYScale == 0 || szMsg == NULL || pOBD == NULL || pOBD->ucScreen == NULL || x < 0 || y < 0 || x >= pOBD->width-1 || y >= pOBD->height-1)
+      return -1; // invalid display structure
+   if (iSize != FONT_8x8 && iSize != FONT_6x8)
+      return -1; // only on the small fonts (for now)
+   iFontWidth = (iSize == FONT_6x8) ? 6:8;
+   s = (iSize == FONT_6x8) ? ucSmallFont : ucFont;
+   iPitch = pOBD->width;
+   dx = (iFontWidth * iXScale) >> 8; // width of each character
+   dy = (8 * iYScale) >> 8; // height of each character
+   sx = 65536 / iXScale; // turn the scale into an accumulator value
+   sy = 65536 / iYScale;
+   while (*szMsg) {
+      c = *szMsg++; // debug - start with normal font
+      iFontOff = (int)(c-32) * (iFontWidth-1);
+      // we can't directly use the pointer to FLASH memory, so copy to a local buffer
+      ucTemp[0] = 0; // first column is blank
+      memcpy_P(&ucTemp[1], &s[iFontOff], iFontWidth-1);
+      if (bInvert) InvertBytes(ucTemp, iFontWidth);
+      col = 0;
+      for (tx=0; tx<(int)dx; tx++) {
+         row = 0;
+         uc = ucTemp[col >> 8];
+         for (ty=0; ty<(int)dy; ty++) {
+            int nx=0, ny=0;
+            bit = row >> 8;
+            color = (uc & (1 << bit)); // set or clear the pixel
+            switch (iRotation) {
+               case ROT_0:
+                  nx = x + tx;
+                  ny = y + ty;
+                  break;
+               case ROT_90:
+                  nx = x - ty;
+                  ny = y + tx;
+                  break;
+               case ROT_180:
+                  nx = x - tx;
+                  ny = y - ty;
+                  break;
+               case ROT_270:
+                  nx = x + ty;
+                  ny = y - tx;
+                  break;
+            } // switch on rotation direction
+            // plot the pixel if it's within the image boundaries
+            if (nx >= 0 && ny >= 0 && nx < pOBD->width && ny < pOBD->height) {
+               d = &pOBD->ucScreen[(ny >> 3) * iPitch + nx];
+               if (color)
+                  d[0] |= (1 << (ny & 7));
+               else
+                  d[0] &= ~(1 << (ny & 7));
+            }
+            row += sy; // add fractional increment to source row of character
+         } // for ty
+         col += sx; // add fractional increment to source column
+      } // for tx
+      // update the 'cursor' position
+      switch (iRotation) {
+         case ROT_0:
+            x += dx;
+            break;
+         case ROT_90:
+            y += dx;
+            break;
+         case ROT_180:
+            x -= dx;
+            break;
+         case ROT_270:
+            y -= dx;
+            break;
+      } // switch on rotation
+   } // while (*szMsg)
+   return 0;
+} /* obdScaledString() */
+
+//
+// Draw a string of normal (8x8), small (6x8) or large (16x32) characters
+// At the given col+row
+//
+int obdWriteString(OBDISP *pOBD, int iScroll, int x, int y, char *szMsg, int iSize, int bInvert, int bRender)
+{
+int i, iFontOff, iLen, iFontSkip;
+unsigned char c, *s, ucTemp[40];
+
+    if (x == -1 || y == -1) // use the cursor position
+    {
+      x = pOBD->iCursorX; y = pOBD->iCursorY;
+    }
+    else
+    {
+      pOBD->iCursorX = x; pOBD->iCursorY = y; // set the new cursor position
+    }
+    if (pOBD->iCursorX >= pOBD->width || pOBD->iCursorY >= pOBD->height / 8)
+       return -1; // can't draw off the display
+
+    obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+    if (iSize == FONT_8x8) // 8x8 font
+    {
+       i = 0;
+       iFontSkip = iScroll & 7; // number of columns to initially skip
+       while (pOBD->iCursorX < pOBD->width && szMsg[i] != 0 && pOBD->iCursorY < pOBD->height / 8)
+       {
+         if (iScroll < 8) // only display visible characters
+         {
+             c = (unsigned char)szMsg[i];
+             iFontOff = (int)(c-32) * 7;
+             // we can't directly use the pointer to FLASH memory, so copy to a local buffer
+             ucTemp[0] = 0; // first column is blank
+             memcpy_P(&ucTemp[1], &ucFont[iFontOff], 7);
+             if (bInvert) InvertBytes(ucTemp, 8);
+             iLen = 8 - iFontSkip;
+             if (pOBD->iCursorX + iLen > pOBD->width) // clip right edge
+                 iLen = pOBD->width - pOBD->iCursorX;
+             obdCachedWrite(pOBD, &ucTemp[iFontSkip], iLen, bRender);
+//             obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+             pOBD->iCursorX += iLen;
+             if (pOBD->iCursorX >= pOBD->width-7 && pOBD->wrap) // word wrap enabled?
+             {
+               pOBD->iCursorX = 0; // start at the beginning of the next line
+               pOBD->iCursorY++;
+               obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+             }
+             iFontSkip = 0;
+         }
+         iScroll -= 8;
+         i++;
+       } // while
+       obdCachedFlush(pOBD, bRender); // write any remaining data
+       return 0;
+    } // 8x8
+#ifndef __AVR__
+    else if (iSize == FONT_16x32)
+    {
+      i = 0;
+      iFontSkip = iScroll & 15; // number of columns to initially skip
+      while (pOBD->iCursorX < pOBD->width && pOBD->iCursorY < (pOBD->height / 8)-3 && szMsg[i] != 0)
+      {
+          if (iScroll < 16) // if characters are visible
+          {
+              s = (unsigned char *)&ucBigFont[(unsigned char)(szMsg[i]-32)*64];
+              iLen = 16 - iFontSkip;
+              if (pOBD->iCursorX + iLen > pOBD->width) // clip right edge
+                  iLen = pOBD->width - pOBD->iCursorX;
+              // we can't directly use the pointer to FLASH memory, so copy to a local buffer
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+              memcpy_P(ucTemp, s, 16);
+              if (bInvert) InvertBytes(ucTemp, 16);
+              obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY+1, bRender);
+              memcpy_P(ucTemp, s+16, 16);
+              if (bInvert) InvertBytes(ucTemp, 16);
+              obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+//              if (pOBD->iCursorY <= 5)
+              {
+                 obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY+2, bRender);
+                 memcpy_P(ucTemp, s+32, 16);
+                 if (bInvert) InvertBytes(ucTemp, 16);
+                 obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+              }
+//              if (pOBD->iCursorY <= 4)
+              {
+                 obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY+3, bRender);
+                 memcpy_P(ucTemp, s+48, 16);
+                 if (bInvert) InvertBytes(ucTemp, 16);
+                 obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+              }
+              pOBD->iCursorX += iLen;
+              if (pOBD->iCursorX >= pOBD->width-15 && pOBD->wrap) // word wrap enabled?
+              {
+                pOBD->iCursorX = 0; // start at the beginning of the next line
+                pOBD->iCursorY+=4;
+              }
+              iFontSkip = 0;
+          } // if character visible from scrolling
+          iScroll -= 16;
+          i++;
+       } // while
+       return 0;
+    } // 16x32
+#endif // !__AVR__
+    else if (iSize == FONT_16x16) // 8x8 stretched to 16x16
+    {
+      i = 0;
+      iFontSkip = iScroll & 15; // number of columns to initially skip
+      while (pOBD->iCursorX < pOBD->width && pOBD->iCursorY < (pOBD->height/8)-1 && szMsg[i] != 0)
+      {
+// stretch the 'normal' font instead of using the big font
+          if (iScroll < 16) // if characters are visible
+          {
+              int tx, ty;
+              c = szMsg[i] - 32;
+              unsigned char uc1, uc2, ucMask, *pDest;
+              s = (unsigned char *)&ucFont[(int)c*7];
+              ucTemp[0] = 0; // first column is blank
+              memcpy_P(&ucTemp[1], s, 7);
+              if (bInvert)
+                  InvertBytes(ucTemp, 8);
+              // Stretch the font to double width + double height
+              memset(&ucTemp[8], 0, 32); // write 32 new bytes
+              for (tx=0; tx<8; tx++)
+              {
+                  ucMask = 3;
+                  pDest = &ucTemp[8+tx*2];
+                  uc1 = uc2 = 0;
+                  c = ucTemp[tx];
+                  for (ty=0; ty<4; ty++)
+                  {
+                      if (c & (1 << ty)) // a bit is set
+                          uc1 |= ucMask;
+                      if (c & (1 << (ty + 4)))
+                          uc2 |= ucMask;
+                      ucMask <<= 2;
+                  }
+                  pDest[0] = uc1;
+                  pDest[1] = uc1; // double width
+                  pDest[16] = uc2;
+                  pDest[17] = uc2;
+              }
+              iLen = 16 - iFontSkip;
+              if (pOBD->iCursorX + iLen > pOBD->width) // clip right edge
+                  iLen = pOBD->width - pOBD->iCursorX;
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+              obdWriteDataBlock(pOBD, &ucTemp[8+iFontSkip], iLen, bRender);
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY+1, bRender);
+              obdWriteDataBlock(pOBD, &ucTemp[24+iFontSkip], iLen, bRender);
+              pOBD->iCursorX += iLen;
+              if (pOBD->iCursorX >= pOBD->width-15 && pOBD->wrap) // word wrap enabled?
+              {
+                pOBD->iCursorX = 0; // start at the beginning of the next line
+                pOBD->iCursorY += 2;
+                obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+              }
+              iFontSkip = 0;
+          } // if characters are visible
+          iScroll -= 16;
+          i++;
+      } // while
+      return 0;
+    } // 16x16
+    else if (iSize == FONT_12x16) // 6x8 stretched to 12x16
+    {
+      i = 0;
+      iFontSkip = iScroll % 12; // number of columns to initially skip
+      while (pOBD->iCursorX < pOBD->width && pOBD->iCursorY < (pOBD->height/8)-1 && szMsg[i] != 0)
+      {
+// stretch the 'normal' font instead of using the big font
+          if (iScroll < 12) // if characters are visible
+          {
+              int tx, ty;
+              c = szMsg[i] - 32;
+              unsigned char uc1, uc2, ucMask, *pDest;
+              s = (unsigned char *)&ucSmallFont[(int)c*5];
+              ucTemp[0] = 0; // first column is blank
+              memcpy_P(&ucTemp[1], s, 6);
+              if (bInvert)
+                  InvertBytes(ucTemp, 6);
+              // Stretch the font to double width + double height
+              memset(&ucTemp[6], 0, 24); // write 24 new bytes
+              for (tx=0; tx<6; tx++)
+              {
+                  ucMask = 3;
+                  pDest = &ucTemp[6+tx*2];
+                  uc1 = uc2 = 0;
+                  c = ucTemp[tx];
+                  for (ty=0; ty<4; ty++)
+                  {
+                      if (c & (1 << ty)) // a bit is set
+                          uc1 |= ucMask;
+                      if (c & (1 << (ty + 4)))
+                          uc2 |= ucMask;
+                      ucMask <<= 2;
+                  }
+                  pDest[0] = uc1;
+                  pDest[1] = uc1; // double width
+                  pDest[12] = uc2;
+                  pDest[13] = uc2;
+              }
+              // smooth the diagonal lines
+              for (tx=0; tx<5; tx++)
+              {
+                  uint8_t c0, c1, ucMask2;
+                  c0 = ucTemp[tx];
+                  c1 = ucTemp[tx+1];
+                  pDest = &ucTemp[6+tx*2];
+                  ucMask = 1;
+                  ucMask2 = 2;
+                  for (ty=0; ty<7; ty++)
+                  {
+                      if (((c0 & ucMask) && !(c1 & ucMask) && !(c0 & ucMask2) && (c1 & ucMask2)) || (!(c0 & ucMask) && (c1 & ucMask) && (c0 & ucMask2) && !(c1 & ucMask2)))
+                      {
+                          if (ty < 3) // top half
+                          {
+                              if (bInvert) {
+                                pDest[1] &= ~(1 << ((ty * 2)+1));
+                                pDest[2] &= ~(1 << ((ty * 2)+1));
+                                pDest[1] &= ~(1 << ((ty+1) * 2));
+                                pDest[2] &= ~(1 << ((ty+1) * 2));
+                              } else {
+                                pDest[1] |= (1 << ((ty * 2)+1));
+                                pDest[2] |= (1 << ((ty * 2)+1));
+                                pDest[1] |= (1 << ((ty+1) * 2));
+                                pDest[2] |= (1 << ((ty+1) * 2));
+                              }
+                          }
+                          else if (ty == 3) // on the border
+                          {
+                              if (bInvert) {
+                                pDest[1] &= ~0x80; pDest[2] &= ~0x80;
+                                pDest[13] &= ~1; pDest[14] &= ~1;
+                              } else {
+                                pDest[1] |= 0x80; pDest[2] |= 0x80;
+                                pDest[13] |= 1; pDest[14] |= 1;
+                              }
+                          }
+                          else // bottom half
+                          {
+                              if (bInvert) {
+                                pDest[13] &= ~(1 << (2*(ty-4)+1));
+                                pDest[14] &= ~(1 << (2*(ty-4)+1));
+                                pDest[13] &= ~(1 << ((ty-3) * 2));
+                                pDest[14] &= ~(1 << ((ty-3) * 2));
+                              } else {
+                                pDest[13] |= (1 << (2*(ty-4)+1));
+                                pDest[14] |= (1 << (2*(ty-4)+1));
+                                pDest[13] |= (1 << ((ty-3) * 2));
+                                pDest[14] |= (1 << ((ty-3) * 2));
+                              }
+                          }
+                      }
+                      else if (!(c0 & ucMask) && (c1 & ucMask) && (c0 & ucMask2) && !(c1 & ucMask2))
+                      {
+                          if (ty < 4) // top half
+                          {
+                              if (bInvert) {
+                                pDest[1] &= ~(1 << ((ty * 2)+1));
+                                pDest[2] &= ~(1 << ((ty+1) * 2));
+                              } else {
+                                pDest[1] |= (1 << ((ty * 2)+1));
+                                pDest[2] |= (1 << ((ty+1) * 2));
+                              }
+                          }
+                          else
+                          {
+                              if (bInvert) {
+                                pDest[13] &= ~(1 << (2*(ty-4)+1));
+                                pDest[14] &= ~(1 << ((ty-3) * 2));
+                              } else {
+                                pDest[13] |= (1 << (2*(ty-4)+1));
+                                pDest[14] |= (1 << ((ty-3) * 2));
+                              }
+                          }
+                      }
+                      ucMask <<= 1; ucMask2 <<= 1;
+                  }
+              }
+              iLen = 12 - iFontSkip;
+              if (pOBD->iCursorX + iLen > pOBD->width) // clip right edge
+                  iLen = pOBD->width - pOBD->iCursorX;
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+              obdWriteDataBlock(pOBD, &ucTemp[6+iFontSkip], iLen, bRender);
+              obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY+1, bRender);
+              obdWriteDataBlock(pOBD, &ucTemp[18+iFontSkip], iLen, bRender);
+              pOBD->iCursorX += iLen;
+              if (pOBD->iCursorX >= pOBD->width-11 && pOBD->wrap) // word wrap enabled?
+              {
+                pOBD->iCursorX = 0; // start at the beginning of the next line
+                pOBD->iCursorY += 2;
+                obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+              }
+              iFontSkip = 0;
+          } // if characters are visible
+          iScroll -= 12;
+          i++;
+      } // while
+      return 0;
+    } // 12x16
+    else if (iSize == FONT_6x8)
+    {
+       i = 0;
+       iFontSkip = iScroll % 6;
+       while (pOBD->iCursorX < pOBD->width && pOBD->iCursorY < (pOBD->height/8) && szMsg[i] != 0)
+       {
+           if (iScroll < 6) // if characters are visible
+           {
+               c = szMsg[i] - 32;
+               // we can't directly use the pointer to FLASH memory, so copy to a local buffer
+               ucTemp[0] = 0; // first column is blank
+               memcpy_P(&ucTemp[1], &ucSmallFont[(int)c*5], 5);
+               if (bInvert) InvertBytes(ucTemp, 6);
+               iLen = 6 - iFontSkip;
+               if (pOBD->iCursorX + iLen > pOBD->width) // clip right edge
+                   iLen = pOBD->width - pOBD->iCursorX;
+               obdCachedWrite(pOBD, &ucTemp[iFontSkip], iLen, bRender);
+//               obdWriteDataBlock(pOBD, &ucTemp[iFontSkip], iLen, bRender); // write character pattern
+               pOBD->iCursorX += iLen;
+               iFontSkip = 0;
+               if (pOBD->iCursorX >= pOBD->width-5 && pOBD->wrap) // word wrap enabled?
+               {
+                 pOBD->iCursorX = 0; // start at the beginning of the next line
+                 pOBD->iCursorY++;
+                 obdSetPosition(pOBD, pOBD->iCursorX, pOBD->iCursorY, bRender);
+               }
+           } // if characters are visible
+         iScroll -= 6;
+         i++;
+       }
+      obdCachedFlush(pOBD, bRender); // write any remaining data
+      return 0;
+    } // 6x8
+  return -1; // invalid size
+} /* obdWriteString() */
+//
+// Get the width of text in a custom font
+//
+void obdGetStringBox(GFXfont *pFont, char *szMsg, int *width, int *top, int *bottom)
+{
+int cx = 0;
+int c, i = 0;
+GFXglyph *pGlyph;
+int miny, maxy;
+
+   if (width == NULL || top == NULL || bottom == NULL || pFont == NULL || szMsg == NULL) return; // bad pointers
+   miny = 100; maxy = 0;
+   while (szMsg[i]) {
+      c = szMsg[i++];
+      if (c < pFont->first || c > pFont->last) // undefined character
+         continue; // skip it
+      c -= pFont->first; // first char of font defined
+      pGlyph = &pFont->glyph[c];
+      cx += pGlyph->xAdvance;
+      if (pGlyph->yOffset < miny) miny = pGlyph->yOffset;
+      if (pGlyph->height+pGlyph->yOffset > maxy) maxy = pGlyph->height+pGlyph->yOffset;
+   }
+   *width = cx;
+   *top = miny;
+   *bottom = maxy;
+} /* obdGetStringBox() */
+
+//
+// Draw a string of characters in a custom font
+// A back buffer must be defined
+//
+int obdWriteStringCustom(OBDISP *pOBD, GFXfont *pFont, int x, int y, char *szMsg, uint8_t ucColor)
+{
+int i, end_y, dx, dy, tx, ty, c, iBitOff;
+uint8_t *s, *d, bits, ucMask, ucClr, uc;
+GFXfont font;
+GFXglyph glyph, *pGlyph;
+int iPitch;
+   
+   if (pOBD == NULL || pFont == NULL || pOBD->ucScreen == NULL || x < 0)
+      return -1;
+   iPitch = pOBD->width;
+   // in case of running on AVR, get copy of data from FLASH
+   memcpy_P(&font, pFont, sizeof(font));
+   pGlyph = &glyph;
+
+   i = 0;
+   while (szMsg[i] && x < pOBD->width)
+   {
+      c = szMsg[i++];
+      if (c < font.first || c > font.last) // undefined character
+         continue; // skip it
+      c -= font.first; // first char of font defined
+      memcpy_P(&glyph, &font.glyph[c], sizeof(glyph));
+      dx = x + pGlyph->xOffset; // offset from character UL to start drawing
+      dy = y + pGlyph->yOffset;
+      s = font.bitmap + pGlyph->bitmapOffset; // start of bitmap data
+      // Bitmap drawing loop. Image is MSB first and each pixel is packed next
+      // to the next (continuing on to the next character line)
+      iBitOff = 0; // bitmap offset (in bits)
+      bits = uc = 0; // bits left in this font byte
+      end_y = dy + pGlyph->height;
+      if (dy < 0) { // skip these lines
+          iBitOff += (pGlyph->width * (-dy));
+          dy = 0;
+      }
+      for (ty=dy; ty<end_y && ty < pOBD->height; ty++) {
+         ucMask = 1<<(ty & 7); // destination bit number for this line
+         ucClr = (ucColor) ? ucMask : 0;
+         d = &pOBD->ucScreen[(ty >> 3) * iPitch + dx]; // internal buffer dest
+         for (tx=0; tx<pGlyph->width; tx++) {
+            if (uc == 0) { // need to read more font data
+               tx += bits; // skip any remaining 0 bits
+               uc = pgm_read_byte(&s[iBitOff>>3]); // get more font bitmap data
+               bits = 8 - (iBitOff & 7); // we might not be on a byte boundary
+               iBitOff += bits; // because of a clipped line
+               uc <<= (8-bits);
+               if (tx >= pGlyph->width) {
+                  while(tx >= pGlyph->width) { // rolls into next line(s)
+                     tx -= pGlyph->width;
+                     ty++;
+                  }
+                  if (ty >= end_y || ty >= pOBD->height) { // we're past the end
+                     tx = pGlyph->width;
+                     continue; // exit this character cleanly
+                  }
+                  // need to recalculate mask and offset in case Y changed
+                  ucMask = 1<<(ty & 7); // destination bit number for this line
+                  ucClr = (ucColor) ? ucMask : 0;
+                  d = &pOBD->ucScreen[(ty >> 3) * iPitch + dx]; // internal buffer dest
+               }
+            } // if we ran out of bits
+            if (uc & 0x80) { // set pixel
+               if (ucClr)
+                  d[tx] |= ucMask;
+               else
+                  d[tx] &= ~ucMask;
+            }
+            bits--; // next bit
+            uc <<= 1;
+         } // for x
+      } // for y
+      x += pGlyph->xAdvance; // width of this character
+   } // while drawing characters
+   return 0;
+} /* obdWriteStringCustom() */
+
+//
+// Render a sprite/rectangle of pixels from a provided buffer to the display.
+// The row values refer to byte rows, not pixel rows due to the memory
+// layout of OLEDs and LCDs.
+// returns 0 for success, -1 for invalid parameter
+//
+int obdDrawGFX(OBDISP *pOBD, uint8_t *pBuffer, int iSrcCol, int iSrcRow, int iDestCol, int iDestRow, int iWidth, int iHeight, int iSrcPitch)
+{
+    int y;
+    
+    if (iSrcCol < 0 || iSrcCol >= pOBD->width || iSrcRow < 0 || iSrcRow > (pOBD->height/8)-1 || iDestCol < 0 || iDestCol >= pOBD->width || iDestRow < 0 || iDestRow >= (pOBD->height >> 3) || iSrcPitch <= 0)
+        return -1; // invalid
+    
+    for (y=iSrcRow; y<iSrcRow+iHeight; y++)
+    {
+        uint8_t *s = &pBuffer[(y * iSrcPitch)+iSrcCol];
+        obdSetPosition(pOBD, iDestCol, iDestRow, 1);
+        obdWriteDataBlock(pOBD, s, iWidth, 1);
+        pBuffer += iSrcPitch;
+        iDestRow++;
+    } // for y
+    return 0;
+} /* obdDrawGFX() */
+//
+// Fill the frame buffer with a byte pattern
+// e.g. all off (0x00) or all on (0xff)
+//
+void obdFill(OBDISP *pOBD, unsigned char ucData, int bRender)
+{
+uint8_t y;
+uint8_t iLines;
+
+  pOBD->iCursorX = pOBD->iCursorY = 0;
+  if (pOBD->type == LCD_VIRTUAL || pOBD->type >= SHARP_144x168) // pure memory, handle it differently
+  {
+     if (pOBD->ucScreen)
+        memset(pOBD->ucScreen, ucData, pOBD->width * (pOBD->height/8));
+     return;
+  }
+  iLines = pOBD->height >> 3;
+  memset(u8Cache, ucData, pOBD->width);
+ 
+  for (y=0; y<iLines; y++)
+  {
+    obdSetPosition(pOBD, 0,y, bRender); // set to (0,Y)
+    obdWriteDataBlock(pOBD, u8Cache, pOBD->width, bRender);
+  } // for y
+  if (pOBD->ucScreen)
+    memset(pOBD->ucScreen, ucData, (pOBD->width * pOBD->height)/8);
+} /* obdFill() */
+
+//
+// Provide or revoke a back buffer for your OLED graphics
+// This allows you to manage the RAM used by ss_oled on tiny
+// embedded platforms like the ATmega series
+// Pass NULL to revoke the buffer. Make sure you provide a buffer
+// large enough for your display (e.g. 128x64 needs 1K - 1024 bytes)
+//
+void obdSetBackBuffer(OBDISP *pOBD, uint8_t *pBuffer)
+{
+  pOBD->ucScreen = pBuffer;
+} /* obdSetBackBuffer() */
+
+void obdDrawLine(OBDISP *pOBD, int x1, int y1, int x2, int y2, uint8_t ucColor, int bRender)
+{
+  int temp;
+  int dx = x2 - x1;
+  int dy = y2 - y1;
+  int error;
+  uint8_t *p, *pStart, mask, bOld, bNew;
+  int xinc, yinc;
+  int y, x;
+  int iPitch = pOBD->width;
+
+  if (x1 < 0 || x2 < 0 || y1 < 0 || y2 < 0 || x1 >= pOBD->width || x2 >= pOBD->width || y1 >= pOBD->height || y2 >= pOBD->height)
+     return;
+
+  if(abs(dx) > abs(dy)) {
+    // X major case
+    if(x2 < x1) {
+      dx = -dx;
+      temp = x1;
+      x1 = x2;
+      x2 = temp;
+      temp = y1;
+      y1 = y2;
+      y2 = temp;
+    }
+
+    y = y1;
+    dy = (y2 - y1);
+    error = dx >> 1;
+    yinc = 1;
+    if (dy < 0)
+    {
+      dy = -dy;
+      yinc = -1;
+    }
+    p = pStart = &pOBD->ucScreen[x1 + ((y >> 3) * iPitch)]; // point to current spot in back buffer
+    mask = 1 << (y & 7); // current bit offset
+    for(x=x1; x1 <= x2; x1++) {
+      if (ucColor)
+        *p++ |= mask; // set pixel and increment x pointer
+      else
+        *p++ &= ~mask;
+      error -= dy;
+      if (error < 0)
+      {
+        error += dx;
+        if (yinc > 0)
+           mask <<= 1;
+        else
+           mask >>= 1;
+        if (mask == 0) // we've moved outside the current row, write the data we changed
+        {
+           obdSetPosition(pOBD, x, y>>3, bRender);
+           obdWriteDataBlock(pOBD, pStart,  (int)(p-pStart), bRender); // write the row we changed
+           x = x1+1; // we've already written the byte at x1
+           y1 = y+yinc;
+           p += (yinc > 0) ? iPitch : -iPitch;
+           pStart = p;
+           mask = 1 << (y1 & 7);
+        }
+        y += yinc;
+      }
+    } // for x1
+   if (p != pStart) // some data needs to be written
+   {
+     obdSetPosition(pOBD, x, y>>3, bRender);
+     obdWriteDataBlock(pOBD, pStart, (int)(p-pStart), bRender);
+   }
+  }
+  else {
+    // Y major case
+    if(y1 > y2) {
+      dy = -dy;
+      temp = x1;
+      x1 = x2;
+      x2 = temp;
+      temp = y1;
+      y1 = y2;
+      y2 = temp;
+    }
+
+    p = &pOBD->ucScreen[x1 + ((y1 >> 3) * iPitch)]; // point to current spot in back buffer
+    bOld = bNew = p[0]; // current data at that address
+    mask = 1 << (y1 & 7); // current bit offset
+    dx = (x2 - x1);
+    error = dy >> 1;
+    xinc = 1;
+    if (dx < 0)
+    {
+      dx = -dx;
+      xinc = -1;
+    }
+    for(x = x1; y1 <= y2; y1++) {
+      if (ucColor)
+        bNew |= mask; // set the pixel
+      else
+        bNew &= ~mask;
+      error -= dx;
+      mask <<= 1; // y1++
+      if (mask == 0) // we're done with this byte, write it if necessary
+      {
+        if (bOld != bNew)
+        {
+          p[0] = bNew; // save to RAM
+          obdSetPosition(pOBD, x, y1>>3, bRender);
+          obdWriteDataBlock(pOBD, &bNew, 1, bRender);
+        }
+        p += iPitch; // next line
+        bOld = bNew = p[0];
+        mask = 1; // start at LSB again
+      }
+      if (error < 0)
+      {
+        error += dy;
+        if (bOld != bNew) // write the last byte we modified if it changed
+        {
+          p[0] = bNew; // save to RAM
+          obdSetPosition(pOBD, x, y1>>3, bRender);
+          obdWriteDataBlock(pOBD, &bNew, 1, bRender);
+        }
+        p += xinc;
+        x += xinc;
+        bOld = bNew = p[0];
+      }
+    } // for y
+    if (bOld != bNew) // write the last byte we modified if it changed
+    {
+      p[0] = bNew; // save to RAM
+      obdSetPosition(pOBD, x, y2>>3, bRender);
+      obdWriteDataBlock(pOBD, &bNew, 1, bRender);
+    }
+  } // y major case
+} /* obdDrawLine() */
+
+//
+// For drawing ellipses, a circle is drawn and the x and y pixels are scaled by a 16-bit integer fraction
+// This function draws a single pixel and scales its position based on the x/y fraction of the ellipse
+//
+static void DrawScaledPixel(OBDISP *pOBD, int iCX, int iCY, int x, int y, int32_t iXFrac, int32_t iYFrac, uint8_t ucColor)
+{
+    uint8_t *d, ucMask;
+    int iPitch;
+
+    iPitch = pOBD->width;
+    if (iXFrac != 0x10000) x = ((x * iXFrac) >> 16);
+    if (iYFrac != 0x10000) y = ((y * iYFrac) >> 16);
+    x += iCX; y += iCY;
+    if (x < 0 || x >= pOBD->width || y < 0 || y >= pOBD->height)
+        return; // off the screen
+    d = &pOBD->ucScreen[((y >> 3)*iPitch) + x];
+    ucMask = 1 << (y & 7);
+    if (ucColor)
+        *d |= ucMask;
+    else
+        *d &= ~ucMask;
+} /* DrawScaledPixel() */
+//
+// For drawing filled ellipses
+//
+static void DrawScaledLine(OBDISP *pOBD, int iCX, int iCY, int x, int y, int32_t iXFrac, int32_t iYFrac, uint8_t ucColor)
+{
+    int iLen, x2;
+    uint8_t *d, ucMask;
+    int iPitch;
+
+    iPitch = pOBD->width;
+    if (iXFrac != 0x10000) x = ((x * iXFrac) >> 16);
+    if (iYFrac != 0x10000) y = ((y * iYFrac) >> 16);
+    iLen = x*2;
+    x = iCX - x; y += iCY;
+    x2 = x + iLen;
+    if (y < 0 || y >= pOBD->height)
+        return; // completely off the screen
+    if (x < 0) x = 0;
+    if (x2 >= pOBD->width) x2 = pOBD->width-1;
+    iLen = x2 - x + 1; // new length
+    d = &pOBD->ucScreen[((y >> 3)*iPitch) + x];
+    ucMask = 1 << (y & 7);
+    if (ucColor) // white
+    {
+        for (; iLen > 0; iLen--)
+            *d++ |= ucMask;
+    }
+    else // black
+    {
+        for (; iLen > 0; iLen--)
+            *d++ &= ~ucMask;
+    }
+} /* DrawScaledLine() */
+//
+// Draw the 8 pixels around the Bresenham circle
+// (scaled to make an ellipse)
+//
+static void BresenhamCircle(OBDISP *pOBD, int iCX, int iCY, int x, int y, int32_t iXFrac, int32_t iYFrac, uint8_t ucColor, uint8_t bFill)
+{
+    if (bFill) // draw a filled ellipse
+    {
+        // for a filled ellipse, draw 4 lines instead of 8 pixels
+        DrawScaledLine(pOBD, iCX, iCY, x, y, iXFrac, iYFrac, ucColor);
+        DrawScaledLine(pOBD, iCX, iCY, x, -y, iXFrac, iYFrac, ucColor);
+        DrawScaledLine(pOBD, iCX, iCY, y, x, iXFrac, iYFrac, ucColor);
+        DrawScaledLine(pOBD, iCX, iCY, y, -x, iXFrac, iYFrac, ucColor);
+    }
+    else // draw 8 pixels around the edges
+    {
+        DrawScaledPixel(pOBD, iCX, iCY, x, y, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, -x, y, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, x, -y, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, -x, -y, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, y, x, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, -y, x, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, y, -x, iXFrac, iYFrac, ucColor);
+        DrawScaledPixel(pOBD, iCX, iCY, -y, -x, iXFrac, iYFrac, ucColor);
+    }
+} /* BresenhamCircle() */
+
+//
+// Draw an outline or filled ellipse
+//
+void obdEllipse(OBDISP *pOBD, int iCenterX, int iCenterY, int32_t iRadiusX, int32_t iRadiusY, uint8_t ucColor, uint8_t bFilled)
+{
+    int32_t iXFrac, iYFrac;
+    int iRadius, iDelta, x, y;
+    
+    if (pOBD == NULL || pOBD->ucScreen == NULL)
+        return; // must have back buffer defined
+    if (iRadiusX <= 0 || iRadiusY <= 0) return; // invalid radii
+    
+    if (iRadiusX > iRadiusY) // use X as the primary radius
+    {
+        iRadius = iRadiusX;
+        iXFrac = 65536;
+        iYFrac = (iRadiusY * 65536) / iRadiusX;
+    }
+    else
+    {
+        iRadius = iRadiusY;
+        iXFrac = (iRadiusX * 65536) / iRadiusY;
+        iYFrac = 65536;
+    }
+    iDelta = 3 - (2 * iRadius);
+    x = 0; y = iRadius;
+    while (x <= y)
+    {
+        BresenhamCircle(pOBD, iCenterX, iCenterY, x, y, iXFrac, iYFrac, ucColor, bFilled);
+        x++;
+        if (iDelta < 0)
+        {
+            iDelta += (4*x) + 6;
+        }
+        else
+        {
+            iDelta += 4 * (x-y) + 10;
+            y--;
+        }
+    }
+} /* obdEllipse() */
+//
+// Draw an outline or filled rectangle
+//
+void obdRectangle(OBDISP *pOBD, int x1, int y1, int x2, int y2, uint8_t ucColor, uint8_t bFilled)
+{
+    uint8_t *d, ucMask, ucMask2;
+    int tmp, iOff;
+    int iPitch;
+
+    if (pOBD == NULL || pOBD->ucScreen == NULL)
+        return; // only works with a back buffer
+    if (x1 < 0 || y1 < 0 || x2 < 0 || y2 < 0 ||
+       x1 >= pOBD->width || y1 >= pOBD->height || x2 >= pOBD->width || y2 >= pOBD->height) return; // invalid coordinates
+    iPitch = pOBD->width;
+    // Make sure that X1/Y1 is above and to the left of X2/Y2
+    // swap coordinates as needed to make this true
+    if (x2 < x1)
+    {
+        tmp = x1;
+        x1 = x2;
+        x2 = tmp;
+    }
+    if (y2 < y1)
+    {
+        tmp = y1;
+        y1 = y2;
+        y2 = tmp;
+    }
+    if (bFilled)
+    {
+        int x, y, iMiddle;
+        iMiddle = (y2 >> 3) - (y1 >> 3);
+        ucMask = 0xff << (y1 & 7);
+        if (iMiddle == 0) // top and bottom lines are in the same row
+            ucMask &= (0xff >> (7-(y2 & 7)));
+        d = &pOBD->ucScreen[(y1 >> 3)*iPitch + x1];
+        // Draw top
+        for (x = x1; x <= x2; x++)
+        {
+            if (ucColor)
+                *d |= ucMask;
+            else
+                *d &= ~ucMask;
+            d++;
+        }
+        if (iMiddle > 1) // need to draw middle part
+        {
+            ucMask = (ucColor) ? 0xff : 0x00;
+            for (y=1; y<iMiddle; y++)
+            {
+                d = &pOBD->ucScreen[(y1 >> 3)*iPitch + x1 + (y*iPitch)];
+                for (x = x1; x <= x2; x++)
+                    *d++ = ucMask;
+            }
+        }
+        if (iMiddle >= 1) // need to draw bottom part
+        {
+            ucMask = 0xff >> (7-(y2 & 7));
+            d = &pOBD->ucScreen[(y2 >> 3)*iPitch + x1];
+            for (x = x1; x <= x2; x++)
+            {
+                if (ucColor)
+                    *d++ |= ucMask;
+                else
+                    *d++ &= ~ucMask;
+            }
+        }
+    }
+    else // outline
+    {
+      // see if top and bottom lines are within the same byte rows
+        d = &pOBD->ucScreen[(y1 >> 3)*iPitch + x1];
+        if ((y1 >> 3) == (y2 >> 3))
+        {
+            ucMask2 = 0xff << (y1 & 7);  // L/R end masks
+            ucMask = 1 << (y1 & 7);
+            ucMask |= 1 << (y2 & 7);
+            ucMask2 &= (0xff >> (7-(y2  & 7)));
+            if (ucColor)
+            {
+                *d++ |= ucMask2; // start
+                x1++;
+                for (; x1 < x2; x1++)
+                    *d++ |= ucMask;
+                if (x1 <= x2)
+                    *d++ |= ucMask2; // right edge
+            }
+            else
+            {
+                *d++ &= ~ucMask2;
+                x1++;
+                for (; x1 < x2; x1++)
+                    *d++ &= ~ucMask;
+                if (x1 <= x2)
+                    *d++ &= ~ucMask2; // right edge
+            }
+        }
+        else
+        {
+            int y;
+            // L/R sides
+            iOff = (x2 - x1);
+            ucMask = 1 << (y1 & 7);
+            for (y=y1; y <= y2; y++)
+            {
+                if (ucColor) {
+                    *d |= ucMask;
+                    d[iOff] |= ucMask;
+                } else {
+                    *d &= ~ucMask;
+                    d[iOff] &= ~ucMask;
+                }
+                ucMask <<= 1;
+                if  (ucMask == 0) {
+                    ucMask = 1;
+                    d += iPitch;
+                }
+            }
+            // T/B sides
+            ucMask = 1 << (y1 & 7);
+            ucMask2 = 1 << (y2 & 7);
+            x1++;
+            d = &pOBD->ucScreen[(y1 >> 3)*iPitch + x1];
+            iOff = (y2 >> 3) - (y1 >> 3);
+            iOff *= iPitch;
+            for (; x1 < x2; x1++)
+            {
+                if (ucColor) {
+                    *d |= ucMask;
+                    d[iOff] |= ucMask2;
+                } else {
+                    *d &= ~ucMask;
+                    d[iOff] &= ~ucMask2;
+                }
+                d++;
+            }
+        }
+    } // outline
+} /* obdRectangle() */
+//
+// Copy the current bitmap buffer from its native form (LSB_FIRST, VERTICAL_BYTES) to the requested form
+// returns 0 for success, -1 for error
+// Constants to be combined for the iFlags parameter:
+// Output format options -
+// OBD_LSB_FIRST     0x001
+// OBD_MSB_FIRST     0x002
+// OBD_VERT_BYTES    0x004
+// OBD_HORZ_BYTES    0x008
+// Orientation Options -
+// OBD_ROTATE_90     0x010
+// OBD_FLIP_VERT     0x020
+// OBD_FLIP_HORZ     0x040
+// Polarity Options -
+// OBD_INVERT        0x080
+int obdCopy(OBDISP *pOBD, int iFlags, uint8_t *pDestination)
+{
+int i, x, y, iPitch, iSize;
+int xStart, xEnd, yStart, yEnd, yDst, xDst, dx, dy;
+uint8_t ucSrcMask, ucDstMask, *s, *d;
+    
+    if (pDestination == NULL || pOBD == NULL || pOBD->ucScreen == NULL)
+        return -1;
+    // calculate output buffer size
+    iPitch = pOBD->width;
+    if (iFlags & OBD_HORZ_BYTES) {
+        if (iFlags & OBD_ROTATE_90)
+            iSize = ((pOBD->height + 7)>>3) * pOBD->width;
+        else
+            iSize = ((pOBD->width + 7)>>3) * pOBD->height;
+    } else {
+        if (iFlags & OBD_ROTATE_90)
+            iSize = (pOBD->height * ((pOBD->width+7)>>3));
+        else
+            iSize = (pOBD->width * ((pOBD->height+7)>>3));
+    }
+    memset(pDestination, 0, iSize); // start with 0 in dest
+    // Prepare vars for walking through the source image
+    if (iFlags & OBD_ROTATE_90) {
+        if (iFlags & OBD_FLIP_HORZ) {
+            dy = 1;
+            yStart = 0;
+            yEnd = pOBD->height;
+        } else {
+            dy = -1;
+            yStart = pOBD->height-1;
+            yEnd = -1;
+        }
+        if (iFlags & OBD_FLIP_VERT) {
+            dx = -1;
+            xStart = pOBD->width-1;
+            xEnd = -1;
+        } else {
+            dx = 1;
+            xStart = 0;
+            xEnd = pOBD->width;
+        }
+    } else { // not rotated
+        if (iFlags & OBD_FLIP_HORZ) {
+            dx = -1;
+            xStart = pOBD->width-1;
+            xEnd = -1;
+        } else {
+            dx = 1;
+            xStart = 0;
+            xEnd = pOBD->width;
+        }
+        if (iFlags & OBD_FLIP_VERT) {
+            dy = -1;
+            yStart = pOBD->height-1;
+            yEnd = -1;
+        } else {
+            dy = 1;
+            yStart = 0;
+            yEnd = pOBD->height;
+        }
+    }
+    // Due to the possible number of permutations, the different loops
+    // are more generic and handle flips/bit-direction with a more general
+    // approach which moves individual pixels even when a more efficient
+    // method is possible. More cycles, but able to do EVERYTHING
+// Separate output by byte orientation
+    // Vertical bytes here
+    if (iFlags & OBD_VERT_BYTES)
+    {
+        if (iFlags & OBD_ROTATE_90)
+        {
+            xDst = 0;
+            for (y=yStart; y!=yEnd; y += dy, xDst++) {
+                ucSrcMask = (1 << (y & 7));
+                yDst = 0;
+                s = &pOBD->ucScreen[(y >> 3) * iPitch];
+                d = &pDestination[xDst];
+                for (x=xStart; x!=xEnd; x += dx, yDst++) {
+                    if (s[x] & ucSrcMask) {// set pixel, copy to dest
+                        if (iFlags & OBD_LSB_FIRST)
+                            d[(yDst >> 3)*pOBD->height] |= (1 << (yDst & 7));
+                        else
+                            d[(yDst >> 3)*pOBD->height] |= (0x80 >> (yDst & 7));
+                    }
+                } // for x
+            } // for y
+        } // rotate 90
+        else // normally oriented
+        {
+            yDst = 0;
+            for (y=yStart; y!=yEnd; y += dy, yDst++) {
+                ucSrcMask = (1 << (y & 7));
+                if (iFlags & OBD_LSB_FIRST)
+                    ucDstMask = (1 << (y & 7));
+                else
+                    ucDstMask = (0x80 >> (y & 7));
+                xDst = 0;
+                s = &pOBD->ucScreen[(y >> 3) * iPitch];
+                d = &pDestination[(yDst >> 3) * iPitch];
+                for (x=xStart; x!=xEnd; x += dx, xDst++) {
+                    if (s[x] & ucSrcMask) // set pixel, copy to dest
+                        d[xDst] |= ucDstMask;
+                } // for x
+            } // for y
+        } // normal orientation
+    } // vertical bytes
+    else // Horizontal bytes here
+    {
+       if (iFlags & OBD_ROTATE_90)
+       {
+           int iDstPitch = (pOBD->height + 7)>>3; // dest bytes per line
+           xDst = 0;
+           for (y=yStart; y!=yEnd; y += dy, xDst++) {
+               ucSrcMask = (1 << (y & 7));
+               yDst = 0;
+               s = &pOBD->ucScreen[(y >> 3) * iPitch];
+               d = &pDestination[xDst >> 3];
+               ucDstMask = (iFlags & OBD_LSB_FIRST) ? (1 << (xDst & 7)) : (0x80 >> (xDst & 7));
+               for (x=xStart; x!=xEnd; x += dx, yDst++) {
+                   if (s[x] & ucSrcMask) // set pixel, copy to dest
+                       d[yDst * iDstPitch] |= ucDstMask;
+               } // for x
+           } // for y
+       } // rotate 90
+       else // normally oriented
+       {
+           int iDstPitch = (pOBD->width + 7)>>3; // dest bytes per line
+           yDst = 0;
+           for (y=yStart; y!=yEnd; y += dy, yDst++) {
+               ucSrcMask = (1 << (y & 7));
+               xDst = 0;
+               s = &pOBD->ucScreen[(y >> 3) * iPitch];
+               d = &pDestination[yDst * iDstPitch];
+               ucDstMask = (iFlags & OBD_LSB_FIRST) ? 0x1 : 0x80;
+               for (x=xStart; x!=xEnd; x += dx, xDst++) {
+                   if (s[x] & ucSrcMask) // set pixel, copy to dest
+                       d[(xDst>>3)] |= ucDstMask;
+                   if (iFlags & OBD_LSB_FIRST)
+                       ucDstMask <<= 1;
+                   else
+                       ucDstMask >>= 1;
+                   if (ucDstMask == 0)
+                       ucDstMask = (iFlags & OBD_LSB_FIRST) ? 0x1 : 0x80;
+               } // for x
+           } // for y
+       } // normal orientation
+   }
+    // Invert all pixels?
+    if (iFlags & OBD_INVERT) {
+        for (i=0; i<iSize; i++)
+        pDestination[i] = 255 - pDestination[i];
+    }
+    return 0;
+} /* obdCopy() */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/one_bit_display.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/one_bit_display.c
new file mode 100644
index 00000000..3e01c110
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/one_bit_display.c
@@ -0,0 +1,7 @@
+//
+// OneBitDisplay C wrapper
+//
+// prevent Arduino code from compiling
+#define _LINUX_
+#include "OneBitDisplay.cpp"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.c
new file mode 100644
index 00000000..b738f790
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.c
@@ -0,0 +1,120 @@
+#include "powermgt.h"
+
+#include "main.h"
+#include "drivers/drv_pm.h"
+#include "tl_common.h"
+#include <stdbool.h>
+#include <stdint.h>
+#include <stdio.h>
+#include <string.h>
+#include "zigbee.h"
+#include "eeprom.h"
+#include "board.h"
+#include "screen.h"
+#include "wdt.h"
+#include "syncedproto.h"
+#include "led.h"
+
+uint16_t dataReqAttemptArr[POWER_SAVING_SMOOTHING] = {0}; // Holds the amount of attempts required per data_req/check-in
+uint8_t dataReqAttemptArrayIndex = 0;
+uint8_t dataReqLastAttempt = 0;
+uint16_t nextCheckInFromAP = 0;
+RAM uint8_t wakeUpReason = WAKEUP_REASON_FIRSTBOOT;
+uint8_t scanAttempts = 0;
+
+int8_t temperature = 0;
+uint16_t batteryVoltage = 0;
+bool lowBattery = false;
+uint16_t longDataReqCounter = 0;
+uint16_t voltageCheckCounter = 0;
+
+uint8_t capabilities = 0;
+
+RAM uint64_t time_ms = 0;
+RAM uint32_t time_overflow = 0;
+
+uint32_t getMillis()
+{
+    return pm_get_32k_tick() / 32; //(float)32.768;
+}
+
+void initPowerSaving(const uint16_t initialValue)
+{
+    for (uint8_t c = 0; c < POWER_SAVING_SMOOTHING; c++)
+    {
+        dataReqAttemptArr[c] = initialValue;
+    }
+}
+
+void doSleepGpio(uint32_t t, GPIO_PinTypeDef pin)
+{
+    set_led_color(0); // Always turn of the LED before sleep for security reasons
+    printf("Sleeping for: %u ms\r\n", (unsigned int)t);
+    // WaitMs(2000);
+    //  return;
+    uint32_t r = drv_disable_irq();
+    pm_wakeup_pad_cfg(pin, !drv_gpio_read(pin), 1);
+    drv_pm_longSleep(PM_SLEEP_MODE_SUSPEND, PM_WAKEUP_SRC_TIMER | PM_WAKEUP_SRC_PAD, t);
+    pm_wakeup_pad_cfg(pin, !drv_gpio_read(pin), 0);
+    drv_restore_irq(r);
+    uart_ndma_clear_tx_index(); // UART will be garbled otherwise
+}
+
+void doSleep(uint32_t t)
+{
+    uint8_t randomizer = drv_u32Rand() & 0xff;
+    t += randomizer;
+    set_led_color(0); // Always turn of the LED before sleep for security reasons
+    printf("Sleeping for: %u ms\r\n", (unsigned int)t);
+    // WaitMs(2000);
+    //  return;
+    uint32_t r = drv_disable_irq();
+    pm_wakeup_pad_cfg(NFC_IRQ, PM_WAKEUP_LEVEL_LOW, 1);
+    drv_pm_longSleep(PM_SLEEP_MODE_SUSPEND, PM_WAKEUP_SRC_TIMER | PM_WAKEUP_SRC_PAD, t);
+    pm_wakeup_pad_cfg(NFC_IRQ, PM_WAKEUP_LEVEL_LOW, 0);
+    drv_restore_irq(r);
+    uart_ndma_clear_tx_index(); // UART will be garbled otherwise
+}
+
+uint32_t getNextScanSleep(const bool increment)
+{
+    if (increment)
+    {
+        if (scanAttempts < 255)
+            scanAttempts++;
+    }
+
+    if (scanAttempts < INTERVAL_1_ATTEMPTS)
+    {
+        return INTERVAL_1_TIME;
+    }
+    else if (scanAttempts < (INTERVAL_1_ATTEMPTS + INTERVAL_2_ATTEMPTS))
+    {
+        return INTERVAL_2_TIME;
+    }
+    else
+    {
+        return INTERVAL_3_TIME;
+    }
+}
+
+void addAverageValue()
+{
+    uint16_t curval = INTERVAL_AT_MAX_ATTEMPTS - INTERVAL_BASE;
+    curval *= dataReqLastAttempt;
+    curval /= DATA_REQ_MAX_ATTEMPTS;
+    curval += INTERVAL_BASE;
+    dataReqAttemptArr[dataReqAttemptArrayIndex % POWER_SAVING_SMOOTHING] = curval;
+    dataReqAttemptArrayIndex++;
+}
+
+uint16_t getNextSleep()
+{
+    uint16_t avg = 0;
+    for (uint8_t c = 0; c < POWER_SAVING_SMOOTHING; c++)
+    {
+        avg += dataReqAttemptArr[c];
+    }
+    avg /= POWER_SAVING_SMOOTHING;
+    return avg;
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.h
new file mode 100644
index 00000000..682d4807
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/powermgt.h
@@ -0,0 +1,74 @@
+#ifndef _POWERMGT_H_
+#define _POWERMGT_H_
+#include <stdint.h>
+#include <stdbool.h>
+#include "tl_common.h"
+
+#define WAKEUP_REASON_TIMED 0
+#define WAKEUP_REASON_GPIO 2
+#define WAKEUP_REASON_NFC 3
+#define WAKEUP_REASON_FIRSTBOOT 0xFC
+#define WAKEUP_REASON_NETWORK_SCAN 0xFD
+#define WAKEUP_REASON_WDT_RESET 0xFE
+
+#define DETECT_P1_0_NOTHING 0
+#define DETECT_P1_0_BUTTON 1
+#define DETECT_P1_0_JIG 2
+
+#define INIT_EPD_VOLTREADING 0x80
+#define INIT_RADIO 0x40
+#define INIT_I2C 0x20
+#define INIT_UART 0x10
+#define INIT_EPD 0x08
+#define INIT_EEPROM 0x04
+#define INIT_TEMPREADING 0x02
+#define INIT_BASE 0x01
+
+// power saving algorithm
+#define INTERVAL_BASE 40              // interval (in seconds) (when 1 packet is sent/received) for target current (7.2µA)
+#define INTERVAL_AT_MAX_ATTEMPTS 600  // interval (in seconds) (at max attempts) for target average current
+#define DATA_REQ_RX_WINDOW_SIZE 5UL   // How many milliseconds we should wait for a packet during the data_request.
+                                      // If the AP holds a long list of data for tags, it may need a little more time to lookup the mac address
+#define DATA_REQ_MAX_ATTEMPTS 14      // How many attempts (at most) we should do to get something back from the AP
+#define POWER_SAVING_SMOOTHING 8      // How many samples we should use to smooth the data request interval
+#define MINIMUM_INTERVAL 45           // IMPORTANT: Minimum interval for check-in; this determines overal battery life!
+#define MAXIMUM_PING_ATTEMPTS 20      // How many attempts to discover an AP the tag should do
+#define PING_REPLY_WINDOW 5UL
+
+#define LONG_DATAREQ_INTERVAL 300     // How often (in seconds, approximately) the tag should do a long datareq (including temperature)
+#define VOLTAGE_CHECK_INTERVAL 288    // How often the tag should do a battery voltage check (multiplied by LONG_DATAREQ_INTERVAL)
+#define BATTERY_VOLTAGE_MINIMUM 2450  // 2600 or below is the best we can do on the EPD
+
+// power saving when no AP's were found (scanning every X)
+#define VOLTAGEREADING_DURING_SCAN_INTERVAL 2  // how often we should read voltages; this is done every scan attempt in interval bracket 3
+#define INTERVAL_1_TIME 3600UL                 // Try every hour
+#define INTERVAL_1_ATTEMPTS 24                 // for 24 attempts (an entire day)
+#define INTERVAL_2_TIME 7200UL                 // Try every 2 hours
+#define INTERVAL_2_ATTEMPTS 12                 // for 12 attempts (an additional day)
+#define INTERVAL_3_TIME 86400UL                // Finally, try every day
+
+uint32_t getMillis();
+extern void initAfterWake();
+extern void doSleepGpio(uint32_t t, GPIO_PinTypeDef pin);
+extern void doSleep(uint32_t  t);
+
+extern void addAverageValue();
+extern uint16_t getNextSleep();
+
+extern uint32_t getNextScanSleep(const bool increment);
+extern void initPowerSaving(const uint16_t initialValue);
+
+extern uint8_t  wakeUpReason;
+
+extern uint8_t  capabilities;
+
+extern uint16_t  nextCheckInFromAP;
+extern uint8_t  dataReqLastAttempt;
+extern int8_t  temperature;
+extern uint16_t  batteryVoltage;
+extern bool  lowBattery;
+extern uint8_t  scanAttempts;
+extern uint16_t  longDataReqCounter;
+extern uint16_t  voltageCheckCounter;
+
+#endif
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/proto.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/proto.h
new file mode 100644
index 00000000..acbc7a95
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/proto.h
@@ -0,0 +1,227 @@
+#ifndef _PROTO_H_
+#define _PROTO_H_
+#include <stdint.h>
+
+#include "tag_types.h"
+
+// power saving algorithm
+#define INTERVAL_BASE 40              // interval (in seconds) (when 1 packet is sent/received) for target current (7.2µA)
+#define INTERVAL_AT_MAX_ATTEMPTS 600  // interval (in seconds) (at max attempts) for target average current
+#define DATA_REQ_RX_WINDOW_SIZE 5UL   // How many milliseconds we should wait for a packet during the data_request.
+                                      // If the AP holds a long list of data for tags, it may need a little more time to lookup the mac address
+#define DATA_REQ_MAX_ATTEMPTS 14      // How many attempts (at most) we should do to get something back from the AP
+#define POWER_SAVING_SMOOTHING 8      // How many samples we should use to smooth the data request interval
+#define MINIMUM_INTERVAL 45           // IMPORTANT: Minimum interval for check-in; this determines overal battery life!
+#define MAXIMUM_PING_ATTEMPTS 20      // How many attempts to discover an AP the tag should do
+
+#define LONG_DATAREQ_INTERVAL 300     // How often (in seconds, approximately) the tag should do a long datareq (including temperature)
+#define VOLTAGE_CHECK_INTERVAL 288    // How often the tag should do a battery voltage check (multiplied by LONG_DATAREQ_INTERVAL)
+#define BATTERY_VOLTAGE_MINIMUM 2450  // 2600 or below is the best we can do on the EPD
+
+// power saving when no AP's were found (scanning every X)
+#define VOLTAGEREADING_DURING_SCAN_INTERVAL 2  // how often we should read voltages; this is done every scan attempt in interval bracket 3
+#define INTERVAL_1_TIME 3600UL                 // Try every hour
+#define INTERVAL_1_ATTEMPTS 24                 // for 24 attempts (an entire day)
+#define INTERVAL_2_TIME 7200UL                 // Try every 2 hours
+#define INTERVAL_2_ATTEMPTS 12                 // for 12 attempts (an additional day)
+#define INTERVAL_3_TIME 86400UL                // Finally, try every day
+
+enum TagScreenType {
+    TagScreenEink_BW_1bpp,
+    TagScreenEink_BW_2bpp,
+    TagScreenEink_BW_4bpp,
+    TagScreenEink_BWY_only,  // 2bpp, but only 3 colors (BW?Y)
+    TagScreenEink_BWY_2bpp,
+    TagScreenEink_BWY_4bpp,
+    TagScreenEink_BWR_only,  // 2bpp, but only 3 colors (BW?R)
+    TagScreenEink_BWR_2bpp,
+    TagScreenEink_BWR_4bpp,
+
+    TagScreenEink_BWY_3bpp,
+    TagScreenEink_BWR_3bpp,
+    TagScreenEink_BW_3bpp,
+
+    TagScreenPersistentLcd_1bpp,
+
+    TagScreenEink_BWY_5colors,
+    TagScreenEink_BWR_5colors,
+
+    TagScreenEink_BWY_6colors,
+    TagScreenEink_BWR_6colors,
+
+    TagScreenTypeOther = 0x7f,
+};
+
+
+#define PROTO_PAN_ID (0x4447)  // PAN ID compression shall be used
+
+#define RADIO_MAX_PACKET_LEN (125)  // useful payload, not including the crc
+
+#define ADDR_MODE_NONE (0)
+#define ADDR_MODE_SHORT (2)
+#define ADDR_MODE_LONG (3)
+
+#define FRAME_TYPE_BEACON (0)
+#define FRAME_TYPE_DATA (1)
+#define FRAME_TYPE_ACK (2)
+#define FRAME_TYPE_MAC_CMD (3)
+
+#define SHORT_MAC_UNUSED (0x10000000UL)  // for radioRxFilterCfg's myShortMac
+
+struct MacFcs {
+    uint8_t frameType : 3;
+    uint8_t secure : 1;
+    uint8_t framePending : 1;
+    uint8_t ackReqd : 1;
+    uint8_t panIdCompressed : 1;
+    uint8_t rfu1 : 1;
+    uint8_t rfu2 : 2;
+    uint8_t destAddrType : 2;
+    uint8_t frameVer : 2;
+    uint8_t srcAddrType : 2;
+} ;
+
+struct MacFrameFromMaster {
+    struct MacFcs fcs;
+    uint8_t seq;
+    uint16_t pan;
+    uint8_t dst[8];
+    uint16_t from;
+} ;
+
+struct MacFrameNormal {
+    struct MacFcs fcs;
+    uint8_t seq;
+    uint16_t pan;
+    uint8_t dst[8];
+    uint8_t src[8];
+} ;
+
+struct MacFrameBcast {
+    struct MacFcs fcs;
+    uint8_t seq;
+    uint16_t dstPan;
+    uint16_t dstAddr;
+    uint16_t srcPan;
+    uint8_t src[8];
+} ;
+
+#define PKT_AVAIL_DATA_SHORTREQ 0xE3
+#define PKT_AVAIL_DATA_REQ 0xE5
+#define PKT_AVAIL_DATA_INFO 0xE6
+#define PKT_BLOCK_PARTIAL_REQUEST 0xE7
+#define PKT_BLOCK_REQUEST_ACK 0xE9
+#define PKT_BLOCK_REQUEST 0xE4
+#define PKT_BLOCK_PART 0xE8
+#define PKT_XFER_COMPLETE 0xEA
+#define PKT_XFER_COMPLETE_ACK 0xEB
+#define PKT_CANCEL_XFER 0xEC
+#define PKT_PING 0xED
+#define PKT_PONG 0xEE
+
+struct AvailDataReq {
+    uint8_t checksum;
+    uint8_t lastPacketLQI;
+    int8_t lastPacketRSSI;
+    int8_t temperature;
+    uint16_t batteryMv;
+    uint8_t hwType;
+    uint8_t wakeupReason;
+    uint8_t capabilities;
+    uint16_t tagSoftwareVersion;
+    uint8_t currentChannel;
+    uint8_t customMode;
+    uint8_t reserved[8];
+} ;
+
+struct oldAvailDataReq {
+    uint8_t checksum;
+    uint8_t lastPacketLQI;
+    int8_t lastPacketRSSI;
+    int8_t temperature;
+    uint16_t batteryMv;
+    uint8_t hwType;
+    uint8_t wakeupReason;
+    uint8_t capabilities;
+} ;
+
+struct AvailDataInfo {
+    uint8_t checksum;
+    uint64_t dataVer;  // MD5 of potential traffic
+    uint32_t dataSize;
+    uint8_t dataType;
+    uint8_t dataTypeArgument;  // extra specification or instruction for the tag (LUT to be used for drawing image)
+    uint16_t nextCheckIn;      // when should the tag check-in again? Measured in minutes
+} ;
+
+struct pendingData {
+    struct AvailDataInfo availdatainfo;
+    uint16_t attemptsLeft;
+    uint8_t targetMac[8];
+} ;
+
+struct blockPart {
+    uint8_t checksum;
+    uint8_t blockId;
+    uint8_t blockPart;
+    uint8_t data[];
+} ;
+
+struct blockData {
+    uint16_t size;
+    uint16_t checksum;
+    uint8_t data[];
+} ;
+
+struct burstMacData {
+    uint16_t offset;
+    uint8_t targetMac[8];
+} ;
+
+#define BLOCK_PART_DATA_SIZE 99
+#define BLOCK_MAX_PARTS 42
+#define BLOCK_DATA_SIZE 4096UL
+#define BLOCK_XFER_BUFFER_SIZE BLOCK_DATA_SIZE + sizeof(struct blockData)
+#define BLOCK_REQ_PARTS_BYTES 6
+
+struct blockRequest {
+    uint8_t checksum;
+    uint64_t ver;
+    uint8_t blockId;
+    uint8_t type;
+    uint8_t requestedParts[BLOCK_REQ_PARTS_BYTES];
+} ;
+
+struct blockRequestAck {
+    uint8_t checksum;
+    uint16_t pleaseWaitMs;
+} ;
+
+struct espBlockRequest {
+    uint8_t checksum;
+    uint64_t ver;
+    uint8_t blockId;
+    uint8_t src[8];
+} ;
+
+struct espXferComplete {
+    uint8_t checksum;
+    uint8_t src[8];
+} ;
+
+struct espAvailDataReq {
+    uint8_t checksum;
+    uint8_t src[8];
+    struct AvailDataReq adr;
+} ;
+
+struct espSetChannelPower {
+    uint8_t checksum;
+    uint8_t channel;
+    uint8_t power;
+} ;
+
+#define MACFMT "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x"
+#define MACCVT(x) ((const uint8_t*)(x))[7], ((const uint8_t*)(x))[6], ((const uint8_t*)(x))[5], ((const uint8_t*)(x))[4], ((const uint8_t*)(x))[3], ((const uint8_t*)(x))[2], ((const uint8_t*)(x))[1], ((const uint8_t*)(x))[0]
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/screen.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/screen.h
new file mode 100644
index 00000000..921b81c5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/screen.h
@@ -0,0 +1,24 @@
+#ifndef _SCREEN_H_
+#define _SCREEN_H_
+
+#include <stdbool.h>
+#include <stdint.h>
+
+#define SCREEN_WIDTH				184
+#define SCREEN_HEIGHT				384
+
+#define SCREEN_NUM_GREYS			5
+#define SCREEN_FIRST_GREY_IDX		0
+#define SCREEN_EXTRA_COLOR_INDEX	5		//set to negative if nonexistent
+#define SCREEN_TX_BPP				4		//in transit
+
+#define SCREEN_WIDTH_MM				29
+#define SCREEN_HEIGHT_MM			67
+
+#define SCREEN_BYTE_FILL			0x44	//white
+
+#define SCREEN_TYPE					TagScreenEink_BWR_6colors
+
+#define SCREEN_DATA_PASSES			2
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.c
new file mode 100644
index 00000000..6c9d62b9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.c
@@ -0,0 +1,941 @@
+
+#include "main.h"
+#include "zigbee.h"
+#include "proto.h"
+#include "syncedproto.h"
+#include "comms.h"
+#include "board.h"
+#include "powermgt.h"
+#include "eeprom.h"
+#include "drawing.h"
+#include "wdt.h"
+#include "tl_common.h"
+#include <stdint.h>
+// download-stuff
+RAM uint8_t blockXferBuffer[BLOCK_XFER_BUFFER_SIZE] = {0};
+RAM struct blockRequest curBlock = {0};     // used by the block-requester, contains the next request that we'll send
+RAM struct AvailDataInfo curDataInfo = {0}; // last 'AvailDataInfo' we received from the AP
+RAM bool requestPartialBlock = false;       // if we should ask the AP to get this block from the host or not
+#define BLOCK_TRANSFER_ATTEMPTS 5
+
+uint8_t prevImgSlot = 0xFF;
+uint8_t curImgSlot = 0xFF;
+RAM uint32_t curHighSlotId = 0;
+RAM uint8_t nextImgSlot = 0;
+RAM uint8_t imgSlots = 0;
+uint8_t drawWithLut = 0;
+
+// stuff we need to keep track of related to the network/AP
+uint8_t APmac[8] = {0};
+uint16_t APsrcPan = 0;
+RAM uint8_t mSelfMac[8] = {0};
+
+RAM uint8_t seq = 0;
+RAM uint8_t currentChannel = 0;
+
+// buffer we use to prepare/read packets
+static uint8_t inBuffer[128] = {0};
+static uint8_t outBuffer[128] = {0};
+
+// tools
+static uint8_t getPacketType(const void *buffer)
+{
+    const struct MacFcs *fcs = buffer;
+    if ((fcs->frameType == 1) && (fcs->destAddrType == 2) && (fcs->srcAddrType == 3) && (fcs->panIdCompressed == 0))
+    {
+        // broadcast frame
+        uint8_t type = ((uint8_t *)buffer)[sizeof(struct MacFrameBcast)];
+        return type;
+    }
+    else if ((fcs->frameType == 1) && (fcs->destAddrType == 3) && (fcs->srcAddrType == 3) && (fcs->panIdCompressed == 1))
+    {
+        // normal frame
+        uint8_t type = ((uint8_t *)buffer)[sizeof(struct MacFrameNormal)];
+        return type;
+    }
+    return 0;
+}
+static bool pktIsUnicast(const void *buffer)
+{
+    const struct MacFcs *fcs = buffer;
+    if ((fcs->frameType == 1) && (fcs->destAddrType == 2) && (fcs->srcAddrType == 3) && (fcs->panIdCompressed == 0))
+    {
+        return false;
+    }
+    else if ((fcs->frameType == 1) && (fcs->destAddrType == 3) && (fcs->srcAddrType == 3) && (fcs->panIdCompressed == 1))
+    {
+        // normal frame
+        return true;
+    }
+    // unknown type...
+    return false;
+}
+void dump(const uint8_t *a, const uint16_t l)
+{
+    printf("\n        ");
+#define ROWS 16
+    for (uint8_t c = 0; c < ROWS; c++)
+    {
+        printf(" %02X", c);
+    }
+    printf("\n--------");
+    for (uint8_t c = 0; c < ROWS; c++)
+    {
+        printf("---");
+    }
+    for (uint16_t c = 0; c < l; c++)
+    {
+        if ((c % ROWS) == 0)
+        {
+            printf("\n0x%04X | ", c);
+        }
+        printf("%02X ", a[c]);
+    }
+    printf("\n--------");
+    for (uint8_t c = 0; c < ROWS; c++)
+    {
+        printf("---");
+    }
+    printf("\r\n");
+}
+static bool checkCRC(const void *p, const uint8_t len)
+{
+    uint8_t total = 0;
+    for (uint8_t c = 1; c < len; c++)
+    {
+        total += ((uint8_t *)p)[c];
+    }
+    // printf("CRC: rx %d, calc %d\r\n", ((uint8_t *)p)[0], total);
+    return ((uint8_t *)p)[0] == total;
+}
+static void addCRC(void *p, const uint8_t len)
+{
+    uint8_t total = 0;
+    for (uint8_t c = 1; c < len; c++)
+    {
+        total += ((uint8_t *)p)[c];
+    }
+    ((uint8_t *)p)[0] = total;
+}
+
+// radio stuff
+static void sendPing()
+{
+    struct MacFrameBcast *txframe = (struct MacFrameBcast *)(outBuffer + 1);
+    memset(outBuffer, 0, sizeof(struct MacFrameBcast) + 2 + 4);
+    outBuffer[0] = sizeof(struct MacFrameBcast) + 1 + 2;
+    outBuffer[sizeof(struct MacFrameBcast) + 1] = PKT_PING;
+    memcpy(txframe->src, mSelfMac, 8);
+    txframe->fcs.frameType = 1;
+    txframe->fcs.ackReqd = 1;
+    txframe->fcs.destAddrType = 2;
+    txframe->fcs.srcAddrType = 3;
+    txframe->seq = seq++;
+    txframe->dstPan = PROTO_PAN_ID;
+    txframe->dstAddr = 0xFFFF;
+    txframe->srcPan = PROTO_PAN_ID;
+    commsTxNoCpy(outBuffer);
+}
+uint8_t detectAP(const uint8_t channel)
+{
+    radioRxEnable(false);
+    radioSetChannel(channel);
+    radioRxFlush();
+    radioRxEnable(true);
+    for (uint8_t c = 1; c <= MAXIMUM_PING_ATTEMPTS; c++)
+    {
+        sendPing();
+        uint32_t timeout = clock_time();
+        while (!clock_time_exceed(timeout, PING_REPLY_WINDOW * 1000))
+        {
+            int8_t ret = commsRxUnencrypted(inBuffer);
+            if (ret > 1)
+            {
+                // dump(inBuffer + sizeof(struct MacFrameNormal), 32);
+                if ((inBuffer[sizeof(struct MacFrameNormal) + 1] == channel) && (getPacketType(inBuffer) == PKT_PONG))
+                {
+                    if (pktIsUnicast(inBuffer))
+                    {
+                        struct MacFrameNormal *f = (struct MacFrameNormal *)inBuffer;
+                        memcpy(APmac, f->src, 8);
+                        APsrcPan = f->pan;
+                        return c;
+                    }
+                }
+            }
+            WaitMs(1);
+        }
+    }
+    return 0;
+}
+
+// data xfer stuff
+static void sendShortAvailDataReq()
+{
+    struct MacFrameBcast *txframe = (struct MacFrameBcast *)(outBuffer + 1);
+    outBuffer[0] = sizeof(struct MacFrameBcast) + 1 + 2;
+    outBuffer[sizeof(struct MacFrameBcast) + 1] = PKT_AVAIL_DATA_SHORTREQ;
+    memcpy(txframe->src, mSelfMac, 8);
+    outBuffer[1] = 0x21;
+    outBuffer[2] = 0xC8; // quickly set txframe fcs structure for broadcast packet
+    txframe->seq = seq++;
+    txframe->dstPan = PROTO_PAN_ID;
+    txframe->dstAddr = 0xFFFF;
+    txframe->srcPan = PROTO_PAN_ID;
+    commsTxNoCpy(outBuffer);
+}
+static void sendAvailDataReq()
+{
+    struct MacFrameBcast *txframe = (struct MacFrameBcast *)(outBuffer + 1);
+    memset(outBuffer, 0, sizeof(struct MacFrameBcast) + sizeof(struct AvailDataReq) + 2 + 4);
+    struct AvailDataReq *availreq = (struct AvailDataReq *)(outBuffer + 2 + sizeof(struct MacFrameBcast));
+    outBuffer[0] = sizeof(struct MacFrameBcast) + sizeof(struct AvailDataReq) + 2 + 2;
+    outBuffer[sizeof(struct MacFrameBcast) + 1] = PKT_AVAIL_DATA_REQ;
+    memcpy(txframe->src, mSelfMac, 8);
+    txframe->fcs.frameType = 1;
+    txframe->fcs.ackReqd = 1;
+    txframe->fcs.destAddrType = 2;
+    txframe->fcs.srcAddrType = 3;
+    txframe->seq = seq++;
+    txframe->dstPan = PROTO_PAN_ID;
+    txframe->dstAddr = 0xFFFF;
+    txframe->srcPan = PROTO_PAN_ID;
+    // TODO: send some (more) meaningful data
+    availreq->hwType = HW_TYPE;
+    availreq->wakeupReason = wakeUpReason;
+    availreq->lastPacketRSSI = mLastRSSI;
+    availreq->lastPacketLQI = mLastLqi;
+    availreq->temperature = temperature;
+    availreq->batteryMv = batteryVoltage;
+    availreq->capabilities = capabilities;
+    addCRC(availreq, sizeof(struct AvailDataReq));
+    commsTxNoCpy(outBuffer);
+}
+struct AvailDataInfo *getAvailDataInfo()
+{
+    radioRxEnable(true);
+    for (uint8_t c = 0; c < DATA_REQ_MAX_ATTEMPTS; c++)
+    {
+        sendAvailDataReq();
+        uint32_t timeout = clock_time();
+        while (!clock_time_exceed(timeout, DATA_REQ_RX_WINDOW_SIZE * 1000))
+        {
+            int8_t ret = commsRxUnencrypted(inBuffer);
+            if (ret > 1)
+            {
+                if (getPacketType(inBuffer) == PKT_AVAIL_DATA_INFO)
+                {
+                    if (checkCRC(inBuffer + sizeof(struct MacFrameNormal) + 1, sizeof(struct AvailDataInfo)))
+                    {
+                        struct MacFrameNormal *f = (struct MacFrameNormal *)inBuffer;
+                        memcpy(APmac, f->src, 8);
+                        APsrcPan = f->pan;
+                        dataReqLastAttempt = c;
+                        return (struct AvailDataInfo *)(inBuffer + sizeof(struct MacFrameNormal) + 1);
+                    }
+                }
+            }
+        }
+    }
+    dataReqLastAttempt = DATA_REQ_MAX_ATTEMPTS;
+    return NULL;
+}
+struct AvailDataInfo *getShortAvailDataInfo()
+{
+    radioRxEnable(true);
+    for (uint8_t c = 0; c < DATA_REQ_MAX_ATTEMPTS; c++)
+    {
+        sendShortAvailDataReq();
+        uint32_t timeout = clock_time();
+        while (!clock_time_exceed(timeout, DATA_REQ_RX_WINDOW_SIZE * 1000))
+        {
+            int8_t ret = commsRxUnencrypted(inBuffer);
+            if (ret > 1)
+            {
+                if (getPacketType(inBuffer) == PKT_AVAIL_DATA_INFO)
+                {
+                    if (checkCRC(inBuffer + sizeof(struct MacFrameNormal) + 1, sizeof(struct AvailDataInfo)))
+                    {
+                        struct MacFrameNormal *f = (struct MacFrameNormal *)inBuffer;
+                        memcpy(APmac, f->src, 8);
+                        APsrcPan = f->pan;
+                        dataReqLastAttempt = c;
+                        return (struct AvailDataInfo *)(inBuffer + sizeof(struct MacFrameNormal) + 1);
+                    }
+                }
+            }
+        }
+    }
+    dataReqLastAttempt = DATA_REQ_MAX_ATTEMPTS;
+    return NULL;
+}
+static bool processBlockPart(const struct blockPart *bp)
+{
+    uint16_t start = bp->blockPart * BLOCK_PART_DATA_SIZE;
+    uint16_t size = BLOCK_PART_DATA_SIZE;
+    // validate if it's okay to copy data
+    if (bp->blockId != curBlock.blockId)
+    {
+        // printf("got a packet for block %02X\r\n", bp->blockId);
+        return false;
+    }
+    if (start >= (sizeof(blockXferBuffer) - 1))
+        return false;
+    if (bp->blockPart > BLOCK_MAX_PARTS)
+        return false;
+    if ((start + size) > sizeof(blockXferBuffer))
+    {
+        size = sizeof(blockXferBuffer) - start;
+    }
+    if (checkCRC(bp, sizeof(struct blockPart) + BLOCK_PART_DATA_SIZE))
+    {
+        //  copy block data to buffer
+        memcpy((void *)(blockXferBuffer + start), (const void *)bp->data, size);
+        // we don't need this block anymore, set bit to 0 so we don't request it again
+        curBlock.requestedParts[bp->blockPart / 8] &= ~(1 << (bp->blockPart % 8));
+        return true;
+    }
+    else
+    {
+        printf("CRC Failed \r\n");
+        return false;
+    }
+}
+static bool blockRxLoop(const uint32_t timeout)
+{
+    bool success = false;
+    // radioRxEnable(true);
+    uint32_t t = clock_time();
+    while (!clock_time_exceed(t, 2000 * 1000))
+    {
+        int8_t ret = commsRxUnencrypted(inBuffer);
+        if (ret > 1)
+        {
+            printf("Len %d\r\n", ret);
+            if (getPacketType(inBuffer) == PKT_BLOCK_PART)
+            {
+                struct blockPart *bp = (struct blockPart *)(inBuffer + sizeof(struct MacFrameNormal) + 1);
+                success = processBlockPart(bp);
+            }
+        }
+    }
+    // radioRxEnable(false);
+    // radioRxFlush();
+    return success;
+}
+static struct blockRequestAck *continueToRX()
+{
+    struct blockRequestAck *ack = (struct blockRequestAck *)(inBuffer + sizeof(struct MacFrameNormal) + 1);
+    ack->pleaseWaitMs = 0;
+    return ack;
+}
+static void sendBlockRequest()
+{
+    memset(outBuffer, 0, sizeof(struct MacFrameNormal) + sizeof(struct blockRequest) + 2 + 2);
+    struct MacFrameNormal *f = (struct MacFrameNormal *)(outBuffer + 1);
+    struct blockRequest *blockreq = (struct blockRequest *)(outBuffer + 2 + sizeof(struct MacFrameNormal));
+    outBuffer[0] = sizeof(struct MacFrameNormal) + sizeof(struct blockRequest) + 2 + 2;
+    if (requestPartialBlock)
+    {
+        ;
+        outBuffer[sizeof(struct MacFrameNormal) + 1] = PKT_BLOCK_PARTIAL_REQUEST;
+    }
+    else
+    {
+        outBuffer[sizeof(struct MacFrameNormal) + 1] = PKT_BLOCK_REQUEST;
+    }
+    memcpy(f->src, mSelfMac, 8);
+    memcpy(f->dst, APmac, 8);
+    f->fcs.frameType = 1;
+    f->fcs.secure = 0;
+    f->fcs.framePending = 0;
+    f->fcs.ackReqd = 0;
+    f->fcs.panIdCompressed = 1;
+    f->fcs.destAddrType = 3;
+    f->fcs.frameVer = 0;
+    f->fcs.srcAddrType = 3;
+    f->seq = seq++;
+    f->pan = APsrcPan;
+    memcpy(blockreq, &curBlock, sizeof(struct blockRequest));
+    // printf("req ver: %02X%02X%02X%02X%02X%02X%02X%02X\r\n", ((uint8_t*)&blockreq->ver)[0],((uint8_t*)&blockreq->ver)[1],((uint8_t*)&blockreq->ver)[2],((uint8_t*)&blockreq->ver)[3],((uint8_t*)&blockreq->ver)[4],((uint8_t*)&blockreq->ver)[5],((uint8_t*)&blockreq->ver)[6],((uint8_t*)&blockreq->ver)[7]);
+    addCRC(blockreq, sizeof(struct blockRequest));
+    commsTxNoCpy(outBuffer);
+}
+static struct blockRequestAck *performBlockRequest()
+{
+    for (uint8_t c = 0; c < 30; c++)
+    {
+        sendBlockRequest();
+        uint32_t timeout = clock_time();
+        do
+        {
+            int8_t ret = commsRxUnencrypted(inBuffer);
+            if (ret > 1)
+            {
+                switch (getPacketType(inBuffer))
+                {
+                case PKT_BLOCK_REQUEST_ACK:
+                    if (checkCRC((inBuffer + sizeof(struct MacFrameNormal) + 1), sizeof(struct blockRequestAck)))
+                        return (struct blockRequestAck *)(inBuffer + sizeof(struct MacFrameNormal) + 1);
+                    break;
+                case PKT_BLOCK_PART:
+                    // block already started while we were waiting for a get block reply
+                    // printf("!");
+                    // processBlockPart((struct blockPart *)(inBuffer + sizeof(struct MacFrameNormal) + 1));
+                    return continueToRX();
+                    break;
+                case PKT_CANCEL_XFER:
+                    return NULL;
+                default:
+                    printf("pkt w/type %02X\r\n", getPacketType(inBuffer));
+                    break;
+                }
+            }
+
+        } while (!clock_time_exceed(timeout, 50 * 1000));
+    }
+    return continueToRX();
+    // return NULL;
+}
+static void sendXferCompletePacket()
+{
+    memset(outBuffer, 0, sizeof(struct MacFrameNormal) + 2 + 4);
+    struct MacFrameNormal *f = (struct MacFrameNormal *)(outBuffer + 1);
+    outBuffer[0] = sizeof(struct MacFrameNormal) + 2 + 2;
+    outBuffer[sizeof(struct MacFrameNormal) + 1] = PKT_XFER_COMPLETE;
+    memcpy(f->src, mSelfMac, 8);
+    memcpy(f->dst, APmac, 8);
+    f->fcs.frameType = 1;
+    f->fcs.secure = 0;
+    f->fcs.framePending = 0;
+    f->fcs.ackReqd = 0;
+    f->fcs.panIdCompressed = 1;
+    f->fcs.destAddrType = 3;
+    f->fcs.frameVer = 0;
+    f->fcs.srcAddrType = 3;
+    f->pan = APsrcPan;
+    f->seq = seq++;
+    commsTxNoCpy(outBuffer);
+}
+static void sendXferComplete()
+{
+    radioRxEnable(true);
+
+    for (uint8_t c = 0; c < 16; c++)
+    {
+        sendXferCompletePacket();
+        uint32_t timeout = clock_time();
+        while (!clock_time_exceed(timeout, 6 * 1000))
+        {
+            int8_t ret = commsRxUnencrypted(inBuffer);
+            if (ret > 1)
+            {
+                if (getPacketType(inBuffer) == PKT_XFER_COMPLETE_ACK)
+                {
+                    printf("XFC ACK\r\n");
+                    return;
+                }
+            }
+        }
+    }
+    printf("XFC NACK!\r\n");
+    return;
+}
+static bool validateBlockData()
+{
+    struct blockData *bd = (struct blockData *)blockXferBuffer;
+    printf("expected len = %04X, checksum=%04X\r\n", bd->size, bd->checksum);
+    if (bd->size > BLOCK_XFER_BUFFER_SIZE - sizeof(struct blockData))
+    {
+        printf("Impossible data size, we abort here\r\n");
+        return false;
+    }
+    uint16_t t = 0;
+    for (uint16_t c = 0; c < bd->size; c++)
+    {
+        t += bd->data[c];
+    }
+    printf("Checked len = %04X, checksum=%04X\r\n", bd->size, t);
+    return bd->checksum == t;
+}
+
+// EEprom related stuff
+static uint32_t getAddressForSlot(const uint8_t s)
+{
+    return EEPROM_IMG_START + (EEPROM_IMG_EACH * s);
+}
+static void getNumSlots()
+{
+    uint32_t eeSize = eepromGetSize();
+    uint16_t nSlots = eeSize / (EEPROM_IMG_EACH >> 8) >> 8;
+    if (eeSize < EEPROM_IMG_EACH || !nSlots)
+    {
+        printf("eeprom is too small\r\n");
+        while (1)
+            ;
+    }
+    else if (nSlots >> 8)
+    {
+        printf("eeprom is too big, some will be unused\r\n");
+        imgSlots = 254;
+    }
+    else
+        imgSlots = nSlots;
+}
+static uint8_t findSlot(const uint8_t *ver)
+{
+    return 0xFF; // remove me! This forces the tag to re-download each and every upload without checking if it's already in the eeprom somewhere
+    uint32_t markerValid = EEPROM_IMG_VALID;
+    for (uint8_t c = 0; c < imgSlots; c++)
+    {
+        struct EepromImageHeader *eih = (struct EepromImageHeader *)blockXferBuffer;
+        eepromRead(getAddressForSlot(c), eih, sizeof(struct EepromImageHeader));
+        if (!memcmp(&eih->validMarker, &markerValid, 4))
+        {
+            if (!memcmp(&eih->version, (void *)ver, 8))
+            {
+                return c;
+            }
+        }
+    }
+    return 0xFF;
+}
+static void eraseUpdateBlock()
+{
+    eepromErase(EEPROM_UPDATA_AREA_START, EEPROM_UPDATE_AREA_LEN);
+}
+static void eraseImageBlock(const uint8_t c)
+{
+    eepromErase(getAddressForSlot(c), EEPROM_IMG_EACH);
+}
+static void saveUpdateBlockData(uint8_t blockId)
+{
+    if (!eepromWrite(EEPROM_UPDATA_AREA_START + (blockId * BLOCK_DATA_SIZE), blockXferBuffer + sizeof(struct blockData), BLOCK_DATA_SIZE))
+        printf("EEPROM write failed\r\n");
+}
+static void saveImgBlockData(const uint8_t imgSlot, const uint8_t blockId)
+{
+    uint32_t length = EEPROM_IMG_EACH - (sizeof(struct EepromImageHeader) + (blockId * BLOCK_DATA_SIZE));
+    if (length > 4096)
+        length = 4096;
+
+    if (!eepromWrite(getAddressForSlot(imgSlot) + sizeof(struct EepromImageHeader) + (blockId * BLOCK_DATA_SIZE), blockXferBuffer + sizeof(struct blockData), length))
+        printf("EEPROM write failed\r\n");
+}
+void drawImageFromEeprom(const uint8_t imgSlot)
+{
+    drawImageAtAddress(getAddressForSlot(imgSlot), drawWithLut);
+    drawWithLut = 0; // default back to the regular ol' stock/OTP LUT
+}
+static uint32_t getHighSlotId()
+{
+    uint32_t temp = 0;
+    uint32_t markerValid = EEPROM_IMG_VALID;
+    for (uint8_t c = 0; c < imgSlots; c++)
+    {
+        struct EepromImageHeader *eih = (struct EepromImageHeader *)blockXferBuffer;
+        eepromRead(getAddressForSlot(c), eih, sizeof(struct EepromImageHeader));
+        if (!memcmp(&eih->validMarker, &markerValid, 4))
+        {
+            if (temp < eih->id)
+            {
+                temp = eih->id;
+                nextImgSlot = c;
+            }
+        }
+    }
+    printf("found high id=%d in slot %d\r\n", temp, nextImgSlot);
+    return temp;
+}
+
+static uint8_t partsThisBlock = 0;
+static uint8_t blockAttempts = 0; // these CAN be local to the function, but for some reason, they won't survive sleep?
+                                  // they get overwritten with  7F 32 44 20 00 00 00 00 11, I don't know why.
+
+static bool getDataBlock(const uint16_t blockSize)
+{
+    blockAttempts = BLOCK_TRANSFER_ATTEMPTS;
+    if (blockSize == BLOCK_DATA_SIZE)
+    {
+        partsThisBlock = BLOCK_MAX_PARTS;
+        memset(curBlock.requestedParts, 0xFF, BLOCK_REQ_PARTS_BYTES);
+    }
+    else
+    {
+        partsThisBlock = (sizeof(struct blockData) + blockSize) / BLOCK_PART_DATA_SIZE;
+        if ((sizeof(struct blockData) + blockSize) % BLOCK_PART_DATA_SIZE)
+            partsThisBlock++;
+        memset(curBlock.requestedParts, 0x00, BLOCK_REQ_PARTS_BYTES);
+        for (uint8_t c = 0; c < partsThisBlock; c++)
+        {
+            curBlock.requestedParts[c / 8] |= (1 << (c % 8));
+        }
+    }
+
+    requestPartialBlock = false; // this forces the AP to request the block data from the host
+
+    while (blockAttempts--)
+    {
+        wdt10s();
+#ifndef DEBUGBLOCKS
+        printf("REQ %d ", curBlock.blockId);
+#else
+        printf("REQ %d[", curBlock.blockId);
+        for (uint8_t c = 0; c < BLOCK_MAX_PARTS; c++)
+        {
+            if ((c != 0) && (c % 8 == 0))
+                printf("][");
+            if (curBlock.requestedParts[c / 8] & (1 << (c % 8)))
+            {
+                printf("R");
+            }
+            else
+            {
+                printf("_");
+            }
+        }
+        printf("]\r\n");
+#endif
+        struct blockRequestAck *ack = performBlockRequest();
+
+        if (ack == NULL)
+        {
+            printf("Cancelled request\r\n");
+            return false;
+        }
+        if (ack->pleaseWaitMs)
+        { // SLEEP - until the AP is ready with the data
+            WaitMs(ack->pleaseWaitMs - 10);
+        }
+        else
+        {
+            // immediately start with the reception of the block data
+        }
+        blockRxLoop(270); // BLOCK RX LOOP - receive a block, until the timeout has passed
+
+#ifdef DEBUGBLOCKS
+        printf("RX  %d[", curBlock.blockId);
+        for (uint8_t c = 0; c < BLOCK_MAX_PARTS; c++)
+        {
+            if ((c != 0) && (c % 8 == 0))
+                printf("][");
+            if (curBlock.requestedParts[c / 8] & (1 << (c % 8)))
+            {
+                printf(".");
+            }
+            else
+            {
+                printf("R");
+            }
+        }
+        printf("]\r\n");
+#endif
+        // check if we got all the parts we needed, e.g: has the block been completed?
+        bool blockComplete = true;
+        for (uint8_t c = 0; c < partsThisBlock; c++)
+        {
+            if (curBlock.requestedParts[c / 8] & (1 << (c % 8)))
+                blockComplete = false;
+        }
+
+        if (blockComplete)
+        {
+#ifndef DEBUGBLOCKS
+            printf("- COMPLETE\r\n");
+#endif
+            if (validateBlockData())
+            {
+                printf("- Validated\r\n");
+                // block download complete, validated
+                return true;
+            }
+            else
+            {
+                for (uint8_t c = 0; c < partsThisBlock; c++)
+                {
+                    curBlock.requestedParts[c / 8] |= (1 << (c % 8));
+                }
+                requestPartialBlock = false;
+                printf("blk failed validation!\r\n");
+            }
+        }
+        else
+        {
+#ifndef DEBUGBLOCKS
+            printf("- INCOMPLETE\r\n");
+#endif
+            // block incomplete, re-request a partial block
+            requestPartialBlock = true;
+        }
+    }
+    printf("failed getting block\r\n");
+    return false;
+}
+uint16_t dataRequestSize = 0;
+static bool downloadFWUpdate(const struct AvailDataInfo *avail)
+{
+    // check if we already started the transfer of this information & haven't completed it
+    if (!memcmp((const void *)&avail->dataVer, (const void *)&curDataInfo.dataVer, 8) && curDataInfo.dataSize)
+    {
+        // looks like we did. We'll carry on where we left off.
+    }
+    else
+    {
+        // start, or restart the transfer from 0. Copy data from the AvailDataInfo struct, and the struct intself. This forces a new transfer
+        curBlock.blockId = 0;
+        memcpy(&(curBlock.ver), &(avail->dataVer), 8);
+        curBlock.type = avail->dataType;
+        memcpy(&curDataInfo, (void *)avail, sizeof(struct AvailDataInfo));
+        eraseUpdateBlock();
+    }
+
+    while (curDataInfo.dataSize)
+    {
+        wdt10s();
+        if (curDataInfo.dataSize > BLOCK_DATA_SIZE)
+        {
+            // more than one block remaining
+            dataRequestSize = BLOCK_DATA_SIZE;
+        }
+        else
+        {
+            // only one block remains
+            dataRequestSize = curDataInfo.dataSize;
+        }
+        if (getDataBlock(dataRequestSize))
+        {
+            // succesfully downloaded datablock, save to eeprom
+            saveUpdateBlockData(curBlock.blockId);
+            curBlock.blockId++;
+            curDataInfo.dataSize -= dataRequestSize;
+        }
+        else
+        {
+            // failed to get the block we wanted, we'll stop for now, maybe resume later
+            return false;
+        }
+    }
+    // no more data, download complete
+    return true;
+}
+
+uint16_t imageSize = 0;
+static bool downloadImageDataToEEPROM(const struct AvailDataInfo *avail)
+{
+    // check if we already started the transfer of this information & haven't completed it
+    if (!memcmp((const void *)&avail->dataVer, (const void *)&curDataInfo.dataVer, 8) && curDataInfo.dataSize)
+    {
+        // looks like we did. We'll carry on where we left off.
+        printf("restarting image download");
+        curImgSlot = nextImgSlot;
+    }
+    else
+    {
+        // go to the next image slot
+        nextImgSlot++;
+        if (nextImgSlot >= imgSlots)
+            nextImgSlot = 0;
+        curImgSlot = nextImgSlot;
+        printf("Saving to image slot %d\r\n", curImgSlot);
+        drawWithLut = avail->dataTypeArgument;
+        uint8_t attempt = 5;
+        while (attempt--)
+        {
+            if (eepromErase(getAddressForSlot(curImgSlot), EEPROM_IMG_EACH))
+                goto eraseSuccess;
+        }
+        // eepromFail:
+        doSleep(-1);
+    eraseSuccess:
+        printf("new download, writing to slot %d\r\n", curImgSlot);
+
+        // start, or restart the transfer. Copy data from the AvailDataInfo struct, and the struct intself. This forces a new transfer
+        curBlock.blockId = 0;
+        memcpy(&(curBlock.ver), &(avail->dataVer), 8);
+        curBlock.type = avail->dataType;
+        memcpy(&curDataInfo, (void *)avail, sizeof(struct AvailDataInfo));
+        imageSize = curDataInfo.dataSize;
+    }
+
+    while (curDataInfo.dataSize)
+    {
+        wdt10s();
+        if (curDataInfo.dataSize > BLOCK_DATA_SIZE)
+        {
+            // more than one block remaining
+            dataRequestSize = BLOCK_DATA_SIZE;
+        }
+        else
+        {
+            // only one block remains
+            dataRequestSize = curDataInfo.dataSize;
+        }
+        if (getDataBlock(dataRequestSize))
+        {
+            // succesfully downloaded datablock, save to eeprom
+            printf("Saving block %d to slot %d\r\n", curBlock.blockId, curImgSlot);
+            saveImgBlockData(curImgSlot, curBlock.blockId);
+            curBlock.blockId++;
+            curDataInfo.dataSize -= dataRequestSize;
+        }
+        else
+        {
+            // failed to get the block we wanted, we'll stop for now, probably resume later
+            return false;
+        }
+    }
+    // no more data, download complete
+
+    // borrow the blockXferBuffer temporarily
+    struct EepromImageHeader *eih = (struct EepromImageHeader *)blockXferBuffer;
+    memcpy(&eih->version, &curDataInfo.dataVer, 8);
+    eih->validMarker = EEPROM_IMG_VALID;
+    eih->id = ++curHighSlotId;
+    eih->size = imageSize;
+    eih->dataType = curDataInfo.dataType;
+
+#ifdef DEBUGBLOCKS
+    printf("Now writing datatype 0x%02X to slot %d\r\n", curDataInfo.dataType, curImgSlot);
+#endif
+    eepromWrite(getAddressForSlot(curImgSlot), eih, sizeof(struct EepromImageHeader));
+
+    return true;
+}
+
+bool processAvailDataInfo(struct AvailDataInfo *avail)
+{
+    printf("dataType: %d\r\n", avail->dataType);
+    switch (avail->dataType)
+    {
+    case DATATYPE_IMG_BMP:
+    case DATATYPE_IMG_DIFF:
+        break;
+    case DATATYPE_IMG_RAW_1BPP:
+    case DATATYPE_IMG_RAW_2BPP:
+        printf("RAW_BPP\r\n");
+        // check if this download is currently displayed or active
+        if (curDataInfo.dataSize == 0 && !memcmp((const void *)&avail->dataVer, (const void *)&curDataInfo.dataVer, 8))
+        {
+            // we've downloaded this already, we're guessing it's already displayed
+            printf("currently shown image, send xfc\r\n");
+            sendXferComplete();
+            return true;
+        }
+
+        // check if we've seen this version before
+        curImgSlot = findSlot((uint8_t *)&(avail->dataVer));
+        if (curImgSlot != 0xFF)
+        {
+            // found a (complete)valid image slot for this version
+            sendXferComplete();
+
+            printf("already seen, drawing from eeprom slot %d\r\n", curImgSlot);
+
+            // mark as completed and draw from EEPROM
+            memcpy(&curDataInfo, (void *)avail, sizeof(struct AvailDataInfo));
+            curDataInfo.dataSize = 0; // mark as transfer not pending
+
+            drawWithLut = avail->dataTypeArgument;
+            wdt60s();
+            drawImageFromEeprom(curImgSlot);
+            return true;
+        }
+        else
+        {
+            // not found in cache, prepare to download
+            printf("downloading to imgslot\r\n");
+            drawWithLut = avail->dataTypeArgument;
+            if (downloadImageDataToEEPROM(avail))
+            {
+                printf("download complete!\r\n");
+                sendXferComplete();
+
+                wdt60s();
+                drawImageFromEeprom(curImgSlot);
+                return true;
+            }
+            else
+            {
+                return false;
+            }
+        }
+        break;
+    case DATATYPE_FW_UPDATE:
+        if (downloadFWUpdate(avail))
+        {
+            sendXferComplete();
+            printf("firmware download complete, doing update.\r\n");
+            write_ota_firmware_to_flash();
+            // test_firmware_writing();
+        }
+        else
+        {
+            return false;
+        }
+        break;
+    case DATATYPE_NFC_URL_DIRECT:
+    case DATATYPE_NFC_RAW_CONTENT:
+        break;
+    case DATATYPE_CUSTOM_LUT_OTA:
+        break;
+        return true;
+    }
+    return true;
+}
+
+RAM uint32_t address = 0;
+RAM uint8_t ramd_to_flash_temp_buffer[PAGE_SIZE];
+void test_firmware_writing()
+{
+    irq_disable();
+    address = 0;
+    while (address < EEPROM_UPDATE_AREA_LEN)
+    {
+        // flash_erase_sector(address);
+        printf("Erasing sector: %X\r\n", address);
+        address += 0x1000;
+    }
+    address = 0;
+    while (address < EEPROM_UPDATE_AREA_LEN)
+    {
+        flash_read_page(EEPROM_UPDATA_AREA_START + address, PAGE_SIZE, ramd_to_flash_temp_buffer);
+        printf("Writing page: %X First 10 bytes: %02X %02X %02X %02X %02X %02X %02X %02X %02X %02X\r\n", address, ramd_to_flash_temp_buffer[0], ramd_to_flash_temp_buffer[1], ramd_to_flash_temp_buffer[2], ramd_to_flash_temp_buffer[3], ramd_to_flash_temp_buffer[4], ramd_to_flash_temp_buffer[5], ramd_to_flash_temp_buffer[6], ramd_to_flash_temp_buffer[7], ramd_to_flash_temp_buffer[8], ramd_to_flash_temp_buffer[9]);
+        // flash_write_page(address, PAGE_SIZE, ramd_to_flash_temp_buffer);
+        address += PAGE_SIZE;
+    }
+    analog_write(SYS_DEEP_ANA_REG, analog_read(SYS_DEEP_ANA_REG) & (~SYS_NEED_REINIT_EXT32K));
+    REG_ADDR8(0x6f) = 0x20;
+    printf("Now i will reset myself\r\n");
+    while (1)
+    {
+    }
+}
+
+ _attribute_ram_code_  void write_ota_firmware_to_flash(void)
+{
+    irq_disable();
+    address = 0;
+    while (address < EEPROM_UPDATE_AREA_LEN)
+    {
+        flash_mspi_write_ram(FLASH_SECT_ERASE_CMD, address, 1, NULL, 0);
+        address += 0x1000;
+    }
+    address = 0;
+    while (address < EEPROM_UPDATE_AREA_LEN)
+    {
+        flash_mspi_read_ram(FLASH_READ_CMD, EEPROM_UPDATA_AREA_START + address, 1, 0, ramd_to_flash_temp_buffer, PAGE_SIZE);
+        flash_mspi_write_ram(FLASH_WRITE_CMD, address, 1, ramd_to_flash_temp_buffer, PAGE_SIZE);
+        address += PAGE_SIZE;
+    }
+    analog_write(SYS_DEEP_ANA_REG, analog_read(SYS_DEEP_ANA_REG) & (~SYS_NEED_REINIT_EXT32K));
+    REG_ADDR8(0x6f) = 0x20;
+    while (1)
+    {
+    }
+}
+
+void initializeProto()
+{
+    getNumSlots();
+    curHighSlotId = getHighSlotId();
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.h
new file mode 100644
index 00000000..ee29a5bd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/syncedproto.h
@@ -0,0 +1,21 @@
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+
+extern uint8_t mSelfMac[];
+extern uint8_t currentChannel;
+extern uint8_t APmac[];
+
+extern uint8_t curImgSlot;
+
+extern void setupRadio(void);
+extern void killRadio(void);
+
+extern struct AvailDataInfo *getAvailDataInfo();
+extern struct AvailDataInfo *getShortAvailDataInfo();
+extern void drawImageFromEeprom(const uint8_t imgSlot);
+extern bool processAvailDataInfo(struct AvailDataInfo *avail);
+extern void initializeProto();
+extern uint8_t detectAP(const uint8_t channel);
+void write_ota_firmware_to_flash(void);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/tag_types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/tag_types.h
new file mode 100644
index 00000000..5c19575d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/tag_types.h
@@ -0,0 +1,42 @@
+#define SOLUM_154_SSD1619 0
+#define SOLUM_29_SSD1619 0x01
+#define SOLUM_29_SSD1619_HIGH_RES 0x03
+#define SOLUM_29_UC8151 0x11
+#define SOLUM_42_SSD1619 0x02
+#define SOLUM_SEG_UK 0xF0
+#define SOLUM_SEG_EU 0xF1
+#define SOLUM_NODISPLAY 0xFF
+
+#define CAPABILITY_SUPPORTS_COMPRESSION 0x02
+#define CAPABILITY_SUPPORTS_CUSTOM_LUTS 0x04
+#define CAPABILITY_ALT_LUT_SIZE 0x08
+#define CAPABILITY_HAS_EXT_POWER 0x10
+#define CAPABILITY_HAS_WAKE_BUTTON 0x20
+#define CAPABILITY_HAS_NFC 0x40
+#define CAPABILITY_NFC_WAKE 0x80
+
+#define DATATYPE_NOUPDATE 0
+#define DATATYPE_IMG_BMP 2
+#define DATATYPE_FW_UPDATE 3
+#define DATATYPE_IMG_DIFF 0x10             // always 1BPP
+#define DATATYPE_IMG_RAW_1BPP 0x20         // 2888 bytes for 1.54"  / 4736 2.9" / 15000 4.2"
+#define DATATYPE_IMG_RAW_2BPP 0x21         // 5776 bytes for 1.54"  / 9472 2.9" / 30000 4.2"
+#define DATATYPE_IMG_RAW_1BPP_DIRECT 0x3F  // only for 1.54", don't write to EEPROM, but straightaway to the EPD
+#define DATATYPE_UK_SEGMENTED 0x51         // Segmented data for the UK Segmented display type (contained in availableData Reply)
+#define DATATYPE_EU_SEGMENTED 0x52         // Segmented data for the EU/DE Segmented display type (contained in availableData Reply)
+#define DATATYPE_NFC_RAW_CONTENT 0xA0      // raw memory content for the NT3H1101
+#define DATATYPE_NFC_URL_DIRECT 0xA1       // URL format for NT3H1101
+#define DATATYPE_TAG_CONFIG_DATA 0xA8      // Config data for tag
+#define DATATYPE_COMMAND_DATA 0xAF         // Command for the tag to execute  (contained in availableData Reply)
+#define DATATYPE_CUSTOM_LUT_OTA 0xB0       // Custom OTA updated LUT
+
+#define CMD_DO_REBOOT 0
+#define CMD_DO_SCAN 1
+#define CMD_DO_RESET_SETTINGS 2
+
+#define WAKEUP_REASON_TIMED 0
+#define WAKEUP_REASON_GPIO 2
+#define WAKEUP_REASON_NFC 3
+#define WAKEUP_REASON_FIRSTBOOT 0xFC
+#define WAKEUP_REASON_NETWORK_SCAN 0xFD
+#define WAKEUP_REASON_WDT_RESET 0xFE
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.c
new file mode 100644
index 00000000..7674561e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.c
@@ -0,0 +1,44 @@
+#include <stdint.h>
+#include "tl_common.h"
+#include "uart.h"
+#include "main.h"
+
+#define RXD 		GPIO_PA0
+#define TXD			GPIO_PB1
+
+void init_uart(void)
+{
+	gpio_set_func(TXD, AS_GPIO);
+	gpio_set_output_en(TXD, 1);
+	gpio_write(TXD, 0);
+	gpio_set_func(RXD, AS_GPIO);
+	gpio_set_input_en(RXD, 1);
+	gpio_set_output_en(RXD, 0);
+
+	uart_gpio_set(UART_TX_PB1, UART_RX_PA0);
+	uart_reset();
+	uart_init(12, 15, PARITY_NONE, STOP_BIT_ONE); // baud rate: 115200
+	uart_dma_enable(0, 0);
+	dma_chn_irq_enable(0, 0);
+	uart_irq_enable(0, 0);
+	uart_ndma_irq_triglevel(0, 0);
+}
+
+ void puts(const char *str)
+{
+	while (*str != '\0')
+	{
+		putchar_custom((char)*str);
+		str++;
+	}
+}
+
+int putchar_custom(int c)
+{
+	uart_ndma_send_byte((char)c);
+	while (uart_tx_is_busy())
+	{
+		sleep_us(10);
+	};
+	return 0;
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.h
new file mode 100644
index 00000000..9ccfd4c4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/uart.h
@@ -0,0 +1,4 @@
+#pragma once
+
+void init_uart(void);
+int putchar_custom(int c);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/version_cfg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/version_cfg.h
new file mode 100644
index 00000000..3b5d3419
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/version_cfg.h
@@ -0,0 +1,55 @@
+/********************************************************************************************************
+ * @file    version_cfg.h
+ *
+ * @brief   This is the header file for version_cfg
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "comm_cfg.h"
+
+#if defined(MCU_CORE_826x)
+	#if (CHIP_8269)
+		#define CHIP_TYPE					TLSR_8269
+	#else
+		#define CHIP_TYPE					TLSR_8267
+	#endif
+#elif defined(MCU_CORE_8258)
+		#define CHIP_TYPE					TLSR_8258_512K//TLSR_8258_1M
+#elif defined(MCU_CORE_8278)
+		#define CHIP_TYPE					TLSR_8278
+#elif defined(MCU_CORE_B91)
+		#define CHIP_TYPE					TLSR_B91
+#endif
+
+/*********************************************************************************************
+ * During OTA upgrade, the upgraded device will check the rules of the following three fields.
+ * Refer to ZCL OTA specification for details.
+ */
+#define MANUFACTURER_CODE_TELINK    0x1141//Telink ID
+#define	IMAGE_TYPE					((CHIP_TYPE << 8) | 0)
+#define	FILE_VERSION				(0)
+
+/* Pre-compiled link configuration. */
+#define IS_BOOT_LOADER_IMAGE				0
+#define RESV_FOR_APP_RAM_CODE_SIZE			0
+#define IMAGE_OFFSET						APP_IMAGE_ADDR
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.c
new file mode 100644
index 00000000..a4bc3fcb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.c
@@ -0,0 +1,11 @@
+
+#include "wdt.h"
+#include "../tl_common.h"
+
+void watchdog_enable(int timeout)
+{
+    wd_stop();
+    drv_wd_setInterval(timeout);
+    drv_wd_start();
+    drv_wd_clear();
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.h
new file mode 100644
index 00000000..ec23bb76
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/wdt.h
@@ -0,0 +1,29 @@
+
+#pragma once
+
+
+void watchdog_enable(int timeout);
+
+#define wdt10s()                \
+    do                          \
+    {                           \
+        watchdog_enable(10000); \
+    } while (0)
+
+#define wdt30s()                \
+    do                          \
+    {                           \
+        watchdog_enable(30000); \
+    } while (0)
+
+#define wdt60s()                \
+    do                          \
+    {                           \
+        watchdog_enable(60000); \
+    } while (0)
+
+#define wdt120s()                \
+    do                           \
+    {                            \
+        watchdog_enable(120000); \
+    } while (0)
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.c
new file mode 100644
index 00000000..6f835f2c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.c
@@ -0,0 +1,178 @@
+#include "tl_common.h"
+#include "main.h"
+#include "zigbee.h"
+#include <stdint.h>
+#include <stdbool.h>
+
+RAM _attribute_aligned_(4) volatile uint8_t rf_tx_buf[ZB_RADIO_TX_HDR_LEN + 250];
+RAM _attribute_aligned_(4) volatile uint8_t rf_rx_buf[ZB_RADIO_TX_HDR_LEN + 250];
+
+#define LOGICCHANNEL_TO_PHYSICAL(p) (((p)-10) * 5)
+void rf_setChannel(uint8_t chn)
+{
+	u32 r = drv_disable_irq();
+	uint8_t phySta = ZB_RADIO_TRX_STA_GET();
+	ZB_RADIO_TRX_SWITCH(phySta, LOGICCHANNEL_TO_PHYSICAL(chn));
+	drv_restore_irq(r);
+}
+
+RAM volatile uint8_t tx_done = 0;
+void zigbee_tx(uint8_t *buf, uint8_t len)
+{
+	ZB_RADIO_DMA_HDR_BUILD(rf_tx_buf, len);
+	rf_tx_buf[4] = len + 2;
+	memcpy(rf_tx_buf + 5, buf, len);
+	WaitUs(ZB_TX_WAIT_US);
+	ZB_RADIO_RX_DONE_CLR;
+	tx_done = 0;
+	ZB_RADIO_TX_START(rf_tx_buf);
+	while (!tx_done)
+		;
+}
+
+#define ZB_MAX_BUFFER 50
+
+RAM volatile uint8_t rxed = 0;
+RAM volatile uint8_t bbb[ZB_MAX_BUFFER][250];
+RAM volatile uint8_t len = 0;
+RAM volatile uint8_t rssi = 0;
+RAM volatile uint8_t current_buff = 0;
+RAM volatile uint8_t current_buff_worked = 0;
+
+uint8_t getRxBuffer(uint8_t *bufferout, uint8_t *rssiout)
+{
+	if (current_buff != current_buff_worked)
+	{
+		uint8_t len_rx = bbb[current_buff_worked][0];
+		*rssiout = bbb[current_buff_worked][1];
+		memcpy(bufferout, (uint8_t *)&bbb[current_buff_worked][2], len_rx);
+		current_buff_worked++;
+		current_buff_worked %= ZB_MAX_BUFFER;
+		return len_rx;
+	}
+	return 0;
+}
+
+void init_zigbee(uint_fast8_t channel)
+{
+	current_buff_worked = current_buff;
+	rf_set_power_level_index(RF_POWER_INDEX_P3p01dBm);
+	rf_drv_init(RF_MODE_ZIGBEE_250K);
+	rf_drv_cap(CFG_FREQUENCY_OFFSET);
+	drv_hwTmr_init(TIMER_IDX_3, TIMER_MODE_SCLK);
+	ZB_RADIO_IRQ_MASK_SET;
+	rf_setChannel(channel);
+}
+
+void zigbee_off()
+{
+	rf_set_tx_rx_off();
+	current_buff_worked = current_buff;
+}
+
+void zigbee_rx_start()
+{
+	rf_rx_buffer_set(rf_rx_buf, 250, 0);
+	rf_set_tx_rx_off();
+	rf_set_rxmode();
+}
+
+ __attribute__((optimize("-Os"))) void rf_tx_irq_handler(void)
+{
+	// printf("TX IRQ\r\n");
+	ZB_RADIO_TX_DONE_CLR;
+	tx_done = 1;
+}
+
+ __attribute__((optimize("-Os"))) void rf_rx_irq_handler(void)
+{
+	if (RF_DMA_BUSY())
+	{
+		return;
+	}
+	ZB_RADIO_RX_DISABLE;
+	if ((!ZB_RADIO_CRC_OK(rf_rx_buf)) || (!ZB_RADIO_PACKET_LENGTH_OK(rf_rx_buf)))
+	{
+		ZB_RADIO_RX_BUF_CLEAR(rf_rx_buf);
+		ZB_RADIO_RX_ENABLE;
+		return;
+	}
+
+	bbb[current_buff][0] = rf_rx_buf[4] - 2;
+	bbb[current_buff][1] = (read_reg8(0x449));
+	memcpy((uint8_t *)&bbb[current_buff][2], (uint8_t *)&rf_rx_buf[5], bbb[current_buff][0]);
+	current_buff++;
+	current_buff %= ZB_MAX_BUFFER;
+	ZB_RADIO_RX_BUF_CLEAR(rf_rx_buf);
+	ZB_RADIO_RX_ENABLE;
+}
+
+uint8_t channelList[6] = {11, 15, 20, 25, 26, 27};
+
+bool next_ack = 0;
+int state = 0;
+
+#define RADIO_MAX_PACKET_LEN (250)
+
+uint8_t seq_nr = 0;
+uint8_t get_seq_nr()
+{
+	return seq_nr++;
+}
+
+#define MAX_RX_PKTS 8
+
+volatile uint8_t mRxBufs[MAX_RX_PKTS][RADIO_MAX_PACKET_LEN + 1 /* length */ + 1 /* LQI */ + 1 /* RSSI */];
+volatile uint8_t mRxNextWrite, mRxNextRead, mRxNumFree, mRxNumGot;
+bool mRxEnabled = false;
+
+RAM uint8_t our_ch = 11;
+bool radioSetChannel(uint_fast8_t channel)
+{
+	our_ch = channel;
+	init_zigbee(channel);
+	return true;
+}
+
+bool radioRxEnable(bool on)
+{
+	if (on)
+		zigbee_rx_start();
+	return true;
+}
+
+void radioRxFlush(void)
+{
+	current_buff_worked = current_buff;
+}
+
+bool radioInit(void)
+{
+	return 1;
+}
+
+int32_t radioRxDequeuePkt(uint8_t *dstBuf, uint32_t maxLen, int8_t *rssiP, uint8_t *lqiP)
+{
+	u8 curr_rx = getRxBuffer(dstBuf, lqiP);
+	*rssiP = lqiP;
+
+	/*if (curr_rx)
+	{
+
+		printf("RX: ");
+		for (int i = 0; i < curr_rx; i++)
+		{
+			printf(" %02X", dstBuf[i]);
+		}
+		printf("\r\n");
+	}*/
+	return curr_rx;
+}
+
+bool radioTxLL(uint8_t *pkt)
+{
+	init_zigbee(our_ch);
+	zigbee_tx((uint8_t *)&pkt[1], pkt[0] - 2);
+	zigbee_rx_start();
+	return true;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.h
new file mode 100644
index 00000000..a049266d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/src/zigbee.h
@@ -0,0 +1,17 @@
+#pragma once
+
+#include <stdint.h>
+#include <stdbool.h>
+extern uint8_t channelList[6];
+void init_zigbee(uint_fast8_t channel);
+uint8_t getRxBuffer(uint8_t *bufferout, uint8_t *rssiout);
+void zigbee_tx(uint8_t *buf, uint8_t len);
+void zigbee_off();
+void zigbee_rx_start();
+
+bool radioSetChannel(uint_fast8_t channel);
+bool radioRxEnable(bool on);
+void radioRxFlush(void);
+bool radioInit(void);
+int32_t radioRxDequeuePkt(uint8_t *dstBuf, uint32_t maxLen, int8_t *rssiP, uint8_t *lqiP);
+bool radioTxLL(uint8_t *pkt);
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/[.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/[.exe
new file mode 100644
index 00000000..6ac31c2f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/[.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/addr2line.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/addr2line.exe
new file mode 100644
index 00000000..279aaa2b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/addr2line.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ar.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ar.exe
new file mode 100644
index 00000000..dc0b3664
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ar.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/arch.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/arch.exe
new file mode 100644
index 00000000..df867727
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/arch.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/as.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/as.exe
new file mode 100644
index 00000000..a9205bc2
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/as.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ash.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ash.exe
new file mode 100644
index 00000000..a9aea03a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ash.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/awk b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/awk
new file mode 100644
index 00000000..2211e1ba
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/awk differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base32.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base32.exe
new file mode 100644
index 00000000..cb50c676
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base32.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base64.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base64.exe
new file mode 100644
index 00000000..c61e3017
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/base64.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/basename.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/basename.exe
new file mode 100644
index 00000000..5d19d506
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/basename.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bash.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bash.exe
new file mode 100644
index 00000000..1f741f18
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bash.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bashbug b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bashbug
new file mode 100644
index 00000000..58db9456
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bashbug
@@ -0,0 +1,271 @@
+#!/bin/sh -
+#
+# bashbug - create a bug report and mail it to the bug address
+#
+# The bug address depends on the release status of the shell.  Versions
+# with status `devel', `alpha', `beta', or `rc' mail bug reports to
+# chet@cwru.edu and, optionally, to bash-testers@cwru.edu.
+# Other versions send mail to bug-bash@gnu.org.
+#
+# Copyright (C) 1996-2004 Free Software Foundation, Inc.
+#
+#   This program is free software: you can redistribute it and/or modify
+#   it under the terms of the GNU General Public License as published by
+#   the Free Software Foundation, either version 3 of the License, or
+#   (at your option) any later version.
+#
+#   This program is distributed in the hope that it will be useful,
+#   but WITHOUT ANY WARRANTY; without even the implied warranty of
+#   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+#   GNU General Public License for more details.
+#
+#   You should have received a copy of the GNU General Public License
+#   along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+#
+# configuration section:
+#	these variables are filled in by the make target in Makefile
+#
+MACHINE="i686"
+OS="cygwin"
+CC="gcc"
+CFLAGS=" -DPROGRAM='bash.exe' -DCONF_HOSTTYPE='i686' -DCONF_OSTYPE='cygwin' -DCONF_MACHTYPE='i686-pc-cygwin' -DCONF_VENDOR='pc' -DLOCALEDIR='/usr/share/locale' -DPACKAGE='bash' -DSHELL -DHAVE_CONFIG_H -DRECYCLES_PIDS   -I.  -I/usr/src/bash-4.3.42-4.i686/src/bash-4.3 -I/usr/src/bash-4.3.42-4.i686/src/bash-4.3/include -I/usr/src/bash-4.3.42-4.i686/src/bash-4.3/lib  -DWORDEXP_OPTION -ggdb -O2 -pipe -Wimplicit-function-declaration -fdebug-prefix-map=/usr/src/bash-4.3.42-4.i686/build=/usr/src/debug/bash-4.3.42-4 -fdebug-prefix-map=/usr/src/bash-4.3.42-4.i686/src/bash-4.3=/usr/src/debug/bash-4.3.42-4"
+RELEASE="4.3"
+PATCHLEVEL="42"
+RELSTATUS="release"
+MACHTYPE="i686-pc-cygwin"
+
+PATH=/bin:/usr/bin:/usr/local/bin:$PATH
+export PATH
+
+# Check if TMPDIR is set, default to /tmp
+: ${TMPDIR:=/tmp}
+
+#Securely create a temporary directory for the temporary files
+TEMPDIR=$TMPDIR/bbug.$$
+(umask 077 && mkdir $TEMPDIR) || {
+	echo "$0: could not create temporary directory" >&2
+	exit 1
+}
+
+TEMPFILE1=$TEMPDIR/bbug1
+TEMPFILE2=$TEMPDIR/bbug2
+        
+USAGE="Usage: $0 [--help] [--version] [bug-report-email-address]"
+VERSTR="GNU bashbug, version ${RELEASE}.${PATCHLEVEL}-${RELSTATUS}"
+
+do_help= do_version=
+
+while [ $# -gt 0 ]; do
+	case "$1" in
+	--help)		shift ; do_help=y ;;
+	--version)	shift ; do_version=y ;;
+	--)		shift ; break ;;
+	-*)		echo "bashbug: ${1}: invalid option" >&2
+			echo "$USAGE" >& 2
+			exit 2 ;;
+	*)		break ;;
+	esac
+done
+
+if [ -n "$do_version" ]; then
+	echo "${VERSTR}"
+	exit 0
+fi
+
+if [ -n "$do_help" ]; then
+	echo "${VERSTR}"
+	echo "${USAGE}"
+	echo
+	cat << HERE_EOF
+Bashbug is used to send mail to the Bash maintainers
+for when Bash doesn't behave like you'd like, or expect.
+
+Bashbug will start up your editor (as defined by the shell's
+EDITOR environment variable) with a preformatted bug report
+template for you to fill in. The report will be mailed to the
+bug-bash mailing list by default. See the manual for details.
+
+If you invoke bashbug by accident, just quit your editor without
+saving any changes to the template, and no bug report will be sent.
+HERE_EOF
+	exit 0
+fi
+
+# Figure out how to echo a string without a trailing newline
+N=`echo 'hi there\c'`
+case "$N" in
+*c)	n=-n c= ;;
+*)	n= c='\c' ;;
+esac
+
+BASHTESTERS="bash-testers@cwru.edu"
+
+case "$RELSTATUS" in
+alpha*|beta*|devel*|rc*)	BUGBASH=chet@cwru.edu ;;
+*)				BUGBASH=bug-bash@gnu.org ;;
+esac
+
+case "$RELSTATUS" in
+alpha*|beta*|devel*|rc*)
+		echo "$0: This is a testing release.  Would you like your bug report"
+		echo "$0: to be sent to the bash-testers mailing list?"
+		echo $n "$0: Send to bash-testers? $c"
+		read ans
+		case "$ans" in
+		y*|Y*)	BUGBASH="${BUGBASH},${BASHTESTERS}" ;;
+		esac ;;
+esac
+
+BUGADDR="${1-$BUGBASH}"
+
+if [ -z "$DEFEDITOR" ] && [ -z "$EDITOR" ]; then
+	if [ -x /usr/bin/editor ]; then
+		DEFEDITOR=editor
+	elif [ -x /usr/local/bin/ce ]; then
+		DEFEDITOR=ce
+	elif [ -x /usr/local/bin/emacs ]; then
+		DEFEDITOR=emacs
+	elif [ -x /usr/contrib/bin/emacs ]; then
+		DEFEDITOR=emacs
+	elif [ -x /usr/bin/emacs ]; then
+		DEFEDITOR=emacs
+	elif [ -x /usr/bin/xemacs ]; then
+		DEFEDITOR=xemacs
+	elif [ -x /usr/contrib/bin/jove ]; then
+		DEFEDITOR=jove
+	elif [ -x /usr/local/bin/jove ]; then
+		DEFEDITOR=jove
+	elif [ -x /usr/bin/vi ]; then
+		DEFEDITOR=vi
+	else
+		echo "$0: No default editor found: attempting to use vi" >&2
+		DEFEDITOR=vi
+	fi
+fi
+
+
+: ${EDITOR=$DEFEDITOR}
+
+: ${USER=${LOGNAME-`whoami`}}
+
+trap 'rm -rf "$TEMPDIR"; exit 1' 1 2 3 13 15
+trap 'rm -rf "$TEMPDIR"' 0
+
+UN=
+if (uname) >/dev/null 2>&1; then
+	UN=`uname -a`
+fi
+
+if [ -f /usr/lib/sendmail ] ; then
+	RMAIL="/usr/lib/sendmail"
+	SMARGS="-i -t"
+elif [ -f /usr/sbin/sendmail ] ; then
+	RMAIL="/usr/sbin/sendmail"
+	SMARGS="-i -t"
+else
+	RMAIL=rmail
+	SMARGS="$BUGADDR"
+fi
+
+INITIAL_SUBJECT='[50 character or so descriptive subject here (for reference)]'
+
+cat > "$TEMPFILE1" <<EOF
+From: ${USER}
+To: ${BUGADDR}
+Subject: ${INITIAL_SUBJECT}
+
+Configuration Information [Automatically generated, do not change]:
+Machine: $MACHINE
+OS: $OS
+Compiler: $CC
+Compilation CFLAGS: $CFLAGS
+uname output: $UN
+Machine Type: $MACHTYPE
+
+Bash Version: $RELEASE
+Patch Level: $PATCHLEVEL
+Release Status: $RELSTATUS
+
+Description:
+	[Detailed description of the problem, suggestion, or complaint.]
+
+Repeat-By:
+	[Describe the sequence of events that causes the problem
+	to occur.]
+
+Fix:
+	[Description of how to fix the problem.  If you don't know a
+	fix for the problem, don't include this section.]
+EOF
+
+cp "$TEMPFILE1" "$TEMPFILE2"
+chmod u+w "$TEMPFILE1"
+
+trap '' 2		# ignore interrupts while in editor
+
+edstat=1
+while [ $edstat -ne 0 ]; do
+	$EDITOR "$TEMPFILE1"
+	edstat=$?
+
+	if [ $edstat -ne 0 ]; then
+		echo "$0: editor \`$EDITOR' exited with nonzero status."
+		echo "$0: Perhaps it was interrupted."
+		echo "$0: Type \`y' to give up, and lose your bug report;"
+		echo "$0: type \`n' to re-enter the editor."
+		echo $n "$0: Do you want to give up? $c"
+
+		read ans
+		case "$ans" in
+		[Yy]*) exit 1 ;;
+		esac
+
+		continue
+	fi
+
+	# find the subject from the temp file and see if it's been changed
+	CURR_SUB=`grep '^Subject: ' "$TEMPFILE1" | sed 's|^Subject:[ 	]*||' | sed 1q`
+
+	case "$CURR_SUB" in
+	"${INITIAL_SUBJECT}")
+		echo
+		echo "$0: You have not changed the subject from the default."
+		echo "$0: Please use a more descriptive subject header."
+		echo "$0: Type \`y' to give up, and lose your bug report;"
+		echo "$0: type \`n' to re-enter the editor."
+		echo $n "$0: Do you want to give up? $c"
+
+		read ans
+		case "$ans" in
+		[Yy]*) exit 1 ;;
+		esac
+
+		echo "$0:  The editor will be restarted in five seconds."
+		sleep 5
+		edstat=1
+		;;
+	esac
+
+done
+
+trap 'rm -rf "$TEMPDIR"; exit 1' 2	# restore trap on SIGINT
+
+if cmp -s "$TEMPFILE1" "$TEMPFILE2"
+then
+	echo "File not changed, no bug report submitted."
+	exit
+fi
+
+echo $n "Send bug report to ${BUGADDR}? [y/n] $c"
+read ans
+case "$ans" in
+[Nn]*)	exit 0 ;;
+esac
+
+${RMAIL} $SMARGS < "$TEMPFILE1" || {
+	cat "$TEMPFILE1" >> $HOME/dead.bashbug
+	echo "$0: mail failed: report saved in $HOME/dead.bashbug" >&2
+}
+
+exit 0
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bunzip2.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bunzip2.exe
new file mode 100644
index 00000000..066a98e9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bunzip2.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcat.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcat.exe
new file mode 100644
index 00000000..893a0009
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcat.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcmp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcmp
new file mode 100644
index 00000000..2a6acaf9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzcmp differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzdiff b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzdiff
new file mode 100644
index 00000000..6fc38f92
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzdiff
@@ -0,0 +1,76 @@
+#!/bin/sh
+# sh is buggy on RS/6000 AIX 3.2. Replace above line with #!/bin/ksh
+
+# Bzcmp/diff wrapped for bzip2, 
+# adapted from zdiff by Philippe Troin <phil@fifi.org> for Debian GNU/Linux.
+
+# Bzcmp and bzdiff are used to invoke the cmp or the  diff  pro-
+# gram  on compressed files.  All options specified are passed
+# directly to cmp or diff.  If only 1 file is specified,  then
+# the  files  compared  are file1 and an uncompressed file1.gz.
+# If two files are specified, then they are  uncompressed  (if
+# necessary) and fed to cmp or diff.  The exit status from cmp
+# or diff is preserved.
+
+PATH="/usr/bin:/bin:$PATH"; export PATH
+prog=`echo $0 | sed 's|.*/||'`
+case "$prog" in
+  *cmp) comp=${CMP-cmp}   ;;
+  *)    comp=${DIFF-diff} ;;
+esac
+
+OPTIONS=
+FILES=
+for ARG
+do
+    case "$ARG" in
+    -*)	OPTIONS="$OPTIONS $ARG";;
+     *)	if test -f "$ARG"; then
+            FILES="$FILES $ARG"
+        else
+            echo "${prog}: $ARG not found or not a regular file"
+	    exit 1
+        fi ;;
+    esac
+done
+if test -z "$FILES"; then
+	echo "Usage: $prog [${comp}_options] file [file]"
+	exit 1
+fi
+tmp=`mktemp ${TMPDIR:-/tmp}/bzdiff.XXXXXXXXXX` || {
+      echo 'cannot create a temporary file' >&2
+      exit 1
+}
+set $FILES
+if test $# -eq 1; then
+	FILE=`echo "$1" | sed 's/.bz2$//'`
+	bzip2 -cd "$FILE.bz2" | $comp $OPTIONS - "$FILE"
+	STAT="$?"
+
+elif test $# -eq 2; then
+	case "$1" in
+        *.bz2)
+                case "$2" in
+	        *.bz2)
+			F=`echo "$2" | sed 's|.*/||;s|.bz2$||'`
+                        bzip2 -cdfq "$2" > $tmp
+                        bzip2 -cdfq "$1" | $comp $OPTIONS - $tmp
+                        STAT="$?"
+			/bin/rm -f $tmp;;
+
+                *)      bzip2 -cdfq "$1" | $comp $OPTIONS - "$2"
+                        STAT="$?";;
+                esac;;
+        *)      case "$2" in
+	        *.bz2)
+                        bzip2 -cdfq "$2" | $comp $OPTIONS "$1" -
+                        STAT="$?";;
+                *)      $comp $OPTIONS "$1" "$2"
+                        STAT="$?";;
+                esac;;
+	esac
+        exit "$STAT"
+else
+	echo "Usage: $prog [${comp}_options] file [file]"
+	exit 1
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzegrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzegrep
new file mode 100644
index 00000000..18b974ca
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzegrep differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzfgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzfgrep
new file mode 100644
index 00000000..18b974ca
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzfgrep differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzgrep
new file mode 100644
index 00000000..37de592d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzgrep
@@ -0,0 +1,132 @@
+#!/bin/sh
+
+# bzgrep -- a wrapper around a grep program that decompresses files as needed
+# Adapted from zgrep of the Debian gzip package by Anibal Monsalve Salazar. 
+# Adapted from a version sent by Charles Levert <charles@comm.polymtl.ca>
+
+# Copyright (C) 1998, 2001, 2002 Free Software Foundation
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2, or (at your option)
+# any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA
+# 02111-1307, USA.
+
+PATH="/usr/bin:$PATH"; export PATH
+
+prog=`echo "$0" | sed 's|.*/||'`
+case "$prog" in
+	*egrep)	grep=${EGREP-egrep}	;;
+	*fgrep)	grep=${FGREP-fgrep}	;;
+	*)	grep=${GREP-grep}	;;
+esac
+
+pat=""
+after_dash_dash=""
+files_with_matches=0
+files_without_matches=0
+no_filename=0
+with_filename=0
+
+while test $# -ne 0; do
+  case "$after_dash_dash$1" in
+  --d* | --rec*)	echo >&2 "$0: $1: option not supported"; exit 2;;
+  --files-with-*)	files_with_matches=1;;
+  --files-witho*)	files_without_matches=1;;
+  --no-f*)	no_filename=1;;
+  --wi*)	with_filename=1;;
+  --*)	;;
+  -*)
+	case "$1" in
+	-*[dr]*) echo >&2 "$0: $1: option not supported"; exit 2;;
+	esac
+	case "$1" in
+	-*H*)	with_filename=1;;
+	esac
+	case "$1" in
+	-*h*)	no_filename=1;;
+	esac
+	case "$1" in
+	-*L*)	files_without_matches=1;;
+	esac
+	case "$1" in
+	-*l*)	files_with_matches=1;;
+	esac;;
+  esac
+  case "$after_dash_dash$1" in
+  -[ef])   opt="$opt $1"; shift; pat="$1"
+           if test "$grep" = grep; then  # grep is buggy with -e on SVR4
+             grep=egrep
+           fi;;
+  -[ABCdm])opt="$opt $1 $2"; shift;;
+  --)      opt="$opt $1"; after_dash_dash=1;;
+  -*)	   opt="$opt $1";;
+   *)      if test -z "$pat"; then
+	     pat="$1"
+	   else
+	     break;
+           fi;;
+  esac
+  shift
+done
+
+if test -z "$pat"; then
+  echo "grep through bzip2 files"
+  echo "usage: $prog [grep_options] pattern [files]"
+  exit 2
+fi
+
+if test $# -eq 0; then
+  bzip2 -cdfq | $grep $opt "$pat"
+  exit $?
+fi
+
+res=0
+for i do
+  bzip2 -cdfq -- "$i" |
+    if test $files_with_matches -eq 1; then
+      $grep $opt "$pat" > /dev/null && printf "%s\n" "$i"
+    elif test $files_without_matches -eq 1; then
+      $grep $opt "$pat" > /dev/null || printf "%s\n" "$i"
+    elif test $with_filename -eq 0 && { test $# -eq 1 || test $no_filename -eq 1; }; then
+      $grep $opt "$pat"
+    else
+      i=$(echo "$i" | sed -e 's/[\\|&]/\\&/g')
+      if test $with_filename -eq 1; then
+	sed_script="s|^[^:]*:|${i}:|"
+      else
+	sed_script="s|^|${i}:|"
+      fi
+      # Hack adapted from GPLed code at
+      # http://home.comcast.net/~j.p.h/cus-faq-2
+      # Has the same effect as the following two lines of bash:
+      #
+      # $grep $opt "$pat" | sed "$sed_script"
+      # exit ${PIPESTATUS[0]}
+      #
+      # Inside the `...`, fd4 goes to the pipe whose other end is read
+      # and passed to eval; fd1 is the normal standard output
+      # preserved the line before with exec 3>&1
+      exec 3>&1
+      eval `
+      exec 4>&1 >&3 3>&-
+      {
+       $grep $opt "$pat" 4>&-; echo "r=$?;" >&4
+      } | sed "$sed_script"
+      `
+      exit $r
+    fi
+  r=$?
+  test $res -lt $r && res=$r
+done
+exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2.exe
new file mode 100644
index 00000000..cc6ae189
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2recover.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2recover.exe
new file mode 100644
index 00000000..6aca3f1f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzip2recover.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzless b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzless
new file mode 100644
index 00000000..e465ea89
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzless differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzmore b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzmore
new file mode 100644
index 00000000..f423ed90
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/bzmore
@@ -0,0 +1,61 @@
+#!/bin/sh
+
+# Bzmore wrapped for bzip2, 
+# adapted from zmore by Philippe Troin <phil@fifi.org> for Debian GNU/Linux.
+
+PATH="/usr/bin:$PATH"; export PATH
+
+prog=`echo $0 | sed 's|.*/||'`
+case "$prog" in
+	*less)	more=less	;;
+	*)	more=more       ;;
+esac
+
+if test "`echo -n a`" = "-n a"; then
+  # looks like a SysV system:
+  n1=''; n2='\c'
+else
+  n1='-n'; n2=''
+fi
+oldtty=`stty -g 2>/dev/null`
+if stty -cbreak 2>/dev/null; then
+  cb='cbreak'; ncb='-cbreak'
+else
+  # 'stty min 1' resets eof to ^a on both SunOS and SysV!
+  cb='min 1 -icanon'; ncb='icanon eof ^d'
+fi
+if test $? -eq 0 && test -n "$oldtty"; then
+   trap 'stty $oldtty 2>/dev/null; exit' 0 INT QUIT TRAP USR1 PIPE TERM
+else
+   trap 'stty $ncb echo 2>/dev/null; exit' 0 INT QUIT TRAP USR1 PIPE TERM
+fi
+
+if test $# = 0; then
+    if test -t 0; then
+	echo usage: $prog files...
+    else
+	bzip2 -cdfq | eval $more
+    fi
+else
+    FIRST=1
+    for FILE
+    do
+	if test $FIRST -eq 0; then
+		echo $n1 "--More--(Next file: $FILE)$n2"
+		stty $cb -echo 2>/dev/null
+		ANS=`dd bs=1 count=1 2>/dev/null` 
+		stty $ncb echo 2>/dev/null
+		echo " "
+		if test "$ANS" = 'e' || test "$ANS" = 'q'; then
+			exit
+		fi
+	fi
+	if test "$ANS" != 's'; then
+		echo "------> $FILE <------"
+		bzip2 -cdfq "$FILE" | eval $more
+	fi
+	if test -t; then
+		FIRST=0
+	fi
+    done
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c++filt.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c++filt.exe
new file mode 100644
index 00000000..67924619
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c++filt.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c2ph b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c2ph
new file mode 100644
index 00000000..2e3293be
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/c2ph
@@ -0,0 +1,1367 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#
+#
+#   c2ph (aka pstruct)
+#   Tom Christiansen, <tchrist@convex.com>
+#
+#   As pstruct, dump C structures as generated from 'cc -g -S' stabs.
+#   As c2ph, do this PLUS generate perl code for getting at the structures.
+#
+#   See the usage message for more.  If this isn't enough, read the code.
+#
+
+=head1 NAME
+
+c2ph, pstruct - Dump C structures as generated from C<cc -g -S> stabs
+
+=head1 SYNOPSIS
+
+    c2ph [-dpnP] [var=val] [files ...]
+
+=head2 OPTIONS
+
+    Options:
+
+    -w	wide; short for: type_width=45 member_width=35 offset_width=8
+    -x	hex; short for:  offset_fmt=x offset_width=08 size_fmt=x size_width=04
+
+    -n	do not generate perl code  (default when invoked as pstruct)
+    -p	generate perl code         (default when invoked as c2ph)
+    -v	generate perl code, with C decls as comments
+
+    -i	do NOT recompute sizes for intrinsic datatypes
+    -a	dump information on intrinsics also
+
+    -t	trace execution
+    -d	spew reams of debugging output
+
+    -slist  give comma-separated list a structures to dump
+
+=head1 DESCRIPTION
+
+The following is the old c2ph.doc documentation by Tom Christiansen
+<tchrist@perl.com>
+Date: 25 Jul 91 08:10:21 GMT
+
+Once upon a time, I wrote a program called pstruct.  It was a perl
+program that tried to parse out C structures and display their member
+offsets for you.  This was especially useful for people looking at
+binary dumps or poking around the kernel.
+
+Pstruct was not a pretty program.  Neither was it particularly robust.
+The problem, you see, was that the C compiler was much better at parsing
+C than I could ever hope to be.
+
+So I got smart:  I decided to be lazy and let the C compiler parse the C,
+which would spit out debugger stabs for me to read.  These were much
+easier to parse.  It's still not a pretty program, but at least it's more
+robust.
+
+Pstruct takes any .c or .h files, or preferably .s ones, since that's
+the format it is going to massage them into anyway, and spits out
+listings like this:
+
+ struct tty {
+   int                          tty.t_locker                         000      4
+   int                          tty.t_mutex_index                    004      4
+   struct tty *                 tty.t_tp_virt                        008      4
+   struct clist                 tty.t_rawq                           00c     20
+     int                        tty.t_rawq.c_cc                      00c      4
+     int                        tty.t_rawq.c_cmax                    010      4
+     int                        tty.t_rawq.c_cfx                     014      4
+     int                        tty.t_rawq.c_clx                     018      4
+     struct tty *               tty.t_rawq.c_tp_cpu                  01c      4
+     struct tty *               tty.t_rawq.c_tp_iop                  020      4
+     unsigned char *            tty.t_rawq.c_buf_cpu                 024      4
+     unsigned char *            tty.t_rawq.c_buf_iop                 028      4
+   struct clist                 tty.t_canq                           02c     20
+     int                        tty.t_canq.c_cc                      02c      4
+     int                        tty.t_canq.c_cmax                    030      4
+     int                        tty.t_canq.c_cfx                     034      4
+     int                        tty.t_canq.c_clx                     038      4
+     struct tty *               tty.t_canq.c_tp_cpu                  03c      4
+     struct tty *               tty.t_canq.c_tp_iop                  040      4
+     unsigned char *            tty.t_canq.c_buf_cpu                 044      4
+     unsigned char *            tty.t_canq.c_buf_iop                 048      4
+   struct clist                 tty.t_outq                           04c     20
+     int                        tty.t_outq.c_cc                      04c      4
+     int                        tty.t_outq.c_cmax                    050      4
+     int                        tty.t_outq.c_cfx                     054      4
+     int                        tty.t_outq.c_clx                     058      4
+     struct tty *               tty.t_outq.c_tp_cpu                  05c      4
+     struct tty *               tty.t_outq.c_tp_iop                  060      4
+     unsigned char *            tty.t_outq.c_buf_cpu                 064      4
+     unsigned char *            tty.t_outq.c_buf_iop                 068      4
+   (*int)()                     tty.t_oproc_cpu                      06c      4
+   (*int)()                     tty.t_oproc_iop                      070      4
+   (*int)()                     tty.t_stopproc_cpu                   074      4
+   (*int)()                     tty.t_stopproc_iop                   078      4
+   struct thread *              tty.t_rsel                           07c      4
+
+etc.
+
+
+Actually, this was generated by a particular set of options.  You can control
+the formatting of each column, whether you prefer wide or fat, hex or decimal,
+leading zeroes or whatever.
+
+All you need to be able to use this is a C compiler than generates
+BSD/GCC-style stabs.  The B<-g> option on native BSD compilers and GCC
+should get this for you.
+
+To learn more, just type a bogus option, like B<-\?>, and a long usage message
+will be provided.  There are a fair number of possibilities.
+
+If you're only a C programmer, than this is the end of the message for you.
+You can quit right now, and if you care to, save off the source and run it
+when you feel like it.  Or not.
+
+
+
+But if you're a perl programmer, then for you I have something much more
+wondrous than just a structure offset printer.
+
+You see, if you call pstruct by its other incybernation, c2ph, you have a code
+generator that translates C code into perl code!  Well, structure and union
+declarations at least, but that's quite a bit.
+
+Prior to this point, anyone programming in perl who wanted to interact
+with C programs, like the kernel, was forced to guess the layouts of
+the C structures, and then hardwire these into his program.  Of course,
+when you took your wonderfully crafted program to a system where the
+sgtty structure was laid out differently, your program broke.  Which is
+a shame.
+
+We've had Larry's h2ph translator, which helped, but that only works on
+cpp symbols, not real C, which was also very much needed.  What I offer
+you is a symbolic way of getting at all the C structures.  I've couched
+them in terms of packages and functions.  Consider the following program:
+
+    #!/usr/local/bin/perl
+
+    require 'syscall.ph';
+    require 'sys/time.ph';
+    require 'sys/resource.ph';
+
+    $ru = "\0" x &rusage'sizeof();
+
+    syscall(&SYS_getrusage, &RUSAGE_SELF, $ru)      && die "getrusage: $!";
+
+    @ru = unpack($t = &rusage'typedef(), $ru);
+
+    $utime =  $ru[ &rusage'ru_utime + &timeval'tv_sec  ]
+	   + ($ru[ &rusage'ru_utime + &timeval'tv_usec ]) / 1e6;
+
+    $stime =  $ru[ &rusage'ru_stime + &timeval'tv_sec  ]
+	   + ($ru[ &rusage'ru_stime + &timeval'tv_usec ]) / 1e6;
+
+    printf "you have used %8.3fs+%8.3fu seconds.\n", $utime, $stime;
+
+
+As you see, the name of the package is the name of the structure.  Regular
+fields are just their own names.  Plus the following accessor functions are
+provided for your convenience:
+
+    struct	This takes no arguments, and is merely the number of first-level
+		elements in the structure.  You would use this for indexing
+		into arrays of structures, perhaps like this
+
+
+		    $usec = $u[ &user'u_utimer
+				+ (&ITIMER_VIRTUAL * &itimerval'struct)
+				+ &itimerval'it_value
+				+ &timeval'tv_usec
+			      ];
+
+    sizeof   	Returns the bytes in the structure, or the member if
+	     	you pass it an argument, such as
+
+			&rusage'sizeof(&rusage'ru_utime)
+
+    typedef  	This is the perl format definition for passing to pack and
+	     	unpack.  If you ask for the typedef of a nothing, you get
+	     	the whole structure, otherwise you get that of the member
+	     	you ask for.  Padding is taken care of, as is the magic to
+	     	guarantee that a union is unpacked into all its aliases.
+	     	Bitfields are not quite yet supported however.
+
+    offsetof	This function is the byte offset into the array of that
+		member.  You may wish to use this for indexing directly
+		into the packed structure with vec() if you're too lazy
+		to unpack it.
+
+    typeof	Not to be confused with the typedef accessor function, this
+		one returns the C type of that field.  This would allow
+		you to print out a nice structured pretty print of some
+		structure without knoning anything about it beforehand.
+		No args to this one is a noop.  Someday I'll post such
+		a thing to dump out your u structure for you.
+
+
+The way I see this being used is like basically this:
+
+	% h2ph <some_include_file.h  >  /usr/lib/perl/tmp.ph
+	% c2ph  some_include_file.h  >> /usr/lib/perl/tmp.ph
+	% install
+
+It's a little tricker with c2ph because you have to get the includes right.
+I can't know this for your system, but it's not usually too terribly difficult.
+
+The code isn't pretty as I mentioned  -- I never thought it would be a 1000-
+line program when I started, or I might not have begun. :-)  But I would have
+been less cavalier in how the parts of the program communicated with each
+other, etc.  It might also have helped if I didn't have to divine the makeup
+of the stabs on the fly, and then account for micro differences between my
+compiler and gcc.
+
+Anyway, here it is.  Should run on perl v4 or greater.  Maybe less.
+
+
+ --tom
+
+=cut
+
+$RCSID = '$Id: c2ph,v 1.7 95/10/28 10:41:47 tchrist Exp Locker: tchrist $';
+
+use File::Temp;
+
+######################################################################
+
+# some handy data definitions.   many of these can be reset later.
+
+$bitorder = 'b';  # ascending; set to B for descending bit fields
+
+%intrinsics =
+%template = (
+    'char', 			'c',
+    'unsigned char', 		'C',
+    'short',			's',
+    'short int',		's',
+    'unsigned short',		'S',
+    'unsigned short int',	'S',
+    'short unsigned int',	'S',
+    'int',			'i',
+    'unsigned int',		'I',
+    'long',			'l',
+    'long int',			'l',
+    'unsigned long',		'L',
+    'unsigned long',		'L',
+    'long unsigned int',	'L',
+    'unsigned long int',	'L',
+    'long long',		'q',
+    'long long int',		'q',
+    'unsigned long long',	'Q',
+    'unsigned long long int',	'Q',
+    'float',			'f',
+    'double',			'd',
+    'pointer',			'p',
+    'null',			'x',
+    'neganull',			'X',
+    'bit',			$bitorder,
+);
+
+&buildscrunchlist;
+delete $intrinsics{'neganull'};
+delete $intrinsics{'bit'};
+delete $intrinsics{'null'};
+
+# use -s to recompute sizes
+%sizeof = (
+    'char', 			'1',
+    'unsigned char', 		'1',
+    'short',			'2',
+    'short int',		'2',
+    'unsigned short',		'2',
+    'unsigned short int',	'2',
+    'short unsigned int',	'2',
+    'int',			'4',
+    'unsigned int',		'4',
+    'long',			'4',
+    'long int',			'4',
+    'unsigned long',		'4',
+    'unsigned long int',	'4',
+    'long unsigned int',	'4',
+    'long long',		'8',
+    'long long int',		'8',
+    'unsigned long long',	'8',
+    'unsigned long long int',	'8',
+    'float',			'4',
+    'double',			'8',
+    'pointer',			'4',
+);
+
+($type_width, $member_width, $offset_width, $size_width) = (20, 20, 6, 5);
+
+($offset_fmt, $size_fmt) = ('d', 'd');
+
+$indent = 2;
+
+$CC = 'cc';
+$CFLAGS = '-gstabs -S';
+$DEFINES = '';
+
+$perl++ if $0 =~ m#/?c2ph$#;
+
+use Getopt::Std qw(getopts);
+
+use File::Temp 'tempdir';
+
+eval '$'.$1.'$2;' while $ARGV[0] =~ /^([A-Za-z_]+=)(.*)/ && shift;
+
+getopts('aixdpvtnws:') || &usage(0);
+
+$opt_d && $debug++;
+$opt_t && $trace++;
+$opt_p && $perl++;
+$opt_v && $verbose++;
+$opt_n && ($perl = 0);
+
+if ($opt_w) {
+    ($type_width, $member_width, $offset_width) = (45, 35, 8);
+}
+if ($opt_x) {
+    ($offset_fmt, $offset_width, $size_fmt, $size_width) = ( 'x', '08', 'x', 04 );
+}
+
+eval '$'.$1.'$2;' while $ARGV[0] =~ /^([A-Za-z_]+=)(.*)/ && shift;
+
+sub PLUMBER {
+    select(STDERR);
+    print "oops, apparent pager foulup\n";
+    $isatty++;
+    &usage(1);
+}
+
+sub usage {
+    local($oops) = @_;
+    unless (-t STDOUT) {
+	select(STDERR);
+    } elsif (!$oops) {
+	$isatty++;
+	$| = 1;
+	print "hit <RETURN> for further explanation: ";
+	<STDIN>;
+	open (PIPE, "|". ($ENV{PAGER} || 'more'));
+	$SIG{PIPE} = PLUMBER;
+	select(PIPE);
+    }
+
+    print "usage: $0 [-dpnP] [var=val] [files ...]\n";
+
+    exit unless $isatty;
+
+    print <<EOF;
+
+Options:
+
+-w	wide; short for: type_width=45 member_width=35 offset_width=8
+-x	hex; short for:  offset_fmt=x offset_width=08 size_fmt=x size_width=04
+
+-n  	do not generate perl code  (default when invoked as pstruct)
+-p  	generate perl code         (default when invoked as c2ph)
+-v	generate perl code, with C decls as comments
+
+-i	do NOT recompute sizes for intrinsic datatypes
+-a	dump information on intrinsics also
+
+-t 	trace execution
+-d	spew reams of debugging output
+
+-slist  give comma-separated list a structures to dump
+
+
+Var Name        Default Value    Meaning
+
+EOF
+
+    &defvar('CC', 'which_compiler to call');
+    &defvar('CFLAGS', 'how to generate *.s files with stabs');
+    &defvar('DEFINES','any extra cflags or cpp defines, like -I, -D, -U');
+
+    print "\n";
+
+    &defvar('type_width', 'width of type field   (column 1)');
+    &defvar('member_width', 'width of member field (column 2)');
+    &defvar('offset_width', 'width of offset field (column 3)');
+    &defvar('size_width', 'width of size field   (column 4)');
+
+    print "\n";
+
+    &defvar('offset_fmt', 'sprintf format type for offset');
+    &defvar('size_fmt', 'sprintf format type for size');
+
+    print "\n";
+
+    &defvar('indent', 'how far to indent each nesting level');
+
+   print <<'EOF';
+
+    If any *.[ch] files are given, these will be catted together into
+    a temporary *.c file and sent through:
+	    $CC $CFLAGS $DEFINES
+    and the resulting *.s groped for stab information.  If no files are
+    supplied, then stdin is read directly with the assumption that it
+    contains stab information.  All other lines will be ignored.  At
+    most one *.s file should be supplied.
+
+EOF
+    close PIPE;
+    exit 1;
+}
+
+sub defvar {
+    local($var, $msg) = @_;
+    printf "%-16s%-15s  %s\n", $var, eval "\$$var", $msg;
+}
+
+sub safedir {
+    $SAFEDIR = File::Temp::tempdir("c2ph.XXXXXX", TMPDIR => 1, CLEANUP => 1)
+      unless (defined($SAFEDIR));
+}
+
+undef $SAFEDIR;
+
+$recurse = 1;
+
+if (@ARGV) {
+    if (grep(!/\.[csh]$/,@ARGV)) {
+	warn "Only *.[csh] files expected!\n";
+	&usage;
+    }
+    elsif (grep(/\.s$/,@ARGV)) {
+	if (@ARGV > 1) {
+	    warn "Only one *.s file allowed!\n";
+	    &usage;
+	}
+    }
+    elsif (@ARGV == 1 && $ARGV[0] =~ /\.c$/) {
+	local($dir, $file) = $ARGV[0] =~ m#(.*/)?(.*)$#;
+	$chdir = "cd $dir && " if $dir;
+	&system("$chdir$CC $CFLAGS $DEFINES $file") && exit 1;
+	$ARGV[0] =~ s/\.c$/.s/;
+    }
+    else {
+	&safedir;
+	$TMP = "$SAFEDIR/c2ph.$$.c";
+	&system("cat @ARGV > $TMP") && exit 1;
+	&system("cd $SAFEDIR && $CC $CFLAGS $DEFINES $TMP") && exit 1;
+	unlink $TMP;
+	$TMP =~ s/\.c$/.s/;
+	@ARGV = ($TMP);
+    }
+}
+
+if ($opt_s) {
+    for (split(/[\s,]+/, $opt_s)) {
+	$interested{$_}++;
+    }
+}
+
+
+$| = 1 if $debug;
+
+main: {
+
+    if ($trace) {
+	if (-t && !@ARGV) {
+	    print STDERR "reading from your keyboard: ";
+	} else {
+	    print STDERR "reading from " . (@ARGV ? "@ARGV" : "<STDIN>").": ";
+	}
+    }
+
+STAB: while (<>) {
+	if ($trace && !($. % 10)) {
+	    $lineno = $..'';
+	    print STDERR $lineno, "\b" x length($lineno);
+	}
+	next unless /^\s*\.stabs\s+/;
+	$line = $_;
+	s/^\s*\.stabs\s+//;
+	if (s/\\\\"[d,]+$//) {
+	    $saveline .= $line;
+	    $savebar  = $_;
+	    next STAB;
+	}
+	if ($saveline) {
+	    s/^"//;
+	    $_ = $savebar . $_;
+	    $line = $saveline;
+	}
+	&stab;
+	$savebar = $saveline = undef;
+    }
+    print STDERR "$.\n" if $trace;
+    unlink $TMP if $TMP;
+
+    &compute_intrinsics if $perl && !$opt_i;
+
+    print STDERR "resolving types\n" if $trace;
+
+    &resolve_types;
+    &adjust_start_addrs;
+
+    $sum = 2 + $type_width + $member_width;
+    $pmask1 = "%-${type_width}s %-${member_width}s";
+    $pmask2 = "%-${sum}s %${offset_width}${offset_fmt}%s %${size_width}${size_fmt}%s";
+
+
+
+    if ($perl) {
+	# resolve template -- should be in stab define order, but even this isn't enough.
+	print STDERR "\nbuilding type templates: " if $trace;
+	for $i (reverse 0..$#type) {
+	    next unless defined($name = $type[$i]);
+	    next unless defined $struct{$name};
+	    ($iname = $name) =~ s/\..*//;
+	    $build_recursed = 0;
+	    &build_template($name) unless defined $template{&psou($name)} ||
+					$opt_s && !$interested{$iname};
+	}
+	print STDERR "\n\n" if $trace;
+    }
+
+    print STDERR "dumping structs: " if $trace;
+
+    local($iam);
+
+
+
+    foreach $name (sort keys %struct) {
+	($iname = $name) =~ s/\..*//;
+	next if $opt_s && !$interested{$iname};
+	print STDERR "$name " if $trace;
+
+	undef @sizeof;
+	undef @typedef;
+	undef @offsetof;
+	undef @indices;
+	undef @typeof;
+	undef @fieldnames;
+
+	$mname = &munge($name);
+
+	$fname = &psou($name);
+
+	print "# " if $perl && $verbose;
+	$pcode = '';
+	print "$fname {\n" if !$perl || $verbose;
+	$template{$fname} = &scrunch($template{$fname}) if $perl;
+	&pstruct($name,$name,0);
+	print "# " if $perl && $verbose;
+	print "}\n" if !$perl || $verbose;
+	print "\n" if $perl && $verbose;
+
+	if ($perl) {
+	    print "$pcode";
+
+	    printf("\nsub %-32s { %4d; }\n\n", "${mname}'struct", $countof{$name});
+
+	    print <<EOF;
+sub ${mname}'typedef {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}'index
+	? \$${mname}'typedef[\$${mname}'index]
+	: \$${mname}'typedef;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'sizeof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}'index
+	? \$${mname}'sizeof[\$${mname}'index]
+	: \$${mname}'sizeof;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'offsetof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}index
+	? \$${mname}'offsetof[\$${mname}'index]
+	: \$${mname}'sizeof;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'typeof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}index
+	? \$${mname}'typeof[\$${mname}'index]
+	: '$name';
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'fieldnames {
+    \@${mname}'fieldnames;
+}
+EOF
+
+	$iam = ($isastruct{$name} && 's') || ($isaunion{$name} && 'u');
+
+	    print <<EOF;
+sub ${mname}'isastruct {
+    '$iam';
+}
+EOF
+
+	    print "\$${mname}'typedef = '" . &scrunch($template{$fname})
+		. "';\n";
+
+	    print "\$${mname}'sizeof = $sizeof{$name};\n\n";
+
+
+	    print "\@${mname}'indices = (", &squishseq(@indices), ");\n";
+
+	    print "\n";
+
+	    print "\@${mname}'typedef[\@${mname}'indices] = (",
+			join("\n\t", '', @typedef), "\n    );\n\n";
+	    print "\@${mname}'sizeof[\@${mname}'indices] = (",
+			join("\n\t", '', @sizeof), "\n    );\n\n";
+	    print "\@${mname}'offsetof[\@${mname}'indices] = (",
+			join("\n\t", '', @offsetof), "\n    );\n\n";
+	    print "\@${mname}'typeof[\@${mname}'indices] = (",
+			join("\n\t", '', @typeof), "\n    );\n\n";
+	    print "\@${mname}'fieldnames[\@${mname}'indices] = (",
+			join("\n\t", '', @fieldnames), "\n    );\n\n";
+
+	    $template_printed{$fname}++;
+	    $size_printed{$fname}++;
+	}
+	print "\n";
+    }
+
+    print STDERR "\n" if $trace;
+
+    unless ($perl && $opt_a) {
+	print "\n1;\n" if $perl;
+	exit;
+    }
+
+
+
+    foreach $name (sort bysizevalue keys %intrinsics) {
+	next if $size_printed{$name};
+	print '$',&munge($name),"'sizeof = ", $sizeof{$name}, ";\n";
+    }
+
+    print "\n";
+
+    sub bysizevalue { $sizeof{$a} <=> $sizeof{$b}; }
+
+
+    foreach $name (sort keys %intrinsics) {
+	print '$',&munge($name),"'typedef = '", $template{$name}, "';\n";
+    }
+
+    print "\n1;\n" if $perl;
+
+    exit;
+}
+
+########################################################################################
+
+
+sub stab {
+    next unless $continued || /:[\$\w]+(\(\d+,\d+\))?=[\*\$\w]+/;  # (\d+,\d+) is for sun
+    s/"// 						|| next;
+    s/",([x\d]+),([x\d]+),([x\d]+),.*// 		|| next;
+
+    next if /^\s*$/;
+
+    $size = $3 if $3;
+    $_ = $continued . $_ if length($continued);
+    if (s/\\\\$//) {
+      # if last 2 chars of string are '\\' then stab is continued
+      # in next stab entry
+      chop;
+      $continued = $_;
+      next;
+    }
+    $continued = '';
+
+
+    $line = $_;
+
+    if (($name, $pdecl) = /^([\$ \w]+):[tT]((\d+)(=[rufs*](\d+))+)$/) {
+	print "$name is a typedef for some funky pointers: $pdecl\n" if $debug;
+	&pdecl($pdecl);
+	next;
+    }
+
+
+
+    if (/(([ \w]+):t(\d+|\(\d+,\d+\)))=r?(\d+|\(\d+,\d+\))(;\d+;\d+;)?/) {
+	local($ident) = $2;
+	push(@intrinsics, $ident);
+	$typeno = &typeno($3);
+	$type[$typeno] = $ident;
+	print STDERR "intrinsic $ident in new type $typeno\n" if $debug;
+	next;
+    }
+
+    if (($name, $typeordef, $typeno, $extra, $struct, $_)
+	= /^([\$ \w]+):([ustT])(\d+|\(\d+,\d+\))(=[rufs*](\d+))?(.*)$/)
+    {
+	$typeno = &typeno($typeno);  # sun foolery
+    }
+    elsif (/^[\$\w]+:/) {
+	next; # variable
+    }
+    else {
+	warn "can't grok stab: <$_> in: $line " if $_;
+	next;
+    }
+
+    #warn "got size $size for $name\n";
+    $sizeof{$name} = $size if $size;
+
+    s/;[-\d]*;[-\d]*;$//;  # we don't care about ranges
+
+    $typenos{$name} = $typeno;
+
+    unless (defined $type[$typeno]) {
+	&panic("type 0??") unless $typeno;
+	$type[$typeno] = $name unless defined $type[$typeno];
+	printf "new type $typeno is $name" if $debug;
+	if ($extra =~ /\*/ && defined $type[$struct]) {
+	    print ", a typedef for a pointer to " , $type[$struct] if $debug;
+	}
+    } else {
+	printf "%s is type %d", $name, $typeno if $debug;
+	print ", a typedef for " , $type[$typeno] if $debug;
+    }
+    print "\n" if $debug;
+    #next unless $extra =~ /[su*]/;
+
+    #$type[$struct] = $name;
+
+    if ($extra =~ /[us*]/) {
+	&sou($name, $extra);
+	$_ = &sdecl($name, $_, 0);
+    }
+    elsif (/^=ar/) {
+	print "it's a bare array typedef -- that's pretty sick\n" if $debug;
+	$_ = "$typeno$_";
+	$scripts = '';
+	$_ = &adecl($_,1);
+
+    }
+    elsif (s/((\w+):t(\d+|\(\d+,\d+\)))?=r?(;\d+;\d+;)?//) {  # the ?'s are for gcc
+	push(@intrinsics, $2);
+	$typeno = &typeno($3);
+	$type[$typeno] = $2;
+	print STDERR "intrinsic $2 in new type $typeno\n" if $debug;
+    }
+    elsif (s/^=e//) { # blessed be thy compiler; mine won't do this
+	&edecl;
+    }
+    else {
+	warn "Funny remainder for $name on line $_ left in $line " if $_;
+    }
+}
+
+sub typeno {  # sun thinks types are (0,27) instead of just 27
+    local($_) = @_;
+    s/\(\d+,(\d+)\)/$1/;
+    $_;
+}
+
+sub pstruct {
+    local($what,$prefix,$base) = @_;
+    local($field, $fieldname, $typeno, $count, $offset, $entry);
+    local($fieldtype);
+    local($type, $tname);
+    local($mytype, $mycount, $entry2);
+    local($struct_count) = 0;
+    local($pad, $revpad, $length, $prepad, $lastoffset, $lastlength, $fmt);
+    local($bits,$bytes);
+    local($template);
+
+
+    local($mname) = &munge($name);
+
+    sub munge {
+	local($_) = @_;
+	s/[\s\$\.]/_/g;
+	$_;
+    }
+
+    local($sname) = &psou($what);
+
+    $nesting++;
+
+    for $field (split(/;/, $struct{$what})) {
+	$pad = $prepad = 0;
+	$entry = '';
+	($fieldname, $typeno, $count, $offset, $length) = split(/,/, $field);
+
+	$type = $type[$typeno];
+
+	$type =~ /([^[]*)(\[.*\])?/;
+	$mytype = $1;
+	$count .= $2;
+	$fieldtype = &psou($mytype);
+
+	local($fname) = &psou($name);
+
+	if ($build_templates) {
+
+	    $pad = ($offset - ($lastoffset + $lastlength))/8
+		if defined $lastoffset;
+
+	    if (! $finished_template{$sname}) {
+		if ($isaunion{$what}) {
+		    $template{$sname} .= 'X' x $revpad . ' '    if $revpad;
+		} else {
+		    $template{$sname} .= 'x' x $pad    . ' '    if $pad;
+		}
+	    }
+
+	    $template = &fetch_template($type);
+	    &repeat_template($template,$count);
+
+	    if (! $finished_template{$sname}) {
+		$template{$sname} .= $template;
+	    }
+
+	    $revpad = $length/8 if $isaunion{$what};
+
+	    ($lastoffset, $lastlength) = ($offset, $length);
+
+	} else {
+	    print '# ' if $perl && $verbose;
+	    $entry = sprintf($pmask1,
+			' ' x ($nesting * $indent) . $fieldtype,
+			"$prefix.$fieldname" . $count);
+
+	    $entry =~ s/(\*+)( )/$2$1/;
+
+	    printf $pmask2,
+		    $entry,
+		    ($base+$offset)/8,
+		    ($bits = ($base+$offset)%8) ? ".$bits" : "  ",
+		    $length/8,
+		    ($bits = $length % 8) ? ".$bits": ""
+			if !$perl || $verbose;
+
+	    if ($perl) {
+		$template = &fetch_template($type);
+		&repeat_template($template,$count);
+	    }
+
+	    if ($perl && $nesting == 1) {
+
+		push(@sizeof, int($length/8) .",\t# $fieldname");
+		push(@offsetof, int($offset/8) .",\t# $fieldname");
+		local($little) = &scrunch($template);
+		push(@typedef, "'$little', \t# $fieldname");
+		$type =~ s/(struct|union) //;
+		push(@typeof, "'$mytype" . ($count ? $count : '') .
+		    "',\t# $fieldname");
+		push(@fieldnames, "'$fieldname',");
+	    }
+
+	    print '  ', ' ' x $indent x $nesting, $template
+				if $perl && $verbose;
+
+	    print "\n" if !$perl || $verbose;
+
+	}
+	if ($perl) {
+	    local($mycount) = defined $struct{$mytype} ? $countof{$mytype} : 1;
+	    $mycount *= &scripts2count($count) if $count;
+	    if ($nesting==1 && !$build_templates) {
+		$pcode .= sprintf("sub %-32s { %4d; }\n",
+			"${mname}'${fieldname}", $struct_count);
+		push(@indices, $struct_count);
+	    }
+	    $struct_count += $mycount;
+	}
+
+
+	&pstruct($type, "$prefix.$fieldname", $base+$offset)
+		if $recurse && defined $struct{$type};
+    }
+
+    $countof{$what} = $struct_count unless defined $countof{$whati};
+
+    $template{$sname} .= '$' if $build_templates;
+    $finished_template{$sname}++;
+
+    if ($build_templates && !defined $sizeof{$name}) {
+	local($fmt) = &scrunch($template{$sname});
+	print STDERR "no size for $name, punting with $fmt..." if $debug;
+	eval '$sizeof{$name} = length(pack($fmt, ()))';
+	if ($@) {
+	    chop $@;
+	    warn "couldn't get size for \$name: $@";
+	} else {
+	    print STDERR $sizeof{$name}, "\n" if $debUg;
+	}
+    }
+
+    --$nesting;
+}
+
+
+sub psize {
+    local($me) = @_;
+    local($amstruct) = $struct{$me} ?  'struct ' : '';
+
+    print '$sizeof{\'', $amstruct, $me, '\'} = ';
+    printf "%d;\n", $sizeof{$me};
+}
+
+sub pdecl {
+    local($pdecl) = @_;
+    local(@pdecls);
+    local($tname);
+
+    warn "pdecl: $pdecl\n" if $debug;
+
+    $pdecl =~ s/\(\d+,(\d+)\)/$1/g;
+    $pdecl =~ s/\*//g;
+    @pdecls = split(/=/, $pdecl);
+    $typeno = $pdecls[0];
+    $tname = pop @pdecls;
+
+    if ($tname =~ s/^f//) { $tname = "$tname&"; }
+    #else { $tname = "$tname*"; }
+
+    for (reverse @pdecls) {
+	$tname  .= s/^f// ? "&" : "*";
+	#$tname =~ s/^f(.*)/$1&/;
+	print "type[$_] is $tname\n" if $debug;
+	$type[$_] = $tname unless defined $type[$_];
+    }
+}
+
+
+
+sub adecl {
+    ($arraytype, $unknown, $lower, $upper) = ();
+    #local($typeno);
+    # global $typeno, @type
+    local($_, $typedef) = @_;
+
+    while (s/^((\d+|\(\d+,\d+\))=)?ar(\d+|\(\d+,\d+\));//) {
+	($arraytype, $unknown) = ($2, $3);
+	$arraytype = &typeno($arraytype);
+	$unknown = &typeno($unknown);
+	if (s/^(\d+);(\d+);//) {
+	    ($lower, $upper) = ($1, $2);
+	    $scripts .= '[' .  ($upper+1) . ']';
+	} else {
+	    warn "can't find array bounds: $_";
+	}
+    }
+    if (s/^([(,)\d*f=]*),(\d+),(\d+);//) {
+	($start, $length) = ($2, $3);
+	$whatis = $1;
+	if ($whatis =~ /^(\d+|\(\d+,\d+\))=/) {
+	    $typeno = &typeno($1);
+	    &pdecl($whatis);
+	} else {
+	    $typeno = &typeno($whatis);
+	}
+    } elsif (s/^(\d+)(=[*suf]\d*)//) {
+	local($whatis) = $2;
+
+	if ($whatis =~ /[f*]/) {
+	    &pdecl($whatis);
+	} elsif ($whatis =~ /[su]/) {  #
+	    print "$prefix.$fieldname is an array$scripts anon structs; disgusting\n"
+		if $debug;
+	    #$type[$typeno] = $name unless defined $type[$typeno];
+	    ##printf "new type $typeno is $name" if $debug;
+	    $typeno = $1;
+	    $type[$typeno] = "$prefix.$fieldname";
+	    local($name) = $type[$typeno];
+	    &sou($name, $whatis);
+	    $_ = &sdecl($name, $_, $start+$offset);
+	    1;
+	    $start = $start{$name};
+	    $offset = $sizeof{$name};
+	    $length = $offset;
+	} else {
+	    warn "what's this? $whatis in $line ";
+	}
+    } elsif (/^\d+$/) {
+	$typeno = $_;
+    } else {
+	warn "bad array stab: $_ in $line ";
+	next STAB;
+    }
+    #local($wasdef) = defined($type[$typeno]) && $debug;
+    #if ($typedef) {
+	#print "redefining $type[$typeno] to " if $wasdef;
+	#$type[$typeno] = "$whatis$scripts"; # unless defined $type[$typeno];
+	#print "$type[$typeno]\n" if $wasdef;
+    #} else {
+	#$type[$arraytype] = $type[$typeno] unless defined $type[$arraytype];
+    #}
+    $type[$arraytype] = "$type[$typeno]$scripts" if defined $type[$typeno];
+    print "type[$arraytype] is $type[$arraytype]\n" if $debug;
+    print "$prefix.$fieldname is an array of $type[$arraytype]\n" if $debug;
+    $_;
+}
+
+
+
+sub sdecl {
+    local($prefix, $_, $offset) = @_;
+
+    local($fieldname, $scripts, $type, $arraytype, $unknown,
+    $whatis, $pdecl, $upper,$lower, $start,$length) = ();
+    local($typeno,$sou);
+
+
+SFIELD:
+    while (/^([^;]+);/) {
+	$scripts = '';
+	warn "sdecl $_\n" if $debug;
+	if (s/^([\$\w]+)://) {
+	    $fieldname = $1;
+	} elsif (s/(\d+)=([us])(\d+|\(\d+,\d+\))//) { #
+	    $typeno = &typeno($1);
+	    $type[$typeno] = "$prefix.$fieldname";
+	    local($name) = "$prefix.$fieldname";
+	    &sou($name,$2);
+	    $_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	    $start = $start{$name};
+	    $offset += $sizeof{$name};
+	    #print "done with anon, start is $start, offset is $offset\n";
+	    #next SFIELD;
+	} else  {
+	    warn "weird field $_ of $line" if $debug;
+	    next STAB;
+	    #$fieldname = &gensym;
+	    #$_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	}
+
+	if (/^(\d+|\(\d+,\d+\))=ar/) {
+	    $_ = &adecl($_);
+	}
+	elsif (s/^(\d+|\(\d+,\d+\))?,(\d+),(\d+);//) {
+          ($start, $length) =  ($2, $3);
+          &panic("no length?") unless $length;
+          $typeno = &typeno($1) if $1;
+        }
+        elsif (s/^(\d+)=xs\w+:,(\d+),(\d+);//) {
+	    ($start, $length) =  ($2, $3);
+	    &panic("no length?") unless $length;
+	    $typeno = &typeno($1) if $1;
+	}
+	elsif (s/^((\d+|\(\d+,\d+\))(=[*f](\d+|\(\d+,\d+\)))+),(\d+),(\d+);//) {
+	    ($pdecl, $start, $length) =  ($1,$5,$6);
+	    &pdecl($pdecl);
+	}
+	elsif (s/(\d+)=([us])(\d+|\(\d+,\d+\))//) { # the dratted anon struct
+	    ($typeno, $sou) = ($1, $2);
+	    $typeno = &typeno($typeno);
+	    if (defined($type[$typeno])) {
+		warn "now how did we get type $1 in $fieldname of $line?";
+	    } else {
+		print "anon type $typeno is $prefix.$fieldname\n" if $debug;
+		$type[$typeno] = "$prefix.$fieldname" unless defined $type[$typeno];
+	    };
+	    local($name) = "$prefix.$fieldname";
+	    &sou($name,$sou);
+	    print "anon ".($isastruct{$name}) ? "struct":"union"." for $prefix.$fieldname\n" if $debug;
+	    $type[$typeno] = "$prefix.$fieldname";
+	    $_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	    $start = $start{$name};
+	    $length = $sizeof{$name};
+	}
+	else {
+	    warn "can't grok stab for $name ($_) in line $line ";
+	    next STAB;
+	}
+
+	&panic("no length for $prefix.$fieldname") unless $length;
+	$struct{$name} .= join(',', $fieldname, $typeno, $scripts, $start, $length) . ';';
+    }
+    if (s/;\d*,(\d+),(\d+);//) {
+	local($start, $size) = ($1, $2);
+	$sizeof{$prefix} = $size;
+	print "start of $prefix is $start, size of $sizeof{$prefix}\n" if $debug;
+	$start{$prefix} = $start;
+    }
+    $_;
+}
+
+sub edecl {
+    s/;$//;
+    $enum{$name} = $_;
+    $_ = '';
+}
+
+sub resolve_types {
+    local($sou);
+    for $i (0 .. $#type) {
+	next unless defined $type[$i];
+	$_ = $type[$i];
+	unless (/\d/) {
+	    print "type[$i] $type[$i]\n" if $debug;
+	    next;
+	}
+	print "type[$i] $_ ==> " if $debug;
+	s/^(\d+)(\**)\&\*(\**)/"$2($3".&type($1) . ')()'/e;
+	s/^(\d+)\&/&type($1)/e;
+	s/^(\d+)/&type($1)/e;
+	s/(\*+)([^*]+)(\*+)/$1$3$2/;
+	s/\((\*+)(\w+)(\*+)\)/$3($1$2)/;
+	s/^(\d+)([\*\[].*)/&type($1).$2/e;
+	#s/(\d+)(\*|(\[[\[\]\d\*]+]\])+)/&type($1).$2/ge;
+	$type[$i] = $_;
+	print "$_\n" if $debug;
+    }
+}
+sub type { &psou($type[$_[0]] || "<UNDEFINED>"); }
+
+sub adjust_start_addrs {
+    for (sort keys %start) {
+	($basename = $_) =~ s/\.[^.]+$//;
+	$start{$_} += $start{$basename};
+	print "start: $_ @ $start{$_}\n" if $debug;
+    }
+}
+
+sub sou {
+    local($what, $_) = @_;
+    /u/ && $isaunion{$what}++;
+    /s/ && $isastruct{$what}++;
+}
+
+sub psou {
+    local($what) = @_;
+    local($prefix) = '';
+    if ($isaunion{$what})  {
+	$prefix = 'union ';
+    } elsif ($isastruct{$what})  {
+	$prefix = 'struct ';
+    }
+    $prefix . $what;
+}
+
+sub scrunch {
+    local($_) = @_;
+
+    return '' if $_ eq '';
+
+    study;
+
+    s/\$//g;
+    s/  / /g;
+    1 while s/(\w) \1/$1$1/g;
+
+    # i wanna say this, but perl resists my efforts:
+    #	   s/(\w)(\1+)/$2 . length($1)/ge;
+
+    &quick_scrunch;
+
+    s/ $//;
+
+    $_;
+}
+
+sub buildscrunchlist {
+    $scrunch_code = "sub quick_scrunch {\n";
+    for (values %intrinsics) {
+        $scrunch_code .= "\ts/(${_}{2,})/'$_' . length(\$1)/ge;\n";
+    }
+    $scrunch_code .= "}\n";
+    print "$scrunch_code" if $debug;
+    eval $scrunch_code;
+    &panic("can't eval scrunch_code $@ \nscrunch_code") if $@;
+}
+
+sub fetch_template {
+    local($mytype) = @_;
+    local($fmt);
+    local($count) = 1;
+
+    &panic("why do you care?") unless $perl;
+
+    if ($mytype =~ s/(\[\d+\])+$//) {
+	$count .= $1;
+    }
+
+    if ($mytype =~ /\*/) {
+	$fmt = $template{'pointer'};
+    }
+    elsif (defined $template{$mytype}) {
+	$fmt = $template{$mytype};
+    }
+    elsif (defined $struct{$mytype}) {
+	if (!defined $template{&psou($mytype)}) {
+	    &build_template($mytype) unless $mytype eq $name;
+	}
+	elsif ($template{&psou($mytype)} !~ /\$$/) {
+	    #warn "incomplete template for $mytype\n";
+	}
+	$fmt = $template{&psou($mytype)} || '?';
+    }
+    else {
+	warn "unknown fmt for $mytype\n";
+	$fmt = '?';
+    }
+
+    $fmt x $count . ' ';
+}
+
+sub compute_intrinsics {
+    &safedir;
+    local($TMP) = "$SAFEDIR/c2ph-i.$$.c";
+    open (TMP, ">$TMP") || die "can't open $TMP: $!";
+    select(TMP);
+
+    print STDERR "computing intrinsic sizes: " if $trace;
+
+    undef %intrinsics;
+
+    print <<'EOF';
+main() {
+    char *mask = "%d %s\n";
+EOF
+
+    for $type (@intrinsics) {
+	next if !$type || $type eq 'void' || $type =~ /complex/; # sun stuff
+	print <<"EOF";
+    printf(mask,sizeof($type), "$type");
+EOF
+    }
+
+    print <<'EOF';
+    printf(mask,sizeof(char *), "pointer");
+    exit(0);
+}
+EOF
+    close TMP;
+
+    select(STDOUT);
+    open(PIPE, "cd $SAFEDIR && $CC $TMP && $SAFEDIR/a.out|");
+    while (<PIPE>) {
+	chop;
+	split(' ',$_,2);;
+	print "intrinsic $_[1] is size $_[0]\n" if $debug;
+	$sizeof{$_[1]} = $_[0];
+	$intrinsics{$_[1]} = $template{$_[0]};
+    }
+    close(PIPE) || die "couldn't read intrinsics!";
+    unlink($TMP, "$SAFEDIR/a.out");
+    print STDERR "done\n" if $trace;
+}
+
+sub scripts2count {
+    local($_) = @_;
+
+    s/^\[//;
+    s/\]$//;
+    s/\]\[/*/g;
+    $_ = eval;
+    &panic("$_: $@") if $@;
+    $_;
+}
+
+sub system {
+    print STDERR "@_\n" if $trace;
+    system @_;
+}
+
+sub build_template {
+    local($name) = @_;
+
+    &panic("already got a template for $name") if defined $template{$name};
+
+    local($build_templates) = 1;
+
+    local($lparen) = '(' x $build_recursed;
+    local($rparen) = ')' x $build_recursed;
+
+    print STDERR "$lparen$name$rparen " if $trace;
+    $build_recursed++;
+    &pstruct($name,$name,0);
+    print STDERR "TEMPLATE for $name is ", $template{&psou($name)}, "\n" if $debug;
+    --$build_recursed;
+}
+
+
+sub panic {
+
+    select(STDERR);
+
+    print "\npanic: @_\n";
+
+    exit 1 if $] <= 4.003;  # caller broken
+
+    local($i,$_);
+    local($p,$f,$l,$s,$h,$a,@a,@sub);
+    for ($i = 0; ($p,$f,$l,$s,$h,$w) = caller($i); $i++) {
+	@a = @DB'args;
+	for (@a) {
+	    if (/^StB\000/ && length($_) == length($_main{'_main'})) {
+		$_ = sprintf("%s",$_);
+	    }
+	    else {
+		s/'/\\'/g;
+		s/([^\0]*)/'$1'/ unless /^-?[\d.]+$/;
+		s/([\200-\377])/sprintf("M-%c",ord($1)&0177)/eg;
+		s/([\0-\37\177])/sprintf("^%c",ord($1)^64)/eg;
+	    }
+	}
+	$w = $w ? '@ = ' : '$ = ';
+	$a = $h ? '(' . join(', ', @a) . ')' : '';
+	push(@sub, "$w&$s$a from file $f line $l\n");
+	last if $signal;
+    }
+    for ($i=0; $i <= $#sub; $i++) {
+	last if $signal;
+	print $sub[$i];
+    }
+    exit 1;
+}
+
+sub squishseq {
+    local($num);
+    local($last) = -1e8;
+    local($string);
+    local($seq) = '..';
+
+    while (defined($num = shift)) {
+        if ($num == ($last + 1)) {
+            $string .= $seq unless $inseq++;
+            $last = $num;
+            next;
+        } elsif ($inseq) {
+            $string .= $last unless $last == -1e8;
+        }
+
+        $string .= ',' if defined $string;
+        $string .= $num;
+        $last = $num;
+        $inseq = 0;
+    }
+    $string .= $last if $inseq && $last != -e18;
+    $string;
+}
+
+sub repeat_template {
+    #  local($template, $scripts) = @_;  have to change caller's values
+
+    if ( $_[1] ) {
+	local($ncount) = &scripts2count($_[1]);
+	if ($_[0] =~ /^\s*c\s*$/i) {
+	    $_[0] = "A$ncount ";
+	    $_[1] = '';
+	} else {
+	    $_[0] = $template x $ncount;
+	}
+    }
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cal.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cal.exe
new file mode 100644
index 00000000..d492c143
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cal.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/captoinfo b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/captoinfo
new file mode 100644
index 00000000..465f7ff1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/captoinfo differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cat.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cat.exe
new file mode 100644
index 00000000..703c7397
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cat.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chcon.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chcon.exe
new file mode 100644
index 00000000..601477f4
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chcon.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chgrp.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chgrp.exe
new file mode 100644
index 00000000..3acc9ec3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chgrp.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chmod.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chmod.exe
new file mode 100644
index 00000000..157a688b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chmod.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chown.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chown.exe
new file mode 100644
index 00000000..680108a5
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chown.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chroot.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chroot.exe
new file mode 100644
index 00000000..a9faed21
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/chroot.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cksum.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cksum.exe
new file mode 100644
index 00000000..74632364
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cksum.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/clear.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/clear.exe
new file mode 100644
index 00000000..a7eaaefc
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/clear.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/col.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/col.exe
new file mode 100644
index 00000000..4d848716
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/col.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colcrt.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colcrt.exe
new file mode 100644
index 00000000..ccc8d898
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colcrt.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colrm.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colrm.exe
new file mode 100644
index 00000000..779f0af1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/colrm.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/column.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/column.exe
new file mode 100644
index 00000000..2cbcb8f7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/column.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/comm.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/comm.exe
new file mode 100644
index 00000000..12d6d37c
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/comm.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/corelist b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/corelist
new file mode 100644
index 00000000..5ffaf495
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/corelist
@@ -0,0 +1,491 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+
+=head1 NAME
+
+corelist - a commandline frontend to Module::CoreList
+
+=head1 DESCRIPTION
+
+See L<Module::CoreList> for one.
+
+=head1 SYNOPSIS
+
+   corelist -v
+   corelist [-a|-d] <ModuleName> | /<ModuleRegex>/ [<ModuleVersion>] ...
+   corelist [-v <PerlVersion>] [ <ModuleName> | /<ModuleRegex>/ ] ...
+   corelist [-r <PerlVersion>] ...
+   corelist --feature <FeatureName> [<FeatureName>] ...
+   corelist --diff PerlVersion PerlVersion
+   corelist --upstream <ModuleName>
+
+=head1 OPTIONS
+
+=over
+
+=item -a
+
+lists all versions of the given module (or the matching modules, in case you
+used a module regexp) in the perls Module::CoreList knows about.
+
+    corelist -a Unicode
+
+    Unicode was first released with perl v5.6.2
+      v5.6.2     3.0.1
+      v5.8.0     3.2.0
+      v5.8.1     4.0.0
+      v5.8.2     4.0.0
+      v5.8.3     4.0.0
+      v5.8.4     4.0.1
+      v5.8.5     4.0.1
+      v5.8.6     4.0.1
+      v5.8.7     4.1.0
+      v5.8.8     4.1.0
+      v5.8.9     5.1.0
+      v5.9.0     4.0.0
+      v5.9.1     4.0.0
+      v5.9.2     4.0.1
+      v5.9.3     4.1.0
+      v5.9.4     4.1.0
+      v5.9.5     5.0.0
+      v5.10.0    5.0.0
+      v5.10.1    5.1.0
+      v5.11.0    5.1.0
+      v5.11.1    5.1.0
+      v5.11.2    5.1.0
+      v5.11.3    5.2.0
+      v5.11.4    5.2.0
+      v5.11.5    5.2.0
+      v5.12.0    5.2.0
+      v5.12.1    5.2.0
+      v5.12.2    5.2.0
+      v5.12.3    5.2.0
+      v5.12.4    5.2.0
+      v5.13.0    5.2.0
+      v5.13.1    5.2.0
+      v5.13.2    5.2.0
+      v5.13.3    5.2.0
+      v5.13.4    5.2.0
+      v5.13.5    5.2.0
+      v5.13.6    5.2.0
+      v5.13.7    6.0.0
+      v5.13.8    6.0.0
+      v5.13.9    6.0.0
+      v5.13.10   6.0.0
+      v5.13.11   6.0.0
+      v5.14.0    6.0.0
+      v5.14.1    6.0.0
+      v5.15.0    6.0.0
+
+=item -d
+
+finds the first perl version where a module has been released by
+date, and not by version number (as is the default).
+
+=item --diff
+
+Given two versions of perl, this prints a human-readable table of all module
+changes between the two.  The output format may change in the future, and is
+meant for I<humans>, not programs.  For programs, use the L<Module::CoreList>
+API.
+
+=item -? or -help
+
+help! help! help! to see more help, try --man.
+
+=item -man
+
+all of the help
+
+=item -v
+
+lists all of the perl release versions we got the CoreList for.
+
+If you pass a version argument (value of C<$]>, like C<5.00503> or C<5.008008>),
+you get a list of all the modules and their respective versions.
+(If you have the C<version> module, you can also use new-style version numbers,
+like C<5.8.8>.)
+
+In module filtering context, it can be used as Perl version filter.
+
+=item -r
+
+lists all of the perl releases and when they were released
+
+If you pass a perl version you get the release date for that version only.
+
+=item --feature, -f
+
+lists the first version bundle of each named feature given
+
+=item --upstream, -u
+
+Shows if the given module is primarily maintained in perl core or on CPAN
+and bug tracker URL.
+
+=back
+
+As a special case, if you specify the module name C<Unicode>, you'll get
+the version number of the Unicode Character Database bundled with the
+requested perl versions.
+
+=cut
+
+use Module::CoreList;
+use Getopt::Long qw(:config no_ignore_case);
+use Pod::Usage;
+use strict;
+use warnings;
+use List::Util qw/maxstr/;
+
+my %Opts;
+
+GetOptions(
+    \%Opts,
+    qw[ help|?! man! r|release:s v|version:s a! d diff|D feature|f u|upstream ]
+);
+
+pod2usage(1) if $Opts{help};
+pod2usage(-verbose=>2) if $Opts{man};
+
+if(exists $Opts{r} ){
+    if ( !$Opts{r} ) {
+        print "\nModule::CoreList has release info for the following perl versions:\n";
+        my $versions = { };
+        my $max_ver_len = max_mod_len(\%Module::CoreList::released);
+        for my $ver ( grep !/0[01]0$/, sort keys %Module::CoreList::released ) {
+          printf "%-${max_ver_len}s    %s\n", format_perl_version($ver), $Module::CoreList::released{$ver};
+        }
+        print "\n";
+        exit 0;
+    }
+
+    my $num_r = numify_version( $Opts{r} );
+    my $version_hash = Module::CoreList->find_version($num_r);
+
+    if( !$version_hash ) {
+        print "\nModule::CoreList has no info on perl $Opts{r}\n\n";
+        exit 1;
+    }
+
+    printf "Perl %s was released on %s\n\n", format_perl_version($num_r), $Module::CoreList::released{$num_r};
+    exit 0;
+}
+
+if(exists $Opts{v} ){
+    if( !$Opts{v} ) {
+        print "\nModule::CoreList has info on the following perl versions:\n";
+        print format_perl_version($_)."\n" for grep !/0[01]0$/, sort keys %Module::CoreList::version;
+        print "\n";
+        exit 0;
+    }
+
+    my $num_v = numify_version( $Opts{v} );
+    my $version_hash = Module::CoreList->find_version($num_v);
+
+    if( !$version_hash ) {
+        print "\nModule::CoreList has no info on perl $Opts{v}\n\n";
+        exit 1;
+    }
+
+    if ( !@ARGV ) {
+	print "\nThe following modules were in perl $Opts{v} CORE\n";
+	my $max_mod_len = max_mod_len($version_hash);
+	for my $mod ( sort keys %$version_hash ) {
+	    printf "%-${max_mod_len}s  %s\n", $mod, $version_hash->{$mod} || "";
+	}
+	print "\n";
+	exit 0;
+    }
+}
+
+if ($Opts{diff}) {
+    if(@ARGV != 2) {
+        die "\nprovide exactly two perl core versions to diff with --diff\n";
+    }
+
+    my ($old_ver, $new_ver) = @ARGV;
+
+    my $old = numify_version($old_ver);
+    my $new = numify_version($new_ver);
+
+    my %diff = Module::CoreList::changes_between($old, $new);
+
+    for my $lib (sort keys %diff) {
+      my $diff = $diff{$lib};
+
+      my $was = ! exists  $diff->{left} ? '(absent)'
+              : ! defined $diff->{left} ? '(undef)'
+              :                          $diff->{left};
+
+      my $now = ! exists  $diff->{right} ? '(absent)'
+              : ! defined $diff->{right} ? '(undef)'
+              :                          $diff->{right};
+
+        printf "%-35s %10s %10s\n", $lib, $was, $now;
+    }
+    exit(0);
+}
+
+if ($Opts{feature}) {
+    die "\n--feature is only available with perl v5.16.0 or greater\n"
+      if $] < 5.016;
+
+    die "\nprovide at least one feature name to --feature\n"
+        unless @ARGV;
+
+    no warnings 'once';
+    require feature;
+
+    my %feature2version;
+    my @bundles =  map { $_->[0] }
+                  sort { $b->[1] <=> $a->[1] }
+                   map { [$_, numify_version($_)] }
+                  grep { not /[^0-9.]/ }
+                  keys %feature::feature_bundle;
+
+    for my $version (@bundles) {
+        $feature2version{$_} = $version =~ /^\d\.\d+$/ ? "$version.0" : $version
+            for @{ $feature::feature_bundle{$version} };
+    }
+
+    # allow internal feature names, just in case someone gives us __SUB__
+    # instead of current_sub.
+    while (my ($name, $internal) = each %feature::feature) {
+        $internal =~ s/^feature_//;
+        $feature2version{$internal} = $feature2version{$name}
+            if $feature2version{$name};
+    }
+
+    my $when = maxstr(values %Module::CoreList::released);
+    print "\n","Data for $when\n";
+
+    for my $feature (@ARGV) {
+        print "feature \"$feature\" ",
+            exists $feature2version{$feature}
+                ? "was first released with the perl "
+                  . format_perl_version(numify_version($feature2version{$feature}))
+                  . " feature bundle\n"
+                : "doesn't exist (or so I think)\n";
+    }
+    exit(0);
+}
+
+if ( !@ARGV ) {
+    pod2usage(0);
+}
+
+while (@ARGV) {
+	my ($mod, $ver);
+	if ($ARGV[0] =~ /=/) {
+	    ($mod, $ver) = split /=/, shift @ARGV;
+	} else {
+	    $mod = shift @ARGV;
+	    $ver = (@ARGV && $ARGV[0] =~ /^\d/) ? shift @ARGV : "";
+	}
+
+	if ($mod !~ m|^/(.*)/([imosx]*)$|) { # not a regex
+	    module_version($mod,$ver);
+	} else {
+	    my $re;
+	    eval { $re = $2 ? qr/(?$2)($1)/ : qr/$1/; }; # trap exceptions while building regex
+	    if ($@) {
+		# regex errors are usually like 'Quantifier follow nothing in regex; marked by ...'
+		# then we drop text after ';' to shorten message
+		my $errmsg = $@ =~ /(.*);/ ? $1 : $@;
+		warn "\n$mod  is a bad regex: $errmsg\n";
+		next;
+	    }
+	    my @mod = Module::CoreList->find_modules($re);
+	    if (@mod) {
+		module_version($_, $ver) for @mod;
+	    } else {
+		$ver |= '';
+		print "\n$mod $ver has no match in CORE (or so I think)\n";
+	    }
+
+	}
+}
+
+exit();
+
+sub module_version {
+    my($mod,$ver) = @_;
+
+    if ( $Opts{v} ) {
+	my $numeric_v = numify_version($Opts{v});
+	my $version_hash = Module::CoreList->find_version($numeric_v);
+	if ($version_hash) {
+	    print $mod, " ", $version_hash->{$mod} || 'undef', "\n";
+	    return;
+	}
+	else { die "Shouldn't happen" }
+    }
+
+    my $ret = $Opts{d}
+	? Module::CoreList->first_release_by_date(@_)
+	: Module::CoreList->first_release(@_);
+    my $msg = $mod;
+    $msg .= " $ver" if $ver;
+
+    my $rem = $Opts{d}
+	? Module::CoreList->removed_from_by_date($mod)
+	: Module::CoreList->removed_from($mod);
+
+	my $when = maxstr(values %Module::CoreList::released);
+    print "\n","Data for $when\n";
+
+    if( defined $ret ) {
+        my $deprecated = Module::CoreList->deprecated_in($mod);
+        $msg .= " was ";
+        $msg .= "first " unless $ver;
+        $msg .= "released with perl " . format_perl_version($ret);
+        $msg .= ( $rem ? ',' : ' and' ) . " deprecated (will be CPAN-only) in " . format_perl_version($deprecated) if $deprecated;
+        $msg .= " and removed from " . format_perl_version($rem) if $rem;
+    } else {
+        $msg .= " was not in CORE (or so I think)";
+    }
+
+    print $msg,"\n";
+
+    if( defined $ret and exists $Opts{u} ) {
+        my $upsream = $Module::CoreList::upstream{$mod};
+        $upsream = 'undef' unless $upsream;
+        print "upstream: $upsream\n";
+        if ( $upsream ne 'blead' ) {
+            my $bugtracker = $Module::CoreList::bug_tracker{$mod};
+            $bugtracker = 'unknown' unless $bugtracker;
+            print "bug tracker: $bugtracker\n";
+        }
+    }
+
+    if(defined $ret and exists $Opts{a} and $Opts{a}){
+        display_a($mod);
+    }
+}
+
+
+sub max_mod_len {
+    my $versions = shift;
+    my $max = 0;
+    for my $mod (keys %$versions) {
+        $max = max($max, length $mod);
+    }
+
+    return $max;
+}
+
+sub max {
+    my($this, $that) = @_;
+    return $this if $this > $that;
+    return $that;
+}
+
+sub display_a {
+    my $mod = shift;
+
+    for my $v (grep !/0[01]0$/, sort keys %Module::CoreList::version ) {
+        next unless exists $Module::CoreList::version{$v}{$mod};
+
+        my $mod_v = $Module::CoreList::version{$v}{$mod} || 'undef';
+        printf "  %-10s %-10s\n", format_perl_version($v), $mod_v;
+    }
+    print "\n";
+}
+
+
+{
+    my $have_version_pm;
+    sub have_version_pm {
+        return $have_version_pm if defined $have_version_pm;
+        return $have_version_pm = eval { require version; 1 };
+    }
+}
+
+
+sub format_perl_version {
+    my $v = shift;
+    return $v if $v < 5.006 or !have_version_pm;
+    return version->new($v)->normal;
+}
+
+
+sub numify_version {
+    my $ver = shift;
+    if ($ver =~ /\..+\./) {
+	have_version_pm()
+	    or die "You need to install version.pm to use dotted version numbers\n";
+        $ver = version->new($ver)->numify;
+    }
+    $ver += 0;
+    return $ver;
+}
+
+=head1 EXAMPLES
+
+    $ corelist File::Spec
+
+    File::Spec was first released with perl 5.005
+
+    $ corelist File::Spec 0.83
+
+    File::Spec 0.83 was released with perl 5.007003
+
+    $ corelist File::Spec 0.89
+
+    File::Spec 0.89 was not in CORE (or so I think)
+
+    $ corelist File::Spec::Aliens
+
+    File::Spec::Aliens  was not in CORE (or so I think)
+
+    $ corelist /IPC::Open/
+
+    IPC::Open2 was first released with perl 5
+
+    IPC::Open3 was first released with perl 5
+
+    $ corelist /MANIFEST/i
+
+    ExtUtils::Manifest was first released with perl 5.001
+
+    $ corelist /Template/
+
+    /Template/  has no match in CORE (or so I think)
+
+    $ corelist -v 5.8.8 B
+
+    B                        1.09_01
+
+    $ corelist -v 5.8.8 /^B::/
+
+    B::Asmdata               1.01
+    B::Assembler             0.07
+    B::Bblock                1.02_01
+    B::Bytecode              1.01_01
+    B::C                     1.04_01
+    B::CC                    1.00_01
+    B::Concise               0.66
+    B::Debug                 1.02_01
+    B::Deparse               0.71
+    B::Disassembler          1.05
+    B::Lint                  1.03
+    B::O                     1.00
+    B::Showlex               1.02
+    B::Stackobj              1.00
+    B::Stash                 1.00
+    B::Terse                 1.03_01
+    B::Xref                  1.01
+
+=head1 COPYRIGHT
+
+Copyright (c) 2002-2007 by D.H. aka PodMaster
+
+Currently maintained by the perl 5 porters E<lt>perl5-porters@perl.orgE<gt>.
+
+This program is distributed under the same terms as perl itself.
+See http://perl.org/ or http://cpan.org/ for more info on that.
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cp.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cp.exe
new file mode 100644
index 00000000..6b0e2917
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cp.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cpan b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cpan
new file mode 100644
index 00000000..16a3f309
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cpan
@@ -0,0 +1,324 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/local/bin/perl
+
+use strict;
+use vars qw($VERSION);
+
+use App::Cpan '1.60_02';
+$VERSION = '1.61';
+
+my $rc = App::Cpan->run( @ARGV );
+
+# will this work under Strawberry Perl?
+exit( $rc || 0 );
+
+=head1 NAME
+
+cpan - easily interact with CPAN from the command line
+
+=head1 SYNOPSIS
+
+	# with arguments and no switches, installs specified modules
+	cpan module_name [ module_name ... ]
+
+	# with switches, installs modules with extra behavior
+	cpan [-cfgimtTw] module_name [ module_name ... ]
+
+	# with just the dot, install from the distribution in the
+	# current directory
+	cpan .
+
+	# without arguments, starts CPAN.pm shell
+	cpan
+
+	# force install modules (usually those that fail tests)
+	cpan -f module_name [ module_name ... ]
+
+	# install modules but without testing them
+	cpan -T module_name [ module_name ... ]
+
+	# dump the configuration
+	cpan -J
+
+	# load a different configuration to install Module::Foo
+	cpan -j some/other/file Module::Foo
+
+	# without arguments, but some switches
+	cpan [-ahrvACDlLO]
+
+=head1 DESCRIPTION
+
+This script provides a command interface (not a shell) to CPAN. At the
+moment it uses CPAN.pm to do the work, but it is not a one-shot command
+runner for CPAN.pm.
+
+=head2 Options
+
+=over 4
+
+=item -a
+
+Creates a CPAN.pm autobundle with CPAN::Shell->autobundle.
+
+=item -A module [ module ... ]
+
+Shows the primary maintainers for the specified modules.
+
+=item -c module
+
+Runs a `make clean` in the specified module's directories.
+
+=item -C module [ module ... ]
+
+Show the F<Changes> files for the specified modules
+
+=item -D module [ module ... ]
+
+Show the module details.
+
+=item -f
+
+Force the specified action, when it normally would have failed. Use this
+to install a module even if its tests fail. When you use this option,
+-i is not optional for installing a module when you need to force it:
+
+	% cpan -f -i Module::Foo
+
+=item -F
+
+Turn off CPAN.pm's attempts to lock anything. You should be careful with
+this since you might end up with multiple scripts trying to muck in the
+same directory. This isn't so much of a concern if you're loading a special
+config with C<-j>, and that config sets up its own work directories.
+
+=item -g module [ module ... ]
+
+Downloads to the current directory the latest distribution of the module.
+
+=item -G module [ module ... ]
+
+UNIMPLEMENTED
+
+Download to the current directory the latest distribution of the
+modules, unpack each distribution, and create a git repository for each
+distribution.
+
+If you want this feature, check out Yanick Champoux's C<Git::CPAN::Patch>
+distribution.
+
+=item -h
+
+Print a help message and exit. When you specify C<-h>, it ignores all
+of the other options and arguments.
+
+=item -i
+
+Install the specified modules.
+
+=item -I
+
+Load C<local::lib> (think like C<-I> for loading lib paths).
+
+=item -j Config.pm
+
+Load the file that has the CPAN configuration data. This should have the
+same format as the standard F<CPAN/Config.pm> file, which defines
+C<$CPAN::Config> as an anonymous hash.
+
+=item -J
+
+Dump the configuration in the same format that CPAN.pm uses. This is useful
+for checking the configuration as well as using the dump as a starting point
+for a new, custom configuration.
+
+=item -l
+
+List all installed modules with their versions
+
+=item -L author [ author ... ]
+
+List the modules by the specified authors.
+
+=item -m
+
+Make the specified modules.
+
+=item -O
+
+Show the out-of-date modules.
+
+=item -p
+
+Ping the configured mirrors
+
+=item -P
+
+Find the best mirrors you could be using (but doesn't configure them just yet)
+
+=item -r
+
+Recompiles dynamically loaded modules with CPAN::Shell->recompile.
+
+=item -t
+
+Run a `make test` on the specified modules.
+
+=item -T
+
+Do not test modules. Simply install them.
+
+=item -u
+
+Upgrade all installed modules. Blindly doing this can really break things,
+so keep a backup.
+
+=item -v
+
+Print the script version and CPAN.pm version then exit.
+
+=item -V
+
+Print detailed information about the cpan client.
+
+=item -w
+
+UNIMPLEMENTED
+
+Turn on cpan warnings. This checks various things, like directory permissions,
+and tells you about problems you might have.
+
+=back
+
+=head2 Examples
+
+	# print a help message
+	cpan -h
+
+	# print the version numbers
+	cpan -v
+
+	# create an autobundle
+	cpan -a
+
+	# recompile modules
+	cpan -r
+
+	# upgrade all installed modules
+	cpan -u
+
+	# install modules ( sole -i is optional )
+	cpan -i Netscape::Booksmarks Business::ISBN
+
+	# force install modules ( must use -i )
+	cpan -fi CGI::Minimal URI
+
+=head1 ENVIRONMENT VARIABLES
+
+=over 4
+
+There are several components in CPAN.pm that use environment variables.
+The build tools, L<ExtUtils::MakeMaker> and L<Module::Build> use some,
+while others matter to the levels above them. Some of these are specified
+by the Perl Toolchain Gang:
+
+Lancaster Concensus: L<https://github.com/Perl-Toolchain-Gang/toolchain-site/blob/master/lancaster-consensus.md>
+
+Oslo Concensus: L<https://github.com/Perl-Toolchain-Gang/toolchain-site/blob/master/oslo-consensus.md>
+
+=over 4
+
+=item CPAN_OPTS
+
+C<cpan> splits this variable on whitespace and prepends that list to C<@ARGV>
+before it processes the command-line arguments. For instance, if you always
+want to use C<local:lib>, you can set C<CPAN_OPTS> to C<-I>.
+
+=item CPANSCRIPT_LOGLEVEL
+
+The log level to use, with either the embedded, minimal logger or
+L<Log::Log4perl> if it is installed. Possible values are the same as
+the C<Log::Log4perl> levels: C<TRACE>, C<DEBUG>, C<INFO>, C<WARN>,
+C<ERROR>, and C<FATAL>. The default is C<INFO>.
+
+=item GIT_COMMAND
+
+The path to the C<git> binary to use for the Git features. The default
+is C</usr/local/bin/git>.
+
+=item NONINTERACTIVE_TESTING
+
+Assume no one is paying attention and skips prompts for distributions
+that do that correctly. C<cpan(1)> sets this to C<1> unless it already
+has a value (even if that value is false).
+
+=item PERL_MM_USE_DEFAULT
+
+Use the default answer for a prompted questions. C<cpan(1)> sets this
+to C<1> unless it already has a value (even if that value is false).
+
+=back
+
+=back
+
+=head1 EXIT VALUES
+
+The script exits with zero if it thinks that everything worked, or a
+positive number if it thinks that something failed. Note, however, that
+in some cases it has to divine a failure by the output of things it does
+not control. For now, the exit codes are vague:
+
+	1	An unknown error
+
+	2	The was an external problem
+
+	4	There was an internal problem with the script
+
+	8	A module failed to install
+
+=head1 TO DO
+
+* one shot configuration values from the command line
+
+=head1 BUGS
+
+* none noted
+
+=head1 SEE ALSO
+
+Most behaviour, including environment variables and configuration,
+comes directly from CPAN.pm.
+
+=head1 SOURCE AVAILABILITY
+
+This code is in Github in the CPAN.pm repository:
+
+	https://github.com/andk/cpanpm
+
+The source used to be tracked separately in another GitHub repo,
+but the canonical source is now in the above repo.
+
+=head1 CREDITS
+
+Japheth Cleaver added the bits to allow a forced install (-f).
+
+Jim Brandt suggest and provided the initial implementation for the
+up-to-date and Changes features.
+
+Adam Kennedy pointed out that exit() causes problems on Windows
+where this script ends up with a .bat extension
+
+=head1 AUTHOR
+
+brian d foy, C<< <bdfoy@cpan.org> >>
+
+=head1 COPYRIGHT
+
+Copyright (c) 2001-2014, brian d foy, All Rights Reserved.
+
+You may redistribute this under the same terms as Perl itself.
+
+=cut
+
+1;
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cpp.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cpp.exe
new file mode 100644
index 00000000..68f15ece
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/csplit.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/csplit.exe
new file mode 100644
index 00000000..14055680
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/csplit.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cut.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cut.exe
new file mode 100644
index 00000000..de75b64b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cut.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygattr-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygattr-1.dll
new file mode 100644
index 00000000..cca9601a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygattr-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygblkid-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygblkid-1.dll
new file mode 100644
index 00000000..f903355f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygblkid-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygbz2-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygbz2-1.dll
new file mode 100644
index 00000000..e37480be
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygbz2-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcheck.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcheck.exe
new file mode 100644
index 00000000..f1a402ab
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcheck.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcrypt-0.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcrypt-0.dll
new file mode 100644
index 00000000..79b4b8d4
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygcrypt-0.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb-4.8.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb-4.8.dll
new file mode 100644
index 00000000..bf50d733
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb-4.8.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb_cxx-4.8.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb_cxx-4.8.dll
new file mode 100644
index 00000000..0bf79940
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygdb_cxx-4.8.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygformw-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygformw-10.dll
new file mode 100644
index 00000000..65646f91
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygformw-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggcc_s-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggcc_s-1.dll
new file mode 100644
index 00000000..d8eff1de
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggcc_s-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm-4.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm-4.dll
new file mode 100644
index 00000000..b47f3dc6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm-4.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm_compat-4.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm_compat-4.dll
new file mode 100644
index 00000000..0d10ffd3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggdbm_compat-4.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggmp-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggmp-10.dll
new file mode 100644
index 00000000..85d83661
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyggmp-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygguile-17.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygguile-17.dll
new file mode 100644
index 00000000..d9578cb6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygguile-17.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyghistory7.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyghistory7.dll
new file mode 100644
index 00000000..8ca139e9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyghistory7.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygiconv-2.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygiconv-2.dll
new file mode 100644
index 00000000..ecff43bf
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygiconv-2.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygintl-8.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygintl-8.dll
new file mode 100644
index 00000000..8a3cef6d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygintl-8.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa-config b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa-config
new file mode 100644
index 00000000..076a1669
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa-config
@@ -0,0 +1,123 @@
+#!/bin/bash
+#
+# cyglsa-config, Copyright 2006, 2010 Red Hat Inc.
+#
+#     This program is free software; you can redistribute it and/or modify
+#     it under the terms of the GNU General Public License as published by
+#     the Free Software Foundation; either version 2 of the License, or
+#     (at your option) any later version.
+#
+#     A copy of the GNU General Public License can be found at
+#     http://www.gnu.org/
+#
+# This file is part of the Cygwin LSA authentication package.
+
+request()
+{
+  if [ "${auto_answer}" = "yes" ]
+  then
+    echo "$1 (yes/no) yes"
+    return 0
+  elif [ "${auto_answer}" = "no" ]
+  then
+    echo "$1 (yes/no) no"
+    return 1
+  fi
+
+  answer=""
+  while [ "X${answer}" != "Xyes" -a "X${answer}" != "Xno" ]
+  do
+    echo -n "$1 (yes/no) "
+    read -e answer
+  done
+  if [ "X${answer}" = "Xyes" ]
+  then
+    return 0
+  else
+    return 1
+  fi
+}
+
+# Check if running under at least Windows 2000
+_nt_too_old=`uname | awk -F- '{print ( $2 < 5.0 ) ? 1 : 0;}'`
+if [ ${_nt_too_old} -eq 1 ]
+then
+  echo "Cygwin LSA authentication not supported on Windows NT4 or older.  Exiting."
+  exit 1
+fi
+
+# Directory in which cyglsa DLL is installed as DOS path.
+bindir=`cygpath -w /`\\bin
+
+# Check if we're running on 64 bit Windows.  If so, we need the 64 bit
+# cyglsa DLL.
+dll=cyglsa.dll
+test -d `cygpath -p ${SYSTEMROOT}`/SysWOW64 && dll=cyglsa64.dll
+
+# Check if the DLL is actually installed.  If not, bail out.
+if [ ! -f /bin/${dll} ]
+then
+  echo "Required Cygwin authentication DLL /bin/${dll} doesn't exist.  Exiting."
+  exit 1
+fi
+
+echo
+echo "Warning: Registering the Cygwin LSA authentication package requires"
+echo "administrator privileges!  You also have to reboot the machine to"
+echo "activate the change."
+echo
+request "Are you sure you want to continue?" || exit 0
+
+# The registry value which keeps the authentication packages.
+value='/HKEY_LOCAL_MACHINE/SYSTEM/CurrentControlSet/Control/Lsa/Authentication Packages'
+
+[ -f /bin/cyglsa -a ! -d /bin/cyglsa ] && rm -rf /bin/cyglsa
+if [ ! -d /bin/cyglsa ]
+then
+  if ! mkdir -m 755 /bin/cyglsa
+  then
+    echo "Creating the /bin/cyglsa directory failed.  Exiting."
+    exit 1
+  fi
+fi
+if ! cp -b "/bin/${dll}" "/bin/cyglsa/${dll}"
+then
+    echo "Copying the new LSA authentication package /bin/${dll} to"
+    echo "/bin/cyglsa/${dll} failed.  Exiting."
+    exit 1
+fi
+
+# Get old content, remove every trace of "cyglsa" from it and write the
+# content back to the registry with the new, correct path to the cyglsa DLL.
+old=`regtool get "${value}"`
+new=`for i in ${old}
+do
+  echo $i | GREP_OPTIONS="" grep -v cyglsa
+done`
+if ! regtool set "${value}" ${new} "${bindir}\\cyglsa\\${dll}"
+then
+  echo "Setting the new registry value failed.  Exiting."
+  exit 1
+fi
+
+echo
+echo "Cygwin LSA authentication package registered."
+echo
+echo "Activating Cygwin's LSA authentication package requires to reboot."
+if [ -x /bin/shutdown ]
+then
+  if request "Do you want to do this immediately?"
+  then
+    echo
+    echo "Other users might still be working on this machine."
+    echo
+    if request "Are you sure?"
+    then
+      echo
+      echo "Ok, will reboot in 30 seconds."
+      echo
+      echo "If you change your mind, call 'shutdown -a' within 30 seconds"
+      shutdown -r 30
+    fi
+  fi
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa.dll
new file mode 100644
index 00000000..3bcfe075
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa64.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa64.dll
new file mode 100644
index 00000000..417a4f74
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglsa64.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygltdl-7.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygltdl-7.dll
new file mode 100644
index 00000000..4e53257d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygltdl-7.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglzma-5.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglzma-5.dll
new file mode 100644
index 00000000..54f3420c
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyglzma-5.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmagic-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmagic-1.dll
new file mode 100644
index 00000000..d725f414
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmagic-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmenuw-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmenuw-10.dll
new file mode 100644
index 00000000..07eed86a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmenuw-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmpfr-4.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmpfr-4.dll
new file mode 100644
index 00000000..029325b0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygmpfr-4.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncurses++w-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncurses++w-10.dll
new file mode 100644
index 00000000..38220823
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncurses++w-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncursesw-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncursesw-10.dll
new file mode 100644
index 00000000..7071e4ca
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygncursesw-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpanelw-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpanelw-10.dll
new file mode 100644
index 00000000..aeacb22d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpanelw-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpath.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpath.exe
new file mode 100644
index 00000000..bf5ecf27
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpath.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpcre-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpcre-1.dll
new file mode 100644
index 00000000..a3296fe9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpcre-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygperl5_22.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygperl5_22.dll
new file mode 100644
index 00000000..7ba88f85
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygperl5_22.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpopt-0.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpopt-0.dll
new file mode 100644
index 00000000..1263b739
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygpopt-0.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygreadline7.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygreadline7.dll
new file mode 100644
index 00000000..d0f00826
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygreadline7.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygserver-config b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygserver-config
new file mode 100644
index 00000000..abe943c3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygserver-config
@@ -0,0 +1,209 @@
+#!/bin/bash
+#
+# cygserver-config, Copyright 2003 Red Hat Inc.
+#
+# This file is part of the Cygwin DLL.
+
+# Directory where the config files are stored
+SYSCONFDIR=/etc
+LOCALSTATEDIR=/var
+
+progname=$0
+auto_answer=""
+service_name=cygserver
+
+request()
+{
+  if [ "${auto_answer}" = "yes" ]
+  then
+    echo "$1 (yes/no) yes"
+    return 0
+  elif [ "${auto_answer}" = "no" ]
+  then
+    echo "$1 (yes/no) no"
+    return 1
+  fi
+
+  answer=""
+  while [ "X${answer}" != "Xyes" -a "X${answer}" != "Xno" ]
+  do
+    echo -n "$1 (yes/no) "
+    read -e answer
+  done
+  if [ "X${answer}" = "Xyes" ]
+  then
+    return 0
+  else
+    return 1
+  fi
+}
+
+# Check options
+
+while :
+do
+  case $# in
+  0)
+    break
+    ;;
+  esac
+
+  option=$1
+  shift
+
+  case "${option}" in
+  -d | --debug )
+    set -x
+    ;;
+
+  -y | --yes )
+    auto_answer=yes
+    ;;
+
+  -n | --no )
+    auto_answer=no
+    ;;
+
+  -N | --name )
+    service_name=$1
+    shift
+    ;;
+
+  *)
+    echo "usage: ${progname} [OPTION]..."
+    echo
+    echo "This script creates an Cygserver service configuration."
+    echo
+    echo "Options:"
+    echo "  --debug  -d            Enable shell's debug output."
+    echo "  --yes    -y            Answer all questions with \"yes\" automatically."
+    echo "  --no     -n            Answer all questions with \"no\" automatically."
+    echo "  --name   -N <name>     cygserver windows service name."
+    echo
+    exit 1
+    ;;
+
+  esac
+done
+
+# Check if running on NT
+_sys="`uname`"
+_nt=`expr "${_sys}" : "CYGWIN_NT"`
+
+# Check for running cygserver processes first.
+if ps -ef | grep -v grep | grep -q ${service_name}
+then
+  echo
+  echo "There is a cygserver (${service_name}) already running. Nothing to do, apparently."
+  echo
+  exit 1
+fi
+
+# Check for ${SYSCONFDIR} directory
+if [ -e "${SYSCONFDIR}" -a ! -d "${SYSCONFDIR}" ]
+then
+  echo
+  echo "${SYSCONFDIR} is existant but not a directory."
+  echo "Cannot create global configuration file."
+  echo
+  exit 1
+fi
+
+# Create it if necessary
+if [ ! -e "${SYSCONFDIR}" ]
+then
+  mkdir "${SYSCONFDIR}"
+  if [ ! -e "${SYSCONFDIR}" ]
+  then
+    echo
+    echo "Creating ${SYSCONFDIR} directory failed"
+    echo
+    exit 1
+  fi
+fi
+
+# Create /var/log if not already existing
+if [ -f ${LOCALSTATEDIR}/log ]
+then
+  echo "Creating ${LOCALSTATEDIR}/log failed!"
+else
+  if [ ! -d ${LOCALSTATEDIR}/log ]
+  then
+    mkdir -p ${LOCALSTATEDIR}/log
+  fi
+fi
+
+# Check if cygserver.conf exists. If yes, ask for overwriting
+if [ -f "${SYSCONFDIR}/cygserver.conf" ]
+then
+  if request "Overwrite existing ${SYSCONFDIR}/cygserver.conf file?"
+  then
+    rm -f "${SYSCONFDIR}/cygserver.conf"
+    if [ -f "${SYSCONFDIR}/cygserver.conf" ]
+    then
+      echo
+      echo "Can't overwrite. ${SYSCONFDIR}/cygserver.conf is write protected."
+      echo
+      exit 1
+    fi
+  fi
+fi
+
+# Create default cygserver.conf from skeleton files in /etc/defaults/etc
+if [ ! -f "${SYSCONFDIR}/cygserver.conf" ]
+then
+  echo "Generating ${SYSCONFDIR}/cygserver.conf file"
+  cp "${SYSCONFDIR}/defaults/etc/cygserver.conf" "${SYSCONFDIR}/cygserver.conf"
+  if [ ! -f "${SYSCONFDIR}/cygserver.conf" ]
+  then
+    echo
+    echo "Couldn't create ${SYSCONFDIR}/cygserver.conf."
+    echo "Perhaps there's no default file in ${SYSCONFDIR}/defaults/etc?"
+    echo "Reinstalling Cygwin might help."
+    echo
+    exit 1
+  fi
+  chmod 664 "${SYSCONFDIR}/cygserver.conf"
+  chown 18.544 "${SYSCONFDIR}/cygserver.conf"
+fi
+
+# On NT ask if cygserver should be installed as service
+if [ ${_nt} -gt 0 ]
+then
+  # But only if it is not already installed
+  if ! cygrunsrv -Q ${service_name} > /dev/null 2>&1
+  then
+    echo
+    echo
+    echo "Warning: The following function requires administrator privileges!"
+    echo
+    echo "Do you want to install cygserver as service?"
+    if request "(Say \"no\" if it's already installed as service)"
+    then
+      if ! cygrunsrv -I ${service_name} -d "CYGWIN cygserver" -p /usr/sbin/cygserver
+      then
+        echo
+	echo "Installation of cygserver as service failed.  Please check the"
+	echo "error messages you got.  They might give a clue why it failed."
+	echo
+	echo "A good start is either you don't have administrator privileges"
+	echo "or a missing cygrunsrv binary.  Please check for both."
+	echo
+	exit 1
+      fi
+      echo
+      echo "The service has been installed under LocalSystem account."
+      echo "To start it, call \`net start ${service_name}' or \`cygrunsrv -S ${service_name}'."
+    fi
+    touch "${LOCALSTATEDIR}/log/cygserver.log"
+    chown 18.544 "${LOCALSTATEDIR}/log/cygserver.log"
+  fi
+fi
+
+echo
+echo "Further configuration options are available by editing the configuration"
+echo "file ${SYSCONFDIR}/cygserver.conf.  Please read the inline information in that"
+echo "file carefully. The best option for the start is to just leave it alone."
+echo
+echo "Basic Cygserver configuration finished. Have fun!"
+echo
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygsmartcols-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygsmartcols-1.dll
new file mode 100644
index 00000000..359db1f0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygsmartcols-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygssp-0.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygssp-0.dll
new file mode 100644
index 00000000..df3a73d7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygssp-0.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstart.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstart.exe
new file mode 100644
index 00000000..8e8cf5ea
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstart.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstdc++-6.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstdc++-6.dll
new file mode 100644
index 00000000..b4465dd1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygstdc++-6.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygticw-10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygticw-10.dll
new file mode 100644
index 00000000..b371571a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygticw-10.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyguuid-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyguuid-1.dll
new file mode 100644
index 00000000..050bc2c3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cyguuid-1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin-console-helper.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin-console-helper.exe
new file mode 100644
index 00000000..d1830f8d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin-console-helper.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin1.dll
new file mode 100644
index 00000000..0a386c75
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygwin1.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygz.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygz.dll
new file mode 100644
index 00000000..1476523b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/cygz.dll differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dash.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dash.exe
new file mode 100644
index 00000000..a9aea03a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dash.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/date.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/date.exe
new file mode 100644
index 00000000..2d5b19da
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/date.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dd.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dd.exe
new file mode 100644
index 00000000..b04311ee
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dd.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/df.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/df.exe
new file mode 100644
index 00000000..89ebad22
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/df.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dir.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dir.exe
new file mode 100644
index 00000000..819aa1cc
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dir.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dircolors.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dircolors.exe
new file mode 100644
index 00000000..a01359f3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dircolors.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dirname.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dirname.exe
new file mode 100644
index 00000000..ecfa6c54
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dirname.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dlltool.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dlltool.exe
new file mode 100644
index 00000000..4885cedf
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dlltool.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dllwrap.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dllwrap.exe
new file mode 100644
index 00000000..094c62f0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dllwrap.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dnsdomainname b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dnsdomainname
new file mode 100644
index 00000000..1aeec75d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dnsdomainname differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/domainname b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/domainname
new file mode 100644
index 00000000..1aeec75d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/domainname differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/du.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/du.exe
new file mode 100644
index 00000000..0f6a8a76
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/du.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dumper.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dumper.exe
new file mode 100644
index 00000000..fa0b436c
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/dumper.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/echo.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/echo.exe
new file mode 100644
index 00000000..01fe1f5e
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/echo.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/editrights.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/editrights.exe
new file mode 100644
index 00000000..1b0e97ef
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/editrights.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/egrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/egrep
new file mode 100644
index 00000000..393ba6b5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/egrep
@@ -0,0 +1,2 @@
+#!/bin/sh
+exec grep -E "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/elfedit.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/elfedit.exe
new file mode 100644
index 00000000..5f08413e
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/elfedit.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/enc2xs b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/enc2xs
new file mode 100644
index 00000000..9818c7e7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/enc2xs
@@ -0,0 +1,1430 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!./perl
+BEGIN {
+    # @INC poking  no longer needed w/ new MakeMaker and Makefile.PL's
+    # with $ENV{PERL_CORE} set
+    # In case we need it in future...
+    require Config; import Config;
+}
+use strict;
+use warnings;
+use Getopt::Std;
+use Config;
+my @orig_ARGV = @ARGV;
+our $VERSION  = do { my @r = (q$Revision: 2.17 $ =~ /\d+/g); sprintf "%d."."%02d" x $#r, @r };
+
+# These may get re-ordered.
+# RAW is a do_now as inserted by &enter
+# AGG is an aggregated do_now, as built up by &process
+
+use constant {
+  RAW_NEXT => 0,
+  RAW_IN_LEN => 1,
+  RAW_OUT_BYTES => 2,
+  RAW_FALLBACK => 3,
+
+  AGG_MIN_IN => 0,
+  AGG_MAX_IN => 1,
+  AGG_OUT_BYTES => 2,
+  AGG_NEXT => 3,
+  AGG_IN_LEN => 4,
+  AGG_OUT_LEN => 5,
+  AGG_FALLBACK => 6,
+};
+
+# (See the algorithm in encengine.c - we're building structures for it)
+
+# There are two sorts of structures.
+# "do_now" (an array, two variants of what needs storing) is whatever we need
+# to do now we've read an input byte.
+# It's housed in a "do_next" (which is how we got to it), and in turn points
+# to a "do_next" which contains all the "do_now"s for the next input byte.
+
+# There will be a "do_next" which is the start state.
+# For a single byte encoding it's the only "do_next" - each "do_now" points
+# back to it, and each "do_now" will cause bytes. There is no state.
+
+# For a multi-byte encoding where all characters in the input are the same
+# length, then there will be a tree of "do_now"->"do_next"->"do_now"
+# branching out from the start state, one step for each input byte.
+# The leaf "do_now"s will all be at the same distance from the start state,
+# only the leaf "do_now"s cause output bytes, and they in turn point back to
+# the start state.
+
+# For an encoding where there are variable length input byte sequences, you
+# will encounter a leaf "do_now" sooner for the shorter input sequences, but
+# as before the leaves will point back to the start state.
+
+# The system will cope with escape encodings (imagine them as a mostly
+# self-contained tree for each escape state, and cross links between trees
+# at the state-switching characters) but so far no input format defines these.
+
+# The system will also cope with having output "leaves" in the middle of
+# the bifurcating branches, not just at the extremities, but again no
+# input format does this yet.
+
+# There are two variants of the "do_now" structure. The first, smaller variant
+# is generated by &enter as the input file is read. There is one structure
+# for each input byte. Say we are mapping a single byte encoding to a
+# single byte encoding, with  "ABCD" going "abcd". There will be
+# 4 "do_now"s, {"A" => [...,"a",...], "B" => [...,"b",...], "C"=>..., "D"=>...}
+
+# &process then walks the tree, building aggregate "do_now" structures for
+# adjacent bytes where possible. The aggregate is for a contiguous range of
+# bytes which each produce the same length of output, each move to the
+# same next state, and each have the same fallback flag.
+# So our 4 RAW "do_now"s above become replaced by a single structure
+# containing:
+# ["A", "D", "abcd", 1, ...]
+# ie, for an input byte $_ in "A".."D", output 1 byte, found as
+# substr ("abcd", (ord $_ - ord "A") * 1, 1)
+# which maps very nicely into pointer arithmetic in C for encengine.c
+
+sub encode_U
+{
+ # UTF-8 encode long hand - only covers part of perl's range
+ ## my $uv = shift;
+ # chr() works in native space so convert value from table
+ # into that space before using chr().
+ my $ch = chr(utf8::unicode_to_native($_[0]));
+ # Now get core perl to encode that the way it likes.
+ utf8::encode($ch);
+ return $ch;
+}
+
+sub encode_S
+{
+ # encode single byte
+ ## my ($ch,$page) = @_; return chr($ch);
+ return chr $_[0];
+}
+
+sub encode_D
+{
+ # encode double byte MS byte first
+ ## my ($ch,$page) = @_; return chr($page).chr($ch);
+ return chr ($_[1]) . chr $_[0];
+}
+
+sub encode_M
+{
+ # encode Multi-byte - single for 0..255 otherwise double
+ ## my ($ch,$page) = @_;
+ ## return &encode_D if $page;
+ ## return &encode_S;
+ return chr ($_[1]) . chr $_[0] if $_[1];
+ return chr $_[0];
+}
+
+my %encode_types = (U => \&encode_U,
+                    S => \&encode_S,
+                    D => \&encode_D,
+                    M => \&encode_M,
+                   );
+
+# Win32 does not expand globs on command line
+eval "\@ARGV = map(glob(\$_),\@ARGV)" if ($^O eq 'MSWin32');
+
+my %opt;
+# I think these are:
+# -Q to disable the duplicate codepoint test
+# -S make mapping errors fatal
+# -q to remove comments written to output files
+# -O to enable the (brute force) substring optimiser
+# -o <output> to specify the output file name (else it's the first arg)
+# -f <inlist> to give a file with a list of input files (else use the args)
+# -n <name> to name the encoding (else use the basename of the input file.
+getopts('CM:SQqOo:f:n:v',\%opt);
+
+$opt{M} and make_makefile_pl($opt{M}, @ARGV);
+$opt{C} and make_configlocal_pm($opt{C}, @ARGV);
+$opt{v} ||= $ENV{ENC2XS_VERBOSE};
+
+sub verbose {
+    print STDERR @_ if $opt{v};
+}
+sub verbosef {
+    printf STDERR @_ if $opt{v};
+}
+
+# This really should go first, else the die here causes empty (non-erroneous)
+# output files to be written.
+my @encfiles;
+if (exists $opt{'f'}) {
+    # -F is followed by name of file containing list of filenames
+    my $flist = $opt{'f'};
+    open(FLIST,$flist) || die "Cannot open $flist:$!";
+    chomp(@encfiles = <FLIST>);
+    close(FLIST);
+} else {
+    @encfiles = @ARGV;
+}
+
+my $cname = (exists $opt{'o'}) ? $opt{'o'} : shift(@ARGV);
+chmod(0666,$cname) if -f $cname && !-w $cname;
+open(C,">$cname") || die "Cannot open $cname:$!";
+
+my $dname = $cname;
+my $hname = $cname;
+
+my ($doC,$doEnc,$doUcm,$doPet);
+
+if ($cname =~ /\.(c|xs)$/i) # VMS may have upcased filenames with DECC$ARGV_PARSE_STYLE defined
+ {
+  $doC = 1;
+  $dname =~ s/(\.[^\.]*)?$/.exh/;
+  chmod(0666,$dname) if -f $cname && !-w $dname;
+  open(D,">$dname") || die "Cannot open $dname:$!";
+  $hname =~ s/(\.[^\.]*)?$/.h/;
+  chmod(0666,$hname) if -f $cname && !-w $hname;
+  open(H,">$hname") || die "Cannot open $hname:$!";
+
+  foreach my $fh (\*C,\*D,\*H)
+  {
+   print $fh <<"END" unless $opt{'q'};
+/*
+ !!!!!!!   DO NOT EDIT THIS FILE   !!!!!!!
+ This file was autogenerated by:
+ $^X $0 @orig_ARGV
+ enc2xs VERSION $VERSION
+*/
+END
+  }
+
+  if ($cname =~ /(\w+)\.xs$/)
+   {
+    print C "#define PERL_NO_GET_CONTEXT\n";
+    print C "#include <EXTERN.h>\n";
+    print C "#include <perl.h>\n";
+    print C "#include <XSUB.h>\n";
+   }
+  print C "#include \"encode.h\"\n\n";
+
+ }
+elsif ($cname =~ /\.enc$/)
+ {
+  $doEnc = 1;
+ }
+elsif ($cname =~ /\.ucm$/)
+ {
+  $doUcm = 1;
+ }
+elsif ($cname =~ /\.pet$/)
+ {
+  $doPet = 1;
+ }
+
+my %encoding;
+my %strings;
+my $string_acc;
+my %strings_in_acc;
+
+my $saved = 0;
+my $subsave = 0;
+my $strings = 0;
+
+sub cmp_name
+{
+ if ($a =~ /^.*-(\d+)/)
+  {
+   my $an = $1;
+   if ($b =~ /^.*-(\d+)/)
+    {
+     my $r = $an <=> $1;
+     return $r if $r;
+    }
+  }
+ return $a cmp $b;
+}
+
+
+foreach my $enc (sort cmp_name @encfiles)
+ {
+  my ($name,$sfx) = $enc =~ /^.*?([\w-]+)\.(enc|ucm)$/;
+  $name = $opt{'n'} if exists $opt{'n'};
+  if (open(E,$enc))
+   {
+    if ($sfx eq 'enc')
+     {
+      compile_enc(\*E,lc($name));
+     }
+    else
+     {
+      compile_ucm(\*E,lc($name));
+     }
+   }
+  else
+   {
+    warn "Cannot open $enc for $name:$!";
+   }
+ }
+
+if ($doC)
+ {
+  verbose "Writing compiled form\n";
+  foreach my $name (sort cmp_name keys %encoding)
+   {
+    my ($e2u,$u2e,$erep,$min_el,$max_el) = @{$encoding{$name}};
+    process($name.'_utf8',$e2u);
+    addstrings(\*C,$e2u);
+
+    process('utf8_'.$name,$u2e);
+    addstrings(\*C,$u2e);
+   }
+  outbigstring(\*C,"enctable");
+  foreach my $name (sort cmp_name keys %encoding)
+   {
+    my ($e2u,$u2e,$erep,$min_el,$max_el) = @{$encoding{$name}};
+    outtable(\*C,$e2u, "enctable");
+    outtable(\*C,$u2e, "enctable");
+
+    # push(@{$encoding{$name}},outstring(\*C,$e2u->{Cname}.'_def',$erep));
+   }
+  my $cpp = ($Config{d_cplusplus} || '') eq 'define';
+  my $ext  = $cpp ? 'extern "C"' : "extern";
+  my $exta = $cpp ? 'extern "C"' : "static";
+  my $extb = $cpp ? 'extern "C"' : "";
+  foreach my $enc (sort cmp_name keys %encoding)
+   {
+    # my ($e2u,$u2e,$rep,$min_el,$max_el,$rsym) = @{$encoding{$enc}};
+    my ($e2u,$u2e,$rep,$min_el,$max_el) = @{$encoding{$enc}};
+    #my @info = ($e2u->{Cname},$u2e->{Cname},$rsym,length($rep),$min_el,$max_el);
+    my $replen = 0; 
+    $replen++ while($rep =~ /\G\\x[0-9A-Fa-f]/g);
+    my $sym = "${enc}_encoding";
+    $sym =~ s/\W+/_/g;
+    my @info = ($e2u->{Cname},$u2e->{Cname},"${sym}_rep_character",$replen,
+        $min_el,$max_el);
+    print C "${exta} const U8 ${sym}_rep_character[] = \"$rep\";\n";
+    print C "${exta} const char ${sym}_enc_name[] = \"$enc\";\n\n";
+    print C "${extb} const encode_t $sym = \n";
+    # This is to make null encoding work -- dankogai
+    for (my $i = (scalar @info) - 1;  $i >= 0; --$i){
+    $info[$i] ||= 1;
+    }
+    # end of null tweak -- dankogai
+    print C " {",join(',',@info,"{${sym}_enc_name,(const char *)0}"),"};\n\n";
+   }
+
+  foreach my $enc (sort cmp_name keys %encoding)
+   {
+    my $sym = "${enc}_encoding";
+    $sym =~ s/\W+/_/g;
+    print H "${ext} encode_t $sym;\n";
+    print D " Encode_XSEncoding(aTHX_ &$sym);\n";
+   }
+
+  if ($cname =~ /(\w+)\.xs$/)
+   {
+    my $mod = $1;
+    print C <<'END';
+
+static void
+Encode_XSEncoding(pTHX_ encode_t *enc)
+{
+ dSP;
+ HV *stash = gv_stashpv("Encode::XS", TRUE);
+ SV *iv    = newSViv(PTR2IV(enc));
+ SV *sv    = sv_bless(newRV_noinc(iv),stash);
+ int i = 0;
+ /* with the SvLEN() == 0 hack, PVX won't be freed. We cast away name's
+ constness, in the hope that perl won't mess with it. */
+ assert(SvTYPE(iv) >= SVt_PV); assert(SvLEN(iv) == 0);
+ SvFLAGS(iv) |= SVp_POK;
+ SvPVX(iv) = (char*) enc->name[0];
+ PUSHMARK(sp);
+ XPUSHs(sv);
+ while (enc->name[i])
+  {
+   const char *name = enc->name[i++];
+   XPUSHs(sv_2mortal(newSVpvn(name,strlen(name))));
+  }
+ PUTBACK;
+ call_pv("Encode::define_encoding",G_DISCARD);
+ SvREFCNT_dec(sv);
+}
+
+END
+
+    print C "\nMODULE = Encode::$mod\tPACKAGE = Encode::$mod\n\n";
+    print C "BOOT:\n{\n";
+    print C "#include \"$dname\"\n";
+    print C "}\n";
+   }
+  # Close in void context is bad, m'kay
+  close(D) or warn "Error closing '$dname': $!";
+  close(H) or warn "Error closing '$hname': $!";
+
+  my $perc_saved    = $saved/($strings + $saved) * 100;
+  my $perc_subsaved = $subsave/($strings + $subsave) * 100;
+  verbosef "%d bytes in string tables\n",$strings;
+  verbosef "%d bytes (%.3g%%) saved spotting duplicates\n",
+    $saved, $perc_saved              if $saved;
+  verbosef "%d bytes (%.3g%%) saved using substrings\n",
+    $subsave, $perc_subsaved         if $subsave;
+ }
+elsif ($doEnc)
+ {
+  foreach my $name (sort cmp_name keys %encoding)
+   {
+    my ($e2u,$u2e,$erep,$min_el,$max_el) = @{$encoding{$name}};
+    output_enc(\*C,$name,$e2u);
+   }
+ }
+elsif ($doUcm)
+ {
+  foreach my $name (sort cmp_name keys %encoding)
+   {
+    my ($e2u,$u2e,$erep,$min_el,$max_el) = @{$encoding{$name}};
+    output_ucm(\*C,$name,$u2e,$erep,$min_el,$max_el);
+   }
+ }
+
+# writing half meg files and then not checking to see if you just filled the
+# disk is bad, m'kay
+close(C) or die "Error closing '$cname': $!";
+
+# End of the main program.
+
+sub compile_ucm
+{
+ my ($fh,$name) = @_;
+ my $e2u = {};
+ my $u2e = {};
+ my $cs;
+ my %attr;
+ while (<$fh>)
+  {
+   s/#.*$//;
+   last if /^\s*CHARMAP\s*$/i;
+   if (/^\s*<(\w+)>\s+"?([^"]*)"?\s*$/i) # " # Grrr
+    {
+     $attr{$1} = $2;
+    }
+  }
+ if (!defined($cs =  $attr{'code_set_name'}))
+  {
+   warn "No <code_set_name> in $name\n";
+  }
+ else
+  {
+   $name = $cs unless exists $opt{'n'};
+  }
+ my $erep;
+ my $urep;
+ my $max_el;
+ my $min_el;
+ if (exists $attr{'subchar'})
+  {
+   #my @byte;
+   #$attr{'subchar'} =~ /^\s*/cg;
+   #push(@byte,$1) while $attr{'subchar'} =~ /\G\\x([0-9a-f]+)/icg;
+   #$erep = join('',map(chr(hex($_)),@byte));
+   $erep = $attr{'subchar'}; 
+   $erep =~ s/^\s+//; $erep =~ s/\s+$//;
+  }
+ print "Reading $name ($cs)\n";
+ my $nfb = 0;
+ my $hfb = 0;
+ while (<$fh>)
+  {
+   s/#.*$//;
+   last if /^\s*END\s+CHARMAP\s*$/i;
+   next if /^\s*$/;
+   my (@uni, @byte) = ();
+   my ($uni, $byte, $fb) = m/^(\S+)\s+(\S+)\s+(\S+)\s+/o
+       or die "Bad line: $_";
+   while ($uni =~  m/\G<([U0-9a-fA-F\+]+)>/g){
+       push @uni, map { substr($_, 1) } split(/\+/, $1);
+   }
+   while ($byte =~ m/\G\\x([0-9a-fA-F]+)/g){
+       push @byte, $1;
+   }
+   if (@uni)
+    {
+     my $uch =  join('', map { encode_U(hex($_)) } @uni );
+     my $ech = join('',map(chr(hex($_)),@byte));
+     my $el  = length($ech);
+     $max_el = $el if (!defined($max_el) || $el > $max_el);
+     $min_el = $el if (!defined($min_el) || $el < $min_el);
+     if (length($fb))
+      {
+       $fb = substr($fb,1);
+       $hfb++;
+      }
+     else
+      {
+       $nfb++;
+       $fb = '0';
+      }
+     # $fb is fallback flag
+     # 0 - round trip safe
+     # 1 - fallback for unicode -> enc
+     # 2 - skip sub-char mapping
+     # 3 - fallback enc -> unicode
+     enter($u2e,$uch,$ech,$u2e,$fb+0) if ($fb =~ /[01]/);
+     enter($e2u,$ech,$uch,$e2u,$fb+0) if ($fb =~ /[03]/);
+    }
+   else
+    {
+     warn $_;
+    }
+  }
+ if ($nfb && $hfb)
+  {
+   die "$nfb entries without fallback, $hfb entries with\n";
+  }
+ $encoding{$name} = [$e2u,$u2e,$erep,$min_el,$max_el];
+}
+
+
+
+sub compile_enc
+{
+ my ($fh,$name) = @_;
+ my $e2u = {};
+ my $u2e = {};
+
+ my $type;
+ while ($type = <$fh>)
+  {
+   last if $type !~ /^\s*#/;
+  }
+ chomp($type);
+ return if $type eq 'E';
+ # Do the hash lookup once, rather than once per function call. 4% speedup.
+ my $type_func = $encode_types{$type};
+ my ($def,$sym,$pages) = split(/\s+/,scalar(<$fh>));
+ warn "$type encoded $name\n";
+ my $rep = '';
+ # Save a defined test by setting these to defined values.
+ my $min_el = ~0; # A very big integer
+ my $max_el = 0;  # Anything must be longer than 0
+ {
+  my $v = hex($def);
+  $rep = &$type_func($v & 0xFF, ($v >> 8) & 0xffe);
+ }
+ my $errors;
+ my $seen;
+ # use -Q to silence the seen test. Makefile.PL uses this by default.
+ $seen = {} unless $opt{Q};
+ do
+  {
+   my $line = <$fh>;
+   chomp($line);
+   my $page = hex($line);
+   my $ch = 0;
+   my $i = 16;
+   do
+    {
+     # So why is it 1% faster to leave the my here?
+     my $line = <$fh>;
+     $line =~ s/\r\n$/\n/;
+     die "$.:${line}Line should be exactly 65 characters long including
+     newline (".length($line).")" unless length ($line) == 65;
+     # Split line into groups of 4 hex digits, convert groups to ints
+     # This takes 65.35		
+     # map {hex $_} $line =~ /(....)/g
+     # This takes 63.75 (2.5% less time)
+     # unpack "n*", pack "H*", $line
+     # There's an implicit loop in map. Loops are bad, m'kay. Ops are bad, m'kay
+     # Doing it as while ($line =~ /(....)/g) took 74.63
+     foreach my $val (unpack "n*", pack "H*", $line)
+      {
+       next if $val == 0xFFFD;
+       my $ech = &$type_func($ch,$page);
+       if ($val || (!$ch && !$page))
+        {
+         my $el  = length($ech);
+         $max_el = $el if $el > $max_el;
+         $min_el = $el if $el < $min_el;
+         my $uch = encode_U($val);
+         if ($seen) {
+           # We're doing the test.
+           # We don't need to read this quickly, so storing it as a scalar,
+           # rather than 3 (anon array, plus the 2 scalars it holds) saves
+           # RAM and may make us faster on low RAM systems. [see __END__]
+           if (exists $seen->{$uch})
+             {
+               warn sprintf("U%04X is %02X%02X and %04X\n",
+                            $val,$page,$ch,$seen->{$uch});
+               $errors++;
+             }
+           else
+             {
+               $seen->{$uch} = $page << 8 | $ch;
+             }
+         }
+         # Passing 2 extra args each time is 3.6% slower!
+         # Even with having to add $fallback ||= 0 later
+         enter_fb0($e2u,$ech,$uch);
+         enter_fb0($u2e,$uch,$ech);
+        }
+       else
+        {
+         # No character at this position
+         # enter($e2u,$ech,undef,$e2u);
+        }
+       $ch++;
+      }
+    } while --$i;
+  } while --$pages;
+ die "\$min_el=$min_el, \$max_el=$max_el - seems we read no lines"
+   if $min_el > $max_el;
+ die "$errors mapping conflicts\n" if ($errors && $opt{'S'});
+ $encoding{$name} = [$e2u,$u2e,$rep,$min_el,$max_el];
+}
+
+# my ($a,$s,$d,$t,$fb) = @_;
+sub enter {
+  my ($current,$inbytes,$outbytes,$next,$fallback) = @_;
+  # state we shift to after this (multibyte) input character defaults to same
+  # as current state.
+  $next ||= $current;
+  # Making sure it is defined seems to be faster than {no warnings;} in
+  # &process, or passing it in as 0 explicitly.
+  # XXX $fallback ||= 0;
+
+  # Start at the beginning and work forwards through the string to zero.
+  # effectively we are removing 1 character from the front each time
+  # but we don't actually edit the string. [this alone seems to be 14% speedup]
+  # Hence -$pos is the length of the remaining string.
+  my $pos = -length $inbytes;
+  while (1) {
+    my $byte = substr $inbytes, $pos, 1;
+    #  RAW_NEXT => 0,
+    #  RAW_IN_LEN => 1,
+    #  RAW_OUT_BYTES => 2,
+    #  RAW_FALLBACK => 3,
+    # to unicode an array would seem to be better, because the pages are dense.
+    # from unicode can be very sparse, favouring a hash.
+    # hash using the bytes (all length 1) as keys rather than ord value,
+    # as it's easier to sort these in &process.
+
+    # It's faster to always add $fallback even if it's undef, rather than
+    # choosing between 3 and 4 element array. (hence why we set it defined
+    # above)
+    my $do_now = $current->{Raw}{$byte} ||= [{},-$pos,'',$fallback];
+    # When $pos was -1 we were at the last input character.
+    unless (++$pos) {
+      $do_now->[RAW_OUT_BYTES] = $outbytes;
+      $do_now->[RAW_NEXT] = $next;
+      return;
+    }
+    # Tail recursion. The intermediate state may not have a name yet.
+    $current = $do_now->[RAW_NEXT];
+  }
+}
+
+# This is purely for optimisation. It's just &enter hard coded for $fallback
+# of 0, using only a 3 entry array ref to save memory for every entry.
+sub enter_fb0 {
+  my ($current,$inbytes,$outbytes,$next) = @_;
+  $next ||= $current;
+
+  my $pos = -length $inbytes;
+  while (1) {
+    my $byte = substr $inbytes, $pos, 1;
+    my $do_now = $current->{Raw}{$byte} ||= [{},-$pos,''];
+    unless (++$pos) {
+      $do_now->[RAW_OUT_BYTES] = $outbytes;
+      $do_now->[RAW_NEXT] = $next;
+      return;
+    }
+    $current = $do_now->[RAW_NEXT];
+  }
+}
+
+sub process
+{
+  my ($name,$a) = @_;
+  $name =~ s/\W+/_/g;
+  $a->{Cname} = $name;
+  my $raw = $a->{Raw};
+  my ($l, $agg_max_in, $agg_next, $agg_in_len, $agg_out_len, $agg_fallback);
+  my @ent;
+  $agg_max_in = 0;
+  foreach my $key (sort keys %$raw) {
+    #  RAW_NEXT => 0,
+    #  RAW_IN_LEN => 1,
+    #  RAW_OUT_BYTES => 2,
+    #  RAW_FALLBACK => 3,
+    my ($next, $in_len, $out_bytes, $fallback) = @{$raw->{$key}};
+    # Now we are converting from raw to aggregate, switch from 1 byte strings
+    # to numbers
+    my $b = ord $key;
+    $fallback ||= 0;
+    if ($l &&
+        # If this == fails, we're going to reset $agg_max_in below anyway.
+        $b == ++$agg_max_in &&
+        # References in numeric context give the pointer as an int.
+        $agg_next == $next &&
+        $agg_in_len == $in_len &&
+        $agg_out_len == length $out_bytes &&
+        $agg_fallback == $fallback
+        # && length($l->[AGG_OUT_BYTES]) < 16
+       ) {
+      #     my $i = ord($b)-ord($l->[AGG_MIN_IN]);
+      # we can aggregate this byte onto the end.
+      $l->[AGG_MAX_IN] = $b;
+      $l->[AGG_OUT_BYTES] .= $out_bytes;
+    } else {
+      # AGG_MIN_IN => 0,
+      # AGG_MAX_IN => 1,
+      # AGG_OUT_BYTES => 2,
+      # AGG_NEXT => 3,
+      # AGG_IN_LEN => 4,
+      # AGG_OUT_LEN => 5,
+      # AGG_FALLBACK => 6,
+      # Reset the last thing we saw, plus set 5 lexicals to save some derefs.
+      # (only gains .6% on euc-jp  -- is it worth it?)
+      push @ent, $l = [$b, $agg_max_in = $b, $out_bytes, $agg_next = $next,
+                       $agg_in_len = $in_len, $agg_out_len = length $out_bytes,
+                       $agg_fallback = $fallback];
+    }
+    if (exists $next->{Cname}) {
+      $next->{'Forward'} = 1 if $next != $a;
+    } else {
+      process(sprintf("%s_%02x",$name,$b),$next);
+    }
+  }
+  # encengine.c rules say that last entry must be for 255
+  if ($agg_max_in < 255) {
+    push @ent, [1+$agg_max_in, 255,undef,$a,0,0];
+  }
+  $a->{'Entries'} = \@ent;
+}
+
+
+sub addstrings
+{
+ my ($fh,$a) = @_;
+ my $name = $a->{'Cname'};
+ # String tables
+ foreach my $b (@{$a->{'Entries'}})
+  {
+   next unless $b->[AGG_OUT_LEN];
+   $strings{$b->[AGG_OUT_BYTES]} = undef;
+  }
+ if ($a->{'Forward'})
+  {
+   my $cpp = ($Config{d_cplusplus} || '') eq 'define';
+   my $var = $^O eq 'MacOS' || $cpp ? 'extern' : 'static';
+   my $const = $cpp ? '' : 'const';
+   my $ccflags = $Config{ccflags};
+   if (defined $Config{ccwarnflags}) {
+       $ccflags .= " " . $Config{ccwarnflags};
+   }
+   my $count = $ccflags =~ /-Wc\+\+-compat/ ? '' : scalar(@{$a->{'Entries'}});
+   print $fh "$var $const encpage_t $name\[$count];\n";
+  }
+ $a->{'DoneStrings'} = 1;
+ foreach my $b (@{$a->{'Entries'}})
+  {
+   my ($s,$e,$out,$t,$end,$l) = @$b;
+   addstrings($fh,$t) unless $t->{'DoneStrings'};
+  }
+}
+
+sub outbigstring
+{
+  my ($fh,$name) = @_;
+
+  $string_acc = '';
+
+  # Make the big string in the string accumulator. Longest first, on the hope
+  # that this makes it more likely that we find the short strings later on.
+  # Not sure if it helps sorting strings of the same length lexically.
+  foreach my $s (sort {length $b <=> length $a || $a cmp $b} keys %strings) {
+    my $index = index $string_acc, $s;
+    if ($index >= 0) {
+      $saved += length($s);
+      $strings_in_acc{$s} = $index;
+    } else {
+    OPTIMISER: {
+    if ($opt{'O'}) {
+      my $sublength = length $s;
+      while (--$sublength > 0) {
+        # progressively lop characters off the end, to see if the start of
+        # the new string overlaps the end of the accumulator.
+        if (substr ($string_acc, -$sublength)
+        eq substr ($s, 0, $sublength)) {
+          $subsave += $sublength;
+          $strings_in_acc{$s} = length ($string_acc) - $sublength;
+          # append the last bit on the end.
+          $string_acc .= substr ($s, $sublength);
+          last OPTIMISER;
+        }
+        # or if the end of the new string overlaps the start of the
+        # accumulator
+        next unless substr ($string_acc, 0, $sublength)
+          eq substr ($s, -$sublength);
+        # well, the last $sublength characters of the accumulator match.
+        # so as we're prepending to the accumulator, need to shift all our
+        # existing offsets forwards
+        $_ += $sublength foreach values %strings_in_acc;
+        $subsave += $sublength;
+        $strings_in_acc{$s} = 0;
+        # append the first bit on the start.
+        $string_acc = substr ($s, 0, -$sublength) . $string_acc;
+        last OPTIMISER;
+      }
+    }
+    # Optimiser (if it ran) found nothing, so just going have to tack the
+    # whole thing on the end.
+    $strings_in_acc{$s} = length $string_acc;
+    $string_acc .= $s;
+      };
+    }
+  }
+
+  $strings = length $string_acc;
+  my $cpp = ($Config{d_cplusplus} || '') eq 'define';
+  my $var = $cpp ? '' : 'static';
+  my $definition = "\n$var const U8 $name\[$strings] = { " .
+    join(',',unpack "C*",$string_acc);
+  # We have a single long line. Split it at convenient commas.
+  print $fh $1, "\n" while $definition =~ /\G(.{74,77},)/gcs;
+  print $fh substr ($definition, pos $definition), " };\n";
+}
+
+sub findstring {
+  my ($name,$s) = @_;
+  my $offset = $strings_in_acc{$s};
+  die "Can't find string " . join (',',unpack "C*",$s) . " in accumulator"
+    unless defined $offset;
+  "$name + $offset";
+}
+
+sub outtable
+{
+ my ($fh,$a,$bigname) = @_;
+ my $name = $a->{'Cname'};
+ $a->{'Done'} = 1;
+ foreach my $b (@{$a->{'Entries'}})
+  {
+   my ($s,$e,$out,$t,$end,$l) = @$b;
+   outtable($fh,$t,$bigname) unless $t->{'Done'};
+  }
+ my $cpp = ($Config{d_cplusplus} || '') eq 'define';
+ my $var = $cpp ? '' : 'static';
+ my $const = $cpp ? '' : 'const';
+ print $fh "\n$var $const encpage_t $name\[",
+   scalar(@{$a->{'Entries'}}), "] = {\n";
+ foreach my $b (@{$a->{'Entries'}})
+  {
+   my ($sc,$ec,$out,$t,$end,$l,$fb) = @$b;
+   # $end |= 0x80 if $fb; # what the heck was on your mind, Nick?  -- Dan
+   print  $fh "{";
+   if ($l)
+    {
+     printf $fh findstring($bigname,$out);
+    }
+   else
+    {
+     print  $fh "0";
+    }
+   print  $fh ",",$t->{Cname};
+   printf $fh ",0x%02x,0x%02x,$l,$end},\n",$sc,$ec;
+  }
+ print $fh "};\n";
+}
+
+sub output_enc
+{
+ my ($fh,$name,$a) = @_;
+ die "Changed - fix me for new structure";
+ foreach my $b (sort keys %$a)
+  {
+   my ($s,$e,$out,$t,$end,$l,$fb) = @{$a->{$b}};
+  }
+}
+
+sub decode_U
+{
+ my $s = shift;
+}
+
+my @uname;
+sub char_names
+{
+ my $s = do "unicore/Name.pl";
+ die "char_names: unicore/Name.pl: $!\n" unless defined $s;
+ pos($s) = 0;
+ while ($s =~ /\G([0-9a-f]+)\t([0-9a-f]*)\t(.*?)\s*\n/igc)
+  {
+   my $name = $3;
+   my $s = hex($1);
+   last if $s >= 0x10000;
+   my $e = length($2) ? hex($2) : $s;
+   for (my $i = $s; $i <= $e; $i++)
+    {
+     $uname[$i] = $name;
+#    print sprintf("U%04X $name\n",$i);
+    }
+  }
+}
+
+sub output_ucm_page
+{
+  my ($cmap,$a,$t,$pre) = @_;
+  # warn sprintf("Page %x\n",$pre);
+  my $raw = $t->{Raw};
+  foreach my $key (sort keys %$raw) {
+    #  RAW_NEXT => 0,
+    #  RAW_IN_LEN => 1,
+    #  RAW_OUT_BYTES => 2,
+    #  RAW_FALLBACK => 3,
+    my ($next, $in_len, $out_bytes, $fallback) = @{$raw->{$key}};
+    my $u = ord $key;
+    $fallback ||= 0;
+
+    if ($next != $a && $next != $t) {
+      output_ucm_page($cmap,$a,$next,(($pre|($u &0x3F)) << 6)&0xFFFF);
+    } elsif (length $out_bytes) {
+      if ($pre) {
+        $u = $pre|($u &0x3f);
+      }
+      my $s = sprintf "<U%04X> ",$u;
+      #foreach my $c (split(//,$out_bytes)) {
+      #  $s .= sprintf "\\x%02X",ord($c);
+      #}
+      # 9.5% faster changing that loop to this:
+      $s .= sprintf +("\\x%02X" x length $out_bytes), unpack "C*", $out_bytes;
+      $s .= sprintf " |%d # %s\n",($fallback ? 1 : 0),$uname[$u];
+      push(@$cmap,$s);
+    } else {
+      warn join(',',$u, @{$raw->{$key}},$a,$t);
+    }
+  }
+}
+
+sub output_ucm
+{
+ my ($fh,$name,$h,$rep,$min_el,$max_el) = @_;
+ print $fh "# $0 @orig_ARGV\n" unless $opt{'q'};
+ print $fh "<code_set_name> \"$name\"\n";
+ char_names();
+ if (defined $min_el)
+  {
+   print $fh "<mb_cur_min> $min_el\n";
+  }
+ if (defined $max_el)
+  {
+   print $fh "<mb_cur_max> $max_el\n";
+  }
+ if (defined $rep)
+  {
+   print $fh "<subchar> ";
+   foreach my $c (split(//,$rep))
+    {
+     printf $fh "\\x%02X",ord($c);
+    }
+   print $fh "\n";
+  }
+ my @cmap;
+ output_ucm_page(\@cmap,$h,$h,0);
+ print $fh "#\nCHARMAP\n";
+ foreach my $line (sort { substr($a,8) cmp substr($b,8) } @cmap)
+  {
+   print $fh $line;
+  }
+ print $fh "END CHARMAP\n";
+}
+
+use vars qw(
+    $_Enc2xs
+    $_Version
+    $_Inc
+    $_E2X 
+    $_Name
+    $_TableFiles
+    $_Now
+);
+
+sub find_e2x{
+    eval { require File::Find; };
+    my (@inc, %e2x_dir);
+    for my $inc (@INC){
+    push @inc, $inc unless $inc eq '.'; #skip current dir
+    }
+    File::Find::find(
+         sub {
+         my ($dev,$ino,$mode,$nlink,$uid,$gid,$rdev,$size,
+             $atime,$mtime,$ctime,$blksize,$blocks)
+             = lstat($_) or return;
+         -f _ or return;
+         if (/^.*\.e2x$/o){
+             no warnings 'once';
+             $e2x_dir{$File::Find::dir} ||= $mtime;
+         }
+         return;
+         }, @inc);
+    warn join("\n", keys %e2x_dir), "\n";
+    for my $d (sort {$e2x_dir{$a} <=> $e2x_dir{$b}} keys %e2x_dir){
+    $_E2X = $d;
+    # warn "$_E2X => ", scalar localtime($e2x_dir{$d});
+    return $_E2X;
+    }
+}
+
+sub make_makefile_pl
+{
+    eval { require Encode; };
+    $@ and die "You need to install Encode to use enc2xs -M\nerror: $@\n";
+    # our used for variable expansion
+    $_Enc2xs = $0;
+    $_Version = $VERSION;
+    $_E2X = find_e2x();
+    $_Name = shift;
+    $_TableFiles = join(",", map {qq('$_')} @_);
+    $_Now = scalar localtime();
+
+    eval { require File::Spec; };
+    _print_expand(File::Spec->catfile($_E2X,"Makefile_PL.e2x"),"Makefile.PL");
+    _print_expand(File::Spec->catfile($_E2X,"_PM.e2x"),        "$_Name.pm");
+    _print_expand(File::Spec->catfile($_E2X,"_T.e2x"),         "t/$_Name.t");
+    _print_expand(File::Spec->catfile($_E2X,"README.e2x"),     "README");
+    _print_expand(File::Spec->catfile($_E2X,"Changes.e2x"),    "Changes");
+    exit;
+}
+
+use vars qw(
+        $_ModLines
+        $_LocalVer
+        );
+
+sub make_configlocal_pm {
+    eval { require Encode; };
+    $@ and die "Unable to require Encode: $@\n";
+    eval { require File::Spec; };
+
+    # our used for variable expantion
+    my %in_core = map { $_ => 1 } (
+        'ascii',      'iso-8859-1', 'utf8',
+        'ascii-ctrl', 'null',       'utf-8-strict'
+    );
+    my %LocalMod = ();
+    # check @enc;
+    use File::Find ();
+    my $wanted = sub{
+	-f $_ or return;
+	$File::Find::name =~ /\A\./        and return;
+	$File::Find::name =~ /\.pm\z/      or  return;
+	$File::Find::name =~ m/\bEncode\b/ or  return;
+	my $mod = $File::Find::name;
+	$mod =~ s/.*\bEncode\b/Encode/o;
+	$mod =~ s/\.pm\z//o;
+	$mod =~ s,/,::,og;
+	eval qq{ require $mod; };
+        return if $@;
+        warn qq{ require $mod;\n};
+	for my $enc ( Encode->encodings() ) {
+	    no warnings;
+	    $in_core{$enc}                   and next;
+	    $Encode::Config::ExtModule{$enc} and next;
+	    $LocalMod{$enc} ||= $mod;
+	}
+    };
+    File::Find::find({wanted => $wanted}, @INC);
+    $_ModLines = "";
+    for my $enc ( sort keys %LocalMod ) {
+        $_ModLines .=
+          qq(\$Encode::ExtModule{'$enc'} = "$LocalMod{$enc}";\n);
+    }
+    warn $_ModLines if $_ModLines;
+    $_LocalVer = _mkversion();
+    $_E2X      = find_e2x();
+    $_Inc      = $INC{"Encode.pm"};
+    $_Inc =~ s/\.pm$//o;
+    _print_expand( File::Spec->catfile( $_E2X, "ConfigLocal_PM.e2x" ),
+        File::Spec->catfile( $_Inc, "ConfigLocal.pm" ), 1 );
+    exit;
+}
+
+sub _mkversion{
+    # v-string is now depreciated; use time() instead;
+    #my ($ss,$mm,$hh,$dd,$mo,$yyyy) = localtime();
+    #$yyyy += 1900, $mo +=1;
+    #return sprintf("v%04d.%04d.%04d", $yyyy, $mo*100+$dd, $hh*100+$mm);
+    return time();
+}
+
+sub _print_expand{
+    eval { require File::Basename; };
+    $@ and die "File::Basename needed.  Are you on miniperl?;\nerror: $@\n";
+    File::Basename->import();
+    my ($src, $dst, $clobber) = @_;
+    if (!$clobber and -e $dst){
+    warn "$dst exists. skipping\n";
+    return;
+    }
+    warn "Generating $dst...\n";
+    open my $in, $src or die "$src : $!";
+    if ((my $d = dirname($dst)) ne '.'){
+    -d $d or mkdir $d, 0755 or die  "mkdir $d : $!";
+    }	   
+    open my $out, ">$dst" or die "$!";
+    my $asis = 0;
+    while (<$in>){ 
+    if (/^#### END_OF_HEADER/){
+        $asis = 1; next;
+    }	  
+    s/(\$_[A-Z][A-Za-z0-9]+)_/$1/gee unless $asis;
+    print $out $_;
+    }
+}
+__END__
+
+=head1 NAME
+
+enc2xs -- Perl Encode Module Generator
+
+=head1 SYNOPSIS
+
+  enc2xs -[options]
+  enc2xs -M ModName mapfiles...
+  enc2xs -C
+
+=head1 DESCRIPTION
+
+F<enc2xs> builds a Perl extension for use by Encode from either
+Unicode Character Mapping files (.ucm) or Tcl Encoding Files (.enc).
+Besides being used internally during the build process of the Encode
+module, you can use F<enc2xs> to add your own encoding to perl.
+No knowledge of XS is necessary.
+
+=head1 Quick Guide
+
+If you want to know as little about Perl as possible but need to
+add a new encoding, just read this chapter and forget the rest.
+
+=over 4
+
+=item 0.Z<>
+
+Have a .ucm file ready.  You can get it from somewhere or you can write
+your own from scratch or you can grab one from the Encode distribution
+and customize it.  For the UCM format, see the next Chapter.  In the
+example below, I'll call my theoretical encoding myascii, defined
+in I<my.ucm>.  C<$> is a shell prompt.
+
+  $ ls -F
+  my.ucm
+
+=item 1.Z<>
+
+Issue a command as follows;
+
+  $ enc2xs -M My my.ucm
+  generating Makefile.PL
+  generating My.pm
+  generating README
+  generating Changes
+
+Now take a look at your current directory.  It should look like this.
+
+  $ ls -F
+  Makefile.PL   My.pm         my.ucm        t/
+
+The following files were created.
+
+  Makefile.PL - MakeMaker script
+  My.pm       - Encode submodule
+  t/My.t      - test file
+
+=over 4
+
+=item 1.1.Z<>
+
+If you want *.ucm installed together with the modules, do as follows;
+
+  $ mkdir Encode
+  $ mv *.ucm Encode
+  $ enc2xs -M My Encode/*ucm
+
+=back
+
+=item 2.Z<>
+
+Edit the files generated.  You don't have to if you have no time AND no
+intention to give it to someone else.  But it is a good idea to edit
+the pod and to add more tests.
+
+=item 3.Z<>
+
+Now issue a command all Perl Mongers love:
+
+  $ perl Makefile.PL
+  Writing Makefile for Encode::My
+
+=item 4.Z<>
+
+Now all you have to do is make.
+
+  $ make
+  cp My.pm blib/lib/Encode/My.pm
+  /usr/local/bin/perl /usr/local/bin/enc2xs -Q -O \
+    -o encode_t.c -f encode_t.fnm
+  Reading myascii (myascii)
+  Writing compiled form
+  128 bytes in string tables
+  384 bytes (75%) saved spotting duplicates
+  1 bytes (0.775%) saved using substrings
+  ....
+  chmod 644 blib/arch/auto/Encode/My/My.bs
+  $
+
+The time it takes varies depending on how fast your machine is and
+how large your encoding is.  Unless you are working on something big
+like euc-tw, it won't take too long.
+
+=item 5.Z<>
+
+You can "make install" already but you should test first.
+
+  $ make test
+  PERL_DL_NONLAZY=1 /usr/local/bin/perl -Iblib/arch -Iblib/lib \
+    -e 'use Test::Harness  qw(&runtests $verbose); \
+    $verbose=0; runtests @ARGV;' t/*.t
+  t/My....ok
+  All tests successful.
+  Files=1, Tests=2,  0 wallclock secs
+   ( 0.09 cusr + 0.01 csys = 0.09 CPU)
+
+=item 6.Z<>
+
+If you are content with the test result, just "make install"
+
+=item 7.Z<>
+
+If you want to add your encoding to Encode's demand-loading list
+(so you don't have to "use Encode::YourEncoding"), run
+
+  enc2xs -C
+
+to update Encode::ConfigLocal, a module that controls local settings.
+After that, "use Encode;" is enough to load your encodings on demand.
+
+=back
+
+=head1 The Unicode Character Map
+
+Encode uses the Unicode Character Map (UCM) format for source character
+mappings.  This format is used by IBM's ICU package and was adopted
+by Nick Ing-Simmons for use with the Encode module.  Since UCM is
+more flexible than Tcl's Encoding Map and far more user-friendly,
+this is the recommended format for Encode now.
+
+A UCM file looks like this.
+
+  #
+  # Comments
+  #
+  <code_set_name> "US-ascii" # Required
+  <code_set_alias> "ascii"   # Optional
+  <mb_cur_min> 1             # Required; usually 1
+  <mb_cur_max> 1             # Max. # of bytes/char
+  <subchar> \x3F             # Substitution char
+  #
+  CHARMAP
+  <U0000> \x00 |0 # <control>
+  <U0001> \x01 |0 # <control>
+  <U0002> \x02 |0 # <control>
+  ....
+  <U007C> \x7C |0 # VERTICAL LINE
+  <U007D> \x7D |0 # RIGHT CURLY BRACKET
+  <U007E> \x7E |0 # TILDE
+  <U007F> \x7F |0 # <control>
+  END CHARMAP
+
+=over 4
+
+=item *
+
+Anything that follows C<#> is treated as a comment.
+
+=item *
+
+The header section continues until a line containing the word
+CHARMAP. This section has a form of I<E<lt>keywordE<gt> value>, one
+pair per line.  Strings used as values must be quoted. Barewords are
+treated as numbers.  I<\xXX> represents a byte.
+
+Most of the keywords are self-explanatory. I<subchar> means
+substitution character, not subcharacter.  When you decode a Unicode
+sequence to this encoding but no matching character is found, the byte
+sequence defined here will be used.  For most cases, the value here is
+\x3F; in ASCII, this is a question mark.
+
+=item *
+
+CHARMAP starts the character map section.  Each line has a form as
+follows:
+
+  <UXXXX> \xXX.. |0 # comment
+    ^     ^      ^
+    |     |      +- Fallback flag
+    |     +-------- Encoded byte sequence
+    +-------------- Unicode Character ID in hex
+
+The format is roughly the same as a header section except for the
+fallback flag: | followed by 0..3.   The meaning of the possible
+values is as follows:
+
+=over 4
+
+=item |0 
+
+Round trip safe.  A character decoded to Unicode encodes back to the
+same byte sequence.  Most characters have this flag.
+
+=item |1
+
+Fallback for unicode -> encoding.  When seen, enc2xs adds this
+character for the encode map only.
+
+=item |2 
+
+Skip sub-char mapping should there be no code point.
+
+=item |3 
+
+Fallback for encoding -> unicode.  When seen, enc2xs adds this
+character for the decode map only.
+
+=back
+
+=item *
+
+And finally, END OF CHARMAP ends the section.
+
+=back
+
+When you are manually creating a UCM file, you should copy ascii.ucm
+or an existing encoding which is close to yours, rather than write
+your own from scratch.
+
+When you do so, make sure you leave at least B<U0000> to B<U0020> as
+is, unless your environment is EBCDIC.
+
+B<CAVEAT>: not all features in UCM are implemented.  For example,
+icu:state is not used.  Because of that, you need to write a perl
+module if you want to support algorithmical encodings, notably
+the ISO-2022 series.  Such modules include L<Encode::JP::2022_JP>,
+L<Encode::KR::2022_KR>, and L<Encode::TW::HZ>.
+
+=head2 Coping with duplicate mappings
+
+When you create a map, you SHOULD make your mappings round-trip safe.
+That is, C<encode('your-encoding', decode('your-encoding', $data)) eq
+$data> stands for all characters that are marked as C<|0>.  Here is
+how to make sure:
+
+=over 4
+
+=item * 
+
+Sort your map in Unicode order.
+
+=item *
+
+When you have a duplicate entry, mark either one with '|1' or '|3'.
+  
+=item * 
+
+And make sure the '|1' or '|3' entry FOLLOWS the '|0' entry.
+
+=back
+
+Here is an example from big5-eten.
+
+  <U2550> \xF9\xF9 |0
+  <U2550> \xA2\xA4 |3
+
+Internally Encoding -> Unicode and Unicode -> Encoding Map looks like
+this;
+
+  E to U               U to E
+  --------------------------------------
+  \xF9\xF9 => U2550    U2550 => \xF9\xF9
+  \xA2\xA4 => U2550
+ 
+So it is round-trip safe for \xF9\xF9.  But if the line above is upside
+down, here is what happens.
+
+  E to U               U to E
+  --------------------------------------
+  \xA2\xA4 => U2550    U2550 => \xF9\xF9
+  (\xF9\xF9 => U2550 is now overwritten!)
+
+The Encode package comes with F<ucmlint>, a crude but sufficient
+utility to check the integrity of a UCM file.  Check under the
+Encode/bin directory for this.
+
+When in doubt, you can use F<ucmsort>, yet another utility under
+Encode/bin directory.
+
+=head1 Bookmarks
+
+=over 4
+
+=item *
+
+ICU Home Page 
+L<http://www.icu-project.org/>
+
+=item *
+
+ICU Character Mapping Tables
+L<http://site.icu-project.org/charts/charset>
+
+=item *
+
+ICU:Conversion Data
+L<http://www.icu-project.org/userguide/conversion-data.html>
+
+=back
+
+=head1 SEE ALSO
+
+L<Encode>,
+L<perlmod>,
+L<perlpod>
+
+=cut
+
+# -Q to disable the duplicate codepoint test
+# -S make mapping errors fatal
+# -q to remove comments written to output files
+# -O to enable the (brute force) substring optimiser
+# -o <output> to specify the output file name (else it's the first arg)
+# -f <inlist> to give a file with a list of input files (else use the args)
+# -n <name> to name the encoding (else use the basename of the input file.
+
+With %seen holding array refs:
+
+      865.66 real        28.80 user         8.79 sys
+      7904  maximum resident set size
+      1356  average shared memory size
+     18566  average unshared data size
+       229  average unshared stack size
+     46080  page reclaims
+     33373  page faults
+
+With %seen holding simple scalars:
+
+      342.16 real        27.11 user         3.54 sys
+      8388  maximum resident set size
+      1394  average shared memory size
+     14969  average unshared data size
+       236  average unshared stack size
+     28159  page reclaims
+      9839  page faults
+
+Yes, 5 minutes is faster than 15. Above is for CP936 in CN. Only difference is
+how %seen is storing things its seen. So it is pathalogically bad on a 16M
+RAM machine, but it's going to help even on modern machines.
+Swapping is bad, m'kay :-)
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/encguess b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/encguess
new file mode 100644
index 00000000..468a4e6e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/encguess
@@ -0,0 +1,148 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!./perl
+use 5.008001;
+use strict;
+use warnings;
+use Encode;
+use Getopt::Std;
+use Carp;
+use Encode::Guess;
+$Getopt::Std::STANDARD_HELP_VERSION = 1;
+
+my %opt;
+getopts( "huSs:", \%opt );
+my @suspect_list;
+list_valid_suspects() and exit if $opt{S};
+@suspect_list = split /:,/, $opt{s} if $opt{s};
+HELP_MESSAGE() if $opt{h};
+HELP_MESSAGE() unless @ARGV;
+do_guess($_) for @ARGV;
+
+sub read_file {
+    my $filename = shift;
+    local $/;
+    open my $fh, '<:raw', $filename or croak "$filename:$!";
+    my $content = <$fh>;
+    close $fh;
+    return $content;
+}
+
+sub do_guess {
+    my $filename = shift;
+    my $data     = read_file($filename);
+    my $enc      = guess_encoding( $data, @suspect_list );
+    if ( !ref($enc) && $opt{u} ) {
+        return 1;
+    }
+    print "$filename\t";
+    if ( ref($enc) ) {
+        print $enc->mime_name();
+    }
+    else {
+        print "unknown";
+    }
+    print "\n";
+    return 1;
+}
+
+sub list_valid_suspects {
+    print join( "\n", Encode->encodings(":all") );
+    print "\n";
+    return 1;
+}
+
+sub HELP_MESSAGE {
+    exec 'pod2usage', $0 or die "pod2usage: $!" 
+}
+__END__
+=head1 NAME
+
+encguess - guess character encodings of files
+
+=head1 VERSION
+
+$Id: encguess,v 0.1 2015/02/05 10:34:19 dankogai Exp $
+
+=head1 SYNOPSIS
+
+  encguess [switches] filename...
+
+=head2 SWITCHES
+
+=over 2
+
+=item -h
+
+show this message and exit.
+
+=item -s
+
+specify a list of "suspect encoding types" to test, 
+seperated by either C<:> or C<,>
+
+=item -S
+
+output a list of all acceptable encoding types that can be used with
+the -s param
+
+=item -u
+
+suppress display of unidentified types
+
+=back
+
+=head2 EXAMPLES:
+
+=over 2
+
+=item *
+
+Guess encoding of a file named C<test.txt>, using only the default
+suspect types.
+
+   encguess test.txt
+
+=item *
+
+Guess the encoding type of a file named C<test.txt>, using the suspect
+types C<euc-jp,shiftjis,7bit-jis>.
+
+   encguess -s euc-jp,shiftjis,7bit-jis test.txt
+   encguess -s euc-jp:shiftjis:7bit-jis test.txt
+
+=item *
+
+Guess the encoding type of several files, do not display results for
+unidentified files.
+
+   encguess -us euc-jp,shiftjis,7bit-jis test*.txt
+
+=back
+
+=head1 DESCRIPTION
+
+The encoding identification is done by checking one encoding type at a
+time until all but the right type are eliminated. The set of encoding
+types to try is defined by the -s parameter and defaults to ascii,
+utf8 and UTF-16/32 with BOM. This can be overridden by passing one or
+more encoding types via the -s parameter. If you need to pass in
+multiple suspect encoding types, use a quoted string with the a space
+separating each value.
+
+=head1 SEE ALSO
+
+L<Encode::Guess>, L<Encode::Detect>
+
+=head1 LICENSE AND COPYRIGHT
+
+Copyright 2015 Michael LaGrasta and Dan Kogai.
+
+This program is free software; you can redistribute it and/or modify it
+under the terms of the the Artistic License (2.0). You may obtain a
+copy of the full license at:
+
+L<http://www.perlfoundation.org/artistic_license_2_0>
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/env.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/env.exe
new file mode 100644
index 00000000..cc913f16
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/env.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ex b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ex
new file mode 100644
index 00000000..ce8c2394
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ex differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expand.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expand.exe
new file mode 100644
index 00000000..a16d4057
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expand.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expr.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expr.exe
new file mode 100644
index 00000000..ee8605f5
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/expr.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/factor.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/factor.exe
new file mode 100644
index 00000000..fb843566
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/factor.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/false.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/false.exe
new file mode 100644
index 00000000..b91956c0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/false.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fgrep
new file mode 100644
index 00000000..7389264c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fgrep
@@ -0,0 +1,2 @@
+#!/bin/sh
+exec grep -F "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/file.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/file.exe
new file mode 100644
index 00000000..1dcd91f3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/file.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/find.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/find.exe
new file mode 100644
index 00000000..598e4d12
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/find.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/flock.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/flock.exe
new file mode 100644
index 00000000..116c8ed4
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/flock.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fmt.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fmt.exe
new file mode 100644
index 00000000..c0ff3453
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fmt.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fold.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fold.exe
new file mode 100644
index 00000000..c50abe12
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/fold.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk-4.1.3.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk-4.1.3.exe
new file mode 100644
index 00000000..277ff54b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk-4.1.3.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk.exe
new file mode 100644
index 00000000..277ff54b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gawk.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcc.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcc.exe
new file mode 100644
index 00000000..0c64107d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcc.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gccbug b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gccbug
new file mode 100644
index 00000000..a09dc828
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gccbug
@@ -0,0 +1,558 @@
+#!/bin/sh
+# Submit a problem report to a GNATS site.
+# Copyright (C) 1993, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
+# Contributed by Brendan Kehoe (brendan@cygnus.com), based on a
+# version written by Heinz G. Seidl (hgs@cygnus.com).
+#
+# This file is part of GNU GNATS.
+#
+# GNU GNATS is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU GNATS is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU GNATS; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# The version of this send-pr.
+VERSION=3.113
+
+# The submitter-id for your site.
+SUBMITTER=net
+
+# The default mail address for PR submissions. 
+GNATS_ADDR=gcc-gnats@gcc.gnu.org
+
+# The default release for this host.
+# We have to guess at what program_transform_name might have done.
+# "sed 1q" because neither "head -1" nor "head -n 1" is universal, argh.
+
+DEFAULT_GCC="`echo $0 | sed -e 's/bug//'`"
+DEFAULT_RELEASE="`$DEFAULT_GCC --version | sed 1q`"
+
+# The default organization.
+DEFAULT_ORGANIZATION=
+
+# What mailer to use.  This must come after the config file, since it is
+# host-dependent.
+# Copied from cvsbug
+if [ -f /usr/sbin/sendmail ]; then  
+    MAIL_AGENT="/usr/sbin/sendmail -oi -t"
+else  
+    MAIL_AGENT="/usr/lib/sendmail -oi -t"
+fi
+MAILER=`echo $MAIL_AGENT | sed -e 's, .*,,'`
+if [ ! -f "$MAILER" ] ; then
+    echo "$COMMAND: Cannot file mail program \"$MAILER\"."
+    echo "$COMMAND: Please fix the MAIL_AGENT entry in the $COMMAND file."
+    exit 1
+fi
+
+
+# How to read the passwd database.
+PASSWD="cat /etc/passwd"
+
+ECHON=bsd
+
+if [ $ECHON = bsd ] ; then
+  ECHON1="echo -n"
+  ECHON2=
+elif [ $ECHON = sysv ] ; then
+  ECHON1=echo
+  ECHON2='\c'
+else
+  ECHON1=echo
+  ECHON2=
+fi
+
+#
+
+if [ -z "$TMPDIR" ]; then
+  TMPDIR=/tmp
+else
+  if [ "`echo $TMPDIR | grep '/$'`" != "" ]; then
+    TMPDIR="`echo $TMPDIR | sed -e 's,/$,,'`"
+  fi
+fi
+
+if [ no = yes ]; then
+	TEMP0=`mktemp $TMPDIR/poXXXXXX` || exit 1
+	TEMP=`mktemp $TMPDIR/pXXXXXX` || exit 1
+	BAD=`mktemp $TMPDIR/pbadXXXXXX` || exit 1
+	REF=`mktemp $TMPDIR/pfXXXXXX` || exit 1
+	REMOVE_TEMP="rm -f $TEMP0 $TEMP $BAD $REF"
+else
+	TEMPD=$TMPDIR/pd$$
+	TEMP0=$TEMPD/po$$
+	TEMP=$TEMPD/p$$
+	BAD=$TEMPD/pbad$$
+	REF=$TEMPD/pf$$
+	mkdir $TEMPD || exit 1
+	REMOVE_TEMP="rm -rf $TEMPD"
+fi
+
+# find a user name
+if [ "$LOGNAME" = "" ]; then
+	if [ "$USER" != "" ]; then
+		LOGNAME="$USER"
+	else
+		LOGNAME="UNKNOWN"
+	fi
+fi
+
+FROM="$LOGNAME"
+REPLY_TO="${REPLY_TO:-${REPLYTO:-$LOGNAME}}"
+
+# Find out the name of the originator of this PR.
+if [ -n "$NAME" ]; then
+  ORIGINATOR="$NAME"
+elif [ -f $HOME/.fullname ]; then
+  ORIGINATOR="`sed -e '1q' $HOME/.fullname`"
+else
+  # Must use temp file due to incompatibilities in quoting behavior
+  # and to protect shell metacharacters in the expansion of $LOGNAME
+  $PASSWD | grep "^$LOGNAME:" | awk -F: '{print $5}' | sed -e 's/,.*//' > $TEMP0
+  ORIGINATOR="`cat $TEMP0`"
+  rm -f $TEMP0
+fi
+
+if [ -n "$ORGANIZATION" ]; then
+  if [ -f "$ORGANIZATION" ]; then
+    ORGANIZATION="`cat $ORGANIZATION`"
+  fi
+else
+  if [ -n "$DEFAULT_ORGANIZATION" ]; then
+    ORGANIZATION="$DEFAULT_ORGANIZATION"
+  elif [ -f $HOME/.organization ]; then
+    ORGANIZATION="`cat $HOME/.organization`"
+  fi
+fi
+
+# If they don't have a preferred editor set, then use
+if [ -z "$VISUAL" ]; then
+  if [ -z "$EDITOR" ]; then
+    EDIT=vi
+  else
+    EDIT="$EDITOR"
+  fi
+else
+  EDIT="$VISUAL"
+fi
+
+# Find out some information.
+SYSTEM=`( [ -f /bin/uname ] && /bin/uname -a ) || \
+        ( [ -f /usr/bin/uname ] && /usr/bin/uname -a ) || echo ""`
+ARCH=`[ -f /bin/arch ] && /bin/arch`
+MACHINE=`[ -f /bin/machine ] && /bin/machine`
+
+COMMAND=`echo $0 | sed -e 's,.*/,,'`
+USAGE="Usage: $COMMAND [-PVL] [-t address] [-f filename] [-s severity]
+       [-c address] [--request-id] [--version]"
+REMOVE=
+BATCH=
+CC=
+SEVERITY_C=
+
+while [ $# -gt 0 ]; do
+  case "$1" in
+    -r) ;; 		# Ignore for backward compat.
+    -t | --to) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; GNATS_ADDR="$1"
+	EXPLICIT_GNATS_ADDR=true
+        ;;
+    -f | --file) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; IN_FILE="$1"
+	if [ "$IN_FILE" != "-" -a ! -r "$IN_FILE" ]; then
+	  echo "$COMMAND: cannot read $IN_FILE"
+	  $REMOVE_TEMP
+	  exit 1
+	fi
+	;;
+    -b | --batch) BATCH=true ;;
+    -c | --cc) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; CC="$1"
+	;;
+    -s | --severity) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; SEVERITY_C="$1"
+	;;
+    -p | -P | --print) PRINT=true ;;
+    -L | --list) FORMAT=norm ;;
+    -l | -CL | --lisp) FORMAT=lisp ;;
+    --request-id) REQUEST_ID=true ;;
+    -h | --help) echo "$USAGE"; $REMOVE_TEMP; exit 0 ;;
+    -V | --version) cat <<EOF
+gccbug (GCC) $DEFAULT_RELEASE
+Copyright (C) 2002 Free Software Foundation, Inc.
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+EOF
+	$REMOVE_TEMP; exit 0 ;;
+    -*) echo "$USAGE" ; $REMOVE_TEMP; exit 1 ;;
+    *) echo "$USAGE" ; $REMOVE_TEMP; exit 1
+ esac
+ shift
+done
+
+# spam does not need to be listed here
+CATEGORIES="ada bootstrap c++ c debug driver fortran inline-asm java libgcj libobjc libstdc++ middle-end objc other pch preprocessor rtl-optimization target tree-optimization web"
+
+case "$FORMAT" in
+  lisp) echo "$CATEGORIES" | \
+        awk 'BEGIN {printf "( "} {printf "(\"%s\") ",$0} END {printf ")\n"}'
+	$REMOVE_TEMP
+        exit 0
+        ;;
+  norm) l=`echo "$CATEGORIES" | \
+	awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+	     END {print max + 1;}'`
+	c=`expr 70 / $l`
+	if [ $c -eq 0 ]; then c=1; fi
+	echo "$CATEGORIES" | \
+        awk 'BEGIN {print "Known categories:"; i = 0 }
+          { printf ("%-'$l'.'$l's", $0); if ((++i % '$c') == 0) { print "" } }
+            END { print ""; }'
+	$REMOVE_TEMP
+        exit 0
+        ;;
+esac
+
+ORIGINATOR_C='<name of the PR author (one line)>'
+ORGANIZATION_C='<organization of PR author (multiple lines)>'
+SYNOPSIS_C='<synopsis of the problem (one line)>'
+if [ -z "$SEVERITY_C" ]; then
+  SEVERITY_C='<[ non-critical | serious | critical ] (one line)>'
+fi
+PRIORITY_C='<[ low | medium ] (one line)>'
+CATEGORY_C='<choose from the top of this file (one line)>'
+RELEASE_C='<release number or tag (one line)>'
+ENVIRONMENT_C='<machine, os, target, libraries (multiple lines)>'
+DESCRIPTION_C='<precise description of the problem (multiple lines)>'
+HOW_TO_REPEAT_C='<When reporting a compiler error, preprocessor output must be included>'
+FIX_C='<how to correct or work around the problem, if known (multiple lines)>'
+
+# Catch some signals. ($xs kludge needed by Sun /bin/sh)
+xs=0
+trap '$REMOVE_TEMP; exit $xs' 0
+trap 'echo "$COMMAND: Aborting ..."; $REMOVE_TEMP; xs=1; exit' 1 3 13 15
+
+# If they told us to use a specific file, then do so.
+if [ -n "$IN_FILE" ]; then
+  if [ "$IN_FILE" = "-" ]; then
+    # The PR is coming from the standard input.
+    if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+      sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" > $TEMP
+    else
+      cat > $TEMP
+    fi
+  else
+    # Use the file they named.
+    if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+      sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" $IN_FILE > $TEMP
+    else
+      cat $IN_FILE > $TEMP
+    fi
+  fi
+else
+
+  if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+    # If their PR_FORM points to a bogus entry, then bail.
+    if [ ! -f "$PR_FORM" -o ! -r "$PR_FORM" -o ! -s "$PR_FORM" ]; then
+      echo "$COMMAND: can't seem to read your template file (\`$PR_FORM'), ignoring PR_FORM"
+      sleep 1
+      PRINT_INTERN=bad_prform
+    fi
+  fi
+
+  if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+    cp $PR_FORM $TEMP || 
+      ( echo "$COMMAND: could not copy $PR_FORM" ; xs=1; exit )
+  else
+    for file in $TEMP $REF ; do
+      cat  > $file << '__EOF__'
+SEND-PR: -*- send-pr -*-
+SEND-PR: Lines starting with `SEND-PR' will be removed automatically, as
+SEND-PR: will all comments (text enclosed in `<' and `>').
+SEND-PR: 
+SEND-PR: Please consult the GCC manual if you are not sure how to
+SEND-PR: fill out a problem report.
+SEND-PR: Note that the Synopsis field is mandatory.  The Subject (for
+SEND-PR: the mail) will be made the same as Synopsis unless explicitly
+SEND-PR: changed.
+SEND-PR:
+SEND-PR: Choose from the following categories:
+SEND-PR:
+__EOF__
+
+      # Format the categories so they fit onto lines.
+	l=`echo "$CATEGORIES" | \
+	awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+	     END {print max + 1;}'`
+	c=`expr 61 / $l`
+	if [ $c -eq 0 ]; then c=1; fi
+	echo "$CATEGORIES" | \
+        awk 'BEGIN {printf "SEND-PR: "; i = 0 }
+          { printf ("%-'$l'.'$l's", $0);
+	    if ((++i % '$c') == 0) { printf "\nSEND-PR: " } }
+            END { printf "\nSEND-PR:\n"; }' >> $file
+
+      cat >> $file << __EOF__
+To: $GNATS_ADDR
+Subject: 
+From: $FROM
+Reply-To: $REPLYTO
+Cc: $CC
+X-send-pr-version: $VERSION
+X-GNATS-Notify: 
+
+
+>Submitter-Id:	$SUBMITTER
+>Originator:	$ORIGINATOR
+>Organization:	${ORGANIZATION-$ORGANIZATION_C}
+>Confidential:	no
+SEND-PR: Leave "Confidential" as "no"; all GCC PRs are public.
+>Synopsis:	$SYNOPSIS_C
+>Severity:	$SEVERITY_C
+SEND-PR: critical     GCC is completely not operational; no work-around known.
+SEND-PR: serious      GCC is not working properly; a work-around is possible.
+SEND-PR: non-critical Report indicates minor problem.
+>Priority:	$PRIORITY_C
+SEND-PR: medium       The problem should be solved in the next release.
+SEND-PR: low          The problem should be solve in a future release.
+>Category:	$CATEGORY_C
+>Class:		<[ doc-bug | accepts-illegal | rejects-legal | wrong-code | ice-on-legal-code| ice-on-illegal-code | pessimizes-code | sw-bug | change-request | support ] (one line)>
+SEND-PR: doc-bug          The documentation is incorrect.
+SEND-PR: accepts-illegal  GCC fails to reject erroneous code.
+SEND-PR: rejects-legal    GCC gives an error message for correct code.
+SEND-PR: wrong-code       The machine code generated by gcc is incorrect.
+SEND-PR: ice-on-legal-code   GCC gives an Internal Compiler Error (ICE)
+SEND-PR:                     for correct code
+SEND-PR: ice-on-illegal-code GCC gives an ICE instead of reporting an error
+SEND-PR: pessimizes-code     GCC misses an important optimization opportunity
+SEND-PR: sw-bug              Software bug of some other class than above
+SEND-PR: change-request      A feature in GCC is missing.
+SEND-PR: support             I need help with gcc.
+>Release:	${DEFAULT_RELEASE-$RELEASE_C}
+>Environment:
+`[ -n "$SYSTEM" ] && echo System: $SYSTEM`
+`[ -n "$ARCH" ] && echo Architecture: $ARCH`
+`[ -n "$MACHINE" ] && echo Machine: $MACHINE`
+	$ENVIRONMENT_C
+host: i386-pc-mingw32
+build: i386-pc-mingw32
+target: i386-pc-mingw32
+__EOF__
+      cat >> $file << \__EOF__
+configured with: ../gcc-4.5.2/configure --enable-languages=c,c++,ada,fortran,objc,obj-c++ --disable-sjlj-exceptions --with-dwarf2 --enable-shared --enable-libgomp --disable-win32-registry --enable-libstdcxx-debug --enable-version-specific-runtime-libs --disable-werror --build=mingw32 --prefix=/mingw
+__EOF__
+      cat >> $file << __EOF__
+>Description:
+	$DESCRIPTION_C
+>How-To-Repeat:
+	$HOW_TO_REPEAT_C
+>Fix:
+	$FIX_C
+__EOF__
+    done
+  fi
+
+  if [ "$PRINT" = true -o "$PRINT_INTERN" = true ]; then
+    cat $TEMP
+    xs=0; exit
+  fi
+
+  chmod u+w $TEMP
+  if [ -z "$REQUEST_ID" ]; then
+    eval $EDIT $TEMP
+  else
+    ed -s $TEMP << '__EOF__'
+/^Subject/s/^Subject:.*/Subject: request for a customer id/
+/^>Category/s/^>Category:.*/>Category: send-pr/
+w
+q
+__EOF__
+  fi
+
+  if cmp -s $REF $TEMP ; then
+    echo "$COMMAND: problem report not filled out, therefore not sent"
+    xs=1; exit
+  fi
+fi
+
+#
+#	Check the enumeration fields
+
+# This is a "sed-subroutine" with one keyword parameter 
+# (with workaround for Sun sed bug)
+#
+SED_CMD='
+/$PATTERN/{
+s|||
+s|<.*>||
+s|^[ 	]*||
+s|[ 	]*$||
+p
+q
+}'
+
+
+while [ -z "$REQUEST_ID" ]; do
+  CNT=0
+
+  # 1) Confidential
+  #
+  PATTERN=">Confidential:"
+  CONFIDENTIAL=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$CONFIDENTIAL" in
+    no) CNT=`expr $CNT + 1` ;;
+    *) echo "$COMMAND: \`$CONFIDENTIAL' is not a valid value for \`Confidential'." ;;
+  esac
+  #
+  # 2) Severity
+  #
+  PATTERN=">Severity:"
+  SEVERITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$SEVERITY" in
+    ""|non-critical|serious|critical) CNT=`expr $CNT + 1` ;;
+    *)  echo "$COMMAND: \`$SEVERITY' is not a valid value for \`Severity'."
+  esac
+  #
+  # 3) Priority
+  #
+  PATTERN=">Priority:"
+  PRIORITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$PRIORITY" in
+    ""|low|medium) CNT=`expr $CNT + 1` ;;
+    high) echo "$COMMAND: \`Priority: high' is reserved for GCC maintainers." ;;
+    *)  echo "$COMMAND: \`$PRIORITY' is not a valid value for \`Priority'."
+  esac
+  #
+  # 4) Category
+  #
+  PATTERN=">Category:"
+  CATEGORY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  FOUND=
+  for C in $CATEGORIES
+  do
+    if [ "$C" = "$CATEGORY" ]; then FOUND=true ; break ; fi
+  done
+  if [ -n "$FOUND" ]; then
+    CNT=`expr $CNT + 1`	
+  else
+    if [ -z "$CATEGORY" ]; then
+      echo "$COMMAND: you must include a Category: field in your report."
+    else
+      echo "$COMMAND: \`$CATEGORY' is not a known category."
+    fi
+  fi
+  #
+  # 5) Class
+  #
+  PATTERN=">Class:"
+  CLASS=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$CLASS" in
+    ""|doc-bug|accepts-illegal|rejects-legal|wrong-code|ice-on-legal-code|ice-on-illegal-code|pessimizes-code|sw-bug|change-request|support) CNT=`expr $CNT + 1` ;;
+    *)  echo "$COMMAND: \`$CLASS' is not a valid value for \`Class'."
+  esac
+  #
+  # 6) Check that synopsis is not empty
+  #
+  if grep "^>Synopsis:[ 	]*${SYNOPSIS_C}\$" $TEMP > /dev/null
+  then
+    echo "$COMMAND: Synopsis must not be empty."
+  else
+    CNT=`expr $CNT + 1`
+  fi
+
+  [ $CNT -lt 6 -a -z "$BATCH" ] && 
+    echo "Errors were found with the problem report."
+
+  while true; do
+    if [ -z "$BATCH" ]; then
+      $ECHON1 "a)bort, e)dit or s)end? $ECHON2"
+      read input
+    else
+      if [ $CNT -eq 6 ]; then
+        input=s
+      else
+        input=a
+      fi
+    fi
+    case "$input" in
+      a*)
+	if [ -z "$BATCH" ]; then
+	  echo "$COMMAND: the problem report remains in $BAD and is not sent."
+	  REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+	  mv $TEMP $BAD
+        else
+	  echo "$COMMAND: the problem report is not sent."
+	fi
+	xs=1; exit
+	;;
+      e*)
+        eval $EDIT $TEMP
+	continue 2
+	;;
+      s*)
+	break 2
+	;;
+    esac
+  done
+done
+
+#
+# Make sure the mail has got a Subject.  If not, use the same as
+# in Synopsis.
+#
+
+if grep '^Subject:[ 	]*$' $TEMP > /dev/null
+then
+  SYNOPSIS=`grep '^>Synopsis:' $TEMP | sed -e 's/^>Synopsis:[ 	]*//'`
+  ed -s $TEMP << __EOF__
+/^Subject:/s/:.*\$/: $SYNOPSIS/
+w
+q
+__EOF__
+fi
+
+#
+#	Remove comments and send the problem report
+#	(we have to use patterns, where the comment contains regex chars)
+#
+# /^>Originator:/s;$ORIGINATOR;;
+sed  -e "
+/^SEND-PR:/d
+/^>Organization:/,/^>[A-Za-z-]*:/s;$ORGANIZATION_C;;
+/^>Confidential:/s;<.*>;;
+/^>Synopsis:/s;$SYNOPSIS_C;;
+/^>Severity:/s;<.*>;;
+/^>Priority:/s;<.*>;;
+/^>Category:/s;$CATEGORY_C;;
+/^>Class:/s;<.*>;;
+/^>Release:/,/^>[A-Za-z-]*:/s;$RELEASE_C;;
+/^>Environment:/,/^>[A-Za-z-]*:/s;$ENVIRONMENT_C;;
+/^>Description:/,/^>[A-Za-z-]*:/s;$DESCRIPTION_C;;
+/^>How-To-Repeat:/,/^>[A-Za-z-]*:/s;$HOW_TO_REPEAT_C;;
+/^>Fix:/,/^>[A-Za-z-]*:/s;$FIX_C;;
+" $TEMP > $REF
+
+if $MAIL_AGENT < $REF; then
+  echo "$COMMAND: problem report sent"
+  xs=0; exit
+else
+  echo "$COMMAND: mysterious mail failure."
+  if [ -z "$BATCH" ]; then
+    echo "$COMMAND: the problem report remains in $BAD and is not sent."
+    REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+    mv $REF $BAD
+  else
+    echo "$COMMAND: the problem report is not sent."
+  fi
+  xs=1; exit
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcov.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcov.exe
new file mode 100644
index 00000000..5cc3e2b6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gcov.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb-python27.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb-python27.exe
new file mode 100644
index 00000000..fbbad85a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb-python27.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb.exe
new file mode 100644
index 00000000..7dd9eca2
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdb.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdbserver.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdbserver.exe
new file mode 100644
index 00000000..9ac6f103
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gdbserver.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getconf.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getconf.exe
new file mode 100644
index 00000000..df063ed0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getconf.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getfacl.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getfacl.exe
new file mode 100644
index 00000000..21bffdcc
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getfacl.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getopt.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getopt.exe
new file mode 100644
index 00000000..22eae1a3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/getopt.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gkill.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gkill.exe
new file mode 100644
index 00000000..3628bff8
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gkill.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gprof.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gprof.exe
new file mode 100644
index 00000000..ad86cd1d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gprof.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/grep.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/grep.exe
new file mode 100644
index 00000000..db9072ab
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/grep.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/groups.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/groups.exe
new file mode 100644
index 00000000..23b14fa9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/groups.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gunzip b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gunzip
new file mode 100644
index 00000000..65fa8e30
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gunzip
@@ -0,0 +1,57 @@
+#!/bin/sh
+# Uncompress files.  This is the inverse of gzip.
+
+# Copyright (C) 2007, 2010-2016 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="gunzip (gzip) 1.7
+Copyright (C) 2007, 2011-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Paul Eggert."
+
+usage="Usage: $0 [OPTION]... [FILE]...
+Uncompress FILEs (by default, in-place).
+
+Mandatory arguments to long options are mandatory for short options too.
+
+  -c, --stdout      write on standard output, keep original files unchanged
+  -f, --force       force overwrite of output file and compress links
+  -k, --keep        keep (don't delete) input files
+  -l, --list        list compressed file contents
+  -n, --no-name     do not save or restore the original name and time stamp
+  -N, --name        save or restore the original name and time stamp
+  -q, --quiet       suppress all warnings
+  -r, --recursive   operate recursively on directories
+  -S, --suffix=SUF  use suffix SUF on compressed files
+      --synchronous synchronous output (safer if system crashes, but slower)
+  -t, --test        test compressed file integrity
+  -v, --verbose     verbose mode
+      --help        display this help and exit
+      --version     display version information and exit
+
+With no FILE, or when FILE is -, read standard input.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+case $1 in
+--help)    exec echo "$usage";;
+--version) exec echo "$version";;
+esac
+
+exec gzip -d "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzexe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzexe
new file mode 100644
index 00000000..719b80bd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzexe
@@ -0,0 +1,227 @@
+#!/bin/sh
+# gzexe: compressor for Unix executables.
+# Use this only for binaries that you do not use frequently.
+#
+# The compressed version is a shell script which decompresses itself after
+# skipping $skip lines of shell commands.  We try invoking the compressed
+# executable with the original name (for programs looking at their name).
+# We also try to retain the original file permissions on the compressed file.
+# For safety reasons, gzexe will not create setuid or setgid shell scripts.
+
+# WARNING: the first line of this file must be either : or #!/bin/sh
+# The : is required for some old versions of csh.
+# On Ultrix, /bin/sh is too buggy, change the first line to: #!/bin/sh5
+
+
+# Copyright (C) 1998, 2002, 2004, 2006-2007, 2010-2016 Free Software
+# Foundation, Inc.
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+tab='	'
+nl='
+'
+IFS=" $tab$nl"
+
+version='gzexe (gzip) 1.7
+Copyright (C) 2007, 2011-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly.'
+
+usage="Usage: $0 [OPTION] FILE...
+Rename each FILE with a compressed version of itself, renaming FILE to FILE~.
+
+  -d             Decompress each FILE instead of compressing it.
+      --help     display this help and exit
+      --version  output version information and exit
+
+Report bugs to <bug-gzip@gnu.org>."
+
+decomp=0
+res=0
+while :; do
+  case $1 in
+  -d) decomp=1; shift;;
+  --h*) exec echo "$usage";;
+  --v*) exec echo "$version";;
+  --) shift; break;;
+  *) break;;
+  esac
+done
+
+if test $# -eq 0; then
+  echo >&2 "$0: missing operand
+Try \`$0 --help' for more information."
+  exit 1
+fi
+
+tmp=
+trap 'res=$?
+  test -n "$tmp" && rm -f "$tmp"
+  (exit $res); exit $res
+' 0 1 2 3 5 10 13 15
+
+mktemp_status=
+
+for i do
+  case $i in
+  -*) file=./$i;;
+  *)  file=$i;;
+  esac
+  if test ! -f "$file" || test ! -r "$file"; then
+    res=$?
+    echo >&2 "$0: $i is not a readable regular file"
+    continue
+  fi
+  if test $decomp -eq 0; then
+    if sed -e 1d -e 2q "$file" | grep "^skip=[0-9][0-9]*$" >/dev/null; then
+      echo >&2 "$0: $i is already gzexe'd"
+      continue
+    fi
+  fi
+  if test -u "$file"; then
+    echo >&2 "$0: $i has setuid permission, unchanged"
+    continue
+  fi
+  if test -g "$file"; then
+    echo >&2 "$0: $i has setgid permission, unchanged"
+    continue
+  fi
+  case /$file in
+  */basename | */bash | */cat | */chmod | */cp | \
+  */dirname | */echo | */expr | */gzip | \
+  */ln | */mkdir | */mktemp | */mv | */rm | \
+  */sed | */sh | */sleep | */test | */tail)
+    echo >&2 "$0: $i might depend on itself"; continue;;
+  esac
+
+  dir=`dirname "$file"` || dir=$TMPDIR
+  test -d "$dir" && test -w "$dir" && test -x "$dir" || dir=/tmp
+  test -n "$tmp" && rm -f "$tmp"
+  if test -z "$mktemp_status"; then
+    type mktemp >/dev/null 2>&1
+    mktemp_status=$?
+  fi
+  if test $mktemp_status -eq 0; then
+    tmp=`TMPDIR=$dir mktemp`
+  else
+    tmp=$dir/gzexe$$
+  fi && { cp -p "$file" "$tmp" 2>/dev/null || cp "$file" "$tmp"; } || {
+    res=$?
+    echo >&2 "$0: cannot copy $file"
+    continue
+  }
+  if test -w "$tmp"; then
+    writable=1
+  else
+    writable=0
+    chmod u+w "$tmp" || {
+      res=$?
+      echo >&2 "$0: cannot chmod $tmp"
+      continue
+    }
+  fi
+  if test $decomp -eq 0; then
+    (cat <<'EOF' &&
+#!/bin/sh
+skip=44
+
+tab='	'
+nl='
+'
+IFS=" $tab$nl"
+
+umask=`umask`
+umask 77
+
+gztmpdir=
+trap 'res=$?
+  test -n "$gztmpdir" && rm -fr "$gztmpdir"
+  (exit $res); exit $res
+' 0 1 2 3 5 10 13 15
+
+if type mktemp >/dev/null 2>&1; then
+  gztmpdir=`mktemp -d`
+else
+  gztmpdir=/tmp/gztmp$$; mkdir $gztmpdir
+fi || { (exit 127); exit 127; }
+
+gztmp=$gztmpdir/$0
+case $0 in
+-* | */*'
+') mkdir -p "$gztmp" && rm -r "$gztmp";;
+*/*) gztmp=$gztmpdir/`basename "$0"`;;
+esac || { (exit 127); exit 127; }
+
+case `echo X | tail -n +1 2>/dev/null` in
+X) tail_n=-n;;
+*) tail_n=;;
+esac
+if tail $tail_n +$skip <"$0" | gzip -cd > "$gztmp"; then
+  umask $umask
+  chmod 700 "$gztmp"
+  (sleep 5; rm -fr "$gztmpdir") 2>/dev/null &
+  "$gztmp" ${1+"$@"}; res=$?
+else
+  echo >&2 "Cannot decompress $0"
+  (exit 127); res=127
+fi; exit $res
+EOF
+    gzip -cv9 "$file") > "$tmp" || {
+      res=$?
+      echo >&2 "$0: compression not possible for $i, file unchanged."
+      continue
+    }
+
+  else
+    # decompression
+    skip=44
+    skip_line=`sed -e 1d -e 2q "$file"`
+    case $skip_line in
+    skip=[0-9] | skip=[0-9][0-9] | skip=[0-9][0-9][0-9])
+      eval "$skip_line";;
+    esac
+    case `echo X | tail -n +1 2>/dev/null` in
+    X) tail_n=-n;;
+    *) tail_n=;;
+    esac
+    tail $tail_n +$skip "$file" | gzip -cd > "$tmp" || {
+      res=$?
+      echo >&2 "$0: $i probably not in gzexe format, file unchanged."
+      continue
+    }
+  fi
+  test $writable -eq 1 || chmod u-w "$tmp" || {
+    res=$?
+    echo >&2 "$0: $tmp: cannot chmod"
+    continue
+  }
+  ln -f "$file" "$file~" || {
+    res=$?
+    echo >&2 "$0: cannot backup $i as $i~"
+    continue
+  }
+  mv -f "$tmp" "$file" || {
+    res=$?
+    echo >&2 "$0: cannot rename $tmp to $i"
+    continue
+  }
+  tmp=
+done
+(exit $res); exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzip.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzip.exe
new file mode 100644
index 00000000..a79375c9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/gzip.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2ph b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2ph
new file mode 100644
index 00000000..36c968ee
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2ph
@@ -0,0 +1,986 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+use strict;
+
+use Config;
+use File::Path qw(mkpath);
+use Getopt::Std;
+
+# Make sure read permissions for all are set:
+if (defined umask && (umask() & 0444)) {
+    umask (umask() & ~0444);
+}
+
+getopts('Dd:rlhaQe');
+use vars qw($opt_D $opt_d $opt_r $opt_l $opt_h $opt_a $opt_Q $opt_e);
+die "-r and -a options are mutually exclusive\n" if ($opt_r and $opt_a);
+my @inc_dirs = inc_dirs() if $opt_a;
+
+my $Exit = 0;
+
+my $Dest_dir = $opt_d || $Config{installsitearch};
+die "Destination directory $Dest_dir doesn't exist or isn't a directory\n"
+    unless -d $Dest_dir;
+
+my @isatype = qw(
+	char	uchar	u_char
+	short	ushort	u_short
+	int	uint	u_int
+	long	ulong	u_long
+	FILE	key_t	caddr_t
+	float	double	size_t
+);
+
+my %isatype;
+@isatype{@isatype} = (1) x @isatype;
+my $inif = 0;
+my %Is_converted;
+my %bad_file = ();
+
+@ARGV = ('-') unless @ARGV;
+
+build_preamble_if_necessary();
+
+sub reindent($) {
+    my($text) = shift;
+    $text =~ s/\n/\n    /g;
+    $text =~ s/        /\t/g;
+    $text;
+}
+
+my ($t, $tab, %curargs, $new, $eval_index, $dir, $name, $args, $outfile);
+my ($incl, $incl_type, $incl_quote, $next);
+while (defined (my $file = next_file())) {
+    if (-l $file and -d $file) {
+        link_if_possible($file) if ($opt_l);
+        next;
+    }
+
+    # Recover from header files with unbalanced cpp directives
+    $t = '';
+    $tab = 0;
+
+    # $eval_index goes into '#line' directives, to help locate syntax errors:
+    $eval_index = 1;
+
+    if ($file eq '-') {
+	open(IN, "-");
+	open(OUT, ">-");
+    } else {
+	($outfile = $file) =~ s/\.h$/.ph/ || next;
+	print "$file -> $outfile\n" unless $opt_Q;
+	if ($file =~ m|^(.*)/|) {
+	    $dir = $1;
+	    mkpath "$Dest_dir/$dir";
+	}
+
+	if ($opt_a) { # automagic mode:  locate header file in @inc_dirs
+	    foreach (@inc_dirs) {
+		chdir $_;
+		last if -f $file;
+	    }
+	}
+
+	open(IN,"$file") || (($Exit = 1),(warn "Can't open $file: $!\n"),next);
+	open(OUT,">$Dest_dir/$outfile") || die "Can't create $outfile: $!\n";
+    }
+
+    print OUT
+        "require '_h2ph_pre.ph';\n\n",
+        "no warnings qw(redefine misc);\n\n";
+
+    while (defined (local $_ = next_line($file))) {
+	if (s/^\s*\#\s*//) {
+	    if (s/^define\s+(\w+)//) {
+		$name = $1;
+		$new = '';
+		s/\s+$//;
+		s/\(\w+\s*\(\*\)\s*\(\w*\)\)\s*(-?\d+)/$1/; # (int (*)(foo_t))0
+		if (s/^\(([\w,\s]*)\)//) {
+		    $args = $1;
+		    my $proto = '() ';
+		    if ($args ne '') {
+			$proto = '';
+			foreach my $arg (split(/,\s*/,$args)) {
+			    $arg =~ s/^\s*([^\s].*[^\s])\s*$/$1/;
+			    $curargs{$arg} = 1;
+			}
+			$args =~ s/\b(\w)/\$$1/g;
+			$args = "my($args) = \@_;\n$t    ";
+		    }
+		    s/^\s+//;
+		    expr();
+		    $new =~ s/(["\\])/\\$1/g;       #"]);
+		    EMIT($proto);
+		} else {
+		    s/^\s+//;
+		    expr();
+
+		    $new = 1 if $new eq '';
+
+		    # Shunt around such directives as '#define FOO FOO':
+		    next if $new =~ /^\s*&\Q$name\E\s*\z/;
+
+		    $new = reindent($new);
+		    $args = reindent($args);
+		    $new =~ s/(['\\])/\\$1/g;        #']);
+
+	    	    print OUT $t, 'eval ';
+		    if ($opt_h) {
+			print OUT "\"\\n#line $eval_index $outfile\\n\" . ";
+			$eval_index++;
+		    }
+		    print OUT "'sub $name () {$new;}' unless defined(&$name);\n";
+		}
+	    } elsif (/^(include|import|include_next)\s*([<\"])(.*)[>\"]/) {
+                $incl_type = $1;
+                $incl_quote = $2;
+                $incl = $3;
+                if (($incl_type eq 'include_next') ||
+                    ($opt_e && exists($bad_file{$incl}))) {
+                    $incl =~ s/\.h$/.ph/;
+		print OUT ($t,
+			   "eval {\n");
+                $tab += 4;
+                $t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+                    print OUT ($t, "my(\@REM);\n");
+                    if ($incl_type eq 'include_next') {
+		print OUT ($t,
+			   "my(\%INCD) = map { \$INC{\$_} => 1 } ",
+			           "(grep { \$_ eq \"$incl\" } ",
+                                   "keys(\%INC));\n");
+		print OUT ($t,
+			           "\@REM = map { \"\$_/$incl\" } ",
+			   "(grep { not exists(\$INCD{\"\$_/$incl\"})",
+			           " and -f \"\$_/$incl\" } \@INC);\n");
+                    } else {
+                        print OUT ($t,
+                                   "\@REM = map { \"\$_/$incl\" } ",
+                                   "(grep {-r \"\$_/$incl\" } \@INC);\n");
+                    }
+		print OUT ($t,
+			   "require \"\$REM[0]\" if \@REM;\n");
+                $tab -= 4;
+                $t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+                print OUT ($t,
+			   "};\n");
+		print OUT ($t,
+			   "warn(\$\@) if \$\@;\n");
+                } else {
+                    $incl =~ s/\.h$/.ph/;
+                    # copy the prefix in the quote syntax (#include "x.h") case
+                    if ($incl !~ m|/| && $incl_quote eq q{"} && $file =~ m|^(.*)/|) {
+                        $incl = "$1/$incl";
+                    }
+		    print OUT $t,"require '$incl';\n";
+                }
+	    } elsif (/^ifdef\s+(\w+)/) {
+		print OUT $t,"if(defined(&$1)) {\n";
+		$tab += 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+	    } elsif (/^ifndef\s+(\w+)/) {
+		print OUT $t,"unless(defined(&$1)) {\n";
+		$tab += 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+	    } elsif (s/^if\s+//) {
+		$new = '';
+		$inif = 1;
+		expr();
+		$inif = 0;
+		print OUT $t,"if($new) {\n";
+		$tab += 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+	    } elsif (s/^elif\s+//) {
+		$new = '';
+		$inif = 1;
+		expr();
+		$inif = 0;
+		$tab -= 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+		print OUT $t,"}\n elsif($new) {\n";
+		$tab += 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+	    } elsif (/^else/) {
+		$tab -= 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+		print OUT $t,"} else {\n";
+		$tab += 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+	    } elsif (/^endif/) {
+		$tab -= 4;
+		$t = "\t" x ($tab / 8) . ' ' x ($tab % 8);
+		print OUT $t,"}\n";
+	    } elsif(/^undef\s+(\w+)/) {
+		print OUT $t, "undef(&$1) if defined(&$1);\n";
+	    } elsif(/^error\s+(".*")/) {
+		print OUT $t, "die($1);\n";
+	    } elsif(/^error\s+(.*)/) {
+		print OUT $t, "die(\"", quotemeta($1), "\");\n";
+	    } elsif(/^warning\s+(.*)/) {
+		print OUT $t, "warn(\"", quotemeta($1), "\");\n";
+	    } elsif(/^ident\s+(.*)/) {
+		print OUT $t, "# $1\n";
+	    }
+	} elsif (/^\s*(typedef\s*)?enum\s*(\s+[a-zA-Z_]\w*\s*)?/) { # { for vi
+	    until(/\{[^}]*\}.*;/ || /;/) {
+		last unless defined ($next = next_line($file));
+		chomp $next;
+		# drop "#define FOO FOO" in enums
+		$next =~ s/^\s*#\s*define\s+(\w+)\s+\1\s*$//;
+		# #defines in enums (aliases)
+		$next =~ s/^\s*#\s*define\s+(\w+)\s+(\w+)\s*$/$1 = $2,/;
+		$_ .= $next;
+		print OUT "# $next\n" if $opt_D;
+	    }
+	    s/#\s*if.*?#\s*endif//g; # drop #ifdefs
+	    s@/\*.*?\*/@@g;
+	    s/\s+/ /g;
+	    next unless /^\s?(typedef\s?)?enum\s?([a-zA-Z_]\w*)?\s?\{(.*)\}\s?([a-zA-Z_]\w*)?\s?;/;
+	    (my $enum_subs = $3) =~ s/\s//g;
+	    my @enum_subs = split(/,/, $enum_subs);
+	    my $enum_val = -1;
+	    foreach my $enum (@enum_subs) {
+		my ($enum_name, $enum_value) = $enum =~ /^([a-zA-Z_]\w*)(=.+)?$/;
+		$enum_name or next;
+		$enum_value =~ s/^=//;
+		$enum_val = (length($enum_value) ? $enum_value : $enum_val + 1);
+		if ($opt_h) {
+		    print OUT ($t,
+			       "eval(\"\\n#line $eval_index $outfile\\n",
+			       "sub $enum_name () \{ $enum_val; \}\") ",
+			       "unless defined(\&$enum_name);\n");
+		    ++ $eval_index;
+		} else {
+		    print OUT ($t,
+			       "eval(\"sub $enum_name () \{ $enum_val; \}\") ",
+			       "unless defined(\&$enum_name);\n");
+		}
+	    }
+	} elsif (/^(?:__extension__\s+)?(?:extern|static)\s+(?:__)?inline(?:__)?\s+/
+	    and !/;\s*$/ and !/{\s*}\s*$/)
+	{ # { for vi
+	    # This is a hack to parse the inline functions in the glibc headers.
+	    # Warning: massive kludge ahead. We suppose inline functions
+	    # are mainly constructed like macros.
+	    while (1) {
+		last unless defined ($next = next_line($file));
+		chomp $next;
+		undef $_, last if $next =~ /__THROW\s*;/
+			       or $next =~ /^(__extension__|extern|static)\b/;
+		$_ .= " $next";
+		print OUT "# $next\n" if $opt_D;
+		last if $next =~ /^}|^{.*}\s*$/;
+	    }
+	    next if not defined; # because it's only a prototype
+	    s/\b(__extension__|extern|static|(?:__)?inline(?:__)?)\b//g;
+	    # violently drop #ifdefs
+	    s/#\s*if.*?#\s*endif//g
+		and print OUT "# some #ifdef were dropped here -- fill in the blanks\n";
+	    if (s/^(?:\w|\s|\*)*\s(\w+)\s*//) {
+		$name = $1;
+	    } else {
+		warn "name not found"; next; # shouldn't occur...
+	    }
+	    my @args;
+	    if (s/^\(([^()]*)\)\s*(\w+\s*)*//) {
+		for my $arg (split /,/, $1) {
+		    if ($arg =~ /(\w+)\s*$/) {
+			$curargs{$1} = 1;
+			push @args, $1;
+		    }
+		}
+	    }
+	    $args = (
+		@args
+		? "my(" . (join ',', map "\$$_", @args) . ") = \@_;\n$t    "
+		: ""
+	    );
+	    my $proto = @args ? '' : '() ';
+	    $new = '';
+	    s/\breturn\b//g; # "return" doesn't occur in macros usually...
+	    expr();
+	    # try to find and perlify local C variables
+	    our @local_variables = (); # needs to be a our(): (?{...}) bug workaround
+	    {
+		use re "eval";
+		my $typelist = join '|', keys %isatype;
+		$new =~ s['
+		  (?:(?:__)?const(?:__)?\s+)?
+		  (?:(?:un)?signed\s+)?
+		  (?:long\s+)?
+		  (?:$typelist)\s+
+		  (\w+)
+		  (?{ push @local_variables, $1 })
+		  ']
+		 [my \$$1]gx;
+		$new =~ s['
+		  (?:(?:__)?const(?:__)?\s+)?
+		  (?:(?:un)?signed\s+)?
+		  (?:long\s+)?
+		  (?:$typelist)\s+
+		  ' \s+ &(\w+) \s* ;
+		  (?{ push @local_variables, $1 })
+		  ]
+		 [my \$$1;]gx;
+	     }
+	    $new =~ s/&$_\b/\$$_/g for @local_variables;
+	    $new =~ s/(["\\])/\\$1/g;       #"]);
+	    # now that's almost like a macro (we hope)
+	    EMIT($proto);
+	}
+    }
+    $Is_converted{$file} = 1;
+    if ($opt_e && exists($bad_file{$file})) {
+        unlink($Dest_dir . '/' . $outfile);
+        $next = '';
+    } else {
+        print OUT "1;\n";
+	queue_includes_from($file) if $opt_a;
+    }
+}
+
+if ($opt_e && (scalar(keys %bad_file) > 0)) {
+    warn "Was unable to convert the following files:\n";
+    warn "\t" . join("\n\t",sort(keys %bad_file)) . "\n";
+}
+
+exit $Exit;
+
+sub EMIT {
+    my $proto = shift;
+
+    $new = reindent($new);
+    $args = reindent($args);
+    if ($t ne '') {
+    $new =~ s/(['\\])/\\$1/g;   #']);
+    if ($opt_h) {
+        print OUT $t,
+                    "eval \"\\n#line $eval_index $outfile\\n\" . 'sub $name $proto\{\n$t    ${args}eval q($new);\n$t}' unless defined(\&$name);\n";
+                    $eval_index++;
+    } else {
+        print OUT $t,
+                    "eval 'sub $name $proto\{\n$t    ${args}eval q($new);\n$t}' unless defined(\&$name);\n";
+    }
+    } else {
+              print OUT "unless(defined(\&$name)) {\n    sub $name $proto\{\n\t${args}eval q($new);\n    }\n}\n";
+    }
+    %curargs = ();
+    return;
+}
+
+sub expr {
+    if (/\b__asm__\b/) {	# freak out
+	$new = '"(assembly code)"';
+	return
+    }
+    my $joined_args;
+    if(keys(%curargs)) {
+	$joined_args = join('|', keys(%curargs));
+    }
+    while ($_ ne '') {
+	s/^\&\&// && do { $new .= " &&"; next;}; # handle && operator
+	s/^\&([\(a-z\)]+)/$1/i;	# hack for things that take the address of
+	s/^(\s+)//		&& do {$new .= ' '; next;};
+	s/^0X([0-9A-F]+)[UL]*//i
+	    && do {my $hex = $1;
+		   $hex =~ s/^0+//;
+		   if (length $hex > 8 && !$Config{use64bitint}) {
+		       # Croak if nv_preserves_uv_bits < 64 ?
+		       $new .=         hex(substr($hex, -8)) +
+			       2**32 * hex(substr($hex,  0, -8));
+		       # The above will produce "erroneous" code
+		       # if the hex constant was e.g. inside UINT64_C
+		       # macro, but then again, h2ph is an approximation.
+		   } else {
+		       $new .= lc("0x$hex");
+		   }
+		   next;};
+	s/^(-?\d+\.\d+E[-+]?\d+)[FL]?//i	&& do {$new .= $1; next;};
+	s/^(\d+)\s*[LU]*//i	&& do {$new .= $1; next;};
+	s/^("(\\"|[^"])*")//	&& do {$new .= $1; next;};
+	s/^'((\\"|[^"])*)'//	&& do {
+	    if ($curargs{$1}) {
+		$new .= "ord('\$$1')";
+	    } else {
+		$new .= "ord('$1')";
+	    }
+	    next;
+	};
+        # replace "sizeof(foo)" with "{foo}"
+        # also, remove * (C dereference operator) to avoid perl syntax
+        # problems.  Where the %sizeof array comes from is anyone's
+        # guess (c2ph?), but this at least avoids fatal syntax errors.
+        # Behavior is undefined if sizeof() delimiters are unbalanced.
+        # This code was modified to able to handle constructs like this:
+        #   sizeof(*(p)), which appear in the HP-UX 10.01 header files.
+        s/^sizeof\s*\(// && do {
+            $new .= '$sizeof';
+            my $lvl = 1;  # already saw one open paren
+            # tack { on the front, and skip it in the loop
+            $_ = "{" . "$_";
+            my $index = 1;
+            # find balanced closing paren
+            while ($index <= length($_) && $lvl > 0) {
+                $lvl++ if substr($_, $index, 1) eq "(";
+                $lvl-- if substr($_, $index, 1) eq ")";
+                $index++;
+            }
+            # tack } on the end, replacing )
+            substr($_, $index - 1, 1) = "}";
+            # remove pesky * operators within the sizeof argument
+            substr($_, 0, $index - 1) =~ s/\*//g;
+            next;
+        };
+	# Eliminate typedefs
+	/\(([\w\s]+)[\*\s]*\)\s*[\w\(]/ && do {
+	    my $doit = 1;
+	    foreach (split /\s+/, $1) {  # Make sure all the words are types,
+	        unless($isatype{$_} or $_ eq 'struct' or $_ eq 'union'){
+		    $doit = 0;
+		    last;
+		}
+	    }
+	    if( $doit ){
+		s/\([\w\s]+[\*\s]*\)// && next;      # then eliminate them.
+	    }
+	};
+	# struct/union member, including arrays:
+	s/^([_A-Z]\w*(\[[^\]]+\])?((\.|->)[_A-Z]\w*(\[[^\]]+\])?)+)//i && do {
+	    my $id = $1;
+	    $id =~ s/(\.|(->))([^\.\-]*)/->\{$3\}/g;
+	    $id =~ s/\b([^\$])($joined_args)/$1\$$2/g if length($joined_args);
+	    while($id =~ /\[\s*([^\$\&\d\]]+)\]/) {
+		my($index) = $1;
+		$index =~ s/\s//g;
+		if(exists($curargs{$index})) {
+		    $index = "\$$index";
+		} else {
+		    $index = "&$index";
+		}
+		$id =~ s/\[\s*([^\$\&\d\]]+)\]/[$index]/;
+	    }
+	    $new .= " (\$$id)";
+	};
+	s/^([_a-zA-Z]\w*)//	&& do {
+	    my $id = $1;
+	    if ($id eq 'struct' || $id eq 'union') {
+		s/^\s+(\w+)//;
+		$id .= ' ' . $1;
+		$isatype{$id} = 1;
+	    } elsif ($id =~ /^((un)?signed)|(long)|(short)$/) {
+		while (s/^\s+(\w+)//) { $id .= ' ' . $1; }
+		$isatype{$id} = 1;
+	    }
+	    if ($curargs{$id}) {
+		$new .= "\$$id";
+		$new .= '->' if /^[\[\{]/;
+	    } elsif ($id eq 'defined') {
+		$new .= 'defined';
+	    } elsif (/^\s*\(/) {
+		s/^\s*\((\w),/("$1",/ if $id =~ /^_IO[WR]*$/i;	# cheat
+		$new .= " &$id";
+	    } elsif ($isatype{$id}) {
+		if ($new =~ /\{\s*$/) {
+		    $new .= "'$id'";
+		} elsif ($new =~ /\(\s*$/ && /^[\s*]*\)/) {
+		    $new =~ s/\(\s*$//;
+		    s/^[\s*]*\)//;
+		} else {
+		    $new .= q(').$id.q(');
+		}
+	    } else {
+		if ($inif) {
+		    if ($new =~ /defined\s*$/) {
+			$new .= '(&' . $id . ')';
+		    } elsif ($new =~ /defined\s*\($/) {
+			$new .= '&' . $id;
+		    } else {
+			$new .= '(defined(&' . $id . ') ? &' . $id . ' : undef)';
+		    }
+		} elsif (/^\[/) {
+		    $new .= " \$$id";
+		} else {
+		    $new .= ' &' . $id;
+		}
+	    }
+	    next;
+	};
+	s/^(.)// && do { if ($1 ne '#') { $new .= $1; } next;};
+    }
+}
+
+
+sub next_line
+{
+    my $file = shift;
+    my ($in, $out);
+    my $pre_sub_tri_graphs = 1;
+
+    READ: while (not eof IN) {
+        $in  .= <IN>;
+        chomp $in;
+        next unless length $in;
+
+        while (length $in) {
+            if ($pre_sub_tri_graphs) {
+                # Preprocess all tri-graphs
+                # including things stuck in quoted string constants.
+                $in =~ s/\?\?=/#/g;                         # | ??=|  #|
+                $in =~ s/\?\?\!/|/g;                        # | ??!|  ||
+                $in =~ s/\?\?'/^/g;                         # | ??'|  ^|
+                $in =~ s/\?\?\(/[/g;                        # | ??(|  [|
+                $in =~ s/\?\?\)/]/g;                        # | ??)|  ]|
+                $in =~ s/\?\?\-/~/g;                        # | ??-|  ~|
+                $in =~ s/\?\?\//\\/g;                       # | ??/|  \|
+                $in =~ s/\?\?</{/g;                         # | ??<|  {|
+                $in =~ s/\?\?>/}/g;                         # | ??>|  }|
+            }
+	    if ($in =~ /^\#ifdef __LANGUAGE_PASCAL__/) {
+		# Tru64 disassembler.h evilness: mixed C and Pascal.
+		while (<IN>) {
+		    last if /^\#endif/;
+		}
+		$in = "";
+		next READ;
+	    }
+	    if ($in =~ /^extern inline / && # Inlined assembler.
+		$^O eq 'linux' && $file =~ m!(?:^|/)asm/[^/]+\.h$!) {
+		while (<IN>) {
+		    last if /^}/;
+		}
+		$in = "";
+		next READ;
+	    }
+            if ($in =~ s/\\$//) {                           # \-newline
+                $out    .= ' ';
+                next READ;
+            } elsif ($in =~ s/^([^"'\\\/]+)//) {            # Passthrough
+                $out    .= $1;
+            } elsif ($in =~ s/^(\\.)//) {                   # \...
+                $out    .= $1;
+            } elsif ($in =~ /^'/) {                         # '...
+                if ($in =~ s/^('(\\.|[^'\\])*')//) {
+                    $out    .= $1;
+                } else {
+                    next READ;
+                }
+            } elsif ($in =~ /^"/) {                         # "...
+                if ($in =~ s/^("(\\.|[^"\\])*")//) {
+                    $out    .= $1;
+                } else {
+                    next READ;
+                }
+            } elsif ($in =~ s/^\/\/.*//) {                  # //...
+                # fall through
+            } elsif ($in =~ m/^\/\*/) {                     # /*...
+                # C comment removal adapted from perlfaq6:
+                if ($in =~ s/^\/\*[^*]*\*+([^\/*][^*]*\*+)*\///) {
+                    $out    .= ' ';
+                } else {                                    # Incomplete /* */
+                    next READ;
+                }
+            } elsif ($in =~ s/^(\/)//) {                    # /...
+                $out    .= $1;
+            } elsif ($in =~ s/^([^\'\"\\\/]+)//) {
+                $out    .= $1;
+            } elsif ($^O eq 'linux' &&
+                     $file =~ m!(?:^|/)linux/byteorder/pdp_endian\.h$! &&
+                     $in   =~ s!\'T KNOW!!) {
+                $out    =~ s!I DON$!I_DO_NOT_KNOW!;
+            } else {
+                if ($opt_e) {
+                    warn "Cannot parse $file:\n$in\n";
+                    $bad_file{$file} = 1;
+                    $in = '';
+                    $out = undef;
+                    last READ;
+                } else {
+		die "Cannot parse:\n$in\n";
+                }
+            }
+        }
+
+        last READ if $out =~ /\S/;
+    }
+
+    return $out;
+}
+
+
+# Handle recursive subdirectories without getting a grotesquely big stack.
+# Could this be implemented using File::Find?
+sub next_file
+{
+    my $file;
+
+    while (@ARGV) {
+        $file = shift @ARGV;
+
+        if ($file eq '-' or -f $file or -l $file) {
+            return $file;
+        } elsif (-d $file) {
+            if ($opt_r) {
+                expand_glob($file);
+            } else {
+                print STDERR "Skipping directory '$file'\n";
+            }
+        } elsif ($opt_a) {
+            return $file;
+        } else {
+            print STDERR "Skipping '$file':  not a file or directory\n";
+        }
+    }
+
+    return undef;
+}
+
+
+# Put all the files in $directory into @ARGV for processing.
+sub expand_glob
+{
+    my ($directory)  = @_;
+
+    $directory =~ s:/$::;
+
+    opendir DIR, $directory;
+        foreach (readdir DIR) {
+            next if ($_ eq '.' or $_ eq '..');
+
+            # expand_glob() is going to be called until $ARGV[0] isn't a
+            # directory; so push directories, and unshift everything else.
+            if (-d "$directory/$_") { push    @ARGV, "$directory/$_" }
+            else                    { unshift @ARGV, "$directory/$_" }
+        }
+    closedir DIR;
+}
+
+
+# Given $file, a symbolic link to a directory in the C include directory,
+# make an equivalent symbolic link in $Dest_dir, if we can figure out how.
+# Otherwise, just duplicate the file or directory.
+sub link_if_possible
+{
+    my ($dirlink)  = @_;
+    my $target  = eval 'readlink($dirlink)';
+
+    if ($target =~ m:^\.\./: or $target =~ m:^/:) {
+        # The target of a parent or absolute link could leave the $Dest_dir
+        # hierarchy, so let's put all of the contents of $dirlink (actually,
+        # the contents of $target) into @ARGV; as a side effect down the
+        # line, $dirlink will get created as an _actual_ directory.
+        expand_glob($dirlink);
+    } else {
+        if (-l "$Dest_dir/$dirlink") {
+            unlink "$Dest_dir/$dirlink" or
+                print STDERR "Could not remove link $Dest_dir/$dirlink:  $!\n";
+        }
+
+        if (eval 'symlink($target, "$Dest_dir/$dirlink")') {
+            print "Linking $target -> $Dest_dir/$dirlink\n";
+
+            # Make sure that the link _links_ to something:
+            if (! -e "$Dest_dir/$target") {
+                mkpath("$Dest_dir/$target", 0755) or
+                    print STDERR "Could not create $Dest_dir/$target/\n";
+            }
+        } else {
+            print STDERR "Could not symlink $target -> $Dest_dir/$dirlink:  $!\n";
+        }
+    }
+}
+
+
+# Push all #included files in $file onto our stack, except for STDIN
+# and files we've already processed.
+sub queue_includes_from
+{
+    my ($file)    = @_;
+    my $line;
+
+    return if ($file eq "-");
+
+    open HEADER, $file or return;
+        while (defined($line = <HEADER>)) {
+            while (/\\$/) { # Handle continuation lines
+                chop $line;
+                $line .= <HEADER>;
+            }
+
+            if ($line =~ /^#\s*include\s+([<"])(.*?)[>"]/) {
+                my ($delimiter, $new_file) = ($1, $2);
+                # copy the prefix in the quote syntax (#include "x.h") case
+                if ($delimiter eq q{"} && $file =~ m|^(.*)/|) {
+                    $new_file = "$1/$new_file";
+                }
+                push(@ARGV, $new_file) unless $Is_converted{$new_file};
+            }
+        }
+    close HEADER;
+}
+
+
+# Determine include directories; $Config{usrinc} should be enough for (all
+# non-GCC?) C compilers, but gcc uses additional include directories.
+sub inc_dirs
+{
+    my $from_gcc   = `LC_ALL=C $Config{cc} -v -E - < /dev/null 2>&1 | awk '/^#include/, /^End of search list/' | grep '^ '`;
+    length($from_gcc) ? (split(' ', $from_gcc), $Config{usrinc}) : ($Config{usrinc});
+}
+
+
+# Create "_h2ph_pre.ph", if it doesn't exist or was built by a different
+# version of h2ph.
+sub build_preamble_if_necessary
+{
+    # Increment $VERSION every time this function is modified:
+    my $VERSION     = 4;
+    my $preamble    = "$Dest_dir/_h2ph_pre.ph";
+
+    # Can we skip building the preamble file?
+    if (-r $preamble) {
+        # Extract version number from first line of preamble:
+        open  PREAMBLE, $preamble or die "Cannot open $preamble:  $!";
+            my $line = <PREAMBLE>;
+            $line =~ /(\b\d+\b)/;
+        close PREAMBLE            or die "Cannot close $preamble:  $!";
+
+        # Don't build preamble if a compatible preamble exists:
+        return if $1 == $VERSION;
+    }
+
+    my (%define) = _extract_cc_defines();
+
+    open  PREAMBLE, ">$preamble" or die "Cannot open $preamble:  $!";
+	print PREAMBLE "# This file was created by h2ph version $VERSION\n";
+        # Prevent non-portable hex constants from warning.
+        #
+        # We still produce an overflow warning if we can't represent
+        # a hex constant as an integer.
+        print PREAMBLE "no warnings qw(portable);\n";
+
+	foreach (sort keys %define) {
+	    if ($opt_D) {
+		print PREAMBLE "# $_=$define{$_}\n";
+	    }
+	    if ($define{$_} =~ /^\((.*)\)$/) {
+		# parenthesized value:  d=(v)
+		$define{$_} = $1;
+	    }
+	    if (/^(\w+)\((\w)\)$/) {
+		my($macro, $arg) = ($1, $2);
+		my $def = $define{$_};
+		$def =~ s/$arg/\$\{$arg\}/g;
+		print PREAMBLE <<DEFINE;
+unless (defined &$macro) { sub $macro(\$) { my (\$$arg) = \@_; \"$def\" } }
+
+DEFINE
+	    } elsif
+		($define{$_} =~ /^([+-]?(\d+)?\.\d+([eE][+-]?\d+)?)[FL]?$/) {
+		# float:
+		print PREAMBLE
+		    "unless (defined &$_) { sub $_() { $1 } }\n\n";
+	    } elsif ($define{$_} =~ /^([+-]?\d+)U?L{0,2}$/i) {
+		# integer:
+		print PREAMBLE
+		    "unless (defined &$_) { sub $_() { $1 } }\n\n";
+            } elsif ($define{$_} =~ /^([+-]?0x[\da-f]+)U?L{0,2}$/i) {
+                # hex integer
+                # Special cased, since perl warns on hex integers
+                # that can't be represented in a UV.
+                #
+                # This way we get the warning at time of use, so the user
+                # only gets the warning if they happen to use this
+                # platform-specific definition.
+                my $code = $1;
+                $code = "hex('$code')" if length $code > 10;
+                print PREAMBLE
+                    "unless (defined &$_) { sub $_() { $code } }\n\n";
+	    } elsif ($define{$_} =~ /^\w+$/) {
+		my $def = $define{$_};
+		if ($isatype{$def}) {
+		  print PREAMBLE
+		    "unless (defined &$_) { sub $_() { \"$def\" } }\n\n";
+		} else {
+		  print PREAMBLE
+		    "unless (defined &$_) { sub $_() { &$def } }\n\n";
+	        }
+	    } else {
+		print PREAMBLE
+		    "unless (defined &$_) { sub $_() { \"",
+		    quotemeta($define{$_}), "\" } }\n\n";
+	    }
+	}
+	print PREAMBLE "\n1;\n";  # avoid 'did not return a true value' when empty
+    close PREAMBLE               or die "Cannot close $preamble:  $!";
+}
+
+
+# %Config contains information on macros that are pre-defined by the
+# system's compiler.  We need this information to make the .ph files
+# function with perl as the .h files do with cc.
+sub _extract_cc_defines
+{
+    my %define;
+    my $allsymbols  = join " ",
+	@Config{'ccsymbols', 'cppsymbols', 'cppccsymbols'};
+
+    # Split compiler pre-definitions into 'key=value' pairs:
+    while ($allsymbols =~ /([^\s]+)=((\\\s|[^\s])+)/g) {
+	$define{$1} = $2;
+	if ($opt_D) {
+	    print STDERR "$_:  $1 -> $2\n";
+	}
+    }
+
+    return %define;
+}
+
+
+1;
+
+##############################################################################
+__END__
+
+=head1 NAME
+
+h2ph - convert .h C header files to .ph Perl header files
+
+=head1 SYNOPSIS
+
+B<h2ph [-d destination directory] [-r | -a] [-l] [-h] [-e] [-D] [-Q]
+[headerfiles]>
+
+=head1 DESCRIPTION
+
+I<h2ph>
+converts any C header files specified to the corresponding Perl header file
+format.
+It is most easily run while in /usr/include:
+
+	cd /usr/include; h2ph * sys/*
+
+or
+
+	cd /usr/include; h2ph * sys/* arpa/* netinet/*
+
+or
+
+	cd /usr/include; h2ph -r -l .
+
+The output files are placed in the hierarchy rooted at Perl's
+architecture dependent library directory.  You can specify a different
+hierarchy with a B<-d> switch.
+
+If run with no arguments, filters standard input to standard output.
+
+=head1 OPTIONS
+
+=over 4
+
+=item -d destination_dir
+
+Put the resulting B<.ph> files beneath B<destination_dir>, instead of
+beneath the default Perl library location (C<$Config{'installsitearch'}>).
+
+=item -r
+
+Run recursively; if any of B<headerfiles> are directories, then run I<h2ph>
+on all files in those directories (and their subdirectories, etc.).  B<-r>
+and B<-a> are mutually exclusive.
+
+=item -a
+
+Run automagically; convert B<headerfiles>, as well as any B<.h> files
+which they include.  This option will search for B<.h> files in all
+directories which your C compiler ordinarily uses.  B<-a> and B<-r> are
+mutually exclusive.
+
+=item -l
+
+Symbolic links will be replicated in the destination directory.  If B<-l>
+is not specified, then links are skipped over.
+
+=item -h
+
+Put 'hints' in the .ph files which will help in locating problems with
+I<h2ph>.  In those cases when you B<require> a B<.ph> file containing syntax
+errors, instead of the cryptic
+
+	[ some error condition ] at (eval mmm) line nnn
+
+you will see the slightly more helpful
+
+	[ some error condition ] at filename.ph line nnn
+
+However, the B<.ph> files almost double in size when built using B<-h>.
+
+=item -e
+
+If an error is encountered during conversion, output file will be removed and
+a warning emitted instead of terminating the conversion immediately.
+
+=item -D
+
+Include the code from the B<.h> file as a comment in the B<.ph> file.
+This is primarily used for debugging I<h2ph>.
+
+=item -Q
+
+'Quiet' mode; don't print out the names of the files being converted.
+
+=back
+
+=head1 ENVIRONMENT
+
+No environment variables are used.
+
+=head1 FILES
+
+ /usr/include/*.h
+ /usr/include/sys/*.h
+
+etc.
+
+=head1 AUTHOR
+
+Larry Wall
+
+=head1 SEE ALSO
+
+perl(1)
+
+=head1 DIAGNOSTICS
+
+The usual warnings if it can't read or write the files involved.
+
+=head1 BUGS
+
+Doesn't construct the %sizeof array for you.
+
+It doesn't handle all C constructs, but it does attempt to isolate
+definitions inside evals so that you can get at the definitions
+that it can translate.
+
+It's only intended as a rough tool.
+You may need to dicker with the files produced.
+
+You have to run this program by hand; it's not run as part of the Perl
+installation.
+
+Doesn't handle complicated expressions built piecemeal, a la:
+
+    enum {
+	FIRST_VALUE,
+	SECOND_VALUE,
+    #ifdef ABC
+	THIRD_VALUE
+    #endif
+    };
+
+Doesn't necessarily locate all of your C compiler's internally-defined
+symbols.
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2xs b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2xs
new file mode 100644
index 00000000..f0516e1d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/h2xs
@@ -0,0 +1,2205 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+use warnings;
+
+=head1 NAME
+
+h2xs - convert .h C header files to Perl extensions
+
+=head1 SYNOPSIS
+
+B<h2xs> [B<OPTIONS> ...] [headerfile ... [extra_libraries]]
+
+B<h2xs> B<-h>|B<-?>|B<--help>
+
+=head1 DESCRIPTION
+
+I<h2xs> builds a Perl extension from C header files.  The extension
+will include functions which can be used to retrieve the value of any
+#define statement which was in the C header files.
+
+The I<module_name> will be used for the name of the extension.  If
+module_name is not supplied then the name of the first header file
+will be used, with the first character capitalized.
+
+If the extension might need extra libraries, they should be included
+here.  The extension Makefile.PL will take care of checking whether
+the libraries actually exist and how they should be loaded.  The extra
+libraries should be specified in the form -lm -lposix, etc, just as on
+the cc command line.  By default, the Makefile.PL will search through
+the library path determined by Configure.  That path can be augmented
+by including arguments of the form B<-L/another/library/path> in the
+extra-libraries argument.
+
+In spite of its name, I<h2xs> may also be used to create a skeleton pure
+Perl module. See the B<-X> option.
+
+=head1 OPTIONS
+
+=over 5
+
+=item B<-A>, B<--omit-autoload>
+
+Omit all autoload facilities.  This is the same as B<-c> but also
+removes the S<C<use AutoLoader>> statement from the .pm file.
+
+=item B<-B>, B<--beta-version>
+
+Use an alpha/beta style version number.  Causes version number to
+be "0.00_01" unless B<-v> is specified.
+
+=item B<-C>, B<--omit-changes>
+
+Omits creation of the F<Changes> file, and adds a HISTORY section to
+the POD template.
+
+=item B<-F>, B<--cpp-flags>=I<addflags>
+
+Additional flags to specify to C preprocessor when scanning header for
+function declarations.  Writes these options in the generated F<Makefile.PL>
+too.
+
+=item B<-M>, B<--func-mask>=I<regular expression>
+
+selects functions/macros to process.
+
+=item B<-O>, B<--overwrite-ok>
+
+Allows a pre-existing extension directory to be overwritten.
+
+=item B<-P>, B<--omit-pod>
+
+Omit the autogenerated stub POD section.
+
+=item B<-X>, B<--omit-XS>
+
+Omit the XS portion. Used to generate a skeleton pure Perl module.
+C<-c> and C<-f> are implicitly enabled.
+
+=item B<-a>, B<--gen-accessors>
+
+Generate an accessor method for each element of structs and unions. The
+generated methods are named after the element name; will return the current
+value of the element if called without additional arguments; and will set
+the element to the supplied value (and return the new value) if called with
+an additional argument. Embedded structures and unions are returned as a
+pointer rather than the complete structure, to facilitate chained calls.
+
+These methods all apply to the Ptr type for the structure; additionally
+two methods are constructed for the structure type itself, C<_to_ptr>
+which returns a Ptr type pointing to the same structure, and a C<new>
+method to construct and return a new structure, initialised to zeroes.
+
+=item B<-b>, B<--compat-version>=I<version>
+
+Generates a .pm file which is backwards compatible with the specified
+perl version.
+
+For versions < 5.6.0, the changes are.
+    - no use of 'our' (uses 'use vars' instead)
+    - no 'use warnings'
+
+Specifying a compatibility version higher than the version of perl you
+are using to run h2xs will have no effect.  If unspecified h2xs will default
+to compatibility with the version of perl you are using to run h2xs.
+
+=item B<-c>, B<--omit-constant>
+
+Omit C<constant()> from the .xs file and corresponding specialised
+C<AUTOLOAD> from the .pm file.
+
+=item B<-d>, B<--debugging>
+
+Turn on debugging messages.
+
+=item B<-e>, B<--omit-enums>=[I<regular expression>]
+
+If I<regular expression> is not given, skip all constants that are defined in
+a C enumeration. Otherwise skip only those constants that are defined in an
+enum whose name matches I<regular expression>.
+
+Since I<regular expression> is optional, make sure that this switch is followed
+by at least one other switch if you omit I<regular expression> and have some
+pending arguments such as header-file names. This is ok:
+
+    h2xs -e -n Module::Foo foo.h
+
+This is not ok:
+
+    h2xs -n Module::Foo -e foo.h
+
+In the latter, foo.h is taken as I<regular expression>.
+
+=item B<-f>, B<--force>
+
+Allows an extension to be created for a header even if that header is
+not found in standard include directories.
+
+=item B<-g>, B<--global>
+
+Include code for safely storing static data in the .xs file.
+Extensions that do no make use of static data can ignore this option.
+
+=item B<-h>, B<-?>, B<--help>
+
+Print the usage, help and version for this h2xs and exit.
+
+=item B<-k>, B<--omit-const-func>
+
+For function arguments declared as C<const>, omit the const attribute in the
+generated XS code.
+
+=item B<-m>, B<--gen-tied-var>
+
+B<Experimental>: for each variable declared in the header file(s), declare
+a perl variable of the same name magically tied to the C variable.
+
+=item B<-n>, B<--name>=I<module_name>
+
+Specifies a name to be used for the extension, e.g., S<-n RPC::DCE>
+
+=item B<-o>, B<--opaque-re>=I<regular expression>
+
+Use "opaque" data type for the C types matched by the regular
+expression, even if these types are C<typedef>-equivalent to types
+from typemaps.  Should not be used without B<-x>.
+
+This may be useful since, say, types which are C<typedef>-equivalent
+to integers may represent OS-related handles, and one may want to work
+with these handles in OO-way, as in C<$handle-E<gt>do_something()>.
+Use C<-o .> if you want to handle all the C<typedef>ed types as opaque
+types.
+
+The type-to-match is whitewashed (except for commas, which have no
+whitespace before them, and multiple C<*> which have no whitespace
+between them).
+
+=item B<-p>, B<--remove-prefix>=I<prefix>
+
+Specify a prefix which should be removed from the Perl function names,
+e.g., S<-p sec_rgy_> This sets up the XS B<PREFIX> keyword and removes
+the prefix from functions that are autoloaded via the C<constant()>
+mechanism.
+
+=item B<-s>, B<--const-subs>=I<sub1,sub2>
+
+Create a perl subroutine for the specified macros rather than autoload
+with the constant() subroutine.  These macros are assumed to have a
+return type of B<char *>, e.g.,
+S<-s sec_rgy_wildcard_name,sec_rgy_wildcard_sid>.
+
+=item B<-t>, B<--default-type>=I<type>
+
+Specify the internal type that the constant() mechanism uses for macros.
+The default is IV (signed integer).  Currently all macros found during the
+header scanning process will be assumed to have this type.  Future versions
+of C<h2xs> may gain the ability to make educated guesses.
+
+=item B<--use-new-tests>
+
+When B<--compat-version> (B<-b>) is present the generated tests will use
+C<Test::More> rather than C<Test> which is the default for versions before
+5.6.2.  C<Test::More> will be added to PREREQ_PM in the generated
+C<Makefile.PL>.
+
+=item B<--use-old-tests>
+
+Will force the generation of test code that uses the older C<Test> module.
+
+=item B<--skip-exporter>
+
+Do not use C<Exporter> and/or export any symbol.
+
+=item B<--skip-ppport>
+
+Do not use C<Devel::PPPort>: no portability to older version.
+
+=item B<--skip-autoloader>
+
+Do not use the module C<AutoLoader>; but keep the constant() function
+and C<sub AUTOLOAD> for constants.
+
+=item B<--skip-strict>
+
+Do not use the pragma C<strict>.
+
+=item B<--skip-warnings>
+
+Do not use the pragma C<warnings>.
+
+=item B<-v>, B<--version>=I<version>
+
+Specify a version number for this extension.  This version number is added
+to the templates.  The default is 0.01, or 0.00_01 if C<-B> is specified.
+The version specified should be numeric.
+
+=item B<-x>, B<--autogen-xsubs>
+
+Automatically generate XSUBs basing on function declarations in the
+header file.  The package C<C::Scan> should be installed. If this
+option is specified, the name of the header file may look like
+C<NAME1,NAME2>. In this case NAME1 is used instead of the specified
+string, but XSUBs are emitted only for the declarations included from
+file NAME2.
+
+Note that some types of arguments/return-values for functions may
+result in XSUB-declarations/typemap-entries which need
+hand-editing. Such may be objects which cannot be converted from/to a
+pointer (like C<long long>), pointers to functions, or arrays.  See
+also the section on L<LIMITATIONS of B<-x>>.
+
+=back
+
+=head1 EXAMPLES
+
+
+    # Default behavior, extension is Rusers
+    h2xs rpcsvc/rusers
+
+    # Same, but extension is RUSERS
+    h2xs -n RUSERS rpcsvc/rusers
+
+    # Extension is rpcsvc::rusers. Still finds <rpcsvc/rusers.h>
+    h2xs rpcsvc::rusers
+
+    # Extension is ONC::RPC.  Still finds <rpcsvc/rusers.h>
+    h2xs -n ONC::RPC rpcsvc/rusers
+
+    # Without constant() or AUTOLOAD
+    h2xs -c rpcsvc/rusers
+
+    # Creates templates for an extension named RPC
+    h2xs -cfn RPC
+
+    # Extension is ONC::RPC.
+    h2xs -cfn ONC::RPC
+
+    # Extension is a pure Perl module with no XS code.
+    h2xs -X My::Module
+
+    # Extension is Lib::Foo which works at least with Perl5.005_03.
+    # Constants are created for all #defines and enums h2xs can find
+    # in foo.h.
+    h2xs -b 5.5.3 -n Lib::Foo foo.h
+
+    # Extension is Lib::Foo which works at least with Perl5.005_03.
+    # Constants are created for all #defines but only for enums
+    # whose names do not start with 'bar_'.
+    h2xs -b 5.5.3 -e '^bar_' -n Lib::Foo foo.h
+
+    # Makefile.PL will look for library -lrpc in
+    # additional directory /opt/net/lib
+    h2xs rpcsvc/rusers -L/opt/net/lib -lrpc
+
+    # Extension is DCE::rgynbase
+    # prefix "sec_rgy_" is dropped from perl function names
+    h2xs -n DCE::rgynbase -p sec_rgy_ dce/rgynbase
+
+    # Extension is DCE::rgynbase
+    # prefix "sec_rgy_" is dropped from perl function names
+    # subroutines are created for sec_rgy_wildcard_name and
+    # sec_rgy_wildcard_sid
+    h2xs -n DCE::rgynbase -p sec_rgy_ \
+    -s sec_rgy_wildcard_name,sec_rgy_wildcard_sid dce/rgynbase
+
+    # Make XS without defines in perl.h, but with function declarations
+    # visible from perl.h. Name of the extension is perl1.
+    # When scanning perl.h, define -DEXT=extern -DdEXT= -DINIT(x)=
+    # Extra backslashes below because the string is passed to shell.
+    # Note that a directory with perl header files would
+    #  be added automatically to include path.
+    h2xs -xAn perl1 -F "-DEXT=extern -DdEXT= -DINIT\(x\)=" perl.h
+
+    # Same with function declaration in proto.h as visible from perl.h.
+    h2xs -xAn perl2 perl.h,proto.h
+
+    # Same but select only functions which match /^av_/
+    h2xs -M '^av_' -xAn perl2 perl.h,proto.h
+
+    # Same but treat SV* etc as "opaque" types
+    h2xs -o '^[S]V \*$' -M '^av_' -xAn perl2 perl.h,proto.h
+
+=head2 Extension based on F<.h> and F<.c> files
+
+Suppose that you have some C files implementing some functionality,
+and the corresponding header files.  How to create an extension which
+makes this functionality accessible in Perl?  The example below
+assumes that the header files are F<interface_simple.h> and
+I<interface_hairy.h>, and you want the perl module be named as
+C<Ext::Ension>.  If you need some preprocessor directives and/or
+linking with external libraries, see the flags C<-F>, C<-L> and C<-l>
+in L<"OPTIONS">.
+
+=over
+
+=item Find the directory name
+
+Start with a dummy run of h2xs:
+
+  h2xs -Afn Ext::Ension
+
+The only purpose of this step is to create the needed directories, and
+let you know the names of these directories.  From the output you can
+see that the directory for the extension is F<Ext/Ension>.
+
+=item Copy C files
+
+Copy your header files and C files to this directory F<Ext/Ension>.
+
+=item Create the extension
+
+Run h2xs, overwriting older autogenerated files:
+
+  h2xs -Oxan Ext::Ension interface_simple.h interface_hairy.h
+
+h2xs looks for header files I<after> changing to the extension
+directory, so it will find your header files OK.
+
+=item Archive and test
+
+As usual, run
+
+  cd Ext/Ension
+  perl Makefile.PL
+  make dist
+  make
+  make test
+
+=item Hints
+
+It is important to do C<make dist> as early as possible.  This way you
+can easily merge(1) your changes to autogenerated files if you decide
+to edit your C<.h> files and rerun h2xs.
+
+Do not forget to edit the documentation in the generated F<.pm> file.
+
+Consider the autogenerated files as skeletons only, you may invent
+better interfaces than what h2xs could guess.
+
+Consider this section as a guideline only, some other options of h2xs
+may better suit your needs.
+
+=back
+
+=head1 ENVIRONMENT
+
+No environment variables are used.
+
+=head1 AUTHOR
+
+Larry Wall and others
+
+=head1 SEE ALSO
+
+L<perl>, L<perlxstut>, L<ExtUtils::MakeMaker>, and L<AutoLoader>.
+
+=head1 DIAGNOSTICS
+
+The usual warnings if it cannot read or write the files involved.
+
+=head1 LIMITATIONS of B<-x>
+
+F<h2xs> would not distinguish whether an argument to a C function
+which is of the form, say, C<int *>, is an input, output, or
+input/output parameter.  In particular, argument declarations of the
+form
+
+    int
+    foo(n)
+	int *n
+
+should be better rewritten as
+
+    int
+    foo(n)
+	int &n
+
+if C<n> is an input parameter.
+
+Additionally, F<h2xs> has no facilities to intuit that a function
+
+   int
+   foo(addr,l)
+	char *addr
+	int   l
+
+takes a pair of address and length of data at this address, so it is better
+to rewrite this function as
+
+    int
+    foo(sv)
+	    SV *addr
+	PREINIT:
+	    STRLEN len;
+	    char *s;
+	CODE:
+	    s = SvPV(sv,len);
+	    RETVAL = foo(s, len);
+	OUTPUT:
+	    RETVAL
+
+or alternately
+
+    static int
+    my_foo(SV *sv)
+    {
+	STRLEN len;
+	char *s = SvPV(sv,len);
+
+	return foo(s, len);
+    }
+
+    MODULE = foo	PACKAGE = foo	PREFIX = my_
+
+    int
+    foo(sv)
+	SV *sv
+
+See L<perlxs> and L<perlxstut> for additional details.
+
+=cut
+
+# ' # Grr
+use strict;
+
+
+my( $H2XS_VERSION ) = ' $Revision: 1.23 $ ' =~ /\$Revision:\s+([^\s]+)/;
+my $TEMPLATE_VERSION = '0.01';
+my @ARGS = @ARGV;
+my $compat_version = $];
+
+use Getopt::Long;
+use Config;
+use Text::Wrap;
+$Text::Wrap::huge = 'overflow';
+$Text::Wrap::columns = 80;
+use ExtUtils::Constant qw (WriteConstants WriteMakefileSnippet autoload);
+use File::Compare;
+use File::Path;
+
+sub usage {
+    warn "@_\n" if @_;
+    die <<EOFUSAGE;
+h2xs [OPTIONS ... ] [headerfile [extra_libraries]]
+version: $H2XS_VERSION
+OPTIONS:
+    -A, --omit-autoload   Omit all autoloading facilities (implies -c).
+    -B, --beta-version    Use beta \$VERSION of 0.00_01 (ignored if -v).
+    -C, --omit-changes    Omit creating the Changes file, add HISTORY heading
+                          to stub POD.
+    -F, --cpp-flags       Additional flags for C preprocessor/compile.
+    -M, --func-mask       Mask to select C functions/macros
+                          (default is select all).
+    -O, --overwrite-ok    Allow overwriting of a pre-existing extension directory.
+    -P, --omit-pod        Omit the stub POD section.
+    -X, --omit-XS         Omit the XS portion (implies both -c and -f).
+    -a, --gen-accessors   Generate get/set accessors for struct and union members
+                          (used with -x).
+    -b, --compat-version  Specify a perl version to be backwards compatible with.
+    -c, --omit-constant   Omit the constant() function and specialised AUTOLOAD
+                          from the XS file.
+    -d, --debugging       Turn on debugging messages.
+    -e, --omit-enums      Omit constants from enums in the constant() function.
+                          If a pattern is given, only the matching enums are
+                          ignored.
+    -f, --force           Force creation of the extension even if the C header
+                          does not exist.
+    -g, --global          Include code for safely storing static data in the .xs file.
+    -h, -?, --help        Display this help message.
+    -k, --omit-const-func Omit 'const' attribute on function arguments
+                          (used with -x).
+    -m, --gen-tied-var    Generate tied variables for access to declared
+                          variables.
+    -n, --name            Specify a name to use for the extension (recommended).
+    -o, --opaque-re       Regular expression for \"opaque\" types.
+    -p, --remove-prefix   Specify a prefix which should be removed from the
+                          Perl function names.
+    -s, --const-subs      Create subroutines for specified macros.
+    -t, --default-type    Default type for autoloaded constants (default is IV).
+        --use-new-tests   Use Test::More in backward compatible modules.
+        --use-old-tests   Use the module Test rather than Test::More.
+        --skip-exporter   Do not export symbols.
+        --skip-ppport     Do not use portability layer.
+        --skip-autoloader Do not use the module C<AutoLoader>.
+        --skip-strict     Do not use the pragma C<strict>.
+        --skip-warnings   Do not use the pragma C<warnings>.
+    -v, --version         Specify a version number for this extension.
+    -x, --autogen-xsubs   Autogenerate XSUBs using C::Scan.
+        --use-xsloader    Use XSLoader in backward compatible modules (ignored
+                          when used with -X).
+
+extra_libraries
+         are any libraries that might be needed for loading the
+         extension, e.g. -lm would try to link in the math library.
+EOFUSAGE
+}
+
+my ($opt_A,
+    $opt_B,
+    $opt_C,
+    $opt_F,
+    $opt_M,
+    $opt_O,
+    $opt_P,
+    $opt_X,
+    $opt_a,
+    $opt_c,
+    $opt_d,
+    $opt_e,
+    $opt_f,
+    $opt_g,
+    $opt_h,
+    $opt_k,
+    $opt_m,
+    $opt_n,
+    $opt_o,
+    $opt_p,
+    $opt_s,
+    $opt_v,
+    $opt_x,
+    $opt_b,
+    $opt_t,
+    $new_test,
+    $old_test,
+    $skip_exporter,
+    $skip_ppport,
+    $skip_autoloader,
+    $skip_strict,
+    $skip_warnings,
+    $use_xsloader
+   );
+
+Getopt::Long::Configure('bundling');
+Getopt::Long::Configure('pass_through');
+
+my %options = (
+                'omit-autoload|A'    => \$opt_A,
+                'beta-version|B'     => \$opt_B,
+                'omit-changes|C'     => \$opt_C,
+                'cpp-flags|F=s'      => \$opt_F,
+                'func-mask|M=s'      => \$opt_M,
+                'overwrite_ok|O'     => \$opt_O,
+                'omit-pod|P'         => \$opt_P,
+                'omit-XS|X'          => \$opt_X,
+                'gen-accessors|a'    => \$opt_a,
+                'compat-version|b=s' => \$opt_b,
+                'omit-constant|c'    => \$opt_c,
+                'debugging|d'        => \$opt_d,
+                'omit-enums|e:s'     => \$opt_e,
+                'force|f'            => \$opt_f,
+                'global|g'           => \$opt_g,
+                'help|h|?'           => \$opt_h,
+                'omit-const-func|k'  => \$opt_k,
+                'gen-tied-var|m'     => \$opt_m,
+                'name|n=s'           => \$opt_n,
+                'opaque-re|o=s'      => \$opt_o,
+                'remove-prefix|p=s'  => \$opt_p,
+                'const-subs|s=s'     => \$opt_s,
+                'default-type|t=s'   => \$opt_t,
+                'version|v=s'        => \$opt_v,
+                'autogen-xsubs|x'    => \$opt_x,
+                'use-new-tests'      => \$new_test,
+                'use-old-tests'      => \$old_test,
+                'skip-exporter'      => \$skip_exporter,
+                'skip-ppport'        => \$skip_ppport,
+                'skip-autoloader'    => \$skip_autoloader,
+                'skip-warnings'      => \$skip_warnings,
+                'skip-strict'        => \$skip_strict,
+                'use-xsloader'       => \$use_xsloader,
+              );
+
+GetOptions(%options) || usage;
+
+usage if $opt_h;
+
+if( $opt_b ){
+    usage "You cannot use -b and -m at the same time.\n" if ($opt_b && $opt_m);
+    $opt_b =~ /^v?(\d+)\.(\d+)\.(\d+)/ ||
+    usage "You must provide the backwards compatibility version in X.Y.Z form. "
+          .  "(i.e. 5.5.0)\n";
+    my ($maj,$min,$sub) = ($1,$2,$3);
+    if ($maj < 5 || ($maj == 5 && $min < 6)) {
+        $compat_version =
+	    $sub ? sprintf("%d.%03d%02d",$maj,$min,$sub) :
+	           sprintf("%d.%03d",    $maj,$min);
+    } else {
+        $compat_version = sprintf("%d.%03d%03d",$maj,$min,$sub);
+    }
+} else {
+    my ($maj,$min,$sub) = $compat_version =~ /(\d+)\.(\d\d\d)(\d*)/;
+    $sub ||= 0;
+    warn sprintf <<'EOF', $maj,$min,$sub;
+Defaulting to backwards compatibility with perl %d.%d.%d
+If you intend this module to be compatible with earlier perl versions, please
+specify a minimum perl version with the -b option.
+
+EOF
+}
+
+if( $opt_B ){
+    $TEMPLATE_VERSION = '0.00_01';
+}
+
+if( $opt_v ){
+	$TEMPLATE_VERSION = $opt_v;
+
+    # check if it is numeric
+    my $temp_version = $TEMPLATE_VERSION;
+    my $beta_version = $temp_version =~ s/(\d)_(\d\d)/$1$2/;
+    my $notnum;
+    {
+        local $SIG{__WARN__} = sub { $notnum = 1 };
+        use warnings 'numeric';
+        $temp_version = 0+$temp_version;
+    }
+
+    if ($notnum) {
+        my $module = $opt_n || 'Your::Module';
+        warn <<"EOF";
+You have specified a non-numeric version.  Unless you supply an
+appropriate VERSION class method, users may not be able to specify a
+minimum required version with C<use $module versionnum>.
+
+EOF
+    }
+    else {
+        $opt_B = $beta_version;
+    }
+}
+
+# -A implies -c.
+$skip_autoloader = $opt_c = 1 if $opt_A;
+
+# -X implies -c and -f
+$opt_c = $opt_f = 1 if $opt_X;
+
+$opt_t ||= 'IV';
+
+my %const_xsub;
+%const_xsub = map { $_,1 } split(/,+/, $opt_s) if $opt_s;
+
+my $extralibs = '';
+
+my @path_h;
+
+while (my $arg = shift) {
+    if ($arg =~ /^-l/i) {
+        $extralibs .= "$arg ";
+        next;
+    }
+    last if $extralibs;
+    push(@path_h, $arg);
+}
+
+usage "Must supply header file or module name\n"
+        unless (@path_h or $opt_n);
+
+my $fmask;
+my $tmask;
+
+$fmask = qr{$opt_M} if defined $opt_M;
+$tmask = qr{$opt_o} if defined $opt_o;
+my $tmask_all = $tmask && $opt_o eq '.';
+
+if ($opt_x) {
+  eval {require C::Scan; 1}
+    or die <<EOD;
+C::Scan required if you use -x option.
+To install C::Scan, execute
+   perl -MCPAN -e "install C::Scan"
+EOD
+  unless ($tmask_all) {
+    $C::Scan::VERSION >= 0.70
+      or die <<EOD;
+C::Scan v. 0.70 or later required unless you use -o . option.
+You have version $C::Scan::VERSION installed as $INC{'C/Scan.pm'}.
+To install C::Scan, execute
+   perl -MCPAN -e "install C::Scan"
+EOD
+  }
+  if (($opt_m || $opt_a) && $C::Scan::VERSION < 0.73) {
+    die <<EOD;
+C::Scan v. 0.73 or later required to use -m or -a options.
+You have version $C::Scan::VERSION installed as $INC{'C/Scan.pm'}.
+To install C::Scan, execute
+   perl -MCPAN -e "install C::Scan"
+EOD
+  }
+}
+elsif ($opt_o or $opt_F) {
+  warn <<EOD if $opt_o;
+Option -o does not make sense without -x.
+EOD
+  warn <<EOD if $opt_F and $opt_X ;
+Option -F does not make sense with -X.
+EOD
+}
+
+my @path_h_ini = @path_h;
+my ($name, %fullpath, %prefix, %seen_define, %prefixless, %const_names);
+
+my $module = $opt_n;
+
+if( @path_h ){
+    use File::Spec;
+    my @paths;
+    my $pre_sub_tri_graphs = 1;
+    if ($^O eq 'VMS') {  # Consider overrides of default location
+      # XXXX This is not equivalent to what the older version did:
+      #		it was looking at $hadsys header-file per header-file...
+      my($hadsys) = grep s!^sys/!!i , @path_h;
+      @paths = qw( Sys$Library VAXC$Include );
+      push @paths, ($hadsys ? 'GNU_CC_Include[vms]' : 'GNU_CC_Include[000000]');
+      push @paths, qw( DECC$Library_Include DECC$System_Include );
+    }
+    else {
+      @paths = (File::Spec->curdir(), $Config{usrinc},
+		(split / +/, $Config{locincpth} // ""), '/usr/include');
+    }
+    foreach my $path_h (@path_h) {
+        $name ||= $path_h;
+    $module ||= do {
+      $name =~ s/\.h$//;
+      if ( $name !~ /::/ ) {
+	$name =~ s#^.*/##;
+	$name = "\u$name";
+      }
+      $name;
+    };
+
+    if( $path_h =~ s#::#/#g && $opt_n ){
+	warn "Nesting of headerfile ignored with -n\n";
+    }
+    $path_h .= ".h" unless $path_h =~ /\.h$/;
+    my $fullpath = $path_h;
+    $path_h =~ s/,.*$// if $opt_x;
+    $fullpath{$path_h} = $fullpath;
+
+    # Minor trickery: we can't chdir() before we processed the headers
+    # (so know the name of the extension), but the header may be in the
+    # extension directory...
+    my $tmp_path_h = $path_h;
+    my $rel_path_h = $path_h;
+    my @dirs = @paths;
+    if (not -f $path_h) {
+      my $found;
+      for my $dir (@paths) {
+	$found++, last
+	  if -f ($path_h = File::Spec->catfile($dir, $tmp_path_h));
+      }
+      if ($found) {
+	$rel_path_h = $path_h;
+	$fullpath{$path_h} = $fullpath;
+      } else {
+	(my $epath = $module) =~ s,::,/,g;
+	$epath = File::Spec->catdir('ext', $epath) if -d 'ext';
+	$rel_path_h = File::Spec->catfile($epath, $tmp_path_h);
+	$path_h = $tmp_path_h;	# Used during -x
+	push @dirs, $epath;
+      }
+    }
+
+    if (!$opt_c) {
+      die "Can't find $tmp_path_h in @dirs\n"
+	if ( ! $opt_f && ! -f "$rel_path_h" );
+      # Scan the header file (we should deal with nested header files)
+      # Record the names of simple #define constants into const_names
+            # Function prototypes are processed below.
+      open(CH, "<$rel_path_h") || die "Can't open $rel_path_h: $!\n";
+    defines:
+      while (<CH>) {
+	if ($pre_sub_tri_graphs) {
+	    # Preprocess all tri-graphs
+	    # including things stuck in quoted string constants.
+	    s/\?\?=/#/g;                         # | ??=|  #|
+	    s/\?\?\!/|/g;                        # | ??!|  ||
+	    s/\?\?'/^/g;                         # | ??'|  ^|
+	    s/\?\?\(/[/g;                        # | ??(|  [|
+	    s/\?\?\)/]/g;                        # | ??)|  ]|
+	    s/\?\?\-/~/g;                        # | ??-|  ~|
+	    s/\?\?\//\\/g;                       # | ??/|  \|
+	    s/\?\?</{/g;                         # | ??<|  {|
+	    s/\?\?>/}/g;                         # | ??>|  }|
+	}
+	if (/^[ \t]*#[ \t]*define\s+([\$\w]+)\b(?!\()\s*(?=[^"\s])(.*)/) {
+	    my $def = $1;
+	    my $rest = $2;
+	    $rest =~ s!/\*.*?(\*/|\n)|//.*!!g; # Remove comments
+	    $rest =~ s/^\s+//;
+	    $rest =~ s/\s+$//;
+	    if ($rest eq '') {
+	      print("Skip empty $def\n") if $opt_d;
+	      next defines;
+	    }
+	    # Cannot do: (-1) and ((LHANDLE)3) are OK:
+	    #print("Skip non-wordy $def => $rest\n"),
+	    #  next defines if $rest =~ /[^\w\$]/;
+	    if ($rest =~ /"/) {
+	      print("Skip stringy $def => $rest\n") if $opt_d;
+	      next defines;
+	    }
+	    print "Matched $_ ($def)\n" if $opt_d;
+	    $seen_define{$def} = $rest;
+	    $_ = $def;
+	    next if /^_.*_h_*$/i; # special case, but for what?
+	    if (defined $opt_p) {
+	      if (!/^$opt_p(\d)/) {
+		++$prefix{$_} if s/^$opt_p//;
+	      }
+	      else {
+		warn "can't remove $opt_p prefix from '$_'!\n";
+	      }
+	    }
+	    $prefixless{$def} = $_;
+	    if (!$fmask or /$fmask/) {
+		print "... Passes mask of -M.\n" if $opt_d and $fmask;
+		$const_names{$_}++;
+	    }
+	  }
+      }
+      if (defined $opt_e and !$opt_e) {
+        close(CH);
+      }
+      else {
+	# Work from miniperl too - on "normal" systems
+        my $SEEK_SET = eval 'use Fcntl qw/SEEK_SET/; SEEK_SET' || 0;
+        seek CH, 0, $SEEK_SET;
+        my $src = do { local $/; <CH> };
+        close CH;
+        no warnings 'uninitialized';
+
+        # Remove C and C++ comments
+        $src =~ s#/\*[^*]*\*+([^/*][^*]*\*+)*/|("(\\.|[^"\\])*"|'(\\.|[^'\\])*'|.[^/"'\\]*)#$2#gs;
+        $src =~ s#//.*$##gm;
+
+	while ($src =~ /\benum\s*([\w_]*)\s*\{\s([^}]+)\}/gsc) {
+	    my ($enum_name, $enum_body) = ($1, $2);
+            # skip enums matching $opt_e
+            next if $opt_e && $enum_name =~ /$opt_e/;
+            my $val = 0;
+            for my $item (split /,/, $enum_body) {
+                next if $item =~ /\A\s*\Z/;
+                my ($key, $declared_val) = $item =~ /(\w+)\s*(?:=\s*(.*))?/;
+                $val = defined($declared_val) && length($declared_val) ? $declared_val : 1 + $val;
+                $seen_define{$key} = $val;
+                $const_names{$key} = { name => $key, macro => 1 };
+            }
+        } # while (...)
+      } # if (!defined $opt_e or $opt_e)
+    }
+    }
+}
+
+# Save current directory so that C::Scan can use it
+my $cwd = File::Spec->rel2abs( File::Spec->curdir );
+
+# As Ilya suggested, use a name that contains - and then it can't clash with
+# the names of any packages. A directory 'fallback' will clash with any
+# new pragmata down the fallback:: tree, but that seems unlikely.
+my $constscfname = 'const-c.inc';
+my $constsxsfname = 'const-xs.inc';
+my $fallbackdirname = 'fallback';
+
+my $ext = chdir 'ext' ? 'ext/' : '';
+
+my @modparts  = split(/::/,$module);
+my $modpname  = join('-', @modparts);
+my $modfname  = pop @modparts;
+my $modpmdir  = join '/', 'lib', @modparts;
+my $modpmname = join '/', $modpmdir, $modfname.'.pm';
+
+if ($opt_O) {
+	warn "Overwriting existing $ext$modpname!!!\n" if -e $modpname;
+}
+else {
+	die "Won't overwrite existing $ext$modpname\n" if -e $modpname;
+}
+-d "$modpname"   || mkpath([$modpname], 0, 0775);
+chdir($modpname) || die "Can't chdir $ext$modpname: $!\n";
+
+my %types_seen;
+my %std_types;
+my $fdecls = [];
+my $fdecls_parsed = [];
+my $typedef_rex;
+my %typedefs_pre;
+my %known_fnames;
+my %structs;
+
+my @fnames;
+my @fnames_no_prefix;
+my %vdecl_hash;
+my @vdecls;
+
+if( ! $opt_X ){  # use XS, unless it was disabled
+  unless ($skip_ppport) {
+    require Devel::PPPort;
+    warn "Writing $ext$modpname/ppport.h\n";
+    Devel::PPPort::WriteFile('ppport.h')
+        || die "Can't create $ext$modpname/ppport.h: $!\n";
+  }
+  open(XS, ">$modfname.xs") || die "Can't create $ext$modpname/$modfname.xs: $!\n";
+  if ($opt_x) {
+    warn "Scanning typemaps...\n";
+    get_typemap();
+    my @td;
+    my @good_td;
+    my $addflags = $opt_F || '';
+
+    foreach my $filename (@path_h) {
+      my $c;
+      my $filter;
+
+      if ($fullpath{$filename} =~ /,/) {
+	$filename = $`;
+	$filter = $';
+      }
+      warn "Scanning $filename for functions...\n";
+      my @styles = $Config{gccversion} ? qw(C++ C9X GNU) : qw(C++ C9X);
+      $c = C::Scan->new('filename' => $filename, 'filename_filter' => $filter,
+        'add_cppflags' => $addflags, 'c_styles' => \@styles);
+      $c->set('includeDirs' => ["$Config::Config{archlib}/CORE", $cwd]);
+
+      $c->get('keywords')->{'__restrict'} = 1;
+
+      push @$fdecls_parsed, @{ $c->get('parsed_fdecls') };
+      push(@$fdecls, @{$c->get('fdecls')});
+
+      push @td, @{$c->get('typedefs_maybe')};
+      if ($opt_a) {
+	my $structs = $c->get('typedef_structs');
+	@structs{keys %$structs} = values %$structs;
+      }
+
+      if ($opt_m) {
+	%vdecl_hash = %{ $c->get('vdecl_hash') };
+	@vdecls = sort keys %vdecl_hash;
+	for (local $_ = 0; $_ < @vdecls; ++$_) {
+	  my $var = $vdecls[$_];
+	  my($type, $post) = @{ $vdecl_hash{$var} };
+	  if (defined $post) {
+	    warn "Can't handle variable '$type $var $post', skipping.\n";
+	    splice @vdecls, $_, 1;
+	    redo;
+	  }
+	  $type = normalize_type($type);
+	  $vdecl_hash{$var} = $type;
+	}
+      }
+
+      unless ($tmask_all) {
+	warn "Scanning $filename for typedefs...\n";
+	my $td = $c->get('typedef_hash');
+	# eval {require 'dumpvar.pl'; ::dumpValue($td)} or warn $@ if $opt_d;
+	my @f_good_td = grep $td->{$_}[1] eq '', keys %$td;
+	push @good_td, @f_good_td;
+	@typedefs_pre{@f_good_td}  = map $_->[0], @$td{@f_good_td};
+      }
+    }
+    { local $" = '|';
+      $typedef_rex = qr(\b(?<!struct )(?:@good_td)\b) if @good_td;
+    }
+    %known_fnames = map @$_[1,3], @$fdecls_parsed; # [1,3] is NAME, FULLTEXT
+    if ($fmask) {
+      my @good;
+      for my $i (0..$#$fdecls_parsed) {
+	next unless $fdecls_parsed->[$i][1] =~ /$fmask/; # [1] is NAME
+	push @good, $i;
+	print "... Function $fdecls_parsed->[$i][1] passes -M mask.\n"
+	  if $opt_d;
+      }
+      $fdecls = [@$fdecls[@good]];
+      $fdecls_parsed = [@$fdecls_parsed[@good]];
+    }
+    @fnames = sort map $_->[1], @$fdecls_parsed; # 1 is NAME
+    # Sort declarations:
+    {
+      my %h = map( ($_->[1], $_), @$fdecls_parsed);
+      $fdecls_parsed = [ @h{@fnames} ];
+    }
+    @fnames_no_prefix = @fnames;
+    @fnames_no_prefix
+      = sort map { ++$prefix{$_} if s/^$opt_p(?!\d)//; $_ } @fnames_no_prefix
+         if defined $opt_p;
+    # Remove macros which expand to typedefs
+    print "Typedefs are @td.\n" if $opt_d;
+    my %td = map {($_, $_)} @td;
+    # Add some other possible but meaningless values for macros
+    for my $k (qw(char double float int long short unsigned signed void)) {
+      $td{"$_$k"} = "$_$k" for ('', 'signed ', 'unsigned ');
+    }
+    # eval {require 'dumpvar.pl'; ::dumpValue( [\@td, \%td] ); 1} or warn $@;
+    my $n = 0;
+    my %bad_macs;
+    while (keys %td > $n) {
+      $n = keys %td;
+      my ($k, $v);
+      while (($k, $v) = each %seen_define) {
+	# print("found '$k'=>'$v'\n"),
+	$bad_macs{$k} = $td{$k} = $td{$v} if exists $td{$v};
+      }
+    }
+    # Now %bad_macs contains names of bad macros
+    for my $k (keys %bad_macs) {
+      delete $const_names{$prefixless{$k}};
+      print "Ignoring macro $k which expands to a typedef name '$bad_macs{$k}'\n" if $opt_d;
+    }
+  }
+}
+my (@const_specs, @const_names);
+
+for (sort(keys(%const_names))) {
+    my $v = $const_names{$_};
+    
+    push(@const_specs, ref($v) ? $v : $_);
+    push(@const_names, $_);
+}
+
+-d $modpmdir || mkpath([$modpmdir], 0, 0775);
+open(PM, ">$modpmname") || die "Can't create $ext$modpname/$modpmname: $!\n";
+
+$" = "\n\t";
+warn "Writing $ext$modpname/$modpmname\n";
+
+print PM <<"END";
+package $module;
+
+use $compat_version;
+END
+
+print PM <<"END" unless $skip_strict;
+use strict;
+END
+
+print PM "use warnings;\n" unless $skip_warnings or $compat_version < 5.006;
+
+unless( $opt_X || $opt_c || $opt_A ){
+	# we'll have an AUTOLOAD(), and it will have $AUTOLOAD and
+	# will want Carp.
+	print PM <<'END';
+use Carp;
+END
+}
+
+print PM <<'END' unless $skip_exporter;
+
+require Exporter;
+END
+
+my $use_Dyna = (not $opt_X and $compat_version < 5.006 and not $use_xsloader);
+print PM <<"END" if $use_Dyna;  # use DynaLoader, unless XS was disabled
+require DynaLoader;
+END
+
+
+# Are we using AutoLoader or not?
+unless ($skip_autoloader) { # no autoloader whatsoever.
+	unless ($opt_c) { # we're doing the AUTOLOAD
+		print PM "use AutoLoader;\n";
+	}
+	else {
+		print PM "use AutoLoader qw(AUTOLOAD);\n"
+	}
+}
+
+if ( $compat_version < 5.006 ) {
+    my $vars = '$VERSION @ISA';
+    $vars .= ' @EXPORT @EXPORT_OK %EXPORT_TAGS' unless $skip_exporter;
+    $vars .= ' $AUTOLOAD' unless $opt_X || $opt_c || $opt_A;
+    $vars .= ' $XS_VERSION' if $opt_B && !$opt_X;
+    print PM "use vars qw($vars);";
+}
+
+# Determine @ISA.
+my @modISA;
+push @modISA, 'Exporter'	unless $skip_exporter;
+push @modISA, 'DynaLoader' 	if $use_Dyna;  # no XS
+my $myISA = "our \@ISA = qw(@modISA);";
+$myISA =~ s/^our // if $compat_version < 5.006;
+
+print PM "\n$myISA\n\n";
+
+my @exported_names = (@const_names, @fnames_no_prefix, map '$'.$_, @vdecls);
+
+my $tmp='';
+$tmp .= <<"END" unless $skip_exporter;
+# Items to export into callers namespace by default. Note: do not export
+# names by default without a very good reason. Use EXPORT_OK instead.
+# Do not simply export all your public functions/methods/constants.
+
+# This allows declaration	use $module ':all';
+# If you do not need this, moving things directly into \@EXPORT or \@EXPORT_OK
+# will save memory.
+our %EXPORT_TAGS = ( 'all' => [ qw(
+	@exported_names
+) ] );
+
+our \@EXPORT_OK = ( \@{ \$EXPORT_TAGS{'all'} } );
+
+our \@EXPORT = qw(
+	@const_names
+);
+
+END
+
+$tmp .= "our \$VERSION = '$TEMPLATE_VERSION';\n";
+if ($opt_B) {
+    $tmp .= "our \$XS_VERSION = \$VERSION;\n" unless $opt_X;
+    $tmp .= "\$VERSION = eval \$VERSION;  # see L<perlmodstyle>\n";
+}
+$tmp .= "\n";
+
+$tmp =~ s/^our //mg if $compat_version < 5.006;
+print PM $tmp;
+
+if (@vdecls) {
+    printf PM "our(@{[ join ', ', map '$'.$_, @vdecls ]});\n\n";
+}
+
+
+print PM autoload ($module, $compat_version) unless $opt_c or $opt_X;
+
+if( ! $opt_X ){ # print bootstrap, unless XS is disabled
+  if ($use_Dyna) {
+	$tmp = <<"END";
+bootstrap $module \$VERSION;
+END
+  } else {
+	$tmp = <<"END";
+require XSLoader;
+XSLoader::load('$module', \$VERSION);
+END
+  }
+  $tmp =~ s:\$VERSION:\$XS_VERSION:g if $opt_B;
+  print PM $tmp;
+}
+
+# tying the variables can happen only after bootstrap
+if (@vdecls) {
+    printf PM <<END;
+{
+@{[ join "\n", map "    _tievar_$_(\$$_);", @vdecls ]}
+}
+
+END
+}
+
+my $after;
+if( $opt_P ){ # if POD is disabled
+	$after = '__END__';
+}
+else {
+	$after = '=cut';
+}
+
+print PM <<"END";
+
+# Preloaded methods go here.
+END
+
+print PM <<"END" unless $opt_A;
+
+# Autoload methods go after $after, and are processed by the autosplit program.
+END
+
+print PM <<"END";
+
+1;
+__END__
+END
+
+my ($email,$author,$licence);
+
+eval {
+       my $username;
+       ($username,$author) = (getpwuid($>))[0,6];
+       if (defined $username && defined $author) {
+	   $author =~ s/,.*$//; # in case of sub fields
+	   my $domain = $Config{'mydomain'};
+	   $domain =~ s/^\.//;
+	   $email = "$username\@$domain";
+       }
+     };
+
+$author =~ s/'/\\'/g if defined $author;
+$author ||= "A. U. Thor";
+$email  ||= 'a.u.thor@a.galaxy.far.far.away';
+
+$licence = sprintf << "DEFAULT", $^V;
+Copyright (C) ${\(1900 + (localtime) [5])} by $author
+
+This library is free software; you can redistribute it and/or modify
+it under the same terms as Perl itself, either Perl version %vd or,
+at your option, any later version of Perl 5 you may have available.
+DEFAULT
+
+my $revhist = '';
+$revhist = <<EOT if $opt_C;
+#
+#=head1 HISTORY
+#
+#=over 8
+#
+#=item $TEMPLATE_VERSION
+#
+#Original version; created by h2xs $H2XS_VERSION with options
+#
+#  @ARGS
+#
+#=back
+#
+EOT
+
+my $exp_doc = $skip_exporter ? '' : <<EOD;
+#
+#=head2 EXPORT
+#
+#None by default.
+#
+EOD
+
+if (@const_names and not $opt_P) {
+  $exp_doc .= <<EOD unless $skip_exporter;
+#=head2 Exportable constants
+#
+#  @{[join "\n  ", @const_names]}
+#
+EOD
+}
+
+if (defined $fdecls and @$fdecls and not $opt_P) {
+  $exp_doc .= <<EOD unless $skip_exporter;
+#=head2 Exportable functions
+#
+EOD
+
+#  $exp_doc .= <<EOD if $opt_p;
+#When accessing these functions from Perl, prefix C<$opt_p> should be removed.
+#
+#EOD
+  $exp_doc .= <<EOD unless $skip_exporter;
+#  @{[join "\n  ", @known_fnames{@fnames}]}
+#
+EOD
+}
+
+my $meth_doc = '';
+
+if ($opt_x && $opt_a) {
+  my($name, $struct);
+  $meth_doc .= accessor_docs($name, $struct)
+    while ($name, $struct) = each %structs;
+}
+
+# Prefix the default licence with hash symbols.
+# Is this just cargo cult - it seems that the first thing that happens to this
+# block is that all the hashes are then s///g out.
+my $licence_hash = $licence;
+$licence_hash =~ s/^/#/gm;
+
+my $pod;
+$pod = <<"END" unless $opt_P;
+## Below is stub documentation for your module. You'd better edit it!
+#
+#=head1 NAME
+#
+#$module - Perl extension for blah blah blah
+#
+#=head1 SYNOPSIS
+#
+#  use $module;
+#  blah blah blah
+#
+#=head1 DESCRIPTION
+#
+#Stub documentation for $module, created by h2xs. It looks like the
+#author of the extension was negligent enough to leave the stub
+#unedited.
+#
+#Blah blah blah.
+$exp_doc$meth_doc$revhist
+#
+#=head1 SEE ALSO
+#
+#Mention other useful documentation such as the documentation of
+#related modules or operating system documentation (such as man pages
+#in UNIX), or any relevant external documentation such as RFCs or
+#standards.
+#
+#If you have a mailing list set up for your module, mention it here.
+#
+#If you have a web site set up for your module, mention it here.
+#
+#=head1 AUTHOR
+#
+#$author, E<lt>${email}E<gt>
+#
+#=head1 COPYRIGHT AND LICENSE
+#
+$licence_hash
+#
+#=cut
+END
+
+$pod =~ s/^\#//gm unless $opt_P;
+print PM $pod unless $opt_P;
+
+close PM;
+
+
+if( ! $opt_X ){ # print XS, unless it is disabled
+warn "Writing $ext$modpname/$modfname.xs\n";
+
+print XS <<"END";
+#define PERL_NO_GET_CONTEXT
+#include "EXTERN.h"
+#include "perl.h"
+#include "XSUB.h"
+
+END
+
+print XS <<"END" unless $skip_ppport;
+#include "ppport.h"
+
+END
+
+if( @path_h ){
+    foreach my $path_h (@path_h_ini) {
+	my($h) = $path_h;
+	$h =~ s#^/usr/include/##;
+	if ($^O eq 'VMS') { $h =~ s#.*vms\]#sys/# or $h =~ s#.*[:>\]]##; }
+        print XS qq{#include <$h>\n};
+    }
+    print XS "\n";
+}
+
+print XS <<"END" if $opt_g;
+
+/* Global Data */
+
+#define MY_CXT_KEY "${module}::_guts" XS_VERSION
+
+typedef struct {
+    /* Put Global Data in here */
+    int dummy;		/* you can access this elsewhere as MY_CXT.dummy */
+} my_cxt_t;
+
+START_MY_CXT
+
+END
+
+my %pointer_typedefs;
+my %struct_typedefs;
+
+sub td_is_pointer {
+  my $type = shift;
+  my $out = $pointer_typedefs{$type};
+  return $out if defined $out;
+  my $otype = $type;
+  $out = ($type =~ /\*$/);
+  # This converts only the guys which do not have trailing part in the typedef
+  if (not $out
+      and $typedef_rex and $type =~ s/($typedef_rex)/$typedefs_pre{$1}/go) {
+    $type = normalize_type($type);
+    print "Is-Pointer: Type mutation via typedefs: $otype ==> $type\n"
+      if $opt_d;
+    $out = td_is_pointer($type);
+  }
+  return ($pointer_typedefs{$otype} = $out);
+}
+
+sub td_is_struct {
+  my $type = shift;
+  my $out = $struct_typedefs{$type};
+  return $out if defined $out;
+  my $otype = $type;
+  $out = ($type =~ /^(struct|union)\b/) && !td_is_pointer($type);
+  # This converts only the guys which do not have trailing part in the typedef
+  if (not $out
+      and $typedef_rex and $type =~ s/($typedef_rex)/$typedefs_pre{$1}/go) {
+    $type = normalize_type($type);
+    print "Is-Struct: Type mutation via typedefs: $otype ==> $type\n"
+      if $opt_d;
+    $out = td_is_struct($type);
+  }
+  return ($struct_typedefs{$otype} = $out);
+}
+
+print_tievar_subs(\*XS, $_, $vdecl_hash{$_}) for @vdecls;
+
+if( ! $opt_c ) {
+  # We write the "sample" files used when this module is built by perl without
+  # ExtUtils::Constant.
+  # h2xs will later check that these are the same as those generated by the
+  # code embedded into Makefile.PL
+  unless (-d $fallbackdirname) {
+    mkdir "$fallbackdirname" or die "Cannot mkdir $fallbackdirname: $!\n";
+  }
+  warn "Writing $ext$modpname/$fallbackdirname/$constscfname\n";
+  warn "Writing $ext$modpname/$fallbackdirname/$constsxsfname\n";
+  my $cfallback = File::Spec->catfile($fallbackdirname, $constscfname);
+  my $xsfallback = File::Spec->catfile($fallbackdirname, $constsxsfname);
+  WriteConstants ( C_FILE =>       $cfallback,
+                   XS_FILE =>      $xsfallback,
+                   DEFAULT_TYPE => $opt_t,
+                   NAME =>         $module,
+                   NAMES =>        \@const_specs,
+                 );
+  print XS "#include \"$constscfname\"\n";
+}
+
+
+my $prefix = defined $opt_p ? "PREFIX = $opt_p" : '';
+
+# Now switch from C to XS by issuing the first MODULE declaration:
+print XS <<"END";
+
+MODULE = $module		PACKAGE = $module		$prefix
+
+END
+
+# If a constant() function was #included then output a corresponding
+# XS declaration:
+print XS "INCLUDE: $constsxsfname\n" unless $opt_c;
+
+print XS <<"END" if $opt_g;
+
+BOOT:
+{
+    MY_CXT_INIT;
+    /* If any of the fields in the my_cxt_t struct need
+       to be initialised, do it here.
+     */
+}
+
+END
+
+foreach (sort keys %const_xsub) {
+    print XS <<"END";
+char *
+$_()
+
+    CODE:
+#ifdef $_
+	RETVAL = $_;
+#else
+	croak("Your vendor has not defined the $module macro $_");
+#endif
+
+    OUTPUT:
+	RETVAL
+
+END
+}
+
+my %seen_decl;
+my %typemap;
+
+sub print_decl {
+  my $fh = shift;
+  my $decl = shift;
+  my ($type, $name, $args) = @$decl;
+  return if $seen_decl{$name}++; # Need to do the same for docs as well?
+
+  my @argnames = map {$_->[1]} @$args;
+  my @argtypes = map { normalize_type( $_->[0], 1 ) } @$args;
+  if ($opt_k) {
+    s/^\s*const\b\s*// for @argtypes;
+  }
+  my @argarrays = map { $_->[4] || '' } @$args;
+  my $numargs = @$args;
+  if ($numargs and $argtypes[-1] eq '...') {
+    $numargs--;
+    $argnames[-1] = '...';
+  }
+  local $" = ', ';
+  $type = normalize_type($type, 1);
+
+  print $fh <<"EOP";
+
+$type
+$name(@argnames)
+EOP
+
+  for my $arg (0 .. $numargs - 1) {
+    print $fh <<"EOP";
+	$argtypes[$arg]	$argnames[$arg]$argarrays[$arg]
+EOP
+  }
+}
+
+sub print_tievar_subs {
+  my($fh, $name, $type) = @_;
+  print $fh <<END;
+I32
+_get_$name(IV index, SV *sv) {
+    dSP;
+    PUSHMARK(SP);
+    XPUSHs(sv);
+    PUTBACK;
+    (void)call_pv("$module\::_get_$name", G_DISCARD);
+    return (I32)0;
+}
+
+I32
+_set_$name(IV index, SV *sv) {
+    dSP;
+    PUSHMARK(SP);
+    XPUSHs(sv);
+    PUTBACK;
+    (void)call_pv("$module\::_set_$name", G_DISCARD);
+    return (I32)0;
+}
+
+END
+}
+
+sub print_tievar_xsubs {
+  my($fh, $name, $type) = @_;
+  print $fh <<END;
+void
+_tievar_$name(sv)
+	SV* sv
+    PREINIT:
+	struct ufuncs uf;
+    CODE:
+	uf.uf_val = &_get_$name;
+	uf.uf_set = &_set_$name;
+	uf.uf_index = (IV)&_get_$name;
+	sv_magic(sv, 0, 'U', (char*)&uf, sizeof(uf));
+
+void
+_get_$name(THIS)
+	$type THIS = NO_INIT
+    CODE:
+	THIS = $name;
+    OUTPUT:
+	SETMAGIC: DISABLE
+	THIS
+
+void
+_set_$name(THIS)
+	$type THIS
+    CODE:
+	$name = THIS;
+
+END
+}
+
+sub print_accessors {
+  my($fh, $name, $struct) = @_;
+  return unless defined $struct && $name !~ /\s|_ANON/;
+  $name = normalize_type($name);
+  my $ptrname = normalize_type("$name *");
+  print $fh <<"EOF";
+
+MODULE = $module		PACKAGE = ${name}		$prefix
+
+$name *
+_to_ptr(THIS)
+	$name THIS = NO_INIT
+    PROTOTYPE: \$
+    CODE:
+	if (sv_derived_from(ST(0), "$name")) {
+	    STRLEN len;
+	    char *s = SvPV((SV*)SvRV(ST(0)), len);
+	    if (len != sizeof(THIS))
+		croak("Size \%d of packed data != expected \%d",
+			len, sizeof(THIS));
+	    RETVAL = ($name *)s;
+	}
+	else
+	    croak("THIS is not of type $name");
+    OUTPUT:
+	RETVAL
+
+$name
+new(CLASS)
+	char *CLASS = NO_INIT
+    PROTOTYPE: \$
+    CODE:
+	Zero((void*)&RETVAL, sizeof(RETVAL), char);
+    OUTPUT:
+	RETVAL
+
+MODULE = $module		PACKAGE = ${name}Ptr		$prefix
+
+EOF
+  my @items = @$struct;
+  while (@items) {
+    my $item = shift @items;
+    if ($item->[0] =~ /_ANON/) {
+      if (defined $item->[2]) {
+	push @items, map [
+	  @$_[0, 1], "$item->[2]_$_->[2]", "$item->[2].$_->[2]",
+	], @{ $structs{$item->[0]} };
+      } else {
+	push @items, @{ $structs{$item->[0]} };
+      }
+    } else {
+      my $type = normalize_type($item->[0]);
+      my $ttype = $structs{$type} ? normalize_type("$type *") : $type;
+      print $fh <<"EOF";
+$ttype
+$item->[2](THIS, __value = NO_INIT)
+	$ptrname THIS
+	$type __value
+    PROTOTYPE: \$;\$
+    CODE:
+	if (items > 1)
+	    THIS->$item->[-1] = __value;
+	RETVAL = @{[
+	    $type eq $ttype ? "THIS->$item->[-1]" : "&(THIS->$item->[-1])"
+	]};
+    OUTPUT:
+	RETVAL
+
+EOF
+    }
+  }
+}
+
+sub accessor_docs {
+  my($name, $struct) = @_;
+  return unless defined $struct && $name !~ /\s|_ANON/;
+  $name = normalize_type($name);
+  my $ptrname = $name . 'Ptr';
+  my @items = @$struct;
+  my @list;
+  while (@items) {
+    my $item = shift @items;
+    if ($item->[0] =~ /_ANON/) {
+      if (defined $item->[2]) {
+	push @items, map [
+	  @$_[0, 1], "$item->[2]_$_->[2]", "$item->[2].$_->[2]",
+	], @{ $structs{$item->[0]} };
+      } else {
+	push @items, @{ $structs{$item->[0]} };
+      }
+    } else {
+      push @list, $item->[2];
+    }
+  }
+  my $methods = (join '(...)>, C<', @list) . '(...)';
+
+  my $pod = <<"EOF";
+#
+#=head2 Object and class methods for C<$name>/C<$ptrname>
+#
+#The principal Perl representation of a C object of type C<$name> is an
+#object of class C<$ptrname> which is a reference to an integer
+#representation of a C pointer.  To create such an object, one may use
+#a combination
+#
+#  my \$buffer = $name->new();
+#  my \$obj = \$buffer->_to_ptr();
+#
+#This exercises the following two methods, and an additional class
+#C<$name>, the internal representation of which is a reference to a
+#packed string with the C structure.  Keep in mind that \$buffer should
+#better survive longer than \$obj.
+#
+#=over
+#
+#=item C<\$object_of_type_$name-E<gt>_to_ptr()>
+#
+#Converts an object of type C<$name> to an object of type C<$ptrname>.
+#
+#=item C<$name-E<gt>new()>
+#
+#Creates an empty object of type C<$name>.  The corresponding packed
+#string is zeroed out.
+#
+#=item C<$methods>
+#
+#return the current value of the corresponding element if called
+#without additional arguments.  Set the element to the supplied value
+#(and return the new value) if called with an additional argument.
+#
+#Applicable to objects of type C<$ptrname>.
+#
+#=back
+#
+EOF
+  $pod =~ s/^\#//gm;
+  return $pod;
+}
+
+# Should be called before any actual call to normalize_type().
+sub get_typemap {
+  # We do not want to read ./typemap by obvios reasons.
+  my @tm =  qw(../../../typemap ../../typemap ../typemap);
+  my $stdtypemap =  "$Config::Config{privlib}/ExtUtils/typemap";
+  unshift @tm, $stdtypemap;
+  my $proto_re = "[" . quotemeta('\$%&*@;') . "]" ;
+
+  # Start with useful default values
+  $typemap{float} = 'T_NV';
+
+  foreach my $typemap (@tm) {
+    next unless -e $typemap ;
+    # skip directories, binary files etc.
+    warn " Scanning $typemap\n";
+    warn("Warning: ignoring non-text typemap file '$typemap'\n"), next
+      unless -T $typemap ;
+    open(TYPEMAP, $typemap)
+      or warn ("Warning: could not open typemap file '$typemap': $!\n"), next;
+    my $mode = 'Typemap';
+    while (<TYPEMAP>) {
+      next if /^\s*\#/;
+      if (/^INPUT\s*$/)   { $mode = 'Input'; next; }
+      elsif (/^OUTPUT\s*$/)  { $mode = 'Output'; next; }
+      elsif (/^TYPEMAP\s*$/) { $mode = 'Typemap'; next; }
+      elsif ($mode eq 'Typemap') {
+	next if /^\s*($|\#)/ ;
+	my ($type, $image);
+	if ( ($type, $image) =
+	     /^\s*(.*?\S)\s+(\S+)\s*($proto_re*)\s*$/o
+	     # This may reference undefined functions:
+	     and not ($image eq 'T_PACKED' and $typemap eq $stdtypemap)) {
+	  $typemap{normalize_type($type)} = $image;
+	}
+      }
+    }
+    close(TYPEMAP) or die "Cannot close $typemap: $!";
+  }
+  %std_types = %types_seen;
+  %types_seen = ();
+}
+
+
+sub normalize_type {		# Second arg: do not strip const's before \*
+  my $type = shift;
+  my $do_keep_deep_const = shift;
+  # If $do_keep_deep_const this is heuristic only
+  my $keep_deep_const = ($do_keep_deep_const ? '\b(?![^(,)]*\*)' : '');
+  my $ignore_mods
+    = "(?:\\b(?:(?:__const__|const)$keep_deep_const|static|inline|__inline__)\\b\\s*)*";
+  if ($do_keep_deep_const) {	# Keep different compiled /RExen/o separately!
+    $type =~ s/$ignore_mods//go;
+  }
+  else {
+    $type =~ s/$ignore_mods//go;
+  }
+  $type =~ s/([^\s\w])/ $1 /g;
+  $type =~ s/\s+$//;
+  $type =~ s/^\s+//;
+  $type =~ s/\s+/ /g;
+  $type =~ s/\* (?=\*)/*/g;
+  $type =~ s/\. \. \./.../g;
+  $type =~ s/ ,/,/g;
+  $types_seen{$type}++
+    unless $type eq '...' or $type eq 'void' or $std_types{$type};
+  $type;
+}
+
+my $need_opaque;
+
+sub assign_typemap_entry {
+  my $type = shift;
+  my $otype = $type;
+  my $entry;
+  if ($tmask and $type =~ /$tmask/) {
+    print "Type $type matches -o mask\n" if $opt_d;
+    $entry = (td_is_struct($type) ? "T_OPAQUE_STRUCT" : "T_PTROBJ");
+  }
+  elsif ($typedef_rex and $type =~ s/($typedef_rex)/$typedefs_pre{$1}/go) {
+    $type = normalize_type $type;
+    print "Type mutation via typedefs: $otype ==> $type\n" if $opt_d;
+    $entry = assign_typemap_entry($type);
+  }
+  # XXX good do better if our UV happens to be long long
+  return "T_NV" if $type =~ /^(unsigned\s+)?long\s+(long|double)\z/;
+  $entry ||= $typemap{$otype}
+    || (td_is_struct($type) ? "T_OPAQUE_STRUCT" : "T_PTROBJ");
+  $typemap{$otype} = $entry;
+  $need_opaque = 1 if $entry eq "T_OPAQUE_STRUCT";
+  return $entry;
+}
+
+for (@vdecls) {
+  print_tievar_xsubs(\*XS, $_, $vdecl_hash{$_});
+}
+
+if ($opt_x) {
+  for my $decl (@$fdecls_parsed) { print_decl(\*XS, $decl) }
+  if ($opt_a) {
+    while (my($name, $struct) = each %structs) {
+      print_accessors(\*XS, $name, $struct);
+    }
+  }
+}
+
+close XS;
+
+if (%types_seen) {
+  my $type;
+  warn "Writing $ext$modpname/typemap\n";
+  open TM, ">typemap" or die "Cannot open typemap file for write: $!";
+
+  for $type (sort keys %types_seen) {
+    my $entry = assign_typemap_entry $type;
+    print TM $type, "\t" x (5 - int((length $type)/8)), "\t$entry\n"
+  }
+
+  print TM <<'EOP' if $need_opaque; # Older Perls do not have correct entry
+#############################################################################
+INPUT
+T_OPAQUE_STRUCT
+	if (sv_derived_from($arg, \"${ntype}\")) {
+	    STRLEN len;
+	    char  *s = SvPV((SV*)SvRV($arg), len);
+
+	    if (len != sizeof($var))
+		croak(\"Size %d of packed data != expected %d\",
+			len, sizeof($var));
+	    $var = *($type *)s;
+	}
+	else
+	    croak(\"$var is not of type ${ntype}\")
+#############################################################################
+OUTPUT
+T_OPAQUE_STRUCT
+	sv_setref_pvn($arg, \"${ntype}\", (char *)&$var, sizeof($var));
+EOP
+
+  close TM or die "Cannot close typemap file for write: $!";
+}
+
+} # if( ! $opt_X )
+
+warn "Writing $ext$modpname/Makefile.PL\n";
+open(PL, ">Makefile.PL") || die "Can't create $ext$modpname/Makefile.PL: $!\n";
+
+my $prereq_pm = '';
+
+if ( $compat_version < 5.006002 and $new_test )
+{
+  $prereq_pm .= q%'Test::More'  =>  0, %;
+}
+elsif ( $compat_version < 5.006002 )
+{
+  $prereq_pm .= q%'Test'        =>  0, %;
+}
+
+if (!$opt_X and $use_xsloader)
+{
+  $prereq_pm .= q%'XSLoader'    =>  0, %;
+}
+
+print PL <<"END";
+use $compat_version;
+use ExtUtils::MakeMaker;
+# See lib/ExtUtils/MakeMaker.pm for details of how to influence
+# the contents of the Makefile that is written.
+WriteMakefile(
+    NAME              => '$module',
+    VERSION_FROM      => '$modpmname', # finds \$VERSION, requires EU::MM from perl >= 5.5
+    PREREQ_PM         => {$prereq_pm}, # e.g., Module::Name => 1.1
+    ABSTRACT_FROM     => '$modpmname', # retrieve abstract from module
+    AUTHOR            => '$author <$email>',
+    #LICENSE           => 'perl',
+    #Value must be from legacy list of licenses here
+    #http://search.cpan.org/perldoc?Module%3A%3ABuild%3A%3AAPI
+END
+if (!$opt_X) { # print C stuff, unless XS is disabled
+  $opt_F = '' unless defined $opt_F;
+  my $I = (((glob '*.h') || (glob '*.hh')) ? '-I.' : '');
+  my $Ihelp = ($I ? '-I. ' : '');
+  my $Icomment = ($I ? '' : <<EOC);
+	# Insert -I. if you add *.h files later:
+EOC
+
+  print PL <<END;
+    LIBS              => ['$extralibs'], # e.g., '-lm'
+    DEFINE            => '$opt_F', # e.g., '-DHAVE_SOMETHING'
+$Icomment    INC               => '$I', # e.g., '${Ihelp}-I/usr/include/other'
+END
+
+  my $C = grep {$_ ne "$modfname.c"}
+    (glob '*.c'), (glob '*.cc'), (glob '*.C');
+  my $Cpre = ($C ? '' : '# ');
+  my $Ccomment = ($C ? '' : <<EOC);
+	# Un-comment this if you add C files to link with later:
+EOC
+
+  print PL <<END;
+$Ccomment    ${Cpre}OBJECT            => '\$(O_FILES)', # link all the C files too
+END
+} # ' # Grr
+print PL ");\n";
+if (!$opt_c) {
+  my $generate_code =
+    WriteMakefileSnippet ( C_FILE =>       $constscfname,
+                           XS_FILE =>      $constsxsfname,
+                           DEFAULT_TYPE => $opt_t,
+                           NAME =>         $module,
+                           NAMES =>        \@const_specs,
+                 );
+  print PL <<"END";
+if  (eval {require ExtUtils::Constant; 1}) {
+  # If you edit these definitions to change the constants used by this module,
+  # you will need to use the generated $constscfname and $constsxsfname
+  # files to replace their "fallback" counterparts before distributing your
+  # changes.
+$generate_code
+}
+else {
+  use File::Copy;
+  use File::Spec;
+  foreach my \$file ('$constscfname', '$constsxsfname') {
+    my \$fallback = File::Spec->catfile('$fallbackdirname', \$file);
+    copy (\$fallback, \$file) or die "Can't copy \$fallback to \$file: \$!";
+  }
+}
+END
+
+  eval $generate_code;
+  if ($@) {
+    warn <<"EOM";
+Attempting to test constant code in $ext$modpname/Makefile.PL:
+$generate_code
+__END__
+gave unexpected error $@
+Please report the circumstances of this bug in h2xs version $H2XS_VERSION
+using the perlbug script.
+EOM
+  } else {
+    my $fail;
+
+    foreach my $file ($constscfname, $constsxsfname) {
+      my $fallback = File::Spec->catfile($fallbackdirname, $file);
+      if (compare($file, $fallback)) {
+        warn << "EOM";
+Files "$ext$modpname/$fallbackdirname/$file" and "$ext$modpname/$file" differ.
+EOM
+        $fail++;
+      }
+    }
+    if ($fail) {
+      warn fill ('','', <<"EOM") . "\n";
+It appears that the code in $ext$modpname/Makefile.PL does not autogenerate
+the files $ext$modpname/$constscfname and $ext$modpname/$constsxsfname
+correctly.
+
+Please report the circumstances of this bug in h2xs version $H2XS_VERSION
+using the perlbug script.
+EOM
+    } else {
+      unlink $constscfname, $constsxsfname;
+    }
+  }
+}
+close(PL) || die "Can't close $ext$modpname/Makefile.PL: $!\n";
+
+# Create a simple README since this is a CPAN requirement
+# and it doesn't hurt to have one
+warn "Writing $ext$modpname/README\n";
+open(RM, ">README") || die "Can't create $ext$modpname/README:$!\n";
+my $thisyear = (gmtime)[5] + 1900;
+my $rmhead = "$modpname version $TEMPLATE_VERSION";
+my $rmheadeq = "=" x length($rmhead);
+
+my $rm_prereq;
+
+if ( $compat_version < 5.006002 and $new_test )
+{
+  $rm_prereq = 'Test::More';
+}
+elsif ( $compat_version < 5.006002 )
+{
+  $rm_prereq = 'Test';
+}
+else
+{
+  $rm_prereq = 'blah blah blah';
+}
+
+print RM <<_RMEND_;
+$rmhead
+$rmheadeq
+
+The README is used to introduce the module and provide instructions on
+how to install the module, any machine dependencies it may have (for
+example C compilers and installed libraries) and any other information
+that should be provided before the module is installed.
+
+A README file is required for CPAN modules since CPAN extracts the
+README file from a module distribution so that people browsing the
+archive can use it get an idea of the modules uses. It is usually a
+good idea to provide version information here so that people can
+decide whether fixes for the module are worth downloading.
+
+INSTALLATION
+
+To install this module type the following:
+
+   perl Makefile.PL
+   make
+   make test
+   make install
+
+DEPENDENCIES
+
+This module requires these other modules and libraries:
+
+  $rm_prereq
+
+COPYRIGHT AND LICENCE
+
+Put the correct copyright and licence information here.
+
+$licence
+
+_RMEND_
+close(RM) || die "Can't close $ext$modpname/README: $!\n";
+
+my $testdir  = "t";
+my $testfile = "$testdir/$modpname.t";
+unless (-d "$testdir") {
+  mkdir "$testdir" or die "Cannot mkdir $testdir: $!\n";
+}
+warn "Writing $ext$modpname/$testfile\n";
+my $tests = @const_names ? 2 : 1;
+
+open EX, ">$testfile" or die "Can't create $ext$modpname/$testfile: $!\n";
+
+print EX <<_END_;
+# Before 'make install' is performed this script should be runnable with
+# 'make test'. After 'make install' it should work as 'perl $modpname.t'
+
+#########################
+
+# change 'tests => $tests' to 'tests => last_test_to_print';
+
+use strict;
+use warnings;
+
+_END_
+
+my $test_mod = 'Test::More';
+
+if ( $old_test or ($compat_version < 5.006002 and not $new_test ))
+{
+  my $test_mod = 'Test';
+
+  print EX <<_END_;
+use Test;
+BEGIN { plan tests => $tests };
+use $module;
+ok(1); # If we made it this far, we're ok.
+
+_END_
+
+   if (@const_names) {
+     my $const_names = join " ", @const_names;
+     print EX <<'_END_';
+
+my $fail;
+foreach my $constname (qw(
+_END_
+
+     print EX wrap ("\t", "\t", $const_names);
+     print EX (")) {\n");
+
+     print EX <<_END_;
+  next if (eval "my \\\$a = \$constname; 1");
+  if (\$\@ =~ /^Your vendor has not defined $module macro \$constname/) {
+    print "# pass: \$\@";
+  } else {
+    print "# fail: \$\@";
+    \$fail = 1;
+  }
+}
+if (\$fail) {
+  print "not ok 2\\n";
+} else {
+  print "ok 2\\n";
+}
+
+_END_
+  }
+}
+else
+{
+  print EX <<_END_;
+use Test::More tests => $tests;
+BEGIN { use_ok('$module') };
+
+_END_
+
+   if (@const_names) {
+     my $const_names = join " ", @const_names;
+     print EX <<'_END_';
+
+my $fail = 0;
+foreach my $constname (qw(
+_END_
+
+     print EX wrap ("\t", "\t", $const_names);
+     print EX (")) {\n");
+
+     print EX <<_END_;
+  next if (eval "my \\\$a = \$constname; 1");
+  if (\$\@ =~ /^Your vendor has not defined $module macro \$constname/) {
+    print "# pass: \$\@";
+  } else {
+    print "# fail: \$\@";
+    \$fail = 1;
+  }
+
+}
+
+ok( \$fail == 0 , 'Constants' );
+_END_
+  }
+}
+
+print EX <<_END_;
+#########################
+
+# Insert your test code below, the $test_mod module is use()ed here so read
+# its man page ( perldoc $test_mod ) for help writing this test script.
+
+_END_
+
+close(EX) || die "Can't close $ext$modpname/$testfile: $!\n";
+
+unless ($opt_C) {
+  warn "Writing $ext$modpname/Changes\n";
+  $" = ' ';
+  open(EX, ">Changes") || die "Can't create $ext$modpname/Changes: $!\n";
+  @ARGS = map {/[\s\"\'\`\$*?^|&<>\[\]\{\}\(\)]/ ? "'$_'" : $_} @ARGS;
+  print EX <<EOP;
+Revision history for Perl extension $module.
+
+$TEMPLATE_VERSION  @{[scalar localtime]}
+\t- original version; created by h2xs $H2XS_VERSION with options
+\t\t@ARGS
+
+EOP
+  close(EX) || die "Can't close $ext$modpname/Changes: $!\n";
+}
+
+warn "Writing $ext$modpname/MANIFEST\n";
+open(MANI,'>MANIFEST') or die "Can't create MANIFEST: $!";
+my @files = grep { -f } (<*>, <t/*>, <$fallbackdirname/*>, <$modpmdir/*>);
+if (!@files) {
+  eval {opendir(D,'.');};
+  unless ($@) { @files = readdir(D); closedir(D); }
+}
+if (!@files) { @files = map {chomp && $_} `ls`; }
+if ($^O eq 'VMS') {
+  foreach (@files) {
+    # Clip trailing '.' for portability -- non-VMS OSs don't expect it
+    s%\.$%%;
+    # Fix up for case-sensitive file systems
+    s/$modfname/$modfname/i && next;
+    $_ = "\U$_" if $_ eq 'manifest' or $_ eq 'changes';
+    $_ = 'Makefile.PL' if $_ eq 'makefile.pl';
+  }
+}
+print MANI join("\n",@files), "\n";
+close MANI;
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/head.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/head.exe
new file mode 100644
index 00000000..93cf57d6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/head.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hexdump.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hexdump.exe
new file mode 100644
index 00000000..990839fc
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hexdump.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostid.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostid.exe
new file mode 100644
index 00000000..d6a1f708
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostid.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostname.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostname.exe
new file mode 100644
index 00000000..ebb0937a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/hostname.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/id.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/id.exe
new file mode 100644
index 00000000..75de1537
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/id.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/igawk b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/igawk
new file mode 100644
index 00000000..70edf606
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/igawk
@@ -0,0 +1,138 @@
+#! /bin/sh
+# igawk --- like gawk but do @include processing
+#
+# Arnold Robbins, arnold@skeeve.com, Public Domain
+# July 1993
+# December 2010, minor edits
+
+if [ "$1" = debug ]
+then
+    set -x
+    shift
+fi
+
+# A literal newline, so that program text is formatted correctly
+n='
+'
+
+# Initialize variables to empty
+program=
+opts=
+
+while [ $# -ne 0 ] # loop over arguments
+do
+    case $1 in
+    --)     shift
+            break ;;
+
+    -W)     shift
+            # The ${x?'message here'} construct prints a
+            # diagnostic if $x is the null string
+            set -- -W"${@?'missing operand'}"
+            continue ;;
+
+    -[vF])  opts="$opts $1 '${2?'missing operand'}'"
+            shift ;;
+
+    -[vF]*) opts="$opts '$1'" ;;
+
+    -f)     program="$program$n@include ${2?'missing operand'}"
+            shift ;;
+
+    -f*)    f=$(expr "$1" : '-f\(.*\)')
+            program="$program$n@include $f" ;;
+
+    -[W-]file=*)
+            f=$(expr "$1" : '-.file=\(.*\)')
+            program="$program$n@include $f" ;;
+
+    -[W-]file)
+            program="$program$n@include ${2?'missing operand'}"
+            shift ;;
+
+    -[W-]source=*)
+            t=$(expr "$1" : '-.source=\(.*\)')
+            program="$program$n$t" ;;
+
+    -[W-]source)
+            program="$program$n${2?'missing operand'}"
+            shift ;;
+
+    -[W-]version)
+            echo igawk: version 3.0 1>&2
+            gawk --version
+            exit 0 ;;
+
+    -[W-]*) opts="$opts '$1'" ;;
+
+    *)      break ;;
+    esac
+    shift
+done
+
+if [ -z "$program" ]
+then
+     program=${1?'missing program'}
+     shift
+fi
+
+# At this point, `program' has the program.
+expand_prog='
+
+function pathto(file,    i, t, junk)
+{
+    if (index(file, "/") != 0)
+        return file
+
+    if (file == "-")
+        return file
+
+    for (i = 1; i <= ndirs; i++) {
+        t = (pathlist[i] "/" file)
+        if ((getline junk < t) > 0) {
+            # found it
+            close(t)
+            return t
+        }
+    }
+    return ""
+}
+BEGIN {
+    path = ENVIRON["AWKPATH"]
+    ndirs = split(path, pathlist, ":")
+    for (i = 1; i <= ndirs; i++) {
+        if (pathlist[i] == "")
+            pathlist[i] = "."
+    }
+    stackptr = 0
+    input[stackptr] = ARGV[1] # ARGV[1] is first file
+
+    for (; stackptr >= 0; stackptr--) {
+        while ((getline < input[stackptr]) > 0) {
+            if (tolower($1) != "@include") {
+                print
+                continue
+            }
+            fpath = pathto($2)
+            if (fpath == "") {
+                printf("igawk: %s:%d: cannot find %s\n",
+                    input[stackptr], FNR, $2) > "/dev/stderr"
+                continue
+            }
+            if (! (fpath in processed)) {
+                processed[fpath] = input[stackptr]
+                input[++stackptr] = fpath  # push onto stack
+            } else
+                print $2, "included in", input[stackptr],
+                    "already included in",
+                    processed[fpath] > "/dev/stderr"
+        }
+        close(input[stackptr])
+    }
+}'  # close quote ends `expand_prog' variable
+
+processed_program=$(gawk -- "$expand_prog" /dev/stdin << EOF
+$program
+EOF
+)
+eval gawk $opts -- '"$processed_program"' '"$@"'
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/infocmp.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/infocmp.exe
new file mode 100644
index 00000000..e21f4594
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/infotocap b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/infotocap
new file mode 100644
index 00000000..465f7ff1
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/install.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/install.exe
new file mode 100644
index 00000000..439bc13d
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/instmodsh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/instmodsh
new file mode 100644
index 00000000..8ad3af26
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/instmodsh
@@ -0,0 +1,195 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl -w
+
+use strict;
+use IO::File;
+use ExtUtils::Packlist;
+use ExtUtils::Installed;
+
+use vars qw($Inst @Modules);
+
+
+=head1 NAME
+
+instmodsh - A shell to examine installed modules
+
+=head1 SYNOPSIS
+
+    instmodsh
+
+=head1 DESCRIPTION
+
+A little interface to ExtUtils::Installed to examine installed modules,
+validate your packlists and even create a tarball from an installed module.
+
+=head1 SEE ALSO
+
+ExtUtils::Installed
+
+=cut
+
+
+my $Module_Help = <<EOF;
+Available commands are:
+   f [all|prog|doc]   - List installed files of a given type
+   d [all|prog|doc]   - List the directories used by a module
+   v                  - Validate the .packlist - check for missing files
+   t <tarfile>        - Create a tar archive of the module
+   h                  - Display module help
+   q                  - Quit the module
+EOF
+
+my %Module_Commands = (
+                       f => \&list_installed,
+                       d => \&list_directories,
+                       v => \&validate_packlist,
+                       t => \&create_archive,
+                       h => \&module_help,
+                      );
+
+sub do_module($) {
+    my ($module) = @_;
+
+    print($Module_Help);
+    MODULE_CMD: while (1) {
+        print("$module cmd? ");
+
+        my $reply = <STDIN>; chomp($reply);
+        my($cmd) = $reply =~ /^(\w)\b/;
+
+        last if $cmd eq 'q';
+
+        if( $Module_Commands{$cmd} ) {
+            $Module_Commands{$cmd}->($reply, $module);
+        }
+        elsif( $cmd eq 'q' ) {
+            last MODULE_CMD;
+        }
+        else {
+            module_help();
+        }
+    }
+}
+
+
+sub list_installed {
+    my($reply, $module) = @_;
+
+    my $class = (split(' ', $reply))[1];
+    $class = 'all' unless $class;
+
+    my @files;
+    if (eval { @files = $Inst->files($module, $class); }) {
+        print("$class files in $module are:\n   ",
+              join("\n   ", @files), "\n");
+    }
+    else {
+        print($@);
+    }
+};
+
+
+sub list_directories {
+    my($reply, $module) = @_;
+
+    my $class = (split(' ', $reply))[1];
+    $class = 'all' unless $class;
+
+    my @dirs;
+    if (eval { @dirs = $Inst->directories($module, $class); }) {
+        print("$class directories in $module are:\n   ",
+              join("\n   ", @dirs), "\n");
+    }
+    else {
+        print($@);
+    }
+}
+
+
+sub create_archive {
+    my($reply, $module) = @_;
+
+    my $file = (split(' ', $reply))[1];
+
+    if( !(defined $file and length $file) ) {
+        print "No tar file specified\n";
+    }
+    elsif( eval { require Archive::Tar } ) {
+        Archive::Tar->create_archive($file, 0, $Inst->files($module));
+    }
+    else {
+        my($first, @rest) = $Inst->files($module);
+        system('tar', 'cvf', $file, $first);
+        for my $f (@rest) {
+            system('tar', 'rvf', $file, $f);
+        }
+        print "Can't use tar\n" if $?;
+    }
+}
+
+
+sub validate_packlist {
+    my($reply, $module) = @_;
+
+    if (my @missing = $Inst->validate($module)) {
+        print("Files missing from $module are:\n   ",
+              join("\n   ", @missing), "\n");
+    }
+    else {
+        print("$module has no missing files\n");
+    }
+}
+
+sub module_help {
+    print $Module_Help;
+}
+
+
+
+##############################################################################
+
+sub toplevel()
+{
+my $help = <<EOF;
+Available commands are:
+   l            - List all installed modules
+   m <module>   - Select a module
+   q            - Quit the program
+EOF
+print($help);
+while (1)
+   {
+   print("cmd? ");
+   my $reply = <STDIN>; chomp($reply);
+   CASE:
+      {
+      $reply eq 'l' and do
+         {
+         print("Installed modules are:\n   ", join("\n   ", @Modules), "\n");
+         last CASE;
+         };
+      $reply =~ /^m\s+/ and do
+         {
+         do_module((split(' ', $reply))[1]);
+         last CASE;
+         };
+      $reply eq 'q' and do
+         {
+         exit(0);
+         };
+      # Default
+         print($help);
+      }
+   }
+}
+
+
+###############################################################################
+
+$Inst = ExtUtils::Installed->new();
+@Modules = $Inst->modules();
+toplevel();
+
+###############################################################################
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ipcmk.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ipcmk.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/isosize.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/isosize.exe
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index 00000000..c3bd6fa5
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/join.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/join.exe
new file mode 100644
index 00000000..5c4a8f14
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/json_pp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/json_pp
new file mode 100644
index 00000000..9c363d53
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/json_pp
@@ -0,0 +1,208 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+
+use strict;
+use Getopt::Long;
+
+use JSON::PP ();
+
+my $VERSION = '1.00';
+
+# imported from JSON-XS/bin/json_xs
+
+my %allow_json_opt = map { $_ => 1 } qw(
+    ascii latin1 utf8 pretty indent space_before space_after relaxed canonical allow_nonref
+    allow_singlequote allow_barekey allow_bignum loose escape_slash
+);
+
+
+GetOptions(
+   'v'   => \( my $opt_verbose ),
+   'f=s' => \( my $opt_from = 'json' ),
+   't=s' => \( my $opt_to = 'json' ),
+   'json_opt=s' => \( my $json_opt = 'pretty' ),
+   'V'   => \( my $version ),
+) or die "Usage: $0 [-v] -f from_format [-t to_format]\n";
+
+
+if ( $version ) {
+    print "$VERSION\n";
+    exit;
+}
+
+
+$json_opt = '' if $json_opt eq '-';
+
+my @json_opt = grep { $allow_json_opt{ $_ } or die "'$_' is invalid json opttion" } split/,/, $json_opt;
+
+my %F = (
+   'json' => sub {
+      my $json = JSON::PP->new;
+      $json->$_() for @json_opt;
+      $json->decode( $_ );
+   },
+   'eval' => sub {
+        my $v = eval "no strict;\n#line 1 \"input\"\n$_";
+        die "$@" if $@;
+        return $v;
+    },
+);
+
+
+my %T = (
+   'null' => sub { "" },
+   'json' => sub {
+      my $json = JSON::PP->new;
+      $json->$_() for @json_opt;
+      $json->encode( $_ );
+   },
+   'dumper' => sub {
+      require Data::Dumper;
+      Data::Dumper::Dumper($_)
+   },
+);
+
+
+
+$F{$opt_from}
+   or die "$opt_from: not a valid fromformat\n";
+
+$T{$opt_to}
+   or die "$opt_from: not a valid toformat\n";
+
+local $/;
+$_ = <STDIN>;
+
+$_ = $F{$opt_from}->();
+$_ = $T{$opt_to}->();
+
+print $_;
+
+
+__END__
+
+=pod
+
+=encoding utf8
+
+=head1 NAME
+
+json_pp - JSON::PP command utility
+
+=head1 SYNOPSIS
+
+    json_pp [-v] [-f from_format] [-t to_format] [-json_opt options_to_json]
+
+=head1 DESCRIPTION
+
+json_pp converts between some input and output formats (one of them is JSON).
+This program was copied from L<json_xs> and modified.
+
+The default input format is json and the default output format is json with pretty option.
+
+=head1 OPTIONS
+
+=head2 -f
+
+    -f from_format
+
+Reads a data in the given format from STDIN.
+
+Format types:
+
+=over
+
+=item json
+
+as JSON
+
+=item eval
+
+as Perl code
+
+=back
+
+=head2 -t
+
+Writes a data in the given format to STDOUT.
+
+=over
+
+=item null
+
+no action.
+
+=item json
+
+as JSON
+
+=item dumper
+
+as Data::Dumper
+
+=back
+
+=head2 -json_opt
+
+options to JSON::PP
+
+Acceptable options are:
+
+    ascii latin1 utf8 pretty indent space_before space_after relaxed canonical allow_nonref
+    allow_singlequote allow_barekey allow_bignum loose escape_slash
+
+=head2 -v
+
+Verbose option, but currently no action in fact.
+
+=head2 -V
+
+Prints version and exits.
+
+
+=head1 EXAMPLES
+
+    $ perl -e'print q|{"foo":"あい","bar":1234567890000000000000000}|' |\
+       json_pp -f json -t dumper -json_opt pretty,utf8,allow_bignum
+    
+    $VAR1 = {
+              'bar' => bless( {
+                                'value' => [
+                                             '0000000',
+                                             '0000000',
+                                             '5678900',
+                                             '1234'
+                                           ],
+                                'sign' => '+'
+                              }, 'Math::BigInt' ),
+              'foo' => "\x{3042}\x{3044}"
+            };
+
+    $ perl -e'print q|{"foo":"あい","bar":1234567890000000000000000}|' |\
+       json_pp -f json -t dumper -json_opt pretty
+    
+    $VAR1 = {
+              'bar' => '1234567890000000000000000',
+              'foo' => "\x{e3}\x{81}\x{82}\x{e3}\x{81}\x{84}"
+            };
+
+=head1 SEE ALSO
+
+L<JSON::PP>, L<json_xs>
+
+=head1 AUTHOR
+
+Makamaka Hannyaharamitu, E<lt>makamaka[at]cpan.orgE<gt>
+
+
+=head1 COPYRIGHT AND LICENSE
+
+Copyright 2010 by Makamaka Hannyaharamitu
+
+This library is free software; you can redistribute it and/or modify
+it under the same terms as Perl itself. 
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/kill.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/kill.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ld.bfd.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ld.bfd.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libiconv-2.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libiconv-2.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libintl-8.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libintl-8.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libmpc-2.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libmpc-2.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libmpfr-1.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libmpfr-1.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libnetcfg b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libnetcfg
new file mode 100644
index 00000000..c1b8cb77
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libnetcfg
@@ -0,0 +1,721 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+=head1 NAME
+
+libnetcfg - configure libnet
+
+=head1 DESCRIPTION
+
+The libnetcfg utility can be used to configure the libnet.
+Starting from perl 5.8 libnet is part of the standard Perl
+distribution, but the libnetcfg can be used for any libnet
+installation.
+
+=head1 USAGE
+
+Without arguments libnetcfg displays the current configuration.
+
+    $ libnetcfg
+    # old config ./libnet.cfg
+    daytime_hosts        ntp1.none.such
+    ftp_int_passive      0
+    ftp_testhost         ftp.funet.fi
+    inet_domain          none.such
+    nntp_hosts           nntp.none.such
+    ph_hosts             
+    pop3_hosts           pop.none.such
+    smtp_hosts           smtp.none.such
+    snpp_hosts           
+    test_exist           1
+    test_hosts           1
+    time_hosts           ntp.none.such
+    # libnetcfg -h for help
+    $ 
+
+It tells where the old configuration file was found (if found).
+
+The C<-h> option will show a usage message.
+
+To change the configuration you will need to use either the C<-c> or
+the C<-d> options.
+
+The default name of the old configuration file is by default
+"libnet.cfg", unless otherwise specified using the -i option,
+C<-i oldfile>, and it is searched first from the current directory,
+and then from your module path.
+
+The default name of the new configuration file is "libnet.cfg", and by
+default it is written to the current directory, unless otherwise
+specified using the -o option, C<-o newfile>.
+
+=head1 SEE ALSO
+
+L<Net::Config>, L<libnetFAQ>
+
+=head1 AUTHORS
+
+Graham Barr, the original Configure script of libnet.
+
+Jarkko Hietaniemi, conversion into libnetcfg for inclusion into Perl 5.8.
+
+=cut
+
+# $Id: Configure,v 1.8 1997/03/04 09:22:32 gbarr Exp $
+
+use strict;
+use IO::File;
+use Getopt::Std;
+use ExtUtils::MakeMaker qw(prompt);
+use File::Spec;
+
+use vars qw($opt_d $opt_c $opt_h $opt_o $opt_i);
+
+##
+##
+##
+
+my %cfg = ();
+my @cfg = ();
+
+my($libnet_cfg_in,$libnet_cfg_out,$msg,$ans,$def,$have_old);
+
+##
+##
+##
+
+sub valid_host
+{
+ my $h = shift;
+
+ defined($h) && (($cfg{'test_exist'} == 0) || gethostbyname($h));
+}
+
+##
+##
+##
+
+sub test_hostnames (\@)
+{
+ my $hlist = shift;
+ my @h = ();
+ my $host;
+ my $err = 0;
+
+ foreach $host (@$hlist)
+  {
+   if(valid_host($host))
+    {
+     push(@h, $host);
+     next;
+    }
+   warn "Bad hostname: '$host'\n";
+   $err++;
+  }
+ @$hlist = @h;
+ $err ? join(" ",@h) : undef;
+}
+
+##
+##
+##
+
+sub Prompt
+{
+ my($prompt,$def) = @_;
+
+ $def = "" unless defined $def;
+
+ chomp($prompt);
+
+ if($opt_d)
+  {
+   print $prompt,," [",$def,"]\n";
+   return $def;
+  }
+ prompt($prompt,$def);
+}
+
+##
+##
+##
+
+sub get_host_list
+{
+ my($prompt,$def) = @_;
+
+ $def = join(" ",@$def) if ref($def);
+
+ my @hosts;
+
+ do
+  {
+   my $ans = Prompt($prompt,$def);
+
+   $ans =~ s/(\A\s+|\s+\Z)//g;
+
+   @hosts = split(/\s+/, $ans);
+  }
+ while(@hosts && defined($def = test_hostnames(@hosts)));
+
+ \@hosts;
+}
+
+##
+##
+##
+
+sub get_hostname
+{
+ my($prompt,$def) = @_;
+
+ my $host;
+
+ while(1)
+  {
+   my $ans = Prompt($prompt,$def);
+   $host = ($ans =~ /(\S*)/)[0];
+   last
+	if(!length($host) || valid_host($host));
+
+   $def =""
+	if $def eq $host;
+
+   print <<"EDQ";
+
+*** ERROR:
+    Hostname '$host' does not seem to exist, please enter again
+    or a single space to clear any default
+
+EDQ
+  }
+
+ length $host
+	? $host
+	: undef;
+}
+
+##
+##
+##
+
+sub get_bool ($$)
+{
+ my($prompt,$def) = @_;
+
+ chomp($prompt);
+
+ my $val = Prompt($prompt,$def ? "yes" : "no");
+
+ $val =~ /^y/i ? 1 : 0;
+}
+
+##
+##
+##
+
+sub get_netmask ($$)
+{
+ my($prompt,$def) = @_;
+
+ chomp($prompt);
+
+ my %list;
+ @list{@$def} = ();
+
+MASK:
+ while(1) {
+   my $bad = 0;
+   my $ans = Prompt($prompt) or last;
+
+   if($ans eq '*') {
+     %list = ();
+     next;
+   }
+
+   if($ans eq '=') {
+     print "\n",( %list ? join("\n", sort keys %list) : 'none'),"\n\n";
+     next;
+   }
+
+   unless ($ans =~ m{^\s*(?:(-?\s*)(\d+(?:\.\d+){0,3})/(\d+))}) {
+     warn "Bad netmask '$ans'\n";
+     next;
+   }
+
+   my($remove,$bits,@ip) = ($1,$3,split(/\./, $2),0,0,0);
+   if ( $ip[0] < 1 || $bits < 1 || $bits > 32) {
+     warn "Bad netmask '$ans'\n";
+     next MASK;
+   }
+   foreach my $byte (@ip) {
+     if ( $byte > 255 ) {
+       warn "Bad netmask '$ans'\n";
+       next MASK;
+     }
+   } 
+
+   my $mask = sprintf("%d.%d.%d.%d/%d",@ip[0..3],$bits); 
+
+   if ($remove) {
+     delete $list{$mask};
+   }
+   else {
+     $list{$mask} = 1;
+   }
+
+  }
+
+ [ keys %list ];
+}
+
+##
+##
+##
+
+sub default_hostname
+{
+ my $host;
+ my @host;
+
+ foreach $host (@_)
+  {
+   if(defined($host) && valid_host($host))
+    {
+     return $host
+	unless wantarray;
+     push(@host,$host);
+    }
+  }
+
+ return wantarray ? @host : undef;
+}
+
+##
+##
+##
+
+getopts('dcho:i:');
+
+$libnet_cfg_in = "libnet.cfg"
+	unless(defined($libnet_cfg_in  = $opt_i));
+
+$libnet_cfg_out = "libnet.cfg"
+	unless(defined($libnet_cfg_out = $opt_o));
+
+my %oldcfg = ();
+
+$Net::Config::CONFIGURE = 1; # Suppress load of user overrides
+if( -f $libnet_cfg_in )
+ {
+  %oldcfg = ( %{ do $libnet_cfg_in } );
+ }
+elsif (eval { require Net::Config }) 
+ {
+  $have_old = 1;
+  %oldcfg = %Net::Config::NetConfig;
+ }
+
+map { $cfg{lc $_} = $cfg{$_}; delete $cfg{$_} if /[A-Z]/ } keys %cfg;
+
+#---------------------------------------------------------------------------
+
+if ($opt_h) {
+ print <<EOU;
+$0: Usage: $0 [-c] [-d] [-i oldconfigile] [-o newconfigfile] [-h]
+Without options, the old configuration is shown.
+
+   -c change the configuration
+   -d use defaults from the old config (implies -c, non-interactive)
+   -i use a specific file as the old config file
+   -o use a specific file as the new config file
+   -h show this help
+
+The default name of the old configuration file is by default
+"libnet.cfg", unless otherwise specified using the -i option,
+C<-i oldfile>, and it is searched first from the current directory,
+and then from your module path.
+
+The default name of the new configuration file is "libnet.cfg", and by
+default it is written to the current directory, unless otherwise
+specified using the -o option.
+
+EOU
+ exit(0);
+}
+
+#---------------------------------------------------------------------------
+
+{
+   my $oldcfgfile;
+   my @inc;
+   push @inc, $ENV{PERL5LIB} if exists $ENV{PERL5LIB};
+   push @inc, $ENV{PERLLIB}  if exists $ENV{PERLLIB};
+   push @inc, @INC;
+   for (@inc) {
+    my $trycfgfile = File::Spec->catfile($_, $libnet_cfg_in);
+    if (-f $trycfgfile && -r $trycfgfile) {
+     $oldcfgfile = $trycfgfile;
+     last;
+    }
+   }
+   print "# old config $oldcfgfile\n" if defined $oldcfgfile;
+   for (sort keys %oldcfg) {
+	printf "%-20s %s\n", $_,
+               ref $oldcfg{$_} ? @{$oldcfg{$_}} : $oldcfg{$_};
+   }
+   unless ($opt_c || $opt_d) {
+    print "# $0 -h for help\n";
+    exit(0);
+   }
+}
+
+#---------------------------------------------------------------------------
+
+$oldcfg{'test_exist'} = 1 unless exists $oldcfg{'test_exist'};
+$oldcfg{'test_hosts'} = 1 unless exists $oldcfg{'test_hosts'};
+
+#---------------------------------------------------------------------------
+
+if($have_old && !$opt_d)
+ {
+  $msg = <<EDQ;
+
+Ah, I see you already have installed libnet before.
+
+Do you want to modify/update your configuration (y|n) ?
+EDQ
+
+ $opt_d = 1
+	unless get_bool($msg,0);
+ }
+
+#---------------------------------------------------------------------------
+
+$msg = <<EDQ;
+
+This script will prompt you to enter hostnames that can be used as
+defaults for some of the modules in the libnet distribution.
+
+To ensure that you do not enter an invalid hostname, I can perform a
+lookup on each hostname you enter. If your internet connection is via
+a dialup line then you may not want me to perform these lookups, as
+it will require you to be on-line.
+
+Do you want me to perform hostname lookups (y|n) ?
+EDQ
+
+$cfg{'test_exist'} = get_bool($msg, $oldcfg{'test_exist'});
+
+print <<EDQ unless $cfg{'test_exist'};
+
+*** WARNING *** WARNING *** WARNING *** WARNING *** WARNING ***
+
+OK I will not check if the hostnames you give are valid
+so be very cafeful
+
+*** WARNING *** WARNING *** WARNING *** WARNING *** WARNING ***
+EDQ
+
+
+#---------------------------------------------------------------------------
+
+print <<EDQ;
+
+The following questions all require a list of host names, separated
+with spaces. If you do not have a host available for any of the
+services, then enter a single space, followed by <CR>. To accept the
+default, hit <CR>
+
+EDQ
+
+$msg = 'Enter a list of available NNTP hosts :';
+
+$def = $oldcfg{'nntp_hosts'} ||
+	[ default_hostname($ENV{NNTPSERVER},$ENV{NEWSHOST},'news') ];
+
+$cfg{'nntp_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available SMTP hosts :';
+
+$def = $oldcfg{'smtp_hosts'} ||
+	[ default_hostname(split(/:/,$ENV{SMTPHOSTS} || ""), 'mailhost') ];
+
+$cfg{'smtp_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available POP3 hosts :';
+
+$def = $oldcfg{'pop3_hosts'} || [];
+
+$cfg{'pop3_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available SNPP hosts :';
+
+$def = $oldcfg{'snpp_hosts'} || [];
+
+$cfg{'snpp_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available PH Hosts   :'  ;
+
+$def = $oldcfg{'ph_hosts'} ||
+	[ default_hostname('dirserv') ];
+
+$cfg{'ph_hosts'}   =  get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available TIME Hosts   :'  ;
+
+$def = $oldcfg{'time_hosts'} || [];
+
+$cfg{'time_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = 'Enter a list of available DAYTIME Hosts   :'  ;
+
+$def = $oldcfg{'daytime_hosts'} || $oldcfg{'time_hosts'};
+
+$cfg{'daytime_hosts'} = get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+$msg = <<EDQ;
+
+Do you have a firewall/ftp proxy  between your machine and the internet 
+
+If you use a SOCKS firewall answer no
+
+(y|n) ?
+EDQ
+
+if(get_bool($msg,0)) {
+
+  $msg = <<'EDQ';
+What series of FTP commands do you need to send to your
+firewall to connect to an external host.
+
+user/pass     => external user & password
+fwuser/fwpass => firewall user & password
+
+0) None
+1) -----------------------
+     USER user@remote.host
+     PASS pass
+2) -----------------------
+     USER fwuser
+     PASS fwpass
+     USER user@remote.host
+     PASS pass
+3) -----------------------
+     USER fwuser
+     PASS fwpass
+     SITE remote.site
+     USER user
+     PASS pass
+4) -----------------------
+     USER fwuser
+     PASS fwpass
+     OPEN remote.site
+     USER user
+     PASS pass
+5) -----------------------
+     USER user@fwuser@remote.site
+     PASS pass@fwpass
+6) -----------------------
+     USER fwuser@remote.site
+     PASS fwpass
+     USER user
+     PASS pass
+7) -----------------------
+     USER user@remote.host
+     PASS pass
+     AUTH fwuser
+     RESP fwpass
+
+Choice:
+EDQ
+ $def = exists $oldcfg{'ftp_firewall_type'}  ? $oldcfg{'ftp_firewall_type'} : 1;
+ $ans = Prompt($msg,$def);
+ $cfg{'ftp_firewall_type'} = 0+$ans;
+ $def = $oldcfg{'ftp_firewall'} || $ENV{FTP_FIREWALL};
+
+ $cfg{'ftp_firewall'} = get_hostname("FTP proxy hostname :", $def);
+}
+else {
+ delete $cfg{'ftp_firewall'};
+}
+
+
+#---------------------------------------------------------------------------
+
+if (defined $cfg{'ftp_firewall'})
+ {
+  print <<EDQ;
+
+By default Net::FTP assumes that it only needs to use a firewall if it
+cannot resolve the name of the host given. This only works if your DNS
+system is setup to only resolve internal hostnames. If this is not the
+case and your DNS will resolve external hostnames, then another method
+is needed. Net::Config can do this if you provide the netmasks that
+describe your internal network. Each netmask should be entered in the
+form x.x.x.x/y, for example 127.0.0.0/8 or 214.8.16.32/24
+
+EDQ
+$def = [];
+if(ref($oldcfg{'local_netmask'}))
+ {
+  $def = $oldcfg{'local_netmask'};
+   print "Your current netmasks are :\n\n\t",
+	join("\n\t",@{$def}),"\n\n";
+ }
+
+print "
+Enter one netmask at each prompt, prefix with a - to remove a netmask
+from the list, enter a '*' to clear the whole list, an '=' to show the
+current list and an empty line to continue with Configure.
+
+";
+
+  my $mask = get_netmask("netmask :",$def);
+  $cfg{'local_netmask'} = $mask if ref($mask) && @$mask;
+ }
+
+#---------------------------------------------------------------------------
+
+###$msg =<<EDQ;
+###
+###SOCKS is a commonly used firewall protocol. If you use SOCKS firewalls
+###then enter a list of hostames
+###
+###Enter a list of available SOCKS hosts :
+###EDQ
+###
+###$def = $cfg{'socks_hosts'} ||
+###	[ default_hostname($ENV{SOCKS5_SERVER},
+###			   $ENV{SOCKS_SERVER},
+###			   $ENV{SOCKS4_SERVER}) ];
+###
+###$cfg{'socks_hosts'}   =  get_host_list($msg,$def);
+
+#---------------------------------------------------------------------------
+
+print <<EDQ;
+
+Normally when FTP needs a data connection the client tells the server
+a port to connect to, and the server initiates a connection to the client.
+
+Some setups, in particular firewall setups, can/do not work using this
+protocol. In these situations the client must make the connection to the
+server, this is called a passive transfer.
+EDQ
+
+if (defined $cfg{'ftp_firewall'}) {
+  $msg = "\nShould all FTP connections via a firewall/proxy be passive (y|n) ?";
+
+  $def = $oldcfg{'ftp_ext_passive'} || 0;
+
+  $cfg{'ftp_ext_passive'} = get_bool($msg,$def);
+
+  $msg = "\nShould all other FTP connections be passive (y|n) ?";
+
+}
+else {
+  $msg = "\nShould all FTP connections be passive (y|n) ?";
+}
+
+$def = $oldcfg{'ftp_int_passive'} || 0;
+
+$cfg{'ftp_int_passive'} = get_bool($msg,$def);
+
+
+#---------------------------------------------------------------------------
+
+$def = $oldcfg{'inet_domain'} || $ENV{LOCALDOMAIN};
+
+$ans = Prompt("\nWhat is your local internet domain name :",$def);
+
+$cfg{'inet_domain'} = ($ans =~ /(\S+)/)[0];
+
+#---------------------------------------------------------------------------
+
+$msg = <<EDQ;
+
+If you specified some default hosts above, it is possible for me to
+do some basic tests when you run 'make test'
+
+This will cause 'make test' to be quite a bit slower and, if your
+internet connection is via dialup, will require you to be on-line
+unless the hosts are local.
+
+Do you want me to run these tests (y|n) ?
+EDQ
+
+$cfg{'test_hosts'} = get_bool($msg,$oldcfg{'test_hosts'});
+
+#---------------------------------------------------------------------------
+
+$msg = <<EDQ;
+
+To allow Net::FTP to be tested I will need a hostname. This host
+should allow anonymous access and have a /pub directory
+
+What host can I use :
+EDQ
+
+$cfg{'ftp_testhost'} = get_hostname($msg,$oldcfg{'ftp_testhost'})
+	if $cfg{'test_hosts'};
+
+
+print "\n";
+
+#---------------------------------------------------------------------------
+
+my $fh = IO::File->new($libnet_cfg_out, "w") or
+	die "Cannot create '$libnet_cfg_out': $!";
+
+print "Writing $libnet_cfg_out\n";
+
+print $fh "{\n";
+
+my $key;
+foreach $key (keys %cfg) {
+    my $val = $cfg{$key};
+    if(!defined($val)) {
+	$val = "undef";
+    }
+    elsif(ref($val)) {
+	$val = '[' . join(",",
+	    map {
+		my $v = "undef";
+		if(defined $_) {
+		    ($v = $_) =~ s/'/\'/sog;
+		    $v = "'" . $v . "'";
+		}
+		$v;
+	    } @$val ) . ']';
+    }
+    else {
+	$val =~ s/'/\'/sog;
+	$val = "'" . $val . "'" if $val =~ /\D/;
+    }
+    print $fh "\t'",$key,"' => ",$val,",\n";
+}
+
+print $fh "}\n";
+
+$fh->close;
+
+############################################################################
+############################################################################
+
+exit 0;
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libpthread-2.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/libpthread-2.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mingwm10.dll b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mingwm10.dll
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/minidumper.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/minidumper.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mintty.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mintty.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkdir.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkdir.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkfifo.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkfifo.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkgroup.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mkgroup.exe
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index 00000000..13fa83ef
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mknod.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/mknod.exe
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index 00000000..62d3cc20
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index 00000000..95c75675
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index 00000000..5b39c746
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index 00000000..e1c1e763
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index 00000000..bf8afcbf
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index 00000000..5e874539
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index 00000000..4714cb3d
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index 00000000..a82b51e5
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index 00000000..015e1cf4
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index 00000000..86a85659
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index 00000000..689cc5c2
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index 00000000..c91918e4
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index 00000000..01fda106
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/passwd.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/passwd.exe
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index 00000000..b516df4a
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/paste.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/paste.exe
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index 00000000..a62ed638
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pathchk.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pathchk.exe
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index 00000000..f1618c4c
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/peflags.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/peflags.exe
new file mode 100644
index 00000000..f45ed504
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/peflagsall b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/peflagsall
new file mode 100644
index 00000000..62b9eabe
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/peflagsall
@@ -0,0 +1,354 @@
+#!/bin/ash
+
+#
+# Copyright (c) 2009,2011 Charles Wilson
+# Based on rebaseall by Jason Tishler
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+# See the COPYING file for full license information.
+
+# Define constants
+tp1=${0%/*}
+tp2=${tp1:-.}
+PATH=$(cd $tp2 && pwd):/usr/bin:/bin
+
+ProgramName=${0##*/}
+ProgramOptions='p:d:t:s:T:knvh'
+DefaultExtraArgs=
+DefaultTSAware=1
+DefaultDynBase=0
+DefaultKeep=
+DefaultDoNothing=
+DefaultVerbose=
+DefaultFileList=
+DefaultSuffixes='exe|dll|so|oct'
+
+# Define functions
+usage_string="usage: $ProgramName [-p extra_args] [-d bool] [-t bool] [-s suffix] [-T FileList | -] [-vnh]"
+short_usage ()
+{
+    echo "$usage_string" 1>&2
+    exit 1
+}
+
+long_help ()
+{
+    echo "$usage_string"
+    echo "When invoked with no arguments, $ProgramName modifies every cygwin $DefaultSuffixes"
+    echo "on the system: .exe files have their tsaware flag set, while .dll, .so and .oct"
+    echo "files have their dynamicbase flag removed. However, if any of [-d|-t|-s] are"
+    echo "specified then ONLY the actions so specified will occur."
+    echo "   -p extra_args   pass extra_args to peflags.exe"  
+    echo "   -d bool         set the dynamicbase flag to 'bool' on all specified files"
+    echo "   -t bool         set the tsaware flag to 'bool' on all specified files"
+    echo "   -s suffix       search for all files with the specified suffix(es)"
+    echo "                     default: 'exe|dll|so|oct'"
+    echo "   -T FileList     in addition to files located via the normal search and"
+    echo "                   suffix list, also operate on files listed in FileList"
+    echo "                   May be '-' which indicates stdin"
+    echo "   -n              do not modify any files, but display the peflags commands"
+    echo "   -k              keep all temporary files"
+    echo "   -v              verbose mode"
+    echo "   -h              show this help"
+    echo "bool may be '0', '1', 'true', 'false', 'yes', or 'no'"
+    echo "Note: peflagsall will NOT set the dynamicbase flag on executables, nor will"
+    echo "      it set the tsaware flag on dlls. If you must do this, use peflags itself"
+    exit 0
+}
+
+check_args_for_help()
+{
+    # we do this early, so that we can print help before
+    # the process-check.
+    for a in "$@"
+    do
+        case "$a" in
+        "--help"|"-help"|"-h") long_help ;;
+        esac
+    done
+}
+
+to_bool_result=
+to_bool()
+{
+    case "$1" in
+    [Tt][Rr][Uu][Ee]     ) to_bool_result=1;;
+    [Ff][Aa][Ll][Ss][Ee] ) to_bool_result=0;;
+    [Yy][Ee][Ss]         ) to_bool_result=1;;
+    [Nn][Oo]             ) to_bool_result=0;;
+    [Yy]                 ) to_bool_result=1;;
+    [Nn]                 ) to_bool_result=0;;
+    1|0                  ) to_bool_result=$1;;
+    *) echo "Bad bool argument '$1'" 1>&2
+       short_usage
+       exit 1
+    esac
+}
+
+cleanup()
+{
+    if test -z "$Keep"
+    then
+    	rm -f "$TmpFile" "$ExeFile" "$DllFile"
+    else
+        echo "Saving temp files '$TmpDir/peflags_*' (may not exist)" 1>&2
+    fi
+    exit $ExitCode
+}
+
+verbose_only()
+{
+    if test -n "$Verbose"
+    then
+        echo "$@" 1>&2
+    fi
+}
+
+# Set traps
+trap cleanup 1 2 15
+
+# Set defaults
+ExtraArgs=$DefaultExtraArgs
+TSAware=$DefaultTSAware
+DynBase=$DefaultDynBase
+Keep=$DefaultKeep
+DoNothing=$DefaultDoNothing
+Verbose=$DefaultVerbose
+FileList=$DefaultFileList
+Suffixes=$DefaultSuffixes
+
+# Argument accumulators
+ArgSuffixes=
+ArgTSAware=
+ArgDynBase=
+
+# First see if caller requested help
+check_args_for_help "$@"
+
+# Determine platform
+Platform=`uname -s`
+case $Platform in
+ *MINGW*  | *mingw*  ) Platform=mingw  ;;
+ *CYGWIN* | *cygwin* ) Platform=cygwin ;;
+ *MSYS*   | *msys*   ) Platform=msys   ;;
+ * )
+    echo "Unsupported platform: $Platform" 1>&2
+    exit 1
+    ;;
+esac
+
+# Verify only ash or dash processes are running
+ProcessResult=0
+case $Platform in
+  mingw|msys )
+    /bin/ps -s | /bin/gawk '\
+      # Count number of running ash or dash. \
+      /\/bin\/(d)?ash(\.exe)?$/{ ash_cnt++; } \
+      # Count number of ps and gawk. \
+      /\/bin\/ps(\.exe)?$/{ cnt++; } \
+      /\/bin\/gawk(\.exe)?$/{ cnt++; } \
+      END{ \
+        # Uncomment for testing: \
+        # printf "TOTAL: %d CNT: %d ASH_CNT: %d\n", NR, cnt, ash_cnt; \
+        # Only one of ps and gawk each may run. \
+        if (cnt > 2) \
+          exit 0; \
+        # The total number of allowed processes is one less than the \
+        # number of input lines.  The extra line is the ps header output. \
+        if (NR - cnt - ash_cnt > 1) \
+          exit 0; \
+        # All is well. \
+        exit 1; \
+      }'
+    ProcessResult=$?
+    ;;
+  cygwin )
+    grep -E -q -i -v '/d?ash(.exe)?$' /proc/[0-9]*/exename
+    ProcessResult=$?
+    ;;
+esac
+if [ $ProcessResult -eq 0 -a -z "$RebaseDebug" ]
+then
+    echo "$ProgramName: only ash or dash processes are allowed during this process."
+    echo "    Exit all Cygwin processes and stop all Cygwin services."
+    echo "    Execute ash (or dash) from Start/Run... or a cmd or command window."
+    echo "    Execute '/bin/peflagsall' from ash (or dash)."
+    exit 2
+fi
+
+# Parse command line arguments
+while getopts $ProgramOptions Option "$@"
+do
+    case $Option in
+    p)  ExtraArgs="$OPTARG";;
+    d)  to_bool "$OPTARG"; ArgDynBase=$to_bool_result;;
+    t)  to_bool "$OPTARG"; ArgTSAware=$to_bool_result;;
+    s)
+	if test -z "$ArgSuffixes"
+        then
+		ArgSuffixes="$OPTARG"
+	else
+		ArgSuffixes="$ArgSuffixes|$OPTARG"
+	fi
+	;;
+    n)  DoNothing=:;;
+    k)  Keep=1;;
+    T)  FileList="$OPTARG";;
+    v)  Verbose=-v;;
+    h)  long_help;;
+    \?) short_usage;;
+    esac
+done
+
+# Evaluate command line arguments
+if test -n "$ArgSuffixes" || test -n "$ArgDynBase" || test -n "$ArgTSAware"
+then
+    echo "Using custom arguments; all default behavior suppressed" 1>&2
+    Suffixes="$ArgSuffixes"
+    DynBase="$ArgDynBase"
+    TSAware="$ArgTSAware"
+fi
+if test -z "$Suffixes"
+then
+    echo "Error: must specify suffixes (-s) when default behavior is suppressed" 1>&2
+    short_usage
+fi
+
+
+# Set temp directory
+TmpDir="${TMP:-${TEMP:-/tmp}}"
+
+# Validate temp directory
+if [ ! -d "$TmpDir" ]
+then
+    echo "$ProgramName: '$TmpDir' is not a directory" 1>&2
+    exit 2
+fi
+if [ ! -w "$TmpDir" ]
+then
+    echo "$ProgramName: '$TmpDir' is not writable" 1>&2
+    exit 2
+fi
+
+# Validate user supplied file list, if necessary
+if [ -n "$FileList" -a ! -r "$FileList" -a "$FileList" != - ]
+then
+    echo "$ProgramName: '$FileList' is not readable" 1>&2
+    exit 2
+fi
+
+# Set temp files
+TmpFile="$TmpDir/peflags.lst"
+ExeFile="$TmpDir/peflags_exe.lst"
+DllFile="$TmpDir/peflags_dll.lst"
+
+# Create file list
+case $Platform in
+  cygwin)
+    find /etc/setup -name '*.lst.gz' | xargs gzip -d -c |
+      grep -E "\.($Suffixes)\$" |
+      sed -e '/cygwin1\.dll$/d' -e '/cyglsa.*\.dll$/d' \
+          -e '/sys-root\/mingw/d' -e 's/^/\//' \
+          -e '/d?ash\.exe$/d' -e '/peflags\.exe$/d' >"${TmpFile}"
+    ;;
+  msys)
+    for f in /bin /lib
+    do
+      find $f -type f |
+        grep -E "\.($Suffixes)\$" |
+        sed -e '/msys-1\.0.*\.dll$/d' -e '/cygwin1\.dll$/d' \
+            -e '/cyglsa.*\.dll$/d' -e '/d?ash\.exe$/d' \
+            -e '/peflags\.exe$/d' >>"$TmpFile"
+    done
+    ;;
+  mingw) ;; # no automatic files; only command line
+esac
+
+# Append user supplied file list, if any
+if [ -n "$FileList" ]
+then
+    cat "$FileList" >>"$TmpFile"
+fi
+
+# Split file list into two groups: exe's, and everything else
+# (presumably, DLLs by any name).
+sed -n -e '/\.[Ee][Xx][Ee]$/p' < "$TmpFile" > "$ExeFile"
+sed    -e '/\.[Ee][Xx][Ee]$/d' < "$TmpFile" > "$DllFile"
+NumExes=`cat "$ExeFile" | sed -n '$='`
+NumDlls=`cat "$DllFile" | sed -n '$='`
+
+# Prepare to do exes
+DoExes=
+TSAwareCmd="--tsaware=$TSAware"
+if test -n "$NumExes" && test "$NumExes" -gt 0
+then
+    if test -n "$TSAware" || test -n "$ExtraArgs"
+    then
+       DoExes=1
+       if test -z "$TSAware"
+       then
+           TSAwareCmd=
+       fi
+    else
+       verbose_only "Not processing $NumExes executables; neither -t nor -p specified"
+    fi
+else
+    verbose_only "No executable files to process"
+fi
+
+# Prepare to do dlls
+DoDlls=
+DynBaseCmd="--dynamicbase=$DynBase"
+if test -n "$NumDlls" && test "$NumDlls" -gt 0
+then
+    if test -n "$DynBase" || test -n "$ExtraArgs"
+    then
+       DoDlls=1
+       if test -z "$DynBase"
+       then
+           DynBaseCmd=
+       fi
+    else
+       verbose_only "Not processing $NumDlls dlls; neither -d nor -p specified"
+    fi
+else
+    verbose_only "No dlls to process"
+fi
+
+if test -n "$DoExes"
+then
+    if test -n "$DoNothing" || test -n "$Verbose"
+    then
+        echo "peflags $Verbose $ExtraArgs $TSAwareCmd -T $ExeFile" 1>&2
+    fi
+    $DoNothing peflags $Verbose $ExtraArgs $TSAwareCmd -T "$ExeFile"
+fi
+ExitCode=$?
+
+if test "$ExitCode" -eq 0
+    then
+    if test -n "$DoDlls" ; then
+        if test -n "$DoNothing" || test -n "$Verbose"
+        then
+            echo "peflags $Verbose $ExtraArgs $DynBaseCmd -T $DllFile" 1>&2
+        fi
+        $DoNothing peflags $Verbose $ExtraArgs $DynBaseCmd -T "$DllFile"
+    fi
+    ExitCode=$?
+fi
+
+# Clean up
+cleanup
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl.exe
new file mode 100644
index 00000000..84b09bd1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl5.22.2.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl5.22.2.exe
new file mode 100644
index 00000000..84b09bd1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perl5.22.2.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlbug b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlbug
new file mode 100644
index 00000000..086e7e79
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlbug
@@ -0,0 +1,1514 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+my $config_tag1 = '5.22.2 - Sat Apr 30 15:59:30 CEST 2016';
+
+my $patchlevel_date = 1460309636;
+my @patches = Config::local_patches();
+my $patch_tags = join "", map /(\S+)/ ? "+$1 " : (), @patches;
+
+use warnings;
+use strict;
+use Config;
+use File::Spec;		# keep perlbug Perl 5.005 compatible
+use Getopt::Std;
+use File::Basename 'basename';
+
+sub paraprint;
+
+BEGIN {
+    eval { require Mail::Send;};
+    $::HaveSend = ($@ eq "");
+    eval { require Mail::Util; } ;
+    $::HaveUtil = ($@ eq "");
+    # use secure tempfiles wherever possible
+    eval { require File::Temp; };
+    $::HaveTemp = ($@ eq "");
+    eval { require Module::CoreList; };
+    $::HaveCoreList = ($@ eq "");
+};
+
+my $Version = "1.40";
+
+#TODO:
+#       make sure failure (transmission-wise) of Mail::Send is accounted for.
+#       (This may work now. Unsure of the original author's issue -JESSE 2008-06-08)
+#       - Test -b option
+
+my( $file, $usefile, $cc, $address, $bugaddress, $testaddress, $thanksaddress,
+    $filename, $messageid, $domain, $subject, $from, $verbose, $ed, $outfile,
+    $fh, $me, $body, $andcc, %REP, $ok, $thanks, $progname,
+    $Is_MSWin32, $Is_Linux, $Is_VMS, $Is_OpenBSD,
+    $report_about_module, $category, $severity,
+    %opt, $have_attachment, $attachments, $has_patch, $mime_boundary
+);
+
+my $perl_version = $^V ? sprintf("%vd", $^V) : $];
+
+my $config_tag2 = "$perl_version - $Config{cf_time}";
+
+Init();
+
+if ($opt{h}) { Help(); exit; }
+if ($opt{d}) { Dump(*STDOUT); exit; }
+if (!-t STDIN && !($ok and not $opt{n})) {
+    paraprint <<"EOF";
+Please use $progname interactively. If you want to
+include a file, you can use the -f switch.
+EOF
+    die "\n";
+}
+
+Query();
+Edit() unless $usefile || ($ok and not $opt{n});
+NowWhat();
+if ($outfile) {
+    save_message_to_disk($outfile);
+} else {
+    Send();
+    if ($thanks) {
+	print "\nThank you for taking the time to send a thank-you message!\n\n";
+
+	paraprint <<EOF
+Please note that mailing lists are moderated, your message may take a while to
+show up.
+EOF
+    } else {
+	print "\nThank you for taking the time to file a bug report!\n\n";
+
+	paraprint <<EOF
+Please note that mailing lists are moderated, your message may take a while to
+show up. If you do not receive an automated response acknowledging your message
+within a few hours (check your SPAM folder and outgoing mail) please consider
+sending an email directly from your mail client to perlbug\@perl.org.
+EOF
+    }
+
+}
+
+exit;
+
+sub ask_for_alternatives { # (category|severity)
+    my $name = shift;
+    my %alts = (
+	'category' => {
+	    'default' => 'core',
+	    'ok'      => 'install',
+	    # Inevitably some of these will end up in RT whatever we do:
+	    'thanks'  => 'thanks',
+	    'opts'    => [qw(core docs install library utilities)], # patch, notabug
+	},
+	'severity' => {
+	    'default' => 'low',
+	    'ok'      => 'none',
+	    'thanks'  => 'none',
+	    'opts'    => [qw(critical high medium low wishlist none)], # zero
+	},
+    );
+    die "Invalid alternative ($name) requested\n" unless grep(/^$name$/, keys %alts);
+    my $alt = "";
+    my $what = $ok || $thanks;
+    if ($what) {
+	$alt = $alts{$name}{$what};
+    } else {
+ 	my @alts = @{$alts{$name}{'opts'}};
+    print "\n\n";
+	paraprint <<EOF;
+Please pick a $name from the following list:
+
+    @alts
+EOF
+	my $err = 0;
+	do {
+	    if ($err++ > 5) {
+		die "Invalid $name: aborting.\n";
+	    }
+        $alt = _prompt('', "\u$name", $alts{$name}{'default'});
+		$alt ||= $alts{$name}{'default'};
+	} while !((($alt) = grep(/^$alt/i, @alts)));
+    }
+    lc $alt;
+}
+
+sub Init {
+    # -------- Setup --------
+
+    $Is_MSWin32 = $^O eq 'MSWin32';
+    $Is_VMS = $^O eq 'VMS';
+    $Is_Linux = lc($^O) eq 'linux';
+    $Is_OpenBSD = lc($^O) eq 'openbsd';
+
+    if (!getopts("Adhva:s:b:f:F:r:e:SCc:to:n:T:p:", \%opt)) { Help(); exit; };
+
+    # This comment is needed to notify metaconfig that we are
+    # using the $perladmin, $cf_by, and $cf_time definitions.
+
+    # -------- Configuration ---------
+
+    # perlbug address
+    $bugaddress = 'perlbug@perl.org';
+
+    # Test address
+    $testaddress = 'perlbug-test@perl.org';
+
+    # Thanks address
+    $thanksaddress = 'perl-thanks@perl.org';
+
+    if (basename ($0) =~ /^perlthanks/i) {
+	# invoked as perlthanks
+	$opt{T} = 1;
+	$opt{C} = 1; # don't send a copy to the local admin
+    }
+
+    if ($opt{T}) {
+	$thanks = 'thanks';
+    }
+    
+    $progname = $thanks ? 'perlthanks' : 'perlbug';
+    # Target address
+    $address = $opt{a} || ($opt{t} ? $testaddress
+			    : $thanks ? $thanksaddress : $bugaddress);
+
+    # Users address, used in message and in From and Reply-To headers
+    $from = $opt{r} || "";
+
+    # Include verbose configuration information
+    $verbose = $opt{v} || 0;
+
+    # Subject of bug-report message
+    $subject = $opt{s} || "";
+
+    # Send a file
+    $usefile = ($opt{f} || 0);
+
+    # File to send as report
+    $file = $opt{f} || "";
+
+    # We have one or more attachments
+    $have_attachment = ($opt{p} || 0);
+    $mime_boundary = ('-' x 12) . "$Version.perlbug" if $have_attachment;
+
+    # Comma-separated list of attachments
+    $attachments = $opt{p} || "";
+    $has_patch = 0; # TBD based on file type
+
+    for my $attachment (split /\s*,\s*/, $attachments) {
+        unless (-f $attachment && -r $attachment) {
+            die "The attachment $attachment is not a readable file: $!\n";
+        }
+        $has_patch = 1 if $attachment =~ m/\.(patch|diff)$/;
+    }
+
+    # File to output to
+    $outfile = $opt{F} || "";
+
+    # Body of report
+    $body = $opt{b} || "";
+	
+    # Editor
+    $ed = $opt{e} || $ENV{VISUAL} || $ENV{EDITOR} || $ENV{EDIT}
+	|| ($Is_VMS && "edit/tpu")
+	|| ($Is_MSWin32 && "notepad")
+	|| "vi";
+
+    # Not OK - provide build failure template by finessing OK report
+    if ($opt{n}) {
+	if (substr($opt{n}, 0, 2) eq 'ok' )	{
+	    $opt{o} = substr($opt{n}, 1);
+	} else {
+	    Help();
+	    exit();
+	}
+    }
+
+    # OK - send "OK" report for build on this system
+    $ok = '';
+    if ($opt{o}) {
+	if ($opt{o} eq 'k' or $opt{o} eq 'kay') {
+	    my $age = time - $patchlevel_date;
+	    if ($opt{o} eq 'k' and $age > 60 * 24 * 60 * 60 ) {
+		my $date = localtime $patchlevel_date;
+		print <<"EOF";
+"perlbug -ok" and "perlbug -nok" do not report on Perl versions which
+are more than 60 days old.  This Perl version was constructed on
+$date.  If you really want to report this, use
+"perlbug -okay" or "perlbug -nokay".
+EOF
+		exit();
+	    }
+	    # force these options
+	    unless ($opt{n}) {
+		$opt{S} = 1; # don't prompt for send
+		$opt{b} = 1; # we have a body
+		$body = "Perl reported to build OK on this system.\n";
+	    }
+	    $opt{C} = 1; # don't send a copy to the local admin
+	    $opt{s} = 1; # we have a subject line
+	    $subject = ($opt{n} ? 'Not ' : '')
+		    . "OK: perl $perl_version ${patch_tags}on"
+		    ." $::Config{'archname'} $::Config{'osvers'} $subject";
+	    $ok = 'ok';
+	} else {
+	    Help();
+	    exit();
+	}
+    }
+
+    # Possible administrator addresses, in order of confidence
+    # (Note that cf_email is not mentioned to metaconfig, since
+    # we don't really want it. We'll just take it if we have to.)
+    #
+    # This has to be after the $ok stuff above because of the way
+    # that $opt{C} is forced.
+    $cc = $opt{C} ? "" : (
+	$opt{c} || $::Config{'perladmin'}
+	|| $::Config{'cf_email'} || $::Config{'cf_by'}
+    );
+
+    if ($::HaveUtil) {
+		$domain = Mail::Util::maildomain();
+    } elsif ($Is_MSWin32) {
+		$domain = $ENV{'USERDOMAIN'};
+    } else {
+		require Sys::Hostname;
+		$domain = Sys::Hostname::hostname();
+    }
+
+    # Message-Id - rjsf
+    $messageid = "<$::Config{'version'}_${$}_".time."\@$domain>"; 
+
+    # My username
+    $me = $Is_MSWin32 ? $ENV{'USERNAME'}
+	    : $^O eq 'os2' ? $ENV{'USER'} || $ENV{'LOGNAME'}
+	    : eval { getpwuid($<) };	# May be missing
+
+    $from = $::Config{'cf_email'}
+       if !$from && $::Config{'cf_email'} && $::Config{'cf_by'} && $me &&
+               ($me eq $::Config{'cf_by'});
+} # sub Init
+
+sub Query {
+    # Explain what perlbug is
+    unless ($ok) {
+	if ($thanks) {
+	    paraprint <<'EOF';
+This program provides an easy way to send a thank-you message back to the
+authors and maintainers of perl.
+
+If you wish to submit a bug report, please run it without the -T flag
+(or run the program perlbug rather than perlthanks)
+EOF
+	} else {
+	    paraprint <<"EOF";
+This program provides an easy way to create a message reporting a
+bug in the core perl distribution (along with tests or patches)
+to the volunteers who maintain perl at $address.  To send a thank-you
+note to $thanksaddress instead of a bug report, please run 'perlthanks'.
+
+Please do not use $0 to send test messages, test whether perl
+works, or to report bugs in perl modules from CPAN.
+
+Suggestions for how to find help using Perl can be found at
+http://perldoc.perl.org/perlcommunity.html
+EOF
+	}
+    }
+
+    # Prompt for subject of message, if needed
+    
+    if ($subject && TrivialSubject($subject)) {
+	$subject = '';
+    }
+
+    unless ($subject) {
+	    print 
+"First of all, please provide a subject for the message.\n";
+	if ( not $thanks)  {
+	    paraprint <<EOF;
+This should be a concise description of your bug or problem
+which will help the volunteers working to improve perl to categorize
+and resolve the issue.  Be as specific and descriptive as
+you can. A subject like "perl bug" or "perl problem" will make it
+much less likely that your issue gets the attention it deserves.
+EOF
+	}
+
+	my $err = 0;
+	do {
+        $subject = _prompt('','Subject');
+	    if ($err++ == 5) {
+		if ($thanks) {
+		    $subject = 'Thanks for Perl';
+		} else {
+		    die "Aborting.\n";
+		}
+	    }
+	} while (TrivialSubject($subject));
+    }
+    $subject = '[PATCH] ' . $subject
+        if $has_patch && ($subject !~ m/^\[PATCH/i);
+
+    # Prompt for return address, if needed
+    unless ($opt{r}) {
+	# Try and guess return address
+	my $guess;
+
+	$guess = $ENV{'REPLY-TO'} || $ENV{'REPLYTO'} || $ENV{'EMAIL'}
+	    || $from || '';
+
+	unless ($guess) {
+		# move $domain to where we can use it elsewhere	
+        if ($domain) {
+		if ($Is_VMS && !$::Config{'d_socket'}) {
+		    $guess = "$domain\:\:$me";
+		} else {
+		    $guess = "$me\@$domain" if $domain;
+		}
+	    }
+	}
+
+	if ($guess) {
+	    unless ($ok) {
+		paraprint <<EOF;
+Perl's developers may need your email address to contact you for
+further information about your issue or to inform you when it is
+resolved.  If the default shown is not your email address, please
+correct it.
+EOF
+	    }
+	} else {
+	    paraprint <<EOF;
+Please enter your full internet email address so that Perl's
+developers can contact you with questions about your issue or to
+inform you that it has been resolved.
+EOF
+	}
+
+	if ($ok && $guess) {
+	    # use it
+	    $from = $guess;
+	} else {
+	    # verify it
+        $from = _prompt('','Your address',$guess);
+	    $from = $guess if $from eq '';
+	}
+    }
+
+    if ($from eq $cc or $me eq $cc) {
+	# Try not to copy ourselves
+	$cc = "yourself";
+    }
+
+    # Prompt for administrator address, unless an override was given
+    if( !$opt{C} and !$opt{c} ) {
+	my $description =  <<EOF;
+$0 can send a copy of this report to your local perl
+administrator.  If the address below is wrong, please correct it,
+or enter 'none' or 'yourself' to not send a copy.
+EOF
+	my $entry = _prompt($description, "Local perl administrator", $cc);
+
+	if ($entry ne "") {
+	    $cc = $entry;
+	    $cc = '' if $me eq $cc;
+	}
+    }
+
+    $cc = '' if $cc =~ /^(none|yourself|me|myself|ourselves)$/i;
+    if ($cc) { 
+        $andcc = " and $cc" 
+    } else {
+        $andcc = ''
+    }
+
+    # Prompt for editor, if no override is given
+editor:
+    unless ($opt{e} || $opt{f} || $opt{b}) {
+
+    my $description;
+
+	chomp (my $common_end = <<"EOF");
+You will probably want to use a text editor to enter the body of
+your report. If "$ed" is the editor you want to use, then just press
+Enter, otherwise type in the name of the editor you would like to
+use.
+
+If you have already composed the body of your report, you may enter
+"file", and $0 will prompt you to enter the name of the file
+containing your report.
+EOF
+
+	if ($thanks) {
+	    $description = <<"EOF";
+It's now time to compose your thank-you message.
+
+Some information about your local perl configuration will automatically
+be included at the end of your message, because we're curious about
+the different ways that people build and use perl. If you'd rather
+not share this information, you're welcome to delete it.
+
+$common_end
+EOF
+	} else {
+	    $description =  <<"EOF";
+It's now time to compose your bug report. Try to make the report
+concise but descriptive. Please include any detail which you think
+might be relevant or might help the volunteers working to improve
+perl. If you are reporting something that does not work as you think
+it should, please try to include examples of the actual result and of
+what you expected.
+
+Some information about your local perl configuration will automatically
+be included at the end of your report. If you are using an unusual
+version of perl, it would be useful if you could confirm that you
+can replicate the problem on a standard build of perl as well.
+
+$common_end
+EOF
+	}
+
+    my $entry = _prompt($description, "Editor", $ed);
+	$usefile = 0;
+	if ($entry eq "file") {
+	    $usefile = 1;
+	} elsif ($entry ne "") {
+	    $ed = $entry;
+	}
+    }
+    if ($::HaveCoreList && !$ok && !$thanks) {
+	my $description =  <<EOF;
+If your bug is about a Perl module rather than a core language
+feature, please enter its name here. If it's not, just hit Enter
+to skip this question.
+EOF
+
+    my $entry = '';
+	while ($entry eq '') {
+        $entry = _prompt($description, 'Module');
+	    my $first_release = Module::CoreList->first_release($entry);
+	    if ($entry and not $first_release) {
+		paraprint <<EOF;
+$entry is not a "core" Perl module. Please check that you entered
+its name correctly. If it is correct, quit this program, try searching
+for $entry on http://rt.cpan.org, and report your issue there.
+EOF
+
+            $entry = '';
+	} elsif (my $bug_tracker = $Module::CoreList::bug_tracker{$entry}) {
+		paraprint <<"EOF";
+$entry included with core Perl is copied directly from the CPAN distribution.
+Please report bugs in $entry directly to its maintainers using $bug_tracker
+EOF
+            $entry = '';
+        } elsif ($entry) {
+	        $category ||= 'library';
+	        $report_about_module = $entry;
+            last;
+        } else {
+            last;
+        }
+	}
+    }
+
+    # Prompt for category of bug
+    $category ||= ask_for_alternatives('category');
+
+    # Prompt for severity of bug
+    $severity ||= ask_for_alternatives('severity');
+
+    # Generate scratch file to edit report in
+    $filename = filename();
+
+    # Prompt for file to read report from, if needed
+    if ($usefile and !$file) {
+filename:
+	my $description = <<EOF;
+What is the name of the file that contains your report?
+EOF
+	my $entry = _prompt($description, "Filename");
+
+	if ($entry eq "") {
+	    paraprint <<EOF;
+It seems you didn't enter a filename. Please choose to use a text
+editor or enter a filename.
+EOF
+	    goto editor;
+	}
+
+	unless (-f $entry and -r $entry) {
+	    paraprint <<EOF;
+'$entry' doesn't seem to be a readable file.  You may have mistyped
+its name or may not have permission to read it.
+
+If you don't want to use a file as the content of your report, just
+hit Enter and you'll be able to select a text editor instead.
+EOF
+	    goto filename;
+	}
+	$file = $entry;
+    }
+
+    # Generate report
+    open(REP, '>:raw', $filename) or die "Unable to create report file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+
+    my $reptype = !$ok ? ($thanks ? 'thank-you' : 'bug')
+	: $opt{n} ? "build failure" : "success";
+
+    print REP <<EOF;
+This is a $reptype report for perl from $from,
+generated with the help of perlbug $Version running under perl $perl_version.
+
+EOF
+
+    if ($body) {
+	print REP $body;
+    } elsif ($usefile) {
+	open(F, '<:raw', $file)
+		or die "Unable to read report file from '$file': $!\n";
+	binmode(F, ':raw :crlf') if $Is_MSWin32;
+	while (<F>) {
+	    print REP $_
+	}
+	close(F) or die "Error closing '$file': $!";
+    } else {
+	if ($thanks) {
+	    print REP <<'EOF';
+
+-----------------------------------------------------------------
+[Please enter your thank-you message here]
+
+
+
+[You're welcome to delete anything below this line]
+-----------------------------------------------------------------
+EOF
+	} else {
+	    print REP <<'EOF';
+
+-----------------------------------------------------------------
+[Please describe your issue here]
+
+
+
+[Please do not change anything below this line]
+-----------------------------------------------------------------
+EOF
+	}
+    }
+    Dump(*REP);
+    close(REP) or die "Error closing report file: $!";
+
+    # Set up an initial report fingerprint so we can compare it later
+    _fingerprint_lines_in_report();
+
+} # sub Query
+
+sub Dump {
+    local(*OUT) = @_;
+
+    # these won't have been set if run with -d
+    $category ||= 'core';
+    $severity ||= 'low';
+
+    print OUT <<EFF;
+---
+Flags:
+    category=$category
+    severity=$severity
+EFF
+
+    if ($has_patch) {
+        print OUT <<EFF;
+    Type=Patch
+    PatchStatus=HasPatch
+EFF
+    }
+
+    if ($report_about_module ) { 
+        print OUT <<EFF;
+    module=$report_about_module
+EFF
+    }
+    if ($opt{A}) {
+	print OUT <<EFF;
+    ack=no
+EFF
+    }
+    print OUT <<EFF;
+---
+EFF
+    print OUT "This perlbug was built using Perl $config_tag1\n",
+	    "It is being executed now by  Perl $config_tag2.\n\n"
+	if $config_tag2 ne $config_tag1;
+
+    print OUT <<EOF;
+Site configuration information for perl $perl_version:
+
+EOF
+    if ($::Config{cf_by} and $::Config{cf_time}) {
+	print OUT "Configured by $::Config{cf_by} at $::Config{cf_time}.\n\n";
+    }
+    print OUT Config::myconfig;
+
+    if (@patches) {
+	print OUT join "\n    ", "Locally applied patches:", @patches;
+	print OUT "\n";
+    };
+
+    print OUT <<EOF;
+
+---
+\@INC for perl $perl_version:
+EOF
+    for my $i (@INC) {
+	print OUT "    $i\n";
+    }
+
+    print OUT <<EOF;
+
+---
+Environment for perl $perl_version:
+EOF
+    my @env =
+        qw(PATH LD_LIBRARY_PATH LANG PERL_BADLANG SHELL HOME LOGDIR LANGUAGE);
+    push @env, $Config{ldlibpthname} if $Config{ldlibpthname} ne '';
+    push @env, grep /^(?:PERL|LC_|LANG|CYGWIN)/, keys %ENV;
+    my %env;
+    @env{@env} = @env;
+    for my $env (sort keys %env) {
+	print OUT "    $env",
+		exists $ENV{$env} ? "=$ENV{$env}" : ' (unset)',
+		"\n";
+    }
+    if ($verbose) {
+	print OUT "\nComplete configuration data for perl $perl_version:\n\n";
+	my $value;
+	foreach (sort keys %::Config) {
+	    $value = $::Config{$_};
+	    $value = '' unless defined $value;
+	    $value =~ s/'/\\'/g;
+	    print OUT "$_='$value'\n";
+	}
+    }
+} # sub Dump
+
+sub Edit {
+    # Edit the report
+    if ($usefile || $body) {
+	my $description = "Please make sure that the name of the editor you want to use is correct.";
+	my $entry = _prompt($description, 'Editor', $ed);
+	$ed = $entry unless $entry eq '';
+    }
+
+    _edit_file($ed);
+}
+
+sub _edit_file {
+    my $editor = shift;
+
+    my $report_written = 0;
+
+    while ( !$report_written ) {
+        my $exit_status = system("$editor $filename");
+        if ($exit_status) {
+            my $desc = <<EOF;
+The editor you chose ('$editor') could not be run!
+
+If you mistyped its name, please enter it now, otherwise just press Enter.
+EOF
+            my $entry = _prompt( $desc, 'Editor', $editor );
+            if ( $entry ne "" ) {
+                $editor = $entry;
+                next;
+            } else {
+                paraprint <<EOF;
+You may want to save your report to a file, so you can edit and
+mail it later.
+EOF
+                return;
+            }
+        }
+        return if ( $ok and not $opt{n} ) || $body;
+
+        # Check that we have a report that has some, eh, report in it.
+
+        unless ( _fingerprint_lines_in_report() ) {
+            my $description = <<EOF;
+It looks like you didn't enter a report. You may [r]etry your edit
+or [c]ancel this report.
+EOF
+            my $action = _prompt( $description, "Action (Retry/Cancel) " );
+            if ( $action =~ /^[re]/i ) {    # <R>etry <E>dit
+                next;
+            } elsif ( $action =~ /^[cq]/i ) {    # <C>ancel, <Q>uit
+                Cancel();                        # cancel exits
+            }
+        }
+        # Ok. the user did what they needed to;
+        return;
+
+    }
+}
+
+
+sub Cancel {
+    1 while unlink($filename);  # remove all versions under VMS
+    print "\nQuitting without sending your message.\n";
+    exit(0);
+}
+
+sub NowWhat {
+    # Report is done, prompt for further action
+    if( !$opt{S} ) {
+	while(1) {
+	    my $menu = <<EOF;
+
+
+You have finished composing your message. At this point, you have 
+a few options. You can:
+
+    * [Se]nd the message to $address$andcc, 
+    * [D]isplay the message on the screen,
+    * [R]e-edit the message
+    * Display or change the message's [su]bject
+    * Save the message to a [f]ile to mail at another time
+    * [Q]uit without sending a message
+
+EOF
+      retry:
+        print $menu;
+	    my $action =  _prompt('', "Action (Send/Display/Edit/Subject/Save to File)");;
+        print "\n";
+	    if ($action =~ /^(f|sa)/i) { # <F>ile/<Sa>ve
+            if ( SaveMessage() ) { exit }
+	    } elsif ($action =~ /^(d|l|sh)/i ) { # <D>isplay, <L>ist, <Sh>ow
+		# Display the message
+		open(REP, '<:raw', $filename) or die "Couldn't open file '$filename': $!\n";
+		binmode(REP, ':raw :crlf') if $Is_MSWin32;
+		while (<REP>) { print $_ }
+		close(REP) or die "Error closing report file '$filename': $!";
+		if ($have_attachment) {
+		    print "\n\n---\nAttachment(s):\n";
+		    for my $att (split /\s*,\s*/, $attachments) { print "    $att\n"; }
+		}
+	    } elsif ($action =~ /^su/i) { # <Su>bject
+		my $reply = _prompt( "Subject: $subject", "If the above subject is fine, press Enter. Otherwise, type a replacement now\nSubject");
+		if ($reply ne '') {
+		    unless (TrivialSubject($reply)) {
+			$subject = $reply;
+			print "Subject: $subject\n";
+		    }
+		}
+	    } elsif ($action =~ /^se/i) { # <S>end
+		# Send the message
+		my $reply =  _prompt( "Are you certain you want to send this message?", 'Please type "yes" if you are','no');
+		if ($reply =~ /^yes$/) {
+		    last;
+		} else {
+		    paraprint <<EOF;
+You didn't type "yes", so your message has not yet been sent.
+EOF
+		}
+	    } elsif ($action =~ /^[er]/i) { # <E>dit, <R>e-edit
+		# edit the message
+		Edit();
+	    } elsif ($action =~ /^[qc]/i) { # <C>ancel, <Q>uit
+		Cancel();
+	    } elsif ($action =~ /^s/i) {
+		paraprint <<EOF;
+The command you entered was ambiguous. Please type "send", "save" or "subject".
+EOF
+	    }
+	}
+    }
+} # sub NowWhat
+
+sub TrivialSubject {
+    my $subject = shift;
+    if ($subject =~
+	/^(y(es)?|no?|help|perl( (bug|problem))?|bug|problem)$/i ||
+	length($subject) < 4 ||
+	$subject !~ /\s/) {
+	print "\nThe subject you entered wasn't very descriptive. Please try again.\n\n";
+        return 1;
+    } else {
+	return 0;
+    }
+}
+
+sub SaveMessage {
+    my $file_save = $outfile || "$progname.rep";
+    my $file = _prompt( '', "Name of file to save message in", $file_save );
+    save_message_to_disk($file) || return undef;
+    print "\n";
+    paraprint <<EOF;
+A copy of your message has been saved in '$file' for you to
+send to '$address' with your normal mail client.
+EOF
+}
+
+sub Send {
+
+    # Message has been accepted for transmission -- Send the message
+
+    # on linux certain "mail" implementations won't accept the subject
+    # as "~s subject" and thus the Subject header will be corrupted
+    # so don't use Mail::Send to be safe
+    eval {
+        if ( $::HaveSend && !$Is_Linux && !$Is_OpenBSD ) {
+            _send_message_mailsend();
+        } elsif ($Is_VMS) {
+            _send_message_vms();
+        } else {
+            _send_message_sendmail();
+        }
+    };
+
+    if ( my $error = $@ ) {
+        paraprint <<EOF;
+$0 has detected an error while trying to send your message: $error.
+
+Your message may not have been sent. You will now have a chance to save a copy to disk.
+EOF
+        SaveMessage();
+        return;
+    }
+
+    1 while unlink($filename);    # remove all versions under VMS
+}    # sub Send
+
+sub Help {
+    print <<EOF;
+
+This program is designed to help you generate and send bug reports
+(and thank-you notes) about perl5 and the modules which ship with it.
+
+In most cases, you can just run "$0" interactively from a command
+line without any special arguments and follow the prompts.
+
+Advanced usage:
+
+$0  [-v] [-a address] [-s subject] [-b body | -f inpufile ] [ -F outputfile ]
+    [-r returnaddress] [-e editor] [-c adminaddress | -C] [-S] [-t] [-h]
+    [-p patchfile ]
+$0  [-v] [-r returnaddress] [-A] [-ok | -okay | -nok | -nokay]
+
+
+Options:
+
+  -v    Include Verbose configuration data in the report
+  -f    File containing the body of the report. Use this to
+        quickly send a prepared message.
+  -p    File containing a patch or other text attachment. Separate
+        multiple files with commas.
+  -F    File to output the resulting mail message to, instead of mailing.
+  -S    Send without asking for confirmation.
+  -a    Address to send the report to. Defaults to '$address'.
+  -c    Address to send copy of report to. Defaults to '$cc'.
+  -C    Don't send copy to administrator.
+  -s    Subject to include with the message. You will be prompted
+        if you don't supply one on the command line.
+  -b    Body of the report. If not included on the command line, or
+        in a file with -f, you will get a chance to edit the message.
+  -r    Your return address. The program will ask you to confirm
+        this if you don't give it here.
+  -e    Editor to use.
+  -t    Test mode. The target address defaults to '$testaddress'.
+  -T    Thank-you mode. The target address defaults to '$thanksaddress'.
+  -d    Data mode.  This prints out your configuration data, without mailing
+        anything. You can use this with -v to get more complete data.
+  -A    Don't send a bug received acknowledgement to the return address.
+  -ok   Report successful build on this system to perl porters
+        (use alone or with -v). Only use -ok if *everything* was ok:
+        if there were *any* problems at all, use -nok.
+  -okay As -ok but allow report from old builds.
+  -nok  Report unsuccessful build on this system to perl porters
+        (use alone or with -v). You must describe what went wrong
+        in the body of the report which you will be asked to edit.
+  -nokay As -nok but allow report from old builds.
+  -h    Print this help message.
+
+EOF
+}
+
+sub filename {
+    if ($::HaveTemp) {
+	# Good. Use a secure temp file
+	my ($fh, $filename) = File::Temp::tempfile(UNLINK => 1);
+	close($fh);
+	return $filename;
+    } else {
+	# Bah. Fall back to doing things less securely.
+	my $dir = File::Spec->tmpdir();
+	$filename = "bugrep0$$";
+	$filename++ while -e File::Spec->catfile($dir, $filename);
+	$filename = File::Spec->catfile($dir, $filename);
+    }
+}
+
+sub paraprint {
+    my @paragraphs = split /\n{2,}/, "@_";
+    for (@paragraphs) {   # implicit local $_
+	s/(\S)\s*\n/$1 /g;
+	write;
+	print "\n";
+    }
+}
+
+sub _prompt {
+    my ($explanation, $prompt, $default) = (@_);
+    if ($explanation) {
+        print "\n\n";
+        paraprint $explanation;
+    }
+    print $prompt. ($default ? " [$default]" :''). ": ";
+	my $result = scalar(<>);
+    chomp($result);
+	$result =~ s/^\s*(.*?)\s*$/$1/s;
+    if ($default && $result eq '') {
+        return $default;
+    } else {
+        return $result;
+    }
+}
+
+sub _build_header {
+    my %attr = (@_);
+
+    my $head = '';
+    for my $header (keys %attr) {
+        $head .= "$header: ".$attr{$header}."\n";
+    }
+    return $head;
+}
+
+sub _message_headers {
+    my %headers = ( To => $address, Subject => $subject );
+    $headers{'Cc'}         = $cc        if ($cc);
+    $headers{'Message-Id'} = $messageid if ($messageid);
+    $headers{'Reply-To'}   = $from      if ($from);
+    $headers{'From'}       = $from      if ($from);
+    if ($have_attachment) {
+        $headers{'MIME-Version'} = '1.0';
+        $headers{'Content-Type'} = qq{multipart/mixed; boundary=\"$mime_boundary\"};
+    }
+    return \%headers;
+}
+
+sub _add_body_start {
+    my $body_start = <<"BODY_START";
+This is a multi-part message in MIME format.
+--$mime_boundary
+Content-Type: text/plain; format=fixed
+Content-Transfer-Encoding: 8bit
+
+BODY_START
+    return $body_start;
+}
+
+sub _add_attachments {
+    my $attach = '';
+    for my $attachment (split /\s*,\s*/, $attachments) {
+        my $attach_file = basename($attachment);
+        $attach .= <<"ATTACHMENT";
+
+--$mime_boundary
+Content-Type: text/x-patch; name="$attach_file"
+Content-Transfer-Encoding: 8bit
+Content-Disposition: attachment; filename="$attach_file"
+
+ATTACHMENT
+
+        open my $attach_fh, '<:raw', $attachment
+            or die "Couldn't open attachment '$attachment': $!\n";
+        while (<$attach_fh>) { $attach .= $_; }
+        close($attach_fh) or die "Error closing attachment '$attachment': $!";
+    }
+
+    $attach .= "\n--$mime_boundary--\n";
+    return $attach;
+}
+
+sub build_complete_message {
+    my $content = _build_header(%{_message_headers()}) . "\n\n";
+    $content .= _add_body_start() if $have_attachment;
+    open( REP, "<:raw", $filename ) or die "Couldn't open file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (<REP>) { $content .= $_; }
+    close(REP) or die "Error closing report file '$filename': $!";
+    $content .= _add_attachments() if $have_attachment;
+    return $content;
+}
+
+sub save_message_to_disk {
+    my $file = shift;
+
+        open OUTFILE, '>:raw', $file or do { warn  "Couldn't open '$file': $!\n"; return undef};
+        binmode(OUTFILE, ':raw :crlf') if $Is_MSWin32;
+
+        print OUTFILE build_complete_message();
+        close(OUTFILE) or do { warn  "Error closing $file: $!"; return undef };
+	    print "\nMessage saved.\n";
+        return 1;
+}
+
+sub _send_message_vms {
+
+    my $mail_from  = $from;
+    my $rcpt_to_to = $address;
+    my $rcpt_to_cc = $cc;
+
+    map { $_ =~ s/^[^<]*<//;
+          $_ =~ s/>[^>]*//; } ($mail_from, $rcpt_to_to, $rcpt_to_cc);
+
+    if ( open my $sff_fh, '|-:raw', 'MCR TCPIP$SYSTEM:TCPIP$SMTP_SFF.EXE SYS$INPUT:' ) {
+        print $sff_fh "MAIL FROM:<$mail_from>\n";
+        print $sff_fh "RCPT TO:<$rcpt_to_to>\n";
+        print $sff_fh "RCPT TO:<$rcpt_to_cc>\n" if $rcpt_to_cc;
+        print $sff_fh "DATA\n";
+        print $sff_fh build_complete_message();
+        my $success = close $sff_fh;
+        if ($success ) {
+            print "\nMessage sent\n";
+            return;
+        }
+    }
+    die "Mail transport failed (leaving bug report in $filename): $^E\n";
+}
+
+sub _send_message_mailsend {
+    my $msg = Mail::Send->new();
+    my %headers = %{_message_headers()};
+    for my $key ( keys %headers) {
+        $msg->add($key => $headers{$key});
+    }
+
+    $fh = $msg->open;
+    binmode($fh, ':raw');
+    print $fh _add_body_start() if $have_attachment;
+    open(REP, "<:raw", $filename) or die "Couldn't open '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (<REP>) { print $fh $_ }
+    close(REP) or die "Error closing $filename: $!";
+    print $fh _add_attachments() if $have_attachment;
+    $fh->close or die "Error sending mail: $!";
+
+    print "\nMessage sent.\n";
+}
+
+sub _probe_for_sendmail {
+    my $sendmail = "";
+    for (qw(/usr/lib/sendmail /usr/sbin/sendmail /usr/ucblib/sendmail)) {
+        $sendmail = $_, last if -e $_;
+    }
+    if ( $^O eq 'os2' and $sendmail eq "" ) {
+        my $path = $ENV{PATH};
+        $path =~ s:\\:/:;
+        my @path = split /$Config{'path_sep'}/, $path;
+        for (@path) {
+            $sendmail = "$_/sendmail",     last if -e "$_/sendmail";
+            $sendmail = "$_/sendmail.exe", last if -e "$_/sendmail.exe";
+        }
+    }
+    return $sendmail;
+}
+
+sub _send_message_sendmail {
+    my $sendmail = _probe_for_sendmail();
+    unless ($sendmail) {
+        my $message_start = !$Is_Linux && !$Is_OpenBSD ? <<'EOT' : <<'EOT';
+It appears that there is no program which looks like "sendmail" on
+your system and that the Mail::Send library from CPAN isn't available.
+EOT
+It appears that there is no program which looks like "sendmail" on
+your system.
+EOT
+        paraprint(<<"EOF"), die "\n";
+$message_start
+Because of this, there's no easy way to automatically send your
+message.
+
+A copy of your message has been saved in '$filename' for you to
+send to '$address' with your normal mail client.
+EOF
+    }
+
+    open( SENDMAIL, "|-:raw", $sendmail, "-t", "-oi", "-f", $from )
+        || die "'|$sendmail -t -oi -f $from' failed: $!";
+    print SENDMAIL build_complete_message();
+    if ( close(SENDMAIL) ) {
+        print "\nMessage sent\n";
+    } else {
+        warn "\nSendmail returned status '", $? >> 8, "'\n";
+    }
+}
+
+
+
+# a strange way to check whether any significant editing
+# has been done: check whether any new non-empty lines
+# have been added.
+
+sub _fingerprint_lines_in_report {
+    my $new_lines = 0;
+    # read in the report template once so that
+    # we can track whether the user does any editing.
+    # yes, *all* whitespace is ignored.
+
+    open(REP, '<:raw', $filename) or die "Unable to open report file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (my $line = <REP>) {
+        $line =~ s/\s+//g;
+        $new_lines++ if (!$REP{$line});
+
+    }
+    close(REP) or die "Error closing report file '$filename': $!";
+    # returns the number of lines with content that wasn't there when last we looked
+    return $new_lines;
+}
+
+
+
+format STDOUT =
+^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< ~~
+$_
+.
+
+__END__
+
+=head1 NAME
+
+perlbug - how to submit bug reports on Perl
+
+=head1 SYNOPSIS
+
+B<perlbug>
+
+B<perlbug> S<[ B<-v> ]> S<[ B<-a> I<address> ]> S<[ B<-s> I<subject> ]>
+S<[ B<-b> I<body> | B<-f> I<inputfile> ]> S<[ B<-F> I<outputfile> ]>
+S<[ B<-r> I<returnaddress> ]>
+S<[ B<-e> I<editor> ]> S<[ B<-c> I<adminaddress> | B<-C> ]>
+S<[ B<-S> ]> S<[ B<-t> ]>  S<[ B<-d> ]>  S<[ B<-A> ]>  S<[ B<-h> ]> S<[ B<-T> ]>
+
+B<perlbug> S<[ B<-v> ]> S<[ B<-r> I<returnaddress> ]>
+ S<[ B<-A> ]> S<[ B<-ok> | B<-okay> | B<-nok> | B<-nokay> ]>
+
+B<perlthanks>
+
+=head1 DESCRIPTION
+
+
+This program is designed to help you generate and send bug reports
+(and thank-you notes) about perl5 and the modules which ship with it.
+
+In most cases, you can just run it interactively from a command
+line without any special arguments and follow the prompts.
+
+If you have found a bug with a non-standard port (one that was not
+part of the I<standard distribution>), a binary distribution, or a
+non-core module (such as Tk, DBI, etc), then please see the
+documentation that came with that distribution to determine the
+correct place to report bugs.
+
+If you are unable to send your report using B<perlbug> (most likely
+because your system doesn't have a way to send mail that perlbug
+recognizes), you may be able to use this tool to compose your report
+and save it to a file which you can then send to B<perlbug@perl.org>
+using your regular mail client.
+
+In extreme cases, B<perlbug> may not work well enough on your system
+to guide you through composing a bug report. In those cases, you
+may be able to use B<perlbug -d> to get system configuration
+information to include in a manually composed bug report to
+B<perlbug@perl.org>.
+
+
+When reporting a bug, please run through this checklist:
+
+=over 4
+
+=item What version of Perl you are running?
+
+Type C<perl -v> at the command line to find out.
+
+=item Are you running the latest released version of perl?
+
+Look at http://www.perl.org/ to find out.  If you are not using the
+latest released version, please try to replicate your bug on the
+latest stable release.
+
+Note that reports about bugs in old versions of Perl, especially
+those which indicate you haven't also tested the current stable
+release of Perl, are likely to receive less attention from the
+volunteers who build and maintain Perl than reports about bugs in
+the current release.
+
+This tool isn't appropriate for reporting bugs in any version
+prior to Perl 5.0.
+
+=item Are you sure what you have is a bug?
+
+A significant number of the bug reports we get turn out to be
+documented features in Perl.  Make sure the issue you've run into
+isn't intentional by glancing through the documentation that comes
+with the Perl distribution.
+
+Given the sheer volume of Perl documentation, this isn't a trivial
+undertaking, but if you can point to documentation that suggests
+the behaviour you're seeing is I<wrong>, your issue is likely to
+receive more attention. You may want to start with B<perldoc>
+L<perltrap> for pointers to common traps that new (and experienced)
+Perl programmers run into.
+
+If you're unsure of the meaning of an error message you've run
+across, B<perldoc> L<perldiag> for an explanation.  If the message
+isn't in perldiag, it probably isn't generated by Perl.  You may
+have luck consulting your operating system documentation instead.
+
+If you are on a non-UNIX platform B<perldoc> L<perlport>, as some
+features may be unimplemented or work differently.
+
+You may be able to figure out what's going wrong using the Perl
+debugger.  For information about how to use the debugger B<perldoc>
+L<perldebug>.
+
+=item Do you have a proper test case?
+
+The easier it is to reproduce your bug, the more likely it will be
+fixed -- if nobody can duplicate your problem, it probably won't be 
+addressed.
+
+A good test case has most of these attributes: short, simple code;
+few dependencies on external commands, modules, or libraries; no
+platform-dependent code (unless it's a platform-specific bug);
+clear, simple documentation.
+
+A good test case is almost always a good candidate to be included in
+Perl's test suite.  If you have the time, consider writing your test case so
+that it can be easily included into the standard test suite.
+
+=item Have you included all relevant information?
+
+Be sure to include the B<exact> error messages, if any.
+"Perl gave an error" is not an exact error message.
+
+If you get a core dump (or equivalent), you may use a debugger
+(B<dbx>, B<gdb>, etc) to produce a stack trace to include in the bug
+report.  
+
+NOTE: unless your Perl has been compiled with debug info
+(often B<-g>), the stack trace is likely to be somewhat hard to use
+because it will most probably contain only the function names and not
+their arguments.  If possible, recompile your Perl with debug info and
+reproduce the crash and the stack trace.
+
+=item Can you describe the bug in plain English?
+
+The easier it is to understand a reproducible bug, the more likely
+it will be fixed.  Any insight you can provide into the problem
+will help a great deal.  In other words, try to analyze the problem
+(to the extent you can) and report your discoveries.
+
+=item Can you fix the bug yourself?
+
+If so, that's great news; bug reports with patches are likely to
+receive significantly more attention and interest than those without
+patches.  Please attach your patch to the report using the C<-p> option.
+When sending a patch, create it using C<git format-patch> if possible,
+though a unified diff created with C<diff -pu> will do nearly as well.
+
+Your patch may be returned with requests for changes, or requests for more
+detailed explanations about your fix.
+
+Here are a few hints for creating high-quality patches:
+
+Make sure the patch is not reversed (the first argument to diff is
+typically the original file, the second argument your changed file).
+Make sure you test your patch by applying it with C<git am> or the
+C<patch> program before you send it on its way.  Try to follow the
+same style as the code you are trying to patch.  Make sure your patch
+really does work (C<make test>, if the thing you're patching is covered
+by Perl's test suite).
+
+=item Can you use C<perlbug> to submit the report?
+
+B<perlbug> will, amongst other things, ensure your report includes
+crucial information about your version of perl.  If C<perlbug> is
+unable to mail your report after you have typed it in, you may have
+to compose the message yourself, add the output produced by C<perlbug
+-d> and email it to B<perlbug@perl.org>.  If, for some reason, you
+cannot run C<perlbug> at all on your system, be sure to include the
+entire output produced by running C<perl -V> (note the uppercase V).
+
+Whether you use C<perlbug> or send the email manually, please make
+your Subject line informative.  "a bug" is not informative.  Neither
+is "perl crashes" nor is "HELP!!!".  These don't help.  A compact
+description of what's wrong is fine.
+
+=item Can you use C<perlbug> to submit a thank-you note?
+
+Yes, you can do this by either using the C<-T> option, or by invoking
+the program as C<perlthanks>. Thank-you notes are good. It makes people
+smile. 
+
+=back
+
+Having done your bit, please be prepared to wait, to be told the
+bug is in your code, or possibly to get no reply at all.  The
+volunteers who maintain Perl are busy folks, so if your problem is
+an obvious bug in your own code, is difficult to understand or is
+a duplicate of an existing report, you may not receive a personal
+reply.
+
+If it is important to you that your bug be fixed, do monitor the
+perl5-porters@perl.org mailing list (mailing lists are moderated, your
+message may take a while to show up) and the commit logs to development
+versions of Perl, and encourage the maintainers with kind words or
+offers of frosty beverages.  (Please do be kind to the maintainers.
+Harassing or flaming them is likely to have the opposite effect of the
+one you want.)
+
+Feel free to update the ticket about your bug on http://rt.perl.org
+if a new version of Perl is released and your bug is still present.
+
+=head1 OPTIONS
+
+=over 8
+
+=item B<-a>
+
+Address to send the report to.  Defaults to B<perlbug@perl.org>.
+
+=item B<-A>
+
+Don't send a bug received acknowledgement to the reply address.
+Generally it is only a sensible to use this option if you are a
+perl maintainer actively watching perl porters for your message to
+arrive.
+
+=item B<-b>
+
+Body of the report.  If not included on the command line, or
+in a file with B<-f>, you will get a chance to edit the message.
+
+=item B<-C>
+
+Don't send copy to administrator.
+
+=item B<-c>
+
+Address to send copy of report to.  Defaults to the address of the
+local perl administrator (recorded when perl was built).
+
+=item B<-d>
+
+Data mode (the default if you redirect or pipe output).  This prints out
+your configuration data, without mailing anything.  You can use this
+with B<-v> to get more complete data.
+
+=item B<-e>
+
+Editor to use.
+
+=item B<-f>
+
+File containing the body of the report.  Use this to quickly send a
+prepared message.
+
+=item B<-F>
+
+File to output the results to instead of sending as an email. Useful
+particularly when running perlbug on a machine with no direct internet
+connection.
+
+=item B<-h>
+
+Prints a brief summary of the options.
+
+=item B<-ok>
+
+Report successful build on this system to perl porters. Forces B<-S>
+and B<-C>. Forces and supplies values for B<-s> and B<-b>. Only
+prompts for a return address if it cannot guess it (for use with
+B<make>). Honors return address specified with B<-r>.  You can use this
+with B<-v> to get more complete data.   Only makes a report if this
+system is less than 60 days old.
+
+=item B<-okay>
+
+As B<-ok> except it will report on older systems.
+
+=item B<-nok>
+
+Report unsuccessful build on this system.  Forces B<-C>.  Forces and
+supplies a value for B<-s>, then requires you to edit the report
+and say what went wrong.  Alternatively, a prepared report may be
+supplied using B<-f>.  Only prompts for a return address if it
+cannot guess it (for use with B<make>). Honors return address
+specified with B<-r>.  You can use this with B<-v> to get more
+complete data.  Only makes a report if this system is less than 60
+days old.
+
+=item B<-nokay>
+
+As B<-nok> except it will report on older systems.
+
+=item B<-p>
+
+The names of one or more patch files or other text attachments to be
+included with the report.  Multiple files must be separated with commas.
+
+=item B<-r>
+
+Your return address.  The program will ask you to confirm its default
+if you don't use this option.
+
+=item B<-S>
+
+Send without asking for confirmation.
+
+=item B<-s>
+
+Subject to include with the message.  You will be prompted if you don't
+supply one on the command line.
+
+=item B<-t>
+
+Test mode.  The target address defaults to B<perlbug-test@perl.org>.
+
+=item B<-T>
+
+Send a thank-you note instead of a bug report. 
+
+=item B<-v>
+
+Include verbose configuration data in the report.
+
+=back
+
+=head1 AUTHORS
+
+Kenneth Albanowski (E<lt>kjahds@kjahds.comE<gt>), subsequently
+I<doc>tored by Gurusamy Sarathy (E<lt>gsar@activestate.comE<gt>),
+Tom Christiansen (E<lt>tchrist@perl.comE<gt>), Nathan Torkington
+(E<lt>gnat@frii.comE<gt>), Charles F. Randall (E<lt>cfr@pobox.comE<gt>),
+Mike Guy (E<lt>mjtg@cam.ac.ukE<gt>), Dominic Dunlop
+(E<lt>domo@computer.orgE<gt>), Hugo van der Sanden (E<lt>hv@crypt.orgE<gt>),
+Jarkko Hietaniemi (E<lt>jhi@iki.fiE<gt>), Chris Nandor
+(E<lt>pudge@pobox.comE<gt>), Jon Orwant (E<lt>orwant@media.mit.eduE<gt>,
+Richard Foley (E<lt>richard.foley@rfi.netE<gt>), Jesse Vincent
+(E<lt>jesse@bestpractical.comE<gt>), and Craig A. Berry (E<lt>craigberry@mac.comE<gt>).
+
+=head1 SEE ALSO
+
+perl(1), perldebug(1), perldiag(1), perlport(1), perltrap(1),
+diff(1), patch(1), dbx(1), gdb(1)
+
+=head1 BUGS
+
+None known (guess what must have been used to report them?)
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perldoc b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perldoc
new file mode 100644
index 00000000..6a9d1619
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perldoc
@@ -0,0 +1,11 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if 0;
+
+# This "perldoc" file was generated by "perldoc.PL"
+
+require 5;
+BEGIN { $^W = 1 if $ENV{'PERLDOCDEBUG'} }
+use Pod::Perldoc;
+exit( Pod::Perldoc->run() );
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlivp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlivp
new file mode 100644
index 00000000..a7094326
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlivp
@@ -0,0 +1,390 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+        if $running_under_some_shell;
+
+# perlivp v5.22.2
+
+sub usage {
+    warn "@_\n" if @_;
+    print << "    EOUSAGE";
+Usage:
+
+    $0 [-p] [-v] | [-h]
+
+    -p Print a preface before each test telling what it will test.
+    -v Verbose mode in which extra information about test results
+       is printed.  Test failures always print out some extra information
+       regardless of whether or not this switch is set.
+    -h Prints this help message.
+    EOUSAGE
+    exit;
+}
+
+use vars qw(%opt); # allow testing with older versions (do not use our)
+
+@opt{ qw/? H h P p V v/ } = qw(0 0 0 0 0 0 0);
+
+while ($ARGV[0] =~ /^-/) {
+    $ARGV[0] =~ s/^-//; 
+    for my $flag (split(//,$ARGV[0])) {
+        usage() if '?' =~ /\Q$flag/;
+        usage() if 'h' =~ /\Q$flag/;
+        usage() if 'H' =~ /\Q$flag/;
+        usage("unknown flag: '$flag'") unless 'HhPpVv' =~ /\Q$flag/;
+        warn "$0: '$flag' flag already set\n" if $opt{$flag}++;
+    } 
+    shift;
+}
+
+$opt{p}++ if $opt{P};
+$opt{v}++ if $opt{V};
+
+my $pass__total = 0;
+my $error_total = 0;
+my $tests_total = 0;
+
+my $perlpath = '/usr/bin/perl';
+my $useithreads = 'define';
+
+print "## Checking Perl binary via variable '\$perlpath' = $perlpath.\n" if $opt{'p'};
+
+my $label = 'Executable perl binary';
+
+if (-x $perlpath) {
+    print "## Perl binary '$perlpath' appears executable.\n" if $opt{'v'};
+    print "ok 1 $label\n";
+    $pass__total++;
+}
+else {
+    print "# Perl binary '$perlpath' does not appear executable.\n";
+    print "not ok 1 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+
+print "## Checking Perl version via variable '\$]'.\n" if $opt{'p'};
+
+my $ivp_VERSION = "5.022002";
+
+
+$label = 'Perl version correct';
+if ($ivp_VERSION eq $]) {
+    print "## Perl version '$]' appears installed as expected.\n" if $opt{'v'};
+    print "ok 2 $label\n";
+    $pass__total++;
+}
+else {
+    print "# Perl version '$]' installed, expected $ivp_VERSION.\n";
+    print "not ok 2 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+# We have the right perl and version, so now reset @INC so we ignore
+# PERL5LIB and '.'
+{
+    local $ENV{PERL5LIB};
+    my $perl_V = qx($perlpath -V);
+    $perl_V =~ s{.*\@INC:\n}{}ms;
+    @INC = grep { length && $_ ne '.' } split ' ', $perl_V;
+}
+
+print "## Checking roots of the Perl library directory tree via variable '\@INC'.\n" if $opt{'p'};
+
+my $INC_total = 0;
+my $INC_there = 0;
+foreach (@INC) {
+    next if $_ eq '.'; # skip -d test here
+    if (-d $_) {
+        print "## Perl \@INC directory '$_' exists.\n" if $opt{'v'};
+        $INC_there++;
+    }
+    else {
+        print "# Perl \@INC directory '$_' does not appear to exist.\n";
+    }
+    $INC_total++;
+}
+
+$label = '@INC directoreis exist';
+if ($INC_total == $INC_there) {
+    print "ok 3 $label\n";
+    $pass__total++;
+}
+else {
+    print "not ok 3 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+
+print "## Checking installations of modules necessary for ivp.\n" if $opt{'p'};
+
+my $needed_total = 0;
+my $needed_there = 0;
+foreach (qw(Config.pm ExtUtils/Installed.pm)) {
+    $@ = undef;
+    $needed_total++;
+    eval "require \"$_\";";
+    if (!$@) {
+        print "## Module '$_' appears to be installed.\n" if $opt{'v'};
+        $needed_there++;
+    }
+    else {
+        print "# Needed module '$_' does not appear to be properly installed.\n";
+    }
+    $@ = undef;
+}
+$label = 'Modules needed for rest of perlivp exist';
+if ($needed_total == $needed_there) {
+    print "ok 4 $label\n";
+    $pass__total++;
+}
+else {
+    print "not ok 4 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+
+print "## Checking installations of extensions built with perl.\n" if $opt{'p'};
+
+use Config;
+
+my $extensions_total = 0;
+my $extensions_there = 0;
+if (defined($Config{'extensions'})) {
+    my @extensions = split(/\s+/,$Config{'extensions'});
+    foreach (@extensions) {
+        next if ($_ eq '');
+        if ( $useithreads !~ /define/i ) {
+            next if ($_ eq 'threads');
+            next if ($_ eq 'threads/shared');
+        }
+        # that's a distribution name, not a module name
+        next if $_ eq 'IO/Compress';
+        next if $_ eq 'Devel/DProf';
+        next if $_ eq 'libnet';
+        next if $_ eq 'Locale/Codes';
+        next if $_ eq 'podlators';
+        next if $_ eq 'perlfaq';
+        # test modules
+        next if $_ eq 'XS/APItest';
+        next if $_ eq 'XS/Typemap';
+           # VMS$ perl  -e "eval ""require \""Devel/DProf.pm\"";"" print $@"
+           # \NT> perl  -e "eval \"require 'Devel/DProf.pm'\"; print $@"
+           # DProf: run perl with -d to use DProf.
+           # Compilation failed in require at (eval 1) line 1.
+        eval " require \"$_.pm\"; ";
+        if (!$@) {
+            print "## Module '$_' appears to be installed.\n" if $opt{'v'};
+            $extensions_there++;
+        }
+        else {
+            print "# Required module '$_' does not appear to be properly installed.\n";
+            $@ = undef;
+        }
+        $extensions_total++;
+    }
+
+    # A silly name for a module (that hopefully won't ever exist).
+    # Note that this test serves more as a check of the validity of the
+    # actual required module tests above.
+    my $unnecessary = 'bLuRfle';
+
+    if (!grep(/$unnecessary/, @extensions)) {
+        $@ = undef;
+        eval " require \"$unnecessary.pm\"; ";
+        if ($@) {
+            print "## Unnecessary module '$unnecessary' does not appear to be installed.\n" if $opt{'v'};
+        }
+        else {
+            print "# Unnecessary module '$unnecessary' appears to be installed.\n";
+            $extensions_there++;
+        }
+    }
+    $@ = undef;
+}
+$label = 'All (and only) expected extensions installed';
+if ($extensions_total == $extensions_there) {
+    print "ok 5 $label\n";
+    $pass__total++;
+}
+else {
+    print "not ok 5 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+
+print "## Checking installations of later additional extensions.\n" if $opt{'p'};
+
+use ExtUtils::Installed;
+
+my $installed_total = 0;
+my $installed_there = 0;
+my $version_check = 0;
+my $installed = ExtUtils::Installed -> new();
+my @modules = $installed -> modules();
+my @missing = ();
+my $version = undef;
+for (@modules) {
+    $installed_total++;
+    # Consider it there if it contains one or more files,
+    # and has zero missing files,
+    # and has a defined version
+    $version = undef;
+    $version = $installed -> version($_);
+    if ($version) {
+        print "## $_; $version\n" if $opt{'v'};
+        $version_check++;
+    }
+    else {
+        print "# $_; NO VERSION\n" if $opt{'v'};
+    }
+    $version = undef;
+    @missing = ();
+    @missing = $installed -> validate($_);
+
+    # .bs files are optional
+    @missing = grep { ! /\.bs$/ } @missing;
+    # man files are often compressed
+    @missing = grep { ! ( -s "$_.gz" || -s "$_.bz2" ) } @missing;
+
+    if ($#missing >= 0) {
+        print "# file",+($#missing == 0) ? '' : 's'," missing from installation:\n";
+        print '# ',join(' ',@missing),"\n";
+    }
+    elsif ($#missing == -1) {
+        $installed_there++;
+    }
+    @missing = ();
+}
+$label = 'Module files correctly installed';
+if (($installed_total == $installed_there) && 
+    ($installed_total == $version_check)) {
+    print "ok 6 $label\n";
+    $pass__total++;
+}
+else {
+    print "not ok 6 $label\n";
+    $error_total++;
+}
+$tests_total++;
+
+# Final report (rather than feed ousrselves to Test::Harness::runtests()
+# we simply format some output on our own to keep things simple and
+# easier to "fix" - at least for now.
+
+if ($error_total == 0 && $tests_total) {
+    print "All tests successful.\n";
+} elsif ($tests_total==0){
+        die "FAILED--no tests were run for some reason.\n";
+} else {
+    my $rate = 0.0;
+    if ($tests_total > 0) { $rate = sprintf "%.2f", 100.0 * ($pass__total / $tests_total); }
+    printf " %d/%d subtests failed, %.2f%% okay.\n",
+                              $error_total, $tests_total, $rate;
+}
+
+=head1 NAME
+
+perlivp - Perl Installation Verification Procedure
+
+=head1 SYNOPSIS
+
+B<perlivp> [B<-p>] [B<-v>] [B<-h>]
+
+=head1 DESCRIPTION
+
+The B<perlivp> program is set up at Perl source code build time to test the
+Perl version it was built under.  It can be used after running:
+
+    make install
+
+(or your platform's equivalent procedure) to verify that B<perl> and its
+libraries have been installed correctly.  A correct installation is verified
+by output that looks like:
+
+    ok 1
+    ok 2
+
+etc.
+
+=head1 OPTIONS
+
+=over 5
+
+=item B<-h> help
+
+Prints out a brief help message.
+
+=item B<-p> print preface
+
+Gives a description of each test prior to performing it.
+
+=item B<-v> verbose
+
+Gives more detailed information about each test, after it has been performed.
+Note that any failed tests ought to print out some extra information whether
+or not -v is thrown.
+
+=back
+
+=head1 DIAGNOSTICS
+
+=over 4
+
+=item * print "# Perl binary '$perlpath' does not appear executable.\n";
+
+Likely to occur for a perl binary that was not properly installed.
+Correct by conducting a proper installation.
+
+=item * print "# Perl version '$]' installed, expected $ivp_VERSION.\n";
+
+Likely to occur for a perl that was not properly installed.
+Correct by conducting a proper installation.
+
+=item * print "# Perl \@INC directory '$_' does not appear to exist.\n";
+
+Likely to occur for a perl library tree that was not properly installed.
+Correct by conducting a proper installation.
+
+=item * print "# Needed module '$_' does not appear to be properly installed.\n";
+
+One of the two modules that is used by perlivp was not present in the 
+installation.  This is a serious error since it adversely affects perlivp's
+ability to function.  You may be able to correct this by performing a
+proper perl installation.
+
+=item * print "# Required module '$_' does not appear to be properly installed.\n";
+
+An attempt to C<eval "require $module"> failed, even though the list of 
+extensions indicated that it should succeed.  Correct by conducting a proper 
+installation.
+
+=item * print "# Unnecessary module 'bLuRfle' appears to be installed.\n";
+
+This test not coming out ok could indicate that you have in fact installed 
+a bLuRfle.pm module or that the C<eval " require \"$module_name.pm\"; ">
+test may give misleading results with your installation of perl.  If yours
+is the latter case then please let the author know.
+
+=item * print "# file",+($#missing == 0) ? '' : 's'," missing from installation:\n";
+
+One or more files turned up missing according to a run of 
+C<ExtUtils::Installed -E<gt> validate()> over your installation.
+Correct by conducting a proper installation.
+
+=back
+
+For further information on how to conduct a proper installation consult the 
+INSTALL file that comes with the perl source and the README file for your 
+platform.
+
+=head1 AUTHOR
+
+Peter Prymmer
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlthanks b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlthanks
new file mode 100644
index 00000000..086e7e79
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/perlthanks
@@ -0,0 +1,1514 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+my $config_tag1 = '5.22.2 - Sat Apr 30 15:59:30 CEST 2016';
+
+my $patchlevel_date = 1460309636;
+my @patches = Config::local_patches();
+my $patch_tags = join "", map /(\S+)/ ? "+$1 " : (), @patches;
+
+use warnings;
+use strict;
+use Config;
+use File::Spec;		# keep perlbug Perl 5.005 compatible
+use Getopt::Std;
+use File::Basename 'basename';
+
+sub paraprint;
+
+BEGIN {
+    eval { require Mail::Send;};
+    $::HaveSend = ($@ eq "");
+    eval { require Mail::Util; } ;
+    $::HaveUtil = ($@ eq "");
+    # use secure tempfiles wherever possible
+    eval { require File::Temp; };
+    $::HaveTemp = ($@ eq "");
+    eval { require Module::CoreList; };
+    $::HaveCoreList = ($@ eq "");
+};
+
+my $Version = "1.40";
+
+#TODO:
+#       make sure failure (transmission-wise) of Mail::Send is accounted for.
+#       (This may work now. Unsure of the original author's issue -JESSE 2008-06-08)
+#       - Test -b option
+
+my( $file, $usefile, $cc, $address, $bugaddress, $testaddress, $thanksaddress,
+    $filename, $messageid, $domain, $subject, $from, $verbose, $ed, $outfile,
+    $fh, $me, $body, $andcc, %REP, $ok, $thanks, $progname,
+    $Is_MSWin32, $Is_Linux, $Is_VMS, $Is_OpenBSD,
+    $report_about_module, $category, $severity,
+    %opt, $have_attachment, $attachments, $has_patch, $mime_boundary
+);
+
+my $perl_version = $^V ? sprintf("%vd", $^V) : $];
+
+my $config_tag2 = "$perl_version - $Config{cf_time}";
+
+Init();
+
+if ($opt{h}) { Help(); exit; }
+if ($opt{d}) { Dump(*STDOUT); exit; }
+if (!-t STDIN && !($ok and not $opt{n})) {
+    paraprint <<"EOF";
+Please use $progname interactively. If you want to
+include a file, you can use the -f switch.
+EOF
+    die "\n";
+}
+
+Query();
+Edit() unless $usefile || ($ok and not $opt{n});
+NowWhat();
+if ($outfile) {
+    save_message_to_disk($outfile);
+} else {
+    Send();
+    if ($thanks) {
+	print "\nThank you for taking the time to send a thank-you message!\n\n";
+
+	paraprint <<EOF
+Please note that mailing lists are moderated, your message may take a while to
+show up.
+EOF
+    } else {
+	print "\nThank you for taking the time to file a bug report!\n\n";
+
+	paraprint <<EOF
+Please note that mailing lists are moderated, your message may take a while to
+show up. If you do not receive an automated response acknowledging your message
+within a few hours (check your SPAM folder and outgoing mail) please consider
+sending an email directly from your mail client to perlbug\@perl.org.
+EOF
+    }
+
+}
+
+exit;
+
+sub ask_for_alternatives { # (category|severity)
+    my $name = shift;
+    my %alts = (
+	'category' => {
+	    'default' => 'core',
+	    'ok'      => 'install',
+	    # Inevitably some of these will end up in RT whatever we do:
+	    'thanks'  => 'thanks',
+	    'opts'    => [qw(core docs install library utilities)], # patch, notabug
+	},
+	'severity' => {
+	    'default' => 'low',
+	    'ok'      => 'none',
+	    'thanks'  => 'none',
+	    'opts'    => [qw(critical high medium low wishlist none)], # zero
+	},
+    );
+    die "Invalid alternative ($name) requested\n" unless grep(/^$name$/, keys %alts);
+    my $alt = "";
+    my $what = $ok || $thanks;
+    if ($what) {
+	$alt = $alts{$name}{$what};
+    } else {
+ 	my @alts = @{$alts{$name}{'opts'}};
+    print "\n\n";
+	paraprint <<EOF;
+Please pick a $name from the following list:
+
+    @alts
+EOF
+	my $err = 0;
+	do {
+	    if ($err++ > 5) {
+		die "Invalid $name: aborting.\n";
+	    }
+        $alt = _prompt('', "\u$name", $alts{$name}{'default'});
+		$alt ||= $alts{$name}{'default'};
+	} while !((($alt) = grep(/^$alt/i, @alts)));
+    }
+    lc $alt;
+}
+
+sub Init {
+    # -------- Setup --------
+
+    $Is_MSWin32 = $^O eq 'MSWin32';
+    $Is_VMS = $^O eq 'VMS';
+    $Is_Linux = lc($^O) eq 'linux';
+    $Is_OpenBSD = lc($^O) eq 'openbsd';
+
+    if (!getopts("Adhva:s:b:f:F:r:e:SCc:to:n:T:p:", \%opt)) { Help(); exit; };
+
+    # This comment is needed to notify metaconfig that we are
+    # using the $perladmin, $cf_by, and $cf_time definitions.
+
+    # -------- Configuration ---------
+
+    # perlbug address
+    $bugaddress = 'perlbug@perl.org';
+
+    # Test address
+    $testaddress = 'perlbug-test@perl.org';
+
+    # Thanks address
+    $thanksaddress = 'perl-thanks@perl.org';
+
+    if (basename ($0) =~ /^perlthanks/i) {
+	# invoked as perlthanks
+	$opt{T} = 1;
+	$opt{C} = 1; # don't send a copy to the local admin
+    }
+
+    if ($opt{T}) {
+	$thanks = 'thanks';
+    }
+    
+    $progname = $thanks ? 'perlthanks' : 'perlbug';
+    # Target address
+    $address = $opt{a} || ($opt{t} ? $testaddress
+			    : $thanks ? $thanksaddress : $bugaddress);
+
+    # Users address, used in message and in From and Reply-To headers
+    $from = $opt{r} || "";
+
+    # Include verbose configuration information
+    $verbose = $opt{v} || 0;
+
+    # Subject of bug-report message
+    $subject = $opt{s} || "";
+
+    # Send a file
+    $usefile = ($opt{f} || 0);
+
+    # File to send as report
+    $file = $opt{f} || "";
+
+    # We have one or more attachments
+    $have_attachment = ($opt{p} || 0);
+    $mime_boundary = ('-' x 12) . "$Version.perlbug" if $have_attachment;
+
+    # Comma-separated list of attachments
+    $attachments = $opt{p} || "";
+    $has_patch = 0; # TBD based on file type
+
+    for my $attachment (split /\s*,\s*/, $attachments) {
+        unless (-f $attachment && -r $attachment) {
+            die "The attachment $attachment is not a readable file: $!\n";
+        }
+        $has_patch = 1 if $attachment =~ m/\.(patch|diff)$/;
+    }
+
+    # File to output to
+    $outfile = $opt{F} || "";
+
+    # Body of report
+    $body = $opt{b} || "";
+	
+    # Editor
+    $ed = $opt{e} || $ENV{VISUAL} || $ENV{EDITOR} || $ENV{EDIT}
+	|| ($Is_VMS && "edit/tpu")
+	|| ($Is_MSWin32 && "notepad")
+	|| "vi";
+
+    # Not OK - provide build failure template by finessing OK report
+    if ($opt{n}) {
+	if (substr($opt{n}, 0, 2) eq 'ok' )	{
+	    $opt{o} = substr($opt{n}, 1);
+	} else {
+	    Help();
+	    exit();
+	}
+    }
+
+    # OK - send "OK" report for build on this system
+    $ok = '';
+    if ($opt{o}) {
+	if ($opt{o} eq 'k' or $opt{o} eq 'kay') {
+	    my $age = time - $patchlevel_date;
+	    if ($opt{o} eq 'k' and $age > 60 * 24 * 60 * 60 ) {
+		my $date = localtime $patchlevel_date;
+		print <<"EOF";
+"perlbug -ok" and "perlbug -nok" do not report on Perl versions which
+are more than 60 days old.  This Perl version was constructed on
+$date.  If you really want to report this, use
+"perlbug -okay" or "perlbug -nokay".
+EOF
+		exit();
+	    }
+	    # force these options
+	    unless ($opt{n}) {
+		$opt{S} = 1; # don't prompt for send
+		$opt{b} = 1; # we have a body
+		$body = "Perl reported to build OK on this system.\n";
+	    }
+	    $opt{C} = 1; # don't send a copy to the local admin
+	    $opt{s} = 1; # we have a subject line
+	    $subject = ($opt{n} ? 'Not ' : '')
+		    . "OK: perl $perl_version ${patch_tags}on"
+		    ." $::Config{'archname'} $::Config{'osvers'} $subject";
+	    $ok = 'ok';
+	} else {
+	    Help();
+	    exit();
+	}
+    }
+
+    # Possible administrator addresses, in order of confidence
+    # (Note that cf_email is not mentioned to metaconfig, since
+    # we don't really want it. We'll just take it if we have to.)
+    #
+    # This has to be after the $ok stuff above because of the way
+    # that $opt{C} is forced.
+    $cc = $opt{C} ? "" : (
+	$opt{c} || $::Config{'perladmin'}
+	|| $::Config{'cf_email'} || $::Config{'cf_by'}
+    );
+
+    if ($::HaveUtil) {
+		$domain = Mail::Util::maildomain();
+    } elsif ($Is_MSWin32) {
+		$domain = $ENV{'USERDOMAIN'};
+    } else {
+		require Sys::Hostname;
+		$domain = Sys::Hostname::hostname();
+    }
+
+    # Message-Id - rjsf
+    $messageid = "<$::Config{'version'}_${$}_".time."\@$domain>"; 
+
+    # My username
+    $me = $Is_MSWin32 ? $ENV{'USERNAME'}
+	    : $^O eq 'os2' ? $ENV{'USER'} || $ENV{'LOGNAME'}
+	    : eval { getpwuid($<) };	# May be missing
+
+    $from = $::Config{'cf_email'}
+       if !$from && $::Config{'cf_email'} && $::Config{'cf_by'} && $me &&
+               ($me eq $::Config{'cf_by'});
+} # sub Init
+
+sub Query {
+    # Explain what perlbug is
+    unless ($ok) {
+	if ($thanks) {
+	    paraprint <<'EOF';
+This program provides an easy way to send a thank-you message back to the
+authors and maintainers of perl.
+
+If you wish to submit a bug report, please run it without the -T flag
+(or run the program perlbug rather than perlthanks)
+EOF
+	} else {
+	    paraprint <<"EOF";
+This program provides an easy way to create a message reporting a
+bug in the core perl distribution (along with tests or patches)
+to the volunteers who maintain perl at $address.  To send a thank-you
+note to $thanksaddress instead of a bug report, please run 'perlthanks'.
+
+Please do not use $0 to send test messages, test whether perl
+works, or to report bugs in perl modules from CPAN.
+
+Suggestions for how to find help using Perl can be found at
+http://perldoc.perl.org/perlcommunity.html
+EOF
+	}
+    }
+
+    # Prompt for subject of message, if needed
+    
+    if ($subject && TrivialSubject($subject)) {
+	$subject = '';
+    }
+
+    unless ($subject) {
+	    print 
+"First of all, please provide a subject for the message.\n";
+	if ( not $thanks)  {
+	    paraprint <<EOF;
+This should be a concise description of your bug or problem
+which will help the volunteers working to improve perl to categorize
+and resolve the issue.  Be as specific and descriptive as
+you can. A subject like "perl bug" or "perl problem" will make it
+much less likely that your issue gets the attention it deserves.
+EOF
+	}
+
+	my $err = 0;
+	do {
+        $subject = _prompt('','Subject');
+	    if ($err++ == 5) {
+		if ($thanks) {
+		    $subject = 'Thanks for Perl';
+		} else {
+		    die "Aborting.\n";
+		}
+	    }
+	} while (TrivialSubject($subject));
+    }
+    $subject = '[PATCH] ' . $subject
+        if $has_patch && ($subject !~ m/^\[PATCH/i);
+
+    # Prompt for return address, if needed
+    unless ($opt{r}) {
+	# Try and guess return address
+	my $guess;
+
+	$guess = $ENV{'REPLY-TO'} || $ENV{'REPLYTO'} || $ENV{'EMAIL'}
+	    || $from || '';
+
+	unless ($guess) {
+		# move $domain to where we can use it elsewhere	
+        if ($domain) {
+		if ($Is_VMS && !$::Config{'d_socket'}) {
+		    $guess = "$domain\:\:$me";
+		} else {
+		    $guess = "$me\@$domain" if $domain;
+		}
+	    }
+	}
+
+	if ($guess) {
+	    unless ($ok) {
+		paraprint <<EOF;
+Perl's developers may need your email address to contact you for
+further information about your issue or to inform you when it is
+resolved.  If the default shown is not your email address, please
+correct it.
+EOF
+	    }
+	} else {
+	    paraprint <<EOF;
+Please enter your full internet email address so that Perl's
+developers can contact you with questions about your issue or to
+inform you that it has been resolved.
+EOF
+	}
+
+	if ($ok && $guess) {
+	    # use it
+	    $from = $guess;
+	} else {
+	    # verify it
+        $from = _prompt('','Your address',$guess);
+	    $from = $guess if $from eq '';
+	}
+    }
+
+    if ($from eq $cc or $me eq $cc) {
+	# Try not to copy ourselves
+	$cc = "yourself";
+    }
+
+    # Prompt for administrator address, unless an override was given
+    if( !$opt{C} and !$opt{c} ) {
+	my $description =  <<EOF;
+$0 can send a copy of this report to your local perl
+administrator.  If the address below is wrong, please correct it,
+or enter 'none' or 'yourself' to not send a copy.
+EOF
+	my $entry = _prompt($description, "Local perl administrator", $cc);
+
+	if ($entry ne "") {
+	    $cc = $entry;
+	    $cc = '' if $me eq $cc;
+	}
+    }
+
+    $cc = '' if $cc =~ /^(none|yourself|me|myself|ourselves)$/i;
+    if ($cc) { 
+        $andcc = " and $cc" 
+    } else {
+        $andcc = ''
+    }
+
+    # Prompt for editor, if no override is given
+editor:
+    unless ($opt{e} || $opt{f} || $opt{b}) {
+
+    my $description;
+
+	chomp (my $common_end = <<"EOF");
+You will probably want to use a text editor to enter the body of
+your report. If "$ed" is the editor you want to use, then just press
+Enter, otherwise type in the name of the editor you would like to
+use.
+
+If you have already composed the body of your report, you may enter
+"file", and $0 will prompt you to enter the name of the file
+containing your report.
+EOF
+
+	if ($thanks) {
+	    $description = <<"EOF";
+It's now time to compose your thank-you message.
+
+Some information about your local perl configuration will automatically
+be included at the end of your message, because we're curious about
+the different ways that people build and use perl. If you'd rather
+not share this information, you're welcome to delete it.
+
+$common_end
+EOF
+	} else {
+	    $description =  <<"EOF";
+It's now time to compose your bug report. Try to make the report
+concise but descriptive. Please include any detail which you think
+might be relevant or might help the volunteers working to improve
+perl. If you are reporting something that does not work as you think
+it should, please try to include examples of the actual result and of
+what you expected.
+
+Some information about your local perl configuration will automatically
+be included at the end of your report. If you are using an unusual
+version of perl, it would be useful if you could confirm that you
+can replicate the problem on a standard build of perl as well.
+
+$common_end
+EOF
+	}
+
+    my $entry = _prompt($description, "Editor", $ed);
+	$usefile = 0;
+	if ($entry eq "file") {
+	    $usefile = 1;
+	} elsif ($entry ne "") {
+	    $ed = $entry;
+	}
+    }
+    if ($::HaveCoreList && !$ok && !$thanks) {
+	my $description =  <<EOF;
+If your bug is about a Perl module rather than a core language
+feature, please enter its name here. If it's not, just hit Enter
+to skip this question.
+EOF
+
+    my $entry = '';
+	while ($entry eq '') {
+        $entry = _prompt($description, 'Module');
+	    my $first_release = Module::CoreList->first_release($entry);
+	    if ($entry and not $first_release) {
+		paraprint <<EOF;
+$entry is not a "core" Perl module. Please check that you entered
+its name correctly. If it is correct, quit this program, try searching
+for $entry on http://rt.cpan.org, and report your issue there.
+EOF
+
+            $entry = '';
+	} elsif (my $bug_tracker = $Module::CoreList::bug_tracker{$entry}) {
+		paraprint <<"EOF";
+$entry included with core Perl is copied directly from the CPAN distribution.
+Please report bugs in $entry directly to its maintainers using $bug_tracker
+EOF
+            $entry = '';
+        } elsif ($entry) {
+	        $category ||= 'library';
+	        $report_about_module = $entry;
+            last;
+        } else {
+            last;
+        }
+	}
+    }
+
+    # Prompt for category of bug
+    $category ||= ask_for_alternatives('category');
+
+    # Prompt for severity of bug
+    $severity ||= ask_for_alternatives('severity');
+
+    # Generate scratch file to edit report in
+    $filename = filename();
+
+    # Prompt for file to read report from, if needed
+    if ($usefile and !$file) {
+filename:
+	my $description = <<EOF;
+What is the name of the file that contains your report?
+EOF
+	my $entry = _prompt($description, "Filename");
+
+	if ($entry eq "") {
+	    paraprint <<EOF;
+It seems you didn't enter a filename. Please choose to use a text
+editor or enter a filename.
+EOF
+	    goto editor;
+	}
+
+	unless (-f $entry and -r $entry) {
+	    paraprint <<EOF;
+'$entry' doesn't seem to be a readable file.  You may have mistyped
+its name or may not have permission to read it.
+
+If you don't want to use a file as the content of your report, just
+hit Enter and you'll be able to select a text editor instead.
+EOF
+	    goto filename;
+	}
+	$file = $entry;
+    }
+
+    # Generate report
+    open(REP, '>:raw', $filename) or die "Unable to create report file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+
+    my $reptype = !$ok ? ($thanks ? 'thank-you' : 'bug')
+	: $opt{n} ? "build failure" : "success";
+
+    print REP <<EOF;
+This is a $reptype report for perl from $from,
+generated with the help of perlbug $Version running under perl $perl_version.
+
+EOF
+
+    if ($body) {
+	print REP $body;
+    } elsif ($usefile) {
+	open(F, '<:raw', $file)
+		or die "Unable to read report file from '$file': $!\n";
+	binmode(F, ':raw :crlf') if $Is_MSWin32;
+	while (<F>) {
+	    print REP $_
+	}
+	close(F) or die "Error closing '$file': $!";
+    } else {
+	if ($thanks) {
+	    print REP <<'EOF';
+
+-----------------------------------------------------------------
+[Please enter your thank-you message here]
+
+
+
+[You're welcome to delete anything below this line]
+-----------------------------------------------------------------
+EOF
+	} else {
+	    print REP <<'EOF';
+
+-----------------------------------------------------------------
+[Please describe your issue here]
+
+
+
+[Please do not change anything below this line]
+-----------------------------------------------------------------
+EOF
+	}
+    }
+    Dump(*REP);
+    close(REP) or die "Error closing report file: $!";
+
+    # Set up an initial report fingerprint so we can compare it later
+    _fingerprint_lines_in_report();
+
+} # sub Query
+
+sub Dump {
+    local(*OUT) = @_;
+
+    # these won't have been set if run with -d
+    $category ||= 'core';
+    $severity ||= 'low';
+
+    print OUT <<EFF;
+---
+Flags:
+    category=$category
+    severity=$severity
+EFF
+
+    if ($has_patch) {
+        print OUT <<EFF;
+    Type=Patch
+    PatchStatus=HasPatch
+EFF
+    }
+
+    if ($report_about_module ) { 
+        print OUT <<EFF;
+    module=$report_about_module
+EFF
+    }
+    if ($opt{A}) {
+	print OUT <<EFF;
+    ack=no
+EFF
+    }
+    print OUT <<EFF;
+---
+EFF
+    print OUT "This perlbug was built using Perl $config_tag1\n",
+	    "It is being executed now by  Perl $config_tag2.\n\n"
+	if $config_tag2 ne $config_tag1;
+
+    print OUT <<EOF;
+Site configuration information for perl $perl_version:
+
+EOF
+    if ($::Config{cf_by} and $::Config{cf_time}) {
+	print OUT "Configured by $::Config{cf_by} at $::Config{cf_time}.\n\n";
+    }
+    print OUT Config::myconfig;
+
+    if (@patches) {
+	print OUT join "\n    ", "Locally applied patches:", @patches;
+	print OUT "\n";
+    };
+
+    print OUT <<EOF;
+
+---
+\@INC for perl $perl_version:
+EOF
+    for my $i (@INC) {
+	print OUT "    $i\n";
+    }
+
+    print OUT <<EOF;
+
+---
+Environment for perl $perl_version:
+EOF
+    my @env =
+        qw(PATH LD_LIBRARY_PATH LANG PERL_BADLANG SHELL HOME LOGDIR LANGUAGE);
+    push @env, $Config{ldlibpthname} if $Config{ldlibpthname} ne '';
+    push @env, grep /^(?:PERL|LC_|LANG|CYGWIN)/, keys %ENV;
+    my %env;
+    @env{@env} = @env;
+    for my $env (sort keys %env) {
+	print OUT "    $env",
+		exists $ENV{$env} ? "=$ENV{$env}" : ' (unset)',
+		"\n";
+    }
+    if ($verbose) {
+	print OUT "\nComplete configuration data for perl $perl_version:\n\n";
+	my $value;
+	foreach (sort keys %::Config) {
+	    $value = $::Config{$_};
+	    $value = '' unless defined $value;
+	    $value =~ s/'/\\'/g;
+	    print OUT "$_='$value'\n";
+	}
+    }
+} # sub Dump
+
+sub Edit {
+    # Edit the report
+    if ($usefile || $body) {
+	my $description = "Please make sure that the name of the editor you want to use is correct.";
+	my $entry = _prompt($description, 'Editor', $ed);
+	$ed = $entry unless $entry eq '';
+    }
+
+    _edit_file($ed);
+}
+
+sub _edit_file {
+    my $editor = shift;
+
+    my $report_written = 0;
+
+    while ( !$report_written ) {
+        my $exit_status = system("$editor $filename");
+        if ($exit_status) {
+            my $desc = <<EOF;
+The editor you chose ('$editor') could not be run!
+
+If you mistyped its name, please enter it now, otherwise just press Enter.
+EOF
+            my $entry = _prompt( $desc, 'Editor', $editor );
+            if ( $entry ne "" ) {
+                $editor = $entry;
+                next;
+            } else {
+                paraprint <<EOF;
+You may want to save your report to a file, so you can edit and
+mail it later.
+EOF
+                return;
+            }
+        }
+        return if ( $ok and not $opt{n} ) || $body;
+
+        # Check that we have a report that has some, eh, report in it.
+
+        unless ( _fingerprint_lines_in_report() ) {
+            my $description = <<EOF;
+It looks like you didn't enter a report. You may [r]etry your edit
+or [c]ancel this report.
+EOF
+            my $action = _prompt( $description, "Action (Retry/Cancel) " );
+            if ( $action =~ /^[re]/i ) {    # <R>etry <E>dit
+                next;
+            } elsif ( $action =~ /^[cq]/i ) {    # <C>ancel, <Q>uit
+                Cancel();                        # cancel exits
+            }
+        }
+        # Ok. the user did what they needed to;
+        return;
+
+    }
+}
+
+
+sub Cancel {
+    1 while unlink($filename);  # remove all versions under VMS
+    print "\nQuitting without sending your message.\n";
+    exit(0);
+}
+
+sub NowWhat {
+    # Report is done, prompt for further action
+    if( !$opt{S} ) {
+	while(1) {
+	    my $menu = <<EOF;
+
+
+You have finished composing your message. At this point, you have 
+a few options. You can:
+
+    * [Se]nd the message to $address$andcc, 
+    * [D]isplay the message on the screen,
+    * [R]e-edit the message
+    * Display or change the message's [su]bject
+    * Save the message to a [f]ile to mail at another time
+    * [Q]uit without sending a message
+
+EOF
+      retry:
+        print $menu;
+	    my $action =  _prompt('', "Action (Send/Display/Edit/Subject/Save to File)");;
+        print "\n";
+	    if ($action =~ /^(f|sa)/i) { # <F>ile/<Sa>ve
+            if ( SaveMessage() ) { exit }
+	    } elsif ($action =~ /^(d|l|sh)/i ) { # <D>isplay, <L>ist, <Sh>ow
+		# Display the message
+		open(REP, '<:raw', $filename) or die "Couldn't open file '$filename': $!\n";
+		binmode(REP, ':raw :crlf') if $Is_MSWin32;
+		while (<REP>) { print $_ }
+		close(REP) or die "Error closing report file '$filename': $!";
+		if ($have_attachment) {
+		    print "\n\n---\nAttachment(s):\n";
+		    for my $att (split /\s*,\s*/, $attachments) { print "    $att\n"; }
+		}
+	    } elsif ($action =~ /^su/i) { # <Su>bject
+		my $reply = _prompt( "Subject: $subject", "If the above subject is fine, press Enter. Otherwise, type a replacement now\nSubject");
+		if ($reply ne '') {
+		    unless (TrivialSubject($reply)) {
+			$subject = $reply;
+			print "Subject: $subject\n";
+		    }
+		}
+	    } elsif ($action =~ /^se/i) { # <S>end
+		# Send the message
+		my $reply =  _prompt( "Are you certain you want to send this message?", 'Please type "yes" if you are','no');
+		if ($reply =~ /^yes$/) {
+		    last;
+		} else {
+		    paraprint <<EOF;
+You didn't type "yes", so your message has not yet been sent.
+EOF
+		}
+	    } elsif ($action =~ /^[er]/i) { # <E>dit, <R>e-edit
+		# edit the message
+		Edit();
+	    } elsif ($action =~ /^[qc]/i) { # <C>ancel, <Q>uit
+		Cancel();
+	    } elsif ($action =~ /^s/i) {
+		paraprint <<EOF;
+The command you entered was ambiguous. Please type "send", "save" or "subject".
+EOF
+	    }
+	}
+    }
+} # sub NowWhat
+
+sub TrivialSubject {
+    my $subject = shift;
+    if ($subject =~
+	/^(y(es)?|no?|help|perl( (bug|problem))?|bug|problem)$/i ||
+	length($subject) < 4 ||
+	$subject !~ /\s/) {
+	print "\nThe subject you entered wasn't very descriptive. Please try again.\n\n";
+        return 1;
+    } else {
+	return 0;
+    }
+}
+
+sub SaveMessage {
+    my $file_save = $outfile || "$progname.rep";
+    my $file = _prompt( '', "Name of file to save message in", $file_save );
+    save_message_to_disk($file) || return undef;
+    print "\n";
+    paraprint <<EOF;
+A copy of your message has been saved in '$file' for you to
+send to '$address' with your normal mail client.
+EOF
+}
+
+sub Send {
+
+    # Message has been accepted for transmission -- Send the message
+
+    # on linux certain "mail" implementations won't accept the subject
+    # as "~s subject" and thus the Subject header will be corrupted
+    # so don't use Mail::Send to be safe
+    eval {
+        if ( $::HaveSend && !$Is_Linux && !$Is_OpenBSD ) {
+            _send_message_mailsend();
+        } elsif ($Is_VMS) {
+            _send_message_vms();
+        } else {
+            _send_message_sendmail();
+        }
+    };
+
+    if ( my $error = $@ ) {
+        paraprint <<EOF;
+$0 has detected an error while trying to send your message: $error.
+
+Your message may not have been sent. You will now have a chance to save a copy to disk.
+EOF
+        SaveMessage();
+        return;
+    }
+
+    1 while unlink($filename);    # remove all versions under VMS
+}    # sub Send
+
+sub Help {
+    print <<EOF;
+
+This program is designed to help you generate and send bug reports
+(and thank-you notes) about perl5 and the modules which ship with it.
+
+In most cases, you can just run "$0" interactively from a command
+line without any special arguments and follow the prompts.
+
+Advanced usage:
+
+$0  [-v] [-a address] [-s subject] [-b body | -f inpufile ] [ -F outputfile ]
+    [-r returnaddress] [-e editor] [-c adminaddress | -C] [-S] [-t] [-h]
+    [-p patchfile ]
+$0  [-v] [-r returnaddress] [-A] [-ok | -okay | -nok | -nokay]
+
+
+Options:
+
+  -v    Include Verbose configuration data in the report
+  -f    File containing the body of the report. Use this to
+        quickly send a prepared message.
+  -p    File containing a patch or other text attachment. Separate
+        multiple files with commas.
+  -F    File to output the resulting mail message to, instead of mailing.
+  -S    Send without asking for confirmation.
+  -a    Address to send the report to. Defaults to '$address'.
+  -c    Address to send copy of report to. Defaults to '$cc'.
+  -C    Don't send copy to administrator.
+  -s    Subject to include with the message. You will be prompted
+        if you don't supply one on the command line.
+  -b    Body of the report. If not included on the command line, or
+        in a file with -f, you will get a chance to edit the message.
+  -r    Your return address. The program will ask you to confirm
+        this if you don't give it here.
+  -e    Editor to use.
+  -t    Test mode. The target address defaults to '$testaddress'.
+  -T    Thank-you mode. The target address defaults to '$thanksaddress'.
+  -d    Data mode.  This prints out your configuration data, without mailing
+        anything. You can use this with -v to get more complete data.
+  -A    Don't send a bug received acknowledgement to the return address.
+  -ok   Report successful build on this system to perl porters
+        (use alone or with -v). Only use -ok if *everything* was ok:
+        if there were *any* problems at all, use -nok.
+  -okay As -ok but allow report from old builds.
+  -nok  Report unsuccessful build on this system to perl porters
+        (use alone or with -v). You must describe what went wrong
+        in the body of the report which you will be asked to edit.
+  -nokay As -nok but allow report from old builds.
+  -h    Print this help message.
+
+EOF
+}
+
+sub filename {
+    if ($::HaveTemp) {
+	# Good. Use a secure temp file
+	my ($fh, $filename) = File::Temp::tempfile(UNLINK => 1);
+	close($fh);
+	return $filename;
+    } else {
+	# Bah. Fall back to doing things less securely.
+	my $dir = File::Spec->tmpdir();
+	$filename = "bugrep0$$";
+	$filename++ while -e File::Spec->catfile($dir, $filename);
+	$filename = File::Spec->catfile($dir, $filename);
+    }
+}
+
+sub paraprint {
+    my @paragraphs = split /\n{2,}/, "@_";
+    for (@paragraphs) {   # implicit local $_
+	s/(\S)\s*\n/$1 /g;
+	write;
+	print "\n";
+    }
+}
+
+sub _prompt {
+    my ($explanation, $prompt, $default) = (@_);
+    if ($explanation) {
+        print "\n\n";
+        paraprint $explanation;
+    }
+    print $prompt. ($default ? " [$default]" :''). ": ";
+	my $result = scalar(<>);
+    chomp($result);
+	$result =~ s/^\s*(.*?)\s*$/$1/s;
+    if ($default && $result eq '') {
+        return $default;
+    } else {
+        return $result;
+    }
+}
+
+sub _build_header {
+    my %attr = (@_);
+
+    my $head = '';
+    for my $header (keys %attr) {
+        $head .= "$header: ".$attr{$header}."\n";
+    }
+    return $head;
+}
+
+sub _message_headers {
+    my %headers = ( To => $address, Subject => $subject );
+    $headers{'Cc'}         = $cc        if ($cc);
+    $headers{'Message-Id'} = $messageid if ($messageid);
+    $headers{'Reply-To'}   = $from      if ($from);
+    $headers{'From'}       = $from      if ($from);
+    if ($have_attachment) {
+        $headers{'MIME-Version'} = '1.0';
+        $headers{'Content-Type'} = qq{multipart/mixed; boundary=\"$mime_boundary\"};
+    }
+    return \%headers;
+}
+
+sub _add_body_start {
+    my $body_start = <<"BODY_START";
+This is a multi-part message in MIME format.
+--$mime_boundary
+Content-Type: text/plain; format=fixed
+Content-Transfer-Encoding: 8bit
+
+BODY_START
+    return $body_start;
+}
+
+sub _add_attachments {
+    my $attach = '';
+    for my $attachment (split /\s*,\s*/, $attachments) {
+        my $attach_file = basename($attachment);
+        $attach .= <<"ATTACHMENT";
+
+--$mime_boundary
+Content-Type: text/x-patch; name="$attach_file"
+Content-Transfer-Encoding: 8bit
+Content-Disposition: attachment; filename="$attach_file"
+
+ATTACHMENT
+
+        open my $attach_fh, '<:raw', $attachment
+            or die "Couldn't open attachment '$attachment': $!\n";
+        while (<$attach_fh>) { $attach .= $_; }
+        close($attach_fh) or die "Error closing attachment '$attachment': $!";
+    }
+
+    $attach .= "\n--$mime_boundary--\n";
+    return $attach;
+}
+
+sub build_complete_message {
+    my $content = _build_header(%{_message_headers()}) . "\n\n";
+    $content .= _add_body_start() if $have_attachment;
+    open( REP, "<:raw", $filename ) or die "Couldn't open file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (<REP>) { $content .= $_; }
+    close(REP) or die "Error closing report file '$filename': $!";
+    $content .= _add_attachments() if $have_attachment;
+    return $content;
+}
+
+sub save_message_to_disk {
+    my $file = shift;
+
+        open OUTFILE, '>:raw', $file or do { warn  "Couldn't open '$file': $!\n"; return undef};
+        binmode(OUTFILE, ':raw :crlf') if $Is_MSWin32;
+
+        print OUTFILE build_complete_message();
+        close(OUTFILE) or do { warn  "Error closing $file: $!"; return undef };
+	    print "\nMessage saved.\n";
+        return 1;
+}
+
+sub _send_message_vms {
+
+    my $mail_from  = $from;
+    my $rcpt_to_to = $address;
+    my $rcpt_to_cc = $cc;
+
+    map { $_ =~ s/^[^<]*<//;
+          $_ =~ s/>[^>]*//; } ($mail_from, $rcpt_to_to, $rcpt_to_cc);
+
+    if ( open my $sff_fh, '|-:raw', 'MCR TCPIP$SYSTEM:TCPIP$SMTP_SFF.EXE SYS$INPUT:' ) {
+        print $sff_fh "MAIL FROM:<$mail_from>\n";
+        print $sff_fh "RCPT TO:<$rcpt_to_to>\n";
+        print $sff_fh "RCPT TO:<$rcpt_to_cc>\n" if $rcpt_to_cc;
+        print $sff_fh "DATA\n";
+        print $sff_fh build_complete_message();
+        my $success = close $sff_fh;
+        if ($success ) {
+            print "\nMessage sent\n";
+            return;
+        }
+    }
+    die "Mail transport failed (leaving bug report in $filename): $^E\n";
+}
+
+sub _send_message_mailsend {
+    my $msg = Mail::Send->new();
+    my %headers = %{_message_headers()};
+    for my $key ( keys %headers) {
+        $msg->add($key => $headers{$key});
+    }
+
+    $fh = $msg->open;
+    binmode($fh, ':raw');
+    print $fh _add_body_start() if $have_attachment;
+    open(REP, "<:raw", $filename) or die "Couldn't open '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (<REP>) { print $fh $_ }
+    close(REP) or die "Error closing $filename: $!";
+    print $fh _add_attachments() if $have_attachment;
+    $fh->close or die "Error sending mail: $!";
+
+    print "\nMessage sent.\n";
+}
+
+sub _probe_for_sendmail {
+    my $sendmail = "";
+    for (qw(/usr/lib/sendmail /usr/sbin/sendmail /usr/ucblib/sendmail)) {
+        $sendmail = $_, last if -e $_;
+    }
+    if ( $^O eq 'os2' and $sendmail eq "" ) {
+        my $path = $ENV{PATH};
+        $path =~ s:\\:/:;
+        my @path = split /$Config{'path_sep'}/, $path;
+        for (@path) {
+            $sendmail = "$_/sendmail",     last if -e "$_/sendmail";
+            $sendmail = "$_/sendmail.exe", last if -e "$_/sendmail.exe";
+        }
+    }
+    return $sendmail;
+}
+
+sub _send_message_sendmail {
+    my $sendmail = _probe_for_sendmail();
+    unless ($sendmail) {
+        my $message_start = !$Is_Linux && !$Is_OpenBSD ? <<'EOT' : <<'EOT';
+It appears that there is no program which looks like "sendmail" on
+your system and that the Mail::Send library from CPAN isn't available.
+EOT
+It appears that there is no program which looks like "sendmail" on
+your system.
+EOT
+        paraprint(<<"EOF"), die "\n";
+$message_start
+Because of this, there's no easy way to automatically send your
+message.
+
+A copy of your message has been saved in '$filename' for you to
+send to '$address' with your normal mail client.
+EOF
+    }
+
+    open( SENDMAIL, "|-:raw", $sendmail, "-t", "-oi", "-f", $from )
+        || die "'|$sendmail -t -oi -f $from' failed: $!";
+    print SENDMAIL build_complete_message();
+    if ( close(SENDMAIL) ) {
+        print "\nMessage sent\n";
+    } else {
+        warn "\nSendmail returned status '", $? >> 8, "'\n";
+    }
+}
+
+
+
+# a strange way to check whether any significant editing
+# has been done: check whether any new non-empty lines
+# have been added.
+
+sub _fingerprint_lines_in_report {
+    my $new_lines = 0;
+    # read in the report template once so that
+    # we can track whether the user does any editing.
+    # yes, *all* whitespace is ignored.
+
+    open(REP, '<:raw', $filename) or die "Unable to open report file '$filename': $!\n";
+    binmode(REP, ':raw :crlf') if $Is_MSWin32;
+    while (my $line = <REP>) {
+        $line =~ s/\s+//g;
+        $new_lines++ if (!$REP{$line});
+
+    }
+    close(REP) or die "Error closing report file '$filename': $!";
+    # returns the number of lines with content that wasn't there when last we looked
+    return $new_lines;
+}
+
+
+
+format STDOUT =
+^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< ~~
+$_
+.
+
+__END__
+
+=head1 NAME
+
+perlbug - how to submit bug reports on Perl
+
+=head1 SYNOPSIS
+
+B<perlbug>
+
+B<perlbug> S<[ B<-v> ]> S<[ B<-a> I<address> ]> S<[ B<-s> I<subject> ]>
+S<[ B<-b> I<body> | B<-f> I<inputfile> ]> S<[ B<-F> I<outputfile> ]>
+S<[ B<-r> I<returnaddress> ]>
+S<[ B<-e> I<editor> ]> S<[ B<-c> I<adminaddress> | B<-C> ]>
+S<[ B<-S> ]> S<[ B<-t> ]>  S<[ B<-d> ]>  S<[ B<-A> ]>  S<[ B<-h> ]> S<[ B<-T> ]>
+
+B<perlbug> S<[ B<-v> ]> S<[ B<-r> I<returnaddress> ]>
+ S<[ B<-A> ]> S<[ B<-ok> | B<-okay> | B<-nok> | B<-nokay> ]>
+
+B<perlthanks>
+
+=head1 DESCRIPTION
+
+
+This program is designed to help you generate and send bug reports
+(and thank-you notes) about perl5 and the modules which ship with it.
+
+In most cases, you can just run it interactively from a command
+line without any special arguments and follow the prompts.
+
+If you have found a bug with a non-standard port (one that was not
+part of the I<standard distribution>), a binary distribution, or a
+non-core module (such as Tk, DBI, etc), then please see the
+documentation that came with that distribution to determine the
+correct place to report bugs.
+
+If you are unable to send your report using B<perlbug> (most likely
+because your system doesn't have a way to send mail that perlbug
+recognizes), you may be able to use this tool to compose your report
+and save it to a file which you can then send to B<perlbug@perl.org>
+using your regular mail client.
+
+In extreme cases, B<perlbug> may not work well enough on your system
+to guide you through composing a bug report. In those cases, you
+may be able to use B<perlbug -d> to get system configuration
+information to include in a manually composed bug report to
+B<perlbug@perl.org>.
+
+
+When reporting a bug, please run through this checklist:
+
+=over 4
+
+=item What version of Perl you are running?
+
+Type C<perl -v> at the command line to find out.
+
+=item Are you running the latest released version of perl?
+
+Look at http://www.perl.org/ to find out.  If you are not using the
+latest released version, please try to replicate your bug on the
+latest stable release.
+
+Note that reports about bugs in old versions of Perl, especially
+those which indicate you haven't also tested the current stable
+release of Perl, are likely to receive less attention from the
+volunteers who build and maintain Perl than reports about bugs in
+the current release.
+
+This tool isn't appropriate for reporting bugs in any version
+prior to Perl 5.0.
+
+=item Are you sure what you have is a bug?
+
+A significant number of the bug reports we get turn out to be
+documented features in Perl.  Make sure the issue you've run into
+isn't intentional by glancing through the documentation that comes
+with the Perl distribution.
+
+Given the sheer volume of Perl documentation, this isn't a trivial
+undertaking, but if you can point to documentation that suggests
+the behaviour you're seeing is I<wrong>, your issue is likely to
+receive more attention. You may want to start with B<perldoc>
+L<perltrap> for pointers to common traps that new (and experienced)
+Perl programmers run into.
+
+If you're unsure of the meaning of an error message you've run
+across, B<perldoc> L<perldiag> for an explanation.  If the message
+isn't in perldiag, it probably isn't generated by Perl.  You may
+have luck consulting your operating system documentation instead.
+
+If you are on a non-UNIX platform B<perldoc> L<perlport>, as some
+features may be unimplemented or work differently.
+
+You may be able to figure out what's going wrong using the Perl
+debugger.  For information about how to use the debugger B<perldoc>
+L<perldebug>.
+
+=item Do you have a proper test case?
+
+The easier it is to reproduce your bug, the more likely it will be
+fixed -- if nobody can duplicate your problem, it probably won't be 
+addressed.
+
+A good test case has most of these attributes: short, simple code;
+few dependencies on external commands, modules, or libraries; no
+platform-dependent code (unless it's a platform-specific bug);
+clear, simple documentation.
+
+A good test case is almost always a good candidate to be included in
+Perl's test suite.  If you have the time, consider writing your test case so
+that it can be easily included into the standard test suite.
+
+=item Have you included all relevant information?
+
+Be sure to include the B<exact> error messages, if any.
+"Perl gave an error" is not an exact error message.
+
+If you get a core dump (or equivalent), you may use a debugger
+(B<dbx>, B<gdb>, etc) to produce a stack trace to include in the bug
+report.  
+
+NOTE: unless your Perl has been compiled with debug info
+(often B<-g>), the stack trace is likely to be somewhat hard to use
+because it will most probably contain only the function names and not
+their arguments.  If possible, recompile your Perl with debug info and
+reproduce the crash and the stack trace.
+
+=item Can you describe the bug in plain English?
+
+The easier it is to understand a reproducible bug, the more likely
+it will be fixed.  Any insight you can provide into the problem
+will help a great deal.  In other words, try to analyze the problem
+(to the extent you can) and report your discoveries.
+
+=item Can you fix the bug yourself?
+
+If so, that's great news; bug reports with patches are likely to
+receive significantly more attention and interest than those without
+patches.  Please attach your patch to the report using the C<-p> option.
+When sending a patch, create it using C<git format-patch> if possible,
+though a unified diff created with C<diff -pu> will do nearly as well.
+
+Your patch may be returned with requests for changes, or requests for more
+detailed explanations about your fix.
+
+Here are a few hints for creating high-quality patches:
+
+Make sure the patch is not reversed (the first argument to diff is
+typically the original file, the second argument your changed file).
+Make sure you test your patch by applying it with C<git am> or the
+C<patch> program before you send it on its way.  Try to follow the
+same style as the code you are trying to patch.  Make sure your patch
+really does work (C<make test>, if the thing you're patching is covered
+by Perl's test suite).
+
+=item Can you use C<perlbug> to submit the report?
+
+B<perlbug> will, amongst other things, ensure your report includes
+crucial information about your version of perl.  If C<perlbug> is
+unable to mail your report after you have typed it in, you may have
+to compose the message yourself, add the output produced by C<perlbug
+-d> and email it to B<perlbug@perl.org>.  If, for some reason, you
+cannot run C<perlbug> at all on your system, be sure to include the
+entire output produced by running C<perl -V> (note the uppercase V).
+
+Whether you use C<perlbug> or send the email manually, please make
+your Subject line informative.  "a bug" is not informative.  Neither
+is "perl crashes" nor is "HELP!!!".  These don't help.  A compact
+description of what's wrong is fine.
+
+=item Can you use C<perlbug> to submit a thank-you note?
+
+Yes, you can do this by either using the C<-T> option, or by invoking
+the program as C<perlthanks>. Thank-you notes are good. It makes people
+smile. 
+
+=back
+
+Having done your bit, please be prepared to wait, to be told the
+bug is in your code, or possibly to get no reply at all.  The
+volunteers who maintain Perl are busy folks, so if your problem is
+an obvious bug in your own code, is difficult to understand or is
+a duplicate of an existing report, you may not receive a personal
+reply.
+
+If it is important to you that your bug be fixed, do monitor the
+perl5-porters@perl.org mailing list (mailing lists are moderated, your
+message may take a while to show up) and the commit logs to development
+versions of Perl, and encourage the maintainers with kind words or
+offers of frosty beverages.  (Please do be kind to the maintainers.
+Harassing or flaming them is likely to have the opposite effect of the
+one you want.)
+
+Feel free to update the ticket about your bug on http://rt.perl.org
+if a new version of Perl is released and your bug is still present.
+
+=head1 OPTIONS
+
+=over 8
+
+=item B<-a>
+
+Address to send the report to.  Defaults to B<perlbug@perl.org>.
+
+=item B<-A>
+
+Don't send a bug received acknowledgement to the reply address.
+Generally it is only a sensible to use this option if you are a
+perl maintainer actively watching perl porters for your message to
+arrive.
+
+=item B<-b>
+
+Body of the report.  If not included on the command line, or
+in a file with B<-f>, you will get a chance to edit the message.
+
+=item B<-C>
+
+Don't send copy to administrator.
+
+=item B<-c>
+
+Address to send copy of report to.  Defaults to the address of the
+local perl administrator (recorded when perl was built).
+
+=item B<-d>
+
+Data mode (the default if you redirect or pipe output).  This prints out
+your configuration data, without mailing anything.  You can use this
+with B<-v> to get more complete data.
+
+=item B<-e>
+
+Editor to use.
+
+=item B<-f>
+
+File containing the body of the report.  Use this to quickly send a
+prepared message.
+
+=item B<-F>
+
+File to output the results to instead of sending as an email. Useful
+particularly when running perlbug on a machine with no direct internet
+connection.
+
+=item B<-h>
+
+Prints a brief summary of the options.
+
+=item B<-ok>
+
+Report successful build on this system to perl porters. Forces B<-S>
+and B<-C>. Forces and supplies values for B<-s> and B<-b>. Only
+prompts for a return address if it cannot guess it (for use with
+B<make>). Honors return address specified with B<-r>.  You can use this
+with B<-v> to get more complete data.   Only makes a report if this
+system is less than 60 days old.
+
+=item B<-okay>
+
+As B<-ok> except it will report on older systems.
+
+=item B<-nok>
+
+Report unsuccessful build on this system.  Forces B<-C>.  Forces and
+supplies a value for B<-s>, then requires you to edit the report
+and say what went wrong.  Alternatively, a prepared report may be
+supplied using B<-f>.  Only prompts for a return address if it
+cannot guess it (for use with B<make>). Honors return address
+specified with B<-r>.  You can use this with B<-v> to get more
+complete data.  Only makes a report if this system is less than 60
+days old.
+
+=item B<-nokay>
+
+As B<-nok> except it will report on older systems.
+
+=item B<-p>
+
+The names of one or more patch files or other text attachments to be
+included with the report.  Multiple files must be separated with commas.
+
+=item B<-r>
+
+Your return address.  The program will ask you to confirm its default
+if you don't use this option.
+
+=item B<-S>
+
+Send without asking for confirmation.
+
+=item B<-s>
+
+Subject to include with the message.  You will be prompted if you don't
+supply one on the command line.
+
+=item B<-t>
+
+Test mode.  The target address defaults to B<perlbug-test@perl.org>.
+
+=item B<-T>
+
+Send a thank-you note instead of a bug report. 
+
+=item B<-v>
+
+Include verbose configuration data in the report.
+
+=back
+
+=head1 AUTHORS
+
+Kenneth Albanowski (E<lt>kjahds@kjahds.comE<gt>), subsequently
+I<doc>tored by Gurusamy Sarathy (E<lt>gsar@activestate.comE<gt>),
+Tom Christiansen (E<lt>tchrist@perl.comE<gt>), Nathan Torkington
+(E<lt>gnat@frii.comE<gt>), Charles F. Randall (E<lt>cfr@pobox.comE<gt>),
+Mike Guy (E<lt>mjtg@cam.ac.ukE<gt>), Dominic Dunlop
+(E<lt>domo@computer.orgE<gt>), Hugo van der Sanden (E<lt>hv@crypt.orgE<gt>),
+Jarkko Hietaniemi (E<lt>jhi@iki.fiE<gt>), Chris Nandor
+(E<lt>pudge@pobox.comE<gt>), Jon Orwant (E<lt>orwant@media.mit.eduE<gt>,
+Richard Foley (E<lt>richard.foley@rfi.netE<gt>), Jesse Vincent
+(E<lt>jesse@bestpractical.comE<gt>), and Craig A. Berry (E<lt>craigberry@mac.comE<gt>).
+
+=head1 SEE ALSO
+
+perl(1), perldebug(1), perldiag(1), perlport(1), perltrap(1),
+diff(1), patch(1), dbx(1), gdb(1)
+
+=head1 BUGS
+
+None known (guess what must have been used to report them?)
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pg.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pg.exe
new file mode 100644
index 00000000..3ce5294f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pg.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/piconv b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/piconv
new file mode 100644
index 00000000..66a824d4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/piconv
@@ -0,0 +1,321 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!./perl
+# $Id: piconv,v 2.7 2014/05/31 09:48:48 dankogai Exp $
+#
+use 5.8.0;
+use strict;
+use Encode ;
+use Encode::Alias;
+my %Scheme =  map {$_ => 1} qw(from_to decode_encode perlio);
+
+use File::Basename;
+my $name = basename($0);
+
+use Getopt::Long qw(:config no_ignore_case);
+
+my %Opt;
+
+help()
+    unless
+      GetOptions(\%Opt,
+         'from|f=s',
+         'to|t=s',
+         'list|l',
+         'string|s=s',
+         'check|C=i',
+         'c',
+         'perlqq|p',
+         'htmlcref',
+         'xmlcref',
+         'debug|D',
+         'scheme|S=s',
+         'resolve|r=s',
+         'help',
+         );
+
+$Opt{help} and help();
+$Opt{list} and list_encodings();
+my $locale = $ENV{LC_CTYPE} || $ENV{LC_ALL} || $ENV{LANG};
+defined $Opt{resolve} and resolve_encoding($Opt{resolve});
+$Opt{from} || $Opt{to} || help();
+my $from = $Opt{from} || $locale or help("from_encoding unspecified");
+my $to   = $Opt{to}   || $locale or help("to_encoding unspecified");
+$Opt{string} and Encode::from_to($Opt{string}, $from, $to) and print $Opt{string} and exit;
+my $scheme = do {
+    if (defined $Opt{scheme}) {
+	if (!exists $Scheme{$Opt{scheme}}) {
+	    warn "Unknown scheme '$Opt{scheme}', fallback to 'from_to'.\n";
+	    'from_to';
+	} else {
+	    $Opt{scheme};
+	}
+    } else {
+	'from_to';
+    }
+};
+
+$Opt{check} ||= $Opt{c};
+$Opt{perlqq}   and $Opt{check} = Encode::PERLQQ;
+$Opt{htmlcref} and $Opt{check} = Encode::HTMLCREF;
+$Opt{xmlcref}  and $Opt{check} = Encode::XMLCREF;
+
+my $efrom = Encode->getEncoding($from) || die "Unknown encoding '$from'";
+my $eto   = Encode->getEncoding($to)   || die "Unknown encoding '$to'";
+
+my $cfrom = $efrom->name;
+my $cto   = $eto->name;
+
+if ($Opt{debug}){
+    print <<"EOT";
+Scheme: $scheme
+From:   $from => $cfrom
+To:     $to => $cto
+EOT
+}
+
+my %use_bom =
+  map { $_ => 1 } qw/UTF-16 UTF-16BE UTF-16LE UTF-32 UTF-32BE UTF-32LE/;
+
+# we do not use <> (or ARGV) for the sake of binmode()
+@ARGV or push @ARGV, \*STDIN;
+
+unless ( $scheme eq 'perlio' ) {
+    binmode STDOUT;
+    my $need2slurp = $use_bom{ $eto } || $use_bom{ $efrom };
+    for my $argv (@ARGV) {
+        my $ifh = ref $argv ? $argv : undef;
+	$ifh or open $ifh, "<", $argv or warn "Can't open $argv: $!" and next;
+        $ifh or open $ifh, "<", $argv or next;
+        binmode $ifh;
+        if ( $scheme eq 'from_to' ) {    # default
+	    if ($need2slurp){
+		local $/;
+		$_ = <$ifh>;
+		Encode::from_to( $_, $from, $to, $Opt{check} );
+		print;
+	    }else{
+		while (<$ifh>) {
+		    Encode::from_to( $_, $from, $to, $Opt{check} );
+		    print;
+		}
+	    }
+        }
+        elsif ( $scheme eq 'decode_encode' ) {    # step-by-step
+	    if ($need2slurp){
+		local $/;
+		$_ = <$ifh>;
+                my $decoded = decode( $from, $_, $Opt{check} );
+                my $encoded = encode( $to, $decoded );
+                print $encoded;
+	    }else{
+		while (<$ifh>) {
+		    my $decoded = decode( $from, $_, $Opt{check} );
+		    my $encoded = encode( $to, $decoded );
+		    print $encoded;
+		}
+	    }
+	}
+	else {                                    # won't reach
+            die "$name: unknown scheme: $scheme";
+        }
+    }
+}
+else {
+
+    # NI-S favorite
+    binmode STDOUT => "raw:encoding($to)";
+    for my $argv (@ARGV) {
+        my $ifh = ref $argv ? $argv : undef;
+	$ifh or open $ifh, "<", $argv or warn "Can't open $argv: $!" and next;
+        $ifh or open $ifh, "<", $argv or next;
+        binmode $ifh => "raw:encoding($from)";
+        print while (<$ifh>);
+    }
+}
+
+sub list_encodings {
+    print join( "\n", Encode->encodings(":all") ), "\n";
+    exit 0;
+}
+
+sub resolve_encoding {
+    if ( my $alias = Encode::resolve_alias( $_[0] ) ) {
+        print $alias, "\n";
+        exit 0;
+    }
+    else {
+        warn "$name: $_[0] is not known to Encode\n";
+        exit 1;
+    }
+}
+
+sub help {
+    my $message = shift;
+    $message and print STDERR "$name error: $message\n";
+    print STDERR <<"EOT";
+$name [-f from_encoding] [-t to_encoding]
+      [-p|--perlqq|--htmlcref|--xmlcref] [-C N|-c] [-D] [-S scheme]
+      [-s string|file...]
+$name -l
+$name -r encoding_alias
+$name -h
+Common options:
+  -l,--list
+     lists all available encodings
+  -r,--resolve encoding_alias
+    resolve encoding to its (Encode) canonical name
+  -f,--from from_encoding  
+     when omitted, the current locale will be used
+  -t,--to to_encoding    
+     when omitted, the current locale will be used
+  -s,--string string         
+     "string" will be the input instead of STDIN or files
+The following are mainly of interest to Encode hackers:
+  -C N | -c           check the validity of the input
+  -D,--debug          show debug information
+  -S,--scheme scheme  use the scheme for conversion
+Those are handy when you can only see ASCII characters:
+  -p,--perlqq         transliterate characters missing in encoding to \\x{HHHH}
+                      where HHHH is the hexadecimal Unicode code point
+  --htmlcref          transliterate characters missing in encoding to &#NNN;
+                      where NNN is the decimal Unicode code point
+  --xmlcref           transliterate characters missing in encoding to &#xHHHH;
+                      where HHHH is the hexadecimal Unicode code point
+
+EOT
+    exit;
+}
+
+__END__
+
+=head1 NAME
+
+piconv -- iconv(1), reinvented in perl
+
+=head1 SYNOPSIS
+
+  piconv [-f from_encoding] [-t to_encoding]
+         [-p|--perlqq|--htmlcref|--xmlcref] [-C N|-c] [-D] [-S scheme]
+         [-s string|file...]
+  piconv -l
+  piconv -r encoding_alias
+  piconv -h
+
+=head1 DESCRIPTION
+
+B<piconv> is perl version of B<iconv>, a character encoding converter
+widely available for various Unixen today.  This script was primarily
+a technology demonstrator for Perl 5.8.0, but you can use piconv in the
+place of iconv for virtually any case.
+
+piconv converts the character encoding of either STDIN or files
+specified in the argument and prints out to STDOUT.
+
+Here is the list of options.  Some options can be in short format (-f)
+or long (--from) one.
+
+=over 4
+
+=item -f,--from I<from_encoding>
+
+Specifies the encoding you are converting from.  Unlike B<iconv>,
+this option can be omitted.  In such cases, the current locale is used.
+
+=item -t,--to I<to_encoding>
+
+Specifies the encoding you are converting to.  Unlike B<iconv>,
+this option can be omitted.  In such cases, the current locale is used.
+
+Therefore, when both -f and -t are omitted, B<piconv> just acts
+like B<cat>.
+
+=item -s,--string I<string>
+
+uses I<string> instead of file for the source of text.
+
+=item -l,--list
+
+Lists all available encodings, one per line, in case-insensitive
+order.  Note that only the canonical names are listed; many aliases
+exist.  For example, the names are case-insensitive, and many standard
+and common aliases work, such as "latin1" for "ISO-8859-1", or "ibm850"
+instead of "cp850", or "winlatin1" for "cp1252".  See L<Encode::Supported>
+for a full discussion.
+
+=item -r,--resolve I<encoding_alias>
+
+Resolve I<encoding_alias> to Encode canonical encoding name.
+
+=item -C,--check I<N>
+
+Check the validity of the stream if I<N> = 1.  When I<N> = -1, something
+interesting happens when it encounters an invalid character.
+
+=item -c
+
+Same as C<-C 1>.
+
+=item -p,--perlqq
+
+Transliterate characters missing in encoding to \x{HHHH} where HHHH is the
+hexadecimal Unicode code point.
+
+=item --htmlcref
+
+Transliterate characters missing in encoding to &#NNN; where NNN is the
+decimal Unicode code point.
+
+=item --xmlcref
+
+Transliterate characters missing in encoding to &#xHHHH; where HHHH is the
+hexadecimal Unicode code point.
+
+=item -h,--help
+
+Show usage.
+
+=item -D,--debug
+
+Invokes debugging mode.  Primarily for Encode hackers.
+
+=item -S,--scheme I<scheme>
+
+Selects which scheme is to be used for conversion.  Available schemes
+are as follows:
+
+=over 4
+
+=item from_to
+
+Uses Encode::from_to for conversion.  This is the default.
+
+=item decode_encode
+
+Input strings are decode()d then encode()d.  A straight two-step
+implementation.
+
+=item perlio
+
+The new perlIO layer is used.  NI-S' favorite.
+
+You should use this option if you are using UTF-16 and others which
+linefeed is not $/.
+
+=back
+
+Like the I<-D> option, this is also for Encode hackers.
+
+=back
+
+=head1 SEE ALSO
+
+L<iconv(1)>
+L<locale(3)>
+L<Encode>
+L<Encode::Supported>
+L<Encode::Alias>
+L<PerlIO>
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pinky.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pinky.exe
new file mode 100644
index 00000000..b717c786
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pkginfo.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pkginfo.exe
new file mode 100644
index 00000000..517f40fa
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pkginfo.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pl2pm b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pl2pm
new file mode 100644
index 00000000..f4d3c298
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pl2pm
@@ -0,0 +1,378 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+=head1 NAME
+
+pl2pm - Rough tool to translate Perl4 .pl files to Perl5 .pm modules.
+
+=head1 SYNOPSIS
+
+B<pl2pm> F<files>
+
+=head1 DESCRIPTION
+
+B<pl2pm> is a tool to aid in the conversion of Perl4-style .pl
+library files to Perl5-style library modules.  Usually, your old .pl
+file will still work fine and you should only use this tool if you
+plan to update your library to use some of the newer Perl 5 features,
+such as AutoLoading.
+
+=head1 LIMITATIONS
+
+It's just a first step, but it's usually a good first step.
+
+=head1 AUTHOR
+
+Larry Wall <larry@wall.org>
+
+=cut
+
+use strict;
+use warnings;
+
+my %keyword = ();
+
+while (<DATA>) {
+    chomp;
+    $keyword{$_} = 1;
+}
+
+local $/;
+
+while (<>) {
+    my $newname = $ARGV;
+    $newname =~ s/\.pl$/.pm/ || next;
+    $newname =~ s#(.*/)?(\w+)#$1\u$2#;
+    if (-f $newname) {
+	warn "Won't overwrite existing $newname\n";
+	next;
+    }
+    my $oldpack = $2;
+    my $newpack = "\u$2";
+    my @export = ();
+
+    s/\bstd(in|out|err)\b/\U$&/g;
+    s/(sub\s+)(\w+)(\s*\{[ \t]*\n)\s*package\s+$oldpack\s*;[ \t]*\n+/${1}main'$2$3/ig;
+    if (/sub\s+\w+'/) {
+	@export = m/sub\s+\w+'(\w+)/g;
+	s/(sub\s+)main'(\w+)/$1$2/g;
+    }
+    else {
+	@export = m/sub\s+([A-Za-z]\w*)/g;
+    }
+    my @export_ok = grep($keyword{$_}, @export);
+    @export = grep(!$keyword{$_}, @export);
+
+    my %export = ();
+    @export{@export} = (1) x @export;
+
+    s/(^\s*);#/$1#/g;
+    s/(#.*)require ['"]$oldpack\.pl['"]/$1use $newpack/;
+    s/(package\s*)($oldpack)\s*;[ \t]*\n+//ig;
+    s/([\$\@%&*])'(\w+)/&xlate($1,"",$2,$newpack,$oldpack,\%export)/eg;
+    s/([\$\@%&*]?)(\w+)'(\w+)/&xlate($1,$2,$3,$newpack,$oldpack,\%export)/eg;
+    if (!/\$\[\s*\)?\s*=\s*[^0\s]/) {
+	s/^\s*(local\s*\()?\s*\$\[\s*\)?\s*=\s*0\s*;[ \t]*\n//g;
+	s/\$\[\s*\+\s*//g;
+	s/\s*\+\s*\$\[//g;
+	s/\$\[/0/g;
+    }
+    s/open\s+(\w+)/open($1)/g;
+ 
+    my $export_ok = '';
+    my $carp      ='';
+
+
+    if (s/\bdie\b/croak/g) {
+	$carp = "use Carp;\n";
+	s/croak "([^"]*)\\n"/croak "$1"/g;
+    }
+
+    if (@export_ok) {
+	$export_ok = "\@EXPORT_OK = qw(@export_ok);\n";
+    }
+
+    if ( open(PM, ">$newname") ) {
+        print PM <<"END";
+package $newpack;
+use 5.006;
+require Exporter;
+$carp
+\@ISA = qw(Exporter);
+\@EXPORT = qw(@export);
+$export_ok
+$_
+END
+    }
+    else {
+      warn "Can't create $newname: $!\n";
+    }
+}
+
+sub xlate {
+    my ($prefix, $pack, $ident,$newpack,$oldpack,$export) = @_;
+
+    my $xlated ;
+    if ($prefix eq '' && $ident =~ /^(t|s|m|d|ing|ll|ed|ve|re)$/) {
+	$xlated = "${pack}'$ident";
+    }
+    elsif ($pack eq '' || $pack eq 'main') {
+	if ($export->{$ident}) {
+	    $xlated = "$prefix$ident";
+	}
+	else {
+	    $xlated = "$prefix${pack}::$ident";
+	}
+    }
+    elsif ($pack eq $oldpack) {
+	$xlated = "$prefix${newpack}::$ident";
+    }
+    else {
+	$xlated = "$prefix${pack}::$ident";
+    }
+
+    return $xlated;
+}
+__END__
+AUTOLOAD
+BEGIN
+CHECK
+CORE
+DESTROY
+END
+INIT
+UNITCHECK
+abs
+accept
+alarm
+and
+atan2
+bind
+binmode
+bless
+caller
+chdir
+chmod
+chomp
+chop
+chown
+chr
+chroot
+close
+closedir
+cmp
+connect
+continue
+cos
+crypt
+dbmclose
+dbmopen
+defined
+delete
+die
+do
+dump
+each
+else
+elsif
+endgrent
+endhostent
+endnetent
+endprotoent
+endpwent
+endservent
+eof
+eq
+eval
+exec
+exists
+exit
+exp
+fcntl
+fileno
+flock
+for
+foreach
+fork
+format
+formline
+ge
+getc
+getgrent
+getgrgid
+getgrnam
+gethostbyaddr
+gethostbyname
+gethostent
+getlogin
+getnetbyaddr
+getnetbyname
+getnetent
+getpeername
+getpgrp
+getppid
+getpriority
+getprotobyname
+getprotobynumber
+getprotoent
+getpwent
+getpwnam
+getpwuid
+getservbyname
+getservbyport
+getservent
+getsockname
+getsockopt
+glob
+gmtime
+goto
+grep
+gt
+hex
+if
+index
+int
+ioctl
+join
+keys
+kill
+last
+lc
+lcfirst
+le
+length
+link
+listen
+local
+localtime
+lock
+log
+lstat
+lt
+m
+map
+mkdir
+msgctl
+msgget
+msgrcv
+msgsnd
+my
+ne
+next
+no
+not
+oct
+open
+opendir
+or
+ord
+our
+pack
+package
+pipe
+pop
+pos
+print
+printf
+prototype
+push
+q
+qq
+qr
+quotemeta
+qw
+qx
+rand
+read
+readdir
+readline
+readlink
+readpipe
+recv
+redo
+ref
+rename
+require
+reset
+return
+reverse
+rewinddir
+rindex
+rmdir
+s
+scalar
+seek
+seekdir
+select
+semctl
+semget
+semop
+send
+setgrent
+sethostent
+setnetent
+setpgrp
+setpriority
+setprotoent
+setpwent
+setservent
+setsockopt
+shift
+shmctl
+shmget
+shmread
+shmwrite
+shutdown
+sin
+sleep
+socket
+socketpair
+sort
+splice
+split
+sprintf
+sqrt
+srand
+stat
+study
+sub
+substr
+symlink
+syscall
+sysopen
+sysread
+sysseek
+system
+syswrite
+tell
+telldir
+tie
+tied
+time
+times
+tr
+truncate
+uc
+ucfirst
+umask
+undef
+unless
+unlink
+unpack
+unshift
+untie
+until
+use
+utime
+values
+vec
+wait
+waitpid
+wantarray
+warn
+while
+write
+x
+xor
+y
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pldd.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pldd.exe
new file mode 100644
index 00000000..8f112c5f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pldd.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2html b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2html
new file mode 100644
index 00000000..a7fd725a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2html
@@ -0,0 +1,224 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+=pod
+
+=head1 NAME
+
+pod2html - convert .pod files to .html files
+
+=head1 SYNOPSIS
+
+    pod2html --help --htmldir=<name> --htmlroot=<URL>
+             --infile=<name> --outfile=<name>
+             --podpath=<name>:...:<name> --podroot=<name>
+             --cachedir=<name> --flush --recurse --norecurse
+             --quiet --noquiet --verbose --noverbose
+             --index --noindex --backlink --nobacklink
+             --header --noheader --poderrors --nopoderrors
+             --css=<URL> --title=<name>
+
+=head1 DESCRIPTION
+
+Converts files from pod format (see L<perlpod>) to HTML format.
+
+=head1 ARGUMENTS
+
+pod2html takes the following arguments:
+
+=over 4
+
+=item help
+
+  --help
+
+Displays the usage message.
+
+=item htmldir
+
+  --htmldir=name
+
+Sets the directory to which all cross references in the resulting HTML file
+will be relative. Not passing this causes all links to be absolute since this
+is the value that tells Pod::Html the root of the documentation tree.
+
+Do not use this and --htmlroot in the same call to pod2html; they are mutually
+exclusive.
+
+=item htmlroot
+
+  --htmlroot=URL
+
+Sets the base URL for the HTML files.  When cross-references are made, the
+HTML root is prepended to the URL.
+
+Do not use this if relative links are desired: use --htmldir instead.
+
+Do not pass both this and --htmldir to pod2html; they are mutually exclusive.
+
+=item infile
+
+  --infile=name
+
+Specify the pod file to convert.  Input is taken from STDIN if no
+infile is specified.
+
+=item outfile
+
+  --outfile=name
+
+Specify the HTML file to create.  Output goes to STDOUT if no outfile
+is specified.
+
+=item podroot
+
+  --podroot=name
+
+Specify the base directory for finding library pods.
+
+=item podpath
+
+  --podpath=name:...:name
+
+Specify which subdirectories of the podroot contain pod files whose
+HTML converted forms can be linked-to in cross-references.
+
+=item cachedir
+
+  --cachedir=name
+
+Specify which directory is used for storing cache. Default directory is the
+current working directory.
+
+=item flush
+
+  --flush
+
+Flush the cache.
+
+=item backlink
+
+  --backlink
+
+Turn =head1 directives into links pointing to the top of the HTML file.
+
+=item nobacklink
+
+  --nobacklink
+
+Do not turn =head1 directives into links pointing to the top of the HTML file
+(default behaviour).
+
+=item header
+
+  --header
+
+Create header and footer blocks containing the text of the "NAME" section.
+
+=item noheader
+
+  --noheader
+
+Do not create header and footer blocks containing the text of the "NAME"
+section (default behaviour).
+
+=item poderrors
+
+  --poderrors
+
+Include a "POD ERRORS" section in the outfile if there were any POD errors in
+the infile (default behaviour).
+
+=item nopoderrors
+
+  --nopoderrors
+
+Do not include a "POD ERRORS" section in the outfile if there were any POD
+errors in the infile.
+
+=item index
+
+  --index
+
+Generate an index at the top of the HTML file (default behaviour).
+
+=item noindex
+
+  --noindex
+
+Do not generate an index at the top of the HTML file.
+
+
+=item recurse
+
+  --recurse
+
+Recurse into subdirectories specified in podpath (default behaviour).
+
+=item norecurse
+
+  --norecurse
+
+Do not recurse into subdirectories specified in podpath.
+
+=item css
+
+  --css=URL
+
+Specify the URL of cascading style sheet to link from resulting HTML file.
+Default is none style sheet.
+
+=item title
+
+  --title=title
+
+Specify the title of the resulting HTML file.
+
+=item quiet
+
+  --quiet
+
+Don't display mostly harmless warning messages.
+
+=item noquiet
+
+  --noquiet
+
+Display mostly harmless warning messages (default behaviour). But this is not
+the same as "verbose" mode.
+
+=item verbose
+
+  --verbose
+
+Display progress messages.
+
+=item noverbose
+
+  --noverbose
+
+Do not display progress messages (default behaviour).
+
+=back
+
+=head1 AUTHOR
+
+Tom Christiansen, E<lt>tchrist@perl.comE<gt>.
+
+=head1 BUGS
+
+See L<Pod::Html> for a list of known bugs in the translator.
+
+=head1 SEE ALSO
+
+L<perlpod>, L<Pod::Html>
+
+=head1 COPYRIGHT
+
+This program is distributed under the Artistic License.
+
+=cut
+
+use Pod::Html;
+
+pod2html @ARGV;
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2man b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2man
new file mode 100644
index 00000000..36223f04
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2man
@@ -0,0 +1,359 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+        if $running_under_some_shell;
+
+# pod2man -- Convert POD data to formatted *roff input.
+#
+# Copyright 1999, 2000, 2001, 2004, 2006, 2008, 2010, 2012, 2013
+#     Russ Allbery <rra@stanford.edu>
+#
+# This program is free software; you may redistribute it and/or modify it
+# under the same terms as Perl itself.
+
+require 5.004;
+
+use Getopt::Long qw(GetOptions);
+use Pod::Man ();
+use Pod::Usage qw(pod2usage);
+
+use strict;
+
+# Clean up $0 for error reporting.
+$0 =~ s%.*/%%;
+
+# Insert -- into @ARGV before any single dash argument to hide it from
+# Getopt::Long; we want to interpret it as meaning stdin.
+my $stdin;
+@ARGV = map { $_ eq '-' && !$stdin++ ? ('--', $_) : $_ } @ARGV;
+
+# Parse our options, trying to retain backward compatibility with pod2man but
+# allowing short forms as well.  --lax is currently ignored.
+my %options;
+Getopt::Long::config ('bundling_override');
+GetOptions (\%options, 'center|c=s', 'date|d=s', 'errors=s', 'fixed=s',
+            'fixedbold=s', 'fixeditalic=s', 'fixedbolditalic=s', 'help|h',
+            'lax|l', 'name|n=s', 'nourls', 'official|o', 'quotes|q=s',
+            'release|r:s', 'section|s=s', 'stderr', 'verbose|v', 'utf8|u')
+    or exit 1;
+pod2usage (0) if $options{help};
+
+# Official sets --center, but don't override things explicitly set.
+if ($options{official} && !defined $options{center}) {
+    $options{center} = 'Perl Programmers Reference Guide';
+}
+
+# Verbose is only our flag, not a Pod::Man flag.
+my $verbose = $options{verbose};
+delete $options{verbose};
+
+# This isn't a valid Pod::Man option and is only accepted for backward
+# compatibility.
+delete $options{lax};
+
+# If neither stderr nor errors is set, default to errors = die.
+if (!defined $options{stderr} && !defined $options{errors}) {
+    $options{errors} = 'die';
+}
+
+# Initialize and run the formatter, pulling a pair of input and output off at
+# a time.  For each file, we check whether the document was completely empty
+# and, if so, will remove the created file and exit with a non-zero exit
+# status.
+my $parser = Pod::Man->new (%options);
+my $status = 0;
+my @files;
+do {
+    @files = splice (@ARGV, 0, 2);
+    print "  $files[1]\n" if $verbose;
+    $parser->parse_from_file (@files);
+    if ($parser->{CONTENTLESS}) {
+        $status = 1;
+        warn "$0: unable to format $files[0]\n";
+        if (defined ($files[1]) and $files[1] ne '-') {
+            unlink $files[1] unless (-s $files[1]);
+        }
+    }
+} while (@ARGV);
+exit $status;
+
+__END__
+
+=for stopwords
+en em --stderr stderr --utf8 UTF-8 overdo markup MT-LEVEL Allbery Solaris
+URL troff troff-specific formatters uppercased Christiansen --nourls
+
+=head1 NAME
+
+pod2man - Convert POD data to formatted *roff input
+
+=head1 SYNOPSIS
+
+pod2man [B<--center>=I<string>] [B<--date>=I<string>] [B<--errors>=I<style>]
+    [B<--fixed>=I<font>] [B<--fixedbold>=I<font>] [B<--fixeditalic>=I<font>]
+    [B<--fixedbolditalic>=I<font>] [B<--name>=I<name>] [B<--nourls>]
+    [B<--official>] [B<--quotes>=I<quotes>] [B<--release>[=I<version>]]
+    [B<--section>=I<manext>] [B<--stderr>] [B<--utf8>] [B<--verbose>]
+    [I<input> [I<output>] ...]
+
+pod2man B<--help>
+
+=head1 DESCRIPTION
+
+B<pod2man> is a front-end for Pod::Man, using it to generate *roff input
+from POD source.  The resulting *roff code is suitable for display on a
+terminal using nroff(1), normally via man(1), or printing using troff(1).
+
+I<input> is the file to read for POD source (the POD can be embedded in
+code).  If I<input> isn't given, it defaults to C<STDIN>.  I<output>, if
+given, is the file to which to write the formatted output.  If I<output>
+isn't given, the formatted output is written to C<STDOUT>.  Several POD
+files can be processed in the same B<pod2man> invocation (saving module
+load and compile times) by providing multiple pairs of I<input> and
+I<output> files on the command line.
+
+B<--section>, B<--release>, B<--center>, B<--date>, and B<--official> can
+be used to set the headers and footers to use; if not given, Pod::Man will
+assume various defaults.  See below or L<Pod::Man> for details.
+
+B<pod2man> assumes that your *roff formatters have a fixed-width font
+named C<CW>.  If yours is called something else (like C<CR>), use
+B<--fixed> to specify it.  This generally only matters for troff output
+for printing.  Similarly, you can set the fonts used for bold, italic, and
+bold italic fixed-width output.
+
+Besides the obvious pod conversions, Pod::Man, and therefore pod2man also
+takes care of formatting func(), func(n), and simple variable references
+like $foo or @bar so you don't have to use code escapes for them; complex
+expressions like C<$fred{'stuff'}> will still need to be escaped, though.
+It also translates dashes that aren't used as hyphens into en dashes, makes
+long dashes--like this--into proper em dashes, fixes "paired quotes," and
+takes care of several other troff-specific tweaks.  See L<Pod::Man> for
+complete information.
+
+=head1 OPTIONS
+
+=over 4
+
+=item B<-c> I<string>, B<--center>=I<string>
+
+Sets the centered page header to I<string>.  The default is "User
+Contributed Perl Documentation", but also see B<--official> below.
+
+=item B<-d> I<string>, B<--date>=I<string>
+
+Set the left-hand footer string to this value.  By default, the modification
+date of the input file will be used, or the current date if input comes from
+C<STDIN>.
+
+=item B<-errors>=I<style>
+
+Set the error handling style.  C<die> says to throw an exception on any
+POD formatting error.  C<stderr> says to report errors on standard error,
+but not to throw an exception.  C<pod> says to include a POD ERRORS
+section in the resulting documentation summarizing the errors.  C<none>
+ignores POD errors entirely, as much as possible.
+
+The default is C<die>.
+
+=item B<--fixed>=I<font>
+
+The fixed-width font to use for verbatim text and code.  Defaults to
+C<CW>.  Some systems may want C<CR> instead.  Only matters for troff(1)
+output.
+
+=item B<--fixedbold>=I<font>
+
+Bold version of the fixed-width font.  Defaults to C<CB>.  Only matters
+for troff(1) output.
+
+=item B<--fixeditalic>=I<font>
+
+Italic version of the fixed-width font (actually, something of a misnomer,
+since most fixed-width fonts only have an oblique version, not an italic
+version).  Defaults to C<CI>.  Only matters for troff(1) output.
+
+=item B<--fixedbolditalic>=I<font>
+
+Bold italic (probably actually oblique) version of the fixed-width font.
+Pod::Man doesn't assume you have this, and defaults to C<CB>.  Some
+systems (such as Solaris) have this font available as C<CX>.  Only matters
+for troff(1) output.
+
+=item B<-h>, B<--help>
+
+Print out usage information.
+
+=item B<-l>, B<--lax>
+
+No longer used.  B<pod2man> used to check its input for validity as a
+manual page, but this should now be done by L<podchecker(1)> instead.
+Accepted for backward compatibility; this option no longer does anything.
+
+=item B<-n> I<name>, B<--name>=I<name>
+
+Set the name of the manual page to I<name>.  Without this option, the manual
+name is set to the uppercased base name of the file being converted unless
+the manual section is 3, in which case the path is parsed to see if it is a
+Perl module path.  If it is, a path like C<.../lib/Pod/Man.pm> is converted
+into a name like C<Pod::Man>.  This option, if given, overrides any
+automatic determination of the name.
+
+Note that this option is probably not useful when converting multiple POD
+files at once.  The convention for Unix man pages for commands is for the
+man page title to be in all-uppercase even if the command isn't.
+
+=item B<--nourls>
+
+Normally, LZ<><> formatting codes with a URL but anchor text are formatted
+to show both the anchor text and the URL.  In other words:
+
+    L<foo|http://example.com/>
+
+is formatted as:
+
+    foo <http://example.com/>
+
+This flag, if given, suppresses the URL when anchor text is given, so this
+example would be formatted as just C<foo>.  This can produce less
+cluttered output in cases where the URLs are not particularly important.
+
+=item B<-o>, B<--official>
+
+Set the default header to indicate that this page is part of the standard
+Perl release, if B<--center> is not also given.
+
+=item B<-q> I<quotes>, B<--quotes>=I<quotes>
+
+Sets the quote marks used to surround CE<lt>> text to I<quotes>.  If
+I<quotes> is a single character, it is used as both the left and right
+quote; if I<quotes> is two characters, the first character is used as the
+left quote and the second as the right quoted; and if I<quotes> is four
+characters, the first two are used as the left quote and the second two as
+the right quote.
+
+I<quotes> may also be set to the special value C<none>, in which case no
+quote marks are added around CE<lt>> text (but the font is still changed for
+troff output).
+
+=item B<-r>, B<--release>
+
+Set the centered footer.  By default, this is the version of Perl you run
+B<pod2man> under.  Note that some system an macro sets assume that the
+centered footer will be a modification date and will prepend something like
+"Last modified: "; if this is the case, you may want to set B<--release> to
+the last modified date and B<--date> to the version number.
+
+=item B<-s>, B<--section>
+
+Set the section for the C<.TH> macro.  The standard section numbering
+convention is to use 1 for user commands, 2 for system calls, 3 for
+functions, 4 for devices, 5 for file formats, 6 for games, 7 for
+miscellaneous information, and 8 for administrator commands.  There is a lot
+of variation here, however; some systems (like Solaris) use 4 for file
+formats, 5 for miscellaneous information, and 7 for devices.  Still others
+use 1m instead of 8, or some mix of both.  About the only section numbers
+that are reliably consistent are 1, 2, and 3.
+
+By default, section 1 will be used unless the file ends in C<.pm>, in
+which case section 3 will be selected.
+
+=item B<--stderr>
+
+By default, B<pod2man> dies if any errors are detected in the POD input.
+If B<--stderr> is given and no B<--errors> flag is present, errors are
+sent to standard error, but B<pod2man> does not abort.  This is equivalent
+to C<--errors=stderr> and is supported for backward compatibility.
+
+=item B<-u>, B<--utf8>
+
+By default, B<pod2man> produces the most conservative possible *roff
+output to try to ensure that it will work with as many different *roff
+implementations as possible.  Many *roff implementations cannot handle
+non-ASCII characters, so this means all non-ASCII characters are converted
+either to a *roff escape sequence that tries to create a properly accented
+character (at least for troff output) or to C<X>.
+
+This option says to instead output literal UTF-8 characters.  If your
+*roff implementation can handle it, this is the best output format to use
+and avoids corruption of documents containing non-ASCII characters.
+However, be warned that *roff source with literal UTF-8 characters is not
+supported by many implementations and may even result in segfaults and
+other bad behavior.
+
+Be aware that, when using this option, the input encoding of your POD
+source must be properly declared unless it is US-ASCII or Latin-1.  POD
+input without an C<=encoding> command will be assumed to be in Latin-1,
+and if it's actually in UTF-8, the output will be double-encoded.  See
+L<perlpod(1)> for more information on the C<=encoding> command.
+
+=item B<-v>, B<--verbose>
+
+Print out the name of each output file as it is being generated.
+
+=back
+
+=head1 EXIT STATUS
+
+As long as all documents processed result in some output, even if that
+output includes errata (a C<POD ERRORS> section generated with
+C<--errors=pod>), B<pod2man> will exit with status 0.  If any of the
+documents being processed do not result in an output document, B<pod2man>
+will exit with status 1.  If there are syntax errors in a POD document
+being processed and the error handling style is set to the default of
+C<die>, B<pod2man> will abort immediately with exit status 255.
+
+=head1 DIAGNOSTICS
+
+If B<pod2man> fails with errors, see L<Pod::Man> and L<Pod::Simple> for
+information about what those errors might mean.
+
+=head1 EXAMPLES
+
+    pod2man program > program.1
+    pod2man SomeModule.pm /usr/perl/man/man3/SomeModule.3
+    pod2man --section=7 note.pod > note.7
+
+If you would like to print out a lot of man page continuously, you probably
+want to set the C and D registers to set contiguous page numbering and
+even/odd paging, at least on some versions of man(7).
+
+    troff -man -rC1 -rD1 perl.1 perldata.1 perlsyn.1 ...
+
+To get index entries on C<STDERR>, turn on the F register, as in:
+
+    troff -man -rF1 perl.1
+
+The indexing merely outputs messages via C<.tm> for each major page,
+section, subsection, item, and any C<XE<lt>E<gt>> directives.  See
+L<Pod::Man> for more details.
+
+=head1 BUGS
+
+Lots of this documentation is duplicated from L<Pod::Man>.
+
+=head1 SEE ALSO
+
+L<Pod::Man>, L<Pod::Simple>, L<man(1)>, L<nroff(1)>, L<perlpod(1)>,
+L<podchecker(1)>, L<perlpodstyle(1)>, L<troff(1)>, L<man(7)>
+
+The man page documenting the an macro set may be L<man(5)> instead of
+L<man(7)> on your system.
+
+The current version of this script is always available from its web site at
+L<http://www.eyrie.org/~eagle/software/podlators/>.  It is also part of the
+Perl core distribution as of 5.6.0.
+
+=head1 AUTHOR
+
+Russ Allbery <rra@stanford.edu>, based I<very> heavily on the original
+B<pod2man> by Larry Wall and Tom Christiansen.
+
+=head1 COPYRIGHT AND LICENSE
+
+Copyright 1999, 2000, 2001, 2004, 2006, 2008, 2010, 2012, 2013 Russ
+Allbery <rra@stanford.edu>.
+
+This program is free software; you may redistribute it and/or modify it
+under the same terms as Perl itself.
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2text b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2text
new file mode 100644
index 00000000..8addb6e3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2text
@@ -0,0 +1,325 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+        if $running_under_some_shell;
+
+# pod2text -- Convert POD data to formatted ASCII text.
+#
+# Copyright 1999, 2000, 2001, 2004, 2006, 2008, 2010, 2012, 2013
+#     Russ Allbery <rra@stanford.edu>
+#
+# This program is free software; you may redistribute it and/or modify it
+# under the same terms as Perl itself.
+#
+# The driver script for Pod::Text, Pod::Text::Termcap, and Pod::Text::Color,
+# invoked by perldoc -t among other things.
+
+require 5.004;
+
+use Getopt::Long qw(GetOptions);
+use Pod::Text ();
+use Pod::Usage qw(pod2usage);
+
+use strict;
+
+# Clean up $0 for error reporting.
+$0 =~ s%.*/%%;
+
+# Take an initial pass through our options, looking for one of the form
+# -<number>.  We turn that into -w <number> for compatibility with the
+# original pod2text script.
+for (my $i = 0; $i < @ARGV; $i++) {
+    last if $ARGV[$i] =~ /^--$/;
+    if ($ARGV[$i] =~ /^-(\d+)$/) {
+        splice (@ARGV, $i++, 1, '-w', $1);
+    }
+}
+
+# Insert -- into @ARGV before any single dash argument to hide it from
+# Getopt::Long; we want to interpret it as meaning stdin (which Pod::Simple
+# does correctly).
+my $stdin;
+@ARGV = map { $_ eq '-' && !$stdin++ ? ('--', $_) : $_ } @ARGV;
+
+# Parse our options.  Use the same names as Pod::Text for simplicity, and
+# default to sentence boundaries turned off for compatibility.
+my %options;
+$options{sentence} = 0;
+Getopt::Long::config ('bundling');
+GetOptions (\%options, 'alt|a', 'code', 'color|c', 'errors=s', 'help|h',
+            'indent|i=i', 'loose|l', 'margin|left-margin|m=i', 'nourls',
+            'overstrike|o', 'quotes|q=s', 'sentence|s', 'stderr', 'termcap|t',
+            'utf8|u', 'width|w=i')
+    or exit 1;
+pod2usage (1) if $options{help};
+
+# Figure out what formatter we're going to use.  -c overrides -t.
+my $formatter = 'Pod::Text';
+if ($options{color}) {
+    $formatter = 'Pod::Text::Color';
+    eval { require Term::ANSIColor };
+    if ($@) { die "-c (--color) requires Term::ANSIColor be installed\n" }
+    require Pod::Text::Color;
+} elsif ($options{termcap}) {
+    $formatter = 'Pod::Text::Termcap';
+    require Pod::Text::Termcap;
+} elsif ($options{overstrike}) {
+    $formatter = 'Pod::Text::Overstrike';
+    require Pod::Text::Overstrike;
+}
+delete @options{'color', 'termcap', 'overstrike'};
+
+# If neither stderr nor errors is set, default to errors = die.
+if (!defined $options{stderr} && !defined $options{errors}) {
+    $options{errors} = 'die';
+}
+
+# Initialize and run the formatter.
+my $parser = $formatter->new (%options);
+my $status = 0;
+do {
+    my ($input, $output) = splice (@ARGV, 0, 2);
+    $parser->parse_from_file ($input, $output);
+    if ($parser->{CONTENTLESS}) {
+        $status = 1;
+        warn "$0: unable to format $input\n";
+        if (defined ($output) and $output ne '-') {
+            unlink $output unless (-s $output);
+        }
+    }
+} while (@ARGV);
+exit $status;
+
+__END__
+
+=for stopwords
+-aclostu --alt --stderr Allbery --overstrike overstrike --termcap --utf8
+UTF-8 subclasses --nourls
+
+=head1 NAME
+
+pod2text - Convert POD data to formatted ASCII text
+
+=head1 SYNOPSIS
+
+pod2text [B<-aclostu>] [B<--code>] [B<--errors>=I<style>] [B<-i> I<indent>]
+    S<[B<-q> I<quotes>]> [B<--nourls>] [B<--stderr>] S<[B<-w> I<width>]>
+    [I<input> [I<output> ...]]
+
+pod2text B<-h>
+
+=head1 DESCRIPTION
+
+B<pod2text> is a front-end for Pod::Text and its subclasses.  It uses them
+to generate formatted ASCII text from POD source.  It can optionally use
+either termcap sequences or ANSI color escape sequences to format the text.
+
+I<input> is the file to read for POD source (the POD can be embedded in
+code).  If I<input> isn't given, it defaults to C<STDIN>.  I<output>, if
+given, is the file to which to write the formatted output.  If I<output>
+isn't given, the formatted output is written to C<STDOUT>.  Several POD
+files can be processed in the same B<pod2text> invocation (saving module
+load and compile times) by providing multiple pairs of I<input> and
+I<output> files on the command line.
+
+=head1 OPTIONS
+
+=over 4
+
+=item B<-a>, B<--alt>
+
+Use an alternate output format that, among other things, uses a different
+heading style and marks C<=item> entries with a colon in the left margin.
+
+=item B<--code>
+
+Include any non-POD text from the input file in the output as well.  Useful
+for viewing code documented with POD blocks with the POD rendered and the
+code left intact.
+
+=item B<-c>, B<--color>
+
+Format the output with ANSI color escape sequences.  Using this option
+requires that Term::ANSIColor be installed on your system.
+
+=item B<-i> I<indent>, B<--indent=>I<indent>
+
+Set the number of spaces to indent regular text, and the default indentation
+for C<=over> blocks.  Defaults to 4 spaces if this option isn't given.
+
+=item B<-errors>=I<style>
+
+Set the error handling style.  C<die> says to throw an exception on any
+POD formatting error.  C<stderr> says to report errors on standard error,
+but not to throw an exception.  C<pod> says to include a POD ERRORS
+section in the resulting documentation summarizing the errors.  C<none>
+ignores POD errors entirely, as much as possible.
+
+The default is C<die>.
+
+=item B<-h>, B<--help>
+
+Print out usage information and exit.
+
+=item B<-l>, B<--loose>
+
+Print a blank line after a C<=head1> heading.  Normally, no blank line is
+printed after C<=head1>, although one is still printed after C<=head2>,
+because this is the expected formatting for manual pages; if you're
+formatting arbitrary text documents, using this option is recommended.
+
+=item B<-m> I<width>, B<--left-margin>=I<width>, B<--margin>=I<width>
+
+The width of the left margin in spaces.  Defaults to 0.  This is the margin
+for all text, including headings, not the amount by which regular text is
+indented; for the latter, see B<-i> option.
+
+=item B<--nourls>
+
+Normally, LZ<><> formatting codes with a URL but anchor text are formatted
+to show both the anchor text and the URL.  In other words:
+
+    L<foo|http://example.com/>
+
+is formatted as:
+
+    foo <http://example.com/>
+
+This flag, if given, suppresses the URL when anchor text is given, so this
+example would be formatted as just C<foo>.  This can produce less
+cluttered output in cases where the URLs are not particularly important.
+
+=item B<-o>, B<--overstrike>
+
+Format the output with overstrike printing.  Bold text is rendered as
+character, backspace, character.  Italics and file names are rendered as
+underscore, backspace, character.  Many pagers, such as B<less>, know how
+to convert this to bold or underlined text.
+
+=item B<-q> I<quotes>, B<--quotes>=I<quotes>
+
+Sets the quote marks used to surround CE<lt>> text to I<quotes>.  If
+I<quotes> is a single character, it is used as both the left and right
+quote; if I<quotes> is two characters, the first character is used as the
+left quote and the second as the right quoted; and if I<quotes> is four
+characters, the first two are used as the left quote and the second two as
+the right quote.
+
+I<quotes> may also be set to the special value C<none>, in which case no
+quote marks are added around CE<lt>> text.
+
+=item B<-s>, B<--sentence>
+
+Assume each sentence ends with two spaces and try to preserve that spacing.
+Without this option, all consecutive whitespace in non-verbatim paragraphs
+is compressed into a single space.
+
+=item B<--stderr>
+
+By default, B<pod2text> dies if any errors are detected in the POD input.
+If B<--stderr> is given and no B<--errors> flag is present, errors are
+sent to standard error, but B<pod2text> does not abort.  This is
+equivalent to C<--errors=stderr> and is supported for backward
+compatibility.
+
+=item B<-t>, B<--termcap>
+
+Try to determine the width of the screen and the bold and underline
+sequences for the terminal from termcap, and use that information in
+formatting the output.  Output will be wrapped at two columns less than the
+width of your terminal device.  Using this option requires that your system
+have a termcap file somewhere where Term::Cap can find it and requires that
+your system support termios.  With this option, the output of B<pod2text>
+will contain terminal control sequences for your current terminal type.
+
+=item B<-u>, B<--utf8>
+
+By default, B<pod2text> tries to use the same output encoding as its input
+encoding (to be backward-compatible with older versions).  This option
+says to instead force the output encoding to UTF-8.
+
+Be aware that, when using this option, the input encoding of your POD
+source must be properly declared unless it is US-ASCII or Latin-1.  POD
+input without an C<=encoding> command will be assumed to be in Latin-1,
+and if it's actually in UTF-8, the output will be double-encoded.  See
+L<perlpod(1)> for more information on the C<=encoding> command.
+
+=item B<-w>, B<--width=>I<width>, B<->I<width>
+
+The column at which to wrap text on the right-hand side.  Defaults to 76,
+unless B<-t> is given, in which case it's two columns less than the width of
+your terminal device.
+
+=back
+
+=head1 EXIT STATUS
+
+As long as all documents processed result in some output, even if that
+output includes errata (a C<POD ERRORS> section generated with
+C<--errors=pod>), B<pod2text> will exit with status 0.  If any of the
+documents being processed do not result in an output document, B<pod2text>
+will exit with status 1.  If there are syntax errors in a POD document
+being processed and the error handling style is set to the default of
+C<die>, B<pod2text> will abort immediately with exit status 255.
+
+=head1 DIAGNOSTICS
+
+If B<pod2text> fails with errors, see L<Pod::Text> and L<Pod::Simple> for
+information about what those errors might mean.  Internally, it can also
+produce the following diagnostics:
+
+=over 4
+
+=item -c (--color) requires Term::ANSIColor be installed
+
+(F) B<-c> or B<--color> were given, but Term::ANSIColor could not be
+loaded.
+
+=item Unknown option: %s
+
+(F) An unknown command line option was given.
+
+=back
+
+In addition, other L<Getopt::Long> error messages may result from invalid
+command-line options.
+
+=head1 ENVIRONMENT
+
+=over 4
+
+=item COLUMNS
+
+If B<-t> is given, B<pod2text> will take the current width of your screen
+from this environment variable, if available.  It overrides terminal width
+information in TERMCAP.
+
+=item TERMCAP
+
+If B<-t> is given, B<pod2text> will use the contents of this environment
+variable if available to determine the correct formatting sequences for your
+current terminal device.
+
+=back
+
+=head1 SEE ALSO
+
+L<Pod::Text>, L<Pod::Text::Color>, L<Pod::Text::Overstrike>,
+L<Pod::Text::Termcap>, L<Pod::Simple>, L<perlpod(1)>
+
+The current version of this script is always available from its web site at
+L<http://www.eyrie.org/~eagle/software/podlators/>.  It is also part of the
+Perl core distribution as of 5.6.0.
+
+=head1 AUTHOR
+
+Russ Allbery <rra@stanford.edu>.
+
+=head1 COPYRIGHT AND LICENSE
+
+Copyright 1999, 2000, 2001, 2004, 2006, 2008, 2010, 2012, 2013 Russ
+Allbery <rra@stanford.edu>.
+
+This program is free software; you may redistribute it and/or modify it
+under the same terms as Perl itself.
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2usage b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2usage
new file mode 100644
index 00000000..e9613bf9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pod2usage
@@ -0,0 +1,151 @@
+#!/usr/bin/perl
+    eval 'exec perl -S $0 "$@"'
+        if 0;
+
+#############################################################################
+# pod2usage -- command to print usage messages from embedded pod docs
+#
+# Copyright (c) 1996-2000 by Bradford Appleton. All rights reserved.
+# This file is part of "PodParser". PodParser is free software;
+# you can redistribute it and/or modify it under the same terms
+# as Perl itself.
+#############################################################################
+
+use strict;
+#use diagnostics;
+
+=head1 NAME
+
+pod2usage - print usage messages from embedded pod docs in files
+
+=head1 SYNOPSIS
+
+=over 12
+
+=item B<pod2usage>
+
+[B<-help>]
+[B<-man>]
+[B<-exit>S< >I<exitval>]
+[B<-output>S< >I<outfile>]
+[B<-verbose> I<level>]
+[B<-pathlist> I<dirlist>]
+[B<-formatter> I<module>]
+I<file>
+
+=back
+
+=head1 OPTIONS AND ARGUMENTS
+
+=over 8
+
+=item B<-help>
+
+Print a brief help message and exit.
+
+=item B<-man>
+
+Print this command's manual page and exit.
+
+=item B<-exit> I<exitval>
+
+The exit status value to return.
+
+=item B<-output> I<outfile>
+
+The output file to print to. If the special names "-" or ">&1" or ">&STDOUT"
+are used then standard output is used. If ">&2" or ">&STDERR" is used then
+standard error is used.
+
+=item B<-verbose> I<level>
+
+The desired level of verbosity to use:
+
+    1 : print SYNOPSIS only
+    2 : print SYNOPSIS sections and any OPTIONS/ARGUMENTS sections
+    3 : print the entire manpage (similar to running pod2text)
+
+=item B<-pathlist> I<dirlist>
+
+Specifies one or more directories to search for the input file if it
+was not supplied with an absolute path. Each directory path in the given
+list should be separated by a ':' on Unix (';' on MSWin32 and DOS).
+
+=item B<-formatter> I<module>
+
+Which text formatter to use. Default is L<Pod::Text>, or for very old
+Perl versions L<Pod::PlainText>. An alternative would be e.g. 
+L<Pod::Text::Termcap>.
+
+=item I<file>
+
+The pathname of a file containing pod documentation to be output in
+usage message format (defaults to standard input).
+
+=back
+
+=head1 DESCRIPTION
+
+B<pod2usage> will read the given input file looking for pod
+documentation and will print the corresponding usage message.
+If no input file is specified then standard input is read.
+
+B<pod2usage> invokes the B<pod2usage()> function in the B<Pod::Usage>
+module. Please see L<Pod::Usage/pod2usage()>.
+
+=head1 SEE ALSO
+
+L<Pod::Usage>, L<pod2text(1)>
+
+=head1 AUTHOR
+
+Please report bugs using L<http://rt.cpan.org>.
+
+Brad Appleton E<lt>bradapp@enteract.comE<gt>
+
+Based on code for B<pod2text(1)> written by
+Tom Christiansen E<lt>tchrist@mox.perl.comE<gt>
+
+=cut
+
+use Getopt::Long;
+
+## Define options
+my %options = ();
+my @opt_specs = (
+    'help',
+    'man',
+    'exit=i',
+    'output=s',
+    'pathlist=s',
+    'formatter=s',
+    'verbose=i',
+);
+
+## Parse options
+GetOptions(\%options, @opt_specs)  ||  pod2usage(2);
+$Pod::Usage::Formatter = $options{formatter} if $options{formatter};
+require Pod::Usage;
+Pod::Usage->import();
+pod2usage(1)  if ($options{help});
+pod2usage(VERBOSE => 2)  if ($options{man});
+
+## Dont default to STDIN if connected to a terminal
+pod2usage(2) if ((@ARGV == 0) && (-t STDIN));
+
+@ARGV = ('-')  unless (@ARGV);
+if (@ARGV > 1) {
+    print STDERR "pod2usage: Too many filenames given\n\n";
+    pod2usage(2);
+}
+
+my %usage = ();
+$usage{-input}    = shift(@ARGV);
+$usage{-exitval}  = $options{'exit'}      if (defined $options{'exit'});
+$usage{-output}   = $options{'output'}    if (defined $options{'output'});
+$usage{-verbose}  = $options{'verbose'}   if (defined $options{'verbose'});
+$usage{-pathlist} = $options{'pathlist'}  if (defined $options{'pathlist'});
+
+pod2usage(\%usage);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podchecker b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podchecker
new file mode 100644
index 00000000..9bd3cd2d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podchecker
@@ -0,0 +1,145 @@
+#!/usr/bin/perl
+    eval 'exec perl -S $0 "$@"'
+        if 0;
+#############################################################################
+# podchecker -- command to invoke the podchecker function in Pod::Checker
+#
+# Copyright (c) 1998-2000 by Bradford Appleton. All rights reserved.
+# This file is part of "PodParser". PodParser is free software;
+# you can redistribute it and/or modify it under the same terms
+# as Perl itself.
+#############################################################################
+
+use strict;
+#use diagnostics;
+
+=head1 NAME
+
+podchecker - check the syntax of POD format documentation files
+
+=head1 SYNOPSIS
+
+B<podchecker> [B<-help>] [B<-man>] [B<-(no)warnings>] [I<file>S< >...]
+
+=head1 OPTIONS AND ARGUMENTS
+
+=over 8
+
+=item B<-help>
+
+Print a brief help message and exit.
+
+=item B<-man>
+
+Print the manual page and exit.
+
+=item B<-warnings> B<-nowarnings>
+
+Turn on/off printing of warnings. Repeating B<-warnings> increases the
+warning level, i.e. more warnings are printed. Currently increasing to
+level two causes flagging of unescaped "E<lt>,E<gt>" characters.
+
+=item I<file>
+
+The pathname of a POD file to syntax-check (defaults to standard input).
+
+=back
+
+=head1 DESCRIPTION
+
+B<podchecker> will read the given input files looking for POD
+syntax errors in the POD documentation and will print any errors
+it find to STDERR. At the end, it will print a status message
+indicating the number of errors found.
+
+Directories are ignored, an appropriate warning message is printed.
+
+B<podchecker> invokes the B<podchecker()> function exported by B<Pod::Checker>
+Please see L<Pod::Checker/podchecker()> for more details.
+
+=head1 RETURN VALUE
+
+B<podchecker> returns a 0 (zero) exit status if all specified
+POD files are ok.
+
+=head1 ERRORS
+
+B<podchecker> returns the exit status 1 if at least one of
+the given POD files has syntax errors.
+
+The status 2 indicates that at least one of the specified 
+files does not contain I<any> POD commands.
+
+Status 1 overrides status 2. If you want unambiguous
+results, call B<podchecker> with one single argument only.
+
+=head1 SEE ALSO
+
+L<Pod::Parser> and L<Pod::Checker>
+
+=head1 AUTHORS
+
+Please report bugs using L<http://rt.cpan.org>.
+
+Brad Appleton E<lt>bradapp@enteract.comE<gt>,
+Marek Rouchal E<lt>marekr@cpan.orgE<gt>
+
+Based on code for B<Pod::Text::pod2text(1)> written by
+Tom Christiansen E<lt>tchrist@mox.perl.comE<gt>
+
+=cut
+
+
+use Pod::Checker;
+use Pod::Usage;
+use Getopt::Long;
+
+## Define options
+my %options;
+
+## Parse options
+GetOptions(\%options, qw(help man warnings+ nowarnings))  ||  pod2usage(2);
+pod2usage(1)  if ($options{help});
+pod2usage(-verbose => 2)  if ($options{man});
+
+if($options{nowarnings}) {
+  $options{warnings} = 0;
+}
+elsif(!defined $options{warnings}) {
+  $options{warnings} = 1; # default is warnings on
+}
+
+## Dont default to STDIN if connected to a terminal
+pod2usage(2) if ((@ARGV == 0) && (-t STDIN));
+
+## Invoke podchecker()
+my $status = 0;
+@ARGV = qw(-) unless(@ARGV);
+for my $podfile (@ARGV) {
+    if($podfile eq '-') {
+      $podfile = '<&STDIN';
+    }
+    elsif(-d $podfile) {
+      warn "podchecker: Warning: Ignoring directory '$podfile'\n";
+      next;
+    }
+    my $errors =
+      podchecker($podfile, undef, '-warnings' => $options{warnings});
+    if($errors > 0) {
+        # errors occurred
+        $status = 1;
+        printf STDERR ("%s has %d pod syntax %s.\n",
+          $podfile, $errors,
+          ($errors == 1) ? 'error' : 'errors');
+    }
+    elsif($errors < 0) {
+        # no pod found
+        $status = 2 unless($status);
+        print STDERR "$podfile does not contain any pod commands.\n";
+    }
+    else {
+        print STDERR "$podfile pod syntax OK.\n";
+    }
+}
+exit $status;
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podselect b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podselect
new file mode 100644
index 00000000..fb887ad1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/podselect
@@ -0,0 +1,104 @@
+#!/usr/bin/perl
+    eval 'exec perl -S $0 "$@"'
+        if 0;
+
+#############################################################################
+# podselect -- command to invoke the podselect function in Pod::Select
+#
+# Copyright (c) 1996-2000 by Bradford Appleton. All rights reserved.
+# This file is part of "PodParser". PodParser is free software;
+# you can redistribute it and/or modify it under the same terms
+# as Perl itself.
+#############################################################################
+
+use strict;
+#use diagnostics;
+
+=head1 NAME
+
+podselect - print selected sections of pod documentation on standard output
+
+=head1 SYNOPSIS
+
+B<podselect> [B<-help>] [B<-man>] [B<-section>S< >I<section-spec>]
+[I<file>S< >...]
+
+=head1 OPTIONS AND ARGUMENTS
+
+=over 8
+
+=item B<-help>
+
+Print a brief help message and exit.
+
+=item B<-man>
+
+Print the manual page and exit.
+
+=item B<-section>S< >I<section-spec>
+
+Specify a section to include in the output.
+See L<Pod::Parser/"SECTION SPECIFICATIONS">
+for the format to use for I<section-spec>.
+This option may be given multiple times on the command line.
+
+=item I<file>
+
+The pathname of a file from which to select sections of pod
+documentation (defaults to standard input).
+
+=back
+
+=head1 DESCRIPTION
+
+B<podselect> will read the given input files looking for pod
+documentation and will print out (in raw pod format) all sections that
+match one ore more of the given section specifications. If no section
+specifications are given than all pod sections encountered are output.
+
+B<podselect> invokes the B<podselect()> function exported by B<Pod::Select>
+Please see L<Pod::Select/podselect()> for more details.
+
+=head1 SEE ALSO
+
+L<Pod::Parser> and L<Pod::Select>
+
+=head1 AUTHOR
+
+Please report bugs using L<http://rt.cpan.org>.
+
+Brad Appleton E<lt>bradapp@enteract.comE<gt>
+
+Based on code for B<Pod::Text::pod2text(1)> written by
+Tom Christiansen E<lt>tchrist@mox.perl.comE<gt>
+
+=cut
+
+use Pod::Select;
+use Pod::Usage;
+use Getopt::Long;
+
+## Define options
+my %options = (
+        'help'     => 0,
+        'man'      => 0,
+        'sections' => [],
+);
+
+## Parse options
+GetOptions(\%options, 'help', 'man', 'sections|select=s@')  ||  pod2usage(2);
+pod2usage(1)  if ($options{help});
+pod2usage(-verbose => 2)  if ($options{man});
+
+## Dont default to STDIN if connected to a terminal
+pod2usage(2) if ((@ARGV == 0) && (-t STDIN));
+
+## Invoke podselect().
+if (@{ $options{'sections'} } > 0) {
+    podselect({ -sections => $options{'sections'} }, @ARGV);
+}
+else {
+    podselect(@ARGV);
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pr.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pr.exe
new file mode 100644
index 00000000..8b01ba95
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pr.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printenv.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printenv.exe
new file mode 100644
index 00000000..db579710
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printenv.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printf.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printf.exe
new file mode 100644
index 00000000..d47ba0ce
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/printf.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/prove b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/prove
new file mode 100644
index 00000000..54f32f64
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/prove
@@ -0,0 +1,408 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl -w
+
+use strict;
+use warnings;
+use App::Prove;
+
+my $app = App::Prove->new;
+$app->process_args(@ARGV);
+exit( $app->run ? 0 : 1 );
+
+__END__
+
+=head1 NAME
+
+prove - Run tests through a TAP harness.
+
+=head1 USAGE
+
+ prove [options] [files or directories]
+
+=head1 OPTIONS
+
+Boolean options:
+
+ -v,  --verbose         Print all test lines.
+ -l,  --lib             Add 'lib' to the path for your tests (-Ilib).
+ -b,  --blib            Add 'blib/lib' and 'blib/arch' to the path for
+                        your tests
+ -s,  --shuffle         Run the tests in random order.
+ -c,  --color           Colored test output (default).
+      --nocolor         Do not color test output.
+      --count           Show the X/Y test count when not verbose
+                        (default)
+      --nocount         Disable the X/Y test count.
+ -D   --dry             Dry run. Show test that would have run.
+ -f,  --failures        Show failed tests.
+ -o,  --comments        Show comments.
+      --ignore-exit     Ignore exit status from test scripts.
+ -m,  --merge           Merge test scripts' STDERR with their STDOUT.
+ -r,  --recurse         Recursively descend into directories.
+      --reverse         Run the tests in reverse order.
+ -q,  --quiet           Suppress some test output while running tests.
+ -Q,  --QUIET           Only print summary results.
+ -p,  --parse           Show full list of TAP parse errors, if any.
+      --directives      Only show results with TODO or SKIP directives.
+      --timer           Print elapsed time after each test.
+      --trap            Trap Ctrl-C and print summary on interrupt.
+      --normalize       Normalize TAP output in verbose output
+ -T                     Enable tainting checks.
+ -t                     Enable tainting warnings.
+ -W                     Enable fatal warnings.
+ -w                     Enable warnings.
+ -h,  --help            Display this help
+ -?,                    Display this help
+ -V,  --version         Display the version
+ -H,  --man             Longer manpage for prove
+      --norc            Don't process default .proverc
+
+Options that take arguments:
+
+ -I                     Library paths to include.
+ -P                     Load plugin (searches App::Prove::Plugin::*.)
+ -M                     Load a module.
+ -e,  --exec            Interpreter to run the tests ('' for compiled
+                        tests.)
+      --ext             Set the extension for tests (default '.t')
+      --harness         Define test harness to use.  See TAP::Harness.
+      --formatter       Result formatter to use. See FORMATTERS.
+      --source          Load and/or configure a SourceHandler. See
+                        SOURCE HANDLERS.
+ -a,  --archive out.tgz Store the resulting TAP in an archive file.
+ -j,  --jobs N          Run N test jobs in parallel (try 9.)
+      --state=opts      Control prove's persistent state.
+      --rc=rcfile       Process options from rcfile
+      --rules           Rules for parallel vs sequential processing.
+
+=head1 NOTES
+
+=head2 .proverc
+
+If F<~/.proverc> or F<./.proverc> exist they will be read and any
+options they contain processed before the command line options. Options
+in F<.proverc> are specified in the same way as command line options:
+
+    # .proverc
+    --state=hot,fast,save
+    -j9
+
+Additional option files may be specified with the C<--rc> option.
+Default option file processing is disabled by the C<--norc> option.
+
+Under Windows and VMS the option file is named F<_proverc> rather than
+F<.proverc> and is sought only in the current directory.
+
+=head2 Reading from C<STDIN>
+
+If you have a list of tests (or URLs, or anything else you want to test) in a
+file, you can add them to your tests by using a '-':
+
+ prove - < my_list_of_things_to_test.txt
+
+See the C<README> in the C<examples> directory of this distribution.
+
+=head2 Default Test Directory
+
+If no files or directories are supplied, C<prove> looks for all files
+matching the pattern C<t/*.t>.
+
+=head2 Colored Test Output
+
+Colored test output using L<TAP::Formatter::Color> is the default, but 
+if output is not to a terminal, color is disabled. You can override this by 
+adding the C<--color> switch.
+
+Color support requires L<Term::ANSIColor> on Unix-like platforms and
+L<Win32::Console> on windows. If the necessary module is not installed
+colored output will not be available.
+
+=head2 Exit Code
+
+If the tests fail C<prove> will exit with non-zero status.
+
+=head2 Arguments to Tests
+
+It is possible to supply arguments to tests. To do so separate them from
+prove's own arguments with the arisdottle, '::'. For example
+
+ prove -v t/mytest.t :: --url http://example.com
+
+would run F<t/mytest.t> with the options '--url http://example.com'.
+When running multiple tests they will each receive the same arguments.
+
+=head2 C<--exec>
+
+Normally you can just pass a list of Perl tests and the harness will know how
+to execute them.  However, if your tests are not written in Perl or if you
+want all tests invoked exactly the same way, use the C<-e>, or C<--exec>
+switch:
+
+ prove --exec '/usr/bin/ruby -w' t/
+ prove --exec '/usr/bin/perl -Tw -mstrict -Ilib' t/
+ prove --exec '/path/to/my/customer/exec'
+
+=head2 C<--merge>
+
+If you need to make sure your diagnostics are displayed in the correct
+order relative to test results you can use the C<--merge> option to
+merge the test scripts' STDERR into their STDOUT.
+
+This guarantees that STDOUT (where the test results appear) and STDERR
+(where the diagnostics appear) will stay in sync. The harness will
+display any diagnostics your tests emit on STDERR.
+
+Caveat: this is a bit of a kludge. In particular note that if anything
+that appears on STDERR looks like a test result the test harness will
+get confused. Use this option only if you understand the consequences
+and can live with the risk.
+
+=head2 C<--trap>
+
+The C<--trap> option will attempt to trap SIGINT (Ctrl-C) during a test
+run and display the test summary even if the run is interrupted
+
+=head2 C<--state>
+
+You can ask C<prove> to remember the state of previous test runs and
+select and/or order the tests to be run based on that saved state.
+
+The C<--state> switch requires an argument which must be a comma
+separated list of one or more of the following options.
+
+=over
+
+=item C<last>
+
+Run the same tests as the last time the state was saved. This makes it
+possible, for example, to recreate the ordering of a shuffled test.
+
+    # Run all tests in random order
+    $ prove -b --state=save --shuffle
+
+    # Run them again in the same order
+    $ prove -b --state=last
+
+=item C<failed>
+
+Run only the tests that failed on the last run.
+
+    # Run all tests
+    $ prove -b --state=save
+
+    # Run failures
+    $ prove -b --state=failed
+
+If you also specify the C<save> option newly passing tests will be
+excluded from subsequent runs.
+
+    # Repeat until no more failures
+    $ prove -b --state=failed,save
+
+=item C<passed>
+
+Run only the passed tests from last time. Useful to make sure that no
+new problems have been introduced.
+
+=item C<all>
+
+Run all tests in normal order. Multple options may be specified, so to
+run all tests with the failures from last time first:
+
+    $ prove -b --state=failed,all,save
+
+=item C<hot>
+
+Run the tests that most recently failed first. The last failure time of
+each test is stored. The C<hot> option causes tests to be run in most-recent-
+failure order.
+
+    $ prove -b --state=hot,save
+
+Tests that have never failed will not be selected. To run all tests with
+the most recently failed first use
+
+    $ prove -b --state=hot,all,save
+
+This combination of options may also be specified thus
+
+    $ prove -b --state=adrian
+
+=item C<todo>
+
+Run any tests with todos.
+
+=item C<slow>
+
+Run the tests in slowest to fastest order. This is useful in conjunction
+with the C<-j> parallel testing switch to ensure that your slowest tests
+start running first.
+
+    $ prove -b --state=slow -j9
+
+=item C<fast>
+
+Run test tests in fastest to slowest order.
+
+=item C<new>
+
+Run the tests in newest to oldest order based on the modification times
+of the test scripts.
+
+=item C<old>
+
+Run the tests in oldest to newest order.
+
+=item C<fresh>
+
+Run those test scripts that have been modified since the last test run.
+
+=item C<save>
+
+Save the state on exit. The state is stored in a file called F<.prove>
+(F<_prove> on Windows and VMS) in the current directory.
+
+=back
+
+The C<--state> switch may be used more than once.
+
+    $ prove -b --state=hot --state=all,save
+
+=head2 --rules
+
+The C<--rules> option is used to control which tests are run sequentially and
+which are run in parallel, if the C<--jobs> option is specified. The option may
+be specified multiple times, and the order matters.
+
+The most practical use is likely to specify that some tests are not
+"parallel-ready".  Since mentioning a file with --rules doesn't cause it to
+be selected to run as a test, you can "set and forget" some rules preferences in
+your .proverc file. Then you'll be able to take maximum advantage of the
+performance benefits of parallel testing, while some exceptions are still run
+in parallel.
+
+=head3 --rules examples
+
+    # All tests are allowed to run in parallel, except those starting with "p"
+    --rules='seq=t/p*.t' --rules='par=**'
+
+    # All tests must run in sequence except those starting with "p", which should be run parallel
+    --rules='par=t/p*.t'
+
+=head3 --rules resolution
+
+=over 4
+
+=item * By default, all tests are eligible to be run in parallel. Specifying any of your own rules removes this one.
+
+=item * "First match wins". The first rule that matches a test will be the one that applies.
+
+=item * Any test which does not match a rule will be run in sequence at the end of the run.
+
+=item * The existence of a rule does not imply selecting a test. You must still specify the tests to run.
+
+=item * Specifying a rule to allow tests to run in parallel does not make them run in parallel. You still need specify the number of parallel C<jobs> in your Harness object.
+
+=back
+
+=head3 --rules Glob-style pattern matching
+
+We implement our own glob-style pattern matching for --rules. Here are the
+supported patterns:
+
+    ** is any number of characters, including /, within a pathname
+    * is zero or more characters within a filename/directory name
+    ? is exactly one character within a filename/directory name
+    {foo,bar,baz} is any of foo, bar or baz.
+    \ is an escape character
+
+=head3 More advanced specifications for parallel vs sequence run rules
+
+If you need more advanced management of what runs in parallel vs in sequence, see
+the associated 'rules' documentation in L<TAP::Harness> and L<TAP::Parser::Scheduler>.
+If what's possible directly through C<prove> is not sufficient, you can write your own
+harness to access these features directly.
+
+=head2 @INC
+
+prove introduces a separation between "options passed to the perl which
+runs prove" and "options passed to the perl which runs tests"; this
+distinction is by design. Thus the perl which is running a test starts
+with the default C<@INC>. Additional library directories can be added
+via the C<PERL5LIB> environment variable, via -Ifoo in C<PERL5OPT> or
+via the C<-Ilib> option to F<prove>.
+
+=head2 Taint Mode
+
+Normally when a Perl program is run in taint mode the contents of the
+C<PERL5LIB> environment variable do not appear in C<@INC>.
+
+Because C<PERL5LIB> is often used during testing to add build
+directories to C<@INC> prove passes the names of any directories found
+in C<PERL5LIB> as -I switches. The net effect of this is that
+C<PERL5LIB> is honoured even when prove is run in taint mode.
+
+
+=head1 FORMATTERS
+
+You can load a custom L<TAP::Parser::Formatter>:
+
+  prove --formatter MyFormatter
+
+=head1 SOURCE HANDLERS
+
+You can load custom L<TAP::Parser::SourceHandler>s, to change the way the
+parser interprets particular I<sources> of TAP.
+
+  prove --source MyHandler --source YetAnother t
+
+If you want to provide config to the source you can use:
+
+  prove --source MyCustom \
+        --source Perl --perl-option 'foo=bar baz' --perl-option avg=0.278 \
+        --source File --file-option extensions=.txt --file-option extensions=.tmp t
+        --source pgTAP --pgtap-option pset=format=html --pgtap-option pset=border=2
+
+Each C<--$source-option> option must specify a key/value pair separated by an
+C<=>. If an option can take multiple values, just specify it multiple times,
+as with the C<extensions=> examples above. If the option should be a hash
+reference, specify the value as a second pair separated by a C<=>, as in the
+C<pset=> examples above (escape C<=> with a backslash).
+
+All C<--sources> are combined into a hash, and passed to L<TAP::Harness/new>'s
+C<sources> parameter.
+
+See L<TAP::Parser::IteratorFactory> for more details on how configuration is
+passed to I<SourceHandlers>.
+
+=head1 PLUGINS
+
+Plugins can be loaded using the C<< -PI<plugin> >> syntax, eg:
+
+  prove -PMyPlugin
+
+This will search for a module named C<App::Prove::Plugin::MyPlugin>, or failing
+that, C<MyPlugin>.  If the plugin can't be found, C<prove> will complain & exit.
+
+You can pass arguments to your plugin by appending C<=arg1,arg2,etc> to the
+plugin name:
+
+  prove -PMyPlugin=fou,du,fafa
+
+Please check individual plugin documentation for more details.
+
+=head2 Available Plugins
+
+For an up-to-date list of plugins available, please check CPAN:
+
+L<http://search.cpan.org/search?query=App%3A%3AProve+Plugin>
+
+=head2 Writing Plugins
+
+Please see L<App::Prove/PLUGINS>.
+
+=cut
+
+# vim:ts=4:sw=4:et:sta
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ps.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ps.exe
new file mode 100644
index 00000000..7998ba71
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ps.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pstruct b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pstruct
new file mode 100644
index 00000000..2e3293be
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/pstruct
@@ -0,0 +1,1367 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#
+#
+#   c2ph (aka pstruct)
+#   Tom Christiansen, <tchrist@convex.com>
+#
+#   As pstruct, dump C structures as generated from 'cc -g -S' stabs.
+#   As c2ph, do this PLUS generate perl code for getting at the structures.
+#
+#   See the usage message for more.  If this isn't enough, read the code.
+#
+
+=head1 NAME
+
+c2ph, pstruct - Dump C structures as generated from C<cc -g -S> stabs
+
+=head1 SYNOPSIS
+
+    c2ph [-dpnP] [var=val] [files ...]
+
+=head2 OPTIONS
+
+    Options:
+
+    -w	wide; short for: type_width=45 member_width=35 offset_width=8
+    -x	hex; short for:  offset_fmt=x offset_width=08 size_fmt=x size_width=04
+
+    -n	do not generate perl code  (default when invoked as pstruct)
+    -p	generate perl code         (default when invoked as c2ph)
+    -v	generate perl code, with C decls as comments
+
+    -i	do NOT recompute sizes for intrinsic datatypes
+    -a	dump information on intrinsics also
+
+    -t	trace execution
+    -d	spew reams of debugging output
+
+    -slist  give comma-separated list a structures to dump
+
+=head1 DESCRIPTION
+
+The following is the old c2ph.doc documentation by Tom Christiansen
+<tchrist@perl.com>
+Date: 25 Jul 91 08:10:21 GMT
+
+Once upon a time, I wrote a program called pstruct.  It was a perl
+program that tried to parse out C structures and display their member
+offsets for you.  This was especially useful for people looking at
+binary dumps or poking around the kernel.
+
+Pstruct was not a pretty program.  Neither was it particularly robust.
+The problem, you see, was that the C compiler was much better at parsing
+C than I could ever hope to be.
+
+So I got smart:  I decided to be lazy and let the C compiler parse the C,
+which would spit out debugger stabs for me to read.  These were much
+easier to parse.  It's still not a pretty program, but at least it's more
+robust.
+
+Pstruct takes any .c or .h files, or preferably .s ones, since that's
+the format it is going to massage them into anyway, and spits out
+listings like this:
+
+ struct tty {
+   int                          tty.t_locker                         000      4
+   int                          tty.t_mutex_index                    004      4
+   struct tty *                 tty.t_tp_virt                        008      4
+   struct clist                 tty.t_rawq                           00c     20
+     int                        tty.t_rawq.c_cc                      00c      4
+     int                        tty.t_rawq.c_cmax                    010      4
+     int                        tty.t_rawq.c_cfx                     014      4
+     int                        tty.t_rawq.c_clx                     018      4
+     struct tty *               tty.t_rawq.c_tp_cpu                  01c      4
+     struct tty *               tty.t_rawq.c_tp_iop                  020      4
+     unsigned char *            tty.t_rawq.c_buf_cpu                 024      4
+     unsigned char *            tty.t_rawq.c_buf_iop                 028      4
+   struct clist                 tty.t_canq                           02c     20
+     int                        tty.t_canq.c_cc                      02c      4
+     int                        tty.t_canq.c_cmax                    030      4
+     int                        tty.t_canq.c_cfx                     034      4
+     int                        tty.t_canq.c_clx                     038      4
+     struct tty *               tty.t_canq.c_tp_cpu                  03c      4
+     struct tty *               tty.t_canq.c_tp_iop                  040      4
+     unsigned char *            tty.t_canq.c_buf_cpu                 044      4
+     unsigned char *            tty.t_canq.c_buf_iop                 048      4
+   struct clist                 tty.t_outq                           04c     20
+     int                        tty.t_outq.c_cc                      04c      4
+     int                        tty.t_outq.c_cmax                    050      4
+     int                        tty.t_outq.c_cfx                     054      4
+     int                        tty.t_outq.c_clx                     058      4
+     struct tty *               tty.t_outq.c_tp_cpu                  05c      4
+     struct tty *               tty.t_outq.c_tp_iop                  060      4
+     unsigned char *            tty.t_outq.c_buf_cpu                 064      4
+     unsigned char *            tty.t_outq.c_buf_iop                 068      4
+   (*int)()                     tty.t_oproc_cpu                      06c      4
+   (*int)()                     tty.t_oproc_iop                      070      4
+   (*int)()                     tty.t_stopproc_cpu                   074      4
+   (*int)()                     tty.t_stopproc_iop                   078      4
+   struct thread *              tty.t_rsel                           07c      4
+
+etc.
+
+
+Actually, this was generated by a particular set of options.  You can control
+the formatting of each column, whether you prefer wide or fat, hex or decimal,
+leading zeroes or whatever.
+
+All you need to be able to use this is a C compiler than generates
+BSD/GCC-style stabs.  The B<-g> option on native BSD compilers and GCC
+should get this for you.
+
+To learn more, just type a bogus option, like B<-\?>, and a long usage message
+will be provided.  There are a fair number of possibilities.
+
+If you're only a C programmer, than this is the end of the message for you.
+You can quit right now, and if you care to, save off the source and run it
+when you feel like it.  Or not.
+
+
+
+But if you're a perl programmer, then for you I have something much more
+wondrous than just a structure offset printer.
+
+You see, if you call pstruct by its other incybernation, c2ph, you have a code
+generator that translates C code into perl code!  Well, structure and union
+declarations at least, but that's quite a bit.
+
+Prior to this point, anyone programming in perl who wanted to interact
+with C programs, like the kernel, was forced to guess the layouts of
+the C structures, and then hardwire these into his program.  Of course,
+when you took your wonderfully crafted program to a system where the
+sgtty structure was laid out differently, your program broke.  Which is
+a shame.
+
+We've had Larry's h2ph translator, which helped, but that only works on
+cpp symbols, not real C, which was also very much needed.  What I offer
+you is a symbolic way of getting at all the C structures.  I've couched
+them in terms of packages and functions.  Consider the following program:
+
+    #!/usr/local/bin/perl
+
+    require 'syscall.ph';
+    require 'sys/time.ph';
+    require 'sys/resource.ph';
+
+    $ru = "\0" x &rusage'sizeof();
+
+    syscall(&SYS_getrusage, &RUSAGE_SELF, $ru)      && die "getrusage: $!";
+
+    @ru = unpack($t = &rusage'typedef(), $ru);
+
+    $utime =  $ru[ &rusage'ru_utime + &timeval'tv_sec  ]
+	   + ($ru[ &rusage'ru_utime + &timeval'tv_usec ]) / 1e6;
+
+    $stime =  $ru[ &rusage'ru_stime + &timeval'tv_sec  ]
+	   + ($ru[ &rusage'ru_stime + &timeval'tv_usec ]) / 1e6;
+
+    printf "you have used %8.3fs+%8.3fu seconds.\n", $utime, $stime;
+
+
+As you see, the name of the package is the name of the structure.  Regular
+fields are just their own names.  Plus the following accessor functions are
+provided for your convenience:
+
+    struct	This takes no arguments, and is merely the number of first-level
+		elements in the structure.  You would use this for indexing
+		into arrays of structures, perhaps like this
+
+
+		    $usec = $u[ &user'u_utimer
+				+ (&ITIMER_VIRTUAL * &itimerval'struct)
+				+ &itimerval'it_value
+				+ &timeval'tv_usec
+			      ];
+
+    sizeof   	Returns the bytes in the structure, or the member if
+	     	you pass it an argument, such as
+
+			&rusage'sizeof(&rusage'ru_utime)
+
+    typedef  	This is the perl format definition for passing to pack and
+	     	unpack.  If you ask for the typedef of a nothing, you get
+	     	the whole structure, otherwise you get that of the member
+	     	you ask for.  Padding is taken care of, as is the magic to
+	     	guarantee that a union is unpacked into all its aliases.
+	     	Bitfields are not quite yet supported however.
+
+    offsetof	This function is the byte offset into the array of that
+		member.  You may wish to use this for indexing directly
+		into the packed structure with vec() if you're too lazy
+		to unpack it.
+
+    typeof	Not to be confused with the typedef accessor function, this
+		one returns the C type of that field.  This would allow
+		you to print out a nice structured pretty print of some
+		structure without knoning anything about it beforehand.
+		No args to this one is a noop.  Someday I'll post such
+		a thing to dump out your u structure for you.
+
+
+The way I see this being used is like basically this:
+
+	% h2ph <some_include_file.h  >  /usr/lib/perl/tmp.ph
+	% c2ph  some_include_file.h  >> /usr/lib/perl/tmp.ph
+	% install
+
+It's a little tricker with c2ph because you have to get the includes right.
+I can't know this for your system, but it's not usually too terribly difficult.
+
+The code isn't pretty as I mentioned  -- I never thought it would be a 1000-
+line program when I started, or I might not have begun. :-)  But I would have
+been less cavalier in how the parts of the program communicated with each
+other, etc.  It might also have helped if I didn't have to divine the makeup
+of the stabs on the fly, and then account for micro differences between my
+compiler and gcc.
+
+Anyway, here it is.  Should run on perl v4 or greater.  Maybe less.
+
+
+ --tom
+
+=cut
+
+$RCSID = '$Id: c2ph,v 1.7 95/10/28 10:41:47 tchrist Exp Locker: tchrist $';
+
+use File::Temp;
+
+######################################################################
+
+# some handy data definitions.   many of these can be reset later.
+
+$bitorder = 'b';  # ascending; set to B for descending bit fields
+
+%intrinsics =
+%template = (
+    'char', 			'c',
+    'unsigned char', 		'C',
+    'short',			's',
+    'short int',		's',
+    'unsigned short',		'S',
+    'unsigned short int',	'S',
+    'short unsigned int',	'S',
+    'int',			'i',
+    'unsigned int',		'I',
+    'long',			'l',
+    'long int',			'l',
+    'unsigned long',		'L',
+    'unsigned long',		'L',
+    'long unsigned int',	'L',
+    'unsigned long int',	'L',
+    'long long',		'q',
+    'long long int',		'q',
+    'unsigned long long',	'Q',
+    'unsigned long long int',	'Q',
+    'float',			'f',
+    'double',			'd',
+    'pointer',			'p',
+    'null',			'x',
+    'neganull',			'X',
+    'bit',			$bitorder,
+);
+
+&buildscrunchlist;
+delete $intrinsics{'neganull'};
+delete $intrinsics{'bit'};
+delete $intrinsics{'null'};
+
+# use -s to recompute sizes
+%sizeof = (
+    'char', 			'1',
+    'unsigned char', 		'1',
+    'short',			'2',
+    'short int',		'2',
+    'unsigned short',		'2',
+    'unsigned short int',	'2',
+    'short unsigned int',	'2',
+    'int',			'4',
+    'unsigned int',		'4',
+    'long',			'4',
+    'long int',			'4',
+    'unsigned long',		'4',
+    'unsigned long int',	'4',
+    'long unsigned int',	'4',
+    'long long',		'8',
+    'long long int',		'8',
+    'unsigned long long',	'8',
+    'unsigned long long int',	'8',
+    'float',			'4',
+    'double',			'8',
+    'pointer',			'4',
+);
+
+($type_width, $member_width, $offset_width, $size_width) = (20, 20, 6, 5);
+
+($offset_fmt, $size_fmt) = ('d', 'd');
+
+$indent = 2;
+
+$CC = 'cc';
+$CFLAGS = '-gstabs -S';
+$DEFINES = '';
+
+$perl++ if $0 =~ m#/?c2ph$#;
+
+use Getopt::Std qw(getopts);
+
+use File::Temp 'tempdir';
+
+eval '$'.$1.'$2;' while $ARGV[0] =~ /^([A-Za-z_]+=)(.*)/ && shift;
+
+getopts('aixdpvtnws:') || &usage(0);
+
+$opt_d && $debug++;
+$opt_t && $trace++;
+$opt_p && $perl++;
+$opt_v && $verbose++;
+$opt_n && ($perl = 0);
+
+if ($opt_w) {
+    ($type_width, $member_width, $offset_width) = (45, 35, 8);
+}
+if ($opt_x) {
+    ($offset_fmt, $offset_width, $size_fmt, $size_width) = ( 'x', '08', 'x', 04 );
+}
+
+eval '$'.$1.'$2;' while $ARGV[0] =~ /^([A-Za-z_]+=)(.*)/ && shift;
+
+sub PLUMBER {
+    select(STDERR);
+    print "oops, apparent pager foulup\n";
+    $isatty++;
+    &usage(1);
+}
+
+sub usage {
+    local($oops) = @_;
+    unless (-t STDOUT) {
+	select(STDERR);
+    } elsif (!$oops) {
+	$isatty++;
+	$| = 1;
+	print "hit <RETURN> for further explanation: ";
+	<STDIN>;
+	open (PIPE, "|". ($ENV{PAGER} || 'more'));
+	$SIG{PIPE} = PLUMBER;
+	select(PIPE);
+    }
+
+    print "usage: $0 [-dpnP] [var=val] [files ...]\n";
+
+    exit unless $isatty;
+
+    print <<EOF;
+
+Options:
+
+-w	wide; short for: type_width=45 member_width=35 offset_width=8
+-x	hex; short for:  offset_fmt=x offset_width=08 size_fmt=x size_width=04
+
+-n  	do not generate perl code  (default when invoked as pstruct)
+-p  	generate perl code         (default when invoked as c2ph)
+-v	generate perl code, with C decls as comments
+
+-i	do NOT recompute sizes for intrinsic datatypes
+-a	dump information on intrinsics also
+
+-t 	trace execution
+-d	spew reams of debugging output
+
+-slist  give comma-separated list a structures to dump
+
+
+Var Name        Default Value    Meaning
+
+EOF
+
+    &defvar('CC', 'which_compiler to call');
+    &defvar('CFLAGS', 'how to generate *.s files with stabs');
+    &defvar('DEFINES','any extra cflags or cpp defines, like -I, -D, -U');
+
+    print "\n";
+
+    &defvar('type_width', 'width of type field   (column 1)');
+    &defvar('member_width', 'width of member field (column 2)');
+    &defvar('offset_width', 'width of offset field (column 3)');
+    &defvar('size_width', 'width of size field   (column 4)');
+
+    print "\n";
+
+    &defvar('offset_fmt', 'sprintf format type for offset');
+    &defvar('size_fmt', 'sprintf format type for size');
+
+    print "\n";
+
+    &defvar('indent', 'how far to indent each nesting level');
+
+   print <<'EOF';
+
+    If any *.[ch] files are given, these will be catted together into
+    a temporary *.c file and sent through:
+	    $CC $CFLAGS $DEFINES
+    and the resulting *.s groped for stab information.  If no files are
+    supplied, then stdin is read directly with the assumption that it
+    contains stab information.  All other lines will be ignored.  At
+    most one *.s file should be supplied.
+
+EOF
+    close PIPE;
+    exit 1;
+}
+
+sub defvar {
+    local($var, $msg) = @_;
+    printf "%-16s%-15s  %s\n", $var, eval "\$$var", $msg;
+}
+
+sub safedir {
+    $SAFEDIR = File::Temp::tempdir("c2ph.XXXXXX", TMPDIR => 1, CLEANUP => 1)
+      unless (defined($SAFEDIR));
+}
+
+undef $SAFEDIR;
+
+$recurse = 1;
+
+if (@ARGV) {
+    if (grep(!/\.[csh]$/,@ARGV)) {
+	warn "Only *.[csh] files expected!\n";
+	&usage;
+    }
+    elsif (grep(/\.s$/,@ARGV)) {
+	if (@ARGV > 1) {
+	    warn "Only one *.s file allowed!\n";
+	    &usage;
+	}
+    }
+    elsif (@ARGV == 1 && $ARGV[0] =~ /\.c$/) {
+	local($dir, $file) = $ARGV[0] =~ m#(.*/)?(.*)$#;
+	$chdir = "cd $dir && " if $dir;
+	&system("$chdir$CC $CFLAGS $DEFINES $file") && exit 1;
+	$ARGV[0] =~ s/\.c$/.s/;
+    }
+    else {
+	&safedir;
+	$TMP = "$SAFEDIR/c2ph.$$.c";
+	&system("cat @ARGV > $TMP") && exit 1;
+	&system("cd $SAFEDIR && $CC $CFLAGS $DEFINES $TMP") && exit 1;
+	unlink $TMP;
+	$TMP =~ s/\.c$/.s/;
+	@ARGV = ($TMP);
+    }
+}
+
+if ($opt_s) {
+    for (split(/[\s,]+/, $opt_s)) {
+	$interested{$_}++;
+    }
+}
+
+
+$| = 1 if $debug;
+
+main: {
+
+    if ($trace) {
+	if (-t && !@ARGV) {
+	    print STDERR "reading from your keyboard: ";
+	} else {
+	    print STDERR "reading from " . (@ARGV ? "@ARGV" : "<STDIN>").": ";
+	}
+    }
+
+STAB: while (<>) {
+	if ($trace && !($. % 10)) {
+	    $lineno = $..'';
+	    print STDERR $lineno, "\b" x length($lineno);
+	}
+	next unless /^\s*\.stabs\s+/;
+	$line = $_;
+	s/^\s*\.stabs\s+//;
+	if (s/\\\\"[d,]+$//) {
+	    $saveline .= $line;
+	    $savebar  = $_;
+	    next STAB;
+	}
+	if ($saveline) {
+	    s/^"//;
+	    $_ = $savebar . $_;
+	    $line = $saveline;
+	}
+	&stab;
+	$savebar = $saveline = undef;
+    }
+    print STDERR "$.\n" if $trace;
+    unlink $TMP if $TMP;
+
+    &compute_intrinsics if $perl && !$opt_i;
+
+    print STDERR "resolving types\n" if $trace;
+
+    &resolve_types;
+    &adjust_start_addrs;
+
+    $sum = 2 + $type_width + $member_width;
+    $pmask1 = "%-${type_width}s %-${member_width}s";
+    $pmask2 = "%-${sum}s %${offset_width}${offset_fmt}%s %${size_width}${size_fmt}%s";
+
+
+
+    if ($perl) {
+	# resolve template -- should be in stab define order, but even this isn't enough.
+	print STDERR "\nbuilding type templates: " if $trace;
+	for $i (reverse 0..$#type) {
+	    next unless defined($name = $type[$i]);
+	    next unless defined $struct{$name};
+	    ($iname = $name) =~ s/\..*//;
+	    $build_recursed = 0;
+	    &build_template($name) unless defined $template{&psou($name)} ||
+					$opt_s && !$interested{$iname};
+	}
+	print STDERR "\n\n" if $trace;
+    }
+
+    print STDERR "dumping structs: " if $trace;
+
+    local($iam);
+
+
+
+    foreach $name (sort keys %struct) {
+	($iname = $name) =~ s/\..*//;
+	next if $opt_s && !$interested{$iname};
+	print STDERR "$name " if $trace;
+
+	undef @sizeof;
+	undef @typedef;
+	undef @offsetof;
+	undef @indices;
+	undef @typeof;
+	undef @fieldnames;
+
+	$mname = &munge($name);
+
+	$fname = &psou($name);
+
+	print "# " if $perl && $verbose;
+	$pcode = '';
+	print "$fname {\n" if !$perl || $verbose;
+	$template{$fname} = &scrunch($template{$fname}) if $perl;
+	&pstruct($name,$name,0);
+	print "# " if $perl && $verbose;
+	print "}\n" if !$perl || $verbose;
+	print "\n" if $perl && $verbose;
+
+	if ($perl) {
+	    print "$pcode";
+
+	    printf("\nsub %-32s { %4d; }\n\n", "${mname}'struct", $countof{$name});
+
+	    print <<EOF;
+sub ${mname}'typedef {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}'index
+	? \$${mname}'typedef[\$${mname}'index]
+	: \$${mname}'typedef;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'sizeof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}'index
+	? \$${mname}'sizeof[\$${mname}'index]
+	: \$${mname}'sizeof;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'offsetof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}index
+	? \$${mname}'offsetof[\$${mname}'index]
+	: \$${mname}'sizeof;
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'typeof {
+    local(\$${mname}'index) = shift;
+    defined \$${mname}index
+	? \$${mname}'typeof[\$${mname}'index]
+	: '$name';
+}
+EOF
+
+	    print <<EOF;
+sub ${mname}'fieldnames {
+    \@${mname}'fieldnames;
+}
+EOF
+
+	$iam = ($isastruct{$name} && 's') || ($isaunion{$name} && 'u');
+
+	    print <<EOF;
+sub ${mname}'isastruct {
+    '$iam';
+}
+EOF
+
+	    print "\$${mname}'typedef = '" . &scrunch($template{$fname})
+		. "';\n";
+
+	    print "\$${mname}'sizeof = $sizeof{$name};\n\n";
+
+
+	    print "\@${mname}'indices = (", &squishseq(@indices), ");\n";
+
+	    print "\n";
+
+	    print "\@${mname}'typedef[\@${mname}'indices] = (",
+			join("\n\t", '', @typedef), "\n    );\n\n";
+	    print "\@${mname}'sizeof[\@${mname}'indices] = (",
+			join("\n\t", '', @sizeof), "\n    );\n\n";
+	    print "\@${mname}'offsetof[\@${mname}'indices] = (",
+			join("\n\t", '', @offsetof), "\n    );\n\n";
+	    print "\@${mname}'typeof[\@${mname}'indices] = (",
+			join("\n\t", '', @typeof), "\n    );\n\n";
+	    print "\@${mname}'fieldnames[\@${mname}'indices] = (",
+			join("\n\t", '', @fieldnames), "\n    );\n\n";
+
+	    $template_printed{$fname}++;
+	    $size_printed{$fname}++;
+	}
+	print "\n";
+    }
+
+    print STDERR "\n" if $trace;
+
+    unless ($perl && $opt_a) {
+	print "\n1;\n" if $perl;
+	exit;
+    }
+
+
+
+    foreach $name (sort bysizevalue keys %intrinsics) {
+	next if $size_printed{$name};
+	print '$',&munge($name),"'sizeof = ", $sizeof{$name}, ";\n";
+    }
+
+    print "\n";
+
+    sub bysizevalue { $sizeof{$a} <=> $sizeof{$b}; }
+
+
+    foreach $name (sort keys %intrinsics) {
+	print '$',&munge($name),"'typedef = '", $template{$name}, "';\n";
+    }
+
+    print "\n1;\n" if $perl;
+
+    exit;
+}
+
+########################################################################################
+
+
+sub stab {
+    next unless $continued || /:[\$\w]+(\(\d+,\d+\))?=[\*\$\w]+/;  # (\d+,\d+) is for sun
+    s/"// 						|| next;
+    s/",([x\d]+),([x\d]+),([x\d]+),.*// 		|| next;
+
+    next if /^\s*$/;
+
+    $size = $3 if $3;
+    $_ = $continued . $_ if length($continued);
+    if (s/\\\\$//) {
+      # if last 2 chars of string are '\\' then stab is continued
+      # in next stab entry
+      chop;
+      $continued = $_;
+      next;
+    }
+    $continued = '';
+
+
+    $line = $_;
+
+    if (($name, $pdecl) = /^([\$ \w]+):[tT]((\d+)(=[rufs*](\d+))+)$/) {
+	print "$name is a typedef for some funky pointers: $pdecl\n" if $debug;
+	&pdecl($pdecl);
+	next;
+    }
+
+
+
+    if (/(([ \w]+):t(\d+|\(\d+,\d+\)))=r?(\d+|\(\d+,\d+\))(;\d+;\d+;)?/) {
+	local($ident) = $2;
+	push(@intrinsics, $ident);
+	$typeno = &typeno($3);
+	$type[$typeno] = $ident;
+	print STDERR "intrinsic $ident in new type $typeno\n" if $debug;
+	next;
+    }
+
+    if (($name, $typeordef, $typeno, $extra, $struct, $_)
+	= /^([\$ \w]+):([ustT])(\d+|\(\d+,\d+\))(=[rufs*](\d+))?(.*)$/)
+    {
+	$typeno = &typeno($typeno);  # sun foolery
+    }
+    elsif (/^[\$\w]+:/) {
+	next; # variable
+    }
+    else {
+	warn "can't grok stab: <$_> in: $line " if $_;
+	next;
+    }
+
+    #warn "got size $size for $name\n";
+    $sizeof{$name} = $size if $size;
+
+    s/;[-\d]*;[-\d]*;$//;  # we don't care about ranges
+
+    $typenos{$name} = $typeno;
+
+    unless (defined $type[$typeno]) {
+	&panic("type 0??") unless $typeno;
+	$type[$typeno] = $name unless defined $type[$typeno];
+	printf "new type $typeno is $name" if $debug;
+	if ($extra =~ /\*/ && defined $type[$struct]) {
+	    print ", a typedef for a pointer to " , $type[$struct] if $debug;
+	}
+    } else {
+	printf "%s is type %d", $name, $typeno if $debug;
+	print ", a typedef for " , $type[$typeno] if $debug;
+    }
+    print "\n" if $debug;
+    #next unless $extra =~ /[su*]/;
+
+    #$type[$struct] = $name;
+
+    if ($extra =~ /[us*]/) {
+	&sou($name, $extra);
+	$_ = &sdecl($name, $_, 0);
+    }
+    elsif (/^=ar/) {
+	print "it's a bare array typedef -- that's pretty sick\n" if $debug;
+	$_ = "$typeno$_";
+	$scripts = '';
+	$_ = &adecl($_,1);
+
+    }
+    elsif (s/((\w+):t(\d+|\(\d+,\d+\)))?=r?(;\d+;\d+;)?//) {  # the ?'s are for gcc
+	push(@intrinsics, $2);
+	$typeno = &typeno($3);
+	$type[$typeno] = $2;
+	print STDERR "intrinsic $2 in new type $typeno\n" if $debug;
+    }
+    elsif (s/^=e//) { # blessed be thy compiler; mine won't do this
+	&edecl;
+    }
+    else {
+	warn "Funny remainder for $name on line $_ left in $line " if $_;
+    }
+}
+
+sub typeno {  # sun thinks types are (0,27) instead of just 27
+    local($_) = @_;
+    s/\(\d+,(\d+)\)/$1/;
+    $_;
+}
+
+sub pstruct {
+    local($what,$prefix,$base) = @_;
+    local($field, $fieldname, $typeno, $count, $offset, $entry);
+    local($fieldtype);
+    local($type, $tname);
+    local($mytype, $mycount, $entry2);
+    local($struct_count) = 0;
+    local($pad, $revpad, $length, $prepad, $lastoffset, $lastlength, $fmt);
+    local($bits,$bytes);
+    local($template);
+
+
+    local($mname) = &munge($name);
+
+    sub munge {
+	local($_) = @_;
+	s/[\s\$\.]/_/g;
+	$_;
+    }
+
+    local($sname) = &psou($what);
+
+    $nesting++;
+
+    for $field (split(/;/, $struct{$what})) {
+	$pad = $prepad = 0;
+	$entry = '';
+	($fieldname, $typeno, $count, $offset, $length) = split(/,/, $field);
+
+	$type = $type[$typeno];
+
+	$type =~ /([^[]*)(\[.*\])?/;
+	$mytype = $1;
+	$count .= $2;
+	$fieldtype = &psou($mytype);
+
+	local($fname) = &psou($name);
+
+	if ($build_templates) {
+
+	    $pad = ($offset - ($lastoffset + $lastlength))/8
+		if defined $lastoffset;
+
+	    if (! $finished_template{$sname}) {
+		if ($isaunion{$what}) {
+		    $template{$sname} .= 'X' x $revpad . ' '    if $revpad;
+		} else {
+		    $template{$sname} .= 'x' x $pad    . ' '    if $pad;
+		}
+	    }
+
+	    $template = &fetch_template($type);
+	    &repeat_template($template,$count);
+
+	    if (! $finished_template{$sname}) {
+		$template{$sname} .= $template;
+	    }
+
+	    $revpad = $length/8 if $isaunion{$what};
+
+	    ($lastoffset, $lastlength) = ($offset, $length);
+
+	} else {
+	    print '# ' if $perl && $verbose;
+	    $entry = sprintf($pmask1,
+			' ' x ($nesting * $indent) . $fieldtype,
+			"$prefix.$fieldname" . $count);
+
+	    $entry =~ s/(\*+)( )/$2$1/;
+
+	    printf $pmask2,
+		    $entry,
+		    ($base+$offset)/8,
+		    ($bits = ($base+$offset)%8) ? ".$bits" : "  ",
+		    $length/8,
+		    ($bits = $length % 8) ? ".$bits": ""
+			if !$perl || $verbose;
+
+	    if ($perl) {
+		$template = &fetch_template($type);
+		&repeat_template($template,$count);
+	    }
+
+	    if ($perl && $nesting == 1) {
+
+		push(@sizeof, int($length/8) .",\t# $fieldname");
+		push(@offsetof, int($offset/8) .",\t# $fieldname");
+		local($little) = &scrunch($template);
+		push(@typedef, "'$little', \t# $fieldname");
+		$type =~ s/(struct|union) //;
+		push(@typeof, "'$mytype" . ($count ? $count : '') .
+		    "',\t# $fieldname");
+		push(@fieldnames, "'$fieldname',");
+	    }
+
+	    print '  ', ' ' x $indent x $nesting, $template
+				if $perl && $verbose;
+
+	    print "\n" if !$perl || $verbose;
+
+	}
+	if ($perl) {
+	    local($mycount) = defined $struct{$mytype} ? $countof{$mytype} : 1;
+	    $mycount *= &scripts2count($count) if $count;
+	    if ($nesting==1 && !$build_templates) {
+		$pcode .= sprintf("sub %-32s { %4d; }\n",
+			"${mname}'${fieldname}", $struct_count);
+		push(@indices, $struct_count);
+	    }
+	    $struct_count += $mycount;
+	}
+
+
+	&pstruct($type, "$prefix.$fieldname", $base+$offset)
+		if $recurse && defined $struct{$type};
+    }
+
+    $countof{$what} = $struct_count unless defined $countof{$whati};
+
+    $template{$sname} .= '$' if $build_templates;
+    $finished_template{$sname}++;
+
+    if ($build_templates && !defined $sizeof{$name}) {
+	local($fmt) = &scrunch($template{$sname});
+	print STDERR "no size for $name, punting with $fmt..." if $debug;
+	eval '$sizeof{$name} = length(pack($fmt, ()))';
+	if ($@) {
+	    chop $@;
+	    warn "couldn't get size for \$name: $@";
+	} else {
+	    print STDERR $sizeof{$name}, "\n" if $debUg;
+	}
+    }
+
+    --$nesting;
+}
+
+
+sub psize {
+    local($me) = @_;
+    local($amstruct) = $struct{$me} ?  'struct ' : '';
+
+    print '$sizeof{\'', $amstruct, $me, '\'} = ';
+    printf "%d;\n", $sizeof{$me};
+}
+
+sub pdecl {
+    local($pdecl) = @_;
+    local(@pdecls);
+    local($tname);
+
+    warn "pdecl: $pdecl\n" if $debug;
+
+    $pdecl =~ s/\(\d+,(\d+)\)/$1/g;
+    $pdecl =~ s/\*//g;
+    @pdecls = split(/=/, $pdecl);
+    $typeno = $pdecls[0];
+    $tname = pop @pdecls;
+
+    if ($tname =~ s/^f//) { $tname = "$tname&"; }
+    #else { $tname = "$tname*"; }
+
+    for (reverse @pdecls) {
+	$tname  .= s/^f// ? "&" : "*";
+	#$tname =~ s/^f(.*)/$1&/;
+	print "type[$_] is $tname\n" if $debug;
+	$type[$_] = $tname unless defined $type[$_];
+    }
+}
+
+
+
+sub adecl {
+    ($arraytype, $unknown, $lower, $upper) = ();
+    #local($typeno);
+    # global $typeno, @type
+    local($_, $typedef) = @_;
+
+    while (s/^((\d+|\(\d+,\d+\))=)?ar(\d+|\(\d+,\d+\));//) {
+	($arraytype, $unknown) = ($2, $3);
+	$arraytype = &typeno($arraytype);
+	$unknown = &typeno($unknown);
+	if (s/^(\d+);(\d+);//) {
+	    ($lower, $upper) = ($1, $2);
+	    $scripts .= '[' .  ($upper+1) . ']';
+	} else {
+	    warn "can't find array bounds: $_";
+	}
+    }
+    if (s/^([(,)\d*f=]*),(\d+),(\d+);//) {
+	($start, $length) = ($2, $3);
+	$whatis = $1;
+	if ($whatis =~ /^(\d+|\(\d+,\d+\))=/) {
+	    $typeno = &typeno($1);
+	    &pdecl($whatis);
+	} else {
+	    $typeno = &typeno($whatis);
+	}
+    } elsif (s/^(\d+)(=[*suf]\d*)//) {
+	local($whatis) = $2;
+
+	if ($whatis =~ /[f*]/) {
+	    &pdecl($whatis);
+	} elsif ($whatis =~ /[su]/) {  #
+	    print "$prefix.$fieldname is an array$scripts anon structs; disgusting\n"
+		if $debug;
+	    #$type[$typeno] = $name unless defined $type[$typeno];
+	    ##printf "new type $typeno is $name" if $debug;
+	    $typeno = $1;
+	    $type[$typeno] = "$prefix.$fieldname";
+	    local($name) = $type[$typeno];
+	    &sou($name, $whatis);
+	    $_ = &sdecl($name, $_, $start+$offset);
+	    1;
+	    $start = $start{$name};
+	    $offset = $sizeof{$name};
+	    $length = $offset;
+	} else {
+	    warn "what's this? $whatis in $line ";
+	}
+    } elsif (/^\d+$/) {
+	$typeno = $_;
+    } else {
+	warn "bad array stab: $_ in $line ";
+	next STAB;
+    }
+    #local($wasdef) = defined($type[$typeno]) && $debug;
+    #if ($typedef) {
+	#print "redefining $type[$typeno] to " if $wasdef;
+	#$type[$typeno] = "$whatis$scripts"; # unless defined $type[$typeno];
+	#print "$type[$typeno]\n" if $wasdef;
+    #} else {
+	#$type[$arraytype] = $type[$typeno] unless defined $type[$arraytype];
+    #}
+    $type[$arraytype] = "$type[$typeno]$scripts" if defined $type[$typeno];
+    print "type[$arraytype] is $type[$arraytype]\n" if $debug;
+    print "$prefix.$fieldname is an array of $type[$arraytype]\n" if $debug;
+    $_;
+}
+
+
+
+sub sdecl {
+    local($prefix, $_, $offset) = @_;
+
+    local($fieldname, $scripts, $type, $arraytype, $unknown,
+    $whatis, $pdecl, $upper,$lower, $start,$length) = ();
+    local($typeno,$sou);
+
+
+SFIELD:
+    while (/^([^;]+);/) {
+	$scripts = '';
+	warn "sdecl $_\n" if $debug;
+	if (s/^([\$\w]+)://) {
+	    $fieldname = $1;
+	} elsif (s/(\d+)=([us])(\d+|\(\d+,\d+\))//) { #
+	    $typeno = &typeno($1);
+	    $type[$typeno] = "$prefix.$fieldname";
+	    local($name) = "$prefix.$fieldname";
+	    &sou($name,$2);
+	    $_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	    $start = $start{$name};
+	    $offset += $sizeof{$name};
+	    #print "done with anon, start is $start, offset is $offset\n";
+	    #next SFIELD;
+	} else  {
+	    warn "weird field $_ of $line" if $debug;
+	    next STAB;
+	    #$fieldname = &gensym;
+	    #$_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	}
+
+	if (/^(\d+|\(\d+,\d+\))=ar/) {
+	    $_ = &adecl($_);
+	}
+	elsif (s/^(\d+|\(\d+,\d+\))?,(\d+),(\d+);//) {
+          ($start, $length) =  ($2, $3);
+          &panic("no length?") unless $length;
+          $typeno = &typeno($1) if $1;
+        }
+        elsif (s/^(\d+)=xs\w+:,(\d+),(\d+);//) {
+	    ($start, $length) =  ($2, $3);
+	    &panic("no length?") unless $length;
+	    $typeno = &typeno($1) if $1;
+	}
+	elsif (s/^((\d+|\(\d+,\d+\))(=[*f](\d+|\(\d+,\d+\)))+),(\d+),(\d+);//) {
+	    ($pdecl, $start, $length) =  ($1,$5,$6);
+	    &pdecl($pdecl);
+	}
+	elsif (s/(\d+)=([us])(\d+|\(\d+,\d+\))//) { # the dratted anon struct
+	    ($typeno, $sou) = ($1, $2);
+	    $typeno = &typeno($typeno);
+	    if (defined($type[$typeno])) {
+		warn "now how did we get type $1 in $fieldname of $line?";
+	    } else {
+		print "anon type $typeno is $prefix.$fieldname\n" if $debug;
+		$type[$typeno] = "$prefix.$fieldname" unless defined $type[$typeno];
+	    };
+	    local($name) = "$prefix.$fieldname";
+	    &sou($name,$sou);
+	    print "anon ".($isastruct{$name}) ? "struct":"union"." for $prefix.$fieldname\n" if $debug;
+	    $type[$typeno] = "$prefix.$fieldname";
+	    $_ = &sdecl("$prefix.$fieldname", $_, $start+$offset);
+	    $start = $start{$name};
+	    $length = $sizeof{$name};
+	}
+	else {
+	    warn "can't grok stab for $name ($_) in line $line ";
+	    next STAB;
+	}
+
+	&panic("no length for $prefix.$fieldname") unless $length;
+	$struct{$name} .= join(',', $fieldname, $typeno, $scripts, $start, $length) . ';';
+    }
+    if (s/;\d*,(\d+),(\d+);//) {
+	local($start, $size) = ($1, $2);
+	$sizeof{$prefix} = $size;
+	print "start of $prefix is $start, size of $sizeof{$prefix}\n" if $debug;
+	$start{$prefix} = $start;
+    }
+    $_;
+}
+
+sub edecl {
+    s/;$//;
+    $enum{$name} = $_;
+    $_ = '';
+}
+
+sub resolve_types {
+    local($sou);
+    for $i (0 .. $#type) {
+	next unless defined $type[$i];
+	$_ = $type[$i];
+	unless (/\d/) {
+	    print "type[$i] $type[$i]\n" if $debug;
+	    next;
+	}
+	print "type[$i] $_ ==> " if $debug;
+	s/^(\d+)(\**)\&\*(\**)/"$2($3".&type($1) . ')()'/e;
+	s/^(\d+)\&/&type($1)/e;
+	s/^(\d+)/&type($1)/e;
+	s/(\*+)([^*]+)(\*+)/$1$3$2/;
+	s/\((\*+)(\w+)(\*+)\)/$3($1$2)/;
+	s/^(\d+)([\*\[].*)/&type($1).$2/e;
+	#s/(\d+)(\*|(\[[\[\]\d\*]+]\])+)/&type($1).$2/ge;
+	$type[$i] = $_;
+	print "$_\n" if $debug;
+    }
+}
+sub type { &psou($type[$_[0]] || "<UNDEFINED>"); }
+
+sub adjust_start_addrs {
+    for (sort keys %start) {
+	($basename = $_) =~ s/\.[^.]+$//;
+	$start{$_} += $start{$basename};
+	print "start: $_ @ $start{$_}\n" if $debug;
+    }
+}
+
+sub sou {
+    local($what, $_) = @_;
+    /u/ && $isaunion{$what}++;
+    /s/ && $isastruct{$what}++;
+}
+
+sub psou {
+    local($what) = @_;
+    local($prefix) = '';
+    if ($isaunion{$what})  {
+	$prefix = 'union ';
+    } elsif ($isastruct{$what})  {
+	$prefix = 'struct ';
+    }
+    $prefix . $what;
+}
+
+sub scrunch {
+    local($_) = @_;
+
+    return '' if $_ eq '';
+
+    study;
+
+    s/\$//g;
+    s/  / /g;
+    1 while s/(\w) \1/$1$1/g;
+
+    # i wanna say this, but perl resists my efforts:
+    #	   s/(\w)(\1+)/$2 . length($1)/ge;
+
+    &quick_scrunch;
+
+    s/ $//;
+
+    $_;
+}
+
+sub buildscrunchlist {
+    $scrunch_code = "sub quick_scrunch {\n";
+    for (values %intrinsics) {
+        $scrunch_code .= "\ts/(${_}{2,})/'$_' . length(\$1)/ge;\n";
+    }
+    $scrunch_code .= "}\n";
+    print "$scrunch_code" if $debug;
+    eval $scrunch_code;
+    &panic("can't eval scrunch_code $@ \nscrunch_code") if $@;
+}
+
+sub fetch_template {
+    local($mytype) = @_;
+    local($fmt);
+    local($count) = 1;
+
+    &panic("why do you care?") unless $perl;
+
+    if ($mytype =~ s/(\[\d+\])+$//) {
+	$count .= $1;
+    }
+
+    if ($mytype =~ /\*/) {
+	$fmt = $template{'pointer'};
+    }
+    elsif (defined $template{$mytype}) {
+	$fmt = $template{$mytype};
+    }
+    elsif (defined $struct{$mytype}) {
+	if (!defined $template{&psou($mytype)}) {
+	    &build_template($mytype) unless $mytype eq $name;
+	}
+	elsif ($template{&psou($mytype)} !~ /\$$/) {
+	    #warn "incomplete template for $mytype\n";
+	}
+	$fmt = $template{&psou($mytype)} || '?';
+    }
+    else {
+	warn "unknown fmt for $mytype\n";
+	$fmt = '?';
+    }
+
+    $fmt x $count . ' ';
+}
+
+sub compute_intrinsics {
+    &safedir;
+    local($TMP) = "$SAFEDIR/c2ph-i.$$.c";
+    open (TMP, ">$TMP") || die "can't open $TMP: $!";
+    select(TMP);
+
+    print STDERR "computing intrinsic sizes: " if $trace;
+
+    undef %intrinsics;
+
+    print <<'EOF';
+main() {
+    char *mask = "%d %s\n";
+EOF
+
+    for $type (@intrinsics) {
+	next if !$type || $type eq 'void' || $type =~ /complex/; # sun stuff
+	print <<"EOF";
+    printf(mask,sizeof($type), "$type");
+EOF
+    }
+
+    print <<'EOF';
+    printf(mask,sizeof(char *), "pointer");
+    exit(0);
+}
+EOF
+    close TMP;
+
+    select(STDOUT);
+    open(PIPE, "cd $SAFEDIR && $CC $TMP && $SAFEDIR/a.out|");
+    while (<PIPE>) {
+	chop;
+	split(' ',$_,2);;
+	print "intrinsic $_[1] is size $_[0]\n" if $debug;
+	$sizeof{$_[1]} = $_[0];
+	$intrinsics{$_[1]} = $template{$_[0]};
+    }
+    close(PIPE) || die "couldn't read intrinsics!";
+    unlink($TMP, "$SAFEDIR/a.out");
+    print STDERR "done\n" if $trace;
+}
+
+sub scripts2count {
+    local($_) = @_;
+
+    s/^\[//;
+    s/\]$//;
+    s/\]\[/*/g;
+    $_ = eval;
+    &panic("$_: $@") if $@;
+    $_;
+}
+
+sub system {
+    print STDERR "@_\n" if $trace;
+    system @_;
+}
+
+sub build_template {
+    local($name) = @_;
+
+    &panic("already got a template for $name") if defined $template{$name};
+
+    local($build_templates) = 1;
+
+    local($lparen) = '(' x $build_recursed;
+    local($rparen) = ')' x $build_recursed;
+
+    print STDERR "$lparen$name$rparen " if $trace;
+    $build_recursed++;
+    &pstruct($name,$name,0);
+    print STDERR "TEMPLATE for $name is ", $template{&psou($name)}, "\n" if $debug;
+    --$build_recursed;
+}
+
+
+sub panic {
+
+    select(STDERR);
+
+    print "\npanic: @_\n";
+
+    exit 1 if $] <= 4.003;  # caller broken
+
+    local($i,$_);
+    local($p,$f,$l,$s,$h,$a,@a,@sub);
+    for ($i = 0; ($p,$f,$l,$s,$h,$w) = caller($i); $i++) {
+	@a = @DB'args;
+	for (@a) {
+	    if (/^StB\000/ && length($_) == length($_main{'_main'})) {
+		$_ = sprintf("%s",$_);
+	    }
+	    else {
+		s/'/\\'/g;
+		s/([^\0]*)/'$1'/ unless /^-?[\d.]+$/;
+		s/([\200-\377])/sprintf("M-%c",ord($1)&0177)/eg;
+		s/([\0-\37\177])/sprintf("^%c",ord($1)^64)/eg;
+	    }
+	}
+	$w = $w ? '@ = ' : '$ = ';
+	$a = $h ? '(' . join(', ', @a) . ')' : '';
+	push(@sub, "$w&$s$a from file $f line $l\n");
+	last if $signal;
+    }
+    for ($i=0; $i <= $#sub; $i++) {
+	last if $signal;
+	print $sub[$i];
+    }
+    exit 1;
+}
+
+sub squishseq {
+    local($num);
+    local($last) = -1e8;
+    local($string);
+    local($seq) = '..';
+
+    while (defined($num = shift)) {
+        if ($num == ($last + 1)) {
+            $string .= $seq unless $inseq++;
+            $last = $num;
+            next;
+        } elsif ($inseq) {
+            $string .= $last unless $last == -1e8;
+        }
+
+        $string .= ',' if defined $string;
+        $string .= $num;
+        $last = $num;
+        $inseq = 0;
+    }
+    $string .= $last if $inseq && $last != -e18;
+    $string;
+}
+
+sub repeat_template {
+    #  local($template, $scripts) = @_;  have to change caller's values
+
+    if ( $_[1] ) {
+	local($ncount) = &scripts2count($_[1]);
+	if ($_[0] =~ /^\s*c\s*$/i) {
+	    $_[0] = "A$ncount ";
+	    $_[1] = '';
+	} else {
+	    $_[0] = $template x $ncount;
+	}
+    }
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptar b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptar
new file mode 100644
index 00000000..a6411ba7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptar
@@ -0,0 +1,141 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+use strict;
+
+use File::Find;
+use Getopt::Std;
+use Archive::Tar;
+use Data::Dumper;
+
+# Allow historic support for dashless bundled options
+#  tar cvf file.tar
+# is valid (GNU) tar style
+@ARGV && $ARGV[0] =~ m/^[DdcvzthxIC]+[fT]?$/ and
+    unshift @ARGV, map { "-$_" } split m// => shift @ARGV;
+my $opts = {};
+getopts('Ddcvzthxf:ICT:', $opts) or die usage();
+
+### show the help message ###
+die usage() if $opts->{h};
+
+### enable debugging (undocumented feature)
+local $Archive::Tar::DEBUG                  = 1 if $opts->{d};
+
+### enable insecure extracting.
+local $Archive::Tar::INSECURE_EXTRACT_MODE  = 1 if $opts->{I};
+
+### sanity checks ###
+unless ( 1 == grep { defined $opts->{$_} } qw[x t c] ) {
+    die "You need exactly one of 'x', 't' or 'c' options: " . usage();
+}
+
+my $compress    = $opts->{z} ? 1 : 0;
+my $verbose     = $opts->{v} ? 1 : 0;
+my $file        = $opts->{f} ? $opts->{f} : 'default.tar';
+my $tar         = Archive::Tar->new();
+
+if( $opts->{c} ) {
+    my @files;
+    my @src = @ARGV;
+    if( $opts->{T} ) {
+      if( $opts->{T} eq "-" ) {
+        chomp( @src = <STDIN> );
+	} elsif( open my $fh, "<", $opts->{T} ) {
+	    chomp( @src = <$fh> );
+	} else {
+	    die "$0: $opts->{T}: $!\n";
+	}
+    }
+
+    find( sub { push @files, $File::Find::name;
+                print $File::Find::name.$/ if $verbose }, @src );
+
+    if ($file eq '-') {
+        use IO::Handle;
+        $file = IO::Handle->new();
+        $file->fdopen(fileno(STDOUT),"w");
+    }
+
+    my $tar = Archive::Tar->new;
+    $tar->add_files(@files);
+    if( $opts->{C} ) {
+        for my $f ($tar->get_files) {
+            $f->mode($f->mode & ~022); # chmod go-w
+        }
+    }
+    $tar->write($file, $compress);
+} else {
+    if ($file eq '-') {
+        use IO::Handle;
+        $file = IO::Handle->new();
+        $file->fdopen(fileno(STDIN),"r");
+    }
+
+    ### print the files we're finding?
+    my $print = $verbose || $opts->{'t'} || 0;
+
+    my $iter = Archive::Tar->iter( $file );
+
+    while( my $f = $iter->() ) {
+        print $f->full_path . $/ if $print;
+
+        ### data dumper output
+        print Dumper( $f ) if $opts->{'D'};
+
+        ### extract it
+        $f->extract if $opts->{'x'};
+    }
+}
+
+### pod & usage in one
+sub usage {
+    my $usage .= << '=cut';
+=pod
+
+=head1 NAME
+
+    ptar - a tar-like program written in perl
+
+=head1 DESCRIPTION
+
+    ptar is a small, tar look-alike program that uses the perl module
+    Archive::Tar to extract, create and list tar archives.
+
+=head1 SYNOPSIS
+
+    ptar -c [-v] [-z] [-C] [-f ARCHIVE_FILE | -] FILE FILE ...
+    ptar -c [-v] [-z] [-C] [-T index | -] [-f ARCHIVE_FILE | -]
+    ptar -x [-v] [-z] [-f ARCHIVE_FILE | -]
+    ptar -t [-z] [-f ARCHIVE_FILE | -]
+    ptar -h
+
+=head1 OPTIONS
+
+    c   Create ARCHIVE_FILE or STDOUT (-) from FILE
+    x   Extract from ARCHIVE_FILE or STDIN (-)
+    t   List the contents of ARCHIVE_FILE or STDIN (-)
+    f   Name of the ARCHIVE_FILE to use. Default is './default.tar'
+    z   Read/Write zlib compressed ARCHIVE_FILE (not always available)
+    v   Print filenames as they are added or extracted from ARCHIVE_FILE
+    h   Prints this help message
+    C   CPAN mode - drop 022 from permissions
+    T   get names to create from file
+
+=head1 SEE ALSO
+
+    tar(1), L<Archive::Tar>.
+
+=cut
+
+    ### strip the pod directives
+    $usage =~ s/=pod\n//g;
+    $usage =~ s/=head1 //g;
+
+    ### add some newlines
+    $usage .= $/.$/;
+
+    return $usage;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptardiff b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptardiff
new file mode 100644
index 00000000..58583ce8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptardiff
@@ -0,0 +1,119 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+
+use strict;
+use Archive::Tar;
+use Getopt::Std;
+
+my $opts = {};
+getopts('h:', $opts) or die usage();
+
+die usages() if $opts->{h};
+
+### need Text::Diff -- give a polite error (not a standard prereq)
+unless ( eval { require Text::Diff; Text::Diff->import; 1 } ) {
+    die "\n\t This tool requires the 'Text::Diff' module to be installed\n";
+}
+
+my $arch = shift                        or die usage();
+my $tar  = Archive::Tar->new( $arch )   or die "Couldn't read '$arch': $!";
+
+
+foreach my $file ( $tar->get_files ) {
+    next unless $file->is_file;
+    my $prefix = $file->prefix;
+    my $name = $file->name;
+    if (defined $prefix) {
+        $name = File::Spec->catfile($prefix, $name);
+    }
+
+    diff(   \($file->get_content), $name,
+            {   FILENAME_A  => $name,
+                MTIME_A     => $file->mtime,
+                OUTPUT      => \*STDOUT
+            }
+    );
+}
+
+
+
+
+sub usage {
+    return q[
+
+Usage:  ptardiff ARCHIVE_FILE
+        ptardiff -h
+
+    ptardiff is a small program that diffs an extracted archive
+    against an unextracted one, using the perl module Archive::Tar.
+
+    This effectively lets you view changes made to an archives contents.
+
+    Provide the progam with an ARCHIVE_FILE and it will look up all
+    the files with in the archive, scan the current working directory
+    for a file with the name and diff it against the contents of the
+    archive.
+
+
+Options:
+    h   Prints this help message
+
+
+Sample Usage:
+
+    $ tar -xzf Acme-Buffy-1.3.tar.gz
+    $ vi Acme-Buffy-1.3/README
+
+    [...]
+
+    $ ptardiff Acme-Buffy-1.3.tar.gz > README.patch
+
+
+See Also:
+    tar(1)
+    ptar
+    Archive::Tar
+
+    ] . $/;
+}
+
+
+
+=head1 NAME
+
+ptardiff - program that diffs an extracted archive against an unextracted one
+
+=head1 DESCRIPTION
+
+    ptardiff is a small program that diffs an extracted archive
+    against an unextracted one, using the perl module Archive::Tar.
+
+    This effectively lets you view changes made to an archives contents.
+
+    Provide the progam with an ARCHIVE_FILE and it will look up all
+    the files with in the archive, scan the current working directory
+    for a file with the name and diff it against the contents of the
+    archive.
+
+=head1 SYNOPSIS
+
+    ptardiff ARCHIVE_FILE
+    ptardiff -h
+
+    $ tar -xzf Acme-Buffy-1.3.tar.gz
+    $ vi Acme-Buffy-1.3/README
+    [...]
+    $ ptardiff Acme-Buffy-1.3.tar.gz > README.patch
+
+
+=head1 OPTIONS
+
+    h   Prints this help message
+
+=head1 SEE ALSO
+
+tar(1), L<Archive::Tar>.
+
+=cut
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptargrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptargrep
new file mode 100644
index 00000000..10567047
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ptargrep
@@ -0,0 +1,195 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+##############################################################################
+# Tool for using regular expressions against the contents of files in a tar
+# archive.  See 'ptargrep --help' for more documentation.
+#
+
+use strict;
+use warnings;
+
+use Pod::Usage   qw(pod2usage);
+use Getopt::Long qw(GetOptions);
+use Archive::Tar qw();
+use File::Path   qw(mkpath);
+
+my(%opt, $pattern);
+
+if(!GetOptions(\%opt,
+    'basename|b',
+    'ignore-case|i',
+    'list-only|l',
+    'verbose|v',
+    'help|?',
+)) {
+    pod2usage(-exitval => 1,  -verbose => 0);
+}
+
+
+pod2usage(-exitstatus => 0, -verbose => 2) if $opt{help};
+
+pod2usage(-exitval => 1,  -verbose => 0,
+    -message => "No pattern specified",
+) unless @ARGV;
+make_pattern( shift(@ARGV) );
+
+pod2usage(-exitval => 1,  -verbose => 0,
+    -message => "No tar files specified",
+) unless @ARGV;
+
+process_archive($_) foreach @ARGV;
+
+exit 0;
+
+
+sub make_pattern {
+    my($pat) = @_;
+
+    if($opt{'ignore-case'}) {
+        $pattern = qr{(?im)$pat};
+    }
+    else {
+        $pattern = qr{(?m)$pat};
+    }
+}
+
+
+sub process_archive {
+    my($filename) = @_;
+
+    _log("Processing archive: $filename");
+    my $next = Archive::Tar->iter($filename);
+    while( my $f = $next->() ) {
+        next unless $f->is_file;
+        match_file($f) if $f->size > 0;
+    }
+}
+
+
+sub match_file {
+    my($f)   = @_;
+    my $path = $f->name;
+    my $prefix = $f->prefix;
+    if (defined $prefix) {
+        $path = File::Spec->catfile($prefix, $path);
+    }
+
+    _log("filename: %s  (%d bytes)", $path, $f->size);
+
+    my $body = $f->get_content();
+    if($body !~ $pattern) {
+        _log("  no match");
+        return;
+    }
+
+    if($opt{'list-only'}) {
+        print $path, "\n";
+        return;
+    }
+
+    save_file($path, $body);
+}
+
+
+sub save_file {
+    my($path, $body) = @_;
+
+    _log("  found match - extracting");
+    my($fh);
+    my($dir, $file) = $path =~ m{\A(?:(.*)/)?([^/]+)\z};
+    if($dir and not $opt{basename}) {
+        _log("  writing to $dir/$file");
+        $dir =~ s{\A/}{./};
+        mkpath($dir) unless -d $dir;
+        open $fh, '>', "$dir/$file" or die "open($dir/$file): $!";
+    }
+    else {
+        _log("  writing to ./$file");
+        open $fh, '>', $file or die "open($file): $!";
+    }
+    print $fh $body;
+    close($fh);
+}
+
+
+sub _log {
+    return unless $opt{verbose};
+    my($format, @args) = @_;
+    warn sprintf($format, @args) . "\n";
+}
+
+
+__END__
+
+=head1 NAME
+
+ptargrep - Apply pattern matching to the contents of files in a tar archive
+
+=head1 SYNOPSIS
+
+  ptargrep [options] <pattern> <tar file> ...
+
+  Options:
+
+   --basename|-b     ignore directory paths from archive
+   --ignore-case|-i  do case-insensitive pattern matching
+   --list-only|-l    list matching filenames rather than extracting matches
+   --verbose|-v      write debugging message to STDERR
+   --help|-?         detailed help message
+
+=head1 DESCRIPTION
+
+This utility allows you to apply pattern matching to B<the contents> of files
+contained in a tar archive.  You might use this to identify all files in an
+archive which contain lines matching the specified pattern and either print out
+the pathnames or extract the files.
+
+The pattern will be used as a Perl regular expression (as opposed to a simple
+grep regex).
+
+Multiple tar archive filenames can be specified - they will each be processed
+in turn.
+
+=head1 OPTIONS
+
+=over 4
+
+=item B<--basename> (alias -b)
+
+When matching files are extracted, ignore the directory path from the archive
+and write to the current directory using the basename of the file from the
+archive.  Beware: if two matching files in the archive have the same basename,
+the second file extracted will overwrite the first.
+
+=item B<--ignore-case> (alias -i)
+
+Make pattern matching case-insensitive.
+
+=item B<--list-only> (alias -l)
+
+Print the pathname of each matching file from the archive to STDOUT.  Without
+this option, the default behaviour is to extract each matching file.
+
+=item B<--verbose> (alias -v)
+
+Log debugging info to STDERR.
+
+=item B<--help> (alias -?)
+
+Display this documentation.
+
+=back
+
+=head1 COPYRIGHT
+
+Copyright 2010 Grant McLean E<lt>grantm@cpan.orgE<gt>
+
+This program is free software; you can redistribute it and/or modify it
+under the same terms as Perl itself.
+
+=cut
+
+
+
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index 00000000..46984806
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/readshortcut.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/realpath.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/realpath.exe
new file mode 100644
index 00000000..b519454e
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/realpath.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase-trigger b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase-trigger
new file mode 100644
index 00000000..0facb4c9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase-trigger
@@ -0,0 +1,74 @@
+#!/bin/dash
+export PATH=/bin
+b=/var/cache/rebase
+if [ ! -d ${b} ] ; then
+    echo "Directory ${b} does not exist, trying to re-create."
+    mkdir -p ${b}
+fi
+
+usage () {
+  echo "
+rebase-trigger [-h | --help | [ full[rebase] | peflags ]]
+
+Commands:
+------------------------------------
+
+full
+fullrebase
+	Perform a full rebase the next time autorebase is run.
+
+peflags
+        Set some flags on executables necessary to run on a Terminal
+	Server.  This is only needed for 32bit executables that have
+	been created with old toolchains.
+"
+}
+trigger_fullrebase () {
+  local f g
+  f="${b}/fullrebase"
+  g="${f}.done"
+  if [ -e "$g" ] ; then
+    mv "$g" "$f"
+  else
+    cat > "$f" <<EOF
+# _autorebase will do a rebuild of the rebase database if this file
+# exists and then rename it to fullrebase.done
+EOF
+  fi
+  echo "Note: _autorebase will do a full rebase the next time setup is run."
+}
+
+trigger_peflags () {
+  local f g
+  f="${b}/peflags"
+  g="${f}.disabled"
+  if [ -e "$g" ] ; then
+    mv "$g" "$f"
+  else
+    cat > "$f" <<EOF
+# _autorebase will run peflags after rebasing and then rename the file
+# to rebase_peflags.disabled
+EOF
+  fi
+  echo "Note: _autorebase will set peflags the next time setup is run."
+}
+
+if [ "$#" = "0" ] ; then
+  set -- "--help"
+fi
+while [ $# -gt 0 ] ; do 
+  case "$1" in
+    full|fullrebase )
+      trigger_fullrebase
+      ;;
+    peflags )
+      trigger_peflags
+      ;;
+    -h|--help|* )
+      usage
+      exit 127
+      ;;
+  esac
+  shift
+done
+exit 0
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase.exe
new file mode 100644
index 00000000..e7fc41b9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebase.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaseall b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaseall
new file mode 100644
index 00000000..2ace5097
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaseall
@@ -0,0 +1,263 @@
+#!/bin/ash
+
+#
+# Copyright (c) 2003, 2005, 2006, 2008, 2011, 2012 Jason Tishler
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 2 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+#
+# See the COPYING file for full license information.
+#
+# Written by Jason Tishler <jason@tishler.net>
+#
+# $Id$
+#
+
+# Define constants
+tp1=${0%/*}
+tp2=${tp1:-.}
+PATH=$(cd $tp2 && pwd):/usr/bin:/bin
+
+ProgramName=${0##*/}
+ProgramOptions='48b:o:ps:tT:v'
+DefaultBaseAddress=0x70000000
+DefaultOffset=0
+DefaultTouch=
+DefaultNoDyn=
+DefaultVerbose=
+DefaultFileList=
+DefaultSuffixes='dll|so|oct'
+
+# Define functions
+usage()
+{
+    echo "usage: ${ProgramName} [-b BaseAddress] [-o Offset] [-s DllSuffix] [-T FileList | -] [-4|-8] [-p] [-t] [-v]"
+    exit 1
+}
+
+cleanup()
+{
+    rm -f "${TmpFile}" "${SortedFile}"
+    exit ${ExitCode}
+}
+
+# Set traps
+trap cleanup 1 2 15
+
+# Set defaults
+BaseAddress=""
+Offset="${DefaultOffset}"
+Touch="${DefaultTouch}"
+NoDyn="${DefaultNoDyn}"
+Verbose="${DefaultVerbose}"
+FileList="${DefaultFileList}"
+Suffixes="${DefaultSuffixes}"
+db_file_i386="/etc/rebase.db.i386"
+db_file_x86_64="/etc/rebase.db.x86_64"
+check_for_dash_only="yes"
+case `uname -m` in
+    i[3456]86)
+	db_file="${db_file_i386}";
+	Mach="-4"
+	;;
+    x86_64)
+	Mach="-8"
+	db_file="${db_file_x86_64}"
+	;;
+esac
+
+# Determine platform
+Platform=`uname -s`
+case $Platform in
+ *MINGW*  | *mingw*  ) Platform=mingw  ;;
+ *CYGWIN* | *cygwin* ) Platform=cygwin ;;
+ *MSYS*   | *msys*   ) Platform=msys   ;;
+ * )
+    echo "Unsupported platform: $Platform" 1>&2
+    exit 1
+    ;;
+esac
+
+# On x86_64 Cygwin, set DefaultAddressBase to 0x4:00000000
+case $Platform in
+  cygwin )
+    [ `uname -m` = "x86_64" ] && DefaultBaseAddress=0x400000000
+    ;;
+  * )
+    ;;
+esac
+  
+# Parse command line arguments
+while getopts "${ProgramOptions}" Option "$@"
+do
+    case "${Option}" in
+    4)
+	db_file="${db_file_i386}";
+	Mach="-4"
+	;;
+    8)
+	Mach="-8"
+	db_file="${db_file_x86_64}"
+	;;
+    b)
+	BaseAddress="${OPTARG}";;
+    o)
+	Offset="${OPTARG}";;
+    p)
+	check_for_dash_only="no";;
+    s)
+	Suffixes="${Suffixes}|${OPTARG}";;
+    t)
+    	Touch="-t";;
+    T)
+	FileList="${OPTARG}";;
+    v)
+	Verbose="-v";;
+    \?)
+	usage;;
+    esac
+done
+
+# Verify only ash or dash processes are running
+if [ "${check_for_dash_only}" != "no" ]
+then
+  ProcessResult=0
+  case $Platform in
+    mingw|msys )
+      /bin/ps -s | /bin/gawk '\
+	# Count number of running ash or dash. \
+	/\/bin\/(d)?ash(\.exe)?$/{ ash_cnt++; } \
+	# Count number of ps and gawk. \
+	/\/bin\/ps(\.exe)?$/{ cnt++; } \
+	/\/bin\/gawk(\.exe)?$/{ cnt++; } \
+	END{ \
+	  # Uncomment for testing: \
+	  # printf "TOTAL: %d CNT: %d ASH_CNT: %d\n", NR, cnt, ash_cnt; \
+	  # Only one of ps and gawk each may run. \
+	  if (cnt > 2) \
+	    exit 0; \
+	  # The total number of allowed processes is one less than the \
+	  # number of input lines.  The extra line is the ps header output. \
+	  if (NR - cnt - ash_cnt > 1) \
+	    exit 0; \
+	  # All is well. \
+	  exit 1; \
+	}'
+      ProcessResult=$?
+      ;;
+    cygwin )
+      grep -E -q -i -v '/d?ash(.exe)?$' /proc/[0-9]*/exename
+      ProcessResult=$?
+      ;;
+  esac
+  if [ $ProcessResult -eq 0 -a -z "${RebaseDebug}" ]
+  then
+      echo "${ProgramName}: only ash or dash processes are allowed during rebasing"
+      echo "    Exit all Cygwin processes and stop all Cygwin services."
+      echo "    Execute ash (or dash) from Start/Run... or a cmd or command window."
+      echo "    Execute '/bin/rebaseall' from ash (or dash)."
+      exit 2
+  fi
+fi
+
+# Check if rebase database already exists.
+database_exists="no"
+[ -f "${db_file}" ] && database_exists="yes"
+
+# If BaseAddress has not been specified, and the rebase database doesn't exist
+# yet, set BaseAddress to default.
+if [ -z "${BaseAddress}" -a "${database_exists}" != "yes" ]
+then
+  BaseAddress=$DefaultBaseAddress
+fi
+
+# Set temp directory
+TmpDir="${TMP:-${TEMP:-/tmp}}"
+
+# Validate temp directory
+if [ ! -d "$TmpDir" ]
+then
+    echo "$ProgramName: '$TmpDir' is not a directory"
+    exit 2
+fi
+if [ ! -w "$TmpDir" ]
+then
+    echo "$ProgramName: '$TmpDir' is not writable"
+    exit 2
+fi
+
+# Validate user supplied file list, if necessary
+if [ -n "$FileList" -a ! -r "$FileList" -a "$FileList" != - ]
+then
+    echo "$ProgramName: '$FileList' is not readable"
+    exit 2
+fi
+
+# Set temp file
+SortedFile="$TmpDir/rebase.lst"
+TmpFile="${SortedFile}.in"
+
+# Create rebase list
+case $Platform in
+  cygwin)
+    find /etc/setup -name '*.lst.gz' | xargs gzip -d -c |
+      grep -E "\.($Suffixes)\$" |
+      sed -e '/\/cygwin1\.dll$/d' -e '/\/cyglsa.*\.dll$/d' \
+          -e '/sys-root\/mingw/d' -e 's/^/\//' \
+          -e '/\/d\?ash\.exe$/d' -e '/\/rebase\.exe$/d' >"${TmpFile}"
+    # some interpreters include a method for installing addons outside of the
+    # package manager, such as CPAN and RubyGems.
+    for d in /usr/lib/perl5/site_perl /usr/lib/py*/site-packages \
+             /usr/lib/php /usr/lib/R/site-library /usr/lib/rub*/gems \
+             /usr/lib/octave/site
+    do
+      if [ -d $d ]
+      then
+        find $d -type f | grep -E "\.($Suffixes)\$" >>"${TmpFile}"
+      fi
+    done
+    # Unconditionally add the -n flag so rebased DLLs get the
+    # dynamicbase flag removed.
+    NoDyn='-n'
+    ;;
+  mingw|msys)
+    for f in /bin /lib
+    do
+      find $f -type f |
+        grep -E "\.($Suffixes)\$" |
+	sed -e '/\/msys-1\.0.*\.dll$/d' -e '/\/cygwin1\.dll$/d' \
+	    -e '/\/cyglsa.*\.dll$/d' -e '/\/d\?ash\.exe$/d' \
+	    -e '/\/rebase\.exe$/d' >>"$TmpFile"
+    done
+    ;;
+esac
+
+# Append user supplied file list, if any
+if [ -n "${FileList}" ]
+then
+    cat "${FileList}" >>"${TmpFile}"
+fi
+
+# Remove duplicates
+sort -u "${TmpFile}" > "${SortedFile}"
+
+if [ -z "${BaseAddress}" ]
+then
+  rebase "${Verbose}" "${Touch}" "${NoDyn}" -s "${Mach}" -T "${SortedFile}"
+else
+  rebase "${Verbose}" "${Touch}" "${NoDyn}" -s "${Mach}" -b "${BaseAddress}" -o "${Offset}" -T "${SortedFile}"
+fi
+ExitCode=$?
+
+# Clean up
+cleanup
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaselst b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaselst
new file mode 100644
index 00000000..a2c495ee
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rebaselst
@@ -0,0 +1,318 @@
+#!/bin/dash
+export PATH=/bin
+l=/var/lib/rebase
+b=/var/cache/rebase
+db="${l}/dynpath.d"
+ub="${l}/user.d"
+for d in ${b} ${db} ${ub} ; do
+  if [ ! -d ${d} ] ; then
+    echo "Directory ${d} does not exist, trying to re-create."
+    mkdir -p ${d}
+  fi
+done
+
+BaseAddress=''
+if [ "x86_64" = $( uname -m ) ] ; then
+  DefaultBaseAddress=0x400000000
+else
+  DefaultBaseAddress=0x070000000
+fi    
+
+cleardb="no"
+rebuild="no"
+noaslr="no"
+verbose=""
+pkgdone="no"
+doSuffixes='dll|so|oct|mex'
+exeSuffixes='exe'
+
+dynPaths=$( cat ${db}/* | sort -u )
+dynLocs=''
+for d in ${dynPaths} ; do
+  [ -d "${d}" ] && dynLocs="${dynLocs} ${d}"
+done
+
+usage () {
+  echo "
+rebaselst [-h | --help | [ <cmd> | <cmd1> <cmd2> ... <cmdn> ]]
+
+Commands, will be executed in order:
+------------------------------------
+
+--verbose
+	Run some commands with verbose output.
+
+--rebuild
+	Later commands will discard information in cache files and
+	rebuild them from scratch.
+
+--no-rebuild
+	Keep and use information in cache files.  This is the default,
+	can be used to cancel effect of a \"--rebuild\" earlier on the
+	command line.
+
+update
+	Update all caches.
+
+lst
+	Update cache for package installation lists.
+
+user
+	Update cache for user defined rebase list(s).
+
+dyn
+	Update cache for dynamic language modules and libraries.  This
+	currently implies \"--rebuild\" since modules could have been
+	installed by the user and the cache would be outdated.
+
+--cleardb
+	Remove an existing rebase database before doing a \"rebase\".
+
+--noaslr
+	Remove ASLR and TSAware flags from dynamic objects.
+
+rebase
+	Rebase with the information in cache files (i.e does not imply
+	an \"update\").
+
+peflags
+	Set PE flags on executables with the information in cache
+	files (i.e does not imply an \"update\").
+
+
+pkg
+	Update first stage cache for package installation lists only.
+	This step is implied by \"lst\" and available for debugging
+	only.
+
+"
+}
+
+check_file () {
+  if [ "$2" = "yes" -a  -e $1 ] ; then
+    echo "removing $1"
+    rm -f $1
+  fi
+  if [ ! -e "$1" ] ; then
+    echo "creating empty $1"
+    touch -t 7001010000  "$1"
+  fi
+  if [ "$2" != "nowrite" -a  -e $1 ] ; then
+    chmod 644 "$1"
+  fi
+}
+
+_tr () {
+  local IFS s r
+  IFS="/-+.,"
+  for s in $1; do
+    r="${r}_${s}"
+  done
+  echo "${r}"
+}
+
+update_file () {
+  local IFS f g k l m
+  f="$1"
+  g="${f}.old"
+  mv -f "${f}" "${g}"
+  cat >"${f}" <<EOF
+## autogenerated, do not edit!
+EOF
+    IFS='
+'
+  for k in $( grep -E '^# rebase_pkg' "${g}" | tr -c '[:alnum:]\n:' '_' ) ; do
+    l=${k##*from:_}
+    m=$(( ${l-0}+=1 ))
+  done
+  {
+    m=0
+    for k in $( grep -vE "^##" "${g}" ) ; do
+      if [ -e "${k}" -a "${m}" = "0" ] ; then
+    	echo "${k}"
+      elif [ "#" = "${k%% rebase_pkg*}" ] ; then
+	l=$( _tr "${k##*from: /}" )
+	if [ "$(( ${l-0}-=1 ))" = "0" ] ; then
+	  m=0
+    	  echo "${k}"
+	else
+	  m=1
+    	  echo "#${k}"
+	fi
+      elif [ ! "##" = "${k%%[^#]*}" ] ; then
+    	echo "#${k}"
+      fi
+    done
+  } >>"${f}"
+  chmod 444 "${f}"
+}
+
+rebase_do () {
+  local g
+  if [ "$1" = "yes" ] ; then
+    rm -f /etc/rebase.db.*
+  fi
+  shift
+  g="${b}/rebase_all"
+  echo "Rebasing with list ${g}, built from $@."
+  cat $@ | grep -vE '^#' | sort -u >"${g}"
+  if [ ! -e "/etc/rebase.db.i386" -a ! -e "/etc/rebase.db.x86_64" ] ; then
+    BaseAddress="-b ${DefaultBaseAddress}"
+  fi
+  rebase ${BaseAddress} ${verbose} -n -s -T "${g}"
+  if [ "noaslr" = "yes" ] ; then
+    peflags ${verbose} -d0 -t0 -T "${g}"
+  fi
+  BaseAddress=''
+}
+
+peflags_do () {
+  local g
+  g="${b}/rebase_all_exe"
+  echo "Setting PE flags with list ${g}, built from $@."
+  cat $@ | grep -vE '^#|ddd\/Ddd\.exe$' | sort -u >"${g}"
+  peflags ${verbose} -t1 -T "${g}"
+}
+
+rebase_pkg () {
+  if [ "${pkgdone}" = "no" ] ; then
+    local f g
+    g="${b}/rebase_pkg"
+    check_file "${g}" ${rebuild}
+    echo "Updating package information in ${g}."
+    for f in $( find /etc/setup -xdev -type f -name '*.lst.gz' -newer "${g}" ) ; do
+      echo "\tfrom ${f}..."
+      cat >>"${g}" <<EOF
+# rebase_pkg information from: ${f}
+EOF
+      gzip -d -c "${f}" |
+      grep -E "\.(${doSuffixes}|${exeSuffixes})\$" |
+      sed -e '/\(cygwin1\|cyglsa.*\)\.dll$/d' \
+          -e '/\/\(d\?ash|rebase\|peflags\)\.exe$/d' \
+	  -e '/\/octave\//!{/\(mex\|oct\)$/d}' \
+	  -e '/gnuplot\/demo\/plugin\/.*\.so/d' \
+	  -e '/sys-root\/mingw/d' \
+	  -e 's/^/\//' \
+          >>"${g}"
+    done
+    update_file "${g}"
+    pkgdone="yes"
+  fi
+}
+
+rebase_exe () {
+  local f g
+  f="${b}/rebase_pkg"
+  g="${b}/rebase_exe"
+  check_file "${f}" "nowrite"
+  check_file "${g}" "no"
+  rebase_pkg
+  if [ "${f}" -nt "${g}" ] ; then
+    echo "Updating rebase information for installed executables in ${g}."
+    grep -E "\.(${exeSuffixes})\$" "${f}" >"${g}"
+  fi
+  update_file "${g}"
+}
+
+rebase_lst () {
+  local f g
+  f="${b}/rebase_pkg"
+  rebase_pkg
+  g="${b}/rebase_lst"
+  check_file "${g}" ${rebuild}
+  if [ "${f}" -nt "${g}" ] ; then
+    echo "Updating rebase information for installed dynamic objects in ${g}."
+    grep -E "\.(${doSuffixes})\$" "${f}" >"${g}"
+  fi
+  update_file "${g}"
+}
+
+rebase_dyn () {
+  local f g
+  g="${b}/rebase_dyn"
+  check_file "${g}" "yes"
+  if [ "x" = "${dynLocs:-x}" ] ; then
+    touch "${g}"
+  else
+    echo "Looking for dynamic language modules/libraries in:"
+    for d in ${dynLocs} ; do echo "  ${d}" ; done
+    echo "Updating rebase information for dynamic language modules/libraries ${g}."
+    find ${dynLocs} -xdev -regextype posix-extended -regex ".*\.(${doSuffixes})$" -newer "${g}" >>"${g}"
+  fi
+  update_file "${g}"
+}
+
+rebase_user () {
+  local f g
+  g="${b}/rebase_user"
+  check_file "${g}" ${rebuild}
+  echo "Updating rebase information for user-defined dynamic objects ${g}."
+  for f in $( find ${ub} -xdev -type f -newer "${g}" ) ; do
+    grep -E "\.(${doSuffixes})\$" "${f}" >>"${g}"
+  done
+  update_file "${g}"
+}
+
+rebase_user_exe () {
+  local g
+  g="${b}/rebase_user_exe"
+  check_file "${g}" ${rebuild}
+  echo "Updating rebase information for user-defined executables ${g}."
+  for f in $( find ${ub} -xdev -type f -newer "${g}" ) ; do
+    grep -E "\.(${exeSuffixes})\$" "${f}" >>"${g}"
+  done
+  update_file "${g}"
+}
+
+if [ "$#" = "0" ] ; then
+  set -- "--help"
+fi
+while [ $# -gt 0 ] ; do 
+  case "$1" in
+    --verbose )
+      verbose=--verbose
+      ;;
+    --cleardb )
+      cleardb=yes
+      ;;
+    --rebuild )
+      rebuild=yes
+      ;;
+    --noaslr )
+      noaslr=yes
+      ;;
+    --no-rebuild )
+      rebuild=no
+      ;;
+    rebase )
+      rebase_do "${cleardb}" "${b}/rebase_lst" "${b}/rebase_dyn" "${b}/rebase_user"
+      ;;
+    peflags )
+      peflags_do "${b}/rebase_exe" "${b}/rebase_user_exe"
+      ;;
+    update )
+      shift
+      set -- dummy lst dyn user $@
+      ;;
+    pkg )
+      rebase_pkg
+      ;;
+    lst )
+      rebase_lst
+      rebase_exe
+      ;;
+    dyn )
+      rebase_dyn
+      ;;
+    user )
+      rebase_user
+      rebase_user_exe
+      ;;
+    -h|--help|* )
+      usage
+      exit 127
+      ;;
+  esac
+  shift
+done
+exit 0
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/regtool.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/regtool.exe
new file mode 100644
index 00000000..5f39707e
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/regtool.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rename.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rename.exe
new file mode 100644
index 00000000..a46be7e2
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rename.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/renice.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/renice.exe
new file mode 100644
index 00000000..45083d45
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/renice.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/reset b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/reset
new file mode 100644
index 00000000..68438c9f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/reset differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rev.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/rev.exe
new file mode 100644
index 00000000..f8101c10
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/shasum b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/shasum
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--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/shasum
@@ -0,0 +1,332 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!perl
+
+	## shasum: filter for computing SHA digests (ref. sha1sum/md5sum)
+	##
+	## Copyright (C) 2003-2015 Mark Shelor, All Rights Reserved
+	##
+	## Version: 5.95
+	## Sat Jan 10 12:15:36 MST 2015
+
+	## shasum SYNOPSIS adapted from GNU Coreutils sha1sum. Add
+	## "-a" option for algorithm selection,
+	## "-U" option for Universal Newlines support,
+	## "-0" option for reading bit strings, and
+	## "-p" option for portable digests (to be deprecated).
+
+use strict;
+use warnings;
+use Fcntl;
+use Getopt::Long;
+
+my $POD = <<'END_OF_POD';
+
+=head1 NAME
+
+shasum - Print or Check SHA Checksums
+
+=head1 SYNOPSIS
+
+ Usage: shasum [OPTION]... [FILE]...
+ Print or check SHA checksums.
+ With no FILE, or when FILE is -, read standard input.
+
+   -a, --algorithm   1 (default), 224, 256, 384, 512, 512224, 512256
+   -b, --binary      read in binary mode
+   -c, --check       read SHA sums from the FILEs and check them
+   -t, --text        read in text mode (default)
+   -U, --UNIVERSAL   read in Universal Newlines mode
+                         produces same digest on Windows/Unix/Mac
+   -0, --01          read in BITS mode
+                         ASCII '0' interpreted as 0-bit,
+                         ASCII '1' interpreted as 1-bit,
+                         all other characters ignored
+   -p, --portable    read in portable mode (to be deprecated)
+
+ The following two options are useful only when verifying checksums:
+   -s, --status      don't output anything, status code shows success
+   -w, --warn        warn about improperly formatted checksum lines
+
+   -h, --help        display this help and exit
+   -v, --version     output version information and exit
+
+ When verifying SHA-512/224 or SHA-512/256 checksums, indicate the
+ algorithm explicitly using the -a option, e.g.
+
+   shasum -a 512224 -c checksumfile
+
+ The sums are computed as described in FIPS PUB 180-4.  When checking,
+ the input should be a former output of this program.  The default
+ mode is to print a line with checksum, a character indicating type
+ (`*' for binary, ` ' for text, `U' for UNIVERSAL, `^' for BITS, `?'
+ for portable), and name for each FILE.
+
+ Report shasum bugs to mshelor@cpan.org
+
+=head1 DESCRIPTION
+
+Running I<shasum> is often the quickest way to compute SHA message
+digests.  The user simply feeds data to the script through files or
+standard input, and then collects the results from standard output.
+
+The following command shows how to compute digests for typical inputs
+such as the NIST test vector "abc":
+
+	perl -e "print qq(abc)" | shasum
+
+Or, if you want to use SHA-256 instead of the default SHA-1, simply say:
+
+	perl -e "print qq(abc)" | shasum -a 256
+
+Since I<shasum> mimics the behavior of the combined GNU I<sha1sum>,
+I<sha224sum>, I<sha256sum>, I<sha384sum>, and I<sha512sum> programs,
+you can install this script as a convenient drop-in replacement.
+
+Unlike the GNU programs, I<shasum> encompasses the full SHA standard by
+allowing partial-byte inputs.  This is accomplished through the BITS
+option (I<-0>).  The following example computes the SHA-224 digest of
+the 7-bit message I<0001100>:
+
+	perl -e "print qq(0001100)" | shasum -0 -a 224
+
+=head1 AUTHOR
+
+Copyright (c) 2003-2015 Mark Shelor <mshelor@cpan.org>.
+
+=head1 SEE ALSO
+
+I<shasum> is implemented using the Perl module L<Digest::SHA> or
+L<Digest::SHA::PurePerl>.
+
+=cut
+
+END_OF_POD
+
+my $VERSION = "5.95";
+
+sub usage {
+	my($err, $msg) = @_;
+
+	$msg = "" unless defined $msg;
+	if ($err) {
+		warn($msg . "Type shasum -h for help\n");
+		exit($err);
+	}
+	my($USAGE) = $POD =~ /SYNOPSIS(.+?)^=/sm;
+	$USAGE =~ s/^\s*//;
+	$USAGE =~ s/\s*$//;
+	$USAGE =~ s/^ //gm;
+	print $USAGE, "\n";
+	exit($err);
+}
+
+
+	## Sync stdout and stderr by forcing a flush after every write
+
+select((select(STDOUT), $| = 1)[0]);
+select((select(STDERR), $| = 1)[0]);
+
+
+	## Collect options from command line
+
+my ($alg, $binary, $check, $text, $status, $warn, $help, $version);
+my ($portable, $BITS, $reverse, $UNIVERSAL, $versions);
+
+eval { Getopt::Long::Configure ("bundling") };
+GetOptions(
+	'b|binary' => \$binary, 'c|check' => \$check,
+	't|text' => \$text, 'a|algorithm=i' => \$alg,
+	's|status' => \$status, 'w|warn' => \$warn,
+	'h|help' => \$help, 'v|version' => \$version,
+	'p|portable' => \$portable,
+	'0|01' => \$BITS,
+	'R|REVERSE' => \$reverse,
+	'U|UNIVERSAL' => \$UNIVERSAL,
+	'V|VERSIONS' => \$versions,
+) or usage(1, "");
+
+
+	## Deal with help requests and incorrect uses
+
+usage(0)
+	if $help;
+usage(1, "shasum: Ambiguous file mode\n")
+	if scalar(grep {defined $_}
+		($binary, $portable, $text, $BITS, $UNIVERSAL)) > 1;
+usage(1, "shasum: --warn option used only when verifying checksums\n")
+	if $warn && !$check;
+usage(1, "shasum: --status option used only when verifying checksums\n")
+	if $status && !$check;
+
+
+	## Try to use Digest::SHA.  If not installed, use the slower
+	## but functionally equivalent Digest::SHA::PurePerl instead.
+
+	## If option -R is invoked, reverse the module preference,
+	## i.e. try Digest::SHA::PurePerl first, then Digest::SHA.
+
+my @MODS = qw(Digest::SHA Digest::SHA::PurePerl);
+@MODS[0, 1] = @MODS[1, 0] if $reverse;
+
+my $module;
+for (@MODS) {
+	my $mod = $_;
+	if (eval "require $mod") {
+		$module = $mod;
+		last;
+	}
+}
+die "shasum: Unable to find " . join(" or ", @MODS) . "\n"
+	unless defined $module;
+
+
+	## Default to SHA-1 unless overridden by command line option
+
+$alg = 1 unless defined $alg;
+grep { $_ == $alg } (1, 224, 256, 384, 512, 512224, 512256)
+	or usage(1, "shasum: Unrecognized algorithm\n");
+
+
+	## Display version information if requested
+
+if ($version) {
+	print "$VERSION\n";
+	exit(0);
+}
+
+if ($versions) {
+	print "shasum $VERSION\n";
+	print "$module ", eval "\$${module}::VERSION", "\n";
+	print "perl ", defined $^V ? sprintf("%vd", $^V) : $], "\n";
+	exit(0);
+}
+
+
+	## Try to figure out if the OS is DOS-like.  If it is,
+	## default to binary mode when reading files, unless
+	## explicitly overridden by command line "--text" or
+	## "--UNIVERSAL" or "--portable" options.
+
+my $isDOSish = ($^O =~ /^(MSWin\d\d|os2|dos|mint|cygwin)$/);
+if ($isDOSish) { $binary = 1 unless $text || $UNIVERSAL || $portable }
+
+my $modesym = $binary ? '*' : ($UNIVERSAL ? 'U' :
+		($BITS ? '^' : ($portable ? '?' : ' ')));
+
+
+	## Read from STDIN (-) if no files listed on command line
+
+@ARGV = ("-") unless @ARGV;
+
+
+	## sumfile($file): computes SHA digest of $file
+
+sub sumfile {
+	my $file = shift;
+
+	my $mode = $binary ? 'b' : ($UNIVERSAL ? 'U' :
+			($BITS ? '0' : ($portable ? 'p' : '')));
+	my $digest = eval { $module->new($alg)->addfile($file, $mode) };
+	if ($@) { warn "shasum: $file: $!\n"; return }
+	$digest->hexdigest;
+}
+
+
+	## %len2alg: maps hex digest length to SHA algorithm
+
+my %len2alg = (40 => 1, 56 => 224, 64 => 256, 96 => 384, 128 => 512);
+$len2alg{56} = 512224 if $alg == 512224;
+$len2alg{64} = 512256 if $alg == 512256;
+
+
+	## unescape: convert backslashed filename to plain filename
+
+sub unescape {
+	$_ = shift;
+	s/\\\\/\0/g;
+	s/\\n/\n/g;
+	return if /\\/;
+	s/\0/\\/g;
+	return $_;
+}
+
+
+	## verify: confirm the digest values in a checksum file
+
+sub verify {
+	my $checkfile = shift;
+	my ($err, $fmt_errs, $read_errs, $match_errs) = (0, 0, 0, 0);
+	my ($num_lines, $num_files) = (0, 0);
+	my ($bslash, $sum, $fname, $rsp, $digest);
+
+	local *FH;
+	$checkfile eq '-' and open(FH, '< -')
+		and $checkfile = 'standard input'
+	or sysopen(FH, $checkfile, O_RDONLY)
+		or die "shasum: $checkfile: $!\n";
+	while (<FH>) {
+		next if /^#/; s/\n$//; s/^[ \t]+//; $num_lines++;
+		$bslash = s/^\\//;
+		($sum, $modesym, $fname) =
+			/^([\da-fA-F]+)[ \t]([ *?^U])([^\0]*)/;
+		$alg = defined $sum ? $len2alg{length($sum)} : undef;
+		$fname = unescape($fname) if defined $fname && $bslash;
+		if (grep { ! defined $_ } ($alg, $sum, $modesym, $fname)) {
+			$alg = 1 unless defined $alg;
+			warn("shasum: $checkfile: $.: improperly " .
+				"formatted SHA$alg checksum line\n") if $warn;
+			$fmt_errs++;
+			next;
+		}
+		$fname =~ s/\r$// unless -e $fname;
+		$rsp = "$fname: "; $num_files++;
+		($binary, $text, $UNIVERSAL, $BITS, $portable) =
+			map { $_ eq $modesym } ('*', ' ', 'U', '^', 'p');
+		unless ($digest = sumfile($fname)) {
+			$rsp .= "FAILED open or read\n";
+			$err = 1; $read_errs++;
+		}
+		else {
+			if (lc($sum) eq $digest) { $rsp .= "OK\n" }
+			else { $rsp .= "FAILED\n"; $err = 1; $match_errs++ }
+		}
+		print $rsp unless $status;
+	}
+	close(FH);
+	unless ($num_files) {
+		$alg = 1 unless defined $alg;
+		warn("shasum: $checkfile: no properly formatted " .
+			"SHA$alg checksum lines found\n");
+		$err = 1;
+	}
+	elsif (! $status) {
+		warn("shasum: WARNING: $fmt_errs line" . ($fmt_errs>1?
+		's are':' is') . " improperly formatted\n") if $fmt_errs;
+		warn("shasum: WARNING: $read_errs listed file" .
+		($read_errs>1?'s':'') . " could not be read\n") if $read_errs;
+		warn("shasum: WARNING: $match_errs computed checksum" .
+		($match_errs>1?'s':'') . " did NOT match\n") if $match_errs;
+	}
+	return($err == 0);
+}
+
+
+	## Verify or compute SHA checksums of requested files
+
+my($file, $digest);
+
+my $STATUS = 0;
+for $file (@ARGV) {
+	if ($check) { $STATUS = 1 unless verify($file) }
+	elsif ($digest = sumfile($file)) {
+		if ($file =~ /[\n\\]/) {
+			$file =~ s/\\/\\\\/g; $file =~ s/\n/\\n/g;
+			$digest = "\\$digest";
+		}
+		print "$digest $modesym", "$file\n";
+	}
+	else { $STATUS = 1 }
+}
+exit($STATUS)
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/splain b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/splain
new file mode 100644
index 00000000..524abfb9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/splain
@@ -0,0 +1,706 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+
+=head1 NAME
+
+diagnostics, splain - produce verbose warning diagnostics
+
+=head1 SYNOPSIS
+
+Using the C<diagnostics> pragma:
+
+    use diagnostics;
+    use diagnostics -verbose;
+
+    enable  diagnostics;
+    disable diagnostics;
+
+Using the C<splain> standalone filter program:
+
+    perl program 2>diag.out
+    splain [-v] [-p] diag.out
+
+Using diagnostics to get stack traces from a misbehaving script:
+
+    perl -Mdiagnostics=-traceonly my_script.pl
+
+=head1 DESCRIPTION
+
+=head2 The C<diagnostics> Pragma
+
+This module extends the terse diagnostics normally emitted by both the
+perl compiler and the perl interpreter (from running perl with a -w 
+switch or C<use warnings>), augmenting them with the more
+explicative and endearing descriptions found in L<perldiag>.  Like the
+other pragmata, it affects the compilation phase of your program rather
+than merely the execution phase.
+
+To use in your program as a pragma, merely invoke
+
+    use diagnostics;
+
+at the start (or near the start) of your program.  (Note 
+that this I<does> enable perl's B<-w> flag.)  Your whole
+compilation will then be subject(ed :-) to the enhanced diagnostics.
+These still go out B<STDERR>.
+
+Due to the interaction between runtime and compiletime issues,
+and because it's probably not a very good idea anyway,
+you may not use C<no diagnostics> to turn them off at compiletime.
+However, you may control their behaviour at runtime using the 
+disable() and enable() methods to turn them off and on respectively.
+
+The B<-verbose> flag first prints out the L<perldiag> introduction before
+any other diagnostics.  The $diagnostics::PRETTY variable can generate nicer
+escape sequences for pagers.
+
+Warnings dispatched from perl itself (or more accurately, those that match
+descriptions found in L<perldiag>) are only displayed once (no duplicate
+descriptions).  User code generated warnings a la warn() are unaffected,
+allowing duplicate user messages to be displayed.
+
+This module also adds a stack trace to the error message when perl dies.
+This is useful for pinpointing what
+caused the death.  The B<-traceonly> (or
+just B<-t>) flag turns off the explanations of warning messages leaving just
+the stack traces.  So if your script is dieing, run it again with
+
+  perl -Mdiagnostics=-traceonly my_bad_script
+
+to see the call stack at the time of death.  By supplying the B<-warntrace>
+(or just B<-w>) flag, any warnings emitted will also come with a stack
+trace.
+
+=head2 The I<splain> Program
+
+While apparently a whole nuther program, I<splain> is actually nothing
+more than a link to the (executable) F<diagnostics.pm> module, as well as
+a link to the F<diagnostics.pod> documentation.  The B<-v> flag is like
+the C<use diagnostics -verbose> directive.
+The B<-p> flag is like the
+$diagnostics::PRETTY variable.  Since you're post-processing with 
+I<splain>, there's no sense in being able to enable() or disable() processing.
+
+Output from I<splain> is directed to B<STDOUT>, unlike the pragma.
+
+=head1 EXAMPLES
+
+The following file is certain to trigger a few errors at both
+runtime and compiletime:
+
+    use diagnostics;
+    print NOWHERE "nothing\n";
+    print STDERR "\n\tThis message should be unadorned.\n";
+    warn "\tThis is a user warning";
+    print "\nDIAGNOSTIC TESTER: Please enter a <CR> here: ";
+    my $a, $b = scalar <STDIN>;
+    print "\n";
+    print $x/$y;
+
+If you prefer to run your program first and look at its problem
+afterwards, do this:
+
+    perl -w test.pl 2>test.out
+    ./splain < test.out
+
+Note that this is not in general possible in shells of more dubious heritage, 
+as the theoretical 
+
+    (perl -w test.pl >/dev/tty) >& test.out
+    ./splain < test.out
+
+Because you just moved the existing B<stdout> to somewhere else.
+
+If you don't want to modify your source code, but still have on-the-fly
+warnings, do this:
+
+    exec 3>&1; perl -w test.pl 2>&1 1>&3 3>&- | splain 1>&2 3>&- 
+
+Nifty, eh?
+
+If you want to control warnings on the fly, do something like this.
+Make sure you do the C<use> first, or you won't be able to get
+at the enable() or disable() methods.
+
+    use diagnostics; # checks entire compilation phase 
+	print "\ntime for 1st bogus diags: SQUAWKINGS\n";
+	print BOGUS1 'nada';
+	print "done with 1st bogus\n";
+
+    disable diagnostics; # only turns off runtime warnings
+	print "\ntime for 2nd bogus: (squelched)\n";
+	print BOGUS2 'nada';
+	print "done with 2nd bogus\n";
+
+    enable diagnostics; # turns back on runtime warnings
+	print "\ntime for 3rd bogus: SQUAWKINGS\n";
+	print BOGUS3 'nada';
+	print "done with 3rd bogus\n";
+
+    disable diagnostics;
+	print "\ntime for 4th bogus: (squelched)\n";
+	print BOGUS4 'nada';
+	print "done with 4th bogus\n";
+
+=head1 INTERNALS
+
+Diagnostic messages derive from the F<perldiag.pod> file when available at
+runtime.  Otherwise, they may be embedded in the file itself when the
+splain package is built.   See the F<Makefile> for details.
+
+If an extant $SIG{__WARN__} handler is discovered, it will continue
+to be honored, but only after the diagnostics::splainthis() function 
+(the module's $SIG{__WARN__} interceptor) has had its way with your
+warnings.
+
+There is a $diagnostics::DEBUG variable you may set if you're desperately
+curious what sorts of things are being intercepted.
+
+    BEGIN { $diagnostics::DEBUG = 1 } 
+
+
+=head1 BUGS
+
+Not being able to say "no diagnostics" is annoying, but may not be
+insurmountable.
+
+The C<-pretty> directive is called too late to affect matters.
+You have to do this instead, and I<before> you load the module.
+
+    BEGIN { $diagnostics::PRETTY = 1 } 
+
+I could start up faster by delaying compilation until it should be
+needed, but this gets a "panic: top_level" when using the pragma form
+in Perl 5.001e.
+
+While it's true that this documentation is somewhat subserious, if you use
+a program named I<splain>, you should expect a bit of whimsy.
+
+=head1 AUTHOR
+
+Tom Christiansen <F<tchrist@mox.perl.com>>, 25 June 1995.
+
+=cut
+
+use strict;
+use 5.009001;
+use Carp;
+$Carp::Internal{__PACKAGE__.""}++;
+
+our $VERSION = '1.34';
+our $DEBUG;
+our $VERBOSE;
+our $PRETTY;
+our $TRACEONLY = 0;
+our $WARNTRACE = 0;
+
+use Config;
+use Text::Tabs 'expand';
+my $privlib = $Config{privlibexp};
+if ($^O eq 'VMS') {
+    require VMS::Filespec;
+    $privlib = VMS::Filespec::unixify($privlib);
+}
+my @trypod = (
+	   "$privlib/pod/perldiag.pod",
+	   "$privlib/pods/perldiag.pod",
+	  );
+# handy for development testing of new warnings etc
+unshift @trypod, "./pod/perldiag.pod" if -e "pod/perldiag.pod";
+(my $PODFILE) = ((grep { -e } @trypod), $trypod[$#trypod])[0];
+
+$DEBUG ||= 0;
+
+local $| = 1;
+local $_;
+local $.;
+
+my $standalone;
+my(%HTML_2_Troff, %HTML_2_Latin_1, %HTML_2_ASCII_7);
+
+CONFIG: {
+    our $opt_p = our $opt_d = our $opt_v = our $opt_f = '';
+
+    unless (caller) {
+	$standalone++;
+	require Getopt::Std;
+	Getopt::Std::getopts('pdvf:')
+	    or die "Usage: $0 [-v] [-p] [-f splainpod]";
+	$PODFILE = $opt_f if $opt_f;
+	$DEBUG = 2 if $opt_d;
+	$VERBOSE = $opt_v;
+	$PRETTY = $opt_p;
+    }
+
+    if (open(POD_DIAG, $PODFILE)) {
+	warn "Happy happy podfile from real $PODFILE\n" if $DEBUG;
+	last CONFIG;
+    } 
+
+    if (caller) {
+	INCPATH: {
+	    for my $file ( (map { "$_/".__PACKAGE__.".pm" } @INC), $0) {
+		warn "Checking $file\n" if $DEBUG;
+		if (open(POD_DIAG, $file)) {
+		    while (<POD_DIAG>) {
+			next unless
+			    /^__END__\s*# wish diag dbase were more accessible/;
+			print STDERR "podfile is $file\n" if $DEBUG;
+			last INCPATH;
+		    }
+		}
+	    } 
+	}
+    } else { 
+	print STDERR "podfile is <DATA>\n" if $DEBUG;
+	*POD_DIAG = *main::DATA;
+    }
+}
+if (eof(POD_DIAG)) { 
+    die "couldn't find diagnostic data in $PODFILE @INC $0";
+}
+
+
+%HTML_2_Troff = (
+    'amp'	=>	'&',	#   ampersand
+    'lt'	=>	'<',	#   left chevron, less-than
+    'gt'	=>	'>',	#   right chevron, greater-than
+    'quot'	=>	'"',	#   double quote
+
+    "Aacute"	=>	"A\\*'",	#   capital A, acute accent
+    # etc
+
+);
+
+%HTML_2_Latin_1 = (
+    'amp'	=>	'&',	#   ampersand
+    'lt'	=>	'<',	#   left chevron, less-than
+    'gt'	=>	'>',	#   right chevron, greater-than
+    'quot'	=>	'"',	#   double quote
+
+    "Aacute"	=>	"\xC1"	#   capital A, acute accent
+
+    # etc
+);
+
+%HTML_2_ASCII_7 = (
+    'amp'	=>	'&',	#   ampersand
+    'lt'	=>	'<',	#   left chevron, less-than
+    'gt'	=>	'>',	#   right chevron, greater-than
+    'quot'	=>	'"',	#   double quote
+
+    "Aacute"	=>	"A"	#   capital A, acute accent
+    # etc
+);
+
+our %HTML_Escapes;
+*HTML_Escapes = do {
+    if ($standalone) {
+	$PRETTY ? \%HTML_2_Latin_1 : \%HTML_2_ASCII_7; 
+    } else {
+	\%HTML_2_Latin_1; 
+    }
+}; 
+
+*THITHER = $standalone ? *STDOUT : *STDERR;
+
+my %transfmt = (); 
+my $transmo = <<EOFUNC;
+sub transmo {
+    #local \$^W = 0;  # recursive warnings we do NOT need!
+EOFUNC
+
+my %msg;
+{
+    print STDERR "FINISHING COMPILATION for $_\n" if $DEBUG;
+    local $/ = '';
+    local $_;
+    my $header;
+    my @headers;
+    my $for_item;
+    my $seen_body;
+    while (<POD_DIAG>) {
+
+	sub _split_pod_link {
+	    $_[0] =~ m'(?:([^|]*)\|)?([^/]*)(?:/("?)(.*)\3)?'s;
+	    ($1,$2,$4);
+	}
+
+	unescape();
+	if ($PRETTY) {
+	    sub noop   { return $_[0] }  # spensive for a noop
+	    sub bold   { my $str =$_[0];  $str =~ s/(.)/$1\b$1/g; return $str; } 
+	    sub italic { my $str = $_[0]; $str =~ s/(.)/_\b$1/g;  return $str; } 
+	    s/C<<< (.*?) >>>|C<< (.*?) >>|[BC]<(.*?)>/bold($+)/ges;
+	    s/[IF]<(.*?)>/italic($1)/ges;
+	    s/L<(.*?)>/
+	       my($text,$page,$sect) = _split_pod_link($1);
+	       defined $text
+	        ? $text
+	        : defined $sect
+	           ? italic($sect) . ' in ' . italic($page)
+	           : italic($page)
+	     /ges;
+	     s/S<(.*?)>/
+               $1
+             /ges;
+	} else {
+	    s/C<<< (.*?) >>>|C<< (.*?) >>|[BC]<(.*?)>/$+/gs;
+	    s/[IF]<(.*?)>/$1/gs;
+	    s/L<(.*?)>/
+	       my($text,$page,$sect) = _split_pod_link($1);
+	       defined $text
+	        ? $text
+	        : defined $sect
+	           ? qq '"$sect" in $page'
+	           : $page
+	     /ges;
+	    s/S<(.*?)>/
+               $1
+             /ges;
+	} 
+	unless (/^=/) {
+	    if (defined $header) { 
+		if ( $header eq 'DESCRIPTION' && 
+		    (   /Optional warnings are enabled/ 
+		     || /Some of these messages are generic./
+		    ) )
+		{
+		    next;
+		}
+		$_ = expand $_;
+		s/^/    /gm;
+		$msg{$header} .= $_;
+		for my $h(@headers) { $msg{$h} .= $_ }
+		++$seen_body;
+	 	undef $for_item;	
+	    }
+	    next;
+	} 
+
+	# If we have not come across the body of the description yet, then
+	# the previous header needs to share the same description.
+	if ($seen_body) {
+	    @headers = ();
+	}
+	else {
+	    push @headers, $header if defined $header;
+	}
+
+	unless ( s/=item (.*?)\s*\z//s) {
+
+	    if ( s/=head1\sDESCRIPTION//) {
+		$msg{$header = 'DESCRIPTION'} = '';
+		undef $for_item;
+	    }
+	    elsif( s/^=for\s+diagnostics\s*\n(.*?)\s*\z// ) {
+		$for_item = $1;
+	    }
+	    elsif( /^=back/ ) { # Stop processing body here
+		undef $header;
+		undef $for_item;
+		$seen_body = 0;
+		next;
+	    }
+	    next;
+	}
+
+	if( $for_item ) { $header = $for_item; undef $for_item } 
+	else {
+	    $header = $1;
+
+	    $header =~ s/\n/ /gs; # Allow multi-line headers
+	}
+
+	# strip formatting directives from =item line
+	$header =~ s/[A-Z]<(.*?)>/$1/g;
+
+	# Since we strip "(\.\s*)\n" when we search a warning, strip it here as well
+	$header =~ s/(\.\s*)?$//;
+
+        my @toks = split( /(%l?[dxX]|%[ucp]|%(?:\.\d+)?[fs])/, $header );
+	if (@toks > 1) {
+            my $conlen = 0;
+            for my $i (0..$#toks){
+                if( $i % 2 ){
+                    if(      $toks[$i] eq '%c' ){
+                        $toks[$i] = '.';
+                    } elsif( $toks[$i] =~ /^%(?:d|u)$/ ){
+                        $toks[$i] = '\d+';
+                    } elsif( $toks[$i] =~ '^%(?:s|.*f)$' ){
+                        $toks[$i] = $i == $#toks ? '.*' : '.*?';
+                    } elsif( $toks[$i] =~ '%.(\d+)s' ){
+                        $toks[$i] = ".{$1}";
+                    } elsif( $toks[$i] =~ '^%l*([pxX])$' ){
+                        $toks[$i] = $1 eq 'X' ? '[\dA-F]+' : '[\da-f]+';
+                    }
+                } elsif( length( $toks[$i] ) ){
+                    $toks[$i] = quotemeta $toks[$i];
+                    $conlen += length( $toks[$i] );
+                }
+            }  
+            my $lhs = join( '', @toks );
+            $lhs =~ s/(\\\s)+/\\s+/g; # Replace lit space with multi-space match
+	    $transfmt{$header}{pat} =
+              "    s^\\s*$lhs\\s*\Q$header\Es\n\t&& return 1;\n";
+            $transfmt{$header}{len} = $conlen;
+	} else {
+            my $lhs = "\Q$header\E";
+            $lhs =~ s/(\\\s)+/\\s+/g; # Replace lit space with multi-space match
+            $transfmt{$header}{pat} =
+	      "    s^\\s*$lhs\\s*\Q$header\E\n\t && return 1;\n";
+            $transfmt{$header}{len} = length( $header );
+	} 
+
+	print STDERR __PACKAGE__.": Duplicate entry: \"$header\"\n"
+	    if $msg{$header};
+
+	$msg{$header} = '';
+	$seen_body = 0;
+    } 
+
+
+    close POD_DIAG unless *main::DATA eq *POD_DIAG;
+
+    die "No diagnostics?" unless %msg;
+
+    # Apply patterns in order of decreasing sum of lengths of fixed parts
+    # Seems the best way of hitting the right one.
+    for my $hdr ( sort { $transfmt{$b}{len} <=> $transfmt{$a}{len} }
+                  keys %transfmt ){
+        $transmo .= $transfmt{$hdr}{pat};
+    }
+    $transmo .= "    return 0;\n}\n";
+    print STDERR $transmo if $DEBUG;
+    eval $transmo;
+    die $@ if $@;
+}
+
+if ($standalone) {
+    if (!@ARGV and -t STDIN) { print STDERR "$0: Reading from STDIN\n" } 
+    while (defined (my $error = <>)) {
+	splainthis($error) || print THITHER $error;
+    } 
+    exit;
+} 
+
+my $olddie;
+my $oldwarn;
+
+sub import {
+    shift;
+    $^W = 1; # yup, clobbered the global variable; 
+	     # tough, if you want diags, you want diags.
+    return if defined $SIG{__WARN__} && ($SIG{__WARN__} eq \&warn_trap);
+
+    for (@_) {
+
+	/^-d(ebug)?$/ 	   	&& do {
+				    $DEBUG++;
+				    next;
+				   };
+
+	/^-v(erbose)?$/ 	&& do {
+				    $VERBOSE++;
+				    next;
+				   };
+
+	/^-p(retty)?$/ 		&& do {
+				    print STDERR "$0: I'm afraid it's too late for prettiness.\n";
+				    $PRETTY++;
+				    next;
+			       };
+	# matches trace and traceonly for legacy doc mixup reasons
+	/^-t(race(only)?)?$/	&& do {
+				    $TRACEONLY++;
+				    next;
+			       };
+	/^-w(arntrace)?$/ 	&& do {
+				    $WARNTRACE++;
+				    next;
+			       };
+
+	warn "Unknown flag: $_";
+    } 
+
+    $oldwarn = $SIG{__WARN__};
+    $olddie = $SIG{__DIE__};
+    $SIG{__WARN__} = \&warn_trap;
+    $SIG{__DIE__} = \&death_trap;
+} 
+
+sub enable { &import }
+
+sub disable {
+    shift;
+    return unless $SIG{__WARN__} eq \&warn_trap;
+    $SIG{__WARN__} = $oldwarn || '';
+    $SIG{__DIE__} = $olddie || '';
+} 
+
+sub warn_trap {
+    my $warning = $_[0];
+    if (caller eq __PACKAGE__ or !splainthis($warning)) {
+	if ($WARNTRACE) {
+	    print STDERR Carp::longmess($warning);
+	} else {
+	    print STDERR $warning;
+	}
+    } 
+    goto &$oldwarn if defined $oldwarn and $oldwarn and $oldwarn ne \&warn_trap;
+};
+
+sub death_trap {
+    my $exception = $_[0];
+
+    # See if we are coming from anywhere within an eval. If so we don't
+    # want to explain the exception because it's going to get caught.
+    my $in_eval = 0;
+    my $i = 0;
+    while (my $caller = (caller($i++))[3]) {
+      if ($caller eq '(eval)') {
+	$in_eval = 1;
+	last;
+      }
+    }
+
+    splainthis($exception) unless $in_eval;
+    if (caller eq __PACKAGE__) {
+	print STDERR "INTERNAL EXCEPTION: $exception";
+    } 
+    &$olddie if defined $olddie and $olddie and $olddie ne \&death_trap;
+
+    return if $in_eval;
+
+    # We don't want to unset these if we're coming from an eval because
+    # then we've turned off diagnostics.
+
+    # Switch off our die/warn handlers so we don't wind up in our own
+    # traps.
+    $SIG{__DIE__} = $SIG{__WARN__} = '';
+
+    $exception =~ s/\n(?=.)/\n\t/gas;
+
+    die Carp::longmess("__diagnostics__")
+	  =~ s/^__diagnostics__.*?line \d+\.?\n/
+		  "Uncaught exception from user code:\n\t$exception"
+	      /re;
+	# up we go; where we stop, nobody knows, but i think we die now
+	# but i'm deeply afraid of the &$olddie guy reraising and us getting
+	# into an indirect recursion loop
+};
+
+my %exact_duplicate;
+my %old_diag;
+my $count;
+my $wantspace;
+sub splainthis {
+  return 0 if $TRACEONLY;
+  for (my $tmp = shift) {
+    local $\;
+    local $!;
+    ### &finish_compilation unless %msg;
+    s/(\.\s*)?\n+$//;
+    my $orig = $_;
+    # return unless defined;
+
+    # get rid of the where-are-we-in-input part
+    s/, <.*?> (?:line|chunk).*$//;
+
+    # Discard 1st " at <file> line <no>" and all text beyond
+    # but be aware of messages containing " at this-or-that"
+    my $real = 0;
+    my @secs = split( / at / );
+    return unless @secs;
+    $_ = $secs[0];
+    for my $i ( 1..$#secs ){
+        if( $secs[$i] =~ /.+? (?:line|chunk) \d+/ ){
+            $real = 1;
+            last;
+        } else {
+            $_ .= ' at ' . $secs[$i];
+	}
+    }
+
+    # remove parenthesis occurring at the end of some messages 
+    s/^\((.*)\)$/$1/;
+
+    if ($exact_duplicate{$orig}++) {
+	return &transmo;
+    } else {
+	return 0 unless &transmo;
+    }
+
+    my $short = shorten($orig);
+    if ($old_diag{$_}) {
+	autodescribe();
+	print THITHER "$short (#$old_diag{$_})\n";
+	$wantspace = 1;
+    } elsif (!$msg{$_} && $orig =~ /\n./s) {
+	# A multiline message, like "Attempt to reload /
+	# Compilation failed"
+	my $found;
+	for (split /^/, $orig) {
+	    splainthis($_) and $found = 1;
+	}
+	return $found;
+    } else {
+	autodescribe();
+	$old_diag{$_} = ++$count;
+	print THITHER "\n" if $wantspace;
+	$wantspace = 0;
+	print THITHER "$short (#$old_diag{$_})\n";
+	if ($msg{$_}) {
+	    print THITHER $msg{$_};
+	} else {
+	    if (0 and $standalone) { 
+		print THITHER "    **** Error #$old_diag{$_} ",
+			($real ? "is" : "appears to be"),
+			" an unknown diagnostic message.\n\n";
+	    }
+	    return 0;
+	} 
+    }
+    return 1;
+  }
+} 
+
+sub autodescribe {
+    if ($VERBOSE and not $count) {
+	print THITHER &{$PRETTY ? \&bold : \&noop}("DESCRIPTION OF DIAGNOSTICS"),
+		"\n$msg{DESCRIPTION}\n";
+    } 
+} 
+
+sub unescape { 
+    s {
+            E<  
+            ( [A-Za-z]+ )       
+            >   
+    } { 
+         do {   
+             exists $HTML_Escapes{$1}
+                ? do { $HTML_Escapes{$1} }
+                : do {
+                    warn "Unknown escape: E<$1> in $_";
+                    "E<$1>";
+                } 
+         } 
+    }egx;
+}
+
+sub shorten {
+    my $line = $_[0];
+    if (length($line) > 79 and index($line, "\n") == -1) {
+	my $space_place = rindex($line, ' ', 79);
+	if ($space_place != -1) {
+	    substr($line, $space_place, 1) = "\n\t";
+	} 
+    } 
+    return $line;
+} 
+
+
+1 unless $standalone;  # or it'll complain about itself
+__END__ # wish diag dbase were more accessible
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/split.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/split.exe
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index 00000000..7fb35256
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/sum.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/sum.exe
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index 00000000..b903d60d
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/sync.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/sync.exe
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index 00000000..baaa955a
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tabs.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tabs.exe
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index 00000000..9eab2b21
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tac.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tac.exe
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index 00000000..9ab40830
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tail.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tail.exe
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index 00000000..83f0f3d3
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tailf.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tailf.exe
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index 00000000..8ef77bf5
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tar.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tar.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-addr2line.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-addr2line.exe
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index 00000000..fe8873a2
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ar.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ar.exe
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index 00000000..1a610a85
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-as.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-as.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-c++filt.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-c++filt.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-cpp.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-cpp.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcc-4.5.1-tc32-1.3.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcc-4.5.1-tc32-1.3.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcc.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcc.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gccbug b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gccbug
new file mode 100644
index 00000000..cdd1be29
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gccbug
@@ -0,0 +1,558 @@
+#!/bin/sh
+# Submit a problem report to a GNATS site.
+# Copyright (C) 1993, 2000, 2001, 2002, 2003, 2007 Free Software Foundation, Inc.
+# Contributed by Brendan Kehoe (brendan@cygnus.com), based on a
+# version written by Heinz G. Seidl (hgs@cygnus.com).
+#
+# This file is part of GNU GNATS.
+#
+# GNU GNATS is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3, or (at your option)
+# any later version.
+#
+# GNU GNATS is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with GNU GNATS; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+
+# The version of this send-pr.
+VERSION=3.113
+
+# The submitter-id for your site.
+SUBMITTER=net
+
+# The default mail address for PR submissions. 
+GNATS_ADDR=gcc-gnats@gcc.gnu.org
+
+# The default release for this host.
+# We have to guess at what program_transform_name might have done.
+# "sed 1q" because neither "head -1" nor "head -n 1" is universal, argh.
+
+DEFAULT_GCC="`echo $0 | sed -e 's/bug//'`"
+DEFAULT_RELEASE="`$DEFAULT_GCC --version | sed 1q`"
+
+# The default organization.
+DEFAULT_ORGANIZATION=
+
+# What mailer to use.  This must come after the config file, since it is
+# host-dependent.
+# Copied from cvsbug
+if [ -f /usr/sbin/sendmail ]; then  
+    MAIL_AGENT="/usr/sbin/sendmail -oi -t"
+else  
+    MAIL_AGENT="/usr/lib/sendmail -oi -t"
+fi
+MAILER=`echo $MAIL_AGENT | sed -e 's, .*,,'`
+if [ ! -f "$MAILER" ] ; then
+    echo "$COMMAND: Cannot file mail program \"$MAILER\"."
+    echo "$COMMAND: Please fix the MAIL_AGENT entry in the $COMMAND file."
+    exit 1
+fi
+
+
+# How to read the passwd database.
+PASSWD="cat /etc/passwd"
+
+ECHON=bsd
+
+if [ $ECHON = bsd ] ; then
+  ECHON1="echo -n"
+  ECHON2=
+elif [ $ECHON = sysv ] ; then
+  ECHON1=echo
+  ECHON2='\c'
+else
+  ECHON1=echo
+  ECHON2=
+fi
+
+#
+
+if [ -z "$TMPDIR" ]; then
+  TMPDIR=/tmp
+else
+  if [ "`echo $TMPDIR | grep '/$'`" != "" ]; then
+    TMPDIR="`echo $TMPDIR | sed -e 's,/$,,'`"
+  fi
+fi
+
+if [ yes = yes ]; then
+	TEMP0=`mktemp $TMPDIR/poXXXXXX` || exit 1
+	TEMP=`mktemp $TMPDIR/pXXXXXX` || exit 1
+	BAD=`mktemp $TMPDIR/pbadXXXXXX` || exit 1
+	REF=`mktemp $TMPDIR/pfXXXXXX` || exit 1
+	REMOVE_TEMP="rm -f $TEMP0 $TEMP $BAD $REF"
+else
+	TEMPD=$TMPDIR/pd$$
+	TEMP0=$TEMPD/po$$
+	TEMP=$TEMPD/p$$
+	BAD=$TEMPD/pbad$$
+	REF=$TEMPD/pf$$
+	mkdir $TEMPD || exit 1
+	REMOVE_TEMP="rm -rf $TEMPD"
+fi
+
+# find a user name
+if [ "$LOGNAME" = "" ]; then
+	if [ "$USER" != "" ]; then
+		LOGNAME="$USER"
+	else
+		LOGNAME="UNKNOWN"
+	fi
+fi
+
+FROM="$LOGNAME"
+REPLY_TO="${REPLY_TO:-${REPLYTO:-$LOGNAME}}"
+
+# Find out the name of the originator of this PR.
+if [ -n "$NAME" ]; then
+  ORIGINATOR="$NAME"
+elif [ -f $HOME/.fullname ]; then
+  ORIGINATOR="`sed -e '1q' $HOME/.fullname`"
+else
+  # Must use temp file due to incompatibilities in quoting behavior
+  # and to protect shell metacharacters in the expansion of $LOGNAME
+  $PASSWD | grep "^$LOGNAME:" | awk -F: '{print $5}' | sed -e 's/,.*//' > $TEMP0
+  ORIGINATOR="`cat $TEMP0`"
+  rm -f $TEMP0
+fi
+
+if [ -n "$ORGANIZATION" ]; then
+  if [ -f "$ORGANIZATION" ]; then
+    ORGANIZATION="`cat $ORGANIZATION`"
+  fi
+else
+  if [ -n "$DEFAULT_ORGANIZATION" ]; then
+    ORGANIZATION="$DEFAULT_ORGANIZATION"
+  elif [ -f $HOME/.organization ]; then
+    ORGANIZATION="`cat $HOME/.organization`"
+  fi
+fi
+
+# If they don't have a preferred editor set, then use
+if [ -z "$VISUAL" ]; then
+  if [ -z "$EDITOR" ]; then
+    EDIT=vi
+  else
+    EDIT="$EDITOR"
+  fi
+else
+  EDIT="$VISUAL"
+fi
+
+# Find out some information.
+SYSTEM=`( [ -f /bin/uname ] && /bin/uname -a ) || \
+        ( [ -f /usr/bin/uname ] && /usr/bin/uname -a ) || echo ""`
+ARCH=`[ -f /bin/arch ] && /bin/arch`
+MACHINE=`[ -f /bin/machine ] && /bin/machine`
+
+COMMAND=`echo $0 | sed -e 's,.*/,,'`
+USAGE="Usage: $COMMAND [-PVL] [-t address] [-f filename] [-s severity]
+       [-c address] [--request-id] [--version]"
+REMOVE=
+BATCH=
+CC=
+SEVERITY_C=
+
+while [ $# -gt 0 ]; do
+  case "$1" in
+    -r) ;; 		# Ignore for backward compat.
+    -t | --to) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; GNATS_ADDR="$1"
+	EXPLICIT_GNATS_ADDR=true
+        ;;
+    -f | --file) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; IN_FILE="$1"
+	if [ "$IN_FILE" != "-" -a ! -r "$IN_FILE" ]; then
+	  echo "$COMMAND: cannot read $IN_FILE"
+	  $REMOVE_TEMP
+	  exit 1
+	fi
+	;;
+    -b | --batch) BATCH=true ;;
+    -c | --cc) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; CC="$1"
+	;;
+    -s | --severity) if [ $# -eq 1 ]; then echo "$USAGE"; $REMOVE_TEMP; exit 1; fi
+	shift ; SEVERITY_C="$1"
+	;;
+    -p | -P | --print) PRINT=true ;;
+    -L | --list) FORMAT=norm ;;
+    -l | -CL | --lisp) FORMAT=lisp ;;
+    --request-id) REQUEST_ID=true ;;
+    -h | --help) echo "$USAGE"; $REMOVE_TEMP; exit 0 ;;
+    -V | --version) cat <<EOF
+gccbug (GCC) $DEFAULT_RELEASE
+Copyright (C) 2002 Free Software Foundation, Inc.
+This is free software; see the source for copying conditions.  There is NO
+warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+
+EOF
+	$REMOVE_TEMP; exit 0 ;;
+    -*) echo "$USAGE" ; $REMOVE_TEMP; exit 1 ;;
+    *) echo "$USAGE" ; $REMOVE_TEMP; exit 1
+ esac
+ shift
+done
+
+# spam does not need to be listed here
+CATEGORIES="ada bootstrap c++ c debug driver fortran inline-asm java libgcj libobjc libstdc++ middle-end objc other pch preprocessor rtl-optimization target tree-optimization web"
+
+case "$FORMAT" in
+  lisp) echo "$CATEGORIES" | \
+        awk 'BEGIN {printf "( "} {printf "(\"%s\") ",$0} END {printf ")\n"}'
+	$REMOVE_TEMP
+        exit 0
+        ;;
+  norm) l=`echo "$CATEGORIES" | \
+	awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+	     END {print max + 1;}'`
+	c=`expr 70 / $l`
+	if [ $c -eq 0 ]; then c=1; fi
+	echo "$CATEGORIES" | \
+        awk 'BEGIN {print "Known categories:"; i = 0 }
+          { printf ("%-'$l'.'$l's", $0); if ((++i % '$c') == 0) { print "" } }
+            END { print ""; }'
+	$REMOVE_TEMP
+        exit 0
+        ;;
+esac
+
+ORIGINATOR_C='<name of the PR author (one line)>'
+ORGANIZATION_C='<organization of PR author (multiple lines)>'
+SYNOPSIS_C='<synopsis of the problem (one line)>'
+if [ -z "$SEVERITY_C" ]; then
+  SEVERITY_C='<[ non-critical | serious | critical ] (one line)>'
+fi
+PRIORITY_C='<[ low | medium ] (one line)>'
+CATEGORY_C='<choose from the top of this file (one line)>'
+RELEASE_C='<release number or tag (one line)>'
+ENVIRONMENT_C='<machine, os, target, libraries (multiple lines)>'
+DESCRIPTION_C='<precise description of the problem (multiple lines)>'
+HOW_TO_REPEAT_C='<When reporting a compiler error, preprocessor output must be included>'
+FIX_C='<how to correct or work around the problem, if known (multiple lines)>'
+
+# Catch some signals. ($xs kludge needed by Sun /bin/sh)
+xs=0
+trap '$REMOVE_TEMP; exit $xs' 0
+trap 'echo "$COMMAND: Aborting ..."; $REMOVE_TEMP; xs=1; exit' 1 3 13 15
+
+# If they told us to use a specific file, then do so.
+if [ -n "$IN_FILE" ]; then
+  if [ "$IN_FILE" = "-" ]; then
+    # The PR is coming from the standard input.
+    if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+      sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" > $TEMP
+    else
+      cat > $TEMP
+    fi
+  else
+    # Use the file they named.
+    if [ -n "$EXPLICIT_GNATS_ADDR" ]; then
+      sed -e "s;^[Tt][Oo]:.*;To: $GNATS_ADDR;" $IN_FILE > $TEMP
+    else
+      cat $IN_FILE > $TEMP
+    fi
+  fi
+else
+
+  if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+    # If their PR_FORM points to a bogus entry, then bail.
+    if [ ! -f "$PR_FORM" -o ! -r "$PR_FORM" -o ! -s "$PR_FORM" ]; then
+      echo "$COMMAND: can't seem to read your template file (\`$PR_FORM'), ignoring PR_FORM"
+      sleep 1
+      PRINT_INTERN=bad_prform
+    fi
+  fi
+
+  if [ -n "$PR_FORM" -a -z "$PRINT_INTERN" ]; then
+    cp $PR_FORM $TEMP || 
+      ( echo "$COMMAND: could not copy $PR_FORM" ; xs=1; exit )
+  else
+    for file in $TEMP $REF ; do
+      cat  > $file << '__EOF__'
+SEND-PR: -*- send-pr -*-
+SEND-PR: Lines starting with `SEND-PR' will be removed automatically, as
+SEND-PR: will all comments (text enclosed in `<' and `>').
+SEND-PR: 
+SEND-PR: Please consult the GCC manual if you are not sure how to
+SEND-PR: fill out a problem report.
+SEND-PR: Note that the Synopsis field is mandatory.  The Subject (for
+SEND-PR: the mail) will be made the same as Synopsis unless explicitly
+SEND-PR: changed.
+SEND-PR:
+SEND-PR: Choose from the following categories:
+SEND-PR:
+__EOF__
+
+      # Format the categories so they fit onto lines.
+	l=`echo "$CATEGORIES" | \
+	awk 'BEGIN {max = 0; } { if (length($0) > max) { max = length($0); } }
+	     END {print max + 1;}'`
+	c=`expr 61 / $l`
+	if [ $c -eq 0 ]; then c=1; fi
+	echo "$CATEGORIES" | \
+        awk 'BEGIN {printf "SEND-PR: "; i = 0 }
+          { printf ("%-'$l'.'$l's", $0);
+	    if ((++i % '$c') == 0) { printf "\nSEND-PR: " } }
+            END { printf "\nSEND-PR:\n"; }' >> $file
+
+      cat >> $file << __EOF__
+To: $GNATS_ADDR
+Subject: 
+From: $FROM
+Reply-To: $REPLYTO
+Cc: $CC
+X-send-pr-version: $VERSION
+X-GNATS-Notify: 
+
+
+>Submitter-Id:	$SUBMITTER
+>Originator:	$ORIGINATOR
+>Organization:	${ORGANIZATION-$ORGANIZATION_C}
+>Confidential:	no
+SEND-PR: Leave "Confidential" as "no"; all GCC PRs are public.
+>Synopsis:	$SYNOPSIS_C
+>Severity:	$SEVERITY_C
+SEND-PR: critical     GCC is completely not operational; no work-around known.
+SEND-PR: serious      GCC is not working properly; a work-around is possible.
+SEND-PR: non-critical Report indicates minor problem.
+>Priority:	$PRIORITY_C
+SEND-PR: medium       The problem should be solved in the next release.
+SEND-PR: low          The problem should be solve in a future release.
+>Category:	$CATEGORY_C
+>Class:		<[ doc-bug | accepts-illegal | rejects-legal | wrong-code | ice-on-legal-code| ice-on-illegal-code | pessimizes-code | sw-bug | change-request | support ] (one line)>
+SEND-PR: doc-bug          The documentation is incorrect.
+SEND-PR: accepts-illegal  GCC fails to reject erroneous code.
+SEND-PR: rejects-legal    GCC gives an error message for correct code.
+SEND-PR: wrong-code       The machine code generated by gcc is incorrect.
+SEND-PR: ice-on-legal-code   GCC gives an Internal Compiler Error (ICE)
+SEND-PR:                     for correct code
+SEND-PR: ice-on-illegal-code GCC gives an ICE instead of reporting an error
+SEND-PR: pessimizes-code     GCC misses an important optimization opportunity
+SEND-PR: sw-bug              Software bug of some other class than above
+SEND-PR: change-request      A feature in GCC is missing.
+SEND-PR: support             I need help with gcc.
+>Release:	${DEFAULT_RELEASE-$RELEASE_C}
+>Environment:
+`[ -n "$SYSTEM" ] && echo System: $SYSTEM`
+`[ -n "$ARCH" ] && echo Architecture: $ARCH`
+`[ -n "$MACHINE" ] && echo Machine: $MACHINE`
+	$ENVIRONMENT_C
+host: i686-pc-mingw32
+build: i686-pc-mingw32
+target: tc32-unknown-elf
+__EOF__
+      cat >> $file << \__EOF__
+configured with: ../../gcc-4.5.1/configure --target=tc32-elf --prefix=/opt/tc32 --disable-nls --disable-shared --disable-threads --with-gcc --with-gnu-ld --with-gnu-as --with-dwarf2 --enable-languages=c --disable-libstdcxx-pch --disable-libmudflap --disable-libgcc --disable-libssp --disable-multilib --disable-bootstrap --with-mpc=/opt/addontools --with-mpfr=/opt/addontools --with-gmp=/opt/addontools
+__EOF__
+      cat >> $file << __EOF__
+>Description:
+	$DESCRIPTION_C
+>How-To-Repeat:
+	$HOW_TO_REPEAT_C
+>Fix:
+	$FIX_C
+__EOF__
+    done
+  fi
+
+  if [ "$PRINT" = true -o "$PRINT_INTERN" = true ]; then
+    cat $TEMP
+    xs=0; exit
+  fi
+
+  chmod u+w $TEMP
+  if [ -z "$REQUEST_ID" ]; then
+    eval $EDIT $TEMP
+  else
+    ed -s $TEMP << '__EOF__'
+/^Subject/s/^Subject:.*/Subject: request for a customer id/
+/^>Category/s/^>Category:.*/>Category: send-pr/
+w
+q
+__EOF__
+  fi
+
+  if cmp -s $REF $TEMP ; then
+    echo "$COMMAND: problem report not filled out, therefore not sent"
+    xs=1; exit
+  fi
+fi
+
+#
+#	Check the enumeration fields
+
+# This is a "sed-subroutine" with one keyword parameter 
+# (with workaround for Sun sed bug)
+#
+SED_CMD='
+/$PATTERN/{
+s|||
+s|<.*>||
+s|^[ 	]*||
+s|[ 	]*$||
+p
+q
+}'
+
+
+while [ -z "$REQUEST_ID" ]; do
+  CNT=0
+
+  # 1) Confidential
+  #
+  PATTERN=">Confidential:"
+  CONFIDENTIAL=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$CONFIDENTIAL" in
+    no) CNT=`expr $CNT + 1` ;;
+    *) echo "$COMMAND: \`$CONFIDENTIAL' is not a valid value for \`Confidential'." ;;
+  esac
+  #
+  # 2) Severity
+  #
+  PATTERN=">Severity:"
+  SEVERITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$SEVERITY" in
+    ""|non-critical|serious|critical) CNT=`expr $CNT + 1` ;;
+    *)  echo "$COMMAND: \`$SEVERITY' is not a valid value for \`Severity'."
+  esac
+  #
+  # 3) Priority
+  #
+  PATTERN=">Priority:"
+  PRIORITY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$PRIORITY" in
+    ""|low|medium) CNT=`expr $CNT + 1` ;;
+    high) echo "$COMMAND: \`Priority: high' is reserved for GCC maintainers." ;;
+    *)  echo "$COMMAND: \`$PRIORITY' is not a valid value for \`Priority'."
+  esac
+  #
+  # 4) Category
+  #
+  PATTERN=">Category:"
+  CATEGORY=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  FOUND=
+  for C in $CATEGORIES
+  do
+    if [ "$C" = "$CATEGORY" ]; then FOUND=true ; break ; fi
+  done
+  if [ -n "$FOUND" ]; then
+    CNT=`expr $CNT + 1`	
+  else
+    if [ -z "$CATEGORY" ]; then
+      echo "$COMMAND: you must include a Category: field in your report."
+    else
+      echo "$COMMAND: \`$CATEGORY' is not a known category."
+    fi
+  fi
+  #
+  # 5) Class
+  #
+  PATTERN=">Class:"
+  CLASS=`eval sed -n -e "\"$SED_CMD\"" $TEMP`
+  case "$CLASS" in
+    ""|doc-bug|accepts-illegal|rejects-legal|wrong-code|ice-on-legal-code|ice-on-illegal-code|pessimizes-code|sw-bug|change-request|support) CNT=`expr $CNT + 1` ;;
+    *)  echo "$COMMAND: \`$CLASS' is not a valid value for \`Class'."
+  esac
+  #
+  # 6) Check that synopsis is not empty
+  #
+  if grep "^>Synopsis:[ 	]*${SYNOPSIS_C}\$" $TEMP > /dev/null
+  then
+    echo "$COMMAND: Synopsis must not be empty."
+  else
+    CNT=`expr $CNT + 1`
+  fi
+
+  [ $CNT -lt 6 -a -z "$BATCH" ] && 
+    echo "Errors were found with the problem report."
+
+  while true; do
+    if [ -z "$BATCH" ]; then
+      $ECHON1 "a)bort, e)dit or s)end? $ECHON2"
+      read input
+    else
+      if [ $CNT -eq 6 ]; then
+        input=s
+      else
+        input=a
+      fi
+    fi
+    case "$input" in
+      a*)
+	if [ -z "$BATCH" ]; then
+	  echo "$COMMAND: the problem report remains in $BAD and is not sent."
+	  REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+	  mv $TEMP $BAD
+        else
+	  echo "$COMMAND: the problem report is not sent."
+	fi
+	xs=1; exit
+	;;
+      e*)
+        eval $EDIT $TEMP
+	continue 2
+	;;
+      s*)
+	break 2
+	;;
+    esac
+  done
+done
+
+#
+# Make sure the mail has got a Subject.  If not, use the same as
+# in Synopsis.
+#
+
+if grep '^Subject:[ 	]*$' $TEMP > /dev/null
+then
+  SYNOPSIS=`grep '^>Synopsis:' $TEMP | sed -e 's/^>Synopsis:[ 	]*//'`
+  ed -s $TEMP << __EOF__
+/^Subject:/s/:.*\$/: $SYNOPSIS/
+w
+q
+__EOF__
+fi
+
+#
+#	Remove comments and send the problem report
+#	(we have to use patterns, where the comment contains regex chars)
+#
+# /^>Originator:/s;$ORIGINATOR;;
+sed  -e "
+/^SEND-PR:/d
+/^>Organization:/,/^>[A-Za-z-]*:/s;$ORGANIZATION_C;;
+/^>Confidential:/s;<.*>;;
+/^>Synopsis:/s;$SYNOPSIS_C;;
+/^>Severity:/s;<.*>;;
+/^>Priority:/s;<.*>;;
+/^>Category:/s;$CATEGORY_C;;
+/^>Class:/s;<.*>;;
+/^>Release:/,/^>[A-Za-z-]*:/s;$RELEASE_C;;
+/^>Environment:/,/^>[A-Za-z-]*:/s;$ENVIRONMENT_C;;
+/^>Description:/,/^>[A-Za-z-]*:/s;$DESCRIPTION_C;;
+/^>How-To-Repeat:/,/^>[A-Za-z-]*:/s;$HOW_TO_REPEAT_C;;
+/^>Fix:/,/^>[A-Za-z-]*:/s;$FIX_C;;
+" $TEMP > $REF
+
+if $MAIL_AGENT < $REF; then
+  echo "$COMMAND: problem report sent"
+  xs=0; exit
+else
+  echo "$COMMAND: mysterious mail failure."
+  if [ -z "$BATCH" ]; then
+    echo "$COMMAND: the problem report remains in $BAD and is not sent."
+    REMOVE_TEMP="rm -f $TEMP0 $TEMP $REF"
+    mv $REF $BAD
+  else
+    echo "$COMMAND: the problem report is not sent."
+  fi
+  xs=1; exit
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcov.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcov.exe
new file mode 100644
index 00000000..021ac545
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gcov.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gprof.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gprof.exe
new file mode 100644
index 00000000..9caf1f99
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-gprof.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ld.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ld.exe
new file mode 100644
index 00000000..16022788
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ld.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-nm.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-nm.exe
new file mode 100644
index 00000000..03378ce6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-nm.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objcopy.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objcopy.exe
new file mode 100644
index 00000000..9c6d5cc7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objcopy.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objdump.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objdump.exe
new file mode 100644
index 00000000..a2bdb285
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-objdump.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ranlib.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ranlib.exe
new file mode 100644
index 00000000..aebd9b17
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-ranlib.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-readelf.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-readelf.exe
new file mode 100644
index 00000000..d89cc9ac
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-readelf.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-size.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-size.exe
new file mode 100644
index 00000000..295afe4a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-size.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strings.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strings.exe
new file mode 100644
index 00000000..4155112d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strings.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strip.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strip.exe
new file mode 100644
index 00000000..7439ee10
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tc32-elf-strip.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tee.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tee.exe
new file mode 100644
index 00000000..38c509b0
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tee.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/test.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/test.exe
new file mode 100644
index 00000000..9c8f82c6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/test.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tic.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tic.exe
new file mode 100644
index 00000000..f65c4fd7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tic.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/timeout.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/timeout.exe
new file mode 100644
index 00000000..322f5e6a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/timeout.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/toe.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/toe.exe
new file mode 100644
index 00000000..bfb66636
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/toe.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/touch.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/touch.exe
new file mode 100644
index 00000000..400baf18
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/touch.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tput.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tput.exe
new file mode 100644
index 00000000..9e90f9ad
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tput.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tr.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tr.exe
new file mode 100644
index 00000000..55fee338
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tr.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/true.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/true.exe
new file mode 100644
index 00000000..03ba77ee
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/true.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/truncate.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/truncate.exe
new file mode 100644
index 00000000..a860651d
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/truncate.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tset.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tset.exe
new file mode 100644
index 00000000..0f93d887
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tset.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tsort.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tsort.exe
new file mode 100644
index 00000000..d1fff6b9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tsort.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tty.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tty.exe
new file mode 100644
index 00000000..ec628704
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tty.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tzset.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tzset.exe
new file mode 100644
index 00000000..a367caf4
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/tzset.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ul.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ul.exe
new file mode 100644
index 00000000..35e12f62
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/ul.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/umount.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/umount.exe
new file mode 100644
index 00000000..ab89e3d3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/umount.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uname.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uname.exe
new file mode 100644
index 00000000..41caa38b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uname.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unexpand.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unexpand.exe
new file mode 100644
index 00000000..16fe6f5e
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unexpand.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uniq.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uniq.exe
new file mode 100644
index 00000000..f1ea65f8
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uniq.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlink.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlink.exe
new file mode 100644
index 00000000..bf2f7dc9
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlink.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlzma b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlzma
new file mode 100644
index 00000000..4dc090ec
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unlzma differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unxz b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unxz
new file mode 100644
index 00000000..4dc090ec
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/unxz differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/updatedb b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/updatedb
new file mode 100644
index 00000000..8d92f139
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/updatedb
@@ -0,0 +1,413 @@
+#! /bin/sh
+# updatedb -- build a locate pathname database
+# Copyright (C) 1994, 1996, 1997, 2000, 2001, 2003, 2004, 2005, 2006,
+# 2010, 2011 Free Software Foundation, Inc.
+#
+# This program is free software: you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation, either version 3 of the License, or
+# (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program.  If not, see <http://www.gnu.org/licenses/>.
+
+# csh original by James Woods; sh conversion by David MacKenzie.
+
+#exec 2> /tmp/updatedb-trace.txt
+#set -x
+
+version='
+updatedb (GNU findutils) 4.6.0
+Copyright (C) 2007,2008,2009,2010 Free Software Foundation, Inc.
+License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
+This is free software: you are free to change and redistribute it.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Eric B. Decker, James Youngman, and Kevin Dalley.
+'
+
+
+usage="\
+Usage: $0 [--findoptions='-option1 -option2...']
+       [--localpaths='dir1 dir2...'] [--netpaths='dir1 dir2...']
+       [--prunepaths='dir1 dir2...'] [--prunefs='fs1 fs2...']
+       [--output=dbfile] [--netuser=user] [--localuser=user]
+       [--old-format] [--dbformat] [--version] [--help]
+
+Report bugs to <bug-findutils@gnu.org>."
+changeto=/
+old=no
+for arg
+do
+  # If we are unable to fork, the back-tick operator will
+  # fail (and the shell will emit an error message).  When
+  # this happens, we exit with error value 71 (EX_OSERR).
+  # Alternative candidate - 75, EX_TEMPFAIL.
+  opt=`echo $arg|sed 's/^\([^=]*\).*/\1/'`  || exit 71
+  val=`echo $arg|sed 's/^[^=]*=\(.*\)/\1/'` || exit 71
+  case "$opt" in
+    --findoptions) FINDOPTIONS="$val" ;;
+    --localpaths) SEARCHPATHS="$val" ;;
+    --netpaths) NETPATHS="$val" ;;
+    --prunepaths) PRUNEPATHS="$val" ;;
+    --prunefs) PRUNEFS="$val" ;;
+    --output) LOCATE_DB="$val" ;;
+    --netuser) NETUSER="$val" ;;
+    --localuser) LOCALUSER="$val" ;;
+    --old-format) old=yes ;;
+    --changecwd)  changeto="$val" ;;
+    --dbformat)   dbformat="$val" ;;
+    --version) fail=0; echo "$version" || fail=1; exit $fail ;;
+    --help)    fail=0; echo "$usage"   || fail=1; exit $fail ;;
+    *) echo "updatedb: invalid option $opt
+$usage" >&2
+       exit 1 ;;
+  esac
+done
+
+
+
+
+case "${dbformat:+yes}_${old}" in
+    yes_yes)
+	echo "The --dbformat and --old cannot both be specified." >&2
+	exit 1
+	;;
+	*)
+	;;
+esac
+
+if test "$old" = yes || test "$dbformat" = "old" ; then
+    echo "Warning: future versions of findutils will shortly discontinue support for the old locate database format." >&2
+    old=yes
+    sort="/usr/bin/sort"
+    print_option="-print"
+    frcode_options=""
+else
+    frcode_options=""
+    case "$dbformat" in
+	"")
+		# Default, use LOCATE02
+	    ;;
+	LOCATE02)
+	    ;;
+	slocate)
+	    frcode_options="$frcode_options -S 1"
+	    ;;
+	*)
+	    echo "Unsupported locate database format ${dbformat}: Supported formats are:" >&2
+	    echo "LOCATE02, slocate, old" >&2
+	    exit 1
+    esac
+
+
+    if true
+    then
+        sort="/usr/bin/sort -z"
+        print_option="-print0"
+        frcode_options="$frcode_options -0"
+    else
+        sort="/usr/bin/sort"
+        print_option="-print"
+    fi
+fi
+
+getuid() {
+    # format of "id" output is ...
+    # uid=1(daemon) gid=1(other)
+    # for `id's that don't understand -u
+    id | cut -d'(' -f 1 | cut -d'=' -f2
+}
+
+# figure out if su supports the -s option
+select_shell() {
+    if su "$1" -s $SHELL -c false < /dev/null  ; then
+	# No.
+	echo ""
+    else
+	if su "$1" -s $SHELL -c true < /dev/null  ; then
+	    # Yes.
+	    echo "-s $SHELL"
+        else
+	    # su is unconditionally failing.  We won't be able to
+	    # figure out what is wrong, so be conservative.
+	    echo ""
+	fi
+    fi
+}
+
+
+# You can set these in the environment, or use command-line options,
+# to override their defaults:
+
+# Any global options for find?
+: ${FINDOPTIONS=}
+
+# What shell shoud we use?  We should use a POSIX-ish sh.
+: ${SHELL="/bin/sh"}
+
+# Non-network directories to put in the database.
+: ${SEARCHPATHS="/"}
+
+# Network (NFS, AFS, RFS, etc.) directories to put in the database.
+: ${NETPATHS=}
+
+# Directories to not put in the database, which would otherwise be.
+: ${PRUNEPATHS="
+/afs
+/amd
+/proc
+/sfs
+/tmp
+/usr/tmp
+/var/tmp
+"}
+
+# Trailing slashes result in regex items that are never matched, which
+# is not what the user will expect.   Therefore we now reject such
+# constructs.
+for p in $PRUNEPATHS; do
+    case "$p" in
+	/*/)   echo "$0: $p: pruned paths should not contain trailing slashes" >&2
+	       exit 1
+    esac
+done
+
+# The same, in the form of a regex that find can use.
+test -z "$PRUNEREGEX" &&
+  PRUNEREGEX=`echo $PRUNEPATHS|sed -e 's,^,\\\(^,' -e 's, ,$\\\)\\\|\\\(^,g' -e 's,$,$\\\),'`
+
+# The database file to build.
+: ${LOCATE_DB=/var/locatedb}
+
+# Directory to hold intermediate files.
+if test -d /var/tmp; then
+  : ${TMPDIR=/var/tmp}
+elif test -d /usr/tmp; then
+  : ${TMPDIR=/usr/tmp}
+else
+  : ${TMPDIR=/tmp}
+fi
+export TMPDIR
+
+# The user to search network directories as.
+: ${NETUSER=daemon}
+
+# The directory containing the subprograms.
+if test -n "$LIBEXECDIR" ; then
+    : LIBEXECDIR already set, do nothing
+else
+    : ${LIBEXECDIR=/usr/libexec}
+fi
+
+# The directory containing find.
+if test -n "$BINDIR" ; then
+    : BINDIR already set, do nothing
+else
+    : ${BINDIR=/usr/bin}
+fi
+
+# The names of the utilities to run to build the database.
+: ${find:=${BINDIR}/find}
+: ${frcode:=${LIBEXECDIR}/frcode}
+: ${bigram:=${LIBEXECDIR}/bigram}
+: ${code:=${LIBEXECDIR}/code}
+
+make_tempdir () {
+    # This implementation is adapted from the GNU Autoconf manual.
+    {
+        tmp=`
+    (umask 077 && mktemp -d "$TMPDIR/updatedbXXXXXX") 2>/dev/null
+    ` &&
+        test -n "$tmp" && test -d "$tmp"
+    } || {
+	# This method is less secure than mktemp -d, but it's a fallback.
+	#
+	# We use $$ as well as $RANDOM since $RANDOM may not be available.
+	# We also add a time-dependent suffix.  This is actually somewhat
+	# predictable, but then so is $$.  POSIX does not require date to
+	# support +%N.
+	ts=`date +%N%S || date +%S 2>/dev/null`
+        tmp="$TMPDIR"/updatedb"$$"-"${RANDOM:-}${ts}"
+        (umask 077 && mkdir "$tmp")
+    }
+    echo "$tmp"
+}
+
+checkbinary () {
+    if test -x "$1" ; then
+	: ok
+    else
+      eval echo "updatedb needs to be able to execute $1, but cannot." >&2
+      exit 1
+    fi
+}
+
+for binary in $find $frcode $bigram $code
+do
+  checkbinary $binary
+done
+
+
+: ${PRUNEFS="
+9P
+NFS
+afs
+autofs
+cifs
+coda
+devfs
+devpts
+ftpfs
+iso9660
+mfs
+ncpfs
+nfs
+nfs4
+proc
+shfs
+smbfs
+sysfs
+"}
+
+if test -n "$PRUNEFS"; then
+prunefs_exp=`echo $PRUNEFS |sed -e 's/\([^ ][^ ]*\)/-o -fstype \1/g' \
+ -e 's/-o //' -e 's/$/ -o/'`
+else
+  prunefs_exp=''
+fi
+
+# Make and code the file list.
+# Sort case insensitively for users' convenience.
+
+rm -f $LOCATE_DB.n
+trap 'rm -f $LOCATE_DB.n; exit' HUP TERM
+
+if test $old = no; then
+# LOCATE02 or slocate format
+if {
+cd "$changeto"
+if test -n "$SEARCHPATHS"; then
+  if [ "$LOCALUSER" != "" ]; then
+    # : A1
+    su $LOCALUSER `select_shell $LOCALUSER` -c \
+    "$find $SEARCHPATHS $FINDOPTIONS \
+     \\( $prunefs_exp \
+     -type d -regex '$PRUNEREGEX' \\) -prune -o $print_option"
+  else
+    # : A2
+    $find $SEARCHPATHS $FINDOPTIONS \
+     \( $prunefs_exp \
+     -type d -regex "$PRUNEREGEX" \) -prune -o $print_option
+  fi
+fi
+
+if test -n "$NETPATHS"; then
+myuid=`getuid`
+if [ "$myuid" = 0 ]; then
+    # : A3
+    su $NETUSER `select_shell $NETUSER` -c \
+     "$find $NETPATHS $FINDOPTIONS \\( -type d -regex '$PRUNEREGEX' -prune \\) -o $print_option" ||
+    exit $?
+  else
+    # : A4
+    $find $NETPATHS $FINDOPTIONS \( -type d -regex "$PRUNEREGEX" -prune \) -o $print_option ||
+    exit $?
+  fi
+fi
+} | $sort -f | $frcode $frcode_options > $LOCATE_DB.n
+then
+    : OK so far
+    true
+else
+    rv=$?
+    echo "Failed to generate $LOCATE_DB.n" >&2
+    rm -f $LOCATE_DB.n
+    exit $rv
+fi
+
+# To avoid breaking locate while this script is running, put the
+# results in a temp file, then rename it atomically.
+if test -s $LOCATE_DB.n; then
+  chmod 644 ${LOCATE_DB}.n
+  mv ${LOCATE_DB}.n $LOCATE_DB
+else
+  echo "updatedb: new database would be empty" >&2
+  rm -f $LOCATE_DB.n
+fi
+
+else # old
+
+if temp_directory="`make_tempdir`"; then
+    bigrams="${temp_directory}"/bigrams
+    filelist="${temp_directory}"/filelist
+else
+    echo "failed to create temporary directory" >&2
+    exit 1
+fi
+
+rm -f $LOCATE_DB.n
+trap 'rm -f $LOCATE_DB.n; rm -rf "${temp_directory}"; exit' HUP TERM
+
+# Alphabetize subdirectories before file entries using tr.  James Woods says:
+# "to get everything in monotonic collating sequence, to avoid some
+# breakage i'll have to think about."
+{
+cd "$changeto"
+if test -n "$SEARCHPATHS"; then
+  if [ "$LOCALUSER" != "" ]; then
+    # : A5
+    su $LOCALUSER `select_shell $LOCALUSER` -c \
+    "$find $SEARCHPATHS $FINDOPTIONS \
+     \( $prunefs_exp \
+     -type d -regex '$PRUNEREGEX' \) -prune -o $print_option" || exit $?
+  else
+    # : A6
+    $find $SEARCHPATHS $FINDOPTIONS \
+     \( $prunefs_exp \
+     -type d -regex "$PRUNEREGEX" \) -prune -o $print_option || exit $?
+  fi
+fi
+
+if test -n "$NETPATHS"; then
+  myuid=`getuid`
+  if [ "$myuid" = 0 ]; then
+    # : A7
+    su $NETUSER `select_shell $NETUSER` -c \
+     "$find $NETPATHS $FINDOPTIONS \\( -type d -regex '$PRUNEREGEX' -prune \\) -o $print_option" ||
+    exit $?
+  else
+    # : A8
+    $find $NETPATHS $FINDOPTIONS \( -type d -regex "$PRUNEREGEX" -prune \) -o $print_option ||
+    exit $?
+  fi
+fi
+} | tr / '\001' | $sort -f | tr '\001' / > "$filelist"
+
+# Compute the (at most 128) most common bigrams in the file list.
+$bigram $bigram_opts < $filelist | sort | uniq -c | sort -nr |
+  awk '{ if (NR <= 128) print $2 }' | tr -d '\012' > "$bigrams"
+
+# Code the file list.
+$code "$bigrams" < "$filelist" > $LOCATE_DB.n
+
+rm -rf "${temp_directory}"
+
+# To reduce the chances of breaking locate while this script is running,
+# put the results in a temp file, then rename it atomically.
+if test -s $LOCATE_DB.n; then
+  chmod 644 ${LOCATE_DB}.n
+  mv ${LOCATE_DB}.n $LOCATE_DB
+else
+  echo "updatedb: new database would be empty" >&2
+  rm -f $LOCATE_DB.n
+fi
+
+fi
+
+exit 0
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/users.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/users.exe
new file mode 100644
index 00000000..aeebb146
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/users.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uuidgen.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uuidgen.exe
new file mode 100644
index 00000000..0b03b460
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/uuidgen.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vdir.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vdir.exe
new file mode 100644
index 00000000..f2473d0b
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vdir.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vi.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vi.exe
new file mode 100644
index 00000000..267c33f7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/vi.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/view b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/view
new file mode 100644
index 00000000..ce8c2394
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/view differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/wc.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/wc.exe
new file mode 100644
index 00000000..8ce39061
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/wc.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whereis.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whereis.exe
new file mode 100644
index 00000000..86230af3
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whereis.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/which.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/which.exe
new file mode 100644
index 00000000..3a3b4433
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/which.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/who.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/who.exe
new file mode 100644
index 00000000..008c9cbd
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/who.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whoami.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whoami.exe
new file mode 100644
index 00000000..dd051c87
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/whoami.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windmc.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windmc.exe
new file mode 100644
index 00000000..f2a2d7ea
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windmc.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windres.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windres.exe
new file mode 100644
index 00000000..611162a1
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/windres.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xargs.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xargs.exe
new file mode 100644
index 00000000..b764ab47
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xargs.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xsubpp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xsubpp
new file mode 100644
index 00000000..ec3491c3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xsubpp
@@ -0,0 +1,187 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!perl
+use 5.006;
+use strict;
+eval {
+  require ExtUtils::ParseXS;
+  1;
+}
+or do {
+  my $err = $@ || 'Zombie error';
+  my $v = $ExtUtils::ParseXS::VERSION;
+  $v = '<undef>' if not defined $v;
+  die "Failed to load or import from ExtUtils::ParseXS (version $v). Please check that ExtUtils::ParseXS is installed correctly and that the newest version will be found in your \@INC path: $err";
+};
+
+use Getopt::Long;
+
+my %args = ();
+
+my $usage = "Usage: xsubpp [-v] [-csuffix csuffix] [-except] [-prototypes] [-noversioncheck] [-nolinenumbers] [-nooptimize] [-noinout] [-noargtypes] [-strip|s pattern] [-typemap typemap]... file.xs\n";
+
+Getopt::Long::Configure qw(no_auto_abbrev no_ignore_case);
+
+@ARGV = grep {$_ ne '-C++'} @ARGV;  # Allow -C++ for backward compatibility
+GetOptions(\%args, qw(hiertype!
+		      prototypes!
+		      versioncheck!
+		      linenumbers!
+		      optimize!
+		      inout!
+		      argtypes!
+		      object_capi!
+		      except!
+		      v
+		      typemap=s@
+		      output=s
+		      s|strip=s
+		      csuffix=s
+		     ))
+  or die $usage;
+
+if ($args{v}) {
+  print "xsubpp version $ExtUtils::ParseXS::VERSION\n";
+  exit;
+}
+
+@ARGV == 1 or die $usage;
+
+$args{filename} = shift @ARGV;
+
+my $pxs = ExtUtils::ParseXS->new;
+$pxs->process_file(%args);
+exit( $pxs->report_error_count() ? 1 : 0 );
+
+__END__
+
+=head1 NAME
+
+xsubpp - compiler to convert Perl XS code into C code
+
+=head1 SYNOPSIS
+
+B<xsubpp> [B<-v>] [B<-except>] [B<-s pattern>] [B<-prototypes>] [B<-noversioncheck>] [B<-nolinenumbers>] [B<-nooptimize>] [B<-typemap typemap>] [B<-output filename>]... file.xs
+
+=head1 DESCRIPTION
+
+This compiler is typically run by the makefiles created by L<ExtUtils::MakeMaker>
+or by L<Module::Build> or other Perl module build tools.
+
+I<xsubpp> will compile XS code into C code by embedding the constructs
+necessary to let C functions manipulate Perl values and creates the glue
+necessary to let Perl access those functions.  The compiler uses typemaps to
+determine how to map C function parameters and variables to Perl values.
+
+The compiler will search for typemap files called I<typemap>.  It will use
+the following search path to find default typemaps, with the rightmost
+typemap taking precedence.
+
+	../../../typemap:../../typemap:../typemap:typemap
+
+It will also use a default typemap installed as C<ExtUtils::typemap>.
+
+=head1 OPTIONS
+
+Note that the C<XSOPT> MakeMaker option may be used to add these options to
+any makefiles generated by MakeMaker.
+
+=over 5
+
+=item B<-hiertype>
+
+Retains '::' in type names so that C++ hierarchical types can be mapped.
+
+=item B<-except>
+
+Adds exception handling stubs to the C code.
+
+=item B<-typemap typemap>
+
+Indicates that a user-supplied typemap should take precedence over the
+default typemaps.  This option may be used multiple times, with the last
+typemap having the highest precedence.
+
+=item B<-output filename>
+
+Specifies the name of the output file to generate.  If no file is
+specified, output will be written to standard output.
+
+=item B<-v>
+
+Prints the I<xsubpp> version number to standard output, then exits.
+
+=item B<-prototypes>
+
+By default I<xsubpp> will not automatically generate prototype code for
+all xsubs. This flag will enable prototypes.
+
+=item B<-noversioncheck>
+
+Disables the run time test that determines if the object file (derived
+from the C<.xs> file) and the C<.pm> files have the same version
+number.
+
+=item B<-nolinenumbers>
+
+Prevents the inclusion of '#line' directives in the output.
+
+=item B<-nooptimize>
+
+Disables certain optimizations.  The only optimization that is currently
+affected is the use of I<target>s by the output C code (see L<perlguts>).
+This may significantly slow down the generated code, but this is the way
+B<xsubpp> of 5.005 and earlier operated.
+
+=item B<-noinout>
+
+Disable recognition of C<IN>, C<OUT_LIST> and C<INOUT_LIST> declarations.
+
+=item B<-noargtypes>
+
+Disable recognition of ANSI-like descriptions of function signature.
+
+=item B<-C++>
+
+Currently doesn't do anything at all.  This flag has been a no-op for
+many versions of perl, at least as far back as perl5.003_07.  It's
+allowed here for backwards compatibility.
+
+=item B<-s=...> or B<-strip=...>
+
+I<This option is obscure and discouraged.>
+
+If specified, the given string will be stripped off from the beginning
+of the C function name in the generated XS functions (if it starts with that prefix).
+This only applies to XSUBs without C<CODE> or C<PPCODE> blocks.
+For example, the XS:
+
+  void foo_bar(int i);
+
+when C<xsubpp> is invoked with C<-s foo_> will install a C<foo_bar>
+function in Perl, but really call C<bar(i)> in C. Most of the time,
+this is the opposite of what you want and failure modes are somewhat
+obscure, so please avoid this option where possible.
+
+=back
+
+=head1 ENVIRONMENT
+
+No environment variables are used.
+
+=head1 AUTHOR
+
+Originally by Larry Wall.  Turned into the C<ExtUtils::ParseXS> module
+by Ken Williams.
+
+=head1 MODIFICATION HISTORY
+
+See the file F<Changes>.
+
+=head1 SEE ALSO
+
+perl(1), perlxs(1), perlxstut(1), ExtUtils::ParseXS
+
+=cut
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xz.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xz.exe
new file mode 100644
index 00000000..2ebe66ab
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xz.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcat b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcat
new file mode 100644
index 00000000..4dc090ec
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcat differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcmp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcmp
new file mode 100644
index 00000000..9bec1419
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzcmp differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdec.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdec.exe
new file mode 100644
index 00000000..a16c3907
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdec.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdiff b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdiff
new file mode 100644
index 00000000..7c13a84a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzdiff
@@ -0,0 +1,200 @@
+#!/bin/sh
+
+# Copyright (C) 1998, 2002, 2006, 2007 Free Software Foundation
+# Copyright (C) 1993 Jean-loup Gailly
+
+# Modified for XZ Utils by Andrew Dudman and Lasse Collin.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+#SET_PATH - This line is a placeholder to ease patching this script.
+
+# Instead of unsetting XZ_OPT, just make sure that xz will use file format
+# autodetection. This way memory usage limit and thread limit can be
+# specified via XZ_OPT. With gzip, bzip2, and lzop it's OK to just unset the
+# environment variables.
+xz='xz --format=auto'
+unset GZIP BZIP BZIP2 LZOP
+
+case ${0##*/} in
+  *cmp*) prog=xzcmp; cmp=${CMP:-cmp};;
+  *)     prog=xzdiff; cmp=${DIFF:-diff};;
+esac
+
+version="$prog (XZ Utils) 5.2.2"
+
+usage="Usage: ${0##*/} [OPTION]... FILE1 [FILE2]
+Compare FILE1 to FILE2, using their uncompressed contents if they are
+compressed.  If FILE2 is omitted, then the files compared are FILE1 and
+FILE1 from which the compression format suffix has been stripped.
+
+Do comparisons like '$cmp' does.  OPTIONs are the same as for '$cmp'.
+
+Report bugs to <lasse.collin@tukaani.org>."
+
+# sed script to escape all ' for the shell, and then (to handle trailing
+# newlines correctly) turn trailing X on last line into '.
+escape='
+  s/'\''/'\''\\'\'''\''/g
+  $s/X$/'\''/
+'
+
+while :; do
+  case $1 in
+    --h*) printf '%s\n' "$usage" || exit 2; exit;;
+    --v*) echo "$version" || exit 2; exit;;
+    --) shift; break;;
+    -*\'*) cmp="$cmp '"`printf '%sX\n' "$1" | sed "$escape"`;;
+    -?*) cmp="$cmp '$1'";;
+    *) break;;
+  esac
+  shift
+done
+cmp="$cmp --"
+
+for file; do
+  test "X$file" = X- || <"$file" || exit 2
+done
+
+xz1=$xz
+xz2=$xz
+xz_status=0
+exec 3>&1
+
+if test $# -eq 1; then
+  case $1 in
+    *[-.]xz | *[-.]lzma | *.t[lx]z)
+      ;;
+    *[-.]bz2 | *.tbz | *.tbz2)
+      xz1=bzip2;;
+    *[-.][zZ] | *_z | *[-.]gz | *.t[ag]z)
+      xz1=gzip;;
+    *[-.]lzo | *.tzo)
+      xz1=lzop;;
+    *)
+      echo >&2 "$0: $1: Unknown compressed file name suffix"
+      exit 2;;
+  esac
+  case $1 in
+    *[-.][zZ] | *_z | *[-.][gx]z | *[-.]bz2 | *[-.]lzma | *[-.]lzo)
+      FILE=`expr "X$1" : 'X\(.*\)[-.][abglmoxzZ2]*$'`;;
+    *.t[abglx]z)
+      FILE=`expr "X$1" : 'X\(.*[-.]t\)[abglx]z$'`ar;;
+    *.tbz2)
+      FILE=`expr "X$1" : 'X\(.*[-.]t\)bz2$'`ar;;
+    *.tzo)
+      FILE=`expr "X$1" : 'X\(.*[-.]t\)zo$'`ar;;
+  esac
+  xz_status=$(
+    exec 4>&1
+    ($xz1 -cd -- "$1" 4>&-; echo $? >&4) 3>&- | eval "$cmp" - '"$FILE"' >&3
+  )
+elif test $# -eq 2; then
+  case $1 in
+    *[-.]bz2 | *.tbz | *.tbz2) xz1=bzip2;;
+    *[-.][zZ] | *_z | *[-.]gz | *.t[ag]z) xz1=gzip;;
+    *[-.]lzo | *.tzo) xz1=lzop;;
+  esac
+  case $2 in
+    *[-.]bz2 | *.tbz | *.tbz2) xz2=bzip2;;
+    *[-.][zZ] | *_z | *[-.]gz | *.t[ag]z) xz2=gzip;;
+    *[-.]lzo | *.tzo) xz2=lzop;;
+  esac
+  case $1 in
+    *[-.][zZ] | *_z | *[-.][gx]z | *[-.]bz2 | *[-.]lzma | *.t[abglx]z | *.tbz2 | *[-.]lzo | *.tzo | -)
+      case "$2" in
+        *[-.][zZ] | *_z | *[-.][gx]z | *[-.]bz2 | *[-.]lzma | *.t[abglx]z | *.tbz2 | *[-.]lzo | *.tzo | -)
+          if test "$1$2" = --; then
+            xz_status=$(
+              exec 4>&1
+              ($xz1 -cdfq - 4>&-; echo $? >&4) 3>&- |
+                eval "$cmp" - - >&3
+            )
+          elif # Reject Solaris 8's buggy /bin/bash 2.03.
+              echo X | (echo X | eval "$cmp" /dev/fd/5 - >/dev/null 2>&1) 5<&0; then
+            xz_status=$(
+              exec 4>&1
+              ($xz1 -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+                ( ($xz2 -cdfq -- "$2" 4>&-; echo $? >&4) 3>&- 5<&- </dev/null |
+                eval "$cmp" /dev/fd/5 - >&3) 5<&0
+            )
+            cmp_status=$?
+            case $xz_status in
+              *[1-9]*) xz_status=1;;
+              *) xz_status=0;;
+            esac
+            (exit $cmp_status)
+          else
+            F=`expr "/$2" : '.*/\(.*\)[-.][ablmotxz2]*$'` || F=$prog
+            tmp=
+            trap '
+              test -n "$tmp" && rm -rf "$tmp"
+              (exit 2); exit 2
+            ' HUP INT PIPE TERM 0
+            if type mktemp >/dev/null 2>&1; then
+              # Note that FreeBSD's mktemp isn't fully compatible with
+              # the implementations from mktemp.org and GNU coreutils.
+              # It is important that the -t argument is the last argument
+              # and that no "--" is used between -t and the template argument.
+              # This way this command works on all implementations.
+              tmp=`mktemp -d -t "$prog.XXXXXXXXXX"` || exit 2
+            else
+              # Fallback code if mktemp is missing. This isn't as
+              # robust as using mktemp since this doesn't try with
+              # different file names in case of a file name conflict.
+              #
+              # There's no need to save the original umask since
+              # we don't create any non-temp files. Note that using
+              # mkdir -m 0077 isn't secure since some mkdir implementations
+              # create the dir with the default umask and chmod the
+              # the dir afterwards.
+              umask 0077
+              mkdir -- "${TMPDIR-/tmp}/$prog.$$" || exit 2
+              tmp="${TMPDIR-/tmp}/$prog.$$"
+            fi
+            $xz2 -cdfq -- "$2" > "$tmp/$F" || exit 2
+            xz_status=$(
+              exec 4>&1
+              ($xz1 -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+                eval "$cmp" - '"$tmp/$F"' >&3
+            )
+            cmp_status=$?
+            rm -rf "$tmp" || xz_status=$?
+            trap - HUP INT PIPE TERM 0
+            (exit $cmp_status)
+          fi;;
+      *)
+        xz_status=$(
+          exec 4>&1
+          ($xz1 -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+            eval "$cmp" - '"$2"' >&3
+        );;
+    esac;;
+  *)
+    case "$2" in
+      *[-.][zZ] | *_z | *[-.][gx]z | *[-.]bz2 | *[-.]lzma | *.t[abglx]z | *.tbz2 | *[-.]lzo | *.tzo | -)
+        xz_status=$(
+          exec 4>&1
+          ($xz2 -cdfq -- "$2" 4>&-; echo $? >&4) 3>&- |
+            eval "$cmp" '"$1"' - >&3
+         );;
+      *)
+        eval "$cmp" '"$1"' '"$2"';;
+    esac;;
+  esac
+else
+  echo >&2 "$0: Invalid number of operands; try \`${0##*/} --help' for help"
+  exit 2
+fi
+
+cmp_status=$?
+test "$xz_status" -eq 0 || exit 2
+exit $cmp_status
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzegrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzegrep
new file mode 100644
index 00000000..a7199e42
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzegrep differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzfgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzfgrep
new file mode 100644
index 00000000..a7199e42
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzfgrep differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzgrep
new file mode 100644
index 00000000..262b13e4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzgrep
@@ -0,0 +1,215 @@
+#!/bin/sh
+
+# xzgrep -- a wrapper around a grep program that decompresses files as needed
+# Adapted from a version sent by Charles Levert <charles@comm.polymtl.ca>
+
+# Copyright (C) 1998, 2001, 2002, 2006, 2007 Free Software Foundation
+# Copyright (C) 1993 Jean-loup Gailly
+
+# Modified for XZ Utils by Andrew Dudman and Lasse Collin.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+#SET_PATH - This line is a placeholder to ease patching this script.
+
+# Instead of unsetting XZ_OPT, just make sure that xz will use file format
+# autodetection. This way memory usage limit and thread limit can be
+# specified via XZ_OPT. With gzip, bzip2, and lzop it's OK to just unset the
+# environment variables.
+xz='xz --format=auto'
+unset GZIP BZIP BZIP2 LZOP
+
+case ${0##*/} in
+  *egrep*) prog=xzegrep; grep=${GREP:-egrep};;
+  *fgrep*) prog=xzfgrep; grep=${GREP:-fgrep};;
+  *)       prog=xzgrep; grep=${GREP:-grep};;
+esac
+
+version="$prog (XZ Utils) 5.2.2"
+
+usage="Usage: ${0##*/} [OPTION]... [-e] PATTERN [FILE]...
+Look for instances of PATTERN in the input FILEs, using their
+uncompressed contents if they are compressed.
+
+OPTIONs are the same as for '$grep'.
+
+Report bugs to <lasse.collin@tukaani.org>."
+
+# sed script to escape all ' for the shell, and then (to handle trailing
+# newlines correctly) turn trailing X on last line into '.
+escape='
+  s/'\''/'\''\\'\'''\''/g
+  $s/X$/'\''/
+'
+operands=
+have_pat=0
+files_with_matches=0
+files_without_matches=0
+no_filename=0
+with_filename=0
+
+while test $# -ne 0; do
+  option=$1
+  shift
+  optarg=
+
+  case $option in
+  (-[0123456789abcdhHiIKLlnoqrRsTuUvVwxyzZ]?*)
+    arg2=-\'$(expr "X${option}X" : 'X-.[0-9]*\(.*\)' | sed "$escape")
+    eval "set -- $arg2 "'${1+"$@"}'
+    option=$(expr "X$option" : 'X\(-.[0-9]*\)');;
+  (--binary-*=* | --[lm]a*=* | --reg*=*)
+    ;;
+  (-[ABCDefm] | --binary-* | --file | --[lm]a* | --reg*)
+    case ${1?"$option option requires an argument"} in
+    (*\'*)
+      optarg=" '"$(printf '%sX\n' "$1" | sed "$escape");;
+    (*)
+      optarg=" '$1'";;
+    esac
+    shift;;
+  (--)
+    break;;
+  (-?*)
+    ;;
+  (*)
+    case $option in
+    (*\'*)
+      operands="$operands '"$(printf '%sX\n' "$option" | sed "$escape");;
+    (*)
+      operands="$operands '$option'";;
+    esac
+    ${POSIXLY_CORRECT+break}
+    continue;;
+  esac
+
+  case $option in
+  (-[drRzZ] | --di* | --exc* | --inc* | --rec* | --nu*)
+    printf >&2 '%s: %s: Option not supported\n' "$0" "$option"
+    exit 2;;
+  (-[ef]* | --file | --file=* | --reg*)
+    have_pat=1;;
+  (--h | --he | --hel | --help)
+    echo "$usage" || exit 2
+    exit;;
+  (-H | --wi | --wit | --with | --with- | --with-f | --with-fi \
+  | --with-fil | --with-file | --with-filen | --with-filena | --with-filenam \
+  | --with-filename)
+    with_filename=1
+    continue;;
+  (-l | --files-with-*)
+    files_with_matches=1
+    continue;;
+  (-L | --files-witho*)
+    files_without_matches=1
+    continue;;
+  (-h | --no-f*)
+    no_filename=1;;
+  (-V | --v | --ve | --ver | --vers | --versi | --versio | --version)
+    echo "$version" || exit 2
+    exit;;
+  esac
+
+  case $option in
+  (*\'?*)
+    option=\'$(expr "X${option}X" : 'X\(.*\)' | sed "$escape");;
+  (*)
+    option="'$option'";;
+  esac
+
+  grep="$grep $option$optarg"
+done
+
+if test $files_with_matches -eq 1 || test $files_without_matches -eq 1; then
+  grep="$grep -q"
+fi
+
+eval "set -- $operands "'${1+"$@"}'
+
+if test $have_pat -eq 0; then
+  case ${1?"Missing pattern; try \`${0##*/} --help' for help"} in
+  (*\'*)
+    grep="$grep -- '"$(printf '%sX\n' "$1" | sed "$escape");;
+  (*)
+    grep="$grep -- '$1'";;
+  esac
+  shift
+fi
+
+if test $# -eq 0; then
+  set -- -
+fi
+
+exec 3>&1
+
+# res=1 means that no file matched yet
+res=1
+
+for i; do
+  case $i in
+    *[-.][zZ] | *_z | *[-.]gz | *.t[ag]z) uncompress="gzip -cdfq";;
+    *[-.]bz2 | *[-.]tbz | *.tbz2) uncompress="bzip2 -cdfq";;
+    *[-.]lzo | *[-.]tzo) uncompress="lzop -cdfq";;
+    *) uncompress="$xz -cdfq";;
+  esac
+  # Fail if xz or grep (or sed) fails.
+  xz_status=$(
+    exec 5>&1
+    ($uncompress -- "$i" 5>&-; echo $? >&5) 3>&- |
+    if test $files_with_matches -eq 1; then
+      eval "$grep" && { printf '%s\n' "$i" || exit 2; }
+    elif test $files_without_matches -eq 1; then
+      eval "$grep" || {
+        r=$?
+        if test $r -eq 1; then
+          printf '%s\n' "$i" || r=2
+        fi
+        exit $r
+      }
+    elif test $with_filename -eq 0 &&
+         { test $# -eq 1 || test $no_filename -eq 1; }; then
+      eval "$grep"
+    else
+      case $i in
+      (*'
+'* | *'&'* | *'\'* | *'|'*)
+        i=$(printf '%s\n' "$i" |
+            sed '
+              $!N
+              $s/[&\|]/\\&/g
+              $s/\n/\\n/g
+            ');;
+      esac
+      sed_script="s|^|$i:|"
+
+      # Fail if grep or sed fails.
+      r=$(
+        exec 4>&1
+        (eval "$grep" 4>&-; echo $? >&4) 3>&- | sed "$sed_script" >&3 4>&-
+      ) || r=2
+      exit $r
+    fi >&3 5>&-
+  )
+  r=$?
+
+  # fail occured previously, nothing worse can happen
+  test $res -gt 1 && continue
+
+  test "$xz_status" -eq 0 || test "$xz_status" -eq 2 \
+      || test "$(kill -l "$xz_status" 2> /dev/null)" = "PIPE" || r=2
+
+  # still no match
+  test $r -eq 1 && continue
+
+  # 0 == match, >=2 == fail
+  res=$r
+done
+exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzless b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzless
new file mode 100644
index 00000000..cbd8d63a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzless
@@ -0,0 +1,58 @@
+#!/bin/sh
+
+# Copyright (C) 1998, 2002, 2006, 2007 Free Software Foundation
+
+# The original version for gzip was written by Paul Eggert.
+# Modified for XZ Utils by Andrew Dudman and Lasse Collin.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+#SET_PATH - This line is a placeholder to ease patching this script.
+
+# Instead of unsetting XZ_OPT, just make sure that xz will use file format
+# autodetection. This way memory usage limit and thread limit can be
+# specified via XZ_OPT.
+xz='xz --format=auto'
+
+version='xzless (XZ Utils) 5.2.2'
+
+usage="Usage: ${0##*/} [OPTION]... [FILE]...
+Like 'less', but operate on the uncompressed contents of xz compressed FILEs.
+
+Options are the same as for 'less'.
+
+Report bugs to <lasse.collin@tukaani.org>."
+
+case $1 in
+	--help)    echo "$usage" || exit 2; exit;;
+	--version) echo "$version" || exit 2; exit;;
+esac
+
+if test "${LESSMETACHARS+set}" != set; then
+	# Work around a bug in less 394 and earlier;
+	# it mishandles the metacharacters '$%=~'.
+	space=' '
+	tab='	'
+	nl='
+'
+	LESSMETACHARS="$space$tab$nl'"';*?"()<>[|&^`#\$%=~'
+fi
+
+if test "$(less -V | { read less ver re && echo ${ver}; })" -ge 429; then
+	# less 429 or later: LESSOPEN pipe will be used on
+	# standard input if $LESSOPEN begins with |-.
+	LESSOPEN="|-$xz -cdfq -- %s"
+else
+	LESSOPEN="|$xz -cdfq -- %s"
+fi
+export LESSMETACHARS LESSOPEN
+
+exec less "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzmore b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzmore
new file mode 100644
index 00000000..8e063101
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/xzmore
@@ -0,0 +1,78 @@
+#!/bin/sh
+
+# Copyright (C) 2001, 2002, 2007 Free Software Foundation
+# Copyright (C) 1992, 1993 Jean-loup Gailly
+
+# Modified for XZ Utils by Andrew Dudman and Lasse Collin.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 2 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+#SET_PATH - This line is a placeholder to ease patching this script.
+
+# Instead of unsetting XZ_OPT, just make sure that xz will use file format
+# autodetection. This way memory usage limit and thread limit can be
+# specified via XZ_OPT.
+xz='xz --format=auto'
+
+version='xzmore (XZ Utils) 5.2.2'
+
+usage="Usage: ${0##*/} [OPTION]... [FILE]...
+Like 'more', but operate on the uncompressed contents of xz compressed FILEs.
+
+Report bugs to <lasse.collin@tukaani.org>."
+
+case $1 in
+	--help)    echo "$usage" || exit 2; exit;;
+	--version) echo "$version" || exit 2; exit;;
+esac
+
+oldtty=`stty -g 2>/dev/null`
+if stty -cbreak 2>/dev/null; then
+	cb='cbreak'; ncb='-cbreak'
+else
+	# 'stty min 1' resets eof to ^a on both SunOS and SysV!
+	cb='min 1 -icanon'; ncb='icanon eof ^d'
+fi
+if test $? -eq 0 && test -n "$oldtty"; then
+	trap 'stty $oldtty 2>/dev/null; exit' 0 2 3 5 10 13 15
+else
+	trap 'stty $ncb echo 2>/dev/null; exit' 0 2 3 5 10 13 15
+fi
+
+if test $# = 0; then
+	if test -t 0; then
+		echo "$usage"; exit 1
+	else
+		$xz -cdfq | eval "${PAGER:-more}"
+	fi
+else
+	FIRST=1
+	for FILE; do
+		< "$FILE" || continue
+		if test $FIRST -eq 0; then
+			printf "%s--More--(Next file: %s)" "" "$FILE"
+			stty $cb -echo 2>/dev/null
+			ANS=`dd bs=1 count=1 2>/dev/null`
+			stty $ncb echo 2>/dev/null
+			echo " "
+			case "$ANS" in
+				[eq]) exit;;
+			esac
+		fi
+		if test "$ANS" != 's'; then
+			echo "------> $FILE <------"
+			$xz -cdfq -- "$FILE" | eval "${PAGER:-more}"
+		fi
+		if test -t 1; then
+			FIRST=0
+		fi
+	done
+fi
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/yes.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/yes.exe
new file mode 100644
index 00000000..11c33475
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/yes.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcat b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcat
new file mode 100644
index 00000000..dc23992b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcat
@@ -0,0 +1,51 @@
+#!/bin/sh
+# Uncompress files to standard output.
+
+# Copyright (C) 2007, 2010-2016 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="zcat (gzip) 1.7
+Copyright (C) 2007, 2011-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Paul Eggert."
+
+usage="Usage: $0 [OPTION]... [FILE]...
+Uncompress FILEs to standard output.
+
+  -f, --force       force; read compressed data even from a terminal
+  -l, --list        list compressed file contents
+  -q, --quiet       suppress all warnings
+  -r, --recursive   operate recursively on directories
+  -S, --suffix=SUF  use suffix SUF on compressed files
+      --synchronous synchronous output (safer if system crashes, but slower)
+  -t, --test        test compressed file integrity
+  -v, --verbose     verbose mode
+      --help        display this help and exit
+      --version     display version information and exit
+
+With no FILE, or when FILE is -, read standard input.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+case $1 in
+--help)    exec echo "$usage";;
+--version) exec echo "$version";;
+esac
+
+exec gzip -cd "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcmp b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcmp
new file mode 100644
index 00000000..b343e1b4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zcmp
@@ -0,0 +1,45 @@
+#!/bin/sh
+# Compare the uncompressed contents of compressed files, byte by byte.
+
+# Copyright (C) 2007, 2010-2016 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="zcmp (gzip) 1.7
+Copyright (C) 2010 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Paul Eggert."
+
+usage="Usage: $0 [OPTION]... FILE1 [FILE2]
+Compare FILE1 to FILE2 byte by byte, using their uncompressed contents
+if they are compressed.  If FILE2 is omitted, compare FILE1 to the
+uncompressed contents of FILE1.gz.  Do comparisons like 'cmp' does.
+
+Options are the same as for 'cmp'.
+
+If a FILE is '-' or missing, read standard input.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+st=0
+case $1 in
+--help)    echo "$usage" || st=2; exit $st;;
+--version) echo "$version" || st=2; exit $st;;
+esac
+
+exec zdiff --__cmp "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zdiff b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zdiff
new file mode 100644
index 00000000..2c4e569c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zdiff
@@ -0,0 +1,161 @@
+#!/bin/sh
+# sh is buggy on RS/6000 AIX 3.2. Replace above line with #!/bin/ksh
+
+# Copyright (C) 1998, 2002, 2006-2007, 2009-2016 Free Software Foundation, Inc.
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+case $1 in
+  --__cmp) shift
+        prog=cmp;  cmp='${CMP-cmp}'  ;;
+  *)    prog=diff; cmp='${DIFF-diff}';;
+esac
+
+version="z$prog (gzip) 1.7
+Copyright (C) 2009, 2011-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly."
+
+usage="Usage: $0 [OPTION]... FILE1 [FILE2]
+Compare FILE1 to FILE2, using their uncompressed contents if they are
+compressed.  If FILE2 is omitted, compare FILE1 to the uncompressed
+contents of FILE1.gz.  Do comparisons like '$prog' does.
+
+OPTIONs are the same as for '$prog'.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+# sed script to escape all ' for the shell, and then (to handle trailing
+# newlines correctly) turn trailing X on last line into '.
+escape='
+  s/'\''/'\''\\'\'''\''/g
+  $s/X$/'\''/
+'
+
+while :; do
+  case $1 in
+  --h*) printf '%s\n' "$usage" || exit 2; exit;;
+  --v*) echo "$version" || exit 2; exit;;
+  --) shift; break;;
+  -*\'*) cmp="$cmp '"`printf '%sX\n' "$1" | sed "$escape"`;;
+  -?*) cmp="$cmp '$1'";;
+  *) break;;
+  esac
+  shift
+done
+cmp="$cmp --"
+
+for file
+do
+  test "X$file" = X- || <"$file" || exit 2
+done
+
+gzip_status=0
+exec 3>&1
+
+if test $# -eq 1; then
+  case $1 in
+  *[-.]gz* | *[-.][zZ] | *.t[ga]z)
+    FILE=`expr "X$1" : 'X\(.*\)[-.][zZtga]*$'`
+    gzip_status=$(
+      exec 4>&1
+      (gzip -cd -- "$1" 4>&-; echo $? >&4) 3>&- | eval "$cmp" - '"$FILE"' >&3
+    );;
+  *)
+    echo >&2 "$0: $1: unknown compressed file extension"
+    exit 2;;
+  esac
+elif test $# -eq 2; then
+        case "$1" in
+        *[-.]gz* | *[-.][zZ] | *.t[ga]z | -)
+                case "$2" in
+                *[-.]gz* | *[-.][zZ] | *.t[ga]z | -)
+                    if test "$1$2" = --; then
+                        gzip_status=$(
+                          exec 4>&1
+                          (gzip -cdfq - 4>&-; echo $? >&4) 3>&- |
+                            eval "$cmp" - - >&3
+                        )
+                    elif
+                        # Reject Solaris 8's buggy /bin/bash 2.03.
+                        echo X |
+                         (echo X | eval "$cmp" /dev/fd/5 - >/dev/null 2>&1) \
+                                5<&0
+                    then
+                        gzip_status=$(
+                          exec 4>&1
+                          (gzip -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+                            ( (gzip -cdfq -- "$2" 4>&-; echo $? >&4) 3>&- 5<&- </dev/null |
+                               eval "$cmp" /dev/fd/5 - >&3) 5<&0
+                        )
+                        cmp_status=$?
+                        case $gzip_status in
+                          *[1-9]*) gzip_status=1;;
+                          *) gzip_status=0;;
+                        esac
+                        (exit $cmp_status)
+                    else
+                        tmp=
+                        trap '
+                          test -n "$tmp" && rm -f "$tmp"
+                          (exit 2); exit 2
+                        ' HUP INT PIPE TERM 0
+                        if type mktemp >/dev/null 2>&1; then
+                          tmp=`mktemp` || exit 2
+                        else
+                          F=`expr "/$2" : '.*/\(.*\)[-.][zZtga]*$'` || F=$prog
+                          set -C
+                          tmp=${TMPDIR-/tmp}/$F.$$
+                        fi
+                        gzip -cdfq -- "$2" > "$tmp" || exit 2
+                        gzip_status=$(
+                          exec 4>&1
+                          (gzip -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+                            eval "$cmp" - '"$tmp"' >&3
+                        )
+                        cmp_status=$?
+                        rm -f "$tmp" || gzip_status=$?
+                        trap - HUP INT PIPE TERM 0
+                        (exit $cmp_status)
+                    fi;;
+                *)
+                    gzip_status=$(
+                      exec 4>&1
+                      (gzip -cdfq -- "$1" 4>&-; echo $? >&4) 3>&- |
+                        eval "$cmp" - '"$2"' >&3
+                    );;
+                esac;;
+        *)      case "$2" in
+                *[-.]gz* | *[-.][zZ] | *.t[ga]z | -)
+                        gzip_status=$(
+                          exec 4>&1
+                          (gzip -cdfq -- "$2" 4>&-; echo $? >&4) 3>&- |
+                            eval "$cmp" '"$1"' - >&3
+                        );;
+                *)	eval "$cmp" '"$1"' '"$2"';;
+                esac;;
+        esac
+else
+        echo >&2 "$0: invalid number of operands; try \`$0 --help' for help"
+        exit 2
+fi
+
+cmp_status=$?
+test "$gzip_status" -eq 0 || exit 2
+exit $cmp_status
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zegrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zegrep
new file mode 100644
index 00000000..e5969b7a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zegrep
@@ -0,0 +1,2 @@
+#!/bin/sh
+exec zgrep -E "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zfgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zfgrep
new file mode 100644
index 00000000..fd7be2bf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zfgrep
@@ -0,0 +1,2 @@
+#!/bin/sh
+exec zgrep -F "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zforce b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zforce
new file mode 100644
index 00000000..3bdf6c91
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zforce
@@ -0,0 +1,69 @@
+#!/bin/sh
+# zforce: force a gz extension on all gzip files so that gzip will not
+# compress them twice.
+#
+# This can be useful for files with names truncated after a file transfer.
+# 12345678901234 is renamed to 12345678901.gz
+
+
+# Copyright (C) 2002, 2007, 2010-2016 Free Software Foundation, Inc.
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="zforce (gzip) 1.7
+Copyright (C) 2010-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly."
+
+usage="Usage: $0 [FILE]...
+Force a .gz extension on all compressed FILEs so that gzip will
+not compress them twice.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+if test $# = 0; then
+  echo >&2 "$0: invalid number of operands; try \`$0 --help' for help"
+  exit 1
+fi
+
+res=0
+for i do
+  case "$i" in
+  --h*) exec echo "$usage";;
+  --v*) exec echo "$version";;
+  *[-.]z | *[-.]gz | *.t[ag]z) continue;;
+  esac
+
+  if test ! -f "$i" ; then
+    echo zforce: $i not a file
+    res=1
+    continue
+  fi
+
+  if gzip -lv < "$i" 2>/dev/null | grep '^defl' > /dev/null; then
+
+    new="$i.gz"
+    if mv "$i" "$new"; then
+      echo $i -- replaced with $new
+    else
+      res=$?
+    fi
+  fi
+done
+exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zgrep b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zgrep
new file mode 100644
index 00000000..13ef21b0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zgrep
@@ -0,0 +1,267 @@
+#!/bin/sh
+
+# zgrep -- a wrapper around a grep program that decompresses files as needed
+# Adapted from a version sent by Charles Levert <charles@comm.polymtl.ca>
+
+# Copyright (C) 1998, 2001-2002, 2006-2007, 2009-2016 Free Software Foundation,
+# Inc.
+
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+grep='${GREP-'\''/usr/bin/grep'\''}'
+
+version='zgrep (gzip) 1.7
+Copyright (C) 2010-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly.'
+
+usage="Usage: $0 [OPTION]... [-e] PATTERN [FILE]...
+Look for instances of PATTERN in the input FILEs, using their
+uncompressed contents if they are compressed.
+
+OPTIONs are the same as for 'grep', except that the following 'grep'
+options are not supported: --dereference-recursive (-R), --directories (-d),
+--exclude, --exclude-from, --exclude-dir, --include, --null (-Z),
+--null-data (-z), and --recursive (-r).
+
+Report bugs to <bug-gzip@gnu.org>."
+
+# sed script to escape all ' for the shell, and then (to handle trailing
+# newlines correctly) append ' to the last line.
+escape='
+  s/'\''/'\''\\'\'''\''/g
+  $s/$/'\''/
+'
+operands=
+have_pat=0
+files_with_matches=0
+files_without_matches=0
+no_filename=0
+with_filename=0
+pattmp=
+
+while test $# -ne 0; do
+  option=$1
+  shift
+  optarg=
+
+  case $option in
+  (-[0123456789EFGHIKLPRTUVZabchilnoqrsuvwxyz]*[!0123456789]*)
+    arg2=-\'$(expr "X$option" : 'X-.[0-9]*\(.*\)' | sed "$escape")
+    eval "set -- $arg2 "'${1+"$@"}'
+    option=$(expr "X$option" : 'X\(-.[0-9]*\)');;
+  (--binary-*=* | --[lm]a*=* | --reg*=*)
+    ;;
+  (-[ABCDXdefm] | binary-* | --file | --[lm]a* | --reg*)
+    case ${1?"$option option requires an argument"} in
+    (*\'*)
+      optarg=" '"$(printf '%s\n' "$1" | sed "$escape");;
+    (*)
+      optarg=" '$1'";;
+    esac
+    shift;;
+  (-f?*\'*)
+    optarg=" '"$(expr "X$option" : 'X-f\(.*\)' | sed "$escape")
+    option=-f;;
+  (-f?*)
+    optarg=" '"$(expr "X$option" : 'X-f\(.*\)')\'
+    option=-f;;
+  (--file=*\'*)
+    optarg=" '"$(expr "X$option" : 'X--file=\(.*\)' | sed "$escape")
+    option=--file;;
+  (--file=*)
+    optarg=" '"$(expr "X$option" : 'X--file=\(.*\)')\'
+    option=--file;;
+  (--)
+    break;;
+  (-?*)
+    ;;
+  (*)
+    case $option in
+    (*\'*)
+      operands="$operands '"$(printf '%s\n' "$option" | sed "$escape");;
+    (*)
+      operands="$operands '$option'";;
+    esac
+    ${POSIXLY_CORRECT+break}
+    continue;;
+  esac
+
+  case $option in
+  (-[drRzZ] | --di* | --exc* | --inc* | --rec* | --nu*)
+    printf >&2 '%s: %s: option not supported\n' "$0" "$option"
+    exit 2;;
+  (-e* | --reg*)
+    have_pat=1;;
+  (-f | --file)
+    # The pattern is coming from a file rather than the command-line.
+    # If the file is actually stdin then we need to do a little
+    # magic, since we use stdin to pass the gzip output to grep.
+    # Similarly if it is not a regular file, since it might be read repeatedly.
+    # In either of these two cases, copy the pattern into a temporary file,
+    # and use that file instead.  The pattern might contain null bytes,
+    # so we cannot simply switch to -e here.
+    if case $optarg in
+       (" '-'" | " '/dev/stdin'" | " '/dev/fd/0'")
+         :;;
+       (*)
+         eval "test ! -f$optarg";;
+       esac
+    then
+      if test -n "$pattmp"; then
+        eval "cat --$optarg" >>"$pattmp" || exit 2
+        continue
+      fi
+      trap '
+        test -n "$pattmp" && rm -f "$pattmp"
+        (exit 2); exit 2
+      ' HUP INT PIPE TERM 0
+      if type mktemp >/dev/null 2>&1; then
+        pattmp=$(mktemp) || exit 2
+      else
+        set -C
+        pattmp=${TMPDIR-/tmp}/zgrep.$$
+      fi
+      eval "cat --$optarg" >"$pattmp" || exit 2
+      optarg=' "$pattmp"'
+    fi
+    have_pat=1;;
+  (--h | --he | --hel | --help)
+    echo "$usage" || exit 2
+    exit;;
+  (-H | --wi | --wit | --with | --with- | --with-f | --with-fi \
+  | --with-fil | --with-file | --with-filen | --with-filena | --with-filenam \
+  | --with-filename)
+    with_filename=1
+    continue;;
+  (-l | --files-with-*)
+    files_with_matches=1;;
+  (-L | --files-witho*)
+    files_without_matches=1;;
+  (-h | --no-f*)
+    no_filename=1;;
+  (-V | --v | --ve | --ver | --vers | --versi | --versio | --version)
+    echo "$version" || exit 2
+    exit;;
+  esac
+
+  case $option in
+  (*\'?*)
+    option=\'$(printf '%s\n' "$option" | sed "$escape");;
+  (*)
+    option="'$option'";;
+  esac
+
+  grep="$grep $option$optarg"
+done
+
+eval "set -- $operands "'${1+"$@"}'
+
+if test $have_pat -eq 0; then
+  case ${1?"missing pattern; try \`$0 --help' for help"} in
+  (*\'*)
+    grep="$grep -- '"$(printf '%s\n' "$1" | sed "$escape");;
+  (*)
+    grep="$grep -- '$1'";;
+  esac
+  shift
+fi
+
+if test $# -eq 0; then
+  set -- -
+fi
+
+exec 3>&1
+res=1
+
+for i
+do
+  # Fail if gzip or grep (or sed) fails.
+  gzip_status=$(
+    exec 5>&1
+    (gzip -cdfq -- "$i" 5>&-; echo $? >&5) 3>&- |
+    if test $files_with_matches -eq 1; then
+      eval "$grep" >/dev/null && { printf '%s\n' "$i" || exit 2; }
+    elif test $files_without_matches -eq 1; then
+      eval "$grep" >/dev/null || {
+        r=$?
+        if test $r -eq 1; then
+          printf '%s\n' "$i" || r=2
+        fi
+        test 256 -le $r && r=$(expr 128 + $r % 128)
+        exit $r
+      }
+    elif test $with_filename -eq 0 &&
+         { test $# -eq 1 || test $no_filename -eq 1; }; then
+      eval "$grep"
+    else
+      case $i in
+      (*'
+'* | *'&'* | *'\'* | *'|'*)
+        i=$(printf '%s\n' "$i" |
+            sed '
+              $!N
+              $s/[&\|]/\\&/g
+              $s/\n/\\n/g
+            ');;
+      esac
+      sed_script="s|^|$i:|"
+
+      # Fail if grep or sed fails.
+      r=$(
+        exec 4>&1
+        (eval "$grep" 4>&-; echo $? >&4) 3>&- | sed "$sed_script" >&3 4>&-
+      ) || { r=$?; test $r -lt 2 && r=2; }
+      test 256 -le $r && r=$(expr 128 + $r % 128)
+      exit $r
+    fi >&3 5>&-
+  )
+  r=$?
+
+  # Ignore gzip status 2, as it is just a warning.
+  # gzip status 1 is an error, like grep status 2.
+  test $gzip_status -eq 2 && gzip_status=0
+  test $gzip_status -eq 1 && gzip_status=2
+
+  # Use the more serious of the grep and gzip statuses.
+  test $r -lt $gzip_status && r=$gzip_status
+
+  # Accumulate the greatest status, except consider 0 to be greater than 1.
+  if test $r -le 1 && test $res -le 1; then
+     test $r -lt $res
+  else
+     test $res -lt $r
+  fi && res=$r
+
+  # Exit immediately on a serious error.
+  test 126 -le $res && break
+done
+
+if test -n "$pattmp"; then
+  rm -f "$pattmp" || {
+    r=$?
+    test $r -lt 2 && r=2
+    test $res -lt $r && res=$r
+  }
+  trap - HUP INT PIPE TERM 0
+fi
+
+test 128 -le $res && kill -$(expr $res % 128) $$
+exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zipdetails b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zipdetails
new file mode 100644
index 00000000..1b6d93b9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zipdetails
@@ -0,0 +1,2130 @@
+#!/usr/bin/perl
+    eval 'exec /usr/bin/perl -S $0 ${1+"$@"}'
+	if $running_under_some_shell;
+#!/usr/bin/perl
+
+# zipdetails
+#
+# Display info on the contents of a Zip file
+#
+
+use strict;
+use warnings ;
+
+use IO::File;
+use Encode;
+
+# Compression types 
+use constant ZIP_CM_STORE                      => 0 ;
+use constant ZIP_CM_IMPLODE                    => 6 ;
+use constant ZIP_CM_DEFLATE                    => 8 ;
+use constant ZIP_CM_BZIP2                      => 12 ;
+use constant ZIP_CM_LZMA                       => 14 ;
+use constant ZIP_CM_PPMD                       => 98 ; 
+
+# General Purpose Flag
+use constant ZIP_GP_FLAG_ENCRYPTED_MASK        => (1 << 0) ;
+use constant ZIP_GP_FLAG_STREAMING_MASK        => (1 << 3) ;
+use constant ZIP_GP_FLAG_PATCHED_MASK          => (1 << 5) ;
+use constant ZIP_GP_FLAG_STRONG_ENCRYPTED_MASK => (1 << 6) ;
+use constant ZIP_GP_FLAG_LZMA_EOS_PRESENT      => (1 << 1) ;
+use constant ZIP_GP_FLAG_LANGUAGE_ENCODING     => (1 << 11) ;
+
+# Internal File Attributes
+use constant ZIP_IFA_TEXT_MASK                 => 1;
+
+# Signatures for each of the headers
+use constant ZIP_LOCAL_HDR_SIG                 => 0x04034b50;
+use constant ZIP_DATA_HDR_SIG                  => 0x08074b50;
+use constant ZIP_CENTRAL_HDR_SIG               => 0x02014b50;
+use constant ZIP_END_CENTRAL_HDR_SIG           => 0x06054b50;
+use constant ZIP64_END_CENTRAL_REC_HDR_SIG     => 0x06064b50;
+use constant ZIP64_END_CENTRAL_LOC_HDR_SIG     => 0x07064b50;
+use constant ZIP64_ARCHIVE_EXTRA_SIG           => 0x08064b50;
+use constant ZIP64_DIGITAL_SIGNATURE_SIG       => 0x05054b50;
+
+use constant ZIP_ARCHIVE_EXTRA_DATA_RECORD_SIG => 0x08064b50;
+
+# Extra sizes
+use constant ZIP_EXTRA_HEADER_SIZE          => 2 ;
+use constant ZIP_EXTRA_MAX_SIZE             => 0xFFFF ;
+use constant ZIP_EXTRA_SUBFIELD_ID_SIZE     => 2 ;
+use constant ZIP_EXTRA_SUBFIELD_LEN_SIZE    => 2 ;
+use constant ZIP_EXTRA_SUBFIELD_HEADER_SIZE => ZIP_EXTRA_SUBFIELD_ID_SIZE +
+                                               ZIP_EXTRA_SUBFIELD_LEN_SIZE;
+use constant ZIP_EXTRA_SUBFIELD_MAX_SIZE    => ZIP_EXTRA_MAX_SIZE - 
+                                               ZIP_EXTRA_SUBFIELD_HEADER_SIZE;
+
+my %ZIP_CompressionMethods =
+    (
+          0 => 'Stored',
+          1 => 'Shrunk',
+          2 => 'Reduced compression factor 1',
+          3 => 'Reduced compression factor 2',
+          4 => 'Reduced compression factor 3',
+          5 => 'Reduced compression factor 4',
+          6 => 'Imploded',
+          7 => 'Reserved for Tokenizing compression algorithm',
+          8 => 'Deflated',
+          9 => 'Enhanced Deflating using Deflate64(tm)',
+         10 => 'PKWARE Data Compression Library Imploding',
+         11 => 'Reserved by PKWARE',
+         12 => 'BZIP2 ',
+         13 => 'Reserved by PKWARE',
+         14 => 'LZMA',
+         15 => 'Reserved by PKWARE',
+         16 => 'Reserved by PKWARE',
+         17 => 'Reserved by PKWARE',
+         18 => 'File is compressed using IBM TERSE (new)',
+         19 => 'IBM LZ77 z Architecture (PFS)',
+         96 => 'WinZip JPEG Compression',
+         97 => 'WavPack compressed data',
+         98 => 'PPMd version I, Rev 1',
+         99 => 'AES Encryption',
+     );
+
+my %OS_Lookup = (
+    0   => "MS-DOS",
+    1   => "Amiga",
+    2   => "OpenVMS",
+    3   => "Unix",
+    4   => "VM/CMS",
+    5   => "Atari ST",
+    6   => "HPFS (OS/2, NT 3.x)",
+    7   => "Macintosh",
+    8   => "Z-System",
+    9   => "CP/M",
+    10  => "Windoxs NTFS or TOPS-20",
+    11  => "MVS or NTFS",
+    12  => "VSE or SMS/QDOS",
+    13  => "Acorn RISC OS",
+    14  => "VFAT",
+    15  => "alternate MVS",
+    16  => "BeOS",
+    17  => "Tandem",
+    18  => "OS/400",
+    19  => "OS/X (Darwin)",
+    30  => "AtheOS/Syllable",
+    );
+
+
+my %Lookup = (
+    ZIP_LOCAL_HDR_SIG,             \&LocalHeader,
+    ZIP_DATA_HDR_SIG,              \&DataHeader,
+    ZIP_CENTRAL_HDR_SIG,           \&CentralHeader,
+    ZIP_END_CENTRAL_HDR_SIG,       \&EndCentralHeader,
+    ZIP64_END_CENTRAL_REC_HDR_SIG, \&Zip64EndCentralHeader,
+    ZIP64_END_CENTRAL_LOC_HDR_SIG, \&Zip64EndCentralLocator,
+    
+    # TODO - Archive Encryption Headers
+    #ZIP_ARCHIVE_EXTRA_DATA_RECORD_SIG
+);
+
+my %Extras = (
+      0x0001,  ['ZIP64', \&decode_Zip64],
+      0x0007,  ['AV Info', undef],
+      0x0008,  ['Extended Language Encoding', undef],
+      0x0009,  ['OS/2 extended attributes', undef],
+      0x000a,  ['NTFS FileTimes', \&decode_NTFS_Filetimes],
+      0x000c,  ['OpenVMS', undef],
+      0x000d,  ['Unix', undef],
+      0x000e,  ['Stream & Fork Descriptors', undef],
+      0x000f,  ['Patch Descriptor', undef],
+      0x0014,  ['PKCS#7 Store for X.509 Certificates', undef],
+      0x0015,  ['X.509 Certificate ID and Signature for individual file', undef],
+      0x0016,  ['X.509 Certificate ID for Central Directory', undef],
+      0x0017,  ['Strong Encryption Header', undef],
+      0x0018,  ['Record Management Controls', undef],
+      0x0019,  ['PKCS#7 Encryption Recipient Certificate List', undef],
+      
+
+      #The Header ID mappings defined by Info-ZIP and third parties are:
+
+      0x0065,  ['IBM S/390 attributes - uncompressed', undef],
+      0x0066,  ['IBM S/390 attributes - compressed', undef],
+      0x07c8,  ['Info-ZIP Macintosh (old, J. Lee)', undef],
+      0x2605,  ['ZipIt Macintosh (first version)', undef],
+      0x2705,  ['ZipIt Macintosh v 1.3.5 and newer (w/o full filename)', undef],
+      0x2805,  ['ZipIt Macintosh v 1.3.5 and newer ', undef],
+      0x334d,  ["Info-ZIP Macintosh (new, D. Haase's 'Mac3' field)", undef],
+      0x4154,  ['Tandem NSK', undef],
+      0x4341,  ['Acorn/SparkFS (David Pilling)', undef],
+      0x4453,  ['Windows NT security descriptor', \&decode_NT_security],
+      0x4690,  ['POSZIP 4690', undef],
+      0x4704,  ['VM/CMS', undef],
+      0x470f,  ['MVS', undef],
+      0x4854,  ['Theos, old inofficial port', undef],
+      0x4b46,  ['FWKCS MD5 (see below)', undef],
+      0x4c41,  ['OS/2 access control list (text ACL)', undef],
+      0x4d49,  ['Info-ZIP OpenVMS (obsolete)', undef],
+      0x4d63,  ['Macintosh SmartZIP, by Macro Bambini', undef],
+      0x4f4c,  ['Xceed original location extra field', undef],
+      0x5356,  ['AOS/VS (binary ACL)', undef],
+      0x5455,  ['Extended Timestamp', \&decode_UT],
+      0x554e,  ['Xceed unicode extra field', \&decode_Xceed_unicode],
+      0x5855,  ['Info-ZIP Unix (original; also OS/2, NT, etc.)', \&decode_UX],
+      0x5a4c,  ['ZipArchive Unicode Filename', undef],
+      0x5a4d,  ['ZipArchive Offsets Array', undef],
+      0x6375,  ["Info-ZIP Unicode Comment", \&decode_up ],
+      0x6542,  ['BeOS (BeBox, PowerMac, etc.)', undef],
+      0x6854,  ['Theos', undef],
+      0x7075,  ["Info-ZIP Unicode Path", \&decode_up ],
+      0x756e,  ['ASi Unix', undef],
+      0x7441,  ['AtheOS (AtheOS/Syllable attributes)', undef],
+      0x7855,  ["Unix Extra type 2", \&decode_Ux],
+      0x7875,  ["Unix Extra Type 3", \&decode_ux],
+      0x9901,  ['AES Encryption', \&decode_AES],
+      0xA220,  ["Microsoft Microsoft Open Packaging Growth Hint", undef ],
+      0xCAFE,  ["Java Executable", \&decode_Java_exe],
+      0xfb4a,  ['SMS/QDOS', undef],
+
+       );
+
+my $VERSION = "1.06" ;
+
+my $FH;
+
+my $ZIP64 = 0 ;
+my $NIBBLES = 8;
+my $LocalHeaderCount = 0;
+my $CentralHeaderCount = 0;
+
+my $START;
+my $OFFSET = new U64 0;
+my $TRAILING = 0 ;
+my $PAYLOADLIMIT = new U64 256;
+my $ZERO = new U64 0 ;
+
+sub prOff
+{
+    my $offset = shift;
+    my $s = offset($OFFSET);
+    $OFFSET->add($offset);
+    return $s;
+}
+
+sub offset
+{
+    my $v = shift ;
+
+    if (ref $v eq 'U64') {
+        my $hi = $v->getHigh();
+        my $lo = $v->getLow();
+
+        if ($hi)
+        {
+            my $hiNib = $NIBBLES - 8 ;
+            sprintf("%0${hiNib}X", $hi) .
+            sprintf("%08X", $lo);
+        }
+        else
+        {
+            sprintf("%0${NIBBLES}X", $lo);
+        }
+    }
+    else {
+        sprintf("%0${NIBBLES}X", $v);
+    }
+
+}
+
+my ($OFF,  $LENGTH,  $CONTENT, $TEXT, $VALUE) ;
+
+my $FMT1 ;
+my $FMT2 ;
+
+sub setupFormat
+{
+    my $wantVerbose = shift ;
+    my $nibbles = shift;
+    
+    my $width = '@' . ('>' x ($nibbles -1));
+    my $space = " " x length($width);
+
+    my $fmt ;
+    
+    if ($wantVerbose) {
+        
+        $FMT1 = "
+        format STDOUT =
+$width $width ^<<<<<<<<<<<^<<<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
+\$OFF,     \$LENGTH,  \$CONTENT, \$TEXT,               \$VALUE
+$space $space ^<<<<<<<<<<<^<<<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<~~
+                    \$CONTENT, \$TEXT,               \$VALUE
+.                    
+";
+                    
+        $FMT2 = "
+        format STDOUT =
+$width $width ^<<<<<<<<<<<  ^<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
+\$OFF,     \$LENGTH,  \$CONTENT, \$TEXT,               \$VALUE
+$space $space ^<<<<<<<<<<<  ^<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<~~
+              \$CONTENT, \$TEXT,               \$VALUE
+.  " ;
+
+    }
+    else {
+
+        $FMT1 = "
+        format STDOUT =
+$width ^<<<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
+\$OFF,      \$TEXT,               \$VALUE
+$space ^<<<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<~~
+                    \$TEXT,               \$VALUE
+.
+";
+
+        $FMT2 = "
+    format STDOUT =
+$width   ^<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<
+\$OFF,     \$TEXT,               \$VALUE
+$space   ^<<<<<<<<<<<<<<<<<< ^<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<~~
+                    \$TEXT,               \$VALUE
+.
+" ;
+    }
+
+    eval "$FMT1";
+    
+    $| = 1;
+
+}
+
+sub mySpr
+{    
+    my $format = shift ;
+    
+    return "" if ! defined $format;
+    return $format unless @_ ;
+    return sprintf $format, @_ ;
+}
+
+sub out0
+{
+    my $size = shift;
+    my $text = shift;
+    my $format = shift;
+    
+    $OFF     = prOff($size);
+    $LENGTH  = offset($size) ;
+    $CONTENT = '...';
+    $TEXT    = $text;
+    $VALUE   = mySpr $format,  @_;
+       
+    write;
+
+    skip($FH, $size);
+}
+
+sub xDump
+{
+    my $input = shift;
+
+    $input =~ tr/\0-\37\177-\377/./;
+    return $input;
+}
+
+sub hexDump
+{
+    my $input = shift;
+
+    my $out = unpack('H*', $input) ;   
+    $out =~ s#(..)# $1#g ;
+    $out =~ s/^ //;
+    $out = uc $out;  
+
+    return $out;
+}
+
+sub out
+{
+    my $data = shift;
+    my $text = shift;
+    my $format = shift;
+    
+    my $size = length($data) ;
+
+    $OFF     = prOff($size);
+    $LENGTH  = offset($size) ;
+    $CONTENT = hexDump($data);
+    $TEXT    = $text;
+    $VALUE   = mySpr $format,  @_;
+       
+    no warnings;
+
+    write;
+}
+
+sub out1
+{
+    my $text = shift;
+    my $format = shift;
+      
+    $OFF     = '';
+    $LENGTH  = '' ;
+    $CONTENT = '';
+    $TEXT    = $text;    
+    $VALUE   = mySpr $format,  @_; 
+
+    write;
+}
+
+sub out2
+{
+    my $data = shift ;
+    my $text = shift ;
+    my $format = shift;
+      
+    my $size = length($data) ;
+    $OFF     = prOff($size);
+    $LENGTH  = offset($size);
+    $CONTENT = hexDump($data);
+    $TEXT    = $text;    
+    $VALUE   = mySpr $format,  @_; 
+
+    no warnings;
+    eval "$FMT2";
+    write ;
+    eval "$FMT1";
+}
+
+sub Value
+{
+    my $letter = shift;
+    my @value = @_;
+
+    if ($letter eq 'C')
+      { return Value_C(@value) }
+    elsif ($letter eq 'v')
+      { return Value_v(@value) }
+    elsif ($letter eq 'V')
+      { return Value_V(@value) }
+    elsif ($letter eq 'VV')
+      { return Value_VV(@value) }
+}
+
+sub outer
+{
+    my $name = shift ;
+    my $unpack = shift ;
+    my $size = shift ;
+    my $cb1  = shift ;
+    my $cb2  = shift ;
+
+
+    myRead(my $buff, $size);    
+    my (@value) = unpack $unpack, $buff;
+    my $hex = Value($unpack,  @value);
+
+    if (defined $cb1) {
+        my $v ;
+        if (ref $cb1 eq 'CODE') {
+            $v = $cb1->(@value) ;
+        }
+        else {
+            $v = $cb1 ;
+        }
+
+        $v = "'" . $v unless $v =~ /^'/;
+        $v .= "'"  unless $v =~ /'$/;
+        $hex .= " $v" ;
+    }
+
+    out $buff, $name, $hex ;
+
+    $cb2->(@value)
+        if defined $cb2 ;
+    
+    return $value[0];
+}
+
+sub out_C
+{
+    my $name = shift ;
+    my $cb1  = shift ;
+    my $cb2  = shift ;
+
+    outer($name, 'C', 1, $cb1, $cb2);
+}
+
+sub out_v
+{
+    my $name = shift ;
+    my $cb1  = shift ;
+    my $cb2  = shift ;
+
+    outer($name, 'v', 2, $cb1, $cb2);
+}
+
+sub out_V
+{
+    my $name = shift ;
+    my $cb1  = shift ;
+    my $cb2  = shift ;
+
+    outer($name, 'V', 4, $cb1, $cb2);
+}
+
+sub out_VV
+{
+    my $name = shift ;
+    my $cb1  = shift ;
+    my $cb2  = shift ;
+
+    outer($name, 'VV', 8, $cb1, $cb2);
+}
+
+sub outSomeData
+{
+    my $size = shift;
+    my $message = shift;
+
+    my $size64 = U64::mkU64($size);
+
+    if ($size64->gt($ZERO)) {
+        my $size32 = $size64->getLow();
+        if ($size64->gt($PAYLOADLIMIT) ) {
+            out0 $size32, $message;
+        } else {
+            myRead(my $buffer, $size32 );
+            out $buffer, $message, xDump $buffer ;
+        }
+    }
+}
+
+sub unpackValue_C
+{
+    Value_v(unpack "C", $_[0]);
+}
+
+sub Value_C
+{
+    sprintf "%02X", $_[0];
+}
+
+
+sub unpackValue_v
+{
+    Value_v(unpack "v", $_[0]);
+}
+
+sub Value_v
+{
+    sprintf "%04X", $_[0];
+}
+
+sub unpackValue_V
+{
+    Value_V(unpack "V", $_[0]);
+}
+
+sub Value_V
+{
+    my $v = defined $_[0] ? $_[0] : 0;
+    sprintf "%08X", $v;
+}
+
+sub unpackValue_VV
+{
+    my ($lo, $hi) = unpack ("V V", $_[0]);
+    Value_VV($lo, $hi);
+}
+
+sub Value_U64
+{
+    my $u64 = shift ;
+    Value_VV($u64->getLow(), $u64->getHigh());
+}
+
+sub Value_VV
+{
+    my $lo = defined $_[0] ? $_[0] : 0;
+    my $hi = defined $_[1] ? $_[1] : 0;
+
+    if ($hi == 0)
+    {
+        sprintf "%016X", $lo;
+    }
+    else
+    {
+        sprintf("%08X", $hi) .
+        sprintf "%08X", $lo;
+    }
+}
+
+sub Value_VV64
+{
+    my $buffer = shift;
+
+    my ($lo, $hi) = unpack ("V V" , $buffer);
+    no warnings 'uninitialized';
+    return $hi * (0xFFFFFFFF+1) + $lo;
+}
+
+sub read_U64
+{
+    my $b ;
+    myRead($b, 8);    
+    my ($lo, $hi) = unpack ("V V" , $b);
+    no warnings 'uninitialized';
+    return ($b, new U64 $hi, $lo);
+}
+
+sub read_VV
+{
+    my $b ;
+    myRead($b, 8);    
+    my ($lo, $hi) = unpack ("V V" , $b);
+    no warnings 'uninitialized';
+    return ($b, $hi * (0xFFFFFFFF+1) + $lo);
+}
+
+sub read_V
+{
+    my $b ;
+    myRead($b, 4);
+    return ($b, unpack ("V", $b));
+}
+
+sub read_v
+{
+    my $b ;
+    myRead($b, 2);
+    return ($b, unpack "v", $b);
+}
+
+
+sub read_C
+{
+    my $b ;
+    myRead($b, 1);
+    return ($b, unpack "C", $b);
+}
+
+
+my $opt_verbose = 0;
+while (@ARGV && $ARGV[0] =~ /^-/)
+{
+    my $opt = shift;
+    
+    if ($opt =~ /^-h/i)
+    {
+        Usage();
+        exit;
+    }
+    elsif ($opt =~ /^-v/i)
+    {
+        $opt_verbose = 1;
+    }
+    else {
+        Usage();
+    }
+}
+
+Usage() unless @ARGV == 1;
+
+my $filename = shift @ARGV;
+
+die "$filename does not exist\n"
+    unless -e $filename ;
+
+die "$filename not a standard file\n"
+    unless -f $filename ;
+
+$FH = new IO::File "<$filename"
+    or die "Cannot open $filename: $!\n";
+
+
+my $FILELEN = -s $filename ;    
+$TRAILING = -s $filename ;    
+$NIBBLES = U64::nibbles(-s $filename) ; 
+#$NIBBLES = int ($NIBBLES / 4) + ( ($NIBBLES % 4) ? 1 : 0 );
+#$NIBBLES = 4 * $NIBBLES;
+# Minimum of 4 nibbles
+$NIBBLES = 4 if $NIBBLES < 4 ;
+
+die "$filename too short to be a zip file\n"
+    if $FILELEN <  100 ;
+
+setupFormat($opt_verbose, $NIBBLES);
+
+if(0)
+{
+    # Sanity check that this is a Zip file
+    my ($buffer, $signature) = read_V();
+
+    warn "$filename doesn't look like a zip file\n"
+        if $signature != ZIP_LOCAL_HDR_SIG ;
+    $FH->seek(0, SEEK_SET) ;
+}
+
+
+our  @CentralDirectory = scanCentralDirectory($FH);
+die "No Central Directory found\n"
+    if ! @CentralDirectory ;
+
+$OFFSET->reset();
+$FH->seek(0, SEEK_SET) ;
+
+outSomeData($START, "PREFIX DATA")
+    if defined $START && $START > 0 ;
+
+while (1)
+{
+    last if $FH->eof();
+
+    if ($FH->tell() >= $TRAILING) {
+        print "\n" ;
+        outSomeData($FILELEN - $TRAILING, "TRAILING DATA");
+        last;
+
+    }
+
+    my ($buffer, $signature) = read_V();
+
+    my $handler = $Lookup{$signature};
+
+    if (!defined $handler)
+    {
+        my $offset = $FH->tell() - 4;
+        printf "\n\nUnexpecded END at offset %08X, value %s\n", $offset, Value_V($signature);
+        last;        
+    }
+
+    $ZIP64 = 0 if $signature != ZIP_DATA_HDR_SIG ;
+    $handler->($signature, $buffer);
+}
+
+print "Done\n";
+
+exit ;
+
+sub compressionMethod
+{
+    my $id = shift ;
+    Value_v($id) . " '" . ($ZIP_CompressionMethods{$id} || "Unknown Method") . "'" ;
+}
+
+sub LocalHeader
+{
+    my $signature = shift ;  
+    my $data = shift ;  
+        
+    print "\n";
+    ++ $LocalHeaderCount;
+    out $data, "LOCAL HEADER #" . sprintf("%X", $LocalHeaderCount) , Value_V($signature);
+
+    my $buffer;
+
+    my ($loc, $CDcompressedLength) = @{ shift @CentralDirectory };
+    # TODO - add test to check that the loc from central header matches
+
+    out_C  "Extract Zip Spec", \&decodeZipVer;
+    out_C  "Extract OS", \&decodeOS;
+
+    my ($bgp, $gpFlag) = read_v();
+    my ($bcm, $compressedMethod) = read_v();
+
+    out $bgp, "General Purpose Flag", Value_v($gpFlag) ;
+    GeneralPurposeBits($compressedMethod, $gpFlag);    
+
+    out $bcm, "Compression Method",   compressionMethod($compressedMethod) ;
+
+    out_V "Last Mod Time", sub { scalar getTime(_dosToUnixTime($_[0])) };
+
+    my $crc                = out_V "CRC";
+    my $compressedLength   = out_V "Compressed Length";
+    my $uncompressedLength = out_V "Uncompressed Length";
+    my $filenameLength     = out_v "Filename Length";
+    my $extraLength        = out_v "Extra Length";
+
+    my $filename ;
+    myRead($filename, $filenameLength);
+    out $filename, "Filename",  "'". $filename . "'";
+
+    my $cl64 = new U64 $compressedLength ;
+    my %ExtraContext = ();
+    if ($extraLength)
+    {
+        my @z64 = ($uncompressedLength, $compressedLength, 1, 1);
+        $ExtraContext{Zip64} = \@z64 ;
+        $ExtraContext{InCentralDir} = 0;
+        walkExtra($extraLength, \%ExtraContext);
+    }
+
+    my $size = 0;
+    $size = printAes(\%ExtraContext)
+        if $compressedMethod == 99 ;
+
+    $size += printLzmaProperties()
+        if $compressedMethod == ZIP_CM_LZMA ;
+
+    $CDcompressedLength->subtract($size)
+        if $size ;
+        
+    if ($CDcompressedLength->getHigh() || $CDcompressedLength->getLow()) {
+        outSomeData($CDcompressedLength, "PAYLOAD") ;
+    }
+
+    if ($compressedMethod == 99) {
+        my $auth ;
+        myRead($auth, 10);
+        out $auth, "AES Auth",  hexDump($auth);
+    }
+}
+
+
+sub CentralHeader
+{
+    my $signature = shift ;
+    my $data = shift ;  
+        
+    ++ $CentralHeaderCount;
+    print "\n";
+    out $data, "CENTRAL HEADER #" . sprintf("%X", $CentralHeaderCount) . "", Value_V($signature);
+    my $buffer;
+
+    out_C "Created Zip Spec", \&decodeZipVer;
+    out_C "Created OS", \&decodeOS;
+    out_C  "Extract Zip Spec", \&decodeZipVer;
+    out_C  "Extract OS", \&decodeOS;
+
+    my ($bgp, $gpFlag) = read_v();
+    my ($bcm, $compressedMethod) = read_v();
+
+    out $bgp, "General Purpose Flag", Value_v($gpFlag) ;
+    GeneralPurposeBits($compressedMethod, $gpFlag);    
+
+    out $bcm, "Compression Method", compressionMethod($compressedMethod) ;
+
+    out_V "Last Mod Time", sub { scalar getTime(_dosToUnixTime($_[0])) };
+
+    my $crc                = out_V "CRC";
+    my $compressedLength   = out_V "Compressed Length";
+    my $uncompressedLength = out_V "Uncompressed Length";
+    my $filenameLength     = out_v "Filename Length";
+    my $extraLength        = out_v "Extra Length";
+    my $comment_length     = out_v "Comment Length";
+    my $disk_start         = out_v "Disk Start";
+    my $int_file_attrib    = out_v "Int File Attributes";
+
+    out1 "[Bit 0]",  $int_file_attrib & 1 ? "1 Text Data" : "0 'Binary Data'";
+
+    my $ext_file_attrib    = out_V "Ext File Attributes";
+    out1 "[Bit 0]",  "Read-Only" 
+        if $ext_file_attrib & 0x01 ;
+    out1 "[Bit 1]",  "Hidden" 
+        if $ext_file_attrib & 0x02 ;
+    out1 "[Bit 2]",  "System" 
+        if $ext_file_attrib & 0x04 ;
+    out1 "[Bit 3]",  "Label" 
+        if $ext_file_attrib & 0x08 ;
+    out1 "[Bit 4]",  "Directory" 
+        if $ext_file_attrib & 0x10 ;
+    out1 "[Bit 5]",  "Archive" 
+        if $ext_file_attrib & 0x20 ;
+
+    my $lcl_hdr_offset     = out_V "Local Header Offset";
+
+    my $filename ;
+    myRead($filename, $filenameLength);
+    out $filename, "Filename",  "'". $filename . "'";
+
+    my %ExtraContext = ();
+    if ($extraLength)
+    {
+        my @z64 = ($uncompressedLength, $compressedLength, $lcl_hdr_offset, $disk_start);
+        $ExtraContext{Zip64} = \@z64 ;
+        $ExtraContext{InCentralDir} = 1;
+        walkExtra($extraLength, \%ExtraContext);        
+    }
+
+    if ($comment_length)
+    {
+        my $comment ;
+        myRead($comment, $comment_length);
+        out $comment, "Comment",  "'". $comment . "'";
+    }
+}
+
+sub decodeZipVer
+{
+    my $ver = shift ;
+    
+    my $sHi = int($ver /10) ;
+    my $sLo = $ver % 10 ;
+    
+    #out1 "Zip Spec", "$sHi.$sLo";       
+    "$sHi.$sLo";       
+}
+
+sub decodeOS
+{
+    my $ver = shift ;
+    
+    $OS_Lookup{$ver} || "Unknown" ;
+}
+
+sub Zip64EndCentralHeader
+{
+    my $signature = shift ;    
+    my $data = shift ;  
+
+    print "\n";
+    out $data, "ZIP64 END CENTRAL DIR RECORD", Value_V($signature);
+
+    my $buff;
+    myRead($buff, 8);
+
+    out $buff, "Size of record",       unpackValue_VV($buff);    
+
+    my $size  = Value_VV64($buff);
+
+    out_C  "Created Zip Spec", \&decodeZipVer;
+    out_C  "Created OS", \&decodeOS;
+    out_C  "Extract Zip Spec", \&decodeZipVer;
+    out_C  "Extract OS", \&decodeOS;
+    out_V  "Number of this disk";
+    out_V  "Central Dir Disk no";
+    out_VV "Entries in this disk";
+    out_VV "Total Entries";
+    out_VV "Size of Central Dir";
+    out_VV "Offset to Central dir";
+
+    # TODO - 
+    die "Unsupported Size ($size) in Zip64EndCentralHeader\n" 
+        if $size !=  44;
+}
+
+
+sub Zip64EndCentralLocator
+{
+    my $signature = shift ;
+    my $data = shift ;  
+        
+    print "\n";
+    out $data, "ZIP64 END CENTRAL DIR LOCATOR", Value_V($signature);
+    
+    out_V  "Central Dir Disk no";
+    out_VV "Offset to Central dir";
+    out_V  "Total no of Disks";    
+}
+
+sub EndCentralHeader
+{
+    my $signature = shift ;  
+    my $data = shift ;  
+        
+    print "\n";
+    out $data, "END CENTRAL HEADER", Value_V($signature);
+
+    out_v "Number of this disk";
+    out_v "Central Dir Disk no";
+    out_v "Entries in this disk";
+    out_v "Total Entries";
+    out_V "Size of Central Dir";
+    out_V "Offset to Central Dir";
+    my $comment_length = out_v "Comment Length";
+
+    if ($comment_length)
+    {
+        my $comment ;        
+        myRead($comment, $comment_length);
+        out $comment, "Comment", "'$comment'";
+    }    
+}
+
+sub DataHeader
+{
+    my $signature = shift ;  
+    my $data = shift ;  
+        
+    print "\n";
+    out $data, "STREAMING DATA HEADER", Value_V($signature);
+    
+    out_V "CRC";
+    
+    if ($ZIP64)
+    {
+        out_VV "Compressed Length" ;
+        out_VV "Uncompressed Length" ;        
+    }
+    else
+    {
+        out_V "Compressed Length" ;
+        out_V "Uncompressed Length" ;  
+    }
+}
+
+
+sub GeneralPurposeBits
+{
+    my $method = shift;
+    my $gp = shift;
+
+    out1 "[Bit  0]", "1 'Encryption'" if $gp & ZIP_GP_FLAG_ENCRYPTED_MASK;   
+    
+    my %lookup = (
+        0 =>    "Normal Compression",
+        1 =>    "Maximum Compression",
+        2 =>    "Fast Compression",
+        3 =>    "Super Fast Compression");
+
+
+    if ($method == ZIP_CM_DEFLATE)
+    {
+        my $mid = $gp & 0x03;
+        
+        out1 "[Bits 1-2]", "$mid '$lookup{$mid}'";        
+    }
+
+    if ($method == ZIP_CM_LZMA)
+    {
+        if ($gp & ZIP_GP_FLAG_LZMA_EOS_PRESENT) {
+            out1 "[Bit 1]", "1 'LZMA EOS Marker Present'" ;
+        }
+        else {
+            out1 "[Bit 1]", "0 'LZMA EOS Marker Not Present'" ;
+        }
+    }
+    
+    if ($method == ZIP_CM_IMPLODE) # Imploding
+    {
+        out1 "[Bit 1]", ($gp & 1 ? "1 '8k" : "0 '4k") . " Sliding Dictionary'" ;
+        out1 "[Bit 2]", ($gp & 2 ? "1 '3" : "0 '2"  ) . " Shannon-Fano
+        Trees'" ;
+    }    
+    
+    out1 "[Bit  3]", "1 'Streamed'"           if $gp & ZIP_GP_FLAG_STREAMING_MASK;
+    out1 "[Bit  4]", "1 'Enhanced Deflating'" if $gp & 1 << 4;
+    out1 "[Bit  5]", "1 'Compressed Patched'" if $gp & 1 << 5 ;
+    out1 "[Bit  6]", "1 'Strong Encryption'"  if $gp & ZIP_GP_FLAG_STRONG_ENCRYPTED_MASK;
+    out1 "[Bit 11]", "1 'Language Encoding'"  if $gp & ZIP_GP_FLAG_LANGUAGE_ENCODING;  
+    out1 "[Bit 12]", "1 'Pkware Enhanced Compression'"  if $gp & 1 <<12 ; 
+    out1 "[Bit 13]", "1 'Encrypted Central Dir'"  if $gp & 1 <<13 ; 
+    
+    return ();    
+}
+
+
+
+
+sub skip
+{
+    my $fh = $_[0] ;
+    my $size = $_[1];
+
+    use Fcntl qw(SEEK_CUR);
+    if (ref $size eq 'U64') {
+        seek($fh, $size->get64bit(), SEEK_CUR);
+    }
+    else {
+        seek($fh, $size, SEEK_CUR);
+    }
+    
+}
+
+
+sub myRead
+{
+    my $got = \$_[0] ;
+    my $size = $_[1];
+
+    my $wantSize = $size;
+    $$got = '';
+
+    if ($size == 0)
+    {
+        return ;
+    }
+
+    if ($size > 0)
+    {
+        my $buff ;
+        my $status = $FH->read($buff, $size);
+        return $status
+            if $status < 0;
+        $$got .= $buff ;
+    }
+
+    my $len = length $$got;
+    die "Truncated file (got $len, wanted $wantSize): $!\n"
+        if length $$got != $wantSize;
+}
+
+
+
+
+sub walkExtra
+{
+    my $XLEN = shift;
+    my $context = shift; 
+
+    my $buff ;
+    my $offset = 0 ;
+    
+    my $id;
+    my $subLen;
+    my $payload ;
+    
+    my $count = 0 ;
+    
+    if ($XLEN < ZIP_EXTRA_SUBFIELD_ID_SIZE + ZIP_EXTRA_SUBFIELD_LEN_SIZE)
+    {
+        # Android zipalign is prime candidate for this non-standard extra field.
+        myRead($payload, $XLEN); 
+        my $data = hexDump($payload);
+        
+        out $payload, "Malformed Extra Data", $data;
+
+        return undef;
+    }
+
+    while ($offset < $XLEN) {
+
+        ++ $count;
+        
+        return undef
+            if $offset + ZIP_EXTRA_SUBFIELD_HEADER_SIZE  > $XLEN ;
+
+        myRead($id, ZIP_EXTRA_SUBFIELD_ID_SIZE); 
+        $offset += ZIP_EXTRA_SUBFIELD_ID_SIZE;
+        my $lookID = unpack "v", $id ;
+        my ($who, $decoder) =  @{ defined $Extras{$lookID} ? $Extras{$lookID} : ['', undef] };
+        #my ($who, $decoder) =  @{ $Extras{unpack "v", $id} || ['', undef] };
+        
+        $who = "$id: $who"
+            if $id =~ /\w\w/ ;
+
+        $who = "'$who'";    
+        out $id, "Extra ID #" . Value_v($count), unpackValue_v($id) . " $who" ;
+        
+        myRead($buff, ZIP_EXTRA_SUBFIELD_LEN_SIZE); 
+        $offset += ZIP_EXTRA_SUBFIELD_LEN_SIZE;        
+        
+        $subLen =  unpack("v", $buff);
+        out2 $buff, "Length", Value_v($subLen) ;
+
+        return undef
+            if $offset + $subLen > $XLEN ;
+
+        if (! defined $decoder)
+        {
+            myRead($payload, $subLen);
+            my $data = hexDump($payload);
+        
+            out2 $payload, "Extra Payload", $data;
+        }
+        else
+        {
+            $decoder->($subLen, $context) ;
+        }
+               
+        $offset += $subLen ;
+    }
+        
+    return undef ;
+}
+
+
+sub full32 
+{
+    return $_[0] == 0xFFFFFFFF ;
+}
+
+sub decode_Zip64
+{
+    my $len = shift;
+    my $context = shift;
+    
+    my $z64Data = $context->{Zip64};    
+
+    $ZIP64 = 1;
+
+    if (full32 $z64Data->[0] ) {
+        out_VV "  Uncompressed Size";
+    }
+
+    if (full32 $z64Data->[1] ) {
+        out_VV "  Compressed Size";
+    }
+
+    if (full32 $z64Data->[2] ) {
+        out_VV "  Offset to Central Dir";        
+    }
+
+    if ($z64Data->[3] == 0xFFFF ) {
+        out_V "  Disk Number";        
+    }
+}
+
+sub Ntfs2Unix
+{
+    my $v = shift;
+    my $u64 = shift;
+
+    # NTFS offset is 19DB1DED53E8000
+
+    my $hex = Value_U64($u64) ;
+    my $NTFS_OFFSET = new U64 0x19DB1DE, 0xD53E8000 ;
+    $u64->subtract($NTFS_OFFSET);
+    my $elapse = $u64->get64bit();
+    my $ns = ($elapse % 10000000) * 100;
+    $elapse = int ($elapse/10000000);
+    return "$hex '" . localtime($elapse) . 
+           " " . sprintf("%0dns'", $ns);
+}
+
+sub decode_NTFS_Filetimes
+{
+    my $len = shift;
+    my $context = shift;
+
+    out_V "  Reserved";
+    out_v "  Tag1";
+    out_v "  Size1" ;
+    
+    my ($m, $s1) = read_U64;
+    out $m, "  Mtime", Ntfs2Unix($m, $s1);
+
+    my ($c, $s2) = read_U64;
+    out $c, "  Ctime", Ntfs2Unix($m, $s2);
+
+    my ($a, $s3) = read_U64;
+    out $m, "  Atime", Ntfs2Unix($m, $s3);
+}
+
+sub getTime
+{
+    my $time = shift ;
+
+    return "'" . localtime($time) . "'" ;
+}
+
+sub decode_UT
+{
+    my $len = shift;
+    my $context = shift;
+        
+    my ($data, $flags) = read_C();
+
+    my $f = Value_C $flags;
+    $f .= " mod"    if $flags & 1;
+    $f .= " access" if $flags & 2;
+    $f .= " change" if $flags & 4;
+    
+    out $data, "  Flags", "'$f'";
+    
+    -- $len;
+    
+    if ($flags & 1)
+    {
+        my ($data, $time) = read_V();
+
+        out2 $data, "Mod Time",    Value_V($time) . " " . getTime($time) ;
+        
+        $len -= 4 ;
+    }
+
+
+      if ($flags & 2 && $len > 0 )
+      {
+          my ($data, $time) = read_V();
+  
+          out2 $data, "Access Time",    Value_V($time) . " " . getTime($time) ;
+          $len -= 4 ;
+      }
+  
+      if ($flags & 4 && $len > 0)
+      {
+          my ($data, $time) = read_V();
+  
+          out2 $data, "Change Time",    Value_V($time) . " " . getTime($time) ;
+      }
+}
+
+
+
+sub decode_AES
+{
+    my $len = shift;
+    my $context = shift;
+
+    return if $len == 0 ;
+    
+    my %lookup = ( 1 => "AE-1", 2 => "AE-2");
+    out_v "  Vendor Version", sub {  $lookup{$_[0]} || "Unknown"  } ;
+    
+    my $id ; 
+    myRead($id, 2);
+    out $id, "  Vendor ID", unpackValue_v($id) . " '$id'";
+    
+    my %strengths = (1 => "128-bit encryption key",
+                     2 => "192-bit encryption key",
+                     3 => "256-bit encryption key",
+                    );
+    
+    my $strength = out_C "  Encryption Strength", sub {$strengths{$_[0]} || "Unknown" } ; 
+
+    my ($bmethod, $method) = read_v();
+    out $bmethod, "  Compression Method", compressionMethod($method) ;
+
+    $context->{AesStrength} = $strength ;     
+}
+
+sub decode_UX
+{
+    my $len = shift;
+    my $context = shift;
+    my $inCentralHdr = $context->{InCentralDir} ;
+
+    return if $len == 0 ;    
+
+    my ($data, $time) = read_V();
+    out2 $data, "Access Time",    Value_V($time) . " " . getTime($time) ;
+
+    ($data, $time) = read_V();
+    out2 $data, "Mod Time",    Value_V($time) . " " . getTime($time) ;
+
+    if (! $inCentralHdr ) {
+        out_v "  UID" ;
+        out_v "  GID";    
+    }
+}
+
+sub decode_Ux
+{
+    my $len = shift;
+    my $context = shift;
+
+    return if $len == 0 ;    
+    out_v "  UID" ;
+    out_v "  GID";    
+}
+
+sub decodeLitteEndian
+{
+    my $value = shift ;
+
+    if (length $value == 4)
+    {
+        return Value_V unpack ("V", $value)
+    }
+    else {
+        # TODO - fix this
+        die "unsupported\n";
+    }
+
+    my $got = 0 ;
+    my $shift = 0;
+
+    #hexDump 
+    #reverse
+    #my @a =unpack "C*", $value;
+    #@a = reverse @a;
+    #hexDump(@a);
+
+    for (reverse unpack "C*", $value)
+    {
+        $got = ($got << 8) + $_ ;
+    }
+    
+    return $got ;
+}
+
+sub decode_ux
+{
+    my $len = shift;
+    my $context = shift;
+
+    return if $len == 0 ;    
+    out_C "  Version" ;
+    my $uidSize = out_C "  UID Size";    
+    myRead(my $data, $uidSize);
+    out2 $data, "UID", decodeLitteEndian($data);
+
+    my $gidSize = out_C "  GID Size";    
+    myRead($data, $gidSize);
+    out2 $data, "GID", decodeLitteEndian($data);
+    
+}
+
+sub decode_Java_exe
+{
+    my $len = shift;
+    my $context = shift;
+
+}
+
+sub decode_up
+{
+    my $len = shift;
+    my $context = shift;
+
+    
+    out_C "  Version";
+    out_V "  NameCRC32";
+    
+    myRead(my $data, $len - 5);
+    
+    out $data, "  UnicodeName", $data;     
+}
+
+sub decode_Xceed_unicode
+{
+    my $len = shift;
+    my $context = shift;
+
+    my $data ;
+    
+    # guess the fields used for this one
+    myRead($data, 4);
+    out $data, "  ID", $data;     
+
+    out_v "  Length";
+    out_v "  Null";
+    
+    myRead($data, $len - 8);
+    
+    out $data, "  UTF16LE Name", decode("UTF16LE", $data);     
+}
+
+
+sub decode_NT_security
+{
+    my $len = shift;
+    my $context = shift;
+    my $inCentralHdr = $context->{InCentralDir} ;
+    
+    out_V "  Uncompressed Size" ;
+    
+    if (! $inCentralHdr) {
+  
+        out_C "  Version" ;
+     
+        out_v "  Type";  
+        
+        out_V "  NameCRC32" ;
+        
+        my $plen = $len - 4 - 1 - 2 - 4;        
+        myRead(my $payload, $plen);
+        out $plen, "  Extra Payload", hexDump($payload);
+    }
+}
+
+sub printAes
+{
+    my $context = shift ;
+
+    my %saltSize = (
+                        1 => 8,
+                        2 => 12,
+                        3 => 16,
+                    );
+
+    myRead(my $salt, $saltSize{$context->{AesStrength} });
+    out $salt, "AES Salt", hexDump($salt);
+    myRead(my $pwv, 2);
+    out $pwv, "AES Pwd Ver", hexDump($pwv);  
+
+    return  $saltSize{$context->{AesStrength}} + 2 + 10;
+}
+
+sub printLzmaProperties
+{
+    my $len = 0;
+
+    my $b1;
+    my $b2;
+    my $buffer;
+
+    myRead($b1, 2);
+    my ($verHi, $verLow) = unpack ("CC", $b1);
+
+    out $b1, "LZMA Version", sprintf("%02X%02X", $verHi, $verLow) . " '$verHi.$verLow'";
+    my $LzmaPropertiesSize = out_v "LZMA Properties Size";
+    $len += 4;
+
+    my $LzmaInfo = out_C "LZMA Info",  sub { $_[0] == 93 ? "(Default)" : ""};
+
+    my $PosStateBits = 0;
+    my $LiteralPosStateBits = 0;
+    my $LiteralContextBits = 0;
+    $PosStateBits = int($LzmaInfo / (9 * 5));
+	$LzmaInfo -= $PosStateBits * 9 * 5;
+	$LiteralPosStateBits = int($LzmaInfo / 9);
+	$LiteralContextBits = $LzmaInfo - $LiteralPosStateBits * 9;
+
+    out1 "  PosStateBits",        $PosStateBits;
+    out1 "  LiteralPosStateBits", $LiteralPosStateBits;
+    out1 "  LiteralContextBits",  $LiteralContextBits;
+    
+    out_V "LZMA Dictionary Size";
+
+    # TODO - assumption that this is 5
+    $len += $LzmaPropertiesSize;
+
+    skip($FH, $LzmaPropertiesSize - 5)
+        if  $LzmaPropertiesSize != 5 ;
+
+    return $len;
+}
+
+sub scanCentralDirectory
+{
+    my $fh = shift;
+
+    my $here = $fh->tell();
+
+    # Use cases
+    # 1 32-bit CD
+    # 2 64-bit CD
+
+    my @CD = ();
+    my $offset = findCentralDirectoryOffset($fh);
+
+    return ()
+        if ! defined $offset;
+
+    $fh->seek($offset, SEEK_SET) ;
+
+    # Now walk the Central Directory Records
+    my $buffer ;
+    while ($fh->read($buffer, 46) == 46  && 
+           unpack("V", $buffer) == ZIP_CENTRAL_HDR_SIG) {
+
+        my $compressedLength   = unpack("V", substr($buffer, 20, 4));
+        my $uncompressedLength = unpack("V", substr($buffer, 24, 4));
+        my $filename_length    = unpack("v", substr($buffer, 28, 2));
+        my $extra_length       = unpack("v", substr($buffer, 30, 2));
+        my $comment_length     = unpack("v", substr($buffer, 32, 2));
+        my $locHeaderOffset    = unpack("V", substr($buffer, 42, 4));
+
+        $START = $locHeaderOffset
+            if ! defined $START;
+
+        skip($fh, $filename_length ) ;
+
+        my $v64 = new U64 $compressedLength ;
+        my $loc64 = new U64 $locHeaderOffset ;
+        my $got = [$loc64, $v64] ;
+
+        if (full32 $compressedLength || full32  $locHeaderOffset) {
+            $fh->read($buffer, $extra_length) ;
+            # TODO - fix this
+            die "xxx $offset $comment_length $filename_length $extra_length" . length($buffer) 
+                if length($buffer) != $extra_length;
+            $got = get64Extra($buffer, full32($uncompressedLength),
+                                 $v64,
+                                 $loc64);
+
+            # If not Zip64 extra field, assume size is 0xFFFFFFFF
+            #$v64 = $got if defined $got;
+        }
+        else {
+            skip($fh, $extra_length) ;
+        }
+
+        skip($fh, $comment_length ) ;
+            
+        push @CD, $got ;
+    }
+
+    $fh->seek($here, SEEK_SET) ;
+
+    @CD = sort { $a->[0]->cmp($b->[0]) } @CD ;
+    return @CD;
+}
+
+sub get64Extra
+{
+    my $buffer = shift;
+    my $is_uncomp = shift ;
+    my $comp = shift ;
+    my $loc = shift ;
+
+    my $extra = findID(0x0001, $buffer);
+                                            
+    if ( defined $extra)
+    {
+        my $offset = 0;
+        $offset += 8 if $is_uncomp;
+        if ($comp->max32()) {
+            $comp = U64::newUnpack_V64(substr($extra,  $offset)) ;
+            $offset += 8;
+        }
+        if ($loc->max32()) {
+            $loc = U64::newUnpack_V64(substr($extra,  $offset)) ;
+        }
+    }    
+
+    return [$loc, $comp] ;
+}
+
+sub offsetFromZip64
+{
+    my $fh = shift ;
+    my $here = shift;
+
+    $fh->seek($here - 20, SEEK_SET) 
+    # TODO - fix this
+        or die "xx $!" ;
+
+    my $buffer;
+    my $got = 0;
+    ($got = $fh->read($buffer, 20)) == 20 
+    # TODO - fix this
+        or die "xxx $here $got $!" ;
+
+    if ( unpack("V", $buffer) == ZIP64_END_CENTRAL_LOC_HDR_SIG ) {
+        my $cd64 = Value_VV64 substr($buffer,  8, 8);
+       
+        $fh->seek($cd64, SEEK_SET) ;
+
+        $fh->read($buffer, 4) == 4
+        # TODO - fix this
+            or die "xxx" ;
+
+        if ( unpack("V", $buffer) == ZIP64_END_CENTRAL_REC_HDR_SIG ) {
+
+            $fh->read($buffer, 8) ==  8
+            # TODO - fix this
+                or die "xxx" ;
+            my $size  = Value_VV64($buffer);
+            $fh->read($buffer, $size) ==  $size
+            # TODO - fix this
+                or die "xxx" ;
+
+            my $cd64 =  Value_VV64 substr($buffer,  36, 8);
+
+            return $cd64 ;
+        }
+        
+        # TODO - fix this
+        die "zzz";
+    }
+
+    # TODO - fix this
+    die "zzz";
+}
+
+use constant Pack_ZIP_END_CENTRAL_HDR_SIG => pack("V", ZIP_END_CENTRAL_HDR_SIG);
+
+sub findCentralDirectoryOffset
+{
+    my $fh = shift ;
+
+    # Most common use-case is where there is no comment, so
+    # know exactly where the end of central directory record
+    # should be.
+
+    $fh->seek(-22, SEEK_END) ;
+    my $here = $fh->tell();
+
+    my $buffer;
+    $fh->read($buffer, 22) == 22 
+    # TODO - fix this
+        or die "xxx" ;
+
+    my $zip64 = 0;                             
+    my $centralDirOffset ;
+    if ( unpack("V", $buffer) == ZIP_END_CENTRAL_HDR_SIG ) {
+        $centralDirOffset = unpack("V", substr($buffer, 16,  4));
+    }
+    else {
+        $fh->seek(0, SEEK_END) ;
+
+        my $fileLen = $fh->tell();
+        my $want = 0 ;
+
+        while(1) {
+            $want += 1024 * 32;
+            my $seekTo = $fileLen - $want;
+            if ($seekTo < 0 ) {
+                $seekTo = 0;
+                $want = $fileLen ;
+            }
+            $fh->seek( $seekTo, SEEK_SET) 
+            # TODO - fix this
+                or die "xxx $!" ;
+            my $got;
+            ($got = $fh->read($buffer, $want)) == $want
+            # TODO - fix this
+                or die "xxx $got  $!" ;
+            my $pos = rindex( $buffer, Pack_ZIP_END_CENTRAL_HDR_SIG);
+
+            if ($pos >= 0 && $want - $pos > 22) {
+                $here = $seekTo + $pos ;
+                $centralDirOffset = unpack("V", substr($buffer, $pos + 16,  4));
+                my $commentLength = unpack("V", substr($buffer, $pos + 20,  2));
+                $commentLength = 0 if ! defined $commentLength ;
+
+                my $expectedEof = $fileLen - $want + $pos + 22 + $commentLength  ;
+                # check for trailing data after end of zip
+                if ($expectedEof < $fileLen ) {
+                    $TRAILING = $expectedEof ;
+                }
+                last ;
+            }
+
+            return undef
+                if $want == $fileLen;
+        }
+    }
+
+    $centralDirOffset = offsetFromZip64($fh, $here)
+        if full32 $centralDirOffset ;
+
+    return $centralDirOffset ;
+}
+
+sub findID
+{
+    my $id_want = shift ;
+    my $data    = shift;
+
+    my $XLEN = length $data ;
+
+    my $offset = 0 ;
+    while ($offset < $XLEN) {
+
+        return undef
+            if $offset + ZIP_EXTRA_SUBFIELD_HEADER_SIZE  > $XLEN ;
+
+        my $id = substr($data, $offset, ZIP_EXTRA_SUBFIELD_ID_SIZE);    
+        $id = unpack("v", $id);
+        $offset += ZIP_EXTRA_SUBFIELD_ID_SIZE;
+
+        my $subLen =  unpack("v", substr($data, $offset,
+                                            ZIP_EXTRA_SUBFIELD_LEN_SIZE));
+        $offset += ZIP_EXTRA_SUBFIELD_LEN_SIZE ;
+
+        return undef
+            if $offset + $subLen > $XLEN ;
+
+        return substr($data, $offset, $subLen)
+            if $id eq $id_want ;
+
+        $offset += $subLen ;
+    }
+        
+    return undef ;
+}
+
+
+sub _dosToUnixTime
+{
+    my $dt = shift;
+
+    my $year = ( ( $dt >> 25 ) & 0x7f ) + 80;
+    my $mon  = ( ( $dt >> 21 ) & 0x0f ) - 1;
+    my $mday = ( ( $dt >> 16 ) & 0x1f );
+
+    my $hour = ( ( $dt >> 11 ) & 0x1f );
+    my $min  = ( ( $dt >> 5 ) & 0x3f );
+    my $sec  = ( ( $dt << 1 ) & 0x3e );
+
+
+    use POSIX 'mktime';
+
+    my $time_t = mktime( $sec, $min, $hour, $mday, $mon, $year, 0, 0, -1 );
+    return 0 if ! defined $time_t;
+    return $time_t;
+}
+
+
+{
+    package U64;
+
+    use constant MAX32 => 0xFFFFFFFF ;
+    use constant HI_1 => MAX32 + 1 ;
+    use constant LOW   => 0 ;
+    use constant HIGH  => 1;
+
+    sub new
+    {
+        my $class = shift ;
+
+        my $high = 0 ;
+        my $low  = 0 ;
+
+        if (@_ == 2) {
+            $high = shift ;
+            $low  = shift ;
+        }
+        elsif (@_ == 1) {
+            $low  = shift ;
+        }
+
+        bless [$low, $high], $class;
+    }
+
+    sub newUnpack_V64
+    {
+        my $string = shift;
+
+        my ($low, $hi) = unpack "V V", $string ;
+        bless [ $low, $hi ], "U64";
+    }
+
+    sub newUnpack_V32
+    {
+        my $string = shift;
+
+        my $low = unpack "V", $string ;
+        bless [ $low, 0 ], "U64";
+    }
+
+    sub reset
+    {
+        my $self = shift;
+        $self->[HIGH] = $self->[LOW] = 0;
+    }
+
+    sub clone
+    {
+        my $self = shift;
+        bless [ @$self ], ref $self ;
+    }
+
+    sub mkU64
+    {
+        my $value = shift;
+
+        return $value
+            if ref $value eq 'U64';
+
+        bless [  $value, 0 ], "U64" ;
+    }
+
+    sub getHigh
+    {
+        my $self = shift;
+        return $self->[HIGH];
+    }
+
+    sub getLow
+    {
+        my $self = shift;
+        return $self->[LOW];
+    }
+
+    sub get32bit
+    {
+        my $self = shift;
+        return $self->[LOW];
+    }
+
+    sub get64bit
+    {
+        my $self = shift;
+        # Not using << here because the result will still be
+        # a 32-bit value on systems where int size is 32-bits
+        return $self->[HIGH] * HI_1 + $self->[LOW];
+    }
+
+    sub add
+    {
+        my $self = shift;
+        my $value = shift;
+
+        if (ref $value eq 'U64') {
+            $self->[HIGH] += $value->[HIGH] ;
+            $value = $value->[LOW];
+        }
+         
+        my $available = MAX32 - $self->[LOW] ;
+
+        if ($value > $available) {
+           ++ $self->[HIGH] ;
+           $self->[LOW] = $value - $available - 1;
+        }
+        else {
+           $self->[LOW] += $value ;
+        }
+
+    }
+
+    sub subtract
+    {
+        my $self = shift;
+        my $value = shift;
+
+        if (ref $value eq 'U64') {
+
+            if ($value->[HIGH]) {
+                die "unsupport subtract option"
+                    if $self->[HIGH] == 0 ||
+                       $value->[HIGH] > $self->[HIGH] ;
+
+               $self->[HIGH] -= $value->[HIGH] ;
+            }
+
+            $value = $value->[LOW] ;
+        }
+
+        if ($value > $self->[LOW]) {
+           -- $self->[HIGH] ;
+           $self->[LOW] = MAX32 - $value + $self->[LOW] + 1;
+        }
+        else {
+           $self->[LOW] -= $value;
+        }
+    }
+
+    sub rshift
+    {
+        my $self = shift;
+        my $count = shift;
+
+        for (1 .. $count)
+        {
+            $self->[LOW] >>= 1;
+            $self->[LOW] |= 0x80000000
+                if $self->[HIGH] & 1 ; 
+            $self->[HIGH] >>= 1;
+        }
+    }
+
+    sub is64bit
+    {
+        my $self = shift;
+        return $self->[HIGH] > 0 ;
+    }
+
+    sub getPacked_V64
+    {
+        my $self = shift;
+
+        return pack "V V", @$self ;
+    }
+
+    sub getPacked_V32
+    {
+        my $self = shift;
+
+        return pack "V", $self->[LOW] ;
+    }
+
+    sub pack_V64
+    {
+        my $low  = shift;
+
+        return pack "V V", $low, 0;
+    }
+
+    sub max32
+    {
+        my $self = shift;
+        return $self->[HIGH] == 0 && $self->[LOW] == MAX32;
+    }
+
+    sub stringify
+    {
+        my $self = shift;
+
+        return "High [$self->[HIGH]], Low [$self->[LOW]]";
+    }
+    
+    sub equal
+    {
+        my $self = shift;
+        my $other = shift;
+
+        return $self->[LOW]  == $other->[LOW] &&
+               $self->[HIGH] == $other->[HIGH] ;
+    }
+
+    sub gt
+    {
+        my $self = shift;
+        my $other = shift;
+
+        return $self->cmp($other) > 0 ;
+    }
+
+    sub cmp
+    {
+        my $self = shift;
+        my $other = shift ;
+
+        if ($self->[LOW] == $other->[LOW]) {
+            return $self->[HIGH] - $other->[HIGH] ;
+        }
+        else {
+            return $self->[LOW] - $other->[LOW] ;
+        }
+    }
+    
+    sub nibbles
+    {
+        my @nibbles = (
+            [ 16 => HI_1 * 0x10000000 ],
+            [ 15 => HI_1 * 0x1000000 ],
+            [ 14 => HI_1 * 0x100000 ],
+            [ 13 => HI_1 * 0x10000 ],
+            [ 12 => HI_1 * 0x1000 ],
+            [ 11 => HI_1 * 0x100 ],
+            [ 10 => HI_1 * 0x10 ],
+            [  9 => HI_1 * 0x1 ],
+
+            [  8 => 0x10000000 ],
+            [  7 => 0x1000000 ],
+            [  6 => 0x100000 ],
+            [  5 => 0x10000 ],
+            [  4 => 0x1000 ],
+            [  3 => 0x100 ],
+            [  2 => 0x10 ],
+            [  1 => 0x1 ],
+        );
+        my $value = shift ;
+
+        for my $pair (@nibbles)
+        {
+            my ($count, $limit) = @{ $pair };
+
+            return $count
+                if $value >= $limit ;
+        }
+
+    }
+}
+
+sub Usage
+{
+    die <<EOM;
+zipdetails [OPTIONS] file
+
+Display details about the internal structure of a Zip file.
+
+This is zipdetails version $VERSION
+
+OPTIONS
+     -h     display help
+     -v     Verbose - output more stuff
+    
+Copyright (c) 2011 Paul Marquess. All rights reserved.
+
+This program is free software; you can redistribute it and/or
+modify it under the same terms as Perl itself.
+EOM
+
+        
+}
+
+__END__
+
+=head1 NAME
+
+zipdetails - display the internal structure of zip files
+
+=head1 SYNOPSIS
+
+    zipdetaile [-v] zipfile.zip
+	zipdetails -h
+
+=head1 DESCRIPTION
+
+Zipdetails displays information about the internal record structure of the
+zip file. It is not concerned with displaying any details of the compressed
+data stored in the zip file.
+
+The program assumes prior understanding of the internal structure of a Zip
+file. You should have a copy of the Zip APPNOTE file at hand to help
+understand the output from this program (L<SEE ALSO> for details).
+
+=head2 OPTIONS
+
+=over 5
+
+=item -v
+
+Enable Verbose mode
+
+=item -h
+
+Display help
+
+=back
+
+
+By default zipdetails will output the details of the zip file in three
+columns.
+
+=over 5
+
+=item Column 1
+
+This contains the offset from the start of the file in hex.
+
+=item Column 2
+
+This contains a textual description of the field.
+
+=item Column 3
+
+If the field contains a numeric value it will be displayed in hex. Zip
+stored most numbers in little-endian format - the value displayed will have
+the little-endian encoding removed.
+
+Next, is an optional description of what the value means.
+
+
+=back
+
+If the C<-v> option is present, column 1 is expanded to include
+
+=over 5
+
+=item *
+
+The offset from the start of the file in hex.
+
+=item *
+
+The length of the filed in hex.
+
+=item *
+
+A hex dump of the bytes in field in the order they are stored in the zip
+file.
+
+=back
+
+
+=head1 TODO 
+
+Error handling is still a work in progress.  If the program encounters a
+problem reading a zip file it is likely to terminate with an unhelpful
+error message. 
+
+
+=head1 SEE ALSO
+
+
+The primary reference for Zip files is the "appnote" document available at
+L<http://www.pkware.com/documents/casestudies/APPNOTE.TXT>.
+
+An alternative reference is the Info-Zip appnote. This is available from
+L<ftp://ftp.info-zip.org/pub/infozip/doc/>
+
+
+The C<zipinfo> program that comes with the info-zip distribution
+(L<http://www.info-zip.org/>) can also display details of the structure of
+a zip file.
+
+See also L<Archive::Zip::SimpleZip>, L<IO::Compress::Zip>,
+L<IO::Uncompress::Unzip>.
+
+
+=head1 AUTHOR
+
+Paul Marquess F<pmqs@cpan.org>.
+
+=head1 COPYRIGHT 
+
+Copyright (c) 2011-2013 Paul Marquess. All rights reserved.
+
+This program is free software; you can redistribute it and/or modify it
+under the same terms as Perl itself. 
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zless b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zless
new file mode 100644
index 00000000..f8fab03f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zless
@@ -0,0 +1,71 @@
+#!/bin/sh
+
+# Copyright (C) 1998, 2002, 2006-2007, 2010-2016 Free Software Foundation, Inc.
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="zless (gzip) 1.7
+Copyright (C) 2007, 2011-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Paul Eggert."
+
+usage="Usage: $0 [OPTION]... [FILE]...
+Like 'less', but operate on the uncompressed contents of any compressed FILEs.
+
+Options are the same as for 'less'.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+case $1 in
+--help)    exec echo "$usage";;
+--version) exec echo "$version";;
+esac
+
+if test "${LESSMETACHARS+set}" != set; then
+  # Work around a bug in less 394 and earlier;
+  # it mishandles the metacharacters '$%=~'.
+  space=' '
+  tab='	'
+  newline='
+'
+  LESSMETACHARS="$space$tab$newline'"';*?"()<>[|&^`#\$%=~'
+  export LESSMETACHARS
+fi
+
+less_version=`less -V` || exit
+case $less_version in
+less' '45[1-9]* | \
+less' '4[6-9][0-9]* | \
+less' '[5-9][0-9][0-9]* | \
+less' '[1-9][0-9][0-9][0-9]*)
+   check_exit_status='|';;
+*) check_exit_status='';;
+esac
+case $less_version in
+less' '429* | \
+less' '4[3-9][0-9]* | \
+less' '[5-9][0-9][0-9]* | \
+less' '[1-9][0-9][0-9][0-9]*)
+   use_input_pipe_on_stdin='-';;
+*) use_input_pipe_on_stdin='';;
+esac
+
+LESSOPEN="|$check_exit_status${use_input_pipe_on_stdin}gzip -cdfq -- %s"
+export LESSOPEN
+
+exec less "$@"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zmore b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zmore
new file mode 100644
index 00000000..6770f80b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/zmore
@@ -0,0 +1,54 @@
+#!/bin/sh
+
+# Copyright (C) 2001-2002, 2007, 2010-2016 Free Software Foundation, Inc.
+# Copyright (C) 1992, 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="zmore (gzip) 1.7
+Copyright (C) 2010-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly."
+
+usage="Usage: $0 [OPTION]... [FILE]...
+Like 'more', but operate on the uncompressed contents of any compressed FILEs.
+
+Report bugs to <bug-gzip@gnu.org>."
+
+case $1 in
+  --h*) exec printf '%s\n' "$usage";;
+  --v*) exec printf '%s\n' "$version";;
+  --) shift;;
+  -?*) printf >&2 '%s\n' "$0: $1: unknown option; try '$0 --help' for help"
+       exit 1;;
+esac
+
+if test $# = 0; then
+    if test -t 0; then
+        printf >&2 '%s\n' "$0: missing operands; try '$0 --help' for help"
+        exit 1
+    fi
+    set -- -
+fi
+
+for FILE
+do
+  test $# -lt 2 ||
+    printf '::::::::::::::\n%s\n::::::::::::::\n' "$FILE" || break
+  gzip -cdfq -- "$FILE"
+done 2>&1 | eval ${PAGER-more}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/znew b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/znew
new file mode 100644
index 00000000..007cfec8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/bin/znew
@@ -0,0 +1,157 @@
+#!/bin/sh
+
+# Copyright (C) 1998, 2002, 2004, 2007, 2010-2016 Free Software Foundation,
+# Inc.
+# Copyright (C) 1993 Jean-loup Gailly
+
+# This program is free software; you can redistribute it and/or modify
+# it under the terms of the GNU General Public License as published by
+# the Free Software Foundation; either version 3 of the License, or
+# (at your option) any later version.
+
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# You should have received a copy of the GNU General Public License along
+# with this program; if not, write to the Free Software Foundation, Inc.,
+# 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
+
+version="znew (gzip) 1.7
+Copyright (C) 2010-2016 Free Software Foundation, Inc.
+This is free software.  You may redistribute copies of it under the terms of
+the GNU General Public License <http://www.gnu.org/licenses/gpl.html>.
+There is NO WARRANTY, to the extent permitted by law.
+
+Written by Jean-loup Gailly."
+
+usage="Usage: $0 [OPTION]... [FILE]...
+Recompress files from .Z (compress) format to .gz (gzip) format.
+
+Options:
+
+  -f     Force recompression even if a .gz file already exists.
+  -t     Test the new files before deleting originals.
+  -v     Verbose; display name and statistics for each file compressed.
+  -9     Use the slowest compression method (optimal compression).
+  -P     Use pipes for the conversion to reduce disk space usage.
+  -K     Keep a .Z file when it is smaller than the .gz file; implies -t.
+      --help     display this help and exit
+      --version  output version information and exit
+
+Report bugs to <bug-gzip@gnu.org>."
+
+check=0
+pipe=0
+opt=
+files=
+keep=0
+res=0
+old=0
+new=0
+block=1024
+# block is the disk block size (best guess, need not be exact)
+
+# Beware -s or --suffix in $GZIP.
+unset GZIP
+ext=.gz
+
+for arg
+do
+  case "$arg" in
+  --help)      exec echo "$usage";;
+  --version)   exec echo "$version";;
+  -*)     opt="$opt $arg"; shift;;
+   *)     break;;
+  esac
+done
+
+if test $# -eq 0; then
+  echo >&2 "$0: invalid number of operands; try \`$0 --help' for help"
+  exit 1
+fi
+
+opt=`echo "$opt" | sed -e 's/ //g' -e 's/-//g'`
+case "$opt" in
+  *t*) check=1; opt=`echo "$opt" | sed 's/t//g'`
+esac
+case "$opt" in
+  *K*) keep=1; check=1; opt=`echo "$opt" | sed 's/K//g'`
+esac
+case "$opt" in
+  *P*) pipe=1; opt=`echo "$opt" | sed 's/P//g'`
+esac
+if test -n "$opt"; then
+  opt="-$opt"
+fi
+
+for i do
+  n=`echo "$i" | sed 's/.Z$//'`
+  if test ! -f "$n.Z" ; then
+    echo "$n.Z not found"
+    res=1; continue
+  fi
+  test $keep -eq 1 && old=`wc -c < "$n.Z"`
+  if test $pipe -eq 1; then
+    if gzip -d < "$n.Z" | gzip $opt > "$n$ext"; then
+      # Copy file attributes from old file to new one, if possible.
+      touch -r"$n.Z" -- "$n$ext" 2>/dev/null
+      chmod --reference="$n.Z" -- "$n$ext" 2>/dev/null
+    else
+      echo "error while recompressing $n.Z"
+      res=1; continue
+    fi
+  else
+    if test $check -eq 1; then
+      if cp -p "$n.Z" "$n.$$"; then
+        :
+      else
+        echo "cannot backup $n.Z"
+        res=1; continue
+      fi
+    fi
+    if gzip -d "$n.Z"; then
+      :
+    else
+      test $check -eq 1 && mv "$n.$$" "$n.Z"
+      echo "error while uncompressing $n.Z"
+      res=1; continue
+    fi
+    if gzip $opt "$n"; then
+      :
+    else
+      if test $check -eq 1; then
+        mv "$n.$$" "$n.Z" && rm -f "$n"
+        echo "error while recompressing $n"
+      else
+        # compress $n  (might be dangerous if disk full)
+        echo "error while recompressing $n, left uncompressed"
+      fi
+      res=1; continue
+    fi
+  fi
+  test $keep -eq 1 && new=`wc -c < "$n$ext"`
+  if test $keep -eq 1 && test `expr \( $old + $block - 1 \) / $block` -lt \
+                              `expr \( $new + $block - 1 \) / $block`; then
+    if test $pipe -eq 1; then
+      rm -f "$n$ext"
+    else
+      mv "$n.$$" "$n.Z" && rm -f "$n$ext"
+    fi
+    echo "$n.Z smaller than $n$ext -- unchanged"
+
+  elif test $check -eq 1; then
+    if gzip -t "$n$ext" ; then
+      rm -f "$n.$$" "$n.Z"
+    else
+      test $pipe -eq 0 && mv "$n.$$" "$n.Z"
+      rm -f "$n$ext"
+      echo "error while testing $n$ext, $n.Z unchanged"
+      res=1; continue
+    fi
+  elif test $pipe -eq 1; then
+    rm -f "$n.Z"
+  fi
+done
+exit $res
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/README b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/README
new file mode 100644
index 00000000..7086a778
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process.  They are
+system-specific, and will not work on any other kind of system.  They
+are also not part of GCC.  The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix.  As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/limits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/limits.h
new file mode 100644
index 00000000..dbefb1df
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/limits.h
@@ -0,0 +1,127 @@
+/* Copyright (C) 1991, 1992, 1993, 1996, 1997, 1998, 1999, 2000, 2001,
+   2002 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _LIMITS_H___
+#define _LIMITS_H___
+
+/* Number of bits in a `char'.  */
+#undef CHAR_BIT
+#define CHAR_BIT __CHAR_BIT__
+
+/* Maximum length of a multibyte character.  */
+#ifndef MB_LEN_MAX
+#define MB_LEN_MAX 1
+#endif
+
+/* Minimum and maximum values a `signed char' can hold.  */
+#undef SCHAR_MIN
+#define SCHAR_MIN (-SCHAR_MAX - 1)
+#undef SCHAR_MAX
+#define SCHAR_MAX __SCHAR_MAX__
+
+/* Maximum value an `unsigned char' can hold.  (Minimum is 0).  */
+#undef UCHAR_MAX
+#if __SCHAR_MAX__ == __INT_MAX__
+# define UCHAR_MAX (SCHAR_MAX * 2U + 1U)
+#else
+# define UCHAR_MAX (SCHAR_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `char' can hold.  */
+#ifdef __CHAR_UNSIGNED__
+# undef CHAR_MIN
+# if __SCHAR_MAX__ == __INT_MAX__
+#  define CHAR_MIN 0U
+# else
+#  define CHAR_MIN 0
+# endif
+# undef CHAR_MAX
+# define CHAR_MAX UCHAR_MAX
+#else
+# undef CHAR_MIN
+# define CHAR_MIN SCHAR_MIN
+# undef CHAR_MAX
+# define CHAR_MAX SCHAR_MAX
+#endif
+
+/* Minimum and maximum values a `signed short int' can hold.  */
+#undef SHRT_MIN
+#define SHRT_MIN (-SHRT_MAX - 1)
+#undef SHRT_MAX
+#define SHRT_MAX __SHRT_MAX__
+
+/* Maximum value an `unsigned short int' can hold.  (Minimum is 0).  */
+#undef USHRT_MAX
+#if __SHRT_MAX__ == __INT_MAX__
+# define USHRT_MAX (SHRT_MAX * 2U + 1U)
+#else
+# define USHRT_MAX (SHRT_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `signed int' can hold.  */
+#undef INT_MIN
+#define INT_MIN (-INT_MAX - 1)
+#undef INT_MAX
+#define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold.  (Minimum is 0).  */
+#undef UINT_MAX
+#define UINT_MAX (INT_MAX * 2U + 1U)
+
+/* Minimum and maximum values a `signed long int' can hold.
+   (Same as `int').  */
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX - 1L)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold.  (Minimum is 0).  */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1UL)
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold.  */
+# undef LLONG_MIN
+# define LLONG_MIN (-LLONG_MAX - 1LL)
+# undef LLONG_MAX
+# define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+# undef ULLONG_MAX
+# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+#endif
+
+#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold.  */
+# undef LONG_LONG_MIN
+# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL)
+# undef LONG_LONG_MAX
+# define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+# undef ULONG_LONG_MAX
+# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL)
+#endif
+
+#endif /* _LIMITS_H___ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/syslimits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/syslimits.h
new file mode 100644
index 00000000..a3628025
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include-fixed/syslimits.h
@@ -0,0 +1,8 @@
+/* syslimits.h stands for the system's own limits.h file.
+   If we can use it ok unmodified, then we install this text.
+   If fixincludes fixes it, then the fixed version is installed
+   instead of this text.  */
+
+#define _GCC_NEXT_LIMITS_H		/* tell gcc's limits.h to recurse */
+#include_next <limits.h>
+#undef _GCC_NEXT_LIMITS_H
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/float.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/float.h
new file mode 100644
index 00000000..9969f1c8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/float.h
@@ -0,0 +1,238 @@
+/* Copyright (C) 2002, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  5.2.4.2.2  Characteristics of floating types <float.h>
+ */
+
+#ifndef _FLOAT_H___
+#define _FLOAT_H___
+
+/* Radix of exponent representation, b. */
+#undef FLT_RADIX
+#define FLT_RADIX	__FLT_RADIX__
+
+/* Number of base-FLT_RADIX digits in the significand, p.  */
+#undef FLT_MANT_DIG
+#undef DBL_MANT_DIG
+#undef LDBL_MANT_DIG
+#define FLT_MANT_DIG	__FLT_MANT_DIG__
+#define DBL_MANT_DIG	__DBL_MANT_DIG__
+#define LDBL_MANT_DIG	__LDBL_MANT_DIG__
+
+/* Number of decimal digits, q, such that any floating-point number with q
+   decimal digits can be rounded into a floating-point number with p radix b
+   digits and back again without change to the q decimal digits,
+
+	p * log10(b)			if b is a power of 10
+	floor((p - 1) * log10(b))	otherwise
+*/
+#undef FLT_DIG
+#undef DBL_DIG
+#undef LDBL_DIG
+#define FLT_DIG		__FLT_DIG__
+#define DBL_DIG		__DBL_DIG__
+#define LDBL_DIG	__LDBL_DIG__
+
+/* Minimum int x such that FLT_RADIX**(x-1) is a normalized float, emin */
+#undef FLT_MIN_EXP
+#undef DBL_MIN_EXP
+#undef LDBL_MIN_EXP
+#define FLT_MIN_EXP	__FLT_MIN_EXP__
+#define DBL_MIN_EXP	__DBL_MIN_EXP__
+#define LDBL_MIN_EXP	__LDBL_MIN_EXP__
+
+/* Minimum negative integer such that 10 raised to that power is in the
+   range of normalized floating-point numbers,
+
+	ceil(log10(b) * (emin - 1))
+*/
+#undef FLT_MIN_10_EXP
+#undef DBL_MIN_10_EXP
+#undef LDBL_MIN_10_EXP
+#define FLT_MIN_10_EXP	__FLT_MIN_10_EXP__
+#define DBL_MIN_10_EXP	__DBL_MIN_10_EXP__
+#define LDBL_MIN_10_EXP	__LDBL_MIN_10_EXP__
+
+/* Maximum int x such that FLT_RADIX**(x-1) is a representable float, emax.  */
+#undef FLT_MAX_EXP
+#undef DBL_MAX_EXP
+#undef LDBL_MAX_EXP
+#define FLT_MAX_EXP	__FLT_MAX_EXP__
+#define DBL_MAX_EXP	__DBL_MAX_EXP__
+#define LDBL_MAX_EXP	__LDBL_MAX_EXP__
+
+/* Maximum integer such that 10 raised to that power is in the range of
+   representable finite floating-point numbers,
+
+	floor(log10((1 - b**-p) * b**emax))
+*/
+#undef FLT_MAX_10_EXP
+#undef DBL_MAX_10_EXP
+#undef LDBL_MAX_10_EXP
+#define FLT_MAX_10_EXP	__FLT_MAX_10_EXP__
+#define DBL_MAX_10_EXP	__DBL_MAX_10_EXP__
+#define LDBL_MAX_10_EXP	__LDBL_MAX_10_EXP__
+
+/* Maximum representable finite floating-point number,
+
+	(1 - b**-p) * b**emax
+*/
+#undef FLT_MAX
+#undef DBL_MAX
+#undef LDBL_MAX
+#define FLT_MAX		__FLT_MAX__
+#define DBL_MAX		__DBL_MAX__
+#define LDBL_MAX	__LDBL_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+   representable in the given floating point type, b**1-p.  */
+#undef FLT_EPSILON
+#undef DBL_EPSILON
+#undef LDBL_EPSILON
+#define FLT_EPSILON	__FLT_EPSILON__
+#define DBL_EPSILON	__DBL_EPSILON__
+#define LDBL_EPSILON	__LDBL_EPSILON__
+
+/* Minimum normalized positive floating-point number, b**(emin - 1).  */
+#undef FLT_MIN
+#undef DBL_MIN
+#undef LDBL_MIN
+#define FLT_MIN		__FLT_MIN__
+#define DBL_MIN		__DBL_MIN__
+#define LDBL_MIN	__LDBL_MIN__
+
+/* Addition rounds to 0: zero, 1: nearest, 2: +inf, 3: -inf, -1: unknown.  */
+/* ??? This is supposed to change with calls to fesetround in <fenv.h>.  */
+#undef FLT_ROUNDS
+#define FLT_ROUNDS 1
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* The floating-point expression evaluation method.
+        -1  indeterminate
+         0  evaluate all operations and constants just to the range and
+            precision of the type
+         1  evaluate operations and constants of type float and double
+            to the range and precision of the double type, evaluate
+            long double operations and constants to the range and
+            precision of the long double type
+         2  evaluate all operations and constants to the range and
+            precision of the long double type
+
+   ??? This ought to change with the setting of the fp control word;
+   the value provided by the compiler assumes the widest setting.  */
+#undef FLT_EVAL_METHOD
+#define FLT_EVAL_METHOD	__FLT_EVAL_METHOD__
+
+/* Number of decimal digits, n, such that any floating-point number in the
+   widest supported floating type with pmax radix b digits can be rounded
+   to a floating-point number with n decimal digits and back again without
+   change to the value,
+
+	pmax * log10(b)			if b is a power of 10
+	ceil(1 + pmax * log10(b))	otherwise
+*/
+#undef DECIMAL_DIG
+#define DECIMAL_DIG	__DECIMAL_DIG__
+
+#endif /* C99 */
+
+#ifdef __STDC_WANT_DEC_FP__
+/* Draft Technical Report 24732, extension for decimal floating-point
+   arithmetic: Characteristic of decimal floating types <float.h>.  */
+
+/* Number of base-FLT_RADIX digits in the significand, p.  */
+#undef DEC32_MANT_DIG
+#undef DEC64_MANT_DIG
+#undef DEC128_MANT_DIG
+#define DEC32_MANT_DIG	__DEC32_MANT_DIG__
+#define DEC64_MANT_DIG	__DEC64_MANT_DIG__
+#define DEC128_MANT_DIG	__DEC128_MANT_DIG__
+
+/* Minimum exponent. */
+#undef DEC32_MIN_EXP
+#undef DEC64_MIN_EXP
+#undef DEC128_MIN_EXP
+#define DEC32_MIN_EXP	__DEC32_MIN_EXP__
+#define DEC64_MIN_EXP	__DEC64_MIN_EXP__
+#define DEC128_MIN_EXP	__DEC128_MIN_EXP__
+
+/* Maximum exponent. */
+#undef DEC32_MAX_EXP
+#undef DEC64_MAX_EXP
+#undef DEC128_MAX_EXP
+#define DEC32_MAX_EXP	__DEC32_MAX_EXP__
+#define DEC64_MAX_EXP	__DEC64_MAX_EXP__
+#define DEC128_MAX_EXP	__DEC128_MAX_EXP__
+
+/* Maximum representable finite decimal floating-point number
+   (there are 6, 15, and 33 9s after the decimal points respectively). */
+#undef DEC32_MAX
+#undef DEC64_MAX
+#undef DEC128_MAX
+#define DEC32_MAX   __DEC32_MAX__
+#define DEC64_MAX   __DEC64_MAX__
+#define DEC128_MAX  __DEC128_MAX__
+
+/* The difference between 1 and the least value greater than 1 that is
+   representable in the given floating point type. */
+#undef DEC32_EPSILON
+#undef DEC64_EPSILON
+#undef DEC128_EPSILON
+#define DEC32_EPSILON	__DEC32_EPSILON__
+#define DEC64_EPSILON	__DEC64_EPSILON__
+#define DEC128_EPSILON	__DEC128_EPSILON__
+
+/* Minimum normalized positive floating-point number. */
+#undef DEC32_MIN
+#undef DEC64_MIN
+#undef DEC128_MIN
+#define DEC32_MIN	__DEC32_MIN__
+#define DEC64_MIN	__DEC64_MIN__
+#define DEC128_MIN	__DEC128_MIN__
+
+/* Minimum subnormal positive floating-point number. */
+#undef DEC32_SUBNORMAL_MIN
+#undef DEC64_SUBNORMAL_MIN
+#undef DEC128_SUBNORMAL_MIN
+#define DEC32_SUBNORMAL_MIN       __DEC32_SUBNORMAL_MIN__
+#define DEC64_SUBNORMAL_MIN       __DEC64_SUBNORMAL_MIN__
+#define DEC128_SUBNORMAL_MIN      __DEC128_SUBNORMAL_MIN__
+
+/* The floating-point expression evaluation method.
+         -1  indeterminate
+         0  evaluate all operations and constants just to the range and
+            precision of the type
+         1  evaluate operations and constants of type _Decimal32 
+	    and _Decimal64 to the range and precision of the _Decimal64 
+            type, evaluate _Decimal128 operations and constants to the 
+	    range and precision of the _Decimal128 type;
+	 2  evaluate all operations and constants to the range and
+	    precision of the _Decimal128 type.  */
+
+#undef DEC_EVAL_METHOD
+#define DEC_EVAL_METHOD	__DEC_EVAL_METHOD__
+
+#endif /* __STDC_WANT_DEC_FP__ */
+
+#endif /* _FLOAT_H___ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/iso646.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/iso646.h
new file mode 100644
index 00000000..28ff9d15
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/iso646.h
@@ -0,0 +1,45 @@
+/* Copyright (C) 1997, 1999, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.9  Alternative spellings  <iso646.h>
+ */
+
+#ifndef _ISO646_H
+#define _ISO646_H
+
+#ifndef __cplusplus
+#define and	&&
+#define and_eq	&=
+#define bitand	&
+#define bitor	|
+#define compl	~
+#define not	!
+#define not_eq	!=
+#define or	||
+#define or_eq	|=
+#define xor	^
+#define xor_eq	^=
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/mmintrin.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/mmintrin.h
new file mode 100644
index 00000000..2cc500de
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/mmintrin.h
@@ -0,0 +1,1254 @@
+/* Copyright (C) 2002, 2003, 2004, 2009 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published
+   by the Free Software Foundation; either version 3, or (at your
+   option) any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+#ifndef _MMINTRIN_H_INCLUDED
+#define _MMINTRIN_H_INCLUDED
+
+/* The data type intended for user use.  */
+typedef unsigned long long __m64, __int64;
+
+/* Internal data types for implementing the intrinsics.  */
+typedef int __v2si __attribute__ ((vector_size (8)));
+typedef short __v4hi __attribute__ ((vector_size (8)));
+typedef char __v8qi __attribute__ ((vector_size (8)));
+
+/* "Convert" __m64 and __int64 into each other.  */
+static __inline __m64 
+_mm_cvtsi64_m64 (__int64 __i)
+{
+  return __i;
+}
+
+static __inline __int64
+_mm_cvtm64_si64 (__m64 __i)
+{
+  return __i;
+}
+
+static __inline int
+_mm_cvtsi64_si32 (__int64 __i)
+{
+  return __i;
+}
+
+static __inline __int64
+_mm_cvtsi32_si64 (int __i)
+{
+  return __i;
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+   the result, and the four 16-bit values from M2 into the upper four 8-bit
+   values of the result, all with signed saturation.  */
+static __inline __m64
+_mm_packs_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 in to the lower two 16-bit values of
+   the result, and the two 32-bit values from M2 into the upper two 16-bit
+   values of the result, all with signed saturation.  */
+static __inline __m64
+_mm_packs_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+   the 64-bit value from M2 into the upper 32-bits of the result, all with
+   signed saturation for values that do not fit exactly into 32-bits.  */
+static __inline __m64
+_mm_packs_pi64 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackdss ((long long)__m1, (long long)__m2);
+}
+
+/* Pack the four 16-bit values from M1 into the lower four 8-bit values of
+   the result, and the four 16-bit values from M2 into the upper four 8-bit
+   values of the result, all with unsigned saturation.  */
+static __inline __m64
+_mm_packs_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Pack the two 32-bit values from M1 into the lower two 16-bit values of
+   the result, and the two 32-bit values from M2 into the upper two 16-bit
+   values of the result, all with unsigned saturation.  */
+static __inline __m64
+_mm_packs_pu32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Copy the 64-bit value from M1 into the lower 32-bits of the result, and
+   the 64-bit value from M2 into the upper 32-bits of the result, all with
+   unsigned saturation for values that do not fit exactly into 32-bits.  */
+static __inline __m64
+_mm_packs_pu64 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wpackdus ((long long)__m1, (long long)__m2);
+}
+
+/* Interleave the four 8-bit values from the high half of M1 with the four
+   8-bit values from the high half of M2.  */
+static __inline __m64
+_mm_unpackhi_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckihb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the high half of M1 with the two
+   16-bit values from the high half of M2.  */
+static __inline __m64
+_mm_unpackhi_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckihh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the high half of M1 with the 32-bit
+   value from the high half of M2.  */
+static __inline __m64
+_mm_unpackhi_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckihw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Interleave the four 8-bit values from the low half of M1 with the four
+   8-bit values from the low half of M2.  */
+static __inline __m64
+_mm_unpacklo_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckilb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Interleave the two 16-bit values from the low half of M1 with the two
+   16-bit values from the low half of M2.  */
+static __inline __m64
+_mm_unpacklo_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckilh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Interleave the 32-bit value from the low half of M1 with the 32-bit
+   value from the low half of M2.  */
+static __inline __m64
+_mm_unpacklo_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wunpckilw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Take the four 8-bit values from the low half of M1, sign extend them,
+   and return the result as a vector of four 16-bit quantities.  */
+static __inline __m64
+_mm_unpackel_pi8 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckelsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, sign extend them,
+   and return the result as a vector of two 32-bit quantities.  */
+static __inline __m64
+_mm_unpackel_pi16 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckelsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it sign extended
+  to 64 bits.  */
+static __inline __m64
+_mm_unpackel_pi32 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckelsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, sign extend them,
+   and return the result as a vector of four 16-bit quantities.  */
+static __inline __m64
+_mm_unpackeh_pi8 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehsb ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, sign extend them,
+   and return the result as a vector of two 32-bit quantities.  */
+static __inline __m64
+_mm_unpackeh_pi16 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehsh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it sign extended
+  to 64 bits.  */
+static __inline __m64
+_mm_unpackeh_pi32 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehsw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the low half of M1, zero extend them,
+   and return the result as a vector of four 16-bit quantities.  */
+static __inline __m64
+_mm_unpackel_pu8 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckelub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the low half of M1, zero extend them,
+   and return the result as a vector of two 32-bit quantities.  */
+static __inline __m64
+_mm_unpackel_pu16 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckeluh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the low half of M1, and return it zero extended
+  to 64 bits.  */
+static __inline __m64
+_mm_unpackel_pu32 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckeluw ((__v2si)__m1);
+}
+
+/* Take the four 8-bit values from the high half of M1, zero extend them,
+   and return the result as a vector of four 16-bit quantities.  */
+static __inline __m64
+_mm_unpackeh_pu8 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehub ((__v8qi)__m1);
+}
+
+/* Take the two 16-bit values from the high half of M1, zero extend them,
+   and return the result as a vector of two 32-bit quantities.  */
+static __inline __m64
+_mm_unpackeh_pu16 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehuh ((__v4hi)__m1);
+}
+
+/* Take the 32-bit value from the high half of M1, and return it zero extended
+  to 64 bits.  */
+static __inline __m64
+_mm_unpackeh_pu32 (__m64 __m1)
+{
+  return (__m64) __builtin_arm_wunpckehuw ((__v2si)__m1);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2.  */
+static __inline __m64
+_mm_add_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2.  */
+static __inline __m64
+_mm_add_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2.  */
+static __inline __m64
+_mm_add_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using signed
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using signed
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using signed
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Add the 8-bit values in M1 to the 8-bit values in M2 using unsigned
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pu8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Add the 16-bit values in M1 to the 16-bit values in M2 using unsigned
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Add the 32-bit values in M1 to the 32-bit values in M2 using unsigned
+   saturated arithmetic.  */
+static __inline __m64
+_mm_adds_pu32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_waddwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1.  */
+static __inline __m64
+_mm_sub_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1.  */
+static __inline __m64
+_mm_sub_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1.  */
+static __inline __m64
+_mm_sub_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using signed
+   saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubbss ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+   signed saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubhss ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+   signed saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubwss ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Subtract the 8-bit values in M2 from the 8-bit values in M1 using
+   unsigned saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pu8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubbus ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Subtract the 16-bit values in M2 from the 16-bit values in M1 using
+   unsigned saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubhus ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Subtract the 32-bit values in M2 from the 32-bit values in M1 using
+   unsigned saturating arithmetic.  */
+static __inline __m64
+_mm_subs_pu32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wsubwus ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+   four 32-bit intermediate results, which are then summed by pairs to
+   produce two 32-bit results.  */
+static __inline __m64
+_mm_madd_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wmadds ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 producing
+   four 32-bit intermediate results, which are then summed by pairs to
+   produce two 32-bit results.  */
+static __inline __m64
+_mm_madd_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wmaddu ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+   M2 and produce the high 16 bits of the 32-bit results.  */
+static __inline __m64
+_mm_mulhi_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wmulsm ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four signed 16-bit values in M1 by four signed 16-bit values in
+   M2 and produce the high 16 bits of the 32-bit results.  */
+static __inline __m64
+_mm_mulhi_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wmulum ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Multiply four 16-bit values in M1 by four 16-bit values in M2 and produce
+   the low 16 bits of the results.  */
+static __inline __m64
+_mm_mullo_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wmulul ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Shift four 16-bit values in M left by COUNT.  */
+static __inline __m64
+_mm_sll_pi16 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsllh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi16 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsllhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M left by COUNT.  */
+static __inline __m64
+_mm_sll_pi32 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsllw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_slli_pi32 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsllwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT.  */
+static __inline __m64
+_mm_sll_si64 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wslld (__m, __count);
+}
+
+static __inline __m64
+_mm_slli_si64 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wslldi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in the sign bit.  */
+static __inline __m64
+_mm_sra_pi16 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsrah ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi16 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsrahi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in the sign bit.  */
+static __inline __m64
+_mm_sra_pi32 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsraw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srai_pi32 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsrawi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M right by COUNT; shift in the sign bit.  */
+static __inline __m64
+_mm_sra_si64 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsrad (__m, __count);
+}
+
+static __inline __m64
+_mm_srai_si64 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsradi (__m, __count);
+}
+
+/* Shift four 16-bit values in M right by COUNT; shift in zeros.  */
+static __inline __m64
+_mm_srl_pi16 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsrlh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi16 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsrlhi ((__v4hi)__m, __count);
+}
+
+/* Shift two 32-bit values in M right by COUNT; shift in zeros.  */
+static __inline __m64
+_mm_srl_pi32 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsrlw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_srli_pi32 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsrlwi ((__v2si)__m, __count);
+}
+
+/* Shift the 64-bit value in M left by COUNT; shift in zeros.  */
+static __inline __m64
+_mm_srl_si64 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wsrld (__m, __count);
+}
+
+static __inline __m64
+_mm_srli_si64 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wsrldi (__m, __count);
+}
+
+/* Rotate four 16-bit values in M right by COUNT.  */
+static __inline __m64
+_mm_ror_pi16 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wrorh ((__v4hi)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi16 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wrorhi ((__v4hi)__m, __count);
+}
+
+/* Rotate two 32-bit values in M right by COUNT.  */
+static __inline __m64
+_mm_ror_pi32 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wrorw ((__v2si)__m, __count);
+}
+
+static __inline __m64
+_mm_rori_pi32 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wrorwi ((__v2si)__m, __count);
+}
+
+/* Rotate two 64-bit values in M right by COUNT.  */
+static __inline __m64
+_mm_ror_si64 (__m64 __m, __m64 __count)
+{
+  return (__m64) __builtin_arm_wrord (__m, __count);
+}
+
+static __inline __m64
+_mm_rori_si64 (__m64 __m, int __count)
+{
+  return (__m64) __builtin_arm_wrordi (__m, __count);
+}
+
+/* Bit-wise AND the 64-bit values in M1 and M2.  */
+static __inline __m64
+_mm_and_si64 (__m64 __m1, __m64 __m2)
+{
+  return __builtin_arm_wand (__m1, __m2);
+}
+
+/* Bit-wise complement the 64-bit value in M1 and bit-wise AND it with the
+   64-bit value in M2.  */
+static __inline __m64
+_mm_andnot_si64 (__m64 __m1, __m64 __m2)
+{
+  return __builtin_arm_wandn (__m1, __m2);
+}
+
+/* Bit-wise inclusive OR the 64-bit values in M1 and M2.  */
+static __inline __m64
+_mm_or_si64 (__m64 __m1, __m64 __m2)
+{
+  return __builtin_arm_wor (__m1, __m2);
+}
+
+/* Bit-wise exclusive OR the 64-bit values in M1 and M2.  */
+static __inline __m64
+_mm_xor_si64 (__m64 __m1, __m64 __m2)
+{
+  return __builtin_arm_wxor (__m1, __m2);
+}
+
+/* Compare eight 8-bit values.  The result of the comparison is 0xFF if the
+   test is true and zero if false.  */
+static __inline __m64
+_mm_cmpeq_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpeqb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtsb ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu8 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtub ((__v8qi)__m1, (__v8qi)__m2);
+}
+
+/* Compare four 16-bit values.  The result of the comparison is 0xFFFF if
+   the test is true and zero if false.  */
+static __inline __m64
+_mm_cmpeq_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpeqh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtsh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu16 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtuh ((__v4hi)__m1, (__v4hi)__m2);
+}
+
+/* Compare two 32-bit values.  The result of the comparison is 0xFFFFFFFF if
+   the test is true and zero if false.  */
+static __inline __m64
+_mm_cmpeq_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpeqw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pi32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtsw ((__v2si)__m1, (__v2si)__m2);
+}
+
+static __inline __m64
+_mm_cmpgt_pu32 (__m64 __m1, __m64 __m2)
+{
+  return (__m64) __builtin_arm_wcmpgtuw ((__v2si)__m1, (__v2si)__m2);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+   by accumulate across all elements and __A.  */
+static __inline __m64
+_mm_mac_pu16 (__m64 __A, __m64 __B, __m64 __C)
+{
+  return __builtin_arm_wmacu (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+   by accumulate across all elements and __A.  */
+static __inline __m64
+_mm_mac_pi16 (__m64 __A, __m64 __B, __m64 __C)
+{
+  return __builtin_arm_wmacs (__A, (__v4hi)__B, (__v4hi)__C);
+}
+
+/* Element-wise multiplication of unsigned 16-bit values __B and __C, followed
+   by accumulate across all elements.  */
+static __inline __m64
+_mm_macz_pu16 (__m64 __A, __m64 __B)
+{
+  return __builtin_arm_wmacuz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Element-wise multiplication of signed 16-bit values __B and __C, followed
+   by accumulate across all elements.  */
+static __inline __m64
+_mm_macz_pi16 (__m64 __A, __m64 __B)
+{
+  return __builtin_arm_wmacsz ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Accumulate across all unsigned 8-bit values in __A.  */
+static __inline __m64
+_mm_acc_pu8 (__m64 __A)
+{
+  return __builtin_arm_waccb ((__v8qi)__A);
+}
+
+/* Accumulate across all unsigned 16-bit values in __A.  */
+static __inline __m64
+_mm_acc_pu16 (__m64 __A)
+{
+  return __builtin_arm_wacch ((__v4hi)__A);
+}
+
+/* Accumulate across all unsigned 32-bit values in __A.  */
+static __inline __m64
+_mm_acc_pu32 (__m64 __A)
+{
+  return __builtin_arm_waccw ((__v2si)__A);
+}
+
+static __inline __m64
+_mm_mia_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmia (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miaph_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmiaph (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabb_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmiabb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miabt_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmiabt (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatb_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmiatb (__A, __B, __C);
+}
+
+static __inline __m64
+_mm_miatt_si64 (__m64 __A, int __B, int __C)
+{
+  return __builtin_arm_tmiatt (__A, __B, __C);
+}
+
+/* Extract one of the elements of A and sign extend.  The selector N must
+   be immediate.  */
+#define _mm_extract_pi8(A, N) __builtin_arm_textrmsb ((__v8qi)(A), (N))
+#define _mm_extract_pi16(A, N) __builtin_arm_textrmsh ((__v4hi)(A), (N))
+#define _mm_extract_pi32(A, N) __builtin_arm_textrmsw ((__v2si)(A), (N))
+
+/* Extract one of the elements of A and zero extend.  The selector N must
+   be immediate.  */
+#define _mm_extract_pu8(A, N) __builtin_arm_textrmub ((__v8qi)(A), (N))
+#define _mm_extract_pu16(A, N) __builtin_arm_textrmuh ((__v4hi)(A), (N))
+#define _mm_extract_pu32(A, N) __builtin_arm_textrmuw ((__v2si)(A), (N))
+
+/* Inserts word D into one of the elements of A.  The selector N must be
+   immediate.  */
+#define _mm_insert_pi8(A, D, N) \
+  ((__m64) __builtin_arm_tinsrb ((__v8qi)(A), (D), (N)))
+#define _mm_insert_pi16(A, D, N) \
+  ((__m64) __builtin_arm_tinsrh ((__v4hi)(A), (D), (N)))
+#define _mm_insert_pi32(A, D, N) \
+  ((__m64) __builtin_arm_tinsrw ((__v2si)(A), (D), (N)))
+
+/* Compute the element-wise maximum of signed 8-bit values.  */
+static __inline __m64
+_mm_max_pi8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of signed 16-bit values.  */
+static __inline __m64
+_mm_max_pi16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of signed 32-bit values.  */
+static __inline __m64
+_mm_max_pi32 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 8-bit values.  */
+static __inline __m64
+_mm_max_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 16-bit values.  */
+static __inline __m64
+_mm_max_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise maximum of unsigned 32-bit values.  */
+static __inline __m64
+_mm_max_pu32 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wmaxuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values.  */
+static __inline __m64
+_mm_min_pi8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminsb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of signed 16-bit values.  */
+static __inline __m64
+_mm_min_pi16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminsh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of signed 32-bit values.  */
+static __inline __m64
+_mm_min_pi32 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminsw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values.  */
+static __inline __m64
+_mm_min_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminub ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 16-bit values.  */
+static __inline __m64
+_mm_min_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminuh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the element-wise minimum of unsigned 32-bit values.  */
+static __inline __m64
+_mm_min_pu32 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wminuw ((__v2si)__A, (__v2si)__B);
+}
+
+/* Create an 8-bit mask of the signs of 8-bit values.  */
+static __inline int
+_mm_movemask_pi8 (__m64 __A)
+{
+  return __builtin_arm_tmovmskb ((__v8qi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 16-bit values.  */
+static __inline int
+_mm_movemask_pi16 (__m64 __A)
+{
+  return __builtin_arm_tmovmskh ((__v4hi)__A);
+}
+
+/* Create an 8-bit mask of the signs of 32-bit values.  */
+static __inline int
+_mm_movemask_pi32 (__m64 __A)
+{
+  return __builtin_arm_tmovmskw ((__v2si)__A);
+}
+
+/* Return a combination of the four 16-bit values in A.  The selector
+   must be an immediate.  */
+#define _mm_shuffle_pi16(A, N) \
+  ((__m64) __builtin_arm_wshufh ((__v4hi)(A), (N)))
+
+
+/* Compute the rounded averages of the unsigned 8-bit values in A and B.  */
+static __inline __m64
+_mm_avg_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wavg2br ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the rounded averages of the unsigned 16-bit values in A and B.  */
+static __inline __m64
+_mm_avg_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wavg2hr ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the averages of the unsigned 8-bit values in A and B.  */
+static __inline __m64
+_mm_avg2_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wavg2b ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the averages of the unsigned 16-bit values in A and B.  */
+static __inline __m64
+_mm_avg2_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wavg2h ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+   values in A and B.  Return the value in the lower 16-bit word; the
+   upper words are cleared.  */
+static __inline __m64
+_mm_sad_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wsadb ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+   values in A and B.  Return the value in the lower 32-bit word; the
+   upper words are cleared.  */
+static __inline __m64
+_mm_sad_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wsadh ((__v4hi)__A, (__v4hi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 8-bit
+   values in A and B.  Return the value in the lower 16-bit word; the
+   upper words are cleared.  */
+static __inline __m64
+_mm_sadz_pu8 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wsadbz ((__v8qi)__A, (__v8qi)__B);
+}
+
+/* Compute the sum of the absolute differences of the unsigned 16-bit
+   values in A and B.  Return the value in the lower 32-bit word; the
+   upper words are cleared.  */
+static __inline __m64
+_mm_sadz_pu16 (__m64 __A, __m64 __B)
+{
+  return (__m64) __builtin_arm_wsadhz ((__v4hi)__A, (__v4hi)__B);
+}
+
+static __inline __m64
+_mm_align_si64 (__m64 __A, __m64 __B, int __C)
+{
+  return (__m64) __builtin_arm_walign ((__v8qi)__A, (__v8qi)__B, __C);
+}
+
+/* Creates a 64-bit zero.  */
+static __inline __m64
+_mm_setzero_si64 (void)
+{
+  return __builtin_arm_wzero ();
+}
+
+/* Set and Get arbitrary iWMMXt Control registers.
+   Note only registers 0-3 and 8-11 are currently defined,
+   the rest are reserved.  */
+
+static __inline void
+_mm_setwcx (const int __value, const int __regno)
+{
+  switch (__regno)
+    {
+    case 0:  __builtin_arm_setwcx (__value, 0); break;
+    case 1:  __builtin_arm_setwcx (__value, 1); break;
+    case 2:  __builtin_arm_setwcx (__value, 2); break;
+    case 3:  __builtin_arm_setwcx (__value, 3); break;
+    case 8:  __builtin_arm_setwcx (__value, 8); break;
+    case 9:  __builtin_arm_setwcx (__value, 9); break;
+    case 10: __builtin_arm_setwcx (__value, 10); break;
+    case 11: __builtin_arm_setwcx (__value, 11); break;
+    default: break;
+    }
+}
+
+static __inline int
+_mm_getwcx (const int __regno)
+{
+  switch (__regno)
+    {
+    case 0:  return __builtin_arm_getwcx (0);
+    case 1:  return __builtin_arm_getwcx (1);
+    case 2:  return __builtin_arm_getwcx (2);
+    case 3:  return __builtin_arm_getwcx (3);
+    case 8:  return __builtin_arm_getwcx (8);
+    case 9:  return __builtin_arm_getwcx (9);
+    case 10: return __builtin_arm_getwcx (10);
+    case 11: return __builtin_arm_getwcx (11);
+    default: return 0;
+    }
+}
+
+/* Creates a vector of two 32-bit values; I0 is least significant.  */
+static __inline __m64
+_mm_set_pi32 (int __i1, int __i0)
+{
+  union {
+    __m64 __q;
+    struct {
+      unsigned int __i0;
+      unsigned int __i1;
+    } __s;
+  } __u;
+
+  __u.__s.__i0 = __i0;
+  __u.__s.__i1 = __i1;
+
+  return __u.__q;
+}
+
+/* Creates a vector of four 16-bit values; W0 is least significant.  */
+static __inline __m64
+_mm_set_pi16 (short __w3, short __w2, short __w1, short __w0)
+{
+  unsigned int __i1 = (unsigned short)__w3 << 16 | (unsigned short)__w2;
+  unsigned int __i0 = (unsigned short)__w1 << 16 | (unsigned short)__w0;
+  return _mm_set_pi32 (__i1, __i0);
+		       
+}
+
+/* Creates a vector of eight 8-bit values; B0 is least significant.  */
+static __inline __m64
+_mm_set_pi8 (char __b7, char __b6, char __b5, char __b4,
+	     char __b3, char __b2, char __b1, char __b0)
+{
+  unsigned int __i1, __i0;
+
+  __i1 = (unsigned char)__b7;
+  __i1 = __i1 << 8 | (unsigned char)__b6;
+  __i1 = __i1 << 8 | (unsigned char)__b5;
+  __i1 = __i1 << 8 | (unsigned char)__b4;
+
+  __i0 = (unsigned char)__b3;
+  __i0 = __i0 << 8 | (unsigned char)__b2;
+  __i0 = __i0 << 8 | (unsigned char)__b1;
+  __i0 = __i0 << 8 | (unsigned char)__b0;
+
+  return _mm_set_pi32 (__i1, __i0);
+}
+
+/* Similar, but with the arguments in reverse order.  */
+static __inline __m64
+_mm_setr_pi32 (int __i0, int __i1)
+{
+  return _mm_set_pi32 (__i1, __i0);
+}
+
+static __inline __m64
+_mm_setr_pi16 (short __w0, short __w1, short __w2, short __w3)
+{
+  return _mm_set_pi16 (__w3, __w2, __w1, __w0);
+}
+
+static __inline __m64
+_mm_setr_pi8 (char __b0, char __b1, char __b2, char __b3,
+	      char __b4, char __b5, char __b6, char __b7)
+{
+  return _mm_set_pi8 (__b7, __b6, __b5, __b4, __b3, __b2, __b1, __b0);
+}
+
+/* Creates a vector of two 32-bit values, both elements containing I.  */
+static __inline __m64
+_mm_set1_pi32 (int __i)
+{
+  return _mm_set_pi32 (__i, __i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing W.  */
+static __inline __m64
+_mm_set1_pi16 (short __w)
+{
+  unsigned int __i = (unsigned short)__w << 16 | (unsigned short)__w;
+  return _mm_set1_pi32 (__i);
+}
+
+/* Creates a vector of four 16-bit values, all elements containing B.  */
+static __inline __m64
+_mm_set1_pi8 (char __b)
+{
+  unsigned int __w = (unsigned char)__b << 8 | (unsigned char)__b;
+  unsigned int __i = __w << 16 | __w;
+  return _mm_set1_pi32 (__i);
+}
+
+/* Convert an integer to a __m64 object.  */
+static __inline __m64
+_m_from_int (int __a)
+{
+  return (__m64)__a;
+}
+
+#define _m_packsswb _mm_packs_pi16
+#define _m_packssdw _mm_packs_pi32
+#define _m_packuswb _mm_packs_pu16
+#define _m_packusdw _mm_packs_pu32
+#define _m_packssqd _mm_packs_pi64
+#define _m_packusqd _mm_packs_pu64
+#define _mm_packs_si64 _mm_packs_pi64
+#define _mm_packs_su64 _mm_packs_pu64
+#define _m_punpckhbw _mm_unpackhi_pi8
+#define _m_punpckhwd _mm_unpackhi_pi16
+#define _m_punpckhdq _mm_unpackhi_pi32
+#define _m_punpcklbw _mm_unpacklo_pi8
+#define _m_punpcklwd _mm_unpacklo_pi16
+#define _m_punpckldq _mm_unpacklo_pi32
+#define _m_punpckehsbw _mm_unpackeh_pi8
+#define _m_punpckehswd _mm_unpackeh_pi16
+#define _m_punpckehsdq _mm_unpackeh_pi32
+#define _m_punpckehubw _mm_unpackeh_pu8
+#define _m_punpckehuwd _mm_unpackeh_pu16
+#define _m_punpckehudq _mm_unpackeh_pu32
+#define _m_punpckelsbw _mm_unpackel_pi8
+#define _m_punpckelswd _mm_unpackel_pi16
+#define _m_punpckelsdq _mm_unpackel_pi32
+#define _m_punpckelubw _mm_unpackel_pu8
+#define _m_punpckeluwd _mm_unpackel_pu16
+#define _m_punpckeludq _mm_unpackel_pu32
+#define _m_paddb _mm_add_pi8
+#define _m_paddw _mm_add_pi16
+#define _m_paddd _mm_add_pi32
+#define _m_paddsb _mm_adds_pi8
+#define _m_paddsw _mm_adds_pi16
+#define _m_paddsd _mm_adds_pi32
+#define _m_paddusb _mm_adds_pu8
+#define _m_paddusw _mm_adds_pu16
+#define _m_paddusd _mm_adds_pu32
+#define _m_psubb _mm_sub_pi8
+#define _m_psubw _mm_sub_pi16
+#define _m_psubd _mm_sub_pi32
+#define _m_psubsb _mm_subs_pi8
+#define _m_psubsw _mm_subs_pi16
+#define _m_psubuw _mm_subs_pi32
+#define _m_psubusb _mm_subs_pu8
+#define _m_psubusw _mm_subs_pu16
+#define _m_psubusd _mm_subs_pu32
+#define _m_pmaddwd _mm_madd_pi16
+#define _m_pmadduwd _mm_madd_pu16
+#define _m_pmulhw _mm_mulhi_pi16
+#define _m_pmulhuw _mm_mulhi_pu16
+#define _m_pmullw _mm_mullo_pi16
+#define _m_pmacsw _mm_mac_pi16
+#define _m_pmacuw _mm_mac_pu16
+#define _m_pmacszw _mm_macz_pi16
+#define _m_pmacuzw _mm_macz_pu16
+#define _m_paccb _mm_acc_pu8
+#define _m_paccw _mm_acc_pu16
+#define _m_paccd _mm_acc_pu32
+#define _m_pmia _mm_mia_si64
+#define _m_pmiaph _mm_miaph_si64
+#define _m_pmiabb _mm_miabb_si64
+#define _m_pmiabt _mm_miabt_si64
+#define _m_pmiatb _mm_miatb_si64
+#define _m_pmiatt _mm_miatt_si64
+#define _m_psllw _mm_sll_pi16
+#define _m_psllwi _mm_slli_pi16
+#define _m_pslld _mm_sll_pi32
+#define _m_pslldi _mm_slli_pi32
+#define _m_psllq _mm_sll_si64
+#define _m_psllqi _mm_slli_si64
+#define _m_psraw _mm_sra_pi16
+#define _m_psrawi _mm_srai_pi16
+#define _m_psrad _mm_sra_pi32
+#define _m_psradi _mm_srai_pi32
+#define _m_psraq _mm_sra_si64
+#define _m_psraqi _mm_srai_si64
+#define _m_psrlw _mm_srl_pi16
+#define _m_psrlwi _mm_srli_pi16
+#define _m_psrld _mm_srl_pi32
+#define _m_psrldi _mm_srli_pi32
+#define _m_psrlq _mm_srl_si64
+#define _m_psrlqi _mm_srli_si64
+#define _m_prorw _mm_ror_pi16
+#define _m_prorwi _mm_rori_pi16
+#define _m_prord _mm_ror_pi32
+#define _m_prordi _mm_rori_pi32
+#define _m_prorq _mm_ror_si64
+#define _m_prorqi _mm_rori_si64
+#define _m_pand _mm_and_si64
+#define _m_pandn _mm_andnot_si64
+#define _m_por _mm_or_si64
+#define _m_pxor _mm_xor_si64
+#define _m_pcmpeqb _mm_cmpeq_pi8
+#define _m_pcmpeqw _mm_cmpeq_pi16
+#define _m_pcmpeqd _mm_cmpeq_pi32
+#define _m_pcmpgtb _mm_cmpgt_pi8
+#define _m_pcmpgtub _mm_cmpgt_pu8
+#define _m_pcmpgtw _mm_cmpgt_pi16
+#define _m_pcmpgtuw _mm_cmpgt_pu16
+#define _m_pcmpgtd _mm_cmpgt_pi32
+#define _m_pcmpgtud _mm_cmpgt_pu32
+#define _m_pextrb _mm_extract_pi8
+#define _m_pextrw _mm_extract_pi16
+#define _m_pextrd _mm_extract_pi32
+#define _m_pextrub _mm_extract_pu8
+#define _m_pextruw _mm_extract_pu16
+#define _m_pextrud _mm_extract_pu32
+#define _m_pinsrb _mm_insert_pi8
+#define _m_pinsrw _mm_insert_pi16
+#define _m_pinsrd _mm_insert_pi32
+#define _m_pmaxsb _mm_max_pi8
+#define _m_pmaxsw _mm_max_pi16
+#define _m_pmaxsd _mm_max_pi32
+#define _m_pmaxub _mm_max_pu8
+#define _m_pmaxuw _mm_max_pu16
+#define _m_pmaxud _mm_max_pu32
+#define _m_pminsb _mm_min_pi8
+#define _m_pminsw _mm_min_pi16
+#define _m_pminsd _mm_min_pi32
+#define _m_pminub _mm_min_pu8
+#define _m_pminuw _mm_min_pu16
+#define _m_pminud _mm_min_pu32
+#define _m_pmovmskb _mm_movemask_pi8
+#define _m_pmovmskw _mm_movemask_pi16
+#define _m_pmovmskd _mm_movemask_pi32
+#define _m_pshufw _mm_shuffle_pi16
+#define _m_pavgb _mm_avg_pu8
+#define _m_pavgw _mm_avg_pu16
+#define _m_pavg2b _mm_avg2_pu8
+#define _m_pavg2w _mm_avg2_pu16
+#define _m_psadbw _mm_sad_pu8
+#define _m_psadwd _mm_sad_pu16
+#define _m_psadzbw _mm_sadz_pu8
+#define _m_psadzwd _mm_sadz_pu16
+#define _m_paligniq _mm_align_si64
+#define _m_cvt_si2pi _mm_cvtsi64_m64
+#define _m_cvt_pi2si _mm_cvtm64_si64
+
+#endif /* _MMINTRIN_H_INCLUDED */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdarg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdarg.h
new file mode 100644
index 00000000..54dc2e7f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdarg.h
@@ -0,0 +1,130 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.15  Variable arguments  <stdarg.h>
+ */
+
+#ifndef _STDARG_H
+#ifndef _ANSI_STDARG_H_
+#ifndef __need___va_list
+#define _STDARG_H
+#define _ANSI_STDARG_H_
+#endif /* not __need___va_list */
+#undef __need___va_list
+
+/* Define __gnuc_va_list.  */
+
+#ifndef __GNUC_VA_LIST
+#define __GNUC_VA_LIST
+typedef __builtin_va_list __gnuc_va_list;
+#endif
+
+/* Define the standard macros for the user,
+   if this invocation was from the user program.  */
+#ifdef _STDARG_H
+
+#define va_start(v,l)	__builtin_va_start(v,l)
+#define va_end(v)	__builtin_va_end(v)
+#define va_arg(v,l)	__builtin_va_arg(v,l)
+#if !defined(__STRICT_ANSI__) || __STDC_VERSION__ + 0 >= 199900L || defined(__GXX_EXPERIMENTAL_CXX0X__)
+#define va_copy(d,s)	__builtin_va_copy(d,s)
+#endif
+#define __va_copy(d,s)	__builtin_va_copy(d,s)
+
+/* Define va_list, if desired, from __gnuc_va_list. */
+/* We deliberately do not define va_list when called from
+   stdio.h, because ANSI C says that stdio.h is not supposed to define
+   va_list.  stdio.h needs to have access to that data type, 
+   but must not use that name.  It should use the name __gnuc_va_list,
+   which is safe because it is reserved for the implementation.  */
+
+#ifdef _HIDDEN_VA_LIST  /* On OSF1, this means varargs.h is "half-loaded".  */
+#undef _VA_LIST
+#endif
+
+#ifdef _BSD_VA_LIST
+#undef _BSD_VA_LIST
+#endif
+
+#if defined(__svr4__) || (defined(_SCO_DS) && !defined(__VA_LIST))
+/* SVR4.2 uses _VA_LIST for an internal alias for va_list,
+   so we must avoid testing it and setting it here.
+   SVR4 uses _VA_LIST as a flag in stdarg.h, but we should
+   have no conflict with that.  */
+#ifndef _VA_LIST_
+#define _VA_LIST_
+#ifdef __i860__
+#ifndef _VA_LIST
+#define _VA_LIST va_list
+#endif
+#endif /* __i860__ */
+typedef __gnuc_va_list va_list;
+#ifdef _SCO_DS
+#define __VA_LIST
+#endif
+#endif /* _VA_LIST_ */
+#else /* not __svr4__ || _SCO_DS */
+
+/* The macro _VA_LIST_ is the same thing used by this file in Ultrix.
+   But on BSD NET2 we must not test or define or undef it.
+   (Note that the comments in NET 2's ansi.h
+   are incorrect for _VA_LIST_--see stdio.h!)  */
+#if !defined (_VA_LIST_) || defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__) || defined(WINNT)
+/* The macro _VA_LIST_DEFINED is used in Windows NT 3.5  */
+#ifndef _VA_LIST_DEFINED
+/* The macro _VA_LIST is used in SCO Unix 3.2.  */
+#ifndef _VA_LIST
+/* The macro _VA_LIST_T_H is used in the Bull dpx2  */
+#ifndef _VA_LIST_T_H
+/* The macro __va_list__ is used by BeOS.  */
+#ifndef __va_list__
+typedef __gnuc_va_list va_list;
+#endif /* not __va_list__ */
+#endif /* not _VA_LIST_T_H */
+#endif /* not _VA_LIST */
+#endif /* not _VA_LIST_DEFINED */
+#if !(defined (__BSD_NET2__) || defined (____386BSD____) || defined (__bsdi__) || defined (__sequent__) || defined (__FreeBSD__))
+#define _VA_LIST_
+#endif
+#ifndef _VA_LIST
+#define _VA_LIST
+#endif
+#ifndef _VA_LIST_DEFINED
+#define _VA_LIST_DEFINED
+#endif
+#ifndef _VA_LIST_T_H
+#define _VA_LIST_T_H
+#endif
+#ifndef __va_list__
+#define __va_list__
+#endif
+
+#endif /* not _VA_LIST_, except on certain systems */
+
+#endif /* not __svr4__ */
+
+#endif /* _STDARG_H */
+
+#endif /* not _ANSI_STDARG_H_ */
+#endif /* not _STDARG_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdbool.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdbool.h
new file mode 100644
index 00000000..4ed911f9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdbool.h
@@ -0,0 +1,50 @@
+/* Copyright (C) 1998, 1999, 2000, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.16  Boolean type and values  <stdbool.h>
+ */
+
+#ifndef _STDBOOL_H
+#define _STDBOOL_H
+
+#ifndef __cplusplus
+
+#define bool	_Bool
+#define true	1
+#define false	0
+
+#else /* __cplusplus */
+
+/* Supporting <stdbool.h> in C++ is a GCC extension.  */
+#define _Bool	bool
+#define bool	bool
+#define false	false
+#define true	true
+
+#endif /* __cplusplus */
+
+/* Signal that all the definitions are present.  */
+#define __bool_true_false_are_defined	1
+
+#endif	/* stdbool.h */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stddef.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stddef.h
new file mode 100644
index 00000000..89e5b2ec
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stddef.h
@@ -0,0 +1,416 @@
+/* Copyright (C) 1989, 1997, 1998, 1999, 2000, 2002, 2004, 2009
+   Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.17  Common definitions  <stddef.h>
+ */
+#if (!defined(_STDDEF_H) && !defined(_STDDEF_H_) && !defined(_ANSI_STDDEF_H) \
+     && !defined(__STDDEF_H__)) \
+    || defined(__need_wchar_t) || defined(__need_size_t) \
+    || defined(__need_ptrdiff_t) || defined(__need_NULL) \
+    || defined(__need_wint_t)
+
+/* Any one of these symbols __need_* means that GNU libc
+   wants us just to define one data type.  So don't define
+   the symbols that indicate this file's entire job has been done.  */
+#if (!defined(__need_wchar_t) && !defined(__need_size_t)	\
+     && !defined(__need_ptrdiff_t) && !defined(__need_NULL)	\
+     && !defined(__need_wint_t))
+#define _STDDEF_H
+#define _STDDEF_H_
+/* snaroff@next.com says the NeXT needs this.  */
+#define _ANSI_STDDEF_H
+/* Irix 5.1 needs this.  */
+#define __STDDEF_H__
+#endif
+
+#ifndef __sys_stdtypes_h
+/* This avoids lossage on SunOS but only if stdtypes.h comes first.
+   There's no way to win with the other order!  Sun lossage.  */
+
+/* On 4.3bsd-net2, make sure ansi.h is included, so we have
+   one less case to deal with in the following.  */
+#if defined (__BSD_NET2__) || defined (____386BSD____) || (defined (__FreeBSD__) && (__FreeBSD__ < 5)) || defined(__NetBSD__)
+#include <machine/ansi.h>
+#endif
+/* On FreeBSD 5, machine/ansi.h does not exist anymore... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#include <sys/_types.h>
+#endif
+
+/* In 4.3bsd-net2, machine/ansi.h defines these symbols, which are
+   defined if the corresponding type is *not* defined.
+   FreeBSD-2.1 defines _MACHINE_ANSI_H_ instead of _ANSI_H_ */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+#if !defined(_SIZE_T_) && !defined(_BSD_SIZE_T_)
+#define _SIZE_T
+#endif
+#if !defined(_PTRDIFF_T_) && !defined(_BSD_PTRDIFF_T_)
+#define _PTRDIFF_T
+#endif
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+   instead of _WCHAR_T_. */
+#if !defined(_WCHAR_T_) && !defined(_BSD_WCHAR_T_)
+#ifndef _BSD_WCHAR_T_
+#define _WCHAR_T
+#endif
+#endif
+/* Undef _FOO_T_ if we are supposed to define foo_t.  */
+#if defined (__need_ptrdiff_t) || defined (_STDDEF_H_)
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#if defined (__need_size_t) || defined (_STDDEF_H_)
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#if defined (__need_wchar_t) || defined (_STDDEF_H_)
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_) */
+
+/* Sequent's header files use _PTRDIFF_T_ in some conflicting way.
+   Just ignore it.  */
+#if defined (__sequent__) && defined (_PTRDIFF_T_)
+#undef _PTRDIFF_T_
+#endif
+
+/* On VxWorks, <type/vxTypesBase.h> may have defined macros like
+   _TYPE_size_t which will typedef size_t.  fixincludes patched the
+   vxTypesBase.h so that this macro is only defined if _GCC_SIZE_T is
+   not defined, and so that defining this macro defines _GCC_SIZE_T.
+   If we find that the macros are still defined at this point, we must
+   invoke them so that the type is defined as expected.  */
+#if defined (_TYPE_ptrdiff_t) && (defined (__need_ptrdiff_t) || defined (_STDDEF_H_))
+_TYPE_ptrdiff_t;
+#undef _TYPE_ptrdiff_t
+#endif
+#if defined (_TYPE_size_t) && (defined (__need_size_t) || defined (_STDDEF_H_))
+_TYPE_size_t;
+#undef _TYPE_size_t
+#endif
+#if defined (_TYPE_wchar_t) && (defined (__need_wchar_t) || defined (_STDDEF_H_))
+_TYPE_wchar_t;
+#undef _TYPE_wchar_t
+#endif
+
+/* In case nobody has defined these types, but we aren't running under
+   GCC 2.00, make sure that __PTRDIFF_TYPE__, __SIZE_TYPE__, and
+   __WCHAR_TYPE__ have reasonable values.  This can happen if the
+   parts of GCC is compiled by an older compiler, that actually
+   include gstddef.h, such as collect2.  */
+
+/* Signed type of difference of two pointers.  */
+
+/* Define this type if we are doing the whole job,
+   or if we want this type in particular.  */
+#if defined (_STDDEF_H) || defined (__need_ptrdiff_t)
+#ifndef _PTRDIFF_T	/* in case <sys/types.h> has defined it. */
+#ifndef _T_PTRDIFF_
+#ifndef _T_PTRDIFF
+#ifndef __PTRDIFF_T
+#ifndef _PTRDIFF_T_
+#ifndef _BSD_PTRDIFF_T_
+#ifndef ___int_ptrdiff_t_h
+#ifndef _GCC_PTRDIFF_T
+#define _PTRDIFF_T
+#define _T_PTRDIFF_
+#define _T_PTRDIFF
+#define __PTRDIFF_T
+#define _PTRDIFF_T_
+#define _BSD_PTRDIFF_T_
+#define ___int_ptrdiff_t_h
+#define _GCC_PTRDIFF_T
+#ifndef __PTRDIFF_TYPE__
+#define __PTRDIFF_TYPE__ long int
+#endif
+typedef __PTRDIFF_TYPE__ ptrdiff_t;
+#endif /* _GCC_PTRDIFF_T */
+#endif /* ___int_ptrdiff_t_h */
+#endif /* _BSD_PTRDIFF_T_ */
+#endif /* _PTRDIFF_T_ */
+#endif /* __PTRDIFF_T */
+#endif /* _T_PTRDIFF */
+#endif /* _T_PTRDIFF_ */
+#endif /* _PTRDIFF_T */
+
+/* If this symbol has done its job, get rid of it.  */
+#undef	__need_ptrdiff_t
+
+#endif /* _STDDEF_H or __need_ptrdiff_t.  */
+
+/* Unsigned type of `sizeof' something.  */
+
+/* Define this type if we are doing the whole job,
+   or if we want this type in particular.  */
+#if defined (_STDDEF_H) || defined (__need_size_t)
+#ifndef __size_t__	/* BeOS */
+#ifndef __SIZE_T__	/* Cray Unicos/Mk */
+#ifndef _SIZE_T	/* in case <sys/types.h> has defined it. */
+#ifndef _SYS_SIZE_T_H
+#ifndef _T_SIZE_
+#ifndef _T_SIZE
+#ifndef __SIZE_T
+#ifndef _SIZE_T_
+#ifndef _BSD_SIZE_T_
+#ifndef _SIZE_T_DEFINED_
+#ifndef _SIZE_T_DEFINED
+#ifndef _BSD_SIZE_T_DEFINED_	/* Darwin */
+#ifndef _SIZE_T_DECLARED	/* FreeBSD 5 */
+#ifndef ___int_size_t_h
+#ifndef _GCC_SIZE_T
+#ifndef _SIZET_
+#ifndef __size_t
+#define __size_t__	/* BeOS */
+#define __SIZE_T__	/* Cray Unicos/Mk */
+#define _SIZE_T
+#define _SYS_SIZE_T_H
+#define _T_SIZE_
+#define _T_SIZE
+#define __SIZE_T
+#define _SIZE_T_
+#define _BSD_SIZE_T_
+#define _SIZE_T_DEFINED_
+#define _SIZE_T_DEFINED
+#define _BSD_SIZE_T_DEFINED_	/* Darwin */
+#define _SIZE_T_DECLARED	/* FreeBSD 5 */
+#define ___int_size_t_h
+#define _GCC_SIZE_T
+#define _SIZET_
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+/* __size_t is a typedef on FreeBSD 5!, must not trash it. */
+#else
+#define __size_t
+#endif
+#ifndef __SIZE_TYPE__
+#define __SIZE_TYPE__ long unsigned int
+#endif
+#if !(defined (__GNUG__) && defined (size_t))
+typedef __SIZE_TYPE__ size_t;
+#ifdef __BEOS__
+typedef long ssize_t;
+#endif /* __BEOS__ */
+#endif /* !(defined (__GNUG__) && defined (size_t)) */
+#endif /* __size_t */
+#endif /* _SIZET_ */
+#endif /* _GCC_SIZE_T */
+#endif /* ___int_size_t_h */
+#endif /* _SIZE_T_DECLARED */
+#endif /* _BSD_SIZE_T_DEFINED_ */
+#endif /* _SIZE_T_DEFINED */
+#endif /* _SIZE_T_DEFINED_ */
+#endif /* _BSD_SIZE_T_ */
+#endif /* _SIZE_T_ */
+#endif /* __SIZE_T */
+#endif /* _T_SIZE */
+#endif /* _T_SIZE_ */
+#endif /* _SYS_SIZE_T_H */
+#endif /* _SIZE_T */
+#endif /* __SIZE_T__ */
+#endif /* __size_t__ */
+#undef	__need_size_t
+#endif /* _STDDEF_H or __need_size_t.  */
+
+
+/* Wide character type.
+   Locale-writers should change this as necessary to
+   be big enough to hold unique values not between 0 and 127,
+   and not (wchar_t) -1, for each defined multibyte character.  */
+
+/* Define this type if we are doing the whole job,
+   or if we want this type in particular.  */
+#if defined (_STDDEF_H) || defined (__need_wchar_t)
+#ifndef __wchar_t__	/* BeOS */
+#ifndef __WCHAR_T__	/* Cray Unicos/Mk */
+#ifndef _WCHAR_T
+#ifndef _T_WCHAR_
+#ifndef _T_WCHAR
+#ifndef __WCHAR_T
+#ifndef _WCHAR_T_
+#ifndef _BSD_WCHAR_T_
+#ifndef _BSD_WCHAR_T_DEFINED_    /* Darwin */
+#ifndef _BSD_RUNE_T_DEFINED_	/* Darwin */
+#ifndef _WCHAR_T_DECLARED /* FreeBSD 5 */
+#ifndef _WCHAR_T_DEFINED_
+#ifndef _WCHAR_T_DEFINED
+#ifndef _WCHAR_T_H
+#ifndef ___int_wchar_t_h
+#ifndef __INT_WCHAR_T_H
+#ifndef _GCC_WCHAR_T
+#define __wchar_t__	/* BeOS */
+#define __WCHAR_T__	/* Cray Unicos/Mk */
+#define _WCHAR_T
+#define _T_WCHAR_
+#define _T_WCHAR
+#define __WCHAR_T
+#define _WCHAR_T_
+#define _BSD_WCHAR_T_
+#define _WCHAR_T_DEFINED_
+#define _WCHAR_T_DEFINED
+#define _WCHAR_T_H
+#define ___int_wchar_t_h
+#define __INT_WCHAR_T_H
+#define _GCC_WCHAR_T
+#define _WCHAR_T_DECLARED
+
+/* On BSD/386 1.1, at least, machine/ansi.h defines _BSD_WCHAR_T_
+   instead of _WCHAR_T_, and _BSD_RUNE_T_ (which, unlike the other
+   symbols in the _FOO_T_ family, stays defined even after its
+   corresponding type is defined).  If we define wchar_t, then we
+   must undef _WCHAR_T_; for BSD/386 1.1 (and perhaps others), if
+   we undef _WCHAR_T_, then we must also define rune_t, since 
+   headers like runetype.h assume that if machine/ansi.h is included,
+   and _BSD_WCHAR_T_ is not defined, then rune_t is available.
+   machine/ansi.h says, "Note that _WCHAR_T_ and _RUNE_T_ must be of
+   the same type." */
+#ifdef _BSD_WCHAR_T_
+#undef _BSD_WCHAR_T_
+#ifdef _BSD_RUNE_T_
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+typedef _BSD_RUNE_T_ rune_t;
+#define _BSD_WCHAR_T_DEFINED_
+#define _BSD_RUNE_T_DEFINED_	/* Darwin */
+#if defined (__FreeBSD__) && (__FreeBSD__ < 5)
+/* Why is this file so hard to maintain properly?  In contrast to
+   the comment above regarding BSD/386 1.1, on FreeBSD for as long
+   as the symbol has existed, _BSD_RUNE_T_ must not stay defined or
+   redundant typedefs will occur when stdlib.h is included after this file. */
+#undef _BSD_RUNE_T_
+#endif
+#endif
+#endif
+#endif
+/* FreeBSD 5 can't be handled well using "traditional" logic above
+   since it no longer defines _BSD_RUNE_T_ yet still desires to export
+   rune_t in some cases... */
+#if defined (__FreeBSD__) && (__FreeBSD__ >= 5)
+#if !defined (_ANSI_SOURCE) && !defined (_POSIX_SOURCE)
+#if __BSD_VISIBLE
+#ifndef _RUNE_T_DECLARED
+typedef __rune_t        rune_t;
+#define _RUNE_T_DECLARED
+#endif
+#endif
+#endif
+#endif
+
+#ifndef __WCHAR_TYPE__
+#define __WCHAR_TYPE__ int
+#endif
+#ifndef __cplusplus
+typedef __WCHAR_TYPE__ wchar_t;
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* _WCHAR_T_DECLARED */
+#endif /* _BSD_RUNE_T_DEFINED_ */
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif
+#endif /* __WCHAR_T__ */
+#endif /* __wchar_t__ */
+#undef	__need_wchar_t
+#endif /* _STDDEF_H or __need_wchar_t.  */
+
+#if defined (__need_wint_t)
+#ifndef _WINT_T
+#define _WINT_T
+
+#ifndef __WINT_TYPE__
+#define __WINT_TYPE__ unsigned int
+#endif
+typedef __WINT_TYPE__ wint_t;
+#endif
+#undef __need_wint_t
+#endif
+
+/*  In 4.3bsd-net2, leave these undefined to indicate that size_t, etc.
+    are already defined.  */
+/*  BSD/OS 3.1 and FreeBSD [23].x require the MACHINE_ANSI_H check here.  */
+#if defined(_ANSI_H_) || defined(_MACHINE_ANSI_H_)
+/*  The references to _GCC_PTRDIFF_T_, _GCC_SIZE_T_, and _GCC_WCHAR_T_
+    are probably typos and should be removed before 2.8 is released.  */
+#ifdef _GCC_PTRDIFF_T_
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T_
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T_
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+/*  The following ones are the real ones.  */
+#ifdef _GCC_PTRDIFF_T
+#undef _PTRDIFF_T_
+#undef _BSD_PTRDIFF_T_
+#endif
+#ifdef _GCC_SIZE_T
+#undef _SIZE_T_
+#undef _BSD_SIZE_T_
+#endif
+#ifdef _GCC_WCHAR_T
+#undef _WCHAR_T_
+#undef _BSD_WCHAR_T_
+#endif
+#endif /* _ANSI_H_ || _MACHINE_ANSI_H_ */
+
+#endif /* __sys_stdtypes_h */
+
+/* A null pointer constant.  */
+
+#if defined (_STDDEF_H) || defined (__need_NULL)
+#undef NULL		/* in case <stdio.h> has defined it. */
+#ifdef __GNUG__
+#define NULL __null
+#else   /* G++ */
+#ifndef __cplusplus
+#define NULL ((void *)0)
+#else   /* C++ */
+#define NULL 0
+#endif  /* C++ */
+#endif  /* G++ */
+#endif	/* NULL not defined and <stddef.h> or need NULL.  */
+#undef	__need_NULL
+
+#ifdef _STDDEF_H
+
+/* Offset of member MEMBER in a struct of type TYPE. */
+#define offsetof(TYPE, MEMBER) __builtin_offsetof (TYPE, MEMBER)
+
+#endif /* _STDDEF_H was defined this time */
+
+#endif /* !_STDDEF_H && !_STDDEF_H_ && !_ANSI_STDDEF_H && !__STDDEF_H__
+	  || __need_XXX was not defined before */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdfix.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdfix.h
new file mode 100644
index 00000000..3c3ec00a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdfix.h
@@ -0,0 +1,204 @@
+/* Copyright (C) 2007, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/* ISO/IEC JTC1 SC22 WG14 N1169
+ * Date: 2006-04-04
+ * ISO/IEC TR 18037
+ * Programming languages - C - Extensions to support embedded processors
+ */
+
+#ifndef _STDFIX_H
+#define _STDFIX_H
+
+/* 7.18a.1 Introduction.  */
+
+#undef fract
+#undef accum
+#undef sat
+#define fract		_Fract
+#define accum		_Accum
+#define sat		_Sat
+
+/* 7.18a.3 Precision macros.  */
+
+#undef SFRACT_FBIT
+#undef SFRACT_MIN
+#undef SFRACT_MAX
+#undef SFRACT_EPSILON
+#define SFRACT_FBIT	__SFRACT_FBIT__
+#define SFRACT_MIN	__SFRACT_MIN__
+#define SFRACT_MAX	__SFRACT_MAX__
+#define SFRACT_EPSILON	__SFRACT_EPSILON__
+
+#undef USFRACT_FBIT
+#undef USFRACT_MIN
+#undef USFRACT_MAX
+#undef USFRACT_EPSILON
+#define USFRACT_FBIT	__USFRACT_FBIT__
+#define USFRACT_MIN	__USFRACT_MIN__		/* GCC extension.  */
+#define USFRACT_MAX	__USFRACT_MAX__
+#define USFRACT_EPSILON	__USFRACT_EPSILON__
+
+#undef FRACT_FBIT
+#undef FRACT_MIN
+#undef FRACT_MAX
+#undef FRACT_EPSILON
+#define FRACT_FBIT	__FRACT_FBIT__
+#define FRACT_MIN	__FRACT_MIN__
+#define FRACT_MAX	__FRACT_MAX__
+#define FRACT_EPSILON	__FRACT_EPSILON__
+
+#undef UFRACT_FBIT
+#undef UFRACT_MIN
+#undef UFRACT_MAX
+#undef UFRACT_EPSILON
+#define UFRACT_FBIT	__UFRACT_FBIT__
+#define UFRACT_MIN	__UFRACT_MIN__		/* GCC extension.  */
+#define UFRACT_MAX	__UFRACT_MAX__
+#define UFRACT_EPSILON	__UFRACT_EPSILON__
+
+#undef LFRACT_FBIT
+#undef LFRACT_MIN
+#undef LFRACT_MAX
+#undef LFRACT_EPSILON
+#define LFRACT_FBIT	__LFRACT_FBIT__
+#define LFRACT_MIN	__LFRACT_MIN__
+#define LFRACT_MAX	__LFRACT_MAX__
+#define LFRACT_EPSILON	__LFRACT_EPSILON__
+
+#undef ULFRACT_FBIT
+#undef ULFRACT_MIN
+#undef ULFRACT_MAX
+#undef ULFRACT_EPSILON
+#define ULFRACT_FBIT	__ULFRACT_FBIT__
+#define ULFRACT_MIN	__ULFRACT_MIN__		/* GCC extension.  */
+#define ULFRACT_MAX	__ULFRACT_MAX__
+#define ULFRACT_EPSILON	__ULFRACT_EPSILON__
+
+#undef LLFRACT_FBIT
+#undef LLFRACT_MIN
+#undef LLFRACT_MAX
+#undef LLFRACT_EPSILON
+#define LLFRACT_FBIT	__LLFRACT_FBIT__	/* GCC extension.  */
+#define LLFRACT_MIN	__LLFRACT_MIN__		/* GCC extension.  */
+#define LLFRACT_MAX	__LLFRACT_MAX__		/* GCC extension.  */
+#define LLFRACT_EPSILON	__LLFRACT_EPSILON__	/* GCC extension.  */
+
+#undef ULLFRACT_FBIT
+#undef ULLFRACT_MIN
+#undef ULLFRACT_MAX
+#undef ULLFRACT_EPSILON
+#define ULLFRACT_FBIT	__ULLFRACT_FBIT__	/* GCC extension.  */
+#define ULLFRACT_MIN	__ULLFRACT_MIN__	/* GCC extension.  */
+#define ULLFRACT_MAX	__ULLFRACT_MAX__	/* GCC extension.  */
+#define ULLFRACT_EPSILON	__ULLFRACT_EPSILON__	/* GCC extension.  */
+
+#undef SACCUM_FBIT
+#undef SACCUM_IBIT
+#undef SACCUM_MIN
+#undef SACCUM_MAX
+#undef SACCUM_EPSILON
+#define SACCUM_FBIT	__SACCUM_FBIT__
+#define SACCUM_IBIT	__SACCUM_IBIT__
+#define SACCUM_MIN	__SACCUM_MIN__
+#define SACCUM_MAX	__SACCUM_MAX__
+#define SACCUM_EPSILON	__SACCUM_EPSILON__
+
+#undef USACCUM_FBIT
+#undef USACCUM_IBIT
+#undef USACCUM_MIN
+#undef USACCUM_MAX
+#undef USACCUM_EPSILON
+#define USACCUM_FBIT	__USACCUM_FBIT__
+#define USACCUM_IBIT	__USACCUM_IBIT__
+#define USACCUM_MIN	__USACCUM_MIN__		/* GCC extension.  */
+#define USACCUM_MAX	__USACCUM_MAX__
+#define USACCUM_EPSILON	__USACCUM_EPSILON__
+
+#undef ACCUM_FBIT
+#undef ACCUM_IBIT
+#undef ACCUM_MIN
+#undef ACCUM_MAX
+#undef ACCUM_EPSILON
+#define ACCUM_FBIT	__ACCUM_FBIT__
+#define ACCUM_IBIT	__ACCUM_IBIT__
+#define ACCUM_MIN	__ACCUM_MIN__
+#define ACCUM_MAX	__ACCUM_MAX__
+#define ACCUM_EPSILON	__ACCUM_EPSILON__
+
+#undef UACCUM_FBIT
+#undef UACCUM_IBIT
+#undef UACCUM_MIN
+#undef UACCUM_MAX
+#undef UACCUM_EPSILON
+#define UACCUM_FBIT	__UACCUM_FBIT__
+#define UACCUM_IBIT	__UACCUM_IBIT__
+#define UACCUM_MIN	__UACCUM_MIN__		/* GCC extension.  */
+#define UACCUM_MAX	__UACCUM_MAX__
+#define UACCUM_EPSILON	__UACCUM_EPSILON__
+
+#undef LACCUM_FBIT
+#undef LACCUM_IBIT
+#undef LACCUM_MIN
+#undef LACCUM_MAX
+#undef LACCUM_EPSILON
+#define LACCUM_FBIT	__LACCUM_FBIT__
+#define LACCUM_IBIT	__LACCUM_IBIT__
+#define LACCUM_MIN	__LACCUM_MIN__
+#define LACCUM_MAX	__LACCUM_MAX__
+#define LACCUM_EPSILON	__LACCUM_EPSILON__
+
+#undef ULACCUM_FBIT
+#undef ULACCUM_IBIT
+#undef ULACCUM_MIN
+#undef ULACCUM_MAX
+#undef ULACCUM_EPSILON
+#define ULACCUM_FBIT	__ULACCUM_FBIT__
+#define ULACCUM_IBIT	__ULACCUM_IBIT__
+#define ULACCUM_MIN	__ULACCUM_MIN__		/* GCC extension.  */
+#define ULACCUM_MAX	__ULACCUM_MAX__
+#define ULACCUM_EPSILON	__ULACCUM_EPSILON__
+
+#undef LLACCUM_FBIT
+#undef LLACCUM_IBIT
+#undef LLACCUM_MIN
+#undef LLACCUM_MAX
+#undef LLACCUM_EPSILON
+#define LLACCUM_FBIT	__LLACCUM_FBIT__	/* GCC extension.  */
+#define LLACCUM_IBIT	__LLACCUM_IBIT__	/* GCC extension.  */
+#define LLACCUM_MIN	__LLACCUM_MIN__		/* GCC extension.  */
+#define LLACCUM_MAX	__LLACCUM_MAX__		/* GCC extension.  */
+#define LLACCUM_EPSILON	__LLACCUM_EPSILON__	/* GCC extension.  */
+
+#undef ULLACCUM_FBIT
+#undef ULLACCUM_IBIT
+#undef ULLACCUM_MIN
+#undef ULLACCUM_MAX
+#undef ULLACCUM_EPSILON
+#define ULLACCUM_FBIT	__ULLACCUM_FBIT__	/* GCC extension.  */
+#define ULLACCUM_IBIT	__ULLACCUM_IBIT__	/* GCC extension.  */
+#define ULLACCUM_MIN	__ULLACCUM_MIN__	/* GCC extension.  */
+#define ULLACCUM_MAX	__ULLACCUM_MAX__	/* GCC extension.  */
+#define ULLACCUM_EPSILON	__ULLACCUM_EPSILON__	/* GCC extension.  */
+
+#endif /* _STDFIX_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint-gcc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint-gcc.h
new file mode 100644
index 00000000..22780a15
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint-gcc.h
@@ -0,0 +1,259 @@
+/* Copyright (C) 2008, 2009 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.18  Integer types  <stdint.h>
+ */
+
+#ifndef _GCC_STDINT_H
+#define _GCC_STDINT_H
+
+/* 7.8.1.1 Exact-width integer types */
+
+#ifdef __INT8_TYPE__
+typedef __INT8_TYPE__ int8_t;
+#endif
+#ifdef __INT16_TYPE__
+typedef __INT16_TYPE__ int16_t;
+#endif
+#ifdef __INT32_TYPE__
+typedef __INT32_TYPE__ int32_t;
+#endif
+#ifdef __INT64_TYPE__
+typedef __INT64_TYPE__ int64_t;
+#endif
+#ifdef __UINT8_TYPE__
+typedef __UINT8_TYPE__ uint8_t;
+#endif
+#ifdef __UINT16_TYPE__
+typedef __UINT16_TYPE__ uint16_t;
+#endif
+#ifdef __UINT32_TYPE__
+typedef __UINT32_TYPE__ uint32_t;
+#endif
+#ifdef __UINT64_TYPE__
+typedef __UINT64_TYPE__ uint64_t;
+#endif
+
+/* 7.8.1.2 Minimum-width integer types */
+
+typedef __INT_LEAST8_TYPE__ int_least8_t;
+typedef __INT_LEAST16_TYPE__ int_least16_t;
+typedef __INT_LEAST32_TYPE__ int_least32_t;
+typedef __INT_LEAST64_TYPE__ int_least64_t;
+typedef __UINT_LEAST8_TYPE__ uint_least8_t;
+typedef __UINT_LEAST16_TYPE__ uint_least16_t;
+typedef __UINT_LEAST32_TYPE__ uint_least32_t;
+typedef __UINT_LEAST64_TYPE__ uint_least64_t;
+
+/* 7.8.1.3 Fastest minimum-width integer types */
+
+typedef __INT_FAST8_TYPE__ int_fast8_t;
+typedef __INT_FAST16_TYPE__ int_fast16_t;
+typedef __INT_FAST32_TYPE__ int_fast32_t;
+typedef __INT_FAST64_TYPE__ int_fast64_t;
+typedef __UINT_FAST8_TYPE__ uint_fast8_t;
+typedef __UINT_FAST16_TYPE__ uint_fast16_t;
+typedef __UINT_FAST32_TYPE__ uint_fast32_t;
+typedef __UINT_FAST64_TYPE__ uint_fast64_t;
+
+/* 7.8.1.4 Integer types capable of holding object pointers */
+
+#ifdef __INTPTR_TYPE__
+typedef __INTPTR_TYPE__ intptr_t;
+#endif
+#ifdef __UINTPTR_TYPE__
+typedef __UINTPTR_TYPE__ uintptr_t;
+#endif
+
+/* 7.8.1.5 Greatest-width integer types */
+
+typedef __INTMAX_TYPE__ intmax_t;
+typedef __UINTMAX_TYPE__ uintmax_t;
+
+#if !defined __cplusplus || defined __STDC_LIMIT_MACROS
+
+/* 7.18.2 Limits of specified-width integer types */
+
+#ifdef __INT8_MAX__
+# undef INT8_MAX
+# define INT8_MAX __INT8_MAX__
+# undef INT8_MIN
+# define INT8_MIN (-INT8_MAX - 1)
+#endif
+#ifdef __UINT8_MAX__
+# undef UINT8_MAX
+# define UINT8_MAX __UINT8_MAX__
+#endif
+#ifdef __INT16_MAX__
+# undef INT16_MAX
+# define INT16_MAX __INT16_MAX__
+# undef INT16_MIN
+# define INT16_MIN (-INT16_MAX - 1)
+#endif
+#ifdef __UINT16_MAX__
+# undef UINT16_MAX
+# define UINT16_MAX __UINT16_MAX__
+#endif
+#ifdef __INT32_MAX__
+# undef INT32_MAX
+# define INT32_MAX __INT32_MAX__
+# undef INT32_MIN
+# define INT32_MIN (-INT32_MAX - 1)
+#endif
+#ifdef __UINT32_MAX__
+# undef UINT32_MAX
+# define UINT32_MAX __UINT32_MAX__
+#endif
+#ifdef __INT64_MAX__
+# undef INT64_MAX
+# define INT64_MAX __INT64_MAX__
+# undef INT64_MIN
+# define INT64_MIN (-INT64_MAX - 1)
+#endif
+#ifdef __UINT64_MAX__
+# undef UINT64_MAX
+# define UINT64_MAX __UINT64_MAX__
+#endif
+
+#undef INT_LEAST8_MAX
+#define INT_LEAST8_MAX __INT_LEAST8_MAX__
+#undef INT_LEAST8_MIN
+#define INT_LEAST8_MIN (-INT_LEAST8_MAX - 1)
+#undef UINT_LEAST8_MAX
+#define UINT_LEAST8_MAX __UINT_LEAST8_MAX__
+#undef INT_LEAST16_MAX
+#define INT_LEAST16_MAX __INT_LEAST16_MAX__
+#undef INT_LEAST16_MIN
+#define INT_LEAST16_MIN (-INT_LEAST16_MAX - 1)
+#undef UINT_LEAST16_MAX
+#define UINT_LEAST16_MAX __UINT_LEAST16_MAX__
+#undef INT_LEAST32_MAX
+#define INT_LEAST32_MAX __INT_LEAST32_MAX__
+#undef INT_LEAST32_MIN
+#define INT_LEAST32_MIN (-INT_LEAST32_MAX - 1)
+#undef UINT_LEAST32_MAX
+#define UINT_LEAST32_MAX __UINT_LEAST32_MAX__
+#undef INT_LEAST64_MAX
+#define INT_LEAST64_MAX __INT_LEAST64_MAX__
+#undef INT_LEAST64_MIN
+#define INT_LEAST64_MIN (-INT_LEAST64_MAX - 1)
+#undef UINT_LEAST64_MAX
+#define UINT_LEAST64_MAX __UINT_LEAST64_MAX__
+
+#undef INT_FAST8_MAX
+#define INT_FAST8_MAX __INT_FAST8_MAX__
+#undef INT_FAST8_MIN
+#define INT_FAST8_MIN (-INT_FAST8_MAX - 1)
+#undef UINT_FAST8_MAX
+#define UINT_FAST8_MAX __UINT_FAST8_MAX__
+#undef INT_FAST16_MAX
+#define INT_FAST16_MAX __INT_FAST16_MAX__
+#undef INT_FAST16_MIN
+#define INT_FAST16_MIN (-INT_FAST16_MAX - 1)
+#undef UINT_FAST16_MAX
+#define UINT_FAST16_MAX __UINT_FAST16_MAX__
+#undef INT_FAST32_MAX
+#define INT_FAST32_MAX __INT_FAST32_MAX__
+#undef INT_FAST32_MIN
+#define INT_FAST32_MIN (-INT_FAST32_MAX - 1)
+#undef UINT_FAST32_MAX
+#define UINT_FAST32_MAX __UINT_FAST32_MAX__
+#undef INT_FAST64_MAX
+#define INT_FAST64_MAX __INT_FAST64_MAX__
+#undef INT_FAST64_MIN
+#define INT_FAST64_MIN (-INT_FAST64_MAX - 1)
+#undef UINT_FAST64_MAX
+#define UINT_FAST64_MAX __UINT_FAST64_MAX__
+
+#ifdef __INTPTR_MAX__
+# undef INTPTR_MAX
+# define INTPTR_MAX __INTPTR_MAX__
+# undef INTPTR_MIN
+# define INTPTR_MIN (-INTPTR_MAX - 1)
+#endif
+#ifdef __UINTPTR_MAX__
+# undef UINTPTR_MAX
+# define UINTPTR_MAX __UINTPTR_MAX__
+#endif
+
+#undef INTMAX_MAX
+#define INTMAX_MAX __INTMAX_MAX__
+#undef INTMAX_MIN
+#define INTMAX_MIN (-INTMAX_MAX - 1)
+#undef UINTMAX_MAX
+#define UINTMAX_MAX __UINTMAX_MAX__
+
+/* 7.18.3 Limits of other integer types */
+
+#undef PTRDIFF_MAX
+#define PTRDIFF_MAX __PTRDIFF_MAX__
+#undef PTRDIFF_MIN
+#define PTRDIFF_MIN (-PTRDIFF_MAX - 1)
+
+#undef SIG_ATOMIC_MAX
+#define SIG_ATOMIC_MAX __SIG_ATOMIC_MAX__
+#undef SIG_ATOMIC_MIN
+#define SIG_ATOMIC_MIN __SIG_ATOMIC_MIN__
+
+#undef SIZE_MAX
+#define SIZE_MAX __SIZE_MAX__
+
+#undef WCHAR_MAX
+#define WCHAR_MAX __WCHAR_MAX__
+#undef WCHAR_MIN
+#define WCHAR_MIN __WCHAR_MIN__
+
+#undef WINT_MAX
+#define WINT_MAX __WINT_MAX__
+#undef WINT_MIN
+#define WINT_MIN __WINT_MIN__
+
+#endif /* !defined __cplusplus || defined __STDC_LIMIT_MACROS */
+
+#if !defined __cplusplus || defined __STDC_CONSTANT_MACROS
+
+#undef INT8_C
+#define INT8_C(c) __INT8_C(c)
+#undef INT16_C
+#define INT16_C(c) __INT16_C(c)
+#undef INT32_C
+#define INT32_C(c) __INT32_C(c)
+#undef INT64_C
+#define INT64_C(c) __INT64_C(c)
+#undef UINT8_C
+#define UINT8_C(c) __UINT8_C(c)
+#undef UINT16_C
+#define UINT16_C(c) __UINT16_C(c)
+#undef UINT32_C
+#define UINT32_C(c) __UINT32_C(c)
+#undef UINT64_C
+#define UINT64_C(c) __UINT64_C(c)
+#undef INTMAX_C
+#define INTMAX_C(c) __INTMAX_C(c)
+#undef UINTMAX_C
+#define UINTMAX_C(c) __UINTMAX_C(c)
+
+#endif /* !defined __cplusplus || defined __STDC_CONSTANT_MACROS */
+
+#endif /* _GCC_STDINT_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint.h
new file mode 100644
index 00000000..e45f8198
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/stdint.h
@@ -0,0 +1,8 @@
+#ifndef _GCC_WRAP_STDINT_H
+#if __STDC_HOSTED__
+# include_next <stdint.h>
+#else
+# include "stdint-gcc.h"
+#endif
+#define _GCC_WRAP_STDINT_H
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/tgmath.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/tgmath.h
new file mode 100644
index 00000000..1fe4988d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/tgmath.h
@@ -0,0 +1,171 @@
+/* Copyright (C) 2004, 2005, 2009 Free Software Foundation, Inc.
+   Contributed by Apple, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 3, or (at your option)
+any later version.
+
+GCC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+/*
+ * ISO C Standard:  7.22  Type-generic math <tgmath.h>
+ */
+
+#ifndef _TGMATH_H
+#define _TGMATH_H
+
+#include <math.h>
+
+#ifndef __cplusplus
+#include <complex.h>
+
+/* Naming convention: generic macros are defining using
+   __TGMATH_CPLX*, __TGMATH_REAL*, and __TGMATH_CPLX_ONLY.  _CPLX
+   means the generic argument(s) may be real or complex, _REAL means
+   real only, _CPLX means complex only.  If there is no suffix, we are
+   defining a function of one generic argument.  If the suffix is _n
+   it is a function of n generic arguments.  If the suffix is _m_n it
+   is a function of n arguments, the first m of which are generic.  We
+   only define these macros for values of n and/or m that are needed. */
+
+/* The general rules for generic macros are given in 7.22 paragraphs 1 and 2.
+   If any generic parameter is complex, we use a complex version.  Otherwise
+   we use a real version.  If the real part of any generic parameter is long
+   double, we use the long double version.  Otherwise if the real part of any
+   generic parameter is double or of integer type, we use the double version.
+   Otherwise we use the float version. */
+
+#define __tg_cplx(expr) \
+  __builtin_classify_type(expr) == 9
+
+#define __tg_ldbl(expr) \
+  __builtin_types_compatible_p(__typeof__(expr), long double)
+
+#define __tg_dbl(expr)                                       \
+  (__builtin_types_compatible_p(__typeof__(expr), double)    \
+   || __builtin_classify_type(expr) == 1)
+
+#define __tg_choose(x,f,d,l)                                  \
+  __builtin_choose_expr(__tg_ldbl(x), l,                      \
+                        __builtin_choose_expr(__tg_dbl(x), d, \
+                                              f))
+
+#define __tg_choose_2(x,y,f,d,l)                                             \
+  __builtin_choose_expr(__tg_ldbl(x) || __tg_ldbl(y), l,                     \
+                        __builtin_choose_expr(__tg_dbl(x) || __tg_dbl(y), d, \
+                                              f))
+
+#define __tg_choose_3(x,y,z,f,d,l)                                        \
+   __builtin_choose_expr(__tg_ldbl(x) || __tg_ldbl(y) || __tg_ldbl(z), l, \
+                        __builtin_choose_expr(__tg_dbl(x) || __tg_dbl(y)  \
+                                              || __tg_dbl(z), d,          \
+                                              f))
+
+#define __TGMATH_CPLX(z,R,C)                                                  \
+  __builtin_choose_expr (__tg_cplx(z),                                        \
+                         __tg_choose (__real__(z), C##f(z), (C)(z), C##l(z)), \
+                         __tg_choose (z, R##f(z), (R)(z), R##l(z)))
+
+#define __TGMATH_CPLX_2(z1,z2,R,C)                                             \
+  __builtin_choose_expr (__tg_cplx(z1) || __tg_cplx(z2),                       \
+                         __tg_choose_2 (__real__(z1), __real__(z2),            \
+                                        C##f(z1,z2), (C)(z1,z2), C##l(z1,z2)), \
+                         __tg_choose_2 (z1, z2,                                \
+                                        R##f(z1,z2), (R)(z1,z2), R##l(z1,z2)))
+
+#define __TGMATH_REAL(x,R) \
+  __tg_choose (x, R##f(x), (R)(x), R##l(x))
+#define __TGMATH_REAL_2(x,y,R) \
+  __tg_choose_2 (x, y, R##f(x,y), (R)(x,y), R##l(x,y))
+#define __TGMATH_REAL_3(x,y,z,R) \
+  __tg_choose_3 (x, y, z, R##f(x,y,z), (R)(x,y,z), R##l(x,y,z))
+#define __TGMATH_REAL_1_2(x,y,R) \
+  __tg_choose (x, R##f(x,y), (R)(x,y), R##l(x,y))
+#define __TGMATH_REAL_2_3(x,y,z,R) \
+  __tg_choose_2 (x, y, R##f(x,y,z), (R)(x,y,z), R##l(x,y,z))
+#define __TGMATH_CPLX_ONLY(z,C) \
+  __tg_choose (__real__(z), C##f(z), (C)(z), C##l(z))
+
+/* Functions defined in both <math.h> and <complex.h> (7.22p4) */
+#define acos(z)          __TGMATH_CPLX(z, acos, cacos)
+#define asin(z)          __TGMATH_CPLX(z, asin, casin)
+#define atan(z)          __TGMATH_CPLX(z, atan, catan)
+#define acosh(z)         __TGMATH_CPLX(z, acosh, cacosh)
+#define asinh(z)         __TGMATH_CPLX(z, asinh, casinh)
+#define atanh(z)         __TGMATH_CPLX(z, atanh, catanh)
+#define cos(z)           __TGMATH_CPLX(z, cos, ccos)
+#define sin(z)           __TGMATH_CPLX(z, sin, csin)
+#define tan(z)           __TGMATH_CPLX(z, tan, ctan)
+#define cosh(z)          __TGMATH_CPLX(z, cosh, ccosh)
+#define sinh(z)          __TGMATH_CPLX(z, sinh, csinh)
+#define tanh(z)          __TGMATH_CPLX(z, tanh, ctanh)
+#define exp(z)           __TGMATH_CPLX(z, exp, cexp)
+#define log(z)           __TGMATH_CPLX(z, log, clog)
+#define pow(z1,z2)       __TGMATH_CPLX_2(z1, z2, pow, cpow)
+#define sqrt(z)          __TGMATH_CPLX(z, sqrt, csqrt)
+#define fabs(z)          __TGMATH_CPLX(z, fabs, cabs)
+
+/* Functions defined in <math.h> only (7.22p5) */
+#define atan2(x,y)       __TGMATH_REAL_2(x, y, atan2)
+#define cbrt(x)          __TGMATH_REAL(x, cbrt)
+#define ceil(x)          __TGMATH_REAL(x, ceil)
+#define copysign(x,y)    __TGMATH_REAL_2(x, y, copysign)
+#define erf(x)           __TGMATH_REAL(x, erf)
+#define erfc(x)          __TGMATH_REAL(x, erfc)
+#define exp2(x)          __TGMATH_REAL(x, exp2)
+#define expm1(x)         __TGMATH_REAL(x, expm1)
+#define fdim(x,y)        __TGMATH_REAL_2(x, y, fdim)
+#define floor(x)         __TGMATH_REAL(x, floor)
+#define fma(x,y,z)       __TGMATH_REAL_3(x, y, z, fma)
+#define fmax(x,y)        __TGMATH_REAL_2(x, y, fmax)
+#define fmin(x,y)        __TGMATH_REAL_2(x, y, fmin)
+#define fmod(x,y)        __TGMATH_REAL_2(x, y, fmod)
+#define frexp(x,y)       __TGMATH_REAL_1_2(x, y, frexp)
+#define hypot(x,y)       __TGMATH_REAL_2(x, y, hypot)
+#define ilogb(x)         __TGMATH_REAL(x, ilogb)
+#define ldexp(x,y)       __TGMATH_REAL_1_2(x, y, ldexp)
+#define lgamma(x)        __TGMATH_REAL(x, lgamma)
+#define llrint(x)        __TGMATH_REAL(x, llrint)
+#define llround(x)       __TGMATH_REAL(x, llround)
+#define log10(x)         __TGMATH_REAL(x, log10)
+#define log1p(x)         __TGMATH_REAL(x, log1p)
+#define log2(x)          __TGMATH_REAL(x, log2)
+#define logb(x)          __TGMATH_REAL(x, logb)
+#define lrint(x)         __TGMATH_REAL(x, lrint)
+#define lround(x)        __TGMATH_REAL(x, lround)
+#define nearbyint(x)     __TGMATH_REAL(x, nearbyint)
+#define nextafter(x,y)   __TGMATH_REAL_2(x, y, nextafter)
+#define nexttoward(x,y)  __TGMATH_REAL_1_2(x, y, nexttoward)
+#define remainder(x,y)   __TGMATH_REAL_2(x, y, remainder)
+#define remquo(x,y,z)    __TGMATH_REAL_2_3(x, y, z, remquo)
+#define rint(x)          __TGMATH_REAL(x, rint)
+#define round(x)         __TGMATH_REAL(x, round)
+#define scalbn(x,y)      __TGMATH_REAL_1_2(x, y, scalbn)
+#define scalbln(x,y)     __TGMATH_REAL_1_2(x, y, scalbln)
+#define tgamma(x)        __TGMATH_REAL(x, tgamma)
+#define trunc(x)         __TGMATH_REAL(x, trunc)
+
+/* Functions defined in <complex.h> only (7.22p6) */
+#define carg(z)          __TGMATH_CPLX_ONLY(z, carg)
+#define cimag(z)         __TGMATH_CPLX_ONLY(z, cimag)
+#define conj(z)          __TGMATH_CPLX_ONLY(z, conj)
+#define cproj(z)         __TGMATH_CPLX_ONLY(z, cproj)
+#define creal(z)         __TGMATH_CPLX_ONLY(z, creal)
+
+#endif /* __cplusplus */
+#endif /* _TGMATH_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/unwind.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/unwind.h
new file mode 100644
index 00000000..4ff9017b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/unwind.h
@@ -0,0 +1,276 @@
+/* Exception handling and frame unwind runtime interface routines.
+   Copyright (C) 2001, 2003, 2004, 2006, 2008, 2009 Free Software Foundation, Inc.
+
+   This file is part of GCC.
+
+   GCC is free software; you can redistribute it and/or modify it
+   under the terms of the GNU General Public License as published by
+   the Free Software Foundation; either version 3, or (at your option)
+   any later version.
+
+   GCC is distributed in the hope that it will be useful, but WITHOUT
+   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
+   or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
+   License for more details.
+
+   Under Section 7 of GPL version 3, you are granted additional
+   permissions described in the GCC Runtime Library Exception, version
+   3.1, as published by the Free Software Foundation.
+
+   You should have received a copy of the GNU General Public License and
+   a copy of the GCC Runtime Library Exception along with this program;
+   see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+   <http://www.gnu.org/licenses/>.  */
+
+/* This is derived from the C++ ABI for IA-64.  Where we diverge
+   for cross-architecture compatibility are noted with "@@@".  */
+
+#ifndef _UNWIND_H
+#define _UNWIND_H
+
+#ifndef HIDE_EXPORTS
+#pragma GCC visibility push(default)
+#endif
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Level 1: Base ABI  */
+
+/* @@@ The IA-64 ABI uses uint64 throughout.  Most places this is
+   inefficient for 32-bit and smaller machines.  */
+typedef unsigned _Unwind_Word __attribute__((__mode__(__unwind_word__)));
+typedef signed _Unwind_Sword __attribute__((__mode__(__unwind_word__)));
+#if defined(__ia64__) && defined(__hpux__)
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__word__)));
+#else
+typedef unsigned _Unwind_Ptr __attribute__((__mode__(__pointer__)));
+#endif
+typedef unsigned _Unwind_Internal_Ptr __attribute__((__mode__(__pointer__)));
+
+/* @@@ The IA-64 ABI uses a 64-bit word to identify the producer and
+   consumer of an exception.  We'll go along with this for now even on
+   32-bit machines.  We'll need to provide some other option for
+   16-bit machines and for machines with > 8 bits per byte.  */
+typedef unsigned _Unwind_Exception_Class __attribute__((__mode__(__DI__)));
+
+/* The unwind interface uses reason codes in several contexts to
+   identify the reasons for failures or other actions.  */
+typedef enum
+{
+  _URC_NO_REASON = 0,
+  _URC_FOREIGN_EXCEPTION_CAUGHT = 1,
+  _URC_FATAL_PHASE2_ERROR = 2,
+  _URC_FATAL_PHASE1_ERROR = 3,
+  _URC_NORMAL_STOP = 4,
+  _URC_END_OF_STACK = 5,
+  _URC_HANDLER_FOUND = 6,
+  _URC_INSTALL_CONTEXT = 7,
+  _URC_CONTINUE_UNWIND = 8
+} _Unwind_Reason_Code;
+
+
+/* The unwind interface uses a pointer to an exception header object
+   as its representation of an exception being thrown. In general, the
+   full representation of an exception object is language- and
+   implementation-specific, but it will be prefixed by a header
+   understood by the unwind interface.  */
+
+struct _Unwind_Exception;
+
+typedef void (*_Unwind_Exception_Cleanup_Fn) (_Unwind_Reason_Code,
+					      struct _Unwind_Exception *);
+
+struct _Unwind_Exception
+{
+  _Unwind_Exception_Class exception_class;
+  _Unwind_Exception_Cleanup_Fn exception_cleanup;
+  _Unwind_Word private_1;
+  _Unwind_Word private_2;
+
+  /* @@@ The IA-64 ABI says that this structure must be double-word aligned.
+     Taking that literally does not make much sense generically.  Instead we
+     provide the maximum alignment required by any type for the machine.  */
+} __attribute__((__aligned__));
+
+
+/* The ACTIONS argument to the personality routine is a bitwise OR of one
+   or more of the following constants.  */
+typedef int _Unwind_Action;
+
+#define _UA_SEARCH_PHASE	1
+#define _UA_CLEANUP_PHASE	2
+#define _UA_HANDLER_FRAME	4
+#define _UA_FORCE_UNWIND	8
+#define _UA_END_OF_STACK	16
+
+/* The target can override this macro to define any back-end-specific
+   attributes required for the lowest-level stack frame.  */
+#ifndef LIBGCC2_UNWIND_ATTRIBUTE
+#define LIBGCC2_UNWIND_ATTRIBUTE
+#endif
+
+/* This is an opaque type used to refer to a system-specific data
+   structure used by the system unwinder. This context is created and
+   destroyed by the system, and passed to the personality routine
+   during unwinding.  */
+struct _Unwind_Context;
+
+/* Raise an exception, passing along the given exception object.  */
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_RaiseException (struct _Unwind_Exception *);
+
+/* Raise an exception for forced unwinding.  */
+
+typedef _Unwind_Reason_Code (*_Unwind_Stop_Fn)
+     (int, _Unwind_Action, _Unwind_Exception_Class,
+      struct _Unwind_Exception *, struct _Unwind_Context *, void *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
+
+/* Helper to invoke the exception_cleanup routine.  */
+extern void _Unwind_DeleteException (struct _Unwind_Exception *);
+
+/* Resume propagation of an existing exception.  This is used after
+   e.g. executing cleanup code, and not to implement rethrowing.  */
+extern void LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Resume (struct _Unwind_Exception *);
+
+/* @@@ Resume propagation of a FORCE_UNWIND exception, or to rethrow
+   a normal exception that was handled.  */
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Resume_or_Rethrow (struct _Unwind_Exception *);
+
+/* @@@ Use unwind data to perform a stack backtrace.  The trace callback
+   is called for every stack frame in the call chain, but no cleanup
+   actions are performed.  */
+typedef _Unwind_Reason_Code (*_Unwind_Trace_Fn)
+     (struct _Unwind_Context *, void *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_Backtrace (_Unwind_Trace_Fn, void *);
+
+/* These functions are used for communicating information about the unwind
+   context (i.e. the unwind descriptors and the user register state) between
+   the unwind library and the personality routine and landing pad.  Only
+   selected registers may be manipulated.  */
+
+extern _Unwind_Word _Unwind_GetGR (struct _Unwind_Context *, int);
+extern void _Unwind_SetGR (struct _Unwind_Context *, int, _Unwind_Word);
+
+extern _Unwind_Ptr _Unwind_GetIP (struct _Unwind_Context *);
+extern _Unwind_Ptr _Unwind_GetIPInfo (struct _Unwind_Context *, int *);
+extern void _Unwind_SetIP (struct _Unwind_Context *, _Unwind_Ptr);
+
+/* @@@ Retrieve the CFA of the given context.  */
+extern _Unwind_Word _Unwind_GetCFA (struct _Unwind_Context *);
+
+extern void *_Unwind_GetLanguageSpecificData (struct _Unwind_Context *);
+
+extern _Unwind_Ptr _Unwind_GetRegionStart (struct _Unwind_Context *);
+
+
+/* The personality routine is the function in the C++ (or other language)
+   runtime library which serves as an interface between the system unwind
+   library and language-specific exception handling semantics.  It is
+   specific to the code fragment described by an unwind info block, and
+   it is always referenced via the pointer in the unwind info block, and
+   hence it has no ABI-specified name.
+
+   Note that this implies that two different C++ implementations can
+   use different names, and have different contents in the language
+   specific data area.  Moreover, that the language specific data
+   area contains no version info because name of the function invoked
+   provides more effective versioning by detecting at link time the
+   lack of code to handle the different data format.  */
+
+typedef _Unwind_Reason_Code (*_Unwind_Personality_Fn)
+     (int, _Unwind_Action, _Unwind_Exception_Class,
+      struct _Unwind_Exception *, struct _Unwind_Context *);
+
+/* @@@ The following alternate entry points are for setjmp/longjmp
+   based unwinding.  */
+
+struct SjLj_Function_Context;
+extern void _Unwind_SjLj_Register (struct SjLj_Function_Context *);
+extern void _Unwind_SjLj_Unregister (struct SjLj_Function_Context *);
+
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_RaiseException (struct _Unwind_Exception *);
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_ForcedUnwind (struct _Unwind_Exception *, _Unwind_Stop_Fn, void *);
+extern void LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_Resume (struct _Unwind_Exception *);
+extern _Unwind_Reason_Code LIBGCC2_UNWIND_ATTRIBUTE
+_Unwind_SjLj_Resume_or_Rethrow (struct _Unwind_Exception *);
+
+/* @@@ The following provide access to the base addresses for text
+   and data-relative addressing in the LDSA.  In order to stay link
+   compatible with the standard ABI for IA-64, we inline these.  */
+
+#ifdef __ia64__
+#include <stdlib.h>
+
+static inline _Unwind_Ptr
+_Unwind_GetDataRelBase (struct _Unwind_Context *_C)
+{
+  /* The GP is stored in R1.  */
+  return _Unwind_GetGR (_C, 1);
+}
+
+static inline _Unwind_Ptr
+_Unwind_GetTextRelBase (struct _Unwind_Context *_C __attribute__ ((__unused__)))
+{
+  abort ();
+  return 0;
+}
+
+/* @@@ Retrieve the Backing Store Pointer of the given context.  */
+extern _Unwind_Word _Unwind_GetBSP (struct _Unwind_Context *);
+#else
+extern _Unwind_Ptr _Unwind_GetDataRelBase (struct _Unwind_Context *);
+extern _Unwind_Ptr _Unwind_GetTextRelBase (struct _Unwind_Context *);
+#endif
+
+/* @@@ Given an address, return the entry point of the function that
+   contains it.  */
+extern void * _Unwind_FindEnclosingFunction (void *pc);
+
+#ifndef __SIZEOF_LONG__
+  #error "__SIZEOF_LONG__ macro not defined"
+#endif
+
+#ifndef __SIZEOF_POINTER__
+  #error "__SIZEOF_POINTER__ macro not defined"
+#endif
+
+
+/* leb128 type numbers have a potentially unlimited size.
+   The target of the following definitions of _sleb128_t and _uleb128_t
+   is to have efficient data types large enough to hold the leb128 type
+   numbers used in the unwind code.
+   Mostly these types will simply be defined to long and unsigned long
+   except when a unsigned long data type on the target machine is not
+   capable of storing a pointer.  */
+
+#if __SIZEOF_LONG__ >= __SIZEOF_POINTER__
+  typedef long _sleb128_t;
+  typedef unsigned long _uleb128_t;
+#elif __SIZEOF_LONG_LONG__ >= __SIZEOF_POINTER__
+  typedef long long _sleb128_t;
+  typedef unsigned long long _uleb128_t;
+#else
+# error "What type shall we use for _sleb128_t?"
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifndef HIDE_EXPORTS
+#pragma GCC visibility pop
+#endif
+
+#endif /* unwind.h */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/varargs.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/varargs.h
new file mode 100644
index 00000000..4b9803e7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/include/varargs.h
@@ -0,0 +1,7 @@
+#ifndef _VARARGS_H
+#define _VARARGS_H
+
+#error "GCC no longer implements <varargs.h>."
+#error "Revise your code to use <stdarg.h>."
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc_list b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc_list
new file mode 100644
index 00000000..092bc2b0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc_list
@@ -0,0 +1 @@
+;
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/gsyslimits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/gsyslimits.h
new file mode 100644
index 00000000..a3628025
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/gsyslimits.h
@@ -0,0 +1,8 @@
+/* syslimits.h stands for the system's own limits.h file.
+   If we can use it ok unmodified, then we install this text.
+   If fixincludes fixes it, then the fixed version is installed
+   instead of this text.  */
+
+#define _GCC_NEXT_LIMITS_H		/* tell gcc's limits.h to recurse */
+#include_next <limits.h>
+#undef _GCC_NEXT_LIMITS_H
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/README b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/README
new file mode 100644
index 00000000..7086a778
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/README
@@ -0,0 +1,14 @@
+This README file is copied into the directory for GCC-only header files
+when fixincludes is run by the makefile for GCC.
+
+Many of the files in this directory were automatically edited from the
+standard system header files by the fixincludes process.  They are
+system-specific, and will not work on any other kind of system.  They
+are also not part of GCC.  The reason we have to do this is because
+GCC requires ANSI C headers and many vendors supply ANSI-incompatible
+headers.
+
+Because this is an automated process, sometimes headers get "fixed"
+that do not, strictly speaking, need a fix.  As long as nothing is broken
+by the process, it is just an unfortunate collateral inconvenience.
+We would like to rectify it, if it is not "too inconvenient".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/limits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/limits.h
new file mode 100644
index 00000000..dbefb1df
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/include/limits.h
@@ -0,0 +1,127 @@
+/* Copyright (C) 1991, 1992, 1993, 1996, 1997, 1998, 1999, 2000, 2001,
+   2002 Free Software Foundation, Inc.
+
+This file is part of GCC.
+
+GCC is free software; you can redistribute it and/or modify it under
+the terms of the GNU General Public License as published by the Free
+Software Foundation; either version 3, or (at your option) any later
+version.
+
+GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+WARRANTY; without even the implied warranty of MERCHANTABILITY or
+FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+for more details.
+
+Under Section 7 of GPL version 3, you are granted additional
+permissions described in the GCC Runtime Library Exception, version
+3.1, as published by the Free Software Foundation.
+
+You should have received a copy of the GNU General Public License and
+a copy of the GCC Runtime Library Exception along with this program;
+see the files COPYING3 and COPYING.RUNTIME respectively.  If not, see
+<http://www.gnu.org/licenses/>.  */
+
+#ifndef _LIMITS_H___
+#define _LIMITS_H___
+
+/* Number of bits in a `char'.  */
+#undef CHAR_BIT
+#define CHAR_BIT __CHAR_BIT__
+
+/* Maximum length of a multibyte character.  */
+#ifndef MB_LEN_MAX
+#define MB_LEN_MAX 1
+#endif
+
+/* Minimum and maximum values a `signed char' can hold.  */
+#undef SCHAR_MIN
+#define SCHAR_MIN (-SCHAR_MAX - 1)
+#undef SCHAR_MAX
+#define SCHAR_MAX __SCHAR_MAX__
+
+/* Maximum value an `unsigned char' can hold.  (Minimum is 0).  */
+#undef UCHAR_MAX
+#if __SCHAR_MAX__ == __INT_MAX__
+# define UCHAR_MAX (SCHAR_MAX * 2U + 1U)
+#else
+# define UCHAR_MAX (SCHAR_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `char' can hold.  */
+#ifdef __CHAR_UNSIGNED__
+# undef CHAR_MIN
+# if __SCHAR_MAX__ == __INT_MAX__
+#  define CHAR_MIN 0U
+# else
+#  define CHAR_MIN 0
+# endif
+# undef CHAR_MAX
+# define CHAR_MAX UCHAR_MAX
+#else
+# undef CHAR_MIN
+# define CHAR_MIN SCHAR_MIN
+# undef CHAR_MAX
+# define CHAR_MAX SCHAR_MAX
+#endif
+
+/* Minimum and maximum values a `signed short int' can hold.  */
+#undef SHRT_MIN
+#define SHRT_MIN (-SHRT_MAX - 1)
+#undef SHRT_MAX
+#define SHRT_MAX __SHRT_MAX__
+
+/* Maximum value an `unsigned short int' can hold.  (Minimum is 0).  */
+#undef USHRT_MAX
+#if __SHRT_MAX__ == __INT_MAX__
+# define USHRT_MAX (SHRT_MAX * 2U + 1U)
+#else
+# define USHRT_MAX (SHRT_MAX * 2 + 1)
+#endif
+
+/* Minimum and maximum values a `signed int' can hold.  */
+#undef INT_MIN
+#define INT_MIN (-INT_MAX - 1)
+#undef INT_MAX
+#define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold.  (Minimum is 0).  */
+#undef UINT_MAX
+#define UINT_MAX (INT_MAX * 2U + 1U)
+
+/* Minimum and maximum values a `signed long int' can hold.
+   (Same as `int').  */
+#undef LONG_MIN
+#define LONG_MIN (-LONG_MAX - 1L)
+#undef LONG_MAX
+#define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold.  (Minimum is 0).  */
+#undef ULONG_MAX
+#define ULONG_MAX (LONG_MAX * 2UL + 1UL)
+
+#if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold.  */
+# undef LLONG_MIN
+# define LLONG_MIN (-LLONG_MAX - 1LL)
+# undef LLONG_MAX
+# define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+# undef ULLONG_MAX
+# define ULLONG_MAX (LLONG_MAX * 2ULL + 1ULL)
+#endif
+
+#if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold.  */
+# undef LONG_LONG_MIN
+# define LONG_LONG_MIN (-LONG_LONG_MAX - 1LL)
+# undef LONG_LONG_MAX
+# define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+# undef ULONG_LONG_MAX
+# define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1ULL)
+#endif
+
+#endif /* _LIMITS_H___ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/macro_list b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/macro_list
new file mode 100644
index 00000000..e69de29b
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders.conf b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders.conf
new file mode 100644
index 00000000..9bbc8709
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders.conf
@@ -0,0 +1,3 @@
+SYSTEM_HEADER_DIR="/opt/tc32/tc32-elf/sys-include"
+OTHER_FIXINCLUDES_DIRS=""
+STMP_FIXINC="stmp-fixinc"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/libiberty.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/lib/libiberty.a
new file mode 100644
index 00000000..ccd745a0
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/cc1.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/cc1.exe
new file mode 100644
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc.sh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc.sh
new file mode 100644
index 00000000..e73aed99
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixinc.sh
@@ -0,0 +1,498 @@
+#!/bin/sh
+#
+# Install modified versions of certain ANSI-incompatible system header
+# files which are fixed to work correctly with ANSI C and placed in a
+# directory that GCC will search.
+#
+# See README-fixinc for more information.
+#
+#  fixincludes copyright (c) 1998, 1999, 2000, 2002, 2009
+#  The Free Software Foundation, Inc.
+#
+# fixincludes is free software.
+# 
+# You may redistribute it and/or modify it under the terms of the
+# GNU General Public License, as published by the Free Software
+# Foundation; either version 3, or (at your option) any later version.
+# 
+# fixincludes is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+# See the GNU General Public License for more details.
+# 
+# You should have received a copy of the GNU General Public License
+# along with fixincludes; see the file COPYING3.  If not see
+# <http://www.gnu.org/licenses/>.
+#
+# # # # # # # # # # # # # # # # # # # # #
+
+# Usage: fixinc.sh output-dir input-dir
+#
+# Directory in which to store the results.
+# Fail if no arg to specify a directory for the output.
+if [ "x$1" = "x" ]
+then
+  echo fixincludes: no output directory specified
+  exit 1
+fi
+
+LIB=${1}
+shift
+
+# Make sure it exists.
+if [ ! -d $LIB ]; then
+  mkdir $LIB || {
+    echo fixincludes:  output dir '`'$LIB"' cannot be created"
+    exit 1
+  }
+else
+  ( cd $LIB && touch DONE && rm DONE ) || {
+    echo fixincludes:  output dir '`'$LIB"' is an invalid directory"
+    exit 1
+  }
+fi
+
+if test -z "$VERBOSE"
+then
+  VERBOSE=2
+  export VERBOSE
+else
+  case "$VERBOSE" in
+  [0-9] ) : ;;
+  * )  VERBOSE=3 ;;
+  esac
+fi
+
+# Define what target system we're fixing.
+#
+if test -r ./Makefile; then
+  target_canonical="`sed -n -e 's,^target[ 	]*=[ 	]*\(.*\)$,\1,p' < Makefile`"
+fi
+
+# If not from the Makefile, then try config.guess
+#
+if test -z "${target_canonical}" ; then
+  if test -x ./config.guess ; then
+    target_canonical="`config.guess`" ; fi
+  test -z "${target_canonical}" && target_canonical=unknown
+fi
+export target_canonical
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# Define PWDCMD as a command to use to get the working dir
+# in the form that we want.
+PWDCMD=${PWDCMD-pwd}
+
+case "`$PWDCMD`" in
+//*)
+    # On an Apollo, discard everything before `/usr'.
+    PWDCMD="eval pwd | sed -e 's,.*/usr/,/usr/,'"
+    ;;
+esac
+
+# Original directory.
+ORIGDIR=`${PWDCMD}`
+export ORIGDIR
+FIXINCL=`${PWDCMD}`/fixincl
+if [ ! -x $FIXINCL ] ; then
+  echo "Cannot find fixincl" >&2
+  exit 1
+fi
+export FIXINCL
+
+# Make LIB absolute only if needed to avoid problems with the amd.
+case $LIB in
+/*)
+    ;;
+*)
+    cd $LIB; LIB=`${PWDCMD}`
+    ;;
+esac
+
+if test $VERBOSE -gt 0
+then echo Fixing headers into ${LIB} for ${target_canonical} target ; fi
+
+# Determine whether this system has symbolic links.
+if test -n "$DJDIR"; then
+  LINKS=false
+elif ln -s X $LIB/ShouldNotExist 2>/dev/null; then
+  rm -f $LIB/ShouldNotExist
+  LINKS=true
+elif ln -s X /tmp/ShouldNotExist 2>/dev/null; then
+  rm -f /tmp/ShouldNotExist
+  LINKS=true
+else
+  LINKS=false
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+#  In the file macro_list are listed all the predefined
+#  macros that are not in the C89 reserved namespace (the reserved
+#  namespace is all identifiers beginnning with two underscores or one
+#  underscore followed by a capital letter).  A regular expression to find
+#  any of those macros in a header file is written to MN_NAME_PAT.
+#
+#  Note dependency on ASCII. \012 = newline.
+#  tr ' ' '\n' is, alas, not portable.
+
+if test -s ${MACRO_LIST}
+then
+  if test $VERBOSE -gt 0; then
+    echo "Forbidden identifiers: `tr '\012' ' ' < ${MACRO_LIST}`"
+  fi
+  MN_NAME_PAT="`sed 's/^/\\\\</; s/$/\\\\>/; $!s/$/|/' \
+      < ${MACRO_LIST} | tr -d '\012'`"
+  export MN_NAME_PAT
+else
+  if test $VERBOSE -gt 0
+  then echo "No forbidden identifiers defined by this target" ; fi
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+#  Search each input directory for broken header files.
+#  This loop ends near the end of the file.
+#
+if test $# -eq 0
+then
+    INPUTLIST="/usr/include"
+else
+    INPUTLIST="$@"
+fi
+
+for INPUT in ${INPUTLIST} ; do
+
+cd ${ORIGDIR}
+
+#  Make sure a directory exists before changing into it,
+#  otherwise Solaris2 will fail-exit the script.
+#
+if [ ! -d ${INPUT} ]; then
+  continue
+fi
+cd ${INPUT}
+
+INPUT=`${PWDCMD}`
+export INPUT
+
+#
+# # # # # # # # # # # # # # # # # # # # #
+#
+if test $VERBOSE -gt 1
+then echo Finding directories and links to directories ; fi
+
+# Find all directories and all symlinks that point to directories.
+# Put the list in $all_dirs.
+# Each time we find a symlink, add it to newdirs
+# so that we do another find within the dir the link points to.
+# Note that $all_dirs may have duplicates in it;
+# later parts of this file are supposed to ignore them.
+dirs="."
+levels=2
+all_dirs=""
+search_dirs=""
+
+while [ -n "$dirs" ] && [ $levels -gt 0 ]
+do
+  levels=`expr $levels - 1`
+  newdirs=
+  for d in $dirs
+  do
+    if test $VERBOSE -gt 1
+    then echo " Searching $INPUT/$d" ; fi
+
+    # Find all directories under $d, relative to $d, excluding $d itself.
+    # (The /. is needed after $d in case $d is a symlink.)
+    all_dirs="$all_dirs `find $d/. -type d -print | \
+               sed -e '/\/\.$/d' -e 's@/./@/@g'`"
+    # Find all links to directories.
+    # Using `-exec test -d' in find fails on some systems,
+    # and trying to run test via sh fails on others,
+    # so this is the simplest alternative left.
+    # First find all the links, then test each one.
+    theselinks=
+    $LINKS && \
+      theselinks=`find $d/. -type l -print | sed -e 's@/./@/@g'`
+    for d1 in $theselinks --dummy--
+    do
+      # If the link points to a directory,
+      # add that dir to $newdirs
+      if [ -d $d1 ]
+      then
+        all_dirs="$all_dirs $d1"
+        if [ "`ls -ld $d1 | sed -n 's/.*-> //p'`" != "." ]
+        then
+          newdirs="$newdirs $d1"
+          search_dirs="$search_dirs $d1"
+        fi
+      fi
+    done
+  done
+
+  dirs="$newdirs"
+done
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+dirs=
+if test $VERBOSE -gt 2
+then echo "All directories (including links to directories):"
+     echo $all_dirs
+fi
+
+for file in $all_dirs; do
+  rm -rf $LIB/$file
+  if [ ! -d $LIB/$file ]
+  then mkdir $LIB/$file
+  fi
+done
+mkdir $LIB/root
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# treetops gets an alternating list
+# of old directories to copy
+# and the new directories to copy to.
+treetops=". ${LIB}"
+
+if $LINKS; then
+  if test $VERBOSE -gt 1
+  then echo 'Making symbolic directory links' ; fi
+  cwd=`${PWDCMD}`
+
+  for sym_link in $search_dirs; do
+    cd ${INPUT}
+    dest=`ls -ld ${sym_link} | sed -n 's/.*-> //p'`
+
+    # In case $dest is relative, get to ${sym_link}'s dir first.
+    #
+    cd ./`echo ${sym_link} | sed 's;/[^/]*$;;'`
+
+    # Check that the target directory exists.
+    # Redirections changed to avoid bug in sh on Ultrix.
+    #
+    (cd $dest) > /dev/null 2>&1
+    if [ $? = 0 ]; then
+      cd $dest
+
+      # full_dest_dir gets the dir that the link actually leads to.
+      #
+      full_dest_dir=`${PWDCMD}`
+
+      # Canonicalize ${INPUT} now to minimize the time an
+      # automounter has to change the result of ${PWDCMD}.
+      #
+      cinput=`cd ${INPUT}; ${PWDCMD}`
+
+      # If a link points to ., make a similar link to .
+      #
+      if [ ${full_dest_dir} = ${cinput} ]; then
+        if test $VERBOSE -gt 2
+        then echo ${sym_link} '->' . ': Making self link' ; fi
+        rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+        ln -s . ${LIB}/${sym_link} > /dev/null 2>&1
+
+      # If link leads back into ${INPUT},
+      # make a similar link here.
+      #
+      elif expr ${full_dest_dir} : "${cinput}/.*" > /dev/null; then
+        # Y gets the actual target dir name, relative to ${INPUT}.
+        y=`echo ${full_dest_dir} | sed -n "s&${cinput}/&&p"`
+        # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+        dots=`echo "${sym_link}" |
+          sed -e 's@^./@@' -e 's@/./@/@g' -e 's@[^/][^/]*@..@g' -e 's@..$@@'`
+        if test $VERBOSE -gt 2
+        then echo ${sym_link} '->' $dots$y ': Making local link' ; fi
+        rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+        ln -s $dots$y ${LIB}/${sym_link} > /dev/null 2>&1
+
+      else
+        # If the link is to a dir $target outside ${INPUT},
+        # repoint the link at ${INPUT}/root$target
+        # and process $target into ${INPUT}/root$target
+        # treat this directory as if it actually contained the files.
+        #
+        if test $VERBOSE -gt 2
+        then echo ${sym_link} '->' root${full_dest_dir} ': Making rooted link'
+        fi
+        if [ -d $LIB/root${full_dest_dir} ]
+        then true
+        else
+          dirname=root${full_dest_dir}/
+          dirmade=.
+          cd $LIB
+          while [ x$dirname != x ]; do
+            component=`echo $dirname | sed -e 's|/.*$||'`
+            mkdir $component >/dev/null 2>&1
+            cd $component
+            dirmade=$dirmade/$component
+            dirname=`echo $dirname | sed -e 's|[^/]*/||'`
+          done
+        fi
+
+        # Duplicate directory structure created in ${LIB}/${sym_link} in new
+        # root area.
+        #
+        for file2 in $all_dirs; do
+          case $file2 in
+            ${sym_link}/*)
+              dupdir=${LIB}/root${full_dest_dir}/`echo $file2 |
+                      sed -n "s|^${sym_link}/||p"`
+              if test $VERBOSE -gt 2
+              then echo "Duplicating ${sym_link}'s ${dupdir}" ; fi
+              if [ -d ${dupdir} ]
+              then true
+              else
+                mkdir ${dupdir}
+              fi
+              ;;
+            *)
+              ;;
+          esac
+        done
+
+        # Get the path from ${LIB} to ${sym_link}, accounting for symlinks.
+        #
+        parent=`echo "${sym_link}" | sed -e 's@/[^/]*$@@'`
+        libabs=`cd ${LIB}; ${PWDCMD}`
+        file2=`cd ${LIB}; cd $parent; ${PWDCMD} | sed -e "s@^${libabs}@@"`
+
+        # DOTS is the relative path from ${LIB}/${sym_link} back to ${LIB}.
+        #
+        dots=`echo "$file2" | sed -e 's@/[^/]*@../@g'`
+        rm -fr ${LIB}/${sym_link} > /dev/null 2>&1
+        ln -s ${dots}root${full_dest_dir} ${LIB}/${sym_link} > /dev/null 2>&1
+        treetops="$treetops ${sym_link} ${LIB}/root${full_dest_dir}"
+      fi
+    fi
+  done
+fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+required=
+set x $treetops
+shift
+while [ $# != 0 ]; do
+  # $1 is an old directory to copy, and $2 is the new directory to copy to.
+  #
+  SRCDIR=`cd ${INPUT} ; cd $1 ; ${PWDCMD}`
+  export SRCDIR
+
+  FIND_BASE=$1
+  export FIND_BASE
+  shift
+
+  DESTDIR=`cd $1;${PWDCMD}`
+  export DESTDIR
+  shift
+
+  # The same dir can appear more than once in treetops.
+  # There's no need to scan it more than once.
+  #
+  if [ -f ${DESTDIR}/DONE ]
+  then continue ; fi
+
+  touch ${DESTDIR}/DONE
+  if test $VERBOSE -gt 1
+  then echo Fixing directory ${SRCDIR} into ${DESTDIR} ; fi
+
+  # Check files which are symlinks as well as those which are files.
+  #
+  cd ${INPUT}
+  required="$required `if $LINKS; then
+    find ${FIND_BASE}/. -name '*.h' \( -type f -o -type l \) -print
+  else
+    find ${FIND_BASE}/. -name '*.h' -type f -print
+  fi | \
+    sed -e 's;/\./;/;g' -e 's;//*;/;g' | \
+    ${FIXINCL}`"
+done
+
+## Make sure that any include files referenced using double quotes
+## exist in the fixed directory.  This comes last since otherwise
+## we might end up deleting some of these files "because they don't
+## need any change."
+set x `echo $required`
+shift
+while [ $# != 0 ]; do
+  newreq=
+  while [ $# != 0 ]; do
+    # $1 is the directory to copy from,
+    # $2 is the unfixed file,
+    # $3 is the fixed file name.
+    #
+    cd ${INPUT}
+    cd $1
+    if [ -f $2 ] ; then
+      if [ -r $2 ] && [ ! -r $3 ]; then
+        cp $2 $3 >/dev/null 2>&1 || echo "Can't copy $2" >&2
+        chmod +w $3 2>/dev/null
+        chmod a+r $3 2>/dev/null
+        if test $VERBOSE -gt 2
+        then echo Copied $2 ; fi
+        for include in `egrep '^[ 	]*#[ 	]*include[ 	]*"[^/]' $3 |
+             sed -e 's/^[ 	]*#[ 	]*include[ 	]*"\([^"]*\)".*$/\1/'`
+        do
+	  dir=`echo $2 | sed -e s'|/[^/]*$||'`
+	  dir2=`echo $3 | sed -e s'|/[^/]*$||'`
+	  newreq="$newreq $1 $dir/$include $dir2/$include"
+        done
+      fi
+    fi
+    shift; shift; shift
+  done
+  set x $newreq
+  shift
+done
+
+if test $VERBOSE -gt 2
+then echo 'Cleaning up DONE files.' ; fi
+cd $LIB
+# Look for files case-insensitively, for the benefit of
+# DOS/Windows filesystems.
+find . -name '[Dd][Oo][Nn][Ee]' -exec rm -f '{}' ';'
+
+if test $VERBOSE -gt 1
+then echo 'Cleaning up unneeded directories:' ; fi
+cd $LIB
+all_dirs=`find . -type d \! -name '.' -print | sort -r`
+for file in $all_dirs; do
+  if rmdir $LIB/$file > /dev/null
+  then
+    test $VERBOSE -gt 3 && echo "  removed $file"
+  fi
+done 2> /dev/null
+
+# On systems which don't support symlinks, `find' may barf
+# if called with "-type l" predicate.  So only use that if
+# we know we should look for symlinks.
+if $LINKS; then
+  test $VERBOSE -gt 2 && echo "Removing unused symlinks"
+
+  all_dirs=`find . -type l -print`
+  for file in $all_dirs
+  do
+    if test ! -d $file
+    then
+      rm -f $file
+      test $VERBOSE -gt 3 && echo "  removed $file"
+      rmdir `dirname $file` > /dev/null && \
+           test $VERBOSE -gt 3 && \
+           echo "  removed `dirname $file`"
+    fi
+  done 2> /dev/null
+fi
+
+if test $VERBOSE -gt 0
+then echo fixincludes is done ; fi
+
+# # # # # # # # # # # # # # # # # # # # #
+#
+# End of for INPUT directories
+#
+done
+#
+# # # # # # # # # # # # # # # # # # # # #
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixincl.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixincl.exe
new file mode 100644
index 00000000..41c1a11f
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/fixincl.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders
new file mode 100644
index 00000000..c644e0bf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkheaders
@@ -0,0 +1,104 @@
+#!/bin/sh
+
+# Copyright (C) 2002, 2007, 2009 Free Software Foundation, Inc.
+
+#This file is part of GCC.
+
+#GCC is free software; you can redistribute it and/or modify it under
+#the terms of the GNU General Public License as published by the Free
+#Software Foundation; either version 3, or (at your option) any later
+#version.
+
+#GCC is distributed in the hope that it will be useful, but WITHOUT
+#ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+#FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+#for more details.
+
+#You should have received a copy of the GNU General Public License
+#along with GCC; see the file COPYING3.  If not see
+#<http://www.gnu.org/licenses/>.
+
+# Basic information
+target=tc32-unknown-elf
+target_noncanonical=tc32-elf
+version=4.5.1-tc32-1.3
+
+VERBOSE=0
+while [ x$1 = x-v ] ; do
+    shift
+    VERBOSE=`expr $VERBOSE + 1`
+done
+export VERBOSE
+
+if [ x$1 = x--help ] ; then
+    echo "Usage: mkheaders [options] [prefix [isysroot]]"
+    echo "Options:"
+    echo "  -v        Print more output (may be repeated for even more output)"
+    echo "  --help    This help"
+    echo "  --version Print version information"
+    exit 0
+fi
+
+if [ x$1 = x--version ] ; then
+    echo "mkheaders (GCC) version $version"
+    echo "Copyright 2002, 2007, 2009 Free Software Foundation, Inc."
+    echo "This program is free software; you may redistribute it under the"
+    echo "terms of the GNU General Public License.  This program has"
+    echo "absolutely no warranty."
+    exit 0
+fi
+
+# Common prefix for installation directories.
+if [ x$1 != x ] ; then
+  prefix=$1
+  shift
+else
+  prefix=/opt/tc32
+fi
+
+# Allow for alternate isysroot in which to find headers
+if [ x$1 != x ] ; then
+  isysroot=$1
+  shift
+else
+  isysroot=
+fi
+
+# Directory in which to put host dependent programs and libraries
+exec_prefix=${prefix}
+# Directory in which to put the directories used by the compiler.
+libdir=${exec_prefix}/lib
+libexecdir=${exec_prefix}/libexec
+# Directory in which the compiler finds libraries, etc.
+libsubdir=${libdir}/gcc/${target_noncanonical}/${version}
+# Directory in which the compiler finds executables
+libexecsubdir=${libexecdir}/gcc/${target_noncanonical}/${version}
+
+itoolsdir=${libexecsubdir}/install-tools
+itoolsdatadir=${libsubdir}/install-tools
+incdir=${libsubdir}/include-fixed
+mkinstalldirs="/bin/sh ${itoolsdir}/mkinstalldirs"
+
+cd ${itoolsdir}
+rm -rf ${incdir}/*
+
+for ml in `cat ${itoolsdatadir}/fixinc_list`; do
+  sysroot_headers_suffix=`echo ${ml} | sed -e 's/;.*$//'`
+  multi_dir=`echo ${ml} | sed -e 's/^[^;]*;//'`
+  subincdir=${incdir}${multi_dir}
+  . ${itoolsdatadir}/mkheaders.conf
+  if [ x${STMP_FIXINC} != x ] ; then
+	TARGET_MACHINE="${target}" target_canonical="${target}" \
+	    MACRO_LIST="${itoolsdatadir}/macro_list" \
+	    /bin/sh ./fixinc.sh ${subincdir} \
+	    ${isysroot}${SYSTEM_HEADER_DIR} ${OTHER_FIXINCLUDES_DIRS}
+	rm -f ${subincdir}/syslimits.h
+	if [ -f ${subincdir}/limits.h ]; then
+	  mv ${subincdir}/limits.h ${subincdir}/syslimits.h
+	else
+	  cp ${itoolsdatadir}/gsyslimits.h ${subincdir}/syslimits.h
+	fi
+  fi
+
+  cp ${itoolsdatadir}/include${multi_dir}/limits.h ${subincdir}
+done
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkinstalldirs b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkinstalldirs
new file mode 100644
index 00000000..4191a45d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/install-tools/mkinstalldirs
@@ -0,0 +1,162 @@
+#! /bin/sh
+# mkinstalldirs --- make directory hierarchy
+
+scriptversion=2009-04-28.21; # UTC
+
+# Original author: Noah Friedman <friedman@prep.ai.mit.edu>
+# Created: 1993-05-16
+# Public domain.
+#
+# This file is maintained in Automake, please report
+# bugs to <bug-automake@gnu.org> or send patches to
+# <automake-patches@gnu.org>.
+
+nl='
+'
+IFS=" ""	$nl"
+errstatus=0
+dirmode=
+
+usage="\
+Usage: mkinstalldirs [-h] [--help] [--version] [-m MODE] DIR ...
+
+Create each directory DIR (with mode MODE, if specified), including all
+leading file name components.
+
+Report bugs to <bug-automake@gnu.org>."
+
+# process command line arguments
+while test $# -gt 0 ; do
+  case $1 in
+    -h | --help | --h*)         # -h for help
+      echo "$usage"
+      exit $?
+      ;;
+    -m)                         # -m PERM arg
+      shift
+      test $# -eq 0 && { echo "$usage" 1>&2; exit 1; }
+      dirmode=$1
+      shift
+      ;;
+    --version)
+      echo "$0 $scriptversion"
+      exit $?
+      ;;
+    --)                         # stop option processing
+      shift
+      break
+      ;;
+    -*)                         # unknown option
+      echo "$usage" 1>&2
+      exit 1
+      ;;
+    *)                          # first non-opt arg
+      break
+      ;;
+  esac
+done
+
+for file
+do
+  if test -d "$file"; then
+    shift
+  else
+    break
+  fi
+done
+
+case $# in
+  0) exit 0 ;;
+esac
+
+# Solaris 8's mkdir -p isn't thread-safe.  If you mkdir -p a/b and
+# mkdir -p a/c at the same time, both will detect that a is missing,
+# one will create a, then the other will try to create a and die with
+# a "File exists" error.  This is a problem when calling mkinstalldirs
+# from a parallel make.  We use --version in the probe to restrict
+# ourselves to GNU mkdir, which is thread-safe.
+case $dirmode in
+  '')
+    if mkdir -p --version . >/dev/null 2>&1 && test ! -d ./--version; then
+      echo "mkdir -p -- $*"
+      exec mkdir -p -- "$@"
+    else
+      # On NextStep and OpenStep, the `mkdir' command does not
+      # recognize any option.  It will interpret all options as
+      # directories to create, and then abort because `.' already
+      # exists.
+      test -d ./-p && rmdir ./-p
+      test -d ./--version && rmdir ./--version
+    fi
+    ;;
+  *)
+    if mkdir -m "$dirmode" -p --version . >/dev/null 2>&1 &&
+       test ! -d ./--version; then
+      echo "mkdir -m $dirmode -p -- $*"
+      exec mkdir -m "$dirmode" -p -- "$@"
+    else
+      # Clean up after NextStep and OpenStep mkdir.
+      for d in ./-m ./-p ./--version "./$dirmode";
+      do
+        test -d $d && rmdir $d
+      done
+    fi
+    ;;
+esac
+
+for file
+do
+  case $file in
+    /*) pathcomp=/ ;;
+    *)  pathcomp= ;;
+  esac
+  oIFS=$IFS
+  IFS=/
+  set fnord $file
+  shift
+  IFS=$oIFS
+
+  for d
+  do
+    test "x$d" = x && continue
+
+    pathcomp=$pathcomp$d
+    case $pathcomp in
+      -*) pathcomp=./$pathcomp ;;
+    esac
+
+    if test ! -d "$pathcomp"; then
+      echo "mkdir $pathcomp"
+
+      mkdir "$pathcomp" || lasterr=$?
+
+      if test ! -d "$pathcomp"; then
+	errstatus=$lasterr
+      else
+	if test ! -z "$dirmode"; then
+	  echo "chmod $dirmode $pathcomp"
+	  lasterr=
+	  chmod "$dirmode" "$pathcomp" || lasterr=$?
+
+	  if test ! -z "$lasterr"; then
+	    errstatus=$lasterr
+	  fi
+	fi
+      fi
+    fi
+
+    pathcomp=$pathcomp/
+  done
+done
+
+exit $errstatus
+
+# Local Variables:
+# mode: shell-script
+# sh-indentation: 2
+# eval: (add-hook 'write-file-hooks 'time-stamp)
+# time-stamp-start: "scriptversion="
+# time-stamp-format: "%:y-%02m-%02d.%02H"
+# time-stamp-time-zone: "UTC"
+# time-stamp-end: "; # UTC"
+# End:
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/lto-wrapper.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/libexec/gcc/tc32-elf/4.5.1-tc32-1.3/lto-wrapper.exe
new file mode 100644
index 00000000..762d3292
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/as.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/as.info
new file mode 100644
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--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/as.info
@@ -0,0 +1,22044 @@
+This is as.info, produced by makeinfo version 4.13 from ../../../../binutils-2.20/gas/doc/as.texinfo.
+
+START-INFO-DIR-ENTRY
+* As: (as).                     The GNU assembler.
+* Gas: (as).                    The GNU assembler.
+END-INFO-DIR-ENTRY
+
+   This file documents the GNU Assembler "as".
+
+   Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: as.info,  Node: Top,  Next: Overview,  Up: (dir)
+
+Using as
+********
+
+This file is a user guide to the GNU assembler `as' (GNU Binutils)
+version 2.20.
+
+   This document is distributed under the terms of the GNU Free
+Documentation License.  A copy of the license is included in the
+section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* Overview::                    Overview
+* Invoking::                    Command-Line Options
+* Syntax::                      Syntax
+* Sections::                    Sections and Relocation
+* Symbols::                     Symbols
+* Expressions::                 Expressions
+* Pseudo Ops::                  Assembler Directives
+
+* Object Attributes::           Object Attributes
+* Machine Dependencies::        Machine Dependent Features
+* Reporting Bugs::              Reporting Bugs
+* Acknowledgements::            Who Did What
+* GNU Free Documentation License::  GNU Free Documentation License
+* AS Index::                    AS Index
+
+
+File: as.info,  Node: Overview,  Next: Invoking,  Prev: Top,  Up: Top
+
+1 Overview
+**********
+
+Here is a brief summary of how to invoke `as'.  For details, see *note
+Command-Line Options: Invoking.
+
+     as [-a[cdghlns][=FILE]] [-alternate] [-D]
+      [-debug-prefix-map OLD=NEW]
+      [-defsym SYM=VAL] [-f] [-g] [-gstabs]
+      [-gstabs+] [-gdwarf-2] [-help] [-I DIR] [-J]
+      [-K] [-L] [-listing-lhs-width=NUM]
+      [-listing-lhs-width2=NUM] [-listing-rhs-width=NUM]
+      [-listing-cont-lines=NUM] [-keep-locals] [-o
+      OBJFILE] [-R] [-reduce-memory-overheads] [-statistics]
+      [-v] [-version] [-version] [-W] [-warn]
+      [-fatal-warnings] [-w] [-x] [-Z] [@FILE]
+      [-target-help] [TARGET-OPTIONS]
+      [-|FILES ...]
+
+     _Target Alpha options:_
+        [-mCPU]
+        [-mdebug | -no-mdebug]
+        [-replace | -noreplace]
+        [-relax] [-g] [-GSIZE]
+        [-F] [-32addr]
+
+     _Target ARC options:_
+        [-marc[5|6|7|8]]
+        [-EB|-EL]
+
+     _Target ARM options:_
+        [-mcpu=PROCESSOR[+EXTENSION...]]
+        [-march=ARCHITECTURE[+EXTENSION...]]
+        [-mfpu=FLOATING-POINT-FORMAT]
+        [-mfloat-abi=ABI]
+        [-meabi=VER]
+        [-mthumb]
+        [-EB|-EL]
+        [-mapcs-32|-mapcs-26|-mapcs-float|
+         -mapcs-reentrant]
+        [-mthumb-interwork] [-k]
+
+     _Target CRIS options:_
+        [-underscore | -no-underscore]
+        [-pic] [-N]
+        [-emulation=criself | -emulation=crisaout]
+        [-march=v0_v10 | -march=v10 | -march=v32 | -march=common_v10_v32]
+
+     _Target D10V options:_
+        [-O]
+
+     _Target D30V options:_
+        [-O|-n|-N]
+
+     _Target H8/300 options:_
+        [-h-tick-hex]
+
+     _Target i386 options:_
+        [-32|-64] [-n]
+        [-march=CPU[+EXTENSION...]] [-mtune=CPU]
+
+     _Target i960 options:_
+        [-ACA|-ACA_A|-ACB|-ACC|-AKA|-AKB|
+         -AKC|-AMC]
+        [-b] [-no-relax]
+
+     _Target IA-64 options:_
+        [-mconstant-gp|-mauto-pic]
+        [-milp32|-milp64|-mlp64|-mp64]
+        [-mle|mbe]
+        [-mtune=itanium1|-mtune=itanium2]
+        [-munwind-check=warning|-munwind-check=error]
+        [-mhint.b=ok|-mhint.b=warning|-mhint.b=error]
+        [-x|-xexplicit] [-xauto] [-xdebug]
+
+     _Target IP2K options:_
+        [-mip2022|-mip2022ext]
+
+     _Target M32C options:_
+        [-m32c|-m16c] [-relax] [-h-tick-hex]
+
+     _Target M32R options:_
+        [-m32rx|-[no-]warn-explicit-parallel-conflicts|
+        -W[n]p]
+
+     _Target M680X0 options:_
+        [-l] [-m68000|-m68010|-m68020|...]
+
+     _Target M68HC11 options:_
+        [-m68hc11|-m68hc12|-m68hcs12]
+        [-mshort|-mlong]
+        [-mshort-double|-mlong-double]
+        [-force-long-branches] [-short-branches]
+        [-strict-direct-mode] [-print-insn-syntax]
+        [-print-opcodes] [-generate-example]
+
+     _Target MCORE options:_
+        [-jsri2bsr] [-sifilter] [-relax]
+        [-mcpu=[210|340]]
+     _Target MICROBLAZE options:_
+
+     _Target MIPS options:_
+        [-nocpp] [-EL] [-EB] [-O[OPTIMIZATION LEVEL]]
+        [-g[DEBUG LEVEL]] [-G NUM] [-KPIC] [-call_shared]
+        [-non_shared] [-xgot [-mvxworks-pic]
+        [-mabi=ABI] [-32] [-n32] [-64] [-mfp32] [-mgp32]
+        [-march=CPU] [-mtune=CPU] [-mips1] [-mips2]
+        [-mips3] [-mips4] [-mips5] [-mips32] [-mips32r2]
+        [-mips64] [-mips64r2]
+        [-construct-floats] [-no-construct-floats]
+        [-trap] [-no-break] [-break] [-no-trap]
+        [-mfix7000] [-mno-fix7000]
+        [-mips16] [-no-mips16]
+        [-msmartmips] [-mno-smartmips]
+        [-mips3d] [-no-mips3d]
+        [-mdmx] [-no-mdmx]
+        [-mdsp] [-mno-dsp]
+        [-mdspr2] [-mno-dspr2]
+        [-mmt] [-mno-mt]
+        [-mdebug] [-no-mdebug]
+        [-mpdr] [-mno-pdr]
+
+     _Target MMIX options:_
+        [-fixed-special-register-names] [-globalize-symbols]
+        [-gnu-syntax] [-relax] [-no-predefined-symbols]
+        [-no-expand] [-no-merge-gregs] [-x]
+        [-linker-allocated-gregs]
+
+     _Target PDP11 options:_
+        [-mpic|-mno-pic] [-mall] [-mno-extensions]
+        [-mEXTENSION|-mno-EXTENSION]
+        [-mCPU] [-mMACHINE]
+
+     _Target picoJava options:_
+        [-mb|-me]
+
+     _Target PowerPC options:_
+        [-mpwrx|-mpwr2|-mpwr|-m601|-mppc|-mppc32|-m603|-m604|
+         -m403|-m405|-mppc64|-m620|-mppc64bridge|-mbooke]
+        [-mcom|-many|-maltivec|-mvsx] [-memb]
+        [-mregnames|-mno-regnames]
+        [-mrelocatable|-mrelocatable-lib]
+        [-mlittle|-mlittle-endian|-mbig|-mbig-endian]
+        [-msolaris|-mno-solaris]
+
+     _Target s390 options:_
+        [-m31|-m64] [-mesa|-mzarch] [-march=CPU]
+        [-mregnames|-mno-regnames]
+        [-mwarn-areg-zero]
+
+     _Target SCORE options:_
+        [-EB][-EL][-FIXDD][-NWARN]
+        [-SCORE5][-SCORE5U][-SCORE7][-SCORE3]
+        [-march=score7][-march=score3]
+        [-USE_R1][-KPIC][-O0][-G NUM][-V]
+
+     _Target SPARC options:_
+        [-Av6|-Av7|-Av8|-Asparclet|-Asparclite
+         -Av8plus|-Av8plusa|-Av9|-Av9a]
+        [-xarch=v8plus|-xarch=v8plusa] [-bump]
+        [-32|-64]
+
+     _Target TIC54X options:_
+      [-mcpu=54[123589]|-mcpu=54[56]lp] [-mfar-mode|-mf]
+      [-merrors-to-file <FILENAME>|-me <FILENAME>]
+
+
+     _Target Z80 options:_
+       [-z80] [-r800]
+       [ -ignore-undocumented-instructions] [-Wnud]
+       [ -ignore-unportable-instructions] [-Wnup]
+       [ -warn-undocumented-instructions] [-Wud]
+       [ -warn-unportable-instructions] [-Wup]
+       [ -forbid-undocumented-instructions] [-Fud]
+       [ -forbid-unportable-instructions] [-Fup]
+
+
+     _Target Xtensa options:_
+      [-[no-]text-section-literals] [-[no-]absolute-literals]
+      [-[no-]target-align] [-[no-]longcalls]
+      [-[no-]transform]
+      [-rename-section OLDNAME=NEWNAME]
+
+`@FILE'
+     Read command-line options from FILE.  The options read are
+     inserted in place of the original @FILE option.  If FILE does not
+     exist, or cannot be read, then the option will be treated
+     literally, and not removed.
+
+     Options in FILE are separated by whitespace.  A whitespace
+     character may be included in an option by surrounding the entire
+     option in either single or double quotes.  Any character
+     (including a backslash) may be included by prefixing the character
+     to be included with a backslash.  The FILE may itself contain
+     additional @FILE options; any such options will be processed
+     recursively.
+
+`-a[cdghlmns]'
+     Turn on listings, in any of a variety of ways:
+
+    `-ac'
+          omit false conditionals
+
+    `-ad'
+          omit debugging directives
+
+    `-ag'
+          include general information, like as version and options
+          passed
+
+    `-ah'
+          include high-level source
+
+    `-al'
+          include assembly
+
+    `-am'
+          include macro expansions
+
+    `-an'
+          omit forms processing
+
+    `-as'
+          include symbols
+
+    `=file'
+          set the name of the listing file
+
+     You may combine these options; for example, use `-aln' for assembly
+     listing without forms processing.  The `=file' option, if used,
+     must be the last one.  By itself, `-a' defaults to `-ahls'.
+
+`--alternate'
+     Begin in alternate macro mode.  *Note `.altmacro': Altmacro.
+
+`-D'
+     Ignored.  This option is accepted for script compatibility with
+     calls to other assemblers.
+
+`--debug-prefix-map OLD=NEW'
+     When assembling files in directory `OLD', record debugging
+     information describing them as in `NEW' instead.
+
+`--defsym SYM=VALUE'
+     Define the symbol SYM to be VALUE before assembling the input file.
+     VALUE must be an integer constant.  As in C, a leading `0x'
+     indicates a hexadecimal value, and a leading `0' indicates an octal
+     value.  The value of the symbol can be overridden inside a source
+     file via the use of a `.set' pseudo-op.
+
+`-f'
+     "fast"--skip whitespace and comment preprocessing (assume source is
+     compiler output).
+
+`-g'
+`--gen-debug'
+     Generate debugging information for each assembler source line
+     using whichever debug format is preferred by the target.  This
+     currently means either STABS, ECOFF or DWARF2.
+
+`--gstabs'
+     Generate stabs debugging information for each assembler line.  This
+     may help debugging assembler code, if the debugger can handle it.
+
+`--gstabs+'
+     Generate stabs debugging information for each assembler line, with
+     GNU extensions that probably only gdb can handle, and that could
+     make other debuggers crash or refuse to read your program.  This
+     may help debugging assembler code.  Currently the only GNU
+     extension is the location of the current working directory at
+     assembling time.
+
+`--gdwarf-2'
+     Generate DWARF2 debugging information for each assembler line.
+     This may help debugging assembler code, if the debugger can handle
+     it.  Note--this option is only supported by some targets, not all
+     of them.
+
+`--help'
+     Print a summary of the command line options and exit.
+
+`--target-help'
+     Print a summary of all target specific options and exit.
+
+`-I DIR'
+     Add directory DIR to the search list for `.include' directives.
+
+`-J'
+     Don't warn about signed overflow.
+
+`-K'
+     Issue warnings when difference tables altered for long
+     displacements.
+
+`-L'
+`--keep-locals'
+     Keep (in the symbol table) local symbols.  These symbols start with
+     system-specific local label prefixes, typically `.L' for ELF
+     systems or `L' for traditional a.out systems.  *Note Symbol
+     Names::.
+
+`--listing-lhs-width=NUMBER'
+     Set the maximum width, in words, of the output data column for an
+     assembler listing to NUMBER.
+
+`--listing-lhs-width2=NUMBER'
+     Set the maximum width, in words, of the output data column for
+     continuation lines in an assembler listing to NUMBER.
+
+`--listing-rhs-width=NUMBER'
+     Set the maximum width of an input source line, as displayed in a
+     listing, to NUMBER bytes.
+
+`--listing-cont-lines=NUMBER'
+     Set the maximum number of lines printed in a listing for a single
+     line of input to NUMBER + 1.
+
+`-o OBJFILE'
+     Name the object-file output from `as' OBJFILE.
+
+`-R'
+     Fold the data section into the text section.
+
+     Set the default size of GAS's hash tables to a prime number close
+     to NUMBER.  Increasing this value can reduce the length of time it
+     takes the assembler to perform its tasks, at the expense of
+     increasing the assembler's memory requirements.  Similarly
+     reducing this value can reduce the memory requirements at the
+     expense of speed.
+
+`--reduce-memory-overheads'
+     This option reduces GAS's memory requirements, at the expense of
+     making the assembly processes slower.  Currently this switch is a
+     synonym for `--hash-size=4051', but in the future it may have
+     other effects as well.
+
+`--statistics'
+     Print the maximum space (in bytes) and total time (in seconds)
+     used by assembly.
+
+`--strip-local-absolute'
+     Remove local absolute symbols from the outgoing symbol table.
+
+`-v'
+`-version'
+     Print the `as' version.
+
+`--version'
+     Print the `as' version and exit.
+
+`-W'
+`--no-warn'
+     Suppress warning messages.
+
+`--fatal-warnings'
+     Treat warnings as errors.
+
+`--warn'
+     Don't suppress warning messages or treat them as errors.
+
+`-w'
+     Ignored.
+
+`-x'
+     Ignored.
+
+`-Z'
+     Generate an object file even after errors.
+
+`-- | FILES ...'
+     Standard input, or source files to assemble.
+
+
+   The following options are available when as is configured for an ARC
+processor.
+
+`-marc[5|6|7|8]'
+     This option selects the core processor variant.
+
+`-EB | -EL'
+     Select either big-endian (-EB) or little-endian (-EL) output.
+
+   The following options are available when as is configured for the ARM
+processor family.
+
+`-mcpu=PROCESSOR[+EXTENSION...]'
+     Specify which ARM processor variant is the target.
+
+`-march=ARCHITECTURE[+EXTENSION...]'
+     Specify which ARM architecture variant is used by the target.
+
+`-mfpu=FLOATING-POINT-FORMAT'
+     Select which Floating Point architecture is the target.
+
+`-mfloat-abi=ABI'
+     Select which floating point ABI is in use.
+
+`-mthumb'
+     Enable Thumb only instruction decoding.
+
+`-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant'
+     Select which procedure calling convention is in use.
+
+`-EB | -EL'
+     Select either big-endian (-EB) or little-endian (-EL) output.
+
+`-mthumb-interwork'
+     Specify that the code has been generated with interworking between
+     Thumb and ARM code in mind.
+
+`-k'
+     Specify that PIC code has been generated.
+
+   See the info pages for documentation of the CRIS-specific options.
+
+   The following options are available when as is configured for a D10V
+processor.
+`-O'
+     Optimize output by parallelizing instructions.
+
+   The following options are available when as is configured for a D30V
+processor.
+`-O'
+     Optimize output by parallelizing instructions.
+
+`-n'
+     Warn when nops are generated.
+
+`-N'
+     Warn when a nop after a 32-bit multiply instruction is generated.
+
+   The following options are available when as is configured for the
+Intel 80960 processor.
+
+`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
+     Specify which variant of the 960 architecture is the target.
+
+`-b'
+     Add code to collect statistics about branches taken.
+
+`-no-relax'
+     Do not alter compare-and-branch instructions for long
+     displacements; error if necessary.
+
+
+   The following options are available when as is configured for the
+Ubicom IP2K series.
+
+`-mip2022ext'
+     Specifies that the extended IP2022 instructions are allowed.
+
+`-mip2022'
+     Restores the default behaviour, which restricts the permitted
+     instructions to just the basic IP2022 ones.
+
+
+   The following options are available when as is configured for the
+Renesas M32C and M16C processors.
+
+`-m32c'
+     Assemble M32C instructions.
+
+`-m16c'
+     Assemble M16C instructions (the default).
+
+`-relax'
+     Enable support for link-time relaxations.
+
+`-h-tick-hex'
+     Support H'00 style hex constants in addition to 0x00 style.
+
+
+   The following options are available when as is configured for the
+Renesas M32R (formerly Mitsubishi M32R) series.
+
+`--m32rx'
+     Specify which processor in the M32R family is the target.  The
+     default is normally the M32R, but this option changes it to the
+     M32RX.
+
+`--warn-explicit-parallel-conflicts or --Wp'
+     Produce warning messages when questionable parallel constructs are
+     encountered.
+
+`--no-warn-explicit-parallel-conflicts or --Wnp'
+     Do not produce warning messages when questionable parallel
+     constructs are encountered.
+
+
+   The following options are available when as is configured for the
+Motorola 68000 series.
+
+`-l'
+     Shorten references to undefined symbols, to one word instead of
+     two.
+
+`-m68000 | -m68008 | -m68010 | -m68020 | -m68030'
+`| -m68040 | -m68060 | -m68302 | -m68331 | -m68332'
+`| -m68333 | -m68340 | -mcpu32 | -m5200'
+     Specify what processor in the 68000 family is the target.  The
+     default is normally the 68020, but this can be changed at
+     configuration time.
+
+`-m68881 | -m68882 | -mno-68881 | -mno-68882'
+     The target machine does (or does not) have a floating-point
+     coprocessor.  The default is to assume a coprocessor for 68020,
+     68030, and cpu32.  Although the basic 68000 is not compatible with
+     the 68881, a combination of the two can be specified, since it's
+     possible to do emulation of the coprocessor instructions with the
+     main processor.
+
+`-m68851 | -mno-68851'
+     The target machine does (or does not) have a memory-management
+     unit coprocessor.  The default is to assume an MMU for 68020 and
+     up.
+
+
+   For details about the PDP-11 machine dependent features options, see
+*note PDP-11-Options::.
+
+`-mpic | -mno-pic'
+     Generate position-independent (or position-dependent) code.  The
+     default is `-mpic'.
+
+`-mall'
+`-mall-extensions'
+     Enable all instruction set extensions.  This is the default.
+
+`-mno-extensions'
+     Disable all instruction set extensions.
+
+`-mEXTENSION | -mno-EXTENSION'
+     Enable (or disable) a particular instruction set extension.
+
+`-mCPU'
+     Enable the instruction set extensions supported by a particular
+     CPU, and disable all other extensions.
+
+`-mMACHINE'
+     Enable the instruction set extensions supported by a particular
+     machine model, and disable all other extensions.
+
+   The following options are available when as is configured for a
+picoJava processor.
+
+`-mb'
+     Generate "big endian" format output.
+
+`-ml'
+     Generate "little endian" format output.
+
+
+   The following options are available when as is configured for the
+Motorola 68HC11 or 68HC12 series.
+
+`-m68hc11 | -m68hc12 | -m68hcs12'
+     Specify what processor is the target.  The default is defined by
+     the configuration option when building the assembler.
+
+`-mshort'
+     Specify to use the 16-bit integer ABI.
+
+`-mlong'
+     Specify to use the 32-bit integer ABI.
+
+`-mshort-double'
+     Specify to use the 32-bit double ABI.
+
+`-mlong-double'
+     Specify to use the 64-bit double ABI.
+
+`--force-long-branches'
+     Relative branches are turned into absolute ones. This concerns
+     conditional branches, unconditional branches and branches to a sub
+     routine.
+
+`-S | --short-branches'
+     Do not turn relative branches into absolute ones when the offset
+     is out of range.
+
+`--strict-direct-mode'
+     Do not turn the direct addressing mode into extended addressing
+     mode when the instruction does not support direct addressing mode.
+
+`--print-insn-syntax'
+     Print the syntax of instruction in case of error.
+
+`--print-opcodes'
+     print the list of instructions with syntax and then exit.
+
+`--generate-example'
+     print an example of instruction for each possible instruction and
+     then exit.  This option is only useful for testing `as'.
+
+
+   The following options are available when `as' is configured for the
+SPARC architecture:
+
+`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
+`-Av8plus | -Av8plusa | -Av9 | -Av9a'
+     Explicitly select a variant of the SPARC architecture.
+
+     `-Av8plus' and `-Av8plusa' select a 32 bit environment.  `-Av9'
+     and `-Av9a' select a 64 bit environment.
+
+     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
+     UltraSPARC extensions.
+
+`-xarch=v8plus | -xarch=v8plusa'
+     For compatibility with the Solaris v9 assembler.  These options are
+     equivalent to -Av8plus and -Av8plusa, respectively.
+
+`-bump'
+     Warn when the assembler switches to another architecture.
+
+   The following options are available when as is configured for the
+'c54x architecture.
+
+`-mfar-mode'
+     Enable extended addressing mode.  All addresses and relocations
+     will assume extended addressing (usually 23 bits).
+
+`-mcpu=CPU_VERSION'
+     Sets the CPU version being compiled for.
+
+`-merrors-to-file FILENAME'
+     Redirect error output to a file, for broken systems which don't
+     support such behaviour in the shell.
+
+   The following options are available when as is configured for a MIPS
+processor.
+
+`-G NUM'
+     This option sets the largest size of an object that can be
+     referenced implicitly with the `gp' register.  It is only accepted
+     for targets that use ECOFF format, such as a DECstation running
+     Ultrix.  The default value is 8.
+
+`-EB'
+     Generate "big endian" format output.
+
+`-EL'
+     Generate "little endian" format output.
+
+`-mips1'
+`-mips2'
+`-mips3'
+`-mips4'
+`-mips5'
+`-mips32'
+`-mips32r2'
+`-mips64'
+`-mips64r2'
+     Generate code for a particular MIPS Instruction Set Architecture
+     level.  `-mips1' is an alias for `-march=r3000', `-mips2' is an
+     alias for `-march=r6000', `-mips3' is an alias for `-march=r4000'
+     and `-mips4' is an alias for `-march=r8000'.  `-mips5', `-mips32',
+     `-mips32r2', `-mips64', and `-mips64r2' correspond to generic
+     `MIPS V', `MIPS32', `MIPS32 Release 2', `MIPS64', and `MIPS64
+     Release 2' ISA processors, respectively.
+
+`-march=CPU'
+     Generate code for a particular MIPS cpu.
+
+`-mtune=CPU'
+     Schedule and tune for a particular MIPS cpu.
+
+`-mfix7000'
+`-mno-fix7000'
+     Cause nops to be inserted if the read of the destination register
+     of an mfhi or mflo instruction occurs in the following two
+     instructions.
+
+`-mdebug'
+`-no-mdebug'
+     Cause stabs-style debugging output to go into an ECOFF-style
+     .mdebug section instead of the standard ELF .stabs sections.
+
+`-mpdr'
+`-mno-pdr'
+     Control generation of `.pdr' sections.
+
+`-mgp32'
+`-mfp32'
+     The register sizes are normally inferred from the ISA and ABI, but
+     these flags force a certain group of registers to be treated as 32
+     bits wide at all times.  `-mgp32' controls the size of
+     general-purpose registers and `-mfp32' controls the size of
+     floating-point registers.
+
+`-mips16'
+`-no-mips16'
+     Generate code for the MIPS 16 processor.  This is equivalent to
+     putting `.set mips16' at the start of the assembly file.
+     `-no-mips16' turns off this option.
+
+`-msmartmips'
+`-mno-smartmips'
+     Enables the SmartMIPS extension to the MIPS32 instruction set.
+     This is equivalent to putting `.set smartmips' at the start of the
+     assembly file.  `-mno-smartmips' turns off this option.
+
+`-mips3d'
+`-no-mips3d'
+     Generate code for the MIPS-3D Application Specific Extension.
+     This tells the assembler to accept MIPS-3D instructions.
+     `-no-mips3d' turns off this option.
+
+`-mdmx'
+`-no-mdmx'
+     Generate code for the MDMX Application Specific Extension.  This
+     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
+     off this option.
+
+`-mdsp'
+`-mno-dsp'
+     Generate code for the DSP Release 1 Application Specific Extension.
+     This tells the assembler to accept DSP Release 1 instructions.
+     `-mno-dsp' turns off this option.
+
+`-mdspr2'
+`-mno-dspr2'
+     Generate code for the DSP Release 2 Application Specific Extension.
+     This option implies -mdsp.  This tells the assembler to accept DSP
+     Release 2 instructions.  `-mno-dspr2' turns off this option.
+
+`-mmt'
+`-mno-mt'
+     Generate code for the MT Application Specific Extension.  This
+     tells the assembler to accept MT instructions.  `-mno-mt' turns
+     off this option.
+
+`--construct-floats'
+`--no-construct-floats'
+     The `--no-construct-floats' option disables the construction of
+     double width floating point constants by loading the two halves of
+     the value into the two single width floating point registers that
+     make up the double width register.  By default
+     `--construct-floats' is selected, allowing construction of these
+     floating point constants.
+
+`--emulation=NAME'
+     This option causes `as' to emulate `as' configured for some other
+     target, in all respects, including output format (choosing between
+     ELF and ECOFF only), handling of pseudo-opcodes which may generate
+     debugging information or store symbol table information, and
+     default endianness.  The available configuration names are:
+     `mipsecoff', `mipself', `mipslecoff', `mipsbecoff', `mipslelf',
+     `mipsbelf'.  The first two do not alter the default endianness
+     from that of the primary target for which the assembler was
+     configured; the others change the default to little- or big-endian
+     as indicated by the `b' or `l' in the name.  Using `-EB' or `-EL'
+     will override the endianness selection in any case.
+
+     This option is currently supported only when the primary target
+     `as' is configured for is a MIPS ELF or ECOFF target.
+     Furthermore, the primary target or others specified with
+     `--enable-targets=...' at configuration time must include support
+     for the other format, if both are to be available.  For example,
+     the Irix 5 configuration includes support for both.
+
+     Eventually, this option will support more configurations, with more
+     fine-grained control over the assembler's behavior, and will be
+     supported for more processors.
+
+`-nocpp'
+     `as' ignores this option.  It is accepted for compatibility with
+     the native tools.
+
+`--trap'
+`--no-trap'
+`--break'
+`--no-break'
+     Control how to deal with multiplication overflow and division by
+     zero.  `--trap' or `--no-break' (which are synonyms) take a trap
+     exception (and only work for Instruction Set Architecture level 2
+     and higher); `--break' or `--no-trap' (also synonyms, and the
+     default) take a break exception.
+
+`-n'
+     When this option is used, `as' will issue a warning every time it
+     generates a nop instruction from a macro.
+
+   The following options are available when as is configured for an
+MCore processor.
+
+`-jsri2bsr'
+`-nojsri2bsr'
+     Enable or disable the JSRI to BSR transformation.  By default this
+     is enabled.  The command line option `-nojsri2bsr' can be used to
+     disable it.
+
+`-sifilter'
+`-nosifilter'
+     Enable or disable the silicon filter behaviour.  By default this
+     is disabled.  The default can be overridden by the `-sifilter'
+     command line option.
+
+`-relax'
+     Alter jump instructions for long displacements.
+
+`-mcpu=[210|340]'
+     Select the cpu type on the target hardware.  This controls which
+     instructions can be assembled.
+
+`-EB'
+     Assemble for a big endian target.
+
+`-EL'
+     Assemble for a little endian target.
+
+
+   See the info pages for documentation of the MMIX-specific options.
+
+   The following options are available when as is configured for the
+s390 processor family.
+
+`-m31'
+`-m64'
+     Select the word size, either 31/32 bits or 64 bits.
+
+`-mesa'
+
+`-mzarch'
+     Select the architecture mode, either the Enterprise System
+     Architecture (esa) or the z/Architecture mode (zarch).
+
+`-march=PROCESSOR'
+     Specify which s390 processor variant is the target, `g6', `g6',
+     `z900', `z990', `z9-109', `z9-ec', or `z10'.
+
+`-mregnames'
+`-mno-regnames'
+     Allow or disallow symbolic names for registers.
+
+`-mwarn-areg-zero'
+     Warn whenever the operand for a base or index register has been
+     specified but evaluates to zero.
+
+   The following options are available when as is configured for an
+Xtensa processor.
+
+`--text-section-literals | --no-text-section-literals'
+     With `--text-section-literals', literal pools are interspersed in
+     the text section.  The default is `--no-text-section-literals',
+     which places literals in a separate section in the output file.
+     These options only affect literals referenced via PC-relative
+     `L32R' instructions; literals for absolute mode `L32R'
+     instructions are handled separately.
+
+`--absolute-literals | --no-absolute-literals'
+     Indicate to the assembler whether `L32R' instructions use absolute
+     or PC-relative addressing.  The default is to assume absolute
+     addressing if the Xtensa processor includes the absolute `L32R'
+     addressing option.  Otherwise, only the PC-relative `L32R' mode
+     can be used.
+
+`--target-align | --no-target-align'
+     Enable or disable automatic alignment to reduce branch penalties
+     at the expense of some code density.  The default is
+     `--target-align'.
+
+`--longcalls | --no-longcalls'
+     Enable or disable transformation of call instructions to allow
+     calls across a greater range of addresses.  The default is
+     `--no-longcalls'.
+
+`--transform | --no-transform'
+     Enable or disable all assembler transformations of Xtensa
+     instructions.  The default is `--transform'; `--no-transform'
+     should be used only in the rare cases when the instructions must
+     be exactly as specified in the assembly source.
+
+`--rename-section OLDNAME=NEWNAME'
+     When generating output sections, rename the OLDNAME section to
+     NEWNAME.
+
+   The following options are available when as is configured for a Z80
+family processor.
+`-z80'
+     Assemble for Z80 processor.
+
+`-r800'
+     Assemble for R800 processor.
+
+`-ignore-undocumented-instructions'
+`-Wnud'
+     Assemble undocumented Z80 instructions that also work on R800
+     without warning.
+
+`-ignore-unportable-instructions'
+`-Wnup'
+     Assemble all undocumented Z80 instructions without warning.
+
+`-warn-undocumented-instructions'
+`-Wud'
+     Issue a warning for undocumented Z80 instructions that also work
+     on R800.
+
+`-warn-unportable-instructions'
+`-Wup'
+     Issue a warning for undocumented Z80 instructions that do not work
+     on R800.
+
+`-forbid-undocumented-instructions'
+`-Fud'
+     Treat all undocumented instructions as errors.
+
+`-forbid-unportable-instructions'
+`-Fup'
+     Treat undocumented Z80 instructions that do not work on R800 as
+     errors.
+
+* Menu:
+
+* Manual::                      Structure of this Manual
+* GNU Assembler::               The GNU Assembler
+* Object Formats::              Object File Formats
+* Command Line::                Command Line
+* Input Files::                 Input Files
+* Object::                      Output (Object) File
+* Errors::                      Error and Warning Messages
+
+
+File: as.info,  Node: Manual,  Next: GNU Assembler,  Up: Overview
+
+1.1 Structure of this Manual
+============================
+
+This manual is intended to describe what you need to know to use GNU
+`as'.  We cover the syntax expected in source files, including notation
+for symbols, constants, and expressions; the directives that `as'
+understands; and of course how to invoke `as'.
+
+   This manual also describes some of the machine-dependent features of
+various flavors of the assembler.
+
+   On the other hand, this manual is _not_ intended as an introduction
+to programming in assembly language--let alone programming in general!
+In a similar vein, we make no attempt to introduce the machine
+architecture; we do _not_ describe the instruction set, standard
+mnemonics, registers or addressing modes that are standard to a
+particular architecture.  You may want to consult the manufacturer's
+machine architecture manual for this information.
+
+
+File: as.info,  Node: GNU Assembler,  Next: Object Formats,  Prev: Manual,  Up: Overview
+
+1.2 The GNU Assembler
+=====================
+
+GNU `as' is really a family of assemblers.  If you use (or have used)
+the GNU assembler on one architecture, you should find a fairly similar
+environment when you use it on another architecture.  Each version has
+much in common with the others, including object file formats, most
+assembler directives (often called "pseudo-ops") and assembler syntax.
+
+   `as' is primarily intended to assemble the output of the GNU C
+compiler `gcc' for use by the linker `ld'.  Nevertheless, we've tried
+to make `as' assemble correctly everything that other assemblers for
+the same machine would assemble.  Any exceptions are documented
+explicitly (*note Machine Dependencies::).  This doesn't mean `as'
+always uses the same syntax as another assembler for the same
+architecture; for example, we know of several incompatible versions of
+680x0 assembly language syntax.
+
+   Unlike older assemblers, `as' is designed to assemble a source
+program in one pass of the source file.  This has a subtle impact on the
+`.org' directive (*note `.org': Org.).
+
+
+File: as.info,  Node: Object Formats,  Next: Command Line,  Prev: GNU Assembler,  Up: Overview
+
+1.3 Object File Formats
+=======================
+
+The GNU assembler can be configured to produce several alternative
+object file formats.  For the most part, this does not affect how you
+write assembly language programs; but directives for debugging symbols
+are typically different in different file formats.  *Note Symbol
+Attributes: Symbol Attributes.
+
+
+File: as.info,  Node: Command Line,  Next: Input Files,  Prev: Object Formats,  Up: Overview
+
+1.4 Command Line
+================
+
+After the program name `as', the command line may contain options and
+file names.  Options may appear in any order, and may be before, after,
+or between file names.  The order of file names is significant.
+
+   `--' (two hyphens) by itself names the standard input file
+explicitly, as one of the files for `as' to assemble.
+
+   Except for `--' any command line argument that begins with a hyphen
+(`-') is an option.  Each option changes the behavior of `as'.  No
+option changes the way another option works.  An option is a `-'
+followed by one or more letters; the case of the letter is important.
+All options are optional.
+
+   Some options expect exactly one file name to follow them.  The file
+name may either immediately follow the option's letter (compatible with
+older assemblers) or it may be the next command argument (GNU
+standard).  These two command lines are equivalent:
+
+     as -o my-object-file.o mumble.s
+     as -omy-object-file.o mumble.s
+
+
+File: as.info,  Node: Input Files,  Next: Object,  Prev: Command Line,  Up: Overview
+
+1.5 Input Files
+===============
+
+We use the phrase "source program", abbreviated "source", to describe
+the program input to one run of `as'.  The program may be in one or
+more files; how the source is partitioned into files doesn't change the
+meaning of the source.
+
+   The source program is a concatenation of the text in all the files,
+in the order specified.
+
+   Each time you run `as' it assembles exactly one source program.  The
+source program is made up of one or more files.  (The standard input is
+also a file.)
+
+   You give `as' a command line that has zero or more input file names.
+The input files are read (from left file name to right).  A command
+line argument (in any position) that has no special meaning is taken to
+be an input file name.
+
+   If you give `as' no file names it attempts to read one input file
+from the `as' standard input, which is normally your terminal.  You may
+have to type <ctl-D> to tell `as' there is no more program to assemble.
+
+   Use `--' if you need to explicitly name the standard input file in
+your command line.
+
+   If the source is empty, `as' produces a small, empty object file.
+
+Filenames and Line-numbers
+--------------------------
+
+There are two ways of locating a line in the input file (or files) and
+either may be used in reporting error messages.  One way refers to a
+line number in a physical file; the other refers to a line number in a
+"logical" file.  *Note Error and Warning Messages: Errors.
+
+   "Physical files" are those files named in the command line given to
+`as'.
+
+   "Logical files" are simply names declared explicitly by assembler
+directives; they bear no relation to physical files.  Logical file
+names help error messages reflect the original source file, when `as'
+source is itself synthesized from other files.  `as' understands the
+`#' directives emitted by the `gcc' preprocessor.  See also *note
+`.file': File.
+
+
+File: as.info,  Node: Object,  Next: Errors,  Prev: Input Files,  Up: Overview
+
+1.6 Output (Object) File
+========================
+
+Every time you run `as' it produces an output file, which is your
+assembly language program translated into numbers.  This file is the
+object file.  Its default name is `a.out'.  You can give it another
+name by using the `-o' option.  Conventionally, object file names end
+with `.o'.  The default name is used for historical reasons: older
+assemblers were capable of assembling self-contained programs directly
+into a runnable program.  (For some formats, this isn't currently
+possible, but it can be done for the `a.out' format.)
+
+   The object file is meant for input to the linker `ld'.  It contains
+assembled program code, information to help `ld' integrate the
+assembled program into a runnable file, and (optionally) symbolic
+information for the debugger.
+
+
+File: as.info,  Node: Errors,  Prev: Object,  Up: Overview
+
+1.7 Error and Warning Messages
+==============================
+
+`as' may write warnings and error messages to the standard error file
+(usually your terminal).  This should not happen when  a compiler runs
+`as' automatically.  Warnings report an assumption made so that `as'
+could keep assembling a flawed program; errors report a grave problem
+that stops the assembly.
+
+   Warning messages have the format
+
+     file_name:NNN:Warning Message Text
+
+(where NNN is a line number).  If a logical file name has been given
+(*note `.file': File.) it is used for the filename, otherwise the name
+of the current input file is used.  If a logical line number was given
+(*note `.line': Line.)  then it is used to calculate the number printed,
+otherwise the actual line in the current source file is printed.  The
+message text is intended to be self explanatory (in the grand Unix
+tradition).
+
+   Error messages have the format
+     file_name:NNN:FATAL:Error Message Text
+   The file name and line number are derived as for warning messages.
+The actual message text may be rather less explanatory because many of
+them aren't supposed to happen.
+
+
+File: as.info,  Node: Invoking,  Next: Syntax,  Prev: Overview,  Up: Top
+
+2 Command-Line Options
+**********************
+
+This chapter describes command-line options available in _all_ versions
+of the GNU assembler; see *note Machine Dependencies::, for options
+specific to particular machine architectures.
+
+   If you are invoking `as' via the GNU C compiler, you can use the
+`-Wa' option to pass arguments through to the assembler.  The assembler
+arguments must be separated from each other (and the `-Wa') by commas.
+For example:
+
+     gcc -c -g -O -Wa,-alh,-L file.c
+
+This passes two options to the assembler: `-alh' (emit a listing to
+standard output with high-level and assembly source) and `-L' (retain
+local symbols in the symbol table).
+
+   Usually you do not need to use this `-Wa' mechanism, since many
+compiler command-line options are automatically passed to the assembler
+by the compiler.  (You can call the GNU compiler driver with the `-v'
+option to see precisely what options it passes to each compilation
+pass, including the assembler.)
+
+* Menu:
+
+* a::             -a[cdghlns] enable listings
+* alternate::     --alternate enable alternate macro syntax
+* D::             -D for compatibility
+* f::             -f to work faster
+* I::             -I for .include search path
+
+* K::             -K for difference tables
+
+* L::             -L to retain local symbols
+* listing::       --listing-XXX to configure listing output
+* M::		  -M or --mri to assemble in MRI compatibility mode
+* MD::            --MD for dependency tracking
+* o::             -o to name the object file
+* R::             -R to join data and text sections
+* statistics::    --statistics to see statistics about assembly
+* traditional-format:: --traditional-format for compatible output
+* v::             -v to announce version
+* W::             -W, --no-warn, --warn, --fatal-warnings to control warnings
+* Z::             -Z to make object file even after errors
+
+
+File: as.info,  Node: a,  Next: alternate,  Up: Invoking
+
+2.1 Enable Listings: `-a[cdghlns]'
+==================================
+
+These options enable listing output from the assembler.  By itself,
+`-a' requests high-level, assembly, and symbols listing.  You can use
+other letters to select specific options for the list: `-ah' requests a
+high-level language listing, `-al' requests an output-program assembly
+listing, and `-as' requests a symbol table listing.  High-level
+listings require that a compiler debugging option like `-g' be used,
+and that assembly listings (`-al') be requested also.
+
+   Use the `-ag' option to print a first section with general assembly
+information, like as version, switches passed, or time stamp.
+
+   Use the `-ac' option to omit false conditionals from a listing.  Any
+lines which are not assembled because of a false `.if' (or `.ifdef', or
+any other conditional), or a true `.if' followed by an `.else', will be
+omitted from the listing.
+
+   Use the `-ad' option to omit debugging directives from the listing.
+
+   Once you have specified one of these options, you can further control
+listing output and its appearance using the directives `.list',
+`.nolist', `.psize', `.eject', `.title', and `.sbttl'.  The `-an'
+option turns off all forms processing.  If you do not request listing
+output with one of the `-a' options, the listing-control directives
+have no effect.
+
+   The letters after `-a' may be combined into one option, _e.g._,
+`-aln'.
+
+   Note if the assembler source is coming from the standard input (e.g.,
+because it is being created by `gcc' and the `-pipe' command line switch
+is being used) then the listing will not contain any comments or
+preprocessor directives.  This is because the listing code buffers
+input source lines from stdin only after they have been preprocessed by
+the assembler.  This reduces memory usage and makes the code more
+efficient.
+
+
+File: as.info,  Node: alternate,  Next: D,  Prev: a,  Up: Invoking
+
+2.2 `--alternate'
+=================
+
+Begin in alternate macro mode, see *note `.altmacro': Altmacro.
+
+
+File: as.info,  Node: D,  Next: f,  Prev: alternate,  Up: Invoking
+
+2.3 `-D'
+========
+
+This option has no effect whatsoever, but it is accepted to make it more
+likely that scripts written for other assemblers also work with `as'.
+
+
+File: as.info,  Node: f,  Next: I,  Prev: D,  Up: Invoking
+
+2.4 Work Faster: `-f'
+=====================
+
+`-f' should only be used when assembling programs written by a
+(trusted) compiler.  `-f' stops the assembler from doing whitespace and
+comment preprocessing on the input file(s) before assembling them.
+*Note Preprocessing: Preprocessing.
+
+     _Warning:_ if you use `-f' when the files actually need to be
+     preprocessed (if they contain comments, for example), `as' does
+     not work correctly.
+
+
+File: as.info,  Node: I,  Next: K,  Prev: f,  Up: Invoking
+
+2.5 `.include' Search Path: `-I' PATH
+=====================================
+
+Use this option to add a PATH to the list of directories `as' searches
+for files specified in `.include' directives (*note `.include':
+Include.).  You may use `-I' as many times as necessary to include a
+variety of paths.  The current working directory is always searched
+first; after that, `as' searches any `-I' directories in the same order
+as they were specified (left to right) on the command line.
+
+
+File: as.info,  Node: K,  Next: L,  Prev: I,  Up: Invoking
+
+2.6 Difference Tables: `-K'
+===========================
+
+`as' sometimes alters the code emitted for directives of the form
+`.word SYM1-SYM2'.  *Note `.word': Word.  You can use the `-K' option
+if you want a warning issued when this is done.
+
+
+File: as.info,  Node: L,  Next: listing,  Prev: K,  Up: Invoking
+
+2.7 Include Local Symbols: `-L'
+===============================
+
+Symbols beginning with system-specific local label prefixes, typically
+`.L' for ELF systems or `L' for traditional a.out systems, are called
+"local symbols".  *Note Symbol Names::.  Normally you do not see such
+symbols when debugging, because they are intended for the use of
+programs (like compilers) that compose assembler programs, not for your
+notice.  Normally both `as' and `ld' discard such symbols, so you do
+not normally debug with them.
+
+   This option tells `as' to retain those local symbols in the object
+file.  Usually if you do this you also tell the linker `ld' to preserve
+those symbols.
+
+
+File: as.info,  Node: listing,  Next: M,  Prev: L,  Up: Invoking
+
+2.8 Configuring listing output: `--listing'
+===========================================
+
+The listing feature of the assembler can be enabled via the command
+line switch `-a' (*note a::).  This feature combines the input source
+file(s) with a hex dump of the corresponding locations in the output
+object file, and displays them as a listing file.  The format of this
+listing can be controlled by directives inside the assembler source
+(i.e., `.list' (*note List::), `.title' (*note Title::), `.sbttl'
+(*note Sbttl::), `.psize' (*note Psize::), and `.eject' (*note Eject::)
+and also by the following switches:
+
+`--listing-lhs-width=`number''
+     Sets the maximum width, in words, of the first line of the hex
+     byte dump.  This dump appears on the left hand side of the listing
+     output.
+
+`--listing-lhs-width2=`number''
+     Sets the maximum width, in words, of any further lines of the hex
+     byte dump for a given input source line.  If this value is not
+     specified, it defaults to being the same as the value specified
+     for `--listing-lhs-width'.  If neither switch is used the default
+     is to one.
+
+`--listing-rhs-width=`number''
+     Sets the maximum width, in characters, of the source line that is
+     displayed alongside the hex dump.  The default value for this
+     parameter is 100.  The source line is displayed on the right hand
+     side of the listing output.
+
+`--listing-cont-lines=`number''
+     Sets the maximum number of continuation lines of hex dump that
+     will be displayed for a given single line of source input.  The
+     default value is 4.
+
+
+File: as.info,  Node: M,  Next: MD,  Prev: listing,  Up: Invoking
+
+2.9 Assemble in MRI Compatibility Mode: `-M'
+============================================
+
+The `-M' or `--mri' option selects MRI compatibility mode.  This
+changes the syntax and pseudo-op handling of `as' to make it compatible
+with the `ASM68K' or the `ASM960' (depending upon the configured
+target) assembler from Microtec Research.  The exact nature of the MRI
+syntax will not be documented here; see the MRI manuals for more
+information.  Note in particular that the handling of macros and macro
+arguments is somewhat different.  The purpose of this option is to
+permit assembling existing MRI assembler code using `as'.
+
+   The MRI compatibility is not complete.  Certain operations of the
+MRI assembler depend upon its object file format, and can not be
+supported using other object file formats.  Supporting these would
+require enhancing each object file format individually.  These are:
+
+   * global symbols in common section
+
+     The m68k MRI assembler supports common sections which are merged
+     by the linker.  Other object file formats do not support this.
+     `as' handles common sections by treating them as a single common
+     symbol.  It permits local symbols to be defined within a common
+     section, but it can not support global symbols, since it has no
+     way to describe them.
+
+   * complex relocations
+
+     The MRI assemblers support relocations against a negated section
+     address, and relocations which combine the start addresses of two
+     or more sections.  These are not support by other object file
+     formats.
+
+   * `END' pseudo-op specifying start address
+
+     The MRI `END' pseudo-op permits the specification of a start
+     address.  This is not supported by other object file formats.  The
+     start address may instead be specified using the `-e' option to
+     the linker, or in a linker script.
+
+   * `IDNT', `.ident' and `NAME' pseudo-ops
+
+     The MRI `IDNT', `.ident' and `NAME' pseudo-ops assign a module
+     name to the output file.  This is not supported by other object
+     file formats.
+
+   * `ORG' pseudo-op
+
+     The m68k MRI `ORG' pseudo-op begins an absolute section at a given
+     address.  This differs from the usual `as' `.org' pseudo-op, which
+     changes the location within the current section.  Absolute
+     sections are not supported by other object file formats.  The
+     address of a section may be assigned within a linker script.
+
+   There are some other features of the MRI assembler which are not
+supported by `as', typically either because they are difficult or
+because they seem of little consequence.  Some of these may be
+supported in future releases.
+
+   * EBCDIC strings
+
+     EBCDIC strings are not supported.
+
+   * packed binary coded decimal
+
+     Packed binary coded decimal is not supported.  This means that the
+     `DC.P' and `DCB.P' pseudo-ops are not supported.
+
+   * `FEQU' pseudo-op
+
+     The m68k `FEQU' pseudo-op is not supported.
+
+   * `NOOBJ' pseudo-op
+
+     The m68k `NOOBJ' pseudo-op is not supported.
+
+   * `OPT' branch control options
+
+     The m68k `OPT' branch control options--`B', `BRS', `BRB', `BRL',
+     and `BRW'--are ignored.  `as' automatically relaxes all branches,
+     whether forward or backward, to an appropriate size, so these
+     options serve no purpose.
+
+   * `OPT' list control options
+
+     The following m68k `OPT' list control options are ignored: `C',
+     `CEX', `CL', `CRE', `E', `G', `I', `M', `MEX', `MC', `MD', `X'.
+
+   * other `OPT' options
+
+     The following m68k `OPT' options are ignored: `NEST', `O', `OLD',
+     `OP', `P', `PCO', `PCR', `PCS', `R'.
+
+   * `OPT' `D' option is default
+
+     The m68k `OPT' `D' option is the default, unlike the MRI assembler.
+     `OPT NOD' may be used to turn it off.
+
+   * `XREF' pseudo-op.
+
+     The m68k `XREF' pseudo-op is ignored.
+
+   * `.debug' pseudo-op
+
+     The i960 `.debug' pseudo-op is not supported.
+
+   * `.extended' pseudo-op
+
+     The i960 `.extended' pseudo-op is not supported.
+
+   * `.list' pseudo-op.
+
+     The various options of the i960 `.list' pseudo-op are not
+     supported.
+
+   * `.optimize' pseudo-op
+
+     The i960 `.optimize' pseudo-op is not supported.
+
+   * `.output' pseudo-op
+
+     The i960 `.output' pseudo-op is not supported.
+
+   * `.setreal' pseudo-op
+
+     The i960 `.setreal' pseudo-op is not supported.
+
+
+
+File: as.info,  Node: MD,  Next: o,  Prev: M,  Up: Invoking
+
+2.10 Dependency Tracking: `--MD'
+================================
+
+`as' can generate a dependency file for the file it creates.  This file
+consists of a single rule suitable for `make' describing the
+dependencies of the main source file.
+
+   The rule is written to the file named in its argument.
+
+   This feature is used in the automatic updating of makefiles.
+
+
+File: as.info,  Node: o,  Next: R,  Prev: MD,  Up: Invoking
+
+2.11 Name the Object File: `-o'
+===============================
+
+There is always one object file output when you run `as'.  By default
+it has the name `a.out' (or `b.out', for Intel 960 targets only).  You
+use this option (which takes exactly one filename) to give the object
+file a different name.
+
+   Whatever the object file is called, `as' overwrites any existing
+file of the same name.
+
+
+File: as.info,  Node: R,  Next: statistics,  Prev: o,  Up: Invoking
+
+2.12 Join Data and Text Sections: `-R'
+======================================
+
+`-R' tells `as' to write the object file as if all data-section data
+lives in the text section.  This is only done at the very last moment:
+your binary data are the same, but data section parts are relocated
+differently.  The data section part of your object file is zero bytes
+long because all its bytes are appended to the text section.  (*Note
+Sections and Relocation: Sections.)
+
+   When you specify `-R' it would be possible to generate shorter
+address displacements (because we do not have to cross between text and
+data section).  We refrain from doing this simply for compatibility with
+older versions of `as'.  In future, `-R' may work this way.
+
+   When `as' is configured for COFF or ELF output, this option is only
+useful if you use sections named `.text' and `.data'.
+
+   `-R' is not supported for any of the HPPA targets.  Using `-R'
+generates a warning from `as'.
+
+
+File: as.info,  Node: statistics,  Next: traditional-format,  Prev: R,  Up: Invoking
+
+2.13 Display Assembly Statistics: `--statistics'
+================================================
+
+Use `--statistics' to display two statistics about the resources used by
+`as': the maximum amount of space allocated during the assembly (in
+bytes), and the total execution time taken for the assembly (in CPU
+seconds).
+
+
+File: as.info,  Node: traditional-format,  Next: v,  Prev: statistics,  Up: Invoking
+
+2.14 Compatible Output: `--traditional-format'
+==============================================
+
+For some targets, the output of `as' is different in some ways from the
+output of some existing assembler.  This switch requests `as' to use
+the traditional format instead.
+
+   For example, it disables the exception frame optimizations which
+`as' normally does by default on `gcc' output.
+
+
+File: as.info,  Node: v,  Next: W,  Prev: traditional-format,  Up: Invoking
+
+2.15 Announce Version: `-v'
+===========================
+
+You can find out what version of as is running by including the option
+`-v' (which you can also spell as `-version') on the command line.
+
+
+File: as.info,  Node: W,  Next: Z,  Prev: v,  Up: Invoking
+
+2.16 Control Warnings: `-W', `--warn', `--no-warn', `--fatal-warnings'
+======================================================================
+
+`as' should never give a warning or error message when assembling
+compiler output.  But programs written by people often cause `as' to
+give a warning that a particular assumption was made.  All such
+warnings are directed to the standard error file.
+
+   If you use the `-W' and `--no-warn' options, no warnings are issued.
+This only affects the warning messages: it does not change any
+particular of how `as' assembles your file.  Errors, which stop the
+assembly, are still reported.
+
+   If you use the `--fatal-warnings' option, `as' considers files that
+generate warnings to be in error.
+
+   You can switch these options off again by specifying `--warn', which
+causes warnings to be output as usual.
+
+
+File: as.info,  Node: Z,  Prev: W,  Up: Invoking
+
+2.17 Generate Object File in Spite of Errors: `-Z'
+==================================================
+
+After an error message, `as' normally produces no output.  If for some
+reason you are interested in object file output even after `as' gives
+an error message on your program, use the `-Z' option.  If there are
+any errors, `as' continues anyways, and writes an object file after a
+final warning message of the form `N errors, M warnings, generating bad
+object file.'
+
+
+File: as.info,  Node: Syntax,  Next: Sections,  Prev: Invoking,  Up: Top
+
+3 Syntax
+********
+
+This chapter describes the machine-independent syntax allowed in a
+source file.  `as' syntax is similar to what many other assemblers use;
+it is inspired by the BSD 4.2 assembler, except that `as' does not
+assemble Vax bit-fields.
+
+* Menu:
+
+* Preprocessing::              Preprocessing
+* Whitespace::                  Whitespace
+* Comments::                    Comments
+* Symbol Intro::                Symbols
+* Statements::                  Statements
+* Constants::                   Constants
+
+
+File: as.info,  Node: Preprocessing,  Next: Whitespace,  Up: Syntax
+
+3.1 Preprocessing
+=================
+
+The `as' internal preprocessor:
+   * adjusts and removes extra whitespace.  It leaves one space or tab
+     before the keywords on a line, and turns any other whitespace on
+     the line into a single space.
+
+   * removes all comments, replacing them with a single space, or an
+     appropriate number of newlines.
+
+   * converts character constants into the appropriate numeric values.
+
+   It does not do macro processing, include file handling, or anything
+else you may get from your C compiler's preprocessor.  You can do
+include file processing with the `.include' directive (*note
+`.include': Include.).  You can use the GNU C compiler driver to get
+other "CPP" style preprocessing by giving the input file a `.S' suffix.
+*Note Options Controlling the Kind of Output: (gcc.info)Overall Options.
+
+   Excess whitespace, comments, and character constants cannot be used
+in the portions of the input text that are not preprocessed.
+
+   If the first line of an input file is `#NO_APP' or if you use the
+`-f' option, whitespace and comments are not removed from the input
+file.  Within an input file, you can ask for whitespace and comment
+removal in specific portions of the by putting a line that says `#APP'
+before the text that may contain whitespace or comments, and putting a
+line that says `#NO_APP' after this text.  This feature is mainly
+intend to support `asm' statements in compilers whose output is
+otherwise free of comments and whitespace.
+
+
+File: as.info,  Node: Whitespace,  Next: Comments,  Prev: Preprocessing,  Up: Syntax
+
+3.2 Whitespace
+==============
+
+"Whitespace" is one or more blanks or tabs, in any order.  Whitespace
+is used to separate symbols, and to make programs neater for people to
+read.  Unless within character constants (*note Character Constants:
+Characters.), any whitespace means the same as exactly one space.
+
+
+File: as.info,  Node: Comments,  Next: Symbol Intro,  Prev: Whitespace,  Up: Syntax
+
+3.3 Comments
+============
+
+There are two ways of rendering comments to `as'.  In both cases the
+comment is equivalent to one space.
+
+   Anything from `/*' through the next `*/' is a comment.  This means
+you may not nest these comments.
+
+     /*
+       The only way to include a newline ('\n') in a comment
+       is to use this sort of comment.
+     */
+
+     /* This sort of comment does not nest. */
+
+   Anything from the "line comment" character to the next newline is
+considered a comment and is ignored.  The line comment character is `;'
+on the ARC; `@' on the ARM; `;' for the H8/300 family; `;' for the HPPA;
+`#' on the i386 and x86-64; `#' on the i960; `;' for the PDP-11; `;'
+for picoJava; `#' for Motorola PowerPC; `#' for IBM S/390; `#' for the
+Sunplus SCORE; `!' for the Renesas / SuperH SH; `!' on the SPARC; `#'
+on the ip2k; `#' on the m32c; `#' on the m32r; `|' on the 680x0; `#' on
+the 68HC11 and 68HC12; `#' on the Vax; `;' for the Z80; `!' for the
+Z8000; `#' on the V850; `#' for Xtensa systems; see *note Machine
+Dependencies::.
+
+   On some machines there are two different line comment characters.
+One character only begins a comment if it is the first non-whitespace
+character on a line, while the other always begins a comment.
+
+   The V850 assembler also supports a double dash as starting a comment
+that extends to the end of the line.
+
+   `--';
+
+   To be compatible with past assemblers, lines that begin with `#'
+have a special interpretation.  Following the `#' should be an absolute
+expression (*note Expressions::): the logical line number of the _next_
+line.  Then a string (*note Strings: Strings.) is allowed: if present
+it is a new logical file name.  The rest of the line, if any, should be
+whitespace.
+
+   If the first non-whitespace characters on the line are not numeric,
+the line is ignored.  (Just like a comment.)
+
+                               # This is an ordinary comment.
+     # 42-6 "new_file_name"    # New logical file name
+                               # This is logical line # 36.
+   This feature is deprecated, and may disappear from future versions
+of `as'.
+
+
+File: as.info,  Node: Symbol Intro,  Next: Statements,  Prev: Comments,  Up: Syntax
+
+3.4 Symbols
+===========
+
+A "symbol" is one or more characters chosen from the set of all letters
+(both upper and lower case), digits and the three characters `_.$'.  On
+most machines, you can also use `$' in symbol names; exceptions are
+noted in *note Machine Dependencies::.  No symbol may begin with a
+digit.  Case is significant.  There is no length limit: all characters
+are significant.  Symbols are delimited by characters not in that set,
+or by the beginning of a file (since the source program must end with a
+newline, the end of a file is not a possible symbol delimiter).  *Note
+Symbols::.  
+
+
+File: as.info,  Node: Statements,  Next: Constants,  Prev: Symbol Intro,  Up: Syntax
+
+3.5 Statements
+==============
+
+A "statement" ends at a newline character (`\n') or line separator
+character.  (The line separator is usually `;', unless this conflicts
+with the comment character; see *note Machine Dependencies::.)  The
+newline or separator character is considered part of the preceding
+statement.  Newlines and separators within character constants are an
+exception: they do not end statements.
+
+It is an error to end any statement with end-of-file:  the last
+character of any input file should be a newline.
+
+   An empty statement is allowed, and may include whitespace.  It is
+ignored.
+
+   A statement begins with zero or more labels, optionally followed by a
+key symbol which determines what kind of statement it is.  The key
+symbol determines the syntax of the rest of the statement.  If the
+symbol begins with a dot `.' then the statement is an assembler
+directive: typically valid for any computer.  If the symbol begins with
+a letter the statement is an assembly language "instruction": it
+assembles into a machine language instruction.  Different versions of
+`as' for different computers recognize different instructions.  In
+fact, the same symbol may represent a different instruction in a
+different computer's assembly language.
+
+   A label is a symbol immediately followed by a colon (`:').
+Whitespace before a label or after a colon is permitted, but you may not
+have whitespace between a label's symbol and its colon. *Note Labels::.
+
+   For HPPA targets, labels need not be immediately followed by a
+colon, but the definition of a label must begin in column zero.  This
+also implies that only one label may be defined on each line.
+
+     label:     .directive    followed by something
+     another_label:           # This is an empty statement.
+                instruction   operand_1, operand_2, ...
+
+
+File: as.info,  Node: Constants,  Prev: Statements,  Up: Syntax
+
+3.6 Constants
+=============
+
+A constant is a number, written so that its value is known by
+inspection, without knowing any context.  Like this:
+     .byte  74, 0112, 092, 0x4A, 0X4a, 'J, '\J # All the same value.
+     .ascii "Ring the bell\7"                  # A string constant.
+     .octa  0x123456789abcdef0123456789ABCDEF0 # A bignum.
+     .float 0f-314159265358979323846264338327\
+     95028841971.693993751E-40                 # - pi, a flonum.
+
+* Menu:
+
+* Characters::                  Character Constants
+* Numbers::                     Number Constants
+
+
+File: as.info,  Node: Characters,  Next: Numbers,  Up: Constants
+
+3.6.1 Character Constants
+-------------------------
+
+There are two kinds of character constants.  A "character" stands for
+one character in one byte and its value may be used in numeric
+expressions.  String constants (properly called string _literals_) are
+potentially many bytes and their values may not be used in arithmetic
+expressions.
+
+* Menu:
+
+* Strings::                     Strings
+* Chars::                       Characters
+
+
+File: as.info,  Node: Strings,  Next: Chars,  Up: Characters
+
+3.6.1.1 Strings
+...............
+
+A "string" is written between double-quotes.  It may contain
+double-quotes or null characters.  The way to get special characters
+into a string is to "escape" these characters: precede them with a
+backslash `\' character.  For example `\\' represents one backslash:
+the first `\' is an escape which tells `as' to interpret the second
+character literally as a backslash (which prevents `as' from
+recognizing the second `\' as an escape character).  The complete list
+of escapes follows.
+
+`\b'
+     Mnemonic for backspace; for ASCII this is octal code 010.
+
+`\f'
+     Mnemonic for FormFeed; for ASCII this is octal code 014.
+
+`\n'
+     Mnemonic for newline; for ASCII this is octal code 012.
+
+`\r'
+     Mnemonic for carriage-Return; for ASCII this is octal code 015.
+
+`\t'
+     Mnemonic for horizontal Tab; for ASCII this is octal code 011.
+
+`\ DIGIT DIGIT DIGIT'
+     An octal character code.  The numeric code is 3 octal digits.  For
+     compatibility with other Unix systems, 8 and 9 are accepted as
+     digits: for example, `\008' has the value 010, and `\009' the
+     value 011.
+
+`\`x' HEX-DIGITS...'
+     A hex character code.  All trailing hex digits are combined.
+     Either upper or lower case `x' works.
+
+`\\'
+     Represents one `\' character.
+
+`\"'
+     Represents one `"' character.  Needed in strings to represent this
+     character, because an unescaped `"' would end the string.
+
+`\ ANYTHING-ELSE'
+     Any other character when escaped by `\' gives a warning, but
+     assembles as if the `\' was not present.  The idea is that if you
+     used an escape sequence you clearly didn't want the literal
+     interpretation of the following character.  However `as' has no
+     other interpretation, so `as' knows it is giving you the wrong
+     code and warns you of the fact.
+
+   Which characters are escapable, and what those escapes represent,
+varies widely among assemblers.  The current set is what we think the
+BSD 4.2 assembler recognizes, and is a subset of what most C compilers
+recognize.  If you are in doubt, do not use an escape sequence.
+
+
+File: as.info,  Node: Chars,  Prev: Strings,  Up: Characters
+
+3.6.1.2 Characters
+..................
+
+A single character may be written as a single quote immediately
+followed by that character.  The same escapes apply to characters as to
+strings.  So if you want to write the character backslash, you must
+write `'\\' where the first `\' escapes the second `\'.  As you can
+see, the quote is an acute accent, not a grave accent.  A newline
+immediately following an acute accent is taken as a literal character
+and does not count as the end of a statement.  The value of a character
+constant in a numeric expression is the machine's byte-wide code for
+that character.  `as' assumes your character code is ASCII: `'A' means
+65, `'B' means 66, and so on.
+
+
+File: as.info,  Node: Numbers,  Prev: Characters,  Up: Constants
+
+3.6.2 Number Constants
+----------------------
+
+`as' distinguishes three kinds of numbers according to how they are
+stored in the target machine.  _Integers_ are numbers that would fit
+into an `int' in the C language.  _Bignums_ are integers, but they are
+stored in more than 32 bits.  _Flonums_ are floating point numbers,
+described below.
+
+* Menu:
+
+* Integers::                    Integers
+* Bignums::                     Bignums
+* Flonums::                     Flonums
+
+
+File: as.info,  Node: Integers,  Next: Bignums,  Up: Numbers
+
+3.6.2.1 Integers
+................
+
+A binary integer is `0b' or `0B' followed by zero or more of the binary
+digits `01'.
+
+   An octal integer is `0' followed by zero or more of the octal digits
+(`01234567').
+
+   A decimal integer starts with a non-zero digit followed by zero or
+more digits (`0123456789').
+
+   A hexadecimal integer is `0x' or `0X' followed by one or more
+hexadecimal digits chosen from `0123456789abcdefABCDEF'.
+
+   Integers have the usual values.  To denote a negative integer, use
+the prefix operator `-' discussed under expressions (*note Prefix
+Operators: Prefix Ops.).
+
+
+File: as.info,  Node: Bignums,  Next: Flonums,  Prev: Integers,  Up: Numbers
+
+3.6.2.2 Bignums
+...............
+
+A "bignum" has the same syntax and semantics as an integer except that
+the number (or its negative) takes more than 32 bits to represent in
+binary.  The distinction is made because in some places integers are
+permitted while bignums are not.
+
+
+File: as.info,  Node: Flonums,  Prev: Bignums,  Up: Numbers
+
+3.6.2.3 Flonums
+...............
+
+A "flonum" represents a floating point number.  The translation is
+indirect: a decimal floating point number from the text is converted by
+`as' to a generic binary floating point number of more than sufficient
+precision.  This generic floating point number is converted to a
+particular computer's floating point format (or formats) by a portion
+of `as' specialized to that computer.
+
+   A flonum is written by writing (in order)
+   * The digit `0'.  (`0' is optional on the HPPA.)
+
+   * A letter, to tell `as' the rest of the number is a flonum.  `e' is
+     recommended.  Case is not important.
+
+     On the H8/300, Renesas / SuperH SH, and AMD 29K architectures, the
+     letter must be one of the letters `DFPRSX' (in upper or lower
+     case).
+
+     On the ARC, the letter must be one of the letters `DFRS' (in upper
+     or lower case).
+
+     On the Intel 960 architecture, the letter must be one of the
+     letters `DFT' (in upper or lower case).
+
+     On the HPPA architecture, the letter must be `E' (upper case only).
+
+   * An optional sign: either `+' or `-'.
+
+   * An optional "integer part": zero or more decimal digits.
+
+   * An optional "fractional part": `.' followed by zero or more
+     decimal digits.
+
+   * An optional exponent, consisting of:
+
+        * An `E' or `e'.
+
+        * Optional sign: either `+' or `-'.
+
+        * One or more decimal digits.
+
+
+   At least one of the integer part or the fractional part must be
+present.  The floating point number has the usual base-10 value.
+
+   `as' does all processing using integers.  Flonums are computed
+independently of any floating point hardware in the computer running
+`as'.
+
+
+File: as.info,  Node: Sections,  Next: Symbols,  Prev: Syntax,  Up: Top
+
+4 Sections and Relocation
+*************************
+
+* Menu:
+
+* Secs Background::             Background
+* Ld Sections::                 Linker Sections
+* As Sections::                 Assembler Internal Sections
+* Sub-Sections::                Sub-Sections
+* bss::                         bss Section
+
+
+File: as.info,  Node: Secs Background,  Next: Ld Sections,  Up: Sections
+
+4.1 Background
+==============
+
+Roughly, a section is a range of addresses, with no gaps; all data "in"
+those addresses is treated the same for some particular purpose.  For
+example there may be a "read only" section.
+
+   The linker `ld' reads many object files (partial programs) and
+combines their contents to form a runnable program.  When `as' emits an
+object file, the partial program is assumed to start at address 0.
+`ld' assigns the final addresses for the partial program, so that
+different partial programs do not overlap.  This is actually an
+oversimplification, but it suffices to explain how `as' uses sections.
+
+   `ld' moves blocks of bytes of your program to their run-time
+addresses.  These blocks slide to their run-time addresses as rigid
+units; their length does not change and neither does the order of bytes
+within them.  Such a rigid unit is called a _section_.  Assigning
+run-time addresses to sections is called "relocation".  It includes the
+task of adjusting mentions of object-file addresses so they refer to
+the proper run-time addresses.  For the H8/300, and for the Renesas /
+SuperH SH, `as' pads sections if needed to ensure they end on a word
+(sixteen bit) boundary.
+
+   An object file written by `as' has at least three sections, any of
+which may be empty.  These are named "text", "data" and "bss" sections.
+
+   When it generates COFF or ELF output, `as' can also generate
+whatever other named sections you specify using the `.section'
+directive (*note `.section': Section.).  If you do not use any
+directives that place output in the `.text' or `.data' sections, these
+sections still exist, but are empty.
+
+   When `as' generates SOM or ELF output for the HPPA, `as' can also
+generate whatever other named sections you specify using the `.space'
+and `.subspace' directives.  See `HP9000 Series 800 Assembly Language
+Reference Manual' (HP 92432-90001) for details on the `.space' and
+`.subspace' assembler directives.
+
+   Additionally, `as' uses different names for the standard text, data,
+and bss sections when generating SOM output.  Program text is placed
+into the `$CODE$' section, data into `$DATA$', and BSS into `$BSS$'.
+
+   Within the object file, the text section starts at address `0', the
+data section follows, and the bss section follows the data section.
+
+   When generating either SOM or ELF output files on the HPPA, the text
+section starts at address `0', the data section at address `0x4000000',
+and the bss section follows the data section.
+
+   To let `ld' know which data changes when the sections are relocated,
+and how to change that data, `as' also writes to the object file
+details of the relocation needed.  To perform relocation `ld' must
+know, each time an address in the object file is mentioned:
+   * Where in the object file is the beginning of this reference to an
+     address?
+
+   * How long (in bytes) is this reference?
+
+   * Which section does the address refer to?  What is the numeric
+     value of
+          (ADDRESS) - (START-ADDRESS OF SECTION)?
+
+   * Is the reference to an address "Program-Counter relative"?
+
+   In fact, every address `as' ever uses is expressed as
+     (SECTION) + (OFFSET INTO SECTION)
+   Further, most expressions `as' computes have this section-relative
+nature.  (For some object formats, such as SOM for the HPPA, some
+expressions are symbol-relative instead.)
+
+   In this manual we use the notation {SECNAME N} to mean "offset N
+into section SECNAME."
+
+   Apart from text, data and bss sections you need to know about the
+"absolute" section.  When `ld' mixes partial programs, addresses in the
+absolute section remain unchanged.  For example, address `{absolute 0}'
+is "relocated" to run-time address 0 by `ld'.  Although the linker
+never arranges two partial programs' data sections with overlapping
+addresses after linking, _by definition_ their absolute sections must
+overlap.  Address `{absolute 239}' in one part of a program is always
+the same address when the program is running as address `{absolute
+239}' in any other part of the program.
+
+   The idea of sections is extended to the "undefined" section.  Any
+address whose section is unknown at assembly time is by definition
+rendered {undefined U}--where U is filled in later.  Since numbers are
+always defined, the only way to generate an undefined address is to
+mention an undefined symbol.  A reference to a named common block would
+be such a symbol: its value is unknown at assembly time so it has
+section _undefined_.
+
+   By analogy the word _section_ is used to describe groups of sections
+in the linked program.  `ld' puts all partial programs' text sections
+in contiguous addresses in the linked program.  It is customary to
+refer to the _text section_ of a program, meaning all the addresses of
+all partial programs' text sections.  Likewise for data and bss
+sections.
+
+   Some sections are manipulated by `ld'; others are invented for use
+of `as' and have no meaning except during assembly.
+
+
+File: as.info,  Node: Ld Sections,  Next: As Sections,  Prev: Secs Background,  Up: Sections
+
+4.2 Linker Sections
+===================
+
+`ld' deals with just four kinds of sections, summarized below.
+
+*named sections*
+*text section*
+*data section*
+     These sections hold your program.  `as' and `ld' treat them as
+     separate but equal sections.  Anything you can say of one section
+     is true of another.  When the program is running, however, it is
+     customary for the text section to be unalterable.  The text
+     section is often shared among processes: it contains instructions,
+     constants and the like.  The data section of a running program is
+     usually alterable: for example, C variables would be stored in the
+     data section.
+
+*bss section*
+     This section contains zeroed bytes when your program begins
+     running.  It is used to hold uninitialized variables or common
+     storage.  The length of each partial program's bss section is
+     important, but because it starts out containing zeroed bytes there
+     is no need to store explicit zero bytes in the object file.  The
+     bss section was invented to eliminate those explicit zeros from
+     object files.
+
+*absolute section*
+     Address 0 of this section is always "relocated" to runtime address
+     0.  This is useful if you want to refer to an address that `ld'
+     must not change when relocating.  In this sense we speak of
+     absolute addresses being "unrelocatable": they do not change
+     during relocation.
+
+*undefined section*
+     This "section" is a catch-all for address references to objects
+     not in the preceding sections.
+
+   An idealized example of three relocatable sections follows.  The
+example uses the traditional section names `.text' and `.data'.  Memory
+addresses are on the horizontal axis.
+
+                           +-----+----+--+
+     partial program # 1:  |ttttt|dddd|00|
+                           +-----+----+--+
+
+                           text   data bss
+                           seg.   seg. seg.
+
+                           +---+---+---+
+     partial program # 2:  |TTT|DDD|000|
+                           +---+---+---+
+
+                           +--+---+-----+--+----+---+-----+~~
+     linked program:       |  |TTT|ttttt|  |dddd|DDD|00000|
+                           +--+---+-----+--+----+---+-----+~~
+
+         addresses:        0 ...
+
+
+File: as.info,  Node: As Sections,  Next: Sub-Sections,  Prev: Ld Sections,  Up: Sections
+
+4.3 Assembler Internal Sections
+===============================
+
+These sections are meant only for the internal use of `as'.  They have
+no meaning at run-time.  You do not really need to know about these
+sections for most purposes; but they can be mentioned in `as' warning
+messages, so it might be helpful to have an idea of their meanings to
+`as'.  These sections are used to permit the value of every expression
+in your assembly language program to be a section-relative address.
+
+ASSEMBLER-INTERNAL-LOGIC-ERROR!
+     An internal assembler logic error has been found.  This means
+     there is a bug in the assembler.
+
+expr section
+     The assembler stores complex expression internally as combinations
+     of symbols.  When it needs to represent an expression as a symbol,
+     it puts it in the expr section.
+
+
+File: as.info,  Node: Sub-Sections,  Next: bss,  Prev: As Sections,  Up: Sections
+
+4.4 Sub-Sections
+================
+
+Assembled bytes conventionally fall into two sections: text and data.
+You may have separate groups of data in named sections that you want to
+end up near to each other in the object file, even though they are not
+contiguous in the assembler source.  `as' allows you to use
+"subsections" for this purpose.  Within each section, there can be
+numbered subsections with values from 0 to 8192.  Objects assembled
+into the same subsection go into the object file together with other
+objects in the same subsection.  For example, a compiler might want to
+store constants in the text section, but might not want to have them
+interspersed with the program being assembled.  In this case, the
+compiler could issue a `.text 0' before each section of code being
+output, and a `.text 1' before each group of constants being output.
+
+Subsections are optional.  If you do not use subsections, everything
+goes in subsection number zero.
+
+   Each subsection is zero-padded up to a multiple of four bytes.
+(Subsections may be padded a different amount on different flavors of
+`as'.)
+
+   Subsections appear in your object file in numeric order, lowest
+numbered to highest.  (All this to be compatible with other people's
+assemblers.)  The object file contains no representation of
+subsections; `ld' and other programs that manipulate object files see
+no trace of them.  They just see all your text subsections as a text
+section, and all your data subsections as a data section.
+
+   To specify which subsection you want subsequent statements assembled
+into, use a numeric argument to specify it, in a `.text EXPRESSION' or
+a `.data EXPRESSION' statement.  When generating COFF output, you can
+also use an extra subsection argument with arbitrary named sections:
+`.section NAME, EXPRESSION'.  When generating ELF output, you can also
+use the `.subsection' directive (*note SubSection::) to specify a
+subsection: `.subsection EXPRESSION'.  EXPRESSION should be an absolute
+expression (*note Expressions::).  If you just say `.text' then `.text
+0' is assumed.  Likewise `.data' means `.data 0'.  Assembly begins in
+`text 0'.  For instance:
+     .text 0     # The default subsection is text 0 anyway.
+     .ascii "This lives in the first text subsection. *"
+     .text 1
+     .ascii "But this lives in the second text subsection."
+     .data 0
+     .ascii "This lives in the data section,"
+     .ascii "in the first data subsection."
+     .text 0
+     .ascii "This lives in the first text section,"
+     .ascii "immediately following the asterisk (*)."
+
+   Each section has a "location counter" incremented by one for every
+byte assembled into that section.  Because subsections are merely a
+convenience restricted to `as' there is no concept of a subsection
+location counter.  There is no way to directly manipulate a location
+counter--but the `.align' directive changes it, and any label
+definition captures its current value.  The location counter of the
+section where statements are being assembled is said to be the "active"
+location counter.
+
+
+File: as.info,  Node: bss,  Prev: Sub-Sections,  Up: Sections
+
+4.5 bss Section
+===============
+
+The bss section is used for local common variable storage.  You may
+allocate address space in the bss section, but you may not dictate data
+to load into it before your program executes.  When your program starts
+running, all the contents of the bss section are zeroed bytes.
+
+   The `.lcomm' pseudo-op defines a symbol in the bss section; see
+*note `.lcomm': Lcomm.
+
+   The `.comm' pseudo-op may be used to declare a common symbol, which
+is another form of uninitialized symbol; see *note `.comm': Comm.
+
+   When assembling for a target which supports multiple sections, such
+as ELF or COFF, you may switch into the `.bss' section and define
+symbols as usual; see *note `.section': Section.  You may only assemble
+zero values into the section.  Typically the section will only contain
+symbol definitions and `.skip' directives (*note `.skip': Skip.).
+
+
+File: as.info,  Node: Symbols,  Next: Expressions,  Prev: Sections,  Up: Top
+
+5 Symbols
+*********
+
+Symbols are a central concept: the programmer uses symbols to name
+things, the linker uses symbols to link, and the debugger uses symbols
+to debug.
+
+     _Warning:_ `as' does not place symbols in the object file in the
+     same order they were declared.  This may break some debuggers.
+
+* Menu:
+
+* Labels::                      Labels
+* Setting Symbols::             Giving Symbols Other Values
+* Symbol Names::                Symbol Names
+* Dot::                         The Special Dot Symbol
+* Symbol Attributes::           Symbol Attributes
+
+
+File: as.info,  Node: Labels,  Next: Setting Symbols,  Up: Symbols
+
+5.1 Labels
+==========
+
+A "label" is written as a symbol immediately followed by a colon `:'.
+The symbol then represents the current value of the active location
+counter, and is, for example, a suitable instruction operand.  You are
+warned if you use the same symbol to represent two different locations:
+the first definition overrides any other definitions.
+
+   On the HPPA, the usual form for a label need not be immediately
+followed by a colon, but instead must start in column zero.  Only one
+label may be defined on a single line.  To work around this, the HPPA
+version of `as' also provides a special directive `.label' for defining
+labels more flexibly.
+
+
+File: as.info,  Node: Setting Symbols,  Next: Symbol Names,  Prev: Labels,  Up: Symbols
+
+5.2 Giving Symbols Other Values
+===============================
+
+A symbol can be given an arbitrary value by writing a symbol, followed
+by an equals sign `=', followed by an expression (*note Expressions::).
+This is equivalent to using the `.set' directive.  *Note `.set': Set.
+In the same way, using a double equals sign `='`=' here represents an
+equivalent of the `.eqv' directive.  *Note `.eqv': Eqv.
+
+   Blackfin does not support symbol assignment with `='.
+
+
+File: as.info,  Node: Symbol Names,  Next: Dot,  Prev: Setting Symbols,  Up: Symbols
+
+5.3 Symbol Names
+================
+
+Symbol names begin with a letter or with one of `._'.  On most
+machines, you can also use `$' in symbol names; exceptions are noted in
+*note Machine Dependencies::.  That character may be followed by any
+string of digits, letters, dollar signs (unless otherwise noted for a
+particular target machine), and underscores.
+
+Case of letters is significant: `foo' is a different symbol name than
+`Foo'.
+
+   Each symbol has exactly one name.  Each name in an assembly language
+program refers to exactly one symbol.  You may use that symbol name any
+number of times in a program.
+
+Local Symbol Names
+------------------
+
+A local symbol is any symbol beginning with certain local label
+prefixes.  By default, the local label prefix is `.L' for ELF systems or
+`L' for traditional a.out systems, but each target may have its own set
+of local label prefixes.  On the HPPA local symbols begin with `L$'.
+
+   Local symbols are defined and used within the assembler, but they are
+normally not saved in object files.  Thus, they are not visible when
+debugging.  You may use the `-L' option (*note Include Local Symbols:
+`-L': L.) to retain the local symbols in the object files.
+
+Local Labels
+------------
+
+Local labels help compilers and programmers use names temporarily.
+They create symbols which are guaranteed to be unique over the entire
+scope of the input source code and which can be referred to by a simple
+notation.  To define a local label, write a label of the form `N:'
+(where N represents any positive integer).  To refer to the most recent
+previous definition of that label write `Nb', using the same number as
+when you defined the label.  To refer to the next definition of a local
+label, write `Nf'--the `b' stands for "backwards" and the `f' stands
+for "forwards".
+
+   There is no restriction on how you can use these labels, and you can
+reuse them too.  So that it is possible to repeatedly define the same
+local label (using the same number `N'), although you can only refer to
+the most recently defined local label of that number (for a backwards
+reference) or the next definition of a specific local label for a
+forward reference.  It is also worth noting that the first 10 local
+labels (`0:'...`9:') are implemented in a slightly more efficient
+manner than the others.
+
+   Here is an example:
+
+     1:        branch 1f
+     2:        branch 1b
+     1:        branch 2f
+     2:        branch 1b
+
+   Which is the equivalent of:
+
+     label_1:  branch label_3
+     label_2:  branch label_1
+     label_3:  branch label_4
+     label_4:  branch label_3
+
+   Local label names are only a notational device.  They are immediately
+transformed into more conventional symbol names before the assembler
+uses them.  The symbol names are stored in the symbol table, appear in
+error messages, and are optionally emitted to the object file.  The
+names are constructed using these parts:
+
+`_local label prefix_'
+     All local symbols begin with the system-specific local label
+     prefix.  Normally both `as' and `ld' forget symbols that start
+     with the local label prefix.  These labels are used for symbols
+     you are never intended to see.  If you use the `-L' option then
+     `as' retains these symbols in the object file. If you also
+     instruct `ld' to retain these symbols, you may use them in
+     debugging.
+
+`NUMBER'
+     This is the number that was used in the local label definition.
+     So if the label is written `55:' then the number is `55'.
+
+`C-B'
+     This unusual character is included so you do not accidentally
+     invent a symbol of the same name.  The character has ASCII value
+     of `\002' (control-B).
+
+`_ordinal number_'
+     This is a serial number to keep the labels distinct.  The first
+     definition of `0:' gets the number `1'.  The 15th definition of
+     `0:' gets the number `15', and so on.  Likewise the first
+     definition of `1:' gets the number `1' and its 15th definition
+     gets `15' as well.
+
+   So for example, the first `1:' may be named `.L1C-B1', and the 44th
+`3:' may be named `.L3C-B44'.
+
+Dollar Local Labels
+-------------------
+
+`as' also supports an even more local form of local labels called
+dollar labels.  These labels go out of scope (i.e., they become
+undefined) as soon as a non-local label is defined.  Thus they remain
+valid for only a small region of the input source code.  Normal local
+labels, by contrast, remain in scope for the entire file, or until they
+are redefined by another occurrence of the same local label.
+
+   Dollar labels are defined in exactly the same way as ordinary local
+labels, except that they have a dollar sign suffix to their numeric
+value, e.g., `55$:'.
+
+   They can also be distinguished from ordinary local labels by their
+transformed names which use ASCII character `\001' (control-A) as the
+magic character to distinguish them from ordinary labels.  For example,
+the fifth definition of `6$' may be named `.L6C-A5'.
+
+
+File: as.info,  Node: Dot,  Next: Symbol Attributes,  Prev: Symbol Names,  Up: Symbols
+
+5.4 The Special Dot Symbol
+==========================
+
+The special symbol `.' refers to the current address that `as' is
+assembling into.  Thus, the expression `melvin: .long .' defines
+`melvin' to contain its own address.  Assigning a value to `.' is
+treated the same as a `.org' directive.  Thus, the expression `.=.+4'
+is the same as saying `.space 4'.
+
+
+File: as.info,  Node: Symbol Attributes,  Prev: Dot,  Up: Symbols
+
+5.5 Symbol Attributes
+=====================
+
+Every symbol has, as well as its name, the attributes "Value" and
+"Type".  Depending on output format, symbols can also have auxiliary
+attributes.
+
+   If you use a symbol without defining it, `as' assumes zero for all
+these attributes, and probably won't warn you.  This makes the symbol
+an externally defined symbol, which is generally what you would want.
+
+* Menu:
+
+* Symbol Value::                Value
+* Symbol Type::                 Type
+
+
+* a.out Symbols::               Symbol Attributes: `a.out'
+
+* COFF Symbols::                Symbol Attributes for COFF
+
+* SOM Symbols::                Symbol Attributes for SOM
+
+
+File: as.info,  Node: Symbol Value,  Next: Symbol Type,  Up: Symbol Attributes
+
+5.5.1 Value
+-----------
+
+The value of a symbol is (usually) 32 bits.  For a symbol which labels a
+location in the text, data, bss or absolute sections the value is the
+number of addresses from the start of that section to the label.
+Naturally for text, data and bss sections the value of a symbol changes
+as `ld' changes section base addresses during linking.  Absolute
+symbols' values do not change during linking: that is why they are
+called absolute.
+
+   The value of an undefined symbol is treated in a special way.  If it
+is 0 then the symbol is not defined in this assembler source file, and
+`ld' tries to determine its value from other files linked into the same
+program.  You make this kind of symbol simply by mentioning a symbol
+name without defining it.  A non-zero value represents a `.comm' common
+declaration.  The value is how much common storage to reserve, in bytes
+(addresses).  The symbol refers to the first address of the allocated
+storage.
+
+
+File: as.info,  Node: Symbol Type,  Next: a.out Symbols,  Prev: Symbol Value,  Up: Symbol Attributes
+
+5.5.2 Type
+----------
+
+The type attribute of a symbol contains relocation (section)
+information, any flag settings indicating that a symbol is external, and
+(optionally), other information for linkers and debuggers.  The exact
+format depends on the object-code output format in use.
+
+
+File: as.info,  Node: a.out Symbols,  Next: COFF Symbols,  Prev: Symbol Type,  Up: Symbol Attributes
+
+5.5.3 Symbol Attributes: `a.out'
+--------------------------------
+
+* Menu:
+
+* Symbol Desc::                 Descriptor
+* Symbol Other::                Other
+
+
+File: as.info,  Node: Symbol Desc,  Next: Symbol Other,  Up: a.out Symbols
+
+5.5.3.1 Descriptor
+..................
+
+This is an arbitrary 16-bit value.  You may establish a symbol's
+descriptor value by using a `.desc' statement (*note `.desc': Desc.).
+A descriptor value means nothing to `as'.
+
+
+File: as.info,  Node: Symbol Other,  Prev: Symbol Desc,  Up: a.out Symbols
+
+5.5.3.2 Other
+.............
+
+This is an arbitrary 8-bit value.  It means nothing to `as'.
+
+
+File: as.info,  Node: COFF Symbols,  Next: SOM Symbols,  Prev: a.out Symbols,  Up: Symbol Attributes
+
+5.5.4 Symbol Attributes for COFF
+--------------------------------
+
+The COFF format supports a multitude of auxiliary symbol attributes;
+like the primary symbol attributes, they are set between `.def' and
+`.endef' directives.
+
+5.5.4.1 Primary Attributes
+..........................
+
+The symbol name is set with `.def'; the value and type, respectively,
+with `.val' and `.type'.
+
+5.5.4.2 Auxiliary Attributes
+............................
+
+The `as' directives `.dim', `.line', `.scl', `.size', `.tag', and
+`.weak' can generate auxiliary symbol table information for COFF.
+
+
+File: as.info,  Node: SOM Symbols,  Prev: COFF Symbols,  Up: Symbol Attributes
+
+5.5.5 Symbol Attributes for SOM
+-------------------------------
+
+The SOM format for the HPPA supports a multitude of symbol attributes
+set with the `.EXPORT' and `.IMPORT' directives.
+
+   The attributes are described in `HP9000 Series 800 Assembly Language
+Reference Manual' (HP 92432-90001) under the `IMPORT' and `EXPORT'
+assembler directive documentation.
+
+
+File: as.info,  Node: Expressions,  Next: Pseudo Ops,  Prev: Symbols,  Up: Top
+
+6 Expressions
+*************
+
+An "expression" specifies an address or numeric value.  Whitespace may
+precede and/or follow an expression.
+
+   The result of an expression must be an absolute number, or else an
+offset into a particular section.  If an expression is not absolute,
+and there is not enough information when `as' sees the expression to
+know its section, a second pass over the source program might be
+necessary to interpret the expression--but the second pass is currently
+not implemented.  `as' aborts with an error message in this situation.
+
+* Menu:
+
+* Empty Exprs::                 Empty Expressions
+* Integer Exprs::               Integer Expressions
+
+
+File: as.info,  Node: Empty Exprs,  Next: Integer Exprs,  Up: Expressions
+
+6.1 Empty Expressions
+=====================
+
+An empty expression has no value: it is just whitespace or null.
+Wherever an absolute expression is required, you may omit the
+expression, and `as' assumes a value of (absolute) 0.  This is
+compatible with other assemblers.
+
+
+File: as.info,  Node: Integer Exprs,  Prev: Empty Exprs,  Up: Expressions
+
+6.2 Integer Expressions
+=======================
+
+An "integer expression" is one or more _arguments_ delimited by
+_operators_.
+
+* Menu:
+
+* Arguments::                   Arguments
+* Operators::                   Operators
+* Prefix Ops::                  Prefix Operators
+* Infix Ops::                   Infix Operators
+
+
+File: as.info,  Node: Arguments,  Next: Operators,  Up: Integer Exprs
+
+6.2.1 Arguments
+---------------
+
+"Arguments" are symbols, numbers or subexpressions.  In other contexts
+arguments are sometimes called "arithmetic operands".  In this manual,
+to avoid confusing them with the "instruction operands" of the machine
+language, we use the term "argument" to refer to parts of expressions
+only, reserving the word "operand" to refer only to machine instruction
+operands.
+
+   Symbols are evaluated to yield {SECTION NNN} where SECTION is one of
+text, data, bss, absolute, or undefined.  NNN is a signed, 2's
+complement 32 bit integer.
+
+   Numbers are usually integers.
+
+   A number can be a flonum or bignum.  In this case, you are warned
+that only the low order 32 bits are used, and `as' pretends these 32
+bits are an integer.  You may write integer-manipulating instructions
+that act on exotic constants, compatible with other assemblers.
+
+   Subexpressions are a left parenthesis `(' followed by an integer
+expression, followed by a right parenthesis `)'; or a prefix operator
+followed by an argument.
+
+
+File: as.info,  Node: Operators,  Next: Prefix Ops,  Prev: Arguments,  Up: Integer Exprs
+
+6.2.2 Operators
+---------------
+
+"Operators" are arithmetic functions, like `+' or `%'.  Prefix
+operators are followed by an argument.  Infix operators appear between
+their arguments.  Operators may be preceded and/or followed by
+whitespace.
+
+
+File: as.info,  Node: Prefix Ops,  Next: Infix Ops,  Prev: Operators,  Up: Integer Exprs
+
+6.2.3 Prefix Operator
+---------------------
+
+`as' has the following "prefix operators".  They each take one
+argument, which must be absolute.
+
+`-'
+     "Negation".  Two's complement negation.
+
+`~'
+     "Complementation".  Bitwise not.
+
+
+File: as.info,  Node: Infix Ops,  Prev: Prefix Ops,  Up: Integer Exprs
+
+6.2.4 Infix Operators
+---------------------
+
+"Infix operators" take two arguments, one on either side.  Operators
+have precedence, but operations with equal precedence are performed left
+to right.  Apart from `+' or `-', both arguments must be absolute, and
+the result is absolute.
+
+  1. Highest Precedence
+
+    `*'
+          "Multiplication".
+
+    `/'
+          "Division".  Truncation is the same as the C operator `/'
+
+    `%'
+          "Remainder".
+
+    `<<'
+          "Shift Left".  Same as the C operator `<<'.
+
+    `>>'
+          "Shift Right".  Same as the C operator `>>'.
+
+  2. Intermediate precedence
+
+    `|'
+          "Bitwise Inclusive Or".
+
+    `&'
+          "Bitwise And".
+
+    `^'
+          "Bitwise Exclusive Or".
+
+    `!'
+          "Bitwise Or Not".
+
+  3. Low Precedence
+
+    `+'
+          "Addition".  If either argument is absolute, the result has
+          the section of the other argument.  You may not add together
+          arguments from different sections.
+
+    `-'
+          "Subtraction".  If the right argument is absolute, the result
+          has the section of the left argument.  If both arguments are
+          in the same section, the result is absolute.  You may not
+          subtract arguments from different sections.
+
+    `=='
+          "Is Equal To"
+
+    `<>'
+    `!='
+          "Is Not Equal To"
+
+    `<'
+          "Is Less Than"
+
+    `>'
+          "Is Greater Than"
+
+    `>='
+          "Is Greater Than Or Equal To"
+
+    `<='
+          "Is Less Than Or Equal To"
+
+          The comparison operators can be used as infix operators.  A
+          true results has a value of -1 whereas a false result has a
+          value of 0.   Note, these operators perform signed
+          comparisons.
+
+  4. Lowest Precedence
+
+    `&&'
+          "Logical And".
+
+    `||'
+          "Logical Or".
+
+          These two logical operations can be used to combine the
+          results of sub expressions.  Note, unlike the comparison
+          operators a true result returns a value of 1 but a false
+          results does still return 0.  Also note that the logical or
+          operator has a slightly lower precedence than logical and.
+
+
+   In short, it's only meaningful to add or subtract the _offsets_ in an
+address; you can only have a defined section in one of the two
+arguments.
+
+
+File: as.info,  Node: Pseudo Ops,  Next: Object Attributes,  Prev: Expressions,  Up: Top
+
+7 Assembler Directives
+**********************
+
+All assembler directives have names that begin with a period (`.').
+The rest of the name is letters, usually in lower case.
+
+   This chapter discusses directives that are available regardless of
+the target machine configuration for the GNU assembler.  Some machine
+configurations provide additional directives.  *Note Machine
+Dependencies::.
+
+* Menu:
+
+* Abort::                       `.abort'
+
+* ABORT (COFF)::                `.ABORT'
+
+* Align::                       `.align ABS-EXPR , ABS-EXPR'
+* Altmacro::                    `.altmacro'
+* Ascii::                       `.ascii "STRING"'...
+* Asciz::                       `.asciz "STRING"'...
+* Balign::                      `.balign ABS-EXPR , ABS-EXPR'
+* Byte::                        `.byte EXPRESSIONS'
+* CFI directives::		`.cfi_startproc [simple]', `.cfi_endproc', etc.
+* Comm::                        `.comm SYMBOL , LENGTH '
+* Data::                        `.data SUBSECTION'
+
+* Def::                         `.def NAME'
+
+* Desc::                        `.desc SYMBOL, ABS-EXPRESSION'
+
+* Dim::                         `.dim'
+
+* Double::                      `.double FLONUMS'
+* Eject::                       `.eject'
+* Else::                        `.else'
+* Elseif::                      `.elseif'
+* End::				`.end'
+
+* Endef::                       `.endef'
+
+* Endfunc::                     `.endfunc'
+* Endif::                       `.endif'
+* Equ::                         `.equ SYMBOL, EXPRESSION'
+* Equiv::                       `.equiv SYMBOL, EXPRESSION'
+* Eqv::                         `.eqv SYMBOL, EXPRESSION'
+* Err::				`.err'
+* Error::			`.error STRING'
+* Exitm::			`.exitm'
+* Extern::                      `.extern'
+* Fail::			`.fail'
+* File::                        `.file'
+* Fill::                        `.fill REPEAT , SIZE , VALUE'
+* Float::                       `.float FLONUMS'
+* Func::                        `.func'
+* Global::                      `.global SYMBOL', `.globl SYMBOL'
+
+* Gnu_attribute::               `.gnu_attribute TAG,VALUE'
+* Hidden::                      `.hidden NAMES'
+
+* hword::                       `.hword EXPRESSIONS'
+* Ident::                       `.ident'
+* If::                          `.if ABSOLUTE EXPRESSION'
+* Incbin::                      `.incbin "FILE"[,SKIP[,COUNT]]'
+* Include::                     `.include "FILE"'
+* Int::                         `.int EXPRESSIONS'
+
+* Internal::                    `.internal NAMES'
+
+* Irp::				`.irp SYMBOL,VALUES'...
+* Irpc::			`.irpc SYMBOL,VALUES'...
+* Lcomm::                       `.lcomm SYMBOL , LENGTH'
+* Lflags::                      `.lflags'
+
+* Line::                        `.line LINE-NUMBER'
+
+* Linkonce::			`.linkonce [TYPE]'
+* List::                        `.list'
+* Ln::                          `.ln LINE-NUMBER'
+* Loc::                         `.loc FILENO LINENO'
+* Loc_mark_labels::             `.loc_mark_labels ENABLE'
+
+* Local::                       `.local NAMES'
+
+* Long::                        `.long EXPRESSIONS'
+
+* Macro::			`.macro NAME ARGS'...
+* MRI::				`.mri VAL'
+* Noaltmacro::                  `.noaltmacro'
+* Nolist::                      `.nolist'
+* Octa::                        `.octa BIGNUMS'
+* Org::                         `.org NEW-LC, FILL'
+* P2align::                     `.p2align ABS-EXPR, ABS-EXPR, ABS-EXPR'
+
+* PopSection::                  `.popsection'
+* Previous::                    `.previous'
+
+* Print::			`.print STRING'
+
+* Protected::                   `.protected NAMES'
+
+* Psize::                       `.psize LINES, COLUMNS'
+* Purgem::			`.purgem NAME'
+
+* PushSection::                 `.pushsection NAME'
+
+* Quad::                        `.quad BIGNUMS'
+* Reloc::			`.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
+* Rept::			`.rept COUNT'
+* Sbttl::                       `.sbttl "SUBHEADING"'
+
+* Scl::                         `.scl CLASS'
+
+* Section::                     `.section NAME[, FLAGS]'
+
+* Set::                         `.set SYMBOL, EXPRESSION'
+* Short::                       `.short EXPRESSIONS'
+* Single::                      `.single FLONUMS'
+
+* Size::                        `.size [NAME , EXPRESSION]'
+
+* Skip::                        `.skip SIZE , FILL'
+
+* Sleb128::			`.sleb128 EXPRESSIONS'
+
+* Space::                       `.space SIZE , FILL'
+
+* Stab::                        `.stabd, .stabn, .stabs'
+
+* String::                      `.string "STR"', `.string8 "STR"', `.string16 "STR"', `.string32 "STR"', `.string64 "STR"'
+* Struct::			`.struct EXPRESSION'
+
+* SubSection::                  `.subsection'
+* Symver::                      `.symver NAME,NAME2@NODENAME'
+
+
+* Tag::                         `.tag STRUCTNAME'
+
+* Text::                        `.text SUBSECTION'
+* Title::                       `.title "HEADING"'
+
+* Type::                        `.type <INT | NAME , TYPE DESCRIPTION>'
+
+* Uleb128::                     `.uleb128 EXPRESSIONS'
+
+* Val::                         `.val ADDR'
+
+
+* Version::                     `.version "STRING"'
+* VTableEntry::                 `.vtable_entry TABLE, OFFSET'
+* VTableInherit::               `.vtable_inherit CHILD, PARENT'
+
+* Warning::			`.warning STRING'
+* Weak::                        `.weak NAMES'
+* Weakref::                     `.weakref ALIAS, SYMBOL'
+* Word::                        `.word EXPRESSIONS'
+* Deprecated::                  Deprecated Directives
+
+
+File: as.info,  Node: Abort,  Next: ABORT (COFF),  Up: Pseudo Ops
+
+7.1 `.abort'
+============
+
+This directive stops the assembly immediately.  It is for compatibility
+with other assemblers.  The original idea was that the assembly
+language source would be piped into the assembler.  If the sender of
+the source quit, it could use this directive tells `as' to quit also.
+One day `.abort' will not be supported.
+
+
+File: as.info,  Node: ABORT (COFF),  Next: Align,  Prev: Abort,  Up: Pseudo Ops
+
+7.2 `.ABORT' (COFF)
+===================
+
+When producing COFF output, `as' accepts this directive as a synonym
+for `.abort'.
+
+
+File: as.info,  Node: Align,  Next: Altmacro,  Prev: ABORT (COFF),  Up: Pseudo Ops
+
+7.3 `.align ABS-EXPR, ABS-EXPR, ABS-EXPR'
+=========================================
+
+Pad the location counter (in the current subsection) to a particular
+storage boundary.  The first expression (which must be absolute) is the
+alignment required, as described below.
+
+   The second expression (also absolute) gives the fill value to be
+stored in the padding bytes.  It (and the comma) may be omitted.  If it
+is omitted, the padding bytes are normally zero.  However, on some
+systems, if the section is marked as containing code and the fill value
+is omitted, the space is filled with no-op instructions.
+
+   The third expression is also absolute, and is also optional.  If it
+is present, it is the maximum number of bytes that should be skipped by
+this alignment directive.  If doing the alignment would require
+skipping more bytes than the specified maximum, then the alignment is
+not done at all.  You can omit the fill value (the second argument)
+entirely by simply using two commas after the required alignment; this
+can be useful if you want the alignment to be filled with no-op
+instructions when appropriate.
+
+   The way the required alignment is specified varies from system to
+system.  For the arc, hppa, i386 using ELF, i860, iq2000, m68k, or32,
+s390, sparc, tic4x, tic80 and xtensa, the first expression is the
+alignment request in bytes.  For example `.align 8' advances the
+location counter until it is a multiple of 8.  If the location counter
+is already a multiple of 8, no change is needed.  For the tic54x, the
+first expression is the alignment request in words.
+
+   For other systems, including ppc, i386 using a.out format, arm and
+strongarm, it is the number of low-order zero bits the location counter
+must have after advancement.  For example `.align 3' advances the
+location counter until it a multiple of 8.  If the location counter is
+already a multiple of 8, no change is needed.
+
+   This inconsistency is due to the different behaviors of the various
+native assemblers for these systems which GAS must emulate.  GAS also
+provides `.balign' and `.p2align' directives, described later, which
+have a consistent behavior across all architectures (but are specific
+to GAS).
+
+
+File: as.info,  Node: Altmacro,  Next: Ascii,  Prev: Align,  Up: Pseudo Ops
+
+7.4 `.altmacro'
+===============
+
+Enable alternate macro mode, enabling:
+
+`LOCAL NAME [ , ... ]'
+     One additional directive, `LOCAL', is available.  It is used to
+     generate a string replacement for each of the NAME arguments, and
+     replace any instances of NAME in each macro expansion.  The
+     replacement string is unique in the assembly, and different for
+     each separate macro expansion.  `LOCAL' allows you to write macros
+     that define symbols, without fear of conflict between separate
+     macro expansions.
+
+`String delimiters'
+     You can write strings delimited in these other ways besides
+     `"STRING"':
+
+    `'STRING''
+          You can delimit strings with single-quote characters.
+
+    `<STRING>'
+          You can delimit strings with matching angle brackets.
+
+`single-character string escape'
+     To include any single character literally in a string (even if the
+     character would otherwise have some special meaning), you can
+     prefix the character with `!' (an exclamation mark).  For example,
+     you can write `<4.3 !> 5.4!!>' to get the literal text `4.3 >
+     5.4!'.
+
+`Expression results as strings'
+     You can write `%EXPR' to evaluate the expression EXPR and use the
+     result as a string.
+
+
+File: as.info,  Node: Ascii,  Next: Asciz,  Prev: Altmacro,  Up: Pseudo Ops
+
+7.5 `.ascii "STRING"'...
+========================
+
+`.ascii' expects zero or more string literals (*note Strings::)
+separated by commas.  It assembles each string (with no automatic
+trailing zero byte) into consecutive addresses.
+
+
+File: as.info,  Node: Asciz,  Next: Balign,  Prev: Ascii,  Up: Pseudo Ops
+
+7.6 `.asciz "STRING"'...
+========================
+
+`.asciz' is just like `.ascii', but each string is followed by a zero
+byte.  The "z" in `.asciz' stands for "zero".
+
+
+File: as.info,  Node: Balign,  Next: Byte,  Prev: Asciz,  Up: Pseudo Ops
+
+7.7 `.balign[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
+==============================================
+
+Pad the location counter (in the current subsection) to a particular
+storage boundary.  The first expression (which must be absolute) is the
+alignment request in bytes.  For example `.balign 8' advances the
+location counter until it is a multiple of 8.  If the location counter
+is already a multiple of 8, no change is needed.
+
+   The second expression (also absolute) gives the fill value to be
+stored in the padding bytes.  It (and the comma) may be omitted.  If it
+is omitted, the padding bytes are normally zero.  However, on some
+systems, if the section is marked as containing code and the fill value
+is omitted, the space is filled with no-op instructions.
+
+   The third expression is also absolute, and is also optional.  If it
+is present, it is the maximum number of bytes that should be skipped by
+this alignment directive.  If doing the alignment would require
+skipping more bytes than the specified maximum, then the alignment is
+not done at all.  You can omit the fill value (the second argument)
+entirely by simply using two commas after the required alignment; this
+can be useful if you want the alignment to be filled with no-op
+instructions when appropriate.
+
+   The `.balignw' and `.balignl' directives are variants of the
+`.balign' directive.  The `.balignw' directive treats the fill pattern
+as a two byte word value.  The `.balignl' directives treats the fill
+pattern as a four byte longword value.  For example, `.balignw
+4,0x368d' will align to a multiple of 4.  If it skips two bytes, they
+will be filled in with the value 0x368d (the exact placement of the
+bytes depends upon the endianness of the processor).  If it skips 1 or
+3 bytes, the fill value is undefined.
+
+
+File: as.info,  Node: Byte,  Next: CFI directives,  Prev: Balign,  Up: Pseudo Ops
+
+7.8 `.byte EXPRESSIONS'
+=======================
+
+`.byte' expects zero or more expressions, separated by commas.  Each
+expression is assembled into the next byte.
+
+
+File: as.info,  Node: CFI directives,  Next: Comm,  Prev: Byte,  Up: Pseudo Ops
+
+7.9 `.cfi_startproc [simple]'
+=============================
+
+`.cfi_startproc' is used at the beginning of each function that should
+have an entry in `.eh_frame'. It initializes some internal data
+structures. Don't forget to close the function by `.cfi_endproc'.
+
+7.10 `.cfi_sections SECTION_LIST'
+=================================
+
+`.cfi_sections' may be used to specify whether CFI directives should
+emit `.eh_frame' section and/or `.debug_frame' section.  If
+SECTION_LIST is `.eh_frame', `.eh_frame' is emitted, if SECTION_LIST is
+`.debug_frame', `.debug_frame' is emitted.  To emit both use
+`.eh_frame, .debug_frame'.  The default if this directive is not used
+is `.cfi_sections .eh_frame'.
+
+   Unless `.cfi_startproc' is used along with parameter `simple' it
+also emits some architecture dependent initial CFI instructions.
+
+7.11 `.cfi_endproc'
+===================
+
+`.cfi_endproc' is used at the end of a function where it closes its
+unwind entry previously opened by `.cfi_startproc', and emits it to
+`.eh_frame'.
+
+7.12 `.cfi_personality ENCODING [, EXP]'
+========================================
+
+`.cfi_personality' defines personality routine and its encoding.
+ENCODING must be a constant determining how the personality should be
+encoded.  If it is 255 (`DW_EH_PE_omit'), second argument is not
+present, otherwise second argument should be a constant or a symbol
+name.  When using indirect encodings, the symbol provided should be the
+location where personality can be loaded from, not the personality
+routine itself.  The default after `.cfi_startproc' is
+`.cfi_personality 0xff', no personality routine.
+
+7.13 `.cfi_lsda ENCODING [, EXP]'
+=================================
+
+`.cfi_lsda' defines LSDA and its encoding.  ENCODING must be a constant
+determining how the LSDA should be encoded.  If it is 255
+(`DW_EH_PE_omit'), second argument is not present, otherwise second
+argument should be a constant or a symbol name.  The default after
+`.cfi_startproc' is `.cfi_lsda 0xff', no LSDA.
+
+7.14 `.cfi_def_cfa REGISTER, OFFSET'
+====================================
+
+`.cfi_def_cfa' defines a rule for computing CFA as: take address from
+REGISTER and add OFFSET to it.
+
+7.15 `.cfi_def_cfa_register REGISTER'
+=====================================
+
+`.cfi_def_cfa_register' modifies a rule for computing CFA. From now on
+REGISTER will be used instead of the old one. Offset remains the same.
+
+7.16 `.cfi_def_cfa_offset OFFSET'
+=================================
+
+`.cfi_def_cfa_offset' modifies a rule for computing CFA. Register
+remains the same, but OFFSET is new. Note that it is the absolute
+offset that will be added to a defined register to compute CFA address.
+
+7.17 `.cfi_adjust_cfa_offset OFFSET'
+====================================
+
+Same as `.cfi_def_cfa_offset' but OFFSET is a relative value that is
+added/substracted from the previous offset.
+
+7.18 `.cfi_offset REGISTER, OFFSET'
+===================================
+
+Previous value of REGISTER is saved at offset OFFSET from CFA.
+
+7.19 `.cfi_rel_offset REGISTER, OFFSET'
+=======================================
+
+Previous value of REGISTER is saved at offset OFFSET from the current
+CFA register.  This is transformed to `.cfi_offset' using the known
+displacement of the CFA register from the CFA.  This is often easier to
+use, because the number will match the code it's annotating.
+
+7.20 `.cfi_register REGISTER1, REGISTER2'
+=========================================
+
+Previous value of REGISTER1 is saved in register REGISTER2.
+
+7.21 `.cfi_restore REGISTER'
+============================
+
+`.cfi_restore' says that the rule for REGISTER is now the same as it
+was at the beginning of the function, after all initial instruction
+added by `.cfi_startproc' were executed.
+
+7.22 `.cfi_undefined REGISTER'
+==============================
+
+From now on the previous value of REGISTER can't be restored anymore.
+
+7.23 `.cfi_same_value REGISTER'
+===============================
+
+Current value of REGISTER is the same like in the previous frame, i.e.
+no restoration needed.
+
+7.24 `.cfi_remember_state',
+===========================
+
+First save all current rules for all registers by `.cfi_remember_state',
+then totally screw them up by subsequent `.cfi_*' directives and when
+everything is hopelessly bad, use `.cfi_restore_state' to restore the
+previous saved state.
+
+7.25 `.cfi_return_column REGISTER'
+==================================
+
+Change return column REGISTER, i.e. the return address is either
+directly in REGISTER or can be accessed by rules for REGISTER.
+
+7.26 `.cfi_signal_frame'
+========================
+
+Mark current function as signal trampoline.
+
+7.27 `.cfi_window_save'
+=======================
+
+SPARC register window has been saved.
+
+7.28 `.cfi_escape' EXPRESSION[, ...]
+====================================
+
+Allows the user to add arbitrary bytes to the unwind info.  One might
+use this to add OS-specific CFI opcodes, or generic CFI opcodes that
+GAS does not yet support.
+
+7.29 `.cfi_val_encoded_addr REGISTER, ENCODING, LABEL'
+======================================================
+
+The current value of REGISTER is LABEL.  The value of LABEL will be
+encoded in the output file according to ENCODING; see the description
+of `.cfi_personality' for details on this encoding.
+
+   The usefulness of equating a register to a fixed label is probably
+limited to the return address register.  Here, it can be useful to mark
+a code segment that has only one return address which is reached by a
+direct branch and no copy of the return address exists in memory or
+another register.
+
+
+File: as.info,  Node: Comm,  Next: Data,  Prev: CFI directives,  Up: Pseudo Ops
+
+7.30 `.comm SYMBOL , LENGTH '
+=============================
+
+`.comm' declares a common symbol named SYMBOL.  When linking, a common
+symbol in one object file may be merged with a defined or common symbol
+of the same name in another object file.  If `ld' does not see a
+definition for the symbol-just one or more common symbols-then it will
+allocate LENGTH bytes of uninitialized memory.  LENGTH must be an
+absolute expression.  If `ld' sees multiple common symbols with the
+same name, and they do not all have the same size, it will allocate
+space using the largest size.
+
+   When using ELF or (as a GNU extension) PE, the `.comm' directive
+takes an optional third argument.  This is the desired alignment of the
+symbol, specified for ELF as a byte boundary (for example, an alignment
+of 16 means that the least significant 4 bits of the address should be
+zero), and for PE as a power of two (for example, an alignment of 5
+means aligned to a 32-byte boundary).  The alignment must be an
+absolute expression, and it must be a power of two.  If `ld' allocates
+uninitialized memory for the common symbol, it will use the alignment
+when placing the symbol.  If no alignment is specified, `as' will set
+the alignment to the largest power of two less than or equal to the
+size of the symbol, up to a maximum of 16 on ELF, or the default
+section alignment of 4 on PE(1).
+
+   The syntax for `.comm' differs slightly on the HPPA.  The syntax is
+`SYMBOL .comm, LENGTH'; SYMBOL is optional.
+
+   ---------- Footnotes ----------
+
+   (1) This is not the same as the executable image file alignment
+controlled by `ld''s `--section-alignment' option; image file sections
+in PE are aligned to multiples of 4096, which is far too large an
+alignment for ordinary variables.  It is rather the default alignment
+for (non-debug) sections within object (`*.o') files, which are less
+strictly aligned.
+
+
+File: as.info,  Node: Data,  Next: Def,  Prev: Comm,  Up: Pseudo Ops
+
+7.31 `.data SUBSECTION'
+=======================
+
+`.data' tells `as' to assemble the following statements onto the end of
+the data subsection numbered SUBSECTION (which is an absolute
+expression).  If SUBSECTION is omitted, it defaults to zero.
+
+
+File: as.info,  Node: Def,  Next: Desc,  Prev: Data,  Up: Pseudo Ops
+
+7.32 `.def NAME'
+================
+
+Begin defining debugging information for a symbol NAME; the definition
+extends until the `.endef' directive is encountered.
+
+
+File: as.info,  Node: Desc,  Next: Dim,  Prev: Def,  Up: Pseudo Ops
+
+7.33 `.desc SYMBOL, ABS-EXPRESSION'
+===================================
+
+This directive sets the descriptor of the symbol (*note Symbol
+Attributes::) to the low 16 bits of an absolute expression.
+
+   The `.desc' directive is not available when `as' is configured for
+COFF output; it is only for `a.out' or `b.out' object format.  For the
+sake of compatibility, `as' accepts it, but produces no output, when
+configured for COFF.
+
+
+File: as.info,  Node: Dim,  Next: Double,  Prev: Desc,  Up: Pseudo Ops
+
+7.34 `.dim'
+===========
+
+This directive is generated by compilers to include auxiliary debugging
+information in the symbol table.  It is only permitted inside
+`.def'/`.endef' pairs.
+
+
+File: as.info,  Node: Double,  Next: Eject,  Prev: Dim,  Up: Pseudo Ops
+
+7.35 `.double FLONUMS'
+======================
+
+`.double' expects zero or more flonums, separated by commas.  It
+assembles floating point numbers.  The exact kind of floating point
+numbers emitted depends on how `as' is configured.  *Note Machine
+Dependencies::.
+
+
+File: as.info,  Node: Eject,  Next: Else,  Prev: Double,  Up: Pseudo Ops
+
+7.36 `.eject'
+=============
+
+Force a page break at this point, when generating assembly listings.
+
+
+File: as.info,  Node: Else,  Next: Elseif,  Prev: Eject,  Up: Pseudo Ops
+
+7.37 `.else'
+============
+
+`.else' is part of the `as' support for conditional assembly; see *note
+`.if': If.  It marks the beginning of a section of code to be assembled
+if the condition for the preceding `.if' was false.
+
+
+File: as.info,  Node: Elseif,  Next: End,  Prev: Else,  Up: Pseudo Ops
+
+7.38 `.elseif'
+==============
+
+`.elseif' is part of the `as' support for conditional assembly; see
+*note `.if': If.  It is shorthand for beginning a new `.if' block that
+would otherwise fill the entire `.else' section.
+
+
+File: as.info,  Node: End,  Next: Endef,  Prev: Elseif,  Up: Pseudo Ops
+
+7.39 `.end'
+===========
+
+`.end' marks the end of the assembly file.  `as' does not process
+anything in the file past the `.end' directive.
+
+
+File: as.info,  Node: Endef,  Next: Endfunc,  Prev: End,  Up: Pseudo Ops
+
+7.40 `.endef'
+=============
+
+This directive flags the end of a symbol definition begun with `.def'.
+
+
+File: as.info,  Node: Endfunc,  Next: Endif,  Prev: Endef,  Up: Pseudo Ops
+
+7.41 `.endfunc'
+===============
+
+`.endfunc' marks the end of a function specified with `.func'.
+
+
+File: as.info,  Node: Endif,  Next: Equ,  Prev: Endfunc,  Up: Pseudo Ops
+
+7.42 `.endif'
+=============
+
+`.endif' is part of the `as' support for conditional assembly; it marks
+the end of a block of code that is only assembled conditionally.  *Note
+`.if': If.
+
+
+File: as.info,  Node: Equ,  Next: Equiv,  Prev: Endif,  Up: Pseudo Ops
+
+7.43 `.equ SYMBOL, EXPRESSION'
+==============================
+
+This directive sets the value of SYMBOL to EXPRESSION.  It is
+synonymous with `.set'; see *note `.set': Set.
+
+   The syntax for `equ' on the HPPA is `SYMBOL .equ EXPRESSION'.
+
+   The syntax for `equ' on the Z80 is `SYMBOL equ EXPRESSION'.  On the
+Z80 it is an eror if SYMBOL is already defined, but the symbol is not
+protected from later redefinition.  Compare *note Equiv::.
+
+
+File: as.info,  Node: Equiv,  Next: Eqv,  Prev: Equ,  Up: Pseudo Ops
+
+7.44 `.equiv SYMBOL, EXPRESSION'
+================================
+
+The `.equiv' directive is like `.equ' and `.set', except that the
+assembler will signal an error if SYMBOL is already defined.  Note a
+symbol which has been referenced but not actually defined is considered
+to be undefined.
+
+   Except for the contents of the error message, this is roughly
+equivalent to
+     .ifdef SYM
+     .err
+     .endif
+     .equ SYM,VAL
+   plus it protects the symbol from later redefinition.
+
+
+File: as.info,  Node: Eqv,  Next: Err,  Prev: Equiv,  Up: Pseudo Ops
+
+7.45 `.eqv SYMBOL, EXPRESSION'
+==============================
+
+The `.eqv' directive is like `.equiv', but no attempt is made to
+evaluate the expression or any part of it immediately.  Instead each
+time the resulting symbol is used in an expression, a snapshot of its
+current value is taken.
+
+
+File: as.info,  Node: Err,  Next: Error,  Prev: Eqv,  Up: Pseudo Ops
+
+7.46 `.err'
+===========
+
+If `as' assembles a `.err' directive, it will print an error message
+and, unless the `-Z' option was used, it will not generate an object
+file.  This can be used to signal an error in conditionally compiled
+code.
+
+
+File: as.info,  Node: Error,  Next: Exitm,  Prev: Err,  Up: Pseudo Ops
+
+7.47 `.error "STRING"'
+======================
+
+Similarly to `.err', this directive emits an error, but you can specify
+a string that will be emitted as the error message.  If you don't
+specify the message, it defaults to `".error directive invoked in
+source file"'.  *Note Error and Warning Messages: Errors.
+
+      .error "This code has not been assembled and tested."
+
+
+File: as.info,  Node: Exitm,  Next: Extern,  Prev: Error,  Up: Pseudo Ops
+
+7.48 `.exitm'
+=============
+
+Exit early from the current macro definition.  *Note Macro::.
+
+
+File: as.info,  Node: Extern,  Next: Fail,  Prev: Exitm,  Up: Pseudo Ops
+
+7.49 `.extern'
+==============
+
+`.extern' is accepted in the source program--for compatibility with
+other assemblers--but it is ignored.  `as' treats all undefined symbols
+as external.
+
+
+File: as.info,  Node: Fail,  Next: File,  Prev: Extern,  Up: Pseudo Ops
+
+7.50 `.fail EXPRESSION'
+=======================
+
+Generates an error or a warning.  If the value of the EXPRESSION is 500
+or more, `as' will print a warning message.  If the value is less than
+500, `as' will print an error message.  The message will include the
+value of EXPRESSION.  This can occasionally be useful inside complex
+nested macros or conditional assembly.
+
+
+File: as.info,  Node: File,  Next: Fill,  Prev: Fail,  Up: Pseudo Ops
+
+7.51 `.file'
+============
+
+There are two different versions of the `.file' directive.  Targets
+that support DWARF2 line number information use the DWARF2 version of
+`.file'.  Other targets use the default version.
+
+Default Version
+---------------
+
+This version of the `.file' directive tells `as' that we are about to
+start a new logical file.  The syntax is:
+
+     .file STRING
+
+   STRING is the new file name.  In general, the filename is recognized
+whether or not it is surrounded by quotes `"'; but if you wish to
+specify an empty file name, you must give the quotes-`""'.  This
+statement may go away in future: it is only recognized to be compatible
+with old `as' programs.
+
+DWARF2 Version
+--------------
+
+When emitting DWARF2 line number information, `.file' assigns filenames
+to the `.debug_line' file name table.  The syntax is:
+
+     .file FILENO FILENAME
+
+   The FILENO operand should be a unique positive integer to use as the
+index of the entry in the table.  The FILENAME operand is a C string
+literal.
+
+   The detail of filename indices is exposed to the user because the
+filename table is shared with the `.debug_info' section of the DWARF2
+debugging information, and thus the user must know the exact indices
+that table entries will have.
+
+
+File: as.info,  Node: Fill,  Next: Float,  Prev: File,  Up: Pseudo Ops
+
+7.52 `.fill REPEAT , SIZE , VALUE'
+==================================
+
+REPEAT, SIZE and VALUE are absolute expressions.  This emits REPEAT
+copies of SIZE bytes.  REPEAT may be zero or more.  SIZE may be zero or
+more, but if it is more than 8, then it is deemed to have the value 8,
+compatible with other people's assemblers.  The contents of each REPEAT
+bytes is taken from an 8-byte number.  The highest order 4 bytes are
+zero.  The lowest order 4 bytes are VALUE rendered in the byte-order of
+an integer on the computer `as' is assembling for.  Each SIZE bytes in
+a repetition is taken from the lowest order SIZE bytes of this number.
+Again, this bizarre behavior is compatible with other people's
+assemblers.
+
+   SIZE and VALUE are optional.  If the second comma and VALUE are
+absent, VALUE is assumed zero.  If the first comma and following tokens
+are absent, SIZE is assumed to be 1.
+
+
+File: as.info,  Node: Float,  Next: Func,  Prev: Fill,  Up: Pseudo Ops
+
+7.53 `.float FLONUMS'
+=====================
+
+This directive assembles zero or more flonums, separated by commas.  It
+has the same effect as `.single'.  The exact kind of floating point
+numbers emitted depends on how `as' is configured.  *Note Machine
+Dependencies::.
+
+
+File: as.info,  Node: Func,  Next: Global,  Prev: Float,  Up: Pseudo Ops
+
+7.54 `.func NAME[,LABEL]'
+=========================
+
+`.func' emits debugging information to denote function NAME, and is
+ignored unless the file is assembled with debugging enabled.  Only
+`--gstabs[+]' is currently supported.  LABEL is the entry point of the
+function and if omitted NAME prepended with the `leading char' is used.
+`leading char' is usually `_' or nothing, depending on the target.  All
+functions are currently defined to have `void' return type.  The
+function must be terminated with `.endfunc'.
+
+
+File: as.info,  Node: Global,  Next: Gnu_attribute,  Prev: Func,  Up: Pseudo Ops
+
+7.55 `.global SYMBOL', `.globl SYMBOL'
+======================================
+
+`.global' makes the symbol visible to `ld'.  If you define SYMBOL in
+your partial program, its value is made available to other partial
+programs that are linked with it.  Otherwise, SYMBOL takes its
+attributes from a symbol of the same name from another file linked into
+the same program.
+
+   Both spellings (`.globl' and `.global') are accepted, for
+compatibility with other assemblers.
+
+   On the HPPA, `.global' is not always enough to make it accessible to
+other partial programs.  You may need the HPPA-only `.EXPORT' directive
+as well.  *Note HPPA Assembler Directives: HPPA Directives.
+
+
+File: as.info,  Node: Gnu_attribute,  Next: Hidden,  Prev: Global,  Up: Pseudo Ops
+
+7.56 `.gnu_attribute TAG,VALUE'
+===============================
+
+Record a GNU object attribute for this file.  *Note Object Attributes::.
+
+
+File: as.info,  Node: Hidden,  Next: hword,  Prev: Gnu_attribute,  Up: Pseudo Ops
+
+7.57 `.hidden NAMES'
+====================
+
+This is one of the ELF visibility directives.  The other two are
+`.internal' (*note `.internal': Internal.) and `.protected' (*note
+`.protected': Protected.).
+
+   This directive overrides the named symbols default visibility (which
+is set by their binding: local, global or weak).  The directive sets
+the visibility to `hidden' which means that the symbols are not visible
+to other components.  Such symbols are always considered to be
+`protected' as well.
+
+
+File: as.info,  Node: hword,  Next: Ident,  Prev: Hidden,  Up: Pseudo Ops
+
+7.58 `.hword EXPRESSIONS'
+=========================
+
+This expects zero or more EXPRESSIONS, and emits a 16 bit number for
+each.
+
+   This directive is a synonym for `.short'; depending on the target
+architecture, it may also be a synonym for `.word'.
+
+
+File: as.info,  Node: Ident,  Next: If,  Prev: hword,  Up: Pseudo Ops
+
+7.59 `.ident'
+=============
+
+This directive is used by some assemblers to place tags in object
+files.  The behavior of this directive varies depending on the target.
+When using the a.out object file format, `as' simply accepts the
+directive for source-file compatibility with existing assemblers, but
+does not emit anything for it.  When using COFF, comments are emitted
+to the `.comment' or `.rdata' section, depending on the target.  When
+using ELF, comments are emitted to the `.comment' section.
+
+
+File: as.info,  Node: If,  Next: Incbin,  Prev: Ident,  Up: Pseudo Ops
+
+7.60 `.if ABSOLUTE EXPRESSION'
+==============================
+
+`.if' marks the beginning of a section of code which is only considered
+part of the source program being assembled if the argument (which must
+be an ABSOLUTE EXPRESSION) is non-zero.  The end of the conditional
+section of code must be marked by `.endif' (*note `.endif': Endif.);
+optionally, you may include code for the alternative condition, flagged
+by `.else' (*note `.else': Else.).  If you have several conditions to
+check, `.elseif' may be used to avoid nesting blocks if/else within
+each subsequent `.else' block.
+
+   The following variants of `.if' are also supported:
+`.ifdef SYMBOL'
+     Assembles the following section of code if the specified SYMBOL
+     has been defined.  Note a symbol which has been referenced but not
+     yet defined is considered to be undefined.
+
+`.ifb TEXT'
+     Assembles the following section of code if the operand is blank
+     (empty).
+
+`.ifc STRING1,STRING2'
+     Assembles the following section of code if the two strings are the
+     same.  The strings may be optionally quoted with single quotes.
+     If they are not quoted, the first string stops at the first comma,
+     and the second string stops at the end of the line.  Strings which
+     contain whitespace should be quoted.  The string comparison is
+     case sensitive.
+
+`.ifeq ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is zero.
+
+`.ifeqs STRING1,STRING2'
+     Another form of `.ifc'.  The strings must be quoted using double
+     quotes.
+
+`.ifge ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is greater
+     than or equal to zero.
+
+`.ifgt ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is greater
+     than zero.
+
+`.ifle ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is less
+     than or equal to zero.
+
+`.iflt ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is less
+     than zero.
+
+`.ifnb TEXT'
+     Like `.ifb', but the sense of the test is reversed: this assembles
+     the following section of code if the operand is non-blank
+     (non-empty).
+
+`.ifnc STRING1,STRING2.'
+     Like `.ifc', but the sense of the test is reversed: this assembles
+     the following section of code if the two strings are not the same.
+
+`.ifndef SYMBOL'
+`.ifnotdef SYMBOL'
+     Assembles the following section of code if the specified SYMBOL
+     has not been defined.  Both spelling variants are equivalent.
+     Note a symbol which has been referenced but not yet defined is
+     considered to be undefined.
+
+`.ifne ABSOLUTE EXPRESSION'
+     Assembles the following section of code if the argument is not
+     equal to zero (in other words, this is equivalent to `.if').
+
+`.ifnes STRING1,STRING2'
+     Like `.ifeqs', but the sense of the test is reversed: this
+     assembles the following section of code if the two strings are not
+     the same.
+
+
+File: as.info,  Node: Incbin,  Next: Include,  Prev: If,  Up: Pseudo Ops
+
+7.61 `.incbin "FILE"[,SKIP[,COUNT]]'
+====================================
+
+The `incbin' directive includes FILE verbatim at the current location.
+You can control the search paths used with the `-I' command-line option
+(*note Command-Line Options: Invoking.).  Quotation marks are required
+around FILE.
+
+   The SKIP argument skips a number of bytes from the start of the
+FILE.  The COUNT argument indicates the maximum number of bytes to
+read.  Note that the data is not aligned in any way, so it is the user's
+responsibility to make sure that proper alignment is provided both
+before and after the `incbin' directive.
+
+
+File: as.info,  Node: Include,  Next: Int,  Prev: Incbin,  Up: Pseudo Ops
+
+7.62 `.include "FILE"'
+======================
+
+This directive provides a way to include supporting files at specified
+points in your source program.  The code from FILE is assembled as if
+it followed the point of the `.include'; when the end of the included
+file is reached, assembly of the original file continues.  You can
+control the search paths used with the `-I' command-line option (*note
+Command-Line Options: Invoking.).  Quotation marks are required around
+FILE.
+
+
+File: as.info,  Node: Int,  Next: Internal,  Prev: Include,  Up: Pseudo Ops
+
+7.63 `.int EXPRESSIONS'
+=======================
+
+Expect zero or more EXPRESSIONS, of any section, separated by commas.
+For each expression, emit a number that, at run time, is the value of
+that expression.  The byte order and bit size of the number depends on
+what kind of target the assembly is for.
+
+
+File: as.info,  Node: Internal,  Next: Irp,  Prev: Int,  Up: Pseudo Ops
+
+7.64 `.internal NAMES'
+======================
+
+This is one of the ELF visibility directives.  The other two are
+`.hidden' (*note `.hidden': Hidden.) and `.protected' (*note
+`.protected': Protected.).
+
+   This directive overrides the named symbols default visibility (which
+is set by their binding: local, global or weak).  The directive sets
+the visibility to `internal' which means that the symbols are
+considered to be `hidden' (i.e., not visible to other components), and
+that some extra, processor specific processing must also be performed
+upon the  symbols as well.
+
+
+File: as.info,  Node: Irp,  Next: Irpc,  Prev: Internal,  Up: Pseudo Ops
+
+7.65 `.irp SYMBOL,VALUES'...
+============================
+
+Evaluate a sequence of statements assigning different values to SYMBOL.
+The sequence of statements starts at the `.irp' directive, and is
+terminated by an `.endr' directive.  For each VALUE, SYMBOL is set to
+VALUE, and the sequence of statements is assembled.  If no VALUE is
+listed, the sequence of statements is assembled once, with SYMBOL set
+to the null string.  To refer to SYMBOL within the sequence of
+statements, use \SYMBOL.
+
+   For example, assembling
+
+             .irp    param,1,2,3
+             move    d\param,sp@-
+             .endr
+
+   is equivalent to assembling
+
+             move    d1,sp@-
+             move    d2,sp@-
+             move    d3,sp@-
+
+   For some caveats with the spelling of SYMBOL, see also *note Macro::.
+
+
+File: as.info,  Node: Irpc,  Next: Lcomm,  Prev: Irp,  Up: Pseudo Ops
+
+7.66 `.irpc SYMBOL,VALUES'...
+=============================
+
+Evaluate a sequence of statements assigning different values to SYMBOL.
+The sequence of statements starts at the `.irpc' directive, and is
+terminated by an `.endr' directive.  For each character in VALUE,
+SYMBOL is set to the character, and the sequence of statements is
+assembled.  If no VALUE is listed, the sequence of statements is
+assembled once, with SYMBOL set to the null string.  To refer to SYMBOL
+within the sequence of statements, use \SYMBOL.
+
+   For example, assembling
+
+             .irpc    param,123
+             move    d\param,sp@-
+             .endr
+
+   is equivalent to assembling
+
+             move    d1,sp@-
+             move    d2,sp@-
+             move    d3,sp@-
+
+   For some caveats with the spelling of SYMBOL, see also the discussion
+at *Note Macro::.
+
+
+File: as.info,  Node: Lcomm,  Next: Lflags,  Prev: Irpc,  Up: Pseudo Ops
+
+7.67 `.lcomm SYMBOL , LENGTH'
+=============================
+
+Reserve LENGTH (an absolute expression) bytes for a local common
+denoted by SYMBOL.  The section and value of SYMBOL are those of the
+new local common.  The addresses are allocated in the bss section, so
+that at run-time the bytes start off zeroed.  SYMBOL is not declared
+global (*note `.global': Global.), so is normally not visible to `ld'.
+
+   Some targets permit a third argument to be used with `.lcomm'.  This
+argument specifies the desired alignment of the symbol in the bss
+section.
+
+   The syntax for `.lcomm' differs slightly on the HPPA.  The syntax is
+`SYMBOL .lcomm, LENGTH'; SYMBOL is optional.
+
+
+File: as.info,  Node: Lflags,  Next: Line,  Prev: Lcomm,  Up: Pseudo Ops
+
+7.68 `.lflags'
+==============
+
+`as' accepts this directive, for compatibility with other assemblers,
+but ignores it.
+
+
+File: as.info,  Node: Line,  Next: Linkonce,  Prev: Lflags,  Up: Pseudo Ops
+
+7.69 `.line LINE-NUMBER'
+========================
+
+Change the logical line number.  LINE-NUMBER must be an absolute
+expression.  The next line has that logical line number.  Therefore any
+other statements on the current line (after a statement separator
+character) are reported as on logical line number LINE-NUMBER - 1.  One
+day `as' will no longer support this directive: it is recognized only
+for compatibility with existing assembler programs.
+
+Even though this is a directive associated with the `a.out' or `b.out'
+object-code formats, `as' still recognizes it when producing COFF
+output, and treats `.line' as though it were the COFF `.ln' _if_ it is
+found outside a `.def'/`.endef' pair.
+
+   Inside a `.def', `.line' is, instead, one of the directives used by
+compilers to generate auxiliary symbol information for debugging.
+
+
+File: as.info,  Node: Linkonce,  Next: List,  Prev: Line,  Up: Pseudo Ops
+
+7.70 `.linkonce [TYPE]'
+=======================
+
+Mark the current section so that the linker only includes a single copy
+of it.  This may be used to include the same section in several
+different object files, but ensure that the linker will only include it
+once in the final output file.  The `.linkonce' pseudo-op must be used
+for each instance of the section.  Duplicate sections are detected
+based on the section name, so it should be unique.
+
+   This directive is only supported by a few object file formats; as of
+this writing, the only object file format which supports it is the
+Portable Executable format used on Windows NT.
+
+   The TYPE argument is optional.  If specified, it must be one of the
+following strings.  For example:
+     .linkonce same_size
+   Not all types may be supported on all object file formats.
+
+`discard'
+     Silently discard duplicate sections.  This is the default.
+
+`one_only'
+     Warn if there are duplicate sections, but still keep only one copy.
+
+`same_size'
+     Warn if any of the duplicates have different sizes.
+
+`same_contents'
+     Warn if any of the duplicates do not have exactly the same
+     contents.
+
+
+File: as.info,  Node: List,  Next: Ln,  Prev: Linkonce,  Up: Pseudo Ops
+
+7.71 `.list'
+============
+
+Control (in conjunction with the `.nolist' directive) whether or not
+assembly listings are generated.  These two directives maintain an
+internal counter (which is zero initially).   `.list' increments the
+counter, and `.nolist' decrements it.  Assembly listings are generated
+whenever the counter is greater than zero.
+
+   By default, listings are disabled.  When you enable them (with the
+`-a' command line option; *note Command-Line Options: Invoking.), the
+initial value of the listing counter is one.
+
+
+File: as.info,  Node: Ln,  Next: Loc,  Prev: List,  Up: Pseudo Ops
+
+7.72 `.ln LINE-NUMBER'
+======================
+
+`.ln' is a synonym for `.line'.
+
+
+File: as.info,  Node: Loc,  Next: Loc_mark_labels,  Prev: Ln,  Up: Pseudo Ops
+
+7.73 `.loc FILENO LINENO [COLUMN] [OPTIONS]'
+============================================
+
+When emitting DWARF2 line number information, the `.loc' directive will
+add a row to the `.debug_line' line number matrix corresponding to the
+immediately following assembly instruction.  The FILENO, LINENO, and
+optional COLUMN arguments will be applied to the `.debug_line' state
+machine before the row is added.
+
+   The OPTIONS are a sequence of the following tokens in any order:
+
+`basic_block'
+     This option will set the `basic_block' register in the
+     `.debug_line' state machine to `true'.
+
+`prologue_end'
+     This option will set the `prologue_end' register in the
+     `.debug_line' state machine to `true'.
+
+`epilogue_begin'
+     This option will set the `epilogue_begin' register in the
+     `.debug_line' state machine to `true'.
+
+`is_stmt VALUE'
+     This option will set the `is_stmt' register in the `.debug_line'
+     state machine to `value', which must be either 0 or 1.
+
+`isa VALUE'
+     This directive will set the `isa' register in the `.debug_line'
+     state machine to VALUE, which must be an unsigned integer.
+
+`discriminator VALUE'
+     This directive will set the `discriminator' register in the
+     `.debug_line' state machine to VALUE, which must be an unsigned
+     integer.
+
+
+
+File: as.info,  Node: Loc_mark_labels,  Next: Local,  Prev: Loc,  Up: Pseudo Ops
+
+7.74 `.loc_mark_labels ENABLE'
+==============================
+
+When emitting DWARF2 line number information, the `.loc_mark_labels'
+directive makes the assembler emit an entry to the `.debug_line' line
+number matrix with the `basic_block' register in the state machine set
+whenever a code label is seen.  The ENABLE argument should be either 1
+or 0, to enable or disable this function respectively.
+
+
+File: as.info,  Node: Local,  Next: Long,  Prev: Loc_mark_labels,  Up: Pseudo Ops
+
+7.75 `.local NAMES'
+===================
+
+This directive, which is available for ELF targets, marks each symbol in
+the comma-separated list of `names' as a local symbol so that it will
+not be externally visible.  If the symbols do not already exist, they
+will be created.
+
+   For targets where the `.lcomm' directive (*note Lcomm::) does not
+accept an alignment argument, which is the case for most ELF targets,
+the `.local' directive can be used in combination with `.comm' (*note
+Comm::) to define aligned local common data.
+
+
+File: as.info,  Node: Long,  Next: Macro,  Prev: Local,  Up: Pseudo Ops
+
+7.76 `.long EXPRESSIONS'
+========================
+
+`.long' is the same as `.int'.  *Note `.int': Int.
+
+
+File: as.info,  Node: Macro,  Next: MRI,  Prev: Long,  Up: Pseudo Ops
+
+7.77 `.macro'
+=============
+
+The commands `.macro' and `.endm' allow you to define macros that
+generate assembly output.  For example, this definition specifies a
+macro `sum' that puts a sequence of numbers into memory:
+
+             .macro  sum from=0, to=5
+             .long   \from
+             .if     \to-\from
+             sum     "(\from+1)",\to
+             .endif
+             .endm
+
+With that definition, `SUM 0,5' is equivalent to this assembly input:
+
+             .long   0
+             .long   1
+             .long   2
+             .long   3
+             .long   4
+             .long   5
+
+`.macro MACNAME'
+`.macro MACNAME MACARGS ...'
+     Begin the definition of a macro called MACNAME.  If your macro
+     definition requires arguments, specify their names after the macro
+     name, separated by commas or spaces.  You can qualify the macro
+     argument to indicate whether all invocations must specify a
+     non-blank value (through `:`req''), or whether it takes all of the
+     remaining arguments (through `:`vararg'').  You can supply a
+     default value for any macro argument by following the name with
+     `=DEFLT'.  You cannot define two macros with the same MACNAME
+     unless it has been subject to the `.purgem' directive (*note
+     Purgem::) between the two definitions.  For example, these are all
+     valid `.macro' statements:
+
+    `.macro comm'
+          Begin the definition of a macro called `comm', which takes no
+          arguments.
+
+    `.macro plus1 p, p1'
+    `.macro plus1 p p1'
+          Either statement begins the definition of a macro called
+          `plus1', which takes two arguments; within the macro
+          definition, write `\p' or `\p1' to evaluate the arguments.
+
+    `.macro reserve_str p1=0 p2'
+          Begin the definition of a macro called `reserve_str', with two
+          arguments.  The first argument has a default value, but not
+          the second.  After the definition is complete, you can call
+          the macro either as `reserve_str A,B' (with `\p1' evaluating
+          to A and `\p2' evaluating to B), or as `reserve_str ,B' (with
+          `\p1' evaluating as the default, in this case `0', and `\p2'
+          evaluating to B).
+
+    `.macro m p1:req, p2=0, p3:vararg'
+          Begin the definition of a macro called `m', with at least
+          three arguments.  The first argument must always have a value
+          specified, but not the second, which instead has a default
+          value. The third formal will get assigned all remaining
+          arguments specified at invocation time.
+
+          When you call a macro, you can specify the argument values
+          either by position, or by keyword.  For example, `sum 9,17'
+          is equivalent to `sum to=17, from=9'.
+
+
+     Note that since each of the MACARGS can be an identifier exactly
+     as any other one permitted by the target architecture, there may be
+     occasional problems if the target hand-crafts special meanings to
+     certain characters when they occur in a special position.  For
+     example, if the colon (`:') is generally permitted to be part of a
+     symbol name, but the architecture specific code special-cases it
+     when occurring as the final character of a symbol (to denote a
+     label), then the macro parameter replacement code will have no way
+     of knowing that and consider the whole construct (including the
+     colon) an identifier, and check only this identifier for being the
+     subject to parameter substitution.  So for example this macro
+     definition:
+
+          	.macro label l
+          \l:
+          	.endm
+
+     might not work as expected.  Invoking `label foo' might not create
+     a label called `foo' but instead just insert the text `\l:' into
+     the assembler source, probably generating an error about an
+     unrecognised identifier.
+
+     Similarly problems might occur with the period character (`.')
+     which is often allowed inside opcode names (and hence identifier
+     names).  So for example constructing a macro to build an opcode
+     from a base name and a length specifier like this:
+
+          	.macro opcode base length
+                  \base.\length
+          	.endm
+
+     and invoking it as `opcode store l' will not create a `store.l'
+     instruction but instead generate some kind of error as the
+     assembler tries to interpret the text `\base.\length'.
+
+     There are several possible ways around this problem:
+
+    `Insert white space'
+          If it is possible to use white space characters then this is
+          the simplest solution.  eg:
+
+               	.macro label l
+               \l :
+               	.endm
+
+    `Use `\()''
+          The string `\()' can be used to separate the end of a macro
+          argument from the following text.  eg:
+
+               	.macro opcode base length
+                       \base\().\length
+               	.endm
+
+    `Use the alternate macro syntax mode'
+          In the alternative macro syntax mode the ampersand character
+          (`&') can be used as a separator.  eg:
+
+               	.altmacro
+               	.macro label l
+               l&:
+               	.endm
+
+     Note: this problem of correctly identifying string parameters to
+     pseudo ops also applies to the identifiers used in `.irp' (*note
+     Irp::) and `.irpc' (*note Irpc::) as well.
+
+`.endm'
+     Mark the end of a macro definition.
+
+`.exitm'
+     Exit early from the current macro definition.
+
+`\@'
+     `as' maintains a counter of how many macros it has executed in
+     this pseudo-variable; you can copy that number to your output with
+     `\@', but _only within a macro definition_.
+
+`LOCAL NAME [ , ... ]'
+     _Warning: `LOCAL' is only available if you select "alternate macro
+     syntax" with `--alternate' or `.altmacro'._ *Note `.altmacro':
+     Altmacro.
+
+
+File: as.info,  Node: MRI,  Next: Noaltmacro,  Prev: Macro,  Up: Pseudo Ops
+
+7.78 `.mri VAL'
+===============
+
+If VAL is non-zero, this tells `as' to enter MRI mode.  If VAL is zero,
+this tells `as' to exit MRI mode.  This change affects code assembled
+until the next `.mri' directive, or until the end of the file.  *Note
+MRI mode: M.
+
+
+File: as.info,  Node: Noaltmacro,  Next: Nolist,  Prev: MRI,  Up: Pseudo Ops
+
+7.79 `.noaltmacro'
+==================
+
+Disable alternate macro mode.  *Note Altmacro::.
+
+
+File: as.info,  Node: Nolist,  Next: Octa,  Prev: Noaltmacro,  Up: Pseudo Ops
+
+7.80 `.nolist'
+==============
+
+Control (in conjunction with the `.list' directive) whether or not
+assembly listings are generated.  These two directives maintain an
+internal counter (which is zero initially).   `.list' increments the
+counter, and `.nolist' decrements it.  Assembly listings are generated
+whenever the counter is greater than zero.
+
+
+File: as.info,  Node: Octa,  Next: Org,  Prev: Nolist,  Up: Pseudo Ops
+
+7.81 `.octa BIGNUMS'
+====================
+
+This directive expects zero or more bignums, separated by commas.  For
+each bignum, it emits a 16-byte integer.
+
+   The term "octa" comes from contexts in which a "word" is two bytes;
+hence _octa_-word for 16 bytes.
+
+
+File: as.info,  Node: Org,  Next: P2align,  Prev: Octa,  Up: Pseudo Ops
+
+7.82 `.org NEW-LC , FILL'
+=========================
+
+Advance the location counter of the current section to NEW-LC.  NEW-LC
+is either an absolute expression or an expression with the same section
+as the current subsection.  That is, you can't use `.org' to cross
+sections: if NEW-LC has the wrong section, the `.org' directive is
+ignored.  To be compatible with former assemblers, if the section of
+NEW-LC is absolute, `as' issues a warning, then pretends the section of
+NEW-LC is the same as the current subsection.
+
+   `.org' may only increase the location counter, or leave it
+unchanged; you cannot use `.org' to move the location counter backwards.
+
+   Because `as' tries to assemble programs in one pass, NEW-LC may not
+be undefined.  If you really detest this restriction we eagerly await a
+chance to share your improved assembler.
+
+   Beware that the origin is relative to the start of the section, not
+to the start of the subsection.  This is compatible with other people's
+assemblers.
+
+   When the location counter (of the current subsection) is advanced,
+the intervening bytes are filled with FILL which should be an absolute
+expression.  If the comma and FILL are omitted, FILL defaults to zero.
+
+
+File: as.info,  Node: P2align,  Next: PopSection,  Prev: Org,  Up: Pseudo Ops
+
+7.83 `.p2align[wl] ABS-EXPR, ABS-EXPR, ABS-EXPR'
+================================================
+
+Pad the location counter (in the current subsection) to a particular
+storage boundary.  The first expression (which must be absolute) is the
+number of low-order zero bits the location counter must have after
+advancement.  For example `.p2align 3' advances the location counter
+until it a multiple of 8.  If the location counter is already a
+multiple of 8, no change is needed.
+
+   The second expression (also absolute) gives the fill value to be
+stored in the padding bytes.  It (and the comma) may be omitted.  If it
+is omitted, the padding bytes are normally zero.  However, on some
+systems, if the section is marked as containing code and the fill value
+is omitted, the space is filled with no-op instructions.
+
+   The third expression is also absolute, and is also optional.  If it
+is present, it is the maximum number of bytes that should be skipped by
+this alignment directive.  If doing the alignment would require
+skipping more bytes than the specified maximum, then the alignment is
+not done at all.  You can omit the fill value (the second argument)
+entirely by simply using two commas after the required alignment; this
+can be useful if you want the alignment to be filled with no-op
+instructions when appropriate.
+
+   The `.p2alignw' and `.p2alignl' directives are variants of the
+`.p2align' directive.  The `.p2alignw' directive treats the fill
+pattern as a two byte word value.  The `.p2alignl' directives treats the
+fill pattern as a four byte longword value.  For example, `.p2alignw
+2,0x368d' will align to a multiple of 4.  If it skips two bytes, they
+will be filled in with the value 0x368d (the exact placement of the
+bytes depends upon the endianness of the processor).  If it skips 1 or
+3 bytes, the fill value is undefined.
+
+
+File: as.info,  Node: PopSection,  Next: Previous,  Prev: P2align,  Up: Pseudo Ops
+
+7.84 `.popsection'
+==================
+
+This is one of the ELF section stack manipulation directives.  The
+others are `.section' (*note Section::), `.subsection' (*note
+SubSection::), `.pushsection' (*note PushSection::), and `.previous'
+(*note Previous::).
+
+   This directive replaces the current section (and subsection) with
+the top section (and subsection) on the section stack.  This section is
+popped off the stack.
+
+
+File: as.info,  Node: Previous,  Next: Print,  Prev: PopSection,  Up: Pseudo Ops
+
+7.85 `.previous'
+================
+
+This is one of the ELF section stack manipulation directives.  The
+others are `.section' (*note Section::), `.subsection' (*note
+SubSection::), `.pushsection' (*note PushSection::), and `.popsection'
+(*note PopSection::).
+
+   This directive swaps the current section (and subsection) with most
+recently referenced section/subsection pair prior to this one.  Multiple
+`.previous' directives in a row will flip between two sections (and
+their subsections).  For example:
+
+     .section A
+      .subsection 1
+       .word 0x1234
+      .subsection 2
+       .word 0x5678
+     .previous
+      .word 0x9abc
+
+   Will place 0x1234 and 0x9abc into subsection 1 and 0x5678 into
+subsection 2 of section A.  Whilst:
+
+     .section A
+     .subsection 1
+       # Now in section A subsection 1
+       .word 0x1234
+     .section B
+     .subsection 0
+       # Now in section B subsection 0
+       .word 0x5678
+     .subsection 1
+       # Now in section B subsection 1
+       .word 0x9abc
+     .previous
+       # Now in section B subsection 0
+       .word 0xdef0
+
+   Will place 0x1234 into section A, 0x5678 and 0xdef0 into subsection
+0 of section B and 0x9abc into subsection 1 of section B.
+
+   In terms of the section stack, this directive swaps the current
+section with the top section on the section stack.
+
+
+File: as.info,  Node: Print,  Next: Protected,  Prev: Previous,  Up: Pseudo Ops
+
+7.86 `.print STRING'
+====================
+
+`as' will print STRING on the standard output during assembly.  You
+must put STRING in double quotes.
+
+
+File: as.info,  Node: Protected,  Next: Psize,  Prev: Print,  Up: Pseudo Ops
+
+7.87 `.protected NAMES'
+=======================
+
+This is one of the ELF visibility directives.  The other two are
+`.hidden' (*note Hidden::) and `.internal' (*note Internal::).
+
+   This directive overrides the named symbols default visibility (which
+is set by their binding: local, global or weak).  The directive sets
+the visibility to `protected' which means that any references to the
+symbols from within the components that defines them must be resolved
+to the definition in that component, even if a definition in another
+component would normally preempt this.
+
+
+File: as.info,  Node: Psize,  Next: Purgem,  Prev: Protected,  Up: Pseudo Ops
+
+7.88 `.psize LINES , COLUMNS'
+=============================
+
+Use this directive to declare the number of lines--and, optionally, the
+number of columns--to use for each page, when generating listings.
+
+   If you do not use `.psize', listings use a default line-count of 60.
+You may omit the comma and COLUMNS specification; the default width is
+200 columns.
+
+   `as' generates formfeeds whenever the specified number of lines is
+exceeded (or whenever you explicitly request one, using `.eject').
+
+   If you specify LINES as `0', no formfeeds are generated save those
+explicitly specified with `.eject'.
+
+
+File: as.info,  Node: Purgem,  Next: PushSection,  Prev: Psize,  Up: Pseudo Ops
+
+7.89 `.purgem NAME'
+===================
+
+Undefine the macro NAME, so that later uses of the string will not be
+expanded.  *Note Macro::.
+
+
+File: as.info,  Node: PushSection,  Next: Quad,  Prev: Purgem,  Up: Pseudo Ops
+
+7.90 `.pushsection NAME [, SUBSECTION] [, "FLAGS"[, @TYPE[,ARGUMENTS]]]'
+========================================================================
+
+This is one of the ELF section stack manipulation directives.  The
+others are `.section' (*note Section::), `.subsection' (*note
+SubSection::), `.popsection' (*note PopSection::), and `.previous'
+(*note Previous::).
+
+   This directive pushes the current section (and subsection) onto the
+top of the section stack, and then replaces the current section and
+subsection with `name' and `subsection'. The optional `flags', `type'
+and `arguments' are treated the same as in the `.section' (*note
+Section::) directive.
+
+
+File: as.info,  Node: Quad,  Next: Reloc,  Prev: PushSection,  Up: Pseudo Ops
+
+7.91 `.quad BIGNUMS'
+====================
+
+`.quad' expects zero or more bignums, separated by commas.  For each
+bignum, it emits an 8-byte integer.  If the bignum won't fit in 8
+bytes, it prints a warning message; and just takes the lowest order 8
+bytes of the bignum.  
+
+   The term "quad" comes from contexts in which a "word" is two bytes;
+hence _quad_-word for 8 bytes.
+
+
+File: as.info,  Node: Reloc,  Next: Rept,  Prev: Quad,  Up: Pseudo Ops
+
+7.92 `.reloc OFFSET, RELOC_NAME[, EXPRESSION]'
+==============================================
+
+Generate a relocation at OFFSET of type RELOC_NAME with value
+EXPRESSION.  If OFFSET is a number, the relocation is generated in the
+current section.  If OFFSET is an expression that resolves to a symbol
+plus offset, the relocation is generated in the given symbol's section.
+EXPRESSION, if present, must resolve to a symbol plus addend or to an
+absolute value, but note that not all targets support an addend.  e.g.
+ELF REL targets such as i386 store an addend in the section contents
+rather than in the relocation.  This low level interface does not
+support addends stored in the section.
+
+
+File: as.info,  Node: Rept,  Next: Sbttl,  Prev: Reloc,  Up: Pseudo Ops
+
+7.93 `.rept COUNT'
+==================
+
+Repeat the sequence of lines between the `.rept' directive and the next
+`.endr' directive COUNT times.
+
+   For example, assembling
+
+             .rept   3
+             .long   0
+             .endr
+
+   is equivalent to assembling
+
+             .long   0
+             .long   0
+             .long   0
+
+
+File: as.info,  Node: Sbttl,  Next: Scl,  Prev: Rept,  Up: Pseudo Ops
+
+7.94 `.sbttl "SUBHEADING"'
+==========================
+
+Use SUBHEADING as the title (third line, immediately after the title
+line) when generating assembly listings.
+
+   This directive affects subsequent pages, as well as the current page
+if it appears within ten lines of the top of a page.
+
+
+File: as.info,  Node: Scl,  Next: Section,  Prev: Sbttl,  Up: Pseudo Ops
+
+7.95 `.scl CLASS'
+=================
+
+Set the storage-class value for a symbol.  This directive may only be
+used inside a `.def'/`.endef' pair.  Storage class may flag whether a
+symbol is static or external, or it may record further symbolic
+debugging information.
+
+
+File: as.info,  Node: Section,  Next: Set,  Prev: Scl,  Up: Pseudo Ops
+
+7.96 `.section NAME'
+====================
+
+Use the `.section' directive to assemble the following code into a
+section named NAME.
+
+   This directive is only supported for targets that actually support
+arbitrarily named sections; on `a.out' targets, for example, it is not
+accepted, even with a standard `a.out' section name.
+
+COFF Version
+------------
+
+   For COFF targets, the `.section' directive is used in one of the
+following ways:
+
+     .section NAME[, "FLAGS"]
+     .section NAME[, SUBSECTION]
+
+   If the optional argument is quoted, it is taken as flags to use for
+the section.  Each flag is a single character.  The following flags are
+recognized:
+`b'
+     bss section (uninitialized data)
+
+`n'
+     section is not loaded
+
+`w'
+     writable section
+
+`d'
+     data section
+
+`r'
+     read-only section
+
+`x'
+     executable section
+
+`s'
+     shared section (meaningful for PE targets)
+
+`a'
+     ignored.  (For compatibility with the ELF version)
+
+`y'
+     section is not readable (meaningful for PE targets)
+
+   If no flags are specified, the default flags depend upon the section
+name.  If the section name is not recognized, the default will be for
+the section to be loaded and writable.  Note the `n' and `w' flags
+remove attributes from the section, rather than adding them, so if they
+are used on their own it will be as if no flags had been specified at
+all.
+
+   If the optional argument to the `.section' directive is not quoted,
+it is taken as a subsection number (*note Sub-Sections::).
+
+ELF Version
+-----------
+
+   This is one of the ELF section stack manipulation directives.  The
+others are `.subsection' (*note SubSection::), `.pushsection' (*note
+PushSection::), `.popsection' (*note PopSection::), and `.previous'
+(*note Previous::).
+
+   For ELF targets, the `.section' directive is used like this:
+
+     .section NAME [, "FLAGS"[, @TYPE[,FLAG_SPECIFIC_ARGUMENTS]]]
+
+   The optional FLAGS argument is a quoted string which may contain any
+combination of the following characters:
+`a'
+     section is allocatable
+
+`w'
+     section is writable
+
+`x'
+     section is executable
+
+`M'
+     section is mergeable
+
+`S'
+     section contains zero terminated strings
+
+`G'
+     section is a member of a section group
+
+`T'
+     section is used for thread-local-storage
+
+   The optional TYPE argument may contain one of the following
+constants:
+`@progbits'
+     section contains data
+
+`@nobits'
+     section does not contain data (i.e., section only occupies space)
+
+`@note'
+     section contains data which is used by things other than the
+     program
+
+`@init_array'
+     section contains an array of pointers to init functions
+
+`@fini_array'
+     section contains an array of pointers to finish functions
+
+`@preinit_array'
+     section contains an array of pointers to pre-init functions
+
+   Many targets only support the first three section types.
+
+   Note on targets where the `@' character is the start of a comment (eg
+ARM) then another character is used instead.  For example the ARM port
+uses the `%' character.
+
+   If FLAGS contains the `M' symbol then the TYPE argument must be
+specified as well as an extra argument--ENTSIZE--like this:
+
+     .section NAME , "FLAGS"M, @TYPE, ENTSIZE
+
+   Sections with the `M' flag but not `S' flag must contain fixed size
+constants, each ENTSIZE octets long. Sections with both `M' and `S'
+must contain zero terminated strings where each character is ENTSIZE
+bytes long. The linker may remove duplicates within sections with the
+same name, same entity size and same flags.  ENTSIZE must be an
+absolute expression.  For sections with both `M' and `S', a string
+which is a suffix of a larger string is considered a duplicate.  Thus
+`"def"' will be merged with `"abcdef"';  A reference to the first
+`"def"' will be changed to a reference to `"abcdef"+3'.
+
+   If FLAGS contains the `G' symbol then the TYPE argument must be
+present along with an additional field like this:
+
+     .section NAME , "FLAGS"G, @TYPE, GROUPNAME[, LINKAGE]
+
+   The GROUPNAME field specifies the name of the section group to which
+this particular section belongs.  The optional linkage field can
+contain:
+`comdat'
+     indicates that only one copy of this section should be retained
+
+`.gnu.linkonce'
+     an alias for comdat
+
+   Note: if both the M and G flags are present then the fields for the
+Merge flag should come first, like this:
+
+     .section NAME , "FLAGS"MG, @TYPE, ENTSIZE, GROUPNAME[, LINKAGE]
+
+   If no flags are specified, the default flags depend upon the section
+name.  If the section name is not recognized, the default will be for
+the section to have none of the above flags: it will not be allocated
+in memory, nor writable, nor executable.  The section will contain data.
+
+   For ELF targets, the assembler supports another type of `.section'
+directive for compatibility with the Solaris assembler:
+
+     .section "NAME"[, FLAGS...]
+
+   Note that the section name is quoted.  There may be a sequence of
+comma separated flags:
+`#alloc'
+     section is allocatable
+
+`#write'
+     section is writable
+
+`#execinstr'
+     section is executable
+
+`#tls'
+     section is used for thread local storage
+
+   This directive replaces the current section and subsection.  See the
+contents of the gas testsuite directory `gas/testsuite/gas/elf' for
+some examples of how this directive and the other section stack
+directives work.
+
+
+File: as.info,  Node: Set,  Next: Short,  Prev: Section,  Up: Pseudo Ops
+
+7.97 `.set SYMBOL, EXPRESSION'
+==============================
+
+Set the value of SYMBOL to EXPRESSION.  This changes SYMBOL's value and
+type to conform to EXPRESSION.  If SYMBOL was flagged as external, it
+remains flagged (*note Symbol Attributes::).
+
+   You may `.set' a symbol many times in the same assembly.
+
+   If you `.set' a global symbol, the value stored in the object file
+is the last value stored into it.
+
+   The syntax for `set' on the HPPA is `SYMBOL .set EXPRESSION'.
+
+   On Z80 `set' is a real instruction, use `SYMBOL defl EXPRESSION'
+instead.
+
+
+File: as.info,  Node: Short,  Next: Single,  Prev: Set,  Up: Pseudo Ops
+
+7.98 `.short EXPRESSIONS'
+=========================
+
+`.short' is normally the same as `.word'.  *Note `.word': Word.
+
+   In some configurations, however, `.short' and `.word' generate
+numbers of different lengths.  *Note Machine Dependencies::.
+
+
+File: as.info,  Node: Single,  Next: Size,  Prev: Short,  Up: Pseudo Ops
+
+7.99 `.single FLONUMS'
+======================
+
+This directive assembles zero or more flonums, separated by commas.  It
+has the same effect as `.float'.  The exact kind of floating point
+numbers emitted depends on how `as' is configured.  *Note Machine
+Dependencies::.
+
+
+File: as.info,  Node: Size,  Next: Skip,  Prev: Single,  Up: Pseudo Ops
+
+7.100 `.size'
+=============
+
+This directive is used to set the size associated with a symbol.
+
+COFF Version
+------------
+
+   For COFF targets, the `.size' directive is only permitted inside
+`.def'/`.endef' pairs.  It is used like this:
+
+     .size EXPRESSION
+
+ELF Version
+-----------
+
+   For ELF targets, the `.size' directive is used like this:
+
+     .size NAME , EXPRESSION
+
+   This directive sets the size associated with a symbol NAME.  The
+size in bytes is computed from EXPRESSION which can make use of label
+arithmetic.  This directive is typically used to set the size of
+function symbols.
+
+
+File: as.info,  Node: Skip,  Next: Sleb128,  Prev: Size,  Up: Pseudo Ops
+
+7.101 `.skip SIZE , FILL'
+=========================
+
+This directive emits SIZE bytes, each of value FILL.  Both SIZE and
+FILL are absolute expressions.  If the comma and FILL are omitted, FILL
+is assumed to be zero.  This is the same as `.space'.
+
+
+File: as.info,  Node: Sleb128,  Next: Space,  Prev: Skip,  Up: Pseudo Ops
+
+7.102 `.sleb128 EXPRESSIONS'
+============================
+
+SLEB128 stands for "signed little endian base 128."  This is a compact,
+variable length representation of numbers used by the DWARF symbolic
+debugging format.  *Note `.uleb128': Uleb128.
+
+
+File: as.info,  Node: Space,  Next: Stab,  Prev: Sleb128,  Up: Pseudo Ops
+
+7.103 `.space SIZE , FILL'
+==========================
+
+This directive emits SIZE bytes, each of value FILL.  Both SIZE and
+FILL are absolute expressions.  If the comma and FILL are omitted, FILL
+is assumed to be zero.  This is the same as `.skip'.
+
+     _Warning:_ `.space' has a completely different meaning for HPPA
+     targets; use `.block' as a substitute.  See `HP9000 Series 800
+     Assembly Language Reference Manual' (HP 92432-90001) for the
+     meaning of the `.space' directive.  *Note HPPA Assembler
+     Directives: HPPA Directives, for a summary.
+
+
+File: as.info,  Node: Stab,  Next: String,  Prev: Space,  Up: Pseudo Ops
+
+7.104 `.stabd, .stabn, .stabs'
+==============================
+
+There are three directives that begin `.stab'.  All emit symbols (*note
+Symbols::), for use by symbolic debuggers.  The symbols are not entered
+in the `as' hash table: they cannot be referenced elsewhere in the
+source file.  Up to five fields are required:
+
+STRING
+     This is the symbol's name.  It may contain any character except
+     `\000', so is more general than ordinary symbol names.  Some
+     debuggers used to code arbitrarily complex structures into symbol
+     names using this field.
+
+TYPE
+     An absolute expression.  The symbol's type is set to the low 8
+     bits of this expression.  Any bit pattern is permitted, but `ld'
+     and debuggers choke on silly bit patterns.
+
+OTHER
+     An absolute expression.  The symbol's "other" attribute is set to
+     the low 8 bits of this expression.
+
+DESC
+     An absolute expression.  The symbol's descriptor is set to the low
+     16 bits of this expression.
+
+VALUE
+     An absolute expression which becomes the symbol's value.
+
+   If a warning is detected while reading a `.stabd', `.stabn', or
+`.stabs' statement, the symbol has probably already been created; you
+get a half-formed symbol in your object file.  This is compatible with
+earlier assemblers!
+
+`.stabd TYPE , OTHER , DESC'
+     The "name" of the symbol generated is not even an empty string.
+     It is a null pointer, for compatibility.  Older assemblers used a
+     null pointer so they didn't waste space in object files with empty
+     strings.
+
+     The symbol's value is set to the location counter, relocatably.
+     When your program is linked, the value of this symbol is the
+     address of the location counter when the `.stabd' was assembled.
+
+`.stabn TYPE , OTHER , DESC , VALUE'
+     The name of the symbol is set to the empty string `""'.
+
+`.stabs STRING ,  TYPE , OTHER , DESC , VALUE'
+     All five fields are specified.
+
+
+File: as.info,  Node: String,  Next: Struct,  Prev: Stab,  Up: Pseudo Ops
+
+7.105 `.string' "STR", `.string8' "STR", `.string16'
+====================================================
+
+"STR", `.string32' "STR", `.string64' "STR"
+
+   Copy the characters in STR to the object file.  You may specify more
+than one string to copy, separated by commas.  Unless otherwise
+specified for a particular machine, the assembler marks the end of each
+string with a 0 byte.  You can use any of the escape sequences
+described in *note Strings: Strings.
+
+   The variants `string16', `string32' and `string64' differ from the
+`string' pseudo opcode in that each 8-bit character from STR is copied
+and expanded to 16, 32 or 64 bits respectively.  The expanded characters
+are stored in target endianness byte order.
+
+   Example:
+     	.string32 "BYE"
+     expands to:
+     	.string   "B\0\0\0Y\0\0\0E\0\0\0"  /* On little endian targets.  */
+     	.string   "\0\0\0B\0\0\0Y\0\0\0E"  /* On big endian targets.  */
+
+
+File: as.info,  Node: Struct,  Next: SubSection,  Prev: String,  Up: Pseudo Ops
+
+7.106 `.struct EXPRESSION'
+==========================
+
+Switch to the absolute section, and set the section offset to
+EXPRESSION, which must be an absolute expression.  You might use this
+as follows:
+             .struct 0
+     field1:
+             .struct field1 + 4
+     field2:
+             .struct field2 + 4
+     field3:
+   This would define the symbol `field1' to have the value 0, the symbol
+`field2' to have the value 4, and the symbol `field3' to have the value
+8.  Assembly would be left in the absolute section, and you would need
+to use a `.section' directive of some sort to change to some other
+section before further assembly.
+
+
+File: as.info,  Node: SubSection,  Next: Symver,  Prev: Struct,  Up: Pseudo Ops
+
+7.107 `.subsection NAME'
+========================
+
+This is one of the ELF section stack manipulation directives.  The
+others are `.section' (*note Section::), `.pushsection' (*note
+PushSection::), `.popsection' (*note PopSection::), and `.previous'
+(*note Previous::).
+
+   This directive replaces the current subsection with `name'.  The
+current section is not changed.  The replaced subsection is put onto
+the section stack in place of the then current top of stack subsection.
+
+
+File: as.info,  Node: Symver,  Next: Tag,  Prev: SubSection,  Up: Pseudo Ops
+
+7.108 `.symver'
+===============
+
+Use the `.symver' directive to bind symbols to specific version nodes
+within a source file.  This is only supported on ELF platforms, and is
+typically used when assembling files to be linked into a shared library.
+There are cases where it may make sense to use this in objects to be
+bound into an application itself so as to override a versioned symbol
+from a shared library.
+
+   For ELF targets, the `.symver' directive can be used like this:
+     .symver NAME, NAME2@NODENAME
+   If the symbol NAME is defined within the file being assembled, the
+`.symver' directive effectively creates a symbol alias with the name
+NAME2@NODENAME, and in fact the main reason that we just don't try and
+create a regular alias is that the @ character isn't permitted in
+symbol names.  The NAME2 part of the name is the actual name of the
+symbol by which it will be externally referenced.  The name NAME itself
+is merely a name of convenience that is used so that it is possible to
+have definitions for multiple versions of a function within a single
+source file, and so that the compiler can unambiguously know which
+version of a function is being mentioned.  The NODENAME portion of the
+alias should be the name of a node specified in the version script
+supplied to the linker when building a shared library.  If you are
+attempting to override a versioned symbol from a shared library, then
+NODENAME should correspond to the nodename of the symbol you are trying
+to override.
+
+   If the symbol NAME is not defined within the file being assembled,
+all references to NAME will be changed to NAME2@NODENAME.  If no
+reference to NAME is made, NAME2@NODENAME will be removed from the
+symbol table.
+
+   Another usage of the `.symver' directive is:
+     .symver NAME, NAME2@@NODENAME
+   In this case, the symbol NAME must exist and be defined within the
+file being assembled. It is similar to NAME2@NODENAME. The difference
+is NAME2@@NODENAME will also be used to resolve references to NAME2 by
+the linker.
+
+   The third usage of the `.symver' directive is:
+     .symver NAME, NAME2@@@NODENAME
+   When NAME is not defined within the file being assembled, it is
+treated as NAME2@NODENAME. When NAME is defined within the file being
+assembled, the symbol name, NAME, will be changed to NAME2@@NODENAME.
+
+
+File: as.info,  Node: Tag,  Next: Text,  Prev: Symver,  Up: Pseudo Ops
+
+7.109 `.tag STRUCTNAME'
+=======================
+
+This directive is generated by compilers to include auxiliary debugging
+information in the symbol table.  It is only permitted inside
+`.def'/`.endef' pairs.  Tags are used to link structure definitions in
+the symbol table with instances of those structures.
+
+
+File: as.info,  Node: Text,  Next: Title,  Prev: Tag,  Up: Pseudo Ops
+
+7.110 `.text SUBSECTION'
+========================
+
+Tells `as' to assemble the following statements onto the end of the
+text subsection numbered SUBSECTION, which is an absolute expression.
+If SUBSECTION is omitted, subsection number zero is used.
+
+
+File: as.info,  Node: Title,  Next: Type,  Prev: Text,  Up: Pseudo Ops
+
+7.111 `.title "HEADING"'
+========================
+
+Use HEADING as the title (second line, immediately after the source
+file name and pagenumber) when generating assembly listings.
+
+   This directive affects subsequent pages, as well as the current page
+if it appears within ten lines of the top of a page.
+
+
+File: as.info,  Node: Type,  Next: Uleb128,  Prev: Title,  Up: Pseudo Ops
+
+7.112 `.type'
+=============
+
+This directive is used to set the type of a symbol.
+
+COFF Version
+------------
+
+   For COFF targets, this directive is permitted only within
+`.def'/`.endef' pairs.  It is used like this:
+
+     .type INT
+
+   This records the integer INT as the type attribute of a symbol table
+entry.
+
+ELF Version
+-----------
+
+   For ELF targets, the `.type' directive is used like this:
+
+     .type NAME , TYPE DESCRIPTION
+
+   This sets the type of symbol NAME to be either a function symbol or
+an object symbol.  There are five different syntaxes supported for the
+TYPE DESCRIPTION field, in order to provide compatibility with various
+other assemblers.
+
+   Because some of the characters used in these syntaxes (such as `@'
+and `#') are comment characters for some architectures, some of the
+syntaxes below do not work on all architectures.  The first variant
+will be accepted by the GNU assembler on all architectures so that
+variant should be used for maximum portability, if you do not need to
+assemble your code with other assemblers.
+
+   The syntaxes supported are:
+
+       .type <name> STT_<TYPE_IN_UPPER_CASE>
+       .type <name>,#<type>
+       .type <name>,@<type>
+       .type <name>,%<type>
+       .type <name>,"<type>"
+
+   The types supported are:
+
+`STT_FUNC'
+`function'
+     Mark the symbol as being a function name.
+
+`STT_GNU_IFUNC'
+`gnu_indirect_function'
+     Mark the symbol as an indirect function when evaluated during reloc
+     processing.  (This is only supported on Linux targeted assemblers).
+
+`STT_OBJECT'
+`object'
+     Mark the symbol as being a data object.
+
+`STT_TLS'
+`tls_object'
+     Mark the symbol as being a thead-local data object.
+
+`STT_COMMON'
+`common'
+     Mark the symbol as being a common data object.
+
+`STT_NOTYPE'
+`notype'
+     Does not mark the symbol in any way.  It is supported just for
+     completeness.
+
+`gnu_unique_object'
+     Marks the symbol as being a globally unique data object.  The
+     dynamic linker will make sure that in the entire process there is
+     just one symbol with this name and type in use.  (This is only
+     supported on Linux targeted assemblers).
+
+
+   Note: Some targets support extra types in addition to those listed
+above.
+
+
+File: as.info,  Node: Uleb128,  Next: Val,  Prev: Type,  Up: Pseudo Ops
+
+7.113 `.uleb128 EXPRESSIONS'
+============================
+
+ULEB128 stands for "unsigned little endian base 128."  This is a
+compact, variable length representation of numbers used by the DWARF
+symbolic debugging format.  *Note `.sleb128': Sleb128.
+
+
+File: as.info,  Node: Val,  Next: Version,  Prev: Uleb128,  Up: Pseudo Ops
+
+7.114 `.val ADDR'
+=================
+
+This directive, permitted only within `.def'/`.endef' pairs, records
+the address ADDR as the value attribute of a symbol table entry.
+
+
+File: as.info,  Node: Version,  Next: VTableEntry,  Prev: Val,  Up: Pseudo Ops
+
+7.115 `.version "STRING"'
+=========================
+
+This directive creates a `.note' section and places into it an ELF
+formatted note of type NT_VERSION.  The note's name is set to `string'.
+
+
+File: as.info,  Node: VTableEntry,  Next: VTableInherit,  Prev: Version,  Up: Pseudo Ops
+
+7.116 `.vtable_entry TABLE, OFFSET'
+===================================
+
+This directive finds or creates a symbol `table' and creates a
+`VTABLE_ENTRY' relocation for it with an addend of `offset'.
+
+
+File: as.info,  Node: VTableInherit,  Next: Warning,  Prev: VTableEntry,  Up: Pseudo Ops
+
+7.117 `.vtable_inherit CHILD, PARENT'
+=====================================
+
+This directive finds the symbol `child' and finds or creates the symbol
+`parent' and then creates a `VTABLE_INHERIT' relocation for the parent
+whose addend is the value of the child symbol.  As a special case the
+parent name of `0' is treated as referring to the `*ABS*' section.
+
+
+File: as.info,  Node: Warning,  Next: Weak,  Prev: VTableInherit,  Up: Pseudo Ops
+
+7.118 `.warning "STRING"'
+=========================
+
+Similar to the directive `.error' (*note `.error "STRING"': Error.),
+but just emits a warning.
+
+
+File: as.info,  Node: Weak,  Next: Weakref,  Prev: Warning,  Up: Pseudo Ops
+
+7.119 `.weak NAMES'
+===================
+
+This directive sets the weak attribute on the comma separated list of
+symbol `names'.  If the symbols do not already exist, they will be
+created.
+
+   On COFF targets other than PE, weak symbols are a GNU extension.
+This directive sets the weak attribute on the comma separated list of
+symbol `names'.  If the symbols do not already exist, they will be
+created.
+
+   On the PE target, weak symbols are supported natively as weak
+aliases.  When a weak symbol is created that is not an alias, GAS
+creates an alternate symbol to hold the default value.
+
+
+File: as.info,  Node: Weakref,  Next: Word,  Prev: Weak,  Up: Pseudo Ops
+
+7.120 `.weakref ALIAS, TARGET'
+==============================
+
+This directive creates an alias to the target symbol that enables the
+symbol to be referenced with weak-symbol semantics, but without
+actually making it weak.  If direct references or definitions of the
+symbol are present, then the symbol will not be weak, but if all
+references to it are through weak references, the symbol will be marked
+as weak in the symbol table.
+
+   The effect is equivalent to moving all references to the alias to a
+separate assembly source file, renaming the alias to the symbol in it,
+declaring the symbol as weak there, and running a reloadable link to
+merge the object files resulting from the assembly of the new source
+file and the old source file that had the references to the alias
+removed.
+
+   The alias itself never makes to the symbol table, and is entirely
+handled within the assembler.
+
+
+File: as.info,  Node: Word,  Next: Deprecated,  Prev: Weakref,  Up: Pseudo Ops
+
+7.121 `.word EXPRESSIONS'
+=========================
+
+This directive expects zero or more EXPRESSIONS, of any section,
+separated by commas.
+
+   The size of the number emitted, and its byte order, depend on what
+target computer the assembly is for.
+
+     _Warning: Special Treatment to support Compilers_
+
+   Machines with a 32-bit address space, but that do less than 32-bit
+addressing, require the following special treatment.  If the machine of
+interest to you does 32-bit addressing (or doesn't require it; *note
+Machine Dependencies::), you can ignore this issue.
+
+   In order to assemble compiler output into something that works, `as'
+occasionally does strange things to `.word' directives.  Directives of
+the form `.word sym1-sym2' are often emitted by compilers as part of
+jump tables.  Therefore, when `as' assembles a directive of the form
+`.word sym1-sym2', and the difference between `sym1' and `sym2' does
+not fit in 16 bits, `as' creates a "secondary jump table", immediately
+before the next label.  This secondary jump table is preceded by a
+short-jump to the first byte after the secondary table.  This
+short-jump prevents the flow of control from accidentally falling into
+the new table.  Inside the table is a long-jump to `sym2'.  The
+original `.word' contains `sym1' minus the address of the long-jump to
+`sym2'.
+
+   If there were several occurrences of `.word sym1-sym2' before the
+secondary jump table, all of them are adjusted.  If there was a `.word
+sym3-sym4', that also did not fit in sixteen bits, a long-jump to
+`sym4' is included in the secondary jump table, and the `.word'
+directives are adjusted to contain `sym3' minus the address of the
+long-jump to `sym4'; and so on, for as many entries in the original
+jump table as necessary.
+
+
+File: as.info,  Node: Deprecated,  Prev: Word,  Up: Pseudo Ops
+
+7.122 Deprecated Directives
+===========================
+
+One day these directives won't work.  They are included for
+compatibility with older assemblers.
+.abort
+
+.line
+
+
+File: as.info,  Node: Object Attributes,  Next: Machine Dependencies,  Prev: Pseudo Ops,  Up: Top
+
+8 Object Attributes
+*******************
+
+`as' assembles source files written for a specific architecture into
+object files for that architecture.  But not all object files are alike.
+Many architectures support incompatible variations.  For instance,
+floating point arguments might be passed in floating point registers if
+the object file requires hardware floating point support--or floating
+point arguments might be passed in integer registers if the object file
+supports processors with no hardware floating point unit.  Or, if two
+objects are built for different generations of the same architecture,
+the combination may require the newer generation at run-time.
+
+   This information is useful during and after linking.  At link time,
+`ld' can warn about incompatible object files.  After link time, tools
+like `gdb' can use it to process the linked file correctly.
+
+   Compatibility information is recorded as a series of object
+attributes.  Each attribute has a "vendor", "tag", and "value".  The
+vendor is a string, and indicates who sets the meaning of the tag.  The
+tag is an integer, and indicates what property the attribute describes.
+The value may be a string or an integer, and indicates how the property
+affects this object.  Missing attributes are the same as attributes
+with a zero value or empty string value.
+
+   Object attributes were developed as part of the ABI for the ARM
+Architecture.  The file format is documented in `ELF for the ARM
+Architecture'.
+
+* Menu:
+
+* GNU Object Attributes::               GNU Object Attributes
+* Defining New Object Attributes::      Defining New Object Attributes
+
+
+File: as.info,  Node: GNU Object Attributes,  Next: Defining New Object Attributes,  Up: Object Attributes
+
+8.1 GNU Object Attributes
+=========================
+
+The `.gnu_attribute' directive records an object attribute with vendor
+`gnu'.
+
+   Except for `Tag_compatibility', which has both an integer and a
+string for its value, GNU attributes have a string value if the tag
+number is odd and an integer value if the tag number is even.  The
+second bit (`TAG & 2' is set for architecture-independent attributes
+and clear for architecture-dependent ones.
+
+8.1.1 Common GNU attributes
+---------------------------
+
+These attributes are valid on all architectures.
+
+Tag_compatibility (32)
+     The compatibility attribute takes an integer flag value and a
+     vendor name.  If the flag value is 0, the file is compatible with
+     other toolchains.  If it is 1, then the file is only compatible
+     with the named toolchain.  If it is greater than 1, the file can
+     only be processed by other toolchains under some private
+     arrangement indicated by the flag value and the vendor name.
+
+8.1.2 MIPS Attributes
+---------------------
+
+Tag_GNU_MIPS_ABI_FP (4)
+     The floating-point ABI used by this object file.  The value will
+     be:
+
+        * 0 for files not affected by the floating-point ABI.
+
+        * 1 for files using the hardware floating-point with a standard
+          double-precision FPU.
+
+        * 2 for files using the hardware floating-point ABI with a
+          single-precision FPU.
+
+        * 3 for files using the software floating-point ABI.
+
+        * 4 for files using the hardware floating-point ABI with 64-bit
+          wide double-precision floating-point registers and 32-bit
+          wide general purpose registers.
+
+8.1.3 PowerPC Attributes
+------------------------
+
+Tag_GNU_Power_ABI_FP (4)
+     The floating-point ABI used by this object file.  The value will
+     be:
+
+        * 0 for files not affected by the floating-point ABI.
+
+        * 1 for files using double-precision hardware floating-point
+          ABI.
+
+        * 2 for files using the software floating-point ABI.
+
+        * 3 for files using single-precision hardware floating-point
+          ABI.
+
+Tag_GNU_Power_ABI_Vector (8)
+     The vector ABI used by this object file.  The value will be:
+
+        * 0 for files not affected by the vector ABI.
+
+        * 1 for files using general purpose registers to pass vectors.
+
+        * 2 for files using AltiVec registers to pass vectors.
+
+        * 3 for files using SPE registers to pass vectors.
+
+
+File: as.info,  Node: Defining New Object Attributes,  Prev: GNU Object Attributes,  Up: Object Attributes
+
+8.2 Defining New Object Attributes
+==================================
+
+If you want to define a new GNU object attribute, here are the places
+you will need to modify.  New attributes should be discussed on the
+`binutils' mailing list.
+
+   * This manual, which is the official register of attributes.
+
+   * The header for your architecture `include/elf', to define the tag.
+
+   * The `bfd' support file for your architecture, to merge the
+     attribute and issue any appropriate link warnings.
+
+   * Test cases in `ld/testsuite' for merging and link warnings.
+
+   * `binutils/readelf.c' to display your attribute.
+
+   * GCC, if you want the compiler to mark the attribute automatically.
+
+
+File: as.info,  Node: Machine Dependencies,  Next: Reporting Bugs,  Prev: Object Attributes,  Up: Top
+
+9 Machine Dependent Features
+****************************
+
+The machine instruction sets are (almost by definition) different on
+each machine where `as' runs.  Floating point representations vary as
+well, and `as' often supports a few additional directives or
+command-line options for compatibility with other assemblers on a
+particular platform.  Finally, some versions of `as' support special
+pseudo-instructions for branch optimization.
+
+   This chapter discusses most of these differences, though it does not
+include details on any machine's instruction set.  For details on that
+subject, see the hardware manufacturer's manual.
+
+* Menu:
+
+
+* Alpha-Dependent::		Alpha Dependent Features
+
+* ARC-Dependent::               ARC Dependent Features
+
+* ARM-Dependent::               ARM Dependent Features
+
+* AVR-Dependent::               AVR Dependent Features
+
+* Blackfin-Dependent::		Blackfin Dependent Features
+
+* CR16-Dependent::              CR16 Dependent Features
+
+* CRIS-Dependent::              CRIS Dependent Features
+
+* D10V-Dependent::              D10V Dependent Features
+
+* D30V-Dependent::              D30V Dependent Features
+
+* H8/300-Dependent::            Renesas H8/300 Dependent Features
+
+* HPPA-Dependent::              HPPA Dependent Features
+
+* ESA/390-Dependent::           IBM ESA/390 Dependent Features
+
+* i386-Dependent::              Intel 80386 and AMD x86-64 Dependent Features
+
+* i860-Dependent::              Intel 80860 Dependent Features
+
+* i960-Dependent::              Intel 80960 Dependent Features
+
+* IA-64-Dependent::             Intel IA-64 Dependent Features
+
+* IP2K-Dependent::              IP2K Dependent Features
+
+* LM32-Dependent::              LM32 Dependent Features
+
+* M32C-Dependent::              M32C Dependent Features
+
+* M32R-Dependent::              M32R Dependent Features
+
+* M68K-Dependent::              M680x0 Dependent Features
+
+* M68HC11-Dependent::           M68HC11 and 68HC12 Dependent Features
+
+* MicroBlaze-Dependent::	MICROBLAZE Dependent Features
+
+* MIPS-Dependent::              MIPS Dependent Features
+
+* MMIX-Dependent::              MMIX Dependent Features
+
+* MSP430-Dependent::		MSP430 Dependent Features
+
+* SH-Dependent::                Renesas / SuperH SH Dependent Features
+* SH64-Dependent::              SuperH SH64 Dependent Features
+
+* PDP-11-Dependent::            PDP-11 Dependent Features
+
+* PJ-Dependent::                picoJava Dependent Features
+
+* PPC-Dependent::               PowerPC Dependent Features
+
+* S/390-Dependent::             IBM S/390 Dependent Features
+
+* SCORE-Dependent::             SCORE Dependent Features
+
+* Sparc-Dependent::             SPARC Dependent Features
+
+* TIC54X-Dependent::            TI TMS320C54x Dependent Features
+
+* V850-Dependent::              V850 Dependent Features
+
+* Xtensa-Dependent::            Xtensa Dependent Features
+
+* Z80-Dependent::               Z80 Dependent Features
+
+* Z8000-Dependent::             Z8000 Dependent Features
+
+* Vax-Dependent::               VAX Dependent Features
+
+
+File: as.info,  Node: Alpha-Dependent,  Next: ARC-Dependent,  Up: Machine Dependencies
+
+9.1 Alpha Dependent Features
+============================
+
+* Menu:
+
+* Alpha Notes::                Notes
+* Alpha Options::              Options
+* Alpha Syntax::               Syntax
+* Alpha Floating Point::       Floating Point
+* Alpha Directives::           Alpha Machine Directives
+* Alpha Opcodes::              Opcodes
+
+
+File: as.info,  Node: Alpha Notes,  Next: Alpha Options,  Up: Alpha-Dependent
+
+9.1.1 Notes
+-----------
+
+The documentation here is primarily for the ELF object format.  `as'
+also supports the ECOFF and EVAX formats, but features specific to
+these formats are not yet documented.
+
+
+File: as.info,  Node: Alpha Options,  Next: Alpha Syntax,  Prev: Alpha Notes,  Up: Alpha-Dependent
+
+9.1.2 Options
+-------------
+
+`-mCPU'
+     This option specifies the target processor.  If an attempt is made
+     to assemble an instruction which will not execute on the target
+     processor, the assembler may either expand the instruction as a
+     macro or issue an error message.  This option is equivalent to the
+     `.arch' directive.
+
+     The following processor names are recognized: `21064', `21064a',
+     `21066', `21068', `21164', `21164a', `21164pc', `21264', `21264a',
+     `21264b', `ev4', `ev5', `lca45', `ev5', `ev56', `pca56', `ev6',
+     `ev67', `ev68'.  The special name `all' may be used to allow the
+     assembler to accept instructions valid for any Alpha processor.
+
+     In order to support existing practice in OSF/1 with respect to
+     `.arch', and existing practice within `MILO' (the Linux ARC
+     bootloader), the numbered processor names (e.g. 21064) enable the
+     processor-specific PALcode instructions, while the
+     "electro-vlasic" names (e.g. `ev4') do not.
+
+`-mdebug'
+`-no-mdebug'
+     Enables or disables the generation of `.mdebug' encapsulation for
+     stabs directives and procedure descriptors.  The default is to
+     automatically enable `.mdebug' when the first stabs directive is
+     seen.
+
+`-relax'
+     This option forces all relocations to be put into the object file,
+     instead of saving space and resolving some relocations at assembly
+     time.  Note that this option does not propagate all symbol
+     arithmetic into the object file, because not all symbol arithmetic
+     can be represented.  However, the option can still be useful in
+     specific applications.
+
+`-replace'
+
+`-noreplace'
+     Enables or disables the optimization of procedure calls, both at
+     assemblage and at link time.  These options are only available for
+     VMS targets and `-replace' is the default.  See section 1.4.1 of
+     the OpenVMS Linker Utility Manual.
+
+`-g'
+     This option is used when the compiler generates debug information.
+     When `gcc' is using `mips-tfile' to generate debug information for
+     ECOFF, local labels must be passed through to the object file.
+     Otherwise this option has no effect.
+
+`-GSIZE'
+     A local common symbol larger than SIZE is placed in `.bss', while
+     smaller symbols are placed in `.sbss'.
+
+`-F'
+`-32addr'
+     These options are ignored for backward compatibility.
+
+
+File: as.info,  Node: Alpha Syntax,  Next: Alpha Floating Point,  Prev: Alpha Options,  Up: Alpha-Dependent
+
+9.1.3 Syntax
+------------
+
+The assembler syntax closely follow the Alpha Reference Manual;
+assembler directives and general syntax closely follow the OSF/1 and
+OpenVMS syntax, with a few differences for ELF.
+
+* Menu:
+
+* Alpha-Chars::                Special Characters
+* Alpha-Regs::                 Register Names
+* Alpha-Relocs::               Relocations
+
+
+File: as.info,  Node: Alpha-Chars,  Next: Alpha-Regs,  Up: Alpha Syntax
+
+9.1.3.1 Special Characters
+..........................
+
+`#' is the line comment character.
+
+   `;' can be used instead of a newline to separate statements.
+
+
+File: as.info,  Node: Alpha-Regs,  Next: Alpha-Relocs,  Prev: Alpha-Chars,  Up: Alpha Syntax
+
+9.1.3.2 Register Names
+......................
+
+The 32 integer registers are referred to as `$N' or `$rN'.  In
+addition, registers 15, 28, 29, and 30 may be referred to by the
+symbols `$fp', `$at', `$gp', and `$sp' respectively.
+
+   The 32 floating-point registers are referred to as `$fN'.
+
+
+File: as.info,  Node: Alpha-Relocs,  Prev: Alpha-Regs,  Up: Alpha Syntax
+
+9.1.3.3 Relocations
+...................
+
+Some of these relocations are available for ECOFF, but mostly only for
+ELF.  They are modeled after the relocation format introduced in
+Digital Unix 4.0, but there are additions.
+
+   The format is `!TAG' or `!TAG!NUMBER' where TAG is the name of the
+relocation.  In some cases NUMBER is used to relate specific
+instructions.
+
+   The relocation is placed at the end of the instruction like so:
+
+     ldah  $0,a($29)    !gprelhigh
+     lda   $0,a($0)     !gprellow
+     ldq   $1,b($29)    !literal!100
+     ldl   $2,0($1)     !lituse_base!100
+
+`!literal'
+`!literal!N'
+     Used with an `ldq' instruction to load the address of a symbol
+     from the GOT.
+
+     A sequence number N is optional, and if present is used to pair
+     `lituse' relocations with this `literal' relocation.  The `lituse'
+     relocations are used by the linker to optimize the code based on
+     the final location of the symbol.
+
+     Note that these optimizations are dependent on the data flow of the
+     program.  Therefore, if _any_ `lituse' is paired with a `literal'
+     relocation, then _all_ uses of the register set by the `literal'
+     instruction must also be marked with `lituse' relocations.  This
+     is because the original `literal' instruction may be deleted or
+     transformed into another instruction.
+
+     Also note that there may be a one-to-many relationship between
+     `literal' and `lituse', but not a many-to-one.  That is, if there
+     are two code paths that load up the same address and feed the
+     value to a single use, then the use may not use a `lituse'
+     relocation.
+
+`!lituse_base!N'
+     Used with any memory format instruction (e.g. `ldl') to indicate
+     that the literal is used for an address load.  The offset field of
+     the instruction must be zero.  During relaxation, the code may be
+     altered to use a gp-relative load.
+
+`!lituse_jsr!N'
+     Used with a register branch format instruction (e.g. `jsr') to
+     indicate that the literal is used for a call.  During relaxation,
+     the code may be altered to use a direct branch (e.g. `bsr').
+
+`!lituse_jsrdirect!N'
+     Similar to `lituse_jsr', but also that this call cannot be vectored
+     through a PLT entry.  This is useful for functions with special
+     calling conventions which do not allow the normal call-clobbered
+     registers to be clobbered.
+
+`!lituse_bytoff!N'
+     Used with a byte mask instruction (e.g. `extbl') to indicate that
+     only the low 3 bits of the address are relevant.  During
+     relaxation, the code may be altered to use an immediate instead of
+     a register shift.
+
+`!lituse_addr!N'
+     Used with any other instruction to indicate that the original
+     address is in fact used, and the original `ldq' instruction may
+     not be altered or deleted.  This is useful in conjunction with
+     `lituse_jsr' to test whether a weak symbol is defined.
+
+          ldq  $27,foo($29)   !literal!1
+          beq  $27,is_undef   !lituse_addr!1
+          jsr  $26,($27),foo  !lituse_jsr!1
+
+`!lituse_tlsgd!N'
+     Used with a register branch format instruction to indicate that the
+     literal is the call to `__tls_get_addr' used to compute the
+     address of the thread-local storage variable whose descriptor was
+     loaded with `!tlsgd!N'.
+
+`!lituse_tlsldm!N'
+     Used with a register branch format instruction to indicate that the
+     literal is the call to `__tls_get_addr' used to compute the
+     address of the base of the thread-local storage block for the
+     current module.  The descriptor for the module must have been
+     loaded with `!tlsldm!N'.
+
+`!gpdisp!N'
+     Used with `ldah' and `lda' to load the GP from the current
+     address, a-la the `ldgp' macro.  The source register for the
+     `ldah' instruction must contain the address of the `ldah'
+     instruction.  There must be exactly one `lda' instruction paired
+     with the `ldah' instruction, though it may appear anywhere in the
+     instruction stream.  The immediate operands must be zero.
+
+          bsr  $26,foo
+          ldah $29,0($26)     !gpdisp!1
+          lda  $29,0($29)     !gpdisp!1
+
+`!gprelhigh'
+     Used with an `ldah' instruction to add the high 16 bits of a
+     32-bit displacement from the GP.
+
+`!gprellow'
+     Used with any memory format instruction to add the low 16 bits of a
+     32-bit displacement from the GP.
+
+`!gprel'
+     Used with any memory format instruction to add a 16-bit
+     displacement from the GP.
+
+`!samegp'
+     Used with any branch format instruction to skip the GP load at the
+     target address.  The referenced symbol must have the same GP as the
+     source object file, and it must be declared to either not use `$27'
+     or perform a standard GP load in the first two instructions via the
+     `.prologue' directive.
+
+`!tlsgd'
+`!tlsgd!N'
+     Used with an `lda' instruction to load the address of a TLS
+     descriptor for a symbol in the GOT.
+
+     The sequence number N is optional, and if present it used to pair
+     the descriptor load with both the `literal' loading the address of
+     the `__tls_get_addr' function and the `lituse_tlsgd' marking the
+     call to that function.
+
+     For proper relaxation, both the `tlsgd', `literal' and `lituse'
+     relocations must be in the same extended basic block.  That is,
+     the relocation with the lowest address must be executed first at
+     runtime.
+
+`!tlsldm'
+`!tlsldm!N'
+     Used with an `lda' instruction to load the address of a TLS
+     descriptor for the current module in the GOT.
+
+     Similar in other respects to `tlsgd'.
+
+`!gotdtprel'
+     Used with an `ldq' instruction to load the offset of the TLS
+     symbol within its module's thread-local storage block.  Also known
+     as the dynamic thread pointer offset or dtp-relative offset.
+
+`!dtprelhi'
+`!dtprello'
+`!dtprel'
+     Like `gprel' relocations except they compute dtp-relative offsets.
+
+`!gottprel'
+     Used with an `ldq' instruction to load the offset of the TLS
+     symbol from the thread pointer.  Also known as the tp-relative
+     offset.
+
+`!tprelhi'
+`!tprello'
+`!tprel'
+     Like `gprel' relocations except they compute tp-relative offsets.
+
+
+File: as.info,  Node: Alpha Floating Point,  Next: Alpha Directives,  Prev: Alpha Syntax,  Up: Alpha-Dependent
+
+9.1.4 Floating Point
+--------------------
+
+The Alpha family uses both IEEE and VAX floating-point numbers.
+
+
+File: as.info,  Node: Alpha Directives,  Next: Alpha Opcodes,  Prev: Alpha Floating Point,  Up: Alpha-Dependent
+
+9.1.5 Alpha Assembler Directives
+--------------------------------
+
+`as' for the Alpha supports many additional directives for
+compatibility with the native assembler.  This section describes them
+only briefly.
+
+   These are the additional directives in `as' for the Alpha:
+
+`.arch CPU'
+     Specifies the target processor.  This is equivalent to the `-mCPU'
+     command-line option.  *Note Options: Alpha Options, for a list of
+     values for CPU.
+
+`.ent FUNCTION[, N]'
+     Mark the beginning of FUNCTION.  An optional number may follow for
+     compatibility with the OSF/1 assembler, but is ignored.  When
+     generating `.mdebug' information, this will create a procedure
+     descriptor for the function.  In ELF, it will mark the symbol as a
+     function a-la the generic `.type' directive.
+
+`.end FUNCTION'
+     Mark the end of FUNCTION.  In ELF, it will set the size of the
+     symbol a-la the generic `.size' directive.
+
+`.mask MASK, OFFSET'
+     Indicate which of the integer registers are saved in the current
+     function's stack frame.  MASK is interpreted a bit mask in which
+     bit N set indicates that register N is saved.  The registers are
+     saved in a block located OFFSET bytes from the "canonical frame
+     address" (CFA) which is the value of the stack pointer on entry to
+     the function.  The registers are saved sequentially, except that
+     the return address register (normally `$26') is saved first.
+
+     This and the other directives that describe the stack frame are
+     currently only used when generating `.mdebug' information.  They
+     may in the future be used to generate DWARF2 `.debug_frame' unwind
+     information for hand written assembly.
+
+`.fmask MASK, OFFSET'
+     Indicate which of the floating-point registers are saved in the
+     current stack frame.  The MASK and OFFSET parameters are
+     interpreted as with `.mask'.
+
+`.frame FRAMEREG, FRAMEOFFSET, RETREG[, ARGOFFSET]'
+     Describes the shape of the stack frame.  The frame pointer in use
+     is FRAMEREG; normally this is either `$fp' or `$sp'.  The frame
+     pointer is FRAMEOFFSET bytes below the CFA.  The return address is
+     initially located in RETREG until it is saved as indicated in
+     `.mask'.  For compatibility with OSF/1 an optional ARGOFFSET
+     parameter is accepted and ignored.  It is believed to indicate the
+     offset from the CFA to the saved argument registers.
+
+`.prologue N'
+     Indicate that the stack frame is set up and all registers have been
+     spilled.  The argument N indicates whether and how the function
+     uses the incoming "procedure vector" (the address of the called
+     function) in `$27'.  0 indicates that `$27' is not used; 1
+     indicates that the first two instructions of the function use `$27'
+     to perform a load of the GP register; 2 indicates that `$27' is
+     used in some non-standard way and so the linker cannot elide the
+     load of the procedure vector during relaxation.
+
+`.usepv FUNCTION, WHICH'
+     Used to indicate the use of the `$27' register, similar to
+     `.prologue', but without the other semantics of needing to be
+     inside an open `.ent'/`.end' block.
+
+     The WHICH argument should be either `no', indicating that `$27' is
+     not used, or `std', indicating that the first two instructions of
+     the function perform a GP load.
+
+     One might use this directive instead of `.prologue' if you are
+     also using dwarf2 CFI directives.
+
+`.gprel32 EXPRESSION'
+     Computes the difference between the address in EXPRESSION and the
+     GP for the current object file, and stores it in 4 bytes.  In
+     addition to being smaller than a full 8 byte address, this also
+     does not require a dynamic relocation when used in a shared
+     library.
+
+`.t_floating EXPRESSION'
+     Stores EXPRESSION as an IEEE double precision value.
+
+`.s_floating EXPRESSION'
+     Stores EXPRESSION as an IEEE single precision value.
+
+`.f_floating EXPRESSION'
+     Stores EXPRESSION as a VAX F format value.
+
+`.g_floating EXPRESSION'
+     Stores EXPRESSION as a VAX G format value.
+
+`.d_floating EXPRESSION'
+     Stores EXPRESSION as a VAX D format value.
+
+`.set FEATURE'
+     Enables or disables various assembler features.  Using the positive
+     name of the feature enables while using `noFEATURE' disables.
+
+    `at'
+          Indicates that macro expansions may clobber the "assembler
+          temporary" (`$at' or `$28') register.  Some macros may not be
+          expanded without this and will generate an error message if
+          `noat' is in effect.  When `at' is in effect, a warning will
+          be generated if `$at' is used by the programmer.
+
+    `macro'
+          Enables the expansion of macro instructions.  Note that
+          variants of real instructions, such as `br label' vs `br
+          $31,label' are considered alternate forms and not macros.
+
+    `move'
+    `reorder'
+    `volatile'
+          These control whether and how the assembler may re-order
+          instructions.  Accepted for compatibility with the OSF/1
+          assembler, but `as' does not do instruction scheduling, so
+          these features are ignored.
+
+   The following directives are recognized for compatibility with the
+OSF/1 assembler but are ignored.
+
+     .proc           .aproc
+     .reguse         .livereg
+     .option         .aent
+     .ugen           .eflag
+     .alias          .noalias
+
+
+File: as.info,  Node: Alpha Opcodes,  Prev: Alpha Directives,  Up: Alpha-Dependent
+
+9.1.6 Opcodes
+-------------
+
+For detailed information on the Alpha machine instruction set, see the
+Alpha Architecture Handbook
+(ftp://ftp.digital.com/pub/Digital/info/semiconductor/literature/alphaahb.pdf).
+
+
+File: as.info,  Node: ARC-Dependent,  Next: ARM-Dependent,  Prev: Alpha-Dependent,  Up: Machine Dependencies
+
+9.2 ARC Dependent Features
+==========================
+
+* Menu:
+
+* ARC Options::              Options
+* ARC Syntax::               Syntax
+* ARC Floating Point::       Floating Point
+* ARC Directives::           ARC Machine Directives
+* ARC Opcodes::              Opcodes
+
+
+File: as.info,  Node: ARC Options,  Next: ARC Syntax,  Up: ARC-Dependent
+
+9.2.1 Options
+-------------
+
+`-marc[5|6|7|8]'
+     This option selects the core processor variant.  Using `-marc' is
+     the same as `-marc6', which is also the default.
+
+    `arc5'
+          Base instruction set.
+
+    `arc6'
+          Jump-and-link (jl) instruction.  No requirement of an
+          instruction between setting flags and conditional jump.  For
+          example:
+
+                 mov.f r0,r1
+                 beq   foo
+
+    `arc7'
+          Break (brk) and sleep (sleep) instructions.
+
+    `arc8'
+          Software interrupt (swi) instruction.
+
+
+     Note: the `.option' directive can to be used to select a core
+     variant from within assembly code.
+
+`-EB'
+     This option specifies that the output generated by the assembler
+     should be marked as being encoded for a big-endian processor.
+
+`-EL'
+     This option specifies that the output generated by the assembler
+     should be marked as being encoded for a little-endian processor -
+     this is the default.
+
+
+
+File: as.info,  Node: ARC Syntax,  Next: ARC Floating Point,  Prev: ARC Options,  Up: ARC-Dependent
+
+9.2.2 Syntax
+------------
+
+* Menu:
+
+* ARC-Chars::                Special Characters
+* ARC-Regs::                 Register Names
+
+
+File: as.info,  Node: ARC-Chars,  Next: ARC-Regs,  Up: ARC Syntax
+
+9.2.2.1 Special Characters
+..........................
+
+*TODO*
+
+
+File: as.info,  Node: ARC-Regs,  Prev: ARC-Chars,  Up: ARC Syntax
+
+9.2.2.2 Register Names
+......................
+
+*TODO*
+
+
+File: as.info,  Node: ARC Floating Point,  Next: ARC Directives,  Prev: ARC Syntax,  Up: ARC-Dependent
+
+9.2.3 Floating Point
+--------------------
+
+The ARC core does not currently have hardware floating point support.
+Software floating point support is provided by `GCC' and uses IEEE
+floating-point numbers.
+
+
+File: as.info,  Node: ARC Directives,  Next: ARC Opcodes,  Prev: ARC Floating Point,  Up: ARC-Dependent
+
+9.2.4 ARC Machine Directives
+----------------------------
+
+The ARC version of `as' supports the following additional machine
+directives:
+
+`.2byte EXPRESSIONS'
+     *TODO*
+
+`.3byte EXPRESSIONS'
+     *TODO*
+
+`.4byte EXPRESSIONS'
+     *TODO*
+
+`.extAuxRegister NAME,ADDRESS,MODE'
+     The ARCtangent A4 has extensible auxiliary register space.  The
+     auxiliary registers can be defined in the assembler source code by
+     using this directive.  The first parameter is the NAME of the new
+     auxiallry register.  The second parameter is the ADDRESS of the
+     register in the auxiliary register memory map for the variant of
+     the ARC.  The third parameter specifies the MODE in which the
+     register can be operated is and it can be one of:
+
+    `r          (readonly)'
+
+    `w          (write only)'
+
+    `r|w        (read or write)'
+
+     For example:
+
+            .extAuxRegister mulhi,0x12,w
+
+     This specifies an extension auxiliary register called _mulhi_
+     which is at address 0x12 in the memory space and which is only
+     writable.
+
+`.extCondCode SUFFIX,VALUE'
+     The condition codes on the ARCtangent A4 are extensible and can be
+     specified by means of this assembler directive.  They are specified
+     by the suffix and the value for the condition code.  They can be
+     used to specify extra condition codes with any values.  For
+     example:
+
+            .extCondCode is_busy,0x14
+
+             add.is_busy  r1,r2,r3
+             bis_busy     _main
+
+`.extCoreRegister NAME,REGNUM,MODE,SHORTCUT'
+     Specifies an extension core register NAME for the application.
+     This allows a register NAME with a valid REGNUM between 0 and 60,
+     with the following as valid values for MODE
+
+    `_r_   (readonly)'
+
+    `_w_   (write only)'
+
+    `_r|w_ (read or write)'
+
+     The other parameter gives a description of the register having a
+     SHORTCUT in the pipeline.  The valid values are:
+
+    `can_shortcut'
+
+    `cannot_shortcut'
+
+     For example:
+
+            .extCoreRegister mlo,57,r,can_shortcut
+
+     This defines an extension core register mlo with the value 57 which
+     can shortcut the pipeline.
+
+`.extInstruction NAME,OPCODE,SUBOPCODE,SUFFIXCLASS,SYNTAXCLASS'
+     The ARCtangent A4 allows the user to specify extension
+     instructions.  The extension instructions are not macros.  The
+     assembler creates encodings for use of these instructions
+     according to the specification by the user.  The parameters are:
+
+    *NAME
+          Name of the extension instruction
+
+    *OPCODE
+          Opcode to be used. (Bits 27:31 in the encoding).  Valid values
+          0x10-0x1f or 0x03
+
+    *SUBOPCODE
+          Subopcode to be used.  Valid values are from 0x09-0x3f.
+          However the correct value also depends on SYNTAXCLASS
+
+    *SUFFIXCLASS
+          Determines the kinds of suffixes to be allowed.  Valid values
+          are `SUFFIX_NONE', `SUFFIX_COND', `SUFFIX_FLAG' which
+          indicates the absence or presence of conditional suffixes and
+          flag setting by the extension instruction.  It is also
+          possible to specify that an instruction sets the flags and is
+          conditional by using `SUFFIX_CODE' | `SUFFIX_FLAG'.
+
+    *SYNTAXCLASS
+          Determines the syntax class for the instruction.  It can have
+          the following values:
+
+         ``SYNTAX_2OP':'
+               2 Operand Instruction
+
+         ``SYNTAX_3OP':'
+               3 Operand Instruction
+
+          In addition there could be modifiers for the syntax class as
+          described below:
+
+               Syntax Class Modifiers are:
+
+             - `OP1_MUST_BE_IMM': Modifies syntax class SYNTAX_3OP,
+               specifying that the first operand of a three-operand
+               instruction must be an immediate (i.e., the result is
+               discarded).  OP1_MUST_BE_IMM is used by bitwise ORing it
+               with SYNTAX_3OP as given in the example below.  This
+               could usually be used to set the flags using specific
+               instructions and not retain results.
+
+             - `OP1_IMM_IMPLIED': Modifies syntax class SYNTAX_20P, it
+               specifies that there is an implied immediate destination
+               operand which does not appear in the syntax.  For
+               example, if the source code contains an instruction like:
+
+                    inst r1,r2
+
+               it really means that the first argument is an implied
+               immediate (that is, the result is discarded).  This is
+               the same as though the source code were: inst 0,r1,r2.
+               You use OP1_IMM_IMPLIED by bitwise ORing it with
+               SYNTAX_20P.
+
+
+     For example, defining 64-bit multiplier with immediate operands:
+
+          .extInstruction mp64,0x14,0x0,SUFFIX_COND | SUFFIX_FLAG ,
+                          SYNTAX_3OP|OP1_MUST_BE_IMM
+
+     The above specifies an extension instruction called mp64 which has
+     3 operands, sets the flags, can be used with a condition code, for
+     which the first operand is an immediate.  (Equivalent to
+     discarding the result of the operation).
+
+           .extInstruction mul64,0x14,0x00,SUFFIX_COND, SYNTAX_2OP|OP1_IMM_IMPLIED
+
+     This describes a 2 operand instruction with an implicit first
+     immediate operand.  The result of this operation would be
+     discarded.
+
+`.half EXPRESSIONS'
+     *TODO*
+
+`.long EXPRESSIONS'
+     *TODO*
+
+`.option ARC|ARC5|ARC6|ARC7|ARC8'
+     The `.option' directive must be followed by the desired core
+     version. Again `arc' is an alias for `arc6'.
+
+     Note: the `.option' directive overrides the command line option
+     `-marc'; a warning is emitted when the version is not consistent
+     between the two - even for the implicit default core version
+     (arc6).
+
+`.short EXPRESSIONS'
+     *TODO*
+
+`.word EXPRESSIONS'
+     *TODO*
+
+
+
+File: as.info,  Node: ARC Opcodes,  Prev: ARC Directives,  Up: ARC-Dependent
+
+9.2.5 Opcodes
+-------------
+
+For information on the ARC instruction set, see `ARC Programmers
+Reference Manual', ARC International (www.arc.com)
+
+
+File: as.info,  Node: ARM-Dependent,  Next: AVR-Dependent,  Prev: ARC-Dependent,  Up: Machine Dependencies
+
+9.3 ARM Dependent Features
+==========================
+
+* Menu:
+
+* ARM Options::              Options
+* ARM Syntax::               Syntax
+* ARM Floating Point::       Floating Point
+* ARM Directives::           ARM Machine Directives
+* ARM Opcodes::              Opcodes
+* ARM Mapping Symbols::      Mapping Symbols
+* ARM Unwinding Tutorial::   Unwinding
+
+
+File: as.info,  Node: ARM Options,  Next: ARM Syntax,  Up: ARM-Dependent
+
+9.3.1 Options
+-------------
+
+`-mcpu=PROCESSOR[+EXTENSION...]'
+     This option specifies the target processor.  The assembler will
+     issue an error message if an attempt is made to assemble an
+     instruction which will not execute on the target processor.  The
+     following processor names are recognized: `arm1', `arm2', `arm250',
+     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
+     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
+     `arm700i', `arm710', `arm710t', `arm720', `arm720t', `arm740t',
+     `arm710c', `arm7100', `arm7500', `arm7500fe', `arm7t', `arm7tdmi',
+     `arm7tdmi-s', `arm8', `arm810', `strongarm', `strongarm1',
+     `strongarm110', `strongarm1100', `strongarm1110', `arm9', `arm920',
+     `arm920t', `arm922t', `arm940t', `arm9tdmi', `fa526' (Faraday
+     FA526 processor), `fa626' (Faraday FA626 processor), `arm9e',
+     `arm926e', `arm926ej-s', `arm946e-r0', `arm946e', `arm946e-s',
+     `arm966e-r0', `arm966e', `arm966e-s', `arm968e-s', `arm10t',
+     `arm10tdmi', `arm10e', `arm1020', `arm1020t', `arm1020e',
+     `arm1022e', `arm1026ej-s', `fa626te' (Faraday FA626TE processor),
+     `fa726te' (Faraday FA726TE processor), `arm1136j-s', `arm1136jf-s',
+     `arm1156t2-s', `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s',
+     `mpcore', `mpcorenovfp', `cortex-a8', `cortex-a9', `cortex-r4',
+     `cortex-m3', `cortex-m1', `cortex-m0', `ep9312' (ARM920 with
+     Cirrus Maverick coprocessor), `i80200' (Intel XScale processor)
+     `iwmmxt' (Intel(r) XScale processor with Wireless MMX(tm)
+     technology coprocessor) and `xscale'.  The special name `all' may
+     be used to allow the assembler to accept instructions valid for
+     any ARM processor.
+
+     In addition to the basic instruction set, the assembler can be
+     told to accept various extension mnemonics that extend the
+     processor using the co-processor instruction space.  For example,
+     `-mcpu=arm920+maverick' is equivalent to specifying
+     `-mcpu=ep9312'.  The following extensions are currently supported:
+     `+maverick' `+iwmmxt' and `+xscale'.
+
+`-march=ARCHITECTURE[+EXTENSION...]'
+     This option specifies the target architecture.  The assembler will
+     issue an error message if an attempt is made to assemble an
+     instruction which will not execute on the target architecture.
+     The following architecture names are recognized: `armv1', `armv2',
+     `armv2a', `armv2s', `armv3', `armv3m', `armv4', `armv4xm',
+     `armv4t', `armv4txm', `armv5', `armv5t', `armv5txm', `armv5te',
+     `armv5texp', `armv6', `armv6j', `armv6k', `armv6z', `armv6zk',
+     `armv7', `armv7-a', `armv7-r', `armv7-m', `iwmmxt' and `xscale'.
+     If both `-mcpu' and `-march' are specified, the assembler will use
+     the setting for `-mcpu'.
+
+     The architecture option can be extended with the same instruction
+     set extension options as the `-mcpu' option.
+
+`-mfpu=FLOATING-POINT-FORMAT'
+     This option specifies the floating point format to assemble for.
+     The assembler will issue an error message if an attempt is made to
+     assemble an instruction which will not execute on the target
+     floating point unit.  The following format options are recognized:
+     `softfpa', `fpe', `fpe2', `fpe3', `fpa', `fpa10', `fpa11',
+     `arm7500fe', `softvfp', `softvfp+vfp', `vfp', `vfp10', `vfp10-r0',
+     `vfp9', `vfpxd', `vfpv2' `vfpv3' `vfpv3-d16' `arm1020t',
+     `arm1020e', `arm1136jf-s', `maverick' and `neon'.
+
+     In addition to determining which instructions are assembled, this
+     option also affects the way in which the `.double' assembler
+     directive behaves when assembling little-endian code.
+
+     The default is dependent on the processor selected.  For
+     Architecture 5 or later, the default is to assembler for VFP
+     instructions; for earlier architectures the default is to assemble
+     for FPA instructions.
+
+`-mthumb'
+     This option specifies that the assembler should start assembling
+     Thumb instructions; that is, it should behave as though the file
+     starts with a `.code 16' directive.
+
+`-mthumb-interwork'
+     This option specifies that the output generated by the assembler
+     should be marked as supporting interworking.
+
+`-mimplicit-it=never'
+`-mimplicit-it=always'
+`-mimplicit-it=arm'
+`-mimplicit-it=thumb'
+     The `-mimplicit-it' option controls the behavior of the assembler
+     when conditional instructions are not enclosed in IT blocks.
+     There are four possible behaviors.  If `never' is specified, such
+     constructs cause a warning in ARM code and an error in Thumb-2
+     code.  If `always' is specified, such constructs are accepted in
+     both ARM and Thumb-2 code, where the IT instruction is added
+     implicitly.  If `arm' is specified, such constructs are accepted
+     in ARM code and cause an error in Thumb-2 code.  If `thumb' is
+     specified, such constructs cause a warning in ARM code and are
+     accepted in Thumb-2 code.  If you omit this option, the behavior
+     is equivalent to `-mimplicit-it=arm'.
+
+`-mapcs `[26|32]''
+     This option specifies that the output generated by the assembler
+     should be marked as supporting the indicated version of the Arm
+     Procedure.  Calling Standard.
+
+`-matpcs'
+     This option specifies that the output generated by the assembler
+     should be marked as supporting the Arm/Thumb Procedure Calling
+     Standard.  If enabled this option will cause the assembler to
+     create an empty debugging section in the object file called
+     .arm.atpcs.  Debuggers can use this to determine the ABI being
+     used by.
+
+`-mapcs-float'
+     This indicates the floating point variant of the APCS should be
+     used.  In this variant floating point arguments are passed in FP
+     registers rather than integer registers.
+
+`-mapcs-reentrant'
+     This indicates that the reentrant variant of the APCS should be
+     used.  This variant supports position independent code.
+
+`-mfloat-abi=ABI'
+     This option specifies that the output generated by the assembler
+     should be marked as using specified floating point ABI.  The
+     following values are recognized: `soft', `softfp' and `hard'.
+
+`-meabi=VER'
+     This option specifies which EABI version the produced object files
+     should conform to.  The following values are recognized: `gnu', `4'
+     and `5'.
+
+`-EB'
+     This option specifies that the output generated by the assembler
+     should be marked as being encoded for a big-endian processor.
+
+`-EL'
+     This option specifies that the output generated by the assembler
+     should be marked as being encoded for a little-endian processor.
+
+`-k'
+     This option specifies that the output of the assembler should be
+     marked as position-independent code (PIC).
+
+`--fix-v4bx'
+     Allow `BX' instructions in ARMv4 code.  This is intended for use
+     with the linker option of the same name.
+
+`-mwarn-deprecated'
+`-mno-warn-deprecated'
+     Enable or disable warnings about using deprecated options or
+     features.  The default is to warn.
+
+
+
+File: as.info,  Node: ARM Syntax,  Next: ARM Floating Point,  Prev: ARM Options,  Up: ARM-Dependent
+
+9.3.2 Syntax
+------------
+
+* Menu:
+
+* ARM-Instruction-Set::      Instruction Set
+* ARM-Chars::                Special Characters
+* ARM-Regs::                 Register Names
+* ARM-Relocations::	     Relocations
+
+
+File: as.info,  Node: ARM-Instruction-Set,  Next: ARM-Chars,  Up: ARM Syntax
+
+9.3.2.1 Instruction Set Syntax
+..............................
+
+Two slightly different syntaxes are support for ARM and THUMB
+instructions.  The default, `divided', uses the old style where ARM and
+THUMB instructions had their own, separate syntaxes.  The new,
+`unified' syntax, which can be selected via the `.syntax' directive,
+and has the following main features:
+
+*
+     Immediate operands do not require a `#' prefix.
+
+*
+     The `IT' instruction may appear, and if it does it is validated
+     against subsequent conditional affixes.  In ARM mode it does not
+     generate machine code, in THUMB mode it does.
+
+*
+     For ARM instructions the conditional affixes always appear at the
+     end of the instruction.  For THUMB instructions conditional
+     affixes can be used, but only inside the scope of an `IT'
+     instruction.
+
+*
+     All of the instructions new to the V6T2 architecture (and later)
+     are available.  (Only a few such instructions can be written in the
+     `divided' syntax).
+
+*
+     The `.N' and `.W' suffixes are recognized and honored.
+
+*
+     All instructions set the flags if and only if they have an `s'
+     affix.
+
+
+File: as.info,  Node: ARM-Chars,  Next: ARM-Regs,  Prev: ARM-Instruction-Set,  Up: ARM Syntax
+
+9.3.2.2 Special Characters
+..........................
+
+The presence of a `@' on a line indicates the start of a comment that
+extends to the end of the current line.  If a `#' appears as the first
+character of a line, the whole line is treated as a comment.
+
+   The `;' character can be used instead of a newline to separate
+statements.
+
+   Either `#' or `$' can be used to indicate immediate operands.
+
+   *TODO* Explain about /data modifier on symbols.
+
+
+File: as.info,  Node: ARM-Regs,  Next: ARM-Relocations,  Prev: ARM-Chars,  Up: ARM Syntax
+
+9.3.2.3 Register Names
+......................
+
+*TODO* Explain about ARM register naming, and the predefined names.
+
+
+File: as.info,  Node: ARM Floating Point,  Next: ARM Directives,  Prev: ARM Syntax,  Up: ARM-Dependent
+
+9.3.3 Floating Point
+--------------------
+
+The ARM family uses IEEE floating-point numbers.
+
+
+File: as.info,  Node: ARM-Relocations,  Prev: ARM-Regs,  Up: ARM Syntax
+
+9.3.3.1 ARM relocation generation
+.................................
+
+Specific data relocations can be generated by putting the relocation
+name in parentheses after the symbol name.  For example:
+
+             .word foo(TARGET1)
+
+   This will generate an `R_ARM_TARGET1' relocation against the symbol
+FOO.  The following relocations are supported: `GOT', `GOTOFF',
+`TARGET1', `TARGET2', `SBREL', `TLSGD', `TLSLDM', `TLSLDO', `GOTTPOFF'
+and `TPOFF'.
+
+   For compatibility with older toolchains the assembler also accepts
+`(PLT)' after branch targets.  This will generate the deprecated
+`R_ARM_PLT32' relocation.
+
+   Relocations for `MOVW' and `MOVT' instructions can be generated by
+prefixing the value with `#:lower16:' and `#:upper16' respectively.
+For example to load the 32-bit address of foo into r0:
+
+             MOVW r0, #:lower16:foo
+             MOVT r0, #:upper16:foo
+
+
+File: as.info,  Node: ARM Directives,  Next: ARM Opcodes,  Prev: ARM Floating Point,  Up: ARM-Dependent
+
+9.3.4 ARM Machine Directives
+----------------------------
+
+`.2byte EXPRESSION [, EXPRESSION]*'
+`.4byte EXPRESSION [, EXPRESSION]*'
+`.8byte EXPRESSION [, EXPRESSION]*'
+     These directives write 2, 4 or 8 byte values to the output section.
+
+`.align EXPRESSION [, EXPRESSION]'
+     This is the generic .ALIGN directive.  For the ARM however if the
+     first argument is zero (ie no alignment is needed) the assembler
+     will behave as if the argument had been 2 (ie pad to the next four
+     byte boundary).  This is for compatibility with ARM's own
+     assembler.
+
+`.arch NAME'
+     Select the target architecture.  Valid values for NAME are the
+     same as for the `-march' commandline option.
+
+`.arm'
+     This performs the same action as .CODE 32.
+
+`.pad #COUNT'
+     Generate unwinder annotations for a stack adjustment of COUNT
+     bytes.  A positive value indicates the function prologue allocated
+     stack space by decrementing the stack pointer.
+
+`.bss'
+     This directive switches to the `.bss' section.
+
+`.cantunwind'
+     Prevents unwinding through the current function.  No personality
+     routine or exception table data is required or permitted.
+
+`.code `[16|32]''
+     This directive selects the instruction set being generated. The
+     value 16 selects Thumb, with the value 32 selecting ARM.
+
+`.cpu NAME'
+     Select the target processor.  Valid values for NAME are the same as
+     for the `-mcpu' commandline option.
+
+`NAME .dn REGISTER NAME [.TYPE] [[INDEX]]'
+
+`NAME .qn REGISTER NAME [.TYPE] [[INDEX]]'
+     The `dn' and `qn' directives are used to create typed and/or
+     indexed register aliases for use in Advanced SIMD Extension (Neon)
+     instructions.  The former should be used to create aliases of
+     double-precision registers, and the latter to create aliases of
+     quad-precision registers.
+
+     If these directives are used to create typed aliases, those
+     aliases can be used in Neon instructions instead of writing types
+     after the mnemonic or after each operand.  For example:
+
+                  x .dn d2.f32
+                  y .dn d3.f32
+                  z .dn d4.f32[1]
+                  vmul x,y,z
+
+     This is equivalent to writing the following:
+
+                  vmul.f32 d2,d3,d4[1]
+
+     Aliases created using `dn' or `qn' can be destroyed using `unreq'.
+
+`.eabi_attribute TAG, VALUE'
+     Set the EABI object attribute TAG to VALUE.
+
+     The TAG is either an attribute number, or one of the following:
+     `Tag_CPU_raw_name', `Tag_CPU_name', `Tag_CPU_arch',
+     `Tag_CPU_arch_profile', `Tag_ARM_ISA_use', `Tag_THUMB_ISA_use',
+     `Tag_VFP_arch', `Tag_WMMX_arch', `Tag_Advanced_SIMD_arch',
+     `Tag_PCS_config', `Tag_ABI_PCS_R9_use', `Tag_ABI_PCS_RW_data',
+     `Tag_ABI_PCS_RO_data', `Tag_ABI_PCS_GOT_use',
+     `Tag_ABI_PCS_wchar_t', `Tag_ABI_FP_rounding',
+     `Tag_ABI_FP_denormal', `Tag_ABI_FP_exceptions',
+     `Tag_ABI_FP_user_exceptions', `Tag_ABI_FP_number_model',
+     `Tag_ABI_align8_needed', `Tag_ABI_align8_preserved',
+     `Tag_ABI_enum_size', `Tag_ABI_HardFP_use', `Tag_ABI_VFP_args',
+     `Tag_ABI_WMMX_args', `Tag_ABI_optimization_goals',
+     `Tag_ABI_FP_optimization_goals', `Tag_compatibility',
+     `Tag_CPU_unaligned_access', `Tag_VFP_HP_extension',
+     `Tag_ABI_FP_16bit_format', `Tag_nodefaults',
+     `Tag_also_compatible_with', `Tag_conformance', `Tag_T2EE_use',
+     `Tag_Virtualization_use', `Tag_MPextension_use'
+
+     The VALUE is either a `number', `"string"', or `number, "string"'
+     depending on the tag.
+
+`.even'
+     This directive aligns to an even-numbered address.
+
+`.extend  EXPRESSION [, EXPRESSION]*'
+`.ldouble  EXPRESSION [, EXPRESSION]*'
+     These directives write 12byte long double floating-point values to
+     the output section.  These are not compatible with current ARM
+     processors or ABIs.
+
+`.fnend'
+     Marks the end of a function with an unwind table entry.  The
+     unwind index table entry is created when this directive is
+     processed.
+
+     If no personality routine has been specified then standard
+     personality routine 0 or 1 will be used, depending on the number
+     of unwind opcodes required.
+
+`.fnstart'
+     Marks the start of a function with an unwind table entry.
+
+`.force_thumb'
+     This directive forces the selection of Thumb instructions, even if
+     the target processor does not support those instructions
+
+`.fpu NAME'
+     Select the floating-point unit to assemble for.  Valid values for
+     NAME are the same as for the `-mfpu' commandline option.
+
+`.handlerdata'
+     Marks the end of the current function, and the start of the
+     exception table entry for that function.  Anything between this
+     directive and the `.fnend' directive will be added to the
+     exception table entry.
+
+     Must be preceded by a `.personality' or `.personalityindex'
+     directive.
+
+`.inst OPCODE [ , ... ]'
+
+`.inst.n OPCODE [ , ... ]'
+
+`.inst.w OPCODE [ , ... ]'
+     Generates the instruction corresponding to the numerical value
+     OPCODE.  `.inst.n' and `.inst.w' allow the Thumb instruction size
+     to be specified explicitly, overriding the normal encoding rules.
+
+`.ldouble  EXPRESSION [, EXPRESSION]*'
+     See `.extend'.
+
+`.ltorg'
+     This directive causes the current contents of the literal pool to
+     be dumped into the current section (which is assumed to be the
+     .text section) at the current location (aligned to a word
+     boundary).  `GAS' maintains a separate literal pool for each
+     section and each sub-section.  The `.ltorg' directive will only
+     affect the literal pool of the current section and sub-section.
+     At the end of assembly all remaining, un-empty literal pools will
+     automatically be dumped.
+
+     Note - older versions of `GAS' would dump the current literal pool
+     any time a section change occurred.  This is no longer done, since
+     it prevents accurate control of the placement of literal pools.
+
+`.movsp REG [, #OFFSET]'
+     Tell the unwinder that REG contains an offset from the current
+     stack pointer.  If OFFSET is not specified then it is assumed to be
+     zero.
+
+`.object_arch NAME'
+     Override the architecture recorded in the EABI object attribute
+     section.  Valid values for NAME are the same as for the `.arch'
+     directive.  Typically this is useful when code uses runtime
+     detection of CPU features.
+
+`.packed  EXPRESSION [, EXPRESSION]*'
+     This directive writes 12-byte packed floating-point values to the
+     output section.  These are not compatible with current ARM
+     processors or ABIs.
+
+`.pad #COUNT'
+     Generate unwinder annotations for a stack adjustment of COUNT
+     bytes.  A positive value indicates the function prologue allocated
+     stack space by decrementing the stack pointer.
+
+`.personality NAME'
+     Sets the personality routine for the current function to NAME.
+
+`.personalityindex INDEX'
+     Sets the personality routine for the current function to the EABI
+     standard routine number INDEX
+
+`.pool'
+     This is a synonym for .ltorg.
+
+`NAME .req REGISTER NAME'
+     This creates an alias for REGISTER NAME called NAME.  For example:
+
+                  foo .req r0
+
+`.save REGLIST'
+     Generate unwinder annotations to restore the registers in REGLIST.
+     The format of REGLIST is the same as the corresponding
+     store-multiple instruction.
+
+     _core registers_
+            .save {r4, r5, r6, lr}
+            stmfd sp!, {r4, r5, r6, lr}
+     _FPA registers_
+            .save f4, 2
+            sfmfd f4, 2, [sp]!
+     _VFP registers_
+            .save {d8, d9, d10}
+            fstmdx sp!, {d8, d9, d10}
+     _iWMMXt registers_
+            .save {wr10, wr11}
+            wstrd wr11, [sp, #-8]!
+            wstrd wr10, [sp, #-8]!
+          or
+            .save wr11
+            wstrd wr11, [sp, #-8]!
+            .save wr10
+            wstrd wr10, [sp, #-8]!
+
+`.setfp FPREG, SPREG [, #OFFSET]'
+     Make all unwinder annotations relative to a frame pointer.
+     Without this the unwinder will use offsets from the stack pointer.
+
+     The syntax of this directive is the same as the `sub' or `mov'
+     instruction used to set the frame pointer.  SPREG must be either
+     `sp' or mentioned in a previous `.movsp' directive.
+
+          .movsp ip
+          mov ip, sp
+          ...
+          .setfp fp, ip, #4
+          sub fp, ip, #4
+
+`.secrel32 EXPRESSION [, EXPRESSION]*'
+     This directive emits relocations that evaluate to the
+     section-relative offset of each expression's symbol.  This
+     directive is only supported for PE targets.
+
+`.syntax [`unified' | `divided']'
+     This directive sets the Instruction Set Syntax as described in the
+     *note ARM-Instruction-Set:: section.
+
+`.thumb'
+     This performs the same action as .CODE 16.
+
+`.thumb_func'
+     This directive specifies that the following symbol is the name of a
+     Thumb encoded function.  This information is necessary in order to
+     allow the assembler and linker to generate correct code for
+     interworking between Arm and Thumb instructions and should be used
+     even if interworking is not going to be performed.  The presence
+     of this directive also implies `.thumb'
+
+     This directive is not neccessary when generating EABI objects.  On
+     these targets the encoding is implicit when generating Thumb code.
+
+`.thumb_set'
+     This performs the equivalent of a `.set' directive in that it
+     creates a symbol which is an alias for another symbol (possibly
+     not yet defined).  This directive also has the added property in
+     that it marks the aliased symbol as being a thumb function entry
+     point, in the same way that the `.thumb_func' directive does.
+
+`.unreq ALIAS-NAME'
+     This undefines a register alias which was previously defined using
+     the `req', `dn' or `qn' directives.  For example:
+
+                  foo .req r0
+                  .unreq foo
+
+     An error occurs if the name is undefined.  Note - this pseudo op
+     can be used to delete builtin in register name aliases (eg 'r0').
+     This should only be done if it is really necessary.
+
+`.unwind_raw OFFSET, BYTE1, ...'
+     Insert one of more arbitary unwind opcode bytes, which are known
+     to adjust the stack pointer by OFFSET bytes.
+
+     For example `.unwind_raw 4, 0xb1, 0x01' is equivalent to `.save
+     {r0}'
+
+`.vsave VFP-REGLIST'
+     Generate unwinder annotations to restore the VFP registers in
+     VFP-REGLIST using FLDMD.  Also works for VFPv3 registers that are
+     to be restored using VLDM.  The format of VFP-REGLIST is the same
+     as the corresponding store-multiple instruction.
+
+     _VFP registers_
+            .vsave {d8, d9, d10}
+            fstmdd sp!, {d8, d9, d10}
+     _VFPv3 registers_
+            .vsave {d15, d16, d17}
+            vstm sp!, {d15, d16, d17}
+
+     Since FLDMX and FSTMX are now deprecated, this directive should be
+     used in favour of `.save' for saving VFP registers for ARMv6 and
+     above.
+
+
+
+File: as.info,  Node: ARM Opcodes,  Next: ARM Mapping Symbols,  Prev: ARM Directives,  Up: ARM-Dependent
+
+9.3.5 Opcodes
+-------------
+
+`as' implements all the standard ARM opcodes.  It also implements
+several pseudo opcodes, including several synthetic load instructions.
+
+`NOP'
+            nop
+
+     This pseudo op will always evaluate to a legal ARM instruction
+     that does nothing.  Currently it will evaluate to MOV r0, r0.
+
+`LDR'
+            ldr <register> , = <expression>
+
+     If expression evaluates to a numeric constant then a MOV or MVN
+     instruction will be used in place of the LDR instruction, if the
+     constant can be generated by either of these instructions.
+     Otherwise the constant will be placed into the nearest literal
+     pool (if it not already there) and a PC relative LDR instruction
+     will be generated.
+
+`ADR'
+            adr <register> <label>
+
+     This instruction will load the address of LABEL into the indicated
+     register.  The instruction will evaluate to a PC relative ADD or
+     SUB instruction depending upon where the label is located.  If the
+     label is out of range, or if it is not defined in the same file
+     (and section) as the ADR instruction, then an error will be
+     generated.  This instruction will not make use of the literal pool.
+
+`ADRL'
+            adrl <register> <label>
+
+     This instruction will load the address of LABEL into the indicated
+     register.  The instruction will evaluate to one or two PC relative
+     ADD or SUB instructions depending upon where the label is located.
+     If a second instruction is not needed a NOP instruction will be
+     generated in its place, so that this instruction is always 8 bytes
+     long.
+
+     If the label is out of range, or if it is not defined in the same
+     file (and section) as the ADRL instruction, then an error will be
+     generated.  This instruction will not make use of the literal pool.
+
+
+   For information on the ARM or Thumb instruction sets, see `ARM
+Software Development Toolkit Reference Manual', Advanced RISC Machines
+Ltd.
+
+
+File: as.info,  Node: ARM Mapping Symbols,  Next: ARM Unwinding Tutorial,  Prev: ARM Opcodes,  Up: ARM-Dependent
+
+9.3.6 Mapping Symbols
+---------------------
+
+The ARM ELF specification requires that special symbols be inserted
+into object files to mark certain features:
+
+`$a'
+     At the start of a region of code containing ARM instructions.
+
+`$t'
+     At the start of a region of code containing THUMB instructions.
+
+`$d'
+     At the start of a region of data.
+
+
+   The assembler will automatically insert these symbols for you - there
+is no need to code them yourself.  Support for tagging symbols ($b, $f,
+$p and $m) which is also mentioned in the current ARM ELF specification
+is not implemented.  This is because they have been dropped from the
+new EABI and so tools cannot rely upon their presence.
+
+
+File: as.info,  Node: ARM Unwinding Tutorial,  Prev: ARM Mapping Symbols,  Up: ARM-Dependent
+
+9.3.7 Unwinding
+---------------
+
+The ABI for the ARM Architecture specifies a standard format for
+exception unwind information.  This information is used when an
+exception is thrown to determine where control should be transferred.
+In particular, the unwind information is used to determine which
+function called the function that threw the exception, and which
+function called that one, and so forth.  This information is also used
+to restore the values of callee-saved registers in the function
+catching the exception.
+
+   If you are writing functions in assembly code, and those functions
+call other functions that throw exceptions, you must use assembly
+pseudo ops to ensure that appropriate exception unwind information is
+generated.  Otherwise, if one of the functions called by your assembly
+code throws an exception, the run-time library will be unable to unwind
+the stack through your assembly code and your program will not behave
+correctly.
+
+   To illustrate the use of these pseudo ops, we will examine the code
+that G++ generates for the following C++ input:
+
+void callee (int *);
+
+int
+caller ()
+{
+  int i;
+  callee (&i);
+  return i;
+}
+
+   This example does not show how to throw or catch an exception from
+assembly code.  That is a much more complex operation and should always
+be done in a high-level language, such as C++, that directly supports
+exceptions.
+
+   The code generated by one particular version of G++ when compiling
+the example above is:
+
+_Z6callerv:
+	.fnstart
+.LFB2:
+	@ Function supports interworking.
+	@ args = 0, pretend = 0, frame = 8
+	@ frame_needed = 1, uses_anonymous_args = 0
+	stmfd	sp!, {fp, lr}
+	.save {fp, lr}
+.LCFI0:
+	.setfp fp, sp, #4
+	add	fp, sp, #4
+.LCFI1:
+	.pad #8
+	sub	sp, sp, #8
+.LCFI2:
+	sub	r3, fp, #8
+	mov	r0, r3
+	bl	_Z6calleePi
+	ldr	r3, [fp, #-8]
+	mov	r0, r3
+	sub	sp, fp, #4
+	ldmfd	sp!, {fp, lr}
+	bx	lr
+.LFE2:
+	.fnend
+
+   Of course, the sequence of instructions varies based on the options
+you pass to GCC and on the version of GCC in use.  The exact
+instructions are not important since we are focusing on the pseudo ops
+that are used to generate unwind information.
+
+   An important assumption made by the unwinder is that the stack frame
+does not change during the body of the function.  In particular, since
+we assume that the assembly code does not itself throw an exception,
+the only point where an exception can be thrown is from a call, such as
+the `bl' instruction above.  At each call site, the same saved
+registers (including `lr', which indicates the return address) must be
+located in the same locations relative to the frame pointer.
+
+   The `.fnstart' (*note .fnstart pseudo op: arm_fnstart.) pseudo op
+appears immediately before the first instruction of the function while
+the `.fnend' (*note .fnend pseudo op: arm_fnend.) pseudo op appears
+immediately after the last instruction of the function.  These pseudo
+ops specify the range of the function.
+
+   Only the order of the other pseudos ops (e.g., `.setfp' or `.pad')
+matters; their exact locations are irrelevant.  In the example above,
+the compiler emits the pseudo ops with particular instructions.  That
+makes it easier to understand the code, but it is not required for
+correctness.  It would work just as well to emit all of the pseudo ops
+other than `.fnend' in the same order, but immediately after `.fnstart'.
+
+   The `.save' (*note .save pseudo op: arm_save.) pseudo op indicates
+registers that have been saved to the stack so that they can be
+restored before the function returns.  The argument to the `.save'
+pseudo op is a list of registers to save.  If a register is
+"callee-saved" (as specified by the ABI) and is modified by the
+function you are writing, then your code must save the value before it
+is modified and restore the original value before the function returns.
+If an exception is thrown, the run-time library restores the values of
+these registers from their locations on the stack before returning
+control to the exception handler.  (Of course, if an exception is not
+thrown, the function that contains the `.save' pseudo op restores these
+registers in the function epilogue, as is done with the `ldmfd'
+instruction above.)
+
+   You do not have to save callee-saved registers at the very beginning
+of the function and you do not need to use the `.save' pseudo op
+immediately following the point at which the registers are saved.
+However, if you modify a callee-saved register, you must save it on the
+stack before modifying it and before calling any functions which might
+throw an exception.  And, you must use the `.save' pseudo op to
+indicate that you have done so.
+
+   The `.pad' (*note .pad: arm_pad.) pseudo op indicates a modification
+of the stack pointer that does not save any registers.  The argument is
+the number of bytes (in decimal) that are subtracted from the stack
+pointer.  (On ARM CPUs, the stack grows downwards, so subtracting from
+the stack pointer increases the size of the stack.)
+
+   The `.setfp' (*note .setfp pseudo op: arm_setfp.) pseudo op
+indicates the register that contains the frame pointer.  The first
+argument is the register that is set, which is typically `fp'.  The
+second argument indicates the register from which the frame pointer
+takes its value.  The third argument, if present, is the value (in
+decimal) added to the register specified by the second argument to
+compute the value of the frame pointer.  You should not modify the
+frame pointer in the body of the function.
+
+   If you do not use a frame pointer, then you should not use the
+`.setfp' pseudo op.  If you do not use a frame pointer, then you should
+avoid modifying the stack pointer outside of the function prologue.
+Otherwise, the run-time library will be unable to find saved registers
+when it is unwinding the stack.
+
+   The pseudo ops described above are sufficient for writing assembly
+code that calls functions which may throw exceptions.  If you need to
+know more about the object-file format used to represent unwind
+information, you may consult the `Exception Handling ABI for the ARM
+Architecture' available from `http://infocenter.arm.com'.
+
+
+File: as.info,  Node: AVR-Dependent,  Next: Blackfin-Dependent,  Prev: ARM-Dependent,  Up: Machine Dependencies
+
+9.4 AVR Dependent Features
+==========================
+
+* Menu:
+
+* AVR Options::              Options
+* AVR Syntax::               Syntax
+* AVR Opcodes::              Opcodes
+
+
+File: as.info,  Node: AVR Options,  Next: AVR Syntax,  Up: AVR-Dependent
+
+9.4.1 Options
+-------------
+
+`-mmcu=MCU'
+     Specify ATMEL AVR instruction set or MCU type.
+
+     Instruction set avr1 is for the minimal AVR core, not supported by
+     the C compiler, only for assembler programs (MCU types: at90s1200,
+     attiny11, attiny12, attiny15, attiny28).
+
+     Instruction set avr2 (default) is for the classic AVR core with up
+     to 8K program memory space (MCU types: at90s2313, at90s2323,
+     at90s2333, at90s2343, attiny22, attiny26, at90s4414, at90s4433,
+     at90s4434, at90s8515, at90c8534, at90s8535).
+
+     Instruction set avr25 is for the classic AVR core with up to 8K
+     program memory space plus the MOVW instruction (MCU types:
+     attiny13, attiny13a, attiny2313, attiny2313a, attiny24, attiny24a,
+     attiny4313, attiny44, attiny44a, attiny84, attiny25, attiny45,
+     attiny85, attiny261, attiny261a, attiny461, attiny861, attiny861a,
+     attiny87, attiny43u, attiny48, attiny88, at86rf401, ata6289).
+
+     Instruction set avr3 is for the classic AVR core with up to 128K
+     program memory space (MCU types: at43usb355, at76c711).
+
+     Instruction set avr31 is for the classic AVR core with exactly
+     128K program memory space (MCU types: atmega103, at43usb320).
+
+     Instruction set avr35 is for classic AVR core plus MOVW, CALL, and
+     JMP instructions (MCU types: attiny167, attiny327, at90usb82,
+     at90usb162, atmega8u2, atmega16u2, atmega32u2).
+
+     Instruction set avr4 is for the enhanced AVR core with up to 8K
+     program memory space (MCU types: atmega48, atmega48p,atmega8,
+     atmega88, atmega88p, atmega8515, atmega8535, atmega8hva,
+     atmega4hvd, atmega8hvd, at90pwm1, at90pwm2, at90pwm2b, at90pwm3,
+     at90pwm3b, at90pwm81, atmega8m1, atmega8c1).
+
+     Instruction set avr5 is for the enhanced AVR core with up to 128K
+     program memory space (MCU types: atmega16, atmega161, atmega162,
+     atmega163, atmega164p, atmega165, atmega165p, atmega168,
+     atmega168p, atmega169, atmega169p, atmega16c1, atmega32,
+     atmega323, atmega324p, atmega325, atmega325p, atmega3250,
+     atmega3250p, atmega328p, atmega329, atmega329p, atmega3290,
+     atmega3290p, atmega406, atmega64, atmega640, atmega644,
+     atmega644p, atmega644pa, atmega645, atmega6450, atmega649,
+     atmega6490, atmega16hva, atmega16hvb, atmega32hvb, at90can32,
+     at90can64, at90pwm216, at90pwm316, atmega32c1, atmega64c1,
+     atmega16m1, atmega32m1, atmega64m1, atmega16u4, atmega32u4,
+     atmega32u6, at90usb646, at90usb647, at94k, at90scr100).
+
+     Instruction set avr51 is for the enhanced AVR core with exactly
+     128K program memory space (MCU types: atmega128, atmega1280,
+     atmega1281, atmega1284p, atmega128rfa1, at90can128, at90usb1286,
+     at90usb1287, m3000f, m3000s, m3001b).
+
+     Instruction set avr6 is for the enhanced AVR core with a 3-byte PC
+     (MCU types: atmega2560, atmega2561).
+
+`-mall-opcodes'
+     Accept all AVR opcodes, even if not supported by `-mmcu'.
+
+`-mno-skip-bug'
+     This option disable warnings for skipping two-word instructions.
+
+`-mno-wrap'
+     This option reject `rjmp/rcall' instructions with 8K wrap-around.
+
+
+
+File: as.info,  Node: AVR Syntax,  Next: AVR Opcodes,  Prev: AVR Options,  Up: AVR-Dependent
+
+9.4.2 Syntax
+------------
+
+* Menu:
+
+* AVR-Chars::                Special Characters
+* AVR-Regs::                 Register Names
+* AVR-Modifiers::            Relocatable Expression Modifiers
+
+
+File: as.info,  Node: AVR-Chars,  Next: AVR-Regs,  Up: AVR Syntax
+
+9.4.2.1 Special Characters
+..........................
+
+The presence of a `;' on a line indicates the start of a comment that
+extends to the end of the current line.  If a `#' appears as the first
+character of a line, the whole line is treated as a comment.
+
+   The `$' character can be used instead of a newline to separate
+statements.
+
+
+File: as.info,  Node: AVR-Regs,  Next: AVR-Modifiers,  Prev: AVR-Chars,  Up: AVR Syntax
+
+9.4.2.2 Register Names
+......................
+
+The AVR has 32 x 8-bit general purpose working registers `r0', `r1',
+... `r31'.  Six of the 32 registers can be used as three 16-bit
+indirect address register pointers for Data Space addressing. One of
+the these address pointers can also be used as an address pointer for
+look up tables in Flash program memory. These added function registers
+are the 16-bit `X', `Y' and `Z' - registers.
+
+     X = r26:r27
+     Y = r28:r29
+     Z = r30:r31
+
+
+File: as.info,  Node: AVR-Modifiers,  Prev: AVR-Regs,  Up: AVR Syntax
+
+9.4.2.3 Relocatable Expression Modifiers
+........................................
+
+The assembler supports several modifiers when using relocatable
+addresses in AVR instruction operands.  The general syntax is the
+following:
+
+     modifier(relocatable-expression)
+
+`lo8'
+     This modifier allows you to use bits 0 through 7 of an address
+     expression as 8 bit relocatable expression.
+
+`hi8'
+     This modifier allows you to use bits 7 through 15 of an address
+     expression as 8 bit relocatable expression.  This is useful with,
+     for example, the AVR `ldi' instruction and `lo8' modifier.
+
+     For example
+
+          ldi r26, lo8(sym+10)
+          ldi r27, hi8(sym+10)
+
+`hh8'
+     This modifier allows you to use bits 16 through 23 of an address
+     expression as 8 bit relocatable expression.  Also, can be useful
+     for loading 32 bit constants.
+
+`hlo8'
+     Synonym of `hh8'.
+
+`hhi8'
+     This modifier allows you to use bits 24 through 31 of an
+     expression as 8 bit expression. This is useful with, for example,
+     the AVR `ldi' instruction and `lo8', `hi8', `hlo8', `hhi8',
+     modifier.
+
+     For example
+
+          ldi r26, lo8(285774925)
+          ldi r27, hi8(285774925)
+          ldi r28, hlo8(285774925)
+          ldi r29, hhi8(285774925)
+          ; r29,r28,r27,r26 = 285774925
+
+`pm_lo8'
+     This modifier allows you to use bits 0 through 7 of an address
+     expression as 8 bit relocatable expression.  This modifier useful
+     for addressing data or code from Flash/Program memory. The using
+     of `pm_lo8' similar to `lo8'.
+
+`pm_hi8'
+     This modifier allows you to use bits 8 through 15 of an address
+     expression as 8 bit relocatable expression.  This modifier useful
+     for addressing data or code from Flash/Program memory.
+
+`pm_hh8'
+     This modifier allows you to use bits 15 through 23 of an address
+     expression as 8 bit relocatable expression.  This modifier useful
+     for addressing data or code from Flash/Program memory.
+
+
+
+File: as.info,  Node: AVR Opcodes,  Prev: AVR Syntax,  Up: AVR-Dependent
+
+9.4.3 Opcodes
+-------------
+
+For detailed information on the AVR machine instruction set, see
+`www.atmel.com/products/AVR'.
+
+   `as' implements all the standard AVR opcodes.  The following table
+summarizes the AVR opcodes, and their arguments.
+
+     Legend:
+        r   any register
+        d   `ldi' register (r16-r31)
+        v   `movw' even register (r0, r2, ..., r28, r30)
+        a   `fmul' register (r16-r23)
+        w   `adiw' register (r24,r26,r28,r30)
+        e   pointer registers (X,Y,Z)
+        b   base pointer register and displacement ([YZ]+disp)
+        z   Z pointer register (for [e]lpm Rd,Z[+])
+        M   immediate value from 0 to 255
+        n   immediate value from 0 to 255 ( n = ~M ). Relocation impossible
+        s   immediate value from 0 to 7
+        P   Port address value from 0 to 63. (in, out)
+        p   Port address value from 0 to 31. (cbi, sbi, sbic, sbis)
+        K   immediate value from 0 to 63 (used in `adiw', `sbiw')
+        i   immediate value
+        l   signed pc relative offset from -64 to 63
+        L   signed pc relative offset from -2048 to 2047
+        h   absolute code address (call, jmp)
+        S   immediate value from 0 to 7 (S = s << 4)
+        ?   use this opcode entry if no parameters, else use next opcode entry
+
+     1001010010001000   clc
+     1001010011011000   clh
+     1001010011111000   cli
+     1001010010101000   cln
+     1001010011001000   cls
+     1001010011101000   clt
+     1001010010111000   clv
+     1001010010011000   clz
+     1001010000001000   sec
+     1001010001011000   seh
+     1001010001111000   sei
+     1001010000101000   sen
+     1001010001001000   ses
+     1001010001101000   set
+     1001010000111000   sev
+     1001010000011000   sez
+     100101001SSS1000   bclr    S
+     100101000SSS1000   bset    S
+     1001010100001001   icall
+     1001010000001001   ijmp
+     1001010111001000   lpm     ?
+     1001000ddddd010+   lpm     r,z
+     1001010111011000   elpm    ?
+     1001000ddddd011+   elpm    r,z
+     0000000000000000   nop
+     1001010100001000   ret
+     1001010100011000   reti
+     1001010110001000   sleep
+     1001010110011000   break
+     1001010110101000   wdr
+     1001010111101000   spm
+     000111rdddddrrrr   adc     r,r
+     000011rdddddrrrr   add     r,r
+     001000rdddddrrrr   and     r,r
+     000101rdddddrrrr   cp      r,r
+     000001rdddddrrrr   cpc     r,r
+     000100rdddddrrrr   cpse    r,r
+     001001rdddddrrrr   eor     r,r
+     001011rdddddrrrr   mov     r,r
+     100111rdddddrrrr   mul     r,r
+     001010rdddddrrrr   or      r,r
+     000010rdddddrrrr   sbc     r,r
+     000110rdddddrrrr   sub     r,r
+     001001rdddddrrrr   clr     r
+     000011rdddddrrrr   lsl     r
+     000111rdddddrrrr   rol     r
+     001000rdddddrrrr   tst     r
+     0111KKKKddddKKKK   andi    d,M
+     0111KKKKddddKKKK   cbr     d,n
+     1110KKKKddddKKKK   ldi     d,M
+     11101111dddd1111   ser     d
+     0110KKKKddddKKKK   ori     d,M
+     0110KKKKddddKKKK   sbr     d,M
+     0011KKKKddddKKKK   cpi     d,M
+     0100KKKKddddKKKK   sbci    d,M
+     0101KKKKddddKKKK   subi    d,M
+     1111110rrrrr0sss   sbrc    r,s
+     1111111rrrrr0sss   sbrs    r,s
+     1111100ddddd0sss   bld     r,s
+     1111101ddddd0sss   bst     r,s
+     10110PPdddddPPPP   in      r,P
+     10111PPrrrrrPPPP   out     P,r
+     10010110KKddKKKK   adiw    w,K
+     10010111KKddKKKK   sbiw    w,K
+     10011000pppppsss   cbi     p,s
+     10011010pppppsss   sbi     p,s
+     10011001pppppsss   sbic    p,s
+     10011011pppppsss   sbis    p,s
+     111101lllllll000   brcc    l
+     111100lllllll000   brcs    l
+     111100lllllll001   breq    l
+     111101lllllll100   brge    l
+     111101lllllll101   brhc    l
+     111100lllllll101   brhs    l
+     111101lllllll111   brid    l
+     111100lllllll111   brie    l
+     111100lllllll000   brlo    l
+     111100lllllll100   brlt    l
+     111100lllllll010   brmi    l
+     111101lllllll001   brne    l
+     111101lllllll010   brpl    l
+     111101lllllll000   brsh    l
+     111101lllllll110   brtc    l
+     111100lllllll110   brts    l
+     111101lllllll011   brvc    l
+     111100lllllll011   brvs    l
+     111101lllllllsss   brbc    s,l
+     111100lllllllsss   brbs    s,l
+     1101LLLLLLLLLLLL   rcall   L
+     1100LLLLLLLLLLLL   rjmp    L
+     1001010hhhhh111h   call    h
+     1001010hhhhh110h   jmp     h
+     1001010rrrrr0101   asr     r
+     1001010rrrrr0000   com     r
+     1001010rrrrr1010   dec     r
+     1001010rrrrr0011   inc     r
+     1001010rrrrr0110   lsr     r
+     1001010rrrrr0001   neg     r
+     1001000rrrrr1111   pop     r
+     1001001rrrrr1111   push    r
+     1001010rrrrr0111   ror     r
+     1001010rrrrr0010   swap    r
+     00000001ddddrrrr   movw    v,v
+     00000010ddddrrrr   muls    d,d
+     000000110ddd0rrr   mulsu   a,a
+     000000110ddd1rrr   fmul    a,a
+     000000111ddd0rrr   fmuls   a,a
+     000000111ddd1rrr   fmulsu  a,a
+     1001001ddddd0000   sts     i,r
+     1001000ddddd0000   lds     r,i
+     10o0oo0dddddbooo   ldd     r,b
+     100!000dddddee-+   ld      r,e
+     10o0oo1rrrrrbooo   std     b,r
+     100!001rrrrree-+   st      e,r
+     1001010100011001   eicall
+     1001010000011001   eijmp
+
+
+File: as.info,  Node: Blackfin-Dependent,  Next: CR16-Dependent,  Prev: AVR-Dependent,  Up: Machine Dependencies
+
+9.5 Blackfin Dependent Features
+===============================
+
+* Menu:
+
+* Blackfin Options::		Blackfin Options
+* Blackfin Syntax::		Blackfin Syntax
+* Blackfin Directives::		Blackfin Directives
+
+
+File: as.info,  Node: Blackfin Options,  Next: Blackfin Syntax,  Up: Blackfin-Dependent
+
+9.5.1 Options
+-------------
+
+`-mcpu=PROCESSOR[-SIREVISION]'
+     This option specifies the target processor.  The optional
+     SIREVISION is not used in assembler.  It's here such that GCC can
+     easily pass down its `-mcpu=' option.  The assembler will issue an
+     error message if an attempt is made to assemble an instruction
+     which will not execute on the target processor.  The following
+     processor names are recognized: `bf512', `bf514', `bf516', `bf518',
+     `bf522', `bf523', `bf524', `bf525', `bf526', `bf527', `bf531',
+     `bf532', `bf533', `bf534', `bf535' (not implemented yet), `bf536',
+     `bf537', `bf538', `bf539', `bf542', `bf542m', `bf544', `bf544m',
+     `bf547', `bf547m', `bf548', `bf548m', `bf549', `bf549m', and
+     `bf561'.
+
+
+
+File: as.info,  Node: Blackfin Syntax,  Next: Blackfin Directives,  Prev: Blackfin Options,  Up: Blackfin-Dependent
+
+9.5.2 Syntax
+------------
+
+`Special Characters'
+     Assembler input is free format and may appear anywhere on the line.
+     One instruction may extend across multiple lines or more than one
+     instruction may appear on the same line.  White space (space, tab,
+     comments or newline) may appear anywhere between tokens.  A token
+     must not have embedded spaces.  Tokens include numbers, register
+     names, keywords, user identifiers, and also some multicharacter
+     special symbols like "+=", "/*" or "||".
+
+`Instruction Delimiting'
+     A semicolon must terminate every instruction.  Sometimes a complete
+     instruction will consist of more than one operation.  There are two
+     cases where this occurs.  The first is when two general operations
+     are combined.  Normally a comma separates the different parts, as
+     in
+
+          a0= r3.h * r2.l, a1 = r3.l * r2.h ;
+
+     The second case occurs when a general instruction is combined with
+     one or two memory references for joint issue.  The latter portions
+     are set off by a "||" token.
+
+          a0 = r3.h * r2.l || r1 = [p3++] || r4 = [i2++];
+
+`Register Names'
+     The assembler treats register names and instruction keywords in a
+     case insensitive manner.  User identifiers are case sensitive.
+     Thus, R3.l, R3.L, r3.l and r3.L are all equivalent input to the
+     assembler.
+
+     Register names are reserved and may not be used as program
+     identifiers.
+
+     Some operations (such as "Move Register") require a register pair.
+     Register pairs are always data registers and are denoted using a
+     colon, eg., R3:2.  The larger number must be written firsts.  Note
+     that the hardware only supports odd-even pairs, eg., R7:6, R5:4,
+     R3:2, and R1:0.
+
+     Some instructions (such as -SP (Push Multiple)) require a group of
+     adjacent registers.  Adjacent registers are denoted in the syntax
+     by the range enclosed in parentheses and separated by a colon,
+     eg., (R7:3).  Again, the larger number appears first.
+
+     Portions of a particular register may be individually specified.
+     This is written with a dot (".") following the register name and
+     then a letter denoting the desired portion.  For 32-bit registers,
+     ".H" denotes the most significant ("High") portion.  ".L" denotes
+     the least-significant portion.  The subdivisions of the 40-bit
+     registers are described later.
+
+`Accumulators'
+     The set of 40-bit registers A1 and A0 that normally contain data
+     that is being manipulated.  Each accumulator can be accessed in
+     four ways.
+
+    `one 40-bit register'
+          The register will be referred to as A1 or A0.
+
+    `one 32-bit register'
+          The registers are designated as A1.W or A0.W.
+
+    `two 16-bit registers'
+          The registers are designated as A1.H, A1.L, A0.H or A0.L.
+
+    `one 8-bit register'
+          The registers are designated as A1.X or A0.X for the bits that
+          extend beyond bit 31.
+
+`Data Registers'
+     The set of 32-bit registers (R0, R1, R2, R3, R4, R5, R6 and R7)
+     that normally contain data for manipulation.  These are
+     abbreviated as D-register or Dreg.  Data registers can be accessed
+     as 32-bit registers or as two independent 16-bit registers.  The
+     least significant 16 bits of each register is called the "low"
+     half and is designated with ".L" following the register name.  The
+     most significant 16 bits are called the "high" half and is
+     designated with ".H" following the name.
+
+             R7.L, r2.h, r4.L, R0.H
+
+`Pointer Registers'
+     The set of 32-bit registers (P0, P1, P2, P3, P4, P5, SP and FP)
+     that normally contain byte addresses of data structures.  These are
+     abbreviated as P-register or Preg.
+
+          p2, p5, fp, sp
+
+`Stack Pointer SP'
+     The stack pointer contains the 32-bit address of the last occupied
+     byte location in the stack.  The stack grows by decrementing the
+     stack pointer.
+
+`Frame Pointer FP'
+     The frame pointer contains the 32-bit address of the previous frame
+     pointer in the stack.  It is located at the top of a frame.
+
+`Loop Top'
+     LT0 and LT1.  These registers contain the 32-bit address of the
+     top of a zero overhead loop.
+
+`Loop Count'
+     LC0 and LC1.  These registers contain the 32-bit counter of the
+     zero overhead loop executions.
+
+`Loop Bottom'
+     LB0 and LB1.  These registers contain the 32-bit address of the
+     bottom of a zero overhead loop.
+
+`Index Registers'
+     The set of 32-bit registers (I0, I1, I2, I3) that normally contain
+     byte addresses of data structures.  Abbreviated I-register or Ireg.
+
+`Modify Registers'
+     The set of 32-bit registers (M0, M1, M2, M3) that normally contain
+     offset values that are added and subracted to one of the index
+     registers.  Abbreviated as Mreg.
+
+`Length Registers'
+     The set of 32-bit registers (L0, L1, L2, L3) that normally contain
+     the length in bytes of the circular buffer.  Abbreviated as Lreg.
+     Clear the Lreg to disable circular addressing for the
+     corresponding Ireg.
+
+`Base Registers'
+     The set of 32-bit registers (B0, B1, B2, B3) that normally contain
+     the base address in bytes of the circular buffer.  Abbreviated as
+     Breg.
+
+`Floating Point'
+     The Blackfin family has no hardware floating point but the .float
+     directive generates ieee floating point numbers for use with
+     software floating point libraries.
+
+`Blackfin Opcodes'
+     For detailed information on the Blackfin machine instruction set,
+     see the Blackfin(r) Processor Instruction Set Reference.
+
+
+
+File: as.info,  Node: Blackfin Directives,  Prev: Blackfin Syntax,  Up: Blackfin-Dependent
+
+9.5.3 Directives
+----------------
+
+The following directives are provided for compatibility with the VDSP
+assembler.
+
+`.byte2'
+     Initializes a four byte data object.
+
+`.byte4'
+     Initializes a two byte data object.
+
+`.db'
+     TBD
+
+`.dd'
+     TBD
+
+`.dw'
+     TBD
+
+`.var'
+     Define and initialize a 32 bit data object.
+
+
+File: as.info,  Node: CR16-Dependent,  Next: CRIS-Dependent,  Prev: Blackfin-Dependent,  Up: Machine Dependencies
+
+9.6 CR16 Dependent Features
+===========================
+
+* Menu:
+
+* CR16 Operand Qualifiers::     CR16 Machine Operand Qualifiers
+
+
+File: as.info,  Node: CR16 Operand Qualifiers,  Up: CR16-Dependent
+
+9.6.1 CR16 Operand Qualifiers
+-----------------------------
+
+The National Semiconductor CR16 target of `as' has a few machine
+dependent operand qualifiers.
+
+   Operand expression type qualifier is an optional field in the
+instruction operand, to determines the type of the expression field of
+an operand. The `@' is required. CR16 architecture uses one of the
+following expression qualifiers:
+
+`s'
+     - `Specifies expression operand type as small'
+
+`m'
+     - `Specifies expression operand type as medium'
+
+`l'
+     - `Specifies expression operand type as large'
+
+`c'
+     - `Specifies the CR16 Assembler generates a relocation entry for
+     the operand, where pc has implied bit, the expression is adjusted
+     accordingly. The linker uses the relocation entry to update the
+     operand address at link time.'
+
+`got/GOT'
+     - `Specifies the CR16 Assembler generates a relocation entry for
+     the operand, offset from Global Offset Table. The linker uses this
+     relocation entry to update the operand address at link time'
+
+`cgot/cGOT'
+     - `Specifies the CompactRISC Assembler generates a relocation
+     entry for the operand, where pc has implied bit, the expression is
+     adjusted accordingly. The linker uses the relocation entry to
+     update the operand address at link time.'
+
+   CR16 target operand qualifiers and its size (in bits):
+
+`Immediate Operand'
+     - s --- 4 bits
+
+`'
+     - m --- 16 bits, for movb and movw instructions.
+
+`'
+     - m --- 20 bits, movd instructions.
+
+`'
+     - l --- 32 bits
+
+`Absolute Operand'
+     - s --- Illegal specifier for this operand.
+
+`'
+     - m --- 20 bits, movd instructions.
+
+`Displacement Operand'
+     - s --- 8 bits
+
+`'
+     - m --- 16 bits
+
+`'
+     - l --- 24 bits
+
+   For example:
+     1   `movw $_myfun@c,r1'
+
+         This loads the address of _myfun, shifted right by 1, into r1.
+
+     2   `movd $_myfun@c,(r2,r1)'
+
+         This loads the address of _myfun, shifted right by 1, into register-pair r2-r1.
+
+     3   `_myfun_ptr:'
+         `.long _myfun@c'
+         `loadd _myfun_ptr, (r1,r0)'
+         `jal (r1,r0)'
+
+         This .long directive, the address of _myfunc, shifted right by 1 at link time.
+
+     4   `loadd  _data1@GOT(r12), (r1,r0)'
+
+         This loads the address of _data1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r2-r1.
+
+     5   `loadd  _myfunc@cGOT(r12), (r1,r0)'
+
+         This loads the address of _myfun, shifted right by 1, into global offset table (ie GOT) and its offset value from GOT loads into register-pair r1-r0.
+
+
+File: as.info,  Node: CRIS-Dependent,  Next: D10V-Dependent,  Prev: CR16-Dependent,  Up: Machine Dependencies
+
+9.7 CRIS Dependent Features
+===========================
+
+* Menu:
+
+* CRIS-Opts::              Command-line Options
+* CRIS-Expand::            Instruction expansion
+* CRIS-Symbols::           Symbols
+* CRIS-Syntax::            Syntax
+
+
+File: as.info,  Node: CRIS-Opts,  Next: CRIS-Expand,  Up: CRIS-Dependent
+
+9.7.1 Command-line Options
+--------------------------
+
+The CRIS version of `as' has these machine-dependent command-line
+options.
+
+   The format of the generated object files can be either ELF or a.out,
+specified by the command-line options `--emulation=crisaout' and
+`--emulation=criself'.  The default is ELF (criself), unless `as' has
+been configured specifically for a.out by using the configuration name
+`cris-axis-aout'.
+
+   There are two different link-incompatible ELF object file variants
+for CRIS, for use in environments where symbols are expected to be
+prefixed by a leading `_' character and for environments without such a
+symbol prefix.  The variant used for GNU/Linux port has no symbol
+prefix.  Which variant to produce is specified by either of the options
+`--underscore' and `--no-underscore'.  The default is `--underscore'.
+Since symbols in CRIS a.out objects are expected to have a `_' prefix,
+specifying `--no-underscore' when generating a.out objects is an error.
+Besides the object format difference, the effect of this option is to
+parse register names differently (*note crisnous::).  The
+`--no-underscore' option makes a `$' register prefix mandatory.
+
+   The option `--pic' must be passed to `as' in order to recognize the
+symbol syntax used for ELF (SVR4 PIC) position-independent-code (*note
+crispic::).  This will also affect expansion of instructions.  The
+expansion with `--pic' will use PC-relative rather than (slightly
+faster) absolute addresses in those expansions.
+
+   The option `--march=ARCHITECTURE' specifies the recognized
+instruction set and recognized register names.  It also controls the
+architecture type of the object file.  Valid values for ARCHITECTURE
+are:
+`v0_v10'
+     All instructions and register names for any architecture variant
+     in the set v0...v10 are recognized.  This is the default if the
+     target is configured as cris-*.
+
+`v10'
+     Only instructions and register names for CRIS v10 (as found in
+     ETRAX 100 LX) are recognized.  This is the default if the target
+     is configured as crisv10-*.
+
+`v32'
+     Only instructions and register names for CRIS v32 (code name
+     Guinness) are recognized.  This is the default if the target is
+     configured as crisv32-*.  This value implies `--no-mul-bug-abort'.
+     (A subsequent `--mul-bug-abort' will turn it back on.)
+
+`common_v10_v32'
+     Only instructions with register names and addressing modes with
+     opcodes common to the v10 and v32 are recognized.
+
+   When `-N' is specified, `as' will emit a warning when a 16-bit
+branch instruction is expanded into a 32-bit multiple-instruction
+construct (*note CRIS-Expand::).
+
+   Some versions of the CRIS v10, for example in the Etrax 100 LX,
+contain a bug that causes destabilizing memory accesses when a multiply
+instruction is executed with certain values in the first operand just
+before a cache-miss.  When the `--mul-bug-abort' command line option is
+active (the default value), `as' will refuse to assemble a file
+containing a multiply instruction at a dangerous offset, one that could
+be the last on a cache-line, or is in a section with insufficient
+alignment.  This placement checking does not catch any case where the
+multiply instruction is dangerously placed because it is located in a
+delay-slot.  The `--mul-bug-abort' command line option turns off the
+checking.
+
+
+File: as.info,  Node: CRIS-Expand,  Next: CRIS-Symbols,  Prev: CRIS-Opts,  Up: CRIS-Dependent
+
+9.7.2 Instruction expansion
+---------------------------
+
+`as' will silently choose an instruction that fits the operand size for
+`[register+constant]' operands.  For example, the offset `127' in
+`move.d [r3+127],r4' fits in an instruction using a signed-byte offset.
+Similarly, `move.d [r2+32767],r1' will generate an instruction using a
+16-bit offset.  For symbolic expressions and constants that do not fit
+in 16 bits including the sign bit, a 32-bit offset is generated.
+
+   For branches, `as' will expand from a 16-bit branch instruction into
+a sequence of instructions that can reach a full 32-bit address.  Since
+this does not correspond to a single instruction, such expansions can
+optionally be warned about.  *Note CRIS-Opts::.
+
+   If the operand is found to fit the range, a `lapc' mnemonic will
+translate to a `lapcq' instruction.  Use `lapc.d' to force the 32-bit
+`lapc' instruction.
+
+   Similarly, the `addo' mnemonic will translate to the shortest
+fitting instruction of `addoq', `addo.w' and `addo.d', when used with a
+operand that is a constant known at assembly time.
+
+
+File: as.info,  Node: CRIS-Symbols,  Next: CRIS-Syntax,  Prev: CRIS-Expand,  Up: CRIS-Dependent
+
+9.7.3 Symbols
+-------------
+
+Some symbols are defined by the assembler.  They're intended to be used
+in conditional assembly, for example:
+      .if ..asm.arch.cris.v32
+      CODE FOR CRIS V32
+      .elseif ..asm.arch.cris.common_v10_v32
+      CODE COMMON TO CRIS V32 AND CRIS V10
+      .elseif ..asm.arch.cris.v10 | ..asm.arch.cris.any_v0_v10
+      CODE FOR V10
+      .else
+      .error "Code needs to be added here."
+      .endif
+
+   These symbols are defined in the assembler, reflecting command-line
+options, either when specified or the default.  They are always
+defined, to 0 or 1.
+`..asm.arch.cris.any_v0_v10'
+     This symbol is non-zero when `--march=v0_v10' is specified or the
+     default.
+
+`..asm.arch.cris.common_v10_v32'
+     Set according to the option `--march=common_v10_v32'.
+
+`..asm.arch.cris.v10'
+     Reflects the option `--march=v10'.
+
+`..asm.arch.cris.v32'
+     Corresponds to `--march=v10'.
+
+   Speaking of symbols, when a symbol is used in code, it can have a
+suffix modifying its value for use in position-independent code. *Note
+CRIS-Pic::.
+
+
+File: as.info,  Node: CRIS-Syntax,  Prev: CRIS-Symbols,  Up: CRIS-Dependent
+
+9.7.4 Syntax
+------------
+
+There are different aspects of the CRIS assembly syntax.
+
+* Menu:
+
+* CRIS-Chars::		        Special Characters
+* CRIS-Pic::			Position-Independent Code Symbols
+* CRIS-Regs::			Register Names
+* CRIS-Pseudos::		Assembler Directives
+
+
+File: as.info,  Node: CRIS-Chars,  Next: CRIS-Pic,  Up: CRIS-Syntax
+
+9.7.4.1 Special Characters
+..........................
+
+The character `#' is a line comment character.  It starts a comment if
+and only if it is placed at the beginning of a line.
+
+   A `;' character starts a comment anywhere on the line, causing all
+characters up to the end of the line to be ignored.
+
+   A `@' character is handled as a line separator equivalent to a
+logical new-line character (except in a comment), so separate
+instructions can be specified on a single line.
+
+
+File: as.info,  Node: CRIS-Pic,  Next: CRIS-Regs,  Prev: CRIS-Chars,  Up: CRIS-Syntax
+
+9.7.4.2 Symbols in position-independent code
+............................................
+
+When generating position-independent code (SVR4 PIC) for use in
+cris-axis-linux-gnu or crisv32-axis-linux-gnu shared libraries, symbol
+suffixes are used to specify what kind of run-time symbol lookup will
+be used, expressed in the object as different _relocation types_.
+Usually, all absolute symbol values must be located in a table, the
+_global offset table_, leaving the code position-independent;
+independent of values of global symbols and independent of the address
+of the code.  The suffix modifies the value of the symbol, into for
+example an index into the global offset table where the real symbol
+value is entered, or a PC-relative value, or a value relative to the
+start of the global offset table.  All symbol suffixes start with the
+character `:' (omitted in the list below).  Every symbol use in code or
+a read-only section must therefore have a PIC suffix to enable a useful
+shared library to be created.  Usually, these constructs must not be
+used with an additive constant offset as is usually allowed, i.e. no 4
+as in `symbol + 4' is allowed.  This restriction is checked at
+link-time, not at assembly-time.
+
+`GOT'
+     Attaching this suffix to a symbol in an instruction causes the
+     symbol to be entered into the global offset table.  The value is a
+     32-bit index for that symbol into the global offset table.  The
+     name of the corresponding relocation is `R_CRIS_32_GOT'.  Example:
+     `move.d [$r0+extsym:GOT],$r9'
+
+`GOT16'
+     Same as for `GOT', but the value is a 16-bit index into the global
+     offset table.  The corresponding relocation is `R_CRIS_16_GOT'.
+     Example: `move.d [$r0+asymbol:GOT16],$r10'
+
+`PLT'
+     This suffix is used for function symbols.  It causes a _procedure
+     linkage table_, an array of code stubs, to be created at the time
+     the shared object is created or linked against, together with a
+     global offset table entry.  The value is a pc-relative offset to
+     the corresponding stub code in the procedure linkage table.  This
+     arrangement causes the run-time symbol resolver to be called to
+     look up and set the value of the symbol the first time the
+     function is called (at latest; depending environment variables).
+     It is only safe to leave the symbol unresolved this way if all
+     references are function calls.  The name of the relocation is
+     `R_CRIS_32_PLT_PCREL'.  Example: `add.d fnname:PLT,$pc'
+
+`PLTG'
+     Like PLT, but the value is relative to the beginning of the global
+     offset table.  The relocation is `R_CRIS_32_PLT_GOTREL'.  Example:
+     `move.d fnname:PLTG,$r3'
+
+`GOTPLT'
+     Similar to `PLT', but the value of the symbol is a 32-bit index
+     into the global offset table.  This is somewhat of a mix between
+     the effect of the `GOT' and the `PLT' suffix; the difference to
+     `GOT' is that there will be a procedure linkage table entry
+     created, and that the symbol is assumed to be a function entry and
+     will be resolved by the run-time resolver as with `PLT'.  The
+     relocation is `R_CRIS_32_GOTPLT'.  Example: `jsr
+     [$r0+fnname:GOTPLT]'
+
+`GOTPLT16'
+     A variant of `GOTPLT' giving a 16-bit value.  Its relocation name
+     is `R_CRIS_16_GOTPLT'.  Example: `jsr [$r0+fnname:GOTPLT16]'
+
+`GOTOFF'
+     This suffix must only be attached to a local symbol, but may be
+     used in an expression adding an offset.  The value is the address
+     of the symbol relative to the start of the global offset table.
+     The relocation name is `R_CRIS_32_GOTREL'.  Example: `move.d
+     [$r0+localsym:GOTOFF],r3'
+
+
+File: as.info,  Node: CRIS-Regs,  Next: CRIS-Pseudos,  Prev: CRIS-Pic,  Up: CRIS-Syntax
+
+9.7.4.3 Register names
+......................
+
+A `$' character may always prefix a general or special register name in
+an instruction operand but is mandatory when the option
+`--no-underscore' is specified or when the `.syntax register_prefix'
+directive is in effect (*note crisnous::).  Register names are
+case-insensitive.
+
+
+File: as.info,  Node: CRIS-Pseudos,  Prev: CRIS-Regs,  Up: CRIS-Syntax
+
+9.7.4.4 Assembler Directives
+............................
+
+There are a few CRIS-specific pseudo-directives in addition to the
+generic ones.  *Note Pseudo Ops::.  Constants emitted by
+pseudo-directives are in little-endian order for CRIS.  There is no
+support for floating-point-specific directives for CRIS.
+
+`.dword EXPRESSIONS'
+     The `.dword' directive is a synonym for `.int', expecting zero or
+     more EXPRESSIONS, separated by commas.  For each expression, a
+     32-bit little-endian constant is emitted.
+
+`.syntax ARGUMENT'
+     The `.syntax' directive takes as ARGUMENT one of the following
+     case-sensitive choices.
+
+    `no_register_prefix'
+          The `.syntax no_register_prefix' directive makes a `$'
+          character prefix on all registers optional.  It overrides a
+          previous setting, including the corresponding effect of the
+          option `--no-underscore'.  If this directive is used when
+          ordinary symbols do not have a `_' character prefix, care
+          must be taken to avoid ambiguities whether an operand is a
+          register or a symbol; using symbols with names the same as
+          general or special registers then invoke undefined behavior.
+
+    `register_prefix'
+          This directive makes a `$' character prefix on all registers
+          mandatory.  It overrides a previous setting, including the
+          corresponding effect of the option `--underscore'.
+
+    `leading_underscore'
+          This is an assertion directive, emitting an error if the
+          `--no-underscore' option is in effect.
+
+    `no_leading_underscore'
+          This is the opposite of the `.syntax leading_underscore'
+          directive and emits an error if the option `--underscore' is
+          in effect.
+
+`.arch ARGUMENT'
+     This is an assertion directive, giving an error if the specified
+     ARGUMENT is not the same as the specified or default value for the
+     `--march=ARCHITECTURE' option (*note march-option::).
+
+
+
+File: as.info,  Node: D10V-Dependent,  Next: D30V-Dependent,  Prev: CRIS-Dependent,  Up: Machine Dependencies
+
+9.8 D10V Dependent Features
+===========================
+
+* Menu:
+
+* D10V-Opts::                   D10V Options
+* D10V-Syntax::                 Syntax
+* D10V-Float::                  Floating Point
+* D10V-Opcodes::                Opcodes
+
+
+File: as.info,  Node: D10V-Opts,  Next: D10V-Syntax,  Up: D10V-Dependent
+
+9.8.1 D10V Options
+------------------
+
+The Mitsubishi D10V version of `as' has a few machine dependent options.
+
+`-O'
+     The D10V can often execute two sub-instructions in parallel. When
+     this option is used, `as' will attempt to optimize its output by
+     detecting when instructions can be executed in parallel.
+
+`--nowarnswap'
+     To optimize execution performance, `as' will sometimes swap the
+     order of instructions. Normally this generates a warning. When
+     this option is used, no warning will be generated when
+     instructions are swapped.
+
+`--gstabs-packing'
+
+`--no-gstabs-packing'
+     `as' packs adjacent short instructions into a single packed
+     instruction. `--no-gstabs-packing' turns instruction packing off if
+     `--gstabs' is specified as well; `--gstabs-packing' (the default)
+     turns instruction packing on even when `--gstabs' is specified.
+
+
+File: as.info,  Node: D10V-Syntax,  Next: D10V-Float,  Prev: D10V-Opts,  Up: D10V-Dependent
+
+9.8.2 Syntax
+------------
+
+The D10V syntax is based on the syntax in Mitsubishi's D10V
+architecture manual.  The differences are detailed below.
+
+* Menu:
+
+* D10V-Size::                 Size Modifiers
+* D10V-Subs::                 Sub-Instructions
+* D10V-Chars::                Special Characters
+* D10V-Regs::                 Register Names
+* D10V-Addressing::           Addressing Modes
+* D10V-Word::                 @WORD Modifier
+
+
+File: as.info,  Node: D10V-Size,  Next: D10V-Subs,  Up: D10V-Syntax
+
+9.8.2.1 Size Modifiers
+......................
+
+The D10V version of `as' uses the instruction names in the D10V
+Architecture Manual.  However, the names in the manual are sometimes
+ambiguous.  There are instruction names that can assemble to a short or
+long form opcode.  How does the assembler pick the correct form?  `as'
+will always pick the smallest form if it can.  When dealing with a
+symbol that is not defined yet when a line is being assembled, it will
+always use the long form.  If you need to force the assembler to use
+either the short or long form of the instruction, you can append either
+`.s' (short) or `.l' (long) to it.  For example, if you are writing an
+assembly program and you want to do a branch to a symbol that is
+defined later in your program, you can write `bra.s   foo'.  Objdump
+and GDB will always append `.s' or `.l' to instructions which have both
+short and long forms.
+
+
+File: as.info,  Node: D10V-Subs,  Next: D10V-Chars,  Prev: D10V-Size,  Up: D10V-Syntax
+
+9.8.2.2 Sub-Instructions
+........................
+
+The D10V assembler takes as input a series of instructions, either
+one-per-line, or in the special two-per-line format described in the
+next section.  Some of these instructions will be short-form or
+sub-instructions.  These sub-instructions can be packed into a single
+instruction.  The assembler will do this automatically.  It will also
+detect when it should not pack instructions.  For example, when a label
+is defined, the next instruction will never be packaged with the
+previous one.  Whenever a branch and link instruction is called, it
+will not be packaged with the next instruction so the return address
+will be valid.  Nops are automatically inserted when necessary.
+
+   If you do not want the assembler automatically making these
+decisions, you can control the packaging and execution type (parallel
+or sequential) with the special execution symbols described in the next
+section.
+
+
+File: as.info,  Node: D10V-Chars,  Next: D10V-Regs,  Prev: D10V-Subs,  Up: D10V-Syntax
+
+9.8.2.3 Special Characters
+..........................
+
+`;' and `#' are the line comment characters.  Sub-instructions may be
+executed in order, in reverse-order, or in parallel.  Instructions
+listed in the standard one-per-line format will be executed
+sequentially.  To specify the executing order, use the following
+symbols:
+`->'
+     Sequential with instruction on the left first.
+
+`<-'
+     Sequential with instruction on the right first.
+
+`||'
+     Parallel
+   The D10V syntax allows either one instruction per line, one
+instruction per line with the execution symbol, or two instructions per
+line.  For example
+`abs       a1      ->      abs     r0'
+     Execute these sequentially.  The instruction on the right is in
+     the right container and is executed second.
+
+`abs       r0      <-      abs     a1'
+     Execute these reverse-sequentially.  The instruction on the right
+     is in the right container, and is executed first.
+
+`ld2w    r2,@r8+         ||      mac     a0,r0,r7'
+     Execute these in parallel.
+
+`ld2w    r2,@r8+         ||'
+`mac     a0,r0,r7'
+     Two-line format. Execute these in parallel.
+
+`ld2w    r2,@r8+'
+`mac     a0,r0,r7'
+     Two-line format. Execute these sequentially.  Assembler will put
+     them in the proper containers.
+
+`ld2w    r2,@r8+         ->'
+`mac     a0,r0,r7'
+     Two-line format. Execute these sequentially.  Same as above but
+     second instruction will always go into right container.
+   Since `$' has no special meaning, you may use it in symbol names.
+
+
+File: as.info,  Node: D10V-Regs,  Next: D10V-Addressing,  Prev: D10V-Chars,  Up: D10V-Syntax
+
+9.8.2.4 Register Names
+......................
+
+You can use the predefined symbols `r0' through `r15' to refer to the
+D10V registers.  You can also use `sp' as an alias for `r15'.  The
+accumulators are `a0' and `a1'.  There are special register-pair names
+that may optionally be used in opcodes that require even-numbered
+registers. Register names are not case sensitive.
+
+   Register Pairs
+`r0-r1'
+
+`r2-r3'
+
+`r4-r5'
+
+`r6-r7'
+
+`r8-r9'
+
+`r10-r11'
+
+`r12-r13'
+
+`r14-r15'
+
+   The D10V also has predefined symbols for these control registers and
+status bits:
+`psw'
+     Processor Status Word
+
+`bpsw'
+     Backup Processor Status Word
+
+`pc'
+     Program Counter
+
+`bpc'
+     Backup Program Counter
+
+`rpt_c'
+     Repeat Count
+
+`rpt_s'
+     Repeat Start address
+
+`rpt_e'
+     Repeat End address
+
+`mod_s'
+     Modulo Start address
+
+`mod_e'
+     Modulo End address
+
+`iba'
+     Instruction Break Address
+
+`f0'
+     Flag 0
+
+`f1'
+     Flag 1
+
+`c'
+     Carry flag
+
+
+File: as.info,  Node: D10V-Addressing,  Next: D10V-Word,  Prev: D10V-Regs,  Up: D10V-Syntax
+
+9.8.2.5 Addressing Modes
+........................
+
+`as' understands the following addressing modes for the D10V.  `RN' in
+the following refers to any of the numbered registers, but _not_ the
+control registers.
+`RN'
+     Register direct
+
+`@RN'
+     Register indirect
+
+`@RN+'
+     Register indirect with post-increment
+
+`@RN-'
+     Register indirect with post-decrement
+
+`@-SP'
+     Register indirect with pre-decrement
+
+`@(DISP, RN)'
+     Register indirect with displacement
+
+`ADDR'
+     PC relative address (for branch or rep).
+
+`#IMM'
+     Immediate data (the `#' is optional and ignored)
+
+
+File: as.info,  Node: D10V-Word,  Prev: D10V-Addressing,  Up: D10V-Syntax
+
+9.8.2.6 @WORD Modifier
+......................
+
+Any symbol followed by `@word' will be replaced by the symbol's value
+shifted right by 2.  This is used in situations such as loading a
+register with the address of a function (or any other code fragment).
+For example, if you want to load a register with the location of the
+function `main' then jump to that function, you could do it as follows:
+     ldi     r2, main@word
+     jmp     r2
+
+
+File: as.info,  Node: D10V-Float,  Next: D10V-Opcodes,  Prev: D10V-Syntax,  Up: D10V-Dependent
+
+9.8.3 Floating Point
+--------------------
+
+The D10V has no hardware floating point, but the `.float' and `.double'
+directives generates IEEE floating-point numbers for compatibility with
+other development tools.
+
+
+File: as.info,  Node: D10V-Opcodes,  Prev: D10V-Float,  Up: D10V-Dependent
+
+9.8.4 Opcodes
+-------------
+
+For detailed information on the D10V machine instruction set, see `D10V
+Architecture: A VLIW Microprocessor for Multimedia Applications'
+(Mitsubishi Electric Corp.).  `as' implements all the standard D10V
+opcodes.  The only changes are those described in the section on size
+modifiers
+
+
+File: as.info,  Node: D30V-Dependent,  Next: H8/300-Dependent,  Prev: D10V-Dependent,  Up: Machine Dependencies
+
+9.9 D30V Dependent Features
+===========================
+
+* Menu:
+
+* D30V-Opts::                   D30V Options
+* D30V-Syntax::                 Syntax
+* D30V-Float::                  Floating Point
+* D30V-Opcodes::                Opcodes
+
+
+File: as.info,  Node: D30V-Opts,  Next: D30V-Syntax,  Up: D30V-Dependent
+
+9.9.1 D30V Options
+------------------
+
+The Mitsubishi D30V version of `as' has a few machine dependent options.
+
+`-O'
+     The D30V can often execute two sub-instructions in parallel. When
+     this option is used, `as' will attempt to optimize its output by
+     detecting when instructions can be executed in parallel.
+
+`-n'
+     When this option is used, `as' will issue a warning every time it
+     adds a nop instruction.
+
+`-N'
+     When this option is used, `as' will issue a warning if it needs to
+     insert a nop after a 32-bit multiply before a load or 16-bit
+     multiply instruction.
+
+
+File: as.info,  Node: D30V-Syntax,  Next: D30V-Float,  Prev: D30V-Opts,  Up: D30V-Dependent
+
+9.9.2 Syntax
+------------
+
+The D30V syntax is based on the syntax in Mitsubishi's D30V
+architecture manual.  The differences are detailed below.
+
+* Menu:
+
+* D30V-Size::                 Size Modifiers
+* D30V-Subs::                 Sub-Instructions
+* D30V-Chars::                Special Characters
+* D30V-Guarded::              Guarded Execution
+* D30V-Regs::                 Register Names
+* D30V-Addressing::           Addressing Modes
+
+
+File: as.info,  Node: D30V-Size,  Next: D30V-Subs,  Up: D30V-Syntax
+
+9.9.2.1 Size Modifiers
+......................
+
+The D30V version of `as' uses the instruction names in the D30V
+Architecture Manual.  However, the names in the manual are sometimes
+ambiguous.  There are instruction names that can assemble to a short or
+long form opcode.  How does the assembler pick the correct form?  `as'
+will always pick the smallest form if it can.  When dealing with a
+symbol that is not defined yet when a line is being assembled, it will
+always use the long form.  If you need to force the assembler to use
+either the short or long form of the instruction, you can append either
+`.s' (short) or `.l' (long) to it.  For example, if you are writing an
+assembly program and you want to do a branch to a symbol that is
+defined later in your program, you can write `bra.s foo'.  Objdump and
+GDB will always append `.s' or `.l' to instructions which have both
+short and long forms.
+
+
+File: as.info,  Node: D30V-Subs,  Next: D30V-Chars,  Prev: D30V-Size,  Up: D30V-Syntax
+
+9.9.2.2 Sub-Instructions
+........................
+
+The D30V assembler takes as input a series of instructions, either
+one-per-line, or in the special two-per-line format described in the
+next section.  Some of these instructions will be short-form or
+sub-instructions.  These sub-instructions can be packed into a single
+instruction.  The assembler will do this automatically.  It will also
+detect when it should not pack instructions.  For example, when a label
+is defined, the next instruction will never be packaged with the
+previous one.  Whenever a branch and link instruction is called, it
+will not be packaged with the next instruction so the return address
+will be valid.  Nops are automatically inserted when necessary.
+
+   If you do not want the assembler automatically making these
+decisions, you can control the packaging and execution type (parallel
+or sequential) with the special execution symbols described in the next
+section.
+
+
+File: as.info,  Node: D30V-Chars,  Next: D30V-Guarded,  Prev: D30V-Subs,  Up: D30V-Syntax
+
+9.9.2.3 Special Characters
+..........................
+
+`;' and `#' are the line comment characters.  Sub-instructions may be
+executed in order, in reverse-order, or in parallel.  Instructions
+listed in the standard one-per-line format will be executed
+sequentially unless you use the `-O' option.
+
+   To specify the executing order, use the following symbols:
+`->'
+     Sequential with instruction on the left first.
+
+`<-'
+     Sequential with instruction on the right first.
+
+`||'
+     Parallel
+
+   The D30V syntax allows either one instruction per line, one
+instruction per line with the execution symbol, or two instructions per
+line.  For example
+`abs r2,r3 -> abs r4,r5'
+     Execute these sequentially.  The instruction on the right is in
+     the right container and is executed second.
+
+`abs r2,r3 <- abs r4,r5'
+     Execute these reverse-sequentially.  The instruction on the right
+     is in the right container, and is executed first.
+
+`abs r2,r3 || abs r4,r5'
+     Execute these in parallel.
+
+`ldw r2,@(r3,r4) ||'
+`mulx r6,r8,r9'
+     Two-line format. Execute these in parallel.
+
+`mulx a0,r8,r9'
+`stw r2,@(r3,r4)'
+     Two-line format. Execute these sequentially unless `-O' option is
+     used.  If the `-O' option is used, the assembler will determine if
+     the instructions could be done in parallel (the above two
+     instructions can be done in parallel), and if so, emit them as
+     parallel instructions.  The assembler will put them in the proper
+     containers.  In the above example, the assembler will put the
+     `stw' instruction in left container and the `mulx' instruction in
+     the right container.
+
+`stw r2,@(r3,r4) ->'
+`mulx a0,r8,r9'
+     Two-line format.  Execute the `stw' instruction followed by the
+     `mulx' instruction sequentially.  The first instruction goes in the
+     left container and the second instruction goes into right
+     container.  The assembler will give an error if the machine
+     ordering constraints are violated.
+
+`stw r2,@(r3,r4) <-'
+`mulx a0,r8,r9'
+     Same as previous example, except that the `mulx' instruction is
+     executed before the `stw' instruction.
+
+   Since `$' has no special meaning, you may use it in symbol names.
+
+
+File: as.info,  Node: D30V-Guarded,  Next: D30V-Regs,  Prev: D30V-Chars,  Up: D30V-Syntax
+
+9.9.2.4 Guarded Execution
+.........................
+
+`as' supports the full range of guarded execution directives for each
+instruction.  Just append the directive after the instruction proper.
+The directives are:
+
+`/tx'
+     Execute the instruction if flag f0 is true.
+
+`/fx'
+     Execute the instruction if flag f0 is false.
+
+`/xt'
+     Execute the instruction if flag f1 is true.
+
+`/xf'
+     Execute the instruction if flag f1 is false.
+
+`/tt'
+     Execute the instruction if both flags f0 and f1 are true.
+
+`/tf'
+     Execute the instruction if flag f0 is true and flag f1 is false.
+
+
+File: as.info,  Node: D30V-Regs,  Next: D30V-Addressing,  Prev: D30V-Guarded,  Up: D30V-Syntax
+
+9.9.2.5 Register Names
+......................
+
+You can use the predefined symbols `r0' through `r63' to refer to the
+D30V registers.  You can also use `sp' as an alias for `r63' and `link'
+as an alias for `r62'.  The accumulators are `a0' and `a1'.
+
+   The D30V also has predefined symbols for these control registers and
+status bits:
+`psw'
+     Processor Status Word
+
+`bpsw'
+     Backup Processor Status Word
+
+`pc'
+     Program Counter
+
+`bpc'
+     Backup Program Counter
+
+`rpt_c'
+     Repeat Count
+
+`rpt_s'
+     Repeat Start address
+
+`rpt_e'
+     Repeat End address
+
+`mod_s'
+     Modulo Start address
+
+`mod_e'
+     Modulo End address
+
+`iba'
+     Instruction Break Address
+
+`f0'
+     Flag 0
+
+`f1'
+     Flag 1
+
+`f2'
+     Flag 2
+
+`f3'
+     Flag 3
+
+`f4'
+     Flag 4
+
+`f5'
+     Flag 5
+
+`f6'
+     Flag 6
+
+`f7'
+     Flag 7
+
+`s'
+     Same as flag 4 (saturation flag)
+
+`v'
+     Same as flag 5 (overflow flag)
+
+`va'
+     Same as flag 6 (sticky overflow flag)
+
+`c'
+     Same as flag 7 (carry/borrow flag)
+
+`b'
+     Same as flag 7 (carry/borrow flag)
+
+
+File: as.info,  Node: D30V-Addressing,  Prev: D30V-Regs,  Up: D30V-Syntax
+
+9.9.2.6 Addressing Modes
+........................
+
+`as' understands the following addressing modes for the D30V.  `RN' in
+the following refers to any of the numbered registers, but _not_ the
+control registers.
+`RN'
+     Register direct
+
+`@RN'
+     Register indirect
+
+`@RN+'
+     Register indirect with post-increment
+
+`@RN-'
+     Register indirect with post-decrement
+
+`@-SP'
+     Register indirect with pre-decrement
+
+`@(DISP, RN)'
+     Register indirect with displacement
+
+`ADDR'
+     PC relative address (for branch or rep).
+
+`#IMM'
+     Immediate data (the `#' is optional and ignored)
+
+
+File: as.info,  Node: D30V-Float,  Next: D30V-Opcodes,  Prev: D30V-Syntax,  Up: D30V-Dependent
+
+9.9.3 Floating Point
+--------------------
+
+The D30V has no hardware floating point, but the `.float' and `.double'
+directives generates IEEE floating-point numbers for compatibility with
+other development tools.
+
+
+File: as.info,  Node: D30V-Opcodes,  Prev: D30V-Float,  Up: D30V-Dependent
+
+9.9.4 Opcodes
+-------------
+
+For detailed information on the D30V machine instruction set, see `D30V
+Architecture: A VLIW Microprocessor for Multimedia Applications'
+(Mitsubishi Electric Corp.).  `as' implements all the standard D30V
+opcodes.  The only changes are those described in the section on size
+modifiers
+
+
+File: as.info,  Node: H8/300-Dependent,  Next: HPPA-Dependent,  Prev: D30V-Dependent,  Up: Machine Dependencies
+
+9.10 H8/300 Dependent Features
+==============================
+
+* Menu:
+
+* H8/300 Options::              Options
+* H8/300 Syntax::               Syntax
+* H8/300 Floating Point::       Floating Point
+* H8/300 Directives::           H8/300 Machine Directives
+* H8/300 Opcodes::              Opcodes
+
+
+File: as.info,  Node: H8/300 Options,  Next: H8/300 Syntax,  Up: H8/300-Dependent
+
+9.10.1 Options
+--------------
+
+The Renesas H8/300 version of `as' has one machine-dependent option:
+
+`-h-tick-hex'
+     Support H'00 style hex constants in addition to 0x00 style.
+
+
+
+File: as.info,  Node: H8/300 Syntax,  Next: H8/300 Floating Point,  Prev: H8/300 Options,  Up: H8/300-Dependent
+
+9.10.2 Syntax
+-------------
+
+* Menu:
+
+* H8/300-Chars::                Special Characters
+* H8/300-Regs::                 Register Names
+* H8/300-Addressing::           Addressing Modes
+
+
+File: as.info,  Node: H8/300-Chars,  Next: H8/300-Regs,  Up: H8/300 Syntax
+
+9.10.2.1 Special Characters
+...........................
+
+`;' is the line comment character.
+
+   `$' can be used instead of a newline to separate statements.
+Therefore _you may not use `$' in symbol names_ on the H8/300.
+
+
+File: as.info,  Node: H8/300-Regs,  Next: H8/300-Addressing,  Prev: H8/300-Chars,  Up: H8/300 Syntax
+
+9.10.2.2 Register Names
+.......................
+
+You can use predefined symbols of the form `rNh' and `rNl' to refer to
+the H8/300 registers as sixteen 8-bit general-purpose registers.  N is
+a digit from `0' to `7'); for instance, both `r0h' and `r7l' are valid
+register names.
+
+   You can also use the eight predefined symbols `rN' to refer to the
+H8/300 registers as 16-bit registers (you must use this form for
+addressing).
+
+   On the H8/300H, you can also use the eight predefined symbols `erN'
+(`er0' ... `er7') to refer to the 32-bit general purpose registers.
+
+   The two control registers are called `pc' (program counter; a 16-bit
+register, except on the H8/300H where it is 24 bits) and `ccr'
+(condition code register; an 8-bit register).  `r7' is used as the
+stack pointer, and can also be called `sp'.
+
+
+File: as.info,  Node: H8/300-Addressing,  Prev: H8/300-Regs,  Up: H8/300 Syntax
+
+9.10.2.3 Addressing Modes
+.........................
+
+as understands the following addressing modes for the H8/300:
+`rN'
+     Register direct
+
+`@rN'
+     Register indirect
+
+`@(D, rN)'
+`@(D:16, rN)'
+`@(D:24, rN)'
+     Register indirect: 16-bit or 24-bit displacement D from register
+     N.  (24-bit displacements are only meaningful on the H8/300H.)
+
+`@rN+'
+     Register indirect with post-increment
+
+`@-rN'
+     Register indirect with pre-decrement
+
+``@'AA'
+``@'AA:8'
+``@'AA:16'
+``@'AA:24'
+     Absolute address `aa'.  (The address size `:24' only makes sense
+     on the H8/300H.)
+
+`#XX'
+`#XX:8'
+`#XX:16'
+`#XX:32'
+     Immediate data XX.  You may specify the `:8', `:16', or `:32' for
+     clarity, if you wish; but `as' neither requires this nor uses
+     it--the data size required is taken from context.
+
+``@'`@'AA'
+``@'`@'AA:8'
+     Memory indirect.  You may specify the `:8' for clarity, if you
+     wish; but `as' neither requires this nor uses it.
+
+
+File: as.info,  Node: H8/300 Floating Point,  Next: H8/300 Directives,  Prev: H8/300 Syntax,  Up: H8/300-Dependent
+
+9.10.3 Floating Point
+---------------------
+
+The H8/300 family has no hardware floating point, but the `.float'
+directive generates IEEE floating-point numbers for compatibility with
+other development tools.
+
+
+File: as.info,  Node: H8/300 Directives,  Next: H8/300 Opcodes,  Prev: H8/300 Floating Point,  Up: H8/300-Dependent
+
+9.10.4 H8/300 Machine Directives
+--------------------------------
+
+`as' has the following machine-dependent directives for the H8/300:
+
+`.h8300h'
+     Recognize and emit additional instructions for the H8/300H
+     variant, and also make `.int' emit 32-bit numbers rather than the
+     usual (16-bit) for the H8/300 family.
+
+`.h8300s'
+     Recognize and emit additional instructions for the H8S variant, and
+     also make `.int' emit 32-bit numbers rather than the usual (16-bit)
+     for the H8/300 family.
+
+`.h8300hn'
+     Recognize and emit additional instructions for the H8/300H variant
+     in normal mode, and also make `.int' emit 32-bit numbers rather
+     than the usual (16-bit) for the H8/300 family.
+
+`.h8300sn'
+     Recognize and emit additional instructions for the H8S variant in
+     normal mode, and also make `.int' emit 32-bit numbers rather than
+     the usual (16-bit) for the H8/300 family.
+
+   On the H8/300 family (including the H8/300H) `.word' directives
+generate 16-bit numbers.
+
+
+File: as.info,  Node: H8/300 Opcodes,  Prev: H8/300 Directives,  Up: H8/300-Dependent
+
+9.10.5 Opcodes
+--------------
+
+For detailed information on the H8/300 machine instruction set, see
+`H8/300 Series Programming Manual'.  For information specific to the
+H8/300H, see `H8/300H Series Programming Manual' (Renesas).
+
+   `as' implements all the standard H8/300 opcodes.  No additional
+pseudo-instructions are needed on this family.
+
+   The following table summarizes the H8/300 opcodes, and their
+arguments.  Entries marked `*' are opcodes used only on the H8/300H.
+
+              Legend:
+                 Rs   source register
+                 Rd   destination register
+                 abs  absolute address
+                 imm  immediate data
+              disp:N  N-bit displacement from a register
+             pcrel:N  N-bit displacement relative to program counter
+
+        add.b #imm,rd              *  andc #imm,ccr
+        add.b rs,rd                   band #imm,rd
+        add.w rs,rd                   band #imm,@rd
+     *  add.w #imm,rd                 band #imm,@abs:8
+     *  add.l rs,rd                   bra  pcrel:8
+     *  add.l #imm,rd              *  bra  pcrel:16
+        adds #imm,rd                  bt   pcrel:8
+        addx #imm,rd               *  bt   pcrel:16
+        addx rs,rd                    brn  pcrel:8
+        and.b #imm,rd              *  brn  pcrel:16
+        and.b rs,rd                   bf   pcrel:8
+     *  and.w rs,rd                *  bf   pcrel:16
+     *  and.w #imm,rd                 bhi  pcrel:8
+     *  and.l #imm,rd              *  bhi  pcrel:16
+     *  and.l rs,rd                   bls  pcrel:8
+
+     *  bls  pcrel:16                 bld  #imm,rd
+        bcc  pcrel:8                  bld  #imm,@rd
+     *  bcc  pcrel:16                 bld  #imm,@abs:8
+        bhs  pcrel:8                  bnot #imm,rd
+     *  bhs  pcrel:16                 bnot #imm,@rd
+        bcs  pcrel:8                  bnot #imm,@abs:8
+     *  bcs  pcrel:16                 bnot rs,rd
+        blo  pcrel:8                  bnot rs,@rd
+     *  blo  pcrel:16                 bnot rs,@abs:8
+        bne  pcrel:8                  bor  #imm,rd
+     *  bne  pcrel:16                 bor  #imm,@rd
+        beq  pcrel:8                  bor  #imm,@abs:8
+     *  beq  pcrel:16                 bset #imm,rd
+        bvc  pcrel:8                  bset #imm,@rd
+     *  bvc  pcrel:16                 bset #imm,@abs:8
+        bvs  pcrel:8                  bset rs,rd
+     *  bvs  pcrel:16                 bset rs,@rd
+        bpl  pcrel:8                  bset rs,@abs:8
+     *  bpl  pcrel:16                 bsr  pcrel:8
+        bmi  pcrel:8                  bsr  pcrel:16
+     *  bmi  pcrel:16                 bst  #imm,rd
+        bge  pcrel:8                  bst  #imm,@rd
+     *  bge  pcrel:16                 bst  #imm,@abs:8
+        blt  pcrel:8                  btst #imm,rd
+     *  blt  pcrel:16                 btst #imm,@rd
+        bgt  pcrel:8                  btst #imm,@abs:8
+     *  bgt  pcrel:16                 btst rs,rd
+        ble  pcrel:8                  btst rs,@rd
+     *  ble  pcrel:16                 btst rs,@abs:8
+        bclr #imm,rd                  bxor #imm,rd
+        bclr #imm,@rd                 bxor #imm,@rd
+        bclr #imm,@abs:8              bxor #imm,@abs:8
+        bclr rs,rd                    cmp.b #imm,rd
+        bclr rs,@rd                   cmp.b rs,rd
+        bclr rs,@abs:8                cmp.w rs,rd
+        biand #imm,rd                 cmp.w rs,rd
+        biand #imm,@rd             *  cmp.w #imm,rd
+        biand #imm,@abs:8          *  cmp.l #imm,rd
+        bild #imm,rd               *  cmp.l rs,rd
+        bild #imm,@rd                 daa  rs
+        bild #imm,@abs:8              das  rs
+        bior #imm,rd                  dec.b rs
+        bior #imm,@rd              *  dec.w #imm,rd
+        bior #imm,@abs:8           *  dec.l #imm,rd
+        bist #imm,rd                  divxu.b rs,rd
+        bist #imm,@rd              *  divxu.w rs,rd
+        bist #imm,@abs:8           *  divxs.b rs,rd
+        bixor #imm,rd              *  divxs.w rs,rd
+        bixor #imm,@rd                eepmov
+        bixor #imm,@abs:8          *  eepmovw
+
+     *  exts.w rd                     mov.w rs,@abs:16
+     *  exts.l rd                  *  mov.l #imm,rd
+     *  extu.w rd                  *  mov.l rs,rd
+     *  extu.l rd                  *  mov.l @rs,rd
+        inc  rs                    *  mov.l @(disp:16,rs),rd
+     *  inc.w #imm,rd              *  mov.l @(disp:24,rs),rd
+     *  inc.l #imm,rd              *  mov.l @rs+,rd
+        jmp  @rs                   *  mov.l @abs:16,rd
+        jmp  abs                   *  mov.l @abs:24,rd
+        jmp  @@abs:8               *  mov.l rs,@rd
+        jsr  @rs                   *  mov.l rs,@(disp:16,rd)
+        jsr  abs                   *  mov.l rs,@(disp:24,rd)
+        jsr  @@abs:8               *  mov.l rs,@-rd
+        ldc  #imm,ccr              *  mov.l rs,@abs:16
+        ldc  rs,ccr                *  mov.l rs,@abs:24
+     *  ldc  @abs:16,ccr              movfpe @abs:16,rd
+     *  ldc  @abs:24,ccr              movtpe rs,@abs:16
+     *  ldc  @(disp:16,rs),ccr        mulxu.b rs,rd
+     *  ldc  @(disp:24,rs),ccr     *  mulxu.w rs,rd
+     *  ldc  @rs+,ccr              *  mulxs.b rs,rd
+     *  ldc  @rs,ccr               *  mulxs.w rs,rd
+     *  mov.b @(disp:24,rs),rd        neg.b rs
+     *  mov.b rs,@(disp:24,rd)     *  neg.w rs
+        mov.b @abs:16,rd           *  neg.l rs
+        mov.b rs,rd                   nop
+        mov.b @abs:8,rd               not.b rs
+        mov.b rs,@abs:8            *  not.w rs
+        mov.b rs,rd                *  not.l rs
+        mov.b #imm,rd                 or.b #imm,rd
+        mov.b @rs,rd                  or.b rs,rd
+        mov.b @(disp:16,rs),rd     *  or.w #imm,rd
+        mov.b @rs+,rd              *  or.w rs,rd
+        mov.b @abs:8,rd            *  or.l #imm,rd
+        mov.b rs,@rd               *  or.l rs,rd
+        mov.b rs,@(disp:16,rd)        orc  #imm,ccr
+        mov.b rs,@-rd                 pop.w rs
+        mov.b rs,@abs:8            *  pop.l rs
+        mov.w rs,@rd                  push.w rs
+     *  mov.w @(disp:24,rs),rd     *  push.l rs
+     *  mov.w rs,@(disp:24,rd)        rotl.b rs
+     *  mov.w @abs:24,rd           *  rotl.w rs
+     *  mov.w rs,@abs:24           *  rotl.l rs
+        mov.w rs,rd                   rotr.b rs
+        mov.w #imm,rd              *  rotr.w rs
+        mov.w @rs,rd               *  rotr.l rs
+        mov.w @(disp:16,rs),rd        rotxl.b rs
+        mov.w @rs+,rd              *  rotxl.w rs
+        mov.w @abs:16,rd           *  rotxl.l rs
+        mov.w rs,@(disp:16,rd)        rotxr.b rs
+        mov.w rs,@-rd              *  rotxr.w rs
+
+     *  rotxr.l rs                 *  stc  ccr,@(disp:24,rd)
+        bpt                        *  stc  ccr,@-rd
+        rte                        *  stc  ccr,@abs:16
+        rts                        *  stc  ccr,@abs:24
+        shal.b rs                     sub.b rs,rd
+     *  shal.w rs                     sub.w rs,rd
+     *  shal.l rs                  *  sub.w #imm,rd
+        shar.b rs                  *  sub.l rs,rd
+     *  shar.w rs                  *  sub.l #imm,rd
+     *  shar.l rs                     subs #imm,rd
+        shll.b rs                     subx #imm,rd
+     *  shll.w rs                     subx rs,rd
+     *  shll.l rs                  *  trapa #imm
+        shlr.b rs                     xor  #imm,rd
+     *  shlr.w rs                     xor  rs,rd
+     *  shlr.l rs                  *  xor.w #imm,rd
+        sleep                      *  xor.w rs,rd
+        stc  ccr,rd                *  xor.l #imm,rd
+     *  stc  ccr,@rs               *  xor.l rs,rd
+     *  stc  ccr,@(disp:16,rd)        xorc #imm,ccr
+
+   Four H8/300 instructions (`add', `cmp', `mov', `sub') are defined
+with variants using the suffixes `.b', `.w', and `.l' to specify the
+size of a memory operand.  `as' supports these suffixes, but does not
+require them; since one of the operands is always a register, `as' can
+deduce the correct size.
+
+   For example, since `r0' refers to a 16-bit register,
+     mov    r0,@foo
+is equivalent to
+     mov.w  r0,@foo
+
+   If you use the size suffixes, `as' issues a warning when the suffix
+and the register size do not match.
+
+
+File: as.info,  Node: HPPA-Dependent,  Next: ESA/390-Dependent,  Prev: H8/300-Dependent,  Up: Machine Dependencies
+
+9.11 HPPA Dependent Features
+============================
+
+* Menu:
+
+* HPPA Notes::                Notes
+* HPPA Options::              Options
+* HPPA Syntax::               Syntax
+* HPPA Floating Point::       Floating Point
+* HPPA Directives::           HPPA Machine Directives
+* HPPA Opcodes::              Opcodes
+
+
+File: as.info,  Node: HPPA Notes,  Next: HPPA Options,  Up: HPPA-Dependent
+
+9.11.1 Notes
+------------
+
+As a back end for GNU CC `as' has been throughly tested and should work
+extremely well.  We have tested it only minimally on hand written
+assembly code and no one has tested it much on the assembly output from
+the HP compilers.
+
+   The format of the debugging sections has changed since the original
+`as' port (version 1.3X) was released; therefore, you must rebuild all
+HPPA objects and libraries with the new assembler so that you can debug
+the final executable.
+
+   The HPPA `as' port generates a small subset of the relocations
+available in the SOM and ELF object file formats.  Additional relocation
+support will be added as it becomes necessary.
+
+
+File: as.info,  Node: HPPA Options,  Next: HPPA Syntax,  Prev: HPPA Notes,  Up: HPPA-Dependent
+
+9.11.2 Options
+--------------
+
+`as' has no machine-dependent command-line options for the HPPA.
+
+
+File: as.info,  Node: HPPA Syntax,  Next: HPPA Floating Point,  Prev: HPPA Options,  Up: HPPA-Dependent
+
+9.11.3 Syntax
+-------------
+
+The assembler syntax closely follows the HPPA instruction set reference
+manual; assembler directives and general syntax closely follow the HPPA
+assembly language reference manual, with a few noteworthy differences.
+
+   First, a colon may immediately follow a label definition.  This is
+simply for compatibility with how most assembly language programmers
+write code.
+
+   Some obscure expression parsing problems may affect hand written
+code which uses the `spop' instructions, or code which makes significant
+use of the `!' line separator.
+
+   `as' is much less forgiving about missing arguments and other
+similar oversights than the HP assembler.  `as' notifies you of missing
+arguments as syntax errors; this is regarded as a feature, not a bug.
+
+   Finally, `as' allows you to use an external symbol without
+explicitly importing the symbol.  _Warning:_ in the future this will be
+an error for HPPA targets.
+
+   Special characters for HPPA targets include:
+
+   `;' is the line comment character.
+
+   `!' can be used instead of a newline to separate statements.
+
+   Since `$' has no special meaning, you may use it in symbol names.
+
+
+File: as.info,  Node: HPPA Floating Point,  Next: HPPA Directives,  Prev: HPPA Syntax,  Up: HPPA-Dependent
+
+9.11.4 Floating Point
+---------------------
+
+The HPPA family uses IEEE floating-point numbers.
+
+
+File: as.info,  Node: HPPA Directives,  Next: HPPA Opcodes,  Prev: HPPA Floating Point,  Up: HPPA-Dependent
+
+9.11.5 HPPA Assembler Directives
+--------------------------------
+
+`as' for the HPPA supports many additional directives for compatibility
+with the native assembler.  This section describes them only briefly.
+For detailed information on HPPA-specific assembler directives, see
+`HP9000 Series 800 Assembly Language Reference Manual' (HP 92432-90001).
+
+   `as' does _not_ support the following assembler directives described
+in the HP manual:
+
+     .endm           .liston
+     .enter          .locct
+     .leave          .macro
+     .listoff
+
+   Beyond those implemented for compatibility, `as' supports one
+additional assembler directive for the HPPA: `.param'.  It conveys
+register argument locations for static functions.  Its syntax closely
+follows the `.export' directive.
+
+   These are the additional directives in `as' for the HPPA:
+
+`.block N'
+`.blockz N'
+     Reserve N bytes of storage, and initialize them to zero.
+
+`.call'
+     Mark the beginning of a procedure call.  Only the special case
+     with _no arguments_ is allowed.
+
+`.callinfo [ PARAM=VALUE, ... ]  [ FLAG, ... ]'
+     Specify a number of parameters and flags that define the
+     environment for a procedure.
+
+     PARAM may be any of `frame' (frame size), `entry_gr' (end of
+     general register range), `entry_fr' (end of float register range),
+     `entry_sr' (end of space register range).
+
+     The values for FLAG are `calls' or `caller' (proc has
+     subroutines), `no_calls' (proc does not call subroutines),
+     `save_rp' (preserve return pointer), `save_sp' (proc preserves
+     stack pointer), `no_unwind' (do not unwind this proc), `hpux_int'
+     (proc is interrupt routine).
+
+`.code'
+     Assemble into the standard section called `$TEXT$', subsection
+     `$CODE$'.
+
+`.copyright "STRING"'
+     In the SOM object format, insert STRING into the object code,
+     marked as a copyright string.
+
+`.copyright "STRING"'
+     In the ELF object format, insert STRING into the object code,
+     marked as a version string.
+
+`.enter'
+     Not yet supported; the assembler rejects programs containing this
+     directive.
+
+`.entry'
+     Mark the beginning of a procedure.
+
+`.exit'
+     Mark the end of a procedure.
+
+`.export NAME [ ,TYP ]  [ ,PARAM=R ]'
+     Make a procedure NAME available to callers.  TYP, if present, must
+     be one of `absolute', `code' (ELF only, not SOM), `data', `entry',
+     `data', `entry', `millicode', `plabel', `pri_prog', or `sec_prog'.
+
+     PARAM, if present, provides either relocation information for the
+     procedure arguments and result, or a privilege level.  PARAM may be
+     `argwN' (where N ranges from `0' to `3', and indicates one of four
+     one-word arguments); `rtnval' (the procedure's result); or
+     `priv_lev' (privilege level).  For arguments or the result, R
+     specifies how to relocate, and must be one of `no' (not
+     relocatable), `gr' (argument is in general register), `fr' (in
+     floating point register), or `fu' (upper half of float register).
+     For `priv_lev', R is an integer.
+
+`.half N'
+     Define a two-byte integer constant N; synonym for the portable
+     `as' directive `.short'.
+
+`.import NAME [ ,TYP ]'
+     Converse of `.export'; make a procedure available to call.  The
+     arguments use the same conventions as the first two arguments for
+     `.export'.
+
+`.label NAME'
+     Define NAME as a label for the current assembly location.
+
+`.leave'
+     Not yet supported; the assembler rejects programs containing this
+     directive.
+
+`.origin LC'
+     Advance location counter to LC. Synonym for the `as' portable
+     directive `.org'.
+
+`.param NAME [ ,TYP ]  [ ,PARAM=R ]'
+     Similar to `.export', but used for static procedures.
+
+`.proc'
+     Use preceding the first statement of a procedure.
+
+`.procend'
+     Use following the last statement of a procedure.
+
+`LABEL .reg EXPR'
+     Synonym for `.equ'; define LABEL with the absolute expression EXPR
+     as its value.
+
+`.space SECNAME [ ,PARAMS ]'
+     Switch to section SECNAME, creating a new section by that name if
+     necessary.  You may only use PARAMS when creating a new section,
+     not when switching to an existing one.  SECNAME may identify a
+     section by number rather than by name.
+
+     If specified, the list PARAMS declares attributes of the section,
+     identified by keywords.  The keywords recognized are `spnum=EXP'
+     (identify this section by the number EXP, an absolute expression),
+     `sort=EXP' (order sections according to this sort key when linking;
+     EXP is an absolute expression), `unloadable' (section contains no
+     loadable data), `notdefined' (this section defined elsewhere), and
+     `private' (data in this section not available to other programs).
+
+`.spnum SECNAM'
+     Allocate four bytes of storage, and initialize them with the
+     section number of the section named SECNAM.  (You can define the
+     section number with the HPPA `.space' directive.)
+
+`.string "STR"'
+     Copy the characters in the string STR to the object file.  *Note
+     Strings: Strings, for information on escape sequences you can use
+     in `as' strings.
+
+     _Warning!_ The HPPA version of `.string' differs from the usual
+     `as' definition: it does _not_ write a zero byte after copying STR.
+
+`.stringz "STR"'
+     Like `.string', but appends a zero byte after copying STR to object
+     file.
+
+`.subspa NAME [ ,PARAMS ]'
+`.nsubspa NAME [ ,PARAMS ]'
+     Similar to `.space', but selects a subsection NAME within the
+     current section.  You may only specify PARAMS when you create a
+     subsection (in the first instance of `.subspa' for this NAME).
+
+     If specified, the list PARAMS declares attributes of the
+     subsection, identified by keywords.  The keywords recognized are
+     `quad=EXPR' ("quadrant" for this subsection), `align=EXPR'
+     (alignment for beginning of this subsection; a power of two),
+     `access=EXPR' (value for "access rights" field), `sort=EXPR'
+     (sorting order for this subspace in link), `code_only' (subsection
+     contains only code), `unloadable' (subsection cannot be loaded
+     into memory), `comdat' (subsection is comdat), `common'
+     (subsection is common block), `dup_comm' (subsection may have
+     duplicate names), or `zero' (subsection is all zeros, do not write
+     in object file).
+
+     `.nsubspa' always creates a new subspace with the given name, even
+     if one with the same name already exists.
+
+     `comdat', `common' and `dup_comm' can be used to implement various
+     flavors of one-only support when using the SOM linker.  The SOM
+     linker only supports specific combinations of these flags.  The
+     details are not documented.  A brief description is provided here.
+
+     `comdat' provides a form of linkonce support.  It is useful for
+     both code and data subspaces.  A `comdat' subspace has a key symbol
+     marked by the `is_comdat' flag or `ST_COMDAT'.  Only the first
+     subspace for any given key is selected.  The key symbol becomes
+     universal in shared links.  This is similar to the behavior of
+     `secondary_def' symbols.
+
+     `common' provides Fortran named common support.  It is only useful
+     for data subspaces.  Symbols with the flag `is_common' retain this
+     flag in shared links.  Referencing a `is_common' symbol in a shared
+     library from outside the library doesn't work.  Thus, `is_common'
+     symbols must be output whenever they are needed.
+
+     `common' and `dup_comm' together provide Cobol common support.
+     The subspaces in this case must all be the same length.
+     Otherwise, this support is similar to the Fortran common support.
+
+     `dup_comm' by itself provides a type of one-only support for code.
+     Only the first `dup_comm' subspace is selected.  There is a rather
+     complex algorithm to compare subspaces.  Code symbols marked with
+     the `dup_common' flag are hidden.  This support was intended for
+     "C++ duplicate inlines".
+
+     A simplified technique is used to mark the flags of symbols based
+     on the flags of their subspace.  A symbol with the scope
+     SS_UNIVERSAL and type ST_ENTRY, ST_CODE or ST_DATA is marked with
+     the corresponding settings of `comdat', `common' and `dup_comm'
+     from the subspace, respectively.  This avoids having to introduce
+     additional directives to mark these symbols.  The HP assembler
+     sets `is_common' from `common'.  However, it doesn't set the
+     `dup_common' from `dup_comm'.  It doesn't have `comdat' support.
+
+`.version "STR"'
+     Write STR as version identifier in object code.
+
+
+File: as.info,  Node: HPPA Opcodes,  Prev: HPPA Directives,  Up: HPPA-Dependent
+
+9.11.6 Opcodes
+--------------
+
+For detailed information on the HPPA machine instruction set, see
+`PA-RISC Architecture and Instruction Set Reference Manual' (HP
+09740-90039).
+
+
+File: as.info,  Node: ESA/390-Dependent,  Next: i386-Dependent,  Prev: HPPA-Dependent,  Up: Machine Dependencies
+
+9.12 ESA/390 Dependent Features
+===============================
+
+* Menu:
+
+* ESA/390 Notes::                Notes
+* ESA/390 Options::              Options
+* ESA/390 Syntax::               Syntax
+* ESA/390 Floating Point::       Floating Point
+* ESA/390 Directives::           ESA/390 Machine Directives
+* ESA/390 Opcodes::              Opcodes
+
+
+File: as.info,  Node: ESA/390 Notes,  Next: ESA/390 Options,  Up: ESA/390-Dependent
+
+9.12.1 Notes
+------------
+
+The ESA/390 `as' port is currently intended to be a back-end for the
+GNU CC compiler.  It is not HLASM compatible, although it does support
+a subset of some of the HLASM directives.  The only supported binary
+file format is ELF; none of the usual MVS/VM/OE/USS object file
+formats, such as ESD or XSD, are supported.
+
+   When used with the GNU CC compiler, the ESA/390 `as' will produce
+correct, fully relocated, functional binaries, and has been used to
+compile and execute large projects.  However, many aspects should still
+be considered experimental; these include shared library support,
+dynamically loadable objects, and any relocation other than the 31-bit
+relocation.
+
+
+File: as.info,  Node: ESA/390 Options,  Next: ESA/390 Syntax,  Prev: ESA/390 Notes,  Up: ESA/390-Dependent
+
+9.12.2 Options
+--------------
+
+`as' has no machine-dependent command-line options for the ESA/390.
+
+
+File: as.info,  Node: ESA/390 Syntax,  Next: ESA/390 Floating Point,  Prev: ESA/390 Options,  Up: ESA/390-Dependent
+
+9.12.3 Syntax
+-------------
+
+The opcode/operand syntax follows the ESA/390 Principles of Operation
+manual; assembler directives and general syntax are loosely based on the
+prevailing AT&T/SVR4/ELF/Solaris style notation.  HLASM-style directives
+are _not_ supported for the most part, with the exception of those
+described herein.
+
+   A leading dot in front of directives is optional, and the case of
+directives is ignored; thus for example, .using and USING have the same
+effect.
+
+   A colon may immediately follow a label definition.  This is simply
+for compatibility with how most assembly language programmers write
+code.
+
+   `#' is the line comment character.
+
+   `;' can be used instead of a newline to separate statements.
+
+   Since `$' has no special meaning, you may use it in symbol names.
+
+   Registers can be given the symbolic names r0..r15, fp0, fp2, fp4,
+fp6.  By using thesse symbolic names, `as' can detect simple syntax
+errors. The name rarg or r.arg is a synonym for r11, rtca or r.tca for
+r12, sp, r.sp, dsa r.dsa for r13, lr or r.lr for r14, rbase or r.base
+for r3 and rpgt or r.pgt for r4.
+
+   `*' is the current location counter.  Unlike `.' it is always
+relative to the last USING directive.  Note that this means that
+expressions cannot use multiplication, as any occurrence of `*' will be
+interpreted as a location counter.
+
+   All labels are relative to the last USING.  Thus, branches to a label
+always imply the use of base+displacement.
+
+   Many of the usual forms of address constants / address literals are
+supported.  Thus,
+     	.using	*,r3
+     	L	r15,=A(some_routine)
+     	LM	r6,r7,=V(some_longlong_extern)
+     	A	r1,=F'12'
+     	AH	r0,=H'42'
+     	ME	r6,=E'3.1416'
+     	MD	r6,=D'3.14159265358979'
+     	O	r6,=XL4'cacad0d0'
+     	.ltorg
+   should all behave as expected: that is, an entry in the literal pool
+will be created (or reused if it already exists), and the instruction
+operands will be the displacement into the literal pool using the
+current base register (as last declared with the `.using' directive).
+
+
+File: as.info,  Node: ESA/390 Floating Point,  Next: ESA/390 Directives,  Prev: ESA/390 Syntax,  Up: ESA/390-Dependent
+
+9.12.4 Floating Point
+---------------------
+
+The assembler generates only IEEE floating-point numbers.  The older
+floating point formats are not supported.
+
+
+File: as.info,  Node: ESA/390 Directives,  Next: ESA/390 Opcodes,  Prev: ESA/390 Floating Point,  Up: ESA/390-Dependent
+
+9.12.5 ESA/390 Assembler Directives
+-----------------------------------
+
+`as' for the ESA/390 supports all of the standard ELF/SVR4 assembler
+directives that are documented in the main part of this documentation.
+Several additional directives are supported in order to implement the
+ESA/390 addressing model.  The most important of these are `.using' and
+`.ltorg'
+
+   These are the additional directives in `as' for the ESA/390:
+
+`.dc'
+     A small subset of the usual DC directive is supported.
+
+`.drop REGNO'
+     Stop using REGNO as the base register.  The REGNO must have been
+     previously declared with a `.using' directive in the same section
+     as the current section.
+
+`.ebcdic STRING'
+     Emit the EBCDIC equivalent of the indicated string.  The emitted
+     string will be null terminated.  Note that the directives
+     `.string' etc. emit ascii strings by default.
+
+`EQU'
+     The standard HLASM-style EQU directive is not supported; however,
+     the standard `as' directive .equ can be used to the same effect.
+
+`.ltorg'
+     Dump the literal pool accumulated so far; begin a new literal pool.
+     The literal pool will be written in the current section; in order
+     to generate correct assembly, a `.using' must have been previously
+     specified in the same section.
+
+`.using EXPR,REGNO'
+     Use REGNO as the base register for all subsequent RX, RS, and SS
+     form instructions. The EXPR will be evaluated to obtain the base
+     address; usually, EXPR will merely be `*'.
+
+     This assembler allows two `.using' directives to be simultaneously
+     outstanding, one in the `.text' section, and one in another section
+     (typically, the `.data' section).  This feature allows dynamically
+     loaded objects to be implemented in a relatively straightforward
+     way.  A `.using' directive must always be specified in the `.text'
+     section; this will specify the base register that will be used for
+     branches in the `.text' section.  A second `.using' may be
+     specified in another section; this will specify the base register
+     that is used for non-label address literals.  When a second
+     `.using' is specified, then the subsequent `.ltorg' must be put in
+     the same section; otherwise an error will result.
+
+     Thus, for example, the following code uses `r3' to address branch
+     targets and `r4' to address the literal pool, which has been
+     written to the `.data' section.  The is, the constants
+     `=A(some_routine)', `=H'42'' and `=E'3.1416'' will all appear in
+     the `.data' section.
+
+          .data
+          	.using  LITPOOL,r4
+          .text
+          	BASR	r3,0
+          	.using	*,r3
+                  B       START
+          	.long	LITPOOL
+          START:
+          	L	r4,4(,r3)
+          	L	r15,=A(some_routine)
+          	LTR	r15,r15
+          	BNE	LABEL
+          	AH	r0,=H'42'
+          LABEL:
+          	ME	r6,=E'3.1416'
+          .data
+          LITPOOL:
+          	.ltorg
+
+     Note that this dual-`.using' directive semantics extends and is
+     not compatible with HLASM semantics.  Note that this assembler
+     directive does not support the full range of HLASM semantics.
+
+
+
+File: as.info,  Node: ESA/390 Opcodes,  Prev: ESA/390 Directives,  Up: ESA/390-Dependent
+
+9.12.6 Opcodes
+--------------
+
+For detailed information on the ESA/390 machine instruction set, see
+`ESA/390 Principles of Operation' (IBM Publication Number DZ9AR004).
+
+
+File: as.info,  Node: i386-Dependent,  Next: i860-Dependent,  Prev: ESA/390-Dependent,  Up: Machine Dependencies
+
+9.13 80386 Dependent Features
+=============================
+
+   The i386 version `as' supports both the original Intel 386
+architecture in both 16 and 32-bit mode as well as AMD x86-64
+architecture extending the Intel architecture to 64-bits.
+
+* Menu:
+
+* i386-Options::                Options
+* i386-Directives::             X86 specific directives
+* i386-Syntax::                 AT&T Syntax versus Intel Syntax
+* i386-Mnemonics::              Instruction Naming
+* i386-Regs::                   Register Naming
+* i386-Prefixes::               Instruction Prefixes
+* i386-Memory::                 Memory References
+* i386-Jumps::                  Handling of Jump Instructions
+* i386-Float::                  Floating Point
+* i386-SIMD::                   Intel's MMX and AMD's 3DNow! SIMD Operations
+* i386-16bit::                  Writing 16-bit Code
+* i386-Arch::                   Specifying an x86 CPU architecture
+* i386-Bugs::                   AT&T Syntax bugs
+* i386-Notes::                  Notes
+
+
+File: as.info,  Node: i386-Options,  Next: i386-Directives,  Up: i386-Dependent
+
+9.13.1 Options
+--------------
+
+The i386 version of `as' has a few machine dependent options:
+
+`--32 | --64'
+     Select the word size, either 32 bits or 64 bits. Selecting 32-bit
+     implies Intel i386 architecture, while 64-bit implies AMD x86-64
+     architecture.
+
+     These options are only available with the ELF object file format,
+     and require that the necessary BFD support has been included (on a
+     32-bit platform you have to add -enable-64-bit-bfd to configure
+     enable 64-bit usage and use x86-64 as target platform).
+
+`-n'
+     By default, x86 GAS replaces multiple nop instructions used for
+     alignment within code sections with multi-byte nop instructions
+     such as leal 0(%esi,1),%esi.  This switch disables the
+     optimization.
+
+`--divide'
+     On SVR4-derived platforms, the character `/' is treated as a
+     comment character, which means that it cannot be used in
+     expressions.  The `--divide' option turns `/' into a normal
+     character.  This does not disable `/' at the beginning of a line
+     starting a comment, or affect using `#' for starting a comment.
+
+`-march=CPU[+EXTENSION...]'
+     This option specifies the target processor.  The assembler will
+     issue an error message if an attempt is made to assemble an
+     instruction which will not execute on the target processor.  The
+     following processor names are recognized: `i8086', `i186', `i286',
+     `i386', `i486', `i586', `i686', `pentium', `pentiumpro',
+     `pentiumii', `pentiumiii', `pentium4', `prescott', `nocona',
+     `core', `core2', `corei7', `l1om', `k6', `k6_2', `athlon',
+     `opteron', `k8', `amdfam10', `generic32' and `generic64'.
+
+     In addition to the basic instruction set, the assembler can be
+     told to accept various extension mnemonics.  For example,
+     `-march=i686+sse4+vmx' extends I686 with SSE4 and VMX.  The
+     following extensions are currently supported: `8087', `287', `387',
+     `no87', `mmx', `nommx', `sse', `sse2', `sse3', `ssse3', `sse4.1',
+     `sse4.2', `sse4', `nosse', `avx', `noavx', `vmx', `smx', `xsave',
+     `aes', `pclmul', `fma', `movbe', `ept', `clflush', `syscall',
+     `rdtscp', `3dnow', `3dnowa', `sse4a', `sse5', `svme', `abm' and
+     `padlock'.  Note that rather than extending a basic instruction
+     set, the extension mnemonics starting with `no' revoke the
+     respective functionality.
+
+     When the `.arch' directive is used with `-march', the `.arch'
+     directive will take precedent.
+
+`-mtune=CPU'
+     This option specifies a processor to optimize for. When used in
+     conjunction with the `-march' option, only instructions of the
+     processor specified by the `-march' option will be generated.
+
+     Valid CPU values are identical to the processor list of
+     `-march=CPU'.
+
+`-msse2avx'
+     This option specifies that the assembler should encode SSE
+     instructions with VEX prefix.
+
+`-msse-check=NONE'
+
+`-msse-check=WARNING'
+
+`-msse-check=ERROR'
+     These options control if the assembler should check SSE
+     intructions.  `-msse-check=NONE' will make the assembler not to
+     check SSE instructions,  which is the default.
+     `-msse-check=WARNING' will make the assembler issue a warning for
+     any SSE intruction.  `-msse-check=ERROR' will make the assembler
+     issue an error for any SSE intruction.
+
+`-mmnemonic=ATT'
+
+`-mmnemonic=INTEL'
+     This option specifies instruction mnemonic for matching
+     instructions.  The `.att_mnemonic' and `.intel_mnemonic'
+     directives will take precedent.
+
+`-msyntax=ATT'
+
+`-msyntax=INTEL'
+     This option specifies instruction syntax when processing
+     instructions.  The `.att_syntax' and `.intel_syntax' directives
+     will take precedent.
+
+`-mnaked-reg'
+     This opetion specifies that registers don't require a `%' prefix.
+     The `.att_syntax' and `.intel_syntax' directives will take
+     precedent.
+
+
+
+File: as.info,  Node: i386-Directives,  Next: i386-Syntax,  Prev: i386-Options,  Up: i386-Dependent
+
+9.13.2 x86 specific Directives
+------------------------------
+
+`.lcomm SYMBOL , LENGTH[, ALIGNMENT]'
+     Reserve LENGTH (an absolute expression) bytes for a local common
+     denoted by SYMBOL.  The section and value of SYMBOL are those of
+     the new local common.  The addresses are allocated in the bss
+     section, so that at run-time the bytes start off zeroed.  Since
+     SYMBOL is not declared global, it is normally not visible to `ld'.
+     The optional third parameter, ALIGNMENT, specifies the desired
+     alignment of the symbol in the bss section.
+
+     This directive is only available for COFF based x86 targets.
+
+
+
+File: as.info,  Node: i386-Syntax,  Next: i386-Mnemonics,  Prev: i386-Directives,  Up: i386-Dependent
+
+9.13.3 AT&T Syntax versus Intel Syntax
+--------------------------------------
+
+`as' now supports assembly using Intel assembler syntax.
+`.intel_syntax' selects Intel mode, and `.att_syntax' switches back to
+the usual AT&T mode for compatibility with the output of `gcc'.  Either
+of these directives may have an optional argument, `prefix', or
+`noprefix' specifying whether registers require a `%' prefix.  AT&T
+System V/386 assembler syntax is quite different from Intel syntax.  We
+mention these differences because almost all 80386 documents use Intel
+syntax.  Notable differences between the two syntaxes are:
+
+   * AT&T immediate operands are preceded by `$'; Intel immediate
+     operands are undelimited (Intel `push 4' is AT&T `pushl $4').
+     AT&T register operands are preceded by `%'; Intel register operands
+     are undelimited.  AT&T absolute (as opposed to PC relative)
+     jump/call operands are prefixed by `*'; they are undelimited in
+     Intel syntax.
+
+   * AT&T and Intel syntax use the opposite order for source and
+     destination operands.  Intel `add eax, 4' is `addl $4, %eax'.  The
+     `source, dest' convention is maintained for compatibility with
+     previous Unix assemblers.  Note that `bound', `invlpga', and
+     instructions with 2 immediate operands, such as the `enter'
+     instruction, do _not_ have reversed order.  *note i386-Bugs::.
+
+   * In AT&T syntax the size of memory operands is determined from the
+     last character of the instruction mnemonic.  Mnemonic suffixes of
+     `b', `w', `l' and `q' specify byte (8-bit), word (16-bit), long
+     (32-bit) and quadruple word (64-bit) memory references.  Intel
+     syntax accomplishes this by prefixing memory operands (_not_ the
+     instruction mnemonics) with `byte ptr', `word ptr', `dword ptr'
+     and `qword ptr'.  Thus, Intel `mov al, byte ptr FOO' is `movb FOO,
+     %al' in AT&T syntax.
+
+   * Immediate form long jumps and calls are `lcall/ljmp $SECTION,
+     $OFFSET' in AT&T syntax; the Intel syntax is `call/jmp far
+     SECTION:OFFSET'.  Also, the far return instruction is `lret
+     $STACK-ADJUST' in AT&T syntax; Intel syntax is `ret far
+     STACK-ADJUST'.
+
+   * The AT&T assembler does not provide support for multiple section
+     programs.  Unix style systems expect all programs to be single
+     sections.
+
+
+File: as.info,  Node: i386-Mnemonics,  Next: i386-Regs,  Prev: i386-Syntax,  Up: i386-Dependent
+
+9.13.4 Instruction Naming
+-------------------------
+
+Instruction mnemonics are suffixed with one character modifiers which
+specify the size of operands.  The letters `b', `w', `l' and `q'
+specify byte, word, long and quadruple word operands.  If no suffix is
+specified by an instruction then `as' tries to fill in the missing
+suffix based on the destination register operand (the last one by
+convention).  Thus, `mov %ax, %bx' is equivalent to `movw %ax, %bx';
+also, `mov $1, %bx' is equivalent to `movw $1, bx'.  Note that this is
+incompatible with the AT&T Unix assembler which assumes that a missing
+mnemonic suffix implies long operand size.  (This incompatibility does
+not affect compiler output since compilers always explicitly specify
+the mnemonic suffix.)
+
+   Almost all instructions have the same names in AT&T and Intel format.
+There are a few exceptions.  The sign extend and zero extend
+instructions need two sizes to specify them.  They need a size to
+sign/zero extend _from_ and a size to zero extend _to_.  This is
+accomplished by using two instruction mnemonic suffixes in AT&T syntax.
+Base names for sign extend and zero extend are `movs...' and `movz...'
+in AT&T syntax (`movsx' and `movzx' in Intel syntax).  The instruction
+mnemonic suffixes are tacked on to this base name, the _from_ suffix
+before the _to_ suffix.  Thus, `movsbl %al, %edx' is AT&T syntax for
+"move sign extend _from_ %al _to_ %edx."  Possible suffixes, thus, are
+`bl' (from byte to long), `bw' (from byte to word), `wl' (from word to
+long), `bq' (from byte to quadruple word), `wq' (from word to quadruple
+word), and `lq' (from long to quadruple word).
+
+   Different encoding options can be specified via optional mnemonic
+suffix.  `.s' suffix swaps 2 register operands in encoding when moving
+from one register to another.
+
+   The Intel-syntax conversion instructions
+
+   * `cbw' -- sign-extend byte in `%al' to word in `%ax',
+
+   * `cwde' -- sign-extend word in `%ax' to long in `%eax',
+
+   * `cwd' -- sign-extend word in `%ax' to long in `%dx:%ax',
+
+   * `cdq' -- sign-extend dword in `%eax' to quad in `%edx:%eax',
+
+   * `cdqe' -- sign-extend dword in `%eax' to quad in `%rax' (x86-64
+     only),
+
+   * `cqo' -- sign-extend quad in `%rax' to octuple in `%rdx:%rax'
+     (x86-64 only),
+
+are called `cbtw', `cwtl', `cwtd', `cltd', `cltq', and `cqto' in AT&T
+naming.  `as' accepts either naming for these instructions.
+
+   Far call/jump instructions are `lcall' and `ljmp' in AT&T syntax,
+but are `call far' and `jump far' in Intel convention.
+
+9.13.5 AT&T Mnemonic versus Intel Mnemonic
+------------------------------------------
+
+`as' supports assembly using Intel mnemonic.  `.intel_mnemonic' selects
+Intel mnemonic with Intel syntax, and `.att_mnemonic' switches back to
+the usual AT&T mnemonic with AT&T syntax for compatibility with the
+output of `gcc'.  Several x87 instructions, `fadd', `fdiv', `fdivp',
+`fdivr', `fdivrp', `fmul', `fsub', `fsubp', `fsubr' and `fsubrp',  are
+implemented in AT&T System V/386 assembler with different mnemonics
+from those in Intel IA32 specification.  `gcc' generates those
+instructions with AT&T mnemonic.
+
+
+File: as.info,  Node: i386-Regs,  Next: i386-Prefixes,  Prev: i386-Mnemonics,  Up: i386-Dependent
+
+9.13.6 Register Naming
+----------------------
+
+Register operands are always prefixed with `%'.  The 80386 registers
+consist of
+
+   * the 8 32-bit registers `%eax' (the accumulator), `%ebx', `%ecx',
+     `%edx', `%edi', `%esi', `%ebp' (the frame pointer), and `%esp'
+     (the stack pointer).
+
+   * the 8 16-bit low-ends of these: `%ax', `%bx', `%cx', `%dx', `%di',
+     `%si', `%bp', and `%sp'.
+
+   * the 8 8-bit registers: `%ah', `%al', `%bh', `%bl', `%ch', `%cl',
+     `%dh', and `%dl' (These are the high-bytes and low-bytes of `%ax',
+     `%bx', `%cx', and `%dx')
+
+   * the 6 section registers `%cs' (code section), `%ds' (data
+     section), `%ss' (stack section), `%es', `%fs', and `%gs'.
+
+   * the 3 processor control registers `%cr0', `%cr2', and `%cr3'.
+
+   * the 6 debug registers `%db0', `%db1', `%db2', `%db3', `%db6', and
+     `%db7'.
+
+   * the 2 test registers `%tr6' and `%tr7'.
+
+   * the 8 floating point register stack `%st' or equivalently
+     `%st(0)', `%st(1)', `%st(2)', `%st(3)', `%st(4)', `%st(5)',
+     `%st(6)', and `%st(7)'.  These registers are overloaded by 8 MMX
+     registers `%mm0', `%mm1', `%mm2', `%mm3', `%mm4', `%mm5', `%mm6'
+     and `%mm7'.
+
+   * the 8 SSE registers registers `%xmm0', `%xmm1', `%xmm2', `%xmm3',
+     `%xmm4', `%xmm5', `%xmm6' and `%xmm7'.
+
+   The AMD x86-64 architecture extends the register set by:
+
+   * enhancing the 8 32-bit registers to 64-bit: `%rax' (the
+     accumulator), `%rbx', `%rcx', `%rdx', `%rdi', `%rsi', `%rbp' (the
+     frame pointer), `%rsp' (the stack pointer)
+
+   * the 8 extended registers `%r8'-`%r15'.
+
+   * the 8 32-bit low ends of the extended registers: `%r8d'-`%r15d'
+
+   * the 8 16-bit low ends of the extended registers: `%r8w'-`%r15w'
+
+   * the 8 8-bit low ends of the extended registers: `%r8b'-`%r15b'
+
+   * the 4 8-bit registers: `%sil', `%dil', `%bpl', `%spl'.
+
+   * the 8 debug registers: `%db8'-`%db15'.
+
+   * the 8 SSE registers: `%xmm8'-`%xmm15'.
+
+
+File: as.info,  Node: i386-Prefixes,  Next: i386-Memory,  Prev: i386-Regs,  Up: i386-Dependent
+
+9.13.7 Instruction Prefixes
+---------------------------
+
+Instruction prefixes are used to modify the following instruction.  They
+are used to repeat string instructions, to provide section overrides, to
+perform bus lock operations, and to change operand and address sizes.
+(Most instructions that normally operate on 32-bit operands will use
+16-bit operands if the instruction has an "operand size" prefix.)
+Instruction prefixes are best written on the same line as the
+instruction they act upon. For example, the `scas' (scan string)
+instruction is repeated with:
+
+             repne scas %es:(%edi),%al
+
+   You may also place prefixes on the lines immediately preceding the
+instruction, but this circumvents checks that `as' does with prefixes,
+and will not work with all prefixes.
+
+   Here is a list of instruction prefixes:
+
+   * Section override prefixes `cs', `ds', `ss', `es', `fs', `gs'.
+     These are automatically added by specifying using the
+     SECTION:MEMORY-OPERAND form for memory references.
+
+   * Operand/Address size prefixes `data16' and `addr16' change 32-bit
+     operands/addresses into 16-bit operands/addresses, while `data32'
+     and `addr32' change 16-bit ones (in a `.code16' section) into
+     32-bit operands/addresses.  These prefixes _must_ appear on the
+     same line of code as the instruction they modify. For example, in
+     a 16-bit `.code16' section, you might write:
+
+                  addr32 jmpl *(%ebx)
+
+   * The bus lock prefix `lock' inhibits interrupts during execution of
+     the instruction it precedes.  (This is only valid with certain
+     instructions; see a 80386 manual for details).
+
+   * The wait for coprocessor prefix `wait' waits for the coprocessor to
+     complete the current instruction.  This should never be needed for
+     the 80386/80387 combination.
+
+   * The `rep', `repe', and `repne' prefixes are added to string
+     instructions to make them repeat `%ecx' times (`%cx' times if the
+     current address size is 16-bits).  
+
+   * The `rex' family of prefixes is used by x86-64 to encode
+     extensions to i386 instruction set.  The `rex' prefix has four
+     bits -- an operand size overwrite (`64') used to change operand
+     size from 32-bit to 64-bit and X, Y and Z extensions bits used to
+     extend the register set.
+
+     You may write the `rex' prefixes directly. The `rex64xyz'
+     instruction emits `rex' prefix with all the bits set.  By omitting
+     the `64', `x', `y' or `z' you may write other prefixes as well.
+     Normally, there is no need to write the prefixes explicitly, since
+     gas will automatically generate them based on the instruction
+     operands.
+
+
+File: as.info,  Node: i386-Memory,  Next: i386-Jumps,  Prev: i386-Prefixes,  Up: i386-Dependent
+
+9.13.8 Memory References
+------------------------
+
+An Intel syntax indirect memory reference of the form
+
+     SECTION:[BASE + INDEX*SCALE + DISP]
+
+is translated into the AT&T syntax
+
+     SECTION:DISP(BASE, INDEX, SCALE)
+
+where BASE and INDEX are the optional 32-bit base and index registers,
+DISP is the optional displacement, and SCALE, taking the values 1, 2,
+4, and 8, multiplies INDEX to calculate the address of the operand.  If
+no SCALE is specified, SCALE is taken to be 1.  SECTION specifies the
+optional section register for the memory operand, and may override the
+default section register (see a 80386 manual for section register
+defaults). Note that section overrides in AT&T syntax _must_ be
+preceded by a `%'.  If you specify a section override which coincides
+with the default section register, `as' does _not_ output any section
+register override prefixes to assemble the given instruction.  Thus,
+section overrides can be specified to emphasize which section register
+is used for a given memory operand.
+
+   Here are some examples of Intel and AT&T style memory references:
+
+AT&T: `-4(%ebp)', Intel:  `[ebp - 4]'
+     BASE is `%ebp'; DISP is `-4'. SECTION is missing, and the default
+     section is used (`%ss' for addressing with `%ebp' as the base
+     register).  INDEX, SCALE are both missing.
+
+AT&T: `foo(,%eax,4)', Intel: `[foo + eax*4]'
+     INDEX is `%eax' (scaled by a SCALE 4); DISP is `foo'.  All other
+     fields are missing.  The section register here defaults to `%ds'.
+
+AT&T: `foo(,1)'; Intel `[foo]'
+     This uses the value pointed to by `foo' as a memory operand.  Note
+     that BASE and INDEX are both missing, but there is only _one_ `,'.
+     This is a syntactic exception.
+
+AT&T: `%gs:foo'; Intel `gs:foo'
+     This selects the contents of the variable `foo' with section
+     register SECTION being `%gs'.
+
+   Absolute (as opposed to PC relative) call and jump operands must be
+prefixed with `*'.  If no `*' is specified, `as' always chooses PC
+relative addressing for jump/call labels.
+
+   Any instruction that has a memory operand, but no register operand,
+_must_ specify its size (byte, word, long, or quadruple) with an
+instruction mnemonic suffix (`b', `w', `l' or `q', respectively).
+
+   The x86-64 architecture adds an RIP (instruction pointer relative)
+addressing.  This addressing mode is specified by using `rip' as a base
+register.  Only constant offsets are valid. For example:
+
+AT&T: `1234(%rip)', Intel: `[rip + 1234]'
+     Points to the address 1234 bytes past the end of the current
+     instruction.
+
+AT&T: `symbol(%rip)', Intel: `[rip + symbol]'
+     Points to the `symbol' in RIP relative way, this is shorter than
+     the default absolute addressing.
+
+   Other addressing modes remain unchanged in x86-64 architecture,
+except registers used are 64-bit instead of 32-bit.
+
+
+File: as.info,  Node: i386-Jumps,  Next: i386-Float,  Prev: i386-Memory,  Up: i386-Dependent
+
+9.13.9 Handling of Jump Instructions
+------------------------------------
+
+Jump instructions are always optimized to use the smallest possible
+displacements.  This is accomplished by using byte (8-bit) displacement
+jumps whenever the target is sufficiently close.  If a byte displacement
+is insufficient a long displacement is used.  We do not support word
+(16-bit) displacement jumps in 32-bit mode (i.e. prefixing the jump
+instruction with the `data16' instruction prefix), since the 80386
+insists upon masking `%eip' to 16 bits after the word displacement is
+added. (See also *note i386-Arch::)
+
+   Note that the `jcxz', `jecxz', `loop', `loopz', `loope', `loopnz'
+and `loopne' instructions only come in byte displacements, so that if
+you use these instructions (`gcc' does not use them) you may get an
+error message (and incorrect code).  The AT&T 80386 assembler tries to
+get around this problem by expanding `jcxz foo' to
+
+              jcxz cx_zero
+              jmp cx_nonzero
+     cx_zero: jmp foo
+     cx_nonzero:
+
+
+File: as.info,  Node: i386-Float,  Next: i386-SIMD,  Prev: i386-Jumps,  Up: i386-Dependent
+
+9.13.10 Floating Point
+----------------------
+
+All 80387 floating point types except packed BCD are supported.  (BCD
+support may be added without much difficulty).  These data types are
+16-, 32-, and 64- bit integers, and single (32-bit), double (64-bit),
+and extended (80-bit) precision floating point.  Each supported type
+has an instruction mnemonic suffix and a constructor associated with
+it.  Instruction mnemonic suffixes specify the operand's data type.
+Constructors build these data types into memory.
+
+   * Floating point constructors are `.float' or `.single', `.double',
+     and `.tfloat' for 32-, 64-, and 80-bit formats.  These correspond
+     to instruction mnemonic suffixes `s', `l', and `t'. `t' stands for
+     80-bit (ten byte) real.  The 80387 only supports this format via
+     the `fldt' (load 80-bit real to stack top) and `fstpt' (store
+     80-bit real and pop stack) instructions.
+
+   * Integer constructors are `.word', `.long' or `.int', and `.quad'
+     for the 16-, 32-, and 64-bit integer formats.  The corresponding
+     instruction mnemonic suffixes are `s' (single), `l' (long), and
+     `q' (quad).  As with the 80-bit real format, the 64-bit `q' format
+     is only present in the `fildq' (load quad integer to stack top)
+     and `fistpq' (store quad integer and pop stack) instructions.
+
+   Register to register operations should not use instruction mnemonic
+suffixes.  `fstl %st, %st(1)' will give a warning, and be assembled as
+if you wrote `fst %st, %st(1)', since all register to register
+operations use 80-bit floating point operands. (Contrast this with
+`fstl %st, mem', which converts `%st' from 80-bit to 64-bit floating
+point format, then stores the result in the 4 byte location `mem')
+
+
+File: as.info,  Node: i386-SIMD,  Next: i386-16bit,  Prev: i386-Float,  Up: i386-Dependent
+
+9.13.11 Intel's MMX and AMD's 3DNow! SIMD Operations
+----------------------------------------------------
+
+`as' supports Intel's MMX instruction set (SIMD instructions for
+integer data), available on Intel's Pentium MMX processors and Pentium
+II processors, AMD's K6 and K6-2 processors, Cyrix' M2 processor, and
+probably others.  It also supports AMD's 3DNow!  instruction set (SIMD
+instructions for 32-bit floating point data) available on AMD's K6-2
+processor and possibly others in the future.
+
+   Currently, `as' does not support Intel's floating point SIMD, Katmai
+(KNI).
+
+   The eight 64-bit MMX operands, also used by 3DNow!, are called
+`%mm0', `%mm1', ... `%mm7'.  They contain eight 8-bit integers, four
+16-bit integers, two 32-bit integers, one 64-bit integer, or two 32-bit
+floating point values.  The MMX registers cannot be used at the same
+time as the floating point stack.
+
+   See Intel and AMD documentation, keeping in mind that the operand
+order in instructions is reversed from the Intel syntax.
+
+
+File: as.info,  Node: i386-16bit,  Next: i386-Arch,  Prev: i386-SIMD,  Up: i386-Dependent
+
+9.13.12 Writing 16-bit Code
+---------------------------
+
+While `as' normally writes only "pure" 32-bit i386 code or 64-bit
+x86-64 code depending on the default configuration, it also supports
+writing code to run in real mode or in 16-bit protected mode code
+segments.  To do this, put a `.code16' or `.code16gcc' directive before
+the assembly language instructions to be run in 16-bit mode.  You can
+switch `as' back to writing normal 32-bit code with the `.code32'
+directive.
+
+   `.code16gcc' provides experimental support for generating 16-bit
+code from gcc, and differs from `.code16' in that `call', `ret',
+`enter', `leave', `push', `pop', `pusha', `popa', `pushf', and `popf'
+instructions default to 32-bit size.  This is so that the stack pointer
+is manipulated in the same way over function calls, allowing access to
+function parameters at the same stack offsets as in 32-bit mode.
+`.code16gcc' also automatically adds address size prefixes where
+necessary to use the 32-bit addressing modes that gcc generates.
+
+   The code which `as' generates in 16-bit mode will not necessarily
+run on a 16-bit pre-80386 processor.  To write code that runs on such a
+processor, you must refrain from using _any_ 32-bit constructs which
+require `as' to output address or operand size prefixes.
+
+   Note that writing 16-bit code instructions by explicitly specifying a
+prefix or an instruction mnemonic suffix within a 32-bit code section
+generates different machine instructions than those generated for a
+16-bit code segment.  In a 32-bit code section, the following code
+generates the machine opcode bytes `66 6a 04', which pushes the value
+`4' onto the stack, decrementing `%esp' by 2.
+
+             pushw $4
+
+   The same code in a 16-bit code section would generate the machine
+opcode bytes `6a 04' (i.e., without the operand size prefix), which is
+correct since the processor default operand size is assumed to be 16
+bits in a 16-bit code section.
+
+
+File: as.info,  Node: i386-Bugs,  Next: i386-Notes,  Prev: i386-Arch,  Up: i386-Dependent
+
+9.13.13 AT&T Syntax bugs
+------------------------
+
+The UnixWare assembler, and probably other AT&T derived ix86 Unix
+assemblers, generate floating point instructions with reversed source
+and destination registers in certain cases.  Unfortunately, gcc and
+possibly many other programs use this reversed syntax, so we're stuck
+with it.
+
+   For example
+
+             fsub %st,%st(3)
+   results in `%st(3)' being updated to `%st - %st(3)' rather than the
+expected `%st(3) - %st'.  This happens with all the non-commutative
+arithmetic floating point operations with two register operands where
+the source register is `%st' and the destination register is `%st(i)'.
+
+
+File: as.info,  Node: i386-Arch,  Next: i386-Bugs,  Prev: i386-16bit,  Up: i386-Dependent
+
+9.13.14 Specifying CPU Architecture
+-----------------------------------
+
+`as' may be told to assemble for a particular CPU (sub-)architecture
+with the `.arch CPU_TYPE' directive.  This directive enables a warning
+when gas detects an instruction that is not supported on the CPU
+specified.  The choices for CPU_TYPE are:
+
+`i8086'        `i186'         `i286'         `i386'
+`i486'         `i586'         `i686'         `pentium'
+`pentiumpro'   `pentiumii'    `pentiumiii'   `pentium4'
+`prescott'     `nocona'       `core'         `core2'
+`corei7'       `l1om'                        
+`k6'           `k6_2'         `athlon'       `k8'
+`amdfam10'                                   
+`generic32'    `generic64'                   
+`.mmx'         `.sse'         `.sse2'        `.sse3'
+`.ssse3'       `.sse4.1'      `.sse4.2'      `.sse4'
+`.avx'         `.vmx'         `.smx'         `.xsave'
+`.aes'         `.pclmul'      `.fma'         `.movbe'
+`.ept'         `.clflush'                    
+`.3dnow'       `.3dnowa'      `.sse4a'       `.sse5'
+`.syscall'     `.rdtscp'      `.svme'        `.abm'
+`.padlock'                                   
+
+   Apart from the warning, there are only two other effects on `as'
+operation;  Firstly, if you specify a CPU other than `i486', then shift
+by one instructions such as `sarl $1, %eax' will automatically use a
+two byte opcode sequence.  The larger three byte opcode sequence is
+used on the 486 (and when no architecture is specified) because it
+executes faster on the 486.  Note that you can explicitly request the
+two byte opcode by writing `sarl %eax'.  Secondly, if you specify
+`i8086', `i186', or `i286', _and_ `.code16' or `.code16gcc' then byte
+offset conditional jumps will be promoted when necessary to a two
+instruction sequence consisting of a conditional jump of the opposite
+sense around an unconditional jump to the target.
+
+   Following the CPU architecture (but not a sub-architecture, which
+are those starting with a dot), you may specify `jumps' or `nojumps' to
+control automatic promotion of conditional jumps. `jumps' is the
+default, and enables jump promotion;  All external jumps will be of the
+long variety, and file-local jumps will be promoted as necessary.
+(*note i386-Jumps::)  `nojumps' leaves external conditional jumps as
+byte offset jumps, and warns about file-local conditional jumps that
+`as' promotes.  Unconditional jumps are treated as for `jumps'.
+
+   For example
+
+      .arch i8086,nojumps
+
+
+File: as.info,  Node: i386-Notes,  Prev: i386-Bugs,  Up: i386-Dependent
+
+9.13.15 Notes
+-------------
+
+There is some trickery concerning the `mul' and `imul' instructions
+that deserves mention.  The 16-, 32-, 64- and 128-bit expanding
+multiplies (base opcode `0xf6'; extension 4 for `mul' and 5 for `imul')
+can be output only in the one operand form.  Thus, `imul %ebx, %eax'
+does _not_ select the expanding multiply; the expanding multiply would
+clobber the `%edx' register, and this would confuse `gcc' output.  Use
+`imul %ebx' to get the 64-bit product in `%edx:%eax'.
+
+   We have added a two operand form of `imul' when the first operand is
+an immediate mode expression and the second operand is a register.
+This is just a shorthand, so that, multiplying `%eax' by 69, for
+example, can be done with `imul $69, %eax' rather than `imul $69, %eax,
+%eax'.
+
+
+File: as.info,  Node: i860-Dependent,  Next: i960-Dependent,  Prev: i386-Dependent,  Up: Machine Dependencies
+
+9.14 Intel i860 Dependent Features
+==================================
+
+* Menu:
+
+* Notes-i860::                  i860 Notes
+* Options-i860::                i860 Command-line Options
+* Directives-i860::             i860 Machine Directives
+* Opcodes for i860::            i860 Opcodes
+
+
+File: as.info,  Node: Notes-i860,  Next: Options-i860,  Up: i860-Dependent
+
+9.14.1 i860 Notes
+-----------------
+
+This is a fairly complete i860 assembler which is compatible with the
+UNIX System V/860 Release 4 assembler. However, it does not currently
+support SVR4 PIC (i.e., `@GOT, @GOTOFF, @PLT').
+
+   Like the SVR4/860 assembler, the output object format is ELF32.
+Currently, this is the only supported object format. If there is
+sufficient interest, other formats such as COFF may be implemented.
+
+   Both the Intel and AT&T/SVR4 syntaxes are supported, with the latter
+being the default.  One difference is that AT&T syntax requires the '%'
+prefix on register names while Intel syntax does not.  Another
+difference is in the specification of relocatable expressions.  The
+Intel syntax is `ha%expression' whereas the SVR4 syntax is
+`[expression]@ha' (and similarly for the "l" and "h" selectors).
+
+
+File: as.info,  Node: Options-i860,  Next: Directives-i860,  Prev: Notes-i860,  Up: i860-Dependent
+
+9.14.2 i860 Command-line Options
+--------------------------------
+
+9.14.2.1 SVR4 compatibility options
+...................................
+
+`-V'
+     Print assembler version.
+
+`-Qy'
+     Ignored.
+
+`-Qn'
+     Ignored.
+
+9.14.2.2 Other options
+......................
+
+`-EL'
+     Select little endian output (this is the default).
+
+`-EB'
+     Select big endian output. Note that the i860 always reads
+     instructions as little endian data, so this option only effects
+     data and not instructions.
+
+`-mwarn-expand'
+     Emit a warning message if any pseudo-instruction expansions
+     occurred.  For example, a `or' instruction with an immediate
+     larger than 16-bits will be expanded into two instructions. This
+     is a very undesirable feature to rely on, so this flag can help
+     detect any code where it happens. One use of it, for instance, has
+     been to find and eliminate any place where `gcc' may emit these
+     pseudo-instructions.
+
+`-mxp'
+     Enable support for the i860XP instructions and control registers.
+     By default, this option is disabled so that only the base
+     instruction set (i.e., i860XR) is supported.
+
+`-mintel-syntax'
+     The i860 assembler defaults to AT&T/SVR4 syntax.  This option
+     enables the Intel syntax.
+
+
+File: as.info,  Node: Directives-i860,  Next: Opcodes for i860,  Prev: Options-i860,  Up: i860-Dependent
+
+9.14.3 i860 Machine Directives
+------------------------------
+
+`.dual'
+     Enter dual instruction mode. While this directive is supported, the
+     preferred way to use dual instruction mode is to explicitly code
+     the dual bit with the `d.' prefix.
+
+`.enddual'
+     Exit dual instruction mode. While this directive is supported, the
+     preferred way to use dual instruction mode is to explicitly code
+     the dual bit with the `d.' prefix.
+
+`.atmp'
+     Change the temporary register used when expanding pseudo
+     operations. The default register is `r31'.
+
+   The `.dual', `.enddual', and `.atmp' directives are available only
+in the Intel syntax mode.
+
+   Both syntaxes allow for the standard `.align' directive.  However,
+the Intel syntax additionally allows keywords for the alignment
+parameter: "`.align type'", where `type' is one of `.short', `.long',
+`.quad', `.single', `.double' representing alignments of 2, 4, 16, 4,
+and 8, respectively.
+
+
+File: as.info,  Node: Opcodes for i860,  Prev: Directives-i860,  Up: i860-Dependent
+
+9.14.4 i860 Opcodes
+-------------------
+
+All of the Intel i860XR and i860XP machine instructions are supported.
+Please see either _i860 Microprocessor Programmer's Reference Manual_
+or _i860 Microprocessor Architecture_ for more information.
+
+9.14.4.1 Other instruction support (pseudo-instructions)
+........................................................
+
+For compatibility with some other i860 assemblers, a number of
+pseudo-instructions are supported. While these are supported, they are
+a very undesirable feature that should be avoided - in particular, when
+they result in an expansion to multiple actual i860 instructions. Below
+are the pseudo-instructions that result in expansions.
+   * Load large immediate into general register:
+
+     The pseudo-instruction `mov imm,%rn' (where the immediate does not
+     fit within a signed 16-bit field) will be expanded into:
+          orh large_imm@h,%r0,%rn
+          or large_imm@l,%rn,%rn
+
+   * Load/store with relocatable address expression:
+
+     For example, the pseudo-instruction `ld.b addr_exp(%rx),%rn' will
+     be expanded into:
+          orh addr_exp@ha,%rx,%r31
+          ld.l addr_exp@l(%r31),%rn
+
+     The analogous expansions apply to `ld.x, st.x, fld.x, pfld.x,
+     fst.x', and `pst.x' as well.
+
+   * Signed large immediate with add/subtract:
+
+     If any of the arithmetic operations `adds, addu, subs, subu' are
+     used with an immediate larger than 16-bits (signed), then they
+     will be expanded.  For instance, the pseudo-instruction `adds
+     large_imm,%rx,%rn' expands to:
+          orh large_imm@h,%r0,%r31
+          or large_imm@l,%r31,%r31
+          adds %r31,%rx,%rn
+
+   * Unsigned large immediate with logical operations:
+
+     Logical operations (`or, andnot, or, xor') also result in
+     expansions.  The pseudo-instruction `or large_imm,%rx,%rn' results
+     in:
+          orh large_imm@h,%rx,%r31
+          or large_imm@l,%r31,%rn
+
+     Similarly for the others, except for `and' which expands to:
+          andnot (-1 - large_imm)@h,%rx,%r31
+          andnot (-1 - large_imm)@l,%r31,%rn
+
+
+File: as.info,  Node: i960-Dependent,  Next: IA-64-Dependent,  Prev: i860-Dependent,  Up: Machine Dependencies
+
+9.15 Intel 80960 Dependent Features
+===================================
+
+* Menu:
+
+* Options-i960::                i960 Command-line Options
+* Floating Point-i960::         Floating Point
+* Directives-i960::             i960 Machine Directives
+* Opcodes for i960::            i960 Opcodes
+
+
+File: as.info,  Node: Options-i960,  Next: Floating Point-i960,  Up: i960-Dependent
+
+9.15.1 i960 Command-line Options
+--------------------------------
+
+`-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC'
+     Select the 80960 architecture.  Instructions or features not
+     supported by the selected architecture cause fatal errors.
+
+     `-ACA' is equivalent to `-ACA_A'; `-AKC' is equivalent to `-AMC'.
+     Synonyms are provided for compatibility with other tools.
+
+     If you do not specify any of these options, `as' generates code
+     for any instruction or feature that is supported by _some_ version
+     of the 960 (even if this means mixing architectures!).  In
+     principle, `as' attempts to deduce the minimal sufficient
+     processor type if none is specified; depending on the object code
+     format, the processor type may be recorded in the object file.  If
+     it is critical that the `as' output match a specific architecture,
+     specify that architecture explicitly.
+
+`-b'
+     Add code to collect information about conditional branches taken,
+     for later optimization using branch prediction bits.  (The
+     conditional branch instructions have branch prediction bits in the
+     CA, CB, and CC architectures.)  If BR represents a conditional
+     branch instruction, the following represents the code generated by
+     the assembler when `-b' is specified:
+
+                  call    INCREMENT ROUTINE
+                  .word   0       # pre-counter
+          Label:  BR
+                  call    INCREMENT ROUTINE
+                  .word   0       # post-counter
+
+     The counter following a branch records the number of times that
+     branch was _not_ taken; the difference between the two counters is
+     the number of times the branch _was_ taken.
+
+     A table of every such `Label' is also generated, so that the
+     external postprocessor `gbr960' (supplied by Intel) can locate all
+     the counters.  This table is always labeled `__BRANCH_TABLE__';
+     this is a local symbol to permit collecting statistics for many
+     separate object files.  The table is word aligned, and begins with
+     a two-word header.  The first word, initialized to 0, is used in
+     maintaining linked lists of branch tables.  The second word is a
+     count of the number of entries in the table, which follow
+     immediately: each is a word, pointing to one of the labels
+     illustrated above.
+
+           +------------+------------+------------+ ... +------------+
+           |            |            |            |     |            |
+           |  *NEXT     |  COUNT: N  | *BRLAB 1   |     | *BRLAB N   |
+           |            |            |            |     |            |
+           +------------+------------+------------+ ... +------------+
+
+                         __BRANCH_TABLE__ layout
+
+     The first word of the header is used to locate multiple branch
+     tables, since each object file may contain one. Normally the links
+     are maintained with a call to an initialization routine, placed at
+     the beginning of each function in the file.  The GNU C compiler
+     generates these calls automatically when you give it a `-b' option.
+     For further details, see the documentation of `gbr960'.
+
+`-no-relax'
+     Normally, Compare-and-Branch instructions with targets that require
+     displacements greater than 13 bits (or that have external targets)
+     are replaced with the corresponding compare (or `chkbit') and
+     branch instructions.  You can use the `-no-relax' option to
+     specify that `as' should generate errors instead, if the target
+     displacement is larger than 13 bits.
+
+     This option does not affect the Compare-and-Jump instructions; the
+     code emitted for them is _always_ adjusted when necessary
+     (depending on displacement size), regardless of whether you use
+     `-no-relax'.
+
+
+File: as.info,  Node: Floating Point-i960,  Next: Directives-i960,  Prev: Options-i960,  Up: i960-Dependent
+
+9.15.2 Floating Point
+---------------------
+
+`as' generates IEEE floating-point numbers for the directives `.float',
+`.double', `.extended', and `.single'.
+
+
+File: as.info,  Node: Directives-i960,  Next: Opcodes for i960,  Prev: Floating Point-i960,  Up: i960-Dependent
+
+9.15.3 i960 Machine Directives
+------------------------------
+
+`.bss SYMBOL, LENGTH, ALIGN'
+     Reserve LENGTH bytes in the bss section for a local SYMBOL,
+     aligned to the power of two specified by ALIGN.  LENGTH and ALIGN
+     must be positive absolute expressions.  This directive differs
+     from `.lcomm' only in that it permits you to specify an alignment.
+     *Note `.lcomm': Lcomm.
+
+`.extended FLONUMS'
+     `.extended' expects zero or more flonums, separated by commas; for
+     each flonum, `.extended' emits an IEEE extended-format (80-bit)
+     floating-point number.
+
+`.leafproc CALL-LAB, BAL-LAB'
+     You can use the `.leafproc' directive in conjunction with the
+     optimized `callj' instruction to enable faster calls of leaf
+     procedures.  If a procedure is known to call no other procedures,
+     you may define an entry point that skips procedure prolog code
+     (and that does not depend on system-supplied saved context), and
+     declare it as the BAL-LAB using `.leafproc'.  If the procedure
+     also has an entry point that goes through the normal prolog, you
+     can specify that entry point as CALL-LAB.
+
+     A `.leafproc' declaration is meant for use in conjunction with the
+     optimized call instruction `callj'; the directive records the data
+     needed later to choose between converting the `callj' into a `bal'
+     or a `call'.
+
+     CALL-LAB is optional; if only one argument is present, or if the
+     two arguments are identical, the single argument is assumed to be
+     the `bal' entry point.
+
+`.sysproc NAME, INDEX'
+     The `.sysproc' directive defines a name for a system procedure.
+     After you define it using `.sysproc', you can use NAME to refer to
+     the system procedure identified by INDEX when calling procedures
+     with the optimized call instruction `callj'.
+
+     Both arguments are required; INDEX must be between 0 and 31
+     (inclusive).
+
+
+File: as.info,  Node: Opcodes for i960,  Prev: Directives-i960,  Up: i960-Dependent
+
+9.15.4 i960 Opcodes
+-------------------
+
+All Intel 960 machine instructions are supported; *note i960
+Command-line Options: Options-i960. for a discussion of selecting the
+instruction subset for a particular 960 architecture.
+
+   Some opcodes are processed beyond simply emitting a single
+corresponding instruction: `callj', and Compare-and-Branch or
+Compare-and-Jump instructions with target displacements larger than 13
+bits.
+
+* Menu:
+
+* callj-i960::                  `callj'
+* Compare-and-branch-i960::     Compare-and-Branch
+
+
+File: as.info,  Node: callj-i960,  Next: Compare-and-branch-i960,  Up: Opcodes for i960
+
+9.15.4.1 `callj'
+................
+
+You can write `callj' to have the assembler or the linker determine the
+most appropriate form of subroutine call: `call', `bal', or `calls'.
+If the assembly source contains enough information--a `.leafproc' or
+`.sysproc' directive defining the operand--then `as' translates the
+`callj'; if not, it simply emits the `callj', leaving it for the linker
+to resolve.
+
+
+File: as.info,  Node: Compare-and-branch-i960,  Prev: callj-i960,  Up: Opcodes for i960
+
+9.15.4.2 Compare-and-Branch
+...........................
+
+The 960 architectures provide combined Compare-and-Branch instructions
+that permit you to store the branch target in the lower 13 bits of the
+instruction word itself.  However, if you specify a branch target far
+enough away that its address won't fit in 13 bits, the assembler can
+either issue an error, or convert your Compare-and-Branch instruction
+into separate instructions to do the compare and the branch.
+
+   Whether `as' gives an error or expands the instruction depends on
+two choices you can make: whether you use the `-no-relax' option, and
+whether you use a "Compare and Branch" instruction or a "Compare and
+Jump" instruction.  The "Jump" instructions are _always_ expanded if
+necessary; the "Branch" instructions are expanded when necessary
+_unless_ you specify `-no-relax'--in which case `as' gives an error
+instead.
+
+   These are the Compare-and-Branch instructions, their "Jump" variants,
+and the instruction pairs they may expand into:
+
+             Compare and
+          Branch      Jump       Expanded to
+          ------    ------       ------------
+             bbc                 chkbit; bno
+             bbs                 chkbit; bo
+          cmpibe    cmpije       cmpi; be
+          cmpibg    cmpijg       cmpi; bg
+         cmpibge   cmpijge       cmpi; bge
+          cmpibl    cmpijl       cmpi; bl
+         cmpible   cmpijle       cmpi; ble
+         cmpibno   cmpijno       cmpi; bno
+         cmpibne   cmpijne       cmpi; bne
+          cmpibo    cmpijo       cmpi; bo
+          cmpobe    cmpoje       cmpo; be
+          cmpobg    cmpojg       cmpo; bg
+         cmpobge   cmpojge       cmpo; bge
+          cmpobl    cmpojl       cmpo; bl
+         cmpoble   cmpojle       cmpo; ble
+         cmpobne   cmpojne       cmpo; bne
+
+
+File: as.info,  Node: IA-64-Dependent,  Next: IP2K-Dependent,  Prev: i960-Dependent,  Up: Machine Dependencies
+
+9.16 IA-64 Dependent Features
+=============================
+
+* Menu:
+
+* IA-64 Options::              Options
+* IA-64 Syntax::               Syntax
+* IA-64 Opcodes::              Opcodes
+
+
+File: as.info,  Node: IA-64 Options,  Next: IA-64 Syntax,  Up: IA-64-Dependent
+
+9.16.1 Options
+--------------
+
+`-mconstant-gp'
+     This option instructs the assembler to mark the resulting object
+     file as using the "constant GP" model.  With this model, it is
+     assumed that the entire program uses a single global pointer (GP)
+     value.  Note that this option does not in any fashion affect the
+     machine code emitted by the assembler.  All it does is turn on the
+     EF_IA_64_CONS_GP flag in the ELF file header.
+
+`-mauto-pic'
+     This option instructs the assembler to mark the resulting object
+     file as using the "constant GP without function descriptor" data
+     model.  This model is like the "constant GP" model, except that it
+     additionally does away with function descriptors.  What this means
+     is that the address of a function refers directly to the
+     function's code entry-point.  Normally, such an address would
+     refer to a function descriptor, which contains both the code
+     entry-point and the GP-value needed by the function.  Note that
+     this option does not in any fashion affect the machine code
+     emitted by the assembler.  All it does is turn on the
+     EF_IA_64_NOFUNCDESC_CONS_GP flag in the ELF file header.
+
+`-milp32'
+
+`-milp64'
+
+`-mlp64'
+
+`-mp64'
+     These options select the data model.  The assembler defaults to
+     `-mlp64' (LP64 data model).
+
+`-mle'
+
+`-mbe'
+     These options select the byte order.  The `-mle' option selects
+     little-endian byte order (default) and `-mbe' selects big-endian
+     byte order.  Note that IA-64 machine code always uses
+     little-endian byte order.
+
+`-mtune=itanium1'
+
+`-mtune=itanium2'
+     Tune for a particular IA-64 CPU, ITANIUM1 or ITANIUM2. The default
+     is ITANIUM2.
+
+`-munwind-check=warning'
+
+`-munwind-check=error'
+     These options control what the assembler will do when performing
+     consistency checks on unwind directives.  `-munwind-check=warning'
+     will make the assembler issue a warning when an unwind directive
+     check fails.  This is the default.  `-munwind-check=error' will
+     make the assembler issue an error when an unwind directive check
+     fails.
+
+`-mhint.b=ok'
+
+`-mhint.b=warning'
+
+`-mhint.b=error'
+     These options control what the assembler will do when the `hint.b'
+     instruction is used.  `-mhint.b=ok' will make the assembler accept
+     `hint.b'.  `-mint.b=warning' will make the assembler issue a
+     warning when `hint.b' is used.  `-mhint.b=error' will make the
+     assembler treat `hint.b' as an error, which is the default.
+
+`-x'
+
+`-xexplicit'
+     These options turn on dependency violation checking.
+
+`-xauto'
+     This option instructs the assembler to automatically insert stop
+     bits where necessary to remove dependency violations.  This is the
+     default mode.
+
+`-xnone'
+     This option turns off dependency violation checking.
+
+`-xdebug'
+     This turns on debug output intended to help tracking down bugs in
+     the dependency violation checker.
+
+`-xdebugn'
+     This is a shortcut for -xnone -xdebug.
+
+`-xdebugx'
+     This is a shortcut for -xexplicit -xdebug.
+
+
+
+File: as.info,  Node: IA-64 Syntax,  Next: IA-64 Opcodes,  Prev: IA-64 Options,  Up: IA-64-Dependent
+
+9.16.2 Syntax
+-------------
+
+The assembler syntax closely follows the IA-64 Assembly Language
+Reference Guide.
+
+* Menu:
+
+* IA-64-Chars::                Special Characters
+* IA-64-Regs::                 Register Names
+* IA-64-Bits::                 Bit Names
+
+
+File: as.info,  Node: IA-64-Chars,  Next: IA-64-Regs,  Up: IA-64 Syntax
+
+9.16.2.1 Special Characters
+...........................
+
+`//' is the line comment token.
+
+   `;' can be used instead of a newline to separate statements.
+
+
+File: as.info,  Node: IA-64-Regs,  Next: IA-64-Bits,  Prev: IA-64-Chars,  Up: IA-64 Syntax
+
+9.16.2.2 Register Names
+.......................
+
+The 128 integer registers are referred to as `rN'.  The 128
+floating-point registers are referred to as `fN'.  The 128 application
+registers are referred to as `arN'.  The 128 control registers are
+referred to as `crN'.  The 64 one-bit predicate registers are referred
+to as `pN'.  The 8 branch registers are referred to as `bN'.  In
+addition, the assembler defines a number of aliases: `gp' (`r1'), `sp'
+(`r12'), `rp' (`b0'), `ret0' (`r8'), `ret1' (`r9'), `ret2' (`r10'),
+`ret3' (`r9'), `fargN' (`f8+N'), and `fretN' (`f8+N').
+
+   For convenience, the assembler also defines aliases for all named
+application and control registers.  For example, `ar.bsp' refers to the
+register backing store pointer (`ar17').  Similarly, `cr.eoi' refers to
+the end-of-interrupt register (`cr67').
+
+
+File: as.info,  Node: IA-64-Bits,  Prev: IA-64-Regs,  Up: IA-64 Syntax
+
+9.16.2.3 IA-64 Processor-Status-Register (PSR) Bit Names
+........................................................
+
+The assembler defines bit masks for each of the bits in the IA-64
+processor status register.  For example, `psr.ic' corresponds to a
+value of 0x2000.  These masks are primarily intended for use with the
+`ssm'/`sum' and `rsm'/`rum' instructions, but they can be used anywhere
+else where an integer constant is expected.
+
+
+File: as.info,  Node: IA-64 Opcodes,  Prev: IA-64 Syntax,  Up: IA-64-Dependent
+
+9.16.3 Opcodes
+--------------
+
+For detailed information on the IA-64 machine instruction set, see the
+IA-64 Architecture Handbook
+(http://developer.intel.com/design/itanium/arch_spec.htm).
+
+
+File: as.info,  Node: IP2K-Dependent,  Next: LM32-Dependent,  Prev: IA-64-Dependent,  Up: Machine Dependencies
+
+9.17 IP2K Dependent Features
+============================
+
+* Menu:
+
+* IP2K-Opts::                   IP2K Options
+
+
+File: as.info,  Node: IP2K-Opts,  Up: IP2K-Dependent
+
+9.17.1 IP2K Options
+-------------------
+
+The Ubicom IP2K version of `as' has a few machine dependent options:
+
+`-mip2022ext'
+     `as' can assemble the extended IP2022 instructions, but it will
+     only do so if this is specifically allowed via this command line
+     option.
+
+`-mip2022'
+     This option restores the assembler's default behaviour of not
+     permitting the extended IP2022 instructions to be assembled.
+
+
+
+File: as.info,  Node: LM32-Dependent,  Next: M32C-Dependent,  Prev: IP2K-Dependent,  Up: Machine Dependencies
+
+9.18 LM32 Dependent Features
+============================
+
+* Menu:
+
+* LM32 Options::              Options
+* LM32 Syntax::               Syntax
+* LM32 Opcodes::              Opcodes
+
+
+File: as.info,  Node: LM32 Options,  Next: LM32 Syntax,  Up: LM32-Dependent
+
+9.18.1 Options
+--------------
+
+`-mmultiply-enabled'
+     Enable multiply instructions.
+
+`-mdivide-enabled'
+     Enable divide instructions.
+
+`-mbarrel-shift-enabled'
+     Enable barrel-shift instructions.
+
+`-msign-extend-enabled'
+     Enable sign extend instructions.
+
+`-muser-enabled'
+     Enable user defined instructions.
+
+`-micache-enabled'
+     Enable instruction cache related CSRs.
+
+`-mdcache-enabled'
+     Enable data cache related CSRs.
+
+`-mbreak-enabled'
+     Enable break instructions.
+
+`-mall-enabled'
+     Enable all instructions and CSRs.
+
+
+
+File: as.info,  Node: LM32 Syntax,  Next: LM32 Opcodes,  Prev: LM32 Options,  Up: LM32-Dependent
+
+9.18.2 Syntax
+-------------
+
+* Menu:
+
+* LM32-Regs::                 Register Names
+* LM32-Modifiers::            Relocatable Expression Modifiers
+
+
+File: as.info,  Node: LM32-Regs,  Next: LM32-Modifiers,  Up: LM32 Syntax
+
+9.18.2.1 Register Names
+.......................
+
+LM32 has 32 x 32-bit general purpose registers `r0', `r1', ... `r31'.
+
+   The following aliases are defined: `gp' - `r26', `fp' - `r27', `sp'
+- `r28', `ra' - `r29', `ea' - `r30', `ba' - `r31'.
+
+   LM32 has the following Control and Status Registers (CSRs).
+
+`IE'
+     Interrupt enable.
+
+`IM'
+     Interrupt mask.
+
+`IP'
+     Interrupt pending.
+
+`ICC'
+     Instruction cache control.
+
+`DCC'
+     Data cache control.
+
+`CC'
+     Cycle counter.
+
+`CFG'
+     Configuration.
+
+`EBA'
+     Exception base address.
+
+`DC'
+     Debug control.
+
+`DEBA'
+     Debug exception base address.
+
+`JTX'
+     JTAG transmit.
+
+`JRX'
+     JTAG receive.
+
+`BP0'
+     Breakpoint 0.
+
+`BP1'
+     Breakpoint 1.
+
+`BP2'
+     Breakpoint 2.
+
+`BP3'
+     Breakpoint 3.
+
+`WP0'
+     Watchpoint 0.
+
+`WP1'
+     Watchpoint 1.
+
+`WP2'
+     Watchpoint 2.
+
+`WP3'
+     Watchpoint 3.
+
+
+File: as.info,  Node: LM32-Modifiers,  Prev: LM32-Regs,  Up: LM32 Syntax
+
+9.18.2.2 Relocatable Expression Modifiers
+.........................................
+
+The assembler supports several modifiers when using relocatable
+addresses in LM32 instruction operands.  The general syntax is the
+following:
+
+     modifier(relocatable-expression)
+
+`lo'
+     This modifier allows you to use bits 0 through 15 of an address
+     expression as 16 bit relocatable expression.
+
+`hi'
+     This modifier allows you to use bits 16 through 23 of an address
+     expression as 16 bit relocatable expression.
+
+     For example
+
+          ori  r4, r4, lo(sym+10)
+          orhi r4, r4, hi(sym+10)
+
+`gp'
+     This modified creates a 16-bit relocatable expression that is the
+     offset of the symbol from the global pointer.
+
+          mva r4, gp(sym)
+
+`got'
+     This modifier places a symbol in the GOT and creates a 16-bit
+     relocatable expression that is the offset into the GOT of this
+     symbol.
+
+          lw r4, (gp+got(sym))
+
+`gotofflo16'
+     This modifier allows you to use the bits 0 through 15 of an
+     address which is an offset from the GOT.
+
+`gotoffhi16'
+     This modifier allows you to use the bits 16 through 31 of an
+     address which is an offset from the GOT.
+
+          orhi r4, r4, gotoffhi16(lsym)
+          addi r4, r4, gotofflo16(lsym)
+
+
+
+File: as.info,  Node: LM32 Opcodes,  Prev: LM32 Syntax,  Up: LM32-Dependent
+
+9.18.3 Opcodes
+--------------
+
+For detailed information on the LM32 machine instruction set, see
+`http://www.latticesemi.com/products/intellectualproperty/ipcores/mico32/'.
+
+   `as' implements all the standard LM32 opcodes.
+
+
+File: as.info,  Node: M32C-Dependent,  Next: M32R-Dependent,  Prev: LM32-Dependent,  Up: Machine Dependencies
+
+9.19 M32C Dependent Features
+============================
+
+   `as' can assemble code for several different members of the Renesas
+M32C family.  Normally the default is to assemble code for the M16C
+microprocessor.  The `-m32c' option may be used to change the default
+to the M32C microprocessor.
+
+* Menu:
+
+* M32C-Opts::                   M32C Options
+* M32C-Modifiers::              Symbolic Operand Modifiers
+
+
+File: as.info,  Node: M32C-Opts,  Next: M32C-Modifiers,  Up: M32C-Dependent
+
+9.19.1 M32C Options
+-------------------
+
+The Renesas M32C version of `as' has these machine-dependent options:
+
+`-m32c'
+     Assemble M32C instructions.
+
+`-m16c'
+     Assemble M16C instructions (default).
+
+`-relax'
+     Enable support for link-time relaxations.
+
+`-h-tick-hex'
+     Support H'00 style hex constants in addition to 0x00 style.
+
+
+
+File: as.info,  Node: M32C-Modifiers,  Prev: M32C-Opts,  Up: M32C-Dependent
+
+9.19.2 Symbolic Operand Modifiers
+---------------------------------
+
+The assembler supports several modifiers when using symbol addresses in
+M32C instruction operands.  The general syntax is the following:
+
+     %modifier(symbol)
+
+`%dsp8'
+`%dsp16'
+     These modifiers override the assembler's assumptions about how big
+     a symbol's address is.  Normally, when it sees an operand like
+     `sym[a0]' it assumes `sym' may require the widest displacement
+     field (16 bits for `-m16c', 24 bits for `-m32c').  These modifiers
+     tell it to assume the address will fit in an 8 or 16 bit
+     (respectively) unsigned displacement.  Note that, of course, if it
+     doesn't actually fit you will get linker errors.  Example:
+
+          mov.w %dsp8(sym)[a0],r1
+          mov.b #0,%dsp8(sym)[a0]
+
+`%hi8'
+     This modifier allows you to load bits 16 through 23 of a 24 bit
+     address into an 8 bit register.  This is useful with, for example,
+     the M16C `smovf' instruction, which expects a 20 bit address in
+     `r1h' and `a0'.  Example:
+
+          mov.b #%hi8(sym),r1h
+          mov.w #%lo16(sym),a0
+          smovf.b
+
+`%lo16'
+     Likewise, this modifier allows you to load bits 0 through 15 of a
+     24 bit address into a 16 bit register.
+
+`%hi16'
+     This modifier allows you to load bits 16 through 31 of a 32 bit
+     address into a 16 bit register.  While the M32C family only has 24
+     bits of address space, it does support addresses in pairs of 16 bit
+     registers (like `a1a0' for the `lde' instruction).  This modifier
+     is for loading the upper half in such cases.  Example:
+
+          mov.w #%hi16(sym),a1
+          mov.w #%lo16(sym),a0
+          ...
+          lde.w [a1a0],r1
+
+
+
+File: as.info,  Node: M32R-Dependent,  Next: M68K-Dependent,  Prev: M32C-Dependent,  Up: Machine Dependencies
+
+9.20 M32R Dependent Features
+============================
+
+* Menu:
+
+* M32R-Opts::                   M32R Options
+* M32R-Directives::             M32R Directives
+* M32R-Warnings::               M32R Warnings
+
+
+File: as.info,  Node: M32R-Opts,  Next: M32R-Directives,  Up: M32R-Dependent
+
+9.20.1 M32R Options
+-------------------
+
+The Renease M32R version of `as' has a few machine dependent options:
+
+`-m32rx'
+     `as' can assemble code for several different members of the
+     Renesas M32R family.  Normally the default is to assemble code for
+     the M32R microprocessor.  This option may be used to change the
+     default to the M32RX microprocessor, which adds some more
+     instructions to the basic M32R instruction set, and some
+     additional parameters to some of the original instructions.
+
+`-m32r2'
+     This option changes the target processor to the the M32R2
+     microprocessor.
+
+`-m32r'
+     This option can be used to restore the assembler's default
+     behaviour of assembling for the M32R microprocessor.  This can be
+     useful if the default has been changed by a previous command line
+     option.
+
+`-little'
+     This option tells the assembler to produce little-endian code and
+     data.  The default is dependent upon how the toolchain was
+     configured.
+
+`-EL'
+     This is a synonym for _-little_.
+
+`-big'
+     This option tells the assembler to produce big-endian code and
+     data.
+
+`-EB'
+     This is a synonum for _-big_.
+
+`-KPIC'
+     This option specifies that the output of the assembler should be
+     marked as position-independent code (PIC).
+
+`-parallel'
+     This option tells the assembler to attempts to combine two
+     sequential instructions into a single, parallel instruction, where
+     it is legal to do so.
+
+`-no-parallel'
+     This option disables a previously enabled _-parallel_ option.
+
+`-no-bitinst'
+     This option disables the support for the extended bit-field
+     instructions provided by the M32R2.  If this support needs to be
+     re-enabled the _-bitinst_ switch can be used to restore it.
+
+`-O'
+     This option tells the assembler to attempt to optimize the
+     instructions that it produces.  This includes filling delay slots
+     and converting sequential instructions into parallel ones.  This
+     option implies _-parallel_.
+
+`-warn-explicit-parallel-conflicts'
+     Instructs `as' to produce warning messages when questionable
+     parallel instructions are encountered.  This option is enabled by
+     default, but `gcc' disables it when it invokes `as' directly.
+     Questionable instructions are those whose behaviour would be
+     different if they were executed sequentially.  For example the
+     code fragment `mv r1, r2 || mv r3, r1' produces a different result
+     from `mv r1, r2 \n mv r3, r1' since the former moves r1 into r3
+     and then r2 into r1, whereas the later moves r2 into r1 and r3.
+
+`-Wp'
+     This is a shorter synonym for the
+     _-warn-explicit-parallel-conflicts_ option.
+
+`-no-warn-explicit-parallel-conflicts'
+     Instructs `as' not to produce warning messages when questionable
+     parallel instructions are encountered.
+
+`-Wnp'
+     This is a shorter synonym for the
+     _-no-warn-explicit-parallel-conflicts_ option.
+
+`-ignore-parallel-conflicts'
+     This option tells the assembler's to stop checking parallel
+     instructions for constraint violations.  This ability is provided
+     for hardware vendors testing chip designs and should not be used
+     under normal circumstances.
+
+`-no-ignore-parallel-conflicts'
+     This option restores the assembler's default behaviour of checking
+     parallel instructions to detect constraint violations.
+
+`-Ip'
+     This is a shorter synonym for the _-ignore-parallel-conflicts_
+     option.
+
+`-nIp'
+     This is a shorter synonym for the _-no-ignore-parallel-conflicts_
+     option.
+
+`-warn-unmatched-high'
+     This option tells the assembler to produce a warning message if a
+     `.high' pseudo op is encountered without a matching `.low' pseudo
+     op.  The presence of such an unmatched pseudo op usually indicates
+     a programming error.
+
+`-no-warn-unmatched-high'
+     Disables a previously enabled _-warn-unmatched-high_ option.
+
+`-Wuh'
+     This is a shorter synonym for the _-warn-unmatched-high_ option.
+
+`-Wnuh'
+     This is a shorter synonym for the _-no-warn-unmatched-high_ option.
+
+
+
+File: as.info,  Node: M32R-Directives,  Next: M32R-Warnings,  Prev: M32R-Opts,  Up: M32R-Dependent
+
+9.20.2 M32R Directives
+----------------------
+
+The Renease M32R version of `as' has a few architecture specific
+directives:
+
+`low EXPRESSION'
+     The `low' directive computes the value of its expression and
+     places the lower 16-bits of the result into the immediate-field of
+     the instruction.  For example:
+
+             or3   r0, r0, #low(0x12345678) ; compute r0 = r0 | 0x5678
+             add3, r0, r0, #low(fred)   ; compute r0 = r0 + low 16-bits of address of fred
+
+`high EXPRESSION'
+     The `high' directive computes the value of its expression and
+     places the upper 16-bits of the result into the immediate-field of
+     the instruction.  For example:
+
+             seth  r0, #high(0x12345678) ; compute r0 = 0x12340000
+             seth, r0, #high(fred)       ; compute r0 = upper 16-bits of address of fred
+
+`shigh EXPRESSION'
+     The `shigh' directive is very similar to the `high' directive.  It
+     also computes the value of its expression and places the upper
+     16-bits of the result into the immediate-field of the instruction.
+     The difference is that `shigh' also checks to see if the lower
+     16-bits could be interpreted as a signed number, and if so it
+     assumes that a borrow will occur from the upper-16 bits.  To
+     compensate for this the `shigh' directive pre-biases the upper 16
+     bit value by adding one to it.  For example:
+
+     For example:
+
+             seth  r0, #shigh(0x12345678) ; compute r0 = 0x12340000
+             seth  r0, #shigh(0x00008000) ; compute r0 = 0x00010000
+
+     In the second example the lower 16-bits are 0x8000.  If these are
+     treated as a signed value and sign extended to 32-bits then the
+     value becomes 0xffff8000.  If this value is then added to
+     0x00010000 then the result is 0x00008000.
+
+     This behaviour is to allow for the different semantics of the
+     `or3' and `add3' instructions.  The `or3' instruction treats its
+     16-bit immediate argument as unsigned whereas the `add3' treats
+     its 16-bit immediate as a signed value.  So for example:
+
+             seth  r0, #shigh(0x00008000)
+             add3  r0, r0, #low(0x00008000)
+
+     Produces the correct result in r0, whereas:
+
+             seth  r0, #shigh(0x00008000)
+             or3   r0, r0, #low(0x00008000)
+
+     Stores 0xffff8000 into r0.
+
+     Note - the `shigh' directive does not know where in the assembly
+     source code the lower 16-bits of the value are going set, so it
+     cannot check to make sure that an `or3' instruction is being used
+     rather than an `add3' instruction.  It is up to the programmer to
+     make sure that correct directives are used.
+
+`.m32r'
+     The directive performs a similar thing as the _-m32r_ command line
+     option.  It tells the assembler to only accept M32R instructions
+     from now on.  An instructions from later M32R architectures are
+     refused.
+
+`.m32rx'
+     The directive performs a similar thing as the _-m32rx_ command
+     line option.  It tells the assembler to start accepting the extra
+     instructions in the M32RX ISA as well as the ordinary M32R ISA.
+
+`.m32r2'
+     The directive performs a similar thing as the _-m32r2_ command
+     line option.  It tells the assembler to start accepting the extra
+     instructions in the M32R2 ISA as well as the ordinary M32R ISA.
+
+`.little'
+     The directive performs a similar thing as the _-little_ command
+     line option.  It tells the assembler to start producing
+     little-endian code and data.  This option should be used with care
+     as producing mixed-endian binary files is fraught with danger.
+
+`.big'
+     The directive performs a similar thing as the _-big_ command line
+     option.  It tells the assembler to start producing big-endian code
+     and data.  This option should be used with care as producing
+     mixed-endian binary files is fraught with danger.
+
+
+
+File: as.info,  Node: M32R-Warnings,  Prev: M32R-Directives,  Up: M32R-Dependent
+
+9.20.3 M32R Warnings
+--------------------
+
+There are several warning and error messages that can be produced by
+`as' which are specific to the M32R:
+
+`output of 1st instruction is the same as an input to 2nd instruction - is this intentional ?'
+     This message is only produced if warnings for explicit parallel
+     conflicts have been enabled.  It indicates that the assembler has
+     encountered a parallel instruction in which the destination
+     register of the left hand instruction is used as an input register
+     in the right hand instruction.  For example in this code fragment
+     `mv r1, r2 || neg r3, r1' register r1 is the destination of the
+     move instruction and the input to the neg instruction.
+
+`output of 2nd instruction is the same as an input to 1st instruction - is this intentional ?'
+     This message is only produced if warnings for explicit parallel
+     conflicts have been enabled.  It indicates that the assembler has
+     encountered a parallel instruction in which the destination
+     register of the right hand instruction is used as an input
+     register in the left hand instruction.  For example in this code
+     fragment `mv r1, r2 || neg r2, r3' register r2 is the destination
+     of the neg instruction and the input to the move instruction.
+
+`instruction `...' is for the M32RX only'
+     This message is produced when the assembler encounters an
+     instruction which is only supported by the M32Rx processor, and
+     the `-m32rx' command line flag has not been specified to allow
+     assembly of such instructions.
+
+`unknown instruction `...''
+     This message is produced when the assembler encounters an
+     instruction which it does not recognize.
+
+`only the NOP instruction can be issued in parallel on the m32r'
+     This message is produced when the assembler encounters a parallel
+     instruction which does not involve a NOP instruction and the
+     `-m32rx' command line flag has not been specified.  Only the M32Rx
+     processor is able to execute two instructions in parallel.
+
+`instruction `...' cannot be executed in parallel.'
+     This message is produced when the assembler encounters a parallel
+     instruction which is made up of one or two instructions which
+     cannot be executed in parallel.
+
+`Instructions share the same execution pipeline'
+     This message is produced when the assembler encounters a parallel
+     instruction whoes components both use the same execution pipeline.
+
+`Instructions write to the same destination register.'
+     This message is produced when the assembler encounters a parallel
+     instruction where both components attempt to modify the same
+     register.  For example these code fragments will produce this
+     message: `mv r1, r2 || neg r1, r3' `jl r0 || mv r14, r1' `st r2,
+     @-r1 || mv r1, r3' `mv r1, r2 || ld r0, @r1+' `cmp r1, r2 || addx
+     r3, r4' (Both write to the condition bit)
+
+
+
+File: as.info,  Node: M68K-Dependent,  Next: M68HC11-Dependent,  Prev: M32R-Dependent,  Up: Machine Dependencies
+
+9.21 M680x0 Dependent Features
+==============================
+
+* Menu:
+
+* M68K-Opts::                   M680x0 Options
+* M68K-Syntax::                 Syntax
+* M68K-Moto-Syntax::            Motorola Syntax
+* M68K-Float::                  Floating Point
+* M68K-Directives::             680x0 Machine Directives
+* M68K-opcodes::                Opcodes
+
+
+File: as.info,  Node: M68K-Opts,  Next: M68K-Syntax,  Up: M68K-Dependent
+
+9.21.1 M680x0 Options
+---------------------
+
+The Motorola 680x0 version of `as' has a few machine dependent options:
+
+`-march=ARCHITECTURE'
+     This option specifies a target architecture.  The following
+     architectures are recognized: `68000', `68010', `68020', `68030',
+     `68040', `68060', `cpu32', `isaa', `isaaplus', `isab', `isac' and
+     `cfv4e'.
+
+`-mcpu=CPU'
+     This option specifies a target cpu.  When used in conjunction with
+     the `-march' option, the cpu must be within the specified
+     architecture.  Also, the generic features of the architecture are
+     used for instruction generation, rather than those of the specific
+     chip.
+
+`-m[no-]68851'
+
+`-m[no-]68881'
+
+`-m[no-]div'
+
+`-m[no-]usp'
+
+`-m[no-]float'
+
+`-m[no-]mac'
+
+`-m[no-]emac'
+     Enable or disable various architecture specific features.  If a
+     chip or architecture by default supports an option (for instance
+     `-march=isaaplus' includes the `-mdiv' option), explicitly
+     disabling the option will override the default.
+
+`-l'
+     You can use the `-l' option to shorten the size of references to
+     undefined symbols.  If you do not use the `-l' option, references
+     to undefined symbols are wide enough for a full `long' (32 bits).
+     (Since `as' cannot know where these symbols end up, `as' can only
+     allocate space for the linker to fill in later.  Since `as' does
+     not know how far away these symbols are, it allocates as much
+     space as it can.)  If you use this option, the references are only
+     one word wide (16 bits).  This may be useful if you want the
+     object file to be as small as possible, and you know that the
+     relevant symbols are always less than 17 bits away.
+
+`--register-prefix-optional'
+     For some configurations, especially those where the compiler
+     normally does not prepend an underscore to the names of user
+     variables, the assembler requires a `%' before any use of a
+     register name.  This is intended to let the assembler distinguish
+     between C variables and functions named `a0' through `a7', and so
+     on.  The `%' is always accepted, but is not required for certain
+     configurations, notably `sun3'.  The `--register-prefix-optional'
+     option may be used to permit omitting the `%' even for
+     configurations for which it is normally required.  If this is
+     done, it will generally be impossible to refer to C variables and
+     functions with the same names as register names.
+
+`--bitwise-or'
+     Normally the character `|' is treated as a comment character, which
+     means that it can not be used in expressions.  The `--bitwise-or'
+     option turns `|' into a normal character.  In this mode, you must
+     either use C style comments, or start comments with a `#' character
+     at the beginning of a line.
+
+`--base-size-default-16  --base-size-default-32'
+     If you use an addressing mode with a base register without
+     specifying the size, `as' will normally use the full 32 bit value.
+     For example, the addressing mode `%a0@(%d0)' is equivalent to
+     `%a0@(%d0:l)'.  You may use the `--base-size-default-16' option to
+     tell `as' to default to using the 16 bit value.  In this case,
+     `%a0@(%d0)' is equivalent to `%a0@(%d0:w)'.  You may use the
+     `--base-size-default-32' option to restore the default behaviour.
+
+`--disp-size-default-16  --disp-size-default-32'
+     If you use an addressing mode with a displacement, and the value
+     of the displacement is not known, `as' will normally assume that
+     the value is 32 bits.  For example, if the symbol `disp' has not
+     been defined, `as' will assemble the addressing mode
+     `%a0@(disp,%d0)' as though `disp' is a 32 bit value.  You may use
+     the `--disp-size-default-16' option to tell `as' to instead assume
+     that the displacement is 16 bits.  In this case, `as' will
+     assemble `%a0@(disp,%d0)' as though `disp' is a 16 bit value.  You
+     may use the `--disp-size-default-32' option to restore the default
+     behaviour.
+
+`--pcrel'
+     Always keep branches PC-relative.  In the M680x0 architecture all
+     branches are defined as PC-relative.  However, on some processors
+     they are limited to word displacements maximum.  When `as' needs a
+     long branch that is not available, it normally emits an absolute
+     jump instead.  This option disables this substitution.  When this
+     option is given and no long branches are available, only word
+     branches will be emitted.  An error message will be generated if a
+     word branch cannot reach its target.  This option has no effect on
+     68020 and other processors that have long branches.  *note Branch
+     Improvement: M68K-Branch.
+
+`-m68000'
+     `as' can assemble code for several different members of the
+     Motorola 680x0 family.  The default depends upon how `as' was
+     configured when it was built; normally, the default is to assemble
+     code for the 68020 microprocessor.  The following options may be
+     used to change the default.  These options control which
+     instructions and addressing modes are permitted.  The members of
+     the 680x0 family are very similar.  For detailed information about
+     the differences, see the Motorola manuals.
+
+    `-m68000'
+    `-m68ec000'
+    `-m68hc000'
+    `-m68hc001'
+    `-m68008'
+    `-m68302'
+    `-m68306'
+    `-m68307'
+    `-m68322'
+    `-m68356'
+          Assemble for the 68000. `-m68008', `-m68302', and so on are
+          synonyms for `-m68000', since the chips are the same from the
+          point of view of the assembler.
+
+    `-m68010'
+          Assemble for the 68010.
+
+    `-m68020'
+    `-m68ec020'
+          Assemble for the 68020.  This is normally the default.
+
+    `-m68030'
+    `-m68ec030'
+          Assemble for the 68030.
+
+    `-m68040'
+    `-m68ec040'
+          Assemble for the 68040.
+
+    `-m68060'
+    `-m68ec060'
+          Assemble for the 68060.
+
+    `-mcpu32'
+    `-m68330'
+    `-m68331'
+    `-m68332'
+    `-m68333'
+    `-m68334'
+    `-m68336'
+    `-m68340'
+    `-m68341'
+    `-m68349'
+    `-m68360'
+          Assemble for the CPU32 family of chips.
+
+    `-m5200'
+
+    `-m5202'
+
+    `-m5204'
+
+    `-m5206'
+
+    `-m5206e'
+
+    `-m521x'
+
+    `-m5249'
+
+    `-m528x'
+
+    `-m5307'
+
+    `-m5407'
+
+    `-m547x'
+
+    `-m548x'
+
+    `-mcfv4'
+
+    `-mcfv4e'
+          Assemble for the ColdFire family of chips.
+
+    `-m68881'
+    `-m68882'
+          Assemble 68881 floating point instructions.  This is the
+          default for the 68020, 68030, and the CPU32.  The 68040 and
+          68060 always support floating point instructions.
+
+    `-mno-68881'
+          Do not assemble 68881 floating point instructions.  This is
+          the default for 68000 and the 68010.  The 68040 and 68060
+          always support floating point instructions, even if this
+          option is used.
+
+    `-m68851'
+          Assemble 68851 MMU instructions.  This is the default for the
+          68020, 68030, and 68060.  The 68040 accepts a somewhat
+          different set of MMU instructions; `-m68851' and `-m68040'
+          should not be used together.
+
+    `-mno-68851'
+          Do not assemble 68851 MMU instructions.  This is the default
+          for the 68000, 68010, and the CPU32.  The 68040 accepts a
+          somewhat different set of MMU instructions.
+
+
+File: as.info,  Node: M68K-Syntax,  Next: M68K-Moto-Syntax,  Prev: M68K-Opts,  Up: M68K-Dependent
+
+9.21.2 Syntax
+-------------
+
+This syntax for the Motorola 680x0 was developed at MIT.
+
+   The 680x0 version of `as' uses instructions names and syntax
+compatible with the Sun assembler.  Intervening periods are ignored;
+for example, `movl' is equivalent to `mov.l'.
+
+   In the following table APC stands for any of the address registers
+(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
+relative to the program counter (`%zpc'), a suppressed address register
+(`%za0' through `%za7'), or it may be omitted entirely.  The use of
+SIZE means one of `w' or `l', and it may be omitted, along with the
+leading colon, unless a scale is also specified.  The use of SCALE
+means one of `1', `2', `4', or `8', and it may always be omitted along
+with the leading colon.
+
+   The following addressing modes are understood:
+"Immediate"
+     `#NUMBER'
+
+"Data Register"
+     `%d0' through `%d7'
+
+"Address Register"
+     `%a0' through `%a7'
+     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
+     also known as `%fp', the Frame Pointer.
+
+"Address Register Indirect"
+     `%a0@' through `%a7@'
+
+"Address Register Postincrement"
+     `%a0@+' through `%a7@+'
+
+"Address Register Predecrement"
+     `%a0@-' through `%a7@-'
+
+"Indirect Plus Offset"
+     `APC@(NUMBER)'
+
+"Index"
+     `APC@(NUMBER,REGISTER:SIZE:SCALE)'
+
+     The NUMBER may be omitted.
+
+"Postindex"
+     `APC@(NUMBER)@(ONUMBER,REGISTER:SIZE:SCALE)'
+
+     The ONUMBER or the REGISTER, but not both, may be omitted.
+
+"Preindex"
+     `APC@(NUMBER,REGISTER:SIZE:SCALE)@(ONUMBER)'
+
+     The NUMBER may be omitted.  Omitting the REGISTER produces the
+     Postindex addressing mode.
+
+"Absolute"
+     `SYMBOL', or `DIGITS', optionally followed by `:b', `:w', or `:l'.
+
+
+File: as.info,  Node: M68K-Moto-Syntax,  Next: M68K-Float,  Prev: M68K-Syntax,  Up: M68K-Dependent
+
+9.21.3 Motorola Syntax
+----------------------
+
+The standard Motorola syntax for this chip differs from the syntax
+already discussed (*note Syntax: M68K-Syntax.).  `as' can accept
+Motorola syntax for operands, even if MIT syntax is used for other
+operands in the same instruction.  The two kinds of syntax are fully
+compatible.
+
+   In the following table APC stands for any of the address registers
+(`%a0' through `%a7'), the program counter (`%pc'), the zero-address
+relative to the program counter (`%zpc'), or a suppressed address
+register (`%za0' through `%za7').  The use of SIZE means one of `w' or
+`l', and it may always be omitted along with the leading dot.  The use
+of SCALE means one of `1', `2', `4', or `8', and it may always be
+omitted along with the leading asterisk.
+
+   The following additional addressing modes are understood:
+
+"Address Register Indirect"
+     `(%a0)' through `(%a7)'
+     `%a7' is also known as `%sp', i.e., the Stack Pointer.  `%a6' is
+     also known as `%fp', the Frame Pointer.
+
+"Address Register Postincrement"
+     `(%a0)+' through `(%a7)+'
+
+"Address Register Predecrement"
+     `-(%a0)' through `-(%a7)'
+
+"Indirect Plus Offset"
+     `NUMBER(%A0)' through `NUMBER(%A7)', or `NUMBER(%PC)'.
+
+     The NUMBER may also appear within the parentheses, as in
+     `(NUMBER,%A0)'.  When used with the PC, the NUMBER may be omitted
+     (with an address register, omitting the NUMBER produces Address
+     Register Indirect mode).
+
+"Index"
+     `NUMBER(APC,REGISTER.SIZE*SCALE)'
+
+     The NUMBER may be omitted, or it may appear within the
+     parentheses.  The APC may be omitted.  The REGISTER and the APC
+     may appear in either order.  If both APC and REGISTER are address
+     registers, and the SIZE and SCALE are omitted, then the first
+     register is taken as the base register, and the second as the
+     index register.
+
+"Postindex"
+     `([NUMBER,APC],REGISTER.SIZE*SCALE,ONUMBER)'
+
+     The ONUMBER, or the REGISTER, or both, may be omitted.  Either the
+     NUMBER or the APC may be omitted, but not both.
+
+"Preindex"
+     `([NUMBER,APC,REGISTER.SIZE*SCALE],ONUMBER)'
+
+     The NUMBER, or the APC, or the REGISTER, or any two of them, may
+     be omitted.  The ONUMBER may be omitted.  The REGISTER and the APC
+     may appear in either order.  If both APC and REGISTER are address
+     registers, and the SIZE and SCALE are omitted, then the first
+     register is taken as the base register, and the second as the
+     index register.
+
+
+File: as.info,  Node: M68K-Float,  Next: M68K-Directives,  Prev: M68K-Moto-Syntax,  Up: M68K-Dependent
+
+9.21.4 Floating Point
+---------------------
+
+Packed decimal (P) format floating literals are not supported.  Feel
+free to add the code!
+
+   The floating point formats generated by directives are these.
+
+`.float'
+     `Single' precision floating point constants.
+
+`.double'
+     `Double' precision floating point constants.
+
+`.extend'
+`.ldouble'
+     `Extended' precision (`long double') floating point constants.
+
+
+File: as.info,  Node: M68K-Directives,  Next: M68K-opcodes,  Prev: M68K-Float,  Up: M68K-Dependent
+
+9.21.5 680x0 Machine Directives
+-------------------------------
+
+In order to be compatible with the Sun assembler the 680x0 assembler
+understands the following directives.
+
+`.data1'
+     This directive is identical to a `.data 1' directive.
+
+`.data2'
+     This directive is identical to a `.data 2' directive.
+
+`.even'
+     This directive is a special case of the `.align' directive; it
+     aligns the output to an even byte boundary.
+
+`.skip'
+     This directive is identical to a `.space' directive.
+
+`.arch NAME'
+     Select the target architecture and extension features.  Valid
+     values for NAME are the same as for the `-march' command line
+     option.  This directive cannot be specified after any instructions
+     have been assembled.  If it is given multiple times, or in
+     conjunction with the `-march' option, all uses must be for the
+     same architecture and extension set.
+
+`.cpu NAME'
+     Select the target cpu.  Valid valuse for NAME are the same as for
+     the `-mcpu' command line option.  This directive cannot be
+     specified after any instructions have been assembled.  If it is
+     given multiple times, or in conjunction with the `-mopt' option,
+     all uses must be for the same cpu.
+
+
+
+File: as.info,  Node: M68K-opcodes,  Prev: M68K-Directives,  Up: M68K-Dependent
+
+9.21.6 Opcodes
+--------------
+
+* Menu:
+
+* M68K-Branch::                 Branch Improvement
+* M68K-Chars::                  Special Characters
+
+
+File: as.info,  Node: M68K-Branch,  Next: M68K-Chars,  Up: M68K-opcodes
+
+9.21.6.1 Branch Improvement
+...........................
+
+Certain pseudo opcodes are permitted for branch instructions.  They
+expand to the shortest branch instruction that reach the target.
+Generally these mnemonics are made by substituting `j' for `b' at the
+start of a Motorola mnemonic.
+
+   The following table summarizes the pseudo-operations.  A `*' flags
+cases that are more fully described after the table:
+
+               Displacement
+               +------------------------------------------------------------
+               |                68020           68000/10, not PC-relative OK
+     Pseudo-Op |BYTE    WORD    LONG            ABSOLUTE LONG JUMP    **
+               +------------------------------------------------------------
+          jbsr |bsrs    bsrw    bsrl            jsr
+           jra |bras    braw    bral            jmp
+     *     jXX |bXXs    bXXw    bXXl            bNXs;jmp
+     *    dbXX | N/A    dbXXw   dbXX;bras;bral  dbXX;bras;jmp
+          fjXX | N/A    fbXXw   fbXXl            N/A
+
+     XX: condition
+     NX: negative of condition XX
+                       `*'--see full description below
+         `**'--this expansion mode is disallowed by `--pcrel'
+
+`jbsr'
+`jra'
+     These are the simplest jump pseudo-operations; they always map to
+     one particular machine instruction, depending on the displacement
+     to the branch target.  This instruction will be a byte or word
+     branch is that is sufficient.  Otherwise, a long branch will be
+     emitted if available.  If no long branches are available and the
+     `--pcrel' option is not given, an absolute long jump will be
+     emitted instead.  If no long branches are available, the `--pcrel'
+     option is given, and a word branch cannot reach the target, an
+     error message is generated.
+
+     In addition to standard branch operands, `as' allows these
+     pseudo-operations to have all operands that are allowed for jsr
+     and jmp, substituting these instructions if the operand given is
+     not valid for a branch instruction.
+
+`jXX'
+     Here, `jXX' stands for an entire family of pseudo-operations,
+     where XX is a conditional branch or condition-code test.  The full
+     list of pseudo-ops in this family is:
+           jhi   jls   jcc   jcs   jne   jeq   jvc
+           jvs   jpl   jmi   jge   jlt   jgt   jle
+
+     Usually, each of these pseudo-operations expands to a single branch
+     instruction.  However, if a word branch is not sufficient, no long
+     branches are available, and the `--pcrel' option is not given, `as'
+     issues a longer code fragment in terms of NX, the opposite
+     condition to XX.  For example, under these conditions:
+              jXX foo
+     gives
+               bNXs oof
+               jmp foo
+           oof:
+
+`dbXX'
+     The full family of pseudo-operations covered here is
+           dbhi   dbls   dbcc   dbcs   dbne   dbeq   dbvc
+           dbvs   dbpl   dbmi   dbge   dblt   dbgt   dble
+           dbf    dbra   dbt
+
+     Motorola `dbXX' instructions allow word displacements only.  When
+     a word displacement is sufficient, each of these pseudo-operations
+     expands to the corresponding Motorola instruction.  When a word
+     displacement is not sufficient and long branches are available,
+     when the source reads `dbXX foo', `as' emits
+               dbXX oo1
+               bras oo2
+           oo1:bral foo
+           oo2:
+
+     If, however, long branches are not available and the `--pcrel'
+     option is not given, `as' emits
+               dbXX oo1
+               bras oo2
+           oo1:jmp foo
+           oo2:
+
+`fjXX'
+     This family includes
+           fjne   fjeq   fjge   fjlt   fjgt   fjle   fjf
+           fjt    fjgl   fjgle  fjnge  fjngl  fjngle fjngt
+           fjnle  fjnlt  fjoge  fjogl  fjogt  fjole  fjolt
+           fjor   fjseq  fjsf   fjsne  fjst   fjueq  fjuge
+           fjugt  fjule  fjult  fjun
+
+     Each of these pseudo-operations always expands to a single Motorola
+     coprocessor branch instruction, word or long.  All Motorola
+     coprocessor branch instructions allow both word and long
+     displacements.
+
+
+
+File: as.info,  Node: M68K-Chars,  Prev: M68K-Branch,  Up: M68K-opcodes
+
+9.21.6.2 Special Characters
+...........................
+
+The immediate character is `#' for Sun compatibility.  The line-comment
+character is `|' (unless the `--bitwise-or' option is used).  If a `#'
+appears at the beginning of a line, it is treated as a comment unless
+it looks like `# line file', in which case it is treated normally.
+
+
+File: as.info,  Node: M68HC11-Dependent,  Next: MicroBlaze-Dependent,  Prev: M68K-Dependent,  Up: Machine Dependencies
+
+9.22 M68HC11 and M68HC12 Dependent Features
+===========================================
+
+* Menu:
+
+* M68HC11-Opts::                   M68HC11 and M68HC12 Options
+* M68HC11-Syntax::                 Syntax
+* M68HC11-Modifiers::              Symbolic Operand Modifiers
+* M68HC11-Directives::             Assembler Directives
+* M68HC11-Float::                  Floating Point
+* M68HC11-opcodes::                Opcodes
+
+
+File: as.info,  Node: M68HC11-Opts,  Next: M68HC11-Syntax,  Up: M68HC11-Dependent
+
+9.22.1 M68HC11 and M68HC12 Options
+----------------------------------
+
+The Motorola 68HC11 and 68HC12 version of `as' have a few machine
+dependent options.
+
+`-m68hc11'
+     This option switches the assembler in the M68HC11 mode. In this
+     mode, the assembler only accepts 68HC11 operands and mnemonics. It
+     produces code for the 68HC11.
+
+`-m68hc12'
+     This option switches the assembler in the M68HC12 mode. In this
+     mode, the assembler also accepts 68HC12 operands and mnemonics. It
+     produces code for the 68HC12. A few 68HC11 instructions are
+     replaced by some 68HC12 instructions as recommended by Motorola
+     specifications.
+
+`-m68hcs12'
+     This option switches the assembler in the M68HCS12 mode.  This
+     mode is similar to `-m68hc12' but specifies to assemble for the
+     68HCS12 series.  The only difference is on the assembling of the
+     `movb' and `movw' instruction when a PC-relative operand is used.
+
+`-mshort'
+     This option controls the ABI and indicates to use a 16-bit integer
+     ABI.  It has no effect on the assembled instructions.  This is the
+     default.
+
+`-mlong'
+     This option controls the ABI and indicates to use a 32-bit integer
+     ABI.
+
+`-mshort-double'
+     This option controls the ABI and indicates to use a 32-bit float
+     ABI.  This is the default.
+
+`-mlong-double'
+     This option controls the ABI and indicates to use a 64-bit float
+     ABI.
+
+`--strict-direct-mode'
+     You can use the `--strict-direct-mode' option to disable the
+     automatic translation of direct page mode addressing into extended
+     mode when the instruction does not support direct mode.  For
+     example, the `clr' instruction does not support direct page mode
+     addressing. When it is used with the direct page mode, `as' will
+     ignore it and generate an absolute addressing.  This option
+     prevents `as' from doing this, and the wrong usage of the direct
+     page mode will raise an error.
+
+`--short-branches'
+     The `--short-branches' option turns off the translation of
+     relative branches into absolute branches when the branch offset is
+     out of range. By default `as' transforms the relative branch
+     (`bsr', `bgt', `bge', `beq', `bne', `ble', `blt', `bhi', `bcc',
+     `bls', `bcs', `bmi', `bvs', `bvs', `bra') into an absolute branch
+     when the offset is out of the -128 .. 127 range.  In that case,
+     the `bsr' instruction is translated into a `jsr', the `bra'
+     instruction is translated into a `jmp' and the conditional
+     branches instructions are inverted and followed by a `jmp'. This
+     option disables these translations and `as' will generate an error
+     if a relative branch is out of range. This option does not affect
+     the optimization associated to the `jbra', `jbsr' and `jbXX'
+     pseudo opcodes.
+
+`--force-long-branches'
+     The `--force-long-branches' option forces the translation of
+     relative branches into absolute branches. This option does not
+     affect the optimization associated to the `jbra', `jbsr' and
+     `jbXX' pseudo opcodes.
+
+`--print-insn-syntax'
+     You can use the `--print-insn-syntax' option to obtain the syntax
+     description of the instruction when an error is detected.
+
+`--print-opcodes'
+     The `--print-opcodes' option prints the list of all the
+     instructions with their syntax. The first item of each line
+     represents the instruction name and the rest of the line indicates
+     the possible operands for that instruction. The list is printed in
+     alphabetical order. Once the list is printed `as' exits.
+
+`--generate-example'
+     The `--generate-example' option is similar to `--print-opcodes'
+     but it generates an example for each instruction instead.
+
+
+File: as.info,  Node: M68HC11-Syntax,  Next: M68HC11-Modifiers,  Prev: M68HC11-Opts,  Up: M68HC11-Dependent
+
+9.22.2 Syntax
+-------------
+
+In the M68HC11 syntax, the instruction name comes first and it may be
+followed by one or several operands (up to three). Operands are
+separated by comma (`,'). In the normal mode, `as' will complain if too
+many operands are specified for a given instruction. In the MRI mode
+(turned on with `-M' option), it will treat them as comments. Example:
+
+     inx
+     lda  #23
+     bset 2,x #4
+     brclr *bot #8 foo
+
+   The following addressing modes are understood for 68HC11 and 68HC12:
+"Immediate"
+     `#NUMBER'
+
+"Address Register"
+     `NUMBER,X', `NUMBER,Y'
+
+     The NUMBER may be omitted in which case 0 is assumed.
+
+"Direct Addressing mode"
+     `*SYMBOL', or `*DIGITS'
+
+"Absolute"
+     `SYMBOL', or `DIGITS'
+
+   The M68HC12 has other more complex addressing modes. All of them are
+supported and they are represented below:
+
+"Constant Offset Indexed Addressing Mode"
+     `NUMBER,REG'
+
+     The NUMBER may be omitted in which case 0 is assumed.  The
+     register can be either `X', `Y', `SP' or `PC'.  The assembler will
+     use the smaller post-byte definition according to the constant
+     value (5-bit constant offset, 9-bit constant offset or 16-bit
+     constant offset).  If the constant is not known by the assembler
+     it will use the 16-bit constant offset post-byte and the value
+     will be resolved at link time.
+
+"Offset Indexed Indirect"
+     `[NUMBER,REG]'
+
+     The register can be either `X', `Y', `SP' or `PC'.
+
+"Auto Pre-Increment/Pre-Decrement/Post-Increment/Post-Decrement"
+     `NUMBER,-REG' `NUMBER,+REG' `NUMBER,REG-' `NUMBER,REG+'
+
+     The number must be in the range `-8'..`+8' and must not be 0.  The
+     register can be either `X', `Y', `SP' or `PC'.
+
+"Accumulator Offset"
+     `ACC,REG'
+
+     The accumulator register can be either `A', `B' or `D'.  The
+     register can be either `X', `Y', `SP' or `PC'.
+
+"Accumulator D offset indexed-indirect"
+     `[D,REG]'
+
+     The register can be either `X', `Y', `SP' or `PC'.
+
+
+   For example:
+
+     ldab 1024,sp
+     ldd [10,x]
+     orab 3,+x
+     stab -2,y-
+     ldx a,pc
+     sty [d,sp]
+
+
+File: as.info,  Node: M68HC11-Modifiers,  Next: M68HC11-Directives,  Prev: M68HC11-Syntax,  Up: M68HC11-Dependent
+
+9.22.3 Symbolic Operand Modifiers
+---------------------------------
+
+The assembler supports several modifiers when using symbol addresses in
+68HC11 and 68HC12 instruction operands.  The general syntax is the
+following:
+
+     %modifier(symbol)
+
+`%addr'
+     This modifier indicates to the assembler and linker to use the
+     16-bit physical address corresponding to the symbol.  This is
+     intended to be used on memory window systems to map a symbol in
+     the memory bank window.  If the symbol is in a memory expansion
+     part, the physical address corresponds to the symbol address
+     within the memory bank window.  If the symbol is not in a memory
+     expansion part, this is the symbol address (using or not using the
+     %addr modifier has no effect in that case).
+
+`%page'
+     This modifier indicates to use the memory page number corresponding
+     to the symbol.  If the symbol is in a memory expansion part, its
+     page number is computed by the linker as a number used to map the
+     page containing the symbol in the memory bank window.  If the
+     symbol is not in a memory expansion part, the page number is 0.
+
+`%hi'
+     This modifier indicates to use the 8-bit high part of the physical
+     address of the symbol.
+
+`%lo'
+     This modifier indicates to use the 8-bit low part of the physical
+     address of the symbol.
+
+
+   For example a 68HC12 call to a function `foo_example' stored in
+memory expansion part could be written as follows:
+
+     call %addr(foo_example),%page(foo_example)
+
+   and this is equivalent to
+
+     call foo_example
+
+   And for 68HC11 it could be written as follows:
+
+     ldab #%page(foo_example)
+     stab _page_switch
+     jsr  %addr(foo_example)
+
+
+File: as.info,  Node: M68HC11-Directives,  Next: M68HC11-Float,  Prev: M68HC11-Modifiers,  Up: M68HC11-Dependent
+
+9.22.4 Assembler Directives
+---------------------------
+
+The 68HC11 and 68HC12 version of `as' have the following specific
+assembler directives:
+
+`.relax'
+     The relax directive is used by the `GNU Compiler' to emit a
+     specific relocation to mark a group of instructions for linker
+     relaxation.  The sequence of instructions within the group must be
+     known to the linker so that relaxation can be performed.
+
+`.mode [mshort|mlong|mshort-double|mlong-double]'
+     This directive specifies the ABI.  It overrides the `-mshort',
+     `-mlong', `-mshort-double' and `-mlong-double' options.
+
+`.far SYMBOL'
+     This directive marks the symbol as a `far' symbol meaning that it
+     uses a `call/rtc' calling convention as opposed to `jsr/rts'.
+     During a final link, the linker will identify references to the
+     `far' symbol and will verify the proper calling convention.
+
+`.interrupt SYMBOL'
+     This directive marks the symbol as an interrupt entry point.  This
+     information is then used by the debugger to correctly unwind the
+     frame across interrupts.
+
+`.xrefb SYMBOL'
+     This directive is defined for compatibility with the
+     `Specification for Motorola 8 and 16-Bit Assembly Language Input
+     Standard' and is ignored.
+
+
+
+File: as.info,  Node: M68HC11-Float,  Next: M68HC11-opcodes,  Prev: M68HC11-Directives,  Up: M68HC11-Dependent
+
+9.22.5 Floating Point
+---------------------
+
+Packed decimal (P) format floating literals are not supported.  Feel
+free to add the code!
+
+   The floating point formats generated by directives are these.
+
+`.float'
+     `Single' precision floating point constants.
+
+`.double'
+     `Double' precision floating point constants.
+
+`.extend'
+`.ldouble'
+     `Extended' precision (`long double') floating point constants.
+
+
+File: as.info,  Node: M68HC11-opcodes,  Prev: M68HC11-Float,  Up: M68HC11-Dependent
+
+9.22.6 Opcodes
+--------------
+
+* Menu:
+
+* M68HC11-Branch::                 Branch Improvement
+
+
+File: as.info,  Node: M68HC11-Branch,  Up: M68HC11-opcodes
+
+9.22.6.1 Branch Improvement
+...........................
+
+Certain pseudo opcodes are permitted for branch instructions.  They
+expand to the shortest branch instruction that reach the target.
+Generally these mnemonics are made by prepending `j' to the start of
+Motorola mnemonic. These pseudo opcodes are not affected by the
+`--short-branches' or `--force-long-branches' options.
+
+   The following table summarizes the pseudo-operations.
+
+                             Displacement Width
+          +-------------------------------------------------------------+
+          |                     Options                                 |
+          |    --short-branches           --force-long-branches         |
+          +--------------------------+----------------------------------+
+       Op |BYTE             WORD     | BYTE          WORD               |
+          +--------------------------+----------------------------------+
+      bsr | bsr <pc-rel>    <error>  |               jsr <abs>          |
+      bra | bra <pc-rel>    <error>  |               jmp <abs>          |
+     jbsr | bsr <pc-rel>   jsr <abs> | bsr <pc-rel>  jsr <abs>          |
+     jbra | bra <pc-rel>   jmp <abs> | bra <pc-rel>  jmp <abs>          |
+      bXX | bXX <pc-rel>    <error>  |               bNX +3; jmp <abs>  |
+     jbXX | bXX <pc-rel>   bNX +3;   | bXX <pc-rel>  bNX +3; jmp <abs>  |
+          |                jmp <abs> |                                  |
+          +--------------------------+----------------------------------+
+     XX: condition
+     NX: negative of condition XX
+
+`jbsr'
+`jbra'
+     These are the simplest jump pseudo-operations; they always map to
+     one particular machine instruction, depending on the displacement
+     to the branch target.
+
+`jbXX'
+     Here, `jbXX' stands for an entire family of pseudo-operations,
+     where XX is a conditional branch or condition-code test.  The full
+     list of pseudo-ops in this family is:
+           jbcc   jbeq   jbge   jbgt   jbhi   jbvs   jbpl  jblo
+           jbcs   jbne   jblt   jble   jbls   jbvc   jbmi
+
+     For the cases of non-PC relative displacements and long
+     displacements, `as' issues a longer code fragment in terms of NX,
+     the opposite condition to XX.  For example, for the non-PC
+     relative case:
+              jbXX foo
+     gives
+               bNXs oof
+               jmp foo
+           oof:
+
+
+
+File: as.info,  Node: MicroBlaze-Dependent,  Next: MIPS-Dependent,  Prev: M68HC11-Dependent,  Up: Machine Dependencies
+
+9.23 MicroBlaze Dependent Features
+==================================
+
+   The Xilinx MicroBlaze processor family includes several variants,
+all using the same core instruction set.  This chapter covers features
+of the GNU assembler that are specific to the MicroBlaze architecture.
+For details about the MicroBlaze instruction set, please see the
+`MicroBlaze Processor Reference Guide (UG081)' available at
+www.xilinx.com.
+
+* Menu:
+
+* MicroBlaze Directives::           Directives for MicroBlaze Processors.
+
+
+File: as.info,  Node: MicroBlaze Directives,  Up: MicroBlaze-Dependent
+
+9.23.1 Directives
+-----------------
+
+A number of assembler directives are available for MicroBlaze.
+
+`.data8 EXPRESSION,...'
+     This directive is an alias for `.byte'. Each expression is
+     assembled into an eight-bit value.
+
+`.data16 EXPRESSION,...'
+     This directive is an alias for `.hword'. Each expression is
+     assembled into an 16-bit value.
+
+`.data32 EXPRESSION,...'
+     This directive is an alias for `.word'. Each expression is
+     assembled into an 32-bit value.
+
+`.ent NAME[,LABEL]'
+     This directive is an alias for `.func' denoting the start of
+     function NAME at (optional) LABEL.
+
+`.end NAME[,LABEL]'
+     This directive is an alias for `.endfunc' denoting the end of
+     function NAME.
+
+`.gpword LABEL,...'
+     This directive is an alias for `.rva'.  The resolved address of
+     LABEL is stored in the data section.
+
+`.weakext LABEL'
+     Declare that LABEL is a weak external symbol.
+
+`.rodata'
+     Switch to .rodata section. Equivalent to `.section .rodata'
+
+`.sdata2'
+     Switch to .sdata2 section. Equivalent to `.section .sdata2'
+
+`.sdata'
+     Switch to .sdata section. Equivalent to `.section .sdata'
+
+`.bss'
+     Switch to .bss section. Equivalent to `.section .bss'
+
+`.sbss'
+     Switch to .sbss section. Equivalent to `.section .sbss'
+
+
+File: as.info,  Node: MIPS-Dependent,  Next: MMIX-Dependent,  Prev: MicroBlaze-Dependent,  Up: Machine Dependencies
+
+9.24 MIPS Dependent Features
+============================
+
+   GNU `as' for MIPS architectures supports several different MIPS
+processors, and MIPS ISA levels I through V, MIPS32, and MIPS64.  For
+information about the MIPS instruction set, see `MIPS RISC
+Architecture', by Kane and Heindrich (Prentice-Hall).  For an overview
+of MIPS assembly conventions, see "Appendix D: Assembly Language
+Programming" in the same work.
+
+* Menu:
+
+* MIPS Opts::   	Assembler options
+* MIPS Object:: 	ECOFF object code
+* MIPS Stabs::  	Directives for debugging information
+* MIPS ISA::    	Directives to override the ISA level
+* MIPS symbol sizes::   Directives to override the size of symbols
+* MIPS autoextend::	Directives for extending MIPS 16 bit instructions
+* MIPS insn::		Directive to mark data as an instruction
+* MIPS option stack::	Directives to save and restore options
+* MIPS ASE instruction generation overrides:: Directives to control
+  			generation of MIPS ASE instructions
+* MIPS floating-point:: Directives to override floating-point options
+
+
+File: as.info,  Node: MIPS Opts,  Next: MIPS Object,  Up: MIPS-Dependent
+
+9.24.1 Assembler options
+------------------------
+
+The MIPS configurations of GNU `as' support these special options:
+
+`-G NUM'
+     This option sets the largest size of an object that can be
+     referenced implicitly with the `gp' register.  It is only accepted
+     for targets that use ECOFF format.  The default value is 8.
+
+`-EB'
+`-EL'
+     Any MIPS configuration of `as' can select big-endian or
+     little-endian output at run time (unlike the other GNU development
+     tools, which must be configured for one or the other).  Use `-EB'
+     to select big-endian output, and `-EL' for little-endian.
+
+`-KPIC'
+     Generate SVR4-style PIC.  This option tells the assembler to
+     generate SVR4-style position-independent macro expansions.  It
+     also tells the assembler to mark the output file as PIC.
+
+`-mvxworks-pic'
+     Generate VxWorks PIC.  This option tells the assembler to generate
+     VxWorks-style position-independent macro expansions.
+
+`-mips1'
+`-mips2'
+`-mips3'
+`-mips4'
+`-mips5'
+`-mips32'
+`-mips32r2'
+`-mips64'
+`-mips64r2'
+     Generate code for a particular MIPS Instruction Set Architecture
+     level.  `-mips1' corresponds to the R2000 and R3000 processors,
+     `-mips2' to the R6000 processor, `-mips3' to the R4000 processor,
+     and `-mips4' to the R8000 and R10000 processors.  `-mips5',
+     `-mips32', `-mips32r2', `-mips64', and `-mips64r2' correspond to
+     generic MIPS V, MIPS32, MIPS32 RELEASE 2, MIPS64, and MIPS64
+     RELEASE 2 ISA processors, respectively.  You can also switch
+     instruction sets during the assembly; see *note Directives to
+     override the ISA level: MIPS ISA.
+
+`-mgp32'
+`-mfp32'
+     Some macros have different expansions for 32-bit and 64-bit
+     registers.  The register sizes are normally inferred from the ISA
+     and ABI, but these flags force a certain group of registers to be
+     treated as 32 bits wide at all times.  `-mgp32' controls the size
+     of general-purpose registers and `-mfp32' controls the size of
+     floating-point registers.
+
+     The `.set gp=32' and `.set fp=32' directives allow the size of
+     registers to be changed for parts of an object. The default value
+     is restored by `.set gp=default' and `.set fp=default'.
+
+     On some MIPS variants there is a 32-bit mode flag; when this flag
+     is set, 64-bit instructions generate a trap.  Also, some 32-bit
+     OSes only save the 32-bit registers on a context switch, so it is
+     essential never to use the 64-bit registers.
+
+`-mgp64'
+`-mfp64'
+     Assume that 64-bit registers are available.  This is provided in
+     the interests of symmetry with `-mgp32' and `-mfp32'.
+
+     The `.set gp=64' and `.set fp=64' directives allow the size of
+     registers to be changed for parts of an object. The default value
+     is restored by `.set gp=default' and `.set fp=default'.
+
+`-mips16'
+`-no-mips16'
+     Generate code for the MIPS 16 processor.  This is equivalent to
+     putting `.set mips16' at the start of the assembly file.
+     `-no-mips16' turns off this option.
+
+`-msmartmips'
+`-mno-smartmips'
+     Enables the SmartMIPS extensions to the MIPS32 instruction set,
+     which provides a number of new instructions which target smartcard
+     and cryptographic applications.  This is equivalent to putting
+     `.set smartmips' at the start of the assembly file.
+     `-mno-smartmips' turns off this option.
+
+`-mips3d'
+`-no-mips3d'
+     Generate code for the MIPS-3D Application Specific Extension.
+     This tells the assembler to accept MIPS-3D instructions.
+     `-no-mips3d' turns off this option.
+
+`-mdmx'
+`-no-mdmx'
+     Generate code for the MDMX Application Specific Extension.  This
+     tells the assembler to accept MDMX instructions.  `-no-mdmx' turns
+     off this option.
+
+`-mdsp'
+`-mno-dsp'
+     Generate code for the DSP Release 1 Application Specific Extension.
+     This tells the assembler to accept DSP Release 1 instructions.
+     `-mno-dsp' turns off this option.
+
+`-mdspr2'
+`-mno-dspr2'
+     Generate code for the DSP Release 2 Application Specific Extension.
+     This option implies -mdsp.  This tells the assembler to accept DSP
+     Release 2 instructions.  `-mno-dspr2' turns off this option.
+
+`-mmt'
+`-mno-mt'
+     Generate code for the MT Application Specific Extension.  This
+     tells the assembler to accept MT instructions.  `-mno-mt' turns
+     off this option.
+
+`-mfix7000'
+`-mno-fix7000'
+     Cause nops to be inserted if the read of the destination register
+     of an mfhi or mflo instruction occurs in the following two
+     instructions.
+
+`-mfix-vr4120'
+`-no-mfix-vr4120'
+     Insert nops to work around certain VR4120 errata.  This option is
+     intended to be used on GCC-generated code: it is not designed to
+     catch all problems in hand-written assembler code.
+
+`-mfix-vr4130'
+`-no-mfix-vr4130'
+     Insert nops to work around the VR4130 `mflo'/`mfhi' errata.
+
+`-mfix-24k'
+`-no-mfix-24k'
+     Insert nops to work around the 24K `eret'/`deret' errata.
+
+`-m4010'
+`-no-m4010'
+     Generate code for the LSI R4010 chip.  This tells the assembler to
+     accept the R4010 specific instructions (`addciu', `ffc', etc.),
+     and to not schedule `nop' instructions around accesses to the `HI'
+     and `LO' registers.  `-no-m4010' turns off this option.
+
+`-m4650'
+`-no-m4650'
+     Generate code for the MIPS R4650 chip.  This tells the assembler
+     to accept the `mad' and `madu' instruction, and to not schedule
+     `nop' instructions around accesses to the `HI' and `LO' registers.
+     `-no-m4650' turns off this option.
+
+`-m3900'
+`-no-m3900'
+`-m4100'
+`-no-m4100'
+     For each option `-mNNNN', generate code for the MIPS RNNNN chip.
+     This tells the assembler to accept instructions specific to that
+     chip, and to schedule for that chip's hazards.
+
+`-march=CPU'
+     Generate code for a particular MIPS cpu.  It is exactly equivalent
+     to `-mCPU', except that there are more value of CPU understood.
+     Valid CPU value are:
+
+          2000, 3000, 3900, 4000, 4010, 4100, 4111, vr4120, vr4130,
+          vr4181, 4300, 4400, 4600, 4650, 5000, rm5200, rm5230, rm5231,
+          rm5261, rm5721, vr5400, vr5500, 6000, rm7000, 8000, rm9000,
+          10000, 12000, 14000, 16000, 4kc, 4km, 4kp, 4ksc, 4kec, 4kem,
+          4kep, 4ksd, m4k, m4kp, 24kc, 24kf2_1, 24kf, 24kf1_1, 24kec,
+          24kef2_1, 24kef, 24kef1_1, 34kc, 34kf2_1, 34kf, 34kf1_1, 74kc,
+          74kf2_1, 74kf, 74kf1_1, 74kf3_2, 1004kc, 1004kf2_1, 1004kf,
+          1004kf1_1, 5kc, 5kf, 20kc, 25kf, sb1, sb1a, loongson2e,
+          loongson2f, octeon, xlr
+
+     For compatibility reasons, `Nx' and `Bfx' are accepted as synonyms
+     for `Nf1_1'.  These values are deprecated.
+
+`-mtune=CPU'
+     Schedule and tune for a particular MIPS cpu.  Valid CPU values are
+     identical to `-march=CPU'.
+
+`-mabi=ABI'
+     Record which ABI the source code uses.  The recognized arguments
+     are: `32', `n32', `o64', `64' and `eabi'.
+
+`-msym32'
+`-mno-sym32'
+     Equivalent to adding `.set sym32' or `.set nosym32' to the
+     beginning of the assembler input.  *Note MIPS symbol sizes::.
+
+`-nocpp'
+     This option is ignored.  It is accepted for command-line
+     compatibility with other assemblers, which use it to turn off C
+     style preprocessing.  With GNU `as', there is no need for
+     `-nocpp', because the GNU assembler itself never runs the C
+     preprocessor.
+
+`-msoft-float'
+`-mhard-float'
+     Disable or enable floating-point instructions.  Note that by
+     default floating-point instructions are always allowed even with
+     CPU targets that don't have support for these instructions.
+
+`-msingle-float'
+`-mdouble-float'
+     Disable or enable double-precision floating-point operations.  Note
+     that by default double-precision floating-point operations are
+     always allowed even with CPU targets that don't have support for
+     these operations.
+
+`--construct-floats'
+`--no-construct-floats'
+     The `--no-construct-floats' option disables the construction of
+     double width floating point constants by loading the two halves of
+     the value into the two single width floating point registers that
+     make up the double width register.  This feature is useful if the
+     processor support the FR bit in its status  register, and this bit
+     is known (by the programmer) to be set.  This bit prevents the
+     aliasing of the double width register by the single width
+     registers.
+
+     By default `--construct-floats' is selected, allowing construction
+     of these floating point constants.
+
+`--trap'
+`--no-break'
+     `as' automatically macro expands certain division and
+     multiplication instructions to check for overflow and division by
+     zero.  This option causes `as' to generate code to take a trap
+     exception rather than a break exception when an error is detected.
+     The trap instructions are only supported at Instruction Set
+     Architecture level 2 and higher.
+
+`--break'
+`--no-trap'
+     Generate code to take a break exception rather than a trap
+     exception when an error is detected.  This is the default.
+
+`-mpdr'
+`-mno-pdr'
+     Control generation of `.pdr' sections.  Off by default on IRIX, on
+     elsewhere.
+
+`-mshared'
+`-mno-shared'
+     When generating code using the Unix calling conventions (selected
+     by `-KPIC' or `-mcall_shared'), gas will normally generate code
+     which can go into a shared library.  The `-mno-shared' option
+     tells gas to generate code which uses the calling convention, but
+     can not go into a shared library.  The resulting code is slightly
+     more efficient.  This option only affects the handling of the
+     `.cpload' and `.cpsetup' pseudo-ops.
+
+
+File: as.info,  Node: MIPS Object,  Next: MIPS Stabs,  Prev: MIPS Opts,  Up: MIPS-Dependent
+
+9.24.2 MIPS ECOFF object code
+-----------------------------
+
+Assembling for a MIPS ECOFF target supports some additional sections
+besides the usual `.text', `.data' and `.bss'.  The additional sections
+are `.rdata', used for read-only data, `.sdata', used for small data,
+and `.sbss', used for small common objects.
+
+   When assembling for ECOFF, the assembler uses the `$gp' (`$28')
+register to form the address of a "small object".  Any object in the
+`.sdata' or `.sbss' sections is considered "small" in this sense.  For
+external objects, or for objects in the `.bss' section, you can use the
+`gcc' `-G' option to control the size of objects addressed via `$gp';
+the default value is 8, meaning that a reference to any object eight
+bytes or smaller uses `$gp'.  Passing `-G 0' to `as' prevents it from
+using the `$gp' register on the basis of object size (but the assembler
+uses `$gp' for objects in `.sdata' or `sbss' in any case).  The size of
+an object in the `.bss' section is set by the `.comm' or `.lcomm'
+directive that defines it.  The size of an external object may be set
+with the `.extern' directive.  For example, `.extern sym,4' declares
+that the object at `sym' is 4 bytes in length, whie leaving `sym'
+otherwise undefined.
+
+   Using small ECOFF objects requires linker support, and assumes that
+the `$gp' register is correctly initialized (normally done
+automatically by the startup code).  MIPS ECOFF assembly code must not
+modify the `$gp' register.
+
+
+File: as.info,  Node: MIPS Stabs,  Next: MIPS ISA,  Prev: MIPS Object,  Up: MIPS-Dependent
+
+9.24.3 Directives for debugging information
+-------------------------------------------
+
+MIPS ECOFF `as' supports several directives used for generating
+debugging information which are not support by traditional MIPS
+assemblers.  These are `.def', `.endef', `.dim', `.file', `.scl',
+`.size', `.tag', `.type', `.val', `.stabd', `.stabn', and `.stabs'.
+The debugging information generated by the three `.stab' directives can
+only be read by GDB, not by traditional MIPS debuggers (this
+enhancement is required to fully support C++ debugging).  These
+directives are primarily used by compilers, not assembly language
+programmers!
+
+
+File: as.info,  Node: MIPS symbol sizes,  Next: MIPS autoextend,  Prev: MIPS ISA,  Up: MIPS-Dependent
+
+9.24.4 Directives to override the size of symbols
+-------------------------------------------------
+
+The n64 ABI allows symbols to have any 64-bit value.  Although this
+provides a great deal of flexibility, it means that some macros have
+much longer expansions than their 32-bit counterparts.  For example,
+the non-PIC expansion of `dla $4,sym' is usually:
+
+     lui     $4,%highest(sym)
+     lui     $1,%hi(sym)
+     daddiu  $4,$4,%higher(sym)
+     daddiu  $1,$1,%lo(sym)
+     dsll32  $4,$4,0
+     daddu   $4,$4,$1
+
+   whereas the 32-bit expansion is simply:
+
+     lui     $4,%hi(sym)
+     daddiu  $4,$4,%lo(sym)
+
+   n64 code is sometimes constructed in such a way that all symbolic
+constants are known to have 32-bit values, and in such cases, it's
+preferable to use the 32-bit expansion instead of the 64-bit expansion.
+
+   You can use the `.set sym32' directive to tell the assembler that,
+from this point on, all expressions of the form `SYMBOL' or `SYMBOL +
+OFFSET' have 32-bit values.  For example:
+
+     .set sym32
+     dla     $4,sym
+     lw      $4,sym+16
+     sw      $4,sym+0x8000($4)
+
+   will cause the assembler to treat `sym', `sym+16' and `sym+0x8000'
+as 32-bit values.  The handling of non-symbolic addresses is not
+affected.
+
+   The directive `.set nosym32' ends a `.set sym32' block and reverts
+to the normal behavior.  It is also possible to change the symbol size
+using the command-line options `-msym32' and `-mno-sym32'.
+
+   These options and directives are always accepted, but at present,
+they have no effect for anything other than n64.
+
+
+File: as.info,  Node: MIPS ISA,  Next: MIPS symbol sizes,  Prev: MIPS Stabs,  Up: MIPS-Dependent
+
+9.24.5 Directives to override the ISA level
+-------------------------------------------
+
+GNU `as' supports an additional directive to change the MIPS
+Instruction Set Architecture level on the fly: `.set mipsN'.  N should
+be a number from 0 to 5, or 32, 32r2, 64 or 64r2.  The values other
+than 0 make the assembler accept instructions for the corresponding ISA
+level, from that point on in the assembly.  `.set mipsN' affects not
+only which instructions are permitted, but also how certain macros are
+expanded.  `.set mips0' restores the ISA level to its original level:
+either the level you selected with command line options, or the default
+for your configuration.  You can use this feature to permit specific
+MIPS3 instructions while assembling in 32 bit mode.  Use this directive
+with care!
+
+   The `.set arch=CPU' directive provides even finer control.  It
+changes the effective CPU target and allows the assembler to use
+instructions specific to a particular CPU.  All CPUs supported by the
+`-march' command line option are also selectable by this directive.
+The original value is restored by `.set arch=default'.
+
+   The directive `.set mips16' puts the assembler into MIPS 16 mode, in
+which it will assemble instructions for the MIPS 16 processor.  Use
+`.set nomips16' to return to normal 32 bit mode.
+
+   Traditional MIPS assemblers do not support this directive.
+
+
+File: as.info,  Node: MIPS autoextend,  Next: MIPS insn,  Prev: MIPS symbol sizes,  Up: MIPS-Dependent
+
+9.24.6 Directives for extending MIPS 16 bit instructions
+--------------------------------------------------------
+
+By default, MIPS 16 instructions are automatically extended to 32 bits
+when necessary.  The directive `.set noautoextend' will turn this off.
+When `.set noautoextend' is in effect, any 32 bit instruction must be
+explicitly extended with the `.e' modifier (e.g., `li.e $4,1000').  The
+directive `.set autoextend' may be used to once again automatically
+extend instructions when necessary.
+
+   This directive is only meaningful when in MIPS 16 mode.  Traditional
+MIPS assemblers do not support this directive.
+
+
+File: as.info,  Node: MIPS insn,  Next: MIPS option stack,  Prev: MIPS autoextend,  Up: MIPS-Dependent
+
+9.24.7 Directive to mark data as an instruction
+-----------------------------------------------
+
+The `.insn' directive tells `as' that the following data is actually
+instructions.  This makes a difference in MIPS 16 mode: when loading
+the address of a label which precedes instructions, `as' automatically
+adds 1 to the value, so that jumping to the loaded address will do the
+right thing.
+
+   The `.global' and `.globl' directives supported by `as' will by
+default mark the symbol as pointing to a region of data not code.  This
+means that, for example, any instructions following such a symbol will
+not be disassembled by `objdump' as it will regard them as data.  To
+change this behaviour an optional section name can be placed after the
+symbol name in the `.global' directive.  If this section exists and is
+known to be a code section, then the symbol will be marked as poiting at
+code not data.  Ie the syntax for the directive is:
+
+   `.global SYMBOL[ SECTION][, SYMBOL[ SECTION]] ...',
+
+   Here is a short example:
+
+             .global foo .text, bar, baz .data
+     foo:
+             nop
+     bar:
+             .word 0x0
+     baz:
+             .word 0x1
+
+
+File: as.info,  Node: MIPS option stack,  Next: MIPS ASE instruction generation overrides,  Prev: MIPS insn,  Up: MIPS-Dependent
+
+9.24.8 Directives to save and restore options
+---------------------------------------------
+
+The directives `.set push' and `.set pop' may be used to save and
+restore the current settings for all the options which are controlled
+by `.set'.  The `.set push' directive saves the current settings on a
+stack.  The `.set pop' directive pops the stack and restores the
+settings.
+
+   These directives can be useful inside an macro which must change an
+option such as the ISA level or instruction reordering but does not want
+to change the state of the code which invoked the macro.
+
+   Traditional MIPS assemblers do not support these directives.
+
+
+File: as.info,  Node: MIPS ASE instruction generation overrides,  Next: MIPS floating-point,  Prev: MIPS option stack,  Up: MIPS-Dependent
+
+9.24.9 Directives to control generation of MIPS ASE instructions
+----------------------------------------------------------------
+
+The directive `.set mips3d' makes the assembler accept instructions
+from the MIPS-3D Application Specific Extension from that point on in
+the assembly.  The `.set nomips3d' directive prevents MIPS-3D
+instructions from being accepted.
+
+   The directive `.set smartmips' makes the assembler accept
+instructions from the SmartMIPS Application Specific Extension to the
+MIPS32 ISA from that point on in the assembly.  The `.set nosmartmips'
+directive prevents SmartMIPS instructions from being accepted.
+
+   The directive `.set mdmx' makes the assembler accept instructions
+from the MDMX Application Specific Extension from that point on in the
+assembly.  The `.set nomdmx' directive prevents MDMX instructions from
+being accepted.
+
+   The directive `.set dsp' makes the assembler accept instructions
+from the DSP Release 1 Application Specific Extension from that point
+on in the assembly.  The `.set nodsp' directive prevents DSP Release 1
+instructions from being accepted.
+
+   The directive `.set dspr2' makes the assembler accept instructions
+from the DSP Release 2 Application Specific Extension from that point
+on in the assembly.  This dirctive implies `.set dsp'.  The `.set
+nodspr2' directive prevents DSP Release 2 instructions from being
+accepted.
+
+   The directive `.set mt' makes the assembler accept instructions from
+the MT Application Specific Extension from that point on in the
+assembly.  The `.set nomt' directive prevents MT instructions from
+being accepted.
+
+   Traditional MIPS assemblers do not support these directives.
+
+
+File: as.info,  Node: MIPS floating-point,  Prev: MIPS ASE instruction generation overrides,  Up: MIPS-Dependent
+
+9.24.10 Directives to override floating-point options
+-----------------------------------------------------
+
+The directives `.set softfloat' and `.set hardfloat' provide finer
+control of disabling and enabling float-point instructions.  These
+directives always override the default (that hard-float instructions
+are accepted) or the command-line options (`-msoft-float' and
+`-mhard-float').
+
+   The directives `.set singlefloat' and `.set doublefloat' provide
+finer control of disabling and enabling double-precision float-point
+operations.  These directives always override the default (that
+double-precision operations are accepted) or the command-line options
+(`-msingle-float' and `-mdouble-float').
+
+   Traditional MIPS assemblers do not support these directives.
+
+
+File: as.info,  Node: MMIX-Dependent,  Next: MSP430-Dependent,  Prev: MIPS-Dependent,  Up: Machine Dependencies
+
+9.25 MMIX Dependent Features
+============================
+
+* Menu:
+
+* MMIX-Opts::              Command-line Options
+* MMIX-Expand::            Instruction expansion
+* MMIX-Syntax::            Syntax
+* MMIX-mmixal::		   Differences to `mmixal' syntax and semantics
+
+
+File: as.info,  Node: MMIX-Opts,  Next: MMIX-Expand,  Up: MMIX-Dependent
+
+9.25.1 Command-line Options
+---------------------------
+
+The MMIX version of `as' has some machine-dependent options.
+
+   When `--fixed-special-register-names' is specified, only the register
+names specified in *note MMIX-Regs:: are recognized in the instructions
+`PUT' and `GET'.
+
+   You can use the `--globalize-symbols' to make all symbols global.
+This option is useful when splitting up a `mmixal' program into several
+files.
+
+   The `--gnu-syntax' turns off most syntax compatibility with
+`mmixal'.  Its usability is currently doubtful.
+
+   The `--relax' option is not fully supported, but will eventually make
+the object file prepared for linker relaxation.
+
+   If you want to avoid inadvertently calling a predefined symbol and
+would rather get an error, for example when using `as' with a compiler
+or other machine-generated code, specify `--no-predefined-syms'.  This
+turns off built-in predefined definitions of all such symbols,
+including rounding-mode symbols, segment symbols, `BIT' symbols, and
+`TRAP' symbols used in `mmix' "system calls".  It also turns off
+predefined special-register names, except when used in `PUT' and `GET'
+instructions.
+
+   By default, some instructions are expanded to fit the size of the
+operand or an external symbol (*note MMIX-Expand::).  By passing
+`--no-expand', no such expansion will be done, instead causing errors
+at link time if the operand does not fit.
+
+   The `mmixal' documentation (*note mmixsite::) specifies that global
+registers allocated with the `GREG' directive (*note MMIX-greg::) and
+initialized to the same non-zero value, will refer to the same global
+register.  This isn't strictly enforceable in `as' since the final
+addresses aren't known until link-time, but it will do an effort unless
+the `--no-merge-gregs' option is specified.  (Register merging isn't
+yet implemented in `ld'.)
+
+   `as' will warn every time it expands an instruction to fit an
+operand unless the option `-x' is specified.  It is believed that this
+behaviour is more useful than just mimicking `mmixal''s behaviour, in
+which instructions are only expanded if the `-x' option is specified,
+and assembly fails otherwise, when an instruction needs to be expanded.
+It needs to be kept in mind that `mmixal' is both an assembler and
+linker, while `as' will expand instructions that at link stage can be
+contracted.  (Though linker relaxation isn't yet implemented in `ld'.)
+The option `-x' also imples `--linker-allocated-gregs'.
+
+   If instruction expansion is enabled, `as' can expand a `PUSHJ'
+instruction into a series of instructions.  The shortest expansion is
+to not expand it, but just mark the call as redirectable to a stub,
+which `ld' creates at link-time, but only if the original `PUSHJ'
+instruction is found not to reach the target.  The stub consists of the
+necessary instructions to form a jump to the target.  This happens if
+`as' can assert that the `PUSHJ' instruction can reach such a stub.
+The option `--no-pushj-stubs' disables this shorter expansion, and the
+longer series of instructions is then created at assembly-time.  The
+option `--no-stubs' is a synonym, intended for compatibility with
+future releases, where generation of stubs for other instructions may
+be implemented.
+
+   Usually a two-operand-expression (*note GREG-base::) without a
+matching `GREG' directive is treated as an error by `as'.  When the
+option `--linker-allocated-gregs' is in effect, they are instead passed
+through to the linker, which will allocate as many global registers as
+is needed.
+
+
+File: as.info,  Node: MMIX-Expand,  Next: MMIX-Syntax,  Prev: MMIX-Opts,  Up: MMIX-Dependent
+
+9.25.2 Instruction expansion
+----------------------------
+
+When `as' encounters an instruction with an operand that is either not
+known or does not fit the operand size of the instruction, `as' (and
+`ld') will expand the instruction into a sequence of instructions
+semantically equivalent to the operand fitting the instruction.
+Expansion will take place for the following instructions:
+
+`GETA'
+     Expands to a sequence of four instructions: `SETL', `INCML',
+     `INCMH' and `INCH'.  The operand must be a multiple of four.
+
+Conditional branches
+     A branch instruction is turned into a branch with the complemented
+     condition and prediction bit over five instructions; four
+     instructions setting `$255' to the operand value, which like with
+     `GETA' must be a multiple of four, and a final `GO $255,$255,0'.
+
+`PUSHJ'
+     Similar to expansion for conditional branches; four instructions
+     set `$255' to the operand value, followed by a `PUSHGO
+     $255,$255,0'.
+
+`JMP'
+     Similar to conditional branches and `PUSHJ'.  The final instruction
+     is `GO $255,$255,0'.
+
+   The linker `ld' is expected to shrink these expansions for code
+assembled with `--relax' (though not currently implemented).
+
+
+File: as.info,  Node: MMIX-Syntax,  Next: MMIX-mmixal,  Prev: MMIX-Expand,  Up: MMIX-Dependent
+
+9.25.3 Syntax
+-------------
+
+The assembly syntax is supposed to be upward compatible with that
+described in Sections 1.3 and 1.4 of `The Art of Computer Programming,
+Volume 1'.  Draft versions of those chapters as well as other MMIX
+information is located at
+`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html'.  Most code
+examples from the mmixal package located there should work unmodified
+when assembled and linked as single files, with a few noteworthy
+exceptions (*note MMIX-mmixal::).
+
+   Before an instruction is emitted, the current location is aligned to
+the next four-byte boundary.  If a label is defined at the beginning of
+the line, its value will be the aligned value.
+
+   In addition to the traditional hex-prefix `0x', a hexadecimal number
+can also be specified by the prefix character `#'.
+
+   After all operands to an MMIX instruction or directive have been
+specified, the rest of the line is ignored, treated as a comment.
+
+* Menu:
+
+* MMIX-Chars::		        Special Characters
+* MMIX-Symbols::		Symbols
+* MMIX-Regs::			Register Names
+* MMIX-Pseudos::		Assembler Directives
+
+
+File: as.info,  Node: MMIX-Chars,  Next: MMIX-Symbols,  Up: MMIX-Syntax
+
+9.25.3.1 Special Characters
+...........................
+
+The characters `*' and `#' are line comment characters; each start a
+comment at the beginning of a line, but only at the beginning of a
+line.  A `#' prefixes a hexadecimal number if found elsewhere on a line.
+
+   Two other characters, `%' and `!', each start a comment anywhere on
+the line.  Thus you can't use the `modulus' and `not' operators in
+expressions normally associated with these two characters.
+
+   A `;' is a line separator, treated as a new-line, so separate
+instructions can be specified on a single line.
+
+
+File: as.info,  Node: MMIX-Symbols,  Next: MMIX-Regs,  Prev: MMIX-Chars,  Up: MMIX-Syntax
+
+9.25.3.2 Symbols
+................
+
+The character `:' is permitted in identifiers.  There are two
+exceptions to it being treated as any other symbol character: if a
+symbol begins with `:', it means that the symbol is in the global
+namespace and that the current prefix should not be prepended to that
+symbol (*note MMIX-prefix::).  The `:' is then not considered part of
+the symbol.  For a symbol in the label position (first on a line), a `:'
+at the end of a symbol is silently stripped off.  A label is permitted,
+but not required, to be followed by a `:', as with many other assembly
+formats.
+
+   The character `@' in an expression, is a synonym for `.', the
+current location.
+
+   In addition to the common forward and backward local symbol formats
+(*note Symbol Names::), they can be specified with upper-case `B' and
+`F', as in `8B' and `9F'.  A local label defined for the current
+position is written with a `H' appended to the number:
+     3H LDB $0,$1,2
+   This and traditional local-label formats cannot be mixed: a label
+must be defined and referred to using the same format.
+
+   There's a minor caveat: just as for the ordinary local symbols, the
+local symbols are translated into ordinary symbols using control
+characters are to hide the ordinal number of the symbol.
+Unfortunately, these symbols are not translated back in error messages.
+Thus you may see confusing error messages when local symbols are used.
+Control characters `\003' (control-C) and `\004' (control-D) are used
+for the MMIX-specific local-symbol syntax.
+
+   The symbol `Main' is handled specially; it is always global.
+
+   By defining the symbols `__.MMIX.start..text' and
+`__.MMIX.start..data', the address of respectively the `.text' and
+`.data' segments of the final program can be defined, though when
+linking more than one object file, the code or data in the object file
+containing the symbol is not guaranteed to be start at that position;
+just the final executable.  *Note MMIX-loc::.
+
+
+File: as.info,  Node: MMIX-Regs,  Next: MMIX-Pseudos,  Prev: MMIX-Symbols,  Up: MMIX-Syntax
+
+9.25.3.3 Register names
+.......................
+
+Local and global registers are specified as `$0' to `$255'.  The
+recognized special register names are `rJ', `rA', `rB', `rC', `rD',
+`rE', `rF', `rG', `rH', `rI', `rK', `rL', `rM', `rN', `rO', `rP', `rQ',
+`rR', `rS', `rT', `rU', `rV', `rW', `rX', `rY', `rZ', `rBB', `rTT',
+`rWW', `rXX', `rYY' and `rZZ'.  A leading `:' is optional for special
+register names.
+
+   Local and global symbols can be equated to register names and used in
+place of ordinary registers.
+
+   Similarly for special registers, local and global symbols can be
+used.  Also, symbols equated from numbers and constant expressions are
+allowed in place of a special register, except when either of the
+options `--no-predefined-syms' and `--fixed-special-register-names' are
+specified.  Then only the special register names above are allowed for
+the instructions having a special register operand; `GET' and `PUT'.
+
+
+File: as.info,  Node: MMIX-Pseudos,  Prev: MMIX-Regs,  Up: MMIX-Syntax
+
+9.25.3.4 Assembler Directives
+.............................
+
+`LOC'
+     The `LOC' directive sets the current location to the value of the
+     operand field, which may include changing sections.  If the
+     operand is a constant, the section is set to either `.data' if the
+     value is `0x2000000000000000' or larger, else it is set to `.text'.
+     Within a section, the current location may only be changed to
+     monotonically higher addresses.  A LOC expression must be a
+     previously defined symbol or a "pure" constant.
+
+     An example, which sets the label PREV to the current location, and
+     updates the current location to eight bytes forward:
+          prev LOC @+8
+
+     When a LOC has a constant as its operand, a symbol
+     `__.MMIX.start..text' or `__.MMIX.start..data' is defined
+     depending on the address as mentioned above.  Each such symbol is
+     interpreted as special by the linker, locating the section at that
+     address.  Note that if multiple files are linked, the first object
+     file with that section will be mapped to that address (not
+     necessarily the file with the LOC definition).
+
+`LOCAL'
+     Example:
+           LOCAL external_symbol
+           LOCAL 42
+           .local asymbol
+
+     This directive-operation generates a link-time assertion that the
+     operand does not correspond to a global register.  The operand is
+     an expression that at link-time resolves to a register symbol or a
+     number.  A number is treated as the register having that number.
+     There is one restriction on the use of this directive: the
+     pseudo-directive must be placed in a section with contents, code
+     or data.
+
+`IS'
+     The `IS' directive:
+          asymbol IS an_expression
+     sets the symbol `asymbol' to `an_expression'.  A symbol may not be
+     set more than once using this directive.  Local labels may be set
+     using this directive, for example:
+          5H IS @+4
+
+`GREG'
+     This directive reserves a global register, gives it an initial
+     value and optionally gives it a symbolic name.  Some examples:
+
+          areg GREG
+          breg GREG data_value
+               GREG data_buffer
+               .greg creg, another_data_value
+
+     The symbolic register name can be used in place of a (non-special)
+     register.  If a value isn't provided, it defaults to zero.  Unless
+     the option `--no-merge-gregs' is specified, non-zero registers
+     allocated with this directive may be eliminated by `as'; another
+     register with the same value used in its place.  Any of the
+     instructions `CSWAP', `GO', `LDA', `LDBU', `LDB', `LDHT', `LDOU',
+     `LDO', `LDSF', `LDTU', `LDT', `LDUNC', `LDVTS', `LDWU', `LDW',
+     `PREGO', `PRELD', `PREST', `PUSHGO', `STBU', `STB', `STCO', `STHT',
+     `STOU', `STSF', `STTU', `STT', `STUNC', `SYNCD', `SYNCID', can
+     have a value nearby an initial value in place of its second and
+     third operands.  Here, "nearby" is defined as within the range
+     0...255 from the initial value of such an allocated register.
+
+          buffer1 BYTE 0,0,0,0,0
+          buffer2 BYTE 0,0,0,0,0
+           ...
+           GREG buffer1
+           LDOU $42,buffer2
+     In the example above, the `Y' field of the `LDOUI' instruction
+     (LDOU with a constant Z) will be replaced with the global register
+     allocated for `buffer1', and the `Z' field will have the value 5,
+     the offset from `buffer1' to `buffer2'.  The result is equivalent
+     to this code:
+          buffer1 BYTE 0,0,0,0,0
+          buffer2 BYTE 0,0,0,0,0
+           ...
+          tmpreg GREG buffer1
+           LDOU $42,tmpreg,(buffer2-buffer1)
+
+     Global registers allocated with this directive are allocated in
+     order higher-to-lower within a file.  Other than that, the exact
+     order of register allocation and elimination is undefined.  For
+     example, the order is undefined when more than one file with such
+     directives are linked together.  With the options `-x' and
+     `--linker-allocated-gregs', `GREG' directives for two-operand
+     cases like the one mentioned above can be omitted.  Sufficient
+     global registers will then be allocated by the linker.
+
+`BYTE'
+     The `BYTE' directive takes a series of operands separated by a
+     comma.  If an operand is a string (*note Strings::), each
+     character of that string is emitted as a byte.  Other operands
+     must be constant expressions without forward references, in the
+     range 0...255.  If you need operands having expressions with
+     forward references, use `.byte' (*note Byte::).  An operand can be
+     omitted, defaulting to a zero value.
+
+`WYDE'
+`TETRA'
+`OCTA'
+     The directives `WYDE', `TETRA' and `OCTA' emit constants of two,
+     four and eight bytes size respectively.  Before anything else
+     happens for the directive, the current location is aligned to the
+     respective constant-size boundary.  If a label is defined at the
+     beginning of the line, its value will be that after the alignment.
+     A single operand can be omitted, defaulting to a zero value
+     emitted for the directive.  Operands can be expressed as strings
+     (*note Strings::), in which case each character in the string is
+     emitted as a separate constant of the size indicated by the
+     directive.
+
+`PREFIX'
+     The `PREFIX' directive sets a symbol name prefix to be prepended to
+     all symbols (except local symbols, *note MMIX-Symbols::), that are
+     not prefixed with `:', until the next `PREFIX' directive.  Such
+     prefixes accumulate.  For example,
+           PREFIX a
+           PREFIX b
+          c IS 0
+     defines a symbol `abc' with the value 0.
+
+`BSPEC'
+`ESPEC'
+     A pair of `BSPEC' and `ESPEC' directives delimit a section of
+     special contents (without specified semantics).  Example:
+           BSPEC 42
+           TETRA 1,2,3
+           ESPEC
+     The single operand to `BSPEC' must be number in the range 0...255.
+     The `BSPEC' number 80 is used by the GNU binutils implementation.
+
+
+File: as.info,  Node: MMIX-mmixal,  Prev: MMIX-Syntax,  Up: MMIX-Dependent
+
+9.25.4 Differences to `mmixal'
+------------------------------
+
+The binutils `as' and `ld' combination has a few differences in
+function compared to `mmixal' (*note mmixsite::).
+
+   The replacement of a symbol with a GREG-allocated register (*note
+GREG-base::) is not handled the exactly same way in `as' as in
+`mmixal'.  This is apparent in the `mmixal' example file `inout.mms',
+where different registers with different offsets, eventually yielding
+the same address, are used in the first instruction.  This type of
+difference should however not affect the function of any program unless
+it has specific assumptions about the allocated register number.
+
+   Line numbers (in the `mmo' object format) are currently not
+supported.
+
+   Expression operator precedence is not that of mmixal: operator
+precedence is that of the C programming language.  It's recommended to
+use parentheses to explicitly specify wanted operator precedence
+whenever more than one type of operators are used.
+
+   The serialize unary operator `&', the fractional division operator
+`//', the logical not operator `!' and the modulus operator `%' are not
+available.
+
+   Symbols are not global by default, unless the option
+`--globalize-symbols' is passed.  Use the `.global' directive to
+globalize symbols (*note Global::).
+
+   Operand syntax is a bit stricter with `as' than `mmixal'.  For
+example, you can't say `addu 1,2,3', instead you must write `addu
+$1,$2,3'.
+
+   You can't LOC to a lower address than those already visited (i.e.,
+"backwards").
+
+   A LOC directive must come before any emitted code.
+
+   Predefined symbols are visible as file-local symbols after use.  (In
+the ELF file, that is--the linked mmo file has no notion of a file-local
+symbol.)
+
+   Some mapping of constant expressions to sections in LOC expressions
+is attempted, but that functionality is easily confused and should be
+avoided unless compatibility with `mmixal' is required.  A LOC
+expression to `0x2000000000000000' or higher, maps to the `.data'
+section and lower addresses map to the `.text' section (*note
+MMIX-loc::).
+
+   The code and data areas are each contiguous.  Sparse programs with
+far-away LOC directives will take up the same amount of space as a
+contiguous program with zeros filled in the gaps between the LOC
+directives.  If you need sparse programs, you might try and get the
+wanted effect with a linker script and splitting up the code parts into
+sections (*note Section::).  Assembly code for this, to be compatible
+with `mmixal', would look something like:
+      .if 0
+      LOC away_expression
+      .else
+      .section away,"ax"
+      .fi
+   `as' will not execute the LOC directive and `mmixal' ignores the
+lines with `.'.  This construct can be used generally to help
+compatibility.
+
+   Symbols can't be defined twice-not even to the same value.
+
+   Instruction mnemonics are recognized case-insensitive, though the
+`IS' and `GREG' pseudo-operations must be specified in upper-case
+characters.
+
+   There's no unicode support.
+
+   The following is a list of programs in `mmix.tar.gz', available at
+`http://www-cs-faculty.stanford.edu/~knuth/mmix-news.html', last
+checked with the version dated 2001-08-25 (md5sum
+c393470cfc86fac040487d22d2bf0172) that assemble with `mmixal' but do
+not assemble with `as':
+
+`silly.mms'
+     LOC to a previous address.
+
+`sim.mms'
+     Redefines symbol `Done'.
+
+`test.mms'
+     Uses the serial operator `&'.
+
+
+File: as.info,  Node: MSP430-Dependent,  Next: SH-Dependent,  Prev: MMIX-Dependent,  Up: Machine Dependencies
+
+9.26 MSP 430 Dependent Features
+===============================
+
+* Menu:
+
+* MSP430 Options::              Options
+* MSP430 Syntax::               Syntax
+* MSP430 Floating Point::       Floating Point
+* MSP430 Directives::           MSP 430 Machine Directives
+* MSP430 Opcodes::              Opcodes
+* MSP430 Profiling Capability::	Profiling Capability
+
+
+File: as.info,  Node: MSP430 Options,  Next: MSP430 Syntax,  Up: MSP430-Dependent
+
+9.26.1 Options
+--------------
+
+`-m'
+     select the mpu arch. Currently has no effect.
+
+`-mP'
+     enables polymorph instructions handler.
+
+`-mQ'
+     enables relaxation at assembly time. DANGEROUS!
+
+
+
+File: as.info,  Node: MSP430 Syntax,  Next: MSP430 Floating Point,  Prev: MSP430 Options,  Up: MSP430-Dependent
+
+9.26.2 Syntax
+-------------
+
+* Menu:
+
+* MSP430-Macros::		Macros
+* MSP430-Chars::                Special Characters
+* MSP430-Regs::                 Register Names
+* MSP430-Ext::			Assembler Extensions
+
+
+File: as.info,  Node: MSP430-Macros,  Next: MSP430-Chars,  Up: MSP430 Syntax
+
+9.26.2.1 Macros
+...............
+
+The macro syntax used on the MSP 430 is like that described in the MSP
+430 Family Assembler Specification.  Normal `as' macros should still
+work.
+
+   Additional built-in macros are:
+
+`llo(exp)'
+     Extracts least significant word from 32-bit expression 'exp'.
+
+`lhi(exp)'
+     Extracts most significant word from 32-bit expression 'exp'.
+
+`hlo(exp)'
+     Extracts 3rd word from 64-bit expression 'exp'.
+
+`hhi(exp)'
+     Extracts 4rd word from 64-bit expression 'exp'.
+
+
+   They normally being used as an immediate source operand.
+         mov	#llo(1), r10	;	== mov	#1, r10
+         mov	#lhi(1), r10	;	== mov	#0, r10
+
+
+File: as.info,  Node: MSP430-Chars,  Next: MSP430-Regs,  Prev: MSP430-Macros,  Up: MSP430 Syntax
+
+9.26.2.2 Special Characters
+...........................
+
+`;' is the line comment character.
+
+   The character `$' in jump instructions indicates current location and
+implemented only for TI syntax compatibility.
+
+
+File: as.info,  Node: MSP430-Regs,  Next: MSP430-Ext,  Prev: MSP430-Chars,  Up: MSP430 Syntax
+
+9.26.2.3 Register Names
+.......................
+
+General-purpose registers are represented by predefined symbols of the
+form `rN' (for global registers), where N represents a number between
+`0' and `15'.  The leading letters may be in either upper or lower
+case; for example, `r13' and `R7' are both valid register names.
+
+   Register names `PC', `SP' and `SR' cannot be used as register names
+and will be treated as variables. Use `r0', `r1', and `r2' instead.
+
+
+File: as.info,  Node: MSP430-Ext,  Prev: MSP430-Regs,  Up: MSP430 Syntax
+
+9.26.2.4 Assembler Extensions
+.............................
+
+`@rN'
+     As destination operand being treated as `0(rn)'
+
+`0(rN)'
+     As source operand being treated as `@rn'
+
+`jCOND +N'
+     Skips next N bytes followed by jump instruction and equivalent to
+     `jCOND $+N+2'
+
+
+   Also, there are some instructions, which cannot be found in other
+assemblers.  These are branch instructions, which has different opcodes
+upon jump distance.  They all got PC relative addressing mode.
+
+`beq label'
+     A polymorph instruction which is `jeq label' in case if jump
+     distance within allowed range for cpu's jump instruction. If not,
+     this unrolls into a sequence of
+            jne $+6
+            br  label
+
+`bne label'
+     A polymorph instruction which is `jne label' or `jeq +4; br label'
+
+`blt label'
+     A polymorph instruction which is `jl label' or `jge +4; br label'
+
+`bltn label'
+     A polymorph instruction which is `jn label' or `jn +2; jmp +4; br
+     label'
+
+`bltu label'
+     A polymorph instruction which is `jlo label' or `jhs +2; br label'
+
+`bge label'
+     A polymorph instruction which is `jge label' or `jl +4; br label'
+
+`bgeu label'
+     A polymorph instruction which is `jhs label' or `jlo +4; br label'
+
+`bgt label'
+     A polymorph instruction which is `jeq +2; jge label' or `jeq +6;
+     jl  +4; br label'
+
+`bgtu label'
+     A polymorph instruction which is `jeq +2; jhs label' or `jeq +6;
+     jlo +4; br label'
+
+`bleu label'
+     A polymorph instruction which is `jeq label; jlo label' or `jeq
+     +2; jhs +4; br label'
+
+`ble label'
+     A polymorph instruction which is `jeq label; jl  label' or `jeq
+     +2; jge +4; br label'
+
+`jump label'
+     A polymorph instruction which is `jmp label' or `br label'
+
+
+File: as.info,  Node: MSP430 Floating Point,  Next: MSP430 Directives,  Prev: MSP430 Syntax,  Up: MSP430-Dependent
+
+9.26.3 Floating Point
+---------------------
+
+The MSP 430 family uses IEEE 32-bit floating-point numbers.
+
+
+File: as.info,  Node: MSP430 Directives,  Next: MSP430 Opcodes,  Prev: MSP430 Floating Point,  Up: MSP430-Dependent
+
+9.26.4 MSP 430 Machine Directives
+---------------------------------
+
+`.file'
+     This directive is ignored; it is accepted for compatibility with
+     other MSP 430 assemblers.
+
+          _Warning:_ in other versions of the GNU assembler, `.file' is
+          used for the directive called `.app-file' in the MSP 430
+          support.
+
+`.line'
+     This directive is ignored; it is accepted for compatibility with
+     other MSP 430 assemblers.
+
+`.arch'
+     Currently this directive is ignored; it is accepted for
+     compatibility with other MSP 430 assemblers.
+
+`.profiler'
+     This directive instructs assembler to add new profile entry to the
+     object file.
+
+
+
+File: as.info,  Node: MSP430 Opcodes,  Next: MSP430 Profiling Capability,  Prev: MSP430 Directives,  Up: MSP430-Dependent
+
+9.26.5 Opcodes
+--------------
+
+`as' implements all the standard MSP 430 opcodes.  No additional
+pseudo-instructions are needed on this family.
+
+   For information on the 430 machine instruction set, see `MSP430
+User's Manual, document slau049d', Texas Instrument, Inc.
+
+
+File: as.info,  Node: MSP430 Profiling Capability,  Prev: MSP430 Opcodes,  Up: MSP430-Dependent
+
+9.26.6 Profiling Capability
+---------------------------
+
+It is a performance hit to use gcc's profiling approach for this tiny
+target.  Even more - jtag hardware facility does not perform any
+profiling functions.  However we've got gdb's built-in simulator where
+we can do anything.
+
+   We define new section `.profiler' which holds all profiling
+information.  We define new pseudo operation `.profiler' which will
+instruct assembler to add new profile entry to the object file. Profile
+should take place at the present address.
+
+   Pseudo operation format:
+
+   `.profiler flags,function_to_profile [, cycle_corrector, extra]'
+
+   where:
+
+          `flags' is a combination of the following characters:
+
+    `s'
+          function entry
+
+    `x'
+          function exit
+
+    `i'
+          function is in init section
+
+    `f'
+          function is in fini section
+
+    `l'
+          library call
+
+    `c'
+          libc standard call
+
+    `d'
+          stack value demand
+
+    `I'
+          interrupt service routine
+
+    `P'
+          prologue start
+
+    `p'
+          prologue end
+
+    `E'
+          epilogue start
+
+    `e'
+          epilogue end
+
+    `j'
+          long jump / sjlj unwind
+
+    `a'
+          an arbitrary code fragment
+
+    `t'
+          extra parameter saved (a constant value like frame size)
+
+`function_to_profile'
+     a function address
+
+`cycle_corrector'
+     a value which should be added to the cycle counter, zero if
+     omitted.
+
+`extra'
+     any extra parameter, zero if omitted.
+
+
+   For example:
+     .global fxx
+     .type fxx,@function
+     fxx:
+     .LFrameOffset_fxx=0x08
+     .profiler "scdP", fxx     ; function entry.
+     			  ; we also demand stack value to be saved
+       push r11
+       push r10
+       push r9
+       push r8
+     .profiler "cdpt",fxx,0, .LFrameOffset_fxx  ; check stack value at this point
+     					  ; (this is a prologue end)
+     					  ; note, that spare var filled with
+     					  ; the farme size
+       mov r15,r8
+     ...
+     .profiler cdE,fxx         ; check stack
+       pop r8
+       pop r9
+       pop r10
+       pop r11
+     .profiler xcde,fxx,3      ; exit adds 3 to the cycle counter
+       ret                     ; cause 'ret' insn takes 3 cycles
+
+
+File: as.info,  Node: PDP-11-Dependent,  Next: PJ-Dependent,  Prev: SH64-Dependent,  Up: Machine Dependencies
+
+9.27 PDP-11 Dependent Features
+==============================
+
+* Menu:
+
+* PDP-11-Options::		Options
+* PDP-11-Pseudos::		Assembler Directives
+* PDP-11-Syntax::		DEC Syntax versus BSD Syntax
+* PDP-11-Mnemonics::		Instruction Naming
+* PDP-11-Synthetic::		Synthetic Instructions
+
+
+File: as.info,  Node: PDP-11-Options,  Next: PDP-11-Pseudos,  Up: PDP-11-Dependent
+
+9.27.1 Options
+--------------
+
+The PDP-11 version of `as' has a rich set of machine dependent options.
+
+9.27.1.1 Code Generation Options
+................................
+
+`-mpic | -mno-pic'
+     Generate position-independent (or position-dependent) code.
+
+     The default is to generate position-independent code.
+
+9.27.1.2 Instruction Set Extension Options
+..........................................
+
+These options enables or disables the use of extensions over the base
+line instruction set as introduced by the first PDP-11 CPU: the KA11.
+Most options come in two variants: a `-m'EXTENSION that enables
+EXTENSION, and a `-mno-'EXTENSION that disables EXTENSION.
+
+   The default is to enable all extensions.
+
+`-mall | -mall-extensions'
+     Enable all instruction set extensions.
+
+`-mno-extensions'
+     Disable all instruction set extensions.
+
+`-mcis | -mno-cis'
+     Enable (or disable) the use of the commercial instruction set,
+     which consists of these instructions: `ADDNI', `ADDN', `ADDPI',
+     `ADDP', `ASHNI', `ASHN', `ASHPI', `ASHP', `CMPCI', `CMPC',
+     `CMPNI', `CMPN', `CMPPI', `CMPP', `CVTLNI', `CVTLN', `CVTLPI',
+     `CVTLP', `CVTNLI', `CVTNL', `CVTNPI', `CVTNP', `CVTPLI', `CVTPL',
+     `CVTPNI', `CVTPN', `DIVPI', `DIVP', `L2DR', `L3DR', `LOCCI',
+     `LOCC', `MATCI', `MATC', `MOVCI', `MOVC', `MOVRCI', `MOVRC',
+     `MOVTCI', `MOVTC', `MULPI', `MULP', `SCANCI', `SCANC', `SKPCI',
+     `SKPC', `SPANCI', `SPANC', `SUBNI', `SUBN', `SUBPI', and `SUBP'.
+
+`-mcsm | -mno-csm'
+     Enable (or disable) the use of the `CSM' instruction.
+
+`-meis | -mno-eis'
+     Enable (or disable) the use of the extended instruction set, which
+     consists of these instructions: `ASHC', `ASH', `DIV', `MARK',
+     `MUL', `RTT', `SOB' `SXT', and `XOR'.
+
+`-mfis | -mkev11'
+`-mno-fis | -mno-kev11'
+     Enable (or disable) the use of the KEV11 floating-point
+     instructions: `FADD', `FDIV', `FMUL', and `FSUB'.
+
+`-mfpp | -mfpu | -mfp-11'
+`-mno-fpp | -mno-fpu | -mno-fp-11'
+     Enable (or disable) the use of FP-11 floating-point instructions:
+     `ABSF', `ADDF', `CFCC', `CLRF', `CMPF', `DIVF', `LDCFF', `LDCIF',
+     `LDEXP', `LDF', `LDFPS', `MODF', `MULF', `NEGF', `SETD', `SETF',
+     `SETI', `SETL', `STCFF', `STCFI', `STEXP', `STF', `STFPS', `STST',
+     `SUBF', and `TSTF'.
+
+`-mlimited-eis | -mno-limited-eis'
+     Enable (or disable) the use of the limited extended instruction
+     set: `MARK', `RTT', `SOB', `SXT', and `XOR'.
+
+     The -mno-limited-eis options also implies -mno-eis.
+
+`-mmfpt | -mno-mfpt'
+     Enable (or disable) the use of the `MFPT' instruction.
+
+`-mmultiproc | -mno-multiproc'
+     Enable (or disable) the use of multiprocessor instructions:
+     `TSTSET' and `WRTLCK'.
+
+`-mmxps | -mno-mxps'
+     Enable (or disable) the use of the `MFPS' and `MTPS' instructions.
+
+`-mspl | -mno-spl'
+     Enable (or disable) the use of the `SPL' instruction.
+
+     Enable (or disable) the use of the microcode instructions: `LDUB',
+     `MED', and `XFC'.
+
+9.27.1.3 CPU Model Options
+..........................
+
+These options enable the instruction set extensions supported by a
+particular CPU, and disables all other extensions.
+
+`-mka11'
+     KA11 CPU.  Base line instruction set only.
+
+`-mkb11'
+     KB11 CPU.  Enable extended instruction set and `SPL'.
+
+`-mkd11a'
+     KD11-A CPU.  Enable limited extended instruction set.
+
+`-mkd11b'
+     KD11-B CPU.  Base line instruction set only.
+
+`-mkd11d'
+     KD11-D CPU.  Base line instruction set only.
+
+`-mkd11e'
+     KD11-E CPU.  Enable extended instruction set, `MFPS', and `MTPS'.
+
+`-mkd11f | -mkd11h | -mkd11q'
+     KD11-F, KD11-H, or KD11-Q CPU.  Enable limited extended
+     instruction set, `MFPS', and `MTPS'.
+
+`-mkd11k'
+     KD11-K CPU.  Enable extended instruction set, `LDUB', `MED',
+     `MFPS', `MFPT', `MTPS', and `XFC'.
+
+`-mkd11z'
+     KD11-Z CPU.  Enable extended instruction set, `CSM', `MFPS',
+     `MFPT', `MTPS', and `SPL'.
+
+`-mf11'
+     F11 CPU.  Enable extended instruction set, `MFPS', `MFPT', and
+     `MTPS'.
+
+`-mj11'
+     J11 CPU.  Enable extended instruction set, `CSM', `MFPS', `MFPT',
+     `MTPS', `SPL', `TSTSET', and `WRTLCK'.
+
+`-mt11'
+     T11 CPU.  Enable limited extended instruction set, `MFPS', and
+     `MTPS'.
+
+9.27.1.4 Machine Model Options
+..............................
+
+These options enable the instruction set extensions supported by a
+particular machine model, and disables all other extensions.
+
+`-m11/03'
+     Same as `-mkd11f'.
+
+`-m11/04'
+     Same as `-mkd11d'.
+
+`-m11/05 | -m11/10'
+     Same as `-mkd11b'.
+
+`-m11/15 | -m11/20'
+     Same as `-mka11'.
+
+`-m11/21'
+     Same as `-mt11'.
+
+`-m11/23 | -m11/24'
+     Same as `-mf11'.
+
+`-m11/34'
+     Same as `-mkd11e'.
+
+`-m11/34a'
+     Ame as `-mkd11e' `-mfpp'.
+
+`-m11/35 | -m11/40'
+     Same as `-mkd11a'.
+
+`-m11/44'
+     Same as `-mkd11z'.
+
+`-m11/45 | -m11/50 | -m11/55 | -m11/70'
+     Same as `-mkb11'.
+
+`-m11/53 | -m11/73 | -m11/83 | -m11/84 | -m11/93 | -m11/94'
+     Same as `-mj11'.
+
+`-m11/60'
+     Same as `-mkd11k'.
+
+
+File: as.info,  Node: PDP-11-Pseudos,  Next: PDP-11-Syntax,  Prev: PDP-11-Options,  Up: PDP-11-Dependent
+
+9.27.2 Assembler Directives
+---------------------------
+
+The PDP-11 version of `as' has a few machine dependent assembler
+directives.
+
+`.bss'
+     Switch to the `bss' section.
+
+`.even'
+     Align the location counter to an even number.
+
+
+File: as.info,  Node: PDP-11-Syntax,  Next: PDP-11-Mnemonics,  Prev: PDP-11-Pseudos,  Up: PDP-11-Dependent
+
+9.27.3 PDP-11 Assembly Language Syntax
+--------------------------------------
+
+`as' supports both DEC syntax and BSD syntax.  The only difference is
+that in DEC syntax, a `#' character is used to denote an immediate
+constants, while in BSD syntax the character for this purpose is `$'.
+
+   general-purpose registers are named `r0' through `r7'.  Mnemonic
+alternatives for `r6' and `r7' are `sp' and `pc', respectively.
+
+   Floating-point registers are named `ac0' through `ac3', or
+alternatively `fr0' through `fr3'.
+
+   Comments are started with a `#' or a `/' character, and extend to
+the end of the line.  (FIXME: clash with immediates?)
+
+
+File: as.info,  Node: PDP-11-Mnemonics,  Next: PDP-11-Synthetic,  Prev: PDP-11-Syntax,  Up: PDP-11-Dependent
+
+9.27.4 Instruction Naming
+-------------------------
+
+Some instructions have alternative names.
+
+`BCC'
+     `BHIS'
+
+`BCS'
+     `BLO'
+
+`L2DR'
+     `L2D'
+
+`L3DR'
+     `L3D'
+
+`SYS'
+     `TRAP'
+
+
+File: as.info,  Node: PDP-11-Synthetic,  Prev: PDP-11-Mnemonics,  Up: PDP-11-Dependent
+
+9.27.5 Synthetic Instructions
+-----------------------------
+
+The `JBR' and `J'CC synthetic instructions are not supported yet.
+
+
+File: as.info,  Node: PJ-Dependent,  Next: PPC-Dependent,  Prev: PDP-11-Dependent,  Up: Machine Dependencies
+
+9.28 picoJava Dependent Features
+================================
+
+* Menu:
+
+* PJ Options::              Options
+
+
+File: as.info,  Node: PJ Options,  Up: PJ-Dependent
+
+9.28.1 Options
+--------------
+
+`as' has two additional command-line options for the picoJava
+architecture.
+`-ml'
+     This option selects little endian data output.
+
+`-mb'
+     This option selects big endian data output.
+
+
+File: as.info,  Node: PPC-Dependent,  Next: S/390-Dependent,  Prev: PJ-Dependent,  Up: Machine Dependencies
+
+9.29 PowerPC Dependent Features
+===============================
+
+* Menu:
+
+* PowerPC-Opts::                Options
+* PowerPC-Pseudo::              PowerPC Assembler Directives
+
+
+File: as.info,  Node: PowerPC-Opts,  Next: PowerPC-Pseudo,  Up: PPC-Dependent
+
+9.29.1 Options
+--------------
+
+The PowerPC chip family includes several successive levels, using the
+same core instruction set, but including a few additional instructions
+at each level.  There are exceptions to this however.  For details on
+what instructions each variant supports, please see the chip's
+architecture reference manual.
+
+   The following table lists all available PowerPC options.
+
+`-mpwrx | -mpwr2'
+     Generate code for POWER/2 (RIOS2).
+
+`-mpwr'
+     Generate code for POWER (RIOS1)
+
+`-m601'
+     Generate code for PowerPC 601.
+
+`-mppc, -mppc32, -m603, -m604'
+     Generate code for PowerPC 603/604.
+
+`-m403, -m405'
+     Generate code for PowerPC 403/405.
+
+`-m440'
+     Generate code for PowerPC 440.  BookE and some 405 instructions.
+
+`-m476'
+     Generate code for PowerPC 476.
+
+`-m7400, -m7410, -m7450, -m7455'
+     Generate code for PowerPC 7400/7410/7450/7455.
+
+`-m750cl'
+     Generate code for PowerPC 750CL.
+
+`-mppc64, -m620'
+     Generate code for PowerPC 620/625/630.
+
+`-me500, -me500x2'
+     Generate code for Motorola e500 core complex.
+
+`-mspe'
+     Generate code for Motorola SPE instructions.
+
+`-mppc64bridge'
+     Generate code for PowerPC 64, including bridge insns.
+
+`-mbooke'
+     Generate code for 32-bit BookE.
+
+`-ma2'
+     Generate code for A2 architecture.
+
+`-me300'
+     Generate code for PowerPC e300 family.
+
+`-maltivec'
+     Generate code for processors with AltiVec instructions.
+
+`-mvsx'
+     Generate code for processors with Vector-Scalar (VSX) instructions.
+
+`-mpower4'
+     Generate code for Power4 architecture.
+
+`-mpower5'
+     Generate code for Power5 architecture.
+
+`-mpower6'
+     Generate code for Power6 architecture.
+
+`-mpower7'
+     Generate code for Power7 architecture.
+
+`-mcell'
+     Generate code for Cell Broadband Engine architecture.
+
+`-mcom'
+     Generate code Power/PowerPC common instructions.
+
+`-many'
+     Generate code for any architecture (PWR/PWRX/PPC).
+
+`-mregnames'
+     Allow symbolic names for registers.
+
+`-mno-regnames'
+     Do not allow symbolic names for registers.
+
+`-mrelocatable'
+     Support for GCC's -mrelocatable option.
+
+`-mrelocatable-lib'
+     Support for GCC's -mrelocatable-lib option.
+
+`-memb'
+     Set PPC_EMB bit in ELF flags.
+
+`-mlittle, -mlittle-endian'
+     Generate code for a little endian machine.
+
+`-mbig, -mbig-endian'
+     Generate code for a big endian machine.
+
+`-msolaris'
+     Generate code for Solaris.
+
+`-mno-solaris'
+     Do not generate code for Solaris.
+
+
+File: as.info,  Node: PowerPC-Pseudo,  Prev: PowerPC-Opts,  Up: PPC-Dependent
+
+9.29.2 PowerPC Assembler Directives
+-----------------------------------
+
+A number of assembler directives are available for PowerPC.  The
+following table is far from complete.
+
+`.machine "string"'
+     This directive allows you to change the machine for which code is
+     generated.  `"string"' may be any of the -m cpu selection options
+     (without the -m) enclosed in double quotes, `"push"', or `"pop"'.
+     `.machine "push"' saves the currently selected cpu, which may be
+     restored with `.machine "pop"'.
+
+
+File: as.info,  Node: S/390-Dependent,  Next: SCORE-Dependent,  Prev: PPC-Dependent,  Up: Machine Dependencies
+
+9.30 IBM S/390 Dependent Features
+=================================
+
+   The s390 version of `as' supports two architectures modes and seven
+chip levels. The architecture modes are the Enterprise System
+Architecture (ESA) and the newer z/Architecture mode. The chip levels
+are g5, g6, z900, z990, z9-109, z9-ec and z10.
+
+* Menu:
+
+* s390 Options::                Command-line Options.
+* s390 Characters::		Special Characters.
+* s390 Syntax::                 Assembler Instruction syntax.
+* s390 Directives::             Assembler Directives.
+* s390 Floating Point::         Floating Point.
+
+
+File: as.info,  Node: s390 Options,  Next: s390 Characters,  Up: S/390-Dependent
+
+9.30.1 Options
+--------------
+
+The following table lists all available s390 specific options:
+
+`-m31 | -m64'
+     Select 31- or 64-bit ABI implying a word size of 32- or 64-bit.
+
+     These options are only available with the ELF object file format,
+     and require that the necessary BFD support has been included (on a
+     31-bit platform you must add -enable-64-bit-bfd on the call to the
+     configure script to enable 64-bit usage and use s390x as target
+     platform).
+
+`-mesa | -mzarch'
+     Select the architecture mode, either the Enterprise System
+     Architecture (esa) mode or the z/Architecture mode (zarch).
+
+     The 64-bit instructions are only available with the z/Architecture
+     mode.  The combination of `-m64' and `-mesa' results in a warning
+     message.
+
+`-march=CPU'
+     This option specifies the target processor. The following
+     processor names are recognized: `g5', `g6', `z900', `z990',
+     `z9-109', `z9-ec' and `z10'.  Assembling an instruction that is
+     not supported on the target processor results in an error message.
+     Do not specify `g5' or `g6' with `-mzarch'.
+
+`-mregnames'
+     Allow symbolic names for registers.
+
+`-mno-regnames'
+     Do not allow symbolic names for registers.
+
+`-mwarn-areg-zero'
+     Warn whenever the operand for a base or index register has been
+     specified but evaluates to zero. This can indicate the misuse of
+     general purpose register 0 as an address register.
+
+
+
+File: as.info,  Node: s390 Characters,  Next: s390 Syntax,  Prev: s390 Options,  Up: S/390-Dependent
+
+9.30.2 Special Characters
+-------------------------
+
+`#' is the line comment character.
+
+
+File: as.info,  Node: s390 Syntax,  Next: s390 Directives,  Prev: s390 Characters,  Up: S/390-Dependent
+
+9.30.3 Instruction syntax
+-------------------------
+
+The assembler syntax closely follows the syntax outlined in Enterprise
+Systems Architecture/390 Principles of Operation (SA22-7201) and the
+z/Architecture Principles of Operation (SA22-7832).
+
+   Each instruction has two major parts, the instruction mnemonic and
+the instruction operands. The instruction format varies.
+
+* Menu:
+
+* s390 Register::               Register Naming
+* s390 Mnemonics::              Instruction Mnemonics
+* s390 Operands::               Instruction Operands
+* s390 Formats::                Instruction Formats
+* s390 Aliases::		Instruction Aliases
+* s390 Operand Modifier::       Instruction Operand Modifier
+* s390 Instruction Marker::     Instruction Marker
+* s390 Literal Pool Entries::   Literal Pool Entries
+
+
+File: as.info,  Node: s390 Register,  Next: s390 Mnemonics,  Up: s390 Syntax
+
+9.30.3.1 Register naming
+........................
+
+The `as' recognizes a number of predefined symbols for the various
+processor registers. A register specification in one of the instruction
+formats is an unsigned integer between 0 and 15. The specific
+instruction and the position of the register in the instruction format
+denotes the type of the register. The register symbols are prefixed with
+`%':
+
+     %rN   the 16 general purpose registers, 0 <= N <= 15
+     %fN   the 16 floating point registers, 0 <= N <= 15
+     %aN   the 16 access registers, 0 <= N <= 15
+     %cN   the 16 control registers, 0 <= N <= 15
+     %lit  an alias for the general purpose register %r13
+     %sp   an alias for the general purpose register %r15
+
+
+File: as.info,  Node: s390 Mnemonics,  Next: s390 Operands,  Prev: s390 Register,  Up: s390 Syntax
+
+9.30.3.2 Instruction Mnemonics
+..............................
+
+All instructions documented in the Principles of Operation are supported
+with the mnemonic and order of operands as described.  The instruction
+mnemonic identifies the instruction format (*note s390 Formats::) and
+the specific operation code for the instruction.  For example, the `lr'
+mnemonic denotes the instruction format `RR' with the operation code
+`0x18'.
+
+   The definition of the various mnemonics follows a scheme, where the
+first character usually hint at the type of the instruction:
+
+     a          add instruction, for example `al' for add logical 32-bit
+     b          branch instruction, for example `bc' for branch on condition
+     c          compare or convert instruction, for example `cr' for compare
+                register 32-bit
+     d          divide instruction, for example `dlr' devide logical register
+                64-bit to 32-bit
+     i          insert instruction, for example `ic' insert character
+     l          load instruction, for example `ltr' load and test register
+     mv         move instruction, for example `mvc' move character
+     m          multiply instruction, for example `mh' multiply halfword
+     n          and instruction, for example `ni' and immediate
+     o          or instruction, for example `oc' or character
+     sla, sll   shift left single instruction
+     sra, srl   shift right single instruction
+     st         store instruction, for example `stm' store multiple
+     s          subtract instruction, for example `slr' subtract
+                logical 32-bit
+     t          test or translate instruction, of example `tm' test under mask
+     x          exclusive or instruction, for example `xc' exclusive or
+                character
+
+   Certain characters at the end of the mnemonic may describe a property
+of the instruction:
+
+     c   the instruction uses a 8-bit character operand
+     f   the instruction extends a 32-bit operand to 64 bit
+     g   the operands are treated as 64-bit values
+     h   the operand uses a 16-bit halfword operand
+     i   the instruction uses an immediate operand
+     l   the instruction uses unsigned, logical operands
+     m   the instruction uses a mask or operates on multiple values
+     r   if r is the last character, the instruction operates on registers
+     y   the instruction uses 20-bit displacements
+
+   There are many exceptions to the scheme outlined in the above lists,
+in particular for the priviledged instructions. For non-priviledged
+instruction it works quite well, for example the instruction `clgfr' c:
+compare instruction, l: unsigned operands, g: 64-bit operands, f: 32-
+to 64-bit extension, r: register operands. The instruction compares an
+64-bit value in a register with the zero extended 32-bit value from a
+second register.  For a complete list of all mnemonics see appendix B
+in the Principles of Operation.
+
+
+File: as.info,  Node: s390 Operands,  Next: s390 Formats,  Prev: s390 Mnemonics,  Up: s390 Syntax
+
+9.30.3.3 Instruction Operands
+.............................
+
+Instruction operands can be grouped into three classes, operands located
+in registers, immediate operands, and operands in storage.
+
+   A register operand can be located in general, floating-point, access,
+or control register. The register is identified by a four-bit field.
+The field containing the register operand is called the R field.
+
+   Immediate operands are contained within the instruction and can have
+8, 16 or 32 bits. The field containing the immediate operand is called
+the I field. Dependent on the instruction the I field is either signed
+or unsigned.
+
+   A storage operand consists of an address and a length. The address
+of a storage operands can be specified in any of these ways:
+
+   * The content of a single general R
+
+   * The sum of the content of a general register called the base
+     register B plus the content of a displacement field D
+
+   * The sum of the contents of two general registers called the index
+     register X and the base register B plus the content of a
+     displacement field
+
+   * The sum of the current instruction address and a 32-bit signed
+     immediate field multiplied by two.
+
+   The length of a storage operand can be:
+
+   * Implied by the instruction
+
+   * Specified by a bitmask
+
+   * Specified by a four-bit or eight-bit length field L
+
+   * Specified by the content of a general register
+
+   The notation for storage operand addresses formed from multiple
+fields is as follows:
+
+`Dn(Bn)'
+     the address for operand number n is formed from the content of
+     general register Bn called the base register and the displacement
+     field Dn.
+
+`Dn(Xn,Bn)'
+     the address for operand number n is formed from the content of
+     general register Xn called the index register, general register Bn
+     called the base register and the displacement field Dn.
+
+`Dn(Ln,Bn)'
+     the address for operand number n is formed from the content of
+     general regiser Bn called the base register and the displacement
+     field Dn.  The length of the operand n is specified by the field
+     Ln.
+
+   The base registers Bn and the index registers Xn of a storage
+operand can be skipped. If Bn and Xn are skipped, a zero will be stored
+to the operand field. The notation changes as follows:
+
+     full notation        short notation
+     ------------------------------------------ 
+     Dn(0,Bn)             Dn(Bn)
+     Dn(0,0)              Dn
+     Dn(0)                Dn
+     Dn(Ln,0)             Dn(Ln)
+
+
+File: as.info,  Node: s390 Formats,  Next: s390 Aliases,  Prev: s390 Operands,  Up: s390 Syntax
+
+9.30.3.4 Instruction Formats
+............................
+
+The Principles of Operation manuals lists 26 instruction formats where
+some of the formats have multiple variants. For the `.insn' pseudo
+directive the assembler recognizes some of the formats.  Typically, the
+most general variant of the instruction format is used by the `.insn'
+directive.
+
+   The following table lists the abbreviations used in the table of
+instruction formats:
+
+     OpCode / OpCd   Part of the op code.
+     Bx              Base register number for operand x.
+     Dx              Displacement for operand x.
+     DLx             Displacement lower 12 bits for operand x.
+     DHx             Displacement higher 8-bits for operand x.
+     Rx              Register number for operand x.
+     Xx              Index register number for operand x.
+     Ix              Signed immediate for operand x.
+     Ux              Unsigned immediate for operand x.
+
+   An instruction is two, four, or six bytes in length and must be
+aligned on a 2 byte boundary. The first two bits of the instruction
+specify the length of the instruction, 00 indicates a two byte
+instruction, 01 and 10 indicates a four byte instruction, and 11
+indicates a six byte instruction.
+
+   The following table lists the s390 instruction formats that are
+available with the `.insn' pseudo directive:
+
+`E format'
+     +-------------+
+     |    OpCode   |
+     +-------------+
+     0            15
+
+`RI format: <insn> R1,I2'
+     +--------+----+----+------------------+
+     | OpCode | R1 |OpCd|        I2        |
+     +--------+----+----+------------------+
+     0        8    12   16                31
+
+`RIE format: <insn> R1,R3,I2'
+     +--------+----+----+------------------+--------+--------+
+     | OpCode | R1 | R3 |        I2        |////////| OpCode |
+     +--------+----+----+------------------+--------+--------+
+     0        8    12   16                 32       40      47
+
+`RIL format: <insn> R1,I2'
+     +--------+----+----+------------------------------------+
+     | OpCode | R1 |OpCd|                  I2                |
+     +--------+----+----+------------------------------------+
+     0        8    12   16                                  47
+
+`RILU format: <insn> R1,U2'
+     +--------+----+----+------------------------------------+
+     | OpCode | R1 |OpCd|                  U2                |
+     +--------+----+----+------------------------------------+
+     0        8    12   16                                  47
+
+`RIS format: <insn> R1,I2,M3,D4(B4)'
+     +--------+----+----+----+-------------+--------+--------+
+     | OpCode | R1 | M3 | B4 |     D4      |   I2   | Opcode |
+     +--------+----+----+----+-------------+--------+--------+
+     0        8    12   16   20            32       36      47
+
+`RR format: <insn> R1,R2'
+     +--------+----+----+
+     | OpCode | R1 | R2 |
+     +--------+----+----+
+     0        8    12  15
+
+`RRE format: <insn> R1,R2'
+     +------------------+--------+----+----+
+     |      OpCode      |////////| R1 | R2 |
+     +------------------+--------+----+----+
+     0                  16       24   28  31
+
+`RRF format: <insn> R1,R2,R3,M4'
+     +------------------+----+----+----+----+
+     |      OpCode      | R3 | M4 | R1 | R2 |
+     +------------------+----+----+----+----+
+     0                  16   20   24   28  31
+
+`RRS format: <insn> R1,R2,M3,D4(B4)'
+     +--------+----+----+----+-------------+----+----+--------+
+     | OpCode | R1 | R3 | B4 |     D4      | M3 |////| OpCode |
+     +--------+----+----+----+-------------+----+----+--------+
+     0        8    12   16   20            32   36   40      47
+
+`RS format: <insn> R1,R3,D2(B2)'
+     +--------+----+----+----+-------------+
+     | OpCode | R1 | R3 | B2 |     D2      |
+     +--------+----+----+----+-------------+
+     0        8    12   16   20           31
+
+`RSE format: <insn> R1,R3,D2(B2)'
+     +--------+----+----+----+-------------+--------+--------+
+     | OpCode | R1 | R3 | B2 |     D2      |////////| OpCode |
+     +--------+----+----+----+-------------+--------+--------+
+     0        8    12   16   20            32       40      47
+
+`RSI format: <insn> R1,R3,I2'
+     +--------+----+----+------------------------------------+
+     | OpCode | R1 | R3 |                  I2                |
+     +--------+----+----+------------------------------------+
+     0        8    12   16                                  47
+
+`RSY format: <insn> R1,R3,D2(B2)'
+     +--------+----+----+----+-------------+--------+--------+
+     | OpCode | R1 | R3 | B2 |    DL2      |  DH2   | OpCode |
+     +--------+----+----+----+-------------+--------+--------+
+     0        8    12   16   20            32       40      47
+
+`RX format: <insn> R1,D2(X2,B2)'
+     +--------+----+----+----+-------------+
+     | OpCode | R1 | X2 | B2 |     D2      |
+     +--------+----+----+----+-------------+
+     0        8    12   16   20           31
+
+`RXE format: <insn> R1,D2(X2,B2)'
+     +--------+----+----+----+-------------+--------+--------+
+     | OpCode | R1 | X2 | B2 |     D2      |////////| OpCode |
+     +--------+----+----+----+-------------+--------+--------+
+     0        8    12   16   20            32       40      47
+
+`RXF format: <insn> R1,R3,D2(X2,B2)'
+     +--------+----+----+----+-------------+----+---+--------+
+     | OpCode | R3 | X2 | B2 |     D2      | R1 |///| OpCode |
+     +--------+----+----+----+-------------+----+---+--------+
+     0        8    12   16   20            32   36  40      47
+
+`RXY format: <insn> R1,D2(X2,B2)'
+     +--------+----+----+----+-------------+--------+--------+
+     | OpCode | R1 | X2 | B2 |     DL2     |   DH2  | OpCode |
+     +--------+----+----+----+-------------+--------+--------+
+     0        8    12   16   20            32   36   40      47
+
+`S format: <insn> D2(B2)'
+     +------------------+----+-------------+
+     |      OpCode      | B2 |     D2      |
+     +------------------+----+-------------+
+     0                  16   20           31
+
+`SI format: <insn> D1(B1),I2'
+     +--------+---------+----+-------------+
+     | OpCode |   I2    | B1 |     D1      |
+     +--------+---------+----+-------------+
+     0        8         16   20           31
+
+`SIY format: <insn> D1(B1),U2'
+     +--------+---------+----+-------------+--------+--------+
+     | OpCode |   I2    | B1 |     DL1     |  DH1   | OpCode |
+     +--------+---------+----+-------------+--------+--------+
+     0        8         16   20            32   36   40      47
+
+`SIL format: <insn> D1(B1),I2'
+     +------------------+----+-------------+-----------------+
+     |      OpCode      | B1 |      D1     |       I2        |
+     +------------------+----+-------------+-----------------+
+     0                  16   20            32               47
+
+`SS format: <insn> D1(R1,B1),D2(B3),R3'
+     +--------+----+----+----+-------------+----+------------+
+     | OpCode | R1 | R3 | B1 |     D1      | B2 |     D2     |
+     +--------+----+----+----+-------------+----+------------+
+     0        8    12   16   20            32   36          47
+
+`SSE format: <insn> D1(B1),D2(B2)'
+     +------------------+----+-------------+----+------------+
+     |      OpCode      | B1 |     D1      | B2 |     D2     |
+     +------------------+----+-------------+----+------------+
+     0        8    12   16   20            32   36           47
+
+`SSF format: <insn> D1(B1),D2(B2),R3'
+     +--------+----+----+----+-------------+----+------------+
+     | OpCode | R3 |OpCd| B1 |     D1      | B2 |     D2     |
+     +--------+----+----+----+-------------+----+------------+
+     0        8    12   16   20            32   36           47
+
+
+   For the complete list of all instruction format variants see the
+Principles of Operation manuals.
+
+
+File: as.info,  Node: s390 Aliases,  Next: s390 Operand Modifier,  Prev: s390 Formats,  Up: s390 Syntax
+
+9.30.3.5 Instruction Aliases
+............................
+
+A specific bit pattern can have multiple mnemonics, for example the bit
+pattern `0xa7000000' has the mnemonics `tmh' and `tmlh'. In addition,
+there are a number of mnemonics recognized by `as' that are not present
+in the Principles of Operation.  These are the short forms of the
+branch instructions, where the condition code mask operand is encoded
+in the mnemonic. This is relevant for the branch instructions, the
+compare and branch instructions, and the compare and trap instructions.
+
+   For the branch instructions there are 20 condition code strings that
+can be used as part of the mnemonic in place of a mask operand in the
+instruction format:
+
+     instruction          short form
+     ------------------------------------------ 
+     bcr   M1,R2          b<m>r  R2
+     bc    M1,D2(X2,B2)   b<m>   D2(X2,B2)
+     brc   M1,I2          j<m>   I2
+     brcl  M1,I2          jg<m>  I2
+
+   In the mnemonic for a branch instruction the condition code string
+<m> can be any of the following:
+
+     o     jump on overflow / if ones
+     h     jump on A high
+     p     jump on plus
+     nle   jump on not low or equal
+     l     jump on A low
+     m     jump on minus
+     nhe   jump on not high or equal
+     lh    jump on low or high
+     ne    jump on A not equal B
+     nz    jump on not zero / if not zeros
+     e     jump on A equal B
+     z     jump on zero / if zeroes
+     nlh   jump on not low or high
+     he    jump on high or equal
+     nl    jump on A not low
+     nm    jump on not minus / if not mixed
+     le    jump on low or equal
+     nh    jump on A not high
+     np    jump on not plus
+     no    jump on not overflow / if not ones
+
+   For the compare and branch, and compare and trap instructions there
+are 12 condition code strings that can be used as part of the mnemonic
+in place of a mask operand in the instruction format:
+
+     instruction                 short form
+     -------------------------------------------------------- 
+     crb    R1,R2,M3,D4(B4)      crb<m>    R1,R2,D4(B4)
+     cgrb   R1,R2,M3,D4(B4)      cgrb<m>   R1,R2,D4(B4)
+     crj    R1,R2,M3,I4          crj<m>    R1,R2,I4
+     cgrj   R1,R2,M3,I4          cgrj<m>   R1,R2,I4
+     cib    R1,I2,M3,D4(B4)      cib<m>    R1,I2,D4(B4)
+     cgib   R1,I2,M3,D4(B4)      cgib<m>   R1,I2,D4(B4)
+     cij    R1,I2,M3,I4          cij<m>    R1,I2,I4
+     cgij   R1,I2,M3,I4          cgij<m>   R1,I2,I4
+     crt    R1,R2,M3             crt<m>    R1,R2
+     cgrt   R1,R2,M3             cgrt<m>   R1,R2
+     cit    R1,I2,M3             cit<m>    R1,I2
+     cgit   R1,I2,M3             cgit<m>   R1,I2
+     clrb   R1,R2,M3,D4(B4)      clrb<m>   R1,R2,D4(B4)
+     clgrb  R1,R2,M3,D4(B4)      clgrb<m>  R1,R2,D4(B4)
+     clrj   R1,R2,M3,I4          clrj<m>   R1,R2,I4
+     clgrj  R1,R2,M3,I4          clgrj<m>  R1,R2,I4
+     clib   R1,I2,M3,D4(B4)      clib<m>   R1,I2,D4(B4)
+     clgib  R1,I2,M3,D4(B4)      clgib<m>  R1,I2,D4(B4)
+     clij   R1,I2,M3,I4          clij<m>   R1,I2,I4
+     clgij  R1,I2,M3,I4          clgij<m>  R1,I2,I4
+     clrt   R1,R2,M3             clrt<m>   R1,R2
+     clgrt  R1,R2,M3             clgrt<m>  R1,R2
+     clfit  R1,I2,M3             clfit<m>  R1,I2
+     clgit  R1,I2,M3             clgit<m>  R1,I2
+
+   In the mnemonic for a compare and branch and compare and trap
+instruction the condition code string <m> can be any of the following:
+
+     h     jump on A high
+     nle   jump on not low or equal
+     l     jump on A low
+     nhe   jump on not high or equal
+     ne    jump on A not equal B
+     lh    jump on low or high
+     e     jump on A equal B
+     nlh   jump on not low or high
+     nl    jump on A not low
+     he    jump on high or equal
+     nh    jump on A not high
+     le    jump on low or equal
+
+
+File: as.info,  Node: s390 Operand Modifier,  Next: s390 Instruction Marker,  Prev: s390 Aliases,  Up: s390 Syntax
+
+9.30.3.6 Instruction Operand Modifier
+.....................................
+
+If a symbol modifier is attached to a symbol in an expression for an
+instruction operand field, the symbol term is replaced with a reference
+to an object in the global offset table (GOT) or the procedure linkage
+table (PLT). The following expressions are allowed: `symbol@modifier +
+constant', `symbol@modifier + label + constant', and `symbol@modifier -
+label + constant'.  The term `symbol' is the symbol that will be
+entered into the GOT or PLT, `label' is a local label, and `constant'
+is an arbitrary expression that the assembler can evaluate to a
+constant value.
+
+   The term `(symbol + constant1)@modifier +/- label + constant2' is
+also accepted but a warning message is printed and the term is
+converted to `symbol@modifier +/- label + constant1 + constant2'.
+
+`@got'
+`@got12'
+     The @got modifier can be used for displacement fields, 16-bit
+     immediate fields and 32-bit pc-relative immediate fields. The
+     @got12 modifier is synonym to @got. The symbol is added to the
+     GOT. For displacement fields and 16-bit immediate fields the
+     symbol term is replaced with the offset from the start of the GOT
+     to the GOT slot for the symbol.  For a 32-bit pc-relative field
+     the pc-relative offset to the GOT slot from the current
+     instruction address is used.
+
+`@gotent'
+     The @gotent modifier can be used for 32-bit pc-relative immediate
+     fields.  The symbol is added to the GOT and the symbol term is
+     replaced with the pc-relative offset from the current instruction
+     to the GOT slot for the symbol.
+
+`@gotoff'
+     The @gotoff modifier can be used for 16-bit immediate fields. The
+     symbol term is replaced with the offset from the start of the GOT
+     to the address of the symbol.
+
+`@gotplt'
+     The @gotplt modifier can be used for displacement fields, 16-bit
+     immediate fields, and 32-bit pc-relative immediate fields. A
+     procedure linkage table entry is generated for the symbol and a
+     jump slot for the symbol is added to the GOT. For displacement
+     fields and 16-bit immediate fields the symbol term is replaced
+     with the offset from the start of the GOT to the jump slot for the
+     symbol. For a 32-bit pc-relative field the pc-relative offset to
+     the jump slot from the current instruction address is used.
+
+`@plt'
+     The @plt modifier can be used for 16-bit and 32-bit pc-relative
+     immediate fields. A procedure linkage table entry is generated for
+     the symbol.  The symbol term is replaced with the relative offset
+     from the current instruction to the PLT entry for the symbol.
+
+`@pltoff'
+     The @pltoff modifier can be used for 16-bit immediate fields. The
+     symbol term is replaced with the offset from the start of the PLT
+     to the address of the symbol.
+
+`@gotntpoff'
+     The @gotntpoff modifier can be used for displacement fields. The
+     symbol is added to the static TLS block and the negated offset to
+     the symbol in the static TLS block is added to the GOT. The symbol
+     term is replaced with the offset to the GOT slot from the start of
+     the GOT.
+
+`@indntpoff'
+     The @indntpoff modifier can be used for 32-bit pc-relative
+     immediate fields. The symbol is added to the static TLS block and
+     the negated offset to the symbol in the static TLS block is added
+     to the GOT. The symbol term is replaced with the pc-relative
+     offset to the GOT slot from the current instruction address.
+
+   For more information about the thread local storage modifiers
+`gotntpoff' and `indntpoff' see the ELF extension documentation `ELF
+Handling For Thread-Local Storage'.
+
+
+File: as.info,  Node: s390 Instruction Marker,  Next: s390 Literal Pool Entries,  Prev: s390 Operand Modifier,  Up: s390 Syntax
+
+9.30.3.7 Instruction Marker
+...........................
+
+The thread local storage instruction markers are used by the linker to
+perform code optimization.
+
+`:tls_load'
+     The :tls_load marker is used to flag the load instruction in the
+     initial exec TLS model that retrieves the offset from the thread
+     pointer to a thread local storage variable from the GOT.
+
+`:tls_gdcall'
+     The :tls_gdcall marker is used to flag the branch-and-save
+     instruction to the __tls_get_offset function in the global dynamic
+     TLS model.
+
+`:tls_ldcall'
+     The :tls_ldcall marker is used to flag the branch-and-save
+     instruction to the __tls_get_offset function in the local dynamic
+     TLS model.
+
+   For more information about the thread local storage instruction
+marker and the linker optimizations see the ELF extension documentation
+`ELF Handling For Thread-Local Storage'.
+
+
+File: as.info,  Node: s390 Literal Pool Entries,  Prev: s390 Instruction Marker,  Up: s390 Syntax
+
+9.30.3.8 Literal Pool Entries
+.............................
+
+A literal pool is a collection of values. To access the values a pointer
+to the literal pool is loaded to a register, the literal pool register.
+Usually, register %r13 is used as the literal pool register (*note s390
+Register::). Literal pool entries are created by adding the suffix
+:lit1, :lit2, :lit4, or :lit8 to the end of an expression for an
+instruction operand. The expression is added to the literal pool and the
+operand is replaced with the offset to the literal in the literal pool.
+
+`:lit1'
+     The literal pool entry is created as an 8-bit value. An operand
+     modifier must not be used for the original expression.
+
+`:lit2'
+     The literal pool entry is created as a 16 bit value. The operand
+     modifier @got may be used in the original expression. The term
+     `x@got:lit2' will put the got offset for the global symbol x to
+     the literal pool as 16 bit value.
+
+`:lit4'
+     The literal pool entry is created as a 32-bit value. The operand
+     modifier @got and @plt may be used in the original expression. The
+     term `x@got:lit4' will put the got offset for the global symbol x
+     to the literal pool as a 32-bit value. The term `x@plt:lit4' will
+     put the plt offset for the global symbol x to the literal pool as
+     a 32-bit value.
+
+`:lit8'
+     The literal pool entry is created as a 64-bit value. The operand
+     modifier @got and @plt may be used in the original expression. The
+     term `x@got:lit8' will put the got offset for the global symbol x
+     to the literal pool as a 64-bit value. The term `x@plt:lit8' will
+     put the plt offset for the global symbol x to the literal pool as
+     a 64-bit value.
+
+   The assembler directive `.ltorg' is used to emit all literal pool
+entries to the current position.
+
+
+File: as.info,  Node: s390 Directives,  Next: s390 Floating Point,  Prev: s390 Syntax,  Up: S/390-Dependent
+
+9.30.4 Assembler Directives
+---------------------------
+
+`as' for s390 supports all of the standard ELF assembler directives as
+outlined in the main part of this document.  Some directives have been
+extended and there are some additional directives, which are only
+available for the s390 `as'.
+
+`.insn'
+     This directive permits the numeric representation of an
+     instructions and makes the assembler insert the operands according
+     to one of the instructions formats for `.insn' (*note s390
+     Formats::).  For example, the instruction `l %r1,24(%r15)' could
+     be written as `.insn rx,0x58000000,%r1,24(%r15)'.  
+
+`.short'
+`.long'
+`.quad'
+     This directive places one or more 16-bit (.short), 32-bit (.long),
+     or 64-bit (.quad) values into the current section. If an ELF or
+     TLS modifier is used only the following expressions are allowed:
+     `symbol@modifier + constant', `symbol@modifier + label +
+     constant', and `symbol@modifier - label + constant'.  The
+     following modifiers are available:
+    `@got'
+    `@got12'
+          The @got modifier can be used for .short, .long and .quad.
+          The @got12 modifier is synonym to @got. The symbol is added
+          to the GOT. The symbol term is replaced with offset from the
+          start of the GOT to the GOT slot for the symbol.
+
+    `@gotoff'
+          The @gotoff modifier can be used for .short, .long and .quad.
+          The symbol term is replaced with the offset from the start of
+          the GOT to the address of the symbol.
+
+    `@gotplt'
+          The @gotplt modifier can be used for .long and .quad. A
+          procedure linkage table entry is generated for the symbol and
+          a jump slot for the symbol is added to the GOT. The symbol
+          term is replaced with the offset from the start of the GOT to
+          the jump slot for the symbol.
+
+    `@plt'
+          The @plt modifier can be used for .long and .quad. A
+          procedure linkage table entry us generated for the symbol.
+          The symbol term is replaced with the address of the PLT entry
+          for the symbol.
+
+    `@pltoff'
+          The @pltoff modifier can be used for .short, .long and .quad.
+          The symbol term is replaced with the offset from the start of
+          the PLT to the address of the symbol.
+
+    `@tlsgd'
+    `@tlsldm'
+          The @tlsgd and @tlsldm modifier can be used for .long and
+          .quad. A tls_index structure for the symbol is added to the
+          GOT. The symbol term is replaced with the offset from the
+          start of the GOT to the tls_index structure.
+
+    `@gotntpoff'
+    `@indntpoff'
+          The @gotntpoff and @indntpoff modifier can be used for .long
+          and .quad.  The symbol is added to the static TLS block and
+          the negated offset to the symbol in the static TLS block is
+          added to the GOT. For @gotntpoff the symbol term is replaced
+          with the offset from the start of the GOT to the GOT slot,
+          for @indntpoff the symbol term is replaced with the address
+          of the GOT slot.
+
+    `@dtpoff'
+          The @dtpoff modifier can be used for .long and .quad. The
+          symbol term is replaced with the offset of the symbol
+          relative to the start of the TLS block it is contained in.
+
+    `@ntpoff'
+          The @ntpoff modifier can be used for .long and .quad. The
+          symbol term is replaced with the offset of the symbol
+          relative to the TCB pointer.
+
+     For more information about the thread local storage modifiers see
+     the ELF extension documentation `ELF Handling For Thread-Local
+     Storage'.
+
+`.ltorg'
+     This directive causes the current contents of the literal pool to
+     be dumped to the current location (*note s390 Literal Pool
+     Entries::).
+
+
+File: as.info,  Node: s390 Floating Point,  Prev: s390 Directives,  Up: S/390-Dependent
+
+9.30.5 Floating Point
+---------------------
+
+The assembler recognizes both the IEEE floating-point instruction and
+the hexadecimal floating-point instructions. The floating-point
+constructors `.float', `.single', and `.double' always emit the IEEE
+format. To assemble hexadecimal floating-point constants the `.long'
+and `.quad' directives must be used.
+
+
+File: as.info,  Node: SCORE-Dependent,  Next: Sparc-Dependent,  Prev: S/390-Dependent,  Up: Machine Dependencies
+
+9.31 SCORE Dependent Features
+=============================
+
+* Menu:
+
+* SCORE-Opts::   	Assembler options
+* SCORE-Pseudo::        SCORE Assembler Directives
+
+
+File: as.info,  Node: SCORE-Opts,  Next: SCORE-Pseudo,  Up: SCORE-Dependent
+
+9.31.1 Options
+--------------
+
+The following table lists all available SCORE options.
+
+`-G NUM'
+     This option sets the largest size of an object that can be
+     referenced implicitly with the `gp' register. The default value is
+     8.
+
+`-EB'
+     Assemble code for a big-endian cpu
+
+`-EL'
+     Assemble code for a little-endian cpu
+
+`-FIXDD'
+     Assemble code for fix data dependency
+
+`-NWARN'
+     Assemble code for no warning message for fix data dependency
+
+`-SCORE5'
+     Assemble code for target is SCORE5
+
+`-SCORE5U'
+     Assemble code for target is SCORE5U
+
+`-SCORE7'
+     Assemble code for target is SCORE7, this is default setting
+
+`-SCORE3'
+     Assemble code for target is SCORE3
+
+`-march=score7'
+     Assemble code for target is SCORE7, this is default setting
+
+`-march=score3'
+     Assemble code for target is SCORE3
+
+`-USE_R1'
+     Assemble code for no warning message when using temp register r1
+
+`-KPIC'
+     Generate code for PIC.  This option tells the assembler to generate
+     score position-independent macro expansions.  It also tells the
+     assembler to mark the output file as PIC.
+
+`-O0'
+     Assembler will not perform any optimizations
+
+`-V'
+     Sunplus release version
+
+
+
+File: as.info,  Node: SCORE-Pseudo,  Prev: SCORE-Opts,  Up: SCORE-Dependent
+
+9.31.2 SCORE Assembler Directives
+---------------------------------
+
+A number of assembler directives are available for SCORE.  The
+following table is far from complete.
+
+`.set nwarn'
+     Let the assembler not to generate warnings if the source machine
+     language instructions happen data dependency.
+
+`.set fixdd'
+     Let the assembler to insert bubbles (32 bit nop instruction / 16
+     bit nop! Instruction) if the source machine language instructions
+     happen data dependency.
+
+`.set nofixdd'
+     Let the assembler to generate warnings if the source machine
+     language instructions happen data dependency. (Default)
+
+`.set r1'
+     Let the assembler not to generate warnings if the source program
+     uses r1. allow user to use r1
+
+`set nor1'
+     Let the assembler to generate warnings if the source program uses
+     r1. (Default)
+
+`.sdata'
+     Tell the assembler to add subsequent data into the sdata section
+
+`.rdata'
+     Tell the assembler to add subsequent data into the rdata section
+
+`.frame "frame-register", "offset", "return-pc-register"'
+     Describe a stack frame. "frame-register" is the frame register,
+     "offset" is the distance from the frame register to the virtual
+     frame pointer, "return-pc-register" is the return program register.
+     You must use ".ent" before ".frame" and only one ".frame" can be
+     used per ".ent".
+
+`.mask "bitmask", "frameoffset"'
+     Indicate which of the integer registers are saved in the current
+     function's stack frame, this is for the debugger to explain the
+     frame chain.
+
+`.ent "proc-name"'
+     Set the beginning of the procedure "proc_name". Use this directive
+     when you want to generate information for the debugger.
+
+`.end proc-name'
+     Set the end of a procedure. Use this directive to generate
+     information for the debugger.
+
+`.bss'
+     Switch the destination of following statements into the bss
+     section, which is used for data that is uninitialized anywhere.
+
+
+
+File: as.info,  Node: SH-Dependent,  Next: SH64-Dependent,  Prev: MSP430-Dependent,  Up: Machine Dependencies
+
+9.32 Renesas / SuperH SH Dependent Features
+===========================================
+
+* Menu:
+
+* SH Options::              Options
+* SH Syntax::               Syntax
+* SH Floating Point::       Floating Point
+* SH Directives::           SH Machine Directives
+* SH Opcodes::              Opcodes
+
+
+File: as.info,  Node: SH Options,  Next: SH Syntax,  Up: SH-Dependent
+
+9.32.1 Options
+--------------
+
+`as' has following command-line options for the Renesas (formerly
+Hitachi) / SuperH SH family.
+
+`--little'
+     Generate little endian code.
+
+`--big'
+     Generate big endian code.
+
+`--relax'
+     Alter jump instructions for long displacements.
+
+`--small'
+     Align sections to 4 byte boundaries, not 16.
+
+`--dsp'
+     Enable sh-dsp insns, and disable sh3e / sh4 insns.
+
+`--renesas'
+     Disable optimization with section symbol for compatibility with
+     Renesas assembler.
+
+`--allow-reg-prefix'
+     Allow '$' as a register name prefix.
+
+`--isa=sh4 | sh4a'
+     Specify the sh4 or sh4a instruction set.
+
+`--isa=dsp'
+     Enable sh-dsp insns, and disable sh3e / sh4 insns.
+
+`--isa=fp'
+     Enable sh2e, sh3e, sh4, and sh4a insn sets.
+
+`--isa=all'
+     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
+
+`-h-tick-hex'
+     Support H'00 style hex constants in addition to 0x00 style.
+
+
+
+File: as.info,  Node: SH Syntax,  Next: SH Floating Point,  Prev: SH Options,  Up: SH-Dependent
+
+9.32.2 Syntax
+-------------
+
+* Menu:
+
+* SH-Chars::                Special Characters
+* SH-Regs::                 Register Names
+* SH-Addressing::           Addressing Modes
+
+
+File: as.info,  Node: SH-Chars,  Next: SH-Regs,  Up: SH Syntax
+
+9.32.2.1 Special Characters
+...........................
+
+`!' is the line comment character.
+
+   You can use `;' instead of a newline to separate statements.
+
+   Since `$' has no special meaning, you may use it in symbol names.
+
+
+File: as.info,  Node: SH-Regs,  Next: SH-Addressing,  Prev: SH-Chars,  Up: SH Syntax
+
+9.32.2.2 Register Names
+.......................
+
+You can use the predefined symbols `r0', `r1', `r2', `r3', `r4', `r5',
+`r6', `r7', `r8', `r9', `r10', `r11', `r12', `r13', `r14', and `r15' to
+refer to the SH registers.
+
+   The SH also has these control registers:
+
+`pr'
+     procedure register (holds return address)
+
+`pc'
+     program counter
+
+`mach'
+`macl'
+     high and low multiply accumulator registers
+
+`sr'
+     status register
+
+`gbr'
+     global base register
+
+`vbr'
+     vector base register (for interrupt vectors)
+
+
+File: as.info,  Node: SH-Addressing,  Prev: SH-Regs,  Up: SH Syntax
+
+9.32.2.3 Addressing Modes
+.........................
+
+`as' understands the following addressing modes for the SH.  `RN' in
+the following refers to any of the numbered registers, but _not_ the
+control registers.
+
+`RN'
+     Register direct
+
+`@RN'
+     Register indirect
+
+`@-RN'
+     Register indirect with pre-decrement
+
+`@RN+'
+     Register indirect with post-increment
+
+`@(DISP, RN)'
+     Register indirect with displacement
+
+`@(R0, RN)'
+     Register indexed
+
+`@(DISP, GBR)'
+     `GBR' offset
+
+`@(R0, GBR)'
+     GBR indexed
+
+`ADDR'
+`@(DISP, PC)'
+     PC relative address (for branch or for addressing memory).  The
+     `as' implementation allows you to use the simpler form ADDR
+     anywhere a PC relative address is called for; the alternate form
+     is supported for compatibility with other assemblers.
+
+`#IMM'
+     Immediate data
+
+
+File: as.info,  Node: SH Floating Point,  Next: SH Directives,  Prev: SH Syntax,  Up: SH-Dependent
+
+9.32.3 Floating Point
+---------------------
+
+SH2E, SH3E and SH4 groups have on-chip floating-point unit (FPU). Other
+SH groups can use `.float' directive to generate IEEE floating-point
+numbers.
+
+   SH2E and SH3E support single-precision floating point calculations as
+well as entirely PCAPI compatible emulation of double-precision
+floating point calculations. SH2E and SH3E instructions are a subset of
+the floating point calculations conforming to the IEEE754 standard.
+
+   In addition to single-precision and double-precision floating-point
+operation capability, the on-chip FPU of SH4 has a 128-bit graphic
+engine that enables 32-bit floating-point data to be processed 128 bits
+at a time. It also supports 4 * 4 array operations and inner product
+operations. Also, a superscalar architecture is employed that enables
+simultaneous execution of two instructions (including FPU
+instructions), providing performance of up to twice that of
+conventional architectures at the same frequency.
+
+
+File: as.info,  Node: SH Directives,  Next: SH Opcodes,  Prev: SH Floating Point,  Up: SH-Dependent
+
+9.32.4 SH Machine Directives
+----------------------------
+
+`uaword'
+`ualong'
+     `as' will issue a warning when a misaligned `.word' or `.long'
+     directive is used.  You may use `.uaword' or `.ualong' to indicate
+     that the value is intentionally misaligned.
+
+
+File: as.info,  Node: SH Opcodes,  Prev: SH Directives,  Up: SH-Dependent
+
+9.32.5 Opcodes
+--------------
+
+For detailed information on the SH machine instruction set, see
+`SH-Microcomputer User's Manual' (Renesas) or `SH-4 32-bit CPU Core
+Architecture' (SuperH) and `SuperH (SH) 64-Bit RISC Series' (SuperH).
+
+   `as' implements all the standard SH opcodes.  No additional
+pseudo-instructions are needed on this family.  Note, however, that
+because `as' supports a simpler form of PC-relative addressing, you may
+simply write (for example)
+
+     mov.l  bar,r0
+
+where other assemblers might require an explicit displacement to `bar'
+from the program counter:
+
+     mov.l  @(DISP, PC)
+
+   Here is a summary of SH opcodes:
+
+     Legend:
+     Rn        a numbered register
+     Rm        another numbered register
+     #imm      immediate data
+     disp      displacement
+     disp8     8-bit displacement
+     disp12    12-bit displacement
+
+     add #imm,Rn                    lds.l @Rn+,PR
+     add Rm,Rn                      mac.w @Rm+,@Rn+
+     addc Rm,Rn                     mov #imm,Rn
+     addv Rm,Rn                     mov Rm,Rn
+     and #imm,R0                    mov.b Rm,@(R0,Rn)
+     and Rm,Rn                      mov.b Rm,@-Rn
+     and.b #imm,@(R0,GBR)           mov.b Rm,@Rn
+     bf disp8                       mov.b @(disp,Rm),R0
+     bra disp12                     mov.b @(disp,GBR),R0
+     bsr disp12                     mov.b @(R0,Rm),Rn
+     bt disp8                       mov.b @Rm+,Rn
+     clrmac                         mov.b @Rm,Rn
+     clrt                           mov.b R0,@(disp,Rm)
+     cmp/eq #imm,R0                 mov.b R0,@(disp,GBR)
+     cmp/eq Rm,Rn                   mov.l Rm,@(disp,Rn)
+     cmp/ge Rm,Rn                   mov.l Rm,@(R0,Rn)
+     cmp/gt Rm,Rn                   mov.l Rm,@-Rn
+     cmp/hi Rm,Rn                   mov.l Rm,@Rn
+     cmp/hs Rm,Rn                   mov.l @(disp,Rn),Rm
+     cmp/pl Rn                      mov.l @(disp,GBR),R0
+     cmp/pz Rn                      mov.l @(disp,PC),Rn
+     cmp/str Rm,Rn                  mov.l @(R0,Rm),Rn
+     div0s Rm,Rn                    mov.l @Rm+,Rn
+     div0u                          mov.l @Rm,Rn
+     div1 Rm,Rn                     mov.l R0,@(disp,GBR)
+     exts.b Rm,Rn                   mov.w Rm,@(R0,Rn)
+     exts.w Rm,Rn                   mov.w Rm,@-Rn
+     extu.b Rm,Rn                   mov.w Rm,@Rn
+     extu.w Rm,Rn                   mov.w @(disp,Rm),R0
+     jmp @Rn                        mov.w @(disp,GBR),R0
+     jsr @Rn                        mov.w @(disp,PC),Rn
+     ldc Rn,GBR                     mov.w @(R0,Rm),Rn
+     ldc Rn,SR                      mov.w @Rm+,Rn
+     ldc Rn,VBR                     mov.w @Rm,Rn
+     ldc.l @Rn+,GBR                 mov.w R0,@(disp,Rm)
+     ldc.l @Rn+,SR                  mov.w R0,@(disp,GBR)
+     ldc.l @Rn+,VBR                 mova @(disp,PC),R0
+     lds Rn,MACH                    movt Rn
+     lds Rn,MACL                    muls Rm,Rn
+     lds Rn,PR                      mulu Rm,Rn
+     lds.l @Rn+,MACH                neg Rm,Rn
+     lds.l @Rn+,MACL                negc Rm,Rn
+
+     nop                            stc VBR,Rn
+     not Rm,Rn                      stc.l GBR,@-Rn
+     or #imm,R0                     stc.l SR,@-Rn
+     or Rm,Rn                       stc.l VBR,@-Rn
+     or.b #imm,@(R0,GBR)            sts MACH,Rn
+     rotcl Rn                       sts MACL,Rn
+     rotcr Rn                       sts PR,Rn
+     rotl Rn                        sts.l MACH,@-Rn
+     rotr Rn                        sts.l MACL,@-Rn
+     rte                            sts.l PR,@-Rn
+     rts                            sub Rm,Rn
+     sett                           subc Rm,Rn
+     shal Rn                        subv Rm,Rn
+     shar Rn                        swap.b Rm,Rn
+     shll Rn                        swap.w Rm,Rn
+     shll16 Rn                      tas.b @Rn
+     shll2 Rn                       trapa #imm
+     shll8 Rn                       tst #imm,R0
+     shlr Rn                        tst Rm,Rn
+     shlr16 Rn                      tst.b #imm,@(R0,GBR)
+     shlr2 Rn                       xor #imm,R0
+     shlr8 Rn                       xor Rm,Rn
+     sleep                          xor.b #imm,@(R0,GBR)
+     stc GBR,Rn                     xtrct Rm,Rn
+     stc SR,Rn
+
+
+File: as.info,  Node: SH64-Dependent,  Next: PDP-11-Dependent,  Prev: SH-Dependent,  Up: Machine Dependencies
+
+9.33 SuperH SH64 Dependent Features
+===================================
+
+* Menu:
+
+* SH64 Options::              Options
+* SH64 Syntax::               Syntax
+* SH64 Directives::           SH64 Machine Directives
+* SH64 Opcodes::              Opcodes
+
+
+File: as.info,  Node: SH64 Options,  Next: SH64 Syntax,  Up: SH64-Dependent
+
+9.33.1 Options
+--------------
+
+`-isa=sh4 | sh4a'
+     Specify the sh4 or sh4a instruction set.
+
+`-isa=dsp'
+     Enable sh-dsp insns, and disable sh3e / sh4 insns.
+
+`-isa=fp'
+     Enable sh2e, sh3e, sh4, and sh4a insn sets.
+
+`-isa=all'
+     Enable sh1, sh2, sh2e, sh3, sh3e, sh4, sh4a, and sh-dsp insn sets.
+
+`-isa=shmedia | -isa=shcompact'
+     Specify the default instruction set.  `SHmedia' specifies the
+     32-bit opcodes, and `SHcompact' specifies the 16-bit opcodes
+     compatible with previous SH families.  The default depends on the
+     ABI selected; the default for the 64-bit ABI is SHmedia, and the
+     default for the 32-bit ABI is SHcompact.  If neither the ABI nor
+     the ISA is specified, the default is 32-bit SHcompact.
+
+     Note that the `.mode' pseudo-op is not permitted if the ISA is not
+     specified on the command line.
+
+`-abi=32 | -abi=64'
+     Specify the default ABI.  If the ISA is specified and the ABI is
+     not, the default ABI depends on the ISA, with SHmedia defaulting
+     to 64-bit and SHcompact defaulting to 32-bit.
+
+     Note that the `.abi' pseudo-op is not permitted if the ABI is not
+     specified on the command line.  When the ABI is specified on the
+     command line, any `.abi' pseudo-ops in the source must match it.
+
+`-shcompact-const-crange'
+     Emit code-range descriptors for constants in SHcompact code
+     sections.
+
+`-no-mix'
+     Disallow SHmedia code in the same section as constants and
+     SHcompact code.
+
+`-no-expand'
+     Do not expand MOVI, PT, PTA or PTB instructions.
+
+`-expand-pt32'
+     With -abi=64, expand PT, PTA and PTB instructions to 32 bits only.
+
+`-h-tick-hex'
+     Support H'00 style hex constants in addition to 0x00 style.
+
+
+
+File: as.info,  Node: SH64 Syntax,  Next: SH64 Directives,  Prev: SH64 Options,  Up: SH64-Dependent
+
+9.33.2 Syntax
+-------------
+
+* Menu:
+
+* SH64-Chars::                Special Characters
+* SH64-Regs::                 Register Names
+* SH64-Addressing::           Addressing Modes
+
+
+File: as.info,  Node: SH64-Chars,  Next: SH64-Regs,  Up: SH64 Syntax
+
+9.33.2.1 Special Characters
+...........................
+
+`!' is the line comment character.
+
+   You can use `;' instead of a newline to separate statements.
+
+   Since `$' has no special meaning, you may use it in symbol names.
+
+
+File: as.info,  Node: SH64-Regs,  Next: SH64-Addressing,  Prev: SH64-Chars,  Up: SH64 Syntax
+
+9.33.2.2 Register Names
+.......................
+
+You can use the predefined symbols `r0' through `r63' to refer to the
+SH64 general registers, `cr0' through `cr63' for control registers,
+`tr0' through `tr7' for target address registers, `fr0' through `fr63'
+for single-precision floating point registers, `dr0' through `dr62'
+(even numbered registers only) for double-precision floating point
+registers, `fv0' through `fv60' (multiples of four only) for
+single-precision floating point vectors, `fp0' through `fp62' (even
+numbered registers only) for single-precision floating point pairs,
+`mtrx0' through `mtrx48' (multiples of 16 only) for 4x4 matrices of
+single-precision floating point registers, `pc' for the program
+counter, and `fpscr' for the floating point status and control register.
+
+   You can also refer to the control registers by the mnemonics `sr',
+`ssr', `pssr', `intevt', `expevt', `pexpevt', `tra', `spc', `pspc',
+`resvec', `vbr', `tea', `dcr', `kcr0', `kcr1', `ctc', and `usr'.
+
+
+File: as.info,  Node: SH64-Addressing,  Prev: SH64-Regs,  Up: SH64 Syntax
+
+9.33.2.3 Addressing Modes
+.........................
+
+SH64 operands consist of either a register or immediate value.  The
+immediate value can be a constant or label reference (or portion of a
+label reference), as in this example:
+
+     	movi	4,r2
+     	pt	function, tr4
+     	movi	(function >> 16) & 65535,r0
+     	shori	function & 65535, r0
+     	ld.l	r0,4,r0
+
+   Instruction label references can reference labels in either SHmedia
+or SHcompact.  To differentiate between the two, labels in SHmedia
+sections will always have the least significant bit set (i.e. they will
+be odd), which SHcompact labels will have the least significant bit
+reset (i.e. they will be even).  If you need to reference the actual
+address of a label, you can use the `datalabel' modifier, as in this
+example:
+
+     	.long	function
+     	.long	datalabel function
+
+   In that example, the first longword may or may not have the least
+significant bit set depending on whether the label is an SHmedia label
+or an SHcompact label.  The second longword will be the actual address
+of the label, regardless of what type of label it is.
+
+
+File: as.info,  Node: SH64 Directives,  Next: SH64 Opcodes,  Prev: SH64 Syntax,  Up: SH64-Dependent
+
+9.33.3 SH64 Machine Directives
+------------------------------
+
+In addition to the SH directives, the SH64 provides the following
+directives:
+
+`.mode [shmedia|shcompact]'
+`.isa [shmedia|shcompact]'
+     Specify the ISA for the following instructions (the two directives
+     are equivalent).  Note that programs such as `objdump' rely on
+     symbolic labels to determine when such mode switches occur (by
+     checking the least significant bit of the label's address), so
+     such mode/isa changes should always be followed by a label (in
+     practice, this is true anyway).  Note that you cannot use these
+     directives if you didn't specify an ISA on the command line.
+
+`.abi [32|64]'
+     Specify the ABI for the following instructions.  Note that you
+     cannot use this directive unless you specified an ABI on the
+     command line, and the ABIs specified must match.
+
+`.uaquad'
+     Like .uaword and .ualong, this allows you to specify an
+     intentionally unaligned quadword (64 bit word).
+
+
+
+File: as.info,  Node: SH64 Opcodes,  Prev: SH64 Directives,  Up: SH64-Dependent
+
+9.33.4 Opcodes
+--------------
+
+For detailed information on the SH64 machine instruction set, see
+`SuperH 64 bit RISC Series Architecture Manual' (SuperH, Inc.).
+
+   `as' implements all the standard SH64 opcodes.  In addition, the
+following pseudo-opcodes may be expanded into one or more alternate
+opcodes:
+
+`movi'
+     If the value doesn't fit into a standard `movi' opcode, `as' will
+     replace the `movi' with a sequence of `movi' and `shori' opcodes.
+
+`pt'
+     This expands to a sequence of `movi' and `shori' opcode, followed
+     by a `ptrel' opcode, or to a `pta' or `ptb' opcode, depending on
+     the label referenced.
+
+
+
+File: as.info,  Node: Sparc-Dependent,  Next: TIC54X-Dependent,  Prev: SCORE-Dependent,  Up: Machine Dependencies
+
+9.34 SPARC Dependent Features
+=============================
+
+* Menu:
+
+* Sparc-Opts::                  Options
+* Sparc-Aligned-Data::		Option to enforce aligned data
+* Sparc-Syntax::		Syntax
+* Sparc-Float::                 Floating Point
+* Sparc-Directives::            Sparc Machine Directives
+
+
+File: as.info,  Node: Sparc-Opts,  Next: Sparc-Aligned-Data,  Up: Sparc-Dependent
+
+9.34.1 Options
+--------------
+
+The SPARC chip family includes several successive versions, using the
+same core instruction set, but including a few additional instructions
+at each version.  There are exceptions to this however.  For details on
+what instructions each variant supports, please see the chip's
+architecture reference manual.
+
+   By default, `as' assumes the core instruction set (SPARC v6), but
+"bumps" the architecture level as needed: it switches to successively
+higher architectures as it encounters instructions that only exist in
+the higher levels.
+
+   If not configured for SPARC v9 (`sparc64-*-*') GAS will not bump
+past sparclite by default, an option must be passed to enable the v9
+instructions.
+
+   GAS treats sparclite as being compatible with v8, unless an
+architecture is explicitly requested.  SPARC v9 is always incompatible
+with sparclite.
+
+`-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite'
+`-Av8plus | -Av8plusa | -Av9 | -Av9a'
+     Use one of the `-A' options to select one of the SPARC
+     architectures explicitly.  If you select an architecture
+     explicitly, `as' reports a fatal error if it encounters an
+     instruction or feature requiring an incompatible or higher level.
+
+     `-Av8plus' and `-Av8plusa' select a 32 bit environment.
+
+     `-Av9' and `-Av9a' select a 64 bit environment and are not
+     available unless GAS is explicitly configured with 64 bit
+     environment support.
+
+     `-Av8plusa' and `-Av9a' enable the SPARC V9 instruction set with
+     UltraSPARC extensions.
+
+`-xarch=v8plus | -xarch=v8plusa'
+     For compatibility with the SunOS v9 assembler.  These options are
+     equivalent to -Av8plus and -Av8plusa, respectively.
+
+`-bump'
+     Warn whenever it is necessary to switch to another level.  If an
+     architecture level is explicitly requested, GAS will not issue
+     warnings until that level is reached, and will then bump the level
+     as required (except between incompatible levels).
+
+`-32 | -64'
+     Select the word size, either 32 bits or 64 bits.  These options
+     are only available with the ELF object file format, and require
+     that the necessary BFD support has been included.
+
+
+File: as.info,  Node: Sparc-Aligned-Data,  Next: Sparc-Syntax,  Prev: Sparc-Opts,  Up: Sparc-Dependent
+
+9.34.2 Enforcing aligned data
+-----------------------------
+
+SPARC GAS normally permits data to be misaligned.  For example, it
+permits the `.long' pseudo-op to be used on a byte boundary.  However,
+the native SunOS assemblers issue an error when they see misaligned
+data.
+
+   You can use the `--enforce-aligned-data' option to make SPARC GAS
+also issue an error about misaligned data, just as the SunOS assemblers
+do.
+
+   The `--enforce-aligned-data' option is not the default because gcc
+issues misaligned data pseudo-ops when it initializes certain packed
+data structures (structures defined using the `packed' attribute).  You
+may have to assemble with GAS in order to initialize packed data
+structures in your own code.
+
+
+File: as.info,  Node: Sparc-Syntax,  Next: Sparc-Float,  Prev: Sparc-Aligned-Data,  Up: Sparc-Dependent
+
+9.34.3 Sparc Syntax
+-------------------
+
+The assembler syntax closely follows The Sparc Architecture Manual,
+versions 8 and 9, as well as most extensions defined by Sun for their
+UltraSPARC and Niagara line of processors.
+
+* Menu:
+
+* Sparc-Chars::                Special Characters
+* Sparc-Regs::                 Register Names
+* Sparc-Constants::            Constant Names
+* Sparc-Relocs::               Relocations
+* Sparc-Size-Translations::    Size Translations
+
+
+File: as.info,  Node: Sparc-Chars,  Next: Sparc-Regs,  Up: Sparc-Syntax
+
+9.34.3.1 Special Characters
+...........................
+
+`#' is the line comment character.
+
+   `;' can be used instead of a newline to separate statements.
+
+
+File: as.info,  Node: Sparc-Regs,  Next: Sparc-Constants,  Prev: Sparc-Chars,  Up: Sparc-Syntax
+
+9.34.3.2 Register Names
+.......................
+
+The Sparc integer register file is broken down into global, outgoing,
+local, and incoming.
+
+   * The 8 global registers are referred to as `%gN'.
+
+   * The 8 outgoing registers are referred to as `%oN'.
+
+   * The 8 local registers are referred to as `%lN'.
+
+   * The 8 incoming registers are referred to as `%iN'.
+
+   * The frame pointer register `%i6' can be referenced using the alias
+     `%fp'.
+
+   * The stack pointer register `%o6' can be referenced using the alias
+     `%sp'.
+
+   Floating point registers are simply referred to as `%fN'.  When
+assembling for pre-V9, only 32 floating point registers are available.
+For V9 and later there are 64, but there are restrictions when
+referencing the upper 32 registers.  They can only be accessed as
+double or quad, and thus only even or quad numbered accesses are
+allowed.  For example, `%f34' is a legal floating point register, but
+`%f35' is not.
+
+   Certain V9 instructions allow access to ancillary state registers.
+Most simply they can be referred to as `%asrN' where N can be from 16
+to 31.  However, there are some aliases defined to reference ASR
+registers defined for various UltraSPARC processors:
+
+   * The tick compare register is referred to as `%tick_cmpr'.
+
+   * The system tick register is referred to as `%stick'.  An alias,
+     `%sys_tick', exists but is deprecated and should not be used by
+     new software.
+
+   * The system tick compare register is referred to as `%stick_cmpr'.
+     An alias, `%sys_tick_cmpr', exists but is deprecated and should
+     not be used by new software.
+
+   * The software interrupt register is referred to as `%softint'.
+
+   * The set software interrupt register is referred to as
+     `%set_softint'.  The mnemonic `%softint_set' is provided as an
+     alias.
+
+   * The clear software interrupt register is referred to as
+     `%clear_softint'.  The mnemonic `%softint_clear' is provided as an
+     alias.
+
+   * The performance instrumentation counters register is referred to as
+     `%pic'.
+
+   * The performance control register is referred to as `%pcr'.
+
+   * The graphics status register is referred to as `%gsr'.
+
+   * The V9 dispatch control register is referred to as `%dcr'.
+
+   Various V9 branch and conditional move instructions allow
+specification of which set of integer condition codes to test.  These
+are referred to as `%xcc' and `%icc'.
+
+   In V9, there are 4 sets of floating point condition codes which are
+referred to as `%fccN'.
+
+   Several special privileged and non-privileged registers exist:
+
+   * The V9 address space identifier register is referred to as `%asi'.
+
+   * The V9 restorable windows register is referred to as `%canrestore'.
+
+   * The V9 savable windows register is referred to as `%cansave'.
+
+   * The V9 clean windows register is referred to as `%cleanwin'.
+
+   * The V9 current window pointer register is referred to as `%cwp'.
+
+   * The floating-point queue register is referred to as `%fq'.
+
+   * The V8 co-processor queue register is referred to as `%cq'.
+
+   * The floating point status register is referred to as `%fsr'.
+
+   * The other windows register is referred to as `%otherwin'.
+
+   * The V9 program counter register is referred to as `%pc'.
+
+   * The V9 next program counter register is referred to as `%npc'.
+
+   * The V9 processor interrupt level register is referred to as `%pil'.
+
+   * The V9 processor state register is referred to as `%pstate'.
+
+   * The trap base address register is referred to as `%tba'.
+
+   * The V9 tick register is referred to as `%tick'.
+
+   * The V9 trap level is referred to as `%tl'.
+
+   * The V9 trap program counter is referred to as `%tpc'.
+
+   * The V9 trap next program counter is referred to as `%tnpc'.
+
+   * The V9 trap state is referred to as `%tstate'.
+
+   * The V9 trap type is referred to as `%tt'.
+
+   * The V9 condition codes is referred to as `%ccr'.
+
+   * The V9 floating-point registers state is referred to as `%fprs'.
+
+   * The V9 version register is referred to as `%ver'.
+
+   * The V9 window state register is referred to as `%wstate'.
+
+   * The Y register is referred to as `%y'.
+
+   * The V8 window invalid mask register is referred to as `%wim'.
+
+   * The V8 processor state register is referred to as `%psr'.
+
+   * The V9 global register level register is referred to as `%gl'.
+
+   Several special register names exist for hypervisor mode code:
+
+   * The hyperprivileged processor state register is referred to as
+     `%hpstate'.
+
+   * The hyperprivileged trap state register is referred to as
+     `%htstate'.
+
+   * The hyperprivileged interrupt pending register is referred to as
+     `%hintp'.
+
+   * The hyperprivileged trap base address register is referred to as
+     `%htba'.
+
+   * The hyperprivileged implementation version register is referred to
+     as `%hver'.
+
+   * The hyperprivileged system tick compare register is referred to as
+     `%hstick_cmpr'.  Note that there is no `%hstick' register, the
+     normal `%stick' is used.
+
+
+File: as.info,  Node: Sparc-Constants,  Next: Sparc-Relocs,  Prev: Sparc-Regs,  Up: Sparc-Syntax
+
+9.34.3.3 Constants
+..................
+
+Several Sparc instructions take an immediate operand field for which
+mnemonic names exist.  Two such examples are `membar' and `prefetch'.
+Another example are the set of V9 memory access instruction that allow
+specification of an address space identifier.
+
+   The `membar' instruction specifies a memory barrier that is the
+defined by the operand which is a bitmask.  The supported mask
+mnemonics are:
+
+   * `#Sync' requests that all operations (including nonmemory
+     reference operations) appearing prior to the `membar' must have
+     been performed and the effects of any exceptions become visible
+     before any instructions after the `membar' may be initiated.  This
+     corresponds to `membar' cmask field bit 2.
+
+   * `#MemIssue' requests that all memory reference operations
+     appearing prior to the `membar' must have been performed before
+     any memory operation after the `membar' may be initiated.  This
+     corresponds to `membar' cmask field bit 1.
+
+   * `#Lookaside' requests that a store appearing prior to the `membar'
+     must complete before any load following the `membar' referencing
+     the same address can be initiated.  This corresponds to `membar'
+     cmask field bit 0.
+
+   * `#StoreStore' defines that the effects of all stores appearing
+     prior to the `membar' instruction must be visible to all
+     processors before the effect of any stores following the `membar'.
+     Equivalent to the deprecated `stbar' instruction.  This
+     corresponds to `membar' mmask field bit 3.
+
+   * `#LoadStore' defines all loads appearing prior to the `membar'
+     instruction must have been performed before the effect of any
+     stores following the `membar' is visible to any other processor.
+     This corresponds to `membar' mmask field bit 2.
+
+   * `#StoreLoad' defines that the effects of all stores appearing
+     prior to the `membar' instruction must be visible to all
+     processors before loads following the `membar' may be performed.
+     This corresponds to `membar' mmask field bit 1.
+
+   * `#LoadLoad' defines that all loads appearing prior to the `membar'
+     instruction must have been performed before any loads following
+     the `membar' may be performed.  This corresponds to `membar' mmask
+     field bit 0.
+
+
+   These values can be ored together, for example:
+
+     membar #Sync
+     membar #StoreLoad | #LoadLoad
+     membar #StoreLoad | #StoreStore
+
+   The `prefetch' and `prefetcha' instructions take a prefetch function
+code.  The following prefetch function code constant mnemonics are
+available:
+
+   * `#n_reads' requests a prefetch for several reads, and corresponds
+     to a prefetch function code of 0.
+
+     `#one_read' requests a prefetch for one read, and corresponds to a
+     prefetch function code of 1.
+
+     `#n_writes' requests a prefetch for several writes (and possibly
+     reads), and corresponds to a prefetch function code of 2.
+
+     `#one_write' requests a prefetch for one write, and corresponds to
+     a prefetch function code of 3.
+
+     `#page' requests a prefetch page, and corresponds to a prefetch
+     function code of 4.
+
+     `#invalidate' requests a prefetch invalidate, and corresponds to a
+     prefetch function code of 16.
+
+     `#unified' requests a prefetch to the nearest unified cache, and
+     corresponds to a prefetch function code of 17.
+
+     `#n_reads_strong' requests a strong prefetch for several reads,
+     and corresponds to a prefetch function code of 20.
+
+     `#one_read_strong' requests a strong prefetch for one read, and
+     corresponds to a prefetch function code of 21.
+
+     `#n_writes_strong' requests a strong prefetch for several writes,
+     and corresponds to a prefetch function code of 22.
+
+     `#one_write_strong' requests a strong prefetch for one write, and
+     corresponds to a prefetch function code of 23.
+
+     Onle one prefetch code may be specified.  Here are some examples:
+
+          prefetch  [%l0 + %l2], #one_read
+          prefetch  [%g2 + 8], #n_writes
+          prefetcha [%g1] 0x8, #unified
+          prefetcha [%o0 + 0x10] %asi, #n_reads
+
+     The actual behavior of a given prefetch function code is processor
+     specific.  If a processor does not implement a given prefetch
+     function code, it will treat the prefetch instruction as a nop.
+
+     For instructions that accept an immediate address space identifier,
+     `as' provides many mnemonics corresponding to V9 defined as well
+     as UltraSPARC and Niagara extended values.  For example, `#ASI_P'
+     and `#ASI_BLK_INIT_QUAD_LDD_AIUS'.  See the V9 and processor
+     specific manuals for details.
+
+
+
+File: as.info,  Node: Sparc-Relocs,  Next: Sparc-Size-Translations,  Prev: Sparc-Constants,  Up: Sparc-Syntax
+
+9.34.3.4 Relocations
+....................
+
+ELF relocations are available as defined in the 32-bit and 64-bit Sparc
+ELF specifications.
+
+   `R_SPARC_HI22' is obtained using `%hi' and `R_SPARC_LO10' is
+obtained using `%lo'.  Likewise `R_SPARC_HIX22' is obtained from `%hix'
+and `R_SPARC_LOX10' is obtained using `%lox'.  For example:
+
+     sethi %hi(symbol), %g1
+     or    %g1, %lo(symbol), %g1
+
+     sethi %hix(symbol), %g1
+     xor   %g1, %lox(symbol), %g1
+
+   These "high" mnemonics extract bits 31:10 of their operand, and the
+"low" mnemonics extract bits 9:0 of their operand.
+
+   V9 code model relocations can be requested as follows:
+
+   * `R_SPARC_HH22' is requested using `%hh'.  It can also be generated
+     using `%uhi'.
+
+   * `R_SPARC_HM10' is requested using `%hm'.  It can also be generated
+     using `%ulo'.
+
+   * `R_SPARC_LM22' is requested using `%lm'.
+
+   * `R_SPARC_H44' is requested using `%h44'.
+
+   * `R_SPARC_M44' is requested using `%m44'.
+
+   * `R_SPARC_L44' is requested using `%l44'.
+
+   The PC relative relocation `R_SPARC_PC22' can be obtained by
+enclosing an operand inside of `%pc22'.  Likewise, the `R_SPARC_PC10'
+relocation can be obtained using `%pc10'.  These are mostly used when
+assembling PIC code.  For example, the standard PIC sequence on Sparc
+to get the base of the global offset table, PC relative, into a
+register, can be performed as:
+
+     sethi %pc22(_GLOBAL_OFFSET_TABLE_-4), %l7
+     add   %l7, %pc10(_GLOBAL_OFFSET_TABLE_+4), %l7
+
+   Several relocations exist to allow the link editor to potentially
+optimize GOT data references.  The `R_SPARC_GOTDATA_OP_HIX22'
+relocation can obtained by enclosing an operand inside of
+`%gdop_hix22'.  The `R_SPARC_GOTDATA_OP_LOX10' relocation can obtained
+by enclosing an operand inside of `%gdop_lox10'.  Likewise,
+`R_SPARC_GOTDATA_OP' can be obtained by enclosing an operand inside of
+`%gdop'.  For example, assuming the GOT base is in register `%l7':
+
+     sethi %gdop_hix22(symbol), %l1
+     xor   %l1, %gdop_lox10(symbol), %l1
+     ld    [%l7 + %l1], %l2, %gdop(symbol)
+
+   There are many relocations that can be requested for access to
+thread local storage variables.  All of the Sparc TLS mnemonics are
+supported:
+
+   * `R_SPARC_TLS_GD_HI22' is requested using `%tgd_hi22'.
+
+   * `R_SPARC_TLS_GD_LO10' is requested using `%tgd_lo10'.
+
+   * `R_SPARC_TLS_GD_ADD' is requested using `%tgd_add'.
+
+   * `R_SPARC_TLS_GD_CALL' is requested using `%tgd_call'.
+
+   * `R_SPARC_TLS_LDM_HI22' is requested using `%tldm_hi22'.
+
+   * `R_SPARC_TLS_LDM_LO10' is requested using `%tldm_lo10'.
+
+   * `R_SPARC_TLS_LDM_ADD' is requested using `%tldm_add'.
+
+   * `R_SPARC_TLS_LDM_CALL' is requested using `%tldm_call'.
+
+   * `R_SPARC_TLS_LDO_HIX22' is requested using `%tldo_hix22'.
+
+   * `R_SPARC_TLS_LDO_LOX10' is requested using `%tldo_lox10'.
+
+   * `R_SPARC_TLS_LDO_ADD' is requested using `%tldo_add'.
+
+   * `R_SPARC_TLS_IE_HI22' is requested using `%tie_hi22'.
+
+   * `R_SPARC_TLS_IE_LO10' is requested using `%tie_lo10'.
+
+   * `R_SPARC_TLS_IE_LD' is requested using `%tie_ld'.
+
+   * `R_SPARC_TLS_IE_LDX' is requested using `%tie_ldx'.
+
+   * `R_SPARC_TLS_IE_ADD' is requested using `%tie_add'.
+
+   * `R_SPARC_TLS_LE_HIX22' is requested using `%tle_hix22'.
+
+   * `R_SPARC_TLS_LE_LOX10' is requested using `%tle_lox10'.
+
+   Here are some example TLS model sequences.
+
+   First, General Dynamic:
+
+     sethi  %tgd_hi22(symbol), %l1
+     add    %l1, %tgd_lo10(symbol), %l1
+     add    %l7, %l1, %o0, %tgd_add(symbol)
+     call   __tls_get_addr, %tgd_call(symbol)
+     nop
+
+   Local Dynamic:
+
+     sethi  %tldm_hi22(symbol), %l1
+     add    %l1, %tldm_lo10(symbol), %l1
+     add    %l7, %l1, %o0, %tldm_add(symbol)
+     call   __tls_get_addr, %tldm_call(symbol)
+     nop
+
+     sethi  %tldo_hix22(symbol), %l1
+     xor    %l1, %tldo_lox10(symbol), %l1
+     add    %o0, %l1, %l1, %tldo_add(symbol)
+
+   Initial Exec:
+
+     sethi  %tie_hi22(symbol), %l1
+     add    %l1, %tie_lo10(symbol), %l1
+     ld     [%l7 + %l1], %o0, %tie_ld(symbol)
+     add    %g7, %o0, %o0, %tie_add(symbol)
+
+     sethi  %tie_hi22(symbol), %l1
+     add    %l1, %tie_lo10(symbol), %l1
+     ldx    [%l7 + %l1], %o0, %tie_ldx(symbol)
+     add    %g7, %o0, %o0, %tie_add(symbol)
+
+   And finally, Local Exec:
+
+     sethi  %tle_hix22(symbol), %l1
+     add    %l1, %tle_lox10(symbol), %l1
+     add    %g7, %l1, %l1
+
+   When assembling for 64-bit, and a secondary constant addend is
+specified in an address expression that would normally generate an
+`R_SPARC_LO10' relocation, the assembler will emit an `R_SPARC_OLO10'
+instead.
+
+
+File: as.info,  Node: Sparc-Size-Translations,  Prev: Sparc-Relocs,  Up: Sparc-Syntax
+
+9.34.3.5 Size Translations
+..........................
+
+Often it is desirable to write code in an operand size agnostic manner.
+`as' provides support for this via operand size opcode translations.
+Translations are supported for loads, stores, shifts, compare-and-swap
+atomics, and the `clr' synthetic instruction.
+
+   If generating 32-bit code, `as' will generate the 32-bit opcode.
+Whereas if 64-bit code is being generated, the 64-bit opcode will be
+emitted.  For example `ldn' will be transformed into `ld' for 32-bit
+code and `ldx' for 64-bit code.
+
+   Here is an example meant to demonstrate all the supported opcode
+translations:
+
+     ldn   [%o0], %o1
+     ldna  [%o0] %asi, %o2
+     stn   %o1, [%o0]
+     stna  %o2, [%o0] %asi
+     slln  %o3, 3, %o3
+     srln  %o4, 8, %o4
+     sran  %o5, 12, %o5
+     casn  [%o0], %o1, %o2
+     casna [%o0] %asi, %o1, %o2
+     clrn  %g1
+
+   In 32-bit mode `as' will emit:
+
+     ld   [%o0], %o1
+     lda  [%o0] %asi, %o2
+     st   %o1, [%o0]
+     sta  %o2, [%o0] %asi
+     sll  %o3, 3, %o3
+     srl  %o4, 8, %o4
+     sra  %o5, 12, %o5
+     cas  [%o0], %o1, %o2
+     casa [%o0] %asi, %o1, %o2
+     clr  %g1
+
+   And in 64-bit mode `as' will emit:
+
+     ldx   [%o0], %o1
+     ldxa  [%o0] %asi, %o2
+     stx   %o1, [%o0]
+     stxa  %o2, [%o0] %asi
+     sllx  %o3, 3, %o3
+     srlx  %o4, 8, %o4
+     srax  %o5, 12, %o5
+     casx  [%o0], %o1, %o2
+     casxa [%o0] %asi, %o1, %o2
+     clrx  %g1
+
+   Finally, the `.nword' translating directive is supported as well.
+It is documented in the section on Sparc machine directives.
+
+
+File: as.info,  Node: Sparc-Float,  Next: Sparc-Directives,  Prev: Sparc-Syntax,  Up: Sparc-Dependent
+
+9.34.4 Floating Point
+---------------------
+
+The Sparc uses IEEE floating-point numbers.
+
+
+File: as.info,  Node: Sparc-Directives,  Prev: Sparc-Float,  Up: Sparc-Dependent
+
+9.34.5 Sparc Machine Directives
+-------------------------------
+
+The Sparc version of `as' supports the following additional machine
+directives:
+
+`.align'
+     This must be followed by the desired alignment in bytes.
+
+`.common'
+     This must be followed by a symbol name, a positive number, and
+     `"bss"'.  This behaves somewhat like `.comm', but the syntax is
+     different.
+
+`.half'
+     This is functionally identical to `.short'.
+
+`.nword'
+     On the Sparc, the `.nword' directive produces native word sized
+     value, ie. if assembling with -32 it is equivalent to `.word', if
+     assembling with -64 it is equivalent to `.xword'.
+
+`.proc'
+     This directive is ignored.  Any text following it on the same line
+     is also ignored.
+
+`.register'
+     This directive declares use of a global application or system
+     register.  It must be followed by a register name %g2, %g3, %g6 or
+     %g7, comma and the symbol name for that register.  If symbol name
+     is `#scratch', it is a scratch register, if it is `#ignore', it
+     just suppresses any errors about using undeclared global register,
+     but does not emit any information about it into the object file.
+     This can be useful e.g. if you save the register before use and
+     restore it after.
+
+`.reserve'
+     This must be followed by a symbol name, a positive number, and
+     `"bss"'.  This behaves somewhat like `.lcomm', but the syntax is
+     different.
+
+`.seg'
+     This must be followed by `"text"', `"data"', or `"data1"'.  It
+     behaves like `.text', `.data', or `.data 1'.
+
+`.skip'
+     This is functionally identical to the `.space' directive.
+
+`.word'
+     On the Sparc, the `.word' directive produces 32 bit values,
+     instead of the 16 bit values it produces on many other machines.
+
+`.xword'
+     On the Sparc V9 processor, the `.xword' directive produces 64 bit
+     values.
+
+
+File: as.info,  Node: TIC54X-Dependent,  Next: V850-Dependent,  Prev: Sparc-Dependent,  Up: Machine Dependencies
+
+9.35 TIC54X Dependent Features
+==============================
+
+* Menu:
+
+* TIC54X-Opts::              Command-line Options
+* TIC54X-Block::             Blocking
+* TIC54X-Env::               Environment Settings
+* TIC54X-Constants::         Constants Syntax
+* TIC54X-Subsyms::           String Substitution
+* TIC54X-Locals::            Local Label Syntax
+* TIC54X-Builtins::          Builtin Assembler Math Functions
+* TIC54X-Ext::               Extended Addressing Support
+* TIC54X-Directives::        Directives
+* TIC54X-Macros::            Macro Features
+* TIC54X-MMRegs::            Memory-mapped Registers
+
+
+File: as.info,  Node: TIC54X-Opts,  Next: TIC54X-Block,  Up: TIC54X-Dependent
+
+9.35.1 Options
+--------------
+
+The TMS320C54X version of `as' has a few machine-dependent options.
+
+   You can use the `-mfar-mode' option to enable extended addressing
+mode.  All addresses will be assumed to be > 16 bits, and the
+appropriate relocation types will be used.  This option is equivalent
+to using the `.far_mode' directive in the assembly code.  If you do not
+use the `-mfar-mode' option, all references will be assumed to be 16
+bits.  This option may be abbreviated to `-mf'.
+
+   You can use the `-mcpu' option to specify a particular CPU.  This
+option is equivalent to using the `.version' directive in the assembly
+code.  For recognized CPU codes, see *Note `.version':
+TIC54X-Directives.  The default CPU version is `542'.
+
+   You can use the `-merrors-to-file' option to redirect error output
+to a file (this provided for those deficient environments which don't
+provide adequate output redirection).  This option may be abbreviated to
+`-me'.
+
+
+File: as.info,  Node: TIC54X-Block,  Next: TIC54X-Env,  Prev: TIC54X-Opts,  Up: TIC54X-Dependent
+
+9.35.2 Blocking
+---------------
+
+A blocked section or memory block is guaranteed not to cross the
+blocking boundary (usually a page, or 128 words) if it is smaller than
+the blocking size, or to start on a page boundary if it is larger than
+the blocking size.
+
+
+File: as.info,  Node: TIC54X-Env,  Next: TIC54X-Constants,  Prev: TIC54X-Block,  Up: TIC54X-Dependent
+
+9.35.3 Environment Settings
+---------------------------
+
+`C54XDSP_DIR' and `A_DIR' are semicolon-separated paths which are added
+to the list of directories normally searched for source and include
+files.  `C54XDSP_DIR' will override `A_DIR'.
+
+
+File: as.info,  Node: TIC54X-Constants,  Next: TIC54X-Subsyms,  Prev: TIC54X-Env,  Up: TIC54X-Dependent
+
+9.35.4 Constants Syntax
+-----------------------
+
+The TIC54X version of `as' allows the following additional constant
+formats, using a suffix to indicate the radix:
+
+     Binary                  `000000B, 011000b'
+     Octal                   `10Q, 224q'
+     Hexadecimal             `45h, 0FH'
+
+
+File: as.info,  Node: TIC54X-Subsyms,  Next: TIC54X-Locals,  Prev: TIC54X-Constants,  Up: TIC54X-Dependent
+
+9.35.5 String Substitution
+--------------------------
+
+A subset of allowable symbols (which we'll call subsyms) may be assigned
+arbitrary string values.  This is roughly equivalent to C preprocessor
+#define macros.  When `as' encounters one of these symbols, the symbol
+is replaced in the input stream by its string value.  Subsym names
+*must* begin with a letter.
+
+   Subsyms may be defined using the `.asg' and `.eval' directives
+(*Note `.asg': TIC54X-Directives, *Note `.eval': TIC54X-Directives.
+
+   Expansion is recursive until a previously encountered symbol is
+seen, at which point substitution stops.
+
+   In this example, x is replaced with SYM2; SYM2 is replaced with
+SYM1, and SYM1 is replaced with x.  At this point, x has already been
+encountered and the substitution stops.
+
+      .asg   "x",SYM1
+      .asg   "SYM1",SYM2
+      .asg   "SYM2",x
+      add    x,a             ; final code assembled is "add  x, a"
+
+   Macro parameters are converted to subsyms; a side effect of this is
+the normal `as' '\ARG' dereferencing syntax is unnecessary.  Subsyms
+defined within a macro will have global scope, unless the `.var'
+directive is used to identify the subsym as a local macro variable
+*note `.var': TIC54X-Directives.
+
+   Substitution may be forced in situations where replacement might be
+ambiguous by placing colons on either side of the subsym.  The following
+code:
+
+      .eval  "10",x
+     LAB:X:  add     #x, a
+
+   When assembled becomes:
+
+     LAB10  add     #10, a
+
+   Smaller parts of the string assigned to a subsym may be accessed with
+the following syntax:
+
+``:SYMBOL(CHAR_INDEX):''
+     Evaluates to a single-character string, the character at
+     CHAR_INDEX.
+
+``:SYMBOL(START,LENGTH):''
+     Evaluates to a substring of SYMBOL beginning at START with length
+     LENGTH.
+
+
+File: as.info,  Node: TIC54X-Locals,  Next: TIC54X-Builtins,  Prev: TIC54X-Subsyms,  Up: TIC54X-Dependent
+
+9.35.6 Local Labels
+-------------------
+
+Local labels may be defined in two ways:
+
+   * $N, where N is a decimal number between 0 and 9
+
+   * LABEL?, where LABEL is any legal symbol name.
+
+   Local labels thus defined may be redefined or automatically
+generated.  The scope of a local label is based on when it may be
+undefined or reset.  This happens when one of the following situations
+is encountered:
+
+   * .newblock directive *note `.newblock': TIC54X-Directives.
+
+   * The current section is changed (.sect, .text, or .data)
+
+   * Entering or leaving an included file
+
+   * The macro scope where the label was defined is exited
+
+
+File: as.info,  Node: TIC54X-Builtins,  Next: TIC54X-Ext,  Prev: TIC54X-Locals,  Up: TIC54X-Dependent
+
+9.35.7 Math Builtins
+--------------------
+
+The following built-in functions may be used to generate a
+floating-point value.  All return a floating-point value except `$cvi',
+`$int', and `$sgn', which return an integer value.
+
+``$acos(EXPR)''
+     Returns the floating point arccosine of EXPR.
+
+``$asin(EXPR)''
+     Returns the floating point arcsine of EXPR.
+
+``$atan(EXPR)''
+     Returns the floating point arctangent of EXPR.
+
+``$atan2(EXPR1,EXPR2)''
+     Returns the floating point arctangent of EXPR1 / EXPR2.
+
+``$ceil(EXPR)''
+     Returns the smallest integer not less than EXPR as floating point.
+
+``$cosh(EXPR)''
+     Returns the floating point hyperbolic cosine of EXPR.
+
+``$cos(EXPR)''
+     Returns the floating point cosine of EXPR.
+
+``$cvf(EXPR)''
+     Returns the integer value EXPR converted to floating-point.
+
+``$cvi(EXPR)''
+     Returns the floating point value EXPR converted to integer.
+
+``$exp(EXPR)''
+     Returns the floating point value e ^ EXPR.
+
+``$fabs(EXPR)''
+     Returns the floating point absolute value of EXPR.
+
+``$floor(EXPR)''
+     Returns the largest integer that is not greater than EXPR as
+     floating point.
+
+``$fmod(EXPR1,EXPR2)''
+     Returns the floating point remainder of EXPR1 / EXPR2.
+
+``$int(EXPR)''
+     Returns 1 if EXPR evaluates to an integer, zero otherwise.
+
+``$ldexp(EXPR1,EXPR2)''
+     Returns the floating point value EXPR1 * 2 ^ EXPR2.
+
+``$log10(EXPR)''
+     Returns the base 10 logarithm of EXPR.
+
+``$log(EXPR)''
+     Returns the natural logarithm of EXPR.
+
+``$max(EXPR1,EXPR2)''
+     Returns the floating point maximum of EXPR1 and EXPR2.
+
+``$min(EXPR1,EXPR2)''
+     Returns the floating point minimum of EXPR1 and EXPR2.
+
+``$pow(EXPR1,EXPR2)''
+     Returns the floating point value EXPR1 ^ EXPR2.
+
+``$round(EXPR)''
+     Returns the nearest integer to EXPR as a floating point number.
+
+``$sgn(EXPR)''
+     Returns -1, 0, or 1 based on the sign of EXPR.
+
+``$sin(EXPR)''
+     Returns the floating point sine of EXPR.
+
+``$sinh(EXPR)''
+     Returns the floating point hyperbolic sine of EXPR.
+
+``$sqrt(EXPR)''
+     Returns the floating point square root of EXPR.
+
+``$tan(EXPR)''
+     Returns the floating point tangent of EXPR.
+
+``$tanh(EXPR)''
+     Returns the floating point hyperbolic tangent of EXPR.
+
+``$trunc(EXPR)''
+     Returns the integer value of EXPR truncated towards zero as
+     floating point.
+
+
+
+File: as.info,  Node: TIC54X-Ext,  Next: TIC54X-Directives,  Prev: TIC54X-Builtins,  Up: TIC54X-Dependent
+
+9.35.8 Extended Addressing
+--------------------------
+
+The `LDX' pseudo-op is provided for loading the extended addressing bits
+of a label or address.  For example, if an address `_label' resides in
+extended program memory, the value of `_label' may be loaded as follows:
+      ldx     #_label,16,a    ; loads extended bits of _label
+      or      #_label,a       ; loads lower 16 bits of _label
+      bacc    a               ; full address is in accumulator A
+
+
+File: as.info,  Node: TIC54X-Directives,  Next: TIC54X-Macros,  Prev: TIC54X-Ext,  Up: TIC54X-Dependent
+
+9.35.9 Directives
+-----------------
+
+`.align [SIZE]'
+`.even'
+     Align the section program counter on the next boundary, based on
+     SIZE.  SIZE may be any power of 2.  `.even' is equivalent to
+     `.align' with a SIZE of 2.
+    `1'
+          Align SPC to word boundary
+
+    `2'
+          Align SPC to longword boundary (same as .even)
+
+    `128'
+          Align SPC to page boundary
+
+`.asg STRING, NAME'
+     Assign NAME the string STRING.  String replacement is performed on
+     STRING before assignment.
+
+`.eval STRING, NAME'
+     Evaluate the contents of string STRING and assign the result as a
+     string to the subsym NAME.  String replacement is performed on
+     STRING before assignment.
+
+`.bss SYMBOL, SIZE [, [BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
+     Reserve space for SYMBOL in the .bss section.  SIZE is in words.
+     If present, BLOCKING_FLAG indicates the allocated space should be
+     aligned on a page boundary if it would otherwise cross a page
+     boundary.  If present, ALIGNMENT_FLAG causes the assembler to
+     allocate SIZE on a long word boundary.
+
+`.byte VALUE [,...,VALUE_N]'
+`.ubyte VALUE [,...,VALUE_N]'
+`.char VALUE [,...,VALUE_N]'
+`.uchar VALUE [,...,VALUE_N]'
+     Place one or more bytes into consecutive words of the current
+     section.  The upper 8 bits of each word is zero-filled.  If a
+     label is used, it points to the word allocated for the first byte
+     encountered.
+
+`.clink ["SECTION_NAME"]'
+     Set STYP_CLINK flag for this section, which indicates to the
+     linker that if no symbols from this section are referenced, the
+     section should not be included in the link.  If SECTION_NAME is
+     omitted, the current section is used.
+
+`.c_mode'
+     TBD.
+
+`.copy "FILENAME" | FILENAME'
+`.include "FILENAME" | FILENAME'
+     Read source statements from FILENAME.  The normal include search
+     path is used.  Normally .copy will cause statements from the
+     included file to be printed in the assembly listing and .include
+     will not, but this distinction is not currently implemented.
+
+`.data'
+     Begin assembling code into the .data section.
+
+`.double VALUE [,...,VALUE_N]'
+`.ldouble VALUE [,...,VALUE_N]'
+`.float VALUE [,...,VALUE_N]'
+`.xfloat VALUE [,...,VALUE_N]'
+     Place an IEEE single-precision floating-point representation of
+     one or more floating-point values into the current section.  All
+     but `.xfloat' align the result on a longword boundary.  Values are
+     stored most-significant word first.
+
+`.drlist'
+`.drnolist'
+     Control printing of directives to the listing file.  Ignored.
+
+`.emsg STRING'
+`.mmsg STRING'
+`.wmsg STRING'
+     Emit a user-defined error, message, or warning, respectively.
+
+`.far_mode'
+     Use extended addressing when assembling statements.  This should
+     appear only once per file, and is equivalent to the -mfar-mode
+     option *note `-mfar-mode': TIC54X-Opts.
+
+`.fclist'
+`.fcnolist'
+     Control printing of false conditional blocks to the listing file.
+
+`.field VALUE [,SIZE]'
+     Initialize a bitfield of SIZE bits in the current section.  If
+     VALUE is relocatable, then SIZE must be 16.  SIZE defaults to 16
+     bits.  If VALUE does not fit into SIZE bits, the value will be
+     truncated.  Successive `.field' directives will pack starting at
+     the current word, filling the most significant bits first, and
+     aligning to the start of the next word if the field size does not
+     fit into the space remaining in the current word.  A `.align'
+     directive with an operand of 1 will force the next `.field'
+     directive to begin packing into a new word.  If a label is used, it
+     points to the word that contains the specified field.
+
+`.global SYMBOL [,...,SYMBOL_N]'
+`.def SYMBOL [,...,SYMBOL_N]'
+`.ref SYMBOL [,...,SYMBOL_N]'
+     `.def' nominally identifies a symbol defined in the current file
+     and available to other files.  `.ref' identifies a symbol used in
+     the current file but defined elsewhere.  Both map to the standard
+     `.global' directive.
+
+`.half VALUE [,...,VALUE_N]'
+`.uhalf VALUE [,...,VALUE_N]'
+`.short VALUE [,...,VALUE_N]'
+`.ushort VALUE [,...,VALUE_N]'
+`.int VALUE [,...,VALUE_N]'
+`.uint VALUE [,...,VALUE_N]'
+`.word VALUE [,...,VALUE_N]'
+`.uword VALUE [,...,VALUE_N]'
+     Place one or more values into consecutive words of the current
+     section.  If a label is used, it points to the word allocated for
+     the first value encountered.
+
+`.label SYMBOL'
+     Define a special SYMBOL to refer to the load time address of the
+     current section program counter.
+
+`.length'
+`.width'
+     Set the page length and width of the output listing file.  Ignored.
+
+`.list'
+`.nolist'
+     Control whether the source listing is printed.  Ignored.
+
+`.long VALUE [,...,VALUE_N]'
+`.ulong VALUE [,...,VALUE_N]'
+`.xlong VALUE [,...,VALUE_N]'
+     Place one or more 32-bit values into consecutive words in the
+     current section.  The most significant word is stored first.
+     `.long' and `.ulong' align the result on a longword boundary;
+     `xlong' does not.
+
+`.loop [COUNT]'
+`.break [CONDITION]'
+`.endloop'
+     Repeatedly assemble a block of code.  `.loop' begins the block, and
+     `.endloop' marks its termination.  COUNT defaults to 1024, and
+     indicates the number of times the block should be repeated.
+     `.break' terminates the loop so that assembly begins after the
+     `.endloop' directive.  The optional CONDITION will cause the loop
+     to terminate only if it evaluates to zero.
+
+`MACRO_NAME .macro [PARAM1][,...PARAM_N]'
+`[.mexit]'
+`.endm'
+     See the section on macros for more explanation (*Note
+     TIC54X-Macros::.
+
+`.mlib "FILENAME" | FILENAME'
+     Load the macro library FILENAME.  FILENAME must be an archived
+     library (BFD ar-compatible) of text files, expected to contain
+     only macro definitions.   The standard include search path is used.
+
+`.mlist'
+
+`.mnolist'
+     Control whether to include macro and loop block expansions in the
+     listing output.  Ignored.
+
+`.mmregs'
+     Define global symbolic names for the 'c54x registers.  Supposedly
+     equivalent to executing `.set' directives for each register with
+     its memory-mapped value, but in reality is provided only for
+     compatibility and does nothing.
+
+`.newblock'
+     This directive resets any TIC54X local labels currently defined.
+     Normal `as' local labels are unaffected.
+
+`.option OPTION_LIST'
+     Set listing options.  Ignored.
+
+`.sblock "SECTION_NAME" | SECTION_NAME [,"NAME_N" | NAME_N]'
+     Designate SECTION_NAME for blocking.  Blocking guarantees that a
+     section will start on a page boundary (128 words) if it would
+     otherwise cross a page boundary.  Only initialized sections may be
+     designated with this directive.  See also *Note TIC54X-Block::.
+
+`.sect "SECTION_NAME"'
+     Define a named initialized section and make it the current section.
+
+`SYMBOL .set "VALUE"'
+`SYMBOL .equ "VALUE"'
+     Equate a constant VALUE to a SYMBOL, which is placed in the symbol
+     table.  SYMBOL may not be previously defined.
+
+`.space SIZE_IN_BITS'
+`.bes SIZE_IN_BITS'
+     Reserve the given number of bits in the current section and
+     zero-fill them.  If a label is used with `.space', it points to the
+     *first* word reserved.  With `.bes', the label points to the
+     *last* word reserved.
+
+`.sslist'
+`.ssnolist'
+     Controls the inclusion of subsym replacement in the listing
+     output.  Ignored.
+
+`.string "STRING" [,...,"STRING_N"]'
+`.pstring "STRING" [,...,"STRING_N"]'
+     Place 8-bit characters from STRING into the current section.
+     `.string' zero-fills the upper 8 bits of each word, while
+     `.pstring' puts two characters into each word, filling the
+     most-significant bits first.  Unused space is zero-filled.  If a
+     label is used, it points to the first word initialized.
+
+`[STAG] .struct [OFFSET]'
+`[NAME_1] element [COUNT_1]'
+`[NAME_2] element [COUNT_2]'
+`[TNAME] .tag STAGX [TCOUNT]'
+`...'
+`[NAME_N] element [COUNT_N]'
+`[SSIZE] .endstruct'
+`LABEL .tag [STAG]'
+     Assign symbolic offsets to the elements of a structure.  STAG
+     defines a symbol to use to reference the structure.  OFFSET
+     indicates a starting value to use for the first element
+     encountered; otherwise it defaults to zero.  Each element can have
+     a named offset, NAME, which is a symbol assigned the value of the
+     element's offset into the structure.  If STAG is missing, these
+     become global symbols.  COUNT adjusts the offset that many times,
+     as if `element' were an array.  `element' may be one of `.byte',
+     `.word', `.long', `.float', or any equivalent of those, and the
+     structure offset is adjusted accordingly.  `.field' and `.string'
+     are also allowed; the size of `.field' is one bit, and `.string'
+     is considered to be one word in size.  Only element descriptors,
+     structure/union tags, `.align' and conditional assembly directives
+     are allowed within `.struct'/`.endstruct'.  `.align' aligns member
+     offsets to word boundaries only.  SSIZE, if provided, will always
+     be assigned the size of the structure.
+
+     The `.tag' directive, in addition to being used to define a
+     structure/union element within a structure, may be used to apply a
+     structure to a symbol.  Once applied to LABEL, the individual
+     structure elements may be applied to LABEL to produce the desired
+     offsets using LABEL as the structure base.
+
+`.tab'
+     Set the tab size in the output listing.  Ignored.
+
+`[UTAG] .union'
+`[NAME_1] element [COUNT_1]'
+`[NAME_2] element [COUNT_2]'
+`[TNAME] .tag UTAGX[,TCOUNT]'
+`...'
+`[NAME_N] element [COUNT_N]'
+`[USIZE] .endstruct'
+`LABEL .tag [UTAG]'
+     Similar to `.struct', but the offset after each element is reset to
+     zero, and the USIZE is set to the maximum of all defined elements.
+     Starting offset for the union is always zero.
+
+`[SYMBOL] .usect "SECTION_NAME", SIZE, [,[BLOCKING_FLAG] [,ALIGNMENT_FLAG]]'
+     Reserve space for variables in a named, uninitialized section
+     (similar to .bss).  `.usect' allows definitions sections
+     independent of .bss.  SYMBOL points to the first location reserved
+     by this allocation.  The symbol may be used as a variable name.
+     SIZE is the allocated size in words.  BLOCKING_FLAG indicates
+     whether to block this section on a page boundary (128 words)
+     (*note TIC54X-Block::).  ALIGNMENT FLAG indicates whether the
+     section should be longword-aligned.
+
+`.var SYM[,..., SYM_N]'
+     Define a subsym to be a local variable within a macro.  See *Note
+     TIC54X-Macros::.
+
+`.version VERSION'
+     Set which processor to build instructions for.  Though the
+     following values are accepted, the op is ignored.
+    `541'
+    `542'
+    `543'
+    `545'
+    `545LP'
+    `546LP'
+    `548'
+    `549'
+
+
+File: as.info,  Node: TIC54X-Macros,  Next: TIC54X-MMRegs,  Prev: TIC54X-Directives,  Up: TIC54X-Dependent
+
+9.35.10 Macros
+--------------
+
+Macros do not require explicit dereferencing of arguments (i.e., \ARG).
+
+   During macro expansion, the macro parameters are converted to
+subsyms.  If the number of arguments passed the macro invocation
+exceeds the number of parameters defined, the last parameter is
+assigned the string equivalent of all remaining arguments.  If fewer
+arguments are given than parameters, the missing parameters are
+assigned empty strings.  To include a comma in an argument, you must
+enclose the argument in quotes.
+
+   The following built-in subsym functions allow examination of the
+string value of subsyms (or ordinary strings).  The arguments are
+strings unless otherwise indicated (subsyms passed as args will be
+replaced by the strings they represent).
+``$symlen(STR)''
+     Returns the length of STR.
+
+``$symcmp(STR1,STR2)''
+     Returns 0 if STR1 == STR2, non-zero otherwise.
+
+``$firstch(STR,CH)''
+     Returns index of the first occurrence of character constant CH in
+     STR.
+
+``$lastch(STR,CH)''
+     Returns index of the last occurrence of character constant CH in
+     STR.
+
+``$isdefed(SYMBOL)''
+     Returns zero if the symbol SYMBOL is not in the symbol table,
+     non-zero otherwise.
+
+``$ismember(SYMBOL,LIST)''
+     Assign the first member of comma-separated string LIST to SYMBOL;
+     LIST is reassigned the remainder of the list.  Returns zero if
+     LIST is a null string.  Both arguments must be subsyms.
+
+``$iscons(EXPR)''
+     Returns 1 if string EXPR is binary, 2 if octal, 3 if hexadecimal,
+     4 if a character, 5 if decimal, and zero if not an integer.
+
+``$isname(NAME)''
+     Returns 1 if NAME is a valid symbol name, zero otherwise.
+
+``$isreg(REG)''
+     Returns 1 if REG is a valid predefined register name (AR0-AR7
+     only).
+
+``$structsz(STAG)''
+     Returns the size of the structure or union represented by STAG.
+
+``$structacc(STAG)''
+     Returns the reference point of the structure or union represented
+     by STAG.   Always returns zero.
+
+
+
+File: as.info,  Node: TIC54X-MMRegs,  Prev: TIC54X-Macros,  Up: TIC54X-Dependent
+
+9.35.11 Memory-mapped Registers
+-------------------------------
+
+The following symbols are recognized as memory-mapped registers:
+
+
+
+File: as.info,  Node: Z80-Dependent,  Next: Z8000-Dependent,  Prev: Xtensa-Dependent,  Up: Machine Dependencies
+
+9.36 Z80 Dependent Features
+===========================
+
+* Menu:
+
+* Z80 Options::              Options
+* Z80 Syntax::               Syntax
+* Z80 Floating Point::       Floating Point
+* Z80 Directives::           Z80 Machine Directives
+* Z80 Opcodes::              Opcodes
+
+
+File: as.info,  Node: Z80 Options,  Next: Z80 Syntax,  Up: Z80-Dependent
+
+9.36.1 Options
+--------------
+
+The Zilog Z80 and Ascii R800 version of `as' have a few machine
+dependent options.
+`-z80'
+     Produce code for the Z80 processor. There are additional options to
+     request warnings and error messages for undocumented instructions.
+
+`-ignore-undocumented-instructions'
+`-Wnud'
+     Silently assemble undocumented Z80-instructions that have been
+     adopted as documented R800-instructions.
+
+`-ignore-unportable-instructions'
+`-Wnup'
+     Silently assemble all undocumented Z80-instructions.
+
+`-warn-undocumented-instructions'
+`-Wud'
+     Issue warnings for undocumented Z80-instructions that work on
+     R800, do not assemble other undocumented instructions without
+     warning.
+
+`-warn-unportable-instructions'
+`-Wup'
+     Issue warnings for other undocumented Z80-instructions, do not
+     treat any undocumented instructions as errors.
+
+`-forbid-undocumented-instructions'
+`-Fud'
+     Treat all undocumented z80-instructions as errors.
+
+`-forbid-unportable-instructions'
+`-Fup'
+     Treat undocumented z80-instructions that do not work on R800 as
+     errors.
+
+`-r800'
+     Produce code for the R800 processor. The assembler does not support
+     undocumented instructions for the R800.  In line with common
+     practice, `as' uses Z80 instruction names for the R800 processor,
+     as far as they exist.
+
+
+File: as.info,  Node: Z80 Syntax,  Next: Z80 Floating Point,  Prev: Z80 Options,  Up: Z80-Dependent
+
+9.36.2 Syntax
+-------------
+
+The assembler syntax closely follows the 'Z80 family CPU User Manual' by
+Zilog.  In expressions a single `=' may be used as "is equal to"
+comparison operator.
+
+   Suffices can be used to indicate the radix of integer constants; `H'
+or `h' for hexadecimal, `D' or `d' for decimal, `Q', `O', `q' or `o'
+for octal, and `B' for binary.
+
+   The suffix `b' denotes a backreference to local label.
+
+* Menu:
+
+* Z80-Chars::                Special Characters
+* Z80-Regs::                 Register Names
+* Z80-Case::                 Case Sensitivity
+
+
+File: as.info,  Node: Z80-Chars,  Next: Z80-Regs,  Up: Z80 Syntax
+
+9.36.2.1 Special Characters
+...........................
+
+The semicolon `;' is the line comment character;
+
+   The dollar sign `$' can be used as a prefix for hexadecimal numbers
+and as a symbol denoting the current location counter.
+
+   A backslash `\' is an ordinary character for the Z80 assembler.
+
+   The single quote `'' must be followed by a closing quote. If there
+is one character in between, it is a character constant, otherwise it is
+a string constant.
+
+
+File: as.info,  Node: Z80-Regs,  Next: Z80-Case,  Prev: Z80-Chars,  Up: Z80 Syntax
+
+9.36.2.2 Register Names
+.......................
+
+The registers are referred to with the letters assigned to them by
+Zilog. In addition `as' recognizes `ixl' and `ixh' as the least and
+most significant octet in `ix', and similarly `iyl' and  `iyh' as parts
+of `iy'.
+
+
+File: as.info,  Node: Z80-Case,  Prev: Z80-Regs,  Up: Z80 Syntax
+
+9.36.2.3 Case Sensitivity
+.........................
+
+Upper and lower case are equivalent in register names, opcodes,
+condition codes  and assembler directives.  The case of letters is
+significant in labels and symbol names. The case is also important to
+distinguish the suffix `b' for a backward reference to a local label
+from the suffix `B' for a number in binary notation.
+
+
+File: as.info,  Node: Z80 Floating Point,  Next: Z80 Directives,  Prev: Z80 Syntax,  Up: Z80-Dependent
+
+9.36.3 Floating Point
+---------------------
+
+Floating-point numbers are not supported.
+
+
+File: as.info,  Node: Z80 Directives,  Next: Z80 Opcodes,  Prev: Z80 Floating Point,  Up: Z80-Dependent
+
+9.36.4 Z80 Assembler Directives
+-------------------------------
+
+`as' for the Z80 supports some additional directives for compatibility
+with other assemblers.
+
+   These are the additional directives in `as' for the Z80:
+
+`db EXPRESSION|STRING[,EXPRESSION|STRING...]'
+`defb EXPRESSION|STRING[,EXPRESSION|STRING...]'
+     For each STRING the characters are copied to the object file, for
+     each other EXPRESSION the value is stored in one byte.  A warning
+     is issued in case of an overflow.
+
+`dw EXPRESSION[,EXPRESSION...]'
+`defw EXPRESSION[,EXPRESSION...]'
+     For each EXPRESSION the value is stored in two bytes, ignoring
+     overflow.
+
+`d24 EXPRESSION[,EXPRESSION...]'
+`def24 EXPRESSION[,EXPRESSION...]'
+     For each EXPRESSION the value is stored in three bytes, ignoring
+     overflow.
+
+`d32 EXPRESSION[,EXPRESSION...]'
+`def32 EXPRESSION[,EXPRESSION...]'
+     For each EXPRESSION the value is stored in four bytes, ignoring
+     overflow.
+
+`ds COUNT[, VALUE]'
+`defs COUNT[, VALUE]'
+     Fill COUNT bytes in the object file with VALUE, if VALUE is
+     omitted it defaults to zero.
+
+`SYMBOL equ EXPRESSION'
+`SYMBOL defl EXPRESSION'
+     These directives set the value of SYMBOL to EXPRESSION. If `equ'
+     is used, it is an error if SYMBOL is already defined.  Symbols
+     defined with `equ' are not protected from redefinition.
+
+`set'
+     This is a normal instruction on Z80, and not an assembler
+     directive.
+
+`psect NAME'
+     A synonym for *Note Section::, no second argument should be given.
+
+
+
+File: as.info,  Node: Z80 Opcodes,  Prev: Z80 Directives,  Up: Z80-Dependent
+
+9.36.5 Opcodes
+--------------
+
+In line with common practice, Z80 mnemonics are used for both the Z80
+and the R800.
+
+   In many instructions it is possible to use one of the half index
+registers (`ixl',`ixh',`iyl',`iyh') in stead of an 8-bit general
+purpose register. This yields instructions that are documented on the
+R800 and undocumented on the Z80.  Similarly `in f,(c)' is documented
+on the R800 and undocumented on the Z80.
+
+   The assembler also supports the following undocumented
+Z80-instructions, that have not been adopted in the R800 instruction
+set:
+`out (c),0'
+     Sends zero to the port pointed to by register c.
+
+`sli M'
+     Equivalent to `M = (M<<1)+1', the operand M can be any operand
+     that is valid for `sla'. One can use `sll' as a synonym for `sli'.
+
+`OP (ix+D), R'
+     This is equivalent to
+
+          ld R, (ix+D)
+          OPC R
+          ld (ix+D), R
+
+     The operation `OPC' may be any of `res B,', `set B,', `rl', `rlc',
+     `rr', `rrc', `sla', `sli', `sra' and `srl', and the register `R'
+     may be any of `a', `b', `c', `d', `e', `h' and `l'.
+
+`OPC (iy+D), R'
+     As above, but with `iy' instead of `ix'.
+
+   The web site at `http://www.z80.info' is a good starting place to
+find more information on programming the Z80.
+
+
+File: as.info,  Node: Z8000-Dependent,  Next: Vax-Dependent,  Prev: Z80-Dependent,  Up: Machine Dependencies
+
+9.37 Z8000 Dependent Features
+=============================
+
+   The Z8000 as supports both members of the Z8000 family: the
+unsegmented Z8002, with 16 bit addresses, and the segmented Z8001 with
+24 bit addresses.
+
+   When the assembler is in unsegmented mode (specified with the
+`unsegm' directive), an address takes up one word (16 bit) sized
+register.  When the assembler is in segmented mode (specified with the
+`segm' directive), a 24-bit address takes up a long (32 bit) register.
+*Note Assembler Directives for the Z8000: Z8000 Directives, for a list
+of other Z8000 specific assembler directives.
+
+* Menu:
+
+* Z8000 Options::               Command-line options for the Z8000
+* Z8000 Syntax::                Assembler syntax for the Z8000
+* Z8000 Directives::            Special directives for the Z8000
+* Z8000 Opcodes::               Opcodes
+
+
+File: as.info,  Node: Z8000 Options,  Next: Z8000 Syntax,  Up: Z8000-Dependent
+
+9.37.1 Options
+--------------
+
+`-z8001'
+     Generate segmented code by default.
+
+`-z8002'
+     Generate unsegmented code by default.
+
+
+File: as.info,  Node: Z8000 Syntax,  Next: Z8000 Directives,  Prev: Z8000 Options,  Up: Z8000-Dependent
+
+9.37.2 Syntax
+-------------
+
+* Menu:
+
+* Z8000-Chars::                Special Characters
+* Z8000-Regs::                 Register Names
+* Z8000-Addressing::           Addressing Modes
+
+
+File: as.info,  Node: Z8000-Chars,  Next: Z8000-Regs,  Up: Z8000 Syntax
+
+9.37.2.1 Special Characters
+...........................
+
+`!' is the line comment character.
+
+   You can use `;' instead of a newline to separate statements.
+
+
+File: as.info,  Node: Z8000-Regs,  Next: Z8000-Addressing,  Prev: Z8000-Chars,  Up: Z8000 Syntax
+
+9.37.2.2 Register Names
+.......................
+
+The Z8000 has sixteen 16 bit registers, numbered 0 to 15.  You can refer
+to different sized groups of registers by register number, with the
+prefix `r' for 16 bit registers, `rr' for 32 bit registers and `rq' for
+64 bit registers.  You can also refer to the contents of the first
+eight (of the sixteen 16 bit registers) by bytes.  They are named `rlN'
+and `rhN'.
+
+_byte registers_
+     rl0 rh0 rl1 rh1 rl2 rh2 rl3 rh3
+     rl4 rh4 rl5 rh5 rl6 rh6 rl7 rh7
+
+_word registers_
+     r0 r1 r2 r3 r4 r5 r6 r7 r8 r9 r10 r11 r12 r13 r14 r15
+
+_long word registers_
+     rr0 rr2 rr4 rr6 rr8 rr10 rr12 rr14
+
+_quad word registers_
+     rq0 rq4 rq8 rq12
+
+
+File: as.info,  Node: Z8000-Addressing,  Prev: Z8000-Regs,  Up: Z8000 Syntax
+
+9.37.2.3 Addressing Modes
+.........................
+
+as understands the following addressing modes for the Z8000:
+
+`rlN'
+`rhN'
+`rN'
+`rrN'
+`rqN'
+     Register direct:  8bit, 16bit, 32bit, and 64bit registers.
+
+`@rN'
+`@rrN'
+     Indirect register:  @rrN in segmented mode, @rN in unsegmented
+     mode.
+
+`ADDR'
+     Direct: the 16 bit or 24 bit address (depending on whether the
+     assembler is in segmented or unsegmented mode) of the operand is
+     in the instruction.
+
+`address(rN)'
+     Indexed: the 16 or 24 bit address is added to the 16 bit register
+     to produce the final address in memory of the operand.
+
+`rN(#IMM)'
+`rrN(#IMM)'
+     Base Address: the 16 or 24 bit register is added to the 16 bit sign
+     extended immediate displacement to produce the final address in
+     memory of the operand.
+
+`rN(rM)'
+`rrN(rM)'
+     Base Index: the 16 or 24 bit register rN or rrN is added to the
+     sign extended 16 bit index register rM to produce the final
+     address in memory of the operand.
+
+`#XX'
+     Immediate data XX.
+
+
+File: as.info,  Node: Z8000 Directives,  Next: Z8000 Opcodes,  Prev: Z8000 Syntax,  Up: Z8000-Dependent
+
+9.37.3 Assembler Directives for the Z8000
+-----------------------------------------
+
+The Z8000 port of as includes additional assembler directives, for
+compatibility with other Z8000 assemblers.  These do not begin with `.'
+(unlike the ordinary as directives).
+
+`segm'
+`.z8001'
+     Generate code for the segmented Z8001.
+
+`unsegm'
+`.z8002'
+     Generate code for the unsegmented Z8002.
+
+`name'
+     Synonym for `.file'
+
+`global'
+     Synonym for `.global'
+
+`wval'
+     Synonym for `.word'
+
+`lval'
+     Synonym for `.long'
+
+`bval'
+     Synonym for `.byte'
+
+`sval'
+     Assemble a string.  `sval' expects one string literal, delimited by
+     single quotes.  It assembles each byte of the string into
+     consecutive addresses.  You can use the escape sequence `%XX'
+     (where XX represents a two-digit hexadecimal number) to represent
+     the character whose ASCII value is XX.  Use this feature to
+     describe single quote and other characters that may not appear in
+     string literals as themselves.  For example, the C statement
+     `char *a = "he said \"it's 50% off\"";' is represented in Z8000
+     assembly language (shown with the assembler output in hex at the
+     left) as
+
+          68652073    sval    'he said %22it%27s 50%25 off%22%00'
+          61696420
+          22697427
+          73203530
+          25206F66
+          662200
+
+`rsect'
+     synonym for `.section'
+
+`block'
+     synonym for `.space'
+
+`even'
+     special case of `.align'; aligns output to even byte boundary.
+
+
+File: as.info,  Node: Z8000 Opcodes,  Prev: Z8000 Directives,  Up: Z8000-Dependent
+
+9.37.4 Opcodes
+--------------
+
+For detailed information on the Z8000 machine instruction set, see
+`Z8000 Technical Manual'.
+
+   The following table summarizes the opcodes and their arguments:
+
+                 rs   16 bit source register
+                 rd   16 bit destination register
+                 rbs   8 bit source register
+                 rbd   8 bit destination register
+                 rrs   32 bit source register
+                 rrd   32 bit destination register
+                 rqs   64 bit source register
+                 rqd   64 bit destination register
+                 addr 16/24 bit address
+                 imm  immediate data
+
+     adc rd,rs               clrb addr               cpsir @rd,@rs,rr,cc
+     adcb rbd,rbs            clrb addr(rd)           cpsirb @rd,@rs,rr,cc
+     add rd,@rs              clrb rbd                dab rbd
+     add rd,addr             com @rd                 dbjnz rbd,disp7
+     add rd,addr(rs)         com addr                dec @rd,imm4m1
+     add rd,imm16            com addr(rd)            dec addr(rd),imm4m1
+     add rd,rs               com rd                  dec addr,imm4m1
+     addb rbd,@rs            comb @rd                dec rd,imm4m1
+     addb rbd,addr           comb addr               decb @rd,imm4m1
+     addb rbd,addr(rs)       comb addr(rd)           decb addr(rd),imm4m1
+     addb rbd,imm8           comb rbd                decb addr,imm4m1
+     addb rbd,rbs            comflg flags            decb rbd,imm4m1
+     addl rrd,@rs            cp @rd,imm16            di i2
+     addl rrd,addr           cp addr(rd),imm16       div rrd,@rs
+     addl rrd,addr(rs)       cp addr,imm16           div rrd,addr
+     addl rrd,imm32          cp rd,@rs               div rrd,addr(rs)
+     addl rrd,rrs            cp rd,addr              div rrd,imm16
+     and rd,@rs              cp rd,addr(rs)          div rrd,rs
+     and rd,addr             cp rd,imm16             divl rqd,@rs
+     and rd,addr(rs)         cp rd,rs                divl rqd,addr
+     and rd,imm16            cpb @rd,imm8            divl rqd,addr(rs)
+     and rd,rs               cpb addr(rd),imm8       divl rqd,imm32
+     andb rbd,@rs            cpb addr,imm8           divl rqd,rrs
+     andb rbd,addr           cpb rbd,@rs             djnz rd,disp7
+     andb rbd,addr(rs)       cpb rbd,addr            ei i2
+     andb rbd,imm8           cpb rbd,addr(rs)        ex rd,@rs
+     andb rbd,rbs            cpb rbd,imm8            ex rd,addr
+     bit @rd,imm4            cpb rbd,rbs             ex rd,addr(rs)
+     bit addr(rd),imm4       cpd rd,@rs,rr,cc        ex rd,rs
+     bit addr,imm4           cpdb rbd,@rs,rr,cc      exb rbd,@rs
+     bit rd,imm4             cpdr rd,@rs,rr,cc       exb rbd,addr
+     bit rd,rs               cpdrb rbd,@rs,rr,cc     exb rbd,addr(rs)
+     bitb @rd,imm4           cpi rd,@rs,rr,cc        exb rbd,rbs
+     bitb addr(rd),imm4      cpib rbd,@rs,rr,cc      ext0e imm8
+     bitb addr,imm4          cpir rd,@rs,rr,cc       ext0f imm8
+     bitb rbd,imm4           cpirb rbd,@rs,rr,cc     ext8e imm8
+     bitb rbd,rs             cpl rrd,@rs             ext8f imm8
+     bpt                     cpl rrd,addr            exts rrd
+     call @rd                cpl rrd,addr(rs)        extsb rd
+     call addr               cpl rrd,imm32           extsl rqd
+     call addr(rd)           cpl rrd,rrs             halt
+     calr disp12             cpsd @rd,@rs,rr,cc      in rd,@rs
+     clr @rd                 cpsdb @rd,@rs,rr,cc     in rd,imm16
+     clr addr                cpsdr @rd,@rs,rr,cc     inb rbd,@rs
+     clr addr(rd)            cpsdrb @rd,@rs,rr,cc    inb rbd,imm16
+     clr rd                  cpsi @rd,@rs,rr,cc      inc @rd,imm4m1
+     clrb @rd                cpsib @rd,@rs,rr,cc     inc addr(rd),imm4m1
+     inc addr,imm4m1         ldb rbd,rs(rx)          mult rrd,addr(rs)
+     inc rd,imm4m1           ldb rd(imm16),rbs       mult rrd,imm16
+     incb @rd,imm4m1         ldb rd(rx),rbs          mult rrd,rs
+     incb addr(rd),imm4m1    ldctl ctrl,rs           multl rqd,@rs
+     incb addr,imm4m1        ldctl rd,ctrl           multl rqd,addr
+     incb rbd,imm4m1         ldd @rs,@rd,rr          multl rqd,addr(rs)
+     ind @rd,@rs,ra          lddb @rs,@rd,rr         multl rqd,imm32
+     indb @rd,@rs,rba        lddr @rs,@rd,rr         multl rqd,rrs
+     inib @rd,@rs,ra         lddrb @rs,@rd,rr        neg @rd
+     inibr @rd,@rs,ra        ldi @rd,@rs,rr          neg addr
+     iret                    ldib @rd,@rs,rr         neg addr(rd)
+     jp cc,@rd               ldir @rd,@rs,rr         neg rd
+     jp cc,addr              ldirb @rd,@rs,rr        negb @rd
+     jp cc,addr(rd)          ldk rd,imm4             negb addr
+     jr cc,disp8             ldl @rd,rrs             negb addr(rd)
+     ld @rd,imm16            ldl addr(rd),rrs        negb rbd
+     ld @rd,rs               ldl addr,rrs            nop
+     ld addr(rd),imm16       ldl rd(imm16),rrs       or rd,@rs
+     ld addr(rd),rs          ldl rd(rx),rrs          or rd,addr
+     ld addr,imm16           ldl rrd,@rs             or rd,addr(rs)
+     ld addr,rs              ldl rrd,addr            or rd,imm16
+     ld rd(imm16),rs         ldl rrd,addr(rs)        or rd,rs
+     ld rd(rx),rs            ldl rrd,imm32           orb rbd,@rs
+     ld rd,@rs               ldl rrd,rrs             orb rbd,addr
+     ld rd,addr              ldl rrd,rs(imm16)       orb rbd,addr(rs)
+     ld rd,addr(rs)          ldl rrd,rs(rx)          orb rbd,imm8
+     ld rd,imm16             ldm @rd,rs,n            orb rbd,rbs
+     ld rd,rs                ldm addr(rd),rs,n       out @rd,rs
+     ld rd,rs(imm16)         ldm addr,rs,n           out imm16,rs
+     ld rd,rs(rx)            ldm rd,@rs,n            outb @rd,rbs
+     lda rd,addr             ldm rd,addr(rs),n       outb imm16,rbs
+     lda rd,addr(rs)         ldm rd,addr,n           outd @rd,@rs,ra
+     lda rd,rs(imm16)        ldps @rs                outdb @rd,@rs,rba
+     lda rd,rs(rx)           ldps addr               outib @rd,@rs,ra
+     ldar rd,disp16          ldps addr(rs)           outibr @rd,@rs,ra
+     ldb @rd,imm8            ldr disp16,rs           pop @rd,@rs
+     ldb @rd,rbs             ldr rd,disp16           pop addr(rd),@rs
+     ldb addr(rd),imm8       ldrb disp16,rbs         pop addr,@rs
+     ldb addr(rd),rbs        ldrb rbd,disp16         pop rd,@rs
+     ldb addr,imm8           ldrl disp16,rrs         popl @rd,@rs
+     ldb addr,rbs            ldrl rrd,disp16         popl addr(rd),@rs
+     ldb rbd,@rs             mbit                    popl addr,@rs
+     ldb rbd,addr            mreq rd                 popl rrd,@rs
+     ldb rbd,addr(rs)        mres                    push @rd,@rs
+     ldb rbd,imm8            mset                    push @rd,addr
+     ldb rbd,rbs             mult rrd,@rs            push @rd,addr(rs)
+     ldb rbd,rs(imm16)       mult rrd,addr           push @rd,imm16
+     push @rd,rs             set addr,imm4           subl rrd,imm32
+     pushl @rd,@rs           set rd,imm4             subl rrd,rrs
+     pushl @rd,addr          set rd,rs               tcc cc,rd
+     pushl @rd,addr(rs)      setb @rd,imm4           tccb cc,rbd
+     pushl @rd,rrs           setb addr(rd),imm4      test @rd
+     res @rd,imm4            setb addr,imm4          test addr
+     res addr(rd),imm4       setb rbd,imm4           test addr(rd)
+     res addr,imm4           setb rbd,rs             test rd
+     res rd,imm4             setflg imm4             testb @rd
+     res rd,rs               sinb rbd,imm16          testb addr
+     resb @rd,imm4           sinb rd,imm16           testb addr(rd)
+     resb addr(rd),imm4      sind @rd,@rs,ra         testb rbd
+     resb addr,imm4          sindb @rd,@rs,rba       testl @rd
+     resb rbd,imm4           sinib @rd,@rs,ra        testl addr
+     resb rbd,rs             sinibr @rd,@rs,ra       testl addr(rd)
+     resflg imm4             sla rd,imm8             testl rrd
+     ret cc                  slab rbd,imm8           trdb @rd,@rs,rba
+     rl rd,imm1or2           slal rrd,imm8           trdrb @rd,@rs,rba
+     rlb rbd,imm1or2         sll rd,imm8             trib @rd,@rs,rbr
+     rlc rd,imm1or2          sllb rbd,imm8           trirb @rd,@rs,rbr
+     rlcb rbd,imm1or2        slll rrd,imm8           trtdrb @ra,@rb,rbr
+     rldb rbb,rba            sout imm16,rs           trtib @ra,@rb,rr
+     rr rd,imm1or2           soutb imm16,rbs         trtirb @ra,@rb,rbr
+     rrb rbd,imm1or2         soutd @rd,@rs,ra        trtrb @ra,@rb,rbr
+     rrc rd,imm1or2          soutdb @rd,@rs,rba      tset @rd
+     rrcb rbd,imm1or2        soutib @rd,@rs,ra       tset addr
+     rrdb rbb,rba            soutibr @rd,@rs,ra      tset addr(rd)
+     rsvd36                  sra rd,imm8             tset rd
+     rsvd38                  srab rbd,imm8           tsetb @rd
+     rsvd78                  sral rrd,imm8           tsetb addr
+     rsvd7e                  srl rd,imm8             tsetb addr(rd)
+     rsvd9d                  srlb rbd,imm8           tsetb rbd
+     rsvd9f                  srll rrd,imm8           xor rd,@rs
+     rsvdb9                  sub rd,@rs              xor rd,addr
+     rsvdbf                  sub rd,addr             xor rd,addr(rs)
+     sbc rd,rs               sub rd,addr(rs)         xor rd,imm16
+     sbcb rbd,rbs            sub rd,imm16            xor rd,rs
+     sc imm8                 sub rd,rs               xorb rbd,@rs
+     sda rd,rs               subb rbd,@rs            xorb rbd,addr
+     sdab rbd,rs             subb rbd,addr           xorb rbd,addr(rs)
+     sdal rrd,rs             subb rbd,addr(rs)       xorb rbd,imm8
+     sdl rd,rs               subb rbd,imm8           xorb rbd,rbs
+     sdlb rbd,rs             subb rbd,rbs            xorb rbd,rbs
+     sdll rrd,rs             subl rrd,@rs
+     set @rd,imm4            subl rrd,addr
+     set addr(rd),imm4       subl rrd,addr(rs)
+
+
+File: as.info,  Node: Vax-Dependent,  Prev: Z8000-Dependent,  Up: Machine Dependencies
+
+9.38 VAX Dependent Features
+===========================
+
+* Menu:
+
+* VAX-Opts::                    VAX Command-Line Options
+* VAX-float::                   VAX Floating Point
+* VAX-directives::              Vax Machine Directives
+* VAX-opcodes::                 VAX Opcodes
+* VAX-branch::                  VAX Branch Improvement
+* VAX-operands::                VAX Operands
+* VAX-no::                      Not Supported on VAX
+
+
+File: as.info,  Node: VAX-Opts,  Next: VAX-float,  Up: Vax-Dependent
+
+9.38.1 VAX Command-Line Options
+-------------------------------
+
+The Vax version of `as' accepts any of the following options, gives a
+warning message that the option was ignored and proceeds.  These
+options are for compatibility with scripts designed for other people's
+assemblers.
+
+``-D' (Debug)'
+``-S' (Symbol Table)'
+``-T' (Token Trace)'
+     These are obsolete options used to debug old assemblers.
+
+``-d' (Displacement size for JUMPs)'
+     This option expects a number following the `-d'.  Like options
+     that expect filenames, the number may immediately follow the `-d'
+     (old standard) or constitute the whole of the command line
+     argument that follows `-d' (GNU standard).
+
+``-V' (Virtualize Interpass Temporary File)'
+     Some other assemblers use a temporary file.  This option commanded
+     them to keep the information in active memory rather than in a
+     disk file.  `as' always does this, so this option is redundant.
+
+``-J' (JUMPify Longer Branches)'
+     Many 32-bit computers permit a variety of branch instructions to
+     do the same job.  Some of these instructions are short (and fast)
+     but have a limited range; others are long (and slow) but can
+     branch anywhere in virtual memory.  Often there are 3 flavors of
+     branch: short, medium and long.  Some other assemblers would emit
+     short and medium branches, unless told by this option to emit
+     short and long branches.
+
+``-t' (Temporary File Directory)'
+     Some other assemblers may use a temporary file, and this option
+     takes a filename being the directory to site the temporary file.
+     Since `as' does not use a temporary disk file, this option makes
+     no difference.  `-t' needs exactly one filename.
+
+   The Vax version of the assembler accepts additional options when
+compiled for VMS:
+
+`-h N'
+     External symbol or section (used for global variables) names are
+     not case sensitive on VAX/VMS and always mapped to upper case.
+     This is contrary to the C language definition which explicitly
+     distinguishes upper and lower case.  To implement a standard
+     conforming C compiler, names must be changed (mapped) to preserve
+     the case information.  The default mapping is to convert all lower
+     case characters to uppercase and adding an underscore followed by
+     a 6 digit hex value, representing a 24 digit binary value.  The
+     one digits in the binary value represent which characters are
+     uppercase in the original symbol name.
+
+     The `-h N' option determines how we map names.  This takes several
+     values.  No `-h' switch at all allows case hacking as described
+     above.  A value of zero (`-h0') implies names should be upper
+     case, and inhibits the case hack.  A value of 2 (`-h2') implies
+     names should be all lower case, with no case hack.  A value of 3
+     (`-h3') implies that case should be preserved.  The value 1 is
+     unused.  The `-H' option directs `as' to display every mapped
+     symbol during assembly.
+
+     Symbols whose names include a dollar sign `$' are exceptions to the
+     general name mapping.  These symbols are normally only used to
+     reference VMS library names.  Such symbols are always mapped to
+     upper case.
+
+`-+'
+     The `-+' option causes `as' to truncate any symbol name larger
+     than 31 characters.  The `-+' option also prevents some code
+     following the `_main' symbol normally added to make the object
+     file compatible with Vax-11 "C".
+
+`-1'
+     This option is ignored for backward compatibility with `as'
+     version 1.x.
+
+`-H'
+     The `-H' option causes `as' to print every symbol which was
+     changed by case mapping.
+
+
+File: as.info,  Node: VAX-float,  Next: VAX-directives,  Prev: VAX-Opts,  Up: Vax-Dependent
+
+9.38.2 VAX Floating Point
+-------------------------
+
+Conversion of flonums to floating point is correct, and compatible with
+previous assemblers.  Rounding is towards zero if the remainder is
+exactly half the least significant bit.
+
+   `D', `F', `G' and `H' floating point formats are understood.
+
+   Immediate floating literals (_e.g._ `S`$6.9') are rendered
+correctly.  Again, rounding is towards zero in the boundary case.
+
+   The `.float' directive produces `f' format numbers.  The `.double'
+directive produces `d' format numbers.
+
+
+File: as.info,  Node: VAX-directives,  Next: VAX-opcodes,  Prev: VAX-float,  Up: Vax-Dependent
+
+9.38.3 Vax Machine Directives
+-----------------------------
+
+The Vax version of the assembler supports four directives for
+generating Vax floating point constants.  They are described in the
+table below.
+
+`.dfloat'
+     This expects zero or more flonums, separated by commas, and
+     assembles Vax `d' format 64-bit floating point constants.
+
+`.ffloat'
+     This expects zero or more flonums, separated by commas, and
+     assembles Vax `f' format 32-bit floating point constants.
+
+`.gfloat'
+     This expects zero or more flonums, separated by commas, and
+     assembles Vax `g' format 64-bit floating point constants.
+
+`.hfloat'
+     This expects zero or more flonums, separated by commas, and
+     assembles Vax `h' format 128-bit floating point constants.
+
+
+
+File: as.info,  Node: VAX-opcodes,  Next: VAX-branch,  Prev: VAX-directives,  Up: Vax-Dependent
+
+9.38.4 VAX Opcodes
+------------------
+
+All DEC mnemonics are supported.  Beware that `case...' instructions
+have exactly 3 operands.  The dispatch table that follows the `case...'
+instruction should be made with `.word' statements.  This is compatible
+with all unix assemblers we know of.
+
+
+File: as.info,  Node: VAX-branch,  Next: VAX-operands,  Prev: VAX-opcodes,  Up: Vax-Dependent
+
+9.38.5 VAX Branch Improvement
+-----------------------------
+
+Certain pseudo opcodes are permitted.  They are for branch
+instructions.  They expand to the shortest branch instruction that
+reaches the target.  Generally these mnemonics are made by substituting
+`j' for `b' at the start of a DEC mnemonic.  This feature is included
+both for compatibility and to help compilers.  If you do not need this
+feature, avoid these opcodes.  Here are the mnemonics, and the code
+they can expand into.
+
+`jbsb'
+     `Jsb' is already an instruction mnemonic, so we chose `jbsb'.
+    (byte displacement)
+          `bsbb ...'
+
+    (word displacement)
+          `bsbw ...'
+
+    (long displacement)
+          `jsb ...'
+
+`jbr'
+`jr'
+     Unconditional branch.
+    (byte displacement)
+          `brb ...'
+
+    (word displacement)
+          `brw ...'
+
+    (long displacement)
+          `jmp ...'
+
+`jCOND'
+     COND may be any one of the conditional branches `neq', `nequ',
+     `eql', `eqlu', `gtr', `geq', `lss', `gtru', `lequ', `vc', `vs',
+     `gequ', `cc', `lssu', `cs'.  COND may also be one of the bit tests
+     `bs', `bc', `bss', `bcs', `bsc', `bcc', `bssi', `bcci', `lbs',
+     `lbc'.  NOTCOND is the opposite condition to COND.
+    (byte displacement)
+          `bCOND ...'
+
+    (word displacement)
+          `bNOTCOND foo ; brw ... ; foo:'
+
+    (long displacement)
+          `bNOTCOND foo ; jmp ... ; foo:'
+
+`jacbX'
+     X may be one of `b d f g h l w'.
+    (word displacement)
+          `OPCODE ...'
+
+    (long displacement)
+               OPCODE ..., foo ;
+               brb bar ;
+               foo: jmp ... ;
+               bar:
+
+`jaobYYY'
+     YYY may be one of `lss leq'.
+
+`jsobZZZ'
+     ZZZ may be one of `geq gtr'.
+    (byte displacement)
+          `OPCODE ...'
+
+    (word displacement)
+               OPCODE ..., foo ;
+               brb bar ;
+               foo: brw DESTINATION ;
+               bar:
+
+    (long displacement)
+               OPCODE ..., foo ;
+               brb bar ;
+               foo: jmp DESTINATION ;
+               bar:
+
+`aobleq'
+`aoblss'
+`sobgeq'
+`sobgtr'
+
+    (byte displacement)
+          `OPCODE ...'
+
+    (word displacement)
+               OPCODE ..., foo ;
+               brb bar ;
+               foo: brw DESTINATION ;
+               bar:
+
+    (long displacement)
+               OPCODE ..., foo ;
+               brb bar ;
+               foo: jmp DESTINATION ;
+               bar:
+
+
+File: as.info,  Node: VAX-operands,  Next: VAX-no,  Prev: VAX-branch,  Up: Vax-Dependent
+
+9.38.6 VAX Operands
+-------------------
+
+The immediate character is `$' for Unix compatibility, not `#' as DEC
+writes it.
+
+   The indirect character is `*' for Unix compatibility, not `@' as DEC
+writes it.
+
+   The displacement sizing character is ``' (an accent grave) for Unix
+compatibility, not `^' as DEC writes it.  The letter preceding ``' may
+have either case.  `G' is not understood, but all other letters (`b i l
+s w') are understood.
+
+   Register names understood are `r0 r1 r2 ... r15 ap fp sp pc'.  Upper
+and lower case letters are equivalent.
+
+   For instance
+     tstb *w`$4(r5)
+
+   Any expression is permitted in an operand.  Operands are comma
+separated.
+
+
+File: as.info,  Node: VAX-no,  Prev: VAX-operands,  Up: Vax-Dependent
+
+9.38.7 Not Supported on VAX
+---------------------------
+
+Vax bit fields can not be assembled with `as'.  Someone can add the
+required code if they really need it.
+
+
+File: as.info,  Node: V850-Dependent,  Next: Xtensa-Dependent,  Prev: TIC54X-Dependent,  Up: Machine Dependencies
+
+9.39 v850 Dependent Features
+============================
+
+* Menu:
+
+* V850 Options::              Options
+* V850 Syntax::               Syntax
+* V850 Floating Point::       Floating Point
+* V850 Directives::           V850 Machine Directives
+* V850 Opcodes::              Opcodes
+
+
+File: as.info,  Node: V850 Options,  Next: V850 Syntax,  Up: V850-Dependent
+
+9.39.1 Options
+--------------
+
+`as' supports the following additional command-line options for the
+V850 processor family:
+
+`-wsigned_overflow'
+     Causes warnings to be produced when signed immediate values
+     overflow the space available for then within their opcodes.  By
+     default this option is disabled as it is possible to receive
+     spurious warnings due to using exact bit patterns as immediate
+     constants.
+
+`-wunsigned_overflow'
+     Causes warnings to be produced when unsigned immediate values
+     overflow the space available for then within their opcodes.  By
+     default this option is disabled as it is possible to receive
+     spurious warnings due to using exact bit patterns as immediate
+     constants.
+
+`-mv850'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850 processor.  This allows the linker to detect
+     attempts to link such code with code assembled for other
+     processors.
+
+`-mv850e'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850E processor.  This allows the linker to detect
+     attempts to link such code with code assembled for other
+     processors.
+
+`-mv850e1'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850E1 processor.  This allows the linker to
+     detect attempts to link such code with code assembled for other
+     processors.
+
+`-mv850any'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850 processor but support instructions that are
+     specific to the extended variants of the process.  This allows the
+     production of binaries that contain target specific code, but
+     which are also intended to be used in a generic fashion.  For
+     example libgcc.a contains generic routines used by the code
+     produced by GCC for all versions of the v850 architecture,
+     together with support routines only used by the V850E architecture.
+
+`-mrelax'
+     Enables relaxation.  This allows the .longcall and .longjump pseudo
+     ops to be used in the assembler source code.  These ops label
+     sections of code which are either a long function call or a long
+     branch.  The assembler will then flag these sections of code and
+     the linker will attempt to relax them.
+
+
+
+File: as.info,  Node: V850 Syntax,  Next: V850 Floating Point,  Prev: V850 Options,  Up: V850-Dependent
+
+9.39.2 Syntax
+-------------
+
+* Menu:
+
+* V850-Chars::                Special Characters
+* V850-Regs::                 Register Names
+
+
+File: as.info,  Node: V850-Chars,  Next: V850-Regs,  Up: V850 Syntax
+
+9.39.2.1 Special Characters
+...........................
+
+`#' is the line comment character.
+
+
+File: as.info,  Node: V850-Regs,  Prev: V850-Chars,  Up: V850 Syntax
+
+9.39.2.2 Register Names
+.......................
+
+`as' supports the following names for registers:
+`general register 0'
+     r0, zero
+
+`general register 1'
+     r1
+
+`general register 2'
+     r2, hp 
+
+`general register 3'
+     r3, sp 
+
+`general register 4'
+     r4, gp 
+
+`general register 5'
+     r5, tp
+
+`general register 6'
+     r6
+
+`general register 7'
+     r7
+
+`general register 8'
+     r8
+
+`general register 9'
+     r9
+
+`general register 10'
+     r10
+
+`general register 11'
+     r11
+
+`general register 12'
+     r12
+
+`general register 13'
+     r13
+
+`general register 14'
+     r14
+
+`general register 15'
+     r15
+
+`general register 16'
+     r16
+
+`general register 17'
+     r17
+
+`general register 18'
+     r18
+
+`general register 19'
+     r19
+
+`general register 20'
+     r20
+
+`general register 21'
+     r21
+
+`general register 22'
+     r22
+
+`general register 23'
+     r23
+
+`general register 24'
+     r24
+
+`general register 25'
+     r25
+
+`general register 26'
+     r26
+
+`general register 27'
+     r27
+
+`general register 28'
+     r28
+
+`general register 29'
+     r29 
+
+`general register 30'
+     r30, ep 
+
+`general register 31'
+     r31, lp 
+
+`system register 0'
+     eipc 
+
+`system register 1'
+     eipsw 
+
+`system register 2'
+     fepc 
+
+`system register 3'
+     fepsw 
+
+`system register 4'
+     ecr 
+
+`system register 5'
+     psw 
+
+`system register 16'
+     ctpc 
+
+`system register 17'
+     ctpsw 
+
+`system register 18'
+     dbpc 
+
+`system register 19'
+     dbpsw 
+
+`system register 20'
+     ctbp
+
+
+File: as.info,  Node: V850 Floating Point,  Next: V850 Directives,  Prev: V850 Syntax,  Up: V850-Dependent
+
+9.39.3 Floating Point
+---------------------
+
+The V850 family uses IEEE floating-point numbers.
+
+
+File: as.info,  Node: V850 Directives,  Next: V850 Opcodes,  Prev: V850 Floating Point,  Up: V850-Dependent
+
+9.39.4 V850 Machine Directives
+------------------------------
+
+`.offset <EXPRESSION>'
+     Moves the offset into the current section to the specified amount.
+
+`.section "name", <type>'
+     This is an extension to the standard .section directive.  It sets
+     the current section to be <type> and creates an alias for this
+     section called "name".
+
+`.v850'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850 processor.  This allows the linker to detect
+     attempts to link such code with code assembled for other
+     processors.
+
+`.v850e'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850E processor.  This allows the linker to detect
+     attempts to link such code with code assembled for other
+     processors.
+
+`.v850e1'
+     Specifies that the assembled code should be marked as being
+     targeted at the V850E1 processor.  This allows the linker to
+     detect attempts to link such code with code assembled for other
+     processors.
+
+
+
+File: as.info,  Node: V850 Opcodes,  Prev: V850 Directives,  Up: V850-Dependent
+
+9.39.5 Opcodes
+--------------
+
+`as' implements all the standard V850 opcodes.
+
+   `as' also implements the following pseudo ops:
+
+`hi0()'
+     Computes the higher 16 bits of the given expression and stores it
+     into the immediate operand field of the given instruction.  For
+     example:
+
+     `mulhi hi0(here - there), r5, r6'
+
+     computes the difference between the address of labels 'here' and
+     'there', takes the upper 16 bits of this difference, shifts it
+     down 16 bits and then multiplies it by the lower 16 bits in
+     register 5, putting the result into register 6.
+
+`lo()'
+     Computes the lower 16 bits of the given expression and stores it
+     into the immediate operand field of the given instruction.  For
+     example:
+
+     `addi lo(here - there), r5, r6'
+
+     computes the difference between the address of labels 'here' and
+     'there', takes the lower 16 bits of this difference and adds it to
+     register 5, putting the result into register 6.
+
+`hi()'
+     Computes the higher 16 bits of the given expression and then adds
+     the value of the most significant bit of the lower 16 bits of the
+     expression and stores the result into the immediate operand field
+     of the given instruction.  For example the following code can be
+     used to compute the address of the label 'here' and store it into
+     register 6:
+
+     `movhi hi(here), r0, r6'     `movea lo(here), r6, r6'
+
+     The reason for this special behaviour is that movea performs a sign
+     extension on its immediate operand.  So for example if the address
+     of 'here' was 0xFFFFFFFF then without the special behaviour of the
+     hi() pseudo-op the movhi instruction would put 0xFFFF0000 into r6,
+     then the movea instruction would takes its immediate operand,
+     0xFFFF, sign extend it to 32 bits, 0xFFFFFFFF, and then add it
+     into r6 giving 0xFFFEFFFF which is wrong (the fifth nibble is E).
+     With the hi() pseudo op adding in the top bit of the lo() pseudo
+     op, the movhi instruction actually stores 0 into r6 (0xFFFF + 1 =
+     0x0000), so that the movea instruction stores 0xFFFFFFFF into r6 -
+     the right value.
+
+`hilo()'
+     Computes the 32 bit value of the given expression and stores it
+     into the immediate operand field of the given instruction (which
+     must be a mov instruction).  For example:
+
+     `mov hilo(here), r6'
+
+     computes the absolute address of label 'here' and puts the result
+     into register 6.
+
+`sdaoff()'
+     Computes the offset of the named variable from the start of the
+     Small Data Area (whoes address is held in register 4, the GP
+     register) and stores the result as a 16 bit signed value in the
+     immediate operand field of the given instruction.  For example:
+
+     `ld.w sdaoff(_a_variable)[gp],r6'
+
+     loads the contents of the location pointed to by the label
+     '_a_variable' into register 6, provided that the label is located
+     somewhere within +/- 32K of the address held in the GP register.
+     [Note the linker assumes that the GP register contains a fixed
+     address set to the address of the label called '__gp'.  This can
+     either be set up automatically by the linker, or specifically set
+     by using the `--defsym __gp=<value>' command line option].
+
+`tdaoff()'
+     Computes the offset of the named variable from the start of the
+     Tiny Data Area (whoes address is held in register 30, the EP
+     register) and stores the result as a 4,5, 7 or 8 bit unsigned
+     value in the immediate operand field of the given instruction.
+     For example:
+
+     `sld.w tdaoff(_a_variable)[ep],r6'
+
+     loads the contents of the location pointed to by the label
+     '_a_variable' into register 6, provided that the label is located
+     somewhere within +256 bytes of the address held in the EP
+     register.  [Note the linker assumes that the EP register contains
+     a fixed address set to the address of the label called '__ep'.
+     This can either be set up automatically by the linker, or
+     specifically set by using the `--defsym __ep=<value>' command line
+     option].
+
+`zdaoff()'
+     Computes the offset of the named variable from address 0 and
+     stores the result as a 16 bit signed value in the immediate
+     operand field of the given instruction.  For example:
+
+     `movea zdaoff(_a_variable),zero,r6'
+
+     puts the address of the label '_a_variable' into register 6,
+     assuming that the label is somewhere within the first 32K of
+     memory.  (Strictly speaking it also possible to access the last
+     32K of memory as well, as the offsets are signed).
+
+`ctoff()'
+     Computes the offset of the named variable from the start of the
+     Call Table Area (whoes address is helg in system register 20, the
+     CTBP register) and stores the result a 6 or 16 bit unsigned value
+     in the immediate field of then given instruction or piece of data.
+     For example:
+
+     `callt ctoff(table_func1)'
+
+     will put the call the function whoes address is held in the call
+     table at the location labeled 'table_func1'.
+
+`.longcall `name''
+     Indicates that the following sequence of instructions is a long
+     call to function `name'.  The linker will attempt to shorten this
+     call sequence if `name' is within a 22bit offset of the call.  Only
+     valid if the `-mrelax' command line switch has been enabled.
+
+`.longjump `name''
+     Indicates that the following sequence of instructions is a long
+     jump to label `name'.  The linker will attempt to shorten this code
+     sequence if `name' is within a 22bit offset of the jump.  Only
+     valid if the `-mrelax' command line switch has been enabled.
+
+
+   For information on the V850 instruction set, see `V850 Family
+32-/16-Bit single-Chip Microcontroller Architecture Manual' from NEC.
+Ltd.
+
+
+File: as.info,  Node: Xtensa-Dependent,  Next: Z80-Dependent,  Prev: V850-Dependent,  Up: Machine Dependencies
+
+9.40 Xtensa Dependent Features
+==============================
+
+   This chapter covers features of the GNU assembler that are specific
+to the Xtensa architecture.  For details about the Xtensa instruction
+set, please consult the `Xtensa Instruction Set Architecture (ISA)
+Reference Manual'.
+
+* Menu:
+
+* Xtensa Options::              Command-line Options.
+* Xtensa Syntax::               Assembler Syntax for Xtensa Processors.
+* Xtensa Optimizations::        Assembler Optimizations.
+* Xtensa Relaxation::           Other Automatic Transformations.
+* Xtensa Directives::           Directives for Xtensa Processors.
+
+
+File: as.info,  Node: Xtensa Options,  Next: Xtensa Syntax,  Up: Xtensa-Dependent
+
+9.40.1 Command Line Options
+---------------------------
+
+The Xtensa version of the GNU assembler supports these special options:
+
+`--text-section-literals | --no-text-section-literals'
+     Control the treatment of literal pools.  The default is
+     `--no-text-section-literals', which places literals in separate
+     sections in the output file.  This allows the literal pool to be
+     placed in a data RAM/ROM.  With `--text-section-literals', the
+     literals are interspersed in the text section in order to keep
+     them as close as possible to their references.  This may be
+     necessary for large assembly files, where the literals would
+     otherwise be out of range of the `L32R' instructions in the text
+     section.  These options only affect literals referenced via
+     PC-relative `L32R' instructions; literals for absolute mode `L32R'
+     instructions are handled separately.  *Note literal: Literal
+     Directive.
+
+`--absolute-literals | --no-absolute-literals'
+     Indicate to the assembler whether `L32R' instructions use absolute
+     or PC-relative addressing.  If the processor includes the absolute
+     addressing option, the default is to use absolute `L32R'
+     relocations.  Otherwise, only the PC-relative `L32R' relocations
+     can be used.
+
+`--target-align | --no-target-align'
+     Enable or disable automatic alignment to reduce branch penalties
+     at some expense in code size.  *Note Automatic Instruction
+     Alignment: Xtensa Automatic Alignment.  This optimization is
+     enabled by default.  Note that the assembler will always align
+     instructions like `LOOP' that have fixed alignment requirements.
+
+`--longcalls | --no-longcalls'
+     Enable or disable transformation of call instructions to allow
+     calls across a greater range of addresses.  *Note Function Call
+     Relaxation: Xtensa Call Relaxation.  This option should be used
+     when call targets can potentially be out of range.  It may degrade
+     both code size and performance, but the linker can generally
+     optimize away the unnecessary overhead when a call ends up within
+     range.  The default is `--no-longcalls'.
+
+`--transform | --no-transform'
+     Enable or disable all assembler transformations of Xtensa
+     instructions, including both relaxation and optimization.  The
+     default is `--transform'; `--no-transform' should only be used in
+     the rare cases when the instructions must be exactly as specified
+     in the assembly source.  Using `--no-transform' causes out of range
+     instruction operands to be errors.
+
+`--rename-section OLDNAME=NEWNAME'
+     Rename the OLDNAME section to NEWNAME.  This option can be used
+     multiple times to rename multiple sections.
+
+
+File: as.info,  Node: Xtensa Syntax,  Next: Xtensa Optimizations,  Prev: Xtensa Options,  Up: Xtensa-Dependent
+
+9.40.2 Assembler Syntax
+-----------------------
+
+Block comments are delimited by `/*' and `*/'.  End of line comments
+may be introduced with either `#' or `//'.
+
+   Instructions consist of a leading opcode or macro name followed by
+whitespace and an optional comma-separated list of operands:
+
+     OPCODE [OPERAND, ...]
+
+   Instructions must be separated by a newline or semicolon.
+
+   FLIX instructions, which bundle multiple opcodes together in a single
+instruction, are specified by enclosing the bundled opcodes inside
+braces:
+
+     {
+     [FORMAT]
+     OPCODE0 [OPERANDS]
+     OPCODE1 [OPERANDS]
+     OPCODE2 [OPERANDS]
+     ...
+     }
+
+   The opcodes in a FLIX instruction are listed in the same order as the
+corresponding instruction slots in the TIE format declaration.
+Directives and labels are not allowed inside the braces of a FLIX
+instruction.  A particular TIE format name can optionally be specified
+immediately after the opening brace, but this is usually unnecessary.
+The assembler will automatically search for a format that can encode the
+specified opcodes, so the format name need only be specified in rare
+cases where there is more than one applicable format and where it
+matters which of those formats is used.  A FLIX instruction can also be
+specified on a single line by separating the opcodes with semicolons:
+
+     { [FORMAT;] OPCODE0 [OPERANDS]; OPCODE1 [OPERANDS]; OPCODE2 [OPERANDS]; ... }
+
+   If an opcode can only be encoded in a FLIX instruction but is not
+specified as part of a FLIX bundle, the assembler will choose the
+smallest format where the opcode can be encoded and will fill unused
+instruction slots with no-ops.
+
+* Menu:
+
+* Xtensa Opcodes::              Opcode Naming Conventions.
+* Xtensa Registers::            Register Naming.
+
+
+File: as.info,  Node: Xtensa Opcodes,  Next: Xtensa Registers,  Up: Xtensa Syntax
+
+9.40.2.1 Opcode Names
+.....................
+
+See the `Xtensa Instruction Set Architecture (ISA) Reference Manual'
+for a complete list of opcodes and descriptions of their semantics.
+
+   If an opcode name is prefixed with an underscore character (`_'),
+`as' will not transform that instruction in any way.  The underscore
+prefix disables both optimization (*note Xtensa Optimizations: Xtensa
+Optimizations.) and relaxation (*note Xtensa Relaxation: Xtensa
+Relaxation.) for that particular instruction.  Only use the underscore
+prefix when it is essential to select the exact opcode produced by the
+assembler.  Using this feature unnecessarily makes the code less
+efficient by disabling assembler optimization and less flexible by
+disabling relaxation.
+
+   Note that this special handling of underscore prefixes only applies
+to Xtensa opcodes, not to either built-in macros or user-defined macros.
+When an underscore prefix is used with a macro (e.g., `_MOV'), it
+refers to a different macro.  The assembler generally provides built-in
+macros both with and without the underscore prefix, where the underscore
+versions behave as if the underscore carries through to the instructions
+in the macros.  For example, `_MOV' may expand to `_MOV.N'.
+
+   The underscore prefix only applies to individual instructions, not to
+series of instructions.  For example, if a series of instructions have
+underscore prefixes, the assembler will not transform the individual
+instructions, but it may insert other instructions between them (e.g.,
+to align a `LOOP' instruction).  To prevent the assembler from
+modifying a series of instructions as a whole, use the `no-transform'
+directive.  *Note transform: Transform Directive.
+
+
+File: as.info,  Node: Xtensa Registers,  Prev: Xtensa Opcodes,  Up: Xtensa Syntax
+
+9.40.2.2 Register Names
+.......................
+
+The assembly syntax for a register file entry is the "short" name for a
+TIE register file followed by the index into that register file.  For
+example, the general-purpose `AR' register file has a short name of
+`a', so these registers are named `a0'...`a15'.  As a special feature,
+`sp' is also supported as a synonym for `a1'.  Additional registers may
+be added by processor configuration options and by designer-defined TIE
+extensions.  An initial `$' character is optional in all register names.
+
+
+File: as.info,  Node: Xtensa Optimizations,  Next: Xtensa Relaxation,  Prev: Xtensa Syntax,  Up: Xtensa-Dependent
+
+9.40.3 Xtensa Optimizations
+---------------------------
+
+The optimizations currently supported by `as' are generation of density
+instructions where appropriate and automatic branch target alignment.
+
+* Menu:
+
+* Density Instructions::        Using Density Instructions.
+* Xtensa Automatic Alignment::  Automatic Instruction Alignment.
+
+
+File: as.info,  Node: Density Instructions,  Next: Xtensa Automatic Alignment,  Up: Xtensa Optimizations
+
+9.40.3.1 Using Density Instructions
+...................................
+
+The Xtensa instruction set has a code density option that provides
+16-bit versions of some of the most commonly used opcodes.  Use of these
+opcodes can significantly reduce code size.  When possible, the
+assembler automatically translates instructions from the core Xtensa
+instruction set into equivalent instructions from the Xtensa code
+density option.  This translation can be disabled by using underscore
+prefixes (*note Opcode Names: Xtensa Opcodes.), by using the
+`--no-transform' command-line option (*note Command Line Options:
+Xtensa Options.), or by using the `no-transform' directive (*note
+transform: Transform Directive.).
+
+   It is a good idea _not_ to use the density instructions directly.
+The assembler will automatically select dense instructions where
+possible.  If you later need to use an Xtensa processor without the code
+density option, the same assembly code will then work without
+modification.
+
+
+File: as.info,  Node: Xtensa Automatic Alignment,  Prev: Density Instructions,  Up: Xtensa Optimizations
+
+9.40.3.2 Automatic Instruction Alignment
+........................................
+
+The Xtensa assembler will automatically align certain instructions, both
+to optimize performance and to satisfy architectural requirements.
+
+   As an optimization to improve performance, the assembler attempts to
+align branch targets so they do not cross instruction fetch boundaries.
+(Xtensa processors can be configured with either 32-bit or 64-bit
+instruction fetch widths.)  An instruction immediately following a call
+is treated as a branch target in this context, because it will be the
+target of a return from the call.  This alignment has the potential to
+reduce branch penalties at some expense in code size.  This
+optimization is enabled by default.  You can disable it with the
+`--no-target-align' command-line option (*note Command Line Options:
+Xtensa Options.).
+
+   The target alignment optimization is done without adding instructions
+that could increase the execution time of the program.  If there are
+density instructions in the code preceding a target, the assembler can
+change the target alignment by widening some of those instructions to
+the equivalent 24-bit instructions.  Extra bytes of padding can be
+inserted immediately following unconditional jump and return
+instructions.  This approach is usually successful in aligning many,
+but not all, branch targets.
+
+   The `LOOP' family of instructions must be aligned such that the
+first instruction in the loop body does not cross an instruction fetch
+boundary (e.g., with a 32-bit fetch width, a `LOOP' instruction must be
+on either a 1 or 2 mod 4 byte boundary).  The assembler knows about
+this restriction and inserts the minimal number of 2 or 3 byte no-op
+instructions to satisfy it.  When no-op instructions are added, any
+label immediately preceding the original loop will be moved in order to
+refer to the loop instruction, not the newly generated no-op
+instruction.  To preserve binary compatibility across processors with
+different fetch widths, the assembler conservatively assumes a 32-bit
+fetch width when aligning `LOOP' instructions (except if the first
+instruction in the loop is a 64-bit instruction).
+
+   Previous versions of the assembler automatically aligned `ENTRY'
+instructions to 4-byte boundaries, but that alignment is now the
+programmer's responsibility.
+
+
+File: as.info,  Node: Xtensa Relaxation,  Next: Xtensa Directives,  Prev: Xtensa Optimizations,  Up: Xtensa-Dependent
+
+9.40.4 Xtensa Relaxation
+------------------------
+
+When an instruction operand is outside the range allowed for that
+particular instruction field, `as' can transform the code to use a
+functionally-equivalent instruction or sequence of instructions.  This
+process is known as "relaxation".  This is typically done for branch
+instructions because the distance of the branch targets is not known
+until assembly-time.  The Xtensa assembler offers branch relaxation and
+also extends this concept to function calls, `MOVI' instructions and
+other instructions with immediate fields.
+
+* Menu:
+
+* Xtensa Branch Relaxation::        Relaxation of Branches.
+* Xtensa Call Relaxation::          Relaxation of Function Calls.
+* Xtensa Immediate Relaxation::     Relaxation of other Immediate Fields.
+
+
+File: as.info,  Node: Xtensa Branch Relaxation,  Next: Xtensa Call Relaxation,  Up: Xtensa Relaxation
+
+9.40.4.1 Conditional Branch Relaxation
+......................................
+
+When the target of a branch is too far away from the branch itself,
+i.e., when the offset from the branch to the target is too large to fit
+in the immediate field of the branch instruction, it may be necessary to
+replace the branch with a branch around a jump.  For example,
+
+         beqz    a2, L
+
+   may result in:
+
+         bnez.n  a2, M
+         j L
+     M:
+
+   (The `BNEZ.N' instruction would be used in this example only if the
+density option is available.  Otherwise, `BNEZ' would be used.)
+
+   This relaxation works well because the unconditional jump instruction
+has a much larger offset range than the various conditional branches.
+However, an error will occur if a branch target is beyond the range of a
+jump instruction.  `as' cannot relax unconditional jumps.  Similarly,
+an error will occur if the original input contains an unconditional
+jump to a target that is out of range.
+
+   Branch relaxation is enabled by default.  It can be disabled by using
+underscore prefixes (*note Opcode Names: Xtensa Opcodes.), the
+`--no-transform' command-line option (*note Command Line Options:
+Xtensa Options.), or the `no-transform' directive (*note transform:
+Transform Directive.).
+
+
+File: as.info,  Node: Xtensa Call Relaxation,  Next: Xtensa Immediate Relaxation,  Prev: Xtensa Branch Relaxation,  Up: Xtensa Relaxation
+
+9.40.4.2 Function Call Relaxation
+.................................
+
+Function calls may require relaxation because the Xtensa immediate call
+instructions (`CALL0', `CALL4', `CALL8' and `CALL12') provide a
+PC-relative offset of only 512 Kbytes in either direction.  For larger
+programs, it may be necessary to use indirect calls (`CALLX0',
+`CALLX4', `CALLX8' and `CALLX12') where the target address is specified
+in a register.  The Xtensa assembler can automatically relax immediate
+call instructions into indirect call instructions.  This relaxation is
+done by loading the address of the called function into the callee's
+return address register and then using a `CALLX' instruction.  So, for
+example:
+
+         call8 func
+
+   might be relaxed to:
+
+         .literal .L1, func
+         l32r    a8, .L1
+         callx8  a8
+
+   Because the addresses of targets of function calls are not generally
+known until link-time, the assembler must assume the worst and relax all
+the calls to functions in other source files, not just those that really
+will be out of range.  The linker can recognize calls that were
+unnecessarily relaxed, and it will remove the overhead introduced by the
+assembler for those cases where direct calls are sufficient.
+
+   Call relaxation is disabled by default because it can have a negative
+effect on both code size and performance, although the linker can
+usually eliminate the unnecessary overhead.  If a program is too large
+and some of the calls are out of range, function call relaxation can be
+enabled using the `--longcalls' command-line option or the `longcalls'
+directive (*note longcalls: Longcalls Directive.).
+
+
+File: as.info,  Node: Xtensa Immediate Relaxation,  Prev: Xtensa Call Relaxation,  Up: Xtensa Relaxation
+
+9.40.4.3 Other Immediate Field Relaxation
+.........................................
+
+The assembler normally performs the following other relaxations.  They
+can be disabled by using underscore prefixes (*note Opcode Names:
+Xtensa Opcodes.), the `--no-transform' command-line option (*note
+Command Line Options: Xtensa Options.), or the `no-transform' directive
+(*note transform: Transform Directive.).
+
+   The `MOVI' machine instruction can only materialize values in the
+range from -2048 to 2047.  Values outside this range are best
+materialized with `L32R' instructions.  Thus:
+
+         movi a0, 100000
+
+   is assembled into the following machine code:
+
+         .literal .L1, 100000
+         l32r a0, .L1
+
+   The `L8UI' machine instruction can only be used with immediate
+offsets in the range from 0 to 255. The `L16SI' and `L16UI' machine
+instructions can only be used with offsets from 0 to 510.  The `L32I'
+machine instruction can only be used with offsets from 0 to 1020.  A
+load offset outside these ranges can be materialized with an `L32R'
+instruction if the destination register of the load is different than
+the source address register.  For example:
+
+         l32i a1, a0, 2040
+
+   is translated to:
+
+         .literal .L1, 2040
+         l32r a1, .L1
+         add a1, a0, a1
+         l32i a1, a1, 0
+
+If the load destination and source address register are the same, an
+out-of-range offset causes an error.
+
+   The Xtensa `ADDI' instruction only allows immediate operands in the
+range from -128 to 127.  There are a number of alternate instruction
+sequences for the `ADDI' operation.  First, if the immediate is 0, the
+`ADDI' will be turned into a `MOV.N' instruction (or the equivalent
+`OR' instruction if the code density option is not available).  If the
+`ADDI' immediate is outside of the range -128 to 127, but inside the
+range -32896 to 32639, an `ADDMI' instruction or `ADDMI'/`ADDI'
+sequence will be used.  Finally, if the immediate is outside of this
+range and a free register is available, an `L32R'/`ADD' sequence will
+be used with a literal allocated from the literal pool.
+
+   For example:
+
+         addi    a5, a6, 0
+         addi    a5, a6, 512
+         addi    a5, a6, 513
+         addi    a5, a6, 50000
+
+   is assembled into the following:
+
+         .literal .L1, 50000
+         mov.n   a5, a6
+         addmi   a5, a6, 0x200
+         addmi   a5, a6, 0x200
+         addi    a5, a5, 1
+         l32r    a5, .L1
+         add     a5, a6, a5
+
+
+File: as.info,  Node: Xtensa Directives,  Prev: Xtensa Relaxation,  Up: Xtensa-Dependent
+
+9.40.5 Directives
+-----------------
+
+The Xtensa assembler supports a region-based directive syntax:
+
+         .begin DIRECTIVE [OPTIONS]
+         ...
+         .end DIRECTIVE
+
+   All the Xtensa-specific directives that apply to a region of code use
+this syntax.
+
+   The directive applies to code between the `.begin' and the `.end'.
+The state of the option after the `.end' reverts to what it was before
+the `.begin'.  A nested `.begin'/`.end' region can further change the
+state of the directive without having to be aware of its outer state.
+For example, consider:
+
+         .begin no-transform
+     L:  add a0, a1, a2
+         .begin transform
+     M:  add a0, a1, a2
+         .end transform
+     N:  add a0, a1, a2
+         .end no-transform
+
+   The `ADD' opcodes at `L' and `N' in the outer `no-transform' region
+both result in `ADD' machine instructions, but the assembler selects an
+`ADD.N' instruction for the `ADD' at `M' in the inner `transform'
+region.
+
+   The advantage of this style is that it works well inside macros
+which can preserve the context of their callers.
+
+   The following directives are available:
+
+* Menu:
+
+* Schedule Directive::         Enable instruction scheduling.
+* Longcalls Directive::        Use Indirect Calls for Greater Range.
+* Transform Directive::        Disable All Assembler Transformations.
+* Literal Directive::          Intermix Literals with Instructions.
+* Literal Position Directive:: Specify Inline Literal Pool Locations.
+* Literal Prefix Directive::   Specify Literal Section Name Prefix.
+* Absolute Literals Directive:: Control PC-Relative vs. Absolute Literals.
+
+
+File: as.info,  Node: Schedule Directive,  Next: Longcalls Directive,  Up: Xtensa Directives
+
+9.40.5.1 schedule
+.................
+
+The `schedule' directive is recognized only for compatibility with
+Tensilica's assembler.
+
+         .begin [no-]schedule
+         .end [no-]schedule
+
+   This directive is ignored and has no effect on `as'.
+
+
+File: as.info,  Node: Longcalls Directive,  Next: Transform Directive,  Prev: Schedule Directive,  Up: Xtensa Directives
+
+9.40.5.2 longcalls
+..................
+
+The `longcalls' directive enables or disables function call relaxation.
+*Note Function Call Relaxation: Xtensa Call Relaxation.
+
+         .begin [no-]longcalls
+         .end [no-]longcalls
+
+   Call relaxation is disabled by default unless the `--longcalls'
+command-line option is specified.  The `longcalls' directive overrides
+the default determined by the command-line options.
+
+
+File: as.info,  Node: Transform Directive,  Next: Literal Directive,  Prev: Longcalls Directive,  Up: Xtensa Directives
+
+9.40.5.3 transform
+..................
+
+This directive enables or disables all assembler transformation,
+including relaxation (*note Xtensa Relaxation: Xtensa Relaxation.) and
+optimization (*note Xtensa Optimizations: Xtensa Optimizations.).
+
+         .begin [no-]transform
+         .end [no-]transform
+
+   Transformations are enabled by default unless the `--no-transform'
+option is used.  The `transform' directive overrides the default
+determined by the command-line options.  An underscore opcode prefix,
+disabling transformation of that opcode, always takes precedence over
+both directives and command-line flags.
+
+
+File: as.info,  Node: Literal Directive,  Next: Literal Position Directive,  Prev: Transform Directive,  Up: Xtensa Directives
+
+9.40.5.4 literal
+................
+
+The `.literal' directive is used to define literal pool data, i.e.,
+read-only 32-bit data accessed via `L32R' instructions.
+
+         .literal LABEL, VALUE[, VALUE...]
+
+   This directive is similar to the standard `.word' directive, except
+that the actual location of the literal data is determined by the
+assembler and linker, not by the position of the `.literal' directive.
+Using this directive gives the assembler freedom to locate the literal
+data in the most appropriate place and possibly to combine identical
+literals.  For example, the code:
+
+         entry sp, 40
+         .literal .L1, sym
+         l32r    a4, .L1
+
+   can be used to load a pointer to the symbol `sym' into register
+`a4'.  The value of `sym' will not be placed between the `ENTRY' and
+`L32R' instructions; instead, the assembler puts the data in a literal
+pool.
+
+   Literal pools are placed by default in separate literal sections;
+however, when using the `--text-section-literals' option (*note Command
+Line Options: Xtensa Options.), the literal pools for PC-relative mode
+`L32R' instructions are placed in the current section.(1) These text
+section literal pools are created automatically before `ENTRY'
+instructions and manually after `.literal_position' directives (*note
+literal_position: Literal Position Directive.).  If there are no
+preceding `ENTRY' instructions, explicit `.literal_position' directives
+must be used to place the text section literal pools; otherwise, `as'
+will report an error.
+
+   When literals are placed in separate sections, the literal section
+names are derived from the names of the sections where the literals are
+defined.  The base literal section names are `.literal' for PC-relative
+mode `L32R' instructions and `.lit4' for absolute mode `L32R'
+instructions (*note absolute-literals: Absolute Literals Directive.).
+These base names are used for literals defined in the default `.text'
+section.  For literals defined in other sections or within the scope of
+a `literal_prefix' directive (*note literal_prefix: Literal Prefix
+Directive.), the following rules determine the literal section name:
+
+  1. If the current section is a member of a section group, the literal
+     section name includes the group name as a suffix to the base
+     `.literal' or `.lit4' name, with a period to separate the base
+     name and group name.  The literal section is also made a member of
+     the group.
+
+  2. If the current section name (or `literal_prefix' value) begins with
+     "`.gnu.linkonce.KIND.'", the literal section name is formed by
+     replacing "`.KIND'" with the base `.literal' or `.lit4' name.  For
+     example, for literals defined in a section named
+     `.gnu.linkonce.t.func', the literal section will be
+     `.gnu.linkonce.literal.func' or `.gnu.linkonce.lit4.func'.
+
+  3. If the current section name (or `literal_prefix' value) ends with
+     `.text', the literal section name is formed by replacing that
+     suffix with the base `.literal' or `.lit4' name.  For example, for
+     literals defined in a section named `.iram0.text', the literal
+     section will be `.iram0.literal' or `.iram0.lit4'.
+
+  4. If none of the preceding conditions apply, the literal section
+     name is formed by adding the base `.literal' or `.lit4' name as a
+     suffix to the current section name (or `literal_prefix' value).
+
+   ---------- Footnotes ----------
+
+   (1) Literals for the `.init' and `.fini' sections are always placed
+in separate sections, even when `--text-section-literals' is enabled.
+
+
+File: as.info,  Node: Literal Position Directive,  Next: Literal Prefix Directive,  Prev: Literal Directive,  Up: Xtensa Directives
+
+9.40.5.5 literal_position
+.........................
+
+When using `--text-section-literals' to place literals inline in the
+section being assembled, the `.literal_position' directive can be used
+to mark a potential location for a literal pool.
+
+         .literal_position
+
+   The `.literal_position' directive is ignored when the
+`--text-section-literals' option is not used or when `L32R'
+instructions use the absolute addressing mode.
+
+   The assembler will automatically place text section literal pools
+before `ENTRY' instructions, so the `.literal_position' directive is
+only needed to specify some other location for a literal pool.  You may
+need to add an explicit jump instruction to skip over an inline literal
+pool.
+
+   For example, an interrupt vector does not begin with an `ENTRY'
+instruction so the assembler will be unable to automatically find a good
+place to put a literal pool.  Moreover, the code for the interrupt
+vector must be at a specific starting address, so the literal pool
+cannot come before the start of the code.  The literal pool for the
+vector must be explicitly positioned in the middle of the vector (before
+any uses of the literals, due to the negative offsets used by
+PC-relative `L32R' instructions).  The `.literal_position' directive
+can be used to do this.  In the following code, the literal for `M'
+will automatically be aligned correctly and is placed after the
+unconditional jump.
+
+         .global M
+     code_start:
+         j continue
+         .literal_position
+         .align 4
+     continue:
+         movi    a4, M
+
+
+File: as.info,  Node: Literal Prefix Directive,  Next: Absolute Literals Directive,  Prev: Literal Position Directive,  Up: Xtensa Directives
+
+9.40.5.6 literal_prefix
+.......................
+
+The `literal_prefix' directive allows you to override the default
+literal section names, which are derived from the names of the sections
+where the literals are defined.
+
+         .begin literal_prefix [NAME]
+         .end literal_prefix
+
+   For literals defined within the delimited region, the literal section
+names are derived from the NAME argument instead of the name of the
+current section.  The rules used to derive the literal section names do
+not change.  *Note literal: Literal Directive.  If the NAME argument is
+omitted, the literal sections revert to the defaults.  This directive
+has no effect when using the `--text-section-literals' option (*note
+Command Line Options: Xtensa Options.).
+
+
+File: as.info,  Node: Absolute Literals Directive,  Prev: Literal Prefix Directive,  Up: Xtensa Directives
+
+9.40.5.7 absolute-literals
+..........................
+
+The `absolute-literals' and `no-absolute-literals' directives control
+the absolute vs. PC-relative mode for `L32R' instructions.  These are
+relevant only for Xtensa configurations that include the absolute
+addressing option for `L32R' instructions.
+
+         .begin [no-]absolute-literals
+         .end [no-]absolute-literals
+
+   These directives do not change the `L32R' mode--they only cause the
+assembler to emit the appropriate kind of relocation for `L32R'
+instructions and to place the literal values in the appropriate section.
+To change the `L32R' mode, the program must write the `LITBASE' special
+register.  It is the programmer's responsibility to keep track of the
+mode and indicate to the assembler which mode is used in each region of
+code.
+
+   If the Xtensa configuration includes the absolute `L32R' addressing
+option, the default is to assume absolute `L32R' addressing unless the
+`--no-absolute-literals' command-line option is specified.  Otherwise,
+the default is to assume PC-relative `L32R' addressing.  The
+`absolute-literals' directive can then be used to override the default
+determined by the command-line options.
+
+
+File: as.info,  Node: Reporting Bugs,  Next: Acknowledgements,  Prev: Machine Dependencies,  Up: Top
+
+10 Reporting Bugs
+*****************
+
+Your bug reports play an essential role in making `as' reliable.
+
+   Reporting a bug may help you by bringing a solution to your problem,
+or it may not.  But in any case the principal function of a bug report
+is to help the entire community by making the next version of `as' work
+better.  Bug reports are your contribution to the maintenance of `as'.
+
+   In order for a bug report to serve its purpose, you must include the
+information that enables us to fix the bug.
+
+* Menu:
+
+* Bug Criteria::                Have you found a bug?
+* Bug Reporting::               How to report bugs
+
+
+File: as.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Reporting Bugs
+
+10.1 Have You Found a Bug?
+==========================
+
+If you are not sure whether you have found a bug, here are some
+guidelines:
+
+   * If the assembler gets a fatal signal, for any input whatever, that
+     is a `as' bug.  Reliable assemblers never crash.
+
+   * If `as' produces an error message for valid input, that is a bug.
+
+   * If `as' does not produce an error message for invalid input, that
+     is a bug.  However, you should note that your idea of "invalid
+     input" might be our idea of "an extension" or "support for
+     traditional practice".
+
+   * If you are an experienced user of assemblers, your suggestions for
+     improvement of `as' are welcome in any case.
+
+
+File: as.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Reporting Bugs
+
+10.2 How to Report Bugs
+=======================
+
+A number of companies and individuals offer support for GNU products.
+If you obtained `as' from a support organization, we recommend you
+contact that organization first.
+
+   You can find contact information for many support companies and
+individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
+
+   In any event, we also recommend that you send bug reports for `as'
+to `http://www.sourceware.org/bugzilla/'.
+
+   The fundamental principle of reporting bugs usefully is this:
+*report all the facts*.  If you are not sure whether to state a fact or
+leave it out, state it!
+
+   Often people omit facts because they think they know what causes the
+problem and assume that some details do not matter.  Thus, you might
+assume that the name of a symbol you use in an example does not matter.
+Well, probably it does not, but one cannot be sure.  Perhaps the bug is
+a stray memory reference which happens to fetch from the location where
+that name is stored in memory; perhaps, if the name were different, the
+contents of that location would fool the assembler into doing the right
+thing despite the bug.  Play it safe and give a specific, complete
+example.  That is the easiest thing for you to do, and the most helpful.
+
+   Keep in mind that the purpose of a bug report is to enable us to fix
+the bug if it is new to us.  Therefore, always write your bug reports
+on the assumption that the bug has not been reported previously.
+
+   Sometimes people give a few sketchy facts and ask, "Does this ring a
+bell?"  This cannot help us fix a bug, so it is basically useless.  We
+respond by asking for enough details to enable us to investigate.  You
+might as well expedite matters by sending them to begin with.
+
+   To enable us to fix the bug, you should include all these things:
+
+   * The version of `as'.  `as' announces it if you start it with the
+     `--version' argument.
+
+     Without this, we will not know whether there is any point in
+     looking for the bug in the current version of `as'.
+
+   * Any patches you may have applied to the `as' source.
+
+   * The type of machine you are using, and the operating system name
+     and version number.
+
+   * What compiler (and its version) was used to compile `as'--e.g.
+     "`gcc-2.7'".
+
+   * The command arguments you gave the assembler to assemble your
+     example and observe the bug.  To guarantee you will not omit
+     something important, list them all.  A copy of the Makefile (or
+     the output from make) is sufficient.
+
+     If we were to try to guess the arguments, we would probably guess
+     wrong and then we might not encounter the bug.
+
+   * A complete input file that will reproduce the bug.  If the bug is
+     observed when the assembler is invoked via a compiler, send the
+     assembler source, not the high level language source.  Most
+     compilers will produce the assembler source when run with the `-S'
+     option.  If you are using `gcc', use the options `-v
+     --save-temps'; this will save the assembler source in a file with
+     an extension of `.s', and also show you exactly how `as' is being
+     run.
+
+   * A description of what behavior you observe that you believe is
+     incorrect.  For example, "It gets a fatal signal."
+
+     Of course, if the bug is that `as' gets a fatal signal, then we
+     will certainly notice it.  But if the bug is incorrect output, we
+     might not notice unless it is glaringly wrong.  You might as well
+     not give us a chance to make a mistake.
+
+     Even if the problem you experience is a fatal signal, you should
+     still say so explicitly.  Suppose something strange is going on,
+     such as, your copy of `as' is out of sync, or you have encountered
+     a bug in the C library on your system.  (This has happened!)  Your
+     copy might crash and ours would not.  If you told us to expect a
+     crash, then when ours fails to crash, we would know that the bug
+     was not happening for us.  If you had not told us to expect a
+     crash, then we would not be able to draw any conclusion from our
+     observations.
+
+   * If you wish to suggest changes to the `as' source, send us context
+     diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
+     Always send diffs from the old file to the new file.  If you even
+     discuss something in the `as' source, refer to it by context, not
+     by line number.
+
+     The line numbers in our development sources will not match those
+     in your sources.  Your line numbers would convey no useful
+     information to us.
+
+   Here are some things that are not necessary:
+
+   * A description of the envelope of the bug.
+
+     Often people who encounter a bug spend a lot of time investigating
+     which changes to the input file will make the bug go away and which
+     changes will not affect it.
+
+     This is often time consuming and not very useful, because the way
+     we will find the bug is by running a single example under the
+     debugger with breakpoints, not by pure deduction from a series of
+     examples.  We recommend that you save your time for something else.
+
+     Of course, if you can find a simpler example to report _instead_
+     of the original one, that is a convenience for us.  Errors in the
+     output will be easier to spot, running under the debugger will take
+     less time, and so on.
+
+     However, simplification is not vital; if you do not want to do
+     this, report the bug anyway and send us the entire test case you
+     used.
+
+   * A patch for the bug.
+
+     A patch for the bug does help us if it is a good one.  But do not
+     omit the necessary information, such as the test case, on the
+     assumption that a patch is all we need.  We might see problems
+     with your patch and decide to fix the problem another way, or we
+     might not understand it at all.
+
+     Sometimes with a program as complicated as `as' it is very hard to
+     construct an example that will make the program follow a certain
+     path through the code.  If you do not send us the example, we will
+     not be able to construct one, so we will not be able to verify
+     that the bug is fixed.
+
+     And if we cannot understand what bug you are trying to fix, or why
+     your patch should be an improvement, we will not install it.  A
+     test case will help us to understand.
+
+   * A guess about what the bug is or what it depends on.
+
+     Such guesses are usually wrong.  Even we cannot guess right about
+     such things without first using the debugger to find the facts.
+
+
+File: as.info,  Node: Acknowledgements,  Next: GNU Free Documentation License,  Prev: Reporting Bugs,  Up: Top
+
+11 Acknowledgements
+*******************
+
+If you have contributed to GAS and your name isn't listed here, it is
+not meant as a slight.  We just don't know about it.  Send mail to the
+maintainer, and we'll correct the situation.  Currently the maintainer
+is Ken Raeburn (email address `raeburn@cygnus.com').
+
+   Dean Elsner wrote the original GNU assembler for the VAX.(1)
+
+   Jay Fenlason maintained GAS for a while, adding support for
+GDB-specific debug information and the 68k series machines, most of the
+preprocessing pass, and extensive changes in `messages.c',
+`input-file.c', `write.c'.
+
+   K. Richard Pixley maintained GAS for a while, adding various
+enhancements and many bug fixes, including merging support for several
+processors, breaking GAS up to handle multiple object file format back
+ends (including heavy rewrite, testing, an integration of the coff and
+b.out back ends), adding configuration including heavy testing and
+verification of cross assemblers and file splits and renaming,
+converted GAS to strictly ANSI C including full prototypes, added
+support for m680[34]0 and cpu32, did considerable work on i960
+including a COFF port (including considerable amounts of reverse
+engineering), a SPARC opcode file rewrite, DECstation, rs6000, and
+hp300hpux host ports, updated "know" assertions and made them work,
+much other reorganization, cleanup, and lint.
+
+   Ken Raeburn wrote the high-level BFD interface code to replace most
+of the code in format-specific I/O modules.
+
+   The original VMS support was contributed by David L. Kashtan.  Eric
+Youngdale has done much work with it since.
+
+   The Intel 80386 machine description was written by Eliot Dresselhaus.
+
+   Minh Tran-Le at IntelliCorp contributed some AIX 386 support.
+
+   The Motorola 88k machine description was contributed by Devon Bowen
+of Buffalo University and Torbjorn Granlund of the Swedish Institute of
+Computer Science.
+
+   Keith Knowles at the Open Software Foundation wrote the original
+MIPS back end (`tc-mips.c', `tc-mips.h'), and contributed Rose format
+support (which hasn't been merged in yet).  Ralph Campbell worked with
+the MIPS code to support a.out format.
+
+   Support for the Zilog Z8k and Renesas H8/300 processors (tc-z8k,
+tc-h8300), and IEEE 695 object file format (obj-ieee), was written by
+Steve Chamberlain of Cygnus Support.  Steve also modified the COFF back
+end to use BFD for some low-level operations, for use with the H8/300
+and AMD 29k targets.
+
+   John Gilmore built the AMD 29000 support, added `.include' support,
+and simplified the configuration of which versions accept which
+directives.  He updated the 68k machine description so that Motorola's
+opcodes always produced fixed-size instructions (e.g., `jsr'), while
+synthetic instructions remained shrinkable (`jbsr').  John fixed many
+bugs, including true tested cross-compilation support, and one bug in
+relaxation that took a week and required the proverbial one-bit fix.
+
+   Ian Lance Taylor of Cygnus Support merged the Motorola and MIT
+syntax for the 68k, completed support for some COFF targets (68k, i386
+SVR3, and SCO Unix), added support for MIPS ECOFF and ELF targets,
+wrote the initial RS/6000 and PowerPC assembler, and made a few other
+minor patches.
+
+   Steve Chamberlain made GAS able to generate listings.
+
+   Hewlett-Packard contributed support for the HP9000/300.
+
+   Jeff Law wrote GAS and BFD support for the native HPPA object format
+(SOM) along with a fairly extensive HPPA testsuite (for both SOM and
+ELF object formats).  This work was supported by both the Center for
+Software Science at the University of Utah and Cygnus Support.
+
+   Support for ELF format files has been worked on by Mark Eichin of
+Cygnus Support (original, incomplete implementation for SPARC), Pete
+Hoogenboom and Jeff Law at the University of Utah (HPPA mainly),
+Michael Meissner of the Open Software Foundation (i386 mainly), and Ken
+Raeburn of Cygnus Support (sparc, and some initial 64-bit support).
+
+   Linas Vepstas added GAS support for the ESA/390 "IBM 370"
+architecture.
+
+   Richard Henderson rewrote the Alpha assembler. Klaus Kaempf wrote
+GAS and BFD support for openVMS/Alpha.
+
+   Timothy Wall, Michael Hayes, and Greg Smart contributed to the
+various tic* flavors.
+
+   David Heine, Sterling Augustine, Bob Wilson and John Ruttenberg from
+Tensilica, Inc. added support for Xtensa processors.
+
+   Several engineers at Cygnus Support have also provided many small
+bug fixes and configuration enhancements.
+
+   Jon Beniston added support for the Lattice Mico32 architecture.
+
+   Many others have contributed large or small bugfixes and
+enhancements.  If you have contributed significant work and are not
+mentioned on this list, and want to be, let us know.  Some of the
+history has been lost; we are not intentionally leaving anyone out.
+
+   ---------- Footnotes ----------
+
+   (1) Any more details?
+
+
+File: as.info,  Node: GNU Free Documentation License,  Next: AS Index,  Prev: Acknowledgements,  Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: as.info,  Node: AS Index,  Prev: GNU Free Documentation License,  Up: Top
+
+AS Index
+********
+
+[index]
+* Menu:
+
+* #:                                     Comments.            (line  39)
+* #APP:                                  Preprocessing.       (line  26)
+* #NO_APP:                               Preprocessing.       (line  26)
+* $ in symbol names <1>:                 D10V-Chars.          (line  46)
+* $ in symbol names <2>:                 SH-Chars.            (line  10)
+* $ in symbol names <3>:                 D30V-Chars.          (line  63)
+* $ in symbol names:                     SH64-Chars.          (line  10)
+* $a:                                    ARM Mapping Symbols. (line   9)
+* $acos math builtin, TIC54X:            TIC54X-Builtins.     (line  10)
+* $asin math builtin, TIC54X:            TIC54X-Builtins.     (line  13)
+* $atan math builtin, TIC54X:            TIC54X-Builtins.     (line  16)
+* $atan2 math builtin, TIC54X:           TIC54X-Builtins.     (line  19)
+* $ceil math builtin, TIC54X:            TIC54X-Builtins.     (line  22)
+* $cos math builtin, TIC54X:             TIC54X-Builtins.     (line  28)
+* $cosh math builtin, TIC54X:            TIC54X-Builtins.     (line  25)
+* $cvf math builtin, TIC54X:             TIC54X-Builtins.     (line  31)
+* $cvi math builtin, TIC54X:             TIC54X-Builtins.     (line  34)
+* $d:                                    ARM Mapping Symbols. (line  15)
+* $exp math builtin, TIC54X:             TIC54X-Builtins.     (line  37)
+* $fabs math builtin, TIC54X:            TIC54X-Builtins.     (line  40)
+* $firstch subsym builtin, TIC54X:       TIC54X-Macros.       (line  26)
+* $floor math builtin, TIC54X:           TIC54X-Builtins.     (line  43)
+* $fmod math builtin, TIC54X:            TIC54X-Builtins.     (line  47)
+* $int math builtin, TIC54X:             TIC54X-Builtins.     (line  50)
+* $iscons subsym builtin, TIC54X:        TIC54X-Macros.       (line  43)
+* $isdefed subsym builtin, TIC54X:       TIC54X-Macros.       (line  34)
+* $ismember subsym builtin, TIC54X:      TIC54X-Macros.       (line  38)
+* $isname subsym builtin, TIC54X:        TIC54X-Macros.       (line  47)
+* $isreg subsym builtin, TIC54X:         TIC54X-Macros.       (line  50)
+* $lastch subsym builtin, TIC54X:        TIC54X-Macros.       (line  30)
+* $ldexp math builtin, TIC54X:           TIC54X-Builtins.     (line  53)
+* $log math builtin, TIC54X:             TIC54X-Builtins.     (line  59)
+* $log10 math builtin, TIC54X:           TIC54X-Builtins.     (line  56)
+* $max math builtin, TIC54X:             TIC54X-Builtins.     (line  62)
+* $min math builtin, TIC54X:             TIC54X-Builtins.     (line  65)
+* $pow math builtin, TIC54X:             TIC54X-Builtins.     (line  68)
+* $round math builtin, TIC54X:           TIC54X-Builtins.     (line  71)
+* $sgn math builtin, TIC54X:             TIC54X-Builtins.     (line  74)
+* $sin math builtin, TIC54X:             TIC54X-Builtins.     (line  77)
+* $sinh math builtin, TIC54X:            TIC54X-Builtins.     (line  80)
+* $sqrt math builtin, TIC54X:            TIC54X-Builtins.     (line  83)
+* $structacc subsym builtin, TIC54X:     TIC54X-Macros.       (line  57)
+* $structsz subsym builtin, TIC54X:      TIC54X-Macros.       (line  54)
+* $symcmp subsym builtin, TIC54X:        TIC54X-Macros.       (line  23)
+* $symlen subsym builtin, TIC54X:        TIC54X-Macros.       (line  20)
+* $t:                                    ARM Mapping Symbols. (line  12)
+* $tan math builtin, TIC54X:             TIC54X-Builtins.     (line  86)
+* $tanh math builtin, TIC54X:            TIC54X-Builtins.     (line  89)
+* $trunc math builtin, TIC54X:           TIC54X-Builtins.     (line  92)
+* -+ option, VAX/VMS:                    VAX-Opts.            (line  71)
+* --:                                    Command Line.        (line  10)
+* --32 option, i386:                     i386-Options.        (line   8)
+* --32 option, x86-64:                   i386-Options.        (line   8)
+* --64 option, i386:                     i386-Options.        (line   8)
+* --64 option, x86-64:                   i386-Options.        (line   8)
+* --absolute-literals:                   Xtensa Options.      (line  23)
+* --allow-reg-prefix:                    SH Options.          (line   9)
+* --alternate:                           alternate.           (line   6)
+* --base-size-default-16:                M68K-Opts.           (line  71)
+* --base-size-default-32:                M68K-Opts.           (line  71)
+* --big:                                 SH Options.          (line   9)
+* --bitwise-or option, M680x0:           M68K-Opts.           (line  64)
+* --disp-size-default-16:                M68K-Opts.           (line  80)
+* --disp-size-default-32:                M68K-Opts.           (line  80)
+* --divide option, i386:                 i386-Options.        (line  24)
+* --dsp:                                 SH Options.          (line   9)
+* --emulation=crisaout command line option, CRIS: CRIS-Opts.  (line   9)
+* --emulation=criself command line option, CRIS: CRIS-Opts.   (line   9)
+* --enforce-aligned-data:                Sparc-Aligned-Data.  (line  11)
+* --fatal-warnings:                      W.                   (line  16)
+* --fix-v4bx command line option, ARM:   ARM Options.         (line 143)
+* --fixed-special-register-names command line option, MMIX: MMIX-Opts.
+                                                              (line   8)
+* --force-long-branches:                 M68HC11-Opts.        (line  69)
+* --generate-example:                    M68HC11-Opts.        (line  86)
+* --globalize-symbols command line option, MMIX: MMIX-Opts.   (line  12)
+* --gnu-syntax command line option, MMIX: MMIX-Opts.          (line  16)
+* --hash-size=NUMBER:                    Overview.            (line 326)
+* --linker-allocated-gregs command line option, MMIX: MMIX-Opts.
+                                                              (line  67)
+* --listing-cont-lines:                  listing.             (line  34)
+* --listing-lhs-width:                   listing.             (line  16)
+* --listing-lhs-width2:                  listing.             (line  21)
+* --listing-rhs-width:                   listing.             (line  28)
+* --little:                              SH Options.          (line   9)
+* --longcalls:                           Xtensa Options.      (line  37)
+* --march=ARCHITECTURE command line option, CRIS: CRIS-Opts.  (line  33)
+* --MD:                                  MD.                  (line   6)
+* --mul-bug-abort command line option, CRIS: CRIS-Opts.       (line  61)
+* --no-absolute-literals:                Xtensa Options.      (line  23)
+* --no-expand command line option, MMIX: MMIX-Opts.           (line  31)
+* --no-longcalls:                        Xtensa Options.      (line  37)
+* --no-merge-gregs command line option, MMIX: MMIX-Opts.      (line  36)
+* --no-mul-bug-abort command line option, CRIS: CRIS-Opts.    (line  61)
+* --no-predefined-syms command line option, MMIX: MMIX-Opts.  (line  22)
+* --no-pushj-stubs command line option, MMIX: MMIX-Opts.      (line  54)
+* --no-stubs command line option, MMIX:  MMIX-Opts.           (line  54)
+* --no-target-align:                     Xtensa Options.      (line  30)
+* --no-text-section-literals:            Xtensa Options.      (line   9)
+* --no-transform:                        Xtensa Options.      (line  46)
+* --no-underscore command line option, CRIS: CRIS-Opts.       (line  15)
+* --no-warn:                             W.                   (line  11)
+* --pcrel:                               M68K-Opts.           (line  92)
+* --pic command line option, CRIS:       CRIS-Opts.           (line  27)
+* --print-insn-syntax:                   M68HC11-Opts.        (line  75)
+* --print-opcodes:                       M68HC11-Opts.        (line  79)
+* --register-prefix-optional option, M680x0: M68K-Opts.       (line  51)
+* --relax:                               SH Options.          (line   9)
+* --relax command line option, MMIX:     MMIX-Opts.           (line  19)
+* --rename-section:                      Xtensa Options.      (line  54)
+* --renesas:                             SH Options.          (line   9)
+* --short-branches:                      M68HC11-Opts.        (line  54)
+* --small:                               SH Options.          (line   9)
+* --statistics:                          statistics.          (line   6)
+* --strict-direct-mode:                  M68HC11-Opts.        (line  44)
+* --target-align:                        Xtensa Options.      (line  30)
+* --text-section-literals:               Xtensa Options.      (line   9)
+* --traditional-format:                  traditional-format.  (line   6)
+* --transform:                           Xtensa Options.      (line  46)
+* --underscore command line option, CRIS: CRIS-Opts.          (line  15)
+* --warn:                                W.                   (line  19)
+* -1 option, VAX/VMS:                    VAX-Opts.            (line  77)
+* -32addr command line option, Alpha:    Alpha Options.       (line  58)
+* -a:                                    a.                   (line   6)
+* -A options, i960:                      Options-i960.        (line   6)
+* -ac:                                   a.                   (line   6)
+* -ad:                                   a.                   (line   6)
+* -ag:                                   a.                   (line   6)
+* -ah:                                   a.                   (line   6)
+* -al:                                   a.                   (line   6)
+* -an:                                   a.                   (line   6)
+* -as:                                   a.                   (line   6)
+* -Asparclet:                            Sparc-Opts.          (line  25)
+* -Asparclite:                           Sparc-Opts.          (line  25)
+* -Av6:                                  Sparc-Opts.          (line  25)
+* -Av8:                                  Sparc-Opts.          (line  25)
+* -Av9:                                  Sparc-Opts.          (line  25)
+* -Av9a:                                 Sparc-Opts.          (line  25)
+* -b option, i960:                       Options-i960.        (line  22)
+* -big option, M32R:                     M32R-Opts.           (line  35)
+* -D:                                    D.                   (line   6)
+* -D, ignored on VAX:                    VAX-Opts.            (line  11)
+* -d, VAX option:                        VAX-Opts.            (line  16)
+* -eabi= command line option, ARM:       ARM Options.         (line 126)
+* -EB command line option, ARC:          ARC Options.         (line  31)
+* -EB command line option, ARM:          ARM Options.         (line 131)
+* -EB option (MIPS):                     MIPS Opts.           (line  13)
+* -EB option, M32R:                      M32R-Opts.           (line  39)
+* -EL command line option, ARC:          ARC Options.         (line  35)
+* -EL command line option, ARM:          ARM Options.         (line 135)
+* -EL option (MIPS):                     MIPS Opts.           (line  13)
+* -EL option, M32R:                      M32R-Opts.           (line  32)
+* -f:                                    f.                   (line   6)
+* -F command line option, Alpha:         Alpha Options.       (line  58)
+* -G command line option, Alpha:         Alpha Options.       (line  54)
+* -g command line option, Alpha:         Alpha Options.       (line  48)
+* -G option (MIPS):                      MIPS Opts.           (line   8)
+* -H option, VAX/VMS:                    VAX-Opts.            (line  81)
+* -h option, VAX/VMS:                    VAX-Opts.            (line  45)
+* -I PATH:                               I.                   (line   6)
+* -ignore-parallel-conflicts option, M32RX: M32R-Opts.        (line  87)
+* -Ip option, M32RX:                     M32R-Opts.           (line  97)
+* -J, ignored on VAX:                    VAX-Opts.            (line  27)
+* -K:                                    K.                   (line   6)
+* -k command line option, ARM:           ARM Options.         (line 139)
+* -KPIC option, M32R:                    M32R-Opts.           (line  42)
+* -KPIC option, MIPS:                    MIPS Opts.           (line  21)
+* -L:                                    L.                   (line   6)
+* -l option, M680x0:                     M68K-Opts.           (line  39)
+* -little option, M32R:                  M32R-Opts.           (line  27)
+* -M:                                    M.                   (line   6)
+* -m11/03:                               PDP-11-Options.      (line 140)
+* -m11/04:                               PDP-11-Options.      (line 143)
+* -m11/05:                               PDP-11-Options.      (line 146)
+* -m11/10:                               PDP-11-Options.      (line 146)
+* -m11/15:                               PDP-11-Options.      (line 149)
+* -m11/20:                               PDP-11-Options.      (line 149)
+* -m11/21:                               PDP-11-Options.      (line 152)
+* -m11/23:                               PDP-11-Options.      (line 155)
+* -m11/24:                               PDP-11-Options.      (line 155)
+* -m11/34:                               PDP-11-Options.      (line 158)
+* -m11/34a:                              PDP-11-Options.      (line 161)
+* -m11/35:                               PDP-11-Options.      (line 164)
+* -m11/40:                               PDP-11-Options.      (line 164)
+* -m11/44:                               PDP-11-Options.      (line 167)
+* -m11/45:                               PDP-11-Options.      (line 170)
+* -m11/50:                               PDP-11-Options.      (line 170)
+* -m11/53:                               PDP-11-Options.      (line 173)
+* -m11/55:                               PDP-11-Options.      (line 170)
+* -m11/60:                               PDP-11-Options.      (line 176)
+* -m11/70:                               PDP-11-Options.      (line 170)
+* -m11/73:                               PDP-11-Options.      (line 173)
+* -m11/83:                               PDP-11-Options.      (line 173)
+* -m11/84:                               PDP-11-Options.      (line 173)
+* -m11/93:                               PDP-11-Options.      (line 173)
+* -m11/94:                               PDP-11-Options.      (line 173)
+* -m16c option, M16C:                    M32C-Opts.           (line  12)
+* -m31 option, s390:                     s390 Options.        (line   8)
+* -m32c option, M32C:                    M32C-Opts.           (line   9)
+* -m32r option, M32R:                    M32R-Opts.           (line  21)
+* -m32rx option, M32R2:                  M32R-Opts.           (line  17)
+* -m32rx option, M32RX:                  M32R-Opts.           (line   9)
+* -m64 option, s390:                     s390 Options.        (line   8)
+* -m68000 and related options:           M68K-Opts.           (line 104)
+* -m68hc11:                              M68HC11-Opts.        (line   9)
+* -m68hc12:                              M68HC11-Opts.        (line  14)
+* -m68hcs12:                             M68HC11-Opts.        (line  21)
+* -m[no-]68851 command line option, M680x0: M68K-Opts.        (line  21)
+* -m[no-]68881 command line option, M680x0: M68K-Opts.        (line  21)
+* -m[no-]div command line option, M680x0: M68K-Opts.          (line  21)
+* -m[no-]emac command line option, M680x0: M68K-Opts.         (line  21)
+* -m[no-]float command line option, M680x0: M68K-Opts.        (line  21)
+* -m[no-]mac command line option, M680x0: M68K-Opts.          (line  21)
+* -m[no-]usp command line option, M680x0: M68K-Opts.          (line  21)
+* -mall:                                 PDP-11-Options.      (line  26)
+* -mall-enabled command line option, LM32: LM32 Options.      (line  30)
+* -mall-extensions:                      PDP-11-Options.      (line  26)
+* -mall-opcodes command line option, AVR: AVR Options.        (line  62)
+* -mapcs command line option, ARM:       ARM Options.         (line  99)
+* -mapcs-float command line option, ARM: ARM Options.         (line 112)
+* -mapcs-reentrant command line option, ARM: ARM Options.     (line 117)
+* -marc[5|6|7|8] command line option, ARC: ARC Options.       (line   6)
+* -march= command line option, ARM:      ARM Options.         (line  40)
+* -march= command line option, M680x0:   M68K-Opts.           (line   8)
+* -march= option, i386:                  i386-Options.        (line  31)
+* -march= option, s390:                  s390 Options.        (line  25)
+* -march= option, x86-64:                i386-Options.        (line  31)
+* -matpcs command line option, ARM:      ARM Options.         (line 104)
+* -mbarrel-shift-enabled command line option, LM32: LM32 Options.
+                                                              (line  12)
+* -mbreak-enabled command line option, LM32: LM32 Options.    (line  27)
+* -mcis:                                 PDP-11-Options.      (line  32)
+* -mconstant-gp command line option, IA-64: IA-64 Options.    (line   6)
+* -mCPU command line option, Alpha:      Alpha Options.       (line   6)
+* -mcpu option, cpu:                     TIC54X-Opts.         (line  15)
+* -mcpu= command line option, ARM:       ARM Options.         (line   6)
+* -mcpu= command line option, Blackfin:  Blackfin Options.    (line   6)
+* -mcpu= command line option, M680x0:    M68K-Opts.           (line  14)
+* -mcsm:                                 PDP-11-Options.      (line  43)
+* -mdcache-enabled command line option, LM32: LM32 Options.   (line  24)
+* -mdebug command line option, Alpha:    Alpha Options.       (line  25)
+* -mdivide-enabled command line option, LM32: LM32 Options.   (line   9)
+* -me option, stderr redirect:           TIC54X-Opts.         (line  20)
+* -meis:                                 PDP-11-Options.      (line  46)
+* -merrors-to-file option, stderr redirect: TIC54X-Opts.      (line  20)
+* -mesa option, s390:                    s390 Options.        (line  17)
+* -mf option, far-mode:                  TIC54X-Opts.         (line   8)
+* -mf11:                                 PDP-11-Options.      (line 122)
+* -mfar-mode option, far-mode:           TIC54X-Opts.         (line   8)
+* -mfis:                                 PDP-11-Options.      (line  51)
+* -mfloat-abi= command line option, ARM: ARM Options.         (line 121)
+* -mfp-11:                               PDP-11-Options.      (line  56)
+* -mfpp:                                 PDP-11-Options.      (line  56)
+* -mfpu:                                 PDP-11-Options.      (line  56)
+* -mfpu= command line option, ARM:       ARM Options.         (line  55)
+* -micache-enabled command line option, LM32: LM32 Options.   (line  21)
+* -mimplicit-it command line option, ARM: ARM Options.        (line  83)
+* -mip2022 option, IP2K:                 IP2K-Opts.           (line  14)
+* -mip2022ext option, IP2022:            IP2K-Opts.           (line   9)
+* -mj11:                                 PDP-11-Options.      (line 126)
+* -mka11:                                PDP-11-Options.      (line  92)
+* -mkb11:                                PDP-11-Options.      (line  95)
+* -mkd11a:                               PDP-11-Options.      (line  98)
+* -mkd11b:                               PDP-11-Options.      (line 101)
+* -mkd11d:                               PDP-11-Options.      (line 104)
+* -mkd11e:                               PDP-11-Options.      (line 107)
+* -mkd11f:                               PDP-11-Options.      (line 110)
+* -mkd11h:                               PDP-11-Options.      (line 110)
+* -mkd11k:                               PDP-11-Options.      (line 114)
+* -mkd11q:                               PDP-11-Options.      (line 110)
+* -mkd11z:                               PDP-11-Options.      (line 118)
+* -mkev11:                               PDP-11-Options.      (line  51)
+* -mlimited-eis:                         PDP-11-Options.      (line  64)
+* -mlong:                                M68HC11-Opts.        (line  32)
+* -mlong-double:                         M68HC11-Opts.        (line  40)
+* -mmcu= command line option, AVR:       AVR Options.         (line   6)
+* -mmfpt:                                PDP-11-Options.      (line  70)
+* -mmicrocode:                           PDP-11-Options.      (line  83)
+* -mmnemonic= option, i386:              i386-Options.        (line  80)
+* -mmnemonic= option, x86-64:            i386-Options.        (line  80)
+* -mmultiply-enabled command line option, LM32: LM32 Options. (line   6)
+* -mmutiproc:                            PDP-11-Options.      (line  73)
+* -mmxps:                                PDP-11-Options.      (line  77)
+* -mnaked-reg option, i386:              i386-Options.        (line  94)
+* -mnaked-reg option, x86-64:            i386-Options.        (line  94)
+* -mno-cis:                              PDP-11-Options.      (line  32)
+* -mno-csm:                              PDP-11-Options.      (line  43)
+* -mno-eis:                              PDP-11-Options.      (line  46)
+* -mno-extensions:                       PDP-11-Options.      (line  29)
+* -mno-fis:                              PDP-11-Options.      (line  51)
+* -mno-fp-11:                            PDP-11-Options.      (line  56)
+* -mno-fpp:                              PDP-11-Options.      (line  56)
+* -mno-fpu:                              PDP-11-Options.      (line  56)
+* -mno-kev11:                            PDP-11-Options.      (line  51)
+* -mno-limited-eis:                      PDP-11-Options.      (line  64)
+* -mno-mfpt:                             PDP-11-Options.      (line  70)
+* -mno-microcode:                        PDP-11-Options.      (line  83)
+* -mno-mutiproc:                         PDP-11-Options.      (line  73)
+* -mno-mxps:                             PDP-11-Options.      (line  77)
+* -mno-pic:                              PDP-11-Options.      (line  11)
+* -mno-regnames option, s390:            s390 Options.        (line  35)
+* -mno-skip-bug command line option, AVR: AVR Options.        (line  65)
+* -mno-spl:                              PDP-11-Options.      (line  80)
+* -mno-sym32:                            MIPS Opts.           (line 189)
+* -mno-wrap command line option, AVR:    AVR Options.         (line  68)
+* -mpic:                                 PDP-11-Options.      (line  11)
+* -mregnames option, s390:               s390 Options.        (line  32)
+* -mrelax command line option, V850:     V850 Options.        (line  51)
+* -mshort:                               M68HC11-Opts.        (line  27)
+* -mshort-double:                        M68HC11-Opts.        (line  36)
+* -msign-extend-enabled command line option, LM32: LM32 Options.
+                                                              (line  15)
+* -mspl:                                 PDP-11-Options.      (line  80)
+* -msse-check= option, i386:             i386-Options.        (line  68)
+* -msse-check= option, x86-64:           i386-Options.        (line  68)
+* -msse2avx option, i386:                i386-Options.        (line  64)
+* -msse2avx option, x86-64:              i386-Options.        (line  64)
+* -msym32:                               MIPS Opts.           (line 189)
+* -msyntax= option, i386:                i386-Options.        (line  87)
+* -msyntax= option, x86-64:              i386-Options.        (line  87)
+* -mt11:                                 PDP-11-Options.      (line 130)
+* -mthumb command line option, ARM:      ARM Options.         (line  74)
+* -mthumb-interwork command line option, ARM: ARM Options.    (line  79)
+* -mtune= option, i386:                  i386-Options.        (line  56)
+* -mtune= option, x86-64:                i386-Options.        (line  56)
+* -muser-enabled command line option, LM32: LM32 Options.     (line  18)
+* -mv850 command line option, V850:      V850 Options.        (line  23)
+* -mv850any command line option, V850:   V850 Options.        (line  41)
+* -mv850e command line option, V850:     V850 Options.        (line  29)
+* -mv850e1 command line option, V850:    V850 Options.        (line  35)
+* -mvxworks-pic option, MIPS:            MIPS Opts.           (line  26)
+* -mwarn-areg-zero option, s390:         s390 Options.        (line  38)
+* -mwarn-deprecated command line option, ARM: ARM Options.    (line 147)
+* -mzarch option, s390:                  s390 Options.        (line  17)
+* -N command line option, CRIS:          CRIS-Opts.           (line  57)
+* -nIp option, M32RX:                    M32R-Opts.           (line 101)
+* -no-bitinst, M32R2:                    M32R-Opts.           (line  54)
+* -no-ignore-parallel-conflicts option, M32RX: M32R-Opts.     (line  93)
+* -no-mdebug command line option, Alpha: Alpha Options.       (line  25)
+* -no-parallel option, M32RX:            M32R-Opts.           (line  51)
+* -no-relax option, i960:                Options-i960.        (line  66)
+* -no-warn-explicit-parallel-conflicts option, M32RX: M32R-Opts.
+                                                              (line  79)
+* -no-warn-unmatched-high option, M32R:  M32R-Opts.           (line 111)
+* -nocpp ignored (MIPS):                 MIPS Opts.           (line 192)
+* -noreplace command line option, Alpha: Alpha Options.       (line  40)
+* -o:                                    o.                   (line   6)
+* -O option, M32RX:                      M32R-Opts.           (line  59)
+* -parallel option, M32RX:               M32R-Opts.           (line  46)
+* -R:                                    R.                   (line   6)
+* -r800 command line option, Z80:        Z80 Options.         (line  41)
+* -relax command line option, Alpha:     Alpha Options.       (line  32)
+* -replace command line option, Alpha:   Alpha Options.       (line  40)
+* -S, ignored on VAX:                    VAX-Opts.            (line  11)
+* -t, ignored on VAX:                    VAX-Opts.            (line  36)
+* -T, ignored on VAX:                    VAX-Opts.            (line  11)
+* -v:                                    v.                   (line   6)
+* -V, redundant on VAX:                  VAX-Opts.            (line  22)
+* -version:                              v.                   (line   6)
+* -W:                                    W.                   (line  11)
+* -warn-explicit-parallel-conflicts option, M32RX: M32R-Opts. (line  65)
+* -warn-unmatched-high option, M32R:     M32R-Opts.           (line 105)
+* -Wnp option, M32RX:                    M32R-Opts.           (line  83)
+* -Wnuh option, M32RX:                   M32R-Opts.           (line 117)
+* -Wp option, M32RX:                     M32R-Opts.           (line  75)
+* -wsigned_overflow command line option, V850: V850 Options.  (line   9)
+* -Wuh option, M32RX:                    M32R-Opts.           (line 114)
+* -wunsigned_overflow command line option, V850: V850 Options.
+                                                              (line  16)
+* -x command line option, MMIX:          MMIX-Opts.           (line  44)
+* -z80 command line option, Z80:         Z80 Options.         (line   8)
+* -z8001 command line option, Z8000:     Z8000 Options.       (line   6)
+* -z8002 command line option, Z8000:     Z8000 Options.       (line   9)
+* . (symbol):                            Dot.                 (line   6)
+* .2byte directive, ARM:                 ARM Directives.      (line   6)
+* .4byte directive, ARM:                 ARM Directives.      (line   6)
+* .8byte directive, ARM:                 ARM Directives.      (line   6)
+* .align directive, ARM:                 ARM Directives.      (line  11)
+* .arch directive, ARM:                  ARM Directives.      (line  18)
+* .arm directive, ARM:                   ARM Directives.      (line  22)
+* .big directive, M32RX:                 M32R-Directives.     (line  88)
+* .bss directive, ARM:                   ARM Directives.      (line  30)
+* .cantunwind directive, ARM:            ARM Directives.      (line  33)
+* .code directive, ARM:                  ARM Directives.      (line  37)
+* .cpu directive, ARM:                   ARM Directives.      (line  41)
+* .dn and .qn directives, ARM:           ARM Directives.      (line  45)
+* .eabi_attribute directive, ARM:        ARM Directives.      (line  69)
+* .even directive, ARM:                  ARM Directives.      (line  93)
+* .extend directive, ARM:                ARM Directives.      (line  96)
+* .fnend directive, ARM:                 ARM Directives.      (line 102)
+* .fnstart directive, ARM:               ARM Directives.      (line 111)
+* .force_thumb directive, ARM:           ARM Directives.      (line 114)
+* .fpu directive, ARM:                   ARM Directives.      (line 118)
+* .global:                               MIPS insn.           (line  12)
+* .handlerdata directive, ARM:           ARM Directives.      (line 122)
+* .insn:                                 MIPS insn.           (line   6)
+* .insn directive, s390:                 s390 Directives.     (line  11)
+* .inst directive, ARM:                  ARM Directives.      (line 131)
+* .ldouble directive, ARM:               ARM Directives.      (line  96)
+* .little directive, M32RX:              M32R-Directives.     (line  82)
+* .long directive, s390:                 s390 Directives.     (line  16)
+* .ltorg directive, ARM:                 ARM Directives.      (line 143)
+* .ltorg directive, s390:                s390 Directives.     (line  88)
+* .m32r directive, M32R:                 M32R-Directives.     (line  66)
+* .m32r2 directive, M32R2:               M32R-Directives.     (line  77)
+* .m32rx directive, M32RX:               M32R-Directives.     (line  72)
+* .movsp directive, ARM:                 ARM Directives.      (line 157)
+* .o:                                    Object.              (line   6)
+* .object_arch directive, ARM:           ARM Directives.      (line 162)
+* .packed directive, ARM:                ARM Directives.      (line 168)
+* .pad directive, ARM:                   ARM Directives.      (line  25)
+* .param on HPPA:                        HPPA Directives.     (line  19)
+* .personality directive, ARM:           ARM Directives.      (line 178)
+* .personalityindex directive, ARM:      ARM Directives.      (line 181)
+* .pool directive, ARM:                  ARM Directives.      (line 185)
+* .quad directive, s390:                 s390 Directives.     (line  16)
+* .req directive, ARM:                   ARM Directives.      (line 188)
+* .save directive, ARM:                  ARM Directives.      (line 193)
+* .secrel32 directive, ARM:              ARM Directives.      (line 231)
+* .set arch=CPU:                         MIPS ISA.            (line  18)
+* .set autoextend:                       MIPS autoextend.     (line   6)
+* .set doublefloat:                      MIPS floating-point. (line  12)
+* .set dsp:                              MIPS ASE instruction generation overrides.
+                                                              (line  21)
+* .set dspr2:                            MIPS ASE instruction generation overrides.
+                                                              (line  26)
+* .set hardfloat:                        MIPS floating-point. (line   6)
+* .set mdmx:                             MIPS ASE instruction generation overrides.
+                                                              (line  16)
+* .set mips3d:                           MIPS ASE instruction generation overrides.
+                                                              (line   6)
+* .set mipsN:                            MIPS ISA.            (line   6)
+* .set mt:                               MIPS ASE instruction generation overrides.
+                                                              (line  32)
+* .set noautoextend:                     MIPS autoextend.     (line   6)
+* .set nodsp:                            MIPS ASE instruction generation overrides.
+                                                              (line  21)
+* .set nodspr2:                          MIPS ASE instruction generation overrides.
+                                                              (line  26)
+* .set nomdmx:                           MIPS ASE instruction generation overrides.
+                                                              (line  16)
+* .set nomips3d:                         MIPS ASE instruction generation overrides.
+                                                              (line   6)
+* .set nomt:                             MIPS ASE instruction generation overrides.
+                                                              (line  32)
+* .set nosmartmips:                      MIPS ASE instruction generation overrides.
+                                                              (line  11)
+* .set nosym32:                          MIPS symbol sizes.   (line   6)
+* .set pop:                              MIPS option stack.   (line   6)
+* .set push:                             MIPS option stack.   (line   6)
+* .set singlefloat:                      MIPS floating-point. (line  12)
+* .set smartmips:                        MIPS ASE instruction generation overrides.
+                                                              (line  11)
+* .set softfloat:                        MIPS floating-point. (line   6)
+* .set sym32:                            MIPS symbol sizes.   (line   6)
+* .setfp directive, ARM:                 ARM Directives.      (line 217)
+* .short directive, s390:                s390 Directives.     (line  16)
+* .syntax directive, ARM:                ARM Directives.      (line 236)
+* .thumb directive, ARM:                 ARM Directives.      (line 240)
+* .thumb_func directive, ARM:            ARM Directives.      (line 243)
+* .thumb_set directive, ARM:             ARM Directives.      (line 254)
+* .unreq directive, ARM:                 ARM Directives.      (line 261)
+* .unwind_raw directive, ARM:            ARM Directives.      (line 272)
+* .v850 directive, V850:                 V850 Directives.     (line  14)
+* .v850e directive, V850:                V850 Directives.     (line  20)
+* .v850e1 directive, V850:               V850 Directives.     (line  26)
+* .vsave directive, ARM:                 ARM Directives.      (line 279)
+* .z8001:                                Z8000 Directives.    (line  11)
+* .z8002:                                Z8000 Directives.    (line  15)
+* 16-bit code, i386:                     i386-16bit.          (line   6)
+* 2byte directive, ARC:                  ARC Directives.      (line   9)
+* 3byte directive, ARC:                  ARC Directives.      (line  12)
+* 3DNow!, i386:                          i386-SIMD.           (line   6)
+* 3DNow!, x86-64:                        i386-SIMD.           (line   6)
+* 430 support:                           MSP430-Dependent.    (line   6)
+* 4byte directive, ARC:                  ARC Directives.      (line  15)
+* : (label):                             Statements.          (line  30)
+* @word modifier, D10V:                  D10V-Word.           (line   6)
+* \" (doublequote character):            Strings.             (line  43)
+* \\ (\ character):                      Strings.             (line  40)
+* \b (backspace character):              Strings.             (line  15)
+* \DDD (octal character code):           Strings.             (line  30)
+* \f (formfeed character):               Strings.             (line  18)
+* \n (newline character):                Strings.             (line  21)
+* \r (carriage return character):        Strings.             (line  24)
+* \t (tab):                              Strings.             (line  27)
+* \XD... (hex character code):           Strings.             (line  36)
+* _ opcode prefix:                       Xtensa Opcodes.      (line   9)
+* a.out:                                 Object.              (line   6)
+* a.out symbol attributes:               a.out Symbols.       (line   6)
+* A_DIR environment variable, TIC54X:    TIC54X-Env.          (line   6)
+* ABI options, SH64:                     SH64 Options.        (line  29)
+* abort directive:                       Abort.               (line   6)
+* ABORT directive:                       ABORT (COFF).        (line   6)
+* absolute section:                      Ld Sections.         (line  29)
+* absolute-literals directive:           Absolute Literals Directive.
+                                                              (line   6)
+* ADDI instructions, relaxation:         Xtensa Immediate Relaxation.
+                                                              (line  43)
+* addition, permitted arguments:         Infix Ops.           (line  44)
+* addresses:                             Expressions.         (line   6)
+* addresses, format of:                  Secs Background.     (line  68)
+* addressing modes, D10V:                D10V-Addressing.     (line   6)
+* addressing modes, D30V:                D30V-Addressing.     (line   6)
+* addressing modes, H8/300:              H8/300-Addressing.   (line   6)
+* addressing modes, M680x0:              M68K-Syntax.         (line  21)
+* addressing modes, M68HC11:             M68HC11-Syntax.      (line  17)
+* addressing modes, SH:                  SH-Addressing.       (line   6)
+* addressing modes, SH64:                SH64-Addressing.     (line   6)
+* addressing modes, Z8000:               Z8000-Addressing.    (line   6)
+* ADR reg,<label> pseudo op, ARM:        ARM Opcodes.         (line  25)
+* ADRL reg,<label> pseudo op, ARM:       ARM Opcodes.         (line  35)
+* advancing location counter:            Org.                 (line   6)
+* align directive:                       Align.               (line   6)
+* align directive, SPARC:                Sparc-Directives.    (line   9)
+* align directive, TIC54X:               TIC54X-Directives.   (line   6)
+* alignment of branch targets:           Xtensa Automatic Alignment.
+                                                              (line   6)
+* alignment of LOOP instructions:        Xtensa Automatic Alignment.
+                                                              (line   6)
+* Alpha floating point (IEEE):           Alpha Floating Point.
+                                                              (line   6)
+* Alpha line comment character:          Alpha-Chars.         (line   6)
+* Alpha line separator:                  Alpha-Chars.         (line   8)
+* Alpha notes:                           Alpha Notes.         (line   6)
+* Alpha options:                         Alpha Options.       (line   6)
+* Alpha registers:                       Alpha-Regs.          (line   6)
+* Alpha relocations:                     Alpha-Relocs.        (line   6)
+* Alpha support:                         Alpha-Dependent.     (line   6)
+* Alpha Syntax:                          Alpha Options.       (line  62)
+* Alpha-only directives:                 Alpha Directives.    (line  10)
+* altered difference tables:             Word.                (line  12)
+* alternate syntax for the 680x0:        M68K-Moto-Syntax.    (line   6)
+* ARC floating point (IEEE):             ARC Floating Point.  (line   6)
+* ARC machine directives:                ARC Directives.      (line   6)
+* ARC opcodes:                           ARC Opcodes.         (line   6)
+* ARC options (none):                    ARC Options.         (line   6)
+* ARC register names:                    ARC-Regs.            (line   6)
+* ARC special characters:                ARC-Chars.           (line   6)
+* ARC support:                           ARC-Dependent.       (line   6)
+* arc5 arc5, ARC:                        ARC Options.         (line  10)
+* arc6 arc6, ARC:                        ARC Options.         (line  13)
+* arc7 arc7, ARC:                        ARC Options.         (line  21)
+* arc8 arc8, ARC:                        ARC Options.         (line  24)
+* arch directive, i386:                  i386-Arch.           (line   6)
+* arch directive, M680x0:                M68K-Directives.     (line  22)
+* arch directive, x86-64:                i386-Arch.           (line   6)
+* architecture options, i960:            Options-i960.        (line   6)
+* architecture options, IP2022:          IP2K-Opts.           (line   9)
+* architecture options, IP2K:            IP2K-Opts.           (line  14)
+* architecture options, M16C:            M32C-Opts.           (line  12)
+* architecture options, M32C:            M32C-Opts.           (line   9)
+* architecture options, M32R:            M32R-Opts.           (line  21)
+* architecture options, M32R2:           M32R-Opts.           (line  17)
+* architecture options, M32RX:           M32R-Opts.           (line   9)
+* architecture options, M680x0:          M68K-Opts.           (line 104)
+* Architecture variant option, CRIS:     CRIS-Opts.           (line  33)
+* architectures, PowerPC:                PowerPC-Opts.        (line   6)
+* architectures, SCORE:                  SCORE-Opts.          (line   6)
+* architectures, SPARC:                  Sparc-Opts.          (line   6)
+* arguments for addition:                Infix Ops.           (line  44)
+* arguments for subtraction:             Infix Ops.           (line  49)
+* arguments in expressions:              Arguments.           (line   6)
+* arithmetic functions:                  Operators.           (line   6)
+* arithmetic operands:                   Arguments.           (line   6)
+* ARM data relocations:                  ARM-Relocations.     (line   6)
+* ARM floating point (IEEE):             ARM Floating Point.  (line   6)
+* ARM identifiers:                       ARM-Chars.           (line  15)
+* ARM immediate character:               ARM-Chars.           (line  13)
+* ARM line comment character:            ARM-Chars.           (line   6)
+* ARM line separator:                    ARM-Chars.           (line  10)
+* ARM machine directives:                ARM Directives.      (line   6)
+* ARM opcodes:                           ARM Opcodes.         (line   6)
+* ARM options (none):                    ARM Options.         (line   6)
+* ARM register names:                    ARM-Regs.            (line   6)
+* ARM support:                           ARM-Dependent.       (line   6)
+* ascii directive:                       Ascii.               (line   6)
+* asciz directive:                       Asciz.               (line   6)
+* asg directive, TIC54X:                 TIC54X-Directives.   (line  20)
+* assembler bugs, reporting:             Bug Reporting.       (line   6)
+* assembler crash:                       Bug Criteria.        (line   9)
+* assembler directive .arch, CRIS:       CRIS-Pseudos.        (line  45)
+* assembler directive .dword, CRIS:      CRIS-Pseudos.        (line  12)
+* assembler directive .far, M68HC11:     M68HC11-Directives.  (line  20)
+* assembler directive .interrupt, M68HC11: M68HC11-Directives.
+                                                              (line  26)
+* assembler directive .mode, M68HC11:    M68HC11-Directives.  (line  16)
+* assembler directive .relax, M68HC11:   M68HC11-Directives.  (line  10)
+* assembler directive .syntax, CRIS:     CRIS-Pseudos.        (line  17)
+* assembler directive .xrefb, M68HC11:   M68HC11-Directives.  (line  31)
+* assembler directive BSPEC, MMIX:       MMIX-Pseudos.        (line 131)
+* assembler directive BYTE, MMIX:        MMIX-Pseudos.        (line  97)
+* assembler directive ESPEC, MMIX:       MMIX-Pseudos.        (line 131)
+* assembler directive GREG, MMIX:        MMIX-Pseudos.        (line  50)
+* assembler directive IS, MMIX:          MMIX-Pseudos.        (line  42)
+* assembler directive LOC, MMIX:         MMIX-Pseudos.        (line   7)
+* assembler directive LOCAL, MMIX:       MMIX-Pseudos.        (line  28)
+* assembler directive OCTA, MMIX:        MMIX-Pseudos.        (line 108)
+* assembler directive PREFIX, MMIX:      MMIX-Pseudos.        (line 120)
+* assembler directive TETRA, MMIX:       MMIX-Pseudos.        (line 108)
+* assembler directive WYDE, MMIX:        MMIX-Pseudos.        (line 108)
+* assembler directives, CRIS:            CRIS-Pseudos.        (line   6)
+* assembler directives, M68HC11:         M68HC11-Directives.  (line   6)
+* assembler directives, M68HC12:         M68HC11-Directives.  (line   6)
+* assembler directives, MMIX:            MMIX-Pseudos.        (line   6)
+* assembler internal logic error:        As Sections.         (line  13)
+* assembler version:                     v.                   (line   6)
+* assembler, and linker:                 Secs Background.     (line  10)
+* assembly listings, enabling:           a.                   (line   6)
+* assigning values to symbols <1>:       Setting Symbols.     (line   6)
+* assigning values to symbols:           Equ.                 (line   6)
+* atmp directive, i860:                  Directives-i860.     (line  16)
+* att_syntax pseudo op, i386:            i386-Syntax.         (line   6)
+* att_syntax pseudo op, x86-64:          i386-Syntax.         (line   6)
+* attributes, symbol:                    Symbol Attributes.   (line   6)
+* auxiliary attributes, COFF symbols:    COFF Symbols.        (line  19)
+* auxiliary symbol information, COFF:    Dim.                 (line   6)
+* Av7:                                   Sparc-Opts.          (line  25)
+* AVR line comment character:            AVR-Chars.           (line   6)
+* AVR line separator:                    AVR-Chars.           (line  10)
+* AVR modifiers:                         AVR-Modifiers.       (line   6)
+* AVR opcode summary:                    AVR Opcodes.         (line   6)
+* AVR options (none):                    AVR Options.         (line   6)
+* AVR register names:                    AVR-Regs.            (line   6)
+* AVR support:                           AVR-Dependent.       (line   6)
+* backslash (\\):                        Strings.             (line  40)
+* backspace (\b):                        Strings.             (line  15)
+* balign directive:                      Balign.              (line   6)
+* balignl directive:                     Balign.              (line  27)
+* balignw directive:                     Balign.              (line  27)
+* bes directive, TIC54X:                 TIC54X-Directives.   (line 197)
+* big endian output, MIPS:               Overview.            (line 641)
+* big endian output, PJ:                 Overview.            (line 548)
+* big-endian output, MIPS:               MIPS Opts.           (line  13)
+* bignums:                               Bignums.             (line   6)
+* binary constants, TIC54X:              TIC54X-Constants.    (line   8)
+* binary files, including:               Incbin.              (line   6)
+* binary integers:                       Integers.            (line   6)
+* bit names, IA-64:                      IA-64-Bits.          (line   6)
+* bitfields, not supported on VAX:       VAX-no.              (line   6)
+* Blackfin directives:                   Blackfin Directives. (line   6)
+* Blackfin options (none):               Blackfin Options.    (line   6)
+* Blackfin support:                      Blackfin-Dependent.  (line   6)
+* Blackfin syntax:                       Blackfin Syntax.     (line   6)
+* block:                                 Z8000 Directives.    (line  55)
+* branch improvement, M680x0:            M68K-Branch.         (line   6)
+* branch improvement, M68HC11:           M68HC11-Branch.      (line   6)
+* branch improvement, VAX:               VAX-branch.          (line   6)
+* branch instructions, relaxation:       Xtensa Branch Relaxation.
+                                                              (line   6)
+* branch recording, i960:                Options-i960.        (line  22)
+* branch statistics table, i960:         Options-i960.        (line  40)
+* branch target alignment:               Xtensa Automatic Alignment.
+                                                              (line   6)
+* break directive, TIC54X:               TIC54X-Directives.   (line 143)
+* BSD syntax:                            PDP-11-Syntax.       (line   6)
+* bss directive, i960:                   Directives-i960.     (line   6)
+* bss directive, TIC54X:                 TIC54X-Directives.   (line  29)
+* bss section <1>:                       bss.                 (line   6)
+* bss section:                           Ld Sections.         (line  20)
+* bug criteria:                          Bug Criteria.        (line   6)
+* bug reports:                           Bug Reporting.       (line   6)
+* bugs in assembler:                     Reporting Bugs.      (line   6)
+* Built-in symbols, CRIS:                CRIS-Symbols.        (line   6)
+* builtin math functions, TIC54X:        TIC54X-Builtins.     (line   6)
+* builtin subsym functions, TIC54X:      TIC54X-Macros.       (line  16)
+* bus lock prefixes, i386:               i386-Prefixes.       (line  36)
+* bval:                                  Z8000 Directives.    (line  30)
+* byte directive:                        Byte.                (line   6)
+* byte directive, TIC54X:                TIC54X-Directives.   (line  36)
+* C54XDSP_DIR environment variable, TIC54X: TIC54X-Env.       (line   6)
+* c_mode directive, TIC54X:              TIC54X-Directives.   (line  51)
+* call instructions, i386:               i386-Mnemonics.      (line  55)
+* call instructions, relaxation:         Xtensa Call Relaxation.
+                                                              (line   6)
+* call instructions, x86-64:             i386-Mnemonics.      (line  55)
+* callj, i960 pseudo-opcode:             callj-i960.          (line   6)
+* carriage return (\r):                  Strings.             (line  24)
+* case sensitivity, Z80:                 Z80-Case.            (line   6)
+* cfi_endproc directive:                 CFI directives.      (line  26)
+* cfi_sections directive:                CFI directives.      (line  13)
+* cfi_startproc directive:               CFI directives.      (line   6)
+* char directive, TIC54X:                TIC54X-Directives.   (line  36)
+* character constant, Z80:               Z80-Chars.           (line  13)
+* character constants:                   Characters.          (line   6)
+* character escape codes:                Strings.             (line  15)
+* character escapes, Z80:                Z80-Chars.           (line  11)
+* character, single:                     Chars.               (line   6)
+* characters used in symbols:            Symbol Intro.        (line   6)
+* clink directive, TIC54X:               TIC54X-Directives.   (line  45)
+* code16 directive, i386:                i386-16bit.          (line   6)
+* code16gcc directive, i386:             i386-16bit.          (line   6)
+* code32 directive, i386:                i386-16bit.          (line   6)
+* code64 directive, i386:                i386-16bit.          (line   6)
+* code64 directive, x86-64:              i386-16bit.          (line   6)
+* COFF auxiliary symbol information:     Dim.                 (line   6)
+* COFF structure debugging:              Tag.                 (line   6)
+* COFF symbol attributes:                COFF Symbols.        (line   6)
+* COFF symbol descriptor:                Desc.                (line   6)
+* COFF symbol storage class:             Scl.                 (line   6)
+* COFF symbol type:                      Type.                (line  11)
+* COFF symbols, debugging:               Def.                 (line   6)
+* COFF value attribute:                  Val.                 (line   6)
+* COMDAT:                                Linkonce.            (line   6)
+* comm directive:                        Comm.                (line   6)
+* command line conventions:              Command Line.        (line   6)
+* command line options, V850:            V850 Options.        (line   9)
+* command-line options ignored, VAX:     VAX-Opts.            (line   6)
+* comments:                              Comments.            (line   6)
+* comments, M680x0:                      M68K-Chars.          (line   6)
+* comments, removed by preprocessor:     Preprocessing.       (line  11)
+* common directive, SPARC:               Sparc-Directives.    (line  12)
+* common sections:                       Linkonce.            (line   6)
+* common variable storage:               bss.                 (line   6)
+* compare and jump expansions, i960:     Compare-and-branch-i960.
+                                                              (line  13)
+* compare/branch instructions, i960:     Compare-and-branch-i960.
+                                                              (line   6)
+* comparison expressions:                Infix Ops.           (line  55)
+* conditional assembly:                  If.                  (line   6)
+* constant, single character:            Chars.               (line   6)
+* constants:                             Constants.           (line   6)
+* constants, bignum:                     Bignums.             (line   6)
+* constants, character:                  Characters.          (line   6)
+* constants, converted by preprocessor:  Preprocessing.       (line  14)
+* constants, floating point:             Flonums.             (line   6)
+* constants, integer:                    Integers.            (line   6)
+* constants, number:                     Numbers.             (line   6)
+* constants, Sparc:                      Sparc-Constants.     (line   6)
+* constants, string:                     Strings.             (line   6)
+* constants, TIC54X:                     TIC54X-Constants.    (line   6)
+* conversion instructions, i386:         i386-Mnemonics.      (line  36)
+* conversion instructions, x86-64:       i386-Mnemonics.      (line  36)
+* coprocessor wait, i386:                i386-Prefixes.       (line  40)
+* copy directive, TIC54X:                TIC54X-Directives.   (line  54)
+* cpu directive, M680x0:                 M68K-Directives.     (line  30)
+* CR16 Operand Qualifiers:               CR16 Operand Qualifiers.
+                                                              (line   6)
+* CR16 support:                          CR16-Dependent.      (line   6)
+* crash of assembler:                    Bug Criteria.        (line   9)
+* CRIS --emulation=crisaout command line option: CRIS-Opts.   (line   9)
+* CRIS --emulation=criself command line option: CRIS-Opts.    (line   9)
+* CRIS --march=ARCHITECTURE command line option: CRIS-Opts.   (line  33)
+* CRIS --mul-bug-abort command line option: CRIS-Opts.        (line  61)
+* CRIS --no-mul-bug-abort command line option: CRIS-Opts.     (line  61)
+* CRIS --no-underscore command line option: CRIS-Opts.        (line  15)
+* CRIS --pic command line option:        CRIS-Opts.           (line  27)
+* CRIS --underscore command line option: CRIS-Opts.           (line  15)
+* CRIS -N command line option:           CRIS-Opts.           (line  57)
+* CRIS architecture variant option:      CRIS-Opts.           (line  33)
+* CRIS assembler directive .arch:        CRIS-Pseudos.        (line  45)
+* CRIS assembler directive .dword:       CRIS-Pseudos.        (line  12)
+* CRIS assembler directive .syntax:      CRIS-Pseudos.        (line  17)
+* CRIS assembler directives:             CRIS-Pseudos.        (line   6)
+* CRIS built-in symbols:                 CRIS-Symbols.        (line   6)
+* CRIS instruction expansion:            CRIS-Expand.         (line   6)
+* CRIS line comment characters:          CRIS-Chars.          (line   6)
+* CRIS options:                          CRIS-Opts.           (line   6)
+* CRIS position-independent code:        CRIS-Opts.           (line  27)
+* CRIS pseudo-op .arch:                  CRIS-Pseudos.        (line  45)
+* CRIS pseudo-op .dword:                 CRIS-Pseudos.        (line  12)
+* CRIS pseudo-op .syntax:                CRIS-Pseudos.        (line  17)
+* CRIS pseudo-ops:                       CRIS-Pseudos.        (line   6)
+* CRIS register names:                   CRIS-Regs.           (line   6)
+* CRIS support:                          CRIS-Dependent.      (line   6)
+* CRIS symbols in position-independent code: CRIS-Pic.        (line   6)
+* ctbp register, V850:                   V850-Regs.           (line 131)
+* ctoff pseudo-op, V850:                 V850 Opcodes.        (line 111)
+* ctpc register, V850:                   V850-Regs.           (line 119)
+* ctpsw register, V850:                  V850-Regs.           (line 122)
+* current address:                       Dot.                 (line   6)
+* current address, advancing:            Org.                 (line   6)
+* D10V @word modifier:                   D10V-Word.           (line   6)
+* D10V addressing modes:                 D10V-Addressing.     (line   6)
+* D10V floating point:                   D10V-Float.          (line   6)
+* D10V line comment character:           D10V-Chars.          (line   6)
+* D10V opcode summary:                   D10V-Opcodes.        (line   6)
+* D10V optimization:                     Overview.            (line 420)
+* D10V options:                          D10V-Opts.           (line   6)
+* D10V registers:                        D10V-Regs.           (line   6)
+* D10V size modifiers:                   D10V-Size.           (line   6)
+* D10V sub-instruction ordering:         D10V-Chars.          (line   6)
+* D10V sub-instructions:                 D10V-Subs.           (line   6)
+* D10V support:                          D10V-Dependent.      (line   6)
+* D10V syntax:                           D10V-Syntax.         (line   6)
+* D30V addressing modes:                 D30V-Addressing.     (line   6)
+* D30V floating point:                   D30V-Float.          (line   6)
+* D30V Guarded Execution:                D30V-Guarded.        (line   6)
+* D30V line comment character:           D30V-Chars.          (line   6)
+* D30V nops:                             Overview.            (line 428)
+* D30V nops after 32-bit multiply:       Overview.            (line 431)
+* D30V opcode summary:                   D30V-Opcodes.        (line   6)
+* D30V optimization:                     Overview.            (line 425)
+* D30V options:                          D30V-Opts.           (line   6)
+* D30V registers:                        D30V-Regs.           (line   6)
+* D30V size modifiers:                   D30V-Size.           (line   6)
+* D30V sub-instruction ordering:         D30V-Chars.          (line   6)
+* D30V sub-instructions:                 D30V-Subs.           (line   6)
+* D30V support:                          D30V-Dependent.      (line   6)
+* D30V syntax:                           D30V-Syntax.         (line   6)
+* data alignment on SPARC:               Sparc-Aligned-Data.  (line   6)
+* data and text sections, joining:       R.                   (line   6)
+* data directive:                        Data.                (line   6)
+* data directive, TIC54X:                TIC54X-Directives.   (line  61)
+* data relocations, ARM:                 ARM-Relocations.     (line   6)
+* data section:                          Ld Sections.         (line   9)
+* data1 directive, M680x0:               M68K-Directives.     (line   9)
+* data2 directive, M680x0:               M68K-Directives.     (line  12)
+* datalabel, SH64:                       SH64-Addressing.     (line  16)
+* dbpc register, V850:                   V850-Regs.           (line 125)
+* dbpsw register, V850:                  V850-Regs.           (line 128)
+* debuggers, and symbol order:           Symbols.             (line  10)
+* debugging COFF symbols:                Def.                 (line   6)
+* DEC syntax:                            PDP-11-Syntax.       (line   6)
+* decimal integers:                      Integers.            (line  12)
+* def directive:                         Def.                 (line   6)
+* def directive, TIC54X:                 TIC54X-Directives.   (line 103)
+* density instructions:                  Density Instructions.
+                                                              (line   6)
+* dependency tracking:                   MD.                  (line   6)
+* deprecated directives:                 Deprecated.          (line   6)
+* desc directive:                        Desc.                (line   6)
+* descriptor, of a.out symbol:           Symbol Desc.         (line   6)
+* dfloat directive, VAX:                 VAX-directives.      (line  10)
+* difference tables altered:             Word.                (line  12)
+* difference tables, warning:            K.                   (line   6)
+* differences, mmixal:                   MMIX-mmixal.         (line   6)
+* dim directive:                         Dim.                 (line   6)
+* directives and instructions:           Statements.          (line  19)
+* directives for PowerPC:                PowerPC-Pseudo.      (line   6)
+* directives for SCORE:                  SCORE-Pseudo.        (line   6)
+* directives, Blackfin:                  Blackfin Directives. (line   6)
+* directives, M32R:                      M32R-Directives.     (line   6)
+* directives, M680x0:                    M68K-Directives.     (line   6)
+* directives, machine independent:       Pseudo Ops.          (line   6)
+* directives, Xtensa:                    Xtensa Directives.   (line   6)
+* directives, Z8000:                     Z8000 Directives.    (line   6)
+* Disable floating-point instructions:   MIPS floating-point. (line   6)
+* Disable single-precision floating-point operations: MIPS floating-point.
+                                                              (line  12)
+* displacement sizing character, VAX:    VAX-operands.        (line  12)
+* dollar local symbols:                  Symbol Names.        (line 105)
+* dot (symbol):                          Dot.                 (line   6)
+* double directive:                      Double.              (line   6)
+* double directive, i386:                i386-Float.          (line  14)
+* double directive, M680x0:              M68K-Float.          (line  14)
+* double directive, M68HC11:             M68HC11-Float.       (line  14)
+* double directive, TIC54X:              TIC54X-Directives.   (line  64)
+* double directive, VAX:                 VAX-float.           (line  15)
+* double directive, x86-64:              i386-Float.          (line  14)
+* doublequote (\"):                      Strings.             (line  43)
+* drlist directive, TIC54X:              TIC54X-Directives.   (line  73)
+* drnolist directive, TIC54X:            TIC54X-Directives.   (line  73)
+* dual directive, i860:                  Directives-i860.     (line   6)
+* ECOFF sections:                        MIPS Object.         (line   6)
+* ecr register, V850:                    V850-Regs.           (line 113)
+* eight-byte integer:                    Quad.                (line   9)
+* eipc register, V850:                   V850-Regs.           (line 101)
+* eipsw register, V850:                  V850-Regs.           (line 104)
+* eject directive:                       Eject.               (line   6)
+* ELF symbol type:                       Type.                (line  22)
+* else directive:                        Else.                (line   6)
+* elseif directive:                      Elseif.              (line   6)
+* empty expressions:                     Empty Exprs.         (line   6)
+* emsg directive, TIC54X:                TIC54X-Directives.   (line  77)
+* emulation:                             Overview.            (line 744)
+* encoding options, i386:                i386-Mnemonics.      (line  32)
+* encoding options, x86-64:              i386-Mnemonics.      (line  32)
+* end directive:                         End.                 (line   6)
+* enddual directive, i860:               Directives-i860.     (line  11)
+* endef directive:                       Endef.               (line   6)
+* endfunc directive:                     Endfunc.             (line   6)
+* endianness, MIPS:                      Overview.            (line 641)
+* endianness, PJ:                        Overview.            (line 548)
+* endif directive:                       Endif.               (line   6)
+* endloop directive, TIC54X:             TIC54X-Directives.   (line 143)
+* endm directive:                        Macro.               (line 138)
+* endm directive, TIC54X:                TIC54X-Directives.   (line 153)
+* endstruct directive, TIC54X:           TIC54X-Directives.   (line 217)
+* endunion directive, TIC54X:            TIC54X-Directives.   (line 251)
+* environment settings, TIC54X:          TIC54X-Env.          (line   6)
+* EOF, newline must precede:             Statements.          (line  13)
+* ep register, V850:                     V850-Regs.           (line  95)
+* equ directive:                         Equ.                 (line   6)
+* equ directive, TIC54X:                 TIC54X-Directives.   (line 192)
+* equiv directive:                       Equiv.               (line   6)
+* eqv directive:                         Eqv.                 (line   6)
+* err directive:                         Err.                 (line   6)
+* error directive:                       Error.               (line   6)
+* error messages:                        Errors.              (line   6)
+* error on valid input:                  Bug Criteria.        (line  12)
+* errors, caused by warnings:            W.                   (line  16)
+* errors, continuing after:              Z.                   (line   6)
+* ESA/390 floating point (IEEE):         ESA/390 Floating Point.
+                                                              (line   6)
+* ESA/390 support:                       ESA/390-Dependent.   (line   6)
+* ESA/390 Syntax:                        ESA/390 Options.     (line   8)
+* ESA/390-only directives:               ESA/390 Directives.  (line  12)
+* escape codes, character:               Strings.             (line  15)
+* eval directive, TIC54X:                TIC54X-Directives.   (line  24)
+* even:                                  Z8000 Directives.    (line  58)
+* even directive, M680x0:                M68K-Directives.     (line  15)
+* even directive, TIC54X:                TIC54X-Directives.   (line   6)
+* exitm directive:                       Macro.               (line 141)
+* expr (internal section):               As Sections.         (line  17)
+* expression arguments:                  Arguments.           (line   6)
+* expressions:                           Expressions.         (line   6)
+* expressions, comparison:               Infix Ops.           (line  55)
+* expressions, empty:                    Empty Exprs.         (line   6)
+* expressions, integer:                  Integer Exprs.       (line   6)
+* extAuxRegister directive, ARC:         ARC Directives.      (line  18)
+* extCondCode directive, ARC:            ARC Directives.      (line  41)
+* extCoreRegister directive, ARC:        ARC Directives.      (line  53)
+* extend directive M680x0:               M68K-Float.          (line  17)
+* extend directive M68HC11:              M68HC11-Float.       (line  17)
+* extended directive, i960:              Directives-i960.     (line  13)
+* extern directive:                      Extern.              (line   6)
+* extInstruction directive, ARC:         ARC Directives.      (line  78)
+* fail directive:                        Fail.                (line   6)
+* far_mode directive, TIC54X:            TIC54X-Directives.   (line  82)
+* faster processing (-f):                f.                   (line   6)
+* fatal signal:                          Bug Criteria.        (line   9)
+* fclist directive, TIC54X:              TIC54X-Directives.   (line  87)
+* fcnolist directive, TIC54X:            TIC54X-Directives.   (line  87)
+* fepc register, V850:                   V850-Regs.           (line 107)
+* fepsw register, V850:                  V850-Regs.           (line 110)
+* ffloat directive, VAX:                 VAX-directives.      (line  14)
+* field directive, TIC54X:               TIC54X-Directives.   (line  91)
+* file directive:                        File.                (line   6)
+* file directive, MSP 430:               MSP430 Directives.   (line   6)
+* file name, logical:                    File.                (line  13)
+* files, including:                      Include.             (line   6)
+* files, input:                          Input Files.         (line   6)
+* fill directive:                        Fill.                (line   6)
+* filling memory <1>:                    Space.               (line   6)
+* filling memory:                        Skip.                (line   6)
+* FLIX syntax:                           Xtensa Syntax.       (line   6)
+* float directive:                       Float.               (line   6)
+* float directive, i386:                 i386-Float.          (line  14)
+* float directive, M680x0:               M68K-Float.          (line  11)
+* float directive, M68HC11:              M68HC11-Float.       (line  11)
+* float directive, TIC54X:               TIC54X-Directives.   (line  64)
+* float directive, VAX:                  VAX-float.           (line  15)
+* float directive, x86-64:               i386-Float.          (line  14)
+* floating point numbers:                Flonums.             (line   6)
+* floating point numbers (double):       Double.              (line   6)
+* floating point numbers (single) <1>:   Single.              (line   6)
+* floating point numbers (single):       Float.               (line   6)
+* floating point, Alpha (IEEE):          Alpha Floating Point.
+                                                              (line   6)
+* floating point, ARC (IEEE):            ARC Floating Point.  (line   6)
+* floating point, ARM (IEEE):            ARM Floating Point.  (line   6)
+* floating point, D10V:                  D10V-Float.          (line   6)
+* floating point, D30V:                  D30V-Float.          (line   6)
+* floating point, ESA/390 (IEEE):        ESA/390 Floating Point.
+                                                              (line   6)
+* floating point, H8/300 (IEEE):         H8/300 Floating Point.
+                                                              (line   6)
+* floating point, HPPA (IEEE):           HPPA Floating Point. (line   6)
+* floating point, i386:                  i386-Float.          (line   6)
+* floating point, i960 (IEEE):           Floating Point-i960. (line   6)
+* floating point, M680x0:                M68K-Float.          (line   6)
+* floating point, M68HC11:               M68HC11-Float.       (line   6)
+* floating point, MSP 430 (IEEE):        MSP430 Floating Point.
+                                                              (line   6)
+* floating point, s390:                  s390 Floating Point. (line   6)
+* floating point, SH (IEEE):             SH Floating Point.   (line   6)
+* floating point, SPARC (IEEE):          Sparc-Float.         (line   6)
+* floating point, V850 (IEEE):           V850 Floating Point. (line   6)
+* floating point, VAX:                   VAX-float.           (line   6)
+* floating point, x86-64:                i386-Float.          (line   6)
+* floating point, Z80:                   Z80 Floating Point.  (line   6)
+* flonums:                               Flonums.             (line   6)
+* format of error messages:              Errors.              (line  24)
+* format of warning messages:            Errors.              (line  12)
+* formfeed (\f):                         Strings.             (line  18)
+* func directive:                        Func.                (line   6)
+* functions, in expressions:             Operators.           (line   6)
+* gbr960, i960 postprocessor:            Options-i960.        (line  40)
+* gfloat directive, VAX:                 VAX-directives.      (line  18)
+* global:                                Z8000 Directives.    (line  21)
+* global directive:                      Global.              (line   6)
+* global directive, TIC54X:              TIC54X-Directives.   (line 103)
+* gp register, MIPS:                     MIPS Object.         (line  11)
+* gp register, V850:                     V850-Regs.           (line  17)
+* grouping data:                         Sub-Sections.        (line   6)
+* H8/300 addressing modes:               H8/300-Addressing.   (line   6)
+* H8/300 floating point (IEEE):          H8/300 Floating Point.
+                                                              (line   6)
+* H8/300 line comment character:         H8/300-Chars.        (line   6)
+* H8/300 line separator:                 H8/300-Chars.        (line   8)
+* H8/300 machine directives (none):      H8/300 Directives.   (line   6)
+* H8/300 opcode summary:                 H8/300 Opcodes.      (line   6)
+* H8/300 options:                        H8/300 Options.      (line   6)
+* H8/300 registers:                      H8/300-Regs.         (line   6)
+* H8/300 size suffixes:                  H8/300 Opcodes.      (line 163)
+* H8/300 support:                        H8/300-Dependent.    (line   6)
+* H8/300H, assembling for:               H8/300 Directives.   (line   8)
+* half directive, ARC:                   ARC Directives.      (line 156)
+* half directive, SPARC:                 Sparc-Directives.    (line  17)
+* half directive, TIC54X:                TIC54X-Directives.   (line 111)
+* hex character code (\XD...):           Strings.             (line  36)
+* hexadecimal integers:                  Integers.            (line  15)
+* hexadecimal prefix, Z80:               Z80-Chars.           (line   8)
+* hfloat directive, VAX:                 VAX-directives.      (line  22)
+* hi pseudo-op, V850:                    V850 Opcodes.        (line  33)
+* hi0 pseudo-op, V850:                   V850 Opcodes.        (line  10)
+* hidden directive:                      Hidden.              (line   6)
+* high directive, M32R:                  M32R-Directives.     (line  18)
+* hilo pseudo-op, V850:                  V850 Opcodes.        (line  55)
+* HPPA directives not supported:         HPPA Directives.     (line  11)
+* HPPA floating point (IEEE):            HPPA Floating Point. (line   6)
+* HPPA Syntax:                           HPPA Options.        (line   8)
+* HPPA-only directives:                  HPPA Directives.     (line  24)
+* hword directive:                       hword.               (line   6)
+* i370 support:                          ESA/390-Dependent.   (line   6)
+* i386 16-bit code:                      i386-16bit.          (line   6)
+* i386 arch directive:                   i386-Arch.           (line   6)
+* i386 att_syntax pseudo op:             i386-Syntax.         (line   6)
+* i386 conversion instructions:          i386-Mnemonics.      (line  36)
+* i386 floating point:                   i386-Float.          (line   6)
+* i386 immediate operands:               i386-Syntax.         (line  15)
+* i386 instruction naming:               i386-Mnemonics.      (line   6)
+* i386 instruction prefixes:             i386-Prefixes.       (line   6)
+* i386 intel_syntax pseudo op:           i386-Syntax.         (line   6)
+* i386 jump optimization:                i386-Jumps.          (line   6)
+* i386 jump, call, return:               i386-Syntax.         (line  38)
+* i386 jump/call operands:               i386-Syntax.         (line  15)
+* i386 memory references:                i386-Memory.         (line   6)
+* i386 mnemonic compatibility:           i386-Mnemonics.      (line  61)
+* i386 mul, imul instructions:           i386-Notes.          (line   6)
+* i386 options:                          i386-Options.        (line   6)
+* i386 register operands:                i386-Syntax.         (line  15)
+* i386 registers:                        i386-Regs.           (line   6)
+* i386 sections:                         i386-Syntax.         (line  44)
+* i386 size suffixes:                    i386-Syntax.         (line  29)
+* i386 source, destination operands:     i386-Syntax.         (line  22)
+* i386 support:                          i386-Dependent.      (line   6)
+* i386 syntax compatibility:             i386-Syntax.         (line   6)
+* i80386 support:                        i386-Dependent.      (line   6)
+* i860 machine directives:               Directives-i860.     (line   6)
+* i860 opcodes:                          Opcodes for i860.    (line   6)
+* i860 support:                          i860-Dependent.      (line   6)
+* i960 architecture options:             Options-i960.        (line   6)
+* i960 branch recording:                 Options-i960.        (line  22)
+* i960 callj pseudo-opcode:              callj-i960.          (line   6)
+* i960 compare and jump expansions:      Compare-and-branch-i960.
+                                                              (line  13)
+* i960 compare/branch instructions:      Compare-and-branch-i960.
+                                                              (line   6)
+* i960 floating point (IEEE):            Floating Point-i960. (line   6)
+* i960 machine directives:               Directives-i960.     (line   6)
+* i960 opcodes:                          Opcodes for i960.    (line   6)
+* i960 options:                          Options-i960.        (line   6)
+* i960 support:                          i960-Dependent.      (line   6)
+* IA-64 line comment character:          IA-64-Chars.         (line   6)
+* IA-64 line separator:                  IA-64-Chars.         (line   8)
+* IA-64 options:                         IA-64 Options.       (line   6)
+* IA-64 Processor-status-Register bit names: IA-64-Bits.      (line   6)
+* IA-64 registers:                       IA-64-Regs.          (line   6)
+* IA-64 support:                         IA-64-Dependent.     (line   6)
+* IA-64 Syntax:                          IA-64 Options.       (line  96)
+* ident directive:                       Ident.               (line   6)
+* identifiers, ARM:                      ARM-Chars.           (line  15)
+* identifiers, MSP 430:                  MSP430-Chars.        (line   8)
+* if directive:                          If.                  (line   6)
+* ifb directive:                         If.                  (line  21)
+* ifc directive:                         If.                  (line  25)
+* ifdef directive:                       If.                  (line  16)
+* ifeq directive:                        If.                  (line  33)
+* ifeqs directive:                       If.                  (line  36)
+* ifge directive:                        If.                  (line  40)
+* ifgt directive:                        If.                  (line  44)
+* ifle directive:                        If.                  (line  48)
+* iflt directive:                        If.                  (line  52)
+* ifnb directive:                        If.                  (line  56)
+* ifnc directive:                        If.                  (line  61)
+* ifndef directive:                      If.                  (line  65)
+* ifne directive:                        If.                  (line  72)
+* ifnes directive:                       If.                  (line  76)
+* ifnotdef directive:                    If.                  (line  65)
+* immediate character, ARM:              ARM-Chars.           (line  13)
+* immediate character, M680x0:           M68K-Chars.          (line   6)
+* immediate character, VAX:              VAX-operands.        (line   6)
+* immediate fields, relaxation:          Xtensa Immediate Relaxation.
+                                                              (line   6)
+* immediate operands, i386:              i386-Syntax.         (line  15)
+* immediate operands, x86-64:            i386-Syntax.         (line  15)
+* imul instruction, i386:                i386-Notes.          (line   6)
+* imul instruction, x86-64:              i386-Notes.          (line   6)
+* incbin directive:                      Incbin.              (line   6)
+* include directive:                     Include.             (line   6)
+* include directive search path:         I.                   (line   6)
+* indirect character, VAX:               VAX-operands.        (line   9)
+* infix operators:                       Infix Ops.           (line   6)
+* inhibiting interrupts, i386:           i386-Prefixes.       (line  36)
+* input:                                 Input Files.         (line   6)
+* input file linenumbers:                Input Files.         (line  35)
+* instruction aliases, s390:             s390 Aliases.        (line   6)
+* instruction expansion, CRIS:           CRIS-Expand.         (line   6)
+* instruction expansion, MMIX:           MMIX-Expand.         (line   6)
+* instruction formats, s390:             s390 Formats.        (line   6)
+* instruction marker, s390:              s390 Instruction Marker.
+                                                              (line   6)
+* instruction mnemonics, s390:           s390 Mnemonics.      (line   6)
+* instruction naming, i386:              i386-Mnemonics.      (line   6)
+* instruction naming, x86-64:            i386-Mnemonics.      (line   6)
+* instruction operand modifier, s390:    s390 Operand Modifier.
+                                                              (line   6)
+* instruction operands, s390:            s390 Operands.       (line   6)
+* instruction prefixes, i386:            i386-Prefixes.       (line   6)
+* instruction set, M680x0:               M68K-opcodes.        (line   6)
+* instruction set, M68HC11:              M68HC11-opcodes.     (line   6)
+* instruction summary, AVR:              AVR Opcodes.         (line   6)
+* instruction summary, D10V:             D10V-Opcodes.        (line   6)
+* instruction summary, D30V:             D30V-Opcodes.        (line   6)
+* instruction summary, H8/300:           H8/300 Opcodes.      (line   6)
+* instruction summary, LM32:             LM32 Opcodes.        (line   6)
+* instruction summary, SH:               SH Opcodes.          (line   6)
+* instruction summary, SH64:             SH64 Opcodes.        (line   6)
+* instruction summary, Z8000:            Z8000 Opcodes.       (line   6)
+* instruction syntax, s390:              s390 Syntax.         (line   6)
+* instructions and directives:           Statements.          (line  19)
+* int directive:                         Int.                 (line   6)
+* int directive, H8/300:                 H8/300 Directives.   (line   6)
+* int directive, i386:                   i386-Float.          (line  21)
+* int directive, TIC54X:                 TIC54X-Directives.   (line 111)
+* int directive, x86-64:                 i386-Float.          (line  21)
+* integer expressions:                   Integer Exprs.       (line   6)
+* integer, 16-byte:                      Octa.                (line   6)
+* integer, 8-byte:                       Quad.                (line   9)
+* integers:                              Integers.            (line   6)
+* integers, 16-bit:                      hword.               (line   6)
+* integers, 32-bit:                      Int.                 (line   6)
+* integers, binary:                      Integers.            (line   6)
+* integers, decimal:                     Integers.            (line  12)
+* integers, hexadecimal:                 Integers.            (line  15)
+* integers, octal:                       Integers.            (line   9)
+* integers, one byte:                    Byte.                (line   6)
+* intel_syntax pseudo op, i386:          i386-Syntax.         (line   6)
+* intel_syntax pseudo op, x86-64:        i386-Syntax.         (line   6)
+* internal assembler sections:           As Sections.         (line   6)
+* internal directive:                    Internal.            (line   6)
+* invalid input:                         Bug Criteria.        (line  14)
+* invocation summary:                    Overview.            (line   6)
+* IP2K architecture options:             IP2K-Opts.           (line  14)
+* IP2K options:                          IP2K-Opts.           (line   6)
+* IP2K support:                          IP2K-Dependent.      (line   6)
+* irp directive:                         Irp.                 (line   6)
+* irpc directive:                        Irpc.                (line   6)
+* ISA options, SH64:                     SH64 Options.        (line   6)
+* joining text and data sections:        R.                   (line   6)
+* jump instructions, i386:               i386-Mnemonics.      (line  55)
+* jump instructions, x86-64:             i386-Mnemonics.      (line  55)
+* jump optimization, i386:               i386-Jumps.          (line   6)
+* jump optimization, x86-64:             i386-Jumps.          (line   6)
+* jump/call operands, i386:              i386-Syntax.         (line  15)
+* jump/call operands, x86-64:            i386-Syntax.         (line  15)
+* L16SI instructions, relaxation:        Xtensa Immediate Relaxation.
+                                                              (line  23)
+* L16UI instructions, relaxation:        Xtensa Immediate Relaxation.
+                                                              (line  23)
+* L32I instructions, relaxation:         Xtensa Immediate Relaxation.
+                                                              (line  23)
+* L8UI instructions, relaxation:         Xtensa Immediate Relaxation.
+                                                              (line  23)
+* label (:):                             Statements.          (line  30)
+* label directive, TIC54X:               TIC54X-Directives.   (line 123)
+* labels:                                Labels.              (line   6)
+* lcomm directive:                       Lcomm.               (line   6)
+* lcomm directive, COFF:                 i386-Directives.     (line   6)
+* ld:                                    Object.              (line  15)
+* ldouble directive M680x0:              M68K-Float.          (line  17)
+* ldouble directive M68HC11:             M68HC11-Float.       (line  17)
+* ldouble directive, TIC54X:             TIC54X-Directives.   (line  64)
+* LDR reg,=<label> pseudo op, ARM:       ARM Opcodes.         (line  15)
+* leafproc directive, i960:              Directives-i960.     (line  18)
+* length directive, TIC54X:              TIC54X-Directives.   (line 127)
+* length of symbols:                     Symbol Intro.        (line  14)
+* lflags directive (ignored):            Lflags.              (line   6)
+* line comment character:                Comments.            (line  19)
+* line comment character, Alpha:         Alpha-Chars.         (line   6)
+* line comment character, ARM:           ARM-Chars.           (line   6)
+* line comment character, AVR:           AVR-Chars.           (line   6)
+* line comment character, D10V:          D10V-Chars.          (line   6)
+* line comment character, D30V:          D30V-Chars.          (line   6)
+* line comment character, H8/300:        H8/300-Chars.        (line   6)
+* line comment character, IA-64:         IA-64-Chars.         (line   6)
+* line comment character, M680x0:        M68K-Chars.          (line   6)
+* line comment character, MSP 430:       MSP430-Chars.        (line   6)
+* line comment character, s390:          s390 Characters.     (line   6)
+* line comment character, SH:            SH-Chars.            (line   6)
+* line comment character, SH64:          SH64-Chars.          (line   6)
+* line comment character, Sparc:         Sparc-Chars.         (line   6)
+* line comment character, V850:          V850-Chars.          (line   6)
+* line comment character, Z80:           Z80-Chars.           (line   6)
+* line comment character, Z8000:         Z8000-Chars.         (line   6)
+* line comment characters, CRIS:         CRIS-Chars.          (line   6)
+* line comment characters, MMIX:         MMIX-Chars.          (line   6)
+* line directive:                        Line.                (line   6)
+* line directive, MSP 430:               MSP430 Directives.   (line  14)
+* line numbers, in input files:          Input Files.         (line  35)
+* line numbers, in warnings/errors:      Errors.              (line  16)
+* line separator character:              Statements.          (line   6)
+* line separator, Alpha:                 Alpha-Chars.         (line   8)
+* line separator, ARM:                   ARM-Chars.           (line  10)
+* line separator, AVR:                   AVR-Chars.           (line  10)
+* line separator, H8/300:                H8/300-Chars.        (line   8)
+* line separator, IA-64:                 IA-64-Chars.         (line   8)
+* line separator, SH:                    SH-Chars.            (line   8)
+* line separator, SH64:                  SH64-Chars.          (line   8)
+* line separator, Sparc:                 Sparc-Chars.         (line   8)
+* line separator, Z8000:                 Z8000-Chars.         (line   8)
+* lines starting with #:                 Comments.            (line  39)
+* linker:                                Object.              (line  15)
+* linker, and assembler:                 Secs Background.     (line  10)
+* linkonce directive:                    Linkonce.            (line   6)
+* list directive:                        List.                (line   6)
+* list directive, TIC54X:                TIC54X-Directives.   (line 131)
+* listing control, turning off:          Nolist.              (line   6)
+* listing control, turning on:           List.                (line   6)
+* listing control: new page:             Eject.               (line   6)
+* listing control: paper size:           Psize.               (line   6)
+* listing control: subtitle:             Sbttl.               (line   6)
+* listing control: title line:           Title.               (line   6)
+* listings, enabling:                    a.                   (line   6)
+* literal directive:                     Literal Directive.   (line   6)
+* literal pool entries, s390:            s390 Literal Pool Entries.
+                                                              (line   6)
+* literal_position directive:            Literal Position Directive.
+                                                              (line   6)
+* literal_prefix directive:              Literal Prefix Directive.
+                                                              (line   6)
+* little endian output, MIPS:            Overview.            (line 644)
+* little endian output, PJ:              Overview.            (line 551)
+* little-endian output, MIPS:            MIPS Opts.           (line  13)
+* LM32 modifiers:                        LM32-Modifiers.      (line   6)
+* LM32 opcode summary:                   LM32 Opcodes.        (line   6)
+* LM32 options (none):                   LM32 Options.        (line   6)
+* LM32 register names:                   LM32-Regs.           (line   6)
+* LM32 support:                          LM32-Dependent.      (line   6)
+* ln directive:                          Ln.                  (line   6)
+* lo pseudo-op, V850:                    V850 Opcodes.        (line  22)
+* loc directive:                         Loc.                 (line   6)
+* loc_mark_labels directive:             Loc_mark_labels.     (line   6)
+* local common symbols:                  Lcomm.               (line   6)
+* local directive:                       Local.               (line   6)
+* local labels:                          Symbol Names.        (line  35)
+* local symbol names:                    Symbol Names.        (line  22)
+* local symbols, retaining in output:    L.                   (line   6)
+* location counter:                      Dot.                 (line   6)
+* location counter, advancing:           Org.                 (line   6)
+* location counter, Z80:                 Z80-Chars.           (line   8)
+* logical file name:                     File.                (line  13)
+* logical line number:                   Line.                (line   6)
+* logical line numbers:                  Comments.            (line  39)
+* long directive:                        Long.                (line   6)
+* long directive, ARC:                   ARC Directives.      (line 159)
+* long directive, i386:                  i386-Float.          (line  21)
+* long directive, TIC54X:                TIC54X-Directives.   (line 135)
+* long directive, x86-64:                i386-Float.          (line  21)
+* longcall pseudo-op, V850:              V850 Opcodes.        (line 123)
+* longcalls directive:                   Longcalls Directive. (line   6)
+* longjump pseudo-op, V850:              V850 Opcodes.        (line 129)
+* loop directive, TIC54X:                TIC54X-Directives.   (line 143)
+* LOOP instructions, alignment:          Xtensa Automatic Alignment.
+                                                              (line   6)
+* low directive, M32R:                   M32R-Directives.     (line   9)
+* lp register, V850:                     V850-Regs.           (line  98)
+* lval:                                  Z8000 Directives.    (line  27)
+* M16C architecture option:              M32C-Opts.           (line  12)
+* M32C architecture option:              M32C-Opts.           (line   9)
+* M32C modifiers:                        M32C-Modifiers.      (line   6)
+* M32C options:                          M32C-Opts.           (line   6)
+* M32C support:                          M32C-Dependent.      (line   6)
+* M32R architecture options:             M32R-Opts.           (line   9)
+* M32R directives:                       M32R-Directives.     (line   6)
+* M32R options:                          M32R-Opts.           (line   6)
+* M32R support:                          M32R-Dependent.      (line   6)
+* M32R warnings:                         M32R-Warnings.       (line   6)
+* M680x0 addressing modes:               M68K-Syntax.         (line  21)
+* M680x0 architecture options:           M68K-Opts.           (line 104)
+* M680x0 branch improvement:             M68K-Branch.         (line   6)
+* M680x0 directives:                     M68K-Directives.     (line   6)
+* M680x0 floating point:                 M68K-Float.          (line   6)
+* M680x0 immediate character:            M68K-Chars.          (line   6)
+* M680x0 line comment character:         M68K-Chars.          (line   6)
+* M680x0 opcodes:                        M68K-opcodes.        (line   6)
+* M680x0 options:                        M68K-Opts.           (line   6)
+* M680x0 pseudo-opcodes:                 M68K-Branch.         (line   6)
+* M680x0 size modifiers:                 M68K-Syntax.         (line   8)
+* M680x0 support:                        M68K-Dependent.      (line   6)
+* M680x0 syntax:                         M68K-Syntax.         (line   8)
+* M68HC11 addressing modes:              M68HC11-Syntax.      (line  17)
+* M68HC11 and M68HC12 support:           M68HC11-Dependent.   (line   6)
+* M68HC11 assembler directive .far:      M68HC11-Directives.  (line  20)
+* M68HC11 assembler directive .interrupt: M68HC11-Directives. (line  26)
+* M68HC11 assembler directive .mode:     M68HC11-Directives.  (line  16)
+* M68HC11 assembler directive .relax:    M68HC11-Directives.  (line  10)
+* M68HC11 assembler directive .xrefb:    M68HC11-Directives.  (line  31)
+* M68HC11 assembler directives:          M68HC11-Directives.  (line   6)
+* M68HC11 branch improvement:            M68HC11-Branch.      (line   6)
+* M68HC11 floating point:                M68HC11-Float.       (line   6)
+* M68HC11 modifiers:                     M68HC11-Modifiers.   (line   6)
+* M68HC11 opcodes:                       M68HC11-opcodes.     (line   6)
+* M68HC11 options:                       M68HC11-Opts.        (line   6)
+* M68HC11 pseudo-opcodes:                M68HC11-Branch.      (line   6)
+* M68HC11 syntax:                        M68HC11-Syntax.      (line   6)
+* M68HC12 assembler directives:          M68HC11-Directives.  (line   6)
+* machine dependencies:                  Machine Dependencies.
+                                                              (line   6)
+* machine directives, ARC:               ARC Directives.      (line   6)
+* machine directives, ARM:               ARM Directives.      (line   6)
+* machine directives, H8/300 (none):     H8/300 Directives.   (line   6)
+* machine directives, i860:              Directives-i860.     (line   6)
+* machine directives, i960:              Directives-i960.     (line   6)
+* machine directives, MSP 430:           MSP430 Directives.   (line   6)
+* machine directives, SH:                SH Directives.       (line   6)
+* machine directives, SH64:              SH64 Directives.     (line   9)
+* machine directives, SPARC:             Sparc-Directives.    (line   6)
+* machine directives, TIC54X:            TIC54X-Directives.   (line   6)
+* machine directives, V850:              V850 Directives.     (line   6)
+* machine directives, VAX:               VAX-directives.      (line   6)
+* machine directives, x86:               i386-Directives.     (line   6)
+* machine independent directives:        Pseudo Ops.          (line   6)
+* machine instructions (not covered):    Manual.              (line  14)
+* machine-independent syntax:            Syntax.              (line   6)
+* macro directive:                       Macro.               (line  28)
+* macro directive, TIC54X:               TIC54X-Directives.   (line 153)
+* macros:                                Macro.               (line   6)
+* macros, count executed:                Macro.               (line 143)
+* Macros, MSP 430:                       MSP430-Macros.       (line   6)
+* macros, TIC54X:                        TIC54X-Macros.       (line   6)
+* make rules:                            MD.                  (line   6)
+* manual, structure and purpose:         Manual.              (line   6)
+* math builtins, TIC54X:                 TIC54X-Builtins.     (line   6)
+* Maximum number of continuation lines:  listing.             (line  34)
+* memory references, i386:               i386-Memory.         (line   6)
+* memory references, x86-64:             i386-Memory.         (line   6)
+* memory-mapped registers, TIC54X:       TIC54X-MMRegs.       (line   6)
+* merging text and data sections:        R.                   (line   6)
+* messages from assembler:               Errors.              (line   6)
+* MicroBlaze architectures:              MicroBlaze-Dependent.
+                                                              (line   6)
+* MicroBlaze directives:                 MicroBlaze Directives.
+                                                              (line   6)
+* MicroBlaze support:                    MicroBlaze-Dependent.
+                                                              (line  13)
+* minus, permitted arguments:            Infix Ops.           (line  49)
+* MIPS architecture options:             MIPS Opts.           (line  29)
+* MIPS big-endian output:                MIPS Opts.           (line  13)
+* MIPS CPU override:                     MIPS ISA.            (line  18)
+* MIPS debugging directives:             MIPS Stabs.          (line   6)
+* MIPS DSP Release 1 instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line  21)
+* MIPS DSP Release 2 instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line  26)
+* MIPS ECOFF sections:                   MIPS Object.         (line   6)
+* MIPS endianness:                       Overview.            (line 641)
+* MIPS ISA:                              Overview.            (line 647)
+* MIPS ISA override:                     MIPS ISA.            (line   6)
+* MIPS little-endian output:             MIPS Opts.           (line  13)
+* MIPS MDMX instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line  16)
+* MIPS MIPS-3D instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line   6)
+* MIPS MT instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line  32)
+* MIPS option stack:                     MIPS option stack.   (line   6)
+* MIPS processor:                        MIPS-Dependent.      (line   6)
+* MIT:                                   M68K-Syntax.         (line   6)
+* mlib directive, TIC54X:                TIC54X-Directives.   (line 159)
+* mlist directive, TIC54X:               TIC54X-Directives.   (line 164)
+* MMIX assembler directive BSPEC:        MMIX-Pseudos.        (line 131)
+* MMIX assembler directive BYTE:         MMIX-Pseudos.        (line  97)
+* MMIX assembler directive ESPEC:        MMIX-Pseudos.        (line 131)
+* MMIX assembler directive GREG:         MMIX-Pseudos.        (line  50)
+* MMIX assembler directive IS:           MMIX-Pseudos.        (line  42)
+* MMIX assembler directive LOC:          MMIX-Pseudos.        (line   7)
+* MMIX assembler directive LOCAL:        MMIX-Pseudos.        (line  28)
+* MMIX assembler directive OCTA:         MMIX-Pseudos.        (line 108)
+* MMIX assembler directive PREFIX:       MMIX-Pseudos.        (line 120)
+* MMIX assembler directive TETRA:        MMIX-Pseudos.        (line 108)
+* MMIX assembler directive WYDE:         MMIX-Pseudos.        (line 108)
+* MMIX assembler directives:             MMIX-Pseudos.        (line   6)
+* MMIX line comment characters:          MMIX-Chars.          (line   6)
+* MMIX options:                          MMIX-Opts.           (line   6)
+* MMIX pseudo-op BSPEC:                  MMIX-Pseudos.        (line 131)
+* MMIX pseudo-op BYTE:                   MMIX-Pseudos.        (line  97)
+* MMIX pseudo-op ESPEC:                  MMIX-Pseudos.        (line 131)
+* MMIX pseudo-op GREG:                   MMIX-Pseudos.        (line  50)
+* MMIX pseudo-op IS:                     MMIX-Pseudos.        (line  42)
+* MMIX pseudo-op LOC:                    MMIX-Pseudos.        (line   7)
+* MMIX pseudo-op LOCAL:                  MMIX-Pseudos.        (line  28)
+* MMIX pseudo-op OCTA:                   MMIX-Pseudos.        (line 108)
+* MMIX pseudo-op PREFIX:                 MMIX-Pseudos.        (line 120)
+* MMIX pseudo-op TETRA:                  MMIX-Pseudos.        (line 108)
+* MMIX pseudo-op WYDE:                   MMIX-Pseudos.        (line 108)
+* MMIX pseudo-ops:                       MMIX-Pseudos.        (line   6)
+* MMIX register names:                   MMIX-Regs.           (line   6)
+* MMIX support:                          MMIX-Dependent.      (line   6)
+* mmixal differences:                    MMIX-mmixal.         (line   6)
+* mmregs directive, TIC54X:              TIC54X-Directives.   (line 170)
+* mmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
+* MMX, i386:                             i386-SIMD.           (line   6)
+* MMX, x86-64:                           i386-SIMD.           (line   6)
+* mnemonic compatibility, i386:          i386-Mnemonics.      (line  61)
+* mnemonic suffixes, i386:               i386-Syntax.         (line  29)
+* mnemonic suffixes, x86-64:             i386-Syntax.         (line  29)
+* mnemonics for opcodes, VAX:            VAX-opcodes.         (line   6)
+* mnemonics, AVR:                        AVR Opcodes.         (line   6)
+* mnemonics, D10V:                       D10V-Opcodes.        (line   6)
+* mnemonics, D30V:                       D30V-Opcodes.        (line   6)
+* mnemonics, H8/300:                     H8/300 Opcodes.      (line   6)
+* mnemonics, LM32:                       LM32 Opcodes.        (line   6)
+* mnemonics, SH:                         SH Opcodes.          (line   6)
+* mnemonics, SH64:                       SH64 Opcodes.        (line   6)
+* mnemonics, Z8000:                      Z8000 Opcodes.       (line   6)
+* mnolist directive, TIC54X:             TIC54X-Directives.   (line 164)
+* Motorola syntax for the 680x0:         M68K-Moto-Syntax.    (line   6)
+* MOVI instructions, relaxation:         Xtensa Immediate Relaxation.
+                                                              (line  12)
+* MOVW and MOVT relocations, ARM:        ARM-Relocations.     (line  20)
+* MRI compatibility mode:                M.                   (line   6)
+* mri directive:                         MRI.                 (line   6)
+* MRI mode, temporarily:                 MRI.                 (line   6)
+* MSP 430 floating point (IEEE):         MSP430 Floating Point.
+                                                              (line   6)
+* MSP 430 identifiers:                   MSP430-Chars.        (line   8)
+* MSP 430 line comment character:        MSP430-Chars.        (line   6)
+* MSP 430 machine directives:            MSP430 Directives.   (line   6)
+* MSP 430 macros:                        MSP430-Macros.       (line   6)
+* MSP 430 opcodes:                       MSP430 Opcodes.      (line   6)
+* MSP 430 options (none):                MSP430 Options.      (line   6)
+* MSP 430 profiling capability:          MSP430 Profiling Capability.
+                                                              (line   6)
+* MSP 430 register names:                MSP430-Regs.         (line   6)
+* MSP 430 support:                       MSP430-Dependent.    (line   6)
+* MSP430 Assembler Extensions:           MSP430-Ext.          (line   6)
+* mul instruction, i386:                 i386-Notes.          (line   6)
+* mul instruction, x86-64:               i386-Notes.          (line   6)
+* name:                                  Z8000 Directives.    (line  18)
+* named section:                         Section.             (line   6)
+* named sections:                        Ld Sections.         (line   8)
+* names, symbol:                         Symbol Names.        (line   6)
+* naming object file:                    o.                   (line   6)
+* new page, in listings:                 Eject.               (line   6)
+* newblock directive, TIC54X:            TIC54X-Directives.   (line 176)
+* newline (\n):                          Strings.             (line  21)
+* newline, required at file end:         Statements.          (line  13)
+* no-absolute-literals directive:        Absolute Literals Directive.
+                                                              (line   6)
+* no-longcalls directive:                Longcalls Directive. (line   6)
+* no-schedule directive:                 Schedule Directive.  (line   6)
+* no-transform directive:                Transform Directive. (line   6)
+* nolist directive:                      Nolist.              (line   6)
+* nolist directive, TIC54X:              TIC54X-Directives.   (line 131)
+* NOP pseudo op, ARM:                    ARM Opcodes.         (line   9)
+* notes for Alpha:                       Alpha Notes.         (line   6)
+* null-terminated strings:               Asciz.               (line   6)
+* number constants:                      Numbers.             (line   6)
+* number of macros executed:             Macro.               (line 143)
+* numbered subsections:                  Sub-Sections.        (line   6)
+* numbers, 16-bit:                       hword.               (line   6)
+* numeric values:                        Expressions.         (line   6)
+* nword directive, SPARC:                Sparc-Directives.    (line  20)
+* object attributes:                     Object Attributes.   (line   6)
+* object file:                           Object.              (line   6)
+* object file format:                    Object Formats.      (line   6)
+* object file name:                      o.                   (line   6)
+* object file, after errors:             Z.                   (line   6)
+* obsolescent directives:                Deprecated.          (line   6)
+* octa directive:                        Octa.                (line   6)
+* octal character code (\DDD):           Strings.             (line  30)
+* octal integers:                        Integers.            (line   9)
+* offset directive, V850:                V850 Directives.     (line   6)
+* opcode mnemonics, VAX:                 VAX-opcodes.         (line   6)
+* opcode names, Xtensa:                  Xtensa Opcodes.      (line   6)
+* opcode summary, AVR:                   AVR Opcodes.         (line   6)
+* opcode summary, D10V:                  D10V-Opcodes.        (line   6)
+* opcode summary, D30V:                  D30V-Opcodes.        (line   6)
+* opcode summary, H8/300:                H8/300 Opcodes.      (line   6)
+* opcode summary, LM32:                  LM32 Opcodes.        (line   6)
+* opcode summary, SH:                    SH Opcodes.          (line   6)
+* opcode summary, SH64:                  SH64 Opcodes.        (line   6)
+* opcode summary, Z8000:                 Z8000 Opcodes.       (line   6)
+* opcodes for ARC:                       ARC Opcodes.         (line   6)
+* opcodes for ARM:                       ARM Opcodes.         (line   6)
+* opcodes for MSP 430:                   MSP430 Opcodes.      (line   6)
+* opcodes for V850:                      V850 Opcodes.        (line   6)
+* opcodes, i860:                         Opcodes for i860.    (line   6)
+* opcodes, i960:                         Opcodes for i960.    (line   6)
+* opcodes, M680x0:                       M68K-opcodes.        (line   6)
+* opcodes, M68HC11:                      M68HC11-opcodes.     (line   6)
+* operand delimiters, i386:              i386-Syntax.         (line  15)
+* operand delimiters, x86-64:            i386-Syntax.         (line  15)
+* operand notation, VAX:                 VAX-operands.        (line   6)
+* operands in expressions:               Arguments.           (line   6)
+* operator precedence:                   Infix Ops.           (line  11)
+* operators, in expressions:             Operators.           (line   6)
+* operators, permitted arguments:        Infix Ops.           (line   6)
+* optimization, D10V:                    Overview.            (line 420)
+* optimization, D30V:                    Overview.            (line 425)
+* optimizations:                         Xtensa Optimizations.
+                                                              (line   6)
+* option directive, ARC:                 ARC Directives.      (line 162)
+* option directive, TIC54X:              TIC54X-Directives.   (line 180)
+* option summary:                        Overview.            (line   6)
+* options for Alpha:                     Alpha Options.       (line   6)
+* options for ARC (none):                ARC Options.         (line   6)
+* options for ARM (none):                ARM Options.         (line   6)
+* options for AVR (none):                AVR Options.         (line   6)
+* options for Blackfin (none):           Blackfin Options.    (line   6)
+* options for i386:                      i386-Options.        (line   6)
+* options for IA-64:                     IA-64 Options.       (line   6)
+* options for LM32 (none):               LM32 Options.        (line   6)
+* options for MSP430 (none):             MSP430 Options.      (line   6)
+* options for PDP-11:                    PDP-11-Options.      (line   6)
+* options for PowerPC:                   PowerPC-Opts.        (line   6)
+* options for s390:                      s390 Options.        (line   6)
+* options for SCORE:                     SCORE-Opts.          (line   6)
+* options for SPARC:                     Sparc-Opts.          (line   6)
+* options for V850 (none):               V850 Options.        (line   6)
+* options for VAX/VMS:                   VAX-Opts.            (line  42)
+* options for x86-64:                    i386-Options.        (line   6)
+* options for Z80:                       Z80 Options.         (line   6)
+* options, all versions of assembler:    Invoking.            (line   6)
+* options, command line:                 Command Line.        (line  13)
+* options, CRIS:                         CRIS-Opts.           (line   6)
+* options, D10V:                         D10V-Opts.           (line   6)
+* options, D30V:                         D30V-Opts.           (line   6)
+* options, H8/300:                       H8/300 Options.      (line   6)
+* options, i960:                         Options-i960.        (line   6)
+* options, IP2K:                         IP2K-Opts.           (line   6)
+* options, M32C:                         M32C-Opts.           (line   6)
+* options, M32R:                         M32R-Opts.           (line   6)
+* options, M680x0:                       M68K-Opts.           (line   6)
+* options, M68HC11:                      M68HC11-Opts.        (line   6)
+* options, MMIX:                         MMIX-Opts.           (line   6)
+* options, PJ:                           PJ Options.          (line   6)
+* options, SH:                           SH Options.          (line   6)
+* options, SH64:                         SH64 Options.        (line   6)
+* options, TIC54X:                       TIC54X-Opts.         (line   6)
+* options, Z8000:                        Z8000 Options.       (line   6)
+* org directive:                         Org.                 (line   6)
+* other attribute, of a.out symbol:      Symbol Other.        (line   6)
+* output file:                           Object.              (line   6)
+* p2align directive:                     P2align.             (line   6)
+* p2alignl directive:                    P2align.             (line  28)
+* p2alignw directive:                    P2align.             (line  28)
+* padding the location counter:          Align.               (line   6)
+* padding the location counter given a power of two: P2align. (line   6)
+* padding the location counter given number of bytes: Balign. (line   6)
+* page, in listings:                     Eject.               (line   6)
+* paper size, for listings:              Psize.               (line   6)
+* paths for .include:                    I.                   (line   6)
+* patterns, writing in memory:           Fill.                (line   6)
+* PDP-11 comments:                       PDP-11-Syntax.       (line  16)
+* PDP-11 floating-point register syntax: PDP-11-Syntax.       (line  13)
+* PDP-11 general-purpose register syntax: PDP-11-Syntax.      (line  10)
+* PDP-11 instruction naming:             PDP-11-Mnemonics.    (line   6)
+* PDP-11 support:                        PDP-11-Dependent.    (line   6)
+* PDP-11 syntax:                         PDP-11-Syntax.       (line   6)
+* PIC code generation for ARM:           ARM Options.         (line 139)
+* PIC code generation for M32R:          M32R-Opts.           (line  42)
+* PIC selection, MIPS:                   MIPS Opts.           (line  21)
+* PJ endianness:                         Overview.            (line 548)
+* PJ options:                            PJ Options.          (line   6)
+* PJ support:                            PJ-Dependent.        (line   6)
+* plus, permitted arguments:             Infix Ops.           (line  44)
+* popsection directive:                  PopSection.          (line   6)
+* Position-independent code, CRIS:       CRIS-Opts.           (line  27)
+* Position-independent code, symbols in, CRIS: CRIS-Pic.      (line   6)
+* PowerPC architectures:                 PowerPC-Opts.        (line   6)
+* PowerPC directives:                    PowerPC-Pseudo.      (line   6)
+* PowerPC options:                       PowerPC-Opts.        (line   6)
+* PowerPC support:                       PPC-Dependent.       (line   6)
+* precedence of operators:               Infix Ops.           (line  11)
+* precision, floating point:             Flonums.             (line   6)
+* prefix operators:                      Prefix Ops.          (line   6)
+* prefixes, i386:                        i386-Prefixes.       (line   6)
+* preprocessing:                         Preprocessing.       (line   6)
+* preprocessing, turning on and off:     Preprocessing.       (line  26)
+* previous directive:                    Previous.            (line   6)
+* primary attributes, COFF symbols:      COFF Symbols.        (line  13)
+* print directive:                       Print.               (line   6)
+* proc directive, SPARC:                 Sparc-Directives.    (line  25)
+* profiler directive, MSP 430:           MSP430 Directives.   (line  22)
+* profiling capability for MSP 430:      MSP430 Profiling Capability.
+                                                              (line   6)
+* protected directive:                   Protected.           (line   6)
+* pseudo-op .arch, CRIS:                 CRIS-Pseudos.        (line  45)
+* pseudo-op .dword, CRIS:                CRIS-Pseudos.        (line  12)
+* pseudo-op .syntax, CRIS:               CRIS-Pseudos.        (line  17)
+* pseudo-op BSPEC, MMIX:                 MMIX-Pseudos.        (line 131)
+* pseudo-op BYTE, MMIX:                  MMIX-Pseudos.        (line  97)
+* pseudo-op ESPEC, MMIX:                 MMIX-Pseudos.        (line 131)
+* pseudo-op GREG, MMIX:                  MMIX-Pseudos.        (line  50)
+* pseudo-op IS, MMIX:                    MMIX-Pseudos.        (line  42)
+* pseudo-op LOC, MMIX:                   MMIX-Pseudos.        (line   7)
+* pseudo-op LOCAL, MMIX:                 MMIX-Pseudos.        (line  28)
+* pseudo-op OCTA, MMIX:                  MMIX-Pseudos.        (line 108)
+* pseudo-op PREFIX, MMIX:                MMIX-Pseudos.        (line 120)
+* pseudo-op TETRA, MMIX:                 MMIX-Pseudos.        (line 108)
+* pseudo-op WYDE, MMIX:                  MMIX-Pseudos.        (line 108)
+* pseudo-opcodes, M680x0:                M68K-Branch.         (line   6)
+* pseudo-opcodes, M68HC11:               M68HC11-Branch.      (line   6)
+* pseudo-ops for branch, VAX:            VAX-branch.          (line   6)
+* pseudo-ops, CRIS:                      CRIS-Pseudos.        (line   6)
+* pseudo-ops, machine independent:       Pseudo Ops.          (line   6)
+* pseudo-ops, MMIX:                      MMIX-Pseudos.        (line   6)
+* psize directive:                       Psize.               (line   6)
+* PSR bits:                              IA-64-Bits.          (line   6)
+* pstring directive, TIC54X:             TIC54X-Directives.   (line 209)
+* psw register, V850:                    V850-Regs.           (line 116)
+* purgem directive:                      Purgem.              (line   6)
+* purpose of GNU assembler:              GNU Assembler.       (line  12)
+* pushsection directive:                 PushSection.         (line   6)
+* quad directive:                        Quad.                (line   6)
+* quad directive, i386:                  i386-Float.          (line  21)
+* quad directive, x86-64:                i386-Float.          (line  21)
+* real-mode code, i386:                  i386-16bit.          (line   6)
+* ref directive, TIC54X:                 TIC54X-Directives.   (line 103)
+* register directive, SPARC:             Sparc-Directives.    (line  29)
+* register names, Alpha:                 Alpha-Regs.          (line   6)
+* register names, ARC:                   ARC-Regs.            (line   6)
+* register names, ARM:                   ARM-Regs.            (line   6)
+* register names, AVR:                   AVR-Regs.            (line   6)
+* register names, CRIS:                  CRIS-Regs.           (line   6)
+* register names, H8/300:                H8/300-Regs.         (line   6)
+* register names, IA-64:                 IA-64-Regs.          (line   6)
+* register names, LM32:                  LM32-Regs.           (line   6)
+* register names, MMIX:                  MMIX-Regs.           (line   6)
+* register names, MSP 430:               MSP430-Regs.         (line   6)
+* register names, Sparc:                 Sparc-Regs.          (line   6)
+* register names, V850:                  V850-Regs.           (line   6)
+* register names, VAX:                   VAX-operands.        (line  17)
+* register names, Xtensa:                Xtensa Registers.    (line   6)
+* register names, Z80:                   Z80-Regs.            (line   6)
+* register naming, s390:                 s390 Register.       (line   6)
+* register operands, i386:               i386-Syntax.         (line  15)
+* register operands, x86-64:             i386-Syntax.         (line  15)
+* registers, D10V:                       D10V-Regs.           (line   6)
+* registers, D30V:                       D30V-Regs.           (line   6)
+* registers, i386:                       i386-Regs.           (line   6)
+* registers, SH:                         SH-Regs.             (line   6)
+* registers, SH64:                       SH64-Regs.           (line   6)
+* registers, TIC54X memory-mapped:       TIC54X-MMRegs.       (line   6)
+* registers, x86-64:                     i386-Regs.           (line   6)
+* registers, Z8000:                      Z8000-Regs.          (line   6)
+* relaxation:                            Xtensa Relaxation.   (line   6)
+* relaxation of ADDI instructions:       Xtensa Immediate Relaxation.
+                                                              (line  43)
+* relaxation of branch instructions:     Xtensa Branch Relaxation.
+                                                              (line   6)
+* relaxation of call instructions:       Xtensa Call Relaxation.
+                                                              (line   6)
+* relaxation of immediate fields:        Xtensa Immediate Relaxation.
+                                                              (line   6)
+* relaxation of L16SI instructions:      Xtensa Immediate Relaxation.
+                                                              (line  23)
+* relaxation of L16UI instructions:      Xtensa Immediate Relaxation.
+                                                              (line  23)
+* relaxation of L32I instructions:       Xtensa Immediate Relaxation.
+                                                              (line  23)
+* relaxation of L8UI instructions:       Xtensa Immediate Relaxation.
+                                                              (line  23)
+* relaxation of MOVI instructions:       Xtensa Immediate Relaxation.
+                                                              (line  12)
+* reloc directive:                       Reloc.               (line   6)
+* relocation:                            Sections.            (line   6)
+* relocation example:                    Ld Sections.         (line  40)
+* relocations, Alpha:                    Alpha-Relocs.        (line   6)
+* relocations, Sparc:                    Sparc-Relocs.        (line   6)
+* repeat prefixes, i386:                 i386-Prefixes.       (line  44)
+* reporting bugs in assembler:           Reporting Bugs.      (line   6)
+* rept directive:                        Rept.                (line   6)
+* reserve directive, SPARC:              Sparc-Directives.    (line  39)
+* return instructions, i386:             i386-Syntax.         (line  38)
+* return instructions, x86-64:           i386-Syntax.         (line  38)
+* REX prefixes, i386:                    i386-Prefixes.       (line  46)
+* rsect:                                 Z8000 Directives.    (line  52)
+* s390 floating point:                   s390 Floating Point. (line   6)
+* s390 instruction aliases:              s390 Aliases.        (line   6)
+* s390 instruction formats:              s390 Formats.        (line   6)
+* s390 instruction marker:               s390 Instruction Marker.
+                                                              (line   6)
+* s390 instruction mnemonics:            s390 Mnemonics.      (line   6)
+* s390 instruction operand modifier:     s390 Operand Modifier.
+                                                              (line   6)
+* s390 instruction operands:             s390 Operands.       (line   6)
+* s390 instruction syntax:               s390 Syntax.         (line   6)
+* s390 line comment character:           s390 Characters.     (line   6)
+* s390 literal pool entries:             s390 Literal Pool Entries.
+                                                              (line   6)
+* s390 options:                          s390 Options.        (line   6)
+* s390 register naming:                  s390 Register.       (line   6)
+* s390 support:                          S/390-Dependent.     (line   6)
+* sblock directive, TIC54X:              TIC54X-Directives.   (line 183)
+* sbttl directive:                       Sbttl.               (line   6)
+* schedule directive:                    Schedule Directive.  (line   6)
+* scl directive:                         Scl.                 (line   6)
+* SCORE architectures:                   SCORE-Opts.          (line   6)
+* SCORE directives:                      SCORE-Pseudo.        (line   6)
+* SCORE options:                         SCORE-Opts.          (line   6)
+* SCORE processor:                       SCORE-Dependent.     (line   6)
+* sdaoff pseudo-op, V850:                V850 Opcodes.        (line  65)
+* search path for .include:              I.                   (line   6)
+* sect directive, MSP 430:               MSP430 Directives.   (line  18)
+* sect directive, TIC54X:                TIC54X-Directives.   (line 189)
+* section directive (COFF version):      Section.             (line  16)
+* section directive (ELF version):       Section.             (line  70)
+* section directive, V850:               V850 Directives.     (line   9)
+* section override prefixes, i386:       i386-Prefixes.       (line  23)
+* Section Stack <1>:                     Section.             (line  65)
+* Section Stack <2>:                     SubSection.          (line   6)
+* Section Stack <3>:                     PopSection.          (line   6)
+* Section Stack <4>:                     PushSection.         (line   6)
+* Section Stack:                         Previous.            (line   6)
+* section-relative addressing:           Secs Background.     (line  68)
+* sections:                              Sections.            (line   6)
+* sections in messages, internal:        As Sections.         (line   6)
+* sections, i386:                        i386-Syntax.         (line  44)
+* sections, named:                       Ld Sections.         (line   8)
+* sections, x86-64:                      i386-Syntax.         (line  44)
+* seg directive, SPARC:                  Sparc-Directives.    (line  44)
+* segm:                                  Z8000 Directives.    (line  10)
+* set directive:                         Set.                 (line   6)
+* set directive, TIC54X:                 TIC54X-Directives.   (line 192)
+* SH addressing modes:                   SH-Addressing.       (line   6)
+* SH floating point (IEEE):              SH Floating Point.   (line   6)
+* SH line comment character:             SH-Chars.            (line   6)
+* SH line separator:                     SH-Chars.            (line   8)
+* SH machine directives:                 SH Directives.       (line   6)
+* SH opcode summary:                     SH Opcodes.          (line   6)
+* SH options:                            SH Options.          (line   6)
+* SH registers:                          SH-Regs.             (line   6)
+* SH support:                            SH-Dependent.        (line   6)
+* SH64 ABI options:                      SH64 Options.        (line  29)
+* SH64 addressing modes:                 SH64-Addressing.     (line   6)
+* SH64 ISA options:                      SH64 Options.        (line   6)
+* SH64 line comment character:           SH64-Chars.          (line   6)
+* SH64 line separator:                   SH64-Chars.          (line   8)
+* SH64 machine directives:               SH64 Directives.     (line   9)
+* SH64 opcode summary:                   SH64 Opcodes.        (line   6)
+* SH64 options:                          SH64 Options.        (line   6)
+* SH64 registers:                        SH64-Regs.           (line   6)
+* SH64 support:                          SH64-Dependent.      (line   6)
+* shigh directive, M32R:                 M32R-Directives.     (line  26)
+* short directive:                       Short.               (line   6)
+* short directive, ARC:                  ARC Directives.      (line 171)
+* short directive, TIC54X:               TIC54X-Directives.   (line 111)
+* SIMD, i386:                            i386-SIMD.           (line   6)
+* SIMD, x86-64:                          i386-SIMD.           (line   6)
+* single character constant:             Chars.               (line   6)
+* single directive:                      Single.              (line   6)
+* single directive, i386:                i386-Float.          (line  14)
+* single directive, x86-64:              i386-Float.          (line  14)
+* single quote, Z80:                     Z80-Chars.           (line  13)
+* sixteen bit integers:                  hword.               (line   6)
+* sixteen byte integer:                  Octa.                (line   6)
+* size directive (COFF version):         Size.                (line  11)
+* size directive (ELF version):          Size.                (line  19)
+* size modifiers, D10V:                  D10V-Size.           (line   6)
+* size modifiers, D30V:                  D30V-Size.           (line   6)
+* size modifiers, M680x0:                M68K-Syntax.         (line   8)
+* size prefixes, i386:                   i386-Prefixes.       (line  27)
+* size suffixes, H8/300:                 H8/300 Opcodes.      (line 163)
+* size, translations, Sparc:             Sparc-Size-Translations.
+                                                              (line   6)
+* sizes operands, i386:                  i386-Syntax.         (line  29)
+* sizes operands, x86-64:                i386-Syntax.         (line  29)
+* skip directive:                        Skip.                (line   6)
+* skip directive, M680x0:                M68K-Directives.     (line  19)
+* skip directive, SPARC:                 Sparc-Directives.    (line  48)
+* sleb128 directive:                     Sleb128.             (line   6)
+* small objects, MIPS ECOFF:             MIPS Object.         (line  11)
+* SmartMIPS instruction generation override: MIPS ASE instruction generation overrides.
+                                                              (line  11)
+* SOM symbol attributes:                 SOM Symbols.         (line   6)
+* source program:                        Input Files.         (line   6)
+* source, destination operands; i386:    i386-Syntax.         (line  22)
+* source, destination operands; x86-64:  i386-Syntax.         (line  22)
+* sp register:                           Xtensa Registers.    (line   6)
+* sp register, V850:                     V850-Regs.           (line  14)
+* space directive:                       Space.               (line   6)
+* space directive, TIC54X:               TIC54X-Directives.   (line 197)
+* space used, maximum for assembly:      statistics.          (line   6)
+* SPARC architectures:                   Sparc-Opts.          (line   6)
+* Sparc constants:                       Sparc-Constants.     (line   6)
+* SPARC data alignment:                  Sparc-Aligned-Data.  (line   6)
+* SPARC floating point (IEEE):           Sparc-Float.         (line   6)
+* Sparc line comment character:          Sparc-Chars.         (line   6)
+* Sparc line separator:                  Sparc-Chars.         (line   8)
+* SPARC machine directives:              Sparc-Directives.    (line   6)
+* SPARC options:                         Sparc-Opts.          (line   6)
+* Sparc registers:                       Sparc-Regs.          (line   6)
+* Sparc relocations:                     Sparc-Relocs.        (line   6)
+* Sparc size translations:               Sparc-Size-Translations.
+                                                              (line   6)
+* SPARC support:                         Sparc-Dependent.     (line   6)
+* SPARC syntax:                          Sparc-Aligned-Data.  (line  21)
+* special characters, ARC:               ARC-Chars.           (line   6)
+* special characters, M680x0:            M68K-Chars.          (line   6)
+* special purpose registers, MSP 430:    MSP430-Regs.         (line  11)
+* sslist directive, TIC54X:              TIC54X-Directives.   (line 204)
+* ssnolist directive, TIC54X:            TIC54X-Directives.   (line 204)
+* stabd directive:                       Stab.                (line  38)
+* stabn directive:                       Stab.                (line  48)
+* stabs directive:                       Stab.                (line  51)
+* stabX directives:                      Stab.                (line   6)
+* standard assembler sections:           Secs Background.     (line  27)
+* standard input, as input file:         Command Line.        (line  10)
+* statement separator character:         Statements.          (line   6)
+* statement separator, Alpha:            Alpha-Chars.         (line   8)
+* statement separator, ARM:              ARM-Chars.           (line  10)
+* statement separator, AVR:              AVR-Chars.           (line  10)
+* statement separator, H8/300:           H8/300-Chars.        (line   8)
+* statement separator, IA-64:            IA-64-Chars.         (line   8)
+* statement separator, SH:               SH-Chars.            (line   8)
+* statement separator, SH64:             SH64-Chars.          (line   8)
+* statement separator, Sparc:            Sparc-Chars.         (line   8)
+* statement separator, Z8000:            Z8000-Chars.         (line   8)
+* statements, structure of:              Statements.          (line   6)
+* statistics, about assembly:            statistics.          (line   6)
+* stopping the assembly:                 Abort.               (line   6)
+* string constants:                      Strings.             (line   6)
+* string directive:                      String.              (line   8)
+* string directive on HPPA:              HPPA Directives.     (line 137)
+* string directive, TIC54X:              TIC54X-Directives.   (line 209)
+* string literals:                       Ascii.               (line   6)
+* string, copying to object file:        String.              (line   8)
+* string16 directive:                    String.              (line   8)
+* string16, copying to object file:      String.              (line   8)
+* string32 directive:                    String.              (line   8)
+* string32, copying to object file:      String.              (line   8)
+* string64 directive:                    String.              (line   8)
+* string64, copying to object file:      String.              (line   8)
+* string8 directive:                     String.              (line   8)
+* string8, copying to object file:       String.              (line   8)
+* struct directive:                      Struct.              (line   6)
+* struct directive, TIC54X:              TIC54X-Directives.   (line 217)
+* structure debugging, COFF:             Tag.                 (line   6)
+* sub-instruction ordering, D10V:        D10V-Chars.          (line   6)
+* sub-instruction ordering, D30V:        D30V-Chars.          (line   6)
+* sub-instructions, D10V:                D10V-Subs.           (line   6)
+* sub-instructions, D30V:                D30V-Subs.           (line   6)
+* subexpressions:                        Arguments.           (line  24)
+* subsection directive:                  SubSection.          (line   6)
+* subsym builtins, TIC54X:               TIC54X-Macros.       (line  16)
+* subtitles for listings:                Sbttl.               (line   6)
+* subtraction, permitted arguments:      Infix Ops.           (line  49)
+* summary of options:                    Overview.            (line   6)
+* support:                               HPPA-Dependent.      (line   6)
+* supporting files, including:           Include.             (line   6)
+* suppressing warnings:                  W.                   (line  11)
+* sval:                                  Z8000 Directives.    (line  33)
+* symbol attributes:                     Symbol Attributes.   (line   6)
+* symbol attributes, a.out:              a.out Symbols.       (line   6)
+* symbol attributes, COFF:               COFF Symbols.        (line   6)
+* symbol attributes, SOM:                SOM Symbols.         (line   6)
+* symbol descriptor, COFF:               Desc.                (line   6)
+* symbol modifiers <1>:                  AVR-Modifiers.       (line  12)
+* symbol modifiers <2>:                  LM32-Modifiers.      (line  12)
+* symbol modifiers <3>:                  M32C-Modifiers.      (line  11)
+* symbol modifiers:                      M68HC11-Modifiers.   (line  12)
+* symbol names:                          Symbol Names.        (line   6)
+* symbol names, $ in <1>:                SH-Chars.            (line  10)
+* symbol names, $ in <2>:                SH64-Chars.          (line  10)
+* symbol names, $ in <3>:                D30V-Chars.          (line  63)
+* symbol names, $ in:                    D10V-Chars.          (line  46)
+* symbol names, local:                   Symbol Names.        (line  22)
+* symbol names, temporary:               Symbol Names.        (line  35)
+* symbol storage class (COFF):           Scl.                 (line   6)
+* symbol type:                           Symbol Type.         (line   6)
+* symbol type, COFF:                     Type.                (line  11)
+* symbol type, ELF:                      Type.                (line  22)
+* symbol value:                          Symbol Value.        (line   6)
+* symbol value, setting:                 Set.                 (line   6)
+* symbol values, assigning:              Setting Symbols.     (line   6)
+* symbol versioning:                     Symver.              (line   6)
+* symbol, common:                        Comm.                (line   6)
+* symbol, making visible to linker:      Global.              (line   6)
+* symbolic debuggers, information for:   Stab.                (line   6)
+* symbols:                               Symbols.             (line   6)
+* Symbols in position-independent code, CRIS: CRIS-Pic.       (line   6)
+* symbols with uppercase, VAX/VMS:       VAX-Opts.            (line  42)
+* symbols, assigning values to:          Equ.                 (line   6)
+* Symbols, built-in, CRIS:               CRIS-Symbols.        (line   6)
+* Symbols, CRIS, built-in:               CRIS-Symbols.        (line   6)
+* symbols, local common:                 Lcomm.               (line   6)
+* symver directive:                      Symver.              (line   6)
+* syntax compatibility, i386:            i386-Syntax.         (line   6)
+* syntax compatibility, x86-64:          i386-Syntax.         (line   6)
+* syntax, AVR:                           AVR-Modifiers.       (line   6)
+* syntax, Blackfin:                      Blackfin Syntax.     (line   6)
+* syntax, D10V:                          D10V-Syntax.         (line   6)
+* syntax, D30V:                          D30V-Syntax.         (line   6)
+* syntax, LM32:                          LM32-Modifiers.      (line   6)
+* syntax, M32C:                          M32C-Modifiers.      (line   6)
+* syntax, M680x0:                        M68K-Syntax.         (line   8)
+* syntax, M68HC11 <1>:                   M68HC11-Modifiers.   (line   6)
+* syntax, M68HC11:                       M68HC11-Syntax.      (line   6)
+* syntax, machine-independent:           Syntax.              (line   6)
+* syntax, SPARC:                         Sparc-Aligned-Data.  (line  21)
+* syntax, Xtensa assembler:              Xtensa Syntax.       (line   6)
+* sysproc directive, i960:               Directives-i960.     (line  37)
+* tab (\t):                              Strings.             (line  27)
+* tab directive, TIC54X:                 TIC54X-Directives.   (line 248)
+* tag directive:                         Tag.                 (line   6)
+* tag directive, TIC54X:                 TIC54X-Directives.   (line 251)
+* tdaoff pseudo-op, V850:                V850 Opcodes.        (line  81)
+* temporary symbol names:                Symbol Names.        (line  35)
+* text and data sections, joining:       R.                   (line   6)
+* text directive:                        Text.                (line   6)
+* text section:                          Ld Sections.         (line   9)
+* tfloat directive, i386:                i386-Float.          (line  14)
+* tfloat directive, x86-64:              i386-Float.          (line  14)
+* Thumb support:                         ARM-Dependent.       (line   6)
+* TIC54X builtin math functions:         TIC54X-Builtins.     (line   6)
+* TIC54X machine directives:             TIC54X-Directives.   (line   6)
+* TIC54X memory-mapped registers:        TIC54X-MMRegs.       (line   6)
+* TIC54X options:                        TIC54X-Opts.         (line   6)
+* TIC54X subsym builtins:                TIC54X-Macros.       (line  16)
+* TIC54X support:                        TIC54X-Dependent.    (line   6)
+* TIC54X-specific macros:                TIC54X-Macros.       (line   6)
+* time, total for assembly:              statistics.          (line   6)
+* title directive:                       Title.               (line   6)
+* tp register, V850:                     V850-Regs.           (line  20)
+* transform directive:                   Transform Directive. (line   6)
+* trusted compiler:                      f.                   (line   6)
+* turning preprocessing on and off:      Preprocessing.       (line  26)
+* type directive (COFF version):         Type.                (line  11)
+* type directive (ELF version):          Type.                (line  22)
+* type of a symbol:                      Symbol Type.         (line   6)
+* ualong directive, SH:                  SH Directives.       (line   6)
+* uaword directive, SH:                  SH Directives.       (line   6)
+* ubyte directive, TIC54X:               TIC54X-Directives.   (line  36)
+* uchar directive, TIC54X:               TIC54X-Directives.   (line  36)
+* uhalf directive, TIC54X:               TIC54X-Directives.   (line 111)
+* uint directive, TIC54X:                TIC54X-Directives.   (line 111)
+* uleb128 directive:                     Uleb128.             (line   6)
+* ulong directive, TIC54X:               TIC54X-Directives.   (line 135)
+* undefined section:                     Ld Sections.         (line  36)
+* union directive, TIC54X:               TIC54X-Directives.   (line 251)
+* unsegm:                                Z8000 Directives.    (line  14)
+* usect directive, TIC54X:               TIC54X-Directives.   (line 263)
+* ushort directive, TIC54X:              TIC54X-Directives.   (line 111)
+* uword directive, TIC54X:               TIC54X-Directives.   (line 111)
+* V850 command line options:             V850 Options.        (line   9)
+* V850 floating point (IEEE):            V850 Floating Point. (line   6)
+* V850 line comment character:           V850-Chars.          (line   6)
+* V850 machine directives:               V850 Directives.     (line   6)
+* V850 opcodes:                          V850 Opcodes.        (line   6)
+* V850 options (none):                   V850 Options.        (line   6)
+* V850 register names:                   V850-Regs.           (line   6)
+* V850 support:                          V850-Dependent.      (line   6)
+* val directive:                         Val.                 (line   6)
+* value attribute, COFF:                 Val.                 (line   6)
+* value of a symbol:                     Symbol Value.        (line   6)
+* var directive, TIC54X:                 TIC54X-Directives.   (line 273)
+* VAX bitfields not supported:           VAX-no.              (line   6)
+* VAX branch improvement:                VAX-branch.          (line   6)
+* VAX command-line options ignored:      VAX-Opts.            (line   6)
+* VAX displacement sizing character:     VAX-operands.        (line  12)
+* VAX floating point:                    VAX-float.           (line   6)
+* VAX immediate character:               VAX-operands.        (line   6)
+* VAX indirect character:                VAX-operands.        (line   9)
+* VAX machine directives:                VAX-directives.      (line   6)
+* VAX opcode mnemonics:                  VAX-opcodes.         (line   6)
+* VAX operand notation:                  VAX-operands.        (line   6)
+* VAX register names:                    VAX-operands.        (line  17)
+* VAX support:                           Vax-Dependent.       (line   6)
+* Vax-11 C compatibility:                VAX-Opts.            (line  42)
+* VAX/VMS options:                       VAX-Opts.            (line  42)
+* version directive:                     Version.             (line   6)
+* version directive, TIC54X:             TIC54X-Directives.   (line 277)
+* version of assembler:                  v.                   (line   6)
+* versions of symbols:                   Symver.              (line   6)
+* visibility <1>:                        Internal.            (line   6)
+* visibility <2>:                        Protected.           (line   6)
+* visibility:                            Hidden.              (line   6)
+* VMS (VAX) options:                     VAX-Opts.            (line  42)
+* vtable_entry directive:                VTableEntry.         (line   6)
+* vtable_inherit directive:              VTableInherit.       (line   6)
+* warning directive:                     Warning.             (line   6)
+* warning for altered difference tables: K.                   (line   6)
+* warning messages:                      Errors.              (line   6)
+* warnings, causing error:               W.                   (line  16)
+* warnings, M32R:                        M32R-Warnings.       (line   6)
+* warnings, suppressing:                 W.                   (line  11)
+* warnings, switching on:                W.                   (line  19)
+* weak directive:                        Weak.                (line   6)
+* weakref directive:                     Weakref.             (line   6)
+* whitespace:                            Whitespace.          (line   6)
+* whitespace, removed by preprocessor:   Preprocessing.       (line   7)
+* wide floating point directives, VAX:   VAX-directives.      (line  10)
+* width directive, TIC54X:               TIC54X-Directives.   (line 127)
+* Width of continuation lines of disassembly output: listing. (line  21)
+* Width of first line disassembly output: listing.            (line  16)
+* Width of source line output:           listing.             (line  28)
+* wmsg directive, TIC54X:                TIC54X-Directives.   (line  77)
+* word directive:                        Word.                (line   6)
+* word directive, ARC:                   ARC Directives.      (line 174)
+* word directive, H8/300:                H8/300 Directives.   (line   6)
+* word directive, i386:                  i386-Float.          (line  21)
+* word directive, SPARC:                 Sparc-Directives.    (line  51)
+* word directive, TIC54X:                TIC54X-Directives.   (line 111)
+* word directive, x86-64:                i386-Float.          (line  21)
+* writing patterns in memory:            Fill.                (line   6)
+* wval:                                  Z8000 Directives.    (line  24)
+* x86 machine directives:                i386-Directives.     (line   6)
+* x86-64 arch directive:                 i386-Arch.           (line   6)
+* x86-64 att_syntax pseudo op:           i386-Syntax.         (line   6)
+* x86-64 conversion instructions:        i386-Mnemonics.      (line  36)
+* x86-64 floating point:                 i386-Float.          (line   6)
+* x86-64 immediate operands:             i386-Syntax.         (line  15)
+* x86-64 instruction naming:             i386-Mnemonics.      (line   6)
+* x86-64 intel_syntax pseudo op:         i386-Syntax.         (line   6)
+* x86-64 jump optimization:              i386-Jumps.          (line   6)
+* x86-64 jump, call, return:             i386-Syntax.         (line  38)
+* x86-64 jump/call operands:             i386-Syntax.         (line  15)
+* x86-64 memory references:              i386-Memory.         (line   6)
+* x86-64 options:                        i386-Options.        (line   6)
+* x86-64 register operands:              i386-Syntax.         (line  15)
+* x86-64 registers:                      i386-Regs.           (line   6)
+* x86-64 sections:                       i386-Syntax.         (line  44)
+* x86-64 size suffixes:                  i386-Syntax.         (line  29)
+* x86-64 source, destination operands:   i386-Syntax.         (line  22)
+* x86-64 support:                        i386-Dependent.      (line   6)
+* x86-64 syntax compatibility:           i386-Syntax.         (line   6)
+* xfloat directive, TIC54X:              TIC54X-Directives.   (line  64)
+* xlong directive, TIC54X:               TIC54X-Directives.   (line 135)
+* Xtensa architecture:                   Xtensa-Dependent.    (line   6)
+* Xtensa assembler syntax:               Xtensa Syntax.       (line   6)
+* Xtensa directives:                     Xtensa Directives.   (line   6)
+* Xtensa opcode names:                   Xtensa Opcodes.      (line   6)
+* Xtensa register names:                 Xtensa Registers.    (line   6)
+* xword directive, SPARC:                Sparc-Directives.    (line  55)
+* Z80 $:                                 Z80-Chars.           (line   8)
+* Z80 ':                                 Z80-Chars.           (line  13)
+* Z80 floating point:                    Z80 Floating Point.  (line   6)
+* Z80 line comment character:            Z80-Chars.           (line   6)
+* Z80 options:                           Z80 Options.         (line   6)
+* Z80 registers:                         Z80-Regs.            (line   6)
+* Z80 support:                           Z80-Dependent.       (line   6)
+* Z80 Syntax:                            Z80 Options.         (line  47)
+* Z80, \:                                Z80-Chars.           (line  11)
+* Z80, case sensitivity:                 Z80-Case.            (line   6)
+* Z80-only directives:                   Z80 Directives.      (line   9)
+* Z800 addressing modes:                 Z8000-Addressing.    (line   6)
+* Z8000 directives:                      Z8000 Directives.    (line   6)
+* Z8000 line comment character:          Z8000-Chars.         (line   6)
+* Z8000 line separator:                  Z8000-Chars.         (line   8)
+* Z8000 opcode summary:                  Z8000 Opcodes.       (line   6)
+* Z8000 options:                         Z8000 Options.       (line   6)
+* Z8000 registers:                       Z8000-Regs.          (line   6)
+* Z8000 support:                         Z8000-Dependent.     (line   6)
+* zdaoff pseudo-op, V850:                V850 Opcodes.        (line  99)
+* zero register, V850:                   V850-Regs.           (line   7)
+* zero-terminated strings:               Asciz.               (line   6)
+
+
+
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+Ref: arm_fnstart235576
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+Node: Xtensa Automatic Alignment651043
+Node: Xtensa Relaxation653490
+Node: Xtensa Branch Relaxation654398
+Node: Xtensa Call Relaxation655770
+Node: Xtensa Immediate Relaxation657556
+Node: Xtensa Directives660130
+Node: Schedule Directive661839
+Node: Longcalls Directive662179
+Node: Transform Directive662723
+Node: Literal Directive663465
+Ref: Literal Directive-Footnote-1667004
+Node: Literal Position Directive667146
+Node: Literal Prefix Directive668845
+Node: Absolute Literals Directive669743
+Node: Reporting Bugs671050
+Node: Bug Criteria671776
+Node: Bug Reporting672543
+Node: Acknowledgements679192
+Ref: Acknowledgements-Footnote-1684158
+Node: GNU Free Documentation License684184
+Node: AS Index709353
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/bfd.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/bfd.info
new file mode 100644
index 00000000..002e76f6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/bfd.info
@@ -0,0 +1,11288 @@
+This is bfd.info, produced by makeinfo version 4.13 from ../../../../binutils-2.20/bfd/doc/bfd.texinfo.
+
+START-INFO-DIR-ENTRY
+* Bfd: (bfd).                   The Binary File Descriptor library.
+END-INFO-DIR-ENTRY
+
+   This file documents the BFD library.
+
+   Copyright (C) 1991, 2000, 2001, 2003, 2006, 2007, 2008 Free Software
+Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "GNU General Public License" and "Funding Free
+Software", the Front-Cover texts being (a) (see below), and with the
+Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+File: bfd.info,  Node: Top,  Next: Overview,  Prev: (dir),  Up: (dir)
+
+   This file documents the binary file descriptor library libbfd.
+
+* Menu:
+
+* Overview::			Overview of BFD
+* BFD front end::		BFD front end
+* BFD back ends::		BFD back ends
+* GNU Free Documentation License::  GNU Free Documentation License
+* BFD Index::		BFD Index
+
+
+File: bfd.info,  Node: Overview,  Next: BFD front end,  Prev: Top,  Up: Top
+
+1 Introduction
+**************
+
+BFD is a package which allows applications to use the same routines to
+operate on object files whatever the object file format.  A new object
+file format can be supported simply by creating a new BFD back end and
+adding it to the library.
+
+   BFD is split into two parts: the front end, and the back ends (one
+for each object file format).
+   * The front end of BFD provides the interface to the user. It manages
+     memory and various canonical data structures. The front end also
+     decides which back end to use and when to call back end routines.
+
+   * The back ends provide BFD its view of the real world. Each back
+     end provides a set of calls which the BFD front end can use to
+     maintain its canonical form. The back ends also may keep around
+     information for their own use, for greater efficiency.
+
+* Menu:
+
+* History::			History
+* How It Works::		How It Works
+* What BFD Version 2 Can Do::	What BFD Version 2 Can Do
+
+
+File: bfd.info,  Node: History,  Next: How It Works,  Prev: Overview,  Up: Overview
+
+1.1 History
+===========
+
+One spur behind BFD was the desire, on the part of the GNU 960 team at
+Intel Oregon, for interoperability of applications on their COFF and
+b.out file formats.  Cygnus was providing GNU support for the team, and
+was contracted to provide the required functionality.
+
+   The name came from a conversation David Wallace was having with
+Richard Stallman about the library: RMS said that it would be quite
+hard--David said "BFD".  Stallman was right, but the name stuck.
+
+   At the same time, Ready Systems wanted much the same thing, but for
+different object file formats: IEEE-695, Oasys, Srecords, a.out and 68k
+coff.
+
+   BFD was first implemented by members of Cygnus Support; Steve
+Chamberlain (`sac@cygnus.com'), John Gilmore (`gnu@cygnus.com'), K.
+Richard Pixley (`rich@cygnus.com') and David Henkel-Wallace
+(`gumby@cygnus.com').
+
+
+File: bfd.info,  Node: How It Works,  Next: What BFD Version 2 Can Do,  Prev: History,  Up: Overview
+
+1.2 How To Use BFD
+==================
+
+To use the library, include `bfd.h' and link with `libbfd.a'.
+
+   BFD provides a common interface to the parts of an object file for a
+calling application.
+
+   When an application successfully opens a target file (object,
+archive, or whatever), a pointer to an internal structure is returned.
+This pointer points to a structure called `bfd', described in `bfd.h'.
+Our convention is to call this pointer a BFD, and instances of it
+within code `abfd'.  All operations on the target object file are
+applied as methods to the BFD.  The mapping is defined within `bfd.h'
+in a set of macros, all beginning with `bfd_' to reduce namespace
+pollution.
+
+   For example, this sequence does what you would probably expect:
+return the number of sections in an object file attached to a BFD
+`abfd'.
+
+     #include "bfd.h"
+
+     unsigned int number_of_sections (abfd)
+     bfd *abfd;
+     {
+       return bfd_count_sections (abfd);
+     }
+
+   The abstraction used within BFD is that an object file has:
+
+   * a header,
+
+   * a number of sections containing raw data (*note Sections::),
+
+   * a set of relocations (*note Relocations::), and
+
+   * some symbol information (*note Symbols::).
+   Also, BFDs opened for archives have the additional attribute of an
+index and contain subordinate BFDs. This approach is fine for a.out and
+coff, but loses efficiency when applied to formats such as S-records and
+IEEE-695.
+
+
+File: bfd.info,  Node: What BFD Version 2 Can Do,  Prev: How It Works,  Up: Overview
+
+1.3 What BFD Version 2 Can Do
+=============================
+
+When an object file is opened, BFD subroutines automatically determine
+the format of the input object file.  They then build a descriptor in
+memory with pointers to routines that will be used to access elements of
+the object file's data structures.
+
+   As different information from the object files is required, BFD
+reads from different sections of the file and processes them.  For
+example, a very common operation for the linker is processing symbol
+tables.  Each BFD back end provides a routine for converting between
+the object file's representation of symbols and an internal canonical
+format. When the linker asks for the symbol table of an object file, it
+calls through a memory pointer to the routine from the relevant BFD
+back end which reads and converts the table into a canonical form.  The
+linker then operates upon the canonical form. When the link is finished
+and the linker writes the output file's symbol table, another BFD back
+end routine is called to take the newly created symbol table and
+convert it into the chosen output format.
+
+* Menu:
+
+* BFD information loss::	Information Loss
+* Canonical format::		The BFD	canonical object-file format
+
+
+File: bfd.info,  Node: BFD information loss,  Next: Canonical format,  Up: What BFD Version 2 Can Do
+
+1.3.1 Information Loss
+----------------------
+
+_Information can be lost during output._ The output formats supported
+by BFD do not provide identical facilities, and information which can
+be described in one form has nowhere to go in another format. One
+example of this is alignment information in `b.out'. There is nowhere
+in an `a.out' format file to store alignment information on the
+contained data, so when a file is linked from `b.out' and an `a.out'
+image is produced, alignment information will not propagate to the
+output file. (The linker will still use the alignment information
+internally, so the link is performed correctly).
+
+   Another example is COFF section names. COFF files may contain an
+unlimited number of sections, each one with a textual section name. If
+the target of the link is a format which does not have many sections
+(e.g., `a.out') or has sections without names (e.g., the Oasys format),
+the link cannot be done simply. You can circumvent this problem by
+describing the desired input-to-output section mapping with the linker
+command language.
+
+   _Information can be lost during canonicalization._ The BFD internal
+canonical form of the external formats is not exhaustive; there are
+structures in input formats for which there is no direct representation
+internally.  This means that the BFD back ends cannot maintain all
+possible data richness through the transformation between external to
+internal and back to external formats.
+
+   This limitation is only a problem when an application reads one
+format and writes another.  Each BFD back end is responsible for
+maintaining as much data as possible, and the internal BFD canonical
+form has structures which are opaque to the BFD core, and exported only
+to the back ends. When a file is read in one format, the canonical form
+is generated for BFD and the application. At the same time, the back
+end saves away any information which may otherwise be lost. If the data
+is then written back in the same format, the back end routine will be
+able to use the canonical form provided by the BFD core as well as the
+information it prepared earlier.  Since there is a great deal of
+commonality between back ends, there is no information lost when
+linking or copying big endian COFF to little endian COFF, or `a.out' to
+`b.out'.  When a mixture of formats is linked, the information is only
+lost from the files whose format differs from the destination.
+
+
+File: bfd.info,  Node: Canonical format,  Prev: BFD information loss,  Up: What BFD Version 2 Can Do
+
+1.3.2 The BFD canonical object-file format
+------------------------------------------
+
+The greatest potential for loss of information occurs when there is the
+least overlap between the information provided by the source format,
+that stored by the canonical format, and that needed by the destination
+format. A brief description of the canonical form may help you
+understand which kinds of data you can count on preserving across
+conversions.  
+
+_files_
+     Information stored on a per-file basis includes target machine
+     architecture, particular implementation format type, a demand
+     pageable bit, and a write protected bit.  Information like Unix
+     magic numbers is not stored here--only the magic numbers' meaning,
+     so a `ZMAGIC' file would have both the demand pageable bit and the
+     write protected text bit set.  The byte order of the target is
+     stored on a per-file basis, so that big- and little-endian object
+     files may be used with one another.
+
+_sections_
+     Each section in the input file contains the name of the section,
+     the section's original address in the object file, size and
+     alignment information, various flags, and pointers into other BFD
+     data structures.
+
+_symbols_
+     Each symbol contains a pointer to the information for the object
+     file which originally defined it, its name, its value, and various
+     flag bits.  When a BFD back end reads in a symbol table, it
+     relocates all symbols to make them relative to the base of the
+     section where they were defined.  Doing this ensures that each
+     symbol points to its containing section.  Each symbol also has a
+     varying amount of hidden private data for the BFD back end.  Since
+     the symbol points to the original file, the private data format
+     for that symbol is accessible.  `ld' can operate on a collection
+     of symbols of wildly different formats without problems.
+
+     Normal global and simple local symbols are maintained on output,
+     so an output file (no matter its format) will retain symbols
+     pointing to functions and to global, static, and common variables.
+     Some symbol information is not worth retaining; in `a.out', type
+     information is stored in the symbol table as long symbol names.
+     This information would be useless to most COFF debuggers; the
+     linker has command line switches to allow users to throw it away.
+
+     There is one word of type information within the symbol, so if the
+     format supports symbol type information within symbols (for
+     example, COFF, IEEE, Oasys) and the type is simple enough to fit
+     within one word (nearly everything but aggregates), the
+     information will be preserved.
+
+_relocation level_
+     Each canonical BFD relocation record contains a pointer to the
+     symbol to relocate to, the offset of the data to relocate, the
+     section the data is in, and a pointer to a relocation type
+     descriptor. Relocation is performed by passing messages through
+     the relocation type descriptor and the symbol pointer. Therefore,
+     relocations can be performed on output data using a relocation
+     method that is only available in one of the input formats. For
+     instance, Oasys provides a byte relocation format.  A relocation
+     record requesting this relocation type would point indirectly to a
+     routine to perform this, so the relocation may be performed on a
+     byte being written to a 68k COFF file, even though 68k COFF has no
+     such relocation type.
+
+_line numbers_
+     Object formats can contain, for debugging purposes, some form of
+     mapping between symbols, source line numbers, and addresses in the
+     output file.  These addresses have to be relocated along with the
+     symbol information.  Each symbol with an associated list of line
+     number records points to the first record of the list.  The head
+     of a line number list consists of a pointer to the symbol, which
+     allows finding out the address of the function whose line number
+     is being described. The rest of the list is made up of pairs:
+     offsets into the section and line numbers. Any format which can
+     simply derive this information can pass it successfully between
+     formats (COFF, IEEE and Oasys).
+
+
+File: bfd.info,  Node: BFD front end,  Next: BFD back ends,  Prev: Overview,  Up: Top
+
+2 BFD Front End
+***************
+
+2.1 `typedef bfd'
+=================
+
+A BFD has type `bfd'; objects of this type are the cornerstone of any
+application using BFD. Using BFD consists of making references though
+the BFD and to data in the BFD.
+
+   Here is the structure that defines the type `bfd'.  It contains the
+major data about the file and pointers to the rest of the data.
+
+
+     enum bfd_direction
+       {
+         no_direction = 0,
+         read_direction = 1,
+         write_direction = 2,
+         both_direction = 3
+       };
+
+     struct bfd
+     {
+       /* A unique identifier of the BFD  */
+       unsigned int id;
+
+       /* The filename the application opened the BFD with.  */
+       const char *filename;
+
+       /* A pointer to the target jump table.  */
+       const struct bfd_target *xvec;
+
+       /* The IOSTREAM, and corresponding IO vector that provide access
+          to the file backing the BFD.  */
+       void *iostream;
+       const struct bfd_iovec *iovec;
+
+       /* The caching routines use these to maintain a
+          least-recently-used list of BFDs.  */
+       struct bfd *lru_prev, *lru_next;
+
+       /* When a file is closed by the caching routines, BFD retains
+          state information on the file here...  */
+       ufile_ptr where;
+
+       /* File modified time, if mtime_set is TRUE.  */
+       long mtime;
+
+       /* Reserved for an unimplemented file locking extension.  */
+       int ifd;
+
+       /* The format which belongs to the BFD. (object, core, etc.)  */
+       bfd_format format;
+
+       /* The direction with which the BFD was opened.  */
+       enum bfd_direction direction;
+
+       /* Format_specific flags.  */
+       flagword flags;
+
+       /* Values that may appear in the flags field of a BFD.  These also
+          appear in the object_flags field of the bfd_target structure, where
+          they indicate the set of flags used by that backend (not all flags
+          are meaningful for all object file formats) (FIXME: at the moment,
+          the object_flags values have mostly just been copied from backend
+          to another, and are not necessarily correct).  */
+
+     #define BFD_NO_FLAGS   0x00
+
+       /* BFD contains relocation entries.  */
+     #define HAS_RELOC      0x01
+
+       /* BFD is directly executable.  */
+     #define EXEC_P         0x02
+
+       /* BFD has line number information (basically used for F_LNNO in a
+          COFF header).  */
+     #define HAS_LINENO     0x04
+
+       /* BFD has debugging information.  */
+     #define HAS_DEBUG      0x08
+
+       /* BFD has symbols.  */
+     #define HAS_SYMS       0x10
+
+       /* BFD has local symbols (basically used for F_LSYMS in a COFF
+          header).  */
+     #define HAS_LOCALS     0x20
+
+       /* BFD is a dynamic object.  */
+     #define DYNAMIC        0x40
+
+       /* Text section is write protected (if D_PAGED is not set, this is
+          like an a.out NMAGIC file) (the linker sets this by default, but
+          clears it for -r or -N).  */
+     #define WP_TEXT        0x80
+
+       /* BFD is dynamically paged (this is like an a.out ZMAGIC file) (the
+          linker sets this by default, but clears it for -r or -n or -N).  */
+     #define D_PAGED        0x100
+
+       /* BFD is relaxable (this means that bfd_relax_section may be able to
+          do something) (sometimes bfd_relax_section can do something even if
+          this is not set).  */
+     #define BFD_IS_RELAXABLE 0x200
+
+       /* This may be set before writing out a BFD to request using a
+          traditional format.  For example, this is used to request that when
+          writing out an a.out object the symbols not be hashed to eliminate
+          duplicates.  */
+     #define BFD_TRADITIONAL_FORMAT 0x400
+
+       /* This flag indicates that the BFD contents are actually cached
+          in memory.  If this is set, iostream points to a bfd_in_memory
+          struct.  */
+     #define BFD_IN_MEMORY 0x800
+
+       /* The sections in this BFD specify a memory page.  */
+     #define HAS_LOAD_PAGE 0x1000
+
+       /* This BFD has been created by the linker and doesn't correspond
+          to any input file.  */
+     #define BFD_LINKER_CREATED 0x2000
+
+       /* This may be set before writing out a BFD to request that it
+          be written using values for UIDs, GIDs, timestamps, etc. that
+          will be consistent from run to run.  */
+     #define BFD_DETERMINISTIC_OUTPUT 0x4000
+
+       /* Currently my_archive is tested before adding origin to
+          anything. I believe that this can become always an add of
+          origin, with origin set to 0 for non archive files.  */
+       ufile_ptr origin;
+
+       /* The origin in the archive of the proxy entry.  This will
+          normally be the same as origin, except for thin archives,
+          when it will contain the current offset of the proxy in the
+          thin archive rather than the offset of the bfd in its actual
+          container.  */
+       ufile_ptr proxy_origin;
+
+       /* A hash table for section names.  */
+       struct bfd_hash_table section_htab;
+
+       /* Pointer to linked list of sections.  */
+       struct bfd_section *sections;
+
+       /* The last section on the section list.  */
+       struct bfd_section *section_last;
+
+       /* The number of sections.  */
+       unsigned int section_count;
+
+       /* Stuff only useful for object files:
+          The start address.  */
+       bfd_vma start_address;
+
+       /* Used for input and output.  */
+       unsigned int symcount;
+
+       /* Symbol table for output BFD (with symcount entries).
+          Also used by the linker to cache input BFD symbols.  */
+       struct bfd_symbol  **outsymbols;
+
+       /* Used for slurped dynamic symbol tables.  */
+       unsigned int dynsymcount;
+
+       /* Pointer to structure which contains architecture information.  */
+       const struct bfd_arch_info *arch_info;
+
+       /* Stuff only useful for archives.  */
+       void *arelt_data;
+       struct bfd *my_archive;      /* The containing archive BFD.  */
+       struct bfd *archive_next;    /* The next BFD in the archive.  */
+       struct bfd *archive_head;    /* The first BFD in the archive.  */
+       struct bfd *nested_archives; /* List of nested archive in a flattened
+                                       thin archive.  */
+
+       /* A chain of BFD structures involved in a link.  */
+       struct bfd *link_next;
+
+       /* A field used by _bfd_generic_link_add_archive_symbols.  This will
+          be used only for archive elements.  */
+       int archive_pass;
+
+       /* Used by the back end to hold private data.  */
+       union
+         {
+           struct aout_data_struct *aout_data;
+           struct artdata *aout_ar_data;
+           struct _oasys_data *oasys_obj_data;
+           struct _oasys_ar_data *oasys_ar_data;
+           struct coff_tdata *coff_obj_data;
+           struct pe_tdata *pe_obj_data;
+           struct xcoff_tdata *xcoff_obj_data;
+           struct ecoff_tdata *ecoff_obj_data;
+           struct ieee_data_struct *ieee_data;
+           struct ieee_ar_data_struct *ieee_ar_data;
+           struct srec_data_struct *srec_data;
+           struct verilog_data_struct *verilog_data;
+           struct ihex_data_struct *ihex_data;
+           struct tekhex_data_struct *tekhex_data;
+           struct elf_obj_tdata *elf_obj_data;
+           struct nlm_obj_tdata *nlm_obj_data;
+           struct bout_data_struct *bout_data;
+           struct mmo_data_struct *mmo_data;
+           struct sun_core_struct *sun_core_data;
+           struct sco5_core_struct *sco5_core_data;
+           struct trad_core_struct *trad_core_data;
+           struct som_data_struct *som_data;
+           struct hpux_core_struct *hpux_core_data;
+           struct hppabsd_core_struct *hppabsd_core_data;
+           struct sgi_core_struct *sgi_core_data;
+           struct lynx_core_struct *lynx_core_data;
+           struct osf_core_struct *osf_core_data;
+           struct cisco_core_struct *cisco_core_data;
+           struct versados_data_struct *versados_data;
+           struct netbsd_core_struct *netbsd_core_data;
+           struct mach_o_data_struct *mach_o_data;
+           struct mach_o_fat_data_struct *mach_o_fat_data;
+           struct plugin_data_struct *plugin_data;
+           struct bfd_pef_data_struct *pef_data;
+           struct bfd_pef_xlib_data_struct *pef_xlib_data;
+           struct bfd_sym_data_struct *sym_data;
+           void *any;
+         }
+       tdata;
+
+       /* Used by the application to hold private data.  */
+       void *usrdata;
+
+       /* Where all the allocated stuff under this BFD goes.  This is a
+          struct objalloc *, but we use void * to avoid requiring the inclusion
+          of objalloc.h.  */
+       void *memory;
+
+       /* Is the file descriptor being cached?  That is, can it be closed as
+          needed, and re-opened when accessed later?  */
+       unsigned int cacheable : 1;
+
+       /* Marks whether there was a default target specified when the
+          BFD was opened. This is used to select which matching algorithm
+          to use to choose the back end.  */
+       unsigned int target_defaulted : 1;
+
+       /* ... and here: (``once'' means at least once).  */
+       unsigned int opened_once : 1;
+
+       /* Set if we have a locally maintained mtime value, rather than
+          getting it from the file each time.  */
+       unsigned int mtime_set : 1;
+
+       /* Flag set if symbols from this BFD should not be exported.  */
+       unsigned int no_export : 1;
+
+       /* Remember when output has begun, to stop strange things
+          from happening.  */
+       unsigned int output_has_begun : 1;
+
+       /* Have archive map.  */
+       unsigned int has_armap : 1;
+
+       /* Set if this is a thin archive.  */
+       unsigned int is_thin_archive : 1;
+     };
+
+2.2 Error reporting
+===================
+
+Most BFD functions return nonzero on success (check their individual
+documentation for precise semantics).  On an error, they call
+`bfd_set_error' to set an error condition that callers can check by
+calling `bfd_get_error'.  If that returns `bfd_error_system_call', then
+check `errno'.
+
+   The easiest way to report a BFD error to the user is to use
+`bfd_perror'.
+
+2.2.1 Type `bfd_error_type'
+---------------------------
+
+The values returned by `bfd_get_error' are defined by the enumerated
+type `bfd_error_type'.
+
+
+     typedef enum bfd_error
+     {
+       bfd_error_no_error = 0,
+       bfd_error_system_call,
+       bfd_error_invalid_target,
+       bfd_error_wrong_format,
+       bfd_error_wrong_object_format,
+       bfd_error_invalid_operation,
+       bfd_error_no_memory,
+       bfd_error_no_symbols,
+       bfd_error_no_armap,
+       bfd_error_no_more_archived_files,
+       bfd_error_malformed_archive,
+       bfd_error_file_not_recognized,
+       bfd_error_file_ambiguously_recognized,
+       bfd_error_no_contents,
+       bfd_error_nonrepresentable_section,
+       bfd_error_no_debug_section,
+       bfd_error_bad_value,
+       bfd_error_file_truncated,
+       bfd_error_file_too_big,
+       bfd_error_on_input,
+       bfd_error_invalid_error_code
+     }
+     bfd_error_type;
+   
+2.2.1.1 `bfd_get_error'
+.......................
+
+*Synopsis*
+     bfd_error_type bfd_get_error (void);
+   *Description*
+Return the current BFD error condition.
+
+2.2.1.2 `bfd_set_error'
+.......................
+
+*Synopsis*
+     void bfd_set_error (bfd_error_type error_tag, ...);
+   *Description*
+Set the BFD error condition to be ERROR_TAG.  If ERROR_TAG is
+bfd_error_on_input, then this function takes two more parameters, the
+input bfd where the error occurred, and the bfd_error_type error.
+
+2.2.1.3 `bfd_errmsg'
+....................
+
+*Synopsis*
+     const char *bfd_errmsg (bfd_error_type error_tag);
+   *Description*
+Return a string describing the error ERROR_TAG, or the system error if
+ERROR_TAG is `bfd_error_system_call'.
+
+2.2.1.4 `bfd_perror'
+....................
+
+*Synopsis*
+     void bfd_perror (const char *message);
+   *Description*
+Print to the standard error stream a string describing the last BFD
+error that occurred, or the last system error if the last BFD error was
+a system call failure.  If MESSAGE is non-NULL and non-empty, the error
+string printed is preceded by MESSAGE, a colon, and a space.  It is
+followed by a newline.
+
+2.2.2 BFD error handler
+-----------------------
+
+Some BFD functions want to print messages describing the problem.  They
+call a BFD error handler function.  This function may be overridden by
+the program.
+
+   The BFD error handler acts like printf.
+
+
+     typedef void (*bfd_error_handler_type) (const char *, ...);
+   
+2.2.2.1 `bfd_set_error_handler'
+...............................
+
+*Synopsis*
+     bfd_error_handler_type bfd_set_error_handler (bfd_error_handler_type);
+   *Description*
+Set the BFD error handler function.  Returns the previous function.
+
+2.2.2.2 `bfd_set_error_program_name'
+....................................
+
+*Synopsis*
+     void bfd_set_error_program_name (const char *);
+   *Description*
+Set the program name to use when printing a BFD error.  This is printed
+before the error message followed by a colon and space.  The string
+must not be changed after it is passed to this function.
+
+2.2.2.3 `bfd_get_error_handler'
+...............................
+
+*Synopsis*
+     bfd_error_handler_type bfd_get_error_handler (void);
+   *Description*
+Return the BFD error handler function.
+
+2.3 Miscellaneous
+=================
+
+2.3.1 Miscellaneous functions
+-----------------------------
+
+2.3.1.1 `bfd_get_reloc_upper_bound'
+...................................
+
+*Synopsis*
+     long bfd_get_reloc_upper_bound (bfd *abfd, asection *sect);
+   *Description*
+Return the number of bytes required to store the relocation information
+associated with section SECT attached to bfd ABFD.  If an error occurs,
+return -1.
+
+2.3.1.2 `bfd_canonicalize_reloc'
+................................
+
+*Synopsis*
+     long bfd_canonicalize_reloc
+        (bfd *abfd, asection *sec, arelent **loc, asymbol **syms);
+   *Description*
+Call the back end associated with the open BFD ABFD and translate the
+external form of the relocation information attached to SEC into the
+internal canonical form.  Place the table into memory at LOC, which has
+been preallocated, usually by a call to `bfd_get_reloc_upper_bound'.
+Returns the number of relocs, or -1 on error.
+
+   The SYMS table is also needed for horrible internal magic reasons.
+
+2.3.1.3 `bfd_set_reloc'
+.......................
+
+*Synopsis*
+     void bfd_set_reloc
+        (bfd *abfd, asection *sec, arelent **rel, unsigned int count);
+   *Description*
+Set the relocation pointer and count within section SEC to the values
+REL and COUNT.  The argument ABFD is ignored.
+
+2.3.1.4 `bfd_set_file_flags'
+............................
+
+*Synopsis*
+     bfd_boolean bfd_set_file_flags (bfd *abfd, flagword flags);
+   *Description*
+Set the flag word in the BFD ABFD to the value FLAGS.
+
+   Possible errors are:
+   * `bfd_error_wrong_format' - The target bfd was not of object format.
+
+   * `bfd_error_invalid_operation' - The target bfd was open for
+     reading.
+
+   * `bfd_error_invalid_operation' - The flag word contained a bit
+     which was not applicable to the type of file.  E.g., an attempt
+     was made to set the `D_PAGED' bit on a BFD format which does not
+     support demand paging.
+
+2.3.1.5 `bfd_get_arch_size'
+...........................
+
+*Synopsis*
+     int bfd_get_arch_size (bfd *abfd);
+   *Description*
+Returns the architecture address size, in bits, as determined by the
+object file's format.  For ELF, this information is included in the
+header.
+
+   *Returns*
+Returns the arch size in bits if known, `-1' otherwise.
+
+2.3.1.6 `bfd_get_sign_extend_vma'
+.................................
+
+*Synopsis*
+     int bfd_get_sign_extend_vma (bfd *abfd);
+   *Description*
+Indicates if the target architecture "naturally" sign extends an
+address.  Some architectures implicitly sign extend address values when
+they are converted to types larger than the size of an address.  For
+instance, bfd_get_start_address() will return an address sign extended
+to fill a bfd_vma when this is the case.
+
+   *Returns*
+Returns `1' if the target architecture is known to sign extend
+addresses, `0' if the target architecture is known to not sign extend
+addresses, and `-1' otherwise.
+
+2.3.1.7 `bfd_set_start_address'
+...............................
+
+*Synopsis*
+     bfd_boolean bfd_set_start_address (bfd *abfd, bfd_vma vma);
+   *Description*
+Make VMA the entry point of output BFD ABFD.
+
+   *Returns*
+Returns `TRUE' on success, `FALSE' otherwise.
+
+2.3.1.8 `bfd_get_gp_size'
+.........................
+
+*Synopsis*
+     unsigned int bfd_get_gp_size (bfd *abfd);
+   *Description*
+Return the maximum size of objects to be optimized using the GP
+register under MIPS ECOFF.  This is typically set by the `-G' argument
+to the compiler, assembler or linker.
+
+2.3.1.9 `bfd_set_gp_size'
+.........................
+
+*Synopsis*
+     void bfd_set_gp_size (bfd *abfd, unsigned int i);
+   *Description*
+Set the maximum size of objects to be optimized using the GP register
+under ECOFF or MIPS ELF.  This is typically set by the `-G' argument to
+the compiler, assembler or linker.
+
+2.3.1.10 `bfd_scan_vma'
+.......................
+
+*Synopsis*
+     bfd_vma bfd_scan_vma (const char *string, const char **end, int base);
+   *Description*
+Convert, like `strtoul', a numerical expression STRING into a `bfd_vma'
+integer, and return that integer.  (Though without as many bells and
+whistles as `strtoul'.)  The expression is assumed to be unsigned
+(i.e., positive).  If given a BASE, it is used as the base for
+conversion.  A base of 0 causes the function to interpret the string in
+hex if a leading "0x" or "0X" is found, otherwise in octal if a leading
+zero is found, otherwise in decimal.
+
+   If the value would overflow, the maximum `bfd_vma' value is returned.
+
+2.3.1.11 `bfd_copy_private_header_data'
+.......................................
+
+*Synopsis*
+     bfd_boolean bfd_copy_private_header_data (bfd *ibfd, bfd *obfd);
+   *Description*
+Copy private BFD header information from the BFD IBFD to the the BFD
+OBFD.  This copies information that may require sections to exist, but
+does not require symbol tables.  Return `true' on success, `false' on
+error.  Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OBFD.
+
+     #define bfd_copy_private_header_data(ibfd, obfd) \
+          BFD_SEND (obfd, _bfd_copy_private_header_data, \
+                    (ibfd, obfd))
+
+2.3.1.12 `bfd_copy_private_bfd_data'
+....................................
+
+*Synopsis*
+     bfd_boolean bfd_copy_private_bfd_data (bfd *ibfd, bfd *obfd);
+   *Description*
+Copy private BFD information from the BFD IBFD to the the BFD OBFD.
+Return `TRUE' on success, `FALSE' on error.  Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OBFD.
+
+     #define bfd_copy_private_bfd_data(ibfd, obfd) \
+          BFD_SEND (obfd, _bfd_copy_private_bfd_data, \
+                    (ibfd, obfd))
+
+2.3.1.13 `bfd_merge_private_bfd_data'
+.....................................
+
+*Synopsis*
+     bfd_boolean bfd_merge_private_bfd_data (bfd *ibfd, bfd *obfd);
+   *Description*
+Merge private BFD information from the BFD IBFD to the the output file
+BFD OBFD when linking.  Return `TRUE' on success, `FALSE' on error.
+Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OBFD.
+
+     #define bfd_merge_private_bfd_data(ibfd, obfd) \
+          BFD_SEND (obfd, _bfd_merge_private_bfd_data, \
+                    (ibfd, obfd))
+
+2.3.1.14 `bfd_set_private_flags'
+................................
+
+*Synopsis*
+     bfd_boolean bfd_set_private_flags (bfd *abfd, flagword flags);
+   *Description*
+Set private BFD flag information in the BFD ABFD.  Return `TRUE' on
+success, `FALSE' on error.  Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OBFD.
+
+     #define bfd_set_private_flags(abfd, flags) \
+          BFD_SEND (abfd, _bfd_set_private_flags, (abfd, flags))
+
+2.3.1.15 `Other functions'
+..........................
+
+*Description*
+The following functions exist but have not yet been documented.
+     #define bfd_sizeof_headers(abfd, info) \
+            BFD_SEND (abfd, _bfd_sizeof_headers, (abfd, info))
+
+     #define bfd_find_nearest_line(abfd, sec, syms, off, file, func, line) \
+            BFD_SEND (abfd, _bfd_find_nearest_line, \
+                      (abfd, sec, syms, off, file, func, line))
+
+     #define bfd_find_line(abfd, syms, sym, file, line) \
+            BFD_SEND (abfd, _bfd_find_line, \
+                      (abfd, syms, sym, file, line))
+
+     #define bfd_find_inliner_info(abfd, file, func, line) \
+            BFD_SEND (abfd, _bfd_find_inliner_info, \
+                      (abfd, file, func, line))
+
+     #define bfd_debug_info_start(abfd) \
+            BFD_SEND (abfd, _bfd_debug_info_start, (abfd))
+
+     #define bfd_debug_info_end(abfd) \
+            BFD_SEND (abfd, _bfd_debug_info_end, (abfd))
+
+     #define bfd_debug_info_accumulate(abfd, section) \
+            BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
+
+     #define bfd_stat_arch_elt(abfd, stat) \
+            BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
+
+     #define bfd_update_armap_timestamp(abfd) \
+            BFD_SEND (abfd, _bfd_update_armap_timestamp, (abfd))
+
+     #define bfd_set_arch_mach(abfd, arch, mach)\
+            BFD_SEND ( abfd, _bfd_set_arch_mach, (abfd, arch, mach))
+
+     #define bfd_relax_section(abfd, section, link_info, again) \
+            BFD_SEND (abfd, _bfd_relax_section, (abfd, section, link_info, again))
+
+     #define bfd_gc_sections(abfd, link_info) \
+            BFD_SEND (abfd, _bfd_gc_sections, (abfd, link_info))
+
+     #define bfd_merge_sections(abfd, link_info) \
+            BFD_SEND (abfd, _bfd_merge_sections, (abfd, link_info))
+
+     #define bfd_is_group_section(abfd, sec) \
+            BFD_SEND (abfd, _bfd_is_group_section, (abfd, sec))
+
+     #define bfd_discard_group(abfd, sec) \
+            BFD_SEND (abfd, _bfd_discard_group, (abfd, sec))
+
+     #define bfd_link_hash_table_create(abfd) \
+            BFD_SEND (abfd, _bfd_link_hash_table_create, (abfd))
+
+     #define bfd_link_hash_table_free(abfd, hash) \
+            BFD_SEND (abfd, _bfd_link_hash_table_free, (hash))
+
+     #define bfd_link_add_symbols(abfd, info) \
+            BFD_SEND (abfd, _bfd_link_add_symbols, (abfd, info))
+
+     #define bfd_link_just_syms(abfd, sec, info) \
+            BFD_SEND (abfd, _bfd_link_just_syms, (sec, info))
+
+     #define bfd_final_link(abfd, info) \
+            BFD_SEND (abfd, _bfd_final_link, (abfd, info))
+
+     #define bfd_free_cached_info(abfd) \
+            BFD_SEND (abfd, _bfd_free_cached_info, (abfd))
+
+     #define bfd_get_dynamic_symtab_upper_bound(abfd) \
+            BFD_SEND (abfd, _bfd_get_dynamic_symtab_upper_bound, (abfd))
+
+     #define bfd_print_private_bfd_data(abfd, file)\
+            BFD_SEND (abfd, _bfd_print_private_bfd_data, (abfd, file))
+
+     #define bfd_canonicalize_dynamic_symtab(abfd, asymbols) \
+            BFD_SEND (abfd, _bfd_canonicalize_dynamic_symtab, (abfd, asymbols))
+
+     #define bfd_get_synthetic_symtab(abfd, count, syms, dyncount, dynsyms, ret) \
+            BFD_SEND (abfd, _bfd_get_synthetic_symtab, (abfd, count, syms, \
+                                                        dyncount, dynsyms, ret))
+
+     #define bfd_get_dynamic_reloc_upper_bound(abfd) \
+            BFD_SEND (abfd, _bfd_get_dynamic_reloc_upper_bound, (abfd))
+
+     #define bfd_canonicalize_dynamic_reloc(abfd, arels, asyms) \
+            BFD_SEND (abfd, _bfd_canonicalize_dynamic_reloc, (abfd, arels, asyms))
+
+     extern bfd_byte *bfd_get_relocated_section_contents
+       (bfd *, struct bfd_link_info *, struct bfd_link_order *, bfd_byte *,
+        bfd_boolean, asymbol **);
+
+2.3.1.16 `bfd_alt_mach_code'
+............................
+
+*Synopsis*
+     bfd_boolean bfd_alt_mach_code (bfd *abfd, int alternative);
+   *Description*
+When more than one machine code number is available for the same
+machine type, this function can be used to switch between the preferred
+one (alternative == 0) and any others.  Currently, only ELF supports
+this feature, with up to two alternate machine codes.
+
+     struct bfd_preserve
+     {
+       void *marker;
+       void *tdata;
+       flagword flags;
+       const struct bfd_arch_info *arch_info;
+       struct bfd_section *sections;
+       struct bfd_section *section_last;
+       unsigned int section_count;
+       struct bfd_hash_table section_htab;
+     };
+   
+2.3.1.17 `bfd_preserve_save'
+............................
+
+*Synopsis*
+     bfd_boolean bfd_preserve_save (bfd *, struct bfd_preserve *);
+   *Description*
+When testing an object for compatibility with a particular target
+back-end, the back-end object_p function needs to set up certain fields
+in the bfd on successfully recognizing the object.  This typically
+happens in a piecemeal fashion, with failures possible at many points.
+On failure, the bfd is supposed to be restored to its initial state,
+which is virtually impossible.  However, restoring a subset of the bfd
+state works in practice.  This function stores the subset and
+reinitializes the bfd.
+
+2.3.1.18 `bfd_preserve_restore'
+...............................
+
+*Synopsis*
+     void bfd_preserve_restore (bfd *, struct bfd_preserve *);
+   *Description*
+This function restores bfd state saved by bfd_preserve_save.  If MARKER
+is non-NULL in struct bfd_preserve then that block and all subsequently
+bfd_alloc'd memory is freed.
+
+2.3.1.19 `bfd_preserve_finish'
+..............................
+
+*Synopsis*
+     void bfd_preserve_finish (bfd *, struct bfd_preserve *);
+   *Description*
+This function should be called when the bfd state saved by
+bfd_preserve_save is no longer needed.  ie. when the back-end object_p
+function returns with success.
+
+2.3.1.20 `bfd_emul_get_maxpagesize'
+...................................
+
+*Synopsis*
+     bfd_vma bfd_emul_get_maxpagesize (const char *);
+   *Description*
+Returns the maximum page size, in bytes, as determined by emulation.
+
+   *Returns*
+Returns the maximum page size in bytes for ELF, 0 otherwise.
+
+2.3.1.21 `bfd_emul_set_maxpagesize'
+...................................
+
+*Synopsis*
+     void bfd_emul_set_maxpagesize (const char *, bfd_vma);
+   *Description*
+For ELF, set the maximum page size for the emulation.  It is a no-op
+for other formats.
+
+2.3.1.22 `bfd_emul_get_commonpagesize'
+......................................
+
+*Synopsis*
+     bfd_vma bfd_emul_get_commonpagesize (const char *);
+   *Description*
+Returns the common page size, in bytes, as determined by emulation.
+
+   *Returns*
+Returns the common page size in bytes for ELF, 0 otherwise.
+
+2.3.1.23 `bfd_emul_set_commonpagesize'
+......................................
+
+*Synopsis*
+     void bfd_emul_set_commonpagesize (const char *, bfd_vma);
+   *Description*
+For ELF, set the common page size for the emulation.  It is a no-op for
+other formats.
+
+2.3.1.24 `bfd_demangle'
+.......................
+
+*Synopsis*
+     char *bfd_demangle (bfd *, const char *, int);
+   *Description*
+Wrapper around cplus_demangle.  Strips leading underscores and other
+such chars that would otherwise confuse the demangler.  If passed a g++
+v3 ABI mangled name, returns a buffer allocated with malloc holding the
+demangled name.  Returns NULL otherwise and on memory alloc failure.
+
+2.3.1.25 `struct bfd_iovec'
+...........................
+
+*Description*
+The `struct bfd_iovec' contains the internal file I/O class.  Each
+`BFD' has an instance of this class and all file I/O is routed through
+it (it is assumed that the instance implements all methods listed
+below).
+     struct bfd_iovec
+     {
+       /* To avoid problems with macros, a "b" rather than "f"
+          prefix is prepended to each method name.  */
+       /* Attempt to read/write NBYTES on ABFD's IOSTREAM storing/fetching
+          bytes starting at PTR.  Return the number of bytes actually
+          transfered (a read past end-of-file returns less than NBYTES),
+          or -1 (setting `bfd_error') if an error occurs.  */
+       file_ptr (*bread) (struct bfd *abfd, void *ptr, file_ptr nbytes);
+       file_ptr (*bwrite) (struct bfd *abfd, const void *ptr,
+                           file_ptr nbytes);
+       /* Return the current IOSTREAM file offset, or -1 (setting `bfd_error'
+          if an error occurs.  */
+       file_ptr (*btell) (struct bfd *abfd);
+       /* For the following, on successful completion a value of 0 is returned.
+          Otherwise, a value of -1 is returned (and  `bfd_error' is set).  */
+       int (*bseek) (struct bfd *abfd, file_ptr offset, int whence);
+       int (*bclose) (struct bfd *abfd);
+       int (*bflush) (struct bfd *abfd);
+       int (*bstat) (struct bfd *abfd, struct stat *sb);
+       /* Just like mmap: (void*)-1 on failure, mmapped address on success.  */
+       void *(*bmmap) (struct bfd *abfd, void *addr, bfd_size_type len,
+                       int prot, int flags, file_ptr offset);
+     };
+
+2.3.1.26 `bfd_get_mtime'
+........................
+
+*Synopsis*
+     long bfd_get_mtime (bfd *abfd);
+   *Description*
+Return the file modification time (as read from the file system, or
+from the archive header for archive members).
+
+2.3.1.27 `bfd_get_size'
+.......................
+
+*Synopsis*
+     file_ptr bfd_get_size (bfd *abfd);
+   *Description*
+Return the file size (as read from file system) for the file associated
+with BFD ABFD.
+
+   The initial motivation for, and use of, this routine is not so we
+can get the exact size of the object the BFD applies to, since that
+might not be generally possible (archive members for example).  It
+would be ideal if someone could eventually modify it so that such
+results were guaranteed.
+
+   Instead, we want to ask questions like "is this NNN byte sized
+object I'm about to try read from file offset YYY reasonable?"  As as
+example of where we might do this, some object formats use string
+tables for which the first `sizeof (long)' bytes of the table contain
+the size of the table itself, including the size bytes.  If an
+application tries to read what it thinks is one of these string tables,
+without some way to validate the size, and for some reason the size is
+wrong (byte swapping error, wrong location for the string table, etc.),
+the only clue is likely to be a read error when it tries to read the
+table, or a "virtual memory exhausted" error when it tries to allocate
+15 bazillon bytes of space for the 15 bazillon byte table it is about
+to read.  This function at least allows us to answer the question, "is
+the size reasonable?".
+
+2.3.1.28 `bfd_mmap'
+...................
+
+*Synopsis*
+     void *bfd_mmap (bfd *abfd, void *addr, bfd_size_type len,
+         int prot, int flags, file_ptr offset);
+   *Description*
+Return mmap()ed region of the file, if possible and implemented.
+
+* Menu:
+
+* Memory Usage::
+* Initialization::
+* Sections::
+* Symbols::
+* Archives::
+* Formats::
+* Relocations::
+* Core Files::
+* Targets::
+* Architectures::
+* Opening and Closing::
+* Internal::
+* File Caching::
+* Linker Functions::
+* Hash Tables::
+
+
+File: bfd.info,  Node: Memory Usage,  Next: Initialization,  Prev: BFD front end,  Up: BFD front end
+
+2.4 Memory Usage
+================
+
+BFD keeps all of its internal structures in obstacks. There is one
+obstack per open BFD file, into which the current state is stored. When
+a BFD is closed, the obstack is deleted, and so everything which has
+been allocated by BFD for the closing file is thrown away.
+
+   BFD does not free anything created by an application, but pointers
+into `bfd' structures become invalid on a `bfd_close'; for example,
+after a `bfd_close' the vector passed to `bfd_canonicalize_symtab' is
+still around, since it has been allocated by the application, but the
+data that it pointed to are lost.
+
+   The general rule is to not close a BFD until all operations dependent
+upon data from the BFD have been completed, or all the data from within
+the file has been copied. To help with the management of memory, there
+is a function (`bfd_alloc_size') which returns the number of bytes in
+obstacks associated with the supplied BFD. This could be used to select
+the greediest open BFD, close it to reclaim the memory, perform some
+operation and reopen the BFD again, to get a fresh copy of the data
+structures.
+
+
+File: bfd.info,  Node: Initialization,  Next: Sections,  Prev: Memory Usage,  Up: BFD front end
+
+2.5 Initialization
+==================
+
+2.5.1 Initialization functions
+------------------------------
+
+These are the functions that handle initializing a BFD.
+
+2.5.1.1 `bfd_init'
+..................
+
+*Synopsis*
+     void bfd_init (void);
+   *Description*
+This routine must be called before any other BFD function to initialize
+magical internal data structures.
+
+
+File: bfd.info,  Node: Sections,  Next: Symbols,  Prev: Initialization,  Up: BFD front end
+
+2.6 Sections
+============
+
+The raw data contained within a BFD is maintained through the section
+abstraction.  A single BFD may have any number of sections.  It keeps
+hold of them by pointing to the first; each one points to the next in
+the list.
+
+   Sections are supported in BFD in `section.c'.
+
+* Menu:
+
+* Section Input::
+* Section Output::
+* typedef asection::
+* section prototypes::
+
+
+File: bfd.info,  Node: Section Input,  Next: Section Output,  Prev: Sections,  Up: Sections
+
+2.6.1 Section input
+-------------------
+
+When a BFD is opened for reading, the section structures are created
+and attached to the BFD.
+
+   Each section has a name which describes the section in the outside
+world--for example, `a.out' would contain at least three sections,
+called `.text', `.data' and `.bss'.
+
+   Names need not be unique; for example a COFF file may have several
+sections named `.data'.
+
+   Sometimes a BFD will contain more than the "natural" number of
+sections. A back end may attach other sections containing constructor
+data, or an application may add a section (using `bfd_make_section') to
+the sections attached to an already open BFD. For example, the linker
+creates an extra section `COMMON' for each input file's BFD to hold
+information about common storage.
+
+   The raw data is not necessarily read in when the section descriptor
+is created. Some targets may leave the data in place until a
+`bfd_get_section_contents' call is made. Other back ends may read in
+all the data at once.  For example, an S-record file has to be read
+once to determine the size of the data. An IEEE-695 file doesn't
+contain raw data in sections, but data and relocation expressions
+intermixed, so the data area has to be parsed to get out the data and
+relocations.
+
+
+File: bfd.info,  Node: Section Output,  Next: typedef asection,  Prev: Section Input,  Up: Sections
+
+2.6.2 Section output
+--------------------
+
+To write a new object style BFD, the various sections to be written
+have to be created. They are attached to the BFD in the same way as
+input sections; data is written to the sections using
+`bfd_set_section_contents'.
+
+   Any program that creates or combines sections (e.g., the assembler
+and linker) must use the `asection' fields `output_section' and
+`output_offset' to indicate the file sections to which each section
+must be written.  (If the section is being created from scratch,
+`output_section' should probably point to the section itself and
+`output_offset' should probably be zero.)
+
+   The data to be written comes from input sections attached (via
+`output_section' pointers) to the output sections.  The output section
+structure can be considered a filter for the input section: the output
+section determines the vma of the output data and the name, but the
+input section determines the offset into the output section of the data
+to be written.
+
+   E.g., to create a section "O", starting at 0x100, 0x123 long,
+containing two subsections, "A" at offset 0x0 (i.e., at vma 0x100) and
+"B" at offset 0x20 (i.e., at vma 0x120) the `asection' structures would
+look like:
+
+        section name          "A"
+          output_offset   0x00
+          size            0x20
+          output_section ----------->  section name    "O"
+                                  |    vma             0x100
+        section name          "B" |    size            0x123
+          output_offset   0x20    |
+          size            0x103   |
+          output_section  --------|
+
+2.6.3 Link orders
+-----------------
+
+The data within a section is stored in a "link_order".  These are much
+like the fixups in `gas'.  The link_order abstraction allows a section
+to grow and shrink within itself.
+
+   A link_order knows how big it is, and which is the next link_order
+and where the raw data for it is; it also points to a list of
+relocations which apply to it.
+
+   The link_order is used by the linker to perform relaxing on final
+code.  The compiler creates code which is as big as necessary to make
+it work without relaxing, and the user can select whether to relax.
+Sometimes relaxing takes a lot of time.  The linker runs around the
+relocations to see if any are attached to data which can be shrunk, if
+so it does it on a link_order by link_order basis.
+
+
+File: bfd.info,  Node: typedef asection,  Next: section prototypes,  Prev: Section Output,  Up: Sections
+
+2.6.4 typedef asection
+----------------------
+
+Here is the section structure:
+
+
+     typedef struct bfd_section
+     {
+       /* The name of the section; the name isn't a copy, the pointer is
+          the same as that passed to bfd_make_section.  */
+       const char *name;
+
+       /* A unique sequence number.  */
+       int id;
+
+       /* Which section in the bfd; 0..n-1 as sections are created in a bfd.  */
+       int index;
+
+       /* The next section in the list belonging to the BFD, or NULL.  */
+       struct bfd_section *next;
+
+       /* The previous section in the list belonging to the BFD, or NULL.  */
+       struct bfd_section *prev;
+
+       /* The field flags contains attributes of the section. Some
+          flags are read in from the object file, and some are
+          synthesized from other information.  */
+       flagword flags;
+
+     #define SEC_NO_FLAGS   0x000
+
+       /* Tells the OS to allocate space for this section when loading.
+          This is clear for a section containing debug information only.  */
+     #define SEC_ALLOC      0x001
+
+       /* Tells the OS to load the section from the file when loading.
+          This is clear for a .bss section.  */
+     #define SEC_LOAD       0x002
+
+       /* The section contains data still to be relocated, so there is
+          some relocation information too.  */
+     #define SEC_RELOC      0x004
+
+       /* A signal to the OS that the section contains read only data.  */
+     #define SEC_READONLY   0x008
+
+       /* The section contains code only.  */
+     #define SEC_CODE       0x010
+
+       /* The section contains data only.  */
+     #define SEC_DATA       0x020
+
+       /* The section will reside in ROM.  */
+     #define SEC_ROM        0x040
+
+       /* The section contains constructor information. This section
+          type is used by the linker to create lists of constructors and
+          destructors used by `g++'. When a back end sees a symbol
+          which should be used in a constructor list, it creates a new
+          section for the type of name (e.g., `__CTOR_LIST__'), attaches
+          the symbol to it, and builds a relocation. To build the lists
+          of constructors, all the linker has to do is catenate all the
+          sections called `__CTOR_LIST__' and relocate the data
+          contained within - exactly the operations it would peform on
+          standard data.  */
+     #define SEC_CONSTRUCTOR 0x080
+
+       /* The section has contents - a data section could be
+          `SEC_ALLOC' | `SEC_HAS_CONTENTS'; a debug section could be
+          `SEC_HAS_CONTENTS'  */
+     #define SEC_HAS_CONTENTS 0x100
+
+       /* An instruction to the linker to not output the section
+          even if it has information which would normally be written.  */
+     #define SEC_NEVER_LOAD 0x200
+
+       /* The section contains thread local data.  */
+     #define SEC_THREAD_LOCAL 0x400
+
+       /* The section has GOT references.  This flag is only for the
+          linker, and is currently only used by the elf32-hppa back end.
+          It will be set if global offset table references were detected
+          in this section, which indicate to the linker that the section
+          contains PIC code, and must be handled specially when doing a
+          static link.  */
+     #define SEC_HAS_GOT_REF 0x800
+
+       /* The section contains common symbols (symbols may be defined
+          multiple times, the value of a symbol is the amount of
+          space it requires, and the largest symbol value is the one
+          used).  Most targets have exactly one of these (which we
+          translate to bfd_com_section_ptr), but ECOFF has two.  */
+     #define SEC_IS_COMMON 0x1000
+
+       /* The section contains only debugging information.  For
+          example, this is set for ELF .debug and .stab sections.
+          strip tests this flag to see if a section can be
+          discarded.  */
+     #define SEC_DEBUGGING 0x2000
+
+       /* The contents of this section are held in memory pointed to
+          by the contents field.  This is checked by bfd_get_section_contents,
+          and the data is retrieved from memory if appropriate.  */
+     #define SEC_IN_MEMORY 0x4000
+
+       /* The contents of this section are to be excluded by the
+          linker for executable and shared objects unless those
+          objects are to be further relocated.  */
+     #define SEC_EXCLUDE 0x8000
+
+       /* The contents of this section are to be sorted based on the sum of
+          the symbol and addend values specified by the associated relocation
+          entries.  Entries without associated relocation entries will be
+          appended to the end of the section in an unspecified order.  */
+     #define SEC_SORT_ENTRIES 0x10000
+
+       /* When linking, duplicate sections of the same name should be
+          discarded, rather than being combined into a single section as
+          is usually done.  This is similar to how common symbols are
+          handled.  See SEC_LINK_DUPLICATES below.  */
+     #define SEC_LINK_ONCE 0x20000
+
+       /* If SEC_LINK_ONCE is set, this bitfield describes how the linker
+          should handle duplicate sections.  */
+     #define SEC_LINK_DUPLICATES 0xc0000
+
+       /* This value for SEC_LINK_DUPLICATES means that duplicate
+          sections with the same name should simply be discarded.  */
+     #define SEC_LINK_DUPLICATES_DISCARD 0x0
+
+       /* This value for SEC_LINK_DUPLICATES means that the linker
+          should warn if there are any duplicate sections, although
+          it should still only link one copy.  */
+     #define SEC_LINK_DUPLICATES_ONE_ONLY 0x40000
+
+       /* This value for SEC_LINK_DUPLICATES means that the linker
+          should warn if any duplicate sections are a different size.  */
+     #define SEC_LINK_DUPLICATES_SAME_SIZE 0x80000
+
+       /* This value for SEC_LINK_DUPLICATES means that the linker
+          should warn if any duplicate sections contain different
+          contents.  */
+     #define SEC_LINK_DUPLICATES_SAME_CONTENTS \
+       (SEC_LINK_DUPLICATES_ONE_ONLY | SEC_LINK_DUPLICATES_SAME_SIZE)
+
+       /* This section was created by the linker as part of dynamic
+          relocation or other arcane processing.  It is skipped when
+          going through the first-pass output, trusting that someone
+          else up the line will take care of it later.  */
+     #define SEC_LINKER_CREATED 0x100000
+
+       /* This section should not be subject to garbage collection.
+          Also set to inform the linker that this section should not be
+          listed in the link map as discarded.  */
+     #define SEC_KEEP 0x200000
+
+       /* This section contains "short" data, and should be placed
+          "near" the GP.  */
+     #define SEC_SMALL_DATA 0x400000
+
+       /* Attempt to merge identical entities in the section.
+          Entity size is given in the entsize field.  */
+     #define SEC_MERGE 0x800000
+
+       /* If given with SEC_MERGE, entities to merge are zero terminated
+          strings where entsize specifies character size instead of fixed
+          size entries.  */
+     #define SEC_STRINGS 0x1000000
+
+       /* This section contains data about section groups.  */
+     #define SEC_GROUP 0x2000000
+
+       /* The section is a COFF shared library section.  This flag is
+          only for the linker.  If this type of section appears in
+          the input file, the linker must copy it to the output file
+          without changing the vma or size.  FIXME: Although this
+          was originally intended to be general, it really is COFF
+          specific (and the flag was renamed to indicate this).  It
+          might be cleaner to have some more general mechanism to
+          allow the back end to control what the linker does with
+          sections.  */
+     #define SEC_COFF_SHARED_LIBRARY 0x4000000
+
+       /* This section contains data which may be shared with other
+          executables or shared objects. This is for COFF only.  */
+     #define SEC_COFF_SHARED 0x8000000
+
+       /* When a section with this flag is being linked, then if the size of
+          the input section is less than a page, it should not cross a page
+          boundary.  If the size of the input section is one page or more,
+          it should be aligned on a page boundary.  This is for TI
+          TMS320C54X only.  */
+     #define SEC_TIC54X_BLOCK 0x10000000
+
+       /* Conditionally link this section; do not link if there are no
+          references found to any symbol in the section.  This is for TI
+          TMS320C54X only.  */
+     #define SEC_TIC54X_CLINK 0x20000000
+
+       /* Indicate that section has the no read flag set. This happens
+          when memory read flag isn't set. */
+     #define SEC_COFF_NOREAD 0x40000000
+
+       /*  End of section flags.  */
+
+       /* Some internal packed boolean fields.  */
+
+       /* See the vma field.  */
+       unsigned int user_set_vma : 1;
+
+       /* A mark flag used by some of the linker backends.  */
+       unsigned int linker_mark : 1;
+
+       /* Another mark flag used by some of the linker backends.  Set for
+          output sections that have an input section.  */
+       unsigned int linker_has_input : 1;
+
+       /* Mark flag used by some linker backends for garbage collection.  */
+       unsigned int gc_mark : 1;
+
+       /* The following flags are used by the ELF linker. */
+
+       /* Mark sections which have been allocated to segments.  */
+       unsigned int segment_mark : 1;
+
+       /* Type of sec_info information.  */
+       unsigned int sec_info_type:3;
+     #define ELF_INFO_TYPE_NONE      0
+     #define ELF_INFO_TYPE_STABS     1
+     #define ELF_INFO_TYPE_MERGE     2
+     #define ELF_INFO_TYPE_EH_FRAME  3
+     #define ELF_INFO_TYPE_JUST_SYMS 4
+
+       /* Nonzero if this section uses RELA relocations, rather than REL.  */
+       unsigned int use_rela_p:1;
+
+       /* Bits used by various backends.  The generic code doesn't touch
+          these fields.  */
+
+       /* Nonzero if this section has TLS related relocations.  */
+       unsigned int has_tls_reloc:1;
+
+       /* Nonzero if this section has a call to __tls_get_addr.  */
+       unsigned int has_tls_get_addr_call:1;
+
+       /* Nonzero if this section has a gp reloc.  */
+       unsigned int has_gp_reloc:1;
+
+       /* Nonzero if this section needs the relax finalize pass.  */
+       unsigned int need_finalize_relax:1;
+
+       /* Whether relocations have been processed.  */
+       unsigned int reloc_done : 1;
+
+       /* End of internal packed boolean fields.  */
+
+       /*  The virtual memory address of the section - where it will be
+           at run time.  The symbols are relocated against this.  The
+           user_set_vma flag is maintained by bfd; if it's not set, the
+           backend can assign addresses (for example, in `a.out', where
+           the default address for `.data' is dependent on the specific
+           target and various flags).  */
+       bfd_vma vma;
+
+       /*  The load address of the section - where it would be in a
+           rom image; really only used for writing section header
+           information.  */
+       bfd_vma lma;
+
+       /* The size of the section in octets, as it will be output.
+          Contains a value even if the section has no contents (e.g., the
+          size of `.bss').  */
+       bfd_size_type size;
+
+       /* For input sections, the original size on disk of the section, in
+          octets.  This field should be set for any section whose size is
+          changed by linker relaxation.  It is required for sections where
+          the linker relaxation scheme doesn't cache altered section and
+          reloc contents (stabs, eh_frame, SEC_MERGE, some coff relaxing
+          targets), and thus the original size needs to be kept to read the
+          section multiple times.  For output sections, rawsize holds the
+          section size calculated on a previous linker relaxation pass.  */
+       bfd_size_type rawsize;
+
+       /* Relaxation table. */
+       struct relax_table *relax;
+
+       /* Count of used relaxation table entries. */
+       int relax_count;
+
+
+       /* If this section is going to be output, then this value is the
+          offset in *bytes* into the output section of the first byte in the
+          input section (byte ==> smallest addressable unit on the
+          target).  In most cases, if this was going to start at the
+          100th octet (8-bit quantity) in the output section, this value
+          would be 100.  However, if the target byte size is 16 bits
+          (bfd_octets_per_byte is "2"), this value would be 50.  */
+       bfd_vma output_offset;
+
+       /* The output section through which to map on output.  */
+       struct bfd_section *output_section;
+
+       /* The alignment requirement of the section, as an exponent of 2 -
+          e.g., 3 aligns to 2^3 (or 8).  */
+       unsigned int alignment_power;
+
+       /* If an input section, a pointer to a vector of relocation
+          records for the data in this section.  */
+       struct reloc_cache_entry *relocation;
+
+       /* If an output section, a pointer to a vector of pointers to
+          relocation records for the data in this section.  */
+       struct reloc_cache_entry **orelocation;
+
+       /* The number of relocation records in one of the above.  */
+       unsigned reloc_count;
+
+       /* Information below is back end specific - and not always used
+          or updated.  */
+
+       /* File position of section data.  */
+       file_ptr filepos;
+
+       /* File position of relocation info.  */
+       file_ptr rel_filepos;
+
+       /* File position of line data.  */
+       file_ptr line_filepos;
+
+       /* Pointer to data for applications.  */
+       void *userdata;
+
+       /* If the SEC_IN_MEMORY flag is set, this points to the actual
+          contents.  */
+       unsigned char *contents;
+
+       /* Attached line number information.  */
+       alent *lineno;
+
+       /* Number of line number records.  */
+       unsigned int lineno_count;
+
+       /* Entity size for merging purposes.  */
+       unsigned int entsize;
+
+       /* Points to the kept section if this section is a link-once section,
+          and is discarded.  */
+       struct bfd_section *kept_section;
+
+       /* When a section is being output, this value changes as more
+          linenumbers are written out.  */
+       file_ptr moving_line_filepos;
+
+       /* What the section number is in the target world.  */
+       int target_index;
+
+       void *used_by_bfd;
+
+       /* If this is a constructor section then here is a list of the
+          relocations created to relocate items within it.  */
+       struct relent_chain *constructor_chain;
+
+       /* The BFD which owns the section.  */
+       bfd *owner;
+
+       /* A symbol which points at this section only.  */
+       struct bfd_symbol *symbol;
+       struct bfd_symbol **symbol_ptr_ptr;
+
+       /* Early in the link process, map_head and map_tail are used to build
+          a list of input sections attached to an output section.  Later,
+          output sections use these fields for a list of bfd_link_order
+          structs.  */
+       union {
+         struct bfd_link_order *link_order;
+         struct bfd_section *s;
+       } map_head, map_tail;
+     } asection;
+
+     /* Relax table contains information about instructions which can
+        be removed by relaxation -- replacing a long address with a
+        short address.  */
+     struct relax_table {
+       /* Address where bytes may be deleted. */
+       bfd_vma addr;
+
+       /* Number of bytes to be deleted.  */
+       int size;
+     };
+
+     /* These sections are global, and are managed by BFD.  The application
+        and target back end are not permitted to change the values in
+        these sections.  New code should use the section_ptr macros rather
+        than referring directly to the const sections.  The const sections
+        may eventually vanish.  */
+     #define BFD_ABS_SECTION_NAME "*ABS*"
+     #define BFD_UND_SECTION_NAME "*UND*"
+     #define BFD_COM_SECTION_NAME "*COM*"
+     #define BFD_IND_SECTION_NAME "*IND*"
+
+     /* The absolute section.  */
+     extern asection bfd_abs_section;
+     #define bfd_abs_section_ptr ((asection *) &bfd_abs_section)
+     #define bfd_is_abs_section(sec) ((sec) == bfd_abs_section_ptr)
+     /* Pointer to the undefined section.  */
+     extern asection bfd_und_section;
+     #define bfd_und_section_ptr ((asection *) &bfd_und_section)
+     #define bfd_is_und_section(sec) ((sec) == bfd_und_section_ptr)
+     /* Pointer to the common section.  */
+     extern asection bfd_com_section;
+     #define bfd_com_section_ptr ((asection *) &bfd_com_section)
+     /* Pointer to the indirect section.  */
+     extern asection bfd_ind_section;
+     #define bfd_ind_section_ptr ((asection *) &bfd_ind_section)
+     #define bfd_is_ind_section(sec) ((sec) == bfd_ind_section_ptr)
+
+     #define bfd_is_const_section(SEC)              \
+      (   ((SEC) == bfd_abs_section_ptr)            \
+       || ((SEC) == bfd_und_section_ptr)            \
+       || ((SEC) == bfd_com_section_ptr)            \
+       || ((SEC) == bfd_ind_section_ptr))
+
+     /* Macros to handle insertion and deletion of a bfd's sections.  These
+        only handle the list pointers, ie. do not adjust section_count,
+        target_index etc.  */
+     #define bfd_section_list_remove(ABFD, S) \
+       do                                                   \
+         {                                                  \
+           asection *_s = S;                                \
+           asection *_next = _s->next;                      \
+           asection *_prev = _s->prev;                      \
+           if (_prev)                                       \
+             _prev->next = _next;                           \
+           else                                             \
+             (ABFD)->sections = _next;                      \
+           if (_next)                                       \
+             _next->prev = _prev;                           \
+           else                                             \
+             (ABFD)->section_last = _prev;                  \
+         }                                                  \
+       while (0)
+     #define bfd_section_list_append(ABFD, S) \
+       do                                                   \
+         {                                                  \
+           asection *_s = S;                                \
+           bfd *_abfd = ABFD;                               \
+           _s->next = NULL;                                 \
+           if (_abfd->section_last)                         \
+             {                                              \
+               _s->prev = _abfd->section_last;              \
+               _abfd->section_last->next = _s;              \
+             }                                              \
+           else                                             \
+             {                                              \
+               _s->prev = NULL;                             \
+               _abfd->sections = _s;                        \
+             }                                              \
+           _abfd->section_last = _s;                        \
+         }                                                  \
+       while (0)
+     #define bfd_section_list_prepend(ABFD, S) \
+       do                                                   \
+         {                                                  \
+           asection *_s = S;                                \
+           bfd *_abfd = ABFD;                               \
+           _s->prev = NULL;                                 \
+           if (_abfd->sections)                             \
+             {                                              \
+               _s->next = _abfd->sections;                  \
+               _abfd->sections->prev = _s;                  \
+             }                                              \
+           else                                             \
+             {                                              \
+               _s->next = NULL;                             \
+               _abfd->section_last = _s;                    \
+             }                                              \
+           _abfd->sections = _s;                            \
+         }                                                  \
+       while (0)
+     #define bfd_section_list_insert_after(ABFD, A, S) \
+       do                                                   \
+         {                                                  \
+           asection *_a = A;                                \
+           asection *_s = S;                                \
+           asection *_next = _a->next;                      \
+           _s->next = _next;                                \
+           _s->prev = _a;                                   \
+           _a->next = _s;                                   \
+           if (_next)                                       \
+             _next->prev = _s;                              \
+           else                                             \
+             (ABFD)->section_last = _s;                     \
+         }                                                  \
+       while (0)
+     #define bfd_section_list_insert_before(ABFD, B, S) \
+       do                                                   \
+         {                                                  \
+           asection *_b = B;                                \
+           asection *_s = S;                                \
+           asection *_prev = _b->prev;                      \
+           _s->prev = _prev;                                \
+           _s->next = _b;                                   \
+           _b->prev = _s;                                   \
+           if (_prev)                                       \
+             _prev->next = _s;                              \
+           else                                             \
+             (ABFD)->sections = _s;                         \
+         }                                                  \
+       while (0)
+     #define bfd_section_removed_from_list(ABFD, S) \
+       ((S)->next == NULL ? (ABFD)->section_last != (S) : (S)->next->prev != (S))
+
+     #define BFD_FAKE_SECTION(SEC, FLAGS, SYM, NAME, IDX)                   \
+       /* name, id,  index, next, prev, flags, user_set_vma,            */  \
+       { NAME,  IDX, 0,     NULL, NULL, FLAGS, 0,                           \
+                                                                            \
+       /* linker_mark, linker_has_input, gc_mark,                       */  \
+          0,           0,                1,                                 \
+                                                                            \
+       /* segment_mark, sec_info_type, use_rela_p, has_tls_reloc,       */  \
+          0,            0,             0,          0,                       \
+                                                                            \
+       /* has_tls_get_addr_call, has_gp_reloc, need_finalize_relax,     */  \
+          0,                     0,            0,                           \
+                                                                            \
+       /* reloc_done, vma, lma, size, rawsize, relax, relax_count,      */  \
+          0,          0,   0,   0,    0,       0,     0,                    \
+                                                                            \
+       /* output_offset, output_section,              alignment_power,  */  \
+          0,             (struct bfd_section *) &SEC, 0,                    \
+                                                                            \
+       /* relocation, orelocation, reloc_count, filepos, rel_filepos,   */  \
+          NULL,       NULL,        0,           0,       0,                 \
+                                                                            \
+       /* line_filepos, userdata, contents, lineno, lineno_count,       */  \
+          0,            NULL,     NULL,     NULL,   0,                      \
+                                                                            \
+       /* entsize, kept_section, moving_line_filepos,                    */ \
+          0,       NULL,          0,                                        \
+                                                                            \
+       /* target_index, used_by_bfd, constructor_chain, owner,          */  \
+          0,            NULL,        NULL,              NULL,               \
+                                                                            \
+       /* symbol,                    symbol_ptr_ptr,                    */  \
+          (struct bfd_symbol *) SYM, &SEC.symbol,                           \
+                                                                            \
+       /* map_head, map_tail                                            */  \
+          { NULL }, { NULL }                                                \
+         }
+
+
+File: bfd.info,  Node: section prototypes,  Prev: typedef asection,  Up: Sections
+
+2.6.5 Section prototypes
+------------------------
+
+These are the functions exported by the section handling part of BFD.
+
+2.6.5.1 `bfd_section_list_clear'
+................................
+
+*Synopsis*
+     void bfd_section_list_clear (bfd *);
+   *Description*
+Clears the section list, and also resets the section count and hash
+table entries.
+
+2.6.5.2 `bfd_get_section_by_name'
+.................................
+
+*Synopsis*
+     asection *bfd_get_section_by_name (bfd *abfd, const char *name);
+   *Description*
+Run through ABFD and return the one of the `asection's whose name
+matches NAME, otherwise `NULL'.  *Note Sections::, for more information.
+
+   This should only be used in special cases; the normal way to process
+all sections of a given name is to use `bfd_map_over_sections' and
+`strcmp' on the name (or better yet, base it on the section flags or
+something else) for each section.
+
+2.6.5.3 `bfd_get_section_by_name_if'
+....................................
+
+*Synopsis*
+     asection *bfd_get_section_by_name_if
+        (bfd *abfd,
+         const char *name,
+         bfd_boolean (*func) (bfd *abfd, asection *sect, void *obj),
+         void *obj);
+   *Description*
+Call the provided function FUNC for each section attached to the BFD
+ABFD whose name matches NAME, passing OBJ as an argument. The function
+will be called as if by
+
+            func (abfd, the_section, obj);
+
+   It returns the first section for which FUNC returns true, otherwise
+`NULL'.
+
+2.6.5.4 `bfd_get_unique_section_name'
+.....................................
+
+*Synopsis*
+     char *bfd_get_unique_section_name
+        (bfd *abfd, const char *templat, int *count);
+   *Description*
+Invent a section name that is unique in ABFD by tacking a dot and a
+digit suffix onto the original TEMPLAT.  If COUNT is non-NULL, then it
+specifies the first number tried as a suffix to generate a unique name.
+The value pointed to by COUNT will be incremented in this case.
+
+2.6.5.5 `bfd_make_section_old_way'
+..................................
+
+*Synopsis*
+     asection *bfd_make_section_old_way (bfd *abfd, const char *name);
+   *Description*
+Create a new empty section called NAME and attach it to the end of the
+chain of sections for the BFD ABFD. An attempt to create a section with
+a name which is already in use returns its pointer without changing the
+section chain.
+
+   It has the funny name since this is the way it used to be before it
+was rewritten....
+
+   Possible errors are:
+   * `bfd_error_invalid_operation' - If output has already started for
+     this BFD.
+
+   * `bfd_error_no_memory' - If memory allocation fails.
+
+2.6.5.6 `bfd_make_section_anyway_with_flags'
+............................................
+
+*Synopsis*
+     asection *bfd_make_section_anyway_with_flags
+        (bfd *abfd, const char *name, flagword flags);
+   *Description*
+Create a new empty section called NAME and attach it to the end of the
+chain of sections for ABFD.  Create a new section even if there is
+already a section with that name.  Also set the attributes of the new
+section to the value FLAGS.
+
+   Return `NULL' and set `bfd_error' on error; possible errors are:
+   * `bfd_error_invalid_operation' - If output has already started for
+     ABFD.
+
+   * `bfd_error_no_memory' - If memory allocation fails.
+
+2.6.5.7 `bfd_make_section_anyway'
+.................................
+
+*Synopsis*
+     asection *bfd_make_section_anyway (bfd *abfd, const char *name);
+   *Description*
+Create a new empty section called NAME and attach it to the end of the
+chain of sections for ABFD.  Create a new section even if there is
+already a section with that name.
+
+   Return `NULL' and set `bfd_error' on error; possible errors are:
+   * `bfd_error_invalid_operation' - If output has already started for
+     ABFD.
+
+   * `bfd_error_no_memory' - If memory allocation fails.
+
+2.6.5.8 `bfd_make_section_with_flags'
+.....................................
+
+*Synopsis*
+     asection *bfd_make_section_with_flags
+        (bfd *, const char *name, flagword flags);
+   *Description*
+Like `bfd_make_section_anyway', but return `NULL' (without calling
+bfd_set_error ()) without changing the section chain if there is
+already a section named NAME.  Also set the attributes of the new
+section to the value FLAGS.  If there is an error, return `NULL' and set
+`bfd_error'.
+
+2.6.5.9 `bfd_make_section'
+..........................
+
+*Synopsis*
+     asection *bfd_make_section (bfd *, const char *name);
+   *Description*
+Like `bfd_make_section_anyway', but return `NULL' (without calling
+bfd_set_error ()) without changing the section chain if there is
+already a section named NAME.  If there is an error, return `NULL' and
+set `bfd_error'.
+
+2.6.5.10 `bfd_set_section_flags'
+................................
+
+*Synopsis*
+     bfd_boolean bfd_set_section_flags
+        (bfd *abfd, asection *sec, flagword flags);
+   *Description*
+Set the attributes of the section SEC in the BFD ABFD to the value
+FLAGS. Return `TRUE' on success, `FALSE' on error. Possible error
+returns are:
+
+   * `bfd_error_invalid_operation' - The section cannot have one or
+     more of the attributes requested. For example, a .bss section in
+     `a.out' may not have the `SEC_HAS_CONTENTS' field set.
+
+2.6.5.11 `bfd_map_over_sections'
+................................
+
+*Synopsis*
+     void bfd_map_over_sections
+        (bfd *abfd,
+         void (*func) (bfd *abfd, asection *sect, void *obj),
+         void *obj);
+   *Description*
+Call the provided function FUNC for each section attached to the BFD
+ABFD, passing OBJ as an argument. The function will be called as if by
+
+            func (abfd, the_section, obj);
+
+   This is the preferred method for iterating over sections; an
+alternative would be to use a loop:
+
+               section *p;
+               for (p = abfd->sections; p != NULL; p = p->next)
+                  func (abfd, p, ...)
+
+2.6.5.12 `bfd_sections_find_if'
+...............................
+
+*Synopsis*
+     asection *bfd_sections_find_if
+        (bfd *abfd,
+         bfd_boolean (*operation) (bfd *abfd, asection *sect, void *obj),
+         void *obj);
+   *Description*
+Call the provided function OPERATION for each section attached to the
+BFD ABFD, passing OBJ as an argument. The function will be called as if
+by
+
+            operation (abfd, the_section, obj);
+
+   It returns the first section for which OPERATION returns true.
+
+2.6.5.13 `bfd_set_section_size'
+...............................
+
+*Synopsis*
+     bfd_boolean bfd_set_section_size
+        (bfd *abfd, asection *sec, bfd_size_type val);
+   *Description*
+Set SEC to the size VAL. If the operation is ok, then `TRUE' is
+returned, else `FALSE'.
+
+   Possible error returns:
+   * `bfd_error_invalid_operation' - Writing has started to the BFD, so
+     setting the size is invalid.
+
+2.6.5.14 `bfd_set_section_contents'
+...................................
+
+*Synopsis*
+     bfd_boolean bfd_set_section_contents
+        (bfd *abfd, asection *section, const void *data,
+         file_ptr offset, bfd_size_type count);
+   *Description*
+Sets the contents of the section SECTION in BFD ABFD to the data
+starting in memory at DATA. The data is written to the output section
+starting at offset OFFSET for COUNT octets.
+
+   Normally `TRUE' is returned, else `FALSE'. Possible error returns
+are:
+   * `bfd_error_no_contents' - The output section does not have the
+     `SEC_HAS_CONTENTS' attribute, so nothing can be written to it.
+
+   * and some more too
+   This routine is front end to the back end function
+`_bfd_set_section_contents'.
+
+2.6.5.15 `bfd_get_section_contents'
+...................................
+
+*Synopsis*
+     bfd_boolean bfd_get_section_contents
+        (bfd *abfd, asection *section, void *location, file_ptr offset,
+         bfd_size_type count);
+   *Description*
+Read data from SECTION in BFD ABFD into memory starting at LOCATION.
+The data is read at an offset of OFFSET from the start of the input
+section, and is read for COUNT bytes.
+
+   If the contents of a constructor with the `SEC_CONSTRUCTOR' flag set
+are requested or if the section does not have the `SEC_HAS_CONTENTS'
+flag set, then the LOCATION is filled with zeroes. If no errors occur,
+`TRUE' is returned, else `FALSE'.
+
+2.6.5.16 `bfd_malloc_and_get_section'
+.....................................
+
+*Synopsis*
+     bfd_boolean bfd_malloc_and_get_section
+        (bfd *abfd, asection *section, bfd_byte **buf);
+   *Description*
+Read all data from SECTION in BFD ABFD into a buffer, *BUF, malloc'd by
+this function.
+
+2.6.5.17 `bfd_copy_private_section_data'
+........................................
+
+*Synopsis*
+     bfd_boolean bfd_copy_private_section_data
+        (bfd *ibfd, asection *isec, bfd *obfd, asection *osec);
+   *Description*
+Copy private section information from ISEC in the BFD IBFD to the
+section OSEC in the BFD OBFD.  Return `TRUE' on success, `FALSE' on
+error.  Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OSEC.
+
+     #define bfd_copy_private_section_data(ibfd, isection, obfd, osection) \
+          BFD_SEND (obfd, _bfd_copy_private_section_data, \
+                    (ibfd, isection, obfd, osection))
+
+2.6.5.18 `bfd_generic_is_group_section'
+.......................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_is_group_section (bfd *, const asection *sec);
+   *Description*
+Returns TRUE if SEC is a member of a group.
+
+2.6.5.19 `bfd_generic_discard_group'
+....................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_discard_group (bfd *abfd, asection *group);
+   *Description*
+Remove all members of GROUP from the output.
+
+
+File: bfd.info,  Node: Symbols,  Next: Archives,  Prev: Sections,  Up: BFD front end
+
+2.7 Symbols
+===========
+
+BFD tries to maintain as much symbol information as it can when it
+moves information from file to file. BFD passes information to
+applications though the `asymbol' structure. When the application
+requests the symbol table, BFD reads the table in the native form and
+translates parts of it into the internal format. To maintain more than
+the information passed to applications, some targets keep some
+information "behind the scenes" in a structure only the particular back
+end knows about. For example, the coff back end keeps the original
+symbol table structure as well as the canonical structure when a BFD is
+read in. On output, the coff back end can reconstruct the output symbol
+table so that no information is lost, even information unique to coff
+which BFD doesn't know or understand. If a coff symbol table were read,
+but were written through an a.out back end, all the coff specific
+information would be lost. The symbol table of a BFD is not necessarily
+read in until a canonicalize request is made. Then the BFD back end
+fills in a table provided by the application with pointers to the
+canonical information.  To output symbols, the application provides BFD
+with a table of pointers to pointers to `asymbol's. This allows
+applications like the linker to output a symbol as it was read, since
+the "behind the scenes" information will be still available.
+
+* Menu:
+
+* Reading Symbols::
+* Writing Symbols::
+* Mini Symbols::
+* typedef asymbol::
+* symbol handling functions::
+
+
+File: bfd.info,  Node: Reading Symbols,  Next: Writing Symbols,  Prev: Symbols,  Up: Symbols
+
+2.7.1 Reading symbols
+---------------------
+
+There are two stages to reading a symbol table from a BFD: allocating
+storage, and the actual reading process. This is an excerpt from an
+application which reads the symbol table:
+
+              long storage_needed;
+              asymbol **symbol_table;
+              long number_of_symbols;
+              long i;
+
+              storage_needed = bfd_get_symtab_upper_bound (abfd);
+
+              if (storage_needed < 0)
+                FAIL
+
+              if (storage_needed == 0)
+                return;
+
+              symbol_table = xmalloc (storage_needed);
+                ...
+              number_of_symbols =
+                 bfd_canonicalize_symtab (abfd, symbol_table);
+
+              if (number_of_symbols < 0)
+                FAIL
+
+              for (i = 0; i < number_of_symbols; i++)
+                process_symbol (symbol_table[i]);
+
+   All storage for the symbols themselves is in an objalloc connected
+to the BFD; it is freed when the BFD is closed.
+
+
+File: bfd.info,  Node: Writing Symbols,  Next: Mini Symbols,  Prev: Reading Symbols,  Up: Symbols
+
+2.7.2 Writing symbols
+---------------------
+
+Writing of a symbol table is automatic when a BFD open for writing is
+closed. The application attaches a vector of pointers to pointers to
+symbols to the BFD being written, and fills in the symbol count. The
+close and cleanup code reads through the table provided and performs
+all the necessary operations. The BFD output code must always be
+provided with an "owned" symbol: one which has come from another BFD,
+or one which has been created using `bfd_make_empty_symbol'.  Here is an
+example showing the creation of a symbol table with only one element:
+
+            #include "bfd.h"
+            int main (void)
+            {
+              bfd *abfd;
+              asymbol *ptrs[2];
+              asymbol *new;
+
+              abfd = bfd_openw ("foo","a.out-sunos-big");
+              bfd_set_format (abfd, bfd_object);
+              new = bfd_make_empty_symbol (abfd);
+              new->name = "dummy_symbol";
+              new->section = bfd_make_section_old_way (abfd, ".text");
+              new->flags = BSF_GLOBAL;
+              new->value = 0x12345;
+
+              ptrs[0] = new;
+              ptrs[1] = 0;
+
+              bfd_set_symtab (abfd, ptrs, 1);
+              bfd_close (abfd);
+              return 0;
+            }
+
+            ./makesym
+            nm foo
+            00012345 A dummy_symbol
+
+   Many formats cannot represent arbitrary symbol information; for
+instance, the `a.out' object format does not allow an arbitrary number
+of sections. A symbol pointing to a section which is not one  of
+`.text', `.data' or `.bss' cannot be described.
+
+
+File: bfd.info,  Node: Mini Symbols,  Next: typedef asymbol,  Prev: Writing Symbols,  Up: Symbols
+
+2.7.3 Mini Symbols
+------------------
+
+Mini symbols provide read-only access to the symbol table.  They use
+less memory space, but require more time to access.  They can be useful
+for tools like nm or objdump, which may have to handle symbol tables of
+extremely large executables.
+
+   The `bfd_read_minisymbols' function will read the symbols into
+memory in an internal form.  It will return a `void *' pointer to a
+block of memory, a symbol count, and the size of each symbol.  The
+pointer is allocated using `malloc', and should be freed by the caller
+when it is no longer needed.
+
+   The function `bfd_minisymbol_to_symbol' will take a pointer to a
+minisymbol, and a pointer to a structure returned by
+`bfd_make_empty_symbol', and return a `asymbol' structure.  The return
+value may or may not be the same as the value from
+`bfd_make_empty_symbol' which was passed in.
+
+
+File: bfd.info,  Node: typedef asymbol,  Next: symbol handling functions,  Prev: Mini Symbols,  Up: Symbols
+
+2.7.4 typedef asymbol
+---------------------
+
+An `asymbol' has the form:
+
+
+     typedef struct bfd_symbol
+     {
+       /* A pointer to the BFD which owns the symbol. This information
+          is necessary so that a back end can work out what additional
+          information (invisible to the application writer) is carried
+          with the symbol.
+
+          This field is *almost* redundant, since you can use section->owner
+          instead, except that some symbols point to the global sections
+          bfd_{abs,com,und}_section.  This could be fixed by making
+          these globals be per-bfd (or per-target-flavor).  FIXME.  */
+       struct bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field.  */
+
+       /* The text of the symbol. The name is left alone, and not copied; the
+          application may not alter it.  */
+       const char *name;
+
+       /* The value of the symbol.  This really should be a union of a
+          numeric value with a pointer, since some flags indicate that
+          a pointer to another symbol is stored here.  */
+       symvalue value;
+
+       /* Attributes of a symbol.  */
+     #define BSF_NO_FLAGS           0x00
+
+       /* The symbol has local scope; `static' in `C'. The value
+          is the offset into the section of the data.  */
+     #define BSF_LOCAL              (1 << 0)
+
+       /* The symbol has global scope; initialized data in `C'. The
+          value is the offset into the section of the data.  */
+     #define BSF_GLOBAL             (1 << 1)
+
+       /* The symbol has global scope and is exported. The value is
+          the offset into the section of the data.  */
+     #define BSF_EXPORT     BSF_GLOBAL /* No real difference.  */
+
+       /* A normal C symbol would be one of:
+          `BSF_LOCAL', `BSF_COMMON',  `BSF_UNDEFINED' or
+          `BSF_GLOBAL'.  */
+
+       /* The symbol is a debugging record. The value has an arbitrary
+          meaning, unless BSF_DEBUGGING_RELOC is also set.  */
+     #define BSF_DEBUGGING          (1 << 2)
+
+       /* The symbol denotes a function entry point.  Used in ELF,
+          perhaps others someday.  */
+     #define BSF_FUNCTION           (1 << 3)
+
+       /* Used by the linker.  */
+     #define BSF_KEEP               (1 << 5)
+     #define BSF_KEEP_G             (1 << 6)
+
+       /* A weak global symbol, overridable without warnings by
+          a regular global symbol of the same name.  */
+     #define BSF_WEAK               (1 << 7)
+
+       /* This symbol was created to point to a section, e.g. ELF's
+          STT_SECTION symbols.  */
+     #define BSF_SECTION_SYM        (1 << 8)
+
+       /* The symbol used to be a common symbol, but now it is
+          allocated.  */
+     #define BSF_OLD_COMMON         (1 << 9)
+
+       /* In some files the type of a symbol sometimes alters its
+          location in an output file - ie in coff a `ISFCN' symbol
+          which is also `C_EXT' symbol appears where it was
+          declared and not at the end of a section.  This bit is set
+          by the target BFD part to convey this information.  */
+     #define BSF_NOT_AT_END         (1 << 10)
+
+       /* Signal that the symbol is the label of constructor section.  */
+     #define BSF_CONSTRUCTOR        (1 << 11)
+
+       /* Signal that the symbol is a warning symbol.  The name is a
+          warning.  The name of the next symbol is the one to warn about;
+          if a reference is made to a symbol with the same name as the next
+          symbol, a warning is issued by the linker.  */
+     #define BSF_WARNING            (1 << 12)
+
+       /* Signal that the symbol is indirect.  This symbol is an indirect
+          pointer to the symbol with the same name as the next symbol.  */
+     #define BSF_INDIRECT           (1 << 13)
+
+       /* BSF_FILE marks symbols that contain a file name.  This is used
+          for ELF STT_FILE symbols.  */
+     #define BSF_FILE               (1 << 14)
+
+       /* Symbol is from dynamic linking information.  */
+     #define BSF_DYNAMIC            (1 << 15)
+
+       /* The symbol denotes a data object.  Used in ELF, and perhaps
+          others someday.  */
+     #define BSF_OBJECT             (1 << 16)
+
+       /* This symbol is a debugging symbol.  The value is the offset
+          into the section of the data.  BSF_DEBUGGING should be set
+          as well.  */
+     #define BSF_DEBUGGING_RELOC    (1 << 17)
+
+       /* This symbol is thread local.  Used in ELF.  */
+     #define BSF_THREAD_LOCAL       (1 << 18)
+
+       /* This symbol represents a complex relocation expression,
+          with the expression tree serialized in the symbol name.  */
+     #define BSF_RELC               (1 << 19)
+
+       /* This symbol represents a signed complex relocation expression,
+          with the expression tree serialized in the symbol name.  */
+     #define BSF_SRELC              (1 << 20)
+
+       /* This symbol was created by bfd_get_synthetic_symtab.  */
+     #define BSF_SYNTHETIC          (1 << 21)
+
+       /* This symbol is an indirect code object.  Unrelated to BSF_INDIRECT.
+          The dynamic linker will compute the value of this symbol by
+          calling the function that it points to.  BSF_FUNCTION must
+          also be also set.  */
+     #define BSF_GNU_INDIRECT_FUNCTION (1 << 22)
+       /* This symbol is a globally unique data object.  The dynamic linker
+          will make sure that in the entire process there is just one symbol
+          with this name and type in use.  BSF_OBJECT must also be set.  */
+     #define BSF_GNU_UNIQUE         (1 << 23)
+
+       flagword flags;
+
+       /* A pointer to the section to which this symbol is
+          relative.  This will always be non NULL, there are special
+          sections for undefined and absolute symbols.  */
+       struct bfd_section *section;
+
+       /* Back end special data.  */
+       union
+         {
+           void *p;
+           bfd_vma i;
+         }
+       udata;
+     }
+     asymbol;
+
+
+File: bfd.info,  Node: symbol handling functions,  Prev: typedef asymbol,  Up: Symbols
+
+2.7.5 Symbol handling functions
+-------------------------------
+
+2.7.5.1 `bfd_get_symtab_upper_bound'
+....................................
+
+*Description*
+Return the number of bytes required to store a vector of pointers to
+`asymbols' for all the symbols in the BFD ABFD, including a terminal
+NULL pointer. If there are no symbols in the BFD, then return 0.  If an
+error occurs, return -1.
+     #define bfd_get_symtab_upper_bound(abfd) \
+          BFD_SEND (abfd, _bfd_get_symtab_upper_bound, (abfd))
+
+2.7.5.2 `bfd_is_local_label'
+............................
+
+*Synopsis*
+     bfd_boolean bfd_is_local_label (bfd *abfd, asymbol *sym);
+   *Description*
+Return TRUE if the given symbol SYM in the BFD ABFD is a compiler
+generated local label, else return FALSE.
+
+2.7.5.3 `bfd_is_local_label_name'
+.................................
+
+*Synopsis*
+     bfd_boolean bfd_is_local_label_name (bfd *abfd, const char *name);
+   *Description*
+Return TRUE if a symbol with the name NAME in the BFD ABFD is a
+compiler generated local label, else return FALSE.  This just checks
+whether the name has the form of a local label.
+     #define bfd_is_local_label_name(abfd, name) \
+       BFD_SEND (abfd, _bfd_is_local_label_name, (abfd, name))
+
+2.7.5.4 `bfd_is_target_special_symbol'
+......................................
+
+*Synopsis*
+     bfd_boolean bfd_is_target_special_symbol (bfd *abfd, asymbol *sym);
+   *Description*
+Return TRUE iff a symbol SYM in the BFD ABFD is something special to
+the particular target represented by the BFD.  Such symbols should
+normally not be mentioned to the user.
+     #define bfd_is_target_special_symbol(abfd, sym) \
+       BFD_SEND (abfd, _bfd_is_target_special_symbol, (abfd, sym))
+
+2.7.5.5 `bfd_canonicalize_symtab'
+.................................
+
+*Description*
+Read the symbols from the BFD ABFD, and fills in the vector LOCATION
+with pointers to the symbols and a trailing NULL.  Return the actual
+number of symbol pointers, not including the NULL.
+     #define bfd_canonicalize_symtab(abfd, location) \
+       BFD_SEND (abfd, _bfd_canonicalize_symtab, (abfd, location))
+
+2.7.5.6 `bfd_set_symtab'
+........................
+
+*Synopsis*
+     bfd_boolean bfd_set_symtab
+        (bfd *abfd, asymbol **location, unsigned int count);
+   *Description*
+Arrange that when the output BFD ABFD is closed, the table LOCATION of
+COUNT pointers to symbols will be written.
+
+2.7.5.7 `bfd_print_symbol_vandf'
+................................
+
+*Synopsis*
+     void bfd_print_symbol_vandf (bfd *abfd, void *file, asymbol *symbol);
+   *Description*
+Print the value and flags of the SYMBOL supplied to the stream FILE.
+
+2.7.5.8 `bfd_make_empty_symbol'
+...............................
+
+*Description*
+Create a new `asymbol' structure for the BFD ABFD and return a pointer
+to it.
+
+   This routine is necessary because each back end has private
+information surrounding the `asymbol'. Building your own `asymbol' and
+pointing to it will not create the private information, and will cause
+problems later on.
+     #define bfd_make_empty_symbol(abfd) \
+       BFD_SEND (abfd, _bfd_make_empty_symbol, (abfd))
+
+2.7.5.9 `_bfd_generic_make_empty_symbol'
+........................................
+
+*Synopsis*
+     asymbol *_bfd_generic_make_empty_symbol (bfd *);
+   *Description*
+Create a new `asymbol' structure for the BFD ABFD and return a pointer
+to it.  Used by core file routines, binary back-end and anywhere else
+where no private info is needed.
+
+2.7.5.10 `bfd_make_debug_symbol'
+................................
+
+*Description*
+Create a new `asymbol' structure for the BFD ABFD, to be used as a
+debugging symbol.  Further details of its use have yet to be worked out.
+     #define bfd_make_debug_symbol(abfd,ptr,size) \
+       BFD_SEND (abfd, _bfd_make_debug_symbol, (abfd, ptr, size))
+
+2.7.5.11 `bfd_decode_symclass'
+..............................
+
+*Description*
+Return a character corresponding to the symbol class of SYMBOL, or '?'
+for an unknown class.
+
+   *Synopsis*
+     int bfd_decode_symclass (asymbol *symbol);
+   
+2.7.5.12 `bfd_is_undefined_symclass'
+....................................
+
+*Description*
+Returns non-zero if the class symbol returned by bfd_decode_symclass
+represents an undefined symbol.  Returns zero otherwise.
+
+   *Synopsis*
+     bfd_boolean bfd_is_undefined_symclass (int symclass);
+   
+2.7.5.13 `bfd_symbol_info'
+..........................
+
+*Description*
+Fill in the basic info about symbol that nm needs.  Additional info may
+be added by the back-ends after calling this function.
+
+   *Synopsis*
+     void bfd_symbol_info (asymbol *symbol, symbol_info *ret);
+   
+2.7.5.14 `bfd_copy_private_symbol_data'
+.......................................
+
+*Synopsis*
+     bfd_boolean bfd_copy_private_symbol_data
+        (bfd *ibfd, asymbol *isym, bfd *obfd, asymbol *osym);
+   *Description*
+Copy private symbol information from ISYM in the BFD IBFD to the symbol
+OSYM in the BFD OBFD.  Return `TRUE' on success, `FALSE' on error.
+Possible error returns are:
+
+   * `bfd_error_no_memory' - Not enough memory exists to create private
+     data for OSEC.
+
+     #define bfd_copy_private_symbol_data(ibfd, isymbol, obfd, osymbol) \
+       BFD_SEND (obfd, _bfd_copy_private_symbol_data, \
+                 (ibfd, isymbol, obfd, osymbol))
+
+
+File: bfd.info,  Node: Archives,  Next: Formats,  Prev: Symbols,  Up: BFD front end
+
+2.8 Archives
+============
+
+*Description*
+An archive (or library) is just another BFD.  It has a symbol table,
+although there's not much a user program will do with it.
+
+   The big difference between an archive BFD and an ordinary BFD is
+that the archive doesn't have sections.  Instead it has a chain of BFDs
+that are considered its contents.  These BFDs can be manipulated like
+any other.  The BFDs contained in an archive opened for reading will
+all be opened for reading.  You may put either input or output BFDs
+into an archive opened for output; they will be handled correctly when
+the archive is closed.
+
+   Use `bfd_openr_next_archived_file' to step through the contents of
+an archive opened for input.  You don't have to read the entire archive
+if you don't want to!  Read it until you find what you want.
+
+   Archive contents of output BFDs are chained through the `next'
+pointer in a BFD.  The first one is findable through the `archive_head'
+slot of the archive.  Set it with `bfd_set_archive_head' (q.v.).  A
+given BFD may be in only one open output archive at a time.
+
+   As expected, the BFD archive code is more general than the archive
+code of any given environment.  BFD archives may contain files of
+different formats (e.g., a.out and coff) and even different
+architectures.  You may even place archives recursively into archives!
+
+   This can cause unexpected confusion, since some archive formats are
+more expressive than others.  For instance, Intel COFF archives can
+preserve long filenames; SunOS a.out archives cannot.  If you move a
+file from the first to the second format and back again, the filename
+may be truncated.  Likewise, different a.out environments have different
+conventions as to how they truncate filenames, whether they preserve
+directory names in filenames, etc.  When interoperating with native
+tools, be sure your files are homogeneous.
+
+   Beware: most of these formats do not react well to the presence of
+spaces in filenames.  We do the best we can, but can't always handle
+this case due to restrictions in the format of archives.  Many Unix
+utilities are braindead in regards to spaces and such in filenames
+anyway, so this shouldn't be much of a restriction.
+
+   Archives are supported in BFD in `archive.c'.
+
+2.8.1 Archive functions
+-----------------------
+
+2.8.1.1 `bfd_get_next_mapent'
+.............................
+
+*Synopsis*
+     symindex bfd_get_next_mapent
+        (bfd *abfd, symindex previous, carsym **sym);
+   *Description*
+Step through archive ABFD's symbol table (if it has one).  Successively
+update SYM with the next symbol's information, returning that symbol's
+(internal) index into the symbol table.
+
+   Supply `BFD_NO_MORE_SYMBOLS' as the PREVIOUS entry to get the first
+one; returns `BFD_NO_MORE_SYMBOLS' when you've already got the last one.
+
+   A `carsym' is a canonical archive symbol.  The only user-visible
+element is its name, a null-terminated string.
+
+2.8.1.2 `bfd_set_archive_head'
+..............................
+
+*Synopsis*
+     bfd_boolean bfd_set_archive_head (bfd *output, bfd *new_head);
+   *Description*
+Set the head of the chain of BFDs contained in the archive OUTPUT to
+NEW_HEAD.
+
+2.8.1.3 `bfd_openr_next_archived_file'
+......................................
+
+*Synopsis*
+     bfd *bfd_openr_next_archived_file (bfd *archive, bfd *previous);
+   *Description*
+Provided a BFD, ARCHIVE, containing an archive and NULL, open an input
+BFD on the first contained element and returns that.  Subsequent calls
+should pass the archive and the previous return value to return a
+created BFD to the next contained element. NULL is returned when there
+are no more.
+
+
+File: bfd.info,  Node: Formats,  Next: Relocations,  Prev: Archives,  Up: BFD front end
+
+2.9 File formats
+================
+
+A format is a BFD concept of high level file contents type. The formats
+supported by BFD are:
+
+   * `bfd_object'
+   The BFD may contain data, symbols, relocations and debug info.
+
+   * `bfd_archive'
+   The BFD contains other BFDs and an optional index.
+
+   * `bfd_core'
+   The BFD contains the result of an executable core dump.
+
+2.9.1 File format functions
+---------------------------
+
+2.9.1.1 `bfd_check_format'
+..........................
+
+*Synopsis*
+     bfd_boolean bfd_check_format (bfd *abfd, bfd_format format);
+   *Description*
+Verify if the file attached to the BFD ABFD is compatible with the
+format FORMAT (i.e., one of `bfd_object', `bfd_archive' or `bfd_core').
+
+   If the BFD has been set to a specific target before the call, only
+the named target and format combination is checked. If the target has
+not been set, or has been set to `default', then all the known target
+backends is interrogated to determine a match.  If the default target
+matches, it is used.  If not, exactly one target must recognize the
+file, or an error results.
+
+   The function returns `TRUE' on success, otherwise `FALSE' with one
+of the following error codes:
+
+   * `bfd_error_invalid_operation' - if `format' is not one of
+     `bfd_object', `bfd_archive' or `bfd_core'.
+
+   * `bfd_error_system_call' - if an error occured during a read - even
+     some file mismatches can cause bfd_error_system_calls.
+
+   * `file_not_recognised' - none of the backends recognised the file
+     format.
+
+   * `bfd_error_file_ambiguously_recognized' - more than one backend
+     recognised the file format.
+
+2.9.1.2 `bfd_check_format_matches'
+..................................
+
+*Synopsis*
+     bfd_boolean bfd_check_format_matches
+        (bfd *abfd, bfd_format format, char ***matching);
+   *Description*
+Like `bfd_check_format', except when it returns FALSE with `bfd_errno'
+set to `bfd_error_file_ambiguously_recognized'.  In that case, if
+MATCHING is not NULL, it will be filled in with a NULL-terminated list
+of the names of the formats that matched, allocated with `malloc'.
+Then the user may choose a format and try again.
+
+   When done with the list that MATCHING points to, the caller should
+free it.
+
+2.9.1.3 `bfd_set_format'
+........................
+
+*Synopsis*
+     bfd_boolean bfd_set_format (bfd *abfd, bfd_format format);
+   *Description*
+This function sets the file format of the BFD ABFD to the format
+FORMAT. If the target set in the BFD does not support the format
+requested, the format is invalid, or the BFD is not open for writing,
+then an error occurs.
+
+2.9.1.4 `bfd_format_string'
+...........................
+
+*Synopsis*
+     const char *bfd_format_string (bfd_format format);
+   *Description*
+Return a pointer to a const string `invalid', `object', `archive',
+`core', or `unknown', depending upon the value of FORMAT.
+
+
+File: bfd.info,  Node: Relocations,  Next: Core Files,  Prev: Formats,  Up: BFD front end
+
+2.10 Relocations
+================
+
+BFD maintains relocations in much the same way it maintains symbols:
+they are left alone until required, then read in en-masse and
+translated into an internal form.  A common routine
+`bfd_perform_relocation' acts upon the canonical form to do the fixup.
+
+   Relocations are maintained on a per section basis, while symbols are
+maintained on a per BFD basis.
+
+   All that a back end has to do to fit the BFD interface is to create
+a `struct reloc_cache_entry' for each relocation in a particular
+section, and fill in the right bits of the structures.
+
+* Menu:
+
+* typedef arelent::
+* howto manager::
+
+
+File: bfd.info,  Node: typedef arelent,  Next: howto manager,  Prev: Relocations,  Up: Relocations
+
+2.10.1 typedef arelent
+----------------------
+
+This is the structure of a relocation entry:
+
+
+     typedef enum bfd_reloc_status
+     {
+       /* No errors detected.  */
+       bfd_reloc_ok,
+
+       /* The relocation was performed, but there was an overflow.  */
+       bfd_reloc_overflow,
+
+       /* The address to relocate was not within the section supplied.  */
+       bfd_reloc_outofrange,
+
+       /* Used by special functions.  */
+       bfd_reloc_continue,
+
+       /* Unsupported relocation size requested.  */
+       bfd_reloc_notsupported,
+
+       /* Unused.  */
+       bfd_reloc_other,
+
+       /* The symbol to relocate against was undefined.  */
+       bfd_reloc_undefined,
+
+       /* The relocation was performed, but may not be ok - presently
+          generated only when linking i960 coff files with i960 b.out
+          symbols.  If this type is returned, the error_message argument
+          to bfd_perform_relocation will be set.  */
+       bfd_reloc_dangerous
+      }
+      bfd_reloc_status_type;
+
+
+     typedef struct reloc_cache_entry
+     {
+       /* A pointer into the canonical table of pointers.  */
+       struct bfd_symbol **sym_ptr_ptr;
+
+       /* offset in section.  */
+       bfd_size_type address;
+
+       /* addend for relocation value.  */
+       bfd_vma addend;
+
+       /* Pointer to how to perform the required relocation.  */
+       reloc_howto_type *howto;
+
+     }
+     arelent;
+   *Description*
+Here is a description of each of the fields within an `arelent':
+
+   * `sym_ptr_ptr'
+   The symbol table pointer points to a pointer to the symbol
+associated with the relocation request.  It is the pointer into the
+table returned by the back end's `canonicalize_symtab' action. *Note
+Symbols::. The symbol is referenced through a pointer to a pointer so
+that tools like the linker can fix up all the symbols of the same name
+by modifying only one pointer. The relocation routine looks in the
+symbol and uses the base of the section the symbol is attached to and
+the value of the symbol as the initial relocation offset. If the symbol
+pointer is zero, then the section provided is looked up.
+
+   * `address'
+   The `address' field gives the offset in bytes from the base of the
+section data which owns the relocation record to the first byte of
+relocatable information. The actual data relocated will be relative to
+this point; for example, a relocation type which modifies the bottom
+two bytes of a four byte word would not touch the first byte pointed to
+in a big endian world.
+
+   * `addend'
+   The `addend' is a value provided by the back end to be added (!)  to
+the relocation offset. Its interpretation is dependent upon the howto.
+For example, on the 68k the code:
+
+             char foo[];
+             main()
+                     {
+                     return foo[0x12345678];
+                     }
+
+   Could be compiled into:
+
+             linkw fp,#-4
+             moveb @#12345678,d0
+             extbl d0
+             unlk fp
+             rts
+
+   This could create a reloc pointing to `foo', but leave the offset in
+the data, something like:
+
+     RELOCATION RECORDS FOR [.text]:
+     offset   type      value
+     00000006 32        _foo
+
+     00000000 4e56 fffc          ; linkw fp,#-4
+     00000004 1039 1234 5678     ; moveb @#12345678,d0
+     0000000a 49c0               ; extbl d0
+     0000000c 4e5e               ; unlk fp
+     0000000e 4e75               ; rts
+
+   Using coff and an 88k, some instructions don't have enough space in
+them to represent the full address range, and pointers have to be
+loaded in two parts. So you'd get something like:
+
+             or.u     r13,r0,hi16(_foo+0x12345678)
+             ld.b     r2,r13,lo16(_foo+0x12345678)
+             jmp      r1
+
+   This should create two relocs, both pointing to `_foo', and with
+0x12340000 in their addend field. The data would consist of:
+
+     RELOCATION RECORDS FOR [.text]:
+     offset   type      value
+     00000002 HVRT16    _foo+0x12340000
+     00000006 LVRT16    _foo+0x12340000
+
+     00000000 5da05678           ; or.u r13,r0,0x5678
+     00000004 1c4d5678           ; ld.b r2,r13,0x5678
+     00000008 f400c001           ; jmp r1
+
+   The relocation routine digs out the value from the data, adds it to
+the addend to get the original offset, and then adds the value of
+`_foo'. Note that all 32 bits have to be kept around somewhere, to cope
+with carry from bit 15 to bit 16.
+
+   One further example is the sparc and the a.out format. The sparc has
+a similar problem to the 88k, in that some instructions don't have room
+for an entire offset, but on the sparc the parts are created in odd
+sized lumps. The designers of the a.out format chose to not use the
+data within the section for storing part of the offset; all the offset
+is kept within the reloc. Anything in the data should be ignored.
+
+             save %sp,-112,%sp
+             sethi %hi(_foo+0x12345678),%g2
+             ldsb [%g2+%lo(_foo+0x12345678)],%i0
+             ret
+             restore
+
+   Both relocs contain a pointer to `foo', and the offsets contain junk.
+
+     RELOCATION RECORDS FOR [.text]:
+     offset   type      value
+     00000004 HI22      _foo+0x12345678
+     00000008 LO10      _foo+0x12345678
+
+     00000000 9de3bf90     ; save %sp,-112,%sp
+     00000004 05000000     ; sethi %hi(_foo+0),%g2
+     00000008 f048a000     ; ldsb [%g2+%lo(_foo+0)],%i0
+     0000000c 81c7e008     ; ret
+     00000010 81e80000     ; restore
+
+   * `howto'
+   The `howto' field can be imagined as a relocation instruction. It is
+a pointer to a structure which contains information on what to do with
+all of the other information in the reloc record and data section. A
+back end would normally have a relocation instruction set and turn
+relocations into pointers to the correct structure on input - but it
+would be possible to create each howto field on demand.
+
+2.10.1.1 `enum complain_overflow'
+.................................
+
+Indicates what sort of overflow checking should be done when performing
+a relocation.
+
+
+     enum complain_overflow
+     {
+       /* Do not complain on overflow.  */
+       complain_overflow_dont,
+
+       /* Complain if the value overflows when considered as a signed
+          number one bit larger than the field.  ie. A bitfield of N bits
+          is allowed to represent -2**n to 2**n-1.  */
+       complain_overflow_bitfield,
+
+       /* Complain if the value overflows when considered as a signed
+          number.  */
+       complain_overflow_signed,
+
+       /* Complain if the value overflows when considered as an
+          unsigned number.  */
+       complain_overflow_unsigned
+     };
+
+2.10.1.2 `reloc_howto_type'
+...........................
+
+The `reloc_howto_type' is a structure which contains all the
+information that libbfd needs to know to tie up a back end's data.
+
+     struct bfd_symbol;             /* Forward declaration.  */
+
+     struct reloc_howto_struct
+     {
+       /*  The type field has mainly a documentary use - the back end can
+           do what it wants with it, though normally the back end's
+           external idea of what a reloc number is stored
+           in this field.  For example, a PC relative word relocation
+           in a coff environment has the type 023 - because that's
+           what the outside world calls a R_PCRWORD reloc.  */
+       unsigned int type;
+
+       /*  The value the final relocation is shifted right by.  This drops
+           unwanted data from the relocation.  */
+       unsigned int rightshift;
+
+       /*  The size of the item to be relocated.  This is *not* a
+           power-of-two measure.  To get the number of bytes operated
+           on by a type of relocation, use bfd_get_reloc_size.  */
+       int size;
+
+       /*  The number of bits in the item to be relocated.  This is used
+           when doing overflow checking.  */
+       unsigned int bitsize;
+
+       /*  Notes that the relocation is relative to the location in the
+           data section of the addend.  The relocation function will
+           subtract from the relocation value the address of the location
+           being relocated.  */
+       bfd_boolean pc_relative;
+
+       /*  The bit position of the reloc value in the destination.
+           The relocated value is left shifted by this amount.  */
+       unsigned int bitpos;
+
+       /* What type of overflow error should be checked for when
+          relocating.  */
+       enum complain_overflow complain_on_overflow;
+
+       /* If this field is non null, then the supplied function is
+          called rather than the normal function.  This allows really
+          strange relocation methods to be accommodated (e.g., i960 callj
+          instructions).  */
+       bfd_reloc_status_type (*special_function)
+         (bfd *, arelent *, struct bfd_symbol *, void *, asection *,
+          bfd *, char **);
+
+       /* The textual name of the relocation type.  */
+       char *name;
+
+       /* Some formats record a relocation addend in the section contents
+          rather than with the relocation.  For ELF formats this is the
+          distinction between USE_REL and USE_RELA (though the code checks
+          for USE_REL == 1/0).  The value of this field is TRUE if the
+          addend is recorded with the section contents; when performing a
+          partial link (ld -r) the section contents (the data) will be
+          modified.  The value of this field is FALSE if addends are
+          recorded with the relocation (in arelent.addend); when performing
+          a partial link the relocation will be modified.
+          All relocations for all ELF USE_RELA targets should set this field
+          to FALSE (values of TRUE should be looked on with suspicion).
+          However, the converse is not true: not all relocations of all ELF
+          USE_REL targets set this field to TRUE.  Why this is so is peculiar
+          to each particular target.  For relocs that aren't used in partial
+          links (e.g. GOT stuff) it doesn't matter what this is set to.  */
+       bfd_boolean partial_inplace;
+
+       /* src_mask selects the part of the instruction (or data) to be used
+          in the relocation sum.  If the target relocations don't have an
+          addend in the reloc, eg. ELF USE_REL, src_mask will normally equal
+          dst_mask to extract the addend from the section contents.  If
+          relocations do have an addend in the reloc, eg. ELF USE_RELA, this
+          field should be zero.  Non-zero values for ELF USE_RELA targets are
+          bogus as in those cases the value in the dst_mask part of the
+          section contents should be treated as garbage.  */
+       bfd_vma src_mask;
+
+       /* dst_mask selects which parts of the instruction (or data) are
+          replaced with a relocated value.  */
+       bfd_vma dst_mask;
+
+       /* When some formats create PC relative instructions, they leave
+          the value of the pc of the place being relocated in the offset
+          slot of the instruction, so that a PC relative relocation can
+          be made just by adding in an ordinary offset (e.g., sun3 a.out).
+          Some formats leave the displacement part of an instruction
+          empty (e.g., m88k bcs); this flag signals the fact.  */
+       bfd_boolean pcrel_offset;
+     };
+   
+2.10.1.3 `The HOWTO Macro'
+..........................
+
+*Description*
+The HOWTO define is horrible and will go away.
+     #define HOWTO(C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC) \
+       { (unsigned) C, R, S, B, P, BI, O, SF, NAME, INPLACE, MASKSRC, MASKDST, PC }
+
+   *Description*
+And will be replaced with the totally magic way. But for the moment, we
+are compatible, so do it this way.
+     #define NEWHOWTO(FUNCTION, NAME, SIZE, REL, IN) \
+       HOWTO (0, 0, SIZE, 0, REL, 0, complain_overflow_dont, FUNCTION, \
+              NAME, FALSE, 0, 0, IN)
+
+   *Description*
+This is used to fill in an empty howto entry in an array.
+     #define EMPTY_HOWTO(C) \
+       HOWTO ((C), 0, 0, 0, FALSE, 0, complain_overflow_dont, NULL, \
+              NULL, FALSE, 0, 0, FALSE)
+
+   *Description*
+Helper routine to turn a symbol into a relocation value.
+     #define HOWTO_PREPARE(relocation, symbol)               \
+       {                                                     \
+         if (symbol != NULL)                                 \
+           {                                                 \
+             if (bfd_is_com_section (symbol->section))       \
+               {                                             \
+                 relocation = 0;                             \
+               }                                             \
+             else                                            \
+               {                                             \
+                 relocation = symbol->value;                 \
+               }                                             \
+           }                                                 \
+       }
+
+2.10.1.4 `bfd_get_reloc_size'
+.............................
+
+*Synopsis*
+     unsigned int bfd_get_reloc_size (reloc_howto_type *);
+   *Description*
+For a reloc_howto_type that operates on a fixed number of bytes, this
+returns the number of bytes operated on.
+
+2.10.1.5 `arelent_chain'
+........................
+
+*Description*
+How relocs are tied together in an `asection':
+     typedef struct relent_chain
+     {
+       arelent relent;
+       struct relent_chain *next;
+     }
+     arelent_chain;
+
+2.10.1.6 `bfd_check_overflow'
+.............................
+
+*Synopsis*
+     bfd_reloc_status_type bfd_check_overflow
+        (enum complain_overflow how,
+         unsigned int bitsize,
+         unsigned int rightshift,
+         unsigned int addrsize,
+         bfd_vma relocation);
+   *Description*
+Perform overflow checking on RELOCATION which has BITSIZE significant
+bits and will be shifted right by RIGHTSHIFT bits, on a machine with
+addresses containing ADDRSIZE significant bits.  The result is either of
+`bfd_reloc_ok' or `bfd_reloc_overflow'.
+
+2.10.1.7 `bfd_perform_relocation'
+.................................
+
+*Synopsis*
+     bfd_reloc_status_type bfd_perform_relocation
+        (bfd *abfd,
+         arelent *reloc_entry,
+         void *data,
+         asection *input_section,
+         bfd *output_bfd,
+         char **error_message);
+   *Description*
+If OUTPUT_BFD is supplied to this function, the generated image will be
+relocatable; the relocations are copied to the output file after they
+have been changed to reflect the new state of the world. There are two
+ways of reflecting the results of partial linkage in an output file: by
+modifying the output data in place, and by modifying the relocation
+record.  Some native formats (e.g., basic a.out and basic coff) have no
+way of specifying an addend in the relocation type, so the addend has
+to go in the output data.  This is no big deal since in these formats
+the output data slot will always be big enough for the addend. Complex
+reloc types with addends were invented to solve just this problem.  The
+ERROR_MESSAGE argument is set to an error message if this return
+`bfd_reloc_dangerous'.
+
+2.10.1.8 `bfd_install_relocation'
+.................................
+
+*Synopsis*
+     bfd_reloc_status_type bfd_install_relocation
+        (bfd *abfd,
+         arelent *reloc_entry,
+         void *data, bfd_vma data_start,
+         asection *input_section,
+         char **error_message);
+   *Description*
+This looks remarkably like `bfd_perform_relocation', except it does not
+expect that the section contents have been filled in.  I.e., it's
+suitable for use when creating, rather than applying a relocation.
+
+   For now, this function should be considered reserved for the
+assembler.
+
+
+File: bfd.info,  Node: howto manager,  Prev: typedef arelent,  Up: Relocations
+
+2.10.2 The howto manager
+------------------------
+
+When an application wants to create a relocation, but doesn't know what
+the target machine might call it, it can find out by using this bit of
+code.
+
+2.10.2.1 `bfd_reloc_code_type'
+..............................
+
+*Description*
+The insides of a reloc code.  The idea is that, eventually, there will
+be one enumerator for every type of relocation we ever do.  Pass one of
+these values to `bfd_reloc_type_lookup', and it'll return a howto
+pointer.
+
+   This does mean that the application must determine the correct
+enumerator value; you can't get a howto pointer from a random set of
+attributes.
+
+   Here are the possible values for `enum bfd_reloc_code_real':
+
+ -- : BFD_RELOC_64
+ -- : BFD_RELOC_32
+ -- : BFD_RELOC_26
+ -- : BFD_RELOC_24
+ -- : BFD_RELOC_16
+ -- : BFD_RELOC_14
+ -- : BFD_RELOC_8
+     Basic absolute relocations of N bits.
+
+ -- : BFD_RELOC_64_PCREL
+ -- : BFD_RELOC_32_PCREL
+ -- : BFD_RELOC_24_PCREL
+ -- : BFD_RELOC_16_PCREL
+ -- : BFD_RELOC_12_PCREL
+ -- : BFD_RELOC_8_PCREL
+     PC-relative relocations.  Sometimes these are relative to the
+     address of the relocation itself; sometimes they are relative to
+     the start of the section containing the relocation.  It depends on
+     the specific target.
+
+     The 24-bit relocation is used in some Intel 960 configurations.
+
+ -- : BFD_RELOC_32_SECREL
+     Section relative relocations.  Some targets need this for DWARF2.
+
+ -- : BFD_RELOC_32_GOT_PCREL
+ -- : BFD_RELOC_16_GOT_PCREL
+ -- : BFD_RELOC_8_GOT_PCREL
+ -- : BFD_RELOC_32_GOTOFF
+ -- : BFD_RELOC_16_GOTOFF
+ -- : BFD_RELOC_LO16_GOTOFF
+ -- : BFD_RELOC_HI16_GOTOFF
+ -- : BFD_RELOC_HI16_S_GOTOFF
+ -- : BFD_RELOC_8_GOTOFF
+ -- : BFD_RELOC_64_PLT_PCREL
+ -- : BFD_RELOC_32_PLT_PCREL
+ -- : BFD_RELOC_24_PLT_PCREL
+ -- : BFD_RELOC_16_PLT_PCREL
+ -- : BFD_RELOC_8_PLT_PCREL
+ -- : BFD_RELOC_64_PLTOFF
+ -- : BFD_RELOC_32_PLTOFF
+ -- : BFD_RELOC_16_PLTOFF
+ -- : BFD_RELOC_LO16_PLTOFF
+ -- : BFD_RELOC_HI16_PLTOFF
+ -- : BFD_RELOC_HI16_S_PLTOFF
+ -- : BFD_RELOC_8_PLTOFF
+     For ELF.
+
+ -- : BFD_RELOC_68K_GLOB_DAT
+ -- : BFD_RELOC_68K_JMP_SLOT
+ -- : BFD_RELOC_68K_RELATIVE
+ -- : BFD_RELOC_68K_TLS_GD32
+ -- : BFD_RELOC_68K_TLS_GD16
+ -- : BFD_RELOC_68K_TLS_GD8
+ -- : BFD_RELOC_68K_TLS_LDM32
+ -- : BFD_RELOC_68K_TLS_LDM16
+ -- : BFD_RELOC_68K_TLS_LDM8
+ -- : BFD_RELOC_68K_TLS_LDO32
+ -- : BFD_RELOC_68K_TLS_LDO16
+ -- : BFD_RELOC_68K_TLS_LDO8
+ -- : BFD_RELOC_68K_TLS_IE32
+ -- : BFD_RELOC_68K_TLS_IE16
+ -- : BFD_RELOC_68K_TLS_IE8
+ -- : BFD_RELOC_68K_TLS_LE32
+ -- : BFD_RELOC_68K_TLS_LE16
+ -- : BFD_RELOC_68K_TLS_LE8
+     Relocations used by 68K ELF.
+
+ -- : BFD_RELOC_32_BASEREL
+ -- : BFD_RELOC_16_BASEREL
+ -- : BFD_RELOC_LO16_BASEREL
+ -- : BFD_RELOC_HI16_BASEREL
+ -- : BFD_RELOC_HI16_S_BASEREL
+ -- : BFD_RELOC_8_BASEREL
+ -- : BFD_RELOC_RVA
+     Linkage-table relative.
+
+ -- : BFD_RELOC_8_FFnn
+     Absolute 8-bit relocation, but used to form an address like 0xFFnn.
+
+ -- : BFD_RELOC_32_PCREL_S2
+ -- : BFD_RELOC_16_PCREL_S2
+ -- : BFD_RELOC_23_PCREL_S2
+     These PC-relative relocations are stored as word displacements -
+     i.e., byte displacements shifted right two bits.  The 30-bit word
+     displacement (<<32_PCREL_S2>> - 32 bits, shifted 2) is used on the
+     SPARC.  (SPARC tools generally refer to this as <<WDISP30>>.)  The
+     signed 16-bit displacement is used on the MIPS, and the 23-bit
+     displacement is used on the Alpha.
+
+ -- : BFD_RELOC_HI22
+ -- : BFD_RELOC_LO10
+     High 22 bits and low 10 bits of 32-bit value, placed into lower
+     bits of the target word.  These are used on the SPARC.
+
+ -- : BFD_RELOC_GPREL16
+ -- : BFD_RELOC_GPREL32
+     For systems that allocate a Global Pointer register, these are
+     displacements off that register.  These relocation types are
+     handled specially, because the value the register will have is
+     decided relatively late.
+
+ -- : BFD_RELOC_I960_CALLJ
+     Reloc types used for i960/b.out.
+
+ -- : BFD_RELOC_NONE
+ -- : BFD_RELOC_SPARC_WDISP22
+ -- : BFD_RELOC_SPARC22
+ -- : BFD_RELOC_SPARC13
+ -- : BFD_RELOC_SPARC_GOT10
+ -- : BFD_RELOC_SPARC_GOT13
+ -- : BFD_RELOC_SPARC_GOT22
+ -- : BFD_RELOC_SPARC_PC10
+ -- : BFD_RELOC_SPARC_PC22
+ -- : BFD_RELOC_SPARC_WPLT30
+ -- : BFD_RELOC_SPARC_COPY
+ -- : BFD_RELOC_SPARC_GLOB_DAT
+ -- : BFD_RELOC_SPARC_JMP_SLOT
+ -- : BFD_RELOC_SPARC_RELATIVE
+ -- : BFD_RELOC_SPARC_UA16
+ -- : BFD_RELOC_SPARC_UA32
+ -- : BFD_RELOC_SPARC_UA64
+ -- : BFD_RELOC_SPARC_GOTDATA_HIX22
+ -- : BFD_RELOC_SPARC_GOTDATA_LOX10
+ -- : BFD_RELOC_SPARC_GOTDATA_OP_HIX22
+ -- : BFD_RELOC_SPARC_GOTDATA_OP_LOX10
+ -- : BFD_RELOC_SPARC_GOTDATA_OP
+     SPARC ELF relocations.  There is probably some overlap with other
+     relocation types already defined.
+
+ -- : BFD_RELOC_SPARC_BASE13
+ -- : BFD_RELOC_SPARC_BASE22
+     I think these are specific to SPARC a.out (e.g., Sun 4).
+
+ -- : BFD_RELOC_SPARC_64
+ -- : BFD_RELOC_SPARC_10
+ -- : BFD_RELOC_SPARC_11
+ -- : BFD_RELOC_SPARC_OLO10
+ -- : BFD_RELOC_SPARC_HH22
+ -- : BFD_RELOC_SPARC_HM10
+ -- : BFD_RELOC_SPARC_LM22
+ -- : BFD_RELOC_SPARC_PC_HH22
+ -- : BFD_RELOC_SPARC_PC_HM10
+ -- : BFD_RELOC_SPARC_PC_LM22
+ -- : BFD_RELOC_SPARC_WDISP16
+ -- : BFD_RELOC_SPARC_WDISP19
+ -- : BFD_RELOC_SPARC_7
+ -- : BFD_RELOC_SPARC_6
+ -- : BFD_RELOC_SPARC_5
+ -- : BFD_RELOC_SPARC_DISP64
+ -- : BFD_RELOC_SPARC_PLT32
+ -- : BFD_RELOC_SPARC_PLT64
+ -- : BFD_RELOC_SPARC_HIX22
+ -- : BFD_RELOC_SPARC_LOX10
+ -- : BFD_RELOC_SPARC_H44
+ -- : BFD_RELOC_SPARC_M44
+ -- : BFD_RELOC_SPARC_L44
+ -- : BFD_RELOC_SPARC_REGISTER
+     SPARC64 relocations
+
+ -- : BFD_RELOC_SPARC_REV32
+     SPARC little endian relocation
+
+ -- : BFD_RELOC_SPARC_TLS_GD_HI22
+ -- : BFD_RELOC_SPARC_TLS_GD_LO10
+ -- : BFD_RELOC_SPARC_TLS_GD_ADD
+ -- : BFD_RELOC_SPARC_TLS_GD_CALL
+ -- : BFD_RELOC_SPARC_TLS_LDM_HI22
+ -- : BFD_RELOC_SPARC_TLS_LDM_LO10
+ -- : BFD_RELOC_SPARC_TLS_LDM_ADD
+ -- : BFD_RELOC_SPARC_TLS_LDM_CALL
+ -- : BFD_RELOC_SPARC_TLS_LDO_HIX22
+ -- : BFD_RELOC_SPARC_TLS_LDO_LOX10
+ -- : BFD_RELOC_SPARC_TLS_LDO_ADD
+ -- : BFD_RELOC_SPARC_TLS_IE_HI22
+ -- : BFD_RELOC_SPARC_TLS_IE_LO10
+ -- : BFD_RELOC_SPARC_TLS_IE_LD
+ -- : BFD_RELOC_SPARC_TLS_IE_LDX
+ -- : BFD_RELOC_SPARC_TLS_IE_ADD
+ -- : BFD_RELOC_SPARC_TLS_LE_HIX22
+ -- : BFD_RELOC_SPARC_TLS_LE_LOX10
+ -- : BFD_RELOC_SPARC_TLS_DTPMOD32
+ -- : BFD_RELOC_SPARC_TLS_DTPMOD64
+ -- : BFD_RELOC_SPARC_TLS_DTPOFF32
+ -- : BFD_RELOC_SPARC_TLS_DTPOFF64
+ -- : BFD_RELOC_SPARC_TLS_TPOFF32
+ -- : BFD_RELOC_SPARC_TLS_TPOFF64
+     SPARC TLS relocations
+
+ -- : BFD_RELOC_SPU_IMM7
+ -- : BFD_RELOC_SPU_IMM8
+ -- : BFD_RELOC_SPU_IMM10
+ -- : BFD_RELOC_SPU_IMM10W
+ -- : BFD_RELOC_SPU_IMM16
+ -- : BFD_RELOC_SPU_IMM16W
+ -- : BFD_RELOC_SPU_IMM18
+ -- : BFD_RELOC_SPU_PCREL9a
+ -- : BFD_RELOC_SPU_PCREL9b
+ -- : BFD_RELOC_SPU_PCREL16
+ -- : BFD_RELOC_SPU_LO16
+ -- : BFD_RELOC_SPU_HI16
+ -- : BFD_RELOC_SPU_PPU32
+ -- : BFD_RELOC_SPU_PPU64
+ -- : BFD_RELOC_SPU_ADD_PIC
+     SPU Relocations.
+
+ -- : BFD_RELOC_ALPHA_GPDISP_HI16
+     Alpha ECOFF and ELF relocations.  Some of these treat the symbol or
+     "addend" in some special way.  For GPDISP_HI16 ("gpdisp")
+     relocations, the symbol is ignored when writing; when reading, it
+     will be the absolute section symbol.  The addend is the
+     displacement in bytes of the "lda" instruction from the "ldah"
+     instruction (which is at the address of this reloc).
+
+ -- : BFD_RELOC_ALPHA_GPDISP_LO16
+     For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
+     with GPDISP_HI16 relocs.  The addend is ignored when writing the
+     relocations out, and is filled in with the file's GP value on
+     reading, for convenience.
+
+ -- : BFD_RELOC_ALPHA_GPDISP
+     The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
+     relocation except that there is no accompanying GPDISP_LO16
+     relocation.
+
+ -- : BFD_RELOC_ALPHA_LITERAL
+ -- : BFD_RELOC_ALPHA_ELF_LITERAL
+ -- : BFD_RELOC_ALPHA_LITUSE
+     The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
+     the assembler turns it into a LDQ instruction to load the address
+     of the symbol, and then fills in a register in the real
+     instruction.
+
+     The LITERAL reloc, at the LDQ instruction, refers to the .lita
+     section symbol.  The addend is ignored when writing, but is filled
+     in with the file's GP value on reading, for convenience, as with
+     the GPDISP_LO16 reloc.
+
+     The ELF_LITERAL reloc is somewhere between 16_GOTOFF and
+     GPDISP_LO16.  It should refer to the symbol to be referenced, as
+     with 16_GOTOFF, but it generates output not based on the position
+     within the .got section, but relative to the GP value chosen for
+     the file during the final link stage.
+
+     The LITUSE reloc, on the instruction using the loaded address,
+     gives information to the linker that it might be able to use to
+     optimize away some literal section references.  The symbol is
+     ignored (read as the absolute section symbol), and the "addend"
+     indicates the type of instruction using the register: 1 - "memory"
+     fmt insn 2 - byte-manipulation (byte offset reg) 3 - jsr (target
+     of branch)
+
+ -- : BFD_RELOC_ALPHA_HINT
+     The HINT relocation indicates a value that should be filled into
+     the "hint" field of a jmp/jsr/ret instruction, for possible branch-
+     prediction logic which may be provided on some processors.
+
+ -- : BFD_RELOC_ALPHA_LINKAGE
+     The LINKAGE relocation outputs a linkage pair in the object file,
+     which is filled by the linker.
+
+ -- : BFD_RELOC_ALPHA_CODEADDR
+     The CODEADDR relocation outputs a STO_CA in the object file, which
+     is filled by the linker.
+
+ -- : BFD_RELOC_ALPHA_GPREL_HI16
+ -- : BFD_RELOC_ALPHA_GPREL_LO16
+     The GPREL_HI/LO relocations together form a 32-bit offset from the
+     GP register.
+
+ -- : BFD_RELOC_ALPHA_BRSGP
+     Like BFD_RELOC_23_PCREL_S2, except that the source and target must
+     share a common GP, and the target address is adjusted for
+     STO_ALPHA_STD_GPLOAD.
+
+ -- : BFD_RELOC_ALPHA_NOP
+     The NOP relocation outputs a NOP if the longword displacement
+     between two procedure entry points is < 2^21.
+
+ -- : BFD_RELOC_ALPHA_BSR
+     The BSR relocation outputs a BSR if the longword displacement
+     between two procedure entry points is < 2^21.
+
+ -- : BFD_RELOC_ALPHA_LDA
+     The LDA relocation outputs a LDA if the longword displacement
+     between two procedure entry points is < 2^16.
+
+ -- : BFD_RELOC_ALPHA_BOH
+     The BOH relocation outputs a BSR if the longword displacement
+     between two procedure entry points is < 2^21, or else a hint.
+
+ -- : BFD_RELOC_ALPHA_TLSGD
+ -- : BFD_RELOC_ALPHA_TLSLDM
+ -- : BFD_RELOC_ALPHA_DTPMOD64
+ -- : BFD_RELOC_ALPHA_GOTDTPREL16
+ -- : BFD_RELOC_ALPHA_DTPREL64
+ -- : BFD_RELOC_ALPHA_DTPREL_HI16
+ -- : BFD_RELOC_ALPHA_DTPREL_LO16
+ -- : BFD_RELOC_ALPHA_DTPREL16
+ -- : BFD_RELOC_ALPHA_GOTTPREL16
+ -- : BFD_RELOC_ALPHA_TPREL64
+ -- : BFD_RELOC_ALPHA_TPREL_HI16
+ -- : BFD_RELOC_ALPHA_TPREL_LO16
+ -- : BFD_RELOC_ALPHA_TPREL16
+     Alpha thread-local storage relocations.
+
+ -- : BFD_RELOC_MIPS_JMP
+     Bits 27..2 of the relocation address shifted right 2 bits; simple
+     reloc otherwise.
+
+ -- : BFD_RELOC_MIPS16_JMP
+     The MIPS16 jump instruction.
+
+ -- : BFD_RELOC_MIPS16_GPREL
+     MIPS16 GP relative reloc.
+
+ -- : BFD_RELOC_HI16
+     High 16 bits of 32-bit value; simple reloc.
+
+ -- : BFD_RELOC_HI16_S
+     High 16 bits of 32-bit value but the low 16 bits will be sign
+     extended and added to form the final result.  If the low 16 bits
+     form a negative number, we need to add one to the high value to
+     compensate for the borrow when the low bits are added.
+
+ -- : BFD_RELOC_LO16
+     Low 16 bits.
+
+ -- : BFD_RELOC_HI16_PCREL
+     High 16 bits of 32-bit pc-relative value
+
+ -- : BFD_RELOC_HI16_S_PCREL
+     High 16 bits of 32-bit pc-relative value, adjusted
+
+ -- : BFD_RELOC_LO16_PCREL
+     Low 16 bits of pc-relative value
+
+ -- : BFD_RELOC_MIPS16_GOT16
+ -- : BFD_RELOC_MIPS16_CALL16
+     Equivalent of BFD_RELOC_MIPS_*, but with the MIPS16 layout of
+     16-bit immediate fields
+
+ -- : BFD_RELOC_MIPS16_HI16
+     MIPS16 high 16 bits of 32-bit value.
+
+ -- : BFD_RELOC_MIPS16_HI16_S
+     MIPS16 high 16 bits of 32-bit value but the low 16 bits will be
+     sign extended and added to form the final result.  If the low 16
+     bits form a negative number, we need to add one to the high value
+     to compensate for the borrow when the low bits are added.
+
+ -- : BFD_RELOC_MIPS16_LO16
+     MIPS16 low 16 bits.
+
+ -- : BFD_RELOC_MIPS_LITERAL
+     Relocation against a MIPS literal section.
+
+ -- : BFD_RELOC_MIPS_GOT16
+ -- : BFD_RELOC_MIPS_CALL16
+ -- : BFD_RELOC_MIPS_GOT_HI16
+ -- : BFD_RELOC_MIPS_GOT_LO16
+ -- : BFD_RELOC_MIPS_CALL_HI16
+ -- : BFD_RELOC_MIPS_CALL_LO16
+ -- : BFD_RELOC_MIPS_SUB
+ -- : BFD_RELOC_MIPS_GOT_PAGE
+ -- : BFD_RELOC_MIPS_GOT_OFST
+ -- : BFD_RELOC_MIPS_GOT_DISP
+ -- : BFD_RELOC_MIPS_SHIFT5
+ -- : BFD_RELOC_MIPS_SHIFT6
+ -- : BFD_RELOC_MIPS_INSERT_A
+ -- : BFD_RELOC_MIPS_INSERT_B
+ -- : BFD_RELOC_MIPS_DELETE
+ -- : BFD_RELOC_MIPS_HIGHEST
+ -- : BFD_RELOC_MIPS_HIGHER
+ -- : BFD_RELOC_MIPS_SCN_DISP
+ -- : BFD_RELOC_MIPS_REL16
+ -- : BFD_RELOC_MIPS_RELGOT
+ -- : BFD_RELOC_MIPS_JALR
+ -- : BFD_RELOC_MIPS_TLS_DTPMOD32
+ -- : BFD_RELOC_MIPS_TLS_DTPREL32
+ -- : BFD_RELOC_MIPS_TLS_DTPMOD64
+ -- : BFD_RELOC_MIPS_TLS_DTPREL64
+ -- : BFD_RELOC_MIPS_TLS_GD
+ -- : BFD_RELOC_MIPS_TLS_LDM
+ -- : BFD_RELOC_MIPS_TLS_DTPREL_HI16
+ -- : BFD_RELOC_MIPS_TLS_DTPREL_LO16
+ -- : BFD_RELOC_MIPS_TLS_GOTTPREL
+ -- : BFD_RELOC_MIPS_TLS_TPREL32
+ -- : BFD_RELOC_MIPS_TLS_TPREL64
+ -- : BFD_RELOC_MIPS_TLS_TPREL_HI16
+ -- : BFD_RELOC_MIPS_TLS_TPREL_LO16
+     MIPS ELF relocations.
+
+ -- : BFD_RELOC_MIPS_COPY
+ -- : BFD_RELOC_MIPS_JUMP_SLOT
+     MIPS ELF relocations (VxWorks and PLT extensions).
+
+ -- : BFD_RELOC_MOXIE_10_PCREL
+     Moxie ELF relocations.
+
+ -- : BFD_RELOC_FRV_LABEL16
+ -- : BFD_RELOC_FRV_LABEL24
+ -- : BFD_RELOC_FRV_LO16
+ -- : BFD_RELOC_FRV_HI16
+ -- : BFD_RELOC_FRV_GPREL12
+ -- : BFD_RELOC_FRV_GPRELU12
+ -- : BFD_RELOC_FRV_GPREL32
+ -- : BFD_RELOC_FRV_GPRELHI
+ -- : BFD_RELOC_FRV_GPRELLO
+ -- : BFD_RELOC_FRV_GOT12
+ -- : BFD_RELOC_FRV_GOTHI
+ -- : BFD_RELOC_FRV_GOTLO
+ -- : BFD_RELOC_FRV_FUNCDESC
+ -- : BFD_RELOC_FRV_FUNCDESC_GOT12
+ -- : BFD_RELOC_FRV_FUNCDESC_GOTHI
+ -- : BFD_RELOC_FRV_FUNCDESC_GOTLO
+ -- : BFD_RELOC_FRV_FUNCDESC_VALUE
+ -- : BFD_RELOC_FRV_FUNCDESC_GOTOFF12
+ -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFHI
+ -- : BFD_RELOC_FRV_FUNCDESC_GOTOFFLO
+ -- : BFD_RELOC_FRV_GOTOFF12
+ -- : BFD_RELOC_FRV_GOTOFFHI
+ -- : BFD_RELOC_FRV_GOTOFFLO
+ -- : BFD_RELOC_FRV_GETTLSOFF
+ -- : BFD_RELOC_FRV_TLSDESC_VALUE
+ -- : BFD_RELOC_FRV_GOTTLSDESC12
+ -- : BFD_RELOC_FRV_GOTTLSDESCHI
+ -- : BFD_RELOC_FRV_GOTTLSDESCLO
+ -- : BFD_RELOC_FRV_TLSMOFF12
+ -- : BFD_RELOC_FRV_TLSMOFFHI
+ -- : BFD_RELOC_FRV_TLSMOFFLO
+ -- : BFD_RELOC_FRV_GOTTLSOFF12
+ -- : BFD_RELOC_FRV_GOTTLSOFFHI
+ -- : BFD_RELOC_FRV_GOTTLSOFFLO
+ -- : BFD_RELOC_FRV_TLSOFF
+ -- : BFD_RELOC_FRV_TLSDESC_RELAX
+ -- : BFD_RELOC_FRV_GETTLSOFF_RELAX
+ -- : BFD_RELOC_FRV_TLSOFF_RELAX
+ -- : BFD_RELOC_FRV_TLSMOFF
+     Fujitsu Frv Relocations.
+
+ -- : BFD_RELOC_MN10300_GOTOFF24
+     This is a 24bit GOT-relative reloc for the mn10300.
+
+ -- : BFD_RELOC_MN10300_GOT32
+     This is a 32bit GOT-relative reloc for the mn10300, offset by two
+     bytes in the instruction.
+
+ -- : BFD_RELOC_MN10300_GOT24
+     This is a 24bit GOT-relative reloc for the mn10300, offset by two
+     bytes in the instruction.
+
+ -- : BFD_RELOC_MN10300_GOT16
+     This is a 16bit GOT-relative reloc for the mn10300, offset by two
+     bytes in the instruction.
+
+ -- : BFD_RELOC_MN10300_COPY
+     Copy symbol at runtime.
+
+ -- : BFD_RELOC_MN10300_GLOB_DAT
+     Create GOT entry.
+
+ -- : BFD_RELOC_MN10300_JMP_SLOT
+     Create PLT entry.
+
+ -- : BFD_RELOC_MN10300_RELATIVE
+     Adjust by program base.
+
+ -- : BFD_RELOC_MN10300_SYM_DIFF
+     Together with another reloc targeted at the same location, allows
+     for a value that is the difference of two symbols in the same
+     section.
+
+ -- : BFD_RELOC_MN10300_ALIGN
+     The addend of this reloc is an alignment power that must be
+     honoured at the offset's location, regardless of linker relaxation.
+
+ -- : BFD_RELOC_386_GOT32
+ -- : BFD_RELOC_386_PLT32
+ -- : BFD_RELOC_386_COPY
+ -- : BFD_RELOC_386_GLOB_DAT
+ -- : BFD_RELOC_386_JUMP_SLOT
+ -- : BFD_RELOC_386_RELATIVE
+ -- : BFD_RELOC_386_GOTOFF
+ -- : BFD_RELOC_386_GOTPC
+ -- : BFD_RELOC_386_TLS_TPOFF
+ -- : BFD_RELOC_386_TLS_IE
+ -- : BFD_RELOC_386_TLS_GOTIE
+ -- : BFD_RELOC_386_TLS_LE
+ -- : BFD_RELOC_386_TLS_GD
+ -- : BFD_RELOC_386_TLS_LDM
+ -- : BFD_RELOC_386_TLS_LDO_32
+ -- : BFD_RELOC_386_TLS_IE_32
+ -- : BFD_RELOC_386_TLS_LE_32
+ -- : BFD_RELOC_386_TLS_DTPMOD32
+ -- : BFD_RELOC_386_TLS_DTPOFF32
+ -- : BFD_RELOC_386_TLS_TPOFF32
+ -- : BFD_RELOC_386_TLS_GOTDESC
+ -- : BFD_RELOC_386_TLS_DESC_CALL
+ -- : BFD_RELOC_386_TLS_DESC
+ -- : BFD_RELOC_386_IRELATIVE
+     i386/elf relocations
+
+ -- : BFD_RELOC_X86_64_GOT32
+ -- : BFD_RELOC_X86_64_PLT32
+ -- : BFD_RELOC_X86_64_COPY
+ -- : BFD_RELOC_X86_64_GLOB_DAT
+ -- : BFD_RELOC_X86_64_JUMP_SLOT
+ -- : BFD_RELOC_X86_64_RELATIVE
+ -- : BFD_RELOC_X86_64_GOTPCREL
+ -- : BFD_RELOC_X86_64_32S
+ -- : BFD_RELOC_X86_64_DTPMOD64
+ -- : BFD_RELOC_X86_64_DTPOFF64
+ -- : BFD_RELOC_X86_64_TPOFF64
+ -- : BFD_RELOC_X86_64_TLSGD
+ -- : BFD_RELOC_X86_64_TLSLD
+ -- : BFD_RELOC_X86_64_DTPOFF32
+ -- : BFD_RELOC_X86_64_GOTTPOFF
+ -- : BFD_RELOC_X86_64_TPOFF32
+ -- : BFD_RELOC_X86_64_GOTOFF64
+ -- : BFD_RELOC_X86_64_GOTPC32
+ -- : BFD_RELOC_X86_64_GOT64
+ -- : BFD_RELOC_X86_64_GOTPCREL64
+ -- : BFD_RELOC_X86_64_GOTPC64
+ -- : BFD_RELOC_X86_64_GOTPLT64
+ -- : BFD_RELOC_X86_64_PLTOFF64
+ -- : BFD_RELOC_X86_64_GOTPC32_TLSDESC
+ -- : BFD_RELOC_X86_64_TLSDESC_CALL
+ -- : BFD_RELOC_X86_64_TLSDESC
+ -- : BFD_RELOC_X86_64_IRELATIVE
+     x86-64/elf relocations
+
+ -- : BFD_RELOC_NS32K_IMM_8
+ -- : BFD_RELOC_NS32K_IMM_16
+ -- : BFD_RELOC_NS32K_IMM_32
+ -- : BFD_RELOC_NS32K_IMM_8_PCREL
+ -- : BFD_RELOC_NS32K_IMM_16_PCREL
+ -- : BFD_RELOC_NS32K_IMM_32_PCREL
+ -- : BFD_RELOC_NS32K_DISP_8
+ -- : BFD_RELOC_NS32K_DISP_16
+ -- : BFD_RELOC_NS32K_DISP_32
+ -- : BFD_RELOC_NS32K_DISP_8_PCREL
+ -- : BFD_RELOC_NS32K_DISP_16_PCREL
+ -- : BFD_RELOC_NS32K_DISP_32_PCREL
+     ns32k relocations
+
+ -- : BFD_RELOC_PDP11_DISP_8_PCREL
+ -- : BFD_RELOC_PDP11_DISP_6_PCREL
+     PDP11 relocations
+
+ -- : BFD_RELOC_PJ_CODE_HI16
+ -- : BFD_RELOC_PJ_CODE_LO16
+ -- : BFD_RELOC_PJ_CODE_DIR16
+ -- : BFD_RELOC_PJ_CODE_DIR32
+ -- : BFD_RELOC_PJ_CODE_REL16
+ -- : BFD_RELOC_PJ_CODE_REL32
+     Picojava relocs.  Not all of these appear in object files.
+
+ -- : BFD_RELOC_PPC_B26
+ -- : BFD_RELOC_PPC_BA26
+ -- : BFD_RELOC_PPC_TOC16
+ -- : BFD_RELOC_PPC_B16
+ -- : BFD_RELOC_PPC_B16_BRTAKEN
+ -- : BFD_RELOC_PPC_B16_BRNTAKEN
+ -- : BFD_RELOC_PPC_BA16
+ -- : BFD_RELOC_PPC_BA16_BRTAKEN
+ -- : BFD_RELOC_PPC_BA16_BRNTAKEN
+ -- : BFD_RELOC_PPC_COPY
+ -- : BFD_RELOC_PPC_GLOB_DAT
+ -- : BFD_RELOC_PPC_JMP_SLOT
+ -- : BFD_RELOC_PPC_RELATIVE
+ -- : BFD_RELOC_PPC_LOCAL24PC
+ -- : BFD_RELOC_PPC_EMB_NADDR32
+ -- : BFD_RELOC_PPC_EMB_NADDR16
+ -- : BFD_RELOC_PPC_EMB_NADDR16_LO
+ -- : BFD_RELOC_PPC_EMB_NADDR16_HI
+ -- : BFD_RELOC_PPC_EMB_NADDR16_HA
+ -- : BFD_RELOC_PPC_EMB_SDAI16
+ -- : BFD_RELOC_PPC_EMB_SDA2I16
+ -- : BFD_RELOC_PPC_EMB_SDA2REL
+ -- : BFD_RELOC_PPC_EMB_SDA21
+ -- : BFD_RELOC_PPC_EMB_MRKREF
+ -- : BFD_RELOC_PPC_EMB_RELSEC16
+ -- : BFD_RELOC_PPC_EMB_RELST_LO
+ -- : BFD_RELOC_PPC_EMB_RELST_HI
+ -- : BFD_RELOC_PPC_EMB_RELST_HA
+ -- : BFD_RELOC_PPC_EMB_BIT_FLD
+ -- : BFD_RELOC_PPC_EMB_RELSDA
+ -- : BFD_RELOC_PPC64_HIGHER
+ -- : BFD_RELOC_PPC64_HIGHER_S
+ -- : BFD_RELOC_PPC64_HIGHEST
+ -- : BFD_RELOC_PPC64_HIGHEST_S
+ -- : BFD_RELOC_PPC64_TOC16_LO
+ -- : BFD_RELOC_PPC64_TOC16_HI
+ -- : BFD_RELOC_PPC64_TOC16_HA
+ -- : BFD_RELOC_PPC64_TOC
+ -- : BFD_RELOC_PPC64_PLTGOT16
+ -- : BFD_RELOC_PPC64_PLTGOT16_LO
+ -- : BFD_RELOC_PPC64_PLTGOT16_HI
+ -- : BFD_RELOC_PPC64_PLTGOT16_HA
+ -- : BFD_RELOC_PPC64_ADDR16_DS
+ -- : BFD_RELOC_PPC64_ADDR16_LO_DS
+ -- : BFD_RELOC_PPC64_GOT16_DS
+ -- : BFD_RELOC_PPC64_GOT16_LO_DS
+ -- : BFD_RELOC_PPC64_PLT16_LO_DS
+ -- : BFD_RELOC_PPC64_SECTOFF_DS
+ -- : BFD_RELOC_PPC64_SECTOFF_LO_DS
+ -- : BFD_RELOC_PPC64_TOC16_DS
+ -- : BFD_RELOC_PPC64_TOC16_LO_DS
+ -- : BFD_RELOC_PPC64_PLTGOT16_DS
+ -- : BFD_RELOC_PPC64_PLTGOT16_LO_DS
+     Power(rs6000) and PowerPC relocations.
+
+ -- : BFD_RELOC_PPC_TLS
+ -- : BFD_RELOC_PPC_TLSGD
+ -- : BFD_RELOC_PPC_TLSLD
+ -- : BFD_RELOC_PPC_DTPMOD
+ -- : BFD_RELOC_PPC_TPREL16
+ -- : BFD_RELOC_PPC_TPREL16_LO
+ -- : BFD_RELOC_PPC_TPREL16_HI
+ -- : BFD_RELOC_PPC_TPREL16_HA
+ -- : BFD_RELOC_PPC_TPREL
+ -- : BFD_RELOC_PPC_DTPREL16
+ -- : BFD_RELOC_PPC_DTPREL16_LO
+ -- : BFD_RELOC_PPC_DTPREL16_HI
+ -- : BFD_RELOC_PPC_DTPREL16_HA
+ -- : BFD_RELOC_PPC_DTPREL
+ -- : BFD_RELOC_PPC_GOT_TLSGD16
+ -- : BFD_RELOC_PPC_GOT_TLSGD16_LO
+ -- : BFD_RELOC_PPC_GOT_TLSGD16_HI
+ -- : BFD_RELOC_PPC_GOT_TLSGD16_HA
+ -- : BFD_RELOC_PPC_GOT_TLSLD16
+ -- : BFD_RELOC_PPC_GOT_TLSLD16_LO
+ -- : BFD_RELOC_PPC_GOT_TLSLD16_HI
+ -- : BFD_RELOC_PPC_GOT_TLSLD16_HA
+ -- : BFD_RELOC_PPC_GOT_TPREL16
+ -- : BFD_RELOC_PPC_GOT_TPREL16_LO
+ -- : BFD_RELOC_PPC_GOT_TPREL16_HI
+ -- : BFD_RELOC_PPC_GOT_TPREL16_HA
+ -- : BFD_RELOC_PPC_GOT_DTPREL16
+ -- : BFD_RELOC_PPC_GOT_DTPREL16_LO
+ -- : BFD_RELOC_PPC_GOT_DTPREL16_HI
+ -- : BFD_RELOC_PPC_GOT_DTPREL16_HA
+ -- : BFD_RELOC_PPC64_TPREL16_DS
+ -- : BFD_RELOC_PPC64_TPREL16_LO_DS
+ -- : BFD_RELOC_PPC64_TPREL16_HIGHER
+ -- : BFD_RELOC_PPC64_TPREL16_HIGHERA
+ -- : BFD_RELOC_PPC64_TPREL16_HIGHEST
+ -- : BFD_RELOC_PPC64_TPREL16_HIGHESTA
+ -- : BFD_RELOC_PPC64_DTPREL16_DS
+ -- : BFD_RELOC_PPC64_DTPREL16_LO_DS
+ -- : BFD_RELOC_PPC64_DTPREL16_HIGHER
+ -- : BFD_RELOC_PPC64_DTPREL16_HIGHERA
+ -- : BFD_RELOC_PPC64_DTPREL16_HIGHEST
+ -- : BFD_RELOC_PPC64_DTPREL16_HIGHESTA
+     PowerPC and PowerPC64 thread-local storage relocations.
+
+ -- : BFD_RELOC_I370_D12
+     IBM 370/390 relocations
+
+ -- : BFD_RELOC_CTOR
+     The type of reloc used to build a constructor table - at the moment
+     probably a 32 bit wide absolute relocation, but the target can
+     choose.  It generally does map to one of the other relocation
+     types.
+
+ -- : BFD_RELOC_ARM_PCREL_BRANCH
+     ARM 26 bit pc-relative branch.  The lowest two bits must be zero
+     and are not stored in the instruction.
+
+ -- : BFD_RELOC_ARM_PCREL_BLX
+     ARM 26 bit pc-relative branch.  The lowest bit must be zero and is
+     not stored in the instruction.  The 2nd lowest bit comes from a 1
+     bit field in the instruction.
+
+ -- : BFD_RELOC_THUMB_PCREL_BLX
+     Thumb 22 bit pc-relative branch.  The lowest bit must be zero and
+     is not stored in the instruction.  The 2nd lowest bit comes from a
+     1 bit field in the instruction.
+
+ -- : BFD_RELOC_ARM_PCREL_CALL
+     ARM 26-bit pc-relative branch for an unconditional BL or BLX
+     instruction.
+
+ -- : BFD_RELOC_ARM_PCREL_JUMP
+     ARM 26-bit pc-relative branch for B or conditional BL instruction.
+
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH7
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH9
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH12
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH20
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH23
+ -- : BFD_RELOC_THUMB_PCREL_BRANCH25
+     Thumb 7-, 9-, 12-, 20-, 23-, and 25-bit pc-relative branches.  The
+     lowest bit must be zero and is not stored in the instruction.
+     Note that the corresponding ELF R_ARM_THM_JUMPnn constant has an
+     "nn" one smaller in all cases.  Note further that BRANCH23
+     corresponds to R_ARM_THM_CALL.
+
+ -- : BFD_RELOC_ARM_OFFSET_IMM
+     12-bit immediate offset, used in ARM-format ldr and str
+     instructions.
+
+ -- : BFD_RELOC_ARM_THUMB_OFFSET
+     5-bit immediate offset, used in Thumb-format ldr and str
+     instructions.
+
+ -- : BFD_RELOC_ARM_TARGET1
+     Pc-relative or absolute relocation depending on target.  Used for
+     entries in .init_array sections.
+
+ -- : BFD_RELOC_ARM_ROSEGREL32
+     Read-only segment base relative address.
+
+ -- : BFD_RELOC_ARM_SBREL32
+     Data segment base relative address.
+
+ -- : BFD_RELOC_ARM_TARGET2
+     This reloc is used for references to RTTI data from exception
+     handling tables.  The actual definition depends on the target.  It
+     may be a pc-relative or some form of GOT-indirect relocation.
+
+ -- : BFD_RELOC_ARM_PREL31
+     31-bit PC relative address.
+
+ -- : BFD_RELOC_ARM_MOVW
+ -- : BFD_RELOC_ARM_MOVT
+ -- : BFD_RELOC_ARM_MOVW_PCREL
+ -- : BFD_RELOC_ARM_MOVT_PCREL
+ -- : BFD_RELOC_ARM_THUMB_MOVW
+ -- : BFD_RELOC_ARM_THUMB_MOVT
+ -- : BFD_RELOC_ARM_THUMB_MOVW_PCREL
+ -- : BFD_RELOC_ARM_THUMB_MOVT_PCREL
+     Low and High halfword relocations for MOVW and MOVT instructions.
+
+ -- : BFD_RELOC_ARM_JUMP_SLOT
+ -- : BFD_RELOC_ARM_GLOB_DAT
+ -- : BFD_RELOC_ARM_GOT32
+ -- : BFD_RELOC_ARM_PLT32
+ -- : BFD_RELOC_ARM_RELATIVE
+ -- : BFD_RELOC_ARM_GOTOFF
+ -- : BFD_RELOC_ARM_GOTPC
+     Relocations for setting up GOTs and PLTs for shared libraries.
+
+ -- : BFD_RELOC_ARM_TLS_GD32
+ -- : BFD_RELOC_ARM_TLS_LDO32
+ -- : BFD_RELOC_ARM_TLS_LDM32
+ -- : BFD_RELOC_ARM_TLS_DTPOFF32
+ -- : BFD_RELOC_ARM_TLS_DTPMOD32
+ -- : BFD_RELOC_ARM_TLS_TPOFF32
+ -- : BFD_RELOC_ARM_TLS_IE32
+ -- : BFD_RELOC_ARM_TLS_LE32
+     ARM thread-local storage relocations.
+
+ -- : BFD_RELOC_ARM_ALU_PC_G0_NC
+ -- : BFD_RELOC_ARM_ALU_PC_G0
+ -- : BFD_RELOC_ARM_ALU_PC_G1_NC
+ -- : BFD_RELOC_ARM_ALU_PC_G1
+ -- : BFD_RELOC_ARM_ALU_PC_G2
+ -- : BFD_RELOC_ARM_LDR_PC_G0
+ -- : BFD_RELOC_ARM_LDR_PC_G1
+ -- : BFD_RELOC_ARM_LDR_PC_G2
+ -- : BFD_RELOC_ARM_LDRS_PC_G0
+ -- : BFD_RELOC_ARM_LDRS_PC_G1
+ -- : BFD_RELOC_ARM_LDRS_PC_G2
+ -- : BFD_RELOC_ARM_LDC_PC_G0
+ -- : BFD_RELOC_ARM_LDC_PC_G1
+ -- : BFD_RELOC_ARM_LDC_PC_G2
+ -- : BFD_RELOC_ARM_ALU_SB_G0_NC
+ -- : BFD_RELOC_ARM_ALU_SB_G0
+ -- : BFD_RELOC_ARM_ALU_SB_G1_NC
+ -- : BFD_RELOC_ARM_ALU_SB_G1
+ -- : BFD_RELOC_ARM_ALU_SB_G2
+ -- : BFD_RELOC_ARM_LDR_SB_G0
+ -- : BFD_RELOC_ARM_LDR_SB_G1
+ -- : BFD_RELOC_ARM_LDR_SB_G2
+ -- : BFD_RELOC_ARM_LDRS_SB_G0
+ -- : BFD_RELOC_ARM_LDRS_SB_G1
+ -- : BFD_RELOC_ARM_LDRS_SB_G2
+ -- : BFD_RELOC_ARM_LDC_SB_G0
+ -- : BFD_RELOC_ARM_LDC_SB_G1
+ -- : BFD_RELOC_ARM_LDC_SB_G2
+     ARM group relocations.
+
+ -- : BFD_RELOC_ARM_V4BX
+     Annotation of BX instructions.
+
+ -- : BFD_RELOC_ARM_IMMEDIATE
+ -- : BFD_RELOC_ARM_ADRL_IMMEDIATE
+ -- : BFD_RELOC_ARM_T32_IMMEDIATE
+ -- : BFD_RELOC_ARM_T32_ADD_IMM
+ -- : BFD_RELOC_ARM_T32_IMM12
+ -- : BFD_RELOC_ARM_T32_ADD_PC12
+ -- : BFD_RELOC_ARM_SHIFT_IMM
+ -- : BFD_RELOC_ARM_SMC
+ -- : BFD_RELOC_ARM_SWI
+ -- : BFD_RELOC_ARM_MULTI
+ -- : BFD_RELOC_ARM_CP_OFF_IMM
+ -- : BFD_RELOC_ARM_CP_OFF_IMM_S2
+ -- : BFD_RELOC_ARM_T32_CP_OFF_IMM
+ -- : BFD_RELOC_ARM_T32_CP_OFF_IMM_S2
+ -- : BFD_RELOC_ARM_ADR_IMM
+ -- : BFD_RELOC_ARM_LDR_IMM
+ -- : BFD_RELOC_ARM_LITERAL
+ -- : BFD_RELOC_ARM_IN_POOL
+ -- : BFD_RELOC_ARM_OFFSET_IMM8
+ -- : BFD_RELOC_ARM_T32_OFFSET_U8
+ -- : BFD_RELOC_ARM_T32_OFFSET_IMM
+ -- : BFD_RELOC_ARM_HWLITERAL
+ -- : BFD_RELOC_ARM_THUMB_ADD
+ -- : BFD_RELOC_ARM_THUMB_IMM
+ -- : BFD_RELOC_ARM_THUMB_SHIFT
+     These relocs are only used within the ARM assembler.  They are not
+     (at present) written to any object files.
+
+ -- : BFD_RELOC_SH_PCDISP8BY2
+ -- : BFD_RELOC_SH_PCDISP12BY2
+ -- : BFD_RELOC_SH_IMM3
+ -- : BFD_RELOC_SH_IMM3U
+ -- : BFD_RELOC_SH_DISP12
+ -- : BFD_RELOC_SH_DISP12BY2
+ -- : BFD_RELOC_SH_DISP12BY4
+ -- : BFD_RELOC_SH_DISP12BY8
+ -- : BFD_RELOC_SH_DISP20
+ -- : BFD_RELOC_SH_DISP20BY8
+ -- : BFD_RELOC_SH_IMM4
+ -- : BFD_RELOC_SH_IMM4BY2
+ -- : BFD_RELOC_SH_IMM4BY4
+ -- : BFD_RELOC_SH_IMM8
+ -- : BFD_RELOC_SH_IMM8BY2
+ -- : BFD_RELOC_SH_IMM8BY4
+ -- : BFD_RELOC_SH_PCRELIMM8BY2
+ -- : BFD_RELOC_SH_PCRELIMM8BY4
+ -- : BFD_RELOC_SH_SWITCH16
+ -- : BFD_RELOC_SH_SWITCH32
+ -- : BFD_RELOC_SH_USES
+ -- : BFD_RELOC_SH_COUNT
+ -- : BFD_RELOC_SH_ALIGN
+ -- : BFD_RELOC_SH_CODE
+ -- : BFD_RELOC_SH_DATA
+ -- : BFD_RELOC_SH_LABEL
+ -- : BFD_RELOC_SH_LOOP_START
+ -- : BFD_RELOC_SH_LOOP_END
+ -- : BFD_RELOC_SH_COPY
+ -- : BFD_RELOC_SH_GLOB_DAT
+ -- : BFD_RELOC_SH_JMP_SLOT
+ -- : BFD_RELOC_SH_RELATIVE
+ -- : BFD_RELOC_SH_GOTPC
+ -- : BFD_RELOC_SH_GOT_LOW16
+ -- : BFD_RELOC_SH_GOT_MEDLOW16
+ -- : BFD_RELOC_SH_GOT_MEDHI16
+ -- : BFD_RELOC_SH_GOT_HI16
+ -- : BFD_RELOC_SH_GOTPLT_LOW16
+ -- : BFD_RELOC_SH_GOTPLT_MEDLOW16
+ -- : BFD_RELOC_SH_GOTPLT_MEDHI16
+ -- : BFD_RELOC_SH_GOTPLT_HI16
+ -- : BFD_RELOC_SH_PLT_LOW16
+ -- : BFD_RELOC_SH_PLT_MEDLOW16
+ -- : BFD_RELOC_SH_PLT_MEDHI16
+ -- : BFD_RELOC_SH_PLT_HI16
+ -- : BFD_RELOC_SH_GOTOFF_LOW16
+ -- : BFD_RELOC_SH_GOTOFF_MEDLOW16
+ -- : BFD_RELOC_SH_GOTOFF_MEDHI16
+ -- : BFD_RELOC_SH_GOTOFF_HI16
+ -- : BFD_RELOC_SH_GOTPC_LOW16
+ -- : BFD_RELOC_SH_GOTPC_MEDLOW16
+ -- : BFD_RELOC_SH_GOTPC_MEDHI16
+ -- : BFD_RELOC_SH_GOTPC_HI16
+ -- : BFD_RELOC_SH_COPY64
+ -- : BFD_RELOC_SH_GLOB_DAT64
+ -- : BFD_RELOC_SH_JMP_SLOT64
+ -- : BFD_RELOC_SH_RELATIVE64
+ -- : BFD_RELOC_SH_GOT10BY4
+ -- : BFD_RELOC_SH_GOT10BY8
+ -- : BFD_RELOC_SH_GOTPLT10BY4
+ -- : BFD_RELOC_SH_GOTPLT10BY8
+ -- : BFD_RELOC_SH_GOTPLT32
+ -- : BFD_RELOC_SH_SHMEDIA_CODE
+ -- : BFD_RELOC_SH_IMMU5
+ -- : BFD_RELOC_SH_IMMS6
+ -- : BFD_RELOC_SH_IMMS6BY32
+ -- : BFD_RELOC_SH_IMMU6
+ -- : BFD_RELOC_SH_IMMS10
+ -- : BFD_RELOC_SH_IMMS10BY2
+ -- : BFD_RELOC_SH_IMMS10BY4
+ -- : BFD_RELOC_SH_IMMS10BY8
+ -- : BFD_RELOC_SH_IMMS16
+ -- : BFD_RELOC_SH_IMMU16
+ -- : BFD_RELOC_SH_IMM_LOW16
+ -- : BFD_RELOC_SH_IMM_LOW16_PCREL
+ -- : BFD_RELOC_SH_IMM_MEDLOW16
+ -- : BFD_RELOC_SH_IMM_MEDLOW16_PCREL
+ -- : BFD_RELOC_SH_IMM_MEDHI16
+ -- : BFD_RELOC_SH_IMM_MEDHI16_PCREL
+ -- : BFD_RELOC_SH_IMM_HI16
+ -- : BFD_RELOC_SH_IMM_HI16_PCREL
+ -- : BFD_RELOC_SH_PT_16
+ -- : BFD_RELOC_SH_TLS_GD_32
+ -- : BFD_RELOC_SH_TLS_LD_32
+ -- : BFD_RELOC_SH_TLS_LDO_32
+ -- : BFD_RELOC_SH_TLS_IE_32
+ -- : BFD_RELOC_SH_TLS_LE_32
+ -- : BFD_RELOC_SH_TLS_DTPMOD32
+ -- : BFD_RELOC_SH_TLS_DTPOFF32
+ -- : BFD_RELOC_SH_TLS_TPOFF32
+     Renesas / SuperH SH relocs.  Not all of these appear in object
+     files.
+
+ -- : BFD_RELOC_ARC_B22_PCREL
+     ARC Cores relocs.  ARC 22 bit pc-relative branch.  The lowest two
+     bits must be zero and are not stored in the instruction.  The high
+     20 bits are installed in bits 26 through 7 of the instruction.
+
+ -- : BFD_RELOC_ARC_B26
+     ARC 26 bit absolute branch.  The lowest two bits must be zero and
+     are not stored in the instruction.  The high 24 bits are installed
+     in bits 23 through 0.
+
+ -- : BFD_RELOC_BFIN_16_IMM
+     ADI Blackfin 16 bit immediate absolute reloc.
+
+ -- : BFD_RELOC_BFIN_16_HIGH
+     ADI Blackfin 16 bit immediate absolute reloc higher 16 bits.
+
+ -- : BFD_RELOC_BFIN_4_PCREL
+     ADI Blackfin 'a' part of LSETUP.
+
+ -- : BFD_RELOC_BFIN_5_PCREL
+     ADI Blackfin.
+
+ -- : BFD_RELOC_BFIN_16_LOW
+     ADI Blackfin 16 bit immediate absolute reloc lower 16 bits.
+
+ -- : BFD_RELOC_BFIN_10_PCREL
+     ADI Blackfin.
+
+ -- : BFD_RELOC_BFIN_11_PCREL
+     ADI Blackfin 'b' part of LSETUP.
+
+ -- : BFD_RELOC_BFIN_12_PCREL_JUMP
+     ADI Blackfin.
+
+ -- : BFD_RELOC_BFIN_12_PCREL_JUMP_S
+     ADI Blackfin Short jump, pcrel.
+
+ -- : BFD_RELOC_BFIN_24_PCREL_CALL_X
+     ADI Blackfin Call.x not implemented.
+
+ -- : BFD_RELOC_BFIN_24_PCREL_JUMP_L
+     ADI Blackfin Long Jump pcrel.
+
+ -- : BFD_RELOC_BFIN_GOT17M4
+ -- : BFD_RELOC_BFIN_GOTHI
+ -- : BFD_RELOC_BFIN_GOTLO
+ -- : BFD_RELOC_BFIN_FUNCDESC
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOT17M4
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOTHI
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOTLO
+ -- : BFD_RELOC_BFIN_FUNCDESC_VALUE
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI
+ -- : BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO
+ -- : BFD_RELOC_BFIN_GOTOFF17M4
+ -- : BFD_RELOC_BFIN_GOTOFFHI
+ -- : BFD_RELOC_BFIN_GOTOFFLO
+     ADI Blackfin FD-PIC relocations.
+
+ -- : BFD_RELOC_BFIN_GOT
+     ADI Blackfin GOT relocation.
+
+ -- : BFD_RELOC_BFIN_PLTPC
+     ADI Blackfin PLTPC relocation.
+
+ -- : BFD_ARELOC_BFIN_PUSH
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_CONST
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_ADD
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_SUB
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_MULT
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_DIV
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_MOD
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_LSHIFT
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_RSHIFT
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_AND
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_OR
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_XOR
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_LAND
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_LOR
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_LEN
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_NEG
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_COMP
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_PAGE
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_HWPAGE
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_ARELOC_BFIN_ADDR
+     ADI Blackfin arithmetic relocation.
+
+ -- : BFD_RELOC_D10V_10_PCREL_R
+     Mitsubishi D10V relocs.  This is a 10-bit reloc with the right 2
+     bits assumed to be 0.
+
+ -- : BFD_RELOC_D10V_10_PCREL_L
+     Mitsubishi D10V relocs.  This is a 10-bit reloc with the right 2
+     bits assumed to be 0.  This is the same as the previous reloc
+     except it is in the left container, i.e., shifted left 15 bits.
+
+ -- : BFD_RELOC_D10V_18
+     This is an 18-bit reloc with the right 2 bits assumed to be 0.
+
+ -- : BFD_RELOC_D10V_18_PCREL
+     This is an 18-bit reloc with the right 2 bits assumed to be 0.
+
+ -- : BFD_RELOC_D30V_6
+     Mitsubishi D30V relocs.  This is a 6-bit absolute reloc.
+
+ -- : BFD_RELOC_D30V_9_PCREL
+     This is a 6-bit pc-relative reloc with the right 3 bits assumed to
+     be 0.
+
+ -- : BFD_RELOC_D30V_9_PCREL_R
+     This is a 6-bit pc-relative reloc with the right 3 bits assumed to
+     be 0. Same as the previous reloc but on the right side of the
+     container.
+
+ -- : BFD_RELOC_D30V_15
+     This is a 12-bit absolute reloc with the right 3 bitsassumed to be
+     0.
+
+ -- : BFD_RELOC_D30V_15_PCREL
+     This is a 12-bit pc-relative reloc with the right 3 bits assumed
+     to be 0.
+
+ -- : BFD_RELOC_D30V_15_PCREL_R
+     This is a 12-bit pc-relative reloc with the right 3 bits assumed
+     to be 0. Same as the previous reloc but on the right side of the
+     container.
+
+ -- : BFD_RELOC_D30V_21
+     This is an 18-bit absolute reloc with the right 3 bits assumed to
+     be 0.
+
+ -- : BFD_RELOC_D30V_21_PCREL
+     This is an 18-bit pc-relative reloc with the right 3 bits assumed
+     to be 0.
+
+ -- : BFD_RELOC_D30V_21_PCREL_R
+     This is an 18-bit pc-relative reloc with the right 3 bits assumed
+     to be 0. Same as the previous reloc but on the right side of the
+     container.
+
+ -- : BFD_RELOC_D30V_32
+     This is a 32-bit absolute reloc.
+
+ -- : BFD_RELOC_D30V_32_PCREL
+     This is a 32-bit pc-relative reloc.
+
+ -- : BFD_RELOC_DLX_HI16_S
+     DLX relocs
+
+ -- : BFD_RELOC_DLX_LO16
+     DLX relocs
+
+ -- : BFD_RELOC_DLX_JMP26
+     DLX relocs
+
+ -- : BFD_RELOC_M32C_HI8
+ -- : BFD_RELOC_M32C_RL_JUMP
+ -- : BFD_RELOC_M32C_RL_1ADDR
+ -- : BFD_RELOC_M32C_RL_2ADDR
+     Renesas M16C/M32C Relocations.
+
+ -- : BFD_RELOC_M32R_24
+     Renesas M32R (formerly Mitsubishi M32R) relocs.  This is a 24 bit
+     absolute address.
+
+ -- : BFD_RELOC_M32R_10_PCREL
+     This is a 10-bit pc-relative reloc with the right 2 bits assumed
+     to be 0.
+
+ -- : BFD_RELOC_M32R_18_PCREL
+     This is an 18-bit reloc with the right 2 bits assumed to be 0.
+
+ -- : BFD_RELOC_M32R_26_PCREL
+     This is a 26-bit reloc with the right 2 bits assumed to be 0.
+
+ -- : BFD_RELOC_M32R_HI16_ULO
+     This is a 16-bit reloc containing the high 16 bits of an address
+     used when the lower 16 bits are treated as unsigned.
+
+ -- : BFD_RELOC_M32R_HI16_SLO
+     This is a 16-bit reloc containing the high 16 bits of an address
+     used when the lower 16 bits are treated as signed.
+
+ -- : BFD_RELOC_M32R_LO16
+     This is a 16-bit reloc containing the lower 16 bits of an address.
+
+ -- : BFD_RELOC_M32R_SDA16
+     This is a 16-bit reloc containing the small data area offset for
+     use in add3, load, and store instructions.
+
+ -- : BFD_RELOC_M32R_GOT24
+ -- : BFD_RELOC_M32R_26_PLTREL
+ -- : BFD_RELOC_M32R_COPY
+ -- : BFD_RELOC_M32R_GLOB_DAT
+ -- : BFD_RELOC_M32R_JMP_SLOT
+ -- : BFD_RELOC_M32R_RELATIVE
+ -- : BFD_RELOC_M32R_GOTOFF
+ -- : BFD_RELOC_M32R_GOTOFF_HI_ULO
+ -- : BFD_RELOC_M32R_GOTOFF_HI_SLO
+ -- : BFD_RELOC_M32R_GOTOFF_LO
+ -- : BFD_RELOC_M32R_GOTPC24
+ -- : BFD_RELOC_M32R_GOT16_HI_ULO
+ -- : BFD_RELOC_M32R_GOT16_HI_SLO
+ -- : BFD_RELOC_M32R_GOT16_LO
+ -- : BFD_RELOC_M32R_GOTPC_HI_ULO
+ -- : BFD_RELOC_M32R_GOTPC_HI_SLO
+ -- : BFD_RELOC_M32R_GOTPC_LO
+     For PIC.
+
+ -- : BFD_RELOC_V850_9_PCREL
+     This is a 9-bit reloc
+
+ -- : BFD_RELOC_V850_22_PCREL
+     This is a 22-bit reloc
+
+ -- : BFD_RELOC_V850_SDA_16_16_OFFSET
+     This is a 16 bit offset from the short data area pointer.
+
+ -- : BFD_RELOC_V850_SDA_15_16_OFFSET
+     This is a 16 bit offset (of which only 15 bits are used) from the
+     short data area pointer.
+
+ -- : BFD_RELOC_V850_ZDA_16_16_OFFSET
+     This is a 16 bit offset from the zero data area pointer.
+
+ -- : BFD_RELOC_V850_ZDA_15_16_OFFSET
+     This is a 16 bit offset (of which only 15 bits are used) from the
+     zero data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_6_8_OFFSET
+     This is an 8 bit offset (of which only 6 bits are used) from the
+     tiny data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_7_8_OFFSET
+     This is an 8bit offset (of which only 7 bits are used) from the
+     tiny data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_7_7_OFFSET
+     This is a 7 bit offset from the tiny data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_16_16_OFFSET
+     This is a 16 bit offset from the tiny data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_4_5_OFFSET
+     This is a 5 bit offset (of which only 4 bits are used) from the
+     tiny data area pointer.
+
+ -- : BFD_RELOC_V850_TDA_4_4_OFFSET
+     This is a 4 bit offset from the tiny data area pointer.
+
+ -- : BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET
+     This is a 16 bit offset from the short data area pointer, with the
+     bits placed non-contiguously in the instruction.
+
+ -- : BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET
+     This is a 16 bit offset from the zero data area pointer, with the
+     bits placed non-contiguously in the instruction.
+
+ -- : BFD_RELOC_V850_CALLT_6_7_OFFSET
+     This is a 6 bit offset from the call table base pointer.
+
+ -- : BFD_RELOC_V850_CALLT_16_16_OFFSET
+     This is a 16 bit offset from the call table base pointer.
+
+ -- : BFD_RELOC_V850_LONGCALL
+     Used for relaxing indirect function calls.
+
+ -- : BFD_RELOC_V850_LONGJUMP
+     Used for relaxing indirect jumps.
+
+ -- : BFD_RELOC_V850_ALIGN
+     Used to maintain alignment whilst relaxing.
+
+ -- : BFD_RELOC_V850_LO16_SPLIT_OFFSET
+     This is a variation of BFD_RELOC_LO16 that can be used in v850e
+     ld.bu instructions.
+
+ -- : BFD_RELOC_MN10300_32_PCREL
+     This is a 32bit pcrel reloc for the mn10300, offset by two bytes
+     in the instruction.
+
+ -- : BFD_RELOC_MN10300_16_PCREL
+     This is a 16bit pcrel reloc for the mn10300, offset by two bytes
+     in the instruction.
+
+ -- : BFD_RELOC_TIC30_LDP
+     This is a 8bit DP reloc for the tms320c30, where the most
+     significant 8 bits of a 24 bit word are placed into the least
+     significant 8 bits of the opcode.
+
+ -- : BFD_RELOC_TIC54X_PARTLS7
+     This is a 7bit reloc for the tms320c54x, where the least
+     significant 7 bits of a 16 bit word are placed into the least
+     significant 7 bits of the opcode.
+
+ -- : BFD_RELOC_TIC54X_PARTMS9
+     This is a 9bit DP reloc for the tms320c54x, where the most
+     significant 9 bits of a 16 bit word are placed into the least
+     significant 9 bits of the opcode.
+
+ -- : BFD_RELOC_TIC54X_23
+     This is an extended address 23-bit reloc for the tms320c54x.
+
+ -- : BFD_RELOC_TIC54X_16_OF_23
+     This is a 16-bit reloc for the tms320c54x, where the least
+     significant 16 bits of a 23-bit extended address are placed into
+     the opcode.
+
+ -- : BFD_RELOC_TIC54X_MS7_OF_23
+     This is a reloc for the tms320c54x, where the most significant 7
+     bits of a 23-bit extended address are placed into the opcode.
+
+ -- : BFD_RELOC_FR30_48
+     This is a 48 bit reloc for the FR30 that stores 32 bits.
+
+ -- : BFD_RELOC_FR30_20
+     This is a 32 bit reloc for the FR30 that stores 20 bits split up
+     into two sections.
+
+ -- : BFD_RELOC_FR30_6_IN_4
+     This is a 16 bit reloc for the FR30 that stores a 6 bit word
+     offset in 4 bits.
+
+ -- : BFD_RELOC_FR30_8_IN_8
+     This is a 16 bit reloc for the FR30 that stores an 8 bit byte
+     offset into 8 bits.
+
+ -- : BFD_RELOC_FR30_9_IN_8
+     This is a 16 bit reloc for the FR30 that stores a 9 bit short
+     offset into 8 bits.
+
+ -- : BFD_RELOC_FR30_10_IN_8
+     This is a 16 bit reloc for the FR30 that stores a 10 bit word
+     offset into 8 bits.
+
+ -- : BFD_RELOC_FR30_9_PCREL
+     This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
+     short offset into 8 bits.
+
+ -- : BFD_RELOC_FR30_12_PCREL
+     This is a 16 bit reloc for the FR30 that stores a 12 bit pc
+     relative short offset into 11 bits.
+
+ -- : BFD_RELOC_MCORE_PCREL_IMM8BY4
+ -- : BFD_RELOC_MCORE_PCREL_IMM11BY2
+ -- : BFD_RELOC_MCORE_PCREL_IMM4BY2
+ -- : BFD_RELOC_MCORE_PCREL_32
+ -- : BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2
+ -- : BFD_RELOC_MCORE_RVA
+     Motorola Mcore relocations.
+
+ -- : BFD_RELOC_MEP_8
+ -- : BFD_RELOC_MEP_16
+ -- : BFD_RELOC_MEP_32
+ -- : BFD_RELOC_MEP_PCREL8A2
+ -- : BFD_RELOC_MEP_PCREL12A2
+ -- : BFD_RELOC_MEP_PCREL17A2
+ -- : BFD_RELOC_MEP_PCREL24A2
+ -- : BFD_RELOC_MEP_PCABS24A2
+ -- : BFD_RELOC_MEP_LOW16
+ -- : BFD_RELOC_MEP_HI16U
+ -- : BFD_RELOC_MEP_HI16S
+ -- : BFD_RELOC_MEP_GPREL
+ -- : BFD_RELOC_MEP_TPREL
+ -- : BFD_RELOC_MEP_TPREL7
+ -- : BFD_RELOC_MEP_TPREL7A2
+ -- : BFD_RELOC_MEP_TPREL7A4
+ -- : BFD_RELOC_MEP_UIMM24
+ -- : BFD_RELOC_MEP_ADDR24A4
+ -- : BFD_RELOC_MEP_GNU_VTINHERIT
+ -- : BFD_RELOC_MEP_GNU_VTENTRY
+     Toshiba Media Processor Relocations.
+
+ -- : BFD_RELOC_MMIX_GETA
+ -- : BFD_RELOC_MMIX_GETA_1
+ -- : BFD_RELOC_MMIX_GETA_2
+ -- : BFD_RELOC_MMIX_GETA_3
+     These are relocations for the GETA instruction.
+
+ -- : BFD_RELOC_MMIX_CBRANCH
+ -- : BFD_RELOC_MMIX_CBRANCH_J
+ -- : BFD_RELOC_MMIX_CBRANCH_1
+ -- : BFD_RELOC_MMIX_CBRANCH_2
+ -- : BFD_RELOC_MMIX_CBRANCH_3
+     These are relocations for a conditional branch instruction.
+
+ -- : BFD_RELOC_MMIX_PUSHJ
+ -- : BFD_RELOC_MMIX_PUSHJ_1
+ -- : BFD_RELOC_MMIX_PUSHJ_2
+ -- : BFD_RELOC_MMIX_PUSHJ_3
+ -- : BFD_RELOC_MMIX_PUSHJ_STUBBABLE
+     These are relocations for the PUSHJ instruction.
+
+ -- : BFD_RELOC_MMIX_JMP
+ -- : BFD_RELOC_MMIX_JMP_1
+ -- : BFD_RELOC_MMIX_JMP_2
+ -- : BFD_RELOC_MMIX_JMP_3
+     These are relocations for the JMP instruction.
+
+ -- : BFD_RELOC_MMIX_ADDR19
+     This is a relocation for a relative address as in a GETA
+     instruction or a branch.
+
+ -- : BFD_RELOC_MMIX_ADDR27
+     This is a relocation for a relative address as in a JMP
+     instruction.
+
+ -- : BFD_RELOC_MMIX_REG_OR_BYTE
+     This is a relocation for an instruction field that may be a general
+     register or a value 0..255.
+
+ -- : BFD_RELOC_MMIX_REG
+     This is a relocation for an instruction field that may be a general
+     register.
+
+ -- : BFD_RELOC_MMIX_BASE_PLUS_OFFSET
+     This is a relocation for two instruction fields holding a register
+     and an offset, the equivalent of the relocation.
+
+ -- : BFD_RELOC_MMIX_LOCAL
+     This relocation is an assertion that the expression is not
+     allocated as a global register.  It does not modify contents.
+
+ -- : BFD_RELOC_AVR_7_PCREL
+     This is a 16 bit reloc for the AVR that stores 8 bit pc relative
+     short offset into 7 bits.
+
+ -- : BFD_RELOC_AVR_13_PCREL
+     This is a 16 bit reloc for the AVR that stores 13 bit pc relative
+     short offset into 12 bits.
+
+ -- : BFD_RELOC_AVR_16_PM
+     This is a 16 bit reloc for the AVR that stores 17 bit value
+     (usually program memory address) into 16 bits.
+
+ -- : BFD_RELOC_AVR_LO8_LDI
+     This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+     data memory address) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_HI8_LDI
+     This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
+     bit of data memory address) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_HH8_LDI
+     This is a 16 bit reloc for the AVR that stores 8 bit value (most
+     high 8 bit of program memory address) into 8 bit immediate value
+     of LDI insn.
+
+ -- : BFD_RELOC_AVR_MS8_LDI
+     This is a 16 bit reloc for the AVR that stores 8 bit value (most
+     high 8 bit of 32 bit value) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_LO8_LDI_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (usually data memory address) into 8 bit immediate value of SUBI
+     insn.
+
+ -- : BFD_RELOC_AVR_HI8_LDI_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (high 8 bit of data memory address) into 8 bit immediate value of
+     SUBI insn.
+
+ -- : BFD_RELOC_AVR_HH8_LDI_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (most high 8 bit of program memory address) into 8 bit immediate
+     value of LDI or SUBI insn.
+
+ -- : BFD_RELOC_AVR_MS8_LDI_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (msb of 32 bit value) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_LO8_LDI_PM
+     This is a 16 bit reloc for the AVR that stores 8 bit value (usually
+     command address) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_LO8_LDI_GS
+     This is a 16 bit reloc for the AVR that stores 8 bit value
+     (command address) into 8 bit immediate value of LDI insn. If the
+     address is beyond the 128k boundary, the linker inserts a jump
+     stub for this reloc in the lower 128k.
+
+ -- : BFD_RELOC_AVR_HI8_LDI_PM
+     This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
+     bit of command address) into 8 bit immediate value of LDI insn.
+
+ -- : BFD_RELOC_AVR_HI8_LDI_GS
+     This is a 16 bit reloc for the AVR that stores 8 bit value (high 8
+     bit of command address) into 8 bit immediate value of LDI insn.
+     If the address is beyond the 128k boundary, the linker inserts a
+     jump stub for this reloc below 128k.
+
+ -- : BFD_RELOC_AVR_HH8_LDI_PM
+     This is a 16 bit reloc for the AVR that stores 8 bit value (most
+     high 8 bit of command address) into 8 bit immediate value of LDI
+     insn.
+
+ -- : BFD_RELOC_AVR_LO8_LDI_PM_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (usually command address) into 8 bit immediate value of SUBI insn.
+
+ -- : BFD_RELOC_AVR_HI8_LDI_PM_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (high 8 bit of 16 bit command address) into 8 bit immediate value
+     of SUBI insn.
+
+ -- : BFD_RELOC_AVR_HH8_LDI_PM_NEG
+     This is a 16 bit reloc for the AVR that stores negated 8 bit value
+     (high 6 bit of 22 bit command address) into 8 bit immediate value
+     of SUBI insn.
+
+ -- : BFD_RELOC_AVR_CALL
+     This is a 32 bit reloc for the AVR that stores 23 bit value into
+     22 bits.
+
+ -- : BFD_RELOC_AVR_LDI
+     This is a 16 bit reloc for the AVR that stores all needed bits for
+     absolute addressing with ldi with overflow check to linktime
+
+ -- : BFD_RELOC_AVR_6
+     This is a 6 bit reloc for the AVR that stores offset for ldd/std
+     instructions
+
+ -- : BFD_RELOC_AVR_6_ADIW
+     This is a 6 bit reloc for the AVR that stores offset for adiw/sbiw
+     instructions
+
+ -- : BFD_RELOC_390_12
+     Direct 12 bit.
+
+ -- : BFD_RELOC_390_GOT12
+     12 bit GOT offset.
+
+ -- : BFD_RELOC_390_PLT32
+     32 bit PC relative PLT address.
+
+ -- : BFD_RELOC_390_COPY
+     Copy symbol at runtime.
+
+ -- : BFD_RELOC_390_GLOB_DAT
+     Create GOT entry.
+
+ -- : BFD_RELOC_390_JMP_SLOT
+     Create PLT entry.
+
+ -- : BFD_RELOC_390_RELATIVE
+     Adjust by program base.
+
+ -- : BFD_RELOC_390_GOTPC
+     32 bit PC relative offset to GOT.
+
+ -- : BFD_RELOC_390_GOT16
+     16 bit GOT offset.
+
+ -- : BFD_RELOC_390_PC16DBL
+     PC relative 16 bit shifted by 1.
+
+ -- : BFD_RELOC_390_PLT16DBL
+     16 bit PC rel. PLT shifted by 1.
+
+ -- : BFD_RELOC_390_PC32DBL
+     PC relative 32 bit shifted by 1.
+
+ -- : BFD_RELOC_390_PLT32DBL
+     32 bit PC rel. PLT shifted by 1.
+
+ -- : BFD_RELOC_390_GOTPCDBL
+     32 bit PC rel. GOT shifted by 1.
+
+ -- : BFD_RELOC_390_GOT64
+     64 bit GOT offset.
+
+ -- : BFD_RELOC_390_PLT64
+     64 bit PC relative PLT address.
+
+ -- : BFD_RELOC_390_GOTENT
+     32 bit rel. offset to GOT entry.
+
+ -- : BFD_RELOC_390_GOTOFF64
+     64 bit offset to GOT.
+
+ -- : BFD_RELOC_390_GOTPLT12
+     12-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_390_GOTPLT16
+     16-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_390_GOTPLT32
+     32-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_390_GOTPLT64
+     64-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_390_GOTPLTENT
+     32-bit rel. offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_390_PLTOFF16
+     16-bit rel. offset from the GOT to a PLT entry.
+
+ -- : BFD_RELOC_390_PLTOFF32
+     32-bit rel. offset from the GOT to a PLT entry.
+
+ -- : BFD_RELOC_390_PLTOFF64
+     64-bit rel. offset from the GOT to a PLT entry.
+
+ -- : BFD_RELOC_390_TLS_LOAD
+ -- : BFD_RELOC_390_TLS_GDCALL
+ -- : BFD_RELOC_390_TLS_LDCALL
+ -- : BFD_RELOC_390_TLS_GD32
+ -- : BFD_RELOC_390_TLS_GD64
+ -- : BFD_RELOC_390_TLS_GOTIE12
+ -- : BFD_RELOC_390_TLS_GOTIE32
+ -- : BFD_RELOC_390_TLS_GOTIE64
+ -- : BFD_RELOC_390_TLS_LDM32
+ -- : BFD_RELOC_390_TLS_LDM64
+ -- : BFD_RELOC_390_TLS_IE32
+ -- : BFD_RELOC_390_TLS_IE64
+ -- : BFD_RELOC_390_TLS_IEENT
+ -- : BFD_RELOC_390_TLS_LE32
+ -- : BFD_RELOC_390_TLS_LE64
+ -- : BFD_RELOC_390_TLS_LDO32
+ -- : BFD_RELOC_390_TLS_LDO64
+ -- : BFD_RELOC_390_TLS_DTPMOD
+ -- : BFD_RELOC_390_TLS_DTPOFF
+ -- : BFD_RELOC_390_TLS_TPOFF
+     s390 tls relocations.
+
+ -- : BFD_RELOC_390_20
+ -- : BFD_RELOC_390_GOT20
+ -- : BFD_RELOC_390_GOTPLT20
+ -- : BFD_RELOC_390_TLS_GOTIE20
+     Long displacement extension.
+
+ -- : BFD_RELOC_SCORE_GPREL15
+     Score relocations Low 16 bit for load/store
+
+ -- : BFD_RELOC_SCORE_DUMMY2
+ -- : BFD_RELOC_SCORE_JMP
+     This is a 24-bit reloc with the right 1 bit assumed to be 0
+
+ -- : BFD_RELOC_SCORE_BRANCH
+     This is a 19-bit reloc with the right 1 bit assumed to be 0
+
+ -- : BFD_RELOC_SCORE_IMM30
+     This is a 32-bit reloc for 48-bit instructions.
+
+ -- : BFD_RELOC_SCORE_IMM32
+     This is a 32-bit reloc for 48-bit instructions.
+
+ -- : BFD_RELOC_SCORE16_JMP
+     This is a 11-bit reloc with the right 1 bit assumed to be 0
+
+ -- : BFD_RELOC_SCORE16_BRANCH
+     This is a 8-bit reloc with the right 1 bit assumed to be 0
+
+ -- : BFD_RELOC_SCORE_BCMP
+     This is a 9-bit reloc with the right 1 bit assumed to be 0
+
+ -- : BFD_RELOC_SCORE_GOT15
+ -- : BFD_RELOC_SCORE_GOT_LO16
+ -- : BFD_RELOC_SCORE_CALL15
+ -- : BFD_RELOC_SCORE_DUMMY_HI16
+     Undocumented Score relocs
+
+ -- : BFD_RELOC_IP2K_FR9
+     Scenix IP2K - 9-bit register number / data address
+
+ -- : BFD_RELOC_IP2K_BANK
+     Scenix IP2K - 4-bit register/data bank number
+
+ -- : BFD_RELOC_IP2K_ADDR16CJP
+     Scenix IP2K - low 13 bits of instruction word address
+
+ -- : BFD_RELOC_IP2K_PAGE3
+     Scenix IP2K - high 3 bits of instruction word address
+
+ -- : BFD_RELOC_IP2K_LO8DATA
+ -- : BFD_RELOC_IP2K_HI8DATA
+ -- : BFD_RELOC_IP2K_EX8DATA
+     Scenix IP2K - ext/low/high 8 bits of data address
+
+ -- : BFD_RELOC_IP2K_LO8INSN
+ -- : BFD_RELOC_IP2K_HI8INSN
+     Scenix IP2K - low/high 8 bits of instruction word address
+
+ -- : BFD_RELOC_IP2K_PC_SKIP
+     Scenix IP2K - even/odd PC modifier to modify snb pcl.0
+
+ -- : BFD_RELOC_IP2K_TEXT
+     Scenix IP2K - 16 bit word address in text section.
+
+ -- : BFD_RELOC_IP2K_FR_OFFSET
+     Scenix IP2K - 7-bit sp or dp offset
+
+ -- : BFD_RELOC_VPE4KMATH_DATA
+ -- : BFD_RELOC_VPE4KMATH_INSN
+     Scenix VPE4K coprocessor - data/insn-space addressing
+
+ -- : BFD_RELOC_VTABLE_INHERIT
+ -- : BFD_RELOC_VTABLE_ENTRY
+     These two relocations are used by the linker to determine which of
+     the entries in a C++ virtual function table are actually used.
+     When the -gc-sections option is given, the linker will zero out
+     the entries that are not used, so that the code for those
+     functions need not be included in the output.
+
+     VTABLE_INHERIT is a zero-space relocation used to describe to the
+     linker the inheritance tree of a C++ virtual function table.  The
+     relocation's symbol should be the parent class' vtable, and the
+     relocation should be located at the child vtable.
+
+     VTABLE_ENTRY is a zero-space relocation that describes the use of a
+     virtual function table entry.  The reloc's symbol should refer to
+     the table of the class mentioned in the code.  Off of that base,
+     an offset describes the entry that is being used.  For Rela hosts,
+     this offset is stored in the reloc's addend.  For Rel hosts, we
+     are forced to put this offset in the reloc's section offset.
+
+ -- : BFD_RELOC_IA64_IMM14
+ -- : BFD_RELOC_IA64_IMM22
+ -- : BFD_RELOC_IA64_IMM64
+ -- : BFD_RELOC_IA64_DIR32MSB
+ -- : BFD_RELOC_IA64_DIR32LSB
+ -- : BFD_RELOC_IA64_DIR64MSB
+ -- : BFD_RELOC_IA64_DIR64LSB
+ -- : BFD_RELOC_IA64_GPREL22
+ -- : BFD_RELOC_IA64_GPREL64I
+ -- : BFD_RELOC_IA64_GPREL32MSB
+ -- : BFD_RELOC_IA64_GPREL32LSB
+ -- : BFD_RELOC_IA64_GPREL64MSB
+ -- : BFD_RELOC_IA64_GPREL64LSB
+ -- : BFD_RELOC_IA64_LTOFF22
+ -- : BFD_RELOC_IA64_LTOFF64I
+ -- : BFD_RELOC_IA64_PLTOFF22
+ -- : BFD_RELOC_IA64_PLTOFF64I
+ -- : BFD_RELOC_IA64_PLTOFF64MSB
+ -- : BFD_RELOC_IA64_PLTOFF64LSB
+ -- : BFD_RELOC_IA64_FPTR64I
+ -- : BFD_RELOC_IA64_FPTR32MSB
+ -- : BFD_RELOC_IA64_FPTR32LSB
+ -- : BFD_RELOC_IA64_FPTR64MSB
+ -- : BFD_RELOC_IA64_FPTR64LSB
+ -- : BFD_RELOC_IA64_PCREL21B
+ -- : BFD_RELOC_IA64_PCREL21BI
+ -- : BFD_RELOC_IA64_PCREL21M
+ -- : BFD_RELOC_IA64_PCREL21F
+ -- : BFD_RELOC_IA64_PCREL22
+ -- : BFD_RELOC_IA64_PCREL60B
+ -- : BFD_RELOC_IA64_PCREL64I
+ -- : BFD_RELOC_IA64_PCREL32MSB
+ -- : BFD_RELOC_IA64_PCREL32LSB
+ -- : BFD_RELOC_IA64_PCREL64MSB
+ -- : BFD_RELOC_IA64_PCREL64LSB
+ -- : BFD_RELOC_IA64_LTOFF_FPTR22
+ -- : BFD_RELOC_IA64_LTOFF_FPTR64I
+ -- : BFD_RELOC_IA64_LTOFF_FPTR32MSB
+ -- : BFD_RELOC_IA64_LTOFF_FPTR32LSB
+ -- : BFD_RELOC_IA64_LTOFF_FPTR64MSB
+ -- : BFD_RELOC_IA64_LTOFF_FPTR64LSB
+ -- : BFD_RELOC_IA64_SEGREL32MSB
+ -- : BFD_RELOC_IA64_SEGREL32LSB
+ -- : BFD_RELOC_IA64_SEGREL64MSB
+ -- : BFD_RELOC_IA64_SEGREL64LSB
+ -- : BFD_RELOC_IA64_SECREL32MSB
+ -- : BFD_RELOC_IA64_SECREL32LSB
+ -- : BFD_RELOC_IA64_SECREL64MSB
+ -- : BFD_RELOC_IA64_SECREL64LSB
+ -- : BFD_RELOC_IA64_REL32MSB
+ -- : BFD_RELOC_IA64_REL32LSB
+ -- : BFD_RELOC_IA64_REL64MSB
+ -- : BFD_RELOC_IA64_REL64LSB
+ -- : BFD_RELOC_IA64_LTV32MSB
+ -- : BFD_RELOC_IA64_LTV32LSB
+ -- : BFD_RELOC_IA64_LTV64MSB
+ -- : BFD_RELOC_IA64_LTV64LSB
+ -- : BFD_RELOC_IA64_IPLTMSB
+ -- : BFD_RELOC_IA64_IPLTLSB
+ -- : BFD_RELOC_IA64_COPY
+ -- : BFD_RELOC_IA64_LTOFF22X
+ -- : BFD_RELOC_IA64_LDXMOV
+ -- : BFD_RELOC_IA64_TPREL14
+ -- : BFD_RELOC_IA64_TPREL22
+ -- : BFD_RELOC_IA64_TPREL64I
+ -- : BFD_RELOC_IA64_TPREL64MSB
+ -- : BFD_RELOC_IA64_TPREL64LSB
+ -- : BFD_RELOC_IA64_LTOFF_TPREL22
+ -- : BFD_RELOC_IA64_DTPMOD64MSB
+ -- : BFD_RELOC_IA64_DTPMOD64LSB
+ -- : BFD_RELOC_IA64_LTOFF_DTPMOD22
+ -- : BFD_RELOC_IA64_DTPREL14
+ -- : BFD_RELOC_IA64_DTPREL22
+ -- : BFD_RELOC_IA64_DTPREL64I
+ -- : BFD_RELOC_IA64_DTPREL32MSB
+ -- : BFD_RELOC_IA64_DTPREL32LSB
+ -- : BFD_RELOC_IA64_DTPREL64MSB
+ -- : BFD_RELOC_IA64_DTPREL64LSB
+ -- : BFD_RELOC_IA64_LTOFF_DTPREL22
+     Intel IA64 Relocations.
+
+ -- : BFD_RELOC_M68HC11_HI8
+     Motorola 68HC11 reloc.  This is the 8 bit high part of an absolute
+     address.
+
+ -- : BFD_RELOC_M68HC11_LO8
+     Motorola 68HC11 reloc.  This is the 8 bit low part of an absolute
+     address.
+
+ -- : BFD_RELOC_M68HC11_3B
+     Motorola 68HC11 reloc.  This is the 3 bit of a value.
+
+ -- : BFD_RELOC_M68HC11_RL_JUMP
+     Motorola 68HC11 reloc.  This reloc marks the beginning of a
+     jump/call instruction.  It is used for linker relaxation to
+     correctly identify beginning of instruction and change some
+     branches to use PC-relative addressing mode.
+
+ -- : BFD_RELOC_M68HC11_RL_GROUP
+     Motorola 68HC11 reloc.  This reloc marks a group of several
+     instructions that gcc generates and for which the linker
+     relaxation pass can modify and/or remove some of them.
+
+ -- : BFD_RELOC_M68HC11_LO16
+     Motorola 68HC11 reloc.  This is the 16-bit lower part of an
+     address.  It is used for 'call' instruction to specify the symbol
+     address without any special transformation (due to memory bank
+     window).
+
+ -- : BFD_RELOC_M68HC11_PAGE
+     Motorola 68HC11 reloc.  This is a 8-bit reloc that specifies the
+     page number of an address.  It is used by 'call' instruction to
+     specify the page number of the symbol.
+
+ -- : BFD_RELOC_M68HC11_24
+     Motorola 68HC11 reloc.  This is a 24-bit reloc that represents the
+     address with a 16-bit value and a 8-bit page number.  The symbol
+     address is transformed to follow the 16K memory bank of 68HC12
+     (seen as mapped in the window).
+
+ -- : BFD_RELOC_M68HC12_5B
+     Motorola 68HC12 reloc.  This is the 5 bits of a value.
+
+ -- : BFD_RELOC_16C_NUM08
+ -- : BFD_RELOC_16C_NUM08_C
+ -- : BFD_RELOC_16C_NUM16
+ -- : BFD_RELOC_16C_NUM16_C
+ -- : BFD_RELOC_16C_NUM32
+ -- : BFD_RELOC_16C_NUM32_C
+ -- : BFD_RELOC_16C_DISP04
+ -- : BFD_RELOC_16C_DISP04_C
+ -- : BFD_RELOC_16C_DISP08
+ -- : BFD_RELOC_16C_DISP08_C
+ -- : BFD_RELOC_16C_DISP16
+ -- : BFD_RELOC_16C_DISP16_C
+ -- : BFD_RELOC_16C_DISP24
+ -- : BFD_RELOC_16C_DISP24_C
+ -- : BFD_RELOC_16C_DISP24a
+ -- : BFD_RELOC_16C_DISP24a_C
+ -- : BFD_RELOC_16C_REG04
+ -- : BFD_RELOC_16C_REG04_C
+ -- : BFD_RELOC_16C_REG04a
+ -- : BFD_RELOC_16C_REG04a_C
+ -- : BFD_RELOC_16C_REG14
+ -- : BFD_RELOC_16C_REG14_C
+ -- : BFD_RELOC_16C_REG16
+ -- : BFD_RELOC_16C_REG16_C
+ -- : BFD_RELOC_16C_REG20
+ -- : BFD_RELOC_16C_REG20_C
+ -- : BFD_RELOC_16C_ABS20
+ -- : BFD_RELOC_16C_ABS20_C
+ -- : BFD_RELOC_16C_ABS24
+ -- : BFD_RELOC_16C_ABS24_C
+ -- : BFD_RELOC_16C_IMM04
+ -- : BFD_RELOC_16C_IMM04_C
+ -- : BFD_RELOC_16C_IMM16
+ -- : BFD_RELOC_16C_IMM16_C
+ -- : BFD_RELOC_16C_IMM20
+ -- : BFD_RELOC_16C_IMM20_C
+ -- : BFD_RELOC_16C_IMM24
+ -- : BFD_RELOC_16C_IMM24_C
+ -- : BFD_RELOC_16C_IMM32
+ -- : BFD_RELOC_16C_IMM32_C
+     NS CR16C Relocations.
+
+ -- : BFD_RELOC_CR16_NUM8
+ -- : BFD_RELOC_CR16_NUM16
+ -- : BFD_RELOC_CR16_NUM32
+ -- : BFD_RELOC_CR16_NUM32a
+ -- : BFD_RELOC_CR16_REGREL0
+ -- : BFD_RELOC_CR16_REGREL4
+ -- : BFD_RELOC_CR16_REGREL4a
+ -- : BFD_RELOC_CR16_REGREL14
+ -- : BFD_RELOC_CR16_REGREL14a
+ -- : BFD_RELOC_CR16_REGREL16
+ -- : BFD_RELOC_CR16_REGREL20
+ -- : BFD_RELOC_CR16_REGREL20a
+ -- : BFD_RELOC_CR16_ABS20
+ -- : BFD_RELOC_CR16_ABS24
+ -- : BFD_RELOC_CR16_IMM4
+ -- : BFD_RELOC_CR16_IMM8
+ -- : BFD_RELOC_CR16_IMM16
+ -- : BFD_RELOC_CR16_IMM20
+ -- : BFD_RELOC_CR16_IMM24
+ -- : BFD_RELOC_CR16_IMM32
+ -- : BFD_RELOC_CR16_IMM32a
+ -- : BFD_RELOC_CR16_DISP4
+ -- : BFD_RELOC_CR16_DISP8
+ -- : BFD_RELOC_CR16_DISP16
+ -- : BFD_RELOC_CR16_DISP20
+ -- : BFD_RELOC_CR16_DISP24
+ -- : BFD_RELOC_CR16_DISP24a
+ -- : BFD_RELOC_CR16_SWITCH8
+ -- : BFD_RELOC_CR16_SWITCH16
+ -- : BFD_RELOC_CR16_SWITCH32
+ -- : BFD_RELOC_CR16_GOT_REGREL20
+ -- : BFD_RELOC_CR16_GOTC_REGREL20
+ -- : BFD_RELOC_CR16_GLOB_DAT
+     NS CR16 Relocations.
+
+ -- : BFD_RELOC_CRX_REL4
+ -- : BFD_RELOC_CRX_REL8
+ -- : BFD_RELOC_CRX_REL8_CMP
+ -- : BFD_RELOC_CRX_REL16
+ -- : BFD_RELOC_CRX_REL24
+ -- : BFD_RELOC_CRX_REL32
+ -- : BFD_RELOC_CRX_REGREL12
+ -- : BFD_RELOC_CRX_REGREL22
+ -- : BFD_RELOC_CRX_REGREL28
+ -- : BFD_RELOC_CRX_REGREL32
+ -- : BFD_RELOC_CRX_ABS16
+ -- : BFD_RELOC_CRX_ABS32
+ -- : BFD_RELOC_CRX_NUM8
+ -- : BFD_RELOC_CRX_NUM16
+ -- : BFD_RELOC_CRX_NUM32
+ -- : BFD_RELOC_CRX_IMM16
+ -- : BFD_RELOC_CRX_IMM32
+ -- : BFD_RELOC_CRX_SWITCH8
+ -- : BFD_RELOC_CRX_SWITCH16
+ -- : BFD_RELOC_CRX_SWITCH32
+     NS CRX Relocations.
+
+ -- : BFD_RELOC_CRIS_BDISP8
+ -- : BFD_RELOC_CRIS_UNSIGNED_5
+ -- : BFD_RELOC_CRIS_SIGNED_6
+ -- : BFD_RELOC_CRIS_UNSIGNED_6
+ -- : BFD_RELOC_CRIS_SIGNED_8
+ -- : BFD_RELOC_CRIS_UNSIGNED_8
+ -- : BFD_RELOC_CRIS_SIGNED_16
+ -- : BFD_RELOC_CRIS_UNSIGNED_16
+ -- : BFD_RELOC_CRIS_LAPCQ_OFFSET
+ -- : BFD_RELOC_CRIS_UNSIGNED_4
+     These relocs are only used within the CRIS assembler.  They are not
+     (at present) written to any object files.
+
+ -- : BFD_RELOC_CRIS_COPY
+ -- : BFD_RELOC_CRIS_GLOB_DAT
+ -- : BFD_RELOC_CRIS_JUMP_SLOT
+ -- : BFD_RELOC_CRIS_RELATIVE
+     Relocs used in ELF shared libraries for CRIS.
+
+ -- : BFD_RELOC_CRIS_32_GOT
+     32-bit offset to symbol-entry within GOT.
+
+ -- : BFD_RELOC_CRIS_16_GOT
+     16-bit offset to symbol-entry within GOT.
+
+ -- : BFD_RELOC_CRIS_32_GOTPLT
+     32-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_CRIS_16_GOTPLT
+     16-bit offset to symbol-entry within GOT, with PLT handling.
+
+ -- : BFD_RELOC_CRIS_32_GOTREL
+     32-bit offset to symbol, relative to GOT.
+
+ -- : BFD_RELOC_CRIS_32_PLT_GOTREL
+     32-bit offset to symbol with PLT entry, relative to GOT.
+
+ -- : BFD_RELOC_CRIS_32_PLT_PCREL
+     32-bit offset to symbol with PLT entry, relative to this
+     relocation.
+
+ -- : BFD_RELOC_CRIS_32_GOT_GD
+ -- : BFD_RELOC_CRIS_16_GOT_GD
+ -- : BFD_RELOC_CRIS_32_GD
+ -- : BFD_RELOC_CRIS_DTP
+ -- : BFD_RELOC_CRIS_32_DTPREL
+ -- : BFD_RELOC_CRIS_16_DTPREL
+ -- : BFD_RELOC_CRIS_32_GOT_TPREL
+ -- : BFD_RELOC_CRIS_16_GOT_TPREL
+ -- : BFD_RELOC_CRIS_32_TPREL
+ -- : BFD_RELOC_CRIS_16_TPREL
+ -- : BFD_RELOC_CRIS_DTPMOD
+ -- : BFD_RELOC_CRIS_32_IE
+     Relocs used in TLS code for CRIS.
+
+ -- : BFD_RELOC_860_COPY
+ -- : BFD_RELOC_860_GLOB_DAT
+ -- : BFD_RELOC_860_JUMP_SLOT
+ -- : BFD_RELOC_860_RELATIVE
+ -- : BFD_RELOC_860_PC26
+ -- : BFD_RELOC_860_PLT26
+ -- : BFD_RELOC_860_PC16
+ -- : BFD_RELOC_860_LOW0
+ -- : BFD_RELOC_860_SPLIT0
+ -- : BFD_RELOC_860_LOW1
+ -- : BFD_RELOC_860_SPLIT1
+ -- : BFD_RELOC_860_LOW2
+ -- : BFD_RELOC_860_SPLIT2
+ -- : BFD_RELOC_860_LOW3
+ -- : BFD_RELOC_860_LOGOT0
+ -- : BFD_RELOC_860_SPGOT0
+ -- : BFD_RELOC_860_LOGOT1
+ -- : BFD_RELOC_860_SPGOT1
+ -- : BFD_RELOC_860_LOGOTOFF0
+ -- : BFD_RELOC_860_SPGOTOFF0
+ -- : BFD_RELOC_860_LOGOTOFF1
+ -- : BFD_RELOC_860_SPGOTOFF1
+ -- : BFD_RELOC_860_LOGOTOFF2
+ -- : BFD_RELOC_860_LOGOTOFF3
+ -- : BFD_RELOC_860_LOPC
+ -- : BFD_RELOC_860_HIGHADJ
+ -- : BFD_RELOC_860_HAGOT
+ -- : BFD_RELOC_860_HAGOTOFF
+ -- : BFD_RELOC_860_HAPC
+ -- : BFD_RELOC_860_HIGH
+ -- : BFD_RELOC_860_HIGOT
+ -- : BFD_RELOC_860_HIGOTOFF
+     Intel i860 Relocations.
+
+ -- : BFD_RELOC_OPENRISC_ABS_26
+ -- : BFD_RELOC_OPENRISC_REL_26
+     OpenRISC Relocations.
+
+ -- : BFD_RELOC_H8_DIR16A8
+ -- : BFD_RELOC_H8_DIR16R8
+ -- : BFD_RELOC_H8_DIR24A8
+ -- : BFD_RELOC_H8_DIR24R8
+ -- : BFD_RELOC_H8_DIR32A16
+     H8 elf Relocations.
+
+ -- : BFD_RELOC_XSTORMY16_REL_12
+ -- : BFD_RELOC_XSTORMY16_12
+ -- : BFD_RELOC_XSTORMY16_24
+ -- : BFD_RELOC_XSTORMY16_FPTR16
+     Sony Xstormy16 Relocations.
+
+ -- : BFD_RELOC_RELC
+     Self-describing complex relocations.
+
+ -- : BFD_RELOC_XC16X_PAG
+ -- : BFD_RELOC_XC16X_POF
+ -- : BFD_RELOC_XC16X_SEG
+ -- : BFD_RELOC_XC16X_SOF
+     Infineon Relocations.
+
+ -- : BFD_RELOC_VAX_GLOB_DAT
+ -- : BFD_RELOC_VAX_JMP_SLOT
+ -- : BFD_RELOC_VAX_RELATIVE
+     Relocations used by VAX ELF.
+
+ -- : BFD_RELOC_MT_PC16
+     Morpho MT - 16 bit immediate relocation.
+
+ -- : BFD_RELOC_MT_HI16
+     Morpho MT - Hi 16 bits of an address.
+
+ -- : BFD_RELOC_MT_LO16
+     Morpho MT - Low 16 bits of an address.
+
+ -- : BFD_RELOC_MT_GNU_VTINHERIT
+     Morpho MT - Used to tell the linker which vtable entries are used.
+
+ -- : BFD_RELOC_MT_GNU_VTENTRY
+     Morpho MT - Used to tell the linker which vtable entries are used.
+
+ -- : BFD_RELOC_MT_PCINSN8
+     Morpho MT - 8 bit immediate relocation.
+
+ -- : BFD_RELOC_MSP430_10_PCREL
+ -- : BFD_RELOC_MSP430_16_PCREL
+ -- : BFD_RELOC_MSP430_16
+ -- : BFD_RELOC_MSP430_16_PCREL_BYTE
+ -- : BFD_RELOC_MSP430_16_BYTE
+ -- : BFD_RELOC_MSP430_2X_PCREL
+ -- : BFD_RELOC_MSP430_RL_PCREL
+     msp430 specific relocation codes
+
+ -- : BFD_RELOC_IQ2000_OFFSET_16
+ -- : BFD_RELOC_IQ2000_OFFSET_21
+ -- : BFD_RELOC_IQ2000_UHI16
+     IQ2000 Relocations.
+
+ -- : BFD_RELOC_XTENSA_RTLD
+     Special Xtensa relocation used only by PLT entries in ELF shared
+     objects to indicate that the runtime linker should set the value
+     to one of its own internal functions or data structures.
+
+ -- : BFD_RELOC_XTENSA_GLOB_DAT
+ -- : BFD_RELOC_XTENSA_JMP_SLOT
+ -- : BFD_RELOC_XTENSA_RELATIVE
+     Xtensa relocations for ELF shared objects.
+
+ -- : BFD_RELOC_XTENSA_PLT
+     Xtensa relocation used in ELF object files for symbols that may
+     require PLT entries.  Otherwise, this is just a generic 32-bit
+     relocation.
+
+ -- : BFD_RELOC_XTENSA_DIFF8
+ -- : BFD_RELOC_XTENSA_DIFF16
+ -- : BFD_RELOC_XTENSA_DIFF32
+     Xtensa relocations to mark the difference of two local symbols.
+     These are only needed to support linker relaxation and can be
+     ignored when not relaxing.  The field is set to the value of the
+     difference assuming no relaxation.  The relocation encodes the
+     position of the first symbol so the linker can determine whether
+     to adjust the field value.
+
+ -- : BFD_RELOC_XTENSA_SLOT0_OP
+ -- : BFD_RELOC_XTENSA_SLOT1_OP
+ -- : BFD_RELOC_XTENSA_SLOT2_OP
+ -- : BFD_RELOC_XTENSA_SLOT3_OP
+ -- : BFD_RELOC_XTENSA_SLOT4_OP
+ -- : BFD_RELOC_XTENSA_SLOT5_OP
+ -- : BFD_RELOC_XTENSA_SLOT6_OP
+ -- : BFD_RELOC_XTENSA_SLOT7_OP
+ -- : BFD_RELOC_XTENSA_SLOT8_OP
+ -- : BFD_RELOC_XTENSA_SLOT9_OP
+ -- : BFD_RELOC_XTENSA_SLOT10_OP
+ -- : BFD_RELOC_XTENSA_SLOT11_OP
+ -- : BFD_RELOC_XTENSA_SLOT12_OP
+ -- : BFD_RELOC_XTENSA_SLOT13_OP
+ -- : BFD_RELOC_XTENSA_SLOT14_OP
+     Generic Xtensa relocations for instruction operands.  Only the slot
+     number is encoded in the relocation.  The relocation applies to the
+     last PC-relative immediate operand, or if there are no PC-relative
+     immediates, to the last immediate operand.
+
+ -- : BFD_RELOC_XTENSA_SLOT0_ALT
+ -- : BFD_RELOC_XTENSA_SLOT1_ALT
+ -- : BFD_RELOC_XTENSA_SLOT2_ALT
+ -- : BFD_RELOC_XTENSA_SLOT3_ALT
+ -- : BFD_RELOC_XTENSA_SLOT4_ALT
+ -- : BFD_RELOC_XTENSA_SLOT5_ALT
+ -- : BFD_RELOC_XTENSA_SLOT6_ALT
+ -- : BFD_RELOC_XTENSA_SLOT7_ALT
+ -- : BFD_RELOC_XTENSA_SLOT8_ALT
+ -- : BFD_RELOC_XTENSA_SLOT9_ALT
+ -- : BFD_RELOC_XTENSA_SLOT10_ALT
+ -- : BFD_RELOC_XTENSA_SLOT11_ALT
+ -- : BFD_RELOC_XTENSA_SLOT12_ALT
+ -- : BFD_RELOC_XTENSA_SLOT13_ALT
+ -- : BFD_RELOC_XTENSA_SLOT14_ALT
+     Alternate Xtensa relocations.  Only the slot is encoded in the
+     relocation.  The meaning of these relocations is opcode-specific.
+
+ -- : BFD_RELOC_XTENSA_OP0
+ -- : BFD_RELOC_XTENSA_OP1
+ -- : BFD_RELOC_XTENSA_OP2
+     Xtensa relocations for backward compatibility.  These have all been
+     replaced by BFD_RELOC_XTENSA_SLOT0_OP.
+
+ -- : BFD_RELOC_XTENSA_ASM_EXPAND
+     Xtensa relocation to mark that the assembler expanded the
+     instructions from an original target.  The expansion size is
+     encoded in the reloc size.
+
+ -- : BFD_RELOC_XTENSA_ASM_SIMPLIFY
+     Xtensa relocation to mark that the linker should simplify
+     assembler-expanded instructions.  This is commonly used internally
+     by the linker after analysis of a BFD_RELOC_XTENSA_ASM_EXPAND.
+
+ -- : BFD_RELOC_XTENSA_TLSDESC_FN
+ -- : BFD_RELOC_XTENSA_TLSDESC_ARG
+ -- : BFD_RELOC_XTENSA_TLS_DTPOFF
+ -- : BFD_RELOC_XTENSA_TLS_TPOFF
+ -- : BFD_RELOC_XTENSA_TLS_FUNC
+ -- : BFD_RELOC_XTENSA_TLS_ARG
+ -- : BFD_RELOC_XTENSA_TLS_CALL
+     Xtensa TLS relocations.
+
+ -- : BFD_RELOC_Z80_DISP8
+     8 bit signed offset in (ix+d) or (iy+d).
+
+ -- : BFD_RELOC_Z8K_DISP7
+     DJNZ offset.
+
+ -- : BFD_RELOC_Z8K_CALLR
+     CALR offset.
+
+ -- : BFD_RELOC_Z8K_IMM4L
+     4 bit value.
+
+ -- : BFD_RELOC_LM32_CALL
+ -- : BFD_RELOC_LM32_BRANCH
+ -- : BFD_RELOC_LM32_16_GOT
+ -- : BFD_RELOC_LM32_GOTOFF_HI16
+ -- : BFD_RELOC_LM32_GOTOFF_LO16
+ -- : BFD_RELOC_LM32_COPY
+ -- : BFD_RELOC_LM32_GLOB_DAT
+ -- : BFD_RELOC_LM32_JMP_SLOT
+ -- : BFD_RELOC_LM32_RELATIVE
+     Lattice Mico32 relocations.
+
+ -- : BFD_RELOC_MACH_O_SECTDIFF
+     Difference between two section addreses.  Must be followed by a
+     BFD_RELOC_MACH_O_PAIR.
+
+ -- : BFD_RELOC_MACH_O_PAIR
+     Mach-O generic relocations.
+
+ -- : BFD_RELOC_MICROBLAZE_32_LO
+     This is a 32 bit reloc for the microblaze that stores the low 16
+     bits of a value
+
+ -- : BFD_RELOC_MICROBLAZE_32_LO_PCREL
+     This is a 32 bit pc-relative reloc for the microblaze that stores
+     the low 16 bits of a value
+
+ -- : BFD_RELOC_MICROBLAZE_32_ROSDA
+     This is a 32 bit reloc for the microblaze that stores a value
+     relative to the read-only small data area anchor
+
+ -- : BFD_RELOC_MICROBLAZE_32_RWSDA
+     This is a 32 bit reloc for the microblaze that stores a value
+     relative to the read-write small data area anchor
+
+ -- : BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM
+     This is a 32 bit reloc for the microblaze to handle expressions of
+     the form "Symbol Op Symbol"
+
+ -- : BFD_RELOC_MICROBLAZE_64_NONE
+     This is a 64 bit reloc that stores the 32 bit pc relative value in
+     two words (with an imm instruction).  No relocation is done here -
+     only used for relaxing
+
+ -- : BFD_RELOC_MICROBLAZE_64_GOTPC
+     This is a 64 bit reloc that stores the 32 bit pc relative value in
+     two words (with an imm instruction).  The relocation is
+     PC-relative GOT offset
+
+ -- : BFD_RELOC_MICROBLAZE_64_GOT
+     This is a 64 bit reloc that stores the 32 bit pc relative value in
+     two words (with an imm instruction).  The relocation is GOT offset
+
+ -- : BFD_RELOC_MICROBLAZE_64_PLT
+     This is a 64 bit reloc that stores the 32 bit pc relative value in
+     two words (with an imm instruction).  The relocation is
+     PC-relative offset into PLT
+
+ -- : BFD_RELOC_MICROBLAZE_64_GOTOFF
+     This is a 64 bit reloc that stores the 32 bit GOT relative value
+     in two words (with an imm instruction).  The relocation is
+     relative offset from _GLOBAL_OFFSET_TABLE_
+
+ -- : BFD_RELOC_MICROBLAZE_32_GOTOFF
+     This is a 32 bit reloc that stores the 32 bit GOT relative value
+     in a word.  The relocation is relative offset from
+
+ -- : BFD_RELOC_MICROBLAZE_COPY
+     This is used to tell the dynamic linker to copy the value out of
+     the dynamic object into the runtime process image.
+
+
+     typedef enum bfd_reloc_code_real bfd_reloc_code_real_type;
+   
+2.10.2.2 `bfd_reloc_type_lookup'
+................................
+
+*Synopsis*
+     reloc_howto_type *bfd_reloc_type_lookup
+        (bfd *abfd, bfd_reloc_code_real_type code);
+     reloc_howto_type *bfd_reloc_name_lookup
+        (bfd *abfd, const char *reloc_name);
+   *Description*
+Return a pointer to a howto structure which, when invoked, will perform
+the relocation CODE on data from the architecture noted.
+
+2.10.2.3 `bfd_default_reloc_type_lookup'
+........................................
+
+*Synopsis*
+     reloc_howto_type *bfd_default_reloc_type_lookup
+        (bfd *abfd, bfd_reloc_code_real_type  code);
+   *Description*
+Provides a default relocation lookup routine for any architecture.
+
+2.10.2.4 `bfd_get_reloc_code_name'
+..................................
+
+*Synopsis*
+     const char *bfd_get_reloc_code_name (bfd_reloc_code_real_type code);
+   *Description*
+Provides a printable name for the supplied relocation code.  Useful
+mainly for printing error messages.
+
+2.10.2.5 `bfd_generic_relax_section'
+....................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_relax_section
+        (bfd *abfd,
+         asection *section,
+         struct bfd_link_info *,
+         bfd_boolean *);
+   *Description*
+Provides default handling for relaxing for back ends which don't do
+relaxing.
+
+2.10.2.6 `bfd_generic_gc_sections'
+..................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_gc_sections
+        (bfd *, struct bfd_link_info *);
+   *Description*
+Provides default handling for relaxing for back ends which don't do
+section gc - i.e., does nothing.
+
+2.10.2.7 `bfd_generic_merge_sections'
+.....................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_merge_sections
+        (bfd *, struct bfd_link_info *);
+   *Description*
+Provides default handling for SEC_MERGE section merging for back ends
+which don't have SEC_MERGE support - i.e., does nothing.
+
+2.10.2.8 `bfd_generic_get_relocated_section_contents'
+.....................................................
+
+*Synopsis*
+     bfd_byte *bfd_generic_get_relocated_section_contents
+        (bfd *abfd,
+         struct bfd_link_info *link_info,
+         struct bfd_link_order *link_order,
+         bfd_byte *data,
+         bfd_boolean relocatable,
+         asymbol **symbols);
+   *Description*
+Provides default handling of relocation effort for back ends which
+can't be bothered to do it efficiently.
+
+
+File: bfd.info,  Node: Core Files,  Next: Targets,  Prev: Relocations,  Up: BFD front end
+
+2.11 Core files
+===============
+
+2.11.1 Core file functions
+--------------------------
+
+*Description*
+These are functions pertaining to core files.
+
+2.11.1.1 `bfd_core_file_failing_command'
+........................................
+
+*Synopsis*
+     const char *bfd_core_file_failing_command (bfd *abfd);
+   *Description*
+Return a read-only string explaining which program was running when it
+failed and produced the core file ABFD.
+
+2.11.1.2 `bfd_core_file_failing_signal'
+.......................................
+
+*Synopsis*
+     int bfd_core_file_failing_signal (bfd *abfd);
+   *Description*
+Returns the signal number which caused the core dump which generated
+the file the BFD ABFD is attached to.
+
+2.11.1.3 `core_file_matches_executable_p'
+.........................................
+
+*Synopsis*
+     bfd_boolean core_file_matches_executable_p
+        (bfd *core_bfd, bfd *exec_bfd);
+   *Description*
+Return `TRUE' if the core file attached to CORE_BFD was generated by a
+run of the executable file attached to EXEC_BFD, `FALSE' otherwise.
+
+2.11.1.4 `generic_core_file_matches_executable_p'
+.................................................
+
+*Synopsis*
+     bfd_boolean generic_core_file_matches_executable_p
+        (bfd *core_bfd, bfd *exec_bfd);
+   *Description*
+Return TRUE if the core file attached to CORE_BFD was generated by a
+run of the executable file attached to EXEC_BFD.  The match is based on
+executable basenames only.
+
+   Note: When not able to determine the core file failing command or
+the executable name, we still return TRUE even though we're not sure
+that core file and executable match.  This is to avoid generating a
+false warning in situations where we really don't know whether they
+match or not.
+
+
+File: bfd.info,  Node: Targets,  Next: Architectures,  Prev: Core Files,  Up: BFD front end
+
+2.12 Targets
+============
+
+*Description*
+Each port of BFD to a different machine requires the creation of a
+target back end. All the back end provides to the root part of BFD is a
+structure containing pointers to functions which perform certain low
+level operations on files. BFD translates the applications's requests
+through a pointer into calls to the back end routines.
+
+   When a file is opened with `bfd_openr', its format and target are
+unknown. BFD uses various mechanisms to determine how to interpret the
+file. The operations performed are:
+
+   * Create a BFD by calling the internal routine `_bfd_new_bfd', then
+     call `bfd_find_target' with the target string supplied to
+     `bfd_openr' and the new BFD pointer.
+
+   * If a null target string was provided to `bfd_find_target', look up
+     the environment variable `GNUTARGET' and use that as the target
+     string.
+
+   * If the target string is still `NULL', or the target string is
+     `default', then use the first item in the target vector as the
+     target type, and set `target_defaulted' in the BFD to cause
+     `bfd_check_format' to loop through all the targets.  *Note
+     bfd_target::.  *Note Formats::.
+
+   * Otherwise, inspect the elements in the target vector one by one,
+     until a match on target name is found. When found, use it.
+
+   * Otherwise return the error `bfd_error_invalid_target' to
+     `bfd_openr'.
+
+   * `bfd_openr' attempts to open the file using `bfd_open_file', and
+     returns the BFD.
+   Once the BFD has been opened and the target selected, the file
+format may be determined. This is done by calling `bfd_check_format' on
+the BFD with a suggested format.  If `target_defaulted' has been set,
+each possible target type is tried to see if it recognizes the
+specified format.  `bfd_check_format' returns `TRUE' when the caller
+guesses right.
+
+* Menu:
+
+* bfd_target::
+
+
+File: bfd.info,  Node: bfd_target,  Prev: Targets,  Up: Targets
+
+2.12.1 bfd_target
+-----------------
+
+*Description*
+This structure contains everything that BFD knows about a target. It
+includes things like its byte order, name, and which routines to call
+to do various operations.
+
+   Every BFD points to a target structure with its `xvec' member.
+
+   The macros below are used to dispatch to functions through the
+`bfd_target' vector. They are used in a number of macros further down
+in `bfd.h', and are also used when calling various routines by hand
+inside the BFD implementation.  The ARGLIST argument must be
+parenthesized; it contains all the arguments to the called function.
+
+   They make the documentation (more) unpleasant to read, so if someone
+wants to fix this and not break the above, please do.
+     #define BFD_SEND(bfd, message, arglist) \
+       ((*((bfd)->xvec->message)) arglist)
+
+     #ifdef DEBUG_BFD_SEND
+     #undef BFD_SEND
+     #define BFD_SEND(bfd, message, arglist) \
+       (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+         ((*((bfd)->xvec->message)) arglist) : \
+         (bfd_assert (__FILE__,__LINE__), NULL))
+     #endif
+   For operations which index on the BFD format:
+     #define BFD_SEND_FMT(bfd, message, arglist) \
+       (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist)
+
+     #ifdef DEBUG_BFD_SEND
+     #undef BFD_SEND_FMT
+     #define BFD_SEND_FMT(bfd, message, arglist) \
+       (((bfd) && (bfd)->xvec && (bfd)->xvec->message) ? \
+        (((bfd)->xvec->message[(int) ((bfd)->format)]) arglist) : \
+        (bfd_assert (__FILE__,__LINE__), NULL))
+     #endif
+   This is the structure which defines the type of BFD this is.  The
+`xvec' member of the struct `bfd' itself points here.  Each module that
+implements access to a different target under BFD, defines one of these.
+
+   FIXME, these names should be rationalised with the names of the
+entry points which call them. Too bad we can't have one macro to define
+them both!
+     enum bfd_flavour
+     {
+       bfd_target_unknown_flavour,
+       bfd_target_aout_flavour,
+       bfd_target_coff_flavour,
+       bfd_target_ecoff_flavour,
+       bfd_target_xcoff_flavour,
+       bfd_target_elf_flavour,
+       bfd_target_ieee_flavour,
+       bfd_target_nlm_flavour,
+       bfd_target_oasys_flavour,
+       bfd_target_tekhex_flavour,
+       bfd_target_srec_flavour,
+       bfd_target_verilog_flavour,
+       bfd_target_ihex_flavour,
+       bfd_target_som_flavour,
+       bfd_target_os9k_flavour,
+       bfd_target_versados_flavour,
+       bfd_target_msdos_flavour,
+       bfd_target_ovax_flavour,
+       bfd_target_evax_flavour,
+       bfd_target_mmo_flavour,
+       bfd_target_mach_o_flavour,
+       bfd_target_pef_flavour,
+       bfd_target_pef_xlib_flavour,
+       bfd_target_sym_flavour
+     };
+
+     enum bfd_endian { BFD_ENDIAN_BIG, BFD_ENDIAN_LITTLE, BFD_ENDIAN_UNKNOWN };
+
+     /* Forward declaration.  */
+     typedef struct bfd_link_info _bfd_link_info;
+
+     typedef struct bfd_target
+     {
+       /* Identifies the kind of target, e.g., SunOS4, Ultrix, etc.  */
+       char *name;
+
+      /* The "flavour" of a back end is a general indication about
+         the contents of a file.  */
+       enum bfd_flavour flavour;
+
+       /* The order of bytes within the data area of a file.  */
+       enum bfd_endian byteorder;
+
+      /* The order of bytes within the header parts of a file.  */
+       enum bfd_endian header_byteorder;
+
+       /* A mask of all the flags which an executable may have set -
+          from the set `BFD_NO_FLAGS', `HAS_RELOC', ...`D_PAGED'.  */
+       flagword object_flags;
+
+      /* A mask of all the flags which a section may have set - from
+         the set `SEC_NO_FLAGS', `SEC_ALLOC', ...`SET_NEVER_LOAD'.  */
+       flagword section_flags;
+
+      /* The character normally found at the front of a symbol.
+         (if any), perhaps `_'.  */
+       char symbol_leading_char;
+
+      /* The pad character for file names within an archive header.  */
+       char ar_pad_char;
+
+       /* The maximum number of characters in an archive header.  */
+       unsigned short ar_max_namelen;
+
+       /* Entries for byte swapping for data. These are different from the
+          other entry points, since they don't take a BFD as the first argument.
+          Certain other handlers could do the same.  */
+       bfd_uint64_t   (*bfd_getx64) (const void *);
+       bfd_int64_t    (*bfd_getx_signed_64) (const void *);
+       void           (*bfd_putx64) (bfd_uint64_t, void *);
+       bfd_vma        (*bfd_getx32) (const void *);
+       bfd_signed_vma (*bfd_getx_signed_32) (const void *);
+       void           (*bfd_putx32) (bfd_vma, void *);
+       bfd_vma        (*bfd_getx16) (const void *);
+       bfd_signed_vma (*bfd_getx_signed_16) (const void *);
+       void           (*bfd_putx16) (bfd_vma, void *);
+
+       /* Byte swapping for the headers.  */
+       bfd_uint64_t   (*bfd_h_getx64) (const void *);
+       bfd_int64_t    (*bfd_h_getx_signed_64) (const void *);
+       void           (*bfd_h_putx64) (bfd_uint64_t, void *);
+       bfd_vma        (*bfd_h_getx32) (const void *);
+       bfd_signed_vma (*bfd_h_getx_signed_32) (const void *);
+       void           (*bfd_h_putx32) (bfd_vma, void *);
+       bfd_vma        (*bfd_h_getx16) (const void *);
+       bfd_signed_vma (*bfd_h_getx_signed_16) (const void *);
+       void           (*bfd_h_putx16) (bfd_vma, void *);
+
+       /* Format dependent routines: these are vectors of entry points
+          within the target vector structure, one for each format to check.  */
+
+       /* Check the format of a file being read.  Return a `bfd_target *' or zero.  */
+       const struct bfd_target *(*_bfd_check_format[bfd_type_end]) (bfd *);
+
+       /* Set the format of a file being written.  */
+       bfd_boolean (*_bfd_set_format[bfd_type_end]) (bfd *);
+
+       /* Write cached information into a file being written, at `bfd_close'.  */
+       bfd_boolean (*_bfd_write_contents[bfd_type_end]) (bfd *);
+   The general target vector.  These vectors are initialized using the
+BFD_JUMP_TABLE macros.
+
+       /* Generic entry points.  */
+     #define BFD_JUMP_TABLE_GENERIC(NAME) \
+       NAME##_close_and_cleanup, \
+       NAME##_bfd_free_cached_info, \
+       NAME##_new_section_hook, \
+       NAME##_get_section_contents, \
+       NAME##_get_section_contents_in_window
+
+       /* Called when the BFD is being closed to do any necessary cleanup.  */
+       bfd_boolean (*_close_and_cleanup) (bfd *);
+       /* Ask the BFD to free all cached information.  */
+       bfd_boolean (*_bfd_free_cached_info) (bfd *);
+       /* Called when a new section is created.  */
+       bfd_boolean (*_new_section_hook) (bfd *, sec_ptr);
+       /* Read the contents of a section.  */
+       bfd_boolean (*_bfd_get_section_contents)
+         (bfd *, sec_ptr, void *, file_ptr, bfd_size_type);
+       bfd_boolean (*_bfd_get_section_contents_in_window)
+         (bfd *, sec_ptr, bfd_window *, file_ptr, bfd_size_type);
+
+       /* Entry points to copy private data.  */
+     #define BFD_JUMP_TABLE_COPY(NAME) \
+       NAME##_bfd_copy_private_bfd_data, \
+       NAME##_bfd_merge_private_bfd_data, \
+       _bfd_generic_init_private_section_data, \
+       NAME##_bfd_copy_private_section_data, \
+       NAME##_bfd_copy_private_symbol_data, \
+       NAME##_bfd_copy_private_header_data, \
+       NAME##_bfd_set_private_flags, \
+       NAME##_bfd_print_private_bfd_data
+
+       /* Called to copy BFD general private data from one object file
+          to another.  */
+       bfd_boolean (*_bfd_copy_private_bfd_data) (bfd *, bfd *);
+       /* Called to merge BFD general private data from one object file
+          to a common output file when linking.  */
+       bfd_boolean (*_bfd_merge_private_bfd_data) (bfd *, bfd *);
+       /* Called to initialize BFD private section data from one object file
+          to another.  */
+     #define bfd_init_private_section_data(ibfd, isec, obfd, osec, link_info) \
+       BFD_SEND (obfd, _bfd_init_private_section_data, (ibfd, isec, obfd, osec, link_info))
+       bfd_boolean (*_bfd_init_private_section_data)
+         (bfd *, sec_ptr, bfd *, sec_ptr, struct bfd_link_info *);
+       /* Called to copy BFD private section data from one object file
+          to another.  */
+       bfd_boolean (*_bfd_copy_private_section_data)
+         (bfd *, sec_ptr, bfd *, sec_ptr);
+       /* Called to copy BFD private symbol data from one symbol
+          to another.  */
+       bfd_boolean (*_bfd_copy_private_symbol_data)
+         (bfd *, asymbol *, bfd *, asymbol *);
+       /* Called to copy BFD private header data from one object file
+          to another.  */
+       bfd_boolean (*_bfd_copy_private_header_data)
+         (bfd *, bfd *);
+       /* Called to set private backend flags.  */
+       bfd_boolean (*_bfd_set_private_flags) (bfd *, flagword);
+
+       /* Called to print private BFD data.  */
+       bfd_boolean (*_bfd_print_private_bfd_data) (bfd *, void *);
+
+       /* Core file entry points.  */
+     #define BFD_JUMP_TABLE_CORE(NAME) \
+       NAME##_core_file_failing_command, \
+       NAME##_core_file_failing_signal, \
+       NAME##_core_file_matches_executable_p
+
+       char *      (*_core_file_failing_command) (bfd *);
+       int         (*_core_file_failing_signal) (bfd *);
+       bfd_boolean (*_core_file_matches_executable_p) (bfd *, bfd *);
+
+       /* Archive entry points.  */
+     #define BFD_JUMP_TABLE_ARCHIVE(NAME) \
+       NAME##_slurp_armap, \
+       NAME##_slurp_extended_name_table, \
+       NAME##_construct_extended_name_table, \
+       NAME##_truncate_arname, \
+       NAME##_write_armap, \
+       NAME##_read_ar_hdr, \
+       NAME##_openr_next_archived_file, \
+       NAME##_get_elt_at_index, \
+       NAME##_generic_stat_arch_elt, \
+       NAME##_update_armap_timestamp
+
+       bfd_boolean (*_bfd_slurp_armap) (bfd *);
+       bfd_boolean (*_bfd_slurp_extended_name_table) (bfd *);
+       bfd_boolean (*_bfd_construct_extended_name_table)
+         (bfd *, char **, bfd_size_type *, const char **);
+       void        (*_bfd_truncate_arname) (bfd *, const char *, char *);
+       bfd_boolean (*write_armap)
+         (bfd *, unsigned int, struct orl *, unsigned int, int);
+       void *      (*_bfd_read_ar_hdr_fn) (bfd *);
+       bfd *       (*openr_next_archived_file) (bfd *, bfd *);
+     #define bfd_get_elt_at_index(b,i) BFD_SEND (b, _bfd_get_elt_at_index, (b,i))
+       bfd *       (*_bfd_get_elt_at_index) (bfd *, symindex);
+       int         (*_bfd_stat_arch_elt) (bfd *, struct stat *);
+       bfd_boolean (*_bfd_update_armap_timestamp) (bfd *);
+
+       /* Entry points used for symbols.  */
+     #define BFD_JUMP_TABLE_SYMBOLS(NAME) \
+       NAME##_get_symtab_upper_bound, \
+       NAME##_canonicalize_symtab, \
+       NAME##_make_empty_symbol, \
+       NAME##_print_symbol, \
+       NAME##_get_symbol_info, \
+       NAME##_bfd_is_local_label_name, \
+       NAME##_bfd_is_target_special_symbol, \
+       NAME##_get_lineno, \
+       NAME##_find_nearest_line, \
+       _bfd_generic_find_line, \
+       NAME##_find_inliner_info, \
+       NAME##_bfd_make_debug_symbol, \
+       NAME##_read_minisymbols, \
+       NAME##_minisymbol_to_symbol
+
+       long        (*_bfd_get_symtab_upper_bound) (bfd *);
+       long        (*_bfd_canonicalize_symtab)
+         (bfd *, struct bfd_symbol **);
+       struct bfd_symbol *
+                   (*_bfd_make_empty_symbol) (bfd *);
+       void        (*_bfd_print_symbol)
+         (bfd *, void *, struct bfd_symbol *, bfd_print_symbol_type);
+     #define bfd_print_symbol(b,p,s,e) BFD_SEND (b, _bfd_print_symbol, (b,p,s,e))
+       void        (*_bfd_get_symbol_info)
+         (bfd *, struct bfd_symbol *, symbol_info *);
+     #define bfd_get_symbol_info(b,p,e) BFD_SEND (b, _bfd_get_symbol_info, (b,p,e))
+       bfd_boolean (*_bfd_is_local_label_name) (bfd *, const char *);
+       bfd_boolean (*_bfd_is_target_special_symbol) (bfd *, asymbol *);
+       alent *     (*_get_lineno) (bfd *, struct bfd_symbol *);
+       bfd_boolean (*_bfd_find_nearest_line)
+         (bfd *, struct bfd_section *, struct bfd_symbol **, bfd_vma,
+          const char **, const char **, unsigned int *);
+       bfd_boolean (*_bfd_find_line)
+         (bfd *, struct bfd_symbol **, struct bfd_symbol *,
+          const char **, unsigned int *);
+       bfd_boolean (*_bfd_find_inliner_info)
+         (bfd *, const char **, const char **, unsigned int *);
+      /* Back-door to allow format-aware applications to create debug symbols
+         while using BFD for everything else.  Currently used by the assembler
+         when creating COFF files.  */
+       asymbol *   (*_bfd_make_debug_symbol)
+         (bfd *, void *, unsigned long size);
+     #define bfd_read_minisymbols(b, d, m, s) \
+       BFD_SEND (b, _read_minisymbols, (b, d, m, s))
+       long        (*_read_minisymbols)
+         (bfd *, bfd_boolean, void **, unsigned int *);
+     #define bfd_minisymbol_to_symbol(b, d, m, f) \
+       BFD_SEND (b, _minisymbol_to_symbol, (b, d, m, f))
+       asymbol *   (*_minisymbol_to_symbol)
+         (bfd *, bfd_boolean, const void *, asymbol *);
+
+       /* Routines for relocs.  */
+     #define BFD_JUMP_TABLE_RELOCS(NAME) \
+       NAME##_get_reloc_upper_bound, \
+       NAME##_canonicalize_reloc, \
+       NAME##_bfd_reloc_type_lookup, \
+       NAME##_bfd_reloc_name_lookup
+
+       long        (*_get_reloc_upper_bound) (bfd *, sec_ptr);
+       long        (*_bfd_canonicalize_reloc)
+         (bfd *, sec_ptr, arelent **, struct bfd_symbol **);
+       /* See documentation on reloc types.  */
+       reloc_howto_type *
+                   (*reloc_type_lookup) (bfd *, bfd_reloc_code_real_type);
+       reloc_howto_type *
+                   (*reloc_name_lookup) (bfd *, const char *);
+
+
+       /* Routines used when writing an object file.  */
+     #define BFD_JUMP_TABLE_WRITE(NAME) \
+       NAME##_set_arch_mach, \
+       NAME##_set_section_contents
+
+       bfd_boolean (*_bfd_set_arch_mach)
+         (bfd *, enum bfd_architecture, unsigned long);
+       bfd_boolean (*_bfd_set_section_contents)
+         (bfd *, sec_ptr, const void *, file_ptr, bfd_size_type);
+
+       /* Routines used by the linker.  */
+     #define BFD_JUMP_TABLE_LINK(NAME) \
+       NAME##_sizeof_headers, \
+       NAME##_bfd_get_relocated_section_contents, \
+       NAME##_bfd_relax_section, \
+       NAME##_bfd_link_hash_table_create, \
+       NAME##_bfd_link_hash_table_free, \
+       NAME##_bfd_link_add_symbols, \
+       NAME##_bfd_link_just_syms, \
+       NAME##_bfd_final_link, \
+       NAME##_bfd_link_split_section, \
+       NAME##_bfd_gc_sections, \
+       NAME##_bfd_merge_sections, \
+       NAME##_bfd_is_group_section, \
+       NAME##_bfd_discard_group, \
+       NAME##_section_already_linked, \
+       NAME##_bfd_define_common_symbol
+
+       int         (*_bfd_sizeof_headers) (bfd *, struct bfd_link_info *);
+       bfd_byte *  (*_bfd_get_relocated_section_contents)
+         (bfd *, struct bfd_link_info *, struct bfd_link_order *,
+          bfd_byte *, bfd_boolean, struct bfd_symbol **);
+
+       bfd_boolean (*_bfd_relax_section)
+         (bfd *, struct bfd_section *, struct bfd_link_info *, bfd_boolean *);
+
+       /* Create a hash table for the linker.  Different backends store
+          different information in this table.  */
+       struct bfd_link_hash_table *
+                   (*_bfd_link_hash_table_create) (bfd *);
+
+       /* Release the memory associated with the linker hash table.  */
+       void        (*_bfd_link_hash_table_free) (struct bfd_link_hash_table *);
+
+       /* Add symbols from this object file into the hash table.  */
+       bfd_boolean (*_bfd_link_add_symbols) (bfd *, struct bfd_link_info *);
+
+       /* Indicate that we are only retrieving symbol values from this section.  */
+       void        (*_bfd_link_just_syms) (asection *, struct bfd_link_info *);
+
+       /* Do a link based on the link_order structures attached to each
+          section of the BFD.  */
+       bfd_boolean (*_bfd_final_link) (bfd *, struct bfd_link_info *);
+
+       /* Should this section be split up into smaller pieces during linking.  */
+       bfd_boolean (*_bfd_link_split_section) (bfd *, struct bfd_section *);
+
+       /* Remove sections that are not referenced from the output.  */
+       bfd_boolean (*_bfd_gc_sections) (bfd *, struct bfd_link_info *);
+
+       /* Attempt to merge SEC_MERGE sections.  */
+       bfd_boolean (*_bfd_merge_sections) (bfd *, struct bfd_link_info *);
+
+       /* Is this section a member of a group?  */
+       bfd_boolean (*_bfd_is_group_section) (bfd *, const struct bfd_section *);
+
+       /* Discard members of a group.  */
+       bfd_boolean (*_bfd_discard_group) (bfd *, struct bfd_section *);
+
+       /* Check if SEC has been already linked during a reloceatable or
+          final link.  */
+       void (*_section_already_linked) (bfd *, struct bfd_section *,
+                                        struct bfd_link_info *);
+
+       /* Define a common symbol.  */
+       bfd_boolean (*_bfd_define_common_symbol) (bfd *, struct bfd_link_info *,
+                                                 struct bfd_link_hash_entry *);
+
+       /* Routines to handle dynamic symbols and relocs.  */
+     #define BFD_JUMP_TABLE_DYNAMIC(NAME) \
+       NAME##_get_dynamic_symtab_upper_bound, \
+       NAME##_canonicalize_dynamic_symtab, \
+       NAME##_get_synthetic_symtab, \
+       NAME##_get_dynamic_reloc_upper_bound, \
+       NAME##_canonicalize_dynamic_reloc
+
+       /* Get the amount of memory required to hold the dynamic symbols.  */
+       long        (*_bfd_get_dynamic_symtab_upper_bound) (bfd *);
+       /* Read in the dynamic symbols.  */
+       long        (*_bfd_canonicalize_dynamic_symtab)
+         (bfd *, struct bfd_symbol **);
+       /* Create synthetized symbols.  */
+       long        (*_bfd_get_synthetic_symtab)
+         (bfd *, long, struct bfd_symbol **, long, struct bfd_symbol **,
+          struct bfd_symbol **);
+       /* Get the amount of memory required to hold the dynamic relocs.  */
+       long        (*_bfd_get_dynamic_reloc_upper_bound) (bfd *);
+       /* Read in the dynamic relocs.  */
+       long        (*_bfd_canonicalize_dynamic_reloc)
+         (bfd *, arelent **, struct bfd_symbol **);
+   A pointer to an alternative bfd_target in case the current one is not
+satisfactory.  This can happen when the target cpu supports both big
+and little endian code, and target chosen by the linker has the wrong
+endianness.  The function open_output() in ld/ldlang.c uses this field
+to find an alternative output format that is suitable.
+       /* Opposite endian version of this target.  */
+       const struct bfd_target * alternative_target;
+
+       /* Data for use by back-end routines, which isn't
+          generic enough to belong in this structure.  */
+       const void *backend_data;
+
+     } bfd_target;
+
+2.12.1.1 `bfd_set_default_target'
+.................................
+
+*Synopsis*
+     bfd_boolean bfd_set_default_target (const char *name);
+   *Description*
+Set the default target vector to use when recognizing a BFD.  This
+takes the name of the target, which may be a BFD target name or a
+configuration triplet.
+
+2.12.1.2 `bfd_find_target'
+..........................
+
+*Synopsis*
+     const bfd_target *bfd_find_target (const char *target_name, bfd *abfd);
+   *Description*
+Return a pointer to the transfer vector for the object target named
+TARGET_NAME.  If TARGET_NAME is `NULL', choose the one in the
+environment variable `GNUTARGET'; if that is null or not defined, then
+choose the first entry in the target list.  Passing in the string
+"default" or setting the environment variable to "default" will cause
+the first entry in the target list to be returned, and
+"target_defaulted" will be set in the BFD if ABFD isn't `NULL'.  This
+causes `bfd_check_format' to loop over all the targets to find the one
+that matches the file being read.
+
+2.12.1.3 `bfd_target_list'
+..........................
+
+*Synopsis*
+     const char ** bfd_target_list (void);
+   *Description*
+Return a freshly malloced NULL-terminated vector of the names of all
+the valid BFD targets. Do not modify the names.
+
+2.12.1.4 `bfd_seach_for_target'
+...............................
+
+*Synopsis*
+     const bfd_target *bfd_search_for_target
+        (int (*search_func) (const bfd_target *, void *),
+         void *);
+   *Description*
+Return a pointer to the first transfer vector in the list of transfer
+vectors maintained by BFD that produces a non-zero result when passed
+to the function SEARCH_FUNC.  The parameter DATA is passed, unexamined,
+to the search function.
+
+
+File: bfd.info,  Node: Architectures,  Next: Opening and Closing,  Prev: Targets,  Up: BFD front end
+
+2.13 Architectures
+==================
+
+BFD keeps one atom in a BFD describing the architecture of the data
+attached to the BFD: a pointer to a `bfd_arch_info_type'.
+
+   Pointers to structures can be requested independently of a BFD so
+that an architecture's information can be interrogated without access
+to an open BFD.
+
+   The architecture information is provided by each architecture
+package.  The set of default architectures is selected by the macro
+`SELECT_ARCHITECTURES'.  This is normally set up in the
+`config/TARGET.mt' file of your choice.  If the name is not defined,
+then all the architectures supported are included.
+
+   When BFD starts up, all the architectures are called with an
+initialize method.  It is up to the architecture back end to insert as
+many items into the list of architectures as it wants to; generally
+this would be one for each machine and one for the default case (an
+item with a machine field of 0).
+
+   BFD's idea of an architecture is implemented in `archures.c'.
+
+2.13.1 bfd_architecture
+-----------------------
+
+*Description*
+This enum gives the object file's CPU architecture, in a global
+sense--i.e., what processor family does it belong to?  Another field
+indicates which processor within the family is in use.  The machine
+gives a number which distinguishes different versions of the
+architecture, containing, for example, 2 and 3 for Intel i960 KA and
+i960 KB, and 68020 and 68030 for Motorola 68020 and 68030.
+     enum bfd_architecture
+     {
+       bfd_arch_unknown,   /* File arch not known.  */
+       bfd_arch_obscure,   /* Arch known, not one of these.  */
+       bfd_arch_m68k,      /* Motorola 68xxx */
+     #define bfd_mach_m68000 1
+     #define bfd_mach_m68008 2
+     #define bfd_mach_m68010 3
+     #define bfd_mach_m68020 4
+     #define bfd_mach_m68030 5
+     #define bfd_mach_m68040 6
+     #define bfd_mach_m68060 7
+     #define bfd_mach_cpu32  8
+     #define bfd_mach_fido   9
+     #define bfd_mach_mcf_isa_a_nodiv 10
+     #define bfd_mach_mcf_isa_a 11
+     #define bfd_mach_mcf_isa_a_mac 12
+     #define bfd_mach_mcf_isa_a_emac 13
+     #define bfd_mach_mcf_isa_aplus 14
+     #define bfd_mach_mcf_isa_aplus_mac 15
+     #define bfd_mach_mcf_isa_aplus_emac 16
+     #define bfd_mach_mcf_isa_b_nousp 17
+     #define bfd_mach_mcf_isa_b_nousp_mac 18
+     #define bfd_mach_mcf_isa_b_nousp_emac 19
+     #define bfd_mach_mcf_isa_b 20
+     #define bfd_mach_mcf_isa_b_mac 21
+     #define bfd_mach_mcf_isa_b_emac 22
+     #define bfd_mach_mcf_isa_b_float 23
+     #define bfd_mach_mcf_isa_b_float_mac 24
+     #define bfd_mach_mcf_isa_b_float_emac 25
+     #define bfd_mach_mcf_isa_c 26
+     #define bfd_mach_mcf_isa_c_mac 27
+     #define bfd_mach_mcf_isa_c_emac 28
+     #define bfd_mach_mcf_isa_c_nodiv 29
+     #define bfd_mach_mcf_isa_c_nodiv_mac 30
+     #define bfd_mach_mcf_isa_c_nodiv_emac 31
+       bfd_arch_vax,       /* DEC Vax */
+       bfd_arch_i960,      /* Intel 960 */
+         /* The order of the following is important.
+            lower number indicates a machine type that
+            only accepts a subset of the instructions
+            available to machines with higher numbers.
+            The exception is the "ca", which is
+            incompatible with all other machines except
+            "core".  */
+
+     #define bfd_mach_i960_core      1
+     #define bfd_mach_i960_ka_sa     2
+     #define bfd_mach_i960_kb_sb     3
+     #define bfd_mach_i960_mc        4
+     #define bfd_mach_i960_xa        5
+     #define bfd_mach_i960_ca        6
+     #define bfd_mach_i960_jx        7
+     #define bfd_mach_i960_hx        8
+
+       bfd_arch_or32,      /* OpenRISC 32 */
+
+       bfd_arch_sparc,     /* SPARC */
+     #define bfd_mach_sparc                 1
+     /* The difference between v8plus and v9 is that v9 is a true 64 bit env.  */
+     #define bfd_mach_sparc_sparclet        2
+     #define bfd_mach_sparc_sparclite       3
+     #define bfd_mach_sparc_v8plus          4
+     #define bfd_mach_sparc_v8plusa         5 /* with ultrasparc add'ns.  */
+     #define bfd_mach_sparc_sparclite_le    6
+     #define bfd_mach_sparc_v9              7
+     #define bfd_mach_sparc_v9a             8 /* with ultrasparc add'ns.  */
+     #define bfd_mach_sparc_v8plusb         9 /* with cheetah add'ns.  */
+     #define bfd_mach_sparc_v9b             10 /* with cheetah add'ns.  */
+     /* Nonzero if MACH has the v9 instruction set.  */
+     #define bfd_mach_sparc_v9_p(mach) \
+       ((mach) >= bfd_mach_sparc_v8plus && (mach) <= bfd_mach_sparc_v9b \
+        && (mach) != bfd_mach_sparc_sparclite_le)
+     /* Nonzero if MACH is a 64 bit sparc architecture.  */
+     #define bfd_mach_sparc_64bit_p(mach) \
+       ((mach) >= bfd_mach_sparc_v9 && (mach) != bfd_mach_sparc_v8plusb)
+       bfd_arch_spu,       /* PowerPC SPU */
+     #define bfd_mach_spu           256
+       bfd_arch_mips,      /* MIPS Rxxxx */
+     #define bfd_mach_mips3000              3000
+     #define bfd_mach_mips3900              3900
+     #define bfd_mach_mips4000              4000
+     #define bfd_mach_mips4010              4010
+     #define bfd_mach_mips4100              4100
+     #define bfd_mach_mips4111              4111
+     #define bfd_mach_mips4120              4120
+     #define bfd_mach_mips4300              4300
+     #define bfd_mach_mips4400              4400
+     #define bfd_mach_mips4600              4600
+     #define bfd_mach_mips4650              4650
+     #define bfd_mach_mips5000              5000
+     #define bfd_mach_mips5400              5400
+     #define bfd_mach_mips5500              5500
+     #define bfd_mach_mips6000              6000
+     #define bfd_mach_mips7000              7000
+     #define bfd_mach_mips8000              8000
+     #define bfd_mach_mips9000              9000
+     #define bfd_mach_mips10000             10000
+     #define bfd_mach_mips12000             12000
+     #define bfd_mach_mips14000             14000
+     #define bfd_mach_mips16000             16000
+     #define bfd_mach_mips16                16
+     #define bfd_mach_mips5                 5
+     #define bfd_mach_mips_loongson_2e      3001
+     #define bfd_mach_mips_loongson_2f      3002
+     #define bfd_mach_mips_sb1              12310201 /* octal 'SB', 01 */
+     #define bfd_mach_mips_octeon           6501
+     #define bfd_mach_mips_xlr              887682   /* decimal 'XLR'  */
+     #define bfd_mach_mipsisa32             32
+     #define bfd_mach_mipsisa32r2           33
+     #define bfd_mach_mipsisa64             64
+     #define bfd_mach_mipsisa64r2           65
+       bfd_arch_i386,      /* Intel 386 */
+     #define bfd_mach_i386_i386 1
+     #define bfd_mach_i386_i8086 2
+     #define bfd_mach_i386_i386_intel_syntax 3
+     #define bfd_mach_x86_64 64
+     #define bfd_mach_x86_64_intel_syntax 65
+       bfd_arch_l1om,   /* Intel L1OM */
+     #define bfd_mach_l1om 66
+     #define bfd_mach_l1om_intel_syntax 67
+       bfd_arch_we32k,     /* AT&T WE32xxx */
+       bfd_arch_tahoe,     /* CCI/Harris Tahoe */
+       bfd_arch_i860,      /* Intel 860 */
+       bfd_arch_i370,      /* IBM 360/370 Mainframes */
+       bfd_arch_romp,      /* IBM ROMP PC/RT */
+       bfd_arch_convex,    /* Convex */
+       bfd_arch_m88k,      /* Motorola 88xxx */
+       bfd_arch_m98k,      /* Motorola 98xxx */
+       bfd_arch_pyramid,   /* Pyramid Technology */
+       bfd_arch_h8300,     /* Renesas H8/300 (formerly Hitachi H8/300) */
+     #define bfd_mach_h8300    1
+     #define bfd_mach_h8300h   2
+     #define bfd_mach_h8300s   3
+     #define bfd_mach_h8300hn  4
+     #define bfd_mach_h8300sn  5
+     #define bfd_mach_h8300sx  6
+     #define bfd_mach_h8300sxn 7
+       bfd_arch_pdp11,     /* DEC PDP-11 */
+       bfd_arch_plugin,
+       bfd_arch_powerpc,   /* PowerPC */
+     #define bfd_mach_ppc           32
+     #define bfd_mach_ppc64         64
+     #define bfd_mach_ppc_403       403
+     #define bfd_mach_ppc_403gc     4030
+     #define bfd_mach_ppc_405       405
+     #define bfd_mach_ppc_505       505
+     #define bfd_mach_ppc_601       601
+     #define bfd_mach_ppc_602       602
+     #define bfd_mach_ppc_603       603
+     #define bfd_mach_ppc_ec603e    6031
+     #define bfd_mach_ppc_604       604
+     #define bfd_mach_ppc_620       620
+     #define bfd_mach_ppc_630       630
+     #define bfd_mach_ppc_750       750
+     #define bfd_mach_ppc_860       860
+     #define bfd_mach_ppc_a35       35
+     #define bfd_mach_ppc_rs64ii    642
+     #define bfd_mach_ppc_rs64iii   643
+     #define bfd_mach_ppc_7400      7400
+     #define bfd_mach_ppc_e500      500
+     #define bfd_mach_ppc_e500mc    5001
+       bfd_arch_rs6000,    /* IBM RS/6000 */
+     #define bfd_mach_rs6k          6000
+     #define bfd_mach_rs6k_rs1      6001
+     #define bfd_mach_rs6k_rsc      6003
+     #define bfd_mach_rs6k_rs2      6002
+       bfd_arch_hppa,      /* HP PA RISC */
+     #define bfd_mach_hppa10        10
+     #define bfd_mach_hppa11        11
+     #define bfd_mach_hppa20        20
+     #define bfd_mach_hppa20w       25
+       bfd_arch_d10v,      /* Mitsubishi D10V */
+     #define bfd_mach_d10v          1
+     #define bfd_mach_d10v_ts2      2
+     #define bfd_mach_d10v_ts3      3
+       bfd_arch_d30v,      /* Mitsubishi D30V */
+       bfd_arch_dlx,       /* DLX */
+       bfd_arch_m68hc11,   /* Motorola 68HC11 */
+       bfd_arch_m68hc12,   /* Motorola 68HC12 */
+     #define bfd_mach_m6812_default 0
+     #define bfd_mach_m6812         1
+     #define bfd_mach_m6812s        2
+       bfd_arch_z8k,       /* Zilog Z8000 */
+     #define bfd_mach_z8001         1
+     #define bfd_mach_z8002         2
+       bfd_arch_h8500,     /* Renesas H8/500 (formerly Hitachi H8/500) */
+       bfd_arch_sh,        /* Renesas / SuperH SH (formerly Hitachi SH) */
+     #define bfd_mach_sh            1
+     #define bfd_mach_sh2        0x20
+     #define bfd_mach_sh_dsp     0x2d
+     #define bfd_mach_sh2a       0x2a
+     #define bfd_mach_sh2a_nofpu 0x2b
+     #define bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu 0x2a1
+     #define bfd_mach_sh2a_nofpu_or_sh3_nommu 0x2a2
+     #define bfd_mach_sh2a_or_sh4  0x2a3
+     #define bfd_mach_sh2a_or_sh3e 0x2a4
+     #define bfd_mach_sh2e       0x2e
+     #define bfd_mach_sh3        0x30
+     #define bfd_mach_sh3_nommu  0x31
+     #define bfd_mach_sh3_dsp    0x3d
+     #define bfd_mach_sh3e       0x3e
+     #define bfd_mach_sh4        0x40
+     #define bfd_mach_sh4_nofpu  0x41
+     #define bfd_mach_sh4_nommu_nofpu  0x42
+     #define bfd_mach_sh4a       0x4a
+     #define bfd_mach_sh4a_nofpu 0x4b
+     #define bfd_mach_sh4al_dsp  0x4d
+     #define bfd_mach_sh5        0x50
+       bfd_arch_alpha,     /* Dec Alpha */
+     #define bfd_mach_alpha_ev4  0x10
+     #define bfd_mach_alpha_ev5  0x20
+     #define bfd_mach_alpha_ev6  0x30
+       bfd_arch_arm,       /* Advanced Risc Machines ARM.  */
+     #define bfd_mach_arm_unknown   0
+     #define bfd_mach_arm_2         1
+     #define bfd_mach_arm_2a        2
+     #define bfd_mach_arm_3         3
+     #define bfd_mach_arm_3M        4
+     #define bfd_mach_arm_4         5
+     #define bfd_mach_arm_4T        6
+     #define bfd_mach_arm_5         7
+     #define bfd_mach_arm_5T        8
+     #define bfd_mach_arm_5TE       9
+     #define bfd_mach_arm_XScale    10
+     #define bfd_mach_arm_ep9312    11
+     #define bfd_mach_arm_iWMMXt    12
+     #define bfd_mach_arm_iWMMXt2   13
+       bfd_arch_ns32k,     /* National Semiconductors ns32000 */
+       bfd_arch_w65,       /* WDC 65816 */
+       bfd_arch_tic30,     /* Texas Instruments TMS320C30 */
+       bfd_arch_tic4x,     /* Texas Instruments TMS320C3X/4X */
+     #define bfd_mach_tic3x         30
+     #define bfd_mach_tic4x         40
+       bfd_arch_tic54x,    /* Texas Instruments TMS320C54X */
+       bfd_arch_tic80,     /* TI TMS320c80 (MVP) */
+       bfd_arch_v850,      /* NEC V850 */
+     #define bfd_mach_v850          1
+     #define bfd_mach_v850e         'E'
+     #define bfd_mach_v850e1        '1'
+       bfd_arch_arc,       /* ARC Cores */
+     #define bfd_mach_arc_5         5
+     #define bfd_mach_arc_6         6
+     #define bfd_mach_arc_7         7
+     #define bfd_mach_arc_8         8
+      bfd_arch_m32c,     /* Renesas M16C/M32C.  */
+     #define bfd_mach_m16c        0x75
+     #define bfd_mach_m32c        0x78
+       bfd_arch_m32r,      /* Renesas M32R (formerly Mitsubishi M32R/D) */
+     #define bfd_mach_m32r          1 /* For backwards compatibility.  */
+     #define bfd_mach_m32rx         'x'
+     #define bfd_mach_m32r2         '2'
+       bfd_arch_mn10200,   /* Matsushita MN10200 */
+       bfd_arch_mn10300,   /* Matsushita MN10300 */
+     #define bfd_mach_mn10300               300
+     #define bfd_mach_am33          330
+     #define bfd_mach_am33_2        332
+       bfd_arch_fr30,
+     #define bfd_mach_fr30          0x46523330
+       bfd_arch_frv,
+     #define bfd_mach_frv           1
+     #define bfd_mach_frvsimple     2
+     #define bfd_mach_fr300         300
+     #define bfd_mach_fr400         400
+     #define bfd_mach_fr450         450
+     #define bfd_mach_frvtomcat     499     /* fr500 prototype */
+     #define bfd_mach_fr500         500
+     #define bfd_mach_fr550         550
+       bfd_arch_moxie,       /* The moxie processor */
+     #define bfd_mach_moxie         1
+       bfd_arch_mcore,
+       bfd_arch_mep,
+     #define bfd_mach_mep           1
+     #define bfd_mach_mep_h1        0x6831
+     #define bfd_mach_mep_c5        0x6335
+       bfd_arch_ia64,      /* HP/Intel ia64 */
+     #define bfd_mach_ia64_elf64    64
+     #define bfd_mach_ia64_elf32    32
+       bfd_arch_ip2k,      /* Ubicom IP2K microcontrollers. */
+     #define bfd_mach_ip2022        1
+     #define bfd_mach_ip2022ext     2
+      bfd_arch_iq2000,     /* Vitesse IQ2000.  */
+     #define bfd_mach_iq2000        1
+     #define bfd_mach_iq10          2
+       bfd_arch_mt,
+     #define bfd_mach_ms1           1
+     #define bfd_mach_mrisc2        2
+     #define bfd_mach_ms2           3
+       bfd_arch_pj,
+       bfd_arch_avr,       /* Atmel AVR microcontrollers.  */
+     #define bfd_mach_avr1          1
+     #define bfd_mach_avr2          2
+     #define bfd_mach_avr25         25
+     #define bfd_mach_avr3          3
+     #define bfd_mach_avr31         31
+     #define bfd_mach_avr35         35
+     #define bfd_mach_avr4          4
+     #define bfd_mach_avr5          5
+     #define bfd_mach_avr51         51
+     #define bfd_mach_avr6          6
+       bfd_arch_bfin,        /* ADI Blackfin */
+     #define bfd_mach_bfin          1
+       bfd_arch_cr16,       /* National Semiconductor CompactRISC (ie CR16). */
+     #define bfd_mach_cr16          1
+       bfd_arch_cr16c,       /* National Semiconductor CompactRISC. */
+     #define bfd_mach_cr16c         1
+       bfd_arch_crx,       /*  National Semiconductor CRX.  */
+     #define bfd_mach_crx           1
+       bfd_arch_cris,      /* Axis CRIS */
+     #define bfd_mach_cris_v0_v10   255
+     #define bfd_mach_cris_v32      32
+     #define bfd_mach_cris_v10_v32  1032
+       bfd_arch_s390,      /* IBM s390 */
+     #define bfd_mach_s390_31       31
+     #define bfd_mach_s390_64       64
+       bfd_arch_score,     /* Sunplus score */
+     #define bfd_mach_score3         3
+     #define bfd_mach_score7         7
+       bfd_arch_openrisc,  /* OpenRISC */
+       bfd_arch_mmix,      /* Donald Knuth's educational processor.  */
+       bfd_arch_xstormy16,
+     #define bfd_mach_xstormy16     1
+       bfd_arch_msp430,    /* Texas Instruments MSP430 architecture.  */
+     #define bfd_mach_msp11          11
+     #define bfd_mach_msp110         110
+     #define bfd_mach_msp12          12
+     #define bfd_mach_msp13          13
+     #define bfd_mach_msp14          14
+     #define bfd_mach_msp15          15
+     #define bfd_mach_msp16          16
+     #define bfd_mach_msp21          21
+     #define bfd_mach_msp31          31
+     #define bfd_mach_msp32          32
+     #define bfd_mach_msp33          33
+     #define bfd_mach_msp41          41
+     #define bfd_mach_msp42          42
+     #define bfd_mach_msp43          43
+     #define bfd_mach_msp44          44
+       bfd_arch_xc16x,     /* Infineon's XC16X Series.               */
+     #define bfd_mach_xc16x         1
+     #define bfd_mach_xc16xl        2
+     #define bfd_mach_xc16xs         3
+       bfd_arch_xtensa,    /* Tensilica's Xtensa cores.  */
+     #define bfd_mach_xtensa        1
+        bfd_arch_maxq,     /* Dallas MAXQ 10/20 */
+     #define bfd_mach_maxq10    10
+     #define bfd_mach_maxq20    20
+       bfd_arch_z80,
+     #define bfd_mach_z80strict      1 /* No undocumented opcodes.  */
+     #define bfd_mach_z80            3 /* With ixl, ixh, iyl, and iyh.  */
+     #define bfd_mach_z80full        7 /* All undocumented instructions.  */
+     #define bfd_mach_r800           11 /* R800: successor with multiplication.  */
+       bfd_arch_lm32,      /* Lattice Mico32 */
+     #define bfd_mach_lm32      1
+       bfd_arch_microblaze,/* Xilinx MicroBlaze. */
+       bfd_arch_last
+       };
+
+2.13.2 bfd_arch_info
+--------------------
+
+*Description*
+This structure contains information on architectures for use within BFD.
+
+     typedef struct bfd_arch_info
+     {
+       int bits_per_word;
+       int bits_per_address;
+       int bits_per_byte;
+       enum bfd_architecture arch;
+       unsigned long mach;
+       const char *arch_name;
+       const char *printable_name;
+       unsigned int section_align_power;
+       /* TRUE if this is the default machine for the architecture.
+          The default arch should be the first entry for an arch so that
+          all the entries for that arch can be accessed via `next'.  */
+       bfd_boolean the_default;
+       const struct bfd_arch_info * (*compatible)
+         (const struct bfd_arch_info *a, const struct bfd_arch_info *b);
+
+       bfd_boolean (*scan) (const struct bfd_arch_info *, const char *);
+
+       const struct bfd_arch_info *next;
+     }
+     bfd_arch_info_type;
+
+2.13.2.1 `bfd_printable_name'
+.............................
+
+*Synopsis*
+     const char *bfd_printable_name (bfd *abfd);
+   *Description*
+Return a printable string representing the architecture and machine
+from the pointer to the architecture info structure.
+
+2.13.2.2 `bfd_scan_arch'
+........................
+
+*Synopsis*
+     const bfd_arch_info_type *bfd_scan_arch (const char *string);
+   *Description*
+Figure out if BFD supports any cpu which could be described with the
+name STRING.  Return a pointer to an `arch_info' structure if a machine
+is found, otherwise NULL.
+
+2.13.2.3 `bfd_arch_list'
+........................
+
+*Synopsis*
+     const char **bfd_arch_list (void);
+   *Description*
+Return a freshly malloced NULL-terminated vector of the names of all
+the valid BFD architectures.  Do not modify the names.
+
+2.13.2.4 `bfd_arch_get_compatible'
+..................................
+
+*Synopsis*
+     const bfd_arch_info_type *bfd_arch_get_compatible
+        (const bfd *abfd, const bfd *bbfd, bfd_boolean accept_unknowns);
+   *Description*
+Determine whether two BFDs' architectures and machine types are
+compatible.  Calculates the lowest common denominator between the two
+architectures and machine types implied by the BFDs and returns a
+pointer to an `arch_info' structure describing the compatible machine.
+
+2.13.2.5 `bfd_default_arch_struct'
+..................................
+
+*Description*
+The `bfd_default_arch_struct' is an item of `bfd_arch_info_type' which
+has been initialized to a fairly generic state.  A BFD starts life by
+pointing to this structure, until the correct back end has determined
+the real architecture of the file.
+     extern const bfd_arch_info_type bfd_default_arch_struct;
+
+2.13.2.6 `bfd_set_arch_info'
+............................
+
+*Synopsis*
+     void bfd_set_arch_info (bfd *abfd, const bfd_arch_info_type *arg);
+   *Description*
+Set the architecture info of ABFD to ARG.
+
+2.13.2.7 `bfd_default_set_arch_mach'
+....................................
+
+*Synopsis*
+     bfd_boolean bfd_default_set_arch_mach
+        (bfd *abfd, enum bfd_architecture arch, unsigned long mach);
+   *Description*
+Set the architecture and machine type in BFD ABFD to ARCH and MACH.
+Find the correct pointer to a structure and insert it into the
+`arch_info' pointer.
+
+2.13.2.8 `bfd_get_arch'
+.......................
+
+*Synopsis*
+     enum bfd_architecture bfd_get_arch (bfd *abfd);
+   *Description*
+Return the enumerated type which describes the BFD ABFD's architecture.
+
+2.13.2.9 `bfd_get_mach'
+.......................
+
+*Synopsis*
+     unsigned long bfd_get_mach (bfd *abfd);
+   *Description*
+Return the long type which describes the BFD ABFD's machine.
+
+2.13.2.10 `bfd_arch_bits_per_byte'
+..................................
+
+*Synopsis*
+     unsigned int bfd_arch_bits_per_byte (bfd *abfd);
+   *Description*
+Return the number of bits in one of the BFD ABFD's architecture's bytes.
+
+2.13.2.11 `bfd_arch_bits_per_address'
+.....................................
+
+*Synopsis*
+     unsigned int bfd_arch_bits_per_address (bfd *abfd);
+   *Description*
+Return the number of bits in one of the BFD ABFD's architecture's
+addresses.
+
+2.13.2.12 `bfd_default_compatible'
+..................................
+
+*Synopsis*
+     const bfd_arch_info_type *bfd_default_compatible
+        (const bfd_arch_info_type *a, const bfd_arch_info_type *b);
+   *Description*
+The default function for testing for compatibility.
+
+2.13.2.13 `bfd_default_scan'
+............................
+
+*Synopsis*
+     bfd_boolean bfd_default_scan
+        (const struct bfd_arch_info *info, const char *string);
+   *Description*
+The default function for working out whether this is an architecture
+hit and a machine hit.
+
+2.13.2.14 `bfd_get_arch_info'
+.............................
+
+*Synopsis*
+     const bfd_arch_info_type *bfd_get_arch_info (bfd *abfd);
+   *Description*
+Return the architecture info struct in ABFD.
+
+2.13.2.15 `bfd_lookup_arch'
+...........................
+
+*Synopsis*
+     const bfd_arch_info_type *bfd_lookup_arch
+        (enum bfd_architecture arch, unsigned long machine);
+   *Description*
+Look for the architecture info structure which matches the arguments
+ARCH and MACHINE. A machine of 0 matches the machine/architecture
+structure which marks itself as the default.
+
+2.13.2.16 `bfd_printable_arch_mach'
+...................................
+
+*Synopsis*
+     const char *bfd_printable_arch_mach
+        (enum bfd_architecture arch, unsigned long machine);
+   *Description*
+Return a printable string representing the architecture and machine
+type.
+
+   This routine is depreciated.
+
+2.13.2.17 `bfd_octets_per_byte'
+...............................
+
+*Synopsis*
+     unsigned int bfd_octets_per_byte (bfd *abfd);
+   *Description*
+Return the number of octets (8-bit quantities) per target byte (minimum
+addressable unit).  In most cases, this will be one, but some DSP
+targets have 16, 32, or even 48 bits per byte.
+
+2.13.2.18 `bfd_arch_mach_octets_per_byte'
+.........................................
+
+*Synopsis*
+     unsigned int bfd_arch_mach_octets_per_byte
+        (enum bfd_architecture arch, unsigned long machine);
+   *Description*
+See bfd_octets_per_byte.
+
+   This routine is provided for those cases where a bfd * is not
+available
+
+
+File: bfd.info,  Node: Opening and Closing,  Next: Internal,  Prev: Architectures,  Up: BFD front end
+
+2.14 Opening and closing BFDs
+=============================
+
+2.14.1 Functions for opening and closing
+----------------------------------------
+
+2.14.1.1 `bfd_fopen'
+....................
+
+*Synopsis*
+     bfd *bfd_fopen (const char *filename, const char *target,
+         const char *mode, int fd);
+   *Description*
+Open the file FILENAME with the target TARGET.  Return a pointer to the
+created BFD.  If FD is not -1, then `fdopen' is used to open the file;
+otherwise, `fopen' is used.  MODE is passed directly to `fopen' or
+`fdopen'.
+
+   Calls `bfd_find_target', so TARGET is interpreted as by that
+function.
+
+   The new BFD is marked as cacheable iff FD is -1.
+
+   If `NULL' is returned then an error has occured.   Possible errors
+are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call'
+error.
+
+2.14.1.2 `bfd_openr'
+....................
+
+*Synopsis*
+     bfd *bfd_openr (const char *filename, const char *target);
+   *Description*
+Open the file FILENAME (using `fopen') with the target TARGET.  Return
+a pointer to the created BFD.
+
+   Calls `bfd_find_target', so TARGET is interpreted as by that
+function.
+
+   If `NULL' is returned then an error has occured.   Possible errors
+are `bfd_error_no_memory', `bfd_error_invalid_target' or `system_call'
+error.
+
+2.14.1.3 `bfd_fdopenr'
+......................
+
+*Synopsis*
+     bfd *bfd_fdopenr (const char *filename, const char *target, int fd);
+   *Description*
+`bfd_fdopenr' is to `bfd_fopenr' much like `fdopen' is to `fopen'.  It
+opens a BFD on a file already described by the FD supplied.
+
+   When the file is later `bfd_close'd, the file descriptor will be
+closed.  If the caller desires that this file descriptor be cached by
+BFD (opened as needed, closed as needed to free descriptors for other
+opens), with the supplied FD used as an initial file descriptor (but
+subject to closure at any time), call bfd_set_cacheable(bfd, 1) on the
+returned BFD.  The default is to assume no caching; the file descriptor
+will remain open until `bfd_close', and will not be affected by BFD
+operations on other files.
+
+   Possible errors are `bfd_error_no_memory',
+`bfd_error_invalid_target' and `bfd_error_system_call'.
+
+2.14.1.4 `bfd_openstreamr'
+..........................
+
+*Synopsis*
+     bfd *bfd_openstreamr (const char *, const char *, void *);
+   *Description*
+Open a BFD for read access on an existing stdio stream.  When the BFD
+is passed to `bfd_close', the stream will be closed.
+
+2.14.1.5 `bfd_openr_iovec'
+..........................
+
+*Synopsis*
+     bfd *bfd_openr_iovec (const char *filename, const char *target,
+         void *(*open) (struct bfd *nbfd,
+         void *open_closure),
+         void *open_closure,
+         file_ptr (*pread) (struct bfd *nbfd,
+         void *stream,
+         void *buf,
+         file_ptr nbytes,
+         file_ptr offset),
+         int (*close) (struct bfd *nbfd,
+         void *stream),
+         int (*stat) (struct bfd *abfd,
+         void *stream,
+         struct stat *sb));
+   *Description*
+Create and return a BFD backed by a read-only STREAM.  The STREAM is
+created using OPEN, accessed using PREAD and destroyed using CLOSE.
+
+   Calls `bfd_find_target', so TARGET is interpreted as by that
+function.
+
+   Calls OPEN (which can call `bfd_zalloc' and `bfd_get_filename') to
+obtain the read-only stream backing the BFD.  OPEN either succeeds
+returning the non-`NULL' STREAM, or fails returning `NULL' (setting
+`bfd_error').
+
+   Calls PREAD to request NBYTES of data from STREAM starting at OFFSET
+(e.g., via a call to `bfd_read').  PREAD either succeeds returning the
+number of bytes read (which can be less than NBYTES when end-of-file),
+or fails returning -1 (setting `bfd_error').
+
+   Calls CLOSE when the BFD is later closed using `bfd_close'.  CLOSE
+either succeeds returning 0, or fails returning -1 (setting
+`bfd_error').
+
+   Calls STAT to fill in a stat structure for bfd_stat, bfd_get_size,
+and bfd_get_mtime calls.  STAT returns 0 on success, or returns -1 on
+failure (setting `bfd_error').
+
+   If `bfd_openr_iovec' returns `NULL' then an error has occurred.
+Possible errors are `bfd_error_no_memory', `bfd_error_invalid_target'
+and `bfd_error_system_call'.
+
+2.14.1.6 `bfd_openw'
+....................
+
+*Synopsis*
+     bfd *bfd_openw (const char *filename, const char *target);
+   *Description*
+Create a BFD, associated with file FILENAME, using the file format
+TARGET, and return a pointer to it.
+
+   Possible errors are `bfd_error_system_call', `bfd_error_no_memory',
+`bfd_error_invalid_target'.
+
+2.14.1.7 `bfd_close'
+....................
+
+*Synopsis*
+     bfd_boolean bfd_close (bfd *abfd);
+   *Description*
+Close a BFD. If the BFD was open for writing, then pending operations
+are completed and the file written out and closed.  If the created file
+is executable, then `chmod' is called to mark it as such.
+
+   All memory attached to the BFD is released.
+
+   The file descriptor associated with the BFD is closed (even if it
+was passed in to BFD by `bfd_fdopenr').
+
+   *Returns*
+`TRUE' is returned if all is ok, otherwise `FALSE'.
+
+2.14.1.8 `bfd_close_all_done'
+.............................
+
+*Synopsis*
+     bfd_boolean bfd_close_all_done (bfd *);
+   *Description*
+Close a BFD.  Differs from `bfd_close' since it does not complete any
+pending operations.  This routine would be used if the application had
+just used BFD for swapping and didn't want to use any of the writing
+code.
+
+   If the created file is executable, then `chmod' is called to mark it
+as such.
+
+   All memory attached to the BFD is released.
+
+   *Returns*
+`TRUE' is returned if all is ok, otherwise `FALSE'.
+
+2.14.1.9 `bfd_create'
+.....................
+
+*Synopsis*
+     bfd *bfd_create (const char *filename, bfd *templ);
+   *Description*
+Create a new BFD in the manner of `bfd_openw', but without opening a
+file. The new BFD takes the target from the target used by TEMPLATE.
+The format is always set to `bfd_object'.
+
+2.14.1.10 `bfd_make_writable'
+.............................
+
+*Synopsis*
+     bfd_boolean bfd_make_writable (bfd *abfd);
+   *Description*
+Takes a BFD as created by `bfd_create' and converts it into one like as
+returned by `bfd_openw'.  It does this by converting the BFD to
+BFD_IN_MEMORY.  It's assumed that you will call `bfd_make_readable' on
+this bfd later.
+
+   *Returns*
+`TRUE' is returned if all is ok, otherwise `FALSE'.
+
+2.14.1.11 `bfd_make_readable'
+.............................
+
+*Synopsis*
+     bfd_boolean bfd_make_readable (bfd *abfd);
+   *Description*
+Takes a BFD as created by `bfd_create' and `bfd_make_writable' and
+converts it into one like as returned by `bfd_openr'.  It does this by
+writing the contents out to the memory buffer, then reversing the
+direction.
+
+   *Returns*
+`TRUE' is returned if all is ok, otherwise `FALSE'.
+
+2.14.1.12 `bfd_alloc'
+.....................
+
+*Synopsis*
+     void *bfd_alloc (bfd *abfd, bfd_size_type wanted);
+   *Description*
+Allocate a block of WANTED bytes of memory attached to `abfd' and
+return a pointer to it.
+
+2.14.1.13 `bfd_alloc2'
+......................
+
+*Synopsis*
+     void *bfd_alloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
+   *Description*
+Allocate a block of NMEMB elements of SIZE bytes each of memory
+attached to `abfd' and return a pointer to it.
+
+2.14.1.14 `bfd_zalloc'
+......................
+
+*Synopsis*
+     void *bfd_zalloc (bfd *abfd, bfd_size_type wanted);
+   *Description*
+Allocate a block of WANTED bytes of zeroed memory attached to `abfd'
+and return a pointer to it.
+
+2.14.1.15 `bfd_zalloc2'
+.......................
+
+*Synopsis*
+     void *bfd_zalloc2 (bfd *abfd, bfd_size_type nmemb, bfd_size_type size);
+   *Description*
+Allocate a block of NMEMB elements of SIZE bytes each of zeroed memory
+attached to `abfd' and return a pointer to it.
+
+2.14.1.16 `bfd_calc_gnu_debuglink_crc32'
+........................................
+
+*Synopsis*
+     unsigned long bfd_calc_gnu_debuglink_crc32
+        (unsigned long crc, const unsigned char *buf, bfd_size_type len);
+   *Description*
+Computes a CRC value as used in the .gnu_debuglink section.  Advances
+the previously computed CRC value by computing and adding in the crc32
+for LEN bytes of BUF.
+
+   *Returns*
+Return the updated CRC32 value.
+
+2.14.1.17 `get_debug_link_info'
+...............................
+
+*Synopsis*
+     char *get_debug_link_info (bfd *abfd, unsigned long *crc32_out);
+   *Description*
+fetch the filename and CRC32 value for any separate debuginfo
+associated with ABFD. Return NULL if no such info found, otherwise
+return filename and update CRC32_OUT.
+
+2.14.1.18 `separate_debug_file_exists'
+......................................
+
+*Synopsis*
+     bfd_boolean separate_debug_file_exists
+        (char *name, unsigned long crc32);
+   *Description*
+Checks to see if NAME is a file and if its contents match CRC32.
+
+2.14.1.19 `find_separate_debug_file'
+....................................
+
+*Synopsis*
+     char *find_separate_debug_file (bfd *abfd);
+   *Description*
+Searches ABFD for a reference to separate debugging information, scans
+various locations in the filesystem, including the file tree rooted at
+DEBUG_FILE_DIRECTORY, and returns a filename of such debugging
+information if the file is found and has matching CRC32.  Returns NULL
+if no reference to debugging file exists, or file cannot be found.
+
+2.14.1.20 `bfd_follow_gnu_debuglink'
+....................................
+
+*Synopsis*
+     char *bfd_follow_gnu_debuglink (bfd *abfd, const char *dir);
+   *Description*
+Takes a BFD and searches it for a .gnu_debuglink section.  If this
+section is found, it examines the section for the name and checksum of
+a '.debug' file containing auxiliary debugging information.  It then
+searches the filesystem for this .debug file in some standard
+locations, including the directory tree rooted at DIR, and if found
+returns the full filename.
+
+   If DIR is NULL, it will search a default path configured into libbfd
+at build time.  [XXX this feature is not currently implemented].
+
+   *Returns*
+`NULL' on any errors or failure to locate the .debug file, otherwise a
+pointer to a heap-allocated string containing the filename.  The caller
+is responsible for freeing this string.
+
+2.14.1.21 `bfd_create_gnu_debuglink_section'
+............................................
+
+*Synopsis*
+     struct bfd_section *bfd_create_gnu_debuglink_section
+        (bfd *abfd, const char *filename);
+   *Description*
+Takes a BFD and adds a .gnu_debuglink section to it.  The section is
+sized to be big enough to contain a link to the specified FILENAME.
+
+   *Returns*
+A pointer to the new section is returned if all is ok.  Otherwise
+`NULL' is returned and bfd_error is set.
+
+2.14.1.22 `bfd_fill_in_gnu_debuglink_section'
+.............................................
+
+*Synopsis*
+     bfd_boolean bfd_fill_in_gnu_debuglink_section
+        (bfd *abfd, struct bfd_section *sect, const char *filename);
+   *Description*
+Takes a BFD and containing a .gnu_debuglink section SECT and fills in
+the contents of the section to contain a link to the specified
+FILENAME.  The filename should be relative to the current directory.
+
+   *Returns*
+`TRUE' is returned if all is ok.  Otherwise `FALSE' is returned and
+bfd_error is set.
+
+
+File: bfd.info,  Node: Internal,  Next: File Caching,  Prev: Opening and Closing,  Up: BFD front end
+
+2.15 Implementation details
+===========================
+
+2.15.1 Internal functions
+-------------------------
+
+*Description*
+These routines are used within BFD.  They are not intended for export,
+but are documented here for completeness.
+
+2.15.1.1 `bfd_write_bigendian_4byte_int'
+........................................
+
+*Synopsis*
+     bfd_boolean bfd_write_bigendian_4byte_int (bfd *, unsigned int);
+   *Description*
+Write a 4 byte integer I to the output BFD ABFD, in big endian order
+regardless of what else is going on.  This is useful in archives.
+
+2.15.1.2 `bfd_put_size'
+.......................
+
+2.15.1.3 `bfd_get_size'
+.......................
+
+*Description*
+These macros as used for reading and writing raw data in sections; each
+access (except for bytes) is vectored through the target format of the
+BFD and mangled accordingly. The mangling performs any necessary endian
+translations and removes alignment restrictions.  Note that types
+accepted and returned by these macros are identical so they can be
+swapped around in macros--for example, `libaout.h' defines `GET_WORD'
+to either `bfd_get_32' or `bfd_get_64'.
+
+   In the put routines, VAL must be a `bfd_vma'.  If we are on a system
+without prototypes, the caller is responsible for making sure that is
+true, with a cast if necessary.  We don't cast them in the macro
+definitions because that would prevent `lint' or `gcc -Wall' from
+detecting sins such as passing a pointer.  To detect calling these with
+less than a `bfd_vma', use `gcc -Wconversion' on a host with 64 bit
+`bfd_vma''s.
+
+     /* Byte swapping macros for user section data.  */
+
+     #define bfd_put_8(abfd, val, ptr) \
+       ((void) (*((unsigned char *) (ptr)) = (val) & 0xff))
+     #define bfd_put_signed_8 \
+       bfd_put_8
+     #define bfd_get_8(abfd, ptr) \
+       (*(unsigned char *) (ptr) & 0xff)
+     #define bfd_get_signed_8(abfd, ptr) \
+       (((*(unsigned char *) (ptr) & 0xff) ^ 0x80) - 0x80)
+
+     #define bfd_put_16(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_putx16, ((val),(ptr)))
+     #define bfd_put_signed_16 \
+       bfd_put_16
+     #define bfd_get_16(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx16, (ptr))
+     #define bfd_get_signed_16(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx_signed_16, (ptr))
+
+     #define bfd_put_32(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_putx32, ((val),(ptr)))
+     #define bfd_put_signed_32 \
+       bfd_put_32
+     #define bfd_get_32(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx32, (ptr))
+     #define bfd_get_signed_32(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx_signed_32, (ptr))
+
+     #define bfd_put_64(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_putx64, ((val), (ptr)))
+     #define bfd_put_signed_64 \
+       bfd_put_64
+     #define bfd_get_64(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx64, (ptr))
+     #define bfd_get_signed_64(abfd, ptr) \
+       BFD_SEND (abfd, bfd_getx_signed_64, (ptr))
+
+     #define bfd_get(bits, abfd, ptr)                       \
+       ((bits) == 8 ? (bfd_vma) bfd_get_8 (abfd, ptr)       \
+        : (bits) == 16 ? bfd_get_16 (abfd, ptr)             \
+        : (bits) == 32 ? bfd_get_32 (abfd, ptr)             \
+        : (bits) == 64 ? bfd_get_64 (abfd, ptr)             \
+        : (abort (), (bfd_vma) - 1))
+
+     #define bfd_put(bits, abfd, val, ptr)                  \
+       ((bits) == 8 ? bfd_put_8  (abfd, val, ptr)           \
+        : (bits) == 16 ? bfd_put_16 (abfd, val, ptr)                \
+        : (bits) == 32 ? bfd_put_32 (abfd, val, ptr)                \
+        : (bits) == 64 ? bfd_put_64 (abfd, val, ptr)                \
+        : (abort (), (void) 0))
+
+2.15.1.4 `bfd_h_put_size'
+.........................
+
+*Description*
+These macros have the same function as their `bfd_get_x' brethren,
+except that they are used for removing information for the header
+records of object files. Believe it or not, some object files keep
+their header records in big endian order and their data in little
+endian order.
+
+     /* Byte swapping macros for file header data.  */
+
+     #define bfd_h_put_8(abfd, val, ptr) \
+       bfd_put_8 (abfd, val, ptr)
+     #define bfd_h_put_signed_8(abfd, val, ptr) \
+       bfd_put_8 (abfd, val, ptr)
+     #define bfd_h_get_8(abfd, ptr) \
+       bfd_get_8 (abfd, ptr)
+     #define bfd_h_get_signed_8(abfd, ptr) \
+       bfd_get_signed_8 (abfd, ptr)
+
+     #define bfd_h_put_16(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_h_putx16, (val, ptr))
+     #define bfd_h_put_signed_16 \
+       bfd_h_put_16
+     #define bfd_h_get_16(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx16, (ptr))
+     #define bfd_h_get_signed_16(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx_signed_16, (ptr))
+
+     #define bfd_h_put_32(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_h_putx32, (val, ptr))
+     #define bfd_h_put_signed_32 \
+       bfd_h_put_32
+     #define bfd_h_get_32(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx32, (ptr))
+     #define bfd_h_get_signed_32(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx_signed_32, (ptr))
+
+     #define bfd_h_put_64(abfd, val, ptr) \
+       BFD_SEND (abfd, bfd_h_putx64, (val, ptr))
+     #define bfd_h_put_signed_64 \
+       bfd_h_put_64
+     #define bfd_h_get_64(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx64, (ptr))
+     #define bfd_h_get_signed_64(abfd, ptr) \
+       BFD_SEND (abfd, bfd_h_getx_signed_64, (ptr))
+
+     /* Aliases for the above, which should eventually go away.  */
+
+     #define H_PUT_64  bfd_h_put_64
+     #define H_PUT_32  bfd_h_put_32
+     #define H_PUT_16  bfd_h_put_16
+     #define H_PUT_8   bfd_h_put_8
+     #define H_PUT_S64 bfd_h_put_signed_64
+     #define H_PUT_S32 bfd_h_put_signed_32
+     #define H_PUT_S16 bfd_h_put_signed_16
+     #define H_PUT_S8  bfd_h_put_signed_8
+     #define H_GET_64  bfd_h_get_64
+     #define H_GET_32  bfd_h_get_32
+     #define H_GET_16  bfd_h_get_16
+     #define H_GET_8   bfd_h_get_8
+     #define H_GET_S64 bfd_h_get_signed_64
+     #define H_GET_S32 bfd_h_get_signed_32
+     #define H_GET_S16 bfd_h_get_signed_16
+     #define H_GET_S8  bfd_h_get_signed_8
+
+2.15.1.5 `bfd_log2'
+...................
+
+*Synopsis*
+     unsigned int bfd_log2 (bfd_vma x);
+   *Description*
+Return the log base 2 of the value supplied, rounded up.  E.g., an X of
+1025 returns 11.  A X of 0 returns 0.
+
+
+File: bfd.info,  Node: File Caching,  Next: Linker Functions,  Prev: Internal,  Up: BFD front end
+
+2.16 File caching
+=================
+
+The file caching mechanism is embedded within BFD and allows the
+application to open as many BFDs as it wants without regard to the
+underlying operating system's file descriptor limit (often as low as 20
+open files).  The module in `cache.c' maintains a least recently used
+list of `BFD_CACHE_MAX_OPEN' files, and exports the name
+`bfd_cache_lookup', which runs around and makes sure that the required
+BFD is open. If not, then it chooses a file to close, closes it and
+opens the one wanted, returning its file handle.
+
+2.16.1 Caching functions
+------------------------
+
+2.16.1.1 `bfd_cache_init'
+.........................
+
+*Synopsis*
+     bfd_boolean bfd_cache_init (bfd *abfd);
+   *Description*
+Add a newly opened BFD to the cache.
+
+2.16.1.2 `bfd_cache_close'
+..........................
+
+*Synopsis*
+     bfd_boolean bfd_cache_close (bfd *abfd);
+   *Description*
+Remove the BFD ABFD from the cache. If the attached file is open, then
+close it too.
+
+   *Returns*
+`FALSE' is returned if closing the file fails, `TRUE' is returned if
+all is well.
+
+2.16.1.3 `bfd_cache_close_all'
+..............................
+
+*Synopsis*
+     bfd_boolean bfd_cache_close_all (void);
+   *Description*
+Remove all BFDs from the cache. If the attached file is open, then
+close it too.
+
+   *Returns*
+`FALSE' is returned if closing one of the file fails, `TRUE' is
+returned if all is well.
+
+2.16.1.4 `bfd_open_file'
+........................
+
+*Synopsis*
+     FILE* bfd_open_file (bfd *abfd);
+   *Description*
+Call the OS to open a file for ABFD.  Return the `FILE *' (possibly
+`NULL') that results from this operation.  Set up the BFD so that
+future accesses know the file is open. If the `FILE *' returned is
+`NULL', then it won't have been put in the cache, so it won't have to
+be removed from it.
+
+
+File: bfd.info,  Node: Linker Functions,  Next: Hash Tables,  Prev: File Caching,  Up: BFD front end
+
+2.17 Linker Functions
+=====================
+
+The linker uses three special entry points in the BFD target vector.
+It is not necessary to write special routines for these entry points
+when creating a new BFD back end, since generic versions are provided.
+However, writing them can speed up linking and make it use
+significantly less runtime memory.
+
+   The first routine creates a hash table used by the other routines.
+The second routine adds the symbols from an object file to the hash
+table.  The third routine takes all the object files and links them
+together to create the output file.  These routines are designed so
+that the linker proper does not need to know anything about the symbols
+in the object files that it is linking.  The linker merely arranges the
+sections as directed by the linker script and lets BFD handle the
+details of symbols and relocs.
+
+   The second routine and third routines are passed a pointer to a
+`struct bfd_link_info' structure (defined in `bfdlink.h') which holds
+information relevant to the link, including the linker hash table
+(which was created by the first routine) and a set of callback
+functions to the linker proper.
+
+   The generic linker routines are in `linker.c', and use the header
+file `genlink.h'.  As of this writing, the only back ends which have
+implemented versions of these routines are a.out (in `aoutx.h') and
+ECOFF (in `ecoff.c').  The a.out routines are used as examples
+throughout this section.
+
+* Menu:
+
+* Creating a Linker Hash Table::
+* Adding Symbols to the Hash Table::
+* Performing the Final Link::
+
+
+File: bfd.info,  Node: Creating a Linker Hash Table,  Next: Adding Symbols to the Hash Table,  Prev: Linker Functions,  Up: Linker Functions
+
+2.17.1 Creating a linker hash table
+-----------------------------------
+
+The linker routines must create a hash table, which must be derived
+from `struct bfd_link_hash_table' described in `bfdlink.c'.  *Note Hash
+Tables::, for information on how to create a derived hash table.  This
+entry point is called using the target vector of the linker output file.
+
+   The `_bfd_link_hash_table_create' entry point must allocate and
+initialize an instance of the desired hash table.  If the back end does
+not require any additional information to be stored with the entries in
+the hash table, the entry point may simply create a `struct
+bfd_link_hash_table'.  Most likely, however, some additional
+information will be needed.
+
+   For example, with each entry in the hash table the a.out linker
+keeps the index the symbol has in the final output file (this index
+number is used so that when doing a relocatable link the symbol index
+used in the output file can be quickly filled in when copying over a
+reloc).  The a.out linker code defines the required structures and
+functions for a hash table derived from `struct bfd_link_hash_table'.
+The a.out linker hash table is created by the function
+`NAME(aout,link_hash_table_create)'; it simply allocates space for the
+hash table, initializes it, and returns a pointer to it.
+
+   When writing the linker routines for a new back end, you will
+generally not know exactly which fields will be required until you have
+finished.  You should simply create a new hash table which defines no
+additional fields, and then simply add fields as they become necessary.
+
+
+File: bfd.info,  Node: Adding Symbols to the Hash Table,  Next: Performing the Final Link,  Prev: Creating a Linker Hash Table,  Up: Linker Functions
+
+2.17.2 Adding symbols to the hash table
+---------------------------------------
+
+The linker proper will call the `_bfd_link_add_symbols' entry point for
+each object file or archive which is to be linked (typically these are
+the files named on the command line, but some may also come from the
+linker script).  The entry point is responsible for examining the file.
+For an object file, BFD must add any relevant symbol information to the
+hash table.  For an archive, BFD must determine which elements of the
+archive should be used and adding them to the link.
+
+   The a.out version of this entry point is
+`NAME(aout,link_add_symbols)'.
+
+* Menu:
+
+* Differing file formats::
+* Adding symbols from an object file::
+* Adding symbols from an archive::
+
+
+File: bfd.info,  Node: Differing file formats,  Next: Adding symbols from an object file,  Prev: Adding Symbols to the Hash Table,  Up: Adding Symbols to the Hash Table
+
+2.17.2.1 Differing file formats
+...............................
+
+Normally all the files involved in a link will be of the same format,
+but it is also possible to link together different format object files,
+and the back end must support that.  The `_bfd_link_add_symbols' entry
+point is called via the target vector of the file to be added.  This
+has an important consequence: the function may not assume that the hash
+table is the type created by the corresponding
+`_bfd_link_hash_table_create' vector.  All the `_bfd_link_add_symbols'
+function can assume about the hash table is that it is derived from
+`struct bfd_link_hash_table'.
+
+   Sometimes the `_bfd_link_add_symbols' function must store some
+information in the hash table entry to be used by the `_bfd_final_link'
+function.  In such a case the output bfd xvec must be checked to make
+sure that the hash table was created by an object file of the same
+format.
+
+   The `_bfd_final_link' routine must be prepared to handle a hash
+entry without any extra information added by the
+`_bfd_link_add_symbols' function.  A hash entry without extra
+information will also occur when the linker script directs the linker
+to create a symbol.  Note that, regardless of how a hash table entry is
+added, all the fields will be initialized to some sort of null value by
+the hash table entry initialization function.
+
+   See `ecoff_link_add_externals' for an example of how to check the
+output bfd before saving information (in this case, the ECOFF external
+symbol debugging information) in a hash table entry.
+
+
+File: bfd.info,  Node: Adding symbols from an object file,  Next: Adding symbols from an archive,  Prev: Differing file formats,  Up: Adding Symbols to the Hash Table
+
+2.17.2.2 Adding symbols from an object file
+...........................................
+
+When the `_bfd_link_add_symbols' routine is passed an object file, it
+must add all externally visible symbols in that object file to the hash
+table.  The actual work of adding the symbol to the hash table is
+normally handled by the function `_bfd_generic_link_add_one_symbol'.
+The `_bfd_link_add_symbols' routine is responsible for reading all the
+symbols from the object file and passing the correct information to
+`_bfd_generic_link_add_one_symbol'.
+
+   The `_bfd_link_add_symbols' routine should not use
+`bfd_canonicalize_symtab' to read the symbols.  The point of providing
+this routine is to avoid the overhead of converting the symbols into
+generic `asymbol' structures.
+
+   `_bfd_generic_link_add_one_symbol' handles the details of combining
+common symbols, warning about multiple definitions, and so forth.  It
+takes arguments which describe the symbol to add, notably symbol flags,
+a section, and an offset.  The symbol flags include such things as
+`BSF_WEAK' or `BSF_INDIRECT'.  The section is a section in the object
+file, or something like `bfd_und_section_ptr' for an undefined symbol
+or `bfd_com_section_ptr' for a common symbol.
+
+   If the `_bfd_final_link' routine is also going to need to read the
+symbol information, the `_bfd_link_add_symbols' routine should save it
+somewhere attached to the object file BFD.  However, the information
+should only be saved if the `keep_memory' field of the `info' argument
+is TRUE, so that the `-no-keep-memory' linker switch is effective.
+
+   The a.out function which adds symbols from an object file is
+`aout_link_add_object_symbols', and most of the interesting work is in
+`aout_link_add_symbols'.  The latter saves pointers to the hash tables
+entries created by `_bfd_generic_link_add_one_symbol' indexed by symbol
+number, so that the `_bfd_final_link' routine does not have to call the
+hash table lookup routine to locate the entry.
+
+
+File: bfd.info,  Node: Adding symbols from an archive,  Prev: Adding symbols from an object file,  Up: Adding Symbols to the Hash Table
+
+2.17.2.3 Adding symbols from an archive
+.......................................
+
+When the `_bfd_link_add_symbols' routine is passed an archive, it must
+look through the symbols defined by the archive and decide which
+elements of the archive should be included in the link.  For each such
+element it must call the `add_archive_element' linker callback, and it
+must add the symbols from the object file to the linker hash table.
+
+   In most cases the work of looking through the symbols in the archive
+should be done by the `_bfd_generic_link_add_archive_symbols' function.
+This function builds a hash table from the archive symbol table and
+looks through the list of undefined symbols to see which elements
+should be included.  `_bfd_generic_link_add_archive_symbols' is passed
+a function to call to make the final decision about adding an archive
+element to the link and to do the actual work of adding the symbols to
+the linker hash table.
+
+   The function passed to `_bfd_generic_link_add_archive_symbols' must
+read the symbols of the archive element and decide whether the archive
+element should be included in the link.  If the element is to be
+included, the `add_archive_element' linker callback routine must be
+called with the element as an argument, and the elements symbols must
+be added to the linker hash table just as though the element had itself
+been passed to the `_bfd_link_add_symbols' function.
+
+   When the a.out `_bfd_link_add_symbols' function receives an archive,
+it calls `_bfd_generic_link_add_archive_symbols' passing
+`aout_link_check_archive_element' as the function argument.
+`aout_link_check_archive_element' calls `aout_link_check_ar_symbols'.
+If the latter decides to add the element (an element is only added if
+it provides a real, non-common, definition for a previously undefined
+or common symbol) it calls the `add_archive_element' callback and then
+`aout_link_check_archive_element' calls `aout_link_add_symbols' to
+actually add the symbols to the linker hash table.
+
+   The ECOFF back end is unusual in that it does not normally call
+`_bfd_generic_link_add_archive_symbols', because ECOFF archives already
+contain a hash table of symbols.  The ECOFF back end searches the
+archive itself to avoid the overhead of creating a new hash table.
+
+
+File: bfd.info,  Node: Performing the Final Link,  Prev: Adding Symbols to the Hash Table,  Up: Linker Functions
+
+2.17.3 Performing the final link
+--------------------------------
+
+When all the input files have been processed, the linker calls the
+`_bfd_final_link' entry point of the output BFD.  This routine is
+responsible for producing the final output file, which has several
+aspects.  It must relocate the contents of the input sections and copy
+the data into the output sections.  It must build an output symbol
+table including any local symbols from the input files and the global
+symbols from the hash table.  When producing relocatable output, it must
+modify the input relocs and write them into the output file.  There may
+also be object format dependent work to be done.
+
+   The linker will also call the `write_object_contents' entry point
+when the BFD is closed.  The two entry points must work together in
+order to produce the correct output file.
+
+   The details of how this works are inevitably dependent upon the
+specific object file format.  The a.out `_bfd_final_link' routine is
+`NAME(aout,final_link)'.
+
+* Menu:
+
+* Information provided by the linker::
+* Relocating the section contents::
+* Writing the symbol table::
+
+
+File: bfd.info,  Node: Information provided by the linker,  Next: Relocating the section contents,  Prev: Performing the Final Link,  Up: Performing the Final Link
+
+2.17.3.1 Information provided by the linker
+...........................................
+
+Before the linker calls the `_bfd_final_link' entry point, it sets up
+some data structures for the function to use.
+
+   The `input_bfds' field of the `bfd_link_info' structure will point
+to a list of all the input files included in the link.  These files are
+linked through the `link_next' field of the `bfd' structure.
+
+   Each section in the output file will have a list of `link_order'
+structures attached to the `map_head.link_order' field (the
+`link_order' structure is defined in `bfdlink.h').  These structures
+describe how to create the contents of the output section in terms of
+the contents of various input sections, fill constants, and,
+eventually, other types of information.  They also describe relocs that
+must be created by the BFD backend, but do not correspond to any input
+file; this is used to support -Ur, which builds constructors while
+generating a relocatable object file.
+
+
+File: bfd.info,  Node: Relocating the section contents,  Next: Writing the symbol table,  Prev: Information provided by the linker,  Up: Performing the Final Link
+
+2.17.3.2 Relocating the section contents
+........................................
+
+The `_bfd_final_link' function should look through the `link_order'
+structures attached to each section of the output file.  Each
+`link_order' structure should either be handled specially, or it should
+be passed to the function `_bfd_default_link_order' which will do the
+right thing (`_bfd_default_link_order' is defined in `linker.c').
+
+   For efficiency, a `link_order' of type `bfd_indirect_link_order'
+whose associated section belongs to a BFD of the same format as the
+output BFD must be handled specially.  This type of `link_order'
+describes part of an output section in terms of a section belonging to
+one of the input files.  The `_bfd_final_link' function should read the
+contents of the section and any associated relocs, apply the relocs to
+the section contents, and write out the modified section contents.  If
+performing a relocatable link, the relocs themselves must also be
+modified and written out.
+
+   The functions `_bfd_relocate_contents' and
+`_bfd_final_link_relocate' provide some general support for performing
+the actual relocations, notably overflow checking.  Their arguments
+include information about the symbol the relocation is against and a
+`reloc_howto_type' argument which describes the relocation to perform.
+These functions are defined in `reloc.c'.
+
+   The a.out function which handles reading, relocating, and writing
+section contents is `aout_link_input_section'.  The actual relocation
+is done in `aout_link_input_section_std' and
+`aout_link_input_section_ext'.
+
+
+File: bfd.info,  Node: Writing the symbol table,  Prev: Relocating the section contents,  Up: Performing the Final Link
+
+2.17.3.3 Writing the symbol table
+.................................
+
+The `_bfd_final_link' function must gather all the symbols in the input
+files and write them out.  It must also write out all the symbols in
+the global hash table.  This must be controlled by the `strip' and
+`discard' fields of the `bfd_link_info' structure.
+
+   The local symbols of the input files will not have been entered into
+the linker hash table.  The `_bfd_final_link' routine must consider
+each input file and include the symbols in the output file.  It may be
+convenient to do this when looking through the `link_order' structures,
+or it may be done by stepping through the `input_bfds' list.
+
+   The `_bfd_final_link' routine must also traverse the global hash
+table to gather all the externally visible symbols.  It is possible
+that most of the externally visible symbols may be written out when
+considering the symbols of each input file, but it is still necessary
+to traverse the hash table since the linker script may have defined
+some symbols that are not in any of the input files.
+
+   The `strip' field of the `bfd_link_info' structure controls which
+symbols are written out.  The possible values are listed in
+`bfdlink.h'.  If the value is `strip_some', then the `keep_hash' field
+of the `bfd_link_info' structure is a hash table of symbols to keep;
+each symbol should be looked up in this hash table, and only symbols
+which are present should be included in the output file.
+
+   If the `strip' field of the `bfd_link_info' structure permits local
+symbols to be written out, the `discard' field is used to further
+controls which local symbols are included in the output file.  If the
+value is `discard_l', then all local symbols which begin with a certain
+prefix are discarded; this is controlled by the
+`bfd_is_local_label_name' entry point.
+
+   The a.out backend handles symbols by calling
+`aout_link_write_symbols' on each input BFD and then traversing the
+global hash table with the function `aout_link_write_other_symbol'.  It
+builds a string table while writing out the symbols, which is written
+to the output file at the end of `NAME(aout,final_link)'.
+
+2.17.3.4 `bfd_link_split_section'
+.................................
+
+*Synopsis*
+     bfd_boolean bfd_link_split_section (bfd *abfd, asection *sec);
+   *Description*
+Return nonzero if SEC should be split during a reloceatable or final
+link.
+     #define bfd_link_split_section(abfd, sec) \
+            BFD_SEND (abfd, _bfd_link_split_section, (abfd, sec))
+
+2.17.3.5 `bfd_section_already_linked'
+.....................................
+
+*Synopsis*
+     void bfd_section_already_linked (bfd *abfd, asection *sec,
+         struct bfd_link_info *info);
+   *Description*
+Check if SEC has been already linked during a reloceatable or final
+link.
+     #define bfd_section_already_linked(abfd, sec, info) \
+            BFD_SEND (abfd, _section_already_linked, (abfd, sec, info))
+
+2.17.3.6 `bfd_generic_define_common_symbol'
+...........................................
+
+*Synopsis*
+     bfd_boolean bfd_generic_define_common_symbol
+        (bfd *output_bfd, struct bfd_link_info *info,
+         struct bfd_link_hash_entry *h);
+   *Description*
+Convert common symbol H into a defined symbol.  Return TRUE on success
+and FALSE on failure.
+     #define bfd_define_common_symbol(output_bfd, info, h) \
+            BFD_SEND (output_bfd, _bfd_define_common_symbol, (output_bfd, info, h))
+
+2.17.3.7 `bfd_find_version_for_sym '
+....................................
+
+*Synopsis*
+     struct bfd_elf_version_tree * bfd_find_version_for_sym
+        (struct bfd_elf_version_tree *verdefs,
+         const char *sym_name, bfd_boolean *hide);
+   *Description*
+Search an elf version script tree for symbol versioning info and export
+/ don't-export status for a given symbol.  Return non-NULL on success
+and NULL on failure; also sets the output `hide' boolean parameter.
+
+
+File: bfd.info,  Node: Hash Tables,  Prev: Linker Functions,  Up: BFD front end
+
+2.18 Hash Tables
+================
+
+BFD provides a simple set of hash table functions.  Routines are
+provided to initialize a hash table, to free a hash table, to look up a
+string in a hash table and optionally create an entry for it, and to
+traverse a hash table.  There is currently no routine to delete an
+string from a hash table.
+
+   The basic hash table does not permit any data to be stored with a
+string.  However, a hash table is designed to present a base class from
+which other types of hash tables may be derived.  These derived types
+may store additional information with the string.  Hash tables were
+implemented in this way, rather than simply providing a data pointer in
+a hash table entry, because they were designed for use by the linker
+back ends.  The linker may create thousands of hash table entries, and
+the overhead of allocating private data and storing and following
+pointers becomes noticeable.
+
+   The basic hash table code is in `hash.c'.
+
+* Menu:
+
+* Creating and Freeing a Hash Table::
+* Looking Up or Entering a String::
+* Traversing a Hash Table::
+* Deriving a New Hash Table Type::
+
+
+File: bfd.info,  Node: Creating and Freeing a Hash Table,  Next: Looking Up or Entering a String,  Prev: Hash Tables,  Up: Hash Tables
+
+2.18.1 Creating and freeing a hash table
+----------------------------------------
+
+To create a hash table, create an instance of a `struct bfd_hash_table'
+(defined in `bfd.h') and call `bfd_hash_table_init' (if you know
+approximately how many entries you will need, the function
+`bfd_hash_table_init_n', which takes a SIZE argument, may be used).
+`bfd_hash_table_init' returns `FALSE' if some sort of error occurs.
+
+   The function `bfd_hash_table_init' take as an argument a function to
+use to create new entries.  For a basic hash table, use the function
+`bfd_hash_newfunc'.  *Note Deriving a New Hash Table Type::, for why
+you would want to use a different value for this argument.
+
+   `bfd_hash_table_init' will create an objalloc which will be used to
+allocate new entries.  You may allocate memory on this objalloc using
+`bfd_hash_allocate'.
+
+   Use `bfd_hash_table_free' to free up all the memory that has been
+allocated for a hash table.  This will not free up the `struct
+bfd_hash_table' itself, which you must provide.
+
+   Use `bfd_hash_set_default_size' to set the default size of hash
+table to use.
+
+
+File: bfd.info,  Node: Looking Up or Entering a String,  Next: Traversing a Hash Table,  Prev: Creating and Freeing a Hash Table,  Up: Hash Tables
+
+2.18.2 Looking up or entering a string
+--------------------------------------
+
+The function `bfd_hash_lookup' is used both to look up a string in the
+hash table and to create a new entry.
+
+   If the CREATE argument is `FALSE', `bfd_hash_lookup' will look up a
+string.  If the string is found, it will returns a pointer to a `struct
+bfd_hash_entry'.  If the string is not found in the table
+`bfd_hash_lookup' will return `NULL'.  You should not modify any of the
+fields in the returns `struct bfd_hash_entry'.
+
+   If the CREATE argument is `TRUE', the string will be entered into
+the hash table if it is not already there.  Either way a pointer to a
+`struct bfd_hash_entry' will be returned, either to the existing
+structure or to a newly created one.  In this case, a `NULL' return
+means that an error occurred.
+
+   If the CREATE argument is `TRUE', and a new entry is created, the
+COPY argument is used to decide whether to copy the string onto the
+hash table objalloc or not.  If COPY is passed as `FALSE', you must be
+careful not to deallocate or modify the string as long as the hash table
+exists.
+
+
+File: bfd.info,  Node: Traversing a Hash Table,  Next: Deriving a New Hash Table Type,  Prev: Looking Up or Entering a String,  Up: Hash Tables
+
+2.18.3 Traversing a hash table
+------------------------------
+
+The function `bfd_hash_traverse' may be used to traverse a hash table,
+calling a function on each element.  The traversal is done in a random
+order.
+
+   `bfd_hash_traverse' takes as arguments a function and a generic
+`void *' pointer.  The function is called with a hash table entry (a
+`struct bfd_hash_entry *') and the generic pointer passed to
+`bfd_hash_traverse'.  The function must return a `boolean' value, which
+indicates whether to continue traversing the hash table.  If the
+function returns `FALSE', `bfd_hash_traverse' will stop the traversal
+and return immediately.
+
+
+File: bfd.info,  Node: Deriving a New Hash Table Type,  Prev: Traversing a Hash Table,  Up: Hash Tables
+
+2.18.4 Deriving a new hash table type
+-------------------------------------
+
+Many uses of hash tables want to store additional information which
+each entry in the hash table.  Some also find it convenient to store
+additional information with the hash table itself.  This may be done
+using a derived hash table.
+
+   Since C is not an object oriented language, creating a derived hash
+table requires sticking together some boilerplate routines with a few
+differences specific to the type of hash table you want to create.
+
+   An example of a derived hash table is the linker hash table.  The
+structures for this are defined in `bfdlink.h'.  The functions are in
+`linker.c'.
+
+   You may also derive a hash table from an already derived hash table.
+For example, the a.out linker backend code uses a hash table derived
+from the linker hash table.
+
+* Menu:
+
+* Define the Derived Structures::
+* Write the Derived Creation Routine::
+* Write Other Derived Routines::
+
+
+File: bfd.info,  Node: Define the Derived Structures,  Next: Write the Derived Creation Routine,  Prev: Deriving a New Hash Table Type,  Up: Deriving a New Hash Table Type
+
+2.18.4.1 Define the derived structures
+......................................
+
+You must define a structure for an entry in the hash table, and a
+structure for the hash table itself.
+
+   The first field in the structure for an entry in the hash table must
+be of the type used for an entry in the hash table you are deriving
+from.  If you are deriving from a basic hash table this is `struct
+bfd_hash_entry', which is defined in `bfd.h'.  The first field in the
+structure for the hash table itself must be of the type of the hash
+table you are deriving from itself.  If you are deriving from a basic
+hash table, this is `struct bfd_hash_table'.
+
+   For example, the linker hash table defines `struct
+bfd_link_hash_entry' (in `bfdlink.h').  The first field, `root', is of
+type `struct bfd_hash_entry'.  Similarly, the first field in `struct
+bfd_link_hash_table', `table', is of type `struct bfd_hash_table'.
+
+
+File: bfd.info,  Node: Write the Derived Creation Routine,  Next: Write Other Derived Routines,  Prev: Define the Derived Structures,  Up: Deriving a New Hash Table Type
+
+2.18.4.2 Write the derived creation routine
+...........................................
+
+You must write a routine which will create and initialize an entry in
+the hash table.  This routine is passed as the function argument to
+`bfd_hash_table_init'.
+
+   In order to permit other hash tables to be derived from the hash
+table you are creating, this routine must be written in a standard way.
+
+   The first argument to the creation routine is a pointer to a hash
+table entry.  This may be `NULL', in which case the routine should
+allocate the right amount of space.  Otherwise the space has already
+been allocated by a hash table type derived from this one.
+
+   After allocating space, the creation routine must call the creation
+routine of the hash table type it is derived from, passing in a pointer
+to the space it just allocated.  This will initialize any fields used
+by the base hash table.
+
+   Finally the creation routine must initialize any local fields for
+the new hash table type.
+
+   Here is a boilerplate example of a creation routine.  FUNCTION_NAME
+is the name of the routine.  ENTRY_TYPE is the type of an entry in the
+hash table you are creating.  BASE_NEWFUNC is the name of the creation
+routine of the hash table type your hash table is derived from.
+
+     struct bfd_hash_entry *
+     FUNCTION_NAME (struct bfd_hash_entry *entry,
+                          struct bfd_hash_table *table,
+                          const char *string)
+     {
+       struct ENTRY_TYPE *ret = (ENTRY_TYPE *) entry;
+
+      /* Allocate the structure if it has not already been allocated by a
+         derived class.  */
+       if (ret == NULL)
+         {
+           ret = bfd_hash_allocate (table, sizeof (* ret));
+           if (ret == NULL)
+             return NULL;
+         }
+
+      /* Call the allocation method of the base class.  */
+       ret = ((ENTRY_TYPE *)
+             BASE_NEWFUNC ((struct bfd_hash_entry *) ret, table, string));
+
+      /* Initialize the local fields here.  */
+
+       return (struct bfd_hash_entry *) ret;
+     }
+   *Description*
+The creation routine for the linker hash table, which is in `linker.c',
+looks just like this example.  FUNCTION_NAME is
+`_bfd_link_hash_newfunc'.  ENTRY_TYPE is `struct bfd_link_hash_entry'.
+BASE_NEWFUNC is `bfd_hash_newfunc', the creation routine for a basic
+hash table.
+
+   `_bfd_link_hash_newfunc' also initializes the local fields in a
+linker hash table entry: `type', `written' and `next'.
+
+
+File: bfd.info,  Node: Write Other Derived Routines,  Prev: Write the Derived Creation Routine,  Up: Deriving a New Hash Table Type
+
+2.18.4.3 Write other derived routines
+.....................................
+
+You will want to write other routines for your new hash table, as well.
+
+   You will want an initialization routine which calls the
+initialization routine of the hash table you are deriving from and
+initializes any other local fields.  For the linker hash table, this is
+`_bfd_link_hash_table_init' in `linker.c'.
+
+   You will want a lookup routine which calls the lookup routine of the
+hash table you are deriving from and casts the result.  The linker hash
+table uses `bfd_link_hash_lookup' in `linker.c' (this actually takes an
+additional argument which it uses to decide how to return the looked up
+value).
+
+   You may want a traversal routine.  This should just call the
+traversal routine of the hash table you are deriving from with
+appropriate casts.  The linker hash table uses `bfd_link_hash_traverse'
+in `linker.c'.
+
+   These routines may simply be defined as macros.  For example, the
+a.out backend linker hash table, which is derived from the linker hash
+table, uses macros for the lookup and traversal routines.  These are
+`aout_link_hash_lookup' and `aout_link_hash_traverse' in aoutx.h.
+
+
+File: bfd.info,  Node: BFD back ends,  Next: GNU Free Documentation License,  Prev: BFD front end,  Up: Top
+
+3 BFD back ends
+***************
+
+* Menu:
+
+* What to Put Where::
+* aout ::	a.out backends
+* coff ::	coff backends
+* elf  ::	elf backends
+* mmo  ::	mmo backend
+
+
+File: bfd.info,  Node: What to Put Where,  Next: aout,  Prev: BFD back ends,  Up: BFD back ends
+
+3.1 What to Put Where
+=====================
+
+All of BFD lives in one directory.
+
+
+File: bfd.info,  Node: aout,  Next: coff,  Prev: What to Put Where,  Up: BFD back ends
+
+3.2 a.out backends
+==================
+
+*Description*
+BFD supports a number of different flavours of a.out format, though the
+major differences are only the sizes of the structures on disk, and the
+shape of the relocation information.
+
+   The support is split into a basic support file `aoutx.h' and other
+files which derive functions from the base. One derivation file is
+`aoutf1.h' (for a.out flavour 1), and adds to the basic a.out functions
+support for sun3, sun4, 386 and 29k a.out files, to create a target
+jump vector for a specific target.
+
+   This information is further split out into more specific files for
+each machine, including `sunos.c' for sun3 and sun4, `newsos3.c' for
+the Sony NEWS, and `demo64.c' for a demonstration of a 64 bit a.out
+format.
+
+   The base file `aoutx.h' defines general mechanisms for reading and
+writing records to and from disk and various other methods which BFD
+requires. It is included by `aout32.c' and `aout64.c' to form the names
+`aout_32_swap_exec_header_in', `aout_64_swap_exec_header_in', etc.
+
+   As an example, this is what goes on to make the back end for a sun4,
+from `aout32.c':
+
+            #define ARCH_SIZE 32
+            #include "aoutx.h"
+
+   Which exports names:
+
+            ...
+            aout_32_canonicalize_reloc
+            aout_32_find_nearest_line
+            aout_32_get_lineno
+            aout_32_get_reloc_upper_bound
+            ...
+
+   from `sunos.c':
+
+            #define TARGET_NAME "a.out-sunos-big"
+            #define VECNAME    sunos_big_vec
+            #include "aoutf1.h"
+
+   requires all the names from `aout32.c', and produces the jump vector
+
+            sunos_big_vec
+
+   The file `host-aout.c' is a special case.  It is for a large set of
+hosts that use "more or less standard" a.out files, and for which
+cross-debugging is not interesting.  It uses the standard 32-bit a.out
+support routines, but determines the file offsets and addresses of the
+text, data, and BSS sections, the machine architecture and machine
+type, and the entry point address, in a host-dependent manner.  Once
+these values have been determined, generic code is used to handle the
+object file.
+
+   When porting it to run on a new system, you must supply:
+
+             HOST_PAGE_SIZE
+             HOST_SEGMENT_SIZE
+             HOST_MACHINE_ARCH       (optional)
+             HOST_MACHINE_MACHINE    (optional)
+             HOST_TEXT_START_ADDR
+             HOST_STACK_END_ADDR
+
+   in the file `../include/sys/h-XXX.h' (for your host).  These values,
+plus the structures and macros defined in `a.out.h' on your host
+system, will produce a BFD target that will access ordinary a.out files
+on your host. To configure a new machine to use `host-aout.c', specify:
+
+            TDEFAULTS = -DDEFAULT_VECTOR=host_aout_big_vec
+            TDEPFILES= host-aout.o trad-core.o
+
+   in the `config/XXX.mt' file, and modify `configure.in' to use the
+`XXX.mt' file (by setting "`bfd_target=XXX'") when your configuration
+is selected.
+
+3.2.1 Relocations
+-----------------
+
+*Description*
+The file `aoutx.h' provides for both the _standard_ and _extended_
+forms of a.out relocation records.
+
+   The standard records contain only an address, a symbol index, and a
+type field. The extended records (used on 29ks and sparcs) also have a
+full integer for an addend.
+
+3.2.2 Internal entry points
+---------------------------
+
+*Description*
+`aoutx.h' exports several routines for accessing the contents of an
+a.out file, which are gathered and exported in turn by various format
+specific files (eg sunos.c).
+
+3.2.2.1 `aout_SIZE_swap_exec_header_in'
+.......................................
+
+*Synopsis*
+     void aout_SIZE_swap_exec_header_in,
+        (bfd *abfd,
+         struct external_exec *bytes,
+         struct internal_exec *execp);
+   *Description*
+Swap the information in an executable header RAW_BYTES taken from a raw
+byte stream memory image into the internal exec header structure EXECP.
+
+3.2.2.2 `aout_SIZE_swap_exec_header_out'
+........................................
+
+*Synopsis*
+     void aout_SIZE_swap_exec_header_out
+        (bfd *abfd,
+         struct internal_exec *execp,
+         struct external_exec *raw_bytes);
+   *Description*
+Swap the information in an internal exec header structure EXECP into
+the buffer RAW_BYTES ready for writing to disk.
+
+3.2.2.3 `aout_SIZE_some_aout_object_p'
+......................................
+
+*Synopsis*
+     const bfd_target *aout_SIZE_some_aout_object_p
+        (bfd *abfd,
+         struct internal_exec *execp,
+         const bfd_target *(*callback_to_real_object_p) (bfd *));
+   *Description*
+Some a.out variant thinks that the file open in ABFD checking is an
+a.out file.  Do some more checking, and set up for access if it really
+is.  Call back to the calling environment's "finish up" function just
+before returning, to handle any last-minute setup.
+
+3.2.2.4 `aout_SIZE_mkobject'
+............................
+
+*Synopsis*
+     bfd_boolean aout_SIZE_mkobject, (bfd *abfd);
+   *Description*
+Initialize BFD ABFD for use with a.out files.
+
+3.2.2.5 `aout_SIZE_machine_type'
+................................
+
+*Synopsis*
+     enum machine_type  aout_SIZE_machine_type
+        (enum bfd_architecture arch,
+         unsigned long machine,
+         bfd_boolean *unknown);
+   *Description*
+Keep track of machine architecture and machine type for a.out's. Return
+the `machine_type' for a particular architecture and machine, or
+`M_UNKNOWN' if that exact architecture and machine can't be represented
+in a.out format.
+
+   If the architecture is understood, machine type 0 (default) is
+always understood.
+
+3.2.2.6 `aout_SIZE_set_arch_mach'
+.................................
+
+*Synopsis*
+     bfd_boolean aout_SIZE_set_arch_mach,
+        (bfd *,
+         enum bfd_architecture arch,
+         unsigned long machine);
+   *Description*
+Set the architecture and the machine of the BFD ABFD to the values ARCH
+and MACHINE.  Verify that ABFD's format can support the architecture
+required.
+
+3.2.2.7 `aout_SIZE_new_section_hook'
+....................................
+
+*Synopsis*
+     bfd_boolean aout_SIZE_new_section_hook,
+        (bfd *abfd,
+         asection *newsect);
+   *Description*
+Called by the BFD in response to a `bfd_make_section' request.
+
+
+File: bfd.info,  Node: coff,  Next: elf,  Prev: aout,  Up: BFD back ends
+
+3.3 coff backends
+=================
+
+BFD supports a number of different flavours of coff format.  The major
+differences between formats are the sizes and alignments of fields in
+structures on disk, and the occasional extra field.
+
+   Coff in all its varieties is implemented with a few common files and
+a number of implementation specific files. For example, The 88k bcs
+coff format is implemented in the file `coff-m88k.c'. This file
+`#include's `coff/m88k.h' which defines the external structure of the
+coff format for the 88k, and `coff/internal.h' which defines the
+internal structure. `coff-m88k.c' also defines the relocations used by
+the 88k format *Note Relocations::.
+
+   The Intel i960 processor version of coff is implemented in
+`coff-i960.c'. This file has the same structure as `coff-m88k.c',
+except that it includes `coff/i960.h' rather than `coff-m88k.h'.
+
+3.3.1 Porting to a new version of coff
+--------------------------------------
+
+The recommended method is to select from the existing implementations
+the version of coff which is most like the one you want to use.  For
+example, we'll say that i386 coff is the one you select, and that your
+coff flavour is called foo.  Copy `i386coff.c' to `foocoff.c', copy
+`../include/coff/i386.h' to `../include/coff/foo.h', and add the lines
+to `targets.c' and `Makefile.in' so that your new back end is used.
+Alter the shapes of the structures in `../include/coff/foo.h' so that
+they match what you need. You will probably also have to add `#ifdef's
+to the code in `coff/internal.h' and `coffcode.h' if your version of
+coff is too wild.
+
+   You can verify that your new BFD backend works quite simply by
+building `objdump' from the `binutils' directory, and making sure that
+its version of what's going on and your host system's idea (assuming it
+has the pretty standard coff dump utility, usually called `att-dump' or
+just `dump') are the same.  Then clean up your code, and send what
+you've done to Cygnus. Then your stuff will be in the next release, and
+you won't have to keep integrating it.
+
+3.3.2 How the coff backend works
+--------------------------------
+
+3.3.2.1 File layout
+...................
+
+The Coff backend is split into generic routines that are applicable to
+any Coff target and routines that are specific to a particular target.
+The target-specific routines are further split into ones which are
+basically the same for all Coff targets except that they use the
+external symbol format or use different values for certain constants.
+
+   The generic routines are in `coffgen.c'.  These routines work for
+any Coff target.  They use some hooks into the target specific code;
+the hooks are in a `bfd_coff_backend_data' structure, one of which
+exists for each target.
+
+   The essentially similar target-specific routines are in
+`coffcode.h'.  This header file includes executable C code.  The
+various Coff targets first include the appropriate Coff header file,
+make any special defines that are needed, and then include `coffcode.h'.
+
+   Some of the Coff targets then also have additional routines in the
+target source file itself.
+
+   For example, `coff-i960.c' includes `coff/internal.h' and
+`coff/i960.h'.  It then defines a few constants, such as `I960', and
+includes `coffcode.h'.  Since the i960 has complex relocation types,
+`coff-i960.c' also includes some code to manipulate the i960 relocs.
+This code is not in `coffcode.h' because it would not be used by any
+other target.
+
+3.3.2.2 Coff long section names
+...............................
+
+In the standard Coff object format, section names are limited to the
+eight bytes available in the `s_name' field of the `SCNHDR' section
+header structure.  The format requires the field to be NUL-padded, but
+not necessarily NUL-terminated, so the longest section names permitted
+are a full eight characters.
+
+   The Microsoft PE variants of the Coff object file format add an
+extension to support the use of long section names.  This extension is
+defined in section 4 of the Microsoft PE/COFF specification (rev 8.1).
+If a section name is too long to fit into the section header's `s_name'
+field, it is instead placed into the string table, and the `s_name'
+field is filled with a slash ("/") followed by the ASCII decimal
+representation of the offset of the full name relative to the string
+table base.
+
+   Note that this implies that the extension can only be used in object
+files, as executables do not contain a string table.  The standard
+specifies that long section names from objects emitted into executable
+images are to be truncated.
+
+   However, as a GNU extension, BFD can generate executable images that
+contain a string table and long section names.  This would appear to be
+technically valid, as the standard only says that Coff debugging
+information is deprecated, not forbidden, and in practice it works,
+although some tools that parse PE files expecting the MS standard
+format may become confused; `PEview' is one known example.
+
+   The functionality is supported in BFD by code implemented under the
+control of the macro `COFF_LONG_SECTION_NAMES'.  If not defined, the
+format does not support long section names in any way.  If defined, it
+is used to initialise a flag, `_bfd_coff_long_section_names', and a
+hook function pointer, `_bfd_coff_set_long_section_names', in the Coff
+backend data structure.  The flag controls the generation of long
+section names in output BFDs at runtime; if it is false, as it will be
+by default when generating an executable image, long section names are
+truncated; if true, the long section names extension is employed.  The
+hook points to a function that allows the value of the flag to be
+altered at runtime, on formats that support long section names at all;
+on other formats it points to a stub that returns an error indication.
+With input BFDs, the flag is set according to whether any long section
+names are detected while reading the section headers.  For a completely
+new BFD, the flag is set to the default for the target format.  This
+information can be used by a client of the BFD library when deciding
+what output format to generate, and means that a BFD that is opened for
+read and subsequently converted to a writeable BFD and modified
+in-place will retain whatever format it had on input.
+
+   If `COFF_LONG_SECTION_NAMES' is simply defined (blank), or is
+defined to the value "1", then long section names are enabled by
+default; if it is defined to the value zero, they are disabled by
+default (but still accepted in input BFDs).  The header `coffcode.h'
+defines a macro, `COFF_DEFAULT_LONG_SECTION_NAMES', which is used in
+the backends to initialise the backend data structure fields
+appropriately; see the comments for further detail.
+
+3.3.2.3 Bit twiddling
+.....................
+
+Each flavour of coff supported in BFD has its own header file
+describing the external layout of the structures. There is also an
+internal description of the coff layout, in `coff/internal.h'. A major
+function of the coff backend is swapping the bytes and twiddling the
+bits to translate the external form of the structures into the normal
+internal form. This is all performed in the `bfd_swap'_thing_direction
+routines. Some elements are different sizes between different versions
+of coff; it is the duty of the coff version specific include file to
+override the definitions of various packing routines in `coffcode.h'.
+E.g., the size of line number entry in coff is sometimes 16 bits, and
+sometimes 32 bits. `#define'ing `PUT_LNSZ_LNNO' and `GET_LNSZ_LNNO'
+will select the correct one. No doubt, some day someone will find a
+version of coff which has a varying field size not catered to at the
+moment. To port BFD, that person will have to add more `#defines'.
+Three of the bit twiddling routines are exported to `gdb';
+`coff_swap_aux_in', `coff_swap_sym_in' and `coff_swap_lineno_in'. `GDB'
+reads the symbol table on its own, but uses BFD to fix things up.  More
+of the bit twiddlers are exported for `gas'; `coff_swap_aux_out',
+`coff_swap_sym_out', `coff_swap_lineno_out', `coff_swap_reloc_out',
+`coff_swap_filehdr_out', `coff_swap_aouthdr_out',
+`coff_swap_scnhdr_out'. `Gas' currently keeps track of all the symbol
+table and reloc drudgery itself, thereby saving the internal BFD
+overhead, but uses BFD to swap things on the way out, making cross
+ports much safer.  Doing so also allows BFD (and thus the linker) to
+use the same header files as `gas', which makes one avenue to disaster
+disappear.
+
+3.3.2.4 Symbol reading
+......................
+
+The simple canonical form for symbols used by BFD is not rich enough to
+keep all the information available in a coff symbol table. The back end
+gets around this problem by keeping the original symbol table around,
+"behind the scenes".
+
+   When a symbol table is requested (through a call to
+`bfd_canonicalize_symtab'), a request gets through to
+`coff_get_normalized_symtab'. This reads the symbol table from the coff
+file and swaps all the structures inside into the internal form. It
+also fixes up all the pointers in the table (represented in the file by
+offsets from the first symbol in the table) into physical pointers to
+elements in the new internal table. This involves some work since the
+meanings of fields change depending upon context: a field that is a
+pointer to another structure in the symbol table at one moment may be
+the size in bytes of a structure at the next.  Another pass is made
+over the table. All symbols which mark file names (`C_FILE' symbols)
+are modified so that the internal string points to the value in the
+auxent (the real filename) rather than the normal text associated with
+the symbol (`".file"').
+
+   At this time the symbol names are moved around. Coff stores all
+symbols less than nine characters long physically within the symbol
+table; longer strings are kept at the end of the file in the string
+table. This pass moves all strings into memory and replaces them with
+pointers to the strings.
+
+   The symbol table is massaged once again, this time to create the
+canonical table used by the BFD application. Each symbol is inspected
+in turn, and a decision made (using the `sclass' field) about the
+various flags to set in the `asymbol'.  *Note Symbols::. The generated
+canonical table shares strings with the hidden internal symbol table.
+
+   Any linenumbers are read from the coff file too, and attached to the
+symbols which own the functions the linenumbers belong to.
+
+3.3.2.5 Symbol writing
+......................
+
+Writing a symbol to a coff file which didn't come from a coff file will
+lose any debugging information. The `asymbol' structure remembers the
+BFD from which the symbol was taken, and on output the back end makes
+sure that the same destination target as source target is present.
+
+   When the symbols have come from a coff file then all the debugging
+information is preserved.
+
+   Symbol tables are provided for writing to the back end in a vector
+of pointers to pointers. This allows applications like the linker to
+accumulate and output large symbol tables without having to do too much
+byte copying.
+
+   This function runs through the provided symbol table and patches
+each symbol marked as a file place holder (`C_FILE') to point to the
+next file place holder in the list. It also marks each `offset' field
+in the list with the offset from the first symbol of the current symbol.
+
+   Another function of this procedure is to turn the canonical value
+form of BFD into the form used by coff. Internally, BFD expects symbol
+values to be offsets from a section base; so a symbol physically at
+0x120, but in a section starting at 0x100, would have the value 0x20.
+Coff expects symbols to contain their final value, so symbols have
+their values changed at this point to reflect their sum with their
+owning section.  This transformation uses the `output_section' field of
+the `asymbol''s `asection' *Note Sections::.
+
+   * `coff_mangle_symbols'
+   This routine runs though the provided symbol table and uses the
+offsets generated by the previous pass and the pointers generated when
+the symbol table was read in to create the structured hierarchy
+required by coff. It changes each pointer to a symbol into the index
+into the symbol table of the asymbol.
+
+   * `coff_write_symbols'
+   This routine runs through the symbol table and patches up the
+symbols from their internal form into the coff way, calls the bit
+twiddlers, and writes out the table to the file.
+
+3.3.2.6 `coff_symbol_type'
+..........................
+
+*Description*
+The hidden information for an `asymbol' is described in a
+`combined_entry_type':
+
+
+     typedef struct coff_ptr_struct
+     {
+       /* Remembers the offset from the first symbol in the file for
+          this symbol. Generated by coff_renumber_symbols. */
+       unsigned int offset;
+
+       /* Should the value of this symbol be renumbered.  Used for
+          XCOFF C_BSTAT symbols.  Set by coff_slurp_symbol_table.  */
+       unsigned int fix_value : 1;
+
+       /* Should the tag field of this symbol be renumbered.
+          Created by coff_pointerize_aux. */
+       unsigned int fix_tag : 1;
+
+       /* Should the endidx field of this symbol be renumbered.
+          Created by coff_pointerize_aux. */
+       unsigned int fix_end : 1;
+
+       /* Should the x_csect.x_scnlen field be renumbered.
+          Created by coff_pointerize_aux. */
+       unsigned int fix_scnlen : 1;
+
+       /* Fix up an XCOFF C_BINCL/C_EINCL symbol.  The value is the
+          index into the line number entries.  Set by coff_slurp_symbol_table.  */
+       unsigned int fix_line : 1;
+
+       /* The container for the symbol structure as read and translated
+          from the file. */
+       union
+       {
+         union internal_auxent auxent;
+         struct internal_syment syment;
+       } u;
+     } combined_entry_type;
+
+
+     /* Each canonical asymbol really looks like this: */
+
+     typedef struct coff_symbol_struct
+     {
+       /* The actual symbol which the rest of BFD works with */
+       asymbol symbol;
+
+       /* A pointer to the hidden information for this symbol */
+       combined_entry_type *native;
+
+       /* A pointer to the linenumber information for this symbol */
+       struct lineno_cache_entry *lineno;
+
+       /* Have the line numbers been relocated yet ? */
+       bfd_boolean done_lineno;
+     } coff_symbol_type;
+   
+3.3.2.7 `bfd_coff_backend_data'
+...............................
+
+     /* COFF symbol classifications.  */
+
+     enum coff_symbol_classification
+     {
+       /* Global symbol.  */
+       COFF_SYMBOL_GLOBAL,
+       /* Common symbol.  */
+       COFF_SYMBOL_COMMON,
+       /* Undefined symbol.  */
+       COFF_SYMBOL_UNDEFINED,
+       /* Local symbol.  */
+       COFF_SYMBOL_LOCAL,
+       /* PE section symbol.  */
+       COFF_SYMBOL_PE_SECTION
+     };
+Special entry points for gdb to swap in coff symbol table parts:
+     typedef struct
+     {
+       void (*_bfd_coff_swap_aux_in)
+         (bfd *, void *, int, int, int, int, void *);
+
+       void (*_bfd_coff_swap_sym_in)
+         (bfd *, void *, void *);
+
+       void (*_bfd_coff_swap_lineno_in)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_aux_out)
+         (bfd *, void *, int, int, int, int, void *);
+
+       unsigned int (*_bfd_coff_swap_sym_out)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_lineno_out)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_reloc_out)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_filehdr_out)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_aouthdr_out)
+         (bfd *, void *, void *);
+
+       unsigned int (*_bfd_coff_swap_scnhdr_out)
+         (bfd *, void *, void *);
+
+       unsigned int _bfd_filhsz;
+       unsigned int _bfd_aoutsz;
+       unsigned int _bfd_scnhsz;
+       unsigned int _bfd_symesz;
+       unsigned int _bfd_auxesz;
+       unsigned int _bfd_relsz;
+       unsigned int _bfd_linesz;
+       unsigned int _bfd_filnmlen;
+       bfd_boolean _bfd_coff_long_filenames;
+
+       bfd_boolean _bfd_coff_long_section_names;
+       bfd_boolean (*_bfd_coff_set_long_section_names)
+         (bfd *, int);
+
+       unsigned int _bfd_coff_default_section_alignment_power;
+       bfd_boolean _bfd_coff_force_symnames_in_strings;
+       unsigned int _bfd_coff_debug_string_prefix_length;
+
+       void (*_bfd_coff_swap_filehdr_in)
+         (bfd *, void *, void *);
+
+       void (*_bfd_coff_swap_aouthdr_in)
+         (bfd *, void *, void *);
+
+       void (*_bfd_coff_swap_scnhdr_in)
+         (bfd *, void *, void *);
+
+       void (*_bfd_coff_swap_reloc_in)
+         (bfd *abfd, void *, void *);
+
+       bfd_boolean (*_bfd_coff_bad_format_hook)
+         (bfd *, void *);
+
+       bfd_boolean (*_bfd_coff_set_arch_mach_hook)
+         (bfd *, void *);
+
+       void * (*_bfd_coff_mkobject_hook)
+         (bfd *, void *, void *);
+
+       bfd_boolean (*_bfd_styp_to_sec_flags_hook)
+         (bfd *, void *, const char *, asection *, flagword *);
+
+       void (*_bfd_set_alignment_hook)
+         (bfd *, asection *, void *);
+
+       bfd_boolean (*_bfd_coff_slurp_symbol_table)
+         (bfd *);
+
+       bfd_boolean (*_bfd_coff_symname_in_debug)
+         (bfd *, struct internal_syment *);
+
+       bfd_boolean (*_bfd_coff_pointerize_aux_hook)
+         (bfd *, combined_entry_type *, combined_entry_type *,
+                 unsigned int, combined_entry_type *);
+
+       bfd_boolean (*_bfd_coff_print_aux)
+         (bfd *, FILE *, combined_entry_type *, combined_entry_type *,
+                 combined_entry_type *, unsigned int);
+
+       void (*_bfd_coff_reloc16_extra_cases)
+         (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
+                bfd_byte *, unsigned int *, unsigned int *);
+
+       int (*_bfd_coff_reloc16_estimate)
+         (bfd *, asection *, arelent *, unsigned int,
+                 struct bfd_link_info *);
+
+       enum coff_symbol_classification (*_bfd_coff_classify_symbol)
+         (bfd *, struct internal_syment *);
+
+       bfd_boolean (*_bfd_coff_compute_section_file_positions)
+         (bfd *);
+
+       bfd_boolean (*_bfd_coff_start_final_link)
+         (bfd *, struct bfd_link_info *);
+
+       bfd_boolean (*_bfd_coff_relocate_section)
+         (bfd *, struct bfd_link_info *, bfd *, asection *, bfd_byte *,
+                 struct internal_reloc *, struct internal_syment *, asection **);
+
+       reloc_howto_type *(*_bfd_coff_rtype_to_howto)
+         (bfd *, asection *, struct internal_reloc *,
+                 struct coff_link_hash_entry *, struct internal_syment *,
+                 bfd_vma *);
+
+       bfd_boolean (*_bfd_coff_adjust_symndx)
+         (bfd *, struct bfd_link_info *, bfd *, asection *,
+                 struct internal_reloc *, bfd_boolean *);
+
+       bfd_boolean (*_bfd_coff_link_add_one_symbol)
+         (struct bfd_link_info *, bfd *, const char *, flagword,
+                 asection *, bfd_vma, const char *, bfd_boolean, bfd_boolean,
+                 struct bfd_link_hash_entry **);
+
+       bfd_boolean (*_bfd_coff_link_output_has_begun)
+         (bfd *, struct coff_final_link_info *);
+
+       bfd_boolean (*_bfd_coff_final_link_postscript)
+         (bfd *, struct coff_final_link_info *);
+
+       bfd_boolean (*_bfd_coff_print_pdata)
+         (bfd *, void *);
+
+     } bfd_coff_backend_data;
+
+     #define coff_backend_info(abfd) \
+       ((bfd_coff_backend_data *) (abfd)->xvec->backend_data)
+
+     #define bfd_coff_swap_aux_in(a,e,t,c,ind,num,i) \
+       ((coff_backend_info (a)->_bfd_coff_swap_aux_in) (a,e,t,c,ind,num,i))
+
+     #define bfd_coff_swap_sym_in(a,e,i) \
+       ((coff_backend_info (a)->_bfd_coff_swap_sym_in) (a,e,i))
+
+     #define bfd_coff_swap_lineno_in(a,e,i) \
+       ((coff_backend_info ( a)->_bfd_coff_swap_lineno_in) (a,e,i))
+
+     #define bfd_coff_swap_reloc_out(abfd, i, o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_out) (abfd, i, o))
+
+     #define bfd_coff_swap_lineno_out(abfd, i, o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_lineno_out) (abfd, i, o))
+
+     #define bfd_coff_swap_aux_out(a,i,t,c,ind,num,o) \
+       ((coff_backend_info (a)->_bfd_coff_swap_aux_out) (a,i,t,c,ind,num,o))
+
+     #define bfd_coff_swap_sym_out(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_sym_out) (abfd, i, o))
+
+     #define bfd_coff_swap_scnhdr_out(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_out) (abfd, i, o))
+
+     #define bfd_coff_swap_filehdr_out(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_out) (abfd, i, o))
+
+     #define bfd_coff_swap_aouthdr_out(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_out) (abfd, i, o))
+
+     #define bfd_coff_filhsz(abfd) (coff_backend_info (abfd)->_bfd_filhsz)
+     #define bfd_coff_aoutsz(abfd) (coff_backend_info (abfd)->_bfd_aoutsz)
+     #define bfd_coff_scnhsz(abfd) (coff_backend_info (abfd)->_bfd_scnhsz)
+     #define bfd_coff_symesz(abfd) (coff_backend_info (abfd)->_bfd_symesz)
+     #define bfd_coff_auxesz(abfd) (coff_backend_info (abfd)->_bfd_auxesz)
+     #define bfd_coff_relsz(abfd)  (coff_backend_info (abfd)->_bfd_relsz)
+     #define bfd_coff_linesz(abfd) (coff_backend_info (abfd)->_bfd_linesz)
+     #define bfd_coff_filnmlen(abfd) (coff_backend_info (abfd)->_bfd_filnmlen)
+     #define bfd_coff_long_filenames(abfd) \
+       (coff_backend_info (abfd)->_bfd_coff_long_filenames)
+     #define bfd_coff_long_section_names(abfd) \
+       (coff_backend_info (abfd)->_bfd_coff_long_section_names)
+     #define bfd_coff_set_long_section_names(abfd, enable) \
+       ((coff_backend_info (abfd)->_bfd_coff_set_long_section_names) (abfd, enable))
+     #define bfd_coff_default_section_alignment_power(abfd) \
+       (coff_backend_info (abfd)->_bfd_coff_default_section_alignment_power)
+     #define bfd_coff_swap_filehdr_in(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_filehdr_in) (abfd, i, o))
+
+     #define bfd_coff_swap_aouthdr_in(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_aouthdr_in) (abfd, i, o))
+
+     #define bfd_coff_swap_scnhdr_in(abfd, i,o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_scnhdr_in) (abfd, i, o))
+
+     #define bfd_coff_swap_reloc_in(abfd, i, o) \
+       ((coff_backend_info (abfd)->_bfd_coff_swap_reloc_in) (abfd, i, o))
+
+     #define bfd_coff_bad_format_hook(abfd, filehdr) \
+       ((coff_backend_info (abfd)->_bfd_coff_bad_format_hook) (abfd, filehdr))
+
+     #define bfd_coff_set_arch_mach_hook(abfd, filehdr)\
+       ((coff_backend_info (abfd)->_bfd_coff_set_arch_mach_hook) (abfd, filehdr))
+     #define bfd_coff_mkobject_hook(abfd, filehdr, aouthdr)\
+       ((coff_backend_info (abfd)->_bfd_coff_mkobject_hook)\
+        (abfd, filehdr, aouthdr))
+
+     #define bfd_coff_styp_to_sec_flags_hook(abfd, scnhdr, name, section, flags_ptr)\
+       ((coff_backend_info (abfd)->_bfd_styp_to_sec_flags_hook)\
+        (abfd, scnhdr, name, section, flags_ptr))
+
+     #define bfd_coff_set_alignment_hook(abfd, sec, scnhdr)\
+       ((coff_backend_info (abfd)->_bfd_set_alignment_hook) (abfd, sec, scnhdr))
+
+     #define bfd_coff_slurp_symbol_table(abfd)\
+       ((coff_backend_info (abfd)->_bfd_coff_slurp_symbol_table) (abfd))
+
+     #define bfd_coff_symname_in_debug(abfd, sym)\
+       ((coff_backend_info (abfd)->_bfd_coff_symname_in_debug) (abfd, sym))
+
+     #define bfd_coff_force_symnames_in_strings(abfd)\
+       (coff_backend_info (abfd)->_bfd_coff_force_symnames_in_strings)
+
+     #define bfd_coff_debug_string_prefix_length(abfd)\
+       (coff_backend_info (abfd)->_bfd_coff_debug_string_prefix_length)
+
+     #define bfd_coff_print_aux(abfd, file, base, symbol, aux, indaux)\
+       ((coff_backend_info (abfd)->_bfd_coff_print_aux)\
+        (abfd, file, base, symbol, aux, indaux))
+
+     #define bfd_coff_reloc16_extra_cases(abfd, link_info, link_order,\
+                                          reloc, data, src_ptr, dst_ptr)\
+       ((coff_backend_info (abfd)->_bfd_coff_reloc16_extra_cases)\
+        (abfd, link_info, link_order, reloc, data, src_ptr, dst_ptr))
+
+     #define bfd_coff_reloc16_estimate(abfd, section, reloc, shrink, link_info)\
+       ((coff_backend_info (abfd)->_bfd_coff_reloc16_estimate)\
+        (abfd, section, reloc, shrink, link_info))
+
+     #define bfd_coff_classify_symbol(abfd, sym)\
+       ((coff_backend_info (abfd)->_bfd_coff_classify_symbol)\
+        (abfd, sym))
+
+     #define bfd_coff_compute_section_file_positions(abfd)\
+       ((coff_backend_info (abfd)->_bfd_coff_compute_section_file_positions)\
+        (abfd))
+
+     #define bfd_coff_start_final_link(obfd, info)\
+       ((coff_backend_info (obfd)->_bfd_coff_start_final_link)\
+        (obfd, info))
+     #define bfd_coff_relocate_section(obfd,info,ibfd,o,con,rel,isyms,secs)\
+       ((coff_backend_info (ibfd)->_bfd_coff_relocate_section)\
+        (obfd, info, ibfd, o, con, rel, isyms, secs))
+     #define bfd_coff_rtype_to_howto(abfd, sec, rel, h, sym, addendp)\
+       ((coff_backend_info (abfd)->_bfd_coff_rtype_to_howto)\
+        (abfd, sec, rel, h, sym, addendp))
+     #define bfd_coff_adjust_symndx(obfd, info, ibfd, sec, rel, adjustedp)\
+       ((coff_backend_info (abfd)->_bfd_coff_adjust_symndx)\
+        (obfd, info, ibfd, sec, rel, adjustedp))
+     #define bfd_coff_link_add_one_symbol(info, abfd, name, flags, section,\
+                                          value, string, cp, coll, hashp)\
+       ((coff_backend_info (abfd)->_bfd_coff_link_add_one_symbol)\
+        (info, abfd, name, flags, section, value, string, cp, coll, hashp))
+
+     #define bfd_coff_link_output_has_begun(a,p) \
+       ((coff_backend_info (a)->_bfd_coff_link_output_has_begun) (a, p))
+     #define bfd_coff_final_link_postscript(a,p) \
+       ((coff_backend_info (a)->_bfd_coff_final_link_postscript) (a, p))
+
+     #define bfd_coff_have_print_pdata(a) \
+       (coff_backend_info (a)->_bfd_coff_print_pdata)
+     #define bfd_coff_print_pdata(a,p) \
+       ((coff_backend_info (a)->_bfd_coff_print_pdata) (a, p))
+
+     /* Macro: Returns true if the bfd is a PE executable as opposed to a
+        PE object file.  */
+     #define bfd_pei_p(abfd) \
+       (CONST_STRNEQ ((abfd)->xvec->name, "pei-"))
+
+3.3.2.8 Writing relocations
+...........................
+
+To write relocations, the back end steps though the canonical
+relocation table and create an `internal_reloc'. The symbol index to
+use is removed from the `offset' field in the symbol table supplied.
+The address comes directly from the sum of the section base address and
+the relocation offset; the type is dug directly from the howto field.
+Then the `internal_reloc' is swapped into the shape of an
+`external_reloc' and written out to disk.
+
+3.3.2.9 Reading linenumbers
+...........................
+
+Creating the linenumber table is done by reading in the entire coff
+linenumber table, and creating another table for internal use.
+
+   A coff linenumber table is structured so that each function is
+marked as having a line number of 0. Each line within the function is
+an offset from the first line in the function. The base of the line
+number information for the table is stored in the symbol associated
+with the function.
+
+   Note: The PE format uses line number 0 for a flag indicating a new
+source file.
+
+   The information is copied from the external to the internal table,
+and each symbol which marks a function is marked by pointing its...
+
+   How does this work ?
+
+3.3.2.10 Reading relocations
+............................
+
+Coff relocations are easily transformed into the internal BFD form
+(`arelent').
+
+   Reading a coff relocation table is done in the following stages:
+
+   * Read the entire coff relocation table into memory.
+
+   * Process each relocation in turn; first swap it from the external
+     to the internal form.
+
+   * Turn the symbol referenced in the relocation's symbol index into a
+     pointer into the canonical symbol table.  This table is the same
+     as the one returned by a call to `bfd_canonicalize_symtab'. The
+     back end will call that routine and save the result if a
+     canonicalization hasn't been done.
+
+   * The reloc index is turned into a pointer to a howto structure, in
+     a back end specific way. For instance, the 386 and 960 use the
+     `r_type' to directly produce an index into a howto table vector;
+     the 88k subtracts a number from the `r_type' field and creates an
+     addend field.
+
+
+File: bfd.info,  Node: elf,  Next: mmo,  Prev: coff,  Up: BFD back ends
+
+3.4 ELF backends
+================
+
+BFD support for ELF formats is being worked on.  Currently, the best
+supported back ends are for sparc and i386 (running svr4 or Solaris 2).
+
+   Documentation of the internals of the support code still needs to be
+written.  The code is changing quickly enough that we haven't bothered
+yet.
+
+
+File: bfd.info,  Node: mmo,  Prev: elf,  Up: BFD back ends
+
+3.5 mmo backend
+===============
+
+The mmo object format is used exclusively together with Professor
+Donald E. Knuth's educational 64-bit processor MMIX.  The simulator
+`mmix' which is available at
+`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz'
+understands this format.  That package also includes a combined
+assembler and linker called `mmixal'.  The mmo format has no advantages
+feature-wise compared to e.g. ELF.  It is a simple non-relocatable
+object format with no support for archives or debugging information,
+except for symbol value information and line numbers (which is not yet
+implemented in BFD).  See
+`http://www-cs-faculty.stanford.edu/~knuth/mmix.html' for more
+information about MMIX.  The ELF format is used for intermediate object
+files in the BFD implementation.
+
+* Menu:
+
+* File layout::
+* Symbol-table::
+* mmo section mapping::
+
+
+File: bfd.info,  Node: File layout,  Next: Symbol-table,  Prev: mmo,  Up: mmo
+
+3.5.1 File layout
+-----------------
+
+The mmo file contents is not partitioned into named sections as with
+e.g. ELF.  Memory areas is formed by specifying the location of the
+data that follows.  Only the memory area `0x0000...00' to `0x01ff...ff'
+is executable, so it is used for code (and constants) and the area
+`0x2000...00' to `0x20ff...ff' is used for writable data.  *Note mmo
+section mapping::.
+
+   There is provision for specifying "special data" of 65536 different
+types.  We use type 80 (decimal), arbitrarily chosen the same as the
+ELF `e_machine' number for MMIX, filling it with section information
+normally found in ELF objects. *Note mmo section mapping::.
+
+   Contents is entered as 32-bit words, xor:ed over previous contents,
+always zero-initialized.  A word that starts with the byte `0x98' forms
+a command called a `lopcode', where the next byte distinguished between
+the thirteen lopcodes.  The two remaining bytes, called the `Y' and `Z'
+fields, or the `YZ' field (a 16-bit big-endian number), are used for
+various purposes different for each lopcode.  As documented in
+`http://www-cs-faculty.stanford.edu/~knuth/mmixal-intro.ps.gz', the
+lopcodes are:
+
+`lop_quote'
+     0x98000001.  The next word is contents, regardless of whether it
+     starts with 0x98 or not.
+
+`lop_loc'
+     0x9801YYZZ, where `Z' is 1 or 2.  This is a location directive,
+     setting the location for the next data to the next 32-bit word
+     (for Z = 1) or 64-bit word (for Z = 2), plus Y * 2^56.  Normally
+     `Y' is 0 for the text segment and 2 for the data segment.
+
+`lop_skip'
+     0x9802YYZZ.  Increase the current location by `YZ' bytes.
+
+`lop_fixo'
+     0x9803YYZZ, where `Z' is 1 or 2.  Store the current location as 64
+     bits into the location pointed to by the next 32-bit (Z = 1) or
+     64-bit (Z = 2) word, plus Y * 2^56.
+
+`lop_fixr'
+     0x9804YYZZ.  `YZ' is stored into the current location plus 2 - 4 *
+     YZ.
+
+`lop_fixrx'
+     0x980500ZZ.  `Z' is 16 or 24.  A value `L' derived from the
+     following 32-bit word are used in a manner similar to `YZ' in
+     lop_fixr: it is xor:ed into the current location minus 4 * L.  The
+     first byte of the word is 0 or 1.  If it is 1, then L = (LOWEST 24
+     BITS OF WORD) - 2^Z, if 0, then L = (LOWEST 24 BITS OF WORD).
+
+`lop_file'
+     0x9806YYZZ.  `Y' is the file number, `Z' is count of 32-bit words.
+     Set the file number to `Y' and the line counter to 0.  The next Z
+     * 4 bytes contain the file name, padded with zeros if the count is
+     not a multiple of four.  The same `Y' may occur multiple times,
+     but `Z' must be 0 for all but the first occurrence.
+
+`lop_line'
+     0x9807YYZZ.  `YZ' is the line number.  Together with lop_file, it
+     forms the source location for the next 32-bit word.  Note that for
+     each non-lopcode 32-bit word, line numbers are assumed incremented
+     by one.
+
+`lop_spec'
+     0x9808YYZZ.  `YZ' is the type number.  Data until the next lopcode
+     other than lop_quote forms special data of type `YZ'.  *Note mmo
+     section mapping::.
+
+     Other types than 80, (or type 80 with a content that does not
+     parse) is stored in sections named `.MMIX.spec_data.N' where N is
+     the `YZ'-type.  The flags for such a sections say not to allocate
+     or load the data.  The vma is 0.  Contents of multiple occurrences
+     of special data N is concatenated to the data of the previous
+     lop_spec Ns.  The location in data or code at which the lop_spec
+     occurred is lost.
+
+`lop_pre'
+     0x980901ZZ.  The first lopcode in a file.  The `Z' field forms the
+     length of header information in 32-bit words, where the first word
+     tells the time in seconds since `00:00:00 GMT Jan 1 1970'.
+
+`lop_post'
+     0x980a00ZZ.  Z > 32.  This lopcode follows after all
+     content-generating lopcodes in a program.  The `Z' field denotes
+     the value of `rG' at the beginning of the program.  The following
+     256 - Z big-endian 64-bit words are loaded into global registers
+     `$G' ... `$255'.
+
+`lop_stab'
+     0x980b0000.  The next-to-last lopcode in a program.  Must follow
+     immediately after the lop_post lopcode and its data.  After this
+     lopcode follows all symbols in a compressed format (*note
+     Symbol-table::).
+
+`lop_end'
+     0x980cYYZZ.  The last lopcode in a program.  It must follow the
+     lop_stab lopcode and its data.  The `YZ' field contains the number
+     of 32-bit words of symbol table information after the preceding
+     lop_stab lopcode.
+
+   Note that the lopcode "fixups"; `lop_fixr', `lop_fixrx' and
+`lop_fixo' are not generated by BFD, but are handled.  They are
+generated by `mmixal'.
+
+   This trivial one-label, one-instruction file:
+
+      :Main TRAP 1,2,3
+
+   can be represented this way in mmo:
+
+      0x98090101 - lop_pre, one 32-bit word with timestamp.
+      <timestamp>
+      0x98010002 - lop_loc, text segment, using a 64-bit address.
+                   Note that mmixal does not emit this for the file above.
+      0x00000000 - Address, high 32 bits.
+      0x00000000 - Address, low 32 bits.
+      0x98060002 - lop_file, 2 32-bit words for file-name.
+      0x74657374 - "test"
+      0x2e730000 - ".s\0\0"
+      0x98070001 - lop_line, line 1.
+      0x00010203 - TRAP 1,2,3
+      0x980a00ff - lop_post, setting $255 to 0.
+      0x00000000
+      0x00000000
+      0x980b0000 - lop_stab for ":Main" = 0, serial 1.
+      0x203a4040   *Note Symbol-table::.
+      0x10404020
+      0x4d206120
+      0x69016e00
+      0x81000000
+      0x980c0005 - lop_end; symbol table contained five 32-bit words.
+
+
+File: bfd.info,  Node: Symbol-table,  Next: mmo section mapping,  Prev: File layout,  Up: mmo
+
+3.5.2 Symbol table format
+-------------------------
+
+From mmixal.w (or really, the generated mmixal.tex) in
+`http://www-cs-faculty.stanford.edu/~knuth/programs/mmix.tar.gz'):
+"Symbols are stored and retrieved by means of a `ternary search trie',
+following ideas of Bentley and Sedgewick. (See ACM-SIAM Symp. on
+Discrete Algorithms `8' (1997), 360-369; R.Sedgewick, `Algorithms in C'
+(Reading, Mass.  Addison-Wesley, 1998), `15.4'.)  Each trie node stores
+a character, and there are branches to subtries for the cases where a
+given character is less than, equal to, or greater than the character
+in the trie.  There also is a pointer to a symbol table entry if a
+symbol ends at the current node."
+
+   So it's a tree encoded as a stream of bytes.  The stream of bytes
+acts on a single virtual global symbol, adding and removing characters
+and signalling complete symbol points.  Here, we read the stream and
+create symbols at the completion points.
+
+   First, there's a control byte `m'.  If any of the listed bits in `m'
+is nonzero, we execute what stands at the right, in the listed order:
+
+      (MMO3_LEFT)
+      0x40 - Traverse left trie.
+             (Read a new command byte and recurse.)
+
+      (MMO3_SYMBITS)
+      0x2f - Read the next byte as a character and store it in the
+             current character position; increment character position.
+             Test the bits of `m':
+
+             (MMO3_WCHAR)
+             0x80 - The character is 16-bit (so read another byte,
+                    merge into current character.
+
+             (MMO3_TYPEBITS)
+             0xf  - We have a complete symbol; parse the type, value
+                    and serial number and do what should be done
+                    with a symbol.  The type and length information
+                    is in j = (m & 0xf).
+
+                    (MMO3_REGQUAL_BITS)
+                    j == 0xf: A register variable.  The following
+                              byte tells which register.
+                    j <= 8:   An absolute symbol.  Read j bytes as the
+                              big-endian number the symbol equals.
+                              A j = 2 with two zero bytes denotes an
+                              unknown symbol.
+                    j > 8:    As with j <= 8, but add (0x20 << 56)
+                              to the value in the following j - 8
+                              bytes.
+
+                    Then comes the serial number, as a variant of
+                    uleb128, but better named ubeb128:
+                    Read bytes and shift the previous value left 7
+                    (multiply by 128).  Add in the new byte, repeat
+                    until a byte has bit 7 set.  The serial number
+                    is the computed value minus 128.
+
+             (MMO3_MIDDLE)
+             0x20 - Traverse middle trie.  (Read a new command byte
+                    and recurse.)  Decrement character position.
+
+      (MMO3_RIGHT)
+      0x10 - Traverse right trie.  (Read a new command byte and
+             recurse.)
+
+   Let's look again at the `lop_stab' for the trivial file (*note File
+layout::).
+
+      0x980b0000 - lop_stab for ":Main" = 0, serial 1.
+      0x203a4040
+      0x10404020
+      0x4d206120
+      0x69016e00
+      0x81000000
+
+   This forms the trivial trie (note that the path between ":" and "M"
+is redundant):
+
+      203a     ":"
+      40       /
+      40      /
+      10      \
+      40      /
+      40     /
+      204d  "M"
+      2061  "a"
+      2069  "i"
+      016e  "n" is the last character in a full symbol, and
+            with a value represented in one byte.
+      00    The value is 0.
+      81    The serial number is 1.
+
+
+File: bfd.info,  Node: mmo section mapping,  Prev: Symbol-table,  Up: mmo
+
+3.5.3 mmo section mapping
+-------------------------
+
+The implementation in BFD uses special data type 80 (decimal) to
+encapsulate and describe named sections, containing e.g. debug
+information.  If needed, any datum in the encapsulation will be quoted
+using lop_quote.  First comes a 32-bit word holding the number of
+32-bit words containing the zero-terminated zero-padded segment name.
+After the name there's a 32-bit word holding flags describing the
+section type.  Then comes a 64-bit big-endian word with the section
+length (in bytes), then another with the section start address.
+Depending on the type of section, the contents might follow,
+zero-padded to 32-bit boundary.  For a loadable section (such as data
+or code), the contents might follow at some later point, not
+necessarily immediately, as a lop_loc with the same start address as in
+the section description, followed by the contents.  This in effect
+forms a descriptor that must be emitted before the actual contents.
+Sections described this way must not overlap.
+
+   For areas that don't have such descriptors, synthetic sections are
+formed by BFD.  Consecutive contents in the two memory areas
+`0x0000...00' to `0x01ff...ff' and `0x2000...00' to `0x20ff...ff' are
+entered in sections named `.text' and `.data' respectively.  If an area
+is not otherwise described, but would together with a neighboring lower
+area be less than `0x40000000' bytes long, it is joined with the lower
+area and the gap is zero-filled.  For other cases, a new section is
+formed, named `.MMIX.sec.N'.  Here, N is a number, a running count
+through the mmo file, starting at 0.
+
+   A loadable section specified as:
+
+      .section secname,"ax"
+      TETRA 1,2,3,4,-1,-2009
+      BYTE 80
+
+   and linked to address `0x4', is represented by the sequence:
+
+      0x98080050 - lop_spec 80
+      0x00000002 - two 32-bit words for the section name
+      0x7365636e - "secn"
+      0x616d6500 - "ame\0"
+      0x00000033 - flags CODE, READONLY, LOAD, ALLOC
+      0x00000000 - high 32 bits of section length
+      0x0000001c - section length is 28 bytes; 6 * 4 + 1 + alignment to 32 bits
+      0x00000000 - high 32 bits of section address
+      0x00000004 - section address is 4
+      0x98010002 - 64 bits with address of following data
+      0x00000000 - high 32 bits of address
+      0x00000004 - low 32 bits: data starts at address 4
+      0x00000001 - 1
+      0x00000002 - 2
+      0x00000003 - 3
+      0x00000004 - 4
+      0xffffffff - -1
+      0xfffff827 - -2009
+      0x50000000 - 80 as a byte, padded with zeros.
+
+   Note that the lop_spec wrapping does not include the section
+contents.  Compare this to a non-loaded section specified as:
+
+      .section thirdsec
+      TETRA 200001,100002
+      BYTE 38,40
+
+   This, when linked to address `0x200000000000001c', is represented by:
+
+      0x98080050 - lop_spec 80
+      0x00000002 - two 32-bit words for the section name
+      0x7365636e - "thir"
+      0x616d6500 - "dsec"
+      0x00000010 - flag READONLY
+      0x00000000 - high 32 bits of section length
+      0x0000000c - section length is 12 bytes; 2 * 4 + 2 + alignment to 32 bits
+      0x20000000 - high 32 bits of address
+      0x0000001c - low 32 bits of address 0x200000000000001c
+      0x00030d41 - 200001
+      0x000186a2 - 100002
+      0x26280000 - 38, 40 as bytes, padded with zeros
+
+   For the latter example, the section contents must not be loaded in
+memory, and is therefore specified as part of the special data.  The
+address is usually unimportant but might provide information for e.g.
+the DWARF 2 debugging format.
+
+
+File: bfd.info,  Node: GNU Free Documentation License,  Next: BFD Index,  Prev: BFD back ends,  Up: Top
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
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+
+  0. PREAMBLE
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+  8. TRANSLATION
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+     Translation is considered a kind of modification, so you may
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+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
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+     and will automatically terminate your rights under this License.
+
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+     violation by some reasonable means, this is the first time you have
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+
+     Termination of your rights under this section does not terminate
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+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
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+     Each version of the License is given a distinguishing version
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+     have the option of following the terms and conditions either of
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+     published (not as a draft) by the Free Software Foundation.  If
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+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
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+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
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+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
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+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
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+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
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+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: bfd.info,  Node: BFD Index,  Prev: GNU Free Documentation License,  Up: Top
+
+BFD Index
+*********
+
+[index]
+* Menu:
+
+* _bfd_final_link_relocate:              Relocating the section contents.
+                                                             (line   22)
+* _bfd_generic_link_add_archive_symbols: Adding symbols from an archive.
+                                                             (line   12)
+* _bfd_generic_link_add_one_symbol:      Adding symbols from an object file.
+                                                             (line   19)
+* _bfd_generic_make_empty_symbol:        symbol handling functions.
+                                                             (line   92)
+* _bfd_link_add_symbols in target vector: Adding Symbols to the Hash Table.
+                                                             (line    6)
+* _bfd_link_final_link in target vector: Performing the Final Link.
+                                                             (line    6)
+* _bfd_link_hash_table_create in target vector: Creating a Linker Hash Table.
+                                                             (line    6)
+* _bfd_relocate_contents:                Relocating the section contents.
+                                                             (line   22)
+* aout_SIZE_machine_type:                aout.               (line  147)
+* aout_SIZE_mkobject:                    aout.               (line  139)
+* aout_SIZE_new_section_hook:            aout.               (line  177)
+* aout_SIZE_set_arch_mach:               aout.               (line  164)
+* aout_SIZE_some_aout_object_p:          aout.               (line  125)
+* aout_SIZE_swap_exec_header_in:         aout.               (line  101)
+* aout_SIZE_swap_exec_header_out:        aout.               (line  113)
+* arelent_chain:                         typedef arelent.    (line  339)
+* BFD:                                   Overview.           (line    6)
+* BFD canonical format:                  Canonical format.   (line   11)
+* bfd_alloc:                             Opening and Closing.
+                                                             (line  210)
+* bfd_alloc2:                            Opening and Closing.
+                                                             (line  219)
+* bfd_alt_mach_code:                     BFD front end.      (line  689)
+* bfd_arch_bits_per_address:             Architectures.      (line  517)
+* bfd_arch_bits_per_byte:                Architectures.      (line  509)
+* bfd_arch_get_compatible:               Architectures.      (line  452)
+* bfd_arch_list:                         Architectures.      (line  443)
+* bfd_arch_mach_octets_per_byte:         Architectures.      (line  586)
+* BFD_ARELOC_BFIN_ADD:                   howto manager.      (line 1005)
+* BFD_ARELOC_BFIN_ADDR:                  howto manager.      (line 1056)
+* BFD_ARELOC_BFIN_AND:                   howto manager.      (line 1026)
+* BFD_ARELOC_BFIN_COMP:                  howto manager.      (line 1047)
+* BFD_ARELOC_BFIN_CONST:                 howto manager.      (line 1002)
+* BFD_ARELOC_BFIN_DIV:                   howto manager.      (line 1014)
+* BFD_ARELOC_BFIN_HWPAGE:                howto manager.      (line 1053)
+* BFD_ARELOC_BFIN_LAND:                  howto manager.      (line 1035)
+* BFD_ARELOC_BFIN_LEN:                   howto manager.      (line 1041)
+* BFD_ARELOC_BFIN_LOR:                   howto manager.      (line 1038)
+* BFD_ARELOC_BFIN_LSHIFT:                howto manager.      (line 1020)
+* BFD_ARELOC_BFIN_MOD:                   howto manager.      (line 1017)
+* BFD_ARELOC_BFIN_MULT:                  howto manager.      (line 1011)
+* BFD_ARELOC_BFIN_NEG:                   howto manager.      (line 1044)
+* BFD_ARELOC_BFIN_OR:                    howto manager.      (line 1029)
+* BFD_ARELOC_BFIN_PAGE:                  howto manager.      (line 1050)
+* BFD_ARELOC_BFIN_PUSH:                  howto manager.      (line  999)
+* BFD_ARELOC_BFIN_RSHIFT:                howto manager.      (line 1023)
+* BFD_ARELOC_BFIN_SUB:                   howto manager.      (line 1008)
+* BFD_ARELOC_BFIN_XOR:                   howto manager.      (line 1032)
+* bfd_cache_close:                       File Caching.       (line   26)
+* bfd_cache_close_all:                   File Caching.       (line   39)
+* bfd_cache_init:                        File Caching.       (line   18)
+* bfd_calc_gnu_debuglink_crc32:          Opening and Closing.
+                                                             (line  246)
+* bfd_canonicalize_reloc:                BFD front end.      (line  408)
+* bfd_canonicalize_symtab:               symbol handling functions.
+                                                             (line   50)
+* bfd_check_format:                      Formats.            (line   21)
+* bfd_check_format_matches:              Formats.            (line   52)
+* bfd_check_overflow:                    typedef arelent.    (line  351)
+* bfd_close:                             Opening and Closing.
+                                                             (line  135)
+* bfd_close_all_done:                    Opening and Closing.
+                                                             (line  153)
+* bfd_coff_backend_data:                 coff.               (line  304)
+* bfd_copy_private_bfd_data:             BFD front end.      (line  547)
+* bfd_copy_private_header_data:          BFD front end.      (line  529)
+* bfd_copy_private_section_data:         section prototypes. (line  255)
+* bfd_copy_private_symbol_data:          symbol handling functions.
+                                                             (line  140)
+* bfd_core_file_failing_command:         Core Files.         (line   12)
+* bfd_core_file_failing_signal:          Core Files.         (line   21)
+* bfd_create:                            Opening and Closing.
+                                                             (line  172)
+* bfd_create_gnu_debuglink_section:      Opening and Closing.
+                                                             (line  312)
+* bfd_decode_symclass:                   symbol handling functions.
+                                                             (line  111)
+* bfd_default_arch_struct:               Architectures.      (line  464)
+* bfd_default_compatible:                Architectures.      (line  526)
+* bfd_default_reloc_type_lookup:         howto manager.      (line 2247)
+* bfd_default_scan:                      Architectures.      (line  535)
+* bfd_default_set_arch_mach:             Architectures.      (line  482)
+* bfd_demangle:                          BFD front end.      (line  787)
+* bfd_emul_get_commonpagesize:           BFD front end.      (line  767)
+* bfd_emul_get_maxpagesize:              BFD front end.      (line  747)
+* bfd_emul_set_commonpagesize:           BFD front end.      (line  778)
+* bfd_emul_set_maxpagesize:              BFD front end.      (line  758)
+* bfd_errmsg:                            BFD front end.      (line  333)
+* bfd_fdopenr:                           Opening and Closing.
+                                                             (line   46)
+* bfd_fill_in_gnu_debuglink_section:     Opening and Closing.
+                                                             (line  326)
+* bfd_find_target:                       bfd_target.         (line  445)
+* bfd_find_version_for_sym:              Writing the symbol table.
+                                                             (line   80)
+* bfd_follow_gnu_debuglink:              Opening and Closing.
+                                                             (line  291)
+* bfd_fopen:                             Opening and Closing.
+                                                             (line    9)
+* bfd_format_string:                     Formats.            (line   79)
+* bfd_generic_define_common_symbol:      Writing the symbol table.
+                                                             (line   67)
+* bfd_generic_discard_group:             section prototypes. (line  281)
+* bfd_generic_gc_sections:               howto manager.      (line 2278)
+* bfd_generic_get_relocated_section_contents: howto manager. (line 2298)
+* bfd_generic_is_group_section:          section prototypes. (line  273)
+* bfd_generic_merge_sections:            howto manager.      (line 2288)
+* bfd_generic_relax_section:             howto manager.      (line 2265)
+* bfd_get_arch:                          Architectures.      (line  493)
+* bfd_get_arch_info:                     Architectures.      (line  545)
+* bfd_get_arch_size:                     BFD front end.      (line  452)
+* bfd_get_error:                         BFD front end.      (line  314)
+* bfd_get_error_handler:                 BFD front end.      (line  384)
+* bfd_get_gp_size:                       BFD front end.      (line  493)
+* bfd_get_mach:                          Architectures.      (line  501)
+* bfd_get_mtime:                         BFD front end.      (line  831)
+* bfd_get_next_mapent:                   Archives.           (line   52)
+* bfd_get_reloc_code_name:               howto manager.      (line 2256)
+* bfd_get_reloc_size:                    typedef arelent.    (line  330)
+* bfd_get_reloc_upper_bound:             BFD front end.      (line  398)
+* bfd_get_section_by_name:               section prototypes. (line   17)
+* bfd_get_section_by_name_if:            section prototypes. (line   31)
+* bfd_get_section_contents:              section prototypes. (line  228)
+* bfd_get_sign_extend_vma:               BFD front end.      (line  465)
+* bfd_get_size <1>:                      Internal.           (line   25)
+* bfd_get_size:                          BFD front end.      (line  840)
+* bfd_get_symtab_upper_bound:            symbol handling functions.
+                                                             (line    6)
+* bfd_get_unique_section_name:           section prototypes. (line   50)
+* bfd_h_put_size:                        Internal.           (line   97)
+* bfd_hash_allocate:                     Creating and Freeing a Hash Table.
+                                                             (line   17)
+* bfd_hash_lookup:                       Looking Up or Entering a String.
+                                                             (line    6)
+* bfd_hash_newfunc:                      Creating and Freeing a Hash Table.
+                                                             (line   12)
+* bfd_hash_set_default_size:             Creating and Freeing a Hash Table.
+                                                             (line   25)
+* bfd_hash_table_free:                   Creating and Freeing a Hash Table.
+                                                             (line   21)
+* bfd_hash_table_init:                   Creating and Freeing a Hash Table.
+                                                             (line    6)
+* bfd_hash_table_init_n:                 Creating and Freeing a Hash Table.
+                                                             (line    6)
+* bfd_hash_traverse:                     Traversing a Hash Table.
+                                                             (line    6)
+* bfd_init:                              Initialization.     (line   11)
+* bfd_install_relocation:                typedef arelent.    (line  392)
+* bfd_is_local_label:                    symbol handling functions.
+                                                             (line   17)
+* bfd_is_local_label_name:               symbol handling functions.
+                                                             (line   26)
+* bfd_is_target_special_symbol:          symbol handling functions.
+                                                             (line   38)
+* bfd_is_undefined_symclass:             symbol handling functions.
+                                                             (line  120)
+* bfd_link_split_section:                Writing the symbol table.
+                                                             (line   44)
+* bfd_log2:                              Internal.           (line  164)
+* bfd_lookup_arch:                       Architectures.      (line  553)
+* bfd_make_debug_symbol:                 symbol handling functions.
+                                                             (line  102)
+* bfd_make_empty_symbol:                 symbol handling functions.
+                                                             (line   78)
+* bfd_make_readable:                     Opening and Closing.
+                                                             (line  196)
+* bfd_make_section:                      section prototypes. (line  129)
+* bfd_make_section_anyway:               section prototypes. (line  100)
+* bfd_make_section_anyway_with_flags:    section prototypes. (line   82)
+* bfd_make_section_old_way:              section prototypes. (line   62)
+* bfd_make_section_with_flags:           section prototypes. (line  116)
+* bfd_make_writable:                     Opening and Closing.
+                                                             (line  182)
+* bfd_malloc_and_get_section:            section prototypes. (line  245)
+* bfd_map_over_sections:                 section prototypes. (line  155)
+* bfd_merge_private_bfd_data:            BFD front end.      (line  563)
+* bfd_mmap:                              BFD front end.      (line  869)
+* bfd_octets_per_byte:                   Architectures.      (line  576)
+* bfd_open_file:                         File Caching.       (line   52)
+* bfd_openr:                             Opening and Closing.
+                                                             (line   30)
+* bfd_openr_iovec:                       Opening and Closing.
+                                                             (line   76)
+* bfd_openr_next_archived_file:          Archives.           (line   78)
+* bfd_openstreamr:                       Opening and Closing.
+                                                             (line   67)
+* bfd_openw:                             Opening and Closing.
+                                                             (line  123)
+* bfd_perform_relocation:                typedef arelent.    (line  367)
+* bfd_perror:                            BFD front end.      (line  342)
+* bfd_preserve_finish:                   BFD front end.      (line  737)
+* bfd_preserve_restore:                  BFD front end.      (line  727)
+* bfd_preserve_save:                     BFD front end.      (line  711)
+* bfd_print_symbol_vandf:                symbol handling functions.
+                                                             (line   70)
+* bfd_printable_arch_mach:               Architectures.      (line  564)
+* bfd_printable_name:                    Architectures.      (line  424)
+* bfd_put_size:                          Internal.           (line   22)
+* BFD_RELOC_12_PCREL:                    howto manager.      (line   39)
+* BFD_RELOC_14:                          howto manager.      (line   31)
+* BFD_RELOC_16:                          howto manager.      (line   30)
+* BFD_RELOC_16_BASEREL:                  howto manager.      (line   95)
+* BFD_RELOC_16_GOT_PCREL:                howto manager.      (line   52)
+* BFD_RELOC_16_GOTOFF:                   howto manager.      (line   55)
+* BFD_RELOC_16_PCREL:                    howto manager.      (line   38)
+* BFD_RELOC_16_PCREL_S2:                 howto manager.      (line  107)
+* BFD_RELOC_16_PLT_PCREL:                howto manager.      (line   63)
+* BFD_RELOC_16_PLTOFF:                   howto manager.      (line   67)
+* BFD_RELOC_16C_ABS20:                   howto manager.      (line 1838)
+* BFD_RELOC_16C_ABS20_C:                 howto manager.      (line 1839)
+* BFD_RELOC_16C_ABS24:                   howto manager.      (line 1840)
+* BFD_RELOC_16C_ABS24_C:                 howto manager.      (line 1841)
+* BFD_RELOC_16C_DISP04:                  howto manager.      (line 1818)
+* BFD_RELOC_16C_DISP04_C:                howto manager.      (line 1819)
+* BFD_RELOC_16C_DISP08:                  howto manager.      (line 1820)
+* BFD_RELOC_16C_DISP08_C:                howto manager.      (line 1821)
+* BFD_RELOC_16C_DISP16:                  howto manager.      (line 1822)
+* BFD_RELOC_16C_DISP16_C:                howto manager.      (line 1823)
+* BFD_RELOC_16C_DISP24:                  howto manager.      (line 1824)
+* BFD_RELOC_16C_DISP24_C:                howto manager.      (line 1825)
+* BFD_RELOC_16C_DISP24a:                 howto manager.      (line 1826)
+* BFD_RELOC_16C_DISP24a_C:               howto manager.      (line 1827)
+* BFD_RELOC_16C_IMM04:                   howto manager.      (line 1842)
+* BFD_RELOC_16C_IMM04_C:                 howto manager.      (line 1843)
+* BFD_RELOC_16C_IMM16:                   howto manager.      (line 1844)
+* BFD_RELOC_16C_IMM16_C:                 howto manager.      (line 1845)
+* BFD_RELOC_16C_IMM20:                   howto manager.      (line 1846)
+* BFD_RELOC_16C_IMM20_C:                 howto manager.      (line 1847)
+* BFD_RELOC_16C_IMM24:                   howto manager.      (line 1848)
+* BFD_RELOC_16C_IMM24_C:                 howto manager.      (line 1849)
+* BFD_RELOC_16C_IMM32:                   howto manager.      (line 1850)
+* BFD_RELOC_16C_IMM32_C:                 howto manager.      (line 1851)
+* BFD_RELOC_16C_NUM08:                   howto manager.      (line 1812)
+* BFD_RELOC_16C_NUM08_C:                 howto manager.      (line 1813)
+* BFD_RELOC_16C_NUM16:                   howto manager.      (line 1814)
+* BFD_RELOC_16C_NUM16_C:                 howto manager.      (line 1815)
+* BFD_RELOC_16C_NUM32:                   howto manager.      (line 1816)
+* BFD_RELOC_16C_NUM32_C:                 howto manager.      (line 1817)
+* BFD_RELOC_16C_REG04:                   howto manager.      (line 1828)
+* BFD_RELOC_16C_REG04_C:                 howto manager.      (line 1829)
+* BFD_RELOC_16C_REG04a:                  howto manager.      (line 1830)
+* BFD_RELOC_16C_REG04a_C:                howto manager.      (line 1831)
+* BFD_RELOC_16C_REG14:                   howto manager.      (line 1832)
+* BFD_RELOC_16C_REG14_C:                 howto manager.      (line 1833)
+* BFD_RELOC_16C_REG16:                   howto manager.      (line 1834)
+* BFD_RELOC_16C_REG16_C:                 howto manager.      (line 1835)
+* BFD_RELOC_16C_REG20:                   howto manager.      (line 1836)
+* BFD_RELOC_16C_REG20_C:                 howto manager.      (line 1837)
+* BFD_RELOC_23_PCREL_S2:                 howto manager.      (line  108)
+* BFD_RELOC_24:                          howto manager.      (line   29)
+* BFD_RELOC_24_PCREL:                    howto manager.      (line   37)
+* BFD_RELOC_24_PLT_PCREL:                howto manager.      (line   62)
+* BFD_RELOC_26:                          howto manager.      (line   28)
+* BFD_RELOC_32:                          howto manager.      (line   27)
+* BFD_RELOC_32_BASEREL:                  howto manager.      (line   94)
+* BFD_RELOC_32_GOT_PCREL:                howto manager.      (line   51)
+* BFD_RELOC_32_GOTOFF:                   howto manager.      (line   54)
+* BFD_RELOC_32_PCREL:                    howto manager.      (line   36)
+* BFD_RELOC_32_PCREL_S2:                 howto manager.      (line  106)
+* BFD_RELOC_32_PLT_PCREL:                howto manager.      (line   61)
+* BFD_RELOC_32_PLTOFF:                   howto manager.      (line   66)
+* BFD_RELOC_32_SECREL:                   howto manager.      (line   48)
+* BFD_RELOC_386_COPY:                    howto manager.      (line  505)
+* BFD_RELOC_386_GLOB_DAT:                howto manager.      (line  506)
+* BFD_RELOC_386_GOT32:                   howto manager.      (line  503)
+* BFD_RELOC_386_GOTOFF:                  howto manager.      (line  509)
+* BFD_RELOC_386_GOTPC:                   howto manager.      (line  510)
+* BFD_RELOC_386_IRELATIVE:               howto manager.      (line  526)
+* BFD_RELOC_386_JUMP_SLOT:               howto manager.      (line  507)
+* BFD_RELOC_386_PLT32:                   howto manager.      (line  504)
+* BFD_RELOC_386_RELATIVE:                howto manager.      (line  508)
+* BFD_RELOC_386_TLS_DESC:                howto manager.      (line  525)
+* BFD_RELOC_386_TLS_DESC_CALL:           howto manager.      (line  524)
+* BFD_RELOC_386_TLS_DTPMOD32:            howto manager.      (line  520)
+* BFD_RELOC_386_TLS_DTPOFF32:            howto manager.      (line  521)
+* BFD_RELOC_386_TLS_GD:                  howto manager.      (line  515)
+* BFD_RELOC_386_TLS_GOTDESC:             howto manager.      (line  523)
+* BFD_RELOC_386_TLS_GOTIE:               howto manager.      (line  513)
+* BFD_RELOC_386_TLS_IE:                  howto manager.      (line  512)
+* BFD_RELOC_386_TLS_IE_32:               howto manager.      (line  518)
+* BFD_RELOC_386_TLS_LDM:                 howto manager.      (line  516)
+* BFD_RELOC_386_TLS_LDO_32:              howto manager.      (line  517)
+* BFD_RELOC_386_TLS_LE:                  howto manager.      (line  514)
+* BFD_RELOC_386_TLS_LE_32:               howto manager.      (line  519)
+* BFD_RELOC_386_TLS_TPOFF:               howto manager.      (line  511)
+* BFD_RELOC_386_TLS_TPOFF32:             howto manager.      (line  522)
+* BFD_RELOC_390_12:                      howto manager.      (line 1498)
+* BFD_RELOC_390_20:                      howto manager.      (line 1598)
+* BFD_RELOC_390_COPY:                    howto manager.      (line 1507)
+* BFD_RELOC_390_GLOB_DAT:                howto manager.      (line 1510)
+* BFD_RELOC_390_GOT12:                   howto manager.      (line 1501)
+* BFD_RELOC_390_GOT16:                   howto manager.      (line 1522)
+* BFD_RELOC_390_GOT20:                   howto manager.      (line 1599)
+* BFD_RELOC_390_GOT64:                   howto manager.      (line 1540)
+* BFD_RELOC_390_GOTENT:                  howto manager.      (line 1546)
+* BFD_RELOC_390_GOTOFF64:                howto manager.      (line 1549)
+* BFD_RELOC_390_GOTPC:                   howto manager.      (line 1519)
+* BFD_RELOC_390_GOTPCDBL:                howto manager.      (line 1537)
+* BFD_RELOC_390_GOTPLT12:                howto manager.      (line 1552)
+* BFD_RELOC_390_GOTPLT16:                howto manager.      (line 1555)
+* BFD_RELOC_390_GOTPLT20:                howto manager.      (line 1600)
+* BFD_RELOC_390_GOTPLT32:                howto manager.      (line 1558)
+* BFD_RELOC_390_GOTPLT64:                howto manager.      (line 1561)
+* BFD_RELOC_390_GOTPLTENT:               howto manager.      (line 1564)
+* BFD_RELOC_390_JMP_SLOT:                howto manager.      (line 1513)
+* BFD_RELOC_390_PC16DBL:                 howto manager.      (line 1525)
+* BFD_RELOC_390_PC32DBL:                 howto manager.      (line 1531)
+* BFD_RELOC_390_PLT16DBL:                howto manager.      (line 1528)
+* BFD_RELOC_390_PLT32:                   howto manager.      (line 1504)
+* BFD_RELOC_390_PLT32DBL:                howto manager.      (line 1534)
+* BFD_RELOC_390_PLT64:                   howto manager.      (line 1543)
+* BFD_RELOC_390_PLTOFF16:                howto manager.      (line 1567)
+* BFD_RELOC_390_PLTOFF32:                howto manager.      (line 1570)
+* BFD_RELOC_390_PLTOFF64:                howto manager.      (line 1573)
+* BFD_RELOC_390_RELATIVE:                howto manager.      (line 1516)
+* BFD_RELOC_390_TLS_DTPMOD:              howto manager.      (line 1593)
+* BFD_RELOC_390_TLS_DTPOFF:              howto manager.      (line 1594)
+* BFD_RELOC_390_TLS_GD32:                howto manager.      (line 1579)
+* BFD_RELOC_390_TLS_GD64:                howto manager.      (line 1580)
+* BFD_RELOC_390_TLS_GDCALL:              howto manager.      (line 1577)
+* BFD_RELOC_390_TLS_GOTIE12:             howto manager.      (line 1581)
+* BFD_RELOC_390_TLS_GOTIE20:             howto manager.      (line 1601)
+* BFD_RELOC_390_TLS_GOTIE32:             howto manager.      (line 1582)
+* BFD_RELOC_390_TLS_GOTIE64:             howto manager.      (line 1583)
+* BFD_RELOC_390_TLS_IE32:                howto manager.      (line 1586)
+* BFD_RELOC_390_TLS_IE64:                howto manager.      (line 1587)
+* BFD_RELOC_390_TLS_IEENT:               howto manager.      (line 1588)
+* BFD_RELOC_390_TLS_LDCALL:              howto manager.      (line 1578)
+* BFD_RELOC_390_TLS_LDM32:               howto manager.      (line 1584)
+* BFD_RELOC_390_TLS_LDM64:               howto manager.      (line 1585)
+* BFD_RELOC_390_TLS_LDO32:               howto manager.      (line 1591)
+* BFD_RELOC_390_TLS_LDO64:               howto manager.      (line 1592)
+* BFD_RELOC_390_TLS_LE32:                howto manager.      (line 1589)
+* BFD_RELOC_390_TLS_LE64:                howto manager.      (line 1590)
+* BFD_RELOC_390_TLS_LOAD:                howto manager.      (line 1576)
+* BFD_RELOC_390_TLS_TPOFF:               howto manager.      (line 1595)
+* BFD_RELOC_64:                          howto manager.      (line   26)
+* BFD_RELOC_64_PCREL:                    howto manager.      (line   35)
+* BFD_RELOC_64_PLT_PCREL:                howto manager.      (line   60)
+* BFD_RELOC_64_PLTOFF:                   howto manager.      (line   65)
+* BFD_RELOC_68K_GLOB_DAT:                howto manager.      (line   74)
+* BFD_RELOC_68K_JMP_SLOT:                howto manager.      (line   75)
+* BFD_RELOC_68K_RELATIVE:                howto manager.      (line   76)
+* BFD_RELOC_68K_TLS_GD16:                howto manager.      (line   78)
+* BFD_RELOC_68K_TLS_GD32:                howto manager.      (line   77)
+* BFD_RELOC_68K_TLS_GD8:                 howto manager.      (line   79)
+* BFD_RELOC_68K_TLS_IE16:                howto manager.      (line   87)
+* BFD_RELOC_68K_TLS_IE32:                howto manager.      (line   86)
+* BFD_RELOC_68K_TLS_IE8:                 howto manager.      (line   88)
+* BFD_RELOC_68K_TLS_LDM16:               howto manager.      (line   81)
+* BFD_RELOC_68K_TLS_LDM32:               howto manager.      (line   80)
+* BFD_RELOC_68K_TLS_LDM8:                howto manager.      (line   82)
+* BFD_RELOC_68K_TLS_LDO16:               howto manager.      (line   84)
+* BFD_RELOC_68K_TLS_LDO32:               howto manager.      (line   83)
+* BFD_RELOC_68K_TLS_LDO8:                howto manager.      (line   85)
+* BFD_RELOC_68K_TLS_LE16:                howto manager.      (line   90)
+* BFD_RELOC_68K_TLS_LE32:                howto manager.      (line   89)
+* BFD_RELOC_68K_TLS_LE8:                 howto manager.      (line   91)
+* BFD_RELOC_8:                           howto manager.      (line   32)
+* BFD_RELOC_860_COPY:                    howto manager.      (line 1966)
+* BFD_RELOC_860_GLOB_DAT:                howto manager.      (line 1967)
+* BFD_RELOC_860_HAGOT:                   howto manager.      (line 1992)
+* BFD_RELOC_860_HAGOTOFF:                howto manager.      (line 1993)
+* BFD_RELOC_860_HAPC:                    howto manager.      (line 1994)
+* BFD_RELOC_860_HIGH:                    howto manager.      (line 1995)
+* BFD_RELOC_860_HIGHADJ:                 howto manager.      (line 1991)
+* BFD_RELOC_860_HIGOT:                   howto manager.      (line 1996)
+* BFD_RELOC_860_HIGOTOFF:                howto manager.      (line 1997)
+* BFD_RELOC_860_JUMP_SLOT:               howto manager.      (line 1968)
+* BFD_RELOC_860_LOGOT0:                  howto manager.      (line 1980)
+* BFD_RELOC_860_LOGOT1:                  howto manager.      (line 1982)
+* BFD_RELOC_860_LOGOTOFF0:               howto manager.      (line 1984)
+* BFD_RELOC_860_LOGOTOFF1:               howto manager.      (line 1986)
+* BFD_RELOC_860_LOGOTOFF2:               howto manager.      (line 1988)
+* BFD_RELOC_860_LOGOTOFF3:               howto manager.      (line 1989)
+* BFD_RELOC_860_LOPC:                    howto manager.      (line 1990)
+* BFD_RELOC_860_LOW0:                    howto manager.      (line 1973)
+* BFD_RELOC_860_LOW1:                    howto manager.      (line 1975)
+* BFD_RELOC_860_LOW2:                    howto manager.      (line 1977)
+* BFD_RELOC_860_LOW3:                    howto manager.      (line 1979)
+* BFD_RELOC_860_PC16:                    howto manager.      (line 1972)
+* BFD_RELOC_860_PC26:                    howto manager.      (line 1970)
+* BFD_RELOC_860_PLT26:                   howto manager.      (line 1971)
+* BFD_RELOC_860_RELATIVE:                howto manager.      (line 1969)
+* BFD_RELOC_860_SPGOT0:                  howto manager.      (line 1981)
+* BFD_RELOC_860_SPGOT1:                  howto manager.      (line 1983)
+* BFD_RELOC_860_SPGOTOFF0:               howto manager.      (line 1985)
+* BFD_RELOC_860_SPGOTOFF1:               howto manager.      (line 1987)
+* BFD_RELOC_860_SPLIT0:                  howto manager.      (line 1974)
+* BFD_RELOC_860_SPLIT1:                  howto manager.      (line 1976)
+* BFD_RELOC_860_SPLIT2:                  howto manager.      (line 1978)
+* BFD_RELOC_8_BASEREL:                   howto manager.      (line   99)
+* BFD_RELOC_8_FFnn:                      howto manager.      (line  103)
+* BFD_RELOC_8_GOT_PCREL:                 howto manager.      (line   53)
+* BFD_RELOC_8_GOTOFF:                    howto manager.      (line   59)
+* BFD_RELOC_8_PCREL:                     howto manager.      (line   40)
+* BFD_RELOC_8_PLT_PCREL:                 howto manager.      (line   64)
+* BFD_RELOC_8_PLTOFF:                    howto manager.      (line   71)
+* BFD_RELOC_ALPHA_BOH:                   howto manager.      (line  313)
+* BFD_RELOC_ALPHA_BRSGP:                 howto manager.      (line  296)
+* BFD_RELOC_ALPHA_BSR:                   howto manager.      (line  305)
+* BFD_RELOC_ALPHA_CODEADDR:              howto manager.      (line  287)
+* BFD_RELOC_ALPHA_DTPMOD64:              howto manager.      (line  319)
+* BFD_RELOC_ALPHA_DTPREL16:              howto manager.      (line  324)
+* BFD_RELOC_ALPHA_DTPREL64:              howto manager.      (line  321)
+* BFD_RELOC_ALPHA_DTPREL_HI16:           howto manager.      (line  322)
+* BFD_RELOC_ALPHA_DTPREL_LO16:           howto manager.      (line  323)
+* BFD_RELOC_ALPHA_ELF_LITERAL:           howto manager.      (line  252)
+* BFD_RELOC_ALPHA_GOTDTPREL16:           howto manager.      (line  320)
+* BFD_RELOC_ALPHA_GOTTPREL16:            howto manager.      (line  325)
+* BFD_RELOC_ALPHA_GPDISP:                howto manager.      (line  246)
+* BFD_RELOC_ALPHA_GPDISP_HI16:           howto manager.      (line  232)
+* BFD_RELOC_ALPHA_GPDISP_LO16:           howto manager.      (line  240)
+* BFD_RELOC_ALPHA_GPREL_HI16:            howto manager.      (line  291)
+* BFD_RELOC_ALPHA_GPREL_LO16:            howto manager.      (line  292)
+* BFD_RELOC_ALPHA_HINT:                  howto manager.      (line  278)
+* BFD_RELOC_ALPHA_LDA:                   howto manager.      (line  309)
+* BFD_RELOC_ALPHA_LINKAGE:               howto manager.      (line  283)
+* BFD_RELOC_ALPHA_LITERAL:               howto manager.      (line  251)
+* BFD_RELOC_ALPHA_LITUSE:                howto manager.      (line  253)
+* BFD_RELOC_ALPHA_NOP:                   howto manager.      (line  301)
+* BFD_RELOC_ALPHA_TLSGD:                 howto manager.      (line  317)
+* BFD_RELOC_ALPHA_TLSLDM:                howto manager.      (line  318)
+* BFD_RELOC_ALPHA_TPREL16:               howto manager.      (line  329)
+* BFD_RELOC_ALPHA_TPREL64:               howto manager.      (line  326)
+* BFD_RELOC_ALPHA_TPREL_HI16:            howto manager.      (line  327)
+* BFD_RELOC_ALPHA_TPREL_LO16:            howto manager.      (line  328)
+* BFD_RELOC_ARC_B22_PCREL:               howto manager.      (line  934)
+* BFD_RELOC_ARC_B26:                     howto manager.      (line  939)
+* BFD_RELOC_ARM_ADR_IMM:                 howto manager.      (line  827)
+* BFD_RELOC_ARM_ADRL_IMMEDIATE:          howto manager.      (line  814)
+* BFD_RELOC_ARM_ALU_PC_G0:               howto manager.      (line  781)
+* BFD_RELOC_ARM_ALU_PC_G0_NC:            howto manager.      (line  780)
+* BFD_RELOC_ARM_ALU_PC_G1:               howto manager.      (line  783)
+* BFD_RELOC_ARM_ALU_PC_G1_NC:            howto manager.      (line  782)
+* BFD_RELOC_ARM_ALU_PC_G2:               howto manager.      (line  784)
+* BFD_RELOC_ARM_ALU_SB_G0:               howto manager.      (line  795)
+* BFD_RELOC_ARM_ALU_SB_G0_NC:            howto manager.      (line  794)
+* BFD_RELOC_ARM_ALU_SB_G1:               howto manager.      (line  797)
+* BFD_RELOC_ARM_ALU_SB_G1_NC:            howto manager.      (line  796)
+* BFD_RELOC_ARM_ALU_SB_G2:               howto manager.      (line  798)
+* BFD_RELOC_ARM_CP_OFF_IMM:              howto manager.      (line  823)
+* BFD_RELOC_ARM_CP_OFF_IMM_S2:           howto manager.      (line  824)
+* BFD_RELOC_ARM_GLOB_DAT:                howto manager.      (line  762)
+* BFD_RELOC_ARM_GOT32:                   howto manager.      (line  763)
+* BFD_RELOC_ARM_GOTOFF:                  howto manager.      (line  766)
+* BFD_RELOC_ARM_GOTPC:                   howto manager.      (line  767)
+* BFD_RELOC_ARM_HWLITERAL:               howto manager.      (line  834)
+* BFD_RELOC_ARM_IMMEDIATE:               howto manager.      (line  813)
+* BFD_RELOC_ARM_IN_POOL:                 howto manager.      (line  830)
+* BFD_RELOC_ARM_JUMP_SLOT:               howto manager.      (line  761)
+* BFD_RELOC_ARM_LDC_PC_G0:               howto manager.      (line  791)
+* BFD_RELOC_ARM_LDC_PC_G1:               howto manager.      (line  792)
+* BFD_RELOC_ARM_LDC_PC_G2:               howto manager.      (line  793)
+* BFD_RELOC_ARM_LDC_SB_G0:               howto manager.      (line  805)
+* BFD_RELOC_ARM_LDC_SB_G1:               howto manager.      (line  806)
+* BFD_RELOC_ARM_LDC_SB_G2:               howto manager.      (line  807)
+* BFD_RELOC_ARM_LDR_IMM:                 howto manager.      (line  828)
+* BFD_RELOC_ARM_LDR_PC_G0:               howto manager.      (line  785)
+* BFD_RELOC_ARM_LDR_PC_G1:               howto manager.      (line  786)
+* BFD_RELOC_ARM_LDR_PC_G2:               howto manager.      (line  787)
+* BFD_RELOC_ARM_LDR_SB_G0:               howto manager.      (line  799)
+* BFD_RELOC_ARM_LDR_SB_G1:               howto manager.      (line  800)
+* BFD_RELOC_ARM_LDR_SB_G2:               howto manager.      (line  801)
+* BFD_RELOC_ARM_LDRS_PC_G0:              howto manager.      (line  788)
+* BFD_RELOC_ARM_LDRS_PC_G1:              howto manager.      (line  789)
+* BFD_RELOC_ARM_LDRS_PC_G2:              howto manager.      (line  790)
+* BFD_RELOC_ARM_LDRS_SB_G0:              howto manager.      (line  802)
+* BFD_RELOC_ARM_LDRS_SB_G1:              howto manager.      (line  803)
+* BFD_RELOC_ARM_LDRS_SB_G2:              howto manager.      (line  804)
+* BFD_RELOC_ARM_LITERAL:                 howto manager.      (line  829)
+* BFD_RELOC_ARM_MOVT:                    howto manager.      (line  752)
+* BFD_RELOC_ARM_MOVT_PCREL:              howto manager.      (line  754)
+* BFD_RELOC_ARM_MOVW:                    howto manager.      (line  751)
+* BFD_RELOC_ARM_MOVW_PCREL:              howto manager.      (line  753)
+* BFD_RELOC_ARM_MULTI:                   howto manager.      (line  822)
+* BFD_RELOC_ARM_OFFSET_IMM:              howto manager.      (line  725)
+* BFD_RELOC_ARM_OFFSET_IMM8:             howto manager.      (line  831)
+* BFD_RELOC_ARM_PCREL_BLX:               howto manager.      (line  696)
+* BFD_RELOC_ARM_PCREL_BRANCH:            howto manager.      (line  692)
+* BFD_RELOC_ARM_PCREL_CALL:              howto manager.      (line  706)
+* BFD_RELOC_ARM_PCREL_JUMP:              howto manager.      (line  710)
+* BFD_RELOC_ARM_PLT32:                   howto manager.      (line  764)
+* BFD_RELOC_ARM_PREL31:                  howto manager.      (line  748)
+* BFD_RELOC_ARM_RELATIVE:                howto manager.      (line  765)
+* BFD_RELOC_ARM_ROSEGREL32:              howto manager.      (line  737)
+* BFD_RELOC_ARM_SBREL32:                 howto manager.      (line  740)
+* BFD_RELOC_ARM_SHIFT_IMM:               howto manager.      (line  819)
+* BFD_RELOC_ARM_SMC:                     howto manager.      (line  820)
+* BFD_RELOC_ARM_SWI:                     howto manager.      (line  821)
+* BFD_RELOC_ARM_T32_ADD_IMM:             howto manager.      (line  816)
+* BFD_RELOC_ARM_T32_ADD_PC12:            howto manager.      (line  818)
+* BFD_RELOC_ARM_T32_CP_OFF_IMM:          howto manager.      (line  825)
+* BFD_RELOC_ARM_T32_CP_OFF_IMM_S2:       howto manager.      (line  826)
+* BFD_RELOC_ARM_T32_IMM12:               howto manager.      (line  817)
+* BFD_RELOC_ARM_T32_IMMEDIATE:           howto manager.      (line  815)
+* BFD_RELOC_ARM_T32_OFFSET_IMM:          howto manager.      (line  833)
+* BFD_RELOC_ARM_T32_OFFSET_U8:           howto manager.      (line  832)
+* BFD_RELOC_ARM_TARGET1:                 howto manager.      (line  733)
+* BFD_RELOC_ARM_TARGET2:                 howto manager.      (line  743)
+* BFD_RELOC_ARM_THUMB_ADD:               howto manager.      (line  835)
+* BFD_RELOC_ARM_THUMB_IMM:               howto manager.      (line  836)
+* BFD_RELOC_ARM_THUMB_MOVT:              howto manager.      (line  756)
+* BFD_RELOC_ARM_THUMB_MOVT_PCREL:        howto manager.      (line  758)
+* BFD_RELOC_ARM_THUMB_MOVW:              howto manager.      (line  755)
+* BFD_RELOC_ARM_THUMB_MOVW_PCREL:        howto manager.      (line  757)
+* BFD_RELOC_ARM_THUMB_OFFSET:            howto manager.      (line  729)
+* BFD_RELOC_ARM_THUMB_SHIFT:             howto manager.      (line  837)
+* BFD_RELOC_ARM_TLS_DTPMOD32:            howto manager.      (line  774)
+* BFD_RELOC_ARM_TLS_DTPOFF32:            howto manager.      (line  773)
+* BFD_RELOC_ARM_TLS_GD32:                howto manager.      (line  770)
+* BFD_RELOC_ARM_TLS_IE32:                howto manager.      (line  776)
+* BFD_RELOC_ARM_TLS_LDM32:               howto manager.      (line  772)
+* BFD_RELOC_ARM_TLS_LDO32:               howto manager.      (line  771)
+* BFD_RELOC_ARM_TLS_LE32:                howto manager.      (line  777)
+* BFD_RELOC_ARM_TLS_TPOFF32:             howto manager.      (line  775)
+* BFD_RELOC_ARM_V4BX:                    howto manager.      (line  810)
+* BFD_RELOC_AVR_13_PCREL:                howto manager.      (line 1399)
+* BFD_RELOC_AVR_16_PM:                   howto manager.      (line 1403)
+* BFD_RELOC_AVR_6:                       howto manager.      (line 1490)
+* BFD_RELOC_AVR_6_ADIW:                  howto manager.      (line 1494)
+* BFD_RELOC_AVR_7_PCREL:                 howto manager.      (line 1395)
+* BFD_RELOC_AVR_CALL:                    howto manager.      (line 1482)
+* BFD_RELOC_AVR_HH8_LDI:                 howto manager.      (line 1415)
+* BFD_RELOC_AVR_HH8_LDI_NEG:             howto manager.      (line 1434)
+* BFD_RELOC_AVR_HH8_LDI_PM:              howto manager.      (line 1463)
+* BFD_RELOC_AVR_HH8_LDI_PM_NEG:          howto manager.      (line 1477)
+* BFD_RELOC_AVR_HI8_LDI:                 howto manager.      (line 1411)
+* BFD_RELOC_AVR_HI8_LDI_GS:              howto manager.      (line 1457)
+* BFD_RELOC_AVR_HI8_LDI_NEG:             howto manager.      (line 1429)
+* BFD_RELOC_AVR_HI8_LDI_PM:              howto manager.      (line 1453)
+* BFD_RELOC_AVR_HI8_LDI_PM_NEG:          howto manager.      (line 1472)
+* BFD_RELOC_AVR_LDI:                     howto manager.      (line 1486)
+* BFD_RELOC_AVR_LO8_LDI:                 howto manager.      (line 1407)
+* BFD_RELOC_AVR_LO8_LDI_GS:              howto manager.      (line 1447)
+* BFD_RELOC_AVR_LO8_LDI_NEG:             howto manager.      (line 1424)
+* BFD_RELOC_AVR_LO8_LDI_PM:              howto manager.      (line 1443)
+* BFD_RELOC_AVR_LO8_LDI_PM_NEG:          howto manager.      (line 1468)
+* BFD_RELOC_AVR_MS8_LDI:                 howto manager.      (line 1420)
+* BFD_RELOC_AVR_MS8_LDI_NEG:             howto manager.      (line 1439)
+* BFD_RELOC_BFIN_10_PCREL:               howto manager.      (line  959)
+* BFD_RELOC_BFIN_11_PCREL:               howto manager.      (line  962)
+* BFD_RELOC_BFIN_12_PCREL_JUMP:          howto manager.      (line  965)
+* BFD_RELOC_BFIN_12_PCREL_JUMP_S:        howto manager.      (line  968)
+* BFD_RELOC_BFIN_16_HIGH:                howto manager.      (line  947)
+* BFD_RELOC_BFIN_16_IMM:                 howto manager.      (line  944)
+* BFD_RELOC_BFIN_16_LOW:                 howto manager.      (line  956)
+* BFD_RELOC_BFIN_24_PCREL_CALL_X:        howto manager.      (line  971)
+* BFD_RELOC_BFIN_24_PCREL_JUMP_L:        howto manager.      (line  974)
+* BFD_RELOC_BFIN_4_PCREL:                howto manager.      (line  950)
+* BFD_RELOC_BFIN_5_PCREL:                howto manager.      (line  953)
+* BFD_RELOC_BFIN_FUNCDESC:               howto manager.      (line  980)
+* BFD_RELOC_BFIN_FUNCDESC_GOT17M4:       howto manager.      (line  981)
+* BFD_RELOC_BFIN_FUNCDESC_GOTHI:         howto manager.      (line  982)
+* BFD_RELOC_BFIN_FUNCDESC_GOTLO:         howto manager.      (line  983)
+* BFD_RELOC_BFIN_FUNCDESC_GOTOFF17M4:    howto manager.      (line  985)
+* BFD_RELOC_BFIN_FUNCDESC_GOTOFFHI:      howto manager.      (line  986)
+* BFD_RELOC_BFIN_FUNCDESC_GOTOFFLO:      howto manager.      (line  987)
+* BFD_RELOC_BFIN_FUNCDESC_VALUE:         howto manager.      (line  984)
+* BFD_RELOC_BFIN_GOT:                    howto manager.      (line  993)
+* BFD_RELOC_BFIN_GOT17M4:                howto manager.      (line  977)
+* BFD_RELOC_BFIN_GOTHI:                  howto manager.      (line  978)
+* BFD_RELOC_BFIN_GOTLO:                  howto manager.      (line  979)
+* BFD_RELOC_BFIN_GOTOFF17M4:             howto manager.      (line  988)
+* BFD_RELOC_BFIN_GOTOFFHI:               howto manager.      (line  989)
+* BFD_RELOC_BFIN_GOTOFFLO:               howto manager.      (line  990)
+* BFD_RELOC_BFIN_PLTPC:                  howto manager.      (line  996)
+* bfd_reloc_code_type:                   howto manager.      (line   10)
+* BFD_RELOC_CR16_ABS20:                  howto manager.      (line 1866)
+* BFD_RELOC_CR16_ABS24:                  howto manager.      (line 1867)
+* BFD_RELOC_CR16_DISP16:                 howto manager.      (line 1877)
+* BFD_RELOC_CR16_DISP20:                 howto manager.      (line 1878)
+* BFD_RELOC_CR16_DISP24:                 howto manager.      (line 1879)
+* BFD_RELOC_CR16_DISP24a:                howto manager.      (line 1880)
+* BFD_RELOC_CR16_DISP4:                  howto manager.      (line 1875)
+* BFD_RELOC_CR16_DISP8:                  howto manager.      (line 1876)
+* BFD_RELOC_CR16_GLOB_DAT:               howto manager.      (line 1886)
+* BFD_RELOC_CR16_GOT_REGREL20:           howto manager.      (line 1884)
+* BFD_RELOC_CR16_GOTC_REGREL20:          howto manager.      (line 1885)
+* BFD_RELOC_CR16_IMM16:                  howto manager.      (line 1870)
+* BFD_RELOC_CR16_IMM20:                  howto manager.      (line 1871)
+* BFD_RELOC_CR16_IMM24:                  howto manager.      (line 1872)
+* BFD_RELOC_CR16_IMM32:                  howto manager.      (line 1873)
+* BFD_RELOC_CR16_IMM32a:                 howto manager.      (line 1874)
+* BFD_RELOC_CR16_IMM4:                   howto manager.      (line 1868)
+* BFD_RELOC_CR16_IMM8:                   howto manager.      (line 1869)
+* BFD_RELOC_CR16_NUM16:                  howto manager.      (line 1855)
+* BFD_RELOC_CR16_NUM32:                  howto manager.      (line 1856)
+* BFD_RELOC_CR16_NUM32a:                 howto manager.      (line 1857)
+* BFD_RELOC_CR16_NUM8:                   howto manager.      (line 1854)
+* BFD_RELOC_CR16_REGREL0:                howto manager.      (line 1858)
+* BFD_RELOC_CR16_REGREL14:               howto manager.      (line 1861)
+* BFD_RELOC_CR16_REGREL14a:              howto manager.      (line 1862)
+* BFD_RELOC_CR16_REGREL16:               howto manager.      (line 1863)
+* BFD_RELOC_CR16_REGREL20:               howto manager.      (line 1864)
+* BFD_RELOC_CR16_REGREL20a:              howto manager.      (line 1865)
+* BFD_RELOC_CR16_REGREL4:                howto manager.      (line 1859)
+* BFD_RELOC_CR16_REGREL4a:               howto manager.      (line 1860)
+* BFD_RELOC_CR16_SWITCH16:               howto manager.      (line 1882)
+* BFD_RELOC_CR16_SWITCH32:               howto manager.      (line 1883)
+* BFD_RELOC_CR16_SWITCH8:                howto manager.      (line 1881)
+* BFD_RELOC_CRIS_16_DTPREL:              howto manager.      (line 1957)
+* BFD_RELOC_CRIS_16_GOT:                 howto manager.      (line 1933)
+* BFD_RELOC_CRIS_16_GOT_GD:              howto manager.      (line 1953)
+* BFD_RELOC_CRIS_16_GOT_TPREL:           howto manager.      (line 1959)
+* BFD_RELOC_CRIS_16_GOTPLT:              howto manager.      (line 1939)
+* BFD_RELOC_CRIS_16_TPREL:               howto manager.      (line 1961)
+* BFD_RELOC_CRIS_32_DTPREL:              howto manager.      (line 1956)
+* BFD_RELOC_CRIS_32_GD:                  howto manager.      (line 1954)
+* BFD_RELOC_CRIS_32_GOT:                 howto manager.      (line 1930)
+* BFD_RELOC_CRIS_32_GOT_GD:              howto manager.      (line 1952)
+* BFD_RELOC_CRIS_32_GOT_TPREL:           howto manager.      (line 1958)
+* BFD_RELOC_CRIS_32_GOTPLT:              howto manager.      (line 1936)
+* BFD_RELOC_CRIS_32_GOTREL:              howto manager.      (line 1942)
+* BFD_RELOC_CRIS_32_IE:                  howto manager.      (line 1963)
+* BFD_RELOC_CRIS_32_PLT_GOTREL:          howto manager.      (line 1945)
+* BFD_RELOC_CRIS_32_PLT_PCREL:           howto manager.      (line 1948)
+* BFD_RELOC_CRIS_32_TPREL:               howto manager.      (line 1960)
+* BFD_RELOC_CRIS_BDISP8:                 howto manager.      (line 1911)
+* BFD_RELOC_CRIS_COPY:                   howto manager.      (line 1924)
+* BFD_RELOC_CRIS_DTP:                    howto manager.      (line 1955)
+* BFD_RELOC_CRIS_DTPMOD:                 howto manager.      (line 1962)
+* BFD_RELOC_CRIS_GLOB_DAT:               howto manager.      (line 1925)
+* BFD_RELOC_CRIS_JUMP_SLOT:              howto manager.      (line 1926)
+* BFD_RELOC_CRIS_LAPCQ_OFFSET:           howto manager.      (line 1919)
+* BFD_RELOC_CRIS_RELATIVE:               howto manager.      (line 1927)
+* BFD_RELOC_CRIS_SIGNED_16:              howto manager.      (line 1917)
+* BFD_RELOC_CRIS_SIGNED_6:               howto manager.      (line 1913)
+* BFD_RELOC_CRIS_SIGNED_8:               howto manager.      (line 1915)
+* BFD_RELOC_CRIS_UNSIGNED_16:            howto manager.      (line 1918)
+* BFD_RELOC_CRIS_UNSIGNED_4:             howto manager.      (line 1920)
+* BFD_RELOC_CRIS_UNSIGNED_5:             howto manager.      (line 1912)
+* BFD_RELOC_CRIS_UNSIGNED_6:             howto manager.      (line 1914)
+* BFD_RELOC_CRIS_UNSIGNED_8:             howto manager.      (line 1916)
+* BFD_RELOC_CRX_ABS16:                   howto manager.      (line 1899)
+* BFD_RELOC_CRX_ABS32:                   howto manager.      (line 1900)
+* BFD_RELOC_CRX_IMM16:                   howto manager.      (line 1904)
+* BFD_RELOC_CRX_IMM32:                   howto manager.      (line 1905)
+* BFD_RELOC_CRX_NUM16:                   howto manager.      (line 1902)
+* BFD_RELOC_CRX_NUM32:                   howto manager.      (line 1903)
+* BFD_RELOC_CRX_NUM8:                    howto manager.      (line 1901)
+* BFD_RELOC_CRX_REGREL12:                howto manager.      (line 1895)
+* BFD_RELOC_CRX_REGREL22:                howto manager.      (line 1896)
+* BFD_RELOC_CRX_REGREL28:                howto manager.      (line 1897)
+* BFD_RELOC_CRX_REGREL32:                howto manager.      (line 1898)
+* BFD_RELOC_CRX_REL16:                   howto manager.      (line 1892)
+* BFD_RELOC_CRX_REL24:                   howto manager.      (line 1893)
+* BFD_RELOC_CRX_REL32:                   howto manager.      (line 1894)
+* BFD_RELOC_CRX_REL4:                    howto manager.      (line 1889)
+* BFD_RELOC_CRX_REL8:                    howto manager.      (line 1890)
+* BFD_RELOC_CRX_REL8_CMP:                howto manager.      (line 1891)
+* BFD_RELOC_CRX_SWITCH16:                howto manager.      (line 1907)
+* BFD_RELOC_CRX_SWITCH32:                howto manager.      (line 1908)
+* BFD_RELOC_CRX_SWITCH8:                 howto manager.      (line 1906)
+* BFD_RELOC_CTOR:                        howto manager.      (line  686)
+* BFD_RELOC_D10V_10_PCREL_L:             howto manager.      (line 1063)
+* BFD_RELOC_D10V_10_PCREL_R:             howto manager.      (line 1059)
+* BFD_RELOC_D10V_18:                     howto manager.      (line 1068)
+* BFD_RELOC_D10V_18_PCREL:               howto manager.      (line 1071)
+* BFD_RELOC_D30V_15:                     howto manager.      (line 1086)
+* BFD_RELOC_D30V_15_PCREL:               howto manager.      (line 1090)
+* BFD_RELOC_D30V_15_PCREL_R:             howto manager.      (line 1094)
+* BFD_RELOC_D30V_21:                     howto manager.      (line 1099)
+* BFD_RELOC_D30V_21_PCREL:               howto manager.      (line 1103)
+* BFD_RELOC_D30V_21_PCREL_R:             howto manager.      (line 1107)
+* BFD_RELOC_D30V_32:                     howto manager.      (line 1112)
+* BFD_RELOC_D30V_32_PCREL:               howto manager.      (line 1115)
+* BFD_RELOC_D30V_6:                      howto manager.      (line 1074)
+* BFD_RELOC_D30V_9_PCREL:                howto manager.      (line 1077)
+* BFD_RELOC_D30V_9_PCREL_R:              howto manager.      (line 1081)
+* BFD_RELOC_DLX_HI16_S:                  howto manager.      (line 1118)
+* BFD_RELOC_DLX_JMP26:                   howto manager.      (line 1124)
+* BFD_RELOC_DLX_LO16:                    howto manager.      (line 1121)
+* BFD_RELOC_FR30_10_IN_8:                howto manager.      (line 1303)
+* BFD_RELOC_FR30_12_PCREL:               howto manager.      (line 1311)
+* BFD_RELOC_FR30_20:                     howto manager.      (line 1287)
+* BFD_RELOC_FR30_48:                     howto manager.      (line 1284)
+* BFD_RELOC_FR30_6_IN_4:                 howto manager.      (line 1291)
+* BFD_RELOC_FR30_8_IN_8:                 howto manager.      (line 1295)
+* BFD_RELOC_FR30_9_IN_8:                 howto manager.      (line 1299)
+* BFD_RELOC_FR30_9_PCREL:                howto manager.      (line 1307)
+* BFD_RELOC_FRV_FUNCDESC:                howto manager.      (line  438)
+* BFD_RELOC_FRV_FUNCDESC_GOT12:          howto manager.      (line  439)
+* BFD_RELOC_FRV_FUNCDESC_GOTHI:          howto manager.      (line  440)
+* BFD_RELOC_FRV_FUNCDESC_GOTLO:          howto manager.      (line  441)
+* BFD_RELOC_FRV_FUNCDESC_GOTOFF12:       howto manager.      (line  443)
+* BFD_RELOC_FRV_FUNCDESC_GOTOFFHI:       howto manager.      (line  444)
+* BFD_RELOC_FRV_FUNCDESC_GOTOFFLO:       howto manager.      (line  445)
+* BFD_RELOC_FRV_FUNCDESC_VALUE:          howto manager.      (line  442)
+* BFD_RELOC_FRV_GETTLSOFF:               howto manager.      (line  449)
+* BFD_RELOC_FRV_GETTLSOFF_RELAX:         howto manager.      (line  462)
+* BFD_RELOC_FRV_GOT12:                   howto manager.      (line  435)
+* BFD_RELOC_FRV_GOTHI:                   howto manager.      (line  436)
+* BFD_RELOC_FRV_GOTLO:                   howto manager.      (line  437)
+* BFD_RELOC_FRV_GOTOFF12:                howto manager.      (line  446)
+* BFD_RELOC_FRV_GOTOFFHI:                howto manager.      (line  447)
+* BFD_RELOC_FRV_GOTOFFLO:                howto manager.      (line  448)
+* BFD_RELOC_FRV_GOTTLSDESC12:            howto manager.      (line  451)
+* BFD_RELOC_FRV_GOTTLSDESCHI:            howto manager.      (line  452)
+* BFD_RELOC_FRV_GOTTLSDESCLO:            howto manager.      (line  453)
+* BFD_RELOC_FRV_GOTTLSOFF12:             howto manager.      (line  457)
+* BFD_RELOC_FRV_GOTTLSOFFHI:             howto manager.      (line  458)
+* BFD_RELOC_FRV_GOTTLSOFFLO:             howto manager.      (line  459)
+* BFD_RELOC_FRV_GPREL12:                 howto manager.      (line  430)
+* BFD_RELOC_FRV_GPREL32:                 howto manager.      (line  432)
+* BFD_RELOC_FRV_GPRELHI:                 howto manager.      (line  433)
+* BFD_RELOC_FRV_GPRELLO:                 howto manager.      (line  434)
+* BFD_RELOC_FRV_GPRELU12:                howto manager.      (line  431)
+* BFD_RELOC_FRV_HI16:                    howto manager.      (line  429)
+* BFD_RELOC_FRV_LABEL16:                 howto manager.      (line  426)
+* BFD_RELOC_FRV_LABEL24:                 howto manager.      (line  427)
+* BFD_RELOC_FRV_LO16:                    howto manager.      (line  428)
+* BFD_RELOC_FRV_TLSDESC_RELAX:           howto manager.      (line  461)
+* BFD_RELOC_FRV_TLSDESC_VALUE:           howto manager.      (line  450)
+* BFD_RELOC_FRV_TLSMOFF:                 howto manager.      (line  464)
+* BFD_RELOC_FRV_TLSMOFF12:               howto manager.      (line  454)
+* BFD_RELOC_FRV_TLSMOFFHI:               howto manager.      (line  455)
+* BFD_RELOC_FRV_TLSMOFFLO:               howto manager.      (line  456)
+* BFD_RELOC_FRV_TLSOFF:                  howto manager.      (line  460)
+* BFD_RELOC_FRV_TLSOFF_RELAX:            howto manager.      (line  463)
+* BFD_RELOC_GPREL16:                     howto manager.      (line  121)
+* BFD_RELOC_GPREL32:                     howto manager.      (line  122)
+* BFD_RELOC_H8_DIR16A8:                  howto manager.      (line 2004)
+* BFD_RELOC_H8_DIR16R8:                  howto manager.      (line 2005)
+* BFD_RELOC_H8_DIR24A8:                  howto manager.      (line 2006)
+* BFD_RELOC_H8_DIR24R8:                  howto manager.      (line 2007)
+* BFD_RELOC_H8_DIR32A16:                 howto manager.      (line 2008)
+* BFD_RELOC_HI16:                        howto manager.      (line  342)
+* BFD_RELOC_HI16_BASEREL:                howto manager.      (line   97)
+* BFD_RELOC_HI16_GOTOFF:                 howto manager.      (line   57)
+* BFD_RELOC_HI16_PCREL:                  howto manager.      (line  354)
+* BFD_RELOC_HI16_PLTOFF:                 howto manager.      (line   69)
+* BFD_RELOC_HI16_S:                      howto manager.      (line  345)
+* BFD_RELOC_HI16_S_BASEREL:              howto manager.      (line   98)
+* BFD_RELOC_HI16_S_GOTOFF:               howto manager.      (line   58)
+* BFD_RELOC_HI16_S_PCREL:                howto manager.      (line  357)
+* BFD_RELOC_HI16_S_PLTOFF:               howto manager.      (line   70)
+* BFD_RELOC_HI22:                        howto manager.      (line  116)
+* BFD_RELOC_I370_D12:                    howto manager.      (line  683)
+* BFD_RELOC_I960_CALLJ:                  howto manager.      (line  128)
+* BFD_RELOC_IA64_COPY:                   howto manager.      (line 1748)
+* BFD_RELOC_IA64_DIR32LSB:               howto manager.      (line 1693)
+* BFD_RELOC_IA64_DIR32MSB:               howto manager.      (line 1692)
+* BFD_RELOC_IA64_DIR64LSB:               howto manager.      (line 1695)
+* BFD_RELOC_IA64_DIR64MSB:               howto manager.      (line 1694)
+* BFD_RELOC_IA64_DTPMOD64LSB:            howto manager.      (line 1758)
+* BFD_RELOC_IA64_DTPMOD64MSB:            howto manager.      (line 1757)
+* BFD_RELOC_IA64_DTPREL14:               howto manager.      (line 1760)
+* BFD_RELOC_IA64_DTPREL22:               howto manager.      (line 1761)
+* BFD_RELOC_IA64_DTPREL32LSB:            howto manager.      (line 1764)
+* BFD_RELOC_IA64_DTPREL32MSB:            howto manager.      (line 1763)
+* BFD_RELOC_IA64_DTPREL64I:              howto manager.      (line 1762)
+* BFD_RELOC_IA64_DTPREL64LSB:            howto manager.      (line 1766)
+* BFD_RELOC_IA64_DTPREL64MSB:            howto manager.      (line 1765)
+* BFD_RELOC_IA64_FPTR32LSB:              howto manager.      (line 1710)
+* BFD_RELOC_IA64_FPTR32MSB:              howto manager.      (line 1709)
+* BFD_RELOC_IA64_FPTR64I:                howto manager.      (line 1708)
+* BFD_RELOC_IA64_FPTR64LSB:              howto manager.      (line 1712)
+* BFD_RELOC_IA64_FPTR64MSB:              howto manager.      (line 1711)
+* BFD_RELOC_IA64_GPREL22:                howto manager.      (line 1696)
+* BFD_RELOC_IA64_GPREL32LSB:             howto manager.      (line 1699)
+* BFD_RELOC_IA64_GPREL32MSB:             howto manager.      (line 1698)
+* BFD_RELOC_IA64_GPREL64I:               howto manager.      (line 1697)
+* BFD_RELOC_IA64_GPREL64LSB:             howto manager.      (line 1701)
+* BFD_RELOC_IA64_GPREL64MSB:             howto manager.      (line 1700)
+* BFD_RELOC_IA64_IMM14:                  howto manager.      (line 1689)
+* BFD_RELOC_IA64_IMM22:                  howto manager.      (line 1690)
+* BFD_RELOC_IA64_IMM64:                  howto manager.      (line 1691)
+* BFD_RELOC_IA64_IPLTLSB:                howto manager.      (line 1747)
+* BFD_RELOC_IA64_IPLTMSB:                howto manager.      (line 1746)
+* BFD_RELOC_IA64_LDXMOV:                 howto manager.      (line 1750)
+* BFD_RELOC_IA64_LTOFF22:                howto manager.      (line 1702)
+* BFD_RELOC_IA64_LTOFF22X:               howto manager.      (line 1749)
+* BFD_RELOC_IA64_LTOFF64I:               howto manager.      (line 1703)
+* BFD_RELOC_IA64_LTOFF_DTPMOD22:         howto manager.      (line 1759)
+* BFD_RELOC_IA64_LTOFF_DTPREL22:         howto manager.      (line 1767)
+* BFD_RELOC_IA64_LTOFF_FPTR22:           howto manager.      (line 1724)
+* BFD_RELOC_IA64_LTOFF_FPTR32LSB:        howto manager.      (line 1727)
+* BFD_RELOC_IA64_LTOFF_FPTR32MSB:        howto manager.      (line 1726)
+* BFD_RELOC_IA64_LTOFF_FPTR64I:          howto manager.      (line 1725)
+* BFD_RELOC_IA64_LTOFF_FPTR64LSB:        howto manager.      (line 1729)
+* BFD_RELOC_IA64_LTOFF_FPTR64MSB:        howto manager.      (line 1728)
+* BFD_RELOC_IA64_LTOFF_TPREL22:          howto manager.      (line 1756)
+* BFD_RELOC_IA64_LTV32LSB:               howto manager.      (line 1743)
+* BFD_RELOC_IA64_LTV32MSB:               howto manager.      (line 1742)
+* BFD_RELOC_IA64_LTV64LSB:               howto manager.      (line 1745)
+* BFD_RELOC_IA64_LTV64MSB:               howto manager.      (line 1744)
+* BFD_RELOC_IA64_PCREL21B:               howto manager.      (line 1713)
+* BFD_RELOC_IA64_PCREL21BI:              howto manager.      (line 1714)
+* BFD_RELOC_IA64_PCREL21F:               howto manager.      (line 1716)
+* BFD_RELOC_IA64_PCREL21M:               howto manager.      (line 1715)
+* BFD_RELOC_IA64_PCREL22:                howto manager.      (line 1717)
+* BFD_RELOC_IA64_PCREL32LSB:             howto manager.      (line 1721)
+* BFD_RELOC_IA64_PCREL32MSB:             howto manager.      (line 1720)
+* BFD_RELOC_IA64_PCREL60B:               howto manager.      (line 1718)
+* BFD_RELOC_IA64_PCREL64I:               howto manager.      (line 1719)
+* BFD_RELOC_IA64_PCREL64LSB:             howto manager.      (line 1723)
+* BFD_RELOC_IA64_PCREL64MSB:             howto manager.      (line 1722)
+* BFD_RELOC_IA64_PLTOFF22:               howto manager.      (line 1704)
+* BFD_RELOC_IA64_PLTOFF64I:              howto manager.      (line 1705)
+* BFD_RELOC_IA64_PLTOFF64LSB:            howto manager.      (line 1707)
+* BFD_RELOC_IA64_PLTOFF64MSB:            howto manager.      (line 1706)
+* BFD_RELOC_IA64_REL32LSB:               howto manager.      (line 1739)
+* BFD_RELOC_IA64_REL32MSB:               howto manager.      (line 1738)
+* BFD_RELOC_IA64_REL64LSB:               howto manager.      (line 1741)
+* BFD_RELOC_IA64_REL64MSB:               howto manager.      (line 1740)
+* BFD_RELOC_IA64_SECREL32LSB:            howto manager.      (line 1735)
+* BFD_RELOC_IA64_SECREL32MSB:            howto manager.      (line 1734)
+* BFD_RELOC_IA64_SECREL64LSB:            howto manager.      (line 1737)
+* BFD_RELOC_IA64_SECREL64MSB:            howto manager.      (line 1736)
+* BFD_RELOC_IA64_SEGREL32LSB:            howto manager.      (line 1731)
+* BFD_RELOC_IA64_SEGREL32MSB:            howto manager.      (line 1730)
+* BFD_RELOC_IA64_SEGREL64LSB:            howto manager.      (line 1733)
+* BFD_RELOC_IA64_SEGREL64MSB:            howto manager.      (line 1732)
+* BFD_RELOC_IA64_TPREL14:                howto manager.      (line 1751)
+* BFD_RELOC_IA64_TPREL22:                howto manager.      (line 1752)
+* BFD_RELOC_IA64_TPREL64I:               howto manager.      (line 1753)
+* BFD_RELOC_IA64_TPREL64LSB:             howto manager.      (line 1755)
+* BFD_RELOC_IA64_TPREL64MSB:             howto manager.      (line 1754)
+* BFD_RELOC_IP2K_ADDR16CJP:              howto manager.      (line 1641)
+* BFD_RELOC_IP2K_BANK:                   howto manager.      (line 1638)
+* BFD_RELOC_IP2K_EX8DATA:                howto manager.      (line 1649)
+* BFD_RELOC_IP2K_FR9:                    howto manager.      (line 1635)
+* BFD_RELOC_IP2K_FR_OFFSET:              howto manager.      (line 1662)
+* BFD_RELOC_IP2K_HI8DATA:                howto manager.      (line 1648)
+* BFD_RELOC_IP2K_HI8INSN:                howto manager.      (line 1653)
+* BFD_RELOC_IP2K_LO8DATA:                howto manager.      (line 1647)
+* BFD_RELOC_IP2K_LO8INSN:                howto manager.      (line 1652)
+* BFD_RELOC_IP2K_PAGE3:                  howto manager.      (line 1644)
+* BFD_RELOC_IP2K_PC_SKIP:                howto manager.      (line 1656)
+* BFD_RELOC_IP2K_TEXT:                   howto manager.      (line 1659)
+* BFD_RELOC_IQ2000_OFFSET_16:            howto manager.      (line 2058)
+* BFD_RELOC_IQ2000_OFFSET_21:            howto manager.      (line 2059)
+* BFD_RELOC_IQ2000_UHI16:                howto manager.      (line 2060)
+* BFD_RELOC_LM32_16_GOT:                 howto manager.      (line 2165)
+* BFD_RELOC_LM32_BRANCH:                 howto manager.      (line 2164)
+* BFD_RELOC_LM32_CALL:                   howto manager.      (line 2163)
+* BFD_RELOC_LM32_COPY:                   howto manager.      (line 2168)
+* BFD_RELOC_LM32_GLOB_DAT:               howto manager.      (line 2169)
+* BFD_RELOC_LM32_GOTOFF_HI16:            howto manager.      (line 2166)
+* BFD_RELOC_LM32_GOTOFF_LO16:            howto manager.      (line 2167)
+* BFD_RELOC_LM32_JMP_SLOT:               howto manager.      (line 2170)
+* BFD_RELOC_LM32_RELATIVE:               howto manager.      (line 2171)
+* BFD_RELOC_LO10:                        howto manager.      (line  117)
+* BFD_RELOC_LO16:                        howto manager.      (line  351)
+* BFD_RELOC_LO16_BASEREL:                howto manager.      (line   96)
+* BFD_RELOC_LO16_GOTOFF:                 howto manager.      (line   56)
+* BFD_RELOC_LO16_PCREL:                  howto manager.      (line  360)
+* BFD_RELOC_LO16_PLTOFF:                 howto manager.      (line   68)
+* BFD_RELOC_M32C_HI8:                    howto manager.      (line 1127)
+* BFD_RELOC_M32C_RL_1ADDR:               howto manager.      (line 1129)
+* BFD_RELOC_M32C_RL_2ADDR:               howto manager.      (line 1130)
+* BFD_RELOC_M32C_RL_JUMP:                howto manager.      (line 1128)
+* BFD_RELOC_M32R_10_PCREL:               howto manager.      (line 1137)
+* BFD_RELOC_M32R_18_PCREL:               howto manager.      (line 1141)
+* BFD_RELOC_M32R_24:                     howto manager.      (line 1133)
+* BFD_RELOC_M32R_26_PCREL:               howto manager.      (line 1144)
+* BFD_RELOC_M32R_26_PLTREL:              howto manager.      (line 1163)
+* BFD_RELOC_M32R_COPY:                   howto manager.      (line 1164)
+* BFD_RELOC_M32R_GLOB_DAT:               howto manager.      (line 1165)
+* BFD_RELOC_M32R_GOT16_HI_SLO:           howto manager.      (line 1174)
+* BFD_RELOC_M32R_GOT16_HI_ULO:           howto manager.      (line 1173)
+* BFD_RELOC_M32R_GOT16_LO:               howto manager.      (line 1175)
+* BFD_RELOC_M32R_GOT24:                  howto manager.      (line 1162)
+* BFD_RELOC_M32R_GOTOFF:                 howto manager.      (line 1168)
+* BFD_RELOC_M32R_GOTOFF_HI_SLO:          howto manager.      (line 1170)
+* BFD_RELOC_M32R_GOTOFF_HI_ULO:          howto manager.      (line 1169)
+* BFD_RELOC_M32R_GOTOFF_LO:              howto manager.      (line 1171)
+* BFD_RELOC_M32R_GOTPC24:                howto manager.      (line 1172)
+* BFD_RELOC_M32R_GOTPC_HI_SLO:           howto manager.      (line 1177)
+* BFD_RELOC_M32R_GOTPC_HI_ULO:           howto manager.      (line 1176)
+* BFD_RELOC_M32R_GOTPC_LO:               howto manager.      (line 1178)
+* BFD_RELOC_M32R_HI16_SLO:               howto manager.      (line 1151)
+* BFD_RELOC_M32R_HI16_ULO:               howto manager.      (line 1147)
+* BFD_RELOC_M32R_JMP_SLOT:               howto manager.      (line 1166)
+* BFD_RELOC_M32R_LO16:                   howto manager.      (line 1155)
+* BFD_RELOC_M32R_RELATIVE:               howto manager.      (line 1167)
+* BFD_RELOC_M32R_SDA16:                  howto manager.      (line 1158)
+* BFD_RELOC_M68HC11_24:                  howto manager.      (line 1803)
+* BFD_RELOC_M68HC11_3B:                  howto manager.      (line 1778)
+* BFD_RELOC_M68HC11_HI8:                 howto manager.      (line 1770)
+* BFD_RELOC_M68HC11_LO16:                howto manager.      (line 1792)
+* BFD_RELOC_M68HC11_LO8:                 howto manager.      (line 1774)
+* BFD_RELOC_M68HC11_PAGE:                howto manager.      (line 1798)
+* BFD_RELOC_M68HC11_RL_GROUP:            howto manager.      (line 1787)
+* BFD_RELOC_M68HC11_RL_JUMP:             howto manager.      (line 1781)
+* BFD_RELOC_M68HC12_5B:                  howto manager.      (line 1809)
+* BFD_RELOC_MACH_O_PAIR:                 howto manager.      (line 2178)
+* BFD_RELOC_MACH_O_SECTDIFF:             howto manager.      (line 2174)
+* BFD_RELOC_MCORE_PCREL_32:              howto manager.      (line 1318)
+* BFD_RELOC_MCORE_PCREL_IMM11BY2:        howto manager.      (line 1316)
+* BFD_RELOC_MCORE_PCREL_IMM4BY2:         howto manager.      (line 1317)
+* BFD_RELOC_MCORE_PCREL_IMM8BY4:         howto manager.      (line 1315)
+* BFD_RELOC_MCORE_PCREL_JSR_IMM11BY2:    howto manager.      (line 1319)
+* BFD_RELOC_MCORE_RVA:                   howto manager.      (line 1320)
+* BFD_RELOC_MEP_16:                      howto manager.      (line 1324)
+* BFD_RELOC_MEP_32:                      howto manager.      (line 1325)
+* BFD_RELOC_MEP_8:                       howto manager.      (line 1323)
+* BFD_RELOC_MEP_ADDR24A4:                howto manager.      (line 1340)
+* BFD_RELOC_MEP_GNU_VTENTRY:             howto manager.      (line 1342)
+* BFD_RELOC_MEP_GNU_VTINHERIT:           howto manager.      (line 1341)
+* BFD_RELOC_MEP_GPREL:                   howto manager.      (line 1334)
+* BFD_RELOC_MEP_HI16S:                   howto manager.      (line 1333)
+* BFD_RELOC_MEP_HI16U:                   howto manager.      (line 1332)
+* BFD_RELOC_MEP_LOW16:                   howto manager.      (line 1331)
+* BFD_RELOC_MEP_PCABS24A2:               howto manager.      (line 1330)
+* BFD_RELOC_MEP_PCREL12A2:               howto manager.      (line 1327)
+* BFD_RELOC_MEP_PCREL17A2:               howto manager.      (line 1328)
+* BFD_RELOC_MEP_PCREL24A2:               howto manager.      (line 1329)
+* BFD_RELOC_MEP_PCREL8A2:                howto manager.      (line 1326)
+* BFD_RELOC_MEP_TPREL:                   howto manager.      (line 1335)
+* BFD_RELOC_MEP_TPREL7:                  howto manager.      (line 1336)
+* BFD_RELOC_MEP_TPREL7A2:                howto manager.      (line 1337)
+* BFD_RELOC_MEP_TPREL7A4:                howto manager.      (line 1338)
+* BFD_RELOC_MEP_UIMM24:                  howto manager.      (line 1339)
+* BFD_RELOC_MICROBLAZE_32_GOTOFF:        howto manager.      (line 2225)
+* BFD_RELOC_MICROBLAZE_32_LO:            howto manager.      (line 2181)
+* BFD_RELOC_MICROBLAZE_32_LO_PCREL:      howto manager.      (line 2185)
+* BFD_RELOC_MICROBLAZE_32_ROSDA:         howto manager.      (line 2189)
+* BFD_RELOC_MICROBLAZE_32_RWSDA:         howto manager.      (line 2193)
+* BFD_RELOC_MICROBLAZE_32_SYM_OP_SYM:    howto manager.      (line 2197)
+* BFD_RELOC_MICROBLAZE_64_GOT:           howto manager.      (line 2211)
+* BFD_RELOC_MICROBLAZE_64_GOTOFF:        howto manager.      (line 2220)
+* BFD_RELOC_MICROBLAZE_64_GOTPC:         howto manager.      (line 2206)
+* BFD_RELOC_MICROBLAZE_64_NONE:          howto manager.      (line 2201)
+* BFD_RELOC_MICROBLAZE_64_PLT:           howto manager.      (line 2215)
+* BFD_RELOC_MICROBLAZE_COPY:             howto manager.      (line 2229)
+* BFD_RELOC_MIPS16_CALL16:               howto manager.      (line  364)
+* BFD_RELOC_MIPS16_GOT16:                howto manager.      (line  363)
+* BFD_RELOC_MIPS16_GPREL:                howto manager.      (line  339)
+* BFD_RELOC_MIPS16_HI16:                 howto manager.      (line  368)
+* BFD_RELOC_MIPS16_HI16_S:               howto manager.      (line  371)
+* BFD_RELOC_MIPS16_JMP:                  howto manager.      (line  336)
+* BFD_RELOC_MIPS16_LO16:                 howto manager.      (line  377)
+* BFD_RELOC_MIPS_CALL16:                 howto manager.      (line  384)
+* BFD_RELOC_MIPS_CALL_HI16:              howto manager.      (line  387)
+* BFD_RELOC_MIPS_CALL_LO16:              howto manager.      (line  388)
+* BFD_RELOC_MIPS_COPY:                   howto manager.      (line  419)
+* BFD_RELOC_MIPS_DELETE:                 howto manager.      (line  397)
+* BFD_RELOC_MIPS_GOT16:                  howto manager.      (line  383)
+* BFD_RELOC_MIPS_GOT_DISP:               howto manager.      (line  392)
+* BFD_RELOC_MIPS_GOT_HI16:               howto manager.      (line  385)
+* BFD_RELOC_MIPS_GOT_LO16:               howto manager.      (line  386)
+* BFD_RELOC_MIPS_GOT_OFST:               howto manager.      (line  391)
+* BFD_RELOC_MIPS_GOT_PAGE:               howto manager.      (line  390)
+* BFD_RELOC_MIPS_HIGHER:                 howto manager.      (line  399)
+* BFD_RELOC_MIPS_HIGHEST:                howto manager.      (line  398)
+* BFD_RELOC_MIPS_INSERT_A:               howto manager.      (line  395)
+* BFD_RELOC_MIPS_INSERT_B:               howto manager.      (line  396)
+* BFD_RELOC_MIPS_JALR:                   howto manager.      (line  403)
+* BFD_RELOC_MIPS_JMP:                    howto manager.      (line  332)
+* BFD_RELOC_MIPS_JUMP_SLOT:              howto manager.      (line  420)
+* BFD_RELOC_MIPS_LITERAL:                howto manager.      (line  380)
+* BFD_RELOC_MIPS_REL16:                  howto manager.      (line  401)
+* BFD_RELOC_MIPS_RELGOT:                 howto manager.      (line  402)
+* BFD_RELOC_MIPS_SCN_DISP:               howto manager.      (line  400)
+* BFD_RELOC_MIPS_SHIFT5:                 howto manager.      (line  393)
+* BFD_RELOC_MIPS_SHIFT6:                 howto manager.      (line  394)
+* BFD_RELOC_MIPS_SUB:                    howto manager.      (line  389)
+* BFD_RELOC_MIPS_TLS_DTPMOD32:           howto manager.      (line  404)
+* BFD_RELOC_MIPS_TLS_DTPMOD64:           howto manager.      (line  406)
+* BFD_RELOC_MIPS_TLS_DTPREL32:           howto manager.      (line  405)
+* BFD_RELOC_MIPS_TLS_DTPREL64:           howto manager.      (line  407)
+* BFD_RELOC_MIPS_TLS_DTPREL_HI16:        howto manager.      (line  410)
+* BFD_RELOC_MIPS_TLS_DTPREL_LO16:        howto manager.      (line  411)
+* BFD_RELOC_MIPS_TLS_GD:                 howto manager.      (line  408)
+* BFD_RELOC_MIPS_TLS_GOTTPREL:           howto manager.      (line  412)
+* BFD_RELOC_MIPS_TLS_LDM:                howto manager.      (line  409)
+* BFD_RELOC_MIPS_TLS_TPREL32:            howto manager.      (line  413)
+* BFD_RELOC_MIPS_TLS_TPREL64:            howto manager.      (line  414)
+* BFD_RELOC_MIPS_TLS_TPREL_HI16:         howto manager.      (line  415)
+* BFD_RELOC_MIPS_TLS_TPREL_LO16:         howto manager.      (line  416)
+* BFD_RELOC_MMIX_ADDR19:                 howto manager.      (line 1371)
+* BFD_RELOC_MMIX_ADDR27:                 howto manager.      (line 1375)
+* BFD_RELOC_MMIX_BASE_PLUS_OFFSET:       howto manager.      (line 1387)
+* BFD_RELOC_MMIX_CBRANCH:                howto manager.      (line 1351)
+* BFD_RELOC_MMIX_CBRANCH_1:              howto manager.      (line 1353)
+* BFD_RELOC_MMIX_CBRANCH_2:              howto manager.      (line 1354)
+* BFD_RELOC_MMIX_CBRANCH_3:              howto manager.      (line 1355)
+* BFD_RELOC_MMIX_CBRANCH_J:              howto manager.      (line 1352)
+* BFD_RELOC_MMIX_GETA:                   howto manager.      (line 1345)
+* BFD_RELOC_MMIX_GETA_1:                 howto manager.      (line 1346)
+* BFD_RELOC_MMIX_GETA_2:                 howto manager.      (line 1347)
+* BFD_RELOC_MMIX_GETA_3:                 howto manager.      (line 1348)
+* BFD_RELOC_MMIX_JMP:                    howto manager.      (line 1365)
+* BFD_RELOC_MMIX_JMP_1:                  howto manager.      (line 1366)
+* BFD_RELOC_MMIX_JMP_2:                  howto manager.      (line 1367)
+* BFD_RELOC_MMIX_JMP_3:                  howto manager.      (line 1368)
+* BFD_RELOC_MMIX_LOCAL:                  howto manager.      (line 1391)
+* BFD_RELOC_MMIX_PUSHJ:                  howto manager.      (line 1358)
+* BFD_RELOC_MMIX_PUSHJ_1:                howto manager.      (line 1359)
+* BFD_RELOC_MMIX_PUSHJ_2:                howto manager.      (line 1360)
+* BFD_RELOC_MMIX_PUSHJ_3:                howto manager.      (line 1361)
+* BFD_RELOC_MMIX_PUSHJ_STUBBABLE:        howto manager.      (line 1362)
+* BFD_RELOC_MMIX_REG:                    howto manager.      (line 1383)
+* BFD_RELOC_MMIX_REG_OR_BYTE:            howto manager.      (line 1379)
+* BFD_RELOC_MN10300_16_PCREL:            howto manager.      (line 1253)
+* BFD_RELOC_MN10300_32_PCREL:            howto manager.      (line 1249)
+* BFD_RELOC_MN10300_ALIGN:               howto manager.      (line  499)
+* BFD_RELOC_MN10300_COPY:                howto manager.      (line  482)
+* BFD_RELOC_MN10300_GLOB_DAT:            howto manager.      (line  485)
+* BFD_RELOC_MN10300_GOT16:               howto manager.      (line  478)
+* BFD_RELOC_MN10300_GOT24:               howto manager.      (line  474)
+* BFD_RELOC_MN10300_GOT32:               howto manager.      (line  470)
+* BFD_RELOC_MN10300_GOTOFF24:            howto manager.      (line  467)
+* BFD_RELOC_MN10300_JMP_SLOT:            howto manager.      (line  488)
+* BFD_RELOC_MN10300_RELATIVE:            howto manager.      (line  491)
+* BFD_RELOC_MN10300_SYM_DIFF:            howto manager.      (line  494)
+* BFD_RELOC_MOXIE_10_PCREL:              howto manager.      (line  423)
+* BFD_RELOC_MSP430_10_PCREL:             howto manager.      (line 2049)
+* BFD_RELOC_MSP430_16:                   howto manager.      (line 2051)
+* BFD_RELOC_MSP430_16_BYTE:              howto manager.      (line 2053)
+* BFD_RELOC_MSP430_16_PCREL:             howto manager.      (line 2050)
+* BFD_RELOC_MSP430_16_PCREL_BYTE:        howto manager.      (line 2052)
+* BFD_RELOC_MSP430_2X_PCREL:             howto manager.      (line 2054)
+* BFD_RELOC_MSP430_RL_PCREL:             howto manager.      (line 2055)
+* BFD_RELOC_MT_GNU_VTENTRY:              howto manager.      (line 2043)
+* BFD_RELOC_MT_GNU_VTINHERIT:            howto manager.      (line 2040)
+* BFD_RELOC_MT_HI16:                     howto manager.      (line 2034)
+* BFD_RELOC_MT_LO16:                     howto manager.      (line 2037)
+* BFD_RELOC_MT_PC16:                     howto manager.      (line 2031)
+* BFD_RELOC_MT_PCINSN8:                  howto manager.      (line 2046)
+* BFD_RELOC_NONE:                        howto manager.      (line  131)
+* BFD_RELOC_NS32K_DISP_16:               howto manager.      (line  565)
+* BFD_RELOC_NS32K_DISP_16_PCREL:         howto manager.      (line  568)
+* BFD_RELOC_NS32K_DISP_32:               howto manager.      (line  566)
+* BFD_RELOC_NS32K_DISP_32_PCREL:         howto manager.      (line  569)
+* BFD_RELOC_NS32K_DISP_8:                howto manager.      (line  564)
+* BFD_RELOC_NS32K_DISP_8_PCREL:          howto manager.      (line  567)
+* BFD_RELOC_NS32K_IMM_16:                howto manager.      (line  559)
+* BFD_RELOC_NS32K_IMM_16_PCREL:          howto manager.      (line  562)
+* BFD_RELOC_NS32K_IMM_32:                howto manager.      (line  560)
+* BFD_RELOC_NS32K_IMM_32_PCREL:          howto manager.      (line  563)
+* BFD_RELOC_NS32K_IMM_8:                 howto manager.      (line  558)
+* BFD_RELOC_NS32K_IMM_8_PCREL:           howto manager.      (line  561)
+* BFD_RELOC_OPENRISC_ABS_26:             howto manager.      (line 2000)
+* BFD_RELOC_OPENRISC_REL_26:             howto manager.      (line 2001)
+* BFD_RELOC_PDP11_DISP_6_PCREL:          howto manager.      (line  573)
+* BFD_RELOC_PDP11_DISP_8_PCREL:          howto manager.      (line  572)
+* BFD_RELOC_PJ_CODE_DIR16:               howto manager.      (line  578)
+* BFD_RELOC_PJ_CODE_DIR32:               howto manager.      (line  579)
+* BFD_RELOC_PJ_CODE_HI16:                howto manager.      (line  576)
+* BFD_RELOC_PJ_CODE_LO16:                howto manager.      (line  577)
+* BFD_RELOC_PJ_CODE_REL16:               howto manager.      (line  580)
+* BFD_RELOC_PJ_CODE_REL32:               howto manager.      (line  581)
+* BFD_RELOC_PPC64_ADDR16_DS:             howto manager.      (line  626)
+* BFD_RELOC_PPC64_ADDR16_LO_DS:          howto manager.      (line  627)
+* BFD_RELOC_PPC64_DTPREL16_DS:           howto manager.      (line  675)
+* BFD_RELOC_PPC64_DTPREL16_HIGHER:       howto manager.      (line  677)
+* BFD_RELOC_PPC64_DTPREL16_HIGHERA:      howto manager.      (line  678)
+* BFD_RELOC_PPC64_DTPREL16_HIGHEST:      howto manager.      (line  679)
+* BFD_RELOC_PPC64_DTPREL16_HIGHESTA:     howto manager.      (line  680)
+* BFD_RELOC_PPC64_DTPREL16_LO_DS:        howto manager.      (line  676)
+* BFD_RELOC_PPC64_GOT16_DS:              howto manager.      (line  628)
+* BFD_RELOC_PPC64_GOT16_LO_DS:           howto manager.      (line  629)
+* BFD_RELOC_PPC64_HIGHER:                howto manager.      (line  614)
+* BFD_RELOC_PPC64_HIGHER_S:              howto manager.      (line  615)
+* BFD_RELOC_PPC64_HIGHEST:               howto manager.      (line  616)
+* BFD_RELOC_PPC64_HIGHEST_S:             howto manager.      (line  617)
+* BFD_RELOC_PPC64_PLT16_LO_DS:           howto manager.      (line  630)
+* BFD_RELOC_PPC64_PLTGOT16:              howto manager.      (line  622)
+* BFD_RELOC_PPC64_PLTGOT16_DS:           howto manager.      (line  635)
+* BFD_RELOC_PPC64_PLTGOT16_HA:           howto manager.      (line  625)
+* BFD_RELOC_PPC64_PLTGOT16_HI:           howto manager.      (line  624)
+* BFD_RELOC_PPC64_PLTGOT16_LO:           howto manager.      (line  623)
+* BFD_RELOC_PPC64_PLTGOT16_LO_DS:        howto manager.      (line  636)
+* BFD_RELOC_PPC64_SECTOFF_DS:            howto manager.      (line  631)
+* BFD_RELOC_PPC64_SECTOFF_LO_DS:         howto manager.      (line  632)
+* BFD_RELOC_PPC64_TOC:                   howto manager.      (line  621)
+* BFD_RELOC_PPC64_TOC16_DS:              howto manager.      (line  633)
+* BFD_RELOC_PPC64_TOC16_HA:              howto manager.      (line  620)
+* BFD_RELOC_PPC64_TOC16_HI:              howto manager.      (line  619)
+* BFD_RELOC_PPC64_TOC16_LO:              howto manager.      (line  618)
+* BFD_RELOC_PPC64_TOC16_LO_DS:           howto manager.      (line  634)
+* BFD_RELOC_PPC64_TPREL16_DS:            howto manager.      (line  669)
+* BFD_RELOC_PPC64_TPREL16_HIGHER:        howto manager.      (line  671)
+* BFD_RELOC_PPC64_TPREL16_HIGHERA:       howto manager.      (line  672)
+* BFD_RELOC_PPC64_TPREL16_HIGHEST:       howto manager.      (line  673)
+* BFD_RELOC_PPC64_TPREL16_HIGHESTA:      howto manager.      (line  674)
+* BFD_RELOC_PPC64_TPREL16_LO_DS:         howto manager.      (line  670)
+* BFD_RELOC_PPC_B16:                     howto manager.      (line  587)
+* BFD_RELOC_PPC_B16_BRNTAKEN:            howto manager.      (line  589)
+* BFD_RELOC_PPC_B16_BRTAKEN:             howto manager.      (line  588)
+* BFD_RELOC_PPC_B26:                     howto manager.      (line  584)
+* BFD_RELOC_PPC_BA16:                    howto manager.      (line  590)
+* BFD_RELOC_PPC_BA16_BRNTAKEN:           howto manager.      (line  592)
+* BFD_RELOC_PPC_BA16_BRTAKEN:            howto manager.      (line  591)
+* BFD_RELOC_PPC_BA26:                    howto manager.      (line  585)
+* BFD_RELOC_PPC_COPY:                    howto manager.      (line  593)
+* BFD_RELOC_PPC_DTPMOD:                  howto manager.      (line  642)
+* BFD_RELOC_PPC_DTPREL:                  howto manager.      (line  652)
+* BFD_RELOC_PPC_DTPREL16:                howto manager.      (line  648)
+* BFD_RELOC_PPC_DTPREL16_HA:             howto manager.      (line  651)
+* BFD_RELOC_PPC_DTPREL16_HI:             howto manager.      (line  650)
+* BFD_RELOC_PPC_DTPREL16_LO:             howto manager.      (line  649)
+* BFD_RELOC_PPC_EMB_BIT_FLD:             howto manager.      (line  612)
+* BFD_RELOC_PPC_EMB_MRKREF:              howto manager.      (line  607)
+* BFD_RELOC_PPC_EMB_NADDR16:             howto manager.      (line  599)
+* BFD_RELOC_PPC_EMB_NADDR16_HA:          howto manager.      (line  602)
+* BFD_RELOC_PPC_EMB_NADDR16_HI:          howto manager.      (line  601)
+* BFD_RELOC_PPC_EMB_NADDR16_LO:          howto manager.      (line  600)
+* BFD_RELOC_PPC_EMB_NADDR32:             howto manager.      (line  598)
+* BFD_RELOC_PPC_EMB_RELSDA:              howto manager.      (line  613)
+* BFD_RELOC_PPC_EMB_RELSEC16:            howto manager.      (line  608)
+* BFD_RELOC_PPC_EMB_RELST_HA:            howto manager.      (line  611)
+* BFD_RELOC_PPC_EMB_RELST_HI:            howto manager.      (line  610)
+* BFD_RELOC_PPC_EMB_RELST_LO:            howto manager.      (line  609)
+* BFD_RELOC_PPC_EMB_SDA21:               howto manager.      (line  606)
+* BFD_RELOC_PPC_EMB_SDA2I16:             howto manager.      (line  604)
+* BFD_RELOC_PPC_EMB_SDA2REL:             howto manager.      (line  605)
+* BFD_RELOC_PPC_EMB_SDAI16:              howto manager.      (line  603)
+* BFD_RELOC_PPC_GLOB_DAT:                howto manager.      (line  594)
+* BFD_RELOC_PPC_GOT_DTPREL16:            howto manager.      (line  665)
+* BFD_RELOC_PPC_GOT_DTPREL16_HA:         howto manager.      (line  668)
+* BFD_RELOC_PPC_GOT_DTPREL16_HI:         howto manager.      (line  667)
+* BFD_RELOC_PPC_GOT_DTPREL16_LO:         howto manager.      (line  666)
+* BFD_RELOC_PPC_GOT_TLSGD16:             howto manager.      (line  653)
+* BFD_RELOC_PPC_GOT_TLSGD16_HA:          howto manager.      (line  656)
+* BFD_RELOC_PPC_GOT_TLSGD16_HI:          howto manager.      (line  655)
+* BFD_RELOC_PPC_GOT_TLSGD16_LO:          howto manager.      (line  654)
+* BFD_RELOC_PPC_GOT_TLSLD16:             howto manager.      (line  657)
+* BFD_RELOC_PPC_GOT_TLSLD16_HA:          howto manager.      (line  660)
+* BFD_RELOC_PPC_GOT_TLSLD16_HI:          howto manager.      (line  659)
+* BFD_RELOC_PPC_GOT_TLSLD16_LO:          howto manager.      (line  658)
+* BFD_RELOC_PPC_GOT_TPREL16:             howto manager.      (line  661)
+* BFD_RELOC_PPC_GOT_TPREL16_HA:          howto manager.      (line  664)
+* BFD_RELOC_PPC_GOT_TPREL16_HI:          howto manager.      (line  663)
+* BFD_RELOC_PPC_GOT_TPREL16_LO:          howto manager.      (line  662)
+* BFD_RELOC_PPC_JMP_SLOT:                howto manager.      (line  595)
+* BFD_RELOC_PPC_LOCAL24PC:               howto manager.      (line  597)
+* BFD_RELOC_PPC_RELATIVE:                howto manager.      (line  596)
+* BFD_RELOC_PPC_TLS:                     howto manager.      (line  639)
+* BFD_RELOC_PPC_TLSGD:                   howto manager.      (line  640)
+* BFD_RELOC_PPC_TLSLD:                   howto manager.      (line  641)
+* BFD_RELOC_PPC_TOC16:                   howto manager.      (line  586)
+* BFD_RELOC_PPC_TPREL:                   howto manager.      (line  647)
+* BFD_RELOC_PPC_TPREL16:                 howto manager.      (line  643)
+* BFD_RELOC_PPC_TPREL16_HA:              howto manager.      (line  646)
+* BFD_RELOC_PPC_TPREL16_HI:              howto manager.      (line  645)
+* BFD_RELOC_PPC_TPREL16_LO:              howto manager.      (line  644)
+* BFD_RELOC_RELC:                        howto manager.      (line 2017)
+* BFD_RELOC_RVA:                         howto manager.      (line  100)
+* BFD_RELOC_SCORE16_BRANCH:              howto manager.      (line 1623)
+* BFD_RELOC_SCORE16_JMP:                 howto manager.      (line 1620)
+* BFD_RELOC_SCORE_BCMP:                  howto manager.      (line 1626)
+* BFD_RELOC_SCORE_BRANCH:                howto manager.      (line 1611)
+* BFD_RELOC_SCORE_CALL15:                howto manager.      (line 1631)
+* BFD_RELOC_SCORE_DUMMY2:                howto manager.      (line 1607)
+* BFD_RELOC_SCORE_DUMMY_HI16:            howto manager.      (line 1632)
+* BFD_RELOC_SCORE_GOT15:                 howto manager.      (line 1629)
+* BFD_RELOC_SCORE_GOT_LO16:              howto manager.      (line 1630)
+* BFD_RELOC_SCORE_GPREL15:               howto manager.      (line 1604)
+* BFD_RELOC_SCORE_IMM30:                 howto manager.      (line 1614)
+* BFD_RELOC_SCORE_IMM32:                 howto manager.      (line 1617)
+* BFD_RELOC_SCORE_JMP:                   howto manager.      (line 1608)
+* BFD_RELOC_SH_ALIGN:                    howto manager.      (line  863)
+* BFD_RELOC_SH_CODE:                     howto manager.      (line  864)
+* BFD_RELOC_SH_COPY:                     howto manager.      (line  869)
+* BFD_RELOC_SH_COPY64:                   howto manager.      (line  894)
+* BFD_RELOC_SH_COUNT:                    howto manager.      (line  862)
+* BFD_RELOC_SH_DATA:                     howto manager.      (line  865)
+* BFD_RELOC_SH_DISP12:                   howto manager.      (line  845)
+* BFD_RELOC_SH_DISP12BY2:                howto manager.      (line  846)
+* BFD_RELOC_SH_DISP12BY4:                howto manager.      (line  847)
+* BFD_RELOC_SH_DISP12BY8:                howto manager.      (line  848)
+* BFD_RELOC_SH_DISP20:                   howto manager.      (line  849)
+* BFD_RELOC_SH_DISP20BY8:                howto manager.      (line  850)
+* BFD_RELOC_SH_GLOB_DAT:                 howto manager.      (line  870)
+* BFD_RELOC_SH_GLOB_DAT64:               howto manager.      (line  895)
+* BFD_RELOC_SH_GOT10BY4:                 howto manager.      (line  898)
+* BFD_RELOC_SH_GOT10BY8:                 howto manager.      (line  899)
+* BFD_RELOC_SH_GOT_HI16:                 howto manager.      (line  877)
+* BFD_RELOC_SH_GOT_LOW16:                howto manager.      (line  874)
+* BFD_RELOC_SH_GOT_MEDHI16:              howto manager.      (line  876)
+* BFD_RELOC_SH_GOT_MEDLOW16:             howto manager.      (line  875)
+* BFD_RELOC_SH_GOTOFF_HI16:              howto manager.      (line  889)
+* BFD_RELOC_SH_GOTOFF_LOW16:             howto manager.      (line  886)
+* BFD_RELOC_SH_GOTOFF_MEDHI16:           howto manager.      (line  888)
+* BFD_RELOC_SH_GOTOFF_MEDLOW16:          howto manager.      (line  887)
+* BFD_RELOC_SH_GOTPC:                    howto manager.      (line  873)
+* BFD_RELOC_SH_GOTPC_HI16:               howto manager.      (line  893)
+* BFD_RELOC_SH_GOTPC_LOW16:              howto manager.      (line  890)
+* BFD_RELOC_SH_GOTPC_MEDHI16:            howto manager.      (line  892)
+* BFD_RELOC_SH_GOTPC_MEDLOW16:           howto manager.      (line  891)
+* BFD_RELOC_SH_GOTPLT10BY4:              howto manager.      (line  900)
+* BFD_RELOC_SH_GOTPLT10BY8:              howto manager.      (line  901)
+* BFD_RELOC_SH_GOTPLT32:                 howto manager.      (line  902)
+* BFD_RELOC_SH_GOTPLT_HI16:              howto manager.      (line  881)
+* BFD_RELOC_SH_GOTPLT_LOW16:             howto manager.      (line  878)
+* BFD_RELOC_SH_GOTPLT_MEDHI16:           howto manager.      (line  880)
+* BFD_RELOC_SH_GOTPLT_MEDLOW16:          howto manager.      (line  879)
+* BFD_RELOC_SH_IMM3:                     howto manager.      (line  843)
+* BFD_RELOC_SH_IMM3U:                    howto manager.      (line  844)
+* BFD_RELOC_SH_IMM4:                     howto manager.      (line  851)
+* BFD_RELOC_SH_IMM4BY2:                  howto manager.      (line  852)
+* BFD_RELOC_SH_IMM4BY4:                  howto manager.      (line  853)
+* BFD_RELOC_SH_IMM8:                     howto manager.      (line  854)
+* BFD_RELOC_SH_IMM8BY2:                  howto manager.      (line  855)
+* BFD_RELOC_SH_IMM8BY4:                  howto manager.      (line  856)
+* BFD_RELOC_SH_IMM_HI16:                 howto manager.      (line  920)
+* BFD_RELOC_SH_IMM_HI16_PCREL:           howto manager.      (line  921)
+* BFD_RELOC_SH_IMM_LOW16:                howto manager.      (line  914)
+* BFD_RELOC_SH_IMM_LOW16_PCREL:          howto manager.      (line  915)
+* BFD_RELOC_SH_IMM_MEDHI16:              howto manager.      (line  918)
+* BFD_RELOC_SH_IMM_MEDHI16_PCREL:        howto manager.      (line  919)
+* BFD_RELOC_SH_IMM_MEDLOW16:             howto manager.      (line  916)
+* BFD_RELOC_SH_IMM_MEDLOW16_PCREL:       howto manager.      (line  917)
+* BFD_RELOC_SH_IMMS10:                   howto manager.      (line  908)
+* BFD_RELOC_SH_IMMS10BY2:                howto manager.      (line  909)
+* BFD_RELOC_SH_IMMS10BY4:                howto manager.      (line  910)
+* BFD_RELOC_SH_IMMS10BY8:                howto manager.      (line  911)
+* BFD_RELOC_SH_IMMS16:                   howto manager.      (line  912)
+* BFD_RELOC_SH_IMMS6:                    howto manager.      (line  905)
+* BFD_RELOC_SH_IMMS6BY32:                howto manager.      (line  906)
+* BFD_RELOC_SH_IMMU16:                   howto manager.      (line  913)
+* BFD_RELOC_SH_IMMU5:                    howto manager.      (line  904)
+* BFD_RELOC_SH_IMMU6:                    howto manager.      (line  907)
+* BFD_RELOC_SH_JMP_SLOT:                 howto manager.      (line  871)
+* BFD_RELOC_SH_JMP_SLOT64:               howto manager.      (line  896)
+* BFD_RELOC_SH_LABEL:                    howto manager.      (line  866)
+* BFD_RELOC_SH_LOOP_END:                 howto manager.      (line  868)
+* BFD_RELOC_SH_LOOP_START:               howto manager.      (line  867)
+* BFD_RELOC_SH_PCDISP12BY2:              howto manager.      (line  842)
+* BFD_RELOC_SH_PCDISP8BY2:               howto manager.      (line  841)
+* BFD_RELOC_SH_PCRELIMM8BY2:             howto manager.      (line  857)
+* BFD_RELOC_SH_PCRELIMM8BY4:             howto manager.      (line  858)
+* BFD_RELOC_SH_PLT_HI16:                 howto manager.      (line  885)
+* BFD_RELOC_SH_PLT_LOW16:                howto manager.      (line  882)
+* BFD_RELOC_SH_PLT_MEDHI16:              howto manager.      (line  884)
+* BFD_RELOC_SH_PLT_MEDLOW16:             howto manager.      (line  883)
+* BFD_RELOC_SH_PT_16:                    howto manager.      (line  922)
+* BFD_RELOC_SH_RELATIVE:                 howto manager.      (line  872)
+* BFD_RELOC_SH_RELATIVE64:               howto manager.      (line  897)
+* BFD_RELOC_SH_SHMEDIA_CODE:             howto manager.      (line  903)
+* BFD_RELOC_SH_SWITCH16:                 howto manager.      (line  859)
+* BFD_RELOC_SH_SWITCH32:                 howto manager.      (line  860)
+* BFD_RELOC_SH_TLS_DTPMOD32:             howto manager.      (line  928)
+* BFD_RELOC_SH_TLS_DTPOFF32:             howto manager.      (line  929)
+* BFD_RELOC_SH_TLS_GD_32:                howto manager.      (line  923)
+* BFD_RELOC_SH_TLS_IE_32:                howto manager.      (line  926)
+* BFD_RELOC_SH_TLS_LD_32:                howto manager.      (line  924)
+* BFD_RELOC_SH_TLS_LDO_32:               howto manager.      (line  925)
+* BFD_RELOC_SH_TLS_LE_32:                howto manager.      (line  927)
+* BFD_RELOC_SH_TLS_TPOFF32:              howto manager.      (line  930)
+* BFD_RELOC_SH_USES:                     howto manager.      (line  861)
+* BFD_RELOC_SPARC13:                     howto manager.      (line  134)
+* BFD_RELOC_SPARC22:                     howto manager.      (line  133)
+* BFD_RELOC_SPARC_10:                    howto manager.      (line  161)
+* BFD_RELOC_SPARC_11:                    howto manager.      (line  162)
+* BFD_RELOC_SPARC_5:                     howto manager.      (line  174)
+* BFD_RELOC_SPARC_6:                     howto manager.      (line  173)
+* BFD_RELOC_SPARC_64:                    howto manager.      (line  160)
+* BFD_RELOC_SPARC_7:                     howto manager.      (line  172)
+* BFD_RELOC_SPARC_BASE13:                howto manager.      (line  156)
+* BFD_RELOC_SPARC_BASE22:                howto manager.      (line  157)
+* BFD_RELOC_SPARC_COPY:                  howto manager.      (line  141)
+* BFD_RELOC_SPARC_DISP64:                howto manager.      (line  175)
+* BFD_RELOC_SPARC_GLOB_DAT:              howto manager.      (line  142)
+* BFD_RELOC_SPARC_GOT10:                 howto manager.      (line  135)
+* BFD_RELOC_SPARC_GOT13:                 howto manager.      (line  136)
+* BFD_RELOC_SPARC_GOT22:                 howto manager.      (line  137)
+* BFD_RELOC_SPARC_GOTDATA_HIX22:         howto manager.      (line  148)
+* BFD_RELOC_SPARC_GOTDATA_LOX10:         howto manager.      (line  149)
+* BFD_RELOC_SPARC_GOTDATA_OP:            howto manager.      (line  152)
+* BFD_RELOC_SPARC_GOTDATA_OP_HIX22:      howto manager.      (line  150)
+* BFD_RELOC_SPARC_GOTDATA_OP_LOX10:      howto manager.      (line  151)
+* BFD_RELOC_SPARC_H44:                   howto manager.      (line  180)
+* BFD_RELOC_SPARC_HH22:                  howto manager.      (line  164)
+* BFD_RELOC_SPARC_HIX22:                 howto manager.      (line  178)
+* BFD_RELOC_SPARC_HM10:                  howto manager.      (line  165)
+* BFD_RELOC_SPARC_JMP_SLOT:              howto manager.      (line  143)
+* BFD_RELOC_SPARC_L44:                   howto manager.      (line  182)
+* BFD_RELOC_SPARC_LM22:                  howto manager.      (line  166)
+* BFD_RELOC_SPARC_LOX10:                 howto manager.      (line  179)
+* BFD_RELOC_SPARC_M44:                   howto manager.      (line  181)
+* BFD_RELOC_SPARC_OLO10:                 howto manager.      (line  163)
+* BFD_RELOC_SPARC_PC10:                  howto manager.      (line  138)
+* BFD_RELOC_SPARC_PC22:                  howto manager.      (line  139)
+* BFD_RELOC_SPARC_PC_HH22:               howto manager.      (line  167)
+* BFD_RELOC_SPARC_PC_HM10:               howto manager.      (line  168)
+* BFD_RELOC_SPARC_PC_LM22:               howto manager.      (line  169)
+* BFD_RELOC_SPARC_PLT32:                 howto manager.      (line  176)
+* BFD_RELOC_SPARC_PLT64:                 howto manager.      (line  177)
+* BFD_RELOC_SPARC_REGISTER:              howto manager.      (line  183)
+* BFD_RELOC_SPARC_RELATIVE:              howto manager.      (line  144)
+* BFD_RELOC_SPARC_REV32:                 howto manager.      (line  186)
+* BFD_RELOC_SPARC_TLS_DTPMOD32:          howto manager.      (line  207)
+* BFD_RELOC_SPARC_TLS_DTPMOD64:          howto manager.      (line  208)
+* BFD_RELOC_SPARC_TLS_DTPOFF32:          howto manager.      (line  209)
+* BFD_RELOC_SPARC_TLS_DTPOFF64:          howto manager.      (line  210)
+* BFD_RELOC_SPARC_TLS_GD_ADD:            howto manager.      (line  191)
+* BFD_RELOC_SPARC_TLS_GD_CALL:           howto manager.      (line  192)
+* BFD_RELOC_SPARC_TLS_GD_HI22:           howto manager.      (line  189)
+* BFD_RELOC_SPARC_TLS_GD_LO10:           howto manager.      (line  190)
+* BFD_RELOC_SPARC_TLS_IE_ADD:            howto manager.      (line  204)
+* BFD_RELOC_SPARC_TLS_IE_HI22:           howto manager.      (line  200)
+* BFD_RELOC_SPARC_TLS_IE_LD:             howto manager.      (line  202)
+* BFD_RELOC_SPARC_TLS_IE_LDX:            howto manager.      (line  203)
+* BFD_RELOC_SPARC_TLS_IE_LO10:           howto manager.      (line  201)
+* BFD_RELOC_SPARC_TLS_LDM_ADD:           howto manager.      (line  195)
+* BFD_RELOC_SPARC_TLS_LDM_CALL:          howto manager.      (line  196)
+* BFD_RELOC_SPARC_TLS_LDM_HI22:          howto manager.      (line  193)
+* BFD_RELOC_SPARC_TLS_LDM_LO10:          howto manager.      (line  194)
+* BFD_RELOC_SPARC_TLS_LDO_ADD:           howto manager.      (line  199)
+* BFD_RELOC_SPARC_TLS_LDO_HIX22:         howto manager.      (line  197)
+* BFD_RELOC_SPARC_TLS_LDO_LOX10:         howto manager.      (line  198)
+* BFD_RELOC_SPARC_TLS_LE_HIX22:          howto manager.      (line  205)
+* BFD_RELOC_SPARC_TLS_LE_LOX10:          howto manager.      (line  206)
+* BFD_RELOC_SPARC_TLS_TPOFF32:           howto manager.      (line  211)
+* BFD_RELOC_SPARC_TLS_TPOFF64:           howto manager.      (line  212)
+* BFD_RELOC_SPARC_UA16:                  howto manager.      (line  145)
+* BFD_RELOC_SPARC_UA32:                  howto manager.      (line  146)
+* BFD_RELOC_SPARC_UA64:                  howto manager.      (line  147)
+* BFD_RELOC_SPARC_WDISP16:               howto manager.      (line  170)
+* BFD_RELOC_SPARC_WDISP19:               howto manager.      (line  171)
+* BFD_RELOC_SPARC_WDISP22:               howto manager.      (line  132)
+* BFD_RELOC_SPARC_WPLT30:                howto manager.      (line  140)
+* BFD_RELOC_SPU_ADD_PIC:                 howto manager.      (line  229)
+* BFD_RELOC_SPU_HI16:                    howto manager.      (line  226)
+* BFD_RELOC_SPU_IMM10:                   howto manager.      (line  217)
+* BFD_RELOC_SPU_IMM10W:                  howto manager.      (line  218)
+* BFD_RELOC_SPU_IMM16:                   howto manager.      (line  219)
+* BFD_RELOC_SPU_IMM16W:                  howto manager.      (line  220)
+* BFD_RELOC_SPU_IMM18:                   howto manager.      (line  221)
+* BFD_RELOC_SPU_IMM7:                    howto manager.      (line  215)
+* BFD_RELOC_SPU_IMM8:                    howto manager.      (line  216)
+* BFD_RELOC_SPU_LO16:                    howto manager.      (line  225)
+* BFD_RELOC_SPU_PCREL16:                 howto manager.      (line  224)
+* BFD_RELOC_SPU_PCREL9a:                 howto manager.      (line  222)
+* BFD_RELOC_SPU_PCREL9b:                 howto manager.      (line  223)
+* BFD_RELOC_SPU_PPU32:                   howto manager.      (line  227)
+* BFD_RELOC_SPU_PPU64:                   howto manager.      (line  228)
+* BFD_RELOC_THUMB_PCREL_BLX:             howto manager.      (line  701)
+* BFD_RELOC_THUMB_PCREL_BRANCH12:        howto manager.      (line  715)
+* BFD_RELOC_THUMB_PCREL_BRANCH20:        howto manager.      (line  716)
+* BFD_RELOC_THUMB_PCREL_BRANCH23:        howto manager.      (line  717)
+* BFD_RELOC_THUMB_PCREL_BRANCH25:        howto manager.      (line  718)
+* BFD_RELOC_THUMB_PCREL_BRANCH7:         howto manager.      (line  713)
+* BFD_RELOC_THUMB_PCREL_BRANCH9:         howto manager.      (line  714)
+* BFD_RELOC_TIC30_LDP:                   howto manager.      (line 1257)
+* BFD_RELOC_TIC54X_16_OF_23:             howto manager.      (line 1275)
+* BFD_RELOC_TIC54X_23:                   howto manager.      (line 1272)
+* BFD_RELOC_TIC54X_MS7_OF_23:            howto manager.      (line 1280)
+* BFD_RELOC_TIC54X_PARTLS7:              howto manager.      (line 1262)
+* BFD_RELOC_TIC54X_PARTMS9:              howto manager.      (line 1267)
+* bfd_reloc_type_lookup:                 howto manager.      (line 2234)
+* BFD_RELOC_V850_22_PCREL:               howto manager.      (line 1184)
+* BFD_RELOC_V850_9_PCREL:                howto manager.      (line 1181)
+* BFD_RELOC_V850_ALIGN:                  howto manager.      (line 1242)
+* BFD_RELOC_V850_CALLT_16_16_OFFSET:     howto manager.      (line 1233)
+* BFD_RELOC_V850_CALLT_6_7_OFFSET:       howto manager.      (line 1230)
+* BFD_RELOC_V850_LO16_SPLIT_OFFSET:      howto manager.      (line 1245)
+* BFD_RELOC_V850_LONGCALL:               howto manager.      (line 1236)
+* BFD_RELOC_V850_LONGJUMP:               howto manager.      (line 1239)
+* BFD_RELOC_V850_SDA_15_16_OFFSET:       howto manager.      (line 1190)
+* BFD_RELOC_V850_SDA_16_16_OFFSET:       howto manager.      (line 1187)
+* BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET: howto manager.      (line 1222)
+* BFD_RELOC_V850_TDA_16_16_OFFSET:       howto manager.      (line 1212)
+* BFD_RELOC_V850_TDA_4_4_OFFSET:         howto manager.      (line 1219)
+* BFD_RELOC_V850_TDA_4_5_OFFSET:         howto manager.      (line 1215)
+* BFD_RELOC_V850_TDA_6_8_OFFSET:         howto manager.      (line 1201)
+* BFD_RELOC_V850_TDA_7_7_OFFSET:         howto manager.      (line 1209)
+* BFD_RELOC_V850_TDA_7_8_OFFSET:         howto manager.      (line 1205)
+* BFD_RELOC_V850_ZDA_15_16_OFFSET:       howto manager.      (line 1197)
+* BFD_RELOC_V850_ZDA_16_16_OFFSET:       howto manager.      (line 1194)
+* BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET: howto manager.      (line 1226)
+* BFD_RELOC_VAX_GLOB_DAT:                howto manager.      (line 2026)
+* BFD_RELOC_VAX_JMP_SLOT:                howto manager.      (line 2027)
+* BFD_RELOC_VAX_RELATIVE:                howto manager.      (line 2028)
+* BFD_RELOC_VPE4KMATH_DATA:              howto manager.      (line 1665)
+* BFD_RELOC_VPE4KMATH_INSN:              howto manager.      (line 1666)
+* BFD_RELOC_VTABLE_ENTRY:                howto manager.      (line 1670)
+* BFD_RELOC_VTABLE_INHERIT:              howto manager.      (line 1669)
+* BFD_RELOC_X86_64_32S:                  howto manager.      (line  536)
+* BFD_RELOC_X86_64_COPY:                 howto manager.      (line  531)
+* BFD_RELOC_X86_64_DTPMOD64:             howto manager.      (line  537)
+* BFD_RELOC_X86_64_DTPOFF32:             howto manager.      (line  542)
+* BFD_RELOC_X86_64_DTPOFF64:             howto manager.      (line  538)
+* BFD_RELOC_X86_64_GLOB_DAT:             howto manager.      (line  532)
+* BFD_RELOC_X86_64_GOT32:                howto manager.      (line  529)
+* BFD_RELOC_X86_64_GOT64:                howto manager.      (line  547)
+* BFD_RELOC_X86_64_GOTOFF64:             howto manager.      (line  545)
+* BFD_RELOC_X86_64_GOTPC32:              howto manager.      (line  546)
+* BFD_RELOC_X86_64_GOTPC32_TLSDESC:      howto manager.      (line  552)
+* BFD_RELOC_X86_64_GOTPC64:              howto manager.      (line  549)
+* BFD_RELOC_X86_64_GOTPCREL:             howto manager.      (line  535)
+* BFD_RELOC_X86_64_GOTPCREL64:           howto manager.      (line  548)
+* BFD_RELOC_X86_64_GOTPLT64:             howto manager.      (line  550)
+* BFD_RELOC_X86_64_GOTTPOFF:             howto manager.      (line  543)
+* BFD_RELOC_X86_64_IRELATIVE:            howto manager.      (line  555)
+* BFD_RELOC_X86_64_JUMP_SLOT:            howto manager.      (line  533)
+* BFD_RELOC_X86_64_PLT32:                howto manager.      (line  530)
+* BFD_RELOC_X86_64_PLTOFF64:             howto manager.      (line  551)
+* BFD_RELOC_X86_64_RELATIVE:             howto manager.      (line  534)
+* BFD_RELOC_X86_64_TLSDESC:              howto manager.      (line  554)
+* BFD_RELOC_X86_64_TLSDESC_CALL:         howto manager.      (line  553)
+* BFD_RELOC_X86_64_TLSGD:                howto manager.      (line  540)
+* BFD_RELOC_X86_64_TLSLD:                howto manager.      (line  541)
+* BFD_RELOC_X86_64_TPOFF32:              howto manager.      (line  544)
+* BFD_RELOC_X86_64_TPOFF64:              howto manager.      (line  539)
+* BFD_RELOC_XC16X_PAG:                   howto manager.      (line 2020)
+* BFD_RELOC_XC16X_POF:                   howto manager.      (line 2021)
+* BFD_RELOC_XC16X_SEG:                   howto manager.      (line 2022)
+* BFD_RELOC_XC16X_SOF:                   howto manager.      (line 2023)
+* BFD_RELOC_XSTORMY16_12:                howto manager.      (line 2012)
+* BFD_RELOC_XSTORMY16_24:                howto manager.      (line 2013)
+* BFD_RELOC_XSTORMY16_FPTR16:            howto manager.      (line 2014)
+* BFD_RELOC_XSTORMY16_REL_12:            howto manager.      (line 2011)
+* BFD_RELOC_XTENSA_ASM_EXPAND:           howto manager.      (line 2132)
+* BFD_RELOC_XTENSA_ASM_SIMPLIFY:         howto manager.      (line 2137)
+* BFD_RELOC_XTENSA_DIFF16:               howto manager.      (line 2079)
+* BFD_RELOC_XTENSA_DIFF32:               howto manager.      (line 2080)
+* BFD_RELOC_XTENSA_DIFF8:                howto manager.      (line 2078)
+* BFD_RELOC_XTENSA_GLOB_DAT:             howto manager.      (line 2068)
+* BFD_RELOC_XTENSA_JMP_SLOT:             howto manager.      (line 2069)
+* BFD_RELOC_XTENSA_OP0:                  howto manager.      (line 2126)
+* BFD_RELOC_XTENSA_OP1:                  howto manager.      (line 2127)
+* BFD_RELOC_XTENSA_OP2:                  howto manager.      (line 2128)
+* BFD_RELOC_XTENSA_PLT:                  howto manager.      (line 2073)
+* BFD_RELOC_XTENSA_RELATIVE:             howto manager.      (line 2070)
+* BFD_RELOC_XTENSA_RTLD:                 howto manager.      (line 2063)
+* BFD_RELOC_XTENSA_SLOT0_ALT:            howto manager.      (line 2108)
+* BFD_RELOC_XTENSA_SLOT0_OP:             howto manager.      (line 2088)
+* BFD_RELOC_XTENSA_SLOT10_ALT:           howto manager.      (line 2118)
+* BFD_RELOC_XTENSA_SLOT10_OP:            howto manager.      (line 2098)
+* BFD_RELOC_XTENSA_SLOT11_ALT:           howto manager.      (line 2119)
+* BFD_RELOC_XTENSA_SLOT11_OP:            howto manager.      (line 2099)
+* BFD_RELOC_XTENSA_SLOT12_ALT:           howto manager.      (line 2120)
+* BFD_RELOC_XTENSA_SLOT12_OP:            howto manager.      (line 2100)
+* BFD_RELOC_XTENSA_SLOT13_ALT:           howto manager.      (line 2121)
+* BFD_RELOC_XTENSA_SLOT13_OP:            howto manager.      (line 2101)
+* BFD_RELOC_XTENSA_SLOT14_ALT:           howto manager.      (line 2122)
+* BFD_RELOC_XTENSA_SLOT14_OP:            howto manager.      (line 2102)
+* BFD_RELOC_XTENSA_SLOT1_ALT:            howto manager.      (line 2109)
+* BFD_RELOC_XTENSA_SLOT1_OP:             howto manager.      (line 2089)
+* BFD_RELOC_XTENSA_SLOT2_ALT:            howto manager.      (line 2110)
+* BFD_RELOC_XTENSA_SLOT2_OP:             howto manager.      (line 2090)
+* BFD_RELOC_XTENSA_SLOT3_ALT:            howto manager.      (line 2111)
+* BFD_RELOC_XTENSA_SLOT3_OP:             howto manager.      (line 2091)
+* BFD_RELOC_XTENSA_SLOT4_ALT:            howto manager.      (line 2112)
+* BFD_RELOC_XTENSA_SLOT4_OP:             howto manager.      (line 2092)
+* BFD_RELOC_XTENSA_SLOT5_ALT:            howto manager.      (line 2113)
+* BFD_RELOC_XTENSA_SLOT5_OP:             howto manager.      (line 2093)
+* BFD_RELOC_XTENSA_SLOT6_ALT:            howto manager.      (line 2114)
+* BFD_RELOC_XTENSA_SLOT6_OP:             howto manager.      (line 2094)
+* BFD_RELOC_XTENSA_SLOT7_ALT:            howto manager.      (line 2115)
+* BFD_RELOC_XTENSA_SLOT7_OP:             howto manager.      (line 2095)
+* BFD_RELOC_XTENSA_SLOT8_ALT:            howto manager.      (line 2116)
+* BFD_RELOC_XTENSA_SLOT8_OP:             howto manager.      (line 2096)
+* BFD_RELOC_XTENSA_SLOT9_ALT:            howto manager.      (line 2117)
+* BFD_RELOC_XTENSA_SLOT9_OP:             howto manager.      (line 2097)
+* BFD_RELOC_XTENSA_TLS_ARG:              howto manager.      (line 2147)
+* BFD_RELOC_XTENSA_TLS_CALL:             howto manager.      (line 2148)
+* BFD_RELOC_XTENSA_TLS_DTPOFF:           howto manager.      (line 2144)
+* BFD_RELOC_XTENSA_TLS_FUNC:             howto manager.      (line 2146)
+* BFD_RELOC_XTENSA_TLS_TPOFF:            howto manager.      (line 2145)
+* BFD_RELOC_XTENSA_TLSDESC_ARG:          howto manager.      (line 2143)
+* BFD_RELOC_XTENSA_TLSDESC_FN:           howto manager.      (line 2142)
+* BFD_RELOC_Z80_DISP8:                   howto manager.      (line 2151)
+* BFD_RELOC_Z8K_CALLR:                   howto manager.      (line 2157)
+* BFD_RELOC_Z8K_DISP7:                   howto manager.      (line 2154)
+* BFD_RELOC_Z8K_IMM4L:                   howto manager.      (line 2160)
+* bfd_scan_arch:                         Architectures.      (line  433)
+* bfd_scan_vma:                          BFD front end.      (line  513)
+* bfd_seach_for_target:                  bfd_target.         (line  470)
+* bfd_section_already_linked:            Writing the symbol table.
+                                                             (line   55)
+* bfd_section_list_clear:                section prototypes. (line    8)
+* bfd_sections_find_if:                  section prototypes. (line  176)
+* bfd_set_arch_info:                     Architectures.      (line  474)
+* bfd_set_archive_head:                  Archives.           (line   69)
+* bfd_set_default_target:                bfd_target.         (line  435)
+* bfd_set_error:                         BFD front end.      (line  323)
+* bfd_set_error_handler:                 BFD front end.      (line  365)
+* bfd_set_error_program_name:            BFD front end.      (line  374)
+* bfd_set_file_flags:                    BFD front end.      (line  433)
+* bfd_set_format:                        Formats.            (line   68)
+* bfd_set_gp_size:                       BFD front end.      (line  503)
+* bfd_set_private_flags:                 BFD front end.      (line  580)
+* bfd_set_reloc:                         BFD front end.      (line  423)
+* bfd_set_section_contents:              section prototypes. (line  207)
+* bfd_set_section_flags:                 section prototypes. (line  140)
+* bfd_set_section_size:                  section prototypes. (line  193)
+* bfd_set_start_address:                 BFD front end.      (line  482)
+* bfd_set_symtab:                        symbol handling functions.
+                                                             (line   60)
+* bfd_symbol_info:                       symbol handling functions.
+                                                             (line  130)
+* bfd_target_list:                       bfd_target.         (line  461)
+* bfd_write_bigendian_4byte_int:         Internal.           (line   13)
+* bfd_zalloc:                            Opening and Closing.
+                                                             (line  228)
+* bfd_zalloc2:                           Opening and Closing.
+                                                             (line  237)
+* coff_symbol_type:                      coff.               (line  244)
+* core_file_matches_executable_p:        Core Files.         (line   30)
+* find_separate_debug_file:              Opening and Closing.
+                                                             (line  279)
+* generic_core_file_matches_executable_p: Core Files.        (line   40)
+* get_debug_link_info:                   Opening and Closing.
+                                                             (line  260)
+* Hash tables:                           Hash Tables.        (line    6)
+* internal object-file format:           Canonical format.   (line   11)
+* Linker:                                Linker Functions.   (line    6)
+* Other functions:                       BFD front end.      (line  595)
+* separate_debug_file_exists:            Opening and Closing.
+                                                             (line  270)
+* struct bfd_iovec:                      BFD front end.      (line  798)
+* target vector (_bfd_final_link):       Performing the Final Link.
+                                                             (line    6)
+* target vector (_bfd_link_add_symbols): Adding Symbols to the Hash Table.
+                                                             (line    6)
+* target vector (_bfd_link_hash_table_create): Creating a Linker Hash Table.
+                                                             (line    6)
+* The HOWTO Macro:                       typedef arelent.    (line  291)
+* what is it?:                           Overview.           (line    6)
+
+
+
+Tag Table:
+Node: Top1086
+Node: Overview1425
+Node: History2476
+Node: How It Works3422
+Node: What BFD Version 2 Can Do4965
+Node: BFD information loss6280
+Node: Canonical format8812
+Node: BFD front end13184
+Node: Memory Usage44492
+Node: Initialization45720
+Node: Sections46179
+Node: Section Input46662
+Node: Section Output48027
+Node: typedef asection50513
+Node: section prototypes75844
+Node: Symbols85524
+Node: Reading Symbols87119
+Node: Writing Symbols88226
+Node: Mini Symbols89935
+Node: typedef asymbol90909
+Node: symbol handling functions96968
+Node: Archives102310
+Node: Formats106036
+Node: Relocations108984
+Node: typedef arelent109711
+Node: howto manager125522
+Node: Core Files197823
+Node: Targets199640
+Node: bfd_target201610
+Node: Architectures222189
+Node: Opening and Closing245372
+Node: Internal256636
+Node: File Caching262969
+Node: Linker Functions264883
+Node: Creating a Linker Hash Table266556
+Node: Adding Symbols to the Hash Table268294
+Node: Differing file formats269194
+Node: Adding symbols from an object file270919
+Node: Adding symbols from an archive273070
+Node: Performing the Final Link275484
+Node: Information provided by the linker276726
+Node: Relocating the section contents277880
+Node: Writing the symbol table279631
+Node: Hash Tables283646
+Node: Creating and Freeing a Hash Table284844
+Node: Looking Up or Entering a String286094
+Node: Traversing a Hash Table287347
+Node: Deriving a New Hash Table Type288136
+Node: Define the Derived Structures289202
+Node: Write the Derived Creation Routine290283
+Node: Write Other Derived Routines292907
+Node: BFD back ends294222
+Node: What to Put Where294492
+Node: aout294672
+Node: coff300990
+Node: elf329423
+Node: mmo329824
+Node: File layout330752
+Node: Symbol-table336399
+Node: mmo section mapping340168
+Node: GNU Free Documentation License343820
+Node: BFD Index368903
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/binutils.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/binutils.info
new file mode 100644
index 00000000..8f631d54
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/binutils.info
@@ -0,0 +1,4493 @@
+This is binutils.info, produced by makeinfo version 4.13 from
+../../../../binutils-2.20/binutils/doc/binutils.texi.
+
+Copyright (C) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free
+Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Binutils: (binutils).         The GNU binary utilities.
+END-INFO-DIR-ENTRY
+
+INFO-DIR-SECTION Individual utilities
+START-INFO-DIR-ENTRY
+* addr2line: (binutils)addr2line. Convert addresses to file and line.
+* ar: (binutils)ar.               Create, modify, and extract from archives.
+* c++filt: (binutils)c++filt.	  Filter to demangle encoded C++ symbols.
+* cxxfilt: (binutils)c++filt.     MS-DOS name for c++filt.
+* dlltool: (binutils)dlltool.	  Create files needed to build and use DLLs.
+* nlmconv: (binutils)nlmconv.     Converts object code into an NLM.
+* nm: (binutils)nm.               List symbols from object files.
+* objcopy: (binutils)objcopy.	  Copy and translate object files.
+* objdump: (binutils)objdump.     Display information from object files.
+* ranlib: (binutils)ranlib.       Generate index to archive contents.
+* readelf: (binutils)readelf.	  Display the contents of ELF format files.
+* size: (binutils)size.           List section sizes and total size.
+* strings: (binutils)strings.     List printable strings from files.
+* strip: (binutils)strip.         Discard symbols.
+* windmc: (binutils)windmc.	  Generator for Windows message resources.
+* windres: (binutils)windres.	  Manipulate Windows resources.
+END-INFO-DIR-ENTRY
+
+
+File: binutils.info,  Node: Top,  Next: ar,  Up: (dir)
+
+Introduction
+************
+
+This brief manual contains documentation for the GNU binary utilities
+(GNU Binutils) version 2.20:
+
+   This document is distributed under the terms of the GNU Free
+Documentation License version 1.3.  A copy of the license is included
+in the section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* ar::                          Create, modify, and extract from archives
+* nm::                          List symbols from object files
+* objcopy::			Copy and translate object files
+* objdump::                     Display information from object files
+* ranlib::                      Generate index to archive contents
+* readelf::                     Display the contents of ELF format files
+* size::                        List section sizes and total size
+* strings::                     List printable strings from files
+* strip::                       Discard symbols
+* c++filt::			Filter to demangle encoded C++ symbols
+* cxxfilt: c++filt.             MS-DOS name for c++filt
+* addr2line::			Convert addresses to file and line
+* nlmconv::                     Converts object code into an NLM
+* windres::			Manipulate Windows resources
+* windmc::			Generator for Windows message resources
+* dlltool::			Create files needed to build and use DLLs
+* Common Options::              Command-line options for all utilities
+* Selecting the Target System:: How these utilities determine the target
+* Reporting Bugs::              Reporting Bugs
+* GNU Free Documentation License::  GNU Free Documentation License
+* Binutils Index::              Binutils Index
+
+
+File: binutils.info,  Node: ar,  Next: nm,  Prev: Top,  Up: Top
+
+1 ar
+****
+
+     ar [`--plugin' NAME] [-]P[MOD [RELPOS] [COUNT]] ARCHIVE [MEMBER...]
+     ar -M [ <mri-script ]
+
+   The GNU `ar' program creates, modifies, and extracts from archives.
+An "archive" is a single file holding a collection of other files in a
+structure that makes it possible to retrieve the original individual
+files (called "members" of the archive).
+
+   The original files' contents, mode (permissions), timestamp, owner,
+and group are preserved in the archive, and can be restored on
+extraction.
+
+   GNU `ar' can maintain archives whose members have names of any
+length; however, depending on how `ar' is configured on your system, a
+limit on member-name length may be imposed for compatibility with
+archive formats maintained with other tools.  If it exists, the limit
+is often 15 characters (typical of formats related to a.out) or 16
+characters (typical of formats related to coff).
+
+   `ar' is considered a binary utility because archives of this sort
+are most often used as "libraries" holding commonly needed subroutines.
+
+   `ar' creates an index to the symbols defined in relocatable object
+modules in the archive when you specify the modifier `s'.  Once
+created, this index is updated in the archive whenever `ar' makes a
+change to its contents (save for the `q' update operation).  An archive
+with such an index speeds up linking to the library, and allows
+routines in the library to call each other without regard to their
+placement in the archive.
+
+   You may use `nm -s' or `nm --print-armap' to list this index table.
+If an archive lacks the table, another form of `ar' called `ranlib' can
+be used to add just the table.
+
+   GNU `ar' can optionally create a _thin_ archive, which contains a
+symbol index and references to the original copies of the member files
+of the archives.  Such an archive is useful for building libraries for
+use within a local build, where the relocatable objects are expected to
+remain available, and copying the contents of each object would only
+waste time and space.  Thin archives are also _flattened_, so that
+adding one or more archives to a thin archive will add the elements of
+the nested archive individually.  The paths to the elements of the
+archive are stored relative to the archive itself.
+
+   GNU `ar' is designed to be compatible with two different facilities.
+You can control its activity using command-line options, like the
+different varieties of `ar' on Unix systems; or, if you specify the
+single command-line option `-M', you can control it with a script
+supplied via standard input, like the MRI "librarian" program.
+
+* Menu:
+
+* ar cmdline::                  Controlling `ar' on the command line
+* ar scripts::                  Controlling `ar' with a script
+
+
+File: binutils.info,  Node: ar cmdline,  Next: ar scripts,  Up: ar
+
+1.1 Controlling `ar' on the Command Line
+========================================
+
+     ar [`--plugin' NAME] [`-X32_64'] [`-']P[MOD [RELPOS] [COUNT]] ARCHIVE [MEMBER...]
+
+   When you use `ar' in the Unix style, `ar' insists on at least two
+arguments to execute: one keyletter specifying the _operation_
+(optionally accompanied by other keyletters specifying _modifiers_),
+and the archive name to act on.
+
+   Most operations can also accept further MEMBER arguments, specifying
+particular files to operate on.
+
+   GNU `ar' allows you to mix the operation code P and modifier flags
+MOD in any order, within the first command-line argument.
+
+   If you wish, you may begin the first command-line argument with a
+dash.
+
+   The P keyletter specifies what operation to execute; it may be any
+of the following, but you must specify only one of them:
+
+`d'
+     _Delete_ modules from the archive.  Specify the names of modules to
+     be deleted as MEMBER...; the archive is untouched if you specify
+     no files to delete.
+
+     If you specify the `v' modifier, `ar' lists each module as it is
+     deleted.
+
+`m'
+     Use this operation to _move_ members in an archive.
+
+     The ordering of members in an archive can make a difference in how
+     programs are linked using the library, if a symbol is defined in
+     more than one member.
+
+     If no modifiers are used with `m', any members you name in the
+     MEMBER arguments are moved to the _end_ of the archive; you can
+     use the `a', `b', or `i' modifiers to move them to a specified
+     place instead.
+
+`p'
+     _Print_ the specified members of the archive, to the standard
+     output file.  If the `v' modifier is specified, show the member
+     name before copying its contents to standard output.
+
+     If you specify no MEMBER arguments, all the files in the archive
+     are printed.
+
+`q'
+     _Quick append_; Historically, add the files MEMBER... to the end of
+     ARCHIVE, without checking for replacement.
+
+     The modifiers `a', `b', and `i' do _not_ affect this operation;
+     new members are always placed at the end of the archive.
+
+     The modifier `v' makes `ar' list each file as it is appended.
+
+     Since the point of this operation is speed, the archive's symbol
+     table index is not updated, even if it already existed; you can
+     use `ar s' or `ranlib' explicitly to update the symbol table index.
+
+     However, too many different systems assume quick append rebuilds
+     the index, so GNU `ar' implements `q' as a synonym for `r'.
+
+`r'
+     Insert the files MEMBER... into ARCHIVE (with _replacement_). This
+     operation differs from `q' in that any previously existing members
+     are deleted if their names match those being added.
+
+     If one of the files named in MEMBER... does not exist, `ar'
+     displays an error message, and leaves undisturbed any existing
+     members of the archive matching that name.
+
+     By default, new members are added at the end of the file; but you
+     may use one of the modifiers `a', `b', or `i' to request placement
+     relative to some existing member.
+
+     The modifier `v' used with this operation elicits a line of output
+     for each file inserted, along with one of the letters `a' or `r'
+     to indicate whether the file was appended (no old member deleted)
+     or replaced.
+
+`t'
+     Display a _table_ listing the contents of ARCHIVE, or those of the
+     files listed in MEMBER... that are present in the archive.
+     Normally only the member name is shown; if you also want to see
+     the modes (permissions), timestamp, owner, group, and size, you can
+     request that by also specifying the `v' modifier.
+
+     If you do not specify a MEMBER, all files in the archive are
+     listed.
+
+     If there is more than one file with the same name (say, `fie') in
+     an archive (say `b.a'), `ar t b.a fie' lists only the first
+     instance; to see them all, you must ask for a complete listing--in
+     our example, `ar t b.a'.
+
+`x'
+     _Extract_ members (named MEMBER) from the archive.  You can use
+     the `v' modifier with this operation, to request that `ar' list
+     each name as it extracts it.
+
+     If you do not specify a MEMBER, all files in the archive are
+     extracted.
+
+     Files cannot be extracted from a thin archive.
+
+
+   A number of modifiers (MOD) may immediately follow the P keyletter,
+to specify variations on an operation's behavior:
+
+`a'
+     Add new files _after_ an existing member of the archive.  If you
+     use the modifier `a', the name of an existing archive member must
+     be present as the RELPOS argument, before the ARCHIVE
+     specification.
+
+`b'
+     Add new files _before_ an existing member of the archive.  If you
+     use the modifier `b', the name of an existing archive member must
+     be present as the RELPOS argument, before the ARCHIVE
+     specification.  (same as `i').
+
+`c'
+     _Create_ the archive.  The specified ARCHIVE is always created if
+     it did not exist, when you request an update.  But a warning is
+     issued unless you specify in advance that you expect to create it,
+     by using this modifier.
+
+`D'
+     Operate in _deterministic_ mode.  When adding files and the archive
+     index use zero for UIDs, GIDs, timestamps, and use consistent file
+     modes for all files.  When this option is used, if `ar' is used
+     with identical options and identical input files, multiple runs
+     will create identical output files regardless of the input files'
+     owners, groups, file modes, or modification times.
+
+`f'
+     Truncate names in the archive.  GNU `ar' will normally permit file
+     names of any length.  This will cause it to create archives which
+     are not compatible with the native `ar' program on some systems.
+     If this is a concern, the `f' modifier may be used to truncate file
+     names when putting them in the archive.
+
+`i'
+     Insert new files _before_ an existing member of the archive.  If
+     you use the modifier `i', the name of an existing archive member
+     must be present as the RELPOS argument, before the ARCHIVE
+     specification.  (same as `b').
+
+`l'
+     This modifier is accepted but not used.
+
+`N'
+     Uses the COUNT parameter.  This is used if there are multiple
+     entries in the archive with the same name.  Extract or delete
+     instance COUNT of the given name from the archive.
+
+`o'
+     Preserve the _original_ dates of members when extracting them.  If
+     you do not specify this modifier, files extracted from the archive
+     are stamped with the time of extraction.
+
+`P'
+     Use the full path name when matching names in the archive.  GNU
+     `ar' can not create an archive with a full path name (such archives
+     are not POSIX complaint), but other archive creators can.  This
+     option will cause GNU `ar' to match file names using a complete
+     path name, which can be convenient when extracting a single file
+     from an archive created by another tool.
+
+`s'
+     Write an object-file index into the archive, or update an existing
+     one, even if no other change is made to the archive.  You may use
+     this modifier flag either with any operation, or alone.  Running
+     `ar s' on an archive is equivalent to running `ranlib' on it.
+
+`S'
+     Do not generate an archive symbol table.  This can speed up
+     building a large library in several steps.  The resulting archive
+     can not be used with the linker.  In order to build a symbol
+     table, you must omit the `S' modifier on the last execution of
+     `ar', or you must run `ranlib' on the archive.
+
+`T'
+     Make the specified ARCHIVE a _thin_ archive.  If it already exists
+     and is a regular archive, the existing members must be present in
+     the same directory as ARCHIVE.
+
+`u'
+     Normally, `ar r'... inserts all files listed into the archive.  If
+     you would like to insert _only_ those of the files you list that
+     are newer than existing members of the same names, use this
+     modifier.  The `u' modifier is allowed only for the operation `r'
+     (replace).  In particular, the combination `qu' is not allowed,
+     since checking the timestamps would lose any speed advantage from
+     the operation `q'.
+
+`v'
+     This modifier requests the _verbose_ version of an operation.  Many
+     operations display additional information, such as filenames
+     processed, when the modifier `v' is appended.
+
+`V'
+     This modifier shows the version number of `ar'.
+
+   `ar' ignores an initial option spelt `-X32_64', for compatibility
+with AIX.  The behaviour produced by this option is the default for GNU
+`ar'.  `ar' does not support any of the other `-X' options; in
+particular, it does not support `-X32' which is the default for AIX
+`ar'.
+
+   The optional command line switch `--plugin' NAME causes `ar' to load
+the plugin called NAME which adds support for more file formats.  This
+option is only available if the toolchain has been built with plugin
+support enabled.
+
+
+File: binutils.info,  Node: ar scripts,  Prev: ar cmdline,  Up: ar
+
+1.2 Controlling `ar' with a Script
+==================================
+
+     ar -M [ <SCRIPT ]
+
+   If you use the single command-line option `-M' with `ar', you can
+control its operation with a rudimentary command language.  This form
+of `ar' operates interactively if standard input is coming directly
+from a terminal.  During interactive use, `ar' prompts for input (the
+prompt is `AR >'), and continues executing even after errors.  If you
+redirect standard input to a script file, no prompts are issued, and
+`ar' abandons execution (with a nonzero exit code) on any error.
+
+   The `ar' command language is _not_ designed to be equivalent to the
+command-line options; in fact, it provides somewhat less control over
+archives.  The only purpose of the command language is to ease the
+transition to GNU `ar' for developers who already have scripts written
+for the MRI "librarian" program.
+
+   The syntax for the `ar' command language is straightforward:
+   * commands are recognized in upper or lower case; for example, `LIST'
+     is the same as `list'.  In the following descriptions, commands are
+     shown in upper case for clarity.
+
+   * a single command may appear on each line; it is the first word on
+     the line.
+
+   * empty lines are allowed, and have no effect.
+
+   * comments are allowed; text after either of the characters `*' or
+     `;' is ignored.
+
+   * Whenever you use a list of names as part of the argument to an `ar'
+     command, you can separate the individual names with either commas
+     or blanks.  Commas are shown in the explanations below, for
+     clarity.
+
+   * `+' is used as a line continuation character; if `+' appears at
+     the end of a line, the text on the following line is considered
+     part of the current command.
+
+   Here are the commands you can use in `ar' scripts, or when using
+`ar' interactively.  Three of them have special significance:
+
+   `OPEN' or `CREATE' specify a "current archive", which is a temporary
+file required for most of the other commands.
+
+   `SAVE' commits the changes so far specified by the script.  Prior to
+`SAVE', commands affect only the temporary copy of the current archive.
+
+`ADDLIB ARCHIVE'
+`ADDLIB ARCHIVE (MODULE, MODULE, ... MODULE)'
+     Add all the contents of ARCHIVE (or, if specified, each named
+     MODULE from ARCHIVE) to the current archive.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`ADDMOD MEMBER, MEMBER, ... MEMBER'
+     Add each named MEMBER as a module in the current archive.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`CLEAR'
+     Discard the contents of the current archive, canceling the effect
+     of any operations since the last `SAVE'.  May be executed (with no
+     effect) even if  no current archive is specified.
+
+`CREATE ARCHIVE'
+     Creates an archive, and makes it the current archive (required for
+     many other commands).  The new archive is created with a temporary
+     name; it is not actually saved as ARCHIVE until you use `SAVE'.
+     You can overwrite existing archives; similarly, the contents of any
+     existing file named ARCHIVE will not be destroyed until `SAVE'.
+
+`DELETE MODULE, MODULE, ... MODULE'
+     Delete each listed MODULE from the current archive; equivalent to
+     `ar -d ARCHIVE MODULE ... MODULE'.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`DIRECTORY ARCHIVE (MODULE, ... MODULE)'
+`DIRECTORY ARCHIVE (MODULE, ... MODULE) OUTPUTFILE'
+     List each named MODULE present in ARCHIVE.  The separate command
+     `VERBOSE' specifies the form of the output: when verbose output is
+     off, output is like that of `ar -t ARCHIVE MODULE...'.  When
+     verbose output is on, the listing is like `ar -tv ARCHIVE
+     MODULE...'.
+
+     Output normally goes to the standard output stream; however, if you
+     specify OUTPUTFILE as a final argument, `ar' directs the output to
+     that file.
+
+`END'
+     Exit from `ar', with a `0' exit code to indicate successful
+     completion.  This command does not save the output file; if you
+     have changed the current archive since the last `SAVE' command,
+     those changes are lost.
+
+`EXTRACT MODULE, MODULE, ... MODULE'
+     Extract each named MODULE from the current archive, writing them
+     into the current directory as separate files.  Equivalent to `ar -x
+     ARCHIVE MODULE...'.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`LIST'
+     Display full contents of the current archive, in "verbose" style
+     regardless of the state of `VERBOSE'.  The effect is like `ar tv
+     ARCHIVE'.  (This single command is a GNU `ar' enhancement, rather
+     than present for MRI compatibility.)
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`OPEN ARCHIVE'
+     Opens an existing archive for use as the current archive (required
+     for many other commands).  Any changes as the result of subsequent
+     commands will not actually affect ARCHIVE until you next use
+     `SAVE'.
+
+`REPLACE MODULE, MODULE, ... MODULE'
+     In the current archive, replace each existing MODULE (named in the
+     `REPLACE' arguments) from files in the current working directory.
+     To execute this command without errors, both the file, and the
+     module in the current archive, must exist.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+`VERBOSE'
+     Toggle an internal flag governing the output from `DIRECTORY'.
+     When the flag is on, `DIRECTORY' output matches output from `ar
+     -tv '....
+
+`SAVE'
+     Commit your changes to the current archive, and actually save it
+     as a file with the name specified in the last `CREATE' or `OPEN'
+     command.
+
+     Requires prior use of `OPEN' or `CREATE'.
+
+
+
+File: binutils.info,  Node: nm,  Next: objcopy,  Prev: ar,  Up: Top
+
+2 nm
+****
+
+     nm [`-a'|`--debug-syms']
+        [`-g'|`--extern-only'][`--plugin' NAME]
+        [`-B'] [`-C'|`--demangle'[=STYLE]] [`-D'|`--dynamic']
+        [`-S'|`--print-size'] [`-s'|`--print-armap']
+        [`-A'|`-o'|`--print-file-name'][`--special-syms']
+        [`-n'|`-v'|`--numeric-sort'] [`-p'|`--no-sort']
+        [`-r'|`--reverse-sort'] [`--size-sort'] [`-u'|`--undefined-only']
+        [`-t' RADIX|`--radix='RADIX] [`-P'|`--portability']
+        [`--target='BFDNAME] [`-f'FORMAT|`--format='FORMAT]
+        [`--defined-only'] [`-l'|`--line-numbers'] [`--no-demangle']
+        [`-V'|`--version'] [`-X 32_64'] [`--help']  [OBJFILE...]
+
+   GNU `nm' lists the symbols from object files OBJFILE....  If no
+object files are listed as arguments, `nm' assumes the file `a.out'.
+
+   For each symbol, `nm' shows:
+
+   * The symbol value, in the radix selected by options (see below), or
+     hexadecimal by default.
+
+   * The symbol type.  At least the following types are used; others
+     are, as well, depending on the object file format.  If lowercase,
+     the symbol is local; if uppercase, the symbol is global (external).
+
+    `A'
+          The symbol's value is absolute, and will not be changed by
+          further linking.
+
+    `B'
+    `b'
+          The symbol is in the uninitialized data section (known as
+          BSS).
+
+    `C'
+          The symbol is common.  Common symbols are uninitialized data.
+          When linking, multiple common symbols may appear with the
+          same name.  If the symbol is defined anywhere, the common
+          symbols are treated as undefined references.  For more
+          details on common symbols, see the discussion of -warn-common
+          in *note Linker options: (ld.info)Options.
+
+    `D'
+    `d'
+          The symbol is in the initialized data section.
+
+    `G'
+    `g'
+          The symbol is in an initialized data section for small
+          objects.  Some object file formats permit more efficient
+          access to small data objects, such as a global int variable
+          as opposed to a large global array.
+
+    `i'
+          For PE format files this indicates that the symbol is in a
+          section specific to the implementation of DLLs.  For ELF
+          format files this indicates that the symbol is an indirect
+          function.  This is a GNU extension to the standard set of ELF
+          symbol types.  It indicates a symbol which if referenced by a
+          relocation does not evaluate to its address, but instead must
+          be invoked at runtime.  The runtime execution will then
+          return the value to be used in the relocation.
+
+    `N'
+          The symbol is a debugging symbol.
+
+    `p'
+          The symbols is in a stack unwind section.
+
+    `R'
+    `r'
+          The symbol is in a read only data section.
+
+    `S'
+    `s'
+          The symbol is in an uninitialized data section for small
+          objects.
+
+    `T'
+    `t'
+          The symbol is in the text (code) section.
+
+    `U'
+          The symbol is undefined.
+
+    `u'
+          The symbol is a unique global symbol.  This is a GNU
+          extension to the standard set of ELF symbol bindings.  For
+          such a symbol the dynamic linker will make sure that in the
+          entire process there is just one symbol with this name and
+          type in use.
+
+    `V'
+    `v'
+          The symbol is a weak object.  When a weak defined symbol is
+          linked with a normal defined symbol, the normal defined
+          symbol is used with no error.  When a weak undefined symbol
+          is linked and the symbol is not defined, the value of the
+          weak symbol becomes zero with no error.  On some systems,
+          uppercase indicates that a default value has been specified.
+
+    `W'
+    `w'
+          The symbol is a weak symbol that has not been specifically
+          tagged as a weak object symbol.  When a weak defined symbol
+          is linked with a normal defined symbol, the normal defined
+          symbol is used with no error.  When a weak undefined symbol
+          is linked and the symbol is not defined, the value of the
+          symbol is determined in a system-specific manner without
+          error.  On some systems, uppercase indicates that a default
+          value has been specified.
+
+    `-'
+          The symbol is a stabs symbol in an a.out object file.  In
+          this case, the next values printed are the stabs other field,
+          the stabs desc field, and the stab type.  Stabs symbols are
+          used to hold debugging information.  For more information,
+          see *note Stabs: (stabs.info)Top.
+
+    `?'
+          The symbol type is unknown, or object file format specific.
+
+   * The symbol name.
+
+   The long and short forms of options, shown here as alternatives, are
+equivalent.
+
+`-A'
+`-o'
+`--print-file-name'
+     Precede each symbol by the name of the input file (or archive
+     member) in which it was found, rather than identifying the input
+     file once only, before all of its symbols.
+
+`-a'
+`--debug-syms'
+     Display all symbols, even debugger-only symbols; normally these
+     are not listed.
+
+`-B'
+     The same as `--format=bsd' (for compatibility with the MIPS `nm').
+
+`-C'
+`--demangle[=STYLE]'
+     Decode ("demangle") low-level symbol names into user-level names.
+     Besides removing any initial underscore prepended by the system,
+     this makes C++ function names readable. Different compilers have
+     different mangling styles. The optional demangling style argument
+     can be used to choose an appropriate demangling style for your
+     compiler. *Note c++filt::, for more information on demangling.
+
+`--no-demangle'
+     Do not demangle low-level symbol names.  This is the default.
+
+`-D'
+`--dynamic'
+     Display the dynamic symbols rather than the normal symbols.  This
+     is only meaningful for dynamic objects, such as certain types of
+     shared libraries.
+
+`-f FORMAT'
+`--format=FORMAT'
+     Use the output format FORMAT, which can be `bsd', `sysv', or
+     `posix'.  The default is `bsd'.  Only the first character of
+     FORMAT is significant; it can be either upper or lower case.
+
+`-g'
+`--extern-only'
+     Display only external symbols.
+
+`--plugin NAME'
+     Load the plugin called NAME to add support for extra target types.
+     This option is only available if the toolchain has been built with
+     plugin support enabled.
+
+`-l'
+`--line-numbers'
+     For each symbol, use debugging information to try to find a
+     filename and line number.  For a defined symbol, look for the line
+     number of the address of the symbol.  For an undefined symbol,
+     look for the line number of a relocation entry which refers to the
+     symbol.  If line number information can be found, print it after
+     the other symbol information.
+
+`-n'
+`-v'
+`--numeric-sort'
+     Sort symbols numerically by their addresses, rather than
+     alphabetically by their names.
+
+`-p'
+`--no-sort'
+     Do not bother to sort the symbols in any order; print them in the
+     order encountered.
+
+`-P'
+`--portability'
+     Use the POSIX.2 standard output format instead of the default
+     format.  Equivalent to `-f posix'.
+
+`-S'
+`--print-size'
+     Print both value and size of defined symbols for the `bsd' output
+     style.  This option has no effect for object formats that do not
+     record symbol sizes, unless `--size-sort' is also used in which
+     case a calculated size is displayed.
+
+`-s'
+`--print-armap'
+     When listing symbols from archive members, include the index: a
+     mapping (stored in the archive by `ar' or `ranlib') of which
+     modules contain definitions for which names.
+
+`-r'
+`--reverse-sort'
+     Reverse the order of the sort (whether numeric or alphabetic); let
+     the last come first.
+
+`--size-sort'
+     Sort symbols by size.  The size is computed as the difference
+     between the value of the symbol and the value of the symbol with
+     the next higher value.  If the `bsd' output format is used the
+     size of the symbol is printed, rather than the value, and `-S'
+     must be used in order both size and value to be printed.
+
+`--special-syms'
+     Display symbols which have a target-specific special meaning.
+     These symbols are usually used by the target for some special
+     processing and are not normally helpful when included included in
+     the normal symbol lists.  For example for ARM targets this option
+     would skip the mapping symbols used to mark transitions between
+     ARM code, THUMB code and data.
+
+`-t RADIX'
+`--radix=RADIX'
+     Use RADIX as the radix for printing the symbol values.  It must be
+     `d' for decimal, `o' for octal, or `x' for hexadecimal.
+
+`--target=BFDNAME'
+     Specify an object code format other than your system's default
+     format.  *Note Target Selection::, for more information.
+
+`-u'
+`--undefined-only'
+     Display only undefined symbols (those external to each object
+     file).
+
+`--defined-only'
+     Display only defined symbols for each object file.
+
+`-V'
+`--version'
+     Show the version number of `nm' and exit.
+
+`-X'
+     This option is ignored for compatibility with the AIX version of
+     `nm'.  It takes one parameter which must be the string `32_64'.
+     The default mode of AIX `nm' corresponds to `-X 32', which is not
+     supported by GNU `nm'.
+
+`--help'
+     Show a summary of the options to `nm' and exit.
+
+
+File: binutils.info,  Node: objcopy,  Next: objdump,  Prev: nm,  Up: Top
+
+3 objcopy
+*********
+
+     objcopy [`-F' BFDNAME|`--target='BFDNAME]
+             [`-I' BFDNAME|`--input-target='BFDNAME]
+             [`-O' BFDNAME|`--output-target='BFDNAME]
+             [`-B' BFDARCH|`--binary-architecture='BFDARCH]
+             [`-S'|`--strip-all']
+             [`-g'|`--strip-debug']
+             [`-K' SYMBOLNAME|`--keep-symbol='SYMBOLNAME]
+             [`-N' SYMBOLNAME|`--strip-symbol='SYMBOLNAME]
+             [`--strip-unneeded-symbol='SYMBOLNAME]
+             [`-G' SYMBOLNAME|`--keep-global-symbol='SYMBOLNAME]
+             [`--localize-hidden']
+             [`-L' SYMBOLNAME|`--localize-symbol='SYMBOLNAME]
+             [`--globalize-symbol='SYMBOLNAME]
+             [`-W' SYMBOLNAME|`--weaken-symbol='SYMBOLNAME]
+             [`-w'|`--wildcard']
+             [`-x'|`--discard-all']
+             [`-X'|`--discard-locals']
+             [`-b' BYTE|`--byte='BYTE]
+             [`-i' INTERLEAVE|`--interleave='INTERLEAVE]
+             [`-j' SECTIONNAME|`--only-section='SECTIONNAME]
+             [`-R' SECTIONNAME|`--remove-section='SECTIONNAME]
+             [`-p'|`--preserve-dates']
+             [`--debugging']
+             [`--gap-fill='VAL]
+             [`--pad-to='ADDRESS]
+             [`--set-start='VAL]
+             [`--adjust-start='INCR]
+             [`--change-addresses='INCR]
+             [`--change-section-address' SECTION{=,+,-}VAL]
+             [`--change-section-lma' SECTION{=,+,-}VAL]
+             [`--change-section-vma' SECTION{=,+,-}VAL]
+             [`--change-warnings'] [`--no-change-warnings']
+             [`--set-section-flags' SECTION=FLAGS]
+             [`--add-section' SECTIONNAME=FILENAME]
+             [`--rename-section' OLDNAME=NEWNAME[,FLAGS]]
+             [`--long-section-names' {enable,disable,keep}]
+             [`--change-leading-char'] [`--remove-leading-char']
+             [`--reverse-bytes='NUM]
+             [`--srec-len='IVAL] [`--srec-forceS3']
+             [`--redefine-sym' OLD=NEW]
+             [`--redefine-syms='FILENAME]
+             [`--weaken']
+             [`--keep-symbols='FILENAME]
+             [`--strip-symbols='FILENAME]
+             [`--strip-unneeded-symbols='FILENAME]
+             [`--keep-global-symbols='FILENAME]
+             [`--localize-symbols='FILENAME]
+             [`--globalize-symbols='FILENAME]
+             [`--weaken-symbols='FILENAME]
+             [`--alt-machine-code='INDEX]
+             [`--prefix-symbols='STRING]
+             [`--prefix-sections='STRING]
+             [`--prefix-alloc-sections='STRING]
+             [`--add-gnu-debuglink='PATH-TO-FILE]
+             [`--keep-file-symbols']
+             [`--only-keep-debug']
+             [`--extract-symbol']
+             [`--writable-text']
+             [`--readonly-text']
+             [`--pure']
+             [`--impure']
+             [`--file-alignment='NUM]
+             [`--heap='SIZE]
+             [`--image-base='ADDRESS]
+             [`--section-alignment='NUM]
+             [`--stack='SIZE]
+             [`--subsystem='WHICH:MAJOR.MINOR]
+             [`-v'|`--verbose']
+             [`-V'|`--version']
+             [`--help'] [`--info']
+             INFILE [OUTFILE]
+
+   The GNU `objcopy' utility copies the contents of an object file to
+another.  `objcopy' uses the GNU BFD Library to read and write the
+object files.  It can write the destination object file in a format
+different from that of the source object file.  The exact behavior of
+`objcopy' is controlled by command-line options.  Note that `objcopy'
+should be able to copy a fully linked file between any two formats.
+However, copying a relocatable object file between any two formats may
+not work as expected.
+
+   `objcopy' creates temporary files to do its translations and deletes
+them afterward.  `objcopy' uses BFD to do all its translation work; it
+has access to all the formats described in BFD and thus is able to
+recognize most formats without being told explicitly.  *Note BFD:
+(ld.info)BFD.
+
+   `objcopy' can be used to generate S-records by using an output
+target of `srec' (e.g., use `-O srec').
+
+   `objcopy' can be used to generate a raw binary file by using an
+output target of `binary' (e.g., use `-O binary').  When `objcopy'
+generates a raw binary file, it will essentially produce a memory dump
+of the contents of the input object file.  All symbols and relocation
+information will be discarded.  The memory dump will start at the load
+address of the lowest section copied into the output file.
+
+   When generating an S-record or a raw binary file, it may be helpful
+to use `-S' to remove sections containing debugging information.  In
+some cases `-R' will be useful to remove sections which contain
+information that is not needed by the binary file.
+
+   Note--`objcopy' is not able to change the endianness of its input
+files.  If the input format has an endianness (some formats do not),
+`objcopy' can only copy the inputs into file formats that have the same
+endianness or which have no endianness (e.g., `srec').  (However, see
+the `--reverse-bytes' option.)
+
+`INFILE'
+`OUTFILE'
+     The input and output files, respectively.  If you do not specify
+     OUTFILE, `objcopy' creates a temporary file and destructively
+     renames the result with the name of INFILE.
+
+`-I BFDNAME'
+`--input-target=BFDNAME'
+     Consider the source file's object format to be BFDNAME, rather than
+     attempting to deduce it.  *Note Target Selection::, for more
+     information.
+
+`-O BFDNAME'
+`--output-target=BFDNAME'
+     Write the output file using the object format BFDNAME.  *Note
+     Target Selection::, for more information.
+
+`-F BFDNAME'
+`--target=BFDNAME'
+     Use BFDNAME as the object format for both the input and the output
+     file; i.e., simply transfer data from source to destination with no
+     translation.  *Note Target Selection::, for more information.
+
+`-B BFDARCH'
+`--binary-architecture=BFDARCH'
+     Useful when transforming a raw binary input file into an object
+     file.  In this case the output architecture can be set to BFDARCH.
+     This option will be ignored if the input file has a known BFDARCH.
+     You can access this binary data inside a program by referencing
+     the special symbols that are created by the conversion process.
+     These symbols are called _binary_OBJFILE_start,
+     _binary_OBJFILE_end and _binary_OBJFILE_size.  e.g. you can
+     transform a picture file into an object file and then access it in
+     your code using these symbols.
+
+`-j SECTIONNAME'
+`--only-section=SECTIONNAME'
+     Copy only the named section from the input file to the output file.
+     This option may be given more than once.  Note that using this
+     option inappropriately may make the output file unusable.
+
+`-R SECTIONNAME'
+`--remove-section=SECTIONNAME'
+     Remove any section named SECTIONNAME from the output file.  This
+     option may be given more than once.  Note that using this option
+     inappropriately may make the output file unusable.
+
+`-S'
+`--strip-all'
+     Do not copy relocation and symbol information from the source file.
+
+`-g'
+`--strip-debug'
+     Do not copy debugging symbols or sections from the source file.
+
+`--strip-unneeded'
+     Strip all symbols that are not needed for relocation processing.
+
+`-K SYMBOLNAME'
+`--keep-symbol=SYMBOLNAME'
+     When stripping symbols, keep symbol SYMBOLNAME even if it would
+     normally be stripped.  This option may be given more than once.
+
+`-N SYMBOLNAME'
+`--strip-symbol=SYMBOLNAME'
+     Do not copy symbol SYMBOLNAME from the source file.  This option
+     may be given more than once.
+
+`--strip-unneeded-symbol=SYMBOLNAME'
+     Do not copy symbol SYMBOLNAME from the source file unless it is
+     needed by a relocation.  This option may be given more than once.
+
+`-G SYMBOLNAME'
+`--keep-global-symbol=SYMBOLNAME'
+     Keep only symbol SYMBOLNAME global.  Make all other symbols local
+     to the file, so that they are not visible externally.  This option
+     may be given more than once.
+
+`--localize-hidden'
+     In an ELF object, mark all symbols that have hidden or internal
+     visibility as local.  This option applies on top of
+     symbol-specific localization options such as `-L'.
+
+`-L SYMBOLNAME'
+`--localize-symbol=SYMBOLNAME'
+     Make symbol SYMBOLNAME local to the file, so that it is not
+     visible externally.  This option may be given more than once.
+
+`-W SYMBOLNAME'
+`--weaken-symbol=SYMBOLNAME'
+     Make symbol SYMBOLNAME weak. This option may be given more than
+     once.
+
+`--globalize-symbol=SYMBOLNAME'
+     Give symbol SYMBOLNAME global scoping so that it is visible
+     outside of the file in which it is defined.  This option may be
+     given more than once.
+
+`-w'
+`--wildcard'
+     Permit regular expressions in SYMBOLNAMEs used in other command
+     line options.  The question mark (?), asterisk (*), backslash (\)
+     and square brackets ([]) operators can be used anywhere in the
+     symbol name.  If the first character of the symbol name is the
+     exclamation point (!) then the sense of the switch is reversed for
+     that symbol.  For example:
+
+            -w -W !foo -W fo*
+
+     would cause objcopy to weaken all symbols that start with "fo"
+     except for the symbol "foo".
+
+`-x'
+`--discard-all'
+     Do not copy non-global symbols from the source file.
+
+`-X'
+`--discard-locals'
+     Do not copy compiler-generated local symbols.  (These usually
+     start with `L' or `.'.)
+
+`-b BYTE'
+`--byte=BYTE'
+     Keep only every BYTEth byte of the input file (header data is not
+     affected).  BYTE can be in the range from 0 to INTERLEAVE-1, where
+     INTERLEAVE is given by the `-i' or `--interleave' option, or the
+     default of 4.  This option is useful for creating files to program
+     ROM.  It is typically used with an `srec' output target.
+
+`-i INTERLEAVE'
+`--interleave=INTERLEAVE'
+     Only copy one out of every INTERLEAVE bytes.  Select which byte to
+     copy with the `-b' or `--byte' option.  The default is 4.
+     `objcopy' ignores this option if you do not specify either `-b' or
+     `--byte'.
+
+`-p'
+`--preserve-dates'
+     Set the access and modification dates of the output file to be the
+     same as those of the input file.
+
+`--debugging'
+     Convert debugging information, if possible.  This is not the
+     default because only certain debugging formats are supported, and
+     the conversion process can be time consuming.
+
+`--gap-fill VAL'
+     Fill gaps between sections with VAL.  This operation applies to
+     the _load address_ (LMA) of the sections.  It is done by increasing
+     the size of the section with the lower address, and filling in the
+     extra space created with VAL.
+
+`--pad-to ADDRESS'
+     Pad the output file up to the load address ADDRESS.  This is done
+     by increasing the size of the last section.  The extra space is
+     filled in with the value specified by `--gap-fill' (default zero).
+
+`--set-start VAL'
+     Set the start address of the new file to VAL.  Not all object file
+     formats support setting the start address.
+
+`--change-start INCR'
+`--adjust-start INCR'
+     Change the start address by adding INCR.  Not all object file
+     formats support setting the start address.
+
+`--change-addresses INCR'
+`--adjust-vma INCR'
+     Change the VMA and LMA addresses of all sections, as well as the
+     start address, by adding INCR.  Some object file formats do not
+     permit section addresses to be changed arbitrarily.  Note that
+     this does not relocate the sections; if the program expects
+     sections to be loaded at a certain address, and this option is
+     used to change the sections such that they are loaded at a
+     different address, the program may fail.
+
+`--change-section-address SECTION{=,+,-}VAL'
+`--adjust-section-vma SECTION{=,+,-}VAL'
+     Set or change both the VMA address and the LMA address of the named
+     SECTION.  If `=' is used, the section address is set to VAL.
+     Otherwise, VAL is added to or subtracted from the section address.
+     See the comments under `--change-addresses', above. If SECTION
+     does not exist in the input file, a warning will be issued, unless
+     `--no-change-warnings' is used.
+
+`--change-section-lma SECTION{=,+,-}VAL'
+     Set or change the LMA address of the named SECTION.  The LMA
+     address is the address where the section will be loaded into
+     memory at program load time.  Normally this is the same as the VMA
+     address, which is the address of the section at program run time,
+     but on some systems, especially those where a program is held in
+     ROM, the two can be different.  If `=' is used, the section
+     address is set to VAL.  Otherwise, VAL is added to or subtracted
+     from the section address.  See the comments under
+     `--change-addresses', above.  If SECTION does not exist in the
+     input file, a warning will be issued, unless
+     `--no-change-warnings' is used.
+
+`--change-section-vma SECTION{=,+,-}VAL'
+     Set or change the VMA address of the named SECTION.  The VMA
+     address is the address where the section will be located once the
+     program has started executing.  Normally this is the same as the
+     LMA address, which is the address where the section will be loaded
+     into memory, but on some systems, especially those where a program
+     is held in ROM, the two can be different.  If `=' is used, the
+     section address is set to VAL.  Otherwise, VAL is added to or
+     subtracted from the section address.  See the comments under
+     `--change-addresses', above.  If SECTION does not exist in the
+     input file, a warning will be issued, unless
+     `--no-change-warnings' is used.
+
+`--change-warnings'
+`--adjust-warnings'
+     If `--change-section-address' or `--change-section-lma' or
+     `--change-section-vma' is used, and the named section does not
+     exist, issue a warning.  This is the default.
+
+`--no-change-warnings'
+`--no-adjust-warnings'
+     Do not issue a warning if `--change-section-address' or
+     `--adjust-section-lma' or `--adjust-section-vma' is used, even if
+     the named section does not exist.
+
+`--set-section-flags SECTION=FLAGS'
+     Set the flags for the named section.  The FLAGS argument is a
+     comma separated string of flag names.  The recognized names are
+     `alloc', `contents', `load', `noload', `readonly', `code', `data',
+     `rom', `share', and `debug'.  You can set the `contents' flag for
+     a section which does not have contents, but it is not meaningful
+     to clear the `contents' flag of a section which does have
+     contents-just remove the section instead.  Not all flags are
+     meaningful for all object file formats.
+
+`--add-section SECTIONNAME=FILENAME'
+     Add a new section named SECTIONNAME while copying the file.  The
+     contents of the new section are taken from the file FILENAME.  The
+     size of the section will be the size of the file.  This option only
+     works on file formats which can support sections with arbitrary
+     names.
+
+`--rename-section OLDNAME=NEWNAME[,FLAGS]'
+     Rename a section from OLDNAME to NEWNAME, optionally changing the
+     section's flags to FLAGS in the process.  This has the advantage
+     over usng a linker script to perform the rename in that the output
+     stays as an object file and does not become a linked executable.
+
+     This option is particularly helpful when the input format is
+     binary, since this will always create a section called .data.  If
+     for example, you wanted instead to create a section called .rodata
+     containing binary data you could use the following command line to
+     achieve it:
+
+            objcopy -I binary -O <output_format> -B <architecture> \
+             --rename-section .data=.rodata,alloc,load,readonly,data,contents \
+             <input_binary_file> <output_object_file>
+
+`--long-section-names {enable,disable,keep}'
+     Controls the handling of long section names when processing `COFF'
+     and `PE-COFF' object formats.  The default behaviour, `keep', is
+     to preserve long section names if any are present in the input
+     file.  The `enable' and `disable' options forcibly enable or
+     disable the use of long section names in the output object; when
+     `disable' is in effect, any long section names in the input object
+     will be truncated.  The `enable' option will only emit long
+     section names if any are present in the inputs; this is mostly the
+     same as `keep', but it is left undefined whether the `enable'
+     option might force the creation of an empty string table in the
+     output file.
+
+`--change-leading-char'
+     Some object file formats use special characters at the start of
+     symbols.  The most common such character is underscore, which
+     compilers often add before every symbol.  This option tells
+     `objcopy' to change the leading character of every symbol when it
+     converts between object file formats.  If the object file formats
+     use the same leading character, this option has no effect.
+     Otherwise, it will add a character, or remove a character, or
+     change a character, as appropriate.
+
+`--remove-leading-char'
+     If the first character of a global symbol is a special symbol
+     leading character used by the object file format, remove the
+     character.  The most common symbol leading character is
+     underscore.  This option will remove a leading underscore from all
+     global symbols.  This can be useful if you want to link together
+     objects of different file formats with different conventions for
+     symbol names.  This is different from `--change-leading-char'
+     because it always changes the symbol name when appropriate,
+     regardless of the object file format of the output file.
+
+`--reverse-bytes=NUM'
+     Reverse the bytes in a section with output contents.  A section
+     length must be evenly divisible by the value given in order for
+     the swap to be able to take place. Reversing takes place before
+     the interleaving is performed.
+
+     This option is used typically in generating ROM images for
+     problematic target systems.  For example, on some target boards,
+     the 32-bit words fetched from 8-bit ROMs are re-assembled in
+     little-endian byte order regardless of the CPU byte order.
+     Depending on the programming model, the endianness of the ROM may
+     need to be modified.
+
+     Consider a simple file with a section containing the following
+     eight bytes:  `12345678'.
+
+     Using `--reverse-bytes=2' for the above example, the bytes in the
+     output file would be ordered `21436587'.
+
+     Using `--reverse-bytes=4' for the above example, the bytes in the
+     output file would be ordered `43218765'.
+
+     By using `--reverse-bytes=2' for the above example, followed by
+     `--reverse-bytes=4' on the output file, the bytes in the second
+     output file would be ordered `34127856'.
+
+`--srec-len=IVAL'
+     Meaningful only for srec output.  Set the maximum length of the
+     Srecords being produced to IVAL.  This length covers both address,
+     data and crc fields.
+
+`--srec-forceS3'
+     Meaningful only for srec output.  Avoid generation of S1/S2
+     records, creating S3-only record format.
+
+`--redefine-sym OLD=NEW'
+     Change the name of a symbol OLD, to NEW.  This can be useful when
+     one is trying link two things together for which you have no
+     source, and there are name collisions.
+
+`--redefine-syms=FILENAME'
+     Apply `--redefine-sym' to each symbol pair "OLD NEW" listed in the
+     file FILENAME.  FILENAME is simply a flat file, with one symbol
+     pair per line.  Line comments may be introduced by the hash
+     character.  This option may be given more than once.
+
+`--weaken'
+     Change all global symbols in the file to be weak.  This can be
+     useful when building an object which will be linked against other
+     objects using the `-R' option to the linker.  This option is only
+     effective when using an object file format which supports weak
+     symbols.
+
+`--keep-symbols=FILENAME'
+     Apply `--keep-symbol' option to each symbol listed in the file
+     FILENAME.  FILENAME is simply a flat file, with one symbol name
+     per line.  Line comments may be introduced by the hash character.
+     This option may be given more than once.
+
+`--strip-symbols=FILENAME'
+     Apply `--strip-symbol' option to each symbol listed in the file
+     FILENAME.  FILENAME is simply a flat file, with one symbol name
+     per line.  Line comments may be introduced by the hash character.
+     This option may be given more than once.
+
+`--strip-unneeded-symbols=FILENAME'
+     Apply `--strip-unneeded-symbol' option to each symbol listed in
+     the file FILENAME.  FILENAME is simply a flat file, with one
+     symbol name per line.  Line comments may be introduced by the hash
+     character.  This option may be given more than once.
+
+`--keep-global-symbols=FILENAME'
+     Apply `--keep-global-symbol' option to each symbol listed in the
+     file FILENAME.  FILENAME is simply a flat file, with one symbol
+     name per line.  Line comments may be introduced by the hash
+     character.  This option may be given more than once.
+
+`--localize-symbols=FILENAME'
+     Apply `--localize-symbol' option to each symbol listed in the file
+     FILENAME.  FILENAME is simply a flat file, with one symbol name
+     per line.  Line comments may be introduced by the hash character.
+     This option may be given more than once.
+
+`--globalize-symbols=FILENAME'
+     Apply `--globalize-symbol' option to each symbol listed in the file
+     FILENAME.  FILENAME is simply a flat file, with one symbol name
+     per line.  Line comments may be introduced by the hash character.
+     This option may be given more than once.
+
+`--weaken-symbols=FILENAME'
+     Apply `--weaken-symbol' option to each symbol listed in the file
+     FILENAME.  FILENAME is simply a flat file, with one symbol name
+     per line.  Line comments may be introduced by the hash character.
+     This option may be given more than once.
+
+`--alt-machine-code=INDEX'
+     If the output architecture has alternate machine codes, use the
+     INDEXth code instead of the default one.  This is useful in case a
+     machine is assigned an official code and the tool-chain adopts the
+     new code, but other applications still depend on the original code
+     being used.  For ELF based architectures if the INDEX alternative
+     does not exist then the value is treated as an absolute number to
+     be stored in the e_machine field of the ELF header.
+
+`--writable-text'
+     Mark the output text as writable.  This option isn't meaningful
+     for all object file formats.
+
+`--readonly-text'
+     Make the output text write protected.  This option isn't
+     meaningful for all object file formats.
+
+`--pure'
+     Mark the output file as demand paged.  This option isn't
+     meaningful for all object file formats.
+
+`--impure'
+     Mark the output file as impure.  This option isn't meaningful for
+     all object file formats.
+
+`--prefix-symbols=STRING'
+     Prefix all symbols in the output file with STRING.
+
+`--prefix-sections=STRING'
+     Prefix all section names in the output file with STRING.
+
+`--prefix-alloc-sections=STRING'
+     Prefix all the names of all allocated sections in the output file
+     with STRING.
+
+`--add-gnu-debuglink=PATH-TO-FILE'
+     Creates a .gnu_debuglink section which contains a reference to
+     PATH-TO-FILE and adds it to the output file.
+
+`--keep-file-symbols'
+     When stripping a file, perhaps with `--strip-debug' or
+     `--strip-unneeded', retain any symbols specifying source file
+     names, which would otherwise get stripped.
+
+`--only-keep-debug'
+     Strip a file, removing contents of any sections that would not be
+     stripped by `--strip-debug' and leaving the debugging sections
+     intact.  In ELF files, this preserves all note sections in the
+     output.
+
+     The intention is that this option will be used in conjunction with
+     `--add-gnu-debuglink' to create a two part executable.  One a
+     stripped binary which will occupy less space in RAM and in a
+     distribution and the second a debugging information file which is
+     only needed if debugging abilities are required.  The suggested
+     procedure to create these files is as follows:
+
+       1. Link the executable as normal.  Assuming that is is called
+          `foo' then...
+
+       2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file
+          containing the debugging info.
+
+       3. Run `objcopy --strip-debug foo' to create a stripped
+          executable.
+
+       4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link
+          to the debugging info into the stripped executable.
+
+     Note--the choice of `.dbg' as an extension for the debug info file
+     is arbitrary.  Also the `--only-keep-debug' step is optional.  You
+     could instead do this:
+
+       1. Link the executable as normal.
+
+       2. Copy `foo' to  `foo.full'
+
+       3. Run `objcopy --strip-debug foo'
+
+       4. Run `objcopy --add-gnu-debuglink=foo.full foo'
+
+     i.e., the file pointed to by the `--add-gnu-debuglink' can be the
+     full executable.  It does not have to be a file created by the
+     `--only-keep-debug' switch.
+
+     Note--this switch is only intended for use on fully linked files.
+     It does not make sense to use it on object files where the
+     debugging information may be incomplete.  Besides the
+     gnu_debuglink feature currently only supports the presence of one
+     filename containing debugging information, not multiple filenames
+     on a one-per-object-file basis.
+
+`--file-alignment NUM'
+     Specify the file alignment.  Sections in the file will always
+     begin at file offsets which are multiples of this number.  This
+     defaults to 512.  [This option is specific to PE targets.]
+
+`--heap RESERVE'
+`--heap RESERVE,COMMIT'
+     Specify the number of bytes of memory to reserve (and optionally
+     commit) to be used as heap for this program.  [This option is
+     specific to PE targets.]
+
+`--image-base VALUE'
+     Use VALUE as the base address of your program or dll.  This is the
+     lowest memory location that will be used when your program or dll
+     is loaded.  To reduce the need to relocate and improve performance
+     of your dlls, each should have a unique base address and not
+     overlap any other dlls.  The default is 0x400000 for executables,
+     and 0x10000000 for dlls.  [This option is specific to PE targets.]
+
+`--section-alignment NUM'
+     Sets the section alignment.  Sections in memory will always begin
+     at addresses which are a multiple of this number.  Defaults to
+     0x1000.  [This option is specific to PE targets.]
+
+`--stack RESERVE'
+`--stack RESERVE,COMMIT'
+     Specify the number of bytes of memory to reserve (and optionally
+     commit) to be used as stack for this program.  [This option is
+     specific to PE targets.]
+
+`--subsystem WHICH'
+`--subsystem WHICH:MAJOR'
+`--subsystem WHICH:MAJOR.MINOR'
+     Specifies the subsystem under which your program will execute.  The
+     legal values for WHICH are `native', `windows', `console',
+     `posix', `efi-app', `efi-bsd', `efi-rtd', `sal-rtd', and `xbox'.
+     You may optionally set the subsystem version also.  Numeric values
+     are also accepted for WHICH.  [This option is specific to PE
+     targets.]
+
+`--extract-symbol'
+     Keep the file's section flags and symbols but remove all section
+     data.  Specifically, the option:
+
+        * removes the contents of all sections;
+
+        * sets the size of every section to zero; and
+
+        * sets the file's start address to zero.
+
+     This option is used to build a `.sym' file for a VxWorks kernel.
+     It can also be a useful way of reducing the size of a
+     `--just-symbols' linker input file.
+
+`-V'
+`--version'
+     Show the version number of `objcopy'.
+
+`-v'
+`--verbose'
+     Verbose output: list all object files modified.  In the case of
+     archives, `objcopy -V' lists all members of the archive.
+
+`--help'
+     Show a summary of the options to `objcopy'.
+
+`--info'
+     Display a list showing all architectures and object formats
+     available.
+
+
+File: binutils.info,  Node: objdump,  Next: ranlib,  Prev: objcopy,  Up: Top
+
+4 objdump
+*********
+
+     objdump [`-a'|`--archive-headers']
+             [`-b' BFDNAME|`--target=BFDNAME']
+             [`-C'|`--demangle'[=STYLE] ]
+             [`-d'|`--disassemble']
+             [`-D'|`--disassemble-all']
+             [`-z'|`--disassemble-zeroes']
+             [`-EB'|`-EL'|`--endian='{big | little }]
+             [`-f'|`--file-headers']
+             [`-F'|`--file-offsets']
+             [`--file-start-context']
+             [`-g'|`--debugging']
+             [`-e'|`--debugging-tags']
+             [`-h'|`--section-headers'|`--headers']
+             [`-i'|`--info']
+             [`-j' SECTION|`--section='SECTION]
+             [`-l'|`--line-numbers']
+             [`-S'|`--source']
+             [`-m' MACHINE|`--architecture='MACHINE]
+             [`-M' OPTIONS|`--disassembler-options='OPTIONS]
+             [`-p'|`--private-headers']
+             [`-r'|`--reloc']
+             [`-R'|`--dynamic-reloc']
+             [`-s'|`--full-contents']
+             [`-W[lLiaprmfFsoR]'|
+              `--dwarf'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]]
+             [`-G'|`--stabs']
+             [`-t'|`--syms']
+             [`-T'|`--dynamic-syms']
+             [`-x'|`--all-headers']
+             [`-w'|`--wide']
+             [`--start-address='ADDRESS]
+             [`--stop-address='ADDRESS]
+             [`--prefix-addresses']
+             [`--[no-]show-raw-insn']
+             [`--adjust-vma='OFFSET]
+             [`--special-syms']
+             [`--prefix='PREFIX]
+             [`--prefix-strip='LEVEL]
+             [`--insn-width='WIDTH]
+             [`-V'|`--version']
+             [`-H'|`--help']
+             OBJFILE...
+
+   `objdump' displays information about one or more object files.  The
+options control what particular information to display.  This
+information is mostly useful to programmers who are working on the
+compilation tools, as opposed to programmers who just want their
+program to compile and work.
+
+   OBJFILE... are the object files to be examined.  When you specify
+archives, `objdump' shows information on each of the member object
+files.
+
+   The long and short forms of options, shown here as alternatives, are
+equivalent.  At least one option from the list
+`-a,-d,-D,-e,-f,-g,-G,-h,-H,-p,-r,-R,-s,-S,-t,-T,-V,-x' must be given.
+
+`-a'
+`--archive-header'
+     If any of the OBJFILE files are archives, display the archive
+     header information (in a format similar to `ls -l').  Besides the
+     information you could list with `ar tv', `objdump -a' shows the
+     object file format of each archive member.
+
+`--adjust-vma=OFFSET'
+     When dumping information, first add OFFSET to all the section
+     addresses.  This is useful if the section addresses do not
+     correspond to the symbol table, which can happen when putting
+     sections at particular addresses when using a format which can not
+     represent section addresses, such as a.out.
+
+`-b BFDNAME'
+`--target=BFDNAME'
+     Specify that the object-code format for the object files is
+     BFDNAME.  This option may not be necessary; OBJDUMP can
+     automatically recognize many formats.
+
+     For example,
+          objdump -b oasys -m vax -h fu.o
+     displays summary information from the section headers (`-h') of
+     `fu.o', which is explicitly identified (`-m') as a VAX object file
+     in the format produced by Oasys compilers.  You can list the
+     formats available with the `-i' option.  *Note Target Selection::,
+     for more information.
+
+`-C'
+`--demangle[=STYLE]'
+     Decode ("demangle") low-level symbol names into user-level names.
+     Besides removing any initial underscore prepended by the system,
+     this makes C++ function names readable.  Different compilers have
+     different mangling styles. The optional demangling style argument
+     can be used to choose an appropriate demangling style for your
+     compiler. *Note c++filt::, for more information on demangling.
+
+`-g'
+`--debugging'
+     Display debugging information.  This attempts to parse STABS and
+     IEEE debugging format information stored in the file and print it
+     out using a C like syntax.  If neither of these formats are found
+     this option falls back on the `-W' option to print any DWARF
+     information in the file.
+
+`-e'
+`--debugging-tags'
+     Like `-g', but the information is generated in a format compatible
+     with ctags tool.
+
+`-d'
+`--disassemble'
+     Display the assembler mnemonics for the machine instructions from
+     OBJFILE.  This option only disassembles those sections which are
+     expected to contain instructions.
+
+`-D'
+`--disassemble-all'
+     Like `-d', but disassemble the contents of all sections, not just
+     those expected to contain instructions.
+
+     If the target is an ARM architecture this switch also has the
+     effect of forcing the disassembler to decode pieces of data found
+     in code sections as if they were instructions.
+
+`--prefix-addresses'
+     When disassembling, print the complete address on each line.  This
+     is the older disassembly format.
+
+`-EB'
+`-EL'
+`--endian={big|little}'
+     Specify the endianness of the object files.  This only affects
+     disassembly.  This can be useful when disassembling a file format
+     which does not describe endianness information, such as S-records.
+
+`-f'
+`--file-headers'
+     Display summary information from the overall header of each of the
+     OBJFILE files.
+
+`-F'
+`--file-offsets'
+     When disassembling sections, whenever a symbol is displayed, also
+     display the file offset of the region of data that is about to be
+     dumped.  If zeroes are being skipped, then when disassembly
+     resumes, tell the user how many zeroes were skipped and the file
+     offset of the location from where the disassembly resumes.  When
+     dumping sections, display the file offset of the location from
+     where the dump starts.
+
+`--file-start-context'
+     Specify that when displaying interlisted source code/disassembly
+     (assumes `-S') from a file that has not yet been displayed, extend
+     the context to the start of the file.
+
+`-h'
+`--section-headers'
+`--headers'
+     Display summary information from the section headers of the object
+     file.
+
+     File segments may be relocated to nonstandard addresses, for
+     example by using the `-Ttext', `-Tdata', or `-Tbss' options to
+     `ld'.  However, some object file formats, such as a.out, do not
+     store the starting address of the file segments.  In those
+     situations, although `ld' relocates the sections correctly, using
+     `objdump -h' to list the file section headers cannot show the
+     correct addresses.  Instead, it shows the usual addresses, which
+     are implicit for the target.
+
+`-H'
+`--help'
+     Print a summary of the options to `objdump' and exit.
+
+`-i'
+`--info'
+     Display a list showing all architectures and object formats
+     available for specification with `-b' or `-m'.
+
+`-j NAME'
+`--section=NAME'
+     Display information only for section NAME.
+
+`-l'
+`--line-numbers'
+     Label the display (using debugging information) with the filename
+     and source line numbers corresponding to the object code or relocs
+     shown.  Only useful with `-d', `-D', or `-r'.
+
+`-m MACHINE'
+`--architecture=MACHINE'
+     Specify the architecture to use when disassembling object files.
+     This can be useful when disassembling object files which do not
+     describe architecture information, such as S-records.  You can
+     list the available architectures with the `-i' option.
+
+     If the target is an ARM architecture then this switch has an
+     additional effect.  It restricts the disassembly to only those
+     instructions supported by the architecture specified by MACHINE.
+     If it is necessary to use this switch because the input file does
+     not contain any architecture information, but it is also desired to
+     disassemble all the instructions use `-marm'.
+
+`-M OPTIONS'
+`--disassembler-options=OPTIONS'
+     Pass target specific information to the disassembler.  Only
+     supported on some targets.  If it is necessary to specify more
+     than one disassembler option then multiple `-M' options can be
+     used or can be placed together into a comma separated list.
+
+     If the target is an ARM architecture then this switch can be used
+     to select which register name set is used during disassembler.
+     Specifying `-M reg-names-std' (the default) will select the
+     register names as used in ARM's instruction set documentation, but
+     with register 13 called 'sp', register 14 called 'lr' and register
+     15 called 'pc'.  Specifying `-M reg-names-apcs' will select the
+     name set used by the ARM Procedure Call Standard, whilst
+     specifying `-M reg-names-raw' will just use `r' followed by the
+     register number.
+
+     There are also two variants on the APCS register naming scheme
+     enabled by `-M reg-names-atpcs' and `-M reg-names-special-atpcs'
+     which use the ARM/Thumb Procedure Call Standard naming
+     conventions.  (Either with the normal register names or the
+     special register names).
+
+     This option can also be used for ARM architectures to force the
+     disassembler to interpret all instructions as Thumb instructions by
+     using the switch `--disassembler-options=force-thumb'.  This can be
+     useful when attempting to disassemble thumb code produced by other
+     compilers.
+
+     For the x86, some of the options duplicate functions of the `-m'
+     switch, but allow finer grained control.  Multiple selections from
+     the following may be specified as a comma separated string.
+     `x86-64', `i386' and `i8086' select disassembly for the given
+     architecture.  `intel' and `att' select between intel syntax mode
+     and AT&T syntax mode.  `intel-mnemonic' and `att-mnemonic' select
+     between intel mnemonic mode and AT&T mnemonic mode.
+     `intel-mnemonic' implies `intel' and `att-mnemonic' implies `att'.
+     `addr64', `addr32', `addr16', `data32' and `data16' specify the
+     default address size and operand size.  These four options will be
+     overridden if `x86-64', `i386' or `i8086' appear later in the
+     option string.  Lastly, `suffix', when in AT&T mode, instructs the
+     disassembler to print a mnemonic suffix even when the suffix could
+     be inferred by the operands.
+
+     For PowerPC, `booke' controls the disassembly of BookE
+     instructions.  `32' and `64' select PowerPC and PowerPC64
+     disassembly, respectively.  `e300' selects disassembly for the
+     e300 family.  `440' selects disassembly for the PowerPC 440.
+     `ppcps' selects disassembly for the paired single instructions of
+     the PPC750CL.
+
+     For MIPS, this option controls the printing of instruction mnemonic
+     names and register names in disassembled instructions.  Multiple
+     selections from the following may be specified as a comma separated
+     string, and invalid options are ignored:
+
+    `no-aliases'
+          Print the 'raw' instruction mnemonic instead of some pseudo
+          instruction mnemonic.  I.e., print 'daddu' or 'or' instead of
+          'move', 'sll' instead of 'nop', etc.
+
+    `gpr-names=ABI'
+          Print GPR (general-purpose register) names as appropriate for
+          the specified ABI.  By default, GPR names are selected
+          according to the ABI of the binary being disassembled.
+
+    `fpr-names=ABI'
+          Print FPR (floating-point register) names as appropriate for
+          the specified ABI.  By default, FPR numbers are printed
+          rather than names.
+
+    `cp0-names=ARCH'
+          Print CP0 (system control coprocessor; coprocessor 0)
+          register names as appropriate for the CPU or architecture
+          specified by ARCH.  By default, CP0 register names are
+          selected according to the architecture and CPU of the binary
+          being disassembled.
+
+    `hwr-names=ARCH'
+          Print HWR (hardware register, used by the `rdhwr'
+          instruction) names as appropriate for the CPU or architecture
+          specified by ARCH.  By default, HWR names are selected
+          according to the architecture and CPU of the binary being
+          disassembled.
+
+    `reg-names=ABI'
+          Print GPR and FPR names as appropriate for the selected ABI.
+
+    `reg-names=ARCH'
+          Print CPU-specific register names (CP0 register and HWR names)
+          as appropriate for the selected CPU or architecture.
+
+     For any of the options listed above, ABI or ARCH may be specified
+     as `numeric' to have numbers printed rather than names, for the
+     selected types of registers.  You can list the available values of
+     ABI and ARCH using the `--help' option.
+
+     For VAX, you can specify function entry addresses with `-M
+     entry:0xf00ba'.  You can use this multiple times to properly
+     disassemble VAX binary files that don't contain symbol tables (like
+     ROM dumps).  In these cases, the function entry mask would
+     otherwise be decoded as VAX instructions, which would probably
+     lead the rest of the function being wrongly disassembled.
+
+`-p'
+`--private-headers'
+     Print information that is specific to the object file format.  The
+     exact information printed depends upon the object file format.
+     For some object file formats, no additional information is printed.
+
+`-r'
+`--reloc'
+     Print the relocation entries of the file.  If used with `-d' or
+     `-D', the relocations are printed interspersed with the
+     disassembly.
+
+`-R'
+`--dynamic-reloc'
+     Print the dynamic relocation entries of the file.  This is only
+     meaningful for dynamic objects, such as certain types of shared
+     libraries.  As for `-r', if used with `-d' or `-D', the
+     relocations are printed interspersed with the disassembly.
+
+`-s'
+`--full-contents'
+     Display the full contents of any sections requested.  By default
+     all non-empty sections are displayed.
+
+`-S'
+`--source'
+     Display source code intermixed with disassembly, if possible.
+     Implies `-d'.
+
+`--prefix=PREFIX'
+     Specify PREFIX to add to the absolute paths when used with `-S'.
+
+`--prefix-strip=LEVEL'
+     Indicate how many initial directory names to strip off the
+     hardwired absolute paths. It has no effect without
+     `--prefix='PREFIX.
+
+`--show-raw-insn'
+     When disassembling instructions, print the instruction in hex as
+     well as in symbolic form.  This is the default except when
+     `--prefix-addresses' is used.
+
+`--no-show-raw-insn'
+     When disassembling instructions, do not print the instruction
+     bytes.  This is the default when `--prefix-addresses' is used.
+
+`--insn-width=WIDTH'
+     Display WIDTH bytes on a single line when disassembling
+     instructions.
+
+`-W[lLiaprmfFsoR]'
+`--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]'
+     Displays the contents of the debug sections in the file, if any are
+     present.  If one of the optional letters or words follows the
+     switch then only data found in those specific sections will be
+     dumped.
+
+`-G'
+`--stabs'
+     Display the full contents of any sections requested.  Display the
+     contents of the .stab and .stab.index and .stab.excl sections from
+     an ELF file.  This is only useful on systems (such as Solaris 2.0)
+     in which `.stab' debugging symbol-table entries are carried in an
+     ELF section.  In most other file formats, debugging symbol-table
+     entries are interleaved with linkage symbols, and are visible in
+     the `--syms' output.  For more information on stabs symbols, see
+     *note Stabs: (stabs.info)Top.
+
+`--start-address=ADDRESS'
+     Start displaying data at the specified address.  This affects the
+     output of the `-d', `-r' and `-s' options.
+
+`--stop-address=ADDRESS'
+     Stop displaying data at the specified address.  This affects the
+     output of the `-d', `-r' and `-s' options.
+
+`-t'
+`--syms'
+     Print the symbol table entries of the file.  This is similar to
+     the information provided by the `nm' program, although the display
+     format is different.  The format of the output depends upon the
+     format of the file being dumped, but there are two main types.
+     One looks like this:
+
+          [  4](sec  3)(fl 0x00)(ty   0)(scl   3) (nx 1) 0x00000000 .bss
+          [  6](sec  1)(fl 0x00)(ty   0)(scl   2) (nx 0) 0x00000000 fred
+
+     where the number inside the square brackets is the number of the
+     entry in the symbol table, the SEC number is the section number,
+     the FL value are the symbol's flag bits, the TY number is the
+     symbol's type, the SCL number is the symbol's storage class and
+     the NX value is the number of auxilary entries associated with the
+     symbol.  The last two fields are the symbol's value and its name.
+
+     The other common output format, usually seen with ELF based files,
+     looks like this:
+
+          00000000 l    d  .bss   00000000 .bss
+          00000000 g       .text  00000000 fred
+
+     Here the first number is the symbol's value (sometimes refered to
+     as its address).  The next field is actually a set of characters
+     and spaces indicating the flag bits that are set on the symbol.
+     These characters are described below.  Next is the section with
+     which the symbol is associated or _*ABS*_ if the section is
+     absolute (ie not connected with any section), or _*UND*_ if the
+     section is referenced in the file being dumped, but not defined
+     there.
+
+     After the section name comes another field, a number, which for
+     common symbols is the alignment and for other symbol is the size.
+     Finally the symbol's name is displayed.
+
+     The flag characters are divided into 7 groups as follows:
+    `l'
+    `g'
+    `u'
+    `!'
+          The symbol is a local (l), global (g), unique global (u),
+          neither global nor local (a space) or both global and local
+          (!).  A symbol can be neither local or global for a variety
+          of reasons, e.g., because it is used for debugging, but it is
+          probably an indication of a bug if it is ever both local and
+          global.  Unique global symbols are a GNU extension to the
+          standard set of ELF symbol bindings.  For such a symbol the
+          dynamic linker will make sure that in the entire process
+          there is just one symbol with this name and type in use.
+
+    `w'
+          The symbol is weak (w) or strong (a space).
+
+    `C'
+          The symbol denotes a constructor (C) or an ordinary symbol (a
+          space).
+
+    `W'
+          The symbol is a warning (W) or a normal symbol (a space).  A
+          warning symbol's name is a message to be displayed if the
+          symbol following the warning symbol is ever referenced.
+
+    `I'
+
+    `i'
+          The symbol is an indirect reference to another symbol (I), a
+          function to be evaluated during reloc processing (i) or a
+          normal symbol (a space).
+
+    `d'
+    `D'
+          The symbol is a debugging symbol (d) or a dynamic symbol (D)
+          or a normal symbol (a space).
+
+    `F'
+
+    `f'
+
+    `O'
+          The symbol is the name of a function (F) or a file (f) or an
+          object (O) or just a normal symbol (a space).
+
+`-T'
+`--dynamic-syms'
+     Print the dynamic symbol table entries of the file.  This is only
+     meaningful for dynamic objects, such as certain types of shared
+     libraries.  This is similar to the information provided by the `nm'
+     program when given the `-D' (`--dynamic') option.
+
+`--special-syms'
+     When displaying symbols include those which the target considers
+     to be special in some way and which would not normally be of
+     interest to the user.
+
+`-V'
+`--version'
+     Print the version number of `objdump' and exit.
+
+`-x'
+`--all-headers'
+     Display all available header information, including the symbol
+     table and relocation entries.  Using `-x' is equivalent to
+     specifying all of `-a -f -h -p -r -t'.
+
+`-w'
+`--wide'
+     Format some lines for output devices that have more than 80
+     columns.  Also do not truncate symbol names when they are
+     displayed.
+
+`-z'
+`--disassemble-zeroes'
+     Normally the disassembly output will skip blocks of zeroes.  This
+     option directs the disassembler to disassemble those blocks, just
+     like any other data.
+
+
+File: binutils.info,  Node: ranlib,  Next: readelf,  Prev: objdump,  Up: Top
+
+5 ranlib
+********
+
+     ranlib [`-vVt'] ARCHIVE
+
+   `ranlib' generates an index to the contents of an archive and stores
+it in the archive.  The index lists each symbol defined by a member of
+an archive that is a relocatable object file.
+
+   You may use `nm -s' or `nm --print-armap' to list this index.
+
+   An archive with such an index speeds up linking to the library and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+
+   The GNU `ranlib' program is another form of GNU `ar'; running
+`ranlib' is completely equivalent to executing `ar -s'.  *Note ar::.
+
+`-v'
+`-V'
+`--version'
+     Show the version number of `ranlib'.
+
+`-t'
+     Update the timestamp of the symbol map of an archive.
+
+
+File: binutils.info,  Node: size,  Next: strings,  Prev: readelf,  Up: Top
+
+6 size
+******
+
+     size [`-A'|`-B'|`--format='COMPATIBILITY]
+          [`--help']
+          [`-d'|`-o'|`-x'|`--radix='NUMBER]
+          [`--common']
+          [`-t'|`--totals']
+          [`--target='BFDNAME] [`-V'|`--version']
+          [OBJFILE...]
+
+   The GNU `size' utility lists the section sizes--and the total
+size--for each of the object or archive files OBJFILE in its argument
+list.  By default, one line of output is generated for each object file
+or each module in an archive.
+
+   OBJFILE... are the object files to be examined.  If none are
+specified, the file `a.out' will be used.
+
+   The command line options have the following meanings:
+
+`-A'
+`-B'
+`--format=COMPATIBILITY'
+     Using one of these options, you can choose whether the output from
+     GNU `size' resembles output from System V `size' (using `-A', or
+     `--format=sysv'), or Berkeley `size' (using `-B', or
+     `--format=berkeley').  The default is the one-line format similar
+     to Berkeley's.
+
+     Here is an example of the Berkeley (default) format of output from
+     `size':
+          $ size --format=Berkeley ranlib size
+          text    data    bss     dec     hex     filename
+          294880  81920   11592   388392  5ed28   ranlib
+          294880  81920   11888   388688  5ee50   size
+
+     This is the same data, but displayed closer to System V
+     conventions:
+
+          $ size --format=SysV ranlib size
+          ranlib  :
+          section         size         addr
+          .text         294880         8192
+          .data          81920       303104
+          .bss           11592       385024
+          Total         388392
+
+
+          size  :
+          section         size         addr
+          .text         294880         8192
+          .data          81920       303104
+          .bss           11888       385024
+          Total         388688
+
+`--help'
+     Show a summary of acceptable arguments and options.
+
+`-d'
+`-o'
+`-x'
+`--radix=NUMBER'
+     Using one of these options, you can control whether the size of
+     each section is given in decimal (`-d', or `--radix=10'); octal
+     (`-o', or `--radix=8'); or hexadecimal (`-x', or `--radix=16').
+     In `--radix=NUMBER', only the three values (8, 10, 16) are
+     supported.  The total size is always given in two radices; decimal
+     and hexadecimal for `-d' or `-x' output, or octal and hexadecimal
+     if you're using `-o'.
+
+`--common'
+     Print total size of common symbols in each file.  When using
+     Berkeley format these are included in the bss size.
+
+`-t'
+`--totals'
+     Show totals of all objects listed (Berkeley format listing mode
+     only).
+
+`--target=BFDNAME'
+     Specify that the object-code format for OBJFILE is BFDNAME.  This
+     option may not be necessary; `size' can automatically recognize
+     many formats.  *Note Target Selection::, for more information.
+
+`-V'
+`--version'
+     Display the version number of `size'.
+
+
+File: binutils.info,  Node: strings,  Next: strip,  Prev: size,  Up: Top
+
+7 strings
+*********
+
+     strings [`-afovV'] [`-'MIN-LEN]
+             [`-n' MIN-LEN] [`--bytes='MIN-LEN]
+             [`-t' RADIX] [`--radix='RADIX]
+             [`-e' ENCODING] [`--encoding='ENCODING]
+             [`-'] [`--all'] [`--print-file-name']
+             [`-T' BFDNAME] [`--target='BFDNAME]
+             [`--help'] [`--version'] FILE...
+
+   For each FILE given, GNU `strings' prints the printable character
+sequences that are at least 4 characters long (or the number given with
+the options below) and are followed by an unprintable character.  By
+default, it only prints the strings from the initialized and loaded
+sections of object files; for other types of files, it prints the
+strings from the whole file.
+
+   `strings' is mainly useful for determining the contents of non-text
+files.
+
+`-a'
+`--all'
+`-'
+     Do not scan only the initialized and loaded sections of object
+     files; scan the whole files.
+
+`-f'
+`--print-file-name'
+     Print the name of the file before each string.
+
+`--help'
+     Print a summary of the program usage on the standard output and
+     exit.
+
+`-MIN-LEN'
+`-n MIN-LEN'
+`--bytes=MIN-LEN'
+     Print sequences of characters that are at least MIN-LEN characters
+     long, instead of the default 4.
+
+`-o'
+     Like `-t o'.  Some other versions of `strings' have `-o' act like
+     `-t d' instead.  Since we can not be compatible with both ways, we
+     simply chose one.
+
+`-t RADIX'
+`--radix=RADIX'
+     Print the offset within the file before each string.  The single
+     character argument specifies the radix of the offset--`o' for
+     octal, `x' for hexadecimal, or `d' for decimal.
+
+`-e ENCODING'
+`--encoding=ENCODING'
+     Select the character encoding of the strings that are to be found.
+     Possible values for ENCODING are: `s' = single-7-bit-byte
+     characters (ASCII, ISO 8859, etc., default), `S' =
+     single-8-bit-byte characters, `b' = 16-bit bigendian, `l' = 16-bit
+     littleendian, `B' = 32-bit bigendian, `L' = 32-bit littleendian.
+     Useful for finding wide character strings. (`l' and `b' apply to,
+     for example, Unicode UTF-16/UCS-2 encodings).
+
+`-T BFDNAME'
+`--target=BFDNAME'
+     Specify an object code format other than your system's default
+     format.  *Note Target Selection::, for more information.
+
+`-v'
+`-V'
+`--version'
+     Print the program version number on the standard output and exit.
+
+
+File: binutils.info,  Node: strip,  Next: c++filt,  Prev: strings,  Up: Top
+
+8 strip
+*******
+
+     strip [`-F' BFDNAME |`--target='BFDNAME]
+           [`-I' BFDNAME |`--input-target='BFDNAME]
+           [`-O' BFDNAME |`--output-target='BFDNAME]
+           [`-s'|`--strip-all']
+           [`-S'|`-g'|`-d'|`--strip-debug']
+           [`-K' SYMBOLNAME |`--keep-symbol='SYMBOLNAME]
+           [`-N' SYMBOLNAME |`--strip-symbol='SYMBOLNAME]
+           [`-w'|`--wildcard']
+           [`-x'|`--discard-all'] [`-X' |`--discard-locals']
+           [`-R' SECTIONNAME |`--remove-section='SECTIONNAME]
+           [`-o' FILE] [`-p'|`--preserve-dates']
+           [`--keep-file-symbols']
+           [`--only-keep-debug']
+           [`-v' |`--verbose'] [`-V'|`--version']
+           [`--help'] [`--info']
+           OBJFILE...
+
+   GNU `strip' discards all symbols from object files OBJFILE.  The
+list of object files may include archives.  At least one object file
+must be given.
+
+   `strip' modifies the files named in its argument, rather than
+writing modified copies under different names.
+
+`-F BFDNAME'
+`--target=BFDNAME'
+     Treat the original OBJFILE as a file with the object code format
+     BFDNAME, and rewrite it in the same format.  *Note Target
+     Selection::, for more information.
+
+`--help'
+     Show a summary of the options to `strip' and exit.
+
+`--info'
+     Display a list showing all architectures and object formats
+     available.
+
+`-I BFDNAME'
+`--input-target=BFDNAME'
+     Treat the original OBJFILE as a file with the object code format
+     BFDNAME.  *Note Target Selection::, for more information.
+
+`-O BFDNAME'
+`--output-target=BFDNAME'
+     Replace OBJFILE with a file in the output format BFDNAME.  *Note
+     Target Selection::, for more information.
+
+`-R SECTIONNAME'
+`--remove-section=SECTIONNAME'
+     Remove any section named SECTIONNAME from the output file.  This
+     option may be given more than once.  Note that using this option
+     inappropriately may make the output file unusable.
+
+`-s'
+`--strip-all'
+     Remove all symbols.
+
+`-g'
+`-S'
+`-d'
+`--strip-debug'
+     Remove debugging symbols only.
+
+`--strip-unneeded'
+     Remove all symbols that are not needed for relocation processing.
+
+`-K SYMBOLNAME'
+`--keep-symbol=SYMBOLNAME'
+     When stripping symbols, keep symbol SYMBOLNAME even if it would
+     normally be stripped.  This option may be given more than once.
+
+`-N SYMBOLNAME'
+`--strip-symbol=SYMBOLNAME'
+     Remove symbol SYMBOLNAME from the source file. This option may be
+     given more than once, and may be combined with strip options other
+     than `-K'.
+
+`-o FILE'
+     Put the stripped output in FILE, rather than replacing the
+     existing file.  When this argument is used, only one OBJFILE
+     argument may be specified.
+
+`-p'
+`--preserve-dates'
+     Preserve the access and modification dates of the file.
+
+`-w'
+`--wildcard'
+     Permit regular expressions in SYMBOLNAMEs used in other command
+     line options.  The question mark (?), asterisk (*), backslash (\)
+     and square brackets ([]) operators can be used anywhere in the
+     symbol name.  If the first character of the symbol name is the
+     exclamation point (!) then the sense of the switch is reversed for
+     that symbol.  For example:
+
+            -w -K !foo -K fo*
+
+     would cause strip to only keep symbols that start with the letters
+     "fo", but to discard the symbol "foo".
+
+`-x'
+`--discard-all'
+     Remove non-global symbols.
+
+`-X'
+`--discard-locals'
+     Remove compiler-generated local symbols.  (These usually start
+     with `L' or `.'.)
+
+`--keep-file-symbols'
+     When stripping a file, perhaps with `--strip-debug' or
+     `--strip-unneeded', retain any symbols specifying source file
+     names, which would otherwise get stripped.
+
+`--only-keep-debug'
+     Strip a file, removing contents of any sections that would not be
+     stripped by `--strip-debug' and leaving the debugging sections
+     intact.  In ELF files, this preserves all note sections in the
+     output.
+
+     The intention is that this option will be used in conjunction with
+     `--add-gnu-debuglink' to create a two part executable.  One a
+     stripped binary which will occupy less space in RAM and in a
+     distribution and the second a debugging information file which is
+     only needed if debugging abilities are required.  The suggested
+     procedure to create these files is as follows:
+
+       1. Link the executable as normal.  Assuming that is is called
+          `foo' then...
+
+       2. Run `objcopy --only-keep-debug foo foo.dbg' to create a file
+          containing the debugging info.
+
+       3. Run `objcopy --strip-debug foo' to create a stripped
+          executable.
+
+       4. Run `objcopy --add-gnu-debuglink=foo.dbg foo' to add a link
+          to the debugging info into the stripped executable.
+
+     Note--the choice of `.dbg' as an extension for the debug info file
+     is arbitrary.  Also the `--only-keep-debug' step is optional.  You
+     could instead do this:
+
+       1. Link the executable as normal.
+
+       2. Copy `foo' to `foo.full'
+
+       3. Run `strip --strip-debug foo'
+
+       4. Run `objcopy --add-gnu-debuglink=foo.full foo'
+
+     i.e., the file pointed to by the `--add-gnu-debuglink' can be the
+     full executable.  It does not have to be a file created by the
+     `--only-keep-debug' switch.
+
+     Note--this switch is only intended for use on fully linked files.
+     It does not make sense to use it on object files where the
+     debugging information may be incomplete.  Besides the
+     gnu_debuglink feature currently only supports the presence of one
+     filename containing debugging information, not multiple filenames
+     on a one-per-object-file basis.
+
+`-V'
+`--version'
+     Show the version number for `strip'.
+
+`-v'
+`--verbose'
+     Verbose output: list all object files modified.  In the case of
+     archives, `strip -v' lists all members of the archive.
+
+
+File: binutils.info,  Node: c++filt,  Next: addr2line,  Prev: strip,  Up: Top
+
+9 c++filt
+*********
+
+     c++filt [`-_'|`--strip-underscores']
+             [`-n'|`--no-strip-underscores']
+             [`-p'|`--no-params']
+             [`-t'|`--types']
+             [`-i'|`--no-verbose']
+             [`-s' FORMAT|`--format='FORMAT]
+             [`--help']  [`--version']  [SYMBOL...]
+
+   The C++ and Java languages provide function overloading, which means
+that you can write many functions with the same name, providing that
+each function takes parameters of different types.  In order to be able
+to distinguish these similarly named functions C++ and Java encode them
+into a low-level assembler name which uniquely identifies each
+different version.  This process is known as "mangling". The `c++filt'
+(1) program does the inverse mapping: it decodes ("demangles") low-level
+names into user-level names so that they can be read.
+
+   Every alphanumeric word (consisting of letters, digits, underscores,
+dollars, or periods) seen in the input is a potential mangled name.  If
+the name decodes into a C++ name, the C++ name replaces the low-level
+name in the output, otherwise the original word is output.  In this way
+you can pass an entire assembler source file, containing mangled names,
+through `c++filt' and see the same source file containing demangled
+names.
+
+   You can also use `c++filt' to decipher individual symbols by passing
+them on the command line:
+
+     c++filt SYMBOL
+
+   If no SYMBOL arguments are given, `c++filt' reads symbol names from
+the standard input instead.  All the results are printed on the
+standard output.  The difference between reading names from the command
+line versus reading names from the standard input is that command line
+arguments are expected to be just mangled names and no checking is
+performed to separate them from surrounding text.  Thus for example:
+
+     c++filt -n _Z1fv
+
+   will work and demangle the name to "f()" whereas:
+
+     c++filt -n _Z1fv,
+
+   will not work.  (Note the extra comma at the end of the mangled name
+which makes it invalid).  This command however will work:
+
+     echo _Z1fv, | c++filt -n
+
+   and will display "f(),", i.e., the demangled name followed by a
+trailing comma.  This behaviour is because when the names are read from
+the standard input it is expected that they might be part of an
+assembler source file where there might be extra, extraneous characters
+trailing after a mangled name.  For example:
+
+         .type   _Z1fv, @function
+
+`-_'
+`--strip-underscores'
+     On some systems, both the C and C++ compilers put an underscore in
+     front of every name.  For example, the C name `foo' gets the
+     low-level name `_foo'.  This option removes the initial
+     underscore.  Whether `c++filt' removes the underscore by default
+     is target dependent.
+
+`-n'
+`--no-strip-underscores'
+     Do not remove the initial underscore.
+
+`-p'
+`--no-params'
+     When demangling the name of a function, do not display the types of
+     the function's parameters.
+
+`-t'
+`--types'
+     Attempt to demangle types as well as function names.  This is
+     disabled by default since mangled types are normally only used
+     internally in the compiler, and they can be confused with
+     non-mangled names.  For example, a function called "a" treated as
+     a mangled type name would be demangled to "signed char".
+
+`-i'
+`--no-verbose'
+     Do not include implementation details (if any) in the demangled
+     output.
+
+`-s FORMAT'
+`--format=FORMAT'
+     `c++filt' can decode various methods of mangling, used by
+     different compilers.  The argument to this option selects which
+     method it uses:
+
+    `auto'
+          Automatic selection based on executable (the default method)
+
+    `gnu'
+          the one used by the GNU C++ compiler (g++)
+
+    `lucid'
+          the one used by the Lucid compiler (lcc)
+
+    `arm'
+          the one specified by the C++ Annotated Reference Manual
+
+    `hp'
+          the one used by the HP compiler (aCC)
+
+    `edg'
+          the one used by the EDG compiler
+
+    `gnu-v3'
+          the one used by the GNU C++ compiler (g++) with the V3 ABI.
+
+    `java'
+          the one used by the GNU Java compiler (gcj)
+
+    `gnat'
+          the one used by the GNU Ada compiler (GNAT).
+
+`--help'
+     Print a summary of the options to `c++filt' and exit.
+
+`--version'
+     Print the version number of `c++filt' and exit.
+
+     _Warning:_ `c++filt' is a new utility, and the details of its user
+     interface are subject to change in future releases.  In particular,
+     a command-line option may be required in the future to decode a
+     name passed as an argument on the command line; in other words,
+
+          c++filt SYMBOL
+
+     may in a future release become
+
+          c++filt OPTION SYMBOL
+
+   ---------- Footnotes ----------
+
+   (1) MS-DOS does not allow `+' characters in file names, so on MS-DOS
+this program is named `CXXFILT'.
+
+
+File: binutils.info,  Node: addr2line,  Next: nlmconv,  Prev: c++filt,  Up: Top
+
+10 addr2line
+************
+
+     addr2line [`-b' BFDNAME|`--target='BFDNAME]
+               [`-C'|`--demangle'[=STYLE]]
+               [`-e' FILENAME|`--exe='FILENAME]
+               [`-f'|`--functions'] [`-s'|`--basename']
+               [`-i'|`--inlines']
+               [`-j'|`--section='NAME]
+               [`-H'|`--help'] [`-V'|`--version']
+               [addr addr ...]
+
+   `addr2line' translates addresses into file names and line numbers.
+Given an address in an executable or an offset in a section of a
+relocatable object, it uses the debugging information to figure out
+which file name and line number are associated with it.
+
+   The executable or relocatable object to use is specified with the
+`-e' option.  The default is the file `a.out'.  The section in the
+relocatable object to use is specified with the `-j' option.
+
+   `addr2line' has two modes of operation.
+
+   In the first, hexadecimal addresses are specified on the command
+line, and `addr2line' displays the file name and line number for each
+address.
+
+   In the second, `addr2line' reads hexadecimal addresses from standard
+input, and prints the file name and line number for each address on
+standard output.  In this mode, `addr2line' may be used in a pipe to
+convert dynamically chosen addresses.
+
+   The format of the output is `FILENAME:LINENO'.  The file name and
+line number for each address is printed on a separate line.  If the
+`-f' option is used, then each `FILENAME:LINENO' line is preceded by a
+`FUNCTIONNAME' line which is the name of the function containing the
+address.
+
+   If the file name or function name can not be determined, `addr2line'
+will print two question marks in their place.  If the line number can
+not be determined, `addr2line' will print 0.
+
+   The long and short forms of options, shown here as alternatives, are
+equivalent.
+
+`-b BFDNAME'
+`--target=BFDNAME'
+     Specify that the object-code format for the object files is
+     BFDNAME.
+
+`-C'
+`--demangle[=STYLE]'
+     Decode ("demangle") low-level symbol names into user-level names.
+     Besides removing any initial underscore prepended by the system,
+     this makes C++ function names readable.  Different compilers have
+     different mangling styles. The optional demangling style argument
+     can be used to choose an appropriate demangling style for your
+     compiler. *Note c++filt::, for more information on demangling.
+
+`-e FILENAME'
+`--exe=FILENAME'
+     Specify the name of the executable for which addresses should be
+     translated.  The default file is `a.out'.
+
+`-f'
+`--functions'
+     Display function names as well as file and line number information.
+
+`-s'
+`--basenames'
+     Display only the base of each file name.
+
+`-i'
+`--inlines'
+     If the address belongs to a function that was inlined, the source
+     information for all enclosing scopes back to the first non-inlined
+     function will also be printed.  For example, if `main' inlines
+     `callee1' which inlines `callee2', and address is from `callee2',
+     the source information for `callee1' and `main' will also be
+     printed.
+
+`-j'
+`--section'
+     Read offsets relative to the specified section instead of absolute
+     addresses.
+
+
+File: binutils.info,  Node: nlmconv,  Next: windres,  Prev: addr2line,  Up: Top
+
+11 nlmconv
+**********
+
+`nlmconv' converts a relocatable object file into a NetWare Loadable
+Module.
+
+     _Warning:_ `nlmconv' is not always built as part of the binary
+     utilities, since it is only useful for NLM targets.
+
+     nlmconv [`-I' BFDNAME|`--input-target='BFDNAME]
+             [`-O' BFDNAME|`--output-target='BFDNAME]
+             [`-T' HEADERFILE|`--header-file='HEADERFILE]
+             [`-d'|`--debug'] [`-l' LINKER|`--linker='LINKER]
+             [`-h'|`--help'] [`-V'|`--version']
+             INFILE OUTFILE
+
+   `nlmconv' converts the relocatable `i386' object file INFILE into
+the NetWare Loadable Module OUTFILE, optionally reading HEADERFILE for
+NLM header information.  For instructions on writing the NLM command
+file language used in header files, see the `linkers' section,
+`NLMLINK' in particular, of the `NLM Development and Tools Overview',
+which is part of the NLM Software Developer's Kit ("NLM SDK"),
+available from Novell, Inc.  `nlmconv' uses the GNU Binary File
+Descriptor library to read INFILE; see *note BFD: (ld.info)BFD, for
+more information.
+
+   `nlmconv' can perform a link step.  In other words, you can list
+more than one object file for input if you list them in the definitions
+file (rather than simply specifying one input file on the command line).
+In this case, `nlmconv' calls the linker for you.
+
+`-I BFDNAME'
+`--input-target=BFDNAME'
+     Object format of the input file.  `nlmconv' can usually determine
+     the format of a given file (so no default is necessary).  *Note
+     Target Selection::, for more information.
+
+`-O BFDNAME'
+`--output-target=BFDNAME'
+     Object format of the output file.  `nlmconv' infers the output
+     format based on the input format, e.g. for a `i386' input file the
+     output format is `nlm32-i386'.  *Note Target Selection::, for more
+     information.
+
+`-T HEADERFILE'
+`--header-file=HEADERFILE'
+     Reads HEADERFILE for NLM header information.  For instructions on
+     writing the NLM command file language used in header files, see
+     see the `linkers' section, of the `NLM Development and Tools
+     Overview', which is part of the NLM Software Developer's Kit,
+     available from Novell, Inc.
+
+`-d'
+`--debug'
+     Displays (on standard error) the linker command line used by
+     `nlmconv'.
+
+`-l LINKER'
+`--linker=LINKER'
+     Use LINKER for any linking.  LINKER can be an absolute or a
+     relative pathname.
+
+`-h'
+`--help'
+     Prints a usage summary.
+
+`-V'
+`--version'
+     Prints the version number for `nlmconv'.
+
+
+File: binutils.info,  Node: windmc,  Next: dlltool,  Prev: windres,  Up: Top
+
+12 windmc
+*********
+
+`windmc' may be used to generator Windows message resources.
+
+     _Warning:_ `windmc' is not always built as part of the binary
+     utilities, since it is only useful for Windows targets.
+
+     windmc [options] input-file
+
+   `windmc' reads message definitions from an input file (.mc) and
+translate them into a set of output files.  The output files may be of
+four kinds:
+
+`h'
+     A C header file containing the message definitions.
+
+`rc'
+     A resource file compilable by the `windres' tool.
+
+`bin'
+     One or more binary files containing the resource data for a
+     specific message language.
+
+`dbg'
+     A C include file that maps message id's to their symbolic name.
+
+   The exact description of these different formats is available in
+documentation from Microsoft.
+
+   When `windmc' converts from the `mc' format to the `bin' format,
+`rc', `h', and optional `dbg' it is acting like the Windows Message
+Compiler.
+
+`-a'
+`--ascii_in'
+     Specifies that the input file specified is ANSI. This is the
+     default behaviour.
+
+`-A'
+`--ascii_out'
+     Specifies that messages in the output `bin' files should be in ANSI
+     format.
+
+`-b'
+`--binprefix'
+     Specifies that `bin' filenames should have to be prefixed by the
+     basename of the source file.
+
+`-c'
+`--customflag'
+     Sets the customer bit in all message id's.
+
+`-C CODEPAGE'
+`--codepage_in CODEPAGE'
+     Sets the default codepage to be used to convert input file to
+     UTF16. The default is ocdepage 1252.
+
+`-d'
+`--decimal_values'
+     Outputs the constants in the header file in decimal. Default is
+     using hexadecimal output.
+
+`-e EXT'
+`--extension EXT'
+     The extension for the header file. The default is .h extension.
+
+`-F TARGET'
+`--target TARGET'
+     Specify the BFD format to use for a bin file as output.  This is a
+     BFD target name; you can use the `--help' option to see a list of
+     supported targets.  Normally `windmc' will use the default format,
+     which is the first one listed by the `--help' option.  *note
+     Target Selection::.
+
+`-h PATH'
+`--headerdir PATH'
+     The target directory of the generated header file. The default is
+     the current directory.
+
+`-H'
+`--help'
+     Displays a list of command line options and then exits.
+
+`-m CHARACTERS'
+`--maxlength CHARACTERS'
+     Instructs `windmc' to generate a warning if the length of any
+     message exceeds the number specified.
+
+`-n'
+`--nullterminate'
+     Terminate message text in `bin' files by zero. By default they are
+     terminated by CR/LF.
+
+`-o'
+`--hresult_use'
+     Not yet implemented. Instructs `windmc' to generate an OLE2 header
+     file, using HRESULT definitions. Status codes are used if the flag
+     is not specified.
+
+`-O CODEPAGE'
+`--codepage_out CODEPAGE'
+     Sets the default codepage to be used to output text files. The
+     default is ocdepage 1252.
+
+`-r PATH'
+`--rcdir PATH'
+     The target directory for the generated `rc' script and the
+     generated `bin' files that the resource compiler script includes.
+     The default is the current directory.
+
+`-u'
+`--unicode_in'
+     Specifies that the input file is UTF16.
+
+`-U'
+`--unicode_out'
+     Specifies that messages in the output `bin' file should be in UTF16
+     format. This is the default behaviour.
+
+`-v'
+
+`--verbose'
+     Enable verbose mode.
+
+`-V'
+
+`--version'
+     Prints the version number for `windmc'.
+
+`-x PATH'
+`--xdgb PATH'
+     The path of the `dbg' C include file that maps message id's to the
+     symbolic name. No such file is generated without specifying the
+     switch.
+
+
+File: binutils.info,  Node: windres,  Next: windmc,  Prev: nlmconv,  Up: Top
+
+13 windres
+**********
+
+`windres' may be used to manipulate Windows resources.
+
+     _Warning:_ `windres' is not always built as part of the binary
+     utilities, since it is only useful for Windows targets.
+
+     windres [options] [input-file] [output-file]
+
+   `windres' reads resources from an input file and copies them into an
+output file.  Either file may be in one of three formats:
+
+`rc'
+     A text format read by the Resource Compiler.
+
+`res'
+     A binary format generated by the Resource Compiler.
+
+`coff'
+     A COFF object or executable.
+
+   The exact description of these different formats is available in
+documentation from Microsoft.
+
+   When `windres' converts from the `rc' format to the `res' format, it
+is acting like the Windows Resource Compiler.  When `windres' converts
+from the `res' format to the `coff' format, it is acting like the
+Windows `CVTRES' program.
+
+   When `windres' generates an `rc' file, the output is similar but not
+identical to the format expected for the input.  When an input `rc'
+file refers to an external filename, an output `rc' file will instead
+include the file contents.
+
+   If the input or output format is not specified, `windres' will guess
+based on the file name, or, for the input file, the file contents.  A
+file with an extension of `.rc' will be treated as an `rc' file, a file
+with an extension of `.res' will be treated as a `res' file, and a file
+with an extension of `.o' or `.exe' will be treated as a `coff' file.
+
+   If no output file is specified, `windres' will print the resources
+in `rc' format to standard output.
+
+   The normal use is for you to write an `rc' file, use `windres' to
+convert it to a COFF object file, and then link the COFF file into your
+application.  This will make the resources described in the `rc' file
+available to Windows.
+
+`-i FILENAME'
+`--input FILENAME'
+     The name of the input file.  If this option is not used, then
+     `windres' will use the first non-option argument as the input file
+     name.  If there are no non-option arguments, then `windres' will
+     read from standard input.  `windres' can not read a COFF file from
+     standard input.
+
+`-o FILENAME'
+`--output FILENAME'
+     The name of the output file.  If this option is not used, then
+     `windres' will use the first non-option argument, after any used
+     for the input file name, as the output file name.  If there is no
+     non-option argument, then `windres' will write to standard output.
+     `windres' can not write a COFF file to standard output.  Note, for
+     compatibility with `rc' the option `-fo' is also accepted, but its
+     use is not recommended.
+
+`-J FORMAT'
+`--input-format FORMAT'
+     The input format to read.  FORMAT may be `res', `rc', or `coff'.
+     If no input format is specified, `windres' will guess, as
+     described above.
+
+`-O FORMAT'
+`--output-format FORMAT'
+     The output format to generate.  FORMAT may be `res', `rc', or
+     `coff'.  If no output format is specified, `windres' will guess,
+     as described above.
+
+`-F TARGET'
+`--target TARGET'
+     Specify the BFD format to use for a COFF file as input or output.
+     This is a BFD target name; you can use the `--help' option to see
+     a list of supported targets.  Normally `windres' will use the
+     default format, which is the first one listed by the `--help'
+     option.  *note Target Selection::.
+
+`--preprocessor PROGRAM'
+     When `windres' reads an `rc' file, it runs it through the C
+     preprocessor first.  This option may be used to specify the
+     preprocessor to use, including any leading arguments.  The default
+     preprocessor argument is `gcc -E -xc-header -DRC_INVOKED'.
+
+`-I DIRECTORY'
+`--include-dir DIRECTORY'
+     Specify an include directory to use when reading an `rc' file.
+     `windres' will pass this to the preprocessor as an `-I' option.
+     `windres' will also search this directory when looking for files
+     named in the `rc' file.  If the argument passed to this command
+     matches any of the supported FORMATS (as described in the `-J'
+     option), it will issue a deprecation warning, and behave just like
+     the `-J' option.  New programs should not use this behaviour.  If a
+     directory happens to match a FORMAT, simple prefix it with `./' to
+     disable the backward compatibility.
+
+`-D TARGET'
+`--define SYM[=VAL]'
+     Specify a `-D' option to pass to the preprocessor when reading an
+     `rc' file.
+
+`-U TARGET'
+`--undefine SYM'
+     Specify a `-U' option to pass to the preprocessor when reading an
+     `rc' file.
+
+`-r'
+     Ignored for compatibility with rc.
+
+`-v'
+     Enable verbose mode.  This tells you what the preprocessor is if
+     you didn't specify one.
+
+`-c VAL'
+
+`--codepage VAL'
+     Specify the default codepage to use when reading an `rc' file.
+     VAL should be a hexadecimal prefixed by `0x' or decimal codepage
+     code. The valid range is from zero up to 0xffff, but the validity
+     of the codepage is host and configuration dependent.
+
+`-l VAL'
+
+`--language VAL'
+     Specify the default language to use when reading an `rc' file.
+     VAL should be a hexadecimal language code.  The low eight bits are
+     the language, and the high eight bits are the sublanguage.
+
+`--use-temp-file'
+     Use a temporary file to instead of using popen to read the output
+     of the preprocessor. Use this option if the popen implementation
+     is buggy on the host (eg., certain non-English language versions
+     of Windows 95 and Windows 98 are known to have buggy popen where
+     the output will instead go the console).
+
+`--no-use-temp-file'
+     Use popen, not a temporary file, to read the output of the
+     preprocessor.  This is the default behaviour.
+
+`-h'
+
+`--help'
+     Prints a usage summary.
+
+`-V'
+
+`--version'
+     Prints the version number for `windres'.
+
+`--yydebug'
+     If `windres' is compiled with `YYDEBUG' defined as `1', this will
+     turn on parser debugging.
+
+
+File: binutils.info,  Node: dlltool,  Next: Common Options,  Prev: windmc,  Up: Top
+
+14 dlltool
+**********
+
+`dlltool' is used to create the files needed to create dynamic link
+libraries (DLLs) on systems which understand PE format image files such
+as Windows.  A DLL contains an export table which contains information
+that the runtime loader needs to resolve references from a referencing
+program.
+
+   The export table is generated by this program by reading in a `.def'
+file or scanning the `.a' and `.o' files which will be in the DLL.  A
+`.o' file can contain information in special `.drectve' sections with
+export information.
+
+     _Note:_ `dlltool' is not always built as part of the binary
+     utilities, since it is only useful for those targets which support
+     DLLs.
+
+     dlltool [`-d'|`--input-def' DEF-FILE-NAME]
+             [`-b'|`--base-file' BASE-FILE-NAME]
+             [`-e'|`--output-exp' EXPORTS-FILE-NAME]
+             [`-z'|`--output-def' DEF-FILE-NAME]
+             [`-l'|`--output-lib' LIBRARY-FILE-NAME]
+             [`-y'|`--output-delaylib' LIBRARY-FILE-NAME]
+             [`--export-all-symbols'] [`--no-export-all-symbols']
+             [`--exclude-symbols' LIST]
+             [`--no-default-excludes']
+             [`-S'|`--as' PATH-TO-ASSEMBLER] [`-f'|`--as-flags' OPTIONS]
+             [`-D'|`--dllname' NAME] [`-m'|`--machine' MACHINE]
+             [`-a'|`--add-indirect']
+             [`-U'|`--add-underscore'] [`--add-stdcall-underscore']
+             [`-k'|`--kill-at'] [`-A'|`--add-stdcall-alias']
+             [`-p'|`--ext-prefix-alias' PREFIX]
+             [`-x'|`--no-idata4'] [`-c'|`--no-idata5']
+             [`--use-nul-prefixed-import-tables']
+             [`-I'|`--identify' LIBRARY-FILE-NAME] [`--identify-strict']
+             [`-i'|`--interwork']
+             [`-n'|`--nodelete'] [`-t'|`--temp-prefix' PREFIX]
+             [`-v'|`--verbose']
+             [`-h'|`--help'] [`-V'|`--version']
+             [object-file ...]
+
+   `dlltool' reads its inputs, which can come from the `-d' and `-b'
+options as well as object files specified on the command line.  It then
+processes these inputs and if the `-e' option has been specified it
+creates a exports file.  If the `-l' option has been specified it
+creates a library file and if the `-z' option has been specified it
+creates a def file.  Any or all of the `-e', `-l' and `-z' options can
+be present in one invocation of dlltool.
+
+   When creating a DLL, along with the source for the DLL, it is
+necessary to have three other files.  `dlltool' can help with the
+creation of these files.
+
+   The first file is a `.def' file which specifies which functions are
+exported from the DLL, which functions the DLL imports, and so on.  This
+is a text file and can be created by hand, or `dlltool' can be used to
+create it using the `-z' option.  In this case `dlltool' will scan the
+object files specified on its command line looking for those functions
+which have been specially marked as being exported and put entries for
+them in the `.def' file it creates.
+
+   In order to mark a function as being exported from a DLL, it needs to
+have an `-export:<name_of_function>' entry in the `.drectve' section of
+the object file.  This can be done in C by using the asm() operator:
+
+       asm (".section .drectve");
+       asm (".ascii \"-export:my_func\"");
+
+       int my_func (void) { ... }
+
+   The second file needed for DLL creation is an exports file.  This
+file is linked with the object files that make up the body of the DLL
+and it handles the interface between the DLL and the outside world.
+This is a binary file and it can be created by giving the `-e' option to
+`dlltool' when it is creating or reading in a `.def' file.
+
+   The third file needed for DLL creation is the library file that
+programs will link with in order to access the functions in the DLL (an
+`import library').  This file can be created by giving the `-l' option
+to dlltool when it is creating or reading in a `.def' file.
+
+   If the `-y' option is specified, dlltool generates a delay-import
+library that can be used instead of the normal import library to allow
+a program to link to the dll only as soon as an imported function is
+called for the first time. The resulting executable will need to be
+linked to the static delayimp library containing __delayLoadHelper2(),
+which in turn will import LoadLibraryA and GetProcAddress from kernel32.
+
+   `dlltool' builds the library file by hand, but it builds the exports
+file by creating temporary files containing assembler statements and
+then assembling these.  The `-S' command line option can be used to
+specify the path to the assembler that dlltool will use, and the `-f'
+option can be used to pass specific flags to that assembler.  The `-n'
+can be used to prevent dlltool from deleting these temporary assembler
+files when it is done, and if `-n' is specified twice then this will
+prevent dlltool from deleting the temporary object files it used to
+build the library.
+
+   Here is an example of creating a DLL from a source file `dll.c' and
+also creating a program (from an object file called `program.o') that
+uses that DLL:
+
+       gcc -c dll.c
+       dlltool -e exports.o -l dll.lib dll.o
+       gcc dll.o exports.o -o dll.dll
+       gcc program.o dll.lib -o program
+
+   `dlltool' may also be used to query an existing import library to
+determine the name of the DLL to which it is associated.  See the
+description of the `-I' or `--identify' option.
+
+   The command line options have the following meanings:
+
+`-d FILENAME'
+`--input-def FILENAME'
+     Specifies the name of a `.def' file to be read in and processed.
+
+`-b FILENAME'
+`--base-file FILENAME'
+     Specifies the name of a base file to be read in and processed.  The
+     contents of this file will be added to the relocation section in
+     the exports file generated by dlltool.
+
+`-e FILENAME'
+`--output-exp FILENAME'
+     Specifies the name of the export file to be created by dlltool.
+
+`-z FILENAME'
+`--output-def FILENAME'
+     Specifies the name of the `.def' file to be created by dlltool.
+
+`-l FILENAME'
+`--output-lib FILENAME'
+     Specifies the name of the library file to be created by dlltool.
+
+`-y FILENAME'
+`--output-delaylib FILENAME'
+     Specifies the name of the delay-import library file to be created
+     by dlltool.
+
+`--export-all-symbols'
+     Treat all global and weak defined symbols found in the input object
+     files as symbols to be exported.  There is a small list of symbols
+     which are not exported by default; see the `--no-default-excludes'
+     option.  You may add to the list of symbols to not export by using
+     the `--exclude-symbols' option.
+
+`--no-export-all-symbols'
+     Only export symbols explicitly listed in an input `.def' file or in
+     `.drectve' sections in the input object files.  This is the default
+     behaviour.  The `.drectve' sections are created by `dllexport'
+     attributes in the source code.
+
+`--exclude-symbols LIST'
+     Do not export the symbols in LIST.  This is a list of symbol names
+     separated by comma or colon characters.  The symbol names should
+     not contain a leading underscore.  This is only meaningful when
+     `--export-all-symbols' is used.
+
+`--no-default-excludes'
+     When `--export-all-symbols' is used, it will by default avoid
+     exporting certain special symbols.  The current list of symbols to
+     avoid exporting is `DllMain@12', `DllEntryPoint@0', `impure_ptr'.
+     You may use the `--no-default-excludes' option to go ahead and
+     export these special symbols.  This is only meaningful when
+     `--export-all-symbols' is used.
+
+`-S PATH'
+`--as PATH'
+     Specifies the path, including the filename, of the assembler to be
+     used to create the exports file.
+
+`-f OPTIONS'
+`--as-flags OPTIONS'
+     Specifies any specific command line options to be passed to the
+     assembler when building the exports file.  This option will work
+     even if the `-S' option is not used.  This option only takes one
+     argument, and if it occurs more than once on the command line,
+     then later occurrences will override earlier occurrences.  So if
+     it is necessary to pass multiple options to the assembler they
+     should be enclosed in double quotes.
+
+`-D NAME'
+`--dll-name NAME'
+     Specifies the name to be stored in the `.def' file as the name of
+     the DLL when the `-e' option is used.  If this option is not
+     present, then the filename given to the `-e' option will be used
+     as the name of the DLL.
+
+`-m MACHINE'
+`-machine MACHINE'
+     Specifies the type of machine for which the library file should be
+     built.  `dlltool' has a built in default type, depending upon how
+     it was created, but this option can be used to override that.
+     This is normally only useful when creating DLLs for an ARM
+     processor, when the contents of the DLL are actually encode using
+     Thumb instructions.
+
+`-a'
+`--add-indirect'
+     Specifies that when `dlltool' is creating the exports file it
+     should add a section which allows the exported functions to be
+     referenced without using the import library.  Whatever the hell
+     that means!
+
+`-U'
+`--add-underscore'
+     Specifies that when `dlltool' is creating the exports file it
+     should prepend an underscore to the names of _all_ exported
+     symbols.
+
+`--add-stdcall-underscore'
+     Specifies that when `dlltool' is creating the exports file it
+     should prepend an underscore to the names of exported _stdcall_
+     functions. Variable names and non-stdcall function names are not
+     modified.  This option is useful when creating GNU-compatible
+     import libs for third party DLLs that were built with MS-Windows
+     tools.
+
+`-k'
+`--kill-at'
+     Specifies that when `dlltool' is creating the exports file it
+     should not append the string `@ <number>'.  These numbers are
+     called ordinal numbers and they represent another way of accessing
+     the function in a DLL, other than by name.
+
+`-A'
+`--add-stdcall-alias'
+     Specifies that when `dlltool' is creating the exports file it
+     should add aliases for stdcall symbols without `@ <number>' in
+     addition to the symbols with `@ <number>'.
+
+`-p'
+`--ext-prefix-alias PREFIX'
+     Causes `dlltool' to create external aliases for all DLL imports
+     with the specified prefix.  The aliases are created for both
+     external and import symbols with no leading underscore.
+
+`-x'
+`--no-idata4'
+     Specifies that when `dlltool' is creating the exports and library
+     files it should omit the `.idata4' section.  This is for
+     compatibility with certain operating systems.
+
+`--use-nul-prefixed-import-tables'
+     Specifies that when `dlltool' is creating the exports and library
+     files it should prefix the `.idata4' and `.idata5' by zero an
+     element. This emulates old gnu import library generation of
+     `dlltool'. By default this option is turned off.
+
+`-c'
+`--no-idata5'
+     Specifies that when `dlltool' is creating the exports and library
+     files it should omit the `.idata5' section.  This is for
+     compatibility with certain operating systems.
+
+`-I FILENAME'
+`--identify FILENAME'
+     Specifies that `dlltool' should inspect the import library
+     indicated by FILENAME and report, on `stdout', the name(s) of the
+     associated DLL(s).  This can be performed in addition to any other
+     operations indicated by the other options and arguments.
+     `dlltool' fails if the import library does not exist or is not
+     actually an import library. See also `--identify-strict'.
+
+`--identify-strict'
+     Modifies the behavior of the `--identify' option, such that an
+     error is reported if FILENAME is associated with more than one DLL.
+
+`-i'
+`--interwork'
+     Specifies that `dlltool' should mark the objects in the library
+     file and exports file that it produces as supporting interworking
+     between ARM and Thumb code.
+
+`-n'
+`--nodelete'
+     Makes `dlltool' preserve the temporary assembler files it used to
+     create the exports file.  If this option is repeated then dlltool
+     will also preserve the temporary object files it uses to create
+     the library file.
+
+`-t PREFIX'
+`--temp-prefix PREFIX'
+     Makes `dlltool' use PREFIX when constructing the names of
+     temporary assembler and object files.  By default, the temp file
+     prefix is generated from the pid.
+
+`-v'
+`--verbose'
+     Make dlltool describe what it is doing.
+
+`-h'
+`--help'
+     Displays a list of command line options and then exits.
+
+`-V'
+`--version'
+     Displays dlltool's version number and then exits.
+
+
+* Menu:
+
+* def file format::             The format of the dlltool `.def' file
+
+
+File: binutils.info,  Node: def file format,  Up: dlltool
+
+14.1 The format of the `dlltool' `.def' file
+============================================
+
+A `.def' file contains any number of the following commands:
+
+`NAME' NAME `[ ,' BASE `]'
+     The result is going to be named NAME`.exe'.
+
+`LIBRARY' NAME `[ ,' BASE `]'
+     The result is going to be named NAME`.dll'.
+
+`EXPORTS ( ( (' NAME1 `[ = ' NAME2 `] ) | ( ' NAME1 `=' MODULE-NAME `.' EXTERNAL-NAME `) )'
+
+`[' INTEGER `] [ NONAME ] [ CONSTANT ] [ DATA ] [ PRIVATE ] ) *'
+     Declares NAME1 as an exported symbol from the DLL, with optional
+     ordinal number INTEGER, or declares NAME1 as an alias (forward) of
+     the function EXTERNAL-NAME in the DLL MODULE-NAME.
+
+`IMPORTS ( (' INTERNAL-NAME `=' MODULE-NAME `.' INTEGER `) | [' INTERNAL-NAME `= ]' MODULE-NAME `.' EXTERNAL-NAME `) ) *'
+     Declares that EXTERNAL-NAME or the exported function whose ordinal
+     number is INTEGER is to be imported from the file MODULE-NAME.  If
+     INTERNAL-NAME is specified then this is the name that the imported
+     function will be referred to in the body of the DLL.
+
+`DESCRIPTION' STRING
+     Puts STRING into the output `.exp' file in the `.rdata' section.
+
+`STACKSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]'
+
+`HEAPSIZE' NUMBER-RESERVE `[, ' NUMBER-COMMIT `]'
+     Generates `--stack' or `--heap' NUMBER-RESERVE,NUMBER-COMMIT in
+     the output `.drectve' section.  The linker will see this and act
+     upon it.
+
+`CODE' ATTR `+'
+
+`DATA' ATTR `+'
+
+`SECTIONS (' SECTION-NAME ATTR` + ) *'
+     Generates `--attr' SECTION-NAME ATTR in the output `.drectve'
+     section, where ATTR is one of `READ', `WRITE', `EXECUTE' or
+     `SHARED'.  The linker will see this and act upon it.
+
+
+
+File: binutils.info,  Node: readelf,  Next: size,  Prev: ranlib,  Up: Top
+
+15 readelf
+**********
+
+     readelf [`-a'|`--all']
+             [`-h'|`--file-header']
+             [`-l'|`--program-headers'|`--segments']
+             [`-S'|`--section-headers'|`--sections']
+             [`-g'|`--section-groups']
+             [`-t'|`--section-details']
+             [`-e'|`--headers']
+             [`-s'|`--syms'|`--symbols']
+             [`-n'|`--notes']
+             [`-r'|`--relocs']
+             [`-u'|`--unwind']
+             [`-d'|`--dynamic']
+             [`-V'|`--version-info']
+             [`-A'|`--arch-specific']
+             [`-D'|`--use-dynamic']
+             [`-x' <number or name>|`--hex-dump='<number or name>]
+             [`-p' <number or name>|`--string-dump='<number or name>]
+             [`-R' <number or name>|`--relocated-dump='<number or name>]
+             [`-c'|`--archive-index']
+             [`-w[lLiaprmfFsoR]'|
+              `--debug-dump'[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]]
+             [`-I'|`-histogram']
+             [`-v'|`--version']
+             [`-W'|`--wide']
+             [`-H'|`--help']
+             ELFFILE...
+
+   `readelf' displays information about one or more ELF format object
+files.  The options control what particular information to display.
+
+   ELFFILE... are the object files to be examined.  32-bit and 64-bit
+ELF files are supported, as are archives containing ELF files.
+
+   This program performs a similar function to `objdump' but it goes
+into more detail and it exists independently of the BFD library, so if
+there is a bug in BFD then readelf will not be affected.
+
+   The long and short forms of options, shown here as alternatives, are
+equivalent.  At least one option besides `-v' or `-H' must be given.
+
+`-a'
+`--all'
+     Equivalent to specifying `--file-header', `--program-headers',
+     `--sections', `--symbols', `--relocs', `--dynamic', `--notes' and
+     `--version-info'.
+
+`-h'
+`--file-header'
+     Displays the information contained in the ELF header at the start
+     of the file.
+
+`-l'
+`--program-headers'
+`--segments'
+     Displays the information contained in the file's segment headers,
+     if it has any.
+
+`-S'
+`--sections'
+`--section-headers'
+     Displays the information contained in the file's section headers,
+     if it has any.
+
+`-g'
+`--section-groups'
+     Displays the information contained in the file's section groups,
+     if it has any.
+
+`-t'
+`--section-details'
+     Displays the detailed section information. Implies `-S'.
+
+`-s'
+`--symbols'
+`--syms'
+     Displays the entries in symbol table section of the file, if it
+     has one.
+
+`-e'
+`--headers'
+     Display all the headers in the file.  Equivalent to `-h -l -S'.
+
+`-n'
+`--notes'
+     Displays the contents of the NOTE segments and/or sections, if any.
+
+`-r'
+`--relocs'
+     Displays the contents of the file's relocation section, if it has
+     one.
+
+`-u'
+`--unwind'
+     Displays the contents of the file's unwind section, if it has one.
+     Only the unwind sections for IA64 ELF files are currently
+     supported.
+
+`-d'
+`--dynamic'
+     Displays the contents of the file's dynamic section, if it has one.
+
+`-V'
+`--version-info'
+     Displays the contents of the version sections in the file, it they
+     exist.
+
+`-A'
+`--arch-specific'
+     Displays architecture-specific information in the file, if there
+     is any.
+
+`-D'
+`--use-dynamic'
+     When displaying symbols, this option makes `readelf' use the
+     symbol table in the file's dynamic section, rather than the one in
+     the symbols section.
+
+`-x <number or name>'
+`--hex-dump=<number or name>'
+     Displays the contents of the indicated section as a hexadecimal
+     bytes.  A number identifies a particular section by index in the
+     section table; any other string identifies all sections with that
+     name in the object file.
+
+`-R <number or name>'
+`--relocated-dump=<number or name>'
+     Displays the contents of the indicated section as a hexadecimal
+     bytes.  A number identifies a particular section by index in the
+     section table; any other string identifies all sections with that
+     name in the object file.  The contents of the section will be
+     relocated before they are displayed.
+
+`-p <number or name>'
+`--string-dump=<number or name>'
+     Displays the contents of the indicated section as printable
+     strings.  A number identifies a particular section by index in the
+     section table; any other string identifies all sections with that
+     name in the object file.
+
+`-c'
+`--archive-index'
+     Displays the file symbol index infomation contained in the header
+     part of binary archives.  Performs the same function as the `t'
+     command to `ar', but without using the BFD library.  *Note ar::.
+
+`-w[lLiaprmfFsoR]'
+`--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]'
+     Displays the contents of the debug sections in the file, if any are
+     present.  If one of the optional letters or words follows the
+     switch then only data found in those specific sections will be
+     dumped.
+
+     Note: the `=decodedline' option will display the interpreted
+     contents of a .debug_line section whereas the `=rawline' option
+     dumps the contents in a raw format.
+
+`-I'
+`--histogram'
+     Display a histogram of bucket list lengths when displaying the
+     contents of the symbol tables.
+
+`-v'
+`--version'
+     Display the version number of readelf.
+
+`-W'
+`--wide'
+     Don't break output lines to fit into 80 columns. By default
+     `readelf' breaks section header and segment listing lines for
+     64-bit ELF files, so that they fit into 80 columns. This option
+     causes `readelf' to print each section header resp. each segment
+     one a single line, which is far more readable on terminals wider
+     than 80 columns.
+
+`-H'
+`--help'
+     Display the command line options understood by `readelf'.
+
+
+
+File: binutils.info,  Node: Common Options,  Next: Selecting the Target System,  Prev: dlltool,  Up: Top
+
+16 Common Options
+*****************
+
+The following command-line options are supported by all of the programs
+described in this manual.
+
+`@FILE'
+     Read command-line options from FILE.  The options read are
+     inserted in place of the original @FILE option.  If FILE does not
+     exist, or cannot be read, then the option will be treated
+     literally, and not removed.
+
+     Options in FILE are separated by whitespace.  A whitespace
+     character may be included in an option by surrounding the entire
+     option in either single or double quotes.  Any character
+     (including a backslash) may be included by prefixing the character
+     to be included with a backslash.  The FILE may itself contain
+     additional @FILE options; any such options will be processed
+     recursively.
+
+`--help'
+     Display the command-line options supported by the program.
+
+`--version'
+     Display the version number of the program.
+
+
+
+File: binutils.info,  Node: Selecting the Target System,  Next: Reporting Bugs,  Prev: Common Options,  Up: Top
+
+17 Selecting the Target System
+******************************
+
+You can specify two aspects of the target system to the GNU binary file
+utilities, each in several ways:
+
+   * the target
+
+   * the architecture
+
+   In the following summaries, the lists of ways to specify values are
+in order of decreasing precedence.  The ways listed first override those
+listed later.
+
+   The commands to list valid values only list the values for which the
+programs you are running were configured.  If they were configured with
+`--enable-targets=all', the commands list most of the available values,
+but a few are left out; not all targets can be configured in at once
+because some of them can only be configured "native" (on hosts with the
+same type as the target system).
+
+* Menu:
+
+* Target Selection::
+* Architecture Selection::
+
+
+File: binutils.info,  Node: Target Selection,  Next: Architecture Selection,  Up: Selecting the Target System
+
+17.1 Target Selection
+=====================
+
+A "target" is an object file format.  A given target may be supported
+for multiple architectures (*note Architecture Selection::).  A target
+selection may also have variations for different operating systems or
+architectures.
+
+   The command to list valid target values is `objdump -i' (the first
+column of output contains the relevant information).
+
+   Some sample values are: `a.out-hp300bsd', `ecoff-littlemips',
+`a.out-sunos-big'.
+
+   You can also specify a target using a configuration triplet.  This is
+the same sort of name that is passed to `configure' to specify a
+target.  When you use a configuration triplet as an argument, it must be
+fully canonicalized.  You can see the canonical version of a triplet by
+running the shell script `config.sub' which is included with the
+sources.
+
+   Some sample configuration triplets are: `m68k-hp-bsd',
+`mips-dec-ultrix', `sparc-sun-sunos'.
+
+`objdump' Target
+----------------
+
+Ways to specify:
+
+  1. command line option: `-b' or `--target'
+
+  2. environment variable `GNUTARGET'
+
+  3. deduced from the input file
+
+`objcopy' and `strip' Input Target
+----------------------------------
+
+Ways to specify:
+
+  1. command line options: `-I' or `--input-target', or `-F' or
+     `--target'
+
+  2. environment variable `GNUTARGET'
+
+  3. deduced from the input file
+
+`objcopy' and `strip' Output Target
+-----------------------------------
+
+Ways to specify:
+
+  1. command line options: `-O' or `--output-target', or `-F' or
+     `--target'
+
+  2. the input target (see "`objcopy' and `strip' Input Target" above)
+
+  3. environment variable `GNUTARGET'
+
+  4. deduced from the input file
+
+`nm', `size', and `strings' Target
+----------------------------------
+
+Ways to specify:
+
+  1. command line option: `--target'
+
+  2. environment variable `GNUTARGET'
+
+  3. deduced from the input file
+
+
+File: binutils.info,  Node: Architecture Selection,  Prev: Target Selection,  Up: Selecting the Target System
+
+17.2 Architecture Selection
+===========================
+
+An "architecture" is a type of CPU on which an object file is to run.
+Its name may contain a colon, separating the name of the processor
+family from the name of the particular CPU.
+
+   The command to list valid architecture values is `objdump -i' (the
+second column contains the relevant information).
+
+   Sample values: `m68k:68020', `mips:3000', `sparc'.
+
+`objdump' Architecture
+----------------------
+
+Ways to specify:
+
+  1. command line option: `-m' or `--architecture'
+
+  2. deduced from the input file
+
+`objcopy', `nm', `size', `strings' Architecture
+-----------------------------------------------
+
+Ways to specify:
+
+  1. deduced from the input file
+
+
+File: binutils.info,  Node: Reporting Bugs,  Next: GNU Free Documentation License,  Prev: Selecting the Target System,  Up: Top
+
+18 Reporting Bugs
+*****************
+
+Your bug reports play an essential role in making the binary utilities
+reliable.
+
+   Reporting a bug may help you by bringing a solution to your problem,
+or it may not.  But in any case the principal function of a bug report
+is to help the entire community by making the next version of the binary
+utilities work better.  Bug reports are your contribution to their
+maintenance.
+
+   In order for a bug report to serve its purpose, you must include the
+information that enables us to fix the bug.
+
+* Menu:
+
+* Bug Criteria::                Have you found a bug?
+* Bug Reporting::               How to report bugs
+
+
+File: binutils.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Reporting Bugs
+
+18.1 Have You Found a Bug?
+==========================
+
+If you are not sure whether you have found a bug, here are some
+guidelines:
+
+   * If a binary utility gets a fatal signal, for any input whatever,
+     that is a bug.  Reliable utilities never crash.
+
+   * If a binary utility produces an error message for valid input,
+     that is a bug.
+
+   * If you are an experienced user of binary utilities, your
+     suggestions for improvement are welcome in any case.
+
+
+File: binutils.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Reporting Bugs
+
+18.2 How to Report Bugs
+=======================
+
+A number of companies and individuals offer support for GNU products.
+If you obtained the binary utilities from a support organization, we
+recommend you contact that organization first.
+
+   You can find contact information for many support companies and
+individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
+
+   In any event, we also recommend that you send bug reports for the
+binary utilities to `http://www.sourceware.org/bugzilla/'.
+
+   The fundamental principle of reporting bugs usefully is this:
+*report all the facts*.  If you are not sure whether to state a fact or
+leave it out, state it!
+
+   Often people omit facts because they think they know what causes the
+problem and assume that some details do not matter.  Thus, you might
+assume that the name of a file you use in an example does not matter.
+Well, probably it does not, but one cannot be sure.  Perhaps the bug is
+a stray memory reference which happens to fetch from the location where
+that pathname is stored in memory; perhaps, if the pathname were
+different, the contents of that location would fool the utility into
+doing the right thing despite the bug.  Play it safe and give a
+specific, complete example.  That is the easiest thing for you to do,
+and the most helpful.
+
+   Keep in mind that the purpose of a bug report is to enable us to fix
+the bug if it is new to us.  Therefore, always write your bug reports
+on the assumption that the bug has not been reported previously.
+
+   Sometimes people give a few sketchy facts and ask, "Does this ring a
+bell?"  This cannot help us fix a bug, so it is basically useless.  We
+respond by asking for enough details to enable us to investigate.  You
+might as well expedite matters by sending them to begin with.
+
+   To enable us to fix the bug, you should include all these things:
+
+   * The version of the utility.  Each utility announces it if you
+     start it with the `--version' argument.
+
+     Without this, we will not know whether there is any point in
+     looking for the bug in the current version of the binary utilities.
+
+   * Any patches you may have applied to the source, including any
+     patches made to the `BFD' library.
+
+   * The type of machine you are using, and the operating system name
+     and version number.
+
+   * What compiler (and its version) was used to compile the
+     utilities--e.g.  "`gcc-2.7'".
+
+   * The command arguments you gave the utility to observe the bug.  To
+     guarantee you will not omit something important, list them all.  A
+     copy of the Makefile (or the output from make) is sufficient.
+
+     If we were to try to guess the arguments, we would probably guess
+     wrong and then we might not encounter the bug.
+
+   * A complete input file, or set of input files, that will reproduce
+     the bug.  If the utility is reading an object file or files, then
+     it is generally most helpful to send the actual object files.
+
+     If the source files were produced exclusively using GNU programs
+     (e.g., `gcc', `gas', and/or the GNU `ld'), then it may be OK to
+     send the source files rather than the object files.  In this case,
+     be sure to say exactly what version of `gcc', or whatever, was
+     used to produce the object files.  Also say how `gcc', or
+     whatever, was configured.
+
+   * A description of what behavior you observe that you believe is
+     incorrect.  For example, "It gets a fatal signal."
+
+     Of course, if the bug is that the utility gets a fatal signal,
+     then we will certainly notice it.  But if the bug is incorrect
+     output, we might not notice unless it is glaringly wrong.  You
+     might as well not give us a chance to make a mistake.
+
+     Even if the problem you experience is a fatal signal, you should
+     still say so explicitly.  Suppose something strange is going on,
+     such as your copy of the utility is out of sync, or you have
+     encountered a bug in the C library on your system.  (This has
+     happened!)  Your copy might crash and ours would not.  If you told
+     us to expect a crash, then when ours fails to crash, we would know
+     that the bug was not happening for us.  If you had not told us to
+     expect a crash, then we would not be able to draw any conclusion
+     from our observations.
+
+   * If you wish to suggest changes to the source, send us context
+     diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
+     Always send diffs from the old file to the new file.  If you wish
+     to discuss something in the `ld' source, refer to it by context,
+     not by line number.
+
+     The line numbers in our development sources will not match those
+     in your sources.  Your line numbers would convey no useful
+     information to us.
+
+   Here are some things that are not necessary:
+
+   * A description of the envelope of the bug.
+
+     Often people who encounter a bug spend a lot of time investigating
+     which changes to the input file will make the bug go away and which
+     changes will not affect it.
+
+     This is often time consuming and not very useful, because the way
+     we will find the bug is by running a single example under the
+     debugger with breakpoints, not by pure deduction from a series of
+     examples.  We recommend that you save your time for something else.
+
+     Of course, if you can find a simpler example to report _instead_
+     of the original one, that is a convenience for us.  Errors in the
+     output will be easier to spot, running under the debugger will take
+     less time, and so on.
+
+     However, simplification is not vital; if you do not want to do
+     this, report the bug anyway and send us the entire test case you
+     used.
+
+   * A patch for the bug.
+
+     A patch for the bug does help us if it is a good one.  But do not
+     omit the necessary information, such as the test case, on the
+     assumption that a patch is all we need.  We might see problems
+     with your patch and decide to fix the problem another way, or we
+     might not understand it at all.
+
+     Sometimes with programs as complicated as the binary utilities it
+     is very hard to construct an example that will make the program
+     follow a certain path through the code.  If you do not send us the
+     example, we will not be able to construct one, so we will not be
+     able to verify that the bug is fixed.
+
+     And if we cannot understand what bug you are trying to fix, or why
+     your patch should be an improvement, we will not install it.  A
+     test case will help us to understand.
+
+   * A guess about what the bug is or what it depends on.
+
+     Such guesses are usually wrong.  Even we cannot guess right about
+     such things without first using the debugger to find the facts.
+
+
+File: binutils.info,  Node: GNU Free Documentation License,  Next: Binutils Index,  Prev: Reporting Bugs,  Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: binutils.info,  Node: Binutils Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Binutils Index
+**************
+
+[index]
+* Menu:
+
+* .stab:                                 objdump.             (line 370)
+* Add prefix to absolute paths:          objdump.             (line 341)
+* addr2line:                             addr2line.           (line   6)
+* address to file name and line number:  addr2line.           (line   6)
+* all header information, object file:   objdump.             (line 489)
+* ar:                                    ar.                  (line   6)
+* ar compatibility:                      ar.                  (line  50)
+* architecture:                          objdump.             (line 195)
+* architectures available:               objdump.             (line 180)
+* archive contents:                      ranlib.              (line   6)
+* Archive file symbol index information: readelf.             (line 147)
+* archive headers:                       objdump.             (line  65)
+* archives:                              ar.                  (line   6)
+* base files:                            dlltool.             (line 123)
+* bug criteria:                          Bug Criteria.        (line   6)
+* bug reports:                           Bug Reporting.       (line   6)
+* bugs:                                  Reporting Bugs.      (line   6)
+* bugs, reporting:                       Bug Reporting.       (line   6)
+* c++filt:                               c++filt.             (line   6)
+* changing object addresses:             objcopy.             (line 282)
+* changing section address:              objcopy.             (line 292)
+* changing section LMA:                  objcopy.             (line 300)
+* changing section VMA:                  objcopy.             (line 313)
+* changing start address:                objcopy.             (line 277)
+* collections of files:                  ar.                  (line   6)
+* compatibility, ar:                     ar.                  (line  50)
+* contents of archive:                   ar cmdline.          (line  88)
+* crash:                                 Bug Criteria.        (line   9)
+* creating archives:                     ar cmdline.          (line 129)
+* creating thin archive:                 ar cmdline.          (line 190)
+* cxxfilt:                               c++filt.             (line  14)
+* dates in archive:                      ar cmdline.          (line 164)
+* debug symbols:                         objdump.             (line 370)
+* debugging symbols:                     nm.                  (line 141)
+* deleting from archive:                 ar cmdline.          (line  26)
+* demangling C++ symbols:                c++filt.             (line   6)
+* demangling in nm:                      nm.                  (line 149)
+* demangling in objdump <1>:             addr2line.           (line  55)
+* demangling in objdump:                 objdump.             (line  93)
+* deterministic archives:                ar cmdline.          (line 135)
+* disassembling object code:             objdump.             (line 115)
+* disassembly architecture:              objdump.             (line 195)
+* disassembly endianness:                objdump.             (line 135)
+* disassembly, with source:              objdump.             (line 337)
+* discarding symbols:                    strip.               (line   6)
+* DLL:                                   dlltool.             (line   6)
+* dlltool:                               dlltool.             (line   6)
+* DWARF:                                 objdump.             (line 363)
+* dynamic relocation entries, in object file: objdump.        (line 325)
+* dynamic symbol table entries, printing: objdump.            (line 473)
+* dynamic symbols:                       nm.                  (line 161)
+* ELF dynamic section information:       readelf.             (line 105)
+* ELF file header information:           readelf.             (line  54)
+* ELF file information:                  readelf.             (line   6)
+* ELF notes:                             readelf.             (line  90)
+* ELF object file format:                objdump.             (line 370)
+* ELF program header information:        readelf.             (line  60)
+* ELF reloc information:                 readelf.             (line  94)
+* ELF section group information:         readelf.             (line  71)
+* ELF section information:               readelf.             (line  66)
+* ELF segment information:               readelf.             (line  60)
+* ELF symbol table information:          readelf.             (line  81)
+* ELF version sections informations:     readelf.             (line 109)
+* endianness:                            objdump.             (line 135)
+* error on valid input:                  Bug Criteria.        (line  12)
+* external symbols:                      nm.                  (line 253)
+* extract from archive:                  ar cmdline.          (line 103)
+* fatal signal:                          Bug Criteria.        (line   9)
+* file name:                             nm.                  (line 135)
+* header information, all:               objdump.             (line 489)
+* input .def file:                       dlltool.             (line 119)
+* input file name:                       nm.                  (line 135)
+* Instruction width:                     objdump.             (line 358)
+* libraries:                             ar.                  (line  25)
+* listings strings:                      strings.             (line   6)
+* load plugin:                           nm.                  (line 176)
+* machine instructions:                  objdump.             (line 115)
+* moving in archive:                     ar cmdline.          (line  34)
+* MRI compatibility, ar:                 ar scripts.          (line   8)
+* name duplication in archive:           ar cmdline.          (line  97)
+* name length:                           ar.                  (line  18)
+* nm:                                    nm.                  (line   6)
+* nm compatibility:                      nm.                  (line 167)
+* nm format:                             nm.                  (line 145)
+* not writing archive index:             ar cmdline.          (line 183)
+* objdump:                               objdump.             (line   6)
+* object code format <1>:                addr2line.           (line  50)
+* object code format <2>:                strings.             (line  67)
+* object code format <3>:                objdump.             (line  79)
+* object code format <4>:                size.                (line  84)
+* object code format:                    nm.                  (line 244)
+* object file header:                    objdump.             (line 141)
+* object file information:               objdump.             (line   6)
+* object file offsets:                   objdump.             (line 146)
+* object file sections:                  objdump.             (line 332)
+* object formats available:              objdump.             (line 180)
+* operations on archive:                 ar cmdline.          (line  22)
+* printing from archive:                 ar cmdline.          (line  46)
+* printing strings:                      strings.             (line   6)
+* quick append to archive:               ar cmdline.          (line  54)
+* radix for section sizes:               size.                (line  66)
+* ranlib:                                ranlib.              (line   6)
+* readelf:                               readelf.             (line   6)
+* relative placement in archive:         ar cmdline.          (line 117)
+* relocation entries, in object file:    objdump.             (line 319)
+* removing symbols:                      strip.               (line   6)
+* repeated names in archive:             ar cmdline.          (line  97)
+* replacement in archive:                ar cmdline.          (line  70)
+* reporting bugs:                        Reporting Bugs.      (line   6)
+* scripts, ar:                           ar scripts.          (line   8)
+* section addresses in objdump:          objdump.             (line  71)
+* section headers:                       objdump.             (line 162)
+* section information:                   objdump.             (line 185)
+* section sizes:                         size.                (line   6)
+* sections, full contents:               objdump.             (line 332)
+* size:                                  size.                (line   6)
+* size display format:                   size.                (line  27)
+* size number format:                    size.                (line  66)
+* sorting symbols:                       nm.                  (line 197)
+* source code context:                   objdump.             (line 155)
+* source disassembly:                    objdump.             (line 337)
+* source file name:                      nm.                  (line 135)
+* source filenames for object files:     objdump.             (line 189)
+* stab:                                  objdump.             (line 370)
+* start-address:                         objdump.             (line 380)
+* stop-address:                          objdump.             (line 384)
+* strings:                               strings.             (line   6)
+* strings, printing:                     strings.             (line   6)
+* strip:                                 strip.               (line   6)
+* Strip absolute paths:                  objdump.             (line 344)
+* symbol index <1>:                      ranlib.              (line   6)
+* symbol index:                          ar.                  (line  28)
+* symbol index, listing:                 nm.                  (line 214)
+* symbol line numbers:                   nm.                  (line 182)
+* symbol table entries, printing:        objdump.             (line 389)
+* symbols:                               nm.                  (line   6)
+* symbols, discarding:                   strip.               (line   6)
+* thin archives:                         ar.                  (line  40)
+* undefined symbols:                     nm.                  (line 249)
+* Unix compatibility, ar:                ar cmdline.          (line   8)
+* unwind information:                    readelf.             (line  99)
+* updating an archive:                   ar cmdline.          (line 195)
+* version:                               Top.                 (line   6)
+* VMA in objdump:                        objdump.             (line  71)
+* wide output, printing:                 objdump.             (line 495)
+* writing archive index:                 ar cmdline.          (line 177)
+
+
+
+Tag Table:
+Node: Top1966
+Node: ar3609
+Node: ar cmdline6414
+Node: ar scripts15457
+Node: nm21145
+Node: objcopy30619
+Node: objdump58860
+Node: ranlib79332
+Node: size80153
+Node: strings83158
+Node: strip85616
+Node: c++filt91567
+Ref: c++filt-Footnote-196412
+Node: addr2line96518
+Node: nlmconv99789
+Node: windmc102395
+Node: windres106042
+Node: dlltool112069
+Node: def file format124753
+Node: readelf126491
+Node: Common Options132497
+Node: Selecting the Target System133537
+Node: Target Selection134469
+Node: Architecture Selection136451
+Node: Reporting Bugs137279
+Node: Bug Criteria138058
+Node: Bug Reporting138611
+Node: GNU Free Documentation License145481
+Node: Binutils Index170660
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/configure.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/configure.info
new file mode 100644
index 00000000..15a3f393
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/configure.info
@@ -0,0 +1,2773 @@
+This is configure.info, produced by makeinfo version 4.13 from
+../../../newlib-2.0.0/etc/configure.texi.
+
+INFO-DIR-SECTION GNU admin
+START-INFO-DIR-ENTRY
+* configure: (configure).	The GNU configure and build system
+END-INFO-DIR-ENTRY
+
+   This file documents the GNU configure and build system.
+
+   Copyright (C) 1998 Cygnus Solutions.
+
+   Permission is granted to make and distribute verbatim copies of this
+manual provided the copyright notice and this permission notice are
+preserved on all copies.
+
+   Permission is granted to copy and distribute modified versions of
+this manual under the conditions for verbatim copying, provided that
+the entire resulting derived work is distributed under the terms of a
+permission notice identical to this one.
+
+   Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions, except that this permission notice may be stated in a
+translation approved by the Foundation.
+
+
+File: configure.info,  Node: Top,  Next: Introduction,  Up: (dir)
+
+GNU configure and build system
+******************************
+
+The GNU configure and build system.
+
+* Menu:
+
+* Introduction::		Introduction.
+* Getting Started::		Getting Started.
+* Files::			Files.
+* Configuration Names::		Configuration Names.
+* Cross Compilation Tools::	Cross Compilation Tools.
+* Canadian Cross::		Canadian Cross.
+* Cygnus Configure::		Cygnus Configure.
+* Multilibs::			Multilibs.
+* FAQ::				Frequently Asked Questions.
+* Index::			Index.
+
+
+File: configure.info,  Node: Introduction,  Next: Getting Started,  Prev: Top,  Up: Top
+
+1 Introduction
+**************
+
+This document describes the GNU configure and build systems.  It
+describes how autoconf, automake, libtool, and make fit together.  It
+also includes a discussion of the older Cygnus configure system.
+
+   This document does not describe in detail how to use each of the
+tools; see the respective manuals for that.  Instead, it describes
+which files the developer must write, which files are machine generated
+and how they are generated, and where certain common problems should be
+addressed.
+
+   This document draws on several sources, including the autoconf
+manual by David MacKenzie (*note autoconf overview: (autoconf)Top.),
+the automake manual by David MacKenzie and Tom Tromey (*note automake
+overview: (automake)Top.), the libtool manual by Gordon Matzigkeit
+(*note libtool overview: (libtool)Top.), and the Cygnus configure
+manual by K. Richard Pixley.
+
+* Menu:
+
+* Goals::			Goals.
+* Tools::			The tools.
+* History::			History.
+* Building::			Building.
+
+
+File: configure.info,  Node: Goals,  Next: Tools,  Up: Introduction
+
+1.1 Goals
+=========
+
+The GNU configure and build system has two main goals.
+
+   The first is to simplify the development of portable programs.  The
+system permits the developer to concentrate on writing the program,
+simplifying many details of portability across Unix and even Windows
+systems, and permitting the developer to describe how to build the
+program using simple rules rather than complex Makefiles.
+
+   The second is to simplify the building of programs distributed as
+source code.  All programs are built using a simple, standardized, two
+step process.  The program builder need not install any special tools in
+order to build the program.
+
+
+File: configure.info,  Node: Tools,  Next: History,  Prev: Goals,  Up: Introduction
+
+1.2 Tools
+=========
+
+The GNU configure and build system is comprised of several different
+tools.  Program developers must build and install all of these tools.
+
+   People who just want to build programs from distributed sources
+normally do not need any special tools beyond a Unix shell, a make
+program, and a C compiler.
+
+autoconf
+     provides a general portability framework, based on testing the
+     features of the host system at build time.
+
+automake
+     a system for describing how to build a program, permitting the
+     developer to write a simplified `Makefile'.
+
+libtool
+     a standardized approach to building shared libraries.
+
+gettext
+     provides a framework for translation of text messages into other
+     languages; not really discussed in this document.
+
+m4
+     autoconf requires the GNU version of m4; the standard Unix m4 does
+     not suffice.
+
+perl
+     automake requires perl.
+
+
+File: configure.info,  Node: History,  Next: Building,  Prev: Tools,  Up: Introduction
+
+1.3 History
+===========
+
+This is a very brief and probably inaccurate history.
+
+   As the number of Unix variants increased during the 1980s, it became
+harder to write programs which could run on all variants.  While it was
+often possible to use `#ifdef' to identify particular systems,
+developers frequently did not have access to every system, and the
+characteristics of some systems changed from version to version.
+
+   By 1992, at least three different approaches had been developed:
+   * The Metaconfig program, by Larry Wall, Harlan Stenn, and Raphael
+     Manfredi.
+
+   * The Cygnus configure script, by K. Richard Pixley, and the gcc
+     configure script, by Richard Stallman.  These use essentially the
+     same approach, and the developers communicated regularly.
+
+   * The autoconf program, by David MacKenzie.
+
+   The Metaconfig program is still used for Perl and a few other
+programs.  It is part of the Dist package.  I do not know if it is
+being developed.
+
+   In 1994, David MacKenzie and others modified autoconf to incorporate
+all the features of Cygnus configure.  Since then, there has been a
+slow but steady conversion of GNU programs from Cygnus configure to
+autoconf. gcc has been converted, eliminating the gcc configure script.
+
+   GNU autoconf was regularly maintained until late 1996.  As of this
+writing in June, 1998, it has no public maintainer.
+
+   Most programs are built using the make program, which requires the
+developer to write Makefiles describing how to build the programs.
+Since most programs are built in pretty much the same way, this led to a
+lot of duplication.
+
+   The X Window system is built using the imake tool, which uses a
+database of rules to eliminate the duplication.  However, building a
+tool which was developed using imake requires that the builder have
+imake installed, violating one of the goals of the GNU system.
+
+   The new BSD make provides a standard library of Makefile fragments,
+which permits developers to write very simple Makefiles.  However, this
+requires that the builder install the new BSD make program.
+
+   In 1994, David MacKenzie wrote the first version of automake, which
+permitted writing a simple build description which was converted into a
+Makefile which could be used by the standard make program.  In 1995, Tom
+Tromey completely rewrote automake in Perl, and he continues to enhance
+it.
+
+   Various free packages built libraries, and by around 1995 several
+included support to build shared libraries on various platforms.
+However, there was no consistent approach.  In early 1996, Gordon
+Matzigkeit began working on libtool, which provided a standardized
+approach to building shared libraries.  This was integrated into
+automake from the start.
+
+   The development of automake and libtool was driven by the GNITS
+project, a group of GNU maintainers who designed standardized tools to
+help meet the GNU coding standards.
+
+
+File: configure.info,  Node: Building,  Prev: History,  Up: Introduction
+
+1.4 Building
+============
+
+Most readers of this document should already know how to build a tool by
+running `configure' and `make'.  This section may serve as a quick
+introduction or reminder.
+
+   Building a tool is normally as simple as running `configure'
+followed by `make'.  You should normally run `configure' from an empty
+directory, using some path to refer to the `configure' script in the
+source directory.  The directory in which you run `configure' is called
+the "object directory".
+
+   In order to use a object directory which is different from the source
+directory, you must be using the GNU version of `make', which has the
+required `VPATH' support.  Despite this restriction, using a different
+object directory is highly recommended:
+   * It keeps the files generated during the build from cluttering up
+     your sources.
+
+   * It permits you to remove the built files by simply removing the
+     entire build directory.
+
+   * It permits you to build from the same sources with several sets of
+     configure options simultaneously.
+
+   If you don't have GNU `make', you will have to run `configure' in
+the source directory.  All GNU packages should support this; in
+particular, GNU packages should not assume the presence of GNU `make'.
+
+   After running `configure', you can build the tools by running `make'.
+
+   To install the tools, run `make install'.  Installing the tools will
+copy the programs and any required support files to the "installation
+directory".  The location of the installation directory is controlled
+by `configure' options, as described below.
+
+   In the Cygnus tree at present, the info files are built and
+installed as a separate step.  To build them, run `make info'.  To
+install them, run `make install-info'. The equivalent html files are
+also built and installed in a separate step. To build the html files,
+run `make html'. To install the html files run `make install-html'.
+
+   All `configure' scripts support a wide variety of options.  The most
+interesting ones are `--with' and `--enable' options which are
+generally specific to particular tools.  You can usually use the
+`--help' option to get a list of interesting options for a particular
+configure script.
+
+   The only generic options you are likely to use are the `--prefix'
+and `--exec-prefix' options.  These options are used to specify the
+installation directory.
+
+   The directory named by the `--prefix' option will hold machine
+independent files such as info files.
+
+   The directory named by the `--exec-prefix' option, which is normally
+a subdirectory of the `--prefix' directory, will hold machine dependent
+files such as executables.
+
+   The default for `--prefix' is `/usr/local'.  The default for
+`--exec-prefix' is the value used for `--prefix'.
+
+   The convention used in Cygnus releases is to use a `--prefix' option
+of `/usr/cygnus/RELEASE', where RELEASE is the name of the release, and
+to use a `--exec-prefix' option of `/usr/cygnus/RELEASE/H-HOST', where
+HOST is the configuration name of the host system (*note Configuration
+Names::).
+
+   Do not use either the source or the object directory as the
+installation directory.  That will just lead to confusion.
+
+
+File: configure.info,  Node: Getting Started,  Next: Files,  Prev: Introduction,  Up: Top
+
+2 Getting Started
+*****************
+
+To start using the GNU configure and build system with your software
+package, you must write three files, and you must run some tools to
+manually generate additional files.
+
+* Menu:
+
+* Write configure.in::		Write configure.in.
+* Write Makefile.am::		Write Makefile.am.
+* Write acconfig.h::		Write acconfig.h.
+* Generate files::		Generate files.
+* Getting Started Example::	Example.
+
+
+File: configure.info,  Node: Write configure.in,  Next: Write Makefile.am,  Up: Getting Started
+
+2.1 Write configure.in
+======================
+
+You must first write the file `configure.in'.  This is an autoconf
+input file, and the autoconf manual describes in detail what this file
+should look like.
+
+   You will write tests in your `configure.in' file to check for
+conditions that may change from one system to another, such as the
+presence of particular header files or functions.
+
+   For example, not all systems support the `gettimeofday' function.
+If you want to use the `gettimeofday' function when it is available,
+and to use some other function when it is not, you would check for this
+by putting `AC_CHECK_FUNCS(gettimeofday)' in `configure.in'.
+
+   When the configure script is run at build time, this will arrange to
+define the preprocessor macro `HAVE_GETTIMEOFDAY' to the value 1 if the
+`gettimeofday' function is available, and to not define the macro at
+all if the function is not available.  Your code can then use `#ifdef'
+to test whether it is safe to call `gettimeofday'.
+
+   If you have an existing body of code, the `autoscan' program may
+help identify potential portability problems, and hence configure tests
+that you will want to use.  *Note Invoking autoscan: (autoconf)Invoking
+autoscan.
+
+   Another handy tool for an existing body of code is `ifnames'.  This
+will show you all the preprocessor conditionals that the code already
+uses.  *Note Invoking ifnames: (autoconf)Invoking ifnames.
+
+   Besides the portability tests which are specific to your particular
+package, every `configure.in' file should contain the following macros.
+
+`AC_INIT'
+     This macro takes a single argument, which is the name of a file in
+     your package.  For example, `AC_INIT(foo.c)'.
+
+`AC_PREREQ(VERSION)'
+     This macro is optional.  It may be used to indicate the version of
+     `autoconf' that you are using.  This will prevent users from
+     running an earlier version of `autoconf' and perhaps getting an
+     invalid `configure' script.  For example, `AC_PREREQ(2.12)'.
+
+`AM_INIT_AUTOMAKE'
+     This macro takes two arguments: the name of the package, and a
+     version number.  For example, `AM_INIT_AUTOMAKE(foo, 1.0)'.  (This
+     macro is not needed if you are not using automake).
+
+`AM_CONFIG_HEADER'
+     This macro names the header file which will hold the preprocessor
+     macro definitions at run time.  Normally this should be
+     `config.h'.  Your sources would then use `#include "config.h"' to
+     include it.
+
+     This macro may optionally name the input file for that header
+     file; by default, this is `config.h.in', but that file name works
+     poorly on DOS filesystems.  Therefore, it is often better to name
+     it explicitly as `config.in'.
+
+     This is what you should normally put in `configure.in':
+          AM_CONFIG_HEADER(config.h:config.in)
+
+     (If you are not using automake, use `AC_CONFIG_HEADER' rather than
+     `AM_CONFIG_HEADER').
+
+`AM_MAINTAINER_MODE'
+     This macro always appears in Cygnus configure scripts.  Other
+     programs may or may not use it.
+
+     If this macro is used, the `--enable-maintainer-mode' option is
+     required to enable automatic rebuilding of generated files used by
+     the configure system.  This of course requires that developers be
+     aware of, and use, that option.
+
+     If this macro is not used, then the generated files will always be
+     rebuilt automatically.  This will cause problems if the wrong
+     versions of autoconf, automake, or others are in the builder's
+     `PATH'.
+
+     (If you are not using automake, you do not need to use this macro).
+
+`AC_EXEEXT'
+     Either this macro or `AM_EXEEXT' always appears in Cygnus configure
+     files.  Other programs may or may not use one of them.
+
+     This macro looks for the executable suffix used on the host
+     system.  On Unix systems, this is the empty string.  On Windows
+     systems, this is `.exe'.  This macro directs automake to use the
+     executable suffix as appropriate when creating programs.  This
+     macro does not take any arguments.
+
+     The `AC_EXEEXT' form is new, and is part of a Cygnus patch to
+     autoconf to support compiling with Visual C++.  Older programs use
+     `AM_EXEEXT' instead.
+
+     (Programs which do not use automake use neither `AC_EXEEXT' nor
+     `AM_EXEEXT').
+
+`AC_PROG_CC'
+     If you are writing C code, you will normally want to use this
+     macro.  It locates the C compiler to use.  It does not take any
+     arguments.
+
+     However, if this `configure.in' file is for a library which is to
+     be compiled by a cross compiler which may not fully work, then you
+     will not want to use `AC_PROG_CC'.  Instead, you will want to use a
+     variant which does not call the macro `AC_PROG_CC_WORKS'.  Examples
+     can be found in various `configure.in' files for libraries that are
+     compiled with cross compilers, such as libiberty or libgloss.
+     This is essentially a bug in autoconf, and there will probably be
+     a better workaround at some point.
+
+`AC_PROG_CXX'
+     If you are writing C++ code, you will want to use this macro.  It
+     locates the C++ compiler to use.  It does not take any arguments.
+     The same cross compiler comments apply as for `AC_PROG_CC'.
+
+`AM_PROG_LIBTOOL'
+     If you want to build libraries, and you want to permit them to be
+     shared, or you want to link against libraries which were built
+     using libtool, then you will need this macro.  This macro is
+     required in order to use libtool.
+
+     By default, this will cause all libraries to be built as shared
+     libraries.  To prevent this-to change the default-use
+     `AM_DISABLE_SHARED' before `AM_PROG_LIBTOOL'.  The configure
+     options `--enable-shared' and `--disable-shared' may be used to
+     override the default at build time.
+
+`AC_DEFINE(_GNU_SOURCE)'
+     GNU packages should normally include this line before any other
+     feature tests.  This defines the macro `_GNU_SOURCE' when
+     compiling, which directs the libc header files to provide the
+     standard GNU system interfaces including all GNU extensions.  If
+     this macro is not defined, certain GNU extensions may not be
+     available.
+
+`AC_OUTPUT'
+     This macro takes a list of file names which the configure process
+     should produce.  This is normally a list of one or more `Makefile'
+     files in different directories.  If your package lives entirely in
+     a single directory, you would use simply `AC_OUTPUT(Makefile)'.
+     If you also have, for example, a `lib' subdirectory, you would use
+     `AC_OUTPUT(Makefile lib/Makefile)'.
+
+   If you want to use locally defined macros in your `configure.in'
+file, then you will need to write a `acinclude.m4' file which defines
+them (if not using automake, this file is called `aclocal.m4').
+Alternatively, you can put separate macros in an `m4' subdirectory, and
+put `ACLOCAL_AMFLAGS = -I m4' in your `Makefile.am' file so that the
+`aclocal' program will be able to find them.
+
+   The different macro prefixes indicate which tool defines the macro.
+Macros which start with `AC_' are part of autoconf.  Macros which start
+with `AM_' are provided by automake or libtool.
+
+
+File: configure.info,  Node: Write Makefile.am,  Next: Write acconfig.h,  Prev: Write configure.in,  Up: Getting Started
+
+2.2 Write Makefile.am
+=====================
+
+You must write the file `Makefile.am'.  This is an automake input file,
+and the automake manual describes in detail what this file should look
+like.
+
+   The automake commands in `Makefile.am' mostly look like variable
+assignments in a `Makefile'.  automake recognizes special variable
+names, and automatically add make rules to the output as needed.
+
+   There will be one `Makefile.am' file for each directory in your
+package.  For each directory with subdirectories, the `Makefile.am'
+file should contain the line
+     SUBDIRS = DIR DIR ...
+   where each DIR is the name of a subdirectory.
+
+   For each `Makefile.am', there should be a corresponding `Makefile'
+in the `AC_OUTPUT' macro in `configure.in'.
+
+   Every `Makefile.am' written at Cygnus should contain the line
+     AUTOMAKE_OPTIONS = cygnus
+   This puts automake into Cygnus mode.  See the automake manual for
+details.
+
+   You may to include the version number of `automake' that you are
+using on the `AUTOMAKE_OPTIONS' line.  For example,
+     AUTOMAKE_OPTIONS = cygnus 1.3
+   This will prevent users from running an earlier version of
+`automake' and perhaps getting an invalid `Makefile.in'.
+
+   If your package builds a program, then in the directory where that
+program is built you will normally want a line like
+     bin_PROGRAMS = PROGRAM
+   where PROGRAM is the name of the program.  You will then want a line
+like
+     PROGRAM_SOURCES = FILE FILE ...
+   where each FILE is the name of a source file to link into the
+program (e.g., `foo.c').
+
+   If your package builds a library, and you do not want the library to
+ever be built as a shared library, then in the directory where that
+library is built you will normally want a line like
+     lib_LIBRARIES = libNAME.a
+   where `libNAME.a' is the name of the library.  You will then want a
+line like
+     libNAME_a_SOURCES = FILE FILE ...
+   where each FILE is the name of a source file to add to the library.
+
+   If your package builds a library, and you want to permit building the
+library as a shared library, then in the directory where that library is
+built you will normally want a line like
+     lib_LTLIBRARIES = libNAME.la
+   The use of `LTLIBRARIES', and the `.la' extension, indicate a
+library to be built using libtool.  As usual, you will then want a line
+like
+     libNAME_la_SOURCES = FILE FILE ...
+
+   The strings `bin' and `lib' that appear above in `bin_PROGRAMS' and
+`lib_LIBRARIES' are not arbitrary.  They refer to particular
+directories, which may be set by the `--bindir' and `--libdir' options
+to `configure'.  If those options are not used, the default values are
+based on the `--prefix' or `--exec-prefix' options to `configure'.  It
+is possible to use other names if the program or library should be
+installed in some other directory.
+
+   The `Makefile.am' file may also contain almost anything that may
+appear in a normal `Makefile'.  automake also supports many other
+special variables, as well as conditionals.
+
+   See the automake manual for more information.
+
+
+File: configure.info,  Node: Write acconfig.h,  Next: Generate files,  Prev: Write Makefile.am,  Up: Getting Started
+
+2.3 Write acconfig.h
+====================
+
+If you are generating a portability header file, (i.e., you are using
+`AM_CONFIG_HEADER' in `configure.in'), then you will have to write a
+`acconfig.h' file.  It will have to contain the following lines.
+
+     /* Name of package.  */
+     #undef PACKAGE
+
+     /* Version of package.  */
+     #undef VERSION
+
+   This requirement is really a bug in the system, and the requirement
+may be eliminated at some later date.
+
+   The `acconfig.h' file will also similar comment and `#undef' lines
+for any unusual macros in the `configure.in' file, including any macro
+which appears in a `AC_DEFINE' macro.
+
+   In particular, if you are writing a GNU package and therefore include
+`AC_DEFINE(_GNU_SOURCE)' in `configure.in' as suggested above, you will
+need lines like this in `acconfig.h':
+     /* Enable GNU extensions.  */
+     #undef _GNU_SOURCE
+
+   Normally the `autoheader' program will inform you of any such
+requirements by printing an error message when it is run.  However, if
+you do anything particular odd in your `configure.in' file, you will
+have to make sure that the right entries appear in `acconfig.h', since
+otherwise the results of the tests may not be available in the
+`config.h' file which your code will use.
+
+   (Thee `PACKAGE' and `VERSION' lines are not required if you are not
+using automake, and in that case you may not need a `acconfig.h' file
+at all).
+
+
+File: configure.info,  Node: Generate files,  Next: Getting Started Example,  Prev: Write acconfig.h,  Up: Getting Started
+
+2.4 Generate files
+==================
+
+Once you have written `configure.in', `Makefile.am', `acconfig.h', and
+possibly `acinclude.m4', you must use autoconf and automake programs to
+produce the first versions of the generated files.  This is done by
+executing the following sequence of commands.
+
+     aclocal
+     autoconf
+     autoheader
+     automake
+
+   The `aclocal' and `automake' commands are part of the automake
+package, and the `autoconf' and `autoheader' commands are part of the
+autoconf package.
+
+   If you are using a `m4' subdirectory for your macros, you will need
+to use the `-I m4' option when you run `aclocal'.
+
+   If you are not using the Cygnus tree, use the `-a' option when
+running `automake' command in order to copy the required support files
+into your source directory.
+
+   If you are using libtool, you must build and install the libtool
+package with the same `--prefix' and `--exec-prefix' options as you
+used with the autoconf and automake packages.  You must do this before
+running any of the above commands.  If you are not using the Cygnus
+tree, you will need to run the `libtoolize' program to copy the libtool
+support files into your directory.
+
+   Once you have managed to run these commands without getting any
+errors, you should create a new empty directory, and run the `configure'
+script which will have been created by `autoconf' with the
+`--enable-maintainer-mode' option.  This will give you a set of
+Makefiles which will include rules to automatically rebuild all the
+generated files.
+
+   After doing that, whenever you have changed some of the input files
+and want to regenerated the other files, go to your object directory
+and run `make'.  Doing this is more reliable than trying to rebuild the
+files manually, because there are complex order dependencies and it is
+easy to forget something.
+
+
+File: configure.info,  Node: Getting Started Example,  Prev: Generate files,  Up: Getting Started
+
+2.5 Example
+===========
+
+Let's consider a trivial example.
+
+   Suppose we want to write a simple version of `touch'.  Our program,
+which we will call `poke', will take a single file name argument, and
+use the `utime' system call to set the modification and access times of
+the file to the current time.  We want this program to be highly
+portable.
+
+   We'll first see what this looks like without using autoconf and
+automake, and then see what it looks like with them.
+
+* Menu:
+
+* Getting Started Example 1::		First Try.
+* Getting Started Example 2::		Second Try.
+* Getting Started Example 3::		Third Try.
+* Generate Files in Example::		Generate Files.
+
+
+File: configure.info,  Node: Getting Started Example 1,  Next: Getting Started Example 2,  Up: Getting Started Example
+
+2.5.1 First Try
+---------------
+
+Here is our first try at `poke.c'.  Note that we've written it without
+ANSI/ISO C prototypes, since we want it to be highly portable.
+
+     #include <stdio.h>
+     #include <stdlib.h>
+     #include <sys/types.h>
+     #include <utime.h>
+
+     int
+     main (argc, argv)
+          int argc;
+          char **argv;
+     {
+       if (argc != 2)
+         {
+           fprintf (stderr, "Usage: poke file\n");
+           exit (1);
+         }
+
+       if (utime (argv[1], NULL) < 0)
+         {
+           perror ("utime");
+           exit (1);
+         }
+
+       exit (0);
+     }
+
+   We also write a simple `Makefile'.
+
+     CC = gcc
+     CFLAGS = -g -O2
+
+     all: poke
+
+     poke: poke.o
+     	$(CC) -o poke $(CFLAGS) $(LDFLAGS) poke.o
+
+   So far, so good.
+
+   Unfortunately, there are a few problems.
+
+   On older Unix systems derived from BSD 4.3, the `utime' system call
+does not accept a second argument of `NULL'.  On those systems, we need
+to pass a pointer to `struct utimbuf' structure.  Unfortunately, even
+older systems don't define that structure; on those systems, we need to
+pass an array of two `long' values.
+
+   The header file `stdlib.h' was invented by ANSI C, and older systems
+don't have a copy.  We included it above to get a declaration of `exit'.
+
+   We can find some of these portability problems by running
+`autoscan', which will create a `configure.scan' file which we can use
+as a prototype for our `configure.in' file.  I won't show the output,
+but it will notice the potential problems with `utime' and `stdlib.h'.
+
+   In our `Makefile', we don't provide any way to install the program.
+This doesn't matter much for such a simple example, but a real program
+will need an `install' target.  For that matter, we will also want a
+`clean' target.
+
+
+File: configure.info,  Node: Getting Started Example 2,  Next: Getting Started Example 3,  Prev: Getting Started Example 1,  Up: Getting Started Example
+
+2.5.2 Second Try
+----------------
+
+Here is our second try at this program.
+
+   We modify `poke.c' to use preprocessor macros to control what
+features are available.  (I've cheated a bit by using the same macro
+names which autoconf will use).
+
+     #include <stdio.h>
+
+     #ifdef STDC_HEADERS
+     #include <stdlib.h>
+     #endif
+
+     #include <sys/types.h>
+
+     #ifdef HAVE_UTIME_H
+     #include <utime.h>
+     #endif
+
+     #ifndef HAVE_UTIME_NULL
+
+     #include <time.h>
+
+     #ifndef HAVE_STRUCT_UTIMBUF
+
+     struct utimbuf
+     {
+       long actime;
+       long modtime;
+     };
+
+     #endif
+
+     static int
+     utime_now (file)
+          char *file;
+     {
+       struct utimbuf now;
+
+       now.actime = now.modtime = time (NULL);
+       return utime (file, &now);
+     }
+
+     #define utime(f, p) utime_now (f)
+
+     #endif /* HAVE_UTIME_NULL  */
+
+     int
+     main (argc, argv)
+          int argc;
+          char **argv;
+     {
+       if (argc != 2)
+         {
+           fprintf (stderr, "Usage: poke file\n");
+           exit (1);
+         }
+
+       if (utime (argv[1], NULL) < 0)
+         {
+           perror ("utime");
+           exit (1);
+         }
+
+       exit (0);
+     }
+
+   Here is the associated `Makefile'.  We've added support for the
+preprocessor flags we use.  We've also added `install' and `clean'
+targets.
+
+     # Set this to your installation directory.
+     bindir = /usr/local/bin
+
+     # Uncomment this if you have the standard ANSI/ISO C header files.
+     # STDC_HDRS = -DSTDC_HEADERS
+
+     # Uncomment this if you have utime.h.
+     # UTIME_H = -DHAVE_UTIME_H
+
+     # Uncomment this if utime (FILE, NULL) works on your system.
+     # UTIME_NULL = -DHAVE_UTIME_NULL
+
+     # Uncomment this if struct utimbuf is defined in utime.h.
+     # UTIMBUF = -DHAVE_STRUCT_UTIMBUF
+
+     CC = gcc
+     CFLAGS = -g -O2
+
+     ALL_CFLAGS = $(STDC_HDRS) $(UTIME_H) $(UTIME_NULL) $(UTIMBUF) $(CFLAGS)
+
+     all: poke
+
+     poke: poke.o
+     	$(CC) -o poke $(ALL_CFLAGS) $(LDFLAGS) poke.o
+
+     .c.o:
+     	$(CC) -c $(ALL_CFLAGS) poke.c
+
+     install: poke
+     	cp poke $(bindir)/poke
+
+     clean:
+     	rm poke poke.o
+
+   Some problems with this approach should be clear.
+
+   Users who want to compile poke will have to know how `utime' works
+on their systems, so that they can uncomment the `Makefile' correctly.
+
+   The installation is done using `cp', but many systems have an
+`install' program which may be used, and which supports optional
+features such as stripping debugging information out of the installed
+binary.
+
+   The use of `Makefile' variables like `CC', `CFLAGS' and `LDFLAGS'
+follows the requirements of the GNU standards.  This is convenient for
+all packages, since it reduces surprises for users.  However, it is
+easy to get the details wrong, and wind up with a slightly nonstandard
+distribution.
+
+
+File: configure.info,  Node: Getting Started Example 3,  Next: Generate Files in Example,  Prev: Getting Started Example 2,  Up: Getting Started Example
+
+2.5.3 Third Try
+---------------
+
+For our third try at this program, we will write a `configure.in'
+script to discover the configuration features on the host system, rather
+than requiring the user to edit the `Makefile'.  We will also write a
+`Makefile.am' rather than a `Makefile'.
+
+   The only change to `poke.c' is to add a line at the start of the
+file:
+     #include "config.h"
+
+   The new `configure.in' file is as follows.
+
+     AC_INIT(poke.c)
+     AM_INIT_AUTOMAKE(poke, 1.0)
+     AM_CONFIG_HEADER(config.h:config.in)
+     AC_PROG_CC
+     AC_HEADER_STDC
+     AC_CHECK_HEADERS(utime.h)
+     AC_EGREP_HEADER(utimbuf, utime.h, AC_DEFINE(HAVE_STRUCT_UTIMBUF))
+     AC_FUNC_UTIME_NULL
+     AC_OUTPUT(Makefile)
+
+   The first four macros in this file, and the last one, were described
+above; see *note Write configure.in::.  If we omit these macros, then
+when we run `automake' we will get a reminder that we need them.
+
+   The other macros are standard autoconf macros.
+
+`AC_HEADER_STDC'
+     Check for standard C headers.
+
+`AC_CHECK_HEADERS'
+     Check whether a particular header file exists.
+
+`AC_EGREP_HEADER'
+     Check for a particular string in a particular header file, in this
+     case checking for `utimbuf' in `utime.h'.
+
+`AC_FUNC_UTIME_NULL'
+     Check whether `utime' accepts a NULL second argument to set the
+     file change time to the current time.
+
+   See the autoconf manual for a more complete description.
+
+   The new `Makefile.am' file is as follows.  Note how simple this is
+compared to our earlier `Makefile'.
+
+     bin_PROGRAMS = poke
+
+     poke_SOURCES = poke.c
+
+   This means that we should build a single program name `poke'.  It
+should be installed in the binary directory, which we called `bindir'
+earlier.  The program `poke' is built from the source file `poke.c'.
+
+   We must also write a `acconfig.h' file.  Besides `PACKAGE' and
+`VERSION', which must be mentioned for all packages which use automake,
+we must include `HAVE_STRUCT_UTIMBUF', since we mentioned it in an
+`AC_DEFINE'.
+
+     /* Name of package.  */
+     #undef PACKAGE
+
+     /* Version of package.  */
+     #undef VERSION
+
+     /* Whether utime.h defines struct utimbuf.  */
+     #undef HAVE_STRUCT_UTIMBUF
+
+
+File: configure.info,  Node: Generate Files in Example,  Prev: Getting Started Example 3,  Up: Getting Started Example
+
+2.5.4 Generate Files
+--------------------
+
+We must now generate the other files, using the following commands.
+
+     aclocal
+     autoconf
+     autoheader
+     automake
+
+   When we run `autoheader', it will remind us of any macros we forgot
+to add to `acconfig.h'.
+
+   When we run `automake', it will want to add some files to our
+distribution.  It will add them automatically if we use the
+`--add-missing' option.
+
+   By default, `automake' will run in GNU mode, which means that it
+will want us to create certain additional files; as of this writing, it
+will want `NEWS', `README', `AUTHORS', and `ChangeLog', all of which
+are files which should appear in a standard GNU distribution.  We can
+either add those files, or run `automake' with the `--foreign' option.
+
+   Running these tools will generate the following files, all of which
+are described in the next chapter.
+
+   * `aclocal.m4'
+
+   * `configure'
+
+   * `config.in'
+
+   * `Makefile.in'
+
+   * `stamp-h.in'
+
+
+File: configure.info,  Node: Files,  Next: Configuration Names,  Prev: Getting Started,  Up: Top
+
+3 Files
+*******
+
+As was seen in the previous chapter, the GNU configure and build system
+uses a number of different files.  The developer must write a few files.
+The others are generated by various tools.
+
+   The system is rather flexible, and can be used in many different
+ways.  In describing the files that it uses, I will describe the common
+case, and mention some other cases that may arise.
+
+* Menu:
+
+* Developer Files::		Developer Files.
+* Build Files::			Build Files.
+* Support Files::		Support Files.
+
+
+File: configure.info,  Node: Developer Files,  Next: Build Files,  Up: Files
+
+3.1 Developer Files
+===================
+
+This section describes the files written or generated by the developer
+of a package.
+
+* Menu:
+
+* Developer Files Picture::	Developer Files Picture.
+* Written Developer Files::	Written Developer Files.
+* Generated Developer Files::	Generated Developer Files.
+
+
+File: configure.info,  Node: Developer Files Picture,  Next: Written Developer Files,  Up: Developer Files
+
+3.1.1 Developer Files Picture
+-----------------------------
+
+Here is a picture of the files which are written by the developer, the
+generated files which would be included with a complete source
+distribution, and the tools which create those files.  The file names
+are plain text and the tool names are enclosed by `*' characters (e.g.,
+`autoheader' is the name of a tool, not the name of a file).
+
+   acconfig.h       configure.in                 Makefile.am
+       |                |                           |
+       |  --------------+----------------------     |
+       |  |             |                     |     |
+       v  v             |    acinclude.m4     |     |
+   *autoheader*         |         |           v     v
+       |                |         v      --->*automake*
+       v                |--->*aclocal*   |       |
+   config.in            |         |      |       v
+                        |         v      |   Makefile.in
+                        |    aclocal.m4---
+                        |     |
+                        v     v
+                       *autoconf*
+                           |
+                           v
+                       configure
+
+
+File: configure.info,  Node: Written Developer Files,  Next: Generated Developer Files,  Prev: Developer Files Picture,  Up: Developer Files
+
+3.1.2 Written Developer Files
+-----------------------------
+
+The following files would be written by the developer.
+
+`configure.in'
+     This is the configuration script.  This script contains
+     invocations of autoconf macros.  It may also contain ordinary
+     shell script code.  This file will contain feature tests for
+     portability issues.  The last thing in the file will normally be
+     an `AC_OUTPUT' macro listing which files to create when the
+     builder runs the configure script.  This file is always required
+     when using the GNU configure system.  *Note Write configure.in::.
+
+`Makefile.am'
+     This is the automake input file.  It describes how the code should
+     be built.  It consists of definitions of automake variables.  It
+     may also contain ordinary Makefile targets.  This file is only
+     needed when using automake (newer tools normally use automake, but
+     there are still older tools which have not been converted, in
+     which the developer writes `Makefile.in' directly).  *Note Write
+     Makefile.am::.
+
+`acconfig.h'
+     When the configure script creates a portability header file, by
+     using `AM_CONFIG_HEADER' (or, if not using automake,
+     `AC_CONFIG_HEADER'), this file is used to describe macros which are
+     not recognized by the `autoheader' command.  This is normally a
+     fairly uninteresting file, consisting of a collection of `#undef'
+     lines with comments.  Normally any call to `AC_DEFINE' in
+     `configure.in' will require a line in this file. *Note Write
+     acconfig.h::.
+
+`acinclude.m4'
+     This file is not always required.  It defines local autoconf
+     macros.  These macros may then be used in `configure.in'.  If you
+     don't need any local autoconf macros, then you don't need this
+     file at all.  In fact, in general, you never need local autoconf
+     macros, since you can put everything in `configure.in', but
+     sometimes a local macro is convenient.
+
+     Newer tools may omit `acinclude.m4', and instead use a
+     subdirectory, typically named `m4', and define `ACLOCAL_AMFLAGS =
+     -I m4' in `Makefile.am' to force `aclocal' to look there for macro
+     definitions.  The macro definitions are then placed in separate
+     files in that directory.
+
+     The `acinclude.m4' file is only used when using automake; in older
+     tools, the developer writes `aclocal.m4' directly, if it is needed.
+
+
+File: configure.info,  Node: Generated Developer Files,  Prev: Written Developer Files,  Up: Developer Files
+
+3.1.3 Generated Developer Files
+-------------------------------
+
+The following files would be generated by the developer.
+
+   When using automake, these files are normally not generated manually
+after the first time.  Instead, the generated `Makefile' contains rules
+to automatically rebuild the files as required.  When
+`AM_MAINTAINER_MODE' is used in `configure.in' (the normal case in
+Cygnus code), the automatic rebuilding rules will only be defined if
+you configure using the `--enable-maintainer-mode' option.
+
+   When using automatic rebuilding, it is important to ensure that all
+the various tools have been built and installed on your `PATH'.  Using
+automatic rebuilding is highly recommended, so much so that I'm not
+going to explain what you have to do if you don't use it.
+
+`configure'
+     This is the configure script which will be run when building the
+     package.  This is generated by `autoconf' from `configure.in' and
+     `aclocal.m4'.  This is a shell script.
+
+`Makefile.in'
+     This is the file which the configure script will turn into the
+     `Makefile' at build time.  This file is generated by `automake'
+     from `Makefile.am'.  If you aren't using automake, you must write
+     this file yourself.  This file is pretty much a normal `Makefile',
+     with some configure substitutions for certain variables.
+
+`aclocal.m4'
+     This file is created by the `aclocal' program, based on the
+     contents of `configure.in' and `acinclude.m4' (or, as noted in the
+     description of `acinclude.m4' above, on the contents of an `m4'
+     subdirectory).  This file contains definitions of autoconf macros
+     which `autoconf' will use when generating the file `configure'.
+     These autoconf macros may be defined by you in `acinclude.m4' or
+     they may be defined by other packages such as automake, libtool or
+     gettext.  If you aren't using automake, you will normally write
+     this file yourself; in that case, if `configure.in' uses only
+     standard autoconf macros, this file will not be needed at all.
+
+`config.in'
+     This file is created by `autoheader' based on `acconfig.h' and
+     `configure.in'.  At build time, the configure script will define
+     some of the macros in it to create `config.h', which may then be
+     included by your program.  This permits your C code to use
+     preprocessor conditionals to change its behaviour based on the
+     characteristics of the host system.  This file may also be called
+     `config.h.in'.
+
+`stamp.h-in'
+     This rather uninteresting file, which I omitted from the picture,
+     is generated by `automake'.  It always contains the string
+     `timestamp'.  It is used as a timestamp file indicating whether
+     `config.in' is up to date.  Using a timestamp file means that
+     `config.in' can be marked as up to date without actually changing
+     its modification time.  This is useful since `config.in' depends
+     upon `configure.in', but it is easy to change `configure.in' in a
+     way which does not affect `config.in'.
+
+
+File: configure.info,  Node: Build Files,  Next: Support Files,  Prev: Developer Files,  Up: Files
+
+3.2 Build Files
+===============
+
+This section describes the files which are created at configure and
+build time.  These are the files which somebody who builds the package
+will see.
+
+   Of course, the developer will also build the package.  The
+distinction between developer files and build files is not that the
+developer does not see the build files, but that somebody who only
+builds the package does not have to worry about the developer files.
+
+* Menu:
+
+* Build Files Picture::		Build Files Picture.
+* Build Files Description::	Build Files Description.
+
+
+File: configure.info,  Node: Build Files Picture,  Next: Build Files Description,  Up: Build Files
+
+3.2.1 Build Files Picture
+-------------------------
+
+Here is a picture of the files which will be created at build time.
+`config.status' is both a created file and a shell script which is run
+to create other files, and the picture attempts to show that.
+
+   config.in        *configure*      Makefile.in
+      |                  |               |
+      |                  v               |
+      |             config.status        |
+      |                  |               |
+   *config.status*<======+==========>*config.status*
+      |                                  |
+      v                                  v
+   config.h                          Makefile
+
+
+File: configure.info,  Node: Build Files Description,  Prev: Build Files Picture,  Up: Build Files
+
+3.2.2 Build Files Description
+-----------------------------
+
+This is a description of the files which are created at build time.
+
+`config.status'
+     The first step in building a package is to run the `configure'
+     script.  The `configure' script will create the file
+     `config.status', which is itself a shell script.  When you first
+     run `configure', it will automatically run `config.status'.  An
+     `Makefile' derived from an automake generated `Makefile.in' will
+     contain rules to automatically run `config.status' again when
+     necessary to recreate certain files if their inputs change.
+
+`Makefile'
+     This is the file which make will read to build the program.  The
+     `config.status' script will transform `Makefile.in' into
+     `Makefile'.
+
+`config.h'
+     This file defines C preprocessor macros which C code can use to
+     adjust its behaviour on different systems.  The `config.status'
+     script will transform `config.in' into `config.h'.
+
+`config.cache'
+     This file did not fit neatly into the picture, and I omitted it.
+     It is used by the `configure' script to cache results between
+     runs.  This can be an important speedup.  If you modify
+     `configure.in' in such a way that the results of old tests should
+     change (perhaps you have added a new library to `LDFLAGS'), then
+     you will have to remove `config.cache' to force the tests to be
+     rerun.
+
+     The autoconf manual explains how to set up a site specific cache
+     file.  This can speed up running `configure' scripts on your
+     system.
+
+`stamp.h'
+     This file, which I omitted from the picture, is similar to
+     `stamp-h.in'.  It is used as a timestamp file indicating whether
+     `config.h' is up to date.  This is useful since `config.h' depends
+     upon `config.status', but it is easy for `config.status' to change
+     in a way which does not affect `config.h'.
+
+
+File: configure.info,  Node: Support Files,  Prev: Build Files,  Up: Files
+
+3.3 Support Files
+=================
+
+The GNU configure and build system requires several support files to be
+included with your distribution.  You do not normally need to concern
+yourself with these.  If you are using the Cygnus tree, most are already
+present.  Otherwise, they will be installed with your source by
+`automake' (with the `--add-missing' option) and `libtoolize'.
+
+   You don't have to put the support files in the top level directory.
+You can put them in a subdirectory, and use the `AC_CONFIG_AUX_DIR'
+macro in `configure.in' to tell `automake' and the `configure' script
+where they are.
+
+   In this section, I describe the support files, so that you can know
+what they are and why they are there.
+
+`ABOUT-NLS'
+     Added by automake if you are using gettext.  This is a
+     documentation file about the gettext project.
+
+`ansi2knr.c'
+     Used by an automake generated `Makefile' if you put `ansi2knr' in
+     `AUTOMAKE_OPTIONS' in `Makefile.am'.  This permits compiling ANSI
+     C code with a K&R C compiler.
+
+`ansi2knr.1'
+     The man page which goes with `ansi2knr.c'.
+
+`config.guess'
+     A shell script which determines the configuration name for the
+     system on which it is run.
+
+`config.sub'
+     A shell script which canonicalizes a configuration name entered by
+     a user.
+
+`elisp-comp'
+     Used to compile Emacs LISP files.
+
+`install-sh'
+     A shell script which installs a program.  This is used if the
+     configure script can not find an install binary.
+
+`ltconfig'
+     Used by libtool.  This is a shell script which configures libtool
+     for the particular system on which it is used.
+
+`ltmain.sh'
+     Used by libtool.  This is the actual libtool script which is used,
+     after it is configured by `ltconfig' to build a library.
+
+`mdate-sh'
+     A shell script used by an automake generated `Makefile' to pretty
+     print the modification time of a file.  This is used to maintain
+     version numbers for texinfo files.
+
+`missing'
+     A shell script used if some tool is missing entirely.  This is
+     used by an automake generated `Makefile' to avoid certain sorts of
+     timestamp problems.
+
+`mkinstalldirs'
+     A shell script which creates a directory, including all parent
+     directories.  This is used by an automake generated `Makefile'
+     during installation.
+
+`texinfo.tex'
+     Required if you have any texinfo files.  This is used when
+     converting Texinfo files into DVI using `texi2dvi' and TeX.
+
+`ylwrap'
+     A shell script used by an automake generated `Makefile' to run
+     programs like `bison', `yacc', `flex', and `lex'.  These programs
+     default to producing output files with a fixed name, and the
+     `ylwrap' script runs them in a subdirectory to avoid file name
+     conflicts when using a parallel make program.
+
+
+File: configure.info,  Node: Configuration Names,  Next: Cross Compilation Tools,  Prev: Files,  Up: Top
+
+4 Configuration Names
+*********************
+
+The GNU configure system names all systems using a "configuration
+name".  All such names used to be triplets (they may now contain four
+parts in certain cases), and the term "configuration triplet" is still
+seen.
+
+* Menu:
+
+* Configuration Name Definition::	Configuration Name Definition.
+* Using Configuration Names::		Using Configuration Names.
+
+
+File: configure.info,  Node: Configuration Name Definition,  Next: Using Configuration Names,  Up: Configuration Names
+
+4.1 Configuration Name Definition
+=================================
+
+This is a string of the form CPU-MANUFACTURER-OPERATING_SYSTEM.  In
+some cases, this is extended to a four part form:
+CPU-MANUFACTURER-KERNEL-OPERATING_SYSTEM.
+
+   When using a configuration name in a configure option, it is normally
+not necessary to specify an entire name.  In particular, the
+MANUFACTURER field is often omitted, leading to strings such as
+`i386-linux' or `sparc-sunos'.  The shell script `config.sub' will
+translate these shortened strings into the canonical form.  autoconf
+will arrange for `config.sub' to be run automatically when it is needed.
+
+   The fields of a configuration name are as follows:
+
+CPU
+     The type of processor.  This is typically something like `i386' or
+     `sparc'.  More specific variants are used as well, such as
+     `mipsel' to indicate a little endian MIPS processor.
+
+MANUFACTURER
+     A somewhat freeform field which indicates the manufacturer of the
+     system.  This is often simply `unknown'.  Other common strings are
+     `pc' for an IBM PC compatible system, or the name of a workstation
+     vendor, such as `sun'.
+
+OPERATING_SYSTEM
+     The name of the operating system which is run on the system.  This
+     will be something like `solaris2.5' or `irix6.3'.  There is no
+     particular restriction on the version number, and strings like
+     `aix4.1.4.0' are seen.  For an embedded system, which has no
+     operating system, this field normally indicates the type of object
+     file format, such as `elf' or `coff'.
+
+KERNEL
+     This is used mainly for GNU/Linux.  A typical GNU/Linux
+     configuration name is `i586-pc-linux-gnulibc1'.  In this case the
+     kernel, `linux', is separated from the operating system,
+     `gnulibc1'.
+
+   The shell script `config.guess' will normally print the correct
+configuration name for the system on which it is run.  It does by
+running `uname' and by examining other characteristics of the system.
+
+   Because `config.guess' can normally determine the configuration name
+for a machine, it is normally only necessary to specify a configuration
+name when building a cross-compiler or when building using a
+cross-compiler.
+
+
+File: configure.info,  Node: Using Configuration Names,  Prev: Configuration Name Definition,  Up: Configuration Names
+
+4.2 Using Configuration Names
+=============================
+
+A configure script will sometimes have to make a decision based on a
+configuration name.  You will need to do this if you have to compile
+code differently based on something which can not be tested using a
+standard autoconf feature test.
+
+   It is normally better to test for particular features, rather than to
+test for a particular system.  This is because as Unix evolves,
+different systems copy features from one another.  Even if you need to
+determine whether the feature is supported based on a configuration
+name, you should define a macro which describes the feature, rather than
+defining a macro which describes the particular system you are on.
+
+   Testing for a particular system is normally done using a case
+statement in `configure.in'.  The case statement might look something
+like the following, assuming that `host' is a shell variable holding a
+canonical configuration name (which will be the case if `configure.in'
+uses the `AC_CANONICAL_HOST' or `AC_CANONICAL_SYSTEM' macro).
+
+     case "${host}" in
+     i[3-7]86-*-linux-gnu*) do something ;;
+     sparc*-sun-solaris2.[56789]*) do something ;;
+     sparc*-sun-solaris*) do something ;;
+     mips*-*-elf*) do something ;;
+     esac
+
+   It is particularly important to use `*' after the operating system
+field, in order to match the version number which will be generated by
+`config.guess'.
+
+   In most cases you must be careful to match a range of processor
+types.  For most processor families, a trailing `*' suffices, as in
+`mips*' above.  For the i386 family, something along the lines of
+`i[3-7]86' suffices at present.  For the m68k family, you will need
+something like `m68*'.  Of course, if you do not need to match on the
+processor, it is simpler to just replace the entire field by a `*', as
+in `*-*-irix*'.
+
+
+File: configure.info,  Node: Cross Compilation Tools,  Next: Canadian Cross,  Prev: Configuration Names,  Up: Top
+
+5 Cross Compilation Tools
+*************************
+
+The GNU configure and build system can be used to build "cross
+compilation" tools.  A cross compilation tool is a tool which runs on
+one system and produces code which runs on another system.
+
+* Menu:
+
+* Cross Compilation Concepts::		Cross Compilation Concepts.
+* Host and Target::			Host and Target.
+* Using the Host Type::			Using the Host Type.
+* Specifying the Target::       	Specifying the Target.
+* Using the Target Type::		Using the Target Type.
+* Cross Tools in the Cygnus Tree::	Cross Tools in the Cygnus Tree
+
+
+File: configure.info,  Node: Cross Compilation Concepts,  Next: Host and Target,  Up: Cross Compilation Tools
+
+5.1 Cross Compilation Concepts
+==============================
+
+A compiler which produces programs which run on a different system is a
+cross compilation compiler, or simply a "cross compiler".  Similarly,
+we speak of cross assemblers, cross linkers, etc.
+
+   In the normal case, a compiler produces code which runs on the same
+system as the one on which the compiler runs.  When it is necessary to
+distinguish this case from the cross compilation case, such a compiler
+is called a "native compiler".  Similarly, we speak of native
+assemblers, etc.
+
+   Although the debugger is not strictly speaking a compilation tool,
+it is nevertheless meaningful to speak of a cross debugger: a debugger
+which is used to debug code which runs on another system.  Everything
+that is said below about configuring cross compilation tools applies to
+the debugger as well.
+
+
+File: configure.info,  Node: Host and Target,  Next: Using the Host Type,  Prev: Cross Compilation Concepts,  Up: Cross Compilation Tools
+
+5.2 Host and Target
+===================
+
+When building cross compilation tools, there are two different systems
+involved: the system on which the tools will run, and the system for
+which the tools generate code.
+
+   The system on which the tools will run is called the "host" system.
+
+   The system for which the tools generate code is called the "target"
+system.
+
+   For example, suppose you have a compiler which runs on a GNU/Linux
+system and generates ELF programs for a MIPS embedded system.  In this
+case the GNU/Linux system is the host, and the MIPS ELF system is the
+target.  Such a compiler could be called a GNU/Linux cross MIPS ELF
+compiler, or, equivalently, a `i386-linux-gnu' cross `mips-elf'
+compiler.
+
+   Naturally, most programs are not cross compilation tools.  For those
+programs, it does not make sense to speak of a target.  It only makes
+sense to speak of a target for tools like `gcc' or the `binutils' which
+actually produce running code.  For example, it does not make sense to
+speak of the target of a tool like `bison' or `make'.
+
+   Most cross compilation tools can also serve as native tools.  For a
+native compilation tool, it is still meaningful to speak of a target.
+For a native tool, the target is the same as the host.  For example, for
+a GNU/Linux native compiler, the host is GNU/Linux, and the target is
+also GNU/Linux.
+
+
+File: configure.info,  Node: Using the Host Type,  Next: Specifying the Target,  Prev: Host and Target,  Up: Cross Compilation Tools
+
+5.3 Using the Host Type
+=======================
+
+In almost all cases the host system is the system on which you run the
+`configure' script, and on which you build the tools (for the case when
+they differ, *note Canadian Cross::).
+
+   If your configure script needs to know the configuration name of the
+host system, and the package is not a cross compilation tool and
+therefore does not have a target, put `AC_CANONICAL_HOST' in
+`configure.in'.  This macro will arrange to define a few shell
+variables when the `configure' script is run.
+
+`host'
+     The canonical configuration name of the host.  This will normally
+     be determined by running the `config.guess' shell script, although
+     the user is permitted to override this by using an explicit
+     `--host' option.
+
+`host_alias'
+     In the unusual case that the user used an explicit `--host' option,
+     this will be the argument to `--host'.  In the normal case, this
+     will be the same as the `host' variable.
+
+`host_cpu'
+`host_vendor'
+`host_os'
+     The first three parts of the canonical configuration name.
+
+   The shell variables may be used by putting shell code in
+`configure.in'.  For an example, see *note Using Configuration Names::.
+
+
+File: configure.info,  Node: Specifying the Target,  Next: Using the Target Type,  Prev: Using the Host Type,  Up: Cross Compilation Tools
+
+5.4 Specifying the Target
+=========================
+
+By default, the `configure' script will assume that the target is the
+same as the host.  This is the more common case; for example, it leads
+to a native compiler rather than a cross compiler.
+
+   If you want to build a cross compilation tool, you must specify the
+target explicitly by using the `--target' option when you run
+`configure'.  The argument to `--target' is the configuration name of
+the system for which you wish to generate code.  *Note Configuration
+Names::.
+
+   For example, to build tools which generate code for a MIPS ELF
+embedded system, you would use `--target mips-elf'.
+
+
+File: configure.info,  Node: Using the Target Type,  Next: Cross Tools in the Cygnus Tree,  Prev: Specifying the Target,  Up: Cross Compilation Tools
+
+5.5 Using the Target Type
+=========================
+
+When writing `configure.in' for a cross compilation tool, you will need
+to use information about the target.  To do this, put
+`AC_CANONICAL_SYSTEM' in `configure.in'.
+
+   `AC_CANONICAL_SYSTEM' will look for a `--target' option and
+canonicalize it using the `config.sub' shell script.  It will also run
+`AC_CANONICAL_HOST' (*note Using the Host Type::).
+
+   The target type will be recorded in the following shell variables.
+Note that the host versions of these variables will also be defined by
+`AC_CANONICAL_HOST'.
+
+`target'
+     The canonical configuration name of the target.
+
+`target_alias'
+     The argument to the `--target' option.  If the user did not specify
+     a `--target' option, this will be the same as `host_alias'.
+
+`target_cpu'
+`target_vendor'
+`target_os'
+     The first three parts of the canonical target configuration name.
+
+   Note that if `host' and `target' are the same string, you can assume
+a native configuration.  If they are different, you can assume a cross
+configuration.
+
+   It is arguably possible for `host' and `target' to represent the
+same system, but for the strings to not be identical.  For example, if
+`config.guess' returns `sparc-sun-sunos4.1.4', and somebody configures
+with `--target sparc-sun-sunos4.1', then the slight differences between
+the two versions of SunOS may be unimportant for your tool.  However,
+in the general case it can be quite difficult to determine whether the
+differences between two configuration names are significant or not.
+Therefore, by convention, if the user specifies a `--target' option
+without specifying a `--host' option, it is assumed that the user wants
+to configure a cross compilation tool.
+
+   The variables `target' and `target_alias' should be handled
+differently.
+
+   In general, whenever the user may actually see a string,
+`target_alias' should be used.  This includes anything which may appear
+in the file system, such as a directory name or part of a tool name.
+It also includes any tool output, unless it is clearly labelled as the
+canonical target configuration name.  This permits the user to use the
+`--target' option to specify how the tool will appear to the outside
+world.
+
+   On the other hand, when checking for characteristics of the target
+system, `target' should be used.  This is because a wide variety of
+`--target' options may map into the same canonical configuration name.
+You should not attempt to duplicate the canonicalization done by
+`config.sub' in your own code.
+
+   By convention, cross tools are installed with a prefix of the
+argument used with the `--target' option, also known as `target_alias'
+(*note Using the Target Type::).  If the user does not use the
+`--target' option, and thus is building a native tool, no prefix is
+used.
+
+   For example, if gcc is configured with `--target mips-elf', then the
+installed binary will be named `mips-elf-gcc'.  If gcc is configured
+without a `--target' option, then the installed binary will be named
+`gcc'.
+
+   The autoconf macro `AC_ARG_PROGRAM' will handle this for you.  If
+you are using automake, no more need be done; the programs will
+automatically be installed with the correct prefixes.  Otherwise, see
+the autoconf documentation for `AC_ARG_PROGRAM'.
+
+
+File: configure.info,  Node: Cross Tools in the Cygnus Tree,  Prev: Using the Target Type,  Up: Cross Compilation Tools
+
+5.6 Cross Tools in the Cygnus Tree
+==================================
+
+The Cygnus tree is used for various packages including gdb, the GNU
+binutils, and egcs.  It is also, of course, used for Cygnus releases.
+
+   In the Cygnus tree, the top level `configure' script uses the old
+Cygnus configure system, not autoconf.  The top level `Makefile.in' is
+written to build packages based on what is in the source tree, and
+supports building a large number of tools in a single
+`configure'/`make' step.
+
+   The Cygnus tree may be configured with a `--target' option.  The
+`--target' option applies recursively to every subdirectory, and
+permits building an entire set of cross tools at once.
+
+* Menu:
+
+* Host and Target Libraries::		Host and Target Libraries.
+* Target Library Configure Scripts::	Target Library Configure Scripts.
+* Make Targets in Cygnus Tree::         Make Targets in Cygnus Tree.
+* Target libiberty::			Target libiberty
+
+
+File: configure.info,  Node: Host and Target Libraries,  Next: Target Library Configure Scripts,  Up: Cross Tools in the Cygnus Tree
+
+5.6.1 Host and Target Libraries
+-------------------------------
+
+The Cygnus tree distinguishes host libraries from target libraries.
+
+   Host libraries are built with the compiler used to build the programs
+which run on the host, which is called the host compiler.  This includes
+libraries such as `bfd' and `tcl'.  These libraries are built with the
+host compiler, and are linked into programs like the binutils or gcc
+which run on the host.
+
+   Target libraries are built with the target compiler.  If gcc is
+present in the source tree, then the target compiler is the gcc that is
+built using the host compiler.  Target libraries are libraries such as
+`newlib' and `libstdc++'.  These libraries are not linked into the host
+programs, but are instead made available for use with programs built
+with the target compiler.
+
+   For the rest of this section, assume that gcc is present in the
+source tree, so that it will be used to build the target libraries.
+
+   There is a complication here.  The configure process needs to know
+which compiler you are going to use to build a tool; otherwise, the
+feature tests will not work correctly.  The Cygnus tree handles this by
+not configuring the target libraries until the target compiler is
+built.  In order to permit everything to build using a single
+`configure'/`make', the configuration of the target libraries is
+actually triggered during the make step.
+
+   When the target libraries are configured, the `--target' option is
+not used.  Instead, the `--host' option is used with the argument of
+the `--target' option for the overall configuration.  If no `--target'
+option was used for the overall configuration, the `--host' option will
+be passed with the output of the `config.guess' shell script.  Any
+`--build' option is passed down unchanged.
+
+   This translation of configuration options is done because since the
+target libraries are compiled with the target compiler, they are being
+built in order to run on the target of the overall configuration.  By
+the definition of host, this means that their host system is the same as
+the target system of the overall configuration.
+
+   The same process is used for both a native configuration and a cross
+configuration.  Even when using a native configuration, the target
+libraries will be configured and built using the newly built compiler.
+This is particularly important for the C++ libraries, since there is no
+reason to assume that the C++ compiler used to build the host tools (if
+there even is one) uses the same ABI as the g++ compiler which will be
+used to build the target libraries.
+
+   There is one difference between a native configuration and a cross
+configuration.  In a native configuration, the target libraries are
+normally configured and built as siblings of the host tools.  In a cross
+configuration, the target libraries are normally built in a subdirectory
+whose name is the argument to `--target'.  This is mainly for
+historical reasons.
+
+   To summarize, running `configure' in the Cygnus tree configures all
+the host libraries and tools, but does not configure any of the target
+libraries.  Running `make' then does the following steps:
+
+   * Build the host libraries.
+
+   * Build the host programs, including gcc.  Note that we call gcc
+     both a host program (since it runs on the host) and a target
+     compiler (since it generates code for the target).
+
+   * Using the newly built target compiler, configure the target
+     libraries.
+
+   * Build the target libraries.
+
+   The steps need not be done in precisely this order, since they are
+actually controlled by `Makefile' targets.
+
+
+File: configure.info,  Node: Target Library Configure Scripts,  Next: Make Targets in Cygnus Tree,  Prev: Host and Target Libraries,  Up: Cross Tools in the Cygnus Tree
+
+5.6.2 Target Library Configure Scripts
+--------------------------------------
+
+There are a few things you must know in order to write a configure
+script for a target library.  This is just a quick sketch, and beginners
+shouldn't worry if they don't follow everything here.
+
+   The target libraries are configured and built using a newly built
+target compiler.  There may not be any startup files or libraries for
+this target compiler.  In fact, those files will probably be built as
+part of some target library, which naturally means that they will not
+exist when your target library is configured.
+
+   This means that the configure script for a target library may not use
+any test which requires doing a link.  This unfortunately includes many
+useful autoconf macros, such as `AC_CHECK_FUNCS'.  autoconf macros
+which do a compile but not a link, such as `AC_CHECK_HEADERS', may be
+used.
+
+   This is a severe restriction, but normally not a fatal one, as target
+libraries can often assume the presence of other target libraries, and
+thus know which functions will be available.
+
+   As of this writing, the autoconf macro `AC_PROG_CC' does a link to
+make sure that the compiler works.  This may fail in a target library,
+so target libraries must use a different set of macros to locate the
+compiler.  See the `configure.in' file in a directory like `libiberty'
+or `libgloss' for an example.
+
+   As noted in the previous section, target libraries are sometimes
+built in directories which are siblings to the host tools, and are
+sometimes built in a subdirectory.  The `--with-target-subdir' configure
+option will be passed when the library is configured.  Its value will be
+an empty string if the target library is a sibling.  Its value will be
+the name of the subdirectory if the target library is in a subdirectory.
+
+   If the overall build is not a native build (i.e., the overall
+configure used the `--target' option), then the library will be
+configured with the `--with-cross-host' option.  The value of this
+option will be the host system of the overall build.  Recall that the
+host system of the library will be the target of the overall build.  If
+the overall build is a native build, the `--with-cross-host' option
+will not be used.
+
+   A library which can be built both standalone and as a target library
+may want to install itself into different directories depending upon the
+case.  When built standalone, or when built native, the library should
+be installed in `$(libdir)'.  When built as a target library which is
+not native, the library should be installed in `$(tooldir)/lib'.  The
+`--with-cross-host' option may be used to distinguish these cases.
+
+   This same test of `--with-cross-host' may be used to see whether it
+is OK to use link tests in the configure script.  If the
+`--with-cross-host' option is not used, then the library is being built
+either standalone or native, and a link should work.
+
+
+File: configure.info,  Node: Make Targets in Cygnus Tree,  Next: Target libiberty,  Prev: Target Library Configure Scripts,  Up: Cross Tools in the Cygnus Tree
+
+5.6.3 Make Targets in Cygnus Tree
+---------------------------------
+
+The top level `Makefile' in the Cygnus tree defines targets for every
+known subdirectory.
+
+   For every subdirectory DIR which holds a host library or program,
+the `Makefile' target `all-DIR' will build that library or program.
+
+   There are dependencies among host tools.  For example, building gcc
+requires first building gas, because the gcc build process invokes the
+target assembler.  These dependencies are reflected in the top level
+`Makefile'.
+
+   For every subdirectory DIR which holds a target library, the
+`Makefile' target `configure-target-DIR' will configure that library.
+The `Makefile' target `all-target-DIR' will build that library.
+
+   Every `configure-target-DIR' target depends upon `all-gcc', since
+gcc, the target compiler, is required to configure the tool.  Every
+`all-target-DIR' target depends upon the corresponding
+`configure-target-DIR' target.
+
+   There are several other targets which may be of interest for each
+directory: `install-DIR', `clean-DIR', and `check-DIR'.  There are also
+corresponding `target' versions of these for the target libraries ,
+such as `install-target-DIR'.
+
+
+File: configure.info,  Node: Target libiberty,  Prev: Make Targets in Cygnus Tree,  Up: Cross Tools in the Cygnus Tree
+
+5.6.4 Target libiberty
+----------------------
+
+The `libiberty' subdirectory is currently a special case, in that it is
+the only directory which is built both using the host compiler and
+using the target compiler.
+
+   This is because the files in `libiberty' are used when building the
+host tools, and they are also incorporated into the `libstdc++' target
+library as support code.
+
+   This duality does not pose any particular difficulties.  It means
+that there are targets for both `all-libiberty' and
+`all-target-libiberty'.
+
+   In a native configuration, when target libraries are not built in a
+subdirectory, the same objects are normally used as both the host build
+and the target build.  This is normally OK, since libiberty contains
+only C code, and in a native configuration the results of the host
+compiler and the target compiler are normally interoperable.
+
+   Irix 6 is again an exception here, since the SGI native compiler
+defaults to using the `O32' ABI, and gcc defaults to using the `N32'
+ABI.  On Irix 6, the target libraries are built in a subdirectory even
+for a native configuration, avoiding this problem.
+
+   There are currently no other libraries built for both the host and
+the target, but there is no conceptual problem with adding more.
+
+
+File: configure.info,  Node: Canadian Cross,  Next: Cygnus Configure,  Prev: Cross Compilation Tools,  Up: Top
+
+6 Canadian Cross
+****************
+
+It is possible to use the GNU configure and build system to build a
+program which will run on a system which is different from the system on
+which the tools are built.  In other words, it is possible to build
+programs using a cross compiler.
+
+   This is referred to as a "Canadian Cross".
+
+* Menu:
+
+* Canadian Cross Example::		Canadian Cross Example.
+* Canadian Cross Concepts::		Canadian Cross Concepts.
+* Build Cross Host Tools::		Build Cross Host Tools.
+* Build and Host Options::		Build and Host Options.
+* CCross not in Cygnus Tree::		Canadian Cross not in Cygnus Tree.
+* CCross in Cygnus Tree::		Canadian Cross in Cygnus Tree.
+* Supporting Canadian Cross::		Supporting Canadian Cross.
+
+
+File: configure.info,  Node: Canadian Cross Example,  Next: Canadian Cross Concepts,  Up: Canadian Cross
+
+6.1 Canadian Cross Example
+==========================
+
+Here is an example of a Canadian Cross.
+
+   While running on a GNU/Linux, you can build a program which will run
+on a Solaris system.  You would use a GNU/Linux cross Solaris compiler
+to build the program.
+
+   Of course, you could not run the resulting program on your GNU/Linux
+system.  You would have to copy it over to a Solaris system before you
+would run it.
+
+   Of course, you could also simply build the programs on the Solaris
+system in the first place.  However, perhaps the Solaris system is not
+available for some reason; perhaps you actually don't have one, but you
+want to build the tools for somebody else to use.  Or perhaps your
+GNU/Linux system is much faster than your Solaris system.
+
+   A Canadian Cross build is most frequently used when building
+programs to run on a non-Unix system, such as DOS or Windows.  It may
+be simpler to configure and build on a Unix system than to support the
+configuration machinery on a non-Unix system.
+
+
+File: configure.info,  Node: Canadian Cross Concepts,  Next: Build Cross Host Tools,  Prev: Canadian Cross Example,  Up: Canadian Cross
+
+6.2 Canadian Cross Concepts
+===========================
+
+When building a Canadian Cross, there are at least two different systems
+involved: the system on which the tools are being built, and the system
+on which the tools will run.
+
+   The system on which the tools are being built is called the "build"
+system.
+
+   The system on which the tools will run is called the host system.
+
+   For example, if you are building a Solaris program on a GNU/Linux
+system, as in the previous section, the build system would be GNU/Linux,
+and the host system would be Solaris.
+
+   It is, of course, possible to build a cross compiler using a Canadian
+Cross (i.e., build a cross compiler using a cross compiler).  In this
+case, the system for which the resulting cross compiler generates code
+is called the target system.  (For a more complete discussion of host
+and target systems, *note Host and Target::).
+
+   An example of building a cross compiler using a Canadian Cross would
+be building a Windows cross MIPS ELF compiler on a GNU/Linux system.  In
+this case the build system would be GNU/Linux, the host system would be
+Windows, and the target system would be MIPS ELF.
+
+   The name Canadian Cross comes from the case when the build, host, and
+target systems are all different.  At the time that these issues were
+all being hashed out, Canada had three national political parties.
+
+
+File: configure.info,  Node: Build Cross Host Tools,  Next: Build and Host Options,  Prev: Canadian Cross Concepts,  Up: Canadian Cross
+
+6.3 Build Cross Host Tools
+==========================
+
+In order to configure a program for a Canadian Cross build, you must
+first build and install the set of cross tools you will use to build the
+program.
+
+   These tools will be build cross host tools.  That is, they will run
+on the build system, and will produce code that runs on the host system.
+
+   It is easy to confuse the meaning of build and host here.  Always
+remember that the build system is where you are doing the build, and the
+host system is where the resulting program will run.  Therefore, you
+need a build cross host compiler.
+
+   In general, you must have a complete cross environment in order to do
+the build.  This normally means a cross compiler, cross assembler, and
+so forth, as well as libraries and include files for the host system.
+
+
+File: configure.info,  Node: Build and Host Options,  Next: CCross not in Cygnus Tree,  Prev: Build Cross Host Tools,  Up: Canadian Cross
+
+6.4 Build and Host Options
+==========================
+
+When you run `configure', you must use both the `--build' and `--host'
+options.
+
+   The `--build' option is used to specify the configuration name of
+the build system.  This can normally be the result of running the
+`config.guess' shell script, and it is reasonable to use
+`--build=`config.guess`'.
+
+   The `--host' option is used to specify the configuration name of the
+host system.
+
+   As we explained earlier, `config.guess' is used to set the default
+value for the `--host' option (*note Using the Host Type::).  We can
+now see that since `config.guess' returns the type of system on which
+it is run, it really identifies the build system.  Since the host
+system is normally the same as the build system (i.e., people do not
+normally build using a cross compiler), it is reasonable to use the
+result of `config.guess' as the default for the host system when the
+`--host' option is not used.
+
+   It might seem that if the `--host' option were used without the
+`--build' option that the configure script could run `config.guess' to
+determine the build system, and presume a Canadian Cross if the result
+of `config.guess' differed from the `--host' option.  However, for
+historical reasons, some configure scripts are routinely run using an
+explicit `--host' option, rather than using the default from
+`config.guess'.  As noted earlier, it is difficult or impossible to
+reliably compare configuration names (*note Using the Target Type::).
+Therefore, by convention, if the `--host' option is used, but the
+`--build' option is not used, then the build system defaults to the
+host system.
+
+
+File: configure.info,  Node: CCross not in Cygnus Tree,  Next: CCross in Cygnus Tree,  Prev: Build and Host Options,  Up: Canadian Cross
+
+6.5 Canadian Cross not in Cygnus Tree.
+======================================
+
+If you are not using the Cygnus tree, you must explicitly specify the
+cross tools which you want to use to build the program.  This is done by
+setting environment variables before running the `configure' script.
+
+   You must normally set at least the environment variables `CC', `AR',
+and `RANLIB' to the cross tools which you want to use to build.
+
+   For some programs, you must set additional cross tools as well, such
+as `AS', `LD', or `NM'.
+
+   You would set these environment variables to the build cross tools
+which you are going to use.
+
+   For example, if you are building a Solaris program on a GNU/Linux
+system, and your GNU/Linux cross Solaris compiler were named
+`solaris-gcc', then you would set the environment variable `CC' to
+`solaris-gcc'.
+
+
+File: configure.info,  Node: CCross in Cygnus Tree,  Next: Supporting Canadian Cross,  Prev: CCross not in Cygnus Tree,  Up: Canadian Cross
+
+6.6 Canadian Cross in Cygnus Tree
+=================================
+
+This section describes configuring and building a Canadian Cross when
+using the Cygnus tree.
+
+* Menu:
+
+* Standard Cygnus CCross::	Building a Normal Program.
+* Cross Cygnus CCross::		Building a Cross Program.
+
+
+File: configure.info,  Node: Standard Cygnus CCross,  Next: Cross Cygnus CCross,  Up: CCross in Cygnus Tree
+
+6.6.1 Building a Normal Program
+-------------------------------
+
+When configuring a Canadian Cross in the Cygnus tree, all the
+appropriate environment variables are automatically set to `HOST-TOOL',
+where HOST is the value used for the `--host' option, and TOOL is the
+name of the tool (e.g., `gcc', `as', etc.).  These tools must be on
+your `PATH'.
+
+   Adding a prefix of HOST will give the usual name for the build cross
+host tools.  To see this, consider that when these cross tools were
+built, they were configured to run on the build system and to produce
+code for the host system.  That is, they were configured with a
+`--target' option that is the same as the system which we are now
+calling the host.  Recall that the default name for installed cross
+tools uses the target system as a prefix (*note Using the Target
+Type::).  Since that is the system which we are now calling the host,
+HOST is the right prefix to use.
+
+   For example, if you configure with `--build=i386-linux-gnu' and
+`--host=solaris', then the Cygnus tree will automatically default to
+using the compiler `solaris-gcc'.  You must have previously built and
+installed this compiler, probably by doing a build with no `--host'
+option and with a `--target' option of `solaris'.
+
+
+File: configure.info,  Node: Cross Cygnus CCross,  Prev: Standard Cygnus CCross,  Up: CCross in Cygnus Tree
+
+6.6.2 Building a Cross Program
+------------------------------
+
+There are additional considerations if you want to build a cross
+compiler, rather than a native compiler, in the Cygnus tree using a
+Canadian Cross.
+
+   When you build a cross compiler using the Cygnus tree, then the
+target libraries will normally be built with the newly built target
+compiler (*note Host and Target Libraries::).  However, this will not
+work when building with a Canadian Cross.  This is because the newly
+built target compiler will be a program which runs on the host system,
+and therefore will not be able to run on the build system.
+
+   Therefore, when building a cross compiler with the Cygnus tree, you
+must first install a set of build cross target tools.  These tools will
+be used when building the target libraries.
+
+   Note that this is not a requirement of a Canadian Cross in general.
+For example, it would be possible to build just the host cross target
+tools on the build system, to copy the tools to the host system, and to
+build the target libraries on the host system.  The requirement for
+build cross target tools is imposed by the Cygnus tree, which expects
+to be able to build both host programs and target libraries in a single
+`configure'/`make' step.  Because it builds these in a single step, it
+expects to be able to build the target libraries on the build system,
+which means that it must use a build cross target toolchain.
+
+   For example, suppose you want to build a Windows cross MIPS ELF
+compiler on a GNU/Linux system.  You must have previously installed
+both a GNU/Linux cross Windows compiler and a GNU/Linux cross MIPS ELF
+compiler.
+
+   In order to build the Windows (configuration name `i386-cygwin32')
+cross MIPS ELF (configure name `mips-elf') compiler, you might execute
+the following commands (long command lines are broken across lines with
+a trailing backslash as a continuation character).
+
+     mkdir linux-x-cygwin32
+     cd linux-x-cygwin32
+     SRCDIR/configure --target i386-cygwin32 --prefix=INSTALLDIR \
+       --exec-prefix=INSTALLDIR/H-i386-linux
+     make
+     make install
+     cd ..
+     mkdir linux-x-mips-elf
+     cd linux-x-mips-elf
+     SRCDIR/configure --target mips-elf --prefix=INSTALLDIR \
+       --exec-prefix=INSTALLDIR/H-i386-linux
+     make
+     make install
+     cd ..
+     mkdir cygwin32-x-mips-elf
+     cd cygwin32-x-mips-elf
+     SRCDIR/configure --build=i386-linux-gnu --host=i386-cygwin32 \
+       --target=mips-elf --prefix=WININSTALLDIR \
+       --exec-prefix=WININSTALLDIR/H-i386-cygwin32
+     make
+     make install
+
+   You would then copy the contents of WININSTALLDIR over to the
+Windows machine, and run the resulting programs.
+
+
+File: configure.info,  Node: Supporting Canadian Cross,  Prev: CCross in Cygnus Tree,  Up: Canadian Cross
+
+6.7 Supporting Canadian Cross
+=============================
+
+If you want to make it possible to build a program you are developing
+using a Canadian Cross, you must take some care when writing your
+configure and make rules.  Simple cases will normally work correctly.
+However, it is not hard to write configure and make tests which will
+fail in a Canadian Cross.
+
+* Menu:
+
+* CCross in Configure::		Supporting Canadian Cross in Configure Scripts.
+* CCross in Make::		Supporting Canadian Cross in Makefiles.
+
+
+File: configure.info,  Node: CCross in Configure,  Next: CCross in Make,  Up: Supporting Canadian Cross
+
+6.7.1 Supporting Canadian Cross in Configure Scripts
+----------------------------------------------------
+
+In a `configure.in' file, after calling `AC_PROG_CC', you can find out
+whether this is a Canadian Cross configure by examining the shell
+variable `cross_compiling'.  In a Canadian Cross, which means that the
+compiler is a cross compiler, `cross_compiling' will be `yes'.  In a
+normal configuration, `cross_compiling' will be `no'.
+
+   You ordinarily do not need to know the type of the build system in a
+configure script.  However, if you do need that information, you can get
+it by using the macro `AC_CANONICAL_SYSTEM', the same macro that is
+used to determine the target system.  This macro will set the variables
+`build', `build_alias', `build_cpu', `build_vendor', and `build_os',
+which correspond to the similar `target' and `host' variables, except
+that they describe the build system.
+
+   When writing tests in `configure.in', you must remember that you
+want to test the host environment, not the build environment.
+
+   Macros like `AC_CHECK_FUNCS' which use the compiler will test the
+host environment.  That is because the tests will be done by running the
+compiler, which is actually a build cross host compiler.  If the
+compiler can find the function, that means that the function is present
+in the host environment.
+
+   Tests like `test -f /dev/ptyp0', on the other hand, will test the
+build environment.  Remember that the configure script is running on the
+build system, not the host system.  If your configure scripts examines
+files, those files will be on the build system.  Whatever you determine
+based on those files may or may not be the case on the host system.
+
+   Most autoconf macros will work correctly for a Canadian Cross.  The
+main exception is `AC_TRY_RUN'.  This macro tries to compile and run a
+test program.  This will fail in a Canadian Cross, because the program
+will be compiled for the host system, which means that it will not run
+on the build system.
+
+   The `AC_TRY_RUN' macro provides an optional argument to tell the
+configure script what to do in a Canadian Cross.  If that argument is
+not present, you will get a warning when you run `autoconf':
+     warning: AC_TRY_RUN called without default to allow cross compiling
+   This tells you that the resulting `configure' script will not work
+with a Canadian Cross.
+
+   In some cases while it may better to perform a test at configure
+time, it is also possible to perform the test at run time.  In such a
+case you can use the cross compiling argument to `AC_TRY_RUN' to tell
+your program that the test could not be performed at configure time.
+
+   There are a few other autoconf macros which will not work correctly
+with a Canadian Cross: a partial list is `AC_FUNC_GETPGRP',
+`AC_FUNC_SETPGRP', `AC_FUNC_SETVBUF_REVERSED', and
+`AC_SYS_RESTARTABLE_SYSCALLS'.  The `AC_CHECK_SIZEOF' macro is
+generally not very useful with a Canadian Cross; it permits an optional
+argument indicating the default size, but there is no way to know what
+the correct default should be.
+
+
+File: configure.info,  Node: CCross in Make,  Prev: CCross in Configure,  Up: Supporting Canadian Cross
+
+6.7.2 Supporting Canadian Cross in Makefiles.
+---------------------------------------------
+
+The main Canadian Cross issue in a `Makefile' arises when you want to
+use a subsidiary program to generate code or data which you will then
+include in your real program.
+
+   If you compile this subsidiary program using `$(CC)' in the usual
+way, you will not be able to run it.  This is because `$(CC)' will
+build a program for the host system, but the program is being built on
+the build system.
+
+   You must instead use a compiler for the build system, rather than the
+host system.  In the Cygnus tree, this make variable `$(CC_FOR_BUILD)'
+will hold a compiler for the build system.
+
+   Note that you should not include `config.h' in a file you are
+compiling with `$(CC_FOR_BUILD)'.  The `configure' script will build
+`config.h' with information for the host system.  However, you are
+compiling the file using a compiler for the build system (a native
+compiler).  Subsidiary programs are normally simple filters which do no
+user interaction, and it is normally possible to write them in a highly
+portable fashion so that the absence of `config.h' is not crucial.
+
+   The gcc `Makefile.in' shows a complex situation in which certain
+files, such as `rtl.c', must be compiled into both subsidiary programs
+run on the build system and into the final program.  This approach may
+be of interest for advanced build system hackers.  Note that the build
+system compiler is rather confusingly called `HOST_CC'.
+
+
+File: configure.info,  Node: Cygnus Configure,  Next: Multilibs,  Prev: Canadian Cross,  Up: Top
+
+7 Cygnus Configure
+******************
+
+The Cygnus configure script predates autoconf.  All of its interesting
+features have been incorporated into autoconf.  No new programs should
+be written to use the Cygnus configure script.
+
+   However, the Cygnus configure script is still used in a few places:
+at the top of the Cygnus tree and in a few target libraries in the
+Cygnus tree.  Until those uses have been replaced with autoconf, some
+brief notes are appropriate here.  This is not complete documentation,
+but it should be possible to use this as a guide while examining the
+scripts themselves.
+
+* Menu:
+
+* Cygnus Configure Basics::		Cygnus Configure Basics.
+* Cygnus Configure in C++ Libraries::	Cygnus Configure in C++ Libraries.
+
+
+File: configure.info,  Node: Cygnus Configure Basics,  Next: Cygnus Configure in C++ Libraries,  Up: Cygnus Configure
+
+7.1 Cygnus Configure Basics
+===========================
+
+Cygnus configure does not use any generated files; there is no program
+corresponding to `autoconf'.  Instead, there is a single shell script
+named `configure' which may be found at the top of the Cygnus tree.
+This shell script was written by hand; it was not generated by
+autoconf, and it is incorrect, and indeed harmful, to run `autoconf' in
+the top level of a Cygnus tree.
+
+   Cygnus configure works in a particular directory by examining the
+file `configure.in' in that directory.  That file is broken into four
+separate shell scripts.
+
+   The first is the contents of `configure.in' up to a line that starts
+with `# per-host:'.  This is the common part.
+
+   The second is the rest of `configure.in' up to a line that starts
+with `# per-target:'.  This is the per host part.
+
+   The third is the rest of `configure.in' up to a line that starts
+with `# post-target:'.  This is the per target part.
+
+   The fourth is the remainder of `configure.in'.  This is the post
+target part.
+
+   If any of these comment lines are missing, the corresponding shell
+script is empty.
+
+   Cygnus configure will first execute the common part.  This must set
+the shell variable `srctrigger' to the name of a source file, to
+confirm that Cygnus configure is looking at the right directory.  This
+may set the shell variables `package_makefile_frag' and
+`package_makefile_rules_frag'.
+
+   Cygnus configure will next set the `build' and `host' shell
+variables, and execute the per host part.  This may set the shell
+variable `host_makefile_frag'.
+
+   Cygnus configure will next set the `target' variable, and execute
+the per target part.  This may set the shell variable
+`target_makefile_frag'.
+
+   Any of these scripts may set the `subdirs' shell variable.  This
+variable is a list of subdirectories where a `Makefile.in' file may be
+found.  Cygnus configure will automatically look for a `Makefile.in'
+file in the current directory.  The `subdirs' shell variable is not
+normally used, and I believe that the only directory which uses it at
+present is `newlib'.
+
+   For each `Makefile.in', Cygnus configure will automatically create a
+`Makefile' by adding definitions for `make' variables such as `host'
+and `target', and automatically editing the values of `make' variables
+such as `prefix' if they are present.
+
+   Also, if any of the `makefile_frag' shell variables are set, Cygnus
+configure will interpret them as file names relative to either the
+working directory or the source directory, and will read the contents of
+the file into the generated `Makefile'.  The file contents will be read
+in after the first line in `Makefile.in' which starts with `####'.
+
+   These `Makefile' fragments are used to customize behaviour for a
+particular host or target.  They serve to select particular files to
+compile, and to define particular preprocessor macros by providing
+values for `make' variables which are then used during compilation.
+Cygnus configure, unlike autoconf, normally does not do feature tests,
+and normally requires support to be added manually for each new host.
+
+   The `Makefile' fragment support is similar to the autoconf
+`AC_SUBST_FILE' macro.
+
+   After creating each `Makefile', the post target script will be run
+(i.e., it may be run several times).  This script may further customize
+the `Makefile'.  When it is run, the shell variable `Makefile' will
+hold the name of the `Makefile', including the appropriate directory
+component.
+
+   Like an autoconf generated `configure' script, Cygnus configure will
+create a file named `config.status' which, when run, will automatically
+recreate the configuration.  The `config.status' file will simply
+execute the Cygnus configure script again with the appropriate
+arguments.
+
+   Any of the parts of `configure.in' may set the shell variables
+`files' and `links'.  Cygnus configure will set up symlinks from the
+names in `links' to the files named in `files'.  This is similar to the
+autoconf `AC_LINK_FILES' macro.
+
+   Finally, any of the parts of `configure.in' may set the shell
+variable `configdirs' to a set of subdirectories.  If it is set, Cygnus
+configure will recursively run the configure process in each
+subdirectory.  If the subdirectory uses Cygnus configure, it will
+contain a `configure.in' file but no `configure' file, in which case
+Cygnus configure will invoke itself recursively.  If the subdirectory
+has a `configure' file, Cygnus configure assumes that it is an autoconf
+generated `configure' script, and simply invokes it directly.
+
+
+File: configure.info,  Node: Cygnus Configure in C++ Libraries,  Prev: Cygnus Configure Basics,  Up: Cygnus Configure
+
+7.2 Cygnus Configure in C++ Libraries
+=====================================
+
+The C++ library configure system, written by Per Bothner, deserves
+special mention.  It uses Cygnus configure, but it does feature testing
+like that done by autoconf generated `configure' scripts.  This
+approach is used in the libraries `libio', `libstdc++', and `libg++'.
+
+   Most of the `Makefile' information is written out by the shell
+script `libio/config.shared'.  Each `configure.in' file sets certain
+shell variables, and then invokes `config.shared' to create two package
+`Makefile' fragments.  These fragments are then incorporated into the
+resulting `Makefile' by the Cygnus configure script.
+
+   The file `_G_config.h' is created in the `libio' object directory by
+running the shell script `libio/gen-params'.  This shell script uses
+feature tests to define macros and typedefs in `_G_config.h'.
+
+
+File: configure.info,  Node: Multilibs,  Next: FAQ,  Prev: Cygnus Configure,  Up: Top
+
+8 Multilibs
+***********
+
+For some targets gcc may have different processor requirements depending
+upon command line options.  An obvious example is the `-msoft-float'
+option supported on several processors.  This option means that the
+floating point registers are not available, which means that floating
+point operations must be done by calling an emulation subroutine rather
+than by using machine instructions.
+
+   For such options, gcc is often configured to compile target libraries
+twice: once with `-msoft-float' and once without.  When gcc compiles
+target libraries more than once, the resulting libraries are called
+"multilibs".
+
+   Multilibs are not really part of the GNU configure and build system,
+but we discuss them here since they require support in the `configure'
+scripts and `Makefile's used for target libraries.
+
+* Menu:
+
+* Multilibs in gcc::		        Multilibs in gcc.
+* Multilibs in Target Libraries::	Multilibs in Target Libraries.
+
+
+File: configure.info,  Node: Multilibs in gcc,  Next: Multilibs in Target Libraries,  Up: Multilibs
+
+8.1 Multilibs in gcc
+====================
+
+In gcc, multilibs are defined by setting the variable
+`MULTILIB_OPTIONS' in the target `Makefile' fragment.  Several other
+`MULTILIB' variables may also be defined there.  *Note The Target
+Makefile Fragment: (gcc)Target Fragment.
+
+   If you have built gcc, you can see what multilibs it uses by running
+it with the `-print-multi-lib' option.  The output `.;' means that no
+multilibs are used.  In general, the output is a sequence of lines, one
+per multilib.  The first part of each line, up to the `;', is the name
+of the multilib directory.  The second part is a list of compiler
+options separated by `@' characters.
+
+   Multilibs are built in a tree of directories.  The top of the tree,
+represented by `.' in the list of multilib directories, is the default
+library to use when no special compiler options are used.  The
+subdirectories of the tree hold versions of the library to use when
+particular compiler options are used.
+
+
+File: configure.info,  Node: Multilibs in Target Libraries,  Prev: Multilibs in gcc,  Up: Multilibs
+
+8.2 Multilibs in Target Libraries
+=================================
+
+The target libraries in the Cygnus tree are automatically built with
+multilibs.  That means that each library is built multiple times.
+
+   This default is set in the top level `configure.in' file, by adding
+`--enable-multilib' to the list of arguments passed to configure when
+it is run for the target libraries (*note Host and Target Libraries::).
+
+   Each target library uses the shell script `config-ml.in', written by
+Doug Evans, to prepare to build target libraries.  This shell script is
+invoked after the `Makefile' has been created by the `configure'
+script.  If multilibs are not enabled, it does nothing, otherwise it
+modifies the `Makefile' to support multilibs.
+
+   The `config-ml.in' script makes one copy of the `Makefile' for each
+multilib in the appropriate subdirectory.  When configuring in the
+source directory (which is not recommended), it will build a symlink
+tree of the sources in each subdirectory.
+
+   The `config-ml.in' script sets several variables in the various
+`Makefile's.  The `Makefile.in' must have definitions for these
+variables already; `config-ml.in' simply changes the existing values.
+The `Makefile' should use default values for these variables which will
+do the right thing in the subdirectories.
+
+`MULTISRCTOP'
+     `config-ml.in' will set this to a sequence of `../' strings, where
+     the number of strings is the number of multilib levels in the
+     source tree.  The default value should be the empty string.
+
+`MULTIBUILDTOP'
+     `config-ml.in' will set this to a sequence of `../' strings, where
+     the number of strings is number of multilib levels in the object
+     directory.  The default value should be the empty string.  This
+     will differ from `MULTISRCTOP' when configuring in the source tree
+     (which is not recommended).
+
+`MULTIDIRS'
+     In the top level `Makefile' only, `config-ml.in' will set this to
+     the list of multilib subdirectories.  The default value should be
+     the empty string.
+
+`MULTISUBDIR'
+     `config-ml.in' will set this to the installed subdirectory name to
+     use for this subdirectory, with a leading `/'.  The default value
+     shold be the empty string.
+
+`MULTIDO'
+`MULTICLEAN'
+     In the top level `Makefile' only, `config-ml.in' will set these
+     variables to commands to use when doing a recursive make.  These
+     variables should both default to the string `true', so that by
+     default nothing happens.
+
+   All references to the parent of the source directory should use the
+variable `MULTISRCTOP'.  Instead of writing `$(srcdir)/..', you must
+write `$(srcdir)/$(MULTISRCTOP)..'.
+
+   Similarly, references to the parent of the object directory should
+use the variable `MULTIBUILDTOP'.
+
+   In the installation target, the libraries should be installed in the
+subdirectory `MULTISUBDIR'.  Instead of installing
+`$(libdir)/libfoo.a', install `$(libdir)$(MULTISUBDIR)/libfoo.a'.
+
+   The `config-ml.in' script also modifies the top level `Makefile' to
+add `multi-do' and `multi-clean' targets which are used when building
+multilibs.
+
+   The default target of the `Makefile' should include the following
+command:
+     @$(MULTIDO) $(FLAGS_TO_PASS) DO=all multi-do
+   This assumes that `$(FLAGS_TO_PASS)' is defined as a set of
+variables to pass to a recursive invocation of `make'.  This will build
+all the multilibs.  Note that the default value of `MULTIDO' is `true',
+so by default this command will do nothing.  It will only do something
+in the top level `Makefile' if multilibs were enabled.
+
+   The `install' target of the `Makefile' should include the following
+command:
+     @$(MULTIDO) $(FLAGS_TO_PASS) DO=install multi-do
+
+   In general, any operation, other than clean, which should be
+performed on all the multilibs should use a `$(MULTIDO)' line, setting
+the variable `DO' to the target of each recursive call to `make'.
+
+   The `clean' targets (`clean', `mostlyclean', etc.) should use
+`$(MULTICLEAN)'.  For example, the `clean' target should do this:
+     @$(MULTICLEAN) DO=clean multi-clean
+
+
+File: configure.info,  Node: FAQ,  Next: Index,  Prev: Multilibs,  Up: Top
+
+9 Frequently Asked Questions
+****************************
+
+Which do I run first, `autoconf' or `automake'?
+     Except when you first add autoconf or automake support to a
+     package, you shouldn't run either by hand.  Instead, configure
+     with the `--enable-maintainer-mode' option, and let `make' take
+     care of it.
+
+`autoconf' says something about undefined macros.
+     This means that you have macros in your `configure.in' which are
+     not defined by `autoconf'.  You may be using an old version of
+     `autoconf'; try building and installing a newer one.  Make sure the
+     newly installled `autoconf' is first on your `PATH'.  Also, see
+     the next question.
+
+My `configure' script has stuff like `CY_GNU_GETTEXT' in it.
+     This means that you have macros in your `configure.in' which should
+     be defined in your `aclocal.m4' file, but aren't.  This usually
+     means that `aclocal' was not able to appropriate definitions of the
+     macros.  Make sure that you have installed all the packages you
+     need.  In particular, make sure that you have installed libtool
+     (this is where `AM_PROG_LIBTOOL' is defined) and gettext (this is
+     where `CY_GNU_GETTEXT' is defined, at least in the Cygnus version
+     of gettext).
+
+My `Makefile' has `@' characters in it.
+     This may mean that you tried to use an autoconf substitution in
+     your `Makefile.in' without adding the appropriate `AC_SUBST' call
+     to your `configure' script.  Or it may just mean that you need to
+     rebuild `Makefile' in your build directory.  To rebuild `Makefile'
+     from `Makefile.in', run the shell script `config.status' with no
+     arguments.  If you need to force `configure' to run again, first
+     run `config.status --recheck'.  These runs are normally done
+     automatically by `Makefile' targets, but if your `Makefile' has
+     gotten messed up you'll need to help them along.
+
+Why do I have to run both `config.status --recheck' and `config.status'?
+     Normally, you don't; they will be run automatically by `Makefile'
+     targets.  If you do need to run them, use `config.status --recheck'
+     to run the `configure' script again with the same arguments as the
+     first time you ran it.  Use `config.status' (with no arguments) to
+     regenerate all files (`Makefile', `config.h', etc.) based on the
+     results of the configure script.  The two cases are separate
+     because it isn't always necessary to regenerate all the files
+     after running `config.status --recheck'.  The `Makefile' targets
+     generated by automake will use the environment variables
+     `CONFIG_FILES' and `CONFIG_HEADERS' to only regenerate files as
+     they are needed.
+
+What is the Cygnus tree?
+     The Cygnus tree is used for various packages including gdb, the GNU
+     binutils, and egcs.  It is also, of course, used for Cygnus
+     releases.  It is the build system which was developed at Cygnus,
+     using the Cygnus configure script.  It permits building many
+     different packages with a single configure and make.  The
+     configure scripts in the tree are being converted to autoconf, but
+     the general build structure remains intact.
+
+Why do I have to keep rebuilding and reinstalling the tools?
+     I know, it's a pain.  Unfortunately, there are bugs in the tools
+     themselves which need to be fixed, and each time that happens
+     everybody who uses the tools need to reinstall new versions of
+     them.  I don't know if there is going to be a clever fix until the
+     tools stabilize.
+
+Why not just have a Cygnus tree `make' target to update the tools?
+     The tools unfortunately need to be installed before they can be
+     used.  That means that they must be built using an appropriate
+     prefix, and it seems unwise to assume that every configuration
+     uses an appropriate prefix.  It might be possible to make them
+     work in place, or it might be possible to install them in some
+     subdirectory; so far these approaches have not been implemented.
+
+
+File: configure.info,  Node: Index,  Prev: FAQ,  Up: Top
+
+Index
+*****
+
+[index]
+* Menu:
+
+* --build option:                        Build and Host Options.
+                                                              (line   9)
+* --host option:                         Build and Host Options.
+                                                              (line  14)
+* --target option:                       Specifying the Target.
+                                                              (line  10)
+* _GNU_SOURCE:                           Write configure.in.  (line 134)
+* AC_CANONICAL_HOST:                     Using the Host Type. (line  10)
+* AC_CANONICAL_SYSTEM:                   Using the Target Type.
+                                                              (line   6)
+* AC_CONFIG_HEADER:                      Write configure.in.  (line  66)
+* AC_EXEEXT:                             Write configure.in.  (line  86)
+* AC_INIT:                               Write configure.in.  (line  38)
+* AC_OUTPUT:                             Write configure.in.  (line 142)
+* AC_PREREQ:                             Write configure.in.  (line  42)
+* AC_PROG_CC:                            Write configure.in.  (line 103)
+* AC_PROG_CXX:                           Write configure.in.  (line 117)
+* acconfig.h:                            Written Developer Files.
+                                                              (line  27)
+* acconfig.h, writing:                   Write acconfig.h.    (line   6)
+* acinclude.m4:                          Written Developer Files.
+                                                              (line  37)
+* aclocal.m4:                            Generated Developer Files.
+                                                              (line  33)
+* AM_CONFIG_HEADER:                      Write configure.in.  (line  53)
+* AM_DISABLE_SHARED:                     Write configure.in.  (line 127)
+* AM_EXEEXT:                             Write configure.in.  (line  86)
+* AM_INIT_AUTOMAKE:                      Write configure.in.  (line  48)
+* AM_MAINTAINER_MODE:                    Write configure.in.  (line  70)
+* AM_PROG_LIBTOOL:                       Write configure.in.  (line 122)
+* AM_PROG_LIBTOOL in configure:          FAQ.                 (line  19)
+* build option:                          Build and Host Options.
+                                                              (line   9)
+* building with a cross compiler:        Canadian Cross.      (line   6)
+* canadian cross:                        Canadian Cross.      (line   6)
+* canadian cross in configure:           CCross in Configure. (line   6)
+* canadian cross in cygnus tree:         CCross in Cygnus Tree.
+                                                              (line   6)
+* canadian cross in makefile:            CCross in Make.      (line   6)
+* canadian cross, configuring:           Build and Host Options.
+                                                              (line   6)
+* canonical system names:                Configuration Names. (line   6)
+* config.cache:                          Build Files Description.
+                                                              (line  28)
+* config.h:                              Build Files Description.
+                                                              (line  23)
+* config.h.in:                           Generated Developer Files.
+                                                              (line  45)
+* config.in:                             Generated Developer Files.
+                                                              (line  45)
+* config.status:                         Build Files Description.
+                                                              (line   9)
+* config.status --recheck:               FAQ.                 (line  40)
+* configuration names:                   Configuration Names. (line   6)
+* configuration triplets:                Configuration Names. (line   6)
+* configure:                             Generated Developer Files.
+                                                              (line  21)
+* configure build system:                Build and Host Options.
+                                                              (line   9)
+* configure host:                        Build and Host Options.
+                                                              (line  14)
+* configure target:                      Specifying the Target.
+                                                              (line  10)
+* configure.in:                          Written Developer Files.
+                                                              (line   9)
+* configure.in, writing:                 Write configure.in.  (line   6)
+* configuring a canadian cross:          Build and Host Options.
+                                                              (line   6)
+* cross compiler:                        Cross Compilation Concepts.
+                                                              (line   6)
+* cross compiler, building with:         Canadian Cross.      (line   6)
+* cross tools:                           Cross Compilation Tools.
+                                                              (line   6)
+* CY_GNU_GETTEXT in configure:           FAQ.                 (line  19)
+* cygnus configure:                      Cygnus Configure.    (line   6)
+* goals:                                 Goals.               (line   6)
+* history:                               History.             (line   6)
+* host names:                            Configuration Names. (line   6)
+* host option:                           Build and Host Options.
+                                                              (line  14)
+* host system:                           Host and Target.     (line   6)
+* host triplets:                         Configuration Names. (line   6)
+* HOST_CC:                               CCross in Make.      (line  27)
+* libg++ configure:                      Cygnus Configure in C++ Libraries.
+                                                              (line   6)
+* libio configure:                       Cygnus Configure in C++ Libraries.
+                                                              (line   6)
+* libstdc++ configure:                   Cygnus Configure in C++ Libraries.
+                                                              (line   6)
+* Makefile:                              Build Files Description.
+                                                              (line  18)
+* Makefile, garbage characters:          FAQ.                 (line  29)
+* Makefile.am:                           Written Developer Files.
+                                                              (line  18)
+* Makefile.am, writing:                  Write Makefile.am.   (line   6)
+* Makefile.in:                           Generated Developer Files.
+                                                              (line  26)
+* multilibs:                             Multilibs.           (line   6)
+* stamp-h:                               Build Files Description.
+                                                              (line  41)
+* stamp-h.in:                            Generated Developer Files.
+                                                              (line  54)
+* system names:                          Configuration Names. (line   6)
+* system types:                          Configuration Names. (line   6)
+* target option:                         Specifying the Target.
+                                                              (line  10)
+* target system:                         Host and Target.     (line   6)
+* triplets:                              Configuration Names. (line   6)
+* undefined macros:                      FAQ.                 (line  12)
+
+
+
+Tag Table:
+Node: Top996
+Node: Introduction1524
+Node: Goals2606
+Node: Tools3330
+Node: History4324
+Node: Building7322
+Node: Getting Started10585
+Node: Write configure.in11098
+Node: Write Makefile.am18349
+Node: Write acconfig.h21526
+Node: Generate files23063
+Node: Getting Started Example25029
+Node: Getting Started Example 125784
+Node: Getting Started Example 227705
+Node: Getting Started Example 330700
+Node: Generate Files in Example33064
+Node: Files34154
+Node: Developer Files34765
+Node: Developer Files Picture35145
+Node: Written Developer Files36433
+Node: Generated Developer Files38985
+Node: Build Files42129
+Node: Build Files Picture42790
+Node: Build Files Description43554
+Node: Support Files45560
+Node: Configuration Names48442
+Node: Configuration Name Definition48942
+Node: Using Configuration Names51265
+Node: Cross Compilation Tools53235
+Node: Cross Compilation Concepts53926
+Node: Host and Target54894
+Node: Using the Host Type56395
+Node: Specifying the Target57744
+Node: Using the Target Type58533
+Node: Cross Tools in the Cygnus Tree61964
+Node: Host and Target Libraries63021
+Node: Target Library Configure Scripts66770
+Node: Make Targets in Cygnus Tree69862
+Node: Target libiberty71210
+Node: Canadian Cross72597
+Node: Canadian Cross Example73438
+Node: Canadian Cross Concepts74557
+Node: Build Cross Host Tools76069
+Node: Build and Host Options77021
+Node: CCross not in Cygnus Tree78807
+Node: CCross in Cygnus Tree79785
+Node: Standard Cygnus CCross80206
+Node: Cross Cygnus CCross81570
+Node: Supporting Canadian Cross84370
+Node: CCross in Configure84985
+Node: CCross in Make88153
+Node: Cygnus Configure89756
+Node: Cygnus Configure Basics90591
+Node: Cygnus Configure in C++ Libraries95269
+Node: Multilibs96276
+Node: Multilibs in gcc97321
+Node: Multilibs in Target Libraries98399
+Node: FAQ102590
+Node: Index106690
+
+End Tag Table
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+This is doc/cpp.info, produced by makeinfo version 4.13 from
+../../../gcc-4.5.1/gcc/doc/cpp.texi.
+
+Copyright (C) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the section entitled "GNU Free Documentation
+License".
+
+   This manual contains no Invariant Sections.  The Front-Cover Texts
+are (a) (see below), and the Back-Cover Texts are (b) (see below).
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Cpp: (cpp).                  The GNU C preprocessor.
+END-INFO-DIR-ENTRY
+
+
+File: cpp.info,  Node: Top,  Next: Overview,  Up: (dir)
+
+The C Preprocessor
+******************
+
+The C preprocessor implements the macro language used to transform C,
+C++, and Objective-C programs before they are compiled.  It can also be
+useful on its own.
+
+* Menu:
+
+* Overview::
+* Header Files::
+* Macros::
+* Conditionals::
+* Diagnostics::
+* Line Control::
+* Pragmas::
+* Other Directives::
+* Preprocessor Output::
+* Traditional Mode::
+* Implementation Details::
+* Invocation::
+* Environment Variables::
+* GNU Free Documentation License::
+* Index of Directives::
+* Option Index::
+* Concept Index::
+
+ --- The Detailed Node Listing ---
+
+Overview
+
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+
+Header Files
+
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+
+Macros
+
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+
+Predefined Macros
+
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+
+Macro Pitfalls
+
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+
+Conditionals
+
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+
+Conditional Syntax
+
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+
+Implementation Details
+
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+
+Obsolete Features
+
+* Obsolete Features::
+
+   Copyright (C) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996, 1997,
+1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009,
+2010 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the section entitled "GNU Free Documentation
+License".
+
+   This manual contains no Invariant Sections.  The Front-Cover Texts
+are (a) (see below), and the Back-Cover Texts are (b) (see below).
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+File: cpp.info,  Node: Overview,  Next: Header Files,  Prev: Top,  Up: Top
+
+1 Overview
+**********
+
+The C preprocessor, often known as "cpp", is a "macro processor" that
+is used automatically by the C compiler to transform your program
+before compilation.  It is called a macro processor because it allows
+you to define "macros", which are brief abbreviations for longer
+constructs.
+
+   The C preprocessor is intended to be used only with C, C++, and
+Objective-C source code.  In the past, it has been abused as a general
+text processor.  It will choke on input which does not obey C's lexical
+rules.  For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors.  Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C-family languages.  If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+
+   Having said that, you can often get away with using cpp on things
+which are not C.  Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution.  `-traditional-cpp'
+mode preserves more white space, and is otherwise more permissive.  Many
+of the problems can be avoided by writing C or C++ style comments
+instead of native language comments, and keeping macros simple.
+
+   Wherever possible, you should use a preprocessor geared to the
+language you are writing in.  Modern versions of the GNU assembler have
+macro facilities.  Most high level programming languages have their own
+conditional compilation and inclusion mechanism.  If all else fails,
+try a true general text processor, such as GNU M4.
+
+   C preprocessors vary in some details.  This manual discusses the GNU
+C preprocessor, which provides a small superset of the features of ISO
+Standard C.  In its default mode, the GNU C preprocessor does not do a
+few things required by the standard.  These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them.  To get strict ISO Standard C,
+you should use the `-std=c90' or `-std=c99' options, depending on which
+version of the standard you want.  To get all the mandatory
+diagnostics, you must also use `-pedantic'.  *Note Invocation::.
+
+   This manual describes the behavior of the ISO preprocessor.  To
+minimize gratuitous differences, where the ISO preprocessor's behavior
+does not conflict with traditional semantics, the traditional
+preprocessor should behave the same way.  The various differences that
+do exist are detailed in the section *note Traditional Mode::.
+
+   For clarity, unless noted otherwise, references to `CPP' in this
+manual refer to GNU CPP.
+
+* Menu:
+
+* Character sets::
+* Initial processing::
+* Tokenization::
+* The preprocessing language::
+
+
+File: cpp.info,  Node: Character sets,  Next: Initial processing,  Up: Overview
+
+1.1 Character sets
+==================
+
+Source code character set processing in C and related languages is
+rather complicated.  The C standard discusses two character sets, but
+there are really at least four.
+
+   The files input to CPP might be in any character set at all.  CPP's
+very first action, before it even looks for line boundaries, is to
+convert the file into the character set it uses for internal
+processing.  That set is what the C standard calls the "source"
+character set.  It must be isomorphic with ISO 10646, also known as
+Unicode.  CPP uses the UTF-8 encoding of Unicode.
+
+   The character sets of the input files are specified using the
+`-finput-charset=' option.
+
+   All preprocessing work (the subject of the rest of this manual) is
+carried out in the source character set.  If you request textual output
+from the preprocessor with the `-E' option, it will be in UTF-8.
+
+   After preprocessing is complete, string and character constants are
+converted again, into the "execution" character set.  This character
+set is under control of the user; the default is UTF-8, matching the
+source character set.  Wide string and character constants have their
+own character set, which is not called out specifically in the
+standard.  Again, it is under control of the user.  The default is
+UTF-16 or UTF-32, whichever fits in the target's `wchar_t' type, in the
+target machine's byte order.(1)  Octal and hexadecimal escape sequences
+do not undergo conversion; '\x12' has the value 0x12 regardless of the
+currently selected execution character set.  All other escapes are
+replaced by the character in the source character set that they
+represent, then converted to the execution character set, just like
+unescaped characters.
+
+   Unless the experimental `-fextended-identifiers' option is used, GCC
+does not permit the use of characters outside the ASCII range, nor `\u'
+and `\U' escapes, in identifiers.  Even with that option, characters
+outside the ASCII range can only be specified with the `\u' and `\U'
+escapes, not used directly in identifiers.
+
+   ---------- Footnotes ----------
+
+   (1) UTF-16 does not meet the requirements of the C standard for a
+wide character set, but the choice of 16-bit `wchar_t' is enshrined in
+some system ABIs so we cannot fix this.
+
+
+File: cpp.info,  Node: Initial processing,  Next: Tokenization,  Prev: Character sets,  Up: Overview
+
+1.2 Initial processing
+======================
+
+The preprocessor performs a series of textual transformations on its
+input.  These happen before all other processing.  Conceptually, they
+happen in a rigid order, and the entire file is run through each
+transformation before the next one begins.  CPP actually does them all
+at once, for performance reasons.  These transformations correspond
+roughly to the first three "phases of translation" described in the C
+standard.
+
+  1. The input file is read into memory and broken into lines.
+
+     Different systems use different conventions to indicate the end of
+     a line.  GCC accepts the ASCII control sequences `LF', `CR LF' and
+     `CR' as end-of-line markers.  These are the canonical sequences
+     used by Unix, DOS and VMS, and the classic Mac OS (before OSX)
+     respectively.  You may therefore safely copy source code written
+     on any of those systems to a different one and use it without
+     conversion.  (GCC may lose track of the current line number if a
+     file doesn't consistently use one convention, as sometimes happens
+     when it is edited on computers with different conventions that
+     share a network file system.)
+
+     If the last line of any input file lacks an end-of-line marker,
+     the end of the file is considered to implicitly supply one.  The C
+     standard says that this condition provokes undefined behavior, so
+     GCC will emit a warning message.
+
+  2. If trigraphs are enabled, they are replaced by their corresponding
+     single characters.  By default GCC ignores trigraphs, but if you
+     request a strictly conforming mode with the `-std' option, or you
+     specify the `-trigraphs' option, then it converts them.
+
+     These are nine three-character sequences, all starting with `??',
+     that are defined by ISO C to stand for single characters.  They
+     permit obsolete systems that lack some of C's punctuation to use
+     C.  For example, `??/' stands for `\', so '??/n' is a character
+     constant for a newline.
+
+     Trigraphs are not popular and many compilers implement them
+     incorrectly.  Portable code should not rely on trigraphs being
+     either converted or ignored.  With `-Wtrigraphs' GCC will warn you
+     when a trigraph may change the meaning of your program if it were
+     converted.  *Note Wtrigraphs::.
+
+     In a string constant, you can prevent a sequence of question marks
+     from being confused with a trigraph by inserting a backslash
+     between the question marks, or by separating the string literal at
+     the trigraph and making use of string literal concatenation.
+     "(??\?)"  is the string `(???)', not `(?]'.  Traditional C
+     compilers do not recognize these idioms.
+
+     The nine trigraphs and their replacements are
+
+          Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+          Replacement:      [    ]    {    }    #    \    ^    |    ~
+
+  3. Continued lines are merged into one long line.
+
+     A continued line is a line which ends with a backslash, `\'.  The
+     backslash is removed and the following line is joined with the
+     current one.  No space is inserted, so you may split a line
+     anywhere, even in the middle of a word.  (It is generally more
+     readable to split lines only at white space.)
+
+     The trailing backslash on a continued line is commonly referred to
+     as a "backslash-newline".
+
+     If there is white space between a backslash and the end of a line,
+     that is still a continued line.  However, as this is usually the
+     result of an editing mistake, and many compilers will not accept
+     it as a continued line, GCC will warn you about it.
+
+  4. All comments are replaced with single spaces.
+
+     There are two kinds of comments.  "Block comments" begin with `/*'
+     and continue until the next `*/'.  Block comments do not nest:
+
+          /* this is /* one comment */ text outside comment
+
+     "Line comments" begin with `//' and continue to the end of the
+     current line.  Line comments do not nest either, but it does not
+     matter, because they would end in the same place anyway.
+
+          // this is // one comment
+          text outside comment
+
+   It is safe to put line comments inside block comments, or vice versa.
+
+     /* block comment
+        // contains line comment
+        yet more comment
+      */ outside comment
+
+     // line comment /* contains block comment */
+
+   But beware of commenting out one end of a block comment with a line
+comment.
+
+      // l.c.  /* block comment begins
+         oops! this isn't a comment anymore */
+
+   Comments are not recognized within string literals.  "/* blah */" is
+the string constant `/* blah */', not an empty string.
+
+   Line comments are not in the 1989 edition of the C standard, but they
+are recognized by GCC as an extension.  In C++ and in the 1999 edition
+of the C standard, they are an official part of the language.
+
+   Since these transformations happen before all other processing, you
+can split a line mechanically with backslash-newline anywhere.  You can
+comment out the end of a line.  You can continue a line comment onto the
+next line with backslash-newline.  You can even split `/*', `*/', and
+`//' onto multiple lines with backslash-newline.  For example:
+
+     /\
+     *
+     */ # /*
+     */ defi\
+     ne FO\
+     O 10\
+     20
+
+is equivalent to `#define FOO 1020'.  All these tricks are extremely
+confusing and should not be used in code intended to be readable.
+
+   There is no way to prevent a backslash at the end of a line from
+being interpreted as a backslash-newline.  This cannot affect any
+correct program, however.
+
+
+File: cpp.info,  Node: Tokenization,  Next: The preprocessing language,  Prev: Initial processing,  Up: Overview
+
+1.3 Tokenization
+================
+
+After the textual transformations are finished, the input file is
+converted into a sequence of "preprocessing tokens".  These mostly
+correspond to the syntactic tokens used by the C compiler, but there are
+a few differences.  White space separates tokens; it is not itself a
+token of any kind.  Tokens do not have to be separated by white space,
+but it is often necessary to avoid ambiguities.
+
+   When faced with a sequence of characters that has more than one
+possible tokenization, the preprocessor is greedy.  It always makes
+each token, starting from the left, as big as possible before moving on
+to the next token.  For instance, `a+++++b' is interpreted as
+`a ++ ++ + b', not as `a ++ + ++ b', even though the latter
+tokenization could be part of a valid C program and the former could
+not.
+
+   Once the input file is broken into tokens, the token boundaries never
+change, except when the `##' preprocessing operator is used to paste
+tokens together.  *Note Concatenation::.  For example,
+
+     #define foo() bar
+     foo()baz
+          ==> bar baz
+     _not_
+          ==> barbaz
+
+   The compiler does not re-tokenize the preprocessor's output.  Each
+preprocessing token becomes one compiler token.
+
+   Preprocessing tokens fall into five broad classes: identifiers,
+preprocessing numbers, string literals, punctuators, and other.  An
+"identifier" is the same as an identifier in C: any sequence of
+letters, digits, or underscores, which begins with a letter or
+underscore.  Keywords of C have no significance to the preprocessor;
+they are ordinary identifiers.  You can define a macro whose name is a
+keyword, for instance.  The only identifier which can be considered a
+preprocessing keyword is `defined'.  *Note Defined::.
+
+   This is mostly true of other languages which use the C preprocessor.
+However, a few of the keywords of C++ are significant even in the
+preprocessor.  *Note C++ Named Operators::.
+
+   In the 1999 C standard, identifiers may contain letters which are not
+part of the "basic source character set", at the implementation's
+discretion (such as accented Latin letters, Greek letters, or Chinese
+ideograms).  This may be done with an extended character set, or the
+`\u' and `\U' escape sequences.  The implementation of this feature in
+GCC is experimental; such characters are only accepted in the `\u' and
+`\U' forms and only if `-fextended-identifiers' is used.
+
+   As an extension, GCC treats `$' as a letter.  This is for
+compatibility with some systems, such as VMS, where `$' is commonly
+used in system-defined function and object names.  `$' is not a letter
+in strictly conforming mode, or if you specify the `-$' option.  *Note
+Invocation::.
+
+   A "preprocessing number" has a rather bizarre definition.  The
+category includes all the normal integer and floating point constants
+one expects of C, but also a number of other things one might not
+initially recognize as a number.  Formally, preprocessing numbers begin
+with an optional period, a required decimal digit, and then continue
+with any sequence of letters, digits, underscores, periods, and
+exponents.  Exponents are the two-character sequences `e+', `e-', `E+',
+`E-', `p+', `p-', `P+', and `P-'.  (The exponents that begin with `p'
+or `P' are new to C99.  They are used for hexadecimal floating-point
+constants.)
+
+   The purpose of this unusual definition is to isolate the preprocessor
+from the full complexity of numeric constants.  It does not have to
+distinguish between lexically valid and invalid floating-point numbers,
+which is complicated.  The definition also permits you to split an
+identifier at any position and get exactly two tokens, which can then be
+pasted back together with the `##' operator.
+
+   It's possible for preprocessing numbers to cause programs to be
+misinterpreted.  For example, `0xE+12' is a preprocessing number which
+does not translate to any valid numeric constant, therefore a syntax
+error.  It does not mean `0xE + 12', which is what you might have
+intended.
+
+   "String literals" are string constants, character constants, and
+header file names (the argument of `#include').(1)  String constants
+and character constants are straightforward: "..." or '...'.  In either
+case embedded quotes should be escaped with a backslash: '\'' is the
+character constant for `''.  There is no limit on the length of a
+character constant, but the value of a character constant that contains
+more than one character is implementation-defined.  *Note
+Implementation Details::.
+
+   Header file names either look like string constants, "...", or are
+written with angle brackets instead, <...>.  In either case, backslash
+is an ordinary character.  There is no way to escape the closing quote
+or angle bracket.  The preprocessor looks for the header file in
+different places depending on which form you use.  *Note Include
+Operation::.
+
+   No string literal may extend past the end of a line.  Older versions
+of GCC accepted multi-line string constants.  You may use continued
+lines instead, or string constant concatenation.  *Note Differences
+from previous versions::.
+
+   "Punctuators" are all the usual bits of punctuation which are
+meaningful to C and C++.  All but three of the punctuation characters in
+ASCII are C punctuators.  The exceptions are `@', `$', and ``'.  In
+addition, all the two- and three-character operators are punctuators.
+There are also six "digraphs", which the C++ standard calls
+"alternative tokens", which are merely alternate ways to spell other
+punctuators.  This is a second attempt to work around missing
+punctuation in obsolete systems.  It has no negative side effects,
+unlike trigraphs, but does not cover as much ground.  The digraphs and
+their corresponding normal punctuators are:
+
+     Digraph:        <%  %>  <:  :>  %:  %:%:
+     Punctuator:      {   }   [   ]   #    ##
+
+   Any other single character is considered "other".  It is passed on to
+the preprocessor's output unmolested.  The C compiler will almost
+certainly reject source code containing "other" tokens.  In ASCII, the
+only other characters are `@', `$', ``', and control characters other
+than NUL (all bits zero).  (Note that `$' is normally considered a
+letter.)  All characters with the high bit set (numeric range
+0x7F-0xFF) are also "other" in the present implementation.  This will
+change when proper support for international character sets is added to
+GCC.
+
+   NUL is a special case because of the high probability that its
+appearance is accidental, and because it may be invisible to the user
+(many terminals do not display NUL at all).  Within comments, NULs are
+silently ignored, just as any other character would be.  In running
+text, NUL is considered white space.  For example, these two directives
+have the same meaning.
+
+     #define X^@1
+     #define X 1
+
+(where `^@' is ASCII NUL).  Within string or character constants, NULs
+are preserved.  In the latter two cases the preprocessor emits a
+warning message.
+
+   ---------- Footnotes ----------
+
+   (1) The C standard uses the term "string literal" to refer only to
+what we are calling "string constants".
+
+
+File: cpp.info,  Node: The preprocessing language,  Prev: Tokenization,  Up: Overview
+
+1.4 The preprocessing language
+==============================
+
+After tokenization, the stream of tokens may simply be passed straight
+to the compiler's parser.  However, if it contains any operations in the
+"preprocessing language", it will be transformed first.  This stage
+corresponds roughly to the standard's "translation phase 4" and is what
+most people think of as the preprocessor's job.
+
+   The preprocessing language consists of "directives" to be executed
+and "macros" to be expanded.  Its primary capabilities are:
+
+   * Inclusion of header files.  These are files of declarations that
+     can be substituted into your program.
+
+   * Macro expansion.  You can define "macros", which are abbreviations
+     for arbitrary fragments of C code.  The preprocessor will replace
+     the macros with their definitions throughout the program.  Some
+     macros are automatically defined for you.
+
+   * Conditional compilation.  You can include or exclude parts of the
+     program according to various conditions.
+
+   * Line control.  If you use a program to combine or rearrange source
+     files into an intermediate file which is then compiled, you can
+     use line control to inform the compiler where each source line
+     originally came from.
+
+   * Diagnostics.  You can detect problems at compile time and issue
+     errors or warnings.
+
+   There are a few more, less useful, features.
+
+   Except for expansion of predefined macros, all these operations are
+triggered with "preprocessing directives".  Preprocessing directives
+are lines in your program that start with `#'.  Whitespace is allowed
+before and after the `#'.  The `#' is followed by an identifier, the
+"directive name".  It specifies the operation to perform.  Directives
+are commonly referred to as `#NAME' where NAME is the directive name.
+For example, `#define' is the directive that defines a macro.
+
+   The `#' which begins a directive cannot come from a macro expansion.
+Also, the directive name is not macro expanded.  Thus, if `foo' is
+defined as a macro expanding to `define', that does not make `#foo' a
+valid preprocessing directive.
+
+   The set of valid directive names is fixed.  Programs cannot define
+new preprocessing directives.
+
+   Some directives require arguments; these make up the rest of the
+directive line and must be separated from the directive name by
+whitespace.  For example, `#define' must be followed by a macro name
+and the intended expansion of the macro.
+
+   A preprocessing directive cannot cover more than one line.  The line
+may, however, be continued with backslash-newline, or by a block comment
+which extends past the end of the line.  In either case, when the
+directive is processed, the continuations have already been merged with
+the first line to make one long line.
+
+
+File: cpp.info,  Node: Header Files,  Next: Macros,  Prev: Overview,  Up: Top
+
+2 Header Files
+**************
+
+A header file is a file containing C declarations and macro definitions
+(*note Macros::) to be shared between several source files.  You request
+the use of a header file in your program by "including" it, with the C
+preprocessing directive `#include'.
+
+   Header files serve two purposes.
+
+   * System header files declare the interfaces to parts of the
+     operating system.  You include them in your program to supply the
+     definitions and declarations you need to invoke system calls and
+     libraries.
+
+   * Your own header files contain declarations for interfaces between
+     the source files of your program.  Each time you have a group of
+     related declarations and macro definitions all or most of which
+     are needed in several different source files, it is a good idea to
+     create a header file for them.
+
+   Including a header file produces the same results as copying the
+header file into each source file that needs it.  Such copying would be
+time-consuming and error-prone.  With a header file, the related
+declarations appear in only one place.  If they need to be changed, they
+can be changed in one place, and programs that include the header file
+will automatically use the new version when next recompiled.  The header
+file eliminates the labor of finding and changing all the copies as well
+as the risk that a failure to find one copy will result in
+inconsistencies within a program.
+
+   In C, the usual convention is to give header files names that end
+with `.h'.  It is most portable to use only letters, digits, dashes, and
+underscores in header file names, and at most one dot.
+
+* Menu:
+
+* Include Syntax::
+* Include Operation::
+* Search Path::
+* Once-Only Headers::
+* Alternatives to Wrapper #ifndef::
+* Computed Includes::
+* Wrapper Headers::
+* System Headers::
+
+
+File: cpp.info,  Node: Include Syntax,  Next: Include Operation,  Up: Header Files
+
+2.1 Include Syntax
+==================
+
+Both user and system header files are included using the preprocessing
+directive `#include'.  It has two variants:
+
+`#include <FILE>'
+     This variant is used for system header files.  It searches for a
+     file named FILE in a standard list of system directories.  You can
+     prepend directories to this list with the `-I' option (*note
+     Invocation::).
+
+`#include "FILE"'
+     This variant is used for header files of your own program.  It
+     searches for a file named FILE first in the directory containing
+     the current file, then in the quote directories and then the same
+     directories used for `<FILE>'.  You can prepend directories to the
+     list of quote directories with the `-iquote' option.
+
+   The argument of `#include', whether delimited with quote marks or
+angle brackets, behaves like a string constant in that comments are not
+recognized, and macro names are not expanded.  Thus, `#include <x/*y>'
+specifies inclusion of a system header file named `x/*y'.
+
+   However, if backslashes occur within FILE, they are considered
+ordinary text characters, not escape characters.  None of the character
+escape sequences appropriate to string constants in C are processed.
+Thus, `#include "x\n\\y"' specifies a filename containing three
+backslashes.  (Some systems interpret `\' as a pathname separator.  All
+of these also interpret `/' the same way.  It is most portable to use
+only `/'.)
+
+   It is an error if there is anything (other than comments) on the line
+after the file name.
+
+
+File: cpp.info,  Node: Include Operation,  Next: Search Path,  Prev: Include Syntax,  Up: Header Files
+
+2.2 Include Operation
+=====================
+
+The `#include' directive works by directing the C preprocessor to scan
+the specified file as input before continuing with the rest of the
+current file.  The output from the preprocessor contains the output
+already generated, followed by the output resulting from the included
+file, followed by the output that comes from the text after the
+`#include' directive.  For example, if you have a header file
+`header.h' as follows,
+
+     char *test (void);
+
+and a main program called `program.c' that uses the header file, like
+this,
+
+     int x;
+     #include "header.h"
+
+     int
+     main (void)
+     {
+       puts (test ());
+     }
+
+the compiler will see the same token stream as it would if `program.c'
+read
+
+     int x;
+     char *test (void);
+
+     int
+     main (void)
+     {
+       puts (test ());
+     }
+
+   Included files are not limited to declarations and macro definitions;
+those are merely the typical uses.  Any fragment of a C program can be
+included from another file.  The include file could even contain the
+beginning of a statement that is concluded in the containing file, or
+the end of a statement that was started in the including file.  However,
+an included file must consist of complete tokens.  Comments and string
+literals which have not been closed by the end of an included file are
+invalid.  For error recovery, they are considered to end at the end of
+the file.
+
+   To avoid confusion, it is best if header files contain only complete
+syntactic units--function declarations or definitions, type
+declarations, etc.
+
+   The line following the `#include' directive is always treated as a
+separate line by the C preprocessor, even if the included file lacks a
+final newline.
+
+
+File: cpp.info,  Node: Search Path,  Next: Once-Only Headers,  Prev: Include Operation,  Up: Header Files
+
+2.3 Search Path
+===============
+
+GCC looks in several different places for headers.  On a normal Unix
+system, if you do not instruct it otherwise, it will look for headers
+requested with `#include <FILE>' in:
+
+     /usr/local/include
+     LIBDIR/gcc/TARGET/VERSION/include
+     /usr/TARGET/include
+     /usr/include
+
+   For C++ programs, it will also look in `/usr/include/g++-v3', first.
+In the above, TARGET is the canonical name of the system GCC was
+configured to compile code for; often but not always the same as the
+canonical name of the system it runs on.  VERSION is the version of GCC
+in use.
+
+   You can add to this list with the `-IDIR' command line option.  All
+the directories named by `-I' are searched, in left-to-right order,
+_before_ the default directories.  The only exception is when `dir' is
+already searched by default.  In this case, the option is ignored and
+the search order for system directories remains unchanged.
+
+   Duplicate directories are removed from the quote and bracket search
+chains before the two chains are merged to make the final search chain.
+Thus, it is possible for a directory to occur twice in the final search
+chain if it was specified in both the quote and bracket chains.
+
+   You can prevent GCC from searching any of the default directories
+with the `-nostdinc' option.  This is useful when you are compiling an
+operating system kernel or some other program that does not use the
+standard C library facilities, or the standard C library itself.  `-I'
+options are not ignored as described above when `-nostdinc' is in
+effect.
+
+   GCC looks for headers requested with `#include "FILE"' first in the
+directory containing the current file, then in the directories as
+specified by `-iquote' options, then in the same places it would have
+looked for a header requested with angle brackets.  For example, if
+`/usr/include/sys/stat.h' contains `#include "types.h"', GCC looks for
+`types.h' first in `/usr/include/sys', then in its usual search path.
+
+   `#line' (*note Line Control::) does not change GCC's idea of the
+directory containing the current file.
+
+   You may put `-I-' at any point in your list of `-I' options.  This
+has two effects.  First, directories appearing before the `-I-' in the
+list are searched only for headers requested with quote marks.
+Directories after `-I-' are searched for all headers.  Second, the
+directory containing the current file is not searched for anything,
+unless it happens to be one of the directories named by an `-I' switch.
+`-I-' is deprecated, `-iquote' should be used instead.
+
+   `-I. -I-' is not the same as no `-I' options at all, and does not
+cause the same behavior for `<>' includes that `""' includes get with
+no special options.  `-I.' searches the compiler's current working
+directory for header files.  That may or may not be the same as the
+directory containing the current file.
+
+   If you need to look for headers in a directory named `-', write
+`-I./-'.
+
+   There are several more ways to adjust the header search path.  They
+are generally less useful.  *Note Invocation::.
+
+
+File: cpp.info,  Node: Once-Only Headers,  Next: Alternatives to Wrapper #ifndef,  Prev: Search Path,  Up: Header Files
+
+2.4 Once-Only Headers
+=====================
+
+If a header file happens to be included twice, the compiler will process
+its contents twice.  This is very likely to cause an error, e.g. when
+the compiler sees the same structure definition twice.  Even if it does
+not, it will certainly waste time.
+
+   The standard way to prevent this is to enclose the entire real
+contents of the file in a conditional, like this:
+
+     /* File foo.  */
+     #ifndef FILE_FOO_SEEN
+     #define FILE_FOO_SEEN
+
+     THE ENTIRE FILE
+
+     #endif /* !FILE_FOO_SEEN */
+
+   This construct is commonly known as a "wrapper #ifndef".  When the
+header is included again, the conditional will be false, because
+`FILE_FOO_SEEN' is defined.  The preprocessor will skip over the entire
+contents of the file, and the compiler will not see it twice.
+
+   CPP optimizes even further.  It remembers when a header file has a
+wrapper `#ifndef'.  If a subsequent `#include' specifies that header,
+and the macro in the `#ifndef' is still defined, it does not bother to
+rescan the file at all.
+
+   You can put comments outside the wrapper.  They will not interfere
+with this optimization.
+
+   The macro `FILE_FOO_SEEN' is called the "controlling macro" or
+"guard macro".  In a user header file, the macro name should not begin
+with `_'.  In a system header file, it should begin with `__' to avoid
+conflicts with user programs.  In any kind of header file, the macro
+name should contain the name of the file and some additional text, to
+avoid conflicts with other header files.
+
+
+File: cpp.info,  Node: Alternatives to Wrapper #ifndef,  Next: Computed Includes,  Prev: Once-Only Headers,  Up: Header Files
+
+2.5 Alternatives to Wrapper #ifndef
+===================================
+
+CPP supports two more ways of indicating that a header file should be
+read only once.  Neither one is as portable as a wrapper `#ifndef' and
+we recommend you do not use them in new programs, with the caveat that
+`#import' is standard practice in Objective-C.
+
+   CPP supports a variant of `#include' called `#import' which includes
+a file, but does so at most once.  If you use `#import' instead of
+`#include', then you don't need the conditionals inside the header file
+to prevent multiple inclusion of the contents.  `#import' is standard
+in Objective-C, but is considered a deprecated extension in C and C++.
+
+   `#import' is not a well designed feature.  It requires the users of
+a header file to know that it should only be included once.  It is much
+better for the header file's implementor to write the file so that users
+don't need to know this.  Using a wrapper `#ifndef' accomplishes this
+goal.
+
+   In the present implementation, a single use of `#import' will
+prevent the file from ever being read again, by either `#import' or
+`#include'.  You should not rely on this; do not use both `#import' and
+`#include' to refer to the same header file.
+
+   Another way to prevent a header file from being included more than
+once is with the `#pragma once' directive.  If `#pragma once' is seen
+when scanning a header file, that file will never be read again, no
+matter what.
+
+   `#pragma once' does not have the problems that `#import' does, but
+it is not recognized by all preprocessors, so you cannot rely on it in
+a portable program.
+
+
+File: cpp.info,  Node: Computed Includes,  Next: Wrapper Headers,  Prev: Alternatives to Wrapper #ifndef,  Up: Header Files
+
+2.6 Computed Includes
+=====================
+
+Sometimes it is necessary to select one of several different header
+files to be included into your program.  They might specify
+configuration parameters to be used on different sorts of operating
+systems, for instance.  You could do this with a series of conditionals,
+
+     #if SYSTEM_1
+     # include "system_1.h"
+     #elif SYSTEM_2
+     # include "system_2.h"
+     #elif SYSTEM_3
+     ...
+     #endif
+
+   That rapidly becomes tedious.  Instead, the preprocessor offers the
+ability to use a macro for the header name.  This is called a "computed
+include".  Instead of writing a header name as the direct argument of
+`#include', you simply put a macro name there instead:
+
+     #define SYSTEM_H "system_1.h"
+     ...
+     #include SYSTEM_H
+
+`SYSTEM_H' will be expanded, and the preprocessor will look for
+`system_1.h' as if the `#include' had been written that way originally.
+`SYSTEM_H' could be defined by your Makefile with a `-D' option.
+
+   You must be careful when you define the macro.  `#define' saves
+tokens, not text.  The preprocessor has no way of knowing that the macro
+will be used as the argument of `#include', so it generates ordinary
+tokens, not a header name.  This is unlikely to cause problems if you
+use double-quote includes, which are close enough to string constants.
+If you use angle brackets, however, you may have trouble.
+
+   The syntax of a computed include is actually a bit more general than
+the above.  If the first non-whitespace character after `#include' is
+not `"' or `<', then the entire line is macro-expanded like running
+text would be.
+
+   If the line expands to a single string constant, the contents of that
+string constant are the file to be included.  CPP does not re-examine
+the string for embedded quotes, but neither does it process backslash
+escapes in the string.  Therefore
+
+     #define HEADER "a\"b"
+     #include HEADER
+
+looks for a file named `a\"b'.  CPP searches for the file according to
+the rules for double-quoted includes.
+
+   If the line expands to a token stream beginning with a `<' token and
+including a `>' token, then the tokens between the `<' and the first
+`>' are combined to form the filename to be included.  Any whitespace
+between tokens is reduced to a single space; then any space after the
+initial `<' is retained, but a trailing space before the closing `>' is
+ignored.  CPP searches for the file according to the rules for
+angle-bracket includes.
+
+   In either case, if there are any tokens on the line after the file
+name, an error occurs and the directive is not processed.  It is also
+an error if the result of expansion does not match either of the two
+expected forms.
+
+   These rules are implementation-defined behavior according to the C
+standard.  To minimize the risk of different compilers interpreting your
+computed includes differently, we recommend you use only a single
+object-like macro which expands to a string constant.  This will also
+minimize confusion for people reading your program.
+
+
+File: cpp.info,  Node: Wrapper Headers,  Next: System Headers,  Prev: Computed Includes,  Up: Header Files
+
+2.7 Wrapper Headers
+===================
+
+Sometimes it is necessary to adjust the contents of a system-provided
+header file without editing it directly.  GCC's `fixincludes' operation
+does this, for example.  One way to do that would be to create a new
+header file with the same name and insert it in the search path before
+the original header.  That works fine as long as you're willing to
+replace the old header entirely.  But what if you want to refer to the
+old header from the new one?
+
+   You cannot simply include the old header with `#include'.  That will
+start from the beginning, and find your new header again.  If your
+header is not protected from multiple inclusion (*note Once-Only
+Headers::), it will recurse infinitely and cause a fatal error.
+
+   You could include the old header with an absolute pathname:
+     #include "/usr/include/old-header.h"
+   This works, but is not clean; should the system headers ever move,
+you would have to edit the new headers to match.
+
+   There is no way to solve this problem within the C standard, but you
+can use the GNU extension `#include_next'.  It means, "Include the
+_next_ file with this name".  This directive works like `#include'
+except in searching for the specified file: it starts searching the
+list of header file directories _after_ the directory in which the
+current file was found.
+
+   Suppose you specify `-I /usr/local/include', and the list of
+directories to search also includes `/usr/include'; and suppose both
+directories contain `signal.h'.  Ordinary `#include <signal.h>' finds
+the file under `/usr/local/include'.  If that file contains
+`#include_next <signal.h>', it starts searching after that directory,
+and finds the file in `/usr/include'.
+
+   `#include_next' does not distinguish between `<FILE>' and `"FILE"'
+inclusion, nor does it check that the file you specify has the same
+name as the current file.  It simply looks for the file named, starting
+with the directory in the search path after the one where the current
+file was found.
+
+   The use of `#include_next' can lead to great confusion.  We
+recommend it be used only when there is no other alternative.  In
+particular, it should not be used in the headers belonging to a specific
+program; it should be used only to make global corrections along the
+lines of `fixincludes'.
+
+
+File: cpp.info,  Node: System Headers,  Prev: Wrapper Headers,  Up: Header Files
+
+2.8 System Headers
+==================
+
+The header files declaring interfaces to the operating system and
+runtime libraries often cannot be written in strictly conforming C.
+Therefore, GCC gives code found in "system headers" special treatment.
+All warnings, other than those generated by `#warning' (*note
+Diagnostics::), are suppressed while GCC is processing a system header.
+Macros defined in a system header are immune to a few warnings wherever
+they are expanded.  This immunity is granted on an ad-hoc basis, when
+we find that a warning generates lots of false positives because of
+code in macros defined in system headers.
+
+   Normally, only the headers found in specific directories are
+considered system headers.  These directories are determined when GCC
+is compiled.  There are, however, two ways to make normal headers into
+system headers.
+
+   The `-isystem' command line option adds its argument to the list of
+directories to search for headers, just like `-I'.  Any headers found
+in that directory will be considered system headers.
+
+   All directories named by `-isystem' are searched _after_ all
+directories named by `-I', no matter what their order was on the
+command line.  If the same directory is named by both `-I' and
+`-isystem', the `-I' option is ignored.  GCC provides an informative
+message when this occurs if `-v' is used.
+
+   There is also a directive, `#pragma GCC system_header', which tells
+GCC to consider the rest of the current include file a system header,
+no matter where it was found.  Code that comes before the `#pragma' in
+the file will not be affected.  `#pragma GCC system_header' has no
+effect in the primary source file.
+
+   On very old systems, some of the pre-defined system header
+directories get even more special treatment.  GNU C++ considers code in
+headers found in those directories to be surrounded by an `extern "C"'
+block.  There is no way to request this behavior with a `#pragma', or
+from the command line.
+
+
+File: cpp.info,  Node: Macros,  Next: Conditionals,  Prev: Header Files,  Up: Top
+
+3 Macros
+********
+
+A "macro" is a fragment of code which has been given a name.  Whenever
+the name is used, it is replaced by the contents of the macro.  There
+are two kinds of macros.  They differ mostly in what they look like
+when they are used.  "Object-like" macros resemble data objects when
+used, "function-like" macros resemble function calls.
+
+   You may define any valid identifier as a macro, even if it is a C
+keyword.  The preprocessor does not know anything about keywords.  This
+can be useful if you wish to hide a keyword such as `const' from an
+older compiler that does not understand it.  However, the preprocessor
+operator `defined' (*note Defined::) can never be defined as a macro,
+and C++'s named operators (*note C++ Named Operators::) cannot be
+macros when you are compiling C++.
+
+* Menu:
+
+* Object-like Macros::
+* Function-like Macros::
+* Macro Arguments::
+* Stringification::
+* Concatenation::
+* Variadic Macros::
+* Predefined Macros::
+* Undefining and Redefining Macros::
+* Directives Within Macro Arguments::
+* Macro Pitfalls::
+
+
+File: cpp.info,  Node: Object-like Macros,  Next: Function-like Macros,  Up: Macros
+
+3.1 Object-like Macros
+======================
+
+An "object-like macro" is a simple identifier which will be replaced by
+a code fragment.  It is called object-like because it looks like a data
+object in code that uses it.  They are most commonly used to give
+symbolic names to numeric constants.
+
+   You create macros with the `#define' directive.  `#define' is
+followed by the name of the macro and then the token sequence it should
+be an abbreviation for, which is variously referred to as the macro's
+"body", "expansion" or "replacement list".  For example,
+
+     #define BUFFER_SIZE 1024
+
+defines a macro named `BUFFER_SIZE' as an abbreviation for the token
+`1024'.  If somewhere after this `#define' directive there comes a C
+statement of the form
+
+     foo = (char *) malloc (BUFFER_SIZE);
+
+then the C preprocessor will recognize and "expand" the macro
+`BUFFER_SIZE'.  The C compiler will see the same tokens as it would if
+you had written
+
+     foo = (char *) malloc (1024);
+
+   By convention, macro names are written in uppercase.  Programs are
+easier to read when it is possible to tell at a glance which names are
+macros.
+
+   The macro's body ends at the end of the `#define' line.  You may
+continue the definition onto multiple lines, if necessary, using
+backslash-newline.  When the macro is expanded, however, it will all
+come out on one line.  For example,
+
+     #define NUMBERS 1, \
+                     2, \
+                     3
+     int x[] = { NUMBERS };
+          ==> int x[] = { 1, 2, 3 };
+
+The most common visible consequence of this is surprising line numbers
+in error messages.
+
+   There is no restriction on what can go in a macro body provided it
+decomposes into valid preprocessing tokens.  Parentheses need not
+balance, and the body need not resemble valid C code.  (If it does not,
+you may get error messages from the C compiler when you use the macro.)
+
+   The C preprocessor scans your program sequentially.  Macro
+definitions take effect at the place you write them.  Therefore, the
+following input to the C preprocessor
+
+     foo = X;
+     #define X 4
+     bar = X;
+
+produces
+
+     foo = X;
+     bar = 4;
+
+   When the preprocessor expands a macro name, the macro's expansion
+replaces the macro invocation, then the expansion is examined for more
+macros to expand.  For example,
+
+     #define TABLESIZE BUFSIZE
+     #define BUFSIZE 1024
+     TABLESIZE
+          ==> BUFSIZE
+          ==> 1024
+
+`TABLESIZE' is expanded first to produce `BUFSIZE', then that macro is
+expanded to produce the final result, `1024'.
+
+   Notice that `BUFSIZE' was not defined when `TABLESIZE' was defined.
+The `#define' for `TABLESIZE' uses exactly the expansion you
+specify--in this case, `BUFSIZE'--and does not check to see whether it
+too contains macro names.  Only when you _use_ `TABLESIZE' is the
+result of its expansion scanned for more macro names.
+
+   This makes a difference if you change the definition of `BUFSIZE' at
+some point in the source file.  `TABLESIZE', defined as shown, will
+always expand using the definition of `BUFSIZE' that is currently in
+effect:
+
+     #define BUFSIZE 1020
+     #define TABLESIZE BUFSIZE
+     #undef BUFSIZE
+     #define BUFSIZE 37
+
+Now `TABLESIZE' expands (in two stages) to `37'.
+
+   If the expansion of a macro contains its own name, either directly or
+via intermediate macros, it is not expanded again when the expansion is
+examined for more macros.  This prevents infinite recursion.  *Note
+Self-Referential Macros::, for the precise details.
+
+
+File: cpp.info,  Node: Function-like Macros,  Next: Macro Arguments,  Prev: Object-like Macros,  Up: Macros
+
+3.2 Function-like Macros
+========================
+
+You can also define macros whose use looks like a function call.  These
+are called "function-like macros".  To define a function-like macro,
+you use the same `#define' directive, but you put a pair of parentheses
+immediately after the macro name.  For example,
+
+     #define lang_init()  c_init()
+     lang_init()
+          ==> c_init()
+
+   A function-like macro is only expanded if its name appears with a
+pair of parentheses after it.  If you write just the name, it is left
+alone.  This can be useful when you have a function and a macro of the
+same name, and you wish to use the function sometimes.
+
+     extern void foo(void);
+     #define foo() /* optimized inline version */
+     ...
+       foo();
+       funcptr = foo;
+
+   Here the call to `foo()' will use the macro, but the function
+pointer will get the address of the real function.  If the macro were to
+be expanded, it would cause a syntax error.
+
+   If you put spaces between the macro name and the parentheses in the
+macro definition, that does not define a function-like macro, it defines
+an object-like macro whose expansion happens to begin with a pair of
+parentheses.
+
+     #define lang_init ()    c_init()
+     lang_init()
+          ==> () c_init()()
+
+   The first two pairs of parentheses in this expansion come from the
+macro.  The third is the pair that was originally after the macro
+invocation.  Since `lang_init' is an object-like macro, it does not
+consume those parentheses.
+
+
+File: cpp.info,  Node: Macro Arguments,  Next: Stringification,  Prev: Function-like Macros,  Up: Macros
+
+3.3 Macro Arguments
+===================
+
+Function-like macros can take "arguments", just like true functions.
+To define a macro that uses arguments, you insert "parameters" between
+the pair of parentheses in the macro definition that make the macro
+function-like.  The parameters must be valid C identifiers, separated
+by commas and optionally whitespace.
+
+   To invoke a macro that takes arguments, you write the name of the
+macro followed by a list of "actual arguments" in parentheses, separated
+by commas.  The invocation of the macro need not be restricted to a
+single logical line--it can cross as many lines in the source file as
+you wish.  The number of arguments you give must match the number of
+parameters in the macro definition.  When the macro is expanded, each
+use of a parameter in its body is replaced by the tokens of the
+corresponding argument.  (You need not use all of the parameters in the
+macro body.)
+
+   As an example, here is a macro that computes the minimum of two
+numeric values, as it is defined in many C programs, and some uses.
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+       x = min(a, b);          ==>  x = ((a) < (b) ? (a) : (b));
+       y = min(1, 2);          ==>  y = ((1) < (2) ? (1) : (2));
+       z = min(a + 28, *p);    ==>  z = ((a + 28) < (*p) ? (a + 28) : (*p));
+
+(In this small example you can already see several of the dangers of
+macro arguments.  *Note Macro Pitfalls::, for detailed explanations.)
+
+   Leading and trailing whitespace in each argument is dropped, and all
+whitespace between the tokens of an argument is reduced to a single
+space.  Parentheses within each argument must balance; a comma within
+such parentheses does not end the argument.  However, there is no
+requirement for square brackets or braces to balance, and they do not
+prevent a comma from separating arguments.  Thus,
+
+     macro (array[x = y, x + 1])
+
+passes two arguments to `macro': `array[x = y' and `x + 1]'.  If you
+want to supply `array[x = y, x + 1]' as an argument, you can write it
+as `array[(x = y, x + 1)]', which is equivalent C code.
+
+   All arguments to a macro are completely macro-expanded before they
+are substituted into the macro body.  After substitution, the complete
+text is scanned again for macros to expand, including the arguments.
+This rule may seem strange, but it is carefully designed so you need
+not worry about whether any function call is actually a macro
+invocation.  You can run into trouble if you try to be too clever,
+though.  *Note Argument Prescan::, for detailed discussion.
+
+   For example, `min (min (a, b), c)' is first expanded to
+
+       min (((a) < (b) ? (a) : (b)), (c))
+
+and then to
+
+     ((((a) < (b) ? (a) : (b))) < (c)
+      ? (((a) < (b) ? (a) : (b)))
+      : (c))
+
+(Line breaks shown here for clarity would not actually be generated.)
+
+   You can leave macro arguments empty; this is not an error to the
+preprocessor (but many macros will then expand to invalid code).  You
+cannot leave out arguments entirely; if a macro takes two arguments,
+there must be exactly one comma at the top level of its argument list.
+Here are some silly examples using `min':
+
+     min(, b)        ==> ((   ) < (b) ? (   ) : (b))
+     min(a, )        ==> ((a  ) < ( ) ? (a  ) : ( ))
+     min(,)          ==> ((   ) < ( ) ? (   ) : ( ))
+     min((,),)       ==> (((,)) < ( ) ? ((,)) : ( ))
+
+     min()      error--> macro "min" requires 2 arguments, but only 1 given
+     min(,,)    error--> macro "min" passed 3 arguments, but takes just 2
+
+   Whitespace is not a preprocessing token, so if a macro `foo' takes
+one argument, `foo ()' and `foo ( )' both supply it an empty argument.
+Previous GNU preprocessor implementations and documentation were
+incorrect on this point, insisting that a function-like macro that
+takes a single argument be passed a space if an empty argument was
+required.
+
+   Macro parameters appearing inside string literals are not replaced by
+their corresponding actual arguments.
+
+     #define foo(x) x, "x"
+     foo(bar)        ==> bar, "x"
+
+
+File: cpp.info,  Node: Stringification,  Next: Concatenation,  Prev: Macro Arguments,  Up: Macros
+
+3.4 Stringification
+===================
+
+Sometimes you may want to convert a macro argument into a string
+constant.  Parameters are not replaced inside string constants, but you
+can use the `#' preprocessing operator instead.  When a macro parameter
+is used with a leading `#', the preprocessor replaces it with the
+literal text of the actual argument, converted to a string constant.
+Unlike normal parameter replacement, the argument is not macro-expanded
+first.  This is called "stringification".
+
+   There is no way to combine an argument with surrounding text and
+stringify it all together.  Instead, you can write a series of adjacent
+string constants and stringified arguments.  The preprocessor will
+replace the stringified arguments with string constants.  The C
+compiler will then combine all the adjacent string constants into one
+long string.
+
+   Here is an example of a macro definition that uses stringification:
+
+     #define WARN_IF(EXP) \
+     do { if (EXP) \
+             fprintf (stderr, "Warning: " #EXP "\n"); } \
+     while (0)
+     WARN_IF (x == 0);
+          ==> do { if (x == 0)
+                fprintf (stderr, "Warning: " "x == 0" "\n"); } while (0);
+
+The argument for `EXP' is substituted once, as-is, into the `if'
+statement, and once, stringified, into the argument to `fprintf'.  If
+`x' were a macro, it would be expanded in the `if' statement, but not
+in the string.
+
+   The `do' and `while (0)' are a kludge to make it possible to write
+`WARN_IF (ARG);', which the resemblance of `WARN_IF' to a function
+would make C programmers want to do; see *note Swallowing the
+Semicolon::.
+
+   Stringification in C involves more than putting double-quote
+characters around the fragment.  The preprocessor backslash-escapes the
+quotes surrounding embedded string constants, and all backslashes
+within string and character constants, in order to get a valid C string
+constant with the proper contents.  Thus, stringifying `p = "foo\n";'
+results in "p = \"foo\\n\";".  However, backslashes that are not inside
+string or character constants are not duplicated: `\n' by itself
+stringifies to "\n".
+
+   All leading and trailing whitespace in text being stringified is
+ignored.  Any sequence of whitespace in the middle of the text is
+converted to a single space in the stringified result.  Comments are
+replaced by whitespace long before stringification happens, so they
+never appear in stringified text.
+
+   There is no way to convert a macro argument into a character
+constant.
+
+   If you want to stringify the result of expansion of a macro argument,
+you have to use two levels of macros.
+
+     #define xstr(s) str(s)
+     #define str(s) #s
+     #define foo 4
+     str (foo)
+          ==> "foo"
+     xstr (foo)
+          ==> xstr (4)
+          ==> str (4)
+          ==> "4"
+
+   `s' is stringified when it is used in `str', so it is not
+macro-expanded first.  But `s' is an ordinary argument to `xstr', so it
+is completely macro-expanded before `xstr' itself is expanded (*note
+Argument Prescan::).  Therefore, by the time `str' gets to its
+argument, it has already been macro-expanded.
+
+
+File: cpp.info,  Node: Concatenation,  Next: Variadic Macros,  Prev: Stringification,  Up: Macros
+
+3.5 Concatenation
+=================
+
+It is often useful to merge two tokens into one while expanding macros.
+This is called "token pasting" or "token concatenation".  The `##'
+preprocessing operator performs token pasting.  When a macro is
+expanded, the two tokens on either side of each `##' operator are
+combined into a single token, which then replaces the `##' and the two
+original tokens in the macro expansion.  Usually both will be
+identifiers, or one will be an identifier and the other a preprocessing
+number.  When pasted, they make a longer identifier.  This isn't the
+only valid case.  It is also possible to concatenate two numbers (or a
+number and a name, such as `1.5' and `e3') into a number.  Also,
+multi-character operators such as `+=' can be formed by token pasting.
+
+   However, two tokens that don't together form a valid token cannot be
+pasted together.  For example, you cannot concatenate `x' with `+' in
+either order.  If you try, the preprocessor issues a warning and emits
+the two tokens.  Whether it puts white space between the tokens is
+undefined.  It is common to find unnecessary uses of `##' in complex
+macros.  If you get this warning, it is likely that you can simply
+remove the `##'.
+
+   Both the tokens combined by `##' could come from the macro body, but
+you could just as well write them as one token in the first place.
+Token pasting is most useful when one or both of the tokens comes from a
+macro argument.  If either of the tokens next to an `##' is a parameter
+name, it is replaced by its actual argument before `##' executes.  As
+with stringification, the actual argument is not macro-expanded first.
+If the argument is empty, that `##' has no effect.
+
+   Keep in mind that the C preprocessor converts comments to whitespace
+before macros are even considered.  Therefore, you cannot create a
+comment by concatenating `/' and `*'.  You can put as much whitespace
+between `##' and its operands as you like, including comments, and you
+can put comments in arguments that will be concatenated.  However, it
+is an error if `##' appears at either end of a macro body.
+
+   Consider a C program that interprets named commands.  There probably
+needs to be a table of commands, perhaps an array of structures declared
+as follows:
+
+     struct command
+     {
+       char *name;
+       void (*function) (void);
+     };
+
+     struct command commands[] =
+     {
+       { "quit", quit_command },
+       { "help", help_command },
+       ...
+     };
+
+   It would be cleaner not to have to give each command name twice,
+once in the string constant and once in the function name.  A macro
+which takes the name of a command as an argument can make this
+unnecessary.  The string constant can be created with stringification,
+and the function name by concatenating the argument with `_command'.
+Here is how it is done:
+
+     #define COMMAND(NAME)  { #NAME, NAME ## _command }
+
+     struct command commands[] =
+     {
+       COMMAND (quit),
+       COMMAND (help),
+       ...
+     };
+
+
+File: cpp.info,  Node: Variadic Macros,  Next: Predefined Macros,  Prev: Concatenation,  Up: Macros
+
+3.6 Variadic Macros
+===================
+
+A macro can be declared to accept a variable number of arguments much as
+a function can.  The syntax for defining the macro is similar to that of
+a function.  Here is an example:
+
+     #define eprintf(...) fprintf (stderr, __VA_ARGS__)
+
+   This kind of macro is called "variadic".  When the macro is invoked,
+all the tokens in its argument list after the last named argument (this
+macro has none), including any commas, become the "variable argument".
+This sequence of tokens replaces the identifier `__VA_ARGS__' in the
+macro body wherever it appears.  Thus, we have this expansion:
+
+     eprintf ("%s:%d: ", input_file, lineno)
+          ==>  fprintf (stderr, "%s:%d: ", input_file, lineno)
+
+   The variable argument is completely macro-expanded before it is
+inserted into the macro expansion, just like an ordinary argument.  You
+may use the `#' and `##' operators to stringify the variable argument
+or to paste its leading or trailing token with another token.  (But see
+below for an important special case for `##'.)
+
+   If your macro is complicated, you may want a more descriptive name
+for the variable argument than `__VA_ARGS__'.  CPP permits this, as an
+extension.  You may write an argument name immediately before the
+`...'; that name is used for the variable argument.  The `eprintf'
+macro above could be written
+
+     #define eprintf(args...) fprintf (stderr, args)
+
+using this extension.  You cannot use `__VA_ARGS__' and this extension
+in the same macro.
+
+   You can have named arguments as well as variable arguments in a
+variadic macro.  We could define `eprintf' like this, instead:
+
+     #define eprintf(format, ...) fprintf (stderr, format, __VA_ARGS__)
+
+This formulation looks more descriptive, but unfortunately it is less
+flexible: you must now supply at least one argument after the format
+string.  In standard C, you cannot omit the comma separating the named
+argument from the variable arguments.  Furthermore, if you leave the
+variable argument empty, you will get a syntax error, because there
+will be an extra comma after the format string.
+
+     eprintf("success!\n", );
+          ==> fprintf(stderr, "success!\n", );
+
+   GNU CPP has a pair of extensions which deal with this problem.
+First, you are allowed to leave the variable argument out entirely:
+
+     eprintf ("success!\n")
+          ==> fprintf(stderr, "success!\n", );
+
+Second, the `##' token paste operator has a special meaning when placed
+between a comma and a variable argument.  If you write
+
+     #define eprintf(format, ...) fprintf (stderr, format, ##__VA_ARGS__)
+
+and the variable argument is left out when the `eprintf' macro is used,
+then the comma before the `##' will be deleted.  This does _not_ happen
+if you pass an empty argument, nor does it happen if the token
+preceding `##' is anything other than a comma.
+
+     eprintf ("success!\n")
+          ==> fprintf(stderr, "success!\n");
+
+The above explanation is ambiguous about the case where the only macro
+parameter is a variable arguments parameter, as it is meaningless to
+try to distinguish whether no argument at all is an empty argument or a
+missing argument.  In this case the C99 standard is clear that the
+comma must remain, however the existing GCC extension used to swallow
+the comma.  So CPP retains the comma when conforming to a specific C
+standard, and drops it otherwise.
+
+   C99 mandates that the only place the identifier `__VA_ARGS__' can
+appear is in the replacement list of a variadic macro.  It may not be
+used as a macro name, macro argument name, or within a different type
+of macro.  It may also be forbidden in open text; the standard is
+ambiguous.  We recommend you avoid using it except for its defined
+purpose.
+
+   Variadic macros are a new feature in C99.  GNU CPP has supported them
+for a long time, but only with a named variable argument (`args...',
+not `...' and `__VA_ARGS__').  If you are concerned with portability to
+previous versions of GCC, you should use only named variable arguments.
+On the other hand, if you are concerned with portability to other
+conforming implementations of C99, you should use only `__VA_ARGS__'.
+
+   Previous versions of CPP implemented the comma-deletion extension
+much more generally.  We have restricted it in this release to minimize
+the differences from C99.  To get the same effect with both this and
+previous versions of GCC, the token preceding the special `##' must be
+a comma, and there must be white space between that comma and whatever
+comes immediately before it:
+
+     #define eprintf(format, args...) fprintf (stderr, format , ##args)
+
+*Note Differences from previous versions::, for the gory details.
+
+
+File: cpp.info,  Node: Predefined Macros,  Next: Undefining and Redefining Macros,  Prev: Variadic Macros,  Up: Macros
+
+3.7 Predefined Macros
+=====================
+
+Several object-like macros are predefined; you use them without
+supplying their definitions.  They fall into three classes: standard,
+common, and system-specific.
+
+   In C++, there is a fourth category, the named operators.  They act
+like predefined macros, but you cannot undefine them.
+
+* Menu:
+
+* Standard Predefined Macros::
+* Common Predefined Macros::
+* System-specific Predefined Macros::
+* C++ Named Operators::
+
+
+File: cpp.info,  Node: Standard Predefined Macros,  Next: Common Predefined Macros,  Up: Predefined Macros
+
+3.7.1 Standard Predefined Macros
+--------------------------------
+
+The standard predefined macros are specified by the relevant language
+standards, so they are available with all compilers that implement
+those standards.  Older compilers may not provide all of them.  Their
+names all start with double underscores.
+
+`__FILE__'
+     This macro expands to the name of the current input file, in the
+     form of a C string constant.  This is the path by which the
+     preprocessor opened the file, not the short name specified in
+     `#include' or as the input file name argument.  For example,
+     `"/usr/local/include/myheader.h"' is a possible expansion of this
+     macro.
+
+`__LINE__'
+     This macro expands to the current input line number, in the form
+     of a decimal integer constant.  While we call it a predefined
+     macro, it's a pretty strange macro, since its "definition" changes
+     with each new line of source code.
+
+   `__FILE__' and `__LINE__' are useful in generating an error message
+to report an inconsistency detected by the program; the message can
+state the source line at which the inconsistency was detected.  For
+example,
+
+     fprintf (stderr, "Internal error: "
+                      "negative string length "
+                      "%d at %s, line %d.",
+              length, __FILE__, __LINE__);
+
+   An `#include' directive changes the expansions of `__FILE__' and
+`__LINE__' to correspond to the included file.  At the end of that
+file, when processing resumes on the input file that contained the
+`#include' directive, the expansions of `__FILE__' and `__LINE__'
+revert to the values they had before the `#include' (but `__LINE__' is
+then incremented by one as processing moves to the line after the
+`#include').
+
+   A `#line' directive changes `__LINE__', and may change `__FILE__' as
+well.  *Note Line Control::.
+
+   C99 introduces `__func__', and GCC has provided `__FUNCTION__' for a
+long time.  Both of these are strings containing the name of the
+current function (there are slight semantic differences; see the GCC
+manual).  Neither of them is a macro; the preprocessor does not know the
+name of the current function.  They tend to be useful in conjunction
+with `__FILE__' and `__LINE__', though.
+
+`__DATE__'
+     This macro expands to a string constant that describes the date on
+     which the preprocessor is being run.  The string constant contains
+     eleven characters and looks like `"Feb 12 1996"'.  If the day of
+     the month is less than 10, it is padded with a space on the left.
+
+     If GCC cannot determine the current date, it will emit a warning
+     message (once per compilation) and `__DATE__' will expand to
+     `"??? ?? ????"'.
+
+`__TIME__'
+     This macro expands to a string constant that describes the time at
+     which the preprocessor is being run.  The string constant contains
+     eight characters and looks like `"23:59:01"'.
+
+     If GCC cannot determine the current time, it will emit a warning
+     message (once per compilation) and `__TIME__' will expand to
+     `"??:??:??"'.
+
+`__STDC__'
+     In normal operation, this macro expands to the constant 1, to
+     signify that this compiler conforms to ISO Standard C.  If GNU CPP
+     is used with a compiler other than GCC, this is not necessarily
+     true; however, the preprocessor always conforms to the standard
+     unless the `-traditional-cpp' option is used.
+
+     This macro is not defined if the `-traditional-cpp' option is used.
+
+     On some hosts, the system compiler uses a different convention,
+     where `__STDC__' is normally 0, but is 1 if the user specifies
+     strict conformance to the C Standard.  CPP follows the host
+     convention when processing system header files, but when
+     processing user files `__STDC__' is always 1.  This has been
+     reported to cause problems; for instance, some versions of Solaris
+     provide X Windows headers that expect `__STDC__' to be either
+     undefined or 1.  *Note Invocation::.
+
+`__STDC_VERSION__'
+     This macro expands to the C Standard's version number, a long
+     integer constant of the form `YYYYMML' where YYYY and MM are the
+     year and month of the Standard version.  This signifies which
+     version of the C Standard the compiler conforms to.  Like
+     `__STDC__', this is not necessarily accurate for the entire
+     implementation, unless GNU CPP is being used with GCC.
+
+     The value `199409L' signifies the 1989 C standard as amended in
+     1994, which is the current default; the value `199901L' signifies
+     the 1999 revision of the C standard.  Support for the 1999
+     revision is not yet complete.
+
+     This macro is not defined if the `-traditional-cpp' option is
+     used, nor when compiling C++ or Objective-C.
+
+`__STDC_HOSTED__'
+     This macro is defined, with value 1, if the compiler's target is a
+     "hosted environment".  A hosted environment has the complete
+     facilities of the standard C library available.
+
+`__cplusplus'
+     This macro is defined when the C++ compiler is in use.  You can use
+     `__cplusplus' to test whether a header is compiled by a C compiler
+     or a C++ compiler.  This macro is similar to `__STDC_VERSION__', in
+     that it expands to a version number.  A fully conforming
+     implementation of the 1998 C++ standard will define this macro to
+     `199711L'.  The GNU C++ compiler is not yet fully conforming, so
+     it uses `1' instead.  It is hoped to complete the implementation
+     of standard C++ in the near future.
+
+`__OBJC__'
+     This macro is defined, with value 1, when the Objective-C compiler
+     is in use.  You can use `__OBJC__' to test whether a header is
+     compiled by a C compiler or an Objective-C compiler.
+
+`__ASSEMBLER__'
+     This macro is defined with value 1 when preprocessing assembly
+     language.
+
+
+
+File: cpp.info,  Node: Common Predefined Macros,  Next: System-specific Predefined Macros,  Prev: Standard Predefined Macros,  Up: Predefined Macros
+
+3.7.2 Common Predefined Macros
+------------------------------
+
+The common predefined macros are GNU C extensions.  They are available
+with the same meanings regardless of the machine or operating system on
+which you are using GNU C or GNU Fortran.  Their names all start with
+double underscores.
+
+`__COUNTER__'
+     This macro expands to sequential integral values starting from 0.
+     In conjunction with the `##' operator, this provides a convenient
+     means to generate unique identifiers.  Care must be taken to
+     ensure that `__COUNTER__' is not expanded prior to inclusion of
+     precompiled headers which use it.  Otherwise, the precompiled
+     headers will not be used.
+
+`__GFORTRAN__'
+     The GNU Fortran compiler defines this.
+
+`__GNUC__'
+`__GNUC_MINOR__'
+`__GNUC_PATCHLEVEL__'
+     These macros are defined by all GNU compilers that use the C
+     preprocessor: C, C++, Objective-C and Fortran.  Their values are
+     the major version, minor version, and patch level of the compiler,
+     as integer constants.  For example, GCC 3.2.1 will define
+     `__GNUC__' to 3, `__GNUC_MINOR__' to 2, and `__GNUC_PATCHLEVEL__'
+     to 1.  These macros are also defined if you invoke the
+     preprocessor directly.
+
+     `__GNUC_PATCHLEVEL__' is new to GCC 3.0; it is also present in the
+     widely-used development snapshots leading up to 3.0 (which identify
+     themselves as GCC 2.96 or 2.97, depending on which snapshot you
+     have).
+
+     If all you need to know is whether or not your program is being
+     compiled by GCC, or a non-GCC compiler that claims to accept the
+     GNU C dialects, you can simply test `__GNUC__'.  If you need to
+     write code which depends on a specific version, you must be more
+     careful.  Each time the minor version is increased, the patch
+     level is reset to zero; each time the major version is increased
+     (which happens rarely), the minor version and patch level are
+     reset.  If you wish to use the predefined macros directly in the
+     conditional, you will need to write it like this:
+
+          /* Test for GCC > 3.2.0 */
+          #if __GNUC__ > 3 || \
+              (__GNUC__ == 3 && (__GNUC_MINOR__ > 2 || \
+                                 (__GNUC_MINOR__ == 2 && \
+                                  __GNUC_PATCHLEVEL__ > 0))
+
+     Another approach is to use the predefined macros to calculate a
+     single number, then compare that against a threshold:
+
+          #define GCC_VERSION (__GNUC__ * 10000 \
+                               + __GNUC_MINOR__ * 100 \
+                               + __GNUC_PATCHLEVEL__)
+          ...
+          /* Test for GCC > 3.2.0 */
+          #if GCC_VERSION > 30200
+
+     Many people find this form easier to understand.
+
+`__GNUG__'
+     The GNU C++ compiler defines this.  Testing it is equivalent to
+     testing `(__GNUC__ && __cplusplus)'.
+
+`__STRICT_ANSI__'
+     GCC defines this macro if and only if the `-ansi' switch, or a
+     `-std' switch specifying strict conformance to some version of ISO
+     C, was specified when GCC was invoked.  It is defined to `1'.
+     This macro exists primarily to direct GNU libc's header files to
+     restrict their definitions to the minimal set found in the 1989 C
+     standard.
+
+`__BASE_FILE__'
+     This macro expands to the name of the main input file, in the form
+     of a C string constant.  This is the source file that was specified
+     on the command line of the preprocessor or C compiler.
+
+`__INCLUDE_LEVEL__'
+     This macro expands to a decimal integer constant that represents
+     the depth of nesting in include files.  The value of this macro is
+     incremented on every `#include' directive and decremented at the
+     end of every included file.  It starts out at 0, its value within
+     the base file specified on the command line.
+
+`__ELF__'
+     This macro is defined if the target uses the ELF object format.
+
+`__VERSION__'
+     This macro expands to a string constant which describes the
+     version of the compiler in use.  You should not rely on its
+     contents having any particular form, but it can be counted on to
+     contain at least the release number.
+
+`__OPTIMIZE__'
+`__OPTIMIZE_SIZE__'
+`__NO_INLINE__'
+     These macros describe the compilation mode.  `__OPTIMIZE__' is
+     defined in all optimizing compilations.  `__OPTIMIZE_SIZE__' is
+     defined if the compiler is optimizing for size, not speed.
+     `__NO_INLINE__' is defined if no functions will be inlined into
+     their callers (when not optimizing, or when inlining has been
+     specifically disabled by `-fno-inline').
+
+     These macros cause certain GNU header files to provide optimized
+     definitions, using macros or inline functions, of system library
+     functions.  You should not use these macros in any way unless you
+     make sure that programs will execute with the same effect whether
+     or not they are defined.  If they are defined, their value is 1.
+
+`__GNUC_GNU_INLINE__'
+     GCC defines this macro if functions declared `inline' will be
+     handled in GCC's traditional gnu90 mode.  Object files will contain
+     externally visible definitions of all functions declared `inline'
+     without `extern' or `static'.  They will not contain any
+     definitions of any functions declared `extern inline'.
+
+`__GNUC_STDC_INLINE__'
+     GCC defines this macro if functions declared `inline' will be
+     handled according to the ISO C99 standard.  Object files will
+     contain externally visible definitions of all functions declared
+     `extern inline'.  They will not contain definitions of any
+     functions declared `inline' without `extern'.
+
+     If this macro is defined, GCC supports the `gnu_inline' function
+     attribute as a way to always get the gnu90 behavior.  Support for
+     this and `__GNUC_GNU_INLINE__' was added in GCC 4.1.3.  If neither
+     macro is defined, an older version of GCC is being used: `inline'
+     functions will be compiled in gnu90 mode, and the `gnu_inline'
+     function attribute will not be recognized.
+
+`__CHAR_UNSIGNED__'
+     GCC defines this macro if and only if the data type `char' is
+     unsigned on the target machine.  It exists to cause the standard
+     header file `limits.h' to work correctly.  You should not use this
+     macro yourself; instead, refer to the standard macros defined in
+     `limits.h'.
+
+`__WCHAR_UNSIGNED__'
+     Like `__CHAR_UNSIGNED__', this macro is defined if and only if the
+     data type `wchar_t' is unsigned and the front-end is in C++ mode.
+
+`__REGISTER_PREFIX__'
+     This macro expands to a single token (not a string constant) which
+     is the prefix applied to CPU register names in assembly language
+     for this target.  You can use it to write assembly that is usable
+     in multiple environments.  For example, in the `m68k-aout'
+     environment it expands to nothing, but in the `m68k-coff'
+     environment it expands to a single `%'.
+
+`__USER_LABEL_PREFIX__'
+     This macro expands to a single token which is the prefix applied to
+     user labels (symbols visible to C code) in assembly.  For example,
+     in the `m68k-aout' environment it expands to an `_', but in the
+     `m68k-coff' environment it expands to nothing.
+
+     This macro will have the correct definition even if
+     `-f(no-)underscores' is in use, but it will not be correct if
+     target-specific options that adjust this prefix are used (e.g. the
+     OSF/rose `-mno-underscores' option).
+
+`__SIZE_TYPE__'
+`__PTRDIFF_TYPE__'
+`__WCHAR_TYPE__'
+`__WINT_TYPE__'
+`__INTMAX_TYPE__'
+`__UINTMAX_TYPE__'
+`__SIG_ATOMIC_TYPE__'
+`__INT8_TYPE__'
+`__INT16_TYPE__'
+`__INT32_TYPE__'
+`__INT64_TYPE__'
+`__UINT8_TYPE__'
+`__UINT16_TYPE__'
+`__UINT32_TYPE__'
+`__UINT64_TYPE__'
+`__INT_LEAST8_TYPE__'
+`__INT_LEAST16_TYPE__'
+`__INT_LEAST32_TYPE__'
+`__INT_LEAST64_TYPE__'
+`__UINT_LEAST8_TYPE__'
+`__UINT_LEAST16_TYPE__'
+`__UINT_LEAST32_TYPE__'
+`__UINT_LEAST64_TYPE__'
+`__INT_FAST8_TYPE__'
+`__INT_FAST16_TYPE__'
+`__INT_FAST32_TYPE__'
+`__INT_FAST64_TYPE__'
+`__UINT_FAST8_TYPE__'
+`__UINT_FAST16_TYPE__'
+`__UINT_FAST32_TYPE__'
+`__UINT_FAST64_TYPE__'
+`__INTPTR_TYPE__'
+`__UINTPTR_TYPE__'
+     These macros are defined to the correct underlying types for the
+     `size_t', `ptrdiff_t', `wchar_t', `wint_t', `intmax_t',
+     `uintmax_t', `sig_atomic_t', `int8_t', `int16_t', `int32_t',
+     `int64_t', `uint8_t', `uint16_t', `uint32_t', `uint64_t',
+     `int_least8_t', `int_least16_t', `int_least32_t', `int_least64_t',
+     `uint_least8_t', `uint_least16_t', `uint_least32_t',
+     `uint_least64_t', `int_fast8_t', `int_fast16_t', `int_fast32_t',
+     `int_fast64_t', `uint_fast8_t', `uint_fast16_t', `uint_fast32_t',
+     `uint_fast64_t', `intptr_t', and `uintptr_t' typedefs,
+     respectively.  They exist to make the standard header files
+     `stddef.h', `stdint.h', and `wchar.h' work correctly.  You should
+     not use these macros directly; instead, include the appropriate
+     headers and use the typedefs.  Some of these macros may not be
+     defined on particular systems if GCC does not provide a `stdint.h'
+     header on those systems.
+
+`__CHAR_BIT__'
+     Defined to the number of bits used in the representation of the
+     `char' data type.  It exists to make the standard header given
+     numerical limits work correctly.  You should not use this macro
+     directly; instead, include the appropriate headers.
+
+`__SCHAR_MAX__'
+`__WCHAR_MAX__'
+`__SHRT_MAX__'
+`__INT_MAX__'
+`__LONG_MAX__'
+`__LONG_LONG_MAX__'
+`__WINT_MAX__'
+`__SIZE_MAX__'
+`__PTRDIFF_MAX__'
+`__INTMAX_MAX__'
+`__UINTMAX_MAX__'
+`__SIG_ATOMIC_MAX__'
+`__INT8_MAX__'
+`__INT16_MAX__'
+`__INT32_MAX__'
+`__INT64_MAX__'
+`__UINT8_MAX__'
+`__UINT16_MAX__'
+`__UINT32_MAX__'
+`__UINT64_MAX__'
+`__INT_LEAST8_MAX__'
+`__INT_LEAST16_MAX__'
+`__INT_LEAST32_MAX__'
+`__INT_LEAST64_MAX__'
+`__UINT_LEAST8_MAX__'
+`__UINT_LEAST16_MAX__'
+`__UINT_LEAST32_MAX__'
+`__UINT_LEAST64_MAX__'
+`__INT_FAST8_MAX__'
+`__INT_FAST16_MAX__'
+`__INT_FAST32_MAX__'
+`__INT_FAST64_MAX__'
+`__UINT_FAST8_MAX__'
+`__UINT_FAST16_MAX__'
+`__UINT_FAST32_MAX__'
+`__UINT_FAST64_MAX__'
+`__INTPTR_MAX__'
+`__UINTPTR_MAX__'
+`__WCHAR_MIN__'
+`__WINT_MIN__'
+`__SIG_ATOMIC_MIN__'
+     Defined to the maximum value of the `signed char', `wchar_t',
+     `signed short', `signed int', `signed long', `signed long long',
+     `wint_t', `size_t', `ptrdiff_t', `intmax_t', `uintmax_t',
+     `sig_atomic_t', `int8_t', `int16_t', `int32_t', `int64_t',
+     `uint8_t', `uint16_t', `uint32_t', `uint64_t', `int_least8_t',
+     `int_least16_t', `int_least32_t', `int_least64_t',
+     `uint_least8_t', `uint_least16_t', `uint_least32_t',
+     `uint_least64_t', `int_fast8_t', `int_fast16_t', `int_fast32_t',
+     `int_fast64_t', `uint_fast8_t', `uint_fast16_t', `uint_fast32_t',
+     `uint_fast64_t', `intptr_t', and `uintptr_t' types and to the
+     minimum value of the `wchar_t', `wint_t', and `sig_atomic_t' types
+     respectively.  They exist to make the standard header given
+     numerical limits work correctly.  You should not use these macros
+     directly; instead, include the appropriate headers.  Some of these
+     macros may not be defined on particular systems if GCC does not
+     provide a `stdint.h' header on those systems.
+
+`__INT8_C'
+`__INT16_C'
+`__INT32_C'
+`__INT64_C'
+`__UINT8_C'
+`__UINT16_C'
+`__UINT32_C'
+`__UINT64_C'
+`__INTMAX_C'
+`__UINTMAX_C'
+     Defined to implementations of the standard `stdint.h' macros with
+     the same names without the leading `__'.  They exist the make the
+     implementation of that header work correctly.  You should not use
+     these macros directly; instead, include the appropriate headers.
+     Some of these macros may not be defined on particular systems if
+     GCC does not provide a `stdint.h' header on those systems.
+
+`__SIZEOF_INT__'
+`__SIZEOF_LONG__'
+`__SIZEOF_LONG_LONG__'
+`__SIZEOF_SHORT__'
+`__SIZEOF_POINTER__'
+`__SIZEOF_FLOAT__'
+`__SIZEOF_DOUBLE__'
+`__SIZEOF_LONG_DOUBLE__'
+`__SIZEOF_SIZE_T__'
+`__SIZEOF_WCHAR_T__'
+`__SIZEOF_WINT_T__'
+`__SIZEOF_PTRDIFF_T__'
+     Defined to the number of bytes of the C standard data types: `int',
+     `long', `long long', `short', `void *', `float', `double', `long
+     double', `size_t', `wchar_t', `wint_t' and `ptrdiff_t'.
+
+`__DEPRECATED'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with warnings about deprecated constructs enabled.  These
+     warnings are enabled by default, but can be disabled with
+     `-Wno-deprecated'.
+
+`__EXCEPTIONS'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with exceptions enabled.  If `-fno-exceptions' is used when
+     compiling the file, then this macro is not defined.
+
+`__GXX_RTTI'
+     This macro is defined, with value 1, when compiling a C++ source
+     file with runtime type identification enabled.  If `-fno-rtti' is
+     used when compiling the file, then this macro is not defined.
+
+`__USING_SJLJ_EXCEPTIONS__'
+     This macro is defined, with value 1, if the compiler uses the old
+     mechanism based on `setjmp' and `longjmp' for exception handling.
+
+`__GXX_EXPERIMENTAL_CXX0X__'
+     This macro is defined when compiling a C++ source file with the
+     option `-std=c++0x' or `-std=gnu++0x'. It indicates that some
+     features likely to be included in C++0x are available. Note that
+     these features are experimental, and may change or be removed in
+     future versions of GCC.
+
+`__GXX_WEAK__'
+     This macro is defined when compiling a C++ source file.  It has the
+     value 1 if the compiler will use weak symbols, COMDAT sections, or
+     other similar techniques to collapse symbols with "vague linkage"
+     that are defined in multiple translation units.  If the compiler
+     will not collapse such symbols, this macro is defined with value
+     0.  In general, user code should not need to make use of this
+     macro; the purpose of this macro is to ease implementation of the
+     C++ runtime library provided with G++.
+
+`__NEXT_RUNTIME__'
+     This macro is defined, with value 1, if (and only if) the NeXT
+     runtime (as in `-fnext-runtime') is in use for Objective-C.  If
+     the GNU runtime is used, this macro is not defined, so that you
+     can use this macro to determine which runtime (NeXT or GNU) is
+     being used.
+
+`__LP64__'
+`_LP64'
+     These macros are defined, with value 1, if (and only if) the
+     compilation is for a target where `long int' and pointer both use
+     64-bits and `int' uses 32-bit.
+
+`__SSP__'
+     This macro is defined, with value 1, when `-fstack-protector' is in
+     use.
+
+`__SSP_ALL__'
+     This macro is defined, with value 2, when `-fstack-protector-all'
+     is in use.
+
+`__TIMESTAMP__'
+     This macro expands to a string constant that describes the date
+     and time of the last modification of the current source file. The
+     string constant contains abbreviated day of the week, month, day
+     of the month, time in hh:mm:ss form, year and looks like
+     `"Sun Sep 16 01:03:52 1973"'.  If the day of the month is less
+     than 10, it is padded with a space on the left.
+
+     If GCC cannot determine the current date, it will emit a warning
+     message (once per compilation) and `__TIMESTAMP__' will expand to
+     `"??? ??? ?? ??:??:?? ????"'.
+
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_1'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_2'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_4'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_8'
+`__GCC_HAVE_SYNC_COMPARE_AND_SWAP_16'
+     These macros are defined when the target processor supports atomic
+     compare and swap operations on operands 1, 2, 4, 8 or 16 bytes in
+     length, respectively.
+
+`__GCC_HAVE_DWARF2_CFI_ASM'
+     This macro is defined when the compiler is emitting Dwarf2 CFI
+     directives to the assembler.  When this is defined, it is possible
+     to emit those same directives in inline assembly.
+
+
+File: cpp.info,  Node: System-specific Predefined Macros,  Next: C++ Named Operators,  Prev: Common Predefined Macros,  Up: Predefined Macros
+
+3.7.3 System-specific Predefined Macros
+---------------------------------------
+
+The C preprocessor normally predefines several macros that indicate what
+type of system and machine is in use.  They are obviously different on
+each target supported by GCC.  This manual, being for all systems and
+machines, cannot tell you what their names are, but you can use `cpp
+-dM' to see them all.  *Note Invocation::.  All system-specific
+predefined macros expand to the constant 1, so you can test them with
+either `#ifdef' or `#if'.
+
+   The C standard requires that all system-specific macros be part of
+the "reserved namespace".  All names which begin with two underscores,
+or an underscore and a capital letter, are reserved for the compiler and
+library to use as they wish.  However, historically system-specific
+macros have had names with no special prefix; for instance, it is common
+to find `unix' defined on Unix systems.  For all such macros, GCC
+provides a parallel macro with two underscores added at the beginning
+and the end.  If `unix' is defined, `__unix__' will be defined too.
+There will never be more than two underscores; the parallel of `_mips'
+is `__mips__'.
+
+   When the `-ansi' option, or any `-std' option that requests strict
+conformance, is given to the compiler, all the system-specific
+predefined macros outside the reserved namespace are suppressed.  The
+parallel macros, inside the reserved namespace, remain defined.
+
+   We are slowly phasing out all predefined macros which are outside the
+reserved namespace.  You should never use them in new programs, and we
+encourage you to correct older code to use the parallel macros whenever
+you find it.  We don't recommend you use the system-specific macros that
+are in the reserved namespace, either.  It is better in the long run to
+check specifically for features you need, using a tool such as
+`autoconf'.
+
+
+File: cpp.info,  Node: C++ Named Operators,  Prev: System-specific Predefined Macros,  Up: Predefined Macros
+
+3.7.4 C++ Named Operators
+-------------------------
+
+In C++, there are eleven keywords which are simply alternate spellings
+of operators normally written with punctuation.  These keywords are
+treated as such even in the preprocessor.  They function as operators in
+`#if', and they cannot be defined as macros or poisoned.  In C, you can
+request that those keywords take their C++ meaning by including
+`iso646.h'.  That header defines each one as a normal object-like macro
+expanding to the appropriate punctuator.
+
+   These are the named operators and their corresponding punctuators:
+
+Named Operator   Punctuator
+`and'            `&&'
+`and_eq'         `&='
+`bitand'         `&'
+`bitor'          `|'
+`compl'          `~'
+`not'            `!'
+`not_eq'         `!='
+`or'             `||'
+`or_eq'          `|='
+`xor'            `^'
+`xor_eq'         `^='
+
+
+File: cpp.info,  Node: Undefining and Redefining Macros,  Next: Directives Within Macro Arguments,  Prev: Predefined Macros,  Up: Macros
+
+3.8 Undefining and Redefining Macros
+====================================
+
+If a macro ceases to be useful, it may be "undefined" with the `#undef'
+directive.  `#undef' takes a single argument, the name of the macro to
+undefine.  You use the bare macro name, even if the macro is
+function-like.  It is an error if anything appears on the line after
+the macro name.  `#undef' has no effect if the name is not a macro.
+
+     #define FOO 4
+     x = FOO;        ==> x = 4;
+     #undef FOO
+     x = FOO;        ==> x = FOO;
+
+   Once a macro has been undefined, that identifier may be "redefined"
+as a macro by a subsequent `#define' directive.  The new definition
+need not have any resemblance to the old definition.
+
+   However, if an identifier which is currently a macro is redefined,
+then the new definition must be "effectively the same" as the old one.
+Two macro definitions are effectively the same if:
+   * Both are the same type of macro (object- or function-like).
+
+   * All the tokens of the replacement list are the same.
+
+   * If there are any parameters, they are the same.
+
+   * Whitespace appears in the same places in both.  It need not be
+     exactly the same amount of whitespace, though.  Remember that
+     comments count as whitespace.
+
+These definitions are effectively the same:
+     #define FOUR (2 + 2)
+     #define FOUR         (2    +    2)
+     #define FOUR (2 /* two */ + 2)
+   but these are not:
+     #define FOUR (2 + 2)
+     #define FOUR ( 2+2 )
+     #define FOUR (2 * 2)
+     #define FOUR(score,and,seven,years,ago) (2 + 2)
+
+   If a macro is redefined with a definition that is not effectively the
+same as the old one, the preprocessor issues a warning and changes the
+macro to use the new definition.  If the new definition is effectively
+the same, the redefinition is silently ignored.  This allows, for
+instance, two different headers to define a common macro.  The
+preprocessor will only complain if the definitions do not match.
+
+
+File: cpp.info,  Node: Directives Within Macro Arguments,  Next: Macro Pitfalls,  Prev: Undefining and Redefining Macros,  Up: Macros
+
+3.9 Directives Within Macro Arguments
+=====================================
+
+Occasionally it is convenient to use preprocessor directives within the
+arguments of a macro.  The C and C++ standards declare that behavior in
+these cases is undefined.
+
+   Versions of CPP prior to 3.2 would reject such constructs with an
+error message.  This was the only syntactic difference between normal
+functions and function-like macros, so it seemed attractive to remove
+this limitation, and people would often be surprised that they could
+not use macros in this way.  Moreover, sometimes people would use
+conditional compilation in the argument list to a normal library
+function like `printf', only to find that after a library upgrade
+`printf' had changed to be a function-like macro, and their code would
+no longer compile.  So from version 3.2 we changed CPP to successfully
+process arbitrary directives within macro arguments in exactly the same
+way as it would have processed the directive were the function-like
+macro invocation not present.
+
+   If, within a macro invocation, that macro is redefined, then the new
+definition takes effect in time for argument pre-expansion, but the
+original definition is still used for argument replacement.  Here is a
+pathological example:
+
+     #define f(x) x x
+     f (1
+     #undef f
+     #define f 2
+     f)
+
+which expands to
+
+     1 2 1 2
+
+with the semantics described above.
+
+
+File: cpp.info,  Node: Macro Pitfalls,  Prev: Directives Within Macro Arguments,  Up: Macros
+
+3.10 Macro Pitfalls
+===================
+
+In this section we describe some special rules that apply to macros and
+macro expansion, and point out certain cases in which the rules have
+counter-intuitive consequences that you must watch out for.
+
+* Menu:
+
+* Misnesting::
+* Operator Precedence Problems::
+* Swallowing the Semicolon::
+* Duplication of Side Effects::
+* Self-Referential Macros::
+* Argument Prescan::
+* Newlines in Arguments::
+
+
+File: cpp.info,  Node: Misnesting,  Next: Operator Precedence Problems,  Up: Macro Pitfalls
+
+3.10.1 Misnesting
+-----------------
+
+When a macro is called with arguments, the arguments are substituted
+into the macro body and the result is checked, together with the rest of
+the input file, for more macro calls.  It is possible to piece together
+a macro call coming partially from the macro body and partially from the
+arguments.  For example,
+
+     #define twice(x) (2*(x))
+     #define call_with_1(x) x(1)
+     call_with_1 (twice)
+          ==> twice(1)
+          ==> (2*(1))
+
+   Macro definitions do not have to have balanced parentheses.  By
+writing an unbalanced open parenthesis in a macro body, it is possible
+to create a macro call that begins inside the macro body but ends
+outside of it.  For example,
+
+     #define strange(file) fprintf (file, "%s %d",
+     ...
+     strange(stderr) p, 35)
+          ==> fprintf (stderr, "%s %d", p, 35)
+
+   The ability to piece together a macro call can be useful, but the
+use of unbalanced open parentheses in a macro body is just confusing,
+and should be avoided.
+
+
+File: cpp.info,  Node: Operator Precedence Problems,  Next: Swallowing the Semicolon,  Prev: Misnesting,  Up: Macro Pitfalls
+
+3.10.2 Operator Precedence Problems
+-----------------------------------
+
+You may have noticed that in most of the macro definition examples shown
+above, each occurrence of a macro argument name had parentheses around
+it.  In addition, another pair of parentheses usually surround the
+entire macro definition.  Here is why it is best to write macros that
+way.
+
+   Suppose you define a macro as follows,
+
+     #define ceil_div(x, y) (x + y - 1) / y
+
+whose purpose is to divide, rounding up.  (One use for this operation is
+to compute how many `int' objects are needed to hold a certain number
+of `char' objects.)  Then suppose it is used as follows:
+
+     a = ceil_div (b & c, sizeof (int));
+          ==> a = (b & c + sizeof (int) - 1) / sizeof (int);
+
+This does not do what is intended.  The operator-precedence rules of C
+make it equivalent to this:
+
+     a = (b & (c + sizeof (int) - 1)) / sizeof (int);
+
+What we want is this:
+
+     a = ((b & c) + sizeof (int) - 1)) / sizeof (int);
+
+Defining the macro as
+
+     #define ceil_div(x, y) ((x) + (y) - 1) / (y)
+
+provides the desired result.
+
+   Unintended grouping can result in another way.  Consider `sizeof
+ceil_div(1, 2)'.  That has the appearance of a C expression that would
+compute the size of the type of `ceil_div (1, 2)', but in fact it means
+something very different.  Here is what it expands to:
+
+     sizeof ((1) + (2) - 1) / (2)
+
+This would take the size of an integer and divide it by two.  The
+precedence rules have put the division outside the `sizeof' when it was
+intended to be inside.
+
+   Parentheses around the entire macro definition prevent such problems.
+Here, then, is the recommended way to define `ceil_div':
+
+     #define ceil_div(x, y) (((x) + (y) - 1) / (y))
+
+
+File: cpp.info,  Node: Swallowing the Semicolon,  Next: Duplication of Side Effects,  Prev: Operator Precedence Problems,  Up: Macro Pitfalls
+
+3.10.3 Swallowing the Semicolon
+-------------------------------
+
+Often it is desirable to define a macro that expands into a compound
+statement.  Consider, for example, the following macro, that advances a
+pointer (the argument `p' says where to find it) across whitespace
+characters:
+
+     #define SKIP_SPACES(p, limit)  \
+     { char *lim = (limit);         \
+       while (p < lim) {            \
+         if (*p++ != ' ') {         \
+           p--; break; }}}
+
+Here backslash-newline is used to split the macro definition, which must
+be a single logical line, so that it resembles the way such code would
+be laid out if not part of a macro definition.
+
+   A call to this macro might be `SKIP_SPACES (p, lim)'.  Strictly
+speaking, the call expands to a compound statement, which is a complete
+statement with no need for a semicolon to end it.  However, since it
+looks like a function call, it minimizes confusion if you can use it
+like a function call, writing a semicolon afterward, as in `SKIP_SPACES
+(p, lim);'
+
+   This can cause trouble before `else' statements, because the
+semicolon is actually a null statement.  Suppose you write
+
+     if (*p != 0)
+       SKIP_SPACES (p, lim);
+     else ...
+
+The presence of two statements--the compound statement and a null
+statement--in between the `if' condition and the `else' makes invalid C
+code.
+
+   The definition of the macro `SKIP_SPACES' can be altered to solve
+this problem, using a `do ... while' statement.  Here is how:
+
+     #define SKIP_SPACES(p, limit)     \
+     do { char *lim = (limit);         \
+          while (p < lim) {            \
+            if (*p++ != ' ') {         \
+              p--; break; }}}          \
+     while (0)
+
+   Now `SKIP_SPACES (p, lim);' expands into
+
+     do {...} while (0);
+
+which is one statement.  The loop executes exactly once; most compilers
+generate no extra code for it.
+
+
+File: cpp.info,  Node: Duplication of Side Effects,  Next: Self-Referential Macros,  Prev: Swallowing the Semicolon,  Up: Macro Pitfalls
+
+3.10.4 Duplication of Side Effects
+----------------------------------
+
+Many C programs define a macro `min', for "minimum", like this:
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+
+   When you use this macro with an argument containing a side effect,
+as shown here,
+
+     next = min (x + y, foo (z));
+
+it expands as follows:
+
+     next = ((x + y) < (foo (z)) ? (x + y) : (foo (z)));
+
+where `x + y' has been substituted for `X' and `foo (z)' for `Y'.
+
+   The function `foo' is used only once in the statement as it appears
+in the program, but the expression `foo (z)' has been substituted twice
+into the macro expansion.  As a result, `foo' might be called two times
+when the statement is executed.  If it has side effects or if it takes
+a long time to compute, the results might not be what you intended.  We
+say that `min' is an "unsafe" macro.
+
+   The best solution to this problem is to define `min' in a way that
+computes the value of `foo (z)' only once.  The C language offers no
+standard way to do this, but it can be done with GNU extensions as
+follows:
+
+     #define min(X, Y)                \
+     ({ typeof (X) x_ = (X);          \
+        typeof (Y) y_ = (Y);          \
+        (x_ < y_) ? x_ : y_; })
+
+   The `({ ... })' notation produces a compound statement that acts as
+an expression.  Its value is the value of its last statement.  This
+permits us to define local variables and assign each argument to one.
+The local variables have underscores after their names to reduce the
+risk of conflict with an identifier of wider scope (it is impossible to
+avoid this entirely).  Now each argument is evaluated exactly once.
+
+   If you do not wish to use GNU C extensions, the only solution is to
+be careful when _using_ the macro `min'.  For example, you can
+calculate the value of `foo (z)', save it in a variable, and use that
+variable in `min':
+
+     #define min(X, Y)  ((X) < (Y) ? (X) : (Y))
+     ...
+     {
+       int tem = foo (z);
+       next = min (x + y, tem);
+     }
+
+(where we assume that `foo' returns type `int').
+
+
+File: cpp.info,  Node: Self-Referential Macros,  Next: Argument Prescan,  Prev: Duplication of Side Effects,  Up: Macro Pitfalls
+
+3.10.5 Self-Referential Macros
+------------------------------
+
+A "self-referential" macro is one whose name appears in its definition.
+Recall that all macro definitions are rescanned for more macros to
+replace.  If the self-reference were considered a use of the macro, it
+would produce an infinitely large expansion.  To prevent this, the
+self-reference is not considered a macro call.  It is passed into the
+preprocessor output unchanged.  Consider an example:
+
+     #define foo (4 + foo)
+
+where `foo' is also a variable in your program.
+
+   Following the ordinary rules, each reference to `foo' will expand
+into `(4 + foo)'; then this will be rescanned and will expand into `(4
++ (4 + foo))'; and so on until the computer runs out of memory.
+
+   The self-reference rule cuts this process short after one step, at
+`(4 + foo)'.  Therefore, this macro definition has the possibly useful
+effect of causing the program to add 4 to the value of `foo' wherever
+`foo' is referred to.
+
+   In most cases, it is a bad idea to take advantage of this feature.  A
+person reading the program who sees that `foo' is a variable will not
+expect that it is a macro as well.  The reader will come across the
+identifier `foo' in the program and think its value should be that of
+the variable `foo', whereas in fact the value is four greater.
+
+   One common, useful use of self-reference is to create a macro which
+expands to itself.  If you write
+
+     #define EPERM EPERM
+
+then the macro `EPERM' expands to `EPERM'.  Effectively, it is left
+alone by the preprocessor whenever it's used in running text.  You can
+tell that it's a macro with `#ifdef'.  You might do this if you want to
+define numeric constants with an `enum', but have `#ifdef' be true for
+each constant.
+
+   If a macro `x' expands to use a macro `y', and the expansion of `y'
+refers to the macro `x', that is an "indirect self-reference" of `x'.
+`x' is not expanded in this case either.  Thus, if we have
+
+     #define x (4 + y)
+     #define y (2 * x)
+
+then `x' and `y' expand as follows:
+
+     x    ==> (4 + y)
+          ==> (4 + (2 * x))
+
+     y    ==> (2 * x)
+          ==> (2 * (4 + y))
+
+Each macro is expanded when it appears in the definition of the other
+macro, but not when it indirectly appears in its own definition.
+
+
+File: cpp.info,  Node: Argument Prescan,  Next: Newlines in Arguments,  Prev: Self-Referential Macros,  Up: Macro Pitfalls
+
+3.10.6 Argument Prescan
+-----------------------
+
+Macro arguments are completely macro-expanded before they are
+substituted into a macro body, unless they are stringified or pasted
+with other tokens.  After substitution, the entire macro body, including
+the substituted arguments, is scanned again for macros to be expanded.
+The result is that the arguments are scanned _twice_ to expand macro
+calls in them.
+
+   Most of the time, this has no effect.  If the argument contained any
+macro calls, they are expanded during the first scan.  The result
+therefore contains no macro calls, so the second scan does not change
+it.  If the argument were substituted as given, with no prescan, the
+single remaining scan would find the same macro calls and produce the
+same results.
+
+   You might expect the double scan to change the results when a
+self-referential macro is used in an argument of another macro (*note
+Self-Referential Macros::): the self-referential macro would be
+expanded once in the first scan, and a second time in the second scan.
+However, this is not what happens.  The self-references that do not
+expand in the first scan are marked so that they will not expand in the
+second scan either.
+
+   You might wonder, "Why mention the prescan, if it makes no
+difference?  And why not skip it and make the preprocessor faster?"
+The answer is that the prescan does make a difference in three special
+cases:
+
+   * Nested calls to a macro.
+
+     We say that "nested" calls to a macro occur when a macro's argument
+     contains a call to that very macro.  For example, if `f' is a macro
+     that expects one argument, `f (f (1))' is a nested pair of calls to
+     `f'.  The desired expansion is made by expanding `f (1)' and
+     substituting that into the definition of `f'.  The prescan causes
+     the expected result to happen.  Without the prescan, `f (1)' itself
+     would be substituted as an argument, and the inner use of `f' would
+     appear during the main scan as an indirect self-reference and
+     would not be expanded.
+
+   * Macros that call other macros that stringify or concatenate.
+
+     If an argument is stringified or concatenated, the prescan does not
+     occur.  If you _want_ to expand a macro, then stringify or
+     concatenate its expansion, you can do that by causing one macro to
+     call another macro that does the stringification or concatenation.
+     For instance, if you have
+
+          #define AFTERX(x) X_ ## x
+          #define XAFTERX(x) AFTERX(x)
+          #define TABLESIZE 1024
+          #define BUFSIZE TABLESIZE
+
+     then `AFTERX(BUFSIZE)' expands to `X_BUFSIZE', and
+     `XAFTERX(BUFSIZE)' expands to `X_1024'.  (Not to `X_TABLESIZE'.
+     Prescan always does a complete expansion.)
+
+   * Macros used in arguments, whose expansions contain unshielded
+     commas.
+
+     This can cause a macro expanded on the second scan to be called
+     with the wrong number of arguments.  Here is an example:
+
+          #define foo  a,b
+          #define bar(x) lose(x)
+          #define lose(x) (1 + (x))
+
+     We would like `bar(foo)' to turn into `(1 + (foo))', which would
+     then turn into `(1 + (a,b))'.  Instead, `bar(foo)' expands into
+     `lose(a,b)', and you get an error because `lose' requires a single
+     argument.  In this case, the problem is easily solved by the same
+     parentheses that ought to be used to prevent misnesting of
+     arithmetic operations:
+
+          #define foo (a,b)
+     or
+          #define bar(x) lose((x))
+
+     The extra pair of parentheses prevents the comma in `foo''s
+     definition from being interpreted as an argument separator.
+
+
+
+File: cpp.info,  Node: Newlines in Arguments,  Prev: Argument Prescan,  Up: Macro Pitfalls
+
+3.10.7 Newlines in Arguments
+----------------------------
+
+The invocation of a function-like macro can extend over many logical
+lines.  However, in the present implementation, the entire expansion
+comes out on one line.  Thus line numbers emitted by the compiler or
+debugger refer to the line the invocation started on, which might be
+different to the line containing the argument causing the problem.
+
+   Here is an example illustrating this:
+
+     #define ignore_second_arg(a,b,c) a; c
+
+     ignore_second_arg (foo (),
+                        ignored (),
+                        syntax error);
+
+The syntax error triggered by the tokens `syntax error' results in an
+error message citing line three--the line of ignore_second_arg-- even
+though the problematic code comes from line five.
+
+   We consider this a bug, and intend to fix it in the near future.
+
+
+File: cpp.info,  Node: Conditionals,  Next: Diagnostics,  Prev: Macros,  Up: Top
+
+4 Conditionals
+**************
+
+A "conditional" is a directive that instructs the preprocessor to
+select whether or not to include a chunk of code in the final token
+stream passed to the compiler.  Preprocessor conditionals can test
+arithmetic expressions, or whether a name is defined as a macro, or both
+simultaneously using the special `defined' operator.
+
+   A conditional in the C preprocessor resembles in some ways an `if'
+statement in C, but it is important to understand the difference between
+them.  The condition in an `if' statement is tested during the
+execution of your program.  Its purpose is to allow your program to
+behave differently from run to run, depending on the data it is
+operating on.  The condition in a preprocessing conditional directive is
+tested when your program is compiled.  Its purpose is to allow different
+code to be included in the program depending on the situation at the
+time of compilation.
+
+   However, the distinction is becoming less clear.  Modern compilers
+often do test `if' statements when a program is compiled, if their
+conditions are known not to vary at run time, and eliminate code which
+can never be executed.  If you can count on your compiler to do this,
+you may find that your program is more readable if you use `if'
+statements with constant conditions (perhaps determined by macros).  Of
+course, you can only use this to exclude code, not type definitions or
+other preprocessing directives, and you can only do it if the code
+remains syntactically valid when it is not to be used.
+
+   GCC version 3 eliminates this kind of never-executed code even when
+not optimizing.  Older versions did it only when optimizing.
+
+* Menu:
+
+* Conditional Uses::
+* Conditional Syntax::
+* Deleted Code::
+
+
+File: cpp.info,  Node: Conditional Uses,  Next: Conditional Syntax,  Up: Conditionals
+
+4.1 Conditional Uses
+====================
+
+There are three general reasons to use a conditional.
+
+   * A program may need to use different code depending on the machine
+     or operating system it is to run on.  In some cases the code for
+     one operating system may be erroneous on another operating system;
+     for example, it might refer to data types or constants that do not
+     exist on the other system.  When this happens, it is not enough to
+     avoid executing the invalid code.  Its mere presence will cause
+     the compiler to reject the program.  With a preprocessing
+     conditional, the offending code can be effectively excised from
+     the program when it is not valid.
+
+   * You may want to be able to compile the same source file into two
+     different programs.  One version might make frequent time-consuming
+     consistency checks on its intermediate data, or print the values of
+     those data for debugging, and the other not.
+
+   * A conditional whose condition is always false is one way to
+     exclude code from the program but keep it as a sort of comment for
+     future reference.
+
+   Simple programs that do not need system-specific logic or complex
+debugging hooks generally will not need to use preprocessing
+conditionals.
+
+
+File: cpp.info,  Node: Conditional Syntax,  Next: Deleted Code,  Prev: Conditional Uses,  Up: Conditionals
+
+4.2 Conditional Syntax
+======================
+
+A conditional in the C preprocessor begins with a "conditional
+directive": `#if', `#ifdef' or `#ifndef'.
+
+* Menu:
+
+* Ifdef::
+* If::
+* Defined::
+* Else::
+* Elif::
+
+
+File: cpp.info,  Node: Ifdef,  Next: If,  Up: Conditional Syntax
+
+4.2.1 Ifdef
+-----------
+
+The simplest sort of conditional is
+
+     #ifdef MACRO
+
+     CONTROLLED TEXT
+
+     #endif /* MACRO */
+
+   This block is called a "conditional group".  CONTROLLED TEXT will be
+included in the output of the preprocessor if and only if MACRO is
+defined.  We say that the conditional "succeeds" if MACRO is defined,
+"fails" if it is not.
+
+   The CONTROLLED TEXT inside of a conditional can include
+preprocessing directives.  They are executed only if the conditional
+succeeds.  You can nest conditional groups inside other conditional
+groups, but they must be completely nested.  In other words, `#endif'
+always matches the nearest `#ifdef' (or `#ifndef', or `#if').  Also,
+you cannot start a conditional group in one file and end it in another.
+
+   Even if a conditional fails, the CONTROLLED TEXT inside it is still
+run through initial transformations and tokenization.  Therefore, it
+must all be lexically valid C.  Normally the only way this matters is
+that all comments and string literals inside a failing conditional group
+must still be properly ended.
+
+   The comment following the `#endif' is not required, but it is a good
+practice if there is a lot of CONTROLLED TEXT, because it helps people
+match the `#endif' to the corresponding `#ifdef'.  Older programs
+sometimes put MACRO directly after the `#endif' without enclosing it in
+a comment.  This is invalid code according to the C standard.  CPP
+accepts it with a warning.  It never affects which `#ifndef' the
+`#endif' matches.
+
+   Sometimes you wish to use some code if a macro is _not_ defined.
+You can do this by writing `#ifndef' instead of `#ifdef'.  One common
+use of `#ifndef' is to include code only the first time a header file
+is included.  *Note Once-Only Headers::.
+
+   Macro definitions can vary between compilations for several reasons.
+Here are some samples.
+
+   * Some macros are predefined on each kind of machine (*note
+     System-specific Predefined Macros::).  This allows you to provide
+     code specially tuned for a particular machine.
+
+   * System header files define more macros, associated with the
+     features they implement.  You can test these macros with
+     conditionals to avoid using a system feature on a machine where it
+     is not implemented.
+
+   * Macros can be defined or undefined with the `-D' and `-U' command
+     line options when you compile the program.  You can arrange to
+     compile the same source file into two different programs by
+     choosing a macro name to specify which program you want, writing
+     conditionals to test whether or how this macro is defined, and
+     then controlling the state of the macro with command line options,
+     perhaps set in the Makefile.  *Note Invocation::.
+
+   * Your program might have a special header file (often called
+     `config.h') that is adjusted when the program is compiled.  It can
+     define or not define macros depending on the features of the
+     system and the desired capabilities of the program.  The
+     adjustment can be automated by a tool such as `autoconf', or done
+     by hand.
+
+
+File: cpp.info,  Node: If,  Next: Defined,  Prev: Ifdef,  Up: Conditional Syntax
+
+4.2.2 If
+--------
+
+The `#if' directive allows you to test the value of an arithmetic
+expression, rather than the mere existence of one macro.  Its syntax is
+
+     #if EXPRESSION
+
+     CONTROLLED TEXT
+
+     #endif /* EXPRESSION */
+
+   EXPRESSION is a C expression of integer type, subject to stringent
+restrictions.  It may contain
+
+   * Integer constants.
+
+   * Character constants, which are interpreted as they would be in
+     normal code.
+
+   * Arithmetic operators for addition, subtraction, multiplication,
+     division, bitwise operations, shifts, comparisons, and logical
+     operations (`&&' and `||').  The latter two obey the usual
+     short-circuiting rules of standard C.
+
+   * Macros.  All macros in the expression are expanded before actual
+     computation of the expression's value begins.
+
+   * Uses of the `defined' operator, which lets you check whether macros
+     are defined in the middle of an `#if'.
+
+   * Identifiers that are not macros, which are all considered to be the
+     number zero.  This allows you to write `#if MACRO' instead of
+     `#ifdef MACRO', if you know that MACRO, when defined, will always
+     have a nonzero value.  Function-like macros used without their
+     function call parentheses are also treated as zero.
+
+     In some contexts this shortcut is undesirable.  The `-Wundef'
+     option causes GCC to warn whenever it encounters an identifier
+     which is not a macro in an `#if'.
+
+   The preprocessor does not know anything about types in the language.
+Therefore, `sizeof' operators are not recognized in `#if', and neither
+are `enum' constants.  They will be taken as identifiers which are not
+macros, and replaced by zero.  In the case of `sizeof', this is likely
+to cause the expression to be invalid.
+
+   The preprocessor calculates the value of EXPRESSION.  It carries out
+all calculations in the widest integer type known to the compiler; on
+most machines supported by GCC this is 64 bits.  This is not the same
+rule as the compiler uses to calculate the value of a constant
+expression, and may give different results in some cases.  If the value
+comes out to be nonzero, the `#if' succeeds and the CONTROLLED TEXT is
+included; otherwise it is skipped.
+
+
+File: cpp.info,  Node: Defined,  Next: Else,  Prev: If,  Up: Conditional Syntax
+
+4.2.3 Defined
+-------------
+
+The special operator `defined' is used in `#if' and `#elif' expressions
+to test whether a certain name is defined as a macro.  `defined NAME'
+and `defined (NAME)' are both expressions whose value is 1 if NAME is
+defined as a macro at the current point in the program, and 0
+otherwise.  Thus,  `#if defined MACRO' is precisely equivalent to
+`#ifdef MACRO'.
+
+   `defined' is useful when you wish to test more than one macro for
+existence at once.  For example,
+
+     #if defined (__vax__) || defined (__ns16000__)
+
+would succeed if either of the names `__vax__' or `__ns16000__' is
+defined as a macro.
+
+   Conditionals written like this:
+
+     #if defined BUFSIZE && BUFSIZE >= 1024
+
+can generally be simplified to just `#if BUFSIZE >= 1024', since if
+`BUFSIZE' is not defined, it will be interpreted as having the value
+zero.
+
+   If the `defined' operator appears as a result of a macro expansion,
+the C standard says the behavior is undefined.  GNU cpp treats it as a
+genuine `defined' operator and evaluates it normally.  It will warn
+wherever your code uses this feature if you use the command-line option
+`-pedantic', since other compilers may handle it differently.
+
+
+File: cpp.info,  Node: Else,  Next: Elif,  Prev: Defined,  Up: Conditional Syntax
+
+4.2.4 Else
+----------
+
+The `#else' directive can be added to a conditional to provide
+alternative text to be used if the condition fails.  This is what it
+looks like:
+
+     #if EXPRESSION
+     TEXT-IF-TRUE
+     #else /* Not EXPRESSION */
+     TEXT-IF-FALSE
+     #endif /* Not EXPRESSION */
+
+If EXPRESSION is nonzero, the TEXT-IF-TRUE is included and the
+TEXT-IF-FALSE is skipped.  If EXPRESSION is zero, the opposite happens.
+
+   You can use `#else' with `#ifdef' and `#ifndef', too.
+
+
+File: cpp.info,  Node: Elif,  Prev: Else,  Up: Conditional Syntax
+
+4.2.5 Elif
+----------
+
+One common case of nested conditionals is used to check for more than
+two possible alternatives.  For example, you might have
+
+     #if X == 1
+     ...
+     #else /* X != 1 */
+     #if X == 2
+     ...
+     #else /* X != 2 */
+     ...
+     #endif /* X != 2 */
+     #endif /* X != 1 */
+
+   Another conditional directive, `#elif', allows this to be
+abbreviated as follows:
+
+     #if X == 1
+     ...
+     #elif X == 2
+     ...
+     #else /* X != 2 and X != 1*/
+     ...
+     #endif /* X != 2 and X != 1*/
+
+   `#elif' stands for "else if".  Like `#else', it goes in the middle
+of a conditional group and subdivides it; it does not require a
+matching `#endif' of its own.  Like `#if', the `#elif' directive
+includes an expression to be tested.  The text following the `#elif' is
+processed only if the original `#if'-condition failed and the `#elif'
+condition succeeds.
+
+   More than one `#elif' can go in the same conditional group.  Then
+the text after each `#elif' is processed only if the `#elif' condition
+succeeds after the original `#if' and all previous `#elif' directives
+within it have failed.
+
+   `#else' is allowed after any number of `#elif' directives, but
+`#elif' may not follow `#else'.
+
+
+File: cpp.info,  Node: Deleted Code,  Prev: Conditional Syntax,  Up: Conditionals
+
+4.3 Deleted Code
+================
+
+If you replace or delete a part of the program but want to keep the old
+code around for future reference, you often cannot simply comment it
+out.  Block comments do not nest, so the first comment inside the old
+code will end the commenting-out.  The probable result is a flood of
+syntax errors.
+
+   One way to avoid this problem is to use an always-false conditional
+instead.  For instance, put `#if 0' before the deleted code and
+`#endif' after it.  This works even if the code being turned off
+contains conditionals, but they must be entire conditionals (balanced
+`#if' and `#endif').
+
+   Some people use `#ifdef notdef' instead.  This is risky, because
+`notdef' might be accidentally defined as a macro, and then the
+conditional would succeed.  `#if 0' can be counted on to fail.
+
+   Do not use `#if 0' for comments which are not C code.  Use a real
+comment, instead.  The interior of `#if 0' must consist of complete
+tokens; in particular, single-quote characters must balance.  Comments
+often contain unbalanced single-quote characters (known in English as
+apostrophes).  These confuse `#if 0'.  They don't confuse `/*'.
+
+
+File: cpp.info,  Node: Diagnostics,  Next: Line Control,  Prev: Conditionals,  Up: Top
+
+5 Diagnostics
+*************
+
+The directive `#error' causes the preprocessor to report a fatal error.
+The tokens forming the rest of the line following `#error' are used as
+the error message.
+
+   You would use `#error' inside of a conditional that detects a
+combination of parameters which you know the program does not properly
+support.  For example, if you know that the program will not run
+properly on a VAX, you might write
+
+     #ifdef __vax__
+     #error "Won't work on VAXen.  See comments at get_last_object."
+     #endif
+
+   If you have several configuration parameters that must be set up by
+the installation in a consistent way, you can use conditionals to detect
+an inconsistency and report it with `#error'.  For example,
+
+     #if !defined(UNALIGNED_INT_ASM_OP) && defined(DWARF2_DEBUGGING_INFO)
+     #error "DWARF2_DEBUGGING_INFO requires UNALIGNED_INT_ASM_OP."
+     #endif
+
+   The directive `#warning' is like `#error', but causes the
+preprocessor to issue a warning and continue preprocessing.  The tokens
+following `#warning' are used as the warning message.
+
+   You might use `#warning' in obsolete header files, with a message
+directing the user to the header file which should be used instead.
+
+   Neither `#error' nor `#warning' macro-expands its argument.
+Internal whitespace sequences are each replaced with a single space.
+The line must consist of complete tokens.  It is wisest to make the
+argument of these directives be a single string constant; this avoids
+problems with apostrophes and the like.
+
+
+File: cpp.info,  Node: Line Control,  Next: Pragmas,  Prev: Diagnostics,  Up: Top
+
+6 Line Control
+**************
+
+The C preprocessor informs the C compiler of the location in your source
+code where each token came from.  Presently, this is just the file name
+and line number.  All the tokens resulting from macro expansion are
+reported as having appeared on the line of the source file where the
+outermost macro was used.  We intend to be more accurate in the future.
+
+   If you write a program which generates source code, such as the
+`bison' parser generator, you may want to adjust the preprocessor's
+notion of the current file name and line number by hand.  Parts of the
+output from `bison' are generated from scratch, other parts come from a
+standard parser file.  The rest are copied verbatim from `bison''s
+input.  You would like compiler error messages and symbolic debuggers
+to be able to refer to `bison''s input file.
+
+   `bison' or any such program can arrange this by writing `#line'
+directives into the output file.  `#line' is a directive that specifies
+the original line number and source file name for subsequent input in
+the current preprocessor input file.  `#line' has three variants:
+
+`#line LINENUM'
+     LINENUM is a non-negative decimal integer constant.  It specifies
+     the line number which should be reported for the following line of
+     input.  Subsequent lines are counted from LINENUM.
+
+`#line LINENUM FILENAME'
+     LINENUM is the same as for the first form, and has the same
+     effect.  In addition, FILENAME is a string constant.  The
+     following line and all subsequent lines are reported to come from
+     the file it specifies, until something else happens to change that.
+     FILENAME is interpreted according to the normal rules for a string
+     constant: backslash escapes are interpreted.  This is different
+     from `#include'.
+
+     Previous versions of CPP did not interpret escapes in `#line'; we
+     have changed it because the standard requires they be interpreted,
+     and most other compilers do.
+
+`#line ANYTHING ELSE'
+     ANYTHING ELSE is checked for macro calls, which are expanded.  The
+     result should match one of the above two forms.
+
+   `#line' directives alter the results of the `__FILE__' and
+`__LINE__' predefined macros from that point on.  *Note Standard
+Predefined Macros::.  They do not have any effect on `#include''s idea
+of the directory containing the current file.  This is a change from
+GCC 2.95.  Previously, a file reading
+
+     #line 1 "../src/gram.y"
+     #include "gram.h"
+
+   would search for `gram.h' in `../src', then the `-I' chain; the
+directory containing the physical source file would not be searched.
+In GCC 3.0 and later, the `#include' is not affected by the presence of
+a `#line' referring to a different directory.
+
+   We made this change because the old behavior caused problems when
+generated source files were transported between machines.  For instance,
+it is common practice to ship generated parsers with a source release,
+so that people building the distribution do not need to have yacc or
+Bison installed.  These files frequently have `#line' directives
+referring to the directory tree of the system where the distribution was
+created.  If GCC tries to search for headers in those directories, the
+build is likely to fail.
+
+   The new behavior can cause failures too, if the generated file is not
+in the same directory as its source and it attempts to include a header
+which would be visible searching from the directory containing the
+source file.  However, this problem is easily solved with an additional
+`-I' switch on the command line.  The failures caused by the old
+semantics could sometimes be corrected only by editing the generated
+files, which is difficult and error-prone.
+
+
+File: cpp.info,  Node: Pragmas,  Next: Other Directives,  Prev: Line Control,  Up: Top
+
+7 Pragmas
+*********
+
+The `#pragma' directive is the method specified by the C standard for
+providing additional information to the compiler, beyond what is
+conveyed in the language itself.  Three forms of this directive
+(commonly known as "pragmas") are specified by the 1999 C standard.  A
+C compiler is free to attach any meaning it likes to other pragmas.
+
+   GCC has historically preferred to use extensions to the syntax of the
+language, such as `__attribute__', for this purpose.  However, GCC does
+define a few pragmas of its own.  These mostly have effects on the
+entire translation unit or source file.
+
+   In GCC version 3, all GNU-defined, supported pragmas have been given
+a `GCC' prefix.  This is in line with the `STDC' prefix on all pragmas
+defined by C99.  For backward compatibility, pragmas which were
+recognized by previous versions are still recognized without the `GCC'
+prefix, but that usage is deprecated.  Some older pragmas are
+deprecated in their entirety.  They are not recognized with the `GCC'
+prefix.  *Note Obsolete Features::.
+
+   C99 introduces the `_Pragma' operator.  This feature addresses a
+major problem with `#pragma': being a directive, it cannot be produced
+as the result of macro expansion.  `_Pragma' is an operator, much like
+`sizeof' or `defined', and can be embedded in a macro.
+
+   Its syntax is `_Pragma (STRING-LITERAL)', where STRING-LITERAL can
+be either a normal or wide-character string literal.  It is
+destringized, by replacing all `\\' with a single `\' and all `\"' with
+a `"'.  The result is then processed as if it had appeared as the right
+hand side of a `#pragma' directive.  For example,
+
+     _Pragma ("GCC dependency \"parse.y\"")
+
+has the same effect as `#pragma GCC dependency "parse.y"'.  The same
+effect could be achieved using macros, for example
+
+     #define DO_PRAGMA(x) _Pragma (#x)
+     DO_PRAGMA (GCC dependency "parse.y")
+
+   The standard is unclear on where a `_Pragma' operator can appear.
+The preprocessor does not accept it within a preprocessing conditional
+directive like `#if'.  To be safe, you are probably best keeping it out
+of directives other than `#define', and putting it on a line of its own.
+
+   This manual documents the pragmas which are meaningful to the
+preprocessor itself.  Other pragmas are meaningful to the C or C++
+compilers.  They are documented in the GCC manual.
+
+   GCC plugins may provide their own pragmas.
+
+`#pragma GCC dependency'
+     `#pragma GCC dependency' allows you to check the relative dates of
+     the current file and another file.  If the other file is more
+     recent than the current file, a warning is issued.  This is useful
+     if the current file is derived from the other file, and should be
+     regenerated.  The other file is searched for using the normal
+     include search path.  Optional trailing text can be used to give
+     more information in the warning message.
+
+          #pragma GCC dependency "parse.y"
+          #pragma GCC dependency "/usr/include/time.h" rerun fixincludes
+
+`#pragma GCC poison'
+     Sometimes, there is an identifier that you want to remove
+     completely from your program, and make sure that it never creeps
+     back in.  To enforce this, you can "poison" the identifier with
+     this pragma.  `#pragma GCC poison' is followed by a list of
+     identifiers to poison.  If any of those identifiers appears
+     anywhere in the source after the directive, it is a hard error.
+     For example,
+
+          #pragma GCC poison printf sprintf fprintf
+          sprintf(some_string, "hello");
+
+     will produce an error.
+
+     If a poisoned identifier appears as part of the expansion of a
+     macro which was defined before the identifier was poisoned, it
+     will _not_ cause an error.  This lets you poison an identifier
+     without worrying about system headers defining macros that use it.
+
+     For example,
+
+          #define strrchr rindex
+          #pragma GCC poison rindex
+          strrchr(some_string, 'h');
+
+     will not produce an error.
+
+`#pragma GCC system_header'
+     This pragma takes no arguments.  It causes the rest of the code in
+     the current file to be treated as if it came from a system header.
+     *Note System Headers::.
+
+
+
+File: cpp.info,  Node: Other Directives,  Next: Preprocessor Output,  Prev: Pragmas,  Up: Top
+
+8 Other Directives
+******************
+
+The `#ident' directive takes one argument, a string constant.  On some
+systems, that string constant is copied into a special segment of the
+object file.  On other systems, the directive is ignored.  The `#sccs'
+directive is a synonym for `#ident'.
+
+   These directives are not part of the C standard, but they are not
+official GNU extensions either.  What historical information we have
+been able to find, suggests they originated with System V.
+
+   The "null directive" consists of a `#' followed by a newline, with
+only whitespace (including comments) in between.  A null directive is
+understood as a preprocessing directive but has no effect on the
+preprocessor output.  The primary significance of the existence of the
+null directive is that an input line consisting of just a `#' will
+produce no output, rather than a line of output containing just a `#'.
+Supposedly some old C programs contain such lines.
+
+
+File: cpp.info,  Node: Preprocessor Output,  Next: Traditional Mode,  Prev: Other Directives,  Up: Top
+
+9 Preprocessor Output
+*********************
+
+When the C preprocessor is used with the C, C++, or Objective-C
+compilers, it is integrated into the compiler and communicates a stream
+of binary tokens directly to the compiler's parser.  However, it can
+also be used in the more conventional standalone mode, where it produces
+textual output.
+
+   The output from the C preprocessor looks much like the input, except
+that all preprocessing directive lines have been replaced with blank
+lines and all comments with spaces.  Long runs of blank lines are
+discarded.
+
+   The ISO standard specifies that it is implementation defined whether
+a preprocessor preserves whitespace between tokens, or replaces it with
+e.g. a single space.  In GNU CPP, whitespace between tokens is collapsed
+to become a single space, with the exception that the first token on a
+non-directive line is preceded with sufficient spaces that it appears in
+the same column in the preprocessed output that it appeared in the
+original source file.  This is so the output is easy to read.  *Note
+Differences from previous versions::.  CPP does not insert any
+whitespace where there was none in the original source, except where
+necessary to prevent an accidental token paste.
+
+   Source file name and line number information is conveyed by lines of
+the form
+
+     # LINENUM FILENAME FLAGS
+
+These are called "linemarkers".  They are inserted as needed into the
+output (but never within a string or character constant).  They mean
+that the following line originated in file FILENAME at line LINENUM.
+FILENAME will never contain any non-printing characters; they are
+replaced with octal escape sequences.
+
+   After the file name comes zero or more flags, which are `1', `2',
+`3', or `4'.  If there are multiple flags, spaces separate them.  Here
+is what the flags mean:
+
+`1'
+     This indicates the start of a new file.
+
+`2'
+     This indicates returning to a file (after having included another
+     file).
+
+`3'
+     This indicates that the following text comes from a system header
+     file, so certain warnings should be suppressed.
+
+`4'
+     This indicates that the following text should be treated as being
+     wrapped in an implicit `extern "C"' block.
+
+   As an extension, the preprocessor accepts linemarkers in
+non-assembler input files.  They are treated like the corresponding
+`#line' directive, (*note Line Control::), except that trailing flags
+are permitted, and are interpreted with the meanings described above.
+If multiple flags are given, they must be in ascending order.
+
+   Some directives may be duplicated in the output of the preprocessor.
+These are `#ident' (always), `#pragma' (only if the preprocessor does
+not handle the pragma itself), and `#define' and `#undef' (with certain
+debugging options).  If this happens, the `#' of the directive will
+always be in the first column, and there will be no space between the
+`#' and the directive name.  If macro expansion happens to generate
+tokens which might be mistaken for a duplicated directive, a space will
+be inserted between the `#' and the directive name.
+
+
+File: cpp.info,  Node: Traditional Mode,  Next: Implementation Details,  Prev: Preprocessor Output,  Up: Top
+
+10 Traditional Mode
+*******************
+
+Traditional (pre-standard) C preprocessing is rather different from the
+preprocessing specified by the standard.  When GCC is given the
+`-traditional-cpp' option, it attempts to emulate a traditional
+preprocessor.
+
+   GCC versions 3.2 and later only support traditional mode semantics in
+the preprocessor, and not in the compiler front ends.  This chapter
+outlines the traditional preprocessor semantics we implemented.
+
+   The implementation does not correspond precisely to the behavior of
+earlier versions of GCC, nor to any true traditional preprocessor.
+After all, inconsistencies among traditional implementations were a
+major motivation for C standardization.  However, we intend that it
+should be compatible with true traditional preprocessors in all ways
+that actually matter.
+
+* Menu:
+
+* Traditional lexical analysis::
+* Traditional macros::
+* Traditional miscellany::
+* Traditional warnings::
+
+
+File: cpp.info,  Node: Traditional lexical analysis,  Next: Traditional macros,  Up: Traditional Mode
+
+10.1 Traditional lexical analysis
+=================================
+
+The traditional preprocessor does not decompose its input into tokens
+the same way a standards-conforming preprocessor does.  The input is
+simply treated as a stream of text with minimal internal form.
+
+   This implementation does not treat trigraphs (*note trigraphs::)
+specially since they were an invention of the standards committee.  It
+handles arbitrarily-positioned escaped newlines properly and splices
+the lines as you would expect; many traditional preprocessors did not
+do this.
+
+   The form of horizontal whitespace in the input file is preserved in
+the output.  In particular, hard tabs remain hard tabs.  This can be
+useful if, for example, you are preprocessing a Makefile.
+
+   Traditional CPP only recognizes C-style block comments, and treats
+the `/*' sequence as introducing a comment only if it lies outside
+quoted text.  Quoted text is introduced by the usual single and double
+quotes, and also by an initial `<' in a `#include' directive.
+
+   Traditionally, comments are completely removed and are not replaced
+with a space.  Since a traditional compiler does its own tokenization
+of the output of the preprocessor, this means that comments can
+effectively be used as token paste operators.  However, comments behave
+like separators for text handled by the preprocessor itself, since it
+doesn't re-lex its input.  For example, in
+
+     #if foo/**/bar
+
+`foo' and `bar' are distinct identifiers and expanded separately if
+they happen to be macros.  In other words, this directive is equivalent
+to
+
+     #if foo bar
+
+rather than
+
+     #if foobar
+
+   Generally speaking, in traditional mode an opening quote need not
+have a matching closing quote.  In particular, a macro may be defined
+with replacement text that contains an unmatched quote.  Of course, if
+you attempt to compile preprocessed output containing an unmatched quote
+you will get a syntax error.
+
+   However, all preprocessing directives other than `#define' require
+matching quotes.  For example:
+
+     #define m This macro's fine and has an unmatched quote
+     "/* This is not a comment.  */
+     /* This is a comment.  The following #include directive
+        is ill-formed.  */
+     #include <stdio.h
+
+   Just as for the ISO preprocessor, what would be a closing quote can
+be escaped with a backslash to prevent the quoted text from closing.
+
+
+File: cpp.info,  Node: Traditional macros,  Next: Traditional miscellany,  Prev: Traditional lexical analysis,  Up: Traditional Mode
+
+10.2 Traditional macros
+=======================
+
+The major difference between traditional and ISO macros is that the
+former expand to text rather than to a token sequence.  CPP removes all
+leading and trailing horizontal whitespace from a macro's replacement
+text before storing it, but preserves the form of internal whitespace.
+
+   One consequence is that it is legitimate for the replacement text to
+contain an unmatched quote (*note Traditional lexical analysis::).  An
+unclosed string or character constant continues into the text following
+the macro call.  Similarly, the text at the end of a macro's expansion
+can run together with the text after the macro invocation to produce a
+single token.
+
+   Normally comments are removed from the replacement text after the
+macro is expanded, but if the `-CC' option is passed on the command
+line comments are preserved.  (In fact, the current implementation
+removes comments even before saving the macro replacement text, but it
+careful to do it in such a way that the observed effect is identical
+even in the function-like macro case.)
+
+   The ISO stringification operator `#' and token paste operator `##'
+have no special meaning.  As explained later, an effect similar to
+these operators can be obtained in a different way.  Macro names that
+are embedded in quotes, either from the main file or after macro
+replacement, do not expand.
+
+   CPP replaces an unquoted object-like macro name with its replacement
+text, and then rescans it for further macros to replace.  Unlike
+standard macro expansion, traditional macro expansion has no provision
+to prevent recursion.  If an object-like macro appears unquoted in its
+replacement text, it will be replaced again during the rescan pass, and
+so on _ad infinitum_.  GCC detects when it is expanding recursive
+macros, emits an error message, and continues after the offending macro
+invocation.
+
+     #define PLUS +
+     #define INC(x) PLUS+x
+     INC(foo);
+          ==> ++foo;
+
+   Function-like macros are similar in form but quite different in
+behavior to their ISO counterparts.  Their arguments are contained
+within parentheses, are comma-separated, and can cross physical lines.
+Commas within nested parentheses are not treated as argument
+separators.  Similarly, a quote in an argument cannot be left unclosed;
+a following comma or parenthesis that comes before the closing quote is
+treated like any other character.  There is no facility for handling
+variadic macros.
+
+   This implementation removes all comments from macro arguments, unless
+the `-C' option is given.  The form of all other horizontal whitespace
+in arguments is preserved, including leading and trailing whitespace.
+In particular
+
+     f( )
+
+is treated as an invocation of the macro `f' with a single argument
+consisting of a single space.  If you want to invoke a function-like
+macro that takes no arguments, you must not leave any whitespace
+between the parentheses.
+
+   If a macro argument crosses a new line, the new line is replaced with
+a space when forming the argument.  If the previous line contained an
+unterminated quote, the following line inherits the quoted state.
+
+   Traditional preprocessors replace parameters in the replacement text
+with their arguments regardless of whether the parameters are within
+quotes or not.  This provides a way to stringize arguments.  For example
+
+     #define str(x) "x"
+     str(/* A comment */some text )
+          ==> "some text "
+
+Note that the comment is removed, but that the trailing space is
+preserved.  Here is an example of using a comment to effect token
+pasting.
+
+     #define suffix(x) foo_/**/x
+     suffix(bar)
+          ==> foo_bar
+
+
+File: cpp.info,  Node: Traditional miscellany,  Next: Traditional warnings,  Prev: Traditional macros,  Up: Traditional Mode
+
+10.3 Traditional miscellany
+===========================
+
+Here are some things to be aware of when using the traditional
+preprocessor.
+
+   * Preprocessing directives are recognized only when their leading
+     `#' appears in the first column.  There can be no whitespace
+     between the beginning of the line and the `#', but whitespace can
+     follow the `#'.
+
+   * A true traditional C preprocessor does not recognize `#error' or
+     `#pragma', and may not recognize `#elif'.  CPP supports all the
+     directives in traditional mode that it supports in ISO mode,
+     including extensions, with the exception that the effects of
+     `#pragma GCC poison' are undefined.
+
+   * __STDC__ is not defined.
+
+   * If you use digraphs the behavior is undefined.
+
+   * If a line that looks like a directive appears within macro
+     arguments, the behavior is undefined.
+
+
+
+File: cpp.info,  Node: Traditional warnings,  Prev: Traditional miscellany,  Up: Traditional Mode
+
+10.4 Traditional warnings
+=========================
+
+You can request warnings about features that did not exist, or worked
+differently, in traditional C with the `-Wtraditional' option.  GCC
+does not warn about features of ISO C which you must use when you are
+using a conforming compiler, such as the `#' and `##' operators.
+
+   Presently `-Wtraditional' warns about:
+
+   * Macro parameters that appear within string literals in the macro
+     body.  In traditional C macro replacement takes place within
+     string literals, but does not in ISO C.
+
+   * In traditional C, some preprocessor directives did not exist.
+     Traditional preprocessors would only consider a line to be a
+     directive if the `#' appeared in column 1 on the line.  Therefore
+     `-Wtraditional' warns about directives that traditional C
+     understands but would ignore because the `#' does not appear as the
+     first character on the line.  It also suggests you hide directives
+     like `#pragma' not understood by traditional C by indenting them.
+     Some traditional implementations would not recognize `#elif', so it
+     suggests avoiding it altogether.
+
+   * A function-like macro that appears without an argument list.  In
+     some traditional preprocessors this was an error.  In ISO C it
+     merely means that the macro is not expanded.
+
+   * The unary plus operator.  This did not exist in traditional C.
+
+   * The `U' and `LL' integer constant suffixes, which were not
+     available in traditional C.  (Traditional C does support the `L'
+     suffix for simple long integer constants.)  You are not warned
+     about uses of these suffixes in macros defined in system headers.
+     For instance, `UINT_MAX' may well be defined as `4294967295U', but
+     you will not be warned if you use `UINT_MAX'.
+
+     You can usually avoid the warning, and the related warning about
+     constants which are so large that they are unsigned, by writing the
+     integer constant in question in hexadecimal, with no U suffix.
+     Take care, though, because this gives the wrong result in exotic
+     cases.
+
+
+File: cpp.info,  Node: Implementation Details,  Next: Invocation,  Prev: Traditional Mode,  Up: Top
+
+11 Implementation Details
+*************************
+
+Here we document details of how the preprocessor's implementation
+affects its user-visible behavior.  You should try to avoid undue
+reliance on behavior described here, as it is possible that it will
+change subtly in future implementations.
+
+   Also documented here are obsolete features and changes from previous
+versions of CPP.
+
+* Menu:
+
+* Implementation-defined behavior::
+* Implementation limits::
+* Obsolete Features::
+* Differences from previous versions::
+
+
+File: cpp.info,  Node: Implementation-defined behavior,  Next: Implementation limits,  Up: Implementation Details
+
+11.1 Implementation-defined behavior
+====================================
+
+This is how CPP behaves in all the cases which the C standard describes
+as "implementation-defined".  This term means that the implementation
+is free to do what it likes, but must document its choice and stick to
+it.
+
+   * The mapping of physical source file multi-byte characters to the
+     execution character set.
+
+     The input character set can be specified using the
+     `-finput-charset' option, while the execution character set may be
+     controlled using the `-fexec-charset' and `-fwide-exec-charset'
+     options.
+
+   * Identifier characters.  The C and C++ standards allow identifiers
+     to be composed of `_' and the alphanumeric characters.  C++ and
+     C99 also allow universal character names, and C99 further permits
+     implementation-defined characters.  GCC currently only permits
+     universal character names if `-fextended-identifiers' is used,
+     because the implementation of universal character names in
+     identifiers is experimental.
+
+     GCC allows the `$' character in identifiers as an extension for
+     most targets.  This is true regardless of the `std=' switch, since
+     this extension cannot conflict with standards-conforming programs.
+     When preprocessing assembler, however, dollars are not identifier
+     characters by default.
+
+     Currently the targets that by default do not permit `$' are AVR,
+     IP2K, MMIX, MIPS Irix 3, ARM aout, and PowerPC targets for the AIX
+     operating system.
+
+     You can override the default with `-fdollars-in-identifiers' or
+     `fno-dollars-in-identifiers'.  *Note fdollars-in-identifiers::.
+
+   * Non-empty sequences of whitespace characters.
+
+     In textual output, each whitespace sequence is collapsed to a
+     single space.  For aesthetic reasons, the first token on each
+     non-directive line of output is preceded with sufficient spaces
+     that it appears in the same column as it did in the original
+     source file.
+
+   * The numeric value of character constants in preprocessor
+     expressions.
+
+     The preprocessor and compiler interpret character constants in the
+     same way; i.e. escape sequences such as `\a' are given the values
+     they would have on the target machine.
+
+     The compiler evaluates a multi-character character constant a
+     character at a time, shifting the previous value left by the
+     number of bits per target character, and then or-ing in the
+     bit-pattern of the new character truncated to the width of a
+     target character.  The final bit-pattern is given type `int', and
+     is therefore signed, regardless of whether single characters are
+     signed or not (a slight change from versions 3.1 and earlier of
+     GCC).  If there are more characters in the constant than would fit
+     in the target `int' the compiler issues a warning, and the excess
+     leading characters are ignored.
+
+     For example, `'ab'' for a target with an 8-bit `char' would be
+     interpreted as
+     `(int) ((unsigned char) 'a' * 256 + (unsigned char) 'b')', and
+     `'\234a'' as
+     `(int) ((unsigned char) '\234' * 256 + (unsigned char) 'a')'.
+
+   * Source file inclusion.
+
+     For a discussion on how the preprocessor locates header files,
+     *note Include Operation::.
+
+   * Interpretation of the filename resulting from a macro-expanded
+     `#include' directive.
+
+     *Note Computed Includes::.
+
+   * Treatment of a `#pragma' directive that after macro-expansion
+     results in a standard pragma.
+
+     No macro expansion occurs on any `#pragma' directive line, so the
+     question does not arise.
+
+     Note that GCC does not yet implement any of the standard pragmas.
+
+
+
+File: cpp.info,  Node: Implementation limits,  Next: Obsolete Features,  Prev: Implementation-defined behavior,  Up: Implementation Details
+
+11.2 Implementation limits
+==========================
+
+CPP has a small number of internal limits.  This section lists the
+limits which the C standard requires to be no lower than some minimum,
+and all the others known.  It is intended that there should be as few
+limits as possible.  If you encounter an undocumented or inconvenient
+limit, please report that as a bug.  *Note Reporting Bugs: (gcc)Bugs.
+
+   Where we say something is limited "only by available memory", that
+means that internal data structures impose no intrinsic limit, and space
+is allocated with `malloc' or equivalent.  The actual limit will
+therefore depend on many things, such as the size of other things
+allocated by the compiler at the same time, the amount of memory
+consumed by other processes on the same computer, etc.
+
+   * Nesting levels of `#include' files.
+
+     We impose an arbitrary limit of 200 levels, to avoid runaway
+     recursion.  The standard requires at least 15 levels.
+
+   * Nesting levels of conditional inclusion.
+
+     The C standard mandates this be at least 63.  CPP is limited only
+     by available memory.
+
+   * Levels of parenthesized expressions within a full expression.
+
+     The C standard requires this to be at least 63.  In preprocessor
+     conditional expressions, it is limited only by available memory.
+
+   * Significant initial characters in an identifier or macro name.
+
+     The preprocessor treats all characters as significant.  The C
+     standard requires only that the first 63 be significant.
+
+   * Number of macros simultaneously defined in a single translation
+     unit.
+
+     The standard requires at least 4095 be possible.  CPP is limited
+     only by available memory.
+
+   * Number of parameters in a macro definition and arguments in a
+     macro call.
+
+     We allow `USHRT_MAX', which is no smaller than 65,535.  The minimum
+     required by the standard is 127.
+
+   * Number of characters on a logical source line.
+
+     The C standard requires a minimum of 4096 be permitted.  CPP places
+     no limits on this, but you may get incorrect column numbers
+     reported in diagnostics for lines longer than 65,535 characters.
+
+   * Maximum size of a source file.
+
+     The standard does not specify any lower limit on the maximum size
+     of a source file.  GNU cpp maps files into memory, so it is
+     limited by the available address space.  This is generally at
+     least two gigabytes.  Depending on the operating system, the size
+     of physical memory may or may not be a limitation.
+
+
+
+File: cpp.info,  Node: Obsolete Features,  Next: Differences from previous versions,  Prev: Implementation limits,  Up: Implementation Details
+
+11.3 Obsolete Features
+======================
+
+CPP has some features which are present mainly for compatibility with
+older programs.  We discourage their use in new code.  In some cases,
+we plan to remove the feature in a future version of GCC.
+
+11.3.1 Assertions
+-----------------
+
+"Assertions" are a deprecated alternative to macros in writing
+conditionals to test what sort of computer or system the compiled
+program will run on.  Assertions are usually predefined, but you can
+define them with preprocessing directives or command-line options.
+
+   Assertions were intended to provide a more systematic way to describe
+the compiler's target system.  However, in practice they are just as
+unpredictable as the system-specific predefined macros.  In addition,
+they are not part of any standard, and only a few compilers support
+them.  Therefore, the use of assertions is *less* portable than the use
+of system-specific predefined macros.  We recommend you do not use them
+at all.
+
+   An assertion looks like this:
+
+     #PREDICATE (ANSWER)
+
+PREDICATE must be a single identifier.  ANSWER can be any sequence of
+tokens; all characters are significant except for leading and trailing
+whitespace, and differences in internal whitespace sequences are
+ignored.  (This is similar to the rules governing macro redefinition.)
+Thus, `(x + y)' is different from `(x+y)' but equivalent to
+`( x + y )'.  Parentheses do not nest inside an answer.
+
+   To test an assertion, you write it in an `#if'.  For example, this
+conditional succeeds if either `vax' or `ns16000' has been asserted as
+an answer for `machine'.
+
+     #if #machine (vax) || #machine (ns16000)
+
+You can test whether _any_ answer is asserted for a predicate by
+omitting the answer in the conditional:
+
+     #if #machine
+
+   Assertions are made with the `#assert' directive.  Its sole argument
+is the assertion to make, without the leading `#' that identifies
+assertions in conditionals.
+
+     #assert PREDICATE (ANSWER)
+
+You may make several assertions with the same predicate and different
+answers.  Subsequent assertions do not override previous ones for the
+same predicate.  All the answers for any given predicate are
+simultaneously true.
+
+   Assertions can be canceled with the `#unassert' directive.  It has
+the same syntax as `#assert'.  In that form it cancels only the answer
+which was specified on the `#unassert' line; other answers for that
+predicate remain true.  You can cancel an entire predicate by leaving
+out the answer:
+
+     #unassert PREDICATE
+
+In either form, if no such assertion has been made, `#unassert' has no
+effect.
+
+   You can also make or cancel assertions using command line options.
+*Note Invocation::.
+
+
+File: cpp.info,  Node: Differences from previous versions,  Prev: Obsolete Features,  Up: Implementation Details
+
+11.4 Differences from previous versions
+=======================================
+
+This section details behavior which has changed from previous versions
+of CPP.  We do not plan to change it again in the near future, but we
+do not promise not to, either.
+
+   The "previous versions" discussed here are 2.95 and before.  The
+behavior of GCC 3.0 is mostly the same as the behavior of the widely
+used 2.96 and 2.97 development snapshots.  Where there are differences,
+they generally represent bugs in the snapshots.
+
+   * -I- deprecated
+
+     This option has been deprecated in 4.0.  `-iquote' is meant to
+     replace the need for this option.
+
+   * Order of evaluation of `#' and `##' operators
+
+     The standard does not specify the order of evaluation of a chain of
+     `##' operators, nor whether `#' is evaluated before, after, or at
+     the same time as `##'.  You should therefore not write any code
+     which depends on any specific ordering.  It is possible to
+     guarantee an ordering, if you need one, by suitable use of nested
+     macros.
+
+     An example of where this might matter is pasting the arguments `1',
+     `e' and `-2'.  This would be fine for left-to-right pasting, but
+     right-to-left pasting would produce an invalid token `e-2'.
+
+     GCC 3.0 evaluates `#' and `##' at the same time and strictly left
+     to right.  Older versions evaluated all `#' operators first, then
+     all `##' operators, in an unreliable order.
+
+   * The form of whitespace between tokens in preprocessor output
+
+     *Note Preprocessor Output::, for the current textual format.  This
+     is also the format used by stringification.  Normally, the
+     preprocessor communicates tokens directly to the compiler's
+     parser, and whitespace does not come up at all.
+
+     Older versions of GCC preserved all whitespace provided by the
+     user and inserted lots more whitespace of their own, because they
+     could not accurately predict when extra spaces were needed to
+     prevent accidental token pasting.
+
+   * Optional argument when invoking rest argument macros
+
+     As an extension, GCC permits you to omit the variable arguments
+     entirely when you use a variable argument macro.  This is
+     forbidden by the 1999 C standard, and will provoke a pedantic
+     warning with GCC 3.0.  Previous versions accepted it silently.
+
+   * `##' swallowing preceding text in rest argument macros
+
+     Formerly, in a macro expansion, if `##' appeared before a variable
+     arguments parameter, and the set of tokens specified for that
+     argument in the macro invocation was empty, previous versions of
+     CPP would back up and remove the preceding sequence of
+     non-whitespace characters (*not* the preceding token).  This
+     extension is in direct conflict with the 1999 C standard and has
+     been drastically pared back.
+
+     In the current version of the preprocessor, if `##' appears between
+     a comma and a variable arguments parameter, and the variable
+     argument is omitted entirely, the comma will be removed from the
+     expansion.  If the variable argument is empty, or the token before
+     `##' is not a comma, then `##' behaves as a normal token paste.
+
+   * `#line' and `#include'
+
+     The `#line' directive used to change GCC's notion of the
+     "directory containing the current file", used by `#include' with a
+     double-quoted header file name.  In 3.0 and later, it does not.
+     *Note Line Control::, for further explanation.
+
+   * Syntax of `#line'
+
+     In GCC 2.95 and previous, the string constant argument to `#line'
+     was treated the same way as the argument to `#include': backslash
+     escapes were not honored, and the string ended at the second `"'.
+     This is not compliant with the C standard.  In GCC 3.0, an attempt
+     was made to correct the behavior, so that the string was treated
+     as a real string constant, but it turned out to be buggy.  In 3.1,
+     the bugs have been fixed.  (We are not fixing the bugs in 3.0
+     because they affect relatively few people and the fix is quite
+     invasive.)
+
+
+
+File: cpp.info,  Node: Invocation,  Next: Environment Variables,  Prev: Implementation Details,  Up: Top
+
+12 Invocation
+*************
+
+Most often when you use the C preprocessor you will not have to invoke
+it explicitly: the C compiler will do so automatically.  However, the
+preprocessor is sometimes useful on its own.  All the options listed
+here are also acceptable to the C compiler and have the same meaning,
+except that the C compiler has different rules for specifying the output
+file.
+
+   _Note:_ Whether you use the preprocessor by way of `gcc' or `cpp',
+the "compiler driver" is run first.  This program's purpose is to
+translate your command into invocations of the programs that do the
+actual work.  Their command line interfaces are similar but not
+identical to the documented interface, and may change without notice.
+
+   The C preprocessor expects two file names as arguments, INFILE and
+OUTFILE.  The preprocessor reads INFILE together with any other files
+it specifies with `#include'.  All the output generated by the combined
+input files is written in OUTFILE.
+
+   Either INFILE or OUTFILE may be `-', which as INFILE means to read
+from standard input and as OUTFILE means to write to standard output.
+Also, if either file is omitted, it means the same as if `-' had been
+specified for that file.
+
+   Unless otherwise noted, or the option ends in `=', all options which
+take an argument may have that argument appear either immediately after
+the option, or with a space between option and argument: `-Ifoo' and
+`-I foo' have the same effect.
+
+   Many options have multi-letter names; therefore multiple
+single-letter options may _not_ be grouped: `-dM' is very different from
+`-d -M'.
+
+`-D NAME'
+     Predefine NAME as a macro, with definition `1'.
+
+`-D NAME=DEFINITION'
+     The contents of DEFINITION are tokenized and processed as if they
+     appeared during translation phase three in a `#define' directive.
+     In particular, the definition will be truncated by embedded
+     newline characters.
+
+     If you are invoking the preprocessor from a shell or shell-like
+     program you may need to use the shell's quoting syntax to protect
+     characters such as spaces that have a meaning in the shell syntax.
+
+     If you wish to define a function-like macro on the command line,
+     write its argument list with surrounding parentheses before the
+     equals sign (if any).  Parentheses are meaningful to most shells,
+     so you will need to quote the option.  With `sh' and `csh',
+     `-D'NAME(ARGS...)=DEFINITION'' works.
+
+     `-D' and `-U' options are processed in the order they are given on
+     the command line.  All `-imacros FILE' and `-include FILE' options
+     are processed after all `-D' and `-U' options.
+
+`-U NAME'
+     Cancel any previous definition of NAME, either built in or
+     provided with a `-D' option.
+
+`-undef'
+     Do not predefine any system-specific or GCC-specific macros.  The
+     standard predefined macros remain defined.  *Note Standard
+     Predefined Macros::.
+
+`-I DIR'
+     Add the directory DIR to the list of directories to be searched
+     for header files.  *Note Search Path::.  Directories named by `-I'
+     are searched before the standard system include directories.  If
+     the directory DIR is a standard system include directory, the
+     option is ignored to ensure that the default search order for
+     system directories and the special treatment of system headers are
+     not defeated (*note System Headers::) .  If DIR begins with `=',
+     then the `=' will be replaced by the sysroot prefix; see
+     `--sysroot' and `-isysroot'.
+
+`-o FILE'
+     Write output to FILE.  This is the same as specifying FILE as the
+     second non-option argument to `cpp'.  `gcc' has a different
+     interpretation of a second non-option argument, so you must use
+     `-o' to specify the output file.
+
+`-Wall'
+     Turns on all optional warnings which are desirable for normal code.
+     At present this is `-Wcomment', `-Wtrigraphs', `-Wmultichar' and a
+     warning about integer promotion causing a change of sign in `#if'
+     expressions.  Note that many of the preprocessor's warnings are on
+     by default and have no options to control them.
+
+`-Wcomment'
+`-Wcomments'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a backslash-newline appears in a `//' comment.
+     (Both forms have the same effect.)
+
+`-Wtrigraphs'
+     Most trigraphs in comments cannot affect the meaning of the
+     program.  However, a trigraph that would form an escaped newline
+     (`??/' at the end of a line) can, by changing where the comment
+     begins or ends.  Therefore, only trigraphs that would form escaped
+     newlines produce warnings inside a comment.
+
+     This option is implied by `-Wall'.  If `-Wall' is not given, this
+     option is still enabled unless trigraphs are enabled.  To get
+     trigraph conversion without warnings, but get the other `-Wall'
+     warnings, use `-trigraphs -Wall -Wno-trigraphs'.
+
+`-Wtraditional'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and problematic constructs which
+     should be avoided.  *Note Traditional Mode::.
+
+`-Wundef'
+     Warn whenever an identifier which is not a macro is encountered in
+     an `#if' directive, outside of `defined'.  Such identifiers are
+     replaced with zero.
+
+`-Wunused-macros'
+     Warn about macros defined in the main file that are unused.  A
+     macro is "used" if it is expanded or tested for existence at least
+     once.  The preprocessor will also warn if the macro has not been
+     used at the time it is redefined or undefined.
+
+     Built-in macros, macros defined on the command line, and macros
+     defined in include files are not warned about.
+
+     _Note:_ If a macro is actually used, but only used in skipped
+     conditional blocks, then CPP will report it as unused.  To avoid
+     the warning in such a case, you might improve the scope of the
+     macro's definition by, for example, moving it into the first
+     skipped block.  Alternatively, you could provide a dummy use with
+     something like:
+
+          #if defined the_macro_causing_the_warning
+          #endif
+
+`-Wendif-labels'
+     Warn whenever an `#else' or an `#endif' are followed by text.
+     This usually happens in code of the form
+
+          #if FOO
+          ...
+          #else FOO
+          ...
+          #endif FOO
+
+     The second and third `FOO' should be in comments, but often are not
+     in older programs.  This warning is on by default.
+
+`-Werror'
+     Make all warnings into hard errors.  Source code which triggers
+     warnings will be rejected.
+
+`-Wsystem-headers'
+     Issue warnings for code in system headers.  These are normally
+     unhelpful in finding bugs in your own code, therefore suppressed.
+     If you are responsible for the system library, you may want to see
+     them.
+
+`-w'
+     Suppress all warnings, including those which GNU CPP issues by
+     default.
+
+`-pedantic'
+     Issue all the mandatory diagnostics listed in the C standard.
+     Some of them are left out by default, since they trigger
+     frequently on harmless code.
+
+`-pedantic-errors'
+     Issue all the mandatory diagnostics, and make all mandatory
+     diagnostics into errors.  This includes mandatory diagnostics that
+     GCC issues without `-pedantic' but treats as warnings.
+
+`-M'
+     Instead of outputting the result of preprocessing, output a rule
+     suitable for `make' describing the dependencies of the main source
+     file.  The preprocessor outputs one `make' rule containing the
+     object file name for that source file, a colon, and the names of
+     all the included files, including those coming from `-include' or
+     `-imacros' command line options.
+
+     Unless specified explicitly (with `-MT' or `-MQ'), the object file
+     name consists of the name of the source file with any suffix
+     replaced with object file suffix and with any leading directory
+     parts removed.  If there are many included files then the rule is
+     split into several lines using `\'-newline.  The rule has no
+     commands.
+
+     This option does not suppress the preprocessor's debug output,
+     such as `-dM'.  To avoid mixing such debug output with the
+     dependency rules you should explicitly specify the dependency
+     output file with `-MF', or use an environment variable like
+     `DEPENDENCIES_OUTPUT' (*note Environment Variables::).  Debug
+     output will still be sent to the regular output stream as normal.
+
+     Passing `-M' to the driver implies `-E', and suppresses warnings
+     with an implicit `-w'.
+
+`-MM'
+     Like `-M' but do not mention header files that are found in system
+     header directories, nor header files that are included, directly
+     or indirectly, from such a header.
+
+     This implies that the choice of angle brackets or double quotes in
+     an `#include' directive does not in itself determine whether that
+     header will appear in `-MM' dependency output.  This is a slight
+     change in semantics from GCC versions 3.0 and earlier.
+
+`-MF FILE'
+     When used with `-M' or `-MM', specifies a file to write the
+     dependencies to.  If no `-MF' switch is given the preprocessor
+     sends the rules to the same place it would have sent preprocessed
+     output.
+
+     When used with the driver options `-MD' or `-MMD', `-MF' overrides
+     the default dependency output file.
+
+`-MG'
+     In conjunction with an option such as `-M' requesting dependency
+     generation, `-MG' assumes missing header files are generated files
+     and adds them to the dependency list without raising an error.
+     The dependency filename is taken directly from the `#include'
+     directive without prepending any path.  `-MG' also suppresses
+     preprocessed output, as a missing header file renders this useless.
+
+     This feature is used in automatic updating of makefiles.
+
+`-MP'
+     This option instructs CPP to add a phony target for each dependency
+     other than the main file, causing each to depend on nothing.  These
+     dummy rules work around errors `make' gives if you remove header
+     files without updating the `Makefile' to match.
+
+     This is typical output:
+
+          test.o: test.c test.h
+
+          test.h:
+
+`-MT TARGET'
+     Change the target of the rule emitted by dependency generation.  By
+     default CPP takes the name of the main input file, deletes any
+     directory components and any file suffix such as `.c', and appends
+     the platform's usual object suffix.  The result is the target.
+
+     An `-MT' option will set the target to be exactly the string you
+     specify.  If you want multiple targets, you can specify them as a
+     single argument to `-MT', or use multiple `-MT' options.
+
+     For example, `-MT '$(objpfx)foo.o'' might give
+
+          $(objpfx)foo.o: foo.c
+
+`-MQ TARGET'
+     Same as `-MT', but it quotes any characters which are special to
+     Make.  `-MQ '$(objpfx)foo.o'' gives
+
+          $$(objpfx)foo.o: foo.c
+
+     The default target is automatically quoted, as if it were given
+     with `-MQ'.
+
+`-MD'
+     `-MD' is equivalent to `-M -MF FILE', except that `-E' is not
+     implied.  The driver determines FILE based on whether an `-o'
+     option is given.  If it is, the driver uses its argument but with
+     a suffix of `.d', otherwise it takes the name of the input file,
+     removes any directory components and suffix, and applies a `.d'
+     suffix.
+
+     If `-MD' is used in conjunction with `-E', any `-o' switch is
+     understood to specify the dependency output file (*note -MF:
+     dashMF.), but if used without `-E', each `-o' is understood to
+     specify a target object file.
+
+     Since `-E' is not implied, `-MD' can be used to generate a
+     dependency output file as a side-effect of the compilation process.
+
+`-MMD'
+     Like `-MD' except mention only user header files, not system
+     header files.
+
+`-x c'
+`-x c++'
+`-x objective-c'
+`-x assembler-with-cpp'
+     Specify the source language: C, C++, Objective-C, or assembly.
+     This has nothing to do with standards conformance or extensions;
+     it merely selects which base syntax to expect.  If you give none
+     of these options, cpp will deduce the language from the extension
+     of the source file: `.c', `.cc', `.m', or `.S'.  Some other common
+     extensions for C++ and assembly are also recognized.  If cpp does
+     not recognize the extension, it will treat the file as C; this is
+     the most generic mode.
+
+     _Note:_ Previous versions of cpp accepted a `-lang' option which
+     selected both the language and the standards conformance level.
+     This option has been removed, because it conflicts with the `-l'
+     option.
+
+`-std=STANDARD'
+`-ansi'
+     Specify the standard to which the code should conform.  Currently
+     CPP knows about C and C++ standards; others may be added in the
+     future.
+
+     STANDARD may be one of:
+    `c90'
+    `c89'
+    `iso9899:1990'
+          The ISO C standard from 1990.  `c90' is the customary
+          shorthand for this version of the standard.
+
+          The `-ansi' option is equivalent to `-std=c90'.
+
+    `iso9899:199409'
+          The 1990 C standard, as amended in 1994.
+
+    `iso9899:1999'
+    `c99'
+    `iso9899:199x'
+    `c9x'
+          The revised ISO C standard, published in December 1999.
+          Before publication, this was known as C9X.
+
+    `gnu90'
+    `gnu89'
+          The 1990 C standard plus GNU extensions.  This is the default.
+
+    `gnu99'
+    `gnu9x'
+          The 1999 C standard plus GNU extensions.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments.
+
+    `gnu++98'
+          The same as `-std=c++98' plus GNU extensions.  This is the
+          default for C++ code.
+
+`-I-'
+     Split the include path.  Any directories specified with `-I'
+     options before `-I-' are searched only for headers requested with
+     `#include "FILE"'; they are not searched for `#include <FILE>'.
+     If additional directories are specified with `-I' options after
+     the `-I-', those directories are searched for all `#include'
+     directives.
+
+     In addition, `-I-' inhibits the use of the directory of the current
+     file directory as the first search directory for `#include "FILE"'.
+     *Note Search Path::.  This option has been deprecated.
+
+`-nostdinc'
+     Do not search the standard system directories for header files.
+     Only the directories you have specified with `-I' options (and the
+     directory of the current file, if appropriate) are searched.
+
+`-nostdinc++'
+     Do not search for header files in the C++-specific standard
+     directories, but do still search the other standard directories.
+     (This option is used when building the C++ library.)
+
+`-include FILE'
+     Process FILE as if `#include "file"' appeared as the first line of
+     the primary source file.  However, the first directory searched
+     for FILE is the preprocessor's working directory _instead of_ the
+     directory containing the main source file.  If not found there, it
+     is searched for in the remainder of the `#include "..."' search
+     chain as normal.
+
+     If multiple `-include' options are given, the files are included
+     in the order they appear on the command line.
+
+`-imacros FILE'
+     Exactly like `-include', except that any output produced by
+     scanning FILE is thrown away.  Macros it defines remain defined.
+     This allows you to acquire all the macros from a header without
+     also processing its declarations.
+
+     All files specified by `-imacros' are processed before all files
+     specified by `-include'.
+
+`-idirafter DIR'
+     Search DIR for header files, but do it _after_ all directories
+     specified with `-I' and the standard system directories have been
+     exhausted.  DIR is treated as a system include directory.  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-iprefix PREFIX'
+     Specify PREFIX as the prefix for subsequent `-iwithprefix'
+     options.  If the prefix represents a directory, you should include
+     the final `/'.
+
+`-iwithprefix DIR'
+`-iwithprefixbefore DIR'
+     Append DIR to the prefix specified previously with `-iprefix', and
+     add the resulting directory to the include search path.
+     `-iwithprefixbefore' puts it in the same place `-I' would;
+     `-iwithprefix' puts it where `-idirafter' would.
+
+`-isysroot DIR'
+     This option is like the `--sysroot' option, but applies only to
+     header files.  See the `--sysroot' option for more information.
+
+`-imultilib DIR'
+     Use DIR as a subdirectory of the directory containing
+     target-specific C++ headers.
+
+`-isystem DIR'
+     Search DIR for header files, after all directories specified by
+     `-I' but before the standard system directories.  Mark it as a
+     system directory, so that it gets the same special treatment as is
+     applied to the standard system directories.  *Note System
+     Headers::.  If DIR begins with `=', then the `=' will be replaced
+     by the sysroot prefix; see `--sysroot' and `-isysroot'.
+
+`-iquote DIR'
+     Search DIR only for header files requested with `#include "FILE"';
+     they are not searched for `#include <FILE>', before all
+     directories specified by `-I' and before the standard system
+     directories.  *Note Search Path::.  If DIR begins with `=', then
+     the `=' will be replaced by the sysroot prefix; see `--sysroot'
+     and `-isysroot'.
+
+`-fdirectives-only'
+     When preprocessing, handle directives, but do not expand macros.
+
+     The option's behavior depends on the `-E' and `-fpreprocessed'
+     options.
+
+     With `-E', preprocessing is limited to the handling of directives
+     such as `#define', `#ifdef', and `#error'.  Other preprocessor
+     operations, such as macro expansion and trigraph conversion are
+     not performed.  In addition, the `-dD' option is implicitly
+     enabled.
+
+     With `-fpreprocessed', predefinition of command line and most
+     builtin macros is disabled.  Macros such as `__LINE__', which are
+     contextually dependent, are handled normally.  This enables
+     compilation of files previously preprocessed with `-E
+     -fdirectives-only'.
+
+     With both `-E' and `-fpreprocessed', the rules for
+     `-fpreprocessed' take precedence.  This enables full preprocessing
+     of files previously preprocessed with `-E -fdirectives-only'.
+
+`-fdollars-in-identifiers'
+     Accept `$' in identifiers.  *Note Identifier characters::.
+
+`-fextended-identifiers'
+     Accept universal character names in identifiers.  This option is
+     experimental; in a future version of GCC, it will be enabled by
+     default for C99 and C++.
+
+`-fpreprocessed'
+     Indicate to the preprocessor that the input file has already been
+     preprocessed.  This suppresses things like macro expansion,
+     trigraph conversion, escaped newline splicing, and processing of
+     most directives.  The preprocessor still recognizes and removes
+     comments, so that you can pass a file preprocessed with `-C' to
+     the compiler without problems.  In this mode the integrated
+     preprocessor is little more than a tokenizer for the front ends.
+
+     `-fpreprocessed' is implicit if the input file has one of the
+     extensions `.i', `.ii' or `.mi'.  These are the extensions that
+     GCC uses for preprocessed files created by `-save-temps'.
+
+`-ftabstop=WIDTH'
+     Set the distance between tab stops.  This helps the preprocessor
+     report correct column numbers in warnings or errors, even if tabs
+     appear on the line.  If the value is less than 1 or greater than
+     100, the option is ignored.  The default is 8.
+
+`-fexec-charset=CHARSET'
+     Set the execution character set, used for string and character
+     constants.  The default is UTF-8.  CHARSET can be any encoding
+     supported by the system's `iconv' library routine.
+
+`-fwide-exec-charset=CHARSET'
+     Set the wide execution character set, used for wide string and
+     character constants.  The default is UTF-32 or UTF-16, whichever
+     corresponds to the width of `wchar_t'.  As with `-fexec-charset',
+     CHARSET can be any encoding supported by the system's `iconv'
+     library routine; however, you will have problems with encodings
+     that do not fit exactly in `wchar_t'.
+
+`-finput-charset=CHARSET'
+     Set the input character set, used for translation from the
+     character set of the input file to the source character set used
+     by GCC.  If the locale does not specify, or GCC cannot get this
+     information from the locale, the default is UTF-8.  This can be
+     overridden by either the locale or this command line option.
+     Currently the command line option takes precedence if there's a
+     conflict.  CHARSET can be any encoding supported by the system's
+     `iconv' library routine.
+
+`-fworking-directory'
+     Enable generation of linemarkers in the preprocessor output that
+     will let the compiler know the current working directory at the
+     time of preprocessing.  When this option is enabled, the
+     preprocessor will emit, after the initial linemarker, a second
+     linemarker with the current working directory followed by two
+     slashes.  GCC will use this directory, when it's present in the
+     preprocessed input, as the directory emitted as the current
+     working directory in some debugging information formats.  This
+     option is implicitly enabled if debugging information is enabled,
+     but this can be inhibited with the negated form
+     `-fno-working-directory'.  If the `-P' flag is present in the
+     command line, this option has no effect, since no `#line'
+     directives are emitted whatsoever.
+
+`-fno-show-column'
+     Do not print column numbers in diagnostics.  This may be necessary
+     if diagnostics are being scanned by a program that does not
+     understand the column numbers, such as `dejagnu'.
+
+`-A PREDICATE=ANSWER'
+     Make an assertion with the predicate PREDICATE and answer ANSWER.
+     This form is preferred to the older form `-A PREDICATE(ANSWER)',
+     which is still supported, because it does not use shell special
+     characters.  *Note Obsolete Features::.
+
+`-A -PREDICATE=ANSWER'
+     Cancel an assertion with the predicate PREDICATE and answer ANSWER.
+
+`-dCHARS'
+     CHARS is a sequence of one or more of the following characters,
+     and must not be preceded by a space.  Other characters are
+     interpreted by the compiler proper, or reserved for future
+     versions of GCC, and so are silently ignored.  If you specify
+     characters whose behavior conflicts, the result is undefined.
+
+    `M'
+          Instead of the normal output, generate a list of `#define'
+          directives for all the macros defined during the execution of
+          the preprocessor, including predefined macros.  This gives
+          you a way of finding out what is predefined in your version
+          of the preprocessor.  Assuming you have no file `foo.h', the
+          command
+
+               touch foo.h; cpp -dM foo.h
+
+          will show all the predefined macros.
+
+          If you use `-dM' without the `-E' option, `-dM' is
+          interpreted as a synonym for `-fdump-rtl-mach'.  *Note
+          Debugging Options: (gcc)Debugging Options.
+
+    `D'
+          Like `M' except in two respects: it does _not_ include the
+          predefined macros, and it outputs _both_ the `#define'
+          directives and the result of preprocessing.  Both kinds of
+          output go to the standard output file.
+
+    `N'
+          Like `D', but emit only the macro names, not their expansions.
+
+    `I'
+          Output `#include' directives in addition to the result of
+          preprocessing.
+
+    `U'
+          Like `D' except that only macros that are expanded, or whose
+          definedness is tested in preprocessor directives, are output;
+          the output is delayed until the use or test of the macro; and
+          `#undef' directives are also output for macros tested but
+          undefined at the time.
+
+`-P'
+     Inhibit generation of linemarkers in the output from the
+     preprocessor.  This might be useful when running the preprocessor
+     on something that is not C code, and will be sent to a program
+     which might be confused by the linemarkers.  *Note Preprocessor
+     Output::.
+
+`-C'
+     Do not discard comments.  All comments are passed through to the
+     output file, except for comments in processed directives, which
+     are deleted along with the directive.
+
+     You should be prepared for side effects when using `-C'; it causes
+     the preprocessor to treat comments as tokens in their own right.
+     For example, comments appearing at the start of what would be a
+     directive line have the effect of turning that line into an
+     ordinary source line, since the first token on the line is no
+     longer a `#'.
+
+`-CC'
+     Do not discard comments, including during macro expansion.  This is
+     like `-C', except that comments contained within macros are also
+     passed through to the output file where the macro is expanded.
+
+     In addition to the side-effects of the `-C' option, the `-CC'
+     option causes all C++-style comments inside a macro to be
+     converted to C-style comments.  This is to prevent later use of
+     that macro from inadvertently commenting out the remainder of the
+     source line.
+
+     The `-CC' option is generally used to support lint comments.
+
+`-traditional-cpp'
+     Try to imitate the behavior of old-fashioned C preprocessors, as
+     opposed to ISO C preprocessors.  *Note Traditional Mode::.
+
+`-trigraphs'
+     Process trigraph sequences.  *Note Initial processing::.
+
+`-remap'
+     Enable special code to work around file systems which only permit
+     very short file names, such as MS-DOS.
+
+`--help'
+`--target-help'
+     Print text describing all the command line options instead of
+     preprocessing anything.
+
+`-v'
+     Verbose mode.  Print out GNU CPP's version number at the beginning
+     of execution, and report the final form of the include path.
+
+`-H'
+     Print the name of each header file used, in addition to other
+     normal activities.  Each name is indented to show how deep in the
+     `#include' stack it is.  Precompiled header files are also
+     printed, even if they are found to be invalid; an invalid
+     precompiled header file is printed with `...x' and a valid one
+     with `...!' .
+
+`-version'
+`--version'
+     Print out GNU CPP's version number.  With one dash, proceed to
+     preprocess as normal.  With two dashes, exit immediately.
+
+
+File: cpp.info,  Node: Environment Variables,  Next: GNU Free Documentation License,  Prev: Invocation,  Up: Top
+
+13 Environment Variables
+************************
+
+This section describes the environment variables that affect how CPP
+operates.  You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+
+   Note that you can also specify places to search using options such as
+`-I', and control dependency output with options like `-M' (*note
+Invocation::).  These take precedence over environment variables, which
+in turn take precedence over the configuration of GCC.
+
+`CPATH'
+`C_INCLUDE_PATH'
+`CPLUS_INCLUDE_PATH'
+`OBJC_INCLUDE_PATH'
+     Each variable's value is a list of directories separated by a
+     special character, much like `PATH', in which to look for header
+     files.  The special character, `PATH_SEPARATOR', is
+     target-dependent and determined at GCC build time.  For Microsoft
+     Windows-based targets it is a semicolon, and for almost all other
+     targets it is a colon.
+
+     `CPATH' specifies a list of directories to be searched as if
+     specified with `-I', but after any paths given with `-I' options
+     on the command line.  This environment variable is used regardless
+     of which language is being preprocessed.
+
+     The remaining environment variables apply only when preprocessing
+     the particular language indicated.  Each specifies a list of
+     directories to be searched as if specified with `-isystem', but
+     after any paths given with `-isystem' options on the command line.
+
+     In all these variables, an empty element instructs the compiler to
+     search its current working directory.  Empty elements can appear
+     at the beginning or end of a path.  For instance, if the value of
+     `CPATH' is `:/special/include', that has the same effect as
+     `-I. -I/special/include'.
+
+     See also *note Search Path::.
+
+`DEPENDENCIES_OUTPUT'
+     If this variable is set, its value specifies how to output
+     dependencies for Make based on the non-system header files
+     processed by the compiler.  System header files are ignored in the
+     dependency output.
+
+     The value of `DEPENDENCIES_OUTPUT' can be just a file name, in
+     which case the Make rules are written to that file, guessing the
+     target name from the source file name.  Or the value can have the
+     form `FILE TARGET', in which case the rules are written to file
+     FILE using TARGET as the target name.
+
+     In other words, this environment variable is equivalent to
+     combining the options `-MM' and `-MF' (*note Invocation::), with
+     an optional `-MT' switch too.
+
+`SUNPRO_DEPENDENCIES'
+     This variable is the same as `DEPENDENCIES_OUTPUT' (see above),
+     except that system header files are not ignored, so it implies
+     `-M' rather than `-MM'.  However, the dependence on the main input
+     file is omitted.  *Note Invocation::.
+
+
+File: cpp.info,  Node: GNU Free Documentation License,  Next: Index of Directives,  Prev: Environment Variables,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                      Version 1.2, November 2002
+
+     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided for under this License.  Any other
+     attempt to copy, modify, sublicense or distribute the Document is
+     void, and will automatically terminate your rights under this
+     License.  However, parties who have received copies, or rights,
+     from you under this License will not have their licenses
+     terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.2
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: cpp.info,  Node: Index of Directives,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Index of Directives
+*******************
+
+[index]
+* Menu:
+
+* #assert:                               Obsolete Features.    (line 48)
+* #define:                               Object-like Macros.   (line 11)
+* #elif:                                 Elif.                 (line  6)
+* #else:                                 Else.                 (line  6)
+* #endif:                                Ifdef.                (line  6)
+* #error:                                Diagnostics.          (line  6)
+* #ident:                                Other Directives.     (line  6)
+* #if:                                   Conditional Syntax.   (line  6)
+* #ifdef:                                Ifdef.                (line  6)
+* #ifndef:                               Ifdef.                (line 40)
+* #import:                               Alternatives to Wrapper #ifndef.
+                                                               (line 11)
+* #include:                              Include Syntax.       (line  6)
+* #include_next:                         Wrapper Headers.      (line  6)
+* #line:                                 Line Control.         (line 20)
+* #pragma GCC dependency:                Pragmas.              (line 55)
+* #pragma GCC poison:                    Pragmas.              (line 67)
+* #pragma GCC system_header <1>:         Pragmas.              (line 94)
+* #pragma GCC system_header:             System Headers.       (line 31)
+* #sccs:                                 Other Directives.     (line  6)
+* #unassert:                             Obsolete Features.    (line 59)
+* #undef:                                Undefining and Redefining Macros.
+                                                               (line  6)
+* #warning:                              Diagnostics.          (line 27)
+
+
+File: cpp.info,  Node: Option Index,  Next: Concept Index,  Prev: Index of Directives,  Up: Top
+
+Option Index
+************
+
+CPP's command line options and environment variables are indexed here
+without any initial `-' or `--'.
+
+[index]
+* Menu:
+
+* A:                                     Invocation.          (line 524)
+* ansi:                                  Invocation.          (line 308)
+* C:                                     Invocation.          (line 583)
+* C_INCLUDE_PATH:                        Environment Variables.
+                                                              (line  16)
+* CPATH:                                 Environment Variables.
+                                                              (line  15)
+* CPLUS_INCLUDE_PATH:                    Environment Variables.
+                                                              (line  17)
+* D:                                     Invocation.          (line  39)
+* dD:                                    Invocation.          (line 556)
+* DEPENDENCIES_OUTPUT:                   Environment Variables.
+                                                              (line  44)
+* dI:                                    Invocation.          (line 565)
+* dM:                                    Invocation.          (line 540)
+* dN:                                    Invocation.          (line 562)
+* dU:                                    Invocation.          (line 569)
+* fdirectives-only:                      Invocation.          (line 432)
+* fdollars-in-identifiers:               Invocation.          (line 454)
+* fexec-charset:                         Invocation.          (line 481)
+* fextended-identifiers:                 Invocation.          (line 457)
+* finput-charset:                        Invocation.          (line 494)
+* fno-show-column:                       Invocation.          (line 519)
+* fno-working-directory:                 Invocation.          (line 504)
+* fpreprocessed:                         Invocation.          (line 462)
+* ftabstop:                              Invocation.          (line 475)
+* fwide-exec-charset:                    Invocation.          (line 486)
+* fworking-directory:                    Invocation.          (line 504)
+* H:                                     Invocation.          (line 628)
+* help:                                  Invocation.          (line 620)
+* I:                                     Invocation.          (line  71)
+* I-:                                    Invocation.          (line 347)
+* idirafter:                             Invocation.          (line 389)
+* imacros:                               Invocation.          (line 380)
+* imultilib:                             Invocation.          (line 412)
+* include:                               Invocation.          (line 369)
+* iprefix:                               Invocation.          (line 396)
+* iquote:                                Invocation.          (line 424)
+* isysroot:                              Invocation.          (line 408)
+* isystem:                               Invocation.          (line 416)
+* iwithprefix:                           Invocation.          (line 402)
+* iwithprefixbefore:                     Invocation.          (line 402)
+* M:                                     Invocation.          (line 180)
+* MD:                                    Invocation.          (line 269)
+* MF:                                    Invocation.          (line 215)
+* MG:                                    Invocation.          (line 224)
+* MM:                                    Invocation.          (line 205)
+* MMD:                                   Invocation.          (line 285)
+* MP:                                    Invocation.          (line 234)
+* MQ:                                    Invocation.          (line 260)
+* MT:                                    Invocation.          (line 246)
+* nostdinc:                              Invocation.          (line 359)
+* nostdinc++:                            Invocation.          (line 364)
+* o:                                     Invocation.          (line  82)
+* OBJC_INCLUDE_PATH:                     Environment Variables.
+                                                              (line  18)
+* P:                                     Invocation.          (line 576)
+* pedantic:                              Invocation.          (line 170)
+* pedantic-errors:                       Invocation.          (line 175)
+* remap:                                 Invocation.          (line 615)
+* std=:                                  Invocation.          (line 308)
+* SUNPRO_DEPENDENCIES:                   Environment Variables.
+                                                              (line  60)
+* target-help:                           Invocation.          (line 620)
+* traditional-cpp:                       Invocation.          (line 608)
+* trigraphs:                             Invocation.          (line 612)
+* U:                                     Invocation.          (line  62)
+* undef:                                 Invocation.          (line  66)
+* v:                                     Invocation.          (line 624)
+* version:                               Invocation.          (line 637)
+* w:                                     Invocation.          (line 166)
+* Wall:                                  Invocation.          (line  88)
+* Wcomment:                              Invocation.          (line  96)
+* Wcomments:                             Invocation.          (line  96)
+* Wendif-labels:                         Invocation.          (line 143)
+* Werror:                                Invocation.          (line 156)
+* Wsystem-headers:                       Invocation.          (line 160)
+* Wtraditional:                          Invocation.          (line 113)
+* Wtrigraphs:                            Invocation.          (line 101)
+* Wundef:                                Invocation.          (line 119)
+* Wunused-macros:                        Invocation.          (line 124)
+* x:                                     Invocation.          (line 292)
+
+
+File: cpp.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
+
+Concept Index
+*************
+
+[index]
+* Menu:
+
+* # operator:                            Stringification.     (line   6)
+* ## operator:                           Concatenation.       (line   6)
+* _Pragma:                               Pragmas.             (line  25)
+* alternative tokens:                    Tokenization.        (line 106)
+* arguments:                             Macro Arguments.     (line   6)
+* arguments in macro definitions:        Macro Arguments.     (line   6)
+* assertions:                            Obsolete Features.   (line  13)
+* assertions, canceling:                 Obsolete Features.   (line  59)
+* backslash-newline:                     Initial processing.  (line  61)
+* block comments:                        Initial processing.  (line  77)
+* C++ named operators:                   C++ Named Operators. (line   6)
+* character constants:                   Tokenization.        (line  85)
+* character set, execution:              Invocation.          (line 481)
+* character set, input:                  Invocation.          (line 494)
+* character set, wide execution:         Invocation.          (line 486)
+* command line:                          Invocation.          (line   6)
+* commenting out code:                   Deleted Code.        (line   6)
+* comments:                              Initial processing.  (line  77)
+* common predefined macros:              Common Predefined Macros.
+                                                              (line   6)
+* computed includes:                     Computed Includes.   (line   6)
+* concatenation:                         Concatenation.       (line   6)
+* conditional group:                     Ifdef.               (line  14)
+* conditionals:                          Conditionals.        (line   6)
+* continued lines:                       Initial processing.  (line  61)
+* controlling macro:                     Once-Only Headers.   (line  35)
+* defined:                               Defined.             (line   6)
+* dependencies for make as output:       Environment Variables.
+                                                              (line  45)
+* dependencies, make:                    Invocation.          (line 180)
+* diagnostic:                            Diagnostics.         (line   6)
+* differences from previous versions:    Differences from previous versions.
+                                                              (line   6)
+* digraphs:                              Tokenization.        (line 106)
+* directive line:                        The preprocessing language.
+                                                              (line   6)
+* directive name:                        The preprocessing language.
+                                                              (line   6)
+* directives:                            The preprocessing language.
+                                                              (line   6)
+* empty macro arguments:                 Macro Arguments.     (line  66)
+* environment variables:                 Environment Variables.
+                                                              (line   6)
+* expansion of arguments:                Argument Prescan.    (line   6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                              (line   6)
+* function-like macros:                  Function-like Macros.
+                                                              (line   6)
+* grouping options:                      Invocation.          (line  34)
+* guard macro:                           Once-Only Headers.   (line  35)
+* header file:                           Header Files.        (line   6)
+* header file names:                     Tokenization.        (line  85)
+* identifiers:                           Tokenization.        (line  34)
+* implementation limits:                 Implementation limits.
+                                                              (line   6)
+* implementation-defined behavior:       Implementation-defined behavior.
+                                                              (line   6)
+* including just once:                   Once-Only Headers.   (line   6)
+* invocation:                            Invocation.          (line   6)
+* iso646.h:                              C++ Named Operators. (line   6)
+* line comments:                         Initial processing.  (line  77)
+* line control:                          Line Control.        (line   6)
+* line endings:                          Initial processing.  (line  14)
+* linemarkers:                           Preprocessor Output. (line  28)
+* macro argument expansion:              Argument Prescan.    (line   6)
+* macro arguments and directives:        Directives Within Macro Arguments.
+                                                              (line   6)
+* macros in include:                     Computed Includes.   (line   6)
+* macros with arguments:                 Macro Arguments.     (line   6)
+* macros with variable arguments:        Variadic Macros.     (line   6)
+* make:                                  Invocation.          (line 180)
+* manifest constants:                    Object-like Macros.  (line   6)
+* named operators:                       C++ Named Operators. (line   6)
+* newlines in macro arguments:           Newlines in Arguments.
+                                                              (line   6)
+* null directive:                        Other Directives.    (line  15)
+* numbers:                               Tokenization.        (line  61)
+* object-like macro:                     Object-like Macros.  (line   6)
+* options:                               Invocation.          (line  38)
+* options, grouping:                     Invocation.          (line  34)
+* other tokens:                          Tokenization.        (line 120)
+* output format:                         Preprocessor Output. (line  12)
+* overriding a header file:              Wrapper Headers.     (line   6)
+* parentheses in macro bodies:           Operator Precedence Problems.
+                                                              (line   6)
+* pitfalls of macros:                    Macro Pitfalls.      (line   6)
+* predefined macros:                     Predefined Macros.   (line   6)
+* predefined macros, system-specific:    System-specific Predefined Macros.
+                                                              (line   6)
+* predicates:                            Obsolete Features.   (line  26)
+* preprocessing directives:              The preprocessing language.
+                                                              (line   6)
+* preprocessing numbers:                 Tokenization.        (line  61)
+* preprocessing tokens:                  Tokenization.        (line   6)
+* prescan of macro arguments:            Argument Prescan.    (line   6)
+* problems with macros:                  Macro Pitfalls.      (line   6)
+* punctuators:                           Tokenization.        (line 106)
+* redefining macros:                     Undefining and Redefining Macros.
+                                                              (line   6)
+* repeated inclusion:                    Once-Only Headers.   (line   6)
+* reporting errors:                      Diagnostics.         (line   6)
+* reporting warnings:                    Diagnostics.         (line   6)
+* reserved namespace:                    System-specific Predefined Macros.
+                                                              (line   6)
+* self-reference:                        Self-Referential Macros.
+                                                              (line   6)
+* semicolons (after macro calls):        Swallowing the Semicolon.
+                                                              (line   6)
+* side effects (in macro arguments):     Duplication of Side Effects.
+                                                              (line   6)
+* standard predefined macros.:           Standard Predefined Macros.
+                                                              (line   6)
+* string constants:                      Tokenization.        (line  85)
+* string literals:                       Tokenization.        (line  85)
+* stringification:                       Stringification.     (line   6)
+* symbolic constants:                    Object-like Macros.  (line   6)
+* system header files <1>:               System Headers.      (line   6)
+* system header files:                   Header Files.        (line  13)
+* system-specific predefined macros:     System-specific Predefined Macros.
+                                                              (line   6)
+* testing predicates:                    Obsolete Features.   (line  37)
+* token concatenation:                   Concatenation.       (line   6)
+* token pasting:                         Concatenation.       (line   6)
+* tokens:                                Tokenization.        (line   6)
+* trigraphs:                             Initial processing.  (line  32)
+* undefining macros:                     Undefining and Redefining Macros.
+                                                              (line   6)
+* unsafe macros:                         Duplication of Side Effects.
+                                                              (line   6)
+* variable number of arguments:          Variadic Macros.     (line   6)
+* variadic macros:                       Variadic Macros.     (line   6)
+* wrapper #ifndef:                       Once-Only Headers.   (line   6)
+* wrapper headers:                       Wrapper Headers.     (line   6)
+
+
+
+Tag Table:
+Node: Top1099
+Node: Overview3825
+Node: Character sets6646
+Ref: Character sets-Footnote-18829
+Node: Initial processing9010
+Ref: trigraphs10569
+Node: Tokenization14771
+Ref: Tokenization-Footnote-121907
+Node: The preprocessing language22018
+Node: Header Files24896
+Node: Include Syntax26812
+Node: Include Operation28449
+Node: Search Path30297
+Node: Once-Only Headers33487
+Node: Alternatives to Wrapper #ifndef35146
+Node: Computed Includes36889
+Node: Wrapper Headers40047
+Node: System Headers42473
+Node: Macros44523
+Node: Object-like Macros45664
+Node: Function-like Macros49254
+Node: Macro Arguments50870
+Node: Stringification55015
+Node: Concatenation58221
+Node: Variadic Macros61329
+Node: Predefined Macros66116
+Node: Standard Predefined Macros66704
+Node: Common Predefined Macros72641
+Node: System-specific Predefined Macros88588
+Node: C++ Named Operators90609
+Node: Undefining and Redefining Macros91573
+Node: Directives Within Macro Arguments93677
+Node: Macro Pitfalls95225
+Node: Misnesting95758
+Node: Operator Precedence Problems96870
+Node: Swallowing the Semicolon98736
+Node: Duplication of Side Effects100759
+Node: Self-Referential Macros102942
+Node: Argument Prescan105351
+Node: Newlines in Arguments109105
+Node: Conditionals110056
+Node: Conditional Uses111886
+Node: Conditional Syntax113244
+Node: Ifdef113564
+Node: If116725
+Node: Defined119029
+Node: Else120312
+Node: Elif120882
+Node: Deleted Code122171
+Node: Diagnostics123418
+Node: Line Control125035
+Node: Pragmas128839
+Node: Other Directives133156
+Node: Preprocessor Output134206
+Node: Traditional Mode137407
+Node: Traditional lexical analysis138465
+Node: Traditional macros140968
+Node: Traditional miscellany144770
+Node: Traditional warnings145767
+Node: Implementation Details147964
+Node: Implementation-defined behavior148585
+Ref: Identifier characters149337
+Node: Implementation limits152415
+Node: Obsolete Features155089
+Node: Differences from previous versions157926
+Node: Invocation162134
+Ref: Wtrigraphs166586
+Ref: dashMF171361
+Ref: fdollars-in-identifiers180766
+Node: Environment Variables188929
+Node: GNU Free Documentation License191895
+Node: Index of Directives214328
+Node: Option Index216262
+Node: Concept Index222446
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/cppinternals.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/cppinternals.info
new file mode 100644
index 00000000..73396522
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/cppinternals.info
@@ -0,0 +1,1036 @@
+This is doc/cppinternals.info, produced by makeinfo version 4.13 from
+../../../gcc-4.5.1/gcc/doc/cppinternals.texi.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* Cpplib: (cppinternals).      Cpplib internals.
+END-INFO-DIR-ENTRY
+
+   This file documents the internals of the GNU C Preprocessor.
+
+   Copyright 2000, 2001, 2002, 2004, 2005, 2006, 2007 Free Software
+Foundation, Inc.
+
+   Permission is granted to make and distribute verbatim copies of this
+manual provided the copyright notice and this permission notice are
+preserved on all copies.
+
+   Permission is granted to copy and distribute modified versions of
+this manual under the conditions for verbatim copying, provided also
+that the entire resulting derived work is distributed under the terms
+of a permission notice identical to this one.
+
+   Permission is granted to copy and distribute translations of this
+manual into another language, under the above conditions for modified
+versions.
+
+
+File: cppinternals.info,  Node: Top,  Next: Conventions,  Up: (dir)
+
+The GNU C Preprocessor Internals
+********************************
+
+1 Cpplib--the GNU C Preprocessor
+********************************
+
+The GNU C preprocessor is implemented as a library, "cpplib", so it can
+be easily shared between a stand-alone preprocessor, and a preprocessor
+integrated with the C, C++ and Objective-C front ends.  It is also
+available for use by other programs, though this is not recommended as
+its exposed interface has not yet reached a point of reasonable
+stability.
+
+   The library has been written to be re-entrant, so that it can be used
+to preprocess many files simultaneously if necessary.  It has also been
+written with the preprocessing token as the fundamental unit; the
+preprocessor in previous versions of GCC would operate on text strings
+as the fundamental unit.
+
+   This brief manual documents the internals of cpplib, and explains
+some of the tricky issues.  It is intended that, along with the
+comments in the source code, a reasonably competent C programmer should
+be able to figure out what the code is doing, and why things have been
+implemented the way they have.
+
+* Menu:
+
+* Conventions::         Conventions used in the code.
+* Lexer::               The combined C, C++ and Objective-C Lexer.
+* Hash Nodes::          All identifiers are entered into a hash table.
+* Macro Expansion::     Macro expansion algorithm.
+* Token Spacing::       Spacing and paste avoidance issues.
+* Line Numbering::      Tracking location within files.
+* Guard Macros::        Optimizing header files with guard macros.
+* Files::               File handling.
+* Concept Index::       Index.
+
+
+File: cppinternals.info,  Node: Conventions,  Next: Lexer,  Prev: Top,  Up: Top
+
+Conventions
+***********
+
+cpplib has two interfaces--one is exposed internally only, and the
+other is for both internal and external use.
+
+   The convention is that functions and types that are exposed to
+multiple files internally are prefixed with `_cpp_', and are to be
+found in the file `internal.h'.  Functions and types exposed to external
+clients are in `cpplib.h', and prefixed with `cpp_'.  For historical
+reasons this is no longer quite true, but we should strive to stick to
+it.
+
+   We are striving to reduce the information exposed in `cpplib.h' to
+the bare minimum necessary, and then to keep it there.  This makes clear
+exactly what external clients are entitled to assume, and allows us to
+change internals in the future without worrying whether library clients
+are perhaps relying on some kind of undocumented implementation-specific
+behavior.
+
+
+File: cppinternals.info,  Node: Lexer,  Next: Hash Nodes,  Prev: Conventions,  Up: Top
+
+The Lexer
+*********
+
+Overview
+========
+
+The lexer is contained in the file `lex.c'.  It is a hand-coded lexer,
+and not implemented as a state machine.  It can understand C, C++ and
+Objective-C source code, and has been extended to allow reasonably
+successful preprocessing of assembly language.  The lexer does not make
+an initial pass to strip out trigraphs and escaped newlines, but handles
+them as they are encountered in a single pass of the input file.  It
+returns preprocessing tokens individually, not a line at a time.
+
+   It is mostly transparent to users of the library, since the library's
+interface for obtaining the next token, `cpp_get_token', takes care of
+lexing new tokens, handling directives, and expanding macros as
+necessary.  However, the lexer does expose some functionality so that
+clients of the library can easily spell a given token, such as
+`cpp_spell_token' and `cpp_token_len'.  These functions are useful when
+generating diagnostics, and for emitting the preprocessed output.
+
+Lexing a token
+==============
+
+Lexing of an individual token is handled by `_cpp_lex_direct' and its
+subroutines.  In its current form the code is quite complicated, with
+read ahead characters and such-like, since it strives to not step back
+in the character stream in preparation for handling non-ASCII file
+encodings.  The current plan is to convert any such files to UTF-8
+before processing them.  This complexity is therefore unnecessary and
+will be removed, so I'll not discuss it further here.
+
+   The job of `_cpp_lex_direct' is simply to lex a token.  It is not
+responsible for issues like directive handling, returning lookahead
+tokens directly, multiple-include optimization, or conditional block
+skipping.  It necessarily has a minor ro^le to play in memory
+management of lexed lines.  I discuss these issues in a separate section
+(*note Lexing a line::).
+
+   The lexer places the token it lexes into storage pointed to by the
+variable `cur_token', and then increments it.  This variable is
+important for correct diagnostic positioning.  Unless a specific line
+and column are passed to the diagnostic routines, they will examine the
+`line' and `col' values of the token just before the location that
+`cur_token' points to, and use that location to report the diagnostic.
+
+   The lexer does not consider whitespace to be a token in its own
+right.  If whitespace (other than a new line) precedes a token, it sets
+the `PREV_WHITE' bit in the token's flags.  Each token has its `line'
+and `col' variables set to the line and column of the first character
+of the token.  This line number is the line number in the translation
+unit, and can be converted to a source (file, line) pair using the line
+map code.
+
+   The first token on a logical, i.e. unescaped, line has the flag
+`BOL' set for beginning-of-line.  This flag is intended for internal
+use, both to distinguish a `#' that begins a directive from one that
+doesn't, and to generate a call-back to clients that want to be
+notified about the start of every non-directive line with tokens on it.
+Clients cannot reliably determine this for themselves: the first token
+might be a macro, and the tokens of a macro expansion do not have the
+`BOL' flag set.  The macro expansion may even be empty, and the next
+token on the line certainly won't have the `BOL' flag set.
+
+   New lines are treated specially; exactly how the lexer handles them
+is context-dependent.  The C standard mandates that directives are
+terminated by the first unescaped newline character, even if it appears
+in the middle of a macro expansion.  Therefore, if the state variable
+`in_directive' is set, the lexer returns a `CPP_EOF' token, which is
+normally used to indicate end-of-file, to indicate end-of-directive.
+In a directive a `CPP_EOF' token never means end-of-file.
+Conveniently, if the caller was `collect_args', it already handles
+`CPP_EOF' as if it were end-of-file, and reports an error about an
+unterminated macro argument list.
+
+   The C standard also specifies that a new line in the middle of the
+arguments to a macro is treated as whitespace.  This white space is
+important in case the macro argument is stringified.  The state variable
+`parsing_args' is nonzero when the preprocessor is collecting the
+arguments to a macro call.  It is set to 1 when looking for the opening
+parenthesis to a function-like macro, and 2 when collecting the actual
+arguments up to the closing parenthesis, since these two cases need to
+be distinguished sometimes.  One such time is here: the lexer sets the
+`PREV_WHITE' flag of a token if it meets a new line when `parsing_args'
+is set to 2.  It doesn't set it if it meets a new line when
+`parsing_args' is 1, since then code like
+
+     #define foo() bar
+     foo
+     baz
+
+would be output with an erroneous space before `baz':
+
+     foo
+      baz
+
+   This is a good example of the subtlety of getting token spacing
+correct in the preprocessor; there are plenty of tests in the testsuite
+for corner cases like this.
+
+   The lexer is written to treat each of `\r', `\n', `\r\n' and `\n\r'
+as a single new line indicator.  This allows it to transparently
+preprocess MS-DOS, Macintosh and Unix files without their needing to
+pass through a special filter beforehand.
+
+   We also decided to treat a backslash, either `\' or the trigraph
+`??/', separated from one of the above newline indicators by
+non-comment whitespace only, as intending to escape the newline.  It
+tends to be a typing mistake, and cannot reasonably be mistaken for
+anything else in any of the C-family grammars.  Since handling it this
+way is not strictly conforming to the ISO standard, the library issues a
+warning wherever it encounters it.
+
+   Handling newlines like this is made simpler by doing it in one place
+only.  The function `handle_newline' takes care of all newline
+characters, and `skip_escaped_newlines' takes care of arbitrarily long
+sequences of escaped newlines, deferring to `handle_newline' to handle
+the newlines themselves.
+
+   The most painful aspect of lexing ISO-standard C and C++ is handling
+trigraphs and backlash-escaped newlines.  Trigraphs are processed before
+any interpretation of the meaning of a character is made, and
+unfortunately there is a trigraph representation for a backslash, so it
+is possible for the trigraph `??/' to introduce an escaped newline.
+
+   Escaped newlines are tedious because theoretically they can occur
+anywhere--between the `+' and `=' of the `+=' token, within the
+characters of an identifier, and even between the `*' and `/' that
+terminates a comment.  Moreover, you cannot be sure there is just
+one--there might be an arbitrarily long sequence of them.
+
+   So, for example, the routine that lexes a number, `parse_number',
+cannot assume that it can scan forwards until the first non-number
+character and be done with it, because this could be the `\'
+introducing an escaped newline, or the `?' introducing the trigraph
+sequence that represents the `\' of an escaped newline.  If it
+encounters a `?' or `\', it calls `skip_escaped_newlines' to skip over
+any potential escaped newlines before checking whether the number has
+been finished.
+
+   Similarly code in the main body of `_cpp_lex_direct' cannot simply
+check for a `=' after a `+' character to determine whether it has a
+`+=' token; it needs to be prepared for an escaped newline of some
+sort.  Such cases use the function `get_effective_char', which returns
+the first character after any intervening escaped newlines.
+
+   The lexer needs to keep track of the correct column position,
+including counting tabs as specified by the `-ftabstop=' option.  This
+should be done even within C-style comments; they can appear in the
+middle of a line, and we want to report diagnostics in the correct
+position for text appearing after the end of the comment.
+
+   Some identifiers, such as `__VA_ARGS__' and poisoned identifiers,
+may be invalid and require a diagnostic.  However, if they appear in a
+macro expansion we don't want to complain with each use of the macro.
+It is therefore best to catch them during the lexing stage, in
+`parse_identifier'.  In both cases, whether a diagnostic is needed or
+not is dependent upon the lexer's state.  For example, we don't want to
+issue a diagnostic for re-poisoning a poisoned identifier, or for using
+`__VA_ARGS__' in the expansion of a variable-argument macro.  Therefore
+`parse_identifier' makes use of state flags to determine whether a
+diagnostic is appropriate.  Since we change state on a per-token basis,
+and don't lex whole lines at a time, this is not a problem.
+
+   Another place where state flags are used to change behavior is whilst
+lexing header names.  Normally, a `<' would be lexed as a single token.
+After a `#include' directive, though, it should be lexed as a single
+token as far as the nearest `>' character.  Note that we don't allow
+the terminators of header names to be escaped; the first `"' or `>'
+terminates the header name.
+
+   Interpretation of some character sequences depends upon whether we
+are lexing C, C++ or Objective-C, and on the revision of the standard in
+force.  For example, `::' is a single token in C++, but in C it is two
+separate `:' tokens and almost certainly a syntax error.  Such cases
+are handled by `_cpp_lex_direct' based upon command-line flags stored
+in the `cpp_options' structure.
+
+   Once a token has been lexed, it leads an independent existence.  The
+spelling of numbers, identifiers and strings is copied to permanent
+storage from the original input buffer, so a token remains valid and
+correct even if its source buffer is freed with `_cpp_pop_buffer'.  The
+storage holding the spellings of such tokens remains until the client
+program calls cpp_destroy, probably at the end of the translation unit.
+
+Lexing a line
+=============
+
+When the preprocessor was changed to return pointers to tokens, one
+feature I wanted was some sort of guarantee regarding how long a
+returned pointer remains valid.  This is important to the stand-alone
+preprocessor, the future direction of the C family front ends, and even
+to cpplib itself internally.
+
+   Occasionally the preprocessor wants to be able to peek ahead in the
+token stream.  For example, after the name of a function-like macro, it
+wants to check the next token to see if it is an opening parenthesis.
+Another example is that, after reading the first few tokens of a
+`#pragma' directive and not recognizing it as a registered pragma, it
+wants to backtrack and allow the user-defined handler for unknown
+pragmas to access the full `#pragma' token stream.  The stand-alone
+preprocessor wants to be able to test the current token with the
+previous one to see if a space needs to be inserted to preserve their
+separate tokenization upon re-lexing (paste avoidance), so it needs to
+be sure the pointer to the previous token is still valid.  The
+recursive-descent C++ parser wants to be able to perform tentative
+parsing arbitrarily far ahead in the token stream, and then to be able
+to jump back to a prior position in that stream if necessary.
+
+   The rule I chose, which is fairly natural, is to arrange that the
+preprocessor lex all tokens on a line consecutively into a token buffer,
+which I call a "token run", and when meeting an unescaped new line
+(newlines within comments do not count either), to start lexing back at
+the beginning of the run.  Note that we do _not_ lex a line of tokens
+at once; if we did that `parse_identifier' would not have state flags
+available to warn about invalid identifiers (*note Invalid
+identifiers::).
+
+   In other words, accessing tokens that appeared earlier in the current
+line is valid, but since each logical line overwrites the tokens of the
+previous line, tokens from prior lines are unavailable.  In particular,
+since a directive only occupies a single logical line, this means that
+the directive handlers like the `#pragma' handler can jump around in
+the directive's tokens if necessary.
+
+   Two issues remain: what about tokens that arise from macro
+expansions, and what happens when we have a long line that overflows
+the token run?
+
+   Since we promise clients that we preserve the validity of pointers
+that we have already returned for tokens that appeared earlier in the
+line, we cannot reallocate the run.  Instead, on overflow it is
+expanded by chaining a new token run on to the end of the existing one.
+
+   The tokens forming a macro's replacement list are collected by the
+`#define' handler, and placed in storage that is only freed by
+`cpp_destroy'.  So if a macro is expanded in the line of tokens, the
+pointers to the tokens of its expansion that are returned will always
+remain valid.  However, macros are a little trickier than that, since
+they give rise to three sources of fresh tokens.  They are the built-in
+macros like `__LINE__', and the `#' and `##' operators for
+stringification and token pasting.  I handled this by allocating space
+for these tokens from the lexer's token run chain.  This means they
+automatically receive the same lifetime guarantees as lexed tokens, and
+we don't need to concern ourselves with freeing them.
+
+   Lexing into a line of tokens solves some of the token memory
+management issues, but not all.  The opening parenthesis after a
+function-like macro name might lie on a different line, and the front
+ends definitely want the ability to look ahead past the end of the
+current line.  So cpplib only moves back to the start of the token run
+at the end of a line if the variable `keep_tokens' is zero.
+Line-buffering is quite natural for the preprocessor, and as a result
+the only time cpplib needs to increment this variable is whilst looking
+for the opening parenthesis to, and reading the arguments of, a
+function-like macro.  In the near future cpplib will export an
+interface to increment and decrement this variable, so that clients can
+share full control over the lifetime of token pointers too.
+
+   The routine `_cpp_lex_token' handles moving to new token runs,
+calling `_cpp_lex_direct' to lex new tokens, or returning
+previously-lexed tokens if we stepped back in the token stream.  It also
+checks each token for the `BOL' flag, which might indicate a directive
+that needs to be handled, or require a start-of-line call-back to be
+made.  `_cpp_lex_token' also handles skipping over tokens in failed
+conditional blocks, and invalidates the control macro of the
+multiple-include optimization if a token was successfully lexed outside
+a directive.  In other words, its callers do not need to concern
+themselves with such issues.
+
+
+File: cppinternals.info,  Node: Hash Nodes,  Next: Macro Expansion,  Prev: Lexer,  Up: Top
+
+Hash Nodes
+**********
+
+When cpplib encounters an "identifier", it generates a hash code for it
+and stores it in the hash table.  By "identifier" we mean tokens with
+type `CPP_NAME'; this includes identifiers in the usual C sense, as
+well as keywords, directive names, macro names and so on.  For example,
+all of `pragma', `int', `foo' and `__GNUC__' are identifiers and hashed
+when lexed.
+
+   Each node in the hash table contain various information about the
+identifier it represents.  For example, its length and type.  At any one
+time, each identifier falls into exactly one of three categories:
+
+   * Macros
+
+     These have been declared to be macros, either on the command line
+     or with `#define'.  A few, such as `__TIME__' are built-ins
+     entered in the hash table during initialization.  The hash node
+     for a normal macro points to a structure with more information
+     about the macro, such as whether it is function-like, how many
+     arguments it takes, and its expansion.  Built-in macros are
+     flagged as special, and instead contain an enum indicating which
+     of the various built-in macros it is.
+
+   * Assertions
+
+     Assertions are in a separate namespace to macros.  To enforce
+     this, cpp actually prepends a `#' character before hashing and
+     entering it in the hash table.  An assertion's node points to a
+     chain of answers to that assertion.
+
+   * Void
+
+     Everything else falls into this category--an identifier that is not
+     currently a macro, or a macro that has since been undefined with
+     `#undef'.
+
+     When preprocessing C++, this category also includes the named
+     operators, such as `xor'.  In expressions these behave like the
+     operators they represent, but in contexts where the spelling of a
+     token matters they are spelt differently.  This spelling
+     distinction is relevant when they are operands of the stringizing
+     and pasting macro operators `#' and `##'.  Named operator hash
+     nodes are flagged, both to catch the spelling distinction and to
+     prevent them from being defined as macros.
+
+   The same identifiers share the same hash node.  Since each identifier
+token, after lexing, contains a pointer to its hash node, this is used
+to provide rapid lookup of various information.  For example, when
+parsing a `#define' statement, CPP flags each argument's identifier
+hash node with the index of that argument.  This makes duplicated
+argument checking an O(1) operation for each argument.  Similarly, for
+each identifier in the macro's expansion, lookup to see if it is an
+argument, and which argument it is, is also an O(1) operation.  Further,
+each directive name, such as `endif', has an associated directive enum
+stored in its hash node, so that directive lookup is also O(1).
+
+
+File: cppinternals.info,  Node: Macro Expansion,  Next: Token Spacing,  Prev: Hash Nodes,  Up: Top
+
+Macro Expansion Algorithm
+*************************
+
+Macro expansion is a tricky operation, fraught with nasty corner cases
+and situations that render what you thought was a nifty way to optimize
+the preprocessor's expansion algorithm wrong in quite subtle ways.
+
+   I strongly recommend you have a good grasp of how the C and C++
+standards require macros to be expanded before diving into this
+section, let alone the code!.  If you don't have a clear mental picture
+of how things like nested macro expansion, stringification and token
+pasting are supposed to work, damage to your sanity can quickly result.
+
+Internal representation of macros
+=================================
+
+The preprocessor stores macro expansions in tokenized form.  This saves
+repeated lexing passes during expansion, at the cost of a small
+increase in memory consumption on average.  The tokens are stored
+contiguously in memory, so a pointer to the first one and a token count
+is all you need to get the replacement list of a macro.
+
+   If the macro is a function-like macro the preprocessor also stores
+its parameters, in the form of an ordered list of pointers to the hash
+table entry of each parameter's identifier.  Further, in the macro's
+stored expansion each occurrence of a parameter is replaced with a
+special token of type `CPP_MACRO_ARG'.  Each such token holds the index
+of the parameter it represents in the parameter list, which allows
+rapid replacement of parameters with their arguments during expansion.
+Despite this optimization it is still necessary to store the original
+parameters to the macro, both for dumping with e.g., `-dD', and to warn
+about non-trivial macro redefinitions when the parameter names have
+changed.
+
+Macro expansion overview
+========================
+
+The preprocessor maintains a "context stack", implemented as a linked
+list of `cpp_context' structures, which together represent the macro
+expansion state at any one time.  The `struct cpp_reader' member
+variable `context' points to the current top of this stack.  The top
+normally holds the unexpanded replacement list of the innermost macro
+under expansion, except when cpplib is about to pre-expand an argument,
+in which case it holds that argument's unexpanded tokens.
+
+   When there are no macros under expansion, cpplib is in "base
+context".  All contexts other than the base context contain a
+contiguous list of tokens delimited by a starting and ending token.
+When not in base context, cpplib obtains the next token from the list
+of the top context.  If there are no tokens left in the list, it pops
+that context off the stack, and subsequent ones if necessary, until an
+unexhausted context is found or it returns to base context.  In base
+context, cpplib reads tokens directly from the lexer.
+
+   If it encounters an identifier that is both a macro and enabled for
+expansion, cpplib prepares to push a new context for that macro on the
+stack by calling the routine `enter_macro_context'.  When this routine
+returns, the new context will contain the unexpanded tokens of the
+replacement list of that macro.  In the case of function-like macros,
+`enter_macro_context' also replaces any parameters in the replacement
+list, stored as `CPP_MACRO_ARG' tokens, with the appropriate macro
+argument.  If the standard requires that the parameter be replaced with
+its expanded argument, the argument will have been fully macro expanded
+first.
+
+   `enter_macro_context' also handles special macros like `__LINE__'.
+Although these macros expand to a single token which cannot contain any
+further macros, for reasons of token spacing (*note Token Spacing::)
+and simplicity of implementation, cpplib handles these special macros
+by pushing a context containing just that one token.
+
+   The final thing that `enter_macro_context' does before returning is
+to mark the macro disabled for expansion (except for special macros
+like `__TIME__').  The macro is re-enabled when its context is later
+popped from the context stack, as described above.  This strict
+ordering ensures that a macro is disabled whilst its expansion is being
+scanned, but that it is _not_ disabled whilst any arguments to it are
+being expanded.
+
+Scanning the replacement list for macros to expand
+==================================================
+
+The C standard states that, after any parameters have been replaced
+with their possibly-expanded arguments, the replacement list is scanned
+for nested macros.  Further, any identifiers in the replacement list
+that are not expanded during this scan are never again eligible for
+expansion in the future, if the reason they were not expanded is that
+the macro in question was disabled.
+
+   Clearly this latter condition can only apply to tokens resulting from
+argument pre-expansion.  Other tokens never have an opportunity to be
+re-tested for expansion.  It is possible for identifiers that are
+function-like macros to not expand initially but to expand during a
+later scan.  This occurs when the identifier is the last token of an
+argument (and therefore originally followed by a comma or a closing
+parenthesis in its macro's argument list), and when it replaces its
+parameter in the macro's replacement list, the subsequent token happens
+to be an opening parenthesis (itself possibly the first token of an
+argument).
+
+   It is important to note that when cpplib reads the last token of a
+given context, that context still remains on the stack.  Only when
+looking for the _next_ token do we pop it off the stack and drop to a
+lower context.  This makes backing up by one token easy, but more
+importantly ensures that the macro corresponding to the current context
+is still disabled when we are considering the last token of its
+replacement list for expansion (or indeed expanding it).  As an
+example, which illustrates many of the points above, consider
+
+     #define foo(x) bar x
+     foo(foo) (2)
+
+which fully expands to `bar foo (2)'.  During pre-expansion of the
+argument, `foo' does not expand even though the macro is enabled, since
+it has no following parenthesis [pre-expansion of an argument only uses
+tokens from that argument; it cannot take tokens from whatever follows
+the macro invocation].  This still leaves the argument token `foo'
+eligible for future expansion.  Then, when re-scanning after argument
+replacement, the token `foo' is rejected for expansion, and marked
+ineligible for future expansion, since the macro is now disabled.  It
+is disabled because the replacement list `bar foo' of the macro is
+still on the context stack.
+
+   If instead the algorithm looked for an opening parenthesis first and
+then tested whether the macro were disabled it would be subtly wrong.
+In the example above, the replacement list of `foo' would be popped in
+the process of finding the parenthesis, re-enabling `foo' and expanding
+it a second time.
+
+Looking for a function-like macro's opening parenthesis
+=======================================================
+
+Function-like macros only expand when immediately followed by a
+parenthesis.  To do this cpplib needs to temporarily disable macros and
+read the next token.  Unfortunately, because of spacing issues (*note
+Token Spacing::), there can be fake padding tokens in-between, and if
+the next real token is not a parenthesis cpplib needs to be able to
+back up that one token as well as retain the information in any
+intervening padding tokens.
+
+   Backing up more than one token when macros are involved is not
+permitted by cpplib, because in general it might involve issues like
+restoring popped contexts onto the context stack, which are too hard.
+Instead, searching for the parenthesis is handled by a special
+function, `funlike_invocation_p', which remembers padding information
+as it reads tokens.  If the next real token is not an opening
+parenthesis, it backs up that one token, and then pushes an extra
+context just containing the padding information if necessary.
+
+Marking tokens ineligible for future expansion
+==============================================
+
+As discussed above, cpplib needs a way of marking tokens as
+unexpandable.  Since the tokens cpplib handles are read-only once they
+have been lexed, it instead makes a copy of the token and adds the flag
+`NO_EXPAND' to the copy.
+
+   For efficiency and to simplify memory management by avoiding having
+to remember to free these tokens, they are allocated as temporary tokens
+from the lexer's current token run (*note Lexing a line::) using the
+function `_cpp_temp_token'.  The tokens are then re-used once the
+current line of tokens has been read in.
+
+   This might sound unsafe.  However, tokens runs are not re-used at the
+end of a line if it happens to be in the middle of a macro argument
+list, and cpplib only wants to back-up more than one lexer token in
+situations where no macro expansion is involved, so the optimization is
+safe.
+
+
+File: cppinternals.info,  Node: Token Spacing,  Next: Line Numbering,  Prev: Macro Expansion,  Up: Top
+
+Token Spacing
+*************
+
+First, consider an issue that only concerns the stand-alone
+preprocessor: there needs to be a guarantee that re-reading its
+preprocessed output results in an identical token stream.  Without
+taking special measures, this might not be the case because of macro
+substitution.  For example:
+
+     #define PLUS +
+     #define EMPTY
+     #define f(x) =x=
+     +PLUS -EMPTY- PLUS+ f(=)
+             ==> + + - - + + = = =
+     _not_
+             ==> ++ -- ++ ===
+
+   One solution would be to simply insert a space between all adjacent
+tokens.  However, we would like to keep space insertion to a minimum,
+both for aesthetic reasons and because it causes problems for people who
+still try to abuse the preprocessor for things like Fortran source and
+Makefiles.
+
+   For now, just notice that when tokens are added (or removed, as
+shown by the `EMPTY' example) from the original lexed token stream, we
+need to check for accidental token pasting.  We call this "paste
+avoidance".  Token addition and removal can only occur because of macro
+expansion, but accidental pasting can occur in many places: both before
+and after each macro replacement, each argument replacement, and
+additionally each token created by the `#' and `##' operators.
+
+   Look at how the preprocessor gets whitespace output correct
+normally.  The `cpp_token' structure contains a flags byte, and one of
+those flags is `PREV_WHITE'.  This is flagged by the lexer, and
+indicates that the token was preceded by whitespace of some form other
+than a new line.  The stand-alone preprocessor can use this flag to
+decide whether to insert a space between tokens in the output.
+
+   Now consider the result of the following macro expansion:
+
+     #define add(x, y, z) x + y +z;
+     sum = add (1,2, 3);
+             ==> sum = 1 + 2 +3;
+
+   The interesting thing here is that the tokens `1' and `2' are output
+with a preceding space, and `3' is output without a preceding space,
+but when lexed none of these tokens had that property.  Careful
+consideration reveals that `1' gets its preceding whitespace from the
+space preceding `add' in the macro invocation, _not_ replacement list.
+`2' gets its whitespace from the space preceding the parameter `y' in
+the macro replacement list, and `3' has no preceding space because
+parameter `z' has none in the replacement list.
+
+   Once lexed, tokens are effectively fixed and cannot be altered, since
+pointers to them might be held in many places, in particular by
+in-progress macro expansions.  So instead of modifying the two tokens
+above, the preprocessor inserts a special token, which I call a
+"padding token", into the token stream to indicate that spacing of the
+subsequent token is special.  The preprocessor inserts padding tokens
+in front of every macro expansion and expanded macro argument.  These
+point to a "source token" from which the subsequent real token should
+inherit its spacing.  In the above example, the source tokens are `add'
+in the macro invocation, and `y' and `z' in the macro replacement list,
+respectively.
+
+   It is quite easy to get multiple padding tokens in a row, for
+example if a macro's first replacement token expands straight into
+another macro.
+
+     #define foo bar
+     #define bar baz
+     [foo]
+             ==> [baz]
+
+   Here, two padding tokens are generated with sources the `foo' token
+between the brackets, and the `bar' token from foo's replacement list,
+respectively.  Clearly the first padding token is the one to use, so
+the output code should contain a rule that the first padding token in a
+sequence is the one that matters.
+
+   But what if a macro expansion is left?  Adjusting the above example
+slightly:
+
+     #define foo bar
+     #define bar EMPTY baz
+     #define EMPTY
+     [foo] EMPTY;
+             ==> [ baz] ;
+
+   As shown, now there should be a space before `baz' and the semicolon
+in the output.
+
+   The rules we decided above fail for `baz': we generate three padding
+tokens, one per macro invocation, before the token `baz'.  We would
+then have it take its spacing from the first of these, which carries
+source token `foo' with no leading space.
+
+   It is vital that cpplib get spacing correct in these examples since
+any of these macro expansions could be stringified, where spacing
+matters.
+
+   So, this demonstrates that not just entering macro and argument
+expansions, but leaving them requires special handling too.  I made
+cpplib insert a padding token with a `NULL' source token when leaving
+macro expansions, as well as after each replaced argument in a macro's
+replacement list.  It also inserts appropriate padding tokens on either
+side of tokens created by the `#' and `##' operators.  I expanded the
+rule so that, if we see a padding token with a `NULL' source token,
+_and_ that source token has no leading space, then we behave as if we
+have seen no padding tokens at all.  A quick check shows this rule will
+then get the above example correct as well.
+
+   Now a relationship with paste avoidance is apparent: we have to be
+careful about paste avoidance in exactly the same locations we have
+padding tokens in order to get white space correct.  This makes
+implementation of paste avoidance easy: wherever the stand-alone
+preprocessor is fixing up spacing because of padding tokens, and it
+turns out that no space is needed, it has to take the extra step to
+check that a space is not needed after all to avoid an accidental paste.
+The function `cpp_avoid_paste' advises whether a space is required
+between two consecutive tokens.  To avoid excessive spacing, it tries
+hard to only require a space if one is likely to be necessary, but for
+reasons of efficiency it is slightly conservative and might recommend a
+space where one is not strictly needed.
+
+
+File: cppinternals.info,  Node: Line Numbering,  Next: Guard Macros,  Prev: Token Spacing,  Up: Top
+
+Line numbering
+**************
+
+Just which line number anyway?
+==============================
+
+There are three reasonable requirements a cpplib client might have for
+the line number of a token passed to it:
+
+   * The source line it was lexed on.
+
+   * The line it is output on.  This can be different to the line it was
+     lexed on if, for example, there are intervening escaped newlines or
+     C-style comments.  For example:
+
+          foo /* A long
+          comment */ bar \
+          baz
+          =>
+          foo bar baz
+
+   * If the token results from a macro expansion, the line of the macro
+     name, or possibly the line of the closing parenthesis in the case
+     of function-like macro expansion.
+
+   The `cpp_token' structure contains `line' and `col' members.  The
+lexer fills these in with the line and column of the first character of
+the token.  Consequently, but maybe unexpectedly, a token from the
+replacement list of a macro expansion carries the location of the token
+within the `#define' directive, because cpplib expands a macro by
+returning pointers to the tokens in its replacement list.  The current
+implementation of cpplib assigns tokens created from built-in macros
+and the `#' and `##' operators the location of the most recently lexed
+token.  This is a because they are allocated from the lexer's token
+runs, and because of the way the diagnostic routines infer the
+appropriate location to report.
+
+   The diagnostic routines in cpplib display the location of the most
+recently _lexed_ token, unless they are passed a specific line and
+column to report.  For diagnostics regarding tokens that arise from
+macro expansions, it might also be helpful for the user to see the
+original location in the macro definition that the token came from.
+Since that is exactly the information each token carries, such an
+enhancement could be made relatively easily in future.
+
+   The stand-alone preprocessor faces a similar problem when determining
+the correct line to output the token on: the position attached to a
+token is fairly useless if the token came from a macro expansion.  All
+tokens on a logical line should be output on its first physical line, so
+the token's reported location is also wrong if it is part of a physical
+line other than the first.
+
+   To solve these issues, cpplib provides a callback that is generated
+whenever it lexes a preprocessing token that starts a new logical line
+other than a directive.  It passes this token (which may be a `CPP_EOF'
+token indicating the end of the translation unit) to the callback
+routine, which can then use the line and column of this token to
+produce correct output.
+
+Representation of line numbers
+==============================
+
+As mentioned above, cpplib stores with each token the line number that
+it was lexed on.  In fact, this number is not the number of the line in
+the source file, but instead bears more resemblance to the number of the
+line in the translation unit.
+
+   The preprocessor maintains a monotonic increasing line count, which
+is incremented at every new line character (and also at the end of any
+buffer that does not end in a new line).  Since a line number of zero is
+useful to indicate certain special states and conditions, this variable
+starts counting from one.
+
+   This variable therefore uniquely enumerates each line in the
+translation unit.  With some simple infrastructure, it is straight
+forward to map from this to the original source file and line number
+pair, saving space whenever line number information needs to be saved.
+The code the implements this mapping lies in the files `line-map.c' and
+`line-map.h'.
+
+   Command-line macros and assertions are implemented by pushing a
+buffer containing the right hand side of an equivalent `#define' or
+`#assert' directive.  Some built-in macros are handled similarly.
+Since these are all processed before the first line of the main input
+file, it will typically have an assigned line closer to twenty than to
+one.
+
+
+File: cppinternals.info,  Node: Guard Macros,  Next: Files,  Prev: Line Numbering,  Up: Top
+
+The Multiple-Include Optimization
+*********************************
+
+Header files are often of the form
+
+     #ifndef FOO
+     #define FOO
+     ...
+     #endif
+
+to prevent the compiler from processing them more than once.  The
+preprocessor notices such header files, so that if the header file
+appears in a subsequent `#include' directive and `FOO' is defined, then
+it is ignored and it doesn't preprocess or even re-open the file a
+second time.  This is referred to as the "multiple include
+optimization".
+
+   Under what circumstances is such an optimization valid?  If the file
+were included a second time, it can only be optimized away if that
+inclusion would result in no tokens to return, and no relevant
+directives to process.  Therefore the current implementation imposes
+requirements and makes some allowances as follows:
+
+  1. There must be no tokens outside the controlling `#if'-`#endif'
+     pair, but whitespace and comments are permitted.
+
+  2. There must be no directives outside the controlling directive
+     pair, but the "null directive" (a line containing nothing other
+     than a single `#' and possibly whitespace) is permitted.
+
+  3. The opening directive must be of the form
+
+          #ifndef FOO
+
+     or
+
+          #if !defined FOO     [equivalently, #if !defined(FOO)]
+
+  4. In the second form above, the tokens forming the `#if' expression
+     must have come directly from the source file--no macro expansion
+     must have been involved.  This is because macro definitions can
+     change, and tracking whether or not a relevant change has been
+     made is not worth the implementation cost.
+
+  5. There can be no `#else' or `#elif' directives at the outer
+     conditional block level, because they would probably contain
+     something of interest to a subsequent pass.
+
+   First, when pushing a new file on the buffer stack,
+`_stack_include_file' sets the controlling macro `mi_cmacro' to `NULL',
+and sets `mi_valid' to `true'.  This indicates that the preprocessor
+has not yet encountered anything that would invalidate the
+multiple-include optimization.  As described in the next few
+paragraphs, these two variables having these values effectively
+indicates top-of-file.
+
+   When about to return a token that is not part of a directive,
+`_cpp_lex_token' sets `mi_valid' to `false'.  This enforces the
+constraint that tokens outside the controlling conditional block
+invalidate the optimization.
+
+   The `do_if', when appropriate, and `do_ifndef' directive handlers
+pass the controlling macro to the function `push_conditional'.  cpplib
+maintains a stack of nested conditional blocks, and after processing
+every opening conditional this function pushes an `if_stack' structure
+onto the stack.  In this structure it records the controlling macro for
+the block, provided there is one and we're at top-of-file (as described
+above).  If an `#elif' or `#else' directive is encountered, the
+controlling macro for that block is cleared to `NULL'.  Otherwise, it
+survives until the `#endif' closing the block, upon which `do_endif'
+sets `mi_valid' to true and stores the controlling macro in `mi_cmacro'.
+
+   `_cpp_handle_directive' clears `mi_valid' when processing any
+directive other than an opening conditional and the null directive.
+With this, and requiring top-of-file to record a controlling macro, and
+no `#else' or `#elif' for it to survive and be copied to `mi_cmacro' by
+`do_endif', we have enforced the absence of directives outside the main
+conditional block for the optimization to be on.
+
+   Note that whilst we are inside the conditional block, `mi_valid' is
+likely to be reset to `false', but this does not matter since the
+closing `#endif' restores it to `true' if appropriate.
+
+   Finally, since `_cpp_lex_direct' pops the file off the buffer stack
+at `EOF' without returning a token, if the `#endif' directive was not
+followed by any tokens, `mi_valid' is `true' and `_cpp_pop_file_buffer'
+remembers the controlling macro associated with the file.  Subsequent
+calls to `stack_include_file' result in no buffer being pushed if the
+controlling macro is defined, effecting the optimization.
+
+   A quick word on how we handle the
+
+     #if !defined FOO
+
+case.  `_cpp_parse_expr' and `parse_defined' take steps to see whether
+the three stages `!', `defined-expression' and `end-of-directive' occur
+in order in a `#if' expression.  If so, they return the guard macro to
+`do_if' in the variable `mi_ind_cmacro', and otherwise set it to `NULL'.
+`enter_macro_context' sets `mi_valid' to false, so if a macro was
+expanded whilst parsing any part of the expression, then the
+top-of-file test in `push_conditional' fails and the optimization is
+turned off.
+
+
+File: cppinternals.info,  Node: Files,  Next: Concept Index,  Prev: Guard Macros,  Up: Top
+
+File Handling
+*************
+
+Fairly obviously, the file handling code of cpplib resides in the file
+`files.c'.  It takes care of the details of file searching, opening,
+reading and caching, for both the main source file and all the headers
+it recursively includes.
+
+   The basic strategy is to minimize the number of system calls.  On
+many systems, the basic `open ()' and `fstat ()' system calls can be
+quite expensive.  For every `#include'-d file, we need to try all the
+directories in the search path until we find a match.  Some projects,
+such as glibc, pass twenty or thirty include paths on the command line,
+so this can rapidly become time consuming.
+
+   For a header file we have not encountered before we have little
+choice but to do this.  However, it is often the case that the same
+headers are repeatedly included, and in these cases we try to avoid
+repeating the filesystem queries whilst searching for the correct file.
+
+   For each file we try to open, we store the constructed path in a
+splay tree.  This path first undergoes simplification by the function
+`_cpp_simplify_pathname'.  For example, `/usr/include/bits/../foo.h' is
+simplified to `/usr/include/foo.h' before we enter it in the splay tree
+and try to `open ()' the file.  CPP will then find subsequent uses of
+`foo.h', even as `/usr/include/foo.h', in the splay tree and save
+system calls.
+
+   Further, it is likely the file contents have also been cached,
+saving a `read ()' system call.  We don't bother caching the contents of
+header files that are re-inclusion protected, and whose re-inclusion
+macro is defined when we leave the header file for the first time.  If
+the host supports it, we try to map suitably large files into memory,
+rather than reading them in directly.
+
+   The include paths are internally stored on a null-terminated
+singly-linked list, starting with the `"header.h"' directory search
+chain, which then links into the `<header.h>' directory chain.
+
+   Files included with the `<foo.h>' syntax start the lookup directly
+in the second half of this chain.  However, files included with the
+`"foo.h"' syntax start at the beginning of the chain, but with one
+extra directory prepended.  This is the directory of the current file;
+the one containing the `#include' directive.  Prepending this directory
+on a per-file basis is handled by the function `search_from'.
+
+   Note that a header included with a directory component, such as
+`#include "mydir/foo.h"' and opened as
+`/usr/local/include/mydir/foo.h', will have the complete path minus the
+basename `foo.h' as the current directory.
+
+   Enough information is stored in the splay tree that CPP can
+immediately tell whether it can skip the header file because of the
+multiple include optimization, whether the file didn't exist or
+couldn't be opened for some reason, or whether the header was flagged
+not to be re-used, as it is with the obsolete `#import' directive.
+
+   For the benefit of MS-DOS filesystems with an 8.3 filename
+limitation, CPP offers the ability to treat various include file names
+as aliases for the real header files with shorter names.  The map from
+one to the other is found in a special file called `header.gcc', stored
+in the command line (or system) include directories to which the mapping
+applies.  This may be higher up the directory tree than the full path to
+the file minus the base name.
+
+
+File: cppinternals.info,  Node: Concept Index,  Prev: Files,  Up: Top
+
+Concept Index
+*************
+
+[index]
+* Menu:
+
+* assertions:                            Hash Nodes.          (line   6)
+* controlling macros:                    Guard Macros.        (line   6)
+* escaped newlines:                      Lexer.               (line   6)
+* files:                                 Files.               (line   6)
+* guard macros:                          Guard Macros.        (line   6)
+* hash table:                            Hash Nodes.          (line   6)
+* header files:                          Conventions.         (line   6)
+* identifiers:                           Hash Nodes.          (line   6)
+* interface:                             Conventions.         (line   6)
+* lexer:                                 Lexer.               (line   6)
+* line numbers:                          Line Numbering.      (line   6)
+* macro expansion:                       Macro Expansion.     (line   6)
+* macro representation (internal):       Macro Expansion.     (line  19)
+* macros:                                Hash Nodes.          (line   6)
+* multiple-include optimization:         Guard Macros.        (line   6)
+* named operators:                       Hash Nodes.          (line   6)
+* newlines:                              Lexer.               (line   6)
+* paste avoidance:                       Token Spacing.       (line   6)
+* spacing:                               Token Spacing.       (line   6)
+* token run:                             Lexer.               (line 192)
+* token spacing:                         Token Spacing.       (line   6)
+
+
+
+Tag Table:
+Node: Top967
+Node: Conventions2652
+Node: Lexer3594
+Ref: Invalid identifiers11507
+Ref: Lexing a line13456
+Node: Hash Nodes18229
+Node: Macro Expansion21108
+Node: Token Spacing30055
+Node: Line Numbering35915
+Node: Guard Macros40000
+Node: Files44791
+Node: Concept Index48257
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/dir b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/dir
new file mode 100644
index 00000000..e25128a2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/dir
@@ -0,0 +1,61 @@
+This is the file .../info/dir, which contains the
+topmost node of the Info hierarchy, called (dir)Top.
+The first time you invoke Info you start off looking at this node.
+
+File: dir,	Node: Top	This is the top of the INFO tree
+
+  This (the Directory node) gives a menu of major topics.
+  Typing "q" exits, "?" lists all Info commands, "d" returns here,
+  "h" gives a primer for first-timers,
+  "mEmacs<Return>" visits the Emacs manual, etc.
+
+  In Emacs, you can click mouse button 2 on a menu item or cross reference
+  to select it.
+
+* Menu:
+
+Individual utilities
+* addr2line: (binutils)addr2line.               Convert addresses to file and 
+                                                  line.
+* ar: (binutils)ar.                             Create, modify, and extract 
+                                                  from archives.
+* c++filt: (binutils)c++filt.                   Filter to demangle encoded C++ 
+                                                  symbols.
+* cxxfilt: (binutils)c++filt.                   MS-DOS name for c++filt.
+* dlltool: (binutils)dlltool.                   Create files needed to build 
+                                                  and use DLLs.
+* nlmconv: (binutils)nlmconv.                   Converts object code into an 
+                                                  NLM.
+* nm: (binutils)nm.                             List symbols from object files.
+* objcopy: (binutils)objcopy.                   Copy and translate object 
+                                                  files.
+* objdump: (binutils)objdump.                   Display information from 
+                                                  object files.
+* ranlib: (binutils)ranlib.                     Generate index to archive 
+                                                  contents.
+* readelf: (binutils)readelf.                   Display the contents of ELF 
+                                                  format files.
+* size: (binutils)size.                         List section sizes and total 
+                                                  size.
+* strings: (binutils)strings.                   List printable strings from 
+                                                  files.
+* strip: (binutils)strip.                       Discard symbols.
+* windmc: (binutils)windmc.                     Generator for Windows message 
+                                                  resources.
+* windres: (binutils)windres.                   Manipulate Windows resources.
+
+Miscellaneous
+* As: (as).                     The GNU assembler.
+* Bfd: (bfd).                   The Binary File Descriptor library.
+* Gas: (as).                    The GNU assembler.
+* Ld: (ld).                     The GNU linker.
+* gprof: (gprof).               Profiling your program's execution
+
+Software development
+* Binutils: (binutils).         The GNU binary utilities.
+* Cpp: (cpp).                   The GNU C preprocessor.
+* Cpplib: (cppinternals).       Cpplib internals.
+* g++: (gcc).                   The GNU C++ compiler.
+* gcc: (gcc).                   The GNU Compiler Collection.
+* gccinstall: (gccinstall).     Installing the GNU Compiler Collection.
+* gccint: (gccint).             Internals of the GNU Compiler Collection.
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gcc.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gcc.info
new file mode 100644
index 00000000..6c09c0aa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gcc.info
@@ -0,0 +1,46248 @@
+This is doc/gcc.info, produced by makeinfo version 4.13 from
+../../../gcc-4.5.1/gcc/doc/gcc.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gcc: (gcc).                  The GNU Compiler Collection.
+* g++: (gcc).                  The GNU C++ compiler.
+END-INFO-DIR-ENTRY
+ This file documents the use of the GNU compilers.
+
+ Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+
+File: gcc.info,  Node: Top,  Next: G++ and GCC,  Up: (DIR)
+
+Introduction
+************
+
+This manual documents how to use the GNU compilers, as well as their
+features and incompatibilities, and how to report bugs.  It corresponds
+to the compilers (GCC) version 4.5.1-tc32-1.3.  The internals of the
+GNU compilers, including how to port them to new targets and some
+information about how to write front ends for new languages, are
+documented in a separate manual.  *Note Introduction: (gccint)Top.
+
+* Menu:
+
+* G++ and GCC::     You can compile C or C++ programs.
+* Standards::       Language standards supported by GCC.
+* Invoking GCC::    Command options supported by `gcc'.
+* C Implementation:: How GCC implements the ISO C specification.
+* C Extensions::    GNU extensions to the C language family.
+* C++ Implementation:: How GCC implements the ISO C++ specification.
+* C++ Extensions::  GNU extensions to the C++ language.
+* Objective-C::     GNU Objective-C runtime features.
+* Compatibility::   Binary Compatibility
+* Gcov::            `gcov'---a test coverage program.
+* Trouble::         If you have trouble using GCC.
+* Bugs::            How, why and where to report bugs.
+* Service::         How to find suppliers of support for GCC.
+* Contributing::    How to contribute to testing and developing GCC.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Keyword Index::   Index of concepts and symbol names.
+
+
+File: gcc.info,  Node: G++ and GCC,  Next: Standards,  Prev: Top,  Up: Top
+
+1 Programming Languages Supported by GCC
+****************************************
+
+GCC stands for "GNU Compiler Collection".  GCC is an integrated
+distribution of compilers for several major programming languages.
+These languages currently include C, C++, Objective-C, Objective-C++,
+Java, Fortran, and Ada.
+
+ The abbreviation "GCC" has multiple meanings in common use.  The
+current official meaning is "GNU Compiler Collection", which refers
+generically to the complete suite of tools.  The name historically stood
+for "GNU C Compiler", and this usage is still common when the emphasis
+is on compiling C programs.  Finally, the name is also used when
+speaking of the "language-independent" component of GCC: code shared
+among the compilers for all supported languages.
+
+ The language-independent component of GCC includes the majority of the
+optimizers, as well as the "back ends" that generate machine code for
+various processors.
+
+ The part of a compiler that is specific to a particular language is
+called the "front end".  In addition to the front ends that are
+integrated components of GCC, there are several other front ends that
+are maintained separately.  These support languages such as Pascal,
+Mercury, and COBOL.  To use these, they must be built together with GCC
+proper.
+
+ Most of the compilers for languages other than C have their own names.
+The C++ compiler is G++, the Ada compiler is GNAT, and so on.  When we
+talk about compiling one of those languages, we might refer to that
+compiler by its own name, or as GCC.  Either is correct.
+
+ Historically, compilers for many languages, including C++ and Fortran,
+have been implemented as "preprocessors" which emit another high level
+language such as C.  None of the compilers included in GCC are
+implemented this way; they all generate machine code directly.  This
+sort of preprocessor should not be confused with the "C preprocessor",
+which is an integral feature of the C, C++, Objective-C and
+Objective-C++ languages.
+
+
+File: gcc.info,  Node: Standards,  Next: Invoking GCC,  Prev: G++ and GCC,  Up: Top
+
+2 Language Standards Supported by GCC
+*************************************
+
+For each language compiled by GCC for which there is a standard, GCC
+attempts to follow one or more versions of that standard, possibly with
+some exceptions, and possibly with some extensions.
+
+2.1 C language
+==============
+
+GCC supports three versions of the C standard, although support for the
+most recent version is not yet complete.
+
+ The original ANSI C standard (X3.159-1989) was ratified in 1989 and
+published in 1990.  This standard was ratified as an ISO standard
+(ISO/IEC 9899:1990) later in 1990.  There were no technical differences
+between these publications, although the sections of the ANSI standard
+were renumbered and became clauses in the ISO standard.  This standard,
+in both its forms, is commonly known as "C89", or occasionally as
+"C90", from the dates of ratification.  The ANSI standard, but not the
+ISO standard, also came with a Rationale document.  To select this
+standard in GCC, use one of the options `-ansi', `-std=c90' or
+`-std=iso9899:1990'; to obtain all the diagnostics required by the
+standard, you should also specify `-pedantic' (or `-pedantic-errors' if
+you want them to be errors rather than warnings).  *Note Options
+Controlling C Dialect: C Dialect Options.
+
+ Errors in the 1990 ISO C standard were corrected in two Technical
+Corrigenda published in 1994 and 1996.  GCC does not support the
+uncorrected version.
+
+ An amendment to the 1990 standard was published in 1995.  This
+amendment added digraphs and `__STDC_VERSION__' to the language, but
+otherwise concerned the library.  This amendment is commonly known as
+"AMD1"; the amended standard is sometimes known as "C94" or "C95".  To
+select this standard in GCC, use the option `-std=iso9899:199409'
+(with, as for other standard versions, `-pedantic' to receive all
+required diagnostics).
+
+ A new edition of the ISO C standard was published in 1999 as ISO/IEC
+9899:1999, and is commonly known as "C99".  GCC has incomplete support
+for this standard version; see
+`http://gcc.gnu.org/gcc-4.5/c99status.html' for details.  To select this
+standard, use `-std=c99' or `-std=iso9899:1999'.  (While in
+development, drafts of this standard version were referred to as "C9X".)
+
+ Errors in the 1999 ISO C standard were corrected in three Technical
+Corrigenda published in 2001, 2004 and 2007.  GCC does not support the
+uncorrected version.
+
+ By default, GCC provides some extensions to the C language that on
+rare occasions conflict with the C standard.  *Note Extensions to the C
+Language Family: C Extensions.  Use of the `-std' options listed above
+will disable these extensions where they conflict with the C standard
+version selected.  You may also select an extended version of the C
+language explicitly with `-std=gnu90' (for C90 with GNU extensions) or
+`-std=gnu99' (for C99 with GNU extensions).  The default, if no C
+language dialect options are given, is `-std=gnu90'; this will change to
+`-std=gnu99' in some future release when the C99 support is complete.
+Some features that are part of the C99 standard are accepted as
+extensions in C90 mode.
+
+ The ISO C standard defines (in clause 4) two classes of conforming
+implementation.  A "conforming hosted implementation" supports the
+whole standard including all the library facilities; a "conforming
+freestanding implementation" is only required to provide certain
+library facilities: those in `<float.h>', `<limits.h>', `<stdarg.h>',
+and `<stddef.h>'; since AMD1, also those in `<iso646.h>'; and in C99,
+also those in `<stdbool.h>' and `<stdint.h>'.  In addition, complex
+types, added in C99, are not required for freestanding implementations.
+The standard also defines two environments for programs, a
+"freestanding environment", required of all implementations and which
+may not have library facilities beyond those required of freestanding
+implementations, where the handling of program startup and termination
+are implementation-defined, and a "hosted environment", which is not
+required, in which all the library facilities are provided and startup
+is through a function `int main (void)' or `int main (int, char *[])'.
+An OS kernel would be a freestanding environment; a program using the
+facilities of an operating system would normally be in a hosted
+implementation.
+
+ GCC aims towards being usable as a conforming freestanding
+implementation, or as the compiler for a conforming hosted
+implementation.  By default, it will act as the compiler for a hosted
+implementation, defining `__STDC_HOSTED__' as `1' and presuming that
+when the names of ISO C functions are used, they have the semantics
+defined in the standard.  To make it act as a conforming freestanding
+implementation for a freestanding environment, use the option
+`-ffreestanding'; it will then define `__STDC_HOSTED__' to `0' and not
+make assumptions about the meanings of function names from the standard
+library, with exceptions noted below.  To build an OS kernel, you may
+well still need to make your own arrangements for linking and startup.
+*Note Options Controlling C Dialect: C Dialect Options.
+
+ GCC does not provide the library facilities required only of hosted
+implementations, nor yet all the facilities required by C99 of
+freestanding implementations; to use the facilities of a hosted
+environment, you will need to find them elsewhere (for example, in the
+GNU C library).  *Note Standard Libraries: Standard Libraries.
+
+ Most of the compiler support routines used by GCC are present in
+`libgcc', but there are a few exceptions.  GCC requires the
+freestanding environment provide `memcpy', `memmove', `memset' and
+`memcmp'.  Finally, if `__builtin_trap' is used, and the target does
+not implement the `trap' pattern, then GCC will emit a call to `abort'.
+
+ For references to Technical Corrigenda, Rationale documents and
+information concerning the history of C that is available online, see
+`http://gcc.gnu.org/readings.html'
+
+2.2 C++ language
+================
+
+GCC supports the ISO C++ standard (1998) and contains experimental
+support for the upcoming ISO C++ standard (200x).
+
+ The original ISO C++ standard was published as the ISO standard
+(ISO/IEC 14882:1998) and amended by a Technical Corrigenda published in
+2003 (ISO/IEC 14882:2003). These standards are referred to as C++98 and
+C++03, respectively. GCC implements the majority of C++98 (`export' is
+a notable exception) and most of the changes in C++03.  To select this
+standard in GCC, use one of the options `-ansi' or `-std=c++98'; to
+obtain all the diagnostics required by the standard, you should also
+specify `-pedantic' (or `-pedantic-errors' if you want them to be
+errors rather than warnings).
+
+ The ISO C++ committee is working on a new ISO C++ standard, dubbed
+C++0x, that is intended to be published by 2009. C++0x contains several
+changes to the C++ language, some of which have been implemented in an
+experimental C++0x mode in GCC. The C++0x mode in GCC tracks the draft
+working paper for the C++0x standard; the latest working paper is
+available on the ISO C++ committee's web site at
+`http://www.open-std.org/jtc1/sc22/wg21/'. For information regarding
+the C++0x features available in the experimental C++0x mode, see
+`http://gcc.gnu.org/projects/cxx0x.html'. To select this standard in
+GCC, use the option `-std=c++0x'; to obtain all the diagnostics
+required by the standard, you should also specify `-pedantic' (or
+`-pedantic-errors' if you want them to be errors rather than warnings).
+
+ By default, GCC provides some extensions to the C++ language; *Note
+Options Controlling C++ Dialect: C++ Dialect Options.  Use of the
+`-std' option listed above will disable these extensions.  You may also
+select an extended version of the C++ language explicitly with
+`-std=gnu++98' (for C++98 with GNU extensions) or `-std=gnu++0x' (for
+C++0x with GNU extensions).  The default, if no C++ language dialect
+options are given, is `-std=gnu++98'.
+
+2.3 Objective-C and Objective-C++ languages
+===========================================
+
+There is no formal written standard for Objective-C or Objective-C++.
+The most authoritative manual is "Object-Oriented Programming and the
+Objective-C Language", available at a number of web sites:
+
+   *
+     `http://developer.apple.com/mac/library/documentation/Cocoa/Conceptual/ObjectiveC/'
+     is a recent (and periodically updated) version;
+
+   * `http://objc.toodarkpark.net' is an older example;
+
+   * `http://www.gnustep.org' and `http://gcc.gnu.org/readings.html'
+     have additional useful information.
+
+ *Note GNAT Reference Manual: (gnat_rm)Top, for information on standard
+conformance and compatibility of the Ada compiler.
+
+ *Note Standards: (gfortran)Standards, for details of standards
+supported by GNU Fortran.
+
+ *Note Compatibility with the Java Platform: (gcj)Compatibility, for
+details of compatibility between `gcj' and the Java Platform.
+
+
+File: gcc.info,  Node: Invoking GCC,  Next: C Implementation,  Prev: Standards,  Up: Top
+
+3 GCC Command Options
+*********************
+
+When you invoke GCC, it normally does preprocessing, compilation,
+assembly and linking.  The "overall options" allow you to stop this
+process at an intermediate stage.  For example, the `-c' option says
+not to run the linker.  Then the output consists of object files output
+by the assembler.
+
+ Other options are passed on to one stage of processing.  Some options
+control the preprocessor and others the compiler itself.  Yet other
+options control the assembler and linker; most of these are not
+documented here, since you rarely need to use any of them.
+
+ Most of the command line options that you can use with GCC are useful
+for C programs; when an option is only useful with another language
+(usually C++), the explanation says so explicitly.  If the description
+for a particular option does not mention a source language, you can use
+that option with all supported languages.
+
+ *Note Compiling C++ Programs: Invoking G++, for a summary of special
+options for compiling C++ programs.
+
+ The `gcc' program accepts options and file names as operands.  Many
+options have multi-letter names; therefore multiple single-letter
+options may _not_ be grouped: `-dv' is very different from `-d -v'.
+
+ You can mix options and other arguments.  For the most part, the order
+you use doesn't matter.  Order does matter when you use several options
+of the same kind; for example, if you specify `-L' more than once, the
+directories are searched in the order specified.  Also, the placement
+of the `-l' option is significant.
+
+ Many options have long names starting with `-f' or with `-W'--for
+example, `-fmove-loop-invariants', `-Wformat' and so on.  Most of these
+have both positive and negative forms; the negative form of `-ffoo'
+would be `-fno-foo'.  This manual documents only one of these two
+forms, whichever one is not the default.
+
+ *Note Option Index::, for an index to GCC's options.
+
+* Menu:
+
+* Option Summary::      Brief list of all options, without explanations.
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* Invoking G++::        Compiling C++ programs.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+* Submodel Options::    Specifying minor hardware or convention variations,
+                        such as 68010 vs 68020.
+* Code Gen Options::    Specifying conventions for function calls, data layout
+                        and register usage.
+* Environment Variables:: Env vars that affect GCC.
+* Precompiled Headers:: Compiling a header once, and using it many times.
+
+
+File: gcc.info,  Node: Option Summary,  Next: Overall Options,  Up: Invoking GCC
+
+3.1 Option Summary
+==================
+
+Here is a summary of all the options, grouped by type.  Explanations are
+in the following sections.
+
+_Overall Options_
+     *Note Options Controlling the Kind of Output: Overall Options.
+          -c  -S  -E  -o FILE  -combine  -no-canonical-prefixes
+          -pipe  -pass-exit-codes
+          -x LANGUAGE  -v  -###  --help[=CLASS[,...]]  --target-help
+          --version -wrapper@FILE -fplugin=FILE -fplugin-arg-NAME=ARG
+
+_C Language Options_
+     *Note Options Controlling C Dialect: C Dialect Options.
+          -ansi  -std=STANDARD  -fgnu89-inline
+          -aux-info FILENAME
+          -fno-asm  -fno-builtin  -fno-builtin-FUNCTION
+          -fhosted  -ffreestanding -fopenmp -fms-extensions
+          -trigraphs  -no-integrated-cpp  -traditional  -traditional-cpp
+          -fallow-single-precision  -fcond-mismatch -flax-vector-conversions
+          -fsigned-bitfields  -fsigned-char
+          -funsigned-bitfields  -funsigned-char
+
+_C++ Language Options_
+     *Note Options Controlling C++ Dialect: C++ Dialect Options.
+          -fabi-version=N  -fno-access-control  -fcheck-new
+          -fconserve-space  -ffriend-injection
+          -fno-elide-constructors
+          -fno-enforce-eh-specs
+          -ffor-scope  -fno-for-scope  -fno-gnu-keywords
+          -fno-implicit-templates
+          -fno-implicit-inline-templates
+          -fno-implement-inlines  -fms-extensions
+          -fno-nonansi-builtins  -fno-operator-names
+          -fno-optional-diags  -fpermissive
+          -fno-pretty-templates
+          -frepo  -fno-rtti  -fstats  -ftemplate-depth=N
+          -fno-threadsafe-statics -fuse-cxa-atexit  -fno-weak  -nostdinc++
+          -fno-default-inline  -fvisibility-inlines-hidden
+          -fvisibility-ms-compat
+          -Wabi  -Wconversion-null  -Wctor-dtor-privacy
+          -Wnon-virtual-dtor  -Wreorder
+          -Weffc++  -Wstrict-null-sentinel
+          -Wno-non-template-friend  -Wold-style-cast
+          -Woverloaded-virtual  -Wno-pmf-conversions
+          -Wsign-promo
+
+_Objective-C and Objective-C++ Language Options_
+     *Note Options Controlling Objective-C and Objective-C++ Dialects:
+     Objective-C and Objective-C++ Dialect Options.
+          -fconstant-string-class=CLASS-NAME
+          -fgnu-runtime  -fnext-runtime
+          -fno-nil-receivers
+          -fobjc-call-cxx-cdtors
+          -fobjc-direct-dispatch
+          -fobjc-exceptions
+          -fobjc-gc
+          -freplace-objc-classes
+          -fzero-link
+          -gen-decls
+          -Wassign-intercept
+          -Wno-protocol  -Wselector
+          -Wstrict-selector-match
+          -Wundeclared-selector
+
+_Language Independent Options_
+     *Note Options to Control Diagnostic Messages Formatting: Language
+     Independent Options.
+          -fmessage-length=N
+          -fdiagnostics-show-location=[once|every-line]
+          -fdiagnostics-show-option
+
+_Warning Options_
+     *Note Options to Request or Suppress Warnings: Warning Options.
+          -fsyntax-only  -pedantic  -pedantic-errors
+          -w  -Wextra  -Wall  -Waddress  -Waggregate-return  -Warray-bounds
+          -Wno-attributes -Wno-builtin-macro-redefined
+          -Wc++-compat -Wc++0x-compat -Wcast-align  -Wcast-qual
+          -Wchar-subscripts -Wclobbered  -Wcomment
+          -Wconversion  -Wcoverage-mismatch  -Wno-deprecated
+          -Wno-deprecated-declarations -Wdisabled-optimization
+          -Wno-div-by-zero -Wempty-body  -Wenum-compare -Wno-endif-labels
+          -Werror  -Werror=*
+          -Wfatal-errors  -Wfloat-equal  -Wformat  -Wformat=2
+          -Wno-format-contains-nul -Wno-format-extra-args -Wformat-nonliteral
+          -Wformat-security  -Wformat-y2k
+          -Wframe-larger-than=LEN -Wjump-misses-init -Wignored-qualifiers
+          -Wimplicit  -Wimplicit-function-declaration  -Wimplicit-int
+          -Winit-self  -Winline
+          -Wno-int-to-pointer-cast -Wno-invalid-offsetof
+          -Winvalid-pch -Wlarger-than=LEN  -Wunsafe-loop-optimizations
+          -Wlogical-op -Wlong-long
+          -Wmain  -Wmissing-braces  -Wmissing-field-initializers
+          -Wmissing-format-attribute  -Wmissing-include-dirs
+          -Wmissing-noreturn  -Wno-mudflap
+          -Wno-multichar  -Wnonnull  -Wno-overflow
+          -Woverlength-strings  -Wpacked  -Wpacked-bitfield-compat  -Wpadded
+          -Wparentheses  -Wpedantic-ms-format -Wno-pedantic-ms-format
+          -Wpointer-arith  -Wno-pointer-to-int-cast
+          -Wredundant-decls
+          -Wreturn-type  -Wsequence-point  -Wshadow
+          -Wsign-compare  -Wsign-conversion  -Wstack-protector
+          -Wstrict-aliasing -Wstrict-aliasing=n
+          -Wstrict-overflow -Wstrict-overflow=N
+          -Wswitch  -Wswitch-default  -Wswitch-enum -Wsync-nand
+          -Wsystem-headers  -Wtrigraphs  -Wtype-limits  -Wundef  -Wuninitialized
+          -Wunknown-pragmas  -Wno-pragmas
+          -Wunsuffixed-float-constants  -Wunused  -Wunused-function
+          -Wunused-label  -Wunused-parameter -Wno-unused-result -Wunused-value  -Wunused-variable
+          -Wvariadic-macros -Wvla
+          -Wvolatile-register-var  -Wwrite-strings
+
+_C and Objective-C-only Warning Options_
+          -Wbad-function-cast  -Wmissing-declarations
+          -Wmissing-parameter-type  -Wmissing-prototypes  -Wnested-externs
+          -Wold-style-declaration  -Wold-style-definition
+          -Wstrict-prototypes  -Wtraditional  -Wtraditional-conversion
+          -Wdeclaration-after-statement -Wpointer-sign
+
+_Debugging Options_
+     *Note Options for Debugging Your Program or GCC: Debugging Options.
+          -dLETTERS  -dumpspecs  -dumpmachine  -dumpversion
+          -fdbg-cnt-list -fdbg-cnt=COUNTER-VALUE-LIST
+          -fdump-noaddr -fdump-unnumbered -fdump-unnumbered-links
+          -fdump-translation-unit[-N]
+          -fdump-class-hierarchy[-N]
+          -fdump-ipa-all -fdump-ipa-cgraph -fdump-ipa-inline
+          -fdump-statistics
+          -fdump-tree-all
+          -fdump-tree-original[-N]
+          -fdump-tree-optimized[-N]
+          -fdump-tree-cfg -fdump-tree-vcg -fdump-tree-alias
+          -fdump-tree-ch
+          -fdump-tree-ssa[-N] -fdump-tree-pre[-N]
+          -fdump-tree-ccp[-N] -fdump-tree-dce[-N]
+          -fdump-tree-gimple[-raw] -fdump-tree-mudflap[-N]
+          -fdump-tree-dom[-N]
+          -fdump-tree-dse[-N]
+          -fdump-tree-phiprop[-N]
+          -fdump-tree-phiopt[-N]
+          -fdump-tree-forwprop[-N]
+          -fdump-tree-copyrename[-N]
+          -fdump-tree-nrv -fdump-tree-vect
+          -fdump-tree-sink
+          -fdump-tree-sra[-N]
+          -fdump-tree-forwprop[-N]
+          -fdump-tree-fre[-N]
+          -fdump-tree-vrp[-N]
+          -ftree-vectorizer-verbose=N
+          -fdump-tree-storeccp[-N]
+          -fdump-final-insns=FILE
+          -fcompare-debug[=OPTS]  -fcompare-debug-second
+          -feliminate-dwarf2-dups -feliminate-unused-debug-types
+          -feliminate-unused-debug-symbols -femit-class-debug-always
+          -fenable-icf-debug
+          -fmem-report -fpre-ipa-mem-report -fpost-ipa-mem-report -fprofile-arcs
+          -frandom-seed=STRING -fsched-verbose=N
+          -fsel-sched-verbose -fsel-sched-dump-cfg -fsel-sched-pipelining-verbose
+          -ftest-coverage  -ftime-report -fvar-tracking
+          -fvar-tracking-assignments  -fvar-tracking-assignments-toggle
+          -g  -gLEVEL  -gtoggle  -gcoff  -gdwarf-VERSION
+          -ggdb  -gstabs  -gstabs+  -gstrict-dwarf  -gno-strict-dwarf
+          -gvms  -gxcoff  -gxcoff+
+          -fno-merge-debug-strings -fno-dwarf2-cfi-asm
+          -fdebug-prefix-map=OLD=NEW
+          -femit-struct-debug-baseonly -femit-struct-debug-reduced
+          -femit-struct-debug-detailed[=SPEC-LIST]
+          -p  -pg  -print-file-name=LIBRARY  -print-libgcc-file-name
+          -print-multi-directory  -print-multi-lib  -print-multi-os-directory
+          -print-prog-name=PROGRAM  -print-search-dirs  -Q
+          -print-sysroot -print-sysroot-headers-suffix
+          -save-temps -save-temps=cwd -save-temps=obj -time[=FILE]
+
+_Optimization Options_
+     *Note Options that Control Optimization: Optimize Options.
+          -falign-functions[=N] -falign-jumps[=N]
+          -falign-labels[=N] -falign-loops[=N] -fassociative-math
+          -fauto-inc-dec -fbranch-probabilities -fbranch-target-load-optimize
+          -fbranch-target-load-optimize2 -fbtr-bb-exclusive -fcaller-saves
+          -fcheck-data-deps -fconserve-stack -fcprop-registers -fcrossjumping
+          -fcse-follow-jumps -fcse-skip-blocks -fcx-fortran-rules -fcx-limited-range
+          -fdata-sections -fdce -fdce
+          -fdelayed-branch -fdelete-null-pointer-checks -fdse -fdse
+          -fearly-inlining -fipa-sra -fexpensive-optimizations -ffast-math
+          -ffinite-math-only -ffloat-store -fexcess-precision=STYLE
+          -fforward-propagate -ffunction-sections
+          -fgcse -fgcse-after-reload -fgcse-las -fgcse-lm
+          -fgcse-sm -fif-conversion -fif-conversion2 -findirect-inlining
+          -finline-functions -finline-functions-called-once -finline-limit=N
+          -finline-small-functions -fipa-cp -fipa-cp-clone -fipa-matrix-reorg -fipa-pta
+          -fipa-pure-const -fipa-reference -fipa-struct-reorg
+          -fipa-type-escape -fira-algorithm=ALGORITHM
+          -fira-region=REGION -fira-coalesce
+          -fira-loop-pressure -fno-ira-share-save-slots
+          -fno-ira-share-spill-slots -fira-verbose=N
+          -fivopts -fkeep-inline-functions -fkeep-static-consts
+          -floop-block -floop-interchange -floop-strip-mine -fgraphite-identity
+          -floop-parallelize-all -flto -flto-compression-level -flto-report -fltrans
+          -fltrans-output-list -fmerge-all-constants -fmerge-constants -fmodulo-sched
+          -fmodulo-sched-allow-regmoves -fmove-loop-invariants -fmudflap
+          -fmudflapir -fmudflapth -fno-branch-count-reg -fno-default-inline
+          -fno-defer-pop -fno-function-cse -fno-guess-branch-probability
+          -fno-inline -fno-math-errno -fno-peephole -fno-peephole2
+          -fno-sched-interblock -fno-sched-spec -fno-signed-zeros
+          -fno-toplevel-reorder -fno-trapping-math -fno-zero-initialized-in-bss
+          -fomit-frame-pointer -foptimize-register-move -foptimize-sibling-calls
+          -fpeel-loops -fpredictive-commoning -fprefetch-loop-arrays
+          -fprofile-correction -fprofile-dir=PATH -fprofile-generate
+          -fprofile-generate=PATH
+          -fprofile-use -fprofile-use=PATH -fprofile-values
+          -freciprocal-math -fregmove -frename-registers -freorder-blocks
+          -freorder-blocks-and-partition -freorder-functions
+          -frerun-cse-after-loop -freschedule-modulo-scheduled-loops
+          -frounding-math -fsched2-use-superblocks -fsched-pressure
+          -fsched-spec-load -fsched-spec-load-dangerous
+          -fsched-stalled-insns-dep[=N] -fsched-stalled-insns[=N]
+          -fsched-group-heuristic -fsched-critical-path-heuristic
+          -fsched-spec-insn-heuristic -fsched-rank-heuristic
+          -fsched-last-insn-heuristic -fsched-dep-count-heuristic
+          -fschedule-insns -fschedule-insns2 -fsection-anchors
+          -fselective-scheduling -fselective-scheduling2
+          -fsel-sched-pipelining -fsel-sched-pipelining-outer-loops
+          -fsignaling-nans -fsingle-precision-constant -fsplit-ivs-in-unroller
+          -fsplit-wide-types -fstack-protector -fstack-protector-all
+          -fstrict-aliasing -fstrict-overflow -fthread-jumps -ftracer
+          -ftree-builtin-call-dce -ftree-ccp -ftree-ch -ftree-copy-prop
+          -ftree-copyrename -ftree-dce
+          -ftree-dominator-opts -ftree-dse -ftree-forwprop -ftree-fre -ftree-loop-im
+          -ftree-phiprop -ftree-loop-distribution
+          -ftree-loop-ivcanon -ftree-loop-linear -ftree-loop-optimize
+          -ftree-parallelize-loops=N -ftree-pre -ftree-pta -ftree-reassoc
+          -ftree-sink -ftree-sra -ftree-switch-conversion
+          -ftree-ter -ftree-vect-loop-version -ftree-vectorize -ftree-vrp
+          -funit-at-a-time -funroll-all-loops -funroll-loops
+          -funsafe-loop-optimizations -funsafe-math-optimizations -funswitch-loops
+          -fvariable-expansion-in-unroller -fvect-cost-model -fvpt -fweb
+          -fwhole-program -fwhopr -fwpa -fuse-linker-plugin
+          --param NAME=VALUE
+          -O  -O0  -O1  -O2  -O3  -Os
+
+_Preprocessor Options_
+     *Note Options Controlling the Preprocessor: Preprocessor Options.
+          -AQUESTION=ANSWER
+          -A-QUESTION[=ANSWER]
+          -C  -dD  -dI  -dM  -dN
+          -DMACRO[=DEFN]  -E  -H
+          -idirafter DIR
+          -include FILE  -imacros FILE
+          -iprefix FILE  -iwithprefix DIR
+          -iwithprefixbefore DIR  -isystem DIR
+          -imultilib DIR -isysroot DIR
+          -M  -MM  -MF  -MG  -MP  -MQ  -MT  -nostdinc
+          -P  -fworking-directory  -remap
+          -trigraphs  -undef  -UMACRO  -Wp,OPTION
+          -Xpreprocessor OPTION
+
+_Assembler Option_
+     *Note Passing Options to the Assembler: Assembler Options.
+          -Wa,OPTION  -Xassembler OPTION
+
+_Linker Options_
+     *Note Options for Linking: Link Options.
+          OBJECT-FILE-NAME  -lLIBRARY
+          -nostartfiles  -nodefaultlibs  -nostdlib -pie -rdynamic
+          -s  -static  -static-libgcc  -static-libstdc++ -shared
+          -shared-libgcc  -symbolic
+          -T SCRIPT  -Wl,OPTION  -Xlinker OPTION
+          -u SYMBOL
+
+_Directory Options_
+     *Note Options for Directory Search: Directory Options.
+          -BPREFIX  -IDIR  -iquoteDIR  -LDIR
+          -specs=FILE  -I- --sysroot=DIR
+
+_Target Options_
+     *Note Target Options::.
+          -V VERSION  -b MACHINE
+
+_Machine Dependent Options_
+     *Note Hardware Models and Configurations: Submodel Options.
+
+     _ARC Options_
+          -EB  -EL
+          -mmangle-cpu  -mcpu=CPU  -mtext=TEXT-SECTION
+          -mdata=DATA-SECTION  -mrodata=READONLY-DATA-SECTION
+
+     _ARM Options_
+          -mapcs-frame  -mno-apcs-frame
+          -mabi=NAME
+          -mapcs-stack-check  -mno-apcs-stack-check
+          -mapcs-float  -mno-apcs-float
+          -mapcs-reentrant  -mno-apcs-reentrant
+          -msched-prolog  -mno-sched-prolog
+          -mlittle-endian  -mbig-endian  -mwords-little-endian
+          -mfloat-abi=NAME  -msoft-float  -mhard-float  -mfpe
+          -mfp16-format=NAME
+          -mthumb-interwork  -mno-thumb-interwork
+          -mcpu=NAME  -march=NAME  -mfpu=NAME
+          -mstructure-size-boundary=N
+          -mabort-on-noreturn
+          -mlong-calls  -mno-long-calls
+          -msingle-pic-base  -mno-single-pic-base
+          -mpic-register=REG
+          -mnop-fun-dllimport
+          -mcirrus-fix-invalid-insns -mno-cirrus-fix-invalid-insns
+          -mpoke-function-name
+          -mthumb  -marm
+          -mtpcs-frame  -mtpcs-leaf-frame
+          -mcaller-super-interworking  -mcallee-super-interworking
+          -mtp=NAME
+          -mword-relocations
+          -mfix-cortex-m3-ldrd
+
+     _AVR Options_
+          -mmcu=MCU  -mno-interrupts
+          -mcall-prologues  -mtiny-stack  -mint8
+
+     _Blackfin Options_
+          -mcpu=CPU[-SIREVISION]
+          -msim -momit-leaf-frame-pointer  -mno-omit-leaf-frame-pointer
+          -mspecld-anomaly  -mno-specld-anomaly  -mcsync-anomaly  -mno-csync-anomaly
+          -mlow-64k -mno-low64k  -mstack-check-l1  -mid-shared-library
+          -mno-id-shared-library  -mshared-library-id=N
+          -mleaf-id-shared-library  -mno-leaf-id-shared-library
+          -msep-data  -mno-sep-data  -mlong-calls  -mno-long-calls
+          -mfast-fp -minline-plt -mmulticore  -mcorea  -mcoreb  -msdram
+          -micplb
+
+     _CRIS Options_
+          -mcpu=CPU  -march=CPU  -mtune=CPU
+          -mmax-stack-frame=N  -melinux-stacksize=N
+          -metrax4  -metrax100  -mpdebug  -mcc-init  -mno-side-effects
+          -mstack-align  -mdata-align  -mconst-align
+          -m32-bit  -m16-bit  -m8-bit  -mno-prologue-epilogue  -mno-gotplt
+          -melf  -maout  -melinux  -mlinux  -sim  -sim2
+          -mmul-bug-workaround  -mno-mul-bug-workaround
+
+     _CRX Options_
+          -mmac -mpush-args
+
+     _Darwin Options_
+          -all_load  -allowable_client  -arch  -arch_errors_fatal
+          -arch_only  -bind_at_load  -bundle  -bundle_loader
+          -client_name  -compatibility_version  -current_version
+          -dead_strip
+          -dependency-file  -dylib_file  -dylinker_install_name
+          -dynamic  -dynamiclib  -exported_symbols_list
+          -filelist  -flat_namespace  -force_cpusubtype_ALL
+          -force_flat_namespace  -headerpad_max_install_names
+          -iframework
+          -image_base  -init  -install_name  -keep_private_externs
+          -multi_module  -multiply_defined  -multiply_defined_unused
+          -noall_load   -no_dead_strip_inits_and_terms
+          -nofixprebinding -nomultidefs  -noprebind  -noseglinkedit
+          -pagezero_size  -prebind  -prebind_all_twolevel_modules
+          -private_bundle  -read_only_relocs  -sectalign
+          -sectobjectsymbols  -whyload  -seg1addr
+          -sectcreate  -sectobjectsymbols  -sectorder
+          -segaddr -segs_read_only_addr -segs_read_write_addr
+          -seg_addr_table  -seg_addr_table_filename  -seglinkedit
+          -segprot  -segs_read_only_addr  -segs_read_write_addr
+          -single_module  -static  -sub_library  -sub_umbrella
+          -twolevel_namespace  -umbrella  -undefined
+          -unexported_symbols_list  -weak_reference_mismatches
+          -whatsloaded -F -gused -gfull -mmacosx-version-min=VERSION
+          -mkernel -mone-byte-bool
+
+     _DEC Alpha Options_
+          -mno-fp-regs  -msoft-float  -malpha-as  -mgas
+          -mieee  -mieee-with-inexact  -mieee-conformant
+          -mfp-trap-mode=MODE  -mfp-rounding-mode=MODE
+          -mtrap-precision=MODE  -mbuild-constants
+          -mcpu=CPU-TYPE  -mtune=CPU-TYPE
+          -mbwx  -mmax  -mfix  -mcix
+          -mfloat-vax  -mfloat-ieee
+          -mexplicit-relocs  -msmall-data  -mlarge-data
+          -msmall-text  -mlarge-text
+          -mmemory-latency=TIME
+
+     _DEC Alpha/VMS Options_
+          -mvms-return-codes -mdebug-main=PREFIX -mmalloc64
+
+     _FR30 Options_
+          -msmall-model -mno-lsim
+
+     _FRV Options_
+          -mgpr-32  -mgpr-64  -mfpr-32  -mfpr-64
+          -mhard-float  -msoft-float
+          -malloc-cc  -mfixed-cc  -mdword  -mno-dword
+          -mdouble  -mno-double
+          -mmedia  -mno-media  -mmuladd  -mno-muladd
+          -mfdpic  -minline-plt -mgprel-ro  -multilib-library-pic
+          -mlinked-fp  -mlong-calls  -malign-labels
+          -mlibrary-pic  -macc-4  -macc-8
+          -mpack  -mno-pack  -mno-eflags  -mcond-move  -mno-cond-move
+          -moptimize-membar -mno-optimize-membar
+          -mscc  -mno-scc  -mcond-exec  -mno-cond-exec
+          -mvliw-branch  -mno-vliw-branch
+          -mmulti-cond-exec  -mno-multi-cond-exec  -mnested-cond-exec
+          -mno-nested-cond-exec  -mtomcat-stats
+          -mTLS -mtls
+          -mcpu=CPU
+
+     _GNU/Linux Options_
+          -muclibc
+
+     _H8/300 Options_
+          -mrelax  -mh  -ms  -mn  -mint32  -malign-300
+
+     _HPPA Options_
+          -march=ARCHITECTURE-TYPE
+          -mbig-switch  -mdisable-fpregs  -mdisable-indexing
+          -mfast-indirect-calls  -mgas  -mgnu-ld   -mhp-ld
+          -mfixed-range=REGISTER-RANGE
+          -mjump-in-delay -mlinker-opt -mlong-calls
+          -mlong-load-store  -mno-big-switch  -mno-disable-fpregs
+          -mno-disable-indexing  -mno-fast-indirect-calls  -mno-gas
+          -mno-jump-in-delay  -mno-long-load-store
+          -mno-portable-runtime  -mno-soft-float
+          -mno-space-regs  -msoft-float  -mpa-risc-1-0
+          -mpa-risc-1-1  -mpa-risc-2-0  -mportable-runtime
+          -mschedule=CPU-TYPE  -mspace-regs  -msio  -mwsio
+          -munix=UNIX-STD  -nolibdld  -static  -threads
+
+     _i386 and x86-64 Options_
+          -mtune=CPU-TYPE  -march=CPU-TYPE
+          -mfpmath=UNIT
+          -masm=DIALECT  -mno-fancy-math-387
+          -mno-fp-ret-in-387  -msoft-float
+          -mno-wide-multiply  -mrtd  -malign-double
+          -mpreferred-stack-boundary=NUM
+          -mincoming-stack-boundary=NUM
+          -mcld -mcx16 -msahf -mmovbe -mcrc32 -mrecip
+          -mmmx  -msse  -msse2 -msse3 -mssse3 -msse4.1 -msse4.2 -msse4 -mavx
+          -maes -mpclmul -mfused-madd
+          -msse4a -m3dnow -mpopcnt -mabm -mfma4 -mxop -mlwp
+          -mthreads  -mno-align-stringops  -minline-all-stringops
+          -minline-stringops-dynamically -mstringop-strategy=ALG
+          -mpush-args  -maccumulate-outgoing-args  -m128bit-long-double
+          -m96bit-long-double  -mregparm=NUM  -msseregparm
+          -mveclibabi=TYPE -mpc32 -mpc64 -mpc80 -mstackrealign
+          -momit-leaf-frame-pointer  -mno-red-zone -mno-tls-direct-seg-refs
+          -mcmodel=CODE-MODEL -mabi=NAME
+          -m32  -m64 -mlarge-data-threshold=NUM
+          -msse2avx
+
+     _IA-64 Options_
+          -mbig-endian  -mlittle-endian  -mgnu-as  -mgnu-ld  -mno-pic
+          -mvolatile-asm-stop  -mregister-names  -msdata -mno-sdata
+          -mconstant-gp  -mauto-pic  -mfused-madd
+          -minline-float-divide-min-latency
+          -minline-float-divide-max-throughput
+          -mno-inline-float-divide
+          -minline-int-divide-min-latency
+          -minline-int-divide-max-throughput
+          -mno-inline-int-divide
+          -minline-sqrt-min-latency -minline-sqrt-max-throughput
+          -mno-inline-sqrt
+          -mdwarf2-asm -mearly-stop-bits
+          -mfixed-range=REGISTER-RANGE -mtls-size=TLS-SIZE
+          -mtune=CPU-TYPE -milp32 -mlp64
+          -msched-br-data-spec -msched-ar-data-spec -msched-control-spec
+          -msched-br-in-data-spec -msched-ar-in-data-spec -msched-in-control-spec
+          -msched-spec-ldc -msched-spec-control-ldc
+          -msched-prefer-non-data-spec-insns -msched-prefer-non-control-spec-insns
+          -msched-stop-bits-after-every-cycle -msched-count-spec-in-critical-path
+          -msel-sched-dont-check-control-spec -msched-fp-mem-deps-zero-cost
+          -msched-max-memory-insns-hard-limit -msched-max-memory-insns=MAX-INSNS
+
+     _IA-64/VMS Options_
+          -mvms-return-codes -mdebug-main=PREFIX -mmalloc64
+
+     _LM32 Options_
+          -mbarrel-shift-enabled -mdivide-enabled -mmultiply-enabled
+          -msign-extend-enabled -muser-enabled
+
+     _M32R/D Options_
+          -m32r2 -m32rx -m32r
+          -mdebug
+          -malign-loops -mno-align-loops
+          -missue-rate=NUMBER
+          -mbranch-cost=NUMBER
+          -mmodel=CODE-SIZE-MODEL-TYPE
+          -msdata=SDATA-TYPE
+          -mno-flush-func -mflush-func=NAME
+          -mno-flush-trap -mflush-trap=NUMBER
+          -G NUM
+
+     _M32C Options_
+          -mcpu=CPU -msim -memregs=NUMBER
+
+     _M680x0 Options_
+          -march=ARCH  -mcpu=CPU  -mtune=TUNE
+          -m68000  -m68020  -m68020-40  -m68020-60  -m68030  -m68040
+          -m68060  -mcpu32  -m5200  -m5206e  -m528x  -m5307  -m5407
+          -mcfv4e  -mbitfield  -mno-bitfield  -mc68000  -mc68020
+          -mnobitfield  -mrtd  -mno-rtd  -mdiv  -mno-div  -mshort
+          -mno-short  -mhard-float  -m68881  -msoft-float  -mpcrel
+          -malign-int  -mstrict-align  -msep-data  -mno-sep-data
+          -mshared-library-id=n  -mid-shared-library  -mno-id-shared-library
+          -mxgot -mno-xgot
+
+     _M68hc1x Options_
+          -m6811  -m6812  -m68hc11  -m68hc12   -m68hcs12
+          -mauto-incdec  -minmax  -mlong-calls  -mshort
+          -msoft-reg-count=COUNT
+
+     _MCore Options_
+          -mhardlit  -mno-hardlit  -mdiv  -mno-div  -mrelax-immediates
+          -mno-relax-immediates  -mwide-bitfields  -mno-wide-bitfields
+          -m4byte-functions  -mno-4byte-functions  -mcallgraph-data
+          -mno-callgraph-data  -mslow-bytes  -mno-slow-bytes  -mno-lsim
+          -mlittle-endian  -mbig-endian  -m210  -m340  -mstack-increment
+
+     _MeP Options_
+          -mabsdiff -mall-opts -maverage -mbased=N -mbitops
+          -mc=N -mclip -mconfig=NAME -mcop -mcop32 -mcop64 -mivc2
+          -mdc -mdiv -meb -mel -mio-volatile -ml -mleadz -mm -mminmax
+          -mmult -mno-opts -mrepeat -ms -msatur -msdram -msim -msimnovec -mtf
+          -mtiny=N
+
+     _MIPS Options_
+          -EL  -EB  -march=ARCH  -mtune=ARCH
+          -mips1  -mips2  -mips3  -mips4  -mips32  -mips32r2
+          -mips64  -mips64r2
+          -mips16  -mno-mips16  -mflip-mips16
+          -minterlink-mips16  -mno-interlink-mips16
+          -mabi=ABI  -mabicalls  -mno-abicalls
+          -mshared  -mno-shared  -mplt  -mno-plt  -mxgot  -mno-xgot
+          -mgp32  -mgp64  -mfp32  -mfp64  -mhard-float  -msoft-float
+          -msingle-float  -mdouble-float  -mdsp  -mno-dsp  -mdspr2  -mno-dspr2
+          -mfpu=FPU-TYPE
+          -msmartmips  -mno-smartmips
+          -mpaired-single  -mno-paired-single  -mdmx  -mno-mdmx
+          -mips3d  -mno-mips3d  -mmt  -mno-mt  -mllsc  -mno-llsc
+          -mlong64  -mlong32  -msym32  -mno-sym32
+          -GNUM  -mlocal-sdata  -mno-local-sdata
+          -mextern-sdata  -mno-extern-sdata  -mgpopt  -mno-gopt
+          -membedded-data  -mno-embedded-data
+          -muninit-const-in-rodata  -mno-uninit-const-in-rodata
+          -mcode-readable=SETTING
+          -msplit-addresses  -mno-split-addresses
+          -mexplicit-relocs  -mno-explicit-relocs
+          -mcheck-zero-division  -mno-check-zero-division
+          -mdivide-traps  -mdivide-breaks
+          -mmemcpy  -mno-memcpy  -mlong-calls  -mno-long-calls
+          -mmad  -mno-mad  -mfused-madd  -mno-fused-madd  -nocpp
+          -mfix-r4000  -mno-fix-r4000  -mfix-r4400  -mno-fix-r4400
+          -mfix-r10000 -mno-fix-r10000  -mfix-vr4120  -mno-fix-vr4120
+          -mfix-vr4130  -mno-fix-vr4130  -mfix-sb1  -mno-fix-sb1
+          -mflush-func=FUNC  -mno-flush-func
+          -mbranch-cost=NUM  -mbranch-likely  -mno-branch-likely
+          -mfp-exceptions -mno-fp-exceptions
+          -mvr4130-align -mno-vr4130-align -msynci -mno-synci
+          -mrelax-pic-calls -mno-relax-pic-calls -mmcount-ra-address
+
+     _MMIX Options_
+          -mlibfuncs  -mno-libfuncs  -mepsilon  -mno-epsilon  -mabi=gnu
+          -mabi=mmixware  -mzero-extend  -mknuthdiv  -mtoplevel-symbols
+          -melf  -mbranch-predict  -mno-branch-predict  -mbase-addresses
+          -mno-base-addresses  -msingle-exit  -mno-single-exit
+
+     _MN10300 Options_
+          -mmult-bug  -mno-mult-bug
+          -mam33  -mno-am33
+          -mam33-2  -mno-am33-2
+          -mreturn-pointer-on-d0
+          -mno-crt0  -mrelax
+
+     _OpenRISC 1000 Options_
+          -mhard-float -msoft-float -mdouble-float -mhard-div
+          -msoft-div -mhard-mul -msoft-mul -maj -msext -mcmov -mlogue
+          -mror -msibcall -mor32-newlib -mor32-newlib-uart
+
+     _TelRISC 32 Options_
+          -msoft-float -mdouble-float
+          -msoft-div msoft-mul -maj -msext -mcmov -mlogue
+          -mror -msibcall -mtc32-newlib -mtc32-newlib-uart
+
+     _PDP-11 Options_
+          -mfpu  -msoft-float  -mac0  -mno-ac0  -m40  -m45  -m10
+          -mbcopy  -mbcopy-builtin  -mint32  -mno-int16
+          -mint16  -mno-int32  -mfloat32  -mno-float64
+          -mfloat64  -mno-float32  -mabshi  -mno-abshi
+          -mbranch-expensive  -mbranch-cheap
+          -msplit  -mno-split  -munix-asm  -mdec-asm
+
+     _picoChip Options_
+          -mae=AE_TYPE -mvliw-lookahead=N
+          -msymbol-as-address -mno-inefficient-warnings
+
+     _PowerPC Options_ See RS/6000 and PowerPC Options.
+
+     _RS/6000 and PowerPC Options_
+          -mcpu=CPU-TYPE
+          -mtune=CPU-TYPE
+          -mpower  -mno-power  -mpower2  -mno-power2
+          -mpowerpc  -mpowerpc64  -mno-powerpc
+          -maltivec  -mno-altivec
+          -mpowerpc-gpopt  -mno-powerpc-gpopt
+          -mpowerpc-gfxopt  -mno-powerpc-gfxopt
+          -mmfcrf  -mno-mfcrf  -mpopcntb  -mno-popcntb -mpopcntd -mno-popcntd
+          -mfprnd  -mno-fprnd
+          -mcmpb -mno-cmpb -mmfpgpr -mno-mfpgpr -mhard-dfp -mno-hard-dfp
+          -mnew-mnemonics  -mold-mnemonics
+          -mfull-toc   -mminimal-toc  -mno-fp-in-toc  -mno-sum-in-toc
+          -m64  -m32  -mxl-compat  -mno-xl-compat  -mpe
+          -malign-power  -malign-natural
+          -msoft-float  -mhard-float  -mmultiple  -mno-multiple
+          -msingle-float -mdouble-float -msimple-fpu
+          -mstring  -mno-string  -mupdate  -mno-update
+          -mavoid-indexed-addresses  -mno-avoid-indexed-addresses
+          -mfused-madd  -mno-fused-madd  -mbit-align  -mno-bit-align
+          -mstrict-align  -mno-strict-align  -mrelocatable
+          -mno-relocatable  -mrelocatable-lib  -mno-relocatable-lib
+          -mtoc  -mno-toc  -mlittle  -mlittle-endian  -mbig  -mbig-endian
+          -mdynamic-no-pic  -maltivec -mswdiv
+          -mprioritize-restricted-insns=PRIORITY
+          -msched-costly-dep=DEPENDENCE_TYPE
+          -minsert-sched-nops=SCHEME
+          -mcall-sysv  -mcall-netbsd
+          -maix-struct-return  -msvr4-struct-return
+          -mabi=ABI-TYPE -msecure-plt -mbss-plt
+          -misel -mno-isel
+          -misel=yes  -misel=no
+          -mspe -mno-spe
+          -mspe=yes  -mspe=no
+          -mpaired
+          -mgen-cell-microcode -mwarn-cell-microcode
+          -mvrsave -mno-vrsave
+          -mmulhw -mno-mulhw
+          -mdlmzb -mno-dlmzb
+          -mfloat-gprs=yes  -mfloat-gprs=no -mfloat-gprs=single -mfloat-gprs=double
+          -mprototype  -mno-prototype
+          -msim  -mmvme  -mads  -myellowknife  -memb  -msdata
+          -msdata=OPT  -mvxworks  -G NUM  -pthread
+
+     _RX Options_
+          -m64bit-doubles  -m32bit-doubles  -fpu  -nofpu
+          -mcpu= -patch=
+          -mbig-endian-data -mlittle-endian-data
+          -msmall-data
+          -msim  -mno-sim
+          -mas100-syntax -mno-as100-syntax
+          -mrelax
+          -mmax-constant-size=
+          -mint-register=
+          -msave-acc-in-interrupts
+
+     _S/390 and zSeries Options_
+          -mtune=CPU-TYPE  -march=CPU-TYPE
+          -mhard-float  -msoft-float  -mhard-dfp -mno-hard-dfp
+          -mlong-double-64 -mlong-double-128
+          -mbackchain  -mno-backchain -mpacked-stack  -mno-packed-stack
+          -msmall-exec  -mno-small-exec  -mmvcle -mno-mvcle
+          -m64  -m31  -mdebug  -mno-debug  -mesa  -mzarch
+          -mtpf-trace -mno-tpf-trace  -mfused-madd  -mno-fused-madd
+          -mwarn-framesize  -mwarn-dynamicstack  -mstack-size -mstack-guard
+
+     _Score Options_
+          -meb -mel
+          -mnhwloop
+          -muls
+          -mmac
+          -mscore5 -mscore5u -mscore7 -mscore7d
+
+     _SH Options_
+          -m1  -m2  -m2e
+          -m2a-nofpu -m2a-single-only -m2a-single -m2a
+          -m3  -m3e
+          -m4-nofpu  -m4-single-only  -m4-single  -m4
+          -m4a-nofpu -m4a-single-only -m4a-single -m4a -m4al
+          -m5-64media  -m5-64media-nofpu
+          -m5-32media  -m5-32media-nofpu
+          -m5-compact  -m5-compact-nofpu
+          -mb  -ml  -mdalign  -mrelax
+          -mbigtable -mfmovd -mhitachi -mrenesas -mno-renesas -mnomacsave
+          -mieee  -mbitops  -misize  -minline-ic_invalidate -mpadstruct  -mspace
+          -mprefergot  -musermode -multcost=NUMBER -mdiv=STRATEGY
+          -mdivsi3_libfunc=NAME -mfixed-range=REGISTER-RANGE
+          -madjust-unroll -mindexed-addressing -mgettrcost=NUMBER -mpt-fixed
+          -minvalid-symbols
+
+     _SPARC Options_
+          -mcpu=CPU-TYPE
+          -mtune=CPU-TYPE
+          -mcmodel=CODE-MODEL
+          -m32  -m64  -mapp-regs  -mno-app-regs
+          -mfaster-structs  -mno-faster-structs
+          -mfpu  -mno-fpu  -mhard-float  -msoft-float
+          -mhard-quad-float  -msoft-quad-float
+          -mimpure-text  -mno-impure-text  -mlittle-endian
+          -mstack-bias  -mno-stack-bias
+          -munaligned-doubles  -mno-unaligned-doubles
+          -mv8plus  -mno-v8plus  -mvis  -mno-vis
+          -threads -pthreads -pthread
+
+     _SPU Options_
+          -mwarn-reloc -merror-reloc
+          -msafe-dma -munsafe-dma
+          -mbranch-hints
+          -msmall-mem -mlarge-mem -mstdmain
+          -mfixed-range=REGISTER-RANGE
+          -mea32 -mea64
+          -maddress-space-conversion -mno-address-space-conversion
+          -mcache-size=CACHE-SIZE
+          -matomic-updates -mno-atomic-updates
+
+     _System V Options_
+          -Qy  -Qn  -YP,PATHS  -Ym,DIR
+
+     _V850 Options_
+          -mlong-calls  -mno-long-calls  -mep  -mno-ep
+          -mprolog-function  -mno-prolog-function  -mspace
+          -mtda=N  -msda=N  -mzda=N
+          -mapp-regs  -mno-app-regs
+          -mdisable-callt  -mno-disable-callt
+          -mv850e1
+          -mv850e
+          -mv850  -mbig-switch
+
+     _VAX Options_
+          -mg  -mgnu  -munix
+
+     _VxWorks Options_
+          -mrtp  -non-static  -Bstatic  -Bdynamic
+          -Xbind-lazy  -Xbind-now
+
+     _x86-64 Options_ See i386 and x86-64 Options.
+
+     _i386 and x86-64 Windows Options_
+          -mconsole -mcygwin -mno-cygwin -mdll
+          -mnop-fun-dllimport -mthread -municode -mwin32 -mwindows
+          -fno-set-stack-executable
+
+     _Xstormy16 Options_
+          -msim
+
+     _Xtensa Options_
+          -mconst16 -mno-const16
+          -mfused-madd  -mno-fused-madd
+          -mserialize-volatile  -mno-serialize-volatile
+          -mtext-section-literals  -mno-text-section-literals
+          -mtarget-align  -mno-target-align
+          -mlongcalls  -mno-longcalls
+
+     _zSeries Options_ See S/390 and zSeries Options.
+
+_Code Generation Options_
+     *Note Options for Code Generation Conventions: Code Gen Options.
+          -fcall-saved-REG  -fcall-used-REG
+          -ffixed-REG  -fexceptions
+          -fnon-call-exceptions  -funwind-tables
+          -fasynchronous-unwind-tables
+          -finhibit-size-directive  -finstrument-functions
+          -finstrument-functions-exclude-function-list=SYM,SYM,...
+          -finstrument-functions-exclude-file-list=FILE,FILE,...
+          -fno-common  -fno-ident
+          -fpcc-struct-return  -fpic  -fPIC -fpie -fPIE
+          -fno-jump-tables
+          -frecord-gcc-switches
+          -freg-struct-return  -fshort-enums
+          -fshort-double  -fshort-wchar
+          -fverbose-asm  -fpack-struct[=N]  -fstack-check
+          -fstack-limit-register=REG  -fstack-limit-symbol=SYM
+          -fno-stack-limit  -fargument-alias  -fargument-noalias
+          -fargument-noalias-global  -fargument-noalias-anything
+          -fleading-underscore  -ftls-model=MODEL
+          -ftrapv  -fwrapv  -fbounds-check
+          -fvisibility
+
+
+* Menu:
+
+* Overall Options::     Controlling the kind of output:
+                        an executable, object files, assembler files,
+                        or preprocessed source.
+* C Dialect Options::   Controlling the variant of C language compiled.
+* C++ Dialect Options:: Variations on C++.
+* Objective-C and Objective-C++ Dialect Options:: Variations on Objective-C
+                        and Objective-C++.
+* Language Independent Options:: Controlling how diagnostics should be
+                        formatted.
+* Warning Options::     How picky should the compiler be?
+* Debugging Options::   Symbol tables, measurements, and debugging dumps.
+* Optimize Options::    How much optimization?
+* Preprocessor Options:: Controlling header files and macro definitions.
+                         Also, getting dependency information for Make.
+* Assembler Options::   Passing options to the assembler.
+* Link Options::        Specifying libraries and so on.
+* Directory Options::   Where to find header files and libraries.
+                        Where to find the compiler executable files.
+* Spec Files::          How to pass switches to sub-processes.
+* Target Options::      Running a cross-compiler, or an old version of GCC.
+
+
+File: gcc.info,  Node: Overall Options,  Next: Invoking G++,  Prev: Option Summary,  Up: Invoking GCC
+
+3.2 Options Controlling the Kind of Output
+==========================================
+
+Compilation can involve up to four stages: preprocessing, compilation
+proper, assembly and linking, always in that order.  GCC is capable of
+preprocessing and compiling several files either into several assembler
+input files, or into one assembler input file; then each assembler
+input file produces an object file, and linking combines all the object
+files (those newly compiled, and those specified as input) into an
+executable file.
+
+ For any given input file, the file name suffix determines what kind of
+compilation is done:
+
+`FILE.c'
+     C source code which must be preprocessed.
+
+`FILE.i'
+     C source code which should not be preprocessed.
+
+`FILE.ii'
+     C++ source code which should not be preprocessed.
+
+`FILE.m'
+     Objective-C source code.  Note that you must link with the
+     `libobjc' library to make an Objective-C program work.
+
+`FILE.mi'
+     Objective-C source code which should not be preprocessed.
+
+`FILE.mm'
+`FILE.M'
+     Objective-C++ source code.  Note that you must link with the
+     `libobjc' library to make an Objective-C++ program work.  Note
+     that `.M' refers to a literal capital M.
+
+`FILE.mii'
+     Objective-C++ source code which should not be preprocessed.
+
+`FILE.h'
+     C, C++, Objective-C or Objective-C++ header file to be turned into
+     a precompiled header.
+
+`FILE.cc'
+`FILE.cp'
+`FILE.cxx'
+`FILE.cpp'
+`FILE.CPP'
+`FILE.c++'
+`FILE.C'
+     C++ source code which must be preprocessed.  Note that in `.cxx',
+     the last two letters must both be literally `x'.  Likewise, `.C'
+     refers to a literal capital C.
+
+`FILE.mm'
+`FILE.M'
+     Objective-C++ source code which must be preprocessed.
+
+`FILE.mii'
+     Objective-C++ source code which should not be preprocessed.
+
+`FILE.hh'
+`FILE.H'
+`FILE.hp'
+`FILE.hxx'
+`FILE.hpp'
+`FILE.HPP'
+`FILE.h++'
+`FILE.tcc'
+     C++ header file to be turned into a precompiled header.
+
+`FILE.f'
+`FILE.for'
+`FILE.ftn'
+     Fixed form Fortran source code which should not be preprocessed.
+
+`FILE.F'
+`FILE.FOR'
+`FILE.fpp'
+`FILE.FPP'
+`FILE.FTN'
+     Fixed form Fortran source code which must be preprocessed (with
+     the traditional preprocessor).
+
+`FILE.f90'
+`FILE.f95'
+`FILE.f03'
+`FILE.f08'
+     Free form Fortran source code which should not be preprocessed.
+
+`FILE.F90'
+`FILE.F95'
+`FILE.F03'
+`FILE.F08'
+     Free form Fortran source code which must be preprocessed (with the
+     traditional preprocessor).
+
+`FILE.ads'
+     Ada source code file which contains a library unit declaration (a
+     declaration of a package, subprogram, or generic, or a generic
+     instantiation), or a library unit renaming declaration (a package,
+     generic, or subprogram renaming declaration).  Such files are also
+     called "specs".
+
+`FILE.adb'
+     Ada source code file containing a library unit body (a subprogram
+     or package body).  Such files are also called "bodies".
+
+`FILE.s'
+     Assembler code.
+
+`FILE.S'
+`FILE.sx'
+     Assembler code which must be preprocessed.
+
+`OTHER'
+     An object file to be fed straight into linking.  Any file name
+     with no recognized suffix is treated this way.
+
+ You can specify the input language explicitly with the `-x' option:
+
+`-x LANGUAGE'
+     Specify explicitly the LANGUAGE for the following input files
+     (rather than letting the compiler choose a default based on the
+     file name suffix).  This option applies to all following input
+     files until the next `-x' option.  Possible values for LANGUAGE
+     are:
+          c  c-header  c-cpp-output
+          c++  c++-header  c++-cpp-output
+          objective-c  objective-c-header  objective-c-cpp-output
+          objective-c++ objective-c++-header objective-c++-cpp-output
+          assembler  assembler-with-cpp
+          ada
+          f77  f77-cpp-input f95  f95-cpp-input
+          java
+
+`-x none'
+     Turn off any specification of a language, so that subsequent files
+     are handled according to their file name suffixes (as they are if
+     `-x' has not been used at all).
+
+`-pass-exit-codes'
+     Normally the `gcc' program will exit with the code of 1 if any
+     phase of the compiler returns a non-success return code.  If you
+     specify `-pass-exit-codes', the `gcc' program will instead return
+     with numerically highest error produced by any phase that returned
+     an error indication.  The C, C++, and Fortran frontends return 4,
+     if an internal compiler error is encountered.
+
+ If you only want some of the stages of compilation, you can use `-x'
+(or filename suffixes) to tell `gcc' where to start, and one of the
+options `-c', `-S', or `-E' to say where `gcc' is to stop.  Note that
+some combinations (for example, `-x cpp-output -E') instruct `gcc' to
+do nothing at all.
+
+`-c'
+     Compile or assemble the source files, but do not link.  The linking
+     stage simply is not done.  The ultimate output is in the form of an
+     object file for each source file.
+
+     By default, the object file name for a source file is made by
+     replacing the suffix `.c', `.i', `.s', etc., with `.o'.
+
+     Unrecognized input files, not requiring compilation or assembly,
+     are ignored.
+
+`-S'
+     Stop after the stage of compilation proper; do not assemble.  The
+     output is in the form of an assembler code file for each
+     non-assembler input file specified.
+
+     By default, the assembler file name for a source file is made by
+     replacing the suffix `.c', `.i', etc., with `.s'.
+
+     Input files that don't require compilation are ignored.
+
+`-E'
+     Stop after the preprocessing stage; do not run the compiler
+     proper.  The output is in the form of preprocessed source code,
+     which is sent to the standard output.
+
+     Input files which don't require preprocessing are ignored.
+
+`-o FILE'
+     Place output in file FILE.  This applies regardless to whatever
+     sort of output is being produced, whether it be an executable file,
+     an object file, an assembler file or preprocessed C code.
+
+     If `-o' is not specified, the default is to put an executable file
+     in `a.out', the object file for `SOURCE.SUFFIX' in `SOURCE.o', its
+     assembler file in `SOURCE.s', a precompiled header file in
+     `SOURCE.SUFFIX.gch', and all preprocessed C source on standard
+     output.
+
+`-v'
+     Print (on standard error output) the commands executed to run the
+     stages of compilation.  Also print the version number of the
+     compiler driver program and of the preprocessor and the compiler
+     proper.
+
+`-###'
+     Like `-v' except the commands are not executed and all command
+     arguments are quoted.  This is useful for shell scripts to capture
+     the driver-generated command lines.
+
+`-pipe'
+     Use pipes rather than temporary files for communication between the
+     various stages of compilation.  This fails to work on some systems
+     where the assembler is unable to read from a pipe; but the GNU
+     assembler has no trouble.
+
+`-combine'
+     If you are compiling multiple source files, this option tells the
+     driver to pass all the source files to the compiler at once (for
+     those languages for which the compiler can handle this).  This
+     will allow intermodule analysis (IMA) to be performed by the
+     compiler.  Currently the only language for which this is supported
+     is C.  If you pass source files for multiple languages to the
+     driver, using this option, the driver will invoke the compiler(s)
+     that support IMA once each, passing each compiler all the source
+     files appropriate for it.  For those languages that do not support
+     IMA this option will be ignored, and the compiler will be invoked
+     once for each source file in that language.  If you use this
+     option in conjunction with `-save-temps', the compiler will
+     generate multiple pre-processed files (one for each source file),
+     but only one (combined) `.o' or `.s' file.
+
+`--help'
+     Print (on the standard output) a description of the command line
+     options understood by `gcc'.  If the `-v' option is also specified
+     then `--help' will also be passed on to the various processes
+     invoked by `gcc', so that they can display the command line options
+     they accept.  If the `-Wextra' option has also been specified
+     (prior to the `--help' option), then command line options which
+     have no documentation associated with them will also be displayed.
+
+`--target-help'
+     Print (on the standard output) a description of target-specific
+     command line options for each tool.  For some targets extra
+     target-specific information may also be printed.
+
+`--help={CLASS|[^]QUALIFIER}[,...]'
+     Print (on the standard output) a description of the command line
+     options understood by the compiler that fit into all specified
+     classes and qualifiers.  These are the supported classes:
+
+    `optimizers'
+          This will display all of the optimization options supported
+          by the compiler.
+
+    `warnings'
+          This will display all of the options controlling warning
+          messages produced by the compiler.
+
+    `target'
+          This will display target-specific options.  Unlike the
+          `--target-help' option however, target-specific options of the
+          linker and assembler will not be displayed.  This is because
+          those tools do not currently support the extended `--help='
+          syntax.
+
+    `params'
+          This will display the values recognized by the `--param'
+          option.
+
+    LANGUAGE
+          This will display the options supported for LANGUAGE, where
+          LANGUAGE is the name of one of the languages supported in this
+          version of GCC.
+
+    `common'
+          This will display the options that are common to all
+          languages.
+
+     These are the supported qualifiers:
+
+    `undocumented'
+          Display only those options which are undocumented.
+
+    `joined'
+          Display options which take an argument that appears after an
+          equal sign in the same continuous piece of text, such as:
+          `--help=target'.
+
+    `separate'
+          Display options which take an argument that appears as a
+          separate word following the original option, such as: `-o
+          output-file'.
+
+     Thus for example to display all the undocumented target-specific
+     switches supported by the compiler the following can be used:
+
+          --help=target,undocumented
+
+     The sense of a qualifier can be inverted by prefixing it with the
+     `^' character, so for example to display all binary warning
+     options (i.e., ones that are either on or off and that do not take
+     an argument), which have a description the following can be used:
+
+          --help=warnings,^joined,^undocumented
+
+     The argument to `--help=' should not consist solely of inverted
+     qualifiers.
+
+     Combining several classes is possible, although this usually
+     restricts the output by so much that there is nothing to display.
+     One case where it does work however is when one of the classes is
+     TARGET.  So for example to display all the target-specific
+     optimization options the following can be used:
+
+          --help=target,optimizers
+
+     The `--help=' option can be repeated on the command line.  Each
+     successive use will display its requested class of options,
+     skipping those that have already been displayed.
+
+     If the `-Q' option appears on the command line before the
+     `--help=' option, then the descriptive text displayed by `--help='
+     is changed.  Instead of describing the displayed options, an
+     indication is given as to whether the option is enabled, disabled
+     or set to a specific value (assuming that the compiler knows this
+     at the point where the `--help=' option is used).
+
+     Here is a truncated example from the ARM port of `gcc':
+
+            % gcc -Q -mabi=2 --help=target -c
+            The following options are target specific:
+            -mabi=                                2
+            -mabort-on-noreturn                   [disabled]
+            -mapcs                                [disabled]
+
+     The output is sensitive to the effects of previous command line
+     options, so for example it is possible to find out which
+     optimizations are enabled at `-O2' by using:
+
+          -Q -O2 --help=optimizers
+
+     Alternatively you can discover which binary optimizations are
+     enabled by `-O3' by using:
+
+          gcc -c -Q -O3 --help=optimizers > /tmp/O3-opts
+          gcc -c -Q -O2 --help=optimizers > /tmp/O2-opts
+          diff /tmp/O2-opts /tmp/O3-opts | grep enabled
+
+`-no-canonical-prefixes'
+     Do not expand any symbolic links, resolve references to `/../' or
+     `/./', or make the path absolute when generating a relative prefix.
+
+`--version'
+     Display the version number and copyrights of the invoked GCC.
+
+`-wrapper'
+     Invoke all subcommands under a wrapper program. It takes a single
+     comma separated list as an argument, which will be used to invoke
+     the wrapper:
+
+          gcc -c t.c -wrapper gdb,--args
+
+     This will invoke all subprograms of gcc under "gdb -args", thus
+     cc1 invocation will be "gdb -args cc1 ...".
+
+`-fplugin=NAME.so'
+     Load the plugin code in file NAME.so, assumed to be a shared
+     object to be dlopen'd by the compiler.  The base name of the
+     shared object file is used to identify the plugin for the purposes
+     of argument parsing (See `-fplugin-arg-NAME-KEY=VALUE' below).
+     Each plugin should define the callback functions specified in the
+     Plugins API.
+
+`-fplugin-arg-NAME-KEY=VALUE'
+     Define an argument called KEY with a value of VALUE for the plugin
+     called NAME.
+
+`@FILE'
+     Read command-line options from FILE.  The options read are
+     inserted in place of the original @FILE option.  If FILE does not
+     exist, or cannot be read, then the option will be treated
+     literally, and not removed.
+
+     Options in FILE are separated by whitespace.  A whitespace
+     character may be included in an option by surrounding the entire
+     option in either single or double quotes.  Any character
+     (including a backslash) may be included by prefixing the character
+     to be included with a backslash.  The FILE may itself contain
+     additional @FILE options; any such options will be processed
+     recursively.
+
+
+File: gcc.info,  Node: Invoking G++,  Next: C Dialect Options,  Prev: Overall Options,  Up: Invoking GCC
+
+3.3 Compiling C++ Programs
+==========================
+
+C++ source files conventionally use one of the suffixes `.C', `.cc',
+`.cpp', `.CPP', `.c++', `.cp', or `.cxx'; C++ header files often use
+`.hh', `.hpp', `.H', or (for shared template code) `.tcc'; and
+preprocessed C++ files use the suffix `.ii'.  GCC recognizes files with
+these names and compiles them as C++ programs even if you call the
+compiler the same way as for compiling C programs (usually with the
+name `gcc').
+
+ However, the use of `gcc' does not add the C++ library.  `g++' is a
+program that calls GCC and treats `.c', `.h' and `.i' files as C++
+source files instead of C source files unless `-x' is used, and
+automatically specifies linking against the C++ library.  This program
+is also useful when precompiling a C header file with a `.h' extension
+for use in C++ compilations.  On many systems, `g++' is also installed
+with the name `c++'.
+
+ When you compile C++ programs, you may specify many of the same
+command-line options that you use for compiling programs in any
+language; or command-line options meaningful for C and related
+languages; or options that are meaningful only for C++ programs.  *Note
+Options Controlling C Dialect: C Dialect Options, for explanations of
+options for languages related to C.  *Note Options Controlling C++
+Dialect: C++ Dialect Options, for explanations of options that are
+meaningful only for C++ programs.
+
+
+File: gcc.info,  Node: C Dialect Options,  Next: C++ Dialect Options,  Prev: Invoking G++,  Up: Invoking GCC
+
+3.4 Options Controlling C Dialect
+=================================
+
+The following options control the dialect of C (or languages derived
+from C, such as C++, Objective-C and Objective-C++) that the compiler
+accepts:
+
+`-ansi'
+     In C mode, this is equivalent to `-std=c90'. In C++ mode, it is
+     equivalent to `-std=c++98'.
+
+     This turns off certain features of GCC that are incompatible with
+     ISO C90 (when compiling C code), or of standard C++ (when
+     compiling C++ code), such as the `asm' and `typeof' keywords, and
+     predefined macros such as `unix' and `vax' that identify the type
+     of system you are using.  It also enables the undesirable and
+     rarely used ISO trigraph feature.  For the C compiler, it disables
+     recognition of C++ style `//' comments as well as the `inline'
+     keyword.
+
+     The alternate keywords `__asm__', `__extension__', `__inline__'
+     and `__typeof__' continue to work despite `-ansi'.  You would not
+     want to use them in an ISO C program, of course, but it is useful
+     to put them in header files that might be included in compilations
+     done with `-ansi'.  Alternate predefined macros such as `__unix__'
+     and `__vax__' are also available, with or without `-ansi'.
+
+     The `-ansi' option does not cause non-ISO programs to be rejected
+     gratuitously.  For that, `-pedantic' is required in addition to
+     `-ansi'.  *Note Warning Options::.
+
+     The macro `__STRICT_ANSI__' is predefined when the `-ansi' option
+     is used.  Some header files may notice this macro and refrain from
+     declaring certain functions or defining certain macros that the
+     ISO standard doesn't call for; this is to avoid interfering with
+     any programs that might use these names for other things.
+
+     Functions that would normally be built in but do not have semantics
+     defined by ISO C (such as `alloca' and `ffs') are not built-in
+     functions when `-ansi' is used.  *Note Other built-in functions
+     provided by GCC: Other Builtins, for details of the functions
+     affected.
+
+`-std='
+     Determine the language standard. *Note Language Standards
+     Supported by GCC: Standards, for details of these standard
+     versions.  This option is currently only supported when compiling
+     C or C++.
+
+     The compiler can accept several base standards, such as `c90' or
+     `c++98', and GNU dialects of those standards, such as `gnu90' or
+     `gnu++98'.  By specifying a base standard, the compiler will
+     accept all programs following that standard and those using GNU
+     extensions that do not contradict it.  For example, `-std=c90'
+     turns off certain features of GCC that are incompatible with ISO
+     C90, such as the `asm' and `typeof' keywords, but not other GNU
+     extensions that do not have a meaning in ISO C90, such as omitting
+     the middle term of a `?:' expression. On the other hand, by
+     specifying a GNU dialect of a standard, all features the compiler
+     support are enabled, even when those features change the meaning
+     of the base standard and some strict-conforming programs may be
+     rejected.  The particular standard is used by `-pedantic' to
+     identify which features are GNU extensions given that version of
+     the standard. For example `-std=gnu90 -pedantic' would warn about
+     C++ style `//' comments, while `-std=gnu99 -pedantic' would not.
+
+     A value for this option must be provided; possible values are
+
+    `c90'
+    `c89'
+    `iso9899:1990'
+          Support all ISO C90 programs (certain GNU extensions that
+          conflict with ISO C90 are disabled). Same as `-ansi' for C
+          code.
+
+    `iso9899:199409'
+          ISO C90 as modified in amendment 1.
+
+    `c99'
+    `c9x'
+    `iso9899:1999'
+    `iso9899:199x'
+          ISO C99.  Note that this standard is not yet fully supported;
+          see `http://gcc.gnu.org/gcc-4.5/c99status.html' for more
+          information.  The names `c9x' and `iso9899:199x' are
+          deprecated.
+
+    `gnu90'
+    `gnu89'
+          GNU dialect of ISO C90 (including some C99 features). This is
+          the default for C code.
+
+    `gnu99'
+    `gnu9x'
+          GNU dialect of ISO C99.  When ISO C99 is fully implemented in
+          GCC, this will become the default.  The name `gnu9x' is
+          deprecated.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments. Same as `-ansi' for
+          C++ code.
+
+    `gnu++98'
+          GNU dialect of `-std=c++98'.  This is the default for C++
+          code.
+
+    `c++0x'
+          The working draft of the upcoming ISO C++0x standard. This
+          option enables experimental features that are likely to be
+          included in C++0x. The working draft is constantly changing,
+          and any feature that is enabled by this flag may be removed
+          from future versions of GCC if it is not part of the C++0x
+          standard.
+
+    `gnu++0x'
+          GNU dialect of `-std=c++0x'. This option enables experimental
+          features that may be removed in future versions of GCC.
+
+`-fgnu89-inline'
+     The option `-fgnu89-inline' tells GCC to use the traditional GNU
+     semantics for `inline' functions when in C99 mode.  *Note An
+     Inline Function is As Fast As a Macro: Inline.  This option is
+     accepted and ignored by GCC versions 4.1.3 up to but not including
+     4.3.  In GCC versions 4.3 and later it changes the behavior of GCC
+     in C99 mode.  Using this option is roughly equivalent to adding the
+     `gnu_inline' function attribute to all inline functions (*note
+     Function Attributes::).
+
+     The option `-fno-gnu89-inline' explicitly tells GCC to use the C99
+     semantics for `inline' when in C99 or gnu99 mode (i.e., it
+     specifies the default behavior).  This option was first supported
+     in GCC 4.3.  This option is not supported in `-std=c90' or
+     `-std=gnu90' mode.
+
+     The preprocessor macros `__GNUC_GNU_INLINE__' and
+     `__GNUC_STDC_INLINE__' may be used to check which semantics are in
+     effect for `inline' functions.  *Note Common Predefined Macros:
+     (cpp)Common Predefined Macros.
+
+`-aux-info FILENAME'
+     Output to the given filename prototyped declarations for all
+     functions declared and/or defined in a translation unit, including
+     those in header files.  This option is silently ignored in any
+     language other than C.
+
+     Besides declarations, the file indicates, in comments, the origin
+     of each declaration (source file and line), whether the
+     declaration was implicit, prototyped or unprototyped (`I', `N' for
+     new or `O' for old, respectively, in the first character after the
+     line number and the colon), and whether it came from a declaration
+     or a definition (`C' or `F', respectively, in the following
+     character).  In the case of function definitions, a K&R-style list
+     of arguments followed by their declarations is also provided,
+     inside comments, after the declaration.
+
+`-fno-asm'
+     Do not recognize `asm', `inline' or `typeof' as a keyword, so that
+     code can use these words as identifiers.  You can use the keywords
+     `__asm__', `__inline__' and `__typeof__' instead.  `-ansi' implies
+     `-fno-asm'.
+
+     In C++, this switch only affects the `typeof' keyword, since `asm'
+     and `inline' are standard keywords.  You may want to use the
+     `-fno-gnu-keywords' flag instead, which has the same effect.  In
+     C99 mode (`-std=c99' or `-std=gnu99'), this switch only affects
+     the `asm' and `typeof' keywords, since `inline' is a standard
+     keyword in ISO C99.
+
+`-fno-builtin'
+`-fno-builtin-FUNCTION'
+     Don't recognize built-in functions that do not begin with
+     `__builtin_' as prefix.  *Note Other built-in functions provided
+     by GCC: Other Builtins, for details of the functions affected,
+     including those which are not built-in functions when `-ansi' or
+     `-std' options for strict ISO C conformance are used because they
+     do not have an ISO standard meaning.
+
+     GCC normally generates special code to handle certain built-in
+     functions more efficiently; for instance, calls to `alloca' may
+     become single instructions that adjust the stack directly, and
+     calls to `memcpy' may become inline copy loops.  The resulting
+     code is often both smaller and faster, but since the function
+     calls no longer appear as such, you cannot set a breakpoint on
+     those calls, nor can you change the behavior of the functions by
+     linking with a different library.  In addition, when a function is
+     recognized as a built-in function, GCC may use information about
+     that function to warn about problems with calls to that function,
+     or to generate more efficient code, even if the resulting code
+     still contains calls to that function.  For example, warnings are
+     given with `-Wformat' for bad calls to `printf', when `printf' is
+     built in, and `strlen' is known not to modify global memory.
+
+     With the `-fno-builtin-FUNCTION' option only the built-in function
+     FUNCTION is disabled.  FUNCTION must not begin with `__builtin_'.
+     If a function is named that is not built-in in this version of
+     GCC, this option is ignored.  There is no corresponding
+     `-fbuiltin-FUNCTION' option; if you wish to enable built-in
+     functions selectively when using `-fno-builtin' or
+     `-ffreestanding', you may define macros such as:
+
+          #define abs(n)          __builtin_abs ((n))
+          #define strcpy(d, s)    __builtin_strcpy ((d), (s))
+
+`-fhosted'
+     Assert that compilation takes place in a hosted environment.  This
+     implies `-fbuiltin'.  A hosted environment is one in which the
+     entire standard library is available, and in which `main' has a
+     return type of `int'.  Examples are nearly everything except a
+     kernel.  This is equivalent to `-fno-freestanding'.
+
+`-ffreestanding'
+     Assert that compilation takes place in a freestanding environment.
+     This implies `-fno-builtin'.  A freestanding environment is one in
+     which the standard library may not exist, and program startup may
+     not necessarily be at `main'.  The most obvious example is an OS
+     kernel.  This is equivalent to `-fno-hosted'.
+
+     *Note Language Standards Supported by GCC: Standards, for details
+     of freestanding and hosted environments.
+
+`-fopenmp'
+     Enable handling of OpenMP directives `#pragma omp' in C/C++ and
+     `!$omp' in Fortran.  When `-fopenmp' is specified, the compiler
+     generates parallel code according to the OpenMP Application
+     Program Interface v3.0 `http://www.openmp.org/'.  This option
+     implies `-pthread', and thus is only supported on targets that
+     have support for `-pthread'.
+
+`-fms-extensions'
+     Accept some non-standard constructs used in Microsoft header files.
+
+     Some cases of unnamed fields in structures and unions are only
+     accepted with this option.  *Note Unnamed struct/union fields
+     within structs/unions: Unnamed Fields, for details.
+
+`-trigraphs'
+     Support ISO C trigraphs.  The `-ansi' option (and `-std' options
+     for strict ISO C conformance) implies `-trigraphs'.
+
+`-no-integrated-cpp'
+     Performs a compilation in two passes: preprocessing and compiling.
+     This option allows a user supplied "cc1", "cc1plus", or "cc1obj"
+     via the `-B' option.  The user supplied compilation step can then
+     add in an additional preprocessing step after normal preprocessing
+     but before compiling.  The default is to use the integrated cpp
+     (internal cpp)
+
+     The semantics of this option will change if "cc1", "cc1plus", and
+     "cc1obj" are merged.
+
+`-traditional'
+`-traditional-cpp'
+     Formerly, these options caused GCC to attempt to emulate a
+     pre-standard C compiler.  They are now only supported with the
+     `-E' switch.  The preprocessor continues to support a pre-standard
+     mode.  See the GNU CPP manual for details.
+
+`-fcond-mismatch'
+     Allow conditional expressions with mismatched types in the second
+     and third arguments.  The value of such an expression is void.
+     This option is not supported for C++.
+
+`-flax-vector-conversions'
+     Allow implicit conversions between vectors with differing numbers
+     of elements and/or incompatible element types.  This option should
+     not be used for new code.
+
+`-funsigned-char'
+     Let the type `char' be unsigned, like `unsigned char'.
+
+     Each kind of machine has a default for what `char' should be.  It
+     is either like `unsigned char' by default or like `signed char' by
+     default.
+
+     Ideally, a portable program should always use `signed char' or
+     `unsigned char' when it depends on the signedness of an object.
+     But many programs have been written to use plain `char' and expect
+     it to be signed, or expect it to be unsigned, depending on the
+     machines they were written for.  This option, and its inverse, let
+     you make such a program work with the opposite default.
+
+     The type `char' is always a distinct type from each of `signed
+     char' or `unsigned char', even though its behavior is always just
+     like one of those two.
+
+`-fsigned-char'
+     Let the type `char' be signed, like `signed char'.
+
+     Note that this is equivalent to `-fno-unsigned-char', which is the
+     negative form of `-funsigned-char'.  Likewise, the option
+     `-fno-signed-char' is equivalent to `-funsigned-char'.
+
+`-fsigned-bitfields'
+`-funsigned-bitfields'
+`-fno-signed-bitfields'
+`-fno-unsigned-bitfields'
+     These options control whether a bit-field is signed or unsigned,
+     when the declaration does not use either `signed' or `unsigned'.
+     By default, such a bit-field is signed, because this is
+     consistent: the basic integer types such as `int' are signed types.
+
+
+File: gcc.info,  Node: C++ Dialect Options,  Next: Objective-C and Objective-C++ Dialect Options,  Prev: C Dialect Options,  Up: Invoking GCC
+
+3.5 Options Controlling C++ Dialect
+===================================
+
+This section describes the command-line options that are only meaningful
+for C++ programs; but you can also use most of the GNU compiler options
+regardless of what language your program is in.  For example, you might
+compile a file `firstClass.C' like this:
+
+     g++ -g -frepo -O -c firstClass.C
+
+In this example, only `-frepo' is an option meant only for C++
+programs; you can use the other options with any language supported by
+GCC.
+
+ Here is a list of options that are _only_ for compiling C++ programs:
+
+`-fabi-version=N'
+     Use version N of the C++ ABI.  Version 2 is the version of the C++
+     ABI that first appeared in G++ 3.4.  Version 1 is the version of
+     the C++ ABI that first appeared in G++ 3.2.  Version 0 will always
+     be the version that conforms most closely to the C++ ABI
+     specification.  Therefore, the ABI obtained using version 0 will
+     change as ABI bugs are fixed.
+
+     The default is version 2.
+
+     Version 3 corrects an error in mangling a constant address as a
+     template argument.
+
+     Version 4 implements a standard mangling for vector types.
+
+     See also `-Wabi'.
+
+`-fno-access-control'
+     Turn off all access checking.  This switch is mainly useful for
+     working around bugs in the access control code.
+
+`-fcheck-new'
+     Check that the pointer returned by `operator new' is non-null
+     before attempting to modify the storage allocated.  This check is
+     normally unnecessary because the C++ standard specifies that
+     `operator new' will only return `0' if it is declared `throw()',
+     in which case the compiler will always check the return value even
+     without this option.  In all other cases, when `operator new' has
+     a non-empty exception specification, memory exhaustion is
+     signalled by throwing `std::bad_alloc'.  See also `new (nothrow)'.
+
+`-fconserve-space'
+     Put uninitialized or runtime-initialized global variables into the
+     common segment, as C does.  This saves space in the executable at
+     the cost of not diagnosing duplicate definitions.  If you compile
+     with this flag and your program mysteriously crashes after
+     `main()' has completed, you may have an object that is being
+     destroyed twice because two definitions were merged.
+
+     This option is no longer useful on most targets, now that support
+     has been added for putting variables into BSS without making them
+     common.
+
+`-fno-deduce-init-list'
+     Disable deduction of a template type parameter as
+     std::initializer_list from a brace-enclosed initializer list, i.e.
+
+          template <class T> auto forward(T t) -> decltype (realfn (t))
+          {
+            return realfn (t);
+          }
+
+          void f()
+          {
+            forward({1,2}); // call forward<std::initializer_list<int>>
+          }
+
+     This option is present because this deduction is an extension to
+     the current specification in the C++0x working draft, and there was
+     some concern about potential overload resolution problems.
+
+`-ffriend-injection'
+     Inject friend functions into the enclosing namespace, so that they
+     are visible outside the scope of the class in which they are
+     declared.  Friend functions were documented to work this way in
+     the old Annotated C++ Reference Manual, and versions of G++ before
+     4.1 always worked that way.  However, in ISO C++ a friend function
+     which is not declared in an enclosing scope can only be found
+     using argument dependent lookup.  This option causes friends to be
+     injected as they were in earlier releases.
+
+     This option is for compatibility, and may be removed in a future
+     release of G++.
+
+`-fno-elide-constructors'
+     The C++ standard allows an implementation to omit creating a
+     temporary which is only used to initialize another object of the
+     same type.  Specifying this option disables that optimization, and
+     forces G++ to call the copy constructor in all cases.
+
+`-fno-enforce-eh-specs'
+     Don't generate code to check for violation of exception
+     specifications at runtime.  This option violates the C++ standard,
+     but may be useful for reducing code size in production builds,
+     much like defining `NDEBUG'.  This does not give user code
+     permission to throw exceptions in violation of the exception
+     specifications; the compiler will still optimize based on the
+     specifications, so throwing an unexpected exception will result in
+     undefined behavior.
+
+`-ffor-scope'
+`-fno-for-scope'
+     If `-ffor-scope' is specified, the scope of variables declared in
+     a for-init-statement is limited to the `for' loop itself, as
+     specified by the C++ standard.  If `-fno-for-scope' is specified,
+     the scope of variables declared in a for-init-statement extends to
+     the end of the enclosing scope, as was the case in old versions of
+     G++, and other (traditional) implementations of C++.
+
+     The default if neither flag is given to follow the standard, but
+     to allow and give a warning for old-style code that would
+     otherwise be invalid, or have different behavior.
+
+`-fno-gnu-keywords'
+     Do not recognize `typeof' as a keyword, so that code can use this
+     word as an identifier.  You can use the keyword `__typeof__'
+     instead.  `-ansi' implies `-fno-gnu-keywords'.
+
+`-fno-implicit-templates'
+     Never emit code for non-inline templates which are instantiated
+     implicitly (i.e. by use); only emit code for explicit
+     instantiations.  *Note Template Instantiation::, for more
+     information.
+
+`-fno-implicit-inline-templates'
+     Don't emit code for implicit instantiations of inline templates,
+     either.  The default is to handle inlines differently so that
+     compiles with and without optimization will need the same set of
+     explicit instantiations.
+
+`-fno-implement-inlines'
+     To save space, do not emit out-of-line copies of inline functions
+     controlled by `#pragma implementation'.  This will cause linker
+     errors if these functions are not inlined everywhere they are
+     called.
+
+`-fms-extensions'
+     Disable pedantic warnings about constructs used in MFC, such as
+     implicit int and getting a pointer to member function via
+     non-standard syntax.
+
+`-fno-nonansi-builtins'
+     Disable built-in declarations of functions that are not mandated by
+     ANSI/ISO C.  These include `ffs', `alloca', `_exit', `index',
+     `bzero', `conjf', and other related functions.
+
+`-fno-operator-names'
+     Do not treat the operator name keywords `and', `bitand', `bitor',
+     `compl', `not', `or' and `xor' as synonyms as keywords.
+
+`-fno-optional-diags'
+     Disable diagnostics that the standard says a compiler does not
+     need to issue.  Currently, the only such diagnostic issued by G++
+     is the one for a name having multiple meanings within a class.
+
+`-fpermissive'
+     Downgrade some diagnostics about nonconformant code from errors to
+     warnings.  Thus, using `-fpermissive' will allow some
+     nonconforming code to compile.
+
+`-fno-pretty-templates'
+     When an error message refers to a specialization of a function
+     template, the compiler will normally print the signature of the
+     template followed by the template arguments and any typedefs or
+     typenames in the signature (e.g. `void f(T) [with T = int]' rather
+     than `void f(int)') so that it's clear which template is involved.
+     When an error message refers to a specialization of a class
+     template, the compiler will omit any template arguments which match
+     the default template arguments for that template.  If either of
+     these behaviors make it harder to understand the error message
+     rather than easier, using `-fno-pretty-templates' will disable
+     them.
+
+`-frepo'
+     Enable automatic template instantiation at link time.  This option
+     also implies `-fno-implicit-templates'.  *Note Template
+     Instantiation::, for more information.
+
+`-fno-rtti'
+     Disable generation of information about every class with virtual
+     functions for use by the C++ runtime type identification features
+     (`dynamic_cast' and `typeid').  If you don't use those parts of
+     the language, you can save some space by using this flag.  Note
+     that exception handling uses the same information, but it will
+     generate it as needed. The `dynamic_cast' operator can still be
+     used for casts that do not require runtime type information, i.e.
+     casts to `void *' or to unambiguous base classes.
+
+`-fstats'
+     Emit statistics about front-end processing at the end of the
+     compilation.  This information is generally only useful to the G++
+     development team.
+
+`-ftemplate-depth=N'
+     Set the maximum instantiation depth for template classes to N.  A
+     limit on the template instantiation depth is needed to detect
+     endless recursions during template class instantiation.  ANSI/ISO
+     C++ conforming programs must not rely on a maximum depth greater
+     than 17 (changed to 1024 in C++0x).
+
+`-fno-threadsafe-statics'
+     Do not emit the extra code to use the routines specified in the C++
+     ABI for thread-safe initialization of local statics.  You can use
+     this option to reduce code size slightly in code that doesn't need
+     to be thread-safe.
+
+`-fuse-cxa-atexit'
+     Register destructors for objects with static storage duration with
+     the `__cxa_atexit' function rather than the `atexit' function.
+     This option is required for fully standards-compliant handling of
+     static destructors, but will only work if your C library supports
+     `__cxa_atexit'.
+
+`-fno-use-cxa-get-exception-ptr'
+     Don't use the `__cxa_get_exception_ptr' runtime routine.  This
+     will cause `std::uncaught_exception' to be incorrect, but is
+     necessary if the runtime routine is not available.
+
+`-fvisibility-inlines-hidden'
+     This switch declares that the user does not attempt to compare
+     pointers to inline methods where the addresses of the two functions
+     were taken in different shared objects.
+
+     The effect of this is that GCC may, effectively, mark inline
+     methods with `__attribute__ ((visibility ("hidden")))' so that
+     they do not appear in the export table of a DSO and do not require
+     a PLT indirection when used within the DSO.  Enabling this option
+     can have a dramatic effect on load and link times of a DSO as it
+     massively reduces the size of the dynamic export table when the
+     library makes heavy use of templates.
+
+     The behavior of this switch is not quite the same as marking the
+     methods as hidden directly, because it does not affect static
+     variables local to the function or cause the compiler to deduce
+     that the function is defined in only one shared object.
+
+     You may mark a method as having a visibility explicitly to negate
+     the effect of the switch for that method.  For example, if you do
+     want to compare pointers to a particular inline method, you might
+     mark it as having default visibility.  Marking the enclosing class
+     with explicit visibility will have no effect.
+
+     Explicitly instantiated inline methods are unaffected by this
+     option as their linkage might otherwise cross a shared library
+     boundary.  *Note Template Instantiation::.
+
+`-fvisibility-ms-compat'
+     This flag attempts to use visibility settings to make GCC's C++
+     linkage model compatible with that of Microsoft Visual Studio.
+
+     The flag makes these changes to GCC's linkage model:
+
+       1. It sets the default visibility to `hidden', like
+          `-fvisibility=hidden'.
+
+       2. Types, but not their members, are not hidden by default.
+
+       3. The One Definition Rule is relaxed for types without explicit
+          visibility specifications which are defined in more than one
+          different shared object: those declarations are permitted if
+          they would have been permitted when this option was not used.
+
+     In new code it is better to use `-fvisibility=hidden' and export
+     those classes which are intended to be externally visible.
+     Unfortunately it is possible for code to rely, perhaps
+     accidentally, on the Visual Studio behavior.
+
+     Among the consequences of these changes are that static data
+     members of the same type with the same name but defined in
+     different shared objects will be different, so changing one will
+     not change the other; and that pointers to function members
+     defined in different shared objects may not compare equal.  When
+     this flag is given, it is a violation of the ODR to define types
+     with the same name differently.
+
+`-fno-weak'
+     Do not use weak symbol support, even if it is provided by the
+     linker.  By default, G++ will use weak symbols if they are
+     available.  This option exists only for testing, and should not be
+     used by end-users; it will result in inferior code and has no
+     benefits.  This option may be removed in a future release of G++.
+
+`-nostdinc++'
+     Do not search for header files in the standard directories
+     specific to C++, but do still search the other standard
+     directories.  (This option is used when building the C++ library.)
+
+ In addition, these optimization, warning, and code generation options
+have meanings only for C++ programs:
+
+`-fno-default-inline'
+     Do not assume `inline' for functions defined inside a class scope.
+     *Note Options That Control Optimization: Optimize Options.  Note
+     that these functions will have linkage like inline functions; they
+     just won't be inlined by default.
+
+`-Wabi (C, Objective-C, C++ and Objective-C++ only)'
+     Warn when G++ generates code that is probably not compatible with
+     the vendor-neutral C++ ABI.  Although an effort has been made to
+     warn about all such cases, there are probably some cases that are
+     not warned about, even though G++ is generating incompatible code.
+     There may also be cases where warnings are emitted even though the
+     code that is generated will be compatible.
+
+     You should rewrite your code to avoid these warnings if you are
+     concerned about the fact that code generated by G++ may not be
+     binary compatible with code generated by other compilers.
+
+     The known incompatibilities in `-fabi-version=2' (the default)
+     include:
+
+        * A template with a non-type template parameter of reference
+          type is mangled incorrectly:
+               extern int N;
+               template <int &> struct S {};
+               void n (S<N>) {2}
+
+          This is fixed in `-fabi-version=3'.
+
+        * SIMD vector types declared using `__attribute
+          ((vector_size))' are mangled in a non-standard way that does
+          not allow for overloading of functions taking vectors of
+          different sizes.
+
+          The mangling is changed in `-fabi-version=4'.
+
+     The known incompatibilities in `-fabi-version=1' include:
+
+        * Incorrect handling of tail-padding for bit-fields.  G++ may
+          attempt to pack data into the same byte as a base class.  For
+          example:
+
+               struct A { virtual void f(); int f1 : 1; };
+               struct B : public A { int f2 : 1; };
+
+          In this case, G++ will place `B::f2' into the same byte
+          as`A::f1'; other compilers will not.  You can avoid this
+          problem by explicitly padding `A' so that its size is a
+          multiple of the byte size on your platform; that will cause
+          G++ and other compilers to layout `B' identically.
+
+        * Incorrect handling of tail-padding for virtual bases.  G++
+          does not use tail padding when laying out virtual bases.  For
+          example:
+
+               struct A { virtual void f(); char c1; };
+               struct B { B(); char c2; };
+               struct C : public A, public virtual B {};
+
+          In this case, G++ will not place `B' into the tail-padding for
+          `A'; other compilers will.  You can avoid this problem by
+          explicitly padding `A' so that its size is a multiple of its
+          alignment (ignoring virtual base classes); that will cause
+          G++ and other compilers to layout `C' identically.
+
+        * Incorrect handling of bit-fields with declared widths greater
+          than that of their underlying types, when the bit-fields
+          appear in a union.  For example:
+
+               union U { int i : 4096; };
+
+          Assuming that an `int' does not have 4096 bits, G++ will make
+          the union too small by the number of bits in an `int'.
+
+        * Empty classes can be placed at incorrect offsets.  For
+          example:
+
+               struct A {};
+
+               struct B {
+                 A a;
+                 virtual void f ();
+               };
+
+               struct C : public B, public A {};
+
+          G++ will place the `A' base class of `C' at a nonzero offset;
+          it should be placed at offset zero.  G++ mistakenly believes
+          that the `A' data member of `B' is already at offset zero.
+
+        * Names of template functions whose types involve `typename' or
+          template template parameters can be mangled incorrectly.
+
+               template <typename Q>
+               void f(typename Q::X) {}
+
+               template <template <typename> class Q>
+               void f(typename Q<int>::X) {}
+
+          Instantiations of these templates may be mangled incorrectly.
+
+
+     It also warns psABI related changes.  The known psABI changes at
+     this point include:
+
+        * For SYSV/x86-64, when passing union with long double, it is
+          changed to pass in memory as specified in psABI.  For example:
+
+               union U {
+                 long double ld;
+                 int i;
+               };
+
+          `union U' will always be passed in memory.
+
+
+`-Wctor-dtor-privacy (C++ and Objective-C++ only)'
+     Warn when a class seems unusable because all the constructors or
+     destructors in that class are private, and it has neither friends
+     nor public static member functions.
+
+`-Wnon-virtual-dtor (C++ and Objective-C++ only)'
+     Warn when a class has virtual functions and accessible non-virtual
+     destructor, in which case it would be possible but unsafe to delete
+     an instance of a derived class through a pointer to the base class.
+     This warning is also enabled if -Weffc++ is specified.
+
+`-Wreorder (C++ and Objective-C++ only)'
+     Warn when the order of member initializers given in the code does
+     not match the order in which they must be executed.  For instance:
+
+          struct A {
+            int i;
+            int j;
+            A(): j (0), i (1) { }
+          };
+
+     The compiler will rearrange the member initializers for `i' and
+     `j' to match the declaration order of the members, emitting a
+     warning to that effect.  This warning is enabled by `-Wall'.
+
+ The following `-W...' options are not affected by `-Wall'.
+
+`-Weffc++ (C++ and Objective-C++ only)'
+     Warn about violations of the following style guidelines from Scott
+     Meyers' `Effective C++' book:
+
+        * Item 11:  Define a copy constructor and an assignment
+          operator for classes with dynamically allocated memory.
+
+        * Item 12:  Prefer initialization to assignment in constructors.
+
+        * Item 14:  Make destructors virtual in base classes.
+
+        * Item 15:  Have `operator=' return a reference to `*this'.
+
+        * Item 23:  Don't try to return a reference when you must
+          return an object.
+
+
+     Also warn about violations of the following style guidelines from
+     Scott Meyers' `More Effective C++' book:
+
+        * Item 6:  Distinguish between prefix and postfix forms of
+          increment and decrement operators.
+
+        * Item 7:  Never overload `&&', `||', or `,'.
+
+
+     When selecting this option, be aware that the standard library
+     headers do not obey all of these guidelines; use `grep -v' to
+     filter out those warnings.
+
+`-Wstrict-null-sentinel (C++ and Objective-C++ only)'
+     Warn also about the use of an uncasted `NULL' as sentinel.  When
+     compiling only with GCC this is a valid sentinel, as `NULL' is
+     defined to `__null'.  Although it is a null pointer constant not a
+     null pointer, it is guaranteed to be of the same size as a
+     pointer.  But this use is not portable across different compilers.
+
+`-Wno-non-template-friend (C++ and Objective-C++ only)'
+     Disable warnings when non-templatized friend functions are declared
+     within a template.  Since the advent of explicit template
+     specification support in G++, if the name of the friend is an
+     unqualified-id (i.e., `friend foo(int)'), the C++ language
+     specification demands that the friend declare or define an
+     ordinary, nontemplate function.  (Section 14.5.3).  Before G++
+     implemented explicit specification, unqualified-ids could be
+     interpreted as a particular specialization of a templatized
+     function.  Because this non-conforming behavior is no longer the
+     default behavior for G++, `-Wnon-template-friend' allows the
+     compiler to check existing code for potential trouble spots and is
+     on by default.  This new compiler behavior can be turned off with
+     `-Wno-non-template-friend' which keeps the conformant compiler code
+     but disables the helpful warning.
+
+`-Wold-style-cast (C++ and Objective-C++ only)'
+     Warn if an old-style (C-style) cast to a non-void type is used
+     within a C++ program.  The new-style casts (`dynamic_cast',
+     `static_cast', `reinterpret_cast', and `const_cast') are less
+     vulnerable to unintended effects and much easier to search for.
+
+`-Woverloaded-virtual (C++ and Objective-C++ only)'
+     Warn when a function declaration hides virtual functions from a
+     base class.  For example, in:
+
+          struct A {
+            virtual void f();
+          };
+
+          struct B: public A {
+            void f(int);
+          };
+
+     the `A' class version of `f' is hidden in `B', and code like:
+
+          B* b;
+          b->f();
+
+     will fail to compile.
+
+`-Wno-pmf-conversions (C++ and Objective-C++ only)'
+     Disable the diagnostic for converting a bound pointer to member
+     function to a plain pointer.
+
+`-Wsign-promo (C++ and Objective-C++ only)'
+     Warn when overload resolution chooses a promotion from unsigned or
+     enumerated type to a signed type, over a conversion to an unsigned
+     type of the same size.  Previous versions of G++ would try to
+     preserve unsignedness, but the standard mandates the current
+     behavior.
+
+          struct A {
+            operator int ();
+            A& operator = (int);
+          };
+
+          main ()
+          {
+            A a,b;
+            a = b;
+          }
+
+     In this example, G++ will synthesize a default `A& operator =
+     (const A&);', while cfront will use the user-defined `operator ='.
+
+
+File: gcc.info,  Node: Objective-C and Objective-C++ Dialect Options,  Next: Language Independent Options,  Prev: C++ Dialect Options,  Up: Invoking GCC
+
+3.6 Options Controlling Objective-C and Objective-C++ Dialects
+==============================================================
+
+(NOTE: This manual does not describe the Objective-C and Objective-C++
+languages themselves.  See *Note Language Standards Supported by GCC:
+Standards, for references.)
+
+ This section describes the command-line options that are only
+meaningful for Objective-C and Objective-C++ programs, but you can also
+use most of the language-independent GNU compiler options.  For
+example, you might compile a file `some_class.m' like this:
+
+     gcc -g -fgnu-runtime -O -c some_class.m
+
+In this example, `-fgnu-runtime' is an option meant only for
+Objective-C and Objective-C++ programs; you can use the other options
+with any language supported by GCC.
+
+ Note that since Objective-C is an extension of the C language,
+Objective-C compilations may also use options specific to the C
+front-end (e.g., `-Wtraditional').  Similarly, Objective-C++
+compilations may use C++-specific options (e.g., `-Wabi').
+
+ Here is a list of options that are _only_ for compiling Objective-C
+and Objective-C++ programs:
+
+`-fconstant-string-class=CLASS-NAME'
+     Use CLASS-NAME as the name of the class to instantiate for each
+     literal string specified with the syntax `@"..."'.  The default
+     class name is `NXConstantString' if the GNU runtime is being used,
+     and `NSConstantString' if the NeXT runtime is being used (see
+     below).  The `-fconstant-cfstrings' option, if also present, will
+     override the `-fconstant-string-class' setting and cause `@"..."'
+     literals to be laid out as constant CoreFoundation strings.
+
+`-fgnu-runtime'
+     Generate object code compatible with the standard GNU Objective-C
+     runtime.  This is the default for most types of systems.
+
+`-fnext-runtime'
+     Generate output compatible with the NeXT runtime.  This is the
+     default for NeXT-based systems, including Darwin and Mac OS X.
+     The macro `__NEXT_RUNTIME__' is predefined if (and only if) this
+     option is used.
+
+`-fno-nil-receivers'
+     Assume that all Objective-C message dispatches (e.g., `[receiver
+     message:arg]') in this translation unit ensure that the receiver
+     is not `nil'.  This allows for more efficient entry points in the
+     runtime to be used.  Currently, this option is only available in
+     conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+
+`-fobjc-call-cxx-cdtors'
+     For each Objective-C class, check if any of its instance variables
+     is a C++ object with a non-trivial default constructor.  If so,
+     synthesize a special `- (id) .cxx_construct' instance method that
+     will run non-trivial default constructors on any such instance
+     variables, in order, and then return `self'.  Similarly, check if
+     any instance variable is a C++ object with a non-trivial
+     destructor, and if so, synthesize a special `- (void)
+     .cxx_destruct' method that will run all such default destructors,
+     in reverse order.
+
+     The `- (id) .cxx_construct' and/or `- (void) .cxx_destruct' methods
+     thusly generated will only operate on instance variables declared
+     in the current Objective-C class, and not those inherited from
+     superclasses.  It is the responsibility of the Objective-C runtime
+     to invoke all such methods in an object's inheritance hierarchy.
+     The `- (id) .cxx_construct' methods will be invoked by the runtime
+     immediately after a new object instance is allocated; the `-
+     (void) .cxx_destruct' methods will be invoked immediately before
+     the runtime deallocates an object instance.
+
+     As of this writing, only the NeXT runtime on Mac OS X 10.4 and
+     later has support for invoking the `- (id) .cxx_construct' and `-
+     (void) .cxx_destruct' methods.
+
+`-fobjc-direct-dispatch'
+     Allow fast jumps to the message dispatcher.  On Darwin this is
+     accomplished via the comm page.
+
+`-fobjc-exceptions'
+     Enable syntactic support for structured exception handling in
+     Objective-C, similar to what is offered by C++ and Java.  This
+     option is unavailable in conjunction with the NeXT runtime on Mac
+     OS X 10.2 and earlier.
+
+            @try {
+              ...
+                 @throw expr;
+              ...
+            }
+            @catch (AnObjCClass *exc) {
+              ...
+                @throw expr;
+              ...
+                @throw;
+              ...
+            }
+            @catch (AnotherClass *exc) {
+              ...
+            }
+            @catch (id allOthers) {
+              ...
+            }
+            @finally {
+              ...
+                @throw expr;
+              ...
+            }
+
+     The `@throw' statement may appear anywhere in an Objective-C or
+     Objective-C++ program; when used inside of a `@catch' block, the
+     `@throw' may appear without an argument (as shown above), in which
+     case the object caught by the `@catch' will be rethrown.
+
+     Note that only (pointers to) Objective-C objects may be thrown and
+     caught using this scheme.  When an object is thrown, it will be
+     caught by the nearest `@catch' clause capable of handling objects
+     of that type, analogously to how `catch' blocks work in C++ and
+     Java.  A `@catch(id ...)' clause (as shown above) may also be
+     provided to catch any and all Objective-C exceptions not caught by
+     previous `@catch' clauses (if any).
+
+     The `@finally' clause, if present, will be executed upon exit from
+     the immediately preceding `@try ... @catch' section.  This will
+     happen regardless of whether any exceptions are thrown, caught or
+     rethrown inside the `@try ... @catch' section, analogously to the
+     behavior of the `finally' clause in Java.
+
+     There are several caveats to using the new exception mechanism:
+
+        * Although currently designed to be binary compatible with
+          `NS_HANDLER'-style idioms provided by the `NSException'
+          class, the new exceptions can only be used on Mac OS X 10.3
+          (Panther) and later systems, due to additional functionality
+          needed in the (NeXT) Objective-C runtime.
+
+        * As mentioned above, the new exceptions do not support handling
+          types other than Objective-C objects.   Furthermore, when
+          used from Objective-C++, the Objective-C exception model does
+          not interoperate with C++ exceptions at this time.  This
+          means you cannot `@throw' an exception from Objective-C and
+          `catch' it in C++, or vice versa (i.e., `throw ... @catch').
+
+     The `-fobjc-exceptions' switch also enables the use of
+     synchronization blocks for thread-safe execution:
+
+            @synchronized (ObjCClass *guard) {
+              ...
+            }
+
+     Upon entering the `@synchronized' block, a thread of execution
+     shall first check whether a lock has been placed on the
+     corresponding `guard' object by another thread.  If it has, the
+     current thread shall wait until the other thread relinquishes its
+     lock.  Once `guard' becomes available, the current thread will
+     place its own lock on it, execute the code contained in the
+     `@synchronized' block, and finally relinquish the lock (thereby
+     making `guard' available to other threads).
+
+     Unlike Java, Objective-C does not allow for entire methods to be
+     marked `@synchronized'.  Note that throwing exceptions out of
+     `@synchronized' blocks is allowed, and will cause the guarding
+     object to be unlocked properly.
+
+`-fobjc-gc'
+     Enable garbage collection (GC) in Objective-C and Objective-C++
+     programs.
+
+`-freplace-objc-classes'
+     Emit a special marker instructing `ld(1)' not to statically link in
+     the resulting object file, and allow `dyld(1)' to load it in at
+     run time instead.  This is used in conjunction with the
+     Fix-and-Continue debugging mode, where the object file in question
+     may be recompiled and dynamically reloaded in the course of
+     program execution, without the need to restart the program itself.
+     Currently, Fix-and-Continue functionality is only available in
+     conjunction with the NeXT runtime on Mac OS X 10.3 and later.
+
+`-fzero-link'
+     When compiling for the NeXT runtime, the compiler ordinarily
+     replaces calls to `objc_getClass("...")' (when the name of the
+     class is known at compile time) with static class references that
+     get initialized at load time, which improves run-time performance.
+     Specifying the `-fzero-link' flag suppresses this behavior and
+     causes calls to `objc_getClass("...")' to be retained.  This is
+     useful in Zero-Link debugging mode, since it allows for individual
+     class implementations to be modified during program execution.
+
+`-gen-decls'
+     Dump interface declarations for all classes seen in the source
+     file to a file named `SOURCENAME.decl'.
+
+`-Wassign-intercept (Objective-C and Objective-C++ only)'
+     Warn whenever an Objective-C assignment is being intercepted by the
+     garbage collector.
+
+`-Wno-protocol (Objective-C and Objective-C++ only)'
+     If a class is declared to implement a protocol, a warning is
+     issued for every method in the protocol that is not implemented by
+     the class.  The default behavior is to issue a warning for every
+     method not explicitly implemented in the class, even if a method
+     implementation is inherited from the superclass.  If you use the
+     `-Wno-protocol' option, then methods inherited from the superclass
+     are considered to be implemented, and no warning is issued for
+     them.
+
+`-Wselector (Objective-C and Objective-C++ only)'
+     Warn if multiple methods of different types for the same selector
+     are found during compilation.  The check is performed on the list
+     of methods in the final stage of compilation.  Additionally, a
+     check is performed for each selector appearing in a
+     `@selector(...)'  expression, and a corresponding method for that
+     selector has been found during compilation.  Because these checks
+     scan the method table only at the end of compilation, these
+     warnings are not produced if the final stage of compilation is not
+     reached, for example because an error is found during compilation,
+     or because the `-fsyntax-only' option is being used.
+
+`-Wstrict-selector-match (Objective-C and Objective-C++ only)'
+     Warn if multiple methods with differing argument and/or return
+     types are found for a given selector when attempting to send a
+     message using this selector to a receiver of type `id' or `Class'.
+     When this flag is off (which is the default behavior), the
+     compiler will omit such warnings if any differences found are
+     confined to types which share the same size and alignment.
+
+`-Wundeclared-selector (Objective-C and Objective-C++ only)'
+     Warn if a `@selector(...)' expression referring to an undeclared
+     selector is found.  A selector is considered undeclared if no
+     method with that name has been declared before the
+     `@selector(...)' expression, either explicitly in an `@interface'
+     or `@protocol' declaration, or implicitly in an `@implementation'
+     section.  This option always performs its checks as soon as a
+     `@selector(...)' expression is found, while `-Wselector' only
+     performs its checks in the final stage of compilation.  This also
+     enforces the coding style convention that methods and selectors
+     must be declared before being used.
+
+`-print-objc-runtime-info'
+     Generate C header describing the largest structure that is passed
+     by value, if any.
+
+
+
+File: gcc.info,  Node: Language Independent Options,  Next: Warning Options,  Prev: Objective-C and Objective-C++ Dialect Options,  Up: Invoking GCC
+
+3.7 Options to Control Diagnostic Messages Formatting
+=====================================================
+
+Traditionally, diagnostic messages have been formatted irrespective of
+the output device's aspect (e.g. its width, ...).  The options described
+below can be used to control the diagnostic messages formatting
+algorithm, e.g. how many characters per line, how often source location
+information should be reported.  Right now, only the C++ front end can
+honor these options.  However it is expected, in the near future, that
+the remaining front ends would be able to digest them correctly.
+
+`-fmessage-length=N'
+     Try to format error messages so that they fit on lines of about N
+     characters.  The default is 72 characters for `g++' and 0 for the
+     rest of the front ends supported by GCC.  If N is zero, then no
+     line-wrapping will be done; each error message will appear on a
+     single line.
+
+`-fdiagnostics-show-location=once'
+     Only meaningful in line-wrapping mode.  Instructs the diagnostic
+     messages reporter to emit _once_ source location information; that
+     is, in case the message is too long to fit on a single physical
+     line and has to be wrapped, the source location won't be emitted
+     (as prefix) again, over and over, in subsequent continuation
+     lines.  This is the default behavior.
+
+`-fdiagnostics-show-location=every-line'
+     Only meaningful in line-wrapping mode.  Instructs the diagnostic
+     messages reporter to emit the same source location information (as
+     prefix) for physical lines that result from the process of breaking
+     a message which is too long to fit on a single line.
+
+`-fdiagnostics-show-option'
+     This option instructs the diagnostic machinery to add text to each
+     diagnostic emitted, which indicates which command line option
+     directly controls that diagnostic, when such an option is known to
+     the diagnostic machinery.
+
+`-Wcoverage-mismatch'
+     Warn if feedback profiles do not match when using the
+     `-fprofile-use' option.  If a source file was changed between
+     `-fprofile-gen' and `-fprofile-use', the files with the profile
+     feedback can fail to match the source file and GCC can not use the
+     profile feedback information.  By default, GCC emits an error
+     message in this case.  The option `-Wcoverage-mismatch' emits a
+     warning instead of an error.  GCC does not use appropriate
+     feedback profiles, so using this option can result in poorly
+     optimized code.  This option is useful only in the case of very
+     minor changes such as bug fixes to an existing code-base.
+
+
+
+File: gcc.info,  Node: Warning Options,  Next: Debugging Options,  Prev: Language Independent Options,  Up: Invoking GCC
+
+3.8 Options to Request or Suppress Warnings
+===========================================
+
+Warnings are diagnostic messages that report constructions which are
+not inherently erroneous but which are risky or suggest there may have
+been an error.
+
+ The following language-independent options do not enable specific
+warnings but control the kinds of diagnostics produced by GCC.
+
+`-fsyntax-only'
+     Check the code for syntax errors, but don't do anything beyond
+     that.
+
+`-w'
+     Inhibit all warning messages.
+
+`-Werror'
+     Make all warnings into errors.
+
+`-Werror='
+     Make the specified warning into an error.  The specifier for a
+     warning is appended, for example `-Werror=switch' turns the
+     warnings controlled by `-Wswitch' into errors.  This switch takes a
+     negative form, to be used to negate `-Werror' for specific
+     warnings, for example `-Wno-error=switch' makes `-Wswitch'
+     warnings not be errors, even when `-Werror' is in effect.  You can
+     use the `-fdiagnostics-show-option' option to have each
+     controllable warning amended with the option which controls it, to
+     determine what to use with this option.
+
+     Note that specifying `-Werror='FOO automatically implies `-W'FOO.
+     However, `-Wno-error='FOO does not imply anything.
+
+`-Wfatal-errors'
+     This option causes the compiler to abort compilation on the first
+     error occurred rather than trying to keep going and printing
+     further error messages.
+
+
+ You can request many specific warnings with options beginning `-W',
+for example `-Wimplicit' to request warnings on implicit declarations.
+Each of these specific warning options also has a negative form
+beginning `-Wno-' to turn off warnings; for example, `-Wno-implicit'.
+This manual lists only one of the two forms, whichever is not the
+default.  For further, language-specific options also refer to *note
+C++ Dialect Options:: and *note Objective-C and Objective-C++ Dialect
+Options::.
+
+`-pedantic'
+     Issue all the warnings demanded by strict ISO C and ISO C++;
+     reject all programs that use forbidden extensions, and some other
+     programs that do not follow ISO C and ISO C++.  For ISO C, follows
+     the version of the ISO C standard specified by any `-std' option
+     used.
+
+     Valid ISO C and ISO C++ programs should compile properly with or
+     without this option (though a rare few will require `-ansi' or a
+     `-std' option specifying the required version of ISO C).  However,
+     without this option, certain GNU extensions and traditional C and
+     C++ features are supported as well.  With this option, they are
+     rejected.
+
+     `-pedantic' does not cause warning messages for use of the
+     alternate keywords whose names begin and end with `__'.  Pedantic
+     warnings are also disabled in the expression that follows
+     `__extension__'.  However, only system header files should use
+     these escape routes; application programs should avoid them.
+     *Note Alternate Keywords::.
+
+     Some users try to use `-pedantic' to check programs for strict ISO
+     C conformance.  They soon find that it does not do quite what they
+     want: it finds some non-ISO practices, but not all--only those for
+     which ISO C _requires_ a diagnostic, and some others for which
+     diagnostics have been added.
+
+     A feature to report any failure to conform to ISO C might be
+     useful in some instances, but would require considerable
+     additional work and would be quite different from `-pedantic'.  We
+     don't have plans to support such a feature in the near future.
+
+     Where the standard specified with `-std' represents a GNU extended
+     dialect of C, such as `gnu90' or `gnu99', there is a corresponding
+     "base standard", the version of ISO C on which the GNU extended
+     dialect is based.  Warnings from `-pedantic' are given where they
+     are required by the base standard.  (It would not make sense for
+     such warnings to be given only for features not in the specified
+     GNU C dialect, since by definition the GNU dialects of C include
+     all features the compiler supports with the given option, and
+     there would be nothing to warn about.)
+
+`-pedantic-errors'
+     Like `-pedantic', except that errors are produced rather than
+     warnings.
+
+`-Wall'
+     This enables all the warnings about constructions that some users
+     consider questionable, and that are easy to avoid (or modify to
+     prevent the warning), even in conjunction with macros.  This also
+     enables some language-specific warnings described in *note C++
+     Dialect Options:: and *note Objective-C and Objective-C++ Dialect
+     Options::.
+
+     `-Wall' turns on the following warning flags:
+
+          -Waddress
+          -Warray-bounds (only with `-O2')
+          -Wc++0x-compat
+          -Wchar-subscripts
+          -Wenum-compare (in C/Objc; this is on by default in C++)
+          -Wimplicit-int
+          -Wimplicit-function-declaration
+          -Wcomment
+          -Wformat
+          -Wmain (only for C/ObjC and unless `-ffreestanding')
+          -Wmissing-braces
+          -Wnonnull
+          -Wparentheses
+          -Wpointer-sign
+          -Wreorder
+          -Wreturn-type
+          -Wsequence-point
+          -Wsign-compare (only in C++)
+          -Wstrict-aliasing
+          -Wstrict-overflow=1
+          -Wswitch
+          -Wtrigraphs
+          -Wuninitialized
+          -Wunknown-pragmas
+          -Wunused-function
+          -Wunused-label
+          -Wunused-value
+          -Wunused-variable
+          -Wvolatile-register-var
+
+     Note that some warning flags are not implied by `-Wall'.  Some of
+     them warn about constructions that users generally do not consider
+     questionable, but which occasionally you might wish to check for;
+     others warn about constructions that are necessary or hard to
+     avoid in some cases, and there is no simple way to modify the code
+     to suppress the warning. Some of them are enabled by `-Wextra' but
+     many of them must be enabled individually.
+
+`-Wextra'
+     This enables some extra warning flags that are not enabled by
+     `-Wall'. (This option used to be called `-W'.  The older name is
+     still supported, but the newer name is more descriptive.)
+
+          -Wclobbered
+          -Wempty-body
+          -Wignored-qualifiers
+          -Wmissing-field-initializers
+          -Wmissing-parameter-type (C only)
+          -Wold-style-declaration (C only)
+          -Woverride-init
+          -Wsign-compare
+          -Wtype-limits
+          -Wuninitialized
+          -Wunused-parameter (only with `-Wunused' or `-Wall')
+
+     The option `-Wextra' also prints warning messages for the
+     following cases:
+
+        * A pointer is compared against integer zero with `<', `<=',
+          `>', or `>='.
+
+        * (C++ only) An enumerator and a non-enumerator both appear in a
+          conditional expression.
+
+        * (C++ only) Ambiguous virtual bases.
+
+        * (C++ only) Subscripting an array which has been declared
+          `register'.
+
+        * (C++ only) Taking the address of a variable which has been
+          declared `register'.
+
+        * (C++ only) A base class is not initialized in a derived
+          class' copy constructor.
+
+
+`-Wchar-subscripts'
+     Warn if an array subscript has type `char'.  This is a common cause
+     of error, as programmers often forget that this type is signed on
+     some machines.  This warning is enabled by `-Wall'.
+
+`-Wcomment'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a Backslash-Newline appears in a `//' comment.
+     This warning is enabled by `-Wall'.
+
+`-Wformat'
+     Check calls to `printf' and `scanf', etc., to make sure that the
+     arguments supplied have types appropriate to the format string
+     specified, and that the conversions specified in the format string
+     make sense.  This includes standard functions, and others
+     specified by format attributes (*note Function Attributes::), in
+     the `printf', `scanf', `strftime' and `strfmon' (an X/Open
+     extension, not in the C standard) families (or other
+     target-specific families).  Which functions are checked without
+     format attributes having been specified depends on the standard
+     version selected, and such checks of functions without the
+     attribute specified are disabled by `-ffreestanding' or
+     `-fno-builtin'.
+
+     The formats are checked against the format features supported by
+     GNU libc version 2.2.  These include all ISO C90 and C99 features,
+     as well as features from the Single Unix Specification and some
+     BSD and GNU extensions.  Other library implementations may not
+     support all these features; GCC does not support warning about
+     features that go beyond a particular library's limitations.
+     However, if `-pedantic' is used with `-Wformat', warnings will be
+     given about format features not in the selected standard version
+     (but not for `strfmon' formats, since those are not in any version
+     of the C standard).  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+     Since `-Wformat' also checks for null format arguments for several
+     functions, `-Wformat' also implies `-Wnonnull'.
+
+     `-Wformat' is included in `-Wall'.  For more control over some
+     aspects of format checking, the options `-Wformat-y2k',
+     `-Wno-format-extra-args', `-Wno-format-zero-length',
+     `-Wformat-nonliteral', `-Wformat-security', and `-Wformat=2' are
+     available, but are not included in `-Wall'.
+
+`-Wformat-y2k'
+     If `-Wformat' is specified, also warn about `strftime' formats
+     which may yield only a two-digit year.
+
+`-Wno-format-contains-nul'
+     If `-Wformat' is specified, do not warn about format strings that
+     contain NUL bytes.
+
+`-Wno-format-extra-args'
+     If `-Wformat' is specified, do not warn about excess arguments to a
+     `printf' or `scanf' format function.  The C standard specifies
+     that such arguments are ignored.
+
+     Where the unused arguments lie between used arguments that are
+     specified with `$' operand number specifications, normally
+     warnings are still given, since the implementation could not know
+     what type to pass to `va_arg' to skip the unused arguments.
+     However, in the case of `scanf' formats, this option will suppress
+     the warning if the unused arguments are all pointers, since the
+     Single Unix Specification says that such unused arguments are
+     allowed.
+
+`-Wno-format-zero-length (C and Objective-C only)'
+     If `-Wformat' is specified, do not warn about zero-length formats.
+     The C standard specifies that zero-length formats are allowed.
+
+`-Wformat-nonliteral'
+     If `-Wformat' is specified, also warn if the format string is not a
+     string literal and so cannot be checked, unless the format function
+     takes its format arguments as a `va_list'.
+
+`-Wformat-security'
+     If `-Wformat' is specified, also warn about uses of format
+     functions that represent possible security problems.  At present,
+     this warns about calls to `printf' and `scanf' functions where the
+     format string is not a string literal and there are no format
+     arguments, as in `printf (foo);'.  This may be a security hole if
+     the format string came from untrusted input and contains `%n'.
+     (This is currently a subset of what `-Wformat-nonliteral' warns
+     about, but in future warnings may be added to `-Wformat-security'
+     that are not included in `-Wformat-nonliteral'.)
+
+`-Wformat=2'
+     Enable `-Wformat' plus format checks not included in `-Wformat'.
+     Currently equivalent to `-Wformat -Wformat-nonliteral
+     -Wformat-security -Wformat-y2k'.
+
+`-Wnonnull (C and Objective-C only)'
+     Warn about passing a null pointer for arguments marked as
+     requiring a non-null value by the `nonnull' function attribute.
+
+     `-Wnonnull' is included in `-Wall' and `-Wformat'.  It can be
+     disabled with the `-Wno-nonnull' option.
+
+`-Winit-self (C, C++, Objective-C and Objective-C++ only)'
+     Warn about uninitialized variables which are initialized with
+     themselves.  Note this option can only be used with the
+     `-Wuninitialized' option.
+
+     For example, GCC will warn about `i' being uninitialized in the
+     following snippet only when `-Winit-self' has been specified:
+          int f()
+          {
+            int i = i;
+            return i;
+          }
+
+`-Wimplicit-int (C and Objective-C only)'
+     Warn when a declaration does not specify a type.  This warning is
+     enabled by `-Wall'.
+
+`-Wimplicit-function-declaration (C and Objective-C only)'
+     Give a warning whenever a function is used before being declared.
+     In C99 mode (`-std=c99' or `-std=gnu99'), this warning is enabled
+     by default and it is made into an error by `-pedantic-errors'.
+     This warning is also enabled by `-Wall'.
+
+`-Wimplicit'
+     Same as `-Wimplicit-int' and `-Wimplicit-function-declaration'.
+     This warning is enabled by `-Wall'.
+
+`-Wignored-qualifiers (C and C++ only)'
+     Warn if the return type of a function has a type qualifier such as
+     `const'.  For ISO C such a type qualifier has no effect, since the
+     value returned by a function is not an lvalue.  For C++, the
+     warning is only emitted for scalar types or `void'.  ISO C
+     prohibits qualified `void' return types on function definitions,
+     so such return types always receive a warning even without this
+     option.
+
+     This warning is also enabled by `-Wextra'.
+
+`-Wmain'
+     Warn if the type of `main' is suspicious.  `main' should be a
+     function with external linkage, returning int, taking either zero
+     arguments, two, or three arguments of appropriate types.  This
+     warning is enabled by default in C++ and is enabled by either
+     `-Wall' or `-pedantic'.
+
+`-Wmissing-braces'
+     Warn if an aggregate or union initializer is not fully bracketed.
+     In the following example, the initializer for `a' is not fully
+     bracketed, but that for `b' is fully bracketed.
+
+          int a[2][2] = { 0, 1, 2, 3 };
+          int b[2][2] = { { 0, 1 }, { 2, 3 } };
+
+     This warning is enabled by `-Wall'.
+
+`-Wmissing-include-dirs (C, C++, Objective-C and Objective-C++ only)'
+     Warn if a user-supplied include directory does not exist.
+
+`-Wparentheses'
+     Warn if parentheses are omitted in certain contexts, such as when
+     there is an assignment in a context where a truth value is
+     expected, or when operators are nested whose precedence people
+     often get confused about.
+
+     Also warn if a comparison like `x<=y<=z' appears; this is
+     equivalent to `(x<=y ? 1 : 0) <= z', which is a different
+     interpretation from that of ordinary mathematical notation.
+
+     Also warn about constructions where there may be confusion to which
+     `if' statement an `else' branch belongs.  Here is an example of
+     such a case:
+
+          {
+            if (a)
+              if (b)
+                foo ();
+            else
+              bar ();
+          }
+
+     In C/C++, every `else' branch belongs to the innermost possible
+     `if' statement, which in this example is `if (b)'.  This is often
+     not what the programmer expected, as illustrated in the above
+     example by indentation the programmer chose.  When there is the
+     potential for this confusion, GCC will issue a warning when this
+     flag is specified.  To eliminate the warning, add explicit braces
+     around the innermost `if' statement so there is no way the `else'
+     could belong to the enclosing `if'.  The resulting code would look
+     like this:
+
+          {
+            if (a)
+              {
+                if (b)
+                  foo ();
+                else
+                  bar ();
+              }
+          }
+
+     This warning is enabled by `-Wall'.
+
+`-Wsequence-point'
+     Warn about code that may have undefined semantics because of
+     violations of sequence point rules in the C and C++ standards.
+
+     The C and C++ standards defines the order in which expressions in
+     a C/C++ program are evaluated in terms of "sequence points", which
+     represent a partial ordering between the execution of parts of the
+     program: those executed before the sequence point, and those
+     executed after it.  These occur after the evaluation of a full
+     expression (one which is not part of a larger expression), after
+     the evaluation of the first operand of a `&&', `||', `? :' or `,'
+     (comma) operator, before a function is called (but after the
+     evaluation of its arguments and the expression denoting the called
+     function), and in certain other places.  Other than as expressed
+     by the sequence point rules, the order of evaluation of
+     subexpressions of an expression is not specified.  All these rules
+     describe only a partial order rather than a total order, since,
+     for example, if two functions are called within one expression
+     with no sequence point between them, the order in which the
+     functions are called is not specified.  However, the standards
+     committee have ruled that function calls do not overlap.
+
+     It is not specified when between sequence points modifications to
+     the values of objects take effect.  Programs whose behavior
+     depends on this have undefined behavior; the C and C++ standards
+     specify that "Between the previous and next sequence point an
+     object shall have its stored value modified at most once by the
+     evaluation of an expression.  Furthermore, the prior value shall
+     be read only to determine the value to be stored.".  If a program
+     breaks these rules, the results on any particular implementation
+     are entirely unpredictable.
+
+     Examples of code with undefined behavior are `a = a++;', `a[n] =
+     b[n++]' and `a[i++] = i;'.  Some more complicated cases are not
+     diagnosed by this option, and it may give an occasional false
+     positive result, but in general it has been found fairly effective
+     at detecting this sort of problem in programs.
+
+     The standard is worded confusingly, therefore there is some debate
+     over the precise meaning of the sequence point rules in subtle
+     cases.  Links to discussions of the problem, including proposed
+     formal definitions, may be found on the GCC readings page, at
+     `http://gcc.gnu.org/readings.html'.
+
+     This warning is enabled by `-Wall' for C and C++.
+
+`-Wreturn-type'
+     Warn whenever a function is defined with a return-type that
+     defaults to `int'.  Also warn about any `return' statement with no
+     return-value in a function whose return-type is not `void'
+     (falling off the end of the function body is considered returning
+     without a value), and about a `return' statement with an
+     expression in a function whose return-type is `void'.
+
+     For C++, a function without return type always produces a
+     diagnostic message, even when `-Wno-return-type' is specified.
+     The only exceptions are `main' and functions defined in system
+     headers.
+
+     This warning is enabled by `-Wall'.
+
+`-Wswitch'
+     Warn whenever a `switch' statement has an index of enumerated type
+     and lacks a `case' for one or more of the named codes of that
+     enumeration.  (The presence of a `default' label prevents this
+     warning.)  `case' labels outside the enumeration range also
+     provoke warnings when this option is used (even if there is a
+     `default' label).  This warning is enabled by `-Wall'.
+
+`-Wswitch-default'
+     Warn whenever a `switch' statement does not have a `default' case.
+
+`-Wswitch-enum'
+     Warn whenever a `switch' statement has an index of enumerated type
+     and lacks a `case' for one or more of the named codes of that
+     enumeration.  `case' labels outside the enumeration range also
+     provoke warnings when this option is used.  The only difference
+     between `-Wswitch' and this option is that this option gives a
+     warning about an omitted enumeration code even if there is a
+     `default' label.
+
+`-Wsync-nand (C and C++ only)'
+     Warn when `__sync_fetch_and_nand' and `__sync_nand_and_fetch'
+     built-in functions are used.  These functions changed semantics in
+     GCC 4.4.
+
+`-Wtrigraphs'
+     Warn if any trigraphs are encountered that might change the
+     meaning of the program (trigraphs within comments are not warned
+     about).  This warning is enabled by `-Wall'.
+
+`-Wunused-function'
+     Warn whenever a static function is declared but not defined or a
+     non-inline static function is unused.  This warning is enabled by
+     `-Wall'.
+
+`-Wunused-label'
+     Warn whenever a label is declared but not used.  This warning is
+     enabled by `-Wall'.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wunused-parameter'
+     Warn whenever a function parameter is unused aside from its
+     declaration.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wno-unused-result'
+     Do not warn if a caller of a function marked with attribute
+     `warn_unused_result' (*note Variable Attributes::) does not use
+     its return value. The default is `-Wunused-result'.
+
+`-Wunused-variable'
+     Warn whenever a local variable or non-constant static variable is
+     unused aside from its declaration.  This warning is enabled by
+     `-Wall'.
+
+     To suppress this warning use the `unused' attribute (*note
+     Variable Attributes::).
+
+`-Wunused-value'
+     Warn whenever a statement computes a result that is explicitly not
+     used. To suppress this warning cast the unused expression to
+     `void'. This includes an expression-statement or the left-hand
+     side of a comma expression that contains no side effects. For
+     example, an expression such as `x[i,j]' will cause a warning, while
+     `x[(void)i,j]' will not.
+
+     This warning is enabled by `-Wall'.
+
+`-Wunused'
+     All the above `-Wunused' options combined.
+
+     In order to get a warning about an unused function parameter, you
+     must either specify `-Wextra -Wunused' (note that `-Wall' implies
+     `-Wunused'), or separately specify `-Wunused-parameter'.
+
+`-Wuninitialized'
+     Warn if an automatic variable is used without first being
+     initialized or if a variable may be clobbered by a `setjmp' call.
+     In C++, warn if a non-static reference or non-static `const' member
+     appears in a class without constructors.
+
+     If you want to warn about code which uses the uninitialized value
+     of the variable in its own initializer, use the `-Winit-self'
+     option.
+
+     These warnings occur for individual uninitialized or clobbered
+     elements of structure, union or array variables as well as for
+     variables which are uninitialized or clobbered as a whole.  They do
+     not occur for variables or elements declared `volatile'.  Because
+     these warnings depend on optimization, the exact variables or
+     elements for which there are warnings will depend on the precise
+     optimization options and version of GCC used.
+
+     Note that there may be no warning about a variable that is used
+     only to compute a value that itself is never used, because such
+     computations may be deleted by data flow analysis before the
+     warnings are printed.
+
+     These warnings are made optional because GCC is not smart enough
+     to see all the reasons why the code might be correct despite
+     appearing to have an error.  Here is one example of how this can
+     happen:
+
+          {
+            int x;
+            switch (y)
+              {
+              case 1: x = 1;
+                break;
+              case 2: x = 4;
+                break;
+              case 3: x = 5;
+              }
+            foo (x);
+          }
+
+     If the value of `y' is always 1, 2 or 3, then `x' is always
+     initialized, but GCC doesn't know this.  Here is another common
+     case:
+
+          {
+            int save_y;
+            if (change_y) save_y = y, y = new_y;
+            ...
+            if (change_y) y = save_y;
+          }
+
+     This has no bug because `save_y' is used only if it is set.
+
+     This option also warns when a non-volatile automatic variable
+     might be changed by a call to `longjmp'.  These warnings as well
+     are possible only in optimizing compilation.
+
+     The compiler sees only the calls to `setjmp'.  It cannot know
+     where `longjmp' will be called; in fact, a signal handler could
+     call it at any point in the code.  As a result, you may get a
+     warning even when there is in fact no problem because `longjmp'
+     cannot in fact be called at the place which would cause a problem.
+
+     Some spurious warnings can be avoided if you declare all the
+     functions you use that never return as `noreturn'.  *Note Function
+     Attributes::.
+
+     This warning is enabled by `-Wall' or `-Wextra'.
+
+`-Wunknown-pragmas'
+     Warn when a #pragma directive is encountered which is not
+     understood by GCC.  If this command line option is used, warnings
+     will even be issued for unknown pragmas in system header files.
+     This is not the case if the warnings were only enabled by the
+     `-Wall' command line option.
+
+`-Wno-pragmas'
+     Do not warn about misuses of pragmas, such as incorrect parameters,
+     invalid syntax, or conflicts between pragmas.  See also
+     `-Wunknown-pragmas'.
+
+`-Wstrict-aliasing'
+     This option is only active when `-fstrict-aliasing' is active.  It
+     warns about code which might break the strict aliasing rules that
+     the compiler is using for optimization.  The warning does not
+     catch all cases, but does attempt to catch the more common
+     pitfalls.  It is included in `-Wall'.  It is equivalent to
+     `-Wstrict-aliasing=3'
+
+`-Wstrict-aliasing=n'
+     This option is only active when `-fstrict-aliasing' is active.  It
+     warns about code which might break the strict aliasing rules that
+     the compiler is using for optimization.  Higher levels correspond
+     to higher accuracy (fewer false positives).  Higher levels also
+     correspond to more effort, similar to the way -O works.
+     `-Wstrict-aliasing' is equivalent to `-Wstrict-aliasing=n', with
+     n=3.
+
+     Level 1: Most aggressive, quick, least accurate.  Possibly useful
+     when higher levels do not warn but -fstrict-aliasing still breaks
+     the code, as it has very few false negatives.  However, it has
+     many false positives.  Warns for all pointer conversions between
+     possibly incompatible types, even if never dereferenced.  Runs in
+     the frontend only.
+
+     Level 2: Aggressive, quick, not too precise.  May still have many
+     false positives (not as many as level 1 though), and few false
+     negatives (but possibly more than level 1).  Unlike level 1, it
+     only warns when an address is taken.  Warns about incomplete
+     types.  Runs in the frontend only.
+
+     Level 3 (default for `-Wstrict-aliasing'): Should have very few
+     false positives and few false negatives.  Slightly slower than
+     levels 1 or 2 when optimization is enabled.  Takes care of the
+     common pun+dereference pattern in the frontend:
+     `*(int*)&some_float'.  If optimization is enabled, it also runs in
+     the backend, where it deals with multiple statement cases using
+     flow-sensitive points-to information.  Only warns when the
+     converted pointer is dereferenced.  Does not warn about incomplete
+     types.
+
+`-Wstrict-overflow'
+`-Wstrict-overflow=N'
+     This option is only active when `-fstrict-overflow' is active.  It
+     warns about cases where the compiler optimizes based on the
+     assumption that signed overflow does not occur.  Note that it does
+     not warn about all cases where the code might overflow: it only
+     warns about cases where the compiler implements some optimization.
+     Thus this warning depends on the optimization level.
+
+     An optimization which assumes that signed overflow does not occur
+     is perfectly safe if the values of the variables involved are such
+     that overflow never does, in fact, occur.  Therefore this warning
+     can easily give a false positive: a warning about code which is not
+     actually a problem.  To help focus on important issues, several
+     warning levels are defined.  No warnings are issued for the use of
+     undefined signed overflow when estimating how many iterations a
+     loop will require, in particular when determining whether a loop
+     will be executed at all.
+
+    `-Wstrict-overflow=1'
+          Warn about cases which are both questionable and easy to
+          avoid.  For example: `x + 1 > x'; with `-fstrict-overflow',
+          the compiler will simplify this to `1'.  This level of
+          `-Wstrict-overflow' is enabled by `-Wall'; higher levels are
+          not, and must be explicitly requested.
+
+    `-Wstrict-overflow=2'
+          Also warn about other cases where a comparison is simplified
+          to a constant.  For example: `abs (x) >= 0'.  This can only be
+          simplified when `-fstrict-overflow' is in effect, because
+          `abs (INT_MIN)' overflows to `INT_MIN', which is less than
+          zero.  `-Wstrict-overflow' (with no level) is the same as
+          `-Wstrict-overflow=2'.
+
+    `-Wstrict-overflow=3'
+          Also warn about other cases where a comparison is simplified.
+          For example: `x + 1 > 1' will be simplified to `x > 0'.
+
+    `-Wstrict-overflow=4'
+          Also warn about other simplifications not covered by the
+          above cases.  For example: `(x * 10) / 5' will be simplified
+          to `x * 2'.
+
+    `-Wstrict-overflow=5'
+          Also warn about cases where the compiler reduces the
+          magnitude of a constant involved in a comparison.  For
+          example: `x + 2 > y' will be simplified to `x + 1 >= y'.
+          This is reported only at the highest warning level because
+          this simplification applies to many comparisons, so this
+          warning level will give a very large number of false
+          positives.
+
+`-Warray-bounds'
+     This option is only active when `-ftree-vrp' is active (default
+     for -O2 and above). It warns about subscripts to arrays that are
+     always out of bounds. This warning is enabled by `-Wall'.
+
+`-Wno-div-by-zero'
+     Do not warn about compile-time integer division by zero.  Floating
+     point division by zero is not warned about, as it can be a
+     legitimate way of obtaining infinities and NaNs.
+
+`-Wsystem-headers'
+     Print warning messages for constructs found in system header files.
+     Warnings from system headers are normally suppressed, on the
+     assumption that they usually do not indicate real problems and
+     would only make the compiler output harder to read.  Using this
+     command line option tells GCC to emit warnings from system headers
+     as if they occurred in user code.  However, note that using
+     `-Wall' in conjunction with this option will _not_ warn about
+     unknown pragmas in system headers--for that, `-Wunknown-pragmas'
+     must also be used.
+
+`-Wfloat-equal'
+     Warn if floating point values are used in equality comparisons.
+
+     The idea behind this is that sometimes it is convenient (for the
+     programmer) to consider floating-point values as approximations to
+     infinitely precise real numbers.  If you are doing this, then you
+     need to compute (by analyzing the code, or in some other way) the
+     maximum or likely maximum error that the computation introduces,
+     and allow for it when performing comparisons (and when producing
+     output, but that's a different problem).  In particular, instead
+     of testing for equality, you would check to see whether the two
+     values have ranges that overlap; and this is done with the
+     relational operators, so equality comparisons are probably
+     mistaken.
+
+`-Wtraditional (C and Objective-C only)'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and/or problematic constructs which
+     should be avoided.
+
+        * Macro parameters that appear within string literals in the
+          macro body.  In traditional C macro replacement takes place
+          within string literals, but does not in ISO C.
+
+        * In traditional C, some preprocessor directives did not exist.
+          Traditional preprocessors would only consider a line to be a
+          directive if the `#' appeared in column 1 on the line.
+          Therefore `-Wtraditional' warns about directives that
+          traditional C understands but would ignore because the `#'
+          does not appear as the first character on the line.  It also
+          suggests you hide directives like `#pragma' not understood by
+          traditional C by indenting them.  Some traditional
+          implementations would not recognize `#elif', so it suggests
+          avoiding it altogether.
+
+        * A function-like macro that appears without arguments.
+
+        * The unary plus operator.
+
+        * The `U' integer constant suffix, or the `F' or `L' floating
+          point constant suffixes.  (Traditional C does support the `L'
+          suffix on integer constants.)  Note, these suffixes appear in
+          macros defined in the system headers of most modern systems,
+          e.g. the `_MIN'/`_MAX' macros in `<limits.h>'.  Use of these
+          macros in user code might normally lead to spurious warnings,
+          however GCC's integrated preprocessor has enough context to
+          avoid warning in these cases.
+
+        * A function declared external in one block and then used after
+          the end of the block.
+
+        * A `switch' statement has an operand of type `long'.
+
+        * A non-`static' function declaration follows a `static' one.
+          This construct is not accepted by some traditional C
+          compilers.
+
+        * The ISO type of an integer constant has a different width or
+          signedness from its traditional type.  This warning is only
+          issued if the base of the constant is ten.  I.e. hexadecimal
+          or octal values, which typically represent bit patterns, are
+          not warned about.
+
+        * Usage of ISO string concatenation is detected.
+
+        * Initialization of automatic aggregates.
+
+        * Identifier conflicts with labels.  Traditional C lacks a
+          separate namespace for labels.
+
+        * Initialization of unions.  If the initializer is zero, the
+          warning is omitted.  This is done under the assumption that
+          the zero initializer in user code appears conditioned on e.g.
+          `__STDC__' to avoid missing initializer warnings and relies
+          on default initialization to zero in the traditional C case.
+
+        * Conversions by prototypes between fixed/floating point values
+          and vice versa.  The absence of these prototypes when
+          compiling with traditional C would cause serious problems.
+          This is a subset of the possible conversion warnings, for the
+          full set use `-Wtraditional-conversion'.
+
+        * Use of ISO C style function definitions.  This warning
+          intentionally is _not_ issued for prototype declarations or
+          variadic functions because these ISO C features will appear
+          in your code when using libiberty's traditional C
+          compatibility macros, `PARAMS' and `VPARAMS'.  This warning
+          is also bypassed for nested functions because that feature is
+          already a GCC extension and thus not relevant to traditional
+          C compatibility.
+
+`-Wtraditional-conversion (C and Objective-C only)'
+     Warn if a prototype causes a type conversion that is different
+     from what would happen to the same argument in the absence of a
+     prototype.  This includes conversions of fixed point to floating
+     and vice versa, and conversions changing the width or signedness
+     of a fixed point argument except when the same as the default
+     promotion.
+
+`-Wdeclaration-after-statement (C and Objective-C only)'
+     Warn when a declaration is found after a statement in a block.
+     This construct, known from C++, was introduced with ISO C99 and is
+     by default allowed in GCC.  It is not supported by ISO C90 and was
+     not supported by GCC versions before GCC 3.0.  *Note Mixed
+     Declarations::.
+
+`-Wundef'
+     Warn if an undefined identifier is evaluated in an `#if' directive.
+
+`-Wno-endif-labels'
+     Do not warn whenever an `#else' or an `#endif' are followed by
+     text.
+
+`-Wshadow'
+     Warn whenever a local variable shadows another local variable,
+     parameter or global variable or whenever a built-in function is
+     shadowed.
+
+`-Wlarger-than=LEN'
+     Warn whenever an object of larger than LEN bytes is defined.
+
+`-Wframe-larger-than=LEN'
+     Warn if the size of a function frame is larger than LEN bytes.
+     The computation done to determine the stack frame size is
+     approximate and not conservative.  The actual requirements may be
+     somewhat greater than LEN even if you do not get a warning.  In
+     addition, any space allocated via `alloca', variable-length
+     arrays, or related constructs is not included by the compiler when
+     determining whether or not to issue a warning.
+
+`-Wunsafe-loop-optimizations'
+     Warn if the loop cannot be optimized because the compiler could not
+     assume anything on the bounds of the loop indices.  With
+     `-funsafe-loop-optimizations' warn if the compiler made such
+     assumptions.
+
+`-Wno-pedantic-ms-format (MinGW targets only)'
+     Disables the warnings about non-ISO `printf' / `scanf' format
+     width specifiers `I32', `I64', and `I' used on Windows targets
+     depending on the MS runtime, when you are using the options
+     `-Wformat' and `-pedantic' without gnu-extensions.
+
+`-Wpointer-arith'
+     Warn about anything that depends on the "size of" a function type
+     or of `void'.  GNU C assigns these types a size of 1, for
+     convenience in calculations with `void *' pointers and pointers to
+     functions.  In C++, warn also when an arithmetic operation involves
+     `NULL'.  This warning is also enabled by `-pedantic'.
+
+`-Wtype-limits'
+     Warn if a comparison is always true or always false due to the
+     limited range of the data type, but do not warn for constant
+     expressions.  For example, warn if an unsigned variable is
+     compared against zero with `<' or `>='.  This warning is also
+     enabled by `-Wextra'.
+
+`-Wbad-function-cast (C and Objective-C only)'
+     Warn whenever a function call is cast to a non-matching type.  For
+     example, warn if `int malloc()' is cast to `anything *'.
+
+`-Wc++-compat (C and Objective-C only)'
+     Warn about ISO C constructs that are outside of the common subset
+     of ISO C and ISO C++, e.g. request for implicit conversion from
+     `void *' to a pointer to non-`void' type.
+
+`-Wc++0x-compat (C++ and Objective-C++ only)'
+     Warn about C++ constructs whose meaning differs between ISO C++
+     1998 and ISO C++ 200x, e.g., identifiers in ISO C++ 1998 that will
+     become keywords in ISO C++ 200x.  This warning is enabled by
+     `-Wall'.
+
+`-Wcast-qual'
+     Warn whenever a pointer is cast so as to remove a type qualifier
+     from the target type.  For example, warn if a `const char *' is
+     cast to an ordinary `char *'.
+
+     Also warn when making a cast which introduces a type qualifier in
+     an unsafe way.  For example, casting `char **' to `const char **'
+     is unsafe, as in this example:
+
+            /* p is char ** value.  */
+            const char **q = (const char **) p;
+            /* Assignment of readonly string to const char * is OK.  */
+            *q = "string";
+            /* Now char** pointer points to read-only memory.  */
+            **p = 'b';
+
+`-Wcast-align'
+     Warn whenever a pointer is cast such that the required alignment
+     of the target is increased.  For example, warn if a `char *' is
+     cast to an `int *' on machines where integers can only be accessed
+     at two- or four-byte boundaries.
+
+`-Wwrite-strings'
+     When compiling C, give string constants the type `const
+     char[LENGTH]' so that copying the address of one into a
+     non-`const' `char *' pointer will get a warning.  These warnings
+     will help you find at compile time code that can try to write into
+     a string constant, but only if you have been very careful about
+     using `const' in declarations and prototypes.  Otherwise, it will
+     just be a nuisance. This is why we did not make `-Wall' request
+     these warnings.
+
+     When compiling C++, warn about the deprecated conversion from
+     string literals to `char *'.  This warning is enabled by default
+     for C++ programs.
+
+`-Wclobbered'
+     Warn for variables that might be changed by `longjmp' or `vfork'.
+     This warning is also enabled by `-Wextra'.
+
+`-Wconversion'
+     Warn for implicit conversions that may alter a value. This includes
+     conversions between real and integer, like `abs (x)' when `x' is
+     `double'; conversions between signed and unsigned, like `unsigned
+     ui = -1'; and conversions to smaller types, like `sqrtf (M_PI)'.
+     Do not warn for explicit casts like `abs ((int) x)' and `ui =
+     (unsigned) -1', or if the value is not changed by the conversion
+     like in `abs (2.0)'.  Warnings about conversions between signed
+     and unsigned integers can be disabled by using
+     `-Wno-sign-conversion'.
+
+     For C++, also warn for confusing overload resolution for
+     user-defined conversions; and conversions that will never use a
+     type conversion operator: conversions to `void', the same type, a
+     base class or a reference to them. Warnings about conversions
+     between signed and unsigned integers are disabled by default in
+     C++ unless `-Wsign-conversion' is explicitly enabled.
+
+`-Wno-conversion-null (C++ and Objective-C++ only)'
+     Do not warn for conversions between `NULL' and non-pointer types.
+     `-Wconversion-null' is enabled by default.
+
+`-Wempty-body'
+     Warn if an empty body occurs in an `if', `else' or `do while'
+     statement.  This warning is also enabled by `-Wextra'.
+
+`-Wenum-compare'
+     Warn about a comparison between values of different enum types. In
+     C++ this warning is enabled by default.  In C this warning is
+     enabled by `-Wall'.
+
+`-Wjump-misses-init (C, Objective-C only)'
+     Warn if a `goto' statement or a `switch' statement jumps forward
+     across the initialization of a variable, or jumps backward to a
+     label after the variable has been initialized.  This only warns
+     about variables which are initialized when they are declared.
+     This warning is only supported for C and Objective C; in C++ this
+     sort of branch is an error in any case.
+
+     `-Wjump-misses-init' is included in `-Wc++-compat'.  It can be
+     disabled with the `-Wno-jump-misses-init' option.
+
+`-Wsign-compare'
+     Warn when a comparison between signed and unsigned values could
+     produce an incorrect result when the signed value is converted to
+     unsigned.  This warning is also enabled by `-Wextra'; to get the
+     other warnings of `-Wextra' without this warning, use `-Wextra
+     -Wno-sign-compare'.
+
+`-Wsign-conversion'
+     Warn for implicit conversions that may change the sign of an
+     integer value, like assigning a signed integer expression to an
+     unsigned integer variable. An explicit cast silences the warning.
+     In C, this option is enabled also by `-Wconversion'.
+
+`-Waddress'
+     Warn about suspicious uses of memory addresses. These include using
+     the address of a function in a conditional expression, such as
+     `void func(void); if (func)', and comparisons against the memory
+     address of a string literal, such as `if (x == "abc")'.  Such uses
+     typically indicate a programmer error: the address of a function
+     always evaluates to true, so their use in a conditional usually
+     indicate that the programmer forgot the parentheses in a function
+     call; and comparisons against string literals result in unspecified
+     behavior and are not portable in C, so they usually indicate that
+     the programmer intended to use `strcmp'.  This warning is enabled
+     by `-Wall'.
+
+`-Wlogical-op'
+     Warn about suspicious uses of logical operators in expressions.
+     This includes using logical operators in contexts where a bit-wise
+     operator is likely to be expected.
+
+`-Waggregate-return'
+     Warn if any functions that return structures or unions are defined
+     or called.  (In languages where you can return an array, this also
+     elicits a warning.)
+
+`-Wno-attributes'
+     Do not warn if an unexpected `__attribute__' is used, such as
+     unrecognized attributes, function attributes applied to variables,
+     etc.  This will not stop errors for incorrect use of supported
+     attributes.
+
+`-Wno-builtin-macro-redefined'
+     Do not warn if certain built-in macros are redefined.  This
+     suppresses warnings for redefinition of `__TIMESTAMP__',
+     `__TIME__', `__DATE__', `__FILE__', and `__BASE_FILE__'.
+
+`-Wstrict-prototypes (C and Objective-C only)'
+     Warn if a function is declared or defined without specifying the
+     argument types.  (An old-style function definition is permitted
+     without a warning if preceded by a declaration which specifies the
+     argument types.)
+
+`-Wold-style-declaration (C and Objective-C only)'
+     Warn for obsolescent usages, according to the C Standard, in a
+     declaration. For example, warn if storage-class specifiers like
+     `static' are not the first things in a declaration.  This warning
+     is also enabled by `-Wextra'.
+
+`-Wold-style-definition (C and Objective-C only)'
+     Warn if an old-style function definition is used.  A warning is
+     given even if there is a previous prototype.
+
+`-Wmissing-parameter-type (C and Objective-C only)'
+     A function parameter is declared without a type specifier in
+     K&R-style functions:
+
+          void foo(bar) { }
+
+     This warning is also enabled by `-Wextra'.
+
+`-Wmissing-prototypes (C and Objective-C only)'
+     Warn if a global function is defined without a previous prototype
+     declaration.  This warning is issued even if the definition itself
+     provides a prototype.  The aim is to detect global functions that
+     fail to be declared in header files.
+
+`-Wmissing-declarations'
+     Warn if a global function is defined without a previous
+     declaration.  Do so even if the definition itself provides a
+     prototype.  Use this option to detect global functions that are
+     not declared in header files.  In C++, no warnings are issued for
+     function templates, or for inline functions, or for functions in
+     anonymous namespaces.
+
+`-Wmissing-field-initializers'
+     Warn if a structure's initializer has some fields missing.  For
+     example, the following code would cause such a warning, because
+     `x.h' is implicitly zero:
+
+          struct s { int f, g, h; };
+          struct s x = { 3, 4 };
+
+     This option does not warn about designated initializers, so the
+     following modification would not trigger a warning:
+
+          struct s { int f, g, h; };
+          struct s x = { .f = 3, .g = 4 };
+
+     This warning is included in `-Wextra'.  To get other `-Wextra'
+     warnings without this one, use `-Wextra
+     -Wno-missing-field-initializers'.
+
+`-Wmissing-noreturn'
+     Warn about functions which might be candidates for attribute
+     `noreturn'.  Note these are only possible candidates, not absolute
+     ones.  Care should be taken to manually verify functions actually
+     do not ever return before adding the `noreturn' attribute,
+     otherwise subtle code generation bugs could be introduced.  You
+     will not get a warning for `main' in hosted C environments.
+
+`-Wmissing-format-attribute'
+     Warn about function pointers which might be candidates for `format'
+     attributes.  Note these are only possible candidates, not absolute
+     ones.  GCC will guess that function pointers with `format'
+     attributes that are used in assignment, initialization, parameter
+     passing or return statements should have a corresponding `format'
+     attribute in the resulting type.  I.e. the left-hand side of the
+     assignment or initialization, the type of the parameter variable,
+     or the return type of the containing function respectively should
+     also have a `format' attribute to avoid the warning.
+
+     GCC will also warn about function definitions which might be
+     candidates for `format' attributes.  Again, these are only
+     possible candidates.  GCC will guess that `format' attributes
+     might be appropriate for any function that calls a function like
+     `vprintf' or `vscanf', but this might not always be the case, and
+     some functions for which `format' attributes are appropriate may
+     not be detected.
+
+`-Wno-multichar'
+     Do not warn if a multicharacter constant (`'FOOF'') is used.
+     Usually they indicate a typo in the user's code, as they have
+     implementation-defined values, and should not be used in portable
+     code.
+
+`-Wnormalized=<none|id|nfc|nfkc>'
+     In ISO C and ISO C++, two identifiers are different if they are
+     different sequences of characters.  However, sometimes when
+     characters outside the basic ASCII character set are used, you can
+     have two different character sequences that look the same.  To
+     avoid confusion, the ISO 10646 standard sets out some
+     "normalization rules" which when applied ensure that two sequences
+     that look the same are turned into the same sequence.  GCC can
+     warn you if you are using identifiers which have not been
+     normalized; this option controls that warning.
+
+     There are four levels of warning that GCC supports.  The default is
+     `-Wnormalized=nfc', which warns about any identifier which is not
+     in the ISO 10646 "C" normalized form, "NFC".  NFC is the
+     recommended form for most uses.
+
+     Unfortunately, there are some characters which ISO C and ISO C++
+     allow in identifiers that when turned into NFC aren't allowable as
+     identifiers.  That is, there's no way to use these symbols in
+     portable ISO C or C++ and have all your identifiers in NFC.
+     `-Wnormalized=id' suppresses the warning for these characters.  It
+     is hoped that future versions of the standards involved will
+     correct this, which is why this option is not the default.
+
+     You can switch the warning off for all characters by writing
+     `-Wnormalized=none'.  You would only want to do this if you were
+     using some other normalization scheme (like "D"), because
+     otherwise you can easily create bugs that are literally impossible
+     to see.
+
+     Some characters in ISO 10646 have distinct meanings but look
+     identical in some fonts or display methodologies, especially once
+     formatting has been applied.  For instance `\u207F', "SUPERSCRIPT
+     LATIN SMALL LETTER N", will display just like a regular `n' which
+     has been placed in a superscript.  ISO 10646 defines the "NFKC"
+     normalization scheme to convert all these into a standard form as
+     well, and GCC will warn if your code is not in NFKC if you use
+     `-Wnormalized=nfkc'.  This warning is comparable to warning about
+     every identifier that contains the letter O because it might be
+     confused with the digit 0, and so is not the default, but may be
+     useful as a local coding convention if the programming environment
+     is unable to be fixed to display these characters distinctly.
+
+`-Wno-deprecated'
+     Do not warn about usage of deprecated features.  *Note Deprecated
+     Features::.
+
+`-Wno-deprecated-declarations'
+     Do not warn about uses of functions (*note Function Attributes::),
+     variables (*note Variable Attributes::), and types (*note Type
+     Attributes::) marked as deprecated by using the `deprecated'
+     attribute.
+
+`-Wno-overflow'
+     Do not warn about compile-time overflow in constant expressions.
+
+`-Woverride-init (C and Objective-C only)'
+     Warn if an initialized field without side effects is overridden
+     when using designated initializers (*note Designated Initializers:
+     Designated Inits.).
+
+     This warning is included in `-Wextra'.  To get other `-Wextra'
+     warnings without this one, use `-Wextra -Wno-override-init'.
+
+`-Wpacked'
+     Warn if a structure is given the packed attribute, but the packed
+     attribute has no effect on the layout or size of the structure.
+     Such structures may be mis-aligned for little benefit.  For
+     instance, in this code, the variable `f.x' in `struct bar' will be
+     misaligned even though `struct bar' does not itself have the
+     packed attribute:
+
+          struct foo {
+            int x;
+            char a, b, c, d;
+          } __attribute__((packed));
+          struct bar {
+            char z;
+            struct foo f;
+          };
+
+`-Wpacked-bitfield-compat'
+     The 4.1, 4.2 and 4.3 series of GCC ignore the `packed' attribute
+     on bit-fields of type `char'.  This has been fixed in GCC 4.4 but
+     the change can lead to differences in the structure layout.  GCC
+     informs you when the offset of such a field has changed in GCC 4.4.
+     For example there is no longer a 4-bit padding between field `a'
+     and `b' in this structure:
+
+          struct foo
+          {
+            char a:4;
+            char b:8;
+          } __attribute__ ((packed));
+
+     This warning is enabled by default.  Use
+     `-Wno-packed-bitfield-compat' to disable this warning.
+
+`-Wpadded'
+     Warn if padding is included in a structure, either to align an
+     element of the structure or to align the whole structure.
+     Sometimes when this happens it is possible to rearrange the fields
+     of the structure to reduce the padding and so make the structure
+     smaller.
+
+`-Wredundant-decls'
+     Warn if anything is declared more than once in the same scope,
+     even in cases where multiple declaration is valid and changes
+     nothing.
+
+`-Wnested-externs (C and Objective-C only)'
+     Warn if an `extern' declaration is encountered within a function.
+
+`-Winline'
+     Warn if a function can not be inlined and it was declared as
+     inline.  Even with this option, the compiler will not warn about
+     failures to inline functions declared in system headers.
+
+     The compiler uses a variety of heuristics to determine whether or
+     not to inline a function.  For example, the compiler takes into
+     account the size of the function being inlined and the amount of
+     inlining that has already been done in the current function.
+     Therefore, seemingly insignificant changes in the source program
+     can cause the warnings produced by `-Winline' to appear or
+     disappear.
+
+`-Wno-invalid-offsetof (C++ and Objective-C++ only)'
+     Suppress warnings from applying the `offsetof' macro to a non-POD
+     type.  According to the 1998 ISO C++ standard, applying `offsetof'
+     to a non-POD type is undefined.  In existing C++ implementations,
+     however, `offsetof' typically gives meaningful results even when
+     applied to certain kinds of non-POD types. (Such as a simple
+     `struct' that fails to be a POD type only by virtue of having a
+     constructor.)  This flag is for users who are aware that they are
+     writing nonportable code and who have deliberately chosen to
+     ignore the warning about it.
+
+     The restrictions on `offsetof' may be relaxed in a future version
+     of the C++ standard.
+
+`-Wno-int-to-pointer-cast (C and Objective-C only)'
+     Suppress warnings from casts to pointer type of an integer of a
+     different size.
+
+`-Wno-pointer-to-int-cast (C and Objective-C only)'
+     Suppress warnings from casts from a pointer to an integer type of a
+     different size.
+
+`-Winvalid-pch'
+     Warn if a precompiled header (*note Precompiled Headers::) is
+     found in the search path but can't be used.
+
+`-Wlong-long'
+     Warn if `long long' type is used.  This is enabled by either
+     `-pedantic' or `-Wtraditional' in ISO C90 and C++98 modes.  To
+     inhibit the warning messages, use `-Wno-long-long'.
+
+`-Wvariadic-macros'
+     Warn if variadic macros are used in pedantic ISO C90 mode, or the
+     GNU alternate syntax when in pedantic ISO C99 mode.  This is
+     default.  To inhibit the warning messages, use
+     `-Wno-variadic-macros'.
+
+`-Wvla'
+     Warn if variable length array is used in the code.  `-Wno-vla'
+     will prevent the `-pedantic' warning of the variable length array.
+
+`-Wvolatile-register-var'
+     Warn if a register variable is declared volatile.  The volatile
+     modifier does not inhibit all optimizations that may eliminate
+     reads and/or writes to register variables.  This warning is
+     enabled by `-Wall'.
+
+`-Wdisabled-optimization'
+     Warn if a requested optimization pass is disabled.  This warning
+     does not generally indicate that there is anything wrong with your
+     code; it merely indicates that GCC's optimizers were unable to
+     handle the code effectively.  Often, the problem is that your code
+     is too big or too complex; GCC will refuse to optimize programs
+     when the optimization itself is likely to take inordinate amounts
+     of time.
+
+`-Wpointer-sign (C and Objective-C only)'
+     Warn for pointer argument passing or assignment with different
+     signedness.  This option is only supported for C and Objective-C.
+     It is implied by `-Wall' and by `-pedantic', which can be disabled
+     with `-Wno-pointer-sign'.
+
+`-Wstack-protector'
+     This option is only active when `-fstack-protector' is active.  It
+     warns about functions that will not be protected against stack
+     smashing.
+
+`-Wno-mudflap'
+     Suppress warnings about constructs that cannot be instrumented by
+     `-fmudflap'.
+
+`-Woverlength-strings'
+     Warn about string constants which are longer than the "minimum
+     maximum" length specified in the C standard.  Modern compilers
+     generally allow string constants which are much longer than the
+     standard's minimum limit, but very portable programs should avoid
+     using longer strings.
+
+     The limit applies _after_ string constant concatenation, and does
+     not count the trailing NUL.  In C90, the limit was 509 characters;
+     in C99, it was raised to 4095.  C++98 does not specify a normative
+     minimum maximum, so we do not diagnose overlength strings in C++.
+
+     This option is implied by `-pedantic', and can be disabled with
+     `-Wno-overlength-strings'.
+
+`-Wunsuffixed-float-constants (C and Objective-C only)'
+     GCC will issue a warning for any floating constant that does not
+     have a suffix.  When used together with `-Wsystem-headers' it will
+     warn about such constants in system header files.  This can be
+     useful when preparing code to use with the `FLOAT_CONST_DECIMAL64'
+     pragma from the decimal floating-point extension to C99.
+
+
+File: gcc.info,  Node: Debugging Options,  Next: Optimize Options,  Prev: Warning Options,  Up: Invoking GCC
+
+3.9 Options for Debugging Your Program or GCC
+=============================================
+
+GCC has various special options that are used for debugging either your
+program or GCC:
+
+`-g'
+     Produce debugging information in the operating system's native
+     format (stabs, COFF, XCOFF, or DWARF 2).  GDB can work with this
+     debugging information.
+
+     On most systems that use stabs format, `-g' enables use of extra
+     debugging information that only GDB can use; this extra information
+     makes debugging work better in GDB but will probably make other
+     debuggers crash or refuse to read the program.  If you want to
+     control for certain whether to generate the extra information, use
+     `-gstabs+', `-gstabs', `-gxcoff+', `-gxcoff', or `-gvms' (see
+     below).
+
+     GCC allows you to use `-g' with `-O'.  The shortcuts taken by
+     optimized code may occasionally produce surprising results: some
+     variables you declared may not exist at all; flow of control may
+     briefly move where you did not expect it; some statements may not
+     be executed because they compute constant results or their values
+     were already at hand; some statements may execute in different
+     places because they were moved out of loops.
+
+     Nevertheless it proves possible to debug optimized output.  This
+     makes it reasonable to use the optimizer for programs that might
+     have bugs.
+
+     The following options are useful when GCC is generated with the
+     capability for more than one debugging format.
+
+`-ggdb'
+     Produce debugging information for use by GDB.  This means to use
+     the most expressive format available (DWARF 2, stabs, or the
+     native format if neither of those are supported), including GDB
+     extensions if at all possible.
+
+`-gstabs'
+     Produce debugging information in stabs format (if that is
+     supported), without GDB extensions.  This is the format used by
+     DBX on most BSD systems.  On MIPS, Alpha and System V Release 4
+     systems this option produces stabs debugging output which is not
+     understood by DBX or SDB.  On System V Release 4 systems this
+     option requires the GNU assembler.
+
+`-feliminate-unused-debug-symbols'
+     Produce debugging information in stabs format (if that is
+     supported), for only symbols that are actually used.
+
+`-femit-class-debug-always'
+     Instead of emitting debugging information for a C++ class in only
+     one object file, emit it in all object files using the class.
+     This option should be used only with debuggers that are unable to
+     handle the way GCC normally emits debugging information for
+     classes because using this option will increase the size of
+     debugging information by as much as a factor of two.
+
+`-gstabs+'
+     Produce debugging information in stabs format (if that is
+     supported), using GNU extensions understood only by the GNU
+     debugger (GDB).  The use of these extensions is likely to make
+     other debuggers crash or refuse to read the program.
+
+`-gcoff'
+     Produce debugging information in COFF format (if that is
+     supported).  This is the format used by SDB on most System V
+     systems prior to System V Release 4.
+
+`-gxcoff'
+     Produce debugging information in XCOFF format (if that is
+     supported).  This is the format used by the DBX debugger on IBM
+     RS/6000 systems.
+
+`-gxcoff+'
+     Produce debugging information in XCOFF format (if that is
+     supported), using GNU extensions understood only by the GNU
+     debugger (GDB).  The use of these extensions is likely to make
+     other debuggers crash or refuse to read the program, and may cause
+     assemblers other than the GNU assembler (GAS) to fail with an
+     error.
+
+`-gdwarf-VERSION'
+     Produce debugging information in DWARF format (if that is
+     supported).  This is the format used by DBX on IRIX 6.  The value
+     of VERSION may be either 2, 3 or 4; the default version is 2.
+
+     Note that with DWARF version 2 some ports require, and will always
+     use, some non-conflicting DWARF 3 extensions in the unwind tables.
+
+     Version 4 may require GDB 7.0 and `-fvar-tracking-assignments' for
+     maximum benefit.
+
+`-gstrict-dwarf'
+     Disallow using extensions of later DWARF standard version than
+     selected with `-gdwarf-VERSION'.  On most targets using
+     non-conflicting DWARF extensions from later standard versions is
+     allowed.
+
+`-gno-strict-dwarf'
+     Allow using extensions of later DWARF standard version than
+     selected with `-gdwarf-VERSION'.
+
+`-gvms'
+     Produce debugging information in VMS debug format (if that is
+     supported).  This is the format used by DEBUG on VMS systems.
+
+`-gLEVEL'
+`-ggdbLEVEL'
+`-gstabsLEVEL'
+`-gcoffLEVEL'
+`-gxcoffLEVEL'
+`-gvmsLEVEL'
+     Request debugging information and also use LEVEL to specify how
+     much information.  The default level is 2.
+
+     Level 0 produces no debug information at all.  Thus, `-g0' negates
+     `-g'.
+
+     Level 1 produces minimal information, enough for making backtraces
+     in parts of the program that you don't plan to debug.  This
+     includes descriptions of functions and external variables, but no
+     information about local variables and no line numbers.
+
+     Level 3 includes extra information, such as all the macro
+     definitions present in the program.  Some debuggers support macro
+     expansion when you use `-g3'.
+
+     `-gdwarf-2' does not accept a concatenated debug level, because
+     GCC used to support an option `-gdwarf' that meant to generate
+     debug information in version 1 of the DWARF format (which is very
+     different from version 2), and it would have been too confusing.
+     That debug format is long obsolete, but the option cannot be
+     changed now.  Instead use an additional `-gLEVEL' option to change
+     the debug level for DWARF.
+
+`-gtoggle'
+     Turn off generation of debug info, if leaving out this option
+     would have generated it, or turn it on at level 2 otherwise.  The
+     position of this argument in the command line does not matter, it
+     takes effect after all other options are processed, and it does so
+     only once, no matter how many times it is given.  This is mainly
+     intended to be used with `-fcompare-debug'.
+
+`-fdump-final-insns[=FILE]'
+     Dump the final internal representation (RTL) to FILE.  If the
+     optional argument is omitted (or if FILE is `.'), the name of the
+     dump file will be determined by appending `.gkd' to the
+     compilation output file name.
+
+`-fcompare-debug[=OPTS]'
+     If no error occurs during compilation, run the compiler a second
+     time, adding OPTS and `-fcompare-debug-second' to the arguments
+     passed to the second compilation.  Dump the final internal
+     representation in both compilations, and print an error if they
+     differ.
+
+     If the equal sign is omitted, the default `-gtoggle' is used.
+
+     The environment variable `GCC_COMPARE_DEBUG', if defined, non-empty
+     and nonzero, implicitly enables `-fcompare-debug'.  If
+     `GCC_COMPARE_DEBUG' is defined to a string starting with a dash,
+     then it is used for OPTS, otherwise the default `-gtoggle' is used.
+
+     `-fcompare-debug=', with the equal sign but without OPTS, is
+     equivalent to `-fno-compare-debug', which disables the dumping of
+     the final representation and the second compilation, preventing
+     even `GCC_COMPARE_DEBUG' from taking effect.
+
+     To verify full coverage during `-fcompare-debug' testing, set
+     `GCC_COMPARE_DEBUG' to say `-fcompare-debug-not-overridden', which
+     GCC will reject as an invalid option in any actual compilation
+     (rather than preprocessing, assembly or linking).  To get just a
+     warning, setting `GCC_COMPARE_DEBUG' to `-w%n-fcompare-debug not
+     overridden' will do.
+
+`-fcompare-debug-second'
+     This option is implicitly passed to the compiler for the second
+     compilation requested by `-fcompare-debug', along with options to
+     silence warnings, and omitting other options that would cause
+     side-effect compiler outputs to files or to the standard output.
+     Dump files and preserved temporary files are renamed so as to
+     contain the `.gk' additional extension during the second
+     compilation, to avoid overwriting those generated by the first.
+
+     When this option is passed to the compiler driver, it causes the
+     _first_ compilation to be skipped, which makes it useful for little
+     other than debugging the compiler proper.
+
+`-feliminate-dwarf2-dups'
+     Compress DWARF2 debugging information by eliminating duplicated
+     information about each symbol.  This option only makes sense when
+     generating DWARF2 debugging information with `-gdwarf-2'.
+
+`-femit-struct-debug-baseonly'
+     Emit debug information for struct-like types only when the base
+     name of the compilation source file matches the base name of file
+     in which the struct was defined.
+
+     This option substantially reduces the size of debugging
+     information, but at significant potential loss in type information
+     to the debugger.  See `-femit-struct-debug-reduced' for a less
+     aggressive option.  See `-femit-struct-debug-detailed' for more
+     detailed control.
+
+     This option works only with DWARF 2.
+
+`-femit-struct-debug-reduced'
+     Emit debug information for struct-like types only when the base
+     name of the compilation source file matches the base name of file
+     in which the type was defined, unless the struct is a template or
+     defined in a system header.
+
+     This option significantly reduces the size of debugging
+     information, with some potential loss in type information to the
+     debugger.  See `-femit-struct-debug-baseonly' for a more
+     aggressive option.  See `-femit-struct-debug-detailed' for more
+     detailed control.
+
+     This option works only with DWARF 2.
+
+`-femit-struct-debug-detailed[=SPEC-LIST]'
+     Specify the struct-like types for which the compiler will generate
+     debug information.  The intent is to reduce duplicate struct debug
+     information between different object files within the same program.
+
+     This option is a detailed version of `-femit-struct-debug-reduced'
+     and `-femit-struct-debug-baseonly', which will serve for most
+     needs.
+
+     A specification has the syntax
+     [`dir:'|`ind:'][`ord:'|`gen:'](`any'|`sys'|`base'|`none')
+
+     The optional first word limits the specification to structs that
+     are used directly (`dir:') or used indirectly (`ind:').  A struct
+     type is used directly when it is the type of a variable, member.
+     Indirect uses arise through pointers to structs.  That is, when
+     use of an incomplete struct would be legal, the use is indirect.
+     An example is `struct one direct; struct two * indirect;'.
+
+     The optional second word limits the specification to ordinary
+     structs (`ord:') or generic structs (`gen:').  Generic structs are
+     a bit complicated to explain.  For C++, these are non-explicit
+     specializations of template classes, or non-template classes
+     within the above.  Other programming languages have generics, but
+     `-femit-struct-debug-detailed' does not yet implement them.
+
+     The third word specifies the source files for those structs for
+     which the compiler will emit debug information.  The values `none'
+     and `any' have the normal meaning.  The value `base' means that
+     the base of name of the file in which the type declaration appears
+     must match the base of the name of the main compilation file.  In
+     practice, this means that types declared in `foo.c' and `foo.h'
+     will have debug information, but types declared in other header
+     will not.  The value `sys' means those types satisfying `base' or
+     declared in system or compiler headers.
+
+     You may need to experiment to determine the best settings for your
+     application.
+
+     The default is `-femit-struct-debug-detailed=all'.
+
+     This option works only with DWARF 2.
+
+`-fenable-icf-debug'
+     Generate additional debug information to support identical code
+     folding (ICF).  This option only works with DWARF version 2 or
+     higher.
+
+`-fno-merge-debug-strings'
+     Direct the linker to not merge together strings in the debugging
+     information which are identical in different object files.
+     Merging is not supported by all assemblers or linkers.  Merging
+     decreases the size of the debug information in the output file at
+     the cost of increasing link processing time.  Merging is enabled
+     by default.
+
+`-fdebug-prefix-map=OLD=NEW'
+     When compiling files in directory `OLD', record debugging
+     information describing them as in `NEW' instead.
+
+`-fno-dwarf2-cfi-asm'
+     Emit DWARF 2 unwind info as compiler generated `.eh_frame' section
+     instead of using GAS `.cfi_*' directives.
+
+`-p'
+     Generate extra code to write profile information suitable for the
+     analysis program `prof'.  You must use this option when compiling
+     the source files you want data about, and you must also use it when
+     linking.
+
+`-pg'
+     Generate extra code to write profile information suitable for the
+     analysis program `gprof'.  You must use this option when compiling
+     the source files you want data about, and you must also use it when
+     linking.
+
+`-Q'
+     Makes the compiler print out each function name as it is compiled,
+     and print some statistics about each pass when it finishes.
+
+`-ftime-report'
+     Makes the compiler print some statistics about the time consumed
+     by each pass when it finishes.
+
+`-fmem-report'
+     Makes the compiler print some statistics about permanent memory
+     allocation when it finishes.
+
+`-fpre-ipa-mem-report'
+
+`-fpost-ipa-mem-report'
+     Makes the compiler print some statistics about permanent memory
+     allocation before or after interprocedural optimization.
+
+`-fprofile-arcs'
+     Add code so that program flow "arcs" are instrumented.  During
+     execution the program records how many times each branch and call
+     is executed and how many times it is taken or returns.  When the
+     compiled program exits it saves this data to a file called
+     `AUXNAME.gcda' for each source file.  The data may be used for
+     profile-directed optimizations (`-fbranch-probabilities'), or for
+     test coverage analysis (`-ftest-coverage').  Each object file's
+     AUXNAME is generated from the name of the output file, if
+     explicitly specified and it is not the final executable, otherwise
+     it is the basename of the source file.  In both cases any suffix
+     is removed (e.g. `foo.gcda' for input file `dir/foo.c', or
+     `dir/foo.gcda' for output file specified as `-o dir/foo.o').
+     *Note Cross-profiling::.
+
+`--coverage'
+     This option is used to compile and link code instrumented for
+     coverage analysis.  The option is a synonym for `-fprofile-arcs'
+     `-ftest-coverage' (when compiling) and `-lgcov' (when linking).
+     See the documentation for those options for more details.
+
+        * Compile the source files with `-fprofile-arcs' plus
+          optimization and code generation options.  For test coverage
+          analysis, use the additional `-ftest-coverage' option.  You
+          do not need to profile every source file in a program.
+
+        * Link your object files with `-lgcov' or `-fprofile-arcs' (the
+          latter implies the former).
+
+        * Run the program on a representative workload to generate the
+          arc profile information.  This may be repeated any number of
+          times.  You can run concurrent instances of your program, and
+          provided that the file system supports locking, the data
+          files will be correctly updated.  Also `fork' calls are
+          detected and correctly handled (double counting will not
+          happen).
+
+        * For profile-directed optimizations, compile the source files
+          again with the same optimization and code generation options
+          plus `-fbranch-probabilities' (*note Options that Control
+          Optimization: Optimize Options.).
+
+        * For test coverage analysis, use `gcov' to produce human
+          readable information from the `.gcno' and `.gcda' files.
+          Refer to the `gcov' documentation for further information.
+
+
+     With `-fprofile-arcs', for each function of your program GCC
+     creates a program flow graph, then finds a spanning tree for the
+     graph.  Only arcs that are not on the spanning tree have to be
+     instrumented: the compiler adds code to count the number of times
+     that these arcs are executed.  When an arc is the only exit or
+     only entrance to a block, the instrumentation code can be added to
+     the block; otherwise, a new basic block must be created to hold
+     the instrumentation code.
+
+`-ftest-coverage'
+     Produce a notes file that the `gcov' code-coverage utility (*note
+     `gcov'--a Test Coverage Program: Gcov.) can use to show program
+     coverage.  Each source file's note file is called `AUXNAME.gcno'.
+     Refer to the `-fprofile-arcs' option above for a description of
+     AUXNAME and instructions on how to generate test coverage data.
+     Coverage data will match the source files more closely, if you do
+     not optimize.
+
+`-fdbg-cnt-list'
+     Print the name and the counter upperbound for all debug counters.
+
+`-fdbg-cnt=COUNTER-VALUE-LIST'
+     Set the internal debug counter upperbound. COUNTER-VALUE-LIST is a
+     comma-separated list of NAME:VALUE pairs which sets the upperbound
+     of each debug counter NAME to VALUE.  All debug counters have the
+     initial upperbound of UINT_MAX, thus dbg_cnt() returns true always
+     unless the upperbound is set by this option.  e.g. With
+     -fdbg-cnt=dce:10,tail_call:0 dbg_cnt(dce) will return true only
+     for first 10 invocations and dbg_cnt(tail_call) will return false
+     always.
+
+`-dLETTERS'
+`-fdump-rtl-PASS'
+     Says to make debugging dumps during compilation at times specified
+     by LETTERS.  This is used for debugging the RTL-based passes of the
+     compiler.  The file names for most of the dumps are made by
+     appending a pass number and a word to the DUMPNAME, and the files
+     are created in the directory of the output file.  DUMPNAME is
+     generated from the name of the output file, if explicitly specified
+     and it is not an executable, otherwise it is the basename of the
+     source file. These switches may have different effects when `-E'
+     is used for preprocessing.
+
+     Debug dumps can be enabled with a `-fdump-rtl' switch or some `-d'
+     option LETTERS.  Here are the possible letters for use in PASS and
+     LETTERS, and their meanings:
+
+    `-fdump-rtl-alignments'
+          Dump after branch alignments have been computed.
+
+    `-fdump-rtl-asmcons'
+          Dump after fixing rtl statements that have unsatisfied in/out
+          constraints.
+
+    `-fdump-rtl-auto_inc_dec'
+          Dump after auto-inc-dec discovery.  This pass is only run on
+          architectures that have auto inc or auto dec instructions.
+
+    `-fdump-rtl-barriers'
+          Dump after cleaning up the barrier instructions.
+
+    `-fdump-rtl-bbpart'
+          Dump after partitioning hot and cold basic blocks.
+
+    `-fdump-rtl-bbro'
+          Dump after block reordering.
+
+    `-fdump-rtl-btl1'
+    `-fdump-rtl-btl2'
+          `-fdump-rtl-btl1' and `-fdump-rtl-btl2' enable dumping after
+          the two branch target load optimization passes.
+
+    `-fdump-rtl-bypass'
+          Dump after jump bypassing and control flow optimizations.
+
+    `-fdump-rtl-combine'
+          Dump after the RTL instruction combination pass.
+
+    `-fdump-rtl-compgotos'
+          Dump after duplicating the computed gotos.
+
+    `-fdump-rtl-ce1'
+    `-fdump-rtl-ce2'
+    `-fdump-rtl-ce3'
+          `-fdump-rtl-ce1', `-fdump-rtl-ce2', and `-fdump-rtl-ce3'
+          enable dumping after the three if conversion passes.
+
+    `-fdump-rtl-cprop_hardreg'
+          Dump after hard register copy propagation.
+
+    `-fdump-rtl-csa'
+          Dump after combining stack adjustments.
+
+    `-fdump-rtl-cse1'
+    `-fdump-rtl-cse2'
+          `-fdump-rtl-cse1' and `-fdump-rtl-cse2' enable dumping after
+          the two common sub-expression elimination passes.
+
+    `-fdump-rtl-dce'
+          Dump after the standalone dead code elimination passes.
+
+    `-fdump-rtl-dbr'
+          Dump after delayed branch scheduling.
+
+    `-fdump-rtl-dce1'
+    `-fdump-rtl-dce2'
+          `-fdump-rtl-dce1' and `-fdump-rtl-dce2' enable dumping after
+          the two dead store elimination passes.
+
+    `-fdump-rtl-eh'
+          Dump after finalization of EH handling code.
+
+    `-fdump-rtl-eh_ranges'
+          Dump after conversion of EH handling range regions.
+
+    `-fdump-rtl-expand'
+          Dump after RTL generation.
+
+    `-fdump-rtl-fwprop1'
+    `-fdump-rtl-fwprop2'
+          `-fdump-rtl-fwprop1' and `-fdump-rtl-fwprop2' enable dumping
+          after the two forward propagation passes.
+
+    `-fdump-rtl-gcse1'
+    `-fdump-rtl-gcse2'
+          `-fdump-rtl-gcse1' and `-fdump-rtl-gcse2' enable dumping
+          after global common subexpression elimination.
+
+    `-fdump-rtl-init-regs'
+          Dump after the initialization of the registers.
+
+    `-fdump-rtl-initvals'
+          Dump after the computation of the initial value sets.
+
+    `-fdump-rtl-into_cfglayout'
+          Dump after converting to cfglayout mode.
+
+    `-fdump-rtl-ira'
+          Dump after iterated register allocation.
+
+    `-fdump-rtl-jump'
+          Dump after the second jump optimization.
+
+    `-fdump-rtl-loop2'
+          `-fdump-rtl-loop2' enables dumping after the rtl loop
+          optimization passes.
+
+    `-fdump-rtl-mach'
+          Dump after performing the machine dependent reorganization
+          pass, if that pass exists.
+
+    `-fdump-rtl-mode_sw'
+          Dump after removing redundant mode switches.
+
+    `-fdump-rtl-rnreg'
+          Dump after register renumbering.
+
+    `-fdump-rtl-outof_cfglayout'
+          Dump after converting from cfglayout mode.
+
+    `-fdump-rtl-peephole2'
+          Dump after the peephole pass.
+
+    `-fdump-rtl-postreload'
+          Dump after post-reload optimizations.
+
+    `-fdump-rtl-pro_and_epilogue'
+          Dump after generating the function pro and epilogues.
+
+    `-fdump-rtl-regmove'
+          Dump after the register move pass.
+
+    `-fdump-rtl-sched1'
+    `-fdump-rtl-sched2'
+          `-fdump-rtl-sched1' and `-fdump-rtl-sched2' enable dumping
+          after the basic block scheduling passes.
+
+    `-fdump-rtl-see'
+          Dump after sign extension elimination.
+
+    `-fdump-rtl-seqabstr'
+          Dump after common sequence discovery.
+
+    `-fdump-rtl-shorten'
+          Dump after shortening branches.
+
+    `-fdump-rtl-sibling'
+          Dump after sibling call optimizations.
+
+    `-fdump-rtl-split1'
+    `-fdump-rtl-split2'
+    `-fdump-rtl-split3'
+    `-fdump-rtl-split4'
+    `-fdump-rtl-split5'
+          `-fdump-rtl-split1', `-fdump-rtl-split2',
+          `-fdump-rtl-split3', `-fdump-rtl-split4' and
+          `-fdump-rtl-split5' enable dumping after five rounds of
+          instruction splitting.
+
+    `-fdump-rtl-sms'
+          Dump after modulo scheduling.  This pass is only run on some
+          architectures.
+
+    `-fdump-rtl-stack'
+          Dump after conversion from GCC's "flat register file"
+          registers to the x87's stack-like registers.  This pass is
+          only run on x86 variants.
+
+    `-fdump-rtl-subreg1'
+    `-fdump-rtl-subreg2'
+          `-fdump-rtl-subreg1' and `-fdump-rtl-subreg2' enable dumping
+          after the two subreg expansion passes.
+
+    `-fdump-rtl-unshare'
+          Dump after all rtl has been unshared.
+
+    `-fdump-rtl-vartrack'
+          Dump after variable tracking.
+
+    `-fdump-rtl-vregs'
+          Dump after converting virtual registers to hard registers.
+
+    `-fdump-rtl-web'
+          Dump after live range splitting.
+
+    `-fdump-rtl-regclass'
+    `-fdump-rtl-subregs_of_mode_init'
+    `-fdump-rtl-subregs_of_mode_finish'
+    `-fdump-rtl-dfinit'
+    `-fdump-rtl-dfinish'
+          These dumps are defined but always produce empty files.
+
+    `-fdump-rtl-all'
+          Produce all the dumps listed above.
+
+    `-dA'
+          Annotate the assembler output with miscellaneous debugging
+          information.
+
+    `-dD'
+          Dump all macro definitions, at the end of preprocessing, in
+          addition to normal output.
+
+    `-dH'
+          Produce a core dump whenever an error occurs.
+
+    `-dm'
+          Print statistics on memory usage, at the end of the run, to
+          standard error.
+
+    `-dp'
+          Annotate the assembler output with a comment indicating which
+          pattern and alternative was used.  The length of each
+          instruction is also printed.
+
+    `-dP'
+          Dump the RTL in the assembler output as a comment before each
+          instruction.  Also turns on `-dp' annotation.
+
+    `-dv'
+          For each of the other indicated dump files
+          (`-fdump-rtl-PASS'), dump a representation of the control
+          flow graph suitable for viewing with VCG to `FILE.PASS.vcg'.
+
+    `-dx'
+          Just generate RTL for a function instead of compiling it.
+          Usually used with `-fdump-rtl-expand'.
+
+    `-dy'
+          Dump debugging information during parsing, to standard error.
+
+`-fdump-noaddr'
+     When doing debugging dumps, suppress address output.  This makes
+     it more feasible to use diff on debugging dumps for compiler
+     invocations with different compiler binaries and/or different text
+     / bss / data / heap / stack / dso start locations.
+
+`-fdump-unnumbered'
+     When doing debugging dumps, suppress instruction numbers and
+     address output.  This makes it more feasible to use diff on
+     debugging dumps for compiler invocations with different options,
+     in particular with and without `-g'.
+
+`-fdump-unnumbered-links'
+     When doing debugging dumps (see `-d' option above), suppress
+     instruction numbers for the links to the previous and next
+     instructions in a sequence.
+
+`-fdump-translation-unit (C++ only)'
+`-fdump-translation-unit-OPTIONS (C++ only)'
+     Dump a representation of the tree structure for the entire
+     translation unit to a file.  The file name is made by appending
+     `.tu' to the source file name, and the file is created in the same
+     directory as the output file.  If the `-OPTIONS' form is used,
+     OPTIONS controls the details of the dump as described for the
+     `-fdump-tree' options.
+
+`-fdump-class-hierarchy (C++ only)'
+`-fdump-class-hierarchy-OPTIONS (C++ only)'
+     Dump a representation of each class's hierarchy and virtual
+     function table layout to a file.  The file name is made by
+     appending `.class' to the source file name, and the file is
+     created in the same directory as the output file.  If the
+     `-OPTIONS' form is used, OPTIONS controls the details of the dump
+     as described for the `-fdump-tree' options.
+
+`-fdump-ipa-SWITCH'
+     Control the dumping at various stages of inter-procedural analysis
+     language tree to a file.  The file name is generated by appending a
+     switch specific suffix to the source file name, and the file is
+     created in the same directory as the output file.  The following
+     dumps are possible:
+
+    `all'
+          Enables all inter-procedural analysis dumps.
+
+    `cgraph'
+          Dumps information about call-graph optimization, unused
+          function removal, and inlining decisions.
+
+    `inline'
+          Dump after function inlining.
+
+
+`-fdump-statistics-OPTION'
+     Enable and control dumping of pass statistics in a separate file.
+     The file name is generated by appending a suffix ending in
+     `.statistics' to the source file name, and the file is created in
+     the same directory as the output file.  If the `-OPTION' form is
+     used, `-stats' will cause counters to be summed over the whole
+     compilation unit while `-details' will dump every event as the
+     passes generate them.  The default with no option is to sum
+     counters for each function compiled.
+
+`-fdump-tree-SWITCH'
+`-fdump-tree-SWITCH-OPTIONS'
+     Control the dumping at various stages of processing the
+     intermediate language tree to a file.  The file name is generated
+     by appending a switch specific suffix to the source file name, and
+     the file is created in the same directory as the output file.  If
+     the `-OPTIONS' form is used, OPTIONS is a list of `-' separated
+     options that control the details of the dump.  Not all options are
+     applicable to all dumps, those which are not meaningful will be
+     ignored.  The following options are available
+
+    `address'
+          Print the address of each node.  Usually this is not
+          meaningful as it changes according to the environment and
+          source file.  Its primary use is for tying up a dump file
+          with a debug environment.
+
+    `asmname'
+          If `DECL_ASSEMBLER_NAME' has been set for a given decl, use
+          that in the dump instead of `DECL_NAME'.  Its primary use is
+          ease of use working backward from mangled names in the
+          assembly file.
+
+    `slim'
+          Inhibit dumping of members of a scope or body of a function
+          merely because that scope has been reached.  Only dump such
+          items when they are directly reachable by some other path.
+          When dumping pretty-printed trees, this option inhibits
+          dumping the bodies of control structures.
+
+    `raw'
+          Print a raw representation of the tree.  By default, trees are
+          pretty-printed into a C-like representation.
+
+    `details'
+          Enable more detailed dumps (not honored by every dump option).
+
+    `stats'
+          Enable dumping various statistics about the pass (not honored
+          by every dump option).
+
+    `blocks'
+          Enable showing basic block boundaries (disabled in raw dumps).
+
+    `vops'
+          Enable showing virtual operands for every statement.
+
+    `lineno'
+          Enable showing line numbers for statements.
+
+    `uid'
+          Enable showing the unique ID (`DECL_UID') for each variable.
+
+    `verbose'
+          Enable showing the tree dump for each statement.
+
+    `eh'
+          Enable showing the EH region number holding each statement.
+
+    `all'
+          Turn on all options, except `raw', `slim', `verbose' and
+          `lineno'.
+
+     The following tree dumps are possible:
+    `original'
+          Dump before any tree based optimization, to `FILE.original'.
+
+    `optimized'
+          Dump after all tree based optimization, to `FILE.optimized'.
+
+    `gimple'
+          Dump each function before and after the gimplification pass
+          to a file.  The file name is made by appending `.gimple' to
+          the source file name.
+
+    `cfg'
+          Dump the control flow graph of each function to a file.  The
+          file name is made by appending `.cfg' to the source file name.
+
+    `vcg'
+          Dump the control flow graph of each function to a file in VCG
+          format.  The file name is made by appending `.vcg' to the
+          source file name.  Note that if the file contains more than
+          one function, the generated file cannot be used directly by
+          VCG.  You will need to cut and paste each function's graph
+          into its own separate file first.
+
+    `ch'
+          Dump each function after copying loop headers.  The file name
+          is made by appending `.ch' to the source file name.
+
+    `ssa'
+          Dump SSA related information to a file.  The file name is
+          made by appending `.ssa' to the source file name.
+
+    `alias'
+          Dump aliasing information for each function.  The file name
+          is made by appending `.alias' to the source file name.
+
+    `ccp'
+          Dump each function after CCP.  The file name is made by
+          appending `.ccp' to the source file name.
+
+    `storeccp'
+          Dump each function after STORE-CCP.  The file name is made by
+          appending `.storeccp' to the source file name.
+
+    `pre'
+          Dump trees after partial redundancy elimination.  The file
+          name is made by appending `.pre' to the source file name.
+
+    `fre'
+          Dump trees after full redundancy elimination.  The file name
+          is made by appending `.fre' to the source file name.
+
+    `copyprop'
+          Dump trees after copy propagation.  The file name is made by
+          appending `.copyprop' to the source file name.
+
+    `store_copyprop'
+          Dump trees after store copy-propagation.  The file name is
+          made by appending `.store_copyprop' to the source file name.
+
+    `dce'
+          Dump each function after dead code elimination.  The file
+          name is made by appending `.dce' to the source file name.
+
+    `mudflap'
+          Dump each function after adding mudflap instrumentation.  The
+          file name is made by appending `.mudflap' to the source file
+          name.
+
+    `sra'
+          Dump each function after performing scalar replacement of
+          aggregates.  The file name is made by appending `.sra' to the
+          source file name.
+
+    `sink'
+          Dump each function after performing code sinking.  The file
+          name is made by appending `.sink' to the source file name.
+
+    `dom'
+          Dump each function after applying dominator tree
+          optimizations.  The file name is made by appending `.dom' to
+          the source file name.
+
+    `dse'
+          Dump each function after applying dead store elimination.
+          The file name is made by appending `.dse' to the source file
+          name.
+
+    `phiopt'
+          Dump each function after optimizing PHI nodes into
+          straightline code.  The file name is made by appending
+          `.phiopt' to the source file name.
+
+    `forwprop'
+          Dump each function after forward propagating single use
+          variables.  The file name is made by appending `.forwprop' to
+          the source file name.
+
+    `copyrename'
+          Dump each function after applying the copy rename
+          optimization.  The file name is made by appending
+          `.copyrename' to the source file name.
+
+    `nrv'
+          Dump each function after applying the named return value
+          optimization on generic trees.  The file name is made by
+          appending `.nrv' to the source file name.
+
+    `vect'
+          Dump each function after applying vectorization of loops.
+          The file name is made by appending `.vect' to the source file
+          name.
+
+    `slp'
+          Dump each function after applying vectorization of basic
+          blocks.  The file name is made by appending `.slp' to the
+          source file name.
+
+    `vrp'
+          Dump each function after Value Range Propagation (VRP).  The
+          file name is made by appending `.vrp' to the source file name.
+
+    `all'
+          Enable all the available tree dumps with the flags provided
+          in this option.
+
+`-ftree-vectorizer-verbose=N'
+     This option controls the amount of debugging output the vectorizer
+     prints.  This information is written to standard error, unless
+     `-fdump-tree-all' or `-fdump-tree-vect' is specified, in which
+     case it is output to the usual dump listing file, `.vect'.  For
+     N=0 no diagnostic information is reported.  If N=1 the vectorizer
+     reports each loop that got vectorized, and the total number of
+     loops that got vectorized.  If N=2 the vectorizer also reports
+     non-vectorized loops that passed the first analysis phase
+     (vect_analyze_loop_form) - i.e. countable, inner-most, single-bb,
+     single-entry/exit loops.  This is the same verbosity level that
+     `-fdump-tree-vect-stats' uses.  Higher verbosity levels mean
+     either more information dumped for each reported loop, or same
+     amount of information reported for more loops: if N=3, vectorizer
+     cost model information is reported.  If N=4, alignment related
+     information is added to the reports.  If N=5, data-references
+     related information (e.g. memory dependences, memory
+     access-patterns) is added to the reports.  If N=6, the vectorizer
+     reports also non-vectorized inner-most loops that did not pass the
+     first analysis phase (i.e., may not be countable, or may have
+     complicated control-flow).  If N=7, the vectorizer reports also
+     non-vectorized nested loops.  If N=8, SLP related information is
+     added to the reports.  For N=9, all the information the vectorizer
+     generates during its analysis and transformation is reported.
+     This is the same verbosity level that `-fdump-tree-vect-details'
+     uses.
+
+`-frandom-seed=STRING'
+     This option provides a seed that GCC uses when it would otherwise
+     use random numbers.  It is used to generate certain symbol names
+     that have to be different in every compiled file.  It is also used
+     to place unique stamps in coverage data files and the object files
+     that produce them.  You can use the `-frandom-seed' option to
+     produce reproducibly identical object files.
+
+     The STRING should be different for every file you compile.
+
+`-fsched-verbose=N'
+     On targets that use instruction scheduling, this option controls
+     the amount of debugging output the scheduler prints.  This
+     information is written to standard error, unless
+     `-fdump-rtl-sched1' or `-fdump-rtl-sched2' is specified, in which
+     case it is output to the usual dump listing file, `.sched1' or
+     `.sched2' respectively.  However for N greater than nine, the
+     output is always printed to standard error.
+
+     For N greater than zero, `-fsched-verbose' outputs the same
+     information as `-fdump-rtl-sched1' and `-fdump-rtl-sched2'.  For N
+     greater than one, it also output basic block probabilities,
+     detailed ready list information and unit/insn info.  For N greater
+     than two, it includes RTL at abort point, control-flow and regions
+     info.  And for N over four, `-fsched-verbose' also includes
+     dependence info.
+
+`-save-temps'
+`-save-temps=cwd'
+     Store the usual "temporary" intermediate files permanently; place
+     them in the current directory and name them based on the source
+     file.  Thus, compiling `foo.c' with `-c -save-temps' would produce
+     files `foo.i' and `foo.s', as well as `foo.o'.  This creates a
+     preprocessed `foo.i' output file even though the compiler now
+     normally uses an integrated preprocessor.
+
+     When used in combination with the `-x' command line option,
+     `-save-temps' is sensible enough to avoid over writing an input
+     source file with the same extension as an intermediate file.  The
+     corresponding intermediate file may be obtained by renaming the
+     source file before using `-save-temps'.
+
+     If you invoke GCC in parallel, compiling several different source
+     files that share a common base name in different subdirectories or
+     the same source file compiled for multiple output destinations, it
+     is likely that the different parallel compilers will interfere
+     with each other, and overwrite the temporary files.  For instance:
+
+          gcc -save-temps -o outdir1/foo.o indir1/foo.c&
+          gcc -save-temps -o outdir2/foo.o indir2/foo.c&
+
+     may result in `foo.i' and `foo.o' being written to simultaneously
+     by both compilers.
+
+`-save-temps=obj'
+     Store the usual "temporary" intermediate files permanently.  If the
+     `-o' option is used, the temporary files are based on the object
+     file.  If the `-o' option is not used, the `-save-temps=obj'
+     switch behaves like `-save-temps'.
+
+     For example:
+
+          gcc -save-temps=obj -c foo.c
+          gcc -save-temps=obj -c bar.c -o dir/xbar.o
+          gcc -save-temps=obj foobar.c -o dir2/yfoobar
+
+     would create `foo.i', `foo.s', `dir/xbar.i', `dir/xbar.s',
+     `dir2/yfoobar.i', `dir2/yfoobar.s', and `dir2/yfoobar.o'.
+
+`-time[=FILE]'
+     Report the CPU time taken by each subprocess in the compilation
+     sequence.  For C source files, this is the compiler proper and
+     assembler (plus the linker if linking is done).
+
+     Without the specification of an output file, the output looks like
+     this:
+
+          # cc1 0.12 0.01
+          # as 0.00 0.01
+
+     The first number on each line is the "user time", that is time
+     spent executing the program itself.  The second number is "system
+     time", time spent executing operating system routines on behalf of
+     the program.  Both numbers are in seconds.
+
+     With the specification of an output file, the output is appended
+     to the named file, and it looks like this:
+
+          0.12 0.01 cc1 OPTIONS
+          0.00 0.01 as OPTIONS
+
+     The "user time" and the "system time" are moved before the program
+     name, and the options passed to the program are displayed, so that
+     one can later tell what file was being compiled, and with which
+     options.
+
+`-fvar-tracking'
+     Run variable tracking pass.  It computes where variables are
+     stored at each position in code.  Better debugging information is
+     then generated (if the debugging information format supports this
+     information).
+
+     It is enabled by default when compiling with optimization (`-Os',
+     `-O', `-O2', ...), debugging information (`-g') and the debug info
+     format supports it.
+
+`-fvar-tracking-assignments'
+     Annotate assignments to user variables early in the compilation and
+     attempt to carry the annotations over throughout the compilation
+     all the way to the end, in an attempt to improve debug information
+     while optimizing.  Use of `-gdwarf-4' is recommended along with it.
+
+     It can be enabled even if var-tracking is disabled, in which case
+     annotations will be created and maintained, but discarded at the
+     end.
+
+`-fvar-tracking-assignments-toggle'
+     Toggle `-fvar-tracking-assignments', in the same way that
+     `-gtoggle' toggles `-g'.
+
+`-print-file-name=LIBRARY'
+     Print the full absolute name of the library file LIBRARY that
+     would be used when linking--and don't do anything else.  With this
+     option, GCC does not compile or link anything; it just prints the
+     file name.
+
+`-print-multi-directory'
+     Print the directory name corresponding to the multilib selected by
+     any other switches present in the command line.  This directory is
+     supposed to exist in `GCC_EXEC_PREFIX'.
+
+`-print-multi-lib'
+     Print the mapping from multilib directory names to compiler
+     switches that enable them.  The directory name is separated from
+     the switches by `;', and each switch starts with an `@' instead of
+     the `-', without spaces between multiple switches.  This is
+     supposed to ease shell-processing.
+
+`-print-multi-os-directory'
+     Print the path to OS libraries for the selected multilib, relative
+     to some `lib' subdirectory.  If OS libraries are present in the
+     `lib' subdirectory and no multilibs are used, this is usually just
+     `.', if OS libraries are present in `libSUFFIX' sibling
+     directories this prints e.g. `../lib64', `../lib' or `../lib32',
+     or if OS libraries are present in `lib/SUBDIR' subdirectories it
+     prints e.g. `amd64', `sparcv9' or `ev6'.
+
+`-print-prog-name=PROGRAM'
+     Like `-print-file-name', but searches for a program such as `cpp'.
+
+`-print-libgcc-file-name'
+     Same as `-print-file-name=libgcc.a'.
+
+     This is useful when you use `-nostdlib' or `-nodefaultlibs' but
+     you do want to link with `libgcc.a'.  You can do
+
+          gcc -nostdlib FILES... `gcc -print-libgcc-file-name`
+
+`-print-search-dirs'
+     Print the name of the configured installation directory and a list
+     of program and library directories `gcc' will search--and don't do
+     anything else.
+
+     This is useful when `gcc' prints the error message `installation
+     problem, cannot exec cpp0: No such file or directory'.  To resolve
+     this you either need to put `cpp0' and the other compiler
+     components where `gcc' expects to find them, or you can set the
+     environment variable `GCC_EXEC_PREFIX' to the directory where you
+     installed them.  Don't forget the trailing `/'.  *Note Environment
+     Variables::.
+
+`-print-sysroot'
+     Print the target sysroot directory that will be used during
+     compilation.  This is the target sysroot specified either at
+     configure time or using the `--sysroot' option, possibly with an
+     extra suffix that depends on compilation options.  If no target
+     sysroot is specified, the option prints nothing.
+
+`-print-sysroot-headers-suffix'
+     Print the suffix added to the target sysroot when searching for
+     headers, or give an error if the compiler is not configured with
+     such a suffix--and don't do anything else.
+
+`-dumpmachine'
+     Print the compiler's target machine (for example,
+     `i686-pc-linux-gnu')--and don't do anything else.
+
+`-dumpversion'
+     Print the compiler version (for example, `3.0')--and don't do
+     anything else.
+
+`-dumpspecs'
+     Print the compiler's built-in specs--and don't do anything else.
+     (This is used when GCC itself is being built.)  *Note Spec Files::.
+
+`-feliminate-unused-debug-types'
+     Normally, when producing DWARF2 output, GCC will emit debugging
+     information for all types declared in a compilation unit,
+     regardless of whether or not they are actually used in that
+     compilation unit.  Sometimes this is useful, such as if, in the
+     debugger, you want to cast a value to a type that is not actually
+     used in your program (but is declared).  More often, however, this
+     results in a significant amount of wasted space.  With this
+     option, GCC will avoid producing debug symbol output for types
+     that are nowhere used in the source file being compiled.
+
+
+File: gcc.info,  Node: Optimize Options,  Next: Preprocessor Options,  Prev: Debugging Options,  Up: Invoking GCC
+
+3.10 Options That Control Optimization
+======================================
+
+These options control various sorts of optimizations.
+
+ Without any optimization option, the compiler's goal is to reduce the
+cost of compilation and to make debugging produce the expected results.
+Statements are independent: if you stop the program with a breakpoint
+between statements, you can then assign a new value to any variable or
+change the program counter to any other statement in the function and
+get exactly the results you would expect from the source code.
+
+ Turning on optimization flags makes the compiler attempt to improve
+the performance and/or code size at the expense of compilation time and
+possibly the ability to debug the program.
+
+ The compiler performs optimization based on the knowledge it has of the
+program.  Compiling multiple files at once to a single output file mode
+allows the compiler to use information gained from all of the files
+when compiling each of them.
+
+ Not all optimizations are controlled directly by a flag.  Only
+optimizations that have a flag are listed in this section.
+
+ Most optimizations are only enabled if an `-O' level is set on the
+command line.  Otherwise they are disabled, even if individual
+optimization flags are specified.
+
+ Depending on the target and how GCC was configured, a slightly
+different set of optimizations may be enabled at each `-O' level than
+those listed here.  You can invoke GCC with `-Q --help=optimizers' to
+find out the exact set of optimizations that are enabled at each level.
+*Note Overall Options::, for examples.
+
+`-O'
+`-O1'
+     Optimize.  Optimizing compilation takes somewhat more time, and a
+     lot more memory for a large function.
+
+     With `-O', the compiler tries to reduce code size and execution
+     time, without performing any optimizations that take a great deal
+     of compilation time.
+
+     `-O' turns on the following optimization flags:
+          -fauto-inc-dec
+          -fcprop-registers
+          -fdce
+          -fdefer-pop
+          -fdelayed-branch
+          -fdse
+          -fguess-branch-probability
+          -fif-conversion2
+          -fif-conversion
+          -fipa-pure-const
+          -fipa-reference
+          -fmerge-constants
+          -fsplit-wide-types
+          -ftree-builtin-call-dce
+          -ftree-ccp
+          -ftree-ch
+          -ftree-copyrename
+          -ftree-dce
+          -ftree-dominator-opts
+          -ftree-dse
+          -ftree-forwprop
+          -ftree-fre
+          -ftree-phiprop
+          -ftree-sra
+          -ftree-pta
+          -ftree-ter
+          -funit-at-a-time
+
+     `-O' also turns on `-fomit-frame-pointer' on machines where doing
+     so does not interfere with debugging.
+
+`-O2'
+     Optimize even more.  GCC performs nearly all supported
+     optimizations that do not involve a space-speed tradeoff.  As
+     compared to `-O', this option increases both compilation time and
+     the performance of the generated code.
+
+     `-O2' turns on all optimization flags specified by `-O'.  It also
+     turns on the following optimization flags:
+          -fthread-jumps
+          -falign-functions  -falign-jumps
+          -falign-loops  -falign-labels
+          -fcaller-saves
+          -fcrossjumping
+          -fcse-follow-jumps  -fcse-skip-blocks
+          -fdelete-null-pointer-checks
+          -fexpensive-optimizations
+          -fgcse  -fgcse-lm
+          -finline-small-functions
+          -findirect-inlining
+          -fipa-sra
+          -foptimize-sibling-calls
+          -fpeephole2
+          -fregmove
+          -freorder-blocks  -freorder-functions
+          -frerun-cse-after-loop
+          -fsched-interblock  -fsched-spec
+          -fschedule-insns  -fschedule-insns2
+          -fstrict-aliasing -fstrict-overflow
+          -ftree-switch-conversion
+          -ftree-pre
+          -ftree-vrp
+
+     Please note the warning under `-fgcse' about invoking `-O2' on
+     programs that use computed gotos.
+
+`-O3'
+     Optimize yet more.  `-O3' turns on all optimizations specified by
+     `-O2' and also turns on the `-finline-functions',
+     `-funswitch-loops', `-fpredictive-commoning',
+     `-fgcse-after-reload' and `-ftree-vectorize' options.
+
+`-O0'
+     Reduce compilation time and make debugging produce the expected
+     results.  This is the default.
+
+`-Os'
+     Optimize for size.  `-Os' enables all `-O2' optimizations that do
+     not typically increase code size.  It also performs further
+     optimizations designed to reduce code size.
+
+     `-Os' disables the following optimization flags:
+          -falign-functions  -falign-jumps  -falign-loops
+          -falign-labels  -freorder-blocks  -freorder-blocks-and-partition
+          -fprefetch-loop-arrays  -ftree-vect-loop-version
+
+     If you use multiple `-O' options, with or without level numbers,
+     the last such option is the one that is effective.
+
+ Options of the form `-fFLAG' specify machine-independent flags.  Most
+flags have both positive and negative forms; the negative form of
+`-ffoo' would be `-fno-foo'.  In the table below, only one of the forms
+is listed--the one you typically will use.  You can figure out the
+other form by either removing `no-' or adding it.
+
+ The following options control specific optimizations.  They are either
+activated by `-O' options or are related to ones that are.  You can use
+the following flags in the rare cases when "fine-tuning" of
+optimizations to be performed is desired.
+
+`-fno-default-inline'
+     Do not make member functions inline by default merely because they
+     are defined inside the class scope (C++ only).  Otherwise, when
+     you specify `-O', member functions defined inside class scope are
+     compiled inline by default; i.e., you don't need to add `inline'
+     in front of the member function name.
+
+`-fno-defer-pop'
+     Always pop the arguments to each function call as soon as that
+     function returns.  For machines which must pop arguments after a
+     function call, the compiler normally lets arguments accumulate on
+     the stack for several function calls and pops them all at once.
+
+     Disabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fforward-propagate'
+     Perform a forward propagation pass on RTL.  The pass tries to
+     combine two instructions and checks if the result can be
+     simplified.  If loop unrolling is active, two passes are performed
+     and the second is scheduled after loop unrolling.
+
+     This option is enabled by default at optimization levels `-O',
+     `-O2', `-O3', `-Os'.
+
+`-fomit-frame-pointer'
+     Don't keep the frame pointer in a register for functions that
+     don't need one.  This avoids the instructions to save, set up and
+     restore frame pointers; it also makes an extra register available
+     in many functions.  *It also makes debugging impossible on some
+     machines.*
+
+     On some machines, such as the VAX, this flag has no effect, because
+     the standard calling sequence automatically handles the frame
+     pointer and nothing is saved by pretending it doesn't exist.  The
+     machine-description macro `FRAME_POINTER_REQUIRED' controls
+     whether a target machine supports this flag.  *Note Register
+     Usage: (gccint)Registers.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-foptimize-sibling-calls'
+     Optimize sibling and tail recursive calls.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fno-inline'
+     Don't pay attention to the `inline' keyword.  Normally this option
+     is used to keep the compiler from expanding any functions inline.
+     Note that if you are not optimizing, no functions can be expanded
+     inline.
+
+`-finline-small-functions'
+     Integrate functions into their callers when their body is smaller
+     than expected function call code (so overall size of program gets
+     smaller).  The compiler heuristically decides which functions are
+     simple enough to be worth integrating in this way.
+
+     Enabled at level `-O2'.
+
+`-findirect-inlining'
+     Inline also indirect calls that are discovered to be known at
+     compile time thanks to previous inlining.  This option has any
+     effect only when inlining itself is turned on by the
+     `-finline-functions' or `-finline-small-functions' options.
+
+     Enabled at level `-O2'.
+
+`-finline-functions'
+     Integrate all simple functions into their callers.  The compiler
+     heuristically decides which functions are simple enough to be worth
+     integrating in this way.
+
+     If all calls to a given function are integrated, and the function
+     is declared `static', then the function is normally not output as
+     assembler code in its own right.
+
+     Enabled at level `-O3'.
+
+`-finline-functions-called-once'
+     Consider all `static' functions called once for inlining into their
+     caller even if they are not marked `inline'.  If a call to a given
+     function is integrated, then the function is not output as
+     assembler code in its own right.
+
+     Enabled at levels `-O1', `-O2', `-O3' and `-Os'.
+
+`-fearly-inlining'
+     Inline functions marked by `always_inline' and functions whose
+     body seems smaller than the function call overhead early before
+     doing `-fprofile-generate' instrumentation and real inlining pass.
+     Doing so makes profiling significantly cheaper and usually
+     inlining faster on programs having large chains of nested wrapper
+     functions.
+
+     Enabled by default.
+
+`-fipa-sra'
+     Perform interprocedural scalar replacement of aggregates, removal
+     of unused parameters and replacement of parameters passed by
+     reference by parameters passed by value.
+
+     Enabled at levels `-O2', `-O3' and `-Os'.
+
+`-finline-limit=N'
+     By default, GCC limits the size of functions that can be inlined.
+     This flag allows coarse control of this limit.  N is the size of
+     functions that can be inlined in number of pseudo instructions.
+
+     Inlining is actually controlled by a number of parameters, which
+     may be specified individually by using `--param NAME=VALUE'.  The
+     `-finline-limit=N' option sets some of these parameters as follows:
+
+    `max-inline-insns-single'
+          is set to N/2.
+
+    `max-inline-insns-auto'
+          is set to N/2.
+
+     See below for a documentation of the individual parameters
+     controlling inlining and for the defaults of these parameters.
+
+     _Note:_ there may be no value to `-finline-limit' that results in
+     default behavior.
+
+     _Note:_ pseudo instruction represents, in this particular context,
+     an abstract measurement of function's size.  In no way does it
+     represent a count of assembly instructions and as such its exact
+     meaning might change from one release to an another.
+
+`-fkeep-inline-functions'
+     In C, emit `static' functions that are declared `inline' into the
+     object file, even if the function has been inlined into all of its
+     callers.  This switch does not affect functions using the `extern
+     inline' extension in GNU C90.  In C++, emit any and all inline
+     functions into the object file.
+
+`-fkeep-static-consts'
+     Emit variables declared `static const' when optimization isn't
+     turned on, even if the variables aren't referenced.
+
+     GCC enables this option by default.  If you want to force the
+     compiler to check if the variable was referenced, regardless of
+     whether or not optimization is turned on, use the
+     `-fno-keep-static-consts' option.
+
+`-fmerge-constants'
+     Attempt to merge identical constants (string constants and
+     floating point constants) across compilation units.
+
+     This option is the default for optimized compilation if the
+     assembler and linker support it.  Use `-fno-merge-constants' to
+     inhibit this behavior.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fmerge-all-constants'
+     Attempt to merge identical constants and identical variables.
+
+     This option implies `-fmerge-constants'.  In addition to
+     `-fmerge-constants' this considers e.g. even constant initialized
+     arrays or initialized constant variables with integral or floating
+     point types.  Languages like C or C++ require each variable,
+     including multiple instances of the same variable in recursive
+     calls, to have distinct locations, so using this option will
+     result in non-conforming behavior.
+
+`-fmodulo-sched'
+     Perform swing modulo scheduling immediately before the first
+     scheduling pass.  This pass looks at innermost loops and reorders
+     their instructions by overlapping different iterations.
+
+`-fmodulo-sched-allow-regmoves'
+     Perform more aggressive SMS based modulo scheduling with register
+     moves allowed.  By setting this flag certain anti-dependences
+     edges will be deleted which will trigger the generation of
+     reg-moves based on the life-range analysis.  This option is
+     effective only with `-fmodulo-sched' enabled.
+
+`-fno-branch-count-reg'
+     Do not use "decrement and branch" instructions on a count register,
+     but instead generate a sequence of instructions that decrement a
+     register, compare it against zero, then branch based upon the
+     result.  This option is only meaningful on architectures that
+     support such instructions, which include x86, PowerPC, IA-64 and
+     S/390.
+
+     The default is `-fbranch-count-reg'.
+
+`-fno-function-cse'
+     Do not put function addresses in registers; make each instruction
+     that calls a constant function contain the function's address
+     explicitly.
+
+     This option results in less efficient code, but some strange hacks
+     that alter the assembler output may be confused by the
+     optimizations performed when this option is not used.
+
+     The default is `-ffunction-cse'
+
+`-fno-zero-initialized-in-bss'
+     If the target supports a BSS section, GCC by default puts
+     variables that are initialized to zero into BSS.  This can save
+     space in the resulting code.
+
+     This option turns off this behavior because some programs
+     explicitly rely on variables going to the data section.  E.g., so
+     that the resulting executable can find the beginning of that
+     section and/or make assumptions based on that.
+
+     The default is `-fzero-initialized-in-bss'.
+
+`-fmudflap -fmudflapth -fmudflapir'
+     For front-ends that support it (C and C++), instrument all risky
+     pointer/array dereferencing operations, some standard library
+     string/heap functions, and some other associated constructs with
+     range/validity tests.  Modules so instrumented should be immune to
+     buffer overflows, invalid heap use, and some other classes of C/C++
+     programming errors.  The instrumentation relies on a separate
+     runtime library (`libmudflap'), which will be linked into a
+     program if `-fmudflap' is given at link time.  Run-time behavior
+     of the instrumented program is controlled by the `MUDFLAP_OPTIONS'
+     environment variable.  See `env MUDFLAP_OPTIONS=-help a.out' for
+     its options.
+
+     Use `-fmudflapth' instead of `-fmudflap' to compile and to link if
+     your program is multi-threaded.  Use `-fmudflapir', in addition to
+     `-fmudflap' or `-fmudflapth', if instrumentation should ignore
+     pointer reads.  This produces less instrumentation (and therefore
+     faster execution) and still provides some protection against
+     outright memory corrupting writes, but allows erroneously read
+     data to propagate within a program.
+
+`-fthread-jumps'
+     Perform optimizations where we check to see if a jump branches to a
+     location where another comparison subsumed by the first is found.
+     If so, the first branch is redirected to either the destination of
+     the second branch or a point immediately following it, depending
+     on whether the condition is known to be true or false.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fsplit-wide-types'
+     When using a type that occupies multiple registers, such as `long
+     long' on a 32-bit system, split the registers apart and allocate
+     them independently.  This normally generates better code for those
+     types, but may make debugging more difficult.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fcse-follow-jumps'
+     In common subexpression elimination (CSE), scan through jump
+     instructions when the target of the jump is not reached by any
+     other path.  For example, when CSE encounters an `if' statement
+     with an `else' clause, CSE will follow the jump when the condition
+     tested is false.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fcse-skip-blocks'
+     This is similar to `-fcse-follow-jumps', but causes CSE to follow
+     jumps which conditionally skip over blocks.  When CSE encounters a
+     simple `if' statement with no else clause, `-fcse-skip-blocks'
+     causes CSE to follow the jump around the body of the `if'.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-frerun-cse-after-loop'
+     Re-run common subexpression elimination after loop optimizations
+     has been performed.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fgcse'
+     Perform a global common subexpression elimination pass.  This pass
+     also performs global constant and copy propagation.
+
+     _Note:_ When compiling a program using computed gotos, a GCC
+     extension, you may get better runtime performance if you disable
+     the global common subexpression elimination pass by adding
+     `-fno-gcse' to the command line.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fgcse-lm'
+     When `-fgcse-lm' is enabled, global common subexpression
+     elimination will attempt to move loads which are only killed by
+     stores into themselves.  This allows a loop containing a
+     load/store sequence to be changed to a load outside the loop, and
+     a copy/store within the loop.
+
+     Enabled by default when gcse is enabled.
+
+`-fgcse-sm'
+     When `-fgcse-sm' is enabled, a store motion pass is run after
+     global common subexpression elimination.  This pass will attempt
+     to move stores out of loops.  When used in conjunction with
+     `-fgcse-lm', loops containing a load/store sequence can be changed
+     to a load before the loop and a store after the loop.
+
+     Not enabled at any optimization level.
+
+`-fgcse-las'
+     When `-fgcse-las' is enabled, the global common subexpression
+     elimination pass eliminates redundant loads that come after stores
+     to the same memory location (both partial and full redundancies).
+
+     Not enabled at any optimization level.
+
+`-fgcse-after-reload'
+     When `-fgcse-after-reload' is enabled, a redundant load elimination
+     pass is performed after reload.  The purpose of this pass is to
+     cleanup redundant spilling.
+
+`-funsafe-loop-optimizations'
+     If given, the loop optimizer will assume that loop indices do not
+     overflow, and that the loops with nontrivial exit condition are not
+     infinite.  This enables a wider range of loop optimizations even if
+     the loop optimizer itself cannot prove that these assumptions are
+     valid.  Using `-Wunsafe-loop-optimizations', the compiler will
+     warn you if it finds this kind of loop.
+
+`-fcrossjumping'
+     Perform cross-jumping transformation.  This transformation unifies
+     equivalent code and save code size.  The resulting code may or may
+     not perform better than without cross-jumping.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fauto-inc-dec'
+     Combine increments or decrements of addresses with memory accesses.
+     This pass is always skipped on architectures that do not have
+     instructions to support this.  Enabled by default at `-O' and
+     higher on architectures that support this.
+
+`-fdce'
+     Perform dead code elimination (DCE) on RTL.  Enabled by default at
+     `-O' and higher.
+
+`-fdse'
+     Perform dead store elimination (DSE) on RTL.  Enabled by default
+     at `-O' and higher.
+
+`-fif-conversion'
+     Attempt to transform conditional jumps into branch-less
+     equivalents.  This include use of conditional moves, min, max, set
+     flags and abs instructions, and some tricks doable by standard
+     arithmetics.  The use of conditional execution on chips where it
+     is available is controlled by `if-conversion2'.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fif-conversion2'
+     Use conditional execution (where available) to transform
+     conditional jumps into branch-less equivalents.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fdelete-null-pointer-checks'
+     Assume that programs cannot safely dereference null pointers, and
+     that no code or data element resides there.  This enables simple
+     constant folding optimizations at all optimization levels.  In
+     addition, other optimization passes in GCC use this flag to
+     control global dataflow analyses that eliminate useless checks for
+     null pointers; these assume that if a pointer is checked after it
+     has already been dereferenced, it cannot be null.
+
+     Note however that in some environments this assumption is not true.
+     Use `-fno-delete-null-pointer-checks' to disable this optimization
+     for programs which depend on that behavior.
+
+     Some targets, especially embedded ones, disable this option at all
+     levels.  Otherwise it is enabled at all levels: `-O0', `-O1',
+     `-O2', `-O3', `-Os'.  Passes that use the information are enabled
+     independently at different optimization levels.
+
+`-fexpensive-optimizations'
+     Perform a number of minor optimizations that are relatively
+     expensive.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-foptimize-register-move'
+`-fregmove'
+     Attempt to reassign register numbers in move instructions and as
+     operands of other simple instructions in order to maximize the
+     amount of register tying.  This is especially helpful on machines
+     with two-operand instructions.
+
+     Note `-fregmove' and `-foptimize-register-move' are the same
+     optimization.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fira-algorithm=ALGORITHM'
+     Use specified coloring algorithm for the integrated register
+     allocator.  The ALGORITHM argument should be `priority' or `CB'.
+     The first algorithm specifies Chow's priority coloring, the second
+     one specifies Chaitin-Briggs coloring.  The second algorithm can
+     be unimplemented for some architectures.  If it is implemented, it
+     is the default because Chaitin-Briggs coloring as a rule generates
+     a better code.
+
+`-fira-region=REGION'
+     Use specified regions for the integrated register allocator.  The
+     REGION argument should be one of `all', `mixed', or `one'.  The
+     first value means using all loops as register allocation regions,
+     the second value which is the default means using all loops except
+     for loops with small register pressure as the regions, and third
+     one means using all function as a single region.  The first value
+     can give best result for machines with small size and irregular
+     register set, the third one results in faster and generates decent
+     code and the smallest size code, and the default value usually
+     give the best results in most cases and for most architectures.
+
+`-fira-coalesce'
+     Do optimistic register coalescing.  This option might be
+     profitable for architectures with big regular register files.
+
+`-fira-loop-pressure'
+     Use IRA to evaluate register pressure in loops for decision to move
+     loop invariants.  Usage of this option usually results in
+     generation of faster and smaller code on machines with big
+     register files (>= 32 registers) but it can slow compiler down.
+
+     This option is enabled at level `-O3' for some targets.
+
+`-fno-ira-share-save-slots'
+     Switch off sharing stack slots used for saving call used hard
+     registers living through a call.  Each hard register will get a
+     separate stack slot and as a result function stack frame will be
+     bigger.
+
+`-fno-ira-share-spill-slots'
+     Switch off sharing stack slots allocated for pseudo-registers.
+     Each pseudo-register which did not get a hard register will get a
+     separate stack slot and as a result function stack frame will be
+     bigger.
+
+`-fira-verbose=N'
+     Set up how verbose dump file for the integrated register allocator
+     will be.  Default value is 5.  If the value is greater or equal to
+     10, the dump file will be stderr as if the value were N minus 10.
+
+`-fdelayed-branch'
+     If supported for the target machine, attempt to reorder
+     instructions to exploit instruction slots available after delayed
+     branch instructions.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fschedule-insns'
+     If supported for the target machine, attempt to reorder
+     instructions to eliminate execution stalls due to required data
+     being unavailable.  This helps machines that have slow floating
+     point or memory load instructions by allowing other instructions
+     to be issued until the result of the load or floating point
+     instruction is required.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-fschedule-insns2'
+     Similar to `-fschedule-insns', but requests an additional pass of
+     instruction scheduling after register allocation has been done.
+     This is especially useful on machines with a relatively small
+     number of registers and where memory load instructions take more
+     than one cycle.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fno-sched-interblock'
+     Don't schedule instructions across basic blocks.  This is normally
+     enabled by default when scheduling before register allocation, i.e.
+     with `-fschedule-insns' or at `-O2' or higher.
+
+`-fno-sched-spec'
+     Don't allow speculative motion of non-load instructions.  This is
+     normally enabled by default when scheduling before register
+     allocation, i.e.  with `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-pressure'
+     Enable register pressure sensitive insn scheduling before the
+     register allocation.  This only makes sense when scheduling before
+     register allocation is enabled, i.e. with `-fschedule-insns' or at
+     `-O2' or higher.  Usage of this option can improve the generated
+     code and decrease its size by preventing register pressure
+     increase above the number of available hard registers and as a
+     consequence register spills in the register allocation.
+
+`-fsched-spec-load'
+     Allow speculative motion of some load instructions.  This only
+     makes sense when scheduling before register allocation, i.e. with
+     `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-spec-load-dangerous'
+     Allow speculative motion of more load instructions.  This only
+     makes sense when scheduling before register allocation, i.e. with
+     `-fschedule-insns' or at `-O2' or higher.
+
+`-fsched-stalled-insns'
+`-fsched-stalled-insns=N'
+     Define how many insns (if any) can be moved prematurely from the
+     queue of stalled insns into the ready list, during the second
+     scheduling pass.  `-fno-sched-stalled-insns' means that no insns
+     will be moved prematurely, `-fsched-stalled-insns=0' means there
+     is no limit on how many queued insns can be moved prematurely.
+     `-fsched-stalled-insns' without a value is equivalent to
+     `-fsched-stalled-insns=1'.
+
+`-fsched-stalled-insns-dep'
+`-fsched-stalled-insns-dep=N'
+     Define how many insn groups (cycles) will be examined for a
+     dependency on a stalled insn that is candidate for premature
+     removal from the queue of stalled insns.  This has an effect only
+     during the second scheduling pass, and only if
+     `-fsched-stalled-insns' is used.  `-fno-sched-stalled-insns-dep'
+     is equivalent to `-fsched-stalled-insns-dep=0'.
+     `-fsched-stalled-insns-dep' without a value is equivalent to
+     `-fsched-stalled-insns-dep=1'.
+
+`-fsched2-use-superblocks'
+     When scheduling after register allocation, do use superblock
+     scheduling algorithm.  Superblock scheduling allows motion across
+     basic block boundaries resulting on faster schedules.  This option
+     is experimental, as not all machine descriptions used by GCC model
+     the CPU closely enough to avoid unreliable results from the
+     algorithm.
+
+     This only makes sense when scheduling after register allocation,
+     i.e. with `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-group-heuristic'
+     Enable the group heuristic in the scheduler.  This heuristic favors
+     the instruction that belongs to a schedule group.  This is enabled
+     by default when scheduling is enabled, i.e. with `-fschedule-insns'
+     or `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-critical-path-heuristic'
+     Enable the critical-path heuristic in the scheduler.  This
+     heuristic favors instructions on the critical path.  This is
+     enabled by default when scheduling is enabled, i.e. with
+     `-fschedule-insns' or `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-spec-insn-heuristic'
+     Enable the speculative instruction heuristic in the scheduler.
+     This heuristic favors speculative instructions with greater
+     dependency weakness.  This is enabled by default when scheduling
+     is enabled, i.e.  with `-fschedule-insns' or `-fschedule-insns2'
+     or at `-O2' or higher.
+
+`-fsched-rank-heuristic'
+     Enable the rank heuristic in the scheduler.  This heuristic favors
+     the instruction belonging to a basic block with greater size or
+     frequency.  This is enabled by default when scheduling is enabled,
+     i.e.  with `-fschedule-insns' or `-fschedule-insns2' or at `-O2'
+     or higher.
+
+`-fsched-last-insn-heuristic'
+     Enable the last-instruction heuristic in the scheduler.  This
+     heuristic favors the instruction that is less dependent on the
+     last instruction scheduled.  This is enabled by default when
+     scheduling is enabled, i.e. with `-fschedule-insns' or
+     `-fschedule-insns2' or at `-O2' or higher.
+
+`-fsched-dep-count-heuristic'
+     Enable the dependent-count heuristic in the scheduler.  This
+     heuristic favors the instruction that has more instructions
+     depending on it.  This is enabled by default when scheduling is
+     enabled, i.e.  with `-fschedule-insns' or `-fschedule-insns2' or
+     at `-O2' or higher.
+
+`-freschedule-modulo-scheduled-loops'
+     The modulo scheduling comes before the traditional scheduling, if
+     a loop was modulo scheduled we may want to prevent the later
+     scheduling passes from changing its schedule, we use this option
+     to control that.
+
+`-fselective-scheduling'
+     Schedule instructions using selective scheduling algorithm.
+     Selective scheduling runs instead of the first scheduler pass.
+
+`-fselective-scheduling2'
+     Schedule instructions using selective scheduling algorithm.
+     Selective scheduling runs instead of the second scheduler pass.
+
+`-fsel-sched-pipelining'
+     Enable software pipelining of innermost loops during selective
+     scheduling.  This option has no effect until one of
+     `-fselective-scheduling' or `-fselective-scheduling2' is turned on.
+
+`-fsel-sched-pipelining-outer-loops'
+     When pipelining loops during selective scheduling, also pipeline
+     outer loops.  This option has no effect until
+     `-fsel-sched-pipelining' is turned on.
+
+`-fcaller-saves'
+     Enable values to be allocated in registers that will be clobbered
+     by function calls, by emitting extra instructions to save and
+     restore the registers around such calls.  Such allocation is done
+     only when it seems to result in better code than would otherwise
+     be produced.
+
+     This option is always enabled by default on certain machines,
+     usually those which have no call-preserved registers to use
+     instead.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fconserve-stack'
+     Attempt to minimize stack usage.  The compiler will attempt to use
+     less stack space, even if that makes the program slower.  This
+     option implies setting the `large-stack-frame' parameter to 100
+     and the `large-stack-frame-growth' parameter to 400.
+
+`-ftree-reassoc'
+     Perform reassociation on trees.  This flag is enabled by default
+     at `-O' and higher.
+
+`-ftree-pre'
+     Perform partial redundancy elimination (PRE) on trees.  This flag
+     is enabled by default at `-O2' and `-O3'.
+
+`-ftree-forwprop'
+     Perform forward propagation on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-fre'
+     Perform full redundancy elimination (FRE) on trees.  The difference
+     between FRE and PRE is that FRE only considers expressions that
+     are computed on all paths leading to the redundant computation.
+     This analysis is faster than PRE, though it exposes fewer
+     redundancies.  This flag is enabled by default at `-O' and higher.
+
+`-ftree-phiprop'
+     Perform hoisting of loads from conditional pointers on trees.  This
+     pass is enabled by default at `-O' and higher.
+
+`-ftree-copy-prop'
+     Perform copy propagation on trees.  This pass eliminates
+     unnecessary copy operations.  This flag is enabled by default at
+     `-O' and higher.
+
+`-fipa-pure-const'
+     Discover which functions are pure or constant.  Enabled by default
+     at `-O' and higher.
+
+`-fipa-reference'
+     Discover which static variables do not escape cannot escape the
+     compilation unit.  Enabled by default at `-O' and higher.
+
+`-fipa-struct-reorg'
+     Perform structure reorganization optimization, that change C-like
+     structures layout in order to better utilize spatial locality.
+     This transformation is affective for programs containing arrays of
+     structures.  Available in two compilation modes: profile-based
+     (enabled with `-fprofile-generate') or static (which uses built-in
+     heuristics).  Require `-fipa-type-escape' to provide the safety of
+     this transformation.  It works only in whole program mode, so it
+     requires `-fwhole-program' and `-combine' to be enabled.
+     Structures considered `cold' by this transformation are not
+     affected (see `--param struct-reorg-cold-struct-ratio=VALUE').
+
+     With this flag, the program debug info reflects a new structure
+     layout.
+
+`-fipa-pta'
+     Perform interprocedural pointer analysis.  This option is
+     experimental and does not affect generated code.
+
+`-fipa-cp'
+     Perform interprocedural constant propagation.  This optimization
+     analyzes the program to determine when values passed to functions
+     are constants and then optimizes accordingly.  This optimization
+     can substantially increase performance if the application has
+     constants passed to functions.  This flag is enabled by default at
+     `-O2', `-Os' and `-O3'.
+
+`-fipa-cp-clone'
+     Perform function cloning to make interprocedural constant
+     propagation stronger.  When enabled, interprocedural constant
+     propagation will perform function cloning when externally visible
+     function can be called with constant arguments.  Because this
+     optimization can create multiple copies of functions, it may
+     significantly increase code size (see `--param
+     ipcp-unit-growth=VALUE').  This flag is enabled by default at
+     `-O3'.
+
+`-fipa-matrix-reorg'
+     Perform matrix flattening and transposing.  Matrix flattening
+     tries to replace an m-dimensional matrix with its equivalent
+     n-dimensional matrix, where n < m.  This reduces the level of
+     indirection needed for accessing the elements of the matrix. The
+     second optimization is matrix transposing that attempts to change
+     the order of the matrix's dimensions in order to improve cache
+     locality.  Both optimizations need the `-fwhole-program' flag.
+     Transposing is enabled only if profiling information is available.
+
+`-ftree-sink'
+     Perform forward store motion  on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-ccp'
+     Perform sparse conditional constant propagation (CCP) on trees.
+     This pass only operates on local scalar variables and is enabled
+     by default at `-O' and higher.
+
+`-ftree-switch-conversion'
+     Perform conversion of simple initializations in a switch to
+     initializations from a scalar array.  This flag is enabled by
+     default at `-O2' and higher.
+
+`-ftree-dce'
+     Perform dead code elimination (DCE) on trees.  This flag is
+     enabled by default at `-O' and higher.
+
+`-ftree-builtin-call-dce'
+     Perform conditional dead code elimination (DCE) for calls to
+     builtin functions that may set `errno' but are otherwise
+     side-effect free.  This flag is enabled by default at `-O2' and
+     higher if `-Os' is not also specified.
+
+`-ftree-dominator-opts'
+     Perform a variety of simple scalar cleanups (constant/copy
+     propagation, redundancy elimination, range propagation and
+     expression simplification) based on a dominator tree traversal.
+     This also performs jump threading (to reduce jumps to jumps). This
+     flag is enabled by default at `-O' and higher.
+
+`-ftree-dse'
+     Perform dead store elimination (DSE) on trees.  A dead store is a
+     store into a memory location which will later be overwritten by
+     another store without any intervening loads.  In this case the
+     earlier store can be deleted.  This flag is enabled by default at
+     `-O' and higher.
+
+`-ftree-ch'
+     Perform loop header copying on trees.  This is beneficial since it
+     increases effectiveness of code motion optimizations.  It also
+     saves one jump.  This flag is enabled by default at `-O' and
+     higher.  It is not enabled for `-Os', since it usually increases
+     code size.
+
+`-ftree-loop-optimize'
+     Perform loop optimizations on trees.  This flag is enabled by
+     default at `-O' and higher.
+
+`-ftree-loop-linear'
+     Perform linear loop transformations on tree.  This flag can
+     improve cache performance and allow further loop optimizations to
+     take place.
+
+`-floop-interchange'
+     Perform loop interchange transformations on loops.  Interchanging
+     two nested loops switches the inner and outer loops.  For example,
+     given a loop like:
+          DO J = 1, M
+            DO I = 1, N
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+     loop interchange will transform the loop as if the user had
+     written:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = A(J, I) * C
+            ENDDO
+          ENDDO
+     which can be beneficial when `N' is larger than the caches,
+     because in Fortran, the elements of an array are stored in memory
+     contiguously by column, and the original loop iterates over rows,
+     potentially creating at each access a cache miss.  This
+     optimization applies to all the languages supported by GCC and is
+     not limited to Fortran.  To use this code transformation, GCC has
+     to be configured with `--with-ppl' and `--with-cloog' to enable the
+     Graphite loop transformation infrastructure.
+
+`-floop-strip-mine'
+     Perform loop strip mining transformations on loops.  Strip mining
+     splits a loop into two nested loops.  The outer loop has strides
+     equal to the strip size and the inner loop has strides of the
+     original loop within a strip.  The strip length can be changed
+     using the `loop-block-tile-size' parameter.  For example, given a
+     loop like:
+          DO I = 1, N
+            A(I) = A(I) + C
+          ENDDO
+     loop strip mining will transform the loop as if the user had
+     written:
+          DO II = 1, N, 51
+            DO I = II, min (II + 50, N)
+              A(I) = A(I) + C
+            ENDDO
+          ENDDO
+     This optimization applies to all the languages supported by GCC
+     and is not limited to Fortran.  To use this code transformation,
+     GCC has to be configured with `--with-ppl' and `--with-cloog' to
+     enable the Graphite loop transformation infrastructure.
+
+`-floop-block'
+     Perform loop blocking transformations on loops.  Blocking strip
+     mines each loop in the loop nest such that the memory accesses of
+     the element loops fit inside caches.  The strip length can be
+     changed using the `loop-block-tile-size' parameter.  For example,
+     given a loop like:
+          DO I = 1, N
+            DO J = 1, M
+              A(J, I) = B(I) + C(J)
+            ENDDO
+          ENDDO
+     loop blocking will transform the loop as if the user had written:
+          DO II = 1, N, 51
+            DO JJ = 1, M, 51
+              DO I = II, min (II + 50, N)
+                DO J = JJ, min (JJ + 50, M)
+                  A(J, I) = B(I) + C(J)
+                ENDDO
+              ENDDO
+            ENDDO
+          ENDDO
+     which can be beneficial when `M' is larger than the caches,
+     because the innermost loop will iterate over a smaller amount of
+     data that can be kept in the caches.  This optimization applies to
+     all the languages supported by GCC and is not limited to Fortran.
+     To use this code transformation, GCC has to be configured with
+     `--with-ppl' and `--with-cloog' to enable the Graphite loop
+     transformation infrastructure.
+
+`-fgraphite-identity'
+     Enable the identity transformation for graphite.  For every SCoP
+     we generate the polyhedral representation and transform it back to
+     gimple.  Using `-fgraphite-identity' we can check the costs or
+     benefits of the GIMPLE -> GRAPHITE -> GIMPLE transformation.  Some
+     minimal optimizations are also performed by the code generator
+     CLooG, like index splitting and dead code elimination in loops.
+
+`-floop-parallelize-all'
+     Use the Graphite data dependence analysis to identify loops that
+     can be parallelized.  Parallelize all the loops that can be
+     analyzed to not contain loop carried dependences without checking
+     that it is profitable to parallelize the loops.
+
+`-fcheck-data-deps'
+     Compare the results of several data dependence analyzers.  This
+     option is used for debugging the data dependence analyzers.
+
+`-ftree-loop-distribution'
+     Perform loop distribution.  This flag can improve cache
+     performance on big loop bodies and allow further loop
+     optimizations, like parallelization or vectorization, to take
+     place.  For example, the loop
+          DO I = 1, N
+            A(I) = B(I) + C
+            D(I) = E(I) * F
+          ENDDO
+     is transformed to
+          DO I = 1, N
+             A(I) = B(I) + C
+          ENDDO
+          DO I = 1, N
+             D(I) = E(I) * F
+          ENDDO
+
+`-ftree-loop-im'
+     Perform loop invariant motion on trees.  This pass moves only
+     invariants that would be hard to handle at RTL level (function
+     calls, operations that expand to nontrivial sequences of insns).
+     With `-funswitch-loops' it also moves operands of conditions that
+     are invariant out of the loop, so that we can use just trivial
+     invariantness analysis in loop unswitching.  The pass also includes
+     store motion.
+
+`-ftree-loop-ivcanon'
+     Create a canonical counter for number of iterations in the loop
+     for that determining number of iterations requires complicated
+     analysis.  Later optimizations then may determine the number
+     easily.  Useful especially in connection with unrolling.
+
+`-fivopts'
+     Perform induction variable optimizations (strength reduction,
+     induction variable merging and induction variable elimination) on
+     trees.
+
+`-ftree-parallelize-loops=n'
+     Parallelize loops, i.e., split their iteration space to run in n
+     threads.  This is only possible for loops whose iterations are
+     independent and can be arbitrarily reordered.  The optimization is
+     only profitable on multiprocessor machines, for loops that are
+     CPU-intensive, rather than constrained e.g. by memory bandwidth.
+     This option implies `-pthread', and thus is only supported on
+     targets that have support for `-pthread'.
+
+`-ftree-pta'
+     Perform function-local points-to analysis on trees.  This flag is
+     enabled by default at `-O' and higher.
+
+`-ftree-sra'
+     Perform scalar replacement of aggregates.  This pass replaces
+     structure references with scalars to prevent committing structures
+     to memory too early.  This flag is enabled by default at `-O' and
+     higher.
+
+`-ftree-copyrename'
+     Perform copy renaming on trees.  This pass attempts to rename
+     compiler temporaries to other variables at copy locations, usually
+     resulting in variable names which more closely resemble the
+     original variables.  This flag is enabled by default at `-O' and
+     higher.
+
+`-ftree-ter'
+     Perform temporary expression replacement during the SSA->normal
+     phase.  Single use/single def temporaries are replaced at their
+     use location with their defining expression.  This results in
+     non-GIMPLE code, but gives the expanders much more complex trees
+     to work on resulting in better RTL generation.  This is enabled by
+     default at `-O' and higher.
+
+`-ftree-vectorize'
+     Perform loop vectorization on trees. This flag is enabled by
+     default at `-O3'.
+
+`-ftree-slp-vectorize'
+     Perform basic block vectorization on trees. This flag is enabled
+     by default at `-O3' and when `-ftree-vectorize' is enabled.
+
+`-ftree-vect-loop-version'
+     Perform loop versioning when doing loop vectorization on trees.
+     When a loop appears to be vectorizable except that data alignment
+     or data dependence cannot be determined at compile time then
+     vectorized and non-vectorized versions of the loop are generated
+     along with runtime checks for alignment or dependence to control
+     which version is executed.  This option is enabled by default
+     except at level `-Os' where it is disabled.
+
+`-fvect-cost-model'
+     Enable cost model for vectorization.
+
+`-ftree-vrp'
+     Perform Value Range Propagation on trees.  This is similar to the
+     constant propagation pass, but instead of values, ranges of values
+     are propagated.  This allows the optimizers to remove unnecessary
+     range checks like array bound checks and null pointer checks.
+     This is enabled by default at `-O2' and higher.  Null pointer check
+     elimination is only done if `-fdelete-null-pointer-checks' is
+     enabled.
+
+`-ftracer'
+     Perform tail duplication to enlarge superblock size.  This
+     transformation simplifies the control flow of the function
+     allowing other optimizations to do better job.
+
+`-funroll-loops'
+     Unroll loops whose number of iterations can be determined at
+     compile time or upon entry to the loop.  `-funroll-loops' implies
+     `-frerun-cse-after-loop'.  This option makes code larger, and may
+     or may not make it run faster.
+
+`-funroll-all-loops'
+     Unroll all loops, even if their number of iterations is uncertain
+     when the loop is entered.  This usually makes programs run more
+     slowly.  `-funroll-all-loops' implies the same options as
+     `-funroll-loops',
+
+`-fsplit-ivs-in-unroller'
+     Enables expressing of values of induction variables in later
+     iterations of the unrolled loop using the value in the first
+     iteration.  This breaks long dependency chains, thus improving
+     efficiency of the scheduling passes.
+
+     Combination of `-fweb' and CSE is often sufficient to obtain the
+     same effect.  However in cases the loop body is more complicated
+     than a single basic block, this is not reliable.  It also does not
+     work at all on some of the architectures due to restrictions in
+     the CSE pass.
+
+     This optimization is enabled by default.
+
+`-fvariable-expansion-in-unroller'
+     With this option, the compiler will create multiple copies of some
+     local variables when unrolling a loop which can result in superior
+     code.
+
+`-fpredictive-commoning'
+     Perform predictive commoning optimization, i.e., reusing
+     computations (especially memory loads and stores) performed in
+     previous iterations of loops.
+
+     This option is enabled at level `-O3'.
+
+`-fprefetch-loop-arrays'
+     If supported by the target machine, generate instructions to
+     prefetch memory to improve the performance of loops that access
+     large arrays.
+
+     This option may generate better or worse code; results are highly
+     dependent on the structure of loops within the source code.
+
+     Disabled at level `-Os'.
+
+`-fno-peephole'
+`-fno-peephole2'
+     Disable any machine-specific peephole optimizations.  The
+     difference between `-fno-peephole' and `-fno-peephole2' is in how
+     they are implemented in the compiler; some targets use one, some
+     use the other, a few use both.
+
+     `-fpeephole' is enabled by default.  `-fpeephole2' enabled at
+     levels `-O2', `-O3', `-Os'.
+
+`-fno-guess-branch-probability'
+     Do not guess branch probabilities using heuristics.
+
+     GCC will use heuristics to guess branch probabilities if they are
+     not provided by profiling feedback (`-fprofile-arcs').  These
+     heuristics are based on the control flow graph.  If some branch
+     probabilities are specified by `__builtin_expect', then the
+     heuristics will be used to guess branch probabilities for the rest
+     of the control flow graph, taking the `__builtin_expect' info into
+     account.  The interactions between the heuristics and
+     `__builtin_expect' can be complex, and in some cases, it may be
+     useful to disable the heuristics so that the effects of
+     `__builtin_expect' are easier to understand.
+
+     The default is `-fguess-branch-probability' at levels `-O', `-O2',
+     `-O3', `-Os'.
+
+`-freorder-blocks'
+     Reorder basic blocks in the compiled function in order to reduce
+     number of taken branches and improve code locality.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-freorder-blocks-and-partition'
+     In addition to reordering basic blocks in the compiled function,
+     in order to reduce number of taken branches, partitions hot and
+     cold basic blocks into separate sections of the assembly and .o
+     files, to improve paging and cache locality performance.
+
+     This optimization is automatically turned off in the presence of
+     exception handling, for linkonce sections, for functions with a
+     user-defined section attribute and on any architecture that does
+     not support named sections.
+
+`-freorder-functions'
+     Reorder functions in the object file in order to improve code
+     locality.  This is implemented by using special subsections
+     `.text.hot' for most frequently executed functions and
+     `.text.unlikely' for unlikely executed functions.  Reordering is
+     done by the linker so object file format must support named
+     sections and linker must place them in a reasonable way.
+
+     Also profile feedback must be available in to make this option
+     effective.  See `-fprofile-arcs' for details.
+
+     Enabled at levels `-O2', `-O3', `-Os'.
+
+`-fstrict-aliasing'
+     Allow the compiler to assume the strictest aliasing rules
+     applicable to the language being compiled.  For C (and C++), this
+     activates optimizations based on the type of expressions.  In
+     particular, an object of one type is assumed never to reside at
+     the same address as an object of a different type, unless the
+     types are almost the same.  For example, an `unsigned int' can
+     alias an `int', but not a `void*' or a `double'.  A character type
+     may alias any other type.
+
+     Pay special attention to code like this:
+          union a_union {
+            int i;
+            double d;
+          };
+
+          int f() {
+            union a_union t;
+            t.d = 3.0;
+            return t.i;
+          }
+     The practice of reading from a different union member than the one
+     most recently written to (called "type-punning") is common.  Even
+     with `-fstrict-aliasing', type-punning is allowed, provided the
+     memory is accessed through the union type.  So, the code above
+     will work as expected.  *Note Structures unions enumerations and
+     bit-fields implementation::.  However, this code might not:
+          int f() {
+            union a_union t;
+            int* ip;
+            t.d = 3.0;
+            ip = &t.i;
+            return *ip;
+          }
+
+     Similarly, access by taking the address, casting the resulting
+     pointer and dereferencing the result has undefined behavior, even
+     if the cast uses a union type, e.g.:
+          int f() {
+            double d = 3.0;
+            return ((union a_union *) &d)->i;
+          }
+
+     The `-fstrict-aliasing' option is enabled at levels `-O2', `-O3',
+     `-Os'.
+
+`-fstrict-overflow'
+     Allow the compiler to assume strict signed overflow rules,
+     depending on the language being compiled.  For C (and C++) this
+     means that overflow when doing arithmetic with signed numbers is
+     undefined, which means that the compiler may assume that it will
+     not happen.  This permits various optimizations.  For example, the
+     compiler will assume that an expression like `i + 10 > i' will
+     always be true for signed `i'.  This assumption is only valid if
+     signed overflow is undefined, as the expression is false if `i +
+     10' overflows when using twos complement arithmetic.  When this
+     option is in effect any attempt to determine whether an operation
+     on signed numbers will overflow must be written carefully to not
+     actually involve overflow.
+
+     This option also allows the compiler to assume strict pointer
+     semantics: given a pointer to an object, if adding an offset to
+     that pointer does not produce a pointer to the same object, the
+     addition is undefined.  This permits the compiler to conclude that
+     `p + u > p' is always true for a pointer `p' and unsigned integer
+     `u'.  This assumption is only valid because pointer wraparound is
+     undefined, as the expression is false if `p + u' overflows using
+     twos complement arithmetic.
+
+     See also the `-fwrapv' option.  Using `-fwrapv' means that integer
+     signed overflow is fully defined: it wraps.  When `-fwrapv' is
+     used, there is no difference between `-fstrict-overflow' and
+     `-fno-strict-overflow' for integers.  With `-fwrapv' certain types
+     of overflow are permitted.  For example, if the compiler gets an
+     overflow when doing arithmetic on constants, the overflowed value
+     can still be used with `-fwrapv', but not otherwise.
+
+     The `-fstrict-overflow' option is enabled at levels `-O2', `-O3',
+     `-Os'.
+
+`-falign-functions'
+`-falign-functions=N'
+     Align the start of functions to the next power-of-two greater than
+     N, skipping up to N bytes.  For instance, `-falign-functions=32'
+     aligns functions to the next 32-byte boundary, but
+     `-falign-functions=24' would align to the next 32-byte boundary
+     only if this can be done by skipping 23 bytes or less.
+
+     `-fno-align-functions' and `-falign-functions=1' are equivalent
+     and mean that functions will not be aligned.
+
+     Some assemblers only support this flag when N is a power of two;
+     in that case, it is rounded up.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-labels'
+`-falign-labels=N'
+     Align all branch targets to a power-of-two boundary, skipping up to
+     N bytes like `-falign-functions'.  This option can easily make
+     code slower, because it must insert dummy operations for when the
+     branch target is reached in the usual flow of the code.
+
+     `-fno-align-labels' and `-falign-labels=1' are equivalent and mean
+     that labels will not be aligned.
+
+     If `-falign-loops' or `-falign-jumps' are applicable and are
+     greater than this value, then their values are used instead.
+
+     If N is not specified or is zero, use a machine-dependent default
+     which is very likely to be `1', meaning no alignment.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-loops'
+`-falign-loops=N'
+     Align loops to a power-of-two boundary, skipping up to N bytes
+     like `-falign-functions'.  The hope is that the loop will be
+     executed many times, which will make up for any execution of the
+     dummy operations.
+
+     `-fno-align-loops' and `-falign-loops=1' are equivalent and mean
+     that loops will not be aligned.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-falign-jumps'
+`-falign-jumps=N'
+     Align branch targets to a power-of-two boundary, for branch targets
+     where the targets can only be reached by jumping, skipping up to N
+     bytes like `-falign-functions'.  In this case, no dummy operations
+     need be executed.
+
+     `-fno-align-jumps' and `-falign-jumps=1' are equivalent and mean
+     that loops will not be aligned.
+
+     If N is not specified or is zero, use a machine-dependent default.
+
+     Enabled at levels `-O2', `-O3'.
+
+`-funit-at-a-time'
+     This option is left for compatibility reasons. `-funit-at-a-time'
+     has no effect, while `-fno-unit-at-a-time' implies
+     `-fno-toplevel-reorder' and `-fno-section-anchors'.
+
+     Enabled by default.
+
+`-fno-toplevel-reorder'
+     Do not reorder top-level functions, variables, and `asm'
+     statements.  Output them in the same order that they appear in the
+     input file.  When this option is used, unreferenced static
+     variables will not be removed.  This option is intended to support
+     existing code which relies on a particular ordering.  For new
+     code, it is better to use attributes.
+
+     Enabled at level `-O0'.  When disabled explicitly, it also imply
+     `-fno-section-anchors' that is otherwise enabled at `-O0' on some
+     targets.
+
+`-fweb'
+     Constructs webs as commonly used for register allocation purposes
+     and assign each web individual pseudo register.  This allows the
+     register allocation pass to operate on pseudos directly, but also
+     strengthens several other optimization passes, such as CSE, loop
+     optimizer and trivial dead code remover.  It can, however, make
+     debugging impossible, since variables will no longer stay in a
+     "home register".
+
+     Enabled by default with `-funroll-loops'.
+
+`-fwhole-program'
+     Assume that the current compilation unit represents the whole
+     program being compiled.  All public functions and variables with
+     the exception of `main' and those merged by attribute
+     `externally_visible' become static functions and in effect are
+     optimized more aggressively by interprocedural optimizers.  While
+     this option is equivalent to proper use of the `static' keyword for
+     programs consisting of a single file, in combination with option
+     `-combine', `-flto' or `-fwhopr' this flag can be used to compile
+     many smaller scale programs since the functions and variables
+     become local for the whole combined compilation unit, not for the
+     single source file itself.
+
+     This option implies `-fwhole-file' for Fortran programs.
+
+`-flto'
+     This option runs the standard link-time optimizer.  When invoked
+     with source code, it generates GIMPLE (one of GCC's internal
+     representations) and writes it to special ELF sections in the
+     object file.  When the object files are linked together, all the
+     function bodies are read from these ELF sections and instantiated
+     as if they had been part of the same translation unit.
+
+     To use the link-timer optimizer, `-flto' needs to be specified at
+     compile time and during the final link.  For example,
+
+          gcc -c -O2 -flto foo.c
+          gcc -c -O2 -flto bar.c
+          gcc -o myprog -flto -O2 foo.o bar.o
+
+     The first two invocations to GCC will save a bytecode
+     representation of GIMPLE into special ELF sections inside `foo.o'
+     and `bar.o'.  The final invocation will read the GIMPLE bytecode
+     from `foo.o' and `bar.o', merge the two files into a single
+     internal image, and compile the result as usual.  Since both
+     `foo.o' and `bar.o' are merged into a single image, this causes
+     all the inter-procedural analyses and optimizations in GCC to work
+     across the two files as if they were a single one.  This means,
+     for example, that the inliner will be able to inline functions in
+     `bar.o' into functions in `foo.o' and vice-versa.
+
+     Another (simpler) way to enable link-time optimization is,
+
+          gcc -o myprog -flto -O2 foo.c bar.c
+
+     The above will generate bytecode for `foo.c' and `bar.c', merge
+     them together into a single GIMPLE representation and optimize
+     them as usual to produce `myprog'.
+
+     The only important thing to keep in mind is that to enable
+     link-time optimizations the `-flto' flag needs to be passed to
+     both the compile and the link commands.
+
+     Note that when a file is compiled with `-flto', the generated
+     object file will be larger than a regular object file because it
+     will contain GIMPLE bytecodes and the usual final code.  This
+     means that object files with LTO information can be linked as a
+     normal object file.  So, in the previous example, if the final
+     link is done with
+
+          gcc -o myprog foo.o bar.o
+
+     The only difference will be that no inter-procedural optimizations
+     will be applied to produce `myprog'.  The two object files `foo.o'
+     and `bar.o' will be simply sent to the regular linker.
+
+     Additionally, the optimization flags used to compile individual
+     files are not necessarily related to those used at link-time.  For
+     instance,
+
+          gcc -c -O0 -flto foo.c
+          gcc -c -O0 -flto bar.c
+          gcc -o myprog -flto -O3 foo.o bar.o
+
+     This will produce individual object files with unoptimized
+     assembler code, but the resulting binary `myprog' will be
+     optimized at `-O3'.  Now, if the final binary is generated without
+     `-flto', then `myprog' will not be optimized.
+
+     When producing the final binary with `-flto', GCC will only apply
+     link-time optimizations to those files that contain bytecode.
+     Therefore, you can mix and match object files and libraries with
+     GIMPLE bytecodes and final object code.  GCC will automatically
+     select which files to optimize in LTO mode and which files to link
+     without further processing.
+
+     There are some code generation flags that GCC will preserve when
+     generating bytecodes, as they need to be used during the final link
+     stage.  Currently, the following options are saved into the GIMPLE
+     bytecode files: `-fPIC', `-fcommon' and all the `-m' target flags.
+
+     At link time, these options are read-in and reapplied.  Note that
+     the current implementation makes no attempt at recognizing
+     conflicting values for these options.  If two or more files have a
+     conflicting value (e.g., one file is compiled with `-fPIC' and
+     another isn't), the compiler will simply use the last value read
+     from the bytecode files.  It is recommended, then, that all the
+     files participating in the same link be compiled with the same
+     options.
+
+     Another feature of LTO is that it is possible to apply
+     interprocedural optimizations on files written in different
+     languages.  This requires some support in the language front end.
+     Currently, the C, C++ and Fortran front ends are capable of
+     emitting GIMPLE bytecodes, so something like this should work
+
+          gcc -c -flto foo.c
+          g++ -c -flto bar.cc
+          gfortran -c -flto baz.f90
+          g++ -o myprog -flto -O3 foo.o bar.o baz.o -lgfortran
+
+     Notice that the final link is done with `g++' to get the C++
+     runtime libraries and `-lgfortran' is added to get the Fortran
+     runtime libraries.  In general, when mixing languages in LTO mode,
+     you should use the same link command used when mixing languages in
+     a regular (non-LTO) compilation.  This means that if your build
+     process was mixing languages before, all you need to add is
+     `-flto' to all the compile and link commands.
+
+     If LTO encounters objects with C linkage declared with incompatible
+     types in separate translation units to be linked together
+     (undefined behavior according to ISO C99 6.2.7), a non-fatal
+     diagnostic may be issued.  The behavior is still undefined at
+     runtime.
+
+     If object files containing GIMPLE bytecode are stored in a library
+     archive, say `libfoo.a', it is possible to extract and use them in
+     an LTO link if you are using `gold' as the linker (which, in turn
+     requires GCC to be configured with `--enable-gold').  To enable
+     this feature, use the flag `-fuse-linker-plugin' at link-time:
+
+          gcc -o myprog -O2 -flto -fuse-linker-plugin a.o b.o -lfoo
+
+     With the linker plugin enabled, `gold' will extract the needed
+     GIMPLE files from `libfoo.a' and pass them on to the running GCC
+     to make them part of the aggregated GIMPLE image to be optimized.
+
+     If you are not using `gold' and/or do not specify
+     `-fuse-linker-plugin' then the objects inside `libfoo.a' will be
+     extracted and linked as usual, but they will not participate in
+     the LTO optimization process.
+
+     Link time optimizations do not require the presence of the whole
+     program to operate.  If the program does not require any symbols to
+     be exported, it is possible to combine `-flto' and `-fwhopr' with
+     `-fwhole-program' to allow the interprocedural optimizers to use
+     more aggressive assumptions which may lead to improved
+     optimization opportunities.
+
+     Regarding portability: the current implementation of LTO makes no
+     attempt at generating bytecode that can be ported between different
+     types of hosts.  The bytecode files are versioned and there is a
+     strict version check, so bytecode files generated in one version of
+     GCC will not work with an older/newer version of GCC.
+
+     Link time optimization does not play well with generating debugging
+     information.  Combining `-flto' or `-fwhopr' with `-g' is
+     experimental.
+
+     This option is disabled by default.
+
+`-fwhopr'
+     This option is identical in functionality to `-flto' but it
+     differs in how the final link stage is executed.  Instead of
+     loading all the function bodies in memory, the callgraph is
+     analyzed and optimization decisions are made (whole program
+     analysis or WPA). Once optimization decisions are made, the
+     callgraph is partitioned and the different sections are compiled
+     separately (local transformations or LTRANS).  This process allows
+     optimizations on very large programs that otherwise would not fit
+     in memory.  This option enables `-fwpa' and `-fltrans'
+     automatically.
+
+     Disabled by default.
+
+     This option is experimental.
+
+`-fwpa'
+     This is an internal option used by GCC when compiling with
+     `-fwhopr'.  You should never need to use it.
+
+     This option runs the link-time optimizer in the
+     whole-program-analysis (WPA) mode, which reads in summary
+     information from all inputs and performs a whole-program analysis
+     based on summary information only.  It generates object files for
+     subsequent runs of the link-time optimizer where individual object
+     files are optimized using both summary information from the WPA
+     mode and the actual function bodies.  It then drives the LTRANS
+     phase.
+
+     Disabled by default.
+
+`-fltrans'
+     This is an internal option used by GCC when compiling with
+     `-fwhopr'.  You should never need to use it.
+
+     This option runs the link-time optimizer in the
+     local-transformation (LTRANS) mode, which reads in output from a
+     previous run of the LTO in WPA mode.  In the LTRANS mode, LTO
+     optimizes an object and produces the final assembly.
+
+     Disabled by default.
+
+`-fltrans-output-list=FILE'
+     This is an internal option used by GCC when compiling with
+     `-fwhopr'.  You should never need to use it.
+
+     This option specifies a file to which the names of LTRANS output
+     files are written.  This option is only meaningful in conjunction
+     with `-fwpa'.
+
+     Disabled by default.
+
+`-flto-compression-level=N'
+     This option specifies the level of compression used for
+     intermediate language written to LTO object files, and is only
+     meaningful in conjunction with LTO mode (`-fwhopr', `-flto').
+     Valid values are 0 (no compression) to 9 (maximum compression).
+     Values outside this range are clamped to either 0 or 9.  If the
+     option is not given, a default balanced compression setting is
+     used.
+
+`-flto-report'
+     Prints a report with internal details on the workings of the
+     link-time optimizer.  The contents of this report vary from
+     version to version, it is meant to be useful to GCC developers
+     when processing object files in LTO mode (via `-fwhopr' or
+     `-flto').
+
+     Disabled by default.
+
+`-fuse-linker-plugin'
+     Enables the extraction of objects with GIMPLE bytecode information
+     from library archives.  This option relies on features available
+     only in `gold', so to use this you must configure GCC with
+     `--enable-gold'.  See `-flto' for a description on the effect of
+     this flag and how to use it.
+
+     Disabled by default.
+
+`-fcprop-registers'
+     After register allocation and post-register allocation instruction
+     splitting, we perform a copy-propagation pass to try to reduce
+     scheduling dependencies and occasionally eliminate the copy.
+
+     Enabled at levels `-O', `-O2', `-O3', `-Os'.
+
+`-fprofile-correction'
+     Profiles collected using an instrumented binary for multi-threaded
+     programs may be inconsistent due to missed counter updates. When
+     this option is specified, GCC will use heuristics to correct or
+     smooth out such inconsistencies. By default, GCC will emit an
+     error message when an inconsistent profile is detected.
+
+`-fprofile-dir=PATH'
+     Set the directory to search the profile data files in to PATH.
+     This option affects only the profile data generated by
+     `-fprofile-generate', `-ftest-coverage', `-fprofile-arcs' and used
+     by `-fprofile-use' and `-fbranch-probabilities' and its related
+     options.  By default, GCC will use the current directory as PATH
+     thus the profile data file will appear in the same directory as
+     the object file.
+
+`-fprofile-generate'
+`-fprofile-generate=PATH'
+     Enable options usually used for instrumenting application to
+     produce profile useful for later recompilation with profile
+     feedback based optimization.  You must use `-fprofile-generate'
+     both when compiling and when linking your program.
+
+     The following options are enabled: `-fprofile-arcs',
+     `-fprofile-values', `-fvpt'.
+
+     If PATH is specified, GCC will look at the PATH to find the
+     profile feedback data files. See `-fprofile-dir'.
+
+`-fprofile-use'
+`-fprofile-use=PATH'
+     Enable profile feedback directed optimizations, and optimizations
+     generally profitable only with profile feedback available.
+
+     The following options are enabled: `-fbranch-probabilities',
+     `-fvpt', `-funroll-loops', `-fpeel-loops', `-ftracer'
+
+     By default, GCC emits an error message if the feedback profiles do
+     not match the source code.  This error can be turned into a
+     warning by using `-Wcoverage-mismatch'.  Note this may result in
+     poorly optimized code.
+
+     If PATH is specified, GCC will look at the PATH to find the
+     profile feedback data files. See `-fprofile-dir'.
+
+ The following options control compiler behavior regarding floating
+point arithmetic.  These options trade off between speed and
+correctness.  All must be specifically enabled.
+
+`-ffloat-store'
+     Do not store floating point variables in registers, and inhibit
+     other options that might change whether a floating point value is
+     taken from a register or memory.
+
+     This option prevents undesirable excess precision on machines such
+     as the 68000 where the floating registers (of the 68881) keep more
+     precision than a `double' is supposed to have.  Similarly for the
+     x86 architecture.  For most programs, the excess precision does
+     only good, but a few programs rely on the precise definition of
+     IEEE floating point.  Use `-ffloat-store' for such programs, after
+     modifying them to store all pertinent intermediate computations
+     into variables.
+
+`-fexcess-precision=STYLE'
+     This option allows further control over excess precision on
+     machines where floating-point registers have more precision than
+     the IEEE `float' and `double' types and the processor does not
+     support operations rounding to those types.  By default,
+     `-fexcess-precision=fast' is in effect; this means that operations
+     are carried out in the precision of the registers and that it is
+     unpredictable when rounding to the types specified in the source
+     code takes place.  When compiling C, if
+     `-fexcess-precision=standard' is specified then excess precision
+     will follow the rules specified in ISO C99; in particular, both
+     casts and assignments cause values to be rounded to their semantic
+     types (whereas `-ffloat-store' only affects assignments).  This
+     option is enabled by default for C if a strict conformance option
+     such as `-std=c99' is used.
+
+     `-fexcess-precision=standard' is not implemented for languages
+     other than C, and has no effect if `-funsafe-math-optimizations'
+     or `-ffast-math' is specified.  On the x86, it also has no effect
+     if `-mfpmath=sse' or `-mfpmath=sse+387' is specified; in the
+     former case, IEEE semantics apply without excess precision, and in
+     the latter, rounding is unpredictable.
+
+`-ffast-math'
+     Sets `-fno-math-errno', `-funsafe-math-optimizations',
+     `-ffinite-math-only', `-fno-rounding-math', `-fno-signaling-nans'
+     and `-fcx-limited-range'.
+
+     This option causes the preprocessor macro `__FAST_MATH__' to be
+     defined.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.
+
+`-fno-math-errno'
+     Do not set ERRNO after calling math functions that are executed
+     with a single instruction, e.g., sqrt.  A program that relies on
+     IEEE exceptions for math error handling may want to use this flag
+     for speed while maintaining IEEE arithmetic compatibility.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.
+
+     The default is `-fmath-errno'.
+
+     On Darwin systems, the math library never sets `errno'.  There is
+     therefore no reason for the compiler to consider the possibility
+     that it might, and `-fno-math-errno' is the default.
+
+`-funsafe-math-optimizations'
+     Allow optimizations for floating-point arithmetic that (a) assume
+     that arguments and results are valid and (b) may violate IEEE or
+     ANSI standards.  When used at link-time, it may include libraries
+     or startup files that change the default FPU control word or other
+     similar optimizations.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.  Enables
+     `-fno-signed-zeros', `-fno-trapping-math', `-fassociative-math'
+     and `-freciprocal-math'.
+
+     The default is `-fno-unsafe-math-optimizations'.
+
+`-fassociative-math'
+     Allow re-association of operands in series of floating-point
+     operations.  This violates the ISO C and C++ language standard by
+     possibly changing computation result.  NOTE: re-ordering may
+     change the sign of zero as well as ignore NaNs and inhibit or
+     create underflow or overflow (and thus cannot be used on a code
+     which relies on rounding behavior like `(x + 2**52) - 2**52)'.
+     May also reorder floating-point comparisons and thus may not be
+     used when ordered comparisons are required.  This option requires
+     that both `-fno-signed-zeros' and `-fno-trapping-math' be in
+     effect.  Moreover, it doesn't make much sense with
+     `-frounding-math'. For Fortran the option is automatically enabled
+     when both `-fno-signed-zeros' and `-fno-trapping-math' are in
+     effect.
+
+     The default is `-fno-associative-math'.
+
+`-freciprocal-math'
+     Allow the reciprocal of a value to be used instead of dividing by
+     the value if this enables optimizations.  For example `x / y' can
+     be replaced with `x * (1/y)' which is useful if `(1/y)' is subject
+     to common subexpression elimination.  Note that this loses
+     precision and increases the number of flops operating on the value.
+
+     The default is `-fno-reciprocal-math'.
+
+`-ffinite-math-only'
+     Allow optimizations for floating-point arithmetic that assume that
+     arguments and results are not NaNs or +-Infs.
+
+     This option is not turned on by any `-O' option since it can
+     result in incorrect output for programs which depend on an exact
+     implementation of IEEE or ISO rules/specifications for math
+     functions. It may, however, yield faster code for programs that do
+     not require the guarantees of these specifications.
+
+     The default is `-fno-finite-math-only'.
+
+`-fno-signed-zeros'
+     Allow optimizations for floating point arithmetic that ignore the
+     signedness of zero.  IEEE arithmetic specifies the behavior of
+     distinct +0.0 and -0.0 values, which then prohibits simplification
+     of expressions such as x+0.0 or 0.0*x (even with
+     `-ffinite-math-only').  This option implies that the sign of a
+     zero result isn't significant.
+
+     The default is `-fsigned-zeros'.
+
+`-fno-trapping-math'
+     Compile code assuming that floating-point operations cannot
+     generate user-visible traps.  These traps include division by
+     zero, overflow, underflow, inexact result and invalid operation.
+     This option requires that `-fno-signaling-nans' be in effect.
+     Setting this option may allow faster code if one relies on
+     "non-stop" IEEE arithmetic, for example.
+
+     This option should never be turned on by any `-O' option since it
+     can result in incorrect output for programs which depend on an
+     exact implementation of IEEE or ISO rules/specifications for math
+     functions.
+
+     The default is `-ftrapping-math'.
+
+`-frounding-math'
+     Disable transformations and optimizations that assume default
+     floating point rounding behavior.  This is round-to-zero for all
+     floating point to integer conversions, and round-to-nearest for
+     all other arithmetic truncations.  This option should be specified
+     for programs that change the FP rounding mode dynamically, or that
+     may be executed with a non-default rounding mode.  This option
+     disables constant folding of floating point expressions at
+     compile-time (which may be affected by rounding mode) and
+     arithmetic transformations that are unsafe in the presence of
+     sign-dependent rounding modes.
+
+     The default is `-fno-rounding-math'.
+
+     This option is experimental and does not currently guarantee to
+     disable all GCC optimizations that are affected by rounding mode.
+     Future versions of GCC may provide finer control of this setting
+     using C99's `FENV_ACCESS' pragma.  This command line option will
+     be used to specify the default state for `FENV_ACCESS'.
+
+`-fsignaling-nans'
+     Compile code assuming that IEEE signaling NaNs may generate
+     user-visible traps during floating-point operations.  Setting this
+     option disables optimizations that may change the number of
+     exceptions visible with signaling NaNs.  This option implies
+     `-ftrapping-math'.
+
+     This option causes the preprocessor macro `__SUPPORT_SNAN__' to be
+     defined.
+
+     The default is `-fno-signaling-nans'.
+
+     This option is experimental and does not currently guarantee to
+     disable all GCC optimizations that affect signaling NaN behavior.
+
+`-fsingle-precision-constant'
+     Treat floating point constant as single precision constant instead
+     of implicitly converting it to double precision constant.
+
+`-fcx-limited-range'
+     When enabled, this option states that a range reduction step is not
+     needed when performing complex division.  Also, there is no
+     checking whether the result of a complex multiplication or
+     division is `NaN + I*NaN', with an attempt to rescue the situation
+     in that case.  The default is `-fno-cx-limited-range', but is
+     enabled by `-ffast-math'.
+
+     This option controls the default setting of the ISO C99
+     `CX_LIMITED_RANGE' pragma.  Nevertheless, the option applies to
+     all languages.
+
+`-fcx-fortran-rules'
+     Complex multiplication and division follow Fortran rules.  Range
+     reduction is done as part of complex division, but there is no
+     checking whether the result of a complex multiplication or
+     division is `NaN + I*NaN', with an attempt to rescue the situation
+     in that case.
+
+     The default is `-fno-cx-fortran-rules'.
+
+
+ The following options control optimizations that may improve
+performance, but are not enabled by any `-O' options.  This section
+includes experimental options that may produce broken code.
+
+`-fbranch-probabilities'
+     After running a program compiled with `-fprofile-arcs' (*note
+     Options for Debugging Your Program or `gcc': Debugging Options.),
+     you can compile it a second time using `-fbranch-probabilities',
+     to improve optimizations based on the number of times each branch
+     was taken.  When the program compiled with `-fprofile-arcs' exits
+     it saves arc execution counts to a file called `SOURCENAME.gcda'
+     for each source file.  The information in this data file is very
+     dependent on the structure of the generated code, so you must use
+     the same source code and the same optimization options for both
+     compilations.
+
+     With `-fbranch-probabilities', GCC puts a `REG_BR_PROB' note on
+     each `JUMP_INSN' and `CALL_INSN'.  These can be used to improve
+     optimization.  Currently, they are only used in one place: in
+     `reorg.c', instead of guessing which path a branch is mostly to
+     take, the `REG_BR_PROB' values are used to exactly determine which
+     path is taken more often.
+
+`-fprofile-values'
+     If combined with `-fprofile-arcs', it adds code so that some data
+     about values of expressions in the program is gathered.
+
+     With `-fbranch-probabilities', it reads back the data gathered
+     from profiling values of expressions and adds `REG_VALUE_PROFILE'
+     notes to instructions for their later usage in optimizations.
+
+     Enabled with `-fprofile-generate' and `-fprofile-use'.
+
+`-fvpt'
+     If combined with `-fprofile-arcs', it instructs the compiler to add
+     a code to gather information about values of expressions.
+
+     With `-fbranch-probabilities', it reads back the data gathered and
+     actually performs the optimizations based on them.  Currently the
+     optimizations include specialization of division operation using
+     the knowledge about the value of the denominator.
+
+`-frename-registers'
+     Attempt to avoid false dependencies in scheduled code by making use
+     of registers left over after register allocation.  This
+     optimization will most benefit processors with lots of registers.
+     Depending on the debug information format adopted by the target,
+     however, it can make debugging impossible, since variables will no
+     longer stay in a "home register".
+
+     Enabled by default with `-funroll-loops' and `-fpeel-loops'.
+
+`-ftracer'
+     Perform tail duplication to enlarge superblock size.  This
+     transformation simplifies the control flow of the function
+     allowing other optimizations to do better job.
+
+     Enabled with `-fprofile-use'.
+
+`-funroll-loops'
+     Unroll loops whose number of iterations can be determined at
+     compile time or upon entry to the loop.  `-funroll-loops' implies
+     `-frerun-cse-after-loop', `-fweb' and `-frename-registers'.  It
+     also turns on complete loop peeling (i.e. complete removal of
+     loops with small constant number of iterations).  This option
+     makes code larger, and may or may not make it run faster.
+
+     Enabled with `-fprofile-use'.
+
+`-funroll-all-loops'
+     Unroll all loops, even if their number of iterations is uncertain
+     when the loop is entered.  This usually makes programs run more
+     slowly.  `-funroll-all-loops' implies the same options as
+     `-funroll-loops'.
+
+`-fpeel-loops'
+     Peels the loops for that there is enough information that they do
+     not roll much (from profile feedback).  It also turns on complete
+     loop peeling (i.e. complete removal of loops with small constant
+     number of iterations).
+
+     Enabled with `-fprofile-use'.
+
+`-fmove-loop-invariants'
+     Enables the loop invariant motion pass in the RTL loop optimizer.
+     Enabled at level `-O1'
+
+`-funswitch-loops'
+     Move branches with loop invariant conditions out of the loop, with
+     duplicates of the loop on both branches (modified according to
+     result of the condition).
+
+`-ffunction-sections'
+`-fdata-sections'
+     Place each function or data item into its own section in the output
+     file if the target supports arbitrary sections.  The name of the
+     function or the name of the data item determines the section's name
+     in the output file.
+
+     Use these options on systems where the linker can perform
+     optimizations to improve locality of reference in the instruction
+     space.  Most systems using the ELF object format and SPARC
+     processors running Solaris 2 have linkers with such optimizations.
+     AIX may have these optimizations in the future.
+
+     Only use these options when there are significant benefits from
+     doing so.  When you specify these options, the assembler and
+     linker will create larger object and executable files and will
+     also be slower.  You will not be able to use `gprof' on all
+     systems if you specify this option and you may have problems with
+     debugging if you specify both this option and `-g'.
+
+`-fbranch-target-load-optimize'
+     Perform branch target register load optimization before prologue /
+     epilogue threading.  The use of target registers can typically be
+     exposed only during reload, thus hoisting loads out of loops and
+     doing inter-block scheduling needs a separate optimization pass.
+
+`-fbranch-target-load-optimize2'
+     Perform branch target register load optimization after prologue /
+     epilogue threading.
+
+`-fbtr-bb-exclusive'
+     When performing branch target register load optimization, don't
+     reuse branch target registers in within any basic block.
+
+`-fstack-protector'
+     Emit extra code to check for buffer overflows, such as stack
+     smashing attacks.  This is done by adding a guard variable to
+     functions with vulnerable objects.  This includes functions that
+     call alloca, and functions with buffers larger than 8 bytes.  The
+     guards are initialized when a function is entered and then checked
+     when the function exits.  If a guard check fails, an error message
+     is printed and the program exits.
+
+`-fstack-protector-all'
+     Like `-fstack-protector' except that all functions are protected.
+
+`-fsection-anchors'
+     Try to reduce the number of symbolic address calculations by using
+     shared "anchor" symbols to address nearby objects.  This
+     transformation can help to reduce the number of GOT entries and
+     GOT accesses on some targets.
+
+     For example, the implementation of the following function `foo':
+
+          static int a, b, c;
+          int foo (void) { return a + b + c; }
+
+     would usually calculate the addresses of all three variables, but
+     if you compile it with `-fsection-anchors', it will access the
+     variables from a common anchor point instead.  The effect is
+     similar to the following pseudocode (which isn't valid C):
+
+          int foo (void)
+          {
+            register int *xr = &x;
+            return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+          }
+
+     Not all targets support this option.
+
+`--param NAME=VALUE'
+     In some places, GCC uses various constants to control the amount of
+     optimization that is done.  For example, GCC will not inline
+     functions that contain more that a certain number of instructions.
+     You can control some of these constants on the command-line using
+     the `--param' option.
+
+     The names of specific parameters, and the meaning of the values,
+     are tied to the internals of the compiler, and are subject to
+     change without notice in future releases.
+
+     In each case, the VALUE is an integer.  The allowable choices for
+     NAME are given in the following table:
+
+    `struct-reorg-cold-struct-ratio'
+          The threshold ratio (as a percentage) between a structure
+          frequency and the frequency of the hottest structure in the
+          program.  This parameter is used by struct-reorg optimization
+          enabled by `-fipa-struct-reorg'.  We say that if the ratio of
+          a structure frequency, calculated by profiling, to the
+          hottest structure frequency in the program is less than this
+          parameter, then structure reorganization is not applied to
+          this structure.  The default is 10.
+
+    `predictable-branch-outcome'
+          When branch is predicted to be taken with probability lower
+          than this threshold (in percent), then it is considered well
+          predictable. The default is 10.
+
+    `max-crossjump-edges'
+          The maximum number of incoming edges to consider for
+          crossjumping.  The algorithm used by `-fcrossjumping' is
+          O(N^2) in the number of edges incoming to each block.
+          Increasing values mean more aggressive optimization, making
+          the compile time increase with probably small improvement in
+          executable size.
+
+    `min-crossjump-insns'
+          The minimum number of instructions which must be matched at
+          the end of two blocks before crossjumping will be performed
+          on them.  This value is ignored in the case where all
+          instructions in the block being crossjumped from are matched.
+          The default value is 5.
+
+    `max-grow-copy-bb-insns'
+          The maximum code size expansion factor when copying basic
+          blocks instead of jumping.  The expansion is relative to a
+          jump instruction.  The default value is 8.
+
+    `max-goto-duplication-insns'
+          The maximum number of instructions to duplicate to a block
+          that jumps to a computed goto.  To avoid O(N^2) behavior in a
+          number of passes, GCC factors computed gotos early in the
+          compilation process, and unfactors them as late as possible.
+          Only computed jumps at the end of a basic blocks with no more
+          than max-goto-duplication-insns are unfactored.  The default
+          value is 8.
+
+    `max-delay-slot-insn-search'
+          The maximum number of instructions to consider when looking
+          for an instruction to fill a delay slot.  If more than this
+          arbitrary number of instructions is searched, the time
+          savings from filling the delay slot will be minimal so stop
+          searching.  Increasing values mean more aggressive
+          optimization, making the compile time increase with probably
+          small improvement in executable run time.
+
+    `max-delay-slot-live-search'
+          When trying to fill delay slots, the maximum number of
+          instructions to consider when searching for a block with
+          valid live register information.  Increasing this arbitrarily
+          chosen value means more aggressive optimization, increasing
+          the compile time.  This parameter should be removed when the
+          delay slot code is rewritten to maintain the control-flow
+          graph.
+
+    `max-gcse-memory'
+          The approximate maximum amount of memory that will be
+          allocated in order to perform the global common subexpression
+          elimination optimization.  If more memory than specified is
+          required, the optimization will not be done.
+
+    `max-pending-list-length'
+          The maximum number of pending dependencies scheduling will
+          allow before flushing the current state and starting over.
+          Large functions with few branches or calls can create
+          excessively large lists which needlessly consume memory and
+          resources.
+
+    `max-inline-insns-single'
+          Several parameters control the tree inliner used in gcc.
+          This number sets the maximum number of instructions (counted
+          in GCC's internal representation) in a single function that
+          the tree inliner will consider for inlining.  This only
+          affects functions declared inline and methods implemented in
+          a class declaration (C++).  The default value is 300.
+
+    `max-inline-insns-auto'
+          When you use `-finline-functions' (included in `-O3'), a lot
+          of functions that would otherwise not be considered for
+          inlining by the compiler will be investigated.  To those
+          functions, a different (more restrictive) limit compared to
+          functions declared inline can be applied.  The default value
+          is 50.
+
+    `large-function-insns'
+          The limit specifying really large functions.  For functions
+          larger than this limit after inlining, inlining is
+          constrained by `--param large-function-growth'.  This
+          parameter is useful primarily to avoid extreme compilation
+          time caused by non-linear algorithms used by the backend.
+          The default value is 2700.
+
+    `large-function-growth'
+          Specifies maximal growth of large function caused by inlining
+          in percents.  The default value is 100 which limits large
+          function growth to 2.0 times the original size.
+
+    `large-unit-insns'
+          The limit specifying large translation unit.  Growth caused
+          by inlining of units larger than this limit is limited by
+          `--param inline-unit-growth'.  For small units this might be
+          too tight (consider unit consisting of function A that is
+          inline and B that just calls A three time.  If B is small
+          relative to A, the growth of unit is 300\% and yet such
+          inlining is very sane.  For very large units consisting of
+          small inlineable functions however the overall unit growth
+          limit is needed to avoid exponential explosion of code size.
+          Thus for smaller units, the size is increased to `--param
+          large-unit-insns' before applying `--param
+          inline-unit-growth'.  The default is 10000
+
+    `inline-unit-growth'
+          Specifies maximal overall growth of the compilation unit
+          caused by inlining.  The default value is 30 which limits
+          unit growth to 1.3 times the original size.
+
+    `ipcp-unit-growth'
+          Specifies maximal overall growth of the compilation unit
+          caused by interprocedural constant propagation.  The default
+          value is 10 which limits unit growth to 1.1 times the
+          original size.
+
+    `large-stack-frame'
+          The limit specifying large stack frames.  While inlining the
+          algorithm is trying to not grow past this limit too much.
+          Default value is 256 bytes.
+
+    `large-stack-frame-growth'
+          Specifies maximal growth of large stack frames caused by
+          inlining in percents.  The default value is 1000 which limits
+          large stack frame growth to 11 times the original size.
+
+    `max-inline-insns-recursive'
+    `max-inline-insns-recursive-auto'
+          Specifies maximum number of instructions out-of-line copy of
+          self recursive inline function can grow into by performing
+          recursive inlining.
+
+          For functions declared inline `--param
+          max-inline-insns-recursive' is taken into account.  For
+          function not declared inline, recursive inlining happens only
+          when `-finline-functions' (included in `-O3') is enabled and
+          `--param max-inline-insns-recursive-auto' is used.  The
+          default value is 450.
+
+    `max-inline-recursive-depth'
+    `max-inline-recursive-depth-auto'
+          Specifies maximum recursion depth used by the recursive
+          inlining.
+
+          For functions declared inline `--param
+          max-inline-recursive-depth' is taken into account.  For
+          function not declared inline, recursive inlining happens only
+          when `-finline-functions' (included in `-O3') is enabled and
+          `--param max-inline-recursive-depth-auto' is used.  The
+          default value is 8.
+
+    `min-inline-recursive-probability'
+          Recursive inlining is profitable only for function having
+          deep recursion in average and can hurt for function having
+          little recursion depth by increasing the prologue size or
+          complexity of function body to other optimizers.
+
+          When profile feedback is available (see `-fprofile-generate')
+          the actual recursion depth can be guessed from probability
+          that function will recurse via given call expression.  This
+          parameter limits inlining only to call expression whose
+          probability exceeds given threshold (in percents).  The
+          default value is 10.
+
+    `early-inlining-insns'
+          Specify growth that early inliner can make.  In effect it
+          increases amount of inlining for code having large
+          abstraction penalty.  The default value is 8.
+
+    `max-early-inliner-iterations'
+    `max-early-inliner-iterations'
+          Limit of iterations of early inliner.  This basically bounds
+          number of nested indirect calls early inliner can resolve.
+          Deeper chains are still handled by late inlining.
+
+    `min-vect-loop-bound'
+          The minimum number of iterations under which a loop will not
+          get vectorized when `-ftree-vectorize' is used.  The number
+          of iterations after vectorization needs to be greater than
+          the value specified by this option to allow vectorization.
+          The default value is 0.
+
+    `max-unrolled-insns'
+          The maximum number of instructions that a loop should have if
+          that loop is unrolled, and if the loop is unrolled, it
+          determines how many times the loop code is unrolled.
+
+    `max-average-unrolled-insns'
+          The maximum number of instructions biased by probabilities of
+          their execution that a loop should have if that loop is
+          unrolled, and if the loop is unrolled, it determines how many
+          times the loop code is unrolled.
+
+    `max-unroll-times'
+          The maximum number of unrollings of a single loop.
+
+    `max-peeled-insns'
+          The maximum number of instructions that a loop should have if
+          that loop is peeled, and if the loop is peeled, it determines
+          how many times the loop code is peeled.
+
+    `max-peel-times'
+          The maximum number of peelings of a single loop.
+
+    `max-completely-peeled-insns'
+          The maximum number of insns of a completely peeled loop.
+
+    `max-completely-peel-times'
+          The maximum number of iterations of a loop to be suitable for
+          complete peeling.
+
+    `max-completely-peel-loop-nest-depth'
+          The maximum depth of a loop nest suitable for complete
+          peeling.
+
+    `max-unswitch-insns'
+          The maximum number of insns of an unswitched loop.
+
+    `max-unswitch-level'
+          The maximum number of branches unswitched in a single loop.
+
+    `lim-expensive'
+          The minimum cost of an expensive expression in the loop
+          invariant motion.
+
+    `iv-consider-all-candidates-bound'
+          Bound on number of candidates for induction variables below
+          that all candidates are considered for each use in induction
+          variable optimizations.  Only the most relevant candidates
+          are considered if there are more candidates, to avoid
+          quadratic time complexity.
+
+    `iv-max-considered-uses'
+          The induction variable optimizations give up on loops that
+          contain more induction variable uses.
+
+    `iv-always-prune-cand-set-bound'
+          If number of candidates in the set is smaller than this value,
+          we always try to remove unnecessary ivs from the set during
+          its optimization when a new iv is added to the set.
+
+    `scev-max-expr-size'
+          Bound on size of expressions used in the scalar evolutions
+          analyzer.  Large expressions slow the analyzer.
+
+    `omega-max-vars'
+          The maximum number of variables in an Omega constraint system.
+          The default value is 128.
+
+    `omega-max-geqs'
+          The maximum number of inequalities in an Omega constraint
+          system.  The default value is 256.
+
+    `omega-max-eqs'
+          The maximum number of equalities in an Omega constraint
+          system.  The default value is 128.
+
+    `omega-max-wild-cards'
+          The maximum number of wildcard variables that the Omega
+          solver will be able to insert.  The default value is 18.
+
+    `omega-hash-table-size'
+          The size of the hash table in the Omega solver.  The default
+          value is 550.
+
+    `omega-max-keys'
+          The maximal number of keys used by the Omega solver.  The
+          default value is 500.
+
+    `omega-eliminate-redundant-constraints'
+          When set to 1, use expensive methods to eliminate all
+          redundant constraints.  The default value is 0.
+
+    `vect-max-version-for-alignment-checks'
+          The maximum number of runtime checks that can be performed
+          when doing loop versioning for alignment in the vectorizer.
+          See option ftree-vect-loop-version for more information.
+
+    `vect-max-version-for-alias-checks'
+          The maximum number of runtime checks that can be performed
+          when doing loop versioning for alias in the vectorizer.  See
+          option ftree-vect-loop-version for more information.
+
+    `max-iterations-to-track'
+          The maximum number of iterations of a loop the brute force
+          algorithm for analysis of # of iterations of the loop tries
+          to evaluate.
+
+    `hot-bb-count-fraction'
+          Select fraction of the maximal count of repetitions of basic
+          block in program given basic block needs to have to be
+          considered hot.
+
+    `hot-bb-frequency-fraction'
+          Select fraction of the maximal frequency of executions of
+          basic block in function given basic block needs to have to be
+          considered hot
+
+    `max-predicted-iterations'
+          The maximum number of loop iterations we predict statically.
+          This is useful in cases where function contain single loop
+          with known bound and other loop with unknown.  We predict the
+          known number of iterations correctly, while the unknown
+          number of iterations average to roughly 10.  This means that
+          the loop without bounds would appear artificially cold
+          relative to the other one.
+
+    `align-threshold'
+          Select fraction of the maximal frequency of executions of
+          basic block in function given basic block will get aligned.
+
+    `align-loop-iterations'
+          A loop expected to iterate at lest the selected number of
+          iterations will get aligned.
+
+    `tracer-dynamic-coverage'
+    `tracer-dynamic-coverage-feedback'
+          This value is used to limit superblock formation once the
+          given percentage of executed instructions is covered.  This
+          limits unnecessary code size expansion.
+
+          The `tracer-dynamic-coverage-feedback' is used only when
+          profile feedback is available.  The real profiles (as opposed
+          to statically estimated ones) are much less balanced allowing
+          the threshold to be larger value.
+
+    `tracer-max-code-growth'
+          Stop tail duplication once code growth has reached given
+          percentage.  This is rather hokey argument, as most of the
+          duplicates will be eliminated later in cross jumping, so it
+          may be set to much higher values than is the desired code
+          growth.
+
+    `tracer-min-branch-ratio'
+          Stop reverse growth when the reverse probability of best edge
+          is less than this threshold (in percent).
+
+    `tracer-min-branch-ratio'
+    `tracer-min-branch-ratio-feedback'
+          Stop forward growth if the best edge do have probability
+          lower than this threshold.
+
+          Similarly to `tracer-dynamic-coverage' two values are
+          present, one for compilation for profile feedback and one for
+          compilation without.  The value for compilation with profile
+          feedback needs to be more conservative (higher) in order to
+          make tracer effective.
+
+    `max-cse-path-length'
+          Maximum number of basic blocks on path that cse considers.
+          The default is 10.
+
+    `max-cse-insns'
+          The maximum instructions CSE process before flushing. The
+          default is 1000.
+
+    `ggc-min-expand'
+          GCC uses a garbage collector to manage its own memory
+          allocation.  This parameter specifies the minimum percentage
+          by which the garbage collector's heap should be allowed to
+          expand between collections.  Tuning this may improve
+          compilation speed; it has no effect on code generation.
+
+          The default is 30% + 70% * (RAM/1GB) with an upper bound of
+          100% when RAM >= 1GB.  If `getrlimit' is available, the
+          notion of "RAM" is the smallest of actual RAM and
+          `RLIMIT_DATA' or `RLIMIT_AS'.  If GCC is not able to
+          calculate RAM on a particular platform, the lower bound of
+          30% is used.  Setting this parameter and `ggc-min-heapsize'
+          to zero causes a full collection to occur at every
+          opportunity.  This is extremely slow, but can be useful for
+          debugging.
+
+    `ggc-min-heapsize'
+          Minimum size of the garbage collector's heap before it begins
+          bothering to collect garbage.  The first collection occurs
+          after the heap expands by `ggc-min-expand'% beyond
+          `ggc-min-heapsize'.  Again, tuning this may improve
+          compilation speed, and has no effect on code generation.
+
+          The default is the smaller of RAM/8, RLIMIT_RSS, or a limit
+          which tries to ensure that RLIMIT_DATA or RLIMIT_AS are not
+          exceeded, but with a lower bound of 4096 (four megabytes) and
+          an upper bound of 131072 (128 megabytes).  If GCC is not able
+          to calculate RAM on a particular platform, the lower bound is
+          used.  Setting this parameter very large effectively disables
+          garbage collection.  Setting this parameter and
+          `ggc-min-expand' to zero causes a full collection to occur at
+          every opportunity.
+
+    `max-reload-search-insns'
+          The maximum number of instruction reload should look backward
+          for equivalent register.  Increasing values mean more
+          aggressive optimization, making the compile time increase
+          with probably slightly better performance.  The default value
+          is 100.
+
+    `max-cselib-memory-locations'
+          The maximum number of memory locations cselib should take
+          into account.  Increasing values mean more aggressive
+          optimization, making the compile time increase with probably
+          slightly better performance.  The default value is 500.
+
+    `reorder-blocks-duplicate'
+    `reorder-blocks-duplicate-feedback'
+          Used by basic block reordering pass to decide whether to use
+          unconditional branch or duplicate the code on its
+          destination.  Code is duplicated when its estimated size is
+          smaller than this value multiplied by the estimated size of
+          unconditional jump in the hot spots of the program.
+
+          The `reorder-block-duplicate-feedback' is used only when
+          profile feedback is available and may be set to higher values
+          than `reorder-block-duplicate' since information about the
+          hot spots is more accurate.
+
+    `max-sched-ready-insns'
+          The maximum number of instructions ready to be issued the
+          scheduler should consider at any given time during the first
+          scheduling pass.  Increasing values mean more thorough
+          searches, making the compilation time increase with probably
+          little benefit.  The default value is 100.
+
+    `max-sched-region-blocks'
+          The maximum number of blocks in a region to be considered for
+          interblock scheduling.  The default value is 10.
+
+    `max-pipeline-region-blocks'
+          The maximum number of blocks in a region to be considered for
+          pipelining in the selective scheduler.  The default value is
+          15.
+
+    `max-sched-region-insns'
+          The maximum number of insns in a region to be considered for
+          interblock scheduling.  The default value is 100.
+
+    `max-pipeline-region-insns'
+          The maximum number of insns in a region to be considered for
+          pipelining in the selective scheduler.  The default value is
+          200.
+
+    `min-spec-prob'
+          The minimum probability (in percents) of reaching a source
+          block for interblock speculative scheduling.  The default
+          value is 40.
+
+    `max-sched-extend-regions-iters'
+          The maximum number of iterations through CFG to extend
+          regions.  0 - disable region extension, N - do at most N
+          iterations.  The default value is 0.
+
+    `max-sched-insn-conflict-delay'
+          The maximum conflict delay for an insn to be considered for
+          speculative motion.  The default value is 3.
+
+    `sched-spec-prob-cutoff'
+          The minimal probability of speculation success (in percents),
+          so that speculative insn will be scheduled.  The default
+          value is 40.
+
+    `sched-mem-true-dep-cost'
+          Minimal distance (in CPU cycles) between store and load
+          targeting same memory locations.  The default value is 1.
+
+    `selsched-max-lookahead'
+          The maximum size of the lookahead window of selective
+          scheduling.  It is a depth of search for available
+          instructions.  The default value is 50.
+
+    `selsched-max-sched-times'
+          The maximum number of times that an instruction will be
+          scheduled during selective scheduling.  This is the limit on
+          the number of iterations through which the instruction may be
+          pipelined.  The default value is 2.
+
+    `selsched-max-insns-to-rename'
+          The maximum number of best instructions in the ready list
+          that are considered for renaming in the selective scheduler.
+          The default value is 2.
+
+    `max-last-value-rtl'
+          The maximum size measured as number of RTLs that can be
+          recorded in an expression in combiner for a pseudo register
+          as last known value of that register.  The default is 10000.
+
+    `integer-share-limit'
+          Small integer constants can use a shared data structure,
+          reducing the compiler's memory usage and increasing its
+          speed.  This sets the maximum value of a shared integer
+          constant.  The default value is 256.
+
+    `min-virtual-mappings'
+          Specifies the minimum number of virtual mappings in the
+          incremental SSA updater that should be registered to trigger
+          the virtual mappings heuristic defined by
+          virtual-mappings-ratio.  The default value is 100.
+
+    `virtual-mappings-ratio'
+          If the number of virtual mappings is virtual-mappings-ratio
+          bigger than the number of virtual symbols to be updated, then
+          the incremental SSA updater switches to a full update for
+          those symbols.  The default ratio is 3.
+
+    `ssp-buffer-size'
+          The minimum size of buffers (i.e. arrays) that will receive
+          stack smashing protection when `-fstack-protection' is used.
+
+    `max-jump-thread-duplication-stmts'
+          Maximum number of statements allowed in a block that needs to
+          be duplicated when threading jumps.
+
+    `max-fields-for-field-sensitive'
+          Maximum number of fields in a structure we will treat in a
+          field sensitive manner during pointer analysis.  The default
+          is zero for -O0, and -O1 and 100 for -Os, -O2, and -O3.
+
+    `prefetch-latency'
+          Estimate on average number of instructions that are executed
+          before prefetch finishes.  The distance we prefetch ahead is
+          proportional to this constant.  Increasing this number may
+          also lead to less streams being prefetched (see
+          `simultaneous-prefetches').
+
+    `simultaneous-prefetches'
+          Maximum number of prefetches that can run at the same time.
+
+    `l1-cache-line-size'
+          The size of cache line in L1 cache, in bytes.
+
+    `l1-cache-size'
+          The size of L1 cache, in kilobytes.
+
+    `l2-cache-size'
+          The size of L2 cache, in kilobytes.
+
+    `min-insn-to-prefetch-ratio'
+          The minimum ratio between the number of instructions and the
+          number of prefetches to enable prefetching in a loop with an
+          unknown trip count.
+
+    `prefetch-min-insn-to-mem-ratio'
+          The minimum ratio between the number of instructions and the
+          number of memory references to enable prefetching in a loop.
+
+    `use-canonical-types'
+          Whether the compiler should use the "canonical" type system.
+          By default, this should always be 1, which uses a more
+          efficient internal mechanism for comparing types in C++ and
+          Objective-C++.  However, if bugs in the canonical type system
+          are causing compilation failures, set this value to 0 to
+          disable canonical types.
+
+    `switch-conversion-max-branch-ratio'
+          Switch initialization conversion will refuse to create arrays
+          that are bigger than `switch-conversion-max-branch-ratio'
+          times the number of branches in the switch.
+
+    `max-partial-antic-length'
+          Maximum length of the partial antic set computed during the
+          tree partial redundancy elimination optimization
+          (`-ftree-pre') when optimizing at `-O3' and above.  For some
+          sorts of source code the enhanced partial redundancy
+          elimination optimization can run away, consuming all of the
+          memory available on the host machine.  This parameter sets a
+          limit on the length of the sets that are computed, which
+          prevents the runaway behavior.  Setting a value of 0 for this
+          parameter will allow an unlimited set length.
+
+    `sccvn-max-scc-size'
+          Maximum size of a strongly connected component (SCC) during
+          SCCVN processing.  If this limit is hit, SCCVN processing for
+          the whole function will not be done and optimizations
+          depending on it will be disabled.  The default maximum SCC
+          size is 10000.
+
+    `ira-max-loops-num'
+          IRA uses a regional register allocation by default.  If a
+          function contains loops more than number given by the
+          parameter, only at most given number of the most frequently
+          executed loops will form regions for the regional register
+          allocation.  The default value of the parameter is 100.
+
+    `ira-max-conflict-table-size'
+          Although IRA uses a sophisticated algorithm of compression
+          conflict table, the table can be still big for huge
+          functions.  If the conflict table for a function could be
+          more than size in MB given by the parameter, the conflict
+          table is not built and faster, simpler, and lower quality
+          register allocation algorithm will be used.  The algorithm do
+          not use pseudo-register conflicts.  The default value of the
+          parameter is 2000.
+
+    `ira-loop-reserved-regs'
+          IRA can be used to evaluate more accurate register pressure
+          in loops for decision to move loop invariants (see `-O3').
+          The number of available registers reserved for some other
+          purposes is described by this parameter.  The default value
+          of the parameter is 2 which is minimal number of registers
+          needed for execution of typical instruction.  This value is
+          the best found from numerous experiments.
+
+    `loop-invariant-max-bbs-in-loop'
+          Loop invariant motion can be very expensive, both in compile
+          time and in amount of needed compile time memory, with very
+          large loops.  Loops with more basic blocks than this
+          parameter won't have loop invariant motion optimization
+          performed on them.  The default value of the parameter is
+          1000 for -O1 and 10000 for -O2 and above.
+
+    `max-vartrack-size'
+          Sets a maximum number of hash table slots to use during
+          variable tracking dataflow analysis of any function.  If this
+          limit is exceeded with variable tracking at assignments
+          enabled, analysis for that function is retried without it,
+          after removing all debug insns from the function.  If the
+          limit is exceeded even without debug insns, var tracking
+          analysis is completely disabled for the function.  Setting
+          the parameter to zero makes it unlimited.
+
+    `min-nondebug-insn-uid'
+          Use uids starting at this parameter for nondebug insns.  The
+          range below the parameter is reserved exclusively for debug
+          insns created by `-fvar-tracking-assignments', but debug
+          insns may get (non-overlapping) uids above it if the reserved
+          range is exhausted.
+
+    `ipa-sra-ptr-growth-factor'
+          IPA-SRA will replace a pointer to an aggregate with one or
+          more new parameters only when their cumulative size is less
+          or equal to `ipa-sra-ptr-growth-factor' times the size of the
+          original pointer parameter.
+
+    `graphite-max-nb-scop-params'
+          To avoid exponential effects in the Graphite loop transforms,
+          the number of parameters in a Static Control Part (SCoP) is
+          bounded.  The default value is 10 parameters.  A variable
+          whose value is unknown at compile time and defined outside a
+          SCoP is a parameter of the SCoP.
+
+    `graphite-max-bbs-per-function'
+          To avoid exponential effects in the detection of SCoPs, the
+          size of the functions analyzed by Graphite is bounded.  The
+          default value is 100 basic blocks.
+
+    `loop-block-tile-size'
+          Loop blocking or strip mining transforms, enabled with
+          `-floop-block' or `-floop-strip-mine', strip mine each loop
+          in the loop nest by a given number of iterations.  The strip
+          length can be changed using the `loop-block-tile-size'
+          parameter.  The default value is 51 iterations.
+
+
+
+File: gcc.info,  Node: Preprocessor Options,  Next: Assembler Options,  Prev: Optimize Options,  Up: Invoking GCC
+
+3.11 Options Controlling the Preprocessor
+=========================================
+
+These options control the C preprocessor, which is run on each C source
+file before actual compilation.
+
+ If you use the `-E' option, nothing is done except preprocessing.
+Some of these options make sense only together with `-E' because they
+cause the preprocessor output to be unsuitable for actual compilation.
+
+`-Wp,OPTION'
+     You can use `-Wp,OPTION' to bypass the compiler driver and pass
+     OPTION directly through to the preprocessor.  If OPTION contains
+     commas, it is split into multiple options at the commas.  However,
+     many options are modified, translated or interpreted by the
+     compiler driver before being passed to the preprocessor, and `-Wp'
+     forcibly bypasses this phase.  The preprocessor's direct interface
+     is undocumented and subject to change, so whenever possible you
+     should avoid using `-Wp' and let the driver handle the options
+     instead.
+
+`-Xpreprocessor OPTION'
+     Pass OPTION as an option to the preprocessor.  You can use this to
+     supply system-specific preprocessor options which GCC does not
+     know how to recognize.
+
+     If you want to pass an option that takes an argument, you must use
+     `-Xpreprocessor' twice, once for the option and once for the
+     argument.
+
+`-D NAME'
+     Predefine NAME as a macro, with definition `1'.
+
+`-D NAME=DEFINITION'
+     The contents of DEFINITION are tokenized and processed as if they
+     appeared during translation phase three in a `#define' directive.
+     In particular, the definition will be truncated by embedded
+     newline characters.
+
+     If you are invoking the preprocessor from a shell or shell-like
+     program you may need to use the shell's quoting syntax to protect
+     characters such as spaces that have a meaning in the shell syntax.
+
+     If you wish to define a function-like macro on the command line,
+     write its argument list with surrounding parentheses before the
+     equals sign (if any).  Parentheses are meaningful to most shells,
+     so you will need to quote the option.  With `sh' and `csh',
+     `-D'NAME(ARGS...)=DEFINITION'' works.
+
+     `-D' and `-U' options are processed in the order they are given on
+     the command line.  All `-imacros FILE' and `-include FILE' options
+     are processed after all `-D' and `-U' options.
+
+`-U NAME'
+     Cancel any previous definition of NAME, either built in or
+     provided with a `-D' option.
+
+`-undef'
+     Do not predefine any system-specific or GCC-specific macros.  The
+     standard predefined macros remain defined.
+
+`-I DIR'
+     Add the directory DIR to the list of directories to be searched
+     for header files.  Directories named by `-I' are searched before
+     the standard system include directories.  If the directory DIR is
+     a standard system include directory, the option is ignored to
+     ensure that the default search order for system directories and
+     the special treatment of system headers are not defeated .  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-o FILE'
+     Write output to FILE.  This is the same as specifying FILE as the
+     second non-option argument to `cpp'.  `gcc' has a different
+     interpretation of a second non-option argument, so you must use
+     `-o' to specify the output file.
+
+`-Wall'
+     Turns on all optional warnings which are desirable for normal code.
+     At present this is `-Wcomment', `-Wtrigraphs', `-Wmultichar' and a
+     warning about integer promotion causing a change of sign in `#if'
+     expressions.  Note that many of the preprocessor's warnings are on
+     by default and have no options to control them.
+
+`-Wcomment'
+`-Wcomments'
+     Warn whenever a comment-start sequence `/*' appears in a `/*'
+     comment, or whenever a backslash-newline appears in a `//' comment.
+     (Both forms have the same effect.)
+
+`-Wtrigraphs'
+     Most trigraphs in comments cannot affect the meaning of the
+     program.  However, a trigraph that would form an escaped newline
+     (`??/' at the end of a line) can, by changing where the comment
+     begins or ends.  Therefore, only trigraphs that would form escaped
+     newlines produce warnings inside a comment.
+
+     This option is implied by `-Wall'.  If `-Wall' is not given, this
+     option is still enabled unless trigraphs are enabled.  To get
+     trigraph conversion without warnings, but get the other `-Wall'
+     warnings, use `-trigraphs -Wall -Wno-trigraphs'.
+
+`-Wtraditional'
+     Warn about certain constructs that behave differently in
+     traditional and ISO C.  Also warn about ISO C constructs that have
+     no traditional C equivalent, and problematic constructs which
+     should be avoided.
+
+`-Wundef'
+     Warn whenever an identifier which is not a macro is encountered in
+     an `#if' directive, outside of `defined'.  Such identifiers are
+     replaced with zero.
+
+`-Wunused-macros'
+     Warn about macros defined in the main file that are unused.  A
+     macro is "used" if it is expanded or tested for existence at least
+     once.  The preprocessor will also warn if the macro has not been
+     used at the time it is redefined or undefined.
+
+     Built-in macros, macros defined on the command line, and macros
+     defined in include files are not warned about.
+
+     _Note:_ If a macro is actually used, but only used in skipped
+     conditional blocks, then CPP will report it as unused.  To avoid
+     the warning in such a case, you might improve the scope of the
+     macro's definition by, for example, moving it into the first
+     skipped block.  Alternatively, you could provide a dummy use with
+     something like:
+
+          #if defined the_macro_causing_the_warning
+          #endif
+
+`-Wendif-labels'
+     Warn whenever an `#else' or an `#endif' are followed by text.
+     This usually happens in code of the form
+
+          #if FOO
+          ...
+          #else FOO
+          ...
+          #endif FOO
+
+     The second and third `FOO' should be in comments, but often are not
+     in older programs.  This warning is on by default.
+
+`-Werror'
+     Make all warnings into hard errors.  Source code which triggers
+     warnings will be rejected.
+
+`-Wsystem-headers'
+     Issue warnings for code in system headers.  These are normally
+     unhelpful in finding bugs in your own code, therefore suppressed.
+     If you are responsible for the system library, you may want to see
+     them.
+
+`-w'
+     Suppress all warnings, including those which GNU CPP issues by
+     default.
+
+`-pedantic'
+     Issue all the mandatory diagnostics listed in the C standard.
+     Some of them are left out by default, since they trigger
+     frequently on harmless code.
+
+`-pedantic-errors'
+     Issue all the mandatory diagnostics, and make all mandatory
+     diagnostics into errors.  This includes mandatory diagnostics that
+     GCC issues without `-pedantic' but treats as warnings.
+
+`-M'
+     Instead of outputting the result of preprocessing, output a rule
+     suitable for `make' describing the dependencies of the main source
+     file.  The preprocessor outputs one `make' rule containing the
+     object file name for that source file, a colon, and the names of
+     all the included files, including those coming from `-include' or
+     `-imacros' command line options.
+
+     Unless specified explicitly (with `-MT' or `-MQ'), the object file
+     name consists of the name of the source file with any suffix
+     replaced with object file suffix and with any leading directory
+     parts removed.  If there are many included files then the rule is
+     split into several lines using `\'-newline.  The rule has no
+     commands.
+
+     This option does not suppress the preprocessor's debug output,
+     such as `-dM'.  To avoid mixing such debug output with the
+     dependency rules you should explicitly specify the dependency
+     output file with `-MF', or use an environment variable like
+     `DEPENDENCIES_OUTPUT' (*note Environment Variables::).  Debug
+     output will still be sent to the regular output stream as normal.
+
+     Passing `-M' to the driver implies `-E', and suppresses warnings
+     with an implicit `-w'.
+
+`-MM'
+     Like `-M' but do not mention header files that are found in system
+     header directories, nor header files that are included, directly
+     or indirectly, from such a header.
+
+     This implies that the choice of angle brackets or double quotes in
+     an `#include' directive does not in itself determine whether that
+     header will appear in `-MM' dependency output.  This is a slight
+     change in semantics from GCC versions 3.0 and earlier.
+
+`-MF FILE'
+     When used with `-M' or `-MM', specifies a file to write the
+     dependencies to.  If no `-MF' switch is given the preprocessor
+     sends the rules to the same place it would have sent preprocessed
+     output.
+
+     When used with the driver options `-MD' or `-MMD', `-MF' overrides
+     the default dependency output file.
+
+`-MG'
+     In conjunction with an option such as `-M' requesting dependency
+     generation, `-MG' assumes missing header files are generated files
+     and adds them to the dependency list without raising an error.
+     The dependency filename is taken directly from the `#include'
+     directive without prepending any path.  `-MG' also suppresses
+     preprocessed output, as a missing header file renders this useless.
+
+     This feature is used in automatic updating of makefiles.
+
+`-MP'
+     This option instructs CPP to add a phony target for each dependency
+     other than the main file, causing each to depend on nothing.  These
+     dummy rules work around errors `make' gives if you remove header
+     files without updating the `Makefile' to match.
+
+     This is typical output:
+
+          test.o: test.c test.h
+
+          test.h:
+
+`-MT TARGET'
+     Change the target of the rule emitted by dependency generation.  By
+     default CPP takes the name of the main input file, deletes any
+     directory components and any file suffix such as `.c', and appends
+     the platform's usual object suffix.  The result is the target.
+
+     An `-MT' option will set the target to be exactly the string you
+     specify.  If you want multiple targets, you can specify them as a
+     single argument to `-MT', or use multiple `-MT' options.
+
+     For example, `-MT '$(objpfx)foo.o'' might give
+
+          $(objpfx)foo.o: foo.c
+
+`-MQ TARGET'
+     Same as `-MT', but it quotes any characters which are special to
+     Make.  `-MQ '$(objpfx)foo.o'' gives
+
+          $$(objpfx)foo.o: foo.c
+
+     The default target is automatically quoted, as if it were given
+     with `-MQ'.
+
+`-MD'
+     `-MD' is equivalent to `-M -MF FILE', except that `-E' is not
+     implied.  The driver determines FILE based on whether an `-o'
+     option is given.  If it is, the driver uses its argument but with
+     a suffix of `.d', otherwise it takes the name of the input file,
+     removes any directory components and suffix, and applies a `.d'
+     suffix.
+
+     If `-MD' is used in conjunction with `-E', any `-o' switch is
+     understood to specify the dependency output file (*note -MF:
+     dashMF.), but if used without `-E', each `-o' is understood to
+     specify a target object file.
+
+     Since `-E' is not implied, `-MD' can be used to generate a
+     dependency output file as a side-effect of the compilation process.
+
+`-MMD'
+     Like `-MD' except mention only user header files, not system
+     header files.
+
+`-fpch-deps'
+     When using precompiled headers (*note Precompiled Headers::), this
+     flag will cause the dependency-output flags to also list the files
+     from the precompiled header's dependencies.  If not specified only
+     the precompiled header would be listed and not the files that were
+     used to create it because those files are not consulted when a
+     precompiled header is used.
+
+`-fpch-preprocess'
+     This option allows use of a precompiled header (*note Precompiled
+     Headers::) together with `-E'.  It inserts a special `#pragma',
+     `#pragma GCC pch_preprocess "<filename>"' in the output to mark
+     the place where the precompiled header was found, and its
+     filename.  When `-fpreprocessed' is in use, GCC recognizes this
+     `#pragma' and loads the PCH.
+
+     This option is off by default, because the resulting preprocessed
+     output is only really suitable as input to GCC.  It is switched on
+     by `-save-temps'.
+
+     You should not write this `#pragma' in your own code, but it is
+     safe to edit the filename if the PCH file is available in a
+     different location.  The filename may be absolute or it may be
+     relative to GCC's current directory.
+
+`-x c'
+`-x c++'
+`-x objective-c'
+`-x assembler-with-cpp'
+     Specify the source language: C, C++, Objective-C, or assembly.
+     This has nothing to do with standards conformance or extensions;
+     it merely selects which base syntax to expect.  If you give none
+     of these options, cpp will deduce the language from the extension
+     of the source file: `.c', `.cc', `.m', or `.S'.  Some other common
+     extensions for C++ and assembly are also recognized.  If cpp does
+     not recognize the extension, it will treat the file as C; this is
+     the most generic mode.
+
+     _Note:_ Previous versions of cpp accepted a `-lang' option which
+     selected both the language and the standards conformance level.
+     This option has been removed, because it conflicts with the `-l'
+     option.
+
+`-std=STANDARD'
+`-ansi'
+     Specify the standard to which the code should conform.  Currently
+     CPP knows about C and C++ standards; others may be added in the
+     future.
+
+     STANDARD may be one of:
+    `c90'
+    `c89'
+    `iso9899:1990'
+          The ISO C standard from 1990.  `c90' is the customary
+          shorthand for this version of the standard.
+
+          The `-ansi' option is equivalent to `-std=c90'.
+
+    `iso9899:199409'
+          The 1990 C standard, as amended in 1994.
+
+    `iso9899:1999'
+    `c99'
+    `iso9899:199x'
+    `c9x'
+          The revised ISO C standard, published in December 1999.
+          Before publication, this was known as C9X.
+
+    `gnu90'
+    `gnu89'
+          The 1990 C standard plus GNU extensions.  This is the default.
+
+    `gnu99'
+    `gnu9x'
+          The 1999 C standard plus GNU extensions.
+
+    `c++98'
+          The 1998 ISO C++ standard plus amendments.
+
+    `gnu++98'
+          The same as `-std=c++98' plus GNU extensions.  This is the
+          default for C++ code.
+
+`-I-'
+     Split the include path.  Any directories specified with `-I'
+     options before `-I-' are searched only for headers requested with
+     `#include "FILE"'; they are not searched for `#include <FILE>'.
+     If additional directories are specified with `-I' options after
+     the `-I-', those directories are searched for all `#include'
+     directives.
+
+     In addition, `-I-' inhibits the use of the directory of the current
+     file directory as the first search directory for `#include "FILE"'.
+     This option has been deprecated.
+
+`-nostdinc'
+     Do not search the standard system directories for header files.
+     Only the directories you have specified with `-I' options (and the
+     directory of the current file, if appropriate) are searched.
+
+`-nostdinc++'
+     Do not search for header files in the C++-specific standard
+     directories, but do still search the other standard directories.
+     (This option is used when building the C++ library.)
+
+`-include FILE'
+     Process FILE as if `#include "file"' appeared as the first line of
+     the primary source file.  However, the first directory searched
+     for FILE is the preprocessor's working directory _instead of_ the
+     directory containing the main source file.  If not found there, it
+     is searched for in the remainder of the `#include "..."' search
+     chain as normal.
+
+     If multiple `-include' options are given, the files are included
+     in the order they appear on the command line.
+
+`-imacros FILE'
+     Exactly like `-include', except that any output produced by
+     scanning FILE is thrown away.  Macros it defines remain defined.
+     This allows you to acquire all the macros from a header without
+     also processing its declarations.
+
+     All files specified by `-imacros' are processed before all files
+     specified by `-include'.
+
+`-idirafter DIR'
+     Search DIR for header files, but do it _after_ all directories
+     specified with `-I' and the standard system directories have been
+     exhausted.  DIR is treated as a system include directory.  If DIR
+     begins with `=', then the `=' will be replaced by the sysroot
+     prefix; see `--sysroot' and `-isysroot'.
+
+`-iprefix PREFIX'
+     Specify PREFIX as the prefix for subsequent `-iwithprefix'
+     options.  If the prefix represents a directory, you should include
+     the final `/'.
+
+`-iwithprefix DIR'
+`-iwithprefixbefore DIR'
+     Append DIR to the prefix specified previously with `-iprefix', and
+     add the resulting directory to the include search path.
+     `-iwithprefixbefore' puts it in the same place `-I' would;
+     `-iwithprefix' puts it where `-idirafter' would.
+
+`-isysroot DIR'
+     This option is like the `--sysroot' option, but applies only to
+     header files.  See the `--sysroot' option for more information.
+
+`-imultilib DIR'
+     Use DIR as a subdirectory of the directory containing
+     target-specific C++ headers.
+
+`-isystem DIR'
+     Search DIR for header files, after all directories specified by
+     `-I' but before the standard system directories.  Mark it as a
+     system directory, so that it gets the same special treatment as is
+     applied to the standard system directories.  If DIR begins with
+     `=', then the `=' will be replaced by the sysroot prefix; see
+     `--sysroot' and `-isysroot'.
+
+`-iquote DIR'
+     Search DIR only for header files requested with `#include "FILE"';
+     they are not searched for `#include <FILE>', before all
+     directories specified by `-I' and before the standard system
+     directories.  If DIR begins with `=', then the `=' will be replaced
+     by the sysroot prefix; see `--sysroot' and `-isysroot'.
+
+`-fdirectives-only'
+     When preprocessing, handle directives, but do not expand macros.
+
+     The option's behavior depends on the `-E' and `-fpreprocessed'
+     options.
+
+     With `-E', preprocessing is limited to the handling of directives
+     such as `#define', `#ifdef', and `#error'.  Other preprocessor
+     operations, such as macro expansion and trigraph conversion are
+     not performed.  In addition, the `-dD' option is implicitly
+     enabled.
+
+     With `-fpreprocessed', predefinition of command line and most
+     builtin macros is disabled.  Macros such as `__LINE__', which are
+     contextually dependent, are handled normally.  This enables
+     compilation of files previously preprocessed with `-E
+     -fdirectives-only'.
+
+     With both `-E' and `-fpreprocessed', the rules for
+     `-fpreprocessed' take precedence.  This enables full preprocessing
+     of files previously preprocessed with `-E -fdirectives-only'.
+
+`-fdollars-in-identifiers'
+     Accept `$' in identifiers.
+
+`-fextended-identifiers'
+     Accept universal character names in identifiers.  This option is
+     experimental; in a future version of GCC, it will be enabled by
+     default for C99 and C++.
+
+`-fpreprocessed'
+     Indicate to the preprocessor that the input file has already been
+     preprocessed.  This suppresses things like macro expansion,
+     trigraph conversion, escaped newline splicing, and processing of
+     most directives.  The preprocessor still recognizes and removes
+     comments, so that you can pass a file preprocessed with `-C' to
+     the compiler without problems.  In this mode the integrated
+     preprocessor is little more than a tokenizer for the front ends.
+
+     `-fpreprocessed' is implicit if the input file has one of the
+     extensions `.i', `.ii' or `.mi'.  These are the extensions that
+     GCC uses for preprocessed files created by `-save-temps'.
+
+`-ftabstop=WIDTH'
+     Set the distance between tab stops.  This helps the preprocessor
+     report correct column numbers in warnings or errors, even if tabs
+     appear on the line.  If the value is less than 1 or greater than
+     100, the option is ignored.  The default is 8.
+
+`-fexec-charset=CHARSET'
+     Set the execution character set, used for string and character
+     constants.  The default is UTF-8.  CHARSET can be any encoding
+     supported by the system's `iconv' library routine.
+
+`-fwide-exec-charset=CHARSET'
+     Set the wide execution character set, used for wide string and
+     character constants.  The default is UTF-32 or UTF-16, whichever
+     corresponds to the width of `wchar_t'.  As with `-fexec-charset',
+     CHARSET can be any encoding supported by the system's `iconv'
+     library routine; however, you will have problems with encodings
+     that do not fit exactly in `wchar_t'.
+
+`-finput-charset=CHARSET'
+     Set the input character set, used for translation from the
+     character set of the input file to the source character set used
+     by GCC.  If the locale does not specify, or GCC cannot get this
+     information from the locale, the default is UTF-8.  This can be
+     overridden by either the locale or this command line option.
+     Currently the command line option takes precedence if there's a
+     conflict.  CHARSET can be any encoding supported by the system's
+     `iconv' library routine.
+
+`-fworking-directory'
+     Enable generation of linemarkers in the preprocessor output that
+     will let the compiler know the current working directory at the
+     time of preprocessing.  When this option is enabled, the
+     preprocessor will emit, after the initial linemarker, a second
+     linemarker with the current working directory followed by two
+     slashes.  GCC will use this directory, when it's present in the
+     preprocessed input, as the directory emitted as the current
+     working directory in some debugging information formats.  This
+     option is implicitly enabled if debugging information is enabled,
+     but this can be inhibited with the negated form
+     `-fno-working-directory'.  If the `-P' flag is present in the
+     command line, this option has no effect, since no `#line'
+     directives are emitted whatsoever.
+
+`-fno-show-column'
+     Do not print column numbers in diagnostics.  This may be necessary
+     if diagnostics are being scanned by a program that does not
+     understand the column numbers, such as `dejagnu'.
+
+`-A PREDICATE=ANSWER'
+     Make an assertion with the predicate PREDICATE and answer ANSWER.
+     This form is preferred to the older form `-A PREDICATE(ANSWER)',
+     which is still supported, because it does not use shell special
+     characters.
+
+`-A -PREDICATE=ANSWER'
+     Cancel an assertion with the predicate PREDICATE and answer ANSWER.
+
+`-dCHARS'
+     CHARS is a sequence of one or more of the following characters,
+     and must not be preceded by a space.  Other characters are
+     interpreted by the compiler proper, or reserved for future
+     versions of GCC, and so are silently ignored.  If you specify
+     characters whose behavior conflicts, the result is undefined.
+
+    `M'
+          Instead of the normal output, generate a list of `#define'
+          directives for all the macros defined during the execution of
+          the preprocessor, including predefined macros.  This gives
+          you a way of finding out what is predefined in your version
+          of the preprocessor.  Assuming you have no file `foo.h', the
+          command
+
+               touch foo.h; cpp -dM foo.h
+
+          will show all the predefined macros.
+
+          If you use `-dM' without the `-E' option, `-dM' is
+          interpreted as a synonym for `-fdump-rtl-mach'.  *Note
+          Debugging Options: (gcc)Debugging Options.
+
+    `D'
+          Like `M' except in two respects: it does _not_ include the
+          predefined macros, and it outputs _both_ the `#define'
+          directives and the result of preprocessing.  Both kinds of
+          output go to the standard output file.
+
+    `N'
+          Like `D', but emit only the macro names, not their expansions.
+
+    `I'
+          Output `#include' directives in addition to the result of
+          preprocessing.
+
+    `U'
+          Like `D' except that only macros that are expanded, or whose
+          definedness is tested in preprocessor directives, are output;
+          the output is delayed until the use or test of the macro; and
+          `#undef' directives are also output for macros tested but
+          undefined at the time.
+
+`-P'
+     Inhibit generation of linemarkers in the output from the
+     preprocessor.  This might be useful when running the preprocessor
+     on something that is not C code, and will be sent to a program
+     which might be confused by the linemarkers.
+
+`-C'
+     Do not discard comments.  All comments are passed through to the
+     output file, except for comments in processed directives, which
+     are deleted along with the directive.
+
+     You should be prepared for side effects when using `-C'; it causes
+     the preprocessor to treat comments as tokens in their own right.
+     For example, comments appearing at the start of what would be a
+     directive line have the effect of turning that line into an
+     ordinary source line, since the first token on the line is no
+     longer a `#'.
+
+`-CC'
+     Do not discard comments, including during macro expansion.  This is
+     like `-C', except that comments contained within macros are also
+     passed through to the output file where the macro is expanded.
+
+     In addition to the side-effects of the `-C' option, the `-CC'
+     option causes all C++-style comments inside a macro to be
+     converted to C-style comments.  This is to prevent later use of
+     that macro from inadvertently commenting out the remainder of the
+     source line.
+
+     The `-CC' option is generally used to support lint comments.
+
+`-traditional-cpp'
+     Try to imitate the behavior of old-fashioned C preprocessors, as
+     opposed to ISO C preprocessors.
+
+`-trigraphs'
+     Process trigraph sequences.  These are three-character sequences,
+     all starting with `??', that are defined by ISO C to stand for
+     single characters.  For example, `??/' stands for `\', so `'??/n''
+     is a character constant for a newline.  By default, GCC ignores
+     trigraphs, but in standard-conforming modes it converts them.  See
+     the `-std' and `-ansi' options.
+
+     The nine trigraphs and their replacements are
+
+          Trigraph:       ??(  ??)  ??<  ??>  ??=  ??/  ??'  ??!  ??-
+          Replacement:      [    ]    {    }    #    \    ^    |    ~
+
+`-remap'
+     Enable special code to work around file systems which only permit
+     very short file names, such as MS-DOS.
+
+`--help'
+`--target-help'
+     Print text describing all the command line options instead of
+     preprocessing anything.
+
+`-v'
+     Verbose mode.  Print out GNU CPP's version number at the beginning
+     of execution, and report the final form of the include path.
+
+`-H'
+     Print the name of each header file used, in addition to other
+     normal activities.  Each name is indented to show how deep in the
+     `#include' stack it is.  Precompiled header files are also
+     printed, even if they are found to be invalid; an invalid
+     precompiled header file is printed with `...x' and a valid one
+     with `...!' .
+
+`-version'
+`--version'
+     Print out GNU CPP's version number.  With one dash, proceed to
+     preprocess as normal.  With two dashes, exit immediately.
+
+
+File: gcc.info,  Node: Assembler Options,  Next: Link Options,  Prev: Preprocessor Options,  Up: Invoking GCC
+
+3.12 Passing Options to the Assembler
+=====================================
+
+You can pass options to the assembler.
+
+`-Wa,OPTION'
+     Pass OPTION as an option to the assembler.  If OPTION contains
+     commas, it is split into multiple options at the commas.
+
+`-Xassembler OPTION'
+     Pass OPTION as an option to the assembler.  You can use this to
+     supply system-specific assembler options which GCC does not know
+     how to recognize.
+
+     If you want to pass an option that takes an argument, you must use
+     `-Xassembler' twice, once for the option and once for the argument.
+
+
+
+File: gcc.info,  Node: Link Options,  Next: Directory Options,  Prev: Assembler Options,  Up: Invoking GCC
+
+3.13 Options for Linking
+========================
+
+These options come into play when the compiler links object files into
+an executable output file.  They are meaningless if the compiler is not
+doing a link step.
+
+`OBJECT-FILE-NAME'
+     A file name that does not end in a special recognized suffix is
+     considered to name an object file or library.  (Object files are
+     distinguished from libraries by the linker according to the file
+     contents.)  If linking is done, these object files are used as
+     input to the linker.
+
+`-c'
+`-S'
+`-E'
+     If any of these options is used, then the linker is not run, and
+     object file names should not be used as arguments.  *Note Overall
+     Options::.
+
+`-lLIBRARY'
+`-l LIBRARY'
+     Search the library named LIBRARY when linking.  (The second
+     alternative with the library as a separate argument is only for
+     POSIX compliance and is not recommended.)
+
+     It makes a difference where in the command you write this option;
+     the linker searches and processes libraries and object files in
+     the order they are specified.  Thus, `foo.o -lz bar.o' searches
+     library `z' after file `foo.o' but before `bar.o'.  If `bar.o'
+     refers to functions in `z', those functions may not be loaded.
+
+     The linker searches a standard list of directories for the library,
+     which is actually a file named `libLIBRARY.a'.  The linker then
+     uses this file as if it had been specified precisely by name.
+
+     The directories searched include several standard system
+     directories plus any that you specify with `-L'.
+
+     Normally the files found this way are library files--archive files
+     whose members are object files.  The linker handles an archive
+     file by scanning through it for members which define symbols that
+     have so far been referenced but not defined.  But if the file that
+     is found is an ordinary object file, it is linked in the usual
+     fashion.  The only difference between using an `-l' option and
+     specifying a file name is that `-l' surrounds LIBRARY with `lib'
+     and `.a' and searches several directories.
+
+`-lobjc'
+     You need this special case of the `-l' option in order to link an
+     Objective-C or Objective-C++ program.
+
+`-nostartfiles'
+     Do not use the standard system startup files when linking.  The
+     standard system libraries are used normally, unless `-nostdlib' or
+     `-nodefaultlibs' is used.
+
+`-nodefaultlibs'
+     Do not use the standard system libraries when linking.  Only the
+     libraries you specify will be passed to the linker, options
+     specifying linkage of the system libraries, such as
+     `-static-libgcc' or `-shared-libgcc', will be ignored.  The
+     standard startup files are used normally, unless `-nostartfiles'
+     is used.  The compiler may generate calls to `memcmp', `memset',
+     `memcpy' and `memmove'.  These entries are usually resolved by
+     entries in libc.  These entry points should be supplied through
+     some other mechanism when this option is specified.
+
+`-nostdlib'
+     Do not use the standard system startup files or libraries when
+     linking.  No startup files and only the libraries you specify will
+     be passed to the linker, options specifying linkage of the system
+     libraries, such as `-static-libgcc' or `-shared-libgcc', will be
+     ignored.  The compiler may generate calls to `memcmp', `memset',
+     `memcpy' and `memmove'.  These entries are usually resolved by
+     entries in libc.  These entry points should be supplied through
+     some other mechanism when this option is specified.
+
+     One of the standard libraries bypassed by `-nostdlib' and
+     `-nodefaultlibs' is `libgcc.a', a library of internal subroutines
+     that GCC uses to overcome shortcomings of particular machines, or
+     special needs for some languages.  (*Note Interfacing to GCC
+     Output: (gccint)Interface, for more discussion of `libgcc.a'.)  In
+     most cases, you need `libgcc.a' even when you want to avoid other
+     standard libraries.  In other words, when you specify `-nostdlib'
+     or `-nodefaultlibs' you should usually specify `-lgcc' as well.
+     This ensures that you have no unresolved references to internal GCC
+     library subroutines.  (For example, `__main', used to ensure C++
+     constructors will be called; *note `collect2': (gccint)Collect2.)
+
+`-pie'
+     Produce a position independent executable on targets which support
+     it.  For predictable results, you must also specify the same set
+     of options that were used to generate code (`-fpie', `-fPIE', or
+     model suboptions) when you specify this option.
+
+`-rdynamic'
+     Pass the flag `-export-dynamic' to the ELF linker, on targets that
+     support it. This instructs the linker to add all symbols, not only
+     used ones, to the dynamic symbol table. This option is needed for
+     some uses of `dlopen' or to allow obtaining backtraces from within
+     a program.
+
+`-s'
+     Remove all symbol table and relocation information from the
+     executable.
+
+`-static'
+     On systems that support dynamic linking, this prevents linking
+     with the shared libraries.  On other systems, this option has no
+     effect.
+
+`-shared'
+     Produce a shared object which can then be linked with other
+     objects to form an executable.  Not all systems support this
+     option.  For predictable results, you must also specify the same
+     set of options that were used to generate code (`-fpic', `-fPIC',
+     or model suboptions) when you specify this option.(1)
+
+`-shared-libgcc'
+`-static-libgcc'
+     On systems that provide `libgcc' as a shared library, these options
+     force the use of either the shared or static version respectively.
+     If no shared version of `libgcc' was built when the compiler was
+     configured, these options have no effect.
+
+     There are several situations in which an application should use the
+     shared `libgcc' instead of the static version.  The most common of
+     these is when the application wishes to throw and catch exceptions
+     across different shared libraries.  In that case, each of the
+     libraries as well as the application itself should use the shared
+     `libgcc'.
+
+     Therefore, the G++ and GCJ drivers automatically add
+     `-shared-libgcc' whenever you build a shared library or a main
+     executable, because C++ and Java programs typically use
+     exceptions, so this is the right thing to do.
+
+     If, instead, you use the GCC driver to create shared libraries,
+     you may find that they will not always be linked with the shared
+     `libgcc'.  If GCC finds, at its configuration time, that you have
+     a non-GNU linker or a GNU linker that does not support option
+     `--eh-frame-hdr', it will link the shared version of `libgcc' into
+     shared libraries by default.  Otherwise, it will take advantage of
+     the linker and optimize away the linking with the shared version
+     of `libgcc', linking with the static version of libgcc by default.
+     This allows exceptions to propagate through such shared libraries,
+     without incurring relocation costs at library load time.
+
+     However, if a library or main executable is supposed to throw or
+     catch exceptions, you must link it using the G++ or GCJ driver, as
+     appropriate for the languages used in the program, or using the
+     option `-shared-libgcc', such that it is linked with the shared
+     `libgcc'.
+
+`-static-libstdc++'
+     When the `g++' program is used to link a C++ program, it will
+     normally automatically link against `libstdc++'.  If `libstdc++'
+     is available as a shared library, and the `-static' option is not
+     used, then this will link against the shared version of
+     `libstdc++'.  That is normally fine.  However, it is sometimes
+     useful to freeze the version of `libstdc++' used by the program
+     without going all the way to a fully static link.  The
+     `-static-libstdc++' option directs the `g++' driver to link
+     `libstdc++' statically, without necessarily linking other
+     libraries statically.
+
+`-symbolic'
+     Bind references to global symbols when building a shared object.
+     Warn about any unresolved references (unless overridden by the
+     link editor option `-Xlinker -z -Xlinker defs').  Only a few
+     systems support this option.
+
+`-T SCRIPT'
+     Use SCRIPT as the linker script.  This option is supported by most
+     systems using the GNU linker.  On some targets, such as bare-board
+     targets without an operating system, the `-T' option may be
+     required when linking to avoid references to undefined symbols.
+
+`-Xlinker OPTION'
+     Pass OPTION as an option to the linker.  You can use this to
+     supply system-specific linker options which GCC does not know how
+     to recognize.
+
+     If you want to pass an option that takes a separate argument, you
+     must use `-Xlinker' twice, once for the option and once for the
+     argument.  For example, to pass `-assert definitions', you must
+     write `-Xlinker -assert -Xlinker definitions'.  It does not work
+     to write `-Xlinker "-assert definitions"', because this passes the
+     entire string as a single argument, which is not what the linker
+     expects.
+
+     When using the GNU linker, it is usually more convenient to pass
+     arguments to linker options using the `OPTION=VALUE' syntax than
+     as separate arguments.  For example, you can specify `-Xlinker
+     -Map=output.map' rather than `-Xlinker -Map -Xlinker output.map'.
+     Other linkers may not support this syntax for command-line options.
+
+`-Wl,OPTION'
+     Pass OPTION as an option to the linker.  If OPTION contains
+     commas, it is split into multiple options at the commas.  You can
+     use this syntax to pass an argument to the option.  For example,
+     `-Wl,-Map,output.map' passes `-Map output.map' to the linker.
+     When using the GNU linker, you can also get the same effect with
+     `-Wl,-Map=output.map'.
+
+`-u SYMBOL'
+     Pretend the symbol SYMBOL is undefined, to force linking of
+     library modules to define it.  You can use `-u' multiple times with
+     different symbols to force loading of additional library modules.
+
+ ---------- Footnotes ----------
+
+ (1) On some systems, `gcc -shared' needs to build supplementary stub
+code for constructors to work.  On multi-libbed systems, `gcc -shared'
+must select the correct support libraries to link against.  Failing to
+supply the correct flags may lead to subtle defects.  Supplying them in
+cases where they are not necessary is innocuous.
+
+
+File: gcc.info,  Node: Directory Options,  Next: Spec Files,  Prev: Link Options,  Up: Invoking GCC
+
+3.14 Options for Directory Search
+=================================
+
+These options specify directories to search for header files, for
+libraries and for parts of the compiler:
+
+`-IDIR'
+     Add the directory DIR to the head of the list of directories to be
+     searched for header files.  This can be used to override a system
+     header file, substituting your own version, since these
+     directories are searched before the system header file
+     directories.  However, you should not use this option to add
+     directories that contain vendor-supplied system header files (use
+     `-isystem' for that).  If you use more than one `-I' option, the
+     directories are scanned in left-to-right order; the standard
+     system directories come after.
+
+     If a standard system include directory, or a directory specified
+     with `-isystem', is also specified with `-I', the `-I' option will
+     be ignored.  The directory will still be searched but as a system
+     directory at its normal position in the system include chain.
+     This is to ensure that GCC's procedure to fix buggy system headers
+     and the ordering for the include_next directive are not
+     inadvertently changed.  If you really need to change the search
+     order for system directories, use the `-nostdinc' and/or
+     `-isystem' options.
+
+`-iquoteDIR'
+     Add the directory DIR to the head of the list of directories to be
+     searched for header files only for the case of `#include "FILE"';
+     they are not searched for `#include <FILE>', otherwise just like
+     `-I'.
+
+`-LDIR'
+     Add directory DIR to the list of directories to be searched for
+     `-l'.
+
+`-BPREFIX'
+     This option specifies where to find the executables, libraries,
+     include files, and data files of the compiler itself.
+
+     The compiler driver program runs one or more of the subprograms
+     `cpp', `cc1', `as' and `ld'.  It tries PREFIX as a prefix for each
+     program it tries to run, both with and without `MACHINE/VERSION/'
+     (*note Target Options::).
+
+     For each subprogram to be run, the compiler driver first tries the
+     `-B' prefix, if any.  If that name is not found, or if `-B' was
+     not specified, the driver tries two standard prefixes, which are
+     `/usr/lib/gcc/' and `/usr/local/lib/gcc/'.  If neither of those
+     results in a file name that is found, the unmodified program name
+     is searched for using the directories specified in your `PATH'
+     environment variable.
+
+     The compiler will check to see if the path provided by the `-B'
+     refers to a directory, and if necessary it will add a directory
+     separator character at the end of the path.
+
+     `-B' prefixes that effectively specify directory names also apply
+     to libraries in the linker, because the compiler translates these
+     options into `-L' options for the linker.  They also apply to
+     includes files in the preprocessor, because the compiler
+     translates these options into `-isystem' options for the
+     preprocessor.  In this case, the compiler appends `include' to the
+     prefix.
+
+     The run-time support file `libgcc.a' can also be searched for using
+     the `-B' prefix, if needed.  If it is not found there, the two
+     standard prefixes above are tried, and that is all.  The file is
+     left out of the link if it is not found by those means.
+
+     Another way to specify a prefix much like the `-B' prefix is to use
+     the environment variable `GCC_EXEC_PREFIX'.  *Note Environment
+     Variables::.
+
+     As a special kludge, if the path provided by `-B' is
+     `[dir/]stageN/', where N is a number in the range 0 to 9, then it
+     will be replaced by `[dir/]include'.  This is to help with
+     boot-strapping the compiler.
+
+`-specs=FILE'
+     Process FILE after the compiler reads in the standard `specs'
+     file, in order to override the defaults that the `gcc' driver
+     program uses when determining what switches to pass to `cc1',
+     `cc1plus', `as', `ld', etc.  More than one `-specs=FILE' can be
+     specified on the command line, and they are processed in order,
+     from left to right.
+
+`--sysroot=DIR'
+     Use DIR as the logical root directory for headers and libraries.
+     For example, if the compiler would normally search for headers in
+     `/usr/include' and libraries in `/usr/lib', it will instead search
+     `DIR/usr/include' and `DIR/usr/lib'.
+
+     If you use both this option and the `-isysroot' option, then the
+     `--sysroot' option will apply to libraries, but the `-isysroot'
+     option will apply to header files.
+
+     The GNU linker (beginning with version 2.16) has the necessary
+     support for this option.  If your linker does not support this
+     option, the header file aspect of `--sysroot' will still work, but
+     the library aspect will not.
+
+`-I-'
+     This option has been deprecated.  Please use `-iquote' instead for
+     `-I' directories before the `-I-' and remove the `-I-'.  Any
+     directories you specify with `-I' options before the `-I-' option
+     are searched only for the case of `#include "FILE"'; they are not
+     searched for `#include <FILE>'.
+
+     If additional directories are specified with `-I' options after
+     the `-I-', these directories are searched for all `#include'
+     directives.  (Ordinarily _all_ `-I' directories are used this way.)
+
+     In addition, the `-I-' option inhibits the use of the current
+     directory (where the current input file came from) as the first
+     search directory for `#include "FILE"'.  There is no way to
+     override this effect of `-I-'.  With `-I.' you can specify
+     searching the directory which was current when the compiler was
+     invoked.  That is not exactly the same as what the preprocessor
+     does by default, but it is often satisfactory.
+
+     `-I-' does not inhibit the use of the standard system directories
+     for header files.  Thus, `-I-' and `-nostdinc' are independent.
+
+
+File: gcc.info,  Node: Spec Files,  Next: Target Options,  Prev: Directory Options,  Up: Invoking GCC
+
+3.15 Specifying subprocesses and the switches to pass to them
+=============================================================
+
+`gcc' is a driver program.  It performs its job by invoking a sequence
+of other programs to do the work of compiling, assembling and linking.
+GCC interprets its command-line parameters and uses these to deduce
+which programs it should invoke, and which command-line options it
+ought to place on their command lines.  This behavior is controlled by
+"spec strings".  In most cases there is one spec string for each
+program that GCC can invoke, but a few programs have multiple spec
+strings to control their behavior.  The spec strings built into GCC can
+be overridden by using the `-specs=' command-line switch to specify a
+spec file.
+
+ "Spec files" are plaintext files that are used to construct spec
+strings.  They consist of a sequence of directives separated by blank
+lines.  The type of directive is determined by the first non-whitespace
+character on the line and it can be one of the following:
+
+`%COMMAND'
+     Issues a COMMAND to the spec file processor.  The commands that can
+     appear here are:
+
+    `%include <FILE>'
+          Search for FILE and insert its text at the current point in
+          the specs file.
+
+    `%include_noerr <FILE>'
+          Just like `%include', but do not generate an error message if
+          the include file cannot be found.
+
+    `%rename OLD_NAME NEW_NAME'
+          Rename the spec string OLD_NAME to NEW_NAME.
+
+
+`*[SPEC_NAME]:'
+     This tells the compiler to create, override or delete the named
+     spec string.  All lines after this directive up to the next
+     directive or blank line are considered to be the text for the spec
+     string.  If this results in an empty string then the spec will be
+     deleted.  (Or, if the spec did not exist, then nothing will
+     happened.)  Otherwise, if the spec does not currently exist a new
+     spec will be created.  If the spec does exist then its contents
+     will be overridden by the text of this directive, unless the first
+     character of that text is the `+' character, in which case the
+     text will be appended to the spec.
+
+`[SUFFIX]:'
+     Creates a new `[SUFFIX] spec' pair.  All lines after this directive
+     and up to the next directive or blank line are considered to make
+     up the spec string for the indicated suffix.  When the compiler
+     encounters an input file with the named suffix, it will processes
+     the spec string in order to work out how to compile that file.
+     For example:
+
+          .ZZ:
+          z-compile -input %i
+
+     This says that any input file whose name ends in `.ZZ' should be
+     passed to the program `z-compile', which should be invoked with the
+     command-line switch `-input' and with the result of performing the
+     `%i' substitution.  (See below.)
+
+     As an alternative to providing a spec string, the text that
+     follows a suffix directive can be one of the following:
+
+    `@LANGUAGE'
+          This says that the suffix is an alias for a known LANGUAGE.
+          This is similar to using the `-x' command-line switch to GCC
+          to specify a language explicitly.  For example:
+
+               .ZZ:
+               @c++
+
+          Says that .ZZ files are, in fact, C++ source files.
+
+    `#NAME'
+          This causes an error messages saying:
+
+               NAME compiler not installed on this system.
+
+     GCC already has an extensive list of suffixes built into it.  This
+     directive will add an entry to the end of the list of suffixes, but
+     since the list is searched from the end backwards, it is
+     effectively possible to override earlier entries using this
+     technique.
+
+
+ GCC has the following spec strings built into it.  Spec files can
+override these strings or create their own.  Note that individual
+targets can also add their own spec strings to this list.
+
+     asm          Options to pass to the assembler
+     asm_final    Options to pass to the assembler post-processor
+     cpp          Options to pass to the C preprocessor
+     cc1          Options to pass to the C compiler
+     cc1plus      Options to pass to the C++ compiler
+     endfile      Object files to include at the end of the link
+     link         Options to pass to the linker
+     lib          Libraries to include on the command line to the linker
+     libgcc       Decides which GCC support library to pass to the linker
+     linker       Sets the name of the linker
+     predefines   Defines to be passed to the C preprocessor
+     signed_char  Defines to pass to CPP to say whether `char' is signed
+                  by default
+     startfile    Object files to include at the start of the link
+
+ Here is a small example of a spec file:
+
+     %rename lib                 old_lib
+
+     *lib:
+     --start-group -lgcc -lc -leval1 --end-group %(old_lib)
+
+ This example renames the spec called `lib' to `old_lib' and then
+overrides the previous definition of `lib' with a new one.  The new
+definition adds in some extra command-line options before including the
+text of the old definition.
+
+ "Spec strings" are a list of command-line options to be passed to their
+corresponding program.  In addition, the spec strings can contain
+`%'-prefixed sequences to substitute variable text or to conditionally
+insert text into the command line.  Using these constructs it is
+possible to generate quite complex command lines.
+
+ Here is a table of all defined `%'-sequences for spec strings.  Note
+that spaces are not generated automatically around the results of
+expanding these sequences.  Therefore you can concatenate them together
+or combine them with constant text in a single argument.
+
+`%%'
+     Substitute one `%' into the program name or argument.
+
+`%i'
+     Substitute the name of the input file being processed.
+
+`%b'
+     Substitute the basename of the input file being processed.  This
+     is the substring up to (and not including) the last period and not
+     including the directory.
+
+`%B'
+     This is the same as `%b', but include the file suffix (text after
+     the last period).
+
+`%d'
+     Marks the argument containing or following the `%d' as a temporary
+     file name, so that that file will be deleted if GCC exits
+     successfully.  Unlike `%g', this contributes no text to the
+     argument.
+
+`%gSUFFIX'
+     Substitute a file name that has suffix SUFFIX and is chosen once
+     per compilation, and mark the argument in the same way as `%d'.
+     To reduce exposure to denial-of-service attacks, the file name is
+     now chosen in a way that is hard to predict even when previously
+     chosen file names are known.  For example, `%g.s ... %g.o ... %g.s'
+     might turn into `ccUVUUAU.s ccXYAXZ12.o ccUVUUAU.s'.  SUFFIX
+     matches the regexp `[.A-Za-z]*' or the special string `%O', which
+     is treated exactly as if `%O' had been preprocessed.  Previously,
+     `%g' was simply substituted with a file name chosen once per
+     compilation, without regard to any appended suffix (which was
+     therefore treated just like ordinary text), making such attacks
+     more likely to succeed.
+
+`%uSUFFIX'
+     Like `%g', but generates a new temporary file name even if
+     `%uSUFFIX' was already seen.
+
+`%USUFFIX'
+     Substitutes the last file name generated with `%uSUFFIX',
+     generating a new one if there is no such last file name.  In the
+     absence of any `%uSUFFIX', this is just like `%gSUFFIX', except
+     they don't share the same suffix _space_, so `%g.s ... %U.s ...
+     %g.s ... %U.s' would involve the generation of two distinct file
+     names, one for each `%g.s' and another for each `%U.s'.
+     Previously, `%U' was simply substituted with a file name chosen
+     for the previous `%u', without regard to any appended suffix.
+
+`%jSUFFIX'
+     Substitutes the name of the `HOST_BIT_BUCKET', if any, and if it is
+     writable, and if save-temps is off; otherwise, substitute the name
+     of a temporary file, just like `%u'.  This temporary file is not
+     meant for communication between processes, but rather as a junk
+     disposal mechanism.
+
+`%|SUFFIX'
+`%mSUFFIX'
+     Like `%g', except if `-pipe' is in effect.  In that case `%|'
+     substitutes a single dash and `%m' substitutes nothing at all.
+     These are the two most common ways to instruct a program that it
+     should read from standard input or write to standard output.  If
+     you need something more elaborate you can use an `%{pipe:`X'}'
+     construct: see for example `f/lang-specs.h'.
+
+`%.SUFFIX'
+     Substitutes .SUFFIX for the suffixes of a matched switch's args
+     when it is subsequently output with `%*'.  SUFFIX is terminated by
+     the next space or %.
+
+`%w'
+     Marks the argument containing or following the `%w' as the
+     designated output file of this compilation.  This puts the argument
+     into the sequence of arguments that `%o' will substitute later.
+
+`%o'
+     Substitutes the names of all the output files, with spaces
+     automatically placed around them.  You should write spaces around
+     the `%o' as well or the results are undefined.  `%o' is for use in
+     the specs for running the linker.  Input files whose names have no
+     recognized suffix are not compiled at all, but they are included
+     among the output files, so they will be linked.
+
+`%O'
+     Substitutes the suffix for object files.  Note that this is
+     handled specially when it immediately follows `%g, %u, or %U',
+     because of the need for those to form complete file names.  The
+     handling is such that `%O' is treated exactly as if it had already
+     been substituted, except that `%g, %u, and %U' do not currently
+     support additional SUFFIX characters following `%O' as they would
+     following, for example, `.o'.
+
+`%p'
+     Substitutes the standard macro predefinitions for the current
+     target machine.  Use this when running `cpp'.
+
+`%P'
+     Like `%p', but puts `__' before and after the name of each
+     predefined macro, except for macros that start with `__' or with
+     `_L', where L is an uppercase letter.  This is for ISO C.
+
+`%I'
+     Substitute any of `-iprefix' (made from `GCC_EXEC_PREFIX'),
+     `-isysroot' (made from `TARGET_SYSTEM_ROOT'), `-isystem' (made
+     from `COMPILER_PATH' and `-B' options) and `-imultilib' as
+     necessary.
+
+`%s'
+     Current argument is the name of a library or startup file of some
+     sort.  Search for that file in a standard list of directories and
+     substitute the full name found.  The current working directory is
+     included in the list of directories scanned.
+
+`%T'
+     Current argument is the name of a linker script.  Search for that
+     file in the current list of directories to scan for libraries. If
+     the file is located insert a `--script' option into the command
+     line followed by the full path name found.  If the file is not
+     found then generate an error message.  Note: the current working
+     directory is not searched.
+
+`%eSTR'
+     Print STR as an error message.  STR is terminated by a newline.
+     Use this when inconsistent options are detected.
+
+`%(NAME)'
+     Substitute the contents of spec string NAME at this point.
+
+`%[NAME]'
+     Like `%(...)' but put `__' around `-D' arguments.
+
+`%x{OPTION}'
+     Accumulate an option for `%X'.
+
+`%X'
+     Output the accumulated linker options specified by `-Wl' or a `%x'
+     spec string.
+
+`%Y'
+     Output the accumulated assembler options specified by `-Wa'.
+
+`%Z'
+     Output the accumulated preprocessor options specified by `-Wp'.
+
+`%a'
+     Process the `asm' spec.  This is used to compute the switches to
+     be passed to the assembler.
+
+`%A'
+     Process the `asm_final' spec.  This is a spec string for passing
+     switches to an assembler post-processor, if such a program is
+     needed.
+
+`%l'
+     Process the `link' spec.  This is the spec for computing the
+     command line passed to the linker.  Typically it will make use of
+     the `%L %G %S %D and %E' sequences.
+
+`%D'
+     Dump out a `-L' option for each directory that GCC believes might
+     contain startup files.  If the target supports multilibs then the
+     current multilib directory will be prepended to each of these
+     paths.
+
+`%L'
+     Process the `lib' spec.  This is a spec string for deciding which
+     libraries should be included on the command line to the linker.
+
+`%G'
+     Process the `libgcc' spec.  This is a spec string for deciding
+     which GCC support library should be included on the command line
+     to the linker.
+
+`%S'
+     Process the `startfile' spec.  This is a spec for deciding which
+     object files should be the first ones passed to the linker.
+     Typically this might be a file named `crt0.o'.
+
+`%E'
+     Process the `endfile' spec.  This is a spec string that specifies
+     the last object files that will be passed to the linker.
+
+`%C'
+     Process the `cpp' spec.  This is used to construct the arguments
+     to be passed to the C preprocessor.
+
+`%1'
+     Process the `cc1' spec.  This is used to construct the options to
+     be passed to the actual C compiler (`cc1').
+
+`%2'
+     Process the `cc1plus' spec.  This is used to construct the options
+     to be passed to the actual C++ compiler (`cc1plus').
+
+`%*'
+     Substitute the variable part of a matched option.  See below.
+     Note that each comma in the substituted string is replaced by a
+     single space.
+
+`%<`S''
+     Remove all occurrences of `-S' from the command line.  Note--this
+     command is position dependent.  `%' commands in the spec string
+     before this one will see `-S', `%' commands in the spec string
+     after this one will not.
+
+`%:FUNCTION(ARGS)'
+     Call the named function FUNCTION, passing it ARGS.  ARGS is first
+     processed as a nested spec string, then split into an argument
+     vector in the usual fashion.  The function returns a string which
+     is processed as if it had appeared literally as part of the
+     current spec.
+
+     The following built-in spec functions are provided:
+
+    ``getenv''
+          The `getenv' spec function takes two arguments: an environment
+          variable name and a string.  If the environment variable is
+          not defined, a fatal error is issued.  Otherwise, the return
+          value is the value of the environment variable concatenated
+          with the string.  For example, if `TOPDIR' is defined as
+          `/path/to/top', then:
+
+               %:getenv(TOPDIR /include)
+
+          expands to `/path/to/top/include'.
+
+    ``if-exists''
+          The `if-exists' spec function takes one argument, an absolute
+          pathname to a file.  If the file exists, `if-exists' returns
+          the pathname.  Here is a small example of its usage:
+
+               *startfile:
+               crt0%O%s %:if-exists(crti%O%s) crtbegin%O%s
+
+    ``if-exists-else''
+          The `if-exists-else' spec function is similar to the
+          `if-exists' spec function, except that it takes two
+          arguments.  The first argument is an absolute pathname to a
+          file.  If the file exists, `if-exists-else' returns the
+          pathname.  If it does not exist, it returns the second
+          argument.  This way, `if-exists-else' can be used to select
+          one file or another, based on the existence of the first.
+          Here is a small example of its usage:
+
+               *startfile:
+               crt0%O%s %:if-exists(crti%O%s) \
+               %:if-exists-else(crtbeginT%O%s crtbegin%O%s)
+
+    ``replace-outfile''
+          The `replace-outfile' spec function takes two arguments.  It
+          looks for the first argument in the outfiles array and
+          replaces it with the second argument.  Here is a small
+          example of its usage:
+
+               %{fgnu-runtime:%:replace-outfile(-lobjc -lobjc-gnu)}
+
+    ``print-asm-header''
+          The `print-asm-header' function takes no arguments and simply
+          prints a banner like:
+
+               Assembler options
+               =================
+
+               Use "-Wa,OPTION" to pass "OPTION" to the assembler.
+
+          It is used to separate compiler options from assembler options
+          in the `--target-help' output.
+
+`%{`S'}'
+     Substitutes the `-S' switch, if that switch was given to GCC.  If
+     that switch was not specified, this substitutes nothing.  Note that
+     the leading dash is omitted when specifying this option, and it is
+     automatically inserted if the substitution is performed.  Thus the
+     spec string `%{foo}' would match the command-line option `-foo'
+     and would output the command line option `-foo'.
+
+`%W{`S'}'
+     Like %{`S'} but mark last argument supplied within as a file to be
+     deleted on failure.
+
+`%{`S'*}'
+     Substitutes all the switches specified to GCC whose names start
+     with `-S', but which also take an argument.  This is used for
+     switches like `-o', `-D', `-I', etc.  GCC considers `-o foo' as
+     being one switch whose names starts with `o'.  %{o*} would
+     substitute this text, including the space.  Thus two arguments
+     would be generated.
+
+`%{`S'*&`T'*}'
+     Like %{`S'*}, but preserve order of `S' and `T' options (the order
+     of `S' and `T' in the spec is not significant).  There can be any
+     number of ampersand-separated variables; for each the wild card is
+     optional.  Useful for CPP as `%{D*&U*&A*}'.
+
+`%{`S':`X'}'
+     Substitutes `X', if the `-S' switch was given to GCC.
+
+`%{!`S':`X'}'
+     Substitutes `X', if the `-S' switch was _not_ given to GCC.
+
+`%{`S'*:`X'}'
+     Substitutes `X' if one or more switches whose names start with
+     `-S' are specified to GCC.  Normally `X' is substituted only once,
+     no matter how many such switches appeared.  However, if `%*'
+     appears somewhere in `X', then `X' will be substituted once for
+     each matching switch, with the `%*' replaced by the part of that
+     switch that matched the `*'.
+
+`%{.`S':`X'}'
+     Substitutes `X', if processing a file with suffix `S'.
+
+`%{!.`S':`X'}'
+     Substitutes `X', if _not_ processing a file with suffix `S'.
+
+`%{,`S':`X'}'
+     Substitutes `X', if processing a file for language `S'.
+
+`%{!,`S':`X'}'
+     Substitutes `X', if not processing a file for language `S'.
+
+`%{`S'|`P':`X'}'
+     Substitutes `X' if either `-S' or `-P' was given to GCC.  This may
+     be combined with `!', `.', `,', and `*' sequences as well,
+     although they have a stronger binding than the `|'.  If `%*'
+     appears in `X', all of the alternatives must be starred, and only
+     the first matching alternative is substituted.
+
+     For example, a spec string like this:
+
+          %{.c:-foo} %{!.c:-bar} %{.c|d:-baz} %{!.c|d:-boggle}
+
+     will output the following command-line options from the following
+     input command-line options:
+
+          fred.c        -foo -baz
+          jim.d         -bar -boggle
+          -d fred.c     -foo -baz -boggle
+          -d jim.d      -bar -baz -boggle
+
+`%{S:X; T:Y; :D}'
+     If `S' was given to GCC, substitutes `X'; else if `T' was given to
+     GCC, substitutes `Y'; else substitutes `D'.  There can be as many
+     clauses as you need.  This may be combined with `.', `,', `!',
+     `|', and `*' as needed.
+
+
+ The conditional text `X' in a %{`S':`X'} or similar construct may
+contain other nested `%' constructs or spaces, or even newlines.  They
+are processed as usual, as described above.  Trailing white space in
+`X' is ignored.  White space may also appear anywhere on the left side
+of the colon in these constructs, except between `.' or `*' and the
+corresponding word.
+
+ The `-O', `-f', `-m', and `-W' switches are handled specifically in
+these constructs.  If another value of `-O' or the negated form of a
+`-f', `-m', or `-W' switch is found later in the command line, the
+earlier switch value is ignored, except with {`S'*} where `S' is just
+one letter, which passes all matching options.
+
+ The character `|' at the beginning of the predicate text is used to
+indicate that a command should be piped to the following command, but
+only if `-pipe' is specified.
+
+ It is built into GCC which switches take arguments and which do not.
+(You might think it would be useful to generalize this to allow each
+compiler's spec to say which switches take arguments.  But this cannot
+be done in a consistent fashion.  GCC cannot even decide which input
+files have been specified without knowing which switches take arguments,
+and it must know which input files to compile in order to tell which
+compilers to run).
+
+ GCC also knows implicitly that arguments starting in `-l' are to be
+treated as compiler output files, and passed to the linker in their
+proper position among the other output files.
+
+
+File: gcc.info,  Node: Target Options,  Next: Submodel Options,  Prev: Spec Files,  Up: Invoking GCC
+
+3.16 Specifying Target Machine and Compiler Version
+===================================================
+
+The usual way to run GCC is to run the executable called `gcc', or
+`<machine>-gcc' when cross-compiling, or `<machine>-gcc-<version>' to
+run a version other than the one that was installed last.  Sometimes
+this is inconvenient, so GCC provides options that will switch to
+another cross-compiler or version.
+
+`-b MACHINE'
+     The argument MACHINE specifies the target machine for compilation.
+
+     The value to use for MACHINE is the same as was specified as the
+     machine type when configuring GCC as a cross-compiler.  For
+     example, if a cross-compiler was configured with `configure
+     arm-elf', meaning to compile for an arm processor with elf
+     binaries, then you would specify `-b arm-elf' to run that cross
+     compiler.  Because there are other options beginning with `-b', the
+     configuration must contain a hyphen, or `-b' alone should be one
+     argument followed by the configuration in the next argument.
+
+`-V VERSION'
+     The argument VERSION specifies which version of GCC to run.  This
+     is useful when multiple versions are installed.  For example,
+     VERSION might be `4.0', meaning to run GCC version 4.0.
+
+ The `-V' and `-b' options work by running the
+`<machine>-gcc-<version>' executable, so there's no real reason to use
+them if you can just run that directly.
+
+
+File: gcc.info,  Node: Submodel Options,  Next: Code Gen Options,  Prev: Target Options,  Up: Invoking GCC
+
+3.17 Hardware Models and Configurations
+=======================================
+
+Earlier we discussed the standard option `-b' which chooses among
+different installed compilers for completely different target machines,
+such as VAX vs. 68000 vs. 80386.
+
+ In addition, each of these target machine types can have its own
+special options, starting with `-m', to choose among various hardware
+models or configurations--for example, 68010 vs 68020, floating
+coprocessor or none.  A single installed version of the compiler can
+compile for any model or configuration, according to the options
+specified.
+
+ Some configurations of the compiler also support additional special
+options, usually for compatibility with other compilers on the same
+platform.
+
+* Menu:
+
+* ARC Options::
+* ARM Options::
+* AVR Options::
+* Blackfin Options::
+* CRIS Options::
+* CRX Options::
+* Darwin Options::
+* DEC Alpha Options::
+* DEC Alpha/VMS Options::
+* FR30 Options::
+* FRV Options::
+* GNU/Linux Options::
+* H8/300 Options::
+* HPPA Options::
+* i386 and x86-64 Options::
+* i386 and x86-64 Windows Options::
+* IA-64 Options::
+* IA-64/VMS Options::
+* LM32 Options::
+* M32C Options::
+* M32R/D Options::
+* M680x0 Options::
+* M68hc1x Options::
+* MCore Options::
+* MeP Options::
+* MIPS Options::
+* MMIX Options::
+* MN10300 Options::
+* OpenRISC 1000 Options::
+* PDP-11 Options::
+* picoChip Options::
+* PowerPC Options::
+* RS/6000 and PowerPC Options::
+* RX Options::
+* S/390 and zSeries Options::
+* Score Options::
+* SH Options::
+* SPARC Options::
+* SPU Options::
+* System V Options::
+* V850 Options::
+* VAX Options::
+* VxWorks Options::
+* x86-64 Options::
+* Xstormy16 Options::
+* Xtensa Options::
+* zSeries Options::
+
+
+File: gcc.info,  Node: ARC Options,  Next: ARM Options,  Up: Submodel Options
+
+3.17.1 ARC Options
+------------------
+
+These options are defined for ARC implementations:
+
+`-EL'
+     Compile code for little endian mode.  This is the default.
+
+`-EB'
+     Compile code for big endian mode.
+
+`-mmangle-cpu'
+     Prepend the name of the cpu to all public symbol names.  In
+     multiple-processor systems, there are many ARC variants with
+     different instruction and register set characteristics.  This flag
+     prevents code compiled for one cpu to be linked with code compiled
+     for another.  No facility exists for handling variants that are
+     "almost identical".  This is an all or nothing option.
+
+`-mcpu=CPU'
+     Compile code for ARC variant CPU.  Which variants are supported
+     depend on the configuration.  All variants support `-mcpu=base',
+     this is the default.
+
+`-mtext=TEXT-SECTION'
+`-mdata=DATA-SECTION'
+`-mrodata=READONLY-DATA-SECTION'
+     Put functions, data, and readonly data in TEXT-SECTION,
+     DATA-SECTION, and READONLY-DATA-SECTION respectively by default.
+     This can be overridden with the `section' attribute.  *Note
+     Variable Attributes::.
+
+`-mfix-cortex-m3-ldrd'
+     Some Cortex-M3 cores can cause data corruption when `ldrd'
+     instructions with overlapping destination and base registers are
+     used.  This option avoids generating these instructions.  This
+     option is enabled by default when `-mcpu=cortex-m3' is specified.
+
+
+
+File: gcc.info,  Node: ARM Options,  Next: AVR Options,  Prev: ARC Options,  Up: Submodel Options
+
+3.17.2 ARM Options
+------------------
+
+These `-m' options are defined for Advanced RISC Machines (ARM)
+architectures:
+
+`-mabi=NAME'
+     Generate code for the specified ABI.  Permissible values are:
+     `apcs-gnu', `atpcs', `aapcs', `aapcs-linux' and `iwmmxt'.
+
+`-mapcs-frame'
+     Generate a stack frame that is compliant with the ARM Procedure
+     Call Standard for all functions, even if this is not strictly
+     necessary for correct execution of the code.  Specifying
+     `-fomit-frame-pointer' with this option will cause the stack
+     frames not to be generated for leaf functions.  The default is
+     `-mno-apcs-frame'.
+
+`-mapcs'
+     This is a synonym for `-mapcs-frame'.
+
+`-mthumb-interwork'
+     Generate code which supports calling between the ARM and Thumb
+     instruction sets.  Without this option the two instruction sets
+     cannot be reliably used inside one program.  The default is
+     `-mno-thumb-interwork', since slightly larger code is generated
+     when `-mthumb-interwork' is specified.
+
+`-mno-sched-prolog'
+     Prevent the reordering of instructions in the function prolog, or
+     the merging of those instruction with the instructions in the
+     function's body.  This means that all functions will start with a
+     recognizable set of instructions (or in fact one of a choice from
+     a small set of different function prologues), and this information
+     can be used to locate the start if functions inside an executable
+     piece of code.  The default is `-msched-prolog'.
+
+`-mfloat-abi=NAME'
+     Specifies which floating-point ABI to use.  Permissible values
+     are: `soft', `softfp' and `hard'.
+
+     Specifying `soft' causes GCC to generate output containing library
+     calls for floating-point operations.  `softfp' allows the
+     generation of code using hardware floating-point instructions, but
+     still uses the soft-float calling conventions.  `hard' allows
+     generation of floating-point instructions and uses FPU-specific
+     calling conventions.
+
+     The default depends on the specific target configuration.  Note
+     that the hard-float and soft-float ABIs are not link-compatible;
+     you must compile your entire program with the same ABI, and link
+     with a compatible set of libraries.
+
+`-mhard-float'
+     Equivalent to `-mfloat-abi=hard'.
+
+`-msoft-float'
+     Equivalent to `-mfloat-abi=soft'.
+
+`-mlittle-endian'
+     Generate code for a processor running in little-endian mode.  This
+     is the default for all standard configurations.
+
+`-mbig-endian'
+     Generate code for a processor running in big-endian mode; the
+     default is to compile code for a little-endian processor.
+
+`-mwords-little-endian'
+     This option only applies when generating code for big-endian
+     processors.  Generate code for a little-endian word order but a
+     big-endian byte order.  That is, a byte order of the form
+     `32107654'.  Note: this option should only be used if you require
+     compatibility with code for big-endian ARM processors generated by
+     versions of the compiler prior to 2.8.
+
+`-mcpu=NAME'
+     This specifies the name of the target ARM processor.  GCC uses
+     this name to determine what kind of instructions it can emit when
+     generating assembly code.  Permissible names are: `arm2', `arm250',
+     `arm3', `arm6', `arm60', `arm600', `arm610', `arm620', `arm7',
+     `arm7m', `arm7d', `arm7dm', `arm7di', `arm7dmi', `arm70', `arm700',
+     `arm700i', `arm710', `arm710c', `arm7100', `arm720', `arm7500',
+     `arm7500fe', `arm7tdmi', `arm7tdmi-s', `arm710t', `arm720t',
+     `arm740t', `strongarm', `strongarm110', `strongarm1100',
+     `strongarm1110', `arm8', `arm810', `arm9', `arm9e', `arm920',
+     `arm920t', `arm922t', `arm946e-s', `arm966e-s', `arm968e-s',
+     `arm926ej-s', `arm940t', `arm9tdmi', `arm10tdmi', `arm1020t',
+     `arm1026ej-s', `arm10e', `arm1020e', `arm1022e', `arm1136j-s',
+     `arm1136jf-s', `mpcore', `mpcorenovfp', `arm1156t2-s',
+     `arm1156t2f-s', `arm1176jz-s', `arm1176jzf-s', `cortex-a5',
+     `cortex-a8', `cortex-a9', `cortex-r4', `cortex-r4f', `cortex-m3',
+     `cortex-m1', `cortex-m0', `xscale', `iwmmxt', `iwmmxt2', `ep9312'.
+
+`-mtune=NAME'
+     This option is very similar to the `-mcpu=' option, except that
+     instead of specifying the actual target processor type, and hence
+     restricting which instructions can be used, it specifies that GCC
+     should tune the performance of the code as if the target were of
+     the type specified in this option, but still choosing the
+     instructions that it will generate based on the cpu specified by a
+     `-mcpu=' option.  For some ARM implementations better performance
+     can be obtained by using this option.
+
+`-march=NAME'
+     This specifies the name of the target ARM architecture.  GCC uses
+     this name to determine what kind of instructions it can emit when
+     generating assembly code.  This option can be used in conjunction
+     with or instead of the `-mcpu=' option.  Permissible names are:
+     `armv2', `armv2a', `armv3', `armv3m', `armv4', `armv4t', `armv5',
+     `armv5t', `armv5e', `armv5te', `armv6', `armv6j', `armv6t2',
+     `armv6z', `armv6zk', `armv6-m', `armv7', `armv7-a', `armv7-r',
+     `armv7-m', `iwmmxt', `iwmmxt2', `ep9312'.
+
+`-mfpu=NAME'
+`-mfpe=NUMBER'
+`-mfp=NUMBER'
+     This specifies what floating point hardware (or hardware
+     emulation) is available on the target.  Permissible names are:
+     `fpa', `fpe2', `fpe3', `maverick', `vfp', `vfpv3', `vfpv3-fp16',
+     `vfpv3-d16', `vfpv3-d16-fp16', `vfpv3xd', `vfpv3xd-fp16', `neon',
+     `neon-fp16', `vfpv4', `vfpv4-d16', `fpv4-sp-d16' and `neon-vfpv4'.
+     `-mfp' and `-mfpe' are synonyms for `-mfpu'=`fpe'NUMBER, for
+     compatibility with older versions of GCC.
+
+     If `-msoft-float' is specified this specifies the format of
+     floating point values.
+
+`-mfp16-format=NAME'
+     Specify the format of the `__fp16' half-precision floating-point
+     type.  Permissible names are `none', `ieee', and `alternative';
+     the default is `none', in which case the `__fp16' type is not
+     defined.  *Note Half-Precision::, for more information.
+
+`-mstructure-size-boundary=N'
+     The size of all structures and unions will be rounded up to a
+     multiple of the number of bits set by this option.  Permissible
+     values are 8, 32 and 64.  The default value varies for different
+     toolchains.  For the COFF targeted toolchain the default value is
+     8.  A value of 64 is only allowed if the underlying ABI supports
+     it.
+
+     Specifying the larger number can produce faster, more efficient
+     code, but can also increase the size of the program.  Different
+     values are potentially incompatible.  Code compiled with one value
+     cannot necessarily expect to work with code or libraries compiled
+     with another value, if they exchange information using structures
+     or unions.
+
+`-mabort-on-noreturn'
+     Generate a call to the function `abort' at the end of a `noreturn'
+     function.  It will be executed if the function tries to return.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Tells the compiler to perform function calls by first loading the
+     address of the function into a register and then performing a
+     subroutine call on this register.  This switch is needed if the
+     target function will lie outside of the 64 megabyte addressing
+     range of the offset based version of subroutine call instruction.
+
+     Even if this switch is enabled, not all function calls will be
+     turned into long calls.  The heuristic is that static functions,
+     functions which have the `short-call' attribute, functions that
+     are inside the scope of a `#pragma no_long_calls' directive and
+     functions whose definitions have already been compiled within the
+     current compilation unit, will not be turned into long calls.  The
+     exception to this rule is that weak function definitions,
+     functions with the `long-call' attribute or the `section'
+     attribute, and functions that are within the scope of a `#pragma
+     long_calls' directive, will always be turned into long calls.
+
+     This feature is not enabled by default.  Specifying
+     `-mno-long-calls' will restore the default behavior, as will
+     placing the function calls within the scope of a `#pragma
+     long_calls_off' directive.  Note these switches have no effect on
+     how the compiler generates code to handle function calls via
+     function pointers.
+
+`-msingle-pic-base'
+     Treat the register used for PIC addressing as read-only, rather
+     than loading it in the prologue for each function.  The run-time
+     system is responsible for initializing this register with an
+     appropriate value before execution begins.
+
+`-mpic-register=REG'
+     Specify the register to be used for PIC addressing.  The default
+     is R10 unless stack-checking is enabled, when R9 is used.
+
+`-mcirrus-fix-invalid-insns'
+     Insert NOPs into the instruction stream to in order to work around
+     problems with invalid Maverick instruction combinations.  This
+     option is only valid if the `-mcpu=ep9312' option has been used to
+     enable generation of instructions for the Cirrus Maverick floating
+     point co-processor.  This option is not enabled by default, since
+     the problem is only present in older Maverick implementations.
+     The default can be re-enabled by use of the
+     `-mno-cirrus-fix-invalid-insns' switch.
+
+`-mpoke-function-name'
+     Write the name of each function into the text section, directly
+     preceding the function prologue.  The generated code is similar to
+     this:
+
+               t0
+                   .ascii "arm_poke_function_name", 0
+                   .align
+               t1
+                   .word 0xff000000 + (t1 - t0)
+               arm_poke_function_name
+                   mov     ip, sp
+                   stmfd   sp!, {fp, ip, lr, pc}
+                   sub     fp, ip, #4
+
+     When performing a stack backtrace, code can inspect the value of
+     `pc' stored at `fp + 0'.  If the trace function then looks at
+     location `pc - 12' and the top 8 bits are set, then we know that
+     there is a function name embedded immediately preceding this
+     location and has length `((pc[-3]) & 0xff000000)'.
+
+`-mthumb'
+     Generate code for the Thumb instruction set.  The default is to
+     use the 32-bit ARM instruction set.  This option automatically
+     enables either 16-bit Thumb-1 or mixed 16/32-bit Thumb-2
+     instructions based on the `-mcpu=NAME' and `-march=NAME' options.
+     This option is not passed to the assembler. If you want to force
+     assembler files to be interpreted as Thumb code, either add a
+     `.thumb' directive to the source or pass the `-mthumb' option
+     directly to the assembler by prefixing it with `-Wa'.
+
+`-mtpcs-frame'
+     Generate a stack frame that is compliant with the Thumb Procedure
+     Call Standard for all non-leaf functions.  (A leaf function is one
+     that does not call any other functions.)  The default is
+     `-mno-tpcs-frame'.
+
+`-mtpcs-leaf-frame'
+     Generate a stack frame that is compliant with the Thumb Procedure
+     Call Standard for all leaf functions.  (A leaf function is one
+     that does not call any other functions.)  The default is
+     `-mno-apcs-leaf-frame'.
+
+`-mcallee-super-interworking'
+     Gives all externally visible functions in the file being compiled
+     an ARM instruction set header which switches to Thumb mode before
+     executing the rest of the function.  This allows these functions
+     to be called from non-interworking code.  This option is not valid
+     in AAPCS configurations because interworking is enabled by default.
+
+`-mcaller-super-interworking'
+     Allows calls via function pointers (including virtual functions) to
+     execute correctly regardless of whether the target code has been
+     compiled for interworking or not.  There is a small overhead in
+     the cost of executing a function pointer if this option is
+     enabled.  This option is not valid in AAPCS configurations because
+     interworking is enabled by default.
+
+`-mtp=NAME'
+     Specify the access model for the thread local storage pointer.
+     The valid models are `soft', which generates calls to
+     `__aeabi_read_tp', `cp15', which fetches the thread pointer from
+     `cp15' directly (supported in the arm6k architecture), and `auto',
+     which uses the best available method for the selected processor.
+     The default setting is `auto'.
+
+`-mword-relocations'
+     Only generate absolute relocations on word sized values (i.e.
+     R_ARM_ABS32).  This is enabled by default on targets (uClinux,
+     SymbianOS) where the runtime loader imposes this restriction, and
+     when `-fpic' or `-fPIC' is specified.
+
+
+
+File: gcc.info,  Node: AVR Options,  Next: Blackfin Options,  Prev: ARM Options,  Up: Submodel Options
+
+3.17.3 AVR Options
+------------------
+
+These options are defined for AVR implementations:
+
+`-mmcu=MCU'
+     Specify ATMEL AVR instruction set or MCU type.
+
+     Instruction set avr1 is for the minimal AVR core, not supported by
+     the C compiler, only for assembler programs (MCU types: at90s1200,
+     attiny10, attiny11, attiny12, attiny15, attiny28).
+
+     Instruction set avr2 (default) is for the classic AVR core with up
+     to 8K program memory space (MCU types: at90s2313, at90s2323,
+     attiny22, at90s2333, at90s2343, at90s4414, at90s4433, at90s4434,
+     at90s8515, at90c8534, at90s8535).
+
+     Instruction set avr3 is for the classic AVR core with up to 128K
+     program memory space (MCU types: atmega103, atmega603, at43usb320,
+     at76c711).
+
+     Instruction set avr4 is for the enhanced AVR core with up to 8K
+     program memory space (MCU types: atmega8, atmega83, atmega85).
+
+     Instruction set avr5 is for the enhanced AVR core with up to 128K
+     program memory space (MCU types: atmega16, atmega161, atmega163,
+     atmega32, atmega323, atmega64, atmega128, at43usb355, at94k).
+
+`-mno-interrupts'
+     Generated code is not compatible with hardware interrupts.  Code
+     size will be smaller.
+
+`-mcall-prologues'
+     Functions prologues/epilogues expanded as call to appropriate
+     subroutines.  Code size will be smaller.
+
+`-mtiny-stack'
+     Change only the low 8 bits of the stack pointer.
+
+`-mint8'
+     Assume int to be 8 bit integer.  This affects the sizes of all
+     types: A char will be 1 byte, an int will be 1 byte, a long will
+     be 2 bytes and long long will be 4 bytes.  Please note that this
+     option does not comply to the C standards, but it will provide you
+     with smaller code size.
+
+
+File: gcc.info,  Node: Blackfin Options,  Next: CRIS Options,  Prev: AVR Options,  Up: Submodel Options
+
+3.17.4 Blackfin Options
+-----------------------
+
+`-mcpu=CPU[-SIREVISION]'
+     Specifies the name of the target Blackfin processor.  Currently,
+     CPU can be one of `bf512', `bf514', `bf516', `bf518', `bf522',
+     `bf523', `bf524', `bf525', `bf526', `bf527', `bf531', `bf532',
+     `bf533', `bf534', `bf536', `bf537', `bf538', `bf539', `bf542',
+     `bf544', `bf547', `bf548', `bf549', `bf542m', `bf544m', `bf547m',
+     `bf548m', `bf549m', `bf561'.  The optional SIREVISION specifies
+     the silicon revision of the target Blackfin processor.  Any
+     workarounds available for the targeted silicon revision will be
+     enabled.  If SIREVISION is `none', no workarounds are enabled.  If
+     SIREVISION is `any', all workarounds for the targeted processor
+     will be enabled.  The `__SILICON_REVISION__' macro is defined to
+     two hexadecimal digits representing the major and minor numbers in
+     the silicon revision.  If SIREVISION is `none', the
+     `__SILICON_REVISION__' is not defined.  If SIREVISION is `any', the
+     `__SILICON_REVISION__' is defined to be `0xffff'.  If this
+     optional SIREVISION is not used, GCC assumes the latest known
+     silicon revision of the targeted Blackfin processor.
+
+     Support for `bf561' is incomplete.  For `bf561', Only the
+     processor macro is defined.  Without this option, `bf532' is used
+     as the processor by default.  The corresponding predefined
+     processor macros for CPU is to be defined.  And for `bfin-elf'
+     toolchain, this causes the hardware BSP provided by libgloss to be
+     linked in if `-msim' is not given.
+
+`-msim'
+     Specifies that the program will be run on the simulator.  This
+     causes the simulator BSP provided by libgloss to be linked in.
+     This option has effect only for `bfin-elf' toolchain.  Certain
+     other options, such as `-mid-shared-library' and `-mfdpic', imply
+     `-msim'.
+
+`-momit-leaf-frame-pointer'
+     Don't keep the frame pointer in a register for leaf functions.
+     This avoids the instructions to save, set up and restore frame
+     pointers and makes an extra register available in leaf functions.
+     The option `-fomit-frame-pointer' removes the frame pointer for
+     all functions which might make debugging harder.
+
+`-mspecld-anomaly'
+     When enabled, the compiler will ensure that the generated code
+     does not contain speculative loads after jump instructions. If
+     this option is used, `__WORKAROUND_SPECULATIVE_LOADS' is defined.
+
+`-mno-specld-anomaly'
+     Don't generate extra code to prevent speculative loads from
+     occurring.
+
+`-mcsync-anomaly'
+     When enabled, the compiler will ensure that the generated code
+     does not contain CSYNC or SSYNC instructions too soon after
+     conditional branches.  If this option is used,
+     `__WORKAROUND_SPECULATIVE_SYNCS' is defined.
+
+`-mno-csync-anomaly'
+     Don't generate extra code to prevent CSYNC or SSYNC instructions
+     from occurring too soon after a conditional branch.
+
+`-mlow-64k'
+     When enabled, the compiler is free to take advantage of the
+     knowledge that the entire program fits into the low 64k of memory.
+
+`-mno-low-64k'
+     Assume that the program is arbitrarily large.  This is the default.
+
+`-mstack-check-l1'
+     Do stack checking using information placed into L1 scratchpad
+     memory by the uClinux kernel.
+
+`-mid-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method.  This allows for execute in place and shared libraries in
+     an environment without virtual memory management.  This option
+     implies `-fPIC'.  With a `bfin-elf' target, this option implies
+     `-msim'.
+
+`-mno-id-shared-library'
+     Generate code that doesn't assume ID based shared libraries are
+     being used.  This is the default.
+
+`-mleaf-id-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method, but assumes that this library or executable won't link
+     against any other ID shared libraries.  That allows the compiler
+     to use faster code for jumps and calls.
+
+`-mno-leaf-id-shared-library'
+     Do not assume that the code being compiled won't link against any
+     ID shared libraries.  Slower code will be generated for jump and
+     call insns.
+
+`-mshared-library-id=n'
+     Specified the identification number of the ID based shared library
+     being compiled.  Specifying a value of 0 will generate more
+     compact code, specifying other values will force the allocation of
+     that number to the current library but is no more space or time
+     efficient than omitting this option.
+
+`-msep-data'
+     Generate code that allows the data segment to be located in a
+     different area of memory from the text segment.  This allows for
+     execute in place in an environment without virtual memory
+     management by eliminating relocations against the text section.
+
+`-mno-sep-data'
+     Generate code that assumes that the data segment follows the text
+     segment.  This is the default.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Tells the compiler to perform function calls by first loading the
+     address of the function into a register and then performing a
+     subroutine call on this register.  This switch is needed if the
+     target function will lie outside of the 24 bit addressing range of
+     the offset based version of subroutine call instruction.
+
+     This feature is not enabled by default.  Specifying
+     `-mno-long-calls' will restore the default behavior.  Note these
+     switches have no effect on how the compiler generates code to
+     handle function calls via function pointers.
+
+`-mfast-fp'
+     Link with the fast floating-point library. This library relaxes
+     some of the IEEE floating-point standard's rules for checking
+     inputs against Not-a-Number (NAN), in the interest of performance.
+
+`-minline-plt'
+     Enable inlining of PLT entries in function calls to functions that
+     are not known to bind locally.  It has no effect without `-mfdpic'.
+
+`-mmulticore'
+     Build standalone application for multicore Blackfin processor.
+     Proper start files and link scripts will be used to support
+     multicore.  This option defines `__BFIN_MULTICORE'. It can only be
+     used with `-mcpu=bf561[-SIREVISION]'. It can be used with
+     `-mcorea' or `-mcoreb'. If it's used without `-mcorea' or
+     `-mcoreb', single application/dual core programming model is used.
+     In this model, the main function of Core B should be named as
+     coreb_main. If it's used with `-mcorea' or `-mcoreb', one
+     application per core programming model is used.  If this option is
+     not used, single core application programming model is used.
+
+`-mcorea'
+     Build standalone application for Core A of BF561 when using one
+     application per core programming model. Proper start files and
+     link scripts will be used to support Core A. This option defines
+     `__BFIN_COREA'. It must be used with `-mmulticore'.
+
+`-mcoreb'
+     Build standalone application for Core B of BF561 when using one
+     application per core programming model. Proper start files and
+     link scripts will be used to support Core B. This option defines
+     `__BFIN_COREB'. When this option is used, coreb_main should be
+     used instead of main. It must be used with `-mmulticore'.
+
+`-msdram'
+     Build standalone application for SDRAM. Proper start files and
+     link scripts will be used to put the application into SDRAM.
+     Loader should initialize SDRAM before loading the application into
+     SDRAM. This option defines `__BFIN_SDRAM'.
+
+`-micplb'
+     Assume that ICPLBs are enabled at runtime.  This has an effect on
+     certain anomaly workarounds.  For Linux targets, the default is to
+     assume ICPLBs are enabled; for standalone applications the default
+     is off.
+
+
+File: gcc.info,  Node: CRIS Options,  Next: CRX Options,  Prev: Blackfin Options,  Up: Submodel Options
+
+3.17.5 CRIS Options
+-------------------
+
+These options are defined specifically for the CRIS ports.
+
+`-march=ARCHITECTURE-TYPE'
+`-mcpu=ARCHITECTURE-TYPE'
+     Generate code for the specified architecture.  The choices for
+     ARCHITECTURE-TYPE are `v3', `v8' and `v10' for respectively
+     ETRAX 4, ETRAX 100, and ETRAX 100 LX.  Default is `v0' except for
+     cris-axis-linux-gnu, where the default is `v10'.
+
+`-mtune=ARCHITECTURE-TYPE'
+     Tune to ARCHITECTURE-TYPE everything applicable about the generated
+     code, except for the ABI and the set of available instructions.
+     The choices for ARCHITECTURE-TYPE are the same as for
+     `-march=ARCHITECTURE-TYPE'.
+
+`-mmax-stack-frame=N'
+     Warn when the stack frame of a function exceeds N bytes.
+
+`-metrax4'
+`-metrax100'
+     The options `-metrax4' and `-metrax100' are synonyms for
+     `-march=v3' and `-march=v8' respectively.
+
+`-mmul-bug-workaround'
+`-mno-mul-bug-workaround'
+     Work around a bug in the `muls' and `mulu' instructions for CPU
+     models where it applies.  This option is active by default.
+
+`-mpdebug'
+     Enable CRIS-specific verbose debug-related information in the
+     assembly code.  This option also has the effect to turn off the
+     `#NO_APP' formatted-code indicator to the assembler at the
+     beginning of the assembly file.
+
+`-mcc-init'
+     Do not use condition-code results from previous instruction;
+     always emit compare and test instructions before use of condition
+     codes.
+
+`-mno-side-effects'
+     Do not emit instructions with side-effects in addressing modes
+     other than post-increment.
+
+`-mstack-align'
+`-mno-stack-align'
+`-mdata-align'
+`-mno-data-align'
+`-mconst-align'
+`-mno-const-align'
+     These options (no-options) arranges (eliminate arrangements) for
+     the stack-frame, individual data and constants to be aligned for
+     the maximum single data access size for the chosen CPU model.  The
+     default is to arrange for 32-bit alignment.  ABI details such as
+     structure layout are not affected by these options.
+
+`-m32-bit'
+`-m16-bit'
+`-m8-bit'
+     Similar to the stack- data- and const-align options above, these
+     options arrange for stack-frame, writable data and constants to
+     all be 32-bit, 16-bit or 8-bit aligned.  The default is 32-bit
+     alignment.
+
+`-mno-prologue-epilogue'
+`-mprologue-epilogue'
+     With `-mno-prologue-epilogue', the normal function prologue and
+     epilogue that sets up the stack-frame are omitted and no return
+     instructions or return sequences are generated in the code.  Use
+     this option only together with visual inspection of the compiled
+     code: no warnings or errors are generated when call-saved
+     registers must be saved, or storage for local variable needs to be
+     allocated.
+
+`-mno-gotplt'
+`-mgotplt'
+     With `-fpic' and `-fPIC', don't generate (do generate) instruction
+     sequences that load addresses for functions from the PLT part of
+     the GOT rather than (traditional on other architectures) calls to
+     the PLT.  The default is `-mgotplt'.
+
+`-melf'
+     Legacy no-op option only recognized with the cris-axis-elf and
+     cris-axis-linux-gnu targets.
+
+`-mlinux'
+     Legacy no-op option only recognized with the cris-axis-linux-gnu
+     target.
+
+`-sim'
+     This option, recognized for the cris-axis-elf arranges to link
+     with input-output functions from a simulator library.  Code,
+     initialized data and zero-initialized data are allocated
+     consecutively.
+
+`-sim2'
+     Like `-sim', but pass linker options to locate initialized data at
+     0x40000000 and zero-initialized data at 0x80000000.
+
+
+File: gcc.info,  Node: CRX Options,  Next: Darwin Options,  Prev: CRIS Options,  Up: Submodel Options
+
+3.17.6 CRX Options
+------------------
+
+These options are defined specifically for the CRX ports.
+
+`-mmac'
+     Enable the use of multiply-accumulate instructions. Disabled by
+     default.
+
+`-mpush-args'
+     Push instructions will be used to pass outgoing arguments when
+     functions are called. Enabled by default.
+
+
+File: gcc.info,  Node: Darwin Options,  Next: DEC Alpha Options,  Prev: CRX Options,  Up: Submodel Options
+
+3.17.7 Darwin Options
+---------------------
+
+These options are defined for all architectures running the Darwin
+operating system.
+
+ FSF GCC on Darwin does not create "fat" object files; it will create
+an object file for the single architecture that it was built to target.
+Apple's GCC on Darwin does create "fat" files if multiple `-arch'
+options are used; it does so by running the compiler or linker multiple
+times and joining the results together with `lipo'.
+
+ The subtype of the file created (like `ppc7400' or `ppc970' or `i686')
+is determined by the flags that specify the ISA that GCC is targetting,
+like `-mcpu' or `-march'.  The `-force_cpusubtype_ALL' option can be
+used to override this.
+
+ The Darwin tools vary in their behavior when presented with an ISA
+mismatch.  The assembler, `as', will only permit instructions to be
+used that are valid for the subtype of the file it is generating, so
+you cannot put 64-bit instructions in a `ppc750' object file.  The
+linker for shared libraries, `/usr/bin/libtool', will fail and print an
+error if asked to create a shared library with a less restrictive
+subtype than its input files (for instance, trying to put a `ppc970'
+object file in a `ppc7400' library).  The linker for executables, `ld',
+will quietly give the executable the most restrictive subtype of any of
+its input files.
+
+`-FDIR'
+     Add the framework directory DIR to the head of the list of
+     directories to be searched for header files.  These directories are
+     interleaved with those specified by `-I' options and are scanned
+     in a left-to-right order.
+
+     A framework directory is a directory with frameworks in it.  A
+     framework is a directory with a `"Headers"' and/or
+     `"PrivateHeaders"' directory contained directly in it that ends in
+     `".framework"'.  The name of a framework is the name of this
+     directory excluding the `".framework"'.  Headers associated with
+     the framework are found in one of those two directories, with
+     `"Headers"' being searched first.  A subframework is a framework
+     directory that is in a framework's `"Frameworks"' directory.
+     Includes of subframework headers can only appear in a header of a
+     framework that contains the subframework, or in a sibling
+     subframework header.  Two subframeworks are siblings if they occur
+     in the same framework.  A subframework should not have the same
+     name as a framework, a warning will be issued if this is violated.
+     Currently a subframework cannot have subframeworks, in the future,
+     the mechanism may be extended to support this.  The standard
+     frameworks can be found in `"/System/Library/Frameworks"' and
+     `"/Library/Frameworks"'.  An example include looks like `#include
+     <Framework/header.h>', where `Framework' denotes the name of the
+     framework and header.h is found in the `"PrivateHeaders"' or
+     `"Headers"' directory.
+
+`-iframeworkDIR'
+     Like `-F' except the directory is a treated as a system directory.
+     The main difference between this `-iframework' and `-F' is that
+     with `-iframework' the compiler does not warn about constructs
+     contained within header files found via DIR.  This option is valid
+     only for the C family of languages.
+
+`-gused'
+     Emit debugging information for symbols that are used.  For STABS
+     debugging format, this enables `-feliminate-unused-debug-symbols'.
+     This is by default ON.
+
+`-gfull'
+     Emit debugging information for all symbols and types.
+
+`-mmacosx-version-min=VERSION'
+     The earliest version of MacOS X that this executable will run on
+     is VERSION.  Typical values of VERSION include `10.1', `10.2', and
+     `10.3.9'.
+
+     If the compiler was built to use the system's headers by default,
+     then the default for this option is the system version on which the
+     compiler is running, otherwise the default is to make choices which
+     are compatible with as many systems and code bases as possible.
+
+`-mkernel'
+     Enable kernel development mode.  The `-mkernel' option sets
+     `-static', `-fno-common', `-fno-cxa-atexit', `-fno-exceptions',
+     `-fno-non-call-exceptions', `-fapple-kext', `-fno-weak' and
+     `-fno-rtti' where applicable.  This mode also sets `-mno-altivec',
+     `-msoft-float', `-fno-builtin' and `-mlong-branch' for PowerPC
+     targets.
+
+`-mone-byte-bool'
+     Override the defaults for `bool' so that `sizeof(bool)==1'.  By
+     default `sizeof(bool)' is `4' when compiling for Darwin/PowerPC
+     and `1' when compiling for Darwin/x86, so this option has no
+     effect on x86.
+
+     *Warning:* The `-mone-byte-bool' switch causes GCC to generate
+     code that is not binary compatible with code generated without
+     that switch.  Using this switch may require recompiling all other
+     modules in a program, including system libraries.  Use this switch
+     to conform to a non-default data model.
+
+`-mfix-and-continue'
+`-ffix-and-continue'
+`-findirect-data'
+     Generate code suitable for fast turn around development.  Needed to
+     enable gdb to dynamically load `.o' files into already running
+     programs.  `-findirect-data' and `-ffix-and-continue' are provided
+     for backwards compatibility.
+
+`-all_load'
+     Loads all members of static archive libraries.  See man ld(1) for
+     more information.
+
+`-arch_errors_fatal'
+     Cause the errors having to do with files that have the wrong
+     architecture to be fatal.
+
+`-bind_at_load'
+     Causes the output file to be marked such that the dynamic linker
+     will bind all undefined references when the file is loaded or
+     launched.
+
+`-bundle'
+     Produce a Mach-o bundle format file.  See man ld(1) for more
+     information.
+
+`-bundle_loader EXECUTABLE'
+     This option specifies the EXECUTABLE that will be loading the build
+     output file being linked.  See man ld(1) for more information.
+
+`-dynamiclib'
+     When passed this option, GCC will produce a dynamic library
+     instead of an executable when linking, using the Darwin `libtool'
+     command.
+
+`-force_cpusubtype_ALL'
+     This causes GCC's output file to have the ALL subtype, instead of
+     one controlled by the `-mcpu' or `-march' option.
+
+`-allowable_client  CLIENT_NAME'
+`-client_name'
+`-compatibility_version'
+`-current_version'
+`-dead_strip'
+`-dependency-file'
+`-dylib_file'
+`-dylinker_install_name'
+`-dynamic'
+`-exported_symbols_list'
+`-filelist'
+`-flat_namespace'
+`-force_flat_namespace'
+`-headerpad_max_install_names'
+`-image_base'
+`-init'
+`-install_name'
+`-keep_private_externs'
+`-multi_module'
+`-multiply_defined'
+`-multiply_defined_unused'
+`-noall_load'
+`-no_dead_strip_inits_and_terms'
+`-nofixprebinding'
+`-nomultidefs'
+`-noprebind'
+`-noseglinkedit'
+`-pagezero_size'
+`-prebind'
+`-prebind_all_twolevel_modules'
+`-private_bundle'
+`-read_only_relocs'
+`-sectalign'
+`-sectobjectsymbols'
+`-whyload'
+`-seg1addr'
+`-sectcreate'
+`-sectobjectsymbols'
+`-sectorder'
+`-segaddr'
+`-segs_read_only_addr'
+`-segs_read_write_addr'
+`-seg_addr_table'
+`-seg_addr_table_filename'
+`-seglinkedit'
+`-segprot'
+`-segs_read_only_addr'
+`-segs_read_write_addr'
+`-single_module'
+`-static'
+`-sub_library'
+`-sub_umbrella'
+`-twolevel_namespace'
+`-umbrella'
+`-undefined'
+`-unexported_symbols_list'
+`-weak_reference_mismatches'
+`-whatsloaded'
+     These options are passed to the Darwin linker.  The Darwin linker
+     man page describes them in detail.
+
+
+File: gcc.info,  Node: DEC Alpha Options,  Next: DEC Alpha/VMS Options,  Prev: Darwin Options,  Up: Submodel Options
+
+3.17.8 DEC Alpha Options
+------------------------
+
+These `-m' options are defined for the DEC Alpha implementations:
+
+`-mno-soft-float'
+`-msoft-float'
+     Use (do not use) the hardware floating-point instructions for
+     floating-point operations.  When `-msoft-float' is specified,
+     functions in `libgcc.a' will be used to perform floating-point
+     operations.  Unless they are replaced by routines that emulate the
+     floating-point operations, or compiled in such a way as to call
+     such emulations routines, these routines will issue floating-point
+     operations.   If you are compiling for an Alpha without
+     floating-point operations, you must ensure that the library is
+     built so as not to call them.
+
+     Note that Alpha implementations without floating-point operations
+     are required to have floating-point registers.
+
+`-mfp-reg'
+`-mno-fp-regs'
+     Generate code that uses (does not use) the floating-point register
+     set.  `-mno-fp-regs' implies `-msoft-float'.  If the floating-point
+     register set is not used, floating point operands are passed in
+     integer registers as if they were integers and floating-point
+     results are passed in `$0' instead of `$f0'.  This is a
+     non-standard calling sequence, so any function with a
+     floating-point argument or return value called by code compiled
+     with `-mno-fp-regs' must also be compiled with that option.
+
+     A typical use of this option is building a kernel that does not
+     use, and hence need not save and restore, any floating-point
+     registers.
+
+`-mieee'
+     The Alpha architecture implements floating-point hardware
+     optimized for maximum performance.  It is mostly compliant with
+     the IEEE floating point standard.  However, for full compliance,
+     software assistance is required.  This option generates code fully
+     IEEE compliant code _except_ that the INEXACT-FLAG is not
+     maintained (see below).  If this option is turned on, the
+     preprocessor macro `_IEEE_FP' is defined during compilation.  The
+     resulting code is less efficient but is able to correctly support
+     denormalized numbers and exceptional IEEE values such as
+     not-a-number and plus/minus infinity.  Other Alpha compilers call
+     this option `-ieee_with_no_inexact'.
+
+`-mieee-with-inexact'
+     This is like `-mieee' except the generated code also maintains the
+     IEEE INEXACT-FLAG.  Turning on this option causes the generated
+     code to implement fully-compliant IEEE math.  In addition to
+     `_IEEE_FP', `_IEEE_FP_EXACT' is defined as a preprocessor macro.
+     On some Alpha implementations the resulting code may execute
+     significantly slower than the code generated by default.  Since
+     there is very little code that depends on the INEXACT-FLAG, you
+     should normally not specify this option.  Other Alpha compilers
+     call this option `-ieee_with_inexact'.
+
+`-mfp-trap-mode=TRAP-MODE'
+     This option controls what floating-point related traps are enabled.
+     Other Alpha compilers call this option `-fptm TRAP-MODE'.  The
+     trap mode can be set to one of four values:
+
+    `n'
+          This is the default (normal) setting.  The only traps that
+          are enabled are the ones that cannot be disabled in software
+          (e.g., division by zero trap).
+
+    `u'
+          In addition to the traps enabled by `n', underflow traps are
+          enabled as well.
+
+    `su'
+          Like `u', but the instructions are marked to be safe for
+          software completion (see Alpha architecture manual for
+          details).
+
+    `sui'
+          Like `su', but inexact traps are enabled as well.
+
+`-mfp-rounding-mode=ROUNDING-MODE'
+     Selects the IEEE rounding mode.  Other Alpha compilers call this
+     option `-fprm ROUNDING-MODE'.  The ROUNDING-MODE can be one of:
+
+    `n'
+          Normal IEEE rounding mode.  Floating point numbers are
+          rounded towards the nearest machine number or towards the
+          even machine number in case of a tie.
+
+    `m'
+          Round towards minus infinity.
+
+    `c'
+          Chopped rounding mode.  Floating point numbers are rounded
+          towards zero.
+
+    `d'
+          Dynamic rounding mode.  A field in the floating point control
+          register (FPCR, see Alpha architecture reference manual)
+          controls the rounding mode in effect.  The C library
+          initializes this register for rounding towards plus infinity.
+          Thus, unless your program modifies the FPCR, `d' corresponds
+          to round towards plus infinity.
+
+`-mtrap-precision=TRAP-PRECISION'
+     In the Alpha architecture, floating point traps are imprecise.
+     This means without software assistance it is impossible to recover
+     from a floating trap and program execution normally needs to be
+     terminated.  GCC can generate code that can assist operating
+     system trap handlers in determining the exact location that caused
+     a floating point trap.  Depending on the requirements of an
+     application, different levels of precisions can be selected:
+
+    `p'
+          Program precision.  This option is the default and means a
+          trap handler can only identify which program caused a
+          floating point exception.
+
+    `f'
+          Function precision.  The trap handler can determine the
+          function that caused a floating point exception.
+
+    `i'
+          Instruction precision.  The trap handler can determine the
+          exact instruction that caused a floating point exception.
+
+     Other Alpha compilers provide the equivalent options called
+     `-scope_safe' and `-resumption_safe'.
+
+`-mieee-conformant'
+     This option marks the generated code as IEEE conformant.  You must
+     not use this option unless you also specify `-mtrap-precision=i'
+     and either `-mfp-trap-mode=su' or `-mfp-trap-mode=sui'.  Its only
+     effect is to emit the line `.eflag 48' in the function prologue of
+     the generated assembly file.  Under DEC Unix, this has the effect
+     that IEEE-conformant math library routines will be linked in.
+
+`-mbuild-constants'
+     Normally GCC examines a 32- or 64-bit integer constant to see if
+     it can construct it from smaller constants in two or three
+     instructions.  If it cannot, it will output the constant as a
+     literal and generate code to load it from the data segment at
+     runtime.
+
+     Use this option to require GCC to construct _all_ integer constants
+     using code, even if it takes more instructions (the maximum is
+     six).
+
+     You would typically use this option to build a shared library
+     dynamic loader.  Itself a shared library, it must relocate itself
+     in memory before it can find the variables and constants in its
+     own data segment.
+
+`-malpha-as'
+`-mgas'
+     Select whether to generate code to be assembled by the
+     vendor-supplied assembler (`-malpha-as') or by the GNU assembler
+     `-mgas'.
+
+`-mbwx'
+`-mno-bwx'
+`-mcix'
+`-mno-cix'
+`-mfix'
+`-mno-fix'
+`-mmax'
+`-mno-max'
+     Indicate whether GCC should generate code to use the optional BWX,
+     CIX, FIX and MAX instruction sets.  The default is to use the
+     instruction sets supported by the CPU type specified via `-mcpu='
+     option or that of the CPU on which GCC was built if none was
+     specified.
+
+`-mfloat-vax'
+`-mfloat-ieee'
+     Generate code that uses (does not use) VAX F and G floating point
+     arithmetic instead of IEEE single and double precision.
+
+`-mexplicit-relocs'
+`-mno-explicit-relocs'
+     Older Alpha assemblers provided no way to generate symbol
+     relocations except via assembler macros.  Use of these macros does
+     not allow optimal instruction scheduling.  GNU binutils as of
+     version 2.12 supports a new syntax that allows the compiler to
+     explicitly mark which relocations should apply to which
+     instructions.  This option is mostly useful for debugging, as GCC
+     detects the capabilities of the assembler when it is built and
+     sets the default accordingly.
+
+`-msmall-data'
+`-mlarge-data'
+     When `-mexplicit-relocs' is in effect, static data is accessed via
+     "gp-relative" relocations.  When `-msmall-data' is used, objects 8
+     bytes long or smaller are placed in a "small data area" (the
+     `.sdata' and `.sbss' sections) and are accessed via 16-bit
+     relocations off of the `$gp' register.  This limits the size of
+     the small data area to 64KB, but allows the variables to be
+     directly accessed via a single instruction.
+
+     The default is `-mlarge-data'.  With this option the data area is
+     limited to just below 2GB.  Programs that require more than 2GB of
+     data must use `malloc' or `mmap' to allocate the data in the heap
+     instead of in the program's data segment.
+
+     When generating code for shared libraries, `-fpic' implies
+     `-msmall-data' and `-fPIC' implies `-mlarge-data'.
+
+`-msmall-text'
+`-mlarge-text'
+     When `-msmall-text' is used, the compiler assumes that the code of
+     the entire program (or shared library) fits in 4MB, and is thus
+     reachable with a branch instruction.  When `-msmall-data' is used,
+     the compiler can assume that all local symbols share the same
+     `$gp' value, and thus reduce the number of instructions required
+     for a function call from 4 to 1.
+
+     The default is `-mlarge-text'.
+
+`-mcpu=CPU_TYPE'
+     Set the instruction set and instruction scheduling parameters for
+     machine type CPU_TYPE.  You can specify either the `EV' style name
+     or the corresponding chip number.  GCC supports scheduling
+     parameters for the EV4, EV5 and EV6 family of processors and will
+     choose the default values for the instruction set from the
+     processor you specify.  If you do not specify a processor type,
+     GCC will default to the processor on which the compiler was built.
+
+     Supported values for CPU_TYPE are
+
+    `ev4'
+    `ev45'
+    `21064'
+          Schedules as an EV4 and has no instruction set extensions.
+
+    `ev5'
+    `21164'
+          Schedules as an EV5 and has no instruction set extensions.
+
+    `ev56'
+    `21164a'
+          Schedules as an EV5 and supports the BWX extension.
+
+    `pca56'
+    `21164pc'
+    `21164PC'
+          Schedules as an EV5 and supports the BWX and MAX extensions.
+
+    `ev6'
+    `21264'
+          Schedules as an EV6 and supports the BWX, FIX, and MAX
+          extensions.
+
+    `ev67'
+    `21264a'
+          Schedules as an EV6 and supports the BWX, CIX, FIX, and MAX
+          extensions.
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-mcpu=native' has no effect if GCC does not recognize the
+     processor.
+
+`-mtune=CPU_TYPE'
+     Set only the instruction scheduling parameters for machine type
+     CPU_TYPE.  The instruction set is not changed.
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-mtune=native' has no effect if GCC does not recognize the
+     processor.
+
+`-mmemory-latency=TIME'
+     Sets the latency the scheduler should assume for typical memory
+     references as seen by the application.  This number is highly
+     dependent on the memory access patterns used by the application
+     and the size of the external cache on the machine.
+
+     Valid options for TIME are
+
+    `NUMBER'
+          A decimal number representing clock cycles.
+
+    `L1'
+    `L2'
+    `L3'
+    `main'
+          The compiler contains estimates of the number of clock cycles
+          for "typical" EV4 & EV5 hardware for the Level 1, 2 & 3 caches
+          (also called Dcache, Scache, and Bcache), as well as to main
+          memory.  Note that L3 is only valid for EV5.
+
+
+
+File: gcc.info,  Node: DEC Alpha/VMS Options,  Next: FR30 Options,  Prev: DEC Alpha Options,  Up: Submodel Options
+
+3.17.9 DEC Alpha/VMS Options
+----------------------------
+
+These `-m' options are defined for the DEC Alpha/VMS implementations:
+
+`-mvms-return-codes'
+     Return VMS condition codes from main.  The default is to return
+     POSIX style condition (e.g. error) codes.
+
+`-mdebug-main=PREFIX'
+     Flag the first routine whose name starts with PREFIX as the main
+     routine for the debugger.
+
+`-mmalloc64'
+     Default to 64bit memory allocation routines.
+
+
+File: gcc.info,  Node: FR30 Options,  Next: FRV Options,  Prev: DEC Alpha/VMS Options,  Up: Submodel Options
+
+3.17.10 FR30 Options
+--------------------
+
+These options are defined specifically for the FR30 port.
+
+`-msmall-model'
+     Use the small address space model.  This can produce smaller code,
+     but it does assume that all symbolic values and addresses will fit
+     into a 20-bit range.
+
+`-mno-lsim'
+     Assume that run-time support has been provided and so there is no
+     need to include the simulator library (`libsim.a') on the linker
+     command line.
+
+
+
+File: gcc.info,  Node: FRV Options,  Next: GNU/Linux Options,  Prev: FR30 Options,  Up: Submodel Options
+
+3.17.11 FRV Options
+-------------------
+
+`-mgpr-32'
+     Only use the first 32 general purpose registers.
+
+`-mgpr-64'
+     Use all 64 general purpose registers.
+
+`-mfpr-32'
+     Use only the first 32 floating point registers.
+
+`-mfpr-64'
+     Use all 64 floating point registers
+
+`-mhard-float'
+     Use hardware instructions for floating point operations.
+
+`-msoft-float'
+     Use library routines for floating point operations.
+
+`-malloc-cc'
+     Dynamically allocate condition code registers.
+
+`-mfixed-cc'
+     Do not try to dynamically allocate condition code registers, only
+     use `icc0' and `fcc0'.
+
+`-mdword'
+     Change ABI to use double word insns.
+
+`-mno-dword'
+     Do not use double word instructions.
+
+`-mdouble'
+     Use floating point double instructions.
+
+`-mno-double'
+     Do not use floating point double instructions.
+
+`-mmedia'
+     Use media instructions.
+
+`-mno-media'
+     Do not use media instructions.
+
+`-mmuladd'
+     Use multiply and add/subtract instructions.
+
+`-mno-muladd'
+     Do not use multiply and add/subtract instructions.
+
+`-mfdpic'
+     Select the FDPIC ABI, that uses function descriptors to represent
+     pointers to functions.  Without any PIC/PIE-related options, it
+     implies `-fPIE'.  With `-fpic' or `-fpie', it assumes GOT entries
+     and small data are within a 12-bit range from the GOT base
+     address; with `-fPIC' or `-fPIE', GOT offsets are computed with 32
+     bits.  With a `bfin-elf' target, this option implies `-msim'.
+
+`-minline-plt'
+     Enable inlining of PLT entries in function calls to functions that
+     are not known to bind locally.  It has no effect without `-mfdpic'.
+     It's enabled by default if optimizing for speed and compiling for
+     shared libraries (i.e., `-fPIC' or `-fpic'), or when an
+     optimization option such as `-O3' or above is present in the
+     command line.
+
+`-mTLS'
+     Assume a large TLS segment when generating thread-local code.
+
+`-mtls'
+     Do not assume a large TLS segment when generating thread-local
+     code.
+
+`-mgprel-ro'
+     Enable the use of `GPREL' relocations in the FDPIC ABI for data
+     that is known to be in read-only sections.  It's enabled by
+     default, except for `-fpic' or `-fpie': even though it may help
+     make the global offset table smaller, it trades 1 instruction for
+     4.  With `-fPIC' or `-fPIE', it trades 3 instructions for 4, one
+     of which may be shared by multiple symbols, and it avoids the need
+     for a GOT entry for the referenced symbol, so it's more likely to
+     be a win.  If it is not, `-mno-gprel-ro' can be used to disable it.
+
+`-multilib-library-pic'
+     Link with the (library, not FD) pic libraries.  It's implied by
+     `-mlibrary-pic', as well as by `-fPIC' and `-fpic' without
+     `-mfdpic'.  You should never have to use it explicitly.
+
+`-mlinked-fp'
+     Follow the EABI requirement of always creating a frame pointer
+     whenever a stack frame is allocated.  This option is enabled by
+     default and can be disabled with `-mno-linked-fp'.
+
+`-mlong-calls'
+     Use indirect addressing to call functions outside the current
+     compilation unit.  This allows the functions to be placed anywhere
+     within the 32-bit address space.
+
+`-malign-labels'
+     Try to align labels to an 8-byte boundary by inserting nops into
+     the previous packet.  This option only has an effect when VLIW
+     packing is enabled.  It doesn't create new packets; it merely adds
+     nops to existing ones.
+
+`-mlibrary-pic'
+     Generate position-independent EABI code.
+
+`-macc-4'
+     Use only the first four media accumulator registers.
+
+`-macc-8'
+     Use all eight media accumulator registers.
+
+`-mpack'
+     Pack VLIW instructions.
+
+`-mno-pack'
+     Do not pack VLIW instructions.
+
+`-mno-eflags'
+     Do not mark ABI switches in e_flags.
+
+`-mcond-move'
+     Enable the use of conditional-move instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-cond-move'
+     Disable the use of conditional-move instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mscc'
+     Enable the use of conditional set instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-scc'
+     Disable the use of conditional set instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mcond-exec'
+     Enable the use of conditional execution (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-cond-exec'
+     Disable the use of conditional execution.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mvliw-branch'
+     Run a pass to pack branches into VLIW instructions (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-vliw-branch'
+     Do not run a pass to pack branches into VLIW instructions.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mmulti-cond-exec'
+     Enable optimization of `&&' and `||' in conditional execution
+     (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-multi-cond-exec'
+     Disable optimization of `&&' and `||' in conditional execution.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mnested-cond-exec'
+     Enable nested conditional execution optimizations (default).
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-mno-nested-cond-exec'
+     Disable nested conditional execution optimizations.
+
+     This switch is mainly for debugging the compiler and will likely
+     be removed in a future version.
+
+`-moptimize-membar'
+     This switch removes redundant `membar' instructions from the
+     compiler generated code.  It is enabled by default.
+
+`-mno-optimize-membar'
+     This switch disables the automatic removal of redundant `membar'
+     instructions from the generated code.
+
+`-mtomcat-stats'
+     Cause gas to print out tomcat statistics.
+
+`-mcpu=CPU'
+     Select the processor type for which to generate code.  Possible
+     values are `frv', `fr550', `tomcat', `fr500', `fr450', `fr405',
+     `fr400', `fr300' and `simple'.
+
+
+
+File: gcc.info,  Node: GNU/Linux Options,  Next: H8/300 Options,  Prev: FRV Options,  Up: Submodel Options
+
+3.17.12 GNU/Linux Options
+-------------------------
+
+These `-m' options are defined for GNU/Linux targets:
+
+`-mglibc'
+     Use the GNU C library instead of uClibc.  This is the default
+     except on `*-*-linux-*uclibc*' targets.
+
+`-muclibc'
+     Use uClibc instead of the GNU C library.  This is the default on
+     `*-*-linux-*uclibc*' targets.
+
+
+File: gcc.info,  Node: H8/300 Options,  Next: HPPA Options,  Prev: GNU/Linux Options,  Up: Submodel Options
+
+3.17.13 H8/300 Options
+----------------------
+
+These `-m' options are defined for the H8/300 implementations:
+
+`-mrelax'
+     Shorten some address references at link time, when possible; uses
+     the linker option `-relax'.  *Note `ld' and the H8/300:
+     (ld)H8/300, for a fuller description.
+
+`-mh'
+     Generate code for the H8/300H.
+
+`-ms'
+     Generate code for the H8S.
+
+`-mn'
+     Generate code for the H8S and H8/300H in the normal mode.  This
+     switch must be used either with `-mh' or `-ms'.
+
+`-ms2600'
+     Generate code for the H8S/2600.  This switch must be used with
+     `-ms'.
+
+`-mint32'
+     Make `int' data 32 bits by default.
+
+`-malign-300'
+     On the H8/300H and H8S, use the same alignment rules as for the
+     H8/300.  The default for the H8/300H and H8S is to align longs and
+     floats on 4 byte boundaries.  `-malign-300' causes them to be
+     aligned on 2 byte boundaries.  This option has no effect on the
+     H8/300.
+
+
+File: gcc.info,  Node: HPPA Options,  Next: i386 and x86-64 Options,  Prev: H8/300 Options,  Up: Submodel Options
+
+3.17.14 HPPA Options
+--------------------
+
+These `-m' options are defined for the HPPA family of computers:
+
+`-march=ARCHITECTURE-TYPE'
+     Generate code for the specified architecture.  The choices for
+     ARCHITECTURE-TYPE are `1.0' for PA 1.0, `1.1' for PA 1.1, and
+     `2.0' for PA 2.0 processors.  Refer to `/usr/lib/sched.models' on
+     an HP-UX system to determine the proper architecture option for
+     your machine.  Code compiled for lower numbered architectures will
+     run on higher numbered architectures, but not the other way around.
+
+`-mpa-risc-1-0'
+`-mpa-risc-1-1'
+`-mpa-risc-2-0'
+     Synonyms for `-march=1.0', `-march=1.1', and `-march=2.0'
+     respectively.
+
+`-mbig-switch'
+     Generate code suitable for big switch tables.  Use this option
+     only if the assembler/linker complain about out of range branches
+     within a switch table.
+
+`-mjump-in-delay'
+     Fill delay slots of function calls with unconditional jump
+     instructions by modifying the return pointer for the function call
+     to be the target of the conditional jump.
+
+`-mdisable-fpregs'
+     Prevent floating point registers from being used in any manner.
+     This is necessary for compiling kernels which perform lazy context
+     switching of floating point registers.  If you use this option and
+     attempt to perform floating point operations, the compiler will
+     abort.
+
+`-mdisable-indexing'
+     Prevent the compiler from using indexing address modes.  This
+     avoids some rather obscure problems when compiling MIG generated
+     code under MACH.
+
+`-mno-space-regs'
+     Generate code that assumes the target has no space registers.
+     This allows GCC to generate faster indirect calls and use unscaled
+     index address modes.
+
+     Such code is suitable for level 0 PA systems and kernels.
+
+`-mfast-indirect-calls'
+     Generate code that assumes calls never cross space boundaries.
+     This allows GCC to emit code which performs faster indirect calls.
+
+     This option will not work in the presence of shared libraries or
+     nested functions.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mlong-load-store'
+     Generate 3-instruction load and store sequences as sometimes
+     required by the HP-UX 10 linker.  This is equivalent to the `+k'
+     option to the HP compilers.
+
+`-mportable-runtime'
+     Use the portable calling conventions proposed by HP for ELF
+     systems.
+
+`-mgas'
+     Enable the use of assembler directives only GAS understands.
+
+`-mschedule=CPU-TYPE'
+     Schedule code according to the constraints for the machine type
+     CPU-TYPE.  The choices for CPU-TYPE are `700' `7100', `7100LC',
+     `7200', `7300' and `8000'.  Refer to `/usr/lib/sched.models' on an
+     HP-UX system to determine the proper scheduling option for your
+     machine.  The default scheduling is `8000'.
+
+`-mlinker-opt'
+     Enable the optimization pass in the HP-UX linker.  Note this makes
+     symbolic debugging impossible.  It also triggers a bug in the
+     HP-UX 8 and HP-UX 9 linkers in which they give bogus error
+     messages when linking some programs.
+
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not available for all HPPA
+     targets.  Normally the facilities of the machine's usual C
+     compiler are used, but this cannot be done directly in
+     cross-compilation.  You must make your own arrangements to provide
+     suitable library functions for cross-compilation.
+
+     `-msoft-float' changes the calling convention in the output file;
+     therefore, it is only useful if you compile _all_ of a program with
+     this option.  In particular, you need to compile `libgcc.a', the
+     library that comes with GCC, with `-msoft-float' in order for this
+     to work.
+
+`-msio'
+     Generate the predefine, `_SIO', for server IO.  The default is
+     `-mwsio'.  This generates the predefines, `__hp9000s700',
+     `__hp9000s700__' and `_WSIO', for workstation IO.  These options
+     are available under HP-UX and HI-UX.
+
+`-mgnu-ld'
+     Use GNU ld specific options.  This passes `-shared' to ld when
+     building a shared library.  It is the default when GCC is
+     configured, explicitly or implicitly, with the GNU linker.  This
+     option does not have any affect on which ld is called, it only
+     changes what parameters are passed to that ld.  The ld that is
+     called is determined by the `--with-ld' configure option, GCC's
+     program search path, and finally by the user's `PATH'.  The linker
+     used by GCC can be printed using `which `gcc
+     -print-prog-name=ld`'.  This option is only available on the 64
+     bit HP-UX GCC, i.e. configured with `hppa*64*-*-hpux*'.
+
+`-mhp-ld'
+     Use HP ld specific options.  This passes `-b' to ld when building
+     a shared library and passes `+Accept TypeMismatch' to ld on all
+     links.  It is the default when GCC is configured, explicitly or
+     implicitly, with the HP linker.  This option does not have any
+     affect on which ld is called, it only changes what parameters are
+     passed to that ld.  The ld that is called is determined by the
+     `--with-ld' configure option, GCC's program search path, and
+     finally by the user's `PATH'.  The linker used by GCC can be
+     printed using `which `gcc -print-prog-name=ld`'.  This option is
+     only available on the 64 bit HP-UX GCC, i.e. configured with
+     `hppa*64*-*-hpux*'.
+
+`-mlong-calls'
+     Generate code that uses long call sequences.  This ensures that a
+     call is always able to reach linker generated stubs.  The default
+     is to generate long calls only when the distance from the call
+     site to the beginning of the function or translation unit, as the
+     case may be, exceeds a predefined limit set by the branch type
+     being used.  The limits for normal calls are 7,600,000 and 240,000
+     bytes, respectively for the PA 2.0 and PA 1.X architectures.
+     Sibcalls are always limited at 240,000 bytes.
+
+     Distances are measured from the beginning of functions when using
+     the `-ffunction-sections' option, or when using the `-mgas' and
+     `-mno-portable-runtime' options together under HP-UX with the SOM
+     linker.
+
+     It is normally not desirable to use this option as it will degrade
+     performance.  However, it may be useful in large applications,
+     particularly when partial linking is used to build the application.
+
+     The types of long calls used depends on the capabilities of the
+     assembler and linker, and the type of code being generated.  The
+     impact on systems that support long absolute calls, and long pic
+     symbol-difference or pc-relative calls should be relatively small.
+     However, an indirect call is used on 32-bit ELF systems in pic code
+     and it is quite long.
+
+`-munix=UNIX-STD'
+     Generate compiler predefines and select a startfile for the
+     specified UNIX standard.  The choices for UNIX-STD are `93', `95'
+     and `98'.  `93' is supported on all HP-UX versions.  `95' is
+     available on HP-UX 10.10 and later.  `98' is available on HP-UX
+     11.11 and later.  The default values are `93' for HP-UX 10.00,
+     `95' for HP-UX 10.10 though to 11.00, and `98' for HP-UX 11.11 and
+     later.
+
+     `-munix=93' provides the same predefines as GCC 3.3 and 3.4.
+     `-munix=95' provides additional predefines for `XOPEN_UNIX' and
+     `_XOPEN_SOURCE_EXTENDED', and the startfile `unix95.o'.
+     `-munix=98' provides additional predefines for `_XOPEN_UNIX',
+     `_XOPEN_SOURCE_EXTENDED', `_INCLUDE__STDC_A1_SOURCE' and
+     `_INCLUDE_XOPEN_SOURCE_500', and the startfile `unix98.o'.
+
+     It is _important_ to note that this option changes the interfaces
+     for various library routines.  It also affects the operational
+     behavior of the C library.  Thus, _extreme_ care is needed in
+     using this option.
+
+     Library code that is intended to operate with more than one UNIX
+     standard must test, set and restore the variable
+     __XPG4_EXTENDED_MASK as appropriate.  Most GNU software doesn't
+     provide this capability.
+
+`-nolibdld'
+     Suppress the generation of link options to search libdld.sl when
+     the `-static' option is specified on HP-UX 10 and later.
+
+`-static'
+     The HP-UX implementation of setlocale in libc has a dependency on
+     libdld.sl.  There isn't an archive version of libdld.sl.  Thus,
+     when the `-static' option is specified, special link options are
+     needed to resolve this dependency.
+
+     On HP-UX 10 and later, the GCC driver adds the necessary options to
+     link with libdld.sl when the `-static' option is specified.  This
+     causes the resulting binary to be dynamic.  On the 64-bit port,
+     the linkers generate dynamic binaries by default in any case.  The
+     `-nolibdld' option can be used to prevent the GCC driver from
+     adding these link options.
+
+`-threads'
+     Add support for multithreading with the "dce thread" library under
+     HP-UX.  This option sets flags for both the preprocessor and
+     linker.
+
+
+File: gcc.info,  Node: i386 and x86-64 Options,  Next: i386 and x86-64 Windows Options,  Prev: HPPA Options,  Up: Submodel Options
+
+3.17.15 Intel 386 and AMD x86-64 Options
+----------------------------------------
+
+These `-m' options are defined for the i386 and x86-64 family of
+computers:
+
+`-mtune=CPU-TYPE'
+     Tune to CPU-TYPE everything applicable about the generated code,
+     except for the ABI and the set of available instructions.  The
+     choices for CPU-TYPE are:
+    _generic_
+          Produce code optimized for the most common IA32/AMD64/EM64T
+          processors.  If you know the CPU on which your code will run,
+          then you should use the corresponding `-mtune' option instead
+          of `-mtune=generic'.  But, if you do not know exactly what
+          CPU users of your application will have, then you should use
+          this option.
+
+          As new processors are deployed in the marketplace, the
+          behavior of this option will change.  Therefore, if you
+          upgrade to a newer version of GCC, the code generated option
+          will change to reflect the processors that were most common
+          when that version of GCC was released.
+
+          There is no `-march=generic' option because `-march'
+          indicates the instruction set the compiler can use, and there
+          is no generic instruction set applicable to all processors.
+          In contrast, `-mtune' indicates the processor (or, in this
+          case, collection of processors) for which the code is
+          optimized.
+
+    _native_
+          This selects the CPU to tune for at compilation time by
+          determining the processor type of the compiling machine.
+          Using `-mtune=native' will produce code optimized for the
+          local machine under the constraints of the selected
+          instruction set.  Using `-march=native' will enable all
+          instruction subsets supported by the local machine (hence the
+          result might not run on different machines).
+
+    _i386_
+          Original Intel's i386 CPU.
+
+    _i486_
+          Intel's i486 CPU.  (No scheduling is implemented for this
+          chip.)
+
+    _i586, pentium_
+          Intel Pentium CPU with no MMX support.
+
+    _pentium-mmx_
+          Intel PentiumMMX CPU based on Pentium core with MMX
+          instruction set support.
+
+    _pentiumpro_
+          Intel PentiumPro CPU.
+
+    _i686_
+          Same as `generic', but when used as `march' option, PentiumPro
+          instruction set will be used, so the code will run on all
+          i686 family chips.
+
+    _pentium2_
+          Intel Pentium2 CPU based on PentiumPro core with MMX
+          instruction set support.
+
+    _pentium3, pentium3m_
+          Intel Pentium3 CPU based on PentiumPro core with MMX and SSE
+          instruction set support.
+
+    _pentium-m_
+          Low power version of Intel Pentium3 CPU with MMX, SSE and
+          SSE2 instruction set support.  Used by Centrino notebooks.
+
+    _pentium4, pentium4m_
+          Intel Pentium4 CPU with MMX, SSE and SSE2 instruction set
+          support.
+
+    _prescott_
+          Improved version of Intel Pentium4 CPU with MMX, SSE, SSE2
+          and SSE3 instruction set support.
+
+    _nocona_
+          Improved version of Intel Pentium4 CPU with 64-bit
+          extensions, MMX, SSE, SSE2 and SSE3 instruction set support.
+
+    _core2_
+          Intel Core2 CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
+          and SSSE3 instruction set support.
+
+    _atom_
+          Intel Atom CPU with 64-bit extensions, MMX, SSE, SSE2, SSE3
+          and SSSE3 instruction set support.
+
+    _k6_
+          AMD K6 CPU with MMX instruction set support.
+
+    _k6-2, k6-3_
+          Improved versions of AMD K6 CPU with MMX and 3DNow!
+          instruction set support.
+
+    _athlon, athlon-tbird_
+          AMD Athlon CPU with MMX, 3dNOW!, enhanced 3DNow! and SSE
+          prefetch instructions support.
+
+    _athlon-4, athlon-xp, athlon-mp_
+          Improved AMD Athlon CPU with MMX, 3DNow!, enhanced 3DNow! and
+          full SSE instruction set support.
+
+    _k8, opteron, athlon64, athlon-fx_
+          AMD K8 core based CPUs with x86-64 instruction set support.
+          (This supersets MMX, SSE, SSE2, 3DNow!, enhanced 3DNow! and
+          64-bit instruction set extensions.)
+
+    _k8-sse3, opteron-sse3, athlon64-sse3_
+          Improved versions of k8, opteron and athlon64 with SSE3
+          instruction set support.
+
+    _amdfam10, barcelona_
+          AMD Family 10h core based CPUs with x86-64 instruction set
+          support.  (This supersets MMX, SSE, SSE2, SSE3, SSE4A,
+          3DNow!, enhanced 3DNow!, ABM and 64-bit instruction set
+          extensions.)
+
+    _winchip-c6_
+          IDT Winchip C6 CPU, dealt in same way as i486 with additional
+          MMX instruction set support.
+
+    _winchip2_
+          IDT Winchip2 CPU, dealt in same way as i486 with additional
+          MMX and 3DNow!  instruction set support.
+
+    _c3_
+          Via C3 CPU with MMX and 3DNow! instruction set support.  (No
+          scheduling is implemented for this chip.)
+
+    _c3-2_
+          Via C3-2 CPU with MMX and SSE instruction set support.  (No
+          scheduling is implemented for this chip.)
+
+    _geode_
+          Embedded AMD CPU with MMX and 3DNow! instruction set support.
+
+     While picking a specific CPU-TYPE will schedule things
+     appropriately for that particular chip, the compiler will not
+     generate any code that does not run on the i386 without the
+     `-march=CPU-TYPE' option being used.
+
+`-march=CPU-TYPE'
+     Generate instructions for the machine type CPU-TYPE.  The choices
+     for CPU-TYPE are the same as for `-mtune'.  Moreover, specifying
+     `-march=CPU-TYPE' implies `-mtune=CPU-TYPE'.
+
+`-mcpu=CPU-TYPE'
+     A deprecated synonym for `-mtune'.
+
+`-mfpmath=UNIT'
+     Generate floating point arithmetics for selected unit UNIT.  The
+     choices for UNIT are:
+
+    `387'
+          Use the standard 387 floating point coprocessor present
+          majority of chips and emulated otherwise.  Code compiled with
+          this option will run almost everywhere.  The temporary
+          results are computed in 80bit precision instead of precision
+          specified by the type resulting in slightly different results
+          compared to most of other chips.  See `-ffloat-store' for
+          more detailed description.
+
+          This is the default choice for i386 compiler.
+
+    `sse'
+          Use scalar floating point instructions present in the SSE
+          instruction set.  This instruction set is supported by
+          Pentium3 and newer chips, in the AMD line by Athlon-4,
+          Athlon-xp and Athlon-mp chips.  The earlier version of SSE
+          instruction set supports only single precision arithmetics,
+          thus the double and extended precision arithmetics is still
+          done using 387.  Later version, present only in Pentium4 and
+          the future AMD x86-64 chips supports double precision
+          arithmetics too.
+
+          For the i386 compiler, you need to use `-march=CPU-TYPE',
+          `-msse' or `-msse2' switches to enable SSE extensions and
+          make this option effective.  For the x86-64 compiler, these
+          extensions are enabled by default.
+
+          The resulting code should be considerably faster in the
+          majority of cases and avoid the numerical instability
+          problems of 387 code, but may break some existing code that
+          expects temporaries to be 80bit.
+
+          This is the default choice for the x86-64 compiler.
+
+    `sse,387'
+    `sse+387'
+    `both'
+          Attempt to utilize both instruction sets at once.  This
+          effectively double the amount of available registers and on
+          chips with separate execution units for 387 and SSE the
+          execution resources too.  Use this option with care, as it is
+          still experimental, because the GCC register allocator does
+          not model separate functional units well resulting in
+          instable performance.
+
+`-masm=DIALECT'
+     Output asm instructions using selected DIALECT.  Supported choices
+     are `intel' or `att' (the default one).  Darwin does not support
+     `intel'.
+
+`-mieee-fp'
+`-mno-ieee-fp'
+     Control whether or not the compiler uses IEEE floating point
+     comparisons.  These handle correctly the case where the result of a
+     comparison is unordered.
+
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not part of GCC.  Normally
+     the facilities of the machine's usual C compiler are used, but
+     this can't be done directly in cross-compilation.  You must make
+     your own arrangements to provide suitable library functions for
+     cross-compilation.
+
+     On machines where a function returns floating point results in the
+     80387 register stack, some floating point opcodes may be emitted
+     even if `-msoft-float' is used.
+
+`-mno-fp-ret-in-387'
+     Do not use the FPU registers for return values of functions.
+
+     The usual calling convention has functions return values of types
+     `float' and `double' in an FPU register, even if there is no FPU.
+     The idea is that the operating system should emulate an FPU.
+
+     The option `-mno-fp-ret-in-387' causes such values to be returned
+     in ordinary CPU registers instead.
+
+`-mno-fancy-math-387'
+     Some 387 emulators do not support the `sin', `cos' and `sqrt'
+     instructions for the 387.  Specify this option to avoid generating
+     those instructions.  This option is the default on FreeBSD,
+     OpenBSD and NetBSD.  This option is overridden when `-march'
+     indicates that the target cpu will always have an FPU and so the
+     instruction will not need emulation.  As of revision 2.6.1, these
+     instructions are not generated unless you also use the
+     `-funsafe-math-optimizations' switch.
+
+`-malign-double'
+`-mno-align-double'
+     Control whether GCC aligns `double', `long double', and `long
+     long' variables on a two word boundary or a one word boundary.
+     Aligning `double' variables on a two word boundary will produce
+     code that runs somewhat faster on a `Pentium' at the expense of
+     more memory.
+
+     On x86-64, `-malign-double' is enabled by default.
+
+     *Warning:* if you use the `-malign-double' switch, structures
+     containing the above types will be aligned differently than the
+     published application binary interface specifications for the 386
+     and will not be binary compatible with structures in code compiled
+     without that switch.
+
+`-m96bit-long-double'
+`-m128bit-long-double'
+     These switches control the size of `long double' type.  The i386
+     application binary interface specifies the size to be 96 bits, so
+     `-m96bit-long-double' is the default in 32 bit mode.
+
+     Modern architectures (Pentium and newer) would prefer `long double'
+     to be aligned to an 8 or 16 byte boundary.  In arrays or structures
+     conforming to the ABI, this would not be possible.  So specifying a
+     `-m128bit-long-double' will align `long double' to a 16 byte
+     boundary by padding the `long double' with an additional 32 bit
+     zero.
+
+     In the x86-64 compiler, `-m128bit-long-double' is the default
+     choice as its ABI specifies that `long double' is to be aligned on
+     16 byte boundary.
+
+     Notice that neither of these options enable any extra precision
+     over the x87 standard of 80 bits for a `long double'.
+
+     *Warning:* if you override the default value for your target ABI,
+     the structures and arrays containing `long double' variables will
+     change their size as well as function calling convention for
+     function taking `long double' will be modified.  Hence they will
+     not be binary compatible with arrays or structures in code
+     compiled without that switch.
+
+`-mlarge-data-threshold=NUMBER'
+     When `-mcmodel=medium' is specified, the data greater than
+     THRESHOLD are placed in large data section.  This value must be the
+     same across all object linked into the binary and defaults to
+     65535.
+
+`-mrtd'
+     Use a different function-calling convention, in which functions
+     that take a fixed number of arguments return with the `ret' NUM
+     instruction, which pops their arguments while returning.  This
+     saves one instruction in the caller since there is no need to pop
+     the arguments there.
+
+     You can specify that an individual function is called with this
+     calling sequence with the function attribute `stdcall'.  You can
+     also override the `-mrtd' option by using the function attribute
+     `cdecl'.  *Note Function Attributes::.
+
+     *Warning:* this calling convention is incompatible with the one
+     normally used on Unix, so you cannot use it if you need to call
+     libraries compiled with the Unix compiler.
+
+     Also, you must provide function prototypes for all functions that
+     take variable numbers of arguments (including `printf'); otherwise
+     incorrect code will be generated for calls to those functions.
+
+     In addition, seriously incorrect code will result if you call a
+     function with too many arguments.  (Normally, extra arguments are
+     harmlessly ignored.)
+
+`-mregparm=NUM'
+     Control how many registers are used to pass integer arguments.  By
+     default, no registers are used to pass arguments, and at most 3
+     registers can be used.  You can control this behavior for a
+     specific function by using the function attribute `regparm'.
+     *Note Function Attributes::.
+
+     *Warning:* if you use this switch, and NUM is nonzero, then you
+     must build all modules with the same value, including any
+     libraries.  This includes the system libraries and startup modules.
+
+`-msseregparm'
+     Use SSE register passing conventions for float and double arguments
+     and return values.  You can control this behavior for a specific
+     function by using the function attribute `sseregparm'.  *Note
+     Function Attributes::.
+
+     *Warning:* if you use this switch then you must build all modules
+     with the same value, including any libraries.  This includes the
+     system libraries and startup modules.
+
+`-mpc32'
+`-mpc64'
+`-mpc80'
+     Set 80387 floating-point precision to 32, 64 or 80 bits.  When
+     `-mpc32' is specified, the significands of results of
+     floating-point operations are rounded to 24 bits (single
+     precision); `-mpc64' rounds the significands of results of
+     floating-point operations to 53 bits (double precision) and
+     `-mpc80' rounds the significands of results of floating-point
+     operations to 64 bits (extended double precision), which is the
+     default.  When this option is used, floating-point operations in
+     higher precisions are not available to the programmer without
+     setting the FPU control word explicitly.
+
+     Setting the rounding of floating-point operations to less than the
+     default 80 bits can speed some programs by 2% or more.  Note that
+     some mathematical libraries assume that extended precision (80
+     bit) floating-point operations are enabled by default; routines in
+     such libraries could suffer significant loss of accuracy,
+     typically through so-called "catastrophic cancellation", when this
+     option is used to set the precision to less than extended
+     precision.
+
+`-mstackrealign'
+     Realign the stack at entry.  On the Intel x86, the `-mstackrealign'
+     option will generate an alternate prologue and epilogue that
+     realigns the runtime stack if necessary.  This supports mixing
+     legacy codes that keep a 4-byte aligned stack with modern codes
+     that keep a 16-byte stack for SSE compatibility.  See also the
+     attribute `force_align_arg_pointer', applicable to individual
+     functions.
+
+`-mpreferred-stack-boundary=NUM'
+     Attempt to keep the stack boundary aligned to a 2 raised to NUM
+     byte boundary.  If `-mpreferred-stack-boundary' is not specified,
+     the default is 4 (16 bytes or 128 bits).
+
+`-mincoming-stack-boundary=NUM'
+     Assume the incoming stack is aligned to a 2 raised to NUM byte
+     boundary.  If `-mincoming-stack-boundary' is not specified, the
+     one specified by `-mpreferred-stack-boundary' will be used.
+
+     On Pentium and PentiumPro, `double' and `long double' values
+     should be aligned to an 8 byte boundary (see `-malign-double') or
+     suffer significant run time performance penalties.  On Pentium
+     III, the Streaming SIMD Extension (SSE) data type `__m128' may not
+     work properly if it is not 16 byte aligned.
+
+     To ensure proper alignment of this values on the stack, the stack
+     boundary must be as aligned as that required by any value stored
+     on the stack.  Further, every function must be generated such that
+     it keeps the stack aligned.  Thus calling a function compiled with
+     a higher preferred stack boundary from a function compiled with a
+     lower preferred stack boundary will most likely misalign the
+     stack.  It is recommended that libraries that use callbacks always
+     use the default setting.
+
+     This extra alignment does consume extra stack space, and generally
+     increases code size.  Code that is sensitive to stack space usage,
+     such as embedded systems and operating system kernels, may want to
+     reduce the preferred alignment to `-mpreferred-stack-boundary=2'.
+
+`-mmmx'
+`-mno-mmx'
+`-msse'
+`-mno-sse'
+`-msse2'
+`-mno-sse2'
+`-msse3'
+`-mno-sse3'
+`-mssse3'
+`-mno-ssse3'
+`-msse4.1'
+`-mno-sse4.1'
+`-msse4.2'
+`-mno-sse4.2'
+`-msse4'
+`-mno-sse4'
+`-mavx'
+`-mno-avx'
+`-maes'
+`-mno-aes'
+`-mpclmul'
+`-mno-pclmul'
+`-msse4a'
+`-mno-sse4a'
+`-mfma4'
+`-mno-fma4'
+`-mxop'
+`-mno-xop'
+`-mlwp'
+`-mno-lwp'
+`-m3dnow'
+`-mno-3dnow'
+`-mpopcnt'
+`-mno-popcnt'
+`-mabm'
+`-mno-abm'
+     These switches enable or disable the use of instructions in the
+     MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, AVX, AES, PCLMUL, SSE4A,
+     FMA4, XOP, LWP, ABM or 3DNow! extended instruction sets.  These
+     extensions are also available as built-in functions: see *note X86
+     Built-in Functions::, for details of the functions enabled and
+     disabled by these switches.
+
+     To have SSE/SSE2 instructions generated automatically from
+     floating-point code (as opposed to 387 instructions), see
+     `-mfpmath=sse'.
+
+     GCC depresses SSEx instructions when `-mavx' is used. Instead, it
+     generates new AVX instructions or AVX equivalence for all SSEx
+     instructions when needed.
+
+     These options will enable GCC to use these extended instructions in
+     generated code, even without `-mfpmath=sse'.  Applications which
+     perform runtime CPU detection must compile separate files for each
+     supported architecture, using the appropriate flags.  In
+     particular, the file containing the CPU detection code should be
+     compiled without these options.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Do (don't) generate code that uses the fused multiply/add or
+     multiply/subtract instructions.  The default is to use these
+     instructions.
+
+`-mcld'
+     This option instructs GCC to emit a `cld' instruction in the
+     prologue of functions that use string instructions.  String
+     instructions depend on the DF flag to select between autoincrement
+     or autodecrement mode.  While the ABI specifies the DF flag to be
+     cleared on function entry, some operating systems violate this
+     specification by not clearing the DF flag in their exception
+     dispatchers.  The exception handler can be invoked with the DF flag
+     set which leads to wrong direction mode, when string instructions
+     are used.  This option can be enabled by default on 32-bit x86
+     targets by configuring GCC with the `--enable-cld' configure
+     option.  Generation of `cld' instructions can be suppressed with
+     the `-mno-cld' compiler option in this case.
+
+`-mcx16'
+     This option will enable GCC to use CMPXCHG16B instruction in
+     generated code.  CMPXCHG16B allows for atomic operations on
+     128-bit double quadword (or oword) data types.  This is useful for
+     high resolution counters that could be updated by multiple
+     processors (or cores).  This instruction is generated as part of
+     atomic built-in functions: see *note Atomic Builtins:: for details.
+
+`-msahf'
+     This option will enable GCC to use SAHF instruction in generated
+     64-bit code.  Early Intel CPUs with Intel 64 lacked LAHF and SAHF
+     instructions supported by AMD64 until introduction of Pentium 4 G1
+     step in December 2005.  LAHF and SAHF are load and store
+     instructions, respectively, for certain status flags.  In 64-bit
+     mode, SAHF instruction is used to optimize `fmod', `drem' or
+     `remainder' built-in functions: see *note Other Builtins:: for
+     details.
+
+`-mmovbe'
+     This option will enable GCC to use movbe instruction to implement
+     `__builtin_bswap32' and `__builtin_bswap64'.
+
+`-mcrc32'
+     This option will enable built-in functions,
+     `__builtin_ia32_crc32qi', `__builtin_ia32_crc32hi'.
+     `__builtin_ia32_crc32si' and `__builtin_ia32_crc32di' to generate
+     the crc32 machine instruction.
+
+`-mrecip'
+     This option will enable GCC to use RCPSS and RSQRTSS instructions
+     (and their vectorized variants RCPPS and RSQRTPS) with an
+     additional Newton-Raphson step to increase precision instead of
+     DIVSS and SQRTSS (and their vectorized variants) for single
+     precision floating point arguments.  These instructions are
+     generated only when `-funsafe-math-optimizations' is enabled
+     together with `-finite-math-only' and `-fno-trapping-math'.  Note
+     that while the throughput of the sequence is higher than the
+     throughput of the non-reciprocal instruction, the precision of the
+     sequence can be decreased by up to 2 ulp (i.e. the inverse of 1.0
+     equals 0.99999994).
+
+     Note that GCC implements 1.0f/sqrtf(x) in terms of RSQRTSS (or
+     RSQRTPS) already with `-ffast-math' (or the above option
+     combination), and doesn't need `-mrecip'.
+
+`-mveclibabi=TYPE'
+     Specifies the ABI type to use for vectorizing intrinsics using an
+     external library.  Supported types are `svml' for the Intel short
+     vector math library and `acml' for the AMD math core library style
+     of interfacing.  GCC will currently emit calls to `vmldExp2',
+     `vmldLn2', `vmldLog102', `vmldLog102', `vmldPow2', `vmldTanh2',
+     `vmldTan2', `vmldAtan2', `vmldAtanh2', `vmldCbrt2', `vmldSinh2',
+     `vmldSin2', `vmldAsinh2', `vmldAsin2', `vmldCosh2', `vmldCos2',
+     `vmldAcosh2', `vmldAcos2', `vmlsExp4', `vmlsLn4', `vmlsLog104',
+     `vmlsLog104', `vmlsPow4', `vmlsTanh4', `vmlsTan4', `vmlsAtan4',
+     `vmlsAtanh4', `vmlsCbrt4', `vmlsSinh4', `vmlsSin4', `vmlsAsinh4',
+     `vmlsAsin4', `vmlsCosh4', `vmlsCos4', `vmlsAcosh4' and `vmlsAcos4'
+     for corresponding function type when `-mveclibabi=svml' is used
+     and `__vrd2_sin', `__vrd2_cos', `__vrd2_exp', `__vrd2_log',
+     `__vrd2_log2', `__vrd2_log10', `__vrs4_sinf', `__vrs4_cosf',
+     `__vrs4_expf', `__vrs4_logf', `__vrs4_log2f', `__vrs4_log10f' and
+     `__vrs4_powf' for corresponding function type when
+     `-mveclibabi=acml' is used. Both `-ftree-vectorize' and
+     `-funsafe-math-optimizations' have to be enabled. A SVML or ACML
+     ABI compatible library will have to be specified at link time.
+
+`-mabi=NAME'
+     Generate code for the specified calling convention.  Permissible
+     values are: `sysv' for the ABI used on GNU/Linux and other systems
+     and `ms' for the Microsoft ABI.  The default is to use the
+     Microsoft ABI when targeting Windows.  On all other systems, the
+     default is the SYSV ABI.  You can control this behavior for a
+     specific function by using the function attribute
+     `ms_abi'/`sysv_abi'.  *Note Function Attributes::.
+
+`-mpush-args'
+`-mno-push-args'
+     Use PUSH operations to store outgoing parameters.  This method is
+     shorter and usually equally fast as method using SUB/MOV
+     operations and is enabled by default.  In some cases disabling it
+     may improve performance because of improved scheduling and reduced
+     dependencies.
+
+`-maccumulate-outgoing-args'
+     If enabled, the maximum amount of space required for outgoing
+     arguments will be computed in the function prologue.  This is
+     faster on most modern CPUs because of reduced dependencies,
+     improved scheduling and reduced stack usage when preferred stack
+     boundary is not equal to 2.  The drawback is a notable increase in
+     code size.  This switch implies `-mno-push-args'.
+
+`-mthreads'
+     Support thread-safe exception handling on `Mingw32'.  Code that
+     relies on thread-safe exception handling must compile and link all
+     code with the `-mthreads' option.  When compiling, `-mthreads'
+     defines `-D_MT'; when linking, it links in a special thread helper
+     library `-lmingwthrd' which cleans up per thread exception
+     handling data.
+
+`-mno-align-stringops'
+     Do not align destination of inlined string operations.  This
+     switch reduces code size and improves performance in case the
+     destination is already aligned, but GCC doesn't know about it.
+
+`-minline-all-stringops'
+     By default GCC inlines string operations only when destination is
+     known to be aligned at least to 4 byte boundary.  This enables
+     more inlining, increase code size, but may improve performance of
+     code that depends on fast memcpy, strlen and memset for short
+     lengths.
+
+`-minline-stringops-dynamically'
+     For string operation of unknown size, inline runtime checks so for
+     small blocks inline code is used, while for large blocks library
+     call is used.
+
+`-mstringop-strategy=ALG'
+     Overwrite internal decision heuristic about particular algorithm
+     to inline string operation with.  The allowed values are
+     `rep_byte', `rep_4byte', `rep_8byte' for expanding using i386
+     `rep' prefix of specified size, `byte_loop', `loop',
+     `unrolled_loop' for expanding inline loop, `libcall' for always
+     expanding library call.
+
+`-momit-leaf-frame-pointer'
+     Don't keep the frame pointer in a register for leaf functions.
+     This avoids the instructions to save, set up and restore frame
+     pointers and makes an extra register available in leaf functions.
+     The option `-fomit-frame-pointer' removes the frame pointer for
+     all functions which might make debugging harder.
+
+`-mtls-direct-seg-refs'
+`-mno-tls-direct-seg-refs'
+     Controls whether TLS variables may be accessed with offsets from
+     the TLS segment register (`%gs' for 32-bit, `%fs' for 64-bit), or
+     whether the thread base pointer must be added.  Whether or not this
+     is legal depends on the operating system, and whether it maps the
+     segment to cover the entire TLS area.
+
+     For systems that use GNU libc, the default is on.
+
+`-msse2avx'
+`-mno-sse2avx'
+     Specify that the assembler should encode SSE instructions with VEX
+     prefix.  The option `-mavx' turns this on by default.
+
+ These `-m' switches are supported in addition to the above on AMD
+x86-64 processors in 64-bit environments.
+
+`-m32'
+`-m64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits and generates
+     code that runs on any i386 system.  The 64-bit environment sets
+     int to 32 bits and long and pointer to 64 bits and generates code
+     for AMD's x86-64 architecture. For darwin only the -m64 option
+     turns off the `-fno-pic' and `-mdynamic-no-pic' options.
+
+`-mno-red-zone'
+     Do not use a so called red zone for x86-64 code.  The red zone is
+     mandated by the x86-64 ABI, it is a 128-byte area beyond the
+     location of the stack pointer that will not be modified by signal
+     or interrupt handlers and therefore can be used for temporary data
+     without adjusting the stack pointer.  The flag `-mno-red-zone'
+     disables this red zone.
+
+`-mcmodel=small'
+     Generate code for the small code model: the program and its
+     symbols must be linked in the lower 2 GB of the address space.
+     Pointers are 64 bits.  Programs can be statically or dynamically
+     linked.  This is the default code model.
+
+`-mcmodel=kernel'
+     Generate code for the kernel code model.  The kernel runs in the
+     negative 2 GB of the address space.  This model has to be used for
+     Linux kernel code.
+
+`-mcmodel=medium'
+     Generate code for the medium model: The program is linked in the
+     lower 2 GB of the address space.  Small symbols are also placed
+     there.  Symbols with sizes larger than `-mlarge-data-threshold'
+     are put into large data or bss sections and can be located above
+     2GB.  Programs can be statically or dynamically linked.
+
+`-mcmodel=large'
+     Generate code for the large model: This model makes no assumptions
+     about addresses and sizes of sections.
+
+
+File: gcc.info,  Node: IA-64 Options,  Next: IA-64/VMS Options,  Prev: i386 and x86-64 Windows Options,  Up: Submodel Options
+
+3.17.16 IA-64 Options
+---------------------
+
+These are the `-m' options defined for the Intel IA-64 architecture.
+
+`-mbig-endian'
+     Generate code for a big endian target.  This is the default for
+     HP-UX.
+
+`-mlittle-endian'
+     Generate code for a little endian target.  This is the default for
+     AIX5 and GNU/Linux.
+
+`-mgnu-as'
+`-mno-gnu-as'
+     Generate (or don't) code for the GNU assembler.  This is the
+     default.
+
+`-mgnu-ld'
+`-mno-gnu-ld'
+     Generate (or don't) code for the GNU linker.  This is the default.
+
+`-mno-pic'
+     Generate code that does not use a global pointer register.  The
+     result is not position independent code, and violates the IA-64
+     ABI.
+
+`-mvolatile-asm-stop'
+`-mno-volatile-asm-stop'
+     Generate (or don't) a stop bit immediately before and after
+     volatile asm statements.
+
+`-mregister-names'
+`-mno-register-names'
+     Generate (or don't) `in', `loc', and `out' register names for the
+     stacked registers.  This may make assembler output more readable.
+
+`-mno-sdata'
+`-msdata'
+     Disable (or enable) optimizations that use the small data section.
+     This may be useful for working around optimizer bugs.
+
+`-mconstant-gp'
+     Generate code that uses a single constant global pointer value.
+     This is useful when compiling kernel code.
+
+`-mauto-pic'
+     Generate code that is self-relocatable.  This implies
+     `-mconstant-gp'.  This is useful when compiling firmware code.
+
+`-minline-float-divide-min-latency'
+     Generate code for inline divides of floating point values using
+     the minimum latency algorithm.
+
+`-minline-float-divide-max-throughput'
+     Generate code for inline divides of floating point values using
+     the maximum throughput algorithm.
+
+`-mno-inline-float-divide'
+     Do not generate inline code for divides of floating point values.
+
+`-minline-int-divide-min-latency'
+     Generate code for inline divides of integer values using the
+     minimum latency algorithm.
+
+`-minline-int-divide-max-throughput'
+     Generate code for inline divides of integer values using the
+     maximum throughput algorithm.
+
+`-mno-inline-int-divide'
+     Do not generate inline code for divides of integer values.
+
+`-minline-sqrt-min-latency'
+     Generate code for inline square roots using the minimum latency
+     algorithm.
+
+`-minline-sqrt-max-throughput'
+     Generate code for inline square roots using the maximum throughput
+     algorithm.
+
+`-mno-inline-sqrt'
+     Do not generate inline code for sqrt.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Do (don't) generate code that uses the fused multiply/add or
+     multiply/subtract instructions.  The default is to use these
+     instructions.
+
+`-mno-dwarf2-asm'
+`-mdwarf2-asm'
+     Don't (or do) generate assembler code for the DWARF2 line number
+     debugging info.  This may be useful when not using the GNU
+     assembler.
+
+`-mearly-stop-bits'
+`-mno-early-stop-bits'
+     Allow stop bits to be placed earlier than immediately preceding the
+     instruction that triggered the stop bit.  This can improve
+     instruction scheduling, but does not always do so.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mtls-size=TLS-SIZE'
+     Specify bit size of immediate TLS offsets.  Valid values are 14,
+     22, and 64.
+
+`-mtune=CPU-TYPE'
+     Tune the instruction scheduling for a particular CPU, Valid values
+     are itanium, itanium1, merced, itanium2, and mckinley.
+
+`-milp32'
+`-mlp64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits.  The 64-bit
+     environment sets int to 32 bits and long and pointer to 64 bits.
+     These are HP-UX specific flags.
+
+`-mno-sched-br-data-spec'
+`-msched-br-data-spec'
+     (Dis/En)able data speculative scheduling before reload.  This will
+     result in generation of the ld.a instructions and the
+     corresponding check instructions (ld.c / chk.a).  The default is
+     'disable'.
+
+`-msched-ar-data-spec'
+`-mno-sched-ar-data-spec'
+     (En/Dis)able data speculative scheduling after reload.  This will
+     result in generation of the ld.a instructions and the
+     corresponding check instructions (ld.c / chk.a).  The default is
+     'enable'.
+
+`-mno-sched-control-spec'
+`-msched-control-spec'
+     (Dis/En)able control speculative scheduling.  This feature is
+     available only during region scheduling (i.e. before reload).
+     This will result in generation of the ld.s instructions and the
+     corresponding check instructions chk.s .  The default is 'disable'.
+
+`-msched-br-in-data-spec'
+`-mno-sched-br-in-data-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the data speculative loads before reload.  This is
+     effective only with `-msched-br-data-spec' enabled.  The default
+     is 'enable'.
+
+`-msched-ar-in-data-spec'
+`-mno-sched-ar-in-data-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the data speculative loads after reload.  This is
+     effective only with `-msched-ar-data-spec' enabled.  The default
+     is 'enable'.
+
+`-msched-in-control-spec'
+`-mno-sched-in-control-spec'
+     (En/Dis)able speculative scheduling of the instructions that are
+     dependent on the control speculative loads.  This is effective
+     only with `-msched-control-spec' enabled.  The default is 'enable'.
+
+`-mno-sched-prefer-non-data-spec-insns'
+`-msched-prefer-non-data-spec-insns'
+     If enabled, data speculative instructions will be chosen for
+     schedule only if there are no other choices at the moment.  This
+     will make the use of the data speculation much more conservative.
+     The default is 'disable'.
+
+`-mno-sched-prefer-non-control-spec-insns'
+`-msched-prefer-non-control-spec-insns'
+     If enabled, control speculative instructions will be chosen for
+     schedule only if there are no other choices at the moment.  This
+     will make the use of the control speculation much more
+     conservative.  The default is 'disable'.
+
+`-mno-sched-count-spec-in-critical-path'
+`-msched-count-spec-in-critical-path'
+     If enabled, speculative dependencies will be considered during
+     computation of the instructions priorities.  This will make the
+     use of the speculation a bit more conservative.  The default is
+     'disable'.
+
+`-msched-spec-ldc'
+     Use a simple data speculation check.  This option is on by default.
+
+`-msched-control-spec-ldc'
+     Use a simple check for control speculation.  This option is on by
+     default.
+
+`-msched-stop-bits-after-every-cycle'
+     Place a stop bit after every cycle when scheduling.  This option
+     is on by default.
+
+`-msched-fp-mem-deps-zero-cost'
+     Assume that floating-point stores and loads are not likely to
+     cause a conflict when placed into the same instruction group.
+     This option is disabled by default.
+
+`-msel-sched-dont-check-control-spec'
+     Generate checks for control speculation in selective scheduling.
+     This flag is disabled by default.
+
+`-msched-max-memory-insns=MAX-INSNS'
+     Limit on the number of memory insns per instruction group, giving
+     lower priority to subsequent memory insns attempting to schedule
+     in the same instruction group. Frequently useful to prevent cache
+     bank conflicts.  The default value is 1.
+
+`-msched-max-memory-insns-hard-limit'
+     Disallow more than `msched-max-memory-insns' in instruction group.
+     Otherwise, limit is `soft' meaning that we would prefer non-memory
+     operations when limit is reached but may still schedule memory
+     operations.
+
+
+
+File: gcc.info,  Node: IA-64/VMS Options,  Next: LM32 Options,  Prev: IA-64 Options,  Up: Submodel Options
+
+3.17.17 IA-64/VMS Options
+-------------------------
+
+These `-m' options are defined for the IA-64/VMS implementations:
+
+`-mvms-return-codes'
+     Return VMS condition codes from main. The default is to return
+     POSIX style condition (e.g. error) codes.
+
+`-mdebug-main=PREFIX'
+     Flag the first routine whose name starts with PREFIX as the main
+     routine for the debugger.
+
+`-mmalloc64'
+     Default to 64bit memory allocation routines.
+
+
+File: gcc.info,  Node: LM32 Options,  Next: M32C Options,  Prev: IA-64/VMS Options,  Up: Submodel Options
+
+3.17.18 LM32 Options
+--------------------
+
+These `-m' options are defined for the Lattice Mico32 architecture:
+
+`-mbarrel-shift-enabled'
+     Enable barrel-shift instructions.
+
+`-mdivide-enabled'
+     Enable divide and modulus instructions.
+
+`-mmultiply-enabled'
+     Enable multiply instructions.
+
+`-msign-extend-enabled'
+     Enable sign extend instructions.
+
+`-muser-enabled'
+     Enable user-defined instructions.
+
+
+
+File: gcc.info,  Node: M32C Options,  Next: M32R/D Options,  Prev: LM32 Options,  Up: Submodel Options
+
+3.17.19 M32C Options
+--------------------
+
+`-mcpu=NAME'
+     Select the CPU for which code is generated.  NAME may be one of
+     `r8c' for the R8C/Tiny series, `m16c' for the M16C (up to /60)
+     series, `m32cm' for the M16C/80 series, or `m32c' for the M32C/80
+     series.
+
+`-msim'
+     Specifies that the program will be run on the simulator.  This
+     causes an alternate runtime library to be linked in which
+     supports, for example, file I/O.  You must not use this option
+     when generating programs that will run on real hardware; you must
+     provide your own runtime library for whatever I/O functions are
+     needed.
+
+`-memregs=NUMBER'
+     Specifies the number of memory-based pseudo-registers GCC will use
+     during code generation.  These pseudo-registers will be used like
+     real registers, so there is a tradeoff between GCC's ability to
+     fit the code into available registers, and the performance penalty
+     of using memory instead of registers.  Note that all modules in a
+     program must be compiled with the same value for this option.
+     Because of that, you must not use this option with the default
+     runtime libraries gcc builds.
+
+
+
+File: gcc.info,  Node: M32R/D Options,  Next: M680x0 Options,  Prev: M32C Options,  Up: Submodel Options
+
+3.17.20 M32R/D Options
+----------------------
+
+These `-m' options are defined for Renesas M32R/D architectures:
+
+`-m32r2'
+     Generate code for the M32R/2.
+
+`-m32rx'
+     Generate code for the M32R/X.
+
+`-m32r'
+     Generate code for the M32R.  This is the default.
+
+`-mmodel=small'
+     Assume all objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction), and assume
+     all subroutines are reachable with the `bl' instruction.  This is
+     the default.
+
+     The addressability of a particular object can be set with the
+     `model' attribute.
+
+`-mmodel=medium'
+     Assume objects may be anywhere in the 32-bit address space (the
+     compiler will generate `seth/add3' instructions to load their
+     addresses), and assume all subroutines are reachable with the `bl'
+     instruction.
+
+`-mmodel=large'
+     Assume objects may be anywhere in the 32-bit address space (the
+     compiler will generate `seth/add3' instructions to load their
+     addresses), and assume subroutines may not be reachable with the
+     `bl' instruction (the compiler will generate the much slower
+     `seth/add3/jl' instruction sequence).
+
+`-msdata=none'
+     Disable use of the small data area.  Variables will be put into
+     one of `.data', `bss', or `.rodata' (unless the `section'
+     attribute has been specified).  This is the default.
+
+     The small data area consists of sections `.sdata' and `.sbss'.
+     Objects may be explicitly put in the small data area with the
+     `section' attribute using one of these sections.
+
+`-msdata=sdata'
+     Put small global and static data in the small data area, but do not
+     generate special code to reference them.
+
+`-msdata=use'
+     Put small global and static data in the small data area, and
+     generate special instructions to reference them.
+
+`-G NUM'
+     Put global and static objects less than or equal to NUM bytes into
+     the small data or bss sections instead of the normal data or bss
+     sections.  The default value of NUM is 8.  The `-msdata' option
+     must be set to one of `sdata' or `use' for this option to have any
+     effect.
+
+     All modules should be compiled with the same `-G NUM' value.
+     Compiling with different values of NUM may or may not work; if it
+     doesn't the linker will give an error message--incorrect code will
+     not be generated.
+
+`-mdebug'
+     Makes the M32R specific code in the compiler display some
+     statistics that might help in debugging programs.
+
+`-malign-loops'
+     Align all loops to a 32-byte boundary.
+
+`-mno-align-loops'
+     Do not enforce a 32-byte alignment for loops.  This is the default.
+
+`-missue-rate=NUMBER'
+     Issue NUMBER instructions per cycle.  NUMBER can only be 1 or 2.
+
+`-mbranch-cost=NUMBER'
+     NUMBER can only be 1 or 2.  If it is 1 then branches will be
+     preferred over conditional code, if it is 2, then the opposite will
+     apply.
+
+`-mflush-trap=NUMBER'
+     Specifies the trap number to use to flush the cache.  The default
+     is 12.  Valid numbers are between 0 and 15 inclusive.
+
+`-mno-flush-trap'
+     Specifies that the cache cannot be flushed by using a trap.
+
+`-mflush-func=NAME'
+     Specifies the name of the operating system function to call to
+     flush the cache.  The default is __flush_cache_, but a function
+     call will only be used if a trap is not available.
+
+`-mno-flush-func'
+     Indicates that there is no OS function for flushing the cache.
+
+
+
+File: gcc.info,  Node: M680x0 Options,  Next: M68hc1x Options,  Prev: M32R/D Options,  Up: Submodel Options
+
+3.17.21 M680x0 Options
+----------------------
+
+These are the `-m' options defined for M680x0 and ColdFire processors.
+The default settings depend on which architecture was selected when the
+compiler was configured; the defaults for the most common choices are
+given below.
+
+`-march=ARCH'
+     Generate code for a specific M680x0 or ColdFire instruction set
+     architecture.  Permissible values of ARCH for M680x0 architectures
+     are: `68000', `68010', `68020', `68030', `68040', `68060' and
+     `cpu32'.  ColdFire architectures are selected according to
+     Freescale's ISA classification and the permissible values are:
+     `isaa', `isaaplus', `isab' and `isac'.
+
+     gcc defines a macro `__mcfARCH__' whenever it is generating code
+     for a ColdFire target.  The ARCH in this macro is one of the
+     `-march' arguments given above.
+
+     When used together, `-march' and `-mtune' select code that runs on
+     a family of similar processors but that is optimized for a
+     particular microarchitecture.
+
+`-mcpu=CPU'
+     Generate code for a specific M680x0 or ColdFire processor.  The
+     M680x0 CPUs are: `68000', `68010', `68020', `68030', `68040',
+     `68060', `68302', `68332' and `cpu32'.  The ColdFire CPUs are
+     given by the table below, which also classifies the CPUs into
+     families:
+
+     *Family*      *`-mcpu' arguments*
+     `51'          `51' `51ac' `51cn' `51em' `51qe'
+     `5206'        `5202' `5204' `5206'
+     `5206e'       `5206e'
+     `5208'        `5207' `5208'
+     `5211a'       `5210a' `5211a'
+     `5213'        `5211' `5212' `5213'
+     `5216'        `5214' `5216'
+     `52235'       `52230' `52231' `52232' `52233' `52234' `52235'
+     `5225'        `5224' `5225'
+     `52259'       `52252' `52254' `52255' `52256' `52258' `52259'
+     `5235'        `5232' `5233' `5234' `5235' `523x'
+     `5249'        `5249'
+     `5250'        `5250'
+     `5271'        `5270' `5271'
+     `5272'        `5272'
+     `5275'        `5274' `5275'
+     `5282'        `5280' `5281' `5282' `528x'
+     `53017'       `53011' `53012' `53013' `53014' `53015' `53016'
+                   `53017'
+     `5307'        `5307'
+     `5329'        `5327' `5328' `5329' `532x'
+     `5373'        `5372' `5373' `537x'
+     `5407'        `5407'
+     `5475'        `5470' `5471' `5472' `5473' `5474' `5475' `547x'
+                   `5480' `5481' `5482' `5483' `5484' `5485'
+
+     `-mcpu=CPU' overrides `-march=ARCH' if ARCH is compatible with
+     CPU.  Other combinations of `-mcpu' and `-march' are rejected.
+
+     gcc defines the macro `__mcf_cpu_CPU' when ColdFire target CPU is
+     selected.  It also defines `__mcf_family_FAMILY', where the value
+     of FAMILY is given by the table above.
+
+`-mtune=TUNE'
+     Tune the code for a particular microarchitecture, within the
+     constraints set by `-march' and `-mcpu'.  The M680x0
+     microarchitectures are: `68000', `68010', `68020', `68030',
+     `68040', `68060' and `cpu32'.  The ColdFire microarchitectures
+     are: `cfv1', `cfv2', `cfv3', `cfv4' and `cfv4e'.
+
+     You can also use `-mtune=68020-40' for code that needs to run
+     relatively well on 68020, 68030 and 68040 targets.
+     `-mtune=68020-60' is similar but includes 68060 targets as well.
+     These two options select the same tuning decisions as `-m68020-40'
+     and `-m68020-60' respectively.
+
+     gcc defines the macros `__mcARCH' and `__mcARCH__' when tuning for
+     680x0 architecture ARCH.  It also defines `mcARCH' unless either
+     `-ansi' or a non-GNU `-std' option is used.  If gcc is tuning for
+     a range of architectures, as selected by `-mtune=68020-40' or
+     `-mtune=68020-60', it defines the macros for every architecture in
+     the range.
+
+     gcc also defines the macro `__mUARCH__' when tuning for ColdFire
+     microarchitecture UARCH, where UARCH is one of the arguments given
+     above.
+
+`-m68000'
+`-mc68000'
+     Generate output for a 68000.  This is the default when the
+     compiler is configured for 68000-based systems.  It is equivalent
+     to `-march=68000'.
+
+     Use this option for microcontrollers with a 68000 or EC000 core,
+     including the 68008, 68302, 68306, 68307, 68322, 68328 and 68356.
+
+`-m68010'
+     Generate output for a 68010.  This is the default when the
+     compiler is configured for 68010-based systems.  It is equivalent
+     to `-march=68010'.
+
+`-m68020'
+`-mc68020'
+     Generate output for a 68020.  This is the default when the
+     compiler is configured for 68020-based systems.  It is equivalent
+     to `-march=68020'.
+
+`-m68030'
+     Generate output for a 68030.  This is the default when the
+     compiler is configured for 68030-based systems.  It is equivalent
+     to `-march=68030'.
+
+`-m68040'
+     Generate output for a 68040.  This is the default when the
+     compiler is configured for 68040-based systems.  It is equivalent
+     to `-march=68040'.
+
+     This option inhibits the use of 68881/68882 instructions that have
+     to be emulated by software on the 68040.  Use this option if your
+     68040 does not have code to emulate those instructions.
+
+`-m68060'
+     Generate output for a 68060.  This is the default when the
+     compiler is configured for 68060-based systems.  It is equivalent
+     to `-march=68060'.
+
+     This option inhibits the use of 68020 and 68881/68882 instructions
+     that have to be emulated by software on the 68060.  Use this
+     option if your 68060 does not have code to emulate those
+     instructions.
+
+`-mcpu32'
+     Generate output for a CPU32.  This is the default when the
+     compiler is configured for CPU32-based systems.  It is equivalent
+     to `-march=cpu32'.
+
+     Use this option for microcontrollers with a CPU32 or CPU32+ core,
+     including the 68330, 68331, 68332, 68333, 68334, 68336, 68340,
+     68341, 68349 and 68360.
+
+`-m5200'
+     Generate output for a 520X ColdFire CPU.  This is the default when
+     the compiler is configured for 520X-based systems.  It is
+     equivalent to `-mcpu=5206', and is now deprecated in favor of that
+     option.
+
+     Use this option for microcontroller with a 5200 core, including
+     the MCF5202, MCF5203, MCF5204 and MCF5206.
+
+`-m5206e'
+     Generate output for a 5206e ColdFire CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5206e'.
+
+`-m528x'
+     Generate output for a member of the ColdFire 528X family.  The
+     option is now deprecated in favor of the equivalent `-mcpu=528x'.
+
+`-m5307'
+     Generate output for a ColdFire 5307 CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5307'.
+
+`-m5407'
+     Generate output for a ColdFire 5407 CPU.  The option is now
+     deprecated in favor of the equivalent `-mcpu=5407'.
+
+`-mcfv4e'
+     Generate output for a ColdFire V4e family CPU (e.g. 547x/548x).
+     This includes use of hardware floating point instructions.  The
+     option is equivalent to `-mcpu=547x', and is now deprecated in
+     favor of that option.
+
+`-m68020-40'
+     Generate output for a 68040, without using any of the new
+     instructions.  This results in code which can run relatively
+     efficiently on either a 68020/68881 or a 68030 or a 68040.  The
+     generated code does use the 68881 instructions that are emulated
+     on the 68040.
+
+     The option is equivalent to `-march=68020' `-mtune=68020-40'.
+
+`-m68020-60'
+     Generate output for a 68060, without using any of the new
+     instructions.  This results in code which can run relatively
+     efficiently on either a 68020/68881 or a 68030 or a 68040.  The
+     generated code does use the 68881 instructions that are emulated
+     on the 68060.
+
+     The option is equivalent to `-march=68020' `-mtune=68020-60'.
+
+`-mhard-float'
+`-m68881'
+     Generate floating-point instructions.  This is the default for
+     68020 and above, and for ColdFire devices that have an FPU.  It
+     defines the macro `__HAVE_68881__' on M680x0 targets and
+     `__mcffpu__' on ColdFire targets.
+
+`-msoft-float'
+     Do not generate floating-point instructions; use library calls
+     instead.  This is the default for 68000, 68010, and 68832 targets.
+     It is also the default for ColdFire devices that have no FPU.
+
+`-mdiv'
+`-mno-div'
+     Generate (do not generate) ColdFire hardware divide and remainder
+     instructions.  If `-march' is used without `-mcpu', the default is
+     "on" for ColdFire architectures and "off" for M680x0
+     architectures.  Otherwise, the default is taken from the target CPU
+     (either the default CPU, or the one specified by `-mcpu').  For
+     example, the default is "off" for `-mcpu=5206' and "on" for
+     `-mcpu=5206e'.
+
+     gcc defines the macro `__mcfhwdiv__' when this option is enabled.
+
+`-mshort'
+     Consider type `int' to be 16 bits wide, like `short int'.
+     Additionally, parameters passed on the stack are also aligned to a
+     16-bit boundary even on targets whose API mandates promotion to
+     32-bit.
+
+`-mno-short'
+     Do not consider type `int' to be 16 bits wide.  This is the
+     default.
+
+`-mnobitfield'
+`-mno-bitfield'
+     Do not use the bit-field instructions.  The `-m68000', `-mcpu32'
+     and `-m5200' options imply `-mnobitfield'.
+
+`-mbitfield'
+     Do use the bit-field instructions.  The `-m68020' option implies
+     `-mbitfield'.  This is the default if you use a configuration
+     designed for a 68020.
+
+`-mrtd'
+     Use a different function-calling convention, in which functions
+     that take a fixed number of arguments return with the `rtd'
+     instruction, which pops their arguments while returning.  This
+     saves one instruction in the caller since there is no need to pop
+     the arguments there.
+
+     This calling convention is incompatible with the one normally used
+     on Unix, so you cannot use it if you need to call libraries
+     compiled with the Unix compiler.
+
+     Also, you must provide function prototypes for all functions that
+     take variable numbers of arguments (including `printf'); otherwise
+     incorrect code will be generated for calls to those functions.
+
+     In addition, seriously incorrect code will result if you call a
+     function with too many arguments.  (Normally, extra arguments are
+     harmlessly ignored.)
+
+     The `rtd' instruction is supported by the 68010, 68020, 68030,
+     68040, 68060 and CPU32 processors, but not by the 68000 or 5200.
+
+`-mno-rtd'
+     Do not use the calling conventions selected by `-mrtd'.  This is
+     the default.
+
+`-malign-int'
+`-mno-align-int'
+     Control whether GCC aligns `int', `long', `long long', `float',
+     `double', and `long double' variables on a 32-bit boundary
+     (`-malign-int') or a 16-bit boundary (`-mno-align-int').  Aligning
+     variables on 32-bit boundaries produces code that runs somewhat
+     faster on processors with 32-bit busses at the expense of more
+     memory.
+
+     *Warning:* if you use the `-malign-int' switch, GCC will align
+     structures containing the above types  differently than most
+     published application binary interface specifications for the m68k.
+
+`-mpcrel'
+     Use the pc-relative addressing mode of the 68000 directly, instead
+     of using a global offset table.  At present, this option implies
+     `-fpic', allowing at most a 16-bit offset for pc-relative
+     addressing.  `-fPIC' is not presently supported with `-mpcrel',
+     though this could be supported for 68020 and higher processors.
+
+`-mno-strict-align'
+`-mstrict-align'
+     Do not (do) assume that unaligned memory references will be
+     handled by the system.
+
+`-msep-data'
+     Generate code that allows the data segment to be located in a
+     different area of memory from the text segment.  This allows for
+     execute in place in an environment without virtual memory
+     management.  This option implies `-fPIC'.
+
+`-mno-sep-data'
+     Generate code that assumes that the data segment follows the text
+     segment.  This is the default.
+
+`-mid-shared-library'
+     Generate code that supports shared libraries via the library ID
+     method.  This allows for execute in place and shared libraries in
+     an environment without virtual memory management.  This option
+     implies `-fPIC'.
+
+`-mno-id-shared-library'
+     Generate code that doesn't assume ID based shared libraries are
+     being used.  This is the default.
+
+`-mshared-library-id=n'
+     Specified the identification number of the ID based shared library
+     being compiled.  Specifying a value of 0 will generate more
+     compact code, specifying other values will force the allocation of
+     that number to the current library but is no more space or time
+     efficient than omitting this option.
+
+`-mxgot'
+`-mno-xgot'
+     When generating position-independent code for ColdFire, generate
+     code that works if the GOT has more than 8192 entries.  This code
+     is larger and slower than code generated without this option.  On
+     M680x0 processors, this option is not needed; `-fPIC' suffices.
+
+     GCC normally uses a single instruction to load values from the GOT.
+     While this is relatively efficient, it only works if the GOT is
+     smaller than about 64k.  Anything larger causes the linker to
+     report an error such as:
+
+          relocation truncated to fit: R_68K_GOT16O foobar
+
+     If this happens, you should recompile your code with `-mxgot'.  It
+     should then work with very large GOTs.  However, code generated
+     with `-mxgot' is less efficient, since it takes 4 instructions to
+     fetch the value of a global symbol.
+
+     Note that some linkers, including newer versions of the GNU linker,
+     can create multiple GOTs and sort GOT entries.  If you have such a
+     linker, you should only need to use `-mxgot' when compiling a
+     single object file that accesses more than 8192 GOT entries.  Very
+     few do.
+
+     These options have no effect unless GCC is generating
+     position-independent code.
+
+
+
+File: gcc.info,  Node: M68hc1x Options,  Next: MCore Options,  Prev: M680x0 Options,  Up: Submodel Options
+
+3.17.22 M68hc1x Options
+-----------------------
+
+These are the `-m' options defined for the 68hc11 and 68hc12
+microcontrollers.  The default values for these options depends on
+which style of microcontroller was selected when the compiler was
+configured; the defaults for the most common choices are given below.
+
+`-m6811'
+`-m68hc11'
+     Generate output for a 68HC11.  This is the default when the
+     compiler is configured for 68HC11-based systems.
+
+`-m6812'
+`-m68hc12'
+     Generate output for a 68HC12.  This is the default when the
+     compiler is configured for 68HC12-based systems.
+
+`-m68S12'
+`-m68hcs12'
+     Generate output for a 68HCS12.
+
+`-mauto-incdec'
+     Enable the use of 68HC12 pre and post auto-increment and
+     auto-decrement addressing modes.
+
+`-minmax'
+`-mnominmax'
+     Enable the use of 68HC12 min and max instructions.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Treat all calls as being far away (near).  If calls are assumed to
+     be far away, the compiler will use the `call' instruction to call
+     a function and the `rtc' instruction for returning.
+
+`-mshort'
+     Consider type `int' to be 16 bits wide, like `short int'.
+
+`-msoft-reg-count=COUNT'
+     Specify the number of pseudo-soft registers which are used for the
+     code generation.  The maximum number is 32.  Using more pseudo-soft
+     register may or may not result in better code depending on the
+     program.  The default is 4 for 68HC11 and 2 for 68HC12.
+
+
+
+File: gcc.info,  Node: MCore Options,  Next: MeP Options,  Prev: M68hc1x Options,  Up: Submodel Options
+
+3.17.23 MCore Options
+---------------------
+
+These are the `-m' options defined for the Motorola M*Core processors.
+
+`-mhardlit'
+`-mno-hardlit'
+     Inline constants into the code stream if it can be done in two
+     instructions or less.
+
+`-mdiv'
+`-mno-div'
+     Use the divide instruction.  (Enabled by default).
+
+`-mrelax-immediate'
+`-mno-relax-immediate'
+     Allow arbitrary sized immediates in bit operations.
+
+`-mwide-bitfields'
+`-mno-wide-bitfields'
+     Always treat bit-fields as int-sized.
+
+`-m4byte-functions'
+`-mno-4byte-functions'
+     Force all functions to be aligned to a four byte boundary.
+
+`-mcallgraph-data'
+`-mno-callgraph-data'
+     Emit callgraph information.
+
+`-mslow-bytes'
+`-mno-slow-bytes'
+     Prefer word access when reading byte quantities.
+
+`-mlittle-endian'
+`-mbig-endian'
+     Generate code for a little endian target.
+
+`-m210'
+`-m340'
+     Generate code for the 210 processor.
+
+`-mno-lsim'
+     Assume that run-time support has been provided and so omit the
+     simulator library (`libsim.a)' from the linker command line.
+
+`-mstack-increment=SIZE'
+     Set the maximum amount for a single stack increment operation.
+     Large values can increase the speed of programs which contain
+     functions that need a large amount of stack space, but they can
+     also trigger a segmentation fault if the stack is extended too
+     much.  The default value is 0x1000.
+
+
+
+File: gcc.info,  Node: MeP Options,  Next: MIPS Options,  Prev: MCore Options,  Up: Submodel Options
+
+3.17.24 MeP Options
+-------------------
+
+`-mabsdiff'
+     Enables the `abs' instruction, which is the absolute difference
+     between two registers.
+
+`-mall-opts'
+     Enables all the optional instructions - average, multiply, divide,
+     bit operations, leading zero, absolute difference, min/max, clip,
+     and saturation.
+
+`-maverage'
+     Enables the `ave' instruction, which computes the average of two
+     registers.
+
+`-mbased=N'
+     Variables of size N bytes or smaller will be placed in the
+     `.based' section by default.  Based variables use the `$tp'
+     register as a base register, and there is a 128 byte limit to the
+     `.based' section.
+
+`-mbitops'
+     Enables the bit operation instructions - bit test (`btstm'), set
+     (`bsetm'), clear (`bclrm'), invert (`bnotm'), and test-and-set
+     (`tas').
+
+`-mc=NAME'
+     Selects which section constant data will be placed in.  NAME may
+     be `tiny', `near', or `far'.
+
+`-mclip'
+     Enables the `clip' instruction.  Note that `-mclip' is not useful
+     unless you also provide `-mminmax'.
+
+`-mconfig=NAME'
+     Selects one of the build-in core configurations.  Each MeP chip has
+     one or more modules in it; each module has a core CPU and a
+     variety of coprocessors, optional instructions, and peripherals.
+     The `MeP-Integrator' tool, not part of GCC, provides these
+     configurations through this option; using this option is the same
+     as using all the corresponding command line options.  The default
+     configuration is `default'.
+
+`-mcop'
+     Enables the coprocessor instructions.  By default, this is a 32-bit
+     coprocessor.  Note that the coprocessor is normally enabled via the
+     `-mconfig=' option.
+
+`-mcop32'
+     Enables the 32-bit coprocessor's instructions.
+
+`-mcop64'
+     Enables the 64-bit coprocessor's instructions.
+
+`-mivc2'
+     Enables IVC2 scheduling.  IVC2 is a 64-bit VLIW coprocessor.
+
+`-mdc'
+     Causes constant variables to be placed in the `.near' section.
+
+`-mdiv'
+     Enables the `div' and `divu' instructions.
+
+`-meb'
+     Generate big-endian code.
+
+`-mel'
+     Generate little-endian code.
+
+`-mio-volatile'
+     Tells the compiler that any variable marked with the `io'
+     attribute is to be considered volatile.
+
+`-ml'
+     Causes variables to be assigned to the `.far' section by default.
+
+`-mleadz'
+     Enables the `leadz' (leading zero) instruction.
+
+`-mm'
+     Causes variables to be assigned to the `.near' section by default.
+
+`-mminmax'
+     Enables the `min' and `max' instructions.
+
+`-mmult'
+     Enables the multiplication and multiply-accumulate instructions.
+
+`-mno-opts'
+     Disables all the optional instructions enabled by `-mall-opts'.
+
+`-mrepeat'
+     Enables the `repeat' and `erepeat' instructions, used for
+     low-overhead looping.
+
+`-ms'
+     Causes all variables to default to the `.tiny' section.  Note that
+     there is a 65536 byte limit to this section.  Accesses to these
+     variables use the `%gp' base register.
+
+`-msatur'
+     Enables the saturation instructions.  Note that the compiler does
+     not currently generate these itself, but this option is included
+     for compatibility with other tools, like `as'.
+
+`-msdram'
+     Link the SDRAM-based runtime instead of the default ROM-based
+     runtime.
+
+`-msim'
+     Link the simulator runtime libraries.
+
+`-msimnovec'
+     Link the simulator runtime libraries, excluding built-in support
+     for reset and exception vectors and tables.
+
+`-mtf'
+     Causes all functions to default to the `.far' section.  Without
+     this option, functions default to the `.near' section.
+
+`-mtiny=N'
+     Variables that are N bytes or smaller will be allocated to the
+     `.tiny' section.  These variables use the `$gp' base register.
+     The default for this option is 4, but note that there's a 65536
+     byte limit to the `.tiny' section.
+
+
+
+File: gcc.info,  Node: MIPS Options,  Next: MMIX Options,  Prev: MeP Options,  Up: Submodel Options
+
+3.17.25 MIPS Options
+--------------------
+
+`-EB'
+     Generate big-endian code.
+
+`-EL'
+     Generate little-endian code.  This is the default for `mips*el-*-*'
+     configurations.
+
+`-march=ARCH'
+     Generate code that will run on ARCH, which can be the name of a
+     generic MIPS ISA, or the name of a particular processor.  The ISA
+     names are: `mips1', `mips2', `mips3', `mips4', `mips32',
+     `mips32r2', `mips64' and `mips64r2'.  The processor names are:
+     `4kc', `4km', `4kp', `4ksc', `4kec', `4kem', `4kep', `4ksd',
+     `5kc', `5kf', `20kc', `24kc', `24kf2_1', `24kf1_1', `24kec',
+     `24kef2_1', `24kef1_1', `34kc', `34kf2_1', `34kf1_1', `74kc',
+     `74kf2_1', `74kf1_1', `74kf3_2', `1004kc', `1004kf2_1',
+     `1004kf1_1', `loongson2e', `loongson2f', `m4k', `octeon', `orion',
+     `r2000', `r3000', `r3900', `r4000', `r4400', `r4600', `r4650',
+     `r6000', `r8000', `rm7000', `rm9000', `r10000', `r12000',
+     `r14000', `r16000', `sb1', `sr71000', `vr4100', `vr4111',
+     `vr4120', `vr4130', `vr4300', `vr5000', `vr5400', `vr5500' and
+     `xlr'.  The special value `from-abi' selects the most compatible
+     architecture for the selected ABI (that is, `mips1' for 32-bit
+     ABIs and `mips3' for 64-bit ABIs).
+
+     Native Linux/GNU toolchains also support the value `native', which
+     selects the best architecture option for the host processor.
+     `-march=native' has no effect if GCC does not recognize the
+     processor.
+
+     In processor names, a final `000' can be abbreviated as `k' (for
+     example, `-march=r2k').  Prefixes are optional, and `vr' may be
+     written `r'.
+
+     Names of the form `Nf2_1' refer to processors with FPUs clocked at
+     half the rate of the core, names of the form `Nf1_1' refer to
+     processors with FPUs clocked at the same rate as the core, and
+     names of the form `Nf3_2' refer to processors with FPUs clocked a
+     ratio of 3:2 with respect to the core.  For compatibility reasons,
+     `Nf' is accepted as a synonym for `Nf2_1' while `Nx' and `Bfx' are
+     accepted as synonyms for `Nf1_1'.
+
+     GCC defines two macros based on the value of this option.  The
+     first is `_MIPS_ARCH', which gives the name of target
+     architecture, as a string.  The second has the form
+     `_MIPS_ARCH_FOO', where FOO is the capitalized value of
+     `_MIPS_ARCH'.  For example, `-march=r2000' will set `_MIPS_ARCH'
+     to `"r2000"' and define the macro `_MIPS_ARCH_R2000'.
+
+     Note that the `_MIPS_ARCH' macro uses the processor names given
+     above.  In other words, it will have the full prefix and will not
+     abbreviate `000' as `k'.  In the case of `from-abi', the macro
+     names the resolved architecture (either `"mips1"' or `"mips3"').
+     It names the default architecture when no `-march' option is given.
+
+`-mtune=ARCH'
+     Optimize for ARCH.  Among other things, this option controls the
+     way instructions are scheduled, and the perceived cost of
+     arithmetic operations.  The list of ARCH values is the same as for
+     `-march'.
+
+     When this option is not used, GCC will optimize for the processor
+     specified by `-march'.  By using `-march' and `-mtune' together,
+     it is possible to generate code that will run on a family of
+     processors, but optimize the code for one particular member of
+     that family.
+
+     `-mtune' defines the macros `_MIPS_TUNE' and `_MIPS_TUNE_FOO',
+     which work in the same way as the `-march' ones described above.
+
+`-mips1'
+     Equivalent to `-march=mips1'.
+
+`-mips2'
+     Equivalent to `-march=mips2'.
+
+`-mips3'
+     Equivalent to `-march=mips3'.
+
+`-mips4'
+     Equivalent to `-march=mips4'.
+
+`-mips32'
+     Equivalent to `-march=mips32'.
+
+`-mips32r2'
+     Equivalent to `-march=mips32r2'.
+
+`-mips64'
+     Equivalent to `-march=mips64'.
+
+`-mips64r2'
+     Equivalent to `-march=mips64r2'.
+
+`-mips16'
+`-mno-mips16'
+     Generate (do not generate) MIPS16 code.  If GCC is targetting a
+     MIPS32 or MIPS64 architecture, it will make use of the MIPS16e ASE.
+
+     MIPS16 code generation can also be controlled on a per-function
+     basis by means of `mips16' and `nomips16' attributes.  *Note
+     Function Attributes::, for more information.
+
+`-mflip-mips16'
+     Generate MIPS16 code on alternating functions.  This option is
+     provided for regression testing of mixed MIPS16/non-MIPS16 code
+     generation, and is not intended for ordinary use in compiling user
+     code.
+
+`-minterlink-mips16'
+`-mno-interlink-mips16'
+     Require (do not require) that non-MIPS16 code be link-compatible
+     with MIPS16 code.
+
+     For example, non-MIPS16 code cannot jump directly to MIPS16 code;
+     it must either use a call or an indirect jump.
+     `-minterlink-mips16' therefore disables direct jumps unless GCC
+     knows that the target of the jump is not MIPS16.
+
+`-mabi=32'
+`-mabi=o64'
+`-mabi=n32'
+`-mabi=64'
+`-mabi=eabi'
+     Generate code for the given ABI.
+
+     Note that the EABI has a 32-bit and a 64-bit variant.  GCC normally
+     generates 64-bit code when you select a 64-bit architecture, but
+     you can use `-mgp32' to get 32-bit code instead.
+
+     For information about the O64 ABI, see
+     `http://gcc.gnu.org/projects/mipso64-abi.html'.
+
+     GCC supports a variant of the o32 ABI in which floating-point
+     registers are 64 rather than 32 bits wide.  You can select this
+     combination with `-mabi=32' `-mfp64'.  This ABI relies on the
+     `mthc1' and `mfhc1' instructions and is therefore only supported
+     for MIPS32R2 processors.
+
+     The register assignments for arguments and return values remain the
+     same, but each scalar value is passed in a single 64-bit register
+     rather than a pair of 32-bit registers.  For example, scalar
+     floating-point values are returned in `$f0' only, not a
+     `$f0'/`$f1' pair.  The set of call-saved registers also remains
+     the same, but all 64 bits are saved.
+
+`-mabicalls'
+`-mno-abicalls'
+     Generate (do not generate) code that is suitable for SVR4-style
+     dynamic objects.  `-mabicalls' is the default for SVR4-based
+     systems.
+
+`-mshared'
+`-mno-shared'
+     Generate (do not generate) code that is fully position-independent,
+     and that can therefore be linked into shared libraries.  This
+     option only affects `-mabicalls'.
+
+     All `-mabicalls' code has traditionally been position-independent,
+     regardless of options like `-fPIC' and `-fpic'.  However, as an
+     extension, the GNU toolchain allows executables to use absolute
+     accesses for locally-binding symbols.  It can also use shorter GP
+     initialization sequences and generate direct calls to
+     locally-defined functions.  This mode is selected by `-mno-shared'.
+
+     `-mno-shared' depends on binutils 2.16 or higher and generates
+     objects that can only be linked by the GNU linker.  However, the
+     option does not affect the ABI of the final executable; it only
+     affects the ABI of relocatable objects.  Using `-mno-shared' will
+     generally make executables both smaller and quicker.
+
+     `-mshared' is the default.
+
+`-mplt'
+`-mno-plt'
+     Assume (do not assume) that the static and dynamic linkers support
+     PLTs and copy relocations.  This option only affects `-mno-shared
+     -mabicalls'.  For the n64 ABI, this option has no effect without
+     `-msym32'.
+
+     You can make `-mplt' the default by configuring GCC with
+     `--with-mips-plt'.  The default is `-mno-plt' otherwise.
+
+`-mxgot'
+`-mno-xgot'
+     Lift (do not lift) the usual restrictions on the size of the global
+     offset table.
+
+     GCC normally uses a single instruction to load values from the GOT.
+     While this is relatively efficient, it will only work if the GOT
+     is smaller than about 64k.  Anything larger will cause the linker
+     to report an error such as:
+
+          relocation truncated to fit: R_MIPS_GOT16 foobar
+
+     If this happens, you should recompile your code with `-mxgot'.  It
+     should then work with very large GOTs, although it will also be
+     less efficient, since it will take three instructions to fetch the
+     value of a global symbol.
+
+     Note that some linkers can create multiple GOTs.  If you have such
+     a linker, you should only need to use `-mxgot' when a single object
+     file accesses more than 64k's worth of GOT entries.  Very few do.
+
+     These options have no effect unless GCC is generating position
+     independent code.
+
+`-mgp32'
+     Assume that general-purpose registers are 32 bits wide.
+
+`-mgp64'
+     Assume that general-purpose registers are 64 bits wide.
+
+`-mfp32'
+     Assume that floating-point registers are 32 bits wide.
+
+`-mfp64'
+     Assume that floating-point registers are 64 bits wide.
+
+`-mhard-float'
+     Use floating-point coprocessor instructions.
+
+`-msoft-float'
+     Do not use floating-point coprocessor instructions.  Implement
+     floating-point calculations using library calls instead.
+
+`-msingle-float'
+     Assume that the floating-point coprocessor only supports
+     single-precision operations.
+
+`-mdouble-float'
+     Assume that the floating-point coprocessor supports
+     double-precision operations.  This is the default.
+
+`-mllsc'
+`-mno-llsc'
+     Use (do not use) `ll', `sc', and `sync' instructions to implement
+     atomic memory built-in functions.  When neither option is
+     specified, GCC will use the instructions if the target architecture
+     supports them.
+
+     `-mllsc' is useful if the runtime environment can emulate the
+     instructions and `-mno-llsc' can be useful when compiling for
+     nonstandard ISAs.  You can make either option the default by
+     configuring GCC with `--with-llsc' and `--without-llsc'
+     respectively.  `--with-llsc' is the default for some
+     configurations; see the installation documentation for details.
+
+`-mdsp'
+`-mno-dsp'
+     Use (do not use) revision 1 of the MIPS DSP ASE.  *Note MIPS DSP
+     Built-in Functions::.  This option defines the preprocessor macro
+     `__mips_dsp'.  It also defines `__mips_dsp_rev' to 1.
+
+`-mdspr2'
+`-mno-dspr2'
+     Use (do not use) revision 2 of the MIPS DSP ASE.  *Note MIPS DSP
+     Built-in Functions::.  This option defines the preprocessor macros
+     `__mips_dsp' and `__mips_dspr2'.  It also defines `__mips_dsp_rev'
+     to 2.
+
+`-msmartmips'
+`-mno-smartmips'
+     Use (do not use) the MIPS SmartMIPS ASE.
+
+`-mpaired-single'
+`-mno-paired-single'
+     Use (do not use) paired-single floating-point instructions.  *Note
+     MIPS Paired-Single Support::.  This option requires hardware
+     floating-point support to be enabled.
+
+`-mdmx'
+`-mno-mdmx'
+     Use (do not use) MIPS Digital Media Extension instructions.  This
+     option can only be used when generating 64-bit code and requires
+     hardware floating-point support to be enabled.
+
+`-mips3d'
+`-mno-mips3d'
+     Use (do not use) the MIPS-3D ASE.  *Note MIPS-3D Built-in
+     Functions::.  The option `-mips3d' implies `-mpaired-single'.
+
+`-mmt'
+`-mno-mt'
+     Use (do not use) MT Multithreading instructions.
+
+`-mlong64'
+     Force `long' types to be 64 bits wide.  See `-mlong32' for an
+     explanation of the default and the way that the pointer size is
+     determined.
+
+`-mlong32'
+     Force `long', `int', and pointer types to be 32 bits wide.
+
+     The default size of `int's, `long's and pointers depends on the
+     ABI.  All the supported ABIs use 32-bit `int's.  The n64 ABI uses
+     64-bit `long's, as does the 64-bit EABI; the others use 32-bit
+     `long's.  Pointers are the same size as `long's, or the same size
+     as integer registers, whichever is smaller.
+
+`-msym32'
+`-mno-sym32'
+     Assume (do not assume) that all symbols have 32-bit values,
+     regardless of the selected ABI.  This option is useful in
+     combination with `-mabi=64' and `-mno-abicalls' because it allows
+     GCC to generate shorter and faster references to symbolic
+     addresses.
+
+`-G NUM'
+     Put definitions of externally-visible data in a small data section
+     if that data is no bigger than NUM bytes.  GCC can then access the
+     data more efficiently; see `-mgpopt' for details.
+
+     The default `-G' option depends on the configuration.
+
+`-mlocal-sdata'
+`-mno-local-sdata'
+     Extend (do not extend) the `-G' behavior to local data too, such
+     as to static variables in C.  `-mlocal-sdata' is the default for
+     all configurations.
+
+     If the linker complains that an application is using too much
+     small data, you might want to try rebuilding the less
+     performance-critical parts with `-mno-local-sdata'.  You might
+     also want to build large libraries with `-mno-local-sdata', so
+     that the libraries leave more room for the main program.
+
+`-mextern-sdata'
+`-mno-extern-sdata'
+     Assume (do not assume) that externally-defined data will be in a
+     small data section if that data is within the `-G' limit.
+     `-mextern-sdata' is the default for all configurations.
+
+     If you compile a module MOD with `-mextern-sdata' `-G NUM'
+     `-mgpopt', and MOD references a variable VAR that is no bigger
+     than NUM bytes, you must make sure that VAR is placed in a small
+     data section.  If VAR is defined by another module, you must
+     either compile that module with a high-enough `-G' setting or
+     attach a `section' attribute to VAR's definition.  If VAR is
+     common, you must link the application with a high-enough `-G'
+     setting.
+
+     The easiest way of satisfying these restrictions is to compile and
+     link every module with the same `-G' option.  However, you may
+     wish to build a library that supports several different small data
+     limits.  You can do this by compiling the library with the highest
+     supported `-G' setting and additionally using `-mno-extern-sdata'
+     to stop the library from making assumptions about
+     externally-defined data.
+
+`-mgpopt'
+`-mno-gpopt'
+     Use (do not use) GP-relative accesses for symbols that are known
+     to be in a small data section; see `-G', `-mlocal-sdata' and
+     `-mextern-sdata'.  `-mgpopt' is the default for all configurations.
+
+     `-mno-gpopt' is useful for cases where the `$gp' register might
+     not hold the value of `_gp'.  For example, if the code is part of
+     a library that might be used in a boot monitor, programs that call
+     boot monitor routines will pass an unknown value in `$gp'.  (In
+     such situations, the boot monitor itself would usually be compiled
+     with `-G0'.)
+
+     `-mno-gpopt' implies `-mno-local-sdata' and `-mno-extern-sdata'.
+
+`-membedded-data'
+`-mno-embedded-data'
+     Allocate variables to the read-only data section first if
+     possible, then next in the small data section if possible,
+     otherwise in data.  This gives slightly slower code than the
+     default, but reduces the amount of RAM required when executing,
+     and thus may be preferred for some embedded systems.
+
+`-muninit-const-in-rodata'
+`-mno-uninit-const-in-rodata'
+     Put uninitialized `const' variables in the read-only data section.
+     This option is only meaningful in conjunction with
+     `-membedded-data'.
+
+`-mcode-readable=SETTING'
+     Specify whether GCC may generate code that reads from executable
+     sections.  There are three possible settings:
+
+    `-mcode-readable=yes'
+          Instructions may freely access executable sections.  This is
+          the default setting.
+
+    `-mcode-readable=pcrel'
+          MIPS16 PC-relative load instructions can access executable
+          sections, but other instructions must not do so.  This option
+          is useful on 4KSc and 4KSd processors when the code TLBs have
+          the Read Inhibit bit set.  It is also useful on processors
+          that can be configured to have a dual instruction/data SRAM
+          interface and that, like the M4K, automatically redirect
+          PC-relative loads to the instruction RAM.
+
+    `-mcode-readable=no'
+          Instructions must not access executable sections.  This
+          option can be useful on targets that are configured to have a
+          dual instruction/data SRAM interface but that (unlike the
+          M4K) do not automatically redirect PC-relative loads to the
+          instruction RAM.
+
+`-msplit-addresses'
+`-mno-split-addresses'
+     Enable (disable) use of the `%hi()' and `%lo()' assembler
+     relocation operators.  This option has been superseded by
+     `-mexplicit-relocs' but is retained for backwards compatibility.
+
+`-mexplicit-relocs'
+`-mno-explicit-relocs'
+     Use (do not use) assembler relocation operators when dealing with
+     symbolic addresses.  The alternative, selected by
+     `-mno-explicit-relocs', is to use assembler macros instead.
+
+     `-mexplicit-relocs' is the default if GCC was configured to use an
+     assembler that supports relocation operators.
+
+`-mcheck-zero-division'
+`-mno-check-zero-division'
+     Trap (do not trap) on integer division by zero.
+
+     The default is `-mcheck-zero-division'.
+
+`-mdivide-traps'
+`-mdivide-breaks'
+     MIPS systems check for division by zero by generating either a
+     conditional trap or a break instruction.  Using traps results in
+     smaller code, but is only supported on MIPS II and later.  Also,
+     some versions of the Linux kernel have a bug that prevents trap
+     from generating the proper signal (`SIGFPE').  Use
+     `-mdivide-traps' to allow conditional traps on architectures that
+     support them and `-mdivide-breaks' to force the use of breaks.
+
+     The default is usually `-mdivide-traps', but this can be
+     overridden at configure time using `--with-divide=breaks'.
+     Divide-by-zero checks can be completely disabled using
+     `-mno-check-zero-division'.
+
+`-mmemcpy'
+`-mno-memcpy'
+     Force (do not force) the use of `memcpy()' for non-trivial block
+     moves.  The default is `-mno-memcpy', which allows GCC to inline
+     most constant-sized copies.
+
+`-mlong-calls'
+`-mno-long-calls'
+     Disable (do not disable) use of the `jal' instruction.  Calling
+     functions using `jal' is more efficient but requires the caller
+     and callee to be in the same 256 megabyte segment.
+
+     This option has no effect on abicalls code.  The default is
+     `-mno-long-calls'.
+
+`-mmad'
+`-mno-mad'
+     Enable (disable) use of the `mad', `madu' and `mul' instructions,
+     as provided by the R4650 ISA.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Enable (disable) use of the floating point multiply-accumulate
+     instructions, when they are available.  The default is
+     `-mfused-madd'.
+
+     When multiply-accumulate instructions are used, the intermediate
+     product is calculated to infinite precision and is not subject to
+     the FCSR Flush to Zero bit.  This may be undesirable in some
+     circumstances.
+
+`-nocpp'
+     Tell the MIPS assembler to not run its preprocessor over user
+     assembler files (with a `.s' suffix) when assembling them.
+
+`-mfix-r4000'
+`-mno-fix-r4000'
+     Work around certain R4000 CPU errata:
+        - A double-word or a variable shift may give an incorrect
+          result if executed immediately after starting an integer
+          division.
+
+        - A double-word or a variable shift may give an incorrect
+          result if executed while an integer multiplication is in
+          progress.
+
+        - An integer division may give an incorrect result if started
+          in a delay slot of a taken branch or a jump.
+
+`-mfix-r4400'
+`-mno-fix-r4400'
+     Work around certain R4400 CPU errata:
+        - A double-word or a variable shift may give an incorrect
+          result if executed immediately after starting an integer
+          division.
+
+`-mfix-r10000'
+`-mno-fix-r10000'
+     Work around certain R10000 errata:
+        - `ll'/`sc' sequences may not behave atomically on revisions
+          prior to 3.0.  They may deadlock on revisions 2.6 and earlier.
+
+     This option can only be used if the target architecture supports
+     branch-likely instructions.  `-mfix-r10000' is the default when
+     `-march=r10000' is used; `-mno-fix-r10000' is the default
+     otherwise.
+
+`-mfix-vr4120'
+`-mno-fix-vr4120'
+     Work around certain VR4120 errata:
+        - `dmultu' does not always produce the correct result.
+
+        - `div' and `ddiv' do not always produce the correct result if
+          one of the operands is negative.
+     The workarounds for the division errata rely on special functions
+     in `libgcc.a'.  At present, these functions are only provided by
+     the `mips64vr*-elf' configurations.
+
+     Other VR4120 errata require a nop to be inserted between certain
+     pairs of instructions.  These errata are handled by the assembler,
+     not by GCC itself.
+
+`-mfix-vr4130'
+     Work around the VR4130 `mflo'/`mfhi' errata.  The workarounds are
+     implemented by the assembler rather than by GCC, although GCC will
+     avoid using `mflo' and `mfhi' if the VR4130 `macc', `macchi',
+     `dmacc' and `dmacchi' instructions are available instead.
+
+`-mfix-sb1'
+`-mno-fix-sb1'
+     Work around certain SB-1 CPU core errata.  (This flag currently
+     works around the SB-1 revision 2 "F1" and "F2" floating point
+     errata.)
+
+`-mr10k-cache-barrier=SETTING'
+     Specify whether GCC should insert cache barriers to avoid the
+     side-effects of speculation on R10K processors.
+
+     In common with many processors, the R10K tries to predict the
+     outcome of a conditional branch and speculatively executes
+     instructions from the "taken" branch.  It later aborts these
+     instructions if the predicted outcome was wrong.  However, on the
+     R10K, even aborted instructions can have side effects.
+
+     This problem only affects kernel stores and, depending on the
+     system, kernel loads.  As an example, a speculatively-executed
+     store may load the target memory into cache and mark the cache
+     line as dirty, even if the store itself is later aborted.  If a
+     DMA operation writes to the same area of memory before the "dirty"
+     line is flushed, the cached data will overwrite the DMA-ed data.
+     See the R10K processor manual for a full description, including
+     other potential problems.
+
+     One workaround is to insert cache barrier instructions before
+     every memory access that might be speculatively executed and that
+     might have side effects even if aborted.
+     `-mr10k-cache-barrier=SETTING' controls GCC's implementation of
+     this workaround.  It assumes that aborted accesses to any byte in
+     the following regions will not have side effects:
+
+       1. the memory occupied by the current function's stack frame;
+
+       2. the memory occupied by an incoming stack argument;
+
+       3. the memory occupied by an object with a link-time-constant
+          address.
+
+     It is the kernel's responsibility to ensure that speculative
+     accesses to these regions are indeed safe.
+
+     If the input program contains a function declaration such as:
+
+          void foo (void);
+
+     then the implementation of `foo' must allow `j foo' and `jal foo'
+     to be executed speculatively.  GCC honors this restriction for
+     functions it compiles itself.  It expects non-GCC functions (such
+     as hand-written assembly code) to do the same.
+
+     The option has three forms:
+
+    `-mr10k-cache-barrier=load-store'
+          Insert a cache barrier before a load or store that might be
+          speculatively executed and that might have side effects even
+          if aborted.
+
+    `-mr10k-cache-barrier=store'
+          Insert a cache barrier before a store that might be
+          speculatively executed and that might have side effects even
+          if aborted.
+
+    `-mr10k-cache-barrier=none'
+          Disable the insertion of cache barriers.  This is the default
+          setting.
+
+`-mflush-func=FUNC'
+`-mno-flush-func'
+     Specifies the function to call to flush the I and D caches, or to
+     not call any such function.  If called, the function must take the
+     same arguments as the common `_flush_func()', that is, the address
+     of the memory range for which the cache is being flushed, the size
+     of the memory range, and the number 3 (to flush both caches).  The
+     default depends on the target GCC was configured for, but commonly
+     is either `_flush_func' or `__cpu_flush'.
+
+`mbranch-cost=NUM'
+     Set the cost of branches to roughly NUM "simple" instructions.
+     This cost is only a heuristic and is not guaranteed to produce
+     consistent results across releases.  A zero cost redundantly
+     selects the default, which is based on the `-mtune' setting.
+
+`-mbranch-likely'
+`-mno-branch-likely'
+     Enable or disable use of Branch Likely instructions, regardless of
+     the default for the selected architecture.  By default, Branch
+     Likely instructions may be generated if they are supported by the
+     selected architecture.  An exception is for the MIPS32 and MIPS64
+     architectures and processors which implement those architectures;
+     for those, Branch Likely instructions will not be generated by
+     default because the MIPS32 and MIPS64 architectures specifically
+     deprecate their use.
+
+`-mfp-exceptions'
+`-mno-fp-exceptions'
+     Specifies whether FP exceptions are enabled.  This affects how we
+     schedule FP instructions for some processors.  The default is that
+     FP exceptions are enabled.
+
+     For instance, on the SB-1, if FP exceptions are disabled, and we
+     are emitting 64-bit code, then we can use both FP pipes.
+     Otherwise, we can only use one FP pipe.
+
+`-mvr4130-align'
+`-mno-vr4130-align'
+     The VR4130 pipeline is two-way superscalar, but can only issue two
+     instructions together if the first one is 8-byte aligned.  When
+     this option is enabled, GCC will align pairs of instructions that
+     it thinks should execute in parallel.
+
+     This option only has an effect when optimizing for the VR4130.  It
+     normally makes code faster, but at the expense of making it bigger.
+     It is enabled by default at optimization level `-O3'.
+
+`-msynci'
+`-mno-synci'
+     Enable (disable) generation of `synci' instructions on
+     architectures that support it.  The `synci' instructions (if
+     enabled) will be generated when `__builtin___clear_cache()' is
+     compiled.
+
+     This option defaults to `-mno-synci', but the default can be
+     overridden by configuring with `--with-synci'.
+
+     When compiling code for single processor systems, it is generally
+     safe to use `synci'.  However, on many multi-core (SMP) systems, it
+     will not invalidate the instruction caches on all cores and may
+     lead to undefined behavior.
+
+`-mrelax-pic-calls'
+`-mno-relax-pic-calls'
+     Try to turn PIC calls that are normally dispatched via register
+     `$25' into direct calls.  This is only possible if the linker can
+     resolve the destination at link-time and if the destination is
+     within range for a direct call.
+
+     `-mrelax-pic-calls' is the default if GCC was configured to use an
+     assembler and a linker that supports the `.reloc' assembly
+     directive and `-mexplicit-relocs' is in effect.  With
+     `-mno-explicit-relocs', this optimization can be performed by the
+     assembler and the linker alone without help from the compiler.
+
+`-mmcount-ra-address'
+`-mno-mcount-ra-address'
+     Emit (do not emit) code that allows `_mcount' to modify the
+     calling function's return address.  When enabled, this option
+     extends the usual `_mcount' interface with a new RA-ADDRESS
+     parameter, which has type `intptr_t *' and is passed in register
+     `$12'.  `_mcount' can then modify the return address by doing both
+     of the following:
+        * Returning the new address in register `$31'.
+
+        * Storing the new address in `*RA-ADDRESS', if RA-ADDRESS is
+          nonnull.
+
+     The default is `-mno-mcount-ra-address'.
+
+
+
+File: gcc.info,  Node: MMIX Options,  Next: MN10300 Options,  Prev: MIPS Options,  Up: Submodel Options
+
+3.17.26 MMIX Options
+--------------------
+
+These options are defined for the MMIX:
+
+`-mlibfuncs'
+`-mno-libfuncs'
+     Specify that intrinsic library functions are being compiled,
+     passing all values in registers, no matter the size.
+
+`-mepsilon'
+`-mno-epsilon'
+     Generate floating-point comparison instructions that compare with
+     respect to the `rE' epsilon register.
+
+`-mabi=mmixware'
+`-mabi=gnu'
+     Generate code that passes function parameters and return values
+     that (in the called function) are seen as registers `$0' and up,
+     as opposed to the GNU ABI which uses global registers `$231' and
+     up.
+
+`-mzero-extend'
+`-mno-zero-extend'
+     When reading data from memory in sizes shorter than 64 bits, use
+     (do not use) zero-extending load instructions by default, rather
+     than sign-extending ones.
+
+`-mknuthdiv'
+`-mno-knuthdiv'
+     Make the result of a division yielding a remainder have the same
+     sign as the divisor.  With the default, `-mno-knuthdiv', the sign
+     of the remainder follows the sign of the dividend.  Both methods
+     are arithmetically valid, the latter being almost exclusively used.
+
+`-mtoplevel-symbols'
+`-mno-toplevel-symbols'
+     Prepend (do not prepend) a `:' to all global symbols, so the
+     assembly code can be used with the `PREFIX' assembly directive.
+
+`-melf'
+     Generate an executable in the ELF format, rather than the default
+     `mmo' format used by the `mmix' simulator.
+
+`-mbranch-predict'
+`-mno-branch-predict'
+     Use (do not use) the probable-branch instructions, when static
+     branch prediction indicates a probable branch.
+
+`-mbase-addresses'
+`-mno-base-addresses'
+     Generate (do not generate) code that uses _base addresses_.  Using
+     a base address automatically generates a request (handled by the
+     assembler and the linker) for a constant to be set up in a global
+     register.  The register is used for one or more base address
+     requests within the range 0 to 255 from the value held in the
+     register.  The generally leads to short and fast code, but the
+     number of different data items that can be addressed is limited.
+     This means that a program that uses lots of static data may
+     require `-mno-base-addresses'.
+
+`-msingle-exit'
+`-mno-single-exit'
+     Force (do not force) generated code to have a single exit point in
+     each function.
+
+
+File: gcc.info,  Node: MN10300 Options,  Next: OpenRISC 1000 Options,  Prev: MMIX Options,  Up: Submodel Options
+
+3.17.27 MN10300 Options
+-----------------------
+
+These `-m' options are defined for Matsushita MN10300 architectures:
+
+`-mmult-bug'
+     Generate code to avoid bugs in the multiply instructions for the
+     MN10300 processors.  This is the default.
+
+`-mno-mult-bug'
+     Do not generate code to avoid bugs in the multiply instructions
+     for the MN10300 processors.
+
+`-mam33'
+     Generate code which uses features specific to the AM33 processor.
+
+`-mno-am33'
+     Do not generate code which uses features specific to the AM33
+     processor.  This is the default.
+
+`-mreturn-pointer-on-d0'
+     When generating a function which returns a pointer, return the
+     pointer in both `a0' and `d0'.  Otherwise, the pointer is returned
+     only in a0, and attempts to call such functions without a prototype
+     would result in errors.  Note that this option is on by default;
+     use `-mno-return-pointer-on-d0' to disable it.
+
+`-mno-crt0'
+     Do not link in the C run-time initialization object file.
+
+`-mrelax'
+     Indicate to the linker that it should perform a relaxation
+     optimization pass to shorten branches, calls and absolute memory
+     addresses.  This option only has an effect when used on the
+     command line for the final link step.
+
+     This option makes symbolic debugging impossible.
+
+
+File: gcc.info,  Node: OpenRISC 1000 Options,  Next: PDP-11 Options,  Prev: MN10300 Options,  Up: Submodel Options
+
+3.17.28 OpenRISC 1000 Options
+-----------------------------
+
+These `-m' options are defined for OpenRISC 1000 implementations:
+
+`-mhard-float'
+     Generate code to use hardware (single precision) floating point
+     opcodes. The default is to use the software floating point library.
+
+`-msoft-float'
+     Use the software library for floating point. This is enabled by
+     default.
+
+`-mdouble-float'
+     Generate code to use double precision hardware floating point
+     opcodes. The default is not to enable this.  Since no targets
+     (hardware or modelled) currently implement the double precision
+     floating point instruction set, this option is of little use, and
+     also has not been properly tested.
+
+`-mhard-div'
+     Generate code to use hardware divide instructions.  By default
+     this is not enabled.
+
+`-msoft-div'
+     Generate code to use the software library for division.  By
+     default this is enabled.
+
+`-mhard-mul'
+     Generate code to use hardware multiply instructions.  By default
+     this is enabled.
+
+          Note: The standard Verilog RTL for OpenRISC includes a
+          hardware multiply but not divide instruction, so this will be
+          the correct setting.
+
+`-msoft-mul'
+     Generate code to use the software library for multiplication.  By
+     default this is not enabled.
+
+`-maj'
+     Align all branch and jump instructions on a double word boundary,
+     padding with `l.nop' where necessary.  It is not clear why this
+     option exists, of why it should ever be used.  It is disabled by
+     default and likely to be removed in a future release of GCC.
+
+`-msext'
+     Use sign extending instructions. By default this is not enabled.
+     It is not clear why this has not been enabled by default, since
+     the instructions concerned are all mandatory on the OpenRISC 1000.
+
+`-mcmov'
+     Use the `l.cmov' instruction in generated code. This is an optional
+     instruction on the OpenRISC 1000, so by default this option is not
+     enabled.
+
+`-mlogue'
+     Generate the prologue and epilogue using patterns in the machine
+     description, rather than fixed templates.  This potentially allows
+     generation of more efficient code. However the functionality has
+     not yet been fully tested, and is disabled by default.
+
+`-mror'
+     Use rotate instructions in generated code.  This is an optional
+     instruction on the OpenRISC 1000, so by default this option is not
+     enabled.
+
+`-msibcall'
+     Generate code to optimize tail calls of sibling functions.  This
+     potentially allows generation of more efficient code.  However the
+     functionality has not yet been fully tested, and is disabled by
+     default.
+
+`-mor32-newlib'
+     Use the headers for the simple OpenRISC 1000 newlib library when
+     preprocessing and includes this library when linking.  This is a
+     small C library, designed for standalone applications, which
+     offers only standard output.
+
+`-mor32-newlib-uart'
+     Use the headers for the OpenRISC 1000 newlib library with UART
+     support when preprocessing and includes this library when linking.
+     This is a small C library, designed for standalone applications,
+     which includes a UART connection for I/O to and from standard
+     output and standard input.
+
+
+
+File: gcc.info,  Node: PDP-11 Options,  Next: picoChip Options,  Prev: OpenRISC 1000 Options,  Up: Submodel Options
+
+3.17.29 PDP-11 Options
+----------------------
+
+These options are defined for the PDP-11:
+
+`-mfpu'
+     Use hardware FPP floating point.  This is the default.  (FIS
+     floating point on the PDP-11/40 is not supported.)
+
+`-msoft-float'
+     Do not use hardware floating point.
+
+`-mac0'
+     Return floating-point results in ac0 (fr0 in Unix assembler
+     syntax).
+
+`-mno-ac0'
+     Return floating-point results in memory.  This is the default.
+
+`-m40'
+     Generate code for a PDP-11/40.
+
+`-m45'
+     Generate code for a PDP-11/45.  This is the default.
+
+`-m10'
+     Generate code for a PDP-11/10.
+
+`-mbcopy-builtin'
+     Use inline `movmemhi' patterns for copying memory.  This is the
+     default.
+
+`-mbcopy'
+     Do not use inline `movmemhi' patterns for copying memory.
+
+`-mint16'
+`-mno-int32'
+     Use 16-bit `int'.  This is the default.
+
+`-mint32'
+`-mno-int16'
+     Use 32-bit `int'.
+
+`-mfloat64'
+`-mno-float32'
+     Use 64-bit `float'.  This is the default.
+
+`-mfloat32'
+`-mno-float64'
+     Use 32-bit `float'.
+
+`-mabshi'
+     Use `abshi2' pattern.  This is the default.
+
+`-mno-abshi'
+     Do not use `abshi2' pattern.
+
+`-mbranch-expensive'
+     Pretend that branches are expensive.  This is for experimenting
+     with code generation only.
+
+`-mbranch-cheap'
+     Do not pretend that branches are expensive.  This is the default.
+
+`-msplit'
+     Generate code for a system with split I&D.
+
+`-mno-split'
+     Generate code for a system without split I&D.  This is the default.
+
+`-munix-asm'
+     Use Unix assembler syntax.  This is the default when configured for
+     `pdp11-*-bsd'.
+
+`-mdec-asm'
+     Use DEC assembler syntax.  This is the default when configured for
+     any PDP-11 target other than `pdp11-*-bsd'.
+
+
+File: gcc.info,  Node: picoChip Options,  Next: PowerPC Options,  Prev: PDP-11 Options,  Up: Submodel Options
+
+3.17.30 picoChip Options
+------------------------
+
+These `-m' options are defined for picoChip implementations:
+
+`-mae=AE_TYPE'
+     Set the instruction set, register set, and instruction scheduling
+     parameters for array element type AE_TYPE.  Supported values for
+     AE_TYPE are `ANY', `MUL', and `MAC'.
+
+     `-mae=ANY' selects a completely generic AE type.  Code generated
+     with this option will run on any of the other AE types.  The code
+     will not be as efficient as it would be if compiled for a specific
+     AE type, and some types of operation (e.g., multiplication) will
+     not work properly on all types of AE.
+
+     `-mae=MUL' selects a MUL AE type.  This is the most useful AE type
+     for compiled code, and is the default.
+
+     `-mae=MAC' selects a DSP-style MAC AE.  Code compiled with this
+     option may suffer from poor performance of byte (char)
+     manipulation, since the DSP AE does not provide hardware support
+     for byte load/stores.
+
+`-msymbol-as-address'
+     Enable the compiler to directly use a symbol name as an address in
+     a load/store instruction, without first loading it into a
+     register.  Typically, the use of this option will generate larger
+     programs, which run faster than when the option isn't used.
+     However, the results vary from program to program, so it is left
+     as a user option, rather than being permanently enabled.
+
+`-mno-inefficient-warnings'
+     Disables warnings about the generation of inefficient code.  These
+     warnings can be generated, for example, when compiling code which
+     performs byte-level memory operations on the MAC AE type.  The MAC
+     AE has no hardware support for byte-level memory operations, so
+     all byte load/stores must be synthesized from word load/store
+     operations.  This is inefficient and a warning will be generated
+     indicating to the programmer that they should rewrite the code to
+     avoid byte operations, or to target an AE type which has the
+     necessary hardware support.  This option enables the warning to be
+     turned off.
+
+
+
+File: gcc.info,  Node: PowerPC Options,  Next: RS/6000 and PowerPC Options,  Prev: picoChip Options,  Up: Submodel Options
+
+3.17.31 PowerPC Options
+-----------------------
+
+These are listed under *Note RS/6000 and PowerPC Options::.
+
+
+File: gcc.info,  Node: RS/6000 and PowerPC Options,  Next: RX Options,  Prev: PowerPC Options,  Up: Submodel Options
+
+3.17.32 IBM RS/6000 and PowerPC Options
+---------------------------------------
+
+These `-m' options are defined for the IBM RS/6000 and PowerPC:
+`-mpower'
+`-mno-power'
+`-mpower2'
+`-mno-power2'
+`-mpowerpc'
+`-mno-powerpc'
+`-mpowerpc-gpopt'
+`-mno-powerpc-gpopt'
+`-mpowerpc-gfxopt'
+`-mno-powerpc-gfxopt'
+`-mpowerpc64'
+`-mno-powerpc64'
+`-mmfcrf'
+`-mno-mfcrf'
+`-mpopcntb'
+`-mno-popcntb'
+`-mpopcntd'
+`-mno-popcntd'
+`-mfprnd'
+`-mno-fprnd'
+`-mcmpb'
+`-mno-cmpb'
+`-mmfpgpr'
+`-mno-mfpgpr'
+`-mhard-dfp'
+`-mno-hard-dfp'
+     GCC supports two related instruction set architectures for the
+     RS/6000 and PowerPC.  The "POWER" instruction set are those
+     instructions supported by the `rios' chip set used in the original
+     RS/6000 systems and the "PowerPC" instruction set is the
+     architecture of the Freescale MPC5xx, MPC6xx, MPC8xx
+     microprocessors, and the IBM 4xx, 6xx, and follow-on
+     microprocessors.
+
+     Neither architecture is a subset of the other.  However there is a
+     large common subset of instructions supported by both.  An MQ
+     register is included in processors supporting the POWER
+     architecture.
+
+     You use these options to specify which instructions are available
+     on the processor you are using.  The default value of these
+     options is determined when configuring GCC.  Specifying the
+     `-mcpu=CPU_TYPE' overrides the specification of these options.  We
+     recommend you use the `-mcpu=CPU_TYPE' option rather than the
+     options listed above.
+
+     The `-mpower' option allows GCC to generate instructions that are
+     found only in the POWER architecture and to use the MQ register.
+     Specifying `-mpower2' implies `-power' and also allows GCC to
+     generate instructions that are present in the POWER2 architecture
+     but not the original POWER architecture.
+
+     The `-mpowerpc' option allows GCC to generate instructions that
+     are found only in the 32-bit subset of the PowerPC architecture.
+     Specifying `-mpowerpc-gpopt' implies `-mpowerpc' and also allows
+     GCC to use the optional PowerPC architecture instructions in the
+     General Purpose group, including floating-point square root.
+     Specifying `-mpowerpc-gfxopt' implies `-mpowerpc' and also allows
+     GCC to use the optional PowerPC architecture instructions in the
+     Graphics group, including floating-point select.
+
+     The `-mmfcrf' option allows GCC to generate the move from
+     condition register field instruction implemented on the POWER4
+     processor and other processors that support the PowerPC V2.01
+     architecture.  The `-mpopcntb' option allows GCC to generate the
+     popcount and double precision FP reciprocal estimate instruction
+     implemented on the POWER5 processor and other processors that
+     support the PowerPC V2.02 architecture.  The `-mpopcntd' option
+     allows GCC to generate the popcount instruction implemented on the
+     POWER7 processor and other processors that support the PowerPC
+     V2.06 architecture.  The `-mfprnd' option allows GCC to generate
+     the FP round to integer instructions implemented on the POWER5+
+     processor and other processors that support the PowerPC V2.03
+     architecture.  The `-mcmpb' option allows GCC to generate the
+     compare bytes instruction implemented on the POWER6 processor and
+     other processors that support the PowerPC V2.05 architecture.  The
+     `-mmfpgpr' option allows GCC to generate the FP move to/from
+     general purpose register instructions implemented on the POWER6X
+     processor and other processors that support the extended PowerPC
+     V2.05 architecture.  The `-mhard-dfp' option allows GCC to
+     generate the decimal floating point instructions implemented on
+     some POWER processors.
+
+     The `-mpowerpc64' option allows GCC to generate the additional
+     64-bit instructions that are found in the full PowerPC64
+     architecture and to treat GPRs as 64-bit, doubleword quantities.
+     GCC defaults to `-mno-powerpc64'.
+
+     If you specify both `-mno-power' and `-mno-powerpc', GCC will use
+     only the instructions in the common subset of both architectures
+     plus some special AIX common-mode calls, and will not use the MQ
+     register.  Specifying both `-mpower' and `-mpowerpc' permits GCC
+     to use any instruction from either architecture and to allow use
+     of the MQ register; specify this for the Motorola MPC601.
+
+`-mnew-mnemonics'
+`-mold-mnemonics'
+     Select which mnemonics to use in the generated assembler code.
+     With `-mnew-mnemonics', GCC uses the assembler mnemonics defined
+     for the PowerPC architecture.  With `-mold-mnemonics' it uses the
+     assembler mnemonics defined for the POWER architecture.
+     Instructions defined in only one architecture have only one
+     mnemonic; GCC uses that mnemonic irrespective of which of these
+     options is specified.
+
+     GCC defaults to the mnemonics appropriate for the architecture in
+     use.  Specifying `-mcpu=CPU_TYPE' sometimes overrides the value of
+     these option.  Unless you are building a cross-compiler, you
+     should normally not specify either `-mnew-mnemonics' or
+     `-mold-mnemonics', but should instead accept the default.
+
+`-mcpu=CPU_TYPE'
+     Set architecture type, register usage, choice of mnemonics, and
+     instruction scheduling parameters for machine type CPU_TYPE.
+     Supported values for CPU_TYPE are `401', `403', `405', `405fp',
+     `440', `440fp', `464', `464fp', `476', `476fp', `505', `601',
+     `602', `603', `603e', `604', `604e', `620', `630', `740', `7400',
+     `7450', `750', `801', `821', `823', `860', `970', `8540', `a2',
+     `e300c2', `e300c3', `e500mc', `e500mc64', `ec603e', `G3', `G4',
+     `G5', `power', `power2', `power3', `power4', `power5', `power5+',
+     `power6', `power6x', `power7', `common', `powerpc', `powerpc64',
+     `rios', `rios1', `rios2', `rsc', and `rs64'.
+
+     `-mcpu=common' selects a completely generic processor.  Code
+     generated under this option will run on any POWER or PowerPC
+     processor.  GCC will use only the instructions in the common
+     subset of both architectures, and will not use the MQ register.
+     GCC assumes a generic processor model for scheduling purposes.
+
+     `-mcpu=power', `-mcpu=power2', `-mcpu=powerpc', and
+     `-mcpu=powerpc64' specify generic POWER, POWER2, pure 32-bit
+     PowerPC (i.e., not MPC601), and 64-bit PowerPC architecture machine
+     types, with an appropriate, generic processor model assumed for
+     scheduling purposes.
+
+     The other options specify a specific processor.  Code generated
+     under those options will run best on that processor, and may not
+     run at all on others.
+
+     The `-mcpu' options automatically enable or disable the following
+     options:
+
+          -maltivec  -mfprnd  -mhard-float  -mmfcrf  -mmultiple
+          -mnew-mnemonics  -mpopcntb -mpopcntd  -mpower  -mpower2  -mpowerpc64
+          -mpowerpc-gpopt  -mpowerpc-gfxopt  -msingle-float -mdouble-float
+          -msimple-fpu -mstring  -mmulhw  -mdlmzb  -mmfpgpr -mvsx
+
+     The particular options set for any particular CPU will vary between
+     compiler versions, depending on what setting seems to produce
+     optimal code for that CPU; it doesn't necessarily reflect the
+     actual hardware's capabilities.  If you wish to set an individual
+     option to a particular value, you may specify it after the `-mcpu'
+     option, like `-mcpu=970 -mno-altivec'.
+
+     On AIX, the `-maltivec' and `-mpowerpc64' options are not enabled
+     or disabled by the `-mcpu' option at present because AIX does not
+     have full support for these options.  You may still enable or
+     disable them individually if you're sure it'll work in your
+     environment.
+
+`-mtune=CPU_TYPE'
+     Set the instruction scheduling parameters for machine type
+     CPU_TYPE, but do not set the architecture type, register usage, or
+     choice of mnemonics, as `-mcpu=CPU_TYPE' would.  The same values
+     for CPU_TYPE are used for `-mtune' as for `-mcpu'.  If both are
+     specified, the code generated will use the architecture,
+     registers, and mnemonics set by `-mcpu', but the scheduling
+     parameters set by `-mtune'.
+
+`-mswdiv'
+`-mno-swdiv'
+     Generate code to compute division as reciprocal estimate and
+     iterative refinement, creating opportunities for increased
+     throughput.  This feature requires: optional PowerPC Graphics
+     instruction set for single precision and FRE instruction for
+     double precision, assuming divides cannot generate user-visible
+     traps, and the domain values not include Infinities, denormals or
+     zero denominator.
+
+`-maltivec'
+`-mno-altivec'
+     Generate code that uses (does not use) AltiVec instructions, and
+     also enable the use of built-in functions that allow more direct
+     access to the AltiVec instruction set.  You may also need to set
+     `-mabi=altivec' to adjust the current ABI with AltiVec ABI
+     enhancements.
+
+`-mvrsave'
+`-mno-vrsave'
+     Generate VRSAVE instructions when generating AltiVec code.
+
+`-mgen-cell-microcode'
+     Generate Cell microcode instructions
+
+`-mwarn-cell-microcode'
+     Warning when a Cell microcode instruction is going to emitted.  An
+     example of a Cell microcode instruction is a variable shift.
+
+`-msecure-plt'
+     Generate code that allows ld and ld.so to build executables and
+     shared libraries with non-exec .plt and .got sections.  This is a
+     PowerPC 32-bit SYSV ABI option.
+
+`-mbss-plt'
+     Generate code that uses a BSS .plt section that ld.so fills in, and
+     requires .plt and .got sections that are both writable and
+     executable.  This is a PowerPC 32-bit SYSV ABI option.
+
+`-misel'
+`-mno-isel'
+     This switch enables or disables the generation of ISEL
+     instructions.
+
+`-misel=YES/NO'
+     This switch has been deprecated.  Use `-misel' and `-mno-isel'
+     instead.
+
+`-mspe'
+`-mno-spe'
+     This switch enables or disables the generation of SPE simd
+     instructions.
+
+`-mpaired'
+`-mno-paired'
+     This switch enables or disables the generation of PAIRED simd
+     instructions.
+
+`-mspe=YES/NO'
+     This option has been deprecated.  Use `-mspe' and `-mno-spe'
+     instead.
+
+`-mvsx'
+`-mno-vsx'
+     Generate code that uses (does not use) vector/scalar (VSX)
+     instructions, and also enable the use of built-in functions that
+     allow more direct access to the VSX instruction set.
+
+`-mfloat-gprs=YES/SINGLE/DOUBLE/NO'
+`-mfloat-gprs'
+     This switch enables or disables the generation of floating point
+     operations on the general purpose registers for architectures that
+     support it.
+
+     The argument YES or SINGLE enables the use of single-precision
+     floating point operations.
+
+     The argument DOUBLE enables the use of single and double-precision
+     floating point operations.
+
+     The argument NO disables floating point operations on the general
+     purpose registers.
+
+     This option is currently only available on the MPC854x.
+
+`-m32'
+`-m64'
+     Generate code for 32-bit or 64-bit environments of Darwin and SVR4
+     targets (including GNU/Linux).  The 32-bit environment sets int,
+     long and pointer to 32 bits and generates code that runs on any
+     PowerPC variant.  The 64-bit environment sets int to 32 bits and
+     long and pointer to 64 bits, and generates code for PowerPC64, as
+     for `-mpowerpc64'.
+
+`-mfull-toc'
+`-mno-fp-in-toc'
+`-mno-sum-in-toc'
+`-mminimal-toc'
+     Modify generation of the TOC (Table Of Contents), which is created
+     for every executable file.  The `-mfull-toc' option is selected by
+     default.  In that case, GCC will allocate at least one TOC entry
+     for each unique non-automatic variable reference in your program.
+     GCC will also place floating-point constants in the TOC.  However,
+     only 16,384 entries are available in the TOC.
+
+     If you receive a linker error message that saying you have
+     overflowed the available TOC space, you can reduce the amount of
+     TOC space used with the `-mno-fp-in-toc' and `-mno-sum-in-toc'
+     options.  `-mno-fp-in-toc' prevents GCC from putting floating-point
+     constants in the TOC and `-mno-sum-in-toc' forces GCC to generate
+     code to calculate the sum of an address and a constant at run-time
+     instead of putting that sum into the TOC.  You may specify one or
+     both of these options.  Each causes GCC to produce very slightly
+     slower and larger code at the expense of conserving TOC space.
+
+     If you still run out of space in the TOC even when you specify
+     both of these options, specify `-mminimal-toc' instead.  This
+     option causes GCC to make only one TOC entry for every file.  When
+     you specify this option, GCC will produce code that is slower and
+     larger but which uses extremely little TOC space.  You may wish to
+     use this option only on files that contain less frequently
+     executed code.
+
+`-maix64'
+`-maix32'
+     Enable 64-bit AIX ABI and calling convention: 64-bit pointers,
+     64-bit `long' type, and the infrastructure needed to support them.
+     Specifying `-maix64' implies `-mpowerpc64' and `-mpowerpc', while
+     `-maix32' disables the 64-bit ABI and implies `-mno-powerpc64'.
+     GCC defaults to `-maix32'.
+
+`-mxl-compat'
+`-mno-xl-compat'
+     Produce code that conforms more closely to IBM XL compiler
+     semantics when using AIX-compatible ABI.  Pass floating-point
+     arguments to prototyped functions beyond the register save area
+     (RSA) on the stack in addition to argument FPRs.  Do not assume
+     that most significant double in 128-bit long double value is
+     properly rounded when comparing values and converting to double.
+     Use XL symbol names for long double support routines.
+
+     The AIX calling convention was extended but not initially
+     documented to handle an obscure K&R C case of calling a function
+     that takes the address of its arguments with fewer arguments than
+     declared.  IBM XL compilers access floating point arguments which
+     do not fit in the RSA from the stack when a subroutine is compiled
+     without optimization.  Because always storing floating-point
+     arguments on the stack is inefficient and rarely needed, this
+     option is not enabled by default and only is necessary when
+     calling subroutines compiled by IBM XL compilers without
+     optimization.
+
+`-mpe'
+     Support "IBM RS/6000 SP" "Parallel Environment" (PE).  Link an
+     application written to use message passing with special startup
+     code to enable the application to run.  The system must have PE
+     installed in the standard location (`/usr/lpp/ppe.poe/'), or the
+     `specs' file must be overridden with the `-specs=' option to
+     specify the appropriate directory location.  The Parallel
+     Environment does not support threads, so the `-mpe' option and the
+     `-pthread' option are incompatible.
+
+`-malign-natural'
+`-malign-power'
+     On AIX, 32-bit Darwin, and 64-bit PowerPC GNU/Linux, the option
+     `-malign-natural' overrides the ABI-defined alignment of larger
+     types, such as floating-point doubles, on their natural size-based
+     boundary.  The option `-malign-power' instructs GCC to follow the
+     ABI-specified alignment rules.  GCC defaults to the standard
+     alignment defined in the ABI.
+
+     On 64-bit Darwin, natural alignment is the default, and
+     `-malign-power' is not supported.
+
+`-msoft-float'
+`-mhard-float'
+     Generate code that does not use (uses) the floating-point register
+     set.  Software floating point emulation is provided if you use the
+     `-msoft-float' option, and pass the option to GCC when linking.
+
+`-msingle-float'
+`-mdouble-float'
+     Generate code for single or double-precision floating point
+     operations.  `-mdouble-float' implies `-msingle-float'.
+
+`-msimple-fpu'
+     Do not generate sqrt and div instructions for hardware floating
+     point unit.
+
+`-mfpu'
+     Specify type of floating point unit.  Valid values are SP_LITE
+     (equivalent to -msingle-float -msimple-fpu), DP_LITE (equivalent
+     to -mdouble-float -msimple-fpu), SP_FULL (equivalent to
+     -msingle-float), and DP_FULL (equivalent to -mdouble-float).
+
+`-mxilinx-fpu'
+     Perform optimizations for floating point unit on Xilinx PPC
+     405/440.
+
+`-mmultiple'
+`-mno-multiple'
+     Generate code that uses (does not use) the load multiple word
+     instructions and the store multiple word instructions.  These
+     instructions are generated by default on POWER systems, and not
+     generated on PowerPC systems.  Do not use `-mmultiple' on little
+     endian PowerPC systems, since those instructions do not work when
+     the processor is in little endian mode.  The exceptions are PPC740
+     and PPC750 which permit the instructions usage in little endian
+     mode.
+
+`-mstring'
+`-mno-string'
+     Generate code that uses (does not use) the load string instructions
+     and the store string word instructions to save multiple registers
+     and do small block moves.  These instructions are generated by
+     default on POWER systems, and not generated on PowerPC systems.
+     Do not use `-mstring' on little endian PowerPC systems, since those
+     instructions do not work when the processor is in little endian
+     mode.  The exceptions are PPC740 and PPC750 which permit the
+     instructions usage in little endian mode.
+
+`-mupdate'
+`-mno-update'
+     Generate code that uses (does not use) the load or store
+     instructions that update the base register to the address of the
+     calculated memory location.  These instructions are generated by
+     default.  If you use `-mno-update', there is a small window
+     between the time that the stack pointer is updated and the address
+     of the previous frame is stored, which means code that walks the
+     stack frame across interrupts or signals may get corrupted data.
+
+`-mavoid-indexed-addresses'
+`-mno-avoid-indexed-addresses'
+     Generate code that tries to avoid (not avoid) the use of indexed
+     load or store instructions. These instructions can incur a
+     performance penalty on Power6 processors in certain situations,
+     such as when stepping through large arrays that cross a 16M
+     boundary.  This option is enabled by default when targetting
+     Power6 and disabled otherwise.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Generate code that uses (does not use) the floating point multiply
+     and accumulate instructions.  These instructions are generated by
+     default if hardware floating is used.
+
+`-mmulhw'
+`-mno-mulhw'
+     Generate code that uses (does not use) the half-word multiply and
+     multiply-accumulate instructions on the IBM 405, 440, 464 and 476
+     processors.  These instructions are generated by default when
+     targetting those processors.
+
+`-mdlmzb'
+`-mno-dlmzb'
+     Generate code that uses (does not use) the string-search `dlmzb'
+     instruction on the IBM 405, 440, 464 and 476 processors.  This
+     instruction is generated by default when targetting those
+     processors.
+
+`-mno-bit-align'
+`-mbit-align'
+     On System V.4 and embedded PowerPC systems do not (do) force
+     structures and unions that contain bit-fields to be aligned to the
+     base type of the bit-field.
+
+     For example, by default a structure containing nothing but 8
+     `unsigned' bit-fields of length 1 would be aligned to a 4 byte
+     boundary and have a size of 4 bytes.  By using `-mno-bit-align',
+     the structure would be aligned to a 1 byte boundary and be one
+     byte in size.
+
+`-mno-strict-align'
+`-mstrict-align'
+     On System V.4 and embedded PowerPC systems do not (do) assume that
+     unaligned memory references will be handled by the system.
+
+`-mrelocatable'
+`-mno-relocatable'
+     On embedded PowerPC systems generate code that allows (does not
+     allow) the program to be relocated to a different address at
+     runtime.  If you use `-mrelocatable' on any module, all objects
+     linked together must be compiled with `-mrelocatable' or
+     `-mrelocatable-lib'.
+
+`-mrelocatable-lib'
+`-mno-relocatable-lib'
+     On embedded PowerPC systems generate code that allows (does not
+     allow) the program to be relocated to a different address at
+     runtime.  Modules compiled with `-mrelocatable-lib' can be linked
+     with either modules compiled without `-mrelocatable' and
+     `-mrelocatable-lib' or with modules compiled with the
+     `-mrelocatable' options.
+
+`-mno-toc'
+`-mtoc'
+     On System V.4 and embedded PowerPC systems do not (do) assume that
+     register 2 contains a pointer to a global area pointing to the
+     addresses used in the program.
+
+`-mlittle'
+`-mlittle-endian'
+     On System V.4 and embedded PowerPC systems compile code for the
+     processor in little endian mode.  The `-mlittle-endian' option is
+     the same as `-mlittle'.
+
+`-mbig'
+`-mbig-endian'
+     On System V.4 and embedded PowerPC systems compile code for the
+     processor in big endian mode.  The `-mbig-endian' option is the
+     same as `-mbig'.
+
+`-mdynamic-no-pic'
+     On Darwin and Mac OS X systems, compile code so that it is not
+     relocatable, but that its external references are relocatable.  The
+     resulting code is suitable for applications, but not shared
+     libraries.
+
+`-mprioritize-restricted-insns=PRIORITY'
+     This option controls the priority that is assigned to
+     dispatch-slot restricted instructions during the second scheduling
+     pass.  The argument PRIORITY takes the value 0/1/2 to assign
+     NO/HIGHEST/SECOND-HIGHEST priority to dispatch slot restricted
+     instructions.
+
+`-msched-costly-dep=DEPENDENCE_TYPE'
+     This option controls which dependences are considered costly by
+     the target during instruction scheduling.  The argument
+     DEPENDENCE_TYPE takes one of the following values: NO: no
+     dependence is costly, ALL: all dependences are costly,
+     TRUE_STORE_TO_LOAD: a true dependence from store to load is costly,
+     STORE_TO_LOAD: any dependence from store to load is costly,
+     NUMBER: any dependence which latency >= NUMBER is costly.
+
+`-minsert-sched-nops=SCHEME'
+     This option controls which nop insertion scheme will be used during
+     the second scheduling pass.  The argument SCHEME takes one of the
+     following values: NO: Don't insert nops.  PAD: Pad with nops any
+     dispatch group which has vacant issue slots, according to the
+     scheduler's grouping.  REGROUP_EXACT: Insert nops to force costly
+     dependent insns into separate groups.  Insert exactly as many nops
+     as needed to force an insn to a new group, according to the
+     estimated processor grouping.  NUMBER: Insert nops to force costly
+     dependent insns into separate groups.  Insert NUMBER nops to force
+     an insn to a new group.
+
+`-mcall-sysv'
+     On System V.4 and embedded PowerPC systems compile code using
+     calling conventions that adheres to the March 1995 draft of the
+     System V Application Binary Interface, PowerPC processor
+     supplement.  This is the default unless you configured GCC using
+     `powerpc-*-eabiaix'.
+
+`-mcall-sysv-eabi'
+`-mcall-eabi'
+     Specify both `-mcall-sysv' and `-meabi' options.
+
+`-mcall-sysv-noeabi'
+     Specify both `-mcall-sysv' and `-mno-eabi' options.
+
+`-mcall-aixdesc'
+     On System V.4 and embedded PowerPC systems compile code for the AIX
+     operating system.
+
+`-mcall-linux'
+     On System V.4 and embedded PowerPC systems compile code for the
+     Linux-based GNU system.
+
+`-mcall-gnu'
+     On System V.4 and embedded PowerPC systems compile code for the
+     Hurd-based GNU system.
+
+`-mcall-freebsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     FreeBSD operating system.
+
+`-mcall-netbsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     NetBSD operating system.
+
+`-mcall-openbsd'
+     On System V.4 and embedded PowerPC systems compile code for the
+     OpenBSD operating system.
+
+`-maix-struct-return'
+     Return all structures in memory (as specified by the AIX ABI).
+
+`-msvr4-struct-return'
+     Return structures smaller than 8 bytes in registers (as specified
+     by the SVR4 ABI).
+
+`-mabi=ABI-TYPE'
+     Extend the current ABI with a particular extension, or remove such
+     extension.  Valid values are ALTIVEC, NO-ALTIVEC, SPE, NO-SPE,
+     IBMLONGDOUBLE, IEEELONGDOUBLE.
+
+`-mabi=spe'
+     Extend the current ABI with SPE ABI extensions.  This does not
+     change the default ABI, instead it adds the SPE ABI extensions to
+     the current ABI.
+
+`-mabi=no-spe'
+     Disable Booke SPE ABI extensions for the current ABI.
+
+`-mabi=ibmlongdouble'
+     Change the current ABI to use IBM extended precision long double.
+     This is a PowerPC 32-bit SYSV ABI option.
+
+`-mabi=ieeelongdouble'
+     Change the current ABI to use IEEE extended precision long double.
+     This is a PowerPC 32-bit Linux ABI option.
+
+`-mprototype'
+`-mno-prototype'
+     On System V.4 and embedded PowerPC systems assume that all calls to
+     variable argument functions are properly prototyped.  Otherwise,
+     the compiler must insert an instruction before every non
+     prototyped call to set or clear bit 6 of the condition code
+     register (CR) to indicate whether floating point values were
+     passed in the floating point registers in case the function takes
+     a variable arguments.  With `-mprototype', only calls to
+     prototyped variable argument functions will set or clear the bit.
+
+`-msim'
+     On embedded PowerPC systems, assume that the startup module is
+     called `sim-crt0.o' and that the standard C libraries are
+     `libsim.a' and `libc.a'.  This is the default for
+     `powerpc-*-eabisim' configurations.
+
+`-mmvme'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libmvme.a' and
+     `libc.a'.
+
+`-mads'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libads.a' and
+     `libc.a'.
+
+`-myellowknife'
+     On embedded PowerPC systems, assume that the startup module is
+     called `crt0.o' and the standard C libraries are `libyk.a' and
+     `libc.a'.
+
+`-mvxworks'
+     On System V.4 and embedded PowerPC systems, specify that you are
+     compiling for a VxWorks system.
+
+`-memb'
+     On embedded PowerPC systems, set the PPC_EMB bit in the ELF flags
+     header to indicate that `eabi' extended relocations are used.
+
+`-meabi'
+`-mno-eabi'
+     On System V.4 and embedded PowerPC systems do (do not) adhere to
+     the Embedded Applications Binary Interface (eabi) which is a set of
+     modifications to the System V.4 specifications.  Selecting `-meabi'
+     means that the stack is aligned to an 8 byte boundary, a function
+     `__eabi' is called to from `main' to set up the eabi environment,
+     and the `-msdata' option can use both `r2' and `r13' to point to
+     two separate small data areas.  Selecting `-mno-eabi' means that
+     the stack is aligned to a 16 byte boundary, do not call an
+     initialization function from `main', and the `-msdata' option will
+     only use `r13' to point to a single small data area.  The `-meabi'
+     option is on by default if you configured GCC using one of the
+     `powerpc*-*-eabi*' options.
+
+`-msdata=eabi'
+     On System V.4 and embedded PowerPC systems, put small initialized
+     `const' global and static data in the `.sdata2' section, which is
+     pointed to by register `r2'.  Put small initialized non-`const'
+     global and static data in the `.sdata' section, which is pointed
+     to by register `r13'.  Put small uninitialized global and static
+     data in the `.sbss' section, which is adjacent to the `.sdata'
+     section.  The `-msdata=eabi' option is incompatible with the
+     `-mrelocatable' option.  The `-msdata=eabi' option also sets the
+     `-memb' option.
+
+`-msdata=sysv'
+     On System V.4 and embedded PowerPC systems, put small global and
+     static data in the `.sdata' section, which is pointed to by
+     register `r13'.  Put small uninitialized global and static data in
+     the `.sbss' section, which is adjacent to the `.sdata' section.
+     The `-msdata=sysv' option is incompatible with the `-mrelocatable'
+     option.
+
+`-msdata=default'
+`-msdata'
+     On System V.4 and embedded PowerPC systems, if `-meabi' is used,
+     compile code the same as `-msdata=eabi', otherwise compile code the
+     same as `-msdata=sysv'.
+
+`-msdata=data'
+     On System V.4 and embedded PowerPC systems, put small global data
+     in the `.sdata' section.  Put small uninitialized global data in
+     the `.sbss' section.  Do not use register `r13' to address small
+     data however.  This is the default behavior unless other `-msdata'
+     options are used.
+
+`-msdata=none'
+`-mno-sdata'
+     On embedded PowerPC systems, put all initialized global and static
+     data in the `.data' section, and all uninitialized data in the
+     `.bss' section.
+
+`-G NUM'
+     On embedded PowerPC systems, put global and static items less than
+     or equal to NUM bytes into the small data or bss sections instead
+     of the normal data or bss section.  By default, NUM is 8.  The `-G
+     NUM' switch is also passed to the linker.  All modules should be
+     compiled with the same `-G NUM' value.
+
+`-mregnames'
+`-mno-regnames'
+     On System V.4 and embedded PowerPC systems do (do not) emit
+     register names in the assembly language output using symbolic
+     forms.
+
+`-mlongcall'
+`-mno-longcall'
+     By default assume that all calls are far away so that a longer more
+     expensive calling sequence is required.  This is required for calls
+     further than 32 megabytes (33,554,432 bytes) from the current
+     location.  A short call will be generated if the compiler knows
+     the call cannot be that far away.  This setting can be overridden
+     by the `shortcall' function attribute, or by `#pragma longcall(0)'.
+
+     Some linkers are capable of detecting out-of-range calls and
+     generating glue code on the fly.  On these systems, long calls are
+     unnecessary and generate slower code.  As of this writing, the AIX
+     linker can do this, as can the GNU linker for PowerPC/64.  It is
+     planned to add this feature to the GNU linker for 32-bit PowerPC
+     systems as well.
+
+     On Darwin/PPC systems, `#pragma longcall' will generate "jbsr
+     callee, L42", plus a "branch island" (glue code).  The two target
+     addresses represent the callee and the "branch island".  The
+     Darwin/PPC linker will prefer the first address and generate a "bl
+     callee" if the PPC "bl" instruction will reach the callee directly;
+     otherwise, the linker will generate "bl L42" to call the "branch
+     island".  The "branch island" is appended to the body of the
+     calling function; it computes the full 32-bit address of the callee
+     and jumps to it.
+
+     On Mach-O (Darwin) systems, this option directs the compiler emit
+     to the glue for every direct call, and the Darwin linker decides
+     whether to use or discard it.
+
+     In the future, we may cause GCC to ignore all longcall
+     specifications when the linker is known to generate glue.
+
+`-mtls-markers'
+`-mno-tls-markers'
+     Mark (do not mark) calls to `__tls_get_addr' with a relocation
+     specifying the function argument.  The relocation allows ld to
+     reliably associate function call with argument setup instructions
+     for TLS optimization, which in turn allows gcc to better schedule
+     the sequence.
+
+`-pthread'
+     Adds support for multithreading with the "pthreads" library.  This
+     option sets flags for both the preprocessor and linker.
+
+
+
+File: gcc.info,  Node: RX Options,  Next: S/390 and zSeries Options,  Prev: RS/6000 and PowerPC Options,  Up: Submodel Options
+
+3.17.33 RX Options
+------------------
+
+These command line options are defined for RX targets:
+
+`-m64bit-doubles'
+`-m32bit-doubles'
+     Make the `double' data type be 64-bits (`-m64bit-doubles') or
+     32-bits (`-m32bit-doubles') in size.  The default is
+     `-m32bit-doubles'.  _Note_ RX floating point hardware only works
+     on 32-bit values, which is why the default is `-m32bit-doubles'.
+
+`-fpu'
+`-nofpu'
+     Enables (`-fpu') or disables (`-nofpu') the use of RX floating
+     point hardware.  The default is enabled for the RX600 series and
+     disabled for the RX200 series.
+
+     Floating point instructions will only be generated for 32-bit
+     floating point values however, so if the `-m64bit-doubles' option
+     is in use then the FPU hardware will not be used for doubles.
+
+     _Note_ If the `-fpu' option is enabled then
+     `-funsafe-math-optimizations' is also enabled automatically.  This
+     is because the RX FPU instructions are themselves unsafe.
+
+`-mcpu=NAME'
+`-patch=NAME'
+     Selects the type of RX CPU to be targeted.  Currently three types
+     are supported, the generic RX600 and RX200 series hardware and the
+     specific RX610 cpu.  The default is RX600.
+
+     The only difference between RX600 and RX610 is that the RX610 does
+     not support the `MVTIPL' instruction.
+
+     The RX200 series does not have a hardware floating point unit and
+     so `-nofpu' is enabled by default when this type is selected.
+
+`-mbig-endian-data'
+`-mlittle-endian-data'
+     Store data (but not code) in the big-endian format.  The default is
+     `-mlittle-endian-data', ie to store data in the little endian
+     format.
+
+`-msmall-data-limit=N'
+     Specifies the maximum size in bytes of global and static variables
+     which can be placed into the small data area.  Using the small data
+     area can lead to smaller and faster code, but the size of area is
+     limited and it is up to the programmer to ensure that the area does
+     not overflow.  Also when the small data area is used one of the
+     RX's registers (`r13') is reserved for use pointing to this area,
+     so it is no longer available for use by the compiler.  This could
+     result in slower and/or larger code if variables which once could
+     have been held in `r13' are now pushed onto the stack.
+
+     Note, common variables (variables which have not been initialised)
+     and constants are not placed into the small data area as they are
+     assigned to other sections in the output executable.
+
+     The default value is zero, which disables this feature.  Note, this
+     feature is not enabled by default with higher optimization levels
+     (`-O2' etc) because of the potentially detrimental effects of
+     reserving register `r13'.  It is up to the programmer to
+     experiment and discover whether this feature is of benefit to their
+     program.
+
+`-msim'
+`-mno-sim'
+     Use the simulator runtime.  The default is to use the libgloss
+     board specific runtime.
+
+`-mas100-syntax'
+`-mno-as100-syntax'
+     When generating assembler output use a syntax that is compatible
+     with Renesas's AS100 assembler.  This syntax can also be handled
+     by the GAS assembler but it has some restrictions so generating it
+     is not the default option.
+
+`-mmax-constant-size=N'
+     Specifies the maximum size, in bytes, of a constant that can be
+     used as an operand in a RX instruction.  Although the RX
+     instruction set does allow constants of up to 4 bytes in length to
+     be used in instructions, a longer value equates to a longer
+     instruction.  Thus in some circumstances it can be beneficial to
+     restrict the size of constants that are used in instructions.
+     Constants that are too big are instead placed into a constant pool
+     and referenced via register indirection.
+
+     The value N can be between 0 and 4.  A value of 0 (the default) or
+     4 means that constants of any size are allowed.
+
+`-mrelax'
+     Enable linker relaxation.  Linker relaxation is a process whereby
+     the linker will attempt to reduce the size of a program by finding
+     shorter versions of various instructions.  Disabled by default.
+
+`-mint-register=N'
+     Specify the number of registers to reserve for fast interrupt
+     handler functions.  The value N can be between 0 and 4.  A value
+     of 1 means that register `r13' will be reserved for the exclusive
+     use of fast interrupt handlers.  A value of 2 reserves `r13' and
+     `r12'.  A value of 3 reserves `r13', `r12' and `r11', and a value
+     of 4 reserves `r13' through `r10'.  A value of 0, the default,
+     does not reserve any registers.
+
+`-msave-acc-in-interrupts'
+     Specifies that interrupt handler functions should preserve the
+     accumulator register.  This is only necessary if normal code might
+     use the accumulator register, for example because it performs
+     64-bit multiplications.  The default is to ignore the accumulator
+     as this makes the interrupt handlers faster.
+
+
+ _Note:_ The generic GCC command line `-ffixed-REG' has special
+significance to the RX port when used with the `interrupt' function
+attribute.  This attribute indicates a function intended to process
+fast interrupts.  GCC will will ensure that it only uses the registers
+`r10', `r11', `r12' and/or `r13' and only provided that the normal use
+of the corresponding registers have been restricted via the
+`-ffixed-REG' or `-mint-register' command line options.
+
+
+File: gcc.info,  Node: S/390 and zSeries Options,  Next: Score Options,  Prev: RX Options,  Up: Submodel Options
+
+3.17.34 S/390 and zSeries Options
+---------------------------------
+
+These are the `-m' options defined for the S/390 and zSeries
+architecture.
+
+`-mhard-float'
+`-msoft-float'
+     Use (do not use) the hardware floating-point instructions and
+     registers for floating-point operations.  When `-msoft-float' is
+     specified, functions in `libgcc.a' will be used to perform
+     floating-point operations.  When `-mhard-float' is specified, the
+     compiler generates IEEE floating-point instructions.  This is the
+     default.
+
+`-mhard-dfp'
+`-mno-hard-dfp'
+     Use (do not use) the hardware decimal-floating-point instructions
+     for decimal-floating-point operations.  When `-mno-hard-dfp' is
+     specified, functions in `libgcc.a' will be used to perform
+     decimal-floating-point operations.  When `-mhard-dfp' is
+     specified, the compiler generates decimal-floating-point hardware
+     instructions.  This is the default for `-march=z9-ec' or higher.
+
+`-mlong-double-64'
+`-mlong-double-128'
+     These switches control the size of `long double' type. A size of
+     64bit makes the `long double' type equivalent to the `double'
+     type. This is the default.
+
+`-mbackchain'
+`-mno-backchain'
+     Store (do not store) the address of the caller's frame as
+     backchain pointer into the callee's stack frame.  A backchain may
+     be needed to allow debugging using tools that do not understand
+     DWARF-2 call frame information.  When `-mno-packed-stack' is in
+     effect, the backchain pointer is stored at the bottom of the stack
+     frame; when `-mpacked-stack' is in effect, the backchain is placed
+     into the topmost word of the 96/160 byte register save area.
+
+     In general, code compiled with `-mbackchain' is call-compatible
+     with code compiled with `-mmo-backchain'; however, use of the
+     backchain for debugging purposes usually requires that the whole
+     binary is built with `-mbackchain'.  Note that the combination of
+     `-mbackchain', `-mpacked-stack' and `-mhard-float' is not
+     supported.  In order to build a linux kernel use `-msoft-float'.
+
+     The default is to not maintain the backchain.
+
+`-mpacked-stack'
+`-mno-packed-stack'
+     Use (do not use) the packed stack layout.  When
+     `-mno-packed-stack' is specified, the compiler uses the all fields
+     of the 96/160 byte register save area only for their default
+     purpose; unused fields still take up stack space.  When
+     `-mpacked-stack' is specified, register save slots are densely
+     packed at the top of the register save area; unused space is
+     reused for other purposes, allowing for more efficient use of the
+     available stack space.  However, when `-mbackchain' is also in
+     effect, the topmost word of the save area is always used to store
+     the backchain, and the return address register is always saved two
+     words below the backchain.
+
+     As long as the stack frame backchain is not used, code generated
+     with `-mpacked-stack' is call-compatible with code generated with
+     `-mno-packed-stack'.  Note that some non-FSF releases of GCC 2.95
+     for S/390 or zSeries generated code that uses the stack frame
+     backchain at run time, not just for debugging purposes.  Such code
+     is not call-compatible with code compiled with `-mpacked-stack'.
+     Also, note that the combination of `-mbackchain', `-mpacked-stack'
+     and `-mhard-float' is not supported.  In order to build a linux
+     kernel use `-msoft-float'.
+
+     The default is to not use the packed stack layout.
+
+`-msmall-exec'
+`-mno-small-exec'
+     Generate (or do not generate) code using the `bras' instruction to
+     do subroutine calls.  This only works reliably if the total
+     executable size does not exceed 64k.  The default is to use the
+     `basr' instruction instead, which does not have this limitation.
+
+`-m64'
+`-m31'
+     When `-m31' is specified, generate code compliant to the GNU/Linux
+     for S/390 ABI.  When `-m64' is specified, generate code compliant
+     to the GNU/Linux for zSeries ABI.  This allows GCC in particular
+     to generate 64-bit instructions.  For the `s390' targets, the
+     default is `-m31', while the `s390x' targets default to `-m64'.
+
+`-mzarch'
+`-mesa'
+     When `-mzarch' is specified, generate code using the instructions
+     available on z/Architecture.  When `-mesa' is specified, generate
+     code using the instructions available on ESA/390.  Note that
+     `-mesa' is not possible with `-m64'.  When generating code
+     compliant to the GNU/Linux for S/390 ABI, the default is `-mesa'.
+     When generating code compliant to the GNU/Linux for zSeries ABI,
+     the default is `-mzarch'.
+
+`-mmvcle'
+`-mno-mvcle'
+     Generate (or do not generate) code using the `mvcle' instruction
+     to perform block moves.  When `-mno-mvcle' is specified, use a
+     `mvc' loop instead.  This is the default unless optimizing for
+     size.
+
+`-mdebug'
+`-mno-debug'
+     Print (or do not print) additional debug information when
+     compiling.  The default is to not print debug information.
+
+`-march=CPU-TYPE'
+     Generate code that will run on CPU-TYPE, which is the name of a
+     system representing a certain processor type.  Possible values for
+     CPU-TYPE are `g5', `g6', `z900', `z990', `z9-109', `z9-ec' and
+     `z10'.  When generating code using the instructions available on
+     z/Architecture, the default is `-march=z900'.  Otherwise, the
+     default is `-march=g5'.
+
+`-mtune=CPU-TYPE'
+     Tune to CPU-TYPE everything applicable about the generated code,
+     except for the ABI and the set of available instructions.  The
+     list of CPU-TYPE values is the same as for `-march'.  The default
+     is the value used for `-march'.
+
+`-mtpf-trace'
+`-mno-tpf-trace'
+     Generate code that adds (does not add) in TPF OS specific branches
+     to trace routines in the operating system.  This option is off by
+     default, even when compiling for the TPF OS.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Generate code that uses (does not use) the floating point multiply
+     and accumulate instructions.  These instructions are generated by
+     default if hardware floating point is used.
+
+`-mwarn-framesize=FRAMESIZE'
+     Emit a warning if the current function exceeds the given frame
+     size.  Because this is a compile time check it doesn't need to be
+     a real problem when the program runs.  It is intended to identify
+     functions which most probably cause a stack overflow.  It is
+     useful to be used in an environment with limited stack size e.g.
+     the linux kernel.
+
+`-mwarn-dynamicstack'
+     Emit a warning if the function calls alloca or uses dynamically
+     sized arrays.  This is generally a bad idea with a limited stack
+     size.
+
+`-mstack-guard=STACK-GUARD'
+`-mstack-size=STACK-SIZE'
+     If these options are provided the s390 back end emits additional
+     instructions in the function prologue which trigger a trap if the
+     stack size is STACK-GUARD bytes above the STACK-SIZE (remember
+     that the stack on s390 grows downward).  If the STACK-GUARD option
+     is omitted the smallest power of 2 larger than the frame size of
+     the compiled function is chosen.  These options are intended to be
+     used to help debugging stack overflow problems.  The additionally
+     emitted code causes only little overhead and hence can also be
+     used in production like systems without greater performance
+     degradation.  The given values have to be exact powers of 2 and
+     STACK-SIZE has to be greater than STACK-GUARD without exceeding
+     64k.  In order to be efficient the extra code makes the assumption
+     that the stack starts at an address aligned to the value given by
+     STACK-SIZE.  The STACK-GUARD option can only be used in
+     conjunction with STACK-SIZE.
+
+
+File: gcc.info,  Node: Score Options,  Next: SH Options,  Prev: S/390 and zSeries Options,  Up: Submodel Options
+
+3.17.35 Score Options
+---------------------
+
+These options are defined for Score implementations:
+
+`-meb'
+     Compile code for big endian mode.  This is the default.
+
+`-mel'
+     Compile code for little endian mode.
+
+`-mnhwloop'
+     Disable generate bcnz instruction.
+
+`-muls'
+     Enable generate unaligned load and store instruction.
+
+`-mmac'
+     Enable the use of multiply-accumulate instructions. Disabled by
+     default.
+
+`-mscore5'
+     Specify the SCORE5 as the target architecture.
+
+`-mscore5u'
+     Specify the SCORE5U of the target architecture.
+
+`-mscore7'
+     Specify the SCORE7 as the target architecture. This is the default.
+
+`-mscore7d'
+     Specify the SCORE7D as the target architecture.
+
+
+File: gcc.info,  Node: SH Options,  Next: SPARC Options,  Prev: Score Options,  Up: Submodel Options
+
+3.17.36 SH Options
+------------------
+
+These `-m' options are defined for the SH implementations:
+
+`-m1'
+     Generate code for the SH1.
+
+`-m2'
+     Generate code for the SH2.
+
+`-m2e'
+     Generate code for the SH2e.
+
+`-m2a-nofpu'
+     Generate code for the SH2a without FPU, or for a SH2a-FPU in such
+     a way that the floating-point unit is not used.
+
+`-m2a-single-only'
+     Generate code for the SH2a-FPU, in such a way that no
+     double-precision floating point operations are used.
+
+`-m2a-single'
+     Generate code for the SH2a-FPU assuming the floating-point unit is
+     in single-precision mode by default.
+
+`-m2a'
+     Generate code for the SH2a-FPU assuming the floating-point unit is
+     in double-precision mode by default.
+
+`-m3'
+     Generate code for the SH3.
+
+`-m3e'
+     Generate code for the SH3e.
+
+`-m4-nofpu'
+     Generate code for the SH4 without a floating-point unit.
+
+`-m4-single-only'
+     Generate code for the SH4 with a floating-point unit that only
+     supports single-precision arithmetic.
+
+`-m4-single'
+     Generate code for the SH4 assuming the floating-point unit is in
+     single-precision mode by default.
+
+`-m4'
+     Generate code for the SH4.
+
+`-m4a-nofpu'
+     Generate code for the SH4al-dsp, or for a SH4a in such a way that
+     the floating-point unit is not used.
+
+`-m4a-single-only'
+     Generate code for the SH4a, in such a way that no double-precision
+     floating point operations are used.
+
+`-m4a-single'
+     Generate code for the SH4a assuming the floating-point unit is in
+     single-precision mode by default.
+
+`-m4a'
+     Generate code for the SH4a.
+
+`-m4al'
+     Same as `-m4a-nofpu', except that it implicitly passes `-dsp' to
+     the assembler.  GCC doesn't generate any DSP instructions at the
+     moment.
+
+`-mb'
+     Compile code for the processor in big endian mode.
+
+`-ml'
+     Compile code for the processor in little endian mode.
+
+`-mdalign'
+     Align doubles at 64-bit boundaries.  Note that this changes the
+     calling conventions, and thus some functions from the standard C
+     library will not work unless you recompile it first with
+     `-mdalign'.
+
+`-mrelax'
+     Shorten some address references at link time, when possible; uses
+     the linker option `-relax'.
+
+`-mbigtable'
+     Use 32-bit offsets in `switch' tables.  The default is to use
+     16-bit offsets.
+
+`-mbitops'
+     Enable the use of bit manipulation instructions on SH2A.
+
+`-mfmovd'
+     Enable the use of the instruction `fmovd'.  Check `-mdalign' for
+     alignment constraints.
+
+`-mhitachi'
+     Comply with the calling conventions defined by Renesas.
+
+`-mrenesas'
+     Comply with the calling conventions defined by Renesas.
+
+`-mno-renesas'
+     Comply with the calling conventions defined for GCC before the
+     Renesas conventions were available.  This option is the default
+     for all targets of the SH toolchain except for `sh-symbianelf'.
+
+`-mnomacsave'
+     Mark the `MAC' register as call-clobbered, even if `-mhitachi' is
+     given.
+
+`-mieee'
+     Increase IEEE-compliance of floating-point code.  At the moment,
+     this is equivalent to `-fno-finite-math-only'.  When generating 16
+     bit SH opcodes, getting IEEE-conforming results for comparisons of
+     NANs / infinities incurs extra overhead in every floating point
+     comparison, therefore the default is set to `-ffinite-math-only'.
+
+`-minline-ic_invalidate'
+     Inline code to invalidate instruction cache entries after setting
+     up nested function trampolines.  This option has no effect if
+     -musermode is in effect and the selected code generation option
+     (e.g. -m4) does not allow the use of the icbi instruction.  If the
+     selected code generation option does not allow the use of the icbi
+     instruction, and -musermode is not in effect, the inlined code will
+     manipulate the instruction cache address array directly with an
+     associative write.  This not only requires privileged mode, but it
+     will also fail if the cache line had been mapped via the TLB and
+     has become unmapped.
+
+`-misize'
+     Dump instruction size and location in the assembly code.
+
+`-mpadstruct'
+     This option is deprecated.  It pads structures to multiple of 4
+     bytes, which is incompatible with the SH ABI.
+
+`-mspace'
+     Optimize for space instead of speed.  Implied by `-Os'.
+
+`-mprefergot'
+     When generating position-independent code, emit function calls
+     using the Global Offset Table instead of the Procedure Linkage
+     Table.
+
+`-musermode'
+     Don't generate privileged mode only code; implies
+     -mno-inline-ic_invalidate if the inlined code would not work in
+     user mode.  This is the default when the target is `sh-*-linux*'.
+
+`-multcost=NUMBER'
+     Set the cost to assume for a multiply insn.
+
+`-mdiv=STRATEGY'
+     Set the division strategy to use for SHmedia code.  STRATEGY must
+     be one of: call, call2, fp, inv, inv:minlat, inv20u, inv20l,
+     inv:call, inv:call2, inv:fp .  "fp" performs the operation in
+     floating point.  This has a very high latency, but needs only a
+     few instructions, so it might be a good choice if your code has
+     enough easily exploitable ILP to allow the compiler to schedule
+     the floating point instructions together with other instructions.
+     Division by zero causes a floating point exception.  "inv" uses
+     integer operations to calculate the inverse of the divisor, and
+     then multiplies the dividend with the inverse.  This strategy
+     allows cse and hoisting of the inverse calculation.  Division by
+     zero calculates an unspecified result, but does not trap.
+     "inv:minlat" is a variant of "inv" where if no cse / hoisting
+     opportunities have been found, or if the entire operation has been
+     hoisted to the same place, the last stages of the inverse
+     calculation are intertwined with the final multiply to reduce the
+     overall latency, at the expense of using a few more instructions,
+     and thus offering fewer scheduling opportunities with other code.
+     "call" calls a library function that usually implements the
+     inv:minlat strategy.  This gives high code density for
+     m5-*media-nofpu compilations.  "call2" uses a different entry
+     point of the same library function, where it assumes that a
+     pointer to a lookup table has already been set up, which exposes
+     the pointer load to cse / code hoisting optimizations.
+     "inv:call", "inv:call2" and "inv:fp" all use the "inv" algorithm
+     for initial code generation, but if the code stays unoptimized,
+     revert to the "call", "call2", or "fp" strategies, respectively.
+     Note that the potentially-trapping side effect of division by zero
+     is carried by a separate instruction, so it is possible that all
+     the integer instructions are hoisted out, but the marker for the
+     side effect stays where it is.  A recombination to fp operations
+     or a call is not possible in that case.  "inv20u" and "inv20l" are
+     variants of the "inv:minlat" strategy.  In the case that the
+     inverse calculation was nor separated from the multiply, they speed
+     up division where the dividend fits into 20 bits (plus sign where
+     applicable), by inserting a test to skip a number of operations in
+     this case; this test slows down the case of larger dividends.
+     inv20u assumes the case of a such a small dividend to be unlikely,
+     and inv20l assumes it to be likely.
+
+`-mdivsi3_libfunc=NAME'
+     Set the name of the library function used for 32 bit signed
+     division to NAME.  This only affect the name used in the call and
+     inv:call division strategies, and the compiler will still expect
+     the same sets of input/output/clobbered registers as if this
+     option was not present.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-madjust-unroll'
+     Throttle unrolling to avoid thrashing target registers.  This
+     option only has an effect if the gcc code base supports the
+     TARGET_ADJUST_UNROLL_MAX target hook.
+
+`-mindexed-addressing'
+     Enable the use of the indexed addressing mode for
+     SHmedia32/SHcompact.  This is only safe if the hardware and/or OS
+     implement 32 bit wrap-around semantics for the indexed addressing
+     mode.  The architecture allows the implementation of processors
+     with 64 bit MMU, which the OS could use to get 32 bit addressing,
+     but since no current hardware implementation supports this or any
+     other way to make the indexed addressing mode safe to use in the
+     32 bit ABI, the default is -mno-indexed-addressing.
+
+`-mgettrcost=NUMBER'
+     Set the cost assumed for the gettr instruction to NUMBER.  The
+     default is 2 if `-mpt-fixed' is in effect, 100 otherwise.
+
+`-mpt-fixed'
+     Assume pt* instructions won't trap.  This will generally generate
+     better scheduled code, but is unsafe on current hardware.  The
+     current architecture definition says that ptabs and ptrel trap
+     when the target anded with 3 is 3.  This has the unintentional
+     effect of making it unsafe to schedule ptabs / ptrel before a
+     branch, or hoist it out of a loop.  For example,
+     __do_global_ctors, a part of libgcc that runs constructors at
+     program startup, calls functions in a list which is delimited by
+     -1.  With the -mpt-fixed option, the ptabs will be done before
+     testing against -1.  That means that all the constructors will be
+     run a bit quicker, but when the loop comes to the end of the list,
+     the program crashes because ptabs loads -1 into a target register.
+     Since this option is unsafe for any hardware implementing the
+     current architecture specification, the default is -mno-pt-fixed.
+     Unless the user specifies a specific cost with `-mgettrcost',
+     -mno-pt-fixed also implies `-mgettrcost=100'; this deters register
+     allocation using target registers for storing ordinary integers.
+
+`-minvalid-symbols'
+     Assume symbols might be invalid.  Ordinary function symbols
+     generated by the compiler will always be valid to load with
+     movi/shori/ptabs or movi/shori/ptrel, but with assembler and/or
+     linker tricks it is possible to generate symbols that will cause
+     ptabs / ptrel to trap.  This option is only meaningful when
+     `-mno-pt-fixed' is in effect.  It will then prevent
+     cross-basic-block cse, hoisting and most scheduling of symbol
+     loads.  The default is `-mno-invalid-symbols'.
+
+
+File: gcc.info,  Node: SPARC Options,  Next: SPU Options,  Prev: SH Options,  Up: Submodel Options
+
+3.17.37 SPARC Options
+---------------------
+
+These `-m' options are supported on the SPARC:
+
+`-mno-app-regs'
+`-mapp-regs'
+     Specify `-mapp-regs' to generate output using the global registers
+     2 through 4, which the SPARC SVR4 ABI reserves for applications.
+     This is the default.
+
+     To be fully SVR4 ABI compliant at the cost of some performance
+     loss, specify `-mno-app-regs'.  You should compile libraries and
+     system software with this option.
+
+`-mfpu'
+`-mhard-float'
+     Generate output containing floating point instructions.  This is
+     the default.
+
+`-mno-fpu'
+`-msoft-float'
+     Generate output containing library calls for floating point.
+     *Warning:* the requisite libraries are not available for all SPARC
+     targets.  Normally the facilities of the machine's usual C
+     compiler are used, but this cannot be done directly in
+     cross-compilation.  You must make your own arrangements to provide
+     suitable library functions for cross-compilation.  The embedded
+     targets `sparc-*-aout' and `sparclite-*-*' do provide software
+     floating point support.
+
+     `-msoft-float' changes the calling convention in the output file;
+     therefore, it is only useful if you compile _all_ of a program with
+     this option.  In particular, you need to compile `libgcc.a', the
+     library that comes with GCC, with `-msoft-float' in order for this
+     to work.
+
+`-mhard-quad-float'
+     Generate output containing quad-word (long double) floating point
+     instructions.
+
+`-msoft-quad-float'
+     Generate output containing library calls for quad-word (long
+     double) floating point instructions.  The functions called are
+     those specified in the SPARC ABI.  This is the default.
+
+     As of this writing, there are no SPARC implementations that have
+     hardware support for the quad-word floating point instructions.
+     They all invoke a trap handler for one of these instructions, and
+     then the trap handler emulates the effect of the instruction.
+     Because of the trap handler overhead, this is much slower than
+     calling the ABI library routines.  Thus the `-msoft-quad-float'
+     option is the default.
+
+`-mno-unaligned-doubles'
+`-munaligned-doubles'
+     Assume that doubles have 8 byte alignment.  This is the default.
+
+     With `-munaligned-doubles', GCC assumes that doubles have 8 byte
+     alignment only if they are contained in another type, or if they
+     have an absolute address.  Otherwise, it assumes they have 4 byte
+     alignment.  Specifying this option avoids some rare compatibility
+     problems with code generated by other compilers.  It is not the
+     default because it results in a performance loss, especially for
+     floating point code.
+
+`-mno-faster-structs'
+`-mfaster-structs'
+     With `-mfaster-structs', the compiler assumes that structures
+     should have 8 byte alignment.  This enables the use of pairs of
+     `ldd' and `std' instructions for copies in structure assignment,
+     in place of twice as many `ld' and `st' pairs.  However, the use
+     of this changed alignment directly violates the SPARC ABI.  Thus,
+     it's intended only for use on targets where the developer
+     acknowledges that their resulting code will not be directly in
+     line with the rules of the ABI.
+
+`-mimpure-text'
+     `-mimpure-text', used in addition to `-shared', tells the compiler
+     to not pass `-z text' to the linker when linking a shared object.
+     Using this option, you can link position-dependent code into a
+     shared object.
+
+     `-mimpure-text' suppresses the "relocations remain against
+     allocatable but non-writable sections" linker error message.
+     However, the necessary relocations will trigger copy-on-write, and
+     the shared object is not actually shared across processes.
+     Instead of using `-mimpure-text', you should compile all source
+     code with `-fpic' or `-fPIC'.
+
+     This option is only available on SunOS and Solaris.
+
+`-mcpu=CPU_TYPE'
+     Set the instruction set, register set, and instruction scheduling
+     parameters for machine type CPU_TYPE.  Supported values for
+     CPU_TYPE are `v7', `cypress', `v8', `supersparc', `sparclite',
+     `f930', `f934', `hypersparc', `sparclite86x', `sparclet',
+     `tsc701', `v9', `ultrasparc', `ultrasparc3', `niagara' and
+     `niagara2'.
+
+     Default instruction scheduling parameters are used for values that
+     select an architecture and not an implementation.  These are `v7',
+     `v8', `sparclite', `sparclet', `v9'.
+
+     Here is a list of each supported architecture and their supported
+     implementations.
+
+              v7:             cypress
+              v8:             supersparc, hypersparc
+              sparclite:      f930, f934, sparclite86x
+              sparclet:       tsc701
+              v9:             ultrasparc, ultrasparc3, niagara, niagara2
+
+     By default (unless configured otherwise), GCC generates code for
+     the V7 variant of the SPARC architecture.  With `-mcpu=cypress',
+     the compiler additionally optimizes it for the Cypress CY7C602
+     chip, as used in the SPARCStation/SPARCServer 3xx series.  This is
+     also appropriate for the older SPARCStation 1, 2, IPX etc.
+
+     With `-mcpu=v8', GCC generates code for the V8 variant of the SPARC
+     architecture.  The only difference from V7 code is that the
+     compiler emits the integer multiply and integer divide
+     instructions which exist in SPARC-V8 but not in SPARC-V7.  With
+     `-mcpu=supersparc', the compiler additionally optimizes it for the
+     SuperSPARC chip, as used in the SPARCStation 10, 1000 and 2000
+     series.
+
+     With `-mcpu=sparclite', GCC generates code for the SPARClite
+     variant of the SPARC architecture.  This adds the integer
+     multiply, integer divide step and scan (`ffs') instructions which
+     exist in SPARClite but not in SPARC-V7.  With `-mcpu=f930', the
+     compiler additionally optimizes it for the Fujitsu MB86930 chip,
+     which is the original SPARClite, with no FPU.  With `-mcpu=f934',
+     the compiler additionally optimizes it for the Fujitsu MB86934
+     chip, which is the more recent SPARClite with FPU.
+
+     With `-mcpu=sparclet', GCC generates code for the SPARClet variant
+     of the SPARC architecture.  This adds the integer multiply,
+     multiply/accumulate, integer divide step and scan (`ffs')
+     instructions which exist in SPARClet but not in SPARC-V7.  With
+     `-mcpu=tsc701', the compiler additionally optimizes it for the
+     TEMIC SPARClet chip.
+
+     With `-mcpu=v9', GCC generates code for the V9 variant of the SPARC
+     architecture.  This adds 64-bit integer and floating-point move
+     instructions, 3 additional floating-point condition code registers
+     and conditional move instructions.  With `-mcpu=ultrasparc', the
+     compiler additionally optimizes it for the Sun UltraSPARC I/II/IIi
+     chips.  With `-mcpu=ultrasparc3', the compiler additionally
+     optimizes it for the Sun UltraSPARC III/III+/IIIi/IIIi+/IV/IV+
+     chips.  With `-mcpu=niagara', the compiler additionally optimizes
+     it for Sun UltraSPARC T1 chips.  With `-mcpu=niagara2', the
+     compiler additionally optimizes it for Sun UltraSPARC T2 chips.
+
+`-mtune=CPU_TYPE'
+     Set the instruction scheduling parameters for machine type
+     CPU_TYPE, but do not set the instruction set or register set that
+     the option `-mcpu=CPU_TYPE' would.
+
+     The same values for `-mcpu=CPU_TYPE' can be used for
+     `-mtune=CPU_TYPE', but the only useful values are those that
+     select a particular cpu implementation.  Those are `cypress',
+     `supersparc', `hypersparc', `f930', `f934', `sparclite86x',
+     `tsc701', `ultrasparc', `ultrasparc3', `niagara', and `niagara2'.
+
+`-mv8plus'
+`-mno-v8plus'
+     With `-mv8plus', GCC generates code for the SPARC-V8+ ABI.  The
+     difference from the V8 ABI is that the global and out registers are
+     considered 64-bit wide.  This is enabled by default on Solaris in
+     32-bit mode for all SPARC-V9 processors.
+
+`-mvis'
+`-mno-vis'
+     With `-mvis', GCC generates code that takes advantage of the
+     UltraSPARC Visual Instruction Set extensions.  The default is
+     `-mno-vis'.
+
+ These `-m' options are supported in addition to the above on SPARC-V9
+processors in 64-bit environments:
+
+`-mlittle-endian'
+     Generate code for a processor running in little-endian mode.  It
+     is only available for a few configurations and most notably not on
+     Solaris and Linux.
+
+`-m32'
+`-m64'
+     Generate code for a 32-bit or 64-bit environment.  The 32-bit
+     environment sets int, long and pointer to 32 bits.  The 64-bit
+     environment sets int to 32 bits and long and pointer to 64 bits.
+
+`-mcmodel=medlow'
+     Generate code for the Medium/Low code model: 64-bit addresses,
+     programs must be linked in the low 32 bits of memory.  Programs
+     can be statically or dynamically linked.
+
+`-mcmodel=medmid'
+     Generate code for the Medium/Middle code model: 64-bit addresses,
+     programs must be linked in the low 44 bits of memory, the text and
+     data segments must be less than 2GB in size and the data segment
+     must be located within 2GB of the text segment.
+
+`-mcmodel=medany'
+     Generate code for the Medium/Anywhere code model: 64-bit
+     addresses, programs may be linked anywhere in memory, the text and
+     data segments must be less than 2GB in size and the data segment
+     must be located within 2GB of the text segment.
+
+`-mcmodel=embmedany'
+     Generate code for the Medium/Anywhere code model for embedded
+     systems: 64-bit addresses, the text and data segments must be less
+     than 2GB in size, both starting anywhere in memory (determined at
+     link time).  The global register %g4 points to the base of the
+     data segment.  Programs are statically linked and PIC is not
+     supported.
+
+`-mstack-bias'
+`-mno-stack-bias'
+     With `-mstack-bias', GCC assumes that the stack pointer, and frame
+     pointer if present, are offset by -2047 which must be added back
+     when making stack frame references.  This is the default in 64-bit
+     mode.  Otherwise, assume no such offset is present.
+
+ These switches are supported in addition to the above on Solaris:
+
+`-threads'
+     Add support for multithreading using the Solaris threads library.
+     This option sets flags for both the preprocessor and linker.  This
+     option does not affect the thread safety of object code produced
+     by the compiler or that of libraries supplied with it.
+
+`-pthreads'
+     Add support for multithreading using the POSIX threads library.
+     This option sets flags for both the preprocessor and linker.  This
+     option does not affect the thread safety of object code produced
+     by the compiler or that of libraries supplied with it.
+
+`-pthread'
+     This is a synonym for `-pthreads'.
+
+
+File: gcc.info,  Node: SPU Options,  Next: System V Options,  Prev: SPARC Options,  Up: Submodel Options
+
+3.17.38 SPU Options
+-------------------
+
+These `-m' options are supported on the SPU:
+
+`-mwarn-reloc'
+`-merror-reloc'
+     The loader for SPU does not handle dynamic relocations.  By
+     default, GCC will give an error when it generates code that
+     requires a dynamic relocation.  `-mno-error-reloc' disables the
+     error, `-mwarn-reloc' will generate a warning instead.
+
+`-msafe-dma'
+`-munsafe-dma'
+     Instructions which initiate or test completion of DMA must not be
+     reordered with respect to loads and stores of the memory which is
+     being accessed.  Users typically address this problem using the
+     volatile keyword, but that can lead to inefficient code in places
+     where the memory is known to not change.  Rather than mark the
+     memory as volatile we treat the DMA instructions as potentially
+     effecting all memory.  With `-munsafe-dma' users must use the
+     volatile keyword to protect memory accesses.
+
+`-mbranch-hints'
+     By default, GCC will generate a branch hint instruction to avoid
+     pipeline stalls for always taken or probably taken branches.  A
+     hint will not be generated closer than 8 instructions away from
+     its branch.  There is little reason to disable them, except for
+     debugging purposes, or to make an object a little bit smaller.
+
+`-msmall-mem'
+`-mlarge-mem'
+     By default, GCC generates code assuming that addresses are never
+     larger than 18 bits.  With `-mlarge-mem' code is generated that
+     assumes a full 32 bit address.
+
+`-mstdmain'
+     By default, GCC links against startup code that assumes the
+     SPU-style main function interface (which has an unconventional
+     parameter list).  With `-mstdmain', GCC will link your program
+     against startup code that assumes a C99-style interface to `main',
+     including a local copy of `argv' strings.
+
+`-mfixed-range=REGISTER-RANGE'
+     Generate code treating the given register range as fixed registers.
+     A fixed register is one that the register allocator can not use.
+     This is useful when compiling kernel code.  A register range is
+     specified as two registers separated by a dash.  Multiple register
+     ranges can be specified separated by a comma.
+
+`-mea32'
+`-mea64'
+     Compile code assuming that pointers to the PPU address space
+     accessed via the `__ea' named address space qualifier are either
+     32 or 64 bits wide.  The default is 32 bits.  As this is an ABI
+     changing option, all object code in an executable must be compiled
+     with the same setting.
+
+`-maddress-space-conversion'
+`-mno-address-space-conversion'
+     Allow/disallow treating the `__ea' address space as superset of
+     the generic address space.  This enables explicit type casts
+     between `__ea' and generic pointer as well as implicit conversions
+     of generic pointers to `__ea' pointers.  The default is to allow
+     address space pointer conversions.
+
+`-mcache-size=CACHE-SIZE'
+     This option controls the version of libgcc that the compiler links
+     to an executable and selects a software-managed cache for
+     accessing variables in the `__ea' address space with a particular
+     cache size.  Possible options for CACHE-SIZE are `8', `16', `32',
+     `64' and `128'.  The default cache size is 64KB.
+
+`-matomic-updates'
+`-mno-atomic-updates'
+     This option controls the version of libgcc that the compiler links
+     to an executable and selects whether atomic updates to the
+     software-managed cache of PPU-side variables are used.  If you use
+     atomic updates, changes to a PPU variable from SPU code using the
+     `__ea' named address space qualifier will not interfere with
+     changes to other PPU variables residing in the same cache line
+     from PPU code.  If you do not use atomic updates, such
+     interference may occur; however, writing back cache lines will be
+     more efficient.  The default behavior is to use atomic updates.
+
+`-mdual-nops'
+`-mdual-nops=N'
+     By default, GCC will insert nops to increase dual issue when it
+     expects it to increase performance.  N can be a value from 0 to
+     10.  A smaller N will insert fewer nops.  10 is the default, 0 is
+     the same as `-mno-dual-nops'.  Disabled with `-Os'.
+
+`-mhint-max-nops=N'
+     Maximum number of nops to insert for a branch hint.  A branch hint
+     must be at least 8 instructions away from the branch it is
+     effecting.  GCC will insert up to N nops to enforce this,
+     otherwise it will not generate the branch hint.
+
+`-mhint-max-distance=N'
+     The encoding of the branch hint instruction limits the hint to be
+     within 256 instructions of the branch it is effecting.  By
+     default, GCC makes sure it is within 125.
+
+`-msafe-hints'
+     Work around a hardware bug which causes the SPU to stall
+     indefinitely.  By default, GCC will insert the `hbrp' instruction
+     to make sure this stall won't happen.
+
+
+
+File: gcc.info,  Node: System V Options,  Next: V850 Options,  Prev: SPU Options,  Up: Submodel Options
+
+3.17.39 Options for System V
+----------------------------
+
+These additional options are available on System V Release 4 for
+compatibility with other compilers on those systems:
+
+`-G'
+     Create a shared object.  It is recommended that `-symbolic' or
+     `-shared' be used instead.
+
+`-Qy'
+     Identify the versions of each tool used by the compiler, in a
+     `.ident' assembler directive in the output.
+
+`-Qn'
+     Refrain from adding `.ident' directives to the output file (this is
+     the default).
+
+`-YP,DIRS'
+     Search the directories DIRS, and no others, for libraries
+     specified with `-l'.
+
+`-Ym,DIR'
+     Look in the directory DIR to find the M4 preprocessor.  The
+     assembler uses this option.
+
+
+File: gcc.info,  Node: V850 Options,  Next: VAX Options,  Prev: System V Options,  Up: Submodel Options
+
+3.17.40 V850 Options
+--------------------
+
+These `-m' options are defined for V850 implementations:
+
+`-mlong-calls'
+`-mno-long-calls'
+     Treat all calls as being far away (near).  If calls are assumed to
+     be far away, the compiler will always load the functions address
+     up into a register, and call indirect through the pointer.
+
+`-mno-ep'
+`-mep'
+     Do not optimize (do optimize) basic blocks that use the same index
+     pointer 4 or more times to copy pointer into the `ep' register, and
+     use the shorter `sld' and `sst' instructions.  The `-mep' option
+     is on by default if you optimize.
+
+`-mno-prolog-function'
+`-mprolog-function'
+     Do not use (do use) external functions to save and restore
+     registers at the prologue and epilogue of a function.  The
+     external functions are slower, but use less code space if more
+     than one function saves the same number of registers.  The
+     `-mprolog-function' option is on by default if you optimize.
+
+`-mspace'
+     Try to make the code as small as possible.  At present, this just
+     turns on the `-mep' and `-mprolog-function' options.
+
+`-mtda=N'
+     Put static or global variables whose size is N bytes or less into
+     the tiny data area that register `ep' points to.  The tiny data
+     area can hold up to 256 bytes in total (128 bytes for byte
+     references).
+
+`-msda=N'
+     Put static or global variables whose size is N bytes or less into
+     the small data area that register `gp' points to.  The small data
+     area can hold up to 64 kilobytes.
+
+`-mzda=N'
+     Put static or global variables whose size is N bytes or less into
+     the first 32 kilobytes of memory.
+
+`-mv850'
+     Specify that the target processor is the V850.
+
+`-mbig-switch'
+     Generate code suitable for big switch tables.  Use this option
+     only if the assembler/linker complain about out of range branches
+     within a switch table.
+
+`-mapp-regs'
+     This option will cause r2 and r5 to be used in the code generated
+     by the compiler.  This setting is the default.
+
+`-mno-app-regs'
+     This option will cause r2 and r5 to be treated as fixed registers.
+
+`-mv850e1'
+     Specify that the target processor is the V850E1.  The preprocessor
+     constants `__v850e1__' and `__v850e__' will be defined if this
+     option is used.
+
+`-mv850e'
+     Specify that the target processor is the V850E.  The preprocessor
+     constant `__v850e__' will be defined if this option is used.
+
+     If neither `-mv850' nor `-mv850e' nor `-mv850e1' are defined then
+     a default target processor will be chosen and the relevant
+     `__v850*__' preprocessor constant will be defined.
+
+     The preprocessor constants `__v850' and `__v851__' are always
+     defined, regardless of which processor variant is the target.
+
+`-mdisable-callt'
+     This option will suppress generation of the CALLT instruction for
+     the v850e and v850e1 flavors of the v850 architecture.  The
+     default is `-mno-disable-callt' which allows the CALLT instruction
+     to be used.
+
+
+
+File: gcc.info,  Node: VAX Options,  Next: VxWorks Options,  Prev: V850 Options,  Up: Submodel Options
+
+3.17.41 VAX Options
+-------------------
+
+These `-m' options are defined for the VAX:
+
+`-munix'
+     Do not output certain jump instructions (`aobleq' and so on) that
+     the Unix assembler for the VAX cannot handle across long ranges.
+
+`-mgnu'
+     Do output those jump instructions, on the assumption that you will
+     assemble with the GNU assembler.
+
+`-mg'
+     Output code for g-format floating point numbers instead of
+     d-format.
+
+
+File: gcc.info,  Node: VxWorks Options,  Next: x86-64 Options,  Prev: VAX Options,  Up: Submodel Options
+
+3.17.42 VxWorks Options
+-----------------------
+
+The options in this section are defined for all VxWorks targets.
+Options specific to the target hardware are listed with the other
+options for that target.
+
+`-mrtp'
+     GCC can generate code for both VxWorks kernels and real time
+     processes (RTPs).  This option switches from the former to the
+     latter.  It also defines the preprocessor macro `__RTP__'.
+
+`-non-static'
+     Link an RTP executable against shared libraries rather than static
+     libraries.  The options `-static' and `-shared' can also be used
+     for RTPs (*note Link Options::); `-static' is the default.
+
+`-Bstatic'
+`-Bdynamic'
+     These options are passed down to the linker.  They are defined for
+     compatibility with Diab.
+
+`-Xbind-lazy'
+     Enable lazy binding of function calls.  This option is equivalent
+     to `-Wl,-z,now' and is defined for compatibility with Diab.
+
+`-Xbind-now'
+     Disable lazy binding of function calls.  This option is the
+     default and is defined for compatibility with Diab.
+
+
+File: gcc.info,  Node: x86-64 Options,  Next: Xstormy16 Options,  Prev: VxWorks Options,  Up: Submodel Options
+
+3.17.43 x86-64 Options
+----------------------
+
+These are listed under *Note i386 and x86-64 Options::.
+
+
+File: gcc.info,  Node: i386 and x86-64 Windows Options,  Next: IA-64 Options,  Prev: i386 and x86-64 Options,  Up: Submodel Options
+
+3.17.44 i386 and x86-64 Windows Options
+---------------------------------------
+
+These additional options are available for Windows targets:
+
+`-mconsole'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a console application is to be generated, by
+     instructing the linker to set the PE header subsystem type
+     required for console applications.  This is the default behavior
+     for Cygwin and MinGW targets.
+
+`-mcygwin'
+     This option is available for Cygwin targets.  It specifies that
+     the Cygwin internal interface is to be used for predefined
+     preprocessor macros, C runtime libraries and related linker paths
+     and options.  For Cygwin targets this is the default behavior.
+     This option is deprecated and will be removed in a future release.
+
+`-mno-cygwin'
+     This option is available for Cygwin targets.  It specifies that
+     the MinGW internal interface is to be used instead of Cygwin's, by
+     setting MinGW-related predefined macros and linker paths and
+     default library options.  This option is deprecated and will be
+     removed in a future release.
+
+`-mdll'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a DLL - a dynamic link library - is to be
+     generated, enabling the selection of the required runtime startup
+     object and entry point.
+
+`-mnop-fun-dllimport'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the dllimport attribute should be ignored.
+
+`-mthread'
+     This option is available for MinGW targets. It specifies that
+     MinGW-specific thread support is to be used.
+
+`-municode'
+     This option is available for mingw-w64 targets.  It specifies that
+     the UNICODE macro is getting pre-defined and that the unicode
+     capable runtime startup code is chosen.
+
+`-mwin32'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the typical Windows pre-defined macros are to be
+     set in the pre-processor, but does not influence the choice of
+     runtime library/startup code.
+
+`-mwindows'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that a GUI application is to be generated by instructing
+     the linker to set the PE header subsystem type appropriately.
+
+`-fno-set-stack-executable'
+     This option is available for MinGW targets. It specifies that the
+     executable flag for stack used by nested functions isn't set. This
+     is necessary for binaries running in kernel mode of Windows, as
+     there the user32 API, which is used to set executable privileges,
+     isn't available.
+
+`-mpe-aligned-commons'
+     This option is available for Cygwin and MinGW targets.  It
+     specifies that the GNU extension to the PE file format that
+     permits the correct alignment of COMMON variables should be used
+     when generating code.  It will be enabled by default if GCC
+     detects that the target assembler found during configuration
+     supports the feature.
+
+ See also under *note i386 and x86-64 Options:: for standard options.
+
+
+File: gcc.info,  Node: Xstormy16 Options,  Next: Xtensa Options,  Prev: x86-64 Options,  Up: Submodel Options
+
+3.17.45 Xstormy16 Options
+-------------------------
+
+These options are defined for Xstormy16:
+
+`-msim'
+     Choose startup files and linker script suitable for the simulator.
+
+
+File: gcc.info,  Node: Xtensa Options,  Next: zSeries Options,  Prev: Xstormy16 Options,  Up: Submodel Options
+
+3.17.46 Xtensa Options
+----------------------
+
+These options are supported for Xtensa targets:
+
+`-mconst16'
+`-mno-const16'
+     Enable or disable use of `CONST16' instructions for loading
+     constant values.  The `CONST16' instruction is currently not a
+     standard option from Tensilica.  When enabled, `CONST16'
+     instructions are always used in place of the standard `L32R'
+     instructions.  The use of `CONST16' is enabled by default only if
+     the `L32R' instruction is not available.
+
+`-mfused-madd'
+`-mno-fused-madd'
+     Enable or disable use of fused multiply/add and multiply/subtract
+     instructions in the floating-point option.  This has no effect if
+     the floating-point option is not also enabled.  Disabling fused
+     multiply/add and multiply/subtract instructions forces the
+     compiler to use separate instructions for the multiply and
+     add/subtract operations.  This may be desirable in some cases
+     where strict IEEE 754-compliant results are required: the fused
+     multiply add/subtract instructions do not round the intermediate
+     result, thereby producing results with _more_ bits of precision
+     than specified by the IEEE standard.  Disabling fused multiply
+     add/subtract instructions also ensures that the program output is
+     not sensitive to the compiler's ability to combine multiply and
+     add/subtract operations.
+
+`-mserialize-volatile'
+`-mno-serialize-volatile'
+     When this option is enabled, GCC inserts `MEMW' instructions before
+     `volatile' memory references to guarantee sequential consistency.
+     The default is `-mserialize-volatile'.  Use
+     `-mno-serialize-volatile' to omit the `MEMW' instructions.
+
+`-mtext-section-literals'
+`-mno-text-section-literals'
+     Control the treatment of literal pools.  The default is
+     `-mno-text-section-literals', which places literals in a separate
+     section in the output file.  This allows the literal pool to be
+     placed in a data RAM/ROM, and it also allows the linker to combine
+     literal pools from separate object files to remove redundant
+     literals and improve code size.  With `-mtext-section-literals',
+     the literals are interspersed in the text section in order to keep
+     them as close as possible to their references.  This may be
+     necessary for large assembly files.
+
+`-mtarget-align'
+`-mno-target-align'
+     When this option is enabled, GCC instructs the assembler to
+     automatically align instructions to reduce branch penalties at the
+     expense of some code density.  The assembler attempts to widen
+     density instructions to align branch targets and the instructions
+     following call instructions.  If there are not enough preceding
+     safe density instructions to align a target, no widening will be
+     performed.  The default is `-mtarget-align'.  These options do not
+     affect the treatment of auto-aligned instructions like `LOOP',
+     which the assembler will always align, either by widening density
+     instructions or by inserting no-op instructions.
+
+`-mlongcalls'
+`-mno-longcalls'
+     When this option is enabled, GCC instructs the assembler to
+     translate direct calls to indirect calls unless it can determine
+     that the target of a direct call is in the range allowed by the
+     call instruction.  This translation typically occurs for calls to
+     functions in other source files.  Specifically, the assembler
+     translates a direct `CALL' instruction into an `L32R' followed by
+     a `CALLX' instruction.  The default is `-mno-longcalls'.  This
+     option should be used in programs where the call target can
+     potentially be out of range.  This option is implemented in the
+     assembler, not the compiler, so the assembly code generated by GCC
+     will still show direct call instructions--look at the disassembled
+     object code to see the actual instructions.  Note that the
+     assembler will use an indirect call for every cross-file call, not
+     just those that really will be out of range.
+
+
+File: gcc.info,  Node: zSeries Options,  Prev: Xtensa Options,  Up: Submodel Options
+
+3.17.47 zSeries Options
+-----------------------
+
+These are listed under *Note S/390 and zSeries Options::.
+
+
+File: gcc.info,  Node: Code Gen Options,  Next: Environment Variables,  Prev: Submodel Options,  Up: Invoking GCC
+
+3.18 Options for Code Generation Conventions
+============================================
+
+These machine-independent options control the interface conventions
+used in code generation.
+
+ Most of them have both positive and negative forms; the negative form
+of `-ffoo' would be `-fno-foo'.  In the table below, only one of the
+forms is listed--the one which is not the default.  You can figure out
+the other form by either removing `no-' or adding it.
+
+`-fbounds-check'
+     For front-ends that support it, generate additional code to check
+     that indices used to access arrays are within the declared range.
+     This is currently only supported by the Java and Fortran
+     front-ends, where this option defaults to true and false
+     respectively.
+
+`-ftrapv'
+     This option generates traps for signed overflow on addition,
+     subtraction, multiplication operations.
+
+`-fwrapv'
+     This option instructs the compiler to assume that signed arithmetic
+     overflow of addition, subtraction and multiplication wraps around
+     using twos-complement representation.  This flag enables some
+     optimizations and disables others.  This option is enabled by
+     default for the Java front-end, as required by the Java language
+     specification.
+
+`-fexceptions'
+     Enable exception handling.  Generates extra code needed to
+     propagate exceptions.  For some targets, this implies GCC will
+     generate frame unwind information for all functions, which can
+     produce significant data size overhead, although it does not
+     affect execution.  If you do not specify this option, GCC will
+     enable it by default for languages like C++ which normally require
+     exception handling, and disable it for languages like C that do
+     not normally require it.  However, you may need to enable this
+     option when compiling C code that needs to interoperate properly
+     with exception handlers written in C++.  You may also wish to
+     disable this option if you are compiling older C++ programs that
+     don't use exception handling.
+
+`-fnon-call-exceptions'
+     Generate code that allows trapping instructions to throw
+     exceptions.  Note that this requires platform-specific runtime
+     support that does not exist everywhere.  Moreover, it only allows
+     _trapping_ instructions to throw exceptions, i.e. memory
+     references or floating point instructions.  It does not allow
+     exceptions to be thrown from arbitrary signal handlers such as
+     `SIGALRM'.
+
+`-funwind-tables'
+     Similar to `-fexceptions', except that it will just generate any
+     needed static data, but will not affect the generated code in any
+     other way.  You will normally not enable this option; instead, a
+     language processor that needs this handling would enable it on
+     your behalf.
+
+`-fasynchronous-unwind-tables'
+     Generate unwind table in dwarf2 format, if supported by target
+     machine.  The table is exact at each instruction boundary, so it
+     can be used for stack unwinding from asynchronous events (such as
+     debugger or garbage collector).
+
+`-fpcc-struct-return'
+     Return "short" `struct' and `union' values in memory like longer
+     ones, rather than in registers.  This convention is less
+     efficient, but it has the advantage of allowing intercallability
+     between GCC-compiled files and files compiled with other
+     compilers, particularly the Portable C Compiler (pcc).
+
+     The precise convention for returning structures in memory depends
+     on the target configuration macros.
+
+     Short structures and unions are those whose size and alignment
+     match that of some integer type.
+
+     *Warning:* code compiled with the `-fpcc-struct-return' switch is
+     not binary compatible with code compiled with the
+     `-freg-struct-return' switch.  Use it to conform to a non-default
+     application binary interface.
+
+`-freg-struct-return'
+     Return `struct' and `union' values in registers when possible.
+     This is more efficient for small structures than
+     `-fpcc-struct-return'.
+
+     If you specify neither `-fpcc-struct-return' nor
+     `-freg-struct-return', GCC defaults to whichever convention is
+     standard for the target.  If there is no standard convention, GCC
+     defaults to `-fpcc-struct-return', except on targets where GCC is
+     the principal compiler.  In those cases, we can choose the
+     standard, and we chose the more efficient register return
+     alternative.
+
+     *Warning:* code compiled with the `-freg-struct-return' switch is
+     not binary compatible with code compiled with the
+     `-fpcc-struct-return' switch.  Use it to conform to a non-default
+     application binary interface.
+
+`-fshort-enums'
+     Allocate to an `enum' type only as many bytes as it needs for the
+     declared range of possible values.  Specifically, the `enum' type
+     will be equivalent to the smallest integer type which has enough
+     room.
+
+     *Warning:* the `-fshort-enums' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fshort-double'
+     Use the same size for `double' as for `float'.
+
+     *Warning:* the `-fshort-double' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fshort-wchar'
+     Override the underlying type for `wchar_t' to be `short unsigned
+     int' instead of the default for the target.  This option is useful
+     for building programs to run under WINE.
+
+     *Warning:* the `-fshort-wchar' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Use it to conform to a non-default application binary
+     interface.
+
+`-fno-common'
+     In C code, controls the placement of uninitialized global
+     variables.  Unix C compilers have traditionally permitted multiple
+     definitions of such variables in different compilation units by
+     placing the variables in a common block.  This is the behavior
+     specified by `-fcommon', and is the default for GCC on most
+     targets.  On the other hand, this behavior is not required by ISO
+     C, and on some targets may carry a speed or code size penalty on
+     variable references.  The `-fno-common' option specifies that the
+     compiler should place uninitialized global variables in the data
+     section of the object file, rather than generating them as common
+     blocks.  This has the effect that if the same variable is declared
+     (without `extern') in two different compilations, you will get a
+     multiple-definition error when you link them.  In this case, you
+     must compile with `-fcommon' instead.  Compiling with
+     `-fno-common' is useful on targets for which it provides better
+     performance, or if you wish to verify that the program will work
+     on other systems which always treat uninitialized variable
+     declarations this way.
+
+`-fno-ident'
+     Ignore the `#ident' directive.
+
+`-finhibit-size-directive'
+     Don't output a `.size' assembler directive, or anything else that
+     would cause trouble if the function is split in the middle, and the
+     two halves are placed at locations far apart in memory.  This
+     option is used when compiling `crtstuff.c'; you should not need to
+     use it for anything else.
+
+`-fverbose-asm'
+     Put extra commentary information in the generated assembly code to
+     make it more readable.  This option is generally only of use to
+     those who actually need to read the generated assembly code
+     (perhaps while debugging the compiler itself).
+
+     `-fno-verbose-asm', the default, causes the extra information to
+     be omitted and is useful when comparing two assembler files.
+
+`-frecord-gcc-switches'
+     This switch causes the command line that was used to invoke the
+     compiler to be recorded into the object file that is being created.
+     This switch is only implemented on some targets and the exact
+     format of the recording is target and binary file format
+     dependent, but it usually takes the form of a section containing
+     ASCII text.  This switch is related to the `-fverbose-asm' switch,
+     but that switch only records information in the assembler output
+     file as comments, so it never reaches the object file.
+
+`-fpic'
+     Generate position-independent code (PIC) suitable for use in a
+     shared library, if supported for the target machine.  Such code
+     accesses all constant addresses through a global offset table
+     (GOT).  The dynamic loader resolves the GOT entries when the
+     program starts (the dynamic loader is not part of GCC; it is part
+     of the operating system).  If the GOT size for the linked
+     executable exceeds a machine-specific maximum size, you get an
+     error message from the linker indicating that `-fpic' does not
+     work; in that case, recompile with `-fPIC' instead.  (These
+     maximums are 8k on the SPARC and 32k on the m68k and RS/6000.  The
+     386 has no such limit.)
+
+     Position-independent code requires special support, and therefore
+     works only on certain machines.  For the 386, GCC supports PIC for
+     System V but not for the Sun 386i.  Code generated for the IBM
+     RS/6000 is always position-independent.
+
+     When this flag is set, the macros `__pic__' and `__PIC__' are
+     defined to 1.
+
+`-fPIC'
+     If supported for the target machine, emit position-independent
+     code, suitable for dynamic linking and avoiding any limit on the
+     size of the global offset table.  This option makes a difference
+     on the m68k, PowerPC and SPARC.
+
+     Position-independent code requires special support, and therefore
+     works only on certain machines.
+
+     When this flag is set, the macros `__pic__' and `__PIC__' are
+     defined to 2.
+
+`-fpie'
+`-fPIE'
+     These options are similar to `-fpic' and `-fPIC', but generated
+     position independent code can be only linked into executables.
+     Usually these options are used when `-pie' GCC option will be used
+     during linking.
+
+     `-fpie' and `-fPIE' both define the macros `__pie__' and
+     `__PIE__'.  The macros have the value 1 for `-fpie' and 2 for
+     `-fPIE'.
+
+`-fno-jump-tables'
+     Do not use jump tables for switch statements even where it would be
+     more efficient than other code generation strategies.  This option
+     is of use in conjunction with `-fpic' or `-fPIC' for building code
+     which forms part of a dynamic linker and cannot reference the
+     address of a jump table.  On some targets, jump tables do not
+     require a GOT and this option is not needed.
+
+`-ffixed-REG'
+     Treat the register named REG as a fixed register; generated code
+     should never refer to it (except perhaps as a stack pointer, frame
+     pointer or in some other fixed role).
+
+     REG must be the name of a register.  The register names accepted
+     are machine-specific and are defined in the `REGISTER_NAMES' macro
+     in the machine description macro file.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fcall-used-REG'
+     Treat the register named REG as an allocable register that is
+     clobbered by function calls.  It may be allocated for temporaries
+     or variables that do not live across a call.  Functions compiled
+     this way will not save and restore the register REG.
+
+     It is an error to used this flag with the frame pointer or stack
+     pointer.  Use of this flag for other registers that have fixed
+     pervasive roles in the machine's execution model will produce
+     disastrous results.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fcall-saved-REG'
+     Treat the register named REG as an allocable register saved by
+     functions.  It may be allocated even for temporaries or variables
+     that live across a call.  Functions compiled this way will save
+     and restore the register REG if they use it.
+
+     It is an error to used this flag with the frame pointer or stack
+     pointer.  Use of this flag for other registers that have fixed
+     pervasive roles in the machine's execution model will produce
+     disastrous results.
+
+     A different sort of disaster will result from the use of this flag
+     for a register in which function values may be returned.
+
+     This flag does not have a negative form, because it specifies a
+     three-way choice.
+
+`-fpack-struct[=N]'
+     Without a value specified, pack all structure members together
+     without holes.  When a value is specified (which must be a small
+     power of two), pack structure members according to this value,
+     representing the maximum alignment (that is, objects with default
+     alignment requirements larger than this will be output potentially
+     unaligned at the next fitting location.
+
+     *Warning:* the `-fpack-struct' switch causes GCC to generate code
+     that is not binary compatible with code generated without that
+     switch.  Additionally, it makes the code suboptimal.  Use it to
+     conform to a non-default application binary interface.
+
+`-finstrument-functions'
+     Generate instrumentation calls for entry and exit to functions.
+     Just after function entry and just before function exit, the
+     following profiling functions will be called with the address of
+     the current function and its call site.  (On some platforms,
+     `__builtin_return_address' does not work beyond the current
+     function, so the call site information may not be available to the
+     profiling functions otherwise.)
+
+          void __cyg_profile_func_enter (void *this_fn,
+                                         void *call_site);
+          void __cyg_profile_func_exit  (void *this_fn,
+                                         void *call_site);
+
+     The first argument is the address of the start of the current
+     function, which may be looked up exactly in the symbol table.
+
+     This instrumentation is also done for functions expanded inline in
+     other functions.  The profiling calls will indicate where,
+     conceptually, the inline function is entered and exited.  This
+     means that addressable versions of such functions must be
+     available.  If all your uses of a function are expanded inline,
+     this may mean an additional expansion of code size.  If you use
+     `extern inline' in your C code, an addressable version of such
+     functions must be provided.  (This is normally the case anyways,
+     but if you get lucky and the optimizer always expands the
+     functions inline, you might have gotten away without providing
+     static copies.)
+
+     A function may be given the attribute `no_instrument_function', in
+     which case this instrumentation will not be done.  This can be
+     used, for example, for the profiling functions listed above,
+     high-priority interrupt routines, and any functions from which the
+     profiling functions cannot safely be called (perhaps signal
+     handlers, if the profiling routines generate output or allocate
+     memory).
+
+`-finstrument-functions-exclude-file-list=FILE,FILE,...'
+     Set the list of functions that are excluded from instrumentation
+     (see the description of `-finstrument-functions').  If the file
+     that contains a function definition matches with one of FILE, then
+     that function is not instrumented.  The match is done on
+     substrings: if the FILE parameter is a substring of the file name,
+     it is considered to be a match.
+
+     For example,
+     `-finstrument-functions-exclude-file-list=/bits/stl,include/sys'
+     will exclude any inline function defined in files whose pathnames
+     contain `/bits/stl' or `include/sys'.
+
+     If, for some reason, you want to include letter `','' in one of
+     SYM, write `'\,''. For example,
+     `-finstrument-functions-exclude-file-list='\,\,tmp'' (note the
+     single quote surrounding the option).
+
+`-finstrument-functions-exclude-function-list=SYM,SYM,...'
+     This is similar to `-finstrument-functions-exclude-file-list', but
+     this option sets the list of function names to be excluded from
+     instrumentation.  The function name to be matched is its
+     user-visible name, such as `vector<int> blah(const vector<int>
+     &)', not the internal mangled name (e.g.,
+     `_Z4blahRSt6vectorIiSaIiEE').  The match is done on substrings: if
+     the SYM parameter is a substring of the function name, it is
+     considered to be a match.  For C99 and C++ extended identifiers,
+     the function name must be given in UTF-8, not using universal
+     character names.
+
+`-fstack-check'
+     Generate code to verify that you do not go beyond the boundary of
+     the stack.  You should specify this flag if you are running in an
+     environment with multiple threads, but only rarely need to specify
+     it in a single-threaded environment since stack overflow is
+     automatically detected on nearly all systems if there is only one
+     stack.
+
+     Note that this switch does not actually cause checking to be done;
+     the operating system or the language runtime must do that.  The
+     switch causes generation of code to ensure that they see the stack
+     being extended.
+
+     You can additionally specify a string parameter: `no' means no
+     checking, `generic' means force the use of old-style checking,
+     `specific' means use the best checking method and is equivalent to
+     bare `-fstack-check'.
+
+     Old-style checking is a generic mechanism that requires no specific
+     target support in the compiler but comes with the following
+     drawbacks:
+
+       1. Modified allocation strategy for large objects: they will
+          always be allocated dynamically if their size exceeds a fixed
+          threshold.
+
+       2. Fixed limit on the size of the static frame of functions:
+          when it is topped by a particular function, stack checking is
+          not reliable and a warning is issued by the compiler.
+
+       3. Inefficiency: because of both the modified allocation
+          strategy and the generic implementation, the performances of
+          the code are hampered.
+
+     Note that old-style stack checking is also the fallback method for
+     `specific' if no target support has been added in the compiler.
+
+`-fstack-limit-register=REG'
+`-fstack-limit-symbol=SYM'
+`-fno-stack-limit'
+     Generate code to ensure that the stack does not grow beyond a
+     certain value, either the value of a register or the address of a
+     symbol.  If the stack would grow beyond the value, a signal is
+     raised.  For most targets, the signal is raised before the stack
+     overruns the boundary, so it is possible to catch the signal
+     without taking special precautions.
+
+     For instance, if the stack starts at absolute address `0x80000000'
+     and grows downwards, you can use the flags
+     `-fstack-limit-symbol=__stack_limit' and
+     `-Wl,--defsym,__stack_limit=0x7ffe0000' to enforce a stack limit
+     of 128KB.  Note that this may only work with the GNU linker.
+
+`-fargument-alias'
+`-fargument-noalias'
+`-fargument-noalias-global'
+`-fargument-noalias-anything'
+     Specify the possible relationships among parameters and between
+     parameters and global data.
+
+     `-fargument-alias' specifies that arguments (parameters) may alias
+     each other and may alias global storage.
+     `-fargument-noalias' specifies that arguments do not alias each
+     other, but may alias global storage.
+     `-fargument-noalias-global' specifies that arguments do not alias
+     each other and do not alias global storage.
+     `-fargument-noalias-anything' specifies that arguments do not
+     alias any other storage.
+
+     Each language will automatically use whatever option is required by
+     the language standard.  You should not need to use these options
+     yourself.
+
+`-fleading-underscore'
+     This option and its counterpart, `-fno-leading-underscore',
+     forcibly change the way C symbols are represented in the object
+     file.  One use is to help link with legacy assembly code.
+
+     *Warning:* the `-fleading-underscore' switch causes GCC to
+     generate code that is not binary compatible with code generated
+     without that switch.  Use it to conform to a non-default
+     application binary interface.  Not all targets provide complete
+     support for this switch.
+
+`-ftls-model=MODEL'
+     Alter the thread-local storage model to be used (*note
+     Thread-Local::).  The MODEL argument should be one of
+     `global-dynamic', `local-dynamic', `initial-exec' or `local-exec'.
+
+     The default without `-fpic' is `initial-exec'; with `-fpic' the
+     default is `global-dynamic'.
+
+`-fvisibility=DEFAULT|INTERNAL|HIDDEN|PROTECTED'
+     Set the default ELF image symbol visibility to the specified
+     option--all symbols will be marked with this unless overridden
+     within the code.  Using this feature can very substantially
+     improve linking and load times of shared object libraries, produce
+     more optimized code, provide near-perfect API export and prevent
+     symbol clashes.  It is *strongly* recommended that you use this in
+     any shared objects you distribute.
+
+     Despite the nomenclature, `default' always means public ie;
+     available to be linked against from outside the shared object.
+     `protected' and `internal' are pretty useless in real-world usage
+     so the only other commonly used option will be `hidden'.  The
+     default if `-fvisibility' isn't specified is `default', i.e., make
+     every symbol public--this causes the same behavior as previous
+     versions of GCC.
+
+     A good explanation of the benefits offered by ensuring ELF symbols
+     have the correct visibility is given by "How To Write Shared
+     Libraries" by Ulrich Drepper (which can be found at
+     `http://people.redhat.com/~drepper/')--however a superior solution
+     made possible by this option to marking things hidden when the
+     default is public is to make the default hidden and mark things
+     public.  This is the norm with DLL's on Windows and with
+     `-fvisibility=hidden' and `__attribute__
+     ((visibility("default")))' instead of `__declspec(dllexport)' you
+     get almost identical semantics with identical syntax.  This is a
+     great boon to those working with cross-platform projects.
+
+     For those adding visibility support to existing code, you may find
+     `#pragma GCC visibility' of use.  This works by you enclosing the
+     declarations you wish to set visibility for with (for example)
+     `#pragma GCC visibility push(hidden)' and `#pragma GCC visibility
+     pop'.  Bear in mind that symbol visibility should be viewed *as
+     part of the API interface contract* and thus all new code should
+     always specify visibility when it is not the default ie;
+     declarations only for use within the local DSO should *always* be
+     marked explicitly as hidden as so to avoid PLT indirection
+     overheads--making this abundantly clear also aids readability and
+     self-documentation of the code.  Note that due to ISO C++
+     specification requirements, operator new and operator delete must
+     always be of default visibility.
+
+     Be aware that headers from outside your project, in particular
+     system headers and headers from any other library you use, may not
+     be expecting to be compiled with visibility other than the
+     default.  You may need to explicitly say `#pragma GCC visibility
+     push(default)' before including any such headers.
+
+     `extern' declarations are not affected by `-fvisibility', so a lot
+     of code can be recompiled with `-fvisibility=hidden' with no
+     modifications.  However, this means that calls to `extern'
+     functions with no explicit visibility will use the PLT, so it is
+     more effective to use `__attribute ((visibility))' and/or `#pragma
+     GCC visibility' to tell the compiler which `extern' declarations
+     should be treated as hidden.
+
+     Note that `-fvisibility' does affect C++ vague linkage entities.
+     This means that, for instance, an exception class that will be
+     thrown between DSOs must be explicitly marked with default
+     visibility so that the `type_info' nodes will be unified between
+     the DSOs.
+
+     An overview of these techniques, their benefits and how to use them
+     is at `http://gcc.gnu.org/wiki/Visibility'.
+
+
+
+File: gcc.info,  Node: Environment Variables,  Next: Precompiled Headers,  Prev: Code Gen Options,  Up: Invoking GCC
+
+3.19 Environment Variables Affecting GCC
+========================================
+
+This section describes several environment variables that affect how GCC
+operates.  Some of them work by specifying directories or prefixes to
+use when searching for various kinds of files.  Some are used to
+specify other aspects of the compilation environment.
+
+ Note that you can also specify places to search using options such as
+`-B', `-I' and `-L' (*note Directory Options::).  These take precedence
+over places specified using environment variables, which in turn take
+precedence over those specified by the configuration of GCC.  *Note
+Controlling the Compilation Driver `gcc': (gccint)Driver.
+
+`LANG'
+`LC_CTYPE'
+`LC_MESSAGES'
+`LC_ALL'
+     These environment variables control the way that GCC uses
+     localization information that allow GCC to work with different
+     national conventions.  GCC inspects the locale categories
+     `LC_CTYPE' and `LC_MESSAGES' if it has been configured to do so.
+     These locale categories can be set to any value supported by your
+     installation.  A typical value is `en_GB.UTF-8' for English in the
+     United Kingdom encoded in UTF-8.
+
+     The `LC_CTYPE' environment variable specifies character
+     classification.  GCC uses it to determine the character boundaries
+     in a string; this is needed for some multibyte encodings that
+     contain quote and escape characters that would otherwise be
+     interpreted as a string end or escape.
+
+     The `LC_MESSAGES' environment variable specifies the language to
+     use in diagnostic messages.
+
+     If the `LC_ALL' environment variable is set, it overrides the value
+     of `LC_CTYPE' and `LC_MESSAGES'; otherwise, `LC_CTYPE' and
+     `LC_MESSAGES' default to the value of the `LANG' environment
+     variable.  If none of these variables are set, GCC defaults to
+     traditional C English behavior.
+
+`TMPDIR'
+     If `TMPDIR' is set, it specifies the directory to use for temporary
+     files.  GCC uses temporary files to hold the output of one stage of
+     compilation which is to be used as input to the next stage: for
+     example, the output of the preprocessor, which is the input to the
+     compiler proper.
+
+`GCC_EXEC_PREFIX'
+     If `GCC_EXEC_PREFIX' is set, it specifies a prefix to use in the
+     names of the subprograms executed by the compiler.  No slash is
+     added when this prefix is combined with the name of a subprogram,
+     but you can specify a prefix that ends with a slash if you wish.
+
+     If `GCC_EXEC_PREFIX' is not set, GCC will attempt to figure out an
+     appropriate prefix to use based on the pathname it was invoked
+     with.
+
+     If GCC cannot find the subprogram using the specified prefix, it
+     tries looking in the usual places for the subprogram.
+
+     The default value of `GCC_EXEC_PREFIX' is `PREFIX/lib/gcc/' where
+     PREFIX is the prefix to the installed compiler. In many cases
+     PREFIX is the value of `prefix' when you ran the `configure'
+     script.
+
+     Other prefixes specified with `-B' take precedence over this
+     prefix.
+
+     This prefix is also used for finding files such as `crt0.o' that
+     are used for linking.
+
+     In addition, the prefix is used in an unusual way in finding the
+     directories to search for header files.  For each of the standard
+     directories whose name normally begins with `/usr/local/lib/gcc'
+     (more precisely, with the value of `GCC_INCLUDE_DIR'), GCC tries
+     replacing that beginning with the specified prefix to produce an
+     alternate directory name.  Thus, with `-Bfoo/', GCC will search
+     `foo/bar' where it would normally search `/usr/local/lib/bar'.
+     These alternate directories are searched first; the standard
+     directories come next. If a standard directory begins with the
+     configured PREFIX then the value of PREFIX is replaced by
+     `GCC_EXEC_PREFIX' when looking for header files.
+
+`COMPILER_PATH'
+     The value of `COMPILER_PATH' is a colon-separated list of
+     directories, much like `PATH'.  GCC tries the directories thus
+     specified when searching for subprograms, if it can't find the
+     subprograms using `GCC_EXEC_PREFIX'.
+
+`LIBRARY_PATH'
+     The value of `LIBRARY_PATH' is a colon-separated list of
+     directories, much like `PATH'.  When configured as a native
+     compiler, GCC tries the directories thus specified when searching
+     for special linker files, if it can't find them using
+     `GCC_EXEC_PREFIX'.  Linking using GCC also uses these directories
+     when searching for ordinary libraries for the `-l' option (but
+     directories specified with `-L' come first).
+
+`LANG'
+     This variable is used to pass locale information to the compiler.
+     One way in which this information is used is to determine the
+     character set to be used when character literals, string literals
+     and comments are parsed in C and C++.  When the compiler is
+     configured to allow multibyte characters, the following values for
+     `LANG' are recognized:
+
+    `C-JIS'
+          Recognize JIS characters.
+
+    `C-SJIS'
+          Recognize SJIS characters.
+
+    `C-EUCJP'
+          Recognize EUCJP characters.
+
+     If `LANG' is not defined, or if it has some other value, then the
+     compiler will use mblen and mbtowc as defined by the default
+     locale to recognize and translate multibyte characters.
+
+Some additional environments variables affect the behavior of the
+preprocessor.
+
+`CPATH'
+`C_INCLUDE_PATH'
+`CPLUS_INCLUDE_PATH'
+`OBJC_INCLUDE_PATH'
+     Each variable's value is a list of directories separated by a
+     special character, much like `PATH', in which to look for header
+     files.  The special character, `PATH_SEPARATOR', is
+     target-dependent and determined at GCC build time.  For Microsoft
+     Windows-based targets it is a semicolon, and for almost all other
+     targets it is a colon.
+
+     `CPATH' specifies a list of directories to be searched as if
+     specified with `-I', but after any paths given with `-I' options
+     on the command line.  This environment variable is used regardless
+     of which language is being preprocessed.
+
+     The remaining environment variables apply only when preprocessing
+     the particular language indicated.  Each specifies a list of
+     directories to be searched as if specified with `-isystem', but
+     after any paths given with `-isystem' options on the command line.
+
+     In all these variables, an empty element instructs the compiler to
+     search its current working directory.  Empty elements can appear
+     at the beginning or end of a path.  For instance, if the value of
+     `CPATH' is `:/special/include', that has the same effect as
+     `-I. -I/special/include'.
+
+`DEPENDENCIES_OUTPUT'
+     If this variable is set, its value specifies how to output
+     dependencies for Make based on the non-system header files
+     processed by the compiler.  System header files are ignored in the
+     dependency output.
+
+     The value of `DEPENDENCIES_OUTPUT' can be just a file name, in
+     which case the Make rules are written to that file, guessing the
+     target name from the source file name.  Or the value can have the
+     form `FILE TARGET', in which case the rules are written to file
+     FILE using TARGET as the target name.
+
+     In other words, this environment variable is equivalent to
+     combining the options `-MM' and `-MF' (*note Preprocessor
+     Options::), with an optional `-MT' switch too.
+
+`SUNPRO_DEPENDENCIES'
+     This variable is the same as `DEPENDENCIES_OUTPUT' (see above),
+     except that system header files are not ignored, so it implies
+     `-M' rather than `-MM'.  However, the dependence on the main input
+     file is omitted.  *Note Preprocessor Options::.
+
+
+File: gcc.info,  Node: Precompiled Headers,  Prev: Environment Variables,  Up: Invoking GCC
+
+3.20 Using Precompiled Headers
+==============================
+
+Often large projects have many header files that are included in every
+source file.  The time the compiler takes to process these header files
+over and over again can account for nearly all of the time required to
+build the project.  To make builds faster, GCC allows users to
+`precompile' a header file; then, if builds can use the precompiled
+header file they will be much faster.
+
+ To create a precompiled header file, simply compile it as you would any
+other file, if necessary using the `-x' option to make the driver treat
+it as a C or C++ header file.  You will probably want to use a tool
+like `make' to keep the precompiled header up-to-date when the headers
+it contains change.
+
+ A precompiled header file will be searched for when `#include' is seen
+in the compilation.  As it searches for the included file (*note Search
+Path: (cpp)Search Path.) the compiler looks for a precompiled header in
+each directory just before it looks for the include file in that
+directory.  The name searched for is the name specified in the
+`#include' with `.gch' appended.  If the precompiled header file can't
+be used, it is ignored.
+
+ For instance, if you have `#include "all.h"', and you have `all.h.gch'
+in the same directory as `all.h', then the precompiled header file will
+be used if possible, and the original header will be used otherwise.
+
+ Alternatively, you might decide to put the precompiled header file in a
+directory and use `-I' to ensure that directory is searched before (or
+instead of) the directory containing the original header.  Then, if you
+want to check that the precompiled header file is always used, you can
+put a file of the same name as the original header in this directory
+containing an `#error' command.
+
+ This also works with `-include'.  So yet another way to use
+precompiled headers, good for projects not designed with precompiled
+header files in mind, is to simply take most of the header files used by
+a project, include them from another header file, precompile that header
+file, and `-include' the precompiled header.  If the header files have
+guards against multiple inclusion, they will be skipped because they've
+already been included (in the precompiled header).
+
+ If you need to precompile the same header file for different
+languages, targets, or compiler options, you can instead make a
+_directory_ named like `all.h.gch', and put each precompiled header in
+the directory, perhaps using `-o'.  It doesn't matter what you call the
+files in the directory, every precompiled header in the directory will
+be considered.  The first precompiled header encountered in the
+directory that is valid for this compilation will be used; they're
+searched in no particular order.
+
+ There are many other possibilities, limited only by your imagination,
+good sense, and the constraints of your build system.
+
+ A precompiled header file can be used only when these conditions apply:
+
+   * Only one precompiled header can be used in a particular
+     compilation.
+
+   * A precompiled header can't be used once the first C token is seen.
+     You can have preprocessor directives before a precompiled header;
+     you can even include a precompiled header from inside another
+     header, so long as there are no C tokens before the `#include'.
+
+   * The precompiled header file must be produced for the same language
+     as the current compilation.  You can't use a C precompiled header
+     for a C++ compilation.
+
+   * The precompiled header file must have been produced by the same
+     compiler binary as the current compilation is using.
+
+   * Any macros defined before the precompiled header is included must
+     either be defined in the same way as when the precompiled header
+     was generated, or must not affect the precompiled header, which
+     usually means that they don't appear in the precompiled header at
+     all.
+
+     The `-D' option is one way to define a macro before a precompiled
+     header is included; using a `#define' can also do it.  There are
+     also some options that define macros implicitly, like `-O' and
+     `-Wdeprecated'; the same rule applies to macros defined this way.
+
+   * If debugging information is output when using the precompiled
+     header, using `-g' or similar, the same kind of debugging
+     information must have been output when building the precompiled
+     header.  However, a precompiled header built using `-g' can be
+     used in a compilation when no debugging information is being
+     output.
+
+   * The same `-m' options must generally be used when building and
+     using the precompiled header.  *Note Submodel Options::, for any
+     cases where this rule is relaxed.
+
+   * Each of the following options must be the same when building and
+     using the precompiled header:
+
+          -fexceptions
+
+   * Some other command-line options starting with `-f', `-p', or `-O'
+     must be defined in the same way as when the precompiled header was
+     generated.  At present, it's not clear which options are safe to
+     change and which are not; the safest choice is to use exactly the
+     same options when generating and using the precompiled header.
+     The following are known to be safe:
+
+          -fmessage-length=  -fpreprocessed  -fsched-interblock
+          -fsched-spec  -fsched-spec-load  -fsched-spec-load-dangerous
+          -fsched-verbose=<number>  -fschedule-insns  -fvisibility=
+          -pedantic-errors
+
+
+ For all of these except the last, the compiler will automatically
+ignore the precompiled header if the conditions aren't met.  If you
+find an option combination that doesn't work and doesn't cause the
+precompiled header to be ignored, please consider filing a bug report,
+see *note Bugs::.
+
+ If you do use differing options when generating and using the
+precompiled header, the actual behavior will be a mixture of the
+behavior for the options.  For instance, if you use `-g' to generate
+the precompiled header but not when using it, you may or may not get
+debugging information for routines in the precompiled header.
+
+
+File: gcc.info,  Node: C Implementation,  Next: C Extensions,  Prev: Invoking GCC,  Up: Top
+
+4 C Implementation-defined behavior
+***********************************
+
+A conforming implementation of ISO C is required to document its choice
+of behavior in each of the areas that are designated "implementation
+defined".  The following lists all such areas, along with the section
+numbers from the ISO/IEC 9899:1990 and ISO/IEC 9899:1999 standards.
+Some areas are only implementation-defined in one version of the
+standard.
+
+ Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as "determined by ABI" below.  *Note Binary Compatibility:
+Compatibility, and `http://gcc.gnu.org/readings.html'.  Some choices
+are documented in the preprocessor manual.  *Note
+Implementation-defined behavior: (cpp)Implementation-defined behavior.
+Some choices are made by the library and operating system (or other
+environment when compiling for a freestanding environment); refer to
+their documentation for details.
+
+* Menu:
+
+* Translation implementation::
+* Environment implementation::
+* Identifiers implementation::
+* Characters implementation::
+* Integers implementation::
+* Floating point implementation::
+* Arrays and pointers implementation::
+* Hints implementation::
+* Structures unions enumerations and bit-fields implementation::
+* Qualifiers implementation::
+* Declarators implementation::
+* Statements implementation::
+* Preprocessing directives implementation::
+* Library functions implementation::
+* Architecture implementation::
+* Locale-specific behavior implementation::
+
+
+File: gcc.info,  Node: Translation implementation,  Next: Environment implementation,  Up: C Implementation
+
+4.1 Translation
+===============
+
+   * `How a diagnostic is identified (C90 3.7, C99 3.10, C90 and C99
+     5.1.1.3).'
+
+     Diagnostics consist of all the output sent to stderr by GCC.
+
+   * `Whether each nonempty sequence of white-space characters other
+     than new-line is retained or replaced by one space character in
+     translation phase 3 (C90 and C99 5.1.1.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+
+File: gcc.info,  Node: Environment implementation,  Next: Identifiers implementation,  Prev: Translation implementation,  Up: C Implementation
+
+4.2 Environment
+===============
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+   * `The mapping between physical source file multibyte characters and
+     the source character set in translation phase 1 (C90 and C99
+     5.1.1.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+
+File: gcc.info,  Node: Identifiers implementation,  Next: Characters implementation,  Prev: Environment implementation,  Up: C Implementation
+
+4.3 Identifiers
+===============
+
+   * `Which additional multibyte characters may appear in identifiers
+     and their correspondence to universal character names (C99 6.4.2).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The number of significant initial characters in an identifier
+     (C90 6.1.2, C90 and C99 5.2.4.1, C99 6.4.2).'
+
+     For internal names, all characters are significant.  For external
+     names, the number of significant characters are defined by the
+     linker; for almost all targets, all characters are significant.
+
+   * `Whether case distinctions are significant in an identifier with
+     external linkage (C90 6.1.2).'
+
+     This is a property of the linker.  C99 requires that case
+     distinctions are always significant in identifiers with external
+     linkage and systems without this property are not supported by GCC.
+
+
+
+File: gcc.info,  Node: Characters implementation,  Next: Integers implementation,  Prev: Identifiers implementation,  Up: C Implementation
+
+4.4 Characters
+==============
+
+   * `The number of bits in a byte (C90 3.4, C99 3.6).'
+
+     Determined by ABI.
+
+   * `The values of the members of the execution character set (C90 and
+     C99 5.2.1).'
+
+     Determined by ABI.
+
+   * `The unique value of the member of the execution character set
+     produced for each of the standard alphabetic escape sequences (C90
+     and C99 5.2.2).'
+
+     Determined by ABI.
+
+   * `The value of a `char' object into which has been stored any
+     character other than a member of the basic execution character set
+     (C90 6.1.2.5, C99 6.2.5).'
+
+     Determined by ABI.
+
+   * `Which of `signed char' or `unsigned char' has the same range,
+     representation, and behavior as "plain" `char' (C90 6.1.2.5, C90
+     6.2.1.1, C99 6.2.5, C99 6.3.1.1).'
+
+     Determined by ABI.  The options `-funsigned-char' and
+     `-fsigned-char' change the default.  *Note Options Controlling C
+     Dialect: C Dialect Options.
+
+   * `The mapping of members of the source character set (in character
+     constants and string literals) to members of the execution
+     character set (C90 6.1.3.4, C99 6.4.4.4, C90 and C99 5.1.1.2).'
+
+     Determined by ABI.
+
+   * `The value of an integer character constant containing more than
+     one character or containing a character or escape sequence that
+     does not map to a single-byte execution character (C90 6.1.3.4,
+     C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The value of a wide character constant containing more than one
+     multibyte character, or containing a multibyte character or escape
+     sequence not represented in the extended execution character set
+     (C90 6.1.3.4, C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The current locale used to convert a wide character constant
+     consisting of a single multibyte character that maps to a member
+     of the extended execution character set into a corresponding wide
+     character code (C90 6.1.3.4, C99 6.4.4.4).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The current locale used to convert a wide string literal into
+     corresponding wide character codes (C90 6.1.4, C99 6.4.5).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+   * `The value of a string literal containing a multibyte character or
+     escape sequence not represented in the execution character set
+     (C90 6.1.4, C99 6.4.5).'
+
+     *Note Implementation-defined behavior: (cpp)Implementation-defined
+     behavior.
+
+
+File: gcc.info,  Node: Integers implementation,  Next: Floating point implementation,  Prev: Characters implementation,  Up: C Implementation
+
+4.5 Integers
+============
+
+   * `Any extended integer types that exist in the implementation (C99
+     6.2.5).'
+
+     GCC does not support any extended integer types.
+
+   * `Whether signed integer types are represented using sign and
+     magnitude, two's complement, or one's complement, and whether the
+     extraordinary value is a trap representation or an ordinary value
+     (C99 6.2.6.2).'
+
+     GCC supports only two's complement integer types, and all bit
+     patterns are ordinary values.
+
+   * `The rank of any extended integer type relative to another extended
+     integer type with the same precision (C99 6.3.1.1).'
+
+     GCC does not support any extended integer types.
+
+   * `The result of, or the signal raised by, converting an integer to a
+     signed integer type when the value cannot be represented in an
+     object of that type (C90 6.2.1.2, C99 6.3.1.3).'
+
+     For conversion to a type of width N, the value is reduced modulo
+     2^N to be within range of the type; no signal is raised.
+
+   * `The results of some bitwise operations on signed integers (C90
+     6.3, C99 6.5).'
+
+     Bitwise operators act on the representation of the value including
+     both the sign and value bits, where the sign bit is considered
+     immediately above the highest-value value bit.  Signed `>>' acts
+     on negative numbers by sign extension.
+
+     GCC does not use the latitude given in C99 only to treat certain
+     aspects of signed `<<' as undefined, but this is subject to change.
+
+   * `The sign of the remainder on integer division (C90 6.3.5).'
+
+     GCC always follows the C99 requirement that the result of division
+     is truncated towards zero.
+
+
+
+File: gcc.info,  Node: Floating point implementation,  Next: Arrays and pointers implementation,  Prev: Integers implementation,  Up: C Implementation
+
+4.6 Floating point
+==================
+
+   * `The accuracy of the floating-point operations and of the library
+     functions in `<math.h>' and `<complex.h>' that return
+     floating-point results (C90 and C99 5.2.4.2.2).'
+
+     The accuracy is unknown.
+
+   * `The rounding behaviors characterized by non-standard values of
+     `FLT_ROUNDS'  (C90 and C99 5.2.4.2.2).'
+
+     GCC does not use such values.
+
+   * `The evaluation methods characterized by non-standard negative
+     values of `FLT_EVAL_METHOD' (C99 5.2.4.2.2).'
+
+     GCC does not use such values.
+
+   * `The direction of rounding when an integer is converted to a
+     floating-point number that cannot exactly represent the original
+     value (C90 6.2.1.3, C99 6.3.1.4).'
+
+     C99 Annex F is followed.
+
+   * `The direction of rounding when a floating-point number is
+     converted to a narrower floating-point number (C90 6.2.1.4, C99
+     6.3.1.5).'
+
+     C99 Annex F is followed.
+
+   * `How the nearest representable value or the larger or smaller
+     representable value immediately adjacent to the nearest
+     representable value is chosen for certain floating constants (C90
+     6.1.3.1, C99 6.4.4.2).'
+
+     C99 Annex F is followed.
+
+   * `Whether and how floating expressions are contracted when not
+     disallowed by the `FP_CONTRACT' pragma (C99 6.5).'
+
+     Expressions are currently only contracted if
+     `-funsafe-math-optimizations' or `-ffast-math' are used.  This is
+     subject to change.
+
+   * `The default state for the `FENV_ACCESS' pragma (C99 7.6.1).'
+
+     This pragma is not implemented, but the default is to "off" unless
+     `-frounding-math' is used in which case it is "on".
+
+   * `Additional floating-point exceptions, rounding modes,
+     environments, and classifications, and their macro names (C99 7.6,
+     C99 7.12).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+   * `The default state for the `FP_CONTRACT' pragma (C99 7.12.2).'
+
+     This pragma is not implemented.  Expressions are currently only
+     contracted if `-funsafe-math-optimizations' or `-ffast-math' are
+     used.  This is subject to change.
+
+   * `Whether the "inexact" floating-point exception can be raised when
+     the rounded result actually does equal the mathematical result in
+     an IEC 60559 conformant implementation (C99 F.9).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+   * `Whether the "underflow" (and "inexact") floating-point exception
+     can be raised when a result is tiny but not inexact in an IEC
+     60559 conformant implementation (C99 F.9).'
+
+     This is dependent on the implementation of the C library, and is
+     not defined by GCC itself.
+
+
+
+File: gcc.info,  Node: Arrays and pointers implementation,  Next: Hints implementation,  Prev: Floating point implementation,  Up: C Implementation
+
+4.7 Arrays and pointers
+=======================
+
+   * `The result of converting a pointer to an integer or vice versa
+     (C90 6.3.4, C99 6.3.2.3).'
+
+     A cast from pointer to integer discards most-significant bits if
+     the pointer representation is larger than the integer type,
+     sign-extends(1) if the pointer representation is smaller than the
+     integer type, otherwise the bits are unchanged.
+
+     A cast from integer to pointer discards most-significant bits if
+     the pointer representation is smaller than the integer type,
+     extends according to the signedness of the integer type if the
+     pointer representation is larger than the integer type, otherwise
+     the bits are unchanged.
+
+     When casting from pointer to integer and back again, the resulting
+     pointer must reference the same object as the original pointer,
+     otherwise the behavior is undefined.  That is, one may not use
+     integer arithmetic to avoid the undefined behavior of pointer
+     arithmetic as proscribed in C99 6.5.6/8.
+
+   * `The size of the result of subtracting two pointers to elements of
+     the same array (C90 6.3.6, C99 6.5.6).'
+
+     The value is as specified in the standard and the type is
+     determined by the ABI.
+
+
+ ---------- Footnotes ----------
+
+ (1) Future versions of GCC may zero-extend, or use a target-defined
+`ptr_extend' pattern.  Do not rely on sign extension.
+
+
+File: gcc.info,  Node: Hints implementation,  Next: Structures unions enumerations and bit-fields implementation,  Prev: Arrays and pointers implementation,  Up: C Implementation
+
+4.8 Hints
+=========
+
+   * `The extent to which suggestions made by using the `register'
+     storage-class specifier are effective (C90 6.5.1, C99 6.7.1).'
+
+     The `register' specifier affects code generation only in these
+     ways:
+
+        * When used as part of the register variable extension, see
+          *note Explicit Reg Vars::.
+
+        * When `-O0' is in use, the compiler allocates distinct stack
+          memory for all variables that do not have the `register'
+          storage-class specifier; if `register' is specified, the
+          variable may have a shorter lifespan than the code would
+          indicate and may never be placed in memory.
+
+        * On some rare x86 targets, `setjmp' doesn't save the registers
+          in all circumstances.  In those cases, GCC doesn't allocate
+          any variables in registers unless they are marked `register'.
+
+
+   * `The extent to which suggestions made by using the inline function
+     specifier are effective (C99 6.7.4).'
+
+     GCC will not inline any functions if the `-fno-inline' option is
+     used or if `-O0' is used.  Otherwise, GCC may still be unable to
+     inline a function for many reasons; the `-Winline' option may be
+     used to determine if a function has not been inlined and why not.
+
+
+
+File: gcc.info,  Node: Structures unions enumerations and bit-fields implementation,  Next: Qualifiers implementation,  Prev: Hints implementation,  Up: C Implementation
+
+4.9 Structures, unions, enumerations, and bit-fields
+====================================================
+
+   * `A member of a union object is accessed using a member of a
+     different type (C90 6.3.2.3).'
+
+     The relevant bytes of the representation of the object are treated
+     as an object of the type used for the access.  *Note
+     Type-punning::.  This may be a trap representation.
+
+   * `Whether a "plain" `int' bit-field is treated as a `signed int'
+     bit-field or as an `unsigned int' bit-field (C90 6.5.2, C90
+     6.5.2.1, C99 6.7.2, C99 6.7.2.1).'
+
+     By default it is treated as `signed int' but this may be changed
+     by the `-funsigned-bitfields' option.
+
+   * `Allowable bit-field types other than `_Bool', `signed int', and
+     `unsigned int' (C99 6.7.2.1).'
+
+     No other types are permitted in strictly conforming mode.
+
+   * `Whether a bit-field can straddle a storage-unit boundary (C90
+     6.5.2.1, C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The order of allocation of bit-fields within a unit (C90 6.5.2.1,
+     C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The alignment of non-bit-field members of structures (C90
+     6.5.2.1, C99 6.7.2.1).'
+
+     Determined by ABI.
+
+   * `The integer type compatible with each enumerated type (C90
+     6.5.2.2, C99 6.7.2.2).'
+
+     Normally, the type is `unsigned int' if there are no negative
+     values in the enumeration, otherwise `int'.  If `-fshort-enums' is
+     specified, then if there are negative values it is the first of
+     `signed char', `short' and `int' that can represent all the
+     values, otherwise it is the first of `unsigned char', `unsigned
+     short' and `unsigned int' that can represent all the values.
+
+     On some targets, `-fshort-enums' is the default; this is
+     determined by the ABI.
+
+
+
+File: gcc.info,  Node: Qualifiers implementation,  Next: Declarators implementation,  Prev: Structures unions enumerations and bit-fields implementation,  Up: C Implementation
+
+4.10 Qualifiers
+===============
+
+   * `What constitutes an access to an object that has
+     volatile-qualified type (C90 6.5.3, C99 6.7.3).'
+
+     Such an object is normally accessed by pointers and used for
+     accessing hardware.  In most expressions, it is intuitively
+     obvious what is a read and what is a write.  For example
+
+          volatile int *dst = SOMEVALUE;
+          volatile int *src = SOMEOTHERVALUE;
+          *dst = *src;
+
+     will cause a read of the volatile object pointed to by SRC and
+     store the value into the volatile object pointed to by DST.  There
+     is no guarantee that these reads and writes are atomic, especially
+     for objects larger than `int'.
+
+     However, if the volatile storage is not being modified, and the
+     value of the volatile storage is not used, then the situation is
+     less obvious.  For example
+
+          volatile int *src = SOMEVALUE;
+          *src;
+
+     According to the C standard, such an expression is an rvalue whose
+     type is the unqualified version of its original type, i.e. `int'.
+     Whether GCC interprets this as a read of the volatile object being
+     pointed to or only as a request to evaluate the expression for its
+     side-effects depends on this type.
+
+     If it is a scalar type, or on most targets an aggregate type whose
+     only member object is of a scalar type, or a union type whose
+     member objects are of scalar types, the expression is interpreted
+     by GCC as a read of the volatile object; in the other cases, the
+     expression is only evaluated for its side-effects.
+
+
+
+File: gcc.info,  Node: Declarators implementation,  Next: Statements implementation,  Prev: Qualifiers implementation,  Up: C Implementation
+
+4.11 Declarators
+================
+
+   * `The maximum number of declarators that may modify an arithmetic,
+     structure or union type (C90 6.5.4).'
+
+     GCC is only limited by available memory.
+
+
+
+File: gcc.info,  Node: Statements implementation,  Next: Preprocessing directives implementation,  Prev: Declarators implementation,  Up: C Implementation
+
+4.12 Statements
+===============
+
+   * `The maximum number of `case' values in a `switch' statement (C90
+     6.6.4.2).'
+
+     GCC is only limited by available memory.
+
+
+
+File: gcc.info,  Node: Preprocessing directives implementation,  Next: Library functions implementation,  Prev: Statements implementation,  Up: C Implementation
+
+4.13 Preprocessing directives
+=============================
+
+*Note Implementation-defined behavior: (cpp)Implementation-defined
+behavior, for details of these aspects of implementation-defined
+behavior.
+
+   * `How sequences in both forms of header names are mapped to headers
+     or external source file names (C90 6.1.7, C99 6.4.7).'
+
+   * `Whether the value of a character constant in a constant expression
+     that controls conditional inclusion matches the value of the same
+     character constant in the execution character set (C90 6.8.1, C99
+     6.10.1).'
+
+   * `Whether the value of a single-character character constant in a
+     constant expression that controls conditional inclusion may have a
+     negative value (C90 6.8.1, C99 6.10.1).'
+
+   * `The places that are searched for an included `<>' delimited
+     header, and how the places are specified or the header is
+     identified (C90 6.8.2, C99 6.10.2).'
+
+   * `How the named source file is searched for in an included `""'
+     delimited header (C90 6.8.2, C99 6.10.2).'
+
+   * `The method by which preprocessing tokens (possibly resulting from
+     macro expansion) in a `#include' directive are combined into a
+     header name (C90 6.8.2, C99 6.10.2).'
+
+   * `The nesting limit for `#include' processing (C90 6.8.2, C99
+     6.10.2).'
+
+   * `Whether the `#' operator inserts a `\' character before the `\'
+     character that begins a universal character name in a character
+     constant or string literal (C99 6.10.3.2).'
+
+   * `The behavior on each recognized non-`STDC #pragma' directive (C90
+     6.8.6, C99 6.10.6).'
+
+     *Note Pragmas: (cpp)Pragmas, for details of pragmas accepted by
+     GCC on all targets.  *Note Pragmas Accepted by GCC: Pragmas, for
+     details of target-specific pragmas.
+
+   * `The definitions for `__DATE__' and `__TIME__' when respectively,
+     the date and time of translation are not available (C90 6.8.8, C99
+     6.10.8).'
+
+
+
+File: gcc.info,  Node: Library functions implementation,  Next: Architecture implementation,  Prev: Preprocessing directives implementation,  Up: C Implementation
+
+4.14 Library functions
+======================
+
+The behavior of most of these points are dependent on the implementation
+of the C library, and are not defined by GCC itself.
+
+   * `The null pointer constant to which the macro `NULL' expands (C90
+     7.1.6, C99 7.17).'
+
+     In `<stddef.h>', `NULL' expands to `((void *)0)'.  GCC does not
+     provide the other headers which define `NULL' and some library
+     implementations may use other definitions in those headers.
+
+
+
+File: gcc.info,  Node: Architecture implementation,  Next: Locale-specific behavior implementation,  Prev: Library functions implementation,  Up: C Implementation
+
+4.15 Architecture
+=================
+
+   * `The values or expressions assigned to the macros specified in the
+     headers `<float.h>', `<limits.h>', and `<stdint.h>' (C90 and C99
+     5.2.4.2, C99 7.18.2, C99 7.18.3).'
+
+     Determined by ABI.
+
+   * `The number, order, and encoding of bytes in any object (when not
+     explicitly specified in this International Standard) (C99
+     6.2.6.1).'
+
+     Determined by ABI.
+
+   * `The value of the result of the `sizeof' operator (C90 6.3.3.4,
+     C99 6.5.3.4).'
+
+     Determined by ABI.
+
+
+
+File: gcc.info,  Node: Locale-specific behavior implementation,  Prev: Architecture implementation,  Up: C Implementation
+
+4.16 Locale-specific behavior
+=============================
+
+The behavior of these points are dependent on the implementation of the
+C library, and are not defined by GCC itself.
+
+
+File: gcc.info,  Node: C++ Implementation,  Next: C++ Extensions,  Prev: C Extensions,  Up: Top
+
+5 C++ Implementation-defined behavior
+*************************************
+
+A conforming implementation of ISO C++ is required to document its
+choice of behavior in each of the areas that are designated
+"implementation defined".  The following lists all such areas, along
+with the section numbers from the ISO/IEC 14822:1998 and ISO/IEC
+14822:2003 standards.  Some areas are only implementation-defined in
+one version of the standard.
+
+ Some choices depend on the externally determined ABI for the platform
+(including standard character encodings) which GCC follows; these are
+listed as "determined by ABI" below.  *Note Binary Compatibility:
+Compatibility, and `http://gcc.gnu.org/readings.html'.  Some choices
+are documented in the preprocessor manual.  *Note
+Implementation-defined behavior: (cpp)Implementation-defined behavior.
+Some choices are documented in the corresponding document for the C
+language.  *Note C Implementation::.  Some choices are made by the
+library and operating system (or other environment when compiling for a
+freestanding environment); refer to their documentation for details.
+
+* Menu:
+
+* Conditionally-supported behavior::
+
+
+File: gcc.info,  Node: Conditionally-supported behavior,  Up: C++ Implementation
+
+5.1 Conditionally-supported behavior
+====================================
+
+`Each implementation shall include documentation that identifies all
+conditionally-supported constructs that it does not support (C++0x
+1.4).'
+
+   * `Whether an argument of class type with a non-trivial copy
+     constructor or destructor can be passed to ... (C++0x 5.2.2).'
+
+     Such argument passing is not supported.
+
+
+
+File: gcc.info,  Node: C Extensions,  Next: C++ Implementation,  Prev: C Implementation,  Up: Top
+
+6 Extensions to the C Language Family
+*************************************
+
+GNU C provides several language features not found in ISO standard C.
+(The `-pedantic' option directs GCC to print a warning message if any
+of these features is used.)  To test for the availability of these
+features in conditional compilation, check for a predefined macro
+`__GNUC__', which is always defined under GCC.
+
+ These extensions are available in C and Objective-C.  Most of them are
+also available in C++.  *Note Extensions to the C++ Language: C++
+Extensions, for extensions that apply _only_ to C++.
+
+ Some features that are in ISO C99 but not C90 or C++ are also, as
+extensions, accepted by GCC in C90 mode and in C++.
+
+* Menu:
+
+* Statement Exprs::     Putting statements and declarations inside expressions.
+* Local Labels::        Labels local to a block.
+* Labels as Values::    Getting pointers to labels, and computed gotos.
+* Nested Functions::    As in Algol and Pascal, lexical scoping of functions.
+* Constructing Calls::  Dispatching a call to another function.
+* Typeof::              `typeof': referring to the type of an expression.
+* Conditionals::        Omitting the middle operand of a `?:' expression.
+* Long Long::           Double-word integers---`long long int'.
+* Complex::             Data types for complex numbers.
+* Floating Types::      Additional Floating Types.
+* Half-Precision::      Half-Precision Floating Point.
+* Decimal Float::       Decimal Floating Types.
+* Hex Floats::          Hexadecimal floating-point constants.
+* Fixed-Point::         Fixed-Point Types.
+* Named Address Spaces::Named address spaces.
+* Zero Length::         Zero-length arrays.
+* Variable Length::     Arrays whose length is computed at run time.
+* Empty Structures::    Structures with no members.
+* Variadic Macros::     Macros with a variable number of arguments.
+* Escaped Newlines::    Slightly looser rules for escaped newlines.
+* Subscripting::        Any array can be subscripted, even if not an lvalue.
+* Pointer Arith::       Arithmetic on `void'-pointers and function pointers.
+* Initializers::        Non-constant initializers.
+* Compound Literals::   Compound literals give structures, unions
+                        or arrays as values.
+* Designated Inits::    Labeling elements of initializers.
+* Cast to Union::       Casting to union type from any member of the union.
+* Case Ranges::         `case 1 ... 9' and such.
+* Mixed Declarations::  Mixing declarations and code.
+* Function Attributes:: Declaring that functions have no side effects,
+                        or that they can never return.
+* Attribute Syntax::    Formal syntax for attributes.
+* Function Prototypes:: Prototype declarations and old-style definitions.
+* C++ Comments::        C++ comments are recognized.
+* Dollar Signs::        Dollar sign is allowed in identifiers.
+* Character Escapes::   `\e' stands for the character <ESC>.
+* Variable Attributes:: Specifying attributes of variables.
+* Type Attributes::     Specifying attributes of types.
+* Alignment::           Inquiring about the alignment of a type or variable.
+* Inline::              Defining inline functions (as fast as macros).
+* Extended Asm::        Assembler instructions with C expressions as operands.
+                        (With them you can define ``built-in'' functions.)
+* Constraints::         Constraints for asm operands
+* Asm Labels::          Specifying the assembler name to use for a C symbol.
+* Explicit Reg Vars::   Defining variables residing in specified registers.
+* Alternate Keywords::  `__const__', `__asm__', etc., for header files.
+* Incomplete Enums::    `enum foo;', with details to follow.
+* Function Names::      Printable strings which are the name of the current
+                        function.
+* Return Address::      Getting the return or frame address of a function.
+* Vector Extensions::   Using vector instructions through built-in functions.
+* Offsetof::            Special syntax for implementing `offsetof'.
+* Atomic Builtins::     Built-in functions for atomic memory access.
+* Object Size Checking:: Built-in functions for limited buffer overflow
+                        checking.
+* Other Builtins::      Other built-in functions.
+* Target Builtins::     Built-in functions specific to particular targets.
+* Target Format Checks:: Format checks specific to particular targets.
+* Pragmas::             Pragmas accepted by GCC.
+* Unnamed Fields::      Unnamed struct/union fields within structs/unions.
+* Thread-Local::        Per-thread variables.
+* Binary constants::    Binary constants using the `0b' prefix.
+
+
+File: gcc.info,  Node: Statement Exprs,  Next: Local Labels,  Up: C Extensions
+
+6.1 Statements and Declarations in Expressions
+==============================================
+
+A compound statement enclosed in parentheses may appear as an expression
+in GNU C.  This allows you to use loops, switches, and local variables
+within an expression.
+
+ Recall that a compound statement is a sequence of statements surrounded
+by braces; in this construct, parentheses go around the braces.  For
+example:
+
+     ({ int y = foo (); int z;
+        if (y > 0) z = y;
+        else z = - y;
+        z; })
+
+is a valid (though slightly more complex than necessary) expression for
+the absolute value of `foo ()'.
+
+ The last thing in the compound statement should be an expression
+followed by a semicolon; the value of this subexpression serves as the
+value of the entire construct.  (If you use some other kind of statement
+last within the braces, the construct has type `void', and thus
+effectively no value.)
+
+ This feature is especially useful in making macro definitions "safe"
+(so that they evaluate each operand exactly once).  For example, the
+"maximum" function is commonly defined as a macro in standard C as
+follows:
+
+     #define max(a,b) ((a) > (b) ? (a) : (b))
+
+But this definition computes either A or B twice, with bad results if
+the operand has side effects.  In GNU C, if you know the type of the
+operands (here taken as `int'), you can define the macro safely as
+follows:
+
+     #define maxint(a,b) \
+       ({int _a = (a), _b = (b); _a > _b ? _a : _b; })
+
+ Embedded statements are not allowed in constant expressions, such as
+the value of an enumeration constant, the width of a bit-field, or the
+initial value of a static variable.
+
+ If you don't know the type of the operand, you can still do this, but
+you must use `typeof' (*note Typeof::).
+
+ In G++, the result value of a statement expression undergoes array and
+function pointer decay, and is returned by value to the enclosing
+expression.  For instance, if `A' is a class, then
+
+             A a;
+
+             ({a;}).Foo ()
+
+will construct a temporary `A' object to hold the result of the
+statement expression, and that will be used to invoke `Foo'.  Therefore
+the `this' pointer observed by `Foo' will not be the address of `a'.
+
+ Any temporaries created within a statement within a statement
+expression will be destroyed at the statement's end.  This makes
+statement expressions inside macros slightly different from function
+calls.  In the latter case temporaries introduced during argument
+evaluation will be destroyed at the end of the statement that includes
+the function call.  In the statement expression case they will be
+destroyed during the statement expression.  For instance,
+
+     #define macro(a)  ({__typeof__(a) b = (a); b + 3; })
+     template<typename T> T function(T a) { T b = a; return b + 3; }
+
+     void foo ()
+     {
+       macro (X ());
+       function (X ());
+     }
+
+will have different places where temporaries are destroyed.  For the
+`macro' case, the temporary `X' will be destroyed just after the
+initialization of `b'.  In the `function' case that temporary will be
+destroyed when the function returns.
+
+ These considerations mean that it is probably a bad idea to use
+statement-expressions of this form in header files that are designed to
+work with C++.  (Note that some versions of the GNU C Library contained
+header files using statement-expression that lead to precisely this
+bug.)
+
+ Jumping into a statement expression with `goto' or using a `switch'
+statement outside the statement expression with a `case' or `default'
+label inside the statement expression is not permitted.  Jumping into a
+statement expression with a computed `goto' (*note Labels as Values::)
+yields undefined behavior.  Jumping out of a statement expression is
+permitted, but if the statement expression is part of a larger
+expression then it is unspecified which other subexpressions of that
+expression have been evaluated except where the language definition
+requires certain subexpressions to be evaluated before or after the
+statement expression.  In any case, as with a function call the
+evaluation of a statement expression is not interleaved with the
+evaluation of other parts of the containing expression.  For example,
+
+       foo (), (({ bar1 (); goto a; 0; }) + bar2 ()), baz();
+
+will call `foo' and `bar1' and will not call `baz' but may or may not
+call `bar2'.  If `bar2' is called, it will be called after `foo' and
+before `bar1'
+
+
+File: gcc.info,  Node: Local Labels,  Next: Labels as Values,  Prev: Statement Exprs,  Up: C Extensions
+
+6.2 Locally Declared Labels
+===========================
+
+GCC allows you to declare "local labels" in any nested block scope.  A
+local label is just like an ordinary label, but you can only reference
+it (with a `goto' statement, or by taking its address) within the block
+in which it was declared.
+
+ A local label declaration looks like this:
+
+     __label__ LABEL;
+
+or
+
+     __label__ LABEL1, LABEL2, /* ... */;
+
+ Local label declarations must come at the beginning of the block,
+before any ordinary declarations or statements.
+
+ The label declaration defines the label _name_, but does not define
+the label itself.  You must do this in the usual way, with `LABEL:',
+within the statements of the statement expression.
+
+ The local label feature is useful for complex macros.  If a macro
+contains nested loops, a `goto' can be useful for breaking out of them.
+However, an ordinary label whose scope is the whole function cannot be
+used: if the macro can be expanded several times in one function, the
+label will be multiply defined in that function.  A local label avoids
+this problem.  For example:
+
+     #define SEARCH(value, array, target)              \
+     do {                                              \
+       __label__ found;                                \
+       typeof (target) _SEARCH_target = (target);      \
+       typeof (*(array)) *_SEARCH_array = (array);     \
+       int i, j;                                       \
+       int value;                                      \
+       for (i = 0; i < max; i++)                       \
+         for (j = 0; j < max; j++)                     \
+           if (_SEARCH_array[i][j] == _SEARCH_target)  \
+             { (value) = i; goto found; }              \
+       (value) = -1;                                   \
+      found:;                                          \
+     } while (0)
+
+ This could also be written using a statement-expression:
+
+     #define SEARCH(array, target)                     \
+     ({                                                \
+       __label__ found;                                \
+       typeof (target) _SEARCH_target = (target);      \
+       typeof (*(array)) *_SEARCH_array = (array);     \
+       int i, j;                                       \
+       int value;                                      \
+       for (i = 0; i < max; i++)                       \
+         for (j = 0; j < max; j++)                     \
+           if (_SEARCH_array[i][j] == _SEARCH_target)  \
+             { value = i; goto found; }                \
+       value = -1;                                     \
+      found:                                           \
+       value;                                          \
+     })
+
+ Local label declarations also make the labels they declare visible to
+nested functions, if there are any.  *Note Nested Functions::, for
+details.
+
+
+File: gcc.info,  Node: Labels as Values,  Next: Nested Functions,  Prev: Local Labels,  Up: C Extensions
+
+6.3 Labels as Values
+====================
+
+You can get the address of a label defined in the current function (or
+a containing function) with the unary operator `&&'.  The value has
+type `void *'.  This value is a constant and can be used wherever a
+constant of that type is valid.  For example:
+
+     void *ptr;
+     /* ... */
+     ptr = &&foo;
+
+ To use these values, you need to be able to jump to one.  This is done
+with the computed goto statement(1), `goto *EXP;'.  For example,
+
+     goto *ptr;
+
+Any expression of type `void *' is allowed.
+
+ One way of using these constants is in initializing a static array that
+will serve as a jump table:
+
+     static void *array[] = { &&foo, &&bar, &&hack };
+
+ Then you can select a label with indexing, like this:
+
+     goto *array[i];
+
+Note that this does not check whether the subscript is in bounds--array
+indexing in C never does that.
+
+ Such an array of label values serves a purpose much like that of the
+`switch' statement.  The `switch' statement is cleaner, so use that
+rather than an array unless the problem does not fit a `switch'
+statement very well.
+
+ Another use of label values is in an interpreter for threaded code.
+The labels within the interpreter function can be stored in the
+threaded code for super-fast dispatching.
+
+ You may not use this mechanism to jump to code in a different function.
+If you do that, totally unpredictable things will happen.  The best way
+to avoid this is to store the label address only in automatic variables
+and never pass it as an argument.
+
+ An alternate way to write the above example is
+
+     static const int array[] = { &&foo - &&foo, &&bar - &&foo,
+                                  &&hack - &&foo };
+     goto *(&&foo + array[i]);
+
+This is more friendly to code living in shared libraries, as it reduces
+the number of dynamic relocations that are needed, and by consequence,
+allows the data to be read-only.
+
+ The `&&foo' expressions for the same label might have different values
+if the containing function is inlined or cloned.  If a program relies
+on them being always the same,
+`__attribute__((__noinline__,__noclone__))' should be used to prevent
+inlining and cloning.  If `&&foo' is used in a static variable
+initializer, inlining and cloning is forbidden.
+
+ ---------- Footnotes ----------
+
+ (1) The analogous feature in Fortran is called an assigned goto, but
+that name seems inappropriate in C, where one can do more than simply
+store label addresses in label variables.
+
+
+File: gcc.info,  Node: Nested Functions,  Next: Constructing Calls,  Prev: Labels as Values,  Up: C Extensions
+
+6.4 Nested Functions
+====================
+
+A "nested function" is a function defined inside another function.
+(Nested functions are not supported for GNU C++.)  The nested function's
+name is local to the block where it is defined.  For example, here we
+define a nested function named `square', and call it twice:
+
+     foo (double a, double b)
+     {
+       double square (double z) { return z * z; }
+
+       return square (a) + square (b);
+     }
+
+ The nested function can access all the variables of the containing
+function that are visible at the point of its definition.  This is
+called "lexical scoping".  For example, here we show a nested function
+which uses an inherited variable named `offset':
+
+     bar (int *array, int offset, int size)
+     {
+       int access (int *array, int index)
+         { return array[index + offset]; }
+       int i;
+       /* ... */
+       for (i = 0; i < size; i++)
+         /* ... */ access (array, i) /* ... */
+     }
+
+ Nested function definitions are permitted within functions in the
+places where variable definitions are allowed; that is, in any block,
+mixed with the other declarations and statements in the block.
+
+ It is possible to call the nested function from outside the scope of
+its name by storing its address or passing the address to another
+function:
+
+     hack (int *array, int size)
+     {
+       void store (int index, int value)
+         { array[index] = value; }
+
+       intermediate (store, size);
+     }
+
+ Here, the function `intermediate' receives the address of `store' as
+an argument.  If `intermediate' calls `store', the arguments given to
+`store' are used to store into `array'.  But this technique works only
+so long as the containing function (`hack', in this example) does not
+exit.
+
+ If you try to call the nested function through its address after the
+containing function has exited, all hell will break loose.  If you try
+to call it after a containing scope level has exited, and if it refers
+to some of the variables that are no longer in scope, you may be lucky,
+but it's not wise to take the risk.  If, however, the nested function
+does not refer to anything that has gone out of scope, you should be
+safe.
+
+ GCC implements taking the address of a nested function using a
+technique called "trampolines".  This technique was described in
+`Lexical Closures for C++' (Thomas M. Breuel, USENIX C++ Conference
+Proceedings, October 17-21, 1988).
+
+ A nested function can jump to a label inherited from a containing
+function, provided the label was explicitly declared in the containing
+function (*note Local Labels::).  Such a jump returns instantly to the
+containing function, exiting the nested function which did the `goto'
+and any intermediate functions as well.  Here is an example:
+
+     bar (int *array, int offset, int size)
+     {
+       __label__ failure;
+       int access (int *array, int index)
+         {
+           if (index > size)
+             goto failure;
+           return array[index + offset];
+         }
+       int i;
+       /* ... */
+       for (i = 0; i < size; i++)
+         /* ... */ access (array, i) /* ... */
+       /* ... */
+       return 0;
+
+      /* Control comes here from `access'
+         if it detects an error.  */
+      failure:
+       return -1;
+     }
+
+ A nested function always has no linkage.  Declaring one with `extern'
+or `static' is erroneous.  If you need to declare the nested function
+before its definition, use `auto' (which is otherwise meaningless for
+function declarations).
+
+     bar (int *array, int offset, int size)
+     {
+       __label__ failure;
+       auto int access (int *, int);
+       /* ... */
+       int access (int *array, int index)
+         {
+           if (index > size)
+             goto failure;
+           return array[index + offset];
+         }
+       /* ... */
+     }
+
+
+File: gcc.info,  Node: Constructing Calls,  Next: Typeof,  Prev: Nested Functions,  Up: C Extensions
+
+6.5 Constructing Function Calls
+===============================
+
+Using the built-in functions described below, you can record the
+arguments a function received, and call another function with the same
+arguments, without knowing the number or types of the arguments.
+
+ You can also record the return value of that function call, and later
+return that value, without knowing what data type the function tried to
+return (as long as your caller expects that data type).
+
+ However, these built-in functions may interact badly with some
+sophisticated features or other extensions of the language.  It is,
+therefore, not recommended to use them outside very simple functions
+acting as mere forwarders for their arguments.
+
+ -- Built-in Function: void * __builtin_apply_args ()
+     This built-in function returns a pointer to data describing how to
+     perform a call with the same arguments as were passed to the
+     current function.
+
+     The function saves the arg pointer register, structure value
+     address, and all registers that might be used to pass arguments to
+     a function into a block of memory allocated on the stack.  Then it
+     returns the address of that block.
+
+ -- Built-in Function: void * __builtin_apply (void (*FUNCTION)(), void
+          *ARGUMENTS, size_t SIZE)
+     This built-in function invokes FUNCTION with a copy of the
+     parameters described by ARGUMENTS and SIZE.
+
+     The value of ARGUMENTS should be the value returned by
+     `__builtin_apply_args'.  The argument SIZE specifies the size of
+     the stack argument data, in bytes.
+
+     This function returns a pointer to data describing how to return
+     whatever value was returned by FUNCTION.  The data is saved in a
+     block of memory allocated on the stack.
+
+     It is not always simple to compute the proper value for SIZE.  The
+     value is used by `__builtin_apply' to compute the amount of data
+     that should be pushed on the stack and copied from the incoming
+     argument area.
+
+ -- Built-in Function: void __builtin_return (void *RESULT)
+     This built-in function returns the value described by RESULT from
+     the containing function.  You should specify, for RESULT, a value
+     returned by `__builtin_apply'.
+
+ -- Built-in Function: __builtin_va_arg_pack ()
+     This built-in function represents all anonymous arguments of an
+     inline function.  It can be used only in inline functions which
+     will be always inlined, never compiled as a separate function,
+     such as those using `__attribute__ ((__always_inline__))' or
+     `__attribute__ ((__gnu_inline__))' extern inline functions.  It
+     must be only passed as last argument to some other function with
+     variable arguments.  This is useful for writing small wrapper
+     inlines for variable argument functions, when using preprocessor
+     macros is undesirable.  For example:
+          extern int myprintf (FILE *f, const char *format, ...);
+          extern inline __attribute__ ((__gnu_inline__)) int
+          myprintf (FILE *f, const char *format, ...)
+          {
+            int r = fprintf (f, "myprintf: ");
+            if (r < 0)
+              return r;
+            int s = fprintf (f, format, __builtin_va_arg_pack ());
+            if (s < 0)
+              return s;
+            return r + s;
+          }
+
+ -- Built-in Function: __builtin_va_arg_pack_len ()
+     This built-in function returns the number of anonymous arguments of
+     an inline function.  It can be used only in inline functions which
+     will be always inlined, never compiled as a separate function, such
+     as those using `__attribute__ ((__always_inline__))' or
+     `__attribute__ ((__gnu_inline__))' extern inline functions.  For
+     example following will do link or runtime checking of open
+     arguments for optimized code:
+          #ifdef __OPTIMIZE__
+          extern inline __attribute__((__gnu_inline__)) int
+          myopen (const char *path, int oflag, ...)
+          {
+            if (__builtin_va_arg_pack_len () > 1)
+              warn_open_too_many_arguments ();
+
+            if (__builtin_constant_p (oflag))
+              {
+                if ((oflag & O_CREAT) != 0 && __builtin_va_arg_pack_len () < 1)
+                  {
+                    warn_open_missing_mode ();
+                    return __open_2 (path, oflag);
+                  }
+                return open (path, oflag, __builtin_va_arg_pack ());
+              }
+
+            if (__builtin_va_arg_pack_len () < 1)
+              return __open_2 (path, oflag);
+
+            return open (path, oflag, __builtin_va_arg_pack ());
+          }
+          #endif
+
+
+File: gcc.info,  Node: Typeof,  Next: Conditionals,  Prev: Constructing Calls,  Up: C Extensions
+
+6.6 Referring to a Type with `typeof'
+=====================================
+
+Another way to refer to the type of an expression is with `typeof'.
+The syntax of using of this keyword looks like `sizeof', but the
+construct acts semantically like a type name defined with `typedef'.
+
+ There are two ways of writing the argument to `typeof': with an
+expression or with a type.  Here is an example with an expression:
+
+     typeof (x[0](1))
+
+This assumes that `x' is an array of pointers to functions; the type
+described is that of the values of the functions.
+
+ Here is an example with a typename as the argument:
+
+     typeof (int *)
+
+Here the type described is that of pointers to `int'.
+
+ If you are writing a header file that must work when included in ISO C
+programs, write `__typeof__' instead of `typeof'.  *Note Alternate
+Keywords::.
+
+ A `typeof'-construct can be used anywhere a typedef name could be
+used.  For example, you can use it in a declaration, in a cast, or
+inside of `sizeof' or `typeof'.
+
+ The operand of `typeof' is evaluated for its side effects if and only
+if it is an expression of variably modified type or the name of such a
+type.
+
+ `typeof' is often useful in conjunction with the
+statements-within-expressions feature.  Here is how the two together can
+be used to define a safe "maximum" macro that operates on any
+arithmetic type and evaluates each of its arguments exactly once:
+
+     #define max(a,b) \
+       ({ typeof (a) _a = (a); \
+           typeof (b) _b = (b); \
+         _a > _b ? _a : _b; })
+
+ The reason for using names that start with underscores for the local
+variables is to avoid conflicts with variable names that occur within
+the expressions that are substituted for `a' and `b'.  Eventually we
+hope to design a new form of declaration syntax that allows you to
+declare variables whose scopes start only after their initializers;
+this will be a more reliable way to prevent such conflicts.
+
+Some more examples of the use of `typeof':
+
+   * This declares `y' with the type of what `x' points to.
+
+          typeof (*x) y;
+
+   * This declares `y' as an array of such values.
+
+          typeof (*x) y[4];
+
+   * This declares `y' as an array of pointers to characters:
+
+          typeof (typeof (char *)[4]) y;
+
+     It is equivalent to the following traditional C declaration:
+
+          char *y[4];
+
+     To see the meaning of the declaration using `typeof', and why it
+     might be a useful way to write, rewrite it with these macros:
+
+          #define pointer(T)  typeof(T *)
+          #define array(T, N) typeof(T [N])
+
+     Now the declaration can be rewritten this way:
+
+          array (pointer (char), 4) y;
+
+     Thus, `array (pointer (char), 4)' is the type of arrays of 4
+     pointers to `char'.
+
+ _Compatibility Note:_ In addition to `typeof', GCC 2 supported a more
+limited extension which permitted one to write
+
+     typedef T = EXPR;
+
+with the effect of declaring T to have the type of the expression EXPR.
+This extension does not work with GCC 3 (versions between 3.0 and 3.2
+will crash; 3.2.1 and later give an error).  Code which relies on it
+should be rewritten to use `typeof':
+
+     typedef typeof(EXPR) T;
+
+This will work with all versions of GCC.
+
+
+File: gcc.info,  Node: Conditionals,  Next: Long Long,  Prev: Typeof,  Up: C Extensions
+
+6.7 Conditionals with Omitted Operands
+======================================
+
+The middle operand in a conditional expression may be omitted.  Then if
+the first operand is nonzero, its value is the value of the conditional
+expression.
+
+ Therefore, the expression
+
+     x ? : y
+
+has the value of `x' if that is nonzero; otherwise, the value of `y'.
+
+ This example is perfectly equivalent to
+
+     x ? x : y
+
+In this simple case, the ability to omit the middle operand is not
+especially useful.  When it becomes useful is when the first operand
+does, or may (if it is a macro argument), contain a side effect.  Then
+repeating the operand in the middle would perform the side effect
+twice.  Omitting the middle operand uses the value already computed
+without the undesirable effects of recomputing it.
+
+
+File: gcc.info,  Node: Long Long,  Next: Complex,  Prev: Conditionals,  Up: C Extensions
+
+6.8 Double-Word Integers
+========================
+
+ISO C99 supports data types for integers that are at least 64 bits wide,
+and as an extension GCC supports them in C90 mode and in C++.  Simply
+write `long long int' for a signed integer, or `unsigned long long int'
+for an unsigned integer.  To make an integer constant of type `long
+long int', add the suffix `LL' to the integer.  To make an integer
+constant of type `unsigned long long int', add the suffix `ULL' to the
+integer.
+
+ You can use these types in arithmetic like any other integer types.
+Addition, subtraction, and bitwise boolean operations on these types
+are open-coded on all types of machines.  Multiplication is open-coded
+if the machine supports fullword-to-doubleword a widening multiply
+instruction.  Division and shifts are open-coded only on machines that
+provide special support.  The operations that are not open-coded use
+special library routines that come with GCC.
+
+ There may be pitfalls when you use `long long' types for function
+arguments, unless you declare function prototypes.  If a function
+expects type `int' for its argument, and you pass a value of type `long
+long int', confusion will result because the caller and the subroutine
+will disagree about the number of bytes for the argument.  Likewise, if
+the function expects `long long int' and you pass `int'.  The best way
+to avoid such problems is to use prototypes.
+
+
+File: gcc.info,  Node: Complex,  Next: Floating Types,  Prev: Long Long,  Up: C Extensions
+
+6.9 Complex Numbers
+===================
+
+ISO C99 supports complex floating data types, and as an extension GCC
+supports them in C90 mode and in C++, and supports complex integer data
+types which are not part of ISO C99.  You can declare complex types
+using the keyword `_Complex'.  As an extension, the older GNU keyword
+`__complex__' is also supported.
+
+ For example, `_Complex double x;' declares `x' as a variable whose
+real part and imaginary part are both of type `double'.  `_Complex
+short int y;' declares `y' to have real and imaginary parts of type
+`short int'; this is not likely to be useful, but it shows that the set
+of complex types is complete.
+
+ To write a constant with a complex data type, use the suffix `i' or
+`j' (either one; they are equivalent).  For example, `2.5fi' has type
+`_Complex float' and `3i' has type `_Complex int'.  Such a constant
+always has a pure imaginary value, but you can form any complex value
+you like by adding one to a real constant.  This is a GNU extension; if
+you have an ISO C99 conforming C library (such as GNU libc), and want
+to construct complex constants of floating type, you should include
+`<complex.h>' and use the macros `I' or `_Complex_I' instead.
+
+ To extract the real part of a complex-valued expression EXP, write
+`__real__ EXP'.  Likewise, use `__imag__' to extract the imaginary
+part.  This is a GNU extension; for values of floating type, you should
+use the ISO C99 functions `crealf', `creal', `creall', `cimagf',
+`cimag' and `cimagl', declared in `<complex.h>' and also provided as
+built-in functions by GCC.
+
+ The operator `~' performs complex conjugation when used on a value
+with a complex type.  This is a GNU extension; for values of floating
+type, you should use the ISO C99 functions `conjf', `conj' and `conjl',
+declared in `<complex.h>' and also provided as built-in functions by
+GCC.
+
+ GCC can allocate complex automatic variables in a noncontiguous
+fashion; it's even possible for the real part to be in a register while
+the imaginary part is on the stack (or vice-versa).  Only the DWARF2
+debug info format can represent this, so use of DWARF2 is recommended.
+If you are using the stabs debug info format, GCC describes a
+noncontiguous complex variable as if it were two separate variables of
+noncomplex type.  If the variable's actual name is `foo', the two
+fictitious variables are named `foo$real' and `foo$imag'.  You can
+examine and set these two fictitious variables with your debugger.
+
+
+File: gcc.info,  Node: Floating Types,  Next: Half-Precision,  Prev: Complex,  Up: C Extensions
+
+6.10 Additional Floating Types
+==============================
+
+As an extension, the GNU C compiler supports additional floating types,
+`__float80' and `__float128' to support 80bit (`XFmode') and 128 bit
+(`TFmode') floating types.  Support for additional types includes the
+arithmetic operators: add, subtract, multiply, divide; unary arithmetic
+operators; relational operators; equality operators; and conversions to
+and from integer and other floating types.  Use a suffix `w' or `W' in
+a literal constant of type `__float80' and `q' or `Q' for `_float128'.
+You can declare complex types using the corresponding internal complex
+type, `XCmode' for `__float80' type and `TCmode' for `__float128' type:
+
+     typedef _Complex float __attribute__((mode(TC))) _Complex128;
+     typedef _Complex float __attribute__((mode(XC))) _Complex80;
+
+ Not all targets support additional floating point types.  `__float80'
+and `__float128' types are supported on i386, x86_64 and ia64 targets.
+
+
+File: gcc.info,  Node: Half-Precision,  Next: Decimal Float,  Prev: Floating Types,  Up: C Extensions
+
+6.11 Half-Precision Floating Point
+==================================
+
+On ARM targets, GCC supports half-precision (16-bit) floating point via
+the `__fp16' type.  You must enable this type explicitly with the
+`-mfp16-format' command-line option in order to use it.
+
+ ARM supports two incompatible representations for half-precision
+floating-point values.  You must choose one of the representations and
+use it consistently in your program.
+
+ Specifying `-mfp16-format=ieee' selects the IEEE 754-2008 format.
+This format can represent normalized values in the range of 2^-14 to
+65504.  There are 11 bits of significand precision, approximately 3
+decimal digits.
+
+ Specifying `-mfp16-format=alternative' selects the ARM alternative
+format.  This representation is similar to the IEEE format, but does
+not support infinities or NaNs.  Instead, the range of exponents is
+extended, so that this format can represent normalized values in the
+range of 2^-14 to 131008.
+
+ The `__fp16' type is a storage format only.  For purposes of
+arithmetic and other operations, `__fp16' values in C or C++
+expressions are automatically promoted to `float'.  In addition, you
+cannot declare a function with a return value or parameters of type
+`__fp16'.
+
+ Note that conversions from `double' to `__fp16' involve an
+intermediate conversion to `float'.  Because of rounding, this can
+sometimes produce a different result than a direct conversion.
+
+ ARM provides hardware support for conversions between `__fp16' and
+`float' values as an extension to VFP and NEON (Advanced SIMD).  GCC
+generates code using these hardware instructions if you compile with
+options to select an FPU that provides them; for example,
+`-mfpu=neon-fp16 -mfloat-abi=softfp', in addition to the
+`-mfp16-format' option to select a half-precision format.
+
+ Language-level support for the `__fp16' data type is independent of
+whether GCC generates code using hardware floating-point instructions.
+In cases where hardware support is not specified, GCC implements
+conversions between `__fp16' and `float' values as library calls.
+
+
+File: gcc.info,  Node: Decimal Float,  Next: Hex Floats,  Prev: Half-Precision,  Up: C Extensions
+
+6.12 Decimal Floating Types
+===========================
+
+As an extension, the GNU C compiler supports decimal floating types as
+defined in the N1312 draft of ISO/IEC WDTR24732.  Support for decimal
+floating types in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  Not all targets
+support decimal floating types.
+
+ The decimal floating types are `_Decimal32', `_Decimal64', and
+`_Decimal128'.  They use a radix of ten, unlike the floating types
+`float', `double', and `long double' whose radix is not specified by
+the C standard but is usually two.
+
+ Support for decimal floating types includes the arithmetic operators
+add, subtract, multiply, divide; unary arithmetic operators; relational
+operators; equality operators; and conversions to and from integer and
+other floating types.  Use a suffix `df' or `DF' in a literal constant
+of type `_Decimal32', `dd' or `DD' for `_Decimal64', and `dl' or `DL'
+for `_Decimal128'.
+
+ GCC support of decimal float as specified by the draft technical report
+is incomplete:
+
+   * When the value of a decimal floating type cannot be represented in
+     the integer type to which it is being converted, the result is
+     undefined rather than the result value specified by the draft
+     technical report.
+
+   * GCC does not provide the C library functionality associated with
+     `math.h', `fenv.h', `stdio.h', `stdlib.h', and `wchar.h', which
+     must come from a separate C library implementation.  Because of
+     this the GNU C compiler does not define macro `__STDC_DEC_FP__' to
+     indicate that the implementation conforms to the technical report.
+
+ Types `_Decimal32', `_Decimal64', and `_Decimal128' are supported by
+the DWARF2 debug information format.
+
+
+File: gcc.info,  Node: Hex Floats,  Next: Fixed-Point,  Prev: Decimal Float,  Up: C Extensions
+
+6.13 Hex Floats
+===============
+
+ISO C99 supports floating-point numbers written not only in the usual
+decimal notation, such as `1.55e1', but also numbers such as `0x1.fp3'
+written in hexadecimal format.  As a GNU extension, GCC supports this
+in C90 mode (except in some cases when strictly conforming) and in C++.
+In that format the `0x' hex introducer and the `p' or `P' exponent
+field are mandatory.  The exponent is a decimal number that indicates
+the power of 2 by which the significant part will be multiplied.  Thus
+`0x1.f' is 1 15/16, `p3' multiplies it by 8, and the value of `0x1.fp3'
+is the same as `1.55e1'.
+
+ Unlike for floating-point numbers in the decimal notation the exponent
+is always required in the hexadecimal notation.  Otherwise the compiler
+would not be able to resolve the ambiguity of, e.g., `0x1.f'.  This
+could mean `1.0f' or `1.9375' since `f' is also the extension for
+floating-point constants of type `float'.
+
+
+File: gcc.info,  Node: Fixed-Point,  Next: Named Address Spaces,  Prev: Hex Floats,  Up: C Extensions
+
+6.14 Fixed-Point Types
+======================
+
+As an extension, the GNU C compiler supports fixed-point types as
+defined in the N1169 draft of ISO/IEC DTR 18037.  Support for
+fixed-point types in GCC will evolve as the draft technical report
+changes.  Calling conventions for any target might also change.  Not
+all targets support fixed-point types.
+
+ The fixed-point types are `short _Fract', `_Fract', `long _Fract',
+`long long _Fract', `unsigned short _Fract', `unsigned _Fract',
+`unsigned long _Fract', `unsigned long long _Fract', `_Sat short
+_Fract', `_Sat _Fract', `_Sat long _Fract', `_Sat long long _Fract',
+`_Sat unsigned short _Fract', `_Sat unsigned _Fract', `_Sat unsigned
+long _Fract', `_Sat unsigned long long _Fract', `short _Accum',
+`_Accum', `long _Accum', `long long _Accum', `unsigned short _Accum',
+`unsigned _Accum', `unsigned long _Accum', `unsigned long long _Accum',
+`_Sat short _Accum', `_Sat _Accum', `_Sat long _Accum', `_Sat long long
+_Accum', `_Sat unsigned short _Accum', `_Sat unsigned _Accum', `_Sat
+unsigned long _Accum', `_Sat unsigned long long _Accum'.
+
+ Fixed-point data values contain fractional and optional integral parts.
+The format of fixed-point data varies and depends on the target machine.
+
+ Support for fixed-point types includes:
+   * prefix and postfix increment and decrement operators (`++', `--')
+
+   * unary arithmetic operators (`+', `-', `!')
+
+   * binary arithmetic operators (`+', `-', `*', `/')
+
+   * binary shift operators (`<<', `>>')
+
+   * relational operators (`<', `<=', `>=', `>')
+
+   * equality operators (`==', `!=')
+
+   * assignment operators (`+=', `-=', `*=', `/=', `<<=', `>>=')
+
+   * conversions to and from integer, floating-point, or fixed-point
+     types
+
+ Use a suffix in a fixed-point literal constant:
+   * `hr' or `HR' for `short _Fract' and `_Sat short _Fract'
+
+   * `r' or `R' for `_Fract' and `_Sat _Fract'
+
+   * `lr' or `LR' for `long _Fract' and `_Sat long _Fract'
+
+   * `llr' or `LLR' for `long long _Fract' and `_Sat long long _Fract'
+
+   * `uhr' or `UHR' for `unsigned short _Fract' and `_Sat unsigned
+     short _Fract'
+
+   * `ur' or `UR' for `unsigned _Fract' and `_Sat unsigned _Fract'
+
+   * `ulr' or `ULR' for `unsigned long _Fract' and `_Sat unsigned long
+     _Fract'
+
+   * `ullr' or `ULLR' for `unsigned long long _Fract' and `_Sat
+     unsigned long long _Fract'
+
+   * `hk' or `HK' for `short _Accum' and `_Sat short _Accum'
+
+   * `k' or `K' for `_Accum' and `_Sat _Accum'
+
+   * `lk' or `LK' for `long _Accum' and `_Sat long _Accum'
+
+   * `llk' or `LLK' for `long long _Accum' and `_Sat long long _Accum'
+
+   * `uhk' or `UHK' for `unsigned short _Accum' and `_Sat unsigned
+     short _Accum'
+
+   * `uk' or `UK' for `unsigned _Accum' and `_Sat unsigned _Accum'
+
+   * `ulk' or `ULK' for `unsigned long _Accum' and `_Sat unsigned long
+     _Accum'
+
+   * `ullk' or `ULLK' for `unsigned long long _Accum' and `_Sat
+     unsigned long long _Accum'
+
+ GCC support of fixed-point types as specified by the draft technical
+report is incomplete:
+
+   * Pragmas to control overflow and rounding behaviors are not
+     implemented.
+
+ Fixed-point types are supported by the DWARF2 debug information format.
+
+
+File: gcc.info,  Node: Named Address Spaces,  Next: Zero Length,  Prev: Fixed-Point,  Up: C Extensions
+
+6.15 Named address spaces
+=========================
+
+As an extension, the GNU C compiler supports named address spaces as
+defined in the N1275 draft of ISO/IEC DTR 18037.  Support for named
+address spaces in GCC will evolve as the draft technical report changes.
+Calling conventions for any target might also change.  At present, only
+the SPU target supports other address spaces.  On the SPU target, for
+example, variables may be declared as belonging to another address space
+by qualifying the type with the `__ea' address space identifier:
+
+     extern int __ea i;
+
+ When the variable `i' is accessed, the compiler will generate special
+code to access this variable.  It may use runtime library support, or
+generate special machine instructions to access that address space.
+
+ The `__ea' identifier may be used exactly like any other C type
+qualifier (e.g., `const' or `volatile').  See the N1275 document for
+more details.
+
+
+File: gcc.info,  Node: Zero Length,  Next: Variable Length,  Prev: Named Address Spaces,  Up: C Extensions
+
+6.16 Arrays of Length Zero
+==========================
+
+Zero-length arrays are allowed in GNU C.  They are very useful as the
+last element of a structure which is really a header for a
+variable-length object:
+
+     struct line {
+       int length;
+       char contents[0];
+     };
+
+     struct line *thisline = (struct line *)
+       malloc (sizeof (struct line) + this_length);
+     thisline->length = this_length;
+
+ In ISO C90, you would have to give `contents' a length of 1, which
+means either you waste space or complicate the argument to `malloc'.
+
+ In ISO C99, you would use a "flexible array member", which is slightly
+different in syntax and semantics:
+
+   * Flexible array members are written as `contents[]' without the `0'.
+
+   * Flexible array members have incomplete type, and so the `sizeof'
+     operator may not be applied.  As a quirk of the original
+     implementation of zero-length arrays, `sizeof' evaluates to zero.
+
+   * Flexible array members may only appear as the last member of a
+     `struct' that is otherwise non-empty.
+
+   * A structure containing a flexible array member, or a union
+     containing such a structure (possibly recursively), may not be a
+     member of a structure or an element of an array.  (However, these
+     uses are permitted by GCC as extensions.)
+
+ GCC versions before 3.0 allowed zero-length arrays to be statically
+initialized, as if they were flexible arrays.  In addition to those
+cases that were useful, it also allowed initializations in situations
+that would corrupt later data.  Non-empty initialization of zero-length
+arrays is now treated like any case where there are more initializer
+elements than the array holds, in that a suitable warning about "excess
+elements in array" is given, and the excess elements (all of them, in
+this case) are ignored.
+
+ Instead GCC allows static initialization of flexible array members.
+This is equivalent to defining a new structure containing the original
+structure followed by an array of sufficient size to contain the data.
+I.e. in the following, `f1' is constructed as if it were declared like
+`f2'.
+
+     struct f1 {
+       int x; int y[];
+     } f1 = { 1, { 2, 3, 4 } };
+
+     struct f2 {
+       struct f1 f1; int data[3];
+     } f2 = { { 1 }, { 2, 3, 4 } };
+
+The convenience of this extension is that `f1' has the desired type,
+eliminating the need to consistently refer to `f2.f1'.
+
+ This has symmetry with normal static arrays, in that an array of
+unknown size is also written with `[]'.
+
+ Of course, this extension only makes sense if the extra data comes at
+the end of a top-level object, as otherwise we would be overwriting
+data at subsequent offsets.  To avoid undue complication and confusion
+with initialization of deeply nested arrays, we simply disallow any
+non-empty initialization except when the structure is the top-level
+object.  For example:
+
+     struct foo { int x; int y[]; };
+     struct bar { struct foo z; };
+
+     struct foo a = { 1, { 2, 3, 4 } };        // Valid.
+     struct bar b = { { 1, { 2, 3, 4 } } };    // Invalid.
+     struct bar c = { { 1, { } } };            // Valid.
+     struct foo d[1] = { { 1 { 2, 3, 4 } } };  // Invalid.
+
+
+File: gcc.info,  Node: Empty Structures,  Next: Variadic Macros,  Prev: Variable Length,  Up: C Extensions
+
+6.17 Structures With No Members
+===============================
+
+GCC permits a C structure to have no members:
+
+     struct empty {
+     };
+
+ The structure will have size zero.  In C++, empty structures are part
+of the language.  G++ treats empty structures as if they had a single
+member of type `char'.
+
+
+File: gcc.info,  Node: Variable Length,  Next: Empty Structures,  Prev: Zero Length,  Up: C Extensions
+
+6.18 Arrays of Variable Length
+==============================
+
+Variable-length automatic arrays are allowed in ISO C99, and as an
+extension GCC accepts them in C90 mode and in C++.  (However, GCC's
+implementation of variable-length arrays does not yet conform in detail
+to the ISO C99 standard.)  These arrays are declared like any other
+automatic arrays, but with a length that is not a constant expression.
+The storage is allocated at the point of declaration and deallocated
+when the brace-level is exited.  For example:
+
+     FILE *
+     concat_fopen (char *s1, char *s2, char *mode)
+     {
+       char str[strlen (s1) + strlen (s2) + 1];
+       strcpy (str, s1);
+       strcat (str, s2);
+       return fopen (str, mode);
+     }
+
+ Jumping or breaking out of the scope of the array name deallocates the
+storage.  Jumping into the scope is not allowed; you get an error
+message for it.
+
+ You can use the function `alloca' to get an effect much like
+variable-length arrays.  The function `alloca' is available in many
+other C implementations (but not in all).  On the other hand,
+variable-length arrays are more elegant.
+
+ There are other differences between these two methods.  Space allocated
+with `alloca' exists until the containing _function_ returns.  The
+space for a variable-length array is deallocated as soon as the array
+name's scope ends.  (If you use both variable-length arrays and
+`alloca' in the same function, deallocation of a variable-length array
+will also deallocate anything more recently allocated with `alloca'.)
+
+ You can also use variable-length arrays as arguments to functions:
+
+     struct entry
+     tester (int len, char data[len][len])
+     {
+       /* ... */
+     }
+
+ The length of an array is computed once when the storage is allocated
+and is remembered for the scope of the array in case you access it with
+`sizeof'.
+
+ If you want to pass the array first and the length afterward, you can
+use a forward declaration in the parameter list--another GNU extension.
+
+     struct entry
+     tester (int len; char data[len][len], int len)
+     {
+       /* ... */
+     }
+
+ The `int len' before the semicolon is a "parameter forward
+declaration", and it serves the purpose of making the name `len' known
+when the declaration of `data' is parsed.
+
+ You can write any number of such parameter forward declarations in the
+parameter list.  They can be separated by commas or semicolons, but the
+last one must end with a semicolon, which is followed by the "real"
+parameter declarations.  Each forward declaration must match a "real"
+declaration in parameter name and data type.  ISO C99 does not support
+parameter forward declarations.
+
+
+File: gcc.info,  Node: Variadic Macros,  Next: Escaped Newlines,  Prev: Empty Structures,  Up: C Extensions
+
+6.19 Macros with a Variable Number of Arguments.
+================================================
+
+In the ISO C standard of 1999, a macro can be declared to accept a
+variable number of arguments much as a function can.  The syntax for
+defining the macro is similar to that of a function.  Here is an
+example:
+
+     #define debug(format, ...) fprintf (stderr, format, __VA_ARGS__)
+
+ Here `...' is a "variable argument".  In the invocation of such a
+macro, it represents the zero or more tokens until the closing
+parenthesis that ends the invocation, including any commas.  This set of
+tokens replaces the identifier `__VA_ARGS__' in the macro body wherever
+it appears.  See the CPP manual for more information.
+
+ GCC has long supported variadic macros, and used a different syntax
+that allowed you to give a name to the variable arguments just like any
+other argument.  Here is an example:
+
+     #define debug(format, args...) fprintf (stderr, format, args)
+
+ This is in all ways equivalent to the ISO C example above, but arguably
+more readable and descriptive.
+
+ GNU CPP has two further variadic macro extensions, and permits them to
+be used with either of the above forms of macro definition.
+
+ In standard C, you are not allowed to leave the variable argument out
+entirely; but you are allowed to pass an empty argument.  For example,
+this invocation is invalid in ISO C, because there is no comma after
+the string:
+
+     debug ("A message")
+
+ GNU CPP permits you to completely omit the variable arguments in this
+way.  In the above examples, the compiler would complain, though since
+the expansion of the macro still has the extra comma after the format
+string.
+
+ To help solve this problem, CPP behaves specially for variable
+arguments used with the token paste operator, `##'.  If instead you
+write
+
+     #define debug(format, ...) fprintf (stderr, format, ## __VA_ARGS__)
+
+ and if the variable arguments are omitted or empty, the `##' operator
+causes the preprocessor to remove the comma before it.  If you do
+provide some variable arguments in your macro invocation, GNU CPP does
+not complain about the paste operation and instead places the variable
+arguments after the comma.  Just like any other pasted macro argument,
+these arguments are not macro expanded.
+
+
+File: gcc.info,  Node: Escaped Newlines,  Next: Subscripting,  Prev: Variadic Macros,  Up: C Extensions
+
+6.20 Slightly Looser Rules for Escaped Newlines
+===============================================
+
+Recently, the preprocessor has relaxed its treatment of escaped
+newlines.  Previously, the newline had to immediately follow a
+backslash.  The current implementation allows whitespace in the form of
+spaces, horizontal and vertical tabs, and form feeds between the
+backslash and the subsequent newline.  The preprocessor issues a
+warning, but treats it as a valid escaped newline and combines the two
+lines to form a single logical line.  This works within comments and
+tokens, as well as between tokens.  Comments are _not_ treated as
+whitespace for the purposes of this relaxation, since they have not yet
+been replaced with spaces.
+
+
+File: gcc.info,  Node: Subscripting,  Next: Pointer Arith,  Prev: Escaped Newlines,  Up: C Extensions
+
+6.21 Non-Lvalue Arrays May Have Subscripts
+==========================================
+
+In ISO C99, arrays that are not lvalues still decay to pointers, and
+may be subscripted, although they may not be modified or used after the
+next sequence point and the unary `&' operator may not be applied to
+them.  As an extension, GCC allows such arrays to be subscripted in C90
+mode, though otherwise they do not decay to pointers outside C99 mode.
+For example, this is valid in GNU C though not valid in C90:
+
+     struct foo {int a[4];};
+
+     struct foo f();
+
+     bar (int index)
+     {
+       return f().a[index];
+     }
+
+
+File: gcc.info,  Node: Pointer Arith,  Next: Initializers,  Prev: Subscripting,  Up: C Extensions
+
+6.22 Arithmetic on `void'- and Function-Pointers
+================================================
+
+In GNU C, addition and subtraction operations are supported on pointers
+to `void' and on pointers to functions.  This is done by treating the
+size of a `void' or of a function as 1.
+
+ A consequence of this is that `sizeof' is also allowed on `void' and
+on function types, and returns 1.
+
+ The option `-Wpointer-arith' requests a warning if these extensions
+are used.
+
+
+File: gcc.info,  Node: Initializers,  Next: Compound Literals,  Prev: Pointer Arith,  Up: C Extensions
+
+6.23 Non-Constant Initializers
+==============================
+
+As in standard C++ and ISO C99, the elements of an aggregate
+initializer for an automatic variable are not required to be constant
+expressions in GNU C.  Here is an example of an initializer with
+run-time varying elements:
+
+     foo (float f, float g)
+     {
+       float beat_freqs[2] = { f-g, f+g };
+       /* ... */
+     }
+
+
+File: gcc.info,  Node: Compound Literals,  Next: Designated Inits,  Prev: Initializers,  Up: C Extensions
+
+6.24 Compound Literals
+======================
+
+ISO C99 supports compound literals.  A compound literal looks like a
+cast containing an initializer.  Its value is an object of the type
+specified in the cast, containing the elements specified in the
+initializer; it is an lvalue.  As an extension, GCC supports compound
+literals in C90 mode and in C++.
+
+ Usually, the specified type is a structure.  Assume that `struct foo'
+and `structure' are declared as shown:
+
+     struct foo {int a; char b[2];} structure;
+
+Here is an example of constructing a `struct foo' with a compound
+literal:
+
+     structure = ((struct foo) {x + y, 'a', 0});
+
+This is equivalent to writing the following:
+
+     {
+       struct foo temp = {x + y, 'a', 0};
+       structure = temp;
+     }
+
+ You can also construct an array.  If all the elements of the compound
+literal are (made up of) simple constant expressions, suitable for use
+in initializers of objects of static storage duration, then the compound
+literal can be coerced to a pointer to its first element and used in
+such an initializer, as shown here:
+
+     char **foo = (char *[]) { "x", "y", "z" };
+
+ Compound literals for scalar types and union types are is also
+allowed, but then the compound literal is equivalent to a cast.
+
+ As a GNU extension, GCC allows initialization of objects with static
+storage duration by compound literals (which is not possible in ISO
+C99, because the initializer is not a constant).  It is handled as if
+the object was initialized only with the bracket enclosed list if the
+types of the compound literal and the object match.  The initializer
+list of the compound literal must be constant.  If the object being
+initialized has array type of unknown size, the size is determined by
+compound literal size.
+
+     static struct foo x = (struct foo) {1, 'a', 'b'};
+     static int y[] = (int []) {1, 2, 3};
+     static int z[] = (int [3]) {1};
+
+The above lines are equivalent to the following:
+     static struct foo x = {1, 'a', 'b'};
+     static int y[] = {1, 2, 3};
+     static int z[] = {1, 0, 0};
+
+
+File: gcc.info,  Node: Designated Inits,  Next: Cast to Union,  Prev: Compound Literals,  Up: C Extensions
+
+6.25 Designated Initializers
+============================
+
+Standard C90 requires the elements of an initializer to appear in a
+fixed order, the same as the order of the elements in the array or
+structure being initialized.
+
+ In ISO C99 you can give the elements in any order, specifying the array
+indices or structure field names they apply to, and GNU C allows this as
+an extension in C90 mode as well.  This extension is not implemented in
+GNU C++.
+
+ To specify an array index, write `[INDEX] =' before the element value.
+For example,
+
+     int a[6] = { [4] = 29, [2] = 15 };
+
+is equivalent to
+
+     int a[6] = { 0, 0, 15, 0, 29, 0 };
+
+The index values must be constant expressions, even if the array being
+initialized is automatic.
+
+ An alternative syntax for this which has been obsolete since GCC 2.5
+but GCC still accepts is to write `[INDEX]' before the element value,
+with no `='.
+
+ To initialize a range of elements to the same value, write `[FIRST ...
+LAST] = VALUE'.  This is a GNU extension.  For example,
+
+     int widths[] = { [0 ... 9] = 1, [10 ... 99] = 2, [100] = 3 };
+
+If the value in it has side-effects, the side-effects will happen only
+once, not for each initialized field by the range initializer.
+
+Note that the length of the array is the highest value specified plus
+one.
+
+ In a structure initializer, specify the name of a field to initialize
+with `.FIELDNAME =' before the element value.  For example, given the
+following structure,
+
+     struct point { int x, y; };
+
+the following initialization
+
+     struct point p = { .y = yvalue, .x = xvalue };
+
+is equivalent to
+
+     struct point p = { xvalue, yvalue };
+
+ Another syntax which has the same meaning, obsolete since GCC 2.5, is
+`FIELDNAME:', as shown here:
+
+     struct point p = { y: yvalue, x: xvalue };
+
+ The `[INDEX]' or `.FIELDNAME' is known as a "designator".  You can
+also use a designator (or the obsolete colon syntax) when initializing
+a union, to specify which element of the union should be used.  For
+example,
+
+     union foo { int i; double d; };
+
+     union foo f = { .d = 4 };
+
+will convert 4 to a `double' to store it in the union using the second
+element.  By contrast, casting 4 to type `union foo' would store it
+into the union as the integer `i', since it is an integer.  (*Note Cast
+to Union::.)
+
+ You can combine this technique of naming elements with ordinary C
+initialization of successive elements.  Each initializer element that
+does not have a designator applies to the next consecutive element of
+the array or structure.  For example,
+
+     int a[6] = { [1] = v1, v2, [4] = v4 };
+
+is equivalent to
+
+     int a[6] = { 0, v1, v2, 0, v4, 0 };
+
+ Labeling the elements of an array initializer is especially useful
+when the indices are characters or belong to an `enum' type.  For
+example:
+
+     int whitespace[256]
+       = { [' '] = 1, ['\t'] = 1, ['\h'] = 1,
+           ['\f'] = 1, ['\n'] = 1, ['\r'] = 1 };
+
+ You can also write a series of `.FIELDNAME' and `[INDEX]' designators
+before an `=' to specify a nested subobject to initialize; the list is
+taken relative to the subobject corresponding to the closest
+surrounding brace pair.  For example, with the `struct point'
+declaration above:
+
+     struct point ptarray[10] = { [2].y = yv2, [2].x = xv2, [0].x = xv0 };
+
+If the same field is initialized multiple times, it will have value from
+the last initialization.  If any such overridden initialization has
+side-effect, it is unspecified whether the side-effect happens or not.
+Currently, GCC will discard them and issue a warning.
+
+
+File: gcc.info,  Node: Case Ranges,  Next: Mixed Declarations,  Prev: Cast to Union,  Up: C Extensions
+
+6.26 Case Ranges
+================
+
+You can specify a range of consecutive values in a single `case' label,
+like this:
+
+     case LOW ... HIGH:
+
+This has the same effect as the proper number of individual `case'
+labels, one for each integer value from LOW to HIGH, inclusive.
+
+ This feature is especially useful for ranges of ASCII character codes:
+
+     case 'A' ... 'Z':
+
+ *Be careful:* Write spaces around the `...', for otherwise it may be
+parsed wrong when you use it with integer values.  For example, write
+this:
+
+     case 1 ... 5:
+
+rather than this:
+
+     case 1...5:
+
+
+File: gcc.info,  Node: Cast to Union,  Next: Case Ranges,  Prev: Designated Inits,  Up: C Extensions
+
+6.27 Cast to a Union Type
+=========================
+
+A cast to union type is similar to other casts, except that the type
+specified is a union type.  You can specify the type either with `union
+TAG' or with a typedef name.  A cast to union is actually a constructor
+though, not a cast, and hence does not yield an lvalue like normal
+casts.  (*Note Compound Literals::.)
+
+ The types that may be cast to the union type are those of the members
+of the union.  Thus, given the following union and variables:
+
+     union foo { int i; double d; };
+     int x;
+     double y;
+
+both `x' and `y' can be cast to type `union foo'.
+
+ Using the cast as the right-hand side of an assignment to a variable of
+union type is equivalent to storing in a member of the union:
+
+     union foo u;
+     /* ... */
+     u = (union foo) x  ==  u.i = x
+     u = (union foo) y  ==  u.d = y
+
+ You can also use the union cast as a function argument:
+
+     void hack (union foo);
+     /* ... */
+     hack ((union foo) x);
+
+
+File: gcc.info,  Node: Mixed Declarations,  Next: Function Attributes,  Prev: Case Ranges,  Up: C Extensions
+
+6.28 Mixed Declarations and Code
+================================
+
+ISO C99 and ISO C++ allow declarations and code to be freely mixed
+within compound statements.  As an extension, GCC also allows this in
+C90 mode.  For example, you could do:
+
+     int i;
+     /* ... */
+     i++;
+     int j = i + 2;
+
+ Each identifier is visible from where it is declared until the end of
+the enclosing block.
+
+
+File: gcc.info,  Node: Function Attributes,  Next: Attribute Syntax,  Prev: Mixed Declarations,  Up: C Extensions
+
+6.29 Declaring Attributes of Functions
+======================================
+
+In GNU C, you declare certain things about functions called in your
+program which help the compiler optimize function calls and check your
+code more carefully.
+
+ The keyword `__attribute__' allows you to specify special attributes
+when making a declaration.  This keyword is followed by an attribute
+specification inside double parentheses.  The following attributes are
+currently defined for functions on all targets: `aligned',
+`alloc_size', `noreturn', `returns_twice', `noinline', `noclone',
+`always_inline', `flatten', `pure', `const', `nothrow', `sentinel',
+`format', `format_arg', `no_instrument_function', `section',
+`constructor', `destructor', `used', `unused', `deprecated', `weak',
+`malloc', `alias', `warn_unused_result', `nonnull', `gnu_inline',
+`externally_visible', `hot', `cold', `artificial', `error' and
+`warning'.  Several other attributes are defined for functions on
+particular target systems.  Other attributes, including `section' are
+supported for variables declarations (*note Variable Attributes::) and
+for types (*note Type Attributes::).
+
+ GCC plugins may provide their own attributes.
+
+ You may also specify attributes with `__' preceding and following each
+keyword.  This allows you to use them in header files without being
+concerned about a possible macro of the same name.  For example, you
+may use `__noreturn__' instead of `noreturn'.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`alias ("TARGET")'
+     The `alias' attribute causes the declaration to be emitted as an
+     alias for another symbol, which must be specified.  For instance,
+
+          void __f () { /* Do something. */; }
+          void f () __attribute__ ((weak, alias ("__f")));
+
+     defines `f' to be a weak alias for `__f'.  In C++, the mangled
+     name for the target must be used.  It is an error if `__f' is not
+     defined in the same translation unit.
+
+     Not all target machines support this attribute.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment for the function,
+     measured in bytes.
+
+     You cannot use this attribute to decrease the alignment of a
+     function, only to increase it.  However, when you explicitly
+     specify a function alignment this will override the effect of the
+     `-falign-functions' (*note Optimize Options::) option for this
+     function.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for functions to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  See your linker
+     documentation for further information.
+
+     The `aligned' attribute can also be used for variables and fields
+     (*note Variable Attributes::.)
+
+`alloc_size'
+     The `alloc_size' attribute is used to tell the compiler that the
+     function return value points to memory, where the size is given by
+     one or two of the functions parameters.  GCC uses this information
+     to improve the correctness of `__builtin_object_size'.
+
+     The function parameter(s) denoting the allocated size are
+     specified by one or two integer arguments supplied to the
+     attribute.  The allocated size is either the value of the single
+     function argument specified or the product of the two function
+     arguments specified.  Argument numbering starts at one.
+
+     For instance,
+
+          void* my_calloc(size_t, size_t) __attribute__((alloc_size(1,2)))
+          void my_realloc(void*, size_t) __attribute__((alloc_size(2)))
+
+     declares that my_calloc will return memory of the size given by
+     the product of parameter 1 and 2 and that my_realloc will return
+     memory of the size given by parameter 2.
+
+`always_inline'
+     Generally, functions are not inlined unless optimization is
+     specified.  For functions declared inline, this attribute inlines
+     the function even if no optimization level was specified.
+
+`gnu_inline'
+     This attribute should be used with a function which is also
+     declared with the `inline' keyword.  It directs GCC to treat the
+     function as if it were defined in gnu90 mode even when compiling
+     in C99 or gnu99 mode.
+
+     If the function is declared `extern', then this definition of the
+     function is used only for inlining.  In no case is the function
+     compiled as a standalone function, not even if you take its address
+     explicitly.  Such an address becomes an external reference, as if
+     you had only declared the function, and had not defined it.  This
+     has almost the effect of a macro.  The way to use this is to put a
+     function definition in a header file with this attribute, and put
+     another copy of the function, without `extern', in a library file.
+     The definition in the header file will cause most calls to the
+     function to be inlined.  If any uses of the function remain, they
+     will refer to the single copy in the library.  Note that the two
+     definitions of the functions need not be precisely the same,
+     although if they do not have the same effect your program may
+     behave oddly.
+
+     In C, if the function is neither `extern' nor `static', then the
+     function is compiled as a standalone function, as well as being
+     inlined where possible.
+
+     This is how GCC traditionally handled functions declared `inline'.
+     Since ISO C99 specifies a different semantics for `inline', this
+     function attribute is provided as a transition measure and as a
+     useful feature in its own right.  This attribute is available in
+     GCC 4.1.3 and later.  It is available if either of the
+     preprocessor macros `__GNUC_GNU_INLINE__' or
+     `__GNUC_STDC_INLINE__' are defined.  *Note An Inline Function is
+     As Fast As a Macro: Inline.
+
+     In C++, this attribute does not depend on `extern' in any way, but
+     it still requires the `inline' keyword to enable its special
+     behavior.
+
+`artificial'
+     This attribute is useful for small inline wrappers which if
+     possible should appear during debugging as a unit, depending on
+     the debug info format it will either mean marking the function as
+     artificial or using the caller location for all instructions
+     within the inlined body.
+
+`bank_switch'
+     When added to an interrupt handler with the M32C port, causes the
+     prologue and epilogue to use bank switching to preserve the
+     registers rather than saving them on the stack.
+
+`flatten'
+     Generally, inlining into a function is limited.  For a function
+     marked with this attribute, every call inside this function will
+     be inlined, if possible.  Whether the function itself is
+     considered for inlining depends on its size and the current
+     inlining parameters.
+
+`error ("MESSAGE")'
+     If this attribute is used on a function declaration and a call to
+     such a function is not eliminated through dead code elimination or
+     other optimizations, an error which will include MESSAGE will be
+     diagnosed.  This is useful for compile time checking, especially
+     together with `__builtin_constant_p' and inline functions where
+     checking the inline function arguments is not possible through
+     `extern char [(condition) ? 1 : -1];' tricks.  While it is
+     possible to leave the function undefined and thus invoke a link
+     failure, when using this attribute the problem will be diagnosed
+     earlier and with exact location of the call even in presence of
+     inline functions or when not emitting debugging information.
+
+`warning ("MESSAGE")'
+     If this attribute is used on a function declaration and a call to
+     such a function is not eliminated through dead code elimination or
+     other optimizations, a warning which will include MESSAGE will be
+     diagnosed.  This is useful for compile time checking, especially
+     together with `__builtin_constant_p' and inline functions.  While
+     it is possible to define the function with a message in
+     `.gnu.warning*' section, when using this attribute the problem
+     will be diagnosed earlier and with exact location of the call even
+     in presence of inline functions or when not emitting debugging
+     information.
+
+`cdecl'
+     On the Intel 386, the `cdecl' attribute causes the compiler to
+     assume that the calling function will pop off the stack space used
+     to pass arguments.  This is useful to override the effects of the
+     `-mrtd' switch.
+
+`const'
+     Many functions do not examine any values except their arguments,
+     and have no effects except the return value.  Basically this is
+     just slightly more strict class than the `pure' attribute below,
+     since function is not allowed to read global memory.
+
+     Note that a function that has pointer arguments and examines the
+     data pointed to must _not_ be declared `const'.  Likewise, a
+     function that calls a non-`const' function usually must not be
+     `const'.  It does not make sense for a `const' function to return
+     `void'.
+
+     The attribute `const' is not implemented in GCC versions earlier
+     than 2.5.  An alternative way to declare that a function has no
+     side effects, which works in the current version and in some older
+     versions, is as follows:
+
+          typedef int intfn ();
+
+          extern const intfn square;
+
+     This approach does not work in GNU C++ from 2.6.0 on, since the
+     language specifies that the `const' must be attached to the return
+     value.
+
+`constructor'
+`destructor'
+`constructor (PRIORITY)'
+`destructor (PRIORITY)'
+     The `constructor' attribute causes the function to be called
+     automatically before execution enters `main ()'.  Similarly, the
+     `destructor' attribute causes the function to be called
+     automatically after `main ()' has completed or `exit ()' has been
+     called.  Functions with these attributes are useful for
+     initializing data that will be used implicitly during the
+     execution of the program.
+
+     You may provide an optional integer priority to control the order
+     in which constructor and destructor functions are run.  A
+     constructor with a smaller priority number runs before a
+     constructor with a larger priority number; the opposite
+     relationship holds for destructors.  So, if you have a constructor
+     that allocates a resource and a destructor that deallocates the
+     same resource, both functions typically have the same priority.
+     The priorities for constructor and destructor functions are the
+     same as those specified for namespace-scope C++ objects (*note C++
+     Attributes::).
+
+     These attributes are not currently implemented for Objective-C.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the function is
+     used anywhere in the source file.  This is useful when identifying
+     functions that are expected to be removed in a future version of a
+     program.  The warning also includes the location of the declaration
+     of the deprecated function, to enable users to easily find further
+     information about why the function is deprecated, or what they
+     should do instead.  Note that the warnings only occurs for uses:
+
+          int old_fn () __attribute__ ((deprecated));
+          int old_fn ();
+          int (*fn_ptr)() = old_fn;
+
+     results in a warning on line 3 but not line 2.  The optional msg
+     argument, which must be a string, will be printed in the warning if
+     present.
+
+     The `deprecated' attribute can also be used for variables and
+     types (*note Variable Attributes::, *note Type Attributes::.)
+
+`disinterrupt'
+     On MeP targets, this attribute causes the compiler to emit
+     instructions to disable interrupts for the duration of the given
+     function.
+
+`dllexport'
+     On Microsoft Windows targets and Symbian OS targets the
+     `dllexport' attribute causes the compiler to provide a global
+     pointer to a pointer in a DLL, so that it can be referenced with
+     the `dllimport' attribute.  On Microsoft Windows targets, the
+     pointer name is formed by combining `_imp__' and the function or
+     variable name.
+
+     You can use `__declspec(dllexport)' as a synonym for
+     `__attribute__ ((dllexport))' for compatibility with other
+     compilers.
+
+     On systems that support the `visibility' attribute, this attribute
+     also implies "default" visibility.  It is an error to explicitly
+     specify any other visibility.
+
+     Currently, the `dllexport' attribute is ignored for inlined
+     functions, unless the `-fkeep-inline-functions' flag has been
+     used.  The attribute is also ignored for undefined symbols.
+
+     When applied to C++ classes, the attribute marks defined
+     non-inlined member functions and static data members as exports.
+     Static consts initialized in-class are not marked unless they are
+     also defined out-of-class.
+
+     For Microsoft Windows targets there are alternative methods for
+     including the symbol in the DLL's export table such as using a
+     `.def' file with an `EXPORTS' section or, with GNU ld, using the
+     `--export-all' linker flag.
+
+`dllimport'
+     On Microsoft Windows and Symbian OS targets, the `dllimport'
+     attribute causes the compiler to reference a function or variable
+     via a global pointer to a pointer that is set up by the DLL
+     exporting the symbol.  The attribute implies `extern'.  On
+     Microsoft Windows targets, the pointer name is formed by combining
+     `_imp__' and the function or variable name.
+
+     You can use `__declspec(dllimport)' as a synonym for
+     `__attribute__ ((dllimport))' for compatibility with other
+     compilers.
+
+     On systems that support the `visibility' attribute, this attribute
+     also implies "default" visibility.  It is an error to explicitly
+     specify any other visibility.
+
+     Currently, the attribute is ignored for inlined functions.  If the
+     attribute is applied to a symbol _definition_, an error is
+     reported.  If a symbol previously declared `dllimport' is later
+     defined, the attribute is ignored in subsequent references, and a
+     warning is emitted.  The attribute is also overridden by a
+     subsequent declaration as `dllexport'.
+
+     When applied to C++ classes, the attribute marks non-inlined
+     member functions and static data members as imports.  However, the
+     attribute is ignored for virtual methods to allow creation of
+     vtables using thunks.
+
+     On the SH Symbian OS target the `dllimport' attribute also has
+     another affect--it can cause the vtable and run-time type
+     information for a class to be exported.  This happens when the
+     class has a dllimport'ed constructor or a non-inline, non-pure
+     virtual function and, for either of those two conditions, the
+     class also has an inline constructor or destructor and has a key
+     function that is defined in the current translation unit.
+
+     For Microsoft Windows based targets the use of the `dllimport'
+     attribute on functions is not necessary, but provides a small
+     performance benefit by eliminating a thunk in the DLL.  The use of
+     the `dllimport' attribute on imported variables was required on
+     older versions of the GNU linker, but can now be avoided by
+     passing the `--enable-auto-import' switch to the GNU linker.  As
+     with functions, using the attribute for a variable eliminates a
+     thunk in the DLL.
+
+     One drawback to using this attribute is that a pointer to a
+     _variable_ marked as `dllimport' cannot be used as a constant
+     address. However, a pointer to a _function_ with the `dllimport'
+     attribute can be used as a constant initializer; in this case, the
+     address of a stub function in the import lib is referenced.  On
+     Microsoft Windows targets, the attribute can be disabled for
+     functions by setting the `-mnop-fun-dllimport' flag.
+
+`eightbit_data'
+     Use this attribute on the H8/300, H8/300H, and H8S to indicate
+     that the specified variable should be placed into the eight bit
+     data section.  The compiler will generate more efficient code for
+     certain operations on data in the eight bit data area.  Note the
+     eight bit data area is limited to 256 bytes of data.
+
+     You must use GAS and GLD from GNU binutils version 2.7 or later for
+     this attribute to work correctly.
+
+`exception_handler'
+     Use this attribute on the Blackfin to indicate that the specified
+     function is an exception handler.  The compiler will generate
+     function entry and exit sequences suitable for use in an exception
+     handler when this attribute is present.
+
+`externally_visible'
+     This attribute, attached to a global variable or function,
+     nullifies the effect of the `-fwhole-program' command-line option,
+     so the object remains visible outside the current compilation unit.
+
+`far'
+     On 68HC11 and 68HC12 the `far' attribute causes the compiler to
+     use a calling convention that takes care of switching memory banks
+     when entering and leaving a function.  This calling convention is
+     also the default when using the `-mlong-calls' option.
+
+     On 68HC12 the compiler will use the `call' and `rtc' instructions
+     to call and return from a function.
+
+     On 68HC11 the compiler will generate a sequence of instructions to
+     invoke a board-specific routine to switch the memory bank and call
+     the real function.  The board-specific routine simulates a `call'.
+     At the end of a function, it will jump to a board-specific routine
+     instead of using `rts'.  The board-specific return routine
+     simulates the `rtc'.
+
+     On MeP targets this causes the compiler to use a calling convention
+     which assumes the called function is too far away for the built-in
+     addressing modes.
+
+`fast_interrupt'
+     Use this attribute on the M32C and RX ports to indicate that the
+     specified function is a fast interrupt handler.  This is just like
+     the `interrupt' attribute, except that `freit' is used to return
+     instead of `reit'.
+
+`fastcall'
+     On the Intel 386, the `fastcall' attribute causes the compiler to
+     pass the first argument (if of integral type) in the register ECX
+     and the second argument (if of integral type) in the register EDX.
+     Subsequent and other typed arguments are passed on the stack.  The
+     called function will pop the arguments off the stack.  If the
+     number of arguments is variable all arguments are pushed on the
+     stack.
+
+`format (ARCHETYPE, STRING-INDEX, FIRST-TO-CHECK)'
+     The `format' attribute specifies that a function takes `printf',
+     `scanf', `strftime' or `strfmon' style arguments which should be
+     type-checked against a format string.  For example, the
+     declaration:
+
+          extern int
+          my_printf (void *my_object, const char *my_format, ...)
+                __attribute__ ((format (printf, 2, 3)));
+
+     causes the compiler to check the arguments in calls to `my_printf'
+     for consistency with the `printf' style format string argument
+     `my_format'.
+
+     The parameter ARCHETYPE determines how the format string is
+     interpreted, and should be `printf', `scanf', `strftime',
+     `gnu_printf', `gnu_scanf', `gnu_strftime' or `strfmon'.  (You can
+     also use `__printf__', `__scanf__', `__strftime__' or
+     `__strfmon__'.)  On MinGW targets, `ms_printf', `ms_scanf', and
+     `ms_strftime' are also present.  ARCHTYPE values such as `printf'
+     refer to the formats accepted by the system's C run-time library,
+     while `gnu_' values always refer to the formats accepted by the
+     GNU C Library.  On Microsoft Windows targets, `ms_' values refer
+     to the formats accepted by the `msvcrt.dll' library.  The
+     parameter STRING-INDEX specifies which argument is the format
+     string argument (starting from 1), while FIRST-TO-CHECK is the
+     number of the first argument to check against the format string.
+     For functions where the arguments are not available to be checked
+     (such as `vprintf'), specify the third parameter as zero.  In this
+     case the compiler only checks the format string for consistency.
+     For `strftime' formats, the third parameter is required to be zero.
+     Since non-static C++ methods have an implicit `this' argument, the
+     arguments of such methods should be counted from two, not one, when
+     giving values for STRING-INDEX and FIRST-TO-CHECK.
+
+     In the example above, the format string (`my_format') is the second
+     argument of the function `my_print', and the arguments to check
+     start with the third argument, so the correct parameters for the
+     format attribute are 2 and 3.
+
+     The `format' attribute allows you to identify your own functions
+     which take format strings as arguments, so that GCC can check the
+     calls to these functions for errors.  The compiler always (unless
+     `-ffreestanding' or `-fno-builtin' is used) checks formats for the
+     standard library functions `printf', `fprintf', `sprintf',
+     `scanf', `fscanf', `sscanf', `strftime', `vprintf', `vfprintf' and
+     `vsprintf' whenever such warnings are requested (using
+     `-Wformat'), so there is no need to modify the header file
+     `stdio.h'.  In C99 mode, the functions `snprintf', `vsnprintf',
+     `vscanf', `vfscanf' and `vsscanf' are also checked.  Except in
+     strictly conforming C standard modes, the X/Open function
+     `strfmon' is also checked as are `printf_unlocked' and
+     `fprintf_unlocked'.  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+     The target may provide additional types of format checks.  *Note
+     Format Checks Specific to Particular Target Machines: Target
+     Format Checks.
+
+`format_arg (STRING-INDEX)'
+     The `format_arg' attribute specifies that a function takes a format
+     string for a `printf', `scanf', `strftime' or `strfmon' style
+     function and modifies it (for example, to translate it into
+     another language), so the result can be passed to a `printf',
+     `scanf', `strftime' or `strfmon' style function (with the
+     remaining arguments to the format function the same as they would
+     have been for the unmodified string).  For example, the
+     declaration:
+
+          extern char *
+          my_dgettext (char *my_domain, const char *my_format)
+                __attribute__ ((format_arg (2)));
+
+     causes the compiler to check the arguments in calls to a `printf',
+     `scanf', `strftime' or `strfmon' type function, whose format
+     string argument is a call to the `my_dgettext' function, for
+     consistency with the format string argument `my_format'.  If the
+     `format_arg' attribute had not been specified, all the compiler
+     could tell in such calls to format functions would be that the
+     format string argument is not constant; this would generate a
+     warning when `-Wformat-nonliteral' is used, but the calls could
+     not be checked without the attribute.
+
+     The parameter STRING-INDEX specifies which argument is the format
+     string argument (starting from one).  Since non-static C++ methods
+     have an implicit `this' argument, the arguments of such methods
+     should be counted from two.
+
+     The `format-arg' attribute allows you to identify your own
+     functions which modify format strings, so that GCC can check the
+     calls to `printf', `scanf', `strftime' or `strfmon' type function
+     whose operands are a call to one of your own function.  The
+     compiler always treats `gettext', `dgettext', and `dcgettext' in
+     this manner except when strict ISO C support is requested by
+     `-ansi' or an appropriate `-std' option, or `-ffreestanding' or
+     `-fno-builtin' is used.  *Note Options Controlling C Dialect: C
+     Dialect Options.
+
+`function_vector'
+     Use this attribute on the H8/300, H8/300H, and H8S to indicate
+     that the specified function should be called through the function
+     vector.  Calling a function through the function vector will
+     reduce code size, however; the function vector has a limited size
+     (maximum 128 entries on the H8/300 and 64 entries on the H8/300H
+     and H8S) and shares space with the interrupt vector.
+
+     In SH2A target, this attribute declares a function to be called
+     using the TBR relative addressing mode.  The argument to this
+     attribute is the entry number of the same function in a vector
+     table containing all the TBR relative addressable functions.  For
+     the successful jump, register TBR should contain the start address
+     of this TBR relative vector table.  In the startup routine of the
+     user application, user needs to care of this TBR register
+     initialization.  The TBR relative vector table can have at max 256
+     function entries.  The jumps to these functions will be generated
+     using a SH2A specific, non delayed branch instruction JSR/N
+     @(disp8,TBR).  You must use GAS and GLD from GNU binutils version
+     2.7 or later for this attribute to work correctly.
+
+     Please refer the example of M16C target, to see the use of this
+     attribute while declaring a function,
+
+     In an application, for a function being called once, this
+     attribute will save at least 8 bytes of code; and if other
+     successive calls are being made to the same function, it will save
+     2 bytes of code per each of these calls.
+
+     On M16C/M32C targets, the `function_vector' attribute declares a
+     special page subroutine call function. Use of this attribute
+     reduces the code size by 2 bytes for each call generated to the
+     subroutine. The argument to the attribute is the vector number
+     entry from the special page vector table which contains the 16
+     low-order bits of the subroutine's entry address. Each vector
+     table has special page number (18 to 255) which are used in `jsrs'
+     instruction.  Jump addresses of the routines are generated by
+     adding 0x0F0000 (in case of M16C targets) or 0xFF0000 (in case of
+     M32C targets), to the 2 byte addresses set in the vector table.
+     Therefore you need to ensure that all the special page vector
+     routines should get mapped within the address range 0x0F0000 to
+     0x0FFFFF (for M16C) and 0xFF0000 to 0xFFFFFF (for M32C).
+
+     In the following example 2 bytes will be saved for each call to
+     function `foo'.
+
+          void foo (void) __attribute__((function_vector(0x18)));
+          void foo (void)
+          {
+          }
+
+          void bar (void)
+          {
+              foo();
+          }
+
+     If functions are defined in one file and are called in another
+     file, then be sure to write this declaration in both files.
+
+     This attribute is ignored for R8C target.
+
+`interrupt'
+     Use this attribute on the ARM, AVR, CRX, M32C, M32R/D, m68k, MeP,
+     MIPS, RX and Xstormy16 ports to indicate that the specified
+     function is an interrupt handler.  The compiler will generate
+     function entry and exit sequences suitable for use in an interrupt
+     handler when this attribute is present.
+
+     Note, interrupt handlers for the Blackfin, H8/300, H8/300H, H8S,
+     and SH processors can be specified via the `interrupt_handler'
+     attribute.
+
+     Note, on the AVR, interrupts will be enabled inside the function.
+
+     Note, for the ARM, you can specify the kind of interrupt to be
+     handled by adding an optional parameter to the interrupt attribute
+     like this:
+
+          void f () __attribute__ ((interrupt ("IRQ")));
+
+     Permissible values for this parameter are: IRQ, FIQ, SWI, ABORT
+     and UNDEF.
+
+     On ARMv7-M the interrupt type is ignored, and the attribute means
+     the function may be called with a word aligned stack pointer.
+
+     On MIPS targets, you can use the following attributes to modify
+     the behavior of an interrupt handler:
+    `use_shadow_register_set'
+          Assume that the handler uses a shadow register set, instead of
+          the main general-purpose registers.
+
+    `keep_interrupts_masked'
+          Keep interrupts masked for the whole function.  Without this
+          attribute, GCC tries to reenable interrupts for as much of
+          the function as it can.
+
+    `use_debug_exception_return'
+          Return using the `deret' instruction.  Interrupt handlers
+          that don't have this attribute return using `eret' instead.
+
+     You can use any combination of these attributes, as shown below:
+          void __attribute__ ((interrupt)) v0 ();
+          void __attribute__ ((interrupt, use_shadow_register_set)) v1 ();
+          void __attribute__ ((interrupt, keep_interrupts_masked)) v2 ();
+          void __attribute__ ((interrupt, use_debug_exception_return)) v3 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               keep_interrupts_masked)) v4 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               use_debug_exception_return)) v5 ();
+          void __attribute__ ((interrupt, keep_interrupts_masked,
+                               use_debug_exception_return)) v6 ();
+          void __attribute__ ((interrupt, use_shadow_register_set,
+                               keep_interrupts_masked,
+                               use_debug_exception_return)) v7 ();
+
+`interrupt_handler'
+     Use this attribute on the Blackfin, m68k, H8/300, H8/300H, H8S,
+     and SH to indicate that the specified function is an interrupt
+     handler.  The compiler will generate function entry and exit
+     sequences suitable for use in an interrupt handler when this
+     attribute is present.
+
+`interrupt_thread'
+     Use this attribute on fido, a subarchitecture of the m68k, to
+     indicate that the specified function is an interrupt handler that
+     is designed to run as a thread.  The compiler omits generate
+     prologue/epilogue sequences and replaces the return instruction
+     with a `sleep' instruction.  This attribute is available only on
+     fido.
+
+`isr'
+     Use this attribute on ARM to write Interrupt Service Routines.
+     This is an alias to the `interrupt' attribute above.
+
+`kspisusp'
+     When used together with `interrupt_handler', `exception_handler'
+     or `nmi_handler', code will be generated to load the stack pointer
+     from the USP register in the function prologue.
+
+`l1_text'
+     This attribute specifies a function to be placed into L1
+     Instruction SRAM. The function will be put into a specific section
+     named `.l1.text'.  With `-mfdpic', function calls with a such
+     function as the callee or caller will use inlined PLT.
+
+`l2'
+     On the Blackfin, this attribute specifies a function to be placed
+     into L2 SRAM. The function will be put into a specific section
+     named `.l1.text'. With `-mfdpic', callers of such functions will
+     use an inlined PLT.
+
+`long_call/short_call'
+     This attribute specifies how a particular function is called on
+     ARM.  Both attributes override the `-mlong-calls' (*note ARM
+     Options::) command line switch and `#pragma long_calls' settings.
+     The `long_call' attribute indicates that the function might be far
+     away from the call site and require a different (more expensive)
+     calling sequence.   The `short_call' attribute always places the
+     offset to the function from the call site into the `BL'
+     instruction directly.
+
+`longcall/shortcall'
+     On the Blackfin, RS/6000 and PowerPC, the `longcall' attribute
+     indicates that the function might be far away from the call site
+     and require a different (more expensive) calling sequence.  The
+     `shortcall' attribute indicates that the function is always close
+     enough for the shorter calling sequence to be used.  These
+     attributes override both the `-mlongcall' switch and, on the
+     RS/6000 and PowerPC, the `#pragma longcall' setting.
+
+     *Note RS/6000 and PowerPC Options::, for more information on
+     whether long calls are necessary.
+
+`long_call/near/far'
+     These attributes specify how a particular function is called on
+     MIPS.  The attributes override the `-mlong-calls' (*note MIPS
+     Options::) command-line switch.  The `long_call' and `far'
+     attributes are synonyms, and cause the compiler to always call the
+     function by first loading its address into a register, and then
+     using the contents of that register.  The `near' attribute has the
+     opposite effect; it specifies that non-PIC calls should be made
+     using the more efficient `jal' instruction.
+
+`malloc'
+     The `malloc' attribute is used to tell the compiler that a function
+     may be treated as if any non-`NULL' pointer it returns cannot
+     alias any other pointer valid when the function returns.  This
+     will often improve optimization.  Standard functions with this
+     property include `malloc' and `calloc'.  `realloc'-like functions
+     have this property as long as the old pointer is never referred to
+     (including comparing it to the new pointer) after the function
+     returns a non-`NULL' value.
+
+`mips16/nomips16'
+     On MIPS targets, you can use the `mips16' and `nomips16' function
+     attributes to locally select or turn off MIPS16 code generation.
+     A function with the `mips16' attribute is emitted as MIPS16 code,
+     while MIPS16 code generation is disabled for functions with the
+     `nomips16' attribute.  These attributes override the `-mips16' and
+     `-mno-mips16' options on the command line (*note MIPS Options::).
+
+     When compiling files containing mixed MIPS16 and non-MIPS16 code,
+     the preprocessor symbol `__mips16' reflects the setting on the
+     command line, not that within individual functions.  Mixed MIPS16
+     and non-MIPS16 code may interact badly with some GCC extensions
+     such as `__builtin_apply' (*note Constructing Calls::).
+
+`model (MODEL-NAME)'
+     On the M32R/D, use this attribute to set the addressability of an
+     object, and of the code generated for a function.  The identifier
+     MODEL-NAME is one of `small', `medium', or `large', representing
+     each of the code models.
+
+     Small model objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction), and are
+     callable with the `bl' instruction.
+
+     Medium model objects may live anywhere in the 32-bit address space
+     (the compiler will generate `seth/add3' instructions to load their
+     addresses), and are callable with the `bl' instruction.
+
+     Large model objects may live anywhere in the 32-bit address space
+     (the compiler will generate `seth/add3' instructions to load their
+     addresses), and may not be reachable with the `bl' instruction
+     (the compiler will generate the much slower `seth/add3/jl'
+     instruction sequence).
+
+     On IA-64, use this attribute to set the addressability of an
+     object.  At present, the only supported identifier for MODEL-NAME
+     is `small', indicating addressability via "small" (22-bit)
+     addresses (so that their addresses can be loaded with the `addl'
+     instruction).  Caveat: such addressing is by definition not
+     position independent and hence this attribute must not be used for
+     objects defined by shared libraries.
+
+`ms_abi/sysv_abi'
+     On 64-bit x86_64-*-* targets, you can use an ABI attribute to
+     indicate which calling convention should be used for a function.
+     The `ms_abi' attribute tells the compiler to use the Microsoft
+     ABI, while the `sysv_abi' attribute tells the compiler to use the
+     ABI used on GNU/Linux and other systems.  The default is to use
+     the Microsoft ABI when targeting Windows.  On all other systems,
+     the default is the AMD ABI.
+
+     Note, the `ms_abi' attribute for Windows targets currently requires
+     the `-maccumulate-outgoing-args' option.
+
+`ms_hook_prologue'
+     On 32 bit i[34567]86-*-* targets, you can use this function
+     attribute to make gcc generate the "hot-patching" function
+     prologue used in Win32 API functions in Microsoft Windows XP
+     Service Pack 2 and newer. This requires support for the swap
+     suffix in the assembler. (GNU Binutils 2.19.51 or later)
+
+`naked'
+     Use this attribute on the ARM, AVR, IP2K, RX and SPU ports to
+     indicate that the specified function does not need
+     prologue/epilogue sequences generated by the compiler.  It is up
+     to the programmer to provide these sequences. The only statements
+     that can be safely included in naked functions are `asm'
+     statements that do not have operands.  All other statements,
+     including declarations of local variables, `if' statements, and so
+     forth, should be avoided.  Naked functions should be used to
+     implement the body of an assembly function, while allowing the
+     compiler to construct the requisite function declaration for the
+     assembler.
+
+`near'
+     On 68HC11 and 68HC12 the `near' attribute causes the compiler to
+     use the normal calling convention based on `jsr' and `rts'.  This
+     attribute can be used to cancel the effect of the `-mlong-calls'
+     option.
+
+     On MeP targets this attribute causes the compiler to assume the
+     called function is close enough to use the normal calling
+     convention, overriding the `-mtf' command line option.
+
+`nesting'
+     Use this attribute together with `interrupt_handler',
+     `exception_handler' or `nmi_handler' to indicate that the function
+     entry code should enable nested interrupts or exceptions.
+
+`nmi_handler'
+     Use this attribute on the Blackfin to indicate that the specified
+     function is an NMI handler.  The compiler will generate function
+     entry and exit sequences suitable for use in an NMI handler when
+     this attribute is present.
+
+`no_instrument_function'
+     If `-finstrument-functions' is given, profiling function calls will
+     be generated at entry and exit of most user-compiled functions.
+     Functions with this attribute will not be so instrumented.
+
+`noinline'
+     This function attribute prevents a function from being considered
+     for inlining.  If the function does not have side-effects, there
+     are optimizations other than inlining that causes function calls
+     to be optimized away, although the function call is live.  To keep
+     such calls from being optimized away, put
+          asm ("");
+     (*note Extended Asm::) in the called function, to serve as a
+     special side-effect.
+
+`noclone'
+     This function attribute prevents a function from being considered
+     for cloning - a mechanism which produces specialized copies of
+     functions and which is (currently) performed by interprocedural
+     constant propagation.
+
+`nonnull (ARG-INDEX, ...)'
+     The `nonnull' attribute specifies that some function parameters
+     should be non-null pointers.  For instance, the declaration:
+
+          extern void *
+          my_memcpy (void *dest, const void *src, size_t len)
+                  __attribute__((nonnull (1, 2)));
+
+     causes the compiler to check that, in calls to `my_memcpy',
+     arguments DEST and SRC are non-null.  If the compiler determines
+     that a null pointer is passed in an argument slot marked as
+     non-null, and the `-Wnonnull' option is enabled, a warning is
+     issued.  The compiler may also choose to make optimizations based
+     on the knowledge that certain function arguments will not be null.
+
+     If no argument index list is given to the `nonnull' attribute, all
+     pointer arguments are marked as non-null.  To illustrate, the
+     following declaration is equivalent to the previous example:
+
+          extern void *
+          my_memcpy (void *dest, const void *src, size_t len)
+                  __attribute__((nonnull));
+
+`noreturn'
+     A few standard library functions, such as `abort' and `exit',
+     cannot return.  GCC knows this automatically.  Some programs define
+     their own functions that never return.  You can declare them
+     `noreturn' to tell the compiler this fact.  For example,
+
+          void fatal () __attribute__ ((noreturn));
+
+          void
+          fatal (/* ... */)
+          {
+            /* ... */ /* Print error message. */ /* ... */
+            exit (1);
+          }
+
+     The `noreturn' keyword tells the compiler to assume that `fatal'
+     cannot return.  It can then optimize without regard to what would
+     happen if `fatal' ever did return.  This makes slightly better
+     code.  More importantly, it helps avoid spurious warnings of
+     uninitialized variables.
+
+     The `noreturn' keyword does not affect the exceptional path when
+     that applies: a `noreturn'-marked function may still return to the
+     caller by throwing an exception or calling `longjmp'.
+
+     Do not assume that registers saved by the calling function are
+     restored before calling the `noreturn' function.
+
+     It does not make sense for a `noreturn' function to have a return
+     type other than `void'.
+
+     The attribute `noreturn' is not implemented in GCC versions
+     earlier than 2.5.  An alternative way to declare that a function
+     does not return, which works in the current version and in some
+     older versions, is as follows:
+
+          typedef void voidfn ();
+
+          volatile voidfn fatal;
+
+     This approach does not work in GNU C++.
+
+`nothrow'
+     The `nothrow' attribute is used to inform the compiler that a
+     function cannot throw an exception.  For example, most functions in
+     the standard C library can be guaranteed not to throw an exception
+     with the notable exceptions of `qsort' and `bsearch' that take
+     function pointer arguments.  The `nothrow' attribute is not
+     implemented in GCC versions earlier than 3.3.
+
+`optimize'
+     The `optimize' attribute is used to specify that a function is to
+     be compiled with different optimization options than specified on
+     the command line.  Arguments can either be numbers or strings.
+     Numbers are assumed to be an optimization level.  Strings that
+     begin with `O' are assumed to be an optimization option, while
+     other options are assumed to be used with a `-f' prefix.  You can
+     also use the `#pragma GCC optimize' pragma to set the optimization
+     options that affect more than one function.  *Note Function
+     Specific Option Pragmas::, for details about the `#pragma GCC
+     optimize' pragma.
+
+     This can be used for instance to have frequently executed functions
+     compiled with more aggressive optimization options that produce
+     faster and larger code, while other functions can be called with
+     less aggressive options.
+
+`pcs'
+     The `pcs' attribute can be used to control the calling convention
+     used for a function on ARM.  The attribute takes an argument that
+     specifies the calling convention to use.
+
+     When compiling using the AAPCS ABI (or a variant of that) then
+     valid values for the argument are `"aapcs"' and `"aapcs-vfp"'.  In
+     order to use a variant other than `"aapcs"' then the compiler must
+     be permitted to use the appropriate co-processor registers (i.e.,
+     the VFP registers must be available in order to use `"aapcs-vfp"').
+     For example,
+
+          /* Argument passed in r0, and result returned in r0+r1.  */
+          double f2d (float) __attribute__((pcs("aapcs")));
+
+     Variadic functions always use the `"aapcs"' calling convention and
+     the compiler will reject attempts to specify an alternative.
+
+`pure'
+     Many functions have no effects except the return value and their
+     return value depends only on the parameters and/or global
+     variables.  Such a function can be subject to common subexpression
+     elimination and loop optimization just as an arithmetic operator
+     would be.  These functions should be declared with the attribute
+     `pure'.  For example,
+
+          int square (int) __attribute__ ((pure));
+
+     says that the hypothetical function `square' is safe to call fewer
+     times than the program says.
+
+     Some of common examples of pure functions are `strlen' or `memcmp'.
+     Interesting non-pure functions are functions with infinite loops
+     or those depending on volatile memory or other system resource,
+     that may change between two consecutive calls (such as `feof' in a
+     multithreading environment).
+
+     The attribute `pure' is not implemented in GCC versions earlier
+     than 2.96.
+
+`hot'
+     The `hot' attribute is used to inform the compiler that a function
+     is a hot spot of the compiled program.  The function is optimized
+     more aggressively and on many target it is placed into special
+     subsection of the text section so all hot functions appears close
+     together improving locality.
+
+     When profile feedback is available, via `-fprofile-use', hot
+     functions are automatically detected and this attribute is ignored.
+
+     The `hot' attribute is not implemented in GCC versions earlier
+     than 4.3.
+
+`cold'
+     The `cold' attribute is used to inform the compiler that a
+     function is unlikely executed.  The function is optimized for size
+     rather than speed and on many targets it is placed into special
+     subsection of the text section so all cold functions appears close
+     together improving code locality of non-cold parts of program.
+     The paths leading to call of cold functions within code are marked
+     as unlikely by the branch prediction mechanism. It is thus useful
+     to mark functions used to handle unlikely conditions, such as
+     `perror', as cold to improve optimization of hot functions that do
+     call marked functions in rare occasions.
+
+     When profile feedback is available, via `-fprofile-use', hot
+     functions are automatically detected and this attribute is ignored.
+
+     The `cold' attribute is not implemented in GCC versions earlier
+     than 4.3.
+
+`regparm (NUMBER)'
+     On the Intel 386, the `regparm' attribute causes the compiler to
+     pass arguments number one to NUMBER if they are of integral type
+     in registers EAX, EDX, and ECX instead of on the stack.  Functions
+     that take a variable number of arguments will continue to be
+     passed all of their arguments on the stack.
+
+     Beware that on some ELF systems this attribute is unsuitable for
+     global functions in shared libraries with lazy binding (which is
+     the default).  Lazy binding will send the first call via resolving
+     code in the loader, which might assume EAX, EDX and ECX can be
+     clobbered, as per the standard calling conventions.  Solaris 8 is
+     affected by this.  GNU systems with GLIBC 2.1 or higher, and
+     FreeBSD, are believed to be safe since the loaders there save EAX,
+     EDX and ECX.  (Lazy binding can be disabled with the linker or the
+     loader if desired, to avoid the problem.)
+
+`sseregparm'
+     On the Intel 386 with SSE support, the `sseregparm' attribute
+     causes the compiler to pass up to 3 floating point arguments in
+     SSE registers instead of on the stack.  Functions that take a
+     variable number of arguments will continue to pass all of their
+     floating point arguments on the stack.
+
+`force_align_arg_pointer'
+     On the Intel x86, the `force_align_arg_pointer' attribute may be
+     applied to individual function definitions, generating an alternate
+     prologue and epilogue that realigns the runtime stack if necessary.
+     This supports mixing legacy codes that run with a 4-byte aligned
+     stack with modern codes that keep a 16-byte stack for SSE
+     compatibility.
+
+`resbank'
+     On the SH2A target, this attribute enables the high-speed register
+     saving and restoration using a register bank for
+     `interrupt_handler' routines.  Saving to the bank is performed
+     automatically after the CPU accepts an interrupt that uses a
+     register bank.
+
+     The nineteen 32-bit registers comprising general register R0 to
+     R14, control register GBR, and system registers MACH, MACL, and PR
+     and the vector table address offset are saved into a register
+     bank.  Register banks are stacked in first-in last-out (FILO)
+     sequence.  Restoration from the bank is executed by issuing a
+     RESBANK instruction.
+
+`returns_twice'
+     The `returns_twice' attribute tells the compiler that a function
+     may return more than one time.  The compiler will ensure that all
+     registers are dead before calling such a function and will emit a
+     warning about the variables that may be clobbered after the second
+     return from the function.  Examples of such functions are `setjmp'
+     and `vfork'.  The `longjmp'-like counterpart of such function, if
+     any, might need to be marked with the `noreturn' attribute.
+
+`saveall'
+     Use this attribute on the Blackfin, H8/300, H8/300H, and H8S to
+     indicate that all registers except the stack pointer should be
+     saved in the prologue regardless of whether they are used or not.
+
+`section ("SECTION-NAME")'
+     Normally, the compiler places the code it generates in the `text'
+     section.  Sometimes, however, you need additional sections, or you
+     need certain particular functions to appear in special sections.
+     The `section' attribute specifies that a function lives in a
+     particular section.  For example, the declaration:
+
+          extern void foobar (void) __attribute__ ((section ("bar")));
+
+     puts the function `foobar' in the `bar' section.
+
+     Some file formats do not support arbitrary sections so the
+     `section' attribute is not available on all platforms.  If you
+     need to map the entire contents of a module to a particular
+     section, consider using the facilities of the linker instead.
+
+`sentinel'
+     This function attribute ensures that a parameter in a function
+     call is an explicit `NULL'.  The attribute is only valid on
+     variadic functions.  By default, the sentinel is located at
+     position zero, the last parameter of the function call.  If an
+     optional integer position argument P is supplied to the attribute,
+     the sentinel must be located at position P counting backwards from
+     the end of the argument list.
+
+          __attribute__ ((sentinel))
+          is equivalent to
+          __attribute__ ((sentinel(0)))
+
+     The attribute is automatically set with a position of 0 for the
+     built-in functions `execl' and `execlp'.  The built-in function
+     `execle' has the attribute set with a position of 1.
+
+     A valid `NULL' in this context is defined as zero with any pointer
+     type.  If your system defines the `NULL' macro with an integer type
+     then you need to add an explicit cast.  GCC replaces `stddef.h'
+     with a copy that redefines NULL appropriately.
+
+     The warnings for missing or incorrect sentinels are enabled with
+     `-Wformat'.
+
+`short_call'
+     See long_call/short_call.
+
+`shortcall'
+     See longcall/shortcall.
+
+`signal'
+     Use this attribute on the AVR to indicate that the specified
+     function is a signal handler.  The compiler will generate function
+     entry and exit sequences suitable for use in a signal handler when
+     this attribute is present.  Interrupts will be disabled inside the
+     function.
+
+`sp_switch'
+     Use this attribute on the SH to indicate an `interrupt_handler'
+     function should switch to an alternate stack.  It expects a string
+     argument that names a global variable holding the address of the
+     alternate stack.
+
+          void *alt_stack;
+          void f () __attribute__ ((interrupt_handler,
+                                    sp_switch ("alt_stack")));
+
+`stdcall'
+     On the Intel 386, the `stdcall' attribute causes the compiler to
+     assume that the called function will pop off the stack space used
+     to pass arguments, unless it takes a variable number of arguments.
+
+`syscall_linkage'
+     This attribute is used to modify the IA64 calling convention by
+     marking all input registers as live at all function exits.  This
+     makes it possible to restart a system call after an interrupt
+     without having to save/restore the input registers.  This also
+     prevents kernel data from leaking into application code.
+
+`target'
+     The `target' attribute is used to specify that a function is to be
+     compiled with different target options than specified on the
+     command line.  This can be used for instance to have functions
+     compiled with a different ISA (instruction set architecture) than
+     the default.  You can also use the `#pragma GCC target' pragma to
+     set more than one function to be compiled with specific target
+     options.  *Note Function Specific Option Pragmas::, for details
+     about the `#pragma GCC target' pragma.
+
+     For instance on a 386, you could compile one function with
+     `target("sse4.1,arch=core2")' and another with
+     `target("sse4a,arch=amdfam10")' that would be equivalent to
+     compiling the first function with `-msse4.1' and `-march=core2'
+     options, and the second function with `-msse4a' and
+     `-march=amdfam10' options.  It is up to the user to make sure that
+     a function is only invoked on a machine that supports the
+     particular ISA it was compiled for (for example by using `cpuid'
+     on 386 to determine what feature bits and architecture family are
+     used).
+
+          int core2_func (void) __attribute__ ((__target__ ("arch=core2")));
+          int sse3_func (void) __attribute__ ((__target__ ("sse3")));
+
+     On the 386, the following options are allowed:
+
+    `abm'
+    `no-abm'
+          Enable/disable the generation of the advanced bit
+          instructions.
+
+    `aes'
+    `no-aes'
+          Enable/disable the generation of the AES instructions.
+
+    `mmx'
+    `no-mmx'
+          Enable/disable the generation of the MMX instructions.
+
+    `pclmul'
+    `no-pclmul'
+          Enable/disable the generation of the PCLMUL instructions.
+
+    `popcnt'
+    `no-popcnt'
+          Enable/disable the generation of the POPCNT instruction.
+
+    `sse'
+    `no-sse'
+          Enable/disable the generation of the SSE instructions.
+
+    `sse2'
+    `no-sse2'
+          Enable/disable the generation of the SSE2 instructions.
+
+    `sse3'
+    `no-sse3'
+          Enable/disable the generation of the SSE3 instructions.
+
+    `sse4'
+    `no-sse4'
+          Enable/disable the generation of the SSE4 instructions (both
+          SSE4.1 and SSE4.2).
+
+    `sse4.1'
+    `no-sse4.1'
+          Enable/disable the generation of the sse4.1 instructions.
+
+    `sse4.2'
+    `no-sse4.2'
+          Enable/disable the generation of the sse4.2 instructions.
+
+    `sse4a'
+    `no-sse4a'
+          Enable/disable the generation of the SSE4A instructions.
+
+    `fma4'
+    `no-fma4'
+          Enable/disable the generation of the FMA4 instructions.
+
+    `xop'
+    `no-xop'
+          Enable/disable the generation of the XOP instructions.
+
+    `lwp'
+    `no-lwp'
+          Enable/disable the generation of the LWP instructions.
+
+    `ssse3'
+    `no-ssse3'
+          Enable/disable the generation of the SSSE3 instructions.
+
+    `cld'
+    `no-cld'
+          Enable/disable the generation of the CLD before string moves.
+
+    `fancy-math-387'
+    `no-fancy-math-387'
+          Enable/disable the generation of the `sin', `cos', and `sqrt'
+          instructions on the 387 floating point unit.
+
+    `fused-madd'
+    `no-fused-madd'
+          Enable/disable the generation of the fused multiply/add
+          instructions.
+
+    `ieee-fp'
+    `no-ieee-fp'
+          Enable/disable the generation of floating point that depends
+          on IEEE arithmetic.
+
+    `inline-all-stringops'
+    `no-inline-all-stringops'
+          Enable/disable inlining of string operations.
+
+    `inline-stringops-dynamically'
+    `no-inline-stringops-dynamically'
+          Enable/disable the generation of the inline code to do small
+          string operations and calling the library routines for large
+          operations.
+
+    `align-stringops'
+    `no-align-stringops'
+          Do/do not align destination of inlined string operations.
+
+    `recip'
+    `no-recip'
+          Enable/disable the generation of RCPSS, RCPPS, RSQRTSS and
+          RSQRTPS instructions followed an additional Newton-Raphson
+          step instead of doing a floating point division.
+
+    `arch=ARCH'
+          Specify the architecture to generate code for in compiling
+          the function.
+
+    `tune=TUNE'
+          Specify the architecture to tune for in compiling the
+          function.
+
+    `fpmath=FPMATH'
+          Specify which floating point unit to use.  The
+          `target("fpmath=sse,387")' option must be specified as
+          `target("fpmath=sse+387")' because the comma would separate
+          different options.
+
+     On the 386, you can use either multiple strings to specify multiple
+     options, or you can separate the option with a comma (`,').
+
+     On the 386, the inliner will not inline a function that has
+     different target options than the caller, unless the callee has a
+     subset of the target options of the caller.  For example a
+     function declared with `target("sse3")' can inline a function with
+     `target("sse2")', since `-msse3' implies `-msse2'.
+
+     The `target' attribute is not implemented in GCC versions earlier
+     than 4.4, and at present only the 386 uses it.
+
+`tiny_data'
+     Use this attribute on the H8/300H and H8S to indicate that the
+     specified variable should be placed into the tiny data section.
+     The compiler will generate more efficient code for loads and stores
+     on data in the tiny data section.  Note the tiny data area is
+     limited to slightly under 32kbytes of data.
+
+`trap_exit'
+     Use this attribute on the SH for an `interrupt_handler' to return
+     using `trapa' instead of `rte'.  This attribute expects an integer
+     argument specifying the trap number to be used.
+
+`unused'
+     This attribute, attached to a function, means that the function is
+     meant to be possibly unused.  GCC will not produce a warning for
+     this function.
+
+`used'
+     This attribute, attached to a function, means that code must be
+     emitted for the function even if it appears that the function is
+     not referenced.  This is useful, for example, when the function is
+     referenced only in inline assembly.
+
+`version_id'
+     This IA64 HP-UX attribute, attached to a global variable or
+     function, renames a symbol to contain a version string, thus
+     allowing for function level versioning.  HP-UX system header files
+     may use version level functioning for some system calls.
+
+          extern int foo () __attribute__((version_id ("20040821")));
+
+     Calls to FOO will be mapped to calls to FOO{20040821}.
+
+`visibility ("VISIBILITY_TYPE")'
+     This attribute affects the linkage of the declaration to which it
+     is attached.  There are four supported VISIBILITY_TYPE values:
+     default, hidden, protected or internal visibility.
+
+          void __attribute__ ((visibility ("protected")))
+          f () { /* Do something. */; }
+          int i __attribute__ ((visibility ("hidden")));
+
+     The possible values of VISIBILITY_TYPE correspond to the
+     visibility settings in the ELF gABI.
+
+    "default"
+          Default visibility is the normal case for the object file
+          format.  This value is available for the visibility attribute
+          to override other options that may change the assumed
+          visibility of entities.
+
+          On ELF, default visibility means that the declaration is
+          visible to other modules and, in shared libraries, means that
+          the declared entity may be overridden.
+
+          On Darwin, default visibility means that the declaration is
+          visible to other modules.
+
+          Default visibility corresponds to "external linkage" in the
+          language.
+
+    "hidden"
+          Hidden visibility indicates that the entity declared will
+          have a new form of linkage, which we'll call "hidden
+          linkage".  Two declarations of an object with hidden linkage
+          refer to the same object if they are in the same shared
+          object.
+
+    "internal"
+          Internal visibility is like hidden visibility, but with
+          additional processor specific semantics.  Unless otherwise
+          specified by the psABI, GCC defines internal visibility to
+          mean that a function is _never_ called from another module.
+          Compare this with hidden functions which, while they cannot
+          be referenced directly by other modules, can be referenced
+          indirectly via function pointers.  By indicating that a
+          function cannot be called from outside the module, GCC may
+          for instance omit the load of a PIC register since it is known
+          that the calling function loaded the correct value.
+
+    "protected"
+          Protected visibility is like default visibility except that it
+          indicates that references within the defining module will
+          bind to the definition in that module.  That is, the declared
+          entity cannot be overridden by another module.
+
+
+     All visibilities are supported on many, but not all, ELF targets
+     (supported when the assembler supports the `.visibility'
+     pseudo-op).  Default visibility is supported everywhere.  Hidden
+     visibility is supported on Darwin targets.
+
+     The visibility attribute should be applied only to declarations
+     which would otherwise have external linkage.  The attribute should
+     be applied consistently, so that the same entity should not be
+     declared with different settings of the attribute.
+
+     In C++, the visibility attribute applies to types as well as
+     functions and objects, because in C++ types have linkage.  A class
+     must not have greater visibility than its non-static data member
+     types and bases, and class members default to the visibility of
+     their class.  Also, a declaration without explicit visibility is
+     limited to the visibility of its type.
+
+     In C++, you can mark member functions and static member variables
+     of a class with the visibility attribute.  This is useful if you
+     know a particular method or static member variable should only be
+     used from one shared object; then you can mark it hidden while the
+     rest of the class has default visibility.  Care must be taken to
+     avoid breaking the One Definition Rule; for example, it is usually
+     not useful to mark an inline method as hidden without marking the
+     whole class as hidden.
+
+     A C++ namespace declaration can also have the visibility attribute.
+     This attribute applies only to the particular namespace body, not
+     to other definitions of the same namespace; it is equivalent to
+     using `#pragma GCC visibility' before and after the namespace
+     definition (*note Visibility Pragmas::).
+
+     In C++, if a template argument has limited visibility, this
+     restriction is implicitly propagated to the template instantiation.
+     Otherwise, template instantiations and specializations default to
+     the visibility of their template.
+
+     If both the template and enclosing class have explicit visibility,
+     the visibility from the template is used.
+
+`vliw'
+     On MeP, the `vliw' attribute tells the compiler to emit
+     instructions in VLIW mode instead of core mode.  Note that this
+     attribute is not allowed unless a VLIW coprocessor has been
+     configured and enabled through command line options.
+
+`warn_unused_result'
+     The `warn_unused_result' attribute causes a warning to be emitted
+     if a caller of the function with this attribute does not use its
+     return value.  This is useful for functions where not checking the
+     result is either a security problem or always a bug, such as
+     `realloc'.
+
+          int fn () __attribute__ ((warn_unused_result));
+          int foo ()
+          {
+            if (fn () < 0) return -1;
+            fn ();
+            return 0;
+          }
+
+     results in warning on line 5.
+
+`weak'
+     The `weak' attribute causes the declaration to be emitted as a weak
+     symbol rather than a global.  This is primarily useful in defining
+     library functions which can be overridden in user code, though it
+     can also be used with non-function declarations.  Weak symbols are
+     supported for ELF targets, and also for a.out targets when using
+     the GNU assembler and linker.
+
+`weakref'
+`weakref ("TARGET")'
+     The `weakref' attribute marks a declaration as a weak reference.
+     Without arguments, it should be accompanied by an `alias' attribute
+     naming the target symbol.  Optionally, the TARGET may be given as
+     an argument to `weakref' itself.  In either case, `weakref'
+     implicitly marks the declaration as `weak'.  Without a TARGET,
+     given as an argument to `weakref' or to `alias', `weakref' is
+     equivalent to `weak'.
+
+          static int x() __attribute__ ((weakref ("y")));
+          /* is equivalent to... */
+          static int x() __attribute__ ((weak, weakref, alias ("y")));
+          /* and to... */
+          static int x() __attribute__ ((weakref));
+          static int x() __attribute__ ((alias ("y")));
+
+     A weak reference is an alias that does not by itself require a
+     definition to be given for the target symbol.  If the target
+     symbol is only referenced through weak references, then the
+     becomes a `weak' undefined symbol.  If it is directly referenced,
+     however, then such strong references prevail, and a definition
+     will be required for the symbol, not necessarily in the same
+     translation unit.
+
+     The effect is equivalent to moving all references to the alias to a
+     separate translation unit, renaming the alias to the aliased
+     symbol, declaring it as weak, compiling the two separate
+     translation units and performing a reloadable link on them.
+
+     At present, a declaration to which `weakref' is attached can only
+     be `static'.
+
+
+ You can specify multiple attributes in a declaration by separating them
+by commas within the double parentheses or by immediately following an
+attribute declaration with another attribute declaration.
+
+ Some people object to the `__attribute__' feature, suggesting that ISO
+C's `#pragma' should be used instead.  At the time `__attribute__' was
+designed, there were two reasons for not doing this.
+
+  1. It is impossible to generate `#pragma' commands from a macro.
+
+  2. There is no telling what the same `#pragma' might mean in another
+     compiler.
+
+ These two reasons applied to almost any application that might have
+been proposed for `#pragma'.  It was basically a mistake to use
+`#pragma' for _anything_.
+
+ The ISO C99 standard includes `_Pragma', which now allows pragmas to
+be generated from macros.  In addition, a `#pragma GCC' namespace is
+now in use for GCC-specific pragmas.  However, it has been found
+convenient to use `__attribute__' to achieve a natural attachment of
+attributes to their corresponding declarations, whereas `#pragma GCC'
+is of use for constructs that do not naturally form part of the
+grammar.  *Note Miscellaneous Preprocessing Directives: (cpp)Other
+Directives.
+
+
+File: gcc.info,  Node: Attribute Syntax,  Next: Function Prototypes,  Prev: Function Attributes,  Up: C Extensions
+
+6.30 Attribute Syntax
+=====================
+
+This section describes the syntax with which `__attribute__' may be
+used, and the constructs to which attribute specifiers bind, for the C
+language.  Some details may vary for C++ and Objective-C.  Because of
+infelicities in the grammar for attributes, some forms described here
+may not be successfully parsed in all cases.
+
+ There are some problems with the semantics of attributes in C++.  For
+example, there are no manglings for attributes, although they may affect
+code generation, so problems may arise when attributed types are used in
+conjunction with templates or overloading.  Similarly, `typeid' does
+not distinguish between types with different attributes.  Support for
+attributes in C++ may be restricted in future to attributes on
+declarations only, but not on nested declarators.
+
+ *Note Function Attributes::, for details of the semantics of attributes
+applying to functions.  *Note Variable Attributes::, for details of the
+semantics of attributes applying to variables.  *Note Type Attributes::,
+for details of the semantics of attributes applying to structure, union
+and enumerated types.
+
+ An "attribute specifier" is of the form `__attribute__
+((ATTRIBUTE-LIST))'.  An "attribute list" is a possibly empty
+comma-separated sequence of "attributes", where each attribute is one
+of the following:
+
+   * Empty.  Empty attributes are ignored.
+
+   * A word (which may be an identifier such as `unused', or a reserved
+     word such as `const').
+
+   * A word, followed by, in parentheses, parameters for the attribute.
+     These parameters take one of the following forms:
+
+        * An identifier.  For example, `mode' attributes use this form.
+
+        * An identifier followed by a comma and a non-empty
+          comma-separated list of expressions.  For example, `format'
+          attributes use this form.
+
+        * A possibly empty comma-separated list of expressions.  For
+          example, `format_arg' attributes use this form with the list
+          being a single integer constant expression, and `alias'
+          attributes use this form with the list being a single string
+          constant.
+
+ An "attribute specifier list" is a sequence of one or more attribute
+specifiers, not separated by any other tokens.
+
+ In GNU C, an attribute specifier list may appear after the colon
+following a label, other than a `case' or `default' label.  The only
+attribute it makes sense to use after a label is `unused'.  This
+feature is intended for code generated by programs which contains labels
+that may be unused but which is compiled with `-Wall'.  It would not
+normally be appropriate to use in it human-written code, though it
+could be useful in cases where the code that jumps to the label is
+contained within an `#ifdef' conditional.  GNU C++ only permits
+attributes on labels if the attribute specifier is immediately followed
+by a semicolon (i.e., the label applies to an empty statement).  If the
+semicolon is missing, C++ label attributes are ambiguous, as it is
+permissible for a declaration, which could begin with an attribute
+list, to be labelled in C++.  Declarations cannot be labelled in C90 or
+C99, so the ambiguity does not arise there.
+
+ An attribute specifier list may appear as part of a `struct', `union'
+or `enum' specifier.  It may go either immediately after the `struct',
+`union' or `enum' keyword, or after the closing brace.  The former
+syntax is preferred.  Where attribute specifiers follow the closing
+brace, they are considered to relate to the structure, union or
+enumerated type defined, not to any enclosing declaration the type
+specifier appears in, and the type defined is not complete until after
+the attribute specifiers.
+
+ Otherwise, an attribute specifier appears as part of a declaration,
+counting declarations of unnamed parameters and type names, and relates
+to that declaration (which may be nested in another declaration, for
+example in the case of a parameter declaration), or to a particular
+declarator within a declaration.  Where an attribute specifier is
+applied to a parameter declared as a function or an array, it should
+apply to the function or array rather than the pointer to which the
+parameter is implicitly converted, but this is not yet correctly
+implemented.
+
+ Any list of specifiers and qualifiers at the start of a declaration may
+contain attribute specifiers, whether or not such a list may in that
+context contain storage class specifiers.  (Some attributes, however,
+are essentially in the nature of storage class specifiers, and only make
+sense where storage class specifiers may be used; for example,
+`section'.)  There is one necessary limitation to this syntax: the
+first old-style parameter declaration in a function definition cannot
+begin with an attribute specifier, because such an attribute applies to
+the function instead by syntax described below (which, however, is not
+yet implemented in this case).  In some other cases, attribute
+specifiers are permitted by this grammar but not yet supported by the
+compiler.  All attribute specifiers in this place relate to the
+declaration as a whole.  In the obsolescent usage where a type of `int'
+is implied by the absence of type specifiers, such a list of specifiers
+and qualifiers may be an attribute specifier list with no other
+specifiers or qualifiers.
+
+ At present, the first parameter in a function prototype must have some
+type specifier which is not an attribute specifier; this resolves an
+ambiguity in the interpretation of `void f(int (__attribute__((foo))
+x))', but is subject to change.  At present, if the parentheses of a
+function declarator contain only attributes then those attributes are
+ignored, rather than yielding an error or warning or implying a single
+parameter of type int, but this is subject to change.
+
+ An attribute specifier list may appear immediately before a declarator
+(other than the first) in a comma-separated list of declarators in a
+declaration of more than one identifier using a single list of
+specifiers and qualifiers.  Such attribute specifiers apply only to the
+identifier before whose declarator they appear.  For example, in
+
+     __attribute__((noreturn)) void d0 (void),
+         __attribute__((format(printf, 1, 2))) d1 (const char *, ...),
+          d2 (void)
+
+the `noreturn' attribute applies to all the functions declared; the
+`format' attribute only applies to `d1'.
+
+ An attribute specifier list may appear immediately before the comma,
+`=' or semicolon terminating the declaration of an identifier other
+than a function definition.  Such attribute specifiers apply to the
+declared object or function.  Where an assembler name for an object or
+function is specified (*note Asm Labels::), the attribute must follow
+the `asm' specification.
+
+ An attribute specifier list may, in future, be permitted to appear
+after the declarator in a function definition (before any old-style
+parameter declarations or the function body).
+
+ Attribute specifiers may be mixed with type qualifiers appearing inside
+the `[]' of a parameter array declarator, in the C99 construct by which
+such qualifiers are applied to the pointer to which the array is
+implicitly converted.  Such attribute specifiers apply to the pointer,
+not to the array, but at present this is not implemented and they are
+ignored.
+
+ An attribute specifier list may appear at the start of a nested
+declarator.  At present, there are some limitations in this usage: the
+attributes correctly apply to the declarator, but for most individual
+attributes the semantics this implies are not implemented.  When
+attribute specifiers follow the `*' of a pointer declarator, they may
+be mixed with any type qualifiers present.  The following describes the
+formal semantics of this syntax.  It will make the most sense if you
+are familiar with the formal specification of declarators in the ISO C
+standard.
+
+ Consider (as in C99 subclause 6.7.5 paragraph 4) a declaration `T D1',
+where `T' contains declaration specifiers that specify a type TYPE
+(such as `int') and `D1' is a declarator that contains an identifier
+IDENT.  The type specified for IDENT for derived declarators whose type
+does not include an attribute specifier is as in the ISO C standard.
+
+ If `D1' has the form `( ATTRIBUTE-SPECIFIER-LIST D )', and the
+declaration `T D' specifies the type "DERIVED-DECLARATOR-TYPE-LIST
+TYPE" for IDENT, then `T D1' specifies the type
+"DERIVED-DECLARATOR-TYPE-LIST ATTRIBUTE-SPECIFIER-LIST TYPE" for IDENT.
+
+ If `D1' has the form `* TYPE-QUALIFIER-AND-ATTRIBUTE-SPECIFIER-LIST
+D', and the declaration `T D' specifies the type
+"DERIVED-DECLARATOR-TYPE-LIST TYPE" for IDENT, then `T D1' specifies
+the type "DERIVED-DECLARATOR-TYPE-LIST
+TYPE-QUALIFIER-AND-ATTRIBUTE-SPECIFIER-LIST TYPE" for IDENT.
+
+ For example,
+
+     void (__attribute__((noreturn)) ****f) (void);
+
+specifies the type "pointer to pointer to pointer to pointer to
+non-returning function returning `void'".  As another example,
+
+     char *__attribute__((aligned(8))) *f;
+
+specifies the type "pointer to 8-byte-aligned pointer to `char'".  Note
+again that this does not work with most attributes; for example, the
+usage of `aligned' and `noreturn' attributes given above is not yet
+supported.
+
+ For compatibility with existing code written for compiler versions that
+did not implement attributes on nested declarators, some laxity is
+allowed in the placing of attributes.  If an attribute that only applies
+to types is applied to a declaration, it will be treated as applying to
+the type of that declaration.  If an attribute that only applies to
+declarations is applied to the type of a declaration, it will be treated
+as applying to that declaration; and, for compatibility with code
+placing the attributes immediately before the identifier declared, such
+an attribute applied to a function return type will be treated as
+applying to the function type, and such an attribute applied to an array
+element type will be treated as applying to the array type.  If an
+attribute that only applies to function types is applied to a
+pointer-to-function type, it will be treated as applying to the pointer
+target type; if such an attribute is applied to a function return type
+that is not a pointer-to-function type, it will be treated as applying
+to the function type.
+
+
+File: gcc.info,  Node: Function Prototypes,  Next: C++ Comments,  Prev: Attribute Syntax,  Up: C Extensions
+
+6.31 Prototypes and Old-Style Function Definitions
+==================================================
+
+GNU C extends ISO C to allow a function prototype to override a later
+old-style non-prototype definition.  Consider the following example:
+
+     /* Use prototypes unless the compiler is old-fashioned.  */
+     #ifdef __STDC__
+     #define P(x) x
+     #else
+     #define P(x) ()
+     #endif
+
+     /* Prototype function declaration.  */
+     int isroot P((uid_t));
+
+     /* Old-style function definition.  */
+     int
+     isroot (x)   /* ??? lossage here ??? */
+          uid_t x;
+     {
+       return x == 0;
+     }
+
+ Suppose the type `uid_t' happens to be `short'.  ISO C does not allow
+this example, because subword arguments in old-style non-prototype
+definitions are promoted.  Therefore in this example the function
+definition's argument is really an `int', which does not match the
+prototype argument type of `short'.
+
+ This restriction of ISO C makes it hard to write code that is portable
+to traditional C compilers, because the programmer does not know
+whether the `uid_t' type is `short', `int', or `long'.  Therefore, in
+cases like these GNU C allows a prototype to override a later old-style
+definition.  More precisely, in GNU C, a function prototype argument
+type overrides the argument type specified by a later old-style
+definition if the former type is the same as the latter type before
+promotion.  Thus in GNU C the above example is equivalent to the
+following:
+
+     int isroot (uid_t);
+
+     int
+     isroot (uid_t x)
+     {
+       return x == 0;
+     }
+
+GNU C++ does not support old-style function definitions, so this
+extension is irrelevant.
+
+
+File: gcc.info,  Node: C++ Comments,  Next: Dollar Signs,  Prev: Function Prototypes,  Up: C Extensions
+
+6.32 C++ Style Comments
+=======================
+
+In GNU C, you may use C++ style comments, which start with `//' and
+continue until the end of the line.  Many other C implementations allow
+such comments, and they are included in the 1999 C standard.  However,
+C++ style comments are not recognized if you specify an `-std' option
+specifying a version of ISO C before C99, or `-ansi' (equivalent to
+`-std=c90').
+
+
+File: gcc.info,  Node: Dollar Signs,  Next: Character Escapes,  Prev: C++ Comments,  Up: C Extensions
+
+6.33 Dollar Signs in Identifier Names
+=====================================
+
+In GNU C, you may normally use dollar signs in identifier names.  This
+is because many traditional C implementations allow such identifiers.
+However, dollar signs in identifiers are not supported on a few target
+machines, typically because the target assembler does not allow them.
+
+
+File: gcc.info,  Node: Character Escapes,  Next: Variable Attributes,  Prev: Dollar Signs,  Up: C Extensions
+
+6.34 The Character <ESC> in Constants
+=====================================
+
+You can use the sequence `\e' in a string or character constant to
+stand for the ASCII character <ESC>.
+
+
+File: gcc.info,  Node: Alignment,  Next: Inline,  Prev: Type Attributes,  Up: C Extensions
+
+6.35 Inquiring on Alignment of Types or Variables
+=================================================
+
+The keyword `__alignof__' allows you to inquire about how an object is
+aligned, or the minimum alignment usually required by a type.  Its
+syntax is just like `sizeof'.
+
+ For example, if the target machine requires a `double' value to be
+aligned on an 8-byte boundary, then `__alignof__ (double)' is 8.  This
+is true on many RISC machines.  On more traditional machine designs,
+`__alignof__ (double)' is 4 or even 2.
+
+ Some machines never actually require alignment; they allow reference
+to any data type even at an odd address.  For these machines,
+`__alignof__' reports the smallest alignment that GCC will give the
+data type, usually as mandated by the target ABI.
+
+ If the operand of `__alignof__' is an lvalue rather than a type, its
+value is the required alignment for its type, taking into account any
+minimum alignment specified with GCC's `__attribute__' extension (*note
+Variable Attributes::).  For example, after this declaration:
+
+     struct foo { int x; char y; } foo1;
+
+the value of `__alignof__ (foo1.y)' is 1, even though its actual
+alignment is probably 2 or 4, the same as `__alignof__ (int)'.
+
+ It is an error to ask for the alignment of an incomplete type.
+
+
+File: gcc.info,  Node: Variable Attributes,  Next: Type Attributes,  Prev: Character Escapes,  Up: C Extensions
+
+6.36 Specifying Attributes of Variables
+=======================================
+
+The keyword `__attribute__' allows you to specify special attributes of
+variables or structure fields.  This keyword is followed by an
+attribute specification inside double parentheses.  Some attributes are
+currently defined generically for variables.  Other attributes are
+defined for variables on particular target systems.  Other attributes
+are available for functions (*note Function Attributes::) and for types
+(*note Type Attributes::).  Other front ends might define more
+attributes (*note Extensions to the C++ Language: C++ Extensions.).
+
+ You may also specify attributes with `__' preceding and following each
+keyword.  This allows you to use them in header files without being
+concerned about a possible macro of the same name.  For example, you
+may use `__aligned__' instead of `aligned'.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment for the variable or
+     structure field, measured in bytes.  For example, the declaration:
+
+          int x __attribute__ ((aligned (16))) = 0;
+
+     causes the compiler to allocate the global variable `x' on a
+     16-byte boundary.  On a 68040, this could be used in conjunction
+     with an `asm' expression to access the `move16' instruction which
+     requires 16-byte aligned operands.
+
+     You can also specify the alignment of structure fields.  For
+     example, to create a double-word aligned `int' pair, you could
+     write:
+
+          struct foo { int x[2] __attribute__ ((aligned (8))); };
+
+     This is an alternative to creating a union with a `double' member
+     that forces the union to be double-word aligned.
+
+     As in the preceding examples, you can explicitly specify the
+     alignment (in bytes) that you wish the compiler to use for a given
+     variable or structure field.  Alternatively, you can leave out the
+     alignment factor and just ask the compiler to align a variable or
+     field to the default alignment for the target architecture you are
+     compiling for.  The default alignment is sufficient for all scalar
+     types, but may not be enough for all vector types on a target
+     which supports vector operations.  The default alignment is fixed
+     for a particular target ABI.
+
+     Gcc also provides a target specific macro `__BIGGEST_ALIGNMENT__',
+     which is the largest alignment ever used for any data type on the
+     target machine you are compiling for.  For example, you could
+     write:
+
+          short array[3] __attribute__ ((aligned (__BIGGEST_ALIGNMENT__)));
+
+     The compiler automatically sets the alignment for the declared
+     variable or field to `__BIGGEST_ALIGNMENT__'.  Doing this can
+     often make copy operations more efficient, because the compiler can
+     use whatever instructions copy the biggest chunks of memory when
+     performing copies to or from the variables or fields that you have
+     aligned this way.  Note that the value of `__BIGGEST_ALIGNMENT__'
+     may change depending on command line options.
+
+     When used on a struct, or struct member, the `aligned' attribute
+     can only increase the alignment; in order to decrease it, the
+     `packed' attribute must be specified as well.  When used as part
+     of a typedef, the `aligned' attribute can both increase and
+     decrease alignment, and specifying the `packed' attribute will
+     generate a warning.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for variables to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  If your linker is
+     only able to align variables up to a maximum of 8 byte alignment,
+     then specifying `aligned(16)' in an `__attribute__' will still
+     only provide you with 8 byte alignment.  See your linker
+     documentation for further information.
+
+     The `aligned' attribute can also be used for functions (*note
+     Function Attributes::.)
+
+`cleanup (CLEANUP_FUNCTION)'
+     The `cleanup' attribute runs a function when the variable goes out
+     of scope.  This attribute can only be applied to auto function
+     scope variables; it may not be applied to parameters or variables
+     with static storage duration.  The function must take one
+     parameter, a pointer to a type compatible with the variable.  The
+     return value of the function (if any) is ignored.
+
+     If `-fexceptions' is enabled, then CLEANUP_FUNCTION will be run
+     during the stack unwinding that happens during the processing of
+     the exception.  Note that the `cleanup' attribute does not allow
+     the exception to be caught, only to perform an action.  It is
+     undefined what happens if CLEANUP_FUNCTION does not return
+     normally.
+
+`common'
+`nocommon'
+     The `common' attribute requests GCC to place a variable in
+     "common" storage.  The `nocommon' attribute requests the
+     opposite--to allocate space for it directly.
+
+     These attributes override the default chosen by the `-fno-common'
+     and `-fcommon' flags respectively.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the variable is
+     used anywhere in the source file.  This is useful when identifying
+     variables that are expected to be removed in a future version of a
+     program.  The warning also includes the location of the declaration
+     of the deprecated variable, to enable users to easily find further
+     information about why the variable is deprecated, or what they
+     should do instead.  Note that the warning only occurs for uses:
+
+          extern int old_var __attribute__ ((deprecated));
+          extern int old_var;
+          int new_fn () { return old_var; }
+
+     results in a warning on line 3 but not line 2.  The optional msg
+     argument, which must be a string, will be printed in the warning if
+     present.
+
+     The `deprecated' attribute can also be used for functions and
+     types (*note Function Attributes::, *note Type Attributes::.)
+
+`mode (MODE)'
+     This attribute specifies the data type for the
+     declaration--whichever type corresponds to the mode MODE.  This in
+     effect lets you request an integer or floating point type
+     according to its width.
+
+     You may also specify a mode of `byte' or `__byte__' to indicate
+     the mode corresponding to a one-byte integer, `word' or `__word__'
+     for the mode of a one-word integer, and `pointer' or `__pointer__'
+     for the mode used to represent pointers.
+
+`packed'
+     The `packed' attribute specifies that a variable or structure field
+     should have the smallest possible alignment--one byte for a
+     variable, and one bit for a field, unless you specify a larger
+     value with the `aligned' attribute.
+
+     Here is a structure in which the field `x' is packed, so that it
+     immediately follows `a':
+
+          struct foo
+          {
+            char a;
+            int x[2] __attribute__ ((packed));
+          };
+
+     _Note:_ The 4.1, 4.2 and 4.3 series of GCC ignore the `packed'
+     attribute on bit-fields of type `char'.  This has been fixed in
+     GCC 4.4 but the change can lead to differences in the structure
+     layout.  See the documentation of `-Wpacked-bitfield-compat' for
+     more information.
+
+`section ("SECTION-NAME")'
+     Normally, the compiler places the objects it generates in sections
+     like `data' and `bss'.  Sometimes, however, you need additional
+     sections, or you need certain particular variables to appear in
+     special sections, for example to map to special hardware.  The
+     `section' attribute specifies that a variable (or function) lives
+     in a particular section.  For example, this small program uses
+     several specific section names:
+
+          struct duart a __attribute__ ((section ("DUART_A"))) = { 0 };
+          struct duart b __attribute__ ((section ("DUART_B"))) = { 0 };
+          char stack[10000] __attribute__ ((section ("STACK"))) = { 0 };
+          int init_data __attribute__ ((section ("INITDATA")));
+
+          main()
+          {
+            /* Initialize stack pointer */
+            init_sp (stack + sizeof (stack));
+
+            /* Initialize initialized data */
+            memcpy (&init_data, &data, &edata - &data);
+
+            /* Turn on the serial ports */
+            init_duart (&a);
+            init_duart (&b);
+          }
+
+     Use the `section' attribute with _global_ variables and not
+     _local_ variables, as shown in the example.
+
+     You may use the `section' attribute with initialized or
+     uninitialized global variables but the linker requires each object
+     be defined once, with the exception that uninitialized variables
+     tentatively go in the `common' (or `bss') section and can be
+     multiply "defined".  Using the `section' attribute will change
+     what section the variable goes into and may cause the linker to
+     issue an error if an uninitialized variable has multiple
+     definitions.  You can force a variable to be initialized with the
+     `-fno-common' flag or the `nocommon' attribute.
+
+     Some file formats do not support arbitrary sections so the
+     `section' attribute is not available on all platforms.  If you
+     need to map the entire contents of a module to a particular
+     section, consider using the facilities of the linker instead.
+
+`shared'
+     On Microsoft Windows, in addition to putting variable definitions
+     in a named section, the section can also be shared among all
+     running copies of an executable or DLL.  For example, this small
+     program defines shared data by putting it in a named section
+     `shared' and marking the section shareable:
+
+          int foo __attribute__((section ("shared"), shared)) = 0;
+
+          int
+          main()
+          {
+            /* Read and write foo.  All running
+               copies see the same value.  */
+            return 0;
+          }
+
+     You may only use the `shared' attribute along with `section'
+     attribute with a fully initialized global definition because of
+     the way linkers work.  See `section' attribute for more
+     information.
+
+     The `shared' attribute is only available on Microsoft Windows.
+
+`tls_model ("TLS_MODEL")'
+     The `tls_model' attribute sets thread-local storage model (*note
+     Thread-Local::) of a particular `__thread' variable, overriding
+     `-ftls-model=' command line switch on a per-variable basis.  The
+     TLS_MODEL argument should be one of `global-dynamic',
+     `local-dynamic', `initial-exec' or `local-exec'.
+
+     Not all targets support this attribute.
+
+`unused'
+     This attribute, attached to a variable, means that the variable is
+     meant to be possibly unused.  GCC will not produce a warning for
+     this variable.
+
+`used'
+     This attribute, attached to a variable, means that the variable
+     must be emitted even if it appears that the variable is not
+     referenced.
+
+`vector_size (BYTES)'
+     This attribute specifies the vector size for the variable,
+     measured in bytes.  For example, the declaration:
+
+          int foo __attribute__ ((vector_size (16)));
+
+     causes the compiler to set the mode for `foo', to be 16 bytes,
+     divided into `int' sized units.  Assuming a 32-bit int (a vector of
+     4 units of 4 bytes), the corresponding mode of `foo' will be V4SI.
+
+     This attribute is only applicable to integral and float scalars,
+     although arrays, pointers, and function return values are allowed
+     in conjunction with this construct.
+
+     Aggregates with this attribute are invalid, even if they are of
+     the same size as a corresponding scalar.  For example, the
+     declaration:
+
+          struct S { int a; };
+          struct S  __attribute__ ((vector_size (16))) foo;
+
+     is invalid even if the size of the structure is the same as the
+     size of the `int'.
+
+`selectany'
+     The `selectany' attribute causes an initialized global variable to
+     have link-once semantics.  When multiple definitions of the
+     variable are encountered by the linker, the first is selected and
+     the remainder are discarded.  Following usage by the Microsoft
+     compiler, the linker is told _not_ to warn about size or content
+     differences of the multiple definitions.
+
+     Although the primary usage of this attribute is for POD types, the
+     attribute can also be applied to global C++ objects that are
+     initialized by a constructor.  In this case, the static
+     initialization and destruction code for the object is emitted in
+     each translation defining the object, but the calls to the
+     constructor and destructor are protected by a link-once guard
+     variable.
+
+     The `selectany' attribute is only available on Microsoft Windows
+     targets.  You can use `__declspec (selectany)' as a synonym for
+     `__attribute__ ((selectany))' for compatibility with other
+     compilers.
+
+`weak'
+     The `weak' attribute is described in *note Function Attributes::.
+
+`dllimport'
+     The `dllimport' attribute is described in *note Function
+     Attributes::.
+
+`dllexport'
+     The `dllexport' attribute is described in *note Function
+     Attributes::.
+
+
+6.36.1 Blackfin Variable Attributes
+-----------------------------------
+
+Three attributes are currently defined for the Blackfin.
+
+`l1_data'
+`l1_data_A'
+`l1_data_B'
+     Use these attributes on the Blackfin to place the variable into L1
+     Data SRAM.  Variables with `l1_data' attribute will be put into
+     the specific section named `.l1.data'. Those with `l1_data_A'
+     attribute will be put into the specific section named
+     `.l1.data.A'. Those with `l1_data_B' attribute will be put into
+     the specific section named `.l1.data.B'.
+
+`l2'
+     Use this attribute on the Blackfin to place the variable into L2
+     SRAM.  Variables with `l2' attribute will be put into the specific
+     section named `.l2.data'.
+
+6.36.2 M32R/D Variable Attributes
+---------------------------------
+
+One attribute is currently defined for the M32R/D.
+
+`model (MODEL-NAME)'
+     Use this attribute on the M32R/D to set the addressability of an
+     object.  The identifier MODEL-NAME is one of `small', `medium', or
+     `large', representing each of the code models.
+
+     Small model objects live in the lower 16MB of memory (so that their
+     addresses can be loaded with the `ld24' instruction).
+
+     Medium and large model objects may live anywhere in the 32-bit
+     address space (the compiler will generate `seth/add3' instructions
+     to load their addresses).
+
+6.36.3 MeP Variable Attributes
+------------------------------
+
+The MeP target has a number of addressing modes and busses.  The `near'
+space spans the standard memory space's first 16 megabytes (24 bits).
+The `far' space spans the entire 32-bit memory space.  The `based'
+space is a 128 byte region in the memory space which is addressed
+relative to the `$tp' register.  The `tiny' space is a 65536 byte
+region relative to the `$gp' register.  In addition to these memory
+regions, the MeP target has a separate 16-bit control bus which is
+specified with `cb' attributes.
+
+`based'
+     Any variable with the `based' attribute will be assigned to the
+     `.based' section, and will be accessed with relative to the `$tp'
+     register.
+
+`tiny'
+     Likewise, the `tiny' attribute assigned variables to the `.tiny'
+     section, relative to the `$gp' register.
+
+`near'
+     Variables with the `near' attribute are assumed to have addresses
+     that fit in a 24-bit addressing mode.  This is the default for
+     large variables (`-mtiny=4' is the default) but this attribute can
+     override `-mtiny=' for small variables, or override `-ml'.
+
+`far'
+     Variables with the `far' attribute are addressed using a full
+     32-bit address.  Since this covers the entire memory space, this
+     allows modules to make no assumptions about where variables might
+     be stored.
+
+`io'
+`io (ADDR)'
+     Variables with the `io' attribute are used to address
+     memory-mapped peripherals.  If an address is specified, the
+     variable is assigned that address, else it is not assigned an
+     address (it is assumed some other module will assign an address).
+     Example:
+
+          int timer_count __attribute__((io(0x123)));
+
+`cb'
+`cb (ADDR)'
+     Variables with the `cb' attribute are used to access the control
+     bus, using special instructions.  `addr' indicates the control bus
+     address.  Example:
+
+          int cpu_clock __attribute__((cb(0x123)));
+
+
+6.36.4 i386 Variable Attributes
+-------------------------------
+
+Two attributes are currently defined for i386 configurations:
+`ms_struct' and `gcc_struct'
+
+`ms_struct'
+`gcc_struct'
+     If `packed' is used on a structure, or if bit-fields are used it
+     may be that the Microsoft ABI packs them differently than GCC
+     would normally pack them.  Particularly when moving packed data
+     between functions compiled with GCC and the native Microsoft
+     compiler (either via function call or as data in a file), it may
+     be necessary to access either format.
+
+     Currently `-m[no-]ms-bitfields' is provided for the Microsoft
+     Windows X86 compilers to match the native Microsoft compiler.
+
+     The Microsoft structure layout algorithm is fairly simple with the
+     exception of the bitfield packing:
+
+     The padding and alignment of members of structures and whether a
+     bit field can straddle a storage-unit boundary
+
+       1. Structure members are stored sequentially in the order in
+          which they are declared: the first member has the lowest
+          memory address and the last member the highest.
+
+       2. Every data object has an alignment-requirement. The
+          alignment-requirement for all data except structures, unions,
+          and arrays is either the size of the object or the current
+          packing size (specified with either the aligned attribute or
+          the pack pragma), whichever is less. For structures,  unions,
+          and arrays, the alignment-requirement is the largest
+          alignment-requirement of its members.  Every object is
+          allocated an offset so that:
+
+          offset %  alignment-requirement == 0
+
+       3. Adjacent bit fields are packed into the same 1-, 2-, or
+          4-byte allocation unit if the integral types are the same
+          size and if the next bit field fits into the current
+          allocation unit without crossing the boundary imposed by the
+          common alignment requirements of the bit fields.
+
+     Handling of zero-length bitfields:
+
+     MSVC interprets zero-length bitfields in the following ways:
+
+       1. If a zero-length bitfield is inserted between two bitfields
+          that would normally be coalesced, the bitfields will not be
+          coalesced.
+
+          For example:
+
+               struct
+                {
+                  unsigned long bf_1 : 12;
+                  unsigned long : 0;
+                  unsigned long bf_2 : 12;
+                } t1;
+
+          The size of `t1' would be 8 bytes with the zero-length
+          bitfield.  If the zero-length bitfield were removed, `t1''s
+          size would be 4 bytes.
+
+       2. If a zero-length bitfield is inserted after a bitfield,
+          `foo', and the alignment of the zero-length bitfield is
+          greater than the member that follows it, `bar', `bar' will be
+          aligned as the type of the zero-length bitfield.
+
+          For example:
+
+               struct
+                {
+                  char foo : 4;
+                  short : 0;
+                  char bar;
+                } t2;
+
+               struct
+                {
+                  char foo : 4;
+                  short : 0;
+                  double bar;
+                } t3;
+
+          For `t2', `bar' will be placed at offset 2, rather than
+          offset 1.  Accordingly, the size of `t2' will be 4.  For
+          `t3', the zero-length bitfield will not affect the alignment
+          of `bar' or, as a result, the size of the structure.
+
+          Taking this into account, it is important to note the
+          following:
+
+            1. If a zero-length bitfield follows a normal bitfield, the
+               type of the zero-length bitfield may affect the
+               alignment of the structure as whole. For example, `t2'
+               has a size of 4 bytes, since the zero-length bitfield
+               follows a normal bitfield, and is of type short.
+
+            2. Even if a zero-length bitfield is not followed by a
+               normal bitfield, it may still affect the alignment of
+               the structure:
+
+                    struct
+                     {
+                       char foo : 6;
+                       long : 0;
+                     } t4;
+
+               Here, `t4' will take up 4 bytes.
+
+       3. Zero-length bitfields following non-bitfield members are
+          ignored:
+
+               struct
+                {
+                  char foo;
+                  long : 0;
+                  char bar;
+                } t5;
+
+          Here, `t5' will take up 2 bytes.
+
+6.36.5 PowerPC Variable Attributes
+----------------------------------
+
+Three attributes currently are defined for PowerPC configurations:
+`altivec', `ms_struct' and `gcc_struct'.
+
+ For full documentation of the struct attributes please see the
+documentation in *note i386 Variable Attributes::.
+
+ For documentation of `altivec' attribute please see the documentation
+in *note PowerPC Type Attributes::.
+
+6.36.6 SPU Variable Attributes
+------------------------------
+
+The SPU supports the `spu_vector' attribute for variables.  For
+documentation of this attribute please see the documentation in *note
+SPU Type Attributes::.
+
+6.36.7 Xstormy16 Variable Attributes
+------------------------------------
+
+One attribute is currently defined for xstormy16 configurations:
+`below100'.
+
+`below100'
+     If a variable has the `below100' attribute (`BELOW100' is allowed
+     also), GCC will place the variable in the first 0x100 bytes of
+     memory and use special opcodes to access it.  Such variables will
+     be placed in either the `.bss_below100' section or the
+     `.data_below100' section.
+
+
+6.36.8 AVR Variable Attributes
+------------------------------
+
+`progmem'
+     The `progmem' attribute is used on the AVR to place data in the
+     Program Memory address space. The AVR is a Harvard Architecture
+     processor and data normally resides in the Data Memory address
+     space.
+
+
+File: gcc.info,  Node: Type Attributes,  Next: Alignment,  Prev: Variable Attributes,  Up: C Extensions
+
+6.37 Specifying Attributes of Types
+===================================
+
+The keyword `__attribute__' allows you to specify special attributes of
+`struct' and `union' types when you define such types.  This keyword is
+followed by an attribute specification inside double parentheses.
+Seven attributes are currently defined for types: `aligned', `packed',
+`transparent_union', `unused', `deprecated', `visibility', and
+`may_alias'.  Other attributes are defined for functions (*note
+Function Attributes::) and for variables (*note Variable Attributes::).
+
+ You may also specify any one of these attributes with `__' preceding
+and following its keyword.  This allows you to use these attributes in
+header files without being concerned about a possible macro of the same
+name.  For example, you may use `__aligned__' instead of `aligned'.
+
+ You may specify type attributes in an enum, struct or union type
+declaration or definition, or for other types in a `typedef'
+declaration.
+
+ For an enum, struct or union type, you may specify attributes either
+between the enum, struct or union tag and the name of the type, or just
+past the closing curly brace of the _definition_.  The former syntax is
+preferred.
+
+ *Note Attribute Syntax::, for details of the exact syntax for using
+attributes.
+
+`aligned (ALIGNMENT)'
+     This attribute specifies a minimum alignment (in bytes) for
+     variables of the specified type.  For example, the declarations:
+
+          struct S { short f[3]; } __attribute__ ((aligned (8)));
+          typedef int more_aligned_int __attribute__ ((aligned (8)));
+
+     force the compiler to insure (as far as it can) that each variable
+     whose type is `struct S' or `more_aligned_int' will be allocated
+     and aligned _at least_ on a 8-byte boundary.  On a SPARC, having
+     all variables of type `struct S' aligned to 8-byte boundaries
+     allows the compiler to use the `ldd' and `std' (doubleword load and
+     store) instructions when copying one variable of type `struct S' to
+     another, thus improving run-time efficiency.
+
+     Note that the alignment of any given `struct' or `union' type is
+     required by the ISO C standard to be at least a perfect multiple of
+     the lowest common multiple of the alignments of all of the members
+     of the `struct' or `union' in question.  This means that you _can_
+     effectively adjust the alignment of a `struct' or `union' type by
+     attaching an `aligned' attribute to any one of the members of such
+     a type, but the notation illustrated in the example above is a
+     more obvious, intuitive, and readable way to request the compiler
+     to adjust the alignment of an entire `struct' or `union' type.
+
+     As in the preceding example, you can explicitly specify the
+     alignment (in bytes) that you wish the compiler to use for a given
+     `struct' or `union' type.  Alternatively, you can leave out the
+     alignment factor and just ask the compiler to align a type to the
+     maximum useful alignment for the target machine you are compiling
+     for.  For example, you could write:
+
+          struct S { short f[3]; } __attribute__ ((aligned));
+
+     Whenever you leave out the alignment factor in an `aligned'
+     attribute specification, the compiler automatically sets the
+     alignment for the type to the largest alignment which is ever used
+     for any data type on the target machine you are compiling for.
+     Doing this can often make copy operations more efficient, because
+     the compiler can use whatever instructions copy the biggest chunks
+     of memory when performing copies to or from the variables which
+     have types that you have aligned this way.
+
+     In the example above, if the size of each `short' is 2 bytes, then
+     the size of the entire `struct S' type is 6 bytes.  The smallest
+     power of two which is greater than or equal to that is 8, so the
+     compiler sets the alignment for the entire `struct S' type to 8
+     bytes.
+
+     Note that although you can ask the compiler to select a
+     time-efficient alignment for a given type and then declare only
+     individual stand-alone objects of that type, the compiler's
+     ability to select a time-efficient alignment is primarily useful
+     only when you plan to create arrays of variables having the
+     relevant (efficiently aligned) type.  If you declare or use arrays
+     of variables of an efficiently-aligned type, then it is likely
+     that your program will also be doing pointer arithmetic (or
+     subscripting, which amounts to the same thing) on pointers to the
+     relevant type, and the code that the compiler generates for these
+     pointer arithmetic operations will often be more efficient for
+     efficiently-aligned types than for other types.
+
+     The `aligned' attribute can only increase the alignment; but you
+     can decrease it by specifying `packed' as well.  See below.
+
+     Note that the effectiveness of `aligned' attributes may be limited
+     by inherent limitations in your linker.  On many systems, the
+     linker is only able to arrange for variables to be aligned up to a
+     certain maximum alignment.  (For some linkers, the maximum
+     supported alignment may be very very small.)  If your linker is
+     only able to align variables up to a maximum of 8 byte alignment,
+     then specifying `aligned(16)' in an `__attribute__' will still
+     only provide you with 8 byte alignment.  See your linker
+     documentation for further information.
+
+`packed'
+     This attribute, attached to `struct' or `union' type definition,
+     specifies that each member (other than zero-width bitfields) of
+     the structure or union is placed to minimize the memory required.
+     When attached to an `enum' definition, it indicates that the
+     smallest integral type should be used.
+
+     Specifying this attribute for `struct' and `union' types is
+     equivalent to specifying the `packed' attribute on each of the
+     structure or union members.  Specifying the `-fshort-enums' flag
+     on the line is equivalent to specifying the `packed' attribute on
+     all `enum' definitions.
+
+     In the following example `struct my_packed_struct''s members are
+     packed closely together, but the internal layout of its `s' member
+     is not packed--to do that, `struct my_unpacked_struct' would need
+     to be packed too.
+
+          struct my_unpacked_struct
+           {
+              char c;
+              int i;
+           };
+
+          struct __attribute__ ((__packed__)) my_packed_struct
+            {
+               char c;
+               int  i;
+               struct my_unpacked_struct s;
+            };
+
+     You may only specify this attribute on the definition of an `enum',
+     `struct' or `union', not on a `typedef' which does not also define
+     the enumerated type, structure or union.
+
+`transparent_union'
+     This attribute, attached to a `union' type definition, indicates
+     that any function parameter having that union type causes calls to
+     that function to be treated in a special way.
+
+     First, the argument corresponding to a transparent union type can
+     be of any type in the union; no cast is required.  Also, if the
+     union contains a pointer type, the corresponding argument can be a
+     null pointer constant or a void pointer expression; and if the
+     union contains a void pointer type, the corresponding argument can
+     be any pointer expression.  If the union member type is a pointer,
+     qualifiers like `const' on the referenced type must be respected,
+     just as with normal pointer conversions.
+
+     Second, the argument is passed to the function using the calling
+     conventions of the first member of the transparent union, not the
+     calling conventions of the union itself.  All members of the union
+     must have the same machine representation; this is necessary for
+     this argument passing to work properly.
+
+     Transparent unions are designed for library functions that have
+     multiple interfaces for compatibility reasons.  For example,
+     suppose the `wait' function must accept either a value of type
+     `int *' to comply with Posix, or a value of type `union wait *' to
+     comply with the 4.1BSD interface.  If `wait''s parameter were
+     `void *', `wait' would accept both kinds of arguments, but it
+     would also accept any other pointer type and this would make
+     argument type checking less useful.  Instead, `<sys/wait.h>' might
+     define the interface as follows:
+
+          typedef union __attribute__ ((__transparent_union__))
+            {
+              int *__ip;
+              union wait *__up;
+            } wait_status_ptr_t;
+
+          pid_t wait (wait_status_ptr_t);
+
+     This interface allows either `int *' or `union wait *' arguments
+     to be passed, using the `int *' calling convention.  The program
+     can call `wait' with arguments of either type:
+
+          int w1 () { int w; return wait (&w); }
+          int w2 () { union wait w; return wait (&w); }
+
+     With this interface, `wait''s implementation might look like this:
+
+          pid_t wait (wait_status_ptr_t p)
+          {
+            return waitpid (-1, p.__ip, 0);
+          }
+
+`unused'
+     When attached to a type (including a `union' or a `struct'), this
+     attribute means that variables of that type are meant to appear
+     possibly unused.  GCC will not produce a warning for any variables
+     of that type, even if the variable appears to do nothing.  This is
+     often the case with lock or thread classes, which are usually
+     defined and then not referenced, but contain constructors and
+     destructors that have nontrivial bookkeeping functions.
+
+`deprecated'
+`deprecated (MSG)'
+     The `deprecated' attribute results in a warning if the type is
+     used anywhere in the source file.  This is useful when identifying
+     types that are expected to be removed in a future version of a
+     program.  If possible, the warning also includes the location of
+     the declaration of the deprecated type, to enable users to easily
+     find further information about why the type is deprecated, or what
+     they should do instead.  Note that the warnings only occur for
+     uses and then only if the type is being applied to an identifier
+     that itself is not being declared as deprecated.
+
+          typedef int T1 __attribute__ ((deprecated));
+          T1 x;
+          typedef T1 T2;
+          T2 y;
+          typedef T1 T3 __attribute__ ((deprecated));
+          T3 z __attribute__ ((deprecated));
+
+     results in a warning on line 2 and 3 but not lines 4, 5, or 6.  No
+     warning is issued for line 4 because T2 is not explicitly
+     deprecated.  Line 5 has no warning because T3 is explicitly
+     deprecated.  Similarly for line 6.  The optional msg argument,
+     which must be a string, will be printed in the warning if present.
+
+     The `deprecated' attribute can also be used for functions and
+     variables (*note Function Attributes::, *note Variable
+     Attributes::.)
+
+`may_alias'
+     Accesses through pointers to types with this attribute are not
+     subject to type-based alias analysis, but are instead assumed to
+     be able to alias any other type of objects.  In the context of
+     6.5/7 an lvalue expression dereferencing such a pointer is treated
+     like having a character type.  See `-fstrict-aliasing' for more
+     information on aliasing issues.  This extension exists to support
+     some vector APIs, in which pointers to one vector type are
+     permitted to alias pointers to a different vector type.
+
+     Note that an object of a type with this attribute does not have any
+     special semantics.
+
+     Example of use:
+
+          typedef short __attribute__((__may_alias__)) short_a;
+
+          int
+          main (void)
+          {
+            int a = 0x12345678;
+            short_a *b = (short_a *) &a;
+
+            b[1] = 0;
+
+            if (a == 0x12345678)
+              abort();
+
+            exit(0);
+          }
+
+     If you replaced `short_a' with `short' in the variable
+     declaration, the above program would abort when compiled with
+     `-fstrict-aliasing', which is on by default at `-O2' or above in
+     recent GCC versions.
+
+`visibility'
+     In C++, attribute visibility (*note Function Attributes::) can
+     also be applied to class, struct, union and enum types.  Unlike
+     other type attributes, the attribute must appear between the
+     initial keyword and the name of the type; it cannot appear after
+     the body of the type.
+
+     Note that the type visibility is applied to vague linkage entities
+     associated with the class (vtable, typeinfo node, etc.).  In
+     particular, if a class is thrown as an exception in one shared
+     object and caught in another, the class must have default
+     visibility.  Otherwise the two shared objects will be unable to
+     use the same typeinfo node and exception handling will break.
+
+
+6.37.1 ARM Type Attributes
+--------------------------
+
+On those ARM targets that support `dllimport' (such as Symbian OS), you
+can use the `notshared' attribute to indicate that the virtual table
+and other similar data for a class should not be exported from a DLL.
+For example:
+
+     class __declspec(notshared) C {
+     public:
+       __declspec(dllimport) C();
+       virtual void f();
+     }
+
+     __declspec(dllexport)
+     C::C() {}
+
+ In this code, `C::C' is exported from the current DLL, but the virtual
+table for `C' is not exported.  (You can use `__attribute__' instead of
+`__declspec' if you prefer, but most Symbian OS code uses `__declspec'.)
+
+6.37.2 MeP Type Attributes
+--------------------------
+
+Many of the MeP variable attributes may be applied to types as well.
+Specifically, the `based', `tiny', `near', and `far' attributes may be
+applied to either.  The `io' and `cb' attributes may not be applied to
+types.
+
+6.37.3 i386 Type Attributes
+---------------------------
+
+Two attributes are currently defined for i386 configurations:
+`ms_struct' and `gcc_struct'.
+
+`ms_struct'
+`gcc_struct'
+     If `packed' is used on a structure, or if bit-fields are used it
+     may be that the Microsoft ABI packs them differently than GCC
+     would normally pack them.  Particularly when moving packed data
+     between functions compiled with GCC and the native Microsoft
+     compiler (either via function call or as data in a file), it may
+     be necessary to access either format.
+
+     Currently `-m[no-]ms-bitfields' is provided for the Microsoft
+     Windows X86 compilers to match the native Microsoft compiler.
+
+ To specify multiple attributes, separate them by commas within the
+double parentheses: for example, `__attribute__ ((aligned (16),
+packed))'.
+
+6.37.4 PowerPC Type Attributes
+------------------------------
+
+Three attributes currently are defined for PowerPC configurations:
+`altivec', `ms_struct' and `gcc_struct'.
+
+ For full documentation of the `ms_struct' and `gcc_struct' attributes
+please see the documentation in *note i386 Type Attributes::.
+
+ The `altivec' attribute allows one to declare AltiVec vector data
+types supported by the AltiVec Programming Interface Manual.  The
+attribute requires an argument to specify one of three vector types:
+`vector__', `pixel__' (always followed by unsigned short), and `bool__'
+(always followed by unsigned).
+
+     __attribute__((altivec(vector__)))
+     __attribute__((altivec(pixel__))) unsigned short
+     __attribute__((altivec(bool__))) unsigned
+
+ These attributes mainly are intended to support the `__vector',
+`__pixel', and `__bool' AltiVec keywords.
+
+6.37.5 SPU Type Attributes
+--------------------------
+
+The SPU supports the `spu_vector' attribute for types.  This attribute
+allows one to declare vector data types supported by the
+Sony/Toshiba/IBM SPU Language Extensions Specification.  It is intended
+to support the `__vector' keyword.
+
+
+File: gcc.info,  Node: Inline,  Next: Extended Asm,  Prev: Alignment,  Up: C Extensions
+
+6.38 An Inline Function is As Fast As a Macro
+=============================================
+
+By declaring a function inline, you can direct GCC to make calls to
+that function faster.  One way GCC can achieve this is to integrate
+that function's code into the code for its callers.  This makes
+execution faster by eliminating the function-call overhead; in
+addition, if any of the actual argument values are constant, their
+known values may permit simplifications at compile time so that not all
+of the inline function's code needs to be included.  The effect on code
+size is less predictable; object code may be larger or smaller with
+function inlining, depending on the particular case.  You can also
+direct GCC to try to integrate all "simple enough" functions into their
+callers with the option `-finline-functions'.
+
+ GCC implements three different semantics of declaring a function
+inline.  One is available with `-std=gnu89' or `-fgnu89-inline' or when
+`gnu_inline' attribute is present on all inline declarations, another
+when `-std=c99' or `-std=gnu99' (without `-fgnu89-inline'), and the
+third is used when compiling C++.
+
+ To declare a function inline, use the `inline' keyword in its
+declaration, like this:
+
+     static inline int
+     inc (int *a)
+     {
+       (*a)++;
+     }
+
+ If you are writing a header file to be included in ISO C90 programs,
+write `__inline__' instead of `inline'.  *Note Alternate Keywords::.
+
+ The three types of inlining behave similarly in two important cases:
+when the `inline' keyword is used on a `static' function, like the
+example above, and when a function is first declared without using the
+`inline' keyword and then is defined with `inline', like this:
+
+     extern int inc (int *a);
+     inline int
+     inc (int *a)
+     {
+       (*a)++;
+     }
+
+ In both of these common cases, the program behaves the same as if you
+had not used the `inline' keyword, except for its speed.
+
+ When a function is both inline and `static', if all calls to the
+function are integrated into the caller, and the function's address is
+never used, then the function's own assembler code is never referenced.
+In this case, GCC does not actually output assembler code for the
+function, unless you specify the option `-fkeep-inline-functions'.
+Some calls cannot be integrated for various reasons (in particular,
+calls that precede the function's definition cannot be integrated, and
+neither can recursive calls within the definition).  If there is a
+nonintegrated call, then the function is compiled to assembler code as
+usual.  The function must also be compiled as usual if the program
+refers to its address, because that can't be inlined.
+
+ Note that certain usages in a function definition can make it
+unsuitable for inline substitution.  Among these usages are: use of
+varargs, use of alloca, use of variable sized data types (*note
+Variable Length::), use of computed goto (*note Labels as Values::),
+use of nonlocal goto, and nested functions (*note Nested Functions::).
+Using `-Winline' will warn when a function marked `inline' could not be
+substituted, and will give the reason for the failure.
+
+ As required by ISO C++, GCC considers member functions defined within
+the body of a class to be marked inline even if they are not explicitly
+declared with the `inline' keyword.  You can override this with
+`-fno-default-inline'; *note Options Controlling C++ Dialect: C++
+Dialect Options.
+
+ GCC does not inline any functions when not optimizing unless you
+specify the `always_inline' attribute for the function, like this:
+
+     /* Prototype.  */
+     inline void foo (const char) __attribute__((always_inline));
+
+ The remainder of this section is specific to GNU C90 inlining.
+
+ When an inline function is not `static', then the compiler must assume
+that there may be calls from other source files; since a global symbol
+can be defined only once in any program, the function must not be
+defined in the other source files, so the calls therein cannot be
+integrated.  Therefore, a non-`static' inline function is always
+compiled on its own in the usual fashion.
+
+ If you specify both `inline' and `extern' in the function definition,
+then the definition is used only for inlining.  In no case is the
+function compiled on its own, not even if you refer to its address
+explicitly.  Such an address becomes an external reference, as if you
+had only declared the function, and had not defined it.
+
+ This combination of `inline' and `extern' has almost the effect of a
+macro.  The way to use it is to put a function definition in a header
+file with these keywords, and put another copy of the definition
+(lacking `inline' and `extern') in a library file.  The definition in
+the header file will cause most calls to the function to be inlined.
+If any uses of the function remain, they will refer to the single copy
+in the library.
+
+
+File: gcc.info,  Node: Extended Asm,  Next: Constraints,  Prev: Inline,  Up: C Extensions
+
+6.39 Assembler Instructions with C Expression Operands
+======================================================
+
+In an assembler instruction using `asm', you can specify the operands
+of the instruction using C expressions.  This means you need not guess
+which registers or memory locations will contain the data you want to
+use.
+
+ You must specify an assembler instruction template much like what
+appears in a machine description, plus an operand constraint string for
+each operand.
+
+ For example, here is how to use the 68881's `fsinx' instruction:
+
+     asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+
+Here `angle' is the C expression for the input operand while `result'
+is that of the output operand.  Each has `"f"' as its operand
+constraint, saying that a floating point register is required.  The `='
+in `=f' indicates that the operand is an output; all output operands'
+constraints must use `='.  The constraints use the same language used
+in the machine description (*note Constraints::).
+
+ Each operand is described by an operand-constraint string followed by
+the C expression in parentheses.  A colon separates the assembler
+template from the first output operand and another separates the last
+output operand from the first input, if any.  Commas separate the
+operands within each group.  The total number of operands is currently
+limited to 30; this limitation may be lifted in some future version of
+GCC.
+
+ If there are no output operands but there are input operands, you must
+place two consecutive colons surrounding the place where the output
+operands would go.
+
+ As of GCC version 3.1, it is also possible to specify input and output
+operands using symbolic names which can be referenced within the
+assembler code.  These names are specified inside square brackets
+preceding the constraint string, and can be referenced inside the
+assembler code using `%[NAME]' instead of a percentage sign followed by
+the operand number.  Using named operands the above example could look
+like:
+
+     asm ("fsinx %[angle],%[output]"
+          : [output] "=f" (result)
+          : [angle] "f" (angle));
+
+Note that the symbolic operand names have no relation whatsoever to
+other C identifiers.  You may use any name you like, even those of
+existing C symbols, but you must ensure that no two operands within the
+same assembler construct use the same symbolic name.
+
+ Output operand expressions must be lvalues; the compiler can check
+this.  The input operands need not be lvalues.  The compiler cannot
+check whether the operands have data types that are reasonable for the
+instruction being executed.  It does not parse the assembler instruction
+template and does not know what it means or even whether it is valid
+assembler input.  The extended `asm' feature is most often used for
+machine instructions the compiler itself does not know exist.  If the
+output expression cannot be directly addressed (for example, it is a
+bit-field), your constraint must allow a register.  In that case, GCC
+will use the register as the output of the `asm', and then store that
+register into the output.
+
+ The ordinary output operands must be write-only; GCC will assume that
+the values in these operands before the instruction are dead and need
+not be generated.  Extended asm supports input-output or read-write
+operands.  Use the constraint character `+' to indicate such an operand
+and list it with the output operands.  You should only use read-write
+operands when the constraints for the operand (or the operand in which
+only some of the bits are to be changed) allow a register.
+
+ You may, as an alternative, logically split its function into two
+separate operands, one input operand and one write-only output operand.
+The connection between them is expressed by constraints which say they
+need to be in the same location when the instruction executes.  You can
+use the same C expression for both operands, or different expressions.
+For example, here we write the (fictitious) `combine' instruction with
+`bar' as its read-only source operand and `foo' as its read-write
+destination:
+
+     asm ("combine %2,%0" : "=r" (foo) : "0" (foo), "g" (bar));
+
+The constraint `"0"' for operand 1 says that it must occupy the same
+location as operand 0.  A number in constraint is allowed only in an
+input operand and it must refer to an output operand.
+
+ Only a number in the constraint can guarantee that one operand will be
+in the same place as another.  The mere fact that `foo' is the value of
+both operands is not enough to guarantee that they will be in the same
+place in the generated assembler code.  The following would not work
+reliably:
+
+     asm ("combine %2,%0" : "=r" (foo) : "r" (foo), "g" (bar));
+
+ Various optimizations or reloading could cause operands 0 and 1 to be
+in different registers; GCC knows no reason not to do so.  For example,
+the compiler might find a copy of the value of `foo' in one register and
+use it for operand 1, but generate the output operand 0 in a different
+register (copying it afterward to `foo''s own address).  Of course,
+since the register for operand 1 is not even mentioned in the assembler
+code, the result will not work, but GCC can't tell that.
+
+ As of GCC version 3.1, one may write `[NAME]' instead of the operand
+number for a matching constraint.  For example:
+
+     asm ("cmoveq %1,%2,%[result]"
+          : [result] "=r"(result)
+          : "r" (test), "r"(new), "[result]"(old));
+
+ Sometimes you need to make an `asm' operand be a specific register,
+but there's no matching constraint letter for that register _by
+itself_.  To force the operand into that register, use a local variable
+for the operand and specify the register in the variable declaration.
+*Note Explicit Reg Vars::.  Then for the `asm' operand, use any
+register constraint letter that matches the register:
+
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = ...;
+     register int *result asm ("r0");
+     asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+
+ In the above example, beware that a register that is call-clobbered by
+the target ABI will be overwritten by any function call in the
+assignment, including library calls for arithmetic operators.  Also a
+register may be clobbered when generating some operations, like
+variable shift, memory copy or memory move on x86.  Assuming it is a
+call-clobbered register, this may happen to `r0' above by the
+assignment to `p2'.  If you have to use such a register, use temporary
+variables for expressions between the register assignment and use:
+
+     int t1 = ...;
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = t1;
+     register int *result asm ("r0");
+     asm ("sysint" : "=r" (result) : "0" (p1), "r" (p2));
+
+ Some instructions clobber specific hard registers.  To describe this,
+write a third colon after the input operands, followed by the names of
+the clobbered hard registers (given as strings).  Here is a realistic
+example for the VAX:
+
+     asm volatile ("movc3 %0,%1,%2"
+                   : /* no outputs */
+                   : "g" (from), "g" (to), "g" (count)
+                   : "r0", "r1", "r2", "r3", "r4", "r5");
+
+ You may not write a clobber description in a way that overlaps with an
+input or output operand.  For example, you may not have an operand
+describing a register class with one member if you mention that register
+in the clobber list.  Variables declared to live in specific registers
+(*note Explicit Reg Vars::), and used as asm input or output operands
+must have no part mentioned in the clobber description.  There is no
+way for you to specify that an input operand is modified without also
+specifying it as an output operand.  Note that if all the output
+operands you specify are for this purpose (and hence unused), you will
+then also need to specify `volatile' for the `asm' construct, as
+described below, to prevent GCC from deleting the `asm' statement as
+unused.
+
+ If you refer to a particular hardware register from the assembler code,
+you will probably have to list the register after the third colon to
+tell the compiler the register's value is modified.  In some assemblers,
+the register names begin with `%'; to produce one `%' in the assembler
+code, you must write `%%' in the input.
+
+ If your assembler instruction can alter the condition code register,
+add `cc' to the list of clobbered registers.  GCC on some machines
+represents the condition codes as a specific hardware register; `cc'
+serves to name this register.  On other machines, the condition code is
+handled differently, and specifying `cc' has no effect.  But it is
+valid no matter what the machine.
+
+ If your assembler instructions access memory in an unpredictable
+fashion, add `memory' to the list of clobbered registers.  This will
+cause GCC to not keep memory values cached in registers across the
+assembler instruction and not optimize stores or loads to that memory.
+You will also want to add the `volatile' keyword if the memory affected
+is not listed in the inputs or outputs of the `asm', as the `memory'
+clobber does not count as a side-effect of the `asm'.  If you know how
+large the accessed memory is, you can add it as input or output but if
+this is not known, you should add `memory'.  As an example, if you
+access ten bytes of a string, you can use a memory input like:
+
+     {"m"( ({ struct { char x[10]; } *p = (void *)ptr ; *p; }) )}.
+
+ Note that in the following example the memory input is necessary,
+otherwise GCC might optimize the store to `x' away:
+     int foo ()
+     {
+       int x = 42;
+       int *y = &x;
+       int result;
+       asm ("magic stuff accessing an 'int' pointed to by '%1'"
+             "=&d" (r) : "a" (y), "m" (*y));
+       return result;
+     }
+
+ You can put multiple assembler instructions together in a single `asm'
+template, separated by the characters normally used in assembly code
+for the system.  A combination that works in most places is a newline
+to break the line, plus a tab character to move to the instruction field
+(written as `\n\t').  Sometimes semicolons can be used, if the
+assembler allows semicolons as a line-breaking character.  Note that
+some assembler dialects use semicolons to start a comment.  The input
+operands are guaranteed not to use any of the clobbered registers, and
+neither will the output operands' addresses, so you can read and write
+the clobbered registers as many times as you like.  Here is an example
+of multiple instructions in a template; it assumes the subroutine
+`_foo' accepts arguments in registers 9 and 10:
+
+     asm ("movl %0,r9\n\tmovl %1,r10\n\tcall _foo"
+          : /* no outputs */
+          : "g" (from), "g" (to)
+          : "r9", "r10");
+
+ Unless an output operand has the `&' constraint modifier, GCC may
+allocate it in the same register as an unrelated input operand, on the
+assumption the inputs are consumed before the outputs are produced.
+This assumption may be false if the assembler code actually consists of
+more than one instruction.  In such a case, use `&' for each output
+operand that may not overlap an input.  *Note Modifiers::.
+
+ If you want to test the condition code produced by an assembler
+instruction, you must include a branch and a label in the `asm'
+construct, as follows:
+
+     asm ("clr %0\n\tfrob %1\n\tbeq 0f\n\tmov #1,%0\n0:"
+          : "g" (result)
+          : "g" (input));
+
+This assumes your assembler supports local labels, as the GNU assembler
+and most Unix assemblers do.
+
+ Speaking of labels, jumps from one `asm' to another are not supported.
+The compiler's optimizers do not know about these jumps, and therefore
+they cannot take account of them when deciding how to optimize.  *Note
+Extended asm with goto::.
+
+ Usually the most convenient way to use these `asm' instructions is to
+encapsulate them in macros that look like functions.  For example,
+
+     #define sin(x)       \
+     ({ double __value, __arg = (x);   \
+        asm ("fsinx %1,%0": "=f" (__value): "f" (__arg));  \
+        __value; })
+
+Here the variable `__arg' is used to make sure that the instruction
+operates on a proper `double' value, and to accept only those arguments
+`x' which can convert automatically to a `double'.
+
+ Another way to make sure the instruction operates on the correct data
+type is to use a cast in the `asm'.  This is different from using a
+variable `__arg' in that it converts more different types.  For
+example, if the desired type were `int', casting the argument to `int'
+would accept a pointer with no complaint, while assigning the argument
+to an `int' variable named `__arg' would warn about using a pointer
+unless the caller explicitly casts it.
+
+ If an `asm' has output operands, GCC assumes for optimization purposes
+the instruction has no side effects except to change the output
+operands.  This does not mean instructions with a side effect cannot be
+used, but you must be careful, because the compiler may eliminate them
+if the output operands aren't used, or move them out of loops, or
+replace two with one if they constitute a common subexpression.  Also,
+if your instruction does have a side effect on a variable that otherwise
+appears not to change, the old value of the variable may be reused later
+if it happens to be found in a register.
+
+ You can prevent an `asm' instruction from being deleted by writing the
+keyword `volatile' after the `asm'.  For example:
+
+     #define get_and_set_priority(new)              \
+     ({ int __old;                                  \
+        asm volatile ("get_and_set_priority %0, %1" \
+                      : "=g" (__old) : "g" (new));  \
+        __old; })
+
+The `volatile' keyword indicates that the instruction has important
+side-effects.  GCC will not delete a volatile `asm' if it is reachable.
+(The instruction can still be deleted if GCC can prove that
+control-flow will never reach the location of the instruction.)  Note
+that even a volatile `asm' instruction can be moved relative to other
+code, including across jump instructions.  For example, on many targets
+there is a system register which can be set to control the rounding
+mode of floating point operations.  You might try setting it with a
+volatile `asm', like this PowerPC example:
+
+            asm volatile("mtfsf 255,%0" : : "f" (fpenv));
+            sum = x + y;
+
+This will not work reliably, as the compiler may move the addition back
+before the volatile `asm'.  To make it work you need to add an
+artificial dependency to the `asm' referencing a variable in the code
+you don't want moved, for example:
+
+         asm volatile ("mtfsf 255,%1" : "=X"(sum): "f"(fpenv));
+         sum = x + y;
+
+ Similarly, you can't expect a sequence of volatile `asm' instructions
+to remain perfectly consecutive.  If you want consecutive output, use a
+single `asm'.  Also, GCC will perform some optimizations across a
+volatile `asm' instruction; GCC does not "forget everything" when it
+encounters a volatile `asm' instruction the way some other compilers do.
+
+ An `asm' instruction without any output operands will be treated
+identically to a volatile `asm' instruction.
+
+ It is a natural idea to look for a way to give access to the condition
+code left by the assembler instruction.  However, when we attempted to
+implement this, we found no way to make it work reliably.  The problem
+is that output operands might need reloading, which would result in
+additional following "store" instructions.  On most machines, these
+instructions would alter the condition code before there was time to
+test it.  This problem doesn't arise for ordinary "test" and "compare"
+instructions because they don't have any output operands.
+
+ For reasons similar to those described above, it is not possible to
+give an assembler instruction access to the condition code left by
+previous instructions.
+
+ As of GCC version 4.5, `asm goto' may be used to have the assembly
+jump to one or more C labels.  In this form, a fifth section after the
+clobber list contains a list of all C labels to which the assembly may
+jump.  Each label operand is implicitly self-named.  The `asm' is also
+assumed to fall through to the next statement.
+
+ This form of `asm' is restricted to not have outputs.  This is due to
+a internal restriction in the compiler that control transfer
+instructions cannot have outputs.  This restriction on `asm goto' may
+be lifted in some future version of the compiler.  In the mean time,
+`asm goto' may include a memory clobber, and so leave outputs in memory.
+
+     int frob(int x)
+     {
+       int y;
+       asm goto ("frob %%r5, %1; jc %l[error]; mov (%2), %%r5"
+                 : : "r"(x), "r"(&y) : "r5", "memory" : error);
+       return y;
+      error:
+       return -1;
+     }
+
+ In this (inefficient) example, the `frob' instruction sets the carry
+bit to indicate an error.  The `jc' instruction detects this and
+branches to the `error' label.  Finally, the output of the `frob'
+instruction (`%r5') is stored into the memory for variable `y', which
+is later read by the `return' statement.
+
+     void doit(void)
+     {
+       int i = 0;
+       asm goto ("mfsr %%r1, 123; jmp %%r1;"
+                 ".pushsection doit_table;"
+                 ".long %l0, %l1, %l2, %l3;"
+                 ".popsection"
+                 : : : "r1" : label1, label2, label3, label4);
+       __builtin_unreachable ();
+
+      label1:
+       f1();
+       return;
+      label2:
+       f2();
+       return;
+      label3:
+       i = 1;
+      label4:
+       f3(i);
+     }
+
+ In this (also inefficient) example, the `mfsr' instruction reads an
+address from some out-of-band machine register, and the following `jmp'
+instruction branches to that address.  The address read by the `mfsr'
+instruction is assumed to have been previously set via some
+application-specific mechanism to be one of the four values stored in
+the `doit_table' section.  Finally, the `asm' is followed by a call to
+`__builtin_unreachable' to indicate that the `asm' does not in fact
+fall through.
+
+     #define TRACE1(NUM)                         \
+       do {                                      \
+         asm goto ("0: nop;"                     \
+                   ".pushsection trace_table;"   \
+                   ".long 0b, %l0;"              \
+                   ".popsection"                 \
+                   : : : : trace#NUM);           \
+         if (0) { trace#NUM: trace(); }          \
+       } while (0)
+     #define TRACE  TRACE1(__COUNTER__)
+
+ In this example (which in fact inspired the `asm goto' feature) we
+want on rare occasions to call the `trace' function; on other occasions
+we'd like to keep the overhead to the absolute minimum.  The normal
+code path consists of a single `nop' instruction.  However, we record
+the address of this `nop' together with the address of a label that
+calls the `trace' function.  This allows the `nop' instruction to be
+patched at runtime to be an unconditional branch to the stored label.
+It is assumed that an optimizing compiler will move the labeled block
+out of line, to optimize the fall through path from the `asm'.
+
+ If you are writing a header file that should be includable in ISO C
+programs, write `__asm__' instead of `asm'.  *Note Alternate Keywords::.
+
+6.39.1 Size of an `asm'
+-----------------------
+
+Some targets require that GCC track the size of each instruction used in
+order to generate correct code.  Because the final length of an `asm'
+is only known by the assembler, GCC must make an estimate as to how big
+it will be.  The estimate is formed by counting the number of
+statements in the pattern of the `asm' and multiplying that by the
+length of the longest instruction on that processor.  Statements in the
+`asm' are identified by newline characters and whatever statement
+separator characters are supported by the assembler; on most processors
+this is the ``;'' character.
+
+ Normally, GCC's estimate is perfectly adequate to ensure that correct
+code is generated, but it is possible to confuse the compiler if you use
+pseudo instructions or assembler macros that expand into multiple real
+instructions or if you use assembler directives that expand to more
+space in the object file than would be needed for a single instruction.
+If this happens then the assembler will produce a diagnostic saying that
+a label is unreachable.
+
+6.39.2 i386 floating point asm operands
+---------------------------------------
+
+There are several rules on the usage of stack-like regs in asm_operands
+insns.  These rules apply only to the operands that are stack-like regs:
+
+  1. Given a set of input regs that die in an asm_operands, it is
+     necessary to know which are implicitly popped by the asm, and
+     which must be explicitly popped by gcc.
+
+     An input reg that is implicitly popped by the asm must be
+     explicitly clobbered, unless it is constrained to match an output
+     operand.
+
+  2. For any input reg that is implicitly popped by an asm, it is
+     necessary to know how to adjust the stack to compensate for the
+     pop.  If any non-popped input is closer to the top of the
+     reg-stack than the implicitly popped reg, it would not be possible
+     to know what the stack looked like--it's not clear how the rest of
+     the stack "slides up".
+
+     All implicitly popped input regs must be closer to the top of the
+     reg-stack than any input that is not implicitly popped.
+
+     It is possible that if an input dies in an insn, reload might use
+     the input reg for an output reload.  Consider this example:
+
+          asm ("foo" : "=t" (a) : "f" (b));
+
+     This asm says that input B is not popped by the asm, and that the
+     asm pushes a result onto the reg-stack, i.e., the stack is one
+     deeper after the asm than it was before.  But, it is possible that
+     reload will think that it can use the same reg for both the input
+     and the output, if input B dies in this insn.
+
+     If any input operand uses the `f' constraint, all output reg
+     constraints must use the `&' earlyclobber.
+
+     The asm above would be written as
+
+          asm ("foo" : "=&t" (a) : "f" (b));
+
+  3. Some operands need to be in particular places on the stack.  All
+     output operands fall in this category--there is no other way to
+     know which regs the outputs appear in unless the user indicates
+     this in the constraints.
+
+     Output operands must specifically indicate which reg an output
+     appears in after an asm.  `=f' is not allowed: the operand
+     constraints must select a class with a single reg.
+
+  4. Output operands may not be "inserted" between existing stack regs.
+     Since no 387 opcode uses a read/write operand, all output operands
+     are dead before the asm_operands, and are pushed by the
+     asm_operands.  It makes no sense to push anywhere but the top of
+     the reg-stack.
+
+     Output operands must start at the top of the reg-stack: output
+     operands may not "skip" a reg.
+
+  5. Some asm statements may need extra stack space for internal
+     calculations.  This can be guaranteed by clobbering stack registers
+     unrelated to the inputs and outputs.
+
+
+ Here are a couple of reasonable asms to want to write.  This asm takes
+one input, which is internally popped, and produces two outputs.
+
+     asm ("fsincos" : "=t" (cos), "=u" (sin) : "0" (inp));
+
+ This asm takes two inputs, which are popped by the `fyl2xp1' opcode,
+and replaces them with one output.  The user must code the `st(1)'
+clobber for reg-stack.c to know that `fyl2xp1' pops both inputs.
+
+     asm ("fyl2xp1" : "=t" (result) : "0" (x), "u" (y) : "st(1)");
+
+
+File: gcc.info,  Node: Constraints,  Next: Asm Labels,  Prev: Extended Asm,  Up: C Extensions
+
+6.40 Constraints for `asm' Operands
+===================================
+
+Here are specific details on what constraint letters you can use with
+`asm' operands.  Constraints can say whether an operand may be in a
+register, and which kinds of register; whether the operand can be a
+memory reference, and which kinds of address; whether the operand may
+be an immediate constant, and which possible values it may have.
+Constraints can also require two operands to match.
+
+* Menu:
+
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Modifiers::           More precise control over effects of constraints.
+* Machine Constraints:: Special constraints for some particular machines.
+
+
+File: gcc.info,  Node: Simple Constraints,  Next: Multi-Alternative,  Up: Constraints
+
+6.40.1 Simple Constraints
+-------------------------
+
+The simplest kind of constraint is a string full of letters, each of
+which describes one kind of operand that is permitted.  Here are the
+letters that are allowed:
+
+whitespace
+     Whitespace characters are ignored and can be inserted at any
+     position except the first.  This enables each alternative for
+     different operands to be visually aligned in the machine
+     description even if they have different number of constraints and
+     modifiers.
+
+`m'
+     A memory operand is allowed, with any kind of address that the
+     machine supports in general.  Note that the letter used for the
+     general memory constraint can be re-defined by a back end using
+     the `TARGET_MEM_CONSTRAINT' macro.
+
+`o'
+     A memory operand is allowed, but only if the address is
+     "offsettable".  This means that adding a small integer (actually,
+     the width in bytes of the operand, as determined by its machine
+     mode) may be added to the address and the result is also a valid
+     memory address.
+
+     For example, an address which is constant is offsettable; so is an
+     address that is the sum of a register and a constant (as long as a
+     slightly larger constant is also within the range of
+     address-offsets supported by the machine); but an autoincrement or
+     autodecrement address is not offsettable.  More complicated
+     indirect/indexed addresses may or may not be offsettable depending
+     on the other addressing modes that the machine supports.
+
+     Note that in an output operand which can be matched by another
+     operand, the constraint letter `o' is valid only when accompanied
+     by both `<' (if the target machine has predecrement addressing)
+     and `>' (if the target machine has preincrement addressing).
+
+`V'
+     A memory operand that is not offsettable.  In other words,
+     anything that would fit the `m' constraint but not the `o'
+     constraint.
+
+`<'
+     A memory operand with autodecrement addressing (either
+     predecrement or postdecrement) is allowed.
+
+`>'
+     A memory operand with autoincrement addressing (either
+     preincrement or postincrement) is allowed.
+
+`r'
+     A register operand is allowed provided that it is in a general
+     register.
+
+`i'
+     An immediate integer operand (one with constant value) is allowed.
+     This includes symbolic constants whose values will be known only at
+     assembly time or later.
+
+`n'
+     An immediate integer operand with a known numeric value is allowed.
+     Many systems cannot support assembly-time constants for operands
+     less than a word wide.  Constraints for these operands should use
+     `n' rather than `i'.
+
+`I', `J', `K', ... `P'
+     Other letters in the range `I' through `P' may be defined in a
+     machine-dependent fashion to permit immediate integer operands with
+     explicit integer values in specified ranges.  For example, on the
+     68000, `I' is defined to stand for the range of values 1 to 8.
+     This is the range permitted as a shift count in the shift
+     instructions.
+
+`E'
+     An immediate floating operand (expression code `const_double') is
+     allowed, but only if the target floating point format is the same
+     as that of the host machine (on which the compiler is running).
+
+`F'
+     An immediate floating operand (expression code `const_double' or
+     `const_vector') is allowed.
+
+`G', `H'
+     `G' and `H' may be defined in a machine-dependent fashion to
+     permit immediate floating operands in particular ranges of values.
+
+`s'
+     An immediate integer operand whose value is not an explicit
+     integer is allowed.
+
+     This might appear strange; if an insn allows a constant operand
+     with a value not known at compile time, it certainly must allow
+     any known value.  So why use `s' instead of `i'?  Sometimes it
+     allows better code to be generated.
+
+     For example, on the 68000 in a fullword instruction it is possible
+     to use an immediate operand; but if the immediate value is between
+     -128 and 127, better code results from loading the value into a
+     register and using the register.  This is because the load into
+     the register can be done with a `moveq' instruction.  We arrange
+     for this to happen by defining the letter `K' to mean "any integer
+     outside the range -128 to 127", and then specifying `Ks' in the
+     operand constraints.
+
+`g'
+     Any register, memory or immediate integer operand is allowed,
+     except for registers that are not general registers.
+
+`X'
+     Any operand whatsoever is allowed.
+
+`0', `1', `2', ... `9'
+     An operand that matches the specified operand number is allowed.
+     If a digit is used together with letters within the same
+     alternative, the digit should come last.
+
+     This number is allowed to be more than a single digit.  If multiple
+     digits are encountered consecutively, they are interpreted as a
+     single decimal integer.  There is scant chance for ambiguity,
+     since to-date it has never been desirable that `10' be interpreted
+     as matching either operand 1 _or_ operand 0.  Should this be
+     desired, one can use multiple alternatives instead.
+
+     This is called a "matching constraint" and what it really means is
+     that the assembler has only a single operand that fills two roles
+     which `asm' distinguishes.  For example, an add instruction uses
+     two input operands and an output operand, but on most CISC
+     machines an add instruction really has only two operands, one of
+     them an input-output operand:
+
+          addl #35,r12
+
+     Matching constraints are used in these circumstances.  More
+     precisely, the two operands that match must include one input-only
+     operand and one output-only operand.  Moreover, the digit must be a
+     smaller number than the number of the operand that uses it in the
+     constraint.
+
+`p'
+     An operand that is a valid memory address is allowed.  This is for
+     "load address" and "push address" instructions.
+
+     `p' in the constraint must be accompanied by `address_operand' as
+     the predicate in the `match_operand'.  This predicate interprets
+     the mode specified in the `match_operand' as the mode of the memory
+     reference for which the address would be valid.
+
+OTHER-LETTERS
+     Other letters can be defined in machine-dependent fashion to stand
+     for particular classes of registers or other arbitrary operand
+     types.  `d', `a' and `f' are defined on the 68000/68020 to stand
+     for data, address and floating point registers.
+
+
+File: gcc.info,  Node: Multi-Alternative,  Next: Modifiers,  Prev: Simple Constraints,  Up: Constraints
+
+6.40.2 Multiple Alternative Constraints
+---------------------------------------
+
+Sometimes a single instruction has multiple alternative sets of possible
+operands.  For example, on the 68000, a logical-or instruction can
+combine register or an immediate value into memory, or it can combine
+any kind of operand into a register; but it cannot combine one memory
+location into another.
+
+ These constraints are represented as multiple alternatives.  An
+alternative can be described by a series of letters for each operand.
+The overall constraint for an operand is made from the letters for this
+operand from the first alternative, a comma, the letters for this
+operand from the second alternative, a comma, and so on until the last
+alternative.
+
+ If all the operands fit any one alternative, the instruction is valid.
+Otherwise, for each alternative, the compiler counts how many
+instructions must be added to copy the operands so that that
+alternative applies.  The alternative requiring the least copying is
+chosen.  If two alternatives need the same amount of copying, the one
+that comes first is chosen.  These choices can be altered with the `?'
+and `!' characters:
+
+`?'
+     Disparage slightly the alternative that the `?' appears in, as a
+     choice when no alternative applies exactly.  The compiler regards
+     this alternative as one unit more costly for each `?' that appears
+     in it.
+
+`!'
+     Disparage severely the alternative that the `!' appears in.  This
+     alternative can still be used if it fits without reloading, but if
+     reloading is needed, some other alternative will be used.
+
+
+File: gcc.info,  Node: Modifiers,  Next: Machine Constraints,  Prev: Multi-Alternative,  Up: Constraints
+
+6.40.3 Constraint Modifier Characters
+-------------------------------------
+
+Here are constraint modifier characters.
+
+`='
+     Means that this operand is write-only for this instruction: the
+     previous value is discarded and replaced by output data.
+
+`+'
+     Means that this operand is both read and written by the
+     instruction.
+
+     When the compiler fixes up the operands to satisfy the constraints,
+     it needs to know which operands are inputs to the instruction and
+     which are outputs from it.  `=' identifies an output; `+'
+     identifies an operand that is both input and output; all other
+     operands are assumed to be input only.
+
+     If you specify `=' or `+' in a constraint, you put it in the first
+     character of the constraint string.
+
+`&'
+     Means (in a particular alternative) that this operand is an
+     "earlyclobber" operand, which is modified before the instruction is
+     finished using the input operands.  Therefore, this operand may
+     not lie in a register that is used as an input operand or as part
+     of any memory address.
+
+     `&' applies only to the alternative in which it is written.  In
+     constraints with multiple alternatives, sometimes one alternative
+     requires `&' while others do not.  See, for example, the `movdf'
+     insn of the 68000.
+
+     An input operand can be tied to an earlyclobber operand if its only
+     use as an input occurs before the early result is written.  Adding
+     alternatives of this form often allows GCC to produce better code
+     when only some of the inputs can be affected by the earlyclobber.
+     See, for example, the `mulsi3' insn of the ARM.
+
+     `&' does not obviate the need to write `='.
+
+`%'
+     Declares the instruction to be commutative for this operand and the
+     following operand.  This means that the compiler may interchange
+     the two operands if that is the cheapest way to make all operands
+     fit the constraints.  GCC can only handle one commutative pair in
+     an asm; if you use more, the compiler may fail.  Note that you
+     need not use the modifier if the two alternatives are strictly
+     identical; this would only waste time in the reload pass.  The
+     modifier is not operational after register allocation, so the
+     result of `define_peephole2' and `define_split's performed after
+     reload cannot rely on `%' to make the intended insn match.
+
+`#'
+     Says that all following characters, up to the next comma, are to be
+     ignored as a constraint.  They are significant only for choosing
+     register preferences.
+
+`*'
+     Says that the following character should be ignored when choosing
+     register preferences.  `*' has no effect on the meaning of the
+     constraint as a constraint, and no effect on reloading.
+
+
+
+File: gcc.info,  Node: Machine Constraints,  Prev: Modifiers,  Up: Constraints
+
+6.40.4 Constraints for Particular Machines
+------------------------------------------
+
+Whenever possible, you should use the general-purpose constraint letters
+in `asm' arguments, since they will convey meaning more readily to
+people reading your code.  Failing that, use the constraint letters
+that usually have very similar meanings across architectures.  The most
+commonly used constraints are `m' and `r' (for memory and
+general-purpose registers respectively; *note Simple Constraints::), and
+`I', usually the letter indicating the most common immediate-constant
+format.
+
+ Each architecture defines additional constraints.  These constraints
+are used by the compiler itself for instruction generation, as well as
+for `asm' statements; therefore, some of the constraints are not
+particularly useful for `asm'.  Here is a summary of some of the
+machine-dependent constraints available on some particular machines; it
+includes both constraints that are useful for `asm' and constraints
+that aren't.  The compiler source file mentioned in the table heading
+for each architecture is the definitive reference for the meanings of
+that architecture's constraints.
+
+_ARM family--`config/arm/arm.h'_
+
+    `f'
+          Floating-point register
+
+    `w'
+          VFP floating-point register
+
+    `F'
+          One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0,
+          4.0, 5.0 or 10.0
+
+    `G'
+          Floating-point constant that would satisfy the constraint `F'
+          if it were negated
+
+    `I'
+          Integer that is valid as an immediate operand in a data
+          processing instruction.  That is, an integer in the range 0
+          to 255 rotated by a multiple of 2
+
+    `J'
+          Integer in the range -4095 to 4095
+
+    `K'
+          Integer that satisfies constraint `I' when inverted (ones
+          complement)
+
+    `L'
+          Integer that satisfies constraint `I' when negated (twos
+          complement)
+
+    `M'
+          Integer in the range 0 to 32
+
+    `Q'
+          A memory reference where the exact address is in a single
+          register (``m'' is preferable for `asm' statements)
+
+    `R'
+          An item in the constant pool
+
+    `S'
+          A symbol in the text segment of the current file
+
+    `Uv'
+          A memory reference suitable for VFP load/store insns
+          (reg+constant offset)
+
+    `Uy'
+          A memory reference suitable for iWMMXt load/store
+          instructions.
+
+    `Uq'
+          A memory reference suitable for the ARMv4 ldrsb instruction.
+
+_AVR family--`config/avr/constraints.md'_
+
+    `l'
+          Registers from r0 to r15
+
+    `a'
+          Registers from r16 to r23
+
+    `d'
+          Registers from r16 to r31
+
+    `w'
+          Registers from r24 to r31.  These registers can be used in
+          `adiw' command
+
+    `e'
+          Pointer register (r26-r31)
+
+    `b'
+          Base pointer register (r28-r31)
+
+    `q'
+          Stack pointer register (SPH:SPL)
+
+    `t'
+          Temporary register r0
+
+    `x'
+          Register pair X (r27:r26)
+
+    `y'
+          Register pair Y (r29:r28)
+
+    `z'
+          Register pair Z (r31:r30)
+
+    `I'
+          Constant greater than -1, less than 64
+
+    `J'
+          Constant greater than -64, less than 1
+
+    `K'
+          Constant integer 2
+
+    `L'
+          Constant integer 0
+
+    `M'
+          Constant that fits in 8 bits
+
+    `N'
+          Constant integer -1
+
+    `O'
+          Constant integer 8, 16, or 24
+
+    `P'
+          Constant integer 1
+
+    `G'
+          A floating point constant 0.0
+
+    `R'
+          Integer constant in the range -6 ... 5.
+
+    `Q'
+          A memory address based on Y or Z pointer with displacement.
+
+_CRX Architecture--`config/crx/crx.h'_
+
+    `b'
+          Registers from r0 to r14 (registers without stack pointer)
+
+    `l'
+          Register r16 (64-bit accumulator lo register)
+
+    `h'
+          Register r17 (64-bit accumulator hi register)
+
+    `k'
+          Register pair r16-r17. (64-bit accumulator lo-hi pair)
+
+    `I'
+          Constant that fits in 3 bits
+
+    `J'
+          Constant that fits in 4 bits
+
+    `K'
+          Constant that fits in 5 bits
+
+    `L'
+          Constant that is one of -1, 4, -4, 7, 8, 12, 16, 20, 32, 48
+
+    `G'
+          Floating point constant that is legal for store immediate
+
+_Hewlett-Packard PA-RISC--`config/pa/pa.h'_
+
+    `a'
+          General register 1
+
+    `f'
+          Floating point register
+
+    `q'
+          Shift amount register
+
+    `x'
+          Floating point register (deprecated)
+
+    `y'
+          Upper floating point register (32-bit), floating point
+          register (64-bit)
+
+    `Z'
+          Any register
+
+    `I'
+          Signed 11-bit integer constant
+
+    `J'
+          Signed 14-bit integer constant
+
+    `K'
+          Integer constant that can be deposited with a `zdepi'
+          instruction
+
+    `L'
+          Signed 5-bit integer constant
+
+    `M'
+          Integer constant 0
+
+    `N'
+          Integer constant that can be loaded with a `ldil' instruction
+
+    `O'
+          Integer constant whose value plus one is a power of 2
+
+    `P'
+          Integer constant that can be used for `and' operations in
+          `depi' and `extru' instructions
+
+    `S'
+          Integer constant 31
+
+    `U'
+          Integer constant 63
+
+    `G'
+          Floating-point constant 0.0
+
+    `A'
+          A `lo_sum' data-linkage-table memory operand
+
+    `Q'
+          A memory operand that can be used as the destination operand
+          of an integer store instruction
+
+    `R'
+          A scaled or unscaled indexed memory operand
+
+    `T'
+          A memory operand for floating-point loads and stores
+
+    `W'
+          A register indirect memory operand
+
+_picoChip family--`picochip.h'_
+
+    `k'
+          Stack register.
+
+    `f'
+          Pointer register.  A register which can be used to access
+          memory without supplying an offset.  Any other register can
+          be used to access memory, but will need a constant offset.
+          In the case of the offset being zero, it is more efficient to
+          use a pointer register, since this reduces code size.
+
+    `t'
+          A twin register.  A register which may be paired with an
+          adjacent register to create a 32-bit register.
+
+    `a'
+          Any absolute memory address (e.g., symbolic constant, symbolic
+          constant + offset).
+
+    `I'
+          4-bit signed integer.
+
+    `J'
+          4-bit unsigned integer.
+
+    `K'
+          8-bit signed integer.
+
+    `M'
+          Any constant whose absolute value is no greater than 4-bits.
+
+    `N'
+          10-bit signed integer
+
+    `O'
+          16-bit signed integer.
+
+
+_PowerPC and IBM RS6000--`config/rs6000/rs6000.h'_
+
+    `b'
+          Address base register
+
+    `d'
+          Floating point register (containing 64-bit value)
+
+    `f'
+          Floating point register (containing 32-bit value)
+
+    `v'
+          Altivec vector register
+
+    `wd'
+          VSX vector register to hold vector double data
+
+    `wf'
+          VSX vector register to hold vector float data
+
+    `ws'
+          VSX vector register to hold scalar float data
+
+    `wa'
+          Any VSX register
+
+    `h'
+          `MQ', `CTR', or `LINK' register
+
+    `q'
+          `MQ' register
+
+    `c'
+          `CTR' register
+
+    `l'
+          `LINK' register
+
+    `x'
+          `CR' register (condition register) number 0
+
+    `y'
+          `CR' register (condition register)
+
+    `z'
+          `FPMEM' stack memory for FPR-GPR transfers
+
+    `I'
+          Signed 16-bit constant
+
+    `J'
+          Unsigned 16-bit constant shifted left 16 bits (use `L'
+          instead for `SImode' constants)
+
+    `K'
+          Unsigned 16-bit constant
+
+    `L'
+          Signed 16-bit constant shifted left 16 bits
+
+    `M'
+          Constant larger than 31
+
+    `N'
+          Exact power of 2
+
+    `O'
+          Zero
+
+    `P'
+          Constant whose negation is a signed 16-bit constant
+
+    `G'
+          Floating point constant that can be loaded into a register
+          with one instruction per word
+
+    `H'
+          Integer/Floating point constant that can be loaded into a
+          register using three instructions
+
+    `m'
+          Memory operand.  Note that on PowerPC targets, `m' can include
+          addresses that update the base register.  It is therefore
+          only safe to use `m' in an `asm' statement if that `asm'
+          statement accesses the operand exactly once.  The `asm'
+          statement must also use `%U<OPNO>' as a placeholder for the
+          "update" flag in the corresponding load or store instruction.
+          For example:
+
+               asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
+
+          is correct but:
+
+               asm ("st %1,%0" : "=m" (mem) : "r" (val));
+
+          is not.  Use `es' rather than `m' if you don't want the base
+          register to be updated.
+
+    `es'
+          A "stable" memory operand; that is, one which does not
+          include any automodification of the base register.  Unlike
+          `m', this constraint can be used in `asm' statements that
+          might access the operand several times, or that might not
+          access it at all.
+
+    `Q'
+          Memory operand that is an offset from a register (it is
+          usually better to use `m' or `es' in `asm' statements)
+
+    `Z'
+          Memory operand that is an indexed or indirect from a register
+          (it is usually better to use `m' or `es' in `asm' statements)
+
+    `R'
+          AIX TOC entry
+
+    `a'
+          Address operand that is an indexed or indirect from a
+          register (`p' is preferable for `asm' statements)
+
+    `S'
+          Constant suitable as a 64-bit mask operand
+
+    `T'
+          Constant suitable as a 32-bit mask operand
+
+    `U'
+          System V Release 4 small data area reference
+
+    `t'
+          AND masks that can be performed by two rldic{l, r}
+          instructions
+
+    `W'
+          Vector constant that does not require memory
+
+    `j'
+          Vector constant that is all zeros.
+
+
+_Intel 386--`config/i386/constraints.md'_
+
+    `R'
+          Legacy register--the eight integer registers available on all
+          i386 processors (`a', `b', `c', `d', `si', `di', `bp', `sp').
+
+    `q'
+          Any register accessible as `Rl'.  In 32-bit mode, `a', `b',
+          `c', and `d'; in 64-bit mode, any integer register.
+
+    `Q'
+          Any register accessible as `Rh': `a', `b', `c', and `d'.
+
+    `a'
+          The `a' register.
+
+    `b'
+          The `b' register.
+
+    `c'
+          The `c' register.
+
+    `d'
+          The `d' register.
+
+    `S'
+          The `si' register.
+
+    `D'
+          The `di' register.
+
+    `A'
+          The `a' and `d' registers, as a pair (for instructions that
+          return half the result in one and half in the other).
+
+    `f'
+          Any 80387 floating-point (stack) register.
+
+    `t'
+          Top of 80387 floating-point stack (`%st(0)').
+
+    `u'
+          Second from top of 80387 floating-point stack (`%st(1)').
+
+    `y'
+          Any MMX register.
+
+    `x'
+          Any SSE register.
+
+    `Yz'
+          First SSE register (`%xmm0').
+
+    `I'
+          Integer constant in the range 0 ... 31, for 32-bit shifts.
+
+    `J'
+          Integer constant in the range 0 ... 63, for 64-bit shifts.
+
+    `K'
+          Signed 8-bit integer constant.
+
+    `L'
+          `0xFF' or `0xFFFF', for andsi as a zero-extending move.
+
+    `M'
+          0, 1, 2, or 3 (shifts for the `lea' instruction).
+
+    `N'
+          Unsigned 8-bit integer constant (for `in' and `out'
+          instructions).
+
+    `G'
+          Standard 80387 floating point constant.
+
+    `C'
+          Standard SSE floating point constant.
+
+    `e'
+          32-bit signed integer constant, or a symbolic reference known
+          to fit that range (for immediate operands in sign-extending
+          x86-64 instructions).
+
+    `Z'
+          32-bit unsigned integer constant, or a symbolic reference
+          known to fit that range (for immediate operands in
+          zero-extending x86-64 instructions).
+
+
+_Intel IA-64--`config/ia64/ia64.h'_
+
+    `a'
+          General register `r0' to `r3' for `addl' instruction
+
+    `b'
+          Branch register
+
+    `c'
+          Predicate register (`c' as in "conditional")
+
+    `d'
+          Application register residing in M-unit
+
+    `e'
+          Application register residing in I-unit
+
+    `f'
+          Floating-point register
+
+    `m'
+          Memory operand.  Remember that `m' allows postincrement and
+          postdecrement which require printing with `%Pn' on IA-64.
+          Use `S' to disallow postincrement and postdecrement.
+
+    `G'
+          Floating-point constant 0.0 or 1.0
+
+    `I'
+          14-bit signed integer constant
+
+    `J'
+          22-bit signed integer constant
+
+    `K'
+          8-bit signed integer constant for logical instructions
+
+    `L'
+          8-bit adjusted signed integer constant for compare pseudo-ops
+
+    `M'
+          6-bit unsigned integer constant for shift counts
+
+    `N'
+          9-bit signed integer constant for load and store
+          postincrements
+
+    `O'
+          The constant zero
+
+    `P'
+          0 or -1 for `dep' instruction
+
+    `Q'
+          Non-volatile memory for floating-point loads and stores
+
+    `R'
+          Integer constant in the range 1 to 4 for `shladd' instruction
+
+    `S'
+          Memory operand except postincrement and postdecrement
+
+_FRV--`config/frv/frv.h'_
+
+    `a'
+          Register in the class `ACC_REGS' (`acc0' to `acc7').
+
+    `b'
+          Register in the class `EVEN_ACC_REGS' (`acc0' to `acc7').
+
+    `c'
+          Register in the class `CC_REGS' (`fcc0' to `fcc3' and `icc0'
+          to `icc3').
+
+    `d'
+          Register in the class `GPR_REGS' (`gr0' to `gr63').
+
+    `e'
+          Register in the class `EVEN_REGS' (`gr0' to `gr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `f'
+          Register in the class `FPR_REGS' (`fr0' to `fr63').
+
+    `h'
+          Register in the class `FEVEN_REGS' (`fr0' to `fr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `l'
+          Register in the class `LR_REG' (the `lr' register).
+
+    `q'
+          Register in the class `QUAD_REGS' (`gr2' to `gr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `t'
+          Register in the class `ICC_REGS' (`icc0' to `icc3').
+
+    `u'
+          Register in the class `FCC_REGS' (`fcc0' to `fcc3').
+
+    `v'
+          Register in the class `ICR_REGS' (`cc4' to `cc7').
+
+    `w'
+          Register in the class `FCR_REGS' (`cc0' to `cc3').
+
+    `x'
+          Register in the class `QUAD_FPR_REGS' (`fr0' to `fr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `z'
+          Register in the class `SPR_REGS' (`lcr' and `lr').
+
+    `A'
+          Register in the class `QUAD_ACC_REGS' (`acc0' to `acc7').
+
+    `B'
+          Register in the class `ACCG_REGS' (`accg0' to `accg7').
+
+    `C'
+          Register in the class `CR_REGS' (`cc0' to `cc7').
+
+    `G'
+          Floating point constant zero
+
+    `I'
+          6-bit signed integer constant
+
+    `J'
+          10-bit signed integer constant
+
+    `L'
+          16-bit signed integer constant
+
+    `M'
+          16-bit unsigned integer constant
+
+    `N'
+          12-bit signed integer constant that is negative--i.e. in the
+          range of -2048 to -1
+
+    `O'
+          Constant zero
+
+    `P'
+          12-bit signed integer constant that is greater than
+          zero--i.e. in the range of 1 to 2047.
+
+
+_Blackfin family--`config/bfin/constraints.md'_
+
+    `a'
+          P register
+
+    `d'
+          D register
+
+    `z'
+          A call clobbered P register.
+
+    `qN'
+          A single register.  If N is in the range 0 to 7, the
+          corresponding D register.  If it is `A', then the register P0.
+
+    `D'
+          Even-numbered D register
+
+    `W'
+          Odd-numbered D register
+
+    `e'
+          Accumulator register.
+
+    `A'
+          Even-numbered accumulator register.
+
+    `B'
+          Odd-numbered accumulator register.
+
+    `b'
+          I register
+
+    `v'
+          B register
+
+    `f'
+          M register
+
+    `c'
+          Registers used for circular buffering, i.e. I, B, or L
+          registers.
+
+    `C'
+          The CC register.
+
+    `t'
+          LT0 or LT1.
+
+    `k'
+          LC0 or LC1.
+
+    `u'
+          LB0 or LB1.
+
+    `x'
+          Any D, P, B, M, I or L register.
+
+    `y'
+          Additional registers typically used only in prologues and
+          epilogues: RETS, RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and
+          USP.
+
+    `w'
+          Any register except accumulators or CC.
+
+    `Ksh'
+          Signed 16 bit integer (in the range -32768 to 32767)
+
+    `Kuh'
+          Unsigned 16 bit integer (in the range 0 to 65535)
+
+    `Ks7'
+          Signed 7 bit integer (in the range -64 to 63)
+
+    `Ku7'
+          Unsigned 7 bit integer (in the range 0 to 127)
+
+    `Ku5'
+          Unsigned 5 bit integer (in the range 0 to 31)
+
+    `Ks4'
+          Signed 4 bit integer (in the range -8 to 7)
+
+    `Ks3'
+          Signed 3 bit integer (in the range -3 to 4)
+
+    `Ku3'
+          Unsigned 3 bit integer (in the range 0 to 7)
+
+    `PN'
+          Constant N, where N is a single-digit constant in the range 0
+          to 4.
+
+    `PA'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use with either accumulator.
+
+    `PB'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use only with accumulator A1.
+
+    `M1'
+          Constant 255.
+
+    `M2'
+          Constant 65535.
+
+    `J'
+          An integer constant with exactly a single bit set.
+
+    `L'
+          An integer constant with all bits set except exactly one.
+
+    `H'
+
+    `Q'
+          Any SYMBOL_REF.
+
+_M32C--`config/m32c/m32c.c'_
+
+    `Rsp'
+    `Rfb'
+    `Rsb'
+          `$sp', `$fb', `$sb'.
+
+    `Rcr'
+          Any control register, when they're 16 bits wide (nothing if
+          control registers are 24 bits wide)
+
+    `Rcl'
+          Any control register, when they're 24 bits wide.
+
+    `R0w'
+    `R1w'
+    `R2w'
+    `R3w'
+          $r0, $r1, $r2, $r3.
+
+    `R02'
+          $r0 or $r2, or $r2r0 for 32 bit values.
+
+    `R13'
+          $r1 or $r3, or $r3r1 for 32 bit values.
+
+    `Rdi'
+          A register that can hold a 64 bit value.
+
+    `Rhl'
+          $r0 or $r1 (registers with addressable high/low bytes)
+
+    `R23'
+          $r2 or $r3
+
+    `Raa'
+          Address registers
+
+    `Raw'
+          Address registers when they're 16 bits wide.
+
+    `Ral'
+          Address registers when they're 24 bits wide.
+
+    `Rqi'
+          Registers that can hold QI values.
+
+    `Rad'
+          Registers that can be used with displacements ($a0, $a1, $sb).
+
+    `Rsi'
+          Registers that can hold 32 bit values.
+
+    `Rhi'
+          Registers that can hold 16 bit values.
+
+    `Rhc'
+          Registers chat can hold 16 bit values, including all control
+          registers.
+
+    `Rra'
+          $r0 through R1, plus $a0 and $a1.
+
+    `Rfl'
+          The flags register.
+
+    `Rmm'
+          The memory-based pseudo-registers $mem0 through $mem15.
+
+    `Rpi'
+          Registers that can hold pointers (16 bit registers for r8c,
+          m16c; 24 bit registers for m32cm, m32c).
+
+    `Rpa'
+          Matches multiple registers in a PARALLEL to form a larger
+          register.  Used to match function return values.
+
+    `Is3'
+          -8 ... 7
+
+    `IS1'
+          -128 ... 127
+
+    `IS2'
+          -32768 ... 32767
+
+    `IU2'
+          0 ... 65535
+
+    `In4'
+          -8 ... -1 or 1 ... 8
+
+    `In5'
+          -16 ... -1 or 1 ... 16
+
+    `In6'
+          -32 ... -1 or 1 ... 32
+
+    `IM2'
+          -65536 ... -1
+
+    `Ilb'
+          An 8 bit value with exactly one bit set.
+
+    `Ilw'
+          A 16 bit value with exactly one bit set.
+
+    `Sd'
+          The common src/dest memory addressing modes.
+
+    `Sa'
+          Memory addressed using $a0 or $a1.
+
+    `Si'
+          Memory addressed with immediate addresses.
+
+    `Ss'
+          Memory addressed using the stack pointer ($sp).
+
+    `Sf'
+          Memory addressed using the frame base register ($fb).
+
+    `Ss'
+          Memory addressed using the small base register ($sb).
+
+    `S1'
+          $r1h
+
+_MeP--`config/mep/constraints.md'_
+
+    `a'
+          The $sp register.
+
+    `b'
+          The $tp register.
+
+    `c'
+          Any control register.
+
+    `d'
+          Either the $hi or the $lo register.
+
+    `em'
+          Coprocessor registers that can be directly loaded ($c0-$c15).
+
+    `ex'
+          Coprocessor registers that can be moved to each other.
+
+    `er'
+          Coprocessor registers that can be moved to core registers.
+
+    `h'
+          The $hi register.
+
+    `j'
+          The $rpc register.
+
+    `l'
+          The $lo register.
+
+    `t'
+          Registers which can be used in $tp-relative addressing.
+
+    `v'
+          The $gp register.
+
+    `x'
+          The coprocessor registers.
+
+    `y'
+          The coprocessor control registers.
+
+    `z'
+          The $0 register.
+
+    `A'
+          User-defined register set A.
+
+    `B'
+          User-defined register set B.
+
+    `C'
+          User-defined register set C.
+
+    `D'
+          User-defined register set D.
+
+    `I'
+          Offsets for $gp-rel addressing.
+
+    `J'
+          Constants that can be used directly with boolean insns.
+
+    `K'
+          Constants that can be moved directly to registers.
+
+    `L'
+          Small constants that can be added to registers.
+
+    `M'
+          Long shift counts.
+
+    `N'
+          Small constants that can be compared to registers.
+
+    `O'
+          Constants that can be loaded into the top half of registers.
+
+    `S'
+          Signed 8-bit immediates.
+
+    `T'
+          Symbols encoded for $tp-rel or $gp-rel addressing.
+
+    `U'
+          Non-constant addresses for loading/saving coprocessor
+          registers.
+
+    `W'
+          The top half of a symbol's value.
+
+    `Y'
+          A register indirect address without offset.
+
+    `Z'
+          Symbolic references to the control bus.
+
+
+_MIPS--`config/mips/constraints.md'_
+
+    `d'
+          An address register.  This is equivalent to `r' unless
+          generating MIPS16 code.
+
+    `f'
+          A floating-point register (if available).
+
+    `h'
+          Formerly the `hi' register.  This constraint is no longer
+          supported.
+
+    `l'
+          The `lo' register.  Use this register to store values that are
+          no bigger than a word.
+
+    `x'
+          The concatenated `hi' and `lo' registers.  Use this register
+          to store doubleword values.
+
+    `c'
+          A register suitable for use in an indirect jump.  This will
+          always be `$25' for `-mabicalls'.
+
+    `v'
+          Register `$3'.  Do not use this constraint in new code; it is
+          retained only for compatibility with glibc.
+
+    `y'
+          Equivalent to `r'; retained for backwards compatibility.
+
+    `z'
+          A floating-point condition code register.
+
+    `I'
+          A signed 16-bit constant (for arithmetic instructions).
+
+    `J'
+          Integer zero.
+
+    `K'
+          An unsigned 16-bit constant (for logic instructions).
+
+    `L'
+          A signed 32-bit constant in which the lower 16 bits are zero.
+          Such constants can be loaded using `lui'.
+
+    `M'
+          A constant that cannot be loaded using `lui', `addiu' or
+          `ori'.
+
+    `N'
+          A constant in the range -65535 to -1 (inclusive).
+
+    `O'
+          A signed 15-bit constant.
+
+    `P'
+          A constant in the range 1 to 65535 (inclusive).
+
+    `G'
+          Floating-point zero.
+
+    `R'
+          An address that can be used in a non-macro load or store.
+
+_Motorola 680x0--`config/m68k/constraints.md'_
+
+    `a'
+          Address register
+
+    `d'
+          Data register
+
+    `f'
+          68881 floating-point register, if available
+
+    `I'
+          Integer in the range 1 to 8
+
+    `J'
+          16-bit signed number
+
+    `K'
+          Signed number whose magnitude is greater than 0x80
+
+    `L'
+          Integer in the range -8 to -1
+
+    `M'
+          Signed number whose magnitude is greater than 0x100
+
+    `N'
+          Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate
+
+    `O'
+          16 (for rotate using swap)
+
+    `P'
+          Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate
+
+    `R'
+          Numbers that mov3q can handle
+
+    `G'
+          Floating point constant that is not a 68881 constant
+
+    `S'
+          Operands that satisfy 'm' when -mpcrel is in effect
+
+    `T'
+          Operands that satisfy 's' when -mpcrel is not in effect
+
+    `Q'
+          Address register indirect addressing mode
+
+    `U'
+          Register offset addressing
+
+    `W'
+          const_call_operand
+
+    `Cs'
+          symbol_ref or const
+
+    `Ci'
+          const_int
+
+    `C0'
+          const_int 0
+
+    `Cj'
+          Range of signed numbers that don't fit in 16 bits
+
+    `Cmvq'
+          Integers valid for mvq
+
+    `Capsw'
+          Integers valid for a moveq followed by a swap
+
+    `Cmvz'
+          Integers valid for mvz
+
+    `Cmvs'
+          Integers valid for mvs
+
+    `Ap'
+          push_operand
+
+    `Ac'
+          Non-register operands allowed in clr
+
+
+_Motorola 68HC11 & 68HC12 families--`config/m68hc11/m68hc11.h'_
+
+    `a'
+          Register `a'
+
+    `b'
+          Register `b'
+
+    `d'
+          Register `d'
+
+    `q'
+          An 8-bit register
+
+    `t'
+          Temporary soft register _.tmp
+
+    `u'
+          A soft register _.d1 to _.d31
+
+    `w'
+          Stack pointer register
+
+    `x'
+          Register `x'
+
+    `y'
+          Register `y'
+
+    `z'
+          Pseudo register `z' (replaced by `x' or `y' at the end)
+
+    `A'
+          An address register: x, y or z
+
+    `B'
+          An address register: x or y
+
+    `D'
+          Register pair (x:d) to form a 32-bit value
+
+    `L'
+          Constants in the range -65536 to 65535
+
+    `M'
+          Constants whose 16-bit low part is zero
+
+    `N'
+          Constant integer 1 or -1
+
+    `O'
+          Constant integer 16
+
+    `P'
+          Constants in the range -8 to 2
+
+
+_Moxie--`config/moxie/constraints.md'_
+
+    `A'
+          An absolute address
+
+    `B'
+          An offset address
+
+    `W'
+          A register indirect memory operand
+
+    `I'
+          A constant in the range of 0 to 255.
+
+    `N'
+          A constant in the range of 0 to -255.
+
+
+_RX--`config/rx/constraints.md'_
+
+    `Q'
+          An address which does not involve register indirect
+          addressing or pre/post increment/decrement addressing.
+
+    `Symbol'
+          A symbol reference.
+
+    `Int08'
+          A constant in the range -256 to 255, inclusive.
+
+    `Sint08'
+          A constant in the range -128 to 127, inclusive.
+
+    `Sint16'
+          A constant in the range -32768 to 32767, inclusive.
+
+    `Sint24'
+          A constant in the range -8388608 to 8388607, inclusive.
+
+    `Uint04'
+          A constant in the range 0 to 15, inclusive.
+
+
+_SPARC--`config/sparc/sparc.h'_
+
+    `f'
+          Floating-point register on the SPARC-V8 architecture and
+          lower floating-point register on the SPARC-V9 architecture.
+
+    `e'
+          Floating-point register.  It is equivalent to `f' on the
+          SPARC-V8 architecture and contains both lower and upper
+          floating-point registers on the SPARC-V9 architecture.
+
+    `c'
+          Floating-point condition code register.
+
+    `d'
+          Lower floating-point register.  It is only valid on the
+          SPARC-V9 architecture when the Visual Instruction Set is
+          available.
+
+    `b'
+          Floating-point register.  It is only valid on the SPARC-V9
+          architecture when the Visual Instruction Set is available.
+
+    `h'
+          64-bit global or out register for the SPARC-V8+ architecture.
+
+    `D'
+          A vector constant
+
+    `I'
+          Signed 13-bit constant
+
+    `J'
+          Zero
+
+    `K'
+          32-bit constant with the low 12 bits clear (a constant that
+          can be loaded with the `sethi' instruction)
+
+    `L'
+          A constant in the range supported by `movcc' instructions
+
+    `M'
+          A constant in the range supported by `movrcc' instructions
+
+    `N'
+          Same as `K', except that it verifies that bits that are not
+          in the lower 32-bit range are all zero.  Must be used instead
+          of `K' for modes wider than `SImode'
+
+    `O'
+          The constant 4096
+
+    `G'
+          Floating-point zero
+
+    `H'
+          Signed 13-bit constant, sign-extended to 32 or 64 bits
+
+    `Q'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single sethi
+          instruction
+
+    `R'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single mov instruction
+
+    `S'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a high/lo_sum
+          instruction sequence
+
+    `T'
+          Memory address aligned to an 8-byte boundary
+
+    `U'
+          Even register
+
+    `W'
+          Memory address for `e' constraint registers
+
+    `Y'
+          Vector zero
+
+
+_SPU--`config/spu/spu.h'_
+
+    `a'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 64 bit value.
+
+    `c'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 64 bit value.
+
+    `d'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 64 bit value.
+
+    `f'
+          An immediate which can be loaded with `fsmbi'.
+
+    `A'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 32 bit value.
+
+    `B'
+          An immediate for most arithmetic instructions.  const_int is
+          treated as a 32 bit value.
+
+    `C'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 32 bit value.
+
+    `D'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 32 bit value.
+
+    `I'
+          A constant in the range [-64, 63] for shift/rotate
+          instructions.
+
+    `J'
+          An unsigned 7-bit constant for conversion/nop/channel
+          instructions.
+
+    `K'
+          A signed 10-bit constant for most arithmetic instructions.
+
+    `M'
+          A signed 16 bit immediate for `stop'.
+
+    `N'
+          An unsigned 16-bit constant for `iohl' and `fsmbi'.
+
+    `O'
+          An unsigned 7-bit constant whose 3 least significant bits are
+          0.
+
+    `P'
+          An unsigned 3-bit constant for 16-byte rotates and shifts
+
+    `R'
+          Call operand, reg, for indirect calls
+
+    `S'
+          Call operand, symbol, for relative calls.
+
+    `T'
+          Call operand, const_int, for absolute calls.
+
+    `U'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is sign extended to 128 bit.
+
+    `W'
+          An immediate for shift and rotate instructions.  const_int is
+          treated as a 32 bit value.
+
+    `Y'
+          An immediate for and/xor/or instructions.  const_int is sign
+          extended as a 128 bit.
+
+    `Z'
+          An immediate for the `iohl' instruction.  const_int is sign
+          extended to 128 bit.
+
+
+_S/390 and zSeries--`config/s390/s390.h'_
+
+    `a'
+          Address register (general purpose register except r0)
+
+    `c'
+          Condition code register
+
+    `d'
+          Data register (arbitrary general purpose register)
+
+    `f'
+          Floating-point register
+
+    `I'
+          Unsigned 8-bit constant (0-255)
+
+    `J'
+          Unsigned 12-bit constant (0-4095)
+
+    `K'
+          Signed 16-bit constant (-32768-32767)
+
+    `L'
+          Value appropriate as displacement.
+         `(0..4095)'
+               for short displacement
+
+         `(-524288..524287)'
+               for long displacement
+
+    `M'
+          Constant integer with a value of 0x7fffffff.
+
+    `N'
+          Multiple letter constraint followed by 4 parameter letters.
+         `0..9:'
+               number of the part counting from most to least
+               significant
+
+         `H,Q:'
+               mode of the part
+
+         `D,S,H:'
+               mode of the containing operand
+
+         `0,F:'
+               value of the other parts (F--all bits set)
+          The constraint matches if the specified part of a constant
+          has a value different from its other parts.
+
+    `Q'
+          Memory reference without index register and with short
+          displacement.
+
+    `R'
+          Memory reference with index register and short displacement.
+
+    `S'
+          Memory reference without index register but with long
+          displacement.
+
+    `T'
+          Memory reference with index register and long displacement.
+
+    `U'
+          Pointer with short displacement.
+
+    `W'
+          Pointer with long displacement.
+
+    `Y'
+          Shift count operand.
+
+
+_Score family--`config/score/score.h'_
+
+    `d'
+          Registers from r0 to r32.
+
+    `e'
+          Registers from r0 to r16.
+
+    `t'
+          r8--r11 or r22--r27 registers.
+
+    `h'
+          hi register.
+
+    `l'
+          lo register.
+
+    `x'
+          hi + lo register.
+
+    `q'
+          cnt register.
+
+    `y'
+          lcb register.
+
+    `z'
+          scb register.
+
+    `a'
+          cnt + lcb + scb register.
+
+    `c'
+          cr0--cr15 register.
+
+    `b'
+          cp1 registers.
+
+    `f'
+          cp2 registers.
+
+    `i'
+          cp3 registers.
+
+    `j'
+          cp1 + cp2 + cp3 registers.
+
+    `I'
+          High 16-bit constant (32-bit constant with 16 LSBs zero).
+
+    `J'
+          Unsigned 5 bit integer (in the range 0 to 31).
+
+    `K'
+          Unsigned 16 bit integer (in the range 0 to 65535).
+
+    `L'
+          Signed 16 bit integer (in the range -32768 to 32767).
+
+    `M'
+          Unsigned 14 bit integer (in the range 0 to 16383).
+
+    `N'
+          Signed 14 bit integer (in the range -8192 to 8191).
+
+    `Z'
+          Any SYMBOL_REF.
+
+_Xstormy16--`config/stormy16/stormy16.h'_
+
+    `a'
+          Register r0.
+
+    `b'
+          Register r1.
+
+    `c'
+          Register r2.
+
+    `d'
+          Register r8.
+
+    `e'
+          Registers r0 through r7.
+
+    `t'
+          Registers r0 and r1.
+
+    `y'
+          The carry register.
+
+    `z'
+          Registers r8 and r9.
+
+    `I'
+          A constant between 0 and 3 inclusive.
+
+    `J'
+          A constant that has exactly one bit set.
+
+    `K'
+          A constant that has exactly one bit clear.
+
+    `L'
+          A constant between 0 and 255 inclusive.
+
+    `M'
+          A constant between -255 and 0 inclusive.
+
+    `N'
+          A constant between -3 and 0 inclusive.
+
+    `O'
+          A constant between 1 and 4 inclusive.
+
+    `P'
+          A constant between -4 and -1 inclusive.
+
+    `Q'
+          A memory reference that is a stack push.
+
+    `R'
+          A memory reference that is a stack pop.
+
+    `S'
+          A memory reference that refers to a constant address of known
+          value.
+
+    `T'
+          The register indicated by Rx (not implemented yet).
+
+    `U'
+          A constant that is not between 2 and 15 inclusive.
+
+    `Z'
+          The constant 0.
+
+
+_Xtensa--`config/xtensa/constraints.md'_
+
+    `a'
+          General-purpose 32-bit register
+
+    `b'
+          One-bit boolean register
+
+    `A'
+          MAC16 40-bit accumulator register
+
+    `I'
+          Signed 12-bit integer constant, for use in MOVI instructions
+
+    `J'
+          Signed 8-bit integer constant, for use in ADDI instructions
+
+    `K'
+          Integer constant valid for BccI instructions
+
+    `L'
+          Unsigned constant valid for BccUI instructions
+
+
+
+
+File: gcc.info,  Node: Asm Labels,  Next: Explicit Reg Vars,  Prev: Constraints,  Up: C Extensions
+
+6.41 Controlling Names Used in Assembler Code
+=============================================
+
+You can specify the name to be used in the assembler code for a C
+function or variable by writing the `asm' (or `__asm__') keyword after
+the declarator as follows:
+
+     int foo asm ("myfoo") = 2;
+
+This specifies that the name to be used for the variable `foo' in the
+assembler code should be `myfoo' rather than the usual `_foo'.
+
+ On systems where an underscore is normally prepended to the name of a C
+function or variable, this feature allows you to define names for the
+linker that do not start with an underscore.
+
+ It does not make sense to use this feature with a non-static local
+variable since such variables do not have assembler names.  If you are
+trying to put the variable in a particular register, see *note Explicit
+Reg Vars::.  GCC presently accepts such code with a warning, but will
+probably be changed to issue an error, rather than a warning, in the
+future.
+
+ You cannot use `asm' in this way in a function _definition_; but you
+can get the same effect by writing a declaration for the function
+before its definition and putting `asm' there, like this:
+
+     extern func () asm ("FUNC");
+
+     func (x, y)
+          int x, y;
+     /* ... */
+
+ It is up to you to make sure that the assembler names you choose do not
+conflict with any other assembler symbols.  Also, you must not use a
+register name; that would produce completely invalid assembler code.
+GCC does not as yet have the ability to store static variables in
+registers.  Perhaps that will be added.
+
+
+File: gcc.info,  Node: Explicit Reg Vars,  Next: Alternate Keywords,  Prev: Asm Labels,  Up: C Extensions
+
+6.42 Variables in Specified Registers
+=====================================
+
+GNU C allows you to put a few global variables into specified hardware
+registers.  You can also specify the register in which an ordinary
+register variable should be allocated.
+
+   * Global register variables reserve registers throughout the program.
+     This may be useful in programs such as programming language
+     interpreters which have a couple of global variables that are
+     accessed very often.
+
+   * Local register variables in specific registers do not reserve the
+     registers, except at the point where they are used as input or
+     output operands in an `asm' statement and the `asm' statement
+     itself is not deleted.  The compiler's data flow analysis is
+     capable of determining where the specified registers contain live
+     values, and where they are available for other uses.  Stores into
+     local register variables may be deleted when they appear to be
+     dead according to dataflow analysis.  References to local register
+     variables may be deleted or moved or simplified.
+
+     These local variables are sometimes convenient for use with the
+     extended `asm' feature (*note Extended Asm::), if you want to
+     write one output of the assembler instruction directly into a
+     particular register.  (This will work provided the register you
+     specify fits the constraints specified for that operand in the
+     `asm'.)
+
+* Menu:
+
+* Global Reg Vars::
+* Local Reg Vars::
+
+
+File: gcc.info,  Node: Global Reg Vars,  Next: Local Reg Vars,  Up: Explicit Reg Vars
+
+6.42.1 Defining Global Register Variables
+-----------------------------------------
+
+You can define a global register variable in GNU C like this:
+
+     register int *foo asm ("a5");
+
+Here `a5' is the name of the register which should be used.  Choose a
+register which is normally saved and restored by function calls on your
+machine, so that library routines will not clobber it.
+
+ Naturally the register name is cpu-dependent, so you would need to
+conditionalize your program according to cpu type.  The register `a5'
+would be a good choice on a 68000 for a variable of pointer type.  On
+machines with register windows, be sure to choose a "global" register
+that is not affected magically by the function call mechanism.
+
+ In addition, operating systems on one type of cpu may differ in how
+they name the registers; then you would need additional conditionals.
+For example, some 68000 operating systems call this register `%a5'.
+
+ Eventually there may be a way of asking the compiler to choose a
+register automatically, but first we need to figure out how it should
+choose and how to enable you to guide the choice.  No solution is
+evident.
+
+ Defining a global register variable in a certain register reserves that
+register entirely for this use, at least within the current compilation.
+The register will not be allocated for any other purpose in the
+functions in the current compilation.  The register will not be saved
+and restored by these functions.  Stores into this register are never
+deleted even if they would appear to be dead, but references may be
+deleted or moved or simplified.
+
+ It is not safe to access the global register variables from signal
+handlers, or from more than one thread of control, because the system
+library routines may temporarily use the register for other things
+(unless you recompile them specially for the task at hand).
+
+ It is not safe for one function that uses a global register variable to
+call another such function `foo' by way of a third function `lose' that
+was compiled without knowledge of this variable (i.e. in a different
+source file in which the variable wasn't declared).  This is because
+`lose' might save the register and put some other value there.  For
+example, you can't expect a global register variable to be available in
+the comparison-function that you pass to `qsort', since `qsort' might
+have put something else in that register.  (If you are prepared to
+recompile `qsort' with the same global register variable, you can solve
+this problem.)
+
+ If you want to recompile `qsort' or other source files which do not
+actually use your global register variable, so that they will not use
+that register for any other purpose, then it suffices to specify the
+compiler option `-ffixed-REG'.  You need not actually add a global
+register declaration to their source code.
+
+ A function which can alter the value of a global register variable
+cannot safely be called from a function compiled without this variable,
+because it could clobber the value the caller expects to find there on
+return.  Therefore, the function which is the entry point into the part
+of the program that uses the global register variable must explicitly
+save and restore the value which belongs to its caller.
+
+ On most machines, `longjmp' will restore to each global register
+variable the value it had at the time of the `setjmp'.  On some
+machines, however, `longjmp' will not change the value of global
+register variables.  To be portable, the function that called `setjmp'
+should make other arrangements to save the values of the global register
+variables, and to restore them in a `longjmp'.  This way, the same
+thing will happen regardless of what `longjmp' does.
+
+ All global register variable declarations must precede all function
+definitions.  If such a declaration could appear after function
+definitions, the declaration would be too late to prevent the register
+from being used for other purposes in the preceding functions.
+
+ Global register variables may not have initial values, because an
+executable file has no means to supply initial contents for a register.
+
+ On the SPARC, there are reports that g3 ... g7 are suitable registers,
+but certain library functions, such as `getwd', as well as the
+subroutines for division and remainder, modify g3 and g4.  g1 and g2
+are local temporaries.
+
+ On the 68000, a2 ... a5 should be suitable, as should d2 ... d7.  Of
+course, it will not do to use more than a few of those.
+
+
+File: gcc.info,  Node: Local Reg Vars,  Prev: Global Reg Vars,  Up: Explicit Reg Vars
+
+6.42.2 Specifying Registers for Local Variables
+-----------------------------------------------
+
+You can define a local register variable with a specified register like
+this:
+
+     register int *foo asm ("a5");
+
+Here `a5' is the name of the register which should be used.  Note that
+this is the same syntax used for defining global register variables,
+but for a local variable it would appear within a function.
+
+ Naturally the register name is cpu-dependent, but this is not a
+problem, since specific registers are most often useful with explicit
+assembler instructions (*note Extended Asm::).  Both of these things
+generally require that you conditionalize your program according to cpu
+type.
+
+ In addition, operating systems on one type of cpu may differ in how
+they name the registers; then you would need additional conditionals.
+For example, some 68000 operating systems call this register `%a5'.
+
+ Defining such a register variable does not reserve the register; it
+remains available for other uses in places where flow control determines
+the variable's value is not live.
+
+ This option does not guarantee that GCC will generate code that has
+this variable in the register you specify at all times.  You may not
+code an explicit reference to this register in the _assembler
+instruction template_ part of an `asm' statement and assume it will
+always refer to this variable.  However, using the variable as an `asm'
+_operand_ guarantees that the specified register is used for the
+operand.
+
+ Stores into local register variables may be deleted when they appear
+to be dead according to dataflow analysis.  References to local
+register variables may be deleted or moved or simplified.
+
+ As for global register variables, it's recommended that you choose a
+register which is normally saved and restored by function calls on your
+machine, so that library routines will not clobber it.  A common
+pitfall is to initialize multiple call-clobbered registers with
+arbitrary expressions, where a function call or library call for an
+arithmetic operator will overwrite a register value from a previous
+assignment, for example `r0' below:
+     register int *p1 asm ("r0") = ...;
+     register int *p2 asm ("r1") = ...;
+ In those cases, a solution is to use a temporary variable for each
+arbitrary expression.   *Note Example of asm with clobbered asm reg::.
+
+
+File: gcc.info,  Node: Alternate Keywords,  Next: Incomplete Enums,  Prev: Explicit Reg Vars,  Up: C Extensions
+
+6.43 Alternate Keywords
+=======================
+
+`-ansi' and the various `-std' options disable certain keywords.  This
+causes trouble when you want to use GNU C extensions, or a
+general-purpose header file that should be usable by all programs,
+including ISO C programs.  The keywords `asm', `typeof' and `inline'
+are not available in programs compiled with `-ansi' or `-std' (although
+`inline' can be used in a program compiled with `-std=c99').  The ISO
+C99 keyword `restrict' is only available when `-std=gnu99' (which will
+eventually be the default) or `-std=c99' (or the equivalent
+`-std=iso9899:1999') is used.
+
+ The way to solve these problems is to put `__' at the beginning and
+end of each problematical keyword.  For example, use `__asm__' instead
+of `asm', and `__inline__' instead of `inline'.
+
+ Other C compilers won't accept these alternative keywords; if you want
+to compile with another compiler, you can define the alternate keywords
+as macros to replace them with the customary keywords.  It looks like
+this:
+
+     #ifndef __GNUC__
+     #define __asm__ asm
+     #endif
+
+ `-pedantic' and other options cause warnings for many GNU C extensions.
+You can prevent such warnings within one expression by writing
+`__extension__' before the expression.  `__extension__' has no effect
+aside from this.
+
+
+File: gcc.info,  Node: Incomplete Enums,  Next: Function Names,  Prev: Alternate Keywords,  Up: C Extensions
+
+6.44 Incomplete `enum' Types
+============================
+
+You can define an `enum' tag without specifying its possible values.
+This results in an incomplete type, much like what you get if you write
+`struct foo' without describing the elements.  A later declaration
+which does specify the possible values completes the type.
+
+ You can't allocate variables or storage using the type while it is
+incomplete.  However, you can work with pointers to that type.
+
+ This extension may not be very useful, but it makes the handling of
+`enum' more consistent with the way `struct' and `union' are handled.
+
+ This extension is not supported by GNU C++.
+
+
+File: gcc.info,  Node: Function Names,  Next: Return Address,  Prev: Incomplete Enums,  Up: C Extensions
+
+6.45 Function Names as Strings
+==============================
+
+GCC provides three magic variables which hold the name of the current
+function, as a string.  The first of these is `__func__', which is part
+of the C99 standard:
+
+ The identifier `__func__' is implicitly declared by the translator as
+if, immediately following the opening brace of each function
+definition, the declaration
+
+     static const char __func__[] = "function-name";
+
+appeared, where function-name is the name of the lexically-enclosing
+function.  This name is the unadorned name of the function.
+
+ `__FUNCTION__' is another name for `__func__'.  Older versions of GCC
+recognize only this name.  However, it is not standardized.  For
+maximum portability, we recommend you use `__func__', but provide a
+fallback definition with the preprocessor:
+
+     #if __STDC_VERSION__ < 199901L
+     # if __GNUC__ >= 2
+     #  define __func__ __FUNCTION__
+     # else
+     #  define __func__ "<unknown>"
+     # endif
+     #endif
+
+ In C, `__PRETTY_FUNCTION__' is yet another name for `__func__'.
+However, in C++, `__PRETTY_FUNCTION__' contains the type signature of
+the function as well as its bare name.  For example, this program:
+
+     extern "C" {
+     extern int printf (char *, ...);
+     }
+
+     class a {
+      public:
+       void sub (int i)
+         {
+           printf ("__FUNCTION__ = %s\n", __FUNCTION__);
+           printf ("__PRETTY_FUNCTION__ = %s\n", __PRETTY_FUNCTION__);
+         }
+     };
+
+     int
+     main (void)
+     {
+       a ax;
+       ax.sub (0);
+       return 0;
+     }
+
+gives this output:
+
+     __FUNCTION__ = sub
+     __PRETTY_FUNCTION__ = void a::sub(int)
+
+ These identifiers are not preprocessor macros.  In GCC 3.3 and
+earlier, in C only, `__FUNCTION__' and `__PRETTY_FUNCTION__' were
+treated as string literals; they could be used to initialize `char'
+arrays, and they could be concatenated with other string literals.  GCC
+3.4 and later treat them as variables, like `__func__'.  In C++,
+`__FUNCTION__' and `__PRETTY_FUNCTION__' have always been variables.
+
+
+File: gcc.info,  Node: Return Address,  Next: Vector Extensions,  Prev: Function Names,  Up: C Extensions
+
+6.46 Getting the Return or Frame Address of a Function
+======================================================
+
+These functions may be used to get information about the callers of a
+function.
+
+ -- Built-in Function: void * __builtin_return_address (unsigned int
+          LEVEL)
+     This function returns the return address of the current function,
+     or of one of its callers.  The LEVEL argument is number of frames
+     to scan up the call stack.  A value of `0' yields the return
+     address of the current function, a value of `1' yields the return
+     address of the caller of the current function, and so forth.  When
+     inlining the expected behavior is that the function will return
+     the address of the function that will be returned to.  To work
+     around this behavior use the `noinline' function attribute.
+
+     The LEVEL argument must be a constant integer.
+
+     On some machines it may be impossible to determine the return
+     address of any function other than the current one; in such cases,
+     or when the top of the stack has been reached, this function will
+     return `0' or a random value.  In addition,
+     `__builtin_frame_address' may be used to determine if the top of
+     the stack has been reached.
+
+     Additional post-processing of the returned value may be needed, see
+     `__builtin_extract_return_address'.
+
+     This function should only be used with a nonzero argument for
+     debugging purposes.
+
+ -- Built-in Function: void * __builtin_extract_return_address (void
+          *ADDR)
+     The address as returned by `__builtin_return_address' may have to
+     be fed through this function to get the actual encoded address.
+     For example, on the 31-bit S/390 platform the highest bit has to
+     be masked out, or on SPARC platforms an offset has to be added for
+     the true next instruction to be executed.
+
+     If no fixup is needed, this function simply passes through ADDR.
+
+ -- Built-in Function: void * __builtin_frob_return_address (void *ADDR)
+     This function does the reverse of
+     `__builtin_extract_return_address'.
+
+ -- Built-in Function: void * __builtin_frame_address (unsigned int
+          LEVEL)
+     This function is similar to `__builtin_return_address', but it
+     returns the address of the function frame rather than the return
+     address of the function.  Calling `__builtin_frame_address' with a
+     value of `0' yields the frame address of the current function, a
+     value of `1' yields the frame address of the caller of the current
+     function, and so forth.
+
+     The frame is the area on the stack which holds local variables and
+     saved registers.  The frame address is normally the address of the
+     first word pushed on to the stack by the function.  However, the
+     exact definition depends upon the processor and the calling
+     convention.  If the processor has a dedicated frame pointer
+     register, and the function has a frame, then
+     `__builtin_frame_address' will return the value of the frame
+     pointer register.
+
+     On some machines it may be impossible to determine the frame
+     address of any function other than the current one; in such cases,
+     or when the top of the stack has been reached, this function will
+     return `0' if the first frame pointer is properly initialized by
+     the startup code.
+
+     This function should only be used with a nonzero argument for
+     debugging purposes.
+
+
+File: gcc.info,  Node: Vector Extensions,  Next: Offsetof,  Prev: Return Address,  Up: C Extensions
+
+6.47 Using vector instructions through built-in functions
+=========================================================
+
+On some targets, the instruction set contains SIMD vector instructions
+that operate on multiple values contained in one large register at the
+same time.  For example, on the i386 the MMX, 3DNow! and SSE extensions
+can be used this way.
+
+ The first step in using these extensions is to provide the necessary
+data types.  This should be done using an appropriate `typedef':
+
+     typedef int v4si __attribute__ ((vector_size (16)));
+
+ The `int' type specifies the base type, while the attribute specifies
+the vector size for the variable, measured in bytes.  For example, the
+declaration above causes the compiler to set the mode for the `v4si'
+type to be 16 bytes wide and divided into `int' sized units.  For a
+32-bit `int' this means a vector of 4 units of 4 bytes, and the
+corresponding mode of `foo' will be V4SI.
+
+ The `vector_size' attribute is only applicable to integral and float
+scalars, although arrays, pointers, and function return values are
+allowed in conjunction with this construct.
+
+ All the basic integer types can be used as base types, both as signed
+and as unsigned: `char', `short', `int', `long', `long long'.  In
+addition, `float' and `double' can be used to build floating-point
+vector types.
+
+ Specifying a combination that is not valid for the current architecture
+will cause GCC to synthesize the instructions using a narrower mode.
+For example, if you specify a variable of type `V4SI' and your
+architecture does not allow for this specific SIMD type, GCC will
+produce code that uses 4 `SIs'.
+
+ The types defined in this manner can be used with a subset of normal C
+operations.  Currently, GCC will allow using the following operators on
+these types: `+, -, *, /, unary minus, ^, |, &, ~, %'.
+
+ The operations behave like C++ `valarrays'.  Addition is defined as
+the addition of the corresponding elements of the operands.  For
+example, in the code below, each of the 4 elements in A will be added
+to the corresponding 4 elements in B and the resulting vector will be
+stored in C.
+
+     typedef int v4si __attribute__ ((vector_size (16)));
+
+     v4si a, b, c;
+
+     c = a + b;
+
+ Subtraction, multiplication, division, and the logical operations
+operate in a similar manner.  Likewise, the result of using the unary
+minus or complement operators on a vector type is a vector whose
+elements are the negative or complemented values of the corresponding
+elements in the operand.
+
+ You can declare variables and use them in function calls and returns,
+as well as in assignments and some casts.  You can specify a vector
+type as a return type for a function.  Vector types can also be used as
+function arguments.  It is possible to cast from one vector type to
+another, provided they are of the same size (in fact, you can also cast
+vectors to and from other datatypes of the same size).
+
+ You cannot operate between vectors of different lengths or different
+signedness without a cast.
+
+ A port that supports hardware vector operations, usually provides a set
+of built-in functions that can be used to operate on vectors.  For
+example, a function to add two vectors and multiply the result by a
+third could look like this:
+
+     v4si f (v4si a, v4si b, v4si c)
+     {
+       v4si tmp = __builtin_addv4si (a, b);
+       return __builtin_mulv4si (tmp, c);
+     }
+
+
+File: gcc.info,  Node: Offsetof,  Next: Atomic Builtins,  Prev: Vector Extensions,  Up: C Extensions
+
+6.48 Offsetof
+=============
+
+GCC implements for both C and C++ a syntactic extension to implement
+the `offsetof' macro.
+
+     primary:
+             "__builtin_offsetof" "(" `typename' "," offsetof_member_designator ")"
+
+     offsetof_member_designator:
+               `identifier'
+             | offsetof_member_designator "." `identifier'
+             | offsetof_member_designator "[" `expr' "]"
+
+ This extension is sufficient such that
+
+     #define offsetof(TYPE, MEMBER)  __builtin_offsetof (TYPE, MEMBER)
+
+ is a suitable definition of the `offsetof' macro.  In C++, TYPE may be
+dependent.  In either case, MEMBER may consist of a single identifier,
+or a sequence of member accesses and array references.
+
+
+File: gcc.info,  Node: Atomic Builtins,  Next: Object Size Checking,  Prev: Offsetof,  Up: C Extensions
+
+6.49 Built-in functions for atomic memory access
+================================================
+
+The following builtins are intended to be compatible with those
+described in the `Intel Itanium Processor-specific Application Binary
+Interface', section 7.4.  As such, they depart from the normal GCC
+practice of using the "__builtin_" prefix, and further that they are
+overloaded such that they work on multiple types.
+
+ The definition given in the Intel documentation allows only for the
+use of the types `int', `long', `long long' as well as their unsigned
+counterparts.  GCC will allow any integral scalar or pointer type that
+is 1, 2, 4 or 8 bytes in length.
+
+ Not all operations are supported by all target processors.  If a
+particular operation cannot be implemented on the target processor, a
+warning will be generated and a call an external function will be
+generated.  The external function will carry the same name as the
+builtin, with an additional suffix `_N' where N is the size of the data
+type.
+
+ In most cases, these builtins are considered a "full barrier".  That
+is, no memory operand will be moved across the operation, either
+forward or backward.  Further, instructions will be issued as necessary
+to prevent the processor from speculating loads across the operation
+and from queuing stores after the operation.
+
+ All of the routines are described in the Intel documentation to take
+"an optional list of variables protected by the memory barrier".  It's
+not clear what is meant by that; it could mean that _only_ the
+following variables are protected, or it could mean that these variables
+should in addition be protected.  At present GCC ignores this list and
+protects all variables which are globally accessible.  If in the future
+we make some use of this list, an empty list will continue to mean all
+globally accessible variables.
+
+`TYPE __sync_fetch_and_add (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_sub (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_or (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_and (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_xor (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_fetch_and_nand (TYPE *ptr, TYPE value, ...)'
+     These builtins perform the operation suggested by the name, and
+     returns the value that had previously been in memory.  That is,
+
+          { tmp = *ptr; *ptr OP= value; return tmp; }
+          { tmp = *ptr; *ptr = ~(tmp & value); return tmp; }   // nand
+
+     _Note:_ GCC 4.4 and later implement `__sync_fetch_and_nand'
+     builtin as `*ptr = ~(tmp & value)' instead of `*ptr = ~tmp &
+     value'.
+
+`TYPE __sync_add_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_sub_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_or_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_and_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_xor_and_fetch (TYPE *ptr, TYPE value, ...)'
+`TYPE __sync_nand_and_fetch (TYPE *ptr, TYPE value, ...)'
+     These builtins perform the operation suggested by the name, and
+     return the new value.  That is,
+
+          { *ptr OP= value; return *ptr; }
+          { *ptr = ~(*ptr & value); return *ptr; }   // nand
+
+     _Note:_ GCC 4.4 and later implement `__sync_nand_and_fetch'
+     builtin as `*ptr = ~(*ptr & value)' instead of `*ptr = ~*ptr &
+     value'.
+
+`bool __sync_bool_compare_and_swap (TYPE *ptr, TYPE oldval TYPE newval, ...)'
+`TYPE __sync_val_compare_and_swap (TYPE *ptr, TYPE oldval TYPE newval, ...)'
+     These builtins perform an atomic compare and swap.  That is, if
+     the current value of `*PTR' is OLDVAL, then write NEWVAL into
+     `*PTR'.
+
+     The "bool" version returns true if the comparison is successful and
+     NEWVAL was written.  The "val" version returns the contents of
+     `*PTR' before the operation.
+
+`__sync_synchronize (...)'
+     This builtin issues a full memory barrier.
+
+`TYPE __sync_lock_test_and_set (TYPE *ptr, TYPE value, ...)'
+     This builtin, as described by Intel, is not a traditional
+     test-and-set operation, but rather an atomic exchange operation.
+     It writes VALUE into `*PTR', and returns the previous contents of
+     `*PTR'.
+
+     Many targets have only minimal support for such locks, and do not
+     support a full exchange operation.  In this case, a target may
+     support reduced functionality here by which the _only_ valid value
+     to store is the immediate constant 1.  The exact value actually
+     stored in `*PTR' is implementation defined.
+
+     This builtin is not a full barrier, but rather an "acquire
+     barrier".  This means that references after the builtin cannot
+     move to (or be speculated to) before the builtin, but previous
+     memory stores may not be globally visible yet, and previous memory
+     loads may not yet be satisfied.
+
+`void __sync_lock_release (TYPE *ptr, ...)'
+     This builtin releases the lock acquired by
+     `__sync_lock_test_and_set'.  Normally this means writing the
+     constant 0 to `*PTR'.
+
+     This builtin is not a full barrier, but rather a "release barrier".
+     This means that all previous memory stores are globally visible,
+     and all previous memory loads have been satisfied, but following
+     memory reads are not prevented from being speculated to before the
+     barrier.
+
+
+File: gcc.info,  Node: Object Size Checking,  Next: Other Builtins,  Prev: Atomic Builtins,  Up: C Extensions
+
+6.50 Object Size Checking Builtins
+==================================
+
+GCC implements a limited buffer overflow protection mechanism that can
+prevent some buffer overflow attacks.
+
+ -- Built-in Function: size_t __builtin_object_size (void * PTR, int
+          TYPE)
+     is a built-in construct that returns a constant number of bytes
+     from PTR to the end of the object PTR pointer points to (if known
+     at compile time).  `__builtin_object_size' never evaluates its
+     arguments for side-effects.  If there are any side-effects in
+     them, it returns `(size_t) -1' for TYPE 0 or 1 and `(size_t) 0'
+     for TYPE 2 or 3.  If there are multiple objects PTR can point to
+     and all of them are known at compile time, the returned number is
+     the maximum of remaining byte counts in those objects if TYPE & 2
+     is 0 and minimum if nonzero.  If it is not possible to determine
+     which objects PTR points to at compile time,
+     `__builtin_object_size' should return `(size_t) -1' for TYPE 0 or
+     1 and `(size_t) 0' for TYPE 2 or 3.
+
+     TYPE is an integer constant from 0 to 3.  If the least significant
+     bit is clear, objects are whole variables, if it is set, a closest
+     surrounding subobject is considered the object a pointer points to.
+     The second bit determines if maximum or minimum of remaining bytes
+     is computed.
+
+          struct V { char buf1[10]; int b; char buf2[10]; } var;
+          char *p = &var.buf1[1], *q = &var.b;
+
+          /* Here the object p points to is var.  */
+          assert (__builtin_object_size (p, 0) == sizeof (var) - 1);
+          /* The subobject p points to is var.buf1.  */
+          assert (__builtin_object_size (p, 1) == sizeof (var.buf1) - 1);
+          /* The object q points to is var.  */
+          assert (__builtin_object_size (q, 0)
+                  == (char *) (&var + 1) - (char *) &var.b);
+          /* The subobject q points to is var.b.  */
+          assert (__builtin_object_size (q, 1) == sizeof (var.b));
+
+ There are built-in functions added for many common string operation
+functions, e.g., for `memcpy' `__builtin___memcpy_chk' built-in is
+provided.  This built-in has an additional last argument, which is the
+number of bytes remaining in object the DEST argument points to or
+`(size_t) -1' if the size is not known.
+
+ The built-in functions are optimized into the normal string functions
+like `memcpy' if the last argument is `(size_t) -1' or if it is known
+at compile time that the destination object will not be overflown.  If
+the compiler can determine at compile time the object will be always
+overflown, it issues a warning.
+
+ The intended use can be e.g.
+
+     #undef memcpy
+     #define bos0(dest) __builtin_object_size (dest, 0)
+     #define memcpy(dest, src, n) \
+       __builtin___memcpy_chk (dest, src, n, bos0 (dest))
+
+     char *volatile p;
+     char buf[10];
+     /* It is unknown what object p points to, so this is optimized
+        into plain memcpy - no checking is possible.  */
+     memcpy (p, "abcde", n);
+     /* Destination is known and length too.  It is known at compile
+        time there will be no overflow.  */
+     memcpy (&buf[5], "abcde", 5);
+     /* Destination is known, but the length is not known at compile time.
+        This will result in __memcpy_chk call that can check for overflow
+        at runtime.  */
+     memcpy (&buf[5], "abcde", n);
+     /* Destination is known and it is known at compile time there will
+        be overflow.  There will be a warning and __memcpy_chk call that
+        will abort the program at runtime.  */
+     memcpy (&buf[6], "abcde", 5);
+
+ Such built-in functions are provided for `memcpy', `mempcpy',
+`memmove', `memset', `strcpy', `stpcpy', `strncpy', `strcat' and
+`strncat'.
+
+ There are also checking built-in functions for formatted output
+functions.
+     int __builtin___sprintf_chk (char *s, int flag, size_t os, const char *fmt, ...);
+     int __builtin___snprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                                   const char *fmt, ...);
+     int __builtin___vsprintf_chk (char *s, int flag, size_t os, const char *fmt,
+                                   va_list ap);
+     int __builtin___vsnprintf_chk (char *s, size_t maxlen, int flag, size_t os,
+                                    const char *fmt, va_list ap);
+
+ The added FLAG argument is passed unchanged to `__sprintf_chk' etc.
+functions and can contain implementation specific flags on what
+additional security measures the checking function might take, such as
+handling `%n' differently.
+
+ The OS argument is the object size S points to, like in the other
+built-in functions.  There is a small difference in the behavior
+though, if OS is `(size_t) -1', the built-in functions are optimized
+into the non-checking functions only if FLAG is 0, otherwise the
+checking function is called with OS argument set to `(size_t) -1'.
+
+ In addition to this, there are checking built-in functions
+`__builtin___printf_chk', `__builtin___vprintf_chk',
+`__builtin___fprintf_chk' and `__builtin___vfprintf_chk'.  These have
+just one additional argument, FLAG, right before format string FMT.  If
+the compiler is able to optimize them to `fputc' etc. functions, it
+will, otherwise the checking function should be called and the FLAG
+argument passed to it.
+
+
+File: gcc.info,  Node: Other Builtins,  Next: Target Builtins,  Prev: Object Size Checking,  Up: C Extensions
+
+6.51 Other built-in functions provided by GCC
+=============================================
+
+GCC provides a large number of built-in functions other than the ones
+mentioned above.  Some of these are for internal use in the processing
+of exceptions or variable-length argument lists and will not be
+documented here because they may change from time to time; we do not
+recommend general use of these functions.
+
+ The remaining functions are provided for optimization purposes.
+
+ GCC includes built-in versions of many of the functions in the standard
+C library.  The versions prefixed with `__builtin_' will always be
+treated as having the same meaning as the C library function even if you
+specify the `-fno-builtin' option.  (*note C Dialect Options::) Many of
+these functions are only optimized in certain cases; if they are not
+optimized in a particular case, a call to the library function will be
+emitted.
+
+ Outside strict ISO C mode (`-ansi', `-std=c90' or `-std=c99'), the
+functions `_exit', `alloca', `bcmp', `bzero', `dcgettext', `dgettext',
+`dremf', `dreml', `drem', `exp10f', `exp10l', `exp10', `ffsll', `ffsl',
+`ffs', `fprintf_unlocked', `fputs_unlocked', `gammaf', `gammal',
+`gamma', `gammaf_r', `gammal_r', `gamma_r', `gettext', `index',
+`isascii', `j0f', `j0l', `j0', `j1f', `j1l', `j1', `jnf', `jnl', `jn',
+`lgammaf_r', `lgammal_r', `lgamma_r', `mempcpy', `pow10f', `pow10l',
+`pow10', `printf_unlocked', `rindex', `scalbf', `scalbl', `scalb',
+`signbit', `signbitf', `signbitl', `signbitd32', `signbitd64',
+`signbitd128', `significandf', `significandl', `significand', `sincosf',
+`sincosl', `sincos', `stpcpy', `stpncpy', `strcasecmp', `strdup',
+`strfmon', `strncasecmp', `strndup', `toascii', `y0f', `y0l', `y0',
+`y1f', `y1l', `y1', `ynf', `ynl' and `yn' may be handled as built-in
+functions.  All these functions have corresponding versions prefixed
+with `__builtin_', which may be used even in strict C90 mode.
+
+ The ISO C99 functions `_Exit', `acoshf', `acoshl', `acosh', `asinhf',
+`asinhl', `asinh', `atanhf', `atanhl', `atanh', `cabsf', `cabsl',
+`cabs', `cacosf', `cacoshf', `cacoshl', `cacosh', `cacosl', `cacos',
+`cargf', `cargl', `carg', `casinf', `casinhf', `casinhl', `casinh',
+`casinl', `casin', `catanf', `catanhf', `catanhl', `catanh', `catanl',
+`catan', `cbrtf', `cbrtl', `cbrt', `ccosf', `ccoshf', `ccoshl',
+`ccosh', `ccosl', `ccos', `cexpf', `cexpl', `cexp', `cimagf', `cimagl',
+`cimag', `clogf', `clogl', `clog', `conjf', `conjl', `conj',
+`copysignf', `copysignl', `copysign', `cpowf', `cpowl', `cpow',
+`cprojf', `cprojl', `cproj', `crealf', `creall', `creal', `csinf',
+`csinhf', `csinhl', `csinh', `csinl', `csin', `csqrtf', `csqrtl',
+`csqrt', `ctanf', `ctanhf', `ctanhl', `ctanh', `ctanl', `ctan',
+`erfcf', `erfcl', `erfc', `erff', `erfl', `erf', `exp2f', `exp2l',
+`exp2', `expm1f', `expm1l', `expm1', `fdimf', `fdiml', `fdim', `fmaf',
+`fmal', `fmaxf', `fmaxl', `fmax', `fma', `fminf', `fminl', `fmin',
+`hypotf', `hypotl', `hypot', `ilogbf', `ilogbl', `ilogb', `imaxabs',
+`isblank', `iswblank', `lgammaf', `lgammal', `lgamma', `llabs',
+`llrintf', `llrintl', `llrint', `llroundf', `llroundl', `llround',
+`log1pf', `log1pl', `log1p', `log2f', `log2l', `log2', `logbf',
+`logbl', `logb', `lrintf', `lrintl', `lrint', `lroundf', `lroundl',
+`lround', `nearbyintf', `nearbyintl', `nearbyint', `nextafterf',
+`nextafterl', `nextafter', `nexttowardf', `nexttowardl', `nexttoward',
+`remainderf', `remainderl', `remainder', `remquof', `remquol',
+`remquo', `rintf', `rintl', `rint', `roundf', `roundl', `round',
+`scalblnf', `scalblnl', `scalbln', `scalbnf', `scalbnl', `scalbn',
+`snprintf', `tgammaf', `tgammal', `tgamma', `truncf', `truncl', `trunc',
+`vfscanf', `vscanf', `vsnprintf' and `vsscanf' are handled as built-in
+functions except in strict ISO C90 mode (`-ansi' or `-std=c90').
+
+ There are also built-in versions of the ISO C99 functions `acosf',
+`acosl', `asinf', `asinl', `atan2f', `atan2l', `atanf', `atanl',
+`ceilf', `ceill', `cosf', `coshf', `coshl', `cosl', `expf', `expl',
+`fabsf', `fabsl', `floorf', `floorl', `fmodf', `fmodl', `frexpf',
+`frexpl', `ldexpf', `ldexpl', `log10f', `log10l', `logf', `logl',
+`modfl', `modf', `powf', `powl', `sinf', `sinhf', `sinhl', `sinl',
+`sqrtf', `sqrtl', `tanf', `tanhf', `tanhl' and `tanl' that are
+recognized in any mode since ISO C90 reserves these names for the
+purpose to which ISO C99 puts them.  All these functions have
+corresponding versions prefixed with `__builtin_'.
+
+ The ISO C94 functions `iswalnum', `iswalpha', `iswcntrl', `iswdigit',
+`iswgraph', `iswlower', `iswprint', `iswpunct', `iswspace', `iswupper',
+`iswxdigit', `towlower' and `towupper' are handled as built-in functions
+except in strict ISO C90 mode (`-ansi' or `-std=c90').
+
+ The ISO C90 functions `abort', `abs', `acos', `asin', `atan2', `atan',
+`calloc', `ceil', `cosh', `cos', `exit', `exp', `fabs', `floor', `fmod',
+`fprintf', `fputs', `frexp', `fscanf', `isalnum', `isalpha', `iscntrl',
+`isdigit', `isgraph', `islower', `isprint', `ispunct', `isspace',
+`isupper', `isxdigit', `tolower', `toupper', `labs', `ldexp', `log10',
+`log', `malloc', `memchr', `memcmp', `memcpy', `memset', `modf', `pow',
+`printf', `putchar', `puts', `scanf', `sinh', `sin', `snprintf',
+`sprintf', `sqrt', `sscanf', `strcat', `strchr', `strcmp', `strcpy',
+`strcspn', `strlen', `strncat', `strncmp', `strncpy', `strpbrk',
+`strrchr', `strspn', `strstr', `tanh', `tan', `vfprintf', `vprintf' and
+`vsprintf' are all recognized as built-in functions unless
+`-fno-builtin' is specified (or `-fno-builtin-FUNCTION' is specified
+for an individual function).  All of these functions have corresponding
+versions prefixed with `__builtin_'.
+
+ GCC provides built-in versions of the ISO C99 floating point comparison
+macros that avoid raising exceptions for unordered operands.  They have
+the same names as the standard macros ( `isgreater', `isgreaterequal',
+`isless', `islessequal', `islessgreater', and `isunordered') , with
+`__builtin_' prefixed.  We intend for a library implementor to be able
+to simply `#define' each standard macro to its built-in equivalent.  In
+the same fashion, GCC provides `fpclassify', `isfinite', `isinf_sign'
+and `isnormal' built-ins used with `__builtin_' prefixed.  The `isinf'
+and `isnan' builtins appear both with and without the `__builtin_'
+prefix.
+
+ -- Built-in Function: int __builtin_types_compatible_p (TYPE1, TYPE2)
+     You can use the built-in function `__builtin_types_compatible_p' to
+     determine whether two types are the same.
+
+     This built-in function returns 1 if the unqualified versions of the
+     types TYPE1 and TYPE2 (which are types, not expressions) are
+     compatible, 0 otherwise.  The result of this built-in function can
+     be used in integer constant expressions.
+
+     This built-in function ignores top level qualifiers (e.g., `const',
+     `volatile').  For example, `int' is equivalent to `const int'.
+
+     The type `int[]' and `int[5]' are compatible.  On the other hand,
+     `int' and `char *' are not compatible, even if the size of their
+     types, on the particular architecture are the same.  Also, the
+     amount of pointer indirection is taken into account when
+     determining similarity.  Consequently, `short *' is not similar to
+     `short **'.  Furthermore, two types that are typedefed are
+     considered compatible if their underlying types are compatible.
+
+     An `enum' type is not considered to be compatible with another
+     `enum' type even if both are compatible with the same integer
+     type; this is what the C standard specifies.  For example, `enum
+     {foo, bar}' is not similar to `enum {hot, dog}'.
+
+     You would typically use this function in code whose execution
+     varies depending on the arguments' types.  For example:
+
+          #define foo(x)                                                  \
+            ({                                                           \
+              typeof (x) tmp = (x);                                       \
+              if (__builtin_types_compatible_p (typeof (x), long double)) \
+                tmp = foo_long_double (tmp);                              \
+              else if (__builtin_types_compatible_p (typeof (x), double)) \
+                tmp = foo_double (tmp);                                   \
+              else if (__builtin_types_compatible_p (typeof (x), float))  \
+                tmp = foo_float (tmp);                                    \
+              else                                                        \
+                abort ();                                                 \
+              tmp;                                                        \
+            })
+
+     _Note:_ This construct is only available for C.
+
+
+ -- Built-in Function: TYPE __builtin_choose_expr (CONST_EXP, EXP1,
+          EXP2)
+     You can use the built-in function `__builtin_choose_expr' to
+     evaluate code depending on the value of a constant expression.
+     This built-in function returns EXP1 if CONST_EXP, which is an
+     integer constant expression, is nonzero.  Otherwise it returns 0.
+
+     This built-in function is analogous to the `? :' operator in C,
+     except that the expression returned has its type unaltered by
+     promotion rules.  Also, the built-in function does not evaluate
+     the expression that was not chosen.  For example, if CONST_EXP
+     evaluates to true, EXP2 is not evaluated even if it has
+     side-effects.
+
+     This built-in function can return an lvalue if the chosen argument
+     is an lvalue.
+
+     If EXP1 is returned, the return type is the same as EXP1's type.
+     Similarly, if EXP2 is returned, its return type is the same as
+     EXP2.
+
+     Example:
+
+          #define foo(x)                                                    \
+            __builtin_choose_expr (                                         \
+              __builtin_types_compatible_p (typeof (x), double),            \
+              foo_double (x),                                               \
+              __builtin_choose_expr (                                       \
+                __builtin_types_compatible_p (typeof (x), float),           \
+                foo_float (x),                                              \
+                /* The void expression results in a compile-time error  \
+                   when assigning the result to something.  */          \
+                (void)0))
+
+     _Note:_ This construct is only available for C.  Furthermore, the
+     unused expression (EXP1 or EXP2 depending on the value of
+     CONST_EXP) may still generate syntax errors.  This may change in
+     future revisions.
+
+
+ -- Built-in Function: int __builtin_constant_p (EXP)
+     You can use the built-in function `__builtin_constant_p' to
+     determine if a value is known to be constant at compile-time and
+     hence that GCC can perform constant-folding on expressions
+     involving that value.  The argument of the function is the value
+     to test.  The function returns the integer 1 if the argument is
+     known to be a compile-time constant and 0 if it is not known to be
+     a compile-time constant.  A return of 0 does not indicate that the
+     value is _not_ a constant, but merely that GCC cannot prove it is
+     a constant with the specified value of the `-O' option.
+
+     You would typically use this function in an embedded application
+     where memory was a critical resource.  If you have some complex
+     calculation, you may want it to be folded if it involves
+     constants, but need to call a function if it does not.  For
+     example:
+
+          #define Scale_Value(X)      \
+            (__builtin_constant_p (X) \
+            ? ((X) * SCALE + OFFSET) : Scale (X))
+
+     You may use this built-in function in either a macro or an inline
+     function.  However, if you use it in an inlined function and pass
+     an argument of the function as the argument to the built-in, GCC
+     will never return 1 when you call the inline function with a
+     string constant or compound literal (*note Compound Literals::)
+     and will not return 1 when you pass a constant numeric value to
+     the inline function unless you specify the `-O' option.
+
+     You may also use `__builtin_constant_p' in initializers for static
+     data.  For instance, you can write
+
+          static const int table[] = {
+             __builtin_constant_p (EXPRESSION) ? (EXPRESSION) : -1,
+             /* ... */
+          };
+
+     This is an acceptable initializer even if EXPRESSION is not a
+     constant expression, including the case where
+     `__builtin_constant_p' returns 1 because EXPRESSION can be folded
+     to a constant but EXPRESSION contains operands that would not
+     otherwise be permitted in a static initializer (for example, `0 &&
+     foo ()').  GCC must be more conservative about evaluating the
+     built-in in this case, because it has no opportunity to perform
+     optimization.
+
+     Previous versions of GCC did not accept this built-in in data
+     initializers.  The earliest version where it is completely safe is
+     3.0.1.
+
+ -- Built-in Function: long __builtin_expect (long EXP, long C)
+     You may use `__builtin_expect' to provide the compiler with branch
+     prediction information.  In general, you should prefer to use
+     actual profile feedback for this (`-fprofile-arcs'), as
+     programmers are notoriously bad at predicting how their programs
+     actually perform.  However, there are applications in which this
+     data is hard to collect.
+
+     The return value is the value of EXP, which should be an integral
+     expression.  The semantics of the built-in are that it is expected
+     that EXP == C.  For example:
+
+          if (__builtin_expect (x, 0))
+            foo ();
+
+     would indicate that we do not expect to call `foo', since we
+     expect `x' to be zero.  Since you are limited to integral
+     expressions for EXP, you should use constructions such as
+
+          if (__builtin_expect (ptr != NULL, 1))
+            error ();
+
+     when testing pointer or floating-point values.
+
+ -- Built-in Function: void __builtin_trap (void)
+     This function causes the program to exit abnormally.  GCC
+     implements this function by using a target-dependent mechanism
+     (such as intentionally executing an illegal instruction) or by
+     calling `abort'.  The mechanism used may vary from release to
+     release so you should not rely on any particular implementation.
+
+ -- Built-in Function: void __builtin_unreachable (void)
+     If control flow reaches the point of the `__builtin_unreachable',
+     the program is undefined.  It is useful in situations where the
+     compiler cannot deduce the unreachability of the code.
+
+     One such case is immediately following an `asm' statement that
+     will either never terminate, or one that transfers control
+     elsewhere and never returns.  In this example, without the
+     `__builtin_unreachable', GCC would issue a warning that control
+     reaches the end of a non-void function.  It would also generate
+     code to return after the `asm'.
+
+          int f (int c, int v)
+          {
+            if (c)
+              {
+                return v;
+              }
+            else
+              {
+                asm("jmp error_handler");
+                __builtin_unreachable ();
+              }
+          }
+
+     Because the `asm' statement unconditionally transfers control out
+     of the function, control will never reach the end of the function
+     body.  The `__builtin_unreachable' is in fact unreachable and
+     communicates this fact to the compiler.
+
+     Another use for `__builtin_unreachable' is following a call a
+     function that never returns but that is not declared
+     `__attribute__((noreturn))', as in this example:
+
+          void function_that_never_returns (void);
+
+          int g (int c)
+          {
+            if (c)
+              {
+                return 1;
+              }
+            else
+              {
+                function_that_never_returns ();
+                __builtin_unreachable ();
+              }
+          }
+
+
+ -- Built-in Function: void __builtin___clear_cache (char *BEGIN, char
+          *END)
+     This function is used to flush the processor's instruction cache
+     for the region of memory between BEGIN inclusive and END
+     exclusive.  Some targets require that the instruction cache be
+     flushed, after modifying memory containing code, in order to obtain
+     deterministic behavior.
+
+     If the target does not require instruction cache flushes,
+     `__builtin___clear_cache' has no effect.  Otherwise either
+     instructions are emitted in-line to clear the instruction cache or
+     a call to the `__clear_cache' function in libgcc is made.
+
+ -- Built-in Function: void __builtin_prefetch (const void *ADDR, ...)
+     This function is used to minimize cache-miss latency by moving
+     data into a cache before it is accessed.  You can insert calls to
+     `__builtin_prefetch' into code for which you know addresses of
+     data in memory that is likely to be accessed soon.  If the target
+     supports them, data prefetch instructions will be generated.  If
+     the prefetch is done early enough before the access then the data
+     will be in the cache by the time it is accessed.
+
+     The value of ADDR is the address of the memory to prefetch.  There
+     are two optional arguments, RW and LOCALITY.  The value of RW is a
+     compile-time constant one or zero; one means that the prefetch is
+     preparing for a write to the memory address and zero, the default,
+     means that the prefetch is preparing for a read.  The value
+     LOCALITY must be a compile-time constant integer between zero and
+     three.  A value of zero means that the data has no temporal
+     locality, so it need not be left in the cache after the access.  A
+     value of three means that the data has a high degree of temporal
+     locality and should be left in all levels of cache possible.
+     Values of one and two mean, respectively, a low or moderate degree
+     of temporal locality.  The default is three.
+
+          for (i = 0; i < n; i++)
+            {
+              a[i] = a[i] + b[i];
+              __builtin_prefetch (&a[i+j], 1, 1);
+              __builtin_prefetch (&b[i+j], 0, 1);
+              /* ... */
+            }
+
+     Data prefetch does not generate faults if ADDR is invalid, but the
+     address expression itself must be valid.  For example, a prefetch
+     of `p->next' will not fault if `p->next' is not a valid address,
+     but evaluation will fault if `p' is not a valid address.
+
+     If the target does not support data prefetch, the address
+     expression is evaluated if it includes side effects but no other
+     code is generated and GCC does not issue a warning.
+
+ -- Built-in Function: double __builtin_huge_val (void)
+     Returns a positive infinity, if supported by the floating-point
+     format, else `DBL_MAX'.  This function is suitable for
+     implementing the ISO C macro `HUGE_VAL'.
+
+ -- Built-in Function: float __builtin_huge_valf (void)
+     Similar to `__builtin_huge_val', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_huge_vall (void)
+     Similar to `__builtin_huge_val', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_fpclassify (int, int, int, int,
+          int, ...)
+     This built-in implements the C99 fpclassify functionality.  The
+     first five int arguments should be the target library's notion of
+     the possible FP classes and are used for return values.  They must
+     be constant values and they must appear in this order: `FP_NAN',
+     `FP_INFINITE', `FP_NORMAL', `FP_SUBNORMAL' and `FP_ZERO'.  The
+     ellipsis is for exactly one floating point value to classify.  GCC
+     treats the last argument as type-generic, which means it does not
+     do default promotion from float to double.
+
+ -- Built-in Function: double __builtin_inf (void)
+     Similar to `__builtin_huge_val', except a warning is generated if
+     the target floating-point format does not support infinities.
+
+ -- Built-in Function: _Decimal32 __builtin_infd32 (void)
+     Similar to `__builtin_inf', except the return type is `_Decimal32'.
+
+ -- Built-in Function: _Decimal64 __builtin_infd64 (void)
+     Similar to `__builtin_inf', except the return type is `_Decimal64'.
+
+ -- Built-in Function: _Decimal128 __builtin_infd128 (void)
+     Similar to `__builtin_inf', except the return type is
+     `_Decimal128'.
+
+ -- Built-in Function: float __builtin_inff (void)
+     Similar to `__builtin_inf', except the return type is `float'.
+     This function is suitable for implementing the ISO C99 macro
+     `INFINITY'.
+
+ -- Built-in Function: long double __builtin_infl (void)
+     Similar to `__builtin_inf', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_isinf_sign (...)
+     Similar to `isinf', except the return value will be negative for
+     an argument of `-Inf'.  Note while the parameter list is an
+     ellipsis, this function only accepts exactly one floating point
+     argument.  GCC treats this parameter as type-generic, which means
+     it does not do default promotion from float to double.
+
+ -- Built-in Function: double __builtin_nan (const char *str)
+     This is an implementation of the ISO C99 function `nan'.
+
+     Since ISO C99 defines this function in terms of `strtod', which we
+     do not implement, a description of the parsing is in order.  The
+     string is parsed as by `strtol'; that is, the base is recognized by
+     leading `0' or `0x' prefixes.  The number parsed is placed in the
+     significand such that the least significant bit of the number is
+     at the least significant bit of the significand.  The number is
+     truncated to fit the significand field provided.  The significand
+     is forced to be a quiet NaN.
+
+     This function, if given a string literal all of which would have
+     been consumed by strtol, is evaluated early enough that it is
+     considered a compile-time constant.
+
+ -- Built-in Function: _Decimal32 __builtin_nand32 (const char *str)
+     Similar to `__builtin_nan', except the return type is `_Decimal32'.
+
+ -- Built-in Function: _Decimal64 __builtin_nand64 (const char *str)
+     Similar to `__builtin_nan', except the return type is `_Decimal64'.
+
+ -- Built-in Function: _Decimal128 __builtin_nand128 (const char *str)
+     Similar to `__builtin_nan', except the return type is
+     `_Decimal128'.
+
+ -- Built-in Function: float __builtin_nanf (const char *str)
+     Similar to `__builtin_nan', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_nanl (const char *str)
+     Similar to `__builtin_nan', except the return type is `long
+     double'.
+
+ -- Built-in Function: double __builtin_nans (const char *str)
+     Similar to `__builtin_nan', except the significand is forced to be
+     a signaling NaN.  The `nans' function is proposed by WG14 N965.
+
+ -- Built-in Function: float __builtin_nansf (const char *str)
+     Similar to `__builtin_nans', except the return type is `float'.
+
+ -- Built-in Function: long double __builtin_nansl (const char *str)
+     Similar to `__builtin_nans', except the return type is `long
+     double'.
+
+ -- Built-in Function: int __builtin_ffs (unsigned int x)
+     Returns one plus the index of the least significant 1-bit of X, or
+     if X is zero, returns zero.
+
+ -- Built-in Function: int __builtin_clz (unsigned int x)
+     Returns the number of leading 0-bits in X, starting at the most
+     significant bit position.  If X is 0, the result is undefined.
+
+ -- Built-in Function: int __builtin_ctz (unsigned int x)
+     Returns the number of trailing 0-bits in X, starting at the least
+     significant bit position.  If X is 0, the result is undefined.
+
+ -- Built-in Function: int __builtin_popcount (unsigned int x)
+     Returns the number of 1-bits in X.
+
+ -- Built-in Function: int __builtin_parity (unsigned int x)
+     Returns the parity of X, i.e. the number of 1-bits in X modulo 2.
+
+ -- Built-in Function: int __builtin_ffsl (unsigned long)
+     Similar to `__builtin_ffs', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_clzl (unsigned long)
+     Similar to `__builtin_clz', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_ctzl (unsigned long)
+     Similar to `__builtin_ctz', except the argument type is `unsigned
+     long'.
+
+ -- Built-in Function: int __builtin_popcountl (unsigned long)
+     Similar to `__builtin_popcount', except the argument type is
+     `unsigned long'.
+
+ -- Built-in Function: int __builtin_parityl (unsigned long)
+     Similar to `__builtin_parity', except the argument type is
+     `unsigned long'.
+
+ -- Built-in Function: int __builtin_ffsll (unsigned long long)
+     Similar to `__builtin_ffs', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_clzll (unsigned long long)
+     Similar to `__builtin_clz', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_ctzll (unsigned long long)
+     Similar to `__builtin_ctz', except the argument type is `unsigned
+     long long'.
+
+ -- Built-in Function: int __builtin_popcountll (unsigned long long)
+     Similar to `__builtin_popcount', except the argument type is
+     `unsigned long long'.
+
+ -- Built-in Function: int __builtin_parityll (unsigned long long)
+     Similar to `__builtin_parity', except the argument type is
+     `unsigned long long'.
+
+ -- Built-in Function: double __builtin_powi (double, int)
+     Returns the first argument raised to the power of the second.
+     Unlike the `pow' function no guarantees about precision and
+     rounding are made.
+
+ -- Built-in Function: float __builtin_powif (float, int)
+     Similar to `__builtin_powi', except the argument and return types
+     are `float'.
+
+ -- Built-in Function: long double __builtin_powil (long double, int)
+     Similar to `__builtin_powi', except the argument and return types
+     are `long double'.
+
+ -- Built-in Function: int32_t __builtin_bswap32 (int32_t x)
+     Returns X with the order of the bytes reversed; for example,
+     `0xaabbccdd' becomes `0xddccbbaa'.  Byte here always means exactly
+     8 bits.
+
+ -- Built-in Function: int64_t __builtin_bswap64 (int64_t x)
+     Similar to `__builtin_bswap32', except the argument and return
+     types are 64-bit.
+
+
+File: gcc.info,  Node: Target Builtins,  Next: Target Format Checks,  Prev: Other Builtins,  Up: C Extensions
+
+6.52 Built-in Functions Specific to Particular Target Machines
+==============================================================
+
+On some target machines, GCC supports many built-in functions specific
+to those machines.  Generally these generate calls to specific machine
+instructions, but allow the compiler to schedule those calls.
+
+* Menu:
+
+* Alpha Built-in Functions::
+* ARM iWMMXt Built-in Functions::
+* ARM NEON Intrinsics::
+* Blackfin Built-in Functions::
+* FR-V Built-in Functions::
+* X86 Built-in Functions::
+* MIPS DSP Built-in Functions::
+* MIPS Paired-Single Support::
+* MIPS Loongson Built-in Functions::
+* Other MIPS Built-in Functions::
+* picoChip Built-in Functions::
+* PowerPC AltiVec/VSX Built-in Functions::
+* RX Built-in Functions::
+* SPARC VIS Built-in Functions::
+* SPU Built-in Functions::
+
+
+File: gcc.info,  Node: Alpha Built-in Functions,  Next: ARM iWMMXt Built-in Functions,  Up: Target Builtins
+
+6.52.1 Alpha Built-in Functions
+-------------------------------
+
+These built-in functions are available for the Alpha family of
+processors, depending on the command-line switches used.
+
+ The following built-in functions are always available.  They all
+generate the machine instruction that is part of the name.
+
+     long __builtin_alpha_implver (void)
+     long __builtin_alpha_rpcc (void)
+     long __builtin_alpha_amask (long)
+     long __builtin_alpha_cmpbge (long, long)
+     long __builtin_alpha_extbl (long, long)
+     long __builtin_alpha_extwl (long, long)
+     long __builtin_alpha_extll (long, long)
+     long __builtin_alpha_extql (long, long)
+     long __builtin_alpha_extwh (long, long)
+     long __builtin_alpha_extlh (long, long)
+     long __builtin_alpha_extqh (long, long)
+     long __builtin_alpha_insbl (long, long)
+     long __builtin_alpha_inswl (long, long)
+     long __builtin_alpha_insll (long, long)
+     long __builtin_alpha_insql (long, long)
+     long __builtin_alpha_inswh (long, long)
+     long __builtin_alpha_inslh (long, long)
+     long __builtin_alpha_insqh (long, long)
+     long __builtin_alpha_mskbl (long, long)
+     long __builtin_alpha_mskwl (long, long)
+     long __builtin_alpha_mskll (long, long)
+     long __builtin_alpha_mskql (long, long)
+     long __builtin_alpha_mskwh (long, long)
+     long __builtin_alpha_msklh (long, long)
+     long __builtin_alpha_mskqh (long, long)
+     long __builtin_alpha_umulh (long, long)
+     long __builtin_alpha_zap (long, long)
+     long __builtin_alpha_zapnot (long, long)
+
+ The following built-in functions are always with `-mmax' or
+`-mcpu=CPU' where CPU is `pca56' or later.  They all generate the
+machine instruction that is part of the name.
+
+     long __builtin_alpha_pklb (long)
+     long __builtin_alpha_pkwb (long)
+     long __builtin_alpha_unpkbl (long)
+     long __builtin_alpha_unpkbw (long)
+     long __builtin_alpha_minub8 (long, long)
+     long __builtin_alpha_minsb8 (long, long)
+     long __builtin_alpha_minuw4 (long, long)
+     long __builtin_alpha_minsw4 (long, long)
+     long __builtin_alpha_maxub8 (long, long)
+     long __builtin_alpha_maxsb8 (long, long)
+     long __builtin_alpha_maxuw4 (long, long)
+     long __builtin_alpha_maxsw4 (long, long)
+     long __builtin_alpha_perr (long, long)
+
+ The following built-in functions are always with `-mcix' or
+`-mcpu=CPU' where CPU is `ev67' or later.  They all generate the
+machine instruction that is part of the name.
+
+     long __builtin_alpha_cttz (long)
+     long __builtin_alpha_ctlz (long)
+     long __builtin_alpha_ctpop (long)
+
+ The following builtins are available on systems that use the OSF/1
+PALcode.  Normally they invoke the `rduniq' and `wruniq' PAL calls, but
+when invoked with `-mtls-kernel', they invoke `rdval' and `wrval'.
+
+     void *__builtin_thread_pointer (void)
+     void __builtin_set_thread_pointer (void *)
+
+
+File: gcc.info,  Node: ARM iWMMXt Built-in Functions,  Next: ARM NEON Intrinsics,  Prev: Alpha Built-in Functions,  Up: Target Builtins
+
+6.52.2 ARM iWMMXt Built-in Functions
+------------------------------------
+
+These built-in functions are available for the ARM family of processors
+when the `-mcpu=iwmmxt' switch is used:
+
+     typedef int v2si __attribute__ ((vector_size (8)));
+     typedef short v4hi __attribute__ ((vector_size (8)));
+     typedef char v8qi __attribute__ ((vector_size (8)));
+
+     int __builtin_arm_getwcx (int)
+     void __builtin_arm_setwcx (int, int)
+     int __builtin_arm_textrmsb (v8qi, int)
+     int __builtin_arm_textrmsh (v4hi, int)
+     int __builtin_arm_textrmsw (v2si, int)
+     int __builtin_arm_textrmub (v8qi, int)
+     int __builtin_arm_textrmuh (v4hi, int)
+     int __builtin_arm_textrmuw (v2si, int)
+     v8qi __builtin_arm_tinsrb (v8qi, int)
+     v4hi __builtin_arm_tinsrh (v4hi, int)
+     v2si __builtin_arm_tinsrw (v2si, int)
+     long long __builtin_arm_tmia (long long, int, int)
+     long long __builtin_arm_tmiabb (long long, int, int)
+     long long __builtin_arm_tmiabt (long long, int, int)
+     long long __builtin_arm_tmiaph (long long, int, int)
+     long long __builtin_arm_tmiatb (long long, int, int)
+     long long __builtin_arm_tmiatt (long long, int, int)
+     int __builtin_arm_tmovmskb (v8qi)
+     int __builtin_arm_tmovmskh (v4hi)
+     int __builtin_arm_tmovmskw (v2si)
+     long long __builtin_arm_waccb (v8qi)
+     long long __builtin_arm_wacch (v4hi)
+     long long __builtin_arm_waccw (v2si)
+     v8qi __builtin_arm_waddb (v8qi, v8qi)
+     v8qi __builtin_arm_waddbss (v8qi, v8qi)
+     v8qi __builtin_arm_waddbus (v8qi, v8qi)
+     v4hi __builtin_arm_waddh (v4hi, v4hi)
+     v4hi __builtin_arm_waddhss (v4hi, v4hi)
+     v4hi __builtin_arm_waddhus (v4hi, v4hi)
+     v2si __builtin_arm_waddw (v2si, v2si)
+     v2si __builtin_arm_waddwss (v2si, v2si)
+     v2si __builtin_arm_waddwus (v2si, v2si)
+     v8qi __builtin_arm_walign (v8qi, v8qi, int)
+     long long __builtin_arm_wand(long long, long long)
+     long long __builtin_arm_wandn (long long, long long)
+     v8qi __builtin_arm_wavg2b (v8qi, v8qi)
+     v8qi __builtin_arm_wavg2br (v8qi, v8qi)
+     v4hi __builtin_arm_wavg2h (v4hi, v4hi)
+     v4hi __builtin_arm_wavg2hr (v4hi, v4hi)
+     v8qi __builtin_arm_wcmpeqb (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpeqh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpeqw (v2si, v2si)
+     v8qi __builtin_arm_wcmpgtsb (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpgtsh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpgtsw (v2si, v2si)
+     v8qi __builtin_arm_wcmpgtub (v8qi, v8qi)
+     v4hi __builtin_arm_wcmpgtuh (v4hi, v4hi)
+     v2si __builtin_arm_wcmpgtuw (v2si, v2si)
+     long long __builtin_arm_wmacs (long long, v4hi, v4hi)
+     long long __builtin_arm_wmacsz (v4hi, v4hi)
+     long long __builtin_arm_wmacu (long long, v4hi, v4hi)
+     long long __builtin_arm_wmacuz (v4hi, v4hi)
+     v4hi __builtin_arm_wmadds (v4hi, v4hi)
+     v4hi __builtin_arm_wmaddu (v4hi, v4hi)
+     v8qi __builtin_arm_wmaxsb (v8qi, v8qi)
+     v4hi __builtin_arm_wmaxsh (v4hi, v4hi)
+     v2si __builtin_arm_wmaxsw (v2si, v2si)
+     v8qi __builtin_arm_wmaxub (v8qi, v8qi)
+     v4hi __builtin_arm_wmaxuh (v4hi, v4hi)
+     v2si __builtin_arm_wmaxuw (v2si, v2si)
+     v8qi __builtin_arm_wminsb (v8qi, v8qi)
+     v4hi __builtin_arm_wminsh (v4hi, v4hi)
+     v2si __builtin_arm_wminsw (v2si, v2si)
+     v8qi __builtin_arm_wminub (v8qi, v8qi)
+     v4hi __builtin_arm_wminuh (v4hi, v4hi)
+     v2si __builtin_arm_wminuw (v2si, v2si)
+     v4hi __builtin_arm_wmulsm (v4hi, v4hi)
+     v4hi __builtin_arm_wmulul (v4hi, v4hi)
+     v4hi __builtin_arm_wmulum (v4hi, v4hi)
+     long long __builtin_arm_wor (long long, long long)
+     v2si __builtin_arm_wpackdss (long long, long long)
+     v2si __builtin_arm_wpackdus (long long, long long)
+     v8qi __builtin_arm_wpackhss (v4hi, v4hi)
+     v8qi __builtin_arm_wpackhus (v4hi, v4hi)
+     v4hi __builtin_arm_wpackwss (v2si, v2si)
+     v4hi __builtin_arm_wpackwus (v2si, v2si)
+     long long __builtin_arm_wrord (long long, long long)
+     long long __builtin_arm_wrordi (long long, int)
+     v4hi __builtin_arm_wrorh (v4hi, long long)
+     v4hi __builtin_arm_wrorhi (v4hi, int)
+     v2si __builtin_arm_wrorw (v2si, long long)
+     v2si __builtin_arm_wrorwi (v2si, int)
+     v2si __builtin_arm_wsadb (v8qi, v8qi)
+     v2si __builtin_arm_wsadbz (v8qi, v8qi)
+     v2si __builtin_arm_wsadh (v4hi, v4hi)
+     v2si __builtin_arm_wsadhz (v4hi, v4hi)
+     v4hi __builtin_arm_wshufh (v4hi, int)
+     long long __builtin_arm_wslld (long long, long long)
+     long long __builtin_arm_wslldi (long long, int)
+     v4hi __builtin_arm_wsllh (v4hi, long long)
+     v4hi __builtin_arm_wsllhi (v4hi, int)
+     v2si __builtin_arm_wsllw (v2si, long long)
+     v2si __builtin_arm_wsllwi (v2si, int)
+     long long __builtin_arm_wsrad (long long, long long)
+     long long __builtin_arm_wsradi (long long, int)
+     v4hi __builtin_arm_wsrah (v4hi, long long)
+     v4hi __builtin_arm_wsrahi (v4hi, int)
+     v2si __builtin_arm_wsraw (v2si, long long)
+     v2si __builtin_arm_wsrawi (v2si, int)
+     long long __builtin_arm_wsrld (long long, long long)
+     long long __builtin_arm_wsrldi (long long, int)
+     v4hi __builtin_arm_wsrlh (v4hi, long long)
+     v4hi __builtin_arm_wsrlhi (v4hi, int)
+     v2si __builtin_arm_wsrlw (v2si, long long)
+     v2si __builtin_arm_wsrlwi (v2si, int)
+     v8qi __builtin_arm_wsubb (v8qi, v8qi)
+     v8qi __builtin_arm_wsubbss (v8qi, v8qi)
+     v8qi __builtin_arm_wsubbus (v8qi, v8qi)
+     v4hi __builtin_arm_wsubh (v4hi, v4hi)
+     v4hi __builtin_arm_wsubhss (v4hi, v4hi)
+     v4hi __builtin_arm_wsubhus (v4hi, v4hi)
+     v2si __builtin_arm_wsubw (v2si, v2si)
+     v2si __builtin_arm_wsubwss (v2si, v2si)
+     v2si __builtin_arm_wsubwus (v2si, v2si)
+     v4hi __builtin_arm_wunpckehsb (v8qi)
+     v2si __builtin_arm_wunpckehsh (v4hi)
+     long long __builtin_arm_wunpckehsw (v2si)
+     v4hi __builtin_arm_wunpckehub (v8qi)
+     v2si __builtin_arm_wunpckehuh (v4hi)
+     long long __builtin_arm_wunpckehuw (v2si)
+     v4hi __builtin_arm_wunpckelsb (v8qi)
+     v2si __builtin_arm_wunpckelsh (v4hi)
+     long long __builtin_arm_wunpckelsw (v2si)
+     v4hi __builtin_arm_wunpckelub (v8qi)
+     v2si __builtin_arm_wunpckeluh (v4hi)
+     long long __builtin_arm_wunpckeluw (v2si)
+     v8qi __builtin_arm_wunpckihb (v8qi, v8qi)
+     v4hi __builtin_arm_wunpckihh (v4hi, v4hi)
+     v2si __builtin_arm_wunpckihw (v2si, v2si)
+     v8qi __builtin_arm_wunpckilb (v8qi, v8qi)
+     v4hi __builtin_arm_wunpckilh (v4hi, v4hi)
+     v2si __builtin_arm_wunpckilw (v2si, v2si)
+     long long __builtin_arm_wxor (long long, long long)
+     long long __builtin_arm_wzero ()
+
+
+File: gcc.info,  Node: ARM NEON Intrinsics,  Next: Blackfin Built-in Functions,  Prev: ARM iWMMXt Built-in Functions,  Up: Target Builtins
+
+6.52.3 ARM NEON Intrinsics
+--------------------------
+
+These built-in intrinsics for the ARM Advanced SIMD extension are
+available when the `-mfpu=neon' switch is used:
+
+6.52.3.1 Addition
+.................
+
+   * uint32x2_t vadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vadd.i32 D0, D0, D0'
+
+   * uint16x4_t vadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vadd.i16 D0, D0, D0'
+
+   * uint8x8_t vadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vadd.i8 D0, D0, D0'
+
+   * int32x2_t vadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vadd.i32 D0, D0, D0'
+
+   * int16x4_t vadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vadd.i16 D0, D0, D0'
+
+   * int8x8_t vadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vadd.i8 D0, D0, D0'
+
+   * uint64x1_t vadd_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vadd.i64 D0, D0, D0'
+
+   * int64x1_t vadd_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vadd.i64 D0, D0, D0'
+
+   * float32x2_t vadd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vadd.f32 D0, D0, D0'
+
+   * uint32x4_t vaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vadd.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vadd.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vadd.i8 Q0, Q0, Q0'
+
+   * int32x4_t vaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vadd.i32 Q0, Q0, Q0'
+
+   * int16x8_t vaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vadd.i16 Q0, Q0, Q0'
+
+   * int8x16_t vaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vadd.i8 Q0, Q0, Q0'
+
+   * uint64x2_t vaddq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vadd.i64 Q0, Q0, Q0'
+
+   * int64x2_t vaddq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vadd.i64 Q0, Q0, Q0'
+
+   * float32x4_t vaddq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vadd.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vaddl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaddl.u32 Q0, D0, D0'
+
+   * uint32x4_t vaddl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaddl.u16 Q0, D0, D0'
+
+   * uint16x8_t vaddl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaddl.u8 Q0, D0, D0'
+
+   * int64x2_t vaddl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaddl.s32 Q0, D0, D0'
+
+   * int32x4_t vaddl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaddl.s16 Q0, D0, D0'
+
+   * int16x8_t vaddl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaddl.s8 Q0, D0, D0'
+
+   * uint64x2_t vaddw_u32 (uint64x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaddw.u32 Q0, Q0, D0'
+
+   * uint32x4_t vaddw_u16 (uint32x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaddw.u16 Q0, Q0, D0'
+
+   * uint16x8_t vaddw_u8 (uint16x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaddw.u8 Q0, Q0, D0'
+
+   * int64x2_t vaddw_s32 (int64x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaddw.s32 Q0, Q0, D0'
+
+   * int32x4_t vaddw_s16 (int32x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaddw.s16 Q0, Q0, D0'
+
+   * int16x8_t vaddw_s8 (int16x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaddw.s8 Q0, Q0, D0'
+
+   * uint32x2_t vhadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vhadd.u32 D0, D0, D0'
+
+   * uint16x4_t vhadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vhadd.u16 D0, D0, D0'
+
+   * uint8x8_t vhadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vhadd.u8 D0, D0, D0'
+
+   * int32x2_t vhadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vhadd.s32 D0, D0, D0'
+
+   * int16x4_t vhadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vhadd.s16 D0, D0, D0'
+
+   * int8x8_t vhadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vhadd.s8 D0, D0, D0'
+
+   * uint32x4_t vhaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vhadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vhaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vhadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vhaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vhadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vhaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vhadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vhaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vhadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vhaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vhadd.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vrhadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vrhadd.u32 D0, D0, D0'
+
+   * uint16x4_t vrhadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vrhadd.u16 D0, D0, D0'
+
+   * uint8x8_t vrhadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vrhadd.u8 D0, D0, D0'
+
+   * int32x2_t vrhadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrhadd.s32 D0, D0, D0'
+
+   * int16x4_t vrhadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrhadd.s16 D0, D0, D0'
+
+   * int8x8_t vrhadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrhadd.s8 D0, D0, D0'
+
+   * uint32x4_t vrhaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vrhadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vrhaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vrhadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vrhaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vrhadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vrhaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrhadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vrhaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrhadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vrhaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrhadd.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vqadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vqadd.u32 D0, D0, D0'
+
+   * uint16x4_t vqadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vqadd.u16 D0, D0, D0'
+
+   * uint8x8_t vqadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vqadd.u8 D0, D0, D0'
+
+   * int32x2_t vqadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqadd.s32 D0, D0, D0'
+
+   * int16x4_t vqadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqadd.s16 D0, D0, D0'
+
+   * int8x8_t vqadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqadd.s8 D0, D0, D0'
+
+   * uint64x1_t vqadd_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vqadd.u64 D0, D0, D0'
+
+   * int64x1_t vqadd_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqadd.s64 D0, D0, D0'
+
+   * uint32x4_t vqaddq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vqadd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqaddq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vqadd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqaddq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vqadd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqaddq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqadd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqaddq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqadd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqaddq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqadd.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqaddq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vqadd.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqaddq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqadd.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vaddhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vaddhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vaddhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vaddhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vaddhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vaddhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vaddhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vaddhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vaddhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vaddhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vaddhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vaddhn.i16 D0, Q0, Q0'
+
+   * uint32x2_t vraddhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vraddhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vraddhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vraddhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vraddhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vraddhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vraddhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vraddhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vraddhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vraddhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vraddhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vraddhn.i16 D0, Q0, Q0'
+
+6.52.3.2 Multiplication
+.......................
+
+   * uint32x2_t vmul_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0'
+
+   * uint16x4_t vmul_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0'
+
+   * uint8x8_t vmul_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmul.i8 D0, D0, D0'
+
+   * int32x2_t vmul_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0'
+
+   * int16x4_t vmul_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0'
+
+   * int8x8_t vmul_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmul.i8 D0, D0, D0'
+
+   * float32x2_t vmul_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0'
+
+   * poly8x8_t vmul_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vmul.p8 D0, D0, D0'
+
+   * uint32x4_t vmulq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmulq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmulq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmul.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmulq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmulq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmulq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmul.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmulq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, Q0'
+
+   * poly8x16_t vmulq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vmul.p8 Q0, Q0, Q0'
+
+   * int32x2_t vqdmulh_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0'
+
+   * int16x4_t vqdmulh_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0'
+
+   * int32x4_t vqdmulhq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqdmulhq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, Q0'
+
+   * int32x2_t vqrdmulh_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0'
+
+   * int16x4_t vqrdmulh_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0'
+
+   * int32x4_t vqrdmulhq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqrdmulhq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, Q0'
+
+   * uint64x2_t vmull_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0'
+
+   * uint32x4_t vmull_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0'
+
+   * uint16x8_t vmull_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmull.u8 Q0, D0, D0'
+
+   * int64x2_t vmull_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0'
+
+   * int32x4_t vmull_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0'
+
+   * int16x8_t vmull_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmull.s8 Q0, D0, D0'
+
+   * poly16x8_t vmull_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vmull.p8 Q0, D0, D0'
+
+   * int64x2_t vqdmull_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmull_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0'
+
+6.52.3.3 Multiply-accumulate
+............................
+
+   * uint32x2_t vmla_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0'
+
+   * uint16x4_t vmla_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0'
+
+   * uint8x8_t vmla_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmla.i8 D0, D0, D0'
+
+   * int32x2_t vmla_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0'
+
+   * int16x4_t vmla_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0'
+
+   * int8x8_t vmla_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmla.i8 D0, D0, D0'
+
+   * float32x2_t vmla_f32 (float32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0'
+
+   * uint32x4_t vmlaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmlaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmlaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmla.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmlaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmlaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmlaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmla.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmlaq_f32 (float32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vmlal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0'
+
+   * uint32x4_t vmlal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0'
+
+   * uint16x8_t vmlal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmlal.u8 Q0, D0, D0'
+
+   * int64x2_t vmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0'
+
+   * int32x4_t vmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0'
+
+   * int16x8_t vmlal_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmlal.s8 Q0, D0, D0'
+
+   * int64x2_t vqdmlal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmlal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0'
+
+6.52.3.4 Multiply-subtract
+..........................
+
+   * uint32x2_t vmls_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0'
+
+   * uint16x4_t vmls_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0'
+
+   * uint8x8_t vmls_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmls.i8 D0, D0, D0'
+
+   * int32x2_t vmls_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0'
+
+   * int16x4_t vmls_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0'
+
+   * int8x8_t vmls_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmls.i8 D0, D0, D0'
+
+   * float32x2_t vmls_f32 (float32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0'
+
+   * uint32x4_t vmlsq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vmlsq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vmlsq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmls.i8 Q0, Q0, Q0'
+
+   * int32x4_t vmlsq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, Q0'
+
+   * int16x8_t vmlsq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, Q0'
+
+   * int8x16_t vmlsq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmls.i8 Q0, Q0, Q0'
+
+   * float32x4_t vmlsq_f32 (float32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vmlsl_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0'
+
+   * uint32x4_t vmlsl_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0'
+
+   * uint16x8_t vmlsl_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmlsl.u8 Q0, D0, D0'
+
+   * int64x2_t vmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0'
+
+   * int32x4_t vmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0'
+
+   * int16x8_t vmlsl_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmlsl.s8 Q0, D0, D0'
+
+   * int64x2_t vqdmlsl_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0'
+
+   * int32x4_t vqdmlsl_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0'
+
+6.52.3.5 Subtraction
+....................
+
+   * uint32x2_t vsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsub.i32 D0, D0, D0'
+
+   * uint16x4_t vsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsub.i16 D0, D0, D0'
+
+   * uint8x8_t vsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsub.i8 D0, D0, D0'
+
+   * int32x2_t vsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsub.i32 D0, D0, D0'
+
+   * int16x4_t vsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsub.i16 D0, D0, D0'
+
+   * int8x8_t vsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsub.i8 D0, D0, D0'
+
+   * uint64x1_t vsub_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vsub.i64 D0, D0, D0'
+
+   * int64x1_t vsub_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vsub.i64 D0, D0, D0'
+
+   * float32x2_t vsub_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vsub.f32 D0, D0, D0'
+
+   * uint32x4_t vsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vsub.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vsub.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vsub.i8 Q0, Q0, Q0'
+
+   * int32x4_t vsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vsub.i32 Q0, Q0, Q0'
+
+   * int16x8_t vsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vsub.i16 Q0, Q0, Q0'
+
+   * int8x16_t vsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vsub.i8 Q0, Q0, Q0'
+
+   * uint64x2_t vsubq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vsub.i64 Q0, Q0, Q0'
+
+   * int64x2_t vsubq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vsub.i64 Q0, Q0, Q0'
+
+   * float32x4_t vsubq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vsub.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vsubl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsubl.u32 Q0, D0, D0'
+
+   * uint32x4_t vsubl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsubl.u16 Q0, D0, D0'
+
+   * uint16x8_t vsubl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsubl.u8 Q0, D0, D0'
+
+   * int64x2_t vsubl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsubl.s32 Q0, D0, D0'
+
+   * int32x4_t vsubl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsubl.s16 Q0, D0, D0'
+
+   * int16x8_t vsubl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsubl.s8 Q0, D0, D0'
+
+   * uint64x2_t vsubw_u32 (uint64x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vsubw.u32 Q0, Q0, D0'
+
+   * uint32x4_t vsubw_u16 (uint32x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vsubw.u16 Q0, Q0, D0'
+
+   * uint16x8_t vsubw_u8 (uint16x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vsubw.u8 Q0, Q0, D0'
+
+   * int64x2_t vsubw_s32 (int64x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vsubw.s32 Q0, Q0, D0'
+
+   * int32x4_t vsubw_s16 (int32x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vsubw.s16 Q0, Q0, D0'
+
+   * int16x8_t vsubw_s8 (int16x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vsubw.s8 Q0, Q0, D0'
+
+   * uint32x2_t vhsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vhsub.u32 D0, D0, D0'
+
+   * uint16x4_t vhsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vhsub.u16 D0, D0, D0'
+
+   * uint8x8_t vhsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vhsub.u8 D0, D0, D0'
+
+   * int32x2_t vhsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vhsub.s32 D0, D0, D0'
+
+   * int16x4_t vhsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vhsub.s16 D0, D0, D0'
+
+   * int8x8_t vhsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vhsub.s8 D0, D0, D0'
+
+   * uint32x4_t vhsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vhsub.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vhsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vhsub.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vhsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vhsub.u8 Q0, Q0, Q0'
+
+   * int32x4_t vhsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vhsub.s32 Q0, Q0, Q0'
+
+   * int16x8_t vhsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vhsub.s16 Q0, Q0, Q0'
+
+   * int8x16_t vhsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vhsub.s8 Q0, Q0, Q0'
+
+   * uint32x2_t vqsub_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vqsub.u32 D0, D0, D0'
+
+   * uint16x4_t vqsub_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vqsub.u16 D0, D0, D0'
+
+   * uint8x8_t vqsub_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vqsub.u8 D0, D0, D0'
+
+   * int32x2_t vqsub_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqsub.s32 D0, D0, D0'
+
+   * int16x4_t vqsub_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqsub.s16 D0, D0, D0'
+
+   * int8x8_t vqsub_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqsub.s8 D0, D0, D0'
+
+   * uint64x1_t vqsub_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vqsub.u64 D0, D0, D0'
+
+   * int64x1_t vqsub_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqsub.s64 D0, D0, D0'
+
+   * uint32x4_t vqsubq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vqsub.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqsubq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vqsub.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqsubq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vqsub.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqsubq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqsub.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqsubq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqsub.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqsubq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqsub.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqsubq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vqsub.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqsubq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqsub.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vsubhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vsubhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vsubhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vsubhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vsubhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vsubhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vsubhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vsubhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vsubhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vsubhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vsubhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vsubhn.i16 D0, Q0, Q0'
+
+   * uint32x2_t vrsubhn_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vrsubhn.i64 D0, Q0, Q0'
+
+   * uint16x4_t vrsubhn_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vrsubhn.i32 D0, Q0, Q0'
+
+   * uint8x8_t vrsubhn_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vrsubhn.i16 D0, Q0, Q0'
+
+   * int32x2_t vrsubhn_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrsubhn.i64 D0, Q0, Q0'
+
+   * int16x4_t vrsubhn_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrsubhn.i32 D0, Q0, Q0'
+
+   * int8x8_t vrsubhn_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrsubhn.i16 D0, Q0, Q0'
+
+6.52.3.6 Comparison (equal-to)
+..............................
+
+   * uint32x2_t vceq_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vceq.i32 D0, D0, D0'
+
+   * uint16x4_t vceq_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vceq.i16 D0, D0, D0'
+
+   * uint8x8_t vceq_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x2_t vceq_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vceq.i32 D0, D0, D0'
+
+   * uint16x4_t vceq_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vceq.i16 D0, D0, D0'
+
+   * uint8x8_t vceq_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x2_t vceq_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vceq.f32 D0, D0, D0'
+
+   * uint8x8_t vceq_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vceq.i8 D0, D0, D0'
+
+   * uint32x4_t vceqq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vceq.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vceqq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vceq.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+   * uint32x4_t vceqq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vceq.i32 Q0, Q0, Q0'
+
+   * uint16x8_t vceqq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vceq.i16 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+   * uint32x4_t vceqq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vceq.f32 Q0, Q0, Q0'
+
+   * uint8x16_t vceqq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vceq.i8 Q0, Q0, Q0'
+
+6.52.3.7 Comparison (greater-than-or-equal-to)
+..............................................
+
+   * uint32x2_t vcge_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcge.u32 D0, D0, D0'
+
+   * uint16x4_t vcge_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcge.u16 D0, D0, D0'
+
+   * uint8x8_t vcge_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcge.u8 D0, D0, D0'
+
+   * uint32x2_t vcge_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcge.s32 D0, D0, D0'
+
+   * uint16x4_t vcge_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcge.s16 D0, D0, D0'
+
+   * uint8x8_t vcge_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcge.s8 D0, D0, D0'
+
+   * uint32x2_t vcge_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcge.f32 D0, D0, D0'
+
+   * uint32x4_t vcgeq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcge.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgeq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcge.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgeq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcge.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgeq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcge.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgeq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcge.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgeq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcge.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgeq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcge.f32 Q0, Q0, Q0'
+
+6.52.3.8 Comparison (less-than-or-equal-to)
+...........................................
+
+   * uint32x2_t vcle_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcge.u32 D0, D0, D0'
+
+   * uint16x4_t vcle_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcge.u16 D0, D0, D0'
+
+   * uint8x8_t vcle_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcge.u8 D0, D0, D0'
+
+   * uint32x2_t vcle_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcge.s32 D0, D0, D0'
+
+   * uint16x4_t vcle_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcge.s16 D0, D0, D0'
+
+   * uint8x8_t vcle_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcge.s8 D0, D0, D0'
+
+   * uint32x2_t vcle_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcge.f32 D0, D0, D0'
+
+   * uint32x4_t vcleq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcge.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcleq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcge.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcleq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcge.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcleq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcge.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcleq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcge.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcleq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcge.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcleq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcge.f32 Q0, Q0, Q0'
+
+6.52.3.9 Comparison (greater-than)
+..................................
+
+   * uint32x2_t vcgt_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcgt.u32 D0, D0, D0'
+
+   * uint16x4_t vcgt_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcgt.u16 D0, D0, D0'
+
+   * uint8x8_t vcgt_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcgt.u8 D0, D0, D0'
+
+   * uint32x2_t vcgt_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcgt.s32 D0, D0, D0'
+
+   * uint16x4_t vcgt_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcgt.s16 D0, D0, D0'
+
+   * uint8x8_t vcgt_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcgt.s8 D0, D0, D0'
+
+   * uint32x2_t vcgt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcgtq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcgt.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgtq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcgt.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgtq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcgt.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgtq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcgt.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcgtq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcgt.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcgtq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcgt.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcgtq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcgt.f32 Q0, Q0, Q0'
+
+6.52.3.10 Comparison (less-than)
+................................
+
+   * uint32x2_t vclt_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vcgt.u32 D0, D0, D0'
+
+   * uint16x4_t vclt_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vcgt.u16 D0, D0, D0'
+
+   * uint8x8_t vclt_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vcgt.u8 D0, D0, D0'
+
+   * uint32x2_t vclt_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vcgt.s32 D0, D0, D0'
+
+   * uint16x4_t vclt_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vcgt.s16 D0, D0, D0'
+
+   * uint8x8_t vclt_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vcgt.s8 D0, D0, D0'
+
+   * uint32x2_t vclt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vcgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcltq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vcgt.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vcltq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vcgt.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vcltq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vcgt.u8 Q0, Q0, Q0'
+
+   * uint32x4_t vcltq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vcgt.s32 Q0, Q0, Q0'
+
+   * uint16x8_t vcltq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vcgt.s16 Q0, Q0, Q0'
+
+   * uint8x16_t vcltq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vcgt.s8 Q0, Q0, Q0'
+
+   * uint32x4_t vcltq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vcgt.f32 Q0, Q0, Q0'
+
+6.52.3.11 Comparison (absolute greater-than-or-equal-to)
+........................................................
+
+   * uint32x2_t vcage_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacge.f32 D0, D0, D0'
+
+   * uint32x4_t vcageq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacge.f32 Q0, Q0, Q0'
+
+6.52.3.12 Comparison (absolute less-than-or-equal-to)
+.....................................................
+
+   * uint32x2_t vcale_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacge.f32 D0, D0, D0'
+
+   * uint32x4_t vcaleq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacge.f32 Q0, Q0, Q0'
+
+6.52.3.13 Comparison (absolute greater-than)
+............................................
+
+   * uint32x2_t vcagt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcagtq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacgt.f32 Q0, Q0, Q0'
+
+6.52.3.14 Comparison (absolute less-than)
+.........................................
+
+   * uint32x2_t vcalt_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vacgt.f32 D0, D0, D0'
+
+   * uint32x4_t vcaltq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vacgt.f32 Q0, Q0, Q0'
+
+6.52.3.15 Test bits
+...................
+
+   * uint32x2_t vtst_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vtst.32 D0, D0, D0'
+
+   * uint16x4_t vtst_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vtst.16 D0, D0, D0'
+
+   * uint8x8_t vtst_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint32x2_t vtst_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vtst.32 D0, D0, D0'
+
+   * uint16x4_t vtst_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vtst.16 D0, D0, D0'
+
+   * uint8x8_t vtst_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint8x8_t vtst_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vtst.8 D0, D0, D0'
+
+   * uint32x4_t vtstq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vtst.32 Q0, Q0, Q0'
+
+   * uint16x8_t vtstq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vtst.16 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+   * uint32x4_t vtstq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vtst.32 Q0, Q0, Q0'
+
+   * uint16x8_t vtstq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vtst.16 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+   * uint8x16_t vtstq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vtst.8 Q0, Q0, Q0'
+
+6.52.3.16 Absolute difference
+.............................
+
+   * uint32x2_t vabd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabd.u32 D0, D0, D0'
+
+   * uint16x4_t vabd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabd.u16 D0, D0, D0'
+
+   * uint8x8_t vabd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabd.u8 D0, D0, D0'
+
+   * int32x2_t vabd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabd.s32 D0, D0, D0'
+
+   * int16x4_t vabd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabd.s16 D0, D0, D0'
+
+   * int8x8_t vabd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabd.s8 D0, D0, D0'
+
+   * float32x2_t vabd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vabd.f32 D0, D0, D0'
+
+   * uint32x4_t vabdq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vabd.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vabdq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vabd.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vabdq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vabd.u8 Q0, Q0, Q0'
+
+   * int32x4_t vabdq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vabd.s32 Q0, Q0, Q0'
+
+   * int16x8_t vabdq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vabd.s16 Q0, Q0, Q0'
+
+   * int8x16_t vabdq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vabd.s8 Q0, Q0, Q0'
+
+   * float32x4_t vabdq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vabd.f32 Q0, Q0, Q0'
+
+   * uint64x2_t vabdl_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabdl.u32 Q0, D0, D0'
+
+   * uint32x4_t vabdl_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabdl.u16 Q0, D0, D0'
+
+   * uint16x8_t vabdl_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabdl.u8 Q0, D0, D0'
+
+   * int64x2_t vabdl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabdl.s32 Q0, D0, D0'
+
+   * int32x4_t vabdl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabdl.s16 Q0, D0, D0'
+
+   * int16x8_t vabdl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabdl.s8 Q0, D0, D0'
+
+6.52.3.17 Absolute difference and accumulate
+............................................
+
+   * uint32x2_t vaba_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vaba.u32 D0, D0, D0'
+
+   * uint16x4_t vaba_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vaba.u16 D0, D0, D0'
+
+   * uint8x8_t vaba_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vaba.u8 D0, D0, D0'
+
+   * int32x2_t vaba_s32 (int32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vaba.s32 D0, D0, D0'
+
+   * int16x4_t vaba_s16 (int16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vaba.s16 D0, D0, D0'
+
+   * int8x8_t vaba_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vaba.s8 D0, D0, D0'
+
+   * uint32x4_t vabaq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vaba.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vabaq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vaba.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vabaq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vaba.u8 Q0, Q0, Q0'
+
+   * int32x4_t vabaq_s32 (int32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vaba.s32 Q0, Q0, Q0'
+
+   * int16x8_t vabaq_s16 (int16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vaba.s16 Q0, Q0, Q0'
+
+   * int8x16_t vabaq_s8 (int8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vaba.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vabal_u32 (uint64x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vabal.u32 Q0, D0, D0'
+
+   * uint32x4_t vabal_u16 (uint32x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vabal.u16 Q0, D0, D0'
+
+   * uint16x8_t vabal_u8 (uint16x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vabal.u8 Q0, D0, D0'
+
+   * int64x2_t vabal_s32 (int64x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vabal.s32 Q0, D0, D0'
+
+   * int32x4_t vabal_s16 (int32x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vabal.s16 Q0, D0, D0'
+
+   * int16x8_t vabal_s8 (int16x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vabal.s8 Q0, D0, D0'
+
+6.52.3.18 Maximum
+.................
+
+   * uint32x2_t vmax_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmax.u32 D0, D0, D0'
+
+   * uint16x4_t vmax_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmax.u16 D0, D0, D0'
+
+   * uint8x8_t vmax_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmax.u8 D0, D0, D0'
+
+   * int32x2_t vmax_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmax.s32 D0, D0, D0'
+
+   * int16x4_t vmax_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmax.s16 D0, D0, D0'
+
+   * int8x8_t vmax_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmax.s8 D0, D0, D0'
+
+   * float32x2_t vmax_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmax.f32 D0, D0, D0'
+
+   * uint32x4_t vmaxq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmax.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vmaxq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmax.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vmaxq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmax.u8 Q0, Q0, Q0'
+
+   * int32x4_t vmaxq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmax.s32 Q0, Q0, Q0'
+
+   * int16x8_t vmaxq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmax.s16 Q0, Q0, Q0'
+
+   * int8x16_t vmaxq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmax.s8 Q0, Q0, Q0'
+
+   * float32x4_t vmaxq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmax.f32 Q0, Q0, Q0'
+
+6.52.3.19 Minimum
+.................
+
+   * uint32x2_t vmin_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vmin.u32 D0, D0, D0'
+
+   * uint16x4_t vmin_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vmin.u16 D0, D0, D0'
+
+   * uint8x8_t vmin_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vmin.u8 D0, D0, D0'
+
+   * int32x2_t vmin_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vmin.s32 D0, D0, D0'
+
+   * int16x4_t vmin_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vmin.s16 D0, D0, D0'
+
+   * int8x8_t vmin_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vmin.s8 D0, D0, D0'
+
+   * float32x2_t vmin_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vmin.f32 D0, D0, D0'
+
+   * uint32x4_t vminq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vmin.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vminq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vmin.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vminq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vmin.u8 Q0, Q0, Q0'
+
+   * int32x4_t vminq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vmin.s32 Q0, Q0, Q0'
+
+   * int16x8_t vminq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vmin.s16 Q0, Q0, Q0'
+
+   * int8x16_t vminq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vmin.s8 Q0, Q0, Q0'
+
+   * float32x4_t vminq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vmin.f32 Q0, Q0, Q0'
+
+6.52.3.20 Pairwise add
+......................
+
+   * uint32x2_t vpadd_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpadd.i32 D0, D0, D0'
+
+   * uint16x4_t vpadd_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpadd.i16 D0, D0, D0'
+
+   * uint8x8_t vpadd_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpadd.i8 D0, D0, D0'
+
+   * int32x2_t vpadd_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpadd.i32 D0, D0, D0'
+
+   * int16x4_t vpadd_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpadd.i16 D0, D0, D0'
+
+   * int8x8_t vpadd_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpadd.i8 D0, D0, D0'
+
+   * float32x2_t vpadd_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpadd.f32 D0, D0, D0'
+
+   * uint64x1_t vpaddl_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vpaddl.u32 D0, D0'
+
+   * uint32x2_t vpaddl_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vpaddl.u16 D0, D0'
+
+   * uint16x4_t vpaddl_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vpaddl.u8 D0, D0'
+
+   * int64x1_t vpaddl_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vpaddl.s32 D0, D0'
+
+   * int32x2_t vpaddl_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vpaddl.s16 D0, D0'
+
+   * int16x4_t vpaddl_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vpaddl.s8 D0, D0'
+
+   * uint64x2_t vpaddlq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vpaddl.u32 Q0, Q0'
+
+   * uint32x4_t vpaddlq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vpaddl.u16 Q0, Q0'
+
+   * uint16x8_t vpaddlq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vpaddl.u8 Q0, Q0'
+
+   * int64x2_t vpaddlq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vpaddl.s32 Q0, Q0'
+
+   * int32x4_t vpaddlq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vpaddl.s16 Q0, Q0'
+
+   * int16x8_t vpaddlq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vpaddl.s8 Q0, Q0'
+
+6.52.3.21 Pairwise add, single_opcode widen and accumulate
+..........................................................
+
+   * uint64x1_t vpadal_u32 (uint64x1_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpadal.u32 D0, D0'
+
+   * uint32x2_t vpadal_u16 (uint32x2_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpadal.u16 D0, D0'
+
+   * uint16x4_t vpadal_u8 (uint16x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpadal.u8 D0, D0'
+
+   * int64x1_t vpadal_s32 (int64x1_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpadal.s32 D0, D0'
+
+   * int32x2_t vpadal_s16 (int32x2_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpadal.s16 D0, D0'
+
+   * int16x4_t vpadal_s8 (int16x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpadal.s8 D0, D0'
+
+   * uint64x2_t vpadalq_u32 (uint64x2_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vpadal.u32 Q0, Q0'
+
+   * uint32x4_t vpadalq_u16 (uint32x4_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vpadal.u16 Q0, Q0'
+
+   * uint16x8_t vpadalq_u8 (uint16x8_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vpadal.u8 Q0, Q0'
+
+   * int64x2_t vpadalq_s32 (int64x2_t, int32x4_t)
+     _Form of expected instruction(s):_ `vpadal.s32 Q0, Q0'
+
+   * int32x4_t vpadalq_s16 (int32x4_t, int16x8_t)
+     _Form of expected instruction(s):_ `vpadal.s16 Q0, Q0'
+
+   * int16x8_t vpadalq_s8 (int16x8_t, int8x16_t)
+     _Form of expected instruction(s):_ `vpadal.s8 Q0, Q0'
+
+6.52.3.22 Folding maximum
+.........................
+
+   * uint32x2_t vpmax_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpmax.u32 D0, D0, D0'
+
+   * uint16x4_t vpmax_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpmax.u16 D0, D0, D0'
+
+   * uint8x8_t vpmax_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpmax.u8 D0, D0, D0'
+
+   * int32x2_t vpmax_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpmax.s32 D0, D0, D0'
+
+   * int16x4_t vpmax_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpmax.s16 D0, D0, D0'
+
+   * int8x8_t vpmax_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpmax.s8 D0, D0, D0'
+
+   * float32x2_t vpmax_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpmax.f32 D0, D0, D0'
+
+6.52.3.23 Folding minimum
+.........................
+
+   * uint32x2_t vpmin_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vpmin.u32 D0, D0, D0'
+
+   * uint16x4_t vpmin_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vpmin.u16 D0, D0, D0'
+
+   * uint8x8_t vpmin_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vpmin.u8 D0, D0, D0'
+
+   * int32x2_t vpmin_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vpmin.s32 D0, D0, D0'
+
+   * int16x4_t vpmin_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vpmin.s16 D0, D0, D0'
+
+   * int8x8_t vpmin_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vpmin.s8 D0, D0, D0'
+
+   * float32x2_t vpmin_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vpmin.f32 D0, D0, D0'
+
+6.52.3.24 Reciprocal step
+.........................
+
+   * float32x2_t vrecps_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vrecps.f32 D0, D0, D0'
+
+   * float32x4_t vrecpsq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vrecps.f32 Q0, Q0, Q0'
+
+   * float32x2_t vrsqrts_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vrsqrts.f32 D0, D0, D0'
+
+   * float32x4_t vrsqrtsq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vrsqrts.f32 Q0, Q0, Q0'
+
+6.52.3.25 Vector shift left
+...........................
+
+   * uint32x2_t vshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vshl.u32 D0, D0, D0'
+
+   * uint16x4_t vshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vshl.u16 D0, D0, D0'
+
+   * uint8x8_t vshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vshl.u8 D0, D0, D0'
+
+   * int32x2_t vshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vshl.s32 D0, D0, D0'
+
+   * int16x4_t vshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vshl.s16 D0, D0, D0'
+
+   * int8x8_t vshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vshl.s8 D0, D0, D0'
+
+   * uint64x1_t vshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vshl.u64 D0, D0, D0'
+
+   * int64x1_t vshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vshl.s64 D0, D0, D0'
+
+   * uint32x4_t vshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vrshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrshl.u32 D0, D0, D0'
+
+   * uint16x4_t vrshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrshl.u16 D0, D0, D0'
+
+   * uint8x8_t vrshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrshl.u8 D0, D0, D0'
+
+   * int32x2_t vrshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vrshl.s32 D0, D0, D0'
+
+   * int16x4_t vrshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vrshl.s16 D0, D0, D0'
+
+   * int8x8_t vrshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vrshl.s8 D0, D0, D0'
+
+   * uint64x1_t vrshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vrshl.u64 D0, D0, D0'
+
+   * int64x1_t vrshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vrshl.s64 D0, D0, D0'
+
+   * uint32x4_t vrshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vrshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vrshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vrshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vrshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vrshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vrshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vrshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vrshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vrshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vrshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vrshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vqshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqshl.u32 D0, D0, D0'
+
+   * uint16x4_t vqshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqshl.u16 D0, D0, D0'
+
+   * uint8x8_t vqshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqshl.u8 D0, D0, D0'
+
+   * int32x2_t vqshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqshl.s32 D0, D0, D0'
+
+   * int16x4_t vqshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqshl.s16 D0, D0, D0'
+
+   * int8x8_t vqshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqshl.s8 D0, D0, D0'
+
+   * uint64x1_t vqshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqshl.u64 D0, D0, D0'
+
+   * int64x1_t vqshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqshl.s64 D0, D0, D0'
+
+   * uint32x4_t vqshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqshl.s64 Q0, Q0, Q0'
+
+   * uint32x2_t vqrshl_u32 (uint32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrshl.u32 D0, D0, D0'
+
+   * uint16x4_t vqrshl_u16 (uint16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrshl.u16 D0, D0, D0'
+
+   * uint8x8_t vqrshl_u8 (uint8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqrshl.u8 D0, D0, D0'
+
+   * int32x2_t vqrshl_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vqrshl.s32 D0, D0, D0'
+
+   * int16x4_t vqrshl_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vqrshl.s16 D0, D0, D0'
+
+   * int8x8_t vqrshl_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vqrshl.s8 D0, D0, D0'
+
+   * uint64x1_t vqrshl_u64 (uint64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqrshl.u64 D0, D0, D0'
+
+   * int64x1_t vqrshl_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vqrshl.s64 D0, D0, D0'
+
+   * uint32x4_t vqrshlq_u32 (uint32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrshl.u32 Q0, Q0, Q0'
+
+   * uint16x8_t vqrshlq_u16 (uint16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrshl.u16 Q0, Q0, Q0'
+
+   * uint8x16_t vqrshlq_u8 (uint8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqrshl.u8 Q0, Q0, Q0'
+
+   * int32x4_t vqrshlq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vqrshl.s32 Q0, Q0, Q0'
+
+   * int16x8_t vqrshlq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vqrshl.s16 Q0, Q0, Q0'
+
+   * int8x16_t vqrshlq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vqrshl.s8 Q0, Q0, Q0'
+
+   * uint64x2_t vqrshlq_u64 (uint64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqrshl.u64 Q0, Q0, Q0'
+
+   * int64x2_t vqrshlq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vqrshl.s64 Q0, Q0, Q0'
+
+6.52.3.26 Vector shift left by constant
+.......................................
+
+   * uint32x2_t vshl_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 D0, D0, #0'
+
+   * uint16x4_t vshl_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 D0, D0, #0'
+
+   * uint8x8_t vshl_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 D0, D0, #0'
+
+   * int32x2_t vshl_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 D0, D0, #0'
+
+   * int16x4_t vshl_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 D0, D0, #0'
+
+   * int8x8_t vshl_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 D0, D0, #0'
+
+   * uint64x1_t vshl_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 D0, D0, #0'
+
+   * int64x1_t vshl_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 D0, D0, #0'
+
+   * uint32x4_t vshlq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 Q0, Q0, #0'
+
+   * uint16x8_t vshlq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 Q0, Q0, #0'
+
+   * uint8x16_t vshlq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 Q0, Q0, #0'
+
+   * int32x4_t vshlq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshl.i32 Q0, Q0, #0'
+
+   * int16x8_t vshlq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshl.i16 Q0, Q0, #0'
+
+   * int8x16_t vshlq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vshl.i8 Q0, Q0, #0'
+
+   * uint64x2_t vshlq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 Q0, Q0, #0'
+
+   * int64x2_t vshlq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshl.i64 Q0, Q0, #0'
+
+   * uint32x2_t vqshl_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u32 D0, D0, #0'
+
+   * uint16x4_t vqshl_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u16 D0, D0, #0'
+
+   * uint8x8_t vqshl_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u8 D0, D0, #0'
+
+   * int32x2_t vqshl_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s32 D0, D0, #0'
+
+   * int16x4_t vqshl_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s16 D0, D0, #0'
+
+   * int8x8_t vqshl_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s8 D0, D0, #0'
+
+   * uint64x1_t vqshl_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u64 D0, D0, #0'
+
+   * int64x1_t vqshl_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s64 D0, D0, #0'
+
+   * uint32x4_t vqshlq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u32 Q0, Q0, #0'
+
+   * uint16x8_t vqshlq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u16 Q0, Q0, #0'
+
+   * uint8x16_t vqshlq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u8 Q0, Q0, #0'
+
+   * int32x4_t vqshlq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s32 Q0, Q0, #0'
+
+   * int16x8_t vqshlq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s16 Q0, Q0, #0'
+
+   * int8x16_t vqshlq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s8 Q0, Q0, #0'
+
+   * uint64x2_t vqshlq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.u64 Q0, Q0, #0'
+
+   * int64x2_t vqshlq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshl.s64 Q0, Q0, #0'
+
+   * uint64x1_t vqshlu_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s64 D0, D0, #0'
+
+   * uint32x2_t vqshlu_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s32 D0, D0, #0'
+
+   * uint16x4_t vqshlu_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s16 D0, D0, #0'
+
+   * uint8x8_t vqshlu_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s8 D0, D0, #0'
+
+   * uint64x2_t vqshluq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s64 Q0, Q0, #0'
+
+   * uint32x4_t vqshluq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s32 Q0, Q0, #0'
+
+   * uint16x8_t vqshluq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s16 Q0, Q0, #0'
+
+   * uint8x16_t vqshluq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vqshlu.s8 Q0, Q0, #0'
+
+   * uint64x2_t vshll_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshll.u32 Q0, D0, #0'
+
+   * uint32x4_t vshll_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshll.u16 Q0, D0, #0'
+
+   * uint16x8_t vshll_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshll.u8 Q0, D0, #0'
+
+   * int64x2_t vshll_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshll.s32 Q0, D0, #0'
+
+   * int32x4_t vshll_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshll.s16 Q0, D0, #0'
+
+   * int16x8_t vshll_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshll.s8 Q0, D0, #0'
+
+6.52.3.27 Vector shift right by constant
+........................................
+
+   * uint32x2_t vshr_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.u32 D0, D0, #0'
+
+   * uint16x4_t vshr_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.u16 D0, D0, #0'
+
+   * uint8x8_t vshr_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.u8 D0, D0, #0'
+
+   * int32x2_t vshr_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.s32 D0, D0, #0'
+
+   * int16x4_t vshr_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.s16 D0, D0, #0'
+
+   * int8x8_t vshr_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.s8 D0, D0, #0'
+
+   * uint64x1_t vshr_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vshr.u64 D0, D0, #0'
+
+   * int64x1_t vshr_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vshr.s64 D0, D0, #0'
+
+   * uint32x4_t vshrq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.u32 Q0, Q0, #0'
+
+   * uint16x8_t vshrq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.u16 Q0, Q0, #0'
+
+   * uint8x16_t vshrq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vshr.u8 Q0, Q0, #0'
+
+   * int32x4_t vshrq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshr.s32 Q0, Q0, #0'
+
+   * int16x8_t vshrq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshr.s16 Q0, Q0, #0'
+
+   * int8x16_t vshrq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vshr.s8 Q0, Q0, #0'
+
+   * uint64x2_t vshrq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.u64 Q0, Q0, #0'
+
+   * int64x2_t vshrq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshr.s64 Q0, Q0, #0'
+
+   * uint32x2_t vrshr_n_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u32 D0, D0, #0'
+
+   * uint16x4_t vrshr_n_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u16 D0, D0, #0'
+
+   * uint8x8_t vrshr_n_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u8 D0, D0, #0'
+
+   * int32x2_t vrshr_n_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s32 D0, D0, #0'
+
+   * int16x4_t vrshr_n_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s16 D0, D0, #0'
+
+   * int8x8_t vrshr_n_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s8 D0, D0, #0'
+
+   * uint64x1_t vrshr_n_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u64 D0, D0, #0'
+
+   * int64x1_t vrshr_n_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s64 D0, D0, #0'
+
+   * uint32x4_t vrshrq_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u32 Q0, Q0, #0'
+
+   * uint16x8_t vrshrq_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u16 Q0, Q0, #0'
+
+   * uint8x16_t vrshrq_n_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u8 Q0, Q0, #0'
+
+   * int32x4_t vrshrq_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s32 Q0, Q0, #0'
+
+   * int16x8_t vrshrq_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s16 Q0, Q0, #0'
+
+   * int8x16_t vrshrq_n_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s8 Q0, Q0, #0'
+
+   * uint64x2_t vrshrq_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.u64 Q0, Q0, #0'
+
+   * int64x2_t vrshrq_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshr.s64 Q0, Q0, #0'
+
+   * uint32x2_t vshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i64 D0, Q0, #0'
+
+   * uint16x4_t vshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i32 D0, Q0, #0'
+
+   * uint8x8_t vshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i16 D0, Q0, #0'
+
+   * int32x2_t vshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i64 D0, Q0, #0'
+
+   * int16x4_t vshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i32 D0, Q0, #0'
+
+   * int8x8_t vshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vshrn.i16 D0, Q0, #0'
+
+   * uint32x2_t vrshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i64 D0, Q0, #0'
+
+   * uint16x4_t vrshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i32 D0, Q0, #0'
+
+   * uint8x8_t vrshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i16 D0, Q0, #0'
+
+   * int32x2_t vrshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i64 D0, Q0, #0'
+
+   * int16x4_t vrshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i32 D0, Q0, #0'
+
+   * int8x8_t vrshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrshrn.i16 D0, Q0, #0'
+
+   * uint32x2_t vqshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u64 D0, Q0, #0'
+
+   * uint16x4_t vqshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u32 D0, Q0, #0'
+
+   * uint8x8_t vqshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.u16 D0, Q0, #0'
+
+   * int32x2_t vqshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s64 D0, Q0, #0'
+
+   * int16x4_t vqshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s32 D0, Q0, #0'
+
+   * int8x8_t vqshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrn.s16 D0, Q0, #0'
+
+   * uint32x2_t vqrshrn_n_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u64 D0, Q0, #0'
+
+   * uint16x4_t vqrshrn_n_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u32 D0, Q0, #0'
+
+   * uint8x8_t vqrshrn_n_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.u16 D0, Q0, #0'
+
+   * int32x2_t vqrshrn_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s64 D0, Q0, #0'
+
+   * int16x4_t vqrshrn_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s32 D0, Q0, #0'
+
+   * int8x8_t vqrshrn_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrn.s16 D0, Q0, #0'
+
+   * uint32x2_t vqshrun_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s64 D0, Q0, #0'
+
+   * uint16x4_t vqshrun_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s32 D0, Q0, #0'
+
+   * uint8x8_t vqshrun_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqshrun.s16 D0, Q0, #0'
+
+   * uint32x2_t vqrshrun_n_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s64 D0, Q0, #0'
+
+   * uint16x4_t vqrshrun_n_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s32 D0, Q0, #0'
+
+   * uint8x8_t vqrshrun_n_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vqrshrun.s16 D0, Q0, #0'
+
+6.52.3.28 Vector shift right by constant and accumulate
+.......................................................
+
+   * uint32x2_t vsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.u32 D0, D0, #0'
+
+   * uint16x4_t vsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.u16 D0, D0, #0'
+
+   * uint8x8_t vsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.u8 D0, D0, #0'
+
+   * int32x2_t vsra_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.s32 D0, D0, #0'
+
+   * int16x4_t vsra_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.s16 D0, D0, #0'
+
+   * int8x8_t vsra_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.s8 D0, D0, #0'
+
+   * uint64x1_t vsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsra.u64 D0, D0, #0'
+
+   * int64x1_t vsra_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsra.s64 D0, D0, #0'
+
+   * uint32x4_t vsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.u32 Q0, Q0, #0'
+
+   * uint16x8_t vsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.u16 Q0, Q0, #0'
+
+   * uint8x16_t vsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsra.u8 Q0, Q0, #0'
+
+   * int32x4_t vsraq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsra.s32 Q0, Q0, #0'
+
+   * int16x8_t vsraq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsra.s16 Q0, Q0, #0'
+
+   * int8x16_t vsraq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsra.s8 Q0, Q0, #0'
+
+   * uint64x2_t vsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.u64 Q0, Q0, #0'
+
+   * int64x2_t vsraq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsra.s64 Q0, Q0, #0'
+
+   * uint32x2_t vrsra_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u32 D0, D0, #0'
+
+   * uint16x4_t vrsra_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u16 D0, D0, #0'
+
+   * uint8x8_t vrsra_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u8 D0, D0, #0'
+
+   * int32x2_t vrsra_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s32 D0, D0, #0'
+
+   * int16x4_t vrsra_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s16 D0, D0, #0'
+
+   * int8x8_t vrsra_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s8 D0, D0, #0'
+
+   * uint64x1_t vrsra_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u64 D0, D0, #0'
+
+   * int64x1_t vrsra_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s64 D0, D0, #0'
+
+   * uint32x4_t vrsraq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u32 Q0, Q0, #0'
+
+   * uint16x8_t vrsraq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u16 Q0, Q0, #0'
+
+   * uint8x16_t vrsraq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u8 Q0, Q0, #0'
+
+   * int32x4_t vrsraq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s32 Q0, Q0, #0'
+
+   * int16x8_t vrsraq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s16 Q0, Q0, #0'
+
+   * int8x16_t vrsraq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s8 Q0, Q0, #0'
+
+   * uint64x2_t vrsraq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.u64 Q0, Q0, #0'
+
+   * int64x2_t vrsraq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vrsra.s64 Q0, Q0, #0'
+
+6.52.3.29 Vector shift right and insert
+.......................................
+
+   * uint32x2_t vsri_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 D0, D0, #0'
+
+   * uint16x4_t vsri_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * uint8x8_t vsri_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * int32x2_t vsri_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 D0, D0, #0'
+
+   * int16x4_t vsri_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * int8x8_t vsri_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * uint64x1_t vsri_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 D0, D0, #0'
+
+   * int64x1_t vsri_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 D0, D0, #0'
+
+   * poly16x4_t vsri_n_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 D0, D0, #0'
+
+   * poly8x8_t vsri_n_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 D0, D0, #0'
+
+   * uint32x4_t vsriq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 Q0, Q0, #0'
+
+   * uint16x8_t vsriq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * uint8x16_t vsriq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+   * int32x4_t vsriq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsri.32 Q0, Q0, #0'
+
+   * int16x8_t vsriq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * int8x16_t vsriq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+   * uint64x2_t vsriq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 Q0, Q0, #0'
+
+   * int64x2_t vsriq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsri.64 Q0, Q0, #0'
+
+   * poly16x8_t vsriq_n_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vsri.16 Q0, Q0, #0'
+
+   * poly8x16_t vsriq_n_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vsri.8 Q0, Q0, #0'
+
+6.52.3.30 Vector shift left and insert
+......................................
+
+   * uint32x2_t vsli_n_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 D0, D0, #0'
+
+   * uint16x4_t vsli_n_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * uint8x8_t vsli_n_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * int32x2_t vsli_n_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 D0, D0, #0'
+
+   * int16x4_t vsli_n_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * int8x8_t vsli_n_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * uint64x1_t vsli_n_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 D0, D0, #0'
+
+   * int64x1_t vsli_n_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 D0, D0, #0'
+
+   * poly16x4_t vsli_n_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 D0, D0, #0'
+
+   * poly8x8_t vsli_n_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 D0, D0, #0'
+
+   * uint32x4_t vsliq_n_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 Q0, Q0, #0'
+
+   * uint16x8_t vsliq_n_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * uint8x16_t vsliq_n_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+   * int32x4_t vsliq_n_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vsli.32 Q0, Q0, #0'
+
+   * int16x8_t vsliq_n_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * int8x16_t vsliq_n_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+   * uint64x2_t vsliq_n_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 Q0, Q0, #0'
+
+   * int64x2_t vsliq_n_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vsli.64 Q0, Q0, #0'
+
+   * poly16x8_t vsliq_n_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vsli.16 Q0, Q0, #0'
+
+   * poly8x16_t vsliq_n_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vsli.8 Q0, Q0, #0'
+
+6.52.3.31 Absolute value
+........................
+
+   * float32x2_t vabs_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vabs.f32 D0, D0'
+
+   * int32x2_t vabs_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vabs.s32 D0, D0'
+
+   * int16x4_t vabs_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vabs.s16 D0, D0'
+
+   * int8x8_t vabs_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vabs.s8 D0, D0'
+
+   * float32x4_t vabsq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vabs.f32 Q0, Q0'
+
+   * int32x4_t vabsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vabs.s32 Q0, Q0'
+
+   * int16x8_t vabsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vabs.s16 Q0, Q0'
+
+   * int8x16_t vabsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vabs.s8 Q0, Q0'
+
+   * int32x2_t vqabs_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vqabs.s32 D0, D0'
+
+   * int16x4_t vqabs_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vqabs.s16 D0, D0'
+
+   * int8x8_t vqabs_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vqabs.s8 D0, D0'
+
+   * int32x4_t vqabsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqabs.s32 Q0, Q0'
+
+   * int16x8_t vqabsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqabs.s16 Q0, Q0'
+
+   * int8x16_t vqabsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vqabs.s8 Q0, Q0'
+
+6.52.3.32 Negation
+..................
+
+   * float32x2_t vneg_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vneg.f32 D0, D0'
+
+   * int32x2_t vneg_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vneg.s32 D0, D0'
+
+   * int16x4_t vneg_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vneg.s16 D0, D0'
+
+   * int8x8_t vneg_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vneg.s8 D0, D0'
+
+   * float32x4_t vnegq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vneg.f32 Q0, Q0'
+
+   * int32x4_t vnegq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vneg.s32 Q0, Q0'
+
+   * int16x8_t vnegq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vneg.s16 Q0, Q0'
+
+   * int8x16_t vnegq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vneg.s8 Q0, Q0'
+
+   * int32x2_t vqneg_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vqneg.s32 D0, D0'
+
+   * int16x4_t vqneg_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vqneg.s16 D0, D0'
+
+   * int8x8_t vqneg_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vqneg.s8 D0, D0'
+
+   * int32x4_t vqnegq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqneg.s32 Q0, Q0'
+
+   * int16x8_t vqnegq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqneg.s16 Q0, Q0'
+
+   * int8x16_t vqnegq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vqneg.s8 Q0, Q0'
+
+6.52.3.33 Bitwise not
+.....................
+
+   * uint32x2_t vmvn_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint16x4_t vmvn_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint8x8_t vmvn_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int32x2_t vmvn_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int16x4_t vmvn_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * int8x8_t vmvn_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * poly8x8_t vmvn_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vmvn D0, D0'
+
+   * uint32x4_t vmvnq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * uint16x8_t vmvnq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * uint8x16_t vmvnq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int32x4_t vmvnq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int16x8_t vmvnq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * int8x16_t vmvnq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+   * poly8x16_t vmvnq_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vmvn Q0, Q0'
+
+6.52.3.34 Count leading sign bits
+.................................
+
+   * int32x2_t vcls_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vcls.s32 D0, D0'
+
+   * int16x4_t vcls_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vcls.s16 D0, D0'
+
+   * int8x8_t vcls_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vcls.s8 D0, D0'
+
+   * int32x4_t vclsq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vcls.s32 Q0, Q0'
+
+   * int16x8_t vclsq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vcls.s16 Q0, Q0'
+
+   * int8x16_t vclsq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vcls.s8 Q0, Q0'
+
+6.52.3.35 Count leading zeros
+.............................
+
+   * uint32x2_t vclz_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vclz.i32 D0, D0'
+
+   * uint16x4_t vclz_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vclz.i16 D0, D0'
+
+   * uint8x8_t vclz_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vclz.i8 D0, D0'
+
+   * int32x2_t vclz_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vclz.i32 D0, D0'
+
+   * int16x4_t vclz_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vclz.i16 D0, D0'
+
+   * int8x8_t vclz_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vclz.i8 D0, D0'
+
+   * uint32x4_t vclzq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vclz.i32 Q0, Q0'
+
+   * uint16x8_t vclzq_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vclz.i16 Q0, Q0'
+
+   * uint8x16_t vclzq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vclz.i8 Q0, Q0'
+
+   * int32x4_t vclzq_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vclz.i32 Q0, Q0'
+
+   * int16x8_t vclzq_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vclz.i16 Q0, Q0'
+
+   * int8x16_t vclzq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vclz.i8 Q0, Q0'
+
+6.52.3.36 Count number of set bits
+..................................
+
+   * uint8x8_t vcnt_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * int8x8_t vcnt_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * poly8x8_t vcnt_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vcnt.8 D0, D0'
+
+   * uint8x16_t vcntq_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+   * int8x16_t vcntq_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+   * poly8x16_t vcntq_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vcnt.8 Q0, Q0'
+
+6.52.3.37 Reciprocal estimate
+.............................
+
+   * float32x2_t vrecpe_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrecpe.f32 D0, D0'
+
+   * uint32x2_t vrecpe_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrecpe.u32 D0, D0'
+
+   * float32x4_t vrecpeq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrecpe.f32 Q0, Q0'
+
+   * uint32x4_t vrecpeq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrecpe.u32 Q0, Q0'
+
+6.52.3.38 Reciprocal square-root estimate
+.........................................
+
+   * float32x2_t vrsqrte_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrsqrte.f32 D0, D0'
+
+   * uint32x2_t vrsqrte_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrsqrte.u32 D0, D0'
+
+   * float32x4_t vrsqrteq_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrsqrte.f32 Q0, Q0'
+
+   * uint32x4_t vrsqrteq_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrsqrte.u32 Q0, Q0'
+
+6.52.3.39 Get lanes from a vector
+.................................
+
+   * uint32_t vget_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * uint16_t vget_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * uint8_t vget_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * int32_t vget_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * int16_t vget_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.s16 R0, D0[0]'
+
+   * int8_t vget_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.s8 R0, D0[0]'
+
+   * float32_t vget_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * poly16_t vget_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * poly8_t vget_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * uint64_t vget_lane_u64 (uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+   * int64_t vget_lane_s64 (int64x1_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+   * uint32_t vgetq_lane_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * uint16_t vgetq_lane_u16 (uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * uint8_t vgetq_lane_u8 (uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * int32_t vgetq_lane_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * int16_t vgetq_lane_s16 (int16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.s16 R0, D0[0]'
+
+   * int8_t vgetq_lane_s8 (int8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.s8 R0, D0[0]'
+
+   * float32_t vgetq_lane_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 R0, D0[0]'
+
+   * poly16_t vgetq_lane_p16 (poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.u16 R0, D0[0]'
+
+   * poly8_t vgetq_lane_p8 (poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.u8 R0, D0[0]'
+
+   * uint64_t vgetq_lane_u64 (uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+   * int64_t vgetq_lane_s64 (int64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov R0, R0, D0'
+
+6.52.3.40 Set lanes in a vector
+...............................
+
+   * uint32x2_t vset_lane_u32 (uint32_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * uint16x4_t vset_lane_u16 (uint16_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * uint8x8_t vset_lane_u8 (uint8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * int32x2_t vset_lane_s32 (int32_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * int16x4_t vset_lane_s16 (int16_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * int8x8_t vset_lane_s8 (int8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * float32x2_t vset_lane_f32 (float32_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * poly16x4_t vset_lane_p16 (poly16_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * poly8x8_t vset_lane_p8 (poly8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * uint64x1_t vset_lane_u64 (uint64_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x1_t vset_lane_s64 (int64_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * uint32x4_t vsetq_lane_u32 (uint32_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * uint16x8_t vsetq_lane_u16 (uint16_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * uint8x16_t vsetq_lane_u8 (uint8_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * int32x4_t vsetq_lane_s32 (int32_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * int16x8_t vsetq_lane_s16 (int16_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * int8x16_t vsetq_lane_s8 (int8_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * float32x4_t vsetq_lane_f32 (float32_t, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vmov.32 D0[0], R0'
+
+   * poly16x8_t vsetq_lane_p16 (poly16_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vmov.16 D0[0], R0'
+
+   * poly8x16_t vsetq_lane_p8 (poly8_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vmov.8 D0[0], R0'
+
+   * uint64x2_t vsetq_lane_u64 (uint64_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x2_t vsetq_lane_s64 (int64_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+6.52.3.41 Create vector from literal bit pattern
+................................................
+
+   * uint32x2_t vcreate_u32 (uint64_t)
+
+   * uint16x4_t vcreate_u16 (uint64_t)
+
+   * uint8x8_t vcreate_u8 (uint64_t)
+
+   * int32x2_t vcreate_s32 (uint64_t)
+
+   * int16x4_t vcreate_s16 (uint64_t)
+
+   * int8x8_t vcreate_s8 (uint64_t)
+
+   * uint64x1_t vcreate_u64 (uint64_t)
+
+   * int64x1_t vcreate_s64 (uint64_t)
+
+   * float32x2_t vcreate_f32 (uint64_t)
+
+   * poly16x4_t vcreate_p16 (uint64_t)
+
+   * poly8x8_t vcreate_p8 (uint64_t)
+
+6.52.3.42 Set all lanes to the same value
+.........................................
+
+   * uint32x2_t vdup_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * uint16x4_t vdup_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * uint8x8_t vdup_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * int32x2_t vdup_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * int16x4_t vdup_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * int8x8_t vdup_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * float32x2_t vdup_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * poly16x4_t vdup_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * poly8x8_t vdup_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * uint64x1_t vdup_n_u64 (uint64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x1_t vdup_n_s64 (int64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * uint32x4_t vdupq_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * uint16x8_t vdupq_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * uint8x16_t vdupq_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * int32x4_t vdupq_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * int16x8_t vdupq_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * int8x16_t vdupq_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * float32x4_t vdupq_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * poly16x8_t vdupq_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * poly8x16_t vdupq_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * uint64x2_t vdupq_n_u64 (uint64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x2_t vdupq_n_s64 (int64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * uint32x2_t vmov_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * uint16x4_t vmov_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * uint8x8_t vmov_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * int32x2_t vmov_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * int16x4_t vmov_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * int8x8_t vmov_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * float32x2_t vmov_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 D0, R0'
+
+   * poly16x4_t vmov_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 D0, R0'
+
+   * poly8x8_t vmov_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 D0, R0'
+
+   * uint64x1_t vmov_n_u64 (uint64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x1_t vmov_n_s64 (int64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * uint32x4_t vmovq_n_u32 (uint32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * uint16x8_t vmovq_n_u16 (uint16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * uint8x16_t vmovq_n_u8 (uint8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * int32x4_t vmovq_n_s32 (int32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * int16x8_t vmovq_n_s16 (int16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * int8x16_t vmovq_n_s8 (int8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * float32x4_t vmovq_n_f32 (float32_t)
+     _Form of expected instruction(s):_ `vdup.32 Q0, R0'
+
+   * poly16x8_t vmovq_n_p16 (poly16_t)
+     _Form of expected instruction(s):_ `vdup.16 Q0, R0'
+
+   * poly8x16_t vmovq_n_p8 (poly8_t)
+     _Form of expected instruction(s):_ `vdup.8 Q0, R0'
+
+   * uint64x2_t vmovq_n_u64 (uint64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * int64x2_t vmovq_n_s64 (int64_t)
+     _Form of expected instruction(s):_ `vmov D0, R0, R0'
+
+   * uint32x2_t vdup_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * uint16x4_t vdup_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * uint8x8_t vdup_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * int32x2_t vdup_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * int16x4_t vdup_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * int8x8_t vdup_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * float32x2_t vdup_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 D0, D0[0]'
+
+   * poly16x4_t vdup_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 D0, D0[0]'
+
+   * poly8x8_t vdup_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 D0, D0[0]'
+
+   * uint64x1_t vdup_lane_u64 (uint64x1_t, const int)
+
+   * int64x1_t vdup_lane_s64 (int64x1_t, const int)
+
+   * uint32x4_t vdupq_lane_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * uint16x8_t vdupq_lane_u16 (uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * uint8x16_t vdupq_lane_u8 (uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * int32x4_t vdupq_lane_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * int16x8_t vdupq_lane_s16 (int16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * int8x16_t vdupq_lane_s8 (int8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * float32x4_t vdupq_lane_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vdup.32 Q0, D0[0]'
+
+   * poly16x8_t vdupq_lane_p16 (poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vdup.16 Q0, D0[0]'
+
+   * poly8x16_t vdupq_lane_p8 (poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vdup.8 Q0, D0[0]'
+
+   * uint64x2_t vdupq_lane_u64 (uint64x1_t, const int)
+
+   * int64x2_t vdupq_lane_s64 (int64x1_t, const int)
+
+6.52.3.43 Combining vectors
+...........................
+
+   * uint32x4_t vcombine_u32 (uint32x2_t, uint32x2_t)
+
+   * uint16x8_t vcombine_u16 (uint16x4_t, uint16x4_t)
+
+   * uint8x16_t vcombine_u8 (uint8x8_t, uint8x8_t)
+
+   * int32x4_t vcombine_s32 (int32x2_t, int32x2_t)
+
+   * int16x8_t vcombine_s16 (int16x4_t, int16x4_t)
+
+   * int8x16_t vcombine_s8 (int8x8_t, int8x8_t)
+
+   * uint64x2_t vcombine_u64 (uint64x1_t, uint64x1_t)
+
+   * int64x2_t vcombine_s64 (int64x1_t, int64x1_t)
+
+   * float32x4_t vcombine_f32 (float32x2_t, float32x2_t)
+
+   * poly16x8_t vcombine_p16 (poly16x4_t, poly16x4_t)
+
+   * poly8x16_t vcombine_p8 (poly8x8_t, poly8x8_t)
+
+6.52.3.44 Splitting vectors
+...........................
+
+   * uint32x2_t vget_high_u32 (uint32x4_t)
+
+   * uint16x4_t vget_high_u16 (uint16x8_t)
+
+   * uint8x8_t vget_high_u8 (uint8x16_t)
+
+   * int32x2_t vget_high_s32 (int32x4_t)
+
+   * int16x4_t vget_high_s16 (int16x8_t)
+
+   * int8x8_t vget_high_s8 (int8x16_t)
+
+   * uint64x1_t vget_high_u64 (uint64x2_t)
+
+   * int64x1_t vget_high_s64 (int64x2_t)
+
+   * float32x2_t vget_high_f32 (float32x4_t)
+
+   * poly16x4_t vget_high_p16 (poly16x8_t)
+
+   * poly8x8_t vget_high_p8 (poly8x16_t)
+
+   * uint32x2_t vget_low_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint16x4_t vget_low_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint8x8_t vget_low_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int32x2_t vget_low_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int16x4_t vget_low_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int8x8_t vget_low_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * uint64x1_t vget_low_u64 (uint64x2_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * int64x1_t vget_low_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * float32x2_t vget_low_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * poly16x4_t vget_low_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+   * poly8x8_t vget_low_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vmov D0, D0'
+
+6.52.3.45 Conversions
+.....................
+
+   * float32x2_t vcvt_f32_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 D0, D0'
+
+   * float32x2_t vcvt_f32_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 D0, D0'
+
+   * uint32x2_t vcvt_u32_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 D0, D0'
+
+   * int32x2_t vcvt_s32_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 D0, D0'
+
+   * float32x4_t vcvtq_f32_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 Q0, Q0'
+
+   * float32x4_t vcvtq_f32_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 Q0, Q0'
+
+   * uint32x4_t vcvtq_u32_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 Q0, Q0'
+
+   * int32x4_t vcvtq_s32_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 Q0, Q0'
+
+   * float32x2_t vcvt_n_f32_u32 (uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 D0, D0, #0'
+
+   * float32x2_t vcvt_n_f32_s32 (int32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 D0, D0, #0'
+
+   * uint32x2_t vcvt_n_u32_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 D0, D0, #0'
+
+   * int32x2_t vcvt_n_s32_f32 (float32x2_t, const int)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 D0, D0, #0'
+
+   * float32x4_t vcvtq_n_f32_u32 (uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.u32 Q0, Q0, #0'
+
+   * float32x4_t vcvtq_n_f32_s32 (int32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.f32.s32 Q0, Q0, #0'
+
+   * uint32x4_t vcvtq_n_u32_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.u32.f32 Q0, Q0, #0'
+
+   * int32x4_t vcvtq_n_s32_f32 (float32x4_t, const int)
+     _Form of expected instruction(s):_ `vcvt.s32.f32 Q0, Q0, #0'
+
+6.52.3.46 Move, single_opcode narrowing
+.......................................
+
+   * uint32x2_t vmovn_u64 (uint64x2_t)
+     _Form of expected instruction(s):_ `vmovn.i64 D0, Q0'
+
+   * uint16x4_t vmovn_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vmovn.i32 D0, Q0'
+
+   * uint8x8_t vmovn_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vmovn.i16 D0, Q0'
+
+   * int32x2_t vmovn_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vmovn.i64 D0, Q0'
+
+   * int16x4_t vmovn_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vmovn.i32 D0, Q0'
+
+   * int8x8_t vmovn_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vmovn.i16 D0, Q0'
+
+   * uint32x2_t vqmovn_u64 (uint64x2_t)
+     _Form of expected instruction(s):_ `vqmovn.u64 D0, Q0'
+
+   * uint16x4_t vqmovn_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vqmovn.u32 D0, Q0'
+
+   * uint8x8_t vqmovn_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vqmovn.u16 D0, Q0'
+
+   * int32x2_t vqmovn_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vqmovn.s64 D0, Q0'
+
+   * int16x4_t vqmovn_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqmovn.s32 D0, Q0'
+
+   * int8x8_t vqmovn_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqmovn.s16 D0, Q0'
+
+   * uint32x2_t vqmovun_s64 (int64x2_t)
+     _Form of expected instruction(s):_ `vqmovun.s64 D0, Q0'
+
+   * uint16x4_t vqmovun_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vqmovun.s32 D0, Q0'
+
+   * uint8x8_t vqmovun_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vqmovun.s16 D0, Q0'
+
+6.52.3.47 Move, single_opcode long
+..................................
+
+   * uint64x2_t vmovl_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vmovl.u32 Q0, D0'
+
+   * uint32x4_t vmovl_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vmovl.u16 Q0, D0'
+
+   * uint16x8_t vmovl_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vmovl.u8 Q0, D0'
+
+   * int64x2_t vmovl_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vmovl.s32 Q0, D0'
+
+   * int32x4_t vmovl_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vmovl.s16 Q0, D0'
+
+   * int16x8_t vmovl_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vmovl.s8 Q0, D0'
+
+6.52.3.48 Table lookup
+......................
+
+   * poly8x8_t vtbl1_p8 (poly8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * int8x8_t vtbl1_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * uint8x8_t vtbl1_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0}, D0'
+
+   * poly8x8_t vtbl2_p8 (poly8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * int8x8_t vtbl2_s8 (int8x8x2_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * uint8x8_t vtbl2_u8 (uint8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1}, D0'
+
+   * poly8x8_t vtbl3_p8 (poly8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * int8x8_t vtbl3_s8 (int8x8x3_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * uint8x8_t vtbl3_u8 (uint8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2}, D0'
+
+   * poly8x8_t vtbl4_p8 (poly8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * int8x8_t vtbl4_s8 (int8x8x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * uint8x8_t vtbl4_u8 (uint8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbl.8 D0, {D0, D1, D2, D3},
+     D0'
+
+6.52.3.49 Extended table lookup
+...............................
+
+   * poly8x8_t vtbx1_p8 (poly8x8_t, poly8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * int8x8_t vtbx1_s8 (int8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * uint8x8_t vtbx1_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0}, D0'
+
+   * poly8x8_t vtbx2_p8 (poly8x8_t, poly8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * int8x8_t vtbx2_s8 (int8x8_t, int8x8x2_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * uint8x8_t vtbx2_u8 (uint8x8_t, uint8x8x2_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1}, D0'
+
+   * poly8x8_t vtbx3_p8 (poly8x8_t, poly8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * int8x8_t vtbx3_s8 (int8x8_t, int8x8x3_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * uint8x8_t vtbx3_u8 (uint8x8_t, uint8x8x3_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2}, D0'
+
+   * poly8x8_t vtbx4_p8 (poly8x8_t, poly8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * int8x8_t vtbx4_s8 (int8x8_t, int8x8x4_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+   * uint8x8_t vtbx4_u8 (uint8x8_t, uint8x8x4_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtbx.8 D0, {D0, D1, D2, D3},
+     D0'
+
+6.52.3.50 Multiply, lane
+........................
+
+   * float32x2_t vmul_lane_f32 (float32x2_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmul_lane_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmul_lane_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmul_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmul_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmulq_lane_f32 (float32x4_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmulq_lane_u32 (uint32x4_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmulq_lane_u16 (uint16x8_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmulq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmulq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+6.52.3.51 Long multiply, lane
+.............................
+
+   * uint64x2_t vmull_lane_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmull_lane_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmull_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmull_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0[0]'
+
+6.52.3.52 Saturating doubling long multiply, lane
+.................................................
+
+   * int64x2_t vqdmull_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmull_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0[0]'
+
+6.52.3.53 Saturating doubling multiply high, lane
+.................................................
+
+   * int32x4_t vqdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0[0]'
+
+   * int32x4_t vqrdmulhq_lane_s32 (int32x4_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqrdmulhq_lane_s16 (int16x8_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqrdmulh_lane_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqrdmulh_lane_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0[0]'
+
+6.52.3.54 Multiply-accumulate, lane
+...................................
+
+   * float32x2_t vmla_lane_f32 (float32x2_t, float32x2_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmla_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmla_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmla_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmla_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlaq_lane_f32 (float32x4_t, float32x4_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlaq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlaq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlaq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlaq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlal_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlal_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlal_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlal_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0[0]'
+
+6.52.3.55 Multiply-subtract, lane
+.................................
+
+   * float32x2_t vmls_lane_f32 (float32x2_t, float32x2_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmls_lane_u32 (uint32x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmls_lane_u16 (uint16x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmls_lane_s32 (int32x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmls_lane_s16 (int16x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlsq_lane_f32 (float32x4_t, float32x4_t, float32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlsq_lane_u32 (uint32x4_t, uint32x4_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlsq_lane_u16 (uint16x8_t, uint16x8_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlsq_lane_s32 (int32x4_t, int32x4_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlsq_lane_s16 (int16x8_t, int16x8_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlsl_lane_u32 (uint64x2_t, uint32x2_t, uint32x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlsl_lane_u16 (uint32x4_t, uint16x4_t, uint16x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlsl_lane_s32 (int64x2_t, int32x2_t, int32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlsl_lane_s16 (int32x4_t, int16x4_t, int16x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0[0]'
+
+6.52.3.56 Vector multiply by scalar
+...................................
+
+   * float32x2_t vmul_n_f32 (float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmul.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmul_n_u32 (uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmul_n_u16 (uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmul_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmul.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmul_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmul.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmulq_n_f32 (float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmul.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmulq_n_u32 (uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmulq_n_u16 (uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmulq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmul.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmulq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmul.i16 Q0, Q0, D0[0]'
+
+6.52.3.57 Vector long multiply by scalar
+........................................
+
+   * uint64x2_t vmull_n_u32 (uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmull.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmull_n_u16 (uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmull.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmull_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmull_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmull.s16 Q0, D0, D0[0]'
+
+6.52.3.58 Vector saturating doubling long multiply by scalar
+............................................................
+
+   * int64x2_t vqdmull_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmull.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmull_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmull.s16 Q0, D0, D0[0]'
+
+6.52.3.59 Vector saturating doubling multiply high by scalar
+............................................................
+
+   * int32x4_t vqdmulhq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqdmulhq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqdmulh_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqdmulh_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmulh.s16 D0, D0, D0[0]'
+
+   * int32x4_t vqrdmulhq_n_s32 (int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 Q0, Q0, D0[0]'
+
+   * int16x8_t vqrdmulhq_n_s16 (int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 Q0, Q0, D0[0]'
+
+   * int32x2_t vqrdmulh_n_s32 (int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s32 D0, D0, D0[0]'
+
+   * int16x4_t vqrdmulh_n_s16 (int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqrdmulh.s16 D0, D0, D0[0]'
+
+6.52.3.60 Vector multiply-accumulate by scalar
+..............................................
+
+   * float32x2_t vmla_n_f32 (float32x2_t, float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmla.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmla_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmla_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmla_n_s32 (int32x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmla.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmla_n_s16 (int16x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmla.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlaq_n_f32 (float32x4_t, float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmla.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlaq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlaq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlaq_n_s32 (int32x4_t, int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmla.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlaq_n_s16 (int16x8_t, int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmla.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlal_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmlal.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlal_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmlal.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmlal.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlal_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmlal.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlal_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmlal.s16 Q0, D0, D0[0]'
+
+6.52.3.61 Vector multiply-subtract by scalar
+............................................
+
+   * float32x2_t vmls_n_f32 (float32x2_t, float32x2_t, float32_t)
+     _Form of expected instruction(s):_ `vmls.f32 D0, D0, D0[0]'
+
+   * uint32x2_t vmls_n_u32 (uint32x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * uint16x4_t vmls_n_u16 (uint16x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * int32x2_t vmls_n_s32 (int32x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmls.i32 D0, D0, D0[0]'
+
+   * int16x4_t vmls_n_s16 (int16x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmls.i16 D0, D0, D0[0]'
+
+   * float32x4_t vmlsq_n_f32 (float32x4_t, float32x4_t, float32_t)
+     _Form of expected instruction(s):_ `vmls.f32 Q0, Q0, D0[0]'
+
+   * uint32x4_t vmlsq_n_u32 (uint32x4_t, uint32x4_t, uint32_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * uint16x8_t vmlsq_n_u16 (uint16x8_t, uint16x8_t, uint16_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * int32x4_t vmlsq_n_s32 (int32x4_t, int32x4_t, int32_t)
+     _Form of expected instruction(s):_ `vmls.i32 Q0, Q0, D0[0]'
+
+   * int16x8_t vmlsq_n_s16 (int16x8_t, int16x8_t, int16_t)
+     _Form of expected instruction(s):_ `vmls.i16 Q0, Q0, D0[0]'
+
+   * uint64x2_t vmlsl_n_u32 (uint64x2_t, uint32x2_t, uint32_t)
+     _Form of expected instruction(s):_ `vmlsl.u32 Q0, D0, D0[0]'
+
+   * uint32x4_t vmlsl_n_u16 (uint32x4_t, uint16x4_t, uint16_t)
+     _Form of expected instruction(s):_ `vmlsl.u16 Q0, D0, D0[0]'
+
+   * int64x2_t vmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vmlsl.s16 Q0, D0, D0[0]'
+
+   * int64x2_t vqdmlsl_n_s32 (int64x2_t, int32x2_t, int32_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s32 Q0, D0, D0[0]'
+
+   * int32x4_t vqdmlsl_n_s16 (int32x4_t, int16x4_t, int16_t)
+     _Form of expected instruction(s):_ `vqdmlsl.s16 Q0, D0, D0[0]'
+
+6.52.3.62 Vector extract
+........................
+
+   * uint32x2_t vext_u32 (uint32x2_t, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * uint16x4_t vext_u16 (uint16x4_t, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * uint8x8_t vext_u8 (uint8x8_t, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * int32x2_t vext_s32 (int32x2_t, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * int16x4_t vext_s16 (int16x4_t, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * int8x8_t vext_s8 (int8x8_t, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * uint64x1_t vext_u64 (uint64x1_t, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vext.64 D0, D0, D0, #0'
+
+   * int64x1_t vext_s64 (int64x1_t, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vext.64 D0, D0, D0, #0'
+
+   * float32x2_t vext_f32 (float32x2_t, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vext.32 D0, D0, D0, #0'
+
+   * poly16x4_t vext_p16 (poly16x4_t, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vext.16 D0, D0, D0, #0'
+
+   * poly8x8_t vext_p8 (poly8x8_t, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vext.8 D0, D0, D0, #0'
+
+   * uint32x4_t vextq_u32 (uint32x4_t, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * uint16x8_t vextq_u16 (uint16x8_t, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * uint8x16_t vextq_u8 (uint8x16_t, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+   * int32x4_t vextq_s32 (int32x4_t, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * int16x8_t vextq_s16 (int16x8_t, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * int8x16_t vextq_s8 (int8x16_t, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+   * uint64x2_t vextq_u64 (uint64x2_t, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vext.64 Q0, Q0, Q0, #0'
+
+   * int64x2_t vextq_s64 (int64x2_t, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vext.64 Q0, Q0, Q0, #0'
+
+   * float32x4_t vextq_f32 (float32x4_t, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vext.32 Q0, Q0, Q0, #0'
+
+   * poly16x8_t vextq_p16 (poly16x8_t, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vext.16 Q0, Q0, Q0, #0'
+
+   * poly8x16_t vextq_p8 (poly8x16_t, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vext.8 Q0, Q0, Q0, #0'
+
+6.52.3.63 Reverse elements
+..........................
+
+   * uint32x2_t vrev64_u32 (uint32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * uint16x4_t vrev64_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * uint8x8_t vrev64_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * int32x2_t vrev64_s32 (int32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * int16x4_t vrev64_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * int8x8_t vrev64_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * float32x2_t vrev64_f32 (float32x2_t)
+     _Form of expected instruction(s):_ `vrev64.32 D0, D0'
+
+   * poly16x4_t vrev64_p16 (poly16x4_t)
+     _Form of expected instruction(s):_ `vrev64.16 D0, D0'
+
+   * poly8x8_t vrev64_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev64.8 D0, D0'
+
+   * uint32x4_t vrev64q_u32 (uint32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * uint16x8_t vrev64q_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * uint8x16_t vrev64q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * int32x4_t vrev64q_s32 (int32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * int16x8_t vrev64q_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * int8x16_t vrev64q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * float32x4_t vrev64q_f32 (float32x4_t)
+     _Form of expected instruction(s):_ `vrev64.32 Q0, Q0'
+
+   * poly16x8_t vrev64q_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vrev64.16 Q0, Q0'
+
+   * poly8x16_t vrev64q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev64.8 Q0, Q0'
+
+   * uint16x4_t vrev32_u16 (uint16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * int16x4_t vrev32_s16 (int16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * uint8x8_t vrev32_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * int8x8_t vrev32_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * poly16x4_t vrev32_p16 (poly16x4_t)
+     _Form of expected instruction(s):_ `vrev32.16 D0, D0'
+
+   * poly8x8_t vrev32_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev32.8 D0, D0'
+
+   * uint16x8_t vrev32q_u16 (uint16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * int16x8_t vrev32q_s16 (int16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * uint8x16_t vrev32q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * int8x16_t vrev32q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * poly16x8_t vrev32q_p16 (poly16x8_t)
+     _Form of expected instruction(s):_ `vrev32.16 Q0, Q0'
+
+   * poly8x16_t vrev32q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev32.8 Q0, Q0'
+
+   * uint8x8_t vrev16_u8 (uint8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * int8x8_t vrev16_s8 (int8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * poly8x8_t vrev16_p8 (poly8x8_t)
+     _Form of expected instruction(s):_ `vrev16.8 D0, D0'
+
+   * uint8x16_t vrev16q_u8 (uint8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+   * int8x16_t vrev16q_s8 (int8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+   * poly8x16_t vrev16q_p8 (poly8x16_t)
+     _Form of expected instruction(s):_ `vrev16.8 Q0, Q0'
+
+6.52.3.64 Bit selection
+.......................
+
+   * uint32x2_t vbsl_u32 (uint32x2_t, uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint16x4_t vbsl_u16 (uint16x4_t, uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint8x8_t vbsl_u8 (uint8x8_t, uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int32x2_t vbsl_s32 (uint32x2_t, int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int16x4_t vbsl_s16 (uint16x4_t, int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int8x8_t vbsl_s8 (uint8x8_t, int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint64x1_t vbsl_u64 (uint64x1_t, uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * int64x1_t vbsl_s64 (uint64x1_t, int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * float32x2_t vbsl_f32 (uint32x2_t, float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * poly16x4_t vbsl_p16 (uint16x4_t, poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * poly8x8_t vbsl_p8 (uint8x8_t, poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vbsl D0, D0, D0' _or_ `vbit
+     D0, D0, D0' _or_ `vbif D0, D0, D0'
+
+   * uint32x4_t vbslq_u32 (uint32x4_t, uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint16x8_t vbslq_u16 (uint16x8_t, uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint8x16_t vbslq_u8 (uint8x16_t, uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int32x4_t vbslq_s32 (uint32x4_t, int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int16x8_t vbslq_s16 (uint16x8_t, int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int8x16_t vbslq_s8 (uint8x16_t, int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * uint64x2_t vbslq_u64 (uint64x2_t, uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * int64x2_t vbslq_s64 (uint64x2_t, int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * float32x4_t vbslq_f32 (uint32x4_t, float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * poly16x8_t vbslq_p16 (uint16x8_t, poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+   * poly8x16_t vbslq_p8 (uint8x16_t, poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vbsl Q0, Q0, Q0' _or_ `vbit
+     Q0, Q0, Q0' _or_ `vbif Q0, Q0, Q0'
+
+6.52.3.65 Transpose elements
+............................
+
+   * uint32x2x2_t vtrn_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * uint16x4x2_t vtrn_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * uint8x8x2_t vtrn_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * int32x2x2_t vtrn_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * int16x4x2_t vtrn_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * int8x8x2_t vtrn_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * float32x2x2_t vtrn_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vtrn.32 D0, D1'
+
+   * poly16x4x2_t vtrn_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vtrn.16 D0, D1'
+
+   * poly8x8x2_t vtrn_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vtrn.8 D0, D1'
+
+   * uint32x4x2_t vtrnq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * uint16x8x2_t vtrnq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * uint8x16x2_t vtrnq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+   * int32x4x2_t vtrnq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * int16x8x2_t vtrnq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * int8x16x2_t vtrnq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+   * float32x4x2_t vtrnq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vtrn.32 Q0, Q1'
+
+   * poly16x8x2_t vtrnq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vtrn.16 Q0, Q1'
+
+   * poly8x16x2_t vtrnq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vtrn.8 Q0, Q1'
+
+6.52.3.66 Zip elements
+......................
+
+   * uint32x2x2_t vzip_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * uint16x4x2_t vzip_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * uint8x8x2_t vzip_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * int32x2x2_t vzip_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * int16x4x2_t vzip_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * int8x8x2_t vzip_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * float32x2x2_t vzip_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vzip.32 D0, D1'
+
+   * poly16x4x2_t vzip_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vzip.16 D0, D1'
+
+   * poly8x8x2_t vzip_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vzip.8 D0, D1'
+
+   * uint32x4x2_t vzipq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * uint16x8x2_t vzipq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * uint8x16x2_t vzipq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+   * int32x4x2_t vzipq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * int16x8x2_t vzipq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * int8x16x2_t vzipq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+   * float32x4x2_t vzipq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vzip.32 Q0, Q1'
+
+   * poly16x8x2_t vzipq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vzip.16 Q0, Q1'
+
+   * poly8x16x2_t vzipq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vzip.8 Q0, Q1'
+
+6.52.3.67 Unzip elements
+........................
+
+   * uint32x2x2_t vuzp_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * uint16x4x2_t vuzp_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * uint8x8x2_t vuzp_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * int32x2x2_t vuzp_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * int16x4x2_t vuzp_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * int8x8x2_t vuzp_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * float32x2x2_t vuzp_f32 (float32x2_t, float32x2_t)
+     _Form of expected instruction(s):_ `vuzp.32 D0, D1'
+
+   * poly16x4x2_t vuzp_p16 (poly16x4_t, poly16x4_t)
+     _Form of expected instruction(s):_ `vuzp.16 D0, D1'
+
+   * poly8x8x2_t vuzp_p8 (poly8x8_t, poly8x8_t)
+     _Form of expected instruction(s):_ `vuzp.8 D0, D1'
+
+   * uint32x4x2_t vuzpq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * uint16x8x2_t vuzpq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * uint8x16x2_t vuzpq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+   * int32x4x2_t vuzpq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * int16x8x2_t vuzpq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * int8x16x2_t vuzpq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+   * float32x4x2_t vuzpq_f32 (float32x4_t, float32x4_t)
+     _Form of expected instruction(s):_ `vuzp.32 Q0, Q1'
+
+   * poly16x8x2_t vuzpq_p16 (poly16x8_t, poly16x8_t)
+     _Form of expected instruction(s):_ `vuzp.16 Q0, Q1'
+
+   * poly8x16x2_t vuzpq_p8 (poly8x16_t, poly8x16_t)
+     _Form of expected instruction(s):_ `vuzp.8 Q0, Q1'
+
+6.52.3.68 Element/structure loads, VLD1 variants
+................................................
+
+   * uint32x2_t vld1_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * uint16x4_t vld1_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * uint8x8_t vld1_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * int32x2_t vld1_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * int16x4_t vld1_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * int8x8_t vld1_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * uint64x1_t vld1_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * float32x2_t vld1_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0}, [R0]'
+
+   * poly16x4_t vld1_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0}, [R0]'
+
+   * poly8x8_t vld1_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0}, [R0]'
+
+   * uint32x4_t vld1q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * uint16x8_t vld1q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * uint8x16_t vld1q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * int32x4_t vld1q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * int16x8_t vld1q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * int8x16_t vld1q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * uint64x2_t vld1q_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x2_t vld1q_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * float32x4_t vld1q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0, D1}, [R0]'
+
+   * poly16x8_t vld1q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0, D1}, [R0]'
+
+   * poly8x16_t vld1q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0, D1}, [R0]'
+
+   * uint32x2_t vld1_lane_u32 (const uint32_t *, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * uint16x4_t vld1_lane_u16 (const uint16_t *, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * uint8x8_t vld1_lane_u8 (const uint8_t *, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * int32x2_t vld1_lane_s32 (const int32_t *, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * int16x4_t vld1_lane_s16 (const int16_t *, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * int8x8_t vld1_lane_s8 (const int8_t *, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * float32x2_t vld1_lane_f32 (const float32_t *, float32x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * poly16x4_t vld1_lane_p16 (const poly16_t *, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * poly8x8_t vld1_lane_p8 (const poly8_t *, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * uint64x1_t vld1_lane_u64 (const uint64_t *, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_lane_s64 (const int64_t *, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x4_t vld1q_lane_u32 (const uint32_t *, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * uint16x8_t vld1q_lane_u16 (const uint16_t *, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * uint8x16_t vld1q_lane_u8 (const uint8_t *, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * int32x4_t vld1q_lane_s32 (const int32_t *, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * int16x8_t vld1q_lane_s16 (const int16_t *, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * int8x16_t vld1q_lane_s8 (const int8_t *, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * float32x4_t vld1q_lane_f32 (const float32_t *, float32x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld1.32 {D0[0]}, [R0]'
+
+   * poly16x8_t vld1q_lane_p16 (const poly16_t *, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vld1.16 {D0[0]}, [R0]'
+
+   * poly8x16_t vld1q_lane_p8 (const poly8_t *, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vld1.8 {D0[0]}, [R0]'
+
+   * uint64x2_t vld1q_lane_u64 (const uint64_t *, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x2_t vld1q_lane_s64 (const int64_t *, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x2_t vld1_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * uint16x4_t vld1_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * uint8x8_t vld1_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * int32x2_t vld1_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * int16x4_t vld1_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * int8x8_t vld1_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * float32x2_t vld1_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[]}, [R0]'
+
+   * poly16x4_t vld1_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[]}, [R0]'
+
+   * poly8x8_t vld1_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[]}, [R0]'
+
+   * uint64x1_t vld1_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * int64x1_t vld1_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0}, [R0]'
+
+   * uint32x4_t vld1q_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * uint16x8_t vld1q_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * uint8x16_t vld1q_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * int32x4_t vld1q_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * int16x8_t vld1q_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * int8x16_t vld1q_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * float32x4_t vld1q_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld1.32 {D0[], D1[]}, [R0]'
+
+   * poly16x8_t vld1q_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld1.16 {D0[], D1[]}, [R0]'
+
+   * poly8x16_t vld1q_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld1.8 {D0[], D1[]}, [R0]'
+
+   * uint64x2_t vld1q_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x2_t vld1q_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+6.52.3.69 Element/structure stores, VST1 variants
+.................................................
+
+   * void vst1_u32 (uint32_t *, uint32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_u16 (uint16_t *, uint16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_u8 (uint8_t *, uint8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1_s32 (int32_t *, int32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_s16 (int16_t *, int16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_s8 (int8_t *, int8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1_u64 (uint64_t *, uint64x1_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_s64 (int64_t *, int64x1_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_f32 (float32_t *, float32x2_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0}, [R0]'
+
+   * void vst1_p16 (poly16_t *, poly16x4_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0}, [R0]'
+
+   * void vst1_p8 (poly8_t *, poly8x8_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0}, [R0]'
+
+   * void vst1q_u32 (uint32_t *, uint32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_u16 (uint16_t *, uint16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_u8 (uint8_t *, uint8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1q_s32 (int32_t *, int32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_s16 (int16_t *, int16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_s8 (int8_t *, int8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1q_u64 (uint64_t *, uint64x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst1q_s64 (int64_t *, int64x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst1q_f32 (float32_t *, float32x4_t)
+     _Form of expected instruction(s):_ `vst1.32 {D0, D1}, [R0]'
+
+   * void vst1q_p16 (poly16_t *, poly16x8_t)
+     _Form of expected instruction(s):_ `vst1.16 {D0, D1}, [R0]'
+
+   * void vst1q_p8 (poly8_t *, poly8x16_t)
+     _Form of expected instruction(s):_ `vst1.8 {D0, D1}, [R0]'
+
+   * void vst1_lane_u32 (uint32_t *, uint32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_u16 (uint16_t *, uint16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_u8 (uint8_t *, uint8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_s32 (int32_t *, int32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_s16 (int16_t *, int16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_s8 (int8_t *, int8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_f32 (float32_t *, float32x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1_lane_p16 (poly16_t *, poly16x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1_lane_p8 (poly8_t *, poly8x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1_lane_s64 (int64_t *, int64x1_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1_lane_u64 (uint64_t *, uint64x1_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1q_lane_u32 (uint32_t *, uint32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_u16 (uint16_t *, uint16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_u8 (uint8_t *, uint8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s32 (int32_t *, int32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s16 (int16_t *, int16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s8 (int8_t *, int8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_f32 (float32_t *, float32x4_t, const int)
+     _Form of expected instruction(s):_ `vst1.32 {D0[0]}, [R0]'
+
+   * void vst1q_lane_p16 (poly16_t *, poly16x8_t, const int)
+     _Form of expected instruction(s):_ `vst1.16 {D0[0]}, [R0]'
+
+   * void vst1q_lane_p8 (poly8_t *, poly8x16_t, const int)
+     _Form of expected instruction(s):_ `vst1.8 {D0[0]}, [R0]'
+
+   * void vst1q_lane_s64 (int64_t *, int64x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+   * void vst1q_lane_u64 (uint64_t *, uint64x2_t, const int)
+     _Form of expected instruction(s):_ `vst1.64 {D0}, [R0]'
+
+6.52.3.70 Element/structure loads, VLD2 variants
+................................................
+
+   * uint32x2x2_t vld2_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * uint16x4x2_t vld2_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * uint8x8x2_t vld2_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * int32x2x2_t vld2_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * int16x4x2_t vld2_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * int8x8x2_t vld2_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * float32x2x2_t vld2_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * poly16x4x2_t vld2_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * poly8x8x2_t vld2_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * uint64x1x2_t vld2_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x1x2_t vld2_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * uint32x4x2_t vld2q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * uint16x8x2_t vld2q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * uint8x16x2_t vld2q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * int32x4x2_t vld2q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * int16x8x2_t vld2q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * int8x16x2_t vld2q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * float32x4x2_t vld2q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0, D1}, [R0]'
+
+   * poly16x8x2_t vld2q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0, D1}, [R0]'
+
+   * poly8x16x2_t vld2q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0, D1}, [R0]'
+
+   * uint32x2x2_t vld2_lane_u32 (const uint32_t *, uint32x2x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * uint16x4x2_t vld2_lane_u16 (const uint16_t *, uint16x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint8x8x2_t vld2_lane_u8 (const uint8_t *, uint8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * int32x2x2_t vld2_lane_s32 (const int32_t *, int32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * int16x4x2_t vld2_lane_s16 (const int16_t *, int16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * int8x8x2_t vld2_lane_s8 (const int8_t *, int8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * float32x2x2_t vld2_lane_f32 (const float32_t *, float32x2x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * poly16x4x2_t vld2_lane_p16 (const poly16_t *, poly16x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * poly8x8x2_t vld2_lane_p8 (const poly8_t *, poly8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vld2.8 {D0[0], D1[0]}, [R0]'
+
+   * int32x4x2_t vld2q_lane_s32 (const int32_t *, int32x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * int16x8x2_t vld2q_lane_s16 (const int16_t *, int16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint32x4x2_t vld2q_lane_u32 (const uint32_t *, uint32x4x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * uint16x8x2_t vld2q_lane_u16 (const uint16_t *, uint16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * float32x4x2_t vld2q_lane_f32 (const float32_t *, float32x4x2_t,
+     const int)
+     _Form of expected instruction(s):_ `vld2.32 {D0[0], D1[0]}, [R0]'
+
+   * poly16x8x2_t vld2q_lane_p16 (const poly16_t *, poly16x8x2_t, const
+     int)
+     _Form of expected instruction(s):_ `vld2.16 {D0[0], D1[0]}, [R0]'
+
+   * uint32x2x2_t vld2_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * uint16x4x2_t vld2_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * uint8x8x2_t vld2_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * int32x2x2_t vld2_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * int16x4x2_t vld2_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * int8x8x2_t vld2_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * float32x2x2_t vld2_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld2.32 {D0[], D1[]}, [R0]'
+
+   * poly16x4x2_t vld2_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld2.16 {D0[], D1[]}, [R0]'
+
+   * poly8x8x2_t vld2_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld2.8 {D0[], D1[]}, [R0]'
+
+   * uint64x1x2_t vld2_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+   * int64x1x2_t vld2_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1}, [R0]'
+
+6.52.3.71 Element/structure stores, VST2 variants
+.................................................
+
+   * void vst2_u32 (uint32_t *, uint32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_u16 (uint16_t *, uint16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_u8 (uint8_t *, uint8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_s32 (int32_t *, int32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_s16 (int16_t *, int16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_s8 (int8_t *, int8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_f32 (float32_t *, float32x2x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2_p16 (poly16_t *, poly16x4x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2_p8 (poly8_t *, poly8x8x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_u64 (uint64_t *, uint64x1x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst2_s64 (int64_t *, int64x1x2_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1}, [R0]'
+
+   * void vst2q_u32 (uint32_t *, uint32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_u16 (uint16_t *, uint16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_u8 (uint8_t *, uint8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2q_s32 (int32_t *, int32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_s16 (int16_t *, int16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_s8 (int8_t *, int8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2q_f32 (float32_t *, float32x4x2_t)
+     _Form of expected instruction(s):_ `vst2.32 {D0, D1}, [R0]'
+
+   * void vst2q_p16 (poly16_t *, poly16x8x2_t)
+     _Form of expected instruction(s):_ `vst2.16 {D0, D1}, [R0]'
+
+   * void vst2q_p8 (poly8_t *, poly8x16x2_t)
+     _Form of expected instruction(s):_ `vst2.8 {D0, D1}, [R0]'
+
+   * void vst2_lane_u32 (uint32_t *, uint32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_u16 (uint16_t *, uint16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_u8 (uint8_t *, uint8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s32 (int32_t *, int32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s16 (int16_t *, int16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_s8 (int8_t *, int8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_f32 (float32_t *, float32x2x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_p16 (poly16_t *, poly16x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2_lane_p8 (poly8_t *, poly8x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.8 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_s32 (int32_t *, int32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_s16 (int16_t *, int16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_u32 (uint32_t *, uint32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_u16 (uint16_t *, uint16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_f32 (float32_t *, float32x4x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.32 {D0[0], D1[0]}, [R0]'
+
+   * void vst2q_lane_p16 (poly16_t *, poly16x8x2_t, const int)
+     _Form of expected instruction(s):_ `vst2.16 {D0[0], D1[0]}, [R0]'
+
+6.52.3.72 Element/structure loads, VLD3 variants
+................................................
+
+   * uint32x2x3_t vld3_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * uint16x4x3_t vld3_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * uint8x8x3_t vld3_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * int32x2x3_t vld3_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * int16x4x3_t vld3_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * int8x8x3_t vld3_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * float32x2x3_t vld3_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * poly16x4x3_t vld3_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * poly8x8x3_t vld3_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * uint64x1x3_t vld3_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * int64x1x3_t vld3_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * uint32x4x3_t vld3q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * uint16x8x3_t vld3q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * uint8x16x3_t vld3q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * int32x4x3_t vld3q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * int16x8x3_t vld3q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * int8x16x3_t vld3q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * float32x4x3_t vld3q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0, D1, D2}, [R0]'
+
+   * poly16x8x3_t vld3q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0, D1, D2}, [R0]'
+
+   * poly8x16x3_t vld3q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0, D1, D2}, [R0]'
+
+   * uint32x2x3_t vld3_lane_u32 (const uint32_t *, uint32x2x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint16x4x3_t vld3_lane_u16 (const uint16_t *, uint16x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint8x8x3_t vld3_lane_u8 (const uint8_t *, uint8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int32x2x3_t vld3_lane_s32 (const int32_t *, int32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int16x4x3_t vld3_lane_s16 (const int16_t *, int16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int8x8x3_t vld3_lane_s8 (const int8_t *, int8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * float32x2x3_t vld3_lane_f32 (const float32_t *, float32x2x3_t,
+     const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly16x4x3_t vld3_lane_p16 (const poly16_t *, poly16x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly8x8x3_t vld3_lane_p8 (const poly8_t *, poly8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vld3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int32x4x3_t vld3q_lane_s32 (const int32_t *, int32x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * int16x8x3_t vld3q_lane_s16 (const int16_t *, int16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint32x4x3_t vld3q_lane_u32 (const uint32_t *, uint32x4x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint16x8x3_t vld3q_lane_u16 (const uint16_t *, uint16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * float32x4x3_t vld3q_lane_f32 (const float32_t *, float32x4x3_t,
+     const int)
+     _Form of expected instruction(s):_ `vld3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * poly16x8x3_t vld3q_lane_p16 (const poly16_t *, poly16x8x3_t, const
+     int)
+     _Form of expected instruction(s):_ `vld3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * uint32x2x3_t vld3_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint16x4x3_t vld3_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint8x8x3_t vld3_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int32x2x3_t vld3_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int16x4x3_t vld3_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * int8x8x3_t vld3_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * float32x2x3_t vld3_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld3.32 {D0[], D1[], D2[]},
+     [R0]'
+
+   * poly16x4x3_t vld3_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld3.16 {D0[], D1[], D2[]},
+     [R0]'
+
+   * poly8x8x3_t vld3_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld3.8 {D0[], D1[], D2[]},
+     [R0]'
+
+   * uint64x1x3_t vld3_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+   * int64x1x3_t vld3_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2}, [R0]'
+
+6.52.3.73 Element/structure stores, VST3 variants
+.................................................
+
+   * void vst3_u32 (uint32_t *, uint32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u16 (uint16_t *, uint16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u8 (uint8_t *, uint8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s32 (int32_t *, int32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s16 (int16_t *, int16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s8 (int8_t *, int8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_f32 (float32_t *, float32x2x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_p16 (poly16_t *, poly16x4x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_p8 (poly8_t *, poly8x8x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_u64 (uint64_t *, uint64x1x3_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3_s64 (int64_t *, int64x1x3_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst3q_u32 (uint32_t *, uint32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_u16 (uint16_t *, uint16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_u8 (uint8_t *, uint8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s32 (int32_t *, int32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s16 (int16_t *, int16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_s8 (int8_t *, int8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3q_f32 (float32_t *, float32x4x3_t)
+     _Form of expected instruction(s):_ `vst3.32 {D0, D1, D2}, [R0]'
+
+   * void vst3q_p16 (poly16_t *, poly16x8x3_t)
+     _Form of expected instruction(s):_ `vst3.16 {D0, D1, D2}, [R0]'
+
+   * void vst3q_p8 (poly8_t *, poly8x16x3_t)
+     _Form of expected instruction(s):_ `vst3.8 {D0, D1, D2}, [R0]'
+
+   * void vst3_lane_u32 (uint32_t *, uint32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_u16 (uint16_t *, uint16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_u8 (uint8_t *, uint8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s32 (int32_t *, int32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s16 (int16_t *, int16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_s8 (int8_t *, int8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_f32 (float32_t *, float32x2x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_p16 (poly16_t *, poly16x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3_lane_p8 (poly8_t *, poly8x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.8 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_s32 (int32_t *, int32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_s16 (int16_t *, int16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_u32 (uint32_t *, uint32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_u16 (uint16_t *, uint16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_f32 (float32_t *, float32x4x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.32 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+   * void vst3q_lane_p16 (poly16_t *, poly16x8x3_t, const int)
+     _Form of expected instruction(s):_ `vst3.16 {D0[0], D1[0], D2[0]},
+     [R0]'
+
+6.52.3.74 Element/structure loads, VLD4 variants
+................................................
+
+   * uint32x2x4_t vld4_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * uint16x4x4_t vld4_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * uint8x8x4_t vld4_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * int32x2x4_t vld4_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * int16x4x4_t vld4_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * int8x8x4_t vld4_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * float32x2x4_t vld4_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * poly16x4x4_t vld4_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * poly8x8x4_t vld4_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * uint64x1x4_t vld4_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * int64x1x4_t vld4_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * uint32x4x4_t vld4q_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * uint16x8x4_t vld4q_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * uint8x16x4_t vld4q_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * int32x4x4_t vld4q_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * int16x8x4_t vld4q_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * int8x16x4_t vld4q_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * float32x4x4_t vld4q_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0, D1, D2, D3}, [R0]'
+
+   * poly16x8x4_t vld4q_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0, D1, D2, D3}, [R0]'
+
+   * poly8x16x4_t vld4q_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0, D1, D2, D3}, [R0]'
+
+   * uint32x2x4_t vld4_lane_u32 (const uint32_t *, uint32x2x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint16x4x4_t vld4_lane_u16 (const uint16_t *, uint16x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint8x8x4_t vld4_lane_u8 (const uint8_t *, uint8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int32x2x4_t vld4_lane_s32 (const int32_t *, int32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int16x4x4_t vld4_lane_s16 (const int16_t *, int16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int8x8x4_t vld4_lane_s8 (const int8_t *, int8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * float32x2x4_t vld4_lane_f32 (const float32_t *, float32x2x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly16x4x4_t vld4_lane_p16 (const poly16_t *, poly16x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly8x8x4_t vld4_lane_p8 (const poly8_t *, poly8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vld4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int32x4x4_t vld4q_lane_s32 (const int32_t *, int32x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * int16x8x4_t vld4q_lane_s16 (const int16_t *, int16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint32x4x4_t vld4q_lane_u32 (const uint32_t *, uint32x4x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint16x8x4_t vld4q_lane_u16 (const uint16_t *, uint16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * float32x4x4_t vld4q_lane_f32 (const float32_t *, float32x4x4_t,
+     const int)
+     _Form of expected instruction(s):_ `vld4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * poly16x8x4_t vld4q_lane_p16 (const poly16_t *, poly16x8x4_t, const
+     int)
+     _Form of expected instruction(s):_ `vld4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * uint32x2x4_t vld4_dup_u32 (const uint32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint16x4x4_t vld4_dup_u16 (const uint16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint8x8x4_t vld4_dup_u8 (const uint8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int32x2x4_t vld4_dup_s32 (const int32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int16x4x4_t vld4_dup_s16 (const int16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * int8x8x4_t vld4_dup_s8 (const int8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * float32x2x4_t vld4_dup_f32 (const float32_t *)
+     _Form of expected instruction(s):_ `vld4.32 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * poly16x4x4_t vld4_dup_p16 (const poly16_t *)
+     _Form of expected instruction(s):_ `vld4.16 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * poly8x8x4_t vld4_dup_p8 (const poly8_t *)
+     _Form of expected instruction(s):_ `vld4.8 {D0[], D1[], D2[],
+     D3[]}, [R0]'
+
+   * uint64x1x4_t vld4_dup_u64 (const uint64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+   * int64x1x4_t vld4_dup_s64 (const int64_t *)
+     _Form of expected instruction(s):_ `vld1.64 {D0, D1, D2, D3}, [R0]'
+
+6.52.3.75 Element/structure stores, VST4 variants
+.................................................
+
+   * void vst4_u32 (uint32_t *, uint32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u16 (uint16_t *, uint16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u8 (uint8_t *, uint8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s32 (int32_t *, int32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s16 (int16_t *, int16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s8 (int8_t *, int8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_f32 (float32_t *, float32x2x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_p16 (poly16_t *, poly16x4x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_p8 (poly8_t *, poly8x8x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_u64 (uint64_t *, uint64x1x4_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_s64 (int64_t *, int64x1x4_t)
+     _Form of expected instruction(s):_ `vst1.64 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u32 (uint32_t *, uint32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u16 (uint16_t *, uint16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_u8 (uint8_t *, uint8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s32 (int32_t *, int32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s16 (int16_t *, int16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_s8 (int8_t *, int8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_f32 (float32_t *, float32x4x4_t)
+     _Form of expected instruction(s):_ `vst4.32 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_p16 (poly16_t *, poly16x8x4_t)
+     _Form of expected instruction(s):_ `vst4.16 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4q_p8 (poly8_t *, poly8x16x4_t)
+     _Form of expected instruction(s):_ `vst4.8 {D0, D1, D2, D3}, [R0]'
+
+   * void vst4_lane_u32 (uint32_t *, uint32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_u16 (uint16_t *, uint16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_u8 (uint8_t *, uint8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s32 (int32_t *, int32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s16 (int16_t *, int16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_s8 (int8_t *, int8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_f32 (float32_t *, float32x2x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_p16 (poly16_t *, poly16x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4_lane_p8 (poly8_t *, poly8x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.8 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_s32 (int32_t *, int32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_s16 (int16_t *, int16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_u32 (uint32_t *, uint32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_u16 (uint16_t *, uint16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_f32 (float32_t *, float32x4x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.32 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+   * void vst4q_lane_p16 (poly16_t *, poly16x8x4_t, const int)
+     _Form of expected instruction(s):_ `vst4.16 {D0[0], D1[0], D2[0],
+     D3[0]}, [R0]'
+
+6.52.3.76 Logical operations (AND)
+..................................
+
+   * uint32x2_t vand_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint16x4_t vand_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint8x8_t vand_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int32x2_t vand_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int16x4_t vand_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int8x8_t vand_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint64x1_t vand_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * int64x1_t vand_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vand D0, D0, D0'
+
+   * uint32x4_t vandq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint16x8_t vandq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint8x16_t vandq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int32x4_t vandq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int16x8_t vandq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int8x16_t vandq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * uint64x2_t vandq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+   * int64x2_t vandq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vand Q0, Q0, Q0'
+
+6.52.3.77 Logical operations (OR)
+.................................
+
+   * uint32x2_t vorr_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint16x4_t vorr_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint8x8_t vorr_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int32x2_t vorr_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int16x4_t vorr_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int8x8_t vorr_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint64x1_t vorr_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * int64x1_t vorr_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vorr D0, D0, D0'
+
+   * uint32x4_t vorrq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint16x8_t vorrq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint8x16_t vorrq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int32x4_t vorrq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int16x8_t vorrq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int8x16_t vorrq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * uint64x2_t vorrq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+   * int64x2_t vorrq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vorr Q0, Q0, Q0'
+
+6.52.3.78 Logical operations (exclusive OR)
+...........................................
+
+   * uint32x2_t veor_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint16x4_t veor_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint8x8_t veor_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int32x2_t veor_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int16x4_t veor_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int8x8_t veor_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint64x1_t veor_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * int64x1_t veor_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `veor D0, D0, D0'
+
+   * uint32x4_t veorq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint16x8_t veorq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint8x16_t veorq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int32x4_t veorq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int16x8_t veorq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int8x16_t veorq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * uint64x2_t veorq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+   * int64x2_t veorq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `veor Q0, Q0, Q0'
+
+6.52.3.79 Logical operations (AND-NOT)
+......................................
+
+   * uint32x2_t vbic_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint16x4_t vbic_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint8x8_t vbic_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int32x2_t vbic_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int16x4_t vbic_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int8x8_t vbic_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint64x1_t vbic_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * int64x1_t vbic_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vbic D0, D0, D0'
+
+   * uint32x4_t vbicq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint16x8_t vbicq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint8x16_t vbicq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int32x4_t vbicq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int16x8_t vbicq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int8x16_t vbicq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * uint64x2_t vbicq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+   * int64x2_t vbicq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vbic Q0, Q0, Q0'
+
+6.52.3.80 Logical operations (OR-NOT)
+.....................................
+
+   * uint32x2_t vorn_u32 (uint32x2_t, uint32x2_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint16x4_t vorn_u16 (uint16x4_t, uint16x4_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint8x8_t vorn_u8 (uint8x8_t, uint8x8_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int32x2_t vorn_s32 (int32x2_t, int32x2_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int16x4_t vorn_s16 (int16x4_t, int16x4_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int8x8_t vorn_s8 (int8x8_t, int8x8_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint64x1_t vorn_u64 (uint64x1_t, uint64x1_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * int64x1_t vorn_s64 (int64x1_t, int64x1_t)
+     _Form of expected instruction(s):_ `vorn D0, D0, D0'
+
+   * uint32x4_t vornq_u32 (uint32x4_t, uint32x4_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint16x8_t vornq_u16 (uint16x8_t, uint16x8_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint8x16_t vornq_u8 (uint8x16_t, uint8x16_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int32x4_t vornq_s32 (int32x4_t, int32x4_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int16x8_t vornq_s16 (int16x8_t, int16x8_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int8x16_t vornq_s8 (int8x16_t, int8x16_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * uint64x2_t vornq_u64 (uint64x2_t, uint64x2_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+   * int64x2_t vornq_s64 (int64x2_t, int64x2_t)
+     _Form of expected instruction(s):_ `vorn Q0, Q0, Q0'
+
+6.52.3.81 Reinterpret casts
+...........................
+
+   * poly8x8_t vreinterpret_p8_u32 (uint32x2_t)
+
+   * poly8x8_t vreinterpret_p8_u16 (uint16x4_t)
+
+   * poly8x8_t vreinterpret_p8_u8 (uint8x8_t)
+
+   * poly8x8_t vreinterpret_p8_s32 (int32x2_t)
+
+   * poly8x8_t vreinterpret_p8_s16 (int16x4_t)
+
+   * poly8x8_t vreinterpret_p8_s8 (int8x8_t)
+
+   * poly8x8_t vreinterpret_p8_u64 (uint64x1_t)
+
+   * poly8x8_t vreinterpret_p8_s64 (int64x1_t)
+
+   * poly8x8_t vreinterpret_p8_f32 (float32x2_t)
+
+   * poly8x8_t vreinterpret_p8_p16 (poly16x4_t)
+
+   * poly8x16_t vreinterpretq_p8_u32 (uint32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_u16 (uint16x8_t)
+
+   * poly8x16_t vreinterpretq_p8_u8 (uint8x16_t)
+
+   * poly8x16_t vreinterpretq_p8_s32 (int32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_s16 (int16x8_t)
+
+   * poly8x16_t vreinterpretq_p8_s8 (int8x16_t)
+
+   * poly8x16_t vreinterpretq_p8_u64 (uint64x2_t)
+
+   * poly8x16_t vreinterpretq_p8_s64 (int64x2_t)
+
+   * poly8x16_t vreinterpretq_p8_f32 (float32x4_t)
+
+   * poly8x16_t vreinterpretq_p8_p16 (poly16x8_t)
+
+   * poly16x4_t vreinterpret_p16_u32 (uint32x2_t)
+
+   * poly16x4_t vreinterpret_p16_u16 (uint16x4_t)
+
+   * poly16x4_t vreinterpret_p16_u8 (uint8x8_t)
+
+   * poly16x4_t vreinterpret_p16_s32 (int32x2_t)
+
+   * poly16x4_t vreinterpret_p16_s16 (int16x4_t)
+
+   * poly16x4_t vreinterpret_p16_s8 (int8x8_t)
+
+   * poly16x4_t vreinterpret_p16_u64 (uint64x1_t)
+
+   * poly16x4_t vreinterpret_p16_s64 (int64x1_t)
+
+   * poly16x4_t vreinterpret_p16_f32 (float32x2_t)
+
+   * poly16x4_t vreinterpret_p16_p8 (poly8x8_t)
+
+   * poly16x8_t vreinterpretq_p16_u32 (uint32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_u16 (uint16x8_t)
+
+   * poly16x8_t vreinterpretq_p16_u8 (uint8x16_t)
+
+   * poly16x8_t vreinterpretq_p16_s32 (int32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_s16 (int16x8_t)
+
+   * poly16x8_t vreinterpretq_p16_s8 (int8x16_t)
+
+   * poly16x8_t vreinterpretq_p16_u64 (uint64x2_t)
+
+   * poly16x8_t vreinterpretq_p16_s64 (int64x2_t)
+
+   * poly16x8_t vreinterpretq_p16_f32 (float32x4_t)
+
+   * poly16x8_t vreinterpretq_p16_p8 (poly8x16_t)
+
+   * float32x2_t vreinterpret_f32_u32 (uint32x2_t)
+
+   * float32x2_t vreinterpret_f32_u16 (uint16x4_t)
+
+   * float32x2_t vreinterpret_f32_u8 (uint8x8_t)
+
+   * float32x2_t vreinterpret_f32_s32 (int32x2_t)
+
+   * float32x2_t vreinterpret_f32_s16 (int16x4_t)
+
+   * float32x2_t vreinterpret_f32_s8 (int8x8_t)
+
+   * float32x2_t vreinterpret_f32_u64 (uint64x1_t)
+
+   * float32x2_t vreinterpret_f32_s64 (int64x1_t)
+
+   * float32x2_t vreinterpret_f32_p16 (poly16x4_t)
+
+   * float32x2_t vreinterpret_f32_p8 (poly8x8_t)
+
+   * float32x4_t vreinterpretq_f32_u32 (uint32x4_t)
+
+   * float32x4_t vreinterpretq_f32_u16 (uint16x8_t)
+
+   * float32x4_t vreinterpretq_f32_u8 (uint8x16_t)
+
+   * float32x4_t vreinterpretq_f32_s32 (int32x4_t)
+
+   * float32x4_t vreinterpretq_f32_s16 (int16x8_t)
+
+   * float32x4_t vreinterpretq_f32_s8 (int8x16_t)
+
+   * float32x4_t vreinterpretq_f32_u64 (uint64x2_t)
+
+   * float32x4_t vreinterpretq_f32_s64 (int64x2_t)
+
+   * float32x4_t vreinterpretq_f32_p16 (poly16x8_t)
+
+   * float32x4_t vreinterpretq_f32_p8 (poly8x16_t)
+
+   * int64x1_t vreinterpret_s64_u32 (uint32x2_t)
+
+   * int64x1_t vreinterpret_s64_u16 (uint16x4_t)
+
+   * int64x1_t vreinterpret_s64_u8 (uint8x8_t)
+
+   * int64x1_t vreinterpret_s64_s32 (int32x2_t)
+
+   * int64x1_t vreinterpret_s64_s16 (int16x4_t)
+
+   * int64x1_t vreinterpret_s64_s8 (int8x8_t)
+
+   * int64x1_t vreinterpret_s64_u64 (uint64x1_t)
+
+   * int64x1_t vreinterpret_s64_f32 (float32x2_t)
+
+   * int64x1_t vreinterpret_s64_p16 (poly16x4_t)
+
+   * int64x1_t vreinterpret_s64_p8 (poly8x8_t)
+
+   * int64x2_t vreinterpretq_s64_u32 (uint32x4_t)
+
+   * int64x2_t vreinterpretq_s64_u16 (uint16x8_t)
+
+   * int64x2_t vreinterpretq_s64_u8 (uint8x16_t)
+
+   * int64x2_t vreinterpretq_s64_s32 (int32x4_t)
+
+   * int64x2_t vreinterpretq_s64_s16 (int16x8_t)
+
+   * int64x2_t vreinterpretq_s64_s8 (int8x16_t)
+
+   * int64x2_t vreinterpretq_s64_u64 (uint64x2_t)
+
+   * int64x2_t vreinterpretq_s64_f32 (float32x4_t)
+
+   * int64x2_t vreinterpretq_s64_p16 (poly16x8_t)
+
+   * int64x2_t vreinterpretq_s64_p8 (poly8x16_t)
+
+   * uint64x1_t vreinterpret_u64_u32 (uint32x2_t)
+
+   * uint64x1_t vreinterpret_u64_u16 (uint16x4_t)
+
+   * uint64x1_t vreinterpret_u64_u8 (uint8x8_t)
+
+   * uint64x1_t vreinterpret_u64_s32 (int32x2_t)
+
+   * uint64x1_t vreinterpret_u64_s16 (int16x4_t)
+
+   * uint64x1_t vreinterpret_u64_s8 (int8x8_t)
+
+   * uint64x1_t vreinterpret_u64_s64 (int64x1_t)
+
+   * uint64x1_t vreinterpret_u64_f32 (float32x2_t)
+
+   * uint64x1_t vreinterpret_u64_p16 (poly16x4_t)
+
+   * uint64x1_t vreinterpret_u64_p8 (poly8x8_t)
+
+   * uint64x2_t vreinterpretq_u64_u32 (uint32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_u16 (uint16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_u8 (uint8x16_t)
+
+   * uint64x2_t vreinterpretq_u64_s32 (int32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_s16 (int16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_s8 (int8x16_t)
+
+   * uint64x2_t vreinterpretq_u64_s64 (int64x2_t)
+
+   * uint64x2_t vreinterpretq_u64_f32 (float32x4_t)
+
+   * uint64x2_t vreinterpretq_u64_p16 (poly16x8_t)
+
+   * uint64x2_t vreinterpretq_u64_p8 (poly8x16_t)
+
+   * int8x8_t vreinterpret_s8_u32 (uint32x2_t)
+
+   * int8x8_t vreinterpret_s8_u16 (uint16x4_t)
+
+   * int8x8_t vreinterpret_s8_u8 (uint8x8_t)
+
+   * int8x8_t vreinterpret_s8_s32 (int32x2_t)
+
+   * int8x8_t vreinterpret_s8_s16 (int16x4_t)
+
+   * int8x8_t vreinterpret_s8_u64 (uint64x1_t)
+
+   * int8x8_t vreinterpret_s8_s64 (int64x1_t)
+
+   * int8x8_t vreinterpret_s8_f32 (float32x2_t)
+
+   * int8x8_t vreinterpret_s8_p16 (poly16x4_t)
+
+   * int8x8_t vreinterpret_s8_p8 (poly8x8_t)
+
+   * int8x16_t vreinterpretq_s8_u32 (uint32x4_t)
+
+   * int8x16_t vreinterpretq_s8_u16 (uint16x8_t)
+
+   * int8x16_t vreinterpretq_s8_u8 (uint8x16_t)
+
+   * int8x16_t vreinterpretq_s8_s32 (int32x4_t)
+
+   * int8x16_t vreinterpretq_s8_s16 (int16x8_t)
+
+   * int8x16_t vreinterpretq_s8_u64 (uint64x2_t)
+
+   * int8x16_t vreinterpretq_s8_s64 (int64x2_t)
+
+   * int8x16_t vreinterpretq_s8_f32 (float32x4_t)
+
+   * int8x16_t vreinterpretq_s8_p16 (poly16x8_t)
+
+   * int8x16_t vreinterpretq_s8_p8 (poly8x16_t)
+
+   * int16x4_t vreinterpret_s16_u32 (uint32x2_t)
+
+   * int16x4_t vreinterpret_s16_u16 (uint16x4_t)
+
+   * int16x4_t vreinterpret_s16_u8 (uint8x8_t)
+
+   * int16x4_t vreinterpret_s16_s32 (int32x2_t)
+
+   * int16x4_t vreinterpret_s16_s8 (int8x8_t)
+
+   * int16x4_t vreinterpret_s16_u64 (uint64x1_t)
+
+   * int16x4_t vreinterpret_s16_s64 (int64x1_t)
+
+   * int16x4_t vreinterpret_s16_f32 (float32x2_t)
+
+   * int16x4_t vreinterpret_s16_p16 (poly16x4_t)
+
+   * int16x4_t vreinterpret_s16_p8 (poly8x8_t)
+
+   * int16x8_t vreinterpretq_s16_u32 (uint32x4_t)
+
+   * int16x8_t vreinterpretq_s16_u16 (uint16x8_t)
+
+   * int16x8_t vreinterpretq_s16_u8 (uint8x16_t)
+
+   * int16x8_t vreinterpretq_s16_s32 (int32x4_t)
+
+   * int16x8_t vreinterpretq_s16_s8 (int8x16_t)
+
+   * int16x8_t vreinterpretq_s16_u64 (uint64x2_t)
+
+   * int16x8_t vreinterpretq_s16_s64 (int64x2_t)
+
+   * int16x8_t vreinterpretq_s16_f32 (float32x4_t)
+
+   * int16x8_t vreinterpretq_s16_p16 (poly16x8_t)
+
+   * int16x8_t vreinterpretq_s16_p8 (poly8x16_t)
+
+   * int32x2_t vreinterpret_s32_u32 (uint32x2_t)
+
+   * int32x2_t vreinterpret_s32_u16 (uint16x4_t)
+
+   * int32x2_t vreinterpret_s32_u8 (uint8x8_t)
+
+   * int32x2_t vreinterpret_s32_s16 (int16x4_t)
+
+   * int32x2_t vreinterpret_s32_s8 (int8x8_t)
+
+   * int32x2_t vreinterpret_s32_u64 (uint64x1_t)
+
+   * int32x2_t vreinterpret_s32_s64 (int64x1_t)
+
+   * int32x2_t vreinterpret_s32_f32 (float32x2_t)
+
+   * int32x2_t vreinterpret_s32_p16 (poly16x4_t)
+
+   * int32x2_t vreinterpret_s32_p8 (poly8x8_t)
+
+   * int32x4_t vreinterpretq_s32_u32 (uint32x4_t)
+
+   * int32x4_t vreinterpretq_s32_u16 (uint16x8_t)
+
+   * int32x4_t vreinterpretq_s32_u8 (uint8x16_t)
+
+   * int32x4_t vreinterpretq_s32_s16 (int16x8_t)
+
+   * int32x4_t vreinterpretq_s32_s8 (int8x16_t)
+
+   * int32x4_t vreinterpretq_s32_u64 (uint64x2_t)
+
+   * int32x4_t vreinterpretq_s32_s64 (int64x2_t)
+
+   * int32x4_t vreinterpretq_s32_f32 (float32x4_t)
+
+   * int32x4_t vreinterpretq_s32_p16 (poly16x8_t)
+
+   * int32x4_t vreinterpretq_s32_p8 (poly8x16_t)
+
+   * uint8x8_t vreinterpret_u8_u32 (uint32x2_t)
+
+   * uint8x8_t vreinterpret_u8_u16 (uint16x4_t)
+
+   * uint8x8_t vreinterpret_u8_s32 (int32x2_t)
+
+   * uint8x8_t vreinterpret_u8_s16 (int16x4_t)
+
+   * uint8x8_t vreinterpret_u8_s8 (int8x8_t)
+
+   * uint8x8_t vreinterpret_u8_u64 (uint64x1_t)
+
+   * uint8x8_t vreinterpret_u8_s64 (int64x1_t)
+
+   * uint8x8_t vreinterpret_u8_f32 (float32x2_t)
+
+   * uint8x8_t vreinterpret_u8_p16 (poly16x4_t)
+
+   * uint8x8_t vreinterpret_u8_p8 (poly8x8_t)
+
+   * uint8x16_t vreinterpretq_u8_u32 (uint32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_u16 (uint16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_s32 (int32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_s16 (int16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_s8 (int8x16_t)
+
+   * uint8x16_t vreinterpretq_u8_u64 (uint64x2_t)
+
+   * uint8x16_t vreinterpretq_u8_s64 (int64x2_t)
+
+   * uint8x16_t vreinterpretq_u8_f32 (float32x4_t)
+
+   * uint8x16_t vreinterpretq_u8_p16 (poly16x8_t)
+
+   * uint8x16_t vreinterpretq_u8_p8 (poly8x16_t)
+
+   * uint16x4_t vreinterpret_u16_u32 (uint32x2_t)
+
+   * uint16x4_t vreinterpret_u16_u8 (uint8x8_t)
+
+   * uint16x4_t vreinterpret_u16_s32 (int32x2_t)
+
+   * uint16x4_t vreinterpret_u16_s16 (int16x4_t)
+
+   * uint16x4_t vreinterpret_u16_s8 (int8x8_t)
+
+   * uint16x4_t vreinterpret_u16_u64 (uint64x1_t)
+
+   * uint16x4_t vreinterpret_u16_s64 (int64x1_t)
+
+   * uint16x4_t vreinterpret_u16_f32 (float32x2_t)
+
+   * uint16x4_t vreinterpret_u16_p16 (poly16x4_t)
+
+   * uint16x4_t vreinterpret_u16_p8 (poly8x8_t)
+
+   * uint16x8_t vreinterpretq_u16_u32 (uint32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_u8 (uint8x16_t)
+
+   * uint16x8_t vreinterpretq_u16_s32 (int32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_s16 (int16x8_t)
+
+   * uint16x8_t vreinterpretq_u16_s8 (int8x16_t)
+
+   * uint16x8_t vreinterpretq_u16_u64 (uint64x2_t)
+
+   * uint16x8_t vreinterpretq_u16_s64 (int64x2_t)
+
+   * uint16x8_t vreinterpretq_u16_f32 (float32x4_t)
+
+   * uint16x8_t vreinterpretq_u16_p16 (poly16x8_t)
+
+   * uint16x8_t vreinterpretq_u16_p8 (poly8x16_t)
+
+   * uint32x2_t vreinterpret_u32_u16 (uint16x4_t)
+
+   * uint32x2_t vreinterpret_u32_u8 (uint8x8_t)
+
+   * uint32x2_t vreinterpret_u32_s32 (int32x2_t)
+
+   * uint32x2_t vreinterpret_u32_s16 (int16x4_t)
+
+   * uint32x2_t vreinterpret_u32_s8 (int8x8_t)
+
+   * uint32x2_t vreinterpret_u32_u64 (uint64x1_t)
+
+   * uint32x2_t vreinterpret_u32_s64 (int64x1_t)
+
+   * uint32x2_t vreinterpret_u32_f32 (float32x2_t)
+
+   * uint32x2_t vreinterpret_u32_p16 (poly16x4_t)
+
+   * uint32x2_t vreinterpret_u32_p8 (poly8x8_t)
+
+   * uint32x4_t vreinterpretq_u32_u16 (uint16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_u8 (uint8x16_t)
+
+   * uint32x4_t vreinterpretq_u32_s32 (int32x4_t)
+
+   * uint32x4_t vreinterpretq_u32_s16 (int16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_s8 (int8x16_t)
+
+   * uint32x4_t vreinterpretq_u32_u64 (uint64x2_t)
+
+   * uint32x4_t vreinterpretq_u32_s64 (int64x2_t)
+
+   * uint32x4_t vreinterpretq_u32_f32 (float32x4_t)
+
+   * uint32x4_t vreinterpretq_u32_p16 (poly16x8_t)
+
+   * uint32x4_t vreinterpretq_u32_p8 (poly8x16_t)
+
+
+File: gcc.info,  Node: Blackfin Built-in Functions,  Next: FR-V Built-in Functions,  Prev: ARM NEON Intrinsics,  Up: Target Builtins
+
+6.52.4 Blackfin Built-in Functions
+----------------------------------
+
+Currently, there are two Blackfin-specific built-in functions.  These
+are used for generating `CSYNC' and `SSYNC' machine insns without using
+inline assembly; by using these built-in functions the compiler can
+automatically add workarounds for hardware errata involving these
+instructions.  These functions are named as follows:
+
+     void __builtin_bfin_csync (void)
+     void __builtin_bfin_ssync (void)
+
+
+File: gcc.info,  Node: FR-V Built-in Functions,  Next: X86 Built-in Functions,  Prev: Blackfin Built-in Functions,  Up: Target Builtins
+
+6.52.5 FR-V Built-in Functions
+------------------------------
+
+GCC provides many FR-V-specific built-in functions.  In general, these
+functions are intended to be compatible with those described by `FR-V
+Family, Softune C/C++ Compiler Manual (V6), Fujitsu Semiconductor'.
+The two exceptions are `__MDUNPACKH' and `__MBTOHE', the gcc forms of
+which pass 128-bit values by pointer rather than by value.
+
+ Most of the functions are named after specific FR-V instructions.
+Such functions are said to be "directly mapped" and are summarized here
+in tabular form.
+
+* Menu:
+
+* Argument Types::
+* Directly-mapped Integer Functions::
+* Directly-mapped Media Functions::
+* Raw read/write Functions::
+* Other Built-in Functions::
+
+
+File: gcc.info,  Node: Argument Types,  Next: Directly-mapped Integer Functions,  Up: FR-V Built-in Functions
+
+6.52.5.1 Argument Types
+.......................
+
+The arguments to the built-in functions can be divided into three
+groups: register numbers, compile-time constants and run-time values.
+In order to make this classification clear at a glance, the arguments
+and return values are given the following pseudo types:
+
+Pseudo type    Real C type            Constant?   Description
+`uh'           `unsigned short'       No          an unsigned halfword
+`uw1'          `unsigned int'         No          an unsigned word
+`sw1'          `int'                  No          a signed word
+`uw2'          `unsigned long long'   No          an unsigned doubleword
+`sw2'          `long long'            No          a signed doubleword
+`const'        `int'                  Yes         an integer constant
+`acc'          `int'                  Yes         an ACC register number
+`iacc'         `int'                  Yes         an IACC register number
+
+ These pseudo types are not defined by GCC, they are simply a notational
+convenience used in this manual.
+
+ Arguments of type `uh', `uw1', `sw1', `uw2' and `sw2' are evaluated at
+run time.  They correspond to register operands in the underlying FR-V
+instructions.
+
+ `const' arguments represent immediate operands in the underlying FR-V
+instructions.  They must be compile-time constants.
+
+ `acc' arguments are evaluated at compile time and specify the number
+of an accumulator register.  For example, an `acc' argument of 2 will
+select the ACC2 register.
+
+ `iacc' arguments are similar to `acc' arguments but specify the number
+of an IACC register.  See *note Other Built-in Functions:: for more
+details.
+
+
+File: gcc.info,  Node: Directly-mapped Integer Functions,  Next: Directly-mapped Media Functions,  Prev: Argument Types,  Up: FR-V Built-in Functions
+
+6.52.5.2 Directly-mapped Integer Functions
+..........................................
+
+The functions listed below map directly to FR-V I-type instructions.
+
+Function prototype               Example usage           Assembly output
+`sw1 __ADDSS (sw1, sw1)'         `C = __ADDSS (A, B)'    `ADDSS A,B,C'
+`sw1 __SCAN (sw1, sw1)'          `C = __SCAN (A, B)'     `SCAN A,B,C'
+`sw1 __SCUTSS (sw1)'             `B = __SCUTSS (A)'      `SCUTSS A,B'
+`sw1 __SLASS (sw1, sw1)'         `C = __SLASS (A, B)'    `SLASS A,B,C'
+`void __SMASS (sw1, sw1)'        `__SMASS (A, B)'        `SMASS A,B'
+`void __SMSSS (sw1, sw1)'        `__SMSSS (A, B)'        `SMSSS A,B'
+`void __SMU (sw1, sw1)'          `__SMU (A, B)'          `SMU A,B'
+`sw2 __SMUL (sw1, sw1)'          `C = __SMUL (A, B)'     `SMUL A,B,C'
+`sw1 __SUBSS (sw1, sw1)'         `C = __SUBSS (A, B)'    `SUBSS A,B,C'
+`uw2 __UMUL (uw1, uw1)'          `C = __UMUL (A, B)'     `UMUL A,B,C'
+
+
+File: gcc.info,  Node: Directly-mapped Media Functions,  Next: Raw read/write Functions,  Prev: Directly-mapped Integer Functions,  Up: FR-V Built-in Functions
+
+6.52.5.3 Directly-mapped Media Functions
+........................................
+
+The functions listed below map directly to FR-V M-type instructions.
+
+Function prototype               Example usage           Assembly output
+`uw1 __MABSHS (sw1)'             `B = __MABSHS (A)'      `MABSHS A,B'
+`void __MADDACCS (acc, acc)'     `__MADDACCS (B, A)'     `MADDACCS A,B'
+`sw1 __MADDHSS (sw1, sw1)'       `C = __MADDHSS (A, B)'  `MADDHSS A,B,C'
+`uw1 __MADDHUS (uw1, uw1)'       `C = __MADDHUS (A, B)'  `MADDHUS A,B,C'
+`uw1 __MAND (uw1, uw1)'          `C = __MAND (A, B)'     `MAND A,B,C'
+`void __MASACCS (acc, acc)'      `__MASACCS (B, A)'      `MASACCS A,B'
+`uw1 __MAVEH (uw1, uw1)'         `C = __MAVEH (A, B)'    `MAVEH A,B,C'
+`uw2 __MBTOH (uw1)'              `B = __MBTOH (A)'       `MBTOH A,B'
+`void __MBTOHE (uw1 *, uw1)'     `__MBTOHE (&B, A)'      `MBTOHE A,B'
+`void __MCLRACC (acc)'           `__MCLRACC (A)'         `MCLRACC A'
+`void __MCLRACCA (void)'         `__MCLRACCA ()'         `MCLRACCA'
+`uw1 __Mcop1 (uw1, uw1)'         `C = __Mcop1 (A, B)'    `Mcop1 A,B,C'
+`uw1 __Mcop2 (uw1, uw1)'         `C = __Mcop2 (A, B)'    `Mcop2 A,B,C'
+`uw1 __MCPLHI (uw2, const)'      `C = __MCPLHI (A, B)'   `MCPLHI A,#B,C'
+`uw1 __MCPLI (uw2, const)'       `C = __MCPLI (A, B)'    `MCPLI A,#B,C'
+`void __MCPXIS (acc, sw1, sw1)'  `__MCPXIS (C, A, B)'    `MCPXIS A,B,C'
+`void __MCPXIU (acc, uw1, uw1)'  `__MCPXIU (C, A, B)'    `MCPXIU A,B,C'
+`void __MCPXRS (acc, sw1, sw1)'  `__MCPXRS (C, A, B)'    `MCPXRS A,B,C'
+`void __MCPXRU (acc, uw1, uw1)'  `__MCPXRU (C, A, B)'    `MCPXRU A,B,C'
+`uw1 __MCUT (acc, uw1)'          `C = __MCUT (A, B)'     `MCUT A,B,C'
+`uw1 __MCUTSS (acc, sw1)'        `C = __MCUTSS (A, B)'   `MCUTSS A,B,C'
+`void __MDADDACCS (acc, acc)'    `__MDADDACCS (B, A)'    `MDADDACCS A,B'
+`void __MDASACCS (acc, acc)'     `__MDASACCS (B, A)'     `MDASACCS A,B'
+`uw2 __MDCUTSSI (acc, const)'    `C = __MDCUTSSI (A, B)' `MDCUTSSI A,#B,C'
+`uw2 __MDPACKH (uw2, uw2)'       `C = __MDPACKH (A, B)'  `MDPACKH A,B,C'
+`uw2 __MDROTLI (uw2, const)'     `C = __MDROTLI (A, B)'  `MDROTLI A,#B,C'
+`void __MDSUBACCS (acc, acc)'    `__MDSUBACCS (B, A)'    `MDSUBACCS A,B'
+`void __MDUNPACKH (uw1 *, uw2)'  `__MDUNPACKH (&B, A)'   `MDUNPACKH A,B'
+`uw2 __MEXPDHD (uw1, const)'     `C = __MEXPDHD (A, B)'  `MEXPDHD A,#B,C'
+`uw1 __MEXPDHW (uw1, const)'     `C = __MEXPDHW (A, B)'  `MEXPDHW A,#B,C'
+`uw1 __MHDSETH (uw1, const)'     `C = __MHDSETH (A, B)'  `MHDSETH A,#B,C'
+`sw1 __MHDSETS (const)'          `B = __MHDSETS (A)'     `MHDSETS #A,B'
+`uw1 __MHSETHIH (uw1, const)'    `B = __MHSETHIH (B, A)' `MHSETHIH #A,B'
+`sw1 __MHSETHIS (sw1, const)'    `B = __MHSETHIS (B, A)' `MHSETHIS #A,B'
+`uw1 __MHSETLOH (uw1, const)'    `B = __MHSETLOH (B, A)' `MHSETLOH #A,B'
+`sw1 __MHSETLOS (sw1, const)'    `B = __MHSETLOS (B, A)' `MHSETLOS #A,B'
+`uw1 __MHTOB (uw2)'              `B = __MHTOB (A)'       `MHTOB A,B'
+`void __MMACHS (acc, sw1, sw1)'  `__MMACHS (C, A, B)'    `MMACHS A,B,C'
+`void __MMACHU (acc, uw1, uw1)'  `__MMACHU (C, A, B)'    `MMACHU A,B,C'
+`void __MMRDHS (acc, sw1, sw1)'  `__MMRDHS (C, A, B)'    `MMRDHS A,B,C'
+`void __MMRDHU (acc, uw1, uw1)'  `__MMRDHU (C, A, B)'    `MMRDHU A,B,C'
+`void __MMULHS (acc, sw1, sw1)'  `__MMULHS (C, A, B)'    `MMULHS A,B,C'
+`void __MMULHU (acc, uw1, uw1)'  `__MMULHU (C, A, B)'    `MMULHU A,B,C'
+`void __MMULXHS (acc, sw1, sw1)' `__MMULXHS (C, A, B)'   `MMULXHS A,B,C'
+`void __MMULXHU (acc, uw1, uw1)' `__MMULXHU (C, A, B)'   `MMULXHU A,B,C'
+`uw1 __MNOT (uw1)'               `B = __MNOT (A)'        `MNOT A,B'
+`uw1 __MOR (uw1, uw1)'           `C = __MOR (A, B)'      `MOR A,B,C'
+`uw1 __MPACKH (uh, uh)'          `C = __MPACKH (A, B)'   `MPACKH A,B,C'
+`sw2 __MQADDHSS (sw2, sw2)'      `C = __MQADDHSS (A, B)' `MQADDHSS A,B,C'
+`uw2 __MQADDHUS (uw2, uw2)'      `C = __MQADDHUS (A, B)' `MQADDHUS A,B,C'
+`void __MQCPXIS (acc, sw2, sw2)' `__MQCPXIS (C, A, B)'   `MQCPXIS A,B,C'
+`void __MQCPXIU (acc, uw2, uw2)' `__MQCPXIU (C, A, B)'   `MQCPXIU A,B,C'
+`void __MQCPXRS (acc, sw2, sw2)' `__MQCPXRS (C, A, B)'   `MQCPXRS A,B,C'
+`void __MQCPXRU (acc, uw2, uw2)' `__MQCPXRU (C, A, B)'   `MQCPXRU A,B,C'
+`sw2 __MQLCLRHS (sw2, sw2)'      `C = __MQLCLRHS (A, B)' `MQLCLRHS A,B,C'
+`sw2 __MQLMTHS (sw2, sw2)'       `C = __MQLMTHS (A, B)'  `MQLMTHS A,B,C'
+`void __MQMACHS (acc, sw2, sw2)' `__MQMACHS (C, A, B)'   `MQMACHS A,B,C'
+`void __MQMACHU (acc, uw2, uw2)' `__MQMACHU (C, A, B)'   `MQMACHU A,B,C'
+`void __MQMACXHS (acc, sw2,      `__MQMACXHS (C, A, B)'  `MQMACXHS A,B,C'
+sw2)'                                                    
+`void __MQMULHS (acc, sw2, sw2)' `__MQMULHS (C, A, B)'   `MQMULHS A,B,C'
+`void __MQMULHU (acc, uw2, uw2)' `__MQMULHU (C, A, B)'   `MQMULHU A,B,C'
+`void __MQMULXHS (acc, sw2,      `__MQMULXHS (C, A, B)'  `MQMULXHS A,B,C'
+sw2)'                                                    
+`void __MQMULXHU (acc, uw2,      `__MQMULXHU (C, A, B)'  `MQMULXHU A,B,C'
+uw2)'                                                    
+`sw2 __MQSATHS (sw2, sw2)'       `C = __MQSATHS (A, B)'  `MQSATHS A,B,C'
+`uw2 __MQSLLHI (uw2, int)'       `C = __MQSLLHI (A, B)'  `MQSLLHI A,B,C'
+`sw2 __MQSRAHI (sw2, int)'       `C = __MQSRAHI (A, B)'  `MQSRAHI A,B,C'
+`sw2 __MQSUBHSS (sw2, sw2)'      `C = __MQSUBHSS (A, B)' `MQSUBHSS A,B,C'
+`uw2 __MQSUBHUS (uw2, uw2)'      `C = __MQSUBHUS (A, B)' `MQSUBHUS A,B,C'
+`void __MQXMACHS (acc, sw2,      `__MQXMACHS (C, A, B)'  `MQXMACHS A,B,C'
+sw2)'                                                    
+`void __MQXMACXHS (acc, sw2,     `__MQXMACXHS (C, A, B)' `MQXMACXHS A,B,C'
+sw2)'                                                    
+`uw1 __MRDACC (acc)'             `B = __MRDACC (A)'      `MRDACC A,B'
+`uw1 __MRDACCG (acc)'            `B = __MRDACCG (A)'     `MRDACCG A,B'
+`uw1 __MROTLI (uw1, const)'      `C = __MROTLI (A, B)'   `MROTLI A,#B,C'
+`uw1 __MROTRI (uw1, const)'      `C = __MROTRI (A, B)'   `MROTRI A,#B,C'
+`sw1 __MSATHS (sw1, sw1)'        `C = __MSATHS (A, B)'   `MSATHS A,B,C'
+`uw1 __MSATHU (uw1, uw1)'        `C = __MSATHU (A, B)'   `MSATHU A,B,C'
+`uw1 __MSLLHI (uw1, const)'      `C = __MSLLHI (A, B)'   `MSLLHI A,#B,C'
+`sw1 __MSRAHI (sw1, const)'      `C = __MSRAHI (A, B)'   `MSRAHI A,#B,C'
+`uw1 __MSRLHI (uw1, const)'      `C = __MSRLHI (A, B)'   `MSRLHI A,#B,C'
+`void __MSUBACCS (acc, acc)'     `__MSUBACCS (B, A)'     `MSUBACCS A,B'
+`sw1 __MSUBHSS (sw1, sw1)'       `C = __MSUBHSS (A, B)'  `MSUBHSS A,B,C'
+`uw1 __MSUBHUS (uw1, uw1)'       `C = __MSUBHUS (A, B)'  `MSUBHUS A,B,C'
+`void __MTRAP (void)'            `__MTRAP ()'            `MTRAP'
+`uw2 __MUNPACKH (uw1)'           `B = __MUNPACKH (A)'    `MUNPACKH A,B'
+`uw1 __MWCUT (uw2, uw1)'         `C = __MWCUT (A, B)'    `MWCUT A,B,C'
+`void __MWTACC (acc, uw1)'       `__MWTACC (B, A)'       `MWTACC A,B'
+`void __MWTACCG (acc, uw1)'      `__MWTACCG (B, A)'      `MWTACCG A,B'
+`uw1 __MXOR (uw1, uw1)'          `C = __MXOR (A, B)'     `MXOR A,B,C'
+
+
+File: gcc.info,  Node: Raw read/write Functions,  Next: Other Built-in Functions,  Prev: Directly-mapped Media Functions,  Up: FR-V Built-in Functions
+
+6.52.5.4 Raw read/write Functions
+.................................
+
+This sections describes built-in functions related to read and write
+instructions to access memory.  These functions generate `membar'
+instructions to flush the I/O load and stores where appropriate, as
+described in Fujitsu's manual described above.
+
+`unsigned char __builtin_read8 (void *DATA)'
+
+`unsigned short __builtin_read16 (void *DATA)'
+
+`unsigned long __builtin_read32 (void *DATA)'
+
+`unsigned long long __builtin_read64 (void *DATA)'
+
+`void __builtin_write8 (void *DATA, unsigned char DATUM)'
+
+`void __builtin_write16 (void *DATA, unsigned short DATUM)'
+
+`void __builtin_write32 (void *DATA, unsigned long DATUM)'
+
+`void __builtin_write64 (void *DATA, unsigned long long DATUM)'
+
+
+File: gcc.info,  Node: Other Built-in Functions,  Prev: Raw read/write Functions,  Up: FR-V Built-in Functions
+
+6.52.5.5 Other Built-in Functions
+.................................
+
+This section describes built-in functions that are not named after a
+specific FR-V instruction.
+
+`sw2 __IACCreadll (iacc REG)'
+     Return the full 64-bit value of IACC0.  The REG argument is
+     reserved for future expansion and must be 0.
+
+`sw1 __IACCreadl (iacc REG)'
+     Return the value of IACC0H if REG is 0 and IACC0L if REG is 1.
+     Other values of REG are rejected as invalid.
+
+`void __IACCsetll (iacc REG, sw2 X)'
+     Set the full 64-bit value of IACC0 to X.  The REG argument is
+     reserved for future expansion and must be 0.
+
+`void __IACCsetl (iacc REG, sw1 X)'
+     Set IACC0H to X if REG is 0 and IACC0L to X if REG is 1.  Other
+     values of REG are rejected as invalid.
+
+`void __data_prefetch0 (const void *X)'
+     Use the `dcpl' instruction to load the contents of address X into
+     the data cache.
+
+`void __data_prefetch (const void *X)'
+     Use the `nldub' instruction to load the contents of address X into
+     the data cache.  The instruction will be issued in slot I1.
+
+
+File: gcc.info,  Node: X86 Built-in Functions,  Next: MIPS DSP Built-in Functions,  Prev: FR-V Built-in Functions,  Up: Target Builtins
+
+6.52.6 X86 Built-in Functions
+-----------------------------
+
+These built-in functions are available for the i386 and x86-64 family
+of computers, depending on the command-line switches used.
+
+ Note that, if you specify command-line switches such as `-msse', the
+compiler could use the extended instruction sets even if the built-ins
+are not used explicitly in the program.  For this reason, applications
+which perform runtime CPU detection must compile separate files for each
+supported architecture, using the appropriate flags.  In particular,
+the file containing the CPU detection code should be compiled without
+these options.
+
+ The following machine modes are available for use with MMX built-in
+functions (*note Vector Extensions::): `V2SI' for a vector of two
+32-bit integers, `V4HI' for a vector of four 16-bit integers, and
+`V8QI' for a vector of eight 8-bit integers.  Some of the built-in
+functions operate on MMX registers as a whole 64-bit entity, these use
+`V1DI' as their mode.
+
+ If 3DNow! extensions are enabled, `V2SF' is used as a mode for a vector
+of two 32-bit floating point values.
+
+ If SSE extensions are enabled, `V4SF' is used for a vector of four
+32-bit floating point values.  Some instructions use a vector of four
+32-bit integers, these use `V4SI'.  Finally, some instructions operate
+on an entire vector register, interpreting it as a 128-bit integer,
+these use mode `TI'.
+
+ In 64-bit mode, the x86-64 family of processors uses additional
+built-in functions for efficient use of `TF' (`__float128') 128-bit
+floating point and `TC' 128-bit complex floating point values.
+
+ The following floating point built-in functions are available in 64-bit
+mode.  All of them implement the function that is part of the name.
+
+     __float128 __builtin_fabsq (__float128)
+     __float128 __builtin_copysignq (__float128, __float128)
+
+ The following floating point built-in functions are made available in
+the 64-bit mode.
+
+`__float128 __builtin_infq (void)'
+     Similar to `__builtin_inf', except the return type is `__float128'.  
+
+`__float128 __builtin_huge_valq (void)'
+     Similar to `__builtin_huge_val', except the return type is
+     `__float128'.  
+
+ The following built-in functions are made available by `-mmmx'.  All
+of them generate the machine instruction that is part of the name.
+
+     v8qi __builtin_ia32_paddb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddw (v4hi, v4hi)
+     v2si __builtin_ia32_paddd (v2si, v2si)
+     v8qi __builtin_ia32_psubb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubw (v4hi, v4hi)
+     v2si __builtin_ia32_psubd (v2si, v2si)
+     v8qi __builtin_ia32_paddsb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddsw (v4hi, v4hi)
+     v8qi __builtin_ia32_psubsb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubsw (v4hi, v4hi)
+     v8qi __builtin_ia32_paddusb (v8qi, v8qi)
+     v4hi __builtin_ia32_paddusw (v4hi, v4hi)
+     v8qi __builtin_ia32_psubusb (v8qi, v8qi)
+     v4hi __builtin_ia32_psubusw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmullw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmulhw (v4hi, v4hi)
+     di __builtin_ia32_pand (di, di)
+     di __builtin_ia32_pandn (di,di)
+     di __builtin_ia32_por (di, di)
+     di __builtin_ia32_pxor (di, di)
+     v8qi __builtin_ia32_pcmpeqb (v8qi, v8qi)
+     v4hi __builtin_ia32_pcmpeqw (v4hi, v4hi)
+     v2si __builtin_ia32_pcmpeqd (v2si, v2si)
+     v8qi __builtin_ia32_pcmpgtb (v8qi, v8qi)
+     v4hi __builtin_ia32_pcmpgtw (v4hi, v4hi)
+     v2si __builtin_ia32_pcmpgtd (v2si, v2si)
+     v8qi __builtin_ia32_punpckhbw (v8qi, v8qi)
+     v4hi __builtin_ia32_punpckhwd (v4hi, v4hi)
+     v2si __builtin_ia32_punpckhdq (v2si, v2si)
+     v8qi __builtin_ia32_punpcklbw (v8qi, v8qi)
+     v4hi __builtin_ia32_punpcklwd (v4hi, v4hi)
+     v2si __builtin_ia32_punpckldq (v2si, v2si)
+     v8qi __builtin_ia32_packsswb (v4hi, v4hi)
+     v4hi __builtin_ia32_packssdw (v2si, v2si)
+     v8qi __builtin_ia32_packuswb (v4hi, v4hi)
+
+     v4hi __builtin_ia32_psllw (v4hi, v4hi)
+     v2si __builtin_ia32_pslld (v2si, v2si)
+     v1di __builtin_ia32_psllq (v1di, v1di)
+     v4hi __builtin_ia32_psrlw (v4hi, v4hi)
+     v2si __builtin_ia32_psrld (v2si, v2si)
+     v1di __builtin_ia32_psrlq (v1di, v1di)
+     v4hi __builtin_ia32_psraw (v4hi, v4hi)
+     v2si __builtin_ia32_psrad (v2si, v2si)
+     v4hi __builtin_ia32_psllwi (v4hi, int)
+     v2si __builtin_ia32_pslldi (v2si, int)
+     v1di __builtin_ia32_psllqi (v1di, int)
+     v4hi __builtin_ia32_psrlwi (v4hi, int)
+     v2si __builtin_ia32_psrldi (v2si, int)
+     v1di __builtin_ia32_psrlqi (v1di, int)
+     v4hi __builtin_ia32_psrawi (v4hi, int)
+     v2si __builtin_ia32_psradi (v2si, int)
+
+ The following built-in functions are made available either with
+`-msse', or with a combination of `-m3dnow' and `-march=athlon'.  All
+of them generate the machine instruction that is part of the name.
+
+     v4hi __builtin_ia32_pmulhuw (v4hi, v4hi)
+     v8qi __builtin_ia32_pavgb (v8qi, v8qi)
+     v4hi __builtin_ia32_pavgw (v4hi, v4hi)
+     v1di __builtin_ia32_psadbw (v8qi, v8qi)
+     v8qi __builtin_ia32_pmaxub (v8qi, v8qi)
+     v4hi __builtin_ia32_pmaxsw (v4hi, v4hi)
+     v8qi __builtin_ia32_pminub (v8qi, v8qi)
+     v4hi __builtin_ia32_pminsw (v4hi, v4hi)
+     int __builtin_ia32_pextrw (v4hi, int)
+     v4hi __builtin_ia32_pinsrw (v4hi, int, int)
+     int __builtin_ia32_pmovmskb (v8qi)
+     void __builtin_ia32_maskmovq (v8qi, v8qi, char *)
+     void __builtin_ia32_movntq (di *, di)
+     void __builtin_ia32_sfence (void)
+
+ The following built-in functions are available when `-msse' is used.
+All of them generate the machine instruction that is part of the name.
+
+     int __builtin_ia32_comieq (v4sf, v4sf)
+     int __builtin_ia32_comineq (v4sf, v4sf)
+     int __builtin_ia32_comilt (v4sf, v4sf)
+     int __builtin_ia32_comile (v4sf, v4sf)
+     int __builtin_ia32_comigt (v4sf, v4sf)
+     int __builtin_ia32_comige (v4sf, v4sf)
+     int __builtin_ia32_ucomieq (v4sf, v4sf)
+     int __builtin_ia32_ucomineq (v4sf, v4sf)
+     int __builtin_ia32_ucomilt (v4sf, v4sf)
+     int __builtin_ia32_ucomile (v4sf, v4sf)
+     int __builtin_ia32_ucomigt (v4sf, v4sf)
+     int __builtin_ia32_ucomige (v4sf, v4sf)
+     v4sf __builtin_ia32_addps (v4sf, v4sf)
+     v4sf __builtin_ia32_subps (v4sf, v4sf)
+     v4sf __builtin_ia32_mulps (v4sf, v4sf)
+     v4sf __builtin_ia32_divps (v4sf, v4sf)
+     v4sf __builtin_ia32_addss (v4sf, v4sf)
+     v4sf __builtin_ia32_subss (v4sf, v4sf)
+     v4sf __builtin_ia32_mulss (v4sf, v4sf)
+     v4sf __builtin_ia32_divss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpeqps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpltps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpleps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpgtps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpgeps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpunordps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpneqps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnltps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnleps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpngtps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpngeps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpordps (v4sf, v4sf)
+     v4si __builtin_ia32_cmpeqss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpltss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpless (v4sf, v4sf)
+     v4si __builtin_ia32_cmpunordss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpneqss (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnlts (v4sf, v4sf)
+     v4si __builtin_ia32_cmpnless (v4sf, v4sf)
+     v4si __builtin_ia32_cmpordss (v4sf, v4sf)
+     v4sf __builtin_ia32_maxps (v4sf, v4sf)
+     v4sf __builtin_ia32_maxss (v4sf, v4sf)
+     v4sf __builtin_ia32_minps (v4sf, v4sf)
+     v4sf __builtin_ia32_minss (v4sf, v4sf)
+     v4sf __builtin_ia32_andps (v4sf, v4sf)
+     v4sf __builtin_ia32_andnps (v4sf, v4sf)
+     v4sf __builtin_ia32_orps (v4sf, v4sf)
+     v4sf __builtin_ia32_xorps (v4sf, v4sf)
+     v4sf __builtin_ia32_movss (v4sf, v4sf)
+     v4sf __builtin_ia32_movhlps (v4sf, v4sf)
+     v4sf __builtin_ia32_movlhps (v4sf, v4sf)
+     v4sf __builtin_ia32_unpckhps (v4sf, v4sf)
+     v4sf __builtin_ia32_unpcklps (v4sf, v4sf)
+     v4sf __builtin_ia32_cvtpi2ps (v4sf, v2si)
+     v4sf __builtin_ia32_cvtsi2ss (v4sf, int)
+     v2si __builtin_ia32_cvtps2pi (v4sf)
+     int __builtin_ia32_cvtss2si (v4sf)
+     v2si __builtin_ia32_cvttps2pi (v4sf)
+     int __builtin_ia32_cvttss2si (v4sf)
+     v4sf __builtin_ia32_rcpps (v4sf)
+     v4sf __builtin_ia32_rsqrtps (v4sf)
+     v4sf __builtin_ia32_sqrtps (v4sf)
+     v4sf __builtin_ia32_rcpss (v4sf)
+     v4sf __builtin_ia32_rsqrtss (v4sf)
+     v4sf __builtin_ia32_sqrtss (v4sf)
+     v4sf __builtin_ia32_shufps (v4sf, v4sf, int)
+     void __builtin_ia32_movntps (float *, v4sf)
+     int __builtin_ia32_movmskps (v4sf)
+
+ The following built-in functions are available when `-msse' is used.
+
+`v4sf __builtin_ia32_loadaps (float *)'
+     Generates the `movaps' machine instruction as a load from memory.
+
+`void __builtin_ia32_storeaps (float *, v4sf)'
+     Generates the `movaps' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadups (float *)'
+     Generates the `movups' machine instruction as a load from memory.
+
+`void __builtin_ia32_storeups (float *, v4sf)'
+     Generates the `movups' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadsss (float *)'
+     Generates the `movss' machine instruction as a load from memory.
+
+`void __builtin_ia32_storess (float *, v4sf)'
+     Generates the `movss' machine instruction as a store to memory.
+
+`v4sf __builtin_ia32_loadhps (v4sf, const v2sf *)'
+     Generates the `movhps' machine instruction as a load from memory.
+
+`v4sf __builtin_ia32_loadlps (v4sf, const v2sf *)'
+     Generates the `movlps' machine instruction as a load from memory
+
+`void __builtin_ia32_storehps (v2sf *, v4sf)'
+     Generates the `movhps' machine instruction as a store to memory.
+
+`void __builtin_ia32_storelps (v2sf *, v4sf)'
+     Generates the `movlps' machine instruction as a store to memory.
+
+ The following built-in functions are available when `-msse2' is used.
+All of them generate the machine instruction that is part of the name.
+
+     int __builtin_ia32_comisdeq (v2df, v2df)
+     int __builtin_ia32_comisdlt (v2df, v2df)
+     int __builtin_ia32_comisdle (v2df, v2df)
+     int __builtin_ia32_comisdgt (v2df, v2df)
+     int __builtin_ia32_comisdge (v2df, v2df)
+     int __builtin_ia32_comisdneq (v2df, v2df)
+     int __builtin_ia32_ucomisdeq (v2df, v2df)
+     int __builtin_ia32_ucomisdlt (v2df, v2df)
+     int __builtin_ia32_ucomisdle (v2df, v2df)
+     int __builtin_ia32_ucomisdgt (v2df, v2df)
+     int __builtin_ia32_ucomisdge (v2df, v2df)
+     int __builtin_ia32_ucomisdneq (v2df, v2df)
+     v2df __builtin_ia32_cmpeqpd (v2df, v2df)
+     v2df __builtin_ia32_cmpltpd (v2df, v2df)
+     v2df __builtin_ia32_cmplepd (v2df, v2df)
+     v2df __builtin_ia32_cmpgtpd (v2df, v2df)
+     v2df __builtin_ia32_cmpgepd (v2df, v2df)
+     v2df __builtin_ia32_cmpunordpd (v2df, v2df)
+     v2df __builtin_ia32_cmpneqpd (v2df, v2df)
+     v2df __builtin_ia32_cmpnltpd (v2df, v2df)
+     v2df __builtin_ia32_cmpnlepd (v2df, v2df)
+     v2df __builtin_ia32_cmpngtpd (v2df, v2df)
+     v2df __builtin_ia32_cmpngepd (v2df, v2df)
+     v2df __builtin_ia32_cmpordpd (v2df, v2df)
+     v2df __builtin_ia32_cmpeqsd (v2df, v2df)
+     v2df __builtin_ia32_cmpltsd (v2df, v2df)
+     v2df __builtin_ia32_cmplesd (v2df, v2df)
+     v2df __builtin_ia32_cmpunordsd (v2df, v2df)
+     v2df __builtin_ia32_cmpneqsd (v2df, v2df)
+     v2df __builtin_ia32_cmpnltsd (v2df, v2df)
+     v2df __builtin_ia32_cmpnlesd (v2df, v2df)
+     v2df __builtin_ia32_cmpordsd (v2df, v2df)
+     v2di __builtin_ia32_paddq (v2di, v2di)
+     v2di __builtin_ia32_psubq (v2di, v2di)
+     v2df __builtin_ia32_addpd (v2df, v2df)
+     v2df __builtin_ia32_subpd (v2df, v2df)
+     v2df __builtin_ia32_mulpd (v2df, v2df)
+     v2df __builtin_ia32_divpd (v2df, v2df)
+     v2df __builtin_ia32_addsd (v2df, v2df)
+     v2df __builtin_ia32_subsd (v2df, v2df)
+     v2df __builtin_ia32_mulsd (v2df, v2df)
+     v2df __builtin_ia32_divsd (v2df, v2df)
+     v2df __builtin_ia32_minpd (v2df, v2df)
+     v2df __builtin_ia32_maxpd (v2df, v2df)
+     v2df __builtin_ia32_minsd (v2df, v2df)
+     v2df __builtin_ia32_maxsd (v2df, v2df)
+     v2df __builtin_ia32_andpd (v2df, v2df)
+     v2df __builtin_ia32_andnpd (v2df, v2df)
+     v2df __builtin_ia32_orpd (v2df, v2df)
+     v2df __builtin_ia32_xorpd (v2df, v2df)
+     v2df __builtin_ia32_movsd (v2df, v2df)
+     v2df __builtin_ia32_unpckhpd (v2df, v2df)
+     v2df __builtin_ia32_unpcklpd (v2df, v2df)
+     v16qi __builtin_ia32_paddb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_paddw128 (v8hi, v8hi)
+     v4si __builtin_ia32_paddd128 (v4si, v4si)
+     v2di __builtin_ia32_paddq128 (v2di, v2di)
+     v16qi __builtin_ia32_psubb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_psubw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psubd128 (v4si, v4si)
+     v2di __builtin_ia32_psubq128 (v2di, v2di)
+     v8hi __builtin_ia32_pmullw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmulhw128 (v8hi, v8hi)
+     v2di __builtin_ia32_pand128 (v2di, v2di)
+     v2di __builtin_ia32_pandn128 (v2di, v2di)
+     v2di __builtin_ia32_por128 (v2di, v2di)
+     v2di __builtin_ia32_pxor128 (v2di, v2di)
+     v16qi __builtin_ia32_pavgb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pavgw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pcmpeqb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pcmpeqw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pcmpeqd128 (v4si, v4si)
+     v16qi __builtin_ia32_pcmpgtb128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pcmpgtw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pcmpgtd128 (v4si, v4si)
+     v16qi __builtin_ia32_pmaxub128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pmaxsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pminub128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pminsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_punpckhbw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_punpckhwd128 (v8hi, v8hi)
+     v4si __builtin_ia32_punpckhdq128 (v4si, v4si)
+     v2di __builtin_ia32_punpckhqdq128 (v2di, v2di)
+     v16qi __builtin_ia32_punpcklbw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_punpcklwd128 (v8hi, v8hi)
+     v4si __builtin_ia32_punpckldq128 (v4si, v4si)
+     v2di __builtin_ia32_punpcklqdq128 (v2di, v2di)
+     v16qi __builtin_ia32_packsswb128 (v8hi, v8hi)
+     v8hi __builtin_ia32_packssdw128 (v4si, v4si)
+     v16qi __builtin_ia32_packuswb128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmulhuw128 (v8hi, v8hi)
+     void __builtin_ia32_maskmovdqu (v16qi, v16qi)
+     v2df __builtin_ia32_loadupd (double *)
+     void __builtin_ia32_storeupd (double *, v2df)
+     v2df __builtin_ia32_loadhpd (v2df, double const *)
+     v2df __builtin_ia32_loadlpd (v2df, double const *)
+     int __builtin_ia32_movmskpd (v2df)
+     int __builtin_ia32_pmovmskb128 (v16qi)
+     void __builtin_ia32_movnti (int *, int)
+     void __builtin_ia32_movntpd (double *, v2df)
+     void __builtin_ia32_movntdq (v2df *, v2df)
+     v4si __builtin_ia32_pshufd (v4si, int)
+     v8hi __builtin_ia32_pshuflw (v8hi, int)
+     v8hi __builtin_ia32_pshufhw (v8hi, int)
+     v2di __builtin_ia32_psadbw128 (v16qi, v16qi)
+     v2df __builtin_ia32_sqrtpd (v2df)
+     v2df __builtin_ia32_sqrtsd (v2df)
+     v2df __builtin_ia32_shufpd (v2df, v2df, int)
+     v2df __builtin_ia32_cvtdq2pd (v4si)
+     v4sf __builtin_ia32_cvtdq2ps (v4si)
+     v4si __builtin_ia32_cvtpd2dq (v2df)
+     v2si __builtin_ia32_cvtpd2pi (v2df)
+     v4sf __builtin_ia32_cvtpd2ps (v2df)
+     v4si __builtin_ia32_cvttpd2dq (v2df)
+     v2si __builtin_ia32_cvttpd2pi (v2df)
+     v2df __builtin_ia32_cvtpi2pd (v2si)
+     int __builtin_ia32_cvtsd2si (v2df)
+     int __builtin_ia32_cvttsd2si (v2df)
+     long long __builtin_ia32_cvtsd2si64 (v2df)
+     long long __builtin_ia32_cvttsd2si64 (v2df)
+     v4si __builtin_ia32_cvtps2dq (v4sf)
+     v2df __builtin_ia32_cvtps2pd (v4sf)
+     v4si __builtin_ia32_cvttps2dq (v4sf)
+     v2df __builtin_ia32_cvtsi2sd (v2df, int)
+     v2df __builtin_ia32_cvtsi642sd (v2df, long long)
+     v4sf __builtin_ia32_cvtsd2ss (v4sf, v2df)
+     v2df __builtin_ia32_cvtss2sd (v2df, v4sf)
+     void __builtin_ia32_clflush (const void *)
+     void __builtin_ia32_lfence (void)
+     void __builtin_ia32_mfence (void)
+     v16qi __builtin_ia32_loaddqu (const char *)
+     void __builtin_ia32_storedqu (char *, v16qi)
+     v1di __builtin_ia32_pmuludq (v2si, v2si)
+     v2di __builtin_ia32_pmuludq128 (v4si, v4si)
+     v8hi __builtin_ia32_psllw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pslld128 (v4si, v4si)
+     v2di __builtin_ia32_psllq128 (v2di, v2di)
+     v8hi __builtin_ia32_psrlw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psrld128 (v4si, v4si)
+     v2di __builtin_ia32_psrlq128 (v2di, v2di)
+     v8hi __builtin_ia32_psraw128 (v8hi, v8hi)
+     v4si __builtin_ia32_psrad128 (v4si, v4si)
+     v2di __builtin_ia32_pslldqi128 (v2di, int)
+     v8hi __builtin_ia32_psllwi128 (v8hi, int)
+     v4si __builtin_ia32_pslldi128 (v4si, int)
+     v2di __builtin_ia32_psllqi128 (v2di, int)
+     v2di __builtin_ia32_psrldqi128 (v2di, int)
+     v8hi __builtin_ia32_psrlwi128 (v8hi, int)
+     v4si __builtin_ia32_psrldi128 (v4si, int)
+     v2di __builtin_ia32_psrlqi128 (v2di, int)
+     v8hi __builtin_ia32_psrawi128 (v8hi, int)
+     v4si __builtin_ia32_psradi128 (v4si, int)
+     v4si __builtin_ia32_pmaddwd128 (v8hi, v8hi)
+     v2di __builtin_ia32_movq128 (v2di)
+
+ The following built-in functions are available when `-msse3' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v2df __builtin_ia32_addsubpd (v2df, v2df)
+     v4sf __builtin_ia32_addsubps (v4sf, v4sf)
+     v2df __builtin_ia32_haddpd (v2df, v2df)
+     v4sf __builtin_ia32_haddps (v4sf, v4sf)
+     v2df __builtin_ia32_hsubpd (v2df, v2df)
+     v4sf __builtin_ia32_hsubps (v4sf, v4sf)
+     v16qi __builtin_ia32_lddqu (char const *)
+     void __builtin_ia32_monitor (void *, unsigned int, unsigned int)
+     v2df __builtin_ia32_movddup (v2df)
+     v4sf __builtin_ia32_movshdup (v4sf)
+     v4sf __builtin_ia32_movsldup (v4sf)
+     void __builtin_ia32_mwait (unsigned int, unsigned int)
+
+ The following built-in functions are available when `-msse3' is used.
+
+`v2df __builtin_ia32_loadddup (double const *)'
+     Generates the `movddup' machine instruction as a load from memory.
+
+ The following built-in functions are available when `-mssse3' is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+     v2si __builtin_ia32_phaddd (v2si, v2si)
+     v4hi __builtin_ia32_phaddw (v4hi, v4hi)
+     v4hi __builtin_ia32_phaddsw (v4hi, v4hi)
+     v2si __builtin_ia32_phsubd (v2si, v2si)
+     v4hi __builtin_ia32_phsubw (v4hi, v4hi)
+     v4hi __builtin_ia32_phsubsw (v4hi, v4hi)
+     v4hi __builtin_ia32_pmaddubsw (v8qi, v8qi)
+     v4hi __builtin_ia32_pmulhrsw (v4hi, v4hi)
+     v8qi __builtin_ia32_pshufb (v8qi, v8qi)
+     v8qi __builtin_ia32_psignb (v8qi, v8qi)
+     v2si __builtin_ia32_psignd (v2si, v2si)
+     v4hi __builtin_ia32_psignw (v4hi, v4hi)
+     v1di __builtin_ia32_palignr (v1di, v1di, int)
+     v8qi __builtin_ia32_pabsb (v8qi)
+     v2si __builtin_ia32_pabsd (v2si)
+     v4hi __builtin_ia32_pabsw (v4hi)
+
+ The following built-in functions are available when `-mssse3' is used.
+All of them generate the machine instruction that is part of the name
+with SSE registers.
+
+     v4si __builtin_ia32_phaddd128 (v4si, v4si)
+     v8hi __builtin_ia32_phaddw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_phaddsw128 (v8hi, v8hi)
+     v4si __builtin_ia32_phsubd128 (v4si, v4si)
+     v8hi __builtin_ia32_phsubw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_phsubsw128 (v8hi, v8hi)
+     v8hi __builtin_ia32_pmaddubsw128 (v16qi, v16qi)
+     v8hi __builtin_ia32_pmulhrsw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pshufb128 (v16qi, v16qi)
+     v16qi __builtin_ia32_psignb128 (v16qi, v16qi)
+     v4si __builtin_ia32_psignd128 (v4si, v4si)
+     v8hi __builtin_ia32_psignw128 (v8hi, v8hi)
+     v2di __builtin_ia32_palignr128 (v2di, v2di, int)
+     v16qi __builtin_ia32_pabsb128 (v16qi)
+     v4si __builtin_ia32_pabsd128 (v4si)
+     v8hi __builtin_ia32_pabsw128 (v8hi)
+
+ The following built-in functions are available when `-msse4.1' is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+     v2df __builtin_ia32_blendpd (v2df, v2df, const int)
+     v4sf __builtin_ia32_blendps (v4sf, v4sf, const int)
+     v2df __builtin_ia32_blendvpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_blendvps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_dppd (v2df, v2df, const int)
+     v4sf __builtin_ia32_dpps (v4sf, v4sf, const int)
+     v4sf __builtin_ia32_insertps128 (v4sf, v4sf, const int)
+     v2di __builtin_ia32_movntdqa (v2di *);
+     v16qi __builtin_ia32_mpsadbw128 (v16qi, v16qi, const int)
+     v8hi __builtin_ia32_packusdw128 (v4si, v4si)
+     v16qi __builtin_ia32_pblendvb128 (v16qi, v16qi, v16qi)
+     v8hi __builtin_ia32_pblendw128 (v8hi, v8hi, const int)
+     v2di __builtin_ia32_pcmpeqq (v2di, v2di)
+     v8hi __builtin_ia32_phminposuw128 (v8hi)
+     v16qi __builtin_ia32_pmaxsb128 (v16qi, v16qi)
+     v4si __builtin_ia32_pmaxsd128 (v4si, v4si)
+     v4si __builtin_ia32_pmaxud128 (v4si, v4si)
+     v8hi __builtin_ia32_pmaxuw128 (v8hi, v8hi)
+     v16qi __builtin_ia32_pminsb128 (v16qi, v16qi)
+     v4si __builtin_ia32_pminsd128 (v4si, v4si)
+     v4si __builtin_ia32_pminud128 (v4si, v4si)
+     v8hi __builtin_ia32_pminuw128 (v8hi, v8hi)
+     v4si __builtin_ia32_pmovsxbd128 (v16qi)
+     v2di __builtin_ia32_pmovsxbq128 (v16qi)
+     v8hi __builtin_ia32_pmovsxbw128 (v16qi)
+     v2di __builtin_ia32_pmovsxdq128 (v4si)
+     v4si __builtin_ia32_pmovsxwd128 (v8hi)
+     v2di __builtin_ia32_pmovsxwq128 (v8hi)
+     v4si __builtin_ia32_pmovzxbd128 (v16qi)
+     v2di __builtin_ia32_pmovzxbq128 (v16qi)
+     v8hi __builtin_ia32_pmovzxbw128 (v16qi)
+     v2di __builtin_ia32_pmovzxdq128 (v4si)
+     v4si __builtin_ia32_pmovzxwd128 (v8hi)
+     v2di __builtin_ia32_pmovzxwq128 (v8hi)
+     v2di __builtin_ia32_pmuldq128 (v4si, v4si)
+     v4si __builtin_ia32_pmulld128 (v4si, v4si)
+     int __builtin_ia32_ptestc128 (v2di, v2di)
+     int __builtin_ia32_ptestnzc128 (v2di, v2di)
+     int __builtin_ia32_ptestz128 (v2di, v2di)
+     v2df __builtin_ia32_roundpd (v2df, const int)
+     v4sf __builtin_ia32_roundps (v4sf, const int)
+     v2df __builtin_ia32_roundsd (v2df, v2df, const int)
+     v4sf __builtin_ia32_roundss (v4sf, v4sf, const int)
+
+ The following built-in functions are available when `-msse4.1' is used.
+
+`v4sf __builtin_ia32_vec_set_v4sf (v4sf, float, const int)'
+     Generates the `insertps' machine instruction.
+
+`int __builtin_ia32_vec_ext_v16qi (v16qi, const int)'
+     Generates the `pextrb' machine instruction.
+
+`v16qi __builtin_ia32_vec_set_v16qi (v16qi, int, const int)'
+     Generates the `pinsrb' machine instruction.
+
+`v4si __builtin_ia32_vec_set_v4si (v4si, int, const int)'
+     Generates the `pinsrd' machine instruction.
+
+`v2di __builtin_ia32_vec_set_v2di (v2di, long long, const int)'
+     Generates the `pinsrq' machine instruction in 64bit mode.
+
+ The following built-in functions are changed to generate new SSE4.1
+instructions when `-msse4.1' is used.
+
+`float __builtin_ia32_vec_ext_v4sf (v4sf, const int)'
+     Generates the `extractps' machine instruction.
+
+`int __builtin_ia32_vec_ext_v4si (v4si, const int)'
+     Generates the `pextrd' machine instruction.
+
+`long long __builtin_ia32_vec_ext_v2di (v2di, const int)'
+     Generates the `pextrq' machine instruction in 64bit mode.
+
+ The following built-in functions are available when `-msse4.2' is
+used.  All of them generate the machine instruction that is part of the
+name.
+
+     v16qi __builtin_ia32_pcmpestrm128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestri128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestria128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestric128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestrio128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestris128 (v16qi, int, v16qi, int, const int)
+     int __builtin_ia32_pcmpestriz128 (v16qi, int, v16qi, int, const int)
+     v16qi __builtin_ia32_pcmpistrm128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistri128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistria128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistric128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistrio128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistris128 (v16qi, v16qi, const int)
+     int __builtin_ia32_pcmpistriz128 (v16qi, v16qi, const int)
+     v2di __builtin_ia32_pcmpgtq (v2di, v2di)
+
+ The following built-in functions are available when `-msse4.2' is used.
+
+`unsigned int __builtin_ia32_crc32qi (unsigned int, unsigned char)'
+     Generates the `crc32b' machine instruction.
+
+`unsigned int __builtin_ia32_crc32hi (unsigned int, unsigned short)'
+     Generates the `crc32w' machine instruction.
+
+`unsigned int __builtin_ia32_crc32si (unsigned int, unsigned int)'
+     Generates the `crc32l' machine instruction.
+
+`unsigned long long __builtin_ia32_crc32di (unsigned long long, unsigned long long)'
+     Generates the `crc32q' machine instruction.
+
+ The following built-in functions are changed to generate new SSE4.2
+instructions when `-msse4.2' is used.
+
+`int __builtin_popcount (unsigned int)'
+     Generates the `popcntl' machine instruction.
+
+`int __builtin_popcountl (unsigned long)'
+     Generates the `popcntl' or `popcntq' machine instruction,
+     depending on the size of `unsigned long'.
+
+`int __builtin_popcountll (unsigned long long)'
+     Generates the `popcntq' machine instruction.
+
+ The following built-in functions are available when `-mavx' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v4df __builtin_ia32_addpd256 (v4df,v4df)
+     v8sf __builtin_ia32_addps256 (v8sf,v8sf)
+     v4df __builtin_ia32_addsubpd256 (v4df,v4df)
+     v8sf __builtin_ia32_addsubps256 (v8sf,v8sf)
+     v4df __builtin_ia32_andnpd256 (v4df,v4df)
+     v8sf __builtin_ia32_andnps256 (v8sf,v8sf)
+     v4df __builtin_ia32_andpd256 (v4df,v4df)
+     v8sf __builtin_ia32_andps256 (v8sf,v8sf)
+     v4df __builtin_ia32_blendpd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_blendps256 (v8sf,v8sf,int)
+     v4df __builtin_ia32_blendvpd256 (v4df,v4df,v4df)
+     v8sf __builtin_ia32_blendvps256 (v8sf,v8sf,v8sf)
+     v2df __builtin_ia32_cmppd (v2df,v2df,int)
+     v4df __builtin_ia32_cmppd256 (v4df,v4df,int)
+     v4sf __builtin_ia32_cmpps (v4sf,v4sf,int)
+     v8sf __builtin_ia32_cmpps256 (v8sf,v8sf,int)
+     v2df __builtin_ia32_cmpsd (v2df,v2df,int)
+     v4sf __builtin_ia32_cmpss (v4sf,v4sf,int)
+     v4df __builtin_ia32_cvtdq2pd256 (v4si)
+     v8sf __builtin_ia32_cvtdq2ps256 (v8si)
+     v4si __builtin_ia32_cvtpd2dq256 (v4df)
+     v4sf __builtin_ia32_cvtpd2ps256 (v4df)
+     v8si __builtin_ia32_cvtps2dq256 (v8sf)
+     v4df __builtin_ia32_cvtps2pd256 (v4sf)
+     v4si __builtin_ia32_cvttpd2dq256 (v4df)
+     v8si __builtin_ia32_cvttps2dq256 (v8sf)
+     v4df __builtin_ia32_divpd256 (v4df,v4df)
+     v8sf __builtin_ia32_divps256 (v8sf,v8sf)
+     v8sf __builtin_ia32_dpps256 (v8sf,v8sf,int)
+     v4df __builtin_ia32_haddpd256 (v4df,v4df)
+     v8sf __builtin_ia32_haddps256 (v8sf,v8sf)
+     v4df __builtin_ia32_hsubpd256 (v4df,v4df)
+     v8sf __builtin_ia32_hsubps256 (v8sf,v8sf)
+     v32qi __builtin_ia32_lddqu256 (pcchar)
+     v32qi __builtin_ia32_loaddqu256 (pcchar)
+     v4df __builtin_ia32_loadupd256 (pcdouble)
+     v8sf __builtin_ia32_loadups256 (pcfloat)
+     v2df __builtin_ia32_maskloadpd (pcv2df,v2df)
+     v4df __builtin_ia32_maskloadpd256 (pcv4df,v4df)
+     v4sf __builtin_ia32_maskloadps (pcv4sf,v4sf)
+     v8sf __builtin_ia32_maskloadps256 (pcv8sf,v8sf)
+     void __builtin_ia32_maskstorepd (pv2df,v2df,v2df)
+     void __builtin_ia32_maskstorepd256 (pv4df,v4df,v4df)
+     void __builtin_ia32_maskstoreps (pv4sf,v4sf,v4sf)
+     void __builtin_ia32_maskstoreps256 (pv8sf,v8sf,v8sf)
+     v4df __builtin_ia32_maxpd256 (v4df,v4df)
+     v8sf __builtin_ia32_maxps256 (v8sf,v8sf)
+     v4df __builtin_ia32_minpd256 (v4df,v4df)
+     v8sf __builtin_ia32_minps256 (v8sf,v8sf)
+     v4df __builtin_ia32_movddup256 (v4df)
+     int __builtin_ia32_movmskpd256 (v4df)
+     int __builtin_ia32_movmskps256 (v8sf)
+     v8sf __builtin_ia32_movshdup256 (v8sf)
+     v8sf __builtin_ia32_movsldup256 (v8sf)
+     v4df __builtin_ia32_mulpd256 (v4df,v4df)
+     v8sf __builtin_ia32_mulps256 (v8sf,v8sf)
+     v4df __builtin_ia32_orpd256 (v4df,v4df)
+     v8sf __builtin_ia32_orps256 (v8sf,v8sf)
+     v2df __builtin_ia32_pd_pd256 (v4df)
+     v4df __builtin_ia32_pd256_pd (v2df)
+     v4sf __builtin_ia32_ps_ps256 (v8sf)
+     v8sf __builtin_ia32_ps256_ps (v4sf)
+     int __builtin_ia32_ptestc256 (v4di,v4di,ptest)
+     int __builtin_ia32_ptestnzc256 (v4di,v4di,ptest)
+     int __builtin_ia32_ptestz256 (v4di,v4di,ptest)
+     v8sf __builtin_ia32_rcpps256 (v8sf)
+     v4df __builtin_ia32_roundpd256 (v4df,int)
+     v8sf __builtin_ia32_roundps256 (v8sf,int)
+     v8sf __builtin_ia32_rsqrtps_nr256 (v8sf)
+     v8sf __builtin_ia32_rsqrtps256 (v8sf)
+     v4df __builtin_ia32_shufpd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_shufps256 (v8sf,v8sf,int)
+     v4si __builtin_ia32_si_si256 (v8si)
+     v8si __builtin_ia32_si256_si (v4si)
+     v4df __builtin_ia32_sqrtpd256 (v4df)
+     v8sf __builtin_ia32_sqrtps_nr256 (v8sf)
+     v8sf __builtin_ia32_sqrtps256 (v8sf)
+     void __builtin_ia32_storedqu256 (pchar,v32qi)
+     void __builtin_ia32_storeupd256 (pdouble,v4df)
+     void __builtin_ia32_storeups256 (pfloat,v8sf)
+     v4df __builtin_ia32_subpd256 (v4df,v4df)
+     v8sf __builtin_ia32_subps256 (v8sf,v8sf)
+     v4df __builtin_ia32_unpckhpd256 (v4df,v4df)
+     v8sf __builtin_ia32_unpckhps256 (v8sf,v8sf)
+     v4df __builtin_ia32_unpcklpd256 (v4df,v4df)
+     v8sf __builtin_ia32_unpcklps256 (v8sf,v8sf)
+     v4df __builtin_ia32_vbroadcastf128_pd256 (pcv2df)
+     v8sf __builtin_ia32_vbroadcastf128_ps256 (pcv4sf)
+     v4df __builtin_ia32_vbroadcastsd256 (pcdouble)
+     v4sf __builtin_ia32_vbroadcastss (pcfloat)
+     v8sf __builtin_ia32_vbroadcastss256 (pcfloat)
+     v2df __builtin_ia32_vextractf128_pd256 (v4df,int)
+     v4sf __builtin_ia32_vextractf128_ps256 (v8sf,int)
+     v4si __builtin_ia32_vextractf128_si256 (v8si,int)
+     v4df __builtin_ia32_vinsertf128_pd256 (v4df,v2df,int)
+     v8sf __builtin_ia32_vinsertf128_ps256 (v8sf,v4sf,int)
+     v8si __builtin_ia32_vinsertf128_si256 (v8si,v4si,int)
+     v4df __builtin_ia32_vperm2f128_pd256 (v4df,v4df,int)
+     v8sf __builtin_ia32_vperm2f128_ps256 (v8sf,v8sf,int)
+     v8si __builtin_ia32_vperm2f128_si256 (v8si,v8si,int)
+     v2df __builtin_ia32_vpermil2pd (v2df,v2df,v2di,int)
+     v4df __builtin_ia32_vpermil2pd256 (v4df,v4df,v4di,int)
+     v4sf __builtin_ia32_vpermil2ps (v4sf,v4sf,v4si,int)
+     v8sf __builtin_ia32_vpermil2ps256 (v8sf,v8sf,v8si,int)
+     v2df __builtin_ia32_vpermilpd (v2df,int)
+     v4df __builtin_ia32_vpermilpd256 (v4df,int)
+     v4sf __builtin_ia32_vpermilps (v4sf,int)
+     v8sf __builtin_ia32_vpermilps256 (v8sf,int)
+     v2df __builtin_ia32_vpermilvarpd (v2df,v2di)
+     v4df __builtin_ia32_vpermilvarpd256 (v4df,v4di)
+     v4sf __builtin_ia32_vpermilvarps (v4sf,v4si)
+     v8sf __builtin_ia32_vpermilvarps256 (v8sf,v8si)
+     int __builtin_ia32_vtestcpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestcpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestcps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestcps256 (v8sf,v8sf,ptest)
+     int __builtin_ia32_vtestnzcpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestnzcpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestnzcps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestnzcps256 (v8sf,v8sf,ptest)
+     int __builtin_ia32_vtestzpd (v2df,v2df,ptest)
+     int __builtin_ia32_vtestzpd256 (v4df,v4df,ptest)
+     int __builtin_ia32_vtestzps (v4sf,v4sf,ptest)
+     int __builtin_ia32_vtestzps256 (v8sf,v8sf,ptest)
+     void __builtin_ia32_vzeroall (void)
+     void __builtin_ia32_vzeroupper (void)
+     v4df __builtin_ia32_xorpd256 (v4df,v4df)
+     v8sf __builtin_ia32_xorps256 (v8sf,v8sf)
+
+ The following built-in functions are available when `-maes' is used.
+All of them generate the machine instruction that is part of the name.
+
+     v2di __builtin_ia32_aesenc128 (v2di, v2di)
+     v2di __builtin_ia32_aesenclast128 (v2di, v2di)
+     v2di __builtin_ia32_aesdec128 (v2di, v2di)
+     v2di __builtin_ia32_aesdeclast128 (v2di, v2di)
+     v2di __builtin_ia32_aeskeygenassist128 (v2di, const int)
+     v2di __builtin_ia32_aesimc128 (v2di)
+
+ The following built-in function is available when `-mpclmul' is used.
+
+`v2di __builtin_ia32_pclmulqdq128 (v2di, v2di, const int)'
+     Generates the `pclmulqdq' machine instruction.
+
+ The following built-in functions are available when `-msse4a' is used.
+All of them generate the machine instruction that is part of the name.
+
+     void __builtin_ia32_movntsd (double *, v2df)
+     void __builtin_ia32_movntss (float *, v4sf)
+     v2di __builtin_ia32_extrq  (v2di, v16qi)
+     v2di __builtin_ia32_extrqi (v2di, const unsigned int, const unsigned int)
+     v2di __builtin_ia32_insertq (v2di, v2di)
+     v2di __builtin_ia32_insertqi (v2di, v2di, const unsigned int, const unsigned int)
+
+ The following built-in functions are available when `-mxop' is used.
+     v2df __builtin_ia32_vfrczpd (v2df)
+     v4sf __builtin_ia32_vfrczps (v4sf)
+     v2df __builtin_ia32_vfrczsd (v2df, v2df)
+     v4sf __builtin_ia32_vfrczss (v4sf, v4sf)
+     v4df __builtin_ia32_vfrczpd256 (v4df)
+     v8sf __builtin_ia32_vfrczps256 (v8sf)
+     v2di __builtin_ia32_vpcmov (v2di, v2di, v2di)
+     v2di __builtin_ia32_vpcmov_v2di (v2di, v2di, v2di)
+     v4si __builtin_ia32_vpcmov_v4si (v4si, v4si, v4si)
+     v8hi __builtin_ia32_vpcmov_v8hi (v8hi, v8hi, v8hi)
+     v16qi __builtin_ia32_vpcmov_v16qi (v16qi, v16qi, v16qi)
+     v2df __builtin_ia32_vpcmov_v2df (v2df, v2df, v2df)
+     v4sf __builtin_ia32_vpcmov_v4sf (v4sf, v4sf, v4sf)
+     v4di __builtin_ia32_vpcmov_v4di256 (v4di, v4di, v4di)
+     v8si __builtin_ia32_vpcmov_v8si256 (v8si, v8si, v8si)
+     v16hi __builtin_ia32_vpcmov_v16hi256 (v16hi, v16hi, v16hi)
+     v32qi __builtin_ia32_vpcmov_v32qi256 (v32qi, v32qi, v32qi)
+     v4df __builtin_ia32_vpcmov_v4df256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_vpcmov_v8sf256 (v8sf, v8sf, v8sf)
+     v16qi __builtin_ia32_vpcomeqb (v16qi, v16qi)
+     v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+     v4si __builtin_ia32_vpcomeqd (v4si, v4si)
+     v2di __builtin_ia32_vpcomeqq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomequb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomequd (v4si, v4si)
+     v2di __builtin_ia32_vpcomequq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomequw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomeqw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomfalseb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomfalsed (v4si, v4si)
+     v2di __builtin_ia32_vpcomfalseq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomfalseub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomfalseud (v4si, v4si)
+     v2di __builtin_ia32_vpcomfalseuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomfalseuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomfalsew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomgeb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomged (v4si, v4si)
+     v2di __builtin_ia32_vpcomgeq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomgeub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgeud (v4si, v4si)
+     v2di __builtin_ia32_vpcomgeuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomgeuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomgew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomgtb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgtd (v4si, v4si)
+     v2di __builtin_ia32_vpcomgtq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomgtub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomgtud (v4si, v4si)
+     v2di __builtin_ia32_vpcomgtuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomgtuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomgtw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomleb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomled (v4si, v4si)
+     v2di __builtin_ia32_vpcomleq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomleub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomleud (v4si, v4si)
+     v2di __builtin_ia32_vpcomleuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomleuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomlew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomltb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomltd (v4si, v4si)
+     v2di __builtin_ia32_vpcomltq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomltub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomltud (v4si, v4si)
+     v2di __builtin_ia32_vpcomltuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomltuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomltw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomneb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomned (v4si, v4si)
+     v2di __builtin_ia32_vpcomneq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomneub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomneud (v4si, v4si)
+     v2di __builtin_ia32_vpcomneuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomneuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomnew (v8hi, v8hi)
+     v16qi __builtin_ia32_vpcomtrueb (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomtrued (v4si, v4si)
+     v2di __builtin_ia32_vpcomtrueq (v2di, v2di)
+     v16qi __builtin_ia32_vpcomtrueub (v16qi, v16qi)
+     v4si __builtin_ia32_vpcomtrueud (v4si, v4si)
+     v2di __builtin_ia32_vpcomtrueuq (v2di, v2di)
+     v8hi __builtin_ia32_vpcomtrueuw (v8hi, v8hi)
+     v8hi __builtin_ia32_vpcomtruew (v8hi, v8hi)
+     v4si __builtin_ia32_vphaddbd (v16qi)
+     v2di __builtin_ia32_vphaddbq (v16qi)
+     v8hi __builtin_ia32_vphaddbw (v16qi)
+     v2di __builtin_ia32_vphadddq (v4si)
+     v4si __builtin_ia32_vphaddubd (v16qi)
+     v2di __builtin_ia32_vphaddubq (v16qi)
+     v8hi __builtin_ia32_vphaddubw (v16qi)
+     v2di __builtin_ia32_vphaddudq (v4si)
+     v4si __builtin_ia32_vphadduwd (v8hi)
+     v2di __builtin_ia32_vphadduwq (v8hi)
+     v4si __builtin_ia32_vphaddwd (v8hi)
+     v2di __builtin_ia32_vphaddwq (v8hi)
+     v8hi __builtin_ia32_vphsubbw (v16qi)
+     v2di __builtin_ia32_vphsubdq (v4si)
+     v4si __builtin_ia32_vphsubwd (v8hi)
+     v4si __builtin_ia32_vpmacsdd (v4si, v4si, v4si)
+     v2di __builtin_ia32_vpmacsdqh (v4si, v4si, v2di)
+     v2di __builtin_ia32_vpmacsdql (v4si, v4si, v2di)
+     v4si __builtin_ia32_vpmacssdd (v4si, v4si, v4si)
+     v2di __builtin_ia32_vpmacssdqh (v4si, v4si, v2di)
+     v2di __builtin_ia32_vpmacssdql (v4si, v4si, v2di)
+     v4si __builtin_ia32_vpmacsswd (v8hi, v8hi, v4si)
+     v8hi __builtin_ia32_vpmacssww (v8hi, v8hi, v8hi)
+     v4si __builtin_ia32_vpmacswd (v8hi, v8hi, v4si)
+     v8hi __builtin_ia32_vpmacsww (v8hi, v8hi, v8hi)
+     v4si __builtin_ia32_vpmadcsswd (v8hi, v8hi, v4si)
+     v4si __builtin_ia32_vpmadcswd (v8hi, v8hi, v4si)
+     v16qi __builtin_ia32_vpperm (v16qi, v16qi, v16qi)
+     v16qi __builtin_ia32_vprotb (v16qi, v16qi)
+     v4si __builtin_ia32_vprotd (v4si, v4si)
+     v2di __builtin_ia32_vprotq (v2di, v2di)
+     v8hi __builtin_ia32_vprotw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpshab (v16qi, v16qi)
+     v4si __builtin_ia32_vpshad (v4si, v4si)
+     v2di __builtin_ia32_vpshaq (v2di, v2di)
+     v8hi __builtin_ia32_vpshaw (v8hi, v8hi)
+     v16qi __builtin_ia32_vpshlb (v16qi, v16qi)
+     v4si __builtin_ia32_vpshld (v4si, v4si)
+     v2di __builtin_ia32_vpshlq (v2di, v2di)
+     v8hi __builtin_ia32_vpshlw (v8hi, v8hi)
+
+ The following built-in functions are available when `-mfma4' is used.
+All of them generate the machine instruction that is part of the name
+with MMX registers.
+
+     v2df __builtin_ia32_fmaddpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmaddsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmaddpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmaddps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmaddsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmaddss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmsubpd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmsubps (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fnmsubsd (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fnmsubss (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmaddsubpd  (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmaddsubps  (v4sf, v4sf, v4sf)
+     v2df __builtin_ia32_fmsubaddpd  (v2df, v2df, v2df)
+     v4sf __builtin_ia32_fmsubaddps  (v4sf, v4sf, v4sf)
+     v4df __builtin_ia32_fmaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmaddps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fnmaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fnmaddps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fnmsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fnmsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmaddsubpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmaddsubps256 (v8sf, v8sf, v8sf)
+     v4df __builtin_ia32_fmsubaddpd256 (v4df, v4df, v4df)
+     v8sf __builtin_ia32_fmsubaddps256 (v8sf, v8sf, v8sf)
+
+ The following built-in functions are available when `-mlwp' is used.
+
+     void __builtin_ia32_llwpcb16 (void *);
+     void __builtin_ia32_llwpcb32 (void *);
+     void __builtin_ia32_llwpcb64 (void *);
+     void * __builtin_ia32_llwpcb16 (void);
+     void * __builtin_ia32_llwpcb32 (void);
+     void * __builtin_ia32_llwpcb64 (void);
+     void __builtin_ia32_lwpval16 (unsigned short, unsigned int, unsigned short)
+     void __builtin_ia32_lwpval32 (unsigned int, unsigned int, unsigned int)
+     void __builtin_ia32_lwpval64 (unsigned __int64, unsigned int, unsigned int)
+     unsigned char __builtin_ia32_lwpins16 (unsigned short, unsigned int, unsigned short)
+     unsigned char __builtin_ia32_lwpins32 (unsigned int, unsigned int, unsigned int)
+     unsigned char __builtin_ia32_lwpins64 (unsigned __int64, unsigned int, unsigned int)
+
+ The following built-in functions are available when `-m3dnow' is used.
+All of them generate the machine instruction that is part of the name.
+
+     void __builtin_ia32_femms (void)
+     v8qi __builtin_ia32_pavgusb (v8qi, v8qi)
+     v2si __builtin_ia32_pf2id (v2sf)
+     v2sf __builtin_ia32_pfacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pfadd (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpeq (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpge (v2sf, v2sf)
+     v2si __builtin_ia32_pfcmpgt (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmax (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmin (v2sf, v2sf)
+     v2sf __builtin_ia32_pfmul (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrcp (v2sf)
+     v2sf __builtin_ia32_pfrcpit1 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrcpit2 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfrsqrt (v2sf)
+     v2sf __builtin_ia32_pfrsqrtit1 (v2sf, v2sf)
+     v2sf __builtin_ia32_pfsub (v2sf, v2sf)
+     v2sf __builtin_ia32_pfsubr (v2sf, v2sf)
+     v2sf __builtin_ia32_pi2fd (v2si)
+     v4hi __builtin_ia32_pmulhrw (v4hi, v4hi)
+
+ The following built-in functions are available when both `-m3dnow' and
+`-march=athlon' are used.  All of them generate the machine instruction
+that is part of the name.
+
+     v2si __builtin_ia32_pf2iw (v2sf)
+     v2sf __builtin_ia32_pfnacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pfpnacc (v2sf, v2sf)
+     v2sf __builtin_ia32_pi2fw (v2si)
+     v2sf __builtin_ia32_pswapdsf (v2sf)
+     v2si __builtin_ia32_pswapdsi (v2si)
+
+
+File: gcc.info,  Node: MIPS DSP Built-in Functions,  Next: MIPS Paired-Single Support,  Prev: X86 Built-in Functions,  Up: Target Builtins
+
+6.52.7 MIPS DSP Built-in Functions
+----------------------------------
+
+The MIPS DSP Application-Specific Extension (ASE) includes new
+instructions that are designed to improve the performance of DSP and
+media applications.  It provides instructions that operate on packed
+8-bit/16-bit integer data, Q7, Q15 and Q31 fractional data.
+
+ GCC supports MIPS DSP operations using both the generic vector
+extensions (*note Vector Extensions::) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are enabled by
+the `-mdsp' command-line option.
+
+ Revision 2 of the ASE was introduced in the second half of 2006.  This
+revision adds extra instructions to the original ASE, but is otherwise
+backwards-compatible with it.  You can select revision 2 using the
+command-line option `-mdspr2'; this option implies `-mdsp'.
+
+ The SCOUNT and POS bits of the DSP control register are global.  The
+WRDSP, EXTPDP, EXTPDPV and MTHLIP instructions modify the SCOUNT and
+POS bits.  During optimization, the compiler will not delete these
+instructions and it will not delete calls to functions containing these
+instructions.
+
+ At present, GCC only provides support for operations on 32-bit
+vectors.  The vector type associated with 8-bit integer data is usually
+called `v4i8', the vector type associated with Q7 is usually called
+`v4q7', the vector type associated with 16-bit integer data is usually
+called `v2i16', and the vector type associated with Q15 is usually
+called `v2q15'.  They can be defined in C as follows:
+
+     typedef signed char v4i8 __attribute__ ((vector_size(4)));
+     typedef signed char v4q7 __attribute__ ((vector_size(4)));
+     typedef short v2i16 __attribute__ ((vector_size(4)));
+     typedef short v2q15 __attribute__ ((vector_size(4)));
+
+ `v4i8', `v4q7', `v2i16' and `v2q15' values are initialized in the same
+way as aggregates.  For example:
+
+     v4i8 a = {1, 2, 3, 4};
+     v4i8 b;
+     b = (v4i8) {5, 6, 7, 8};
+
+     v2q15 c = {0x0fcb, 0x3a75};
+     v2q15 d;
+     d = (v2q15) {0.1234 * 0x1.0p15, 0.4567 * 0x1.0p15};
+
+ _Note:_ The CPU's endianness determines the order in which values are
+packed.  On little-endian targets, the first value is the least
+significant and the last value is the most significant.  The opposite
+order applies to big-endian targets.  For example, the code above will
+set the lowest byte of `a' to `1' on little-endian targets and `4' on
+big-endian targets.
+
+ _Note:_ Q7, Q15 and Q31 values must be initialized with their integer
+representation.  As shown in this example, the integer representation
+of a Q7 value can be obtained by multiplying the fractional value by
+`0x1.0p7'.  The equivalent for Q15 values is to multiply by `0x1.0p15'.
+The equivalent for Q31 values is to multiply by `0x1.0p31'.
+
+ The table below lists the `v4i8' and `v2q15' operations for which
+hardware support exists.  `a' and `b' are `v4i8' values, and `c' and
+`d' are `v2q15' values.
+
+C code                               MIPS instruction
+`a + b'                              `addu.qb'
+`c + d'                              `addq.ph'
+`a - b'                              `subu.qb'
+`c - d'                              `subq.ph'
+
+ The table below lists the `v2i16' operation for which hardware support
+exists for the DSP ASE REV 2.  `e' and `f' are `v2i16' values.
+
+C code                               MIPS instruction
+`e * f'                              `mul.ph'
+
+ It is easier to describe the DSP built-in functions if we first define
+the following types:
+
+     typedef int q31;
+     typedef int i32;
+     typedef unsigned int ui32;
+     typedef long long a64;
+
+ `q31' and `i32' are actually the same as `int', but we use `q31' to
+indicate a Q31 fractional value and `i32' to indicate a 32-bit integer
+value.  Similarly, `a64' is the same as `long long', but we use `a64'
+to indicate values that will be placed in one of the four DSP
+accumulators (`$ac0', `$ac1', `$ac2' or `$ac3').
+
+ Also, some built-in functions prefer or require immediate numbers as
+parameters, because the corresponding DSP instructions accept both
+immediate numbers and register operands, or accept immediate numbers
+only.  The immediate parameters are listed as follows.
+
+     imm0_3: 0 to 3.
+     imm0_7: 0 to 7.
+     imm0_15: 0 to 15.
+     imm0_31: 0 to 31.
+     imm0_63: 0 to 63.
+     imm0_255: 0 to 255.
+     imm_n32_31: -32 to 31.
+     imm_n512_511: -512 to 511.
+
+ The following built-in functions map directly to a particular MIPS DSP
+instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+     v2q15 __builtin_mips_addq_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_addq_s_ph (v2q15, v2q15)
+     q31 __builtin_mips_addq_s_w (q31, q31)
+     v4i8 __builtin_mips_addu_qb (v4i8, v4i8)
+     v4i8 __builtin_mips_addu_s_qb (v4i8, v4i8)
+     v2q15 __builtin_mips_subq_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_subq_s_ph (v2q15, v2q15)
+     q31 __builtin_mips_subq_s_w (q31, q31)
+     v4i8 __builtin_mips_subu_qb (v4i8, v4i8)
+     v4i8 __builtin_mips_subu_s_qb (v4i8, v4i8)
+     i32 __builtin_mips_addsc (i32, i32)
+     i32 __builtin_mips_addwc (i32, i32)
+     i32 __builtin_mips_modsub (i32, i32)
+     i32 __builtin_mips_raddu_w_qb (v4i8)
+     v2q15 __builtin_mips_absq_s_ph (v2q15)
+     q31 __builtin_mips_absq_s_w (q31)
+     v4i8 __builtin_mips_precrq_qb_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_precrq_ph_w (q31, q31)
+     v2q15 __builtin_mips_precrq_rs_ph_w (q31, q31)
+     v4i8 __builtin_mips_precrqu_s_qb_ph (v2q15, v2q15)
+     q31 __builtin_mips_preceq_w_phl (v2q15)
+     q31 __builtin_mips_preceq_w_phr (v2q15)
+     v2q15 __builtin_mips_precequ_ph_qbl (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbr (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbla (v4i8)
+     v2q15 __builtin_mips_precequ_ph_qbra (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbl (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbr (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbla (v4i8)
+     v2q15 __builtin_mips_preceu_ph_qbra (v4i8)
+     v4i8 __builtin_mips_shll_qb (v4i8, imm0_7)
+     v4i8 __builtin_mips_shll_qb (v4i8, i32)
+     v2q15 __builtin_mips_shll_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shll_ph (v2q15, i32)
+     v2q15 __builtin_mips_shll_s_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shll_s_ph (v2q15, i32)
+     q31 __builtin_mips_shll_s_w (q31, imm0_31)
+     q31 __builtin_mips_shll_s_w (q31, i32)
+     v4i8 __builtin_mips_shrl_qb (v4i8, imm0_7)
+     v4i8 __builtin_mips_shrl_qb (v4i8, i32)
+     v2q15 __builtin_mips_shra_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shra_ph (v2q15, i32)
+     v2q15 __builtin_mips_shra_r_ph (v2q15, imm0_15)
+     v2q15 __builtin_mips_shra_r_ph (v2q15, i32)
+     q31 __builtin_mips_shra_r_w (q31, imm0_31)
+     q31 __builtin_mips_shra_r_w (q31, i32)
+     v2q15 __builtin_mips_muleu_s_ph_qbl (v4i8, v2q15)
+     v2q15 __builtin_mips_muleu_s_ph_qbr (v4i8, v2q15)
+     v2q15 __builtin_mips_mulq_rs_ph (v2q15, v2q15)
+     q31 __builtin_mips_muleq_s_w_phl (v2q15, v2q15)
+     q31 __builtin_mips_muleq_s_w_phr (v2q15, v2q15)
+     a64 __builtin_mips_dpau_h_qbl (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpau_h_qbr (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpsu_h_qbl (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpsu_h_qbr (a64, v4i8, v4i8)
+     a64 __builtin_mips_dpaq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_dpaq_sa_l_w (a64, q31, q31)
+     a64 __builtin_mips_dpsq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_dpsq_sa_l_w (a64, q31, q31)
+     a64 __builtin_mips_mulsaq_s_w_ph (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_s_w_phl (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_s_w_phr (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_sa_w_phl (a64, v2q15, v2q15)
+     a64 __builtin_mips_maq_sa_w_phr (a64, v2q15, v2q15)
+     i32 __builtin_mips_bitrev (i32)
+     i32 __builtin_mips_insv (i32, i32)
+     v4i8 __builtin_mips_repl_qb (imm0_255)
+     v4i8 __builtin_mips_repl_qb (i32)
+     v2q15 __builtin_mips_repl_ph (imm_n512_511)
+     v2q15 __builtin_mips_repl_ph (i32)
+     void __builtin_mips_cmpu_eq_qb (v4i8, v4i8)
+     void __builtin_mips_cmpu_lt_qb (v4i8, v4i8)
+     void __builtin_mips_cmpu_le_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_eq_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_lt_qb (v4i8, v4i8)
+     i32 __builtin_mips_cmpgu_le_qb (v4i8, v4i8)
+     void __builtin_mips_cmp_eq_ph (v2q15, v2q15)
+     void __builtin_mips_cmp_lt_ph (v2q15, v2q15)
+     void __builtin_mips_cmp_le_ph (v2q15, v2q15)
+     v4i8 __builtin_mips_pick_qb (v4i8, v4i8)
+     v2q15 __builtin_mips_pick_ph (v2q15, v2q15)
+     v2q15 __builtin_mips_packrl_ph (v2q15, v2q15)
+     i32 __builtin_mips_extr_w (a64, imm0_31)
+     i32 __builtin_mips_extr_w (a64, i32)
+     i32 __builtin_mips_extr_r_w (a64, imm0_31)
+     i32 __builtin_mips_extr_s_h (a64, i32)
+     i32 __builtin_mips_extr_rs_w (a64, imm0_31)
+     i32 __builtin_mips_extr_rs_w (a64, i32)
+     i32 __builtin_mips_extr_s_h (a64, imm0_31)
+     i32 __builtin_mips_extr_r_w (a64, i32)
+     i32 __builtin_mips_extp (a64, imm0_31)
+     i32 __builtin_mips_extp (a64, i32)
+     i32 __builtin_mips_extpdp (a64, imm0_31)
+     i32 __builtin_mips_extpdp (a64, i32)
+     a64 __builtin_mips_shilo (a64, imm_n32_31)
+     a64 __builtin_mips_shilo (a64, i32)
+     a64 __builtin_mips_mthlip (a64, i32)
+     void __builtin_mips_wrdsp (i32, imm0_63)
+     i32 __builtin_mips_rddsp (imm0_63)
+     i32 __builtin_mips_lbux (void *, i32)
+     i32 __builtin_mips_lhx (void *, i32)
+     i32 __builtin_mips_lwx (void *, i32)
+     i32 __builtin_mips_bposge32 (void)
+
+ The following built-in functions map directly to a particular MIPS DSP
+REV 2 instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+     v4q7 __builtin_mips_absq_s_qb (v4q7);
+     v2i16 __builtin_mips_addu_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_addu_s_ph (v2i16, v2i16);
+     v4i8 __builtin_mips_adduh_qb (v4i8, v4i8);
+     v4i8 __builtin_mips_adduh_r_qb (v4i8, v4i8);
+     i32 __builtin_mips_append (i32, i32, imm0_31);
+     i32 __builtin_mips_balign (i32, i32, imm0_3);
+     i32 __builtin_mips_cmpgdu_eq_qb (v4i8, v4i8);
+     i32 __builtin_mips_cmpgdu_lt_qb (v4i8, v4i8);
+     i32 __builtin_mips_cmpgdu_le_qb (v4i8, v4i8);
+     a64 __builtin_mips_dpa_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dps_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_madd (a64, i32, i32);
+     a64 __builtin_mips_maddu (a64, ui32, ui32);
+     a64 __builtin_mips_msub (a64, i32, i32);
+     a64 __builtin_mips_msubu (a64, ui32, ui32);
+     v2i16 __builtin_mips_mul_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_mul_s_ph (v2i16, v2i16);
+     q31 __builtin_mips_mulq_rs_w (q31, q31);
+     v2q15 __builtin_mips_mulq_s_ph (v2q15, v2q15);
+     q31 __builtin_mips_mulq_s_w (q31, q31);
+     a64 __builtin_mips_mulsa_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_mult (i32, i32);
+     a64 __builtin_mips_multu (ui32, ui32);
+     v4i8 __builtin_mips_precr_qb_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_precr_sra_ph_w (i32, i32, imm0_31);
+     v2i16 __builtin_mips_precr_sra_r_ph_w (i32, i32, imm0_31);
+     i32 __builtin_mips_prepend (i32, i32, imm0_31);
+     v4i8 __builtin_mips_shra_qb (v4i8, imm0_7);
+     v4i8 __builtin_mips_shra_r_qb (v4i8, imm0_7);
+     v4i8 __builtin_mips_shra_qb (v4i8, i32);
+     v4i8 __builtin_mips_shra_r_qb (v4i8, i32);
+     v2i16 __builtin_mips_shrl_ph (v2i16, imm0_15);
+     v2i16 __builtin_mips_shrl_ph (v2i16, i32);
+     v2i16 __builtin_mips_subu_ph (v2i16, v2i16);
+     v2i16 __builtin_mips_subu_s_ph (v2i16, v2i16);
+     v4i8 __builtin_mips_subuh_qb (v4i8, v4i8);
+     v4i8 __builtin_mips_subuh_r_qb (v4i8, v4i8);
+     v2q15 __builtin_mips_addqh_ph (v2q15, v2q15);
+     v2q15 __builtin_mips_addqh_r_ph (v2q15, v2q15);
+     q31 __builtin_mips_addqh_w (q31, q31);
+     q31 __builtin_mips_addqh_r_w (q31, q31);
+     v2q15 __builtin_mips_subqh_ph (v2q15, v2q15);
+     v2q15 __builtin_mips_subqh_r_ph (v2q15, v2q15);
+     q31 __builtin_mips_subqh_w (q31, q31);
+     q31 __builtin_mips_subqh_r_w (q31, q31);
+     a64 __builtin_mips_dpax_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dpsx_w_ph (a64, v2i16, v2i16);
+     a64 __builtin_mips_dpaqx_s_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpaqx_sa_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpsqx_s_w_ph (a64, v2q15, v2q15);
+     a64 __builtin_mips_dpsqx_sa_w_ph (a64, v2q15, v2q15);
+
+
+File: gcc.info,  Node: MIPS Paired-Single Support,  Next: MIPS Loongson Built-in Functions,  Prev: MIPS DSP Built-in Functions,  Up: Target Builtins
+
+6.52.8 MIPS Paired-Single Support
+---------------------------------
+
+The MIPS64 architecture includes a number of instructions that operate
+on pairs of single-precision floating-point values.  Each pair is
+packed into a 64-bit floating-point register, with one element being
+designated the "upper half" and the other being designated the "lower
+half".
+
+ GCC supports paired-single operations using both the generic vector
+extensions (*note Vector Extensions::) and a collection of
+MIPS-specific built-in functions.  Both kinds of support are enabled by
+the `-mpaired-single' command-line option.
+
+ The vector type associated with paired-single values is usually called
+`v2sf'.  It can be defined in C as follows:
+
+     typedef float v2sf __attribute__ ((vector_size (8)));
+
+ `v2sf' values are initialized in the same way as aggregates.  For
+example:
+
+     v2sf a = {1.5, 9.1};
+     v2sf b;
+     float e, f;
+     b = (v2sf) {e, f};
+
+ _Note:_ The CPU's endianness determines which value is stored in the
+upper half of a register and which value is stored in the lower half.
+On little-endian targets, the first value is the lower one and the
+second value is the upper one.  The opposite order applies to
+big-endian targets.  For example, the code above will set the lower
+half of `a' to `1.5' on little-endian targets and `9.1' on big-endian
+targets.
+
+
+File: gcc.info,  Node: MIPS Loongson Built-in Functions,  Next: Other MIPS Built-in Functions,  Prev: MIPS Paired-Single Support,  Up: Target Builtins
+
+6.52.9 MIPS Loongson Built-in Functions
+---------------------------------------
+
+GCC provides intrinsics to access the SIMD instructions provided by the
+ST Microelectronics Loongson-2E and -2F processors.  These intrinsics,
+available after inclusion of the `loongson.h' header file, operate on
+the following 64-bit vector types:
+
+   * `uint8x8_t', a vector of eight unsigned 8-bit integers;
+
+   * `uint16x4_t', a vector of four unsigned 16-bit integers;
+
+   * `uint32x2_t', a vector of two unsigned 32-bit integers;
+
+   * `int8x8_t', a vector of eight signed 8-bit integers;
+
+   * `int16x4_t', a vector of four signed 16-bit integers;
+
+   * `int32x2_t', a vector of two signed 32-bit integers.
+
+ The intrinsics provided are listed below; each is named after the
+machine instruction to which it corresponds, with suffixes added as
+appropriate to distinguish intrinsics that expand to the same machine
+instruction yet have different argument types.  Refer to the
+architecture documentation for a description of the functionality of
+each instruction.
+
+     int16x4_t packsswh (int32x2_t s, int32x2_t t);
+     int8x8_t packsshb (int16x4_t s, int16x4_t t);
+     uint8x8_t packushb (uint16x4_t s, uint16x4_t t);
+     uint32x2_t paddw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t paddh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t paddb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t paddw_s (int32x2_t s, int32x2_t t);
+     int16x4_t paddh_s (int16x4_t s, int16x4_t t);
+     int8x8_t paddb_s (int8x8_t s, int8x8_t t);
+     uint64_t paddd_u (uint64_t s, uint64_t t);
+     int64_t paddd_s (int64_t s, int64_t t);
+     int16x4_t paddsh (int16x4_t s, int16x4_t t);
+     int8x8_t paddsb (int8x8_t s, int8x8_t t);
+     uint16x4_t paddush (uint16x4_t s, uint16x4_t t);
+     uint8x8_t paddusb (uint8x8_t s, uint8x8_t t);
+     uint64_t pandn_ud (uint64_t s, uint64_t t);
+     uint32x2_t pandn_uw (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pandn_uh (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pandn_ub (uint8x8_t s, uint8x8_t t);
+     int64_t pandn_sd (int64_t s, int64_t t);
+     int32x2_t pandn_sw (int32x2_t s, int32x2_t t);
+     int16x4_t pandn_sh (int16x4_t s, int16x4_t t);
+     int8x8_t pandn_sb (int8x8_t s, int8x8_t t);
+     uint16x4_t pavgh (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pavgb (uint8x8_t s, uint8x8_t t);
+     uint32x2_t pcmpeqw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pcmpeqh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pcmpeqb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t pcmpeqw_s (int32x2_t s, int32x2_t t);
+     int16x4_t pcmpeqh_s (int16x4_t s, int16x4_t t);
+     int8x8_t pcmpeqb_s (int8x8_t s, int8x8_t t);
+     uint32x2_t pcmpgtw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t pcmpgth_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t pcmpgtb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t pcmpgtw_s (int32x2_t s, int32x2_t t);
+     int16x4_t pcmpgth_s (int16x4_t s, int16x4_t t);
+     int8x8_t pcmpgtb_s (int8x8_t s, int8x8_t t);
+     uint16x4_t pextrh_u (uint16x4_t s, int field);
+     int16x4_t pextrh_s (int16x4_t s, int field);
+     uint16x4_t pinsrh_0_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_1_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_2_u (uint16x4_t s, uint16x4_t t);
+     uint16x4_t pinsrh_3_u (uint16x4_t s, uint16x4_t t);
+     int16x4_t pinsrh_0_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_1_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_2_s (int16x4_t s, int16x4_t t);
+     int16x4_t pinsrh_3_s (int16x4_t s, int16x4_t t);
+     int32x2_t pmaddhw (int16x4_t s, int16x4_t t);
+     int16x4_t pmaxsh (int16x4_t s, int16x4_t t);
+     uint8x8_t pmaxub (uint8x8_t s, uint8x8_t t);
+     int16x4_t pminsh (int16x4_t s, int16x4_t t);
+     uint8x8_t pminub (uint8x8_t s, uint8x8_t t);
+     uint8x8_t pmovmskb_u (uint8x8_t s);
+     int8x8_t pmovmskb_s (int8x8_t s);
+     uint16x4_t pmulhuh (uint16x4_t s, uint16x4_t t);
+     int16x4_t pmulhh (int16x4_t s, int16x4_t t);
+     int16x4_t pmullh (int16x4_t s, int16x4_t t);
+     int64_t pmuluw (uint32x2_t s, uint32x2_t t);
+     uint8x8_t pasubub (uint8x8_t s, uint8x8_t t);
+     uint16x4_t biadd (uint8x8_t s);
+     uint16x4_t psadbh (uint8x8_t s, uint8x8_t t);
+     uint16x4_t pshufh_u (uint16x4_t dest, uint16x4_t s, uint8_t order);
+     int16x4_t pshufh_s (int16x4_t dest, int16x4_t s, uint8_t order);
+     uint16x4_t psllh_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psllh_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psllw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psllw_s (int32x2_t s, uint8_t amount);
+     uint16x4_t psrlh_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psrlh_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psrlw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psrlw_s (int32x2_t s, uint8_t amount);
+     uint16x4_t psrah_u (uint16x4_t s, uint8_t amount);
+     int16x4_t psrah_s (int16x4_t s, uint8_t amount);
+     uint32x2_t psraw_u (uint32x2_t s, uint8_t amount);
+     int32x2_t psraw_s (int32x2_t s, uint8_t amount);
+     uint32x2_t psubw_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t psubh_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t psubb_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t psubw_s (int32x2_t s, int32x2_t t);
+     int16x4_t psubh_s (int16x4_t s, int16x4_t t);
+     int8x8_t psubb_s (int8x8_t s, int8x8_t t);
+     uint64_t psubd_u (uint64_t s, uint64_t t);
+     int64_t psubd_s (int64_t s, int64_t t);
+     int16x4_t psubsh (int16x4_t s, int16x4_t t);
+     int8x8_t psubsb (int8x8_t s, int8x8_t t);
+     uint16x4_t psubush (uint16x4_t s, uint16x4_t t);
+     uint8x8_t psubusb (uint8x8_t s, uint8x8_t t);
+     uint32x2_t punpckhwd_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t punpckhhw_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t punpckhbh_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t punpckhwd_s (int32x2_t s, int32x2_t t);
+     int16x4_t punpckhhw_s (int16x4_t s, int16x4_t t);
+     int8x8_t punpckhbh_s (int8x8_t s, int8x8_t t);
+     uint32x2_t punpcklwd_u (uint32x2_t s, uint32x2_t t);
+     uint16x4_t punpcklhw_u (uint16x4_t s, uint16x4_t t);
+     uint8x8_t punpcklbh_u (uint8x8_t s, uint8x8_t t);
+     int32x2_t punpcklwd_s (int32x2_t s, int32x2_t t);
+     int16x4_t punpcklhw_s (int16x4_t s, int16x4_t t);
+     int8x8_t punpcklbh_s (int8x8_t s, int8x8_t t);
+
+* Menu:
+
+* Paired-Single Arithmetic::
+* Paired-Single Built-in Functions::
+* MIPS-3D Built-in Functions::
+
+
+File: gcc.info,  Node: Paired-Single Arithmetic,  Next: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
+
+6.52.9.1 Paired-Single Arithmetic
+.................................
+
+The table below lists the `v2sf' operations for which hardware support
+exists.  `a', `b' and `c' are `v2sf' values and `x' is an integral
+value.
+
+C code                               MIPS instruction
+`a + b'                              `add.ps'
+`a - b'                              `sub.ps'
+`-a'                                 `neg.ps'
+`a * b'                              `mul.ps'
+`a * b + c'                          `madd.ps'
+`a * b - c'                          `msub.ps'
+`-(a * b + c)'                       `nmadd.ps'
+`-(a * b - c)'                       `nmsub.ps'
+`x ? a : b'                          `movn.ps'/`movz.ps'
+
+ Note that the multiply-accumulate instructions can be disabled using
+the command-line option `-mno-fused-madd'.
+
+
+File: gcc.info,  Node: Paired-Single Built-in Functions,  Next: MIPS-3D Built-in Functions,  Prev: Paired-Single Arithmetic,  Up: MIPS Loongson Built-in Functions
+
+6.52.9.2 Paired-Single Built-in Functions
+.........................................
+
+The following paired-single functions map directly to a particular MIPS
+instruction.  Please refer to the architecture specification for
+details on what each instruction does.
+
+`v2sf __builtin_mips_pll_ps (v2sf, v2sf)'
+     Pair lower lower (`pll.ps').
+
+`v2sf __builtin_mips_pul_ps (v2sf, v2sf)'
+     Pair upper lower (`pul.ps').
+
+`v2sf __builtin_mips_plu_ps (v2sf, v2sf)'
+     Pair lower upper (`plu.ps').
+
+`v2sf __builtin_mips_puu_ps (v2sf, v2sf)'
+     Pair upper upper (`puu.ps').
+
+`v2sf __builtin_mips_cvt_ps_s (float, float)'
+     Convert pair to paired single (`cvt.ps.s').
+
+`float __builtin_mips_cvt_s_pl (v2sf)'
+     Convert pair lower to single (`cvt.s.pl').
+
+`float __builtin_mips_cvt_s_pu (v2sf)'
+     Convert pair upper to single (`cvt.s.pu').
+
+`v2sf __builtin_mips_abs_ps (v2sf)'
+     Absolute value (`abs.ps').
+
+`v2sf __builtin_mips_alnv_ps (v2sf, v2sf, int)'
+     Align variable (`alnv.ps').
+
+     _Note:_ The value of the third parameter must be 0 or 4 modulo 8,
+     otherwise the result will be unpredictable.  Please read the
+     instruction description for details.
+
+ The following multi-instruction functions are also available.  In each
+case, COND can be any of the 16 floating-point conditions: `f', `un',
+`eq', `ueq', `olt', `ult', `ole', `ule', `sf', `ngle', `seq', `ngl',
+`lt', `nge', `le' or `ngt'.
+
+`v2sf __builtin_mips_movt_c_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+`v2sf __builtin_mips_movf_c_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Conditional move based on floating point comparison (`c.COND.ps',
+     `movt.ps'/`movf.ps').
+
+     The `movt' functions return the value X computed by:
+
+          c.COND.ps CC,A,B
+          mov.ps X,C
+          movt.ps X,D,CC
+
+     The `movf' functions are similar but use `movf.ps' instead of
+     `movt.ps'.
+
+`int __builtin_mips_upper_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_lower_c_COND_ps (v2sf A, v2sf B)'
+     Comparison of two paired-single values (`c.COND.ps',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `c.COND.ps' and return
+     either the upper or lower half of the result.  For example:
+
+          v2sf a, b;
+          if (__builtin_mips_upper_c_eq_ps (a, b))
+            upper_halves_are_equal ();
+          else
+            upper_halves_are_unequal ();
+
+          if (__builtin_mips_lower_c_eq_ps (a, b))
+            lower_halves_are_equal ();
+          else
+            lower_halves_are_unequal ();
+
+
+File: gcc.info,  Node: MIPS-3D Built-in Functions,  Prev: Paired-Single Built-in Functions,  Up: MIPS Loongson Built-in Functions
+
+6.52.9.3 MIPS-3D Built-in Functions
+...................................
+
+The MIPS-3D Application-Specific Extension (ASE) includes additional
+paired-single instructions that are designed to improve the performance
+of 3D graphics operations.  Support for these instructions is controlled
+by the `-mips3d' command-line option.
+
+ The functions listed below map directly to a particular MIPS-3D
+instruction.  Please refer to the architecture specification for more
+details on what each instruction does.
+
+`v2sf __builtin_mips_addr_ps (v2sf, v2sf)'
+     Reduction add (`addr.ps').
+
+`v2sf __builtin_mips_mulr_ps (v2sf, v2sf)'
+     Reduction multiply (`mulr.ps').
+
+`v2sf __builtin_mips_cvt_pw_ps (v2sf)'
+     Convert paired single to paired word (`cvt.pw.ps').
+
+`v2sf __builtin_mips_cvt_ps_pw (v2sf)'
+     Convert paired word to paired single (`cvt.ps.pw').
+
+`float __builtin_mips_recip1_s (float)'
+`double __builtin_mips_recip1_d (double)'
+`v2sf __builtin_mips_recip1_ps (v2sf)'
+     Reduced precision reciprocal (sequence step 1) (`recip1.FMT').
+
+`float __builtin_mips_recip2_s (float, float)'
+`double __builtin_mips_recip2_d (double, double)'
+`v2sf __builtin_mips_recip2_ps (v2sf, v2sf)'
+     Reduced precision reciprocal (sequence step 2) (`recip2.FMT').
+
+`float __builtin_mips_rsqrt1_s (float)'
+`double __builtin_mips_rsqrt1_d (double)'
+`v2sf __builtin_mips_rsqrt1_ps (v2sf)'
+     Reduced precision reciprocal square root (sequence step 1)
+     (`rsqrt1.FMT').
+
+`float __builtin_mips_rsqrt2_s (float, float)'
+`double __builtin_mips_rsqrt2_d (double, double)'
+`v2sf __builtin_mips_rsqrt2_ps (v2sf, v2sf)'
+     Reduced precision reciprocal square root (sequence step 2)
+     (`rsqrt2.FMT').
+
+ The following multi-instruction functions are also available.  In each
+case, COND can be any of the 16 floating-point conditions: `f', `un',
+`eq', `ueq', `olt', `ult', `ole', `ule', `sf', `ngle', `seq', `ngl',
+`lt', `nge', `le' or `ngt'.
+
+`int __builtin_mips_cabs_COND_s (float A, float B)'
+`int __builtin_mips_cabs_COND_d (double A, double B)'
+     Absolute comparison of two scalar values (`cabs.COND.FMT',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `cabs.COND.s' or
+     `cabs.COND.d' and return the result as a boolean value.  For
+     example:
+
+          float a, b;
+          if (__builtin_mips_cabs_eq_s (a, b))
+            true ();
+          else
+            false ();
+
+`int __builtin_mips_upper_cabs_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_lower_cabs_COND_ps (v2sf A, v2sf B)'
+     Absolute comparison of two paired-single values (`cabs.COND.ps',
+     `bc1t'/`bc1f').
+
+     These functions compare A and B using `cabs.COND.ps' and return
+     either the upper or lower half of the result.  For example:
+
+          v2sf a, b;
+          if (__builtin_mips_upper_cabs_eq_ps (a, b))
+            upper_halves_are_equal ();
+          else
+            upper_halves_are_unequal ();
+
+          if (__builtin_mips_lower_cabs_eq_ps (a, b))
+            lower_halves_are_equal ();
+          else
+            lower_halves_are_unequal ();
+
+`v2sf __builtin_mips_movt_cabs_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+`v2sf __builtin_mips_movf_cabs_COND_ps (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Conditional move based on absolute comparison (`cabs.COND.ps',
+     `movt.ps'/`movf.ps').
+
+     The `movt' functions return the value X computed by:
+
+          cabs.COND.ps CC,A,B
+          mov.ps X,C
+          movt.ps X,D,CC
+
+     The `movf' functions are similar but use `movf.ps' instead of
+     `movt.ps'.
+
+`int __builtin_mips_any_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_all_c_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_any_cabs_COND_ps (v2sf A, v2sf B)'
+`int __builtin_mips_all_cabs_COND_ps (v2sf A, v2sf B)'
+     Comparison of two paired-single values (`c.COND.ps'/`cabs.COND.ps',
+     `bc1any2t'/`bc1any2f').
+
+     These functions compare A and B using `c.COND.ps' or
+     `cabs.COND.ps'.  The `any' forms return true if either result is
+     true and the `all' forms return true if both results are true.
+     For example:
+
+          v2sf a, b;
+          if (__builtin_mips_any_c_eq_ps (a, b))
+            one_is_true ();
+          else
+            both_are_false ();
+
+          if (__builtin_mips_all_c_eq_ps (a, b))
+            both_are_true ();
+          else
+            one_is_false ();
+
+`int __builtin_mips_any_c_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_all_c_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_any_cabs_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+`int __builtin_mips_all_cabs_COND_4s (v2sf A, v2sf B, v2sf C, v2sf D)'
+     Comparison of four paired-single values
+     (`c.COND.ps'/`cabs.COND.ps', `bc1any4t'/`bc1any4f').
+
+     These functions use `c.COND.ps' or `cabs.COND.ps' to compare A
+     with B and to compare C with D.  The `any' forms return true if
+     any of the four results are true and the `all' forms return true
+     if all four results are true.  For example:
+
+          v2sf a, b, c, d;
+          if (__builtin_mips_any_c_eq_4s (a, b, c, d))
+            some_are_true ();
+          else
+            all_are_false ();
+
+          if (__builtin_mips_all_c_eq_4s (a, b, c, d))
+            all_are_true ();
+          else
+            some_are_false ();
+
+
+File: gcc.info,  Node: picoChip Built-in Functions,  Next: PowerPC AltiVec/VSX Built-in Functions,  Prev: Other MIPS Built-in Functions,  Up: Target Builtins
+
+6.52.10 picoChip Built-in Functions
+-----------------------------------
+
+GCC provides an interface to selected machine instructions from the
+picoChip instruction set.
+
+`int __builtin_sbc (int VALUE)'
+     Sign bit count.  Return the number of consecutive bits in VALUE
+     which have the same value as the sign-bit.  The result is the
+     number of leading sign bits minus one, giving the number of
+     redundant sign bits in VALUE.
+
+`int __builtin_byteswap (int VALUE)'
+     Byte swap.  Return the result of swapping the upper and lower
+     bytes of VALUE.
+
+`int __builtin_brev (int VALUE)'
+     Bit reversal.  Return the result of reversing the bits in VALUE.
+     Bit 15 is swapped with bit 0, bit 14 is swapped with bit 1, and so
+     on.
+
+`int __builtin_adds (int X, int Y)'
+     Saturating addition.  Return the result of adding X and Y, storing
+     the value 32767 if the result overflows.
+
+`int __builtin_subs (int X, int Y)'
+     Saturating subtraction.  Return the result of subtracting Y from
+     X, storing the value -32768 if the result overflows.
+
+`void __builtin_halt (void)'
+     Halt.  The processor will stop execution.  This built-in is useful
+     for implementing assertions.
+
+
+
+File: gcc.info,  Node: Other MIPS Built-in Functions,  Next: picoChip Built-in Functions,  Prev: MIPS Loongson Built-in Functions,  Up: Target Builtins
+
+6.52.11 Other MIPS Built-in Functions
+-------------------------------------
+
+GCC provides other MIPS-specific built-in functions:
+
+`void __builtin_mips_cache (int OP, const volatile void *ADDR)'
+     Insert a `cache' instruction with operands OP and ADDR.  GCC
+     defines the preprocessor macro `___GCC_HAVE_BUILTIN_MIPS_CACHE'
+     when this function is available.
+
+
+File: gcc.info,  Node: PowerPC AltiVec/VSX Built-in Functions,  Next: RX Built-in Functions,  Prev: picoChip Built-in Functions,  Up: Target Builtins
+
+6.52.12 PowerPC AltiVec Built-in Functions
+------------------------------------------
+
+GCC provides an interface for the PowerPC family of processors to access
+the AltiVec operations described in Motorola's AltiVec Programming
+Interface Manual.  The interface is made available by including
+`<altivec.h>' and using `-maltivec' and `-mabi=altivec'.  The interface
+supports the following vector types.
+
+     vector unsigned char
+     vector signed char
+     vector bool char
+
+     vector unsigned short
+     vector signed short
+     vector bool short
+     vector pixel
+
+     vector unsigned int
+     vector signed int
+     vector bool int
+     vector float
+
+ If `-mvsx' is used the following additional vector types are
+implemented.
+
+     vector unsigned long
+     vector signed long
+     vector double
+
+ The long types are only implemented for 64-bit code generation, and
+the long type is only used in the floating point/integer conversion
+instructions.
+
+ GCC's implementation of the high-level language interface available
+from C and C++ code differs from Motorola's documentation in several
+ways.
+
+   * A vector constant is a list of constant expressions within curly
+     braces.
+
+   * A vector initializer requires no cast if the vector constant is of
+     the same type as the variable it is initializing.
+
+   * If `signed' or `unsigned' is omitted, the signedness of the vector
+     type is the default signedness of the base type.  The default
+     varies depending on the operating system, so a portable program
+     should always specify the signedness.
+
+   * Compiling with `-maltivec' adds keywords `__vector', `vector',
+     `__pixel', `pixel', `__bool' and `bool'.  When compiling ISO C,
+     the context-sensitive substitution of the keywords `vector',
+     `pixel' and `bool' is disabled.  To use them, you must include
+     `<altivec.h>' instead.
+
+   * GCC allows using a `typedef' name as the type specifier for a
+     vector type.
+
+   * For C, overloaded functions are implemented with macros so the
+     following does not work:
+
+            vec_add ((vector signed int){1, 2, 3, 4}, foo);
+
+     Since `vec_add' is a macro, the vector constant in the example is
+     treated as four separate arguments.  Wrap the entire argument in
+     parentheses for this to work.
+
+ _Note:_ Only the `<altivec.h>' interface is supported.  Internally,
+GCC uses built-in functions to achieve the functionality in the
+aforementioned header file, but they are not supported and are subject
+to change without notice.
+
+ The following interfaces are supported for the generic and specific
+AltiVec operations and the AltiVec predicates.  In cases where there is
+a direct mapping between generic and specific operations, only the
+generic names are shown here, although the specific operations can also
+be used.
+
+ Arguments that are documented as `const int' require literal integral
+values within the range required for that operation.
+
+     vector signed char vec_abs (vector signed char);
+     vector signed short vec_abs (vector signed short);
+     vector signed int vec_abs (vector signed int);
+     vector float vec_abs (vector float);
+
+     vector signed char vec_abss (vector signed char);
+     vector signed short vec_abss (vector signed short);
+     vector signed int vec_abss (vector signed int);
+
+     vector signed char vec_add (vector bool char, vector signed char);
+     vector signed char vec_add (vector signed char, vector bool char);
+     vector signed char vec_add (vector signed char, vector signed char);
+     vector unsigned char vec_add (vector bool char, vector unsigned char);
+     vector unsigned char vec_add (vector unsigned char, vector bool char);
+     vector unsigned char vec_add (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_add (vector bool short, vector signed short);
+     vector signed short vec_add (vector signed short, vector bool short);
+     vector signed short vec_add (vector signed short, vector signed short);
+     vector unsigned short vec_add (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_add (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_add (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_add (vector bool int, vector signed int);
+     vector signed int vec_add (vector signed int, vector bool int);
+     vector signed int vec_add (vector signed int, vector signed int);
+     vector unsigned int vec_add (vector bool int, vector unsigned int);
+     vector unsigned int vec_add (vector unsigned int, vector bool int);
+     vector unsigned int vec_add (vector unsigned int, vector unsigned int);
+     vector float vec_add (vector float, vector float);
+
+     vector float vec_vaddfp (vector float, vector float);
+
+     vector signed int vec_vadduwm (vector bool int, vector signed int);
+     vector signed int vec_vadduwm (vector signed int, vector bool int);
+     vector signed int vec_vadduwm (vector signed int, vector signed int);
+     vector unsigned int vec_vadduwm (vector bool int, vector unsigned int);
+     vector unsigned int vec_vadduwm (vector unsigned int, vector bool int);
+     vector unsigned int vec_vadduwm (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vadduhm (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vadduhm (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vadduhm (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_vadduhm (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vadduhm (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vadduhm (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vaddubm (vector bool char, vector signed char);
+     vector signed char vec_vaddubm (vector signed char, vector bool char);
+     vector signed char vec_vaddubm (vector signed char, vector signed char);
+     vector unsigned char vec_vaddubm (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vaddubm (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vaddubm (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_addc (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_adds (vector bool char, vector unsigned char);
+     vector unsigned char vec_adds (vector unsigned char, vector bool char);
+     vector unsigned char vec_adds (vector unsigned char,
+                                    vector unsigned char);
+     vector signed char vec_adds (vector bool char, vector signed char);
+     vector signed char vec_adds (vector signed char, vector bool char);
+     vector signed char vec_adds (vector signed char, vector signed char);
+     vector unsigned short vec_adds (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_adds (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_adds (vector unsigned short,
+                                     vector unsigned short);
+     vector signed short vec_adds (vector bool short, vector signed short);
+     vector signed short vec_adds (vector signed short, vector bool short);
+     vector signed short vec_adds (vector signed short, vector signed short);
+     vector unsigned int vec_adds (vector bool int, vector unsigned int);
+     vector unsigned int vec_adds (vector unsigned int, vector bool int);
+     vector unsigned int vec_adds (vector unsigned int, vector unsigned int);
+     vector signed int vec_adds (vector bool int, vector signed int);
+     vector signed int vec_adds (vector signed int, vector bool int);
+     vector signed int vec_adds (vector signed int, vector signed int);
+
+     vector signed int vec_vaddsws (vector bool int, vector signed int);
+     vector signed int vec_vaddsws (vector signed int, vector bool int);
+     vector signed int vec_vaddsws (vector signed int, vector signed int);
+
+     vector unsigned int vec_vadduws (vector bool int, vector unsigned int);
+     vector unsigned int vec_vadduws (vector unsigned int, vector bool int);
+     vector unsigned int vec_vadduws (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vaddshs (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vaddshs (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vaddshs (vector signed short,
+                                      vector signed short);
+
+     vector unsigned short vec_vadduhs (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vadduhs (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vadduhs (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vaddsbs (vector bool char, vector signed char);
+     vector signed char vec_vaddsbs (vector signed char, vector bool char);
+     vector signed char vec_vaddsbs (vector signed char, vector signed char);
+
+     vector unsigned char vec_vaddubs (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vaddubs (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vaddubs (vector unsigned char,
+                                       vector unsigned char);
+
+     vector float vec_and (vector float, vector float);
+     vector float vec_and (vector float, vector bool int);
+     vector float vec_and (vector bool int, vector float);
+     vector bool int vec_and (vector bool int, vector bool int);
+     vector signed int vec_and (vector bool int, vector signed int);
+     vector signed int vec_and (vector signed int, vector bool int);
+     vector signed int vec_and (vector signed int, vector signed int);
+     vector unsigned int vec_and (vector bool int, vector unsigned int);
+     vector unsigned int vec_and (vector unsigned int, vector bool int);
+     vector unsigned int vec_and (vector unsigned int, vector unsigned int);
+     vector bool short vec_and (vector bool short, vector bool short);
+     vector signed short vec_and (vector bool short, vector signed short);
+     vector signed short vec_and (vector signed short, vector bool short);
+     vector signed short vec_and (vector signed short, vector signed short);
+     vector unsigned short vec_and (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_and (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_and (vector unsigned short,
+                                    vector unsigned short);
+     vector signed char vec_and (vector bool char, vector signed char);
+     vector bool char vec_and (vector bool char, vector bool char);
+     vector signed char vec_and (vector signed char, vector bool char);
+     vector signed char vec_and (vector signed char, vector signed char);
+     vector unsigned char vec_and (vector bool char, vector unsigned char);
+     vector unsigned char vec_and (vector unsigned char, vector bool char);
+     vector unsigned char vec_and (vector unsigned char,
+                                   vector unsigned char);
+
+     vector float vec_andc (vector float, vector float);
+     vector float vec_andc (vector float, vector bool int);
+     vector float vec_andc (vector bool int, vector float);
+     vector bool int vec_andc (vector bool int, vector bool int);
+     vector signed int vec_andc (vector bool int, vector signed int);
+     vector signed int vec_andc (vector signed int, vector bool int);
+     vector signed int vec_andc (vector signed int, vector signed int);
+     vector unsigned int vec_andc (vector bool int, vector unsigned int);
+     vector unsigned int vec_andc (vector unsigned int, vector bool int);
+     vector unsigned int vec_andc (vector unsigned int, vector unsigned int);
+     vector bool short vec_andc (vector bool short, vector bool short);
+     vector signed short vec_andc (vector bool short, vector signed short);
+     vector signed short vec_andc (vector signed short, vector bool short);
+     vector signed short vec_andc (vector signed short, vector signed short);
+     vector unsigned short vec_andc (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_andc (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_andc (vector unsigned short,
+                                     vector unsigned short);
+     vector signed char vec_andc (vector bool char, vector signed char);
+     vector bool char vec_andc (vector bool char, vector bool char);
+     vector signed char vec_andc (vector signed char, vector bool char);
+     vector signed char vec_andc (vector signed char, vector signed char);
+     vector unsigned char vec_andc (vector bool char, vector unsigned char);
+     vector unsigned char vec_andc (vector unsigned char, vector bool char);
+     vector unsigned char vec_andc (vector unsigned char,
+                                    vector unsigned char);
+
+     vector unsigned char vec_avg (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_avg (vector signed char, vector signed char);
+     vector unsigned short vec_avg (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_avg (vector signed short, vector signed short);
+     vector unsigned int vec_avg (vector unsigned int, vector unsigned int);
+     vector signed int vec_avg (vector signed int, vector signed int);
+
+     vector signed int vec_vavgsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vavguw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vavgsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vavguh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vavgsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vavgub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector float vec_copysign (vector float);
+
+     vector float vec_ceil (vector float);
+
+     vector signed int vec_cmpb (vector float, vector float);
+
+     vector bool char vec_cmpeq (vector signed char, vector signed char);
+     vector bool char vec_cmpeq (vector unsigned char, vector unsigned char);
+     vector bool short vec_cmpeq (vector signed short, vector signed short);
+     vector bool short vec_cmpeq (vector unsigned short,
+                                  vector unsigned short);
+     vector bool int vec_cmpeq (vector signed int, vector signed int);
+     vector bool int vec_cmpeq (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmpeq (vector float, vector float);
+
+     vector bool int vec_vcmpeqfp (vector float, vector float);
+
+     vector bool int vec_vcmpequw (vector signed int, vector signed int);
+     vector bool int vec_vcmpequw (vector unsigned int, vector unsigned int);
+
+     vector bool short vec_vcmpequh (vector signed short,
+                                     vector signed short);
+     vector bool short vec_vcmpequh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector bool char vec_vcmpequb (vector signed char, vector signed char);
+     vector bool char vec_vcmpequb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector bool int vec_cmpge (vector float, vector float);
+
+     vector bool char vec_cmpgt (vector unsigned char, vector unsigned char);
+     vector bool char vec_cmpgt (vector signed char, vector signed char);
+     vector bool short vec_cmpgt (vector unsigned short,
+                                  vector unsigned short);
+     vector bool short vec_cmpgt (vector signed short, vector signed short);
+     vector bool int vec_cmpgt (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmpgt (vector signed int, vector signed int);
+     vector bool int vec_cmpgt (vector float, vector float);
+
+     vector bool int vec_vcmpgtfp (vector float, vector float);
+
+     vector bool int vec_vcmpgtsw (vector signed int, vector signed int);
+
+     vector bool int vec_vcmpgtuw (vector unsigned int, vector unsigned int);
+
+     vector bool short vec_vcmpgtsh (vector signed short,
+                                     vector signed short);
+
+     vector bool short vec_vcmpgtuh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector bool char vec_vcmpgtsb (vector signed char, vector signed char);
+
+     vector bool char vec_vcmpgtub (vector unsigned char,
+                                    vector unsigned char);
+
+     vector bool int vec_cmple (vector float, vector float);
+
+     vector bool char vec_cmplt (vector unsigned char, vector unsigned char);
+     vector bool char vec_cmplt (vector signed char, vector signed char);
+     vector bool short vec_cmplt (vector unsigned short,
+                                  vector unsigned short);
+     vector bool short vec_cmplt (vector signed short, vector signed short);
+     vector bool int vec_cmplt (vector unsigned int, vector unsigned int);
+     vector bool int vec_cmplt (vector signed int, vector signed int);
+     vector bool int vec_cmplt (vector float, vector float);
+
+     vector float vec_ctf (vector unsigned int, const int);
+     vector float vec_ctf (vector signed int, const int);
+
+     vector float vec_vcfsx (vector signed int, const int);
+
+     vector float vec_vcfux (vector unsigned int, const int);
+
+     vector signed int vec_cts (vector float, const int);
+
+     vector unsigned int vec_ctu (vector float, const int);
+
+     void vec_dss (const int);
+
+     void vec_dssall (void);
+
+     void vec_dst (const vector unsigned char *, int, const int);
+     void vec_dst (const vector signed char *, int, const int);
+     void vec_dst (const vector bool char *, int, const int);
+     void vec_dst (const vector unsigned short *, int, const int);
+     void vec_dst (const vector signed short *, int, const int);
+     void vec_dst (const vector bool short *, int, const int);
+     void vec_dst (const vector pixel *, int, const int);
+     void vec_dst (const vector unsigned int *, int, const int);
+     void vec_dst (const vector signed int *, int, const int);
+     void vec_dst (const vector bool int *, int, const int);
+     void vec_dst (const vector float *, int, const int);
+     void vec_dst (const unsigned char *, int, const int);
+     void vec_dst (const signed char *, int, const int);
+     void vec_dst (const unsigned short *, int, const int);
+     void vec_dst (const short *, int, const int);
+     void vec_dst (const unsigned int *, int, const int);
+     void vec_dst (const int *, int, const int);
+     void vec_dst (const unsigned long *, int, const int);
+     void vec_dst (const long *, int, const int);
+     void vec_dst (const float *, int, const int);
+
+     void vec_dstst (const vector unsigned char *, int, const int);
+     void vec_dstst (const vector signed char *, int, const int);
+     void vec_dstst (const vector bool char *, int, const int);
+     void vec_dstst (const vector unsigned short *, int, const int);
+     void vec_dstst (const vector signed short *, int, const int);
+     void vec_dstst (const vector bool short *, int, const int);
+     void vec_dstst (const vector pixel *, int, const int);
+     void vec_dstst (const vector unsigned int *, int, const int);
+     void vec_dstst (const vector signed int *, int, const int);
+     void vec_dstst (const vector bool int *, int, const int);
+     void vec_dstst (const vector float *, int, const int);
+     void vec_dstst (const unsigned char *, int, const int);
+     void vec_dstst (const signed char *, int, const int);
+     void vec_dstst (const unsigned short *, int, const int);
+     void vec_dstst (const short *, int, const int);
+     void vec_dstst (const unsigned int *, int, const int);
+     void vec_dstst (const int *, int, const int);
+     void vec_dstst (const unsigned long *, int, const int);
+     void vec_dstst (const long *, int, const int);
+     void vec_dstst (const float *, int, const int);
+
+     void vec_dststt (const vector unsigned char *, int, const int);
+     void vec_dststt (const vector signed char *, int, const int);
+     void vec_dststt (const vector bool char *, int, const int);
+     void vec_dststt (const vector unsigned short *, int, const int);
+     void vec_dststt (const vector signed short *, int, const int);
+     void vec_dststt (const vector bool short *, int, const int);
+     void vec_dststt (const vector pixel *, int, const int);
+     void vec_dststt (const vector unsigned int *, int, const int);
+     void vec_dststt (const vector signed int *, int, const int);
+     void vec_dststt (const vector bool int *, int, const int);
+     void vec_dststt (const vector float *, int, const int);
+     void vec_dststt (const unsigned char *, int, const int);
+     void vec_dststt (const signed char *, int, const int);
+     void vec_dststt (const unsigned short *, int, const int);
+     void vec_dststt (const short *, int, const int);
+     void vec_dststt (const unsigned int *, int, const int);
+     void vec_dststt (const int *, int, const int);
+     void vec_dststt (const unsigned long *, int, const int);
+     void vec_dststt (const long *, int, const int);
+     void vec_dststt (const float *, int, const int);
+
+     void vec_dstt (const vector unsigned char *, int, const int);
+     void vec_dstt (const vector signed char *, int, const int);
+     void vec_dstt (const vector bool char *, int, const int);
+     void vec_dstt (const vector unsigned short *, int, const int);
+     void vec_dstt (const vector signed short *, int, const int);
+     void vec_dstt (const vector bool short *, int, const int);
+     void vec_dstt (const vector pixel *, int, const int);
+     void vec_dstt (const vector unsigned int *, int, const int);
+     void vec_dstt (const vector signed int *, int, const int);
+     void vec_dstt (const vector bool int *, int, const int);
+     void vec_dstt (const vector float *, int, const int);
+     void vec_dstt (const unsigned char *, int, const int);
+     void vec_dstt (const signed char *, int, const int);
+     void vec_dstt (const unsigned short *, int, const int);
+     void vec_dstt (const short *, int, const int);
+     void vec_dstt (const unsigned int *, int, const int);
+     void vec_dstt (const int *, int, const int);
+     void vec_dstt (const unsigned long *, int, const int);
+     void vec_dstt (const long *, int, const int);
+     void vec_dstt (const float *, int, const int);
+
+     vector float vec_expte (vector float);
+
+     vector float vec_floor (vector float);
+
+     vector float vec_ld (int, const vector float *);
+     vector float vec_ld (int, const float *);
+     vector bool int vec_ld (int, const vector bool int *);
+     vector signed int vec_ld (int, const vector signed int *);
+     vector signed int vec_ld (int, const int *);
+     vector signed int vec_ld (int, const long *);
+     vector unsigned int vec_ld (int, const vector unsigned int *);
+     vector unsigned int vec_ld (int, const unsigned int *);
+     vector unsigned int vec_ld (int, const unsigned long *);
+     vector bool short vec_ld (int, const vector bool short *);
+     vector pixel vec_ld (int, const vector pixel *);
+     vector signed short vec_ld (int, const vector signed short *);
+     vector signed short vec_ld (int, const short *);
+     vector unsigned short vec_ld (int, const vector unsigned short *);
+     vector unsigned short vec_ld (int, const unsigned short *);
+     vector bool char vec_ld (int, const vector bool char *);
+     vector signed char vec_ld (int, const vector signed char *);
+     vector signed char vec_ld (int, const signed char *);
+     vector unsigned char vec_ld (int, const vector unsigned char *);
+     vector unsigned char vec_ld (int, const unsigned char *);
+
+     vector signed char vec_lde (int, const signed char *);
+     vector unsigned char vec_lde (int, const unsigned char *);
+     vector signed short vec_lde (int, const short *);
+     vector unsigned short vec_lde (int, const unsigned short *);
+     vector float vec_lde (int, const float *);
+     vector signed int vec_lde (int, const int *);
+     vector unsigned int vec_lde (int, const unsigned int *);
+     vector signed int vec_lde (int, const long *);
+     vector unsigned int vec_lde (int, const unsigned long *);
+
+     vector float vec_lvewx (int, float *);
+     vector signed int vec_lvewx (int, int *);
+     vector unsigned int vec_lvewx (int, unsigned int *);
+     vector signed int vec_lvewx (int, long *);
+     vector unsigned int vec_lvewx (int, unsigned long *);
+
+     vector signed short vec_lvehx (int, short *);
+     vector unsigned short vec_lvehx (int, unsigned short *);
+
+     vector signed char vec_lvebx (int, char *);
+     vector unsigned char vec_lvebx (int, unsigned char *);
+
+     vector float vec_ldl (int, const vector float *);
+     vector float vec_ldl (int, const float *);
+     vector bool int vec_ldl (int, const vector bool int *);
+     vector signed int vec_ldl (int, const vector signed int *);
+     vector signed int vec_ldl (int, const int *);
+     vector signed int vec_ldl (int, const long *);
+     vector unsigned int vec_ldl (int, const vector unsigned int *);
+     vector unsigned int vec_ldl (int, const unsigned int *);
+     vector unsigned int vec_ldl (int, const unsigned long *);
+     vector bool short vec_ldl (int, const vector bool short *);
+     vector pixel vec_ldl (int, const vector pixel *);
+     vector signed short vec_ldl (int, const vector signed short *);
+     vector signed short vec_ldl (int, const short *);
+     vector unsigned short vec_ldl (int, const vector unsigned short *);
+     vector unsigned short vec_ldl (int, const unsigned short *);
+     vector bool char vec_ldl (int, const vector bool char *);
+     vector signed char vec_ldl (int, const vector signed char *);
+     vector signed char vec_ldl (int, const signed char *);
+     vector unsigned char vec_ldl (int, const vector unsigned char *);
+     vector unsigned char vec_ldl (int, const unsigned char *);
+
+     vector float vec_loge (vector float);
+
+     vector unsigned char vec_lvsl (int, const volatile unsigned char *);
+     vector unsigned char vec_lvsl (int, const volatile signed char *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned short *);
+     vector unsigned char vec_lvsl (int, const volatile short *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned int *);
+     vector unsigned char vec_lvsl (int, const volatile int *);
+     vector unsigned char vec_lvsl (int, const volatile unsigned long *);
+     vector unsigned char vec_lvsl (int, const volatile long *);
+     vector unsigned char vec_lvsl (int, const volatile float *);
+
+     vector unsigned char vec_lvsr (int, const volatile unsigned char *);
+     vector unsigned char vec_lvsr (int, const volatile signed char *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned short *);
+     vector unsigned char vec_lvsr (int, const volatile short *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned int *);
+     vector unsigned char vec_lvsr (int, const volatile int *);
+     vector unsigned char vec_lvsr (int, const volatile unsigned long *);
+     vector unsigned char vec_lvsr (int, const volatile long *);
+     vector unsigned char vec_lvsr (int, const volatile float *);
+
+     vector float vec_madd (vector float, vector float, vector float);
+
+     vector signed short vec_madds (vector signed short,
+                                    vector signed short,
+                                    vector signed short);
+
+     vector unsigned char vec_max (vector bool char, vector unsigned char);
+     vector unsigned char vec_max (vector unsigned char, vector bool char);
+     vector unsigned char vec_max (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_max (vector bool char, vector signed char);
+     vector signed char vec_max (vector signed char, vector bool char);
+     vector signed char vec_max (vector signed char, vector signed char);
+     vector unsigned short vec_max (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_max (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_max (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_max (vector bool short, vector signed short);
+     vector signed short vec_max (vector signed short, vector bool short);
+     vector signed short vec_max (vector signed short, vector signed short);
+     vector unsigned int vec_max (vector bool int, vector unsigned int);
+     vector unsigned int vec_max (vector unsigned int, vector bool int);
+     vector unsigned int vec_max (vector unsigned int, vector unsigned int);
+     vector signed int vec_max (vector bool int, vector signed int);
+     vector signed int vec_max (vector signed int, vector bool int);
+     vector signed int vec_max (vector signed int, vector signed int);
+     vector float vec_max (vector float, vector float);
+
+     vector float vec_vmaxfp (vector float, vector float);
+
+     vector signed int vec_vmaxsw (vector bool int, vector signed int);
+     vector signed int vec_vmaxsw (vector signed int, vector bool int);
+     vector signed int vec_vmaxsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vmaxuw (vector bool int, vector unsigned int);
+     vector unsigned int vec_vmaxuw (vector unsigned int, vector bool int);
+     vector unsigned int vec_vmaxuw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vmaxsh (vector bool short, vector signed short);
+     vector signed short vec_vmaxsh (vector signed short, vector bool short);
+     vector signed short vec_vmaxsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vmaxuh (vector bool short,
+                                       vector unsigned short);
+     vector unsigned short vec_vmaxuh (vector unsigned short,
+                                       vector bool short);
+     vector unsigned short vec_vmaxuh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vmaxsb (vector bool char, vector signed char);
+     vector signed char vec_vmaxsb (vector signed char, vector bool char);
+     vector signed char vec_vmaxsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vmaxub (vector bool char,
+                                      vector unsigned char);
+     vector unsigned char vec_vmaxub (vector unsigned char,
+                                      vector bool char);
+     vector unsigned char vec_vmaxub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector bool char vec_mergeh (vector bool char, vector bool char);
+     vector signed char vec_mergeh (vector signed char, vector signed char);
+     vector unsigned char vec_mergeh (vector unsigned char,
+                                      vector unsigned char);
+     vector bool short vec_mergeh (vector bool short, vector bool short);
+     vector pixel vec_mergeh (vector pixel, vector pixel);
+     vector signed short vec_mergeh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_mergeh (vector unsigned short,
+                                       vector unsigned short);
+     vector float vec_mergeh (vector float, vector float);
+     vector bool int vec_mergeh (vector bool int, vector bool int);
+     vector signed int vec_mergeh (vector signed int, vector signed int);
+     vector unsigned int vec_mergeh (vector unsigned int,
+                                     vector unsigned int);
+
+     vector float vec_vmrghw (vector float, vector float);
+     vector bool int vec_vmrghw (vector bool int, vector bool int);
+     vector signed int vec_vmrghw (vector signed int, vector signed int);
+     vector unsigned int vec_vmrghw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector bool short vec_vmrghh (vector bool short, vector bool short);
+     vector signed short vec_vmrghh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_vmrghh (vector unsigned short,
+                                       vector unsigned short);
+     vector pixel vec_vmrghh (vector pixel, vector pixel);
+
+     vector bool char vec_vmrghb (vector bool char, vector bool char);
+     vector signed char vec_vmrghb (vector signed char, vector signed char);
+     vector unsigned char vec_vmrghb (vector unsigned char,
+                                      vector unsigned char);
+
+     vector bool char vec_mergel (vector bool char, vector bool char);
+     vector signed char vec_mergel (vector signed char, vector signed char);
+     vector unsigned char vec_mergel (vector unsigned char,
+                                      vector unsigned char);
+     vector bool short vec_mergel (vector bool short, vector bool short);
+     vector pixel vec_mergel (vector pixel, vector pixel);
+     vector signed short vec_mergel (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_mergel (vector unsigned short,
+                                       vector unsigned short);
+     vector float vec_mergel (vector float, vector float);
+     vector bool int vec_mergel (vector bool int, vector bool int);
+     vector signed int vec_mergel (vector signed int, vector signed int);
+     vector unsigned int vec_mergel (vector unsigned int,
+                                     vector unsigned int);
+
+     vector float vec_vmrglw (vector float, vector float);
+     vector signed int vec_vmrglw (vector signed int, vector signed int);
+     vector unsigned int vec_vmrglw (vector unsigned int,
+                                     vector unsigned int);
+     vector bool int vec_vmrglw (vector bool int, vector bool int);
+
+     vector bool short vec_vmrglh (vector bool short, vector bool short);
+     vector signed short vec_vmrglh (vector signed short,
+                                     vector signed short);
+     vector unsigned short vec_vmrglh (vector unsigned short,
+                                       vector unsigned short);
+     vector pixel vec_vmrglh (vector pixel, vector pixel);
+
+     vector bool char vec_vmrglb (vector bool char, vector bool char);
+     vector signed char vec_vmrglb (vector signed char, vector signed char);
+     vector unsigned char vec_vmrglb (vector unsigned char,
+                                      vector unsigned char);
+
+     vector unsigned short vec_mfvscr (void);
+
+     vector unsigned char vec_min (vector bool char, vector unsigned char);
+     vector unsigned char vec_min (vector unsigned char, vector bool char);
+     vector unsigned char vec_min (vector unsigned char,
+                                   vector unsigned char);
+     vector signed char vec_min (vector bool char, vector signed char);
+     vector signed char vec_min (vector signed char, vector bool char);
+     vector signed char vec_min (vector signed char, vector signed char);
+     vector unsigned short vec_min (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_min (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_min (vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_min (vector bool short, vector signed short);
+     vector signed short vec_min (vector signed short, vector bool short);
+     vector signed short vec_min (vector signed short, vector signed short);
+     vector unsigned int vec_min (vector bool int, vector unsigned int);
+     vector unsigned int vec_min (vector unsigned int, vector bool int);
+     vector unsigned int vec_min (vector unsigned int, vector unsigned int);
+     vector signed int vec_min (vector bool int, vector signed int);
+     vector signed int vec_min (vector signed int, vector bool int);
+     vector signed int vec_min (vector signed int, vector signed int);
+     vector float vec_min (vector float, vector float);
+
+     vector float vec_vminfp (vector float, vector float);
+
+     vector signed int vec_vminsw (vector bool int, vector signed int);
+     vector signed int vec_vminsw (vector signed int, vector bool int);
+     vector signed int vec_vminsw (vector signed int, vector signed int);
+
+     vector unsigned int vec_vminuw (vector bool int, vector unsigned int);
+     vector unsigned int vec_vminuw (vector unsigned int, vector bool int);
+     vector unsigned int vec_vminuw (vector unsigned int,
+                                     vector unsigned int);
+
+     vector signed short vec_vminsh (vector bool short, vector signed short);
+     vector signed short vec_vminsh (vector signed short, vector bool short);
+     vector signed short vec_vminsh (vector signed short,
+                                     vector signed short);
+
+     vector unsigned short vec_vminuh (vector bool short,
+                                       vector unsigned short);
+     vector unsigned short vec_vminuh (vector unsigned short,
+                                       vector bool short);
+     vector unsigned short vec_vminuh (vector unsigned short,
+                                       vector unsigned short);
+
+     vector signed char vec_vminsb (vector bool char, vector signed char);
+     vector signed char vec_vminsb (vector signed char, vector bool char);
+     vector signed char vec_vminsb (vector signed char, vector signed char);
+
+     vector unsigned char vec_vminub (vector bool char,
+                                      vector unsigned char);
+     vector unsigned char vec_vminub (vector unsigned char,
+                                      vector bool char);
+     vector unsigned char vec_vminub (vector unsigned char,
+                                      vector unsigned char);
+
+     vector signed short vec_mladd (vector signed short,
+                                    vector signed short,
+                                    vector signed short);
+     vector signed short vec_mladd (vector signed short,
+                                    vector unsigned short,
+                                    vector unsigned short);
+     vector signed short vec_mladd (vector unsigned short,
+                                    vector signed short,
+                                    vector signed short);
+     vector unsigned short vec_mladd (vector unsigned short,
+                                      vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_mradds (vector signed short,
+                                     vector signed short,
+                                     vector signed short);
+
+     vector unsigned int vec_msum (vector unsigned char,
+                                   vector unsigned char,
+                                   vector unsigned int);
+     vector signed int vec_msum (vector signed char,
+                                 vector unsigned char,
+                                 vector signed int);
+     vector unsigned int vec_msum (vector unsigned short,
+                                   vector unsigned short,
+                                   vector unsigned int);
+     vector signed int vec_msum (vector signed short,
+                                 vector signed short,
+                                 vector signed int);
+
+     vector signed int vec_vmsumshm (vector signed short,
+                                     vector signed short,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumuhm (vector unsigned short,
+                                       vector unsigned short,
+                                       vector unsigned int);
+
+     vector signed int vec_vmsummbm (vector signed char,
+                                     vector unsigned char,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumubm (vector unsigned char,
+                                       vector unsigned char,
+                                       vector unsigned int);
+
+     vector unsigned int vec_msums (vector unsigned short,
+                                    vector unsigned short,
+                                    vector unsigned int);
+     vector signed int vec_msums (vector signed short,
+                                  vector signed short,
+                                  vector signed int);
+
+     vector signed int vec_vmsumshs (vector signed short,
+                                     vector signed short,
+                                     vector signed int);
+
+     vector unsigned int vec_vmsumuhs (vector unsigned short,
+                                       vector unsigned short,
+                                       vector unsigned int);
+
+     void vec_mtvscr (vector signed int);
+     void vec_mtvscr (vector unsigned int);
+     void vec_mtvscr (vector bool int);
+     void vec_mtvscr (vector signed short);
+     void vec_mtvscr (vector unsigned short);
+     void vec_mtvscr (vector bool short);
+     void vec_mtvscr (vector pixel);
+     void vec_mtvscr (vector signed char);
+     void vec_mtvscr (vector unsigned char);
+     void vec_mtvscr (vector bool char);
+
+     vector unsigned short vec_mule (vector unsigned char,
+                                     vector unsigned char);
+     vector signed short vec_mule (vector signed char,
+                                   vector signed char);
+     vector unsigned int vec_mule (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_mule (vector signed short, vector signed short);
+
+     vector signed int vec_vmulesh (vector signed short,
+                                    vector signed short);
+
+     vector unsigned int vec_vmuleuh (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_vmulesb (vector signed char,
+                                      vector signed char);
+
+     vector unsigned short vec_vmuleub (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned short vec_mulo (vector unsigned char,
+                                     vector unsigned char);
+     vector signed short vec_mulo (vector signed char, vector signed char);
+     vector unsigned int vec_mulo (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_mulo (vector signed short, vector signed short);
+
+     vector signed int vec_vmulosh (vector signed short,
+                                    vector signed short);
+
+     vector unsigned int vec_vmulouh (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed short vec_vmulosb (vector signed char,
+                                      vector signed char);
+
+     vector unsigned short vec_vmuloub (vector unsigned char,
+                                        vector unsigned char);
+
+     vector float vec_nmsub (vector float, vector float, vector float);
+
+     vector float vec_nor (vector float, vector float);
+     vector signed int vec_nor (vector signed int, vector signed int);
+     vector unsigned int vec_nor (vector unsigned int, vector unsigned int);
+     vector bool int vec_nor (vector bool int, vector bool int);
+     vector signed short vec_nor (vector signed short, vector signed short);
+     vector unsigned short vec_nor (vector unsigned short,
+                                    vector unsigned short);
+     vector bool short vec_nor (vector bool short, vector bool short);
+     vector signed char vec_nor (vector signed char, vector signed char);
+     vector unsigned char vec_nor (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_nor (vector bool char, vector bool char);
+
+     vector float vec_or (vector float, vector float);
+     vector float vec_or (vector float, vector bool int);
+     vector float vec_or (vector bool int, vector float);
+     vector bool int vec_or (vector bool int, vector bool int);
+     vector signed int vec_or (vector bool int, vector signed int);
+     vector signed int vec_or (vector signed int, vector bool int);
+     vector signed int vec_or (vector signed int, vector signed int);
+     vector unsigned int vec_or (vector bool int, vector unsigned int);
+     vector unsigned int vec_or (vector unsigned int, vector bool int);
+     vector unsigned int vec_or (vector unsigned int, vector unsigned int);
+     vector bool short vec_or (vector bool short, vector bool short);
+     vector signed short vec_or (vector bool short, vector signed short);
+     vector signed short vec_or (vector signed short, vector bool short);
+     vector signed short vec_or (vector signed short, vector signed short);
+     vector unsigned short vec_or (vector bool short, vector unsigned short);
+     vector unsigned short vec_or (vector unsigned short, vector bool short);
+     vector unsigned short vec_or (vector unsigned short,
+                                   vector unsigned short);
+     vector signed char vec_or (vector bool char, vector signed char);
+     vector bool char vec_or (vector bool char, vector bool char);
+     vector signed char vec_or (vector signed char, vector bool char);
+     vector signed char vec_or (vector signed char, vector signed char);
+     vector unsigned char vec_or (vector bool char, vector unsigned char);
+     vector unsigned char vec_or (vector unsigned char, vector bool char);
+     vector unsigned char vec_or (vector unsigned char,
+                                  vector unsigned char);
+
+     vector signed char vec_pack (vector signed short, vector signed short);
+     vector unsigned char vec_pack (vector unsigned short,
+                                    vector unsigned short);
+     vector bool char vec_pack (vector bool short, vector bool short);
+     vector signed short vec_pack (vector signed int, vector signed int);
+     vector unsigned short vec_pack (vector unsigned int,
+                                     vector unsigned int);
+     vector bool short vec_pack (vector bool int, vector bool int);
+
+     vector bool short vec_vpkuwum (vector bool int, vector bool int);
+     vector signed short vec_vpkuwum (vector signed int, vector signed int);
+     vector unsigned short vec_vpkuwum (vector unsigned int,
+                                        vector unsigned int);
+
+     vector bool char vec_vpkuhum (vector bool short, vector bool short);
+     vector signed char vec_vpkuhum (vector signed short,
+                                     vector signed short);
+     vector unsigned char vec_vpkuhum (vector unsigned short,
+                                       vector unsigned short);
+
+     vector pixel vec_packpx (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_packs (vector unsigned short,
+                                     vector unsigned short);
+     vector signed char vec_packs (vector signed short, vector signed short);
+     vector unsigned short vec_packs (vector unsigned int,
+                                      vector unsigned int);
+     vector signed short vec_packs (vector signed int, vector signed int);
+
+     vector signed short vec_vpkswss (vector signed int, vector signed int);
+
+     vector unsigned short vec_vpkuwus (vector unsigned int,
+                                        vector unsigned int);
+
+     vector signed char vec_vpkshss (vector signed short,
+                                     vector signed short);
+
+     vector unsigned char vec_vpkuhus (vector unsigned short,
+                                       vector unsigned short);
+
+     vector unsigned char vec_packsu (vector unsigned short,
+                                      vector unsigned short);
+     vector unsigned char vec_packsu (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_packsu (vector unsigned int,
+                                       vector unsigned int);
+     vector unsigned short vec_packsu (vector signed int, vector signed int);
+
+     vector unsigned short vec_vpkswus (vector signed int,
+                                        vector signed int);
+
+     vector unsigned char vec_vpkshus (vector signed short,
+                                       vector signed short);
+
+     vector float vec_perm (vector float,
+                            vector float,
+                            vector unsigned char);
+     vector signed int vec_perm (vector signed int,
+                                 vector signed int,
+                                 vector unsigned char);
+     vector unsigned int vec_perm (vector unsigned int,
+                                   vector unsigned int,
+                                   vector unsigned char);
+     vector bool int vec_perm (vector bool int,
+                               vector bool int,
+                               vector unsigned char);
+     vector signed short vec_perm (vector signed short,
+                                   vector signed short,
+                                   vector unsigned char);
+     vector unsigned short vec_perm (vector unsigned short,
+                                     vector unsigned short,
+                                     vector unsigned char);
+     vector bool short vec_perm (vector bool short,
+                                 vector bool short,
+                                 vector unsigned char);
+     vector pixel vec_perm (vector pixel,
+                            vector pixel,
+                            vector unsigned char);
+     vector signed char vec_perm (vector signed char,
+                                  vector signed char,
+                                  vector unsigned char);
+     vector unsigned char vec_perm (vector unsigned char,
+                                    vector unsigned char,
+                                    vector unsigned char);
+     vector bool char vec_perm (vector bool char,
+                                vector bool char,
+                                vector unsigned char);
+
+     vector float vec_re (vector float);
+
+     vector signed char vec_rl (vector signed char,
+                                vector unsigned char);
+     vector unsigned char vec_rl (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_rl (vector signed short, vector unsigned short);
+     vector unsigned short vec_rl (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_rl (vector signed int, vector unsigned int);
+     vector unsigned int vec_rl (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vrlw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vrlw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vrlh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vrlh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vrlb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vrlb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector float vec_round (vector float);
+
+     vector float vec_rsqrte (vector float);
+
+     vector float vec_sel (vector float, vector float, vector bool int);
+     vector float vec_sel (vector float, vector float, vector unsigned int);
+     vector signed int vec_sel (vector signed int,
+                                vector signed int,
+                                vector bool int);
+     vector signed int vec_sel (vector signed int,
+                                vector signed int,
+                                vector unsigned int);
+     vector unsigned int vec_sel (vector unsigned int,
+                                  vector unsigned int,
+                                  vector bool int);
+     vector unsigned int vec_sel (vector unsigned int,
+                                  vector unsigned int,
+                                  vector unsigned int);
+     vector bool int vec_sel (vector bool int,
+                              vector bool int,
+                              vector bool int);
+     vector bool int vec_sel (vector bool int,
+                              vector bool int,
+                              vector unsigned int);
+     vector signed short vec_sel (vector signed short,
+                                  vector signed short,
+                                  vector bool short);
+     vector signed short vec_sel (vector signed short,
+                                  vector signed short,
+                                  vector unsigned short);
+     vector unsigned short vec_sel (vector unsigned short,
+                                    vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_sel (vector unsigned short,
+                                    vector unsigned short,
+                                    vector unsigned short);
+     vector bool short vec_sel (vector bool short,
+                                vector bool short,
+                                vector bool short);
+     vector bool short vec_sel (vector bool short,
+                                vector bool short,
+                                vector unsigned short);
+     vector signed char vec_sel (vector signed char,
+                                 vector signed char,
+                                 vector bool char);
+     vector signed char vec_sel (vector signed char,
+                                 vector signed char,
+                                 vector unsigned char);
+     vector unsigned char vec_sel (vector unsigned char,
+                                   vector unsigned char,
+                                   vector bool char);
+     vector unsigned char vec_sel (vector unsigned char,
+                                   vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_sel (vector bool char,
+                               vector bool char,
+                               vector bool char);
+     vector bool char vec_sel (vector bool char,
+                               vector bool char,
+                               vector unsigned char);
+
+     vector signed char vec_sl (vector signed char,
+                                vector unsigned char);
+     vector unsigned char vec_sl (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_sl (vector signed short, vector unsigned short);
+     vector unsigned short vec_sl (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_sl (vector signed int, vector unsigned int);
+     vector unsigned int vec_sl (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vslw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vslw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vslh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vslh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vslb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vslb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector float vec_sld (vector float, vector float, const int);
+     vector signed int vec_sld (vector signed int,
+                                vector signed int,
+                                const int);
+     vector unsigned int vec_sld (vector unsigned int,
+                                  vector unsigned int,
+                                  const int);
+     vector bool int vec_sld (vector bool int,
+                              vector bool int,
+                              const int);
+     vector signed short vec_sld (vector signed short,
+                                  vector signed short,
+                                  const int);
+     vector unsigned short vec_sld (vector unsigned short,
+                                    vector unsigned short,
+                                    const int);
+     vector bool short vec_sld (vector bool short,
+                                vector bool short,
+                                const int);
+     vector pixel vec_sld (vector pixel,
+                           vector pixel,
+                           const int);
+     vector signed char vec_sld (vector signed char,
+                                 vector signed char,
+                                 const int);
+     vector unsigned char vec_sld (vector unsigned char,
+                                   vector unsigned char,
+                                   const int);
+     vector bool char vec_sld (vector bool char,
+                               vector bool char,
+                               const int);
+
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned int);
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned short);
+     vector signed int vec_sll (vector signed int,
+                                vector unsigned char);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned int);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned short);
+     vector unsigned int vec_sll (vector unsigned int,
+                                  vector unsigned char);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned int);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned short);
+     vector bool int vec_sll (vector bool int,
+                              vector unsigned char);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned int);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned short);
+     vector signed short vec_sll (vector signed short,
+                                  vector unsigned char);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned int);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned short);
+     vector unsigned short vec_sll (vector unsigned short,
+                                    vector unsigned char);
+     vector bool short vec_sll (vector bool short, vector unsigned int);
+     vector bool short vec_sll (vector bool short, vector unsigned short);
+     vector bool short vec_sll (vector bool short, vector unsigned char);
+     vector pixel vec_sll (vector pixel, vector unsigned int);
+     vector pixel vec_sll (vector pixel, vector unsigned short);
+     vector pixel vec_sll (vector pixel, vector unsigned char);
+     vector signed char vec_sll (vector signed char, vector unsigned int);
+     vector signed char vec_sll (vector signed char, vector unsigned short);
+     vector signed char vec_sll (vector signed char, vector unsigned char);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned int);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned short);
+     vector unsigned char vec_sll (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_sll (vector bool char, vector unsigned int);
+     vector bool char vec_sll (vector bool char, vector unsigned short);
+     vector bool char vec_sll (vector bool char, vector unsigned char);
+
+     vector float vec_slo (vector float, vector signed char);
+     vector float vec_slo (vector float, vector unsigned char);
+     vector signed int vec_slo (vector signed int, vector signed char);
+     vector signed int vec_slo (vector signed int, vector unsigned char);
+     vector unsigned int vec_slo (vector unsigned int, vector signed char);
+     vector unsigned int vec_slo (vector unsigned int, vector unsigned char);
+     vector signed short vec_slo (vector signed short, vector signed char);
+     vector signed short vec_slo (vector signed short, vector unsigned char);
+     vector unsigned short vec_slo (vector unsigned short,
+                                    vector signed char);
+     vector unsigned short vec_slo (vector unsigned short,
+                                    vector unsigned char);
+     vector pixel vec_slo (vector pixel, vector signed char);
+     vector pixel vec_slo (vector pixel, vector unsigned char);
+     vector signed char vec_slo (vector signed char, vector signed char);
+     vector signed char vec_slo (vector signed char, vector unsigned char);
+     vector unsigned char vec_slo (vector unsigned char, vector signed char);
+     vector unsigned char vec_slo (vector unsigned char,
+                                   vector unsigned char);
+
+     vector signed char vec_splat (vector signed char, const int);
+     vector unsigned char vec_splat (vector unsigned char, const int);
+     vector bool char vec_splat (vector bool char, const int);
+     vector signed short vec_splat (vector signed short, const int);
+     vector unsigned short vec_splat (vector unsigned short, const int);
+     vector bool short vec_splat (vector bool short, const int);
+     vector pixel vec_splat (vector pixel, const int);
+     vector float vec_splat (vector float, const int);
+     vector signed int vec_splat (vector signed int, const int);
+     vector unsigned int vec_splat (vector unsigned int, const int);
+     vector bool int vec_splat (vector bool int, const int);
+
+     vector float vec_vspltw (vector float, const int);
+     vector signed int vec_vspltw (vector signed int, const int);
+     vector unsigned int vec_vspltw (vector unsigned int, const int);
+     vector bool int vec_vspltw (vector bool int, const int);
+
+     vector bool short vec_vsplth (vector bool short, const int);
+     vector signed short vec_vsplth (vector signed short, const int);
+     vector unsigned short vec_vsplth (vector unsigned short, const int);
+     vector pixel vec_vsplth (vector pixel, const int);
+
+     vector signed char vec_vspltb (vector signed char, const int);
+     vector unsigned char vec_vspltb (vector unsigned char, const int);
+     vector bool char vec_vspltb (vector bool char, const int);
+
+     vector signed char vec_splat_s8 (const int);
+
+     vector signed short vec_splat_s16 (const int);
+
+     vector signed int vec_splat_s32 (const int);
+
+     vector unsigned char vec_splat_u8 (const int);
+
+     vector unsigned short vec_splat_u16 (const int);
+
+     vector unsigned int vec_splat_u32 (const int);
+
+     vector signed char vec_sr (vector signed char, vector unsigned char);
+     vector unsigned char vec_sr (vector unsigned char,
+                                  vector unsigned char);
+     vector signed short vec_sr (vector signed short,
+                                 vector unsigned short);
+     vector unsigned short vec_sr (vector unsigned short,
+                                   vector unsigned short);
+     vector signed int vec_sr (vector signed int, vector unsigned int);
+     vector unsigned int vec_sr (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vsrw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vsrw (vector unsigned int, vector unsigned int);
+
+     vector signed short vec_vsrh (vector signed short,
+                                   vector unsigned short);
+     vector unsigned short vec_vsrh (vector unsigned short,
+                                     vector unsigned short);
+
+     vector signed char vec_vsrb (vector signed char, vector unsigned char);
+     vector unsigned char vec_vsrb (vector unsigned char,
+                                    vector unsigned char);
+
+     vector signed char vec_sra (vector signed char, vector unsigned char);
+     vector unsigned char vec_sra (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_sra (vector signed short,
+                                  vector unsigned short);
+     vector unsigned short vec_sra (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_sra (vector signed int, vector unsigned int);
+     vector unsigned int vec_sra (vector unsigned int, vector unsigned int);
+
+     vector signed int vec_vsraw (vector signed int, vector unsigned int);
+     vector unsigned int vec_vsraw (vector unsigned int,
+                                    vector unsigned int);
+
+     vector signed short vec_vsrah (vector signed short,
+                                    vector unsigned short);
+     vector unsigned short vec_vsrah (vector unsigned short,
+                                      vector unsigned short);
+
+     vector signed char vec_vsrab (vector signed char, vector unsigned char);
+     vector unsigned char vec_vsrab (vector unsigned char,
+                                     vector unsigned char);
+
+     vector signed int vec_srl (vector signed int, vector unsigned int);
+     vector signed int vec_srl (vector signed int, vector unsigned short);
+     vector signed int vec_srl (vector signed int, vector unsigned char);
+     vector unsigned int vec_srl (vector unsigned int, vector unsigned int);
+     vector unsigned int vec_srl (vector unsigned int,
+                                  vector unsigned short);
+     vector unsigned int vec_srl (vector unsigned int, vector unsigned char);
+     vector bool int vec_srl (vector bool int, vector unsigned int);
+     vector bool int vec_srl (vector bool int, vector unsigned short);
+     vector bool int vec_srl (vector bool int, vector unsigned char);
+     vector signed short vec_srl (vector signed short, vector unsigned int);
+     vector signed short vec_srl (vector signed short,
+                                  vector unsigned short);
+     vector signed short vec_srl (vector signed short, vector unsigned char);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned int);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned short);
+     vector unsigned short vec_srl (vector unsigned short,
+                                    vector unsigned char);
+     vector bool short vec_srl (vector bool short, vector unsigned int);
+     vector bool short vec_srl (vector bool short, vector unsigned short);
+     vector bool short vec_srl (vector bool short, vector unsigned char);
+     vector pixel vec_srl (vector pixel, vector unsigned int);
+     vector pixel vec_srl (vector pixel, vector unsigned short);
+     vector pixel vec_srl (vector pixel, vector unsigned char);
+     vector signed char vec_srl (vector signed char, vector unsigned int);
+     vector signed char vec_srl (vector signed char, vector unsigned short);
+     vector signed char vec_srl (vector signed char, vector unsigned char);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned int);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned short);
+     vector unsigned char vec_srl (vector unsigned char,
+                                   vector unsigned char);
+     vector bool char vec_srl (vector bool char, vector unsigned int);
+     vector bool char vec_srl (vector bool char, vector unsigned short);
+     vector bool char vec_srl (vector bool char, vector unsigned char);
+
+     vector float vec_sro (vector float, vector signed char);
+     vector float vec_sro (vector float, vector unsigned char);
+     vector signed int vec_sro (vector signed int, vector signed char);
+     vector signed int vec_sro (vector signed int, vector unsigned char);
+     vector unsigned int vec_sro (vector unsigned int, vector signed char);
+     vector unsigned int vec_sro (vector unsigned int, vector unsigned char);
+     vector signed short vec_sro (vector signed short, vector signed char);
+     vector signed short vec_sro (vector signed short, vector unsigned char);
+     vector unsigned short vec_sro (vector unsigned short,
+                                    vector signed char);
+     vector unsigned short vec_sro (vector unsigned short,
+                                    vector unsigned char);
+     vector pixel vec_sro (vector pixel, vector signed char);
+     vector pixel vec_sro (vector pixel, vector unsigned char);
+     vector signed char vec_sro (vector signed char, vector signed char);
+     vector signed char vec_sro (vector signed char, vector unsigned char);
+     vector unsigned char vec_sro (vector unsigned char, vector signed char);
+     vector unsigned char vec_sro (vector unsigned char,
+                                   vector unsigned char);
+
+     void vec_st (vector float, int, vector float *);
+     void vec_st (vector float, int, float *);
+     void vec_st (vector signed int, int, vector signed int *);
+     void vec_st (vector signed int, int, int *);
+     void vec_st (vector unsigned int, int, vector unsigned int *);
+     void vec_st (vector unsigned int, int, unsigned int *);
+     void vec_st (vector bool int, int, vector bool int *);
+     void vec_st (vector bool int, int, unsigned int *);
+     void vec_st (vector bool int, int, int *);
+     void vec_st (vector signed short, int, vector signed short *);
+     void vec_st (vector signed short, int, short *);
+     void vec_st (vector unsigned short, int, vector unsigned short *);
+     void vec_st (vector unsigned short, int, unsigned short *);
+     void vec_st (vector bool short, int, vector bool short *);
+     void vec_st (vector bool short, int, unsigned short *);
+     void vec_st (vector pixel, int, vector pixel *);
+     void vec_st (vector pixel, int, unsigned short *);
+     void vec_st (vector pixel, int, short *);
+     void vec_st (vector bool short, int, short *);
+     void vec_st (vector signed char, int, vector signed char *);
+     void vec_st (vector signed char, int, signed char *);
+     void vec_st (vector unsigned char, int, vector unsigned char *);
+     void vec_st (vector unsigned char, int, unsigned char *);
+     void vec_st (vector bool char, int, vector bool char *);
+     void vec_st (vector bool char, int, unsigned char *);
+     void vec_st (vector bool char, int, signed char *);
+
+     void vec_ste (vector signed char, int, signed char *);
+     void vec_ste (vector unsigned char, int, unsigned char *);
+     void vec_ste (vector bool char, int, signed char *);
+     void vec_ste (vector bool char, int, unsigned char *);
+     void vec_ste (vector signed short, int, short *);
+     void vec_ste (vector unsigned short, int, unsigned short *);
+     void vec_ste (vector bool short, int, short *);
+     void vec_ste (vector bool short, int, unsigned short *);
+     void vec_ste (vector pixel, int, short *);
+     void vec_ste (vector pixel, int, unsigned short *);
+     void vec_ste (vector float, int, float *);
+     void vec_ste (vector signed int, int, int *);
+     void vec_ste (vector unsigned int, int, unsigned int *);
+     void vec_ste (vector bool int, int, int *);
+     void vec_ste (vector bool int, int, unsigned int *);
+
+     void vec_stvewx (vector float, int, float *);
+     void vec_stvewx (vector signed int, int, int *);
+     void vec_stvewx (vector unsigned int, int, unsigned int *);
+     void vec_stvewx (vector bool int, int, int *);
+     void vec_stvewx (vector bool int, int, unsigned int *);
+
+     void vec_stvehx (vector signed short, int, short *);
+     void vec_stvehx (vector unsigned short, int, unsigned short *);
+     void vec_stvehx (vector bool short, int, short *);
+     void vec_stvehx (vector bool short, int, unsigned short *);
+     void vec_stvehx (vector pixel, int, short *);
+     void vec_stvehx (vector pixel, int, unsigned short *);
+
+     void vec_stvebx (vector signed char, int, signed char *);
+     void vec_stvebx (vector unsigned char, int, unsigned char *);
+     void vec_stvebx (vector bool char, int, signed char *);
+     void vec_stvebx (vector bool char, int, unsigned char *);
+
+     void vec_stl (vector float, int, vector float *);
+     void vec_stl (vector float, int, float *);
+     void vec_stl (vector signed int, int, vector signed int *);
+     void vec_stl (vector signed int, int, int *);
+     void vec_stl (vector unsigned int, int, vector unsigned int *);
+     void vec_stl (vector unsigned int, int, unsigned int *);
+     void vec_stl (vector bool int, int, vector bool int *);
+     void vec_stl (vector bool int, int, unsigned int *);
+     void vec_stl (vector bool int, int, int *);
+     void vec_stl (vector signed short, int, vector signed short *);
+     void vec_stl (vector signed short, int, short *);
+     void vec_stl (vector unsigned short, int, vector unsigned short *);
+     void vec_stl (vector unsigned short, int, unsigned short *);
+     void vec_stl (vector bool short, int, vector bool short *);
+     void vec_stl (vector bool short, int, unsigned short *);
+     void vec_stl (vector bool short, int, short *);
+     void vec_stl (vector pixel, int, vector pixel *);
+     void vec_stl (vector pixel, int, unsigned short *);
+     void vec_stl (vector pixel, int, short *);
+     void vec_stl (vector signed char, int, vector signed char *);
+     void vec_stl (vector signed char, int, signed char *);
+     void vec_stl (vector unsigned char, int, vector unsigned char *);
+     void vec_stl (vector unsigned char, int, unsigned char *);
+     void vec_stl (vector bool char, int, vector bool char *);
+     void vec_stl (vector bool char, int, unsigned char *);
+     void vec_stl (vector bool char, int, signed char *);
+
+     vector signed char vec_sub (vector bool char, vector signed char);
+     vector signed char vec_sub (vector signed char, vector bool char);
+     vector signed char vec_sub (vector signed char, vector signed char);
+     vector unsigned char vec_sub (vector bool char, vector unsigned char);
+     vector unsigned char vec_sub (vector unsigned char, vector bool char);
+     vector unsigned char vec_sub (vector unsigned char,
+                                   vector unsigned char);
+     vector signed short vec_sub (vector bool short, vector signed short);
+     vector signed short vec_sub (vector signed short, vector bool short);
+     vector signed short vec_sub (vector signed short, vector signed short);
+     vector unsigned short vec_sub (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_sub (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_sub (vector unsigned short,
+                                    vector unsigned short);
+     vector signed int vec_sub (vector bool int, vector signed int);
+     vector signed int vec_sub (vector signed int, vector bool int);
+     vector signed int vec_sub (vector signed int, vector signed int);
+     vector unsigned int vec_sub (vector bool int, vector unsigned int);
+     vector unsigned int vec_sub (vector unsigned int, vector bool int);
+     vector unsigned int vec_sub (vector unsigned int, vector unsigned int);
+     vector float vec_sub (vector float, vector float);
+
+     vector float vec_vsubfp (vector float, vector float);
+
+     vector signed int vec_vsubuwm (vector bool int, vector signed int);
+     vector signed int vec_vsubuwm (vector signed int, vector bool int);
+     vector signed int vec_vsubuwm (vector signed int, vector signed int);
+     vector unsigned int vec_vsubuwm (vector bool int, vector unsigned int);
+     vector unsigned int vec_vsubuwm (vector unsigned int, vector bool int);
+     vector unsigned int vec_vsubuwm (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vsubuhm (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vsubuhm (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vsubuhm (vector signed short,
+                                      vector signed short);
+     vector unsigned short vec_vsubuhm (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vsubuhm (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vsubuhm (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vsububm (vector bool char, vector signed char);
+     vector signed char vec_vsububm (vector signed char, vector bool char);
+     vector signed char vec_vsububm (vector signed char, vector signed char);
+     vector unsigned char vec_vsububm (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vsububm (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vsububm (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_subc (vector unsigned int, vector unsigned int);
+
+     vector unsigned char vec_subs (vector bool char, vector unsigned char);
+     vector unsigned char vec_subs (vector unsigned char, vector bool char);
+     vector unsigned char vec_subs (vector unsigned char,
+                                    vector unsigned char);
+     vector signed char vec_subs (vector bool char, vector signed char);
+     vector signed char vec_subs (vector signed char, vector bool char);
+     vector signed char vec_subs (vector signed char, vector signed char);
+     vector unsigned short vec_subs (vector bool short,
+                                     vector unsigned short);
+     vector unsigned short vec_subs (vector unsigned short,
+                                     vector bool short);
+     vector unsigned short vec_subs (vector unsigned short,
+                                     vector unsigned short);
+     vector signed short vec_subs (vector bool short, vector signed short);
+     vector signed short vec_subs (vector signed short, vector bool short);
+     vector signed short vec_subs (vector signed short, vector signed short);
+     vector unsigned int vec_subs (vector bool int, vector unsigned int);
+     vector unsigned int vec_subs (vector unsigned int, vector bool int);
+     vector unsigned int vec_subs (vector unsigned int, vector unsigned int);
+     vector signed int vec_subs (vector bool int, vector signed int);
+     vector signed int vec_subs (vector signed int, vector bool int);
+     vector signed int vec_subs (vector signed int, vector signed int);
+
+     vector signed int vec_vsubsws (vector bool int, vector signed int);
+     vector signed int vec_vsubsws (vector signed int, vector bool int);
+     vector signed int vec_vsubsws (vector signed int, vector signed int);
+
+     vector unsigned int vec_vsubuws (vector bool int, vector unsigned int);
+     vector unsigned int vec_vsubuws (vector unsigned int, vector bool int);
+     vector unsigned int vec_vsubuws (vector unsigned int,
+                                      vector unsigned int);
+
+     vector signed short vec_vsubshs (vector bool short,
+                                      vector signed short);
+     vector signed short vec_vsubshs (vector signed short,
+                                      vector bool short);
+     vector signed short vec_vsubshs (vector signed short,
+                                      vector signed short);
+
+     vector unsigned short vec_vsubuhs (vector bool short,
+                                        vector unsigned short);
+     vector unsigned short vec_vsubuhs (vector unsigned short,
+                                        vector bool short);
+     vector unsigned short vec_vsubuhs (vector unsigned short,
+                                        vector unsigned short);
+
+     vector signed char vec_vsubsbs (vector bool char, vector signed char);
+     vector signed char vec_vsubsbs (vector signed char, vector bool char);
+     vector signed char vec_vsubsbs (vector signed char, vector signed char);
+
+     vector unsigned char vec_vsububs (vector bool char,
+                                       vector unsigned char);
+     vector unsigned char vec_vsububs (vector unsigned char,
+                                       vector bool char);
+     vector unsigned char vec_vsububs (vector unsigned char,
+                                       vector unsigned char);
+
+     vector unsigned int vec_sum4s (vector unsigned char,
+                                    vector unsigned int);
+     vector signed int vec_sum4s (vector signed char, vector signed int);
+     vector signed int vec_sum4s (vector signed short, vector signed int);
+
+     vector signed int vec_vsum4shs (vector signed short, vector signed int);
+
+     vector signed int vec_vsum4sbs (vector signed char, vector signed int);
+
+     vector unsigned int vec_vsum4ubs (vector unsigned char,
+                                       vector unsigned int);
+
+     vector signed int vec_sum2s (vector signed int, vector signed int);
+
+     vector signed int vec_sums (vector signed int, vector signed int);
+
+     vector float vec_trunc (vector float);
+
+     vector signed short vec_unpackh (vector signed char);
+     vector bool short vec_unpackh (vector bool char);
+     vector signed int vec_unpackh (vector signed short);
+     vector bool int vec_unpackh (vector bool short);
+     vector unsigned int vec_unpackh (vector pixel);
+
+     vector bool int vec_vupkhsh (vector bool short);
+     vector signed int vec_vupkhsh (vector signed short);
+
+     vector unsigned int vec_vupkhpx (vector pixel);
+
+     vector bool short vec_vupkhsb (vector bool char);
+     vector signed short vec_vupkhsb (vector signed char);
+
+     vector signed short vec_unpackl (vector signed char);
+     vector bool short vec_unpackl (vector bool char);
+     vector unsigned int vec_unpackl (vector pixel);
+     vector signed int vec_unpackl (vector signed short);
+     vector bool int vec_unpackl (vector bool short);
+
+     vector unsigned int vec_vupklpx (vector pixel);
+
+     vector bool int vec_vupklsh (vector bool short);
+     vector signed int vec_vupklsh (vector signed short);
+
+     vector bool short vec_vupklsb (vector bool char);
+     vector signed short vec_vupklsb (vector signed char);
+
+     vector float vec_xor (vector float, vector float);
+     vector float vec_xor (vector float, vector bool int);
+     vector float vec_xor (vector bool int, vector float);
+     vector bool int vec_xor (vector bool int, vector bool int);
+     vector signed int vec_xor (vector bool int, vector signed int);
+     vector signed int vec_xor (vector signed int, vector bool int);
+     vector signed int vec_xor (vector signed int, vector signed int);
+     vector unsigned int vec_xor (vector bool int, vector unsigned int);
+     vector unsigned int vec_xor (vector unsigned int, vector bool int);
+     vector unsigned int vec_xor (vector unsigned int, vector unsigned int);
+     vector bool short vec_xor (vector bool short, vector bool short);
+     vector signed short vec_xor (vector bool short, vector signed short);
+     vector signed short vec_xor (vector signed short, vector bool short);
+     vector signed short vec_xor (vector signed short, vector signed short);
+     vector unsigned short vec_xor (vector bool short,
+                                    vector unsigned short);
+     vector unsigned short vec_xor (vector unsigned short,
+                                    vector bool short);
+     vector unsigned short vec_xor (vector unsigned short,
+                                    vector unsigned short);
+     vector signed char vec_xor (vector bool char, vector signed char);
+     vector bool char vec_xor (vector bool char, vector bool char);
+     vector signed char vec_xor (vector signed char, vector bool char);
+     vector signed char vec_xor (vector signed char, vector signed char);
+     vector unsigned char vec_xor (vector bool char, vector unsigned char);
+     vector unsigned char vec_xor (vector unsigned char, vector bool char);
+     vector unsigned char vec_xor (vector unsigned char,
+                                   vector unsigned char);
+
+     int vec_all_eq (vector signed char, vector bool char);
+     int vec_all_eq (vector signed char, vector signed char);
+     int vec_all_eq (vector unsigned char, vector bool char);
+     int vec_all_eq (vector unsigned char, vector unsigned char);
+     int vec_all_eq (vector bool char, vector bool char);
+     int vec_all_eq (vector bool char, vector unsigned char);
+     int vec_all_eq (vector bool char, vector signed char);
+     int vec_all_eq (vector signed short, vector bool short);
+     int vec_all_eq (vector signed short, vector signed short);
+     int vec_all_eq (vector unsigned short, vector bool short);
+     int vec_all_eq (vector unsigned short, vector unsigned short);
+     int vec_all_eq (vector bool short, vector bool short);
+     int vec_all_eq (vector bool short, vector unsigned short);
+     int vec_all_eq (vector bool short, vector signed short);
+     int vec_all_eq (vector pixel, vector pixel);
+     int vec_all_eq (vector signed int, vector bool int);
+     int vec_all_eq (vector signed int, vector signed int);
+     int vec_all_eq (vector unsigned int, vector bool int);
+     int vec_all_eq (vector unsigned int, vector unsigned int);
+     int vec_all_eq (vector bool int, vector bool int);
+     int vec_all_eq (vector bool int, vector unsigned int);
+     int vec_all_eq (vector bool int, vector signed int);
+     int vec_all_eq (vector float, vector float);
+
+     int vec_all_ge (vector bool char, vector unsigned char);
+     int vec_all_ge (vector unsigned char, vector bool char);
+     int vec_all_ge (vector unsigned char, vector unsigned char);
+     int vec_all_ge (vector bool char, vector signed char);
+     int vec_all_ge (vector signed char, vector bool char);
+     int vec_all_ge (vector signed char, vector signed char);
+     int vec_all_ge (vector bool short, vector unsigned short);
+     int vec_all_ge (vector unsigned short, vector bool short);
+     int vec_all_ge (vector unsigned short, vector unsigned short);
+     int vec_all_ge (vector signed short, vector signed short);
+     int vec_all_ge (vector bool short, vector signed short);
+     int vec_all_ge (vector signed short, vector bool short);
+     int vec_all_ge (vector bool int, vector unsigned int);
+     int vec_all_ge (vector unsigned int, vector bool int);
+     int vec_all_ge (vector unsigned int, vector unsigned int);
+     int vec_all_ge (vector bool int, vector signed int);
+     int vec_all_ge (vector signed int, vector bool int);
+     int vec_all_ge (vector signed int, vector signed int);
+     int vec_all_ge (vector float, vector float);
+
+     int vec_all_gt (vector bool char, vector unsigned char);
+     int vec_all_gt (vector unsigned char, vector bool char);
+     int vec_all_gt (vector unsigned char, vector unsigned char);
+     int vec_all_gt (vector bool char, vector signed char);
+     int vec_all_gt (vector signed char, vector bool char);
+     int vec_all_gt (vector signed char, vector signed char);
+     int vec_all_gt (vector bool short, vector unsigned short);
+     int vec_all_gt (vector unsigned short, vector bool short);
+     int vec_all_gt (vector unsigned short, vector unsigned short);
+     int vec_all_gt (vector bool short, vector signed short);
+     int vec_all_gt (vector signed short, vector bool short);
+     int vec_all_gt (vector signed short, vector signed short);
+     int vec_all_gt (vector bool int, vector unsigned int);
+     int vec_all_gt (vector unsigned int, vector bool int);
+     int vec_all_gt (vector unsigned int, vector unsigned int);
+     int vec_all_gt (vector bool int, vector signed int);
+     int vec_all_gt (vector signed int, vector bool int);
+     int vec_all_gt (vector signed int, vector signed int);
+     int vec_all_gt (vector float, vector float);
+
+     int vec_all_in (vector float, vector float);
+
+     int vec_all_le (vector bool char, vector unsigned char);
+     int vec_all_le (vector unsigned char, vector bool char);
+     int vec_all_le (vector unsigned char, vector unsigned char);
+     int vec_all_le (vector bool char, vector signed char);
+     int vec_all_le (vector signed char, vector bool char);
+     int vec_all_le (vector signed char, vector signed char);
+     int vec_all_le (vector bool short, vector unsigned short);
+     int vec_all_le (vector unsigned short, vector bool short);
+     int vec_all_le (vector unsigned short, vector unsigned short);
+     int vec_all_le (vector bool short, vector signed short);
+     int vec_all_le (vector signed short, vector bool short);
+     int vec_all_le (vector signed short, vector signed short);
+     int vec_all_le (vector bool int, vector unsigned int);
+     int vec_all_le (vector unsigned int, vector bool int);
+     int vec_all_le (vector unsigned int, vector unsigned int);
+     int vec_all_le (vector bool int, vector signed int);
+     int vec_all_le (vector signed int, vector bool int);
+     int vec_all_le (vector signed int, vector signed int);
+     int vec_all_le (vector float, vector float);
+
+     int vec_all_lt (vector bool char, vector unsigned char);
+     int vec_all_lt (vector unsigned char, vector bool char);
+     int vec_all_lt (vector unsigned char, vector unsigned char);
+     int vec_all_lt (vector bool char, vector signed char);
+     int vec_all_lt (vector signed char, vector bool char);
+     int vec_all_lt (vector signed char, vector signed char);
+     int vec_all_lt (vector bool short, vector unsigned short);
+     int vec_all_lt (vector unsigned short, vector bool short);
+     int vec_all_lt (vector unsigned short, vector unsigned short);
+     int vec_all_lt (vector bool short, vector signed short);
+     int vec_all_lt (vector signed short, vector bool short);
+     int vec_all_lt (vector signed short, vector signed short);
+     int vec_all_lt (vector bool int, vector unsigned int);
+     int vec_all_lt (vector unsigned int, vector bool int);
+     int vec_all_lt (vector unsigned int, vector unsigned int);
+     int vec_all_lt (vector bool int, vector signed int);
+     int vec_all_lt (vector signed int, vector bool int);
+     int vec_all_lt (vector signed int, vector signed int);
+     int vec_all_lt (vector float, vector float);
+
+     int vec_all_nan (vector float);
+
+     int vec_all_ne (vector signed char, vector bool char);
+     int vec_all_ne (vector signed char, vector signed char);
+     int vec_all_ne (vector unsigned char, vector bool char);
+     int vec_all_ne (vector unsigned char, vector unsigned char);
+     int vec_all_ne (vector bool char, vector bool char);
+     int vec_all_ne (vector bool char, vector unsigned char);
+     int vec_all_ne (vector bool char, vector signed char);
+     int vec_all_ne (vector signed short, vector bool short);
+     int vec_all_ne (vector signed short, vector signed short);
+     int vec_all_ne (vector unsigned short, vector bool short);
+     int vec_all_ne (vector unsigned short, vector unsigned short);
+     int vec_all_ne (vector bool short, vector bool short);
+     int vec_all_ne (vector bool short, vector unsigned short);
+     int vec_all_ne (vector bool short, vector signed short);
+     int vec_all_ne (vector pixel, vector pixel);
+     int vec_all_ne (vector signed int, vector bool int);
+     int vec_all_ne (vector signed int, vector signed int);
+     int vec_all_ne (vector unsigned int, vector bool int);
+     int vec_all_ne (vector unsigned int, vector unsigned int);
+     int vec_all_ne (vector bool int, vector bool int);
+     int vec_all_ne (vector bool int, vector unsigned int);
+     int vec_all_ne (vector bool int, vector signed int);
+     int vec_all_ne (vector float, vector float);
+
+     int vec_all_nge (vector float, vector float);
+
+     int vec_all_ngt (vector float, vector float);
+
+     int vec_all_nle (vector float, vector float);
+
+     int vec_all_nlt (vector float, vector float);
+
+     int vec_all_numeric (vector float);
+
+     int vec_any_eq (vector signed char, vector bool char);
+     int vec_any_eq (vector signed char, vector signed char);
+     int vec_any_eq (vector unsigned char, vector bool char);
+     int vec_any_eq (vector unsigned char, vector unsigned char);
+     int vec_any_eq (vector bool char, vector bool char);
+     int vec_any_eq (vector bool char, vector unsigned char);
+     int vec_any_eq (vector bool char, vector signed char);
+     int vec_any_eq (vector signed short, vector bool short);
+     int vec_any_eq (vector signed short, vector signed short);
+     int vec_any_eq (vector unsigned short, vector bool short);
+     int vec_any_eq (vector unsigned short, vector unsigned short);
+     int vec_any_eq (vector bool short, vector bool short);
+     int vec_any_eq (vector bool short, vector unsigned short);
+     int vec_any_eq (vector bool short, vector signed short);
+     int vec_any_eq (vector pixel, vector pixel);
+     int vec_any_eq (vector signed int, vector bool int);
+     int vec_any_eq (vector signed int, vector signed int);
+     int vec_any_eq (vector unsigned int, vector bool int);
+     int vec_any_eq (vector unsigned int, vector unsigned int);
+     int vec_any_eq (vector bool int, vector bool int);
+     int vec_any_eq (vector bool int, vector unsigned int);
+     int vec_any_eq (vector bool int, vector signed int);
+     int vec_any_eq (vector float, vector float);
+
+     int vec_any_ge (vector signed char, vector bool char);
+     int vec_any_ge (vector unsigned char, vector bool char);
+     int vec_any_ge (vector unsigned char, vector unsigned char);
+     int vec_any_ge (vector signed char, vector signed char);
+     int vec_any_ge (vector bool char, vector unsigned char);
+     int vec_any_ge (vector bool char, vector signed char);
+     int vec_any_ge (vector unsigned short, vector bool short);
+     int vec_any_ge (vector unsigned short, vector unsigned short);
+     int vec_any_ge (vector signed short, vector signed short);
+     int vec_any_ge (vector signed short, vector bool short);
+     int vec_any_ge (vector bool short, vector unsigned short);
+     int vec_any_ge (vector bool short, vector signed short);
+     int vec_any_ge (vector signed int, vector bool int);
+     int vec_any_ge (vector unsigned int, vector bool int);
+     int vec_any_ge (vector unsigned int, vector unsigned int);
+     int vec_any_ge (vector signed int, vector signed int);
+     int vec_any_ge (vector bool int, vector unsigned int);
+     int vec_any_ge (vector bool int, vector signed int);
+     int vec_any_ge (vector float, vector float);
+
+     int vec_any_gt (vector bool char, vector unsigned char);
+     int vec_any_gt (vector unsigned char, vector bool char);
+     int vec_any_gt (vector unsigned char, vector unsigned char);
+     int vec_any_gt (vector bool char, vector signed char);
+     int vec_any_gt (vector signed char, vector bool char);
+     int vec_any_gt (vector signed char, vector signed char);
+     int vec_any_gt (vector bool short, vector unsigned short);
+     int vec_any_gt (vector unsigned short, vector bool short);
+     int vec_any_gt (vector unsigned short, vector unsigned short);
+     int vec_any_gt (vector bool short, vector signed short);
+     int vec_any_gt (vector signed short, vector bool short);
+     int vec_any_gt (vector signed short, vector signed short);
+     int vec_any_gt (vector bool int, vector unsigned int);
+     int vec_any_gt (vector unsigned int, vector bool int);
+     int vec_any_gt (vector unsigned int, vector unsigned int);
+     int vec_any_gt (vector bool int, vector signed int);
+     int vec_any_gt (vector signed int, vector bool int);
+     int vec_any_gt (vector signed int, vector signed int);
+     int vec_any_gt (vector float, vector float);
+
+     int vec_any_le (vector bool char, vector unsigned char);
+     int vec_any_le (vector unsigned char, vector bool char);
+     int vec_any_le (vector unsigned char, vector unsigned char);
+     int vec_any_le (vector bool char, vector signed char);
+     int vec_any_le (vector signed char, vector bool char);
+     int vec_any_le (vector signed char, vector signed char);
+     int vec_any_le (vector bool short, vector unsigned short);
+     int vec_any_le (vector unsigned short, vector bool short);
+     int vec_any_le (vector unsigned short, vector unsigned short);
+     int vec_any_le (vector bool short, vector signed short);
+     int vec_any_le (vector signed short, vector bool short);
+     int vec_any_le (vector signed short, vector signed short);
+     int vec_any_le (vector bool int, vector unsigned int);
+     int vec_any_le (vector unsigned int, vector bool int);
+     int vec_any_le (vector unsigned int, vector unsigned int);
+     int vec_any_le (vector bool int, vector signed int);
+     int vec_any_le (vector signed int, vector bool int);
+     int vec_any_le (vector signed int, vector signed int);
+     int vec_any_le (vector float, vector float);
+
+     int vec_any_lt (vector bool char, vector unsigned char);
+     int vec_any_lt (vector unsigned char, vector bool char);
+     int vec_any_lt (vector unsigned char, vector unsigned char);
+     int vec_any_lt (vector bool char, vector signed char);
+     int vec_any_lt (vector signed char, vector bool char);
+     int vec_any_lt (vector signed char, vector signed char);
+     int vec_any_lt (vector bool short, vector unsigned short);
+     int vec_any_lt (vector unsigned short, vector bool short);
+     int vec_any_lt (vector unsigned short, vector unsigned short);
+     int vec_any_lt (vector bool short, vector signed short);
+     int vec_any_lt (vector signed short, vector bool short);
+     int vec_any_lt (vector signed short, vector signed short);
+     int vec_any_lt (vector bool int, vector unsigned int);
+     int vec_any_lt (vector unsigned int, vector bool int);
+     int vec_any_lt (vector unsigned int, vector unsigned int);
+     int vec_any_lt (vector bool int, vector signed int);
+     int vec_any_lt (vector signed int, vector bool int);
+     int vec_any_lt (vector signed int, vector signed int);
+     int vec_any_lt (vector float, vector float);
+
+     int vec_any_nan (vector float);
+
+     int vec_any_ne (vector signed char, vector bool char);
+     int vec_any_ne (vector signed char, vector signed char);
+     int vec_any_ne (vector unsigned char, vector bool char);
+     int vec_any_ne (vector unsigned char, vector unsigned char);
+     int vec_any_ne (vector bool char, vector bool char);
+     int vec_any_ne (vector bool char, vector unsigned char);
+     int vec_any_ne (vector bool char, vector signed char);
+     int vec_any_ne (vector signed short, vector bool short);
+     int vec_any_ne (vector signed short, vector signed short);
+     int vec_any_ne (vector unsigned short, vector bool short);
+     int vec_any_ne (vector unsigned short, vector unsigned short);
+     int vec_any_ne (vector bool short, vector bool short);
+     int vec_any_ne (vector bool short, vector unsigned short);
+     int vec_any_ne (vector bool short, vector signed short);
+     int vec_any_ne (vector pixel, vector pixel);
+     int vec_any_ne (vector signed int, vector bool int);
+     int vec_any_ne (vector signed int, vector signed int);
+     int vec_any_ne (vector unsigned int, vector bool int);
+     int vec_any_ne (vector unsigned int, vector unsigned int);
+     int vec_any_ne (vector bool int, vector bool int);
+     int vec_any_ne (vector bool int, vector unsigned int);
+     int vec_any_ne (vector bool int, vector signed int);
+     int vec_any_ne (vector float, vector float);
+
+     int vec_any_nge (vector float, vector float);
+
+     int vec_any_ngt (vector float, vector float);
+
+     int vec_any_nle (vector float, vector float);
+
+     int vec_any_nlt (vector float, vector float);
+
+     int vec_any_numeric (vector float);
+
+     int vec_any_out (vector float, vector float);
+
+ If the vector/scalar (VSX) instruction set is available, the following
+additional functions are available:
+
+     vector double vec_abs (vector double);
+     vector double vec_add (vector double, vector double);
+     vector double vec_and (vector double, vector double);
+     vector double vec_and (vector double, vector bool long);
+     vector double vec_and (vector bool long, vector double);
+     vector double vec_andc (vector double, vector double);
+     vector double vec_andc (vector double, vector bool long);
+     vector double vec_andc (vector bool long, vector double);
+     vector double vec_ceil (vector double);
+     vector bool long vec_cmpeq (vector double, vector double);
+     vector bool long vec_cmpge (vector double, vector double);
+     vector bool long vec_cmpgt (vector double, vector double);
+     vector bool long vec_cmple (vector double, vector double);
+     vector bool long vec_cmplt (vector double, vector double);
+     vector float vec_div (vector float, vector float);
+     vector double vec_div (vector double, vector double);
+     vector double vec_floor (vector double);
+     vector double vec_madd (vector double, vector double, vector double);
+     vector double vec_max (vector double, vector double);
+     vector double vec_min (vector double, vector double);
+     vector float vec_msub (vector float, vector float, vector float);
+     vector double vec_msub (vector double, vector double, vector double);
+     vector float vec_mul (vector float, vector float);
+     vector double vec_mul (vector double, vector double);
+     vector float vec_nearbyint (vector float);
+     vector double vec_nearbyint (vector double);
+     vector float vec_nmadd (vector float, vector float, vector float);
+     vector double vec_nmadd (vector double, vector double, vector double);
+     vector double vec_nmsub (vector double, vector double, vector double);
+     vector double vec_nor (vector double, vector double);
+     vector double vec_or (vector double, vector double);
+     vector double vec_or (vector double, vector bool long);
+     vector double vec_or (vector bool long, vector double);
+     vector double vec_perm (vector double,
+                             vector double,
+                             vector unsigned char);
+     vector float vec_rint (vector float);
+     vector double vec_rint (vector double);
+     vector double vec_sel (vector double, vector double, vector bool long);
+     vector double vec_sel (vector double, vector double, vector unsigned long);
+     vector double vec_sub (vector double, vector double);
+     vector float vec_sqrt (vector float);
+     vector double vec_sqrt (vector double);
+     vector double vec_trunc (vector double);
+     vector double vec_xor (vector double, vector double);
+     vector double vec_xor (vector double, vector bool long);
+     vector double vec_xor (vector bool long, vector double);
+     int vec_all_eq (vector double, vector double);
+     int vec_all_ge (vector double, vector double);
+     int vec_all_gt (vector double, vector double);
+     int vec_all_le (vector double, vector double);
+     int vec_all_lt (vector double, vector double);
+     int vec_all_nan (vector double);
+     int vec_all_ne (vector double, vector double);
+     int vec_all_nge (vector double, vector double);
+     int vec_all_ngt (vector double, vector double);
+     int vec_all_nle (vector double, vector double);
+     int vec_all_nlt (vector double, vector double);
+     int vec_all_numeric (vector double);
+     int vec_any_eq (vector double, vector double);
+     int vec_any_ge (vector double, vector double);
+     int vec_any_gt (vector double, vector double);
+     int vec_any_le (vector double, vector double);
+     int vec_any_lt (vector double, vector double);
+     int vec_any_nan (vector double);
+     int vec_any_ne (vector double, vector double);
+     int vec_any_nge (vector double, vector double);
+     int vec_any_ngt (vector double, vector double);
+     int vec_any_nle (vector double, vector double);
+     int vec_any_nlt (vector double, vector double);
+     int vec_any_numeric (vector double);
+
+ GCC provides a few other builtins on Powerpc to access certain
+instructions:
+     float __builtin_recipdivf (float, float);
+     float __builtin_rsqrtf (float);
+     double __builtin_recipdiv (double, double);
+     long __builtin_bpermd (long, long);
+     int __builtin_bswap16 (int);
+
+
+File: gcc.info,  Node: RX Built-in Functions,  Next: SPARC VIS Built-in Functions,  Prev: PowerPC AltiVec/VSX Built-in Functions,  Up: Target Builtins
+
+6.52.13 RX Built-in Functions
+-----------------------------
+
+GCC supports some of the RX instructions which cannot be expressed in
+the C programming language via the use of built-in functions.  The
+following functions are supported:
+
+ -- Built-in Function: void __builtin_rx_brk (void)
+     Generates the `brk' machine instruction.
+
+ -- Built-in Function: void __builtin_rx_clrpsw (int)
+     Generates the `clrpsw' machine instruction to clear the specified
+     bit in the processor status word.
+
+ -- Built-in Function: void __builtin_rx_int (int)
+     Generates the `int' machine instruction to generate an interrupt
+     with the specified value.
+
+ -- Built-in Function: void __builtin_rx_machi (int, int)
+     Generates the `machi' machine instruction to add the result of
+     multiplying the top 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_maclo (int, int)
+     Generates the `maclo' machine instruction to add the result of
+     multiplying the bottom 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_mulhi (int, int)
+     Generates the `mulhi' machine instruction to place the result of
+     multiplying the top 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: void __builtin_rx_mullo (int, int)
+     Generates the `mullo' machine instruction to place the result of
+     multiplying the bottom 16-bits of the two arguments into the
+     accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfachi (void)
+     Generates the `mvfachi' machine instruction to read the top
+     32-bits of the accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfacmi (void)
+     Generates the `mvfacmi' machine instruction to read the middle
+     32-bits of the accumulator.
+
+ -- Built-in Function: int __builtin_rx_mvfc (int)
+     Generates the `mvfc' machine instruction which reads the control
+     register specified in its argument and returns its value.
+
+ -- Built-in Function: void __builtin_rx_mvtachi (int)
+     Generates the `mvtachi' machine instruction to set the top 32-bits
+     of the accumulator.
+
+ -- Built-in Function: void __builtin_rx_mvtaclo (int)
+     Generates the `mvtaclo' machine instruction to set the bottom
+     32-bits of the accumulator.
+
+ -- Built-in Function: void __builtin_rx_mvtc (int reg, int val)
+     Generates the `mvtc' machine instruction which sets control
+     register number `reg' to `val'.
+
+ -- Built-in Function: void __builtin_rx_mvtipl (int)
+     Generates the `mvtipl' machine instruction set the interrupt
+     priority level.
+
+ -- Built-in Function: void __builtin_rx_racw (int)
+     Generates the `racw' machine instruction to round the accumulator
+     according to the specified mode.
+
+ -- Built-in Function: int __builtin_rx_revw (int)
+     Generates the `revw' machine instruction which swaps the bytes in
+     the argument so that bits 0-7 now occupy bits 8-15 and vice versa,
+     and also bits 16-23 occupy bits 24-31 and vice versa.
+
+ -- Built-in Function: void __builtin_rx_rmpa (void)
+     Generates the `rmpa' machine instruction which initiates a
+     repeated multiply and accumulate sequence.
+
+ -- Built-in Function: void __builtin_rx_round (float)
+     Generates the `round' machine instruction which returns the
+     floating point argument rounded according to the current rounding
+     mode set in the floating point status word register.
+
+ -- Built-in Function: int __builtin_rx_sat (int)
+     Generates the `sat' machine instruction which returns the
+     saturated value of the argument.
+
+ -- Built-in Function: void __builtin_rx_setpsw (int)
+     Generates the `setpsw' machine instruction to set the specified
+     bit in the processor status word.
+
+ -- Built-in Function: void __builtin_rx_wait (void)
+     Generates the `wait' machine instruction.
+
+
+File: gcc.info,  Node: SPARC VIS Built-in Functions,  Next: SPU Built-in Functions,  Prev: RX Built-in Functions,  Up: Target Builtins
+
+6.52.14 SPARC VIS Built-in Functions
+------------------------------------
+
+GCC supports SIMD operations on the SPARC using both the generic vector
+extensions (*note Vector Extensions::) as well as built-in functions for
+the SPARC Visual Instruction Set (VIS).  When you use the `-mvis'
+switch, the VIS extension is exposed as the following built-in
+functions:
+
+     typedef int v2si __attribute__ ((vector_size (8)));
+     typedef short v4hi __attribute__ ((vector_size (8)));
+     typedef short v2hi __attribute__ ((vector_size (4)));
+     typedef char v8qi __attribute__ ((vector_size (8)));
+     typedef char v4qi __attribute__ ((vector_size (4)));
+
+     void * __builtin_vis_alignaddr (void *, long);
+     int64_t __builtin_vis_faligndatadi (int64_t, int64_t);
+     v2si __builtin_vis_faligndatav2si (v2si, v2si);
+     v4hi __builtin_vis_faligndatav4hi (v4si, v4si);
+     v8qi __builtin_vis_faligndatav8qi (v8qi, v8qi);
+
+     v4hi __builtin_vis_fexpand (v4qi);
+
+     v4hi __builtin_vis_fmul8x16 (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8x16au (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8x16al (v4qi, v4hi);
+     v4hi __builtin_vis_fmul8sux16 (v8qi, v4hi);
+     v4hi __builtin_vis_fmul8ulx16 (v8qi, v4hi);
+     v2si __builtin_vis_fmuld8sux16 (v4qi, v2hi);
+     v2si __builtin_vis_fmuld8ulx16 (v4qi, v2hi);
+
+     v4qi __builtin_vis_fpack16 (v4hi);
+     v8qi __builtin_vis_fpack32 (v2si, v2si);
+     v2hi __builtin_vis_fpackfix (v2si);
+     v8qi __builtin_vis_fpmerge (v4qi, v4qi);
+
+     int64_t __builtin_vis_pdist (v8qi, v8qi, int64_t);
+
+
+File: gcc.info,  Node: SPU Built-in Functions,  Prev: SPARC VIS Built-in Functions,  Up: Target Builtins
+
+6.52.15 SPU Built-in Functions
+------------------------------
+
+GCC provides extensions for the SPU processor as described in the
+Sony/Toshiba/IBM SPU Language Extensions Specification, which can be
+found at `http://cell.scei.co.jp/' or
+`http://www.ibm.com/developerworks/power/cell/'.  GCC's implementation
+differs in several ways.
+
+   * The optional extension of specifying vector constants in
+     parentheses is not supported.
+
+   * A vector initializer requires no cast if the vector constant is of
+     the same type as the variable it is initializing.
+
+   * If `signed' or `unsigned' is omitted, the signedness of the vector
+     type is the default signedness of the base type.  The default
+     varies depending on the operating system, so a portable program
+     should always specify the signedness.
+
+   * By default, the keyword `__vector' is added. The macro `vector' is
+     defined in `<spu_intrinsics.h>' and can be undefined.
+
+   * GCC allows using a `typedef' name as the type specifier for a
+     vector type.
+
+   * For C, overloaded functions are implemented with macros so the
+     following does not work:
+
+            spu_add ((vector signed int){1, 2, 3, 4}, foo);
+
+     Since `spu_add' is a macro, the vector constant in the example is
+     treated as four separate arguments.  Wrap the entire argument in
+     parentheses for this to work.
+
+   * The extended version of `__builtin_expect' is not supported.
+
+
+ _Note:_ Only the interface described in the aforementioned
+specification is supported. Internally, GCC uses built-in functions to
+implement the required functionality, but these are not supported and
+are subject to change without notice.
+
+
+File: gcc.info,  Node: Target Format Checks,  Next: Pragmas,  Prev: Target Builtins,  Up: C Extensions
+
+6.53 Format Checks Specific to Particular Target Machines
+=========================================================
+
+For some target machines, GCC supports additional options to the format
+attribute (*note Declaring Attributes of Functions: Function
+Attributes.).
+
+* Menu:
+
+* Solaris Format Checks::
+
+
+File: gcc.info,  Node: Solaris Format Checks,  Up: Target Format Checks
+
+6.53.1 Solaris Format Checks
+----------------------------
+
+Solaris targets support the `cmn_err' (or `__cmn_err__') format check.
+`cmn_err' accepts a subset of the standard `printf' conversions, and
+the two-argument `%b' conversion for displaying bit-fields.  See the
+Solaris man page for `cmn_err' for more information.
+
+
+File: gcc.info,  Node: Pragmas,  Next: Unnamed Fields,  Prev: Target Format Checks,  Up: C Extensions
+
+6.54 Pragmas Accepted by GCC
+============================
+
+GCC supports several types of pragmas, primarily in order to compile
+code originally written for other compilers.  Note that in general we
+do not recommend the use of pragmas; *Note Function Attributes::, for
+further explanation.
+
+* Menu:
+
+* ARM Pragmas::
+* M32C Pragmas::
+* MeP Pragmas::
+* RS/6000 and PowerPC Pragmas::
+* Darwin Pragmas::
+* Solaris Pragmas::
+* Symbol-Renaming Pragmas::
+* Structure-Packing Pragmas::
+* Weak Pragmas::
+* Diagnostic Pragmas::
+* Visibility Pragmas::
+* Push/Pop Macro Pragmas::
+* Function Specific Option Pragmas::
+
+
+File: gcc.info,  Node: ARM Pragmas,  Next: M32C Pragmas,  Up: Pragmas
+
+6.54.1 ARM Pragmas
+------------------
+
+The ARM target defines pragmas for controlling the default addition of
+`long_call' and `short_call' attributes to functions.  *Note Function
+Attributes::, for information about the effects of these attributes.
+
+`long_calls'
+     Set all subsequent functions to have the `long_call' attribute.
+
+`no_long_calls'
+     Set all subsequent functions to have the `short_call' attribute.
+
+`long_calls_off'
+     Do not affect the `long_call' or `short_call' attributes of
+     subsequent functions.
+
+
+File: gcc.info,  Node: M32C Pragmas,  Next: MeP Pragmas,  Prev: ARM Pragmas,  Up: Pragmas
+
+6.54.2 M32C Pragmas
+-------------------
+
+`memregs NUMBER'
+     Overrides the command line option `-memregs=' for the current
+     file.  Use with care!  This pragma must be before any function in
+     the file, and mixing different memregs values in different objects
+     may make them incompatible.  This pragma is useful when a
+     performance-critical function uses a memreg for temporary values,
+     as it may allow you to reduce the number of memregs used.
+
+
+
+File: gcc.info,  Node: MeP Pragmas,  Next: RS/6000 and PowerPC Pragmas,  Prev: M32C Pragmas,  Up: Pragmas
+
+6.54.3 MeP Pragmas
+------------------
+
+`custom io_volatile (on|off)'
+     Overrides the command line option `-mio-volatile' for the current
+     file.  Note that for compatibility with future GCC releases, this
+     option should only be used once before any `io' variables in each
+     file.
+
+`GCC coprocessor available REGISTERS'
+     Specifies which coprocessor registers are available to the register
+     allocator.  REGISTERS may be a single register, register range
+     separated by ellipses, or comma-separated list of those.  Example:
+
+          #pragma GCC coprocessor available $c0...$c10, $c28
+
+`GCC coprocessor call_saved REGISTERS'
+     Specifies which coprocessor registers are to be saved and restored
+     by any function using them.  REGISTERS may be a single register,
+     register range separated by ellipses, or comma-separated list of
+     those.  Example:
+
+          #pragma GCC coprocessor call_saved $c4...$c6, $c31
+
+`GCC coprocessor subclass '(A|B|C|D)' = REGISTERS'
+     Creates and defines a register class.  These register classes can
+     be used by inline `asm' constructs.  REGISTERS may be a single
+     register, register range separated by ellipses, or comma-separated
+     list of those.  Example:
+
+          #pragma GCC coprocessor subclass 'B' = $c2, $c4, $c6
+
+          asm ("cpfoo %0" : "=B" (x));
+
+`GCC disinterrupt NAME , NAME ...'
+     For the named functions, the compiler adds code to disable
+     interrupts for the duration of those functions.  Any functions so
+     named, which are not encountered in the source, cause a warning
+     that the pragma was not used.  Examples:
+
+          #pragma disinterrupt foo
+          #pragma disinterrupt bar, grill
+          int foo () { ... }
+
+`GCC call NAME , NAME ...'
+     For the named functions, the compiler always uses a
+     register-indirect call model when calling the named functions.
+     Examples:
+
+          extern int foo ();
+          #pragma call foo
+
+
+
+File: gcc.info,  Node: RS/6000 and PowerPC Pragmas,  Next: Darwin Pragmas,  Prev: MeP Pragmas,  Up: Pragmas
+
+6.54.4 RS/6000 and PowerPC Pragmas
+----------------------------------
+
+The RS/6000 and PowerPC targets define one pragma for controlling
+whether or not the `longcall' attribute is added to function
+declarations by default.  This pragma overrides the `-mlongcall'
+option, but not the `longcall' and `shortcall' attributes.  *Note
+RS/6000 and PowerPC Options::, for more information about when long
+calls are and are not necessary.
+
+`longcall (1)'
+     Apply the `longcall' attribute to all subsequent function
+     declarations.
+
+`longcall (0)'
+     Do not apply the `longcall' attribute to subsequent function
+     declarations.
+
+
+File: gcc.info,  Node: Darwin Pragmas,  Next: Solaris Pragmas,  Prev: RS/6000 and PowerPC Pragmas,  Up: Pragmas
+
+6.54.5 Darwin Pragmas
+---------------------
+
+The following pragmas are available for all architectures running the
+Darwin operating system.  These are useful for compatibility with other
+Mac OS compilers.
+
+`mark TOKENS...'
+     This pragma is accepted, but has no effect.
+
+`options align=ALIGNMENT'
+     This pragma sets the alignment of fields in structures.  The
+     values of ALIGNMENT may be `mac68k', to emulate m68k alignment, or
+     `power', to emulate PowerPC alignment.  Uses of this pragma nest
+     properly; to restore the previous setting, use `reset' for the
+     ALIGNMENT.
+
+`segment TOKENS...'
+     This pragma is accepted, but has no effect.
+
+`unused (VAR [, VAR]...)'
+     This pragma declares variables to be possibly unused.  GCC will not
+     produce warnings for the listed variables.  The effect is similar
+     to that of the `unused' attribute, except that this pragma may
+     appear anywhere within the variables' scopes.
+
+
+File: gcc.info,  Node: Solaris Pragmas,  Next: Symbol-Renaming Pragmas,  Prev: Darwin Pragmas,  Up: Pragmas
+
+6.54.6 Solaris Pragmas
+----------------------
+
+The Solaris target supports `#pragma redefine_extname' (*note
+Symbol-Renaming Pragmas::).  It also supports additional `#pragma'
+directives for compatibility with the system compiler.
+
+`align ALIGNMENT (VARIABLE [, VARIABLE]...)'
+     Increase the minimum alignment of each VARIABLE to ALIGNMENT.
+     This is the same as GCC's `aligned' attribute *note Variable
+     Attributes::).  Macro expansion occurs on the arguments to this
+     pragma when compiling C and Objective-C.  It does not currently
+     occur when compiling C++, but this is a bug which may be fixed in
+     a future release.
+
+`fini (FUNCTION [, FUNCTION]...)'
+     This pragma causes each listed FUNCTION to be called after main,
+     or during shared module unloading, by adding a call to the `.fini'
+     section.
+
+`init (FUNCTION [, FUNCTION]...)'
+     This pragma causes each listed FUNCTION to be called during
+     initialization (before `main') or during shared module loading, by
+     adding a call to the `.init' section.
+
+
+
+File: gcc.info,  Node: Symbol-Renaming Pragmas,  Next: Structure-Packing Pragmas,  Prev: Solaris Pragmas,  Up: Pragmas
+
+6.54.7 Symbol-Renaming Pragmas
+------------------------------
+
+For compatibility with the Solaris and Tru64 UNIX system headers, GCC
+supports two `#pragma' directives which change the name used in
+assembly for a given declaration.  `#pragma extern_prefix' is only
+available on platforms whose system headers need it. To get this effect
+on all platforms supported by GCC, use the asm labels extension (*note
+Asm Labels::).
+
+`redefine_extname OLDNAME NEWNAME'
+     This pragma gives the C function OLDNAME the assembly symbol
+     NEWNAME.  The preprocessor macro `__PRAGMA_REDEFINE_EXTNAME' will
+     be defined if this pragma is available (currently on all
+     platforms).
+
+`extern_prefix STRING'
+     This pragma causes all subsequent external function and variable
+     declarations to have STRING prepended to their assembly symbols.
+     This effect may be terminated with another `extern_prefix' pragma
+     whose argument is an empty string.  The preprocessor macro
+     `__PRAGMA_EXTERN_PREFIX' will be defined if this pragma is
+     available (currently only on Tru64 UNIX).
+
+ These pragmas and the asm labels extension interact in a complicated
+manner.  Here are some corner cases you may want to be aware of.
+
+  1. Both pragmas silently apply only to declarations with external
+     linkage.  Asm labels do not have this restriction.
+
+  2. In C++, both pragmas silently apply only to declarations with "C"
+     linkage.  Again, asm labels do not have this restriction.
+
+  3. If any of the three ways of changing the assembly name of a
+     declaration is applied to a declaration whose assembly name has
+     already been determined (either by a previous use of one of these
+     features, or because the compiler needed the assembly name in
+     order to generate code), and the new name is different, a warning
+     issues and the name does not change.
+
+  4. The OLDNAME used by `#pragma redefine_extname' is always the
+     C-language name.
+
+  5. If `#pragma extern_prefix' is in effect, and a declaration occurs
+     with an asm label attached, the prefix is silently ignored for
+     that declaration.
+
+  6. If `#pragma extern_prefix' and `#pragma redefine_extname' apply to
+     the same declaration, whichever triggered first wins, and a
+     warning issues if they contradict each other.  (We would like to
+     have `#pragma redefine_extname' always win, for consistency with
+     asm labels, but if `#pragma extern_prefix' triggers first we have
+     no way of knowing that that happened.)
+
+
+File: gcc.info,  Node: Structure-Packing Pragmas,  Next: Weak Pragmas,  Prev: Symbol-Renaming Pragmas,  Up: Pragmas
+
+6.54.8 Structure-Packing Pragmas
+--------------------------------
+
+For compatibility with Microsoft Windows compilers, GCC supports a set
+of `#pragma' directives which change the maximum alignment of members
+of structures (other than zero-width bitfields), unions, and classes
+subsequently defined. The N value below always is required to be a
+small power of two and specifies the new alignment in bytes.
+
+  1. `#pragma pack(N)' simply sets the new alignment.
+
+  2. `#pragma pack()' sets the alignment to the one that was in effect
+     when compilation started (see also command line option
+     `-fpack-struct[=<n>]' *note Code Gen Options::).
+
+  3. `#pragma pack(push[,N])' pushes the current alignment setting on
+     an internal stack and then optionally sets the new alignment.
+
+  4. `#pragma pack(pop)' restores the alignment setting to the one
+     saved at the top of the internal stack (and removes that stack
+     entry).  Note that `#pragma pack([N])' does not influence this
+     internal stack; thus it is possible to have `#pragma pack(push)'
+     followed by multiple `#pragma pack(N)' instances and finalized by
+     a single `#pragma pack(pop)'.
+
+ Some targets, e.g. i386 and powerpc, support the `ms_struct' `#pragma'
+which lays out a structure as the documented `__attribute__
+((ms_struct))'.
+  1. `#pragma ms_struct on' turns on the layout for structures declared.
+
+  2. `#pragma ms_struct off' turns off the layout for structures
+     declared.
+
+  3. `#pragma ms_struct reset' goes back to the default layout.
+
+
+File: gcc.info,  Node: Weak Pragmas,  Next: Diagnostic Pragmas,  Prev: Structure-Packing Pragmas,  Up: Pragmas
+
+6.54.9 Weak Pragmas
+-------------------
+
+For compatibility with SVR4, GCC supports a set of `#pragma' directives
+for declaring symbols to be weak, and defining weak aliases.
+
+`#pragma weak SYMBOL'
+     This pragma declares SYMBOL to be weak, as if the declaration had
+     the attribute of the same name.  The pragma may appear before or
+     after the declaration of SYMBOL, but must appear before either its
+     first use or its definition.  It is not an error for SYMBOL to
+     never be defined at all.
+
+`#pragma weak SYMBOL1 = SYMBOL2'
+     This pragma declares SYMBOL1 to be a weak alias of SYMBOL2.  It is
+     an error if SYMBOL2 is not defined in the current translation unit.
+
+
+File: gcc.info,  Node: Diagnostic Pragmas,  Next: Visibility Pragmas,  Prev: Weak Pragmas,  Up: Pragmas
+
+6.54.10 Diagnostic Pragmas
+--------------------------
+
+GCC allows the user to selectively enable or disable certain types of
+diagnostics, and change the kind of the diagnostic.  For example, a
+project's policy might require that all sources compile with `-Werror'
+but certain files might have exceptions allowing specific types of
+warnings.  Or, a project might selectively enable diagnostics and treat
+them as errors depending on which preprocessor macros are defined.
+
+`#pragma GCC diagnostic KIND OPTION'
+     Modifies the disposition of a diagnostic.  Note that not all
+     diagnostics are modifiable; at the moment only warnings (normally
+     controlled by `-W...') can be controlled, and not all of them.
+     Use `-fdiagnostics-show-option' to determine which diagnostics are
+     controllable and which option controls them.
+
+     KIND is `error' to treat this diagnostic as an error, `warning' to
+     treat it like a warning (even if `-Werror' is in effect), or
+     `ignored' if the diagnostic is to be ignored.  OPTION is a double
+     quoted string which matches the command line option.
+
+          #pragma GCC diagnostic warning "-Wformat"
+          #pragma GCC diagnostic error "-Wformat"
+          #pragma GCC diagnostic ignored "-Wformat"
+
+     Note that these pragmas override any command line options.  Also,
+     while it is syntactically valid to put these pragmas anywhere in
+     your sources, the only supported location for them is before any
+     data or functions are defined.  Doing otherwise may result in
+     unpredictable results depending on how the optimizer manages your
+     sources.  If the same option is listed multiple times, the last
+     one specified is the one that is in effect.  This pragma is not
+     intended to be a general purpose replacement for command line
+     options, but for implementing strict control over project policies.
+
+
+ GCC also offers a simple mechanism for printing messages during
+compilation.
+
+`#pragma message STRING'
+     Prints STRING as a compiler message on compilation.  The message
+     is informational only, and is neither a compilation warning nor an
+     error.
+
+          #pragma message "Compiling " __FILE__ "..."
+
+     STRING may be parenthesized, and is printed with location
+     information.  For example,
+
+          #define DO_PRAGMA(x) _Pragma (#x)
+          #define TODO(x) DO_PRAGMA(message ("TODO - " #x))
+
+          TODO(Remember to fix this)
+
+     prints `/tmp/file.c:4: note: #pragma message: TODO - Remember to
+     fix this'.
+
+
+
+File: gcc.info,  Node: Visibility Pragmas,  Next: Push/Pop Macro Pragmas,  Prev: Diagnostic Pragmas,  Up: Pragmas
+
+6.54.11 Visibility Pragmas
+--------------------------
+
+`#pragma GCC visibility push(VISIBILITY)'
+`#pragma GCC visibility pop'
+     This pragma allows the user to set the visibility for multiple
+     declarations without having to give each a visibility attribute
+     *Note Function Attributes::, for more information about visibility
+     and the attribute syntax.
+
+     In C++, `#pragma GCC visibility' affects only namespace-scope
+     declarations.  Class members and template specializations are not
+     affected; if you want to override the visibility for a particular
+     member or instantiation, you must use an attribute.
+
+
+
+File: gcc.info,  Node: Push/Pop Macro Pragmas,  Next: Function Specific Option Pragmas,  Prev: Visibility Pragmas,  Up: Pragmas
+
+6.54.12 Push/Pop Macro Pragmas
+------------------------------
+
+For compatibility with Microsoft Windows compilers, GCC supports
+`#pragma push_macro("MACRO_NAME")' and `#pragma
+pop_macro("MACRO_NAME")'.
+
+`#pragma push_macro("MACRO_NAME")'
+     This pragma saves the value of the macro named as MACRO_NAME to
+     the top of the stack for this macro.
+
+`#pragma pop_macro("MACRO_NAME")'
+     This pragma sets the value of the macro named as MACRO_NAME to the
+     value on top of the stack for this macro. If the stack for
+     MACRO_NAME is empty, the value of the macro remains unchanged.
+
+ For example:
+
+     #define X  1
+     #pragma push_macro("X")
+     #undef X
+     #define X -1
+     #pragma pop_macro("X")
+     int x [X];
+
+ In this example, the definition of X as 1 is saved by `#pragma
+push_macro' and restored by `#pragma pop_macro'.
+
+
+File: gcc.info,  Node: Function Specific Option Pragmas,  Prev: Push/Pop Macro Pragmas,  Up: Pragmas
+
+6.54.13 Function Specific Option Pragmas
+----------------------------------------
+
+`#pragma GCC target ("STRING"...)'
+     This pragma allows you to set target specific options for functions
+     defined later in the source file.  One or more strings can be
+     specified.  Each function that is defined after this point will be
+     as if `attribute((target("STRING")))' was specified for that
+     function.  The parenthesis around the options is optional.  *Note
+     Function Attributes::, for more information about the `target'
+     attribute and the attribute syntax.
+
+     The `#pragma GCC target' pragma is not implemented in GCC versions
+     earlier than 4.4, and is currently only implemented for the 386
+     and x86_64 backends.
+
+`#pragma GCC optimize ("STRING"...)'
+     This pragma allows you to set global optimization options for
+     functions defined later in the source file.  One or more strings
+     can be specified.  Each function that is defined after this point
+     will be as if `attribute((optimize("STRING")))' was specified for
+     that function.  The parenthesis around the options is optional.
+     *Note Function Attributes::, for more information about the
+     `optimize' attribute and the attribute syntax.
+
+     The `#pragma GCC optimize' pragma is not implemented in GCC
+     versions earlier than 4.4.
+
+`#pragma GCC push_options'
+`#pragma GCC pop_options'
+     These pragmas maintain a stack of the current target and
+     optimization options.  It is intended for include files where you
+     temporarily want to switch to using a different `#pragma GCC
+     target' or `#pragma GCC optimize' and then to pop back to the
+     previous options.
+
+     The `#pragma GCC push_options' and `#pragma GCC pop_options'
+     pragmas are not implemented in GCC versions earlier than 4.4.
+
+`#pragma GCC reset_options'
+     This pragma clears the current `#pragma GCC target' and `#pragma
+     GCC optimize' to use the default switches as specified on the
+     command line.
+
+     The `#pragma GCC reset_options' pragma is not implemented in GCC
+     versions earlier than 4.4.
+
+
+File: gcc.info,  Node: Unnamed Fields,  Next: Thread-Local,  Prev: Pragmas,  Up: C Extensions
+
+6.55 Unnamed struct/union fields within structs/unions
+======================================================
+
+For compatibility with other compilers, GCC allows you to define a
+structure or union that contains, as fields, structures and unions
+without names.  For example:
+
+     struct {
+       int a;
+       union {
+         int b;
+         float c;
+       };
+       int d;
+     } foo;
+
+ In this example, the user would be able to access members of the
+unnamed union with code like `foo.b'.  Note that only unnamed structs
+and unions are allowed, you may not have, for example, an unnamed `int'.
+
+ You must never create such structures that cause ambiguous field
+definitions.  For example, this structure:
+
+     struct {
+       int a;
+       struct {
+         int a;
+       };
+     } foo;
+
+ It is ambiguous which `a' is being referred to with `foo.a'.  Such
+constructs are not supported and must be avoided.  In the future, such
+constructs may be detected and treated as compilation errors.
+
+ Unless `-fms-extensions' is used, the unnamed field must be a
+structure or union definition without a tag (for example, `struct { int
+a; };').  If `-fms-extensions' is used, the field may also be a
+definition with a tag such as `struct foo { int a; };', a reference to
+a previously defined structure or union such as `struct foo;', or a
+reference to a `typedef' name for a previously defined structure or
+union type.
+
+
+File: gcc.info,  Node: Thread-Local,  Next: Binary constants,  Prev: Unnamed Fields,  Up: C Extensions
+
+6.56 Thread-Local Storage
+=========================
+
+Thread-local storage (TLS) is a mechanism by which variables are
+allocated such that there is one instance of the variable per extant
+thread.  The run-time model GCC uses to implement this originates in
+the IA-64 processor-specific ABI, but has since been migrated to other
+processors as well.  It requires significant support from the linker
+(`ld'), dynamic linker (`ld.so'), and system libraries (`libc.so' and
+`libpthread.so'), so it is not available everywhere.
+
+ At the user level, the extension is visible with a new storage class
+keyword: `__thread'.  For example:
+
+     __thread int i;
+     extern __thread struct state s;
+     static __thread char *p;
+
+ The `__thread' specifier may be used alone, with the `extern' or
+`static' specifiers, but with no other storage class specifier.  When
+used with `extern' or `static', `__thread' must appear immediately
+after the other storage class specifier.
+
+ The `__thread' specifier may be applied to any global, file-scoped
+static, function-scoped static, or static data member of a class.  It
+may not be applied to block-scoped automatic or non-static data member.
+
+ When the address-of operator is applied to a thread-local variable, it
+is evaluated at run-time and returns the address of the current thread's
+instance of that variable.  An address so obtained may be used by any
+thread.  When a thread terminates, any pointers to thread-local
+variables in that thread become invalid.
+
+ No static initialization may refer to the address of a thread-local
+variable.
+
+ In C++, if an initializer is present for a thread-local variable, it
+must be a CONSTANT-EXPRESSION, as defined in 5.19.2 of the ANSI/ISO C++
+standard.
+
+ See ELF Handling For Thread-Local Storage
+(http://people.redhat.com/drepper/tls.pdf) for a detailed explanation of
+the four thread-local storage addressing models, and how the run-time
+is expected to function.
+
+* Menu:
+
+* C99 Thread-Local Edits::
+* C++98 Thread-Local Edits::
+
+
+File: gcc.info,  Node: C99 Thread-Local Edits,  Next: C++98 Thread-Local Edits,  Up: Thread-Local
+
+6.56.1 ISO/IEC 9899:1999 Edits for Thread-Local Storage
+-------------------------------------------------------
+
+The following are a set of changes to ISO/IEC 9899:1999 (aka C99) that
+document the exact semantics of the language extension.
+
+   * `5.1.2  Execution environments'
+
+     Add new text after paragraph 1
+
+          Within either execution environment, a "thread" is a flow of
+          control within a program.  It is implementation defined
+          whether or not there may be more than one thread associated
+          with a program.  It is implementation defined how threads
+          beyond the first are created, the name and type of the
+          function called at thread startup, and how threads may be
+          terminated.  However, objects with thread storage duration
+          shall be initialized before thread startup.
+
+   * `6.2.4  Storage durations of objects'
+
+     Add new text before paragraph 3
+
+          An object whose identifier is declared with the storage-class
+          specifier `__thread' has "thread storage duration".  Its
+          lifetime is the entire execution of the thread, and its
+          stored value is initialized only once, prior to thread
+          startup.
+
+   * `6.4.1  Keywords'
+
+     Add `__thread'.
+
+   * `6.7.1  Storage-class specifiers'
+
+     Add `__thread' to the list of storage class specifiers in
+     paragraph 1.
+
+     Change paragraph 2 to
+
+          With the exception of `__thread', at most one storage-class
+          specifier may be given [...].  The `__thread' specifier may
+          be used alone, or immediately following `extern' or `static'.
+
+     Add new text after paragraph 6
+
+          The declaration of an identifier for a variable that has
+          block scope that specifies `__thread' shall also specify
+          either `extern' or `static'.
+
+          The `__thread' specifier shall be used only with variables.
+
+
+File: gcc.info,  Node: C++98 Thread-Local Edits,  Prev: C99 Thread-Local Edits,  Up: Thread-Local
+
+6.56.2 ISO/IEC 14882:1998 Edits for Thread-Local Storage
+--------------------------------------------------------
+
+The following are a set of changes to ISO/IEC 14882:1998 (aka C++98)
+that document the exact semantics of the language extension.
+
+   * [intro.execution]
+
+     New text after paragraph 4
+
+          A "thread" is a flow of control within the abstract machine.
+          It is implementation defined whether or not there may be more
+          than one thread.
+
+     New text after paragraph 7
+
+          It is unspecified whether additional action must be taken to
+          ensure when and whether side effects are visible to other
+          threads.
+
+   * [lex.key]
+
+     Add `__thread'.
+
+   * [basic.start.main]
+
+     Add after paragraph 5
+
+          The thread that begins execution at the `main' function is
+          called the "main thread".  It is implementation defined how
+          functions beginning threads other than the main thread are
+          designated or typed.  A function so designated, as well as
+          the `main' function, is called a "thread startup function".
+          It is implementation defined what happens if a thread startup
+          function returns.  It is implementation defined what happens
+          to other threads when any thread calls `exit'.
+
+   * [basic.start.init]
+
+     Add after paragraph 4
+
+          The storage for an object of thread storage duration shall be
+          statically initialized before the first statement of the
+          thread startup function.  An object of thread storage
+          duration shall not require dynamic initialization.
+
+   * [basic.start.term]
+
+     Add after paragraph 3
+
+          The type of an object with thread storage duration shall not
+          have a non-trivial destructor, nor shall it be an array type
+          whose elements (directly or indirectly) have non-trivial
+          destructors.
+
+   * [basic.stc]
+
+     Add "thread storage duration" to the list in paragraph 1.
+
+     Change paragraph 2
+
+          Thread, static, and automatic storage durations are
+          associated with objects introduced by declarations [...].
+
+     Add `__thread' to the list of specifiers in paragraph 3.
+
+   * [basic.stc.thread]
+
+     New section before [basic.stc.static]
+
+          The keyword `__thread' applied to a non-local object gives the
+          object thread storage duration.
+
+          A local variable or class data member declared both `static'
+          and `__thread' gives the variable or member thread storage
+          duration.
+
+   * [basic.stc.static]
+
+     Change paragraph 1
+
+          All objects which have neither thread storage duration,
+          dynamic storage duration nor are local [...].
+
+   * [dcl.stc]
+
+     Add `__thread' to the list in paragraph 1.
+
+     Change paragraph 1
+
+          With the exception of `__thread', at most one
+          STORAGE-CLASS-SPECIFIER shall appear in a given
+          DECL-SPECIFIER-SEQ.  The `__thread' specifier may be used
+          alone, or immediately following the `extern' or `static'
+          specifiers.  [...]
+
+     Add after paragraph 5
+
+          The `__thread' specifier can be applied only to the names of
+          objects and to anonymous unions.
+
+   * [class.mem]
+
+     Add after paragraph 6
+
+          Non-`static' members shall not be `__thread'.
+
+
+File: gcc.info,  Node: Binary constants,  Prev: Thread-Local,  Up: C Extensions
+
+6.57 Binary constants using the `0b' prefix
+===========================================
+
+Integer constants can be written as binary constants, consisting of a
+sequence of `0' and `1' digits, prefixed by `0b' or `0B'.  This is
+particularly useful in environments that operate a lot on the bit-level
+(like microcontrollers).
+
+ The following statements are identical:
+
+     i =       42;
+     i =     0x2a;
+     i =      052;
+     i = 0b101010;
+
+ The type of these constants follows the same rules as for octal or
+hexadecimal integer constants, so suffixes like `L' or `UL' can be
+applied.
+
+
+File: gcc.info,  Node: C++ Extensions,  Next: Objective-C,  Prev: C++ Implementation,  Up: Top
+
+7 Extensions to the C++ Language
+********************************
+
+The GNU compiler provides these extensions to the C++ language (and you
+can also use most of the C language extensions in your C++ programs).
+If you want to write code that checks whether these features are
+available, you can test for the GNU compiler the same way as for C
+programs: check for a predefined macro `__GNUC__'.  You can also use
+`__GNUG__' to test specifically for GNU C++ (*note Predefined Macros:
+(cpp)Common Predefined Macros.).
+
+* Menu:
+
+* Volatiles::           What constitutes an access to a volatile object.
+* Restricted Pointers:: C99 restricted pointers and references.
+* Vague Linkage::       Where G++ puts inlines, vtables and such.
+* C++ Interface::       You can use a single C++ header file for both
+                        declarations and definitions.
+* Template Instantiation:: Methods for ensuring that exactly one copy of
+                        each needed template instantiation is emitted.
+* Bound member functions:: You can extract a function pointer to the
+                        method denoted by a `->*' or `.*' expression.
+* C++ Attributes::      Variable, function, and type attributes for C++ only.
+* Namespace Association:: Strong using-directives for namespace association.
+* Type Traits::         Compiler support for type traits
+* Java Exceptions::     Tweaking exception handling to work with Java.
+* Deprecated Features:: Things will disappear from g++.
+* Backwards Compatibility:: Compatibilities with earlier definitions of C++.
+
+
+File: gcc.info,  Node: Volatiles,  Next: Restricted Pointers,  Up: C++ Extensions
+
+7.1 When is a Volatile Object Accessed?
+=======================================
+
+Both the C and C++ standard have the concept of volatile objects.  These
+are normally accessed by pointers and used for accessing hardware.  The
+standards encourage compilers to refrain from optimizations concerning
+accesses to volatile objects.  The C standard leaves it implementation
+defined  as to what constitutes a volatile access.  The C++ standard
+omits to specify this, except to say that C++ should behave in a
+similar manner to C with respect to volatiles, where possible.  The
+minimum either standard specifies is that at a sequence point all
+previous accesses to volatile objects have stabilized and no subsequent
+accesses have occurred.  Thus an implementation is free to reorder and
+combine volatile accesses which occur between sequence points, but
+cannot do so for accesses across a sequence point.  The use of
+volatiles does not allow you to violate the restriction on updating
+objects multiple times within a sequence point.
+
+ *Note Volatile qualifier and the C compiler: Qualifiers implementation.
+
+ The behavior differs slightly between C and C++ in the non-obvious
+cases:
+
+     volatile int *src = SOMEVALUE;
+     *src;
+
+ With C, such expressions are rvalues, and GCC interprets this either
+as a read of the volatile object being pointed to or only as request to
+evaluate the side-effects.  The C++ standard specifies that such
+expressions do not undergo lvalue to rvalue conversion, and that the
+type of the dereferenced object may be incomplete.  The C++ standard
+does not specify explicitly that it is this lvalue to rvalue conversion
+which may be responsible for causing an access.  However, there is
+reason to believe that it is, because otherwise certain simple
+expressions become undefined.  However, because it would surprise most
+programmers, G++ treats dereferencing a pointer to volatile object of
+complete type when the value is unused as GCC would do for an
+equivalent type in C.  When the object has incomplete type, G++ issues
+a warning; if you wish to force an error, you must force a conversion
+to rvalue with, for instance, a static cast.
+
+ When using a reference to volatile, G++ does not treat equivalent
+expressions as accesses to volatiles, but instead issues a warning that
+no volatile is accessed.  The rationale for this is that otherwise it
+becomes difficult to determine where volatile access occur, and not
+possible to ignore the return value from functions returning volatile
+references.  Again, if you wish to force a read, cast the reference to
+an rvalue.
+
+
+File: gcc.info,  Node: Restricted Pointers,  Next: Vague Linkage,  Prev: Volatiles,  Up: C++ Extensions
+
+7.2 Restricting Pointer Aliasing
+================================
+
+As with the C front end, G++ understands the C99 feature of restricted
+pointers, specified with the `__restrict__', or `__restrict' type
+qualifier.  Because you cannot compile C++ by specifying the `-std=c99'
+language flag, `restrict' is not a keyword in C++.
+
+ In addition to allowing restricted pointers, you can specify restricted
+references, which indicate that the reference is not aliased in the
+local context.
+
+     void fn (int *__restrict__ rptr, int &__restrict__ rref)
+     {
+       /* ... */
+     }
+
+In the body of `fn', RPTR points to an unaliased integer and RREF
+refers to a (different) unaliased integer.
+
+ You may also specify whether a member function's THIS pointer is
+unaliased by using `__restrict__' as a member function qualifier.
+
+     void T::fn () __restrict__
+     {
+       /* ... */
+     }
+
+Within the body of `T::fn', THIS will have the effective definition `T
+*__restrict__ const this'.  Notice that the interpretation of a
+`__restrict__' member function qualifier is different to that of
+`const' or `volatile' qualifier, in that it is applied to the pointer
+rather than the object.  This is consistent with other compilers which
+implement restricted pointers.
+
+ As with all outermost parameter qualifiers, `__restrict__' is ignored
+in function definition matching.  This means you only need to specify
+`__restrict__' in a function definition, rather than in a function
+prototype as well.
+
+
+File: gcc.info,  Node: Vague Linkage,  Next: C++ Interface,  Prev: Restricted Pointers,  Up: C++ Extensions
+
+7.3 Vague Linkage
+=================
+
+There are several constructs in C++ which require space in the object
+file but are not clearly tied to a single translation unit.  We say that
+these constructs have "vague linkage".  Typically such constructs are
+emitted wherever they are needed, though sometimes we can be more
+clever.
+
+Inline Functions
+     Inline functions are typically defined in a header file which can
+     be included in many different compilations.  Hopefully they can
+     usually be inlined, but sometimes an out-of-line copy is
+     necessary, if the address of the function is taken or if inlining
+     fails.  In general, we emit an out-of-line copy in all translation
+     units where one is needed.  As an exception, we only emit inline
+     virtual functions with the vtable, since it will always require a
+     copy.
+
+     Local static variables and string constants used in an inline
+     function are also considered to have vague linkage, since they
+     must be shared between all inlined and out-of-line instances of
+     the function.
+
+VTables
+     C++ virtual functions are implemented in most compilers using a
+     lookup table, known as a vtable.  The vtable contains pointers to
+     the virtual functions provided by a class, and each object of the
+     class contains a pointer to its vtable (or vtables, in some
+     multiple-inheritance situations).  If the class declares any
+     non-inline, non-pure virtual functions, the first one is chosen as
+     the "key method" for the class, and the vtable is only emitted in
+     the translation unit where the key method is defined.
+
+     _Note:_ If the chosen key method is later defined as inline, the
+     vtable will still be emitted in every translation unit which
+     defines it.  Make sure that any inline virtuals are declared
+     inline in the class body, even if they are not defined there.
+
+type_info objects
+     C++ requires information about types to be written out in order to
+     implement `dynamic_cast', `typeid' and exception handling.  For
+     polymorphic classes (classes with virtual functions), the type_info
+     object is written out along with the vtable so that `dynamic_cast'
+     can determine the dynamic type of a class object at runtime.  For
+     all other types, we write out the type_info object when it is
+     used: when applying `typeid' to an expression, throwing an object,
+     or referring to a type in a catch clause or exception
+     specification.
+
+Template Instantiations
+     Most everything in this section also applies to template
+     instantiations, but there are other options as well.  *Note
+     Where's the Template?: Template Instantiation.
+
+
+ When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, duplicate copies of
+these constructs will be discarded at link time.  This is known as
+COMDAT support.
+
+ On targets that don't support COMDAT, but do support weak symbols, GCC
+will use them.  This way one copy will override all the others, but the
+unused copies will still take up space in the executable.
+
+ For targets which do not support either COMDAT or weak symbols, most
+entities with vague linkage will be emitted as local symbols to avoid
+duplicate definition errors from the linker.  This will not happen for
+local statics in inlines, however, as having multiple copies will
+almost certainly break things.
+
+ *Note Declarations and Definitions in One Header: C++ Interface, for
+another way to control placement of these constructs.
+
+
+File: gcc.info,  Node: C++ Interface,  Next: Template Instantiation,  Prev: Vague Linkage,  Up: C++ Extensions
+
+7.4 #pragma interface and implementation
+========================================
+
+`#pragma interface' and `#pragma implementation' provide the user with
+a way of explicitly directing the compiler to emit entities with vague
+linkage (and debugging information) in a particular translation unit.
+
+ _Note:_ As of GCC 2.7.2, these `#pragma's are not useful in most
+cases, because of COMDAT support and the "key method" heuristic
+mentioned in *note Vague Linkage::.  Using them can actually cause your
+program to grow due to unnecessary out-of-line copies of inline
+functions.  Currently (3.4) the only benefit of these `#pragma's is
+reduced duplication of debugging information, and that should be
+addressed soon on DWARF 2 targets with the use of COMDAT groups.
+
+`#pragma interface'
+`#pragma interface "SUBDIR/OBJECTS.h"'
+     Use this directive in _header files_ that define object classes,
+     to save space in most of the object files that use those classes.
+     Normally, local copies of certain information (backup copies of
+     inline member functions, debugging information, and the internal
+     tables that implement virtual functions) must be kept in each
+     object file that includes class definitions.  You can use this
+     pragma to avoid such duplication.  When a header file containing
+     `#pragma interface' is included in a compilation, this auxiliary
+     information will not be generated (unless the main input source
+     file itself uses `#pragma implementation').  Instead, the object
+     files will contain references to be resolved at link time.
+
+     The second form of this directive is useful for the case where you
+     have multiple headers with the same name in different directories.
+     If you use this form, you must specify the same string to `#pragma
+     implementation'.
+
+`#pragma implementation'
+`#pragma implementation "OBJECTS.h"'
+     Use this pragma in a _main input file_, when you want full output
+     from included header files to be generated (and made globally
+     visible).  The included header file, in turn, should use `#pragma
+     interface'.  Backup copies of inline member functions, debugging
+     information, and the internal tables used to implement virtual
+     functions are all generated in implementation files.
+
+     If you use `#pragma implementation' with no argument, it applies to
+     an include file with the same basename(1) as your source file.
+     For example, in `allclass.cc', giving just `#pragma implementation'
+     by itself is equivalent to `#pragma implementation "allclass.h"'.
+
+     In versions of GNU C++ prior to 2.6.0 `allclass.h' was treated as
+     an implementation file whenever you would include it from
+     `allclass.cc' even if you never specified `#pragma
+     implementation'.  This was deemed to be more trouble than it was
+     worth, however, and disabled.
+
+     Use the string argument if you want a single implementation file to
+     include code from multiple header files.  (You must also use
+     `#include' to include the header file; `#pragma implementation'
+     only specifies how to use the file--it doesn't actually include
+     it.)
+
+     There is no way to split up the contents of a single header file
+     into multiple implementation files.
+
+ `#pragma implementation' and `#pragma interface' also have an effect
+on function inlining.
+
+ If you define a class in a header file marked with `#pragma
+interface', the effect on an inline function defined in that class is
+similar to an explicit `extern' declaration--the compiler emits no code
+at all to define an independent version of the function.  Its
+definition is used only for inlining with its callers.
+
+ Conversely, when you include the same header file in a main source file
+that declares it as `#pragma implementation', the compiler emits code
+for the function itself; this defines a version of the function that
+can be found via pointers (or by callers compiled without inlining).
+If all calls to the function can be inlined, you can avoid emitting the
+function by compiling with `-fno-implement-inlines'.  If any calls were
+not inlined, you will get linker errors.
+
+ ---------- Footnotes ----------
+
+ (1) A file's "basename" was the name stripped of all leading path
+information and of trailing suffixes, such as `.h' or `.C' or `.cc'.
+
+
+File: gcc.info,  Node: Template Instantiation,  Next: Bound member functions,  Prev: C++ Interface,  Up: C++ Extensions
+
+7.5 Where's the Template?
+=========================
+
+C++ templates are the first language feature to require more
+intelligence from the environment than one usually finds on a UNIX
+system.  Somehow the compiler and linker have to make sure that each
+template instance occurs exactly once in the executable if it is needed,
+and not at all otherwise.  There are two basic approaches to this
+problem, which are referred to as the Borland model and the Cfront
+model.
+
+Borland model
+     Borland C++ solved the template instantiation problem by adding
+     the code equivalent of common blocks to their linker; the compiler
+     emits template instances in each translation unit that uses them,
+     and the linker collapses them together.  The advantage of this
+     model is that the linker only has to consider the object files
+     themselves; there is no external complexity to worry about.  This
+     disadvantage is that compilation time is increased because the
+     template code is being compiled repeatedly.  Code written for this
+     model tends to include definitions of all templates in the header
+     file, since they must be seen to be instantiated.
+
+Cfront model
+     The AT&T C++ translator, Cfront, solved the template instantiation
+     problem by creating the notion of a template repository, an
+     automatically maintained place where template instances are
+     stored.  A more modern version of the repository works as follows:
+     As individual object files are built, the compiler places any
+     template definitions and instantiations encountered in the
+     repository.  At link time, the link wrapper adds in the objects in
+     the repository and compiles any needed instances that were not
+     previously emitted.  The advantages of this model are more optimal
+     compilation speed and the ability to use the system linker; to
+     implement the Borland model a compiler vendor also needs to
+     replace the linker.  The disadvantages are vastly increased
+     complexity, and thus potential for error; for some code this can be
+     just as transparent, but in practice it can been very difficult to
+     build multiple programs in one directory and one program in
+     multiple directories.  Code written for this model tends to
+     separate definitions of non-inline member templates into a
+     separate file, which should be compiled separately.
+
+ When used with GNU ld version 2.8 or later on an ELF system such as
+GNU/Linux or Solaris 2, or on Microsoft Windows, G++ supports the
+Borland model.  On other systems, G++ implements neither automatic
+model.
+
+ A future version of G++ will support a hybrid model whereby the
+compiler will emit any instantiations for which the template definition
+is included in the compile, and store template definitions and
+instantiation context information into the object file for the rest.
+The link wrapper will extract that information as necessary and invoke
+the compiler to produce the remaining instantiations.  The linker will
+then combine duplicate instantiations.
+
+ In the mean time, you have the following options for dealing with
+template instantiations:
+
+  1. Compile your template-using code with `-frepo'.  The compiler will
+     generate files with the extension `.rpo' listing all of the
+     template instantiations used in the corresponding object files
+     which could be instantiated there; the link wrapper, `collect2',
+     will then update the `.rpo' files to tell the compiler where to
+     place those instantiations and rebuild any affected object files.
+     The link-time overhead is negligible after the first pass, as the
+     compiler will continue to place the instantiations in the same
+     files.
+
+     This is your best option for application code written for the
+     Borland model, as it will just work.  Code written for the Cfront
+     model will need to be modified so that the template definitions
+     are available at one or more points of instantiation; usually this
+     is as simple as adding `#include <tmethods.cc>' to the end of each
+     template header.
+
+     For library code, if you want the library to provide all of the
+     template instantiations it needs, just try to link all of its
+     object files together; the link will fail, but cause the
+     instantiations to be generated as a side effect.  Be warned,
+     however, that this may cause conflicts if multiple libraries try
+     to provide the same instantiations.  For greater control, use
+     explicit instantiation as described in the next option.
+
+  2. Compile your code with `-fno-implicit-templates' to disable the
+     implicit generation of template instances, and explicitly
+     instantiate all the ones you use.  This approach requires more
+     knowledge of exactly which instances you need than do the others,
+     but it's less mysterious and allows greater control.  You can
+     scatter the explicit instantiations throughout your program,
+     perhaps putting them in the translation units where the instances
+     are used or the translation units that define the templates
+     themselves; you can put all of the explicit instantiations you
+     need into one big file; or you can create small files like
+
+          #include "Foo.h"
+          #include "Foo.cc"
+
+          template class Foo<int>;
+          template ostream& operator <<
+                          (ostream&, const Foo<int>&);
+
+     for each of the instances you need, and create a template
+     instantiation library from those.
+
+     If you are using Cfront-model code, you can probably get away with
+     not using `-fno-implicit-templates' when compiling files that don't
+     `#include' the member template definitions.
+
+     If you use one big file to do the instantiations, you may want to
+     compile it without `-fno-implicit-templates' so you get all of the
+     instances required by your explicit instantiations (but not by any
+     other files) without having to specify them as well.
+
+     G++ has extended the template instantiation syntax given in the ISO
+     standard to allow forward declaration of explicit instantiations
+     (with `extern'), instantiation of the compiler support data for a
+     template class (i.e. the vtable) without instantiating any of its
+     members (with `inline'), and instantiation of only the static data
+     members of a template class, without the support data or member
+     functions (with (`static'):
+
+          extern template int max (int, int);
+          inline template class Foo<int>;
+          static template class Foo<int>;
+
+  3. Do nothing.  Pretend G++ does implement automatic instantiation
+     management.  Code written for the Borland model will work fine, but
+     each translation unit will contain instances of each of the
+     templates it uses.  In a large program, this can lead to an
+     unacceptable amount of code duplication.
+
+
+File: gcc.info,  Node: Bound member functions,  Next: C++ Attributes,  Prev: Template Instantiation,  Up: C++ Extensions
+
+7.6 Extracting the function pointer from a bound pointer to member function
+===========================================================================
+
+In C++, pointer to member functions (PMFs) are implemented using a wide
+pointer of sorts to handle all the possible call mechanisms; the PMF
+needs to store information about how to adjust the `this' pointer, and
+if the function pointed to is virtual, where to find the vtable, and
+where in the vtable to look for the member function.  If you are using
+PMFs in an inner loop, you should really reconsider that decision.  If
+that is not an option, you can extract the pointer to the function that
+would be called for a given object/PMF pair and call it directly inside
+the inner loop, to save a bit of time.
+
+ Note that you will still be paying the penalty for the call through a
+function pointer; on most modern architectures, such a call defeats the
+branch prediction features of the CPU.  This is also true of normal
+virtual function calls.
+
+ The syntax for this extension is
+
+     extern A a;
+     extern int (A::*fp)();
+     typedef int (*fptr)(A *);
+
+     fptr p = (fptr)(a.*fp);
+
+ For PMF constants (i.e. expressions of the form `&Klasse::Member'), no
+object is needed to obtain the address of the function.  They can be
+converted to function pointers directly:
+
+     fptr p1 = (fptr)(&A::foo);
+
+ You must specify `-Wno-pmf-conversions' to use this extension.
+
+
+File: gcc.info,  Node: C++ Attributes,  Next: Namespace Association,  Prev: Bound member functions,  Up: C++ Extensions
+
+7.7 C++-Specific Variable, Function, and Type Attributes
+========================================================
+
+Some attributes only make sense for C++ programs.
+
+`init_priority (PRIORITY)'
+     In Standard C++, objects defined at namespace scope are guaranteed
+     to be initialized in an order in strict accordance with that of
+     their definitions _in a given translation unit_.  No guarantee is
+     made for initializations across translation units.  However, GNU
+     C++ allows users to control the order of initialization of objects
+     defined at namespace scope with the `init_priority' attribute by
+     specifying a relative PRIORITY, a constant integral expression
+     currently bounded between 101 and 65535 inclusive.  Lower numbers
+     indicate a higher priority.
+
+     In the following example, `A' would normally be created before
+     `B', but the `init_priority' attribute has reversed that order:
+
+          Some_Class  A  __attribute__ ((init_priority (2000)));
+          Some_Class  B  __attribute__ ((init_priority (543)));
+
+     Note that the particular values of PRIORITY do not matter; only
+     their relative ordering.
+
+`java_interface'
+     This type attribute informs C++ that the class is a Java
+     interface.  It may only be applied to classes declared within an
+     `extern "Java"' block.  Calls to methods declared in this
+     interface will be dispatched using GCJ's interface table
+     mechanism, instead of regular virtual table dispatch.
+
+
+ See also *note Namespace Association::.
+
+
+File: gcc.info,  Node: Namespace Association,  Next: Type Traits,  Prev: C++ Attributes,  Up: C++ Extensions
+
+7.8 Namespace Association
+=========================
+
+*Caution:* The semantics of this extension are not fully defined.
+Users should refrain from using this extension as its semantics may
+change subtly over time.  It is possible that this extension will be
+removed in future versions of G++.
+
+ A using-directive with `__attribute ((strong))' is stronger than a
+normal using-directive in two ways:
+
+   * Templates from the used namespace can be specialized and explicitly
+     instantiated as though they were members of the using namespace.
+
+   * The using namespace is considered an associated namespace of all
+     templates in the used namespace for purposes of argument-dependent
+     name lookup.
+
+ The used namespace must be nested within the using namespace so that
+normal unqualified lookup works properly.
+
+ This is useful for composing a namespace transparently from
+implementation namespaces.  For example:
+
+     namespace std {
+       namespace debug {
+         template <class T> struct A { };
+       }
+       using namespace debug __attribute ((__strong__));
+       template <> struct A<int> { };   // ok to specialize
+
+       template <class T> void f (A<T>);
+     }
+
+     int main()
+     {
+       f (std::A<float>());             // lookup finds std::f
+       f (std::A<int>());
+     }
+
+
+File: gcc.info,  Node: Type Traits,  Next: Java Exceptions,  Prev: Namespace Association,  Up: C++ Extensions
+
+7.9 Type Traits
+===============
+
+The C++ front-end implements syntactic extensions that allow to
+determine at compile time various characteristics of a type (or of a
+pair of types).
+
+`__has_nothrow_assign (type)'
+     If `type' is const qualified or is a reference type then the trait
+     is false.  Otherwise if `__has_trivial_assign (type)' is true then
+     the trait is true, else if `type' is a cv class or union type with
+     copy assignment operators that are known not to throw an exception
+     then the trait is true, else it is false.  Requires: `type' shall
+     be a complete type, an array type of unknown bound, or is a `void'
+     type.
+
+`__has_nothrow_copy (type)'
+     If `__has_trivial_copy (type)' is true then the trait is true,
+     else if `type' is a cv class or union type with copy constructors
+     that are known not to throw an exception then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type, an
+     array type of unknown bound, or is a `void' type.
+
+`__has_nothrow_constructor (type)'
+     If `__has_trivial_constructor (type)' is true then the trait is
+     true, else if `type' is a cv class or union type (or array
+     thereof) with a default constructor that is known not to throw an
+     exception then the trait is true, else it is false.  Requires:
+     `type' shall be a complete type, an array type of unknown bound,
+     or is a `void' type.
+
+`__has_trivial_assign (type)'
+     If `type' is const qualified or is a reference type then the trait
+     is false.  Otherwise if `__is_pod (type)' is true then the trait is
+     true, else if `type' is a cv class or union type with a trivial
+     copy assignment ([class.copy]) then the trait is true, else it is
+     false.  Requires: `type' shall be a complete type, an array type
+     of unknown bound, or is a `void' type.
+
+`__has_trivial_copy (type)'
+     If `__is_pod (type)' is true or `type' is a reference type then
+     the trait is true, else if `type' is a cv class or union type with
+     a trivial copy constructor ([class.copy]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type, an
+     array type of unknown bound, or is a `void' type.
+
+`__has_trivial_constructor (type)'
+     If `__is_pod (type)' is true then the trait is true, else if
+     `type' is a cv class or union type (or array thereof) with a
+     trivial default constructor ([class.ctor]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type, an
+     array type of unknown bound, or is a `void' type.
+
+`__has_trivial_destructor (type)'
+     If `__is_pod (type)' is true or `type' is a reference type then
+     the trait is true, else if `type' is a cv class or union type (or
+     array thereof) with a trivial destructor ([class.dtor]) then the
+     trait is true, else it is false.  Requires: `type' shall be a
+     complete type, an array type of unknown bound, or is a `void' type.
+
+`__has_virtual_destructor (type)'
+     If `type' is a class type with a virtual destructor ([class.dtor])
+     then the trait is true, else it is false.  Requires: `type'  shall
+     be a complete type, an array type of unknown bound, or is a `void'
+     type.
+
+`__is_abstract (type)'
+     If `type' is an abstract class ([class.abstract]) then the trait
+     is true, else it is false.  Requires: `type' shall be a complete
+     type, an array type of unknown bound, or is a `void' type.
+
+`__is_base_of (base_type, derived_type)'
+     If `base_type' is a base class of `derived_type' ([class.derived])
+     then the trait is true, otherwise it is false.  Top-level cv
+     qualifications of `base_type' and `derived_type' are ignored.  For
+     the purposes of this trait, a class type is considered is own
+     base.  Requires: if `__is_class (base_type)' and `__is_class
+     (derived_type)' are true and `base_type' and `derived_type' are
+     not the same type (disregarding cv-qualifiers), `derived_type'
+     shall be a complete type.  Diagnostic is produced if this
+     requirement is not met.
+
+`__is_class (type)'
+     If `type' is a cv class type, and not a union type
+     ([basic.compound]) the trait is true, else it is false.
+
+`__is_empty (type)'
+     If `__is_class (type)' is false then the trait is false.
+     Otherwise `type' is considered empty if and only if: `type' has no
+     non-static data members, or all non-static data members, if any,
+     are bit-fields of length 0, and `type' has no virtual members, and
+     `type' has no virtual base classes, and `type' has no base classes
+     `base_type' for which `__is_empty (base_type)' is false.
+     Requires: `type' shall be a complete type, an array type of
+     unknown bound, or is a `void' type.
+
+`__is_enum (type)'
+     If `type' is a cv enumeration type ([basic.compound]) the trait is
+     true, else it is false.
+
+`__is_pod (type)'
+     If `type' is a cv POD type ([basic.types]) then the trait is true,
+     else it is false.  Requires: `type' shall be a complete type, an
+     array type of unknown bound, or is a `void' type.
+
+`__is_polymorphic (type)'
+     If `type' is a polymorphic class ([class.virtual]) then the trait
+     is true, else it is false.  Requires: `type' shall be a complete
+     type, an array type of unknown bound, or is a `void' type.
+
+`__is_union (type)'
+     If `type' is a cv union type ([basic.compound]) the trait is true,
+     else it is false.
+
+
+
+File: gcc.info,  Node: Java Exceptions,  Next: Deprecated Features,  Prev: Type Traits,  Up: C++ Extensions
+
+7.10 Java Exceptions
+====================
+
+The Java language uses a slightly different exception handling model
+from C++.  Normally, GNU C++ will automatically detect when you are
+writing C++ code that uses Java exceptions, and handle them
+appropriately.  However, if C++ code only needs to execute destructors
+when Java exceptions are thrown through it, GCC will guess incorrectly.
+Sample problematic code is:
+
+       struct S { ~S(); };
+       extern void bar();    // is written in Java, and may throw exceptions
+       void foo()
+       {
+         S s;
+         bar();
+       }
+
+The usual effect of an incorrect guess is a link failure, complaining of
+a missing routine called `__gxx_personality_v0'.
+
+ You can inform the compiler that Java exceptions are to be used in a
+translation unit, irrespective of what it might think, by writing
+`#pragma GCC java_exceptions' at the head of the file.  This `#pragma'
+must appear before any functions that throw or catch exceptions, or run
+destructors when exceptions are thrown through them.
+
+ You cannot mix Java and C++ exceptions in the same translation unit.
+It is believed to be safe to throw a C++ exception from one file through
+another file compiled for the Java exception model, or vice versa, but
+there may be bugs in this area.
+
+
+File: gcc.info,  Node: Deprecated Features,  Next: Backwards Compatibility,  Prev: Java Exceptions,  Up: C++ Extensions
+
+7.11 Deprecated Features
+========================
+
+In the past, the GNU C++ compiler was extended to experiment with new
+features, at a time when the C++ language was still evolving.  Now that
+the C++ standard is complete, some of those features are superseded by
+superior alternatives.  Using the old features might cause a warning in
+some cases that the feature will be dropped in the future.  In other
+cases, the feature might be gone already.
+
+ While the list below is not exhaustive, it documents some of the
+options that are now deprecated:
+
+`-fexternal-templates'
+`-falt-external-templates'
+     These are two of the many ways for G++ to implement template
+     instantiation.  *Note Template Instantiation::.  The C++ standard
+     clearly defines how template definitions have to be organized
+     across implementation units.  G++ has an implicit instantiation
+     mechanism that should work just fine for standard-conforming code.
+
+`-fstrict-prototype'
+`-fno-strict-prototype'
+     Previously it was possible to use an empty prototype parameter
+     list to indicate an unspecified number of parameters (like C),
+     rather than no parameters, as C++ demands.  This feature has been
+     removed, except where it is required for backwards compatibility.
+     *Note Backwards Compatibility::.
+
+ G++ allows a virtual function returning `void *' to be overridden by
+one returning a different pointer type.  This extension to the
+covariant return type rules is now deprecated and will be removed from a
+future version.
+
+ The G++ minimum and maximum operators (`<?' and `>?') and their
+compound forms (`<?=') and `>?=') have been deprecated and are now
+removed from G++.  Code using these operators should be modified to use
+`std::min' and `std::max' instead.
+
+ The named return value extension has been deprecated, and is now
+removed from G++.
+
+ The use of initializer lists with new expressions has been deprecated,
+and is now removed from G++.
+
+ Floating and complex non-type template parameters have been deprecated,
+and are now removed from G++.
+
+ The implicit typename extension has been deprecated and is now removed
+from G++.
+
+ The use of default arguments in function pointers, function typedefs
+and other places where they are not permitted by the standard is
+deprecated and will be removed from a future version of G++.
+
+ G++ allows floating-point literals to appear in integral constant
+expressions, e.g. ` enum E { e = int(2.2 * 3.7) } ' This extension is
+deprecated and will be removed from a future version.
+
+ G++ allows static data members of const floating-point type to be
+declared with an initializer in a class definition. The standard only
+allows initializers for static members of const integral types and const
+enumeration types so this extension has been deprecated and will be
+removed from a future version.
+
+
+File: gcc.info,  Node: Backwards Compatibility,  Prev: Deprecated Features,  Up: C++ Extensions
+
+7.12 Backwards Compatibility
+============================
+
+Now that there is a definitive ISO standard C++, G++ has a specification
+to adhere to.  The C++ language evolved over time, and features that
+used to be acceptable in previous drafts of the standard, such as the
+ARM [Annotated C++ Reference Manual], are no longer accepted.  In order
+to allow compilation of C++ written to such drafts, G++ contains some
+backwards compatibilities.  _All such backwards compatibility features
+are liable to disappear in future versions of G++._ They should be
+considered deprecated.   *Note Deprecated Features::.
+
+`For scope'
+     If a variable is declared at for scope, it used to remain in scope
+     until the end of the scope which contained the for statement
+     (rather than just within the for scope).  G++ retains this, but
+     issues a warning, if such a variable is accessed outside the for
+     scope.
+
+`Implicit C language'
+     Old C system header files did not contain an `extern "C" {...}'
+     scope to set the language.  On such systems, all header files are
+     implicitly scoped inside a C language scope.  Also, an empty
+     prototype `()' will be treated as an unspecified number of
+     arguments, rather than no arguments, as C++ demands.
+
+
+File: gcc.info,  Node: Objective-C,  Next: Compatibility,  Prev: C++ Extensions,  Up: Top
+
+8 GNU Objective-C runtime features
+**********************************
+
+This document is meant to describe some of the GNU Objective-C runtime
+features.  It is not intended to teach you Objective-C, there are
+several resources on the Internet that present the language.  Questions
+and comments about this document to Ovidiu Predescu <ovidiu@cup.hp.com>.
+
+* Menu:
+
+* Executing code before main::
+* Type encoding::
+* Garbage Collection::
+* Constant string objects::
+* compatibility_alias::
+
+
+File: gcc.info,  Node: Executing code before main,  Next: Type encoding,  Prev: Objective-C,  Up: Objective-C
+
+8.1 `+load': Executing code before main
+=======================================
+
+The GNU Objective-C runtime provides a way that allows you to execute
+code before the execution of the program enters the `main' function.
+The code is executed on a per-class and a per-category basis, through a
+special class method `+load'.
+
+ This facility is very useful if you want to initialize global variables
+which can be accessed by the program directly, without sending a message
+to the class first.  The usual way to initialize global variables, in
+the `+initialize' method, might not be useful because `+initialize' is
+only called when the first message is sent to a class object, which in
+some cases could be too late.
+
+ Suppose for example you have a `FileStream' class that declares
+`Stdin', `Stdout' and `Stderr' as global variables, like below:
+
+
+     FileStream *Stdin = nil;
+     FileStream *Stdout = nil;
+     FileStream *Stderr = nil;
+
+     @implementation FileStream
+
+     + (void)initialize
+     {
+         Stdin = [[FileStream new] initWithFd:0];
+         Stdout = [[FileStream new] initWithFd:1];
+         Stderr = [[FileStream new] initWithFd:2];
+     }
+
+     /* Other methods here */
+     @end
+
+ In this example, the initialization of `Stdin', `Stdout' and `Stderr'
+in `+initialize' occurs too late.  The programmer can send a message to
+one of these objects before the variables are actually initialized,
+thus sending messages to the `nil' object.  The `+initialize' method
+which actually initializes the global variables is not invoked until
+the first message is sent to the class object.  The solution would
+require these variables to be initialized just before entering `main'.
+
+ The correct solution of the above problem is to use the `+load' method
+instead of `+initialize':
+
+
+     @implementation FileStream
+
+     + (void)load
+     {
+         Stdin = [[FileStream new] initWithFd:0];
+         Stdout = [[FileStream new] initWithFd:1];
+         Stderr = [[FileStream new] initWithFd:2];
+     }
+
+     /* Other methods here */
+     @end
+
+ The `+load' is a method that is not overridden by categories.  If a
+class and a category of it both implement `+load', both methods are
+invoked.  This allows some additional initializations to be performed in
+a category.
+
+ This mechanism is not intended to be a replacement for `+initialize'.
+You should be aware of its limitations when you decide to use it
+instead of `+initialize'.
+
+* Menu:
+
+* What you can and what you cannot do in +load::
+
+
+File: gcc.info,  Node: What you can and what you cannot do in +load,  Prev: Executing code before main,  Up: Executing code before main
+
+8.1.1 What you can and what you cannot do in `+load'
+----------------------------------------------------
+
+The `+load' implementation in the GNU runtime guarantees you the
+following things:
+
+   * you can write whatever C code you like;
+
+   * you can send messages to Objective-C constant strings (`@"this is a
+     constant string"');
+
+   * you can allocate and send messages to objects whose class is
+     implemented in the same file;
+
+   * the `+load' implementation of all super classes of a class are
+     executed before the `+load' of that class is executed;
+
+   * the `+load' implementation of a class is executed before the
+     `+load' implementation of any category.
+
+
+ In particular, the following things, even if they can work in a
+particular case, are not guaranteed:
+
+   * allocation of or sending messages to arbitrary objects;
+
+   * allocation of or sending messages to objects whose classes have a
+     category implemented in the same file;
+
+
+ You should make no assumptions about receiving `+load' in sibling
+classes when you write `+load' of a class.  The order in which sibling
+classes receive `+load' is not guaranteed.
+
+ The order in which `+load' and `+initialize' are called could be
+problematic if this matters.  If you don't allocate objects inside
+`+load', it is guaranteed that `+load' is called before `+initialize'.
+If you create an object inside `+load' the `+initialize' method of
+object's class is invoked even if `+load' was not invoked.  Note if you
+explicitly call `+load' on a class, `+initialize' will be called first.
+To avoid possible problems try to implement only one of these methods.
+
+ The `+load' method is also invoked when a bundle is dynamically loaded
+into your running program.  This happens automatically without any
+intervening operation from you.  When you write bundles and you need to
+write `+load' you can safely create and send messages to objects whose
+classes already exist in the running program.  The same restrictions as
+above apply to classes defined in bundle.
+
+
+File: gcc.info,  Node: Type encoding,  Next: Garbage Collection,  Prev: Executing code before main,  Up: Objective-C
+
+8.2 Type encoding
+=================
+
+The Objective-C compiler generates type encodings for all the types.
+These type encodings are used at runtime to find out information about
+selectors and methods and about objects and classes.
+
+ The types are encoded in the following way:
+
+`_Bool'            `B'
+`char'             `c'
+`unsigned char'    `C'
+`short'            `s'
+`unsigned short'   `S'
+`int'              `i'
+`unsigned int'     `I'
+`long'             `l'
+`unsigned long'    `L'
+`long long'        `q'
+`unsigned long     `Q'
+long'              
+`float'            `f'
+`double'           `d'
+`void'             `v'
+`id'               `@'
+`Class'            `#'
+`SEL'              `:'
+`char*'            `*'
+unknown type       `?'
+Complex types      `j' followed by the inner type.  For example
+                   `_Complex double' is encoded as "jd".
+bit-fields         `b' followed by the starting position of the
+                   bit-field, the type of the bit-field and the size of
+                   the bit-field (the bit-fields encoding was changed
+                   from the NeXT's compiler encoding, see below)
+
+ The encoding of bit-fields has changed to allow bit-fields to be
+properly handled by the runtime functions that compute sizes and
+alignments of types that contain bit-fields.  The previous encoding
+contained only the size of the bit-field.  Using only this information
+it is not possible to reliably compute the size occupied by the
+bit-field.  This is very important in the presence of the Boehm's
+garbage collector because the objects are allocated using the typed
+memory facility available in this collector.  The typed memory
+allocation requires information about where the pointers are located
+inside the object.
+
+ The position in the bit-field is the position, counting in bits, of the
+bit closest to the beginning of the structure.
+
+ The non-atomic types are encoded as follows:
+
+pointers       `^' followed by the pointed type.
+arrays         `[' followed by the number of elements in the array
+               followed by the type of the elements followed by `]'
+structures     `{' followed by the name of the structure (or `?' if the
+               structure is unnamed), the `=' sign, the type of the
+               members and by `}'
+unions         `(' followed by the name of the structure (or `?' if the
+               union is unnamed), the `=' sign, the type of the members
+               followed by `)'
+
+ Here are some types and their encodings, as they are generated by the
+compiler on an i386 machine:
+
+
+Objective-C type   Compiler encoding
+     int a[10];    `[10i]'
+     struct {      `{?=i[3f]b128i3b131i2c}'
+       int i;      
+       float f[3]; 
+       int a:3;    
+       int b:2;    
+       char c;     
+     }             
+
+
+ In addition to the types the compiler also encodes the type
+specifiers.  The table below describes the encoding of the current
+Objective-C type specifiers:
+
+
+Specifier          Encoding
+`const'            `r'
+`in'               `n'
+`inout'            `N'
+`out'              `o'
+`bycopy'           `O'
+`oneway'           `V'
+
+
+ The type specifiers are encoded just before the type.  Unlike types
+however, the type specifiers are only encoded when they appear in method
+argument types.
+
+
+File: gcc.info,  Node: Garbage Collection,  Next: Constant string objects,  Prev: Type encoding,  Up: Objective-C
+
+8.3 Garbage Collection
+======================
+
+Support for a new memory management policy has been added by using a
+powerful conservative garbage collector, known as the
+Boehm-Demers-Weiser conservative garbage collector.  It is available
+from `http://www.hpl.hp.com/personal/Hans_Boehm/gc/'.
+
+ To enable the support for it you have to configure the compiler using
+an additional argument, `--enable-objc-gc'.  You need to have garbage
+collector installed before building the compiler.  This will build an
+additional runtime library which has several enhancements to support
+the garbage collector.  The new library has a new name, `libobjc_gc.a'
+to not conflict with the non-garbage-collected library.
+
+ When the garbage collector is used, the objects are allocated using the
+so-called typed memory allocation mechanism available in the
+Boehm-Demers-Weiser collector.  This mode requires precise information
+on where pointers are located inside objects.  This information is
+computed once per class, immediately after the class has been
+initialized.
+
+ There is a new runtime function `class_ivar_set_gcinvisible()' which
+can be used to declare a so-called "weak pointer" reference.  Such a
+pointer is basically hidden for the garbage collector; this can be
+useful in certain situations, especially when you want to keep track of
+the allocated objects, yet allow them to be collected.  This kind of
+pointers can only be members of objects, you cannot declare a global
+pointer as a weak reference.  Every type which is a pointer type can be
+declared a weak pointer, including `id', `Class' and `SEL'.
+
+ Here is an example of how to use this feature.  Suppose you want to
+implement a class whose instances hold a weak pointer reference; the
+following class does this:
+
+
+     @interface WeakPointer : Object
+     {
+         const void* weakPointer;
+     }
+
+     - initWithPointer:(const void*)p;
+     - (const void*)weakPointer;
+     @end
+
+
+     @implementation WeakPointer
+
+     + (void)initialize
+     {
+       class_ivar_set_gcinvisible (self, "weakPointer", YES);
+     }
+
+     - initWithPointer:(const void*)p
+     {
+       weakPointer = p;
+       return self;
+     }
+
+     - (const void*)weakPointer
+     {
+       return weakPointer;
+     }
+
+     @end
+
+ Weak pointers are supported through a new type character specifier
+represented by the `!' character.  The `class_ivar_set_gcinvisible()'
+function adds or removes this specifier to the string type description
+of the instance variable named as argument.
+
+
+File: gcc.info,  Node: Constant string objects,  Next: compatibility_alias,  Prev: Garbage Collection,  Up: Objective-C
+
+8.4 Constant string objects
+===========================
+
+GNU Objective-C provides constant string objects that are generated
+directly by the compiler.  You declare a constant string object by
+prefixing a C constant string with the character `@':
+
+       id myString = @"this is a constant string object";
+
+ The constant string objects are by default instances of the
+`NXConstantString' class which is provided by the GNU Objective-C
+runtime.  To get the definition of this class you must include the
+`objc/NXConstStr.h' header file.
+
+ User defined libraries may want to implement their own constant string
+class.  To be able to support them, the GNU Objective-C compiler
+provides a new command line options
+`-fconstant-string-class=CLASS-NAME'.  The provided class should adhere
+to a strict structure, the same as `NXConstantString''s structure:
+
+
+     @interface MyConstantStringClass
+     {
+       Class isa;
+       char *c_string;
+       unsigned int len;
+     }
+     @end
+
+ `NXConstantString' inherits from `Object'; user class libraries may
+choose to inherit the customized constant string class from a different
+class than `Object'.  There is no requirement in the methods the
+constant string class has to implement, but the final ivar layout of
+the class must be the compatible with the given structure.
+
+ When the compiler creates the statically allocated constant string
+object, the `c_string' field will be filled by the compiler with the
+string; the `length' field will be filled by the compiler with the
+string length; the `isa' pointer will be filled with `NULL' by the
+compiler, and it will later be fixed up automatically at runtime by the
+GNU Objective-C runtime library to point to the class which was set by
+the `-fconstant-string-class' option when the object file is loaded (if
+you wonder how it works behind the scenes, the name of the class to
+use, and the list of static objects to fixup, are stored by the
+compiler in the object file in a place where the GNU runtime library
+will find them at runtime).
+
+ As a result, when a file is compiled with the
+`-fconstant-string-class' option, all the constant string objects will
+be instances of the class specified as argument to this option.  It is
+possible to have multiple compilation units referring to different
+constant string classes, neither the compiler nor the linker impose any
+restrictions in doing this.
+
+
+File: gcc.info,  Node: compatibility_alias,  Prev: Constant string objects,  Up: Objective-C
+
+8.5 compatibility_alias
+=======================
+
+This is a feature of the Objective-C compiler rather than of the
+runtime, anyway since it is documented nowhere and its existence was
+forgotten, we are documenting it here.
+
+ The keyword `@compatibility_alias' allows you to define a class name
+as equivalent to another class name.  For example:
+
+     @compatibility_alias WOApplication GSWApplication;
+
+ tells the compiler that each time it encounters `WOApplication' as a
+class name, it should replace it with `GSWApplication' (that is,
+`WOApplication' is just an alias for `GSWApplication').
+
+ There are some constraints on how this can be used--
+
+   * `WOApplication' (the alias) must not be an existing class;
+
+   * `GSWApplication' (the real class) must be an existing class.
+
+
+
+File: gcc.info,  Node: Compatibility,  Next: Gcov,  Prev: Objective-C,  Up: Top
+
+9 Binary Compatibility
+**********************
+
+Binary compatibility encompasses several related concepts:
+
+"application binary interface (ABI)"
+     The set of runtime conventions followed by all of the tools that
+     deal with binary representations of a program, including
+     compilers, assemblers, linkers, and language runtime support.
+     Some ABIs are formal with a written specification, possibly
+     designed by multiple interested parties.  Others are simply the
+     way things are actually done by a particular set of tools.
+
+"ABI conformance"
+     A compiler conforms to an ABI if it generates code that follows
+     all of the specifications enumerated by that ABI.  A library
+     conforms to an ABI if it is implemented according to that ABI.  An
+     application conforms to an ABI if it is built using tools that
+     conform to that ABI and does not contain source code that
+     specifically changes behavior specified by the ABI.
+
+"calling conventions"
+     Calling conventions are a subset of an ABI that specify of how
+     arguments are passed and function results are returned.
+
+"interoperability"
+     Different sets of tools are interoperable if they generate files
+     that can be used in the same program.  The set of tools includes
+     compilers, assemblers, linkers, libraries, header files, startup
+     files, and debuggers.  Binaries produced by different sets of
+     tools are not interoperable unless they implement the same ABI.
+     This applies to different versions of the same tools as well as
+     tools from different vendors.
+
+"intercallability"
+     Whether a function in a binary built by one set of tools can call a
+     function in a binary built by a different set of tools is a subset
+     of interoperability.
+
+"implementation-defined features"
+     Language standards include lists of implementation-defined
+     features whose behavior can vary from one implementation to
+     another.  Some of these features are normally covered by a
+     platform's ABI and others are not.  The features that are not
+     covered by an ABI generally affect how a program behaves, but not
+     intercallability.
+
+"compatibility"
+     Conformance to the same ABI and the same behavior of
+     implementation-defined features are both relevant for
+     compatibility.
+
+ The application binary interface implemented by a C or C++ compiler
+affects code generation and runtime support for:
+
+   * size and alignment of data types
+
+   * layout of structured types
+
+   * calling conventions
+
+   * register usage conventions
+
+   * interfaces for runtime arithmetic support
+
+   * object file formats
+
+ In addition, the application binary interface implemented by a C++
+compiler affects code generation and runtime support for:
+   * name mangling
+
+   * exception handling
+
+   * invoking constructors and destructors
+
+   * layout, alignment, and padding of classes
+
+   * layout and alignment of virtual tables
+
+ Some GCC compilation options cause the compiler to generate code that
+does not conform to the platform's default ABI.  Other options cause
+different program behavior for implementation-defined features that are
+not covered by an ABI.  These options are provided for consistency with
+other compilers that do not follow the platform's default ABI or the
+usual behavior of implementation-defined features for the platform.  Be
+very careful about using such options.
+
+ Most platforms have a well-defined ABI that covers C code, but ABIs
+that cover C++ functionality are not yet common.
+
+ Starting with GCC 3.2, GCC binary conventions for C++ are based on a
+written, vendor-neutral C++ ABI that was designed to be specific to
+64-bit Itanium but also includes generic specifications that apply to
+any platform.  This C++ ABI is also implemented by other compiler
+vendors on some platforms, notably GNU/Linux and BSD systems.  We have
+tried hard to provide a stable ABI that will be compatible with future
+GCC releases, but it is possible that we will encounter problems that
+make this difficult.  Such problems could include different
+interpretations of the C++ ABI by different vendors, bugs in the ABI, or
+bugs in the implementation of the ABI in different compilers.  GCC's
+`-Wabi' switch warns when G++ generates code that is probably not
+compatible with the C++ ABI.
+
+ The C++ library used with a C++ compiler includes the Standard C++
+Library, with functionality defined in the C++ Standard, plus language
+runtime support.  The runtime support is included in a C++ ABI, but
+there is no formal ABI for the Standard C++ Library.  Two
+implementations of that library are interoperable if one follows the
+de-facto ABI of the other and if they are both built with the same
+compiler, or with compilers that conform to the same ABI for C++
+compiler and runtime support.
+
+ When G++ and another C++ compiler conform to the same C++ ABI, but the
+implementations of the Standard C++ Library that they normally use do
+not follow the same ABI for the Standard C++ Library, object files
+built with those compilers can be used in the same program only if they
+use the same C++ library.  This requires specifying the location of the
+C++ library header files when invoking the compiler whose usual library
+is not being used.  The location of GCC's C++ header files depends on
+how the GCC build was configured, but can be seen by using the G++ `-v'
+option.  With default configuration options for G++ 3.3 the compile
+line for a different C++ compiler needs to include
+
+         -IGCC_INSTALL_DIRECTORY/include/c++/3.3
+
+ Similarly, compiling code with G++ that must use a C++ library other
+than the GNU C++ library requires specifying the location of the header
+files for that other library.
+
+ The most straightforward way to link a program to use a particular C++
+library is to use a C++ driver that specifies that C++ library by
+default.  The `g++' driver, for example, tells the linker where to find
+GCC's C++ library (`libstdc++') plus the other libraries and startup
+files it needs, in the proper order.
+
+ If a program must use a different C++ library and it's not possible to
+do the final link using a C++ driver that uses that library by default,
+it is necessary to tell `g++' the location and name of that library.
+It might also be necessary to specify different startup files and other
+runtime support libraries, and to suppress the use of GCC's support
+libraries with one or more of the options `-nostdlib', `-nostartfiles',
+and `-nodefaultlibs'.
+
+
+File: gcc.info,  Node: Gcov,  Next: Trouble,  Prev: Compatibility,  Up: Top
+
+10 `gcov'--a Test Coverage Program
+**********************************
+
+`gcov' is a tool you can use in conjunction with GCC to test code
+coverage in your programs.
+
+* Menu:
+
+* Gcov Intro::                  Introduction to gcov.
+* Invoking Gcov::               How to use gcov.
+* Gcov and Optimization::       Using gcov with GCC optimization.
+* Gcov Data Files::             The files used by gcov.
+* Cross-profiling::             Data file relocation.
+
+
+File: gcc.info,  Node: Gcov Intro,  Next: Invoking Gcov,  Up: Gcov
+
+10.1 Introduction to `gcov'
+===========================
+
+`gcov' is a test coverage program.  Use it in concert with GCC to
+analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program.  You can use
+`gcov' as a profiling tool to help discover where your optimization
+efforts will best affect your code.  You can also use `gcov' along with
+the other profiling tool, `gprof', to assess which parts of your code
+use the greatest amount of computing time.
+
+ Profiling tools help you analyze your code's performance.  Using a
+profiler such as `gcov' or `gprof', you can find out some basic
+performance statistics, such as:
+
+   * how often each line of code executes
+
+   * what lines of code are actually executed
+
+   * how much computing time each section of code uses
+
+ Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+`gcov' helps you determine where to work on optimization.
+
+ Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite.  Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+
+ You should compile your code without optimization if you plan to use
+`gcov' because the optimization, by combining some lines of code into
+one function, may not give you as much information as you need to look
+for `hot spots' where the code is using a great deal of computer time.
+Likewise, because `gcov' accumulates statistics by line (at the lowest
+resolution), it works best with a programming style that places only
+one statement on each line.  If you use complicated macros that expand
+to loops or to other control structures, the statistics are less
+helpful--they only report on the line where the macro call appears.  If
+your complex macros behave like functions, you can replace them with
+inline functions to solve this problem.
+
+ `gcov' creates a logfile called `SOURCEFILE.gcov' which indicates how
+many times each line of a source file `SOURCEFILE.c' has executed.  You
+can use these logfiles along with `gprof' to aid in fine-tuning the
+performance of your programs.  `gprof' gives timing information you can
+use along with the information you get from `gcov'.
+
+ `gcov' works only on code compiled with GCC.  It is not compatible
+with any other profiling or test coverage mechanism.
+
+
+File: gcc.info,  Node: Invoking Gcov,  Next: Gcov and Optimization,  Prev: Gcov Intro,  Up: Gcov
+
+10.2 Invoking `gcov'
+====================
+
+     gcov [OPTIONS] SOURCEFILES
+
+ `gcov' accepts the following options:
+
+`-h'
+`--help'
+     Display help about using `gcov' (on the standard output), and exit
+     without doing any further processing.
+
+`-v'
+`--version'
+     Display the `gcov' version number (on the standard output), and
+     exit without doing any further processing.
+
+`-a'
+`--all-blocks'
+     Write individual execution counts for every basic block.  Normally
+     gcov outputs execution counts only for the main blocks of a line.
+     With this option you can determine if blocks within a single line
+     are not being executed.
+
+`-b'
+`--branch-probabilities'
+     Write branch frequencies to the output file, and write branch
+     summary info to the standard output.  This option allows you to
+     see how often each branch in your program was taken.
+     Unconditional branches will not be shown, unless the `-u' option
+     is given.
+
+`-c'
+`--branch-counts'
+     Write branch frequencies as the number of branches taken, rather
+     than the percentage of branches taken.
+
+`-n'
+`--no-output'
+     Do not create the `gcov' output file.
+
+`-l'
+`--long-file-names'
+     Create long file names for included source files.  For example, if
+     the header file `x.h' contains code, and was included in the file
+     `a.c', then running `gcov' on the file `a.c' will produce an
+     output file called `a.c##x.h.gcov' instead of `x.h.gcov'.  This
+     can be useful if `x.h' is included in multiple source files.  If
+     you use the `-p' option, both the including and included file
+     names will be complete path names.
+
+`-p'
+`--preserve-paths'
+     Preserve complete path information in the names of generated
+     `.gcov' files.  Without this option, just the filename component is
+     used.  With this option, all directories are used, with `/'
+     characters translated to `#' characters, `.' directory components
+     removed and `..' components renamed to `^'.  This is useful if
+     sourcefiles are in several different directories.  It also affects
+     the `-l' option.
+
+`-f'
+`--function-summaries'
+     Output summaries for each function in addition to the file level
+     summary.
+
+`-o DIRECTORY|FILE'
+`--object-directory DIRECTORY'
+`--object-file FILE'
+     Specify either the directory containing the gcov data files, or the
+     object path name.  The `.gcno', and `.gcda' data files are
+     searched for using this option.  If a directory is specified, the
+     data files are in that directory and named after the source file
+     name, without its extension.  If a file is specified here, the
+     data files are named after that file, without its extension.  If
+     this option is not supplied, it defaults to the current directory.
+
+`-u'
+`--unconditional-branches'
+     When branch probabilities are given, include those of
+     unconditional branches.  Unconditional branches are normally not
+     interesting.
+
+
+ `gcov' should be run with the current directory the same as that when
+you invoked the compiler.  Otherwise it will not be able to locate the
+source files.  `gcov' produces files called `MANGLEDNAME.gcov' in the
+current directory.  These contain the coverage information of the
+source file they correspond to.  One `.gcov' file is produced for each
+source file containing code, which was compiled to produce the data
+files.  The MANGLEDNAME part of the output file name is usually simply
+the source file name, but can be something more complicated if the `-l'
+or `-p' options are given.  Refer to those options for details.
+
+ The `.gcov' files contain the `:' separated fields along with program
+source code.  The format is
+
+     EXECUTION_COUNT:LINE_NUMBER:SOURCE LINE TEXT
+
+ Additional block information may succeed each line, when requested by
+command line option.  The EXECUTION_COUNT is `-' for lines containing
+no code and `#####' for lines which were never executed.  Some lines of
+information at the start have LINE_NUMBER of zero.
+
+ The preamble lines are of the form
+
+     -:0:TAG:VALUE
+
+ The ordering and number of these preamble lines will be augmented as
+`gcov' development progresses -- do not rely on them remaining
+unchanged.  Use TAG to locate a particular preamble line.
+
+ The additional block information is of the form
+
+     TAG INFORMATION
+
+ The INFORMATION is human readable, but designed to be simple enough
+for machine parsing too.
+
+ When printing percentages, 0% and 100% are only printed when the values
+are _exactly_ 0% and 100% respectively.  Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+
+ When using `gcov', you must first compile your program with two
+special GCC options: `-fprofile-arcs -ftest-coverage'.  This tells the
+compiler to generate additional information needed by gcov (basically a
+flow graph of the program) and also includes additional code in the
+object files for generating the extra profiling information needed by
+gcov.  These additional files are placed in the directory where the
+object file is located.
+
+ Running the program will cause profile output to be generated.  For
+each source file compiled with `-fprofile-arcs', an accompanying
+`.gcda' file will be placed in the object file directory.
+
+ Running `gcov' with your program's source file names as arguments will
+now produce a listing of the code along with frequency of execution for
+each line.  For example, if your program is called `tmp.c', this is
+what you see when you use the basic `gcov' facility:
+
+     $ gcc -fprofile-arcs -ftest-coverage tmp.c
+     $ a.out
+     $ gcov tmp.c
+     90.00% of 10 source lines executed in file tmp.c
+     Creating tmp.c.gcov.
+
+ The file `tmp.c.gcov' contains output from `gcov'.  Here is a sample:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+             1:    4:{
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+            10:   10:    total += i;
+             -:   11:
+             1:   12:  if (total != 45)
+         #####:   13:    printf ("Failure\n");
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+             1:   16:  return 0;
+             -:   17:}
+
+ When you use the `-a' option, you will get individual block counts,
+and the output looks like this:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+             1:    4:{
+             1:    4-block  0
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+            11:    9-block  0
+            10:   10:    total += i;
+            10:   10-block  0
+             -:   11:
+             1:   12:  if (total != 45)
+             1:   12-block  0
+         #####:   13:    printf ("Failure\n");
+         $$$$$:   13-block  0
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+             1:   15-block  0
+             1:   16:  return 0;
+             1:   16-block  0
+             -:   17:}
+
+ In this mode, each basic block is only shown on one line - the last
+line of the block.  A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown to
+contain code, unless previous blocks end on those lines.  The total
+execution count of a line is shown and subsequent lines show the
+execution counts for individual blocks that end on that line.  After
+each block, the branch and call counts of the block will be shown, if
+the `-b' option is given.
+
+ Because of the way GCC instruments calls, a call count can be shown
+after a line with no individual blocks.  As you can see, line 13
+contains a basic block that was not executed.
+
+ When you use the `-b' option, your output looks like this:
+
+     $ gcov -b tmp.c
+     90.00% of 10 source lines executed in file tmp.c
+     80.00% of 5 branches executed in file tmp.c
+     80.00% of 5 branches taken at least once in file tmp.c
+     50.00% of 2 calls executed in file tmp.c
+     Creating tmp.c.gcov.
+
+ Here is a sample of a resulting `tmp.c.gcov' file:
+
+             -:    0:Source:tmp.c
+             -:    0:Graph:tmp.gcno
+             -:    0:Data:tmp.gcda
+             -:    0:Runs:1
+             -:    0:Programs:1
+             -:    1:#include <stdio.h>
+             -:    2:
+             -:    3:int main (void)
+     function main called 1 returned 1 blocks executed 75%
+             1:    4:{
+             1:    5:  int i, total;
+             -:    6:
+             1:    7:  total = 0;
+             -:    8:
+            11:    9:  for (i = 0; i < 10; i++)
+     branch  0 taken 91% (fallthrough)
+     branch  1 taken 9%
+            10:   10:    total += i;
+             -:   11:
+             1:   12:  if (total != 45)
+     branch  0 taken 0% (fallthrough)
+     branch  1 taken 100%
+         #####:   13:    printf ("Failure\n");
+     call    0 never executed
+             -:   14:  else
+             1:   15:    printf ("Success\n");
+     call    0 called 1 returned 100%
+             1:   16:  return 0;
+             -:   17:}
+
+ For each function, a line is printed showing how many times the
+function is called, how many times it returns and what percentage of the
+function's blocks were executed.
+
+ For each basic block, a line is printed after the last line of the
+basic block describing the branch or call that ends the basic block.
+There can be multiple branches and calls listed for a single source
+line if there are multiple basic blocks that end on that line.  In this
+case, the branches and calls are each given a number.  There is no
+simple way to map these branches and calls back to source constructs.
+In general, though, the lowest numbered branch or call will correspond
+to the leftmost construct on the source line.
+
+ For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed.  Otherwise, the
+message "never executed" is printed.
+
+ For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed.  This will usually be
+100%, but may be less for functions that call `exit' or `longjmp', and
+thus may not return every time they are called.
+
+ The execution counts are cumulative.  If the example program were
+executed again without removing the `.gcda' file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s).  This is potentially useful in
+several ways.  For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+
+ The data in the `.gcda' files is saved immediately before the program
+exits.  For each source file compiled with `-fprofile-arcs', the
+profiling code first attempts to read in an existing `.gcda' file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file.  It then adds in the
+new execution counts and finally writes the data to the file.
+
+
+File: gcc.info,  Node: Gcov and Optimization,  Next: Gcov Data Files,  Prev: Invoking Gcov,  Up: Gcov
+
+10.3 Using `gcov' with GCC Optimization
+=======================================
+
+If you plan to use `gcov' to help optimize your code, you must first
+compile your program with two special GCC options: `-fprofile-arcs
+-ftest-coverage'.  Aside from that, you can use any other GCC options;
+but if you want to prove that every single line in your program was
+executed, you should not compile with optimization at the same time.
+On some machines the optimizer can eliminate some simple code lines by
+combining them with other lines.  For example, code like this:
+
+     if (a != b)
+       c = 1;
+     else
+       c = 0;
+
+can be compiled into one instruction on some machines.  In this case,
+there is no way for `gcov' to calculate separate execution counts for
+each line because there isn't separate code for each line.  Hence the
+`gcov' output looks like this if you compiled the program with
+optimization:
+
+           100:   12:if (a != b)
+           100:   13:  c = 1;
+           100:   14:else
+           100:   15:  c = 0;
+
+ The output shows that this block of code, combined by optimization,
+executed 100 times.  In one sense this result is correct, because there
+was only one instruction representing all four of these lines.  However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+
+ Inlineable functions can create unexpected line counts.  Line counts
+are shown for the source code of the inlineable function, but what is
+shown depends on where the function is inlined, or if it is not inlined
+at all.
+
+ If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it.  If `fileA.o'
+and `fileB.o' both contain out of line bodies of a particular
+inlineable function, they will also both contain coverage counts for
+that function.  When `fileA.o' and `fileB.o' are linked together, the
+linker will, on many systems, select one of those out of line bodies
+for all calls to that function, and remove or ignore the other.
+Unfortunately, it will not remove the coverage counters for the unused
+function body.  Hence when instrumented, all but one use of that
+function will show zero counts.
+
+ If the function is inlined in several places, the block structure in
+each location might not be the same.  For instance, a condition might
+now be calculable at compile time in some instances.  Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+
+
+File: gcc.info,  Node: Gcov Data Files,  Next: Cross-profiling,  Prev: Gcov and Optimization,  Up: Gcov
+
+10.4 Brief description of `gcov' data files
+===========================================
+
+`gcov' uses two files for profiling.  The names of these files are
+derived from the original _object_ file by substituting the file suffix
+with either `.gcno', or `.gcda'.  All of these files are placed in the
+same directory as the object file, and contain data stored in a
+platform-independent format.
+
+ The `.gcno' file is generated when the source file is compiled with
+the GCC `-ftest-coverage' option.  It contains information to
+reconstruct the basic block graphs and assign source line numbers to
+blocks.
+
+ The `.gcda' file is generated when a program containing object files
+built with the GCC `-fprofile-arcs' option is executed.  A separate
+`.gcda' file is created for each object file compiled with this option.
+It contains arc transition counts, and some summary information.
+
+ The full details of the file format is specified in `gcov-io.h', and
+functions provided in that header file should be used to access the
+coverage files.
+
+
+File: gcc.info,  Node: Cross-profiling,  Prev: Gcov Data Files,  Up: Gcov
+
+10.5 Data file relocation to support cross-profiling
+====================================================
+
+Running the program will cause profile output to be generated.  For each
+source file compiled with `-fprofile-arcs', an accompanying `.gcda'
+file will be placed in the object file directory. That implicitly
+requires running the program on the same system as it was built or
+having the same absolute directory structure on the target system. The
+program will try to create the needed directory structure, if it is not
+already present.
+
+ To support cross-profiling, a program compiled with `-fprofile-arcs'
+can relocate the data files based on two environment variables:
+
+   * GCOV_PREFIX contains the prefix to add to the absolute paths in
+     the object file. Prefix must be absolute as well, otherwise its
+     value is ignored. The default is no prefix.
+
+   * GCOV_PREFIX_STRIP indicates the how many initial directory names
+     to strip off the hardwired absolute paths. Default value is 0.
+
+     _Note:_ GCOV_PREFIX_STRIP has no effect if GCOV_PREFIX is
+     undefined, empty or non-absolute.
+
+ For example, if the object file `/user/build/foo.o' was built with
+`-fprofile-arcs', the final executable will try to create the data file
+`/user/build/foo.gcda' when running on the target system.  This will
+fail if the corresponding directory does not exist and it is unable to
+create it.  This can be overcome by, for example, setting the
+environment as `GCOV_PREFIX=/target/run' and `GCOV_PREFIX_STRIP=1'.
+Such a setting will name the data file `/target/run/build/foo.gcda'.
+
+ You must move the data files to the expected directory tree in order to
+use them for profile directed optimizations (`--use-profile'), or to
+use the `gcov' tool.
+
+
+File: gcc.info,  Node: Trouble,  Next: Bugs,  Prev: Gcov,  Up: Top
+
+11 Known Causes of Trouble with GCC
+***********************************
+
+This section describes known problems that affect users of GCC.  Most
+of these are not GCC bugs per se--if they were, we would fix them.  But
+the result for a user may be like the result of a bug.
+
+ Some of these problems are due to bugs in other software, some are
+missing features that are too much work to add, and some are places
+where people's opinions differ as to what is best.
+
+* Menu:
+
+* Actual Bugs::         Bugs we will fix later.
+* Cross-Compiler Problems:: Common problems of cross compiling with GCC.
+* Interoperation::      Problems using GCC with other compilers,
+                        and with certain linkers, assemblers and debuggers.
+* Incompatibilities::   GCC is incompatible with traditional C.
+* Fixed Headers::       GCC uses corrected versions of system header files.
+                        This is necessary, but doesn't always work smoothly.
+* Standard Libraries::  GCC uses the system C library, which might not be
+                        compliant with the ISO C standard.
+* Disappointments::     Regrettable things we can't change, but not quite bugs.
+* C++ Misunderstandings:: Common misunderstandings with GNU C++.
+* Non-bugs::            Things we think are right, but some others disagree.
+* Warnings and Errors:: Which problems in your code get warnings,
+                        and which get errors.
+
+
+File: gcc.info,  Node: Actual Bugs,  Next: Cross-Compiler Problems,  Up: Trouble
+
+11.1 Actual Bugs We Haven't Fixed Yet
+=====================================
+
+   * The `fixincludes' script interacts badly with automounters; if the
+     directory of system header files is automounted, it tends to be
+     unmounted while `fixincludes' is running.  This would seem to be a
+     bug in the automounter.  We don't know any good way to work around
+     it.
+
+
+File: gcc.info,  Node: Cross-Compiler Problems,  Next: Interoperation,  Prev: Actual Bugs,  Up: Trouble
+
+11.2 Cross-Compiler Problems
+============================
+
+You may run into problems with cross compilation on certain machines,
+for several reasons.
+
+   * At present, the program `mips-tfile' which adds debug support to
+     object files on MIPS systems does not work in a cross compile
+     environment.
+
+
+File: gcc.info,  Node: Interoperation,  Next: Incompatibilities,  Prev: Cross-Compiler Problems,  Up: Trouble
+
+11.3 Interoperation
+===================
+
+This section lists various difficulties encountered in using GCC
+together with other compilers or with the assemblers, linkers,
+libraries and debuggers on certain systems.
+
+   * On many platforms, GCC supports a different ABI for C++ than do
+     other compilers, so the object files compiled by GCC cannot be
+     used with object files generated by another C++ compiler.
+
+     An area where the difference is most apparent is name mangling.
+     The use of different name mangling is intentional, to protect you
+     from more subtle problems.  Compilers differ as to many internal
+     details of C++ implementation, including: how class instances are
+     laid out, how multiple inheritance is implemented, and how virtual
+     function calls are handled.  If the name encoding were made the
+     same, your programs would link against libraries provided from
+     other compilers--but the programs would then crash when run.
+     Incompatible libraries are then detected at link time, rather than
+     at run time.
+
+   * On some BSD systems, including some versions of Ultrix, use of
+     profiling causes static variable destructors (currently used only
+     in C++) not to be run.
+
+   * On some SGI systems, when you use `-lgl_s' as an option, it gets
+     translated magically to `-lgl_s -lX11_s -lc_s'.  Naturally, this
+     does not happen when you use GCC.  You must specify all three
+     options explicitly.
+
+   * On a SPARC, GCC aligns all values of type `double' on an 8-byte
+     boundary, and it expects every `double' to be so aligned.  The Sun
+     compiler usually gives `double' values 8-byte alignment, with one
+     exception: function arguments of type `double' may not be aligned.
+
+     As a result, if a function compiled with Sun CC takes the address
+     of an argument of type `double' and passes this pointer of type
+     `double *' to a function compiled with GCC, dereferencing the
+     pointer may cause a fatal signal.
+
+     One way to solve this problem is to compile your entire program
+     with GCC.  Another solution is to modify the function that is
+     compiled with Sun CC to copy the argument into a local variable;
+     local variables are always properly aligned.  A third solution is
+     to modify the function that uses the pointer to dereference it via
+     the following function `access_double' instead of directly with
+     `*':
+
+          inline double
+          access_double (double *unaligned_ptr)
+          {
+            union d2i { double d; int i[2]; };
+
+            union d2i *p = (union d2i *) unaligned_ptr;
+            union d2i u;
+
+            u.i[0] = p->i[0];
+            u.i[1] = p->i[1];
+
+            return u.d;
+          }
+
+     Storing into the pointer can be done likewise with the same union.
+
+   * On Solaris, the `malloc' function in the `libmalloc.a' library may
+     allocate memory that is only 4 byte aligned.  Since GCC on the
+     SPARC assumes that doubles are 8 byte aligned, this may result in a
+     fatal signal if doubles are stored in memory allocated by the
+     `libmalloc.a' library.
+
+     The solution is to not use the `libmalloc.a' library.  Use instead
+     `malloc' and related functions from `libc.a'; they do not have
+     this problem.
+
+   * On the HP PA machine, ADB sometimes fails to work on functions
+     compiled with GCC.  Specifically, it fails to work on functions
+     that use `alloca' or variable-size arrays.  This is because GCC
+     doesn't generate HP-UX unwind descriptors for such functions.  It
+     may even be impossible to generate them.
+
+   * Debugging (`-g') is not supported on the HP PA machine, unless you
+     use the preliminary GNU tools.
+
+   * Taking the address of a label may generate errors from the HP-UX
+     PA assembler.  GAS for the PA does not have this problem.
+
+   * Using floating point parameters for indirect calls to static
+     functions will not work when using the HP assembler.  There simply
+     is no way for GCC to specify what registers hold arguments for
+     static functions when using the HP assembler.  GAS for the PA does
+     not have this problem.
+
+   * In extremely rare cases involving some very large functions you may
+     receive errors from the HP linker complaining about an out of
+     bounds unconditional branch offset.  This used to occur more often
+     in previous versions of GCC, but is now exceptionally rare.  If
+     you should run into it, you can work around by making your
+     function smaller.
+
+   * GCC compiled code sometimes emits warnings from the HP-UX
+     assembler of the form:
+
+          (warning) Use of GR3 when
+            frame >= 8192 may cause conflict.
+
+     These warnings are harmless and can be safely ignored.
+
+   * In extremely rare cases involving some very large functions you may
+     receive errors from the AIX Assembler complaining about a
+     displacement that is too large.  If you should run into it, you
+     can work around by making your function smaller.
+
+   * The `libstdc++.a' library in GCC relies on the SVR4 dynamic linker
+     semantics which merges global symbols between libraries and
+     applications, especially necessary for C++ streams functionality.
+     This is not the default behavior of AIX shared libraries and
+     dynamic linking.  `libstdc++.a' is built on AIX with
+     "runtime-linking" enabled so that symbol merging can occur.  To
+     utilize this feature, the application linked with `libstdc++.a'
+     must include the `-Wl,-brtl' flag on the link line.  G++ cannot
+     impose this because this option may interfere with the semantics
+     of the user program and users may not always use `g++' to link his
+     or her application.  Applications are not required to use the
+     `-Wl,-brtl' flag on the link line--the rest of the `libstdc++.a'
+     library which is not dependent on the symbol merging semantics
+     will continue to function correctly.
+
+   * An application can interpose its own definition of functions for
+     functions invoked by `libstdc++.a' with "runtime-linking" enabled
+     on AIX.  To accomplish this the application must be linked with
+     "runtime-linking" option and the functions explicitly must be
+     exported by the application (`-Wl,-brtl,-bE:exportfile').
+
+   * AIX on the RS/6000 provides support (NLS) for environments outside
+     of the United States.  Compilers and assemblers use NLS to support
+     locale-specific representations of various objects including
+     floating-point numbers (`.' vs `,' for separating decimal
+     fractions).  There have been problems reported where the library
+     linked with GCC does not produce the same floating-point formats
+     that the assembler accepts.  If you have this problem, set the
+     `LANG' environment variable to `C' or `En_US'.
+
+   * Even if you specify `-fdollars-in-identifiers', you cannot
+     successfully use `$' in identifiers on the RS/6000 due to a
+     restriction in the IBM assembler.  GAS supports these identifiers.
+
+
+
+File: gcc.info,  Node: Incompatibilities,  Next: Fixed Headers,  Prev: Interoperation,  Up: Trouble
+
+11.4 Incompatibilities of GCC
+=============================
+
+There are several noteworthy incompatibilities between GNU C and K&R
+(non-ISO) versions of C.
+
+   * GCC normally makes string constants read-only.  If several
+     identical-looking string constants are used, GCC stores only one
+     copy of the string.
+
+     One consequence is that you cannot call `mktemp' with a string
+     constant argument.  The function `mktemp' always alters the string
+     its argument points to.
+
+     Another consequence is that `sscanf' does not work on some very
+     old systems when passed a string constant as its format control
+     string or input.  This is because `sscanf' incorrectly tries to
+     write into the string constant.  Likewise `fscanf' and `scanf'.
+
+     The solution to these problems is to change the program to use
+     `char'-array variables with initialization strings for these
+     purposes instead of string constants.
+
+   * `-2147483648' is positive.
+
+     This is because 2147483648 cannot fit in the type `int', so
+     (following the ISO C rules) its data type is `unsigned long int'.
+     Negating this value yields 2147483648 again.
+
+   * GCC does not substitute macro arguments when they appear inside of
+     string constants.  For example, the following macro in GCC
+
+          #define foo(a) "a"
+
+     will produce output `"a"' regardless of what the argument A is.
+
+   * When you use `setjmp' and `longjmp', the only automatic variables
+     guaranteed to remain valid are those declared `volatile'.  This is
+     a consequence of automatic register allocation.  Consider this
+     function:
+
+          jmp_buf j;
+
+          foo ()
+          {
+            int a, b;
+
+            a = fun1 ();
+            if (setjmp (j))
+              return a;
+
+            a = fun2 ();
+            /* `longjmp (j)' may occur in `fun3'. */
+            return a + fun3 ();
+          }
+
+     Here `a' may or may not be restored to its first value when the
+     `longjmp' occurs.  If `a' is allocated in a register, then its
+     first value is restored; otherwise, it keeps the last value stored
+     in it.
+
+     If you use the `-W' option with the `-O' option, you will get a
+     warning when GCC thinks such a problem might be possible.
+
+   * Programs that use preprocessing directives in the middle of macro
+     arguments do not work with GCC.  For example, a program like this
+     will not work:
+
+          foobar (
+          #define luser
+                  hack)
+
+     ISO C does not permit such a construct.
+
+   * K&R compilers allow comments to cross over an inclusion boundary
+     (i.e. started in an include file and ended in the including file).
+
+   * Declarations of external variables and functions within a block
+     apply only to the block containing the declaration.  In other
+     words, they have the same scope as any other declaration in the
+     same place.
+
+     In some other C compilers, an `extern' declaration affects all the
+     rest of the file even if it happens within a block.
+
+   * In traditional C, you can combine `long', etc., with a typedef
+     name, as shown here:
+
+          typedef int foo;
+          typedef long foo bar;
+
+     In ISO C, this is not allowed: `long' and other type modifiers
+     require an explicit `int'.
+
+   * PCC allows typedef names to be used as function parameters.
+
+   * Traditional C allows the following erroneous pair of declarations
+     to appear together in a given scope:
+
+          typedef int foo;
+          typedef foo foo;
+
+   * GCC treats all characters of identifiers as significant.
+     According to K&R-1 (2.2), "No more than the first eight characters
+     are significant, although more may be used.".  Also according to
+     K&R-1 (2.2), "An identifier is a sequence of letters and digits;
+     the first character must be a letter.  The underscore _ counts as
+     a letter.", but GCC also allows dollar signs in identifiers.
+
+   * PCC allows whitespace in the middle of compound assignment
+     operators such as `+='.  GCC, following the ISO standard, does not
+     allow this.
+
+   * GCC complains about unterminated character constants inside of
+     preprocessing conditionals that fail.  Some programs have English
+     comments enclosed in conditionals that are guaranteed to fail; if
+     these comments contain apostrophes, GCC will probably report an
+     error.  For example, this code would produce an error:
+
+          #if 0
+          You can't expect this to work.
+          #endif
+
+     The best solution to such a problem is to put the text into an
+     actual C comment delimited by `/*...*/'.
+
+   * Many user programs contain the declaration `long time ();'.  In the
+     past, the system header files on many systems did not actually
+     declare `time', so it did not matter what type your program
+     declared it to return.  But in systems with ISO C headers, `time'
+     is declared to return `time_t', and if that is not the same as
+     `long', then `long time ();' is erroneous.
+
+     The solution is to change your program to use appropriate system
+     headers (`<time.h>' on systems with ISO C headers) and not to
+     declare `time' if the system header files declare it, or failing
+     that to use `time_t' as the return type of `time'.
+
+   * When compiling functions that return `float', PCC converts it to a
+     double.  GCC actually returns a `float'.  If you are concerned
+     with PCC compatibility, you should declare your functions to return
+     `double'; you might as well say what you mean.
+
+   * When compiling functions that return structures or unions, GCC
+     output code normally uses a method different from that used on most
+     versions of Unix.  As a result, code compiled with GCC cannot call
+     a structure-returning function compiled with PCC, and vice versa.
+
+     The method used by GCC is as follows: a structure or union which is
+     1, 2, 4 or 8 bytes long is returned like a scalar.  A structure or
+     union with any other size is stored into an address supplied by
+     the caller (usually in a special, fixed register, but on some
+     machines it is passed on the stack).  The target hook
+     `TARGET_STRUCT_VALUE_RTX' tells GCC where to pass this address.
+
+     By contrast, PCC on most target machines returns structures and
+     unions of any size by copying the data into an area of static
+     storage, and then returning the address of that storage as if it
+     were a pointer value.  The caller must copy the data from that
+     memory area to the place where the value is wanted.  GCC does not
+     use this method because it is slower and nonreentrant.
+
+     On some newer machines, PCC uses a reentrant convention for all
+     structure and union returning.  GCC on most of these machines uses
+     a compatible convention when returning structures and unions in
+     memory, but still returns small structures and unions in registers.
+
+     You can tell GCC to use a compatible convention for all structure
+     and union returning with the option `-fpcc-struct-return'.
+
+   * GCC complains about program fragments such as `0x74ae-0x4000'
+     which appear to be two hexadecimal constants separated by the minus
+     operator.  Actually, this string is a single "preprocessing token".
+     Each such token must correspond to one token in C.  Since this
+     does not, GCC prints an error message.  Although it may appear
+     obvious that what is meant is an operator and two values, the ISO
+     C standard specifically requires that this be treated as erroneous.
+
+     A "preprocessing token" is a "preprocessing number" if it begins
+     with a digit and is followed by letters, underscores, digits,
+     periods and `e+', `e-', `E+', `E-', `p+', `p-', `P+', or `P-'
+     character sequences.  (In strict C90 mode, the sequences `p+',
+     `p-', `P+' and `P-' cannot appear in preprocessing numbers.)
+
+     To make the above program fragment valid, place whitespace in
+     front of the minus sign.  This whitespace will end the
+     preprocessing number.
+
+
+File: gcc.info,  Node: Fixed Headers,  Next: Standard Libraries,  Prev: Incompatibilities,  Up: Trouble
+
+11.5 Fixed Header Files
+=======================
+
+GCC needs to install corrected versions of some system header files.
+This is because most target systems have some header files that won't
+work with GCC unless they are changed.  Some have bugs, some are
+incompatible with ISO C, and some depend on special features of other
+compilers.
+
+ Installing GCC automatically creates and installs the fixed header
+files, by running a program called `fixincludes'.  Normally, you don't
+need to pay attention to this.  But there are cases where it doesn't do
+the right thing automatically.
+
+   * If you update the system's header files, such as by installing a
+     new system version, the fixed header files of GCC are not
+     automatically updated.  They can be updated using the `mkheaders'
+     script installed in `LIBEXECDIR/gcc/TARGET/VERSION/install-tools/'.
+
+   * On some systems, header file directories contain machine-specific
+     symbolic links in certain places.  This makes it possible to share
+     most of the header files among hosts running the same version of
+     the system on different machine models.
+
+     The programs that fix the header files do not understand this
+     special way of using symbolic links; therefore, the directory of
+     fixed header files is good only for the machine model used to
+     build it.
+
+     It is possible to make separate sets of fixed header files for the
+     different machine models, and arrange a structure of symbolic
+     links so as to use the proper set, but you'll have to do this by
+     hand.
+
+
+File: gcc.info,  Node: Standard Libraries,  Next: Disappointments,  Prev: Fixed Headers,  Up: Trouble
+
+11.6 Standard Libraries
+=======================
+
+GCC by itself attempts to be a conforming freestanding implementation.
+*Note Language Standards Supported by GCC: Standards, for details of
+what this means.  Beyond the library facilities required of such an
+implementation, the rest of the C library is supplied by the vendor of
+the operating system.  If that C library doesn't conform to the C
+standards, then your programs might get warnings (especially when using
+`-Wall') that you don't expect.
+
+ For example, the `sprintf' function on SunOS 4.1.3 returns `char *'
+while the C standard says that `sprintf' returns an `int'.  The
+`fixincludes' program could make the prototype for this function match
+the Standard, but that would be wrong, since the function will still
+return `char *'.
+
+ If you need a Standard compliant library, then you need to find one, as
+GCC does not provide one.  The GNU C library (called `glibc') provides
+ISO C, POSIX, BSD, SystemV and X/Open compatibility for GNU/Linux and
+HURD-based GNU systems; no recent version of it supports other systems,
+though some very old versions did.  Version 2.2 of the GNU C library
+includes nearly complete C99 support.  You could also ask your
+operating system vendor if newer libraries are available.
+
+
+File: gcc.info,  Node: Disappointments,  Next: C++ Misunderstandings,  Prev: Standard Libraries,  Up: Trouble
+
+11.7 Disappointments and Misunderstandings
+==========================================
+
+These problems are perhaps regrettable, but we don't know any practical
+way around them.
+
+   * Certain local variables aren't recognized by debuggers when you
+     compile with optimization.
+
+     This occurs because sometimes GCC optimizes the variable out of
+     existence.  There is no way to tell the debugger how to compute the
+     value such a variable "would have had", and it is not clear that
+     would be desirable anyway.  So GCC simply does not mention the
+     eliminated variable when it writes debugging information.
+
+     You have to expect a certain amount of disagreement between the
+     executable and your source code, when you use optimization.
+
+   * Users often think it is a bug when GCC reports an error for code
+     like this:
+
+          int foo (struct mumble *);
+
+          struct mumble { ... };
+
+          int foo (struct mumble *x)
+          { ... }
+
+     This code really is erroneous, because the scope of `struct
+     mumble' in the prototype is limited to the argument list
+     containing it.  It does not refer to the `struct mumble' defined
+     with file scope immediately below--they are two unrelated types
+     with similar names in different scopes.
+
+     But in the definition of `foo', the file-scope type is used
+     because that is available to be inherited.  Thus, the definition
+     and the prototype do not match, and you get an error.
+
+     This behavior may seem silly, but it's what the ISO standard
+     specifies.  It is easy enough for you to make your code work by
+     moving the definition of `struct mumble' above the prototype.
+     It's not worth being incompatible with ISO C just to avoid an
+     error for the example shown above.
+
+   * Accesses to bit-fields even in volatile objects works by accessing
+     larger objects, such as a byte or a word.  You cannot rely on what
+     size of object is accessed in order to read or write the
+     bit-field; it may even vary for a given bit-field according to the
+     precise usage.
+
+     If you care about controlling the amount of memory that is
+     accessed, use volatile but do not use bit-fields.
+
+   * GCC comes with shell scripts to fix certain known problems in
+     system header files.  They install corrected copies of various
+     header files in a special directory where only GCC will normally
+     look for them.  The scripts adapt to various systems by searching
+     all the system header files for the problem cases that we know
+     about.
+
+     If new system header files are installed, nothing automatically
+     arranges to update the corrected header files.  They can be
+     updated using the `mkheaders' script installed in
+     `LIBEXECDIR/gcc/TARGET/VERSION/install-tools/'.
+
+   * On 68000 and x86 systems, for instance, you can get paradoxical
+     results if you test the precise values of floating point numbers.
+     For example, you can find that a floating point value which is not
+     a NaN is not equal to itself.  This results from the fact that the
+     floating point registers hold a few more bits of precision than
+     fit in a `double' in memory.  Compiled code moves values between
+     memory and floating point registers at its convenience, and moving
+     them into memory truncates them.
+
+     You can partially avoid this problem by using the `-ffloat-store'
+     option (*note Optimize Options::).
+
+   * On AIX and other platforms without weak symbol support, templates
+     need to be instantiated explicitly and symbols for static members
+     of templates will not be generated.
+
+   * On AIX, GCC scans object files and library archives for static
+     constructors and destructors when linking an application before the
+     linker prunes unreferenced symbols.  This is necessary to prevent
+     the AIX linker from mistakenly assuming that static constructor or
+     destructor are unused and removing them before the scanning can
+     occur.  All static constructors and destructors found will be
+     referenced even though the modules in which they occur may not be
+     used by the program.  This may lead to both increased executable
+     size and unexpected symbol references.
+
+
+File: gcc.info,  Node: C++ Misunderstandings,  Next: Non-bugs,  Prev: Disappointments,  Up: Trouble
+
+11.8 Common Misunderstandings with GNU C++
+==========================================
+
+C++ is a complex language and an evolving one, and its standard
+definition (the ISO C++ standard) was only recently completed.  As a
+result, your C++ compiler may occasionally surprise you, even when its
+behavior is correct.  This section discusses some areas that frequently
+give rise to questions of this sort.
+
+* Menu:
+
+* Static Definitions::  Static member declarations are not definitions
+* Name lookup::         Name lookup, templates, and accessing members of base classes
+* Temporaries::         Temporaries may vanish before you expect
+* Copy Assignment::     Copy Assignment operators copy virtual bases twice
+
+
+File: gcc.info,  Node: Static Definitions,  Next: Name lookup,  Up: C++ Misunderstandings
+
+11.8.1 Declare _and_ Define Static Members
+------------------------------------------
+
+When a class has static data members, it is not enough to _declare_ the
+static member; you must also _define_ it.  For example:
+
+     class Foo
+     {
+       ...
+       void method();
+       static int bar;
+     };
+
+ This declaration only establishes that the class `Foo' has an `int'
+named `Foo::bar', and a member function named `Foo::method'.  But you
+still need to define _both_ `method' and `bar' elsewhere.  According to
+the ISO standard, you must supply an initializer in one (and only one)
+source file, such as:
+
+     int Foo::bar = 0;
+
+ Other C++ compilers may not correctly implement the standard behavior.
+As a result, when you switch to `g++' from one of these compilers, you
+may discover that a program that appeared to work correctly in fact
+does not conform to the standard: `g++' reports as undefined symbols
+any static data members that lack definitions.
+
+
+File: gcc.info,  Node: Name lookup,  Next: Temporaries,  Prev: Static Definitions,  Up: C++ Misunderstandings
+
+11.8.2 Name lookup, templates, and accessing members of base classes
+--------------------------------------------------------------------
+
+The C++ standard prescribes that all names that are not dependent on
+template parameters are bound to their present definitions when parsing
+a template function or class.(1)  Only names that are dependent are
+looked up at the point of instantiation.  For example, consider
+
+       void foo(double);
+
+       struct A {
+         template <typename T>
+         void f () {
+           foo (1);        // 1
+           int i = N;      // 2
+           T t;
+           t.bar();        // 3
+           foo (t);        // 4
+         }
+
+         static const int N;
+       };
+
+ Here, the names `foo' and `N' appear in a context that does not depend
+on the type of `T'.  The compiler will thus require that they are
+defined in the context of use in the template, not only before the
+point of instantiation, and will here use `::foo(double)' and `A::N',
+respectively.  In particular, it will convert the integer value to a
+`double' when passing it to `::foo(double)'.
+
+ Conversely, `bar' and the call to `foo' in the fourth marked line are
+used in contexts that do depend on the type of `T', so they are only
+looked up at the point of instantiation, and you can provide
+declarations for them after declaring the template, but before
+instantiating it.  In particular, if you instantiate `A::f<int>', the
+last line will call an overloaded `::foo(int)' if one was provided,
+even if after the declaration of `struct A'.
+
+ This distinction between lookup of dependent and non-dependent names is
+called two-stage (or dependent) name lookup.  G++ implements it since
+version 3.4.
+
+ Two-stage name lookup sometimes leads to situations with behavior
+different from non-template codes.  The most common is probably this:
+
+       template <typename T> struct Base {
+         int i;
+       };
+
+       template <typename T> struct Derived : public Base<T> {
+         int get_i() { return i; }
+       };
+
+ In `get_i()', `i' is not used in a dependent context, so the compiler
+will look for a name declared at the enclosing namespace scope (which
+is the global scope here).  It will not look into the base class, since
+that is dependent and you may declare specializations of `Base' even
+after declaring `Derived', so the compiler can't really know what `i'
+would refer to.  If there is no global variable `i', then you will get
+an error message.
+
+ In order to make it clear that you want the member of the base class,
+you need to defer lookup until instantiation time, at which the base
+class is known.  For this, you need to access `i' in a dependent
+context, by either using `this->i' (remember that `this' is of type
+`Derived<T>*', so is obviously dependent), or using `Base<T>::i'.
+Alternatively, `Base<T>::i' might be brought into scope by a
+`using'-declaration.
+
+ Another, similar example involves calling member functions of a base
+class:
+
+       template <typename T> struct Base {
+           int f();
+       };
+
+       template <typename T> struct Derived : Base<T> {
+           int g() { return f(); };
+       };
+
+ Again, the call to `f()' is not dependent on template arguments (there
+are no arguments that depend on the type `T', and it is also not
+otherwise specified that the call should be in a dependent context).
+Thus a global declaration of such a function must be available, since
+the one in the base class is not visible until instantiation time.  The
+compiler will consequently produce the following error message:
+
+       x.cc: In member function `int Derived<T>::g()':
+       x.cc:6: error: there are no arguments to `f' that depend on a template
+          parameter, so a declaration of `f' must be available
+       x.cc:6: error: (if you use `-fpermissive', G++ will accept your code, but
+          allowing the use of an undeclared name is deprecated)
+
+ To make the code valid either use `this->f()', or `Base<T>::f()'.
+Using the `-fpermissive' flag will also let the compiler accept the
+code, by marking all function calls for which no declaration is visible
+at the time of definition of the template for later lookup at
+instantiation time, as if it were a dependent call.  We do not
+recommend using `-fpermissive' to work around invalid code, and it will
+also only catch cases where functions in base classes are called, not
+where variables in base classes are used (as in the example above).
+
+ Note that some compilers (including G++ versions prior to 3.4) get
+these examples wrong and accept above code without an error.  Those
+compilers do not implement two-stage name lookup correctly.
+
+ ---------- Footnotes ----------
+
+ (1) The C++ standard just uses the term "dependent" for names that
+depend on the type or value of template parameters.  This shorter term
+will also be used in the rest of this section.
+
+
+File: gcc.info,  Node: Temporaries,  Next: Copy Assignment,  Prev: Name lookup,  Up: C++ Misunderstandings
+
+11.8.3 Temporaries May Vanish Before You Expect
+-----------------------------------------------
+
+It is dangerous to use pointers or references to _portions_ of a
+temporary object.  The compiler may very well delete the object before
+you expect it to, leaving a pointer to garbage.  The most common place
+where this problem crops up is in classes like string classes,
+especially ones that define a conversion function to type `char *' or
+`const char *'--which is one reason why the standard `string' class
+requires you to call the `c_str' member function.  However, any class
+that returns a pointer to some internal structure is potentially
+subject to this problem.
+
+ For example, a program may use a function `strfunc' that returns
+`string' objects, and another function `charfunc' that operates on
+pointers to `char':
+
+     string strfunc ();
+     void charfunc (const char *);
+
+     void
+     f ()
+     {
+       const char *p = strfunc().c_str();
+       ...
+       charfunc (p);
+       ...
+       charfunc (p);
+     }
+
+In this situation, it may seem reasonable to save a pointer to the C
+string returned by the `c_str' member function and use that rather than
+call `c_str' repeatedly.  However, the temporary string created by the
+call to `strfunc' is destroyed after `p' is initialized, at which point
+`p' is left pointing to freed memory.
+
+ Code like this may run successfully under some other compilers,
+particularly obsolete cfront-based compilers that delete temporaries
+along with normal local variables.  However, the GNU C++ behavior is
+standard-conforming, so if your program depends on late destruction of
+temporaries it is not portable.
+
+ The safe way to write such code is to give the temporary a name, which
+forces it to remain until the end of the scope of the name.  For
+example:
+
+     const string& tmp = strfunc ();
+     charfunc (tmp.c_str ());
+
+
+File: gcc.info,  Node: Copy Assignment,  Prev: Temporaries,  Up: C++ Misunderstandings
+
+11.8.4 Implicit Copy-Assignment for Virtual Bases
+-------------------------------------------------
+
+When a base class is virtual, only one subobject of the base class
+belongs to each full object.  Also, the constructors and destructors are
+invoked only once, and called from the most-derived class.  However,
+such objects behave unspecified when being assigned.  For example:
+
+     struct Base{
+       char *name;
+       Base(char *n) : name(strdup(n)){}
+       Base& operator= (const Base& other){
+        free (name);
+        name = strdup (other.name);
+       }
+     };
+
+     struct A:virtual Base{
+       int val;
+       A():Base("A"){}
+     };
+
+     struct B:virtual Base{
+       int bval;
+       B():Base("B"){}
+     };
+
+     struct Derived:public A, public B{
+       Derived():Base("Derived"){}
+     };
+
+     void func(Derived &d1, Derived &d2)
+     {
+       d1 = d2;
+     }
+
+ The C++ standard specifies that `Base::Base' is only called once when
+constructing or copy-constructing a Derived object.  It is unspecified
+whether `Base::operator=' is called more than once when the implicit
+copy-assignment for Derived objects is invoked (as it is inside `func'
+in the example).
+
+ G++ implements the "intuitive" algorithm for copy-assignment: assign
+all direct bases, then assign all members.  In that algorithm, the
+virtual base subobject can be encountered more than once.  In the
+example, copying proceeds in the following order: `val', `name' (via
+`strdup'), `bval', and `name' again.
+
+ If application code relies on copy-assignment, a user-defined
+copy-assignment operator removes any uncertainties.  With such an
+operator, the application can define whether and how the virtual base
+subobject is assigned.
+
+
+File: gcc.info,  Node: Non-bugs,  Next: Warnings and Errors,  Prev: C++ Misunderstandings,  Up: Trouble
+
+11.9 Certain Changes We Don't Want to Make
+==========================================
+
+This section lists changes that people frequently request, but which we
+do not make because we think GCC is better without them.
+
+   * Checking the number and type of arguments to a function which has
+     an old-fashioned definition and no prototype.
+
+     Such a feature would work only occasionally--only for calls that
+     appear in the same file as the called function, following the
+     definition.  The only way to check all calls reliably is to add a
+     prototype for the function.  But adding a prototype eliminates the
+     motivation for this feature.  So the feature is not worthwhile.
+
+   * Warning about using an expression whose type is signed as a shift
+     count.
+
+     Shift count operands are probably signed more often than unsigned.
+     Warning about this would cause far more annoyance than good.
+
+   * Warning about assigning a signed value to an unsigned variable.
+
+     Such assignments must be very common; warning about them would
+     cause more annoyance than good.
+
+   * Warning when a non-void function value is ignored.
+
+     C contains many standard functions that return a value that most
+     programs choose to ignore.  One obvious example is `printf'.
+     Warning about this practice only leads the defensive programmer to
+     clutter programs with dozens of casts to `void'.  Such casts are
+     required so frequently that they become visual noise.  Writing
+     those casts becomes so automatic that they no longer convey useful
+     information about the intentions of the programmer.  For functions
+     where the return value should never be ignored, use the
+     `warn_unused_result' function attribute (*note Function
+     Attributes::).
+
+   * Making `-fshort-enums' the default.
+
+     This would cause storage layout to be incompatible with most other
+     C compilers.  And it doesn't seem very important, given that you
+     can get the same result in other ways.  The case where it matters
+     most is when the enumeration-valued object is inside a structure,
+     and in that case you can specify a field width explicitly.
+
+   * Making bit-fields unsigned by default on particular machines where
+     "the ABI standard" says to do so.
+
+     The ISO C standard leaves it up to the implementation whether a
+     bit-field declared plain `int' is signed or not.  This in effect
+     creates two alternative dialects of C.
+
+     The GNU C compiler supports both dialects; you can specify the
+     signed dialect with `-fsigned-bitfields' and the unsigned dialect
+     with `-funsigned-bitfields'.  However, this leaves open the
+     question of which dialect to use by default.
+
+     Currently, the preferred dialect makes plain bit-fields signed,
+     because this is simplest.  Since `int' is the same as `signed int'
+     in every other context, it is cleanest for them to be the same in
+     bit-fields as well.
+
+     Some computer manufacturers have published Application Binary
+     Interface standards which specify that plain bit-fields should be
+     unsigned.  It is a mistake, however, to say anything about this
+     issue in an ABI.  This is because the handling of plain bit-fields
+     distinguishes two dialects of C.  Both dialects are meaningful on
+     every type of machine.  Whether a particular object file was
+     compiled using signed bit-fields or unsigned is of no concern to
+     other object files, even if they access the same bit-fields in the
+     same data structures.
+
+     A given program is written in one or the other of these two
+     dialects.  The program stands a chance to work on most any machine
+     if it is compiled with the proper dialect.  It is unlikely to work
+     at all if compiled with the wrong dialect.
+
+     Many users appreciate the GNU C compiler because it provides an
+     environment that is uniform across machines.  These users would be
+     inconvenienced if the compiler treated plain bit-fields
+     differently on certain machines.
+
+     Occasionally users write programs intended only for a particular
+     machine type.  On these occasions, the users would benefit if the
+     GNU C compiler were to support by default the same dialect as the
+     other compilers on that machine.  But such applications are rare.
+     And users writing a program to run on more than one type of
+     machine cannot possibly benefit from this kind of compatibility.
+
+     This is why GCC does and will treat plain bit-fields in the same
+     fashion on all types of machines (by default).
+
+     There are some arguments for making bit-fields unsigned by default
+     on all machines.  If, for example, this becomes a universal de
+     facto standard, it would make sense for GCC to go along with it.
+     This is something to be considered in the future.
+
+     (Of course, users strongly concerned about portability should
+     indicate explicitly in each bit-field whether it is signed or not.
+     In this way, they write programs which have the same meaning in
+     both C dialects.)
+
+   * Undefining `__STDC__' when `-ansi' is not used.
+
+     Currently, GCC defines `__STDC__' unconditionally.  This provides
+     good results in practice.
+
+     Programmers normally use conditionals on `__STDC__' to ask whether
+     it is safe to use certain features of ISO C, such as function
+     prototypes or ISO token concatenation.  Since plain `gcc' supports
+     all the features of ISO C, the correct answer to these questions is
+     "yes".
+
+     Some users try to use `__STDC__' to check for the availability of
+     certain library facilities.  This is actually incorrect usage in
+     an ISO C program, because the ISO C standard says that a conforming
+     freestanding implementation should define `__STDC__' even though it
+     does not have the library facilities.  `gcc -ansi -pedantic' is a
+     conforming freestanding implementation, and it is therefore
+     required to define `__STDC__', even though it does not come with
+     an ISO C library.
+
+     Sometimes people say that defining `__STDC__' in a compiler that
+     does not completely conform to the ISO C standard somehow violates
+     the standard.  This is illogical.  The standard is a standard for
+     compilers that claim to support ISO C, such as `gcc -ansi'--not
+     for other compilers such as plain `gcc'.  Whatever the ISO C
+     standard says is relevant to the design of plain `gcc' without
+     `-ansi' only for pragmatic reasons, not as a requirement.
+
+     GCC normally defines `__STDC__' to be 1, and in addition defines
+     `__STRICT_ANSI__' if you specify the `-ansi' option, or a `-std'
+     option for strict conformance to some version of ISO C.  On some
+     hosts, system include files use a different convention, where
+     `__STDC__' is normally 0, but is 1 if the user specifies strict
+     conformance to the C Standard.  GCC follows the host convention
+     when processing system include files, but when processing user
+     files it follows the usual GNU C convention.
+
+   * Undefining `__STDC__' in C++.
+
+     Programs written to compile with C++-to-C translators get the
+     value of `__STDC__' that goes with the C compiler that is
+     subsequently used.  These programs must test `__STDC__' to
+     determine what kind of C preprocessor that compiler uses: whether
+     they should concatenate tokens in the ISO C fashion or in the
+     traditional fashion.
+
+     These programs work properly with GNU C++ if `__STDC__' is defined.
+     They would not work otherwise.
+
+     In addition, many header files are written to provide prototypes
+     in ISO C but not in traditional C.  Many of these header files can
+     work without change in C++ provided `__STDC__' is defined.  If
+     `__STDC__' is not defined, they will all fail, and will all need
+     to be changed to test explicitly for C++ as well.
+
+   * Deleting "empty" loops.
+
+     Historically, GCC has not deleted "empty" loops under the
+     assumption that the most likely reason you would put one in a
+     program is to have a delay, so deleting them will not make real
+     programs run any faster.
+
+     However, the rationale here is that optimization of a nonempty loop
+     cannot produce an empty one. This held for carefully written C
+     compiled with less powerful optimizers but is not always the case
+     for carefully written C++ or with more powerful optimizers.  Thus
+     GCC will remove operations from loops whenever it can determine
+     those operations are not externally visible (apart from the time
+     taken to execute them, of course).  In case the loop can be proved
+     to be finite, GCC will also remove the loop itself.
+
+     Be aware of this when performing timing tests, for instance the
+     following loop can be completely removed, provided
+     `some_expression' can provably not change any global state.
+
+          {
+             int sum = 0;
+             int ix;
+
+             for (ix = 0; ix != 10000; ix++)
+                sum += some_expression;
+          }
+
+     Even though `sum' is accumulated in the loop, no use is made of
+     that summation, so the accumulation can be removed.
+
+   * Making side effects happen in the same order as in some other
+     compiler.
+
+     It is never safe to depend on the order of evaluation of side
+     effects.  For example, a function call like this may very well
+     behave differently from one compiler to another:
+
+          void func (int, int);
+
+          int i = 2;
+          func (i++, i++);
+
+     There is no guarantee (in either the C or the C++ standard language
+     definitions) that the increments will be evaluated in any
+     particular order.  Either increment might happen first.  `func'
+     might get the arguments `2, 3', or it might get `3, 2', or even
+     `2, 2'.
+
+   * Making certain warnings into errors by default.
+
+     Some ISO C testsuites report failure when the compiler does not
+     produce an error message for a certain program.
+
+     ISO C requires a "diagnostic" message for certain kinds of invalid
+     programs, but a warning is defined by GCC to count as a
+     diagnostic.  If GCC produces a warning but not an error, that is
+     correct ISO C support.  If testsuites call this "failure", they
+     should be run with the GCC option `-pedantic-errors', which will
+     turn these warnings into errors.
+
+
+
+File: gcc.info,  Node: Warnings and Errors,  Prev: Non-bugs,  Up: Trouble
+
+11.10 Warning Messages and Error Messages
+=========================================
+
+The GNU compiler can produce two kinds of diagnostics: errors and
+warnings.  Each kind has a different purpose:
+
+     "Errors" report problems that make it impossible to compile your
+     program.  GCC reports errors with the source file name and line
+     number where the problem is apparent.
+
+     "Warnings" report other unusual conditions in your code that _may_
+     indicate a problem, although compilation can (and does) proceed.
+     Warning messages also report the source file name and line number,
+     but include the text `warning:' to distinguish them from error
+     messages.
+
+ Warnings may indicate danger points where you should check to make sure
+that your program really does what you intend; or the use of obsolete
+features; or the use of nonstandard features of GNU C or C++.  Many
+warnings are issued only if you ask for them, with one of the `-W'
+options (for instance, `-Wall' requests a variety of useful warnings).
+
+ GCC always tries to compile your program if possible; it never
+gratuitously rejects a program whose meaning is clear merely because
+(for instance) it fails to conform to a standard.  In some cases,
+however, the C and C++ standards specify that certain extensions are
+forbidden, and a diagnostic _must_ be issued by a conforming compiler.
+The `-pedantic' option tells GCC to issue warnings in such cases;
+`-pedantic-errors' says to make them errors instead.  This does not
+mean that _all_ non-ISO constructs get warnings or errors.
+
+ *Note Options to Request or Suppress Warnings: Warning Options, for
+more detail on these and related command-line options.
+
+
+File: gcc.info,  Node: Bugs,  Next: Service,  Prev: Trouble,  Up: Top
+
+12 Reporting Bugs
+*****************
+
+Your bug reports play an essential role in making GCC reliable.
+
+ When you encounter a problem, the first thing to do is to see if it is
+already known.  *Note Trouble::.  If it isn't known, then you should
+report the problem.
+
+* Menu:
+
+* Criteria:  Bug Criteria.   Have you really found a bug?
+* Reporting: Bug Reporting.  How to report a bug effectively.
+* Known: Trouble.            Known problems.
+* Help: Service.             Where to ask for help.
+
+
+File: gcc.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Bugs
+
+12.1 Have You Found a Bug?
+==========================
+
+If you are not sure whether you have found a bug, here are some
+guidelines:
+
+   * If the compiler gets a fatal signal, for any input whatever, that
+     is a compiler bug.  Reliable compilers never crash.
+
+   * If the compiler produces invalid assembly code, for any input
+     whatever (except an `asm' statement), that is a compiler bug,
+     unless the compiler reports errors (not just warnings) which would
+     ordinarily prevent the assembler from being run.
+
+   * If the compiler produces valid assembly code that does not
+     correctly execute the input source code, that is a compiler bug.
+
+     However, you must double-check to make sure, because you may have a
+     program whose behavior is undefined, which happened by chance to
+     give the desired results with another C or C++ compiler.
+
+     For example, in many nonoptimizing compilers, you can write `x;'
+     at the end of a function instead of `return x;', with the same
+     results.  But the value of the function is undefined if `return'
+     is omitted; it is not a bug when GCC produces different results.
+
+     Problems often result from expressions with two increment
+     operators, as in `f (*p++, *p++)'.  Your previous compiler might
+     have interpreted that expression the way you intended; GCC might
+     interpret it another way.  Neither compiler is wrong.  The bug is
+     in your code.
+
+     After you have localized the error to a single source line, it
+     should be easy to check for these things.  If your program is
+     correct and well defined, you have found a compiler bug.
+
+   * If the compiler produces an error message for valid input, that is
+     a compiler bug.
+
+   * If the compiler does not produce an error message for invalid
+     input, that is a compiler bug.  However, you should note that your
+     idea of "invalid input" might be someone else's idea of "an
+     extension" or "support for traditional practice".
+
+   * If you are an experienced user of one of the languages GCC
+     supports, your suggestions for improvement of GCC are welcome in
+     any case.
+
+
+File: gcc.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Bugs
+
+12.2 How and where to Report Bugs
+=================================
+
+Bugs should be reported to the bug database at
+`http://www.telink-semi.com/bugzilla.html'.
+
+
+File: gcc.info,  Node: Service,  Next: Contributing,  Prev: Bugs,  Up: Top
+
+13 How To Get Help with GCC
+***************************
+
+If you need help installing, using or changing GCC, there are two ways
+to find it:
+
+   * Send a message to a suitable network mailing list.  First try
+     <gcc-help@gcc.gnu.org> (for help installing or using GCC), and if
+     that brings no response, try <gcc@gcc.gnu.org>.  For help changing
+     GCC, ask <gcc@gcc.gnu.org>.  If you think you have found a bug in
+     GCC, please report it following the instructions at *note Bug
+     Reporting::.
+
+   * Look in the service directory for someone who might help you for a
+     fee.  The service directory is found at
+     `http://www.fsf.org/resources/service'.
+
+ For further information, see `http://gcc.gnu.org/faq.html#support'.
+
+
+File: gcc.info,  Node: Contributing,  Next: Funding,  Prev: Service,  Up: Top
+
+14 Contributing to GCC Development
+**********************************
+
+If you would like to help pretest GCC releases to assure they work well,
+current development sources are available by SVN (see
+`http://gcc.gnu.org/svn.html').  Source and binary snapshots are also
+available for FTP; see `http://gcc.gnu.org/snapshots.html'.
+
+ If you would like to work on improvements to GCC, please read the
+advice at these URLs:
+
+     `http://gcc.gnu.org/contribute.html'
+     `http://gcc.gnu.org/contributewhy.html'
+
+for information on how to make useful contributions and avoid
+duplication of effort.  Suggested projects are listed at
+`http://gcc.gnu.org/projects/'.
+
+
+File: gcc.info,  Node: Funding,  Next: GNU Project,  Prev: Contributing,  Up: Top
+
+Funding Free Software
+*********************
+
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+
+ Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers--the Free Software Foundation, and others.
+
+ The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+
+ To make this approach work, you must insist on numbers that you can
+compare, such as, "We will donate ten dollars to the Frobnitz project
+for each disk sold."  Don't be satisfied with a vague promise, such as
+"A portion of the profits are donated," since it doesn't give a basis
+for comparison.
+
+ Even a precise fraction "of the profits from this disk" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is $50, ten percent of the profit is probably less
+than a dollar; it might be a few cents, or nothing at all.
+
+ Some redistributors do development work themselves.  This is useful
+too; but to keep everyone honest, you need to inquire how much they do,
+and what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new CPU to the GNU Compiler Collection
+contribute more; major new features or packages contribute the most.
+
+ By establishing the idea that supporting further development is "the
+proper thing to do" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+
+     Copyright (C) 1994 Free Software Foundation, Inc.
+     Verbatim copying and redistribution of this section is permitted
+     without royalty; alteration is not permitted.
+
+
+File: gcc.info,  Node: GNU Project,  Next: Copying,  Prev: Funding,  Up: Top
+
+The GNU Project and GNU/Linux
+*****************************
+
+The GNU Project was launched in 1984 to develop a complete Unix-like
+operating system which is free software: the GNU system.  (GNU is a
+recursive acronym for "GNU's Not Unix"; it is pronounced "guh-NEW".)
+Variants of the GNU operating system, which use the kernel Linux, are
+now widely used; though these systems are often referred to as "Linux",
+they are more accurately called GNU/Linux systems.
+
+ For more information, see:
+     `http://www.gnu.org/'
+     `http://www.gnu.org/gnu/linux-and-gnu.html'
+
+
+File: gcc.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: GNU Project,  Up: Top
+
+GNU General Public License
+**************************
+
+                        Version 3, 29 June 2007
+
+     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies of this
+     license document, but changing it is not allowed.
+
+Preamble
+========
+
+The GNU General Public License is a free, copyleft license for software
+and other kinds of works.
+
+ The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the GNU General Public License is intended to guarantee your freedom to
+share and change all versions of a program-to make sure it remains free
+software for all its users.  We, the Free Software Foundation, use the
+GNU General Public License for most of our software; it applies also to
+any other work released this way by its authors.  You can apply it to
+your programs, too.
+
+ When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+
+ To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you
+have certain responsibilities if you distribute copies of the software,
+or if you modify it: responsibilities to respect the freedom of others.
+
+ For example, if you distribute copies of such a program, whether
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+
+ Developers that use the GNU GPL protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+
+ For the developers' and authors' protection, the GPL clearly explains
+that there is no warranty for this free software.  For both users' and
+authors' sake, the GPL requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
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+
+ Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
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+
+ Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
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+
+ The precise terms and conditions for copying, distribution and
+modification follow.
+
+TERMS AND CONDITIONS
+====================
+
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+
+     "This License" refers to version 3 of the GNU General Public
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+          it does not invalidate such permission if you have separately
+          received it.
+
+       d. If the work has interactive user interfaces, each must display
+          Appropriate Legal Notices; however, if the Program has
+          interactive interfaces that do not display Appropriate Legal
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+
+     A compilation of a covered work with other separate and independent
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+     program, in or on a volume of a storage or distribution medium, is
+     called an "aggregate" if the compilation and its resulting
+     copyright are not used to limit the access or legal rights of the
+     compilation's users beyond what the individual works permit.
+     Inclusion of a covered work in an aggregate does not cause this
+     License to apply to the other parts of the aggregate.
+
+  6. Conveying Non-Source Forms.
+
+     You may convey a covered work in object code form under the terms
+     of sections 4 and 5, provided that you also convey the
+     machine-readable Corresponding Source under the terms of this
+     License, in one of these ways:
+
+       a. Convey the object code in, or embodied in, a physical product
+          (including a physical distribution medium), accompanied by the
+          Corresponding Source fixed on a durable physical medium
+          customarily used for software interchange.
+
+       b. Convey the object code in, or embodied in, a physical product
+          (including a physical distribution medium), accompanied by a
+          written offer, valid for at least three years and valid for
+          as long as you offer spare parts or customer support for that
+          product model, to give anyone who possesses the object code
+          either (1) a copy of the Corresponding Source for all the
+          software in the product that is covered by this License, on a
+          durable physical medium customarily used for software
+          interchange, for a price no more than your reasonable cost of
+          physically performing this conveying of source, or (2) access
+          to copy the Corresponding Source from a network server at no
+          charge.
+
+       c. Convey individual copies of the object code with a copy of
+          the written offer to provide the Corresponding Source.  This
+          alternative is allowed only occasionally and noncommercially,
+          and only if you received the object code with such an offer,
+          in accord with subsection 6b.
+
+       d. Convey the object code by offering access from a designated
+          place (gratis or for a charge), and offer equivalent access
+          to the Corresponding Source in the same way through the same
+          place at no further charge.  You need not require recipients
+          to copy the Corresponding Source along with the object code.
+          If the place to copy the object code is a network server, the
+          Corresponding Source may be on a different server (operated
+          by you or a third party) that supports equivalent copying
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+          the object code saying where to find the Corresponding Source.
+          Regardless of what server hosts the Corresponding Source, you
+          remain obligated to ensure that it is available for as long
+          as needed to satisfy these requirements.
+
+       e. Convey the object code using peer-to-peer transmission,
+          provided you inform other peers where the object code and
+          Corresponding Source of the work are being offered to the
+          general public at no charge under subsection 6d.
+
+
+     A separable portion of the object code, whose source code is
+     excluded from the Corresponding Source as a System Library, need
+     not be included in conveying the object code work.
+
+     A "User Product" is either (1) a "consumer product", which means
+     any tangible personal property which is normally used for personal,
+     family, or household purposes, or (2) anything designed or sold for
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+     way in which the particular user actually uses, or expects or is
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+
+     "Installation Information" for a User Product means any methods,
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+     The information must suffice to ensure that the continued
+     functioning of the modified object code is in no case prevented or
+     interfered with solely because modification has been made.
+
+     If you convey an object code work under this section in, or with,
+     or specifically for use in, a User Product, and the conveying
+     occurs as part of a transaction in which the right of possession
+     and use of the User Product is transferred to the recipient in
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+     section must be accompanied by the Installation Information.  But
+     this requirement does not apply if neither you nor any third party
+     retains the ability to install modified object code on the User
+     Product (for example, the work has been installed in ROM).
+
+     The requirement to provide Installation Information does not
+     include a requirement to continue to provide support service,
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+     has been modified or installed.  Access to a network may be denied
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+
+     Corresponding Source conveyed, and Installation Information
+     provided, in accord with this section must be in a format that is
+     publicly documented (and with an implementation available to the
+     public in source code form), and must require no special password
+     or key for unpacking, reading or copying.
+
+  7. Additional Terms.
+
+     "Additional permissions" are terms that supplement the terms of
+     this License by making exceptions from one or more of its
+     conditions.  Additional permissions that are applicable to the
+     entire Program shall be treated as though they were included in
+     this License, to the extent that they are valid under applicable
+     law.  If additional permissions apply only to part of the Program,
+     that part may be used separately under those permissions, but the
+     entire Program remains governed by this License without regard to
+     the additional permissions.
+
+     When you convey a copy of a covered work, you may at your option
+     remove any additional permissions from that copy, or from any part
+     of it.  (Additional permissions may be written to require their own
+     removal in certain cases when you modify the work.)  You may place
+     additional permissions on material, added by you to a covered work,
+     for which you have or can give appropriate copyright permission.
+
+     Notwithstanding any other provision of this License, for material
+     you add to a covered work, you may (if authorized by the copyright
+     holders of that material) supplement the terms of this License
+     with terms:
+
+       a. Disclaiming warranty or limiting liability differently from
+          the terms of sections 15 and 16 of this License; or
+
+       b. Requiring preservation of specified reasonable legal notices
+          or author attributions in that material or in the Appropriate
+          Legal Notices displayed by works containing it; or
+
+       c. Prohibiting misrepresentation of the origin of that material,
+          or requiring that modified versions of such material be
+          marked in reasonable ways as different from the original
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+
+       d. Limiting the use for publicity purposes of names of licensors
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+
+       e. Declining to grant rights under trademark law for use of some
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+
+       f. Requiring indemnification of licensors and authors of that
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+     All other non-permissive additional terms are considered "further
+     restrictions" within the meaning of section 10.  If the Program as
+     you received it, or any part of it, contains a notice stating that
+     it is governed by this License along with a term that is a further
+     restriction, you may remove that term.  If a license document
+     contains a further restriction but permits relicensing or
+     conveying under this License, you may add to a covered work
+     material governed by the terms of that license document, provided
+     that the further restriction does not survive such relicensing or
+     conveying.
+
+     If you add terms to a covered work in accord with this section, you
+     must place, in the relevant source files, a statement of the
+     additional terms that apply to those files, or a notice indicating
+     where to find the applicable terms.
+
+     Additional terms, permissive or non-permissive, may be stated in
+     the form of a separately written license, or stated as exceptions;
+     the above requirements apply either way.
+
+  8. Termination.
+
+     You may not propagate or modify a covered work except as expressly
+     provided under this License.  Any attempt otherwise to propagate or
+     modify it is void, and will automatically terminate your rights
+     under this License (including any patent licenses granted under
+     the third paragraph of section 11).
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, you do not qualify to receive new
+     licenses for the same material under section 10.
+
+  9. Acceptance Not Required for Having Copies.
+
+     You are not required to accept this License in order to receive or
+     run a copy of the Program.  Ancillary propagation of a covered work
+     occurring solely as a consequence of using peer-to-peer
+     transmission to receive a copy likewise does not require
+     acceptance.  However, nothing other than this License grants you
+     permission to propagate or modify any covered work.  These actions
+     infringe copyright if you do not accept this License.  Therefore,
+     by modifying or propagating a covered work, you indicate your
+     acceptance of this License to do so.
+
+ 10. Automatic Licensing of Downstream Recipients.
+
+     Each time you convey a covered work, the recipient automatically
+     receives a license from the original licensors, to run, modify and
+     propagate that work, subject to this License.  You are not
+     responsible for enforcing compliance by third parties with this
+     License.
+
+     An "entity transaction" is a transaction transferring control of an
+     organization, or substantially all assets of one, or subdividing an
+     organization, or merging organizations.  If propagation of a
+     covered work results from an entity transaction, each party to that
+     transaction who receives a copy of the work also receives whatever
+     licenses to the work the party's predecessor in interest had or
+     could give under the previous paragraph, plus a right to
+     possession of the Corresponding Source of the work from the
+     predecessor in interest, if the predecessor has it or can get it
+     with reasonable efforts.
+
+     You may not impose any further restrictions on the exercise of the
+     rights granted or affirmed under this License.  For example, you
+     may not impose a license fee, royalty, or other charge for
+     exercise of rights granted under this License, and you may not
+     initiate litigation (including a cross-claim or counterclaim in a
+     lawsuit) alleging that any patent claim is infringed by making,
+     using, selling, offering for sale, or importing the Program or any
+     portion of it.
+
+ 11. Patents.
+
+     A "contributor" is a copyright holder who authorizes use under this
+     License of the Program or a work on which the Program is based.
+     The work thus licensed is called the contributor's "contributor
+     version".
+
+     A contributor's "essential patent claims" are all patent claims
+     owned or controlled by the contributor, whether already acquired or
+     hereafter acquired, that would be infringed by some manner,
+     permitted by this License, of making, using, or selling its
+     contributor version, but do not include claims that would be
+     infringed only as a consequence of further modification of the
+     contributor version.  For purposes of this definition, "control"
+     includes the right to grant patent sublicenses in a manner
+     consistent with the requirements of this License.
+
+     Each contributor grants you a non-exclusive, worldwide,
+     royalty-free patent license under the contributor's essential
+     patent claims, to make, use, sell, offer for sale, import and
+     otherwise run, modify and propagate the contents of its
+     contributor version.
+
+     In the following three paragraphs, a "patent license" is any
+     express agreement or commitment, however denominated, not to
+     enforce a patent (such as an express permission to practice a
+     patent or covenant not to sue for patent infringement).  To
+     "grant" such a patent license to a party means to make such an
+     agreement or commitment not to enforce a patent against the party.
+
+     If you convey a covered work, knowingly relying on a patent
+     license, and the Corresponding Source of the work is not available
+     for anyone to copy, free of charge and under the terms of this
+     License, through a publicly available network server or other
+     readily accessible means, then you must either (1) cause the
+     Corresponding Source to be so available, or (2) arrange to deprive
+     yourself of the benefit of the patent license for this particular
+     work, or (3) arrange, in a manner consistent with the requirements
+     of this License, to extend the patent license to downstream
+     recipients.  "Knowingly relying" means you have actual knowledge
+     that, but for the patent license, your conveying the covered work
+     in a country, or your recipient's use of the covered work in a
+     country, would infringe one or more identifiable patents in that
+     country that you have reason to believe are valid.
+
+     If, pursuant to or in connection with a single transaction or
+     arrangement, you convey, or propagate by procuring conveyance of, a
+     covered work, and grant a patent license to some of the parties
+     receiving the covered work authorizing them to use, propagate,
+     modify or convey a specific copy of the covered work, then the
+     patent license you grant is automatically extended to all
+     recipients of the covered work and works based on it.
+
+     A patent license is "discriminatory" if it does not include within
+     the scope of its coverage, prohibits the exercise of, or is
+     conditioned on the non-exercise of one or more of the rights that
+     are specifically granted under this License.  You may not convey a
+     covered work if you are a party to an arrangement with a third
+     party that is in the business of distributing software, under
+     which you make payment to the third party based on the extent of
+     your activity of conveying the work, and under which the third
+     party grants, to any of the parties who would receive the covered
+     work from you, a discriminatory patent license (a) in connection
+     with copies of the covered work conveyed by you (or copies made
+     from those copies), or (b) primarily for and in connection with
+     specific products or compilations that contain the covered work,
+     unless you entered into that arrangement, or that patent license
+     was granted, prior to 28 March 2007.
+
+     Nothing in this License shall be construed as excluding or limiting
+     any implied license or other defenses to infringement that may
+     otherwise be available to you under applicable patent law.
+
+ 12. No Surrender of Others' Freedom.
+
+     If conditions are imposed on you (whether by court order,
+     agreement or otherwise) that contradict the conditions of this
+     License, they do not excuse you from the conditions of this
+     License.  If you cannot convey a covered work so as to satisfy
+     simultaneously your obligations under this License and any other
+     pertinent obligations, then as a consequence you may not convey it
+     at all.  For example, if you agree to terms that obligate you to
+     collect a royalty for further conveying from those to whom you
+     convey the Program, the only way you could satisfy both those
+     terms and this License would be to refrain entirely from conveying
+     the Program.
+
+ 13. Use with the GNU Affero General Public License.
+
+     Notwithstanding any other provision of this License, you have
+     permission to link or combine any covered work with a work licensed
+     under version 3 of the GNU Affero General Public License into a
+     single combined work, and to convey the resulting work.  The terms
+     of this License will continue to apply to the part which is the
+     covered work, but the special requirements of the GNU Affero
+     General Public License, section 13, concerning interaction through
+     a network will apply to the combination as such.
+
+ 14. Revised Versions of this License.
+
+     The Free Software Foundation may publish revised and/or new
+     versions of the GNU General Public License from time to time.
+     Such new versions will be similar in spirit to the present
+     version, but may differ in detail to address new problems or
+     concerns.
+
+     Each version is given a distinguishing version number.  If the
+     Program specifies that a certain numbered version of the GNU
+     General Public License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that numbered version or of any later version published by the
+     Free Software Foundation.  If the Program does not specify a
+     version number of the GNU General Public License, you may choose
+     any version ever published by the Free Software Foundation.
+
+     If the Program specifies that a proxy can decide which future
+     versions of the GNU General Public License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Program.
+
+     Later license versions may give you additional or different
+     permissions.  However, no additional obligations are imposed on any
+     author or copyright holder as a result of your choosing to follow a
+     later version.
+
+ 15. Disclaimer of Warranty.
+
+     THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+     APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE
+     COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS"
+     WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED,
+     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE
+     RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.
+     SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
+     NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+ 16. Limitation of Liability.
+
+     IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+     WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES
+     AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU
+     FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+     CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
+     THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA
+     BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+     PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+     PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF
+     THE POSSIBILITY OF SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+     If the disclaimer of warranty and limitation of liability provided
+     above cannot be given local legal effect according to their terms,
+     reviewing courts shall apply local law that most closely
+     approximates an absolute waiver of all civil liability in
+     connection with the Program, unless a warranty or assumption of
+     liability accompanies a copy of the Program in return for a fee.
+
+
+END OF TERMS AND CONDITIONS
+===========================
+
+How to Apply These Terms to Your New Programs
+=============================================
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+ To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
+     Copyright (C) YEAR NAME OF AUTHOR
+
+     This program is free software: you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation, either version 3 of the License, or (at
+     your option) any later version.
+
+     This program is distributed in the hope that it will be useful, but
+     WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+     General Public License for more details.
+
+     You should have received a copy of the GNU General Public License
+     along with this program.  If not, see `http://www.gnu.org/licenses/'.
+
+ Also add information on how to contact you by electronic and paper
+mail.
+
+ If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
+     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+
+ The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an "about box".
+
+ You should also get your employer (if you work as a programmer) or
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  For more information on this, and how to apply and follow
+the GNU GPL, see `http://www.gnu.org/licenses/'.
+
+ The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use the
+GNU Lesser General Public License instead of this License.  But first,
+please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
+
+
+File: gcc.info,  Node: GNU Free Documentation License,  Next: Contributors,  Prev: Copying,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                      Version 1.2, November 2002
+
+     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
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+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
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+     A "Secondary Section" is a named appendix or a front-matter section
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+
+     The "Invariant Sections" are certain Secondary Sections whose
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+     the notice that says that the Document is released under this
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+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
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+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
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+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided for under this License.  Any other
+     attempt to copy, modify, sublicense or distribute the Document is
+     void, and will automatically terminate your rights under this
+     License.  However, parties who have received copies, or rights,
+     from you under this License will not have their licenses
+     terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.2
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+ If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+ If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+ If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: gcc.info,  Node: Contributors,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Contributors to GCC
+*******************
+
+The GCC project would like to thank its many contributors.  Without
+them the project would not have been nearly as successful as it has
+been.  Any omissions in this list are accidental.  Feel free to contact
+<law@redhat.com> or <gerald@pfeifer.com> if you have been left out or
+some of your contributions are not listed.  Please keep this list in
+alphabetical order.
+
+   * Analog Devices helped implement the support for complex data types
+     and iterators.
+
+   * John David Anglin for threading-related fixes and improvements to
+     libstdc++-v3, and the HP-UX port.
+
+   * James van Artsdalen wrote the code that makes efficient use of the
+     Intel 80387 register stack.
+
+   * Abramo and Roberto Bagnara for the SysV68 Motorola 3300 Delta
+     Series port.
+
+   * Alasdair Baird for various bug fixes.
+
+   * Giovanni Bajo for analyzing lots of complicated C++ problem
+     reports.
+
+   * Peter Barada for his work to improve code generation for new
+     ColdFire cores.
+
+   * Gerald Baumgartner added the signature extension to the C++ front
+     end.
+
+   * Godmar Back for his Java improvements and encouragement.
+
+   * Scott Bambrough for help porting the Java compiler.
+
+   * Wolfgang Bangerth for processing tons of bug reports.
+
+   * Jon Beniston for his Microsoft Windows port of Java and port to
+     Lattice Mico32.
+
+   * Daniel Berlin for better DWARF2 support, faster/better
+     optimizations, improved alias analysis, plus migrating GCC to
+     Bugzilla.
+
+   * Geoff Berry for his Java object serialization work and various
+     patches.
+
+   * Uros Bizjak for the implementation of x87 math built-in functions
+     and for various middle end and i386 back end improvements and bug
+     fixes.
+
+   * Eric Blake for helping to make GCJ and libgcj conform to the
+     specifications.
+
+   * Janne Blomqvist for contributions to GNU Fortran.
+
+   * Segher Boessenkool for various fixes.
+
+   * Hans-J. Boehm for his garbage collector, IA-64 libffi port, and
+     other Java work.
+
+   * Neil Booth for work on cpplib, lang hooks, debug hooks and other
+     miscellaneous clean-ups.
+
+   * Steven Bosscher for integrating the GNU Fortran front end into GCC
+     and for contributing to the tree-ssa branch.
+
+   * Eric Botcazou for fixing middle- and backend bugs left and right.
+
+   * Per Bothner for his direction via the steering committee and
+     various improvements to the infrastructure for supporting new
+     languages.  Chill front end implementation.  Initial
+     implementations of cpplib, fix-header, config.guess, libio, and
+     past C++ library (libg++) maintainer.  Dreaming up, designing and
+     implementing much of GCJ.
+
+   * Devon Bowen helped port GCC to the Tahoe.
+
+   * Don Bowman for mips-vxworks contributions.
+
+   * Dave Brolley for work on cpplib and Chill.
+
+   * Paul Brook for work on the ARM architecture and maintaining GNU
+     Fortran.
+
+   * Robert Brown implemented the support for Encore 32000 systems.
+
+   * Christian Bruel for improvements to local store elimination.
+
+   * Herman A.J. ten Brugge for various fixes.
+
+   * Joerg Brunsmann for Java compiler hacking and help with the GCJ
+     FAQ.
+
+   * Joe Buck for his direction via the steering committee.
+
+   * Craig Burley for leadership of the G77 Fortran effort.
+
+   * Stephan Buys for contributing Doxygen notes for libstdc++.
+
+   * Paolo Carlini for libstdc++ work: lots of efficiency improvements
+     to the C++ strings, streambufs and formatted I/O, hard detective
+     work on the frustrating localization issues, and keeping up with
+     the problem reports.
+
+   * John Carr for his alias work, SPARC hacking, infrastructure
+     improvements, previous contributions to the steering committee,
+     loop optimizations, etc.
+
+   * Stephane Carrez for 68HC11 and 68HC12 ports.
+
+   * Steve Chamberlain for support for the Renesas SH and H8 processors
+     and the PicoJava processor, and for GCJ config fixes.
+
+   * Glenn Chambers for help with the GCJ FAQ.
+
+   * John-Marc Chandonia for various libgcj patches.
+
+   * Denis Chertykov for contributing and maintaining the AVR port, the
+     first GCC port for an 8-bit architecture.
+
+   * Scott Christley for his Objective-C contributions.
+
+   * Eric Christopher for his Java porting help and clean-ups.
+
+   * Branko Cibej for more warning contributions.
+
+   * The GNU Classpath project for all of their merged runtime code.
+
+   * Nick Clifton for arm, mcore, fr30, v850, m32r, rx work, `--help',
+     and other random hacking.
+
+   * Michael Cook for libstdc++ cleanup patches to reduce warnings.
+
+   * R. Kelley Cook for making GCC buildable from a read-only directory
+     as well as other miscellaneous build process and documentation
+     clean-ups.
+
+   * Ralf Corsepius for SH testing and minor bug fixing.
+
+   * Stan Cox for care and feeding of the x86 port and lots of behind
+     the scenes hacking.
+
+   * Alex Crain provided changes for the 3b1.
+
+   * Ian Dall for major improvements to the NS32k port.
+
+   * Paul Dale for his work to add uClinux platform support to the m68k
+     backend.
+
+   * Dario Dariol contributed the four varieties of sample programs
+     that print a copy of their source.
+
+   * Russell Davidson for fstream and stringstream fixes in libstdc++.
+
+   * Bud Davis for work on the G77 and GNU Fortran compilers.
+
+   * Mo DeJong for GCJ and libgcj bug fixes.
+
+   * DJ Delorie for the DJGPP port, build and libiberty maintenance,
+     various bug fixes, and the M32C and MeP ports.
+
+   * Arnaud Desitter for helping to debug GNU Fortran.
+
+   * Gabriel Dos Reis for contributions to G++, contributions and
+     maintenance of GCC diagnostics infrastructure, libstdc++-v3,
+     including `valarray<>', `complex<>', maintaining the numerics
+     library (including that pesky `<limits>' :-) and keeping
+     up-to-date anything to do with numbers.
+
+   * Ulrich Drepper for his work on glibc, testing of GCC using glibc,
+     ISO C99 support, CFG dumping support, etc., plus support of the
+     C++ runtime libraries including for all kinds of C interface
+     issues, contributing and maintaining `complex<>', sanity checking
+     and disbursement, configuration architecture, libio maintenance,
+     and early math work.
+
+   * Zdenek Dvorak for a new loop unroller and various fixes.
+
+   * Richard Earnshaw for his ongoing work with the ARM.
+
+   * David Edelsohn for his direction via the steering committee,
+     ongoing work with the RS6000/PowerPC port, help cleaning up Haifa
+     loop changes, doing the entire AIX port of libstdc++ with his bare
+     hands, and for ensuring GCC properly keeps working on AIX.
+
+   * Kevin Ediger for the floating point formatting of num_put::do_put
+     in libstdc++.
+
+   * Phil Edwards for libstdc++ work including configuration hackery,
+     documentation maintainer, chief breaker of the web pages, the
+     occasional iostream bug fix, and work on shared library symbol
+     versioning.
+
+   * Paul Eggert for random hacking all over GCC.
+
+   * Mark Elbrecht for various DJGPP improvements, and for libstdc++
+     configuration support for locales and fstream-related fixes.
+
+   * Vadim Egorov for libstdc++ fixes in strings, streambufs, and
+     iostreams.
+
+   * Christian Ehrhardt for dealing with bug reports.
+
+   * Ben Elliston for his work to move the Objective-C runtime into its
+     own subdirectory and for his work on autoconf.
+
+   * Revital Eres for work on the PowerPC 750CL port.
+
+   * Marc Espie for OpenBSD support.
+
+   * Doug Evans for much of the global optimization framework, arc,
+     m32r, and SPARC work.
+
+   * Christopher Faylor for his work on the Cygwin port and for caring
+     and feeding the gcc.gnu.org box and saving its users tons of spam.
+
+   * Fred Fish for BeOS support and Ada fixes.
+
+   * Ivan Fontes Garcia for the Portuguese translation of the GCJ FAQ.
+
+   * Peter Gerwinski for various bug fixes and the Pascal front end.
+
+   * Kaveh R. Ghazi for his direction via the steering committee,
+     amazing work to make `-W -Wall -W* -Werror' useful, and
+     continuously testing GCC on a plethora of platforms.  Kaveh
+     extends his gratitude to the CAIP Center at Rutgers University for
+     providing him with computing resources to work on Free Software
+     since the late 1980s.
+
+   * John Gilmore for a donation to the FSF earmarked improving GNU
+     Java.
+
+   * Judy Goldberg for c++ contributions.
+
+   * Torbjorn Granlund for various fixes and the c-torture testsuite,
+     multiply- and divide-by-constant optimization, improved long long
+     support, improved leaf function register allocation, and his
+     direction via the steering committee.
+
+   * Anthony Green for his `-Os' contributions, the moxie port, and
+     Java front end work.
+
+   * Stu Grossman for gdb hacking, allowing GCJ developers to debug
+     Java code.
+
+   * Michael K. Gschwind contributed the port to the PDP-11.
+
+   * Richard Guenther for his ongoing middle-end contributions and bug
+     fixes and for release management.
+
+   * Ron Guilmette implemented the `protoize' and `unprotoize' tools,
+     the support for Dwarf symbolic debugging information, and much of
+     the support for System V Release 4.  He has also worked heavily on
+     the Intel 386 and 860 support.
+
+   * Mostafa Hagog for Swing Modulo Scheduling (SMS) and post reload
+     GCSE.
+
+   * Bruno Haible for improvements in the runtime overhead for EH, new
+     warnings and assorted bug fixes.
+
+   * Andrew Haley for his amazing Java compiler and library efforts.
+
+   * Chris Hanson assisted in making GCC work on HP-UX for the 9000
+     series 300.
+
+   * Michael Hayes for various thankless work he's done trying to get
+     the c30/c40 ports functional.  Lots of loop and unroll
+     improvements and fixes.
+
+   * Dara Hazeghi for wading through myriads of target-specific bug
+     reports.
+
+   * Kate Hedstrom for staking the G77 folks with an initial testsuite.
+
+   * Richard Henderson for his ongoing SPARC, alpha, ia32, and ia64
+     work, loop opts, and generally fixing lots of old problems we've
+     ignored for years, flow rewrite and lots of further stuff,
+     including reviewing tons of patches.
+
+   * Aldy Hernandez for working on the PowerPC port, SIMD support, and
+     various fixes.
+
+   * Nobuyuki Hikichi of Software Research Associates, Tokyo,
+     contributed the support for the Sony NEWS machine.
+
+   * Kazu Hirata for caring and feeding the Renesas H8/300 port and
+     various fixes.
+
+   * Katherine Holcomb for work on GNU Fortran.
+
+   * Manfred Hollstein for his ongoing work to keep the m88k alive, lots
+     of testing and bug fixing, particularly of GCC configury code.
+
+   * Steve Holmgren for MachTen patches.
+
+   * Jan Hubicka for his x86 port improvements.
+
+   * Falk Hueffner for working on C and optimization bug reports.
+
+   * Bernardo Innocenti for his m68k work, including merging of
+     ColdFire improvements and uClinux support.
+
+   * Christian Iseli for various bug fixes.
+
+   * Kamil Iskra for general m68k hacking.
+
+   * Lee Iverson for random fixes and MIPS testing.
+
+   * Andreas Jaeger for testing and benchmarking of GCC and various bug
+     fixes.
+
+   * Jakub Jelinek for his SPARC work and sibling call optimizations as
+     well as lots of bug fixes and test cases, and for improving the
+     Java build system.
+
+   * Janis Johnson for ia64 testing and fixes, her quality improvement
+     sidetracks, and web page maintenance.
+
+   * Kean Johnston for SCO OpenServer support and various fixes.
+
+   * Tim Josling for the sample language treelang based originally on
+     Richard Kenner's "toy" language.
+
+   * Nicolai Josuttis for additional libstdc++ documentation.
+
+   * Klaus Kaempf for his ongoing work to make alpha-vms a viable
+     target.
+
+   * Steven G. Kargl for work on GNU Fortran.
+
+   * David Kashtan of SRI adapted GCC to VMS.
+
+   * Ryszard Kabatek for many, many libstdc++ bug fixes and
+     optimizations of strings, especially member functions, and for
+     auto_ptr fixes.
+
+   * Geoffrey Keating for his ongoing work to make the PPC work for
+     GNU/Linux and his automatic regression tester.
+
+   * Brendan Kehoe for his ongoing work with G++ and for a lot of early
+     work in just about every part of libstdc++.
+
+   * Oliver M. Kellogg of Deutsche Aerospace contributed the port to the
+     MIL-STD-1750A.
+
+   * Richard Kenner of the New York University Ultracomputer Research
+     Laboratory wrote the machine descriptions for the AMD 29000, the
+     DEC Alpha, the IBM RT PC, and the IBM RS/6000 as well as the
+     support for instruction attributes.  He also made changes to
+     better support RISC processors including changes to common
+     subexpression elimination, strength reduction, function calling
+     sequence handling, and condition code support, in addition to
+     generalizing the code for frame pointer elimination and delay slot
+     scheduling.  Richard Kenner was also the head maintainer of GCC
+     for several years.
+
+   * Mumit Khan for various contributions to the Cygwin and Mingw32
+     ports and maintaining binary releases for Microsoft Windows hosts,
+     and for massive libstdc++ porting work to Cygwin/Mingw32.
+
+   * Robin Kirkham for cpu32 support.
+
+   * Mark Klein for PA improvements.
+
+   * Thomas Koenig for various bug fixes.
+
+   * Bruce Korb for the new and improved fixincludes code.
+
+   * Benjamin Kosnik for his G++ work and for leading the libstdc++-v3
+     effort.
+
+   * Charles LaBrec contributed the support for the Integrated Solutions
+     68020 system.
+
+   * Asher Langton and Mike Kumbera for contributing Cray pointer
+     support to GNU Fortran, and for other GNU Fortran improvements.
+
+   * Jeff Law for his direction via the steering committee,
+     coordinating the entire egcs project and GCC 2.95, rolling out
+     snapshots and releases, handling merges from GCC2, reviewing tons
+     of patches that might have fallen through the cracks else, and
+     random but extensive hacking.
+
+   * Marc Lehmann for his direction via the steering committee and
+     helping with analysis and improvements of x86 performance.
+
+   * Victor Leikehman for work on GNU Fortran.
+
+   * Ted Lemon wrote parts of the RTL reader and printer.
+
+   * Kriang Lerdsuwanakij for C++ improvements including template as
+     template parameter support, and many C++ fixes.
+
+   * Warren Levy for tremendous work on libgcj (Java Runtime Library)
+     and random work on the Java front end.
+
+   * Alain Lichnewsky ported GCC to the MIPS CPU.
+
+   * Oskar Liljeblad for hacking on AWT and his many Java bug reports
+     and patches.
+
+   * Robert Lipe for OpenServer support, new testsuites, testing, etc.
+
+   * Chen Liqin for various S+core related fixes/improvement, and for
+     maintaining the S+core port.
+
+   * Weiwen Liu for testing and various bug fixes.
+
+   * Manuel Lo'pez-Iba'n~ez for improving `-Wconversion' and many other
+     diagnostics fixes and improvements.
+
+   * Dave Love for his ongoing work with the Fortran front end and
+     runtime libraries.
+
+   * Martin von Lo"wis for internal consistency checking infrastructure,
+     various C++ improvements including namespace support, and tons of
+     assistance with libstdc++/compiler merges.
+
+   * H.J. Lu for his previous contributions to the steering committee,
+     many x86 bug reports, prototype patches, and keeping the GNU/Linux
+     ports working.
+
+   * Greg McGary for random fixes and (someday) bounded pointers.
+
+   * Andrew MacLeod for his ongoing work in building a real EH system,
+     various code generation improvements, work on the global
+     optimizer, etc.
+
+   * Vladimir Makarov for hacking some ugly i960 problems, PowerPC
+     hacking improvements to compile-time performance, overall
+     knowledge and direction in the area of instruction scheduling, and
+     design and implementation of the automaton based instruction
+     scheduler.
+
+   * Bob Manson for his behind the scenes work on dejagnu.
+
+   * Philip Martin for lots of libstdc++ string and vector iterator
+     fixes and improvements, and string clean up and testsuites.
+
+   * All of the Mauve project contributors, for Java test code.
+
+   * Bryce McKinlay for numerous GCJ and libgcj fixes and improvements.
+
+   * Adam Megacz for his work on the Microsoft Windows port of GCJ.
+
+   * Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS,
+     powerpc, haifa, ECOFF debug support, and other assorted hacking.
+
+   * Jason Merrill for his direction via the steering committee and
+     leading the G++ effort.
+
+   * Martin Michlmayr for testing GCC on several architectures using the
+     entire Debian archive.
+
+   * David Miller for his direction via the steering committee, lots of
+     SPARC work, improvements in jump.c and interfacing with the Linux
+     kernel developers.
+
+   * Gary Miller ported GCC to Charles River Data Systems machines.
+
+   * Alfred Minarik for libstdc++ string and ios bug fixes, and turning
+     the entire libstdc++ testsuite namespace-compatible.
+
+   * Mark Mitchell for his direction via the steering committee,
+     mountains of C++ work, load/store hoisting out of loops, alias
+     analysis improvements, ISO C `restrict' support, and serving as
+     release manager for GCC 3.x.
+
+   * Alan Modra for various GNU/Linux bits and testing.
+
+   * Toon Moene for his direction via the steering committee, Fortran
+     maintenance, and his ongoing work to make us make Fortran run fast.
+
+   * Jason Molenda for major help in the care and feeding of all the
+     services on the gcc.gnu.org (formerly egcs.cygnus.com)
+     machine--mail, web services, ftp services, etc etc.  Doing all
+     this work on scrap paper and the backs of envelopes would have
+     been... difficult.
+
+   * Catherine Moore for fixing various ugly problems we have sent her
+     way, including the haifa bug which was killing the Alpha & PowerPC
+     Linux kernels.
+
+   * Mike Moreton for his various Java patches.
+
+   * David Mosberger-Tang for various Alpha improvements, and for the
+     initial IA-64 port.
+
+   * Stephen Moshier contributed the floating point emulator that
+     assists in cross-compilation and permits support for floating
+     point numbers wider than 64 bits and for ISO C99 support.
+
+   * Bill Moyer for his behind the scenes work on various issues.
+
+   * Philippe De Muyter for his work on the m68k port.
+
+   * Joseph S. Myers for his work on the PDP-11 port, format checking
+     and ISO C99 support, and continuous emphasis on (and contributions
+     to) documentation.
+
+   * Nathan Myers for his work on libstdc++-v3: architecture and
+     authorship through the first three snapshots, including
+     implementation of locale infrastructure, string, shadow C headers,
+     and the initial project documentation (DESIGN, CHECKLIST, and so
+     forth).  Later, more work on MT-safe string and shadow headers.
+
+   * Felix Natter for documentation on porting libstdc++.
+
+   * Nathanael Nerode for cleaning up the configuration/build process.
+
+   * NeXT, Inc. donated the front end that supports the Objective-C
+     language.
+
+   * Hans-Peter Nilsson for the CRIS and MMIX ports, improvements to
+     the search engine setup, various documentation fixes and other
+     small fixes.
+
+   * Geoff Noer for his work on getting cygwin native builds working.
+
+   * Diego Novillo for his work on Tree SSA, OpenMP, SPEC performance
+     tracking web pages, GIMPLE tuples, and assorted fixes.
+
+   * David O'Brien for the FreeBSD/alpha, FreeBSD/AMD x86-64,
+     FreeBSD/ARM, FreeBSD/PowerPC, and FreeBSD/SPARC64 ports and
+     related infrastructure improvements.
+
+   * Alexandre Oliva for various build infrastructure improvements,
+     scripts and amazing testing work, including keeping libtool issues
+     sane and happy.
+
+   * Stefan Olsson for work on mt_alloc.
+
+   * Melissa O'Neill for various NeXT fixes.
+
+   * Rainer Orth for random MIPS work, including improvements to GCC's
+     o32 ABI support, improvements to dejagnu's MIPS support, Java
+     configuration clean-ups and porting work, and maintaining the
+     IRIX, Solaris 2, and Tru64 UNIX ports.
+
+   * Hartmut Penner for work on the s390 port.
+
+   * Paul Petersen wrote the machine description for the Alliant FX/8.
+
+   * Alexandre Petit-Bianco for implementing much of the Java compiler
+     and continued Java maintainership.
+
+   * Matthias Pfaller for major improvements to the NS32k port.
+
+   * Gerald Pfeifer for his direction via the steering committee,
+     pointing out lots of problems we need to solve, maintenance of the
+     web pages, and taking care of documentation maintenance in general.
+
+   * Andrew Pinski for processing bug reports by the dozen.
+
+   * Ovidiu Predescu for his work on the Objective-C front end and
+     runtime libraries.
+
+   * Jerry Quinn for major performance improvements in C++ formatted
+     I/O.
+
+   * Ken Raeburn for various improvements to checker, MIPS ports and
+     various cleanups in the compiler.
+
+   * Rolf W. Rasmussen for hacking on AWT.
+
+   * David Reese of Sun Microsystems contributed to the Solaris on
+     PowerPC port.
+
+   * Volker Reichelt for keeping up with the problem reports.
+
+   * Joern Rennecke for maintaining the sh port, loop, regmove & reload
+     hacking.
+
+   * Loren J. Rittle for improvements to libstdc++-v3 including the
+     FreeBSD port, threading fixes, thread-related configury changes,
+     critical threading documentation, and solutions to really tricky
+     I/O problems, as well as keeping GCC properly working on FreeBSD
+     and continuous testing.
+
+   * Craig Rodrigues for processing tons of bug reports.
+
+   * Ola Ro"nnerup for work on mt_alloc.
+
+   * Gavin Romig-Koch for lots of behind the scenes MIPS work.
+
+   * David Ronis inspired and encouraged Craig to rewrite the G77
+     documentation in texinfo format by contributing a first pass at a
+     translation of the old `g77-0.5.16/f/DOC' file.
+
+   * Ken Rose for fixes to GCC's delay slot filling code.
+
+   * Paul Rubin wrote most of the preprocessor.
+
+   * Pe'tur Runo'lfsson for major performance improvements in C++
+     formatted I/O and large file support in C++ filebuf.
+
+   * Chip Salzenberg for libstdc++ patches and improvements to locales,
+     traits, Makefiles, libio, libtool hackery, and "long long" support.
+
+   * Juha Sarlin for improvements to the H8 code generator.
+
+   * Greg Satz assisted in making GCC work on HP-UX for the 9000 series
+     300.
+
+   * Roger Sayle for improvements to constant folding and GCC's RTL
+     optimizers as well as for fixing numerous bugs.
+
+   * Bradley Schatz for his work on the GCJ FAQ.
+
+   * Peter Schauer wrote the code to allow debugging to work on the
+     Alpha.
+
+   * William Schelter did most of the work on the Intel 80386 support.
+
+   * Tobias Schlu"ter for work on GNU Fortran.
+
+   * Bernd Schmidt for various code generation improvements and major
+     work in the reload pass as well a serving as release manager for
+     GCC 2.95.3.
+
+   * Peter Schmid for constant testing of libstdc++--especially
+     application testing, going above and beyond what was requested for
+     the release criteria--and libstdc++ header file tweaks.
+
+   * Jason Schroeder for jcf-dump patches.
+
+   * Andreas Schwab for his work on the m68k port.
+
+   * Lars Segerlund for work on GNU Fortran.
+
+   * Joel Sherrill for his direction via the steering committee, RTEMS
+     contributions and RTEMS testing.
+
+   * Nathan Sidwell for many C++ fixes/improvements.
+
+   * Jeffrey Siegal for helping RMS with the original design of GCC,
+     some code which handles the parse tree and RTL data structures,
+     constant folding and help with the original VAX & m68k ports.
+
+   * Kenny Simpson for prompting libstdc++ fixes due to defect reports
+     from the LWG (thereby keeping GCC in line with updates from the
+     ISO).
+
+   * Franz Sirl for his ongoing work with making the PPC port stable
+     for GNU/Linux.
+
+   * Andrey Slepuhin for assorted AIX hacking.
+
+   * Trevor Smigiel for contributing the SPU port.
+
+   * Christopher Smith did the port for Convex machines.
+
+   * Danny Smith for his major efforts on the Mingw (and Cygwin) ports.
+
+   * Randy Smith finished the Sun FPA support.
+
+   * Scott Snyder for queue, iterator, istream, and string fixes and
+     libstdc++ testsuite entries.  Also for providing the patch to G77
+     to add rudimentary support for `INTEGER*1', `INTEGER*2', and
+     `LOGICAL*1'.
+
+   * Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique.
+
+   * Richard Stallman, for writing the original GCC and launching the
+     GNU project.
+
+   * Jan Stein of the Chalmers Computer Society provided support for
+     Genix, as well as part of the 32000 machine description.
+
+   * Nigel Stephens for various mips16 related fixes/improvements.
+
+   * Jonathan Stone wrote the machine description for the Pyramid
+     computer.
+
+   * Graham Stott for various infrastructure improvements.
+
+   * John Stracke for his Java HTTP protocol fixes.
+
+   * Mike Stump for his Elxsi port, G++ contributions over the years
+     and more recently his vxworks contributions
+
+   * Jeff Sturm for Java porting help, bug fixes, and encouragement.
+
+   * Shigeya Suzuki for this fixes for the bsdi platforms.
+
+   * Ian Lance Taylor for his mips16 work, general configury hacking,
+     fixincludes, etc.
+
+   * Holger Teutsch provided the support for the Clipper CPU.
+
+   * Gary Thomas for his ongoing work to make the PPC work for
+     GNU/Linux.
+
+   * Philipp Thomas for random bug fixes throughout the compiler
+
+   * Jason Thorpe for thread support in libstdc++ on NetBSD.
+
+   * Kresten Krab Thorup wrote the run time support for the Objective-C
+     language and the fantastic Java bytecode interpreter.
+
+   * Michael Tiemann for random bug fixes, the first instruction
+     scheduler, initial C++ support, function integration, NS32k, SPARC
+     and M88k machine description work, delay slot scheduling.
+
+   * Andreas Tobler for his work porting libgcj to Darwin.
+
+   * Teemu Torma for thread safe exception handling support.
+
+   * Leonard Tower wrote parts of the parser, RTL generator, and RTL
+     definitions, and of the VAX machine description.
+
+   * Daniel Towner and Hariharan Sandanagobalane contributed and
+     maintain the picoChip port.
+
+   * Jeremy Bennett of Embecosm and Jonas Bonn of South Pole
+     contributed the OpenRISC 1000 port, which in turn was based on
+     earlier work by Rich D'Addio, Damjan Lampret, Matjaz Breskvar and
+     others.
+
+   * Tom Tromey for internationalization support and for his many Java
+     contributions and libgcj maintainership.
+
+   * Lassi Tuura for improvements to config.guess to determine HP
+     processor types.
+
+   * Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes.
+
+   * Andy Vaught for the design and initial implementation of the GNU
+     Fortran front end.
+
+   * Brent Verner for work with the libstdc++ cshadow files and their
+     associated configure steps.
+
+   * Todd Vierling for contributions for NetBSD ports.
+
+   * Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML
+     guidance.
+
+   * Dean Wakerley for converting the install documentation from HTML
+     to texinfo in time for GCC 3.0.
+
+   * Krister Walfridsson for random bug fixes.
+
+   * Feng Wang for contributions to GNU Fortran.
+
+   * Stephen M. Webb for time and effort on making libstdc++ shadow
+     files work with the tricky Solaris 8+ headers, and for pushing the
+     build-time header tree.
+
+   * John Wehle for various improvements for the x86 code generator,
+     related infrastructure improvements to help x86 code generation,
+     value range propagation and other work, WE32k port.
+
+   * Ulrich Weigand for work on the s390 port.
+
+   * Zack Weinberg for major work on cpplib and various other bug fixes.
+
+   * Matt Welsh for help with Linux Threads support in GCJ.
+
+   * Urban Widmark for help fixing java.io.
+
+   * Mark Wielaard for new Java library code and his work integrating
+     with Classpath.
+
+   * Dale Wiles helped port GCC to the Tahoe.
+
+   * Bob Wilson from Tensilica, Inc. for the Xtensa port.
+
+   * Jim Wilson for his direction via the steering committee, tackling
+     hard problems in various places that nobody else wanted to work
+     on, strength reduction and other loop optimizations.
+
+   * Paul Woegerer and Tal Agmon for the CRX port.
+
+   * Carlo Wood for various fixes.
+
+   * Tom Wood for work on the m88k port.
+
+   * Canqun Yang for work on GNU Fortran.
+
+   * Masanobu Yuhara of Fujitsu Laboratories implemented the machine
+     description for the Tron architecture (specifically, the Gmicro).
+
+   * Kevin Zachmann helped port GCC to the Tahoe.
+
+   * Ayal Zaks for Swing Modulo Scheduling (SMS).
+
+   * Xiaoqiang Zhang for work on GNU Fortran.
+
+   * Gilles Zunino for help porting Java to Irix.
+
+
+ The following people are recognized for their contributions to GNAT,
+the Ada front end of GCC:
+   * Bernard Banner
+
+   * Romain Berrendonner
+
+   * Geert Bosch
+
+   * Emmanuel Briot
+
+   * Joel Brobecker
+
+   * Ben Brosgol
+
+   * Vincent Celier
+
+   * Arnaud Charlet
+
+   * Chien Chieng
+
+   * Cyrille Comar
+
+   * Cyrille Crozes
+
+   * Robert Dewar
+
+   * Gary Dismukes
+
+   * Robert Duff
+
+   * Ed Falis
+
+   * Ramon Fernandez
+
+   * Sam Figueroa
+
+   * Vasiliy Fofanov
+
+   * Michael Friess
+
+   * Franco Gasperoni
+
+   * Ted Giering
+
+   * Matthew Gingell
+
+   * Laurent Guerby
+
+   * Jerome Guitton
+
+   * Olivier Hainque
+
+   * Jerome Hugues
+
+   * Hristian Kirtchev
+
+   * Jerome Lambourg
+
+   * Bruno Leclerc
+
+   * Albert Lee
+
+   * Sean McNeil
+
+   * Javier Miranda
+
+   * Laurent Nana
+
+   * Pascal Obry
+
+   * Dong-Ik Oh
+
+   * Laurent Pautet
+
+   * Brett Porter
+
+   * Thomas Quinot
+
+   * Nicolas Roche
+
+   * Pat Rogers
+
+   * Jose Ruiz
+
+   * Douglas Rupp
+
+   * Sergey Rybin
+
+   * Gail Schenker
+
+   * Ed Schonberg
+
+   * Nicolas Setton
+
+   * Samuel Tardieu
+
+
+ The following people are recognized for their contributions of new
+features, bug reports, testing and integration of classpath/libgcj for
+GCC version 4.1:
+   * Lillian Angel for `JTree' implementation and lots Free Swing
+     additions and bug fixes.
+
+   * Wolfgang Baer for `GapContent' bug fixes.
+
+   * Anthony Balkissoon for `JList', Free Swing 1.5 updates and mouse
+     event fixes, lots of Free Swing work including `JTable' editing.
+
+   * Stuart Ballard for RMI constant fixes.
+
+   * Goffredo Baroncelli for `HTTPURLConnection' fixes.
+
+   * Gary Benson for `MessageFormat' fixes.
+
+   * Daniel Bonniot for `Serialization' fixes.
+
+   * Chris Burdess for lots of gnu.xml and http protocol fixes, `StAX'
+     and `DOM xml:id' support.
+
+   * Ka-Hing Cheung for `TreePath' and `TreeSelection' fixes.
+
+   * Archie Cobbs for build fixes, VM interface updates,
+     `URLClassLoader' updates.
+
+   * Kelley Cook for build fixes.
+
+   * Martin Cordova for Suggestions for better `SocketTimeoutException'.
+
+   * David Daney for `BitSet' bug fixes, `HttpURLConnection' rewrite
+     and improvements.
+
+   * Thomas Fitzsimmons for lots of upgrades to the gtk+ AWT and Cairo
+     2D support. Lots of imageio framework additions, lots of AWT and
+     Free Swing bug fixes.
+
+   * Jeroen Frijters for `ClassLoader' and nio cleanups, serialization
+     fixes, better `Proxy' support, bug fixes and IKVM integration.
+
+   * Santiago Gala for `AccessControlContext' fixes.
+
+   * Nicolas Geoffray for `VMClassLoader' and `AccessController'
+     improvements.
+
+   * David Gilbert for `basic' and `metal' icon and plaf support and
+     lots of documenting, Lots of Free Swing and metal theme additions.
+     `MetalIconFactory' implementation.
+
+   * Anthony Green for `MIDI' framework, `ALSA' and `DSSI' providers.
+
+   * Andrew Haley for `Serialization' and `URLClassLoader' fixes, gcj
+     build speedups.
+
+   * Kim Ho for `JFileChooser' implementation.
+
+   * Andrew John Hughes for `Locale' and net fixes, URI RFC2986
+     updates, `Serialization' fixes, `Properties' XML support and
+     generic branch work, VMIntegration guide update.
+
+   * Bastiaan Huisman for `TimeZone' bug fixing.
+
+   * Andreas Jaeger for mprec updates.
+
+   * Paul Jenner for better `-Werror' support.
+
+   * Ito Kazumitsu for `NetworkInterface' implementation and updates.
+
+   * Roman Kennke for `BoxLayout', `GrayFilter' and `SplitPane', plus
+     bug fixes all over. Lots of Free Swing work including styled text.
+
+   * Simon Kitching for `String' cleanups and optimization suggestions.
+
+   * Michael Koch for configuration fixes, `Locale' updates, bug and
+     build fixes.
+
+   * Guilhem Lavaux for configuration, thread and channel fixes and
+     Kaffe integration. JCL native `Pointer' updates. Logger bug fixes.
+
+   * David Lichteblau for JCL support library global/local reference
+     cleanups.
+
+   * Aaron Luchko for JDWP updates and documentation fixes.
+
+   * Ziga Mahkovec for `Graphics2D' upgraded to Cairo 0.5 and new regex
+     features.
+
+   * Sven de Marothy for BMP imageio support, CSS and `TextLayout'
+     fixes. `GtkImage' rewrite, 2D, awt, free swing and date/time fixes
+     and implementing the Qt4 peers.
+
+   * Casey Marshall for crypto algorithm fixes, `FileChannel' lock,
+     `SystemLogger' and `FileHandler' rotate implementations, NIO
+     `FileChannel.map' support, security and policy updates.
+
+   * Bryce McKinlay for RMI work.
+
+   * Audrius Meskauskas for lots of Free Corba, RMI and HTML work plus
+     testing and documenting.
+
+   * Kalle Olavi Niemitalo for build fixes.
+
+   * Rainer Orth for build fixes.
+
+   * Andrew Overholt for `File' locking fixes.
+
+   * Ingo Proetel for `Image', `Logger' and `URLClassLoader' updates.
+
+   * Olga Rodimina for `MenuSelectionManager' implementation.
+
+   * Jan Roehrich for `BasicTreeUI' and `JTree' fixes.
+
+   * Julian Scheid for documentation updates and gjdoc support.
+
+   * Christian Schlichtherle for zip fixes and cleanups.
+
+   * Robert Schuster for documentation updates and beans fixes,
+     `TreeNode' enumerations and `ActionCommand' and various fixes, XML
+     and URL, AWT and Free Swing bug fixes.
+
+   * Keith Seitz for lots of JDWP work.
+
+   * Christian Thalinger for 64-bit cleanups, Configuration and VM
+     interface fixes and `CACAO' integration, `fdlibm' updates.
+
+   * Gael Thomas for `VMClassLoader' boot packages support suggestions.
+
+   * Andreas Tobler for Darwin and Solaris testing and fixing, `Qt4'
+     support for Darwin/OS X, `Graphics2D' support, `gtk+' updates.
+
+   * Dalibor Topic for better `DEBUG' support, build cleanups and Kaffe
+     integration. `Qt4' build infrastructure, `SHA1PRNG' and
+     `GdkPixbugDecoder' updates.
+
+   * Tom Tromey for Eclipse integration, generics work, lots of bug
+     fixes and gcj integration including coordinating The Big Merge.
+
+   * Mark Wielaard for bug fixes, packaging and release management,
+     `Clipboard' implementation, system call interrupts and network
+     timeouts and `GdkPixpufDecoder' fixes.
+
+
+ In addition to the above, all of which also contributed time and
+energy in testing GCC, we would like to thank the following for their
+contributions to testing:
+
+   * Michael Abd-El-Malek
+
+   * Thomas Arend
+
+   * Bonzo Armstrong
+
+   * Steven Ashe
+
+   * Chris Baldwin
+
+   * David Billinghurst
+
+   * Jim Blandy
+
+   * Stephane Bortzmeyer
+
+   * Horst von Brand
+
+   * Frank Braun
+
+   * Rodney Brown
+
+   * Sidney Cadot
+
+   * Bradford Castalia
+
+   * Robert Clark
+
+   * Jonathan Corbet
+
+   * Ralph Doncaster
+
+   * Richard Emberson
+
+   * Levente Farkas
+
+   * Graham Fawcett
+
+   * Mark Fernyhough
+
+   * Robert A. French
+
+   * Jo"rgen Freyh
+
+   * Mark K. Gardner
+
+   * Charles-Antoine Gauthier
+
+   * Yung Shing Gene
+
+   * David Gilbert
+
+   * Simon Gornall
+
+   * Fred Gray
+
+   * John Griffin
+
+   * Patrik Hagglund
+
+   * Phil Hargett
+
+   * Amancio Hasty
+
+   * Takafumi Hayashi
+
+   * Bryan W. Headley
+
+   * Kevin B. Hendricks
+
+   * Joep Jansen
+
+   * Christian Joensson
+
+   * Michel Kern
+
+   * David Kidd
+
+   * Tobias Kuipers
+
+   * Anand Krishnaswamy
+
+   * A. O. V. Le Blanc
+
+   * llewelly
+
+   * Damon Love
+
+   * Brad Lucier
+
+   * Matthias Klose
+
+   * Martin Knoblauch
+
+   * Rick Lutowski
+
+   * Jesse Macnish
+
+   * Stefan Morrell
+
+   * Anon A. Mous
+
+   * Matthias Mueller
+
+   * Pekka Nikander
+
+   * Rick Niles
+
+   * Jon Olson
+
+   * Magnus Persson
+
+   * Chris Pollard
+
+   * Richard Polton
+
+   * Derk Reefman
+
+   * David Rees
+
+   * Paul Reilly
+
+   * Tom Reilly
+
+   * Torsten Rueger
+
+   * Danny Sadinoff
+
+   * Marc Schifer
+
+   * Erik Schnetter
+
+   * Wayne K. Schroll
+
+   * David Schuler
+
+   * Vin Shelton
+
+   * Tim Souder
+
+   * Adam Sulmicki
+
+   * Bill Thorson
+
+   * George Talbot
+
+   * Pedro A. M. Vazquez
+
+   * Gregory Warnes
+
+   * Ian Watson
+
+   * David E. Young
+
+   * And many others
+
+ And finally we'd like to thank everyone who uses the compiler, provides
+feedback and generally reminds us why we're doing this work in the first
+place.
+
+
+File: gcc.info,  Node: Option Index,  Next: Keyword Index,  Prev: Contributors,  Up: Top
+
+Option Index
+************
+
+GCC's command line options are indexed here without any initial `-' or
+`--'.  Where an option has both positive and negative forms (such as
+`-fOPTION' and `-fno-OPTION'), relevant entries in the manual are
+indexed under the most appropriate form; it may sometimes be useful to
+look up both forms.
+
+[index]
+* Menu:
+
+* ###:                                   Overall Options.    (line  204)
+* -mcpu:                                 RX Options.         (line   31)
+* -patch:                                RX Options.         (line   31)
+* A:                                     Preprocessor Options.
+                                                             (line  541)
+* all_load:                              Darwin Options.     (line  112)
+* allowable_client:                      Darwin Options.     (line  199)
+* ansi <1>:                              Preprocessor Options.
+                                                             (line  326)
+* ansi <2>:                              Other Builtins.     (line   22)
+* ansi <3>:                              C Dialect Options.  (line   11)
+* ansi <4>:                              Non-bugs.           (line  107)
+* ansi:                                  Standards.          (line   16)
+* arch_errors_fatal:                     Darwin Options.     (line  116)
+* aux-info:                              C Dialect Options.  (line  143)
+* B:                                     Directory Options.  (line   41)
+* b:                                     Target Options.     (line   13)
+* Bdynamic:                              VxWorks Options.    (line   22)
+* bind_at_load:                          Darwin Options.     (line  120)
+* Bstatic:                               VxWorks Options.    (line   22)
+* bundle:                                Darwin Options.     (line  125)
+* bundle_loader:                         Darwin Options.     (line  129)
+* c:                                     Link Options.       (line   20)
+* C:                                     Preprocessor Options.
+                                                             (line  599)
+* c:                                     Overall Options.    (line  159)
+* client_name:                           Darwin Options.     (line  199)
+* combine:                               Overall Options.    (line  215)
+* compatibility_version:                 Darwin Options.     (line  199)
+* coverage:                              Debugging Options.  (line  336)
+* current_version:                       Darwin Options.     (line  199)
+* d:                                     Debugging Options.  (line  400)
+* D:                                     Preprocessor Options.
+                                                             (line   34)
+* dA:                                    Debugging Options.  (line  603)
+* dD <1>:                                Debugging Options.  (line  607)
+* dD:                                    Preprocessor Options.
+                                                             (line  573)
+* dead_strip:                            Darwin Options.     (line  199)
+* dependency-file:                       Darwin Options.     (line  199)
+* dH:                                    Debugging Options.  (line  611)
+* dI:                                    Preprocessor Options.
+                                                             (line  582)
+* dM:                                    Preprocessor Options.
+                                                             (line  557)
+* dm:                                    Debugging Options.  (line  614)
+* dN:                                    Preprocessor Options.
+                                                             (line  579)
+* dP:                                    Debugging Options.  (line  623)
+* dp:                                    Debugging Options.  (line  618)
+* dU:                                    Preprocessor Options.
+                                                             (line  586)
+* dumpmachine:                           Debugging Options.  (line 1101)
+* dumpspecs:                             Debugging Options.  (line 1109)
+* dumpversion:                           Debugging Options.  (line 1105)
+* dv:                                    Debugging Options.  (line  627)
+* dx:                                    Debugging Options.  (line  632)
+* dy:                                    Debugging Options.  (line  636)
+* dylib_file:                            Darwin Options.     (line  199)
+* dylinker_install_name:                 Darwin Options.     (line  199)
+* dynamic:                               Darwin Options.     (line  199)
+* dynamiclib:                            Darwin Options.     (line  133)
+* E <1>:                                 Overall Options.    (line  180)
+* E:                                     Link Options.       (line   20)
+* EB <1>:                                MIPS Options.       (line    7)
+* EB:                                    ARC Options.        (line   12)
+* EL <1>:                                MIPS Options.       (line   10)
+* EL:                                    ARC Options.        (line    9)
+* exported_symbols_list:                 Darwin Options.     (line  199)
+* F:                                     Darwin Options.     (line   32)
+* fabi-version:                          C++ Dialect Options.
+                                                             (line   20)
+* falign-functions:                      Optimize Options.   (line 1283)
+* falign-jumps:                          Optimize Options.   (line 1333)
+* falign-labels:                         Optimize Options.   (line 1301)
+* falign-loops:                          Optimize Options.   (line 1319)
+* fargument-alias:                       Code Gen Options.   (line  415)
+* fargument-noalias:                     Code Gen Options.   (line  415)
+* fargument-noalias-anything:            Code Gen Options.   (line  415)
+* fargument-noalias-global:              Code Gen Options.   (line  415)
+* fassociative-math:                     Optimize Options.   (line 1758)
+* fasynchronous-unwind-tables:           Code Gen Options.   (line   64)
+* fauto-inc-dec:                         Optimize Options.   (line  476)
+* fbounds-check:                         Code Gen Options.   (line   15)
+* fbranch-probabilities:                 Optimize Options.   (line 1886)
+* fbranch-target-load-optimize:          Optimize Options.   (line 1994)
+* fbranch-target-load-optimize2:         Optimize Options.   (line 2000)
+* fbtr-bb-exclusive:                     Optimize Options.   (line 2004)
+* fcall-saved:                           Code Gen Options.   (line  262)
+* fcall-used:                            Code Gen Options.   (line  248)
+* fcaller-saves:                         Optimize Options.   (line  742)
+* fcheck-data-deps:                      Optimize Options.   (line  988)
+* fcheck-new:                            C++ Dialect Options.
+                                                             (line   41)
+* fcommon:                               Variable Attributes.
+                                                             (line  105)
+* fcompare-debug:                        Debugging Options.  (line  156)
+* fcompare-debug-second:                 Debugging Options.  (line  182)
+* fcond-mismatch:                        C Dialect Options.  (line  261)
+* fconserve-space:                       C++ Dialect Options.
+                                                             (line   51)
+* fconserve-stack:                       Optimize Options.   (line  755)
+* fconstant-string-class:                Objective-C and Objective-C++ Dialect Options.
+                                                             (line   30)
+* fcprop-registers:                      Optimize Options.   (line 1616)
+* fcrossjumping:                         Optimize Options.   (line  469)
+* fcse-follow-jumps:                     Optimize Options.   (line  397)
+* fcse-skip-blocks:                      Optimize Options.   (line  406)
+* fcx-fortran-rules:                     Optimize Options.   (line 1872)
+* fcx-limited-range:                     Optimize Options.   (line 1860)
+* fdata-sections:                        Optimize Options.   (line 1975)
+* fdbg-cnt:                              Debugging Options.  (line  389)
+* fdbg-cnt-list:                         Debugging Options.  (line  386)
+* fdce:                                  Optimize Options.   (line  482)
+* fdebug-prefix-map:                     Debugging Options.  (line  283)
+* fdelayed-branch:                       Optimize Options.   (line  591)
+* fdelete-null-pointer-checks:           Optimize Options.   (line  505)
+* fdiagnostics-show-location:            Language Independent Options.
+                                                             (line   21)
+* fdiagnostics-show-option:              Language Independent Options.
+                                                             (line   36)
+* fdirectives-only:                      Preprocessor Options.
+                                                             (line  449)
+* fdollars-in-identifiers <1>:           Interoperation.     (line  146)
+* fdollars-in-identifiers:               Preprocessor Options.
+                                                             (line  471)
+* fdse:                                  Optimize Options.   (line  486)
+* fdump-class-hierarchy:                 Debugging Options.  (line  666)
+* fdump-final-insns:                     Debugging Options.  (line  150)
+* fdump-ipa:                             Debugging Options.  (line  674)
+* fdump-noaddr:                          Debugging Options.  (line  639)
+* fdump-rtl-alignments:                  Debugging Options.  (line  415)
+* fdump-rtl-all:                         Debugging Options.  (line  600)
+* fdump-rtl-asmcons:                     Debugging Options.  (line  418)
+* fdump-rtl-auto_inc_dec:                Debugging Options.  (line  422)
+* fdump-rtl-barriers:                    Debugging Options.  (line  426)
+* fdump-rtl-bbpart:                      Debugging Options.  (line  429)
+* fdump-rtl-bbro:                        Debugging Options.  (line  432)
+* fdump-rtl-btl2:                        Debugging Options.  (line  436)
+* fdump-rtl-bypass:                      Debugging Options.  (line  440)
+* fdump-rtl-ce1:                         Debugging Options.  (line  451)
+* fdump-rtl-ce2:                         Debugging Options.  (line  451)
+* fdump-rtl-ce3:                         Debugging Options.  (line  451)
+* fdump-rtl-combine:                     Debugging Options.  (line  443)
+* fdump-rtl-compgotos:                   Debugging Options.  (line  446)
+* fdump-rtl-cprop_hardreg:               Debugging Options.  (line  455)
+* fdump-rtl-csa:                         Debugging Options.  (line  458)
+* fdump-rtl-cse1:                        Debugging Options.  (line  462)
+* fdump-rtl-cse2:                        Debugging Options.  (line  462)
+* fdump-rtl-dbr:                         Debugging Options.  (line  469)
+* fdump-rtl-dce:                         Debugging Options.  (line  466)
+* fdump-rtl-dce1:                        Debugging Options.  (line  473)
+* fdump-rtl-dce2:                        Debugging Options.  (line  473)
+* fdump-rtl-dfinish:                     Debugging Options.  (line  597)
+* fdump-rtl-dfinit:                      Debugging Options.  (line  597)
+* fdump-rtl-eh:                          Debugging Options.  (line  477)
+* fdump-rtl-eh_ranges:                   Debugging Options.  (line  480)
+* fdump-rtl-expand:                      Debugging Options.  (line  483)
+* fdump-rtl-fwprop1:                     Debugging Options.  (line  487)
+* fdump-rtl-fwprop2:                     Debugging Options.  (line  487)
+* fdump-rtl-gcse1:                       Debugging Options.  (line  492)
+* fdump-rtl-gcse2:                       Debugging Options.  (line  492)
+* fdump-rtl-init-regs:                   Debugging Options.  (line  496)
+* fdump-rtl-initvals:                    Debugging Options.  (line  499)
+* fdump-rtl-into_cfglayout:              Debugging Options.  (line  502)
+* fdump-rtl-ira:                         Debugging Options.  (line  505)
+* fdump-rtl-jump:                        Debugging Options.  (line  508)
+* fdump-rtl-loop2:                       Debugging Options.  (line  511)
+* fdump-rtl-mach:                        Debugging Options.  (line  515)
+* fdump-rtl-mode_sw:                     Debugging Options.  (line  519)
+* fdump-rtl-outof_cfglayout:             Debugging Options.  (line  525)
+* fdump-rtl-peephole2:                   Debugging Options.  (line  528)
+* fdump-rtl-postreload:                  Debugging Options.  (line  531)
+* fdump-rtl-pro_and_epilogue:            Debugging Options.  (line  534)
+* fdump-rtl-regclass:                    Debugging Options.  (line  597)
+* fdump-rtl-regmove:                     Debugging Options.  (line  537)
+* fdump-rtl-rnreg:                       Debugging Options.  (line  522)
+* fdump-rtl-sched1:                      Debugging Options.  (line  541)
+* fdump-rtl-sched2:                      Debugging Options.  (line  541)
+* fdump-rtl-see:                         Debugging Options.  (line  545)
+* fdump-rtl-seqabstr:                    Debugging Options.  (line  548)
+* fdump-rtl-shorten:                     Debugging Options.  (line  551)
+* fdump-rtl-sibling:                     Debugging Options.  (line  554)
+* fdump-rtl-sms:                         Debugging Options.  (line  567)
+* fdump-rtl-split1:                      Debugging Options.  (line  561)
+* fdump-rtl-split2:                      Debugging Options.  (line  561)
+* fdump-rtl-split3:                      Debugging Options.  (line  561)
+* fdump-rtl-split4:                      Debugging Options.  (line  561)
+* fdump-rtl-split5:                      Debugging Options.  (line  561)
+* fdump-rtl-stack:                       Debugging Options.  (line  571)
+* fdump-rtl-subreg1:                     Debugging Options.  (line  577)
+* fdump-rtl-subreg2:                     Debugging Options.  (line  577)
+* fdump-rtl-subregs_of_mode_finish:      Debugging Options.  (line  597)
+* fdump-rtl-subregs_of_mode_init:        Debugging Options.  (line  597)
+* fdump-rtl-unshare:                     Debugging Options.  (line  581)
+* fdump-rtl-vartrack:                    Debugging Options.  (line  584)
+* fdump-rtl-vregs:                       Debugging Options.  (line  587)
+* fdump-rtl-web:                         Debugging Options.  (line  590)
+* fdump-statistics:                      Debugging Options.  (line  692)
+* fdump-translation-unit:                Debugging Options.  (line  657)
+* fdump-tree:                            Debugging Options.  (line  703)
+* fdump-tree-alias:                      Debugging Options.  (line  797)
+* fdump-tree-all:                        Debugging Options.  (line  887)
+* fdump-tree-ccp:                        Debugging Options.  (line  801)
+* fdump-tree-cfg:                        Debugging Options.  (line  777)
+* fdump-tree-ch:                         Debugging Options.  (line  789)
+* fdump-tree-copyprop:                   Debugging Options.  (line  817)
+* fdump-tree-copyrename:                 Debugging Options.  (line  863)
+* fdump-tree-dce:                        Debugging Options.  (line  825)
+* fdump-tree-dom:                        Debugging Options.  (line  843)
+* fdump-tree-dse:                        Debugging Options.  (line  848)
+* fdump-tree-forwprop:                   Debugging Options.  (line  858)
+* fdump-tree-fre:                        Debugging Options.  (line  813)
+* fdump-tree-gimple:                     Debugging Options.  (line  772)
+* fdump-tree-mudflap:                    Debugging Options.  (line  829)
+* fdump-tree-nrv:                        Debugging Options.  (line  868)
+* fdump-tree-optimized:                  Debugging Options.  (line  769)
+* fdump-tree-original:                   Debugging Options.  (line  766)
+* fdump-tree-phiopt:                     Debugging Options.  (line  853)
+* fdump-tree-pre:                        Debugging Options.  (line  809)
+* fdump-tree-sink:                       Debugging Options.  (line  839)
+* fdump-tree-slp:                        Debugging Options.  (line  878)
+* fdump-tree-sra:                        Debugging Options.  (line  834)
+* fdump-tree-ssa:                        Debugging Options.  (line  793)
+* fdump-tree-store_copyprop:             Debugging Options.  (line  821)
+* fdump-tree-storeccp:                   Debugging Options.  (line  805)
+* fdump-tree-vcg:                        Debugging Options.  (line  781)
+* fdump-tree-vect:                       Debugging Options.  (line  873)
+* fdump-tree-vrp:                        Debugging Options.  (line  883)
+* fdump-unnumbered:                      Debugging Options.  (line  645)
+* fdump-unnumbered-links:                Debugging Options.  (line  651)
+* fdwarf2-cfi-asm:                       Debugging Options.  (line  287)
+* fearly-inlining:                       Optimize Options.   (line  234)
+* feliminate-dwarf2-dups:                Debugging Options.  (line  195)
+* feliminate-unused-debug-symbols:       Debugging Options.  (line   52)
+* feliminate-unused-debug-types:         Debugging Options.  (line 1113)
+* fenable-icf-debug:                     Debugging Options.  (line  270)
+* fexceptions:                           Code Gen Options.   (line   34)
+* fexcess-precision:                     Optimize Options.   (line 1686)
+* fexec-charset:                         Preprocessor Options.
+                                                             (line  498)
+* fexpensive-optimizations:              Optimize Options.   (line  523)
+* fextended-identifiers:                 Preprocessor Options.
+                                                             (line  474)
+* ffast-math:                            Optimize Options.   (line 1709)
+* ffinite-math-only:                     Optimize Options.   (line 1784)
+* ffix-and-continue:                     Darwin Options.     (line  106)
+* ffixed:                                Code Gen Options.   (line  236)
+* ffloat-store <1>:                      Optimize Options.   (line 1672)
+* ffloat-store:                          Disappointments.    (line   77)
+* ffor-scope:                            C++ Dialect Options.
+                                                             (line  111)
+* fforward-propagate:                    Optimize Options.   (line  163)
+* ffreestanding <1>:                     Standards.          (line   84)
+* ffreestanding <2>:                     Warning Options.    (line  195)
+* ffreestanding <3>:                     C Dialect Options.  (line  214)
+* ffreestanding:                         Function Attributes.
+                                                             (line  437)
+* ffriend-injection:                     C++ Dialect Options.
+                                                             (line   81)
+* ffunction-sections:                    Optimize Options.   (line 1975)
+* fgcse:                                 Optimize Options.   (line  420)
+* fgcse-after-reload:                    Optimize Options.   (line  456)
+* fgcse-las:                             Optimize Options.   (line  449)
+* fgcse-lm:                              Optimize Options.   (line  431)
+* fgcse-sm:                              Optimize Options.   (line  440)
+* fgnu-runtime:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line   39)
+* fgnu89-inline:                         C Dialect Options.  (line  122)
+* fgraphite-identity:                    Optimize Options.   (line  974)
+* fhosted:                               C Dialect Options.  (line  207)
+* fif-conversion:                        Optimize Options.   (line  490)
+* fif-conversion2:                       Optimize Options.   (line  499)
+* filelist:                              Darwin Options.     (line  199)
+* findirect-data:                        Darwin Options.     (line  106)
+* findirect-inlining:                    Optimize Options.   (line  207)
+* finhibit-size-directive:               Code Gen Options.   (line  158)
+* finline-functions:                     Optimize Options.   (line  215)
+* finline-functions-called-once:         Optimize Options.   (line  226)
+* finline-limit:                         Optimize Options.   (line  251)
+* finline-small-functions:               Optimize Options.   (line  199)
+* finput-charset:                        Preprocessor Options.
+                                                             (line  511)
+* finstrument-functions <1>:             Function Attributes.
+                                                             (line  785)
+* finstrument-functions:                 Code Gen Options.   (line  292)
+* finstrument-functions-exclude-file-list: Code Gen Options. (line  329)
+* finstrument-functions-exclude-function-list: Code Gen Options.
+                                                             (line  347)
+* fipa-cp:                               Optimize Options.   (line  816)
+* fipa-cp-clone:                         Optimize Options.   (line  824)
+* fipa-matrix-reorg:                     Optimize Options.   (line  834)
+* fipa-pta:                              Optimize Options.   (line  812)
+* fipa-pure-const:                       Optimize Options.   (line  789)
+* fipa-reference:                        Optimize Options.   (line  793)
+* fipa-sra:                              Optimize Options.   (line  244)
+* fipa-struct-reorg:                     Optimize Options.   (line  797)
+* fira-coalesce:                         Optimize Options.   (line  562)
+* fira-loop-pressure:                    Optimize Options.   (line  566)
+* fira-verbose:                          Optimize Options.   (line  586)
+* fivopts:                               Optimize Options.   (line 1024)
+* fkeep-inline-functions <1>:            Inline.             (line   51)
+* fkeep-inline-functions:                Optimize Options.   (line  277)
+* fkeep-static-consts:                   Optimize Options.   (line  284)
+* flat_namespace:                        Darwin Options.     (line  199)
+* flax-vector-conversions:               C Dialect Options.  (line  266)
+* fleading-underscore:                   Code Gen Options.   (line  432)
+* flto:                                  Optimize Options.   (line 1391)
+* fltrans:                               Optimize Options.   (line 1568)
+* fltrans-output-list:                   Optimize Options.   (line 1579)
+* fmem-report:                           Debugging Options.  (line  311)
+* fmerge-all-constants:                  Optimize Options.   (line  303)
+* fmerge-constants:                      Optimize Options.   (line  293)
+* fmerge-debug-strings:                  Debugging Options.  (line  275)
+* fmessage-length:                       Language Independent Options.
+                                                             (line   15)
+* fmodulo-sched:                         Optimize Options.   (line  314)
+* fmodulo-sched-allow-regmoves:          Optimize Options.   (line  319)
+* fmove-loop-invariants:                 Optimize Options.   (line 1965)
+* fms-extensions <1>:                    C++ Dialect Options.
+                                                             (line  146)
+* fms-extensions <2>:                    Unnamed Fields.     (line   37)
+* fms-extensions:                        C Dialect Options.  (line  232)
+* fmudflap:                              Optimize Options.   (line  359)
+* fmudflapir:                            Optimize Options.   (line  359)
+* fmudflapth:                            Optimize Options.   (line  359)
+* fnext-runtime:                         Objective-C and Objective-C++ Dialect Options.
+                                                             (line   43)
+* fno-access-control:                    C++ Dialect Options.
+                                                             (line   37)
+* fno-asm:                               C Dialect Options.  (line  159)
+* fno-branch-count-reg:                  Optimize Options.   (line  326)
+* fno-builtin <1>:                       Function Attributes.
+                                                             (line  437)
+* fno-builtin <2>:                       Warning Options.    (line  195)
+* fno-builtin <3>:                       C Dialect Options.  (line  173)
+* fno-builtin:                           Other Builtins.     (line   14)
+* fno-common <1>:                        Variable Attributes.
+                                                             (line  105)
+* fno-common:                            Code Gen Options.   (line  135)
+* fno-compare-debug:                     Debugging Options.  (line  156)
+* fno-deduce-init-list:                  C++ Dialect Options.
+                                                             (line   63)
+* fno-default-inline <1>:                Inline.             (line   71)
+* fno-default-inline <2>:                C++ Dialect Options.
+                                                             (line  300)
+* fno-default-inline:                    Optimize Options.   (line  148)
+* fno-defer-pop:                         Optimize Options.   (line  155)
+* fno-dwarf2-cfi-asm:                    Debugging Options.  (line  287)
+* fno-elide-constructors:                C++ Dialect Options.
+                                                             (line   94)
+* fno-enforce-eh-specs:                  C++ Dialect Options.
+                                                             (line  100)
+* fno-for-scope:                         C++ Dialect Options.
+                                                             (line  111)
+* fno-function-cse:                      Optimize Options.   (line  336)
+* fno-gnu-keywords:                      C++ Dialect Options.
+                                                             (line  123)
+* fno-guess-branch-probability:          Optimize Options.   (line 1155)
+* fno-ident:                             Code Gen Options.   (line  155)
+* fno-implement-inlines <1>:             C++ Interface.      (line   75)
+* fno-implement-inlines:                 C++ Dialect Options.
+                                                             (line  140)
+* fno-implicit-inline-templates:         C++ Dialect Options.
+                                                             (line  134)
+* fno-implicit-templates <1>:            C++ Dialect Options.
+                                                             (line  128)
+* fno-implicit-templates:                Template Instantiation.
+                                                             (line   87)
+* fno-inline:                            Optimize Options.   (line  193)
+* fno-ira-share-save-slots:              Optimize Options.   (line  574)
+* fno-ira-share-spill-slots:             Optimize Options.   (line  580)
+* fno-jump-tables:                       Code Gen Options.   (line  228)
+* fno-math-errno:                        Optimize Options.   (line 1723)
+* fno-merge-debug-strings:               Debugging Options.  (line  275)
+* fno-nil-receivers:                     Objective-C and Objective-C++ Dialect Options.
+                                                             (line   49)
+* fno-nonansi-builtins:                  C++ Dialect Options.
+                                                             (line  151)
+* fno-operator-names:                    C++ Dialect Options.
+                                                             (line  156)
+* fno-optional-diags:                    C++ Dialect Options.
+                                                             (line  160)
+* fno-peephole:                          Optimize Options.   (line 1146)
+* fno-peephole2:                         Optimize Options.   (line 1146)
+* fno-pretty-templates:                  C++ Dialect Options.
+                                                             (line  170)
+* fno-rtti:                              C++ Dialect Options.
+                                                             (line  188)
+* fno-sched-interblock:                  Optimize Options.   (line  617)
+* fno-sched-spec:                        Optimize Options.   (line  622)
+* fno-set-stack-executable:              i386 and x86-64 Windows Options.
+                                                             (line   60)
+* fno-show-column:                       Preprocessor Options.
+                                                             (line  536)
+* fno-signed-bitfields:                  C Dialect Options.  (line  299)
+* fno-signed-zeros:                      Optimize Options.   (line 1796)
+* fno-stack-limit:                       Code Gen Options.   (line  398)
+* fno-threadsafe-statics:                C++ Dialect Options.
+                                                             (line  210)
+* fno-toplevel-reorder:                  Optimize Options.   (line 1353)
+* fno-trapping-math:                     Optimize Options.   (line 1806)
+* fno-unsigned-bitfields:                C Dialect Options.  (line  299)
+* fno-use-cxa-get-exception-ptr:         C++ Dialect Options.
+                                                             (line  223)
+* fno-var-tracking-assignments:          Debugging Options.  (line 1024)
+* fno-var-tracking-assignments-toggle:   Debugging Options.  (line 1034)
+* fno-weak:                              C++ Dialect Options.
+                                                             (line  285)
+* fno-working-directory:                 Preprocessor Options.
+                                                             (line  521)
+* fno-zero-initialized-in-bss:           Optimize Options.   (line  347)
+* fnon-call-exceptions:                  Code Gen Options.   (line   48)
+* fobjc-call-cxx-cdtors:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line   56)
+* fobjc-direct-dispatch:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line   81)
+* fobjc-exceptions:                      Objective-C and Objective-C++ Dialect Options.
+                                                             (line   85)
+* fobjc-gc:                              Objective-C and Objective-C++ Dialect Options.
+                                                             (line  170)
+* fomit-frame-pointer:                   Optimize Options.   (line  172)
+* fopenmp:                               C Dialect Options.  (line  224)
+* foptimize-register-move:               Optimize Options.   (line  530)
+* foptimize-sibling-calls:               Optimize Options.   (line  188)
+* force_cpusubtype_ALL:                  Darwin Options.     (line  138)
+* force_flat_namespace:                  Darwin Options.     (line  199)
+* fpack-struct:                          Code Gen Options.   (line  279)
+* fpcc-struct-return <1>:                Incompatibilities.  (line  170)
+* fpcc-struct-return:                    Code Gen Options.   (line   70)
+* fpch-deps:                             Preprocessor Options.
+                                                             (line  282)
+* fpch-preprocess:                       Preprocessor Options.
+                                                             (line  290)
+* fpeel-loops:                           Optimize Options.   (line 1957)
+* fpermissive:                           C++ Dialect Options.
+                                                             (line  165)
+* fpic:                                  Code Gen Options.   (line  184)
+* fPIC:                                  Code Gen Options.   (line  205)
+* fPIE:                                  Code Gen Options.   (line  218)
+* fpie:                                  Code Gen Options.   (line  218)
+* fpost-ipa-mem-report:                  Debugging Options.  (line  317)
+* fpre-ipa-mem-report:                   Debugging Options.  (line  315)
+* fpredictive-commoning:                 Optimize Options.   (line 1128)
+* fprefetch-loop-arrays:                 Optimize Options.   (line 1135)
+* fpreprocessed:                         Preprocessor Options.
+                                                             (line  479)
+* fprofile-arcs <1>:                     Debugging Options.  (line  321)
+* fprofile-arcs:                         Other Builtins.     (line  245)
+* fprofile-correction:                   Optimize Options.   (line 1623)
+* fprofile-dir:                          Optimize Options.   (line 1630)
+* fprofile-generate:                     Optimize Options.   (line 1640)
+* fprofile-use:                          Optimize Options.   (line 1653)
+* fprofile-values:                       Optimize Options.   (line 1905)
+* fpu:                                   RX Options.         (line   17)
+* frandom-seed:                          Debugging Options.  (line  918)
+* freciprocal-math:                      Optimize Options.   (line 1775)
+* frecord-gcc-switches:                  Code Gen Options.   (line  174)
+* freg-struct-return:                    Code Gen Options.   (line   88)
+* fregmove:                              Optimize Options.   (line  530)
+* frename-registers:                     Optimize Options.   (line 1924)
+* freorder-blocks:                       Optimize Options.   (line 1172)
+* freorder-blocks-and-partition:         Optimize Options.   (line 1178)
+* freorder-functions:                    Optimize Options.   (line 1189)
+* freplace-objc-classes:                 Objective-C and Objective-C++ Dialect Options.
+                                                             (line  174)
+* frepo <1>:                             C++ Dialect Options.
+                                                             (line  183)
+* frepo:                                 Template Instantiation.
+                                                             (line   62)
+* frerun-cse-after-loop:                 Optimize Options.   (line  414)
+* freschedule-modulo-scheduled-loops:    Optimize Options.   (line  718)
+* frounding-math:                        Optimize Options.   (line 1821)
+* fsched-critical-path-heuristic:        Optimize Options.   (line  684)
+* fsched-dep-count-heuristic:            Optimize Options.   (line  711)
+* fsched-group-heuristic:                Optimize Options.   (line  678)
+* fsched-last-insn-heuristic:            Optimize Options.   (line  704)
+* fsched-pressure:                       Optimize Options.   (line  627)
+* fsched-rank-heuristic:                 Optimize Options.   (line  697)
+* fsched-spec-insn-heuristic:            Optimize Options.   (line  690)
+* fsched-spec-load:                      Optimize Options.   (line  636)
+* fsched-spec-load-dangerous:            Optimize Options.   (line  641)
+* fsched-stalled-insns:                  Optimize Options.   (line  647)
+* fsched-stalled-insns-dep:              Optimize Options.   (line  657)
+* fsched-verbose:                        Debugging Options.  (line  928)
+* fsched2-use-superblocks:               Optimize Options.   (line  667)
+* fschedule-insns:                       Optimize Options.   (line  598)
+* fschedule-insns2:                      Optimize Options.   (line  608)
+* fsection-anchors:                      Optimize Options.   (line 2020)
+* fsel-sched-pipelining:                 Optimize Options.   (line  732)
+* fsel-sched-pipelining-outer-loops:     Optimize Options.   (line  737)
+* fselective-scheduling:                 Optimize Options.   (line  724)
+* fselective-scheduling2:                Optimize Options.   (line  728)
+* fshort-double:                         Code Gen Options.   (line  117)
+* fshort-enums <1>:                      Type Attributes.    (line  113)
+* fshort-enums <2>:                      Structures unions enumerations and bit-fields implementation.
+                                                             (line   43)
+* fshort-enums <3>:                      Non-bugs.           (line   42)
+* fshort-enums:                          Code Gen Options.   (line  106)
+* fshort-wchar:                          Code Gen Options.   (line  125)
+* fsignaling-nans:                       Optimize Options.   (line 1841)
+* fsigned-bitfields <1>:                 C Dialect Options.  (line  299)
+* fsigned-bitfields:                     Non-bugs.           (line   57)
+* fsigned-char <1>:                      Characters implementation.
+                                                             (line   31)
+* fsigned-char:                          C Dialect Options.  (line  289)
+* fsingle-precision-constant:            Optimize Options.   (line 1856)
+* fsplit-ivs-in-unroller:                Optimize Options.   (line 1109)
+* fsplit-wide-types:                     Optimize Options.   (line  389)
+* fstack-check:                          Code Gen Options.   (line  359)
+* fstack-limit-register:                 Code Gen Options.   (line  398)
+* fstack-limit-symbol:                   Code Gen Options.   (line  398)
+* fstack-protector:                      Optimize Options.   (line 2008)
+* fstack-protector-all:                  Optimize Options.   (line 2017)
+* fstats:                                C++ Dialect Options.
+                                                             (line  198)
+* fstrict-aliasing:                      Optimize Options.   (line 1202)
+* fstrict-overflow:                      Optimize Options.   (line 1248)
+* fsyntax-only:                          Warning Options.    (line   14)
+* ftabstop:                              Preprocessor Options.
+                                                             (line  492)
+* ftemplate-depth:                       C++ Dialect Options.
+                                                             (line  203)
+* ftest-coverage:                        Debugging Options.  (line  377)
+* fthread-jumps:                         Optimize Options.   (line  380)
+* ftime-report:                          Debugging Options.  (line  307)
+* ftls-model:                            Code Gen Options.   (line  443)
+* ftracer:                               Optimize Options.   (line 1092)
+* ftrapv:                                Code Gen Options.   (line   22)
+* ftree-builtin-call-dce:                Optimize Options.   (line  862)
+* ftree-ccp:                             Optimize Options.   (line  848)
+* ftree-ch:                              Optimize Options.   (line  882)
+* ftree-copy-prop:                       Optimize Options.   (line  784)
+* ftree-copyrename:                      Optimize Options.   (line 1048)
+* ftree-dce:                             Optimize Options.   (line  858)
+* ftree-dominator-opts:                  Optimize Options.   (line  868)
+* ftree-dse:                             Optimize Options.   (line  875)
+* ftree-forwprop:                        Optimize Options.   (line  769)
+* ftree-fre:                             Optimize Options.   (line  773)
+* ftree-loop-im:                         Optimize Options.   (line 1009)
+* ftree-loop-ivcanon:                    Optimize Options.   (line 1018)
+* ftree-loop-linear:                     Optimize Options.   (line  893)
+* ftree-loop-optimize:                   Optimize Options.   (line  889)
+* ftree-parallelize-loops:               Optimize Options.   (line 1029)
+* ftree-phiprop:                         Optimize Options.   (line  780)
+* ftree-pre:                             Optimize Options.   (line  765)
+* ftree-pta:                             Optimize Options.   (line 1038)
+* ftree-reassoc:                         Optimize Options.   (line  761)
+* ftree-sink:                            Optimize Options.   (line  844)
+* ftree-slp-vectorize:                   Optimize Options.   (line 1067)
+* ftree-sra:                             Optimize Options.   (line 1042)
+* ftree-ter:                             Optimize Options.   (line 1055)
+* ftree-vect-loop-version:               Optimize Options.   (line 1071)
+* ftree-vectorize:                       Optimize Options.   (line 1063)
+* ftree-vectorizer-verbose:              Debugging Options.  (line  891)
+* ftree-vrp:                             Optimize Options.   (line 1083)
+* funit-at-a-time:                       Optimize Options.   (line 1346)
+* funroll-all-loops:                     Optimize Options.   (line 1103)
+* funroll-loops:                         Optimize Options.   (line 1097)
+* funsafe-loop-optimizations:            Optimize Options.   (line  461)
+* funsafe-math-optimizations:            Optimize Options.   (line 1741)
+* funsigned-bitfields <1>:               Structures unions enumerations and bit-fields implementation.
+                                                             (line   17)
+* funsigned-bitfields <2>:               Non-bugs.           (line   57)
+* funsigned-bitfields:                   C Dialect Options.  (line  299)
+* funsigned-char <1>:                    Characters implementation.
+                                                             (line   31)
+* funsigned-char:                        C Dialect Options.  (line  271)
+* funswitch-loops:                       Optimize Options.   (line 1969)
+* funwind-tables:                        Code Gen Options.   (line   57)
+* fuse-cxa-atexit:                       C++ Dialect Options.
+                                                             (line  216)
+* fvar-tracking:                         Debugging Options.  (line 1014)
+* fvar-tracking-assignments:             Debugging Options.  (line 1024)
+* fvar-tracking-assignments-toggle:      Debugging Options.  (line 1034)
+* fvariable-expansion-in-unroller:       Optimize Options.   (line 1123)
+* fvect-cost-model:                      Optimize Options.   (line 1080)
+* fverbose-asm:                          Code Gen Options.   (line  165)
+* fvisibility:                           Code Gen Options.   (line  451)
+* fvisibility-inlines-hidden:            C++ Dialect Options.
+                                                             (line  228)
+* fvisibility-ms-compat:                 C++ Dialect Options.
+                                                             (line  256)
+* fvpt:                                  Optimize Options.   (line 1915)
+* fweb:                                  Optimize Options.   (line 1365)
+* fwhole-program:                        Optimize Options.   (line 1376)
+* fwhopr:                                Optimize Options.   (line 1537)
+* fwide-exec-charset:                    Preprocessor Options.
+                                                             (line  503)
+* fworking-directory:                    Preprocessor Options.
+                                                             (line  521)
+* fwpa:                                  Optimize Options.   (line 1553)
+* fwrapv:                                Code Gen Options.   (line   26)
+* fzero-link:                            Objective-C and Objective-C++ Dialect Options.
+                                                             (line  184)
+* G <1>:                                 MIPS Options.       (line  315)
+* G:                                     M32R/D Options.     (line   57)
+* g:                                     Debugging Options.  (line   10)
+* G <1>:                                 RS/6000 and PowerPC Options.
+                                                             (line  682)
+* G:                                     System V Options.   (line   10)
+* gcoff:                                 Debugging Options.  (line   70)
+* gdwarf-VERSION:                        Debugging Options.  (line   88)
+* gen-decls:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  194)
+* gfull:                                 Darwin Options.     (line   71)
+* ggdb:                                  Debugging Options.  (line   38)
+* gno-strict-dwarf:                      Debugging Options.  (line  105)
+* gstabs:                                Debugging Options.  (line   44)
+* gstabs+:                               Debugging Options.  (line   64)
+* gstrict-dwarf:                         Debugging Options.  (line   99)
+* gtoggle:                               Debugging Options.  (line  142)
+* gused:                                 Darwin Options.     (line   66)
+* gvms:                                  Debugging Options.  (line  109)
+* gxcoff:                                Debugging Options.  (line   75)
+* gxcoff+:                               Debugging Options.  (line   80)
+* H:                                     Preprocessor Options.
+                                                             (line  654)
+* headerpad_max_install_names:           Darwin Options.     (line  199)
+* help <1>:                              Preprocessor Options.
+                                                             (line  646)
+* help:                                  Overall Options.    (line  231)
+* I <1>:                                 Directory Options.  (line   10)
+* I:                                     Preprocessor Options.
+                                                             (line   65)
+* I- <1>:                                Directory Options.  (line  107)
+* I-:                                    Preprocessor Options.
+                                                             (line  365)
+* idirafter:                             Preprocessor Options.
+                                                             (line  407)
+* iframework:                            Darwin Options.     (line   59)
+* imacros:                               Preprocessor Options.
+                                                             (line  398)
+* image_base:                            Darwin Options.     (line  199)
+* imultilib:                             Preprocessor Options.
+                                                             (line  430)
+* include:                               Preprocessor Options.
+                                                             (line  387)
+* init:                                  Darwin Options.     (line  199)
+* install_name:                          Darwin Options.     (line  199)
+* iprefix:                               Preprocessor Options.
+                                                             (line  414)
+* iquote <1>:                            Preprocessor Options.
+                                                             (line  442)
+* iquote:                                Directory Options.  (line   31)
+* isysroot:                              Preprocessor Options.
+                                                             (line  426)
+* isystem:                               Preprocessor Options.
+                                                             (line  434)
+* iwithprefix:                           Preprocessor Options.
+                                                             (line  420)
+* iwithprefixbefore:                     Preprocessor Options.
+                                                             (line  420)
+* keep_private_externs:                  Darwin Options.     (line  199)
+* L:                                     Directory Options.  (line   37)
+* l:                                     Link Options.       (line   26)
+* lobjc:                                 Link Options.       (line   53)
+* logue:                                 OpenRISC 1000 Options.
+                                                             (line   60)
+* m:                                     RS/6000 and PowerPC Options.
+                                                             (line  537)
+* M:                                     Preprocessor Options.
+                                                             (line  173)
+* m1:                                    SH Options.         (line    9)
+* m10:                                   PDP-11 Options.     (line   29)
+* m128bit-long-double:                   i386 and x86-64 Options.
+                                                             (line  269)
+* m16-bit:                               CRIS Options.       (line   64)
+* m2:                                    SH Options.         (line   12)
+* m210:                                  MCore Options.      (line   43)
+* m2a:                                   SH Options.         (line   30)
+* m2a-nofpu:                             SH Options.         (line   18)
+* m2a-single:                            SH Options.         (line   26)
+* m2a-single-only:                       SH Options.         (line   22)
+* m3:                                    SH Options.         (line   34)
+* m31:                                   S/390 and zSeries Options.
+                                                             (line   87)
+* m32 <1>:                               SPARC Options.      (line  191)
+* m32 <2>:                               i386 and x86-64 Options.
+                                                             (line  636)
+* m32:                                   RS/6000 and PowerPC Options.
+                                                             (line  263)
+* m32-bit:                               CRIS Options.       (line   64)
+* m32bit-doubles:                        RX Options.         (line   10)
+* m32r:                                  M32R/D Options.     (line   15)
+* m32r2:                                 M32R/D Options.     (line    9)
+* m32rx:                                 M32R/D Options.     (line   12)
+* m340:                                  MCore Options.      (line   43)
+* m3dnow:                                i386 and x86-64 Options.
+                                                             (line  443)
+* m3e:                                   SH Options.         (line   37)
+* m4:                                    SH Options.         (line   51)
+* m4-nofpu:                              SH Options.         (line   40)
+* m4-single:                             SH Options.         (line   47)
+* m4-single-only:                        SH Options.         (line   43)
+* m40:                                   PDP-11 Options.     (line   23)
+* m45:                                   PDP-11 Options.     (line   26)
+* m4a:                                   SH Options.         (line   66)
+* m4a-nofpu:                             SH Options.         (line   54)
+* m4a-single:                            SH Options.         (line   62)
+* m4a-single-only:                       SH Options.         (line   58)
+* m4al:                                  SH Options.         (line   69)
+* m4byte-functions:                      MCore Options.      (line   27)
+* m5200:                                 M680x0 Options.     (line  146)
+* m5206e:                                M680x0 Options.     (line  155)
+* m528x:                                 M680x0 Options.     (line  159)
+* m5307:                                 M680x0 Options.     (line  163)
+* m5407:                                 M680x0 Options.     (line  167)
+* m64 <1>:                               RS/6000 and PowerPC Options.
+                                                             (line  263)
+* m64 <2>:                               i386 and x86-64 Options.
+                                                             (line  636)
+* m64 <3>:                               SPARC Options.      (line  191)
+* m64:                                   S/390 and zSeries Options.
+                                                             (line   87)
+* m64bit-doubles:                        RX Options.         (line   10)
+* m68000:                                M680x0 Options.     (line   94)
+* m68010:                                M680x0 Options.     (line  102)
+* m68020:                                M680x0 Options.     (line  108)
+* m68020-40:                             M680x0 Options.     (line  177)
+* m68020-60:                             M680x0 Options.     (line  186)
+* m68030:                                M680x0 Options.     (line  113)
+* m68040:                                M680x0 Options.     (line  118)
+* m68060:                                M680x0 Options.     (line  127)
+* m6811:                                 M68hc1x Options.    (line   13)
+* m6812:                                 M68hc1x Options.    (line   18)
+* m68881:                                M680x0 Options.     (line  196)
+* m68hc11:                               M68hc1x Options.    (line   13)
+* m68hc12:                               M68hc1x Options.    (line   18)
+* m68hcs12:                              M68hc1x Options.    (line   23)
+* m68S12:                                M68hc1x Options.    (line   23)
+* m8-bit:                                CRIS Options.       (line   64)
+* m96bit-long-double:                    i386 and x86-64 Options.
+                                                             (line  269)
+* mabi <1>:                              ARM Options.        (line   10)
+* mabi <2>:                              i386 and x86-64 Options.
+                                                             (line  552)
+* mabi:                                  RS/6000 and PowerPC Options.
+                                                             (line  568)
+* mabi=32:                               MIPS Options.       (line  130)
+* mabi=64:                               MIPS Options.       (line  130)
+* mabi=eabi:                             MIPS Options.       (line  130)
+* mabi=gnu:                              MMIX Options.       (line   20)
+* mabi=ibmlongdouble:                    RS/6000 and PowerPC Options.
+                                                             (line  581)
+* mabi=ieeelongdouble:                   RS/6000 and PowerPC Options.
+                                                             (line  585)
+* mabi=mmixware:                         MMIX Options.       (line   20)
+* mabi=n32:                              MIPS Options.       (line  130)
+* mabi=no-spe:                           RS/6000 and PowerPC Options.
+                                                             (line  578)
+* mabi=o64:                              MIPS Options.       (line  130)
+* mabi=spe:                              RS/6000 and PowerPC Options.
+                                                             (line  573)
+* mabicalls:                             MIPS Options.       (line  154)
+* mabort-on-noreturn:                    ARM Options.        (line  152)
+* mabsdiff:                              MeP Options.        (line    7)
+* mabshi:                                PDP-11 Options.     (line   55)
+* mac0:                                  PDP-11 Options.     (line   16)
+* macc-4:                                FRV Options.        (line  113)
+* macc-8:                                FRV Options.        (line  116)
+* maccumulate-outgoing-args:             i386 and x86-64 Options.
+                                                             (line  569)
+* maddress-space-conversion:             SPU Options.        (line   63)
+* madjust-unroll:                        SH Options.         (line  213)
+* mads:                                  RS/6000 and PowerPC Options.
+                                                             (line  611)
+* maix-struct-return:                    RS/6000 and PowerPC Options.
+                                                             (line  561)
+* maix32:                                RS/6000 and PowerPC Options.
+                                                             (line  301)
+* maix64:                                RS/6000 and PowerPC Options.
+                                                             (line  301)
+* maj:                                   OpenRISC 1000 Options.
+                                                             (line   44)
+* malign-300:                            H8/300 Options.     (line   31)
+* malign-double:                         i386 and x86-64 Options.
+                                                             (line  253)
+* malign-int:                            M680x0 Options.     (line  266)
+* malign-labels:                         FRV Options.        (line  104)
+* malign-loops:                          M32R/D Options.     (line   73)
+* malign-natural:                        RS/6000 and PowerPC Options.
+                                                             (line  340)
+* malign-power:                          RS/6000 and PowerPC Options.
+                                                             (line  340)
+* mall-opts:                             MeP Options.        (line   11)
+* malloc-cc:                             FRV Options.        (line   25)
+* malpha-as:                             DEC Alpha Options.  (line  159)
+* maltivec:                              RS/6000 and PowerPC Options.
+                                                             (line  188)
+* mam33:                                 MN10300 Options.    (line   17)
+* mapcs:                                 ARM Options.        (line   22)
+* mapcs-frame:                           ARM Options.        (line   14)
+* mapp-regs <1>:                         SPARC Options.      (line   10)
+* mapp-regs:                             V850 Options.       (line   57)
+* march <1>:                             CRIS Options.       (line   10)
+* march <2>:                             ARM Options.        (line  107)
+* march <3>:                             MIPS Options.       (line   14)
+* march <4>:                             M680x0 Options.     (line   12)
+* march <5>:                             HPPA Options.       (line  162)
+* march <6>:                             i386 and x86-64 Options.
+                                                             (line  152)
+* march:                                 S/390 and zSeries Options.
+                                                             (line  116)
+* mas100-syntax:                         RX Options.         (line   76)
+* masm=DIALECT:                          i386 and x86-64 Options.
+                                                             (line  209)
+* matomic-updates:                       SPU Options.        (line   78)
+* mauto-incdec:                          M68hc1x Options.    (line   26)
+* mauto-pic:                             IA-64 Options.      (line   50)
+* maverage:                              MeP Options.        (line   16)
+* mavoid-indexed-addresses:              RS/6000 and PowerPC Options.
+                                                             (line  409)
+* mb:                                    SH Options.         (line   74)
+* mbackchain:                            S/390 and zSeries Options.
+                                                             (line   35)
+* mbarrel-shift-enabled:                 LM32 Options.       (line    9)
+* mbase-addresses:                       MMIX Options.       (line   54)
+* mbased=:                               MeP Options.        (line   20)
+* mbcopy:                                PDP-11 Options.     (line   36)
+* mbcopy-builtin:                        PDP-11 Options.     (line   32)
+* mbig:                                  RS/6000 and PowerPC Options.
+                                                             (line  484)
+* mbig-endian <1>:                       RS/6000 and PowerPC Options.
+                                                             (line  484)
+* mbig-endian <2>:                       IA-64 Options.      (line    9)
+* mbig-endian <3>:                       ARM Options.        (line   67)
+* mbig-endian:                           MCore Options.      (line   39)
+* mbig-endian-data:                      RX Options.         (line   43)
+* mbig-switch <1>:                       V850 Options.       (line   52)
+* mbig-switch:                           HPPA Options.       (line   23)
+* mbigtable:                             SH Options.         (line   90)
+* mbit-align:                            RS/6000 and PowerPC Options.
+                                                             (line  438)
+* mbitfield:                             M680x0 Options.     (line  234)
+* mbitops <1>:                           MeP Options.        (line   26)
+* mbitops:                               SH Options.         (line   94)
+* mbranch-cheap:                         PDP-11 Options.     (line   65)
+* mbranch-cost:                          MIPS Options.       (line  611)
+* mbranch-cost=NUMBER:                   M32R/D Options.     (line   82)
+* mbranch-expensive:                     PDP-11 Options.     (line   61)
+* mbranch-hints:                         SPU Options.        (line   27)
+* mbranch-likely:                        MIPS Options.       (line  618)
+* mbranch-predict:                       MMIX Options.       (line   49)
+* mbss-plt:                              RS/6000 and PowerPC Options.
+                                                             (line  211)
+* mbuild-constants:                      DEC Alpha Options.  (line  142)
+* mbwx:                                  DEC Alpha Options.  (line  171)
+* mc68000:                               M680x0 Options.     (line   94)
+* mc68020:                               M680x0 Options.     (line  108)
+* mc=:                                   MeP Options.        (line   31)
+* mcache-size:                           SPU Options.        (line   70)
+* mcall-eabi:                            RS/6000 and PowerPC Options.
+                                                             (line  531)
+* mcall-freebsd:                         RS/6000 and PowerPC Options.
+                                                             (line  549)
+* mcall-gnu:                             RS/6000 and PowerPC Options.
+                                                             (line  545)
+* mcall-linux:                           RS/6000 and PowerPC Options.
+                                                             (line  541)
+* mcall-netbsd:                          RS/6000 and PowerPC Options.
+                                                             (line  553)
+* mcall-prologues:                       AVR Options.        (line   36)
+* mcall-sysv:                            RS/6000 and PowerPC Options.
+                                                             (line  523)
+* mcall-sysv-eabi:                       RS/6000 and PowerPC Options.
+                                                             (line  531)
+* mcall-sysv-noeabi:                     RS/6000 and PowerPC Options.
+                                                             (line  534)
+* mcallee-super-interworking:            ARM Options.        (line  245)
+* mcaller-super-interworking:            ARM Options.        (line  252)
+* mcallgraph-data:                       MCore Options.      (line   31)
+* mcc-init:                              CRIS Options.       (line   41)
+* mcfv4e:                                M680x0 Options.     (line  171)
+* mcheck-zero-division:                  MIPS Options.       (line  426)
+* mcirrus-fix-invalid-insns:             ARM Options.        (line  192)
+* mcix:                                  DEC Alpha Options.  (line  171)
+* mcld:                                  i386 and x86-64 Options.
+                                                             (line  472)
+* mclip:                                 MeP Options.        (line   35)
+* mcmodel=embmedany:                     SPARC Options.      (line  213)
+* mcmodel=kernel:                        i386 and x86-64 Options.
+                                                             (line  658)
+* mcmodel=large:                         i386 and x86-64 Options.
+                                                             (line  670)
+* mcmodel=medany:                        SPARC Options.      (line  207)
+* mcmodel=medium:                        i386 and x86-64 Options.
+                                                             (line  663)
+* mcmodel=medlow:                        SPARC Options.      (line  196)
+* mcmodel=medmid:                        SPARC Options.      (line  201)
+* mcmodel=small:                         i386 and x86-64 Options.
+                                                             (line  652)
+* mcmov:                                 OpenRISC 1000 Options.
+                                                             (line   55)
+* mcmpb:                                 RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mcode-readable:                        MIPS Options.       (line  386)
+* mcond-exec:                            FRV Options.        (line  152)
+* mcond-move:                            FRV Options.        (line  128)
+* mconfig=:                              MeP Options.        (line   39)
+* mconsole:                              i386 and x86-64 Windows Options.
+                                                             (line    9)
+* mconst-align:                          CRIS Options.       (line   55)
+* mconst16:                              Xtensa Options.     (line   10)
+* mconstant-gp:                          IA-64 Options.      (line   46)
+* mcop:                                  MeP Options.        (line   48)
+* mcop32:                                MeP Options.        (line   53)
+* mcop64:                                MeP Options.        (line   56)
+* mcorea:                                Blackfin Options.   (line  150)
+* mcoreb:                                Blackfin Options.   (line  156)
+* mcpu <1>:                              SPARC Options.      (line   96)
+* mcpu <2>:                              DEC Alpha Options.  (line  223)
+* mcpu <3>:                              i386 and x86-64 Options.
+                                                             (line  157)
+* mcpu <4>:                              FRV Options.        (line  212)
+* mcpu <5>:                              RS/6000 and PowerPC Options.
+                                                             (line  119)
+* mcpu <6>:                              M680x0 Options.     (line   28)
+* mcpu <7>:                              ARM Options.        (line   79)
+* mcpu <8>:                              picoChip Options.   (line    9)
+* mcpu <9>:                              ARC Options.        (line   23)
+* mcpu:                                  CRIS Options.       (line   10)
+* mcpu32:                                M680x0 Options.     (line  137)
+* mcpu= <1>:                             M32C Options.       (line    7)
+* mcpu=:                                 Blackfin Options.   (line    7)
+* mcrc32:                                i386 and x86-64 Options.
+                                                             (line  508)
+* mcsync-anomaly:                        Blackfin Options.   (line   56)
+* mcx16:                                 i386 and x86-64 Options.
+                                                             (line  486)
+* mcygwin:                               i386 and x86-64 Windows Options.
+                                                             (line   16)
+* MD:                                    Preprocessor Options.
+                                                             (line  262)
+* mdalign:                               SH Options.         (line   80)
+* mdata:                                 ARC Options.        (line   30)
+* mdata-align:                           CRIS Options.       (line   55)
+* mdc:                                   MeP Options.        (line   62)
+* mdebug <1>:                            S/390 and zSeries Options.
+                                                             (line  112)
+* mdebug:                                M32R/D Options.     (line   69)
+* mdebug-main=PREFIX <1>:                IA-64/VMS Options.  (line   13)
+* mdebug-main=PREFIX:                    DEC Alpha/VMS Options.
+                                                             (line   13)
+* mdec-asm:                              PDP-11 Options.     (line   78)
+* mdisable-callt:                        V850 Options.       (line   80)
+* mdisable-fpregs:                       HPPA Options.       (line   33)
+* mdisable-indexing:                     HPPA Options.       (line   40)
+* mdiv <1>:                              M680x0 Options.     (line  208)
+* mdiv <2>:                              MCore Options.      (line   15)
+* mdiv:                                  MeP Options.        (line   65)
+* mdiv=STRATEGY:                         SH Options.         (line  158)
+* mdivide-breaks:                        MIPS Options.       (line  432)
+* mdivide-enabled:                       LM32 Options.       (line   12)
+* mdivide-traps:                         MIPS Options.       (line  432)
+* mdivsi3_libfunc=NAME:                  SH Options.         (line  199)
+* mdll:                                  i386 and x86-64 Windows Options.
+                                                             (line   30)
+* mdlmzb:                                RS/6000 and PowerPC Options.
+                                                             (line  431)
+* mdmx:                                  MIPS Options.       (line  279)
+* mdouble:                               FRV Options.        (line   38)
+* mdouble-float <1>:                     OpenRISC 1000 Options.
+                                                             (line   17)
+* mdouble-float <2>:                     RS/6000 and PowerPC Options.
+                                                             (line  358)
+* mdouble-float:                         MIPS Options.       (line  237)
+* mdsp:                                  MIPS Options.       (line  256)
+* mdspr2:                                MIPS Options.       (line  262)
+* mdual-nops:                            SPU Options.        (line   90)
+* mdwarf2-asm:                           IA-64 Options.      (line   94)
+* mdword:                                FRV Options.        (line   32)
+* mdynamic-no-pic:                       RS/6000 and PowerPC Options.
+                                                             (line  489)
+* mea32:                                 SPU Options.        (line   55)
+* mea64:                                 SPU Options.        (line   55)
+* meabi:                                 RS/6000 and PowerPC Options.
+                                                             (line  630)
+* mearly-stop-bits:                      IA-64 Options.      (line  100)
+* meb <1>:                               Score Options.      (line    9)
+* meb:                                   MeP Options.        (line   68)
+* mel <1>:                               MeP Options.        (line   71)
+* mel:                                   Score Options.      (line   12)
+* melf <1>:                              MMIX Options.       (line   44)
+* melf:                                  CRIS Options.       (line   87)
+* memb:                                  RS/6000 and PowerPC Options.
+                                                             (line  625)
+* membedded-data:                        MIPS Options.       (line  373)
+* memregs=:                              M32C Options.       (line   21)
+* mep:                                   V850 Options.       (line   16)
+* mepsilon:                              MMIX Options.       (line   15)
+* merror-reloc:                          SPU Options.        (line   10)
+* mesa:                                  S/390 and zSeries Options.
+                                                             (line   95)
+* metrax100:                             CRIS Options.       (line   26)
+* metrax4:                               CRIS Options.       (line   26)
+* mexplicit-relocs <1>:                  DEC Alpha Options.  (line  184)
+* mexplicit-relocs:                      MIPS Options.       (line  417)
+* mextern-sdata:                         MIPS Options.       (line  335)
+* MF:                                    Preprocessor Options.
+                                                             (line  208)
+* mfast-fp:                              Blackfin Options.   (line  129)
+* mfast-indirect-calls:                  HPPA Options.       (line   52)
+* mfaster-structs:                       SPARC Options.      (line   71)
+* mfdpic:                                FRV Options.        (line   56)
+* mfix:                                  DEC Alpha Options.  (line  171)
+* mfix-and-continue:                     Darwin Options.     (line  106)
+* mfix-cortex-m3-ldrd:                   ARC Options.        (line   36)
+* mfix-r10000:                           MIPS Options.       (line  503)
+* mfix-r4000:                            MIPS Options.       (line  482)
+* mfix-r4400:                            MIPS Options.       (line  496)
+* mfix-sb1:                              MIPS Options.       (line  535)
+* mfix-vr4120:                           MIPS Options.       (line  514)
+* mfix-vr4130:                           MIPS Options.       (line  528)
+* mfixed-cc:                             FRV Options.        (line   28)
+* mfixed-range <1>:                      HPPA Options.       (line   59)
+* mfixed-range <2>:                      SH Options.         (line  206)
+* mfixed-range <3>:                      IA-64 Options.      (line  105)
+* mfixed-range:                          SPU Options.        (line   47)
+* mflip-mips16:                          MIPS Options.       (line  110)
+* mfloat-abi:                            ARM Options.        (line   41)
+* mfloat-gprs:                           RS/6000 and PowerPC Options.
+                                                             (line  246)
+* mfloat-ieee:                           DEC Alpha Options.  (line  179)
+* mfloat-vax:                            DEC Alpha Options.  (line  179)
+* mfloat32:                              PDP-11 Options.     (line   52)
+* mfloat64:                              PDP-11 Options.     (line   48)
+* mflush-func:                           MIPS Options.       (line  602)
+* mflush-func=NAME:                      M32R/D Options.     (line   94)
+* mflush-trap=NUMBER:                    M32R/D Options.     (line   87)
+* mfmovd:                                SH Options.         (line   97)
+* mfp:                                   ARM Options.        (line  119)
+* mfp-exceptions:                        MIPS Options.       (line  629)
+* mfp-reg:                               DEC Alpha Options.  (line   25)
+* mfp-rounding-mode:                     DEC Alpha Options.  (line   85)
+* mfp-trap-mode:                         DEC Alpha Options.  (line   63)
+* mfp16-format:                          ARM Options.        (line  131)
+* mfp32:                                 MIPS Options.       (line  220)
+* mfp64:                                 MIPS Options.       (line  223)
+* mfpe:                                  ARM Options.        (line  119)
+* mfpmath <1>:                           Optimize Options.   (line 1701)
+* mfpmath:                               i386 and x86-64 Options.
+                                                             (line  160)
+* mfpr-32:                               FRV Options.        (line   13)
+* mfpr-64:                               FRV Options.        (line   16)
+* mfprnd:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mfpu <1>:                              RS/6000 and PowerPC Options.
+                                                             (line  366)
+* mfpu <2>:                              SPARC Options.      (line   20)
+* mfpu <3>:                              PDP-11 Options.     (line    9)
+* mfpu:                                  ARM Options.        (line  119)
+* mfull-toc:                             RS/6000 and PowerPC Options.
+                                                             (line  274)
+* mfused-madd <1>:                       S/390 and zSeries Options.
+                                                             (line  137)
+* mfused-madd <2>:                       MIPS Options.       (line  467)
+* mfused-madd <3>:                       IA-64 Options.      (line   88)
+* mfused-madd <4>:                       Xtensa Options.     (line   19)
+* mfused-madd <5>:                       i386 and x86-64 Options.
+                                                             (line  467)
+* mfused-madd:                           RS/6000 and PowerPC Options.
+                                                             (line  418)
+* mg:                                    VAX Options.        (line   17)
+* MG:                                    Preprocessor Options.
+                                                             (line  217)
+* mgas <1>:                              DEC Alpha Options.  (line  159)
+* mgas:                                  HPPA Options.       (line   75)
+* mgen-cell-microcode:                   RS/6000 and PowerPC Options.
+                                                             (line  199)
+* mgettrcost=NUMBER:                     SH Options.         (line  228)
+* mglibc:                                GNU/Linux Options.  (line    9)
+* mgnu:                                  VAX Options.        (line   13)
+* mgnu-as:                               IA-64 Options.      (line   18)
+* mgnu-ld <1>:                           IA-64 Options.      (line   23)
+* mgnu-ld:                               HPPA Options.       (line  111)
+* mgotplt:                               CRIS Options.       (line   81)
+* mgp32:                                 MIPS Options.       (line  214)
+* mgp64:                                 MIPS Options.       (line  217)
+* mgpopt:                                MIPS Options.       (line  358)
+* mgpr-32:                               FRV Options.        (line    7)
+* mgpr-64:                               FRV Options.        (line   10)
+* mgprel-ro:                             FRV Options.        (line   79)
+* mh:                                    H8/300 Options.     (line   14)
+* mhard-dfp <1>:                         S/390 and zSeries Options.
+                                                             (line   20)
+* mhard-dfp:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mhard-div:                             OpenRISC 1000 Options.
+                                                             (line   24)
+* mhard-float <1>:                       FRV Options.        (line   19)
+* mhard-float <2>:                       MIPS Options.       (line  226)
+* mhard-float <3>:                       S/390 and zSeries Options.
+                                                             (line   11)
+* mhard-float <4>:                       M680x0 Options.     (line  196)
+* mhard-float <5>:                       SPARC Options.      (line   20)
+* mhard-float <6>:                       RS/6000 and PowerPC Options.
+                                                             (line  352)
+* mhard-float <7>:                       OpenRISC 1000 Options.
+                                                             (line    9)
+* mhard-float:                           ARM Options.        (line   57)
+* mhard-mul:                             OpenRISC 1000 Options.
+                                                             (line   32)
+* mhard-quad-float:                      SPARC Options.      (line   41)
+* mhardlit:                              MCore Options.      (line   10)
+* mhint-max-distance:                    SPU Options.        (line  102)
+* mhint-max-nops:                        SPU Options.        (line   96)
+* mhitachi:                              SH Options.         (line  101)
+* mhp-ld:                                HPPA Options.       (line  123)
+* micplb:                                Blackfin Options.   (line  169)
+* mid-shared-library:                    Blackfin Options.   (line   77)
+* mieee <1>:                             SH Options.         (line  116)
+* mieee:                                 DEC Alpha Options.  (line   39)
+* mieee-conformant:                      DEC Alpha Options.  (line  134)
+* mieee-fp:                              i386 and x86-64 Options.
+                                                             (line  215)
+* mieee-with-inexact:                    DEC Alpha Options.  (line   52)
+* milp32:                                IA-64 Options.      (line  121)
+* mimpure-text:                          SPARC Options.      (line   81)
+* mincoming-stack-boundary:              i386 and x86-64 Options.
+                                                             (line  383)
+* mindexed-addressing:                   SH Options.         (line  218)
+* minline-all-stringops:                 i386 and x86-64 Options.
+                                                             (line  590)
+* minline-float-divide-max-throughput:   IA-64 Options.      (line   58)
+* minline-float-divide-min-latency:      IA-64 Options.      (line   54)
+* minline-ic_invalidate:                 SH Options.         (line  123)
+* minline-int-divide-max-throughput:     IA-64 Options.      (line   69)
+* minline-int-divide-min-latency:        IA-64 Options.      (line   65)
+* minline-plt <1>:                       Blackfin Options.   (line  134)
+* minline-plt:                           FRV Options.        (line   64)
+* minline-sqrt-max-throughput:           IA-64 Options.      (line   80)
+* minline-sqrt-min-latency:              IA-64 Options.      (line   76)
+* minline-stringops-dynamically:         i386 and x86-64 Options.
+                                                             (line  597)
+* minmax:                                M68hc1x Options.    (line   31)
+* minsert-sched-nops:                    RS/6000 and PowerPC Options.
+                                                             (line  511)
+* mint-register:                         RX Options.         (line  100)
+* mint16:                                PDP-11 Options.     (line   40)
+* mint32 <1>:                            PDP-11 Options.     (line   44)
+* mint32:                                H8/300 Options.     (line   28)
+* mint8:                                 AVR Options.        (line   43)
+* minterlink-mips16:                     MIPS Options.       (line  117)
+* minvalid-symbols:                      SH Options.         (line  251)
+* mio-volatile:                          MeP Options.        (line   74)
+* mips1:                                 MIPS Options.       (line   77)
+* mips16:                                MIPS Options.       (line  102)
+* mips2:                                 MIPS Options.       (line   80)
+* mips3:                                 MIPS Options.       (line   83)
+* mips32:                                MIPS Options.       (line   89)
+* mips32r2:                              MIPS Options.       (line   92)
+* mips3d:                                MIPS Options.       (line  285)
+* mips4:                                 MIPS Options.       (line   86)
+* mips64:                                MIPS Options.       (line   95)
+* mips64r2:                              MIPS Options.       (line   98)
+* misel:                                 RS/6000 and PowerPC Options.
+                                                             (line  217)
+* misize:                                SH Options.         (line  135)
+* missue-rate=NUMBER:                    M32R/D Options.     (line   79)
+* mivc2:                                 MeP Options.        (line   59)
+* mjump-in-delay:                        HPPA Options.       (line   28)
+* mkernel:                               Darwin Options.     (line   84)
+* mknuthdiv:                             MMIX Options.       (line   33)
+* ml <1>:                                MeP Options.        (line   78)
+* ml:                                    SH Options.         (line   77)
+* mlarge-data:                           DEC Alpha Options.  (line  195)
+* mlarge-data-threshold=NUMBER:          i386 and x86-64 Options.
+                                                             (line  295)
+* mlarge-mem:                            SPU Options.        (line   35)
+* mlarge-text:                           DEC Alpha Options.  (line  213)
+* mleadz:                                MeP Options.        (line   81)
+* mleaf-id-shared-library:               Blackfin Options.   (line   88)
+* mlibfuncs:                             MMIX Options.       (line   10)
+* mlibrary-pic:                          FRV Options.        (line  110)
+* mlinked-fp:                            FRV Options.        (line   94)
+* mlinker-opt:                           HPPA Options.       (line   85)
+* mlinux:                                CRIS Options.       (line   91)
+* mlittle:                               RS/6000 and PowerPC Options.
+                                                             (line  478)
+* mlittle-endian <1>:                    MCore Options.      (line   39)
+* mlittle-endian <2>:                    SPARC Options.      (line  185)
+* mlittle-endian <3>:                    IA-64 Options.      (line   13)
+* mlittle-endian <4>:                    ARM Options.        (line   63)
+* mlittle-endian:                        RS/6000 and PowerPC Options.
+                                                             (line  478)
+* mlittle-endian-data:                   RX Options.         (line   43)
+* mllsc:                                 MIPS Options.       (line  242)
+* mlocal-sdata:                          MIPS Options.       (line  323)
+* mlong-calls <1>:                       ARM Options.        (line  157)
+* mlong-calls <2>:                       MIPS Options.       (line  453)
+* mlong-calls <3>:                       Blackfin Options.   (line  117)
+* mlong-calls <4>:                       V850 Options.       (line   10)
+* mlong-calls <5>:                       FRV Options.        (line   99)
+* mlong-calls:                           M68hc1x Options.    (line   35)
+* mlong-double-128:                      S/390 and zSeries Options.
+                                                             (line   29)
+* mlong-double-64:                       S/390 and zSeries Options.
+                                                             (line   29)
+* mlong-load-store:                      HPPA Options.       (line   66)
+* mlong32:                               MIPS Options.       (line  298)
+* mlong64:                               MIPS Options.       (line  293)
+* mlongcall:                             RS/6000 and PowerPC Options.
+                                                             (line  696)
+* mlongcalls:                            Xtensa Options.     (line   67)
+* mlow-64k:                              Blackfin Options.   (line   66)
+* mlp64:                                 IA-64 Options.      (line  121)
+* MM:                                    Preprocessor Options.
+                                                             (line  198)
+* mm:                                    MeP Options.        (line   84)
+* mmac <1>:                              Score Options.      (line   21)
+* mmac:                                  CRX Options.        (line    9)
+* mmad:                                  MIPS Options.       (line  462)
+* mmalloc64 <1>:                         IA-64/VMS Options.  (line   17)
+* mmalloc64:                             DEC Alpha/VMS Options.
+                                                             (line   17)
+* mmangle-cpu:                           ARC Options.        (line   15)
+* mmax:                                  DEC Alpha Options.  (line  171)
+* mmax-constant-size:                    RX Options.         (line   82)
+* mmax-stack-frame:                      CRIS Options.       (line   22)
+* mmcount-ra-address:                    MIPS Options.       (line  678)
+* mmcu:                                  AVR Options.        (line    9)
+* MMD:                                   Preprocessor Options.
+                                                             (line  278)
+* mmedia:                                FRV Options.        (line   44)
+* mmemcpy:                               MIPS Options.       (line  447)
+* mmemory-latency:                       DEC Alpha Options.  (line  276)
+* mmfcrf:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mmfpgpr:                               RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mminimal-toc:                          RS/6000 and PowerPC Options.
+                                                             (line  274)
+* mminmax:                               MeP Options.        (line   87)
+* mmmx:                                  i386 and x86-64 Options.
+                                                             (line  443)
+* mmodel=large:                          M32R/D Options.     (line   33)
+* mmodel=medium:                         M32R/D Options.     (line   27)
+* mmodel=small:                          M32R/D Options.     (line   18)
+* mmovbe:                                i386 and x86-64 Options.
+                                                             (line  504)
+* mmt:                                   MIPS Options.       (line  290)
+* mmul-bug-workaround:                   CRIS Options.       (line   31)
+* mmuladd:                               FRV Options.        (line   50)
+* mmulhw:                                RS/6000 and PowerPC Options.
+                                                             (line  424)
+* mmult:                                 MeP Options.        (line   90)
+* mmult-bug:                             MN10300 Options.    (line    9)
+* mmulti-cond-exec:                      FRV Options.        (line  176)
+* mmulticore:                            Blackfin Options.   (line  138)
+* mmultiple:                             RS/6000 and PowerPC Options.
+                                                             (line  377)
+* mmvcle:                                S/390 and zSeries Options.
+                                                             (line  105)
+* mmvme:                                 RS/6000 and PowerPC Options.
+                                                             (line  606)
+* mn:                                    H8/300 Options.     (line   20)
+* mnested-cond-exec:                     FRV Options.        (line  189)
+* mnew-mnemonics:                        RS/6000 and PowerPC Options.
+                                                             (line  104)
+* mnhwloop:                              Score Options.      (line   15)
+* mno-3dnow:                             i386 and x86-64 Options.
+                                                             (line  443)
+* mno-4byte-functions:                   MCore Options.      (line   27)
+* mno-abicalls:                          MIPS Options.       (line  154)
+* mno-abshi:                             PDP-11 Options.     (line   58)
+* mno-ac0:                               PDP-11 Options.     (line   20)
+* mno-address-space-conversion:          SPU Options.        (line   63)
+* mno-align-double:                      i386 and x86-64 Options.
+                                                             (line  253)
+* mno-align-int:                         M680x0 Options.     (line  266)
+* mno-align-loops:                       M32R/D Options.     (line   76)
+* mno-align-stringops:                   i386 and x86-64 Options.
+                                                             (line  585)
+* mno-altivec:                           RS/6000 and PowerPC Options.
+                                                             (line  188)
+* mno-am33:                              MN10300 Options.    (line   20)
+* mno-app-regs <1>:                      SPARC Options.      (line   10)
+* mno-app-regs:                          V850 Options.       (line   61)
+* mno-as100-syntax:                      RX Options.         (line   76)
+* mno-atomic-updates:                    SPU Options.        (line   78)
+* mno-avoid-indexed-addresses:           RS/6000 and PowerPC Options.
+                                                             (line  409)
+* mno-backchain:                         S/390 and zSeries Options.
+                                                             (line   35)
+* mno-base-addresses:                    MMIX Options.       (line   54)
+* mno-bit-align:                         RS/6000 and PowerPC Options.
+                                                             (line  438)
+* mno-bitfield:                          M680x0 Options.     (line  230)
+* mno-branch-likely:                     MIPS Options.       (line  618)
+* mno-branch-predict:                    MMIX Options.       (line   49)
+* mno-bwx:                               DEC Alpha Options.  (line  171)
+* mno-callgraph-data:                    MCore Options.      (line   31)
+* mno-check-zero-division:               MIPS Options.       (line  426)
+* mno-cirrus-fix-invalid-insns:          ARM Options.        (line  192)
+* mno-cix:                               DEC Alpha Options.  (line  171)
+* mno-cmpb:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-cond-exec:                         FRV Options.        (line  158)
+* mno-cond-move:                         FRV Options.        (line  134)
+* mno-const-align:                       CRIS Options.       (line   55)
+* mno-const16:                           Xtensa Options.     (line   10)
+* mno-crt0:                              MN10300 Options.    (line   31)
+* mno-csync-anomaly:                     Blackfin Options.   (line   62)
+* mno-cygwin:                            i386 and x86-64 Windows Options.
+                                                             (line   23)
+* mno-data-align:                        CRIS Options.       (line   55)
+* mno-debug:                             S/390 and zSeries Options.
+                                                             (line  112)
+* mno-div <1>:                           MCore Options.      (line   15)
+* mno-div:                               M680x0 Options.     (line  208)
+* mno-dlmzb:                             RS/6000 and PowerPC Options.
+                                                             (line  431)
+* mno-double:                            FRV Options.        (line   41)
+* mno-dsp:                               MIPS Options.       (line  256)
+* mno-dspr2:                             MIPS Options.       (line  262)
+* mno-dwarf2-asm:                        IA-64 Options.      (line   94)
+* mno-dword:                             FRV Options.        (line   35)
+* mno-eabi:                              RS/6000 and PowerPC Options.
+                                                             (line  630)
+* mno-early-stop-bits:                   IA-64 Options.      (line  100)
+* mno-eflags:                            FRV Options.        (line  125)
+* mno-embedded-data:                     MIPS Options.       (line  373)
+* mno-ep:                                V850 Options.       (line   16)
+* mno-epsilon:                           MMIX Options.       (line   15)
+* mno-explicit-relocs <1>:               MIPS Options.       (line  417)
+* mno-explicit-relocs:                   DEC Alpha Options.  (line  184)
+* mno-extern-sdata:                      MIPS Options.       (line  335)
+* mno-fancy-math-387:                    i386 and x86-64 Options.
+                                                             (line  242)
+* mno-faster-structs:                    SPARC Options.      (line   71)
+* mno-fix:                               DEC Alpha Options.  (line  171)
+* mno-fix-r10000:                        MIPS Options.       (line  503)
+* mno-fix-r4000:                         MIPS Options.       (line  482)
+* mno-fix-r4400:                         MIPS Options.       (line  496)
+* mno-float32:                           PDP-11 Options.     (line   48)
+* mno-float64:                           PDP-11 Options.     (line   52)
+* mno-flush-func:                        M32R/D Options.     (line   99)
+* mno-flush-trap:                        M32R/D Options.     (line   91)
+* mno-fp-in-toc:                         RS/6000 and PowerPC Options.
+                                                             (line  274)
+* mno-fp-regs:                           DEC Alpha Options.  (line   25)
+* mno-fp-ret-in-387:                     i386 and x86-64 Options.
+                                                             (line  232)
+* mno-fprnd:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-fpu:                               SPARC Options.      (line   25)
+* mno-fused-madd <1>:                    RS/6000 and PowerPC Options.
+                                                             (line  418)
+* mno-fused-madd <2>:                    MIPS Options.       (line  467)
+* mno-fused-madd <3>:                    Xtensa Options.     (line   19)
+* mno-fused-madd <4>:                    i386 and x86-64 Options.
+                                                             (line  467)
+* mno-fused-madd <5>:                    S/390 and zSeries Options.
+                                                             (line  137)
+* mno-fused-madd:                        IA-64 Options.      (line   88)
+* mno-gnu-as:                            IA-64 Options.      (line   18)
+* mno-gnu-ld:                            IA-64 Options.      (line   23)
+* mno-gotplt:                            CRIS Options.       (line   81)
+* mno-gpopt:                             MIPS Options.       (line  358)
+* mno-hard-dfp <1>:                      RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-hard-dfp:                          S/390 and zSeries Options.
+                                                             (line   20)
+* mno-hardlit:                           MCore Options.      (line   10)
+* mno-id-shared-library:                 Blackfin Options.   (line   84)
+* mno-ieee-fp:                           i386 and x86-64 Options.
+                                                             (line  215)
+* mno-inline-float-divide:               IA-64 Options.      (line   62)
+* mno-inline-int-divide:                 IA-64 Options.      (line   73)
+* mno-inline-sqrt:                       IA-64 Options.      (line   84)
+* mno-int16:                             PDP-11 Options.     (line   44)
+* mno-int32:                             PDP-11 Options.     (line   40)
+* mno-interlink-mips16:                  MIPS Options.       (line  117)
+* mno-interrupts:                        AVR Options.        (line   32)
+* mno-isel:                              RS/6000 and PowerPC Options.
+                                                             (line  217)
+* mno-knuthdiv:                          MMIX Options.       (line   33)
+* mno-leaf-id-shared-library:            Blackfin Options.   (line   94)
+* mno-libfuncs:                          MMIX Options.       (line   10)
+* mno-llsc:                              MIPS Options.       (line  242)
+* mno-local-sdata:                       MIPS Options.       (line  323)
+* mno-long-calls <1>:                    MIPS Options.       (line  453)
+* mno-long-calls <2>:                    HPPA Options.       (line  136)
+* mno-long-calls <3>:                    ARM Options.        (line  157)
+* mno-long-calls <4>:                    M68hc1x Options.    (line   35)
+* mno-long-calls <5>:                    Blackfin Options.   (line  117)
+* mno-long-calls:                        V850 Options.       (line   10)
+* mno-longcall:                          RS/6000 and PowerPC Options.
+                                                             (line  696)
+* mno-longcalls:                         Xtensa Options.     (line   67)
+* mno-low-64k:                           Blackfin Options.   (line   70)
+* mno-lsim <1>:                          MCore Options.      (line   46)
+* mno-lsim:                              FR30 Options.       (line   14)
+* mno-mad:                               MIPS Options.       (line  462)
+* mno-max:                               DEC Alpha Options.  (line  171)
+* mno-mcount-ra-address:                 MIPS Options.       (line  678)
+* mno-mdmx:                              MIPS Options.       (line  279)
+* mno-media:                             FRV Options.        (line   47)
+* mno-memcpy:                            MIPS Options.       (line  447)
+* mno-mfcrf:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-mfpgpr:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-mips16:                            MIPS Options.       (line  102)
+* mno-mips3d:                            MIPS Options.       (line  285)
+* mno-mmx:                               i386 and x86-64 Options.
+                                                             (line  443)
+* mno-mt:                                MIPS Options.       (line  290)
+* mno-mul-bug-workaround:                CRIS Options.       (line   31)
+* mno-muladd:                            FRV Options.        (line   53)
+* mno-mulhw:                             RS/6000 and PowerPC Options.
+                                                             (line  424)
+* mno-mult-bug:                          MN10300 Options.    (line   13)
+* mno-multi-cond-exec:                   FRV Options.        (line  183)
+* mno-multiple:                          RS/6000 and PowerPC Options.
+                                                             (line  377)
+* mno-mvcle:                             S/390 and zSeries Options.
+                                                             (line  105)
+* mno-nested-cond-exec:                  FRV Options.        (line  195)
+* mno-optimize-membar:                   FRV Options.        (line  205)
+* mno-opts:                              MeP Options.        (line   93)
+* mno-pack:                              FRV Options.        (line  122)
+* mno-packed-stack:                      S/390 and zSeries Options.
+                                                             (line   54)
+* mno-paired:                            RS/6000 and PowerPC Options.
+                                                             (line  231)
+* mno-paired-single:                     MIPS Options.       (line  273)
+* mno-pic:                               IA-64 Options.      (line   26)
+* mno-plt:                               MIPS Options.       (line  181)
+* mno-popcntb:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-popcntd:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-power:                             RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-power2:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc:                           RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc-gfxopt:                    RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc-gpopt:                     RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-powerpc64:                         RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mno-prolog-function:                   V850 Options.       (line   23)
+* mno-prologue-epilogue:                 CRIS Options.       (line   71)
+* mno-prototype:                         RS/6000 and PowerPC Options.
+                                                             (line  590)
+* mno-push-args:                         i386 and x86-64 Options.
+                                                             (line  562)
+* mno-red-zone:                          i386 and x86-64 Options.
+                                                             (line  644)
+* mno-register-names:                    IA-64 Options.      (line   37)
+* mno-regnames:                          RS/6000 and PowerPC Options.
+                                                             (line  690)
+* mno-relax-immediate:                   MCore Options.      (line   19)
+* mno-relocatable:                       RS/6000 and PowerPC Options.
+                                                             (line  455)
+* mno-relocatable-lib:                   RS/6000 and PowerPC Options.
+                                                             (line  463)
+* mno-rtd:                               M680x0 Options.     (line  261)
+* mno-scc:                               FRV Options.        (line  146)
+* mno-sched-ar-data-spec:                IA-64 Options.      (line  135)
+* mno-sched-ar-in-data-spec:             IA-64 Options.      (line  156)
+* mno-sched-br-data-spec:                IA-64 Options.      (line  128)
+* mno-sched-br-in-data-spec:             IA-64 Options.      (line  149)
+* mno-sched-control-spec:                IA-64 Options.      (line  142)
+* mno-sched-count-spec-in-critical-path: IA-64 Options.      (line  183)
+* mno-sched-in-control-spec:             IA-64 Options.      (line  163)
+* mno-sched-prefer-non-control-spec-insns: IA-64 Options.    (line  176)
+* mno-sched-prefer-non-data-spec-insns:  IA-64 Options.      (line  169)
+* mno-sched-prolog:                      ARM Options.        (line   32)
+* mno-sdata <1>:                         IA-64 Options.      (line   42)
+* mno-sdata:                             RS/6000 and PowerPC Options.
+                                                             (line  677)
+* mno-sep-data:                          Blackfin Options.   (line  112)
+* mno-serialize-volatile:                Xtensa Options.     (line   35)
+* mno-short:                             M680x0 Options.     (line  225)
+* mno-side-effects:                      CRIS Options.       (line   46)
+* mno-sim:                               RX Options.         (line   71)
+* mno-single-exit:                       MMIX Options.       (line   66)
+* mno-slow-bytes:                        MCore Options.      (line   35)
+* mno-small-exec:                        S/390 and zSeries Options.
+                                                             (line   80)
+* mno-smartmips:                         MIPS Options.       (line  269)
+* mno-soft-float:                        DEC Alpha Options.  (line   10)
+* mno-space-regs:                        HPPA Options.       (line   45)
+* mno-spe:                               RS/6000 and PowerPC Options.
+                                                             (line  226)
+* mno-specld-anomaly:                    Blackfin Options.   (line   52)
+* mno-split:                             PDP-11 Options.     (line   71)
+* mno-split-addresses:                   MIPS Options.       (line  411)
+* mno-sse:                               i386 and x86-64 Options.
+                                                             (line  443)
+* mno-stack-align:                       CRIS Options.       (line   55)
+* mno-stack-bias:                        SPARC Options.      (line  222)
+* mno-strict-align <1>:                  M680x0 Options.     (line  286)
+* mno-strict-align:                      RS/6000 and PowerPC Options.
+                                                             (line  450)
+* mno-string:                            RS/6000 and PowerPC Options.
+                                                             (line  388)
+* mno-sum-in-toc:                        RS/6000 and PowerPC Options.
+                                                             (line  274)
+* mno-swdiv:                             RS/6000 and PowerPC Options.
+                                                             (line  178)
+* mno-sym32:                             MIPS Options.       (line  308)
+* mno-target-align:                      Xtensa Options.     (line   54)
+* mno-text-section-literals:             Xtensa Options.     (line   42)
+* mno-tls-markers:                       RS/6000 and PowerPC Options.
+                                                             (line  729)
+* mno-toc:                               RS/6000 and PowerPC Options.
+                                                             (line  472)
+* mno-toplevel-symbols:                  MMIX Options.       (line   40)
+* mno-tpf-trace:                         S/390 and zSeries Options.
+                                                             (line  131)
+* mno-unaligned-doubles:                 SPARC Options.      (line   59)
+* mno-uninit-const-in-rodata:            MIPS Options.       (line  381)
+* mno-update:                            RS/6000 and PowerPC Options.
+                                                             (line  399)
+* mno-v8plus:                            SPARC Options.      (line  170)
+* mno-vis:                               SPARC Options.      (line  177)
+* mno-vliw-branch:                       FRV Options.        (line  170)
+* mno-volatile-asm-stop:                 IA-64 Options.      (line   32)
+* mno-vrsave:                            RS/6000 and PowerPC Options.
+                                                             (line  196)
+* mno-vsx:                               RS/6000 and PowerPC Options.
+                                                             (line  240)
+* mno-wide-bitfields:                    MCore Options.      (line   23)
+* mno-xgot <1>:                          MIPS Options.       (line  191)
+* mno-xgot:                              M680x0 Options.     (line  318)
+* mno-xl-compat:                         RS/6000 and PowerPC Options.
+                                                             (line  309)
+* mno-zero-extend:                       MMIX Options.       (line   27)
+* mnobitfield:                           M680x0 Options.     (line  230)
+* mnomacsave:                            SH Options.         (line  112)
+* mnominmax:                             M68hc1x Options.    (line   31)
+* mnop-fun-dllimport:                    i386 and x86-64 Windows Options.
+                                                             (line   36)
+* mold-mnemonics:                        RS/6000 and PowerPC Options.
+                                                             (line  104)
+* momit-leaf-frame-pointer <1>:          i386 and x86-64 Options.
+                                                             (line  610)
+* momit-leaf-frame-pointer:              Blackfin Options.   (line   40)
+* mone-byte-bool:                        Darwin Options.     (line   92)
+* moptimize-membar:                      FRV Options.        (line  201)
+* mor32-newlib:                          OpenRISC 1000 Options.
+                                                             (line   77)
+* mor32-newlib-uart:                     OpenRISC 1000 Options.
+                                                             (line   83)
+* MP:                                    Preprocessor Options.
+                                                             (line  227)
+* mpa-risc-1-0:                          HPPA Options.       (line   19)
+* mpa-risc-1-1:                          HPPA Options.       (line   19)
+* mpa-risc-2-0:                          HPPA Options.       (line   19)
+* mpack:                                 FRV Options.        (line  119)
+* mpacked-stack:                         S/390 and zSeries Options.
+                                                             (line   54)
+* mpadstruct:                            SH Options.         (line  138)
+* mpaired:                               RS/6000 and PowerPC Options.
+                                                             (line  231)
+* mpaired-single:                        MIPS Options.       (line  273)
+* mpc32:                                 i386 and x86-64 Options.
+                                                             (line  348)
+* mpc64:                                 i386 and x86-64 Options.
+                                                             (line  348)
+* mpc80:                                 i386 and x86-64 Options.
+                                                             (line  348)
+* mpcrel:                                M680x0 Options.     (line  278)
+* mpdebug:                               CRIS Options.       (line   35)
+* mpe:                                   RS/6000 and PowerPC Options.
+                                                             (line  329)
+* mpe-aligned-commons:                   i386 and x86-64 Windows Options.
+                                                             (line   67)
+* mpic-register:                         ARM Options.        (line  188)
+* mplt:                                  MIPS Options.       (line  181)
+* mpoke-function-name:                   ARM Options.        (line  202)
+* mpopcntb:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpopcntd:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mportable-runtime:                     HPPA Options.       (line   71)
+* mpower:                                RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpower2:                               RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc:                              RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc-gfxopt:                       RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc-gpopt:                        RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mpowerpc64:                            RS/6000 and PowerPC Options.
+                                                             (line   33)
+* mprefergot:                            SH Options.         (line  145)
+* mpreferred-stack-boundary:             i386 and x86-64 Options.
+                                                             (line  378)
+* mprioritize-restricted-insns:          RS/6000 and PowerPC Options.
+                                                             (line  495)
+* mprolog-function:                      V850 Options.       (line   23)
+* mprologue-epilogue:                    CRIS Options.       (line   71)
+* mprototype:                            RS/6000 and PowerPC Options.
+                                                             (line  590)
+* mpt-fixed:                             SH Options.         (line  232)
+* mpush-args <1>:                        i386 and x86-64 Options.
+                                                             (line  562)
+* mpush-args:                            CRX Options.        (line   13)
+* MQ:                                    Preprocessor Options.
+                                                             (line  253)
+* mr10k-cache-barrier:                   MIPS Options.       (line  540)
+* mrecip:                                i386 and x86-64 Options.
+                                                             (line  514)
+* mregister-names:                       IA-64 Options.      (line   37)
+* mregnames:                             RS/6000 and PowerPC Options.
+                                                             (line  690)
+* mregparm:                              i386 and x86-64 Options.
+                                                             (line  325)
+* mrelax <1>:                            H8/300 Options.     (line    9)
+* mrelax <2>:                            RX Options.         (line   95)
+* mrelax <3>:                            SH Options.         (line   86)
+* mrelax:                                MN10300 Options.    (line   34)
+* mrelax-immediate:                      MCore Options.      (line   19)
+* mrelax-pic-calls:                      MIPS Options.       (line  665)
+* mrelocatable:                          RS/6000 and PowerPC Options.
+                                                             (line  455)
+* mrelocatable-lib:                      RS/6000 and PowerPC Options.
+                                                             (line  463)
+* mrepeat:                               MeP Options.        (line   96)
+* mreturn-pointer-on-d0:                 MN10300 Options.    (line   24)
+* mrodata:                               ARC Options.        (line   30)
+* mror:                                  OpenRISC 1000 Options.
+                                                             (line   66)
+* mrtd <1>:                              i386 and x86-64 Options.
+                                                             (line  301)
+* mrtd <2>:                              M680x0 Options.     (line  239)
+* mrtd:                                  Function Attributes.
+                                                             (line  177)
+* mrtp:                                  VxWorks Options.    (line   11)
+* ms <1>:                                H8/300 Options.     (line   17)
+* ms:                                    MeP Options.        (line  100)
+* ms2600:                                H8/300 Options.     (line   24)
+* msafe-dma:                             SPU Options.        (line   17)
+* msafe-hints:                           SPU Options.        (line  107)
+* msahf:                                 i386 and x86-64 Options.
+                                                             (line  494)
+* msatur:                                MeP Options.        (line  105)
+* msave-acc-in-interrupts:               RX Options.         (line  109)
+* mscc:                                  FRV Options.        (line  140)
+* msched-ar-data-spec:                   IA-64 Options.      (line  135)
+* msched-ar-in-data-spec:                IA-64 Options.      (line  156)
+* msched-br-data-spec:                   IA-64 Options.      (line  128)
+* msched-br-in-data-spec:                IA-64 Options.      (line  149)
+* msched-control-spec:                   IA-64 Options.      (line  142)
+* msched-costly-dep:                     RS/6000 and PowerPC Options.
+                                                             (line  502)
+* msched-count-spec-in-critical-path:    IA-64 Options.      (line  183)
+* msched-fp-mem-deps-zero-cost:          IA-64 Options.      (line  200)
+* msched-in-control-spec:                IA-64 Options.      (line  163)
+* msched-max-memory-insns:               IA-64 Options.      (line  209)
+* msched-max-memory-insns-hard-limit:    IA-64 Options.      (line  215)
+* msched-prefer-non-control-spec-insns:  IA-64 Options.      (line  176)
+* msched-prefer-non-data-spec-insns:     IA-64 Options.      (line  169)
+* msched-spec-ldc:                       IA-64 Options.      (line  192)
+* msched-stop-bits-after-every-cycle:    IA-64 Options.      (line  196)
+* mschedule:                             HPPA Options.       (line   78)
+* mscore5:                               Score Options.      (line   25)
+* mscore5u:                              Score Options.      (line   28)
+* mscore7:                               Score Options.      (line   31)
+* mscore7d:                              Score Options.      (line   34)
+* msda:                                  V850 Options.       (line   40)
+* msdata <1>:                            RS/6000 and PowerPC Options.
+                                                             (line  664)
+* msdata:                                IA-64 Options.      (line   42)
+* msdata=data:                           RS/6000 and PowerPC Options.
+                                                             (line  669)
+* msdata=default:                        RS/6000 and PowerPC Options.
+                                                             (line  664)
+* msdata=eabi:                           RS/6000 and PowerPC Options.
+                                                             (line  644)
+* msdata=none <1>:                       M32R/D Options.     (line   40)
+* msdata=none:                           RS/6000 and PowerPC Options.
+                                                             (line  677)
+* msdata=sdata:                          M32R/D Options.     (line   49)
+* msdata=sysv:                           RS/6000 and PowerPC Options.
+                                                             (line  655)
+* msdata=use:                            M32R/D Options.     (line   53)
+* msdram <1>:                            MeP Options.        (line  110)
+* msdram:                                Blackfin Options.   (line  163)
+* msecure-plt:                           RS/6000 and PowerPC Options.
+                                                             (line  206)
+* msel-sched-dont-check-control-spec:    IA-64 Options.      (line  205)
+* msep-data:                             Blackfin Options.   (line  106)
+* mserialize-volatile:                   Xtensa Options.     (line   35)
+* msext:                                 OpenRISC 1000 Options.
+                                                             (line   50)
+* mshared-library-id:                    Blackfin Options.   (line   99)
+* mshort <1>:                            M680x0 Options.     (line  219)
+* mshort:                                M68hc1x Options.    (line   40)
+* msibcall:                              OpenRISC 1000 Options.
+                                                             (line   71)
+* msign-extend-enabled:                  LM32 Options.       (line   18)
+* msim <1>:                              MeP Options.        (line  114)
+* msim <2>:                              Xstormy16 Options.  (line    9)
+* msim <3>:                              M32C Options.       (line   13)
+* msim <4>:                              Blackfin Options.   (line   33)
+* msim <5>:                              RS/6000 and PowerPC Options.
+                                                             (line  600)
+* msim:                                  RX Options.         (line   71)
+* msimnovec:                             MeP Options.        (line  117)
+* msimple-fpu:                           RS/6000 and PowerPC Options.
+                                                             (line  362)
+* msingle-exit:                          MMIX Options.       (line   66)
+* msingle-float <1>:                     MIPS Options.       (line  233)
+* msingle-float:                         RS/6000 and PowerPC Options.
+                                                             (line  358)
+* msingle-pic-base:                      ARM Options.        (line  182)
+* msio:                                  HPPA Options.       (line  105)
+* mslow-bytes:                           MCore Options.      (line   35)
+* msmall-data:                           DEC Alpha Options.  (line  195)
+* msmall-data-limit:                     RX Options.         (line   48)
+* msmall-exec:                           S/390 and zSeries Options.
+                                                             (line   80)
+* msmall-mem:                            SPU Options.        (line   35)
+* msmall-model:                          FR30 Options.       (line    9)
+* msmall-text:                           DEC Alpha Options.  (line  213)
+* msmartmips:                            MIPS Options.       (line  269)
+* msoft-div:                             OpenRISC 1000 Options.
+                                                             (line   28)
+* msoft-float <1>:                       M680x0 Options.     (line  202)
+* msoft-float <2>:                       S/390 and zSeries Options.
+                                                             (line   11)
+* msoft-float <3>:                       SPARC Options.      (line   25)
+* msoft-float <4>:                       RS/6000 and PowerPC Options.
+                                                             (line  352)
+* msoft-float <5>:                       ARM Options.        (line   60)
+* msoft-float <6>:                       PDP-11 Options.     (line   13)
+* msoft-float <7>:                       OpenRISC 1000 Options.
+                                                             (line   13)
+* msoft-float <8>:                       MIPS Options.       (line  229)
+* msoft-float <9>:                       i386 and x86-64 Options.
+                                                             (line  220)
+* msoft-float <10>:                      HPPA Options.       (line   91)
+* msoft-float <11>:                      FRV Options.        (line   22)
+* msoft-float:                           DEC Alpha Options.  (line   10)
+* msoft-mul:                             OpenRISC 1000 Options.
+                                                             (line   40)
+* msoft-quad-float:                      SPARC Options.      (line   45)
+* msoft-reg-count:                       M68hc1x Options.    (line   43)
+* mspace <1>:                            V850 Options.       (line   30)
+* mspace:                                SH Options.         (line  142)
+* mspe:                                  RS/6000 and PowerPC Options.
+                                                             (line  226)
+* mspecld-anomaly:                       Blackfin Options.   (line   47)
+* msplit:                                PDP-11 Options.     (line   68)
+* msplit-addresses:                      MIPS Options.       (line  411)
+* msse:                                  i386 and x86-64 Options.
+                                                             (line  443)
+* msse2avx:                              i386 and x86-64 Options.
+                                                             (line  628)
+* msseregparm:                           i386 and x86-64 Options.
+                                                             (line  336)
+* mstack-align:                          CRIS Options.       (line   55)
+* mstack-bias:                           SPARC Options.      (line  222)
+* mstack-check-l1:                       Blackfin Options.   (line   73)
+* mstack-guard:                          S/390 and zSeries Options.
+                                                             (line  156)
+* mstack-increment:                      MCore Options.      (line   50)
+* mstack-size:                           S/390 and zSeries Options.
+                                                             (line  156)
+* mstackrealign:                         i386 and x86-64 Options.
+                                                             (line  369)
+* mstdmain:                              SPU Options.        (line   40)
+* mstrict-align <1>:                     M680x0 Options.     (line  286)
+* mstrict-align:                         RS/6000 and PowerPC Options.
+                                                             (line  450)
+* mstring:                               RS/6000 and PowerPC Options.
+                                                             (line  388)
+* mstringop-strategy=ALG:                i386 and x86-64 Options.
+                                                             (line  602)
+* mstructure-size-boundary:              ARM Options.        (line  137)
+* msvr4-struct-return:                   RS/6000 and PowerPC Options.
+                                                             (line  564)
+* mswdiv:                                RS/6000 and PowerPC Options.
+                                                             (line  178)
+* msym32:                                MIPS Options.       (line  308)
+* msynci:                                MIPS Options.       (line  650)
+* MT:                                    Preprocessor Options.
+                                                             (line  239)
+* mtarget-align:                         Xtensa Options.     (line   54)
+* mtda:                                  V850 Options.       (line   34)
+* mtext:                                 ARC Options.        (line   30)
+* mtext-section-literals:                Xtensa Options.     (line   42)
+* mtf:                                   MeP Options.        (line  121)
+* mthread:                               i386 and x86-64 Windows Options.
+                                                             (line   40)
+* mthreads:                              i386 and x86-64 Options.
+                                                             (line  577)
+* mthumb:                                ARM Options.        (line  223)
+* mthumb-interwork:                      ARM Options.        (line   25)
+* mtiny-stack:                           AVR Options.        (line   40)
+* mtiny=:                                MeP Options.        (line  125)
+* mtls:                                  FRV Options.        (line   75)
+* mTLS:                                  FRV Options.        (line   72)
+* mtls-direct-seg-refs:                  i386 and x86-64 Options.
+                                                             (line  618)
+* mtls-markers:                          RS/6000 and PowerPC Options.
+                                                             (line  729)
+* mtls-size:                             IA-64 Options.      (line  112)
+* mtoc:                                  RS/6000 and PowerPC Options.
+                                                             (line  472)
+* mtomcat-stats:                         FRV Options.        (line  209)
+* mtoplevel-symbols:                     MMIX Options.       (line   40)
+* mtp:                                   ARM Options.        (line  260)
+* mtpcs-frame:                           ARM Options.        (line  233)
+* mtpcs-leaf-frame:                      ARM Options.        (line  239)
+* mtpf-trace:                            S/390 and zSeries Options.
+                                                             (line  131)
+* mtrap-precision:                       DEC Alpha Options.  (line  109)
+* mtune <1>:                             ARM Options.        (line   97)
+* mtune <2>:                             CRIS Options.       (line   16)
+* mtune <3>:                             S/390 and zSeries Options.
+                                                             (line  124)
+* mtune <4>:                             i386 and x86-64 Options.
+                                                             (line   10)
+* mtune <5>:                             MIPS Options.       (line   62)
+* mtune <6>:                             IA-64 Options.      (line  116)
+* mtune <7>:                             SPARC Options.      (line  158)
+* mtune <8>:                             M680x0 Options.     (line   69)
+* mtune <9>:                             DEC Alpha Options.  (line  267)
+* mtune:                                 RS/6000 and PowerPC Options.
+                                                             (line  168)
+* muclibc:                               GNU/Linux Options.  (line   13)
+* muls:                                  Score Options.      (line   18)
+* multcost=NUMBER:                       SH Options.         (line  155)
+* multi_module:                          Darwin Options.     (line  199)
+* multilib-library-pic:                  FRV Options.        (line   89)
+* multiply-enabled:                      LM32 Options.       (line   15)
+* multiply_defined:                      Darwin Options.     (line  199)
+* multiply_defined_unused:               Darwin Options.     (line  199)
+* munaligned-doubles:                    SPARC Options.      (line   59)
+* municode:                              i386 and x86-64 Windows Options.
+                                                             (line   44)
+* muninit-const-in-rodata:               MIPS Options.       (line  381)
+* munix:                                 VAX Options.        (line    9)
+* munix-asm:                             PDP-11 Options.     (line   74)
+* munsafe-dma:                           SPU Options.        (line   17)
+* mupdate:                               RS/6000 and PowerPC Options.
+                                                             (line  399)
+* muser-enabled:                         LM32 Options.       (line   21)
+* musermode:                             SH Options.         (line  150)
+* mv850:                                 V850 Options.       (line   49)
+* mv850e:                                V850 Options.       (line   69)
+* mv850e1:                               V850 Options.       (line   64)
+* mv8plus:                               SPARC Options.      (line  170)
+* mveclibabi:                            i386 and x86-64 Options.
+                                                             (line  531)
+* mvis:                                  SPARC Options.      (line  177)
+* mvliw-branch:                          FRV Options.        (line  164)
+* mvms-return-codes <1>:                 IA-64/VMS Options.  (line    9)
+* mvms-return-codes:                     DEC Alpha/VMS Options.
+                                                             (line    9)
+* mvolatile-asm-stop:                    IA-64 Options.      (line   32)
+* mvr4130-align:                         MIPS Options.       (line  639)
+* mvrsave:                               RS/6000 and PowerPC Options.
+                                                             (line  196)
+* mvsx:                                  RS/6000 and PowerPC Options.
+                                                             (line  240)
+* mvxworks:                              RS/6000 and PowerPC Options.
+                                                             (line  621)
+* mwarn-cell-microcode:                  RS/6000 and PowerPC Options.
+                                                             (line  202)
+* mwarn-dynamicstack:                    S/390 and zSeries Options.
+                                                             (line  150)
+* mwarn-framesize:                       S/390 and zSeries Options.
+                                                             (line  142)
+* mwarn-reloc:                           SPU Options.        (line   10)
+* mwide-bitfields:                       MCore Options.      (line   23)
+* mwin32:                                i386 and x86-64 Windows Options.
+                                                             (line   49)
+* mwindows:                              i386 and x86-64 Windows Options.
+                                                             (line   55)
+* mword-relocations:                     ARM Options.        (line  268)
+* mwords-little-endian:                  ARM Options.        (line   71)
+* mxgot <1>:                             MIPS Options.       (line  191)
+* mxgot:                                 M680x0 Options.     (line  318)
+* mxilinx-fpu:                           RS/6000 and PowerPC Options.
+                                                             (line  372)
+* mxl-compat:                            RS/6000 and PowerPC Options.
+                                                             (line  309)
+* myellowknife:                          RS/6000 and PowerPC Options.
+                                                             (line  616)
+* mzarch:                                S/390 and zSeries Options.
+                                                             (line   95)
+* mzda:                                  V850 Options.       (line   45)
+* mzero-extend:                          MMIX Options.       (line   27)
+* no-canonical-prefixes:                 Overall Options.    (line  348)
+* no-integrated-cpp:                     C Dialect Options.  (line  243)
+* no_dead_strip_inits_and_terms:         Darwin Options.     (line  199)
+* noall_load:                            Darwin Options.     (line  199)
+* nocpp:                                 MIPS Options.       (line  477)
+* nodefaultlibs:                         Link Options.       (line   62)
+* nofixprebinding:                       Darwin Options.     (line  199)
+* nofpu:                                 RX Options.         (line   17)
+* nolibdld:                              HPPA Options.       (line  188)
+* nomultidefs:                           Darwin Options.     (line  199)
+* non-static:                            VxWorks Options.    (line   16)
+* noprebind:                             Darwin Options.     (line  199)
+* noseglinkedit:                         Darwin Options.     (line  199)
+* nostartfiles:                          Link Options.       (line   57)
+* nostdinc:                              Preprocessor Options.
+                                                             (line  377)
+* nostdinc++ <1>:                        C++ Dialect Options.
+                                                             (line  292)
+* nostdinc++:                            Preprocessor Options.
+                                                             (line  382)
+* nostdlib:                              Link Options.       (line   73)
+* o <1>:                                 Overall Options.    (line  187)
+* o:                                     Preprocessor Options.
+                                                             (line   75)
+* O:                                     Optimize Options.   (line   39)
+* O0:                                    Optimize Options.   (line  120)
+* O1:                                    Optimize Options.   (line   39)
+* O2:                                    Optimize Options.   (line   79)
+* O3:                                    Optimize Options.   (line  114)
+* Os:                                    Optimize Options.   (line  124)
+* P:                                     Preprocessor Options.
+                                                             (line  593)
+* p:                                     Debugging Options.  (line  291)
+* pagezero_size:                         Darwin Options.     (line  199)
+* param:                                 Optimize Options.   (line 2044)
+* pass-exit-codes:                       Overall Options.    (line  145)
+* pedantic <1>:                          Preprocessor Options.
+                                                             (line  163)
+* pedantic <2>:                          Standards.          (line   16)
+* pedantic <3>:                          Alternate Keywords. (line   29)
+* pedantic <4>:                          C Extensions.       (line    6)
+* pedantic <5>:                          Warning Options.    (line   53)
+* pedantic:                              Warnings and Errors.
+                                                             (line   25)
+* pedantic-errors <1>:                   Warnings and Errors.
+                                                             (line   25)
+* pedantic-errors <2>:                   Non-bugs.           (line  216)
+* pedantic-errors <3>:                   Standards.          (line   16)
+* pedantic-errors <4>:                   Preprocessor Options.
+                                                             (line  168)
+* pedantic-errors:                       Warning Options.    (line   95)
+* pg:                                    Debugging Options.  (line  297)
+* pie:                                   Link Options.       (line   95)
+* pipe:                                  Overall Options.    (line  209)
+* prebind:                               Darwin Options.     (line  199)
+* prebind_all_twolevel_modules:          Darwin Options.     (line  199)
+* print-file-name:                       Debugging Options.  (line 1038)
+* print-libgcc-file-name:                Debugging Options.  (line 1068)
+* print-multi-directory:                 Debugging Options.  (line 1044)
+* print-multi-lib:                       Debugging Options.  (line 1049)
+* print-multi-os-directory:              Debugging Options.  (line 1056)
+* print-objc-runtime-info:               Objective-C and Objective-C++ Dialect Options.
+                                                             (line  244)
+* print-prog-name:                       Debugging Options.  (line 1065)
+* print-search-dirs:                     Debugging Options.  (line 1076)
+* print-sysroot:                         Debugging Options.  (line 1089)
+* print-sysroot-headers-suffix:          Debugging Options.  (line 1096)
+* private_bundle:                        Darwin Options.     (line  199)
+* pthread <1>:                           RS/6000 and PowerPC Options.
+                                                             (line  736)
+* pthread:                               SPARC Options.      (line  242)
+* pthreads:                              SPARC Options.      (line  236)
+* Q:                                     Debugging Options.  (line  303)
+* Qn:                                    System V Options.   (line   18)
+* Qy:                                    System V Options.   (line   14)
+* rdynamic:                              Link Options.       (line  101)
+* read_only_relocs:                      Darwin Options.     (line  199)
+* remap:                                 Preprocessor Options.
+                                                             (line  641)
+* S:                                     Overall Options.    (line  170)
+* s:                                     Link Options.       (line  108)
+* S:                                     Link Options.       (line   20)
+* save-temps:                            Debugging Options.  (line  946)
+* save-temps=obj:                        Debugging Options.  (line  972)
+* sectalign:                             Darwin Options.     (line  199)
+* sectcreate:                            Darwin Options.     (line  199)
+* sectobjectsymbols:                     Darwin Options.     (line  199)
+* sectorder:                             Darwin Options.     (line  199)
+* seg1addr:                              Darwin Options.     (line  199)
+* seg_addr_table:                        Darwin Options.     (line  199)
+* seg_addr_table_filename:               Darwin Options.     (line  199)
+* segaddr:                               Darwin Options.     (line  199)
+* seglinkedit:                           Darwin Options.     (line  199)
+* segprot:                               Darwin Options.     (line  199)
+* segs_read_only_addr:                   Darwin Options.     (line  199)
+* segs_read_write_addr:                  Darwin Options.     (line  199)
+* shared:                                Link Options.       (line  117)
+* shared-libgcc:                         Link Options.       (line  125)
+* sim:                                   CRIS Options.       (line   95)
+* sim2:                                  CRIS Options.       (line  101)
+* single_module:                         Darwin Options.     (line  199)
+* specs:                                 Directory Options.  (line   84)
+* static <1>:                            Link Options.       (line  112)
+* static <2>:                            HPPA Options.       (line  192)
+* static:                                Darwin Options.     (line  199)
+* static-libgcc:                         Link Options.       (line  125)
+* std <1>:                               Standards.          (line   16)
+* std <2>:                               Other Builtins.     (line   22)
+* std <3>:                               C Dialect Options.  (line   47)
+* std:                                   Non-bugs.           (line  107)
+* std=:                                  Preprocessor Options.
+                                                             (line  326)
+* sub_library:                           Darwin Options.     (line  199)
+* sub_umbrella:                          Darwin Options.     (line  199)
+* symbolic:                              Link Options.       (line  172)
+* sysroot:                               Directory Options.  (line   92)
+* T:                                     Link Options.       (line  178)
+* target-help <1>:                       Preprocessor Options.
+                                                             (line  646)
+* target-help:                           Overall Options.    (line  240)
+* threads <1>:                           HPPA Options.       (line  205)
+* threads:                               SPARC Options.      (line  230)
+* time:                                  Debugging Options.  (line  987)
+* traditional <1>:                       Incompatibilities.  (line    6)
+* traditional:                           C Dialect Options.  (line  255)
+* traditional-cpp <1>:                   Preprocessor Options.
+                                                             (line  624)
+* traditional-cpp:                       C Dialect Options.  (line  255)
+* trigraphs <1>:                         C Dialect Options.  (line  239)
+* trigraphs:                             Preprocessor Options.
+                                                             (line  628)
+* twolevel_namespace:                    Darwin Options.     (line  199)
+* u:                                     Link Options.       (line  211)
+* U:                                     Preprocessor Options.
+                                                             (line   57)
+* umbrella:                              Darwin Options.     (line  199)
+* undef:                                 Preprocessor Options.
+                                                             (line   61)
+* undefined:                             Darwin Options.     (line  199)
+* unexported_symbols_list:               Darwin Options.     (line  199)
+* v:                                     Preprocessor Options.
+                                                             (line  650)
+* V:                                     Target Options.     (line   25)
+* v:                                     Overall Options.    (line  198)
+* version <1>:                           Preprocessor Options.
+                                                             (line  663)
+* version:                               Overall Options.    (line  352)
+* W:                                     Incompatibilities.  (line   64)
+* w:                                     Preprocessor Options.
+                                                             (line  159)
+* W:                                     Warning Options.    (line 1167)
+* w:                                     Warning Options.    (line   18)
+* Wa:                                    Assembler Options.  (line    9)
+* Wabi:                                  C++ Dialect Options.
+                                                             (line  306)
+* Waddress:                              Warning Options.    (line  988)
+* Waggregate-return:                     Warning Options.    (line 1006)
+* Wall <1>:                              Warning Options.    (line   99)
+* Wall <2>:                              Standard Libraries. (line    6)
+* Wall:                                  Preprocessor Options.
+                                                             (line   81)
+* Warray-bounds:                         Warning Options.    (line  700)
+* Wassign-intercept:                     Objective-C and Objective-C++ Dialect Options.
+                                                             (line  198)
+* Wattributes:                           Warning Options.    (line 1011)
+* Wbad-function-cast:                    Warning Options.    (line  878)
+* Wbuiltin-macro-redefined:              Warning Options.    (line 1017)
+* Wcast-align:                           Warning Options.    (line  909)
+* Wcast-qual:                            Warning Options.    (line  893)
+* Wchar-subscripts:                      Warning Options.    (line  185)
+* Wclobbered:                            Warning Options.    (line  929)
+* Wcomment <1>:                          Preprocessor Options.
+                                                             (line   89)
+* Wcomment:                              Warning Options.    (line  190)
+* Wcomments:                             Preprocessor Options.
+                                                             (line   89)
+* Wconversion:                           Warning Options.    (line  933)
+* Wconversion-null:                      Warning Options.    (line  951)
+* Wcoverage-mismatch:                    Language Independent Options.
+                                                             (line   42)
+* Wctor-dtor-privacy:                    C++ Dialect Options.
+                                                             (line  416)
+* Wdeclaration-after-statement:          Warning Options.    (line  821)
+* Wdeprecated:                           Warning Options.    (line 1154)
+* Wdeprecated-declarations:              Warning Options.    (line 1158)
+* Wdisabled-optimization:                Warning Options.    (line 1284)
+* Wdiv-by-zero:                          Warning Options.    (line  705)
+* weak_reference_mismatches:             Darwin Options.     (line  199)
+* Weffc++:                               C++ Dialect Options.
+                                                             (line  443)
+* Wempty-body:                           Warning Options.    (line  955)
+* Wendif-labels <1>:                     Warning Options.    (line  831)
+* Wendif-labels:                         Preprocessor Options.
+                                                             (line  136)
+* Wenum-compare:                         Warning Options.    (line  959)
+* Werror <1>:                            Preprocessor Options.
+                                                             (line  149)
+* Werror:                                Warning Options.    (line   21)
+* Werror=:                               Warning Options.    (line   24)
+* Wextra:                                Warning Options.    (line  147)
+* Wfatal-errors:                         Warning Options.    (line   38)
+* Wfloat-equal:                          Warning Options.    (line  721)
+* Wformat <1>:                           Function Attributes.
+                                                             (line  398)
+* Wformat:                               Warning Options.    (line  195)
+* Wformat-contains-nul:                  Warning Options.    (line  234)
+* Wformat-extra-args:                    Warning Options.    (line  238)
+* Wformat-nonliteral <1>:                Function Attributes.
+                                                             (line  457)
+* Wformat-nonliteral:                    Warning Options.    (line  256)
+* Wformat-security:                      Warning Options.    (line  261)
+* Wformat-y2k:                           Warning Options.    (line  230)
+* Wformat-zero-length:                   Warning Options.    (line  252)
+* Wformat=2:                             Warning Options.    (line  272)
+* Wframe-larger-than:                    Warning Options.    (line  843)
+* whatsloaded:                           Darwin Options.     (line  199)
+* whyload:                               Darwin Options.     (line  199)
+* Wignored-qualifiers:                   Warning Options.    (line  311)
+* Wimplicit:                             Warning Options.    (line  307)
+* Wimplicit-function-declaration:        Warning Options.    (line  301)
+* Wimplicit-int:                         Warning Options.    (line  297)
+* Winit-self:                            Warning Options.    (line  284)
+* Winline <1>:                           Inline.             (line   63)
+* Winline:                               Warning Options.    (line 1224)
+* Wint-to-pointer-cast:                  Warning Options.    (line 1251)
+* Winvalid-offsetof:                     Warning Options.    (line 1237)
+* Winvalid-pch:                          Warning Options.    (line 1259)
+* Wjump-misses-init:                     Warning Options.    (line  964)
+* Wl:                                    Link Options.       (line  203)
+* Wlarger-than-LEN:                      Warning Options.    (line  840)
+* Wlarger-than=LEN:                      Warning Options.    (line  840)
+* Wlogical-op:                           Warning Options.    (line 1001)
+* Wlong-long:                            Warning Options.    (line 1263)
+* Wmain:                                 Warning Options.    (line  322)
+* Wmissing-braces:                       Warning Options.    (line  329)
+* Wmissing-declarations:                 Warning Options.    (line 1052)
+* Wmissing-field-initializers:           Warning Options.    (line 1060)
+* Wmissing-format-attribute:             Warning Options.    (line 1086)
+* Wmissing-include-dirs:                 Warning Options.    (line  339)
+* Wmissing-noreturn:                     Warning Options.    (line 1078)
+* Wmissing-parameter-type:               Warning Options.    (line 1038)
+* Wmissing-prototypes:                   Warning Options.    (line 1046)
+* Wmultichar:                            Warning Options.    (line 1105)
+* Wnested-externs:                       Warning Options.    (line 1221)
+* Wno-abi:                               C++ Dialect Options.
+                                                             (line  306)
+* Wno-address:                           Warning Options.    (line  988)
+* Wno-aggregate-return:                  Warning Options.    (line 1006)
+* Wno-all:                               Warning Options.    (line   99)
+* Wno-array-bounds:                      Warning Options.    (line  700)
+* Wno-assign-intercept:                  Objective-C and Objective-C++ Dialect Options.
+                                                             (line  198)
+* Wno-attributes:                        Warning Options.    (line 1011)
+* Wno-bad-function-cast:                 Warning Options.    (line  878)
+* Wno-builtin-macro-redefined:           Warning Options.    (line 1017)
+* Wno-cast-align:                        Warning Options.    (line  909)
+* Wno-cast-qual:                         Warning Options.    (line  893)
+* Wno-char-subscripts:                   Warning Options.    (line  185)
+* Wno-clobbered:                         Warning Options.    (line  929)
+* Wno-comment:                           Warning Options.    (line  190)
+* Wno-conversion:                        Warning Options.    (line  933)
+* Wno-conversion-null:                   Warning Options.    (line  951)
+* Wno-ctor-dtor-privacy:                 C++ Dialect Options.
+                                                             (line  416)
+* Wno-declaration-after-statement:       Warning Options.    (line  821)
+* Wno-deprecated:                        Warning Options.    (line 1154)
+* Wno-deprecated-declarations:           Warning Options.    (line 1158)
+* Wno-disabled-optimization:             Warning Options.    (line 1284)
+* Wno-div-by-zero:                       Warning Options.    (line  705)
+* Wno-effc++:                            C++ Dialect Options.
+                                                             (line  443)
+* Wno-empty-body:                        Warning Options.    (line  955)
+* Wno-endif-labels:                      Warning Options.    (line  831)
+* Wno-enum-compare:                      Warning Options.    (line  959)
+* Wno-error:                             Warning Options.    (line   21)
+* Wno-error=:                            Warning Options.    (line   24)
+* Wno-extra:                             Warning Options.    (line 1060)
+* Wno-fatal-errors:                      Warning Options.    (line   38)
+* Wno-float-equal:                       Warning Options.    (line  721)
+* Wno-format:                            Warning Options.    (line  195)
+* Wno-format-contains-nul:               Warning Options.    (line  234)
+* Wno-format-extra-args:                 Warning Options.    (line  238)
+* Wno-format-nonliteral:                 Warning Options.    (line  256)
+* Wno-format-security:                   Warning Options.    (line  261)
+* Wno-format-y2k:                        Warning Options.    (line  230)
+* Wno-format-zero-length:                Warning Options.    (line  252)
+* Wno-format=2:                          Warning Options.    (line  272)
+* Wno-ignored-qualifiers:                Warning Options.    (line  311)
+* Wno-implicit:                          Warning Options.    (line  307)
+* Wno-implicit-function-declaration:     Warning Options.    (line  301)
+* Wno-implicit-int:                      Warning Options.    (line  297)
+* Wno-init-self:                         Warning Options.    (line  284)
+* Wno-inline:                            Warning Options.    (line 1224)
+* Wno-int-to-pointer-cast:               Warning Options.    (line 1251)
+* Wno-invalid-offsetof:                  Warning Options.    (line 1237)
+* Wno-invalid-pch:                       Warning Options.    (line 1259)
+* Wno-jump-misses-init:                  Warning Options.    (line  964)
+* Wno-logical-op:                        Warning Options.    (line 1001)
+* Wno-long-long:                         Warning Options.    (line 1263)
+* Wno-main:                              Warning Options.    (line  322)
+* Wno-missing-braces:                    Warning Options.    (line  329)
+* Wno-missing-declarations:              Warning Options.    (line 1052)
+* Wno-missing-field-initializers:        Warning Options.    (line 1060)
+* Wno-missing-format-attribute:          Warning Options.    (line 1086)
+* Wno-missing-include-dirs:              Warning Options.    (line  339)
+* Wno-missing-noreturn:                  Warning Options.    (line 1078)
+* Wno-missing-parameter-type:            Warning Options.    (line 1038)
+* Wno-missing-prototypes:                Warning Options.    (line 1046)
+* Wno-mudflap:                           Warning Options.    (line 1304)
+* Wno-multichar:                         Warning Options.    (line 1105)
+* Wno-nested-externs:                    Warning Options.    (line 1221)
+* Wno-non-template-friend:               C++ Dialect Options.
+                                                             (line  480)
+* Wno-non-virtual-dtor:                  C++ Dialect Options.
+                                                             (line  421)
+* Wno-nonnull:                           Warning Options.    (line  277)
+* Wno-old-style-cast:                    C++ Dialect Options.
+                                                             (line  496)
+* Wno-old-style-declaration:             Warning Options.    (line 1028)
+* Wno-old-style-definition:              Warning Options.    (line 1034)
+* Wno-overflow:                          Warning Options.    (line 1164)
+* Wno-overlength-strings:                Warning Options.    (line 1308)
+* Wno-overloaded-virtual:                C++ Dialect Options.
+                                                             (line  502)
+* Wno-override-init:                     Warning Options.    (line 1167)
+* Wno-packed:                            Warning Options.    (line 1175)
+* Wno-packed-bitfield-compat:            Warning Options.    (line 1192)
+* Wno-padded:                            Warning Options.    (line 1209)
+* Wno-parentheses:                       Warning Options.    (line  342)
+* Wno-pedantic-ms-format:                Warning Options.    (line  858)
+* Wno-pmf-conversions <1>:               C++ Dialect Options.
+                                                             (line  521)
+* Wno-pmf-conversions:                   Bound member functions.
+                                                             (line   35)
+* Wno-pointer-arith:                     Warning Options.    (line  864)
+* Wno-pointer-sign:                      Warning Options.    (line 1293)
+* Wno-pointer-to-int-cast:               Warning Options.    (line 1255)
+* Wno-pragmas:                           Warning Options.    (line  603)
+* Wno-protocol:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line  202)
+* Wno-redundant-decls:                   Warning Options.    (line 1216)
+* Wno-reorder:                           C++ Dialect Options.
+                                                             (line  427)
+* Wno-return-type:                       Warning Options.    (line  432)
+* Wno-selector:                          Objective-C and Objective-C++ Dialect Options.
+                                                             (line  212)
+* Wno-sequence-point:                    Warning Options.    (line  386)
+* Wno-shadow:                            Warning Options.    (line  835)
+* Wno-sign-compare:                      Warning Options.    (line  975)
+* Wno-sign-conversion:                   Warning Options.    (line  982)
+* Wno-sign-promo:                        C++ Dialect Options.
+                                                             (line  525)
+* Wno-stack-protector:                   Warning Options.    (line 1299)
+* Wno-strict-aliasing:                   Warning Options.    (line  608)
+* Wno-strict-aliasing=n:                 Warning Options.    (line  616)
+* Wno-strict-null-sentinel:              C++ Dialect Options.
+                                                             (line  473)
+* Wno-strict-overflow:                   Warning Options.    (line  649)
+* Wno-strict-prototypes:                 Warning Options.    (line 1022)
+* Wno-strict-selector-match:             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  224)
+* Wno-switch:                            Warning Options.    (line  447)
+* Wno-switch-default:                    Warning Options.    (line  455)
+* Wno-switch-enum:                       Warning Options.    (line  458)
+* Wno-sync-nand:                         Warning Options.    (line  467)
+* Wno-system-headers:                    Warning Options.    (line  710)
+* Wno-traditional:                       Warning Options.    (line  736)
+* Wno-traditional-conversion:            Warning Options.    (line  813)
+* Wno-trigraphs:                         Warning Options.    (line  472)
+* Wno-type-limits:                       Warning Options.    (line  871)
+* Wno-undeclared-selector:               Objective-C and Objective-C++ Dialect Options.
+                                                             (line  232)
+* Wno-undef:                             Warning Options.    (line  828)
+* Wno-uninitialized:                     Warning Options.    (line  526)
+* Wno-unknown-pragmas:                   Warning Options.    (line  596)
+* Wno-unsafe-loop-optimizations:         Warning Options.    (line  852)
+* Wno-unused:                            Warning Options.    (line  519)
+* Wno-unused-function:                   Warning Options.    (line  477)
+* Wno-unused-label:                      Warning Options.    (line  482)
+* Wno-unused-parameter:                  Warning Options.    (line  489)
+* Wno-unused-result:                     Warning Options.    (line  496)
+* Wno-unused-value:                      Warning Options.    (line  509)
+* Wno-unused-variable:                   Warning Options.    (line  501)
+* Wno-variadic-macros:                   Warning Options.    (line 1268)
+* Wno-vla:                               Warning Options.    (line 1274)
+* Wno-volatile-register-var:             Warning Options.    (line 1278)
+* Wno-write-strings:                     Warning Options.    (line  915)
+* Wnon-template-friend:                  C++ Dialect Options.
+                                                             (line  480)
+* Wnon-virtual-dtor:                     C++ Dialect Options.
+                                                             (line  421)
+* Wnonnull:                              Warning Options.    (line  277)
+* Wnormalized=:                          Warning Options.    (line 1111)
+* Wold-style-cast:                       C++ Dialect Options.
+                                                             (line  496)
+* Wold-style-declaration:                Warning Options.    (line 1028)
+* Wold-style-definition:                 Warning Options.    (line 1034)
+* Woverflow:                             Warning Options.    (line 1164)
+* Woverlength-strings:                   Warning Options.    (line 1308)
+* Woverloaded-virtual:                   C++ Dialect Options.
+                                                             (line  502)
+* Woverride-init:                        Warning Options.    (line 1167)
+* Wp:                                    Preprocessor Options.
+                                                             (line   14)
+* Wpacked:                               Warning Options.    (line 1175)
+* Wpacked-bitfield-compat:               Warning Options.    (line 1192)
+* Wpadded:                               Warning Options.    (line 1209)
+* Wparentheses:                          Warning Options.    (line  342)
+* Wpedantic-ms-format:                   Warning Options.    (line  858)
+* Wpmf-conversions:                      C++ Dialect Options.
+                                                             (line  521)
+* Wpointer-arith <1>:                    Pointer Arith.      (line   13)
+* Wpointer-arith:                        Warning Options.    (line  864)
+* Wpointer-sign:                         Warning Options.    (line 1293)
+* Wpointer-to-int-cast:                  Warning Options.    (line 1255)
+* Wpragmas:                              Warning Options.    (line  603)
+* Wprotocol:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  202)
+* wrapper:                               Overall Options.    (line  355)
+* Wredundant-decls:                      Warning Options.    (line 1216)
+* Wreorder:                              C++ Dialect Options.
+                                                             (line  427)
+* Wreturn-type:                          Warning Options.    (line  432)
+* Wselector:                             Objective-C and Objective-C++ Dialect Options.
+                                                             (line  212)
+* Wsequence-point:                       Warning Options.    (line  386)
+* Wshadow:                               Warning Options.    (line  835)
+* Wsign-compare:                         Warning Options.    (line  975)
+* Wsign-conversion:                      Warning Options.    (line  982)
+* Wsign-promo:                           C++ Dialect Options.
+                                                             (line  525)
+* Wstack-protector:                      Warning Options.    (line 1299)
+* Wstrict-aliasing:                      Warning Options.    (line  608)
+* Wstrict-aliasing=n:                    Warning Options.    (line  616)
+* Wstrict-null-sentinel:                 C++ Dialect Options.
+                                                             (line  473)
+* Wstrict-overflow:                      Warning Options.    (line  649)
+* Wstrict-prototypes:                    Warning Options.    (line 1022)
+* Wstrict-selector-match:                Objective-C and Objective-C++ Dialect Options.
+                                                             (line  224)
+* Wswitch:                               Warning Options.    (line  447)
+* Wswitch-default:                       Warning Options.    (line  455)
+* Wswitch-enum:                          Warning Options.    (line  458)
+* Wsync-nand:                            Warning Options.    (line  467)
+* Wsystem-headers <1>:                   Preprocessor Options.
+                                                             (line  153)
+* Wsystem-headers:                       Warning Options.    (line  710)
+* Wtraditional <1>:                      Warning Options.    (line  736)
+* Wtraditional:                          Preprocessor Options.
+                                                             (line  106)
+* Wtraditional-conversion:               Warning Options.    (line  813)
+* Wtrigraphs <1>:                        Preprocessor Options.
+                                                             (line   94)
+* Wtrigraphs:                            Warning Options.    (line  472)
+* Wtype-limits:                          Warning Options.    (line  871)
+* Wundeclared-selector:                  Objective-C and Objective-C++ Dialect Options.
+                                                             (line  232)
+* Wundef <1>:                            Warning Options.    (line  828)
+* Wundef:                                Preprocessor Options.
+                                                             (line  112)
+* Wuninitialized:                        Warning Options.    (line  526)
+* Wunknown-pragmas:                      Warning Options.    (line  596)
+* Wunsafe-loop-optimizations:            Warning Options.    (line  852)
+* Wunsuffixed-float-constants:           Warning Options.    (line 1323)
+* Wunused:                               Warning Options.    (line  519)
+* Wunused-function:                      Warning Options.    (line  477)
+* Wunused-label:                         Warning Options.    (line  482)
+* Wunused-macros:                        Preprocessor Options.
+                                                             (line  117)
+* Wunused-parameter:                     Warning Options.    (line  489)
+* Wunused-result:                        Warning Options.    (line  496)
+* Wunused-value:                         Warning Options.    (line  509)
+* Wunused-variable:                      Warning Options.    (line  501)
+* Wvariadic-macros:                      Warning Options.    (line 1268)
+* Wvla:                                  Warning Options.    (line 1274)
+* Wvolatile-register-var:                Warning Options.    (line 1278)
+* Wwrite-strings:                        Warning Options.    (line  915)
+* x <1>:                                 Overall Options.    (line  122)
+* x:                                     Preprocessor Options.
+                                                             (line  310)
+* Xassembler:                            Assembler Options.  (line   13)
+* Xbind-lazy:                            VxWorks Options.    (line   26)
+* Xbind-now:                             VxWorks Options.    (line   30)
+* Xlinker:                               Link Options.       (line  184)
+* Xpreprocessor:                         Preprocessor Options.
+                                                             (line   25)
+* Ym:                                    System V Options.   (line   26)
+* YP:                                    System V Options.   (line   22)
+
+
+File: gcc.info,  Node: Keyword Index,  Prev: Option Index,  Up: Top
+
+Keyword Index
+*************
+
+[index]
+* Menu:
+
+* ! in constraint:                       Multi-Alternative.  (line   33)
+* # in constraint:                       Modifiers.          (line   57)
+* #pragma:                               Pragmas.            (line    6)
+* #pragma implementation:                C++ Interface.      (line   39)
+* #pragma implementation, implied:       C++ Interface.      (line   46)
+* #pragma interface:                     C++ Interface.      (line   20)
+* #pragma, reason for not using:         Function Attributes.
+                                                             (line 1455)
+* $:                                     Dollar Signs.       (line    6)
+* % in constraint:                       Modifiers.          (line   45)
+* %include:                              Spec Files.         (line   27)
+* %include_noerr:                        Spec Files.         (line   31)
+* %rename:                               Spec Files.         (line   35)
+* & in constraint:                       Modifiers.          (line   25)
+* ':                                     Incompatibilities.  (line  116)
+* (:                                     Constructing Calls. (line   76)
+* * in constraint:                       Modifiers.          (line   62)
+* + in constraint:                       Modifiers.          (line   12)
+* -lgcc, use with -nodefaultlibs:        Link Options.       (line   82)
+* -lgcc, use with -nostdlib:             Link Options.       (line   82)
+* -nodefaultlibs and unresolved references: Link Options.    (line   82)
+* -nostdlib and unresolved references:   Link Options.       (line   82)
+* .sdata/.sdata2 references (PowerPC):   RS/6000 and PowerPC Options.
+                                                             (line  682)
+* //:                                    C++ Comments.       (line    6)
+* 0 in constraint:                       Simple Constraints. (line  117)
+* < in constraint:                       Simple Constraints. (line   48)
+* = in constraint:                       Modifiers.          (line    8)
+* > in constraint:                       Simple Constraints. (line   52)
+* ? in constraint:                       Multi-Alternative.  (line   27)
+* ?: extensions:                         Conditionals.       (line    6)
+* ?: side effect:                        Conditionals.       (line   20)
+* _ in variables in macros:              Typeof.             (line   46)
+* __builtin___clear_cache:               Other Builtins.     (line  327)
+* __builtin___fprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___memcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___memmove_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___mempcpy_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___memset_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___printf_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___snprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin___sprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___stpcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strcat_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strcpy_chk:                Object Size Checking.
+                                                             (line    6)
+* __builtin___strncat_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___strncpy_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___vfprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin___vprintf_chk:               Object Size Checking.
+                                                             (line    6)
+* __builtin___vsnprintf_chk:             Object Size Checking.
+                                                             (line    6)
+* __builtin___vsprintf_chk:              Object Size Checking.
+                                                             (line    6)
+* __builtin_apply:                       Constructing Calls. (line   31)
+* __builtin_apply_args:                  Constructing Calls. (line   20)
+* __builtin_bswap32:                     Other Builtins.     (line  546)
+* __builtin_bswap64:                     Other Builtins.     (line  551)
+* __builtin_choose_expr:                 Other Builtins.     (line  156)
+* __builtin_clz:                         Other Builtins.     (line  479)
+* __builtin_clzl:                        Other Builtins.     (line  497)
+* __builtin_clzll:                       Other Builtins.     (line  517)
+* __builtin_constant_p:                  Other Builtins.     (line  195)
+* __builtin_ctz:                         Other Builtins.     (line  483)
+* __builtin_ctzl:                        Other Builtins.     (line  501)
+* __builtin_ctzll:                       Other Builtins.     (line  521)
+* __builtin_expect:                      Other Builtins.     (line  245)
+* __builtin_extract_return_address:      Return Address.     (line   37)
+* __builtin_ffs:                         Other Builtins.     (line  475)
+* __builtin_ffsl:                        Other Builtins.     (line  493)
+* __builtin_ffsll:                       Other Builtins.     (line  513)
+* __builtin_fpclassify:                  Other Builtins.     (line    6)
+* __builtin_frame_address:               Return Address.     (line   51)
+* __builtin_frob_return_address:         Return Address.     (line   46)
+* __builtin_huge_val:                    Other Builtins.     (line  378)
+* __builtin_huge_valf:                   Other Builtins.     (line  383)
+* __builtin_huge_vall:                   Other Builtins.     (line  386)
+* __builtin_huge_valq:                   X86 Built-in Functions.
+                                                             (line   51)
+* __builtin_inf:                         Other Builtins.     (line  401)
+* __builtin_infd128:                     Other Builtins.     (line  411)
+* __builtin_infd32:                      Other Builtins.     (line  405)
+* __builtin_infd64:                      Other Builtins.     (line  408)
+* __builtin_inff:                        Other Builtins.     (line  415)
+* __builtin_infl:                        Other Builtins.     (line  420)
+* __builtin_infq:                        X86 Built-in Functions.
+                                                             (line   47)
+* __builtin_isfinite:                    Other Builtins.     (line    6)
+* __builtin_isgreater:                   Other Builtins.     (line    6)
+* __builtin_isgreaterequal:              Other Builtins.     (line    6)
+* __builtin_isinf_sign:                  Other Builtins.     (line    6)
+* __builtin_isless:                      Other Builtins.     (line    6)
+* __builtin_islessequal:                 Other Builtins.     (line    6)
+* __builtin_islessgreater:               Other Builtins.     (line    6)
+* __builtin_isnormal:                    Other Builtins.     (line    6)
+* __builtin_isunordered:                 Other Builtins.     (line    6)
+* __builtin_nan:                         Other Builtins.     (line  431)
+* __builtin_nand128:                     Other Builtins.     (line  453)
+* __builtin_nand32:                      Other Builtins.     (line  447)
+* __builtin_nand64:                      Other Builtins.     (line  450)
+* __builtin_nanf:                        Other Builtins.     (line  457)
+* __builtin_nanl:                        Other Builtins.     (line  460)
+* __builtin_nans:                        Other Builtins.     (line  464)
+* __builtin_nansf:                       Other Builtins.     (line  468)
+* __builtin_nansl:                       Other Builtins.     (line  471)
+* __builtin_object_size:                 Object Size Checking.
+                                                             (line   11)
+* __builtin_offsetof:                    Offsetof.           (line    6)
+* __builtin_parity:                      Other Builtins.     (line  490)
+* __builtin_parityl:                     Other Builtins.     (line  509)
+* __builtin_parityll:                    Other Builtins.     (line  529)
+* __builtin_popcount:                    Other Builtins.     (line  487)
+* __builtin_popcountl:                   Other Builtins.     (line  505)
+* __builtin_popcountll:                  Other Builtins.     (line  525)
+* __builtin_powi:                        Other Builtins.     (line  533)
+* __builtin_powif:                       Other Builtins.     (line    6)
+* __builtin_powil:                       Other Builtins.     (line    6)
+* __builtin_prefetch:                    Other Builtins.     (line  339)
+* __builtin_return:                      Constructing Calls. (line   48)
+* __builtin_return_address:              Return Address.     (line   11)
+* __builtin_rx_brk:                      RX Built-in Functions.
+                                                             (line   11)
+* __builtin_rx_clrpsw:                   RX Built-in Functions.
+                                                             (line   14)
+* __builtin_rx_int:                      RX Built-in Functions.
+                                                             (line   18)
+* __builtin_rx_machi:                    RX Built-in Functions.
+                                                             (line   22)
+* __builtin_rx_maclo:                    RX Built-in Functions.
+                                                             (line   27)
+* __builtin_rx_mulhi:                    RX Built-in Functions.
+                                                             (line   32)
+* __builtin_rx_mullo:                    RX Built-in Functions.
+                                                             (line   37)
+* __builtin_rx_mvfachi:                  RX Built-in Functions.
+                                                             (line   42)
+* __builtin_rx_mvfacmi:                  RX Built-in Functions.
+                                                             (line   46)
+* __builtin_rx_mvfc:                     RX Built-in Functions.
+                                                             (line   50)
+* __builtin_rx_mvtachi:                  RX Built-in Functions.
+                                                             (line   54)
+* __builtin_rx_mvtaclo:                  RX Built-in Functions.
+                                                             (line   58)
+* __builtin_rx_mvtc:                     RX Built-in Functions.
+                                                             (line   62)
+* __builtin_rx_mvtipl:                   RX Built-in Functions.
+                                                             (line   66)
+* __builtin_rx_racw:                     RX Built-in Functions.
+                                                             (line   70)
+* __builtin_rx_revw:                     RX Built-in Functions.
+                                                             (line   74)
+* __builtin_rx_rmpa:                     RX Built-in Functions.
+                                                             (line   79)
+* __builtin_rx_round:                    RX Built-in Functions.
+                                                             (line   83)
+* __builtin_rx_sat:                      RX Built-in Functions.
+                                                             (line   88)
+* __builtin_rx_setpsw:                   RX Built-in Functions.
+                                                             (line   92)
+* __builtin_rx_wait:                     RX Built-in Functions.
+                                                             (line   96)
+* __builtin_trap:                        Other Builtins.     (line  269)
+* __builtin_types_compatible_p:          Other Builtins.     (line  110)
+* __builtin_unreachable:                 Other Builtins.     (line  276)
+* __complex__ keyword:                   Complex.            (line    6)
+* __declspec(dllexport):                 Function Attributes.
+                                                             (line  259)
+* __declspec(dllimport):                 Function Attributes.
+                                                             (line  289)
+* __extension__:                         Alternate Keywords. (line   29)
+* __float128 data type:                  Floating Types.     (line    6)
+* __float80 data type:                   Floating Types.     (line    6)
+* __fp16 data type:                      Half-Precision.     (line    6)
+* __func__ identifier:                   Function Names.     (line    6)
+* __FUNCTION__ identifier:               Function Names.     (line    6)
+* __imag__ keyword:                      Complex.            (line   27)
+* __PRETTY_FUNCTION__ identifier:        Function Names.     (line    6)
+* __real__ keyword:                      Complex.            (line   27)
+* __STDC_HOSTED__:                       Standards.          (line   13)
+* __sync_add_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_and_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_bool_compare_and_swap:          Atomic Builtins.    (line   73)
+* __sync_fetch_and_add:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_and:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_nand:                 Atomic Builtins.    (line   45)
+* __sync_fetch_and_or:                   Atomic Builtins.    (line   45)
+* __sync_fetch_and_sub:                  Atomic Builtins.    (line   45)
+* __sync_fetch_and_xor:                  Atomic Builtins.    (line   45)
+* __sync_lock_release:                   Atomic Builtins.    (line  103)
+* __sync_lock_test_and_set:              Atomic Builtins.    (line   85)
+* __sync_nand_and_fetch:                 Atomic Builtins.    (line   61)
+* __sync_or_and_fetch:                   Atomic Builtins.    (line   61)
+* __sync_sub_and_fetch:                  Atomic Builtins.    (line   61)
+* __sync_synchronize:                    Atomic Builtins.    (line   82)
+* __sync_val_compare_and_swap:           Atomic Builtins.    (line   73)
+* __sync_xor_and_fetch:                  Atomic Builtins.    (line   61)
+* __thread:                              Thread-Local.       (line    6)
+* _Accum data type:                      Fixed-Point.        (line    6)
+* _Complex keyword:                      Complex.            (line    6)
+* _Decimal128 data type:                 Decimal Float.      (line    6)
+* _Decimal32 data type:                  Decimal Float.      (line    6)
+* _Decimal64 data type:                  Decimal Float.      (line    6)
+* _exit:                                 Other Builtins.     (line    6)
+* _Exit:                                 Other Builtins.     (line    6)
+* _Fract data type:                      Fixed-Point.        (line    6)
+* _Sat data type:                        Fixed-Point.        (line    6)
+* ABI:                                   Compatibility.      (line    6)
+* abort:                                 Other Builtins.     (line    6)
+* abs:                                   Other Builtins.     (line    6)
+* accessing volatiles:                   Volatiles.          (line    6)
+* acos:                                  Other Builtins.     (line    6)
+* acosf:                                 Other Builtins.     (line    6)
+* acosh:                                 Other Builtins.     (line    6)
+* acoshf:                                Other Builtins.     (line    6)
+* acoshl:                                Other Builtins.     (line    6)
+* acosl:                                 Other Builtins.     (line    6)
+* Ada:                                   G++ and GCC.        (line   30)
+* additional floating types:             Floating Types.     (line    6)
+* address constraints:                   Simple Constraints. (line  144)
+* address of a label:                    Labels as Values.   (line    6)
+* address_operand:                       Simple Constraints. (line  148)
+* alias attribute:                       Function Attributes.
+                                                             (line   36)
+* aliasing of parameters:                Code Gen Options.   (line  411)
+* aligned attribute <1>:                 Function Attributes.
+                                                             (line   49)
+* aligned attribute <2>:                 Variable Attributes.
+                                                             (line   23)
+* aligned attribute:                     Type Attributes.    (line   31)
+* alignment:                             Alignment.          (line    6)
+* alloc_size attribute:                  Function Attributes.
+                                                             (line   69)
+* alloca:                                Other Builtins.     (line    6)
+* alloca vs variable-length arrays:      Variable Length.    (line   27)
+* Allow nesting in an interrupt handler on the Blackfin processor.: Function Attributes.
+                                                             (line  774)
+* alternate keywords:                    Alternate Keywords. (line    6)
+* always_inline function attribute:      Function Attributes.
+                                                             (line   90)
+* AMD x86-64 Options:                    i386 and x86-64 Options.
+                                                             (line    6)
+* AMD1:                                  Standards.          (line   13)
+* ANSI C:                                Standards.          (line   13)
+* ANSI C standard:                       Standards.          (line   13)
+* ANSI C89:                              Standards.          (line   13)
+* ANSI support:                          C Dialect Options.  (line   10)
+* ANSI X3.159-1989:                      Standards.          (line   13)
+* apostrophes:                           Incompatibilities.  (line  116)
+* application binary interface:          Compatibility.      (line    6)
+* ARC Options:                           ARC Options.        (line    6)
+* ARM [Annotated C++ Reference Manual]:  Backwards Compatibility.
+                                                             (line    6)
+* ARM options:                           ARM Options.        (line    6)
+* arrays of length zero:                 Zero Length.        (line    6)
+* arrays of variable length:             Variable Length.    (line    6)
+* arrays, non-lvalue:                    Subscripting.       (line    6)
+* artificial function attribute:         Function Attributes.
+                                                             (line  133)
+* asin:                                  Other Builtins.     (line    6)
+* asinf:                                 Other Builtins.     (line    6)
+* asinh:                                 Other Builtins.     (line    6)
+* asinhf:                                Other Builtins.     (line    6)
+* asinhl:                                Other Builtins.     (line    6)
+* asinl:                                 Other Builtins.     (line    6)
+* asm constraints:                       Constraints.        (line    6)
+* asm expressions:                       Extended Asm.       (line    6)
+* assembler instructions:                Extended Asm.       (line    6)
+* assembler names for identifiers:       Asm Labels.         (line    6)
+* assembly code, invalid:                Bug Criteria.       (line   12)
+* atan:                                  Other Builtins.     (line    6)
+* atan2:                                 Other Builtins.     (line    6)
+* atan2f:                                Other Builtins.     (line    6)
+* atan2l:                                Other Builtins.     (line    6)
+* atanf:                                 Other Builtins.     (line    6)
+* atanh:                                 Other Builtins.     (line    6)
+* atanhf:                                Other Builtins.     (line    6)
+* atanhl:                                Other Builtins.     (line    6)
+* atanl:                                 Other Builtins.     (line    6)
+* attribute of types:                    Type Attributes.    (line    6)
+* attribute of variables:                Variable Attributes.
+                                                             (line    6)
+* attribute syntax:                      Attribute Syntax.   (line    6)
+* autoincrement/decrement addressing:    Simple Constraints. (line   30)
+* automatic inline for C++ member fns:   Inline.             (line   71)
+* AVR Options:                           AVR Options.        (line    6)
+* Backwards Compatibility:               Backwards Compatibility.
+                                                             (line    6)
+* base class members:                    Name lookup.        (line    6)
+* bcmp:                                  Other Builtins.     (line    6)
+* below100 attribute:                    Variable Attributes.
+                                                             (line  550)
+* binary compatibility:                  Compatibility.      (line    6)
+* Binary constants using the 0b prefix:  Binary constants.   (line    6)
+* Blackfin Options:                      Blackfin Options.   (line    6)
+* bound pointer to member function:      Bound member functions.
+                                                             (line    6)
+* bounds checking:                       Optimize Options.   (line  359)
+* bug criteria:                          Bug Criteria.       (line    6)
+* bugs:                                  Bugs.               (line    6)
+* bugs, known:                           Trouble.            (line    6)
+* built-in functions <1>:                Other Builtins.     (line    6)
+* built-in functions:                    C Dialect Options.  (line  173)
+* bzero:                                 Other Builtins.     (line    6)
+* C compilation options:                 Invoking GCC.       (line   17)
+* C intermediate output, nonexistent:    G++ and GCC.        (line   35)
+* C language extensions:                 C Extensions.       (line    6)
+* C language, traditional:               C Dialect Options.  (line  253)
+* C standard:                            Standards.          (line   13)
+* C standards:                           Standards.          (line   13)
+* c++:                                   Invoking G++.       (line   14)
+* C++:                                   G++ and GCC.        (line   30)
+* C++ comments:                          C++ Comments.       (line    6)
+* C++ compilation options:               Invoking GCC.       (line   23)
+* C++ interface and implementation headers: C++ Interface.   (line    6)
+* C++ language extensions:               C++ Extensions.     (line    6)
+* C++ member fns, automatically inline:  Inline.             (line   71)
+* C++ misunderstandings:                 C++ Misunderstandings.
+                                                             (line    6)
+* C++ options, command line:             C++ Dialect Options.
+                                                             (line    6)
+* C++ pragmas, effect on inlining:       C++ Interface.      (line   66)
+* C++ source file suffixes:              Invoking G++.       (line    6)
+* C++ static data, declaring and defining: Static Definitions.
+                                                             (line    6)
+* C89:                                   Standards.          (line   13)
+* C90:                                   Standards.          (line   13)
+* C94:                                   Standards.          (line   13)
+* C95:                                   Standards.          (line   13)
+* C99:                                   Standards.          (line   13)
+* C9X:                                   Standards.          (line   13)
+* C_INCLUDE_PATH:                        Environment Variables.
+                                                             (line  127)
+* cabs:                                  Other Builtins.     (line    6)
+* cabsf:                                 Other Builtins.     (line    6)
+* cabsl:                                 Other Builtins.     (line    6)
+* cacos:                                 Other Builtins.     (line    6)
+* cacosf:                                Other Builtins.     (line    6)
+* cacosh:                                Other Builtins.     (line    6)
+* cacoshf:                               Other Builtins.     (line    6)
+* cacoshl:                               Other Builtins.     (line    6)
+* cacosl:                                Other Builtins.     (line    6)
+* calling functions through the function vector on H8/300, M16C, M32C and SH2A processors: Function Attributes.
+                                                             (line  496)
+* calloc:                                Other Builtins.     (line    6)
+* carg:                                  Other Builtins.     (line    6)
+* cargf:                                 Other Builtins.     (line    6)
+* cargl:                                 Other Builtins.     (line    6)
+* case labels in initializers:           Designated Inits.   (line    6)
+* case ranges:                           Case Ranges.        (line    6)
+* casin:                                 Other Builtins.     (line    6)
+* casinf:                                Other Builtins.     (line    6)
+* casinh:                                Other Builtins.     (line    6)
+* casinhf:                               Other Builtins.     (line    6)
+* casinhl:                               Other Builtins.     (line    6)
+* casinl:                                Other Builtins.     (line    6)
+* cast to a union:                       Cast to Union.      (line    6)
+* catan:                                 Other Builtins.     (line    6)
+* catanf:                                Other Builtins.     (line    6)
+* catanh:                                Other Builtins.     (line    6)
+* catanhf:                               Other Builtins.     (line    6)
+* catanhl:                               Other Builtins.     (line    6)
+* catanl:                                Other Builtins.     (line    6)
+* cbrt:                                  Other Builtins.     (line    6)
+* cbrtf:                                 Other Builtins.     (line    6)
+* cbrtl:                                 Other Builtins.     (line    6)
+* ccos:                                  Other Builtins.     (line    6)
+* ccosf:                                 Other Builtins.     (line    6)
+* ccosh:                                 Other Builtins.     (line    6)
+* ccoshf:                                Other Builtins.     (line    6)
+* ccoshl:                                Other Builtins.     (line    6)
+* ccosl:                                 Other Builtins.     (line    6)
+* ceil:                                  Other Builtins.     (line    6)
+* ceilf:                                 Other Builtins.     (line    6)
+* ceill:                                 Other Builtins.     (line    6)
+* cexp:                                  Other Builtins.     (line    6)
+* cexpf:                                 Other Builtins.     (line    6)
+* cexpl:                                 Other Builtins.     (line    6)
+* character set, execution:              Preprocessor Options.
+                                                             (line  498)
+* character set, input:                  Preprocessor Options.
+                                                             (line  511)
+* character set, input normalization:    Warning Options.    (line 1111)
+* character set, wide execution:         Preprocessor Options.
+                                                             (line  503)
+* cimag:                                 Other Builtins.     (line    6)
+* cimagf:                                Other Builtins.     (line    6)
+* cimagl:                                Other Builtins.     (line    6)
+* cleanup attribute:                     Variable Attributes.
+                                                             (line   89)
+* clog:                                  Other Builtins.     (line    6)
+* clogf:                                 Other Builtins.     (line    6)
+* clogl:                                 Other Builtins.     (line    6)
+* COBOL:                                 G++ and GCC.        (line   23)
+* code generation conventions:           Code Gen Options.   (line    6)
+* code, mixed with declarations:         Mixed Declarations. (line    6)
+* cold function attribute:               Function Attributes.
+                                                             (line  949)
+* command options:                       Invoking GCC.       (line    6)
+* comments, C++ style:                   C++ Comments.       (line    6)
+* common attribute:                      Variable Attributes.
+                                                             (line  105)
+* comparison of signed and unsigned values, warning: Warning Options.
+                                                             (line  975)
+* compiler bugs, reporting:              Bug Reporting.      (line    6)
+* compiler compared to C++ preprocessor: G++ and GCC.        (line   35)
+* compiler options, C++:                 C++ Dialect Options.
+                                                             (line    6)
+* compiler options, Objective-C and Objective-C++: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* compiler version, specifying:          Target Options.     (line    6)
+* COMPILER_PATH:                         Environment Variables.
+                                                             (line   88)
+* complex conjugation:                   Complex.            (line   34)
+* complex numbers:                       Complex.            (line    6)
+* compound literals:                     Compound Literals.  (line    6)
+* computed gotos:                        Labels as Values.   (line    6)
+* conditional expressions, extensions:   Conditionals.       (line    6)
+* conflicting types:                     Disappointments.    (line   21)
+* conj:                                  Other Builtins.     (line    6)
+* conjf:                                 Other Builtins.     (line    6)
+* conjl:                                 Other Builtins.     (line    6)
+* const applied to function:             Function Attributes.
+                                                             (line    6)
+* const function attribute:              Function Attributes.
+                                                             (line  183)
+* constants in constraints:              Simple Constraints. (line   60)
+* constraint modifier characters:        Modifiers.          (line    6)
+* constraint, matching:                  Simple Constraints. (line  129)
+* constraints, asm:                      Constraints.        (line    6)
+* constraints, machine specific:         Machine Constraints.
+                                                             (line    6)
+* constructing calls:                    Constructing Calls. (line    6)
+* constructor expressions:               Compound Literals.  (line    6)
+* constructor function attribute:        Function Attributes.
+                                                             (line  211)
+* contributors:                          Contributors.       (line    6)
+* copysign:                              Other Builtins.     (line    6)
+* copysignf:                             Other Builtins.     (line    6)
+* copysignl:                             Other Builtins.     (line    6)
+* core dump:                             Bug Criteria.       (line    9)
+* cos:                                   Other Builtins.     (line    6)
+* cosf:                                  Other Builtins.     (line    6)
+* cosh:                                  Other Builtins.     (line    6)
+* coshf:                                 Other Builtins.     (line    6)
+* coshl:                                 Other Builtins.     (line    6)
+* cosl:                                  Other Builtins.     (line    6)
+* CPATH:                                 Environment Variables.
+                                                             (line  126)
+* CPLUS_INCLUDE_PATH:                    Environment Variables.
+                                                             (line  128)
+* cpow:                                  Other Builtins.     (line    6)
+* cpowf:                                 Other Builtins.     (line    6)
+* cpowl:                                 Other Builtins.     (line    6)
+* cproj:                                 Other Builtins.     (line    6)
+* cprojf:                                Other Builtins.     (line    6)
+* cprojl:                                Other Builtins.     (line    6)
+* creal:                                 Other Builtins.     (line    6)
+* crealf:                                Other Builtins.     (line    6)
+* creall:                                Other Builtins.     (line    6)
+* CRIS Options:                          CRIS Options.       (line    6)
+* cross compiling:                       Target Options.     (line    6)
+* CRX Options:                           CRX Options.        (line    6)
+* csin:                                  Other Builtins.     (line    6)
+* csinf:                                 Other Builtins.     (line    6)
+* csinh:                                 Other Builtins.     (line    6)
+* csinhf:                                Other Builtins.     (line    6)
+* csinhl:                                Other Builtins.     (line    6)
+* csinl:                                 Other Builtins.     (line    6)
+* csqrt:                                 Other Builtins.     (line    6)
+* csqrtf:                                Other Builtins.     (line    6)
+* csqrtl:                                Other Builtins.     (line    6)
+* ctan:                                  Other Builtins.     (line    6)
+* ctanf:                                 Other Builtins.     (line    6)
+* ctanh:                                 Other Builtins.     (line    6)
+* ctanhf:                                Other Builtins.     (line    6)
+* ctanhl:                                Other Builtins.     (line    6)
+* ctanl:                                 Other Builtins.     (line    6)
+* Darwin options:                        Darwin Options.     (line    6)
+* dcgettext:                             Other Builtins.     (line    6)
+* dd integer suffix:                     Decimal Float.      (line    6)
+* DD integer suffix:                     Decimal Float.      (line    6)
+* deallocating variable length arrays:   Variable Length.    (line   23)
+* debugging information options:         Debugging Options.  (line    6)
+* decimal floating types:                Decimal Float.      (line    6)
+* declaration scope:                     Incompatibilities.  (line   80)
+* declarations inside expressions:       Statement Exprs.    (line    6)
+* declarations, mixed with code:         Mixed Declarations. (line    6)
+* declaring attributes of functions:     Function Attributes.
+                                                             (line    6)
+* declaring static data in C++:          Static Definitions. (line    6)
+* defining static data in C++:           Static Definitions. (line    6)
+* dependencies for make as output:       Environment Variables.
+                                                             (line  170)
+* dependencies, make:                    Preprocessor Options.
+                                                             (line  173)
+* DEPENDENCIES_OUTPUT:                   Environment Variables.
+                                                             (line  153)
+* dependent name lookup:                 Name lookup.        (line    6)
+* deprecated attribute:                  Variable Attributes.
+                                                             (line  114)
+* deprecated attribute.:                 Function Attributes.
+                                                             (line  234)
+* designated initializers:               Designated Inits.   (line    6)
+* designator lists:                      Designated Inits.   (line   94)
+* designators:                           Designated Inits.   (line   61)
+* destructor function attribute:         Function Attributes.
+                                                             (line  211)
+* df integer suffix:                     Decimal Float.      (line    6)
+* DF integer suffix:                     Decimal Float.      (line    6)
+* dgettext:                              Other Builtins.     (line    6)
+* diagnostic messages:                   Language Independent Options.
+                                                             (line    6)
+* dialect options:                       C Dialect Options.  (line    6)
+* digits in constraint:                  Simple Constraints. (line  117)
+* directory options:                     Directory Options.  (line    6)
+* disinterrupt attribute:                Function Attributes.
+                                                             (line  254)
+* dl integer suffix:                     Decimal Float.      (line    6)
+* DL integer suffix:                     Decimal Float.      (line    6)
+* dollar signs in identifier names:      Dollar Signs.       (line    6)
+* double-word arithmetic:                Long Long.          (line    6)
+* downward funargs:                      Nested Functions.   (line    6)
+* drem:                                  Other Builtins.     (line    6)
+* dremf:                                 Other Builtins.     (line    6)
+* dreml:                                 Other Builtins.     (line    6)
+* E in constraint:                       Simple Constraints. (line   79)
+* earlyclobber operand:                  Modifiers.          (line   25)
+* eight bit data on the H8/300, H8/300H, and H8S: Function Attributes.
+                                                             (line  342)
+* empty structures:                      Empty Structures.   (line    6)
+* environment variables:                 Environment Variables.
+                                                             (line    6)
+* erf:                                   Other Builtins.     (line    6)
+* erfc:                                  Other Builtins.     (line    6)
+* erfcf:                                 Other Builtins.     (line    6)
+* erfcl:                                 Other Builtins.     (line    6)
+* erff:                                  Other Builtins.     (line    6)
+* erfl:                                  Other Builtins.     (line    6)
+* error function attribute:              Function Attributes.
+                                                             (line  152)
+* error messages:                        Warnings and Errors.
+                                                             (line    6)
+* escaped newlines:                      Escaped Newlines.   (line    6)
+* exception handler functions on the Blackfin processor: Function Attributes.
+                                                             (line  352)
+* exclamation point:                     Multi-Alternative.  (line   33)
+* exit:                                  Other Builtins.     (line    6)
+* exp:                                   Other Builtins.     (line    6)
+* exp10:                                 Other Builtins.     (line    6)
+* exp10f:                                Other Builtins.     (line    6)
+* exp10l:                                Other Builtins.     (line    6)
+* exp2:                                  Other Builtins.     (line    6)
+* exp2f:                                 Other Builtins.     (line    6)
+* exp2l:                                 Other Builtins.     (line    6)
+* expf:                                  Other Builtins.     (line    6)
+* expl:                                  Other Builtins.     (line    6)
+* explicit register variables:           Explicit Reg Vars.  (line    6)
+* expm1:                                 Other Builtins.     (line    6)
+* expm1f:                                Other Builtins.     (line    6)
+* expm1l:                                Other Builtins.     (line    6)
+* expressions containing statements:     Statement Exprs.    (line    6)
+* expressions, constructor:              Compound Literals.  (line    6)
+* extended asm:                          Extended Asm.       (line    6)
+* extensible constraints:                Simple Constraints. (line  153)
+* extensions, ?::                        Conditionals.       (line    6)
+* extensions, C language:                C Extensions.       (line    6)
+* extensions, C++ language:              C++ Extensions.     (line    6)
+* external declaration scope:            Incompatibilities.  (line   80)
+* externally_visible attribute.:         Function Attributes.
+                                                             (line  358)
+* F in constraint:                       Simple Constraints. (line   84)
+* fabs:                                  Other Builtins.     (line    6)
+* fabsf:                                 Other Builtins.     (line    6)
+* fabsl:                                 Other Builtins.     (line    6)
+* fatal signal:                          Bug Criteria.       (line    9)
+* fdim:                                  Other Builtins.     (line    6)
+* fdimf:                                 Other Builtins.     (line    6)
+* fdiml:                                 Other Builtins.     (line    6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                             (line    6)
+* ffs:                                   Other Builtins.     (line    6)
+* file name suffix:                      Overall Options.    (line   14)
+* file names:                            Link Options.       (line   10)
+* fixed-point types:                     Fixed-Point.        (line    6)
+* flatten function attribute:            Function Attributes.
+                                                             (line  145)
+* flexible array members:                Zero Length.        (line    6)
+* float as function value type:          Incompatibilities.  (line  141)
+* floating point precision <1>:          Disappointments.    (line   68)
+* floating point precision:              Optimize Options.   (line 1676)
+* floor:                                 Other Builtins.     (line    6)
+* floorf:                                Other Builtins.     (line    6)
+* floorl:                                Other Builtins.     (line    6)
+* fma:                                   Other Builtins.     (line    6)
+* fmaf:                                  Other Builtins.     (line    6)
+* fmal:                                  Other Builtins.     (line    6)
+* fmax:                                  Other Builtins.     (line    6)
+* fmaxf:                                 Other Builtins.     (line    6)
+* fmaxl:                                 Other Builtins.     (line    6)
+* fmin:                                  Other Builtins.     (line    6)
+* fminf:                                 Other Builtins.     (line    6)
+* fminl:                                 Other Builtins.     (line    6)
+* fmod:                                  Other Builtins.     (line    6)
+* fmodf:                                 Other Builtins.     (line    6)
+* fmodl:                                 Other Builtins.     (line    6)
+* force_align_arg_pointer attribute:     Function Attributes.
+                                                             (line  991)
+* format function attribute:             Function Attributes.
+                                                             (line  398)
+* format_arg function attribute:         Function Attributes.
+                                                             (line  457)
+* Fortran:                               G++ and GCC.        (line    6)
+* forwarding calls:                      Constructing Calls. (line    6)
+* fprintf:                               Other Builtins.     (line    6)
+* fprintf_unlocked:                      Other Builtins.     (line    6)
+* fputs:                                 Other Builtins.     (line    6)
+* fputs_unlocked:                        Other Builtins.     (line    6)
+* FR30 Options:                          FR30 Options.       (line    6)
+* freestanding environment:              Standards.          (line   13)
+* freestanding implementation:           Standards.          (line   13)
+* frexp:                                 Other Builtins.     (line    6)
+* frexpf:                                Other Builtins.     (line    6)
+* frexpl:                                Other Builtins.     (line    6)
+* FRV Options:                           FRV Options.        (line    6)
+* fscanf:                                Other Builtins.     (line    6)
+* fscanf, and constant strings:          Incompatibilities.  (line   17)
+* function addressability on the M32R/D: Function Attributes.
+                                                             (line  704)
+* function attributes:                   Function Attributes.
+                                                             (line    6)
+* function pointers, arithmetic:         Pointer Arith.      (line    6)
+* function prototype declarations:       Function Prototypes.
+                                                             (line    6)
+* function without a prologue/epilogue code: Function Attributes.
+                                                             (line  751)
+* function, size of pointer to:          Pointer Arith.      (line    6)
+* functions called via pointer on the RS/6000 and PowerPC: Function Attributes.
+                                                             (line  658)
+* functions in arbitrary sections:       Function Attributes.
+                                                             (line    6)
+* functions that are passed arguments in registers on the 386: Function Attributes.
+                                                             (line    6)
+* functions that behave like malloc:     Function Attributes.
+                                                             (line    6)
+* functions that do not pop the argument stack on the 386: Function Attributes.
+                                                             (line    6)
+* functions that do pop the argument stack on the 386: Function Attributes.
+                                                             (line  177)
+* functions that have different compilation options on the 386: Function Attributes.
+                                                             (line    6)
+* functions that have different optimization options: Function Attributes.
+                                                             (line    6)
+* functions that have no side effects:   Function Attributes.
+                                                             (line    6)
+* functions that never return:           Function Attributes.
+                                                             (line    6)
+* functions that pop the argument stack on the 386: Function Attributes.
+                                                             (line 1091)
+* functions that return more than once:  Function Attributes.
+                                                             (line    6)
+* functions which do not handle memory bank switching on 68HC11/68HC12: Function Attributes.
+                                                             (line  764)
+* functions which handle memory bank switching: Function Attributes.
+                                                             (line  363)
+* functions with non-null pointer arguments: Function Attributes.
+                                                             (line    6)
+* functions with printf, scanf, strftime or strfmon style arguments: Function Attributes.
+                                                             (line    6)
+* g in constraint:                       Simple Constraints. (line  110)
+* G in constraint:                       Simple Constraints. (line   88)
+* g++:                                   Invoking G++.       (line   14)
+* G++:                                   G++ and GCC.        (line   30)
+* gamma:                                 Other Builtins.     (line    6)
+* gamma_r:                               Other Builtins.     (line    6)
+* gammaf:                                Other Builtins.     (line    6)
+* gammaf_r:                              Other Builtins.     (line    6)
+* gammal:                                Other Builtins.     (line    6)
+* gammal_r:                              Other Builtins.     (line    6)
+* GCC:                                   G++ and GCC.        (line    6)
+* GCC command options:                   Invoking GCC.       (line    6)
+* GCC_EXEC_PREFIX:                       Environment Variables.
+                                                             (line   52)
+* gcc_struct:                            Type Attributes.    (line  319)
+* gcc_struct attribute:                  Variable Attributes.
+                                                             (line  407)
+* gcov:                                  Debugging Options.  (line  335)
+* gettext:                               Other Builtins.     (line    6)
+* global offset table:                   Code Gen Options.   (line  184)
+* global register after longjmp:         Global Reg Vars.    (line   66)
+* global register variables:             Global Reg Vars.    (line    6)
+* GNAT:                                  G++ and GCC.        (line   30)
+* GNU C Compiler:                        G++ and GCC.        (line    6)
+* GNU Compiler Collection:               G++ and GCC.        (line    6)
+* gnu_inline function attribute:         Function Attributes.
+                                                             (line   95)
+* goto with computed label:              Labels as Values.   (line    6)
+* gprof:                                 Debugging Options.  (line  296)
+* grouping options:                      Invoking GCC.       (line   26)
+* H in constraint:                       Simple Constraints. (line   88)
+* half-precision floating point:         Half-Precision.     (line    6)
+* hardware models and configurations, specifying: Submodel Options.
+                                                             (line    6)
+* hex floats:                            Hex Floats.         (line    6)
+* hk fixed-suffix:                       Fixed-Point.        (line    6)
+* HK fixed-suffix:                       Fixed-Point.        (line    6)
+* hosted environment <1>:                Standards.          (line   13)
+* hosted environment:                    C Dialect Options.  (line  207)
+* hosted implementation:                 Standards.          (line   13)
+* hot function attribute:                Function Attributes.
+                                                             (line  936)
+* HPPA Options:                          HPPA Options.       (line    6)
+* HR fixed-suffix:                       Fixed-Point.        (line    6)
+* hr fixed-suffix:                       Fixed-Point.        (line    6)
+* hypot:                                 Other Builtins.     (line    6)
+* hypotf:                                Other Builtins.     (line    6)
+* hypotl:                                Other Builtins.     (line    6)
+* i in constraint:                       Simple Constraints. (line   60)
+* I in constraint:                       Simple Constraints. (line   71)
+* i386 and x86-64 Windows Options:       i386 and x86-64 Windows Options.
+                                                             (line    6)
+* i386 Options:                          i386 and x86-64 Options.
+                                                             (line    6)
+* IA-64 Options:                         IA-64 Options.      (line    6)
+* IBM RS/6000 and PowerPC Options:       RS/6000 and PowerPC Options.
+                                                             (line    6)
+* identifier names, dollar signs in:     Dollar Signs.       (line    6)
+* identifiers, names in assembler code:  Asm Labels.         (line    6)
+* ilogb:                                 Other Builtins.     (line    6)
+* ilogbf:                                Other Builtins.     (line    6)
+* ilogbl:                                Other Builtins.     (line    6)
+* imaxabs:                               Other Builtins.     (line    6)
+* implementation-defined behavior, C language: C Implementation.
+                                                             (line    6)
+* implementation-defined behavior, C++ language: C++ Implementation.
+                                                             (line    6)
+* implied #pragma implementation:        C++ Interface.      (line   46)
+* incompatibilities of GCC:              Incompatibilities.  (line    6)
+* increment operators:                   Bug Criteria.       (line   17)
+* index:                                 Other Builtins.     (line    6)
+* indirect calls on ARM:                 Function Attributes.
+                                                             (line  648)
+* indirect calls on MIPS:                Function Attributes.
+                                                             (line  670)
+* init_priority attribute:               C++ Attributes.     (line    9)
+* initializations in expressions:        Compound Literals.  (line    6)
+* initializers with labeled elements:    Designated Inits.   (line    6)
+* initializers, non-constant:            Initializers.       (line    6)
+* inline automatic for C++ member fns:   Inline.             (line   71)
+* inline functions:                      Inline.             (line    6)
+* inline functions, omission of:         Inline.             (line   51)
+* inlining and C++ pragmas:              C++ Interface.      (line   66)
+* installation trouble:                  Trouble.            (line    6)
+* integrating function code:             Inline.             (line    6)
+* Intel 386 Options:                     i386 and x86-64 Options.
+                                                             (line    6)
+* interface and implementation headers, C++: C++ Interface.  (line    6)
+* intermediate C version, nonexistent:   G++ and GCC.        (line   35)
+* interrupt handler functions:           Function Attributes.
+                                                             (line  557)
+* interrupt handler functions on the Blackfin, m68k, H8/300 and SH processors: Function Attributes.
+                                                             (line  612)
+* interrupt service routines on ARM:     Function Attributes.
+                                                             (line  627)
+* interrupt thread functions on fido:    Function Attributes.
+                                                             (line  619)
+* introduction:                          Top.                (line    6)
+* invalid assembly code:                 Bug Criteria.       (line   12)
+* invalid input:                         Bug Criteria.       (line   42)
+* invoking g++:                          Invoking G++.       (line   22)
+* isalnum:                               Other Builtins.     (line    6)
+* isalpha:                               Other Builtins.     (line    6)
+* isascii:                               Other Builtins.     (line    6)
+* isblank:                               Other Builtins.     (line    6)
+* iscntrl:                               Other Builtins.     (line    6)
+* isdigit:                               Other Builtins.     (line    6)
+* isgraph:                               Other Builtins.     (line    6)
+* islower:                               Other Builtins.     (line    6)
+* ISO 9899:                              Standards.          (line   13)
+* ISO C:                                 Standards.          (line   13)
+* ISO C standard:                        Standards.          (line   13)
+* ISO C90:                               Standards.          (line   13)
+* ISO C94:                               Standards.          (line   13)
+* ISO C95:                               Standards.          (line   13)
+* ISO C99:                               Standards.          (line   13)
+* ISO C9X:                               Standards.          (line   13)
+* ISO support:                           C Dialect Options.  (line   10)
+* ISO/IEC 9899:                          Standards.          (line   13)
+* isprint:                               Other Builtins.     (line    6)
+* ispunct:                               Other Builtins.     (line    6)
+* isspace:                               Other Builtins.     (line    6)
+* isupper:                               Other Builtins.     (line    6)
+* iswalnum:                              Other Builtins.     (line    6)
+* iswalpha:                              Other Builtins.     (line    6)
+* iswblank:                              Other Builtins.     (line    6)
+* iswcntrl:                              Other Builtins.     (line    6)
+* iswdigit:                              Other Builtins.     (line    6)
+* iswgraph:                              Other Builtins.     (line    6)
+* iswlower:                              Other Builtins.     (line    6)
+* iswprint:                              Other Builtins.     (line    6)
+* iswpunct:                              Other Builtins.     (line    6)
+* iswspace:                              Other Builtins.     (line    6)
+* iswupper:                              Other Builtins.     (line    6)
+* iswxdigit:                             Other Builtins.     (line    6)
+* isxdigit:                              Other Builtins.     (line    6)
+* j0:                                    Other Builtins.     (line    6)
+* j0f:                                   Other Builtins.     (line    6)
+* j0l:                                   Other Builtins.     (line    6)
+* j1:                                    Other Builtins.     (line    6)
+* j1f:                                   Other Builtins.     (line    6)
+* j1l:                                   Other Builtins.     (line    6)
+* Java:                                  G++ and GCC.        (line    6)
+* java_interface attribute:              C++ Attributes.     (line   29)
+* jn:                                    Other Builtins.     (line    6)
+* jnf:                                   Other Builtins.     (line    6)
+* jnl:                                   Other Builtins.     (line    6)
+* k fixed-suffix:                        Fixed-Point.        (line    6)
+* K fixed-suffix:                        Fixed-Point.        (line    6)
+* keep_interrupts_masked attribute:      Function Attributes.
+                                                             (line  588)
+* keywords, alternate:                   Alternate Keywords. (line    6)
+* known causes of trouble:               Trouble.            (line    6)
+* l1_data variable attribute:            Variable Attributes.
+                                                             (line  318)
+* l1_data_A variable attribute:          Variable Attributes.
+                                                             (line  318)
+* l1_data_B variable attribute:          Variable Attributes.
+                                                             (line  318)
+* l1_text function attribute:            Function Attributes.
+                                                             (line  636)
+* l2 function attribute:                 Function Attributes.
+                                                             (line  642)
+* l2 variable attribute:                 Variable Attributes.
+                                                             (line  326)
+* labeled elements in initializers:      Designated Inits.   (line    6)
+* labels as values:                      Labels as Values.   (line    6)
+* labs:                                  Other Builtins.     (line    6)
+* LANG:                                  Environment Variables.
+                                                             (line  103)
+* language dialect options:              C Dialect Options.  (line    6)
+* LC_ALL:                                Environment Variables.
+                                                             (line   21)
+* LC_CTYPE:                              Environment Variables.
+                                                             (line   21)
+* LC_MESSAGES:                           Environment Variables.
+                                                             (line   21)
+* ldexp:                                 Other Builtins.     (line    6)
+* ldexpf:                                Other Builtins.     (line    6)
+* ldexpl:                                Other Builtins.     (line    6)
+* length-zero arrays:                    Zero Length.        (line    6)
+* lgamma:                                Other Builtins.     (line    6)
+* lgamma_r:                              Other Builtins.     (line    6)
+* lgammaf:                               Other Builtins.     (line    6)
+* lgammaf_r:                             Other Builtins.     (line    6)
+* lgammal:                               Other Builtins.     (line    6)
+* lgammal_r:                             Other Builtins.     (line    6)
+* Libraries:                             Link Options.       (line   24)
+* LIBRARY_PATH:                          Environment Variables.
+                                                             (line   94)
+* link options:                          Link Options.       (line    6)
+* linker script:                         Link Options.       (line  178)
+* LK fixed-suffix:                       Fixed-Point.        (line    6)
+* lk fixed-suffix:                       Fixed-Point.        (line    6)
+* LL integer suffix:                     Long Long.          (line    6)
+* llabs:                                 Other Builtins.     (line    6)
+* llk fixed-suffix:                      Fixed-Point.        (line    6)
+* LLK fixed-suffix:                      Fixed-Point.        (line    6)
+* llr fixed-suffix:                      Fixed-Point.        (line    6)
+* LLR fixed-suffix:                      Fixed-Point.        (line    6)
+* llrint:                                Other Builtins.     (line    6)
+* llrintf:                               Other Builtins.     (line    6)
+* llrintl:                               Other Builtins.     (line    6)
+* llround:                               Other Builtins.     (line    6)
+* llroundf:                              Other Builtins.     (line    6)
+* llroundl:                              Other Builtins.     (line    6)
+* LM32 options:                          LM32 Options.       (line    6)
+* load address instruction:              Simple Constraints. (line  144)
+* local labels:                          Local Labels.       (line    6)
+* local variables in macros:             Typeof.             (line   46)
+* local variables, specifying registers: Local Reg Vars.     (line    6)
+* locale:                                Environment Variables.
+                                                             (line   21)
+* locale definition:                     Environment Variables.
+                                                             (line  103)
+* log:                                   Other Builtins.     (line    6)
+* log10:                                 Other Builtins.     (line    6)
+* log10f:                                Other Builtins.     (line    6)
+* log10l:                                Other Builtins.     (line    6)
+* log1p:                                 Other Builtins.     (line    6)
+* log1pf:                                Other Builtins.     (line    6)
+* log1pl:                                Other Builtins.     (line    6)
+* log2:                                  Other Builtins.     (line    6)
+* log2f:                                 Other Builtins.     (line    6)
+* log2l:                                 Other Builtins.     (line    6)
+* logb:                                  Other Builtins.     (line    6)
+* logbf:                                 Other Builtins.     (line    6)
+* logbl:                                 Other Builtins.     (line    6)
+* logf:                                  Other Builtins.     (line    6)
+* logl:                                  Other Builtins.     (line    6)
+* long long data types:                  Long Long.          (line    6)
+* longjmp:                               Global Reg Vars.    (line   66)
+* longjmp incompatibilities:             Incompatibilities.  (line   39)
+* longjmp warnings:                      Warning Options.    (line  579)
+* LR fixed-suffix:                       Fixed-Point.        (line    6)
+* lr fixed-suffix:                       Fixed-Point.        (line    6)
+* lrint:                                 Other Builtins.     (line    6)
+* lrintf:                                Other Builtins.     (line    6)
+* lrintl:                                Other Builtins.     (line    6)
+* lround:                                Other Builtins.     (line    6)
+* lroundf:                               Other Builtins.     (line    6)
+* lroundl:                               Other Builtins.     (line    6)
+* m in constraint:                       Simple Constraints. (line   17)
+* M32C options:                          M32C Options.       (line    6)
+* M32R/D options:                        M32R/D Options.     (line    6)
+* M680x0 options:                        M680x0 Options.     (line    6)
+* M68hc1x options:                       M68hc1x Options.    (line    6)
+* machine dependent options:             Submodel Options.   (line    6)
+* machine specific constraints:          Machine Constraints.
+                                                             (line    6)
+* macro with variable arguments:         Variadic Macros.    (line    6)
+* macros containing asm:                 Extended Asm.       (line  242)
+* macros, inline alternative:            Inline.             (line    6)
+* macros, local labels:                  Local Labels.       (line    6)
+* macros, local variables in:            Typeof.             (line   46)
+* macros, statements in expressions:     Statement Exprs.    (line    6)
+* macros, types of arguments:            Typeof.             (line    6)
+* make:                                  Preprocessor Options.
+                                                             (line  173)
+* malloc:                                Other Builtins.     (line    6)
+* malloc attribute:                      Function Attributes.
+                                                             (line  680)
+* matching constraint:                   Simple Constraints. (line  129)
+* MCore options:                         MCore Options.      (line    6)
+* member fns, automatically inline:      Inline.             (line   71)
+* memchr:                                Other Builtins.     (line    6)
+* memcmp:                                Other Builtins.     (line    6)
+* memcpy:                                Other Builtins.     (line    6)
+* memory references in constraints:      Simple Constraints. (line   17)
+* mempcpy:                               Other Builtins.     (line    6)
+* memset:                                Other Builtins.     (line    6)
+* MeP options:                           MeP Options.        (line    6)
+* Mercury:                               G++ and GCC.        (line   23)
+* message formatting:                    Language Independent Options.
+                                                             (line    6)
+* messages, warning:                     Warning Options.    (line    6)
+* messages, warning and error:           Warnings and Errors.
+                                                             (line    6)
+* middle-operands, omitted:              Conditionals.       (line    6)
+* MIPS options:                          MIPS Options.       (line    6)
+* mips16 attribute:                      Function Attributes.
+                                                             (line  690)
+* misunderstandings in C++:              C++ Misunderstandings.
+                                                             (line    6)
+* mixed declarations and code:           Mixed Declarations. (line    6)
+* mktemp, and constant strings:          Incompatibilities.  (line   13)
+* MMIX Options:                          MMIX Options.       (line    6)
+* MN10300 options:                       MN10300 Options.    (line    6)
+* mode attribute:                        Variable Attributes.
+                                                             (line  134)
+* modf:                                  Other Builtins.     (line    6)
+* modff:                                 Other Builtins.     (line    6)
+* modfl:                                 Other Builtins.     (line    6)
+* modifiers in constraints:              Modifiers.          (line    6)
+* ms_abi attribute:                      Function Attributes.
+                                                             (line  732)
+* ms_hook_prologue attribute:            Function Attributes.
+                                                             (line  744)
+* ms_struct:                             Type Attributes.    (line  319)
+* ms_struct attribute:                   Variable Attributes.
+                                                             (line  407)
+* mudflap:                               Optimize Options.   (line  359)
+* multiple alternative constraints:      Multi-Alternative.  (line    6)
+* multiprecision arithmetic:             Long Long.          (line    6)
+* n in constraint:                       Simple Constraints. (line   65)
+* named address spaces:                  Named Address Spaces.
+                                                             (line    6)
+* names used in assembler code:          Asm Labels.         (line    6)
+* naming convention, implementation headers: C++ Interface.  (line   46)
+* nearbyint:                             Other Builtins.     (line    6)
+* nearbyintf:                            Other Builtins.     (line    6)
+* nearbyintl:                            Other Builtins.     (line    6)
+* nested functions:                      Nested Functions.   (line    6)
+* newlines (escaped):                    Escaped Newlines.   (line    6)
+* nextafter:                             Other Builtins.     (line    6)
+* nextafterf:                            Other Builtins.     (line    6)
+* nextafterl:                            Other Builtins.     (line    6)
+* nexttoward:                            Other Builtins.     (line    6)
+* nexttowardf:                           Other Builtins.     (line    6)
+* nexttowardl:                           Other Builtins.     (line    6)
+* NFC:                                   Warning Options.    (line 1111)
+* NFKC:                                  Warning Options.    (line 1111)
+* NMI handler functions on the Blackfin processor: Function Attributes.
+                                                             (line  779)
+* no_instrument_function function attribute: Function Attributes.
+                                                             (line  785)
+* noclone function attribute:            Function Attributes.
+                                                             (line  800)
+* nocommon attribute:                    Variable Attributes.
+                                                             (line  105)
+* noinline function attribute:           Function Attributes.
+                                                             (line  790)
+* nomips16 attribute:                    Function Attributes.
+                                                             (line  690)
+* non-constant initializers:             Initializers.       (line    6)
+* non-static inline function:            Inline.             (line   85)
+* nonnull function attribute:            Function Attributes.
+                                                             (line  806)
+* noreturn function attribute:           Function Attributes.
+                                                             (line  829)
+* nothrow function attribute:            Function Attributes.
+                                                             (line  871)
+* o in constraint:                       Simple Constraints. (line   23)
+* OBJC_INCLUDE_PATH:                     Environment Variables.
+                                                             (line  129)
+* Objective-C <1>:                       G++ and GCC.        (line    6)
+* Objective-C:                           Standards.          (line  153)
+* Objective-C and Objective-C++ options, command line: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* Objective-C++ <1>:                     Standards.          (line  153)
+* Objective-C++:                         G++ and GCC.        (line    6)
+* offsettable address:                   Simple Constraints. (line   23)
+* old-style function definitions:        Function Prototypes.
+                                                             (line    6)
+* omitted middle-operands:               Conditionals.       (line    6)
+* open coding:                           Inline.             (line    6)
+* openmp parallel:                       C Dialect Options.  (line  224)
+* OpenRISC 1000 options:                 OpenRISC 1000 Options.
+                                                             (line    6)
+* operand constraints, asm:              Constraints.        (line    6)
+* optimize function attribute:           Function Attributes.
+                                                             (line  879)
+* optimize options:                      Optimize Options.   (line    6)
+* options to control diagnostics formatting: Language Independent Options.
+                                                             (line    6)
+* options to control warnings:           Warning Options.    (line    6)
+* options, C++:                          C++ Dialect Options.
+                                                             (line    6)
+* options, code generation:              Code Gen Options.   (line    6)
+* options, debugging:                    Debugging Options.  (line    6)
+* options, dialect:                      C Dialect Options.  (line    6)
+* options, directory search:             Directory Options.  (line    6)
+* options, GCC command:                  Invoking GCC.       (line    6)
+* options, grouping:                     Invoking GCC.       (line   26)
+* options, linking:                      Link Options.       (line    6)
+* options, Objective-C and Objective-C++: Objective-C and Objective-C++ Dialect Options.
+                                                             (line    6)
+* options, optimization:                 Optimize Options.   (line    6)
+* options, order:                        Invoking GCC.       (line   30)
+* options, preprocessor:                 Preprocessor Options.
+                                                             (line    6)
+* order of evaluation, side effects:     Non-bugs.           (line  196)
+* order of options:                      Invoking GCC.       (line   30)
+* other register constraints:            Simple Constraints. (line  153)
+* output file option:                    Overall Options.    (line  186)
+* overloaded virtual fn, warning:        C++ Dialect Options.
+                                                             (line  502)
+* p in constraint:                       Simple Constraints. (line  144)
+* packed attribute:                      Variable Attributes.
+                                                             (line  145)
+* parameter forward declaration:         Variable Length.    (line   60)
+* parameters, aliased:                   Code Gen Options.   (line  411)
+* Pascal:                                G++ and GCC.        (line   23)
+* pcs function attribute:                Function Attributes.
+                                                             (line  896)
+* PDP-11 Options:                        PDP-11 Options.     (line    6)
+* PIC:                                   Code Gen Options.   (line  184)
+* picoChip options:                      picoChip Options.   (line    6)
+* pmf:                                   Bound member functions.
+                                                             (line    6)
+* pointer arguments:                     Function Attributes.
+                                                             (line  188)
+* pointer to member function:            Bound member functions.
+                                                             (line    6)
+* portions of temporary objects, pointers to: Temporaries.   (line    6)
+* pow:                                   Other Builtins.     (line    6)
+* pow10:                                 Other Builtins.     (line    6)
+* pow10f:                                Other Builtins.     (line    6)
+* pow10l:                                Other Builtins.     (line    6)
+* PowerPC options:                       PowerPC Options.    (line    6)
+* powf:                                  Other Builtins.     (line    6)
+* powl:                                  Other Builtins.     (line    6)
+* pragma GCC optimize:                   Function Specific Option Pragmas.
+                                                             (line   20)
+* pragma GCC pop_options:                Function Specific Option Pragmas.
+                                                             (line   33)
+* pragma GCC push_options:               Function Specific Option Pragmas.
+                                                             (line   33)
+* pragma GCC reset_options:              Function Specific Option Pragmas.
+                                                             (line   43)
+* pragma GCC target:                     Function Specific Option Pragmas.
+                                                             (line    7)
+* pragma, align:                         Solaris Pragmas.    (line   11)
+* pragma, call:                          MeP Pragmas.        (line   48)
+* pragma, coprocessor available:         MeP Pragmas.        (line   13)
+* pragma, coprocessor call_saved:        MeP Pragmas.        (line   20)
+* pragma, coprocessor subclass:          MeP Pragmas.        (line   28)
+* pragma, custom io_volatile:            MeP Pragmas.        (line    7)
+* pragma, diagnostic:                    Diagnostic Pragmas. (line   44)
+* pragma, disinterrupt:                  MeP Pragmas.        (line   38)
+* pragma, extern_prefix:                 Symbol-Renaming Pragmas.
+                                                             (line   20)
+* pragma, fini:                          Solaris Pragmas.    (line   19)
+* pragma, init:                          Solaris Pragmas.    (line   24)
+* pragma, long_calls:                    ARM Pragmas.        (line   11)
+* pragma, long_calls_off:                ARM Pragmas.        (line   17)
+* pragma, longcall:                      RS/6000 and PowerPC Pragmas.
+                                                             (line   14)
+* pragma, mark:                          Darwin Pragmas.     (line   11)
+* pragma, memregs:                       M32C Pragmas.       (line    7)
+* pragma, no_long_calls:                 ARM Pragmas.        (line   14)
+* pragma, options align:                 Darwin Pragmas.     (line   14)
+* pragma, pop_macro:                     Push/Pop Macro Pragmas.
+                                                             (line   15)
+* pragma, push_macro:                    Push/Pop Macro Pragmas.
+                                                             (line   11)
+* pragma, reason for not using:          Function Attributes.
+                                                             (line 1455)
+* pragma, redefine_extname:              Symbol-Renaming Pragmas.
+                                                             (line   14)
+* pragma, segment:                       Darwin Pragmas.     (line   21)
+* pragma, unused:                        Darwin Pragmas.     (line   24)
+* pragma, visibility:                    Visibility Pragmas. (line    8)
+* pragma, weak:                          Weak Pragmas.       (line   10)
+* pragmas:                               Pragmas.            (line    6)
+* pragmas in C++, effect on inlining:    C++ Interface.      (line   66)
+* pragmas, interface and implementation: C++ Interface.      (line    6)
+* pragmas, warning of unknown:           Warning Options.    (line  596)
+* precompiled headers:                   Precompiled Headers.
+                                                             (line    6)
+* preprocessing numbers:                 Incompatibilities.  (line  173)
+* preprocessing tokens:                  Incompatibilities.  (line  173)
+* preprocessor options:                  Preprocessor Options.
+                                                             (line    6)
+* printf:                                Other Builtins.     (line    6)
+* printf_unlocked:                       Other Builtins.     (line    6)
+* prof:                                  Debugging Options.  (line  290)
+* progmem variable attribute:            Variable Attributes.
+                                                             (line  561)
+* promotion of formal parameters:        Function Prototypes.
+                                                             (line    6)
+* pure function attribute:               Function Attributes.
+                                                             (line  914)
+* push address instruction:              Simple Constraints. (line  144)
+* putchar:                               Other Builtins.     (line    6)
+* puts:                                  Other Builtins.     (line    6)
+* q floating point suffix:               Floating Types.     (line    6)
+* Q floating point suffix:               Floating Types.     (line    6)
+* qsort, and global register variables:  Global Reg Vars.    (line   42)
+* question mark:                         Multi-Alternative.  (line   27)
+* R fixed-suffix:                        Fixed-Point.        (line    6)
+* r fixed-suffix:                        Fixed-Point.        (line    6)
+* r in constraint:                       Simple Constraints. (line   56)
+* ranges in case statements:             Case Ranges.        (line    6)
+* read-only strings:                     Incompatibilities.  (line    9)
+* register variable after longjmp:       Global Reg Vars.    (line   66)
+* registers:                             Extended Asm.       (line    6)
+* registers for local variables:         Local Reg Vars.     (line    6)
+* registers in constraints:              Simple Constraints. (line   56)
+* registers, global allocation:          Explicit Reg Vars.  (line    6)
+* registers, global variables in:        Global Reg Vars.    (line    6)
+* regparm attribute:                     Function Attributes.
+                                                             (line  967)
+* relocation truncated to fit (ColdFire): M680x0 Options.    (line  328)
+* relocation truncated to fit (MIPS):    MIPS Options.       (line  199)
+* remainder:                             Other Builtins.     (line    6)
+* remainderf:                            Other Builtins.     (line    6)
+* remainderl:                            Other Builtins.     (line    6)
+* remquo:                                Other Builtins.     (line    6)
+* remquof:                               Other Builtins.     (line    6)
+* remquol:                               Other Builtins.     (line    6)
+* reordering, warning:                   C++ Dialect Options.
+                                                             (line  427)
+* reporting bugs:                        Bugs.               (line    6)
+* resbank attribute:                     Function Attributes.
+                                                             (line  999)
+* rest argument (in macro):              Variadic Macros.    (line    6)
+* restricted pointers:                   Restricted Pointers.
+                                                             (line    6)
+* restricted references:                 Restricted Pointers.
+                                                             (line    6)
+* restricted this pointer:               Restricted Pointers.
+                                                             (line    6)
+* returns_twice attribute:               Function Attributes.
+                                                             (line 1013)
+* rindex:                                Other Builtins.     (line    6)
+* rint:                                  Other Builtins.     (line    6)
+* rintf:                                 Other Builtins.     (line    6)
+* rintl:                                 Other Builtins.     (line    6)
+* round:                                 Other Builtins.     (line    6)
+* roundf:                                Other Builtins.     (line    6)
+* roundl:                                Other Builtins.     (line    6)
+* RS/6000 and PowerPC Options:           RS/6000 and PowerPC Options.
+                                                             (line    6)
+* RTTI:                                  Vague Linkage.      (line   43)
+* run-time options:                      Code Gen Options.   (line    6)
+* RX Options:                            RX Options.         (line    6)
+* s in constraint:                       Simple Constraints. (line   92)
+* S/390 and zSeries Options:             S/390 and zSeries Options.
+                                                             (line    6)
+* save all registers on the Blackfin, H8/300, H8/300H, and H8S: Function Attributes.
+                                                             (line 1022)
+* scalb:                                 Other Builtins.     (line    6)
+* scalbf:                                Other Builtins.     (line    6)
+* scalbl:                                Other Builtins.     (line    6)
+* scalbln:                               Other Builtins.     (line    6)
+* scalblnf:                              Other Builtins.     (line    6)
+* scalbn:                                Other Builtins.     (line    6)
+* scalbnf:                               Other Builtins.     (line    6)
+* scanf, and constant strings:           Incompatibilities.  (line   17)
+* scanfnl:                               Other Builtins.     (line    6)
+* scope of a variable length array:      Variable Length.    (line   23)
+* scope of declaration:                  Disappointments.    (line   21)
+* scope of external declarations:        Incompatibilities.  (line   80)
+* Score Options:                         Score Options.      (line    6)
+* search path:                           Directory Options.  (line    6)
+* section function attribute:            Function Attributes.
+                                                             (line 1027)
+* section variable attribute:            Variable Attributes.
+                                                             (line  166)
+* sentinel function attribute:           Function Attributes.
+                                                             (line 1043)
+* setjmp:                                Global Reg Vars.    (line   66)
+* setjmp incompatibilities:              Incompatibilities.  (line   39)
+* shared strings:                        Incompatibilities.  (line    9)
+* shared variable attribute:             Variable Attributes.
+                                                             (line  211)
+* side effect in ?::                     Conditionals.       (line   20)
+* side effects, macro argument:          Statement Exprs.    (line   35)
+* side effects, order of evaluation:     Non-bugs.           (line  196)
+* signal handler functions on the AVR processors: Function Attributes.
+                                                             (line 1074)
+* signbit:                               Other Builtins.     (line    6)
+* signbitd128:                           Other Builtins.     (line    6)
+* signbitd32:                            Other Builtins.     (line    6)
+* signbitd64:                            Other Builtins.     (line    6)
+* signbitf:                              Other Builtins.     (line    6)
+* signbitl:                              Other Builtins.     (line    6)
+* signed and unsigned values, comparison warning: Warning Options.
+                                                             (line  975)
+* significand:                           Other Builtins.     (line    6)
+* significandf:                          Other Builtins.     (line    6)
+* significandl:                          Other Builtins.     (line    6)
+* simple constraints:                    Simple Constraints. (line    6)
+* sin:                                   Other Builtins.     (line    6)
+* sincos:                                Other Builtins.     (line    6)
+* sincosf:                               Other Builtins.     (line    6)
+* sincosl:                               Other Builtins.     (line    6)
+* sinf:                                  Other Builtins.     (line    6)
+* sinh:                                  Other Builtins.     (line    6)
+* sinhf:                                 Other Builtins.     (line    6)
+* sinhl:                                 Other Builtins.     (line    6)
+* sinl:                                  Other Builtins.     (line    6)
+* sizeof:                                Typeof.             (line    6)
+* smaller data references:               M32R/D Options.     (line   57)
+* smaller data references (PowerPC):     RS/6000 and PowerPC Options.
+                                                             (line  682)
+* snprintf:                              Other Builtins.     (line    6)
+* SPARC options:                         SPARC Options.      (line    6)
+* Spec Files:                            Spec Files.         (line    6)
+* specified registers:                   Explicit Reg Vars.  (line    6)
+* specifying compiler version and target machine: Target Options.
+                                                             (line    6)
+* specifying hardware config:            Submodel Options.   (line    6)
+* specifying machine version:            Target Options.     (line    6)
+* specifying registers for local variables: Local Reg Vars.  (line    6)
+* speed of compilation:                  Precompiled Headers.
+                                                             (line    6)
+* sprintf:                               Other Builtins.     (line    6)
+* SPU options:                           SPU Options.        (line    6)
+* sqrt:                                  Other Builtins.     (line    6)
+* sqrtf:                                 Other Builtins.     (line    6)
+* sqrtl:                                 Other Builtins.     (line    6)
+* sscanf:                                Other Builtins.     (line    6)
+* sscanf, and constant strings:          Incompatibilities.  (line   17)
+* sseregparm attribute:                  Function Attributes.
+                                                             (line  984)
+* statements inside expressions:         Statement Exprs.    (line    6)
+* static data in C++, declaring and defining: Static Definitions.
+                                                             (line    6)
+* stpcpy:                                Other Builtins.     (line    6)
+* stpncpy:                               Other Builtins.     (line    6)
+* strcasecmp:                            Other Builtins.     (line    6)
+* strcat:                                Other Builtins.     (line    6)
+* strchr:                                Other Builtins.     (line    6)
+* strcmp:                                Other Builtins.     (line    6)
+* strcpy:                                Other Builtins.     (line    6)
+* strcspn:                               Other Builtins.     (line    6)
+* strdup:                                Other Builtins.     (line    6)
+* strfmon:                               Other Builtins.     (line    6)
+* strftime:                              Other Builtins.     (line    6)
+* string constants:                      Incompatibilities.  (line    9)
+* strlen:                                Other Builtins.     (line    6)
+* strncasecmp:                           Other Builtins.     (line    6)
+* strncat:                               Other Builtins.     (line    6)
+* strncmp:                               Other Builtins.     (line    6)
+* strncpy:                               Other Builtins.     (line    6)
+* strndup:                               Other Builtins.     (line    6)
+* strpbrk:                               Other Builtins.     (line    6)
+* strrchr:                               Other Builtins.     (line    6)
+* strspn:                                Other Builtins.     (line    6)
+* strstr:                                Other Builtins.     (line    6)
+* struct:                                Unnamed Fields.     (line    6)
+* structures:                            Incompatibilities.  (line  146)
+* structures, constructor expression:    Compound Literals.  (line    6)
+* submodel options:                      Submodel Options.   (line    6)
+* subscripting:                          Subscripting.       (line    6)
+* subscripting and function values:      Subscripting.       (line    6)
+* suffixes for C++ source:               Invoking G++.       (line    6)
+* SUNPRO_DEPENDENCIES:                   Environment Variables.
+                                                             (line  169)
+* suppressing warnings:                  Warning Options.    (line    6)
+* surprises in C++:                      C++ Misunderstandings.
+                                                             (line    6)
+* syntax checking:                       Warning Options.    (line   13)
+* syscall_linkage attribute:             Function Attributes.
+                                                             (line 1096)
+* system headers, warnings from:         Warning Options.    (line  710)
+* sysv_abi attribute:                    Function Attributes.
+                                                             (line  732)
+* tan:                                   Other Builtins.     (line    6)
+* tanf:                                  Other Builtins.     (line    6)
+* tanh:                                  Other Builtins.     (line    6)
+* tanhf:                                 Other Builtins.     (line    6)
+* tanhl:                                 Other Builtins.     (line    6)
+* tanl:                                  Other Builtins.     (line    6)
+* target function attribute:             Function Attributes.
+                                                             (line 1103)
+* target machine, specifying:            Target Options.     (line    6)
+* target options:                        Target Options.     (line    6)
+* target("abm") attribute:               Function Attributes.
+                                                             (line 1130)
+* target("aes") attribute:               Function Attributes.
+                                                             (line 1135)
+* target("align-stringops") attribute:   Function Attributes.
+                                                             (line 1225)
+* target("arch=ARCH") attribute:         Function Attributes.
+                                                             (line 1234)
+* target("cld") attribute:               Function Attributes.
+                                                             (line 1196)
+* target("fancy-math-387") attribute:    Function Attributes.
+                                                             (line 1200)
+* target("fma4") attribute:              Function Attributes.
+                                                             (line 1180)
+* target("fpmath=FPMATH") attribute:     Function Attributes.
+                                                             (line 1242)
+* target("fused-madd") attribute:        Function Attributes.
+                                                             (line 1205)
+* target("ieee-fp") attribute:           Function Attributes.
+                                                             (line 1210)
+* target("inline-all-stringops") attribute: Function Attributes.
+                                                             (line 1215)
+* target("inline-stringops-dynamically") attribute: Function Attributes.
+                                                             (line 1219)
+* target("lwp") attribute:               Function Attributes.
+                                                             (line 1188)
+* target("mmx") attribute:               Function Attributes.
+                                                             (line 1139)
+* target("pclmul") attribute:            Function Attributes.
+                                                             (line 1143)
+* target("popcnt") attribute:            Function Attributes.
+                                                             (line 1147)
+* target("recip") attribute:             Function Attributes.
+                                                             (line 1229)
+* target("sse") attribute:               Function Attributes.
+                                                             (line 1151)
+* target("sse2") attribute:              Function Attributes.
+                                                             (line 1155)
+* target("sse3") attribute:              Function Attributes.
+                                                             (line 1159)
+* target("sse4") attribute:              Function Attributes.
+                                                             (line 1163)
+* target("sse4.1") attribute:            Function Attributes.
+                                                             (line 1168)
+* target("sse4.2") attribute:            Function Attributes.
+                                                             (line 1172)
+* target("sse4a") attribute:             Function Attributes.
+                                                             (line 1176)
+* target("ssse3") attribute:             Function Attributes.
+                                                             (line 1192)
+* target("tune=TUNE") attribute:         Function Attributes.
+                                                             (line 1238)
+* target("xop") attribute:               Function Attributes.
+                                                             (line 1184)
+* TC1:                                   Standards.          (line   13)
+* TC2:                                   Standards.          (line   13)
+* TC3:                                   Standards.          (line   13)
+* Technical Corrigenda:                  Standards.          (line   13)
+* Technical Corrigendum 1:               Standards.          (line   13)
+* Technical Corrigendum 2:               Standards.          (line   13)
+* Technical Corrigendum 3:               Standards.          (line   13)
+* template instantiation:                Template Instantiation.
+                                                             (line    6)
+* temporaries, lifetime of:              Temporaries.        (line    6)
+* tgamma:                                Other Builtins.     (line    6)
+* tgammaf:                               Other Builtins.     (line    6)
+* tgammal:                               Other Builtins.     (line    6)
+* Thread-Local Storage:                  Thread-Local.       (line    6)
+* thunks:                                Nested Functions.   (line    6)
+* tiny data section on the H8/300H and H8S: Function Attributes.
+                                                             (line 1260)
+* TLS:                                   Thread-Local.       (line    6)
+* tls_model attribute:                   Variable Attributes.
+                                                             (line  235)
+* TMPDIR:                                Environment Variables.
+                                                             (line   45)
+* toascii:                               Other Builtins.     (line    6)
+* tolower:                               Other Builtins.     (line    6)
+* toupper:                               Other Builtins.     (line    6)
+* towlower:                              Other Builtins.     (line    6)
+* towupper:                              Other Builtins.     (line    6)
+* traditional C language:                C Dialect Options.  (line  253)
+* trunc:                                 Other Builtins.     (line    6)
+* truncf:                                Other Builtins.     (line    6)
+* truncl:                                Other Builtins.     (line    6)
+* two-stage name lookup:                 Name lookup.        (line    6)
+* type alignment:                        Alignment.          (line    6)
+* type attributes:                       Type Attributes.    (line    6)
+* type_info:                             Vague Linkage.      (line   43)
+* typedef names as function parameters:  Incompatibilities.  (line   97)
+* typeof:                                Typeof.             (line    6)
+* UHK fixed-suffix:                      Fixed-Point.        (line    6)
+* uhk fixed-suffix:                      Fixed-Point.        (line    6)
+* UHR fixed-suffix:                      Fixed-Point.        (line    6)
+* uhr fixed-suffix:                      Fixed-Point.        (line    6)
+* uk fixed-suffix:                       Fixed-Point.        (line    6)
+* UK fixed-suffix:                       Fixed-Point.        (line    6)
+* ulk fixed-suffix:                      Fixed-Point.        (line    6)
+* ULK fixed-suffix:                      Fixed-Point.        (line    6)
+* ULL integer suffix:                    Long Long.          (line    6)
+* ULLK fixed-suffix:                     Fixed-Point.        (line    6)
+* ullk fixed-suffix:                     Fixed-Point.        (line    6)
+* ULLR fixed-suffix:                     Fixed-Point.        (line    6)
+* ullr fixed-suffix:                     Fixed-Point.        (line    6)
+* ULR fixed-suffix:                      Fixed-Point.        (line    6)
+* ulr fixed-suffix:                      Fixed-Point.        (line    6)
+* undefined behavior:                    Bug Criteria.       (line   17)
+* undefined function value:              Bug Criteria.       (line   17)
+* underscores in variables in macros:    Typeof.             (line   46)
+* union:                                 Unnamed Fields.     (line    6)
+* union, casting to a:                   Cast to Union.      (line    6)
+* unions:                                Incompatibilities.  (line  146)
+* unknown pragmas, warning:              Warning Options.    (line  596)
+* unresolved references and -nodefaultlibs: Link Options.    (line   82)
+* unresolved references and -nostdlib:   Link Options.       (line   82)
+* unused attribute.:                     Function Attributes.
+                                                             (line 1272)
+* ur fixed-suffix:                       Fixed-Point.        (line    6)
+* UR fixed-suffix:                       Fixed-Point.        (line    6)
+* use_debug_exception_return attribute:  Function Attributes.
+                                                             (line  593)
+* use_shadow_register_set attribute:     Function Attributes.
+                                                             (line  584)
+* used attribute.:                       Function Attributes.
+                                                             (line 1277)
+* User stack pointer in interrupts on the Blackfin: Function Attributes.
+                                                             (line  631)
+* V in constraint:                       Simple Constraints. (line   43)
+* V850 Options:                          V850 Options.       (line    6)
+* vague linkage:                         Vague Linkage.      (line    6)
+* value after longjmp:                   Global Reg Vars.    (line   66)
+* variable addressability on the IA-64:  Function Attributes.
+                                                             (line  704)
+* variable addressability on the M32R/D: Variable Attributes.
+                                                             (line  336)
+* variable alignment:                    Alignment.          (line    6)
+* variable attributes:                   Variable Attributes.
+                                                             (line    6)
+* variable number of arguments:          Variadic Macros.    (line    6)
+* variable-length array scope:           Variable Length.    (line   23)
+* variable-length arrays:                Variable Length.    (line    6)
+* variables in specified registers:      Explicit Reg Vars.  (line    6)
+* variables, local, in macros:           Typeof.             (line   46)
+* variadic macros:                       Variadic Macros.    (line    6)
+* VAX options:                           VAX Options.        (line    6)
+* version_id attribute:                  Function Attributes.
+                                                             (line 1283)
+* vfprintf:                              Other Builtins.     (line    6)
+* vfscanf:                               Other Builtins.     (line    6)
+* visibility attribute:                  Function Attributes.
+                                                             (line 1293)
+* VLAs:                                  Variable Length.    (line    6)
+* vliw attribute:                        Function Attributes.
+                                                             (line 1387)
+* void pointers, arithmetic:             Pointer Arith.      (line    6)
+* void, size of pointer to:              Pointer Arith.      (line    6)
+* volatile access:                       Volatiles.          (line    6)
+* volatile applied to function:          Function Attributes.
+                                                             (line    6)
+* volatile read:                         Volatiles.          (line    6)
+* volatile write:                        Volatiles.          (line    6)
+* vprintf:                               Other Builtins.     (line    6)
+* vscanf:                                Other Builtins.     (line    6)
+* vsnprintf:                             Other Builtins.     (line    6)
+* vsprintf:                              Other Builtins.     (line    6)
+* vsscanf:                               Other Builtins.     (line    6)
+* vtable:                                Vague Linkage.      (line   28)
+* VxWorks Options:                       VxWorks Options.    (line    6)
+* w floating point suffix:               Floating Types.     (line    6)
+* W floating point suffix:               Floating Types.     (line    6)
+* warn_unused_result attribute:          Function Attributes.
+                                                             (line 1393)
+* warning for comparison of signed and unsigned values: Warning Options.
+                                                             (line  975)
+* warning for overloaded virtual fn:     C++ Dialect Options.
+                                                             (line  502)
+* warning for reordering of member initializers: C++ Dialect Options.
+                                                             (line  427)
+* warning for unknown pragmas:           Warning Options.    (line  596)
+* warning function attribute:            Function Attributes.
+                                                             (line  165)
+* warning messages:                      Warning Options.    (line    6)
+* warnings from system headers:          Warning Options.    (line  710)
+* warnings vs errors:                    Warnings and Errors.
+                                                             (line    6)
+* weak attribute:                        Function Attributes.
+                                                             (line 1410)
+* weakref attribute:                     Function Attributes.
+                                                             (line 1419)
+* whitespace:                            Incompatibilities.  (line  112)
+* X in constraint:                       Simple Constraints. (line  114)
+* X3.159-1989:                           Standards.          (line   13)
+* x86-64 Options:                        i386 and x86-64 Options.
+                                                             (line    6)
+* x86-64 options:                        x86-64 Options.     (line    6)
+* Xstormy16 Options:                     Xstormy16 Options.  (line    6)
+* Xtensa Options:                        Xtensa Options.     (line    6)
+* y0:                                    Other Builtins.     (line    6)
+* y0f:                                   Other Builtins.     (line    6)
+* y0l:                                   Other Builtins.     (line    6)
+* y1:                                    Other Builtins.     (line    6)
+* y1f:                                   Other Builtins.     (line    6)
+* y1l:                                   Other Builtins.     (line    6)
+* yn:                                    Other Builtins.     (line    6)
+* ynf:                                   Other Builtins.     (line    6)
+* ynl:                                   Other Builtins.     (line    6)
+* zero-length arrays:                    Zero Length.        (line    6)
+* zero-size structures:                  Empty Structures.   (line    6)
+* zSeries options:                       zSeries Options.    (line    6)
+
+
+
+Tag Table:
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+Node: G++ and GCC3833
+Node: Standards5898
+Node: Invoking GCC14864
+Node: Option Summary18615
+Node: Overall Options54310
+Node: Invoking G++68817
+Node: C Dialect Options70340
+Node: C++ Dialect Options84272
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+Ref: Wtrigraphs351542
+Ref: dashMF356290
+Ref: fdollars-in-identifiers366831
+Node: Assembler Options375392
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+Ref: Link Options-Footnote-1386455
+Node: Directory Options386789
+Node: Spec Files392851
+Node: Target Options413661
+Node: Submodel Options415179
+Node: ARC Options416974
+Node: ARM Options418461
+Node: AVR Options431363
+Node: Blackfin Options433218
+Node: CRIS Options441166
+Node: CRX Options444907
+Node: Darwin Options445332
+Node: DEC Alpha Options452824
+Node: DEC Alpha/VMS Options464740
+Node: FR30 Options465314
+Node: FRV Options465889
+Node: GNU/Linux Options472606
+Node: H8/300 Options473064
+Node: HPPA Options474131
+Node: i386 and x86-64 Options483631
+Node: IA-64 Options512634
+Node: IA-64/VMS Options520652
+Node: LM32 Options521207
+Node: M32C Options521736
+Node: M32R/D Options523026
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+Node: M68hc1x Options540620
+Node: MCore Options542189
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+Node: MIPS Options547663
+Node: MMIX Options575562
+Node: MN10300 Options578044
+Node: OpenRISC 1000 Options579473
+Node: PDP-11 Options582867
+Node: picoChip Options584713
+Node: PowerPC Options586912
+Node: RS/6000 and PowerPC Options587148
+Node: RX Options618947
+Node: S/390 and zSeries Options624531
+Node: Score Options632462
+Node: SH Options633290
+Node: SPARC Options644144
+Node: SPU Options655117
+Node: System V Options660121
+Node: V850 Options660944
+Node: VAX Options664084
+Node: VxWorks Options664632
+Node: x86-64 Options665787
+Node: i386 and x86-64 Windows Options666005
+Node: Xstormy16 Options669234
+Node: Xtensa Options669523
+Node: zSeries Options673670
+Node: Code Gen Options673866
+Node: Environment Variables698573
+Node: Precompiled Headers706469
+Node: C Implementation712670
+Node: Translation implementation714333
+Node: Environment implementation714907
+Node: Identifiers implementation715457
+Node: Characters implementation716511
+Node: Integers implementation719317
+Node: Floating point implementation721142
+Node: Arrays and pointers implementation724071
+Ref: Arrays and pointers implementation-Footnote-1725506
+Node: Hints implementation725630
+Node: Structures unions enumerations and bit-fields implementation727096
+Node: Qualifiers implementation729082
+Node: Declarators implementation730854
+Node: Statements implementation731196
+Node: Preprocessing directives implementation731523
+Node: Library functions implementation733628
+Node: Architecture implementation734268
+Node: Locale-specific behavior implementation734971
+Node: C++ Implementation735276
+Node: Conditionally-supported behavior736533
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+Node: Labels as Values749224
+Ref: Labels as Values-Footnote-1751633
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+Node: Typeof760472
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+Node: Complex766179
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+Node: Empty Structures782534
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+Node: Explicit Reg Vars998773
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+Node: Alpha Built-in Functions1057981
+Node: ARM iWMMXt Built-in Functions1060980
+Node: ARM NEON Intrinsics1067699
+Node: Blackfin Built-in Functions1275531
+Node: FR-V Built-in Functions1276145
+Node: Argument Types1277004
+Node: Directly-mapped Integer Functions1278760
+Node: Directly-mapped Media Functions1279842
+Node: Raw read/write Functions1286874
+Node: Other Built-in Functions1287786
+Node: X86 Built-in Functions1288975
+Node: MIPS DSP Built-in Functions1332406
+Node: MIPS Paired-Single Support1344853
+Node: MIPS Loongson Built-in Functions1346354
+Node: Paired-Single Arithmetic1352872
+Node: Paired-Single Built-in Functions1353818
+Node: MIPS-3D Built-in Functions1356488
+Node: picoChip Built-in Functions1361863
+Node: Other MIPS Built-in Functions1363229
+Node: PowerPC AltiVec/VSX Built-in Functions1363753
+Node: RX Built-in Functions1469900
+Node: SPARC VIS Built-in Functions1473910
+Node: SPU Built-in Functions1475589
+Node: Target Format Checks1477371
+Node: Solaris Format Checks1477778
+Node: Pragmas1478175
+Node: ARM Pragmas1478885
+Node: M32C Pragmas1479488
+Node: MeP Pragmas1480048
+Node: RS/6000 and PowerPC Pragmas1482117
+Node: Darwin Pragmas1482858
+Node: Solaris Pragmas1483925
+Node: Symbol-Renaming Pragmas1485086
+Node: Structure-Packing Pragmas1487720
+Node: Weak Pragmas1489372
+Node: Diagnostic Pragmas1490174
+Node: Visibility Pragmas1492810
+Node: Push/Pop Macro Pragmas1493562
+Node: Function Specific Option Pragmas1494535
+Node: Unnamed Fields1496750
+Node: Thread-Local1498260
+Node: C99 Thread-Local Edits1500369
+Node: C++98 Thread-Local Edits1502381
+Node: Binary constants1505826
+Node: C++ Extensions1506497
+Node: Volatiles1508145
+Node: Restricted Pointers1510821
+Node: Vague Linkage1512415
+Node: C++ Interface1516071
+Ref: C++ Interface-Footnote-11520368
+Node: Template Instantiation1520505
+Node: Bound member functions1527517
+Node: C++ Attributes1529060
+Node: Namespace Association1530718
+Node: Type Traits1532132
+Node: Java Exceptions1537679
+Node: Deprecated Features1539076
+Node: Backwards Compatibility1542041
+Node: Objective-C1543399
+Node: Executing code before main1543980
+Node: What you can and what you cannot do in +load1546586
+Node: Type encoding1548753
+Node: Garbage Collection1552140
+Node: Constant string objects1554764
+Node: compatibility_alias1557272
+Node: Compatibility1558150
+Node: Gcov1564717
+Node: Gcov Intro1565250
+Node: Invoking Gcov1567968
+Node: Gcov and Optimization1579831
+Node: Gcov Data Files1582486
+Node: Cross-profiling1583626
+Node: Trouble1585454
+Node: Actual Bugs1586939
+Node: Cross-Compiler Problems1587395
+Node: Interoperation1587809
+Node: Incompatibilities1594946
+Node: Fixed Headers1603097
+Node: Standard Libraries1604760
+Node: Disappointments1606132
+Node: C++ Misunderstandings1610490
+Node: Static Definitions1611301
+Node: Name lookup1612354
+Ref: Name lookup-Footnote-11617132
+Node: Temporaries1617319
+Node: Copy Assignment1619295
+Node: Non-bugs1621102
+Node: Warnings and Errors1631609
+Node: Bugs1633373
+Node: Bug Criteria1633937
+Node: Bug Reporting1636147
+Node: Service1636380
+Node: Contributing1637199
+Node: Funding1637939
+Node: GNU Project1640428
+Node: Copying1641074
+Node: GNU Free Documentation License1678602
+Node: Contributors1701008
+Node: Option Index1737906
+Node: Keyword Index1910140
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gccinstall.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gccinstall.info
new file mode 100644
index 00000000..d46a6b7c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gccinstall.info
@@ -0,0 +1,4542 @@
+This is doc/gccinstall.info, produced by makeinfo version 4.13 from
+../../../gcc-4.5.1/gcc/doc/install.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free
+Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+   Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008 Free
+Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, the Front-Cover texts being (a) (see below), and
+with the Back-Cover Texts being (b) (see below).  A copy of the license
+is included in the section entitled "GNU Free Documentation License".
+
+   (a) The FSF's Front-Cover Text is:
+
+   A GNU Manual
+
+   (b) The FSF's Back-Cover Text is:
+
+   You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gccinstall: (gccinstall).    Installing the GNU Compiler Collection.
+END-INFO-DIR-ENTRY
+
+
+File: gccinstall.info,  Node: Top,  Up: (dir)
+
+* Menu:
+
+* Installing GCC::  This document describes the generic installation
+                    procedure for GCC as well as detailing some target
+                    specific installation instructions.
+
+* Specific::        Host/target specific installation notes for GCC.
+* Binaries::        Where to get pre-compiled binaries.
+
+* Old::             Old installation documentation.
+
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Concept Index::   This index has two entries.
+
+
+File: gccinstall.info,  Node: Installing GCC,  Next: Binaries,  Up: Top
+
+1 Installing GCC
+****************
+
+   The latest version of this document is always available at
+http://gcc.gnu.org/install/.
+
+   This document describes the generic installation procedure for GCC
+as well as detailing some target specific installation instructions.
+
+   GCC includes several components that previously were separate
+distributions with their own installation instructions.  This document
+supersedes all package specific installation instructions.
+
+   _Before_ starting the build/install procedure please check the *note
+host/target specific installation notes: Specific.  We recommend you
+browse the entire generic installation instructions before you proceed.
+
+   Lists of successful builds for released versions of GCC are
+available at `http://gcc.gnu.org/buildstat.html'.  These lists are
+updated as new information becomes available.
+
+   The installation procedure itself is broken into five steps.
+
+* Menu:
+
+* Prerequisites::
+* Downloading the source::
+* Configuration::
+* Building::
+* Testing:: (optional)
+* Final install::
+
+   Please note that GCC does not support `make uninstall' and probably
+won't do so in the near future as this would open a can of worms.
+Instead, we suggest that you install GCC into a directory of its own
+and simply remove that directory when you do not need that specific
+version of GCC any longer, and, if shared libraries are installed there
+as well, no more binaries exist that use them.
+
+
+File: gccinstall.info,  Node: Prerequisites,  Next: Downloading the source,  Up: Installing GCC
+
+2 Prerequisites
+***************
+
+   GCC requires that various tools and packages be available for use in
+the build procedure.  Modifying GCC sources requires additional tools
+described below.
+
+Tools/packages necessary for building GCC
+=========================================
+
+ISO C90 compiler
+     Necessary to bootstrap GCC, although versions of GCC prior to 3.4
+     also allow bootstrapping with a traditional (K&R) C compiler.
+
+     To build all languages in a cross-compiler or other configuration
+     where 3-stage bootstrap is not performed, you need to start with
+     an existing GCC binary (version 2.95 or later) because source code
+     for language frontends other than C might use GCC extensions.
+
+GNAT
+     In order to build the Ada compiler (GNAT) you must already have
+     GNAT installed because portions of the Ada frontend are written in
+     Ada (with GNAT extensions.)  Refer to the Ada installation
+     instructions for more specific information.
+
+A "working" POSIX compatible shell, or GNU bash
+     Necessary when running `configure' because some `/bin/sh' shells
+     have bugs and may crash when configuring the target libraries.  In
+     other cases, `/bin/sh' or `ksh' have disastrous corner-case
+     performance problems.  This can cause target `configure' runs to
+     literally take days to complete in some cases.
+
+     So on some platforms `/bin/ksh' is sufficient, on others it isn't.
+     See the host/target specific instructions for your platform, or
+     use `bash' to be sure.  Then set `CONFIG_SHELL' in your
+     environment to your "good" shell prior to running
+     `configure'/`make'.
+
+     `zsh' is not a fully compliant POSIX shell and will not work when
+     configuring GCC.
+
+A POSIX or SVR4 awk
+     Necessary for creating some of the generated source files for GCC.
+     If in doubt, use a recent GNU awk version, as some of the older
+     ones are broken.  GNU awk version 3.1.5 is known to work.
+
+GNU binutils
+     Necessary in some circumstances, optional in others.  See the
+     host/target specific instructions for your platform for the exact
+     requirements.
+
+gzip version 1.2.4 (or later) or
+bzip2 version 1.0.2 (or later)
+     Necessary to uncompress GCC `tar' files when source code is
+     obtained via FTP mirror sites.
+
+GNU make version 3.80 (or later)
+     You must have GNU make installed to build GCC.
+
+GNU tar version 1.14 (or later)
+     Necessary (only on some platforms) to untar the source code.  Many
+     systems' `tar' programs will also work, only try GNU `tar' if you
+     have problems.
+
+GNU Multiple Precision Library (GMP) version 4.3.2 (or later)
+     Necessary to build GCC.  If you do not have it installed in your
+     library search path, you will have to configure with the
+     `--with-gmp' configure option.  See also `--with-gmp-lib' and
+     `--with-gmp-include'.  Alternatively, if a GMP source distribution
+     is found in a subdirectory of your GCC sources named `gmp', it
+     will be built together with GCC.
+
+MPFR Library version 2.4.2 (or later)
+     Necessary to build GCC.  It can be downloaded from
+     `http://www.mpfr.org/'.  The `--with-mpfr' configure option should
+     be used if your MPFR Library is not installed in your default
+     library search path.  See also `--with-mpfr-lib' and
+     `--with-mpfr-include'.  Alternatively, if a MPFR source
+     distribution is found in a subdirectory of your GCC sources named
+     `mpfr', it will be built together with GCC.
+
+MPC Library version 0.8.1 (or later)
+     Necessary to build GCC.  It can be downloaded from
+     `http://www.multiprecision.org/'.  The `--with-mpc' configure
+     option should be used if your MPC Library is not installed in your
+     default library search path.  See also `--with-mpc-lib' and
+     `--with-mpc-include'.  Alternatively, if an MPC source
+     distribution is found in a subdirectory of your GCC sources named
+     `mpc', it will be built together with GCC.
+
+Parma Polyhedra Library (PPL) version 0.10
+     Necessary to build GCC with the Graphite loop optimizations.  It
+     can be downloaded from `http://www.cs.unipr.it/ppl/Download/'.
+
+     The `--with-ppl' configure option should be used if PPL is not
+     installed in your default library search path.
+
+CLooG-PPL version 0.15
+     Necessary to build GCC with the Graphite loop optimizations.  It
+     can be downloaded from `ftp://gcc.gnu.org/pub/gcc/infrastructure/'.
+     The code in `cloog-ppl-0.15.tar.gz' comes from a branch of CLooG
+     available from `http://repo.or.cz/w/cloog-ppl.git'.  CLooG-PPL
+     should be configured with `--with-ppl'.
+
+     The `--with-cloog' configure option should be used if CLooG is not
+     installed in your default library search path.
+
+`jar', or InfoZIP (`zip' and `unzip')
+     Necessary to build libgcj, the GCJ runtime.
+
+libelf version 0.8.12 (or later)
+     Necessary to build link-time optimization (LTO) support.  It can be
+     downloaded from
+     `http://www.mr511.de/software/libelf-0.8.12.tar.gz', though it is
+     commonly available in several systems.  The versions in IRIX 5 and
+     6 don't work since they lack `gelf.h'.  The version in Solaris 2
+     does work.
+
+     The `--with-libelf' configure option should be used if libelf is
+     not installed in your default library search patch.
+
+
+Tools/packages necessary for modifying GCC
+==========================================
+
+autoconf version 2.64
+GNU m4 version 1.4.6 (or later)
+     Necessary when modifying `configure.ac', `aclocal.m4', etc.  to
+     regenerate `configure' and `config.in' files.
+
+automake version 1.11.1
+     Necessary when modifying a `Makefile.am' file to regenerate its
+     associated `Makefile.in'.
+
+     Much of GCC does not use automake, so directly edit the
+     `Makefile.in' file.  Specifically this applies to the `gcc',
+     `intl', `libcpp', `libiberty', `libobjc' directories as well as
+     any of their subdirectories.
+
+     For directories that use automake, GCC requires the latest release
+     in the 1.11 series, which is currently 1.11.1.  When regenerating
+     a directory to a newer version, please update all the directories
+     using an older 1.11 to the latest released version.
+
+gettext version 0.14.5 (or later)
+     Needed to regenerate `gcc.pot'.
+
+gperf version 2.7.2 (or later)
+     Necessary when modifying `gperf' input files, e.g.
+     `gcc/cp/cfns.gperf' to regenerate its associated header file, e.g.
+     `gcc/cp/cfns.h'.
+
+DejaGnu 1.4.4
+Expect
+Tcl
+     Necessary to run the GCC testsuite; see the section on testing for
+     details.
+
+autogen version 5.5.4 (or later) and
+guile version 1.4.1 (or later)
+     Necessary to regenerate `fixinc/fixincl.x' from
+     `fixinc/inclhack.def' and `fixinc/*.tpl'.
+
+     Necessary to run `make check' for `fixinc'.
+
+     Necessary to regenerate the top level `Makefile.in' file from
+     `Makefile.tpl' and `Makefile.def'.
+
+Flex version 2.5.4 (or later)
+     Necessary when modifying `*.l' files.
+
+     Necessary to build GCC during development because the generated
+     output files are not included in the SVN repository.  They are
+     included in releases.
+
+Texinfo version 4.7 (or later)
+     Necessary for running `makeinfo' when modifying `*.texi' files to
+     test your changes.
+
+     Necessary for running `make dvi' or `make pdf' to create printable
+     documentation in DVI or PDF format.  Texinfo version 4.8 or later
+     is required for `make pdf'.
+
+     Necessary to build GCC documentation during development because the
+     generated output files are not included in the SVN repository.
+     They are included in releases.
+
+TeX (any working version)
+     Necessary for running `texi2dvi' and `texi2pdf', which are used
+     when running `make dvi' or `make pdf' to create DVI or PDF files,
+     respectively.
+
+SVN (any version)
+SSH (any version)
+     Necessary to access the SVN repository.  Public releases and weekly
+     snapshots of the development sources are also available via FTP.
+
+Perl version 5.6.1 (or later)
+     Necessary when regenerating `Makefile' dependencies in libiberty.
+     Necessary when regenerating `libiberty/functions.texi'.  Necessary
+     when generating manpages from Texinfo manuals.  Necessary when
+     targetting Darwin, building libstdc++, and not using
+     `--disable-symvers'.  Used by various scripts to generate some
+     files included in SVN (mainly Unicode-related and rarely changing)
+     from source tables.
+
+GNU diffutils version 2.7 (or later)
+     Useful when submitting patches for the GCC source code.
+
+patch version 2.5.4 (or later)
+     Necessary when applying patches, created with `diff', to one's own
+     sources.
+
+ecj1
+gjavah
+     If you wish to modify `.java' files in libjava, you will need to
+     configure with `--enable-java-maintainer-mode', and you will need
+     to have executables named `ecj1' and `gjavah' in your path.  The
+     `ecj1' executable should run the Eclipse Java compiler via the
+     GCC-specific entry point.  You can download a suitable jar from
+     `ftp://sourceware.org/pub/java/', or by running the script
+     `contrib/download_ecj'.
+
+antlr.jar version 2.7.1 (or later)
+antlr binary
+     If you wish to build the `gjdoc' binary in libjava, you will need
+     to have an `antlr.jar' library available. The library is searched
+     in system locations but can be configured with `--with-antlr-jar='
+     instead.  When configuring with `--enable-java-maintainer-mode',
+     you will need to have one of the executables named `cantlr',
+     `runantlr' or `antlr' in your path.
+
+
+
+File: gccinstall.info,  Node: Downloading the source,  Next: Configuration,  Prev: Prerequisites,  Up: Installing GCC
+
+3 Downloading GCC
+*****************
+
+   GCC is distributed via SVN and FTP tarballs compressed with `gzip' or
+`bzip2'.  It is possible to download a full distribution or specific
+components.
+
+   Please refer to the releases web page for information on how to
+obtain GCC.
+
+   The full distribution includes the C, C++, Objective-C, Fortran,
+Java, and Ada (in the case of GCC 3.1 and later) compilers.  The full
+distribution also includes runtime libraries for C++, Objective-C,
+Fortran, and Java.  In GCC 3.0 and later versions, the GNU compiler
+testsuites are also included in the full distribution.
+
+   If you choose to download specific components, you must download the
+core GCC distribution plus any language specific distributions you wish
+to use.  The core distribution includes the C language front end as
+well as the shared components.  Each language has a tarball which
+includes the language front end as well as the language runtime (when
+appropriate).
+
+   Unpack the core distribution as well as any language specific
+distributions in the same directory.
+
+   If you also intend to build binutils (either to upgrade an existing
+installation or for use in place of the corresponding tools of your
+OS), unpack the binutils distribution either in the same directory or a
+separate one.  In the latter case, add symbolic links to any components
+of the binutils you intend to build alongside the compiler (`bfd',
+`binutils', `gas', `gprof', `ld', `opcodes', ...) to the directory
+containing the GCC sources.
+
+   Likewise the GMP, MPFR and MPC libraries can be automatically built
+together with GCC.  Unpack the GMP, MPFR and/or MPC source
+distributions in the directory containing the GCC sources and rename
+their directories to `gmp', `mpfr' and `mpc', respectively (or use
+symbolic links with the same name).
+
+
+File: gccinstall.info,  Node: Configuration,  Next: Building,  Prev: Downloading the source,  Up: Installing GCC
+
+4 Installing GCC: Configuration
+*******************************
+
+   Like most GNU software, GCC must be configured before it can be
+built.  This document describes the recommended configuration procedure
+for both native and cross targets.
+
+   We use SRCDIR to refer to the toplevel source directory for GCC; we
+use OBJDIR to refer to the toplevel build/object directory.
+
+   If you obtained the sources via SVN, SRCDIR must refer to the top
+`gcc' directory, the one where the `MAINTAINERS' file can be found, and
+not its `gcc' subdirectory, otherwise the build will fail.
+
+   If either SRCDIR or OBJDIR is located on an automounted NFS file
+system, the shell's built-in `pwd' command will return temporary
+pathnames.  Using these can lead to various sorts of build problems.
+To avoid this issue, set the `PWDCMD' environment variable to an
+automounter-aware `pwd' command, e.g., `pawd' or `amq -w', during the
+configuration and build phases.
+
+   First, we *highly* recommend that GCC be built into a separate
+directory from the sources which does *not* reside within the source
+tree.  This is how we generally build GCC; building where SRCDIR ==
+OBJDIR should still work, but doesn't get extensive testing; building
+where OBJDIR is a subdirectory of SRCDIR is unsupported.
+
+   If you have previously built GCC in the same directory for a
+different target machine, do `make distclean' to delete all files that
+might be invalid.  One of the files this deletes is `Makefile'; if
+`make distclean' complains that `Makefile' does not exist or issues a
+message like "don't know how to make distclean" it probably means that
+the directory is already suitably clean.  However, with the recommended
+method of building in a separate OBJDIR, you should simply use a
+different OBJDIR for each target.
+
+   Second, when configuring a native system, either `cc' or `gcc' must
+be in your path or you must set `CC' in your environment before running
+configure.  Otherwise the configuration scripts may fail.
+
+   To configure GCC:
+
+        % mkdir OBJDIR
+        % cd OBJDIR
+        % SRCDIR/configure [OPTIONS] [TARGET]
+
+Distributor options
+===================
+
+If you will be distributing binary versions of GCC, with modifications
+to the source code, you should use the options described in this
+section to make clear that your version contains modifications.
+
+`--with-pkgversion=VERSION'
+     Specify a string that identifies your package.  You may wish to
+     include a build number or build date.  This version string will be
+     included in the output of `gcc --version'.  This suffix does not
+     replace the default version string, only the `GCC' part.
+
+     The default value is `GCC'.
+
+`--with-bugurl=URL'
+     Specify the URL that users should visit if they wish to report a
+     bug.  You are of course welcome to forward bugs reported to you to
+     the FSF, if you determine that they are not bugs in your
+     modifications.
+
+     The default value refers to the FSF's GCC bug tracker.
+
+
+Target specification
+====================
+
+   * GCC has code to correctly determine the correct value for TARGET
+     for nearly all native systems.  Therefore, we highly recommend you
+     do not provide a configure target when configuring a native
+     compiler.
+
+   * TARGET must be specified as `--target=TARGET' when configuring a
+     cross compiler; examples of valid targets would be m68k-elf,
+     sh-elf, etc.
+
+   * Specifying just TARGET instead of `--target=TARGET' implies that
+     the host defaults to TARGET.
+
+Options specification
+=====================
+
+Use OPTIONS to override several configure time options for GCC.  A list
+of supported OPTIONS follows; `configure --help' may list other
+options, but those not listed below may not work and should not
+normally be used.
+
+   Note that each `--enable' option has a corresponding `--disable'
+option and that each `--with' option has a corresponding `--without'
+option.
+
+`--prefix=DIRNAME'
+     Specify the toplevel installation directory.  This is the
+     recommended way to install the tools into a directory other than
+     the default.  The toplevel installation directory defaults to
+     `/usr/local'.
+
+     We *highly* recommend against DIRNAME being the same or a
+     subdirectory of OBJDIR or vice versa.  If specifying a directory
+     beneath a user's home directory tree, some shells will not expand
+     DIRNAME correctly if it contains the `~' metacharacter; use
+     `$HOME' instead.
+
+     The following standard `autoconf' options are supported.  Normally
+     you should not need to use these options.
+    `--exec-prefix=DIRNAME'
+          Specify the toplevel installation directory for
+          architecture-dependent files.  The default is `PREFIX'.
+
+    `--bindir=DIRNAME'
+          Specify the installation directory for the executables called
+          by users (such as `gcc' and `g++').  The default is
+          `EXEC-PREFIX/bin'.
+
+    `--libdir=DIRNAME'
+          Specify the installation directory for object code libraries
+          and internal data files of GCC.  The default is
+          `EXEC-PREFIX/lib'.
+
+    `--libexecdir=DIRNAME'
+          Specify the installation directory for internal executables
+          of GCC.  The default is `EXEC-PREFIX/libexec'.
+
+    `--with-slibdir=DIRNAME'
+          Specify the installation directory for the shared libgcc
+          library.  The default is `LIBDIR'.
+
+    `--datarootdir=DIRNAME'
+          Specify the root of the directory tree for read-only
+          architecture-independent data files referenced by GCC.  The
+          default is `PREFIX/share'.
+
+    `--infodir=DIRNAME'
+          Specify the installation directory for documentation in info
+          format.  The default is `DATAROOTDIR/info'.
+
+    `--datadir=DIRNAME'
+          Specify the installation directory for some
+          architecture-independent data files referenced by GCC.  The
+          default is `DATAROOTDIR'.
+
+    `--docdir=DIRNAME'
+          Specify the installation directory for documentation files
+          (other than Info) for GCC.  The default is `DATAROOTDIR/doc'.
+
+    `--htmldir=DIRNAME'
+          Specify the installation directory for HTML documentation
+          files.  The default is `DOCDIR'.
+
+    `--pdfdir=DIRNAME'
+          Specify the installation directory for PDF documentation
+          files.  The default is `DOCDIR'.
+
+    `--mandir=DIRNAME'
+          Specify the installation directory for manual pages.  The
+          default is `DATAROOTDIR/man'.  (Note that the manual pages
+          are only extracts from the full GCC manuals, which are
+          provided in Texinfo format.  The manpages are derived by an
+          automatic conversion process from parts of the full manual.)
+
+    `--with-gxx-include-dir=DIRNAME'
+          Specify the installation directory for G++ header files.  The
+          default depends on other configuration options, and differs
+          between cross and native configurations.
+
+
+`--program-prefix=PREFIX'
+     GCC supports some transformations of the names of its programs when
+     installing them.  This option prepends PREFIX to the names of
+     programs to install in BINDIR (see above).  For example, specifying
+     `--program-prefix=foo-' would result in `gcc' being installed as
+     `/usr/local/bin/foo-gcc'.
+
+`--program-suffix=SUFFIX'
+     Appends SUFFIX to the names of programs to install in BINDIR (see
+     above).  For example, specifying `--program-suffix=-3.1' would
+     result in `gcc' being installed as `/usr/local/bin/gcc-3.1'.
+
+`--program-transform-name=PATTERN'
+     Applies the `sed' script PATTERN to be applied to the names of
+     programs to install in BINDIR (see above).  PATTERN has to consist
+     of one or more basic `sed' editing commands, separated by
+     semicolons.  For example, if you want the `gcc' program name to be
+     transformed to the installed program `/usr/local/bin/myowngcc' and
+     the `g++' program name to be transformed to
+     `/usr/local/bin/gspecial++' without changing other program names,
+     you could use the pattern
+     `--program-transform-name='s/^gcc$/myowngcc/; s/^g++$/gspecial++/''
+     to achieve this effect.
+
+     All three options can be combined and used together, resulting in
+     more complex conversion patterns.  As a basic rule, PREFIX (and
+     SUFFIX) are prepended (appended) before further transformations
+     can happen with a special transformation script PATTERN.
+
+     As currently implemented, this option only takes effect for native
+     builds; cross compiler binaries' names are not transformed even
+     when a transformation is explicitly asked for by one of these
+     options.
+
+     For native builds, some of the installed programs are also
+     installed with the target alias in front of their name, as in
+     `i686-pc-linux-gnu-gcc'.  All of the above transformations happen
+     before the target alias is prepended to the name--so, specifying
+     `--program-prefix=foo-' and `program-suffix=-3.1', the resulting
+     binary would be installed as
+     `/usr/local/bin/i686-pc-linux-gnu-foo-gcc-3.1'.
+
+     As a last shortcoming, none of the installed Ada programs are
+     transformed yet, which will be fixed in some time.
+
+`--with-local-prefix=DIRNAME'
+     Specify the installation directory for local include files.  The
+     default is `/usr/local'.  Specify this option if you want the
+     compiler to search directory `DIRNAME/include' for locally
+     installed header files _instead_ of `/usr/local/include'.
+
+     You should specify `--with-local-prefix' *only* if your site has a
+     different convention (not `/usr/local') for where to put
+     site-specific files.
+
+     The default value for `--with-local-prefix' is `/usr/local'
+     regardless of the value of `--prefix'.  Specifying `--prefix' has
+     no effect on which directory GCC searches for local header files.
+     This may seem counterintuitive, but actually it is logical.
+
+     The purpose of `--prefix' is to specify where to _install GCC_.
+     The local header files in `/usr/local/include'--if you put any in
+     that directory--are not part of GCC.  They are part of other
+     programs--perhaps many others.  (GCC installs its own header files
+     in another directory which is based on the `--prefix' value.)
+
+     Both the local-prefix include directory and the GCC-prefix include
+     directory are part of GCC's "system include" directories.
+     Although these two directories are not fixed, they need to be
+     searched in the proper order for the correct processing of the
+     include_next directive.  The local-prefix include directory is
+     searched before the GCC-prefix include directory.  Another
+     characteristic of system include directories is that pedantic
+     warnings are turned off for headers in these directories.
+
+     Some autoconf macros add `-I DIRECTORY' options to the compiler
+     command line, to ensure that directories containing installed
+     packages' headers are searched.  When DIRECTORY is one of GCC's
+     system include directories, GCC will ignore the option so that
+     system directories continue to be processed in the correct order.
+     This may result in a search order different from what was
+     specified but the directory will still be searched.
+
+     GCC automatically searches for ordinary libraries using
+     `GCC_EXEC_PREFIX'.  Thus, when the same installation prefix is
+     used for both GCC and packages, GCC will automatically search for
+     both headers and libraries.  This provides a configuration that is
+     easy to use.  GCC behaves in a manner similar to that when it is
+     installed as a system compiler in `/usr'.
+
+     Sites that need to install multiple versions of GCC may not want to
+     use the above simple configuration.  It is possible to use the
+     `--program-prefix', `--program-suffix' and
+     `--program-transform-name' options to install multiple versions
+     into a single directory, but it may be simpler to use different
+     prefixes and the `--with-local-prefix' option to specify the
+     location of the site-specific files for each version.  It will
+     then be necessary for users to specify explicitly the location of
+     local site libraries (e.g., with `LIBRARY_PATH').
+
+     The same value can be used for both `--with-local-prefix' and
+     `--prefix' provided it is not `/usr'.  This can be used to avoid
+     the default search of `/usr/local/include'.
+
+     *Do not* specify `/usr' as the `--with-local-prefix'!  The
+     directory you use for `--with-local-prefix' *must not* contain any
+     of the system's standard header files.  If it did contain them,
+     certain programs would be miscompiled (including GNU Emacs, on
+     certain targets), because this would override and nullify the
+     header file corrections made by the `fixincludes' script.
+
+     Indications are that people who use this option use it based on
+     mistaken ideas of what it is for.  People use it as if it
+     specified where to install part of GCC.  Perhaps they make this
+     assumption because installing GCC creates the directory.
+
+`--enable-shared[=PACKAGE[,...]]'
+     Build shared versions of libraries, if shared libraries are
+     supported on the target platform.  Unlike GCC 2.95.x and earlier,
+     shared libraries are enabled by default on all platforms that
+     support shared libraries.
+
+     If a list of packages is given as an argument, build shared
+     libraries only for the listed packages.  For other packages, only
+     static libraries will be built.  Package names currently
+     recognized in the GCC tree are `libgcc' (also known as `gcc'),
+     `libstdc++' (not `libstdc++-v3'), `libffi', `zlib', `boehm-gc',
+     `ada', `libada', `libjava' and `libobjc'.  Note `libiberty' does
+     not support shared libraries at all.
+
+     Use `--disable-shared' to build only static libraries.  Note that
+     `--disable-shared' does not accept a list of package names as
+     argument, only `--enable-shared' does.
+
+`--with-gnu-as'
+     Specify that the compiler should assume that the assembler it
+     finds is the GNU assembler.  However, this does not modify the
+     rules to find an assembler and will result in confusion if the
+     assembler found is not actually the GNU assembler.  (Confusion may
+     also result if the compiler finds the GNU assembler but has not
+     been configured with `--with-gnu-as'.)  If you have more than one
+     assembler installed on your system, you may want to use this
+     option in connection with `--with-as=PATHNAME' or
+     `--with-build-time-tools=PATHNAME'.
+
+     The following systems are the only ones where it makes a difference
+     whether you use the GNU assembler.  On any other system,
+     `--with-gnu-as' has no effect.
+
+        * `hppa1.0-ANY-ANY'
+
+        * `hppa1.1-ANY-ANY'
+
+        * `sparc-sun-solaris2.ANY'
+
+        * `sparc64-ANY-solaris2.ANY'
+
+`--with-as=PATHNAME'
+     Specify that the compiler should use the assembler pointed to by
+     PATHNAME, rather than the one found by the standard rules to find
+     an assembler, which are:
+        * Unless GCC is being built with a cross compiler, check the
+          `LIBEXEC/gcc/TARGET/VERSION' directory.  LIBEXEC defaults to
+          `EXEC-PREFIX/libexec'; EXEC-PREFIX defaults to PREFIX, which
+          defaults to `/usr/local' unless overridden by the
+          `--prefix=PATHNAME' switch described above.  TARGET is the
+          target system triple, such as `sparc-sun-solaris2.7', and
+          VERSION denotes the GCC version, such as 3.0.
+
+        * If the target system is the same that you are building on,
+          check operating system specific directories (e.g.
+          `/usr/ccs/bin' on Sun Solaris 2).
+
+        * Check in the `PATH' for a tool whose name is prefixed by the
+          target system triple.
+
+        * Check in the `PATH' for a tool whose name is not prefixed by
+          the target system triple, if the host and target system
+          triple are the same (in other words, we use a host tool if it
+          can be used for the target as well).
+
+     You may want to use `--with-as' if no assembler is installed in
+     the directories listed above, or if you have multiple assemblers
+     installed and want to choose one that is not found by the above
+     rules.
+
+`--with-gnu-ld'
+     Same as `--with-gnu-as' but for the linker.
+
+`--with-ld=PATHNAME'
+     Same as `--with-as' but for the linker.
+
+`--with-stabs'
+     Specify that stabs debugging information should be used instead of
+     whatever format the host normally uses.  Normally GCC uses the
+     same debug format as the host system.
+
+     On MIPS based systems and on Alphas, you must specify whether you
+     want GCC to create the normal ECOFF debugging format, or to use
+     BSD-style stabs passed through the ECOFF symbol table.  The normal
+     ECOFF debug format cannot fully handle languages other than C.
+     BSD stabs format can handle other languages, but it only works
+     with the GNU debugger GDB.
+
+     Normally, GCC uses the ECOFF debugging format by default; if you
+     prefer BSD stabs, specify `--with-stabs' when you configure GCC.
+
+     No matter which default you choose when you configure GCC, the user
+     can use the `-gcoff' and `-gstabs+' options to specify explicitly
+     the debug format for a particular compilation.
+
+     `--with-stabs' is meaningful on the ISC system on the 386, also, if
+     `--with-gas' is used.  It selects use of stabs debugging
+     information embedded in COFF output.  This kind of debugging
+     information supports C++ well; ordinary COFF debugging information
+     does not.
+
+     `--with-stabs' is also meaningful on 386 systems running SVR4.  It
+     selects use of stabs debugging information embedded in ELF output.
+     The C++ compiler currently (2.6.0) does not support the DWARF
+     debugging information normally used on 386 SVR4 platforms; stabs
+     provide a workable alternative.  This requires gas and gdb, as the
+     normal SVR4 tools can not generate or interpret stabs.
+
+`--disable-multilib'
+     Specify that multiple target libraries to support different target
+     variants, calling conventions, etc. should not be built.  The
+     default is to build a predefined set of them.
+
+     Some targets provide finer-grained control over which multilibs
+     are built (e.g., `--disable-softfloat'):
+    `arc-*-elf*'
+          biendian.
+
+    `arm-*-*'
+          fpu, 26bit, underscore, interwork, biendian, nofmult.
+
+    `m68*-*-*'
+          softfloat, m68881, m68000, m68020.
+
+    `mips*-*-*'
+          single-float, biendian, softfloat.
+
+    `powerpc*-*-*, rs6000*-*-*'
+          aix64, pthread, softfloat, powercpu, powerpccpu, powerpcos,
+          biendian, sysv, aix.
+
+
+`--with-multilib-list=LIST'
+`--without-multilib-list'
+     Specify what multilibs to build.  Currently only implemented for
+     sh*-*-*.
+
+     LIST is a comma separated list of CPU names.  These must be of the
+     form `sh*' or `m*' (in which case they match the compiler option
+     for that processor).  The list should not contain any endian
+     options - these are handled by `--with-endian'.
+
+     If LIST is empty, then there will be no multilibs for extra
+     processors.  The multilib for the secondary endian remains enabled.
+
+     As a special case, if an entry in the list starts with a `!'
+     (exclamation point), then it is added to the list of excluded
+     multilibs.  Entries of this sort should be compatible with
+     `MULTILIB_EXCLUDES' (once the leading `!' has been stripped).
+
+     If `--with-multilib-list' is not given, then a default set of
+     multilibs is selected based on the value of `--target'.  This is
+     usually the complete set of libraries, but some targets imply a
+     more specialized subset.
+
+     Example 1: to configure a compiler for SH4A only, but supporting
+     both endians, with little endian being the default:
+          --with-cpu=sh4a --with-endian=little,big --with-multilib-list=
+
+     Example 2: to configure a compiler for both SH4A and SH4AL-DSP,
+     but with only little endian SH4AL:
+          --with-cpu=sh4a --with-endian=little,big --with-multilib-list=sh4al,!mb/m4al
+
+`--with-endian=ENDIANS'
+     Specify what endians to use.  Currently only implemented for
+     sh*-*-*.
+
+     ENDIANS may be one of the following:
+    `big'
+          Use big endian exclusively.
+
+    `little'
+          Use little endian exclusively.
+
+    `big,little'
+          Use big endian by default.  Provide a multilib for little
+          endian.
+
+    `little,big'
+          Use little endian by default.  Provide a multilib for big
+          endian.
+
+`--enable-threads'
+     Specify that the target supports threads.  This affects the
+     Objective-C compiler and runtime library, and exception handling
+     for other languages like C++ and Java.  On some systems, this is
+     the default.
+
+     In general, the best (and, in many cases, the only known) threading
+     model available will be configured for use.  Beware that on some
+     systems, GCC has not been taught what threading models are
+     generally available for the system.  In this case,
+     `--enable-threads' is an alias for `--enable-threads=single'.
+
+`--disable-threads'
+     Specify that threading support should be disabled for the system.
+     This is an alias for `--enable-threads=single'.
+
+`--enable-threads=LIB'
+     Specify that LIB is the thread support library.  This affects the
+     Objective-C compiler and runtime library, and exception handling
+     for other languages like C++ and Java.  The possibilities for LIB
+     are:
+
+    `aix'
+          AIX thread support.
+
+    `dce'
+          DCE thread support.
+
+    `gnat'
+          Ada tasking support.  For non-Ada programs, this setting is
+          equivalent to `single'.  When used in conjunction with the
+          Ada run time, it causes GCC to use the same thread primitives
+          as Ada uses.  This option is necessary when using both Ada
+          and the back end exception handling, which is the default for
+          most Ada targets.
+
+    `mach'
+          Generic MACH thread support, known to work on NeXTSTEP.
+          (Please note that the file needed to support this
+          configuration, `gthr-mach.h', is missing and thus this
+          setting will cause a known bootstrap failure.)
+
+    `no'
+          This is an alias for `single'.
+
+    `posix'
+          Generic POSIX/Unix98 thread support.
+
+    `posix95'
+          Generic POSIX/Unix95 thread support.
+
+    `rtems'
+          RTEMS thread support.
+
+    `single'
+          Disable thread support, should work for all platforms.
+
+    `solaris'
+          Sun Solaris 2/Unix International thread support.  Only use
+          this if you really need to use this legacy API instead of the
+          default, `posix'.
+
+    `vxworks'
+          VxWorks thread support.
+
+    `win32'
+          Microsoft Win32 API thread support.
+
+    `nks'
+          Novell Kernel Services thread support.
+
+`--enable-tls'
+     Specify that the target supports TLS (Thread Local Storage).
+     Usually configure can correctly determine if TLS is supported.  In
+     cases where it guesses incorrectly, TLS can be explicitly enabled
+     or disabled with `--enable-tls' or `--disable-tls'.  This can
+     happen if the assembler supports TLS but the C library does not,
+     or if the assumptions made by the configure test are incorrect.
+
+`--disable-tls'
+     Specify that the target does not support TLS.  This is an alias
+     for `--enable-tls=no'.
+
+`--with-cpu=CPU'
+`--with-cpu-32=CPU'
+`--with-cpu-64=CPU'
+     Specify which cpu variant the compiler should generate code for by
+     default.  CPU will be used as the default value of the `-mcpu='
+     switch.  This option is only supported on some targets, including
+     ARM, i386, M68k, PowerPC, and SPARC.  The `--with-cpu-32' and
+     `--with-cpu-64' options specify separate default CPUs for 32-bit
+     and 64-bit modes; these options are only supported for i386,
+     x86-64 and PowerPC.
+
+`--with-schedule=CPU'
+`--with-arch=CPU'
+`--with-arch-32=CPU'
+`--with-arch-64=CPU'
+`--with-tune=CPU'
+`--with-tune-32=CPU'
+`--with-tune-64=CPU'
+`--with-abi=ABI'
+`--with-fpu=TYPE'
+`--with-float=TYPE'
+     These configure options provide default values for the
+     `-mschedule=', `-march=', `-mtune=', `-mabi=', and `-mfpu='
+     options and for `-mhard-float' or `-msoft-float'.  As with
+     `--with-cpu', which switches will be accepted and acceptable values
+     of the arguments depend on the target.
+
+`--with-mode=MODE'
+     Specify if the compiler should default to `-marm' or `-mthumb'.
+     This option is only supported on ARM targets.
+
+`--with-fpmath=sse'
+     Specify if the compiler should default to `-msse2' and
+     `-mfpmath=sse'.  This option is only supported on i386 and x86-64
+     targets.
+
+`--with-divide=TYPE'
+     Specify how the compiler should generate code for checking for
+     division by zero.  This option is only supported on the MIPS
+     target.  The possibilities for TYPE are:
+    `traps'
+          Division by zero checks use conditional traps (this is the
+          default on systems that support conditional traps).
+
+    `breaks'
+          Division by zero checks use the break instruction.
+
+`--with-llsc'
+     On MIPS targets, make `-mllsc' the default when no `-mno-lsc'
+     option is passed.  This is the default for Linux-based targets, as
+     the kernel will emulate them if the ISA does not provide them.
+
+`--without-llsc'
+     On MIPS targets, make `-mno-llsc' the default when no `-mllsc'
+     option is passed.
+
+`--with-synci'
+     On MIPS targets, make `-msynci' the default when no `-mno-synci'
+     option is passed.
+
+`--without-synci'
+     On MIPS targets, make `-mno-synci' the default when no `-msynci'
+     option is passed.  This is the default.
+
+`--with-mips-plt'
+     On MIPS targets, make use of copy relocations and PLTs.  These
+     features are extensions to the traditional SVR4-based MIPS ABIs
+     and require support from GNU binutils and the runtime C library.
+
+`--enable-__cxa_atexit'
+     Define if you want to use __cxa_atexit, rather than atexit, to
+     register C++ destructors for local statics and global objects.
+     This is essential for fully standards-compliant handling of
+     destructors, but requires __cxa_atexit in libc.  This option is
+     currently only available on systems with GNU libc.  When enabled,
+     this will cause `-fuse-cxa-atexit' to be passed by default.
+
+`--enable-target-optspace'
+     Specify that target libraries should be optimized for code space
+     instead of code speed.  This is the default for the m32r platform.
+
+`--with-cpp-install-dir=DIRNAME'
+     Specify that the user visible `cpp' program should be installed in
+     `PREFIX/DIRNAME/cpp', in addition to BINDIR.
+
+`--enable-comdat'
+     Enable COMDAT group support.  This is primarily used to override
+     the automatically detected value.
+
+`--enable-initfini-array'
+     Force the use of sections `.init_array' and `.fini_array' (instead
+     of `.init' and `.fini') for constructors and destructors.  Option
+     `--disable-initfini-array' has the opposite effect.  If neither
+     option is specified, the configure script will try to guess
+     whether the `.init_array' and `.fini_array' sections are supported
+     and, if they are, use them.
+
+`--enable-build-with-cxx'
+     Build GCC using a C++ compiler rather than a C compiler.  This is
+     an experimental option which may become the default in a later
+     release.
+
+`--enable-maintainer-mode'
+     The build rules that regenerate the Autoconf and Automake output
+     files as well as the GCC master message catalog `gcc.pot' are
+     normally disabled.  This is because it can only be rebuilt if the
+     complete source tree is present.  If you have changed the sources
+     and want to rebuild the catalog, configuring with
+     `--enable-maintainer-mode' will enable this.  Note that you need a
+     recent version of the `gettext' tools to do so.
+
+`--disable-bootstrap'
+     For a native build, the default configuration is to perform a
+     3-stage bootstrap of the compiler when `make' is invoked, testing
+     that GCC can compile itself correctly.  If you want to disable
+     this process, you can configure with `--disable-bootstrap'.
+
+`--enable-bootstrap'
+     In special cases, you may want to perform a 3-stage build even if
+     the target and host triplets are different.  This is possible when
+     the host can run code compiled for the target (e.g. host is
+     i686-linux, target is i486-linux).  Starting from GCC 4.2, to do
+     this you have to configure explicitly with `--enable-bootstrap'.
+
+`--enable-generated-files-in-srcdir'
+     Neither the .c and .h files that are generated from Bison and flex
+     nor the info manuals and man pages that are built from the .texi
+     files are present in the SVN development tree.  When building GCC
+     from that development tree, or from one of our snapshots, those
+     generated files are placed in your build directory, which allows
+     for the source to be in a readonly directory.
+
+     If you configure with `--enable-generated-files-in-srcdir' then
+     those generated files will go into the source directory.  This is
+     mainly intended for generating release or prerelease tarballs of
+     the GCC sources, since it is not a requirement that the users of
+     source releases to have flex, Bison, or makeinfo.
+
+`--enable-version-specific-runtime-libs'
+     Specify that runtime libraries should be installed in the compiler
+     specific subdirectory (`LIBDIR/gcc') rather than the usual places.
+     In addition, `libstdc++''s include files will be installed into
+     `LIBDIR' unless you overruled it by using
+     `--with-gxx-include-dir=DIRNAME'.  Using this option is
+     particularly useful if you intend to use several versions of GCC in
+     parallel.  This is currently supported by `libgfortran',
+     `libjava', `libmudflap', `libstdc++', and `libobjc'.
+
+`--enable-languages=LANG1,LANG2,...'
+     Specify that only a particular subset of compilers and their
+     runtime libraries should be built.  For a list of valid values for
+     LANGN you can issue the following command in the `gcc' directory
+     of your GCC source tree:
+          grep language= */config-lang.in
+     Currently, you can use any of the following: `all', `ada', `c',
+     `c++', `fortran', `java', `objc', `obj-c++'.  Building the Ada
+     compiler has special requirements, see below.  If you do not pass
+     this flag, or specify the option `all', then all default languages
+     available in the `gcc' sub-tree will be configured.  Ada and
+     Objective-C++ are not default languages; the rest are.
+     Re-defining `LANGUAGES' when calling `make' *does not* work
+     anymore, as those language sub-directories might not have been
+     configured!
+
+`--enable-stage1-languages=LANG1,LANG2,...'
+     Specify that a particular subset of compilers and their runtime
+     libraries should be built with the system C compiler during stage
+     1 of the bootstrap process, rather than only in later stages with
+     the bootstrapped C compiler.  The list of valid values is the same
+     as for `--enable-languages', and the option `all' will select all
+     of the languages enabled by `--enable-languages'.  This option is
+     primarily useful for GCC development; for instance, when a
+     development version of the compiler cannot bootstrap due to
+     compiler bugs, or when one is debugging front ends other than the
+     C front end.  When this option is used, one can then build the
+     target libraries for the specified languages with the stage-1
+     compiler by using `make stage1-bubble all-target', or run the
+     testsuite on the stage-1 compiler for the specified languages
+     using `make stage1-start check-gcc'.
+
+`--disable-libada'
+     Specify that the run-time libraries and tools used by GNAT should
+     not be built.  This can be useful for debugging, or for
+     compatibility with previous Ada build procedures, when it was
+     required to explicitly do a `make -C gcc gnatlib_and_tools'.
+
+`--disable-libssp'
+     Specify that the run-time libraries for stack smashing protection
+     should not be built.
+
+`--disable-libgomp'
+     Specify that the run-time libraries used by GOMP should not be
+     built.
+
+`--with-dwarf2'
+     Specify that the compiler should use DWARF 2 debugging information
+     as the default.
+
+`--enable-targets=all'
+`--enable-targets=TARGET_LIST'
+     Some GCC targets, e.g. powerpc64-linux, build bi-arch compilers.
+     These are compilers that are able to generate either 64-bit or
+     32-bit code.  Typically, the corresponding 32-bit target, e.g.
+     powerpc-linux for powerpc64-linux, only generates 32-bit code.
+     This option enables the 32-bit target to be a bi-arch compiler,
+     which is useful when you want a bi-arch compiler that defaults to
+     32-bit, and you are building a bi-arch or multi-arch binutils in a
+     combined tree.  On mips-linux, this will build a tri-arch compiler
+     (ABI o32/n32/64), defaulted to o32.  Currently, this option only
+     affects sparc-linux, powerpc-linux, x86-linux and mips-linux.
+
+`--enable-secureplt'
+     This option enables `-msecure-plt' by default for powerpc-linux.
+     *Note RS/6000 and PowerPC Options: (gcc)RS/6000 and PowerPC
+     Options,
+
+`--enable-cld'
+     This option enables `-mcld' by default for 32-bit x86 targets.
+     *Note i386 and x86-64 Options: (gcc)i386 and x86-64 Options,
+
+`--enable-win32-registry'
+`--enable-win32-registry=KEY'
+`--disable-win32-registry'
+     The `--enable-win32-registry' option enables Microsoft
+     Windows-hosted GCC to look up installations paths in the registry
+     using the following key:
+
+          `HKEY_LOCAL_MACHINE\SOFTWARE\Free Software Foundation\KEY'
+
+     KEY defaults to GCC version number, and can be overridden by the
+     `--enable-win32-registry=KEY' option.  Vendors and distributors
+     who use custom installers are encouraged to provide a different
+     key, perhaps one comprised of vendor name and GCC version number,
+     to avoid conflict with existing installations.  This feature is
+     enabled by default, and can be disabled by
+     `--disable-win32-registry' option.  This option has no effect on
+     the other hosts.
+
+`--nfp'
+     Specify that the machine does not have a floating point unit.  This
+     option only applies to `m68k-sun-sunosN'.  On any other system,
+     `--nfp' has no effect.
+
+`--enable-werror'
+`--disable-werror'
+`--enable-werror=yes'
+`--enable-werror=no'
+     When you specify this option, it controls whether certain files in
+     the compiler are built with `-Werror' in bootstrap stage2 and
+     later.  If you don't specify it, `-Werror' is turned on for the
+     main development trunk.  However it defaults to off for release
+     branches and final releases.  The specific files which get
+     `-Werror' are controlled by the Makefiles.
+
+`--enable-checking'
+`--enable-checking=LIST'
+     When you specify this option, the compiler is built to perform
+     internal consistency checks of the requested complexity.  This
+     does not change the generated code, but adds error checking within
+     the compiler.  This will slow down the compiler and may only work
+     properly if you are building the compiler with GCC.  This is `yes'
+     by default when building from SVN or snapshots, but `release' for
+     releases.  The default for building the stage1 compiler is `yes'.
+     More control over the checks may be had by specifying LIST.  The
+     categories of checks available are `yes' (most common checks
+     `assert,misc,tree,gc,rtlflag,runtime'), `no' (no checks at all),
+     `all' (all but `valgrind'), `release' (cheapest checks
+     `assert,runtime') or `none' (same as `no').  Individual checks can
+     be enabled with these flags `assert', `df', `fold', `gc', `gcac'
+     `misc', `rtl', `rtlflag', `runtime', `tree', and `valgrind'.
+
+     The `valgrind' check requires the external `valgrind' simulator,
+     available from `http://valgrind.org/'.  The `df', `rtl', `gcac'
+     and `valgrind' checks are very expensive.  To disable all
+     checking, `--disable-checking' or `--enable-checking=none' must be
+     explicitly requested.  Disabling assertions will make the compiler
+     and runtime slightly faster but increase the risk of undetected
+     internal errors causing wrong code to be generated.
+
+`--disable-stage1-checking'
+`--enable-stage1-checking'
+`--enable-stage1-checking=LIST'
+     If no `--enable-checking' option is specified the stage1 compiler
+     will be built with `yes' checking enabled, otherwise the stage1
+     checking flags are the same as specified by `--enable-checking'.
+     To build the stage1 compiler with different checking options use
+     `--enable-stage1-checking'.  The list of checking options is the
+     same as for `--enable-checking'.  If your system is too slow or
+     too small to bootstrap a released compiler with checking for
+     stage1 enabled, you can use `--disable-stage1-checking' to disable
+     checking for the stage1 compiler.
+
+`--enable-coverage'
+`--enable-coverage=LEVEL'
+     With this option, the compiler is built to collect self coverage
+     information, every time it is run.  This is for internal
+     development purposes, and only works when the compiler is being
+     built with gcc.  The LEVEL argument controls whether the compiler
+     is built optimized or not, values are `opt' and `noopt'.  For
+     coverage analysis you want to disable optimization, for
+     performance analysis you want to enable optimization.  When
+     coverage is enabled, the default level is without optimization.
+
+`--enable-gather-detailed-mem-stats'
+     When this option is specified more detailed information on memory
+     allocation is gathered.  This information is printed when using
+     `-fmem-report'.
+
+`--with-gc'
+`--with-gc=CHOICE'
+     With this option you can specify the garbage collector
+     implementation used during the compilation process.  CHOICE can be
+     one of `page' and `zone', where `page' is the default.
+
+`--enable-nls'
+`--disable-nls'
+     The `--enable-nls' option enables Native Language Support (NLS),
+     which lets GCC output diagnostics in languages other than American
+     English.  Native Language Support is enabled by default if not
+     doing a canadian cross build.  The `--disable-nls' option disables
+     NLS.
+
+`--with-included-gettext'
+     If NLS is enabled, the `--with-included-gettext' option causes the
+     build procedure to prefer its copy of GNU `gettext'.
+
+`--with-catgets'
+     If NLS is enabled, and if the host lacks `gettext' but has the
+     inferior `catgets' interface, the GCC build procedure normally
+     ignores `catgets' and instead uses GCC's copy of the GNU `gettext'
+     library.  The `--with-catgets' option causes the build procedure
+     to use the host's `catgets' in this situation.
+
+`--with-libiconv-prefix=DIR'
+     Search for libiconv header files in `DIR/include' and libiconv
+     library files in `DIR/lib'.
+
+`--enable-obsolete'
+     Enable configuration for an obsoleted system.  If you attempt to
+     configure GCC for a system (build, host, or target) which has been
+     obsoleted, and you do not specify this flag, configure will halt
+     with an error message.
+
+     All support for systems which have been obsoleted in one release
+     of GCC is removed entirely in the next major release, unless
+     someone steps forward to maintain the port.
+
+`--enable-decimal-float'
+`--enable-decimal-float=yes'
+`--enable-decimal-float=no'
+`--enable-decimal-float=bid'
+`--enable-decimal-float=dpd'
+`--disable-decimal-float'
+     Enable (or disable) support for the C decimal floating point
+     extension that is in the IEEE 754-2008 standard.  This is enabled
+     by default only on PowerPC, i386, and x86_64 GNU/Linux systems.
+     Other systems may also support it, but require the user to
+     specifically enable it.  You can optionally control which decimal
+     floating point format is used (either `bid' or `dpd').  The `bid'
+     (binary integer decimal) format is default on i386 and x86_64
+     systems, and the `dpd' (densely packed decimal) format is default
+     on PowerPC systems.
+
+`--enable-fixed-point'
+`--disable-fixed-point'
+     Enable (or disable) support for C fixed-point arithmetic.  This
+     option is enabled by default for some targets (such as MIPS) which
+     have hardware-support for fixed-point operations.  On other
+     targets, you may enable this option manually.
+
+`--with-long-double-128'
+     Specify if `long double' type should be 128-bit by default on
+     selected GNU/Linux architectures.  If using
+     `--without-long-double-128', `long double' will be by default
+     64-bit, the same as `double' type.  When neither of these
+     configure options are used, the default will be 128-bit `long
+     double' when built against GNU C Library 2.4 and later, 64-bit
+     `long double' otherwise.
+
+`--with-gmp=PATHNAME'
+`--with-gmp-include=PATHNAME'
+`--with-gmp-lib=PATHNAME'
+`--with-mpfr=PATHNAME'
+`--with-mpfr-include=PATHNAME'
+`--with-mpfr-lib=PATHNAME'
+`--with-mpc=PATHNAME'
+`--with-mpc-include=PATHNAME'
+`--with-mpc-lib=PATHNAME'
+     If you do not have GMP (the GNU Multiple Precision library), the
+     MPFR library and/or the MPC library installed in a standard
+     location and you want to build GCC, you can explicitly specify the
+     directory where they are installed (`--with-gmp=GMPINSTALLDIR',
+     `--with-mpfr=MPFRINSTALLDIR', `--with-mpc=MPCINSTALLDIR').  The
+     `--with-gmp=GMPINSTALLDIR' option is shorthand for
+     `--with-gmp-lib=GMPINSTALLDIR/lib' and
+     `--with-gmp-include=GMPINSTALLDIR/include'.  Likewise the
+     `--with-mpfr=MPFRINSTALLDIR' option is shorthand for
+     `--with-mpfr-lib=MPFRINSTALLDIR/lib' and
+     `--with-mpfr-include=MPFRINSTALLDIR/include', also the
+     `--with-mpc=MPCINSTALLDIR' option is shorthand for
+     `--with-mpc-lib=MPCINSTALLDIR/lib' and
+     `--with-mpc-include=MPCINSTALLDIR/include'.  If these shorthand
+     assumptions are not correct, you can use the explicit include and
+     lib options directly.
+
+`--with-ppl=PATHNAME'
+`--with-ppl-include=PATHNAME'
+`--with-ppl-lib=PATHNAME'
+`--with-cloog=PATHNAME'
+`--with-cloog-include=PATHNAME'
+`--with-cloog-lib=PATHNAME'
+     If you do not have PPL (the Parma Polyhedra Library) and the CLooG
+     libraries installed in a standard location and you want to build
+     GCC, you can explicitly specify the directory where they are
+     installed (`--with-ppl=PPLINSTALLDIR',
+     `--with-cloog=CLOOGINSTALLDIR'). The `--with-ppl=PPLINSTALLDIR'
+     option is shorthand for `--with-ppl-lib=PPLINSTALLDIR/lib' and
+     `--with-ppl-include=PPLINSTALLDIR/include'.  Likewise the
+     `--with-cloog=CLOOGINSTALLDIR' option is shorthand for
+     `--with-cloog-lib=CLOOGINSTALLDIR/lib' and
+     `--with-cloog-include=CLOOGINSTALLDIR/include'.  If these
+     shorthand assumptions are not correct, you can use the explicit
+     include and lib options directly.
+
+`--with-host-libstdcxx=LINKER-ARGS'
+     If you are linking with a static copy of PPL, you can use this
+     option to specify how the linker should find the standard C++
+     library used internally by PPL.  Typical values of LINKER-ARGS
+     might be `-lstdc++' or `-Wl,-Bstatic,-lstdc++,-Bdynamic -lm'.  If
+     you are linking with a shared copy of PPL, you probably do not
+     need this option; shared library dependencies will cause the
+     linker to search for the standard C++ library automatically.
+
+`--with-stage1-ldflags=FLAGS'
+     This option may be used to set linker flags to be used when linking
+     stage 1 of GCC.  These are also used when linking GCC if
+     configured with `--disable-bootstrap'.  By default no special
+     flags are used.
+
+`--with-stage1-libs=LIBS'
+     This option may be used to set libraries to be used when linking
+     stage 1 of GCC.  These are also used when linking GCC if
+     configured with `--disable-bootstrap'.  The default is the
+     argument to `--with-host-libstdcxx', if specified.
+
+`--with-boot-ldflags=FLAGS'
+     This option may be used to set linker flags to be used when linking
+     stage 2 and later when bootstrapping GCC.  By default no special
+     flags are used.
+
+`--with-boot-libs=LIBS'
+     This option may be used to set libraries to be used when linking
+     stage 2 and later when bootstrapping GCC.  The default is the
+     argument to `--with-host-libstdcxx', if specified.
+
+`--with-debug-prefix-map=MAP'
+     Convert source directory names using `-fdebug-prefix-map' when
+     building runtime libraries.  `MAP' is a space-separated list of
+     maps of the form `OLD=NEW'.
+
+`--enable-linker-build-id'
+     Tells GCC to pass `--build-id' option to the linker for all final
+     links (links performed without the `-r' or `--relocatable'
+     option), if the linker supports it.  If you specify
+     `--enable-linker-build-id', but your linker does not support
+     `--build-id' option, a warning is issued and the
+     `--enable-linker-build-id' option is ignored.  The default is off.
+
+`--enable-gnu-unique-object'
+`--disable-gnu-unique-object'
+     Tells GCC to use the gnu_unique_object relocation for C++ template
+     static data members and inline function local statics.  Enabled by
+     default for a native toolchain with an assembler that accepts it
+     and GLIBC 2.11 or above, otherwise disabled.
+
+`--enable-lto'
+     Enable support for link-time optimization (LTO).  This is enabled
+     by default if a working libelf implementation is found (see
+     `--with-libelf').
+
+`--with-libelf=PATHNAME'
+`--with-libelf-include=PATHNAME'
+`--with-libelf-lib=PATHNAME'
+     If you do not have libelf installed in a standard location and you
+     want to enable support for link-time optimization (LTO), you can
+     explicitly specify the directory where libelf is installed
+     (`--with-libelf=LIBELFINSTALLDIR').  The
+     `--with-libelf=LIBELFINSTALLDIR' option is shorthand for
+     `--with-libelf-include=LIBELFINSTALLDIR/include'
+     `--with-libelf-lib=LIBELFINSTALLDIR/lib'.
+
+`--enable-gold'
+     Enable support for using `gold' as the linker.  If gold support is
+     enabled together with `--enable-lto', an additional directory
+     `lto-plugin' will be built.  The code in this directory is a
+     plugin for gold that allows the link-time optimizer to extract
+     object files with LTO information out of library archives.  See
+     `-flto' and `-fwhopr' for details.
+
+Cross-Compiler-Specific Options
+-------------------------------
+
+The following options only apply to building cross compilers.
+
+`--with-sysroot'
+`--with-sysroot=DIR'
+     Tells GCC to consider DIR as the root of a tree that contains a
+     (subset of) the root filesystem of the target operating system.
+     Target system headers, libraries and run-time object files will be
+     searched in there.  More specifically, this acts as if
+     `--sysroot=DIR' was added to the default options of the built
+     compiler.  The specified directory is not copied into the install
+     tree, unlike the options `--with-headers' and `--with-libs' that
+     this option obsoletes.  The default value, in case
+     `--with-sysroot' is not given an argument, is
+     `${gcc_tooldir}/sys-root'.  If the specified directory is a
+     subdirectory of `${exec_prefix}', then it will be found relative to
+     the GCC binaries if the installation tree is moved.
+
+     This option affects the system root for the compiler used to build
+     target libraries (which runs on the build system) and the compiler
+     newly installed with `make install'; it does not affect the
+     compiler which is used to build GCC itself.
+
+`--with-build-sysroot'
+`--with-build-sysroot=DIR'
+     Tells GCC to consider DIR as the system root (see
+     `--with-sysroot') while building target libraries, instead of the
+     directory specified with `--with-sysroot'.  This option is only
+     useful when you are already using `--with-sysroot'.  You can use
+     `--with-build-sysroot' when you are configuring with `--prefix'
+     set to a directory that is different from the one in which you are
+     installing GCC and your target libraries.
+
+     This option affects the system root for the compiler used to build
+     target libraries (which runs on the build system); it does not
+     affect the compiler which is used to build GCC itself.
+
+`--with-headers'
+`--with-headers=DIR'
+     Deprecated in favor of `--with-sysroot'.  Specifies that target
+     headers are available when building a cross compiler.  The DIR
+     argument specifies a directory which has the target include files.
+     These include files will be copied into the `gcc' install
+     directory.  _This option with the DIR argument is required_ when
+     building a cross compiler, if `PREFIX/TARGET/sys-include' doesn't
+     pre-exist.  If `PREFIX/TARGET/sys-include' does pre-exist, the DIR
+     argument may be omitted.  `fixincludes' will be run on these files
+     to make them compatible with GCC.
+
+`--without-headers'
+     Tells GCC not use any target headers from a libc when building a
+     cross compiler.  When crossing to GNU/Linux, you need the headers
+     so GCC can build the exception handling for libgcc.
+
+`--with-libs'
+`--with-libs="DIR1 DIR2 ... DIRN"'
+     Deprecated in favor of `--with-sysroot'.  Specifies a list of
+     directories which contain the target runtime libraries.  These
+     libraries will be copied into the `gcc' install directory.  If the
+     directory list is omitted, this option has no effect.
+
+`--with-newlib'
+     Specifies that `newlib' is being used as the target C library.
+     This causes `__eprintf' to be omitted from `libgcc.a' on the
+     assumption that it will be provided by `newlib'.
+
+`--with-build-time-tools=DIR'
+     Specifies where to find the set of target tools (assembler,
+     linker, etc.)  that will be used while building GCC itself.  This
+     option can be useful if the directory layouts are different
+     between the system you are building GCC on, and the system where
+     you will deploy it.
+
+     For example, on an `ia64-hp-hpux' system, you may have the GNU
+     assembler and linker in `/usr/bin', and the native tools in a
+     different path, and build a toolchain that expects to find the
+     native tools in `/usr/bin'.
+
+     When you use this option, you should ensure that DIR includes
+     `ar', `as', `ld', `nm', `ranlib' and `strip' if necessary, and
+     possibly `objdump'.  Otherwise, GCC may use an inconsistent set of
+     tools.
+
+Java-Specific Options
+---------------------
+
+The following option applies to the build of the Java front end.
+
+`--disable-libgcj'
+     Specify that the run-time libraries used by GCJ should not be
+     built.  This is useful in case you intend to use GCJ with some
+     other run-time, or you're going to install it separately, or it
+     just happens not to build on your particular machine.  In general,
+     if the Java front end is enabled, the GCJ libraries will be
+     enabled too, unless they're known to not work on the target
+     platform.  If GCJ is enabled but `libgcj' isn't built, you may
+     need to port it; in this case, before modifying the top-level
+     `configure.in' so that `libgcj' is enabled by default on this
+     platform, you may use `--enable-libgcj' to override the default.
+
+
+   The following options apply to building `libgcj'.
+
+General Options
+...............
+
+`--enable-java-maintainer-mode'
+     By default the `libjava' build will not attempt to compile the
+     `.java' source files to `.class'.  Instead, it will use the
+     `.class' files from the source tree.  If you use this option you
+     must have executables named `ecj1' and `gjavah' in your path for
+     use by the build.  You must use this option if you intend to
+     modify any `.java' files in `libjava'.
+
+`--with-java-home=DIRNAME'
+     This `libjava' option overrides the default value of the
+     `java.home' system property.  It is also used to set
+     `sun.boot.class.path' to `DIRNAME/lib/rt.jar'.  By default
+     `java.home' is set to `PREFIX' and `sun.boot.class.path' to
+     `DATADIR/java/libgcj-VERSION.jar'.
+
+`--with-ecj-jar=FILENAME'
+     This option can be used to specify the location of an external jar
+     file containing the Eclipse Java compiler.  A specially modified
+     version of this compiler is used by `gcj' to parse `.java' source
+     files.  If this option is given, the `libjava' build will create
+     and install an `ecj1' executable which uses this jar file at
+     runtime.
+
+     If this option is not given, but an `ecj.jar' file is found in the
+     topmost source tree at configure time, then the `libgcj' build
+     will create and install `ecj1', and will also install the
+     discovered `ecj.jar' into a suitable place in the install tree.
+
+     If `ecj1' is not installed, then the user will have to supply one
+     on his path in order for `gcj' to properly parse `.java' source
+     files.  A suitable jar is available from
+     `ftp://sourceware.org/pub/java/'.
+
+`--disable-getenv-properties'
+     Don't set system properties from `GCJ_PROPERTIES'.
+
+`--enable-hash-synchronization'
+     Use a global hash table for monitor locks.  Ordinarily, `libgcj''s
+     `configure' script automatically makes the correct choice for this
+     option for your platform.  Only use this if you know you need the
+     library to be configured differently.
+
+`--enable-interpreter'
+     Enable the Java interpreter.  The interpreter is automatically
+     enabled by default on all platforms that support it.  This option
+     is really only useful if you want to disable the interpreter
+     (using `--disable-interpreter').
+
+`--disable-java-net'
+     Disable java.net.  This disables the native part of java.net only,
+     using non-functional stubs for native method implementations.
+
+`--disable-jvmpi'
+     Disable JVMPI support.
+
+`--disable-libgcj-bc'
+     Disable BC ABI compilation of certain parts of libgcj.  By default,
+     some portions of libgcj are compiled with `-findirect-dispatch'
+     and `-fno-indirect-classes', allowing them to be overridden at
+     run-time.
+
+     If `--disable-libgcj-bc' is specified, libgcj is built without
+     these options.  This allows the compile-time linker to resolve
+     dependencies when statically linking to libgcj.  However it makes
+     it impossible to override the affected portions of libgcj at
+     run-time.
+
+`--enable-reduced-reflection'
+     Build most of libgcj with `-freduced-reflection'.  This reduces
+     the size of libgcj at the expense of not being able to do accurate
+     reflection on the classes it contains.  This option is safe if you
+     know that code using libgcj will never use reflection on the
+     standard runtime classes in libgcj (including using serialization,
+     RMI or CORBA).
+
+`--with-ecos'
+     Enable runtime eCos target support.
+
+`--without-libffi'
+     Don't use `libffi'.  This will disable the interpreter and JNI
+     support as well, as these require `libffi' to work.
+
+`--enable-libgcj-debug'
+     Enable runtime debugging code.
+
+`--enable-libgcj-multifile'
+     If specified, causes all `.java' source files to be compiled into
+     `.class' files in one invocation of `gcj'.  This can speed up
+     build time, but is more resource-intensive.  If this option is
+     unspecified or disabled, `gcj' is invoked once for each `.java'
+     file to compile into a `.class' file.
+
+`--with-libiconv-prefix=DIR'
+     Search for libiconv in `DIR/include' and `DIR/lib'.
+
+`--enable-sjlj-exceptions'
+     Force use of the `setjmp'/`longjmp'-based scheme for exceptions.
+     `configure' ordinarily picks the correct value based on the
+     platform.  Only use this option if you are sure you need a
+     different setting.
+
+`--with-system-zlib'
+     Use installed `zlib' rather than that included with GCC.
+
+`--with-win32-nlsapi=ansi, unicows or unicode'
+     Indicates how MinGW `libgcj' translates between UNICODE characters
+     and the Win32 API.
+
+`--enable-java-home'
+     If enabled, this creates a JPackage compatible SDK environment
+     during install.  Note that if -enable-java-home is used,
+     -with-arch-directory=ARCH must also be specified.
+
+`--with-arch-directory=ARCH'
+     Specifies the name to use for the `jre/lib/ARCH' directory in the
+     SDK environment created when -enable-java-home is passed. Typical
+     names for this directory include i386, amd64, ia64, etc.
+
+`--with-os-directory=DIR'
+     Specifies the OS directory for the SDK include directory. This is
+     set to auto detect, and is typically 'linux'.
+
+`--with-origin-name=NAME'
+     Specifies the JPackage origin name. This defaults to the 'gcj' in
+     java-1.5.0-gcj.
+
+`--with-arch-suffix=SUFFIX'
+     Specifies the suffix for the sdk directory. Defaults to the empty
+     string.  Examples include '.x86_64' in
+     'java-1.5.0-gcj-1.5.0.0.x86_64'.
+
+`--with-jvm-root-dir=DIR'
+     Specifies where to install the SDK. Default is $(prefix)/lib/jvm.
+
+`--with-jvm-jar-dir=DIR'
+     Specifies where to install jars. Default is
+     $(prefix)/lib/jvm-exports.
+
+`--with-python-dir=DIR'
+     Specifies where to install the Python modules used for
+     aot-compile. DIR should not include the prefix used in
+     installation. For example, if the Python modules are to be
+     installed in /usr/lib/python2.5/site-packages, then
+     -with-python-dir=/lib/python2.5/site-packages should be passed. If
+     this is not specified, then the Python modules are installed in
+     $(prefix)/share/python.
+
+`--enable-aot-compile-rpm'
+     Adds aot-compile-rpm to the list of installed scripts.
+
+`--enable-browser-plugin'
+     Build the gcjwebplugin web browser plugin.
+
+    `ansi'
+          Use the single-byte `char' and the Win32 A functions natively,
+          translating to and from UNICODE when using these functions.
+          If unspecified, this is the default.
+
+    `unicows'
+          Use the `WCHAR' and Win32 W functions natively.  Adds
+          `-lunicows' to `libgcj.spec' to link with `libunicows'.
+          `unicows.dll' needs to be deployed on Microsoft Windows 9X
+          machines running built executables.  `libunicows.a', an
+          open-source import library around Microsoft's `unicows.dll',
+          is obtained from `http://libunicows.sourceforge.net/', which
+          also gives details on getting `unicows.dll' from Microsoft.
+
+    `unicode'
+          Use the `WCHAR' and Win32 W functions natively.  Does _not_
+          add `-lunicows' to `libgcj.spec'.  The built executables will
+          only run on Microsoft Windows NT and above.
+
+AWT-Specific Options
+....................
+
+`--with-x'
+     Use the X Window System.
+
+`--enable-java-awt=PEER(S)'
+     Specifies the AWT peer library or libraries to build alongside
+     `libgcj'.  If this option is unspecified or disabled, AWT will be
+     non-functional.  Current valid values are `gtk' and `xlib'.
+     Multiple libraries should be separated by a comma (i.e.
+     `--enable-java-awt=gtk,xlib').
+
+`--enable-gtk-cairo'
+     Build the cairo Graphics2D implementation on GTK.
+
+`--enable-java-gc=TYPE'
+     Choose garbage collector.  Defaults to `boehm' if unspecified.
+
+`--disable-gtktest'
+     Do not try to compile and run a test GTK+ program.
+
+`--disable-glibtest'
+     Do not try to compile and run a test GLIB program.
+
+`--with-libart-prefix=PFX'
+     Prefix where libart is installed (optional).
+
+`--with-libart-exec-prefix=PFX'
+     Exec prefix where libart is installed (optional).
+
+`--disable-libarttest'
+     Do not try to compile and run a test libart program.
+
+
+
+File: gccinstall.info,  Node: Building,  Next: Testing,  Prev: Configuration,  Up: Installing GCC
+
+5 Building
+**********
+
+   Now that GCC is configured, you are ready to build the compiler and
+runtime libraries.
+
+   Some commands executed when making the compiler may fail (return a
+nonzero status) and be ignored by `make'.  These failures, which are
+often due to files that were not found, are expected, and can safely be
+ignored.
+
+   It is normal to have compiler warnings when compiling certain files.
+Unless you are a GCC developer, you can generally ignore these warnings
+unless they cause compilation to fail.  Developers should attempt to fix
+any warnings encountered, however they can temporarily continue past
+warnings-as-errors by specifying the configure flag `--disable-werror'.
+
+   On certain old systems, defining certain environment variables such
+as `CC' can interfere with the functioning of `make'.
+
+   If you encounter seemingly strange errors when trying to build the
+compiler in a directory other than the source directory, it could be
+because you have previously configured the compiler in the source
+directory.  Make sure you have done all the necessary preparations.
+
+   If you build GCC on a BSD system using a directory stored in an old
+System V file system, problems may occur in running `fixincludes' if the
+System V file system doesn't support symbolic links.  These problems
+result in a failure to fix the declaration of `size_t' in
+`sys/types.h'.  If you find that `size_t' is a signed type and that
+type mismatches occur, this could be the cause.
+
+   The solution is not to use such a directory for building GCC.
+
+   Similarly, when building from SVN or snapshots, or if you modify
+`*.l' files, you need the Flex lexical analyzer generator installed.
+If you do not modify `*.l' files, releases contain the Flex-generated
+files and you do not need Flex installed to build them.  There is still
+one Flex-based lexical analyzer (part of the build machinery, not of
+GCC itself) that is used even if you only build the C front end.
+
+   When building from SVN or snapshots, or if you modify Texinfo
+documentation, you need version 4.7 or later of Texinfo installed if you
+want Info documentation to be regenerated.  Releases contain Info
+documentation pre-built for the unmodified documentation in the release.
+
+5.1 Building a native compiler
+==============================
+
+For a native build, the default configuration is to perform a 3-stage
+bootstrap of the compiler when `make' is invoked.  This will build the
+entire GCC system and ensure that it compiles itself correctly.  It can
+be disabled with the `--disable-bootstrap' parameter to `configure',
+but bootstrapping is suggested because the compiler will be tested more
+completely and could also have better performance.
+
+   The bootstrapping process will complete the following steps:
+
+   * Build tools necessary to build the compiler.
+
+   * Perform a 3-stage bootstrap of the compiler.  This includes
+     building three times the target tools for use by the compiler such
+     as binutils (bfd, binutils, gas, gprof, ld, and opcodes) if they
+     have been individually linked or moved into the top level GCC
+     source tree before configuring.
+
+   * Perform a comparison test of the stage2 and stage3 compilers.
+
+   * Build runtime libraries using the stage3 compiler from the
+     previous step.
+
+
+   If you are short on disk space you might consider `make
+bootstrap-lean' instead.  The sequence of compilation is the same
+described above, but object files from the stage1 and stage2 of the
+3-stage bootstrap of the compiler are deleted as soon as they are no
+longer needed.
+
+   If you wish to use non-default GCC flags when compiling the stage2
+and stage3 compilers, set `BOOT_CFLAGS' on the command line when doing
+`make'.  For example, if you want to save additional space during the
+bootstrap and in the final installation as well, you can build the
+compiler binaries without debugging information as in the following
+example.  This will save roughly 40% of disk space both for the
+bootstrap and the final installation.  (Libraries will still contain
+debugging information.)
+
+          make BOOT_CFLAGS='-O' bootstrap
+
+   You can place non-default optimization flags into `BOOT_CFLAGS'; they
+are less well tested here than the default of `-g -O2', but should
+still work.  In a few cases, you may find that you need to specify
+special flags such as `-msoft-float' here to complete the bootstrap; or,
+if the native compiler miscompiles the stage1 compiler, you may need to
+work around this, by choosing `BOOT_CFLAGS' to avoid the parts of the
+stage1 compiler that were miscompiled, or by using `make bootstrap4' to
+increase the number of stages of bootstrap.
+
+   `BOOT_CFLAGS' does not apply to bootstrapped target libraries.
+Since these are always compiled with the compiler currently being
+bootstrapped, you can use `CFLAGS_FOR_TARGET' to modify their
+compilation flags, as for non-bootstrapped target libraries.  Again, if
+the native compiler miscompiles the stage1 compiler, you may need to
+work around this by avoiding non-working parts of the stage1 compiler.
+Use `STAGE1_TFLAGS' to this end.
+
+   If you used the flag `--enable-languages=...' to restrict the
+compilers to be built, only those you've actually enabled will be
+built.  This will of course only build those runtime libraries, for
+which the particular compiler has been built.  Please note, that
+re-defining `LANGUAGES' when calling `make' *does not* work anymore!
+
+   If the comparison of stage2 and stage3 fails, this normally indicates
+that the stage2 compiler has compiled GCC incorrectly, and is therefore
+a potentially serious bug which you should investigate and report.  (On
+a few systems, meaningful comparison of object files is impossible; they
+always appear "different".  If you encounter this problem, you will
+need to disable comparison in the `Makefile'.)
+
+   If you do not want to bootstrap your compiler, you can configure with
+`--disable-bootstrap'.  In particular cases, you may want to bootstrap
+your compiler even if the target system is not the same as the one you
+are building on: for example, you could build a
+`powerpc-unknown-linux-gnu' toolchain on a
+`powerpc64-unknown-linux-gnu' host.  In this case, pass
+`--enable-bootstrap' to the configure script.
+
+   `BUILD_CONFIG' can be used to bring in additional customization to
+the build.  It can be set to a whitespace-separated list of names.  For
+each such `NAME', top-level `config/`NAME'.mk' will be included by the
+top-level `Makefile', bringing in any settings it contains.  The
+default `BUILD_CONFIG' can be set using the configure option
+`--with-build-config=`NAME'...'.  Some examples of supported build
+configurations are:
+
+`bootstrap-O1'
+     Removes any `-O'-started option from `BOOT_CFLAGS', and adds `-O1'
+     to it.  `BUILD_CONFIG=bootstrap-O1' is equivalent to
+     `BOOT_CFLAGS='-g -O1''.
+
+`bootstrap-O3'
+     Analogous to `bootstrap-O1'.
+
+`bootstrap-debug'
+     Verifies that the compiler generates the same executable code,
+     whether or not it is asked to emit debug information.  To this
+     end, this option builds stage2 host programs without debug
+     information, and uses `contrib/compare-debug' to compare them with
+     the stripped stage3 object files.  If `BOOT_CFLAGS' is overridden
+     so as to not enable debug information, stage2 will have it, and
+     stage3 won't.  This option is enabled by default when GCC
+     bootstrapping is enabled, if `strip' can turn object files
+     compiled with and without debug info into identical object files.
+     In addition to better test coverage, this option makes default
+     bootstraps faster and leaner.
+
+`bootstrap-debug-big'
+     Rather than comparing stripped object files, as in
+     `bootstrap-debug', this option saves internal compiler dumps
+     during stage2 and stage3 and compares them as well, which helps
+     catch additional potential problems, but at a great cost in terms
+     of disk space.  It can be specified in addition to
+     `bootstrap-debug'.
+
+`bootstrap-debug-lean'
+     This option saves disk space compared with `bootstrap-debug-big',
+     but at the expense of some recompilation.  Instead of saving the
+     dumps of stage2 and stage3 until the final compare, it uses
+     `-fcompare-debug' to generate, compare and remove the dumps during
+     stage3, repeating the compilation that already took place in
+     stage2, whose dumps were not saved.
+
+`bootstrap-debug-lib'
+     This option tests executable code invariance over debug information
+     generation on target libraries, just like `bootstrap-debug-lean'
+     tests it on host programs.  It builds stage3 libraries with
+     `-fcompare-debug', and it can be used along with any of the
+     `bootstrap-debug' options above.
+
+     There aren't `-lean' or `-big' counterparts to this option because
+     most libraries are only build in stage3, so bootstrap compares
+     would not get significant coverage.  Moreover, the few libraries
+     built in stage2 are used in stage3 host programs, so we wouldn't
+     want to compile stage2 libraries with different options for
+     comparison purposes.
+
+`bootstrap-debug-ckovw'
+     Arranges for error messages to be issued if the compiler built on
+     any stage is run without the option `-fcompare-debug'.  This is
+     useful to verify the full `-fcompare-debug' testing coverage.  It
+     must be used along with `bootstrap-debug-lean' and
+     `bootstrap-debug-lib'.
+
+`bootstrap-time'
+     Arranges for the run time of each program started by the GCC
+     driver, built in any stage, to be logged to `time.log', in the top
+     level of the build tree.
+
+
+5.2 Building a cross compiler
+=============================
+
+When building a cross compiler, it is not generally possible to do a
+3-stage bootstrap of the compiler.  This makes for an interesting
+problem as parts of GCC can only be built with GCC.
+
+   To build a cross compiler, we recommend first building and
+installing a native compiler.  You can then use the native GCC compiler
+to build the cross compiler.  The installed native compiler needs to be
+GCC version 2.95 or later.
+
+   If the cross compiler is to be built with support for the Java
+programming language and the ability to compile .java source files is
+desired, the installed native compiler used to build the cross compiler
+needs to be the same GCC version as the cross compiler.  In addition
+the cross compiler needs to be configured with `--with-ecj-jar=...'.
+
+   Assuming you have already installed a native copy of GCC and
+configured your cross compiler, issue the command `make', which
+performs the following steps:
+
+   * Build host tools necessary to build the compiler.
+
+   * Build target tools for use by the compiler such as binutils (bfd,
+     binutils, gas, gprof, ld, and opcodes) if they have been
+     individually linked or moved into the top level GCC source tree
+     before configuring.
+
+   * Build the compiler (single stage only).
+
+   * Build runtime libraries using the compiler from the previous step.
+
+   Note that if an error occurs in any step the make process will exit.
+
+   If you are not building GNU binutils in the same source tree as GCC,
+you will need a cross-assembler and cross-linker installed before
+configuring GCC.  Put them in the directory `PREFIX/TARGET/bin'.  Here
+is a table of the tools you should put in this directory:
+
+`as'
+     This should be the cross-assembler.
+
+`ld'
+     This should be the cross-linker.
+
+`ar'
+     This should be the cross-archiver: a program which can manipulate
+     archive files (linker libraries) in the target machine's format.
+
+`ranlib'
+     This should be a program to construct a symbol table in an archive
+     file.
+
+   The installation of GCC will find these programs in that directory,
+and copy or link them to the proper place to for the cross-compiler to
+find them when run later.
+
+   The easiest way to provide these files is to build the Binutils
+package.  Configure it with the same `--host' and `--target' options
+that you use for configuring GCC, then build and install them.  They
+install their executables automatically into the proper directory.
+Alas, they do not support all the targets that GCC supports.
+
+   If you are not building a C library in the same source tree as GCC,
+you should also provide the target libraries and headers before
+configuring GCC, specifying the directories with `--with-sysroot' or
+`--with-headers' and `--with-libs'.  Many targets also require "start
+files" such as `crt0.o' and `crtn.o' which are linked into each
+executable.  There may be several alternatives for `crt0.o', for use
+with profiling or other compilation options.  Check your target's
+definition of `STARTFILE_SPEC' to find out what start files it uses.
+
+5.3 Building in parallel
+========================
+
+GNU Make 3.80 and above, which is necessary to build GCC, support
+building in parallel.  To activate this, you can use `make -j 2'
+instead of `make'.  You can also specify a bigger number, and in most
+cases using a value greater than the number of processors in your
+machine will result in fewer and shorter I/O latency hits, thus
+improving overall throughput; this is especially true for slow drives
+and network filesystems.
+
+5.4 Building the Ada compiler
+=============================
+
+In order to build GNAT, the Ada compiler, you need a working GNAT
+compiler (GCC version 3.4 or later).  This includes GNAT tools such as
+`gnatmake' and `gnatlink', since the Ada front end is written in Ada and
+uses some GNAT-specific extensions.
+
+   In order to build a cross compiler, it is suggested to install the
+new compiler as native first, and then use it to build the cross
+compiler.
+
+   `configure' does not test whether the GNAT installation works and
+has a sufficiently recent version; if too old a GNAT version is
+installed, the build will fail unless `--enable-languages' is used to
+disable building the Ada front end.
+
+   `ADA_INCLUDE_PATH' and `ADA_OBJECT_PATH' environment variables must
+not be set when building the Ada compiler, the Ada tools, or the Ada
+runtime libraries. You can check that your build environment is clean
+by verifying that `gnatls -v' lists only one explicit path in each
+section.
+
+5.5 Building with profile feedback
+==================================
+
+It is possible to use profile feedback to optimize the compiler itself.
+This should result in a faster compiler binary.  Experiments done on
+x86 using gcc 3.3 showed approximately 7 percent speedup on compiling C
+programs.  To bootstrap the compiler with profile feedback, use `make
+profiledbootstrap'.
+
+   When `make profiledbootstrap' is run, it will first build a `stage1'
+compiler.  This compiler is used to build a `stageprofile' compiler
+instrumented to collect execution counts of instruction and branch
+probabilities.  Then runtime libraries are compiled with profile
+collected.  Finally a `stagefeedback' compiler is built using the
+information collected.
+
+   Unlike standard bootstrap, several additional restrictions apply.
+The compiler used to build `stage1' needs to support a 64-bit integral
+type.  It is recommended to only use GCC for this.  Also parallel make
+is currently not supported since collisions in profile collecting may
+occur.
+
+
+File: gccinstall.info,  Node: Testing,  Next: Final install,  Prev: Building,  Up: Installing GCC
+
+6 Installing GCC: Testing
+*************************
+
+   Before you install GCC, we encourage you to run the testsuites and to
+compare your results with results from a similar configuration that have
+been submitted to the gcc-testresults mailing list.  Some of these
+archived results are linked from the build status lists at
+`http://gcc.gnu.org/buildstat.html', although not everyone who reports
+a successful build runs the testsuites and submits the results.  This
+step is optional and may require you to download additional software,
+but it can give you confidence in your new GCC installation or point out
+problems before you install and start using your new GCC.
+
+   First, you must have downloaded the testsuites.  These are part of
+the full distribution, but if you downloaded the "core" compiler plus
+any front ends, you must download the testsuites separately.
+
+   Second, you must have the testing tools installed.  This includes
+DejaGnu, Tcl, and Expect; the DejaGnu site has links to these.
+
+   If the directories where `runtest' and `expect' were installed are
+not in the `PATH', you may need to set the following environment
+variables appropriately, as in the following example (which assumes
+that DejaGnu has been installed under `/usr/local'):
+
+          TCL_LIBRARY = /usr/local/share/tcl8.0
+          DEJAGNULIBS = /usr/local/share/dejagnu
+
+   (On systems such as Cygwin, these paths are required to be actual
+paths, not mounts or links; presumably this is due to some lack of
+portability in the DejaGnu code.)
+
+   Finally, you can run the testsuite (which may take a long time):
+          cd OBJDIR; make -k check
+
+   This will test various components of GCC, such as compiler front
+ends and runtime libraries.  While running the testsuite, DejaGnu might
+emit some harmless messages resembling `WARNING: Couldn't find the
+global config file.' or `WARNING: Couldn't find tool init file' that
+can be ignored.
+
+   If you are testing a cross-compiler, you may want to run the
+testsuite on a simulator as described at
+`http://gcc.gnu.org/simtest-howto.html'.
+
+6.1 How can you run the testsuite on selected tests?
+====================================================
+
+In order to run sets of tests selectively, there are targets `make
+check-gcc' and `make check-g++' in the `gcc' subdirectory of the object
+directory.  You can also just run `make check' in a subdirectory of the
+object directory.
+
+   A more selective way to just run all `gcc' execute tests in the
+testsuite is to use
+
+         make check-gcc RUNTESTFLAGS="execute.exp OTHER-OPTIONS"
+
+   Likewise, in order to run only the `g++' "old-deja" tests in the
+testsuite with filenames matching `9805*', you would use
+
+         make check-g++ RUNTESTFLAGS="old-deja.exp=9805* OTHER-OPTIONS"
+
+   The `*.exp' files are located in the testsuite directories of the GCC
+source, the most important ones being `compile.exp', `execute.exp',
+`dg.exp' and `old-deja.exp'.  To get a list of the possible `*.exp'
+files, pipe the output of `make check' into a file and look at the
+`Running ...  .exp' lines.
+
+6.2 Passing options and running multiple testsuites
+===================================================
+
+You can pass multiple options to the testsuite using the
+`--target_board' option of DejaGNU, either passed as part of
+`RUNTESTFLAGS', or directly to `runtest' if you prefer to work outside
+the makefiles.  For example,
+
+         make check-g++ RUNTESTFLAGS="--target_board=unix/-O3/-fmerge-constants"
+
+   will run the standard `g++' testsuites ("unix" is the target name
+for a standard native testsuite situation), passing `-O3
+-fmerge-constants' to the compiler on every test, i.e., slashes
+separate options.
+
+   You can run the testsuites multiple times using combinations of
+options with a syntax similar to the brace expansion of popular shells:
+
+         ..."--target_board=arm-sim\{-mhard-float,-msoft-float\}\{-O1,-O2,-O3,\}"
+
+   (Note the empty option caused by the trailing comma in the final
+group.)  The following will run each testsuite eight times using the
+`arm-sim' target, as if you had specified all possible combinations
+yourself:
+
+         --target_board=arm-sim/-mhard-float/-O1
+         --target_board=arm-sim/-mhard-float/-O2
+         --target_board=arm-sim/-mhard-float/-O3
+         --target_board=arm-sim/-mhard-float
+         --target_board=arm-sim/-msoft-float/-O1
+         --target_board=arm-sim/-msoft-float/-O2
+         --target_board=arm-sim/-msoft-float/-O3
+         --target_board=arm-sim/-msoft-float
+
+   They can be combined as many times as you wish, in arbitrary ways.
+This list:
+
+         ..."--target_board=unix/-Wextra\{-O3,-fno-strength\}\{-fomit-frame,\}"
+
+   will generate four combinations, all involving `-Wextra'.
+
+   The disadvantage to this method is that the testsuites are run in
+serial, which is a waste on multiprocessor systems.  For users with GNU
+Make and a shell which performs brace expansion, you can run the
+testsuites in parallel by having the shell perform the combinations and
+`make' do the parallel runs.  Instead of using `--target_board', use a
+special makefile target:
+
+         make -jN check-TESTSUITE//TEST-TARGET/OPTION1/OPTION2/...
+
+   For example,
+
+         make -j3 check-gcc//sh-hms-sim/{-m1,-m2,-m3,-m3e,-m4}/{,-nofpu}
+
+   will run three concurrent "make-gcc" testsuites, eventually testing
+all ten combinations as described above.  Note that this is currently
+only supported in the `gcc' subdirectory.  (To see how this works, try
+typing `echo' before the example given here.)
+
+6.3 Additional testing for Java Class Libraries
+===============================================
+
+The Java runtime tests can be executed via `make check' in the
+`TARGET/libjava/testsuite' directory in the build tree.
+
+   The Mauve Project provides a suite of tests for the Java Class
+Libraries.  This suite can be run as part of libgcj testing by placing
+the Mauve tree within the libjava testsuite at
+`libjava/testsuite/libjava.mauve/mauve', or by specifying the location
+of that tree when invoking `make', as in `make MAUVEDIR=~/mauve check'.
+
+6.4 How to interpret test results
+=================================
+
+The result of running the testsuite are various `*.sum' and `*.log'
+files in the testsuite subdirectories.  The `*.log' files contain a
+detailed log of the compiler invocations and the corresponding results,
+the `*.sum' files summarize the results.  These summaries contain
+status codes for all tests:
+
+   * PASS: the test passed as expected
+
+   * XPASS: the test unexpectedly passed
+
+   * FAIL: the test unexpectedly failed
+
+   * XFAIL: the test failed as expected
+
+   * UNSUPPORTED: the test is not supported on this platform
+
+   * ERROR: the testsuite detected an error
+
+   * WARNING: the testsuite detected a possible problem
+
+   It is normal for some tests to report unexpected failures.  At the
+current time the testing harness does not allow fine grained control
+over whether or not a test is expected to fail.  This problem should be
+fixed in future releases.
+
+6.5 Submitting test results
+===========================
+
+If you want to report the results to the GCC project, use the
+`contrib/test_summary' shell script.  Start it in the OBJDIR with
+
+         SRCDIR/contrib/test_summary -p your_commentary.txt \
+             -m gcc-testresults@gcc.gnu.org |sh
+
+   This script uses the `Mail' program to send the results, so make
+sure it is in your `PATH'.  The file `your_commentary.txt' is prepended
+to the testsuite summary and should contain any special remarks you
+have on your results or your build environment.  Please do not edit the
+testsuite result block or the subject line, as these messages may be
+automatically processed.
+
+
+File: gccinstall.info,  Node: Final install,  Prev: Testing,  Up: Installing GCC
+
+7 Installing GCC: Final installation
+************************************
+
+   Now that GCC has been built (and optionally tested), you can install
+it with
+     cd OBJDIR; make install
+
+   We strongly recommend to install into a target directory where there
+is no previous version of GCC present.  Also, the GNAT runtime should
+not be stripped, as this would break certain features of the debugger
+that depend on this debugging information (catching Ada exceptions for
+instance).
+
+   That step completes the installation of GCC; user level binaries can
+be found in `PREFIX/bin' where PREFIX is the value you specified with
+the `--prefix' to configure (or `/usr/local' by default).  (If you
+specified `--bindir', that directory will be used instead; otherwise,
+if you specified `--exec-prefix', `EXEC-PREFIX/bin' will be used.)
+Headers for the C++ and Java libraries are installed in
+`PREFIX/include'; libraries in `LIBDIR' (normally `PREFIX/lib');
+internal parts of the compiler in `LIBDIR/gcc' and `LIBEXECDIR/gcc';
+documentation in info format in `INFODIR' (normally `PREFIX/info').
+
+   When installing cross-compilers, GCC's executables are not only
+installed into `BINDIR', that is, `EXEC-PREFIX/bin', but additionally
+into `EXEC-PREFIX/TARGET-ALIAS/bin', if that directory exists.
+Typically, such "tooldirs" hold target-specific binutils, including
+assembler and linker.
+
+   Installation into a temporary staging area or into a `chroot' jail
+can be achieved with the command
+
+     make DESTDIR=PATH-TO-ROOTDIR install
+
+where PATH-TO-ROOTDIR is the absolute path of a directory relative to
+which all installation paths will be interpreted.  Note that the
+directory specified by `DESTDIR' need not exist yet; it will be created
+if necessary.
+
+   There is a subtle point with tooldirs and `DESTDIR': If you relocate
+a cross-compiler installation with e.g. `DESTDIR=ROOTDIR', then the
+directory `ROOTDIR/EXEC-PREFIX/TARGET-ALIAS/bin' will be filled with
+duplicated GCC executables only if it already exists, it will not be
+created otherwise.  This is regarded as a feature, not as a bug,
+because it gives slightly more control to the packagers using the
+`DESTDIR' feature.
+
+   If you are bootstrapping a released version of GCC then please
+quickly review the build status page for your release, available from
+`http://gcc.gnu.org/buildstat.html'.  If your system is not listed for
+the version of GCC that you built, send a note to <gcc@gcc.gnu.org>
+indicating that you successfully built and installed GCC.  Include the
+following information:
+
+   * Output from running `SRCDIR/config.guess'.  Do not send that file
+     itself, just the one-line output from running it.
+
+   * The output of `gcc -v' for your newly installed `gcc'.  This tells
+     us which version of GCC you built and the options you passed to
+     configure.
+
+   * Whether you enabled all languages or a subset of them.  If you
+     used a full distribution then this information is part of the
+     configure options in the output of `gcc -v', but if you downloaded
+     the "core" compiler plus additional front ends then it isn't
+     apparent which ones you built unless you tell us about it.
+
+   * If the build was for GNU/Linux, also include:
+        * The distribution name and version (e.g., Red Hat 7.1 or
+          Debian 2.2.3); this information should be available from
+          `/etc/issue'.
+
+        * The version of the Linux kernel, available from `uname
+          --version' or `uname -a'.
+
+        * The version of glibc you used; for RPM-based systems like Red
+          Hat, Mandrake, and SuSE type `rpm -q glibc' to get the glibc
+          version, and on systems like Debian and Progeny use `dpkg -l
+          libc6'.
+     For other systems, you can include similar information if you
+     think it is relevant.
+
+   * Any other information that you think would be useful to people
+     building GCC on the same configuration.  The new entry in the
+     build status list will include a link to the archived copy of your
+     message.
+
+   We'd also like to know if the *note host/target specific
+installation notes: Specific.  didn't include your host/target
+information or if that information is incomplete or out of date.  Send
+a note to <gcc@gcc.gnu.org> detailing how the information should be
+changed.
+
+   If you find a bug, please report it following the bug reporting
+guidelines.
+
+   If you want to print the GCC manuals, do `cd OBJDIR; make dvi'.  You
+will need to have `texi2dvi' (version at least 4.7) and TeX installed.
+This creates a number of `.dvi' files in subdirectories of `OBJDIR';
+these may be converted for printing with programs such as `dvips'.
+Alternately, by using `make pdf' in place of `make dvi', you can create
+documentation in the form of `.pdf' files; this requires `texi2pdf',
+which is included with Texinfo version 4.8 and later.  You can also buy
+printed manuals from the Free Software Foundation, though such manuals
+may not be for the most recent version of GCC.
+
+   If you would like to generate online HTML documentation, do `cd
+OBJDIR; make html' and HTML will be generated for the gcc manuals in
+`OBJDIR/gcc/HTML'.
+
+
+File: gccinstall.info,  Node: Binaries,  Next: Specific,  Prev: Installing GCC,  Up: Top
+
+8 Installing GCC: Binaries
+**************************
+
+   We are often asked about pre-compiled versions of GCC.  While we
+cannot provide these for all platforms, below you'll find links to
+binaries for various platforms where creating them by yourself is not
+easy due to various reasons.
+
+   Please note that we did not create these binaries, nor do we support
+them.  If you have any problems installing them, please contact their
+makers.
+
+   * AIX:
+        * Bull's Freeware and Shareware Archive for AIX;
+
+        * Hudson Valley Community College Open Source Software for IBM
+          System p;
+
+        * AIX 5L and 6 Open Source Packages.
+
+   * DOS--DJGPP.
+
+   * Renesas H8/300[HS]--GNU Development Tools for the Renesas
+     H8/300[HS] Series.
+
+   * HP-UX:
+        * HP-UX Porting Center;
+
+        * Binaries for HP-UX 11.00 at Aachen University of Technology.
+
+   * Motorola 68HC11/68HC12--GNU Development Tools for the Motorola
+     68HC11/68HC12.
+
+   * SCO OpenServer/Unixware.
+
+   * Solaris 2 (SPARC, Intel)--Sunfreeware.
+
+   * SGI--SGI Freeware.
+
+   * Microsoft Windows:
+        * The Cygwin project;
+
+        * The MinGW project.
+
+   * The Written Word offers binaries for AIX 4.3.3, 5.1 and 5.2, IRIX
+     6.5, Tru64 UNIX 4.0D and 5.1, GNU/Linux (i386), HP-UX 10.20,
+     11.00, and 11.11, and Solaris/SPARC 2.5.1, 2.6, 7, 8, 9 and 10.
+
+   * OpenPKG offers binaries for quite a number of platforms.
+
+   * The GFortran Wiki has links to GNU Fortran binaries for several
+     platforms.
+
+
+File: gccinstall.info,  Node: Specific,  Next: Old,  Prev: Binaries,  Up: Top
+
+9 Host/target specific installation notes for GCC
+*************************************************
+
+   Please read this document carefully _before_ installing the GNU
+Compiler Collection on your machine.
+
+   Note that this list of install notes is _not_ a list of supported
+hosts or targets.  Not all supported hosts and targets are listed here,
+only the ones that require host-specific or target-specific information
+are.
+
+alpha*-*-*
+==========
+
+This section contains general configuration information for all
+alpha-based platforms using ELF (in particular, ignore this section for
+DEC OSF/1, Digital UNIX and Tru64 UNIX).  In addition to reading this
+section, please read all other sections that match your target.
+
+   We require binutils 2.11.2 or newer.  Previous binutils releases had
+a number of problems with DWARF 2 debugging information, not the least
+of which is incorrect linking of shared libraries.
+
+alpha*-dec-osf*
+===============
+
+Systems using processors that implement the DEC Alpha architecture and
+are running the DEC/Compaq/HP Unix (DEC OSF/1, Digital UNIX, or
+Compaq/HP Tru64 UNIX) operating system, for example the DEC Alpha AXP
+systems.
+
+   As of GCC 3.2, versions before `alpha*-dec-osf4' are no longer
+supported.  (These are the versions which identify themselves as DEC
+OSF/1.)  As of GCC 4.5, support for Tru64 UNIX V4.0 and V5.0 has been
+obsoleted, but can still be enabled by configuring with
+`--enable-obsolete'.  Support will be removed in GCC 4.6.
+
+   On Tru64 UNIX, virtual memory exhausted bootstrap failures may be
+fixed by reconfiguring Kernel Virtual Memory and Swap parameters per
+the `/usr/sbin/sys_check' Tuning Suggestions, or applying the patch in
+`http://gcc.gnu.org/ml/gcc/2002-08/msg00822.html'.  Depending on the OS
+version used, you need a data segment size between 512 MB and 1 GB, so
+simply use `ulimit -Sd unlimited'.
+
+   As of GNU binutils 2.20.1, neither GNU `as' nor GNU `ld' are
+supported on Tru64 UNIX, so you must not configure GCC with
+`--with-gnu-as' or `--with-gnu-ld'.
+
+   GCC writes a `.verstamp' directive to the assembler output file
+unless it is built as a cross-compiler.  It gets the version to use from
+the system header file `/usr/include/stamp.h'.  If you install a new
+version of Tru64 UNIX, you should rebuild GCC to pick up the new version
+stamp.
+
+   GCC now supports both the native (ECOFF) debugging format used by DBX
+and GDB and an encapsulated STABS format for use only with GDB.  See the
+discussion of the `--with-stabs' option of `configure' above for more
+information on these formats and how to select them.
+
+   There is a bug in DEC's assembler that produces incorrect line
+numbers for ECOFF format when the `.align' directive is used.  To work
+around this problem, GCC will not emit such alignment directives while
+writing ECOFF format debugging information even if optimization is
+being performed.  Unfortunately, this has the very undesirable
+side-effect that code addresses when `-O' is specified are different
+depending on whether or not `-g' is also specified.
+
+   To avoid this behavior, specify `-gstabs+' and use GDB instead of
+DBX.  DEC is now aware of this problem with the assembler and hopes to
+provide a fix shortly.
+
+arc-*-elf
+=========
+
+Argonaut ARC processor.  This configuration is intended for embedded
+systems.
+
+arm-*-elf
+=========
+
+ARM-family processors.  Subtargets that use the ELF object format
+require GNU binutils 2.13 or newer.  Such subtargets include:
+`arm-*-freebsd', `arm-*-netbsdelf', `arm-*-*linux' and `arm-*-rtems'.
+
+avr
+===
+
+ATMEL AVR-family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.  *Note AVR
+Options: (gcc)AVR Options, for the list of supported MCU types.
+
+   Use `configure --target=avr --enable-languages="c"' to configure GCC.
+
+   Further installation notes and other useful information about AVR
+tools can also be obtained from:
+
+   * http://www.nongnu.org/avr/
+
+   * http://www.amelek.gda.pl/avr/
+
+   We _strongly_ recommend using binutils 2.13 or newer.
+
+   The following error:
+       Error: register required
+
+   indicates that you should upgrade to a newer version of the binutils.
+
+Blackfin
+========
+
+The Blackfin processor, an Analog Devices DSP.  *Note Blackfin Options:
+(gcc)Blackfin Options,
+
+   More information, and a version of binutils with support for this
+processor, is available at `http://blackfin.uclinux.org'
+
+CRIS
+====
+
+CRIS is the CPU architecture in Axis Communications ETRAX
+system-on-a-chip series.  These are used in embedded applications.
+
+   *Note CRIS Options: (gcc)CRIS Options, for a list of CRIS-specific
+options.
+
+   There are a few different CRIS targets:
+`cris-axis-elf'
+     Mainly for monolithic embedded systems.  Includes a multilib for
+     the `v10' core used in `ETRAX 100 LX'.
+
+`cris-axis-linux-gnu'
+     A GNU/Linux port for the CRIS architecture, currently targeting
+     `ETRAX 100 LX' by default.
+
+   For `cris-axis-elf' you need binutils 2.11 or newer.  For
+`cris-axis-linux-gnu' you need binutils 2.12 or newer.
+
+   Pre-packaged tools can be obtained from
+`ftp://ftp.axis.com/pub/axis/tools/cris/compiler-kit/'.  More
+information about this platform is available at
+`http://developer.axis.com/'.
+
+CRX
+===
+
+The CRX CompactRISC architecture is a low-power 32-bit architecture with
+fast context switching and architectural extensibility features.
+
+   *Note CRX Options: (gcc)CRX Options,
+
+   Use `configure --target=crx-elf --enable-languages=c,c++' to
+configure GCC for building a CRX cross-compiler. The option
+`--target=crx-elf' is also used to build the `newlib' C library for CRX.
+
+   It is also possible to build libstdc++-v3 for the CRX architecture.
+This needs to be done in a separate step with the following configure
+settings: `gcc/libstdc++-v3/configure --host=crx-elf --with-newlib
+--enable-sjlj-exceptions --enable-cxx-flags='-fexceptions -frtti''
+
+DOS
+===
+
+Please have a look at the binaries page.
+
+   You cannot install GCC by itself on MSDOS; it will not compile under
+any MSDOS compiler except itself.  You need to get the complete
+compilation package DJGPP, which includes binaries as well as sources,
+and includes all the necessary compilation tools and libraries.
+
+*-*-freebsd*
+============
+
+Support for FreeBSD 1 was discontinued in GCC 3.2.  Support for FreeBSD
+2 (and any mutant a.out variants of FreeBSD 3) was discontinued in GCC
+4.0.
+
+   In GCC 4.5, we enabled the use of `dl_iterate_phdr' inside boehm-gc
+on FreeBSD 7 or later.  In order to better match the configuration of
+the FreeBSD system compiler: We also enabled the check to see if libc
+provides SSP support (which it does on FreeBSD 7), the use of
+`dl_iterate_phdr' inside `libgcc_s.so.1' (on FreeBSD 7 or later) and
+the use of `__cxa_atexit' by default (on FreeBSD 6 or later).
+
+   We support FreeBSD using the ELF file format with DWARF 2 debugging
+for all CPU architectures.  You may use `-gstabs' instead of `-g', if
+you really want the old debugging format.  There are no known issues
+with mixing object files and libraries with different debugging
+formats.  Otherwise, this release of GCC should now match more of the
+configuration used in the stock FreeBSD configuration of GCC.  In
+particular, `--enable-threads' is now configured by default.  However,
+as a general user, do not attempt to replace the system compiler with
+this release.  Known to bootstrap and check with good results on
+FreeBSD 7.2-STABLE.  In the past, known to bootstrap and check with
+good results on FreeBSD 3.0, 3.4, 4.0, 4.2, 4.3, 4.4, 4.5, 4.8, 4.9 and
+5-CURRENT.
+
+   The version of binutils installed in `/usr/bin' probably works with
+this release of GCC.  Bootstrapping against the latest GNU binutils
+and/or the version found in `/usr/ports/devel/binutils' has been known
+to enable additional features and improve overall testsuite results.
+However, it is currently known that boehm-gc (which itself is required
+for java) may not configure properly on FreeBSD prior to the FreeBSD
+7.0 release with GNU binutils after 2.16.1.
+
+h8300-hms
+=========
+
+Renesas H8/300 series of processors.
+
+   Please have a look at the binaries page.
+
+   The calling convention and structure layout has changed in release
+2.6.  All code must be recompiled.  The calling convention now passes
+the first three arguments in function calls in registers.  Structures
+are no longer a multiple of 2 bytes.
+
+hppa*-hp-hpux*
+==============
+
+Support for HP-UX version 9 and older was discontinued in GCC 3.4.
+
+   We require using gas/binutils on all hppa platforms.  Version 2.19 or
+later is recommended.
+
+   It may be helpful to configure GCC with the `--with-gnu-as' and
+`--with-as=...' options to ensure that GCC can find GAS.
+
+   The HP assembler should not be used with GCC.  It is rarely tested
+and may not work.  It shouldn't be used with any languages other than C
+due to its many limitations.
+
+   Specifically, `-g' does not work (HP-UX uses a peculiar debugging
+format which GCC does not know about).  It also inserts timestamps into
+each object file it creates, causing the 3-stage comparison test to
+fail during a bootstrap.  You should be able to continue by saying
+`make all-host all-target' after getting the failure from `make'.
+
+   Various GCC features are not supported.  For example, it does not
+support weak symbols or alias definitions.  As a result, explicit
+template instantiations are required when using C++.  This makes it
+difficult if not impossible to build many C++ applications.
+
+   There are two default scheduling models for instructions.  These are
+PROCESSOR_7100LC and PROCESSOR_8000.  They are selected from the pa-risc
+architecture specified for the target machine when configuring.
+PROCESSOR_8000 is the default.  PROCESSOR_7100LC is selected when the
+target is a `hppa1*' machine.
+
+   The PROCESSOR_8000 model is not well suited to older processors.
+Thus, it is important to completely specify the machine architecture
+when configuring if you want a model other than PROCESSOR_8000.  The
+macro TARGET_SCHED_DEFAULT can be defined in BOOT_CFLAGS if a different
+default scheduling model is desired.
+
+   As of GCC 4.0, GCC uses the UNIX 95 namespace for HP-UX 10.10
+through 11.00, and the UNIX 98 namespace for HP-UX 11.11 and later.
+This namespace change might cause problems when bootstrapping with an
+earlier version of GCC or the HP compiler as essentially the same
+namespace is required for an entire build.  This problem can be avoided
+in a number of ways.  With HP cc, `UNIX_STD' can be set to `95' or
+`98'.  Another way is to add an appropriate set of predefines to `CC'.
+The description for the `munix=' option contains a list of the
+predefines used with each standard.
+
+   More specific information to `hppa*-hp-hpux*' targets follows.
+
+hppa*-hp-hpux10
+===============
+
+For hpux10.20, we _highly_ recommend you pick up the latest sed patch
+`PHCO_19798' from HP.  HP has two sites which provide patches free of
+charge:
+
+   * `http://us.itrc.hp.com/service/home/home.do' US, Canada,
+     Asia-Pacific, and Latin-America.
+
+   * `http://europe.itrc.hp.com/service/home/home.do' Europe.
+
+   The C++ ABI has changed incompatibly in GCC 4.0.  COMDAT subspaces
+are used for one-only code and data.  This resolves many of the previous
+problems in using C++ on this target.  However, the ABI is not
+compatible with the one implemented under HP-UX 11 using secondary
+definitions.
+
+hppa*-hp-hpux11
+===============
+
+GCC 3.0 and up support HP-UX 11.  GCC 2.95.x is not supported and cannot
+be used to compile GCC 3.0 and up.
+
+   The libffi and libjava libraries haven't been ported to 64-bit HP-UX
+and don't build.
+
+   Refer to binaries for information about obtaining precompiled GCC
+binaries for HP-UX.  Precompiled binaries must be obtained to build the
+Ada language as it can't be bootstrapped using C.  Ada is only
+available for the 32-bit PA-RISC runtime.
+
+   Starting with GCC 3.4 an ISO C compiler is required to bootstrap.
+The bundled compiler supports only traditional C; you will need either
+HP's unbundled compiler, or a binary distribution of GCC.
+
+   It is possible to build GCC 3.3 starting with the bundled HP
+compiler, but the process requires several steps.  GCC 3.3 can then be
+used to build later versions.  The fastjar program contains ISO C code
+and can't be built with the HP bundled compiler.  This problem can be
+avoided by not building the Java language.  For example, use the
+`--enable-languages="c,c++,f77,objc"' option in your configure command.
+
+   There are several possible approaches to building the distribution.
+Binutils can be built first using the HP tools.  Then, the GCC
+distribution can be built.  The second approach is to build GCC first
+using the HP tools, then build binutils, then rebuild GCC.  There have
+been problems with various binary distributions, so it is best not to
+start from a binary distribution.
+
+   On 64-bit capable systems, there are two distinct targets.  Different
+installation prefixes must be used if both are to be installed on the
+same system.  The `hppa[1-2]*-hp-hpux11*' target generates code for the
+32-bit PA-RISC runtime architecture and uses the HP linker.  The
+`hppa64-hp-hpux11*' target generates 64-bit code for the PA-RISC 2.0
+architecture.
+
+   The script config.guess now selects the target type based on the
+compiler detected during configuration.  You must define `PATH' or `CC'
+so that configure finds an appropriate compiler for the initial
+bootstrap.  When `CC' is used, the definition should contain the
+options that are needed whenever `CC' is used.
+
+   Specifically, options that determine the runtime architecture must be
+in `CC' to correctly select the target for the build.  It is also
+convenient to place many other compiler options in `CC'.  For example,
+`CC="cc -Ac +DA2.0W -Wp,-H16376 -D_CLASSIC_TYPES -D_HPUX_SOURCE"' can
+be used to bootstrap the GCC 3.3 branch with the HP compiler in 64-bit
+K&R/bundled mode.  The `+DA2.0W' option will result in the automatic
+selection of the `hppa64-hp-hpux11*' target.  The macro definition
+table of cpp needs to be increased for a successful build with the HP
+compiler.  _CLASSIC_TYPES and _HPUX_SOURCE need to be defined when
+building with the bundled compiler, or when using the `-Ac' option.
+These defines aren't necessary with `-Ae'.
+
+   It is best to explicitly configure the `hppa64-hp-hpux11*' target
+with the `--with-ld=...' option.  This overrides the standard search
+for ld.  The two linkers supported on this target require different
+commands.  The default linker is determined during configuration.  As a
+result, it's not possible to switch linkers in the middle of a GCC
+build.  This has been reported to sometimes occur in unified builds of
+binutils and GCC.
+
+   A recent linker patch must be installed for the correct operation of
+GCC 3.3 and later.  `PHSS_26559' and `PHSS_24304' are the oldest linker
+patches that are known to work.  They are for HP-UX 11.00 and 11.11,
+respectively.  `PHSS_24303', the companion to `PHSS_24304', might be
+usable but it hasn't been tested.  These patches have been superseded.
+Consult the HP patch database to obtain the currently recommended
+linker patch for your system.
+
+   The patches are necessary for the support of weak symbols on the
+32-bit port, and for the running of initializers and finalizers.  Weak
+symbols are implemented using SOM secondary definition symbols.  Prior
+to HP-UX 11, there are bugs in the linker support for secondary symbols.
+The patches correct a problem of linker core dumps creating shared
+libraries containing secondary symbols, as well as various other
+linking issues involving secondary symbols.
+
+   GCC 3.3 uses the ELF DT_INIT_ARRAY and DT_FINI_ARRAY capabilities to
+run initializers and finalizers on the 64-bit port.  The 32-bit port
+uses the linker `+init' and `+fini' options for the same purpose.  The
+patches correct various problems with the +init/+fini options,
+including program core dumps.  Binutils 2.14 corrects a problem on the
+64-bit port resulting from HP's non-standard use of the .init and .fini
+sections for array initializers and finalizers.
+
+   Although the HP and GNU linkers are both supported for the
+`hppa64-hp-hpux11*' target, it is strongly recommended that the HP
+linker be used for link editing on this target.
+
+   At this time, the GNU linker does not support the creation of long
+branch stubs.  As a result, it can't successfully link binaries
+containing branch offsets larger than 8 megabytes.  In addition, there
+are problems linking shared libraries, linking executables with
+`-static', and with dwarf2 unwind and exception support.  It also
+doesn't provide stubs for internal calls to global functions in shared
+libraries, so these calls can't be overloaded.
+
+   The HP dynamic loader does not support GNU symbol versioning, so
+symbol versioning is not supported.  It may be necessary to disable
+symbol versioning with `--disable-symvers' when using GNU ld.
+
+   POSIX threads are the default.  The optional DCE thread library is
+not supported, so `--enable-threads=dce' does not work.
+
+*-*-linux-gnu
+=============
+
+Versions of libstdc++-v3 starting with 3.2.1 require bug fixes present
+in glibc 2.2.5 and later.  More information is available in the
+libstdc++-v3 documentation.
+
+i?86-*-linux*
+=============
+
+As of GCC 3.3, binutils 2.13.1 or later is required for this platform.
+See bug 10877 for more information.
+
+   If you receive Signal 11 errors when building on GNU/Linux, then it
+is possible you have a hardware problem.  Further information on this
+can be found on www.bitwizard.nl.
+
+i?86-*-solaris2.[89]
+====================
+
+The Sun assembler in Solaris 8 and 9 has several bugs and limitations.
+While GCC works around them, several features are missing, so it is
+recommended to use the GNU assembler instead.  There is no bundled
+version, but the current version, from GNU binutils 2.20.1, is known to
+work.
+
+   Solaris~2/x86 doesn't support the execution of SSE/SSE2 instructions
+before Solaris~9 4/04, even if the CPU supports them.  Programs will
+receive `SIGILL' if they try.  The fix is available both in Solaris~9
+Update~6 and kernel patch 112234-12 or newer.  There is no
+corresponding patch for Solaris 8.  To avoid this problem, `-march'
+defaults to `pentiumpro' on Solaris 8 and 9.  If you have the patch
+installed, you can configure GCC with an appropriate `--with-arch'
+option, but need GNU `as' for SSE2 support.
+
+i?86-*-solaris2.10
+==================
+
+Use this for Solaris 10 or later on x86 and x86-64 systems.  This
+configuration is supported by GCC 4.0 and later versions only.  Unlike
+`sparcv9-sun-solaris2*', there is no corresponding 64-bit configuration
+like `amd64-*-solaris2*' or `x86_64-*-solaris2*'.
+
+   It is recommended that you configure GCC to use the GNU assembler, in
+`/usr/sfw/bin/gas'.  The versions included in Solaris 10, from GNU
+binutils 2.15, and Solaris 11, from GNU binutils 2.19, work fine,
+although the current version, from GNU binutils 2.20.1, is known to
+work, too.  Recent versions of the Sun assembler in `/usr/ccs/bin/as'
+work almost as well, though.
+
+   For linking, the Sun linker, is preferred.  If you want to use the
+GNU linker instead, which is available in `/usr/sfw/bin/gld', note that
+due to a packaging bug the version in Solaris 10, from GNU binutils
+2.15, cannot be used, while the version in Solaris 11, from GNU binutils
+2.19, works, as does the latest version, from GNU binutils 2.20.1.
+
+   To use GNU `as', configure with the options `--with-gnu-as
+--with-as=/usr/sfw/bin/gas'.  It may be necessary to configure with
+`--without-gnu-ld --with-ld=/usr/ccs/bin/ld' to guarantee use of Sun
+`ld'.
+
+ia64-*-linux
+============
+
+IA-64 processor (also known as IPF, or Itanium Processor Family)
+running GNU/Linux.
+
+   If you are using the installed system libunwind library with
+`--with-system-libunwind', then you must use libunwind 0.98 or later.
+
+   None of the following versions of GCC has an ABI that is compatible
+with any of the other versions in this list, with the exception that
+Red Hat 2.96 and Trillian 000171 are compatible with each other: 3.1,
+3.0.2, 3.0.1, 3.0, Red Hat 2.96, and Trillian 000717.  This primarily
+affects C++ programs and programs that create shared libraries.  GCC
+3.1 or later is recommended for compiling linux, the kernel.  As of
+version 3.1 GCC is believed to be fully ABI compliant, and hence no
+more major ABI changes are expected.
+
+ia64-*-hpux*
+============
+
+Building GCC on this target requires the GNU Assembler.  The bundled HP
+assembler will not work.  To prevent GCC from using the wrong assembler,
+the option `--with-gnu-as' may be necessary.
+
+   The GCC libunwind library has not been ported to HPUX.  This means
+that for GCC versions 3.2.3 and earlier, `--enable-libunwind-exceptions'
+is required to build GCC.  For GCC 3.3 and later, this is the default.
+For gcc 3.4.3 and later, `--enable-libunwind-exceptions' is removed and
+the system libunwind library will always be used.
+
+*-ibm-aix*
+==========
+
+Support for AIX version 3 and older was discontinued in GCC 3.4.
+Support for AIX version 4.2 and older was discontinued in GCC 4.5.
+
+   "out of memory" bootstrap failures may indicate a problem with
+process resource limits (ulimit).  Hard limits are configured in the
+`/etc/security/limits' system configuration file.
+
+   GCC can bootstrap with recent versions of IBM XLC, but bootstrapping
+with an earlier release of GCC is recommended.  Bootstrapping with XLC
+requires a larger data segment, which can be enabled through the
+LDR_CNTRL environment variable, e.g.,
+
+        % LDR_CNTRL=MAXDATA=0x50000000
+        % export LDR_CNTRL
+
+   One can start with a pre-compiled version of GCC to build from
+sources.  One may delete GCC's "fixed" header files when starting with
+a version of GCC built for an earlier release of AIX.
+
+   To speed up the configuration phases of bootstrapping and installing
+GCC, one may use GNU Bash instead of AIX `/bin/sh', e.g.,
+
+        % CONFIG_SHELL=/opt/freeware/bin/bash
+        % export CONFIG_SHELL
+
+   and then proceed as described in the build instructions, where we
+strongly recommend specifying an absolute path to invoke
+SRCDIR/configure.
+
+   Because GCC on AIX is built as a 32-bit executable by default,
+(although it can generate 64-bit programs) the GMP and MPFR libraries
+required by gfortran must be 32-bit libraries.  Building GMP and MPFR
+as static archive libraries works better than shared libraries.
+
+   Errors involving `alloca' when building GCC generally are due to an
+incorrect definition of `CC' in the Makefile or mixing files compiled
+with the native C compiler and GCC.  During the stage1 phase of the
+build, the native AIX compiler *must* be invoked as `cc' (not `xlc').
+Once `configure' has been informed of `xlc', one needs to use `make
+distclean' to remove the configure cache files and ensure that `CC'
+environment variable does not provide a definition that will confuse
+`configure'.  If this error occurs during stage2 or later, then the
+problem most likely is the version of Make (see above).
+
+   The native `as' and `ld' are recommended for bootstrapping on AIX.
+The GNU Assembler, GNU Linker, and GNU Binutils version 2.20 is
+required to bootstrap on AIX 5.  The native AIX tools do interoperate
+with GCC.
+
+   Building `libstdc++.a' requires a fix for an AIX Assembler bug APAR
+IY26685 (AIX 4.3) or APAR IY25528 (AIX 5.1).  It also requires a fix
+for another AIX Assembler bug and a co-dependent AIX Archiver fix
+referenced as APAR IY53606 (AIX 5.2) or as APAR IY54774 (AIX 5.1)
+
+   `libstdc++' in GCC 3.4 increments the major version number of the
+shared object and GCC installation places the `libstdc++.a' shared
+library in a common location which will overwrite the and GCC 3.3
+version of the shared library.  Applications either need to be
+re-linked against the new shared library or the GCC 3.1 and GCC 3.3
+versions of the `libstdc++' shared object needs to be available to the
+AIX runtime loader.  The GCC 3.1 `libstdc++.so.4', if present, and GCC
+3.3 `libstdc++.so.5' shared objects can be installed for runtime
+dynamic loading using the following steps to set the `F_LOADONLY' flag
+in the shared object for _each_ multilib `libstdc++.a' installed:
+
+   Extract the shared objects from the currently installed
+`libstdc++.a' archive:
+        % ar -x libstdc++.a libstdc++.so.4 libstdc++.so.5
+
+   Enable the `F_LOADONLY' flag so that the shared object will be
+available for runtime dynamic loading, but not linking:
+        % strip -e libstdc++.so.4 libstdc++.so.5
+
+   Archive the runtime-only shared object in the GCC 3.4 `libstdc++.a'
+archive:
+        % ar -q libstdc++.a libstdc++.so.4 libstdc++.so.5
+
+   Linking executables and shared libraries may produce warnings of
+duplicate symbols.  The assembly files generated by GCC for AIX always
+have included multiple symbol definitions for certain global variable
+and function declarations in the original program.  The warnings should
+not prevent the linker from producing a correct library or runnable
+executable.
+
+   AIX 4.3 utilizes a "large format" archive to support both 32-bit and
+64-bit object modules.  The routines provided in AIX 4.3.0 and AIX 4.3.1
+to parse archive libraries did not handle the new format correctly.
+These routines are used by GCC and result in error messages during
+linking such as "not a COFF file".  The version of the routines shipped
+with AIX 4.3.1 should work for a 32-bit environment.  The `-g' option
+of the archive command may be used to create archives of 32-bit objects
+using the original "small format".  A correct version of the routines
+is shipped with AIX 4.3.2 and above.
+
+   Some versions of the AIX binder (linker) can fail with a relocation
+overflow severe error when the `-bbigtoc' option is used to link
+GCC-produced object files into an executable that overflows the TOC.  A
+fix for APAR IX75823 (OVERFLOW DURING LINK WHEN USING GCC AND -BBIGTOC)
+is available from IBM Customer Support and from its
+techsupport.services.ibm.com website as PTF U455193.
+
+   The AIX 4.3.2.1 linker (bos.rte.bind_cmds Level 4.3.2.1) will dump
+core with a segmentation fault when invoked by any version of GCC.  A
+fix for APAR IX87327 is available from IBM Customer Support and from its
+techsupport.services.ibm.com website as PTF U461879.  This fix is
+incorporated in AIX 4.3.3 and above.
+
+   The initial assembler shipped with AIX 4.3.0 generates incorrect
+object files.  A fix for APAR IX74254 (64BIT DISASSEMBLED OUTPUT FROM
+COMPILER FAILS TO ASSEMBLE/BIND) is available from IBM Customer Support
+and from its techsupport.services.ibm.com website as PTF U453956.  This
+fix is incorporated in AIX 4.3.1 and above.
+
+   AIX provides National Language Support (NLS).  Compilers and
+assemblers use NLS to support locale-specific representations of
+various data formats including floating-point numbers (e.g., `.'  vs
+`,' for separating decimal fractions).  There have been problems
+reported where GCC does not produce the same floating-point formats
+that the assembler expects.  If one encounters this problem, set the
+`LANG' environment variable to `C' or `En_US'.
+
+   A default can be specified with the `-mcpu=CPU_TYPE' switch and
+using the configure option `--with-cpu-CPU_TYPE'.
+
+iq2000-*-elf
+============
+
+Vitesse IQ2000 processors.  These are used in embedded applications.
+There are no standard Unix configurations.
+
+lm32-*-elf
+==========
+
+Lattice Mico32 processor.  This configuration is intended for embedded
+systems.
+
+lm32-*-uclinux
+==============
+
+Lattice Mico32 processor.  This configuration is intended for embedded
+systems running uClinux.
+
+m32c-*-elf
+==========
+
+Renesas M32C processor.  This configuration is intended for embedded
+systems.
+
+m32r-*-elf
+==========
+
+Renesas M32R processor.  This configuration is intended for embedded
+systems.
+
+m6811-elf
+=========
+
+Motorola 68HC11 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+m6812-elf
+=========
+
+Motorola 68HC12 family micro controllers.  These are used in embedded
+applications.  There are no standard Unix configurations.
+
+m68k-*-*
+========
+
+By default, `m68k-*-elf*', `m68k-*-rtems',  `m68k-*-uclinux' and
+`m68k-*-linux' build libraries for both M680x0 and ColdFire processors.
+If you only need the M680x0 libraries, you can omit the ColdFire ones
+by passing `--with-arch=m68k' to `configure'.  Alternatively, you can
+omit the M680x0 libraries by passing `--with-arch=cf' to `configure'.
+These targets default to 5206 or 5475 code as appropriate for the
+target system when configured with `--with-arch=cf' and 68020 code
+otherwise.
+
+   The `m68k-*-netbsd' and `m68k-*-openbsd' targets also support the
+`--with-arch' option.  They will generate ColdFire CFV4e code when
+configured with `--with-arch=cf' and 68020 code otherwise.
+
+   You can override the default processors listed above by configuring
+with `--with-cpu=TARGET'.  This TARGET can either be a `-mcpu' argument
+or one of the following values: `m68000', `m68010', `m68020', `m68030',
+`m68040', `m68060', `m68020-40' and `m68020-60'.
+
+m68k-*-uclinux
+==============
+
+GCC 4.3 changed the uClinux configuration so that it uses the
+`m68k-linux-gnu' ABI rather than the `m68k-elf' ABI.  It also added
+improved support for C++ and flat shared libraries, both of which were
+ABI changes.  However, you can still use the original ABI by
+configuring for `m68k-uclinuxoldabi' or `m68k-VENDOR-uclinuxoldabi'.
+
+mep-*-elf
+=========
+
+Toshiba Media embedded Processor.  This configuration is intended for
+embedded systems.
+
+mips-*-*
+========
+
+If on a MIPS system you get an error message saying "does not have gp
+sections for all it's [sic] sectons [sic]", don't worry about it.  This
+happens whenever you use GAS with the MIPS linker, but there is not
+really anything wrong, and it is okay to use the output file.  You can
+stop such warnings by installing the GNU linker.
+
+   It would be nice to extend GAS to produce the gp tables, but they are
+optional, and there should not be a warning about their absence.
+
+   The libstdc++ atomic locking routines for MIPS targets requires MIPS
+II and later.  A patch went in just after the GCC 3.3 release to make
+`mips*-*-*' use the generic implementation instead.  You can also
+configure for `mipsel-elf' as a workaround.  The `mips*-*-linux*'
+target continues to use the MIPS II routines.  More work on this is
+expected in future releases.
+
+   The built-in `__sync_*' functions are available on MIPS II and later
+systems and others that support the `ll', `sc' and `sync' instructions.
+This can be overridden by passing `--with-llsc' or `--without-llsc'
+when configuring GCC.  Since the Linux kernel emulates these
+instructions if they are missing, the default for `mips*-*-linux*'
+targets is `--with-llsc'.  The `--with-llsc' and `--without-llsc'
+configure options may be overridden at compile time by passing the
+`-mllsc' or `-mno-llsc' options to the compiler.
+
+   MIPS systems check for division by zero (unless
+`-mno-check-zero-division' is passed to the compiler) by generating
+either a conditional trap or a break instruction.  Using trap results
+in smaller code, but is only supported on MIPS II and later.  Also,
+some versions of the Linux kernel have a bug that prevents trap from
+generating the proper signal (`SIGFPE').  To enable the use of break,
+use the `--with-divide=breaks' `configure' option when configuring GCC.
+The default is to use traps on systems that support them.
+
+   Cross-compilers for the MIPS as target using the MIPS assembler
+currently do not work, because the auxiliary programs `mips-tdump.c'
+and `mips-tfile.c' can't be compiled on anything but a MIPS.  It does
+work to cross compile for a MIPS if you use the GNU assembler and
+linker.
+
+   The assembler from GNU binutils 2.17 and earlier has a bug in the way
+it sorts relocations for REL targets (o32, o64, EABI).  This can cause
+bad code to be generated for simple C++ programs.  Also the linker from
+GNU binutils versions prior to 2.17 has a bug which causes the runtime
+linker stubs in very large programs, like `libgcj.so', to be
+incorrectly generated.  GNU Binutils 2.18 and later (and snapshots made
+after Nov. 9, 2006) should be free from both of these problems.
+
+mips-sgi-irix5
+==============
+
+Support for IRIX 5 has been obsoleted in GCC 4.5, but can still be
+enabled by configuring with `--enable-obsolete'.  Support will be
+removed in GCC 4.6.
+
+   In order to compile GCC on an SGI running IRIX 5, the
+`compiler_dev.hdr' subsystem must be installed from the IDO CD-ROM
+supplied by SGI.  It is also available for download from
+`http://freeware.sgi.com/ido.html'.
+
+   If you use the MIPS C compiler to bootstrap, it may be necessary to
+increase its table size for switch statements with the `-Wf,-XNg1500'
+option.  If you use the `-O2' optimization option, you also need to use
+`-Olimit 3000'.
+
+   GCC must be configured to use GNU `as'.  The latest version, from GNU
+binutils 2.20.1, is known to work.
+
+   To enable debugging under IRIX 5, you must use GNU binutils 2.15 or
+later, and use the `--with-gnu-ld' `configure' option when configuring
+GCC.  You need to use GNU `ar' and `nm', also distributed with GNU
+binutils.
+
+   Configuring GCC with `/bin/sh' is _extremely_ slow and may even
+hang.  This problem can be avoided by running `configure' like this:
+
+        % CONFIG_SHELL=/usr/local/bin/bash
+        % export CONFIG_SHELL
+        % $CONFIG_SHELL SRCDIR/configure [OPTIONS]
+
+`/bin/ksh' doesn't work properly either.
+
+mips-sgi-irix6
+==============
+
+Support for IRIX 6 releases before 6.5 has been obsoleted in GCC 4.5,
+but can still be enabled by configuring with `--enable-obsolete'.
+Support will be removed in GCC 4.6, which will also disable support for
+the O32 ABI.  It is _strongly_ recommended to upgrade to at least IRIX
+6.5.18.  This release introduced full ISO C99 support, though for the
+N32 and N64 ABIs only.
+
+   To build and use GCC on IRIX 6, you need the IRIX Development
+Foundation (IDF) and IRIX Development Libraries (IDL).  They are
+included with the IRIX 6.5 media and can be downloaded from
+`http://freeware.sgi.com/idf_idl.html' for older IRIX 6 releases.
+
+   If you are using SGI's MIPSpro `cc' as your bootstrap compiler, you
+must ensure that the N32 ABI is in use.  To test this, compile a simple
+C file with `cc' and then run `file' on the resulting object file.  The
+output should look like:
+
+     test.o: ELF N32 MSB ...
+
+If you see:
+
+     test.o: ELF 32-bit MSB ...
+
+or
+
+     test.o: ELF 64-bit MSB ...
+
+then your version of `cc' uses the O32 or N64 ABI by default.  You
+should set the environment variable `CC' to `cc -n32' before
+configuring GCC.
+
+   If you want the resulting `gcc' to run on old 32-bit systems with
+the MIPS R4400 CPU, you need to ensure that only code for the `mips3'
+instruction set architecture (ISA) is generated.  While GCC 3.x does
+this correctly, both GCC 2.95 and SGI's MIPSpro `cc' may change the ISA
+depending on the machine where GCC is built.  Using one of them as the
+bootstrap compiler may result in `mips4' code, which won't run at all
+on `mips3'-only systems.  For the test program above, you should see:
+
+     test.o: ELF N32 MSB mips-3 ...
+
+If you get:
+
+     test.o: ELF N32 MSB mips-4 ...
+
+instead, you should set the environment variable `CC' to `cc -n32
+-mips3' or `gcc -mips3' respectively before configuring GCC.
+
+   MIPSpro C 7.4 may cause bootstrap failures, due to a bug when
+inlining `memcmp'.  Either add `-U__INLINE_INTRINSICS' to the `CC'
+environment variable as a workaround or upgrade to MIPSpro C 7.4.1m.
+
+   GCC on IRIX 6 is usually built to support the N32, O32 and N64 ABIs.
+If you build GCC on a system that doesn't have the N64 libraries
+installed or cannot run 64-bit binaries, you need to configure with
+`--disable-multilib' so GCC doesn't try to use them.  This will disable
+building the O32 libraries, too.  Look for `/usr/lib64/libc.so.1' to
+see if you have the 64-bit libraries installed.
+
+   GCC must be configured with GNU `as'.  The latest version, from GNU
+binutils 2.20.1, is known to work.  On the other hand, bootstrap fails
+with GNU `ld' at least since GNU binutils 2.17.
+
+   The `--enable-libgcj' option is disabled by default: IRIX 6 uses a
+very low default limit (20480) for the command line length.  Although
+`libtool' contains a workaround for this problem, at least the N64
+`libgcj' is known not to build despite this, running into an internal
+error of the native `ld'.  A sure fix is to increase this limit
+(`ncargs') to its maximum of 262144 bytes.  If you have root access,
+you can use the `systune' command to do this.
+
+   `wchar_t' support in `libstdc++' is not available for old IRIX 6.5.x
+releases, x < 19.  The problem cannot be autodetected and in order to
+build GCC for such targets you need to configure with
+`--disable-wchar_t'.
+
+moxie-*-elf
+===========
+
+The moxie processor.  See `http://moxielogic.org/' for more information
+about this processor.
+
+powerpc-*-*
+===========
+
+You can specify a default version for the `-mcpu=CPU_TYPE' switch by
+using the configure option `--with-cpu-CPU_TYPE'.
+
+   You will need binutils 2.15 or newer for a working GCC.
+
+powerpc-*-darwin*
+=================
+
+PowerPC running Darwin (Mac OS X kernel).
+
+   Pre-installed versions of Mac OS X may not include any developer
+tools, meaning that you will not be able to build GCC from source.  Tool
+binaries are available at
+`http://developer.apple.com/darwin/projects/compiler/' (free
+registration required).
+
+   This version of GCC requires at least cctools-590.36.  The
+cctools-590.36 package referenced from
+`http://gcc.gnu.org/ml/gcc/2006-03/msg00507.html' will not work on
+systems older than 10.3.9 (aka darwin7.9.0).
+
+powerpc-*-elf
+=============
+
+PowerPC system in big endian mode, running System V.4.
+
+powerpc*-*-linux-gnu*
+=====================
+
+PowerPC system in big endian mode running Linux.
+
+powerpc-*-netbsd*
+=================
+
+PowerPC system in big endian mode running NetBSD.
+
+powerpc-*-eabisim
+=================
+
+Embedded PowerPC system in big endian mode for use in running under the
+PSIM simulator.
+
+powerpc-*-eabi
+==============
+
+Embedded PowerPC system in big endian mode.
+
+powerpcle-*-elf
+===============
+
+PowerPC system in little endian mode, running System V.4.
+
+powerpcle-*-eabisim
+===================
+
+Embedded PowerPC system in little endian mode for use in running under
+the PSIM simulator.
+
+powerpcle-*-eabi
+================
+
+Embedded PowerPC system in little endian mode.
+
+rx-*-elf
+========
+
+The Renesas RX processor.  See
+`http://eu.renesas.com/fmwk.jsp?cnt=rx600_series_landing.jsp&fp=/products/mpumcu/rx_family/rx600_series'
+for more information about this processor.
+
+s390-*-linux*
+=============
+
+S/390 system running GNU/Linux for S/390.
+
+s390x-*-linux*
+==============
+
+zSeries system (64-bit) running GNU/Linux for zSeries.
+
+s390x-ibm-tpf*
+==============
+
+zSeries system (64-bit) running TPF.  This platform is supported as
+cross-compilation target only.
+
+*-*-solaris2*
+=============
+
+Support for Solaris 7 has been obsoleted in GCC 4.5, but can still be
+enabled by configuring with `--enable-obsolete'.  Support will be
+removed in GCC 4.6.
+
+   Sun does not ship a C compiler with Solaris 2, though you can
+download the Sun Studio compilers for free from
+`http://developers.sun.com/sunstudio/downloads/'.  Alternatively, you
+can install a pre-built GCC to bootstrap and install GCC.  See the
+binaries page for details.
+
+   The Solaris 2 `/bin/sh' will often fail to configure `libstdc++-v3',
+`boehm-gc' or `libjava'.  We therefore recommend using the following
+initial sequence of commands
+
+        % CONFIG_SHELL=/bin/ksh
+        % export CONFIG_SHELL
+
+and proceed as described in the configure instructions.  In addition we
+strongly recommend specifying an absolute path to invoke
+`SRCDIR/configure'.
+
+   Solaris 2 comes with a number of optional OS packages.  Some of these
+are needed to use GCC fully, namely `SUNWarc', `SUNWbtool', `SUNWesu',
+`SUNWhea', `SUNWlibm', `SUNWsprot', and `SUNWtoo'.  If you did not
+install all optional packages when installing Solaris 2, you will need
+to verify that the packages that GCC needs are installed.
+
+   To check whether an optional package is installed, use the `pkginfo'
+command.  To add an optional package, use the `pkgadd' command.  For
+further details, see the Solaris 2 documentation.
+
+   Trying to use the linker and other tools in `/usr/ucb' to install
+GCC has been observed to cause trouble.  For example, the linker may
+hang indefinitely.  The fix is to remove `/usr/ucb' from your `PATH'.
+
+   The build process works more smoothly with the legacy Sun tools so,
+if you have `/usr/xpg4/bin' in your `PATH', we recommend that you place
+`/usr/bin' before `/usr/xpg4/bin' for the duration of the build.
+
+   We recommend the use of the Sun assembler or the GNU assembler, in
+conjunction with the Sun linker.  The GNU `as' versions included in
+Solaris 10, from GNU binutils 2.15, and Solaris 11, from GNU binutils
+2.19, are known to work.  They can be found in `/usr/sfw/bin/gas'.
+Current versions of GNU binutils (2.20.1) are known to work as well.
+Note that your mileage may vary if you use a combination of the GNU
+tools and the Sun tools: while the combination GNU `as' + Sun `ld'
+should reasonably work, the reverse combination Sun `as' + GNU `ld' is
+known to cause memory corruption at runtime in some cases for C++
+programs.  GNU `ld' usually works as well, although the version
+included in Solaris 10 cannot be used due to several bugs.  Again, the
+current version (2.20.1) is known to work, but generally lacks platform
+specific features, so better stay with Sun `ld'.
+
+   Sun bug 4296832 turns up when compiling X11 headers with GCC 2.95 or
+newer: `g++' will complain that types are missing.  These headers
+assume that omitting the type means `int'; this assumption worked for
+C90 but is wrong for C++, and is now wrong for C99 also.
+
+   `g++' accepts such (invalid) constructs with the option
+`-fpermissive'; it will assume that any missing type is `int' (as
+defined by C90).
+
+   There are patches for Solaris 7 (108376-21 or newer for SPARC,
+108377-20 for Intel), and Solaris 8 (108652-24 or newer for SPARC,
+108653-22 for Intel) that fix this bug.
+
+   Sun bug 4927647 sometimes causes random spurious testsuite failures
+related to missing diagnostic output.  This bug doesn't affect GCC
+itself, rather it is a kernel bug triggered by the `expect' program
+which is used only by the GCC testsuite driver.  When the bug causes
+the `expect' program to miss anticipated output, extra testsuite
+failures appear.
+
+   There are patches for Solaris 8 (117350-12 or newer for SPARC,
+117351-12 or newer for Intel) and Solaris 9 (117171-11 or newer for
+SPARC, 117172-11 or newer for Intel) that address this problem.
+
+sparc-sun-solaris2*
+===================
+
+When GCC is configured to use GNU binutils 2.14 or later, the binaries
+produced are smaller than the ones produced using Sun's native tools;
+this difference is quite significant for binaries containing debugging
+information.
+
+   Starting with Solaris 7, the operating system is capable of executing
+64-bit SPARC V9 binaries.  GCC 3.1 and later properly supports this;
+the `-m64' option enables 64-bit code generation.  However, if all you
+want is code tuned for the UltraSPARC CPU, you should try the
+`-mtune=ultrasparc' option instead, which produces code that, unlike
+full 64-bit code, can still run on non-UltraSPARC machines.
+
+   When configuring on a Solaris 7 or later system that is running a
+kernel that supports only 32-bit binaries, one must configure with
+`--disable-multilib', since we will not be able to build the 64-bit
+target libraries.
+
+   GCC 3.3 and GCC 3.4 trigger code generation bugs in earlier versions
+of the GNU compiler (especially GCC 3.0.x versions), which lead to the
+miscompilation of the stage1 compiler and the subsequent failure of the
+bootstrap process.  A workaround is to use GCC 3.2.3 as an intermediary
+stage, i.e. to bootstrap that compiler with the base compiler and then
+use it to bootstrap the final compiler.
+
+   GCC 3.4 triggers a code generation bug in versions 5.4 (Sun ONE
+Studio 7) and 5.5 (Sun ONE Studio 8) of the Sun compiler, which causes
+a bootstrap failure in form of a miscompilation of the stage1 compiler
+by the Sun compiler.  This is Sun bug 4974440.  This is fixed with
+patch 112760-07.
+
+   GCC 3.4 changed the default debugging format from Stabs to DWARF-2
+for 32-bit code on Solaris 7 and later.  If you use the Sun assembler,
+this change apparently runs afoul of Sun bug 4910101 (which is
+referenced as an x86-only problem by Sun, probably because they do not
+use DWARF-2).  A symptom of the problem is that you cannot compile C++
+programs like `groff' 1.19.1 without getting messages similar to the
+following:
+
+     ld: warning: relocation error: R_SPARC_UA32: ...
+       external symbolic relocation against non-allocatable section
+       .debug_info cannot be processed at runtime: relocation ignored.
+
+To work around this problem, compile with `-gstabs+' instead of plain
+`-g'.
+
+   When configuring the GNU Multiple Precision Library (GMP) or the MPFR
+library on a Solaris 7 or later system, the canonical target triplet
+must be specified as the `build' parameter on the configure line.  This
+triplet can be obtained by invoking `./config.guess' in the toplevel
+source directory of GCC (and not that of GMP or MPFR).  For example on
+a Solaris 7 system:
+
+        % ./configure --build=sparc-sun-solaris2.7 --prefix=xxx
+
+sparc-sun-solaris2.7
+====================
+
+_Note_ that this configuration has been obsoleted in GCC 4.5, and will
+be removed in GCC 4.6.
+
+   Sun patch 107058-01 (1999-01-13) for Solaris 7/SPARC triggers a bug
+in the dynamic linker.  This problem (Sun bug 4210064) affects GCC 2.8
+and later, including all EGCS releases.  Sun formerly recommended
+107058-01 for all Solaris 7 users, but around 1999-09-01 it started to
+recommend it only for people who use Sun's compilers.
+
+   Here are some workarounds to this problem:
+   * Do not install Sun patch 107058-01 until after Sun releases a
+     complete patch for bug 4210064.  This is the simplest course to
+     take, unless you must also use Sun's C compiler.  Unfortunately
+     107058-01 is preinstalled on some new Solaris 7-based hosts, so
+     you may have to back it out.
+
+   * Copy the original, unpatched Solaris 7 `/usr/ccs/bin/as' into
+     `/usr/local/libexec/gcc/sparc-sun-solaris2.7/3.4/as', adjusting
+     the latter name to fit your local conventions and software version
+     numbers.
+
+   * Install Sun patch 106950-03 (1999-05-25) or later.  Nobody with
+     both 107058-01 and 106950-03 installed has reported the bug with
+     GCC and Sun's dynamic linker.  This last course of action is
+     riskiest, for two reasons.  First, you must install 106950 on all
+     hosts that run code generated by GCC; it doesn't suffice to
+     install it only on the hosts that run GCC itself.  Second, Sun
+     says that 106950-03 is only a partial fix for bug 4210064, but Sun
+     doesn't know whether the partial fix is adequate for GCC.
+     Revision -08 or later should fix the bug.  The current (as of
+     2004-05-23) revision is -24, and is included in the Solaris 7
+     Recommended Patch Cluster.
+
+   GCC 3.3 triggers a bug in version 5.0 Alpha 03/27/98 of the Sun
+assembler, which causes a bootstrap failure when linking the 64-bit
+shared version of `libgcc'.  A typical error message is:
+
+     ld: fatal: relocation error: R_SPARC_32: file libgcc/sparcv9/_muldi3.o:
+       symbol <unknown>:  offset 0xffffffff7ec133e7 is non-aligned.
+
+This bug has been fixed in the final 5.0 version of the assembler.
+
+   A similar problem was reported for version Sun WorkShop 6 99/08/18
+of the Sun assembler, which causes a bootstrap failure with GCC 4.0.0:
+
+     ld: fatal: relocation error: R_SPARC_DISP32:
+       file .libs/libstdc++.lax/libsupc++convenience.a/vterminate.o:
+         symbol <unknown>: offset 0xfccd33ad is non-aligned
+
+This bug has been fixed in more recent revisions of the assembler.
+
+sparc-sun-solaris2.10
+=====================
+
+There is a bug in older versions of the Sun assembler which breaks
+thread-local storage (TLS).  A typical error message is
+
+     ld: fatal: relocation error: R_SPARC_TLS_LE_HIX22: file /var/tmp//ccamPA1v.o:
+       symbol <unknown>: bad symbol type SECT: symbol type must be TLS
+
+This bug is fixed in Sun patch 118683-03 or later.
+
+sparc-*-linux*
+==============
+
+GCC versions 3.0 and higher require binutils 2.11.2 and glibc 2.2.4 or
+newer on this platform.  All earlier binutils and glibc releases
+mishandled unaligned relocations on `sparc-*-*' targets.
+
+sparc64-*-solaris2*
+===================
+
+When configuring the GNU Multiple Precision Library (GMP) or the MPFR
+library, the canonical target triplet must be specified as the `build'
+parameter on the configure line.  For example on a Solaris 7 system:
+
+        % ./configure --build=sparc64-sun-solaris2.7 --prefix=xxx
+
+   The following compiler flags must be specified in the configure step
+in order to bootstrap this target with the Sun compiler:
+
+        % CC="cc -xarch=v9 -xildoff" SRCDIR/configure [OPTIONS] [TARGET]
+
+`-xarch=v9' specifies the SPARC-V9 architecture to the Sun toolchain
+and `-xildoff' turns off the incremental linker.
+
+sparcv9-*-solaris2*
+===================
+
+This is a synonym for `sparc64-*-solaris2*'.
+
+*-*-vxworks*
+============
+
+Support for VxWorks is in flux.  At present GCC supports _only_ the
+very recent VxWorks 5.5 (aka Tornado 2.2) release, and only on PowerPC.
+We welcome patches for other architectures supported by VxWorks 5.5.
+Support for VxWorks AE would also be welcome; we believe this is merely
+a matter of writing an appropriate "configlette" (see below).  We are
+not interested in supporting older, a.out or COFF-based, versions of
+VxWorks in GCC 3.
+
+   VxWorks comes with an older version of GCC installed in
+`$WIND_BASE/host'; we recommend you do not overwrite it.  Choose an
+installation PREFIX entirely outside $WIND_BASE.  Before running
+`configure', create the directories `PREFIX' and `PREFIX/bin'.  Link or
+copy the appropriate assembler, linker, etc. into `PREFIX/bin', and set
+your PATH to include that directory while running both `configure' and
+`make'.
+
+   You must give `configure' the `--with-headers=$WIND_BASE/target/h'
+switch so that it can find the VxWorks system headers.  Since VxWorks
+is a cross compilation target only, you must also specify
+`--target=TARGET'.  `configure' will attempt to create the directory
+`PREFIX/TARGET/sys-include' and copy files into it; make sure the user
+running `configure' has sufficient privilege to do so.
+
+   GCC's exception handling runtime requires a special "configlette"
+module, `contrib/gthr_supp_vxw_5x.c'.  Follow the instructions in that
+file to add the module to your kernel build.  (Future versions of
+VxWorks will incorporate this module.)
+
+x86_64-*-*, amd64-*-*
+=====================
+
+GCC supports the x86-64 architecture implemented by the AMD64 processor
+(amd64-*-* is an alias for x86_64-*-*) on GNU/Linux, FreeBSD and NetBSD.
+On GNU/Linux the default is a bi-arch compiler which is able to generate
+both 64-bit x86-64 and 32-bit x86 code (via the `-m32' switch).
+
+xtensa*-*-elf
+=============
+
+This target is intended for embedded Xtensa systems using the `newlib'
+C library.  It uses ELF but does not support shared objects.
+Designed-defined instructions specified via the Tensilica Instruction
+Extension (TIE) language are only supported through inline assembly.
+
+   The Xtensa configuration information must be specified prior to
+building GCC.  The `include/xtensa-config.h' header file contains the
+configuration information.  If you created your own Xtensa
+configuration with the Xtensa Processor Generator, the downloaded files
+include a customized copy of this header file, which you can use to
+replace the default header file.
+
+xtensa*-*-linux*
+================
+
+This target is for Xtensa systems running GNU/Linux.  It supports ELF
+shared objects and the GNU C library (glibc).  It also generates
+position-independent code (PIC) regardless of whether the `-fpic' or
+`-fPIC' options are used.  In other respects, this target is the same
+as the `xtensa*-*-elf' target.
+
+Microsoft Windows
+=================
+
+Intel 16-bit versions
+---------------------
+
+The 16-bit versions of Microsoft Windows, such as Windows 3.1, are not
+supported.
+
+   However, the 32-bit port has limited support for Microsoft Windows
+3.11 in the Win32s environment, as a target only.  See below.
+
+Intel 32-bit versions
+---------------------
+
+The 32-bit versions of Windows, including Windows 95, Windows NT,
+Windows XP, and Windows Vista, are supported by several different target
+platforms.  These targets differ in which Windows subsystem they target
+and which C libraries are used.
+
+   * Cygwin *-*-cygwin: Cygwin provides a user-space Linux API
+     emulation layer in the Win32 subsystem.
+
+   * Interix *-*-interix: The Interix subsystem provides native support
+     for POSIX.
+
+   * MinGW *-*-mingw32: MinGW is a native GCC port for the Win32
+     subsystem that provides a subset of POSIX.
+
+   * MKS i386-pc-mks: NuTCracker from MKS.  See
+     `http://www.mkssoftware.com/' for more information.
+
+Intel 64-bit versions
+---------------------
+
+GCC contains support for x86-64 using the mingw-w64 runtime library,
+available from `http://mingw-w64.sourceforge.net/'.  This library
+should be used with the target triple x86_64-pc-mingw32.
+
+   Presently Windows for Itanium is not supported.
+
+Windows CE
+----------
+
+Windows CE is supported as a target only on ARM (arm-wince-pe), Hitachi
+SuperH (sh-wince-pe), and MIPS (mips-wince-pe).
+
+Other Windows Platforms
+-----------------------
+
+GCC no longer supports Windows NT on the Alpha or PowerPC.
+
+   GCC no longer supports the Windows POSIX subsystem.  However, it does
+support the Interix subsystem.  See above.
+
+   Old target names including *-*-winnt and *-*-windowsnt are no longer
+used.
+
+   PW32 (i386-pc-pw32) support was never completed, and the project
+seems to be inactive.  See `http://pw32.sourceforge.net/' for more
+information.
+
+   UWIN support has been removed due to a lack of maintenance.
+
+*-*-cygwin
+==========
+
+Ports of GCC are included with the Cygwin environment.
+
+   GCC will build under Cygwin without modification; it does not build
+with Microsoft's C++ compiler and there are no plans to make it do so.
+
+   The Cygwin native compiler can be configured to target any 32-bit x86
+cpu architecture desired; the default is i686-pc-cygwin.  It should be
+used with as up-to-date a version of binutils as possible; use either
+the latest official GNU binutils release in the Cygwin distribution, or
+version 2.20 or above if building your own.
+
+*-*-interix
+===========
+
+The Interix target is used by OpenNT, Interix, Services For UNIX (SFU),
+and Subsystem for UNIX-based Applications (SUA).  Applications compiled
+with this target run in the Interix subsystem, which is separate from
+the Win32 subsystem.  This target was last known to work in GCC 3.3.
+
+   For more information, see `http://www.interix.com/'.
+
+*-*-mingw32
+===========
+
+GCC will build with and support only MinGW runtime 3.12 and later.
+Earlier versions of headers are incompatible with the new default
+semantics of `extern inline' in `-std=c99' and `-std=gnu99' modes.
+
+Older systems
+=============
+
+GCC contains support files for many older (1980s and early 1990s) Unix
+variants.  For the most part, support for these systems has not been
+deliberately removed, but it has not been maintained for several years
+and may suffer from bitrot.
+
+   Starting with GCC 3.1, each release has a list of "obsoleted"
+systems.  Support for these systems is still present in that release,
+but `configure' will fail unless the `--enable-obsolete' option is
+given.  Unless a maintainer steps forward, support for these systems
+will be removed from the next release of GCC.
+
+   Support for old systems as hosts for GCC can cause problems if the
+workarounds for compiler, library and operating system bugs affect the
+cleanliness or maintainability of the rest of GCC.  In some cases, to
+bring GCC up on such a system, if still possible with current GCC, may
+require first installing an old version of GCC which did work on that
+system, and using it to compile a more recent GCC, to avoid bugs in the
+vendor compiler.  Old releases of GCC 1 and GCC 2 are available in the
+`old-releases' directory on the GCC mirror sites.  Header bugs may
+generally be avoided using `fixincludes', but bugs or deficiencies in
+libraries and the operating system may still cause problems.
+
+   Support for older systems as targets for cross-compilation is less
+problematic than support for them as hosts for GCC; if an enthusiast
+wishes to make such a target work again (including resurrecting any of
+the targets that never worked with GCC 2, starting from the last
+version before they were removed), patches following the usual
+requirements would be likely to be accepted, since they should not
+affect the support for more modern targets.
+
+   For some systems, old versions of GNU binutils may also be useful,
+and are available from `pub/binutils/old-releases' on sourceware.org
+mirror sites.
+
+   Some of the information on specific systems above relates to such
+older systems, but much of the information about GCC on such systems
+(which may no longer be applicable to current GCC) is to be found in
+the GCC texinfo manual.
+
+all ELF targets (SVR4, Solaris 2, etc.)
+=======================================
+
+C++ support is significantly better on ELF targets if you use the GNU
+linker; duplicate copies of inlines, vtables and template
+instantiations will be discarded automatically.
+
+
+File: gccinstall.info,  Node: Old,  Next: GNU Free Documentation License,  Prev: Specific,  Up: Top
+
+10 Old installation documentation
+*********************************
+
+   Note most of this information is out of date and superseded by the
+previous chapters of this manual.  It is provided for historical
+reference only, because of a lack of volunteers to merge it into the
+main manual.
+
+* Menu:
+
+* Configurations::    Configurations Supported by GCC.
+
+   Here is the procedure for installing GCC on a GNU or Unix system.
+
+  1. If you have chosen a configuration for GCC which requires other GNU
+     tools (such as GAS or the GNU linker) instead of the standard
+     system tools, install the required tools in the build directory
+     under the names `as', `ld' or whatever is appropriate.
+
+     Alternatively, you can do subsequent compilation using a value of
+     the `PATH' environment variable such that the necessary GNU tools
+     come before the standard system tools.
+
+  2. Specify the host, build and target machine configurations.  You do
+     this when you run the `configure' script.
+
+     The "build" machine is the system which you are using, the "host"
+     machine is the system where you want to run the resulting compiler
+     (normally the build machine), and the "target" machine is the
+     system for which you want the compiler to generate code.
+
+     If you are building a compiler to produce code for the machine it
+     runs on (a native compiler), you normally do not need to specify
+     any operands to `configure'; it will try to guess the type of
+     machine you are on and use that as the build, host and target
+     machines.  So you don't need to specify a configuration when
+     building a native compiler unless `configure' cannot figure out
+     what your configuration is or guesses wrong.
+
+     In those cases, specify the build machine's "configuration name"
+     with the `--host' option; the host and target will default to be
+     the same as the host machine.
+
+     Here is an example:
+
+          ./configure --host=sparc-sun-sunos4.1
+
+     A configuration name may be canonical or it may be more or less
+     abbreviated.
+
+     A canonical configuration name has three parts, separated by
+     dashes.  It looks like this: `CPU-COMPANY-SYSTEM'.  (The three
+     parts may themselves contain dashes; `configure' can figure out
+     which dashes serve which purpose.)  For example,
+     `m68k-sun-sunos4.1' specifies a Sun 3.
+
+     You can also replace parts of the configuration by nicknames or
+     aliases.  For example, `sun3' stands for `m68k-sun', so
+     `sun3-sunos4.1' is another way to specify a Sun 3.
+
+     You can specify a version number after any of the system types,
+     and some of the CPU types.  In most cases, the version is
+     irrelevant, and will be ignored.  So you might as well specify the
+     version if you know it.
+
+     See *note Configurations::, for a list of supported configuration
+     names and notes on many of the configurations.  You should check
+     the notes in that section before proceeding any further with the
+     installation of GCC.
+
+
+
+File: gccinstall.info,  Node: Configurations,  Up: Old
+
+10.1 Configurations Supported by GCC
+====================================
+
+   Here are the possible CPU types:
+
+     1750a, a29k, alpha, arm, avr, cN, clipper, dsp16xx, elxsi, fr30,
+     h8300, hppa1.0, hppa1.1, i370, i386, i486, i586, i686, i786, i860,
+     i960, ip2k, m32r, m68000, m68k, m6811, m6812, m88k, mcore, mips,
+     mipsel, mips64, mips64el, mn10200, mn10300, ns32k, pdp11, powerpc,
+     powerpcle, romp, rs6000, sh, sparc, sparclite, sparc64, v850, vax,
+     we32k.
+
+   Here are the recognized company names.  As you can see, customary
+abbreviations are used rather than the longer official names.
+
+     acorn, alliant, altos, apollo, apple, att, bull, cbm, convergent,
+     convex, crds, dec, dg, dolphin, elxsi, encore, harris, hitachi,
+     hp, ibm, intergraph, isi, mips, motorola, ncr, next, ns, omron,
+     plexus, sequent, sgi, sony, sun, tti, unicom, wrs.
+
+   The company name is meaningful only to disambiguate when the rest of
+the information supplied is insufficient.  You can omit it, writing
+just `CPU-SYSTEM', if it is not needed.  For example, `vax-ultrix4.2'
+is equivalent to `vax-dec-ultrix4.2'.
+
+   Here is a list of system types:
+
+     386bsd, aix, acis, amigaos, aos, aout, aux, bosx, bsd, clix, coff,
+     ctix, cxux, dgux, dynix, ebmon, ecoff, elf, esix, freebsd, hms,
+     genix, gnu, linux, linux-gnu, hiux, hpux, iris, irix, isc, luna,
+     lynxos, mach, minix, msdos, mvs, netbsd, newsos, nindy, ns, osf,
+     osfrose, ptx, riscix, riscos, rtu, sco, sim, solaris, sunos, sym,
+     sysv, udi, ultrix, unicos, uniplus, unos, vms, vsta, vxworks,
+     winnt, xenix.
+
+You can omit the system type; then `configure' guesses the operating
+system from the CPU and company.
+
+   You can add a version number to the system type; this may or may not
+make a difference.  For example, you can write `bsd4.3' or `bsd4.4' to
+distinguish versions of BSD.  In practice, the version number is most
+needed for `sysv3' and `sysv4', which are often treated differently.
+
+   `linux-gnu' is the canonical name for the GNU/Linux target; however
+GCC will also accept `linux'.  The version of the kernel in use is not
+relevant on these systems.  A suffix such as `libc1' or `aout'
+distinguishes major versions of the C library; all of the suffixed
+versions are obsolete.
+
+   If you specify an impossible combination such as `i860-dg-vms', then
+you may get an error message from `configure', or it may ignore part of
+the information and do the best it can with the rest.  `configure'
+always prints the canonical name for the alternative that it used.  GCC
+does not support all possible alternatives.
+
+   Often a particular model of machine has a name.  Many machine names
+are recognized as aliases for CPU/company combinations.  Thus, the
+machine name `sun3', mentioned above, is an alias for `m68k-sun'.
+Sometimes we accept a company name as a machine name, when the name is
+popularly used for a particular machine.  Here is a table of the known
+machine names:
+
+     3300, 3b1, 3bN, 7300, altos3068, altos, apollo68, att-7300,
+     balance, convex-cN, crds, decstation-3100, decstation, delta,
+     encore, fx2800, gmicro, hp7NN, hp8NN, hp9k2NN, hp9k3NN, hp9k7NN,
+     hp9k8NN, iris4d, iris, isi68, m3230, magnum, merlin, miniframe,
+     mmax, news-3600, news800, news, next, pbd, pc532, pmax, powerpc,
+     powerpcle, ps2, risc-news, rtpc, sun2, sun386i, sun386, sun3,
+     sun4, symmetry, tower-32, tower.
+
+Remember that a machine name specifies both the cpu type and the company
+name.  If you want to install your own homemade configuration files,
+you can use `local' as the company name to access them.  If you use
+configuration `CPU-local', the configuration name without the cpu prefix
+is used to form the configuration file names.
+
+   Thus, if you specify `m68k-local', configuration uses files
+`m68k.md', `local.h', `m68k.c', `xm-local.h', `t-local', and `x-local',
+all in the directory `config/m68k'.
+
+
+File: gccinstall.info,  Node: GNU Free Documentation License,  Next: Concept Index,  Prev: Old,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                      Version 1.2, November 2002
+
+     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
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+     "Document", below, refers to any such manual or work.  Any member
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+     accept the license if you copy, modify or distribute the work in a
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+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
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+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
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+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
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+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
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+     be at most 25 words.
+
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+     plus such following pages as are needed to hold, legibly, the
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+     works in formats which do not have any title page as such, "Title
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+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
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+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
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+     add no other conditions whatsoever to those of this License.  You
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+
+     You may also lend copies, under the same conditions stated above,
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+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
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+     these Cover Texts: Front-Cover Texts on the front cover, and
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+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
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+
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+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided for under this License.  Any other
+     attempt to copy, modify, sublicense or distribute the Document is
+     void, and will automatically terminate your rights under this
+     License.  However, parties who have received copies, or rights,
+     from you under this License will not have their licenses
+     terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.2
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: gccinstall.info,  Node: Concept Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Concept Index
+*************
+
+[index]
+* Menu:
+
+* Binaries:                              Binaries.              (line 6)
+* Configuration:                         Configuration.         (line 6)
+* configurations supported by GCC:       Configurations.        (line 6)
+* Downloading GCC:                       Downloading the source.
+                                                                (line 6)
+* Downloading the Source:                Downloading the source.
+                                                                (line 6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                                (line 6)
+* Host specific installation:            Specific.              (line 6)
+* Installing GCC: Binaries:              Binaries.              (line 6)
+* Installing GCC: Building:              Building.              (line 6)
+* Installing GCC: Configuration:         Configuration.         (line 6)
+* Installing GCC: Testing:               Testing.               (line 6)
+* Prerequisites:                         Prerequisites.         (line 6)
+* Specific:                              Specific.              (line 6)
+* Specific installation notes:           Specific.              (line 6)
+* Target specific installation:          Specific.              (line 6)
+* Target specific installation notes:    Specific.              (line 6)
+* Testing:                               Testing.               (line 6)
+* Testsuite:                             Testing.               (line 6)
+
+
+
+Tag Table:
+Node: Top1935
+Node: Installing GCC2493
+Node: Prerequisites4008
+Node: Downloading the source13670
+Node: Configuration15607
+Ref: with-gnu-as29749
+Ref: with-as30647
+Ref: with-gnu-ld32060
+Node: Building75535
+Node: Testing90846
+Node: Final install98626
+Node: Binaries103856
+Node: Specific105449
+Ref: alpha-x-x105955
+Ref: alpha-dec-osf106444
+Ref: arc-x-elf108745
+Ref: arm-x-elf108845
+Ref: avr109065
+Ref: bfin109707
+Ref: cris109949
+Ref: crx110765
+Ref: dos111428
+Ref: x-x-freebsd111751
+Ref: h8300-hms113564
+Ref: hppa-hp-hpux113916
+Ref: hppa-hp-hpux10116287
+Ref: hppa-hp-hpux11116920
+Ref: x-x-linux-gnu122579
+Ref: ix86-x-linux122772
+Ref: ix86-x-solaris289123085
+Ref: ix86-x-solaris210123931
+Ref: ia64-x-linux125161
+Ref: ia64-x-hpux125931
+Ref: x-ibm-aix126486
+Ref: iq2000-x-elf132745
+Ref: lm32-x-elf132885
+Ref: lm32-x-uclinux132989
+Ref: m32c-x-elf133117
+Ref: m32r-x-elf133219
+Ref: m6811-elf133321
+Ref: m6812-elf133471
+Ref: m68k-x-x133621
+Ref: m68k-x-uclinux134593
+Ref: mep-x-elf134956
+Ref: mips-x-x135066
+Ref: mips-sgi-irix5137743
+Ref: mips-sgi-irix6139009
+Ref: moxie-x-elf142340
+Ref: powerpc-x-x142460
+Ref: powerpc-x-darwin142665
+Ref: powerpc-x-elf143212
+Ref: powerpc-x-linux-gnu143297
+Ref: powerpc-x-netbsd143392
+Ref: powerpc-x-eabisim143480
+Ref: powerpc-x-eabi143606
+Ref: powerpcle-x-elf143682
+Ref: powerpcle-x-eabisim143774
+Ref: powerpcle-x-eabi143907
+Ref: rx-x-elf143990
+Ref: s390-x-linux144189
+Ref: s390x-x-linux144261
+Ref: s390x-ibm-tpf144348
+Ref: x-x-solaris2144479
+Ref: sparc-sun-solaris2148291
+Ref: sparc-sun-solaris27151017
+Ref: sparc-sun-solaris210153575
+Ref: sparc-x-linux153951
+Ref: sparc64-x-solaris2154176
+Ref: sparcv9-x-solaris2154818
+Ref: x-x-vxworks154905
+Ref: x86-64-x-x156427
+Ref: xtensa-x-elf156755
+Ref: xtensa-x-linux157426
+Ref: windows157767
+Ref: x-x-cygwin159724
+Ref: x-x-interix160277
+Ref: x-x-mingw32160643
+Ref: older160869
+Ref: elf162986
+Node: Old163244
+Node: Configurations166381
+Node: GNU Free Documentation License170363
+Node: Concept Index192779
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gccint.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gccint.info
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@@ -0,0 +1,46324 @@
+This is doc/gccint.info, produced by makeinfo version 4.13 from
+../../../gcc-4.5.1/gcc/doc/gccint.texi.
+
+Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+INFO-DIR-SECTION Software development
+START-INFO-DIR-ENTRY
+* gccint: (gccint).            Internals of the GNU Compiler Collection.
+END-INFO-DIR-ENTRY
+ This file documents the internals of the GNU compilers.
+
+ Copyright (C) 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
+1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2010 Free
+Software Foundation, Inc.
+
+ Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being "Funding Free Software", the Front-Cover Texts
+being (a) (see below), and with the Back-Cover Texts being (b) (see
+below).  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+ (a) The FSF's Front-Cover Text is:
+
+ A GNU Manual
+
+ (b) The FSF's Back-Cover Text is:
+
+ You have freedom to copy and modify this GNU Manual, like GNU
+software.  Copies published by the Free Software Foundation raise
+funds for GNU development.
+
+
+
+File: gccint.info,  Node: Top,  Next: Contributing,  Up: (DIR)
+
+Introduction
+************
+
+This manual documents the internals of the GNU compilers, including how
+to port them to new targets and some information about how to write
+front ends for new languages.  It corresponds to the compilers
+(GCC) version 4.5.1-tc32-1.3.  The use of the GNU compilers is
+documented in a separate manual.  *Note Introduction: (gcc)Top.
+
+ This manual is mainly a reference manual rather than a tutorial.  It
+discusses how to contribute to GCC (*note Contributing::), the
+characteristics of the machines supported by GCC as hosts and targets
+(*note Portability::), how GCC relates to the ABIs on such systems
+(*note Interface::), and the characteristics of the languages for which
+GCC front ends are written (*note Languages::).  It then describes the
+GCC source tree structure and build system, some of the interfaces to
+GCC front ends, and how support for a target system is implemented in
+GCC.
+
+ Additional tutorial information is linked to from
+`http://gcc.gnu.org/readings.html'.
+
+* Menu:
+
+* Contributing::    How to contribute to testing and developing GCC.
+* Portability::     Goals of GCC's portability features.
+* Interface::       Function-call interface of GCC output.
+* Libgcc::          Low-level runtime library used by GCC.
+* Languages::       Languages for which GCC front ends are written.
+* Source Tree::     GCC source tree structure and build system.
+* Testsuites::      GCC testsuites.
+* Options::         Option specification files.
+* Passes::          Order of passes, what they do, and what each file is for.
+* GENERIC::         Language-independent representation generated by Front Ends
+* GIMPLE::          Tuple representation used by Tree SSA optimizers
+* Tree SSA::        Analysis and optimization of GIMPLE
+* RTL::             Machine-dependent low-level intermediate representation.
+* Control Flow::    Maintaining and manipulating the control flow graph.
+* Loop Analysis and Representation:: Analysis and representation of loops
+* Machine Desc::    How to write machine description instruction patterns.
+* Target Macros::   How to write the machine description C macros and functions.
+* Host Config::     Writing the `xm-MACHINE.h' file.
+* Fragments::       Writing the `t-TARGET' and `x-HOST' files.
+* Collect2::        How `collect2' works; how it finds `ld'.
+* Header Dirs::     Understanding the standard header file directories.
+* Type Information:: GCC's memory management; generating type information.
+* Plugins::         Extending the compiler with plugins.
+
+* Funding::         How to help assure funding for free software.
+* GNU Project::     The GNU Project and GNU/Linux.
+
+* Copying::         GNU General Public License says
+                    how you can copy and share GCC.
+* GNU Free Documentation License:: How you can copy and share this manual.
+* Contributors::    People who have contributed to GCC.
+
+* Option Index::    Index to command line options.
+* Concept Index::   Index of concepts and symbol names.
+
+
+File: gccint.info,  Node: Contributing,  Next: Portability,  Prev: Top,  Up: Top
+
+1 Contributing to GCC Development
+*********************************
+
+If you would like to help pretest GCC releases to assure they work well,
+current development sources are available by SVN (see
+`http://gcc.gnu.org/svn.html').  Source and binary snapshots are also
+available for FTP; see `http://gcc.gnu.org/snapshots.html'.
+
+ If you would like to work on improvements to GCC, please read the
+advice at these URLs:
+
+     `http://gcc.gnu.org/contribute.html'
+     `http://gcc.gnu.org/contributewhy.html'
+
+for information on how to make useful contributions and avoid
+duplication of effort.  Suggested projects are listed at
+`http://gcc.gnu.org/projects/'.
+
+
+File: gccint.info,  Node: Portability,  Next: Interface,  Prev: Contributing,  Up: Top
+
+2 GCC and Portability
+*********************
+
+GCC itself aims to be portable to any machine where `int' is at least a
+32-bit type.  It aims to target machines with a flat (non-segmented)
+byte addressed data address space (the code address space can be
+separate).  Target ABIs may have 8, 16, 32 or 64-bit `int' type.  `char'
+can be wider than 8 bits.
+
+ GCC gets most of the information about the target machine from a
+machine description which gives an algebraic formula for each of the
+machine's instructions.  This is a very clean way to describe the
+target.  But when the compiler needs information that is difficult to
+express in this fashion, ad-hoc parameters have been defined for
+machine descriptions.  The purpose of portability is to reduce the
+total work needed on the compiler; it was not of interest for its own
+sake.
+
+ GCC does not contain machine dependent code, but it does contain code
+that depends on machine parameters such as endianness (whether the most
+significant byte has the highest or lowest address of the bytes in a
+word) and the availability of autoincrement addressing.  In the
+RTL-generation pass, it is often necessary to have multiple strategies
+for generating code for a particular kind of syntax tree, strategies
+that are usable for different combinations of parameters.  Often, not
+all possible cases have been addressed, but only the common ones or
+only the ones that have been encountered.  As a result, a new target
+may require additional strategies.  You will know if this happens
+because the compiler will call `abort'.  Fortunately, the new
+strategies can be added in a machine-independent fashion, and will
+affect only the target machines that need them.
+
+
+File: gccint.info,  Node: Interface,  Next: Libgcc,  Prev: Portability,  Up: Top
+
+3 Interfacing to GCC Output
+***************************
+
+GCC is normally configured to use the same function calling convention
+normally in use on the target system.  This is done with the
+machine-description macros described (*note Target Macros::).
+
+ However, returning of structure and union values is done differently on
+some target machines.  As a result, functions compiled with PCC
+returning such types cannot be called from code compiled with GCC, and
+vice versa.  This does not cause trouble often because few Unix library
+routines return structures or unions.
+
+ GCC code returns structures and unions that are 1, 2, 4 or 8 bytes
+long in the same registers used for `int' or `double' return values.
+(GCC typically allocates variables of such types in registers also.)
+Structures and unions of other sizes are returned by storing them into
+an address passed by the caller (usually in a register).  The target
+hook `TARGET_STRUCT_VALUE_RTX' tells GCC where to pass this address.
+
+ By contrast, PCC on most target machines returns structures and unions
+of any size by copying the data into an area of static storage, and then
+returning the address of that storage as if it were a pointer value.
+The caller must copy the data from that memory area to the place where
+the value is wanted.  This is slower than the method used by GCC, and
+fails to be reentrant.
+
+ On some target machines, such as RISC machines and the 80386, the
+standard system convention is to pass to the subroutine the address of
+where to return the value.  On these machines, GCC has been configured
+to be compatible with the standard compiler, when this method is used.
+It may not be compatible for structures of 1, 2, 4 or 8 bytes.
+
+ GCC uses the system's standard convention for passing arguments.  On
+some machines, the first few arguments are passed in registers; in
+others, all are passed on the stack.  It would be possible to use
+registers for argument passing on any machine, and this would probably
+result in a significant speedup.  But the result would be complete
+incompatibility with code that follows the standard convention.  So this
+change is practical only if you are switching to GCC as the sole C
+compiler for the system.  We may implement register argument passing on
+certain machines once we have a complete GNU system so that we can
+compile the libraries with GCC.
+
+ On some machines (particularly the SPARC), certain types of arguments
+are passed "by invisible reference".  This means that the value is
+stored in memory, and the address of the memory location is passed to
+the subroutine.
+
+ If you use `longjmp', beware of automatic variables.  ISO C says that
+automatic variables that are not declared `volatile' have undefined
+values after a `longjmp'.  And this is all GCC promises to do, because
+it is very difficult to restore register variables correctly, and one
+of GCC's features is that it can put variables in registers without
+your asking it to.
+
+
+File: gccint.info,  Node: Libgcc,  Next: Languages,  Prev: Interface,  Up: Top
+
+4 The GCC low-level runtime library
+***********************************
+
+GCC provides a low-level runtime library, `libgcc.a' or `libgcc_s.so.1'
+on some platforms.  GCC generates calls to routines in this library
+automatically, whenever it needs to perform some operation that is too
+complicated to emit inline code for.
+
+ Most of the routines in `libgcc' handle arithmetic operations that the
+target processor cannot perform directly.  This includes integer
+multiply and divide on some machines, and all floating-point and
+fixed-point operations on other machines.  `libgcc' also includes
+routines for exception handling, and a handful of miscellaneous
+operations.
+
+ Some of these routines can be defined in mostly machine-independent C.
+Others must be hand-written in assembly language for each processor
+that needs them.
+
+ GCC will also generate calls to C library routines, such as `memcpy'
+and `memset', in some cases.  The set of routines that GCC may possibly
+use is documented in *note Other Builtins: (gcc)Other Builtins.
+
+ These routines take arguments and return values of a specific machine
+mode, not a specific C type.  *Note Machine Modes::, for an explanation
+of this concept.  For illustrative purposes, in this chapter the
+floating point type `float' is assumed to correspond to `SFmode';
+`double' to `DFmode'; and `long double' to both `TFmode' and `XFmode'.
+Similarly, the integer types `int' and `unsigned int' correspond to
+`SImode'; `long' and `unsigned long' to `DImode'; and `long long' and
+`unsigned long long' to `TImode'.
+
+* Menu:
+
+* Integer library routines::
+* Soft float library routines::
+* Decimal float library routines::
+* Fixed-point fractional library routines::
+* Exception handling routines::
+* Miscellaneous routines::
+
+
+File: gccint.info,  Node: Integer library routines,  Next: Soft float library routines,  Up: Libgcc
+
+4.1 Routines for integer arithmetic
+===================================
+
+The integer arithmetic routines are used on platforms that don't provide
+hardware support for arithmetic operations on some modes.
+
+4.1.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: int __ashlsi3 (int A, int B)
+ -- Runtime Function: long __ashldi3 (long A, int B)
+ -- Runtime Function: long long __ashlti3 (long long A, int B)
+     These functions return the result of shifting A left by B bits.
+
+ -- Runtime Function: int __ashrsi3 (int A, int B)
+ -- Runtime Function: long __ashrdi3 (long A, int B)
+ -- Runtime Function: long long __ashrti3 (long long A, int B)
+     These functions return the result of arithmetically shifting A
+     right by B bits.
+
+ -- Runtime Function: int __divsi3 (int A, int B)
+ -- Runtime Function: long __divdi3 (long A, long B)
+ -- Runtime Function: long long __divti3 (long long A, long long B)
+     These functions return the quotient of the signed division of A and
+     B.
+
+ -- Runtime Function: int __lshrsi3 (int A, int B)
+ -- Runtime Function: long __lshrdi3 (long A, int B)
+ -- Runtime Function: long long __lshrti3 (long long A, int B)
+     These functions return the result of logically shifting A right by
+     B bits.
+
+ -- Runtime Function: int __modsi3 (int A, int B)
+ -- Runtime Function: long __moddi3 (long A, long B)
+ -- Runtime Function: long long __modti3 (long long A, long long B)
+     These functions return the remainder of the signed division of A
+     and B.
+
+ -- Runtime Function: int __mulsi3 (int A, int B)
+ -- Runtime Function: long __muldi3 (long A, long B)
+ -- Runtime Function: long long __multi3 (long long A, long long B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: long __negdi2 (long A)
+ -- Runtime Function: long long __negti2 (long long A)
+     These functions return the negation of A.
+
+ -- Runtime Function: unsigned int __udivsi3 (unsigned int A, unsigned
+          int B)
+ -- Runtime Function: unsigned long __udivdi3 (unsigned long A,
+          unsigned long B)
+ -- Runtime Function: unsigned long long __udivti3 (unsigned long long
+          A, unsigned long long B)
+     These functions return the quotient of the unsigned division of A
+     and B.
+
+ -- Runtime Function: unsigned long __udivmoddi3 (unsigned long A,
+          unsigned long B, unsigned long *C)
+ -- Runtime Function: unsigned long long __udivti3 (unsigned long long
+          A, unsigned long long B, unsigned long long *C)
+     These functions calculate both the quotient and remainder of the
+     unsigned division of A and B.  The return value is the quotient,
+     and the remainder is placed in variable pointed to by C.
+
+ -- Runtime Function: unsigned int __umodsi3 (unsigned int A, unsigned
+          int B)
+ -- Runtime Function: unsigned long __umoddi3 (unsigned long A,
+          unsigned long B)
+ -- Runtime Function: unsigned long long __umodti3 (unsigned long long
+          A, unsigned long long B)
+     These functions return the remainder of the unsigned division of A
+     and B.
+
+4.1.2 Comparison functions
+--------------------------
+
+The following functions implement integral comparisons.  These functions
+implement a low-level compare, upon which the higher level comparison
+operators (such as less than and greater than or equal to) can be
+constructed.  The returned values lie in the range zero to two, to allow
+the high-level operators to be implemented by testing the returned
+result using either signed or unsigned comparison.
+
+ -- Runtime Function: int __cmpdi2 (long A, long B)
+ -- Runtime Function: int __cmpti2 (long long A, long long B)
+     These functions perform a signed comparison of A and B.  If A is
+     less than B, they return 0; if A is greater than B, they return 2;
+     and if A and B are equal they return 1.
+
+ -- Runtime Function: int __ucmpdi2 (unsigned long A, unsigned long B)
+ -- Runtime Function: int __ucmpti2 (unsigned long long A, unsigned
+          long long B)
+     These functions perform an unsigned comparison of A and B.  If A
+     is less than B, they return 0; if A is greater than B, they return
+     2; and if A and B are equal they return 1.
+
+4.1.3 Trapping arithmetic functions
+-----------------------------------
+
+The following functions implement trapping arithmetic.  These functions
+call the libc function `abort' upon signed arithmetic overflow.
+
+ -- Runtime Function: int __absvsi2 (int A)
+ -- Runtime Function: long __absvdi2 (long A)
+     These functions return the absolute value of A.
+
+ -- Runtime Function: int __addvsi3 (int A, int B)
+ -- Runtime Function: long __addvdi3 (long A, long B)
+     These functions return the sum of A and B; that is `A + B'.
+
+ -- Runtime Function: int __mulvsi3 (int A, int B)
+ -- Runtime Function: long __mulvdi3 (long A, long B)
+     The functions return the product of A and B; that is `A * B'.
+
+ -- Runtime Function: int __negvsi2 (int A)
+ -- Runtime Function: long __negvdi2 (long A)
+     These functions return the negation of A; that is `-A'.
+
+ -- Runtime Function: int __subvsi3 (int A, int B)
+ -- Runtime Function: long __subvdi3 (long A, long B)
+     These functions return the difference between B and A; that is `A
+     - B'.
+
+4.1.4 Bit operations
+--------------------
+
+ -- Runtime Function: int __clzsi2 (int A)
+ -- Runtime Function: int __clzdi2 (long A)
+ -- Runtime Function: int __clzti2 (long long A)
+     These functions return the number of leading 0-bits in A, starting
+     at the most significant bit position.  If A is zero, the result is
+     undefined.
+
+ -- Runtime Function: int __ctzsi2 (int A)
+ -- Runtime Function: int __ctzdi2 (long A)
+ -- Runtime Function: int __ctzti2 (long long A)
+     These functions return the number of trailing 0-bits in A, starting
+     at the least significant bit position.  If A is zero, the result is
+     undefined.
+
+ -- Runtime Function: int __ffsdi2 (long A)
+ -- Runtime Function: int __ffsti2 (long long A)
+     These functions return the index of the least significant 1-bit in
+     A, or the value zero if A is zero.  The least significant bit is
+     index one.
+
+ -- Runtime Function: int __paritysi2 (int A)
+ -- Runtime Function: int __paritydi2 (long A)
+ -- Runtime Function: int __parityti2 (long long A)
+     These functions return the value zero if the number of bits set in
+     A is even, and the value one otherwise.
+
+ -- Runtime Function: int __popcountsi2 (int A)
+ -- Runtime Function: int __popcountdi2 (long A)
+ -- Runtime Function: int __popcountti2 (long long A)
+     These functions return the number of bits set in A.
+
+ -- Runtime Function: int32_t __bswapsi2 (int32_t A)
+ -- Runtime Function: int64_t __bswapdi2 (int64_t A)
+     These functions return the A byteswapped.
+
+
+File: gccint.info,  Node: Soft float library routines,  Next: Decimal float library routines,  Prev: Integer library routines,  Up: Libgcc
+
+4.2 Routines for floating point emulation
+=========================================
+
+The software floating point library is used on machines which do not
+have hardware support for floating point.  It is also used whenever
+`-msoft-float' is used to disable generation of floating point
+instructions.  (Not all targets support this switch.)
+
+ For compatibility with other compilers, the floating point emulation
+routines can be renamed with the `DECLARE_LIBRARY_RENAMES' macro (*note
+Library Calls::).  In this section, the default names are used.
+
+ Presently the library does not support `XFmode', which is used for
+`long double' on some architectures.
+
+4.2.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: float __addsf3 (float A, float B)
+ -- Runtime Function: double __adddf3 (double A, double B)
+ -- Runtime Function: long double __addtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __addxf3 (long double A, long double
+          B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: float __subsf3 (float A, float B)
+ -- Runtime Function: double __subdf3 (double A, double B)
+ -- Runtime Function: long double __subtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __subxf3 (long double A, long double
+          B)
+     These functions return the difference between B and A; that is,
+     A - B.
+
+ -- Runtime Function: float __mulsf3 (float A, float B)
+ -- Runtime Function: double __muldf3 (double A, double B)
+ -- Runtime Function: long double __multf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __mulxf3 (long double A, long double
+          B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: float __divsf3 (float A, float B)
+ -- Runtime Function: double __divdf3 (double A, double B)
+ -- Runtime Function: long double __divtf3 (long double A, long double
+          B)
+ -- Runtime Function: long double __divxf3 (long double A, long double
+          B)
+     These functions return the quotient of A and B; that is, A / B.
+
+ -- Runtime Function: float __negsf2 (float A)
+ -- Runtime Function: double __negdf2 (double A)
+ -- Runtime Function: long double __negtf2 (long double A)
+ -- Runtime Function: long double __negxf2 (long double A)
+     These functions return the negation of A.  They simply flip the
+     sign bit, so they can produce negative zero and negative NaN.
+
+4.2.2 Conversion functions
+--------------------------
+
+ -- Runtime Function: double __extendsfdf2 (float A)
+ -- Runtime Function: long double __extendsftf2 (float A)
+ -- Runtime Function: long double __extendsfxf2 (float A)
+ -- Runtime Function: long double __extenddftf2 (double A)
+ -- Runtime Function: long double __extenddfxf2 (double A)
+     These functions extend A to the wider mode of their return type.
+
+ -- Runtime Function: double __truncxfdf2 (long double A)
+ -- Runtime Function: double __trunctfdf2 (long double A)
+ -- Runtime Function: float __truncxfsf2 (long double A)
+ -- Runtime Function: float __trunctfsf2 (long double A)
+ -- Runtime Function: float __truncdfsf2 (double A)
+     These functions truncate A to the narrower mode of their return
+     type, rounding toward zero.
+
+ -- Runtime Function: int __fixsfsi (float A)
+ -- Runtime Function: int __fixdfsi (double A)
+ -- Runtime Function: int __fixtfsi (long double A)
+ -- Runtime Function: int __fixxfsi (long double A)
+     These functions convert A to a signed integer, rounding toward
+     zero.
+
+ -- Runtime Function: long __fixsfdi (float A)
+ -- Runtime Function: long __fixdfdi (double A)
+ -- Runtime Function: long __fixtfdi (long double A)
+ -- Runtime Function: long __fixxfdi (long double A)
+     These functions convert A to a signed long, rounding toward zero.
+
+ -- Runtime Function: long long __fixsfti (float A)
+ -- Runtime Function: long long __fixdfti (double A)
+ -- Runtime Function: long long __fixtfti (long double A)
+ -- Runtime Function: long long __fixxfti (long double A)
+     These functions convert A to a signed long long, rounding toward
+     zero.
+
+ -- Runtime Function: unsigned int __fixunssfsi (float A)
+ -- Runtime Function: unsigned int __fixunsdfsi (double A)
+ -- Runtime Function: unsigned int __fixunstfsi (long double A)
+ -- Runtime Function: unsigned int __fixunsxfsi (long double A)
+     These functions convert A to an unsigned integer, rounding toward
+     zero.  Negative values all become zero.
+
+ -- Runtime Function: unsigned long __fixunssfdi (float A)
+ -- Runtime Function: unsigned long __fixunsdfdi (double A)
+ -- Runtime Function: unsigned long __fixunstfdi (long double A)
+ -- Runtime Function: unsigned long __fixunsxfdi (long double A)
+     These functions convert A to an unsigned long, rounding toward
+     zero.  Negative values all become zero.
+
+ -- Runtime Function: unsigned long long __fixunssfti (float A)
+ -- Runtime Function: unsigned long long __fixunsdfti (double A)
+ -- Runtime Function: unsigned long long __fixunstfti (long double A)
+ -- Runtime Function: unsigned long long __fixunsxfti (long double A)
+     These functions convert A to an unsigned long long, rounding
+     toward zero.  Negative values all become zero.
+
+ -- Runtime Function: float __floatsisf (int I)
+ -- Runtime Function: double __floatsidf (int I)
+ -- Runtime Function: long double __floatsitf (int I)
+ -- Runtime Function: long double __floatsixf (int I)
+     These functions convert I, a signed integer, to floating point.
+
+ -- Runtime Function: float __floatdisf (long I)
+ -- Runtime Function: double __floatdidf (long I)
+ -- Runtime Function: long double __floatditf (long I)
+ -- Runtime Function: long double __floatdixf (long I)
+     These functions convert I, a signed long, to floating point.
+
+ -- Runtime Function: float __floattisf (long long I)
+ -- Runtime Function: double __floattidf (long long I)
+ -- Runtime Function: long double __floattitf (long long I)
+ -- Runtime Function: long double __floattixf (long long I)
+     These functions convert I, a signed long long, to floating point.
+
+ -- Runtime Function: float __floatunsisf (unsigned int I)
+ -- Runtime Function: double __floatunsidf (unsigned int I)
+ -- Runtime Function: long double __floatunsitf (unsigned int I)
+ -- Runtime Function: long double __floatunsixf (unsigned int I)
+     These functions convert I, an unsigned integer, to floating point.
+
+ -- Runtime Function: float __floatundisf (unsigned long I)
+ -- Runtime Function: double __floatundidf (unsigned long I)
+ -- Runtime Function: long double __floatunditf (unsigned long I)
+ -- Runtime Function: long double __floatundixf (unsigned long I)
+     These functions convert I, an unsigned long, to floating point.
+
+ -- Runtime Function: float __floatuntisf (unsigned long long I)
+ -- Runtime Function: double __floatuntidf (unsigned long long I)
+ -- Runtime Function: long double __floatuntitf (unsigned long long I)
+ -- Runtime Function: long double __floatuntixf (unsigned long long I)
+     These functions convert I, an unsigned long long, to floating
+     point.
+
+4.2.3 Comparison functions
+--------------------------
+
+There are two sets of basic comparison functions.
+
+ -- Runtime Function: int __cmpsf2 (float A, float B)
+ -- Runtime Function: int __cmpdf2 (double A, double B)
+ -- Runtime Function: int __cmptf2 (long double A, long double B)
+     These functions calculate a <=> b.  That is, if A is less than B,
+     they return -1; if A is greater than B, they return 1; and if A
+     and B are equal they return 0.  If either argument is NaN they
+     return 1, but you should not rely on this; if NaN is a
+     possibility, use one of the higher-level comparison functions.
+
+ -- Runtime Function: int __unordsf2 (float A, float B)
+ -- Runtime Function: int __unorddf2 (double A, double B)
+ -- Runtime Function: int __unordtf2 (long double A, long double B)
+     These functions return a nonzero value if either argument is NaN,
+     otherwise 0.
+
+ There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.  Pay
+careful attention to the return values defined for each set.  Under the
+hood, all of these routines are implemented as
+
+       if (__unordXf2 (a, b))
+         return E;
+       return __cmpXf2 (a, b);
+
+where E is a constant chosen to give the proper behavior for NaN.
+Thus, the meaning of the return value is different for each set.  Do
+not rely on this implementation; only the semantics documented below
+are guaranteed.
+
+ -- Runtime Function: int __eqsf2 (float A, float B)
+ -- Runtime Function: int __eqdf2 (double A, double B)
+ -- Runtime Function: int __eqtf2 (long double A, long double B)
+     These functions return zero if neither argument is NaN, and A and
+     B are equal.
+
+ -- Runtime Function: int __nesf2 (float A, float B)
+ -- Runtime Function: int __nedf2 (double A, double B)
+ -- Runtime Function: int __netf2 (long double A, long double B)
+     These functions return a nonzero value if either argument is NaN,
+     or if A and B are unequal.
+
+ -- Runtime Function: int __gesf2 (float A, float B)
+ -- Runtime Function: int __gedf2 (double A, double B)
+ -- Runtime Function: int __getf2 (long double A, long double B)
+     These functions return a value greater than or equal to zero if
+     neither argument is NaN, and A is greater than or equal to B.
+
+ -- Runtime Function: int __ltsf2 (float A, float B)
+ -- Runtime Function: int __ltdf2 (double A, double B)
+ -- Runtime Function: int __lttf2 (long double A, long double B)
+     These functions return a value less than zero if neither argument
+     is NaN, and A is strictly less than B.
+
+ -- Runtime Function: int __lesf2 (float A, float B)
+ -- Runtime Function: int __ledf2 (double A, double B)
+ -- Runtime Function: int __letf2 (long double A, long double B)
+     These functions return a value less than or equal to zero if
+     neither argument is NaN, and A is less than or equal to B.
+
+ -- Runtime Function: int __gtsf2 (float A, float B)
+ -- Runtime Function: int __gtdf2 (double A, double B)
+ -- Runtime Function: int __gttf2 (long double A, long double B)
+     These functions return a value greater than zero if neither
+     argument is NaN, and A is strictly greater than B.
+
+4.2.4 Other floating-point functions
+------------------------------------
+
+ -- Runtime Function: float __powisf2 (float A, int B)
+ -- Runtime Function: double __powidf2 (double A, int B)
+ -- Runtime Function: long double __powitf2 (long double A, int B)
+ -- Runtime Function: long double __powixf2 (long double A, int B)
+     These functions convert raise A to the power B.
+
+ -- Runtime Function: complex float __mulsc3 (float A, float B, float
+          C, float D)
+ -- Runtime Function: complex double __muldc3 (double A, double B,
+          double C, double D)
+ -- Runtime Function: complex long double __multc3 (long double A, long
+          double B, long double C, long double D)
+ -- Runtime Function: complex long double __mulxc3 (long double A, long
+          double B, long double C, long double D)
+     These functions return the product of A + iB and C + iD, following
+     the rules of C99 Annex G.
+
+ -- Runtime Function: complex float __divsc3 (float A, float B, float
+          C, float D)
+ -- Runtime Function: complex double __divdc3 (double A, double B,
+          double C, double D)
+ -- Runtime Function: complex long double __divtc3 (long double A, long
+          double B, long double C, long double D)
+ -- Runtime Function: complex long double __divxc3 (long double A, long
+          double B, long double C, long double D)
+     These functions return the quotient of A + iB and C + iD (i.e., (A
+     + iB) / (C + iD)), following the rules of C99 Annex G.
+
+
+File: gccint.info,  Node: Decimal float library routines,  Next: Fixed-point fractional library routines,  Prev: Soft float library routines,  Up: Libgcc
+
+4.3 Routines for decimal floating point emulation
+=================================================
+
+The software decimal floating point library implements IEEE 754-2008
+decimal floating point arithmetic and is only activated on selected
+targets.
+
+ The software decimal floating point library supports either DPD
+(Densely Packed Decimal) or BID (Binary Integer Decimal) encoding as
+selected at configure time.
+
+4.3.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: _Decimal32 __dpd_addsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_addsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_adddd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_adddd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_addtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_addtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: _Decimal32 __dpd_subsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_subsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_subdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_subdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_subtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_subtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the difference between B and A; that is,
+     A - B.
+
+ -- Runtime Function: _Decimal32 __dpd_mulsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_mulsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_muldd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_muldd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_multd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_multd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: _Decimal32 __dpd_divsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal32 __bid_divsd3 (_Decimal32 A, _Decimal32
+          B)
+ -- Runtime Function: _Decimal64 __dpd_divdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal64 __bid_divdd3 (_Decimal64 A, _Decimal64
+          B)
+ -- Runtime Function: _Decimal128 __dpd_divtd3 (_Decimal128 A,
+          _Decimal128 B)
+ -- Runtime Function: _Decimal128 __bid_divtd3 (_Decimal128 A,
+          _Decimal128 B)
+     These functions return the quotient of A and B; that is, A / B.
+
+ -- Runtime Function: _Decimal32 __dpd_negsd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal32 __bid_negsd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal64 __dpd_negdd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal64 __bid_negdd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal128 __dpd_negtd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal128 __bid_negtd2 (_Decimal128 A)
+     These functions return the negation of A.  They simply flip the
+     sign bit, so they can produce negative zero and negative NaN.
+
+4.3.2 Conversion functions
+--------------------------
+
+ -- Runtime Function: _Decimal64 __dpd_extendsddd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal64 __bid_extendsddd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __dpd_extendsdtd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __bid_extendsdtd2 (_Decimal32 A)
+ -- Runtime Function: _Decimal128 __dpd_extendddtd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal128 __bid_extendddtd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __dpd_truncddsd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __bid_truncddsd2 (_Decimal64 A)
+ -- Runtime Function: _Decimal32 __dpd_trunctdsd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal32 __bid_trunctdsd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal64 __dpd_trunctddd2 (_Decimal128 A)
+ -- Runtime Function: _Decimal64 __bid_trunctddd2 (_Decimal128 A)
+     These functions convert the value A from one decimal floating type
+     to another.
+
+ -- Runtime Function: _Decimal64 __dpd_extendsfdd (float A)
+ -- Runtime Function: _Decimal64 __bid_extendsfdd (float A)
+ -- Runtime Function: _Decimal128 __dpd_extendsftd (float A)
+ -- Runtime Function: _Decimal128 __bid_extendsftd (float A)
+ -- Runtime Function: _Decimal128 __dpd_extenddftd (double A)
+ -- Runtime Function: _Decimal128 __bid_extenddftd (double A)
+ -- Runtime Function: _Decimal128 __dpd_extendxftd (long double A)
+ -- Runtime Function: _Decimal128 __bid_extendxftd (long double A)
+ -- Runtime Function: _Decimal32 __dpd_truncdfsd (double A)
+ -- Runtime Function: _Decimal32 __bid_truncdfsd (double A)
+ -- Runtime Function: _Decimal32 __dpd_truncxfsd (long double A)
+ -- Runtime Function: _Decimal32 __bid_truncxfsd (long double A)
+ -- Runtime Function: _Decimal32 __dpd_trunctfsd (long double A)
+ -- Runtime Function: _Decimal32 __bid_trunctfsd (long double A)
+ -- Runtime Function: _Decimal64 __dpd_truncxfdd (long double A)
+ -- Runtime Function: _Decimal64 __bid_truncxfdd (long double A)
+ -- Runtime Function: _Decimal64 __dpd_trunctfdd (long double A)
+ -- Runtime Function: _Decimal64 __bid_trunctfdd (long double A)
+     These functions convert the value of A from a binary floating type
+     to a decimal floating type of a different size.
+
+ -- Runtime Function: float __dpd_truncddsf (_Decimal64 A)
+ -- Runtime Function: float __bid_truncddsf (_Decimal64 A)
+ -- Runtime Function: float __dpd_trunctdsf (_Decimal128 A)
+ -- Runtime Function: float __bid_trunctdsf (_Decimal128 A)
+ -- Runtime Function: double __dpd_extendsddf (_Decimal32 A)
+ -- Runtime Function: double __bid_extendsddf (_Decimal32 A)
+ -- Runtime Function: double __dpd_trunctddf (_Decimal128 A)
+ -- Runtime Function: double __bid_trunctddf (_Decimal128 A)
+ -- Runtime Function: long double __dpd_extendsdxf (_Decimal32 A)
+ -- Runtime Function: long double __bid_extendsdxf (_Decimal32 A)
+ -- Runtime Function: long double __dpd_extendddxf (_Decimal64 A)
+ -- Runtime Function: long double __bid_extendddxf (_Decimal64 A)
+ -- Runtime Function: long double __dpd_trunctdxf (_Decimal128 A)
+ -- Runtime Function: long double __bid_trunctdxf (_Decimal128 A)
+ -- Runtime Function: long double __dpd_extendsdtf (_Decimal32 A)
+ -- Runtime Function: long double __bid_extendsdtf (_Decimal32 A)
+ -- Runtime Function: long double __dpd_extendddtf (_Decimal64 A)
+ -- Runtime Function: long double __bid_extendddtf (_Decimal64 A)
+     These functions convert the value of A from a decimal floating type
+     to a binary floating type of a different size.
+
+ -- Runtime Function: _Decimal32 __dpd_extendsfsd (float A)
+ -- Runtime Function: _Decimal32 __bid_extendsfsd (float A)
+ -- Runtime Function: _Decimal64 __dpd_extenddfdd (double A)
+ -- Runtime Function: _Decimal64 __bid_extenddfdd (double A)
+ -- Runtime Function: _Decimal128 __dpd_extendtftd (long double A)
+ -- Runtime Function: _Decimal128 __bid_extendtftd (long double A)
+ -- Runtime Function: float __dpd_truncsdsf (_Decimal32 A)
+ -- Runtime Function: float __bid_truncsdsf (_Decimal32 A)
+ -- Runtime Function: double __dpd_truncdddf (_Decimal64 A)
+ -- Runtime Function: double __bid_truncdddf (_Decimal64 A)
+ -- Runtime Function: long double __dpd_trunctdtf (_Decimal128 A)
+ -- Runtime Function: long double __bid_trunctdtf (_Decimal128 A)
+     These functions convert the value of A between decimal and binary
+     floating types of the same size.
+
+ -- Runtime Function: int __dpd_fixsdsi (_Decimal32 A)
+ -- Runtime Function: int __bid_fixsdsi (_Decimal32 A)
+ -- Runtime Function: int __dpd_fixddsi (_Decimal64 A)
+ -- Runtime Function: int __bid_fixddsi (_Decimal64 A)
+ -- Runtime Function: int __dpd_fixtdsi (_Decimal128 A)
+ -- Runtime Function: int __bid_fixtdsi (_Decimal128 A)
+     These functions convert A to a signed integer.
+
+ -- Runtime Function: long __dpd_fixsddi (_Decimal32 A)
+ -- Runtime Function: long __bid_fixsddi (_Decimal32 A)
+ -- Runtime Function: long __dpd_fixdddi (_Decimal64 A)
+ -- Runtime Function: long __bid_fixdddi (_Decimal64 A)
+ -- Runtime Function: long __dpd_fixtddi (_Decimal128 A)
+ -- Runtime Function: long __bid_fixtddi (_Decimal128 A)
+     These functions convert A to a signed long.
+
+ -- Runtime Function: unsigned int __dpd_fixunssdsi (_Decimal32 A)
+ -- Runtime Function: unsigned int __bid_fixunssdsi (_Decimal32 A)
+ -- Runtime Function: unsigned int __dpd_fixunsddsi (_Decimal64 A)
+ -- Runtime Function: unsigned int __bid_fixunsddsi (_Decimal64 A)
+ -- Runtime Function: unsigned int __dpd_fixunstdsi (_Decimal128 A)
+ -- Runtime Function: unsigned int __bid_fixunstdsi (_Decimal128 A)
+     These functions convert A to an unsigned integer.  Negative values
+     all become zero.
+
+ -- Runtime Function: unsigned long __dpd_fixunssddi (_Decimal32 A)
+ -- Runtime Function: unsigned long __bid_fixunssddi (_Decimal32 A)
+ -- Runtime Function: unsigned long __dpd_fixunsdddi (_Decimal64 A)
+ -- Runtime Function: unsigned long __bid_fixunsdddi (_Decimal64 A)
+ -- Runtime Function: unsigned long __dpd_fixunstddi (_Decimal128 A)
+ -- Runtime Function: unsigned long __bid_fixunstddi (_Decimal128 A)
+     These functions convert A to an unsigned long.  Negative values
+     all become zero.
+
+ -- Runtime Function: _Decimal32 __dpd_floatsisd (int I)
+ -- Runtime Function: _Decimal32 __bid_floatsisd (int I)
+ -- Runtime Function: _Decimal64 __dpd_floatsidd (int I)
+ -- Runtime Function: _Decimal64 __bid_floatsidd (int I)
+ -- Runtime Function: _Decimal128 __dpd_floatsitd (int I)
+ -- Runtime Function: _Decimal128 __bid_floatsitd (int I)
+     These functions convert I, a signed integer, to decimal floating
+     point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatdisd (long I)
+ -- Runtime Function: _Decimal32 __bid_floatdisd (long I)
+ -- Runtime Function: _Decimal64 __dpd_floatdidd (long I)
+ -- Runtime Function: _Decimal64 __bid_floatdidd (long I)
+ -- Runtime Function: _Decimal128 __dpd_floatditd (long I)
+ -- Runtime Function: _Decimal128 __bid_floatditd (long I)
+     These functions convert I, a signed long, to decimal floating
+     point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatunssisd (unsigned int I)
+ -- Runtime Function: _Decimal32 __bid_floatunssisd (unsigned int I)
+ -- Runtime Function: _Decimal64 __dpd_floatunssidd (unsigned int I)
+ -- Runtime Function: _Decimal64 __bid_floatunssidd (unsigned int I)
+ -- Runtime Function: _Decimal128 __dpd_floatunssitd (unsigned int I)
+ -- Runtime Function: _Decimal128 __bid_floatunssitd (unsigned int I)
+     These functions convert I, an unsigned integer, to decimal
+     floating point.
+
+ -- Runtime Function: _Decimal32 __dpd_floatunsdisd (unsigned long I)
+ -- Runtime Function: _Decimal32 __bid_floatunsdisd (unsigned long I)
+ -- Runtime Function: _Decimal64 __dpd_floatunsdidd (unsigned long I)
+ -- Runtime Function: _Decimal64 __bid_floatunsdidd (unsigned long I)
+ -- Runtime Function: _Decimal128 __dpd_floatunsditd (unsigned long I)
+ -- Runtime Function: _Decimal128 __bid_floatunsditd (unsigned long I)
+     These functions convert I, an unsigned long, to decimal floating
+     point.
+
+4.3.3 Comparison functions
+--------------------------
+
+ -- Runtime Function: int __dpd_unordsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_unordsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_unorddd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_unorddd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_unordtd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_unordtd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a nonzero value if either argument is NaN,
+     otherwise 0.
+
+ There is also a complete group of higher level functions which
+correspond directly to comparison operators.  They implement the ISO C
+semantics for floating-point comparisons, taking NaN into account.  Pay
+careful attention to the return values defined for each set.  Under the
+hood, all of these routines are implemented as
+
+       if (__bid_unordXd2 (a, b))
+         return E;
+       return __bid_cmpXd2 (a, b);
+
+where E is a constant chosen to give the proper behavior for NaN.
+Thus, the meaning of the return value is different for each set.  Do
+not rely on this implementation; only the semantics documented below
+are guaranteed.
+
+ -- Runtime Function: int __dpd_eqsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_eqsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_eqdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_eqdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_eqtd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_eqtd2 (_Decimal128 A, _Decimal128 B)
+     These functions return zero if neither argument is NaN, and A and
+     B are equal.
+
+ -- Runtime Function: int __dpd_nesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_nesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_nedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_nedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_netd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_netd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a nonzero value if either argument is NaN,
+     or if A and B are unequal.
+
+ -- Runtime Function: int __dpd_gesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_gesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_gedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_gedd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_getd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_getd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value greater than or equal to zero if
+     neither argument is NaN, and A is greater than or equal to B.
+
+ -- Runtime Function: int __dpd_ltsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_ltsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_ltdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_ltdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_lttd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_lttd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value less than zero if neither argument
+     is NaN, and A is strictly less than B.
+
+ -- Runtime Function: int __dpd_lesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_lesd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_ledd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_ledd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_letd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_letd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value less than or equal to zero if
+     neither argument is NaN, and A is less than or equal to B.
+
+ -- Runtime Function: int __dpd_gtsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __bid_gtsd2 (_Decimal32 A, _Decimal32 B)
+ -- Runtime Function: int __dpd_gtdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __bid_gtdd2 (_Decimal64 A, _Decimal64 B)
+ -- Runtime Function: int __dpd_gttd2 (_Decimal128 A, _Decimal128 B)
+ -- Runtime Function: int __bid_gttd2 (_Decimal128 A, _Decimal128 B)
+     These functions return a value greater than zero if neither
+     argument is NaN, and A is strictly greater than B.
+
+
+File: gccint.info,  Node: Fixed-point fractional library routines,  Next: Exception handling routines,  Prev: Decimal float library routines,  Up: Libgcc
+
+4.4 Routines for fixed-point fractional emulation
+=================================================
+
+The software fixed-point library implements fixed-point fractional
+arithmetic, and is only activated on selected targets.
+
+ For ease of comprehension `fract' is an alias for the `_Fract' type,
+`accum' an alias for `_Accum', and `sat' an alias for `_Sat'.
+
+ For illustrative purposes, in this section the fixed-point fractional
+type `short fract' is assumed to correspond to machine mode `QQmode';
+`unsigned short fract' to `UQQmode'; `fract' to `HQmode';
+`unsigned fract' to `UHQmode'; `long fract' to `SQmode';
+`unsigned long fract' to `USQmode'; `long long fract' to `DQmode'; and
+`unsigned long long fract' to `UDQmode'.  Similarly the fixed-point
+accumulator type `short accum' corresponds to `HAmode';
+`unsigned short accum' to `UHAmode'; `accum' to `SAmode';
+`unsigned accum' to `USAmode'; `long accum' to `DAmode';
+`unsigned long accum' to `UDAmode'; `long long accum' to `TAmode'; and
+`unsigned long long accum' to `UTAmode'.
+
+4.4.1 Arithmetic functions
+--------------------------
+
+ -- Runtime Function: short fract __addqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __addhq3 (fract A, fract B)
+ -- Runtime Function: long fract __addsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __adddq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __adduqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __adduhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __addusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __addudq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __addha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __addsa3 (accum A, accum B)
+ -- Runtime Function: long accum __addda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __addta3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __adduha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __addusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __adduda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __adduta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the sum of A and B.
+
+ -- Runtime Function: short fract __ssaddqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssaddhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssaddsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssadddq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssaddha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssaddsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssaddda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssaddta3 (long long accum A,
+          long long accum B)
+     These functions return the sum of A and B with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usadduqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usadduhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usaddusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usaddudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usadduha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usaddusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usadduda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usadduta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the sum of A and B with unsigned saturation.
+
+ -- Runtime Function: short fract __subqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __subhq3 (fract A, fract B)
+ -- Runtime Function: long fract __subsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __subdq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __subuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __subuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __subusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __subudq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __subha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __subsa3 (accum A, accum B)
+ -- Runtime Function: long accum __subda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __subta3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __subuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __subusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __subuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __subuta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the difference of A and B; that is, `A - B'.
+
+ -- Runtime Function: short fract __sssubqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __sssubhq3 (fract A, fract B)
+ -- Runtime Function: long fract __sssubsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __sssubdq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __sssubha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __sssubsa3 (accum A, accum B)
+ -- Runtime Function: long accum __sssubda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __sssubta3 (long long accum A,
+          long long accum B)
+     These functions return the difference of A and B with signed
+     saturation;  that is, `A - B'.
+
+ -- Runtime Function: unsigned short fract __ussubuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __ussubuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __ussubusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __ussubudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __ussubuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __ussubusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __ussubuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __ussubuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the difference of A and B with unsigned
+     saturation;  that is, `A - B'.
+
+ -- Runtime Function: short fract __mulqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __mulhq3 (fract A, fract B)
+ -- Runtime Function: long fract __mulsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __muldq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: unsigned short fract __muluqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __muluhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __mulusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __muludq3 (unsigned long
+          long fract A, unsigned long long fract B)
+ -- Runtime Function: short accum __mulha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __mulsa3 (accum A, accum B)
+ -- Runtime Function: long accum __mulda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __multa3 (long long accum A, long
+          long accum B)
+ -- Runtime Function: unsigned short accum __muluha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __mulusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __muluda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __muluta3 (unsigned long
+          long accum A, unsigned long long accum B)
+     These functions return the product of A and B.
+
+ -- Runtime Function: short fract __ssmulqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssmulhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssmulsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssmuldq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssmulha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssmulsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssmulda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssmulta3 (long long accum A,
+          long long accum B)
+     These functions return the product of A and B with signed
+     saturation.
+
+ -- Runtime Function: unsigned short fract __usmuluqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usmuluhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usmulusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usmuludq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usmuluha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usmulusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usmuluda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usmuluta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the product of A and B with unsigned
+     saturation.
+
+ -- Runtime Function: short fract __divqq3 (short fract A, short fract
+          B)
+ -- Runtime Function: fract __divhq3 (fract A, fract B)
+ -- Runtime Function: long fract __divsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __divdq3 (long long fract A, long
+          long fract B)
+ -- Runtime Function: short accum __divha3 (short accum A, short accum
+          B)
+ -- Runtime Function: accum __divsa3 (accum A, accum B)
+ -- Runtime Function: long accum __divda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __divta3 (long long accum A, long
+          long accum B)
+     These functions return the quotient of the signed division of A
+     and B.
+
+ -- Runtime Function: unsigned short fract __udivuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __udivuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __udivusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __udivudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __udivuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __udivusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __udivuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __udivuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the quotient of the unsigned division of A
+     and B.
+
+ -- Runtime Function: short fract __ssdivqq3 (short fract A, short
+          fract B)
+ -- Runtime Function: fract __ssdivhq3 (fract A, fract B)
+ -- Runtime Function: long fract __ssdivsq3 (long fract A, long fract B)
+ -- Runtime Function: long long fract __ssdivdq3 (long long fract A,
+          long long fract B)
+ -- Runtime Function: short accum __ssdivha3 (short accum A, short
+          accum B)
+ -- Runtime Function: accum __ssdivsa3 (accum A, accum B)
+ -- Runtime Function: long accum __ssdivda3 (long accum A, long accum B)
+ -- Runtime Function: long long accum __ssdivta3 (long long accum A,
+          long long accum B)
+     These functions return the quotient of the signed division of A
+     and B with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usdivuqq3 (unsigned short
+          fract A, unsigned short fract B)
+ -- Runtime Function: unsigned fract __usdivuhq3 (unsigned fract A,
+          unsigned fract B)
+ -- Runtime Function: unsigned long fract __usdivusq3 (unsigned long
+          fract A, unsigned long fract B)
+ -- Runtime Function: unsigned long long fract __usdivudq3 (unsigned
+          long long fract A, unsigned long long fract B)
+ -- Runtime Function: unsigned short accum __usdivuha3 (unsigned short
+          accum A, unsigned short accum B)
+ -- Runtime Function: unsigned accum __usdivusa3 (unsigned accum A,
+          unsigned accum B)
+ -- Runtime Function: unsigned long accum __usdivuda3 (unsigned long
+          accum A, unsigned long accum B)
+ -- Runtime Function: unsigned long long accum __usdivuta3 (unsigned
+          long long accum A, unsigned long long accum B)
+     These functions return the quotient of the unsigned division of A
+     and B with unsigned saturation.
+
+ -- Runtime Function: short fract __negqq2 (short fract A)
+ -- Runtime Function: fract __neghq2 (fract A)
+ -- Runtime Function: long fract __negsq2 (long fract A)
+ -- Runtime Function: long long fract __negdq2 (long long fract A)
+ -- Runtime Function: unsigned short fract __neguqq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __neguhq2 (unsigned fract A)
+ -- Runtime Function: unsigned long fract __negusq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __negudq2 (unsigned long
+          long fract A)
+ -- Runtime Function: short accum __negha2 (short accum A)
+ -- Runtime Function: accum __negsa2 (accum A)
+ -- Runtime Function: long accum __negda2 (long accum A)
+ -- Runtime Function: long long accum __negta2 (long long accum A)
+ -- Runtime Function: unsigned short accum __neguha2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned accum __negusa2 (unsigned accum A)
+ -- Runtime Function: unsigned long accum __neguda2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __neguta2 (unsigned long
+          long accum A)
+     These functions return the negation of A.
+
+ -- Runtime Function: short fract __ssnegqq2 (short fract A)
+ -- Runtime Function: fract __ssneghq2 (fract A)
+ -- Runtime Function: long fract __ssnegsq2 (long fract A)
+ -- Runtime Function: long long fract __ssnegdq2 (long long fract A)
+ -- Runtime Function: short accum __ssnegha2 (short accum A)
+ -- Runtime Function: accum __ssnegsa2 (accum A)
+ -- Runtime Function: long accum __ssnegda2 (long accum A)
+ -- Runtime Function: long long accum __ssnegta2 (long long accum A)
+     These functions return the negation of A with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usneguqq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __usneguhq2 (unsigned fract A)
+ -- Runtime Function: unsigned long fract __usnegusq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __usnegudq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned short accum __usneguha2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned accum __usnegusa2 (unsigned accum A)
+ -- Runtime Function: unsigned long accum __usneguda2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __usneguta2 (unsigned
+          long long accum A)
+     These functions return the negation of A with unsigned saturation.
+
+ -- Runtime Function: short fract __ashlqq3 (short fract A, int B)
+ -- Runtime Function: fract __ashlhq3 (fract A, int B)
+ -- Runtime Function: long fract __ashlsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ashldq3 (long long fract A, int
+          B)
+ -- Runtime Function: unsigned short fract __ashluqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __ashluhq3 (unsigned fract A, int
+          B)
+ -- Runtime Function: unsigned long fract __ashlusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __ashludq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: short accum __ashlha3 (short accum A, int B)
+ -- Runtime Function: accum __ashlsa3 (accum A, int B)
+ -- Runtime Function: long accum __ashlda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ashlta3 (long long accum A, int
+          B)
+ -- Runtime Function: unsigned short accum __ashluha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __ashlusa3 (unsigned accum A, int
+          B)
+ -- Runtime Function: unsigned long accum __ashluda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __ashluta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of shifting A left by B bits.
+
+ -- Runtime Function: short fract __ashrqq3 (short fract A, int B)
+ -- Runtime Function: fract __ashrhq3 (fract A, int B)
+ -- Runtime Function: long fract __ashrsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ashrdq3 (long long fract A, int
+          B)
+ -- Runtime Function: short accum __ashrha3 (short accum A, int B)
+ -- Runtime Function: accum __ashrsa3 (accum A, int B)
+ -- Runtime Function: long accum __ashrda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ashrta3 (long long accum A, int
+          B)
+     These functions return the result of arithmetically shifting A
+     right by B bits.
+
+ -- Runtime Function: unsigned short fract __lshruqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __lshruhq3 (unsigned fract A, int
+          B)
+ -- Runtime Function: unsigned long fract __lshrusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __lshrudq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: unsigned short accum __lshruha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __lshrusa3 (unsigned accum A, int
+          B)
+ -- Runtime Function: unsigned long accum __lshruda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __lshruta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of logically shifting A right by
+     B bits.
+
+ -- Runtime Function: fract __ssashlhq3 (fract A, int B)
+ -- Runtime Function: long fract __ssashlsq3 (long fract A, int B)
+ -- Runtime Function: long long fract __ssashldq3 (long long fract A,
+          int B)
+ -- Runtime Function: short accum __ssashlha3 (short accum A, int B)
+ -- Runtime Function: accum __ssashlsa3 (accum A, int B)
+ -- Runtime Function: long accum __ssashlda3 (long accum A, int B)
+ -- Runtime Function: long long accum __ssashlta3 (long long accum A,
+          int B)
+     These functions return the result of shifting A left by B bits
+     with signed saturation.
+
+ -- Runtime Function: unsigned short fract __usashluqq3 (unsigned short
+          fract A, int B)
+ -- Runtime Function: unsigned fract __usashluhq3 (unsigned fract A,
+          int B)
+ -- Runtime Function: unsigned long fract __usashlusq3 (unsigned long
+          fract A, int B)
+ -- Runtime Function: unsigned long long fract __usashludq3 (unsigned
+          long long fract A, int B)
+ -- Runtime Function: unsigned short accum __usashluha3 (unsigned short
+          accum A, int B)
+ -- Runtime Function: unsigned accum __usashlusa3 (unsigned accum A,
+          int B)
+ -- Runtime Function: unsigned long accum __usashluda3 (unsigned long
+          accum A, int B)
+ -- Runtime Function: unsigned long long accum __usashluta3 (unsigned
+          long long accum A, int B)
+     These functions return the result of shifting A left by B bits
+     with unsigned saturation.
+
+4.4.2 Comparison functions
+--------------------------
+
+The following functions implement fixed-point comparisons.  These
+functions implement a low-level compare, upon which the higher level
+comparison operators (such as less than and greater than or equal to)
+can be constructed.  The returned values lie in the range zero to two,
+to allow the high-level operators to be implemented by testing the
+returned result using either signed or unsigned comparison.
+
+ -- Runtime Function: int __cmpqq2 (short fract A, short fract B)
+ -- Runtime Function: int __cmphq2 (fract A, fract B)
+ -- Runtime Function: int __cmpsq2 (long fract A, long fract B)
+ -- Runtime Function: int __cmpdq2 (long long fract A, long long fract
+          B)
+ -- Runtime Function: int __cmpuqq2 (unsigned short fract A, unsigned
+          short fract B)
+ -- Runtime Function: int __cmpuhq2 (unsigned fract A, unsigned fract B)
+ -- Runtime Function: int __cmpusq2 (unsigned long fract A, unsigned
+          long fract B)
+ -- Runtime Function: int __cmpudq2 (unsigned long long fract A,
+          unsigned long long fract B)
+ -- Runtime Function: int __cmpha2 (short accum A, short accum B)
+ -- Runtime Function: int __cmpsa2 (accum A, accum B)
+ -- Runtime Function: int __cmpda2 (long accum A, long accum B)
+ -- Runtime Function: int __cmpta2 (long long accum A, long long accum
+          B)
+ -- Runtime Function: int __cmpuha2 (unsigned short accum A, unsigned
+          short accum B)
+ -- Runtime Function: int __cmpusa2 (unsigned accum A, unsigned accum B)
+ -- Runtime Function: int __cmpuda2 (unsigned long accum A, unsigned
+          long accum B)
+ -- Runtime Function: int __cmputa2 (unsigned long long accum A,
+          unsigned long long accum B)
+     These functions perform a signed or unsigned comparison of A and B
+     (depending on the selected machine mode).  If A is less than B,
+     they return 0; if A is greater than B, they return 2; and if A and
+     B are equal they return 1.
+
+4.4.3 Conversion functions
+--------------------------
+
+ -- Runtime Function: fract __fractqqhq2 (short fract A)
+ -- Runtime Function: long fract __fractqqsq2 (short fract A)
+ -- Runtime Function: long long fract __fractqqdq2 (short fract A)
+ -- Runtime Function: short accum __fractqqha (short fract A)
+ -- Runtime Function: accum __fractqqsa (short fract A)
+ -- Runtime Function: long accum __fractqqda (short fract A)
+ -- Runtime Function: long long accum __fractqqta (short fract A)
+ -- Runtime Function: unsigned short fract __fractqquqq (short fract A)
+ -- Runtime Function: unsigned fract __fractqquhq (short fract A)
+ -- Runtime Function: unsigned long fract __fractqqusq (short fract A)
+ -- Runtime Function: unsigned long long fract __fractqqudq (short
+          fract A)
+ -- Runtime Function: unsigned short accum __fractqquha (short fract A)
+ -- Runtime Function: unsigned accum __fractqqusa (short fract A)
+ -- Runtime Function: unsigned long accum __fractqquda (short fract A)
+ -- Runtime Function: unsigned long long accum __fractqquta (short
+          fract A)
+ -- Runtime Function: signed char __fractqqqi (short fract A)
+ -- Runtime Function: short __fractqqhi (short fract A)
+ -- Runtime Function: int __fractqqsi (short fract A)
+ -- Runtime Function: long __fractqqdi (short fract A)
+ -- Runtime Function: long long __fractqqti (short fract A)
+ -- Runtime Function: float __fractqqsf (short fract A)
+ -- Runtime Function: double __fractqqdf (short fract A)
+ -- Runtime Function: short fract __fracthqqq2 (fract A)
+ -- Runtime Function: long fract __fracthqsq2 (fract A)
+ -- Runtime Function: long long fract __fracthqdq2 (fract A)
+ -- Runtime Function: short accum __fracthqha (fract A)
+ -- Runtime Function: accum __fracthqsa (fract A)
+ -- Runtime Function: long accum __fracthqda (fract A)
+ -- Runtime Function: long long accum __fracthqta (fract A)
+ -- Runtime Function: unsigned short fract __fracthquqq (fract A)
+ -- Runtime Function: unsigned fract __fracthquhq (fract A)
+ -- Runtime Function: unsigned long fract __fracthqusq (fract A)
+ -- Runtime Function: unsigned long long fract __fracthqudq (fract A)
+ -- Runtime Function: unsigned short accum __fracthquha (fract A)
+ -- Runtime Function: unsigned accum __fracthqusa (fract A)
+ -- Runtime Function: unsigned long accum __fracthquda (fract A)
+ -- Runtime Function: unsigned long long accum __fracthquta (fract A)
+ -- Runtime Function: signed char __fracthqqi (fract A)
+ -- Runtime Function: short __fracthqhi (fract A)
+ -- Runtime Function: int __fracthqsi (fract A)
+ -- Runtime Function: long __fracthqdi (fract A)
+ -- Runtime Function: long long __fracthqti (fract A)
+ -- Runtime Function: float __fracthqsf (fract A)
+ -- Runtime Function: double __fracthqdf (fract A)
+ -- Runtime Function: short fract __fractsqqq2 (long fract A)
+ -- Runtime Function: fract __fractsqhq2 (long fract A)
+ -- Runtime Function: long long fract __fractsqdq2 (long fract A)
+ -- Runtime Function: short accum __fractsqha (long fract A)
+ -- Runtime Function: accum __fractsqsa (long fract A)
+ -- Runtime Function: long accum __fractsqda (long fract A)
+ -- Runtime Function: long long accum __fractsqta (long fract A)
+ -- Runtime Function: unsigned short fract __fractsquqq (long fract A)
+ -- Runtime Function: unsigned fract __fractsquhq (long fract A)
+ -- Runtime Function: unsigned long fract __fractsqusq (long fract A)
+ -- Runtime Function: unsigned long long fract __fractsqudq (long fract
+          A)
+ -- Runtime Function: unsigned short accum __fractsquha (long fract A)
+ -- Runtime Function: unsigned accum __fractsqusa (long fract A)
+ -- Runtime Function: unsigned long accum __fractsquda (long fract A)
+ -- Runtime Function: unsigned long long accum __fractsquta (long fract
+          A)
+ -- Runtime Function: signed char __fractsqqi (long fract A)
+ -- Runtime Function: short __fractsqhi (long fract A)
+ -- Runtime Function: int __fractsqsi (long fract A)
+ -- Runtime Function: long __fractsqdi (long fract A)
+ -- Runtime Function: long long __fractsqti (long fract A)
+ -- Runtime Function: float __fractsqsf (long fract A)
+ -- Runtime Function: double __fractsqdf (long fract A)
+ -- Runtime Function: short fract __fractdqqq2 (long long fract A)
+ -- Runtime Function: fract __fractdqhq2 (long long fract A)
+ -- Runtime Function: long fract __fractdqsq2 (long long fract A)
+ -- Runtime Function: short accum __fractdqha (long long fract A)
+ -- Runtime Function: accum __fractdqsa (long long fract A)
+ -- Runtime Function: long accum __fractdqda (long long fract A)
+ -- Runtime Function: long long accum __fractdqta (long long fract A)
+ -- Runtime Function: unsigned short fract __fractdquqq (long long
+          fract A)
+ -- Runtime Function: unsigned fract __fractdquhq (long long fract A)
+ -- Runtime Function: unsigned long fract __fractdqusq (long long fract
+          A)
+ -- Runtime Function: unsigned long long fract __fractdqudq (long long
+          fract A)
+ -- Runtime Function: unsigned short accum __fractdquha (long long
+          fract A)
+ -- Runtime Function: unsigned accum __fractdqusa (long long fract A)
+ -- Runtime Function: unsigned long accum __fractdquda (long long fract
+          A)
+ -- Runtime Function: unsigned long long accum __fractdquta (long long
+          fract A)
+ -- Runtime Function: signed char __fractdqqi (long long fract A)
+ -- Runtime Function: short __fractdqhi (long long fract A)
+ -- Runtime Function: int __fractdqsi (long long fract A)
+ -- Runtime Function: long __fractdqdi (long long fract A)
+ -- Runtime Function: long long __fractdqti (long long fract A)
+ -- Runtime Function: float __fractdqsf (long long fract A)
+ -- Runtime Function: double __fractdqdf (long long fract A)
+ -- Runtime Function: short fract __fracthaqq (short accum A)
+ -- Runtime Function: fract __fracthahq (short accum A)
+ -- Runtime Function: long fract __fracthasq (short accum A)
+ -- Runtime Function: long long fract __fracthadq (short accum A)
+ -- Runtime Function: accum __fracthasa2 (short accum A)
+ -- Runtime Function: long accum __fracthada2 (short accum A)
+ -- Runtime Function: long long accum __fracthata2 (short accum A)
+ -- Runtime Function: unsigned short fract __fracthauqq (short accum A)
+ -- Runtime Function: unsigned fract __fracthauhq (short accum A)
+ -- Runtime Function: unsigned long fract __fracthausq (short accum A)
+ -- Runtime Function: unsigned long long fract __fracthaudq (short
+          accum A)
+ -- Runtime Function: unsigned short accum __fracthauha (short accum A)
+ -- Runtime Function: unsigned accum __fracthausa (short accum A)
+ -- Runtime Function: unsigned long accum __fracthauda (short accum A)
+ -- Runtime Function: unsigned long long accum __fracthauta (short
+          accum A)
+ -- Runtime Function: signed char __fracthaqi (short accum A)
+ -- Runtime Function: short __fracthahi (short accum A)
+ -- Runtime Function: int __fracthasi (short accum A)
+ -- Runtime Function: long __fracthadi (short accum A)
+ -- Runtime Function: long long __fracthati (short accum A)
+ -- Runtime Function: float __fracthasf (short accum A)
+ -- Runtime Function: double __fracthadf (short accum A)
+ -- Runtime Function: short fract __fractsaqq (accum A)
+ -- Runtime Function: fract __fractsahq (accum A)
+ -- Runtime Function: long fract __fractsasq (accum A)
+ -- Runtime Function: long long fract __fractsadq (accum A)
+ -- Runtime Function: short accum __fractsaha2 (accum A)
+ -- Runtime Function: long accum __fractsada2 (accum A)
+ -- Runtime Function: long long accum __fractsata2 (accum A)
+ -- Runtime Function: unsigned short fract __fractsauqq (accum A)
+ -- Runtime Function: unsigned fract __fractsauhq (accum A)
+ -- Runtime Function: unsigned long fract __fractsausq (accum A)
+ -- Runtime Function: unsigned long long fract __fractsaudq (accum A)
+ -- Runtime Function: unsigned short accum __fractsauha (accum A)
+ -- Runtime Function: unsigned accum __fractsausa (accum A)
+ -- Runtime Function: unsigned long accum __fractsauda (accum A)
+ -- Runtime Function: unsigned long long accum __fractsauta (accum A)
+ -- Runtime Function: signed char __fractsaqi (accum A)
+ -- Runtime Function: short __fractsahi (accum A)
+ -- Runtime Function: int __fractsasi (accum A)
+ -- Runtime Function: long __fractsadi (accum A)
+ -- Runtime Function: long long __fractsati (accum A)
+ -- Runtime Function: float __fractsasf (accum A)
+ -- Runtime Function: double __fractsadf (accum A)
+ -- Runtime Function: short fract __fractdaqq (long accum A)
+ -- Runtime Function: fract __fractdahq (long accum A)
+ -- Runtime Function: long fract __fractdasq (long accum A)
+ -- Runtime Function: long long fract __fractdadq (long accum A)
+ -- Runtime Function: short accum __fractdaha2 (long accum A)
+ -- Runtime Function: accum __fractdasa2 (long accum A)
+ -- Runtime Function: long long accum __fractdata2 (long accum A)
+ -- Runtime Function: unsigned short fract __fractdauqq (long accum A)
+ -- Runtime Function: unsigned fract __fractdauhq (long accum A)
+ -- Runtime Function: unsigned long fract __fractdausq (long accum A)
+ -- Runtime Function: unsigned long long fract __fractdaudq (long accum
+          A)
+ -- Runtime Function: unsigned short accum __fractdauha (long accum A)
+ -- Runtime Function: unsigned accum __fractdausa (long accum A)
+ -- Runtime Function: unsigned long accum __fractdauda (long accum A)
+ -- Runtime Function: unsigned long long accum __fractdauta (long accum
+          A)
+ -- Runtime Function: signed char __fractdaqi (long accum A)
+ -- Runtime Function: short __fractdahi (long accum A)
+ -- Runtime Function: int __fractdasi (long accum A)
+ -- Runtime Function: long __fractdadi (long accum A)
+ -- Runtime Function: long long __fractdati (long accum A)
+ -- Runtime Function: float __fractdasf (long accum A)
+ -- Runtime Function: double __fractdadf (long accum A)
+ -- Runtime Function: short fract __fracttaqq (long long accum A)
+ -- Runtime Function: fract __fracttahq (long long accum A)
+ -- Runtime Function: long fract __fracttasq (long long accum A)
+ -- Runtime Function: long long fract __fracttadq (long long accum A)
+ -- Runtime Function: short accum __fracttaha2 (long long accum A)
+ -- Runtime Function: accum __fracttasa2 (long long accum A)
+ -- Runtime Function: long accum __fracttada2 (long long accum A)
+ -- Runtime Function: unsigned short fract __fracttauqq (long long
+          accum A)
+ -- Runtime Function: unsigned fract __fracttauhq (long long accum A)
+ -- Runtime Function: unsigned long fract __fracttausq (long long accum
+          A)
+ -- Runtime Function: unsigned long long fract __fracttaudq (long long
+          accum A)
+ -- Runtime Function: unsigned short accum __fracttauha (long long
+          accum A)
+ -- Runtime Function: unsigned accum __fracttausa (long long accum A)
+ -- Runtime Function: unsigned long accum __fracttauda (long long accum
+          A)
+ -- Runtime Function: unsigned long long accum __fracttauta (long long
+          accum A)
+ -- Runtime Function: signed char __fracttaqi (long long accum A)
+ -- Runtime Function: short __fracttahi (long long accum A)
+ -- Runtime Function: int __fracttasi (long long accum A)
+ -- Runtime Function: long __fracttadi (long long accum A)
+ -- Runtime Function: long long __fracttati (long long accum A)
+ -- Runtime Function: float __fracttasf (long long accum A)
+ -- Runtime Function: double __fracttadf (long long accum A)
+ -- Runtime Function: short fract __fractuqqqq (unsigned short fract A)
+ -- Runtime Function: fract __fractuqqhq (unsigned short fract A)
+ -- Runtime Function: long fract __fractuqqsq (unsigned short fract A)
+ -- Runtime Function: long long fract __fractuqqdq (unsigned short
+          fract A)
+ -- Runtime Function: short accum __fractuqqha (unsigned short fract A)
+ -- Runtime Function: accum __fractuqqsa (unsigned short fract A)
+ -- Runtime Function: long accum __fractuqqda (unsigned short fract A)
+ -- Runtime Function: long long accum __fractuqqta (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __fractuqquhq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long fract __fractuqqusq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long fract __fractuqqudq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned short accum __fractuqquha (unsigned
+          short fract A)
+ -- Runtime Function: unsigned accum __fractuqqusa (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long accum __fractuqquda (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long long accum __fractuqquta (unsigned
+          short fract A)
+ -- Runtime Function: signed char __fractuqqqi (unsigned short fract A)
+ -- Runtime Function: short __fractuqqhi (unsigned short fract A)
+ -- Runtime Function: int __fractuqqsi (unsigned short fract A)
+ -- Runtime Function: long __fractuqqdi (unsigned short fract A)
+ -- Runtime Function: long long __fractuqqti (unsigned short fract A)
+ -- Runtime Function: float __fractuqqsf (unsigned short fract A)
+ -- Runtime Function: double __fractuqqdf (unsigned short fract A)
+ -- Runtime Function: short fract __fractuhqqq (unsigned fract A)
+ -- Runtime Function: fract __fractuhqhq (unsigned fract A)
+ -- Runtime Function: long fract __fractuhqsq (unsigned fract A)
+ -- Runtime Function: long long fract __fractuhqdq (unsigned fract A)
+ -- Runtime Function: short accum __fractuhqha (unsigned fract A)
+ -- Runtime Function: accum __fractuhqsa (unsigned fract A)
+ -- Runtime Function: long accum __fractuhqda (unsigned fract A)
+ -- Runtime Function: long long accum __fractuhqta (unsigned fract A)
+ -- Runtime Function: unsigned short fract __fractuhquqq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long fract __fractuhqusq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long fract __fractuhqudq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned short accum __fractuhquha (unsigned
+          fract A)
+ -- Runtime Function: unsigned accum __fractuhqusa (unsigned fract A)
+ -- Runtime Function: unsigned long accum __fractuhquda (unsigned fract
+          A)
+ -- Runtime Function: unsigned long long accum __fractuhquta (unsigned
+          fract A)
+ -- Runtime Function: signed char __fractuhqqi (unsigned fract A)
+ -- Runtime Function: short __fractuhqhi (unsigned fract A)
+ -- Runtime Function: int __fractuhqsi (unsigned fract A)
+ -- Runtime Function: long __fractuhqdi (unsigned fract A)
+ -- Runtime Function: long long __fractuhqti (unsigned fract A)
+ -- Runtime Function: float __fractuhqsf (unsigned fract A)
+ -- Runtime Function: double __fractuhqdf (unsigned fract A)
+ -- Runtime Function: short fract __fractusqqq (unsigned long fract A)
+ -- Runtime Function: fract __fractusqhq (unsigned long fract A)
+ -- Runtime Function: long fract __fractusqsq (unsigned long fract A)
+ -- Runtime Function: long long fract __fractusqdq (unsigned long fract
+          A)
+ -- Runtime Function: short accum __fractusqha (unsigned long fract A)
+ -- Runtime Function: accum __fractusqsa (unsigned long fract A)
+ -- Runtime Function: long accum __fractusqda (unsigned long fract A)
+ -- Runtime Function: long long accum __fractusqta (unsigned long fract
+          A)
+ -- Runtime Function: unsigned short fract __fractusquqq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned fract __fractusquhq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __fractusqudq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned short accum __fractusquha (unsigned long
+          fract A)
+ -- Runtime Function: unsigned accum __fractusqusa (unsigned long fract
+          A)
+ -- Runtime Function: unsigned long accum __fractusquda (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long accum __fractusquta (unsigned
+          long fract A)
+ -- Runtime Function: signed char __fractusqqi (unsigned long fract A)
+ -- Runtime Function: short __fractusqhi (unsigned long fract A)
+ -- Runtime Function: int __fractusqsi (unsigned long fract A)
+ -- Runtime Function: long __fractusqdi (unsigned long fract A)
+ -- Runtime Function: long long __fractusqti (unsigned long fract A)
+ -- Runtime Function: float __fractusqsf (unsigned long fract A)
+ -- Runtime Function: double __fractusqdf (unsigned long fract A)
+ -- Runtime Function: short fract __fractudqqq (unsigned long long
+          fract A)
+ -- Runtime Function: fract __fractudqhq (unsigned long long fract A)
+ -- Runtime Function: long fract __fractudqsq (unsigned long long fract
+          A)
+ -- Runtime Function: long long fract __fractudqdq (unsigned long long
+          fract A)
+ -- Runtime Function: short accum __fractudqha (unsigned long long
+          fract A)
+ -- Runtime Function: accum __fractudqsa (unsigned long long fract A)
+ -- Runtime Function: long accum __fractudqda (unsigned long long fract
+          A)
+ -- Runtime Function: long long accum __fractudqta (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned short fract __fractudquqq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned fract __fractudquhq2 (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long fract __fractudqusq2 (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned short accum __fractudquha (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned accum __fractudqusa (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long accum __fractudquda (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long long accum __fractudquta (unsigned
+          long long fract A)
+ -- Runtime Function: signed char __fractudqqi (unsigned long long
+          fract A)
+ -- Runtime Function: short __fractudqhi (unsigned long long fract A)
+ -- Runtime Function: int __fractudqsi (unsigned long long fract A)
+ -- Runtime Function: long __fractudqdi (unsigned long long fract A)
+ -- Runtime Function: long long __fractudqti (unsigned long long fract
+          A)
+ -- Runtime Function: float __fractudqsf (unsigned long long fract A)
+ -- Runtime Function: double __fractudqdf (unsigned long long fract A)
+ -- Runtime Function: short fract __fractuhaqq (unsigned short accum A)
+ -- Runtime Function: fract __fractuhahq (unsigned short accum A)
+ -- Runtime Function: long fract __fractuhasq (unsigned short accum A)
+ -- Runtime Function: long long fract __fractuhadq (unsigned short
+          accum A)
+ -- Runtime Function: short accum __fractuhaha (unsigned short accum A)
+ -- Runtime Function: accum __fractuhasa (unsigned short accum A)
+ -- Runtime Function: long accum __fractuhada (unsigned short accum A)
+ -- Runtime Function: long long accum __fractuhata (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short fract __fractuhauqq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned fract __fractuhauhq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long fract __fractuhausq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long long fract __fractuhaudq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned accum __fractuhausa2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long accum __fractuhauda2 (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long accum __fractuhauta2 (unsigned
+          short accum A)
+ -- Runtime Function: signed char __fractuhaqi (unsigned short accum A)
+ -- Runtime Function: short __fractuhahi (unsigned short accum A)
+ -- Runtime Function: int __fractuhasi (unsigned short accum A)
+ -- Runtime Function: long __fractuhadi (unsigned short accum A)
+ -- Runtime Function: long long __fractuhati (unsigned short accum A)
+ -- Runtime Function: float __fractuhasf (unsigned short accum A)
+ -- Runtime Function: double __fractuhadf (unsigned short accum A)
+ -- Runtime Function: short fract __fractusaqq (unsigned accum A)
+ -- Runtime Function: fract __fractusahq (unsigned accum A)
+ -- Runtime Function: long fract __fractusasq (unsigned accum A)
+ -- Runtime Function: long long fract __fractusadq (unsigned accum A)
+ -- Runtime Function: short accum __fractusaha (unsigned accum A)
+ -- Runtime Function: accum __fractusasa (unsigned accum A)
+ -- Runtime Function: long accum __fractusada (unsigned accum A)
+ -- Runtime Function: long long accum __fractusata (unsigned accum A)
+ -- Runtime Function: unsigned short fract __fractusauqq (unsigned
+          accum A)
+ -- Runtime Function: unsigned fract __fractusauhq (unsigned accum A)
+ -- Runtime Function: unsigned long fract __fractusausq (unsigned accum
+          A)
+ -- Runtime Function: unsigned long long fract __fractusaudq (unsigned
+          accum A)
+ -- Runtime Function: unsigned short accum __fractusauha2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long accum __fractusauda2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long accum __fractusauta2 (unsigned
+          accum A)
+ -- Runtime Function: signed char __fractusaqi (unsigned accum A)
+ -- Runtime Function: short __fractusahi (unsigned accum A)
+ -- Runtime Function: int __fractusasi (unsigned accum A)
+ -- Runtime Function: long __fractusadi (unsigned accum A)
+ -- Runtime Function: long long __fractusati (unsigned accum A)
+ -- Runtime Function: float __fractusasf (unsigned accum A)
+ -- Runtime Function: double __fractusadf (unsigned accum A)
+ -- Runtime Function: short fract __fractudaqq (unsigned long accum A)
+ -- Runtime Function: fract __fractudahq (unsigned long accum A)
+ -- Runtime Function: long fract __fractudasq (unsigned long accum A)
+ -- Runtime Function: long long fract __fractudadq (unsigned long accum
+          A)
+ -- Runtime Function: short accum __fractudaha (unsigned long accum A)
+ -- Runtime Function: accum __fractudasa (unsigned long accum A)
+ -- Runtime Function: long accum __fractudada (unsigned long accum A)
+ -- Runtime Function: long long accum __fractudata (unsigned long accum
+          A)
+ -- Runtime Function: unsigned short fract __fractudauqq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned fract __fractudauhq (unsigned long accum
+          A)
+ -- Runtime Function: unsigned long fract __fractudausq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long fract __fractudaudq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned short accum __fractudauha2 (unsigned
+          long accum A)
+ -- Runtime Function: unsigned accum __fractudausa2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __fractudauta2 (unsigned
+          long accum A)
+ -- Runtime Function: signed char __fractudaqi (unsigned long accum A)
+ -- Runtime Function: short __fractudahi (unsigned long accum A)
+ -- Runtime Function: int __fractudasi (unsigned long accum A)
+ -- Runtime Function: long __fractudadi (unsigned long accum A)
+ -- Runtime Function: long long __fractudati (unsigned long accum A)
+ -- Runtime Function: float __fractudasf (unsigned long accum A)
+ -- Runtime Function: double __fractudadf (unsigned long accum A)
+ -- Runtime Function: short fract __fractutaqq (unsigned long long
+          accum A)
+ -- Runtime Function: fract __fractutahq (unsigned long long accum A)
+ -- Runtime Function: long fract __fractutasq (unsigned long long accum
+          A)
+ -- Runtime Function: long long fract __fractutadq (unsigned long long
+          accum A)
+ -- Runtime Function: short accum __fractutaha (unsigned long long
+          accum A)
+ -- Runtime Function: accum __fractutasa (unsigned long long accum A)
+ -- Runtime Function: long accum __fractutada (unsigned long long accum
+          A)
+ -- Runtime Function: long long accum __fractutata (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned short fract __fractutauqq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned fract __fractutauhq (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long fract __fractutausq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long long fract __fractutaudq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned short accum __fractutauha2 (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned accum __fractutausa2 (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long accum __fractutauda2 (unsigned long
+          long accum A)
+ -- Runtime Function: signed char __fractutaqi (unsigned long long
+          accum A)
+ -- Runtime Function: short __fractutahi (unsigned long long accum A)
+ -- Runtime Function: int __fractutasi (unsigned long long accum A)
+ -- Runtime Function: long __fractutadi (unsigned long long accum A)
+ -- Runtime Function: long long __fractutati (unsigned long long accum
+          A)
+ -- Runtime Function: float __fractutasf (unsigned long long accum A)
+ -- Runtime Function: double __fractutadf (unsigned long long accum A)
+ -- Runtime Function: short fract __fractqiqq (signed char A)
+ -- Runtime Function: fract __fractqihq (signed char A)
+ -- Runtime Function: long fract __fractqisq (signed char A)
+ -- Runtime Function: long long fract __fractqidq (signed char A)
+ -- Runtime Function: short accum __fractqiha (signed char A)
+ -- Runtime Function: accum __fractqisa (signed char A)
+ -- Runtime Function: long accum __fractqida (signed char A)
+ -- Runtime Function: long long accum __fractqita (signed char A)
+ -- Runtime Function: unsigned short fract __fractqiuqq (signed char A)
+ -- Runtime Function: unsigned fract __fractqiuhq (signed char A)
+ -- Runtime Function: unsigned long fract __fractqiusq (signed char A)
+ -- Runtime Function: unsigned long long fract __fractqiudq (signed
+          char A)
+ -- Runtime Function: unsigned short accum __fractqiuha (signed char A)
+ -- Runtime Function: unsigned accum __fractqiusa (signed char A)
+ -- Runtime Function: unsigned long accum __fractqiuda (signed char A)
+ -- Runtime Function: unsigned long long accum __fractqiuta (signed
+          char A)
+ -- Runtime Function: short fract __fracthiqq (short A)
+ -- Runtime Function: fract __fracthihq (short A)
+ -- Runtime Function: long fract __fracthisq (short A)
+ -- Runtime Function: long long fract __fracthidq (short A)
+ -- Runtime Function: short accum __fracthiha (short A)
+ -- Runtime Function: accum __fracthisa (short A)
+ -- Runtime Function: long accum __fracthida (short A)
+ -- Runtime Function: long long accum __fracthita (short A)
+ -- Runtime Function: unsigned short fract __fracthiuqq (short A)
+ -- Runtime Function: unsigned fract __fracthiuhq (short A)
+ -- Runtime Function: unsigned long fract __fracthiusq (short A)
+ -- Runtime Function: unsigned long long fract __fracthiudq (short A)
+ -- Runtime Function: unsigned short accum __fracthiuha (short A)
+ -- Runtime Function: unsigned accum __fracthiusa (short A)
+ -- Runtime Function: unsigned long accum __fracthiuda (short A)
+ -- Runtime Function: unsigned long long accum __fracthiuta (short A)
+ -- Runtime Function: short fract __fractsiqq (int A)
+ -- Runtime Function: fract __fractsihq (int A)
+ -- Runtime Function: long fract __fractsisq (int A)
+ -- Runtime Function: long long fract __fractsidq (int A)
+ -- Runtime Function: short accum __fractsiha (int A)
+ -- Runtime Function: accum __fractsisa (int A)
+ -- Runtime Function: long accum __fractsida (int A)
+ -- Runtime Function: long long accum __fractsita (int A)
+ -- Runtime Function: unsigned short fract __fractsiuqq (int A)
+ -- Runtime Function: unsigned fract __fractsiuhq (int A)
+ -- Runtime Function: unsigned long fract __fractsiusq (int A)
+ -- Runtime Function: unsigned long long fract __fractsiudq (int A)
+ -- Runtime Function: unsigned short accum __fractsiuha (int A)
+ -- Runtime Function: unsigned accum __fractsiusa (int A)
+ -- Runtime Function: unsigned long accum __fractsiuda (int A)
+ -- Runtime Function: unsigned long long accum __fractsiuta (int A)
+ -- Runtime Function: short fract __fractdiqq (long A)
+ -- Runtime Function: fract __fractdihq (long A)
+ -- Runtime Function: long fract __fractdisq (long A)
+ -- Runtime Function: long long fract __fractdidq (long A)
+ -- Runtime Function: short accum __fractdiha (long A)
+ -- Runtime Function: accum __fractdisa (long A)
+ -- Runtime Function: long accum __fractdida (long A)
+ -- Runtime Function: long long accum __fractdita (long A)
+ -- Runtime Function: unsigned short fract __fractdiuqq (long A)
+ -- Runtime Function: unsigned fract __fractdiuhq (long A)
+ -- Runtime Function: unsigned long fract __fractdiusq (long A)
+ -- Runtime Function: unsigned long long fract __fractdiudq (long A)
+ -- Runtime Function: unsigned short accum __fractdiuha (long A)
+ -- Runtime Function: unsigned accum __fractdiusa (long A)
+ -- Runtime Function: unsigned long accum __fractdiuda (long A)
+ -- Runtime Function: unsigned long long accum __fractdiuta (long A)
+ -- Runtime Function: short fract __fracttiqq (long long A)
+ -- Runtime Function: fract __fracttihq (long long A)
+ -- Runtime Function: long fract __fracttisq (long long A)
+ -- Runtime Function: long long fract __fracttidq (long long A)
+ -- Runtime Function: short accum __fracttiha (long long A)
+ -- Runtime Function: accum __fracttisa (long long A)
+ -- Runtime Function: long accum __fracttida (long long A)
+ -- Runtime Function: long long accum __fracttita (long long A)
+ -- Runtime Function: unsigned short fract __fracttiuqq (long long A)
+ -- Runtime Function: unsigned fract __fracttiuhq (long long A)
+ -- Runtime Function: unsigned long fract __fracttiusq (long long A)
+ -- Runtime Function: unsigned long long fract __fracttiudq (long long
+          A)
+ -- Runtime Function: unsigned short accum __fracttiuha (long long A)
+ -- Runtime Function: unsigned accum __fracttiusa (long long A)
+ -- Runtime Function: unsigned long accum __fracttiuda (long long A)
+ -- Runtime Function: unsigned long long accum __fracttiuta (long long
+          A)
+ -- Runtime Function: short fract __fractsfqq (float A)
+ -- Runtime Function: fract __fractsfhq (float A)
+ -- Runtime Function: long fract __fractsfsq (float A)
+ -- Runtime Function: long long fract __fractsfdq (float A)
+ -- Runtime Function: short accum __fractsfha (float A)
+ -- Runtime Function: accum __fractsfsa (float A)
+ -- Runtime Function: long accum __fractsfda (float A)
+ -- Runtime Function: long long accum __fractsfta (float A)
+ -- Runtime Function: unsigned short fract __fractsfuqq (float A)
+ -- Runtime Function: unsigned fract __fractsfuhq (float A)
+ -- Runtime Function: unsigned long fract __fractsfusq (float A)
+ -- Runtime Function: unsigned long long fract __fractsfudq (float A)
+ -- Runtime Function: unsigned short accum __fractsfuha (float A)
+ -- Runtime Function: unsigned accum __fractsfusa (float A)
+ -- Runtime Function: unsigned long accum __fractsfuda (float A)
+ -- Runtime Function: unsigned long long accum __fractsfuta (float A)
+ -- Runtime Function: short fract __fractdfqq (double A)
+ -- Runtime Function: fract __fractdfhq (double A)
+ -- Runtime Function: long fract __fractdfsq (double A)
+ -- Runtime Function: long long fract __fractdfdq (double A)
+ -- Runtime Function: short accum __fractdfha (double A)
+ -- Runtime Function: accum __fractdfsa (double A)
+ -- Runtime Function: long accum __fractdfda (double A)
+ -- Runtime Function: long long accum __fractdfta (double A)
+ -- Runtime Function: unsigned short fract __fractdfuqq (double A)
+ -- Runtime Function: unsigned fract __fractdfuhq (double A)
+ -- Runtime Function: unsigned long fract __fractdfusq (double A)
+ -- Runtime Function: unsigned long long fract __fractdfudq (double A)
+ -- Runtime Function: unsigned short accum __fractdfuha (double A)
+ -- Runtime Function: unsigned accum __fractdfusa (double A)
+ -- Runtime Function: unsigned long accum __fractdfuda (double A)
+ -- Runtime Function: unsigned long long accum __fractdfuta (double A)
+     These functions convert from fractional and signed non-fractionals
+     to fractionals and signed non-fractionals, without saturation.
+
+ -- Runtime Function: fract __satfractqqhq2 (short fract A)
+ -- Runtime Function: long fract __satfractqqsq2 (short fract A)
+ -- Runtime Function: long long fract __satfractqqdq2 (short fract A)
+ -- Runtime Function: short accum __satfractqqha (short fract A)
+ -- Runtime Function: accum __satfractqqsa (short fract A)
+ -- Runtime Function: long accum __satfractqqda (short fract A)
+ -- Runtime Function: long long accum __satfractqqta (short fract A)
+ -- Runtime Function: unsigned short fract __satfractqquqq (short fract
+          A)
+ -- Runtime Function: unsigned fract __satfractqquhq (short fract A)
+ -- Runtime Function: unsigned long fract __satfractqqusq (short fract
+          A)
+ -- Runtime Function: unsigned long long fract __satfractqqudq (short
+          fract A)
+ -- Runtime Function: unsigned short accum __satfractqquha (short fract
+          A)
+ -- Runtime Function: unsigned accum __satfractqqusa (short fract A)
+ -- Runtime Function: unsigned long accum __satfractqquda (short fract
+          A)
+ -- Runtime Function: unsigned long long accum __satfractqquta (short
+          fract A)
+ -- Runtime Function: short fract __satfracthqqq2 (fract A)
+ -- Runtime Function: long fract __satfracthqsq2 (fract A)
+ -- Runtime Function: long long fract __satfracthqdq2 (fract A)
+ -- Runtime Function: short accum __satfracthqha (fract A)
+ -- Runtime Function: accum __satfracthqsa (fract A)
+ -- Runtime Function: long accum __satfracthqda (fract A)
+ -- Runtime Function: long long accum __satfracthqta (fract A)
+ -- Runtime Function: unsigned short fract __satfracthquqq (fract A)
+ -- Runtime Function: unsigned fract __satfracthquhq (fract A)
+ -- Runtime Function: unsigned long fract __satfracthqusq (fract A)
+ -- Runtime Function: unsigned long long fract __satfracthqudq (fract A)
+ -- Runtime Function: unsigned short accum __satfracthquha (fract A)
+ -- Runtime Function: unsigned accum __satfracthqusa (fract A)
+ -- Runtime Function: unsigned long accum __satfracthquda (fract A)
+ -- Runtime Function: unsigned long long accum __satfracthquta (fract A)
+ -- Runtime Function: short fract __satfractsqqq2 (long fract A)
+ -- Runtime Function: fract __satfractsqhq2 (long fract A)
+ -- Runtime Function: long long fract __satfractsqdq2 (long fract A)
+ -- Runtime Function: short accum __satfractsqha (long fract A)
+ -- Runtime Function: accum __satfractsqsa (long fract A)
+ -- Runtime Function: long accum __satfractsqda (long fract A)
+ -- Runtime Function: long long accum __satfractsqta (long fract A)
+ -- Runtime Function: unsigned short fract __satfractsquqq (long fract
+          A)
+ -- Runtime Function: unsigned fract __satfractsquhq (long fract A)
+ -- Runtime Function: unsigned long fract __satfractsqusq (long fract A)
+ -- Runtime Function: unsigned long long fract __satfractsqudq (long
+          fract A)
+ -- Runtime Function: unsigned short accum __satfractsquha (long fract
+          A)
+ -- Runtime Function: unsigned accum __satfractsqusa (long fract A)
+ -- Runtime Function: unsigned long accum __satfractsquda (long fract A)
+ -- Runtime Function: unsigned long long accum __satfractsquta (long
+          fract A)
+ -- Runtime Function: short fract __satfractdqqq2 (long long fract A)
+ -- Runtime Function: fract __satfractdqhq2 (long long fract A)
+ -- Runtime Function: long fract __satfractdqsq2 (long long fract A)
+ -- Runtime Function: short accum __satfractdqha (long long fract A)
+ -- Runtime Function: accum __satfractdqsa (long long fract A)
+ -- Runtime Function: long accum __satfractdqda (long long fract A)
+ -- Runtime Function: long long accum __satfractdqta (long long fract A)
+ -- Runtime Function: unsigned short fract __satfractdquqq (long long
+          fract A)
+ -- Runtime Function: unsigned fract __satfractdquhq (long long fract A)
+ -- Runtime Function: unsigned long fract __satfractdqusq (long long
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractdqudq (long
+          long fract A)
+ -- Runtime Function: unsigned short accum __satfractdquha (long long
+          fract A)
+ -- Runtime Function: unsigned accum __satfractdqusa (long long fract A)
+ -- Runtime Function: unsigned long accum __satfractdquda (long long
+          fract A)
+ -- Runtime Function: unsigned long long accum __satfractdquta (long
+          long fract A)
+ -- Runtime Function: short fract __satfracthaqq (short accum A)
+ -- Runtime Function: fract __satfracthahq (short accum A)
+ -- Runtime Function: long fract __satfracthasq (short accum A)
+ -- Runtime Function: long long fract __satfracthadq (short accum A)
+ -- Runtime Function: accum __satfracthasa2 (short accum A)
+ -- Runtime Function: long accum __satfracthada2 (short accum A)
+ -- Runtime Function: long long accum __satfracthata2 (short accum A)
+ -- Runtime Function: unsigned short fract __satfracthauqq (short accum
+          A)
+ -- Runtime Function: unsigned fract __satfracthauhq (short accum A)
+ -- Runtime Function: unsigned long fract __satfracthausq (short accum
+          A)
+ -- Runtime Function: unsigned long long fract __satfracthaudq (short
+          accum A)
+ -- Runtime Function: unsigned short accum __satfracthauha (short accum
+          A)
+ -- Runtime Function: unsigned accum __satfracthausa (short accum A)
+ -- Runtime Function: unsigned long accum __satfracthauda (short accum
+          A)
+ -- Runtime Function: unsigned long long accum __satfracthauta (short
+          accum A)
+ -- Runtime Function: short fract __satfractsaqq (accum A)
+ -- Runtime Function: fract __satfractsahq (accum A)
+ -- Runtime Function: long fract __satfractsasq (accum A)
+ -- Runtime Function: long long fract __satfractsadq (accum A)
+ -- Runtime Function: short accum __satfractsaha2 (accum A)
+ -- Runtime Function: long accum __satfractsada2 (accum A)
+ -- Runtime Function: long long accum __satfractsata2 (accum A)
+ -- Runtime Function: unsigned short fract __satfractsauqq (accum A)
+ -- Runtime Function: unsigned fract __satfractsauhq (accum A)
+ -- Runtime Function: unsigned long fract __satfractsausq (accum A)
+ -- Runtime Function: unsigned long long fract __satfractsaudq (accum A)
+ -- Runtime Function: unsigned short accum __satfractsauha (accum A)
+ -- Runtime Function: unsigned accum __satfractsausa (accum A)
+ -- Runtime Function: unsigned long accum __satfractsauda (accum A)
+ -- Runtime Function: unsigned long long accum __satfractsauta (accum A)
+ -- Runtime Function: short fract __satfractdaqq (long accum A)
+ -- Runtime Function: fract __satfractdahq (long accum A)
+ -- Runtime Function: long fract __satfractdasq (long accum A)
+ -- Runtime Function: long long fract __satfractdadq (long accum A)
+ -- Runtime Function: short accum __satfractdaha2 (long accum A)
+ -- Runtime Function: accum __satfractdasa2 (long accum A)
+ -- Runtime Function: long long accum __satfractdata2 (long accum A)
+ -- Runtime Function: unsigned short fract __satfractdauqq (long accum
+          A)
+ -- Runtime Function: unsigned fract __satfractdauhq (long accum A)
+ -- Runtime Function: unsigned long fract __satfractdausq (long accum A)
+ -- Runtime Function: unsigned long long fract __satfractdaudq (long
+          accum A)
+ -- Runtime Function: unsigned short accum __satfractdauha (long accum
+          A)
+ -- Runtime Function: unsigned accum __satfractdausa (long accum A)
+ -- Runtime Function: unsigned long accum __satfractdauda (long accum A)
+ -- Runtime Function: unsigned long long accum __satfractdauta (long
+          accum A)
+ -- Runtime Function: short fract __satfracttaqq (long long accum A)
+ -- Runtime Function: fract __satfracttahq (long long accum A)
+ -- Runtime Function: long fract __satfracttasq (long long accum A)
+ -- Runtime Function: long long fract __satfracttadq (long long accum A)
+ -- Runtime Function: short accum __satfracttaha2 (long long accum A)
+ -- Runtime Function: accum __satfracttasa2 (long long accum A)
+ -- Runtime Function: long accum __satfracttada2 (long long accum A)
+ -- Runtime Function: unsigned short fract __satfracttauqq (long long
+          accum A)
+ -- Runtime Function: unsigned fract __satfracttauhq (long long accum A)
+ -- Runtime Function: unsigned long fract __satfracttausq (long long
+          accum A)
+ -- Runtime Function: unsigned long long fract __satfracttaudq (long
+          long accum A)
+ -- Runtime Function: unsigned short accum __satfracttauha (long long
+          accum A)
+ -- Runtime Function: unsigned accum __satfracttausa (long long accum A)
+ -- Runtime Function: unsigned long accum __satfracttauda (long long
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfracttauta (long
+          long accum A)
+ -- Runtime Function: short fract __satfractuqqqq (unsigned short fract
+          A)
+ -- Runtime Function: fract __satfractuqqhq (unsigned short fract A)
+ -- Runtime Function: long fract __satfractuqqsq (unsigned short fract
+          A)
+ -- Runtime Function: long long fract __satfractuqqdq (unsigned short
+          fract A)
+ -- Runtime Function: short accum __satfractuqqha (unsigned short fract
+          A)
+ -- Runtime Function: accum __satfractuqqsa (unsigned short fract A)
+ -- Runtime Function: long accum __satfractuqqda (unsigned short fract
+          A)
+ -- Runtime Function: long long accum __satfractuqqta (unsigned short
+          fract A)
+ -- Runtime Function: unsigned fract __satfractuqquhq2 (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long fract __satfractuqqusq2 (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long fract __satfractuqqudq2
+          (unsigned short fract A)
+ -- Runtime Function: unsigned short accum __satfractuqquha (unsigned
+          short fract A)
+ -- Runtime Function: unsigned accum __satfractuqqusa (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long accum __satfractuqquda (unsigned
+          short fract A)
+ -- Runtime Function: unsigned long long accum __satfractuqquta
+          (unsigned short fract A)
+ -- Runtime Function: short fract __satfractuhqqq (unsigned fract A)
+ -- Runtime Function: fract __satfractuhqhq (unsigned fract A)
+ -- Runtime Function: long fract __satfractuhqsq (unsigned fract A)
+ -- Runtime Function: long long fract __satfractuhqdq (unsigned fract A)
+ -- Runtime Function: short accum __satfractuhqha (unsigned fract A)
+ -- Runtime Function: accum __satfractuhqsa (unsigned fract A)
+ -- Runtime Function: long accum __satfractuhqda (unsigned fract A)
+ -- Runtime Function: long long accum __satfractuhqta (unsigned fract A)
+ -- Runtime Function: unsigned short fract __satfractuhquqq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long fract __satfractuhqusq2 (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractuhqudq2
+          (unsigned fract A)
+ -- Runtime Function: unsigned short accum __satfractuhquha (unsigned
+          fract A)
+ -- Runtime Function: unsigned accum __satfractuhqusa (unsigned fract A)
+ -- Runtime Function: unsigned long accum __satfractuhquda (unsigned
+          fract A)
+ -- Runtime Function: unsigned long long accum __satfractuhquta
+          (unsigned fract A)
+ -- Runtime Function: short fract __satfractusqqq (unsigned long fract
+          A)
+ -- Runtime Function: fract __satfractusqhq (unsigned long fract A)
+ -- Runtime Function: long fract __satfractusqsq (unsigned long fract A)
+ -- Runtime Function: long long fract __satfractusqdq (unsigned long
+          fract A)
+ -- Runtime Function: short accum __satfractusqha (unsigned long fract
+          A)
+ -- Runtime Function: accum __satfractusqsa (unsigned long fract A)
+ -- Runtime Function: long accum __satfractusqda (unsigned long fract A)
+ -- Runtime Function: long long accum __satfractusqta (unsigned long
+          fract A)
+ -- Runtime Function: unsigned short fract __satfractusquqq2 (unsigned
+          long fract A)
+ -- Runtime Function: unsigned fract __satfractusquhq2 (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long fract __satfractusqudq2
+          (unsigned long fract A)
+ -- Runtime Function: unsigned short accum __satfractusquha (unsigned
+          long fract A)
+ -- Runtime Function: unsigned accum __satfractusqusa (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long accum __satfractusquda (unsigned
+          long fract A)
+ -- Runtime Function: unsigned long long accum __satfractusquta
+          (unsigned long fract A)
+ -- Runtime Function: short fract __satfractudqqq (unsigned long long
+          fract A)
+ -- Runtime Function: fract __satfractudqhq (unsigned long long fract A)
+ -- Runtime Function: long fract __satfractudqsq (unsigned long long
+          fract A)
+ -- Runtime Function: long long fract __satfractudqdq (unsigned long
+          long fract A)
+ -- Runtime Function: short accum __satfractudqha (unsigned long long
+          fract A)
+ -- Runtime Function: accum __satfractudqsa (unsigned long long fract A)
+ -- Runtime Function: long accum __satfractudqda (unsigned long long
+          fract A)
+ -- Runtime Function: long long accum __satfractudqta (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned short fract __satfractudquqq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned fract __satfractudquhq2 (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long fract __satfractudqusq2 (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned short accum __satfractudquha (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned accum __satfractudqusa (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned long accum __satfractudquda (unsigned
+          long long fract A)
+ -- Runtime Function: unsigned long long accum __satfractudquta
+          (unsigned long long fract A)
+ -- Runtime Function: short fract __satfractuhaqq (unsigned short accum
+          A)
+ -- Runtime Function: fract __satfractuhahq (unsigned short accum A)
+ -- Runtime Function: long fract __satfractuhasq (unsigned short accum
+          A)
+ -- Runtime Function: long long fract __satfractuhadq (unsigned short
+          accum A)
+ -- Runtime Function: short accum __satfractuhaha (unsigned short accum
+          A)
+ -- Runtime Function: accum __satfractuhasa (unsigned short accum A)
+ -- Runtime Function: long accum __satfractuhada (unsigned short accum
+          A)
+ -- Runtime Function: long long accum __satfractuhata (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short fract __satfractuhauqq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned fract __satfractuhauhq (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long fract __satfractuhausq (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long fract __satfractuhaudq
+          (unsigned short accum A)
+ -- Runtime Function: unsigned accum __satfractuhausa2 (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long accum __satfractuhauda2 (unsigned
+          short accum A)
+ -- Runtime Function: unsigned long long accum __satfractuhauta2
+          (unsigned short accum A)
+ -- Runtime Function: short fract __satfractusaqq (unsigned accum A)
+ -- Runtime Function: fract __satfractusahq (unsigned accum A)
+ -- Runtime Function: long fract __satfractusasq (unsigned accum A)
+ -- Runtime Function: long long fract __satfractusadq (unsigned accum A)
+ -- Runtime Function: short accum __satfractusaha (unsigned accum A)
+ -- Runtime Function: accum __satfractusasa (unsigned accum A)
+ -- Runtime Function: long accum __satfractusada (unsigned accum A)
+ -- Runtime Function: long long accum __satfractusata (unsigned accum A)
+ -- Runtime Function: unsigned short fract __satfractusauqq (unsigned
+          accum A)
+ -- Runtime Function: unsigned fract __satfractusauhq (unsigned accum A)
+ -- Runtime Function: unsigned long fract __satfractusausq (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long fract __satfractusaudq
+          (unsigned accum A)
+ -- Runtime Function: unsigned short accum __satfractusauha2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long accum __satfractusauda2 (unsigned
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfractusauta2
+          (unsigned accum A)
+ -- Runtime Function: short fract __satfractudaqq (unsigned long accum
+          A)
+ -- Runtime Function: fract __satfractudahq (unsigned long accum A)
+ -- Runtime Function: long fract __satfractudasq (unsigned long accum A)
+ -- Runtime Function: long long fract __satfractudadq (unsigned long
+          accum A)
+ -- Runtime Function: short accum __satfractudaha (unsigned long accum
+          A)
+ -- Runtime Function: accum __satfractudasa (unsigned long accum A)
+ -- Runtime Function: long accum __satfractudada (unsigned long accum A)
+ -- Runtime Function: long long accum __satfractudata (unsigned long
+          accum A)
+ -- Runtime Function: unsigned short fract __satfractudauqq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned fract __satfractudauhq (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long fract __satfractudausq (unsigned
+          long accum A)
+ -- Runtime Function: unsigned long long fract __satfractudaudq
+          (unsigned long accum A)
+ -- Runtime Function: unsigned short accum __satfractudauha2 (unsigned
+          long accum A)
+ -- Runtime Function: unsigned accum __satfractudausa2 (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long accum __satfractudauta2
+          (unsigned long accum A)
+ -- Runtime Function: short fract __satfractutaqq (unsigned long long
+          accum A)
+ -- Runtime Function: fract __satfractutahq (unsigned long long accum A)
+ -- Runtime Function: long fract __satfractutasq (unsigned long long
+          accum A)
+ -- Runtime Function: long long fract __satfractutadq (unsigned long
+          long accum A)
+ -- Runtime Function: short accum __satfractutaha (unsigned long long
+          accum A)
+ -- Runtime Function: accum __satfractutasa (unsigned long long accum A)
+ -- Runtime Function: long accum __satfractutada (unsigned long long
+          accum A)
+ -- Runtime Function: long long accum __satfractutata (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned short fract __satfractutauqq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned fract __satfractutauhq (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long fract __satfractutausq (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned long long fract __satfractutaudq
+          (unsigned long long accum A)
+ -- Runtime Function: unsigned short accum __satfractutauha2 (unsigned
+          long long accum A)
+ -- Runtime Function: unsigned accum __satfractutausa2 (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned long accum __satfractutauda2 (unsigned
+          long long accum A)
+ -- Runtime Function: short fract __satfractqiqq (signed char A)
+ -- Runtime Function: fract __satfractqihq (signed char A)
+ -- Runtime Function: long fract __satfractqisq (signed char A)
+ -- Runtime Function: long long fract __satfractqidq (signed char A)
+ -- Runtime Function: short accum __satfractqiha (signed char A)
+ -- Runtime Function: accum __satfractqisa (signed char A)
+ -- Runtime Function: long accum __satfractqida (signed char A)
+ -- Runtime Function: long long accum __satfractqita (signed char A)
+ -- Runtime Function: unsigned short fract __satfractqiuqq (signed char
+          A)
+ -- Runtime Function: unsigned fract __satfractqiuhq (signed char A)
+ -- Runtime Function: unsigned long fract __satfractqiusq (signed char
+          A)
+ -- Runtime Function: unsigned long long fract __satfractqiudq (signed
+          char A)
+ -- Runtime Function: unsigned short accum __satfractqiuha (signed char
+          A)
+ -- Runtime Function: unsigned accum __satfractqiusa (signed char A)
+ -- Runtime Function: unsigned long accum __satfractqiuda (signed char
+          A)
+ -- Runtime Function: unsigned long long accum __satfractqiuta (signed
+          char A)
+ -- Runtime Function: short fract __satfracthiqq (short A)
+ -- Runtime Function: fract __satfracthihq (short A)
+ -- Runtime Function: long fract __satfracthisq (short A)
+ -- Runtime Function: long long fract __satfracthidq (short A)
+ -- Runtime Function: short accum __satfracthiha (short A)
+ -- Runtime Function: accum __satfracthisa (short A)
+ -- Runtime Function: long accum __satfracthida (short A)
+ -- Runtime Function: long long accum __satfracthita (short A)
+ -- Runtime Function: unsigned short fract __satfracthiuqq (short A)
+ -- Runtime Function: unsigned fract __satfracthiuhq (short A)
+ -- Runtime Function: unsigned long fract __satfracthiusq (short A)
+ -- Runtime Function: unsigned long long fract __satfracthiudq (short A)
+ -- Runtime Function: unsigned short accum __satfracthiuha (short A)
+ -- Runtime Function: unsigned accum __satfracthiusa (short A)
+ -- Runtime Function: unsigned long accum __satfracthiuda (short A)
+ -- Runtime Function: unsigned long long accum __satfracthiuta (short A)
+ -- Runtime Function: short fract __satfractsiqq (int A)
+ -- Runtime Function: fract __satfractsihq (int A)
+ -- Runtime Function: long fract __satfractsisq (int A)
+ -- Runtime Function: long long fract __satfractsidq (int A)
+ -- Runtime Function: short accum __satfractsiha (int A)
+ -- Runtime Function: accum __satfractsisa (int A)
+ -- Runtime Function: long accum __satfractsida (int A)
+ -- Runtime Function: long long accum __satfractsita (int A)
+ -- Runtime Function: unsigned short fract __satfractsiuqq (int A)
+ -- Runtime Function: unsigned fract __satfractsiuhq (int A)
+ -- Runtime Function: unsigned long fract __satfractsiusq (int A)
+ -- Runtime Function: unsigned long long fract __satfractsiudq (int A)
+ -- Runtime Function: unsigned short accum __satfractsiuha (int A)
+ -- Runtime Function: unsigned accum __satfractsiusa (int A)
+ -- Runtime Function: unsigned long accum __satfractsiuda (int A)
+ -- Runtime Function: unsigned long long accum __satfractsiuta (int A)
+ -- Runtime Function: short fract __satfractdiqq (long A)
+ -- Runtime Function: fract __satfractdihq (long A)
+ -- Runtime Function: long fract __satfractdisq (long A)
+ -- Runtime Function: long long fract __satfractdidq (long A)
+ -- Runtime Function: short accum __satfractdiha (long A)
+ -- Runtime Function: accum __satfractdisa (long A)
+ -- Runtime Function: long accum __satfractdida (long A)
+ -- Runtime Function: long long accum __satfractdita (long A)
+ -- Runtime Function: unsigned short fract __satfractdiuqq (long A)
+ -- Runtime Function: unsigned fract __satfractdiuhq (long A)
+ -- Runtime Function: unsigned long fract __satfractdiusq (long A)
+ -- Runtime Function: unsigned long long fract __satfractdiudq (long A)
+ -- Runtime Function: unsigned short accum __satfractdiuha (long A)
+ -- Runtime Function: unsigned accum __satfractdiusa (long A)
+ -- Runtime Function: unsigned long accum __satfractdiuda (long A)
+ -- Runtime Function: unsigned long long accum __satfractdiuta (long A)
+ -- Runtime Function: short fract __satfracttiqq (long long A)
+ -- Runtime Function: fract __satfracttihq (long long A)
+ -- Runtime Function: long fract __satfracttisq (long long A)
+ -- Runtime Function: long long fract __satfracttidq (long long A)
+ -- Runtime Function: short accum __satfracttiha (long long A)
+ -- Runtime Function: accum __satfracttisa (long long A)
+ -- Runtime Function: long accum __satfracttida (long long A)
+ -- Runtime Function: long long accum __satfracttita (long long A)
+ -- Runtime Function: unsigned short fract __satfracttiuqq (long long A)
+ -- Runtime Function: unsigned fract __satfracttiuhq (long long A)
+ -- Runtime Function: unsigned long fract __satfracttiusq (long long A)
+ -- Runtime Function: unsigned long long fract __satfracttiudq (long
+          long A)
+ -- Runtime Function: unsigned short accum __satfracttiuha (long long A)
+ -- Runtime Function: unsigned accum __satfracttiusa (long long A)
+ -- Runtime Function: unsigned long accum __satfracttiuda (long long A)
+ -- Runtime Function: unsigned long long accum __satfracttiuta (long
+          long A)
+ -- Runtime Function: short fract __satfractsfqq (float A)
+ -- Runtime Function: fract __satfractsfhq (float A)
+ -- Runtime Function: long fract __satfractsfsq (float A)
+ -- Runtime Function: long long fract __satfractsfdq (float A)
+ -- Runtime Function: short accum __satfractsfha (float A)
+ -- Runtime Function: accum __satfractsfsa (float A)
+ -- Runtime Function: long accum __satfractsfda (float A)
+ -- Runtime Function: long long accum __satfractsfta (float A)
+ -- Runtime Function: unsigned short fract __satfractsfuqq (float A)
+ -- Runtime Function: unsigned fract __satfractsfuhq (float A)
+ -- Runtime Function: unsigned long fract __satfractsfusq (float A)
+ -- Runtime Function: unsigned long long fract __satfractsfudq (float A)
+ -- Runtime Function: unsigned short accum __satfractsfuha (float A)
+ -- Runtime Function: unsigned accum __satfractsfusa (float A)
+ -- Runtime Function: unsigned long accum __satfractsfuda (float A)
+ -- Runtime Function: unsigned long long accum __satfractsfuta (float A)
+ -- Runtime Function: short fract __satfractdfqq (double A)
+ -- Runtime Function: fract __satfractdfhq (double A)
+ -- Runtime Function: long fract __satfractdfsq (double A)
+ -- Runtime Function: long long fract __satfractdfdq (double A)
+ -- Runtime Function: short accum __satfractdfha (double A)
+ -- Runtime Function: accum __satfractdfsa (double A)
+ -- Runtime Function: long accum __satfractdfda (double A)
+ -- Runtime Function: long long accum __satfractdfta (double A)
+ -- Runtime Function: unsigned short fract __satfractdfuqq (double A)
+ -- Runtime Function: unsigned fract __satfractdfuhq (double A)
+ -- Runtime Function: unsigned long fract __satfractdfusq (double A)
+ -- Runtime Function: unsigned long long fract __satfractdfudq (double
+          A)
+ -- Runtime Function: unsigned short accum __satfractdfuha (double A)
+ -- Runtime Function: unsigned accum __satfractdfusa (double A)
+ -- Runtime Function: unsigned long accum __satfractdfuda (double A)
+ -- Runtime Function: unsigned long long accum __satfractdfuta (double
+          A)
+     The functions convert from fractional and signed non-fractionals to
+     fractionals, with saturation.
+
+ -- Runtime Function: unsigned char __fractunsqqqi (short fract A)
+ -- Runtime Function: unsigned short __fractunsqqhi (short fract A)
+ -- Runtime Function: unsigned int __fractunsqqsi (short fract A)
+ -- Runtime Function: unsigned long __fractunsqqdi (short fract A)
+ -- Runtime Function: unsigned long long __fractunsqqti (short fract A)
+ -- Runtime Function: unsigned char __fractunshqqi (fract A)
+ -- Runtime Function: unsigned short __fractunshqhi (fract A)
+ -- Runtime Function: unsigned int __fractunshqsi (fract A)
+ -- Runtime Function: unsigned long __fractunshqdi (fract A)
+ -- Runtime Function: unsigned long long __fractunshqti (fract A)
+ -- Runtime Function: unsigned char __fractunssqqi (long fract A)
+ -- Runtime Function: unsigned short __fractunssqhi (long fract A)
+ -- Runtime Function: unsigned int __fractunssqsi (long fract A)
+ -- Runtime Function: unsigned long __fractunssqdi (long fract A)
+ -- Runtime Function: unsigned long long __fractunssqti (long fract A)
+ -- Runtime Function: unsigned char __fractunsdqqi (long long fract A)
+ -- Runtime Function: unsigned short __fractunsdqhi (long long fract A)
+ -- Runtime Function: unsigned int __fractunsdqsi (long long fract A)
+ -- Runtime Function: unsigned long __fractunsdqdi (long long fract A)
+ -- Runtime Function: unsigned long long __fractunsdqti (long long
+          fract A)
+ -- Runtime Function: unsigned char __fractunshaqi (short accum A)
+ -- Runtime Function: unsigned short __fractunshahi (short accum A)
+ -- Runtime Function: unsigned int __fractunshasi (short accum A)
+ -- Runtime Function: unsigned long __fractunshadi (short accum A)
+ -- Runtime Function: unsigned long long __fractunshati (short accum A)
+ -- Runtime Function: unsigned char __fractunssaqi (accum A)
+ -- Runtime Function: unsigned short __fractunssahi (accum A)
+ -- Runtime Function: unsigned int __fractunssasi (accum A)
+ -- Runtime Function: unsigned long __fractunssadi (accum A)
+ -- Runtime Function: unsigned long long __fractunssati (accum A)
+ -- Runtime Function: unsigned char __fractunsdaqi (long accum A)
+ -- Runtime Function: unsigned short __fractunsdahi (long accum A)
+ -- Runtime Function: unsigned int __fractunsdasi (long accum A)
+ -- Runtime Function: unsigned long __fractunsdadi (long accum A)
+ -- Runtime Function: unsigned long long __fractunsdati (long accum A)
+ -- Runtime Function: unsigned char __fractunstaqi (long long accum A)
+ -- Runtime Function: unsigned short __fractunstahi (long long accum A)
+ -- Runtime Function: unsigned int __fractunstasi (long long accum A)
+ -- Runtime Function: unsigned long __fractunstadi (long long accum A)
+ -- Runtime Function: unsigned long long __fractunstati (long long
+          accum A)
+ -- Runtime Function: unsigned char __fractunsuqqqi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned short __fractunsuqqhi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned int __fractunsuqqsi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long __fractunsuqqdi (unsigned short
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsuqqti (unsigned
+          short fract A)
+ -- Runtime Function: unsigned char __fractunsuhqqi (unsigned fract A)
+ -- Runtime Function: unsigned short __fractunsuhqhi (unsigned fract A)
+ -- Runtime Function: unsigned int __fractunsuhqsi (unsigned fract A)
+ -- Runtime Function: unsigned long __fractunsuhqdi (unsigned fract A)
+ -- Runtime Function: unsigned long long __fractunsuhqti (unsigned
+          fract A)
+ -- Runtime Function: unsigned char __fractunsusqqi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned short __fractunsusqhi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned int __fractunsusqsi (unsigned long fract
+          A)
+ -- Runtime Function: unsigned long __fractunsusqdi (unsigned long
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsusqti (unsigned long
+          fract A)
+ -- Runtime Function: unsigned char __fractunsudqqi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned short __fractunsudqhi (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned int __fractunsudqsi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long __fractunsudqdi (unsigned long long
+          fract A)
+ -- Runtime Function: unsigned long long __fractunsudqti (unsigned long
+          long fract A)
+ -- Runtime Function: unsigned char __fractunsuhaqi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned short __fractunsuhahi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned int __fractunsuhasi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long __fractunsuhadi (unsigned short
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsuhati (unsigned
+          short accum A)
+ -- Runtime Function: unsigned char __fractunsusaqi (unsigned accum A)
+ -- Runtime Function: unsigned short __fractunsusahi (unsigned accum A)
+ -- Runtime Function: unsigned int __fractunsusasi (unsigned accum A)
+ -- Runtime Function: unsigned long __fractunsusadi (unsigned accum A)
+ -- Runtime Function: unsigned long long __fractunsusati (unsigned
+          accum A)
+ -- Runtime Function: unsigned char __fractunsudaqi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned short __fractunsudahi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned int __fractunsudasi (unsigned long accum
+          A)
+ -- Runtime Function: unsigned long __fractunsudadi (unsigned long
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsudati (unsigned long
+          accum A)
+ -- Runtime Function: unsigned char __fractunsutaqi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned short __fractunsutahi (unsigned long
+          long accum A)
+ -- Runtime Function: unsigned int __fractunsutasi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long __fractunsutadi (unsigned long long
+          accum A)
+ -- Runtime Function: unsigned long long __fractunsutati (unsigned long
+          long accum A)
+ -- Runtime Function: short fract __fractunsqiqq (unsigned char A)
+ -- Runtime Function: fract __fractunsqihq (unsigned char A)
+ -- Runtime Function: long fract __fractunsqisq (unsigned char A)
+ -- Runtime Function: long long fract __fractunsqidq (unsigned char A)
+ -- Runtime Function: short accum __fractunsqiha (unsigned char A)
+ -- Runtime Function: accum __fractunsqisa (unsigned char A)
+ -- Runtime Function: long accum __fractunsqida (unsigned char A)
+ -- Runtime Function: long long accum __fractunsqita (unsigned char A)
+ -- Runtime Function: unsigned short fract __fractunsqiuqq (unsigned
+          char A)
+ -- Runtime Function: unsigned fract __fractunsqiuhq (unsigned char A)
+ -- Runtime Function: unsigned long fract __fractunsqiusq (unsigned
+          char A)
+ -- Runtime Function: unsigned long long fract __fractunsqiudq
+          (unsigned char A)
+ -- Runtime Function: unsigned short accum __fractunsqiuha (unsigned
+          char A)
+ -- Runtime Function: unsigned accum __fractunsqiusa (unsigned char A)
+ -- Runtime Function: unsigned long accum __fractunsqiuda (unsigned
+          char A)
+ -- Runtime Function: unsigned long long accum __fractunsqiuta
+          (unsigned char A)
+ -- Runtime Function: short fract __fractunshiqq (unsigned short A)
+ -- Runtime Function: fract __fractunshihq (unsigned short A)
+ -- Runtime Function: long fract __fractunshisq (unsigned short A)
+ -- Runtime Function: long long fract __fractunshidq (unsigned short A)
+ -- Runtime Function: short accum __fractunshiha (unsigned short A)
+ -- Runtime Function: accum __fractunshisa (unsigned short A)
+ -- Runtime Function: long accum __fractunshida (unsigned short A)
+ -- Runtime Function: long long accum __fractunshita (unsigned short A)
+ -- Runtime Function: unsigned short fract __fractunshiuqq (unsigned
+          short A)
+ -- Runtime Function: unsigned fract __fractunshiuhq (unsigned short A)
+ -- Runtime Function: unsigned long fract __fractunshiusq (unsigned
+          short A)
+ -- Runtime Function: unsigned long long fract __fractunshiudq
+          (unsigned short A)
+ -- Runtime Function: unsigned short accum __fractunshiuha (unsigned
+          short A)
+ -- Runtime Function: unsigned accum __fractunshiusa (unsigned short A)
+ -- Runtime Function: unsigned long accum __fractunshiuda (unsigned
+          short A)
+ -- Runtime Function: unsigned long long accum __fractunshiuta
+          (unsigned short A)
+ -- Runtime Function: short fract __fractunssiqq (unsigned int A)
+ -- Runtime Function: fract __fractunssihq (unsigned int A)
+ -- Runtime Function: long fract __fractunssisq (unsigned int A)
+ -- Runtime Function: long long fract __fractunssidq (unsigned int A)
+ -- Runtime Function: short accum __fractunssiha (unsigned int A)
+ -- Runtime Function: accum __fractunssisa (unsigned int A)
+ -- Runtime Function: long accum __fractunssida (unsigned int A)
+ -- Runtime Function: long long accum __fractunssita (unsigned int A)
+ -- Runtime Function: unsigned short fract __fractunssiuqq (unsigned
+          int A)
+ -- Runtime Function: unsigned fract __fractunssiuhq (unsigned int A)
+ -- Runtime Function: unsigned long fract __fractunssiusq (unsigned int
+          A)
+ -- Runtime Function: unsigned long long fract __fractunssiudq
+          (unsigned int A)
+ -- Runtime Function: unsigned short accum __fractunssiuha (unsigned
+          int A)
+ -- Runtime Function: unsigned accum __fractunssiusa (unsigned int A)
+ -- Runtime Function: unsigned long accum __fractunssiuda (unsigned int
+          A)
+ -- Runtime Function: unsigned long long accum __fractunssiuta
+          (unsigned int A)
+ -- Runtime Function: short fract __fractunsdiqq (unsigned long A)
+ -- Runtime Function: fract __fractunsdihq (unsigned long A)
+ -- Runtime Function: long fract __fractunsdisq (unsigned long A)
+ -- Runtime Function: long long fract __fractunsdidq (unsigned long A)
+ -- Runtime Function: short accum __fractunsdiha (unsigned long A)
+ -- Runtime Function: accum __fractunsdisa (unsigned long A)
+ -- Runtime Function: long accum __fractunsdida (unsigned long A)
+ -- Runtime Function: long long accum __fractunsdita (unsigned long A)
+ -- Runtime Function: unsigned short fract __fractunsdiuqq (unsigned
+          long A)
+ -- Runtime Function: unsigned fract __fractunsdiuhq (unsigned long A)
+ -- Runtime Function: unsigned long fract __fractunsdiusq (unsigned
+          long A)
+ -- Runtime Function: unsigned long long fract __fractunsdiudq
+          (unsigned long A)
+ -- Runtime Function: unsigned short accum __fractunsdiuha (unsigned
+          long A)
+ -- Runtime Function: unsigned accum __fractunsdiusa (unsigned long A)
+ -- Runtime Function: unsigned long accum __fractunsdiuda (unsigned
+          long A)
+ -- Runtime Function: unsigned long long accum __fractunsdiuta
+          (unsigned long A)
+ -- Runtime Function: short fract __fractunstiqq (unsigned long long A)
+ -- Runtime Function: fract __fractunstihq (unsigned long long A)
+ -- Runtime Function: long fract __fractunstisq (unsigned long long A)
+ -- Runtime Function: long long fract __fractunstidq (unsigned long
+          long A)
+ -- Runtime Function: short accum __fractunstiha (unsigned long long A)
+ -- Runtime Function: accum __fractunstisa (unsigned long long A)
+ -- Runtime Function: long accum __fractunstida (unsigned long long A)
+ -- Runtime Function: long long accum __fractunstita (unsigned long
+          long A)
+ -- Runtime Function: unsigned short fract __fractunstiuqq (unsigned
+          long long A)
+ -- Runtime Function: unsigned fract __fractunstiuhq (unsigned long
+          long A)
+ -- Runtime Function: unsigned long fract __fractunstiusq (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long fract __fractunstiudq
+          (unsigned long long A)
+ -- Runtime Function: unsigned short accum __fractunstiuha (unsigned
+          long long A)
+ -- Runtime Function: unsigned accum __fractunstiusa (unsigned long
+          long A)
+ -- Runtime Function: unsigned long accum __fractunstiuda (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long accum __fractunstiuta
+          (unsigned long long A)
+     These functions convert from fractionals to unsigned
+     non-fractionals; and from unsigned non-fractionals to fractionals,
+     without saturation.
+
+ -- Runtime Function: short fract __satfractunsqiqq (unsigned char A)
+ -- Runtime Function: fract __satfractunsqihq (unsigned char A)
+ -- Runtime Function: long fract __satfractunsqisq (unsigned char A)
+ -- Runtime Function: long long fract __satfractunsqidq (unsigned char
+          A)
+ -- Runtime Function: short accum __satfractunsqiha (unsigned char A)
+ -- Runtime Function: accum __satfractunsqisa (unsigned char A)
+ -- Runtime Function: long accum __satfractunsqida (unsigned char A)
+ -- Runtime Function: long long accum __satfractunsqita (unsigned char
+          A)
+ -- Runtime Function: unsigned short fract __satfractunsqiuqq (unsigned
+          char A)
+ -- Runtime Function: unsigned fract __satfractunsqiuhq (unsigned char
+          A)
+ -- Runtime Function: unsigned long fract __satfractunsqiusq (unsigned
+          char A)
+ -- Runtime Function: unsigned long long fract __satfractunsqiudq
+          (unsigned char A)
+ -- Runtime Function: unsigned short accum __satfractunsqiuha (unsigned
+          char A)
+ -- Runtime Function: unsigned accum __satfractunsqiusa (unsigned char
+          A)
+ -- Runtime Function: unsigned long accum __satfractunsqiuda (unsigned
+          char A)
+ -- Runtime Function: unsigned long long accum __satfractunsqiuta
+          (unsigned char A)
+ -- Runtime Function: short fract __satfractunshiqq (unsigned short A)
+ -- Runtime Function: fract __satfractunshihq (unsigned short A)
+ -- Runtime Function: long fract __satfractunshisq (unsigned short A)
+ -- Runtime Function: long long fract __satfractunshidq (unsigned short
+          A)
+ -- Runtime Function: short accum __satfractunshiha (unsigned short A)
+ -- Runtime Function: accum __satfractunshisa (unsigned short A)
+ -- Runtime Function: long accum __satfractunshida (unsigned short A)
+ -- Runtime Function: long long accum __satfractunshita (unsigned short
+          A)
+ -- Runtime Function: unsigned short fract __satfractunshiuqq (unsigned
+          short A)
+ -- Runtime Function: unsigned fract __satfractunshiuhq (unsigned short
+          A)
+ -- Runtime Function: unsigned long fract __satfractunshiusq (unsigned
+          short A)
+ -- Runtime Function: unsigned long long fract __satfractunshiudq
+          (unsigned short A)
+ -- Runtime Function: unsigned short accum __satfractunshiuha (unsigned
+          short A)
+ -- Runtime Function: unsigned accum __satfractunshiusa (unsigned short
+          A)
+ -- Runtime Function: unsigned long accum __satfractunshiuda (unsigned
+          short A)
+ -- Runtime Function: unsigned long long accum __satfractunshiuta
+          (unsigned short A)
+ -- Runtime Function: short fract __satfractunssiqq (unsigned int A)
+ -- Runtime Function: fract __satfractunssihq (unsigned int A)
+ -- Runtime Function: long fract __satfractunssisq (unsigned int A)
+ -- Runtime Function: long long fract __satfractunssidq (unsigned int A)
+ -- Runtime Function: short accum __satfractunssiha (unsigned int A)
+ -- Runtime Function: accum __satfractunssisa (unsigned int A)
+ -- Runtime Function: long accum __satfractunssida (unsigned int A)
+ -- Runtime Function: long long accum __satfractunssita (unsigned int A)
+ -- Runtime Function: unsigned short fract __satfractunssiuqq (unsigned
+          int A)
+ -- Runtime Function: unsigned fract __satfractunssiuhq (unsigned int A)
+ -- Runtime Function: unsigned long fract __satfractunssiusq (unsigned
+          int A)
+ -- Runtime Function: unsigned long long fract __satfractunssiudq
+          (unsigned int A)
+ -- Runtime Function: unsigned short accum __satfractunssiuha (unsigned
+          int A)
+ -- Runtime Function: unsigned accum __satfractunssiusa (unsigned int A)
+ -- Runtime Function: unsigned long accum __satfractunssiuda (unsigned
+          int A)
+ -- Runtime Function: unsigned long long accum __satfractunssiuta
+          (unsigned int A)
+ -- Runtime Function: short fract __satfractunsdiqq (unsigned long A)
+ -- Runtime Function: fract __satfractunsdihq (unsigned long A)
+ -- Runtime Function: long fract __satfractunsdisq (unsigned long A)
+ -- Runtime Function: long long fract __satfractunsdidq (unsigned long
+          A)
+ -- Runtime Function: short accum __satfractunsdiha (unsigned long A)
+ -- Runtime Function: accum __satfractunsdisa (unsigned long A)
+ -- Runtime Function: long accum __satfractunsdida (unsigned long A)
+ -- Runtime Function: long long accum __satfractunsdita (unsigned long
+          A)
+ -- Runtime Function: unsigned short fract __satfractunsdiuqq (unsigned
+          long A)
+ -- Runtime Function: unsigned fract __satfractunsdiuhq (unsigned long
+          A)
+ -- Runtime Function: unsigned long fract __satfractunsdiusq (unsigned
+          long A)
+ -- Runtime Function: unsigned long long fract __satfractunsdiudq
+          (unsigned long A)
+ -- Runtime Function: unsigned short accum __satfractunsdiuha (unsigned
+          long A)
+ -- Runtime Function: unsigned accum __satfractunsdiusa (unsigned long
+          A)
+ -- Runtime Function: unsigned long accum __satfractunsdiuda (unsigned
+          long A)
+ -- Runtime Function: unsigned long long accum __satfractunsdiuta
+          (unsigned long A)
+ -- Runtime Function: short fract __satfractunstiqq (unsigned long long
+          A)
+ -- Runtime Function: fract __satfractunstihq (unsigned long long A)
+ -- Runtime Function: long fract __satfractunstisq (unsigned long long
+          A)
+ -- Runtime Function: long long fract __satfractunstidq (unsigned long
+          long A)
+ -- Runtime Function: short accum __satfractunstiha (unsigned long long
+          A)
+ -- Runtime Function: accum __satfractunstisa (unsigned long long A)
+ -- Runtime Function: long accum __satfractunstida (unsigned long long
+          A)
+ -- Runtime Function: long long accum __satfractunstita (unsigned long
+          long A)
+ -- Runtime Function: unsigned short fract __satfractunstiuqq (unsigned
+          long long A)
+ -- Runtime Function: unsigned fract __satfractunstiuhq (unsigned long
+          long A)
+ -- Runtime Function: unsigned long fract __satfractunstiusq (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long fract __satfractunstiudq
+          (unsigned long long A)
+ -- Runtime Function: unsigned short accum __satfractunstiuha (unsigned
+          long long A)
+ -- Runtime Function: unsigned accum __satfractunstiusa (unsigned long
+          long A)
+ -- Runtime Function: unsigned long accum __satfractunstiuda (unsigned
+          long long A)
+ -- Runtime Function: unsigned long long accum __satfractunstiuta
+          (unsigned long long A)
+     These functions convert from unsigned non-fractionals to
+     fractionals, with saturation.
+
+
+File: gccint.info,  Node: Exception handling routines,  Next: Miscellaneous routines,  Prev: Fixed-point fractional library routines,  Up: Libgcc
+
+4.5 Language-independent routines for exception handling
+========================================================
+
+document me!
+
+       _Unwind_DeleteException
+       _Unwind_Find_FDE
+       _Unwind_ForcedUnwind
+       _Unwind_GetGR
+       _Unwind_GetIP
+       _Unwind_GetLanguageSpecificData
+       _Unwind_GetRegionStart
+       _Unwind_GetTextRelBase
+       _Unwind_GetDataRelBase
+       _Unwind_RaiseException
+       _Unwind_Resume
+       _Unwind_SetGR
+       _Unwind_SetIP
+       _Unwind_FindEnclosingFunction
+       _Unwind_SjLj_Register
+       _Unwind_SjLj_Unregister
+       _Unwind_SjLj_RaiseException
+       _Unwind_SjLj_ForcedUnwind
+       _Unwind_SjLj_Resume
+       __deregister_frame
+       __deregister_frame_info
+       __deregister_frame_info_bases
+       __register_frame
+       __register_frame_info
+       __register_frame_info_bases
+       __register_frame_info_table
+       __register_frame_info_table_bases
+       __register_frame_table
+
+
+File: gccint.info,  Node: Miscellaneous routines,  Prev: Exception handling routines,  Up: Libgcc
+
+4.6 Miscellaneous runtime library routines
+==========================================
+
+4.6.1 Cache control functions
+-----------------------------
+
+ -- Runtime Function: void __clear_cache (char *BEG, char *END)
+     This function clears the instruction cache between BEG and END.
+
+
+File: gccint.info,  Node: Languages,  Next: Source Tree,  Prev: Libgcc,  Up: Top
+
+5 Language Front Ends in GCC
+****************************
+
+The interface to front ends for languages in GCC, and in particular the
+`tree' structure (*note GENERIC::), was initially designed for C, and
+many aspects of it are still somewhat biased towards C and C-like
+languages.  It is, however, reasonably well suited to other procedural
+languages, and front ends for many such languages have been written for
+GCC.
+
+ Writing a compiler as a front end for GCC, rather than compiling
+directly to assembler or generating C code which is then compiled by
+GCC, has several advantages:
+
+   * GCC front ends benefit from the support for many different target
+     machines already present in GCC.
+
+   * GCC front ends benefit from all the optimizations in GCC.  Some of
+     these, such as alias analysis, may work better when GCC is
+     compiling directly from source code then when it is compiling from
+     generated C code.
+
+   * Better debugging information is generated when compiling directly
+     from source code than when going via intermediate generated C code.
+
+ Because of the advantages of writing a compiler as a GCC front end,
+GCC front ends have also been created for languages very different from
+those for which GCC was designed, such as the declarative
+logic/functional language Mercury.  For these reasons, it may also be
+useful to implement compilers created for specialized purposes (for
+example, as part of a research project) as GCC front ends.
+
+
+File: gccint.info,  Node: Source Tree,  Next: Testsuites,  Prev: Languages,  Up: Top
+
+6 Source Tree Structure and Build System
+****************************************
+
+This chapter describes the structure of the GCC source tree, and how
+GCC is built.  The user documentation for building and installing GCC
+is in a separate manual (`http://gcc.gnu.org/install/'), with which it
+is presumed that you are familiar.
+
+* Menu:
+
+* Configure Terms:: Configuration terminology and history.
+* Top Level::       The top level source directory.
+* gcc Directory::   The `gcc' subdirectory.
+
+
+File: gccint.info,  Node: Configure Terms,  Next: Top Level,  Up: Source Tree
+
+6.1 Configure Terms and History
+===============================
+
+The configure and build process has a long and colorful history, and can
+be confusing to anyone who doesn't know why things are the way they are.
+While there are other documents which describe the configuration process
+in detail, here are a few things that everyone working on GCC should
+know.
+
+ There are three system names that the build knows about: the machine
+you are building on ("build"), the machine that you are building for
+("host"), and the machine that GCC will produce code for ("target").
+When you configure GCC, you specify these with `--build=', `--host=',
+and `--target='.
+
+ Specifying the host without specifying the build should be avoided, as
+`configure' may (and once did) assume that the host you specify is also
+the build, which may not be true.
+
+ If build, host, and target are all the same, this is called a
+"native".  If build and host are the same but target is different, this
+is called a "cross".  If build, host, and target are all different this
+is called a "canadian" (for obscure reasons dealing with Canada's
+political party and the background of the person working on the build
+at that time).  If host and target are the same, but build is
+different, you are using a cross-compiler to build a native for a
+different system.  Some people call this a "host-x-host", "crossed
+native", or "cross-built native".  If build and target are the same,
+but host is different, you are using a cross compiler to build a cross
+compiler that produces code for the machine you're building on.  This
+is rare, so there is no common way of describing it.  There is a
+proposal to call this a "crossback".
+
+ If build and host are the same, the GCC you are building will also be
+used to build the target libraries (like `libstdc++').  If build and
+host are different, you must have already built and installed a cross
+compiler that will be used to build the target libraries (if you
+configured with `--target=foo-bar', this compiler will be called
+`foo-bar-gcc').
+
+ In the case of target libraries, the machine you're building for is the
+machine you specified with `--target'.  So, build is the machine you're
+building on (no change there), host is the machine you're building for
+(the target libraries are built for the target, so host is the target
+you specified), and target doesn't apply (because you're not building a
+compiler, you're building libraries).  The configure/make process will
+adjust these variables as needed.  It also sets `$with_cross_host' to
+the original `--host' value in case you need it.
+
+ The `libiberty' support library is built up to three times: once for
+the host, once for the target (even if they are the same), and once for
+the build if build and host are different.  This allows it to be used
+by all programs which are generated in the course of the build process.
+
+
+File: gccint.info,  Node: Top Level,  Next: gcc Directory,  Prev: Configure Terms,  Up: Source Tree
+
+6.2 Top Level Source Directory
+==============================
+
+The top level source directory in a GCC distribution contains several
+files and directories that are shared with other software distributions
+such as that of GNU Binutils.  It also contains several subdirectories
+that contain parts of GCC and its runtime libraries:
+
+`boehm-gc'
+     The Boehm conservative garbage collector, used as part of the Java
+     runtime library.
+
+`config'
+     Autoconf macros and Makefile fragments used throughout the tree.
+
+`contrib'
+     Contributed scripts that may be found useful in conjunction with
+     GCC.  One of these, `contrib/texi2pod.pl', is used to generate man
+     pages from Texinfo manuals as part of the GCC build process.
+
+`fixincludes'
+     The support for fixing system headers to work with GCC.  See
+     `fixincludes/README' for more information.  The headers fixed by
+     this mechanism are installed in `LIBSUBDIR/include-fixed'.  Along
+     with those headers, `README-fixinc' is also installed, as
+     `LIBSUBDIR/include-fixed/README'.
+
+`gcc'
+     The main sources of GCC itself (except for runtime libraries),
+     including optimizers, support for different target architectures,
+     language front ends, and testsuites.  *Note The `gcc'
+     Subdirectory: gcc Directory, for details.
+
+`gnattools'
+     Support tools for GNAT.
+
+`include'
+     Headers for the `libiberty' library.
+
+`intl'
+     GNU `libintl', from GNU `gettext', for systems which do not
+     include it in `libc'.
+
+`libada'
+     The Ada runtime library.
+
+`libcpp'
+     The C preprocessor library.
+
+`libdecnumber'
+     The Decimal Float support library.
+
+`libffi'
+     The `libffi' library, used as part of the Java runtime library.
+
+`libgcc'
+     The GCC runtime library.
+
+`libgfortran'
+     The Fortran runtime library.
+
+`libgomp'
+     The GNU OpenMP runtime library.
+
+`libiberty'
+     The `libiberty' library, used for portability and for some
+     generally useful data structures and algorithms.  *Note
+     Introduction: (libiberty)Top, for more information about this
+     library.
+
+`libjava'
+     The Java runtime library.
+
+`libmudflap'
+     The `libmudflap' library, used for instrumenting pointer and array
+     dereferencing operations.
+
+`libobjc'
+     The Objective-C and Objective-C++ runtime library.
+
+`libssp'
+     The Stack protector runtime library.
+
+`libstdc++-v3'
+     The C++ runtime library.
+
+`lto-plugin'
+     Plugin used by `gold' if link-time optimizations are enabled.
+
+`maintainer-scripts'
+     Scripts used by the `gccadmin' account on `gcc.gnu.org'.
+
+`zlib'
+     The `zlib' compression library, used by the Java front end, as
+     part of the Java runtime library, and for compressing and
+     uncompressing GCC's intermediate language in LTO object files.
+
+ The build system in the top level directory, including how recursion
+into subdirectories works and how building runtime libraries for
+multilibs is handled, is documented in a separate manual, included with
+GNU Binutils.  *Note GNU configure and build system: (configure)Top,
+for details.
+
+
+File: gccint.info,  Node: gcc Directory,  Prev: Top Level,  Up: Source Tree
+
+6.3 The `gcc' Subdirectory
+==========================
+
+The `gcc' directory contains many files that are part of the C sources
+of GCC, other files used as part of the configuration and build
+process, and subdirectories including documentation and a testsuite.
+The files that are sources of GCC are documented in a separate chapter.
+*Note Passes and Files of the Compiler: Passes.
+
+* Menu:
+
+* Subdirectories:: Subdirectories of `gcc'.
+* Configuration::  The configuration process, and the files it uses.
+* Build::          The build system in the `gcc' directory.
+* Makefile::       Targets in `gcc/Makefile'.
+* Library Files::  Library source files and headers under `gcc/'.
+* Headers::        Headers installed by GCC.
+* Documentation::  Building documentation in GCC.
+* Front End::      Anatomy of a language front end.
+* Back End::       Anatomy of a target back end.
+
+
+File: gccint.info,  Node: Subdirectories,  Next: Configuration,  Up: gcc Directory
+
+6.3.1 Subdirectories of `gcc'
+-----------------------------
+
+The `gcc' directory contains the following subdirectories:
+
+`LANGUAGE'
+     Subdirectories for various languages.  Directories containing a
+     file `config-lang.in' are language subdirectories.  The contents of
+     the subdirectories `cp' (for C++), `lto' (for LTO), `objc' (for
+     Objective-C) and `objcp' (for Objective-C++) are documented in
+     this manual (*note Passes and Files of the Compiler: Passes.);
+     those for other languages are not.  *Note Anatomy of a Language
+     Front End: Front End, for details of the files in these
+     directories.
+
+`config'
+     Configuration files for supported architectures and operating
+     systems.  *Note Anatomy of a Target Back End: Back End, for
+     details of the files in this directory.
+
+`doc'
+     Texinfo documentation for GCC, together with automatically
+     generated man pages and support for converting the installation
+     manual to HTML.  *Note Documentation::.
+
+`ginclude'
+     System headers installed by GCC, mainly those required by the C
+     standard of freestanding implementations.  *Note Headers Installed
+     by GCC: Headers, for details of when these and other headers are
+     installed.
+
+`po'
+     Message catalogs with translations of messages produced by GCC into
+     various languages, `LANGUAGE.po'.  This directory also contains
+     `gcc.pot', the template for these message catalogues, `exgettext',
+     a wrapper around `gettext' to extract the messages from the GCC
+     sources and create `gcc.pot', which is run by `make gcc.pot', and
+     `EXCLUDES', a list of files from which messages should not be
+     extracted.
+
+`testsuite'
+     The GCC testsuites (except for those for runtime libraries).
+     *Note Testsuites::.
+
+
+File: gccint.info,  Node: Configuration,  Next: Build,  Prev: Subdirectories,  Up: gcc Directory
+
+6.3.2 Configuration in the `gcc' Directory
+------------------------------------------
+
+The `gcc' directory is configured with an Autoconf-generated script
+`configure'.  The `configure' script is generated from `configure.ac'
+and `aclocal.m4'.  From the files `configure.ac' and `acconfig.h',
+Autoheader generates the file `config.in'.  The file `cstamp-h.in' is
+used as a timestamp.
+
+* Menu:
+
+* Config Fragments::     Scripts used by `configure'.
+* System Config::        The `config.build', `config.host', and
+                         `config.gcc' files.
+* Configuration Files::  Files created by running `configure'.
+
+
+File: gccint.info,  Node: Config Fragments,  Next: System Config,  Up: Configuration
+
+6.3.2.1 Scripts Used by `configure'
+...................................
+
+`configure' uses some other scripts to help in its work:
+
+   * The standard GNU `config.sub' and `config.guess' files, kept in
+     the top level directory, are used.
+
+   * The file `config.gcc' is used to handle configuration specific to
+     the particular target machine.  The file `config.build' is used to
+     handle configuration specific to the particular build machine.
+     The file `config.host' is used to handle configuration specific to
+     the particular host machine.  (In general, these should only be
+     used for features that cannot reasonably be tested in Autoconf
+     feature tests.)  *Note The `config.build'; `config.host'; and
+     `config.gcc' Files: System Config, for details of the contents of
+     these files.
+
+   * Each language subdirectory has a file `LANGUAGE/config-lang.in'
+     that is used for front-end-specific configuration.  *Note The
+     Front End `config-lang.in' File: Front End Config, for details of
+     this file.
+
+   * A helper script `configure.frag' is used as part of creating the
+     output of `configure'.
+
+
+File: gccint.info,  Node: System Config,  Next: Configuration Files,  Prev: Config Fragments,  Up: Configuration
+
+6.3.2.2 The `config.build'; `config.host'; and `config.gcc' Files
+.................................................................
+
+The `config.build' file contains specific rules for particular systems
+which GCC is built on.  This should be used as rarely as possible, as
+the behavior of the build system can always be detected by autoconf.
+
+ The `config.host' file contains specific rules for particular systems
+which GCC will run on.  This is rarely needed.
+
+ The `config.gcc' file contains specific rules for particular systems
+which GCC will generate code for.  This is usually needed.
+
+ Each file has a list of the shell variables it sets, with
+descriptions, at the top of the file.
+
+ FIXME: document the contents of these files, and what variables should
+be set to control build, host and target configuration.
+
+
+File: gccint.info,  Node: Configuration Files,  Prev: System Config,  Up: Configuration
+
+6.3.2.3 Files Created by `configure'
+....................................
+
+Here we spell out what files will be set up by `configure' in the `gcc'
+directory.  Some other files are created as temporary files in the
+configuration process, and are not used in the subsequent build; these
+are not documented.
+
+   * `Makefile' is constructed from `Makefile.in', together with the
+     host and target fragments (*note Makefile Fragments: Fragments.)
+     `t-TARGET' and `x-HOST' from `config', if any, and language
+     Makefile fragments `LANGUAGE/Make-lang.in'.
+
+   * `auto-host.h' contains information about the host machine
+     determined by `configure'.  If the host machine is different from
+     the build machine, then `auto-build.h' is also created, containing
+     such information about the build machine.
+
+   * `config.status' is a script that may be run to recreate the
+     current configuration.
+
+   * `configargs.h' is a header containing details of the arguments
+     passed to `configure' to configure GCC, and of the thread model
+     used.
+
+   * `cstamp-h' is used as a timestamp.
+
+   * `gccbug', a script for reporting bugs in GCC, is constructed from
+     `gccbug.in'.
+
+   * If a language `config-lang.in' file (*note The Front End
+     `config-lang.in' File: Front End Config.) sets `outputs', then the
+     files listed in `outputs' there are also generated.
+
+ The following configuration headers are created from the Makefile,
+using `mkconfig.sh', rather than directly by `configure'.  `config.h',
+`bconfig.h' and `tconfig.h' all contain the `xm-MACHINE.h' header, if
+any, appropriate to the host, build and target machines respectively,
+the configuration headers for the target, and some definitions; for the
+host and build machines, these include the autoconfigured headers
+generated by `configure'.  The other configuration headers are
+determined by `config.gcc'.  They also contain the typedefs for `rtx',
+`rtvec' and `tree'.
+
+   * `config.h', for use in programs that run on the host machine.
+
+   * `bconfig.h', for use in programs that run on the build machine.
+
+   * `tconfig.h', for use in programs and libraries for the target
+     machine.
+
+   * `tm_p.h', which includes the header `MACHINE-protos.h' that
+     contains prototypes for functions in the target `.c' file.  FIXME:
+     why is such a separate header necessary?
+
+
+File: gccint.info,  Node: Build,  Next: Makefile,  Prev: Configuration,  Up: gcc Directory
+
+6.3.3 Build System in the `gcc' Directory
+-----------------------------------------
+
+FIXME: describe the build system, including what is built in what
+stages.  Also list the various source files that are used in the build
+process but aren't source files of GCC itself and so aren't documented
+below (*note Passes::).
+
+
+File: gccint.info,  Node: Makefile,  Next: Library Files,  Prev: Build,  Up: gcc Directory
+
+6.3.4 Makefile Targets
+----------------------
+
+These targets are available from the `gcc' directory:
+
+`all'
+     This is the default target.  Depending on what your
+     build/host/target configuration is, it coordinates all the things
+     that need to be built.
+
+`doc'
+     Produce info-formatted documentation and man pages.  Essentially it
+     calls `make man' and `make info'.
+
+`dvi'
+     Produce DVI-formatted documentation.
+
+`pdf'
+     Produce PDF-formatted documentation.
+
+`html'
+     Produce HTML-formatted documentation.
+
+`man'
+     Generate man pages.
+
+`info'
+     Generate info-formatted pages.
+
+`mostlyclean'
+     Delete the files made while building the compiler.
+
+`clean'
+     That, and all the other files built by `make all'.
+
+`distclean'
+     That, and all the files created by `configure'.
+
+`maintainer-clean'
+     Distclean plus any file that can be generated from other files.
+     Note that additional tools may be required beyond what is normally
+     needed to build GCC.
+
+`srcextra'
+     Generates files in the source directory that are not
+     version-controlled but should go into a release tarball.
+
+`srcinfo'
+`srcman'
+     Copies the info-formatted and manpage documentation into the source
+     directory usually for the purpose of generating a release tarball.
+
+`install'
+     Installs GCC.
+
+`uninstall'
+     Deletes installed files, though this is not supported.
+
+`check'
+     Run the testsuite.  This creates a `testsuite' subdirectory that
+     has various `.sum' and `.log' files containing the results of the
+     testing.  You can run subsets with, for example, `make check-gcc'.
+     You can specify specific tests by setting `RUNTESTFLAGS' to be the
+     name of the `.exp' file, optionally followed by (for some tests)
+     an equals and a file wildcard, like:
+
+          make check-gcc RUNTESTFLAGS="execute.exp=19980413-*"
+
+     Note that running the testsuite may require additional tools be
+     installed, such as Tcl or DejaGnu.
+
+ The toplevel tree from which you start GCC compilation is not the GCC
+directory, but rather a complex Makefile that coordinates the various
+steps of the build, including bootstrapping the compiler and using the
+new compiler to build target libraries.
+
+ When GCC is configured for a native configuration, the default action
+for `make' is to do a full three-stage bootstrap.  This means that GCC
+is built three times--once with the native compiler, once with the
+native-built compiler it just built, and once with the compiler it
+built the second time.  In theory, the last two should produce the same
+results, which `make compare' can check.  Each stage is configured
+separately and compiled into a separate directory, to minimize problems
+due to ABI incompatibilities between the native compiler and GCC.
+
+ If you do a change, rebuilding will also start from the first stage
+and "bubble" up the change through the three stages.  Each stage is
+taken from its build directory (if it had been built previously),
+rebuilt, and copied to its subdirectory.  This will allow you to, for
+example, continue a bootstrap after fixing a bug which causes the
+stage2 build to crash.  It does not provide as good coverage of the
+compiler as bootstrapping from scratch, but it ensures that the new
+code is syntactically correct (e.g., that you did not use GCC extensions
+by mistake), and avoids spurious bootstrap comparison failures(1).
+
+ Other targets available from the top level include:
+
+`bootstrap-lean'
+     Like `bootstrap', except that the various stages are removed once
+     they're no longer needed.  This saves disk space.
+
+`bootstrap2'
+`bootstrap2-lean'
+     Performs only the first two stages of bootstrap.  Unlike a
+     three-stage bootstrap, this does not perform a comparison to test
+     that the compiler is running properly.  Note that the disk space
+     required by a "lean" bootstrap is approximately independent of the
+     number of stages.
+
+`stageN-bubble (N = 1...4)'
+     Rebuild all the stages up to N, with the appropriate flags,
+     "bubbling" the changes as described above.
+
+`all-stageN (N = 1...4)'
+     Assuming that stage N has already been built, rebuild it with the
+     appropriate flags.  This is rarely needed.
+
+`cleanstrap'
+     Remove everything (`make clean') and rebuilds (`make bootstrap').
+
+`compare'
+     Compares the results of stages 2 and 3.  This ensures that the
+     compiler is running properly, since it should produce the same
+     object files regardless of how it itself was compiled.
+
+`profiledbootstrap'
+     Builds a compiler with profiling feedback information.  For more
+     information, see *note Building with profile feedback:
+     (gccinstall)Building.
+
+`restrap'
+     Restart a bootstrap, so that everything that was not built with
+     the system compiler is rebuilt.
+
+`stageN-start (N = 1...4)'
+     For each package that is bootstrapped, rename directories so that,
+     for example, `gcc' points to the stageN GCC, compiled with the
+     stageN-1 GCC(2).
+
+     You will invoke this target if you need to test or debug the
+     stageN GCC.  If you only need to execute GCC (but you need not run
+     `make' either to rebuild it or to run test suites), you should be
+     able to work directly in the `stageN-gcc' directory.  This makes
+     it easier to debug multiple stages in parallel.
+
+`stage'
+     For each package that is bootstrapped, relocate its build directory
+     to indicate its stage.  For example, if the `gcc' directory points
+     to the stage2 GCC, after invoking this target it will be renamed
+     to `stage2-gcc'.
+
+
+ If you wish to use non-default GCC flags when compiling the stage2 and
+stage3 compilers, set `BOOT_CFLAGS' on the command line when doing
+`make'.
+
+ Usually, the first stage only builds the languages that the compiler
+is written in: typically, C and maybe Ada.  If you are debugging a
+miscompilation of a different stage2 front-end (for example, of the
+Fortran front-end), you may want to have front-ends for other languages
+in the first stage as well.  To do so, set `STAGE1_LANGUAGES' on the
+command line when doing `make'.
+
+ For example, in the aforementioned scenario of debugging a Fortran
+front-end miscompilation caused by the stage1 compiler, you may need a
+command like
+
+     make stage2-bubble STAGE1_LANGUAGES=c,fortran
+
+ Alternatively, you can use per-language targets to build and test
+languages that are not enabled by default in stage1.  For example,
+`make f951' will build a Fortran compiler even in the stage1 build
+directory.
+
+ ---------- Footnotes ----------
+
+ (1) Except if the compiler was buggy and miscompiled some of the files
+that were not modified.  In this case, it's best to use `make restrap'.
+
+ (2) Customarily, the system compiler is also termed the `stage0' GCC.
+
+
+File: gccint.info,  Node: Library Files,  Next: Headers,  Prev: Makefile,  Up: gcc Directory
+
+6.3.5 Library Source Files and Headers under the `gcc' Directory
+----------------------------------------------------------------
+
+FIXME: list here, with explanation, all the C source files and headers
+under the `gcc' directory that aren't built into the GCC executable but
+rather are part of runtime libraries and object files, such as
+`crtstuff.c' and `unwind-dw2.c'.  *Note Headers Installed by GCC:
+Headers, for more information about the `ginclude' directory.
+
+
+File: gccint.info,  Node: Headers,  Next: Documentation,  Prev: Library Files,  Up: gcc Directory
+
+6.3.6 Headers Installed by GCC
+------------------------------
+
+In general, GCC expects the system C library to provide most of the
+headers to be used with it.  However, GCC will fix those headers if
+necessary to make them work with GCC, and will install some headers
+required of freestanding implementations.  These headers are installed
+in `LIBSUBDIR/include'.  Headers for non-C runtime libraries are also
+installed by GCC; these are not documented here.  (FIXME: document them
+somewhere.)
+
+ Several of the headers GCC installs are in the `ginclude' directory.
+These headers, `iso646.h', `stdarg.h', `stdbool.h', and `stddef.h', are
+installed in `LIBSUBDIR/include', unless the target Makefile fragment
+(*note Target Fragment::) overrides this by setting `USER_H'.
+
+ In addition to these headers and those generated by fixing system
+headers to work with GCC, some other headers may also be installed in
+`LIBSUBDIR/include'.  `config.gcc' may set `extra_headers'; this
+specifies additional headers under `config' to be installed on some
+systems.
+
+ GCC installs its own version of `<float.h>', from `ginclude/float.h'.
+This is done to cope with command-line options that change the
+representation of floating point numbers.
+
+ GCC also installs its own version of `<limits.h>'; this is generated
+from `glimits.h', together with `limitx.h' and `limity.h' if the system
+also has its own version of `<limits.h>'.  (GCC provides its own header
+because it is required of ISO C freestanding implementations, but needs
+to include the system header from its own header as well because other
+standards such as POSIX specify additional values to be defined in
+`<limits.h>'.)  The system's `<limits.h>' header is used via
+`LIBSUBDIR/include/syslimits.h', which is copied from `gsyslimits.h' if
+it does not need fixing to work with GCC; if it needs fixing,
+`syslimits.h' is the fixed copy.
+
+ GCC can also install `<tgmath.h>'.  It will do this when `config.gcc'
+sets `use_gcc_tgmath' to `yes'.
+
+
+File: gccint.info,  Node: Documentation,  Next: Front End,  Prev: Headers,  Up: gcc Directory
+
+6.3.7 Building Documentation
+----------------------------
+
+The main GCC documentation is in the form of manuals in Texinfo format.
+These are installed in Info format; DVI versions may be generated by
+`make dvi', PDF versions by `make pdf', and HTML versions by `make
+html'.  In addition, some man pages are generated from the Texinfo
+manuals, there are some other text files with miscellaneous
+documentation, and runtime libraries have their own documentation
+outside the `gcc' directory.  FIXME: document the documentation for
+runtime libraries somewhere.
+
+* Menu:
+
+* Texinfo Manuals::      GCC manuals in Texinfo format.
+* Man Page Generation::  Generating man pages from Texinfo manuals.
+* Miscellaneous Docs::   Miscellaneous text files with documentation.
+
+
+File: gccint.info,  Node: Texinfo Manuals,  Next: Man Page Generation,  Up: Documentation
+
+6.3.7.1 Texinfo Manuals
+.......................
+
+The manuals for GCC as a whole, and the C and C++ front ends, are in
+files `doc/*.texi'.  Other front ends have their own manuals in files
+`LANGUAGE/*.texi'.  Common files `doc/include/*.texi' are provided
+which may be included in multiple manuals; the following files are in
+`doc/include':
+
+`fdl.texi'
+     The GNU Free Documentation License.
+
+`funding.texi'
+     The section "Funding Free Software".
+
+`gcc-common.texi'
+     Common definitions for manuals.
+
+`gpl.texi'
+`gpl_v3.texi'
+     The GNU General Public License.
+
+`texinfo.tex'
+     A copy of `texinfo.tex' known to work with the GCC manuals.
+
+ DVI-formatted manuals are generated by `make dvi', which uses
+`texi2dvi' (via the Makefile macro `$(TEXI2DVI)').  PDF-formatted
+manuals are generated by `make pdf', which uses `texi2pdf' (via the
+Makefile macro `$(TEXI2PDF)').  HTML formatted manuals are generated by
+`make html'.  Info manuals are generated by `make info' (which is run
+as part of a bootstrap); this generates the manuals in the source
+directory, using `makeinfo' via the Makefile macro `$(MAKEINFO)', and
+they are included in release distributions.
+
+ Manuals are also provided on the GCC web site, in both HTML and
+PostScript forms.  This is done via the script
+`maintainer-scripts/update_web_docs'.  Each manual to be provided
+online must be listed in the definition of `MANUALS' in that file; a
+file `NAME.texi' must only appear once in the source tree, and the
+output manual must have the same name as the source file.  (However,
+other Texinfo files, included in manuals but not themselves the root
+files of manuals, may have names that appear more than once in the
+source tree.)  The manual file `NAME.texi' should only include other
+files in its own directory or in `doc/include'.  HTML manuals will be
+generated by `makeinfo --html', PostScript manuals by `texi2dvi' and
+`dvips', and PDF manuals by `texi2pdf'.  All Texinfo files that are
+parts of manuals must be version-controlled, even if they are generated
+files, for the generation of online manuals to work.
+
+ The installation manual, `doc/install.texi', is also provided on the
+GCC web site.  The HTML version is generated by the script
+`doc/install.texi2html'.
+
+
+File: gccint.info,  Node: Man Page Generation,  Next: Miscellaneous Docs,  Prev: Texinfo Manuals,  Up: Documentation
+
+6.3.7.2 Man Page Generation
+...........................
+
+Because of user demand, in addition to full Texinfo manuals, man pages
+are provided which contain extracts from those manuals.  These man
+pages are generated from the Texinfo manuals using
+`contrib/texi2pod.pl' and `pod2man'.  (The man page for `g++',
+`cp/g++.1', just contains a `.so' reference to `gcc.1', but all the
+other man pages are generated from Texinfo manuals.)
+
+ Because many systems may not have the necessary tools installed to
+generate the man pages, they are only generated if the `configure'
+script detects that recent enough tools are installed, and the
+Makefiles allow generating man pages to fail without aborting the
+build.  Man pages are also included in release distributions.  They are
+generated in the source directory.
+
+ Magic comments in Texinfo files starting `@c man' control what parts
+of a Texinfo file go into a man page.  Only a subset of Texinfo is
+supported by `texi2pod.pl', and it may be necessary to add support for
+more Texinfo features to this script when generating new man pages.  To
+improve the man page output, some special Texinfo macros are provided
+in `doc/include/gcc-common.texi' which `texi2pod.pl' understands:
+
+`@gcctabopt'
+     Use in the form `@table @gcctabopt' for tables of options, where
+     for printed output the effect of `@code' is better than that of
+     `@option' but for man page output a different effect is wanted.
+
+`@gccoptlist'
+     Use for summary lists of options in manuals.
+
+`@gol'
+     Use at the end of each line inside `@gccoptlist'.  This is
+     necessary to avoid problems with differences in how the
+     `@gccoptlist' macro is handled by different Texinfo formatters.
+
+ FIXME: describe the `texi2pod.pl' input language and magic comments in
+more detail.
+
+
+File: gccint.info,  Node: Miscellaneous Docs,  Prev: Man Page Generation,  Up: Documentation
+
+6.3.7.3 Miscellaneous Documentation
+...................................
+
+In addition to the formal documentation that is installed by GCC, there
+are several other text files in the `gcc' subdirectory with
+miscellaneous documentation:
+
+`ABOUT-GCC-NLS'
+     Notes on GCC's Native Language Support.  FIXME: this should be
+     part of this manual rather than a separate file.
+
+`ABOUT-NLS'
+     Notes on the Free Translation Project.
+
+`COPYING'
+`COPYING3'
+     The GNU General Public License, Versions 2 and 3.
+
+`COPYING.LIB'
+`COPYING3.LIB'
+     The GNU Lesser General Public License, Versions 2.1 and 3.
+
+`*ChangeLog*'
+`*/ChangeLog*'
+     Change log files for various parts of GCC.
+
+`LANGUAGES'
+     Details of a few changes to the GCC front-end interface.  FIXME:
+     the information in this file should be part of general
+     documentation of the front-end interface in this manual.
+
+`ONEWS'
+     Information about new features in old versions of GCC.  (For recent
+     versions, the information is on the GCC web site.)
+
+`README.Portability'
+     Information about portability issues when writing code in GCC.
+     FIXME: why isn't this part of this manual or of the GCC Coding
+     Conventions?
+
+ FIXME: document such files in subdirectories, at least `config', `cp',
+`objc', `testsuite'.
+
+
+File: gccint.info,  Node: Front End,  Next: Back End,  Prev: Documentation,  Up: gcc Directory
+
+6.3.8 Anatomy of a Language Front End
+-------------------------------------
+
+A front end for a language in GCC has the following parts:
+
+   * A directory `LANGUAGE' under `gcc' containing source files for
+     that front end.  *Note The Front End `LANGUAGE' Directory: Front
+     End Directory, for details.
+
+   * A mention of the language in the list of supported languages in
+     `gcc/doc/install.texi'.
+
+   * A mention of the name under which the language's runtime library is
+     recognized by `--enable-shared=PACKAGE' in the documentation of
+     that option in `gcc/doc/install.texi'.
+
+   * A mention of any special prerequisites for building the front end
+     in the documentation of prerequisites in `gcc/doc/install.texi'.
+
+   * Details of contributors to that front end in
+     `gcc/doc/contrib.texi'.  If the details are in that front end's
+     own manual then there should be a link to that manual's list in
+     `contrib.texi'.
+
+   * Information about support for that language in
+     `gcc/doc/frontends.texi'.
+
+   * Information about standards for that language, and the front end's
+     support for them, in `gcc/doc/standards.texi'.  This may be a link
+     to such information in the front end's own manual.
+
+   * Details of source file suffixes for that language and `-x LANG'
+     options supported, in `gcc/doc/invoke.texi'.
+
+   * Entries in `default_compilers' in `gcc.c' for source file suffixes
+     for that language.
+
+   * Preferably testsuites, which may be under `gcc/testsuite' or
+     runtime library directories.  FIXME: document somewhere how to
+     write testsuite harnesses.
+
+   * Probably a runtime library for the language, outside the `gcc'
+     directory.  FIXME: document this further.
+
+   * Details of the directories of any runtime libraries in
+     `gcc/doc/sourcebuild.texi'.
+
+   * Check targets in `Makefile.def' for the top-level `Makefile' to
+     check just the compiler or the compiler and runtime library for the
+     language.
+
+ If the front end is added to the official GCC source repository, the
+following are also necessary:
+
+   * At least one Bugzilla component for bugs in that front end and
+     runtime libraries.  This category needs to be mentioned in
+     `gcc/gccbug.in', as well as being added to the Bugzilla database.
+
+   * Normally, one or more maintainers of that front end listed in
+     `MAINTAINERS'.
+
+   * Mentions on the GCC web site in `index.html' and `frontends.html',
+     with any relevant links on `readings.html'.  (Front ends that are
+     not an official part of GCC may also be listed on
+     `frontends.html', with relevant links.)
+
+   * A news item on `index.html', and possibly an announcement on the
+     <gcc-announce@gcc.gnu.org> mailing list.
+
+   * The front end's manuals should be mentioned in
+     `maintainer-scripts/update_web_docs' (*note Texinfo Manuals::) and
+     the online manuals should be linked to from
+     `onlinedocs/index.html'.
+
+   * Any old releases or CVS repositories of the front end, before its
+     inclusion in GCC, should be made available on the GCC FTP site
+     `ftp://gcc.gnu.org/pub/gcc/old-releases/'.
+
+   * The release and snapshot script `maintainer-scripts/gcc_release'
+     should be updated to generate appropriate tarballs for this front
+     end.  The associated `maintainer-scripts/snapshot-README' and
+     `maintainer-scripts/snapshot-index.html' files should be updated
+     to list the tarballs and diffs for this front end.
+
+   * If this front end includes its own version files that include the
+     current date, `maintainer-scripts/update_version' should be
+     updated accordingly.
+
+* Menu:
+
+* Front End Directory::  The front end `LANGUAGE' directory.
+* Front End Config::     The front end `config-lang.in' file.
+* Front End Makefile::   The front end `Make-lang.in' file.
+
+
+File: gccint.info,  Node: Front End Directory,  Next: Front End Config,  Up: Front End
+
+6.3.8.1 The Front End `LANGUAGE' Directory
+..........................................
+
+A front end `LANGUAGE' directory contains the source files of that
+front end (but not of any runtime libraries, which should be outside
+the `gcc' directory).  This includes documentation, and possibly some
+subsidiary programs built alongside the front end.  Certain files are
+special and other parts of the compiler depend on their names:
+
+`config-lang.in'
+     This file is required in all language subdirectories.  *Note The
+     Front End `config-lang.in' File: Front End Config, for details of
+     its contents
+
+`Make-lang.in'
+     This file is required in all language subdirectories.  *Note The
+     Front End `Make-lang.in' File: Front End Makefile, for details of
+     its contents.
+
+`lang.opt'
+     This file registers the set of switches that the front end accepts
+     on the command line, and their `--help' text.  *Note Options::.
+
+`lang-specs.h'
+     This file provides entries for `default_compilers' in `gcc.c'
+     which override the default of giving an error that a compiler for
+     that language is not installed.
+
+`LANGUAGE-tree.def'
+     This file, which need not exist, defines any language-specific tree
+     codes.
+
+
+File: gccint.info,  Node: Front End Config,  Next: Front End Makefile,  Prev: Front End Directory,  Up: Front End
+
+6.3.8.2 The Front End `config-lang.in' File
+...........................................
+
+Each language subdirectory contains a `config-lang.in' file.  In
+addition the main directory contains `c-config-lang.in', which contains
+limited information for the C language.  This file is a shell script
+that may define some variables describing the language:
+
+`language'
+     This definition must be present, and gives the name of the language
+     for some purposes such as arguments to `--enable-languages'.
+
+`lang_requires'
+     If defined, this variable lists (space-separated) language front
+     ends other than C that this front end requires to be enabled (with
+     the names given being their `language' settings).  For example, the
+     Java front end depends on the C++ front end, so sets
+     `lang_requires=c++'.
+
+`subdir_requires'
+     If defined, this variable lists (space-separated) front end
+     directories other than C that this front end requires to be
+     present.  For example, the Objective-C++ front end uses source
+     files from the C++ and Objective-C front ends, so sets
+     `subdir_requires="cp objc"'.
+
+`target_libs'
+     If defined, this variable lists (space-separated) targets in the
+     top level `Makefile' to build the runtime libraries for this
+     language, such as `target-libobjc'.
+
+`lang_dirs'
+     If defined, this variable lists (space-separated) top level
+     directories (parallel to `gcc'), apart from the runtime libraries,
+     that should not be configured if this front end is not built.
+
+`build_by_default'
+     If defined to `no', this language front end is not built unless
+     enabled in a `--enable-languages' argument.  Otherwise, front ends
+     are built by default, subject to any special logic in
+     `configure.ac' (as is present to disable the Ada front end if the
+     Ada compiler is not already installed).
+
+`boot_language'
+     If defined to `yes', this front end is built in stage1 of the
+     bootstrap.  This is only relevant to front ends written in their
+     own languages.
+
+`compilers'
+     If defined, a space-separated list of compiler executables that
+     will be run by the driver.  The names here will each end with
+     `\$(exeext)'.
+
+`outputs'
+     If defined, a space-separated list of files that should be
+     generated by `configure' substituting values in them.  This
+     mechanism can be used to create a file `LANGUAGE/Makefile' from
+     `LANGUAGE/Makefile.in', but this is deprecated, building
+     everything from the single `gcc/Makefile' is preferred.
+
+`gtfiles'
+     If defined, a space-separated list of files that should be scanned
+     by `gengtype.c' to generate the garbage collection tables and
+     routines for this language.  This excludes the files that are
+     common to all front ends.  *Note Type Information::.
+
+
+
+File: gccint.info,  Node: Front End Makefile,  Prev: Front End Config,  Up: Front End
+
+6.3.8.3 The Front End `Make-lang.in' File
+.........................................
+
+Each language subdirectory contains a `Make-lang.in' file.  It contains
+targets `LANG.HOOK' (where `LANG' is the setting of `language' in
+`config-lang.in') for the following values of `HOOK', and any other
+Makefile rules required to build those targets (which may if necessary
+use other Makefiles specified in `outputs' in `config-lang.in',
+although this is deprecated).  It also adds any testsuite targets that
+can use the standard rule in `gcc/Makefile.in' to the variable
+`lang_checks'.
+
+`all.cross'
+`start.encap'
+`rest.encap'
+     FIXME: exactly what goes in each of these targets?
+
+`tags'
+     Build an `etags' `TAGS' file in the language subdirectory in the
+     source tree.
+
+`info'
+     Build info documentation for the front end, in the build directory.
+     This target is only called by `make bootstrap' if a suitable
+     version of `makeinfo' is available, so does not need to check for
+     this, and should fail if an error occurs.
+
+`dvi'
+     Build DVI documentation for the front end, in the build directory.
+     This should be done using `$(TEXI2DVI)', with appropriate `-I'
+     arguments pointing to directories of included files.
+
+`pdf'
+     Build PDF documentation for the front end, in the build directory.
+     This should be done using `$(TEXI2PDF)', with appropriate `-I'
+     arguments pointing to directories of included files.
+
+`html'
+     Build HTML documentation for the front end, in the build directory.
+
+`man'
+     Build generated man pages for the front end from Texinfo manuals
+     (*note Man Page Generation::), in the build directory.  This target
+     is only called if the necessary tools are available, but should
+     ignore errors so as not to stop the build if errors occur; man
+     pages are optional and the tools involved may be installed in a
+     broken way.
+
+`install-common'
+     Install everything that is part of the front end, apart from the
+     compiler executables listed in `compilers' in `config-lang.in'.
+
+`install-info'
+     Install info documentation for the front end, if it is present in
+     the source directory.  This target should have dependencies on
+     info files that should be installed.
+
+`install-man'
+     Install man pages for the front end.  This target should ignore
+     errors.
+
+`install-plugin'
+     Install headers needed for plugins.
+
+`srcextra'
+     Copies its dependencies into the source directory.  This generally
+     should be used for generated files such as Bison output files
+     which are not version-controlled, but should be included in any
+     release tarballs.  This target will be executed during a bootstrap
+     if `--enable-generated-files-in-srcdir' was specified as a
+     `configure' option.
+
+`srcinfo'
+`srcman'
+     Copies its dependencies into the source directory.  These targets
+     will be executed during a bootstrap if
+     `--enable-generated-files-in-srcdir' was specified as a
+     `configure' option.
+
+`uninstall'
+     Uninstall files installed by installing the compiler.  This is
+     currently documented not to be supported, so the hook need not do
+     anything.
+
+`mostlyclean'
+`clean'
+`distclean'
+`maintainer-clean'
+     The language parts of the standard GNU `*clean' targets.  *Note
+     Standard Targets for Users: (standards)Standard Targets, for
+     details of the standard targets.  For GCC, `maintainer-clean'
+     should delete all generated files in the source directory that are
+     not version-controlled, but should not delete anything that is.
+
+ `Make-lang.in' must also define a variable `LANG_OBJS' to a list of
+host object files that are used by that language.
+
+
+File: gccint.info,  Node: Back End,  Prev: Front End,  Up: gcc Directory
+
+6.3.9 Anatomy of a Target Back End
+----------------------------------
+
+A back end for a target architecture in GCC has the following parts:
+
+   * A directory `MACHINE' under `gcc/config', containing a machine
+     description `MACHINE.md' file (*note Machine Descriptions: Machine
+     Desc.), header files `MACHINE.h' and `MACHINE-protos.h' and a
+     source file `MACHINE.c' (*note Target Description Macros and
+     Functions: Target Macros.), possibly a target Makefile fragment
+     `t-MACHINE' (*note The Target Makefile Fragment: Target
+     Fragment.), and maybe some other files.  The names of these files
+     may be changed from the defaults given by explicit specifications
+     in `config.gcc'.
+
+   * If necessary, a file `MACHINE-modes.def' in the `MACHINE'
+     directory, containing additional machine modes to represent
+     condition codes.  *Note Condition Code::, for further details.
+
+   * An optional `MACHINE.opt' file in the `MACHINE' directory,
+     containing a list of target-specific options.  You can also add
+     other option files using the `extra_options' variable in
+     `config.gcc'.  *Note Options::.
+
+   * Entries in `config.gcc' (*note The `config.gcc' File: System
+     Config.) for the systems with this target architecture.
+
+   * Documentation in `gcc/doc/invoke.texi' for any command-line
+     options supported by this target (*note Run-time Target
+     Specification: Run-time Target.).  This means both entries in the
+     summary table of options and details of the individual options.
+
+   * Documentation in `gcc/doc/extend.texi' for any target-specific
+     attributes supported (*note Defining target-specific uses of
+     `__attribute__': Target Attributes.), including where the same
+     attribute is already supported on some targets, which are
+     enumerated in the manual.
+
+   * Documentation in `gcc/doc/extend.texi' for any target-specific
+     pragmas supported.
+
+   * Documentation in `gcc/doc/extend.texi' of any target-specific
+     built-in functions supported.
+
+   * Documentation in `gcc/doc/extend.texi' of any target-specific
+     format checking styles supported.
+
+   * Documentation in `gcc/doc/md.texi' of any target-specific
+     constraint letters (*note Constraints for Particular Machines:
+     Machine Constraints.).
+
+   * A note in `gcc/doc/contrib.texi' under the person or people who
+     contributed the target support.
+
+   * Entries in `gcc/doc/install.texi' for all target triplets
+     supported with this target architecture, giving details of any
+     special notes about installation for this target, or saying that
+     there are no special notes if there are none.
+
+   * Possibly other support outside the `gcc' directory for runtime
+     libraries.  FIXME: reference docs for this.  The `libstdc++'
+     porting manual needs to be installed as info for this to work, or
+     to be a chapter of this manual.
+
+ If the back end is added to the official GCC source repository, the
+following are also necessary:
+
+   * An entry for the target architecture in `readings.html' on the GCC
+     web site, with any relevant links.
+
+   * Details of the properties of the back end and target architecture
+     in `backends.html' on the GCC web site.
+
+   * A news item about the contribution of support for that target
+     architecture, in `index.html' on the GCC web site.
+
+   * Normally, one or more maintainers of that target listed in
+     `MAINTAINERS'.  Some existing architectures may be unmaintained,
+     but it would be unusual to add support for a target that does not
+     have a maintainer when support is added.
+
+
+File: gccint.info,  Node: Testsuites,  Next: Options,  Prev: Source Tree,  Up: Top
+
+7 Testsuites
+************
+
+GCC contains several testsuites to help maintain compiler quality.
+Most of the runtime libraries and language front ends in GCC have
+testsuites.  Currently only the C language testsuites are documented
+here; FIXME: document the others.
+
+* Menu:
+
+* Test Idioms::     Idioms used in testsuite code.
+* Test Directives:: Directives used within DejaGnu tests.
+* Ada Tests::       The Ada language testsuites.
+* C Tests::         The C language testsuites.
+* libgcj Tests::    The Java library testsuites.
+* LTO Testing::     Support for testing link-time optimizations.
+* gcov Testing::    Support for testing gcov.
+* profopt Testing:: Support for testing profile-directed optimizations.
+* compat Testing::  Support for testing binary compatibility.
+* Torture Tests::   Support for torture testing using multiple options.
+
+
+File: gccint.info,  Node: Test Idioms,  Next: Test Directives,  Up: Testsuites
+
+7.1 Idioms Used in Testsuite Code
+=================================
+
+In general, C testcases have a trailing `-N.c', starting with `-1.c',
+in case other testcases with similar names are added later.  If the
+test is a test of some well-defined feature, it should have a name
+referring to that feature such as `FEATURE-1.c'.  If it does not test a
+well-defined feature but just happens to exercise a bug somewhere in
+the compiler, and a bug report has been filed for this bug in the GCC
+bug database, `prBUG-NUMBER-1.c' is the appropriate form of name.
+Otherwise (for miscellaneous bugs not filed in the GCC bug database),
+and previously more generally, test cases are named after the date on
+which they were added.  This allows people to tell at a glance whether
+a test failure is because of a recently found bug that has not yet been
+fixed, or whether it may be a regression, but does not give any other
+information about the bug or where discussion of it may be found.  Some
+other language testsuites follow similar conventions.
+
+ In the `gcc.dg' testsuite, it is often necessary to test that an error
+is indeed a hard error and not just a warning--for example, where it is
+a constraint violation in the C standard, which must become an error
+with `-pedantic-errors'.  The following idiom, where the first line
+shown is line LINE of the file and the line that generates the error,
+is used for this:
+
+     /* { dg-bogus "warning" "warning in place of error" } */
+     /* { dg-error "REGEXP" "MESSAGE" { target *-*-* } LINE } */
+
+ It may be necessary to check that an expression is an integer constant
+expression and has a certain value.  To check that `E' has value `V',
+an idiom similar to the following is used:
+
+     char x[((E) == (V) ? 1 : -1)];
+
+ In `gcc.dg' tests, `__typeof__' is sometimes used to make assertions
+about the types of expressions.  See, for example,
+`gcc.dg/c99-condexpr-1.c'.  The more subtle uses depend on the exact
+rules for the types of conditional expressions in the C standard; see,
+for example, `gcc.dg/c99-intconst-1.c'.
+
+ It is useful to be able to test that optimizations are being made
+properly.  This cannot be done in all cases, but it can be done where
+the optimization will lead to code being optimized away (for example,
+where flow analysis or alias analysis should show that certain code
+cannot be called) or to functions not being called because they have
+been expanded as built-in functions.  Such tests go in
+`gcc.c-torture/execute'.  Where code should be optimized away, a call
+to a nonexistent function such as `link_failure ()' may be inserted; a
+definition
+
+     #ifndef __OPTIMIZE__
+     void
+     link_failure (void)
+     {
+       abort ();
+     }
+     #endif
+
+will also be needed so that linking still succeeds when the test is run
+without optimization.  When all calls to a built-in function should
+have been optimized and no calls to the non-built-in version of the
+function should remain, that function may be defined as `static' to
+call `abort ()' (although redeclaring a function as static may not work
+on all targets).
+
+ All testcases must be portable.  Target-specific testcases must have
+appropriate code to avoid causing failures on unsupported systems;
+unfortunately, the mechanisms for this differ by directory.
+
+ FIXME: discuss non-C testsuites here.
+
+
+File: gccint.info,  Node: Test Directives,  Next: Ada Tests,  Prev: Test Idioms,  Up: Testsuites
+
+7.2 Directives used within DejaGnu tests
+========================================
+
+* Menu:
+
+* Directives::  Syntax and descriptions of test directives.
+* Selectors:: Selecting targets to which a test applies.
+* Effective-Target Keywords:: Keywords describing target attributes.
+* Add Options:: Features for `dg-add-options'
+* Require Support:: Variants of `dg-require-SUPPORT'
+* Final Actions:: Commands for use in `dg-final'
+
+
+File: gccint.info,  Node: Directives,  Next: Selectors,  Up: Test Directives
+
+7.2.1 Syntax and Descriptions of test directives
+------------------------------------------------
+
+Test directives appear within comments in a test source file and begin
+with `dg-'.  Some of these are defined within DejaGnu and others are
+local to the GCC testsuite.
+
+ The order in which test directives appear in a test can be important:
+directives local to GCC sometimes override information used by the
+DejaGnu directives, which know nothing about the GCC directives, so the
+DejaGnu directives must precede GCC directives.
+
+ Several test directives include selectors (*note Selectors::) which
+are usually preceded by the keyword `target' or `xfail'.
+
+7.2.1.1 Specify how to build the test
+.....................................
+
+`{ dg-do DO-WHAT-KEYWORD [{ target/xfail SELECTOR }] }'
+     DO-WHAT-KEYWORD specifies how the test is compiled and whether it
+     is executed.  It is one of:
+
+    `preprocess'
+          Compile with `-E' to run only the preprocessor.
+
+    `compile'
+          Compile with `-S' to produce an assembly code file.
+
+    `assemble'
+          Compile with `-c' to produce a relocatable object file.
+
+    `link'
+          Compile, assemble, and link to produce an executable file.
+
+    `run'
+          Produce and run an executable file, which is expected to
+          return an exit code of 0.
+
+     The default is `compile'.  That can be overridden for a set of
+     tests by redefining `dg-do-what-default' within the `.exp' file
+     for those tests.
+
+     If the directive includes the optional `{ target SELECTOR }' then
+     the test is skipped unless the target system matches the SELECTOR.
+
+     If DO-WHAT-KEYWORD is `run' and the directive includes the
+     optional `{ xfail SELECTOR }' and the selector is met then the
+     test is expected to fail.  The `xfail' clause is ignored for other
+     values of DO-WHAT-KEYWORD; those tests can use directive
+     `dg-xfail-if'.
+
+7.2.1.2 Specify additional compiler options
+...........................................
+
+`{ dg-options OPTIONS [{ target SELECTOR }] }'
+     This DejaGnu directive provides a list of compiler options, to be
+     used if the target system matches SELECTOR, that replace the
+     default options used for this set of tests.
+
+`{ dg-add-options FEATURE ... }'
+     Add any compiler options that are needed to access certain
+     features.  This directive does nothing on targets that enable the
+     features by default, or that don't provide them at all.  It must
+     come after all `dg-options' directives.  For supported values of
+     FEATURE see *note Add Options::.
+
+7.2.1.3 Modify the test timeout value
+.....................................
+
+The normal timeout limit, in seconds, is found by searching the
+following in order:
+
+   * the value defined by an earlier `dg-timeout' directive in the test
+
+   * variable TOOL_TIMEOUT defined by the set of tests
+
+   * GCC,TIMEOUT set in the target board
+
+   * 300
+
+`{ dg-timeout N [{target SELECTOR }] }'
+     Set the time limit for the compilation and for the execution of
+     the test to the specified number of seconds.
+
+`{ dg-timeout-factor X [{ target SELECTOR }] }'
+     Multiply the normal time limit for compilation and execution of
+     the test by the specified floating-point factor.
+
+7.2.1.4 Skip a test for some targets
+....................................
+
+`{ dg-skip-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Arguments INCLUDE-OPTS and EXCLUDE-OPTS are lists in which each
+     element is a string of zero or more GCC options.  Skip the test if
+     all of the following conditions are met:
+        * the test system is included in SELECTOR
+
+        * for at least one of the option strings in INCLUDE-OPTS, every
+          option from that string is in the set of options with which
+          the test would be compiled; use `"*"' for an INCLUDE-OPTS list
+          that matches any options; that is the default if INCLUDE-OPTS
+          is not specified
+
+        * for each of the option strings in EXCLUDE-OPTS, at least one
+          option from that string is not in the set of options with
+          which the test would be compiled; use `""' for an empty
+          EXCLUDE-OPTS list; that is the default if EXCLUDE-OPTS is not
+          specified
+
+     For example, to skip a test if option `-Os' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-Os" } { "" } } */
+
+     To skip a test if both options `-O2' and `-g' are present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2 -g" } { "" } } */
+
+     To skip a test if either `-O2' or `-O3' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2" "-O3" } { "" } } */
+
+     To skip a test unless option `-Os' is present:
+
+          /* { dg-skip-if "" { *-*-* }  { "*" } { "-Os" } } */
+
+     To skip a test if either `-O2' or `-O3' is used with `-g' but not
+     if `-fpic' is also present:
+
+          /* { dg-skip-if "" { *-*-* }  { "-O2 -g" "-O3 -g" } { "-fpic" } } */
+
+`{ dg-require-effective-target KEYWORD [{ SELECTOR }] }'
+     Skip the test if the test target, including current multilib flags,
+     is not covered by the effective-target keyword.  If the directive
+     includes the optional `{ SELECTOR }' then the effective-target
+     test is only performed if the target system matches the SELECTOR.
+     This directive must appear after any `dg-do' directive in the test
+     and before any `dg-additional-sources' directive.  *Note
+     Effective-Target Keywords::.
+
+`{ dg-require-SUPPORT args }'
+     Skip the test if the target does not provide the required support.
+     These directives must appear after any `dg-do' directive in the
+     test and before any `dg-additional-sources' directive.  They
+     require at least one argument, which can be an empty string if the
+     specific procedure does not examine the argument.  *Note Require
+     Support::, for a complete list of these directives.
+
+7.2.1.5 Expect a test to fail for some targets
+..............................................
+
+`{ dg-xfail-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Expect the test to fail if the conditions (which are the same as
+     for `dg-skip-if') are met.  This does not affect the execute step.
+
+`{ dg-xfail-run-if COMMENT { SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]] }'
+     Expect the execute step of a test to fail if the conditions (which
+     are the same as for `dg-skip-if') are met.
+
+7.2.1.6 Expect the test executable to fail
+..........................................
+
+`{ dg-shouldfail COMMENT [{ SELECTOR } [{ INCLUDE-OPTS } [{ EXCLUDE-OPTS }]]] }'
+     Expect the test executable to return a nonzero exit status if the
+     conditions (which are the same as for `dg-skip-if') are met.
+
+7.2.1.7 Verify compiler messages
+................................
+
+`{ dg-error REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that is expected
+     to get an error message, or else specifies the source line
+     associated with the message.  If there is no message for that line
+     or if the text of that message is not matched by REGEXP then the
+     check fails and COMMENT is included in the `FAIL' message.  The
+     check does not look for the string `error' unless it is part of
+     REGEXP.
+
+`{ dg-warning REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that is expected
+     to get a warning message, or else specifies the source line
+     associated with the message.  If there is no message for that line
+     or if the text of that message is not matched by REGEXP then the
+     check fails and COMMENT is included in the `FAIL' message.  The
+     check does not look for the string `warning' unless it is part of
+     REGEXP.
+
+`{ dg-message REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     The line is expected to get a message other than an error or
+     warning.  If there is no message for that line or if the text of
+     that message is not matched by REGEXP then the check fails and
+     COMMENT is included in the `FAIL' message.
+
+`{ dg-bogus REGEXP [COMMENT [{ target/xfail SELECTOR } [LINE] }]] }'
+     This DejaGnu directive appears on a source line that should not
+     get a message matching REGEXP, or else specifies the source line
+     associated with the bogus message.  It is usually used with `xfail'
+     to indicate that the message is a known problem for a particular
+     set of targets.
+
+`{ dg-excess-errors COMMENT [{ target/xfail SELECTOR }] }'
+     This DejaGnu directive indicates that the test is expected to fail
+     due to compiler messages that are not handled by `dg-error',
+     `dg-warning' or `dg-bogus'.  For this directive `xfail' has the
+     same effect as `target'.
+
+`{ dg-prune-output REGEXP }'
+     Prune messages matching REGEXP from the test output.
+
+7.2.1.8 Verify output of the test executable
+............................................
+
+`{ dg-output REGEXP [{ target/xfail SELECTOR }] }'
+     This DejaGnu directive compares REGEXP to the combined output that
+     the test executable writes to `stdout' and `stderr'.
+
+7.2.1.9 Specify additional files for a test
+...........................................
+
+`{ dg-additional-files "FILELIST" }'
+     Specify additional files, other than source files, that must be
+     copied to the system where the compiler runs.
+
+`{ dg-additional-sources "FILELIST" }'
+     Specify additional source files to appear in the compile line
+     following the main test file.
+
+7.2.1.10 Add checks at the end of a test
+........................................
+
+`{ dg-final { LOCAL-DIRECTIVE } }'
+     This DejaGnu directive is placed within a comment anywhere in the
+     source file and is processed after the test has been compiled and
+     run.  Multiple `dg-final' commands are processed in the order in
+     which they appear in the source file.  *Note Final Actions::, for
+     a list of directives that can be used within `dg-final'.
+
+
+File: gccint.info,  Node: Selectors,  Next: Effective-Target Keywords,  Prev: Directives,  Up: Test Directives
+
+7.2.2 Selecting targets to which a test applies
+-----------------------------------------------
+
+Several test directives include SELECTORs to limit the targets for
+which a test is run or to declare that a test is expected to fail on
+particular targets.
+
+ A selector is:
+   * one or more target triplets, possibly including wildcard characters
+
+   * a single effective-target keyword (*note Effective-Target
+     Keywords::)
+
+   * a logical expression
+
+ Depending on the context, the selector specifies whether a test is
+skipped and reported as unsupported or is expected to fail.  Use
+`*-*-*' to match any target.
+
+ A selector expression appears within curly braces and uses a single
+logical operator: one of `!', `&&', or `||'.  An operand is another
+selector expression, an effective-target keyword, a single target
+triplet, or a list of target triplets within quotes or curly braces.
+For example:
+
+     { target { ! "hppa*-*-* ia64*-*-*" } }
+     { target { powerpc*-*-* && lp64 } }
+     { xfail { lp64 || vect_no_align } }
+
+
+File: gccint.info,  Node: Effective-Target Keywords,  Next: Add Options,  Prev: Selectors,  Up: Test Directives
+
+7.2.3 Keywords describing target attributes
+-------------------------------------------
+
+Effective-target keywords identify sets of targets that support
+particular functionality.  They are used to limit tests to be run only
+for particular targets, or to specify that particular sets of targets
+are expected to fail some tests.
+
+ Effective-target keywords are defined in `lib/target-supports.exp' in
+the GCC testsuite, with the exception of those that are documented as
+being local to a particular test directory.
+
+ The `effective target' takes into account all of the compiler options
+with which the test will be compiled, including the multilib options.
+By convention, keywords ending in `_nocache' can also include options
+specified for the particular test in an earlier `dg-options' or
+`dg-add-options' directive.
+
+7.2.3.1 Data type sizes
+.......................
+
+`ilp32'
+     Target has 32-bit `int', `long', and pointers.
+
+`lp64'
+     Target has 32-bit `int', 64-bit `long' and pointers.
+
+`llp64'
+     Target has 32-bit `int' and `long', 64-bit `long long' and
+     pointers.
+
+`double64'
+     Target has 64-bit `double'.
+
+`double64plus'
+     Target has `double' that is 64 bits or longer.
+
+`int32plus'
+     Target has `int' that is at 32 bits or longer.
+
+`int16'
+     Target has `int' that is 16 bits or shorter.
+
+`large_double'
+     Target supports `double' that is longer than `float'.
+
+`large_long_double'
+     Target supports `long double' that is longer than `double'.
+
+`ptr32plus'
+     Target has pointers that are 32 bits or longer.
+
+`size32plus'
+     Target supports array and structure sizes that are 32 bits or
+     longer.
+
+`4byte_wchar_t'
+     Target has `wchar_t' that is at least 4 bytes.
+
+7.2.3.2 Fortran-specific attributes
+...................................
+
+`fortran_integer_16'
+     Target supports Fortran `integer' that is 16 bytes or longer.
+
+`fortran_large_int'
+     Target supports Fortran `integer' kinds larger than `integer(8)'.
+
+`fortran_large_real'
+     Target supports Fortran `real' kinds larger than `real(8)'.
+
+7.2.3.3 Vector-specific attributes
+..................................
+
+`vect_condition'
+     Target supports vector conditional operations.
+
+`vect_double'
+     Target supports hardware vectors of `double'.
+
+`vect_float'
+     Target supports hardware vectors of `float'.
+
+`vect_int'
+     Target supports hardware vectors of `int'.
+
+`vect_int_mult'
+     Target supports a vector widening multiplication of `short'
+     operands into an `int' result, or supports promotion (unpacking)
+     from `short' to `int' and a non-widening multiplication of `int'.
+
+`vect_long'
+     Target supports hardware vectors of `long'.
+
+`vect_long_long'
+     Target supports hardware vectors of `long long'.
+
+`vect_aligned_arrays'
+     Target aligns arrays to vector alignment boundary.
+
+`vect_hw_misalign'
+     Target supports a vector misalign access.
+
+`vect_no_align'
+     Target does not support a vector alignment mechanism.
+
+`vect_no_int_max'
+     Target does not support a vector max instruction on `int'.
+
+`vect_no_int_add'
+     Target does not support a vector add instruction on `int'.
+
+`vect_no_bitwise'
+     Target does not support vector bitwise instructions.
+
+`vect_char_mult'
+     Target supports `vector char' multiplication.
+
+`vect_short_mult'
+     Target supports `vector short' multiplication.
+
+`vect_int_mult'
+     Target supports `vector int' multiplication.
+
+`vect_extract_even_odd'
+     Target supports vector even/odd element extraction.
+
+`vect_extract_even_odd_wide'
+     Target supports vector even/odd element extraction of vectors with
+     elements `SImode' or larger.
+
+`vect_interleave'
+     Target supports vector interleaving.
+
+`vect_strided'
+     Target supports vector interleaving and extract even/odd.
+
+`vect_strided_wide'
+     Target supports vector interleaving and extract even/odd for wide
+     element types.
+
+`vect_perm'
+     Target supports vector permutation.
+
+`vect_shift'
+     Target supports a hardware vector shift operation.
+
+`vect_widen_sum_hi_to_si'
+     Target supports a vector widening summation of `short' operands
+     into `int' results, or can promote (unpack) from `short' to `int'.
+
+`vect_widen_sum_qi_to_hi'
+     Target supports a vector widening summation of `char' operands
+     into `short' results, or can promote (unpack) from `char' to
+     `short'.
+
+`vect_widen_sum_qi_to_si'
+     Target supports a vector widening summation of `char' operands
+     into `int' results.
+
+`vect_widen_mult_qi_to_hi'
+     Target supports a vector widening multiplication of `char' operands
+     into `short' results, or can promote (unpack) from `char' to
+     `short' and perform non-widening multiplication of `short'.
+
+`vect_widen_mult_hi_to_si'
+     Target supports a vector widening multiplication of `short'
+     operands into `int' results, or can promote (unpack) from `short'
+     to `int' and perform non-widening multiplication of `int'.
+
+`vect_sdot_qi'
+     Target supports a vector dot-product of `signed char'.
+
+`vect_udot_qi'
+     Target supports a vector dot-product of `unsigned char'.
+
+`vect_sdot_hi'
+     Target supports a vector dot-product of `signed short'.
+
+`vect_udot_hi'
+     Target supports a vector dot-product of `unsigned short'.
+
+`vect_pack_trunc'
+     Target supports a vector demotion (packing) of `short' to `char'
+     and from `int' to `short' using modulo arithmetic.
+
+`vect_unpack'
+     Target supports a vector promotion (unpacking) of `char' to `short'
+     and from `char' to `int'.
+
+`vect_intfloat_cvt'
+     Target supports conversion from `signed int' to `float'.
+
+`vect_uintfloat_cvt'
+     Target supports conversion from `unsigned int' to `float'.
+
+`vect_floatint_cvt'
+     Target supports conversion from `float' to `signed int'.
+
+`vect_floatuint_cvt'
+     Target supports conversion from `float' to `unsigned int'.
+
+7.2.3.4 Thread Local Storage attributes
+.......................................
+
+`tls'
+     Target supports thread-local storage.
+
+`tls_native'
+     Target supports native (rather than emulated) thread-local storage.
+
+`tls_runtime'
+     Test system supports executing TLS executables.
+
+7.2.3.5 Decimal floating point attributes
+.........................................
+
+`dfp'
+     Targets supports compiling decimal floating point extension to C.
+
+`dfp_nocache'
+     Including the options used to compile this particular test, the
+     target supports compiling decimal floating point extension to C.
+
+`dfprt'
+     Test system can execute decimal floating point tests.
+
+`dfprt_nocache'
+     Including the options used to compile this particular test, the
+     test system can execute decimal floating point tests.
+
+`hard_dfp'
+     Target generates decimal floating point instructions with current
+     options.
+
+7.2.3.6 ARM-specific attributes
+...............................
+
+`arm32'
+     ARM target generates 32-bit code.
+
+`arm_eabi'
+     ARM target adheres to the ABI for the ARM Architecture.
+
+`arm_hard_vfp_ok'
+     ARM target supports `-mfpu=vfp -mfloat-abi=hard'.  Some multilibs
+     may be incompatible with these options.
+
+`arm_iwmmxt_ok'
+     ARM target supports `-mcpu=iwmmxt'.  Some multilibs may be
+     incompatible with this option.
+
+`arm_neon'
+     ARM target supports generating NEON instructions.
+
+`arm_neon_hw'
+     Test system supports executing NEON instructions.
+
+`arm_neon_ok'
+     ARM Target supports `-mfpu=neon -mfloat-abi=softfp'.  Some
+     multilibs may be incompatible with these options.
+
+`arm_thumb1_ok'
+     ARM target generates Thumb-1 code for `-mthumb'.
+
+`arm_thumb2_ok'
+     ARM target generates Thumb-2 code for `-mthumb'.
+
+`arm_vfp_ok'
+     ARM target supports `-mfpu=vfp -mfloat-abi=softfp'.  Some
+     multilibs may be incompatible with these options.
+
+7.2.3.7 MIPS-specific attributes
+................................
+
+`mips64'
+     MIPS target supports 64-bit instructions.
+
+`nomips16'
+     MIPS target does not produce MIPS16 code.
+
+`mips16_attribute'
+     MIPS target can generate MIPS16 code.
+
+`mips_loongson'
+     MIPS target is a Loongson-2E or -2F target using an ABI that
+     supports the Loongson vector modes.
+
+`mips_newabi_large_long_double'
+     MIPS target supports `long double' larger than `double' when using
+     the new ABI.
+
+`mpaired_single'
+     MIPS target supports `-mpaired-single'.
+
+7.2.3.8 PowerPC-specific attributes
+...................................
+
+`powerpc64'
+     Test system supports executing 64-bit instructions.
+
+`powerpc_altivec'
+     PowerPC target supports AltiVec.
+
+`powerpc_altivec_ok'
+     PowerPC target supports `-maltivec'.
+
+`powerpc_fprs'
+     PowerPC target supports floating-point registers.
+
+`powerpc_hard_double'
+     PowerPC target supports hardware double-precision floating-point.
+
+`powerpc_ppu_ok'
+     PowerPC target supports `-mcpu=cell'.
+
+`powerpc_spe'
+     PowerPC target supports PowerPC SPE.
+
+`powerpc_spe_nocache'
+     Including the options used to compile this particular test, the
+     PowerPC target supports PowerPC SPE.
+
+`powerpc_spu'
+     PowerPC target supports PowerPC SPU.
+
+`spu_auto_overlay'
+     SPU target has toolchain that supports automatic overlay
+     generation.
+
+`powerpc_vsx_ok'
+     PowerPC target supports `-mvsx'.
+
+`powerpc_405_nocache'
+     Including the options used to compile this particular test, the
+     PowerPC target supports PowerPC 405.
+
+`vmx_hw'
+     PowerPC target supports executing AltiVec instructions.
+
+7.2.3.9 Other hardware attributes
+.................................
+
+`avx'
+     Target supports compiling AVX instructions.
+
+`cell_hw'
+     Test system can execute AltiVec and Cell PPU instructions.
+
+`coldfire_fpu'
+     Target uses a ColdFire FPU.
+
+`hard_float'
+     Target supports FPU instructions.
+
+`sse'
+     Target supports compiling `sse' instructions.
+
+`sse_runtime'
+     Target supports the execution of `sse' instructions.
+
+`sse2'
+     Target supports compiling `sse2' instructions.
+
+`sse2_runtime'
+     Target supports the execution of `sse2' instructions.
+
+`sync_char_short'
+     Target supports atomic operations on `char' and `short'.
+
+`sync_int_long'
+     Target supports atomic operations on `int' and `long'.
+
+`ultrasparc_hw'
+     Test environment appears to run executables on a simulator that
+     accepts only `EM_SPARC' executables and chokes on `EM_SPARC32PLUS'
+     or `EM_SPARCV9' executables.
+
+`vect_cmdline_needed'
+     Target requires a command line argument to enable a SIMD
+     instruction set.
+
+7.2.3.10 Environment attributes
+...............................
+
+`c'
+     The language for the compiler under test is C.
+
+`c++'
+     The language for the compiler under test is C++.
+
+`c99_runtime'
+     Target provides a full C99 runtime.
+
+`correct_iso_cpp_string_wchar_protos'
+     Target `string.h' and `wchar.h' headers provide C++ required
+     overloads for `strchr' etc. functions.
+
+`dummy_wcsftime'
+     Target uses a dummy `wcsftime' function that always returns zero.
+
+`fd_truncate'
+     Target can truncate a file from a file descriptor, as used by
+     `libgfortran/io/unix.c:fd_truncate'; i.e. `ftruncate' or `chsize'.
+
+`freestanding'
+     Target is `freestanding' as defined in section 4 of the C99
+     standard.  Effectively, it is a target which supports no extra
+     headers or libraries other than what is considered essential.
+
+`init_priority'
+     Target supports constructors with initialization priority
+     arguments.
+
+`inttypes_types'
+     Target has the basic signed and unsigned types in `inttypes.h'.
+     This is for tests that GCC's notions of these types agree with
+     those in the header, as some systems have only `inttypes.h'.
+
+`lax_strtofp'
+     Target might have errors of a few ULP in string to floating-point
+     conversion functions and overflow is not always detected correctly
+     by those functions.
+
+`newlib'
+     Target supports Newlib.
+
+`pow10'
+     Target provides `pow10' function.
+
+`pthread'
+     Target can compile using `pthread.h' with no errors or warnings.
+
+`pthread_h'
+     Target has `pthread.h'.
+
+`simulator'
+     Test system runs executables on a simulator (i.e. slowly) rather
+     than hardware (i.e. fast).
+
+`stdint_types'
+     Target has the basic signed and unsigned C types in `stdint.h'.
+     This will be obsolete when GCC ensures a working `stdint.h' for
+     all targets.
+
+`trampolines'
+     Target supports trampolines.
+
+`uclibc'
+     Target supports uClibc.
+
+`unwrapped'
+     Target does not use a status wrapper.
+
+`vxworks_kernel'
+     Target is a VxWorks kernel.
+
+`vxworks_rtp'
+     Target is a VxWorks RTP.
+
+`wchar'
+     Target supports wide characters.
+
+7.2.3.11 Other attributes
+.........................
+
+`automatic_stack_alignment'
+     Target supports automatic stack alignment.
+
+`cxa_atexit'
+     Target uses `__cxa_atexit'.
+
+`default_packed'
+     Target has packed layout of structure members by default.
+
+`fgraphite'
+     Target supports Graphite optimizations.
+
+`fixed_point'
+     Target supports fixed-point extension to C.
+
+`fopenmp'
+     Target supports OpenMP via `-fopenmp'.
+
+`fpic'
+     Target supports `-fpic' and `-fPIC'.
+
+`freorder'
+     Target supports `-freorder-blocks-and-partition'.
+
+`fstack_protector'
+     Target supports `-fstack-protector'.
+
+`gas'
+     Target uses GNU `as'.
+
+`gc_sections'
+     Target supports `--gc-sections'.
+
+`keeps_null_pointer_checks'
+     Target keeps null pointer checks, either due to the use of
+     `-fno-delete-null-pointer-checks' or hardwired into the target.
+
+`lto'
+     Compiler has been configured to support link-time optimization
+     (LTO).
+
+`named_sections'
+     Target supports named sections.
+
+`natural_alignment_32'
+     Target uses natural alignment (aligned to type size) for types of
+     32 bits or less.
+
+`target_natural_alignment_64'
+     Target uses natural alignment (aligned to type size) for types of
+     64 bits or less.
+
+`nonpic'
+     Target does not generate PIC by default.
+
+`pcc_bitfield_type_matters'
+     Target defines `PCC_BITFIELD_TYPE_MATTERS'.
+
+`pe_aligned_commons'
+     Target supports `-mpe-aligned-commons'.
+
+`section_anchors'
+     Target supports section anchors.
+
+`short_enums'
+     Target defaults to short enums.
+
+`static'
+     Target supports `-static'.
+
+`static_libgfortran'
+     Target supports statically linking `libgfortran'.
+
+`string_merging'
+     Target supports merging string constants at link time.
+
+`ucn'
+     Target supports compiling and assembling UCN.
+
+`ucn_nocache'
+     Including the options used to compile this particular test, the
+     target supports compiling and assembling UCN.
+
+`unaligned_stack'
+     Target does not guarantee that its `STACK_BOUNDARY' is greater than
+     or equal to the required vector alignment.
+
+`vector_alignment_reachable'
+     Vector alignment is reachable for types of 32 bits or less.
+
+`vector_alignment_reachable_for_64bit'
+     Vector alignment is reachable for types of 64 bits or less.
+
+`wchar_t_char16_t_compatible'
+     Target supports `wchar_t' that is compatible with `char16_t'.
+
+`wchar_t_char32_t_compatible'
+     Target supports `wchar_t' that is compatible with `char32_t'.
+
+7.2.3.12 Local to tests in `gcc.target/i386'
+............................................
+
+`3dnow'
+     Target supports compiling `3dnow' instructions.
+
+`aes'
+     Target supports compiling `aes' instructions.
+
+`fma4'
+     Target supports compiling `fma4' instructions.
+
+`ms_hook_prologue'
+     Target supports attribute `ms_hook_prologue'.
+
+`pclmul'
+     Target supports compiling `pclmul' instructions.
+
+`sse3'
+     Target supports compiling `sse3' instructions.
+
+`sse4'
+     Target supports compiling `sse4' instructions.
+
+`sse4a'
+     Target supports compiling `sse4a' instructions.
+
+`ssse3'
+     Target supports compiling `ssse3' instructions.
+
+`vaes'
+     Target supports compiling `vaes' instructions.
+
+`vpclmul'
+     Target supports compiling `vpclmul' instructions.
+
+`xop'
+     Target supports compiling `xop' instructions.
+
+7.2.3.13 Local to tests in `gcc.target/spu/ea'
+..............................................
+
+`ealib'
+     Target `__ea' library functions are available.
+
+7.2.3.14 Local to tests in `gcc.test-framework'
+...............................................
+
+`no'
+     Always returns 0.
+
+`yes'
+     Always returns 1.
+
+
+File: gccint.info,  Node: Add Options,  Next: Require Support,  Prev: Effective-Target Keywords,  Up: Test Directives
+
+7.2.4 Features for `dg-add-options'
+-----------------------------------
+
+The supported values of FEATURE for directive `dg-add-options' are:
+
+`bind_pic_locally'
+     Add the target-specific flags needed to enable functions to bind
+     locally when using pic/PIC passes in the testsuite.
+
+`c99_runtime'
+     Add the target-specific flags needed to access the C99 runtime.
+
+`ieee'
+     Add the target-specific flags needed to enable full IEEE
+     compliance mode.
+
+`mips16_attribute'
+     `mips16' function attributes.  Only MIPS targets support this
+     feature, and only then in certain modes.
+
+
+File: gccint.info,  Node: Require Support,  Next: Final Actions,  Prev: Add Options,  Up: Test Directives
+
+7.2.5 Variants of `dg-require-SUPPORT'
+--------------------------------------
+
+A few of the `dg-require' directives take arguments.
+
+`dg-require-iconv CODESET'
+     Skip the test if the target does not support iconv.  CODESET is
+     the codeset to convert to.
+
+`dg-require-profiling PROFOPT'
+     Skip the test if the target does not support profiling with option
+     PROFOPT.
+
+`dg-require-visibility VIS'
+     Skip the test if the target does not support the `visibility'
+     attribute.  If VIS is `""', support for `visibility("hidden")' is
+     checked, for `visibility("VIS")' otherwise.
+
+ The original `dg-require' directives were defined before there was
+support for effective-target keywords.  The directives that do not take
+arguments could be replaced with effective-target keywords.
+
+`dg-require-alias ""'
+     Skip the test if the target does not support the `alias' attribute.
+
+`dg-require-compat-dfp ""'
+     Skip this test unless both compilers in a `compat' testsuite
+     support decimal floating point.
+
+`dg-require-cxa-atexit ""'
+     Skip the test if the target does not support `__cxa_atexit'.  This
+     is equivalent to `dg-require-effective-target cxa_atexit'.
+
+`dg-require-dll ""'
+     Skip the test if the target does not support DLL attributes.
+
+`dg-require-fork ""'
+     Skip the test if the target does not support `fork'.
+
+`dg-require-gc-sections ""'
+     Skip the test if the target's linker does not support the
+     `--gc-sections' flags.  This is equivalent to
+     `dg-require-effective-target gc-sections'.
+
+`dg-require-host-local ""'
+     Skip the test if the host is remote, rather than the same as the
+     build system.  Some tests are incompatible with DejaGnu's handling
+     of remote hosts, which involves copying the source file to the
+     host and compiling it with a relative path and "`-o a.out'".
+
+`dg-require-mkfifo ""'
+     Skip the test if the target does not support `mkfifo'.
+
+`dg-require-named-sections ""'
+     Skip the test is the target does not support named sections.  This
+     is equivalent to `dg-require-effective-target named_sections'.
+
+`dg-require-weak ""'
+     Skip the test if the target does not support weak symbols.
+
+`dg-require-weak-override ""'
+     Skip the test if the target does not support overriding weak
+     symbols.
+
+
+File: gccint.info,  Node: Final Actions,  Prev: Require Support,  Up: Test Directives
+
+7.2.6 Commands for use in `dg-final'
+------------------------------------
+
+The GCC testsuite defines the following directives to be used within
+`dg-final'.
+
+7.2.6.1 Scan a particular file
+..............................
+
+`scan-file FILENAME REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP matches text in FILENAME.
+
+`scan-file-not FILENAME REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP does not match text in FILENAME.
+
+`scan-module MODULE REGEXP [{ target/xfail SELECTOR }]'
+     Passes if REGEXP matches in Fortran module MODULE.
+
+7.2.6.2 Scan the assembly output
+................................
+
+`scan-assembler REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the test's assembler output.
+
+`scan-assembler-not REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the test's assembler output.
+
+`scan-assembler-times REGEX NUM [{ target/xfail SELECTOR }]'
+     Passes if REGEX is matched exactly NUM times in the test's
+     assembler output.
+
+`scan-assembler-dem REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the test's demangled assembler
+     output.
+
+`scan-assembler-dem-not REGEX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the test's demangled
+     assembler output.
+
+`scan-hidden SYMBOL [{ target/xfail SELECTOR }]'
+     Passes if SYMBOL is defined as a hidden symbol in the test's
+     assembly output.
+
+`scan-not-hidden SYMBOL [{ target/xfail SELECTOR }]'
+     Passes if SYMBOL is not defined as a hidden symbol in the test's
+     assembly output.
+
+7.2.6.3 Scan optimization dump files
+....................................
+
+These commands are available for KIND of `tree', `rtl', and `ipa'.
+
+`scan-KIND-dump REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches text in the dump file with suffix SUFFIX.
+
+`scan-KIND-dump-not REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match text in the dump file with suffix
+     SUFFIX.
+
+`scan-KIND-dump-times REGEX NUM SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX is found exactly NUM times in the dump file with
+     suffix SUFFIX.
+
+`scan-KIND-dump-dem REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX matches demangled text in the dump file with
+     suffix SUFFIX.
+
+`scan-KIND-dump-dem-not REGEX SUFFIX [{ target/xfail SELECTOR }]'
+     Passes if REGEX does not match demangled text in the dump file with
+     suffix SUFFIX.
+
+7.2.6.4 Verify that an output files exists or not
+.................................................
+
+`output-exists [{ target/xfail SELECTOR }]'
+     Passes if compiler output file exists.
+
+`output-exists-not [{ target/xfail SELECTOR }]'
+     Passes if compiler output file does not exist.
+
+7.2.6.5 Check for LTO tests
+...........................
+
+`scan-symbol REGEXP [{ target/xfail SELECTOR }]'
+     Passes if the pattern is present in the final executable.
+
+7.2.6.6 Checks for `gcov' tests
+...............................
+
+`run-gcov SOURCEFILE'
+     Check line counts in `gcov' tests.
+
+`run-gcov [branches] [calls] { OPTS SOURCEFILE }'
+     Check branch and/or call counts, in addition to line counts, in
+     `gcov' tests.
+
+7.2.6.7 Clean up generated test files
+.....................................
+
+`cleanup-coverage-files'
+     Removes coverage data files generated for this test.
+
+`cleanup-ipa-dump SUFFIX'
+     Removes IPA dump files generated for this test.
+
+`cleanup-modules'
+     Removes Fortran module files generated for this test.
+
+`cleanup-profile-file'
+     Removes profiling files generated for this test.
+
+`cleanup-repo-files'
+     Removes files generated for this test for `-frepo'.
+
+`cleanup-rtl-dump SUFFIX'
+     Removes RTL dump files generated for this test.
+
+`cleanup-saved-temps'
+     Removes files for the current test which were kept for
+     `-save-temps'.
+
+`cleanup-tree-dump SUFFIX'
+     Removes tree dump files matching SUFFIX which were generated for
+     this test.
+
+
+File: gccint.info,  Node: Ada Tests,  Next: C Tests,  Prev: Test Directives,  Up: Testsuites
+
+7.3 Ada Language Testsuites
+===========================
+
+The Ada testsuite includes executable tests from the ACATS 2.5
+testsuite, publicly available at
+`http://www.adaic.org/compilers/acats/2.5'.
+
+ These tests are integrated in the GCC testsuite in the `ada/acats'
+directory, and enabled automatically when running `make check', assuming
+the Ada language has been enabled when configuring GCC.
+
+ You can also run the Ada testsuite independently, using `make
+check-ada', or run a subset of the tests by specifying which chapter to
+run, e.g.:
+
+     $ make check-ada CHAPTERS="c3 c9"
+
+ The tests are organized by directory, each directory corresponding to
+a chapter of the Ada Reference Manual.  So for example, `c9' corresponds
+to chapter 9, which deals with tasking features of the language.
+
+ There is also an extra chapter called `gcc' containing a template for
+creating new executable tests, although this is deprecated in favor of
+the `gnat.dg' testsuite.
+
+ The tests are run using two `sh' scripts: `run_acats' and
+`run_all.sh'.  To run the tests using a simulator or a cross target,
+see the small customization section at the top of `run_all.sh'.
+
+ These tests are run using the build tree: they can be run without doing
+a `make install'.
+
+
+File: gccint.info,  Node: C Tests,  Next: libgcj Tests,  Prev: Ada Tests,  Up: Testsuites
+
+7.4 C Language Testsuites
+=========================
+
+GCC contains the following C language testsuites, in the
+`gcc/testsuite' directory:
+
+`gcc.dg'
+     This contains tests of particular features of the C compiler,
+     using the more modern `dg' harness.  Correctness tests for various
+     compiler features should go here if possible.
+
+     Magic comments determine whether the file is preprocessed,
+     compiled, linked or run.  In these tests, error and warning
+     message texts are compared against expected texts or regular
+     expressions given in comments.  These tests are run with the
+     options `-ansi -pedantic' unless other options are given in the
+     test.  Except as noted below they are not run with multiple
+     optimization options.
+
+`gcc.dg/compat'
+     This subdirectory contains tests for binary compatibility using
+     `lib/compat.exp', which in turn uses the language-independent
+     support (*note Support for testing binary compatibility: compat
+     Testing.).
+
+`gcc.dg/cpp'
+     This subdirectory contains tests of the preprocessor.
+
+`gcc.dg/debug'
+     This subdirectory contains tests for debug formats.  Tests in this
+     subdirectory are run for each debug format that the compiler
+     supports.
+
+`gcc.dg/format'
+     This subdirectory contains tests of the `-Wformat' format
+     checking.  Tests in this directory are run with and without
+     `-DWIDE'.
+
+`gcc.dg/noncompile'
+     This subdirectory contains tests of code that should not compile
+     and does not need any special compilation options.  They are run
+     with multiple optimization options, since sometimes invalid code
+     crashes the compiler with optimization.
+
+`gcc.dg/special'
+     FIXME: describe this.
+
+`gcc.c-torture'
+     This contains particular code fragments which have historically
+     broken easily.  These tests are run with multiple optimization
+     options, so tests for features which only break at some
+     optimization levels belong here.  This also contains tests to
+     check that certain optimizations occur.  It might be worthwhile to
+     separate the correctness tests cleanly from the code quality
+     tests, but it hasn't been done yet.
+
+`gcc.c-torture/compat'
+     FIXME: describe this.
+
+     This directory should probably not be used for new tests.
+
+`gcc.c-torture/compile'
+     This testsuite contains test cases that should compile, but do not
+     need to link or run.  These test cases are compiled with several
+     different combinations of optimization options.  All warnings are
+     disabled for these test cases, so this directory is not suitable if
+     you wish to test for the presence or absence of compiler warnings.
+     While special options can be set, and tests disabled on specific
+     platforms, by the use of `.x' files, mostly these test cases
+     should not contain platform dependencies.  FIXME: discuss how
+     defines such as `NO_LABEL_VALUES' and `STACK_SIZE' are used.
+
+`gcc.c-torture/execute'
+     This testsuite contains test cases that should compile, link and
+     run; otherwise the same comments as for `gcc.c-torture/compile'
+     apply.
+
+`gcc.c-torture/execute/ieee'
+     This contains tests which are specific to IEEE floating point.
+
+`gcc.c-torture/unsorted'
+     FIXME: describe this.
+
+     This directory should probably not be used for new tests.
+
+`gcc.misc-tests'
+     This directory contains C tests that require special handling.
+     Some of these tests have individual expect files, and others share
+     special-purpose expect files:
+
+    ``bprob*.c''
+          Test `-fbranch-probabilities' using
+          `gcc.misc-tests/bprob.exp', which in turn uses the generic,
+          language-independent framework (*note Support for testing
+          profile-directed optimizations: profopt Testing.).
+
+    ``gcov*.c''
+          Test `gcov' output using `gcov.exp', which in turn uses the
+          language-independent support (*note Support for testing gcov:
+          gcov Testing.).
+
+    ``i386-pf-*.c''
+          Test i386-specific support for data prefetch using
+          `i386-prefetch.exp'.
+
+`gcc.test-framework'
+
+    ``dg-*.c''
+          Test the testsuite itself using
+          `gcc.test-framework/test-framework.exp'.
+
+
+ FIXME: merge in `testsuite/README.gcc' and discuss the format of test
+cases and magic comments more.
+
+
+File: gccint.info,  Node: libgcj Tests,  Next: LTO Testing,  Prev: C Tests,  Up: Testsuites
+
+7.5 The Java library testsuites.
+================================
+
+Runtime tests are executed via `make check' in the
+`TARGET/libjava/testsuite' directory in the build tree.  Additional
+runtime tests can be checked into this testsuite.
+
+ Regression testing of the core packages in libgcj is also covered by
+the Mauve testsuite.  The Mauve Project develops tests for the Java
+Class Libraries.  These tests are run as part of libgcj testing by
+placing the Mauve tree within the libjava testsuite sources at
+`libjava/testsuite/libjava.mauve/mauve', or by specifying the location
+of that tree when invoking `make', as in `make MAUVEDIR=~/mauve check'.
+
+ To detect regressions, a mechanism in `mauve.exp' compares the
+failures for a test run against the list of expected failures in
+`libjava/testsuite/libjava.mauve/xfails' from the source hierarchy.
+Update this file when adding new failing tests to Mauve, or when fixing
+bugs in libgcj that had caused Mauve test failures.
+
+ We encourage developers to contribute test cases to Mauve.
+
+
+File: gccint.info,  Node: LTO Testing,  Next: gcov Testing,  Prev: libgcj Tests,  Up: Testsuites
+
+7.6 Support for testing link-time optimizations
+===============================================
+
+Tests for link-time optimizations usually require multiple source files
+that are compiled separately, perhaps with different sets of options.
+There are several special-purpose test directives used for these tests.
+
+`{ dg-lto-do DO-WHAT-KEYWORD }'
+     DO-WHAT-KEYWORD specifies how the test is compiled and whether it
+     is executed.  It is one of:
+
+    `assemble'
+          Compile with `-c' to produce a relocatable object file.
+
+    `link'
+          Compile, assemble, and link to produce an executable file.
+
+    `run'
+          Produce and run an executable file, which is expected to
+          return an exit code of 0.
+
+     The default is `assemble'.  That can be overridden for a set of
+     tests by redefining `dg-do-what-default' within the `.exp' file
+     for those tests.
+
+     Unlike `dg-do', `dg-lto-do' does not support an optional `target'
+     or `xfail' list.  Use `dg-skip-if', `dg-xfail-if', or
+     `dg-xfail-run-if'.
+
+`{ dg-lto-options { { OPTIONS } [{ OPTIONS }] } [{ target SELECTOR }]}'
+     This directive provides a list of one or more sets of compiler
+     options to override LTO_OPTIONS.  Each test will be compiled and
+     run with each of these sets of options.
+
+`{ dg-extra-ld-options OPTIONS }'
+     This directive adds OPTIONS to the linker options used.
+
+`{ dg-suppress-ld-options OPTIONS }'
+     This directive removes OPTIONS from the set of linker options used.
+
+
+File: gccint.info,  Node: gcov Testing,  Next: profopt Testing,  Prev: LTO Testing,  Up: Testsuites
+
+7.7 Support for testing `gcov'
+==============================
+
+Language-independent support for testing `gcov', and for checking that
+branch profiling produces expected values, is provided by the expect
+file `lib/gcov.exp'.  `gcov' tests also rely on procedures in
+`lib/gcc-dg.exp' to compile and run the test program.  A typical `gcov'
+test contains the following DejaGnu commands within comments:
+
+     { dg-options "-fprofile-arcs -ftest-coverage" }
+     { dg-do run { target native } }
+     { dg-final { run-gcov sourcefile } }
+
+ Checks of `gcov' output can include line counts, branch percentages,
+and call return percentages.  All of these checks are requested via
+commands that appear in comments in the test's source file.  Commands
+to check line counts are processed by default.  Commands to check
+branch percentages and call return percentages are processed if the
+`run-gcov' command has arguments `branches' or `calls', respectively.
+For example, the following specifies checking both, as well as passing
+`-b' to `gcov':
+
+     { dg-final { run-gcov branches calls { -b sourcefile } } }
+
+ A line count command appears within a comment on the source line that
+is expected to get the specified count and has the form `count(CNT)'.
+A test should only check line counts for lines that will get the same
+count for any architecture.
+
+ Commands to check branch percentages (`branch') and call return
+percentages (`returns') are very similar to each other.  A beginning
+command appears on or before the first of a range of lines that will
+report the percentage, and the ending command follows that range of
+lines.  The beginning command can include a list of percentages, all of
+which are expected to be found within the range.  A range is terminated
+by the next command of the same kind.  A command `branch(end)' or
+`returns(end)' marks the end of a range without starting a new one.
+For example:
+
+     if (i > 10 && j > i && j < 20)  /* branch(27 50 75) */
+                                     /* branch(end) */
+       foo (i, j);
+
+ For a call return percentage, the value specified is the percentage of
+calls reported to return.  For a branch percentage, the value is either
+the expected percentage or 100 minus that value, since the direction of
+a branch can differ depending on the target or the optimization level.
+
+ Not all branches and calls need to be checked.  A test should not
+check for branches that might be optimized away or replaced with
+predicated instructions.  Don't check for calls inserted by the
+compiler or ones that might be inlined or optimized away.
+
+ A single test can check for combinations of line counts, branch
+percentages, and call return percentages.  The command to check a line
+count must appear on the line that will report that count, but commands
+to check branch percentages and call return percentages can bracket the
+lines that report them.
+
+
+File: gccint.info,  Node: profopt Testing,  Next: compat Testing,  Prev: gcov Testing,  Up: Testsuites
+
+7.8 Support for testing profile-directed optimizations
+======================================================
+
+The file `profopt.exp' provides language-independent support for
+checking correct execution of a test built with profile-directed
+optimization.  This testing requires that a test program be built and
+executed twice.  The first time it is compiled to generate profile
+data, and the second time it is compiled to use the data that was
+generated during the first execution.  The second execution is to
+verify that the test produces the expected results.
+
+ To check that the optimization actually generated better code, a test
+can be built and run a third time with normal optimizations to verify
+that the performance is better with the profile-directed optimizations.
+`profopt.exp' has the beginnings of this kind of support.
+
+ `profopt.exp' provides generic support for profile-directed
+optimizations.  Each set of tests that uses it provides information
+about a specific optimization:
+
+`tool'
+     tool being tested, e.g., `gcc'
+
+`profile_option'
+     options used to generate profile data
+
+`feedback_option'
+     options used to optimize using that profile data
+
+`prof_ext'
+     suffix of profile data files
+
+`PROFOPT_OPTIONS'
+     list of options with which to run each test, similar to the lists
+     for torture tests
+
+`{ dg-final-generate { LOCAL-DIRECTIVE } }'
+     This directive is similar to `dg-final', but the LOCAL-DIRECTIVE
+     is run after the generation of profile data.
+
+`{ dg-final-use { LOCAL-DIRECTIVE } }'
+     The LOCAL-DIRECTIVE is run after the profile data have been used.
+
+
+File: gccint.info,  Node: compat Testing,  Next: Torture Tests,  Prev: profopt Testing,  Up: Testsuites
+
+7.9 Support for testing binary compatibility
+============================================
+
+The file `compat.exp' provides language-independent support for binary
+compatibility testing.  It supports testing interoperability of two
+compilers that follow the same ABI, or of multiple sets of compiler
+options that should not affect binary compatibility.  It is intended to
+be used for testsuites that complement ABI testsuites.
+
+ A test supported by this framework has three parts, each in a separate
+source file: a main program and two pieces that interact with each
+other to split up the functionality being tested.
+
+`TESTNAME_main.SUFFIX'
+     Contains the main program, which calls a function in file
+     `TESTNAME_x.SUFFIX'.
+
+`TESTNAME_x.SUFFIX'
+     Contains at least one call to a function in `TESTNAME_y.SUFFIX'.
+
+`TESTNAME_y.SUFFIX'
+     Shares data with, or gets arguments from, `TESTNAME_x.SUFFIX'.
+
+ Within each test, the main program and one functional piece are
+compiled by the GCC under test.  The other piece can be compiled by an
+alternate compiler.  If no alternate compiler is specified, then all
+three source files are all compiled by the GCC under test.  You can
+specify pairs of sets of compiler options.  The first element of such a
+pair specifies options used with the GCC under test, and the second
+element of the pair specifies options used with the alternate compiler.
+Each test is compiled with each pair of options.
+
+ `compat.exp' defines default pairs of compiler options.  These can be
+overridden by defining the environment variable `COMPAT_OPTIONS' as:
+
+     COMPAT_OPTIONS="[list [list {TST1} {ALT1}]
+       ...[list {TSTN} {ALTN}]]"
+
+ where TSTI and ALTI are lists of options, with TSTI used by the
+compiler under test and ALTI used by the alternate compiler.  For
+example, with `[list [list {-g -O0} {-O3}] [list {-fpic} {-fPIC -O2}]]',
+the test is first built with `-g -O0' by the compiler under test and
+with `-O3' by the alternate compiler.  The test is built a second time
+using `-fpic' by the compiler under test and `-fPIC -O2' by the
+alternate compiler.
+
+ An alternate compiler is specified by defining an environment variable
+to be the full pathname of an installed compiler; for C define
+`ALT_CC_UNDER_TEST', and for C++ define `ALT_CXX_UNDER_TEST'.  These
+will be written to the `site.exp' file used by DejaGnu.  The default is
+to build each test with the compiler under test using the first of each
+pair of compiler options from `COMPAT_OPTIONS'.  When
+`ALT_CC_UNDER_TEST' or `ALT_CXX_UNDER_TEST' is `same', each test is
+built using the compiler under test but with combinations of the
+options from `COMPAT_OPTIONS'.
+
+ To run only the C++ compatibility suite using the compiler under test
+and another version of GCC using specific compiler options, do the
+following from `OBJDIR/gcc':
+
+     rm site.exp
+     make -k \
+       ALT_CXX_UNDER_TEST=${alt_prefix}/bin/g++ \
+       COMPAT_OPTIONS="LISTS AS SHOWN ABOVE" \
+       check-c++ \
+       RUNTESTFLAGS="compat.exp"
+
+ A test that fails when the source files are compiled with different
+compilers, but passes when the files are compiled with the same
+compiler, demonstrates incompatibility of the generated code or runtime
+support.  A test that fails for the alternate compiler but passes for
+the compiler under test probably tests for a bug that was fixed in the
+compiler under test but is present in the alternate compiler.
+
+ The binary compatibility tests support a small number of test framework
+commands that appear within comments in a test file.
+
+`dg-require-*'
+     These commands can be used in `TESTNAME_main.SUFFIX' to skip the
+     test if specific support is not available on the target.
+
+`dg-options'
+     The specified options are used for compiling this particular source
+     file, appended to the options from `COMPAT_OPTIONS'.  When this
+     command appears in `TESTNAME_main.SUFFIX' the options are also
+     used to link the test program.
+
+`dg-xfail-if'
+     This command can be used in a secondary source file to specify that
+     compilation is expected to fail for particular options on
+     particular targets.
+
+
+File: gccint.info,  Node: Torture Tests,  Prev: compat Testing,  Up: Testsuites
+
+7.10 Support for torture testing using multiple options
+=======================================================
+
+Throughout the compiler testsuite there are several directories whose
+tests are run multiple times, each with a different set of options.
+These are known as torture tests.  `lib/torture-options.exp' defines
+procedures to set up these lists:
+
+`torture-init'
+     Initialize use of torture lists.
+
+`set-torture-options'
+     Set lists of torture options to use for tests with and without
+     loops.  Optionally combine a set of torture options with a set of
+     other options, as is done with Objective-C runtime options.
+
+`torture-finish'
+     Finalize use of torture lists.
+
+ The `.exp' file for a set of tests that use torture options must
+include calls to these three procedures if:
+
+   * It calls `gcc-dg-runtest' and overrides DG_TORTURE_OPTIONS.
+
+   * It calls ${TOOL}`-torture' or ${TOOL}`-torture-execute', where
+     TOOL is `c', `fortran', or `objc'.
+
+   * It calls `dg-pch'.
+
+ It is not necessary for a `.exp' file that calls `gcc-dg-runtest' to
+call the torture procedures if the tests should use the list in
+DG_TORTURE_OPTIONS defined in `gcc-dg.exp'.
+
+ Most uses of torture options can override the default lists by defining
+TORTURE_OPTIONS or add to the default list by defining
+ADDITIONAL_TORTURE_OPTIONS.  Define these in a `.dejagnurc' file or add
+them to the `site.exp' file; for example
+
+     set ADDITIONAL_TORTURE_OPTIONS  [list \
+       { -O2 -ftree-loop-linear } \
+       { -O2 -fpeel-loops } ]
+
+
+File: gccint.info,  Node: Options,  Next: Passes,  Prev: Testsuites,  Up: Top
+
+8 Option specification files
+****************************
+
+Most GCC command-line options are described by special option
+definition files, the names of which conventionally end in `.opt'.
+This chapter describes the format of these files.
+
+* Menu:
+
+* Option file format::   The general layout of the files
+* Option properties::    Supported option properties
+
+
+File: gccint.info,  Node: Option file format,  Next: Option properties,  Up: Options
+
+8.1 Option file format
+======================
+
+Option files are a simple list of records in which each field occupies
+its own line and in which the records themselves are separated by blank
+lines.  Comments may appear on their own line anywhere within the file
+and are preceded by semicolons.  Whitespace is allowed before the
+semicolon.
+
+ The files can contain the following types of record:
+
+   * A language definition record.  These records have two fields: the
+     string `Language' and the name of the language.  Once a language
+     has been declared in this way, it can be used as an option
+     property.  *Note Option properties::.
+
+   * A target specific save record to save additional information. These
+     records have two fields: the string `TargetSave', and a
+     declaration type to go in the `cl_target_option' structure.
+
+   * An option definition record.  These records have the following
+     fields:
+       1. the name of the option, with the leading "-" removed
+
+       2. a space-separated list of option properties (*note Option
+          properties::)
+
+       3. the help text to use for `--help' (omitted if the second field
+          contains the `Undocumented' property).
+
+     By default, all options beginning with "f", "W" or "m" are
+     implicitly assumed to take a "no-" form.  This form should not be
+     listed separately.  If an option beginning with one of these
+     letters does not have a "no-" form, you can use the
+     `RejectNegative' property to reject it.
+
+     The help text is automatically line-wrapped before being displayed.
+     Normally the name of the option is printed on the left-hand side of
+     the output and the help text is printed on the right.  However, if
+     the help text contains a tab character, the text to the left of
+     the tab is used instead of the option's name and the text to the
+     right of the tab forms the help text.  This allows you to
+     elaborate on what type of argument the option takes.
+
+   * A target mask record.  These records have one field of the form
+     `Mask(X)'.  The options-processing script will automatically
+     allocate a bit in `target_flags' (*note Run-time Target::) for
+     each mask name X and set the macro `MASK_X' to the appropriate
+     bitmask.  It will also declare a `TARGET_X' macro that has the
+     value 1 when bit `MASK_X' is set and 0 otherwise.
+
+     They are primarily intended to declare target masks that are not
+     associated with user options, either because these masks represent
+     internal switches or because the options are not available on all
+     configurations and yet the masks always need to be defined.
+
+
+File: gccint.info,  Node: Option properties,  Prev: Option file format,  Up: Options
+
+8.2 Option properties
+=====================
+
+The second field of an option record can specify any of the following
+properties.  When an option takes an argument, it is enclosed in
+parentheses following the option property name.  The parser that
+handles option files is quite simplistic, and will be tricked by any
+nested parentheses within the argument text itself; in this case, the
+entire option argument can be wrapped in curly braces within the
+parentheses to demarcate it, e.g.:
+
+     Condition({defined (USE_CYGWIN_LIBSTDCXX_WRAPPERS)})
+
+`Common'
+     The option is available for all languages and targets.
+
+`Target'
+     The option is available for all languages but is target-specific.
+
+`LANGUAGE'
+     The option is available when compiling for the given language.
+
+     It is possible to specify several different languages for the same
+     option.  Each LANGUAGE must have been declared by an earlier
+     `Language' record.  *Note Option file format::.
+
+`RejectNegative'
+     The option does not have a "no-" form.  All options beginning with
+     "f", "W" or "m" are assumed to have a "no-" form unless this
+     property is used.
+
+`Negative(OTHERNAME)'
+     The option will turn off another option OTHERNAME, which is the
+     option name with the leading "-" removed.  This chain action will
+     propagate through the `Negative' property of the option to be
+     turned off.
+
+`Joined'
+`Separate'
+     The option takes a mandatory argument.  `Joined' indicates that
+     the option and argument can be included in the same `argv' entry
+     (as with `-mflush-func=NAME', for example).  `Separate' indicates
+     that the option and argument can be separate `argv' entries (as
+     with `-o').  An option is allowed to have both of these properties.
+
+`JoinedOrMissing'
+     The option takes an optional argument.  If the argument is given,
+     it will be part of the same `argv' entry as the option itself.
+
+     This property cannot be used alongside `Joined' or `Separate'.
+
+`UInteger'
+     The option's argument is a non-negative integer.  The option parser
+     will check and convert the argument before passing it to the
+     relevant option handler.  `UInteger' should also be used on
+     options like `-falign-loops' where both `-falign-loops' and
+     `-falign-loops'=N are supported to make sure the saved options are
+     given a full integer.
+
+`Var(VAR)'
+     The state of this option should be stored in variable VAR.  The
+     way that the state is stored depends on the type of option:
+
+        * If the option uses the `Mask' or `InverseMask' properties,
+          VAR is the integer variable that contains the mask.
+
+        * If the option is a normal on/off switch, VAR is an integer
+          variable that is nonzero when the option is enabled.  The
+          options parser will set the variable to 1 when the positive
+          form of the option is used and 0 when the "no-" form is used.
+
+        * If the option takes an argument and has the `UInteger'
+          property, VAR is an integer variable that stores the value of
+          the argument.
+
+        * Otherwise, if the option takes an argument, VAR is a pointer
+          to the argument string.  The pointer will be null if the
+          argument is optional and wasn't given.
+
+     The option-processing script will usually declare VAR in
+     `options.c' and leave it to be zero-initialized at start-up time.
+     You can modify this behavior using `VarExists' and `Init'.
+
+`Var(VAR, SET)'
+     The option controls an integer variable VAR and is active when VAR
+     equals SET.  The option parser will set VAR to SET when the
+     positive form of the option is used and `!SET' when the "no-" form
+     is used.
+
+     VAR is declared in the same way as for the single-argument form
+     described above.
+
+`VarExists'
+     The variable specified by the `Var' property already exists.  No
+     definition should be added to `options.c' in response to this
+     option record.
+
+     You should use this property only if the variable is declared
+     outside `options.c'.
+
+`Init(VALUE)'
+     The variable specified by the `Var' property should be statically
+     initialized to VALUE.
+
+`Mask(NAME)'
+     The option is associated with a bit in the `target_flags' variable
+     (*note Run-time Target::) and is active when that bit is set.  You
+     may also specify `Var' to select a variable other than
+     `target_flags'.
+
+     The options-processing script will automatically allocate a unique
+     bit for the option.  If the option is attached to `target_flags',
+     the script will set the macro `MASK_NAME' to the appropriate
+     bitmask.  It will also declare a `TARGET_NAME' macro that has the
+     value 1 when the option is active and 0 otherwise.  If you use
+     `Var' to attach the option to a different variable, the associated
+     macros are called `OPTION_MASK_NAME' and `OPTION_NAME'
+     respectively.
+
+     You can disable automatic bit allocation using `MaskExists'.
+
+`InverseMask(OTHERNAME)'
+`InverseMask(OTHERNAME, THISNAME)'
+     The option is the inverse of another option that has the
+     `Mask(OTHERNAME)' property.  If THISNAME is given, the
+     options-processing script will declare a `TARGET_THISNAME' macro
+     that is 1 when the option is active and 0 otherwise.
+
+`MaskExists'
+     The mask specified by the `Mask' property already exists.  No
+     `MASK' or `TARGET' definitions should be added to `options.h' in
+     response to this option record.
+
+     The main purpose of this property is to support synonymous options.
+     The first option should use `Mask(NAME)' and the others should use
+     `Mask(NAME) MaskExists'.
+
+`Report'
+     The state of the option should be printed by `-fverbose-asm'.
+
+`Undocumented'
+     The option is deliberately missing documentation and should not be
+     included in the `--help' output.
+
+`Condition(COND)'
+     The option should only be accepted if preprocessor condition COND
+     is true.  Note that any C declarations associated with the option
+     will be present even if COND is false; COND simply controls
+     whether the option is accepted and whether it is printed in the
+     `--help' output.
+
+`Save'
+     Build the `cl_target_option' structure to hold a copy of the
+     option, add the functions `cl_target_option_save' and
+     `cl_target_option_restore' to save and restore the options.
+
+
+File: gccint.info,  Node: Passes,  Next: GENERIC,  Prev: Options,  Up: Top
+
+9 Passes and Files of the Compiler
+**********************************
+
+This chapter is dedicated to giving an overview of the optimization and
+code generation passes of the compiler.  In the process, it describes
+some of the language front end interface, though this description is no
+where near complete.
+
+* Menu:
+
+* Parsing pass::         The language front end turns text into bits.
+* Gimplification pass::  The bits are turned into something we can optimize.
+* Pass manager::         Sequencing the optimization passes.
+* Tree SSA passes::      Optimizations on a high-level representation.
+* RTL passes::           Optimizations on a low-level representation.
+
+
+File: gccint.info,  Node: Parsing pass,  Next: Gimplification pass,  Up: Passes
+
+9.1 Parsing pass
+================
+
+The language front end is invoked only once, via
+`lang_hooks.parse_file', to parse the entire input.  The language front
+end may use any intermediate language representation deemed
+appropriate.  The C front end uses GENERIC trees (CROSSREF), plus a
+double handful of language specific tree codes defined in
+`c-common.def'.  The Fortran front end uses a completely different
+private representation.
+
+ At some point the front end must translate the representation used in
+the front end to a representation understood by the language-independent
+portions of the compiler.  Current practice takes one of two forms.
+The C front end manually invokes the gimplifier (CROSSREF) on each
+function, and uses the gimplifier callbacks to convert the
+language-specific tree nodes directly to GIMPLE (CROSSREF) before
+passing the function off to be compiled.  The Fortran front end
+converts from a private representation to GENERIC, which is later
+lowered to GIMPLE when the function is compiled.  Which route to choose
+probably depends on how well GENERIC (plus extensions) can be made to
+match up with the source language and necessary parsing data structures.
+
+ BUG: Gimplification must occur before nested function lowering, and
+nested function lowering must be done by the front end before passing
+the data off to cgraph.
+
+ TODO: Cgraph should control nested function lowering.  It would only
+be invoked when it is certain that the outer-most function is used.
+
+ TODO: Cgraph needs a gimplify_function callback.  It should be invoked
+when (1) it is certain that the function is used, (2) warning flags
+specified by the user require some amount of compilation in order to
+honor, (3) the language indicates that semantic analysis is not
+complete until gimplification occurs.  Hum... this sounds overly
+complicated.  Perhaps we should just have the front end gimplify
+always; in most cases it's only one function call.
+
+ The front end needs to pass all function definitions and top level
+declarations off to the middle-end so that they can be compiled and
+emitted to the object file.  For a simple procedural language, it is
+usually most convenient to do this as each top level declaration or
+definition is seen.  There is also a distinction to be made between
+generating functional code and generating complete debug information.
+The only thing that is absolutely required for functional code is that
+function and data _definitions_ be passed to the middle-end.  For
+complete debug information, function, data and type declarations should
+all be passed as well.
+
+ In any case, the front end needs each complete top-level function or
+data declaration, and each data definition should be passed to
+`rest_of_decl_compilation'.  Each complete type definition should be
+passed to `rest_of_type_compilation'.  Each function definition should
+be passed to `cgraph_finalize_function'.
+
+ TODO: I know rest_of_compilation currently has all sorts of RTL
+generation semantics.  I plan to move all code generation bits (both
+Tree and RTL) to compile_function.  Should we hide cgraph from the
+front ends and move back to rest_of_compilation as the official
+interface?  Possibly we should rename all three interfaces such that
+the names match in some meaningful way and that is more descriptive
+than "rest_of".
+
+ The middle-end will, at its option, emit the function and data
+definitions immediately or queue them for later processing.
+
+
+File: gccint.info,  Node: Gimplification pass,  Next: Pass manager,  Prev: Parsing pass,  Up: Passes
+
+9.2 Gimplification pass
+=======================
+
+"Gimplification" is a whimsical term for the process of converting the
+intermediate representation of a function into the GIMPLE language
+(CROSSREF).  The term stuck, and so words like "gimplification",
+"gimplify", "gimplifier" and the like are sprinkled throughout this
+section of code.
+
+ While a front end may certainly choose to generate GIMPLE directly if
+it chooses, this can be a moderately complex process unless the
+intermediate language used by the front end is already fairly simple.
+Usually it is easier to generate GENERIC trees plus extensions and let
+the language-independent gimplifier do most of the work.
+
+ The main entry point to this pass is `gimplify_function_tree' located
+in `gimplify.c'.  From here we process the entire function gimplifying
+each statement in turn.  The main workhorse for this pass is
+`gimplify_expr'.  Approximately everything passes through here at least
+once, and it is from here that we invoke the `lang_hooks.gimplify_expr'
+callback.
+
+ The callback should examine the expression in question and return
+`GS_UNHANDLED' if the expression is not a language specific construct
+that requires attention.  Otherwise it should alter the expression in
+some way to such that forward progress is made toward producing valid
+GIMPLE.  If the callback is certain that the transformation is complete
+and the expression is valid GIMPLE, it should return `GS_ALL_DONE'.
+Otherwise it should return `GS_OK', which will cause the expression to
+be processed again.  If the callback encounters an error during the
+transformation (because the front end is relying on the gimplification
+process to finish semantic checks), it should return `GS_ERROR'.
+
+
+File: gccint.info,  Node: Pass manager,  Next: Tree SSA passes,  Prev: Gimplification pass,  Up: Passes
+
+9.3 Pass manager
+================
+
+The pass manager is located in `passes.c', `tree-optimize.c' and
+`tree-pass.h'.  Its job is to run all of the individual passes in the
+correct order, and take care of standard bookkeeping that applies to
+every pass.
+
+ The theory of operation is that each pass defines a structure that
+represents everything we need to know about that pass--when it should
+be run, how it should be run, what intermediate language form or
+on-the-side data structures it needs.  We register the pass to be run
+in some particular order, and the pass manager arranges for everything
+to happen in the correct order.
+
+ The actuality doesn't completely live up to the theory at present.
+Command-line switches and `timevar_id_t' enumerations must still be
+defined elsewhere.  The pass manager validates constraints but does not
+attempt to (re-)generate data structures or lower intermediate language
+form based on the requirements of the next pass.  Nevertheless, what is
+present is useful, and a far sight better than nothing at all.
+
+ Each pass should have a unique name.  Each pass may have its own dump
+file (for GCC debugging purposes).  Passes with a name starting with a
+star do not dump anything.  Sometimes passes are supposed to share a
+dump file / option name.  To still give these unique names, you can use
+a prefix that is delimited by a space from the part that is used for
+the dump file / option name.  E.g. When the pass name is "ud dce", the
+name used for dump file/options is "dce".
+
+ TODO: describe the global variables set up by the pass manager, and a
+brief description of how a new pass should use it.  I need to look at
+what info RTL passes use first...
+
+
+File: gccint.info,  Node: Tree SSA passes,  Next: RTL passes,  Prev: Pass manager,  Up: Passes
+
+9.4 Tree SSA passes
+===================
+
+The following briefly describes the Tree optimization passes that are
+run after gimplification and what source files they are located in.
+
+   * Remove useless statements
+
+     This pass is an extremely simple sweep across the gimple code in
+     which we identify obviously dead code and remove it.  Here we do
+     things like simplify `if' statements with constant conditions,
+     remove exception handling constructs surrounding code that
+     obviously cannot throw, remove lexical bindings that contain no
+     variables, and other assorted simplistic cleanups.  The idea is to
+     get rid of the obvious stuff quickly rather than wait until later
+     when it's more work to get rid of it.  This pass is located in
+     `tree-cfg.c' and described by `pass_remove_useless_stmts'.
+
+   * Mudflap declaration registration
+
+     If mudflap (*note -fmudflap -fmudflapth -fmudflapir: (gcc)Optimize
+     Options.) is enabled, we generate code to register some variable
+     declarations with the mudflap runtime.  Specifically, the runtime
+     tracks the lifetimes of those variable declarations that have
+     their addresses taken, or whose bounds are unknown at compile time
+     (`extern').  This pass generates new exception handling constructs
+     (`try'/`finally'), and so must run before those are lowered.  In
+     addition, the pass enqueues declarations of static variables whose
+     lifetimes extend to the entire program.  The pass is located in
+     `tree-mudflap.c' and is described by `pass_mudflap_1'.
+
+   * OpenMP lowering
+
+     If OpenMP generation (`-fopenmp') is enabled, this pass lowers
+     OpenMP constructs into GIMPLE.
+
+     Lowering of OpenMP constructs involves creating replacement
+     expressions for local variables that have been mapped using data
+     sharing clauses, exposing the control flow of most synchronization
+     directives and adding region markers to facilitate the creation of
+     the control flow graph.  The pass is located in `omp-low.c' and is
+     described by `pass_lower_omp'.
+
+   * OpenMP expansion
+
+     If OpenMP generation (`-fopenmp') is enabled, this pass expands
+     parallel regions into their own functions to be invoked by the
+     thread library.  The pass is located in `omp-low.c' and is
+     described by `pass_expand_omp'.
+
+   * Lower control flow
+
+     This pass flattens `if' statements (`COND_EXPR') and moves lexical
+     bindings (`BIND_EXPR') out of line.  After this pass, all `if'
+     statements will have exactly two `goto' statements in its `then'
+     and `else' arms.  Lexical binding information for each statement
+     will be found in `TREE_BLOCK' rather than being inferred from its
+     position under a `BIND_EXPR'.  This pass is found in
+     `gimple-low.c' and is described by `pass_lower_cf'.
+
+   * Lower exception handling control flow
+
+     This pass decomposes high-level exception handling constructs
+     (`TRY_FINALLY_EXPR' and `TRY_CATCH_EXPR') into a form that
+     explicitly represents the control flow involved.  After this pass,
+     `lookup_stmt_eh_region' will return a non-negative number for any
+     statement that may have EH control flow semantics; examine
+     `tree_can_throw_internal' or `tree_can_throw_external' for exact
+     semantics.  Exact control flow may be extracted from
+     `foreach_reachable_handler'.  The EH region nesting tree is defined
+     in `except.h' and built in `except.c'.  The lowering pass itself
+     is in `tree-eh.c' and is described by `pass_lower_eh'.
+
+   * Build the control flow graph
+
+     This pass decomposes a function into basic blocks and creates all
+     of the edges that connect them.  It is located in `tree-cfg.c' and
+     is described by `pass_build_cfg'.
+
+   * Find all referenced variables
+
+     This pass walks the entire function and collects an array of all
+     variables referenced in the function, `referenced_vars'.  The
+     index at which a variable is found in the array is used as a UID
+     for the variable within this function.  This data is needed by the
+     SSA rewriting routines.  The pass is located in `tree-dfa.c' and
+     is described by `pass_referenced_vars'.
+
+   * Enter static single assignment form
+
+     This pass rewrites the function such that it is in SSA form.  After
+     this pass, all `is_gimple_reg' variables will be referenced by
+     `SSA_NAME', and all occurrences of other variables will be
+     annotated with `VDEFS' and `VUSES'; PHI nodes will have been
+     inserted as necessary for each basic block.  This pass is located
+     in `tree-ssa.c' and is described by `pass_build_ssa'.
+
+   * Warn for uninitialized variables
+
+     This pass scans the function for uses of `SSA_NAME's that are fed
+     by default definition.  For non-parameter variables, such uses are
+     uninitialized.  The pass is run twice, before and after
+     optimization (if turned on).  In the first pass we only warn for
+     uses that are positively uninitialized; in the second pass we warn
+     for uses that are possibly uninitialized.  The pass is located in
+     `tree-ssa.c' and is defined by `pass_early_warn_uninitialized' and
+     `pass_late_warn_uninitialized'.
+
+   * Dead code elimination
+
+     This pass scans the function for statements without side effects
+     whose result is unused.  It does not do memory life analysis, so
+     any value that is stored in memory is considered used.  The pass
+     is run multiple times throughout the optimization process.  It is
+     located in `tree-ssa-dce.c' and is described by `pass_dce'.
+
+   * Dominator optimizations
+
+     This pass performs trivial dominator-based copy and constant
+     propagation, expression simplification, and jump threading.  It is
+     run multiple times throughout the optimization process.  It is
+     located in `tree-ssa-dom.c' and is described by `pass_dominator'.
+
+   * Forward propagation of single-use variables
+
+     This pass attempts to remove redundant computation by substituting
+     variables that are used once into the expression that uses them and
+     seeing if the result can be simplified.  It is located in
+     `tree-ssa-forwprop.c' and is described by `pass_forwprop'.
+
+   * Copy Renaming
+
+     This pass attempts to change the name of compiler temporaries
+     involved in copy operations such that SSA->normal can coalesce the
+     copy away.  When compiler temporaries are copies of user
+     variables, it also renames the compiler temporary to the user
+     variable resulting in better use of user symbols.  It is located
+     in `tree-ssa-copyrename.c' and is described by `pass_copyrename'.
+
+   * PHI node optimizations
+
+     This pass recognizes forms of PHI inputs that can be represented as
+     conditional expressions and rewrites them into straight line code.
+     It is located in `tree-ssa-phiopt.c' and is described by
+     `pass_phiopt'.
+
+   * May-alias optimization
+
+     This pass performs a flow sensitive SSA-based points-to analysis.
+     The resulting may-alias, must-alias, and escape analysis
+     information is used to promote variables from in-memory
+     addressable objects to non-aliased variables that can be renamed
+     into SSA form.  We also update the `VDEF'/`VUSE' memory tags for
+     non-renameable aggregates so that we get fewer false kills.  The
+     pass is located in `tree-ssa-alias.c' and is described by
+     `pass_may_alias'.
+
+     Interprocedural points-to information is located in
+     `tree-ssa-structalias.c' and described by `pass_ipa_pta'.
+
+   * Profiling
+
+     This pass rewrites the function in order to collect runtime block
+     and value profiling data.  Such data may be fed back into the
+     compiler on a subsequent run so as to allow optimization based on
+     expected execution frequencies.  The pass is located in
+     `predict.c' and is described by `pass_profile'.
+
+   * Lower complex arithmetic
+
+     This pass rewrites complex arithmetic operations into their
+     component scalar arithmetic operations.  The pass is located in
+     `tree-complex.c' and is described by `pass_lower_complex'.
+
+   * Scalar replacement of aggregates
+
+     This pass rewrites suitable non-aliased local aggregate variables
+     into a set of scalar variables.  The resulting scalar variables are
+     rewritten into SSA form, which allows subsequent optimization
+     passes to do a significantly better job with them.  The pass is
+     located in `tree-sra.c' and is described by `pass_sra'.
+
+   * Dead store elimination
+
+     This pass eliminates stores to memory that are subsequently
+     overwritten by another store, without any intervening loads.  The
+     pass is located in `tree-ssa-dse.c' and is described by `pass_dse'.
+
+   * Tail recursion elimination
+
+     This pass transforms tail recursion into a loop.  It is located in
+     `tree-tailcall.c' and is described by `pass_tail_recursion'.
+
+   * Forward store motion
+
+     This pass sinks stores and assignments down the flowgraph closer
+     to their use point.  The pass is located in `tree-ssa-sink.c' and
+     is described by `pass_sink_code'.
+
+   * Partial redundancy elimination
+
+     This pass eliminates partially redundant computations, as well as
+     performing load motion.  The pass is located in `tree-ssa-pre.c'
+     and is described by `pass_pre'.
+
+     Just before partial redundancy elimination, if
+     `-funsafe-math-optimizations' is on, GCC tries to convert
+     divisions to multiplications by the reciprocal.  The pass is
+     located in `tree-ssa-math-opts.c' and is described by
+     `pass_cse_reciprocal'.
+
+   * Full redundancy elimination
+
+     This is a simpler form of PRE that only eliminates redundancies
+     that occur an all paths.  It is located in `tree-ssa-pre.c' and
+     described by `pass_fre'.
+
+   * Loop optimization
+
+     The main driver of the pass is placed in `tree-ssa-loop.c' and
+     described by `pass_loop'.
+
+     The optimizations performed by this pass are:
+
+     Loop invariant motion.  This pass moves only invariants that would
+     be hard to handle on RTL level (function calls, operations that
+     expand to nontrivial sequences of insns).  With `-funswitch-loops'
+     it also moves operands of conditions that are invariant out of the
+     loop, so that we can use just trivial invariantness analysis in
+     loop unswitching.  The pass also includes store motion.  The pass
+     is implemented in `tree-ssa-loop-im.c'.
+
+     Canonical induction variable creation.  This pass creates a simple
+     counter for number of iterations of the loop and replaces the exit
+     condition of the loop using it, in case when a complicated
+     analysis is necessary to determine the number of iterations.
+     Later optimizations then may determine the number easily.  The
+     pass is implemented in `tree-ssa-loop-ivcanon.c'.
+
+     Induction variable optimizations.  This pass performs standard
+     induction variable optimizations, including strength reduction,
+     induction variable merging and induction variable elimination.
+     The pass is implemented in `tree-ssa-loop-ivopts.c'.
+
+     Loop unswitching.  This pass moves the conditional jumps that are
+     invariant out of the loops.  To achieve this, a duplicate of the
+     loop is created for each possible outcome of conditional jump(s).
+     The pass is implemented in `tree-ssa-loop-unswitch.c'.  This pass
+     should eventually replace the RTL level loop unswitching in
+     `loop-unswitch.c', but currently the RTL level pass is not
+     completely redundant yet due to deficiencies in tree level alias
+     analysis.
+
+     The optimizations also use various utility functions contained in
+     `tree-ssa-loop-manip.c', `cfgloop.c', `cfgloopanal.c' and
+     `cfgloopmanip.c'.
+
+     Vectorization.  This pass transforms loops to operate on vector
+     types instead of scalar types.  Data parallelism across loop
+     iterations is exploited to group data elements from consecutive
+     iterations into a vector and operate on them in parallel.
+     Depending on available target support the loop is conceptually
+     unrolled by a factor `VF' (vectorization factor), which is the
+     number of elements operated upon in parallel in each iteration,
+     and the `VF' copies of each scalar operation are fused to form a
+     vector operation.  Additional loop transformations such as peeling
+     and versioning may take place to align the number of iterations,
+     and to align the memory accesses in the loop.  The pass is
+     implemented in `tree-vectorizer.c' (the main driver),
+     `tree-vect-loop.c' and `tree-vect-loop-manip.c' (loop specific
+     parts and general loop utilities), `tree-vect-slp' (loop-aware SLP
+     functionality), `tree-vect-stmts.c' and `tree-vect-data-refs.c'.
+     Analysis of data references is in `tree-data-ref.c'.
+
+     SLP Vectorization.  This pass performs vectorization of
+     straight-line code. The pass is implemented in `tree-vectorizer.c'
+     (the main driver), `tree-vect-slp.c', `tree-vect-stmts.c' and
+     `tree-vect-data-refs.c'.
+
+     Autoparallelization.  This pass splits the loop iteration space to
+     run into several threads.  The pass is implemented in
+     `tree-parloops.c'.
+
+     Graphite is a loop transformation framework based on the polyhedral
+     model.  Graphite stands for Gimple Represented as Polyhedra.  The
+     internals of this infrastructure are documented in
+     `http://gcc.gnu.org/wiki/Graphite'.  The passes working on this
+     representation are implemented in the various `graphite-*' files.
+
+   * Tree level if-conversion for vectorizer
+
+     This pass applies if-conversion to simple loops to help vectorizer.
+     We identify if convertible loops, if-convert statements and merge
+     basic blocks in one big block.  The idea is to present loop in such
+     form so that vectorizer can have one to one mapping between
+     statements and available vector operations.  This patch
+     re-introduces COND_EXPR at GIMPLE level.  This pass is located in
+     `tree-if-conv.c' and is described by `pass_if_conversion'.
+
+   * Conditional constant propagation
+
+     This pass relaxes a lattice of values in order to identify those
+     that must be constant even in the presence of conditional branches.
+     The pass is located in `tree-ssa-ccp.c' and is described by
+     `pass_ccp'.
+
+     A related pass that works on memory loads and stores, and not just
+     register values, is located in `tree-ssa-ccp.c' and described by
+     `pass_store_ccp'.
+
+   * Conditional copy propagation
+
+     This is similar to constant propagation but the lattice of values
+     is the "copy-of" relation.  It eliminates redundant copies from the
+     code.  The pass is located in `tree-ssa-copy.c' and described by
+     `pass_copy_prop'.
+
+     A related pass that works on memory copies, and not just register
+     copies, is located in `tree-ssa-copy.c' and described by
+     `pass_store_copy_prop'.
+
+   * Value range propagation
+
+     This transformation is similar to constant propagation but instead
+     of propagating single constant values, it propagates known value
+     ranges.  The implementation is based on Patterson's range
+     propagation algorithm (Accurate Static Branch Prediction by Value
+     Range Propagation, J. R. C. Patterson, PLDI '95).  In contrast to
+     Patterson's algorithm, this implementation does not propagate
+     branch probabilities nor it uses more than a single range per SSA
+     name. This means that the current implementation cannot be used
+     for branch prediction (though adapting it would not be difficult).
+     The pass is located in `tree-vrp.c' and is described by `pass_vrp'.
+
+   * Folding built-in functions
+
+     This pass simplifies built-in functions, as applicable, with
+     constant arguments or with inferable string lengths.  It is
+     located in `tree-ssa-ccp.c' and is described by
+     `pass_fold_builtins'.
+
+   * Split critical edges
+
+     This pass identifies critical edges and inserts empty basic blocks
+     such that the edge is no longer critical.  The pass is located in
+     `tree-cfg.c' and is described by `pass_split_crit_edges'.
+
+   * Control dependence dead code elimination
+
+     This pass is a stronger form of dead code elimination that can
+     eliminate unnecessary control flow statements.   It is located in
+     `tree-ssa-dce.c' and is described by `pass_cd_dce'.
+
+   * Tail call elimination
+
+     This pass identifies function calls that may be rewritten into
+     jumps.  No code transformation is actually applied here, but the
+     data and control flow problem is solved.  The code transformation
+     requires target support, and so is delayed until RTL.  In the
+     meantime `CALL_EXPR_TAILCALL' is set indicating the possibility.
+     The pass is located in `tree-tailcall.c' and is described by
+     `pass_tail_calls'.  The RTL transformation is handled by
+     `fixup_tail_calls' in `calls.c'.
+
+   * Warn for function return without value
+
+     For non-void functions, this pass locates return statements that do
+     not specify a value and issues a warning.  Such a statement may
+     have been injected by falling off the end of the function.  This
+     pass is run last so that we have as much time as possible to prove
+     that the statement is not reachable.  It is located in
+     `tree-cfg.c' and is described by `pass_warn_function_return'.
+
+   * Mudflap statement annotation
+
+     If mudflap is enabled, we rewrite some memory accesses with code to
+     validate that the memory access is correct.  In particular,
+     expressions involving pointer dereferences (`INDIRECT_REF',
+     `ARRAY_REF', etc.) are replaced by code that checks the selected
+     address range against the mudflap runtime's database of valid
+     regions.  This check includes an inline lookup into a
+     direct-mapped cache, based on shift/mask operations of the pointer
+     value, with a fallback function call into the runtime.  The pass
+     is located in `tree-mudflap.c' and is described by
+     `pass_mudflap_2'.
+
+   * Leave static single assignment form
+
+     This pass rewrites the function such that it is in normal form.  At
+     the same time, we eliminate as many single-use temporaries as
+     possible, so the intermediate language is no longer GIMPLE, but
+     GENERIC.  The pass is located in `tree-outof-ssa.c' and is
+     described by `pass_del_ssa'.
+
+   * Merge PHI nodes that feed into one another
+
+     This is part of the CFG cleanup passes.  It attempts to join PHI
+     nodes from a forwarder CFG block into another block with PHI
+     nodes.  The pass is located in `tree-cfgcleanup.c' and is
+     described by `pass_merge_phi'.
+
+   * Return value optimization
+
+     If a function always returns the same local variable, and that
+     local variable is an aggregate type, then the variable is replaced
+     with the return value for the function (i.e., the function's
+     DECL_RESULT).  This is equivalent to the C++ named return value
+     optimization applied to GIMPLE.  The pass is located in
+     `tree-nrv.c' and is described by `pass_nrv'.
+
+   * Return slot optimization
+
+     If a function returns a memory object and is called as `var =
+     foo()', this pass tries to change the call so that the address of
+     `var' is sent to the caller to avoid an extra memory copy.  This
+     pass is located in `tree-nrv.c' and is described by
+     `pass_return_slot'.
+
+   * Optimize calls to `__builtin_object_size'
+
+     This is a propagation pass similar to CCP that tries to remove
+     calls to `__builtin_object_size' when the size of the object can be
+     computed at compile-time.  This pass is located in
+     `tree-object-size.c' and is described by `pass_object_sizes'.
+
+   * Loop invariant motion
+
+     This pass removes expensive loop-invariant computations out of
+     loops.  The pass is located in `tree-ssa-loop.c' and described by
+     `pass_lim'.
+
+   * Loop nest optimizations
+
+     This is a family of loop transformations that works on loop nests.
+     It includes loop interchange, scaling, skewing and reversal and
+     they are all geared to the optimization of data locality in array
+     traversals and the removal of dependencies that hamper
+     optimizations such as loop parallelization and vectorization.  The
+     pass is located in `tree-loop-linear.c' and described by
+     `pass_linear_transform'.
+
+   * Removal of empty loops
+
+     This pass removes loops with no code in them.  The pass is located
+     in `tree-ssa-loop-ivcanon.c' and described by `pass_empty_loop'.
+
+   * Unrolling of small loops
+
+     This pass completely unrolls loops with few iterations.  The pass
+     is located in `tree-ssa-loop-ivcanon.c' and described by
+     `pass_complete_unroll'.
+
+   * Predictive commoning
+
+     This pass makes the code reuse the computations from the previous
+     iterations of the loops, especially loads and stores to memory.
+     It does so by storing the values of these computations to a bank
+     of temporary variables that are rotated at the end of loop.  To
+     avoid the need for this rotation, the loop is then unrolled and
+     the copies of the loop body are rewritten to use the appropriate
+     version of the temporary variable.  This pass is located in
+     `tree-predcom.c' and described by `pass_predcom'.
+
+   * Array prefetching
+
+     This pass issues prefetch instructions for array references inside
+     loops.  The pass is located in `tree-ssa-loop-prefetch.c' and
+     described by `pass_loop_prefetch'.
+
+   * Reassociation
+
+     This pass rewrites arithmetic expressions to enable optimizations
+     that operate on them, like redundancy elimination and
+     vectorization.  The pass is located in `tree-ssa-reassoc.c' and
+     described by `pass_reassoc'.
+
+   * Optimization of `stdarg' functions
+
+     This pass tries to avoid the saving of register arguments into the
+     stack on entry to `stdarg' functions.  If the function doesn't use
+     any `va_start' macros, no registers need to be saved.  If
+     `va_start' macros are used, the `va_list' variables don't escape
+     the function, it is only necessary to save registers that will be
+     used in `va_arg' macros.  For instance, if `va_arg' is only used
+     with integral types in the function, floating point registers
+     don't need to be saved.  This pass is located in `tree-stdarg.c'
+     and described by `pass_stdarg'.
+
+
+
+File: gccint.info,  Node: RTL passes,  Prev: Tree SSA passes,  Up: Passes
+
+9.5 RTL passes
+==============
+
+The following briefly describes the RTL generation and optimization
+passes that are run after the Tree optimization passes.
+
+   * RTL generation
+
+     The source files for RTL generation include `stmt.c', `calls.c',
+     `expr.c', `explow.c', `expmed.c', `function.c', `optabs.c' and
+     `emit-rtl.c'.  Also, the file `insn-emit.c', generated from the
+     machine description by the program `genemit', is used in this
+     pass.  The header file `expr.h' is used for communication within
+     this pass.
+
+     The header files `insn-flags.h' and `insn-codes.h', generated from
+     the machine description by the programs `genflags' and `gencodes',
+     tell this pass which standard names are available for use and
+     which patterns correspond to them.
+
+   * Generation of exception landing pads
+
+     This pass generates the glue that handles communication between the
+     exception handling library routines and the exception handlers
+     within the function.  Entry points in the function that are
+     invoked by the exception handling library are called "landing
+     pads".  The code for this pass is located in `except.c'.
+
+   * Control flow graph cleanup
+
+     This pass removes unreachable code, simplifies jumps to next,
+     jumps to jump, jumps across jumps, etc.  The pass is run multiple
+     times.  For historical reasons, it is occasionally referred to as
+     the "jump optimization pass".  The bulk of the code for this pass
+     is in `cfgcleanup.c', and there are support routines in `cfgrtl.c'
+     and `jump.c'.
+
+   * Forward propagation of single-def values
+
+     This pass attempts to remove redundant computation by substituting
+     variables that come from a single definition, and seeing if the
+     result can be simplified.  It performs copy propagation and
+     addressing mode selection.  The pass is run twice, with values
+     being propagated into loops only on the second run.  The code is
+     located in `fwprop.c'.
+
+   * Common subexpression elimination
+
+     This pass removes redundant computation within basic blocks, and
+     optimizes addressing modes based on cost.  The pass is run twice.
+     The code for this pass is located in `cse.c'.
+
+   * Global common subexpression elimination
+
+     This pass performs two different types of GCSE  depending on
+     whether you are optimizing for size or not (LCM based GCSE tends
+     to increase code size for a gain in speed, while Morel-Renvoise
+     based GCSE does not).  When optimizing for size, GCSE is done
+     using Morel-Renvoise Partial Redundancy Elimination, with the
+     exception that it does not try to move invariants out of
+     loops--that is left to  the loop optimization pass.  If MR PRE
+     GCSE is done, code hoisting (aka unification) is also done, as
+     well as load motion.  If you are optimizing for speed, LCM (lazy
+     code motion) based GCSE is done.  LCM is based on the work of
+     Knoop, Ruthing, and Steffen.  LCM based GCSE also does loop
+     invariant code motion.  We also perform load and store motion when
+     optimizing for speed.  Regardless of which type of GCSE is used,
+     the GCSE pass also performs global constant and  copy propagation.
+     The source file for this pass is `gcse.c', and the LCM routines
+     are in `lcm.c'.
+
+   * Loop optimization
+
+     This pass performs several loop related optimizations.  The source
+     files `cfgloopanal.c' and `cfgloopmanip.c' contain generic loop
+     analysis and manipulation code.  Initialization and finalization
+     of loop structures is handled by `loop-init.c'.  A loop invariant
+     motion pass is implemented in `loop-invariant.c'.  Basic block
+     level optimizations--unrolling, peeling and unswitching loops--
+     are implemented in `loop-unswitch.c' and `loop-unroll.c'.
+     Replacing of the exit condition of loops by special
+     machine-dependent instructions is handled by `loop-doloop.c'.
+
+   * Jump bypassing
+
+     This pass is an aggressive form of GCSE that transforms the control
+     flow graph of a function by propagating constants into conditional
+     branch instructions.  The source file for this pass is `gcse.c'.
+
+   * If conversion
+
+     This pass attempts to replace conditional branches and surrounding
+     assignments with arithmetic, boolean value producing comparison
+     instructions, and conditional move instructions.  In the very last
+     invocation after reload, it will generate predicated instructions
+     when supported by the target.  The code is located in `ifcvt.c'.
+
+   * Web construction
+
+     This pass splits independent uses of each pseudo-register.  This
+     can improve effect of the other transformation, such as CSE or
+     register allocation.  The code for this pass is located in `web.c'.
+
+   * Instruction combination
+
+     This pass attempts to combine groups of two or three instructions
+     that are related by data flow into single instructions.  It
+     combines the RTL expressions for the instructions by substitution,
+     simplifies the result using algebra, and then attempts to match
+     the result against the machine description.  The code is located
+     in `combine.c'.
+
+   * Register movement
+
+     This pass looks for cases where matching constraints would force an
+     instruction to need a reload, and this reload would be a
+     register-to-register move.  It then attempts to change the
+     registers used by the instruction to avoid the move instruction.
+     The code is located in `regmove.c'.
+
+   * Mode switching optimization
+
+     This pass looks for instructions that require the processor to be
+     in a specific "mode" and minimizes the number of mode changes
+     required to satisfy all users.  What these modes are, and what
+     they apply to are completely target-specific.  The code for this
+     pass is located in `mode-switching.c'.
+
+   * Modulo scheduling
+
+     This pass looks at innermost loops and reorders their instructions
+     by overlapping different iterations.  Modulo scheduling is
+     performed immediately before instruction scheduling.  The code for
+     this pass is located in `modulo-sched.c'.
+
+   * Instruction scheduling
+
+     This pass looks for instructions whose output will not be
+     available by the time that it is used in subsequent instructions.
+     Memory loads and floating point instructions often have this
+     behavior on RISC machines.  It re-orders instructions within a
+     basic block to try to separate the definition and use of items
+     that otherwise would cause pipeline stalls.  This pass is
+     performed twice, before and after register allocation.  The code
+     for this pass is located in `haifa-sched.c', `sched-deps.c',
+     `sched-ebb.c', `sched-rgn.c' and `sched-vis.c'.
+
+   * Register allocation
+
+     These passes make sure that all occurrences of pseudo registers are
+     eliminated, either by allocating them to a hard register, replacing
+     them by an equivalent expression (e.g. a constant) or by placing
+     them on the stack.  This is done in several subpasses:
+
+        * Register move optimizations.  This pass makes some simple RTL
+          code transformations which improve the subsequent register
+          allocation.  The source file is `regmove.c'.
+
+        * The integrated register allocator (IRA).  It is called
+          integrated because coalescing, register live range splitting,
+          and hard register preferencing are done on-the-fly during
+          coloring.  It also has better integration with the reload
+          pass.  Pseudo-registers spilled by the allocator or the
+          reload have still a chance to get hard-registers if the
+          reload evicts some pseudo-registers from hard-registers.  The
+          allocator helps to choose better pseudos for spilling based
+          on their live ranges and to coalesce stack slots allocated
+          for the spilled pseudo-registers.  IRA is a regional register
+          allocator which is transformed into Chaitin-Briggs allocator
+          if there is one region.  By default, IRA chooses regions using
+          register pressure but the user can force it to use one region
+          or regions corresponding to all loops.
+
+          Source files of the allocator are `ira.c', `ira-build.c',
+          `ira-costs.c', `ira-conflicts.c', `ira-color.c',
+          `ira-emit.c', `ira-lives', plus header files `ira.h' and
+          `ira-int.h' used for the communication between the allocator
+          and the rest of the compiler and between the IRA files.
+
+        * Reloading.  This pass renumbers pseudo registers with the
+          hardware registers numbers they were allocated.  Pseudo
+          registers that did not get hard registers are replaced with
+          stack slots.  Then it finds instructions that are invalid
+          because a value has failed to end up in a register, or has
+          ended up in a register of the wrong kind.  It fixes up these
+          instructions by reloading the problematical values
+          temporarily into registers.  Additional instructions are
+          generated to do the copying.
+
+          The reload pass also optionally eliminates the frame pointer
+          and inserts instructions to save and restore call-clobbered
+          registers around calls.
+
+          Source files are `reload.c' and `reload1.c', plus the header
+          `reload.h' used for communication between them.
+
+   * Basic block reordering
+
+     This pass implements profile guided code positioning.  If profile
+     information is not available, various types of static analysis are
+     performed to make the predictions normally coming from the profile
+     feedback (IE execution frequency, branch probability, etc).  It is
+     implemented in the file `bb-reorder.c', and the various prediction
+     routines are in `predict.c'.
+
+   * Variable tracking
+
+     This pass computes where the variables are stored at each position
+     in code and generates notes describing the variable locations to
+     RTL code.  The location lists are then generated according to these
+     notes to debug information if the debugging information format
+     supports location lists.  The code is located in `var-tracking.c'.
+
+   * Delayed branch scheduling
+
+     This optional pass attempts to find instructions that can go into
+     the delay slots of other instructions, usually jumps and calls.
+     The code for this pass is located in `reorg.c'.
+
+   * Branch shortening
+
+     On many RISC machines, branch instructions have a limited range.
+     Thus, longer sequences of instructions must be used for long
+     branches.  In this pass, the compiler figures out what how far
+     each instruction will be from each other instruction, and
+     therefore whether the usual instructions, or the longer sequences,
+     must be used for each branch.  The code for this pass is located
+     in `final.c'.
+
+   * Register-to-stack conversion
+
+     Conversion from usage of some hard registers to usage of a register
+     stack may be done at this point.  Currently, this is supported only
+     for the floating-point registers of the Intel 80387 coprocessor.
+     The code for this pass is located in `reg-stack.c'.
+
+   * Final
+
+     This pass outputs the assembler code for the function.  The source
+     files are `final.c' plus `insn-output.c'; the latter is generated
+     automatically from the machine description by the tool `genoutput'.
+     The header file `conditions.h' is used for communication between
+     these files.  If mudflap is enabled, the queue of deferred
+     declarations and any addressed constants (e.g., string literals)
+     is processed by `mudflap_finish_file' into a synthetic constructor
+     function containing calls into the mudflap runtime.
+
+   * Debugging information output
+
+     This is run after final because it must output the stack slot
+     offsets for pseudo registers that did not get hard registers.
+     Source files are `dbxout.c' for DBX symbol table format,
+     `sdbout.c' for SDB symbol table format, `dwarfout.c' for DWARF
+     symbol table format, files `dwarf2out.c' and `dwarf2asm.c' for
+     DWARF2 symbol table format, and `vmsdbgout.c' for VMS debug symbol
+     table format.
+
+
+
+File: gccint.info,  Node: RTL,  Next: Control Flow,  Prev: Tree SSA,  Up: Top
+
+10 RTL Representation
+*********************
+
+The last part of the compiler work is done on a low-level intermediate
+representation called Register Transfer Language.  In this language, the
+instructions to be output are described, pretty much one by one, in an
+algebraic form that describes what the instruction does.
+
+ RTL is inspired by Lisp lists.  It has both an internal form, made up
+of structures that point at other structures, and a textual form that
+is used in the machine description and in printed debugging dumps.  The
+textual form uses nested parentheses to indicate the pointers in the
+internal form.
+
+* Menu:
+
+* RTL Objects::       Expressions vs vectors vs strings vs integers.
+* RTL Classes::       Categories of RTL expression objects, and their structure.
+* Accessors::         Macros to access expression operands or vector elts.
+* Special Accessors:: Macros to access specific annotations on RTL.
+* Flags::             Other flags in an RTL expression.
+* Machine Modes::     Describing the size and format of a datum.
+* Constants::         Expressions with constant values.
+* Regs and Memory::   Expressions representing register contents or memory.
+* Arithmetic::        Expressions representing arithmetic on other expressions.
+* Comparisons::       Expressions representing comparison of expressions.
+* Bit-Fields::        Expressions representing bit-fields in memory or reg.
+* Vector Operations:: Expressions involving vector datatypes.
+* Conversions::       Extending, truncating, floating or fixing.
+* RTL Declarations::  Declaring volatility, constancy, etc.
+* Side Effects::      Expressions for storing in registers, etc.
+* Incdec::            Embedded side-effects for autoincrement addressing.
+* Assembler::         Representing `asm' with operands.
+* Debug Information:: Expressions representing debugging information.
+* Insns::             Expression types for entire insns.
+* Calls::             RTL representation of function call insns.
+* Sharing::           Some expressions are unique; others *must* be copied.
+* Reading RTL::       Reading textual RTL from a file.
+
+
+File: gccint.info,  Node: RTL Objects,  Next: RTL Classes,  Up: RTL
+
+10.1 RTL Object Types
+=====================
+
+RTL uses five kinds of objects: expressions, integers, wide integers,
+strings and vectors.  Expressions are the most important ones.  An RTL
+expression ("RTX", for short) is a C structure, but it is usually
+referred to with a pointer; a type that is given the typedef name `rtx'.
+
+ An integer is simply an `int'; their written form uses decimal digits.
+A wide integer is an integral object whose type is `HOST_WIDE_INT';
+their written form uses decimal digits.
+
+ A string is a sequence of characters.  In core it is represented as a
+`char *' in usual C fashion, and it is written in C syntax as well.
+However, strings in RTL may never be null.  If you write an empty
+string in a machine description, it is represented in core as a null
+pointer rather than as a pointer to a null character.  In certain
+contexts, these null pointers instead of strings are valid.  Within RTL
+code, strings are most commonly found inside `symbol_ref' expressions,
+but they appear in other contexts in the RTL expressions that make up
+machine descriptions.
+
+ In a machine description, strings are normally written with double
+quotes, as you would in C.  However, strings in machine descriptions may
+extend over many lines, which is invalid C, and adjacent string
+constants are not concatenated as they are in C.  Any string constant
+may be surrounded with a single set of parentheses.  Sometimes this
+makes the machine description easier to read.
+
+ There is also a special syntax for strings, which can be useful when C
+code is embedded in a machine description.  Wherever a string can
+appear, it is also valid to write a C-style brace block.  The entire
+brace block, including the outermost pair of braces, is considered to be
+the string constant.  Double quote characters inside the braces are not
+special.  Therefore, if you write string constants in the C code, you
+need not escape each quote character with a backslash.
+
+ A vector contains an arbitrary number of pointers to expressions.  The
+number of elements in the vector is explicitly present in the vector.
+The written form of a vector consists of square brackets (`[...]')
+surrounding the elements, in sequence and with whitespace separating
+them.  Vectors of length zero are not created; null pointers are used
+instead.
+
+ Expressions are classified by "expression codes" (also called RTX
+codes).  The expression code is a name defined in `rtl.def', which is
+also (in uppercase) a C enumeration constant.  The possible expression
+codes and their meanings are machine-independent.  The code of an RTX
+can be extracted with the macro `GET_CODE (X)' and altered with
+`PUT_CODE (X, NEWCODE)'.
+
+ The expression code determines how many operands the expression
+contains, and what kinds of objects they are.  In RTL, unlike Lisp, you
+cannot tell by looking at an operand what kind of object it is.
+Instead, you must know from its context--from the expression code of
+the containing expression.  For example, in an expression of code
+`subreg', the first operand is to be regarded as an expression and the
+second operand as an integer.  In an expression of code `plus', there
+are two operands, both of which are to be regarded as expressions.  In
+a `symbol_ref' expression, there is one operand, which is to be
+regarded as a string.
+
+ Expressions are written as parentheses containing the name of the
+expression type, its flags and machine mode if any, and then the
+operands of the expression (separated by spaces).
+
+ Expression code names in the `md' file are written in lowercase, but
+when they appear in C code they are written in uppercase.  In this
+manual, they are shown as follows: `const_int'.
+
+ In a few contexts a null pointer is valid where an expression is
+normally wanted.  The written form of this is `(nil)'.
+
+
+File: gccint.info,  Node: RTL Classes,  Next: Accessors,  Prev: RTL Objects,  Up: RTL
+
+10.2 RTL Classes and Formats
+============================
+
+The various expression codes are divided into several "classes", which
+are represented by single characters.  You can determine the class of
+an RTX code with the macro `GET_RTX_CLASS (CODE)'.  Currently,
+`rtl.def' defines these classes:
+
+`RTX_OBJ'
+     An RTX code that represents an actual object, such as a register
+     (`REG') or a memory location (`MEM', `SYMBOL_REF').  `LO_SUM') is
+     also included; instead, `SUBREG' and `STRICT_LOW_PART' are not in
+     this class, but in class `x'.
+
+`RTX_CONST_OBJ'
+     An RTX code that represents a constant object.  `HIGH' is also
+     included in this class.
+
+`RTX_COMPARE'
+     An RTX code for a non-symmetric comparison, such as `GEU' or `LT'.
+
+`RTX_COMM_COMPARE'
+     An RTX code for a symmetric (commutative) comparison, such as `EQ'
+     or `ORDERED'.
+
+`RTX_UNARY'
+     An RTX code for a unary arithmetic operation, such as `NEG',
+     `NOT', or `ABS'.  This category also includes value extension
+     (sign or zero) and conversions between integer and floating point.
+
+`RTX_COMM_ARITH'
+     An RTX code for a commutative binary operation, such as `PLUS' or
+     `AND'.  `NE' and `EQ' are comparisons, so they have class `<'.
+
+`RTX_BIN_ARITH'
+     An RTX code for a non-commutative binary operation, such as
+     `MINUS', `DIV', or `ASHIFTRT'.
+
+`RTX_BITFIELD_OPS'
+     An RTX code for a bit-field operation.  Currently only
+     `ZERO_EXTRACT' and `SIGN_EXTRACT'.  These have three inputs and
+     are lvalues (so they can be used for insertion as well).  *Note
+     Bit-Fields::.
+
+`RTX_TERNARY'
+     An RTX code for other three input operations.  Currently only
+     `IF_THEN_ELSE' and `VEC_MERGE'.
+
+`RTX_INSN'
+     An RTX code for an entire instruction:  `INSN', `JUMP_INSN', and
+     `CALL_INSN'.  *Note Insns::.
+
+`RTX_MATCH'
+     An RTX code for something that matches in insns, such as
+     `MATCH_DUP'.  These only occur in machine descriptions.
+
+`RTX_AUTOINC'
+     An RTX code for an auto-increment addressing mode, such as
+     `POST_INC'.
+
+`RTX_EXTRA'
+     All other RTX codes.  This category includes the remaining codes
+     used only in machine descriptions (`DEFINE_*', etc.).  It also
+     includes all the codes describing side effects (`SET', `USE',
+     `CLOBBER', etc.) and the non-insns that may appear on an insn
+     chain, such as `NOTE', `BARRIER', and `CODE_LABEL'.  `SUBREG' is
+     also part of this class.
+
+ For each expression code, `rtl.def' specifies the number of contained
+objects and their kinds using a sequence of characters called the
+"format" of the expression code.  For example, the format of `subreg'
+is `ei'.
+
+ These are the most commonly used format characters:
+
+`e'
+     An expression (actually a pointer to an expression).
+
+`i'
+     An integer.
+
+`w'
+     A wide integer.
+
+`s'
+     A string.
+
+`E'
+     A vector of expressions.
+
+ A few other format characters are used occasionally:
+
+`u'
+     `u' is equivalent to `e' except that it is printed differently in
+     debugging dumps.  It is used for pointers to insns.
+
+`n'
+     `n' is equivalent to `i' except that it is printed differently in
+     debugging dumps.  It is used for the line number or code number of
+     a `note' insn.
+
+`S'
+     `S' indicates a string which is optional.  In the RTL objects in
+     core, `S' is equivalent to `s', but when the object is read, from
+     an `md' file, the string value of this operand may be omitted.  An
+     omitted string is taken to be the null string.
+
+`V'
+     `V' indicates a vector which is optional.  In the RTL objects in
+     core, `V' is equivalent to `E', but when the object is read from
+     an `md' file, the vector value of this operand may be omitted.  An
+     omitted vector is effectively the same as a vector of no elements.
+
+`B'
+     `B' indicates a pointer to basic block structure.
+
+`0'
+     `0' means a slot whose contents do not fit any normal category.
+     `0' slots are not printed at all in dumps, and are often used in
+     special ways by small parts of the compiler.
+
+ There are macros to get the number of operands and the format of an
+expression code:
+
+`GET_RTX_LENGTH (CODE)'
+     Number of operands of an RTX of code CODE.
+
+`GET_RTX_FORMAT (CODE)'
+     The format of an RTX of code CODE, as a C string.
+
+ Some classes of RTX codes always have the same format.  For example, it
+is safe to assume that all comparison operations have format `ee'.
+
+`1'
+     All codes of this class have format `e'.
+
+`<'
+`c'
+`2'
+     All codes of these classes have format `ee'.
+
+`b'
+`3'
+     All codes of these classes have format `eee'.
+
+`i'
+     All codes of this class have formats that begin with `iuueiee'.
+     *Note Insns::.  Note that not all RTL objects linked onto an insn
+     chain are of class `i'.
+
+`o'
+`m'
+`x'
+     You can make no assumptions about the format of these codes.
+
+
+File: gccint.info,  Node: Accessors,  Next: Special Accessors,  Prev: RTL Classes,  Up: RTL
+
+10.3 Access to Operands
+=======================
+
+Operands of expressions are accessed using the macros `XEXP', `XINT',
+`XWINT' and `XSTR'.  Each of these macros takes two arguments: an
+expression-pointer (RTX) and an operand number (counting from zero).
+Thus,
+
+     XEXP (X, 2)
+
+accesses operand 2 of expression X, as an expression.
+
+     XINT (X, 2)
+
+accesses the same operand as an integer.  `XSTR', used in the same
+fashion, would access it as a string.
+
+ Any operand can be accessed as an integer, as an expression or as a
+string.  You must choose the correct method of access for the kind of
+value actually stored in the operand.  You would do this based on the
+expression code of the containing expression.  That is also how you
+would know how many operands there are.
+
+ For example, if X is a `subreg' expression, you know that it has two
+operands which can be correctly accessed as `XEXP (X, 0)' and `XINT (X,
+1)'.  If you did `XINT (X, 0)', you would get the address of the
+expression operand but cast as an integer; that might occasionally be
+useful, but it would be cleaner to write `(int) XEXP (X, 0)'.  `XEXP
+(X, 1)' would also compile without error, and would return the second,
+integer operand cast as an expression pointer, which would probably
+result in a crash when accessed.  Nothing stops you from writing `XEXP
+(X, 28)' either, but this will access memory past the end of the
+expression with unpredictable results.
+
+ Access to operands which are vectors is more complicated.  You can use
+the macro `XVEC' to get the vector-pointer itself, or the macros
+`XVECEXP' and `XVECLEN' to access the elements and length of a vector.
+
+`XVEC (EXP, IDX)'
+     Access the vector-pointer which is operand number IDX in EXP.
+
+`XVECLEN (EXP, IDX)'
+     Access the length (number of elements) in the vector which is in
+     operand number IDX in EXP.  This value is an `int'.
+
+`XVECEXP (EXP, IDX, ELTNUM)'
+     Access element number ELTNUM in the vector which is in operand
+     number IDX in EXP.  This value is an RTX.
+
+     It is up to you to make sure that ELTNUM is not negative and is
+     less than `XVECLEN (EXP, IDX)'.
+
+ All the macros defined in this section expand into lvalues and
+therefore can be used to assign the operands, lengths and vector
+elements as well as to access them.
+
+
+File: gccint.info,  Node: Special Accessors,  Next: Flags,  Prev: Accessors,  Up: RTL
+
+10.4 Access to Special Operands
+===============================
+
+Some RTL nodes have special annotations associated with them.
+
+`MEM'
+
+    `MEM_ALIAS_SET (X)'
+          If 0, X is not in any alias set, and may alias anything.
+          Otherwise, X can only alias `MEM's in a conflicting alias
+          set.  This value is set in a language-dependent manner in the
+          front-end, and should not be altered in the back-end.  In
+          some front-ends, these numbers may correspond in some way to
+          types, or other language-level entities, but they need not,
+          and the back-end makes no such assumptions.  These set
+          numbers are tested with `alias_sets_conflict_p'.
+
+    `MEM_EXPR (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is that tree node.  It may also be a
+          `COMPONENT_REF', in which case this is some field reference,
+          and `TREE_OPERAND (X, 0)' contains the declaration, or
+          another `COMPONENT_REF', or null if there is no compile-time
+          object associated with the reference.
+
+    `MEM_OFFSET (X)'
+          The offset from the start of `MEM_EXPR' as a `CONST_INT' rtx.
+
+    `MEM_SIZE (X)'
+          The size in bytes of the memory reference as a `CONST_INT'
+          rtx.  This is mostly relevant for `BLKmode' references as
+          otherwise the size is implied by the mode.
+
+    `MEM_ALIGN (X)'
+          The known alignment in bits of the memory reference.
+
+    `MEM_ADDR_SPACE (X)'
+          The address space of the memory reference.  This will
+          commonly be zero for the generic address space.
+
+`REG'
+
+    `ORIGINAL_REGNO (X)'
+          This field holds the number the register "originally" had;
+          for a pseudo register turned into a hard reg this will hold
+          the old pseudo register number.
+
+    `REG_EXPR (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is that tree node.
+
+    `REG_OFFSET (X)'
+          If this register is known to hold the value of some user-level
+          declaration, this is the offset into that logical storage.
+
+`SYMBOL_REF'
+
+    `SYMBOL_REF_DECL (X)'
+          If the `symbol_ref' X was created for a `VAR_DECL' or a
+          `FUNCTION_DECL', that tree is recorded here.  If this value is
+          null, then X was created by back end code generation routines,
+          and there is no associated front end symbol table entry.
+
+          `SYMBOL_REF_DECL' may also point to a tree of class `'c'',
+          that is, some sort of constant.  In this case, the
+          `symbol_ref' is an entry in the per-file constant pool;
+          again, there is no associated front end symbol table entry.
+
+    `SYMBOL_REF_CONSTANT (X)'
+          If `CONSTANT_POOL_ADDRESS_P (X)' is true, this is the constant
+          pool entry for X.  It is null otherwise.
+
+    `SYMBOL_REF_DATA (X)'
+          A field of opaque type used to store `SYMBOL_REF_DECL' or
+          `SYMBOL_REF_CONSTANT'.
+
+    `SYMBOL_REF_FLAGS (X)'
+          In a `symbol_ref', this is used to communicate various
+          predicates about the symbol.  Some of these are common enough
+          to be computed by common code, some are specific to the
+          target.  The common bits are:
+
+         `SYMBOL_FLAG_FUNCTION'
+               Set if the symbol refers to a function.
+
+         `SYMBOL_FLAG_LOCAL'
+               Set if the symbol is local to this "module".  See
+               `TARGET_BINDS_LOCAL_P'.
+
+         `SYMBOL_FLAG_EXTERNAL'
+               Set if this symbol is not defined in this translation
+               unit.  Note that this is not the inverse of
+               `SYMBOL_FLAG_LOCAL'.
+
+         `SYMBOL_FLAG_SMALL'
+               Set if the symbol is located in the small data section.
+               See `TARGET_IN_SMALL_DATA_P'.
+
+         `SYMBOL_REF_TLS_MODEL (X)'
+               This is a multi-bit field accessor that returns the
+               `tls_model' to be used for a thread-local storage
+               symbol.  It returns zero for non-thread-local symbols.
+
+         `SYMBOL_FLAG_HAS_BLOCK_INFO'
+               Set if the symbol has `SYMBOL_REF_BLOCK' and
+               `SYMBOL_REF_BLOCK_OFFSET' fields.
+
+         `SYMBOL_FLAG_ANCHOR'
+               Set if the symbol is used as a section anchor.  "Section
+               anchors" are symbols that have a known position within
+               an `object_block' and that can be used to access nearby
+               members of that block.  They are used to implement
+               `-fsection-anchors'.
+
+               If this flag is set, then `SYMBOL_FLAG_HAS_BLOCK_INFO'
+               will be too.
+
+          Bits beginning with `SYMBOL_FLAG_MACH_DEP' are available for
+          the target's use.
+
+`SYMBOL_REF_BLOCK (X)'
+     If `SYMBOL_REF_HAS_BLOCK_INFO_P (X)', this is the `object_block'
+     structure to which the symbol belongs, or `NULL' if it has not
+     been assigned a block.
+
+`SYMBOL_REF_BLOCK_OFFSET (X)'
+     If `SYMBOL_REF_HAS_BLOCK_INFO_P (X)', this is the offset of X from
+     the first object in `SYMBOL_REF_BLOCK (X)'.  The value is negative
+     if X has not yet been assigned to a block, or it has not been
+     given an offset within that block.
+
+
+File: gccint.info,  Node: Flags,  Next: Machine Modes,  Prev: Special Accessors,  Up: RTL
+
+10.5 Flags in an RTL Expression
+===============================
+
+RTL expressions contain several flags (one-bit bit-fields) that are
+used in certain types of expression.  Most often they are accessed with
+the following macros, which expand into lvalues.
+
+`CONSTANT_POOL_ADDRESS_P (X)'
+     Nonzero in a `symbol_ref' if it refers to part of the current
+     function's constant pool.  For most targets these addresses are in
+     a `.rodata' section entirely separate from the function, but for
+     some targets the addresses are close to the beginning of the
+     function.  In either case GCC assumes these addresses can be
+     addressed directly, perhaps with the help of base registers.
+     Stored in the `unchanging' field and printed as `/u'.
+
+`RTL_CONST_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a call to a
+     const function.  Stored in the `unchanging' field and printed as
+     `/u'.
+
+`RTL_PURE_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a call to a
+     pure function.  Stored in the `return_val' field and printed as
+     `/i'.
+
+`RTL_CONST_OR_PURE_CALL_P (X)'
+     In a `call_insn', true if `RTL_CONST_CALL_P' or `RTL_PURE_CALL_P'
+     is true.
+
+`RTL_LOOPING_CONST_OR_PURE_CALL_P (X)'
+     In a `call_insn' indicates that the insn represents a possibly
+     infinite looping call to a const or pure function.  Stored in the
+     `call' field and printed as `/c'.  Only true if one of
+     `RTL_CONST_CALL_P' or `RTL_PURE_CALL_P' is true.
+
+`INSN_ANNULLED_BRANCH_P (X)'
+     In a `jump_insn', `call_insn', or `insn' indicates that the branch
+     is an annulling one.  See the discussion under `sequence' below.
+     Stored in the `unchanging' field and printed as `/u'.
+
+`INSN_DELETED_P (X)'
+     In an `insn', `call_insn', `jump_insn', `code_label', `barrier',
+     or `note', nonzero if the insn has been deleted.  Stored in the
+     `volatil' field and printed as `/v'.
+
+`INSN_FROM_TARGET_P (X)'
+     In an `insn' or `jump_insn' or `call_insn' in a delay slot of a
+     branch, indicates that the insn is from the target of the branch.
+     If the branch insn has `INSN_ANNULLED_BRANCH_P' set, this insn
+     will only be executed if the branch is taken.  For annulled
+     branches with `INSN_FROM_TARGET_P' clear, the insn will be
+     executed only if the branch is not taken.  When
+     `INSN_ANNULLED_BRANCH_P' is not set, this insn will always be
+     executed.  Stored in the `in_struct' field and printed as `/s'.
+
+`LABEL_PRESERVE_P (X)'
+     In a `code_label' or `note', indicates that the label is
+     referenced by code or data not visible to the RTL of a given
+     function.  Labels referenced by a non-local goto will have this
+     bit set.  Stored in the `in_struct' field and printed as `/s'.
+
+`LABEL_REF_NONLOCAL_P (X)'
+     In `label_ref' and `reg_label' expressions, nonzero if this is a
+     reference to a non-local label.  Stored in the `volatil' field and
+     printed as `/v'.
+
+`MEM_IN_STRUCT_P (X)'
+     In `mem' expressions, nonzero for reference to an entire structure,
+     union or array, or to a component of one.  Zero for references to a
+     scalar variable or through a pointer to a scalar.  If both this
+     flag and `MEM_SCALAR_P' are clear, then we don't know whether this
+     `mem' is in a structure or not.  Both flags should never be
+     simultaneously set.  Stored in the `in_struct' field and printed
+     as `/s'.
+
+`MEM_KEEP_ALIAS_SET_P (X)'
+     In `mem' expressions, 1 if we should keep the alias set for this
+     mem unchanged when we access a component.  Set to 1, for example,
+     when we are already in a non-addressable component of an aggregate.
+     Stored in the `jump' field and printed as `/j'.
+
+`MEM_SCALAR_P (X)'
+     In `mem' expressions, nonzero for reference to a scalar known not
+     to be a member of a structure, union, or array.  Zero for such
+     references and for indirections through pointers, even pointers
+     pointing to scalar types.  If both this flag and `MEM_IN_STRUCT_P'
+     are clear, then we don't know whether this `mem' is in a structure
+     or not.  Both flags should never be simultaneously set.  Stored in
+     the `return_val' field and printed as `/i'.
+
+`MEM_VOLATILE_P (X)'
+     In `mem', `asm_operands', and `asm_input' expressions, nonzero for
+     volatile memory references.  Stored in the `volatil' field and
+     printed as `/v'.
+
+`MEM_NOTRAP_P (X)'
+     In `mem', nonzero for memory references that will not trap.
+     Stored in the `call' field and printed as `/c'.
+
+`MEM_POINTER (X)'
+     Nonzero in a `mem' if the memory reference holds a pointer.
+     Stored in the `frame_related' field and printed as `/f'.
+
+`REG_FUNCTION_VALUE_P (X)'
+     Nonzero in a `reg' if it is the place in which this function's
+     value is going to be returned.  (This happens only in a hard
+     register.)  Stored in the `return_val' field and printed as `/i'.
+
+`REG_POINTER (X)'
+     Nonzero in a `reg' if the register holds a pointer.  Stored in the
+     `frame_related' field and printed as `/f'.
+
+`REG_USERVAR_P (X)'
+     In a `reg', nonzero if it corresponds to a variable present in the
+     user's source code.  Zero for temporaries generated internally by
+     the compiler.  Stored in the `volatil' field and printed as `/v'.
+
+     The same hard register may be used also for collecting the values
+     of functions called by this one, but `REG_FUNCTION_VALUE_P' is zero
+     in this kind of use.
+
+`RTX_FRAME_RELATED_P (X)'
+     Nonzero in an `insn', `call_insn', `jump_insn', `barrier', or
+     `set' which is part of a function prologue and sets the stack
+     pointer, sets the frame pointer, or saves a register.  This flag
+     should also be set on an instruction that sets up a temporary
+     register to use in place of the frame pointer.  Stored in the
+     `frame_related' field and printed as `/f'.
+
+     In particular, on RISC targets where there are limits on the sizes
+     of immediate constants, it is sometimes impossible to reach the
+     register save area directly from the stack pointer.  In that case,
+     a temporary register is used that is near enough to the register
+     save area, and the Canonical Frame Address, i.e., DWARF2's logical
+     frame pointer, register must (temporarily) be changed to be this
+     temporary register.  So, the instruction that sets this temporary
+     register must be marked as `RTX_FRAME_RELATED_P'.
+
+     If the marked instruction is overly complex (defined in terms of
+     what `dwarf2out_frame_debug_expr' can handle), you will also have
+     to create a `REG_FRAME_RELATED_EXPR' note and attach it to the
+     instruction.  This note should contain a simple expression of the
+     computation performed by this instruction, i.e., one that
+     `dwarf2out_frame_debug_expr' can handle.
+
+     This flag is required for exception handling support on targets
+     with RTL prologues.
+
+`MEM_READONLY_P (X)'
+     Nonzero in a `mem', if the memory is statically allocated and
+     read-only.
+
+     Read-only in this context means never modified during the lifetime
+     of the program, not necessarily in ROM or in write-disabled pages.
+     A common example of the later is a shared library's global offset
+     table.  This table is initialized by the runtime loader, so the
+     memory is technically writable, but after control is transfered
+     from the runtime loader to the application, this memory will never
+     be subsequently modified.
+
+     Stored in the `unchanging' field and printed as `/u'.
+
+`SCHED_GROUP_P (X)'
+     During instruction scheduling, in an `insn', `call_insn' or
+     `jump_insn', indicates that the previous insn must be scheduled
+     together with this insn.  This is used to ensure that certain
+     groups of instructions will not be split up by the instruction
+     scheduling pass, for example, `use' insns before a `call_insn' may
+     not be separated from the `call_insn'.  Stored in the `in_struct'
+     field and printed as `/s'.
+
+`SET_IS_RETURN_P (X)'
+     For a `set', nonzero if it is for a return.  Stored in the `jump'
+     field and printed as `/j'.
+
+`SIBLING_CALL_P (X)'
+     For a `call_insn', nonzero if the insn is a sibling call.  Stored
+     in the `jump' field and printed as `/j'.
+
+`STRING_POOL_ADDRESS_P (X)'
+     For a `symbol_ref' expression, nonzero if it addresses this
+     function's string constant pool.  Stored in the `frame_related'
+     field and printed as `/f'.
+
+`SUBREG_PROMOTED_UNSIGNED_P (X)'
+     Returns a value greater then zero for a `subreg' that has
+     `SUBREG_PROMOTED_VAR_P' nonzero if the object being referenced is
+     kept zero-extended, zero if it is kept sign-extended, and less
+     then zero if it is extended some other way via the `ptr_extend'
+     instruction.  Stored in the `unchanging' field and `volatil'
+     field, printed as `/u' and `/v'.  This macro may only be used to
+     get the value it may not be used to change the value.  Use
+     `SUBREG_PROMOTED_UNSIGNED_SET' to change the value.
+
+`SUBREG_PROMOTED_UNSIGNED_SET (X)'
+     Set the `unchanging' and `volatil' fields in a `subreg' to reflect
+     zero, sign, or other extension.  If `volatil' is zero, then
+     `unchanging' as nonzero means zero extension and as zero means
+     sign extension.  If `volatil' is nonzero then some other type of
+     extension was done via the `ptr_extend' instruction.
+
+`SUBREG_PROMOTED_VAR_P (X)'
+     Nonzero in a `subreg' if it was made when accessing an object that
+     was promoted to a wider mode in accord with the `PROMOTED_MODE'
+     machine description macro (*note Storage Layout::).  In this case,
+     the mode of the `subreg' is the declared mode of the object and
+     the mode of `SUBREG_REG' is the mode of the register that holds
+     the object.  Promoted variables are always either sign- or
+     zero-extended to the wider mode on every assignment.  Stored in
+     the `in_struct' field and printed as `/s'.
+
+`SYMBOL_REF_USED (X)'
+     In a `symbol_ref', indicates that X has been used.  This is
+     normally only used to ensure that X is only declared external
+     once.  Stored in the `used' field.
+
+`SYMBOL_REF_WEAK (X)'
+     In a `symbol_ref', indicates that X has been declared weak.
+     Stored in the `return_val' field and printed as `/i'.
+
+`SYMBOL_REF_FLAG (X)'
+     In a `symbol_ref', this is used as a flag for machine-specific
+     purposes.  Stored in the `volatil' field and printed as `/v'.
+
+     Most uses of `SYMBOL_REF_FLAG' are historic and may be subsumed by
+     `SYMBOL_REF_FLAGS'.  Certainly use of `SYMBOL_REF_FLAGS' is
+     mandatory if the target requires more than one bit of storage.
+
+`PREFETCH_SCHEDULE_BARRIER_P (X)'
+     In a `prefetch', indicates that the prefetch is a scheduling
+     barrier.  No other INSNs will be moved over it.  Stored in the
+     `volatil' field and printed as `/v'.
+
+ These are the fields to which the above macros refer:
+
+`call'
+     In a `mem', 1 means that the memory reference will not trap.
+
+     In a `call', 1 means that this pure or const call may possibly
+     infinite loop.
+
+     In an RTL dump, this flag is represented as `/c'.
+
+`frame_related'
+     In an `insn' or `set' expression, 1 means that it is part of a
+     function prologue and sets the stack pointer, sets the frame
+     pointer, saves a register, or sets up a temporary register to use
+     in place of the frame pointer.
+
+     In `reg' expressions, 1 means that the register holds a pointer.
+
+     In `mem' expressions, 1 means that the memory reference holds a
+     pointer.
+
+     In `symbol_ref' expressions, 1 means that the reference addresses
+     this function's string constant pool.
+
+     In an RTL dump, this flag is represented as `/f'.
+
+`in_struct'
+     In `mem' expressions, it is 1 if the memory datum referred to is
+     all or part of a structure or array; 0 if it is (or might be) a
+     scalar variable.  A reference through a C pointer has 0 because
+     the pointer might point to a scalar variable.  This information
+     allows the compiler to determine something about possible cases of
+     aliasing.
+
+     In `reg' expressions, it is 1 if the register has its entire life
+     contained within the test expression of some loop.
+
+     In `subreg' expressions, 1 means that the `subreg' is accessing an
+     object that has had its mode promoted from a wider mode.
+
+     In `label_ref' expressions, 1 means that the referenced label is
+     outside the innermost loop containing the insn in which the
+     `label_ref' was found.
+
+     In `code_label' expressions, it is 1 if the label may never be
+     deleted.  This is used for labels which are the target of
+     non-local gotos.  Such a label that would have been deleted is
+     replaced with a `note' of type `NOTE_INSN_DELETED_LABEL'.
+
+     In an `insn' during dead-code elimination, 1 means that the insn is
+     dead code.
+
+     In an `insn' or `jump_insn' during reorg for an insn in the delay
+     slot of a branch, 1 means that this insn is from the target of the
+     branch.
+
+     In an `insn' during instruction scheduling, 1 means that this insn
+     must be scheduled as part of a group together with the previous
+     insn.
+
+     In an RTL dump, this flag is represented as `/s'.
+
+`return_val'
+     In `reg' expressions, 1 means the register contains the value to
+     be returned by the current function.  On machines that pass
+     parameters in registers, the same register number may be used for
+     parameters as well, but this flag is not set on such uses.
+
+     In `mem' expressions, 1 means the memory reference is to a scalar
+     known not to be a member of a structure, union, or array.
+
+     In `symbol_ref' expressions, 1 means the referenced symbol is weak.
+
+     In `call' expressions, 1 means the call is pure.
+
+     In an RTL dump, this flag is represented as `/i'.
+
+`jump'
+     In a `mem' expression, 1 means we should keep the alias set for
+     this mem unchanged when we access a component.
+
+     In a `set', 1 means it is for a return.
+
+     In a `call_insn', 1 means it is a sibling call.
+
+     In an RTL dump, this flag is represented as `/j'.
+
+`unchanging'
+     In `reg' and `mem' expressions, 1 means that the value of the
+     expression never changes.
+
+     In `subreg' expressions, it is 1 if the `subreg' references an
+     unsigned object whose mode has been promoted to a wider mode.
+
+     In an `insn' or `jump_insn' in the delay slot of a branch
+     instruction, 1 means an annulling branch should be used.
+
+     In a `symbol_ref' expression, 1 means that this symbol addresses
+     something in the per-function constant pool.
+
+     In a `call_insn' 1 means that this instruction is a call to a const
+     function.
+
+     In an RTL dump, this flag is represented as `/u'.
+
+`used'
+     This flag is used directly (without an access macro) at the end of
+     RTL generation for a function, to count the number of times an
+     expression appears in insns.  Expressions that appear more than
+     once are copied, according to the rules for shared structure
+     (*note Sharing::).
+
+     For a `reg', it is used directly (without an access macro) by the
+     leaf register renumbering code to ensure that each register is only
+     renumbered once.
+
+     In a `symbol_ref', it indicates that an external declaration for
+     the symbol has already been written.
+
+`volatil'
+     In a `mem', `asm_operands', or `asm_input' expression, it is 1 if
+     the memory reference is volatile.  Volatile memory references may
+     not be deleted, reordered or combined.
+
+     In a `symbol_ref' expression, it is used for machine-specific
+     purposes.
+
+     In a `reg' expression, it is 1 if the value is a user-level
+     variable.  0 indicates an internal compiler temporary.
+
+     In an `insn', 1 means the insn has been deleted.
+
+     In `label_ref' and `reg_label' expressions, 1 means a reference to
+     a non-local label.
+
+     In `prefetch' expressions, 1 means that the containing insn is a
+     scheduling barrier.
+
+     In an RTL dump, this flag is represented as `/v'.
+
+
+File: gccint.info,  Node: Machine Modes,  Next: Constants,  Prev: Flags,  Up: RTL
+
+10.6 Machine Modes
+==================
+
+A machine mode describes a size of data object and the representation
+used for it.  In the C code, machine modes are represented by an
+enumeration type, `enum machine_mode', defined in `machmode.def'.  Each
+RTL expression has room for a machine mode and so do certain kinds of
+tree expressions (declarations and types, to be precise).
+
+ In debugging dumps and machine descriptions, the machine mode of an RTL
+expression is written after the expression code with a colon to separate
+them.  The letters `mode' which appear at the end of each machine mode
+name are omitted.  For example, `(reg:SI 38)' is a `reg' expression
+with machine mode `SImode'.  If the mode is `VOIDmode', it is not
+written at all.
+
+ Here is a table of machine modes.  The term "byte" below refers to an
+object of `BITS_PER_UNIT' bits (*note Storage Layout::).
+
+`BImode'
+     "Bit" mode represents a single bit, for predicate registers.
+
+`QImode'
+     "Quarter-Integer" mode represents a single byte treated as an
+     integer.
+
+`HImode'
+     "Half-Integer" mode represents a two-byte integer.
+
+`PSImode'
+     "Partial Single Integer" mode represents an integer which occupies
+     four bytes but which doesn't really use all four.  On some
+     machines, this is the right mode to use for pointers.
+
+`SImode'
+     "Single Integer" mode represents a four-byte integer.
+
+`PDImode'
+     "Partial Double Integer" mode represents an integer which occupies
+     eight bytes but which doesn't really use all eight.  On some
+     machines, this is the right mode to use for certain pointers.
+
+`DImode'
+     "Double Integer" mode represents an eight-byte integer.
+
+`TImode'
+     "Tetra Integer" (?) mode represents a sixteen-byte integer.
+
+`OImode'
+     "Octa Integer" (?) mode represents a thirty-two-byte integer.
+
+`QFmode'
+     "Quarter-Floating" mode represents a quarter-precision (single
+     byte) floating point number.
+
+`HFmode'
+     "Half-Floating" mode represents a half-precision (two byte)
+     floating point number.
+
+`TQFmode'
+     "Three-Quarter-Floating" (?) mode represents a
+     three-quarter-precision (three byte) floating point number.
+
+`SFmode'
+     "Single Floating" mode represents a four byte floating point
+     number.  In the common case, of a processor with IEEE arithmetic
+     and 8-bit bytes, this is a single-precision IEEE floating point
+     number; it can also be used for double-precision (on processors
+     with 16-bit bytes) and single-precision VAX and IBM types.
+
+`DFmode'
+     "Double Floating" mode represents an eight byte floating point
+     number.  In the common case, of a processor with IEEE arithmetic
+     and 8-bit bytes, this is a double-precision IEEE floating point
+     number.
+
+`XFmode'
+     "Extended Floating" mode represents an IEEE extended floating point
+     number.  This mode only has 80 meaningful bits (ten bytes).  Some
+     processors require such numbers to be padded to twelve bytes,
+     others to sixteen; this mode is used for either.
+
+`SDmode'
+     "Single Decimal Floating" mode represents a four byte decimal
+     floating point number (as distinct from conventional binary
+     floating point).
+
+`DDmode'
+     "Double Decimal Floating" mode represents an eight byte decimal
+     floating point number.
+
+`TDmode'
+     "Tetra Decimal Floating" mode represents a sixteen byte decimal
+     floating point number all 128 of whose bits are meaningful.
+
+`TFmode'
+     "Tetra Floating" mode represents a sixteen byte floating point
+     number all 128 of whose bits are meaningful.  One common use is the
+     IEEE quad-precision format.
+
+`QQmode'
+     "Quarter-Fractional" mode represents a single byte treated as a
+     signed fractional number.  The default format is "s.7".
+
+`HQmode'
+     "Half-Fractional" mode represents a two-byte signed fractional
+     number.  The default format is "s.15".
+
+`SQmode'
+     "Single Fractional" mode represents a four-byte signed fractional
+     number.  The default format is "s.31".
+
+`DQmode'
+     "Double Fractional" mode represents an eight-byte signed
+     fractional number.  The default format is "s.63".
+
+`TQmode'
+     "Tetra Fractional" mode represents a sixteen-byte signed
+     fractional number.  The default format is "s.127".
+
+`UQQmode'
+     "Unsigned Quarter-Fractional" mode represents a single byte
+     treated as an unsigned fractional number.  The default format is
+     ".8".
+
+`UHQmode'
+     "Unsigned Half-Fractional" mode represents a two-byte unsigned
+     fractional number.  The default format is ".16".
+
+`USQmode'
+     "Unsigned Single Fractional" mode represents a four-byte unsigned
+     fractional number.  The default format is ".32".
+
+`UDQmode'
+     "Unsigned Double Fractional" mode represents an eight-byte unsigned
+     fractional number.  The default format is ".64".
+
+`UTQmode'
+     "Unsigned Tetra Fractional" mode represents a sixteen-byte unsigned
+     fractional number.  The default format is ".128".
+
+`HAmode'
+     "Half-Accumulator" mode represents a two-byte signed accumulator.
+     The default format is "s8.7".
+
+`SAmode'
+     "Single Accumulator" mode represents a four-byte signed
+     accumulator.  The default format is "s16.15".
+
+`DAmode'
+     "Double Accumulator" mode represents an eight-byte signed
+     accumulator.  The default format is "s32.31".
+
+`TAmode'
+     "Tetra Accumulator" mode represents a sixteen-byte signed
+     accumulator.  The default format is "s64.63".
+
+`UHAmode'
+     "Unsigned Half-Accumulator" mode represents a two-byte unsigned
+     accumulator.  The default format is "8.8".
+
+`USAmode'
+     "Unsigned Single Accumulator" mode represents a four-byte unsigned
+     accumulator.  The default format is "16.16".
+
+`UDAmode'
+     "Unsigned Double Accumulator" mode represents an eight-byte
+     unsigned accumulator.  The default format is "32.32".
+
+`UTAmode'
+     "Unsigned Tetra Accumulator" mode represents a sixteen-byte
+     unsigned accumulator.  The default format is "64.64".
+
+`CCmode'
+     "Condition Code" mode represents the value of a condition code,
+     which is a machine-specific set of bits used to represent the
+     result of a comparison operation.  Other machine-specific modes
+     may also be used for the condition code.  These modes are not used
+     on machines that use `cc0' (see *note Condition Code::).
+
+`BLKmode'
+     "Block" mode represents values that are aggregates to which none of
+     the other modes apply.  In RTL, only memory references can have
+     this mode, and only if they appear in string-move or vector
+     instructions.  On machines which have no such instructions,
+     `BLKmode' will not appear in RTL.
+
+`VOIDmode'
+     Void mode means the absence of a mode or an unspecified mode.  For
+     example, RTL expressions of code `const_int' have mode `VOIDmode'
+     because they can be taken to have whatever mode the context
+     requires.  In debugging dumps of RTL, `VOIDmode' is expressed by
+     the absence of any mode.
+
+`QCmode, HCmode, SCmode, DCmode, XCmode, TCmode'
+     These modes stand for a complex number represented as a pair of
+     floating point values.  The floating point values are in `QFmode',
+     `HFmode', `SFmode', `DFmode', `XFmode', and `TFmode', respectively.
+
+`CQImode, CHImode, CSImode, CDImode, CTImode, COImode'
+     These modes stand for a complex number represented as a pair of
+     integer values.  The integer values are in `QImode', `HImode',
+     `SImode', `DImode', `TImode', and `OImode', respectively.
+
+ The machine description defines `Pmode' as a C macro which expands
+into the machine mode used for addresses.  Normally this is the mode
+whose size is `BITS_PER_WORD', `SImode' on 32-bit machines.
+
+ The only modes which a machine description must support are `QImode',
+and the modes corresponding to `BITS_PER_WORD', `FLOAT_TYPE_SIZE' and
+`DOUBLE_TYPE_SIZE'.  The compiler will attempt to use `DImode' for
+8-byte structures and unions, but this can be prevented by overriding
+the definition of `MAX_FIXED_MODE_SIZE'.  Alternatively, you can have
+the compiler use `TImode' for 16-byte structures and unions.  Likewise,
+you can arrange for the C type `short int' to avoid using `HImode'.
+
+ Very few explicit references to machine modes remain in the compiler
+and these few references will soon be removed.  Instead, the machine
+modes are divided into mode classes.  These are represented by the
+enumeration type `enum mode_class' defined in `machmode.h'.  The
+possible mode classes are:
+
+`MODE_INT'
+     Integer modes.  By default these are `BImode', `QImode', `HImode',
+     `SImode', `DImode', `TImode', and `OImode'.
+
+`MODE_PARTIAL_INT'
+     The "partial integer" modes, `PQImode', `PHImode', `PSImode' and
+     `PDImode'.
+
+`MODE_FLOAT'
+     Floating point modes.  By default these are `QFmode', `HFmode',
+     `TQFmode', `SFmode', `DFmode', `XFmode' and `TFmode'.
+
+`MODE_DECIMAL_FLOAT'
+     Decimal floating point modes.  By default these are `SDmode',
+     `DDmode' and `TDmode'.
+
+`MODE_FRACT'
+     Signed fractional modes.  By default these are `QQmode', `HQmode',
+     `SQmode', `DQmode' and `TQmode'.
+
+`MODE_UFRACT'
+     Unsigned fractional modes.  By default these are `UQQmode',
+     `UHQmode', `USQmode', `UDQmode' and `UTQmode'.
+
+`MODE_ACCUM'
+     Signed accumulator modes.  By default these are `HAmode',
+     `SAmode', `DAmode' and `TAmode'.
+
+`MODE_UACCUM'
+     Unsigned accumulator modes.  By default these are `UHAmode',
+     `USAmode', `UDAmode' and `UTAmode'.
+
+`MODE_COMPLEX_INT'
+     Complex integer modes.  (These are not currently implemented).
+
+`MODE_COMPLEX_FLOAT'
+     Complex floating point modes.  By default these are `QCmode',
+     `HCmode', `SCmode', `DCmode', `XCmode', and `TCmode'.
+
+`MODE_FUNCTION'
+     Algol or Pascal function variables including a static chain.
+     (These are not currently implemented).
+
+`MODE_CC'
+     Modes representing condition code values.  These are `CCmode' plus
+     any `CC_MODE' modes listed in the `MACHINE-modes.def'.  *Note Jump
+     Patterns::, also see *note Condition Code::.
+
+`MODE_RANDOM'
+     This is a catchall mode class for modes which don't fit into the
+     above classes.  Currently `VOIDmode' and `BLKmode' are in
+     `MODE_RANDOM'.
+
+ Here are some C macros that relate to machine modes:
+
+`GET_MODE (X)'
+     Returns the machine mode of the RTX X.
+
+`PUT_MODE (X, NEWMODE)'
+     Alters the machine mode of the RTX X to be NEWMODE.
+
+`NUM_MACHINE_MODES'
+     Stands for the number of machine modes available on the target
+     machine.  This is one greater than the largest numeric value of any
+     machine mode.
+
+`GET_MODE_NAME (M)'
+     Returns the name of mode M as a string.
+
+`GET_MODE_CLASS (M)'
+     Returns the mode class of mode M.
+
+`GET_MODE_WIDER_MODE (M)'
+     Returns the next wider natural mode.  For example, the expression
+     `GET_MODE_WIDER_MODE (QImode)' returns `HImode'.
+
+`GET_MODE_SIZE (M)'
+     Returns the size in bytes of a datum of mode M.
+
+`GET_MODE_BITSIZE (M)'
+     Returns the size in bits of a datum of mode M.
+
+`GET_MODE_IBIT (M)'
+     Returns the number of integral bits of a datum of fixed-point mode
+     M.
+
+`GET_MODE_FBIT (M)'
+     Returns the number of fractional bits of a datum of fixed-point
+     mode M.
+
+`GET_MODE_MASK (M)'
+     Returns a bitmask containing 1 for all bits in a word that fit
+     within mode M.  This macro can only be used for modes whose
+     bitsize is less than or equal to `HOST_BITS_PER_INT'.
+
+`GET_MODE_ALIGNMENT (M)'
+     Return the required alignment, in bits, for an object of mode M.
+
+`GET_MODE_UNIT_SIZE (M)'
+     Returns the size in bytes of the subunits of a datum of mode M.
+     This is the same as `GET_MODE_SIZE' except in the case of complex
+     modes.  For them, the unit size is the size of the real or
+     imaginary part.
+
+`GET_MODE_NUNITS (M)'
+     Returns the number of units contained in a mode, i.e.,
+     `GET_MODE_SIZE' divided by `GET_MODE_UNIT_SIZE'.
+
+`GET_CLASS_NARROWEST_MODE (C)'
+     Returns the narrowest mode in mode class C.
+
+ The global variables `byte_mode' and `word_mode' contain modes whose
+classes are `MODE_INT' and whose bitsizes are either `BITS_PER_UNIT' or
+`BITS_PER_WORD', respectively.  On 32-bit machines, these are `QImode'
+and `SImode', respectively.
+
+
+File: gccint.info,  Node: Constants,  Next: Regs and Memory,  Prev: Machine Modes,  Up: RTL
+
+10.7 Constant Expression Types
+==============================
+
+The simplest RTL expressions are those that represent constant values.
+
+`(const_int I)'
+     This type of expression represents the integer value I.  I is
+     customarily accessed with the macro `INTVAL' as in `INTVAL (EXP)',
+     which is equivalent to `XWINT (EXP, 0)'.
+
+     Constants generated for modes with fewer bits than `HOST_WIDE_INT'
+     must be sign extended to full width (e.g., with `gen_int_mode').
+
+     There is only one expression object for the integer value zero; it
+     is the value of the variable `const0_rtx'.  Likewise, the only
+     expression for integer value one is found in `const1_rtx', the only
+     expression for integer value two is found in `const2_rtx', and the
+     only expression for integer value negative one is found in
+     `constm1_rtx'.  Any attempt to create an expression of code
+     `const_int' and value zero, one, two or negative one will return
+     `const0_rtx', `const1_rtx', `const2_rtx' or `constm1_rtx' as
+     appropriate.
+
+     Similarly, there is only one object for the integer whose value is
+     `STORE_FLAG_VALUE'.  It is found in `const_true_rtx'.  If
+     `STORE_FLAG_VALUE' is one, `const_true_rtx' and `const1_rtx' will
+     point to the same object.  If `STORE_FLAG_VALUE' is -1,
+     `const_true_rtx' and `constm1_rtx' will point to the same object.
+
+`(const_double:M I0 I1 ...)'
+     Represents either a floating-point constant of mode M or an
+     integer constant too large to fit into `HOST_BITS_PER_WIDE_INT'
+     bits but small enough to fit within twice that number of bits (GCC
+     does not provide a mechanism to represent even larger constants).
+     In the latter case, M will be `VOIDmode'.
+
+     If M is `VOIDmode', the bits of the value are stored in I0 and I1.
+     I0 is customarily accessed with the macro `CONST_DOUBLE_LOW' and
+     I1 with `CONST_DOUBLE_HIGH'.
+
+     If the constant is floating point (regardless of its precision),
+     then the number of integers used to store the value depends on the
+     size of `REAL_VALUE_TYPE' (*note Floating Point::).  The integers
+     represent a floating point number, but not precisely in the target
+     machine's or host machine's floating point format.  To convert
+     them to the precise bit pattern used by the target machine, use
+     the macro `REAL_VALUE_TO_TARGET_DOUBLE' and friends (*note Data
+     Output::).
+
+`(const_fixed:M ...)'
+     Represents a fixed-point constant of mode M.  The operand is a
+     data structure of type `struct fixed_value' and is accessed with
+     the macro `CONST_FIXED_VALUE'.  The high part of data is accessed
+     with `CONST_FIXED_VALUE_HIGH'; the low part is accessed with
+     `CONST_FIXED_VALUE_LOW'.
+
+`(const_vector:M [X0 X1 ...])'
+     Represents a vector constant.  The square brackets stand for the
+     vector containing the constant elements.  X0, X1 and so on are the
+     `const_int', `const_double' or `const_fixed' elements.
+
+     The number of units in a `const_vector' is obtained with the macro
+     `CONST_VECTOR_NUNITS' as in `CONST_VECTOR_NUNITS (V)'.
+
+     Individual elements in a vector constant are accessed with the
+     macro `CONST_VECTOR_ELT' as in `CONST_VECTOR_ELT (V, N)' where V
+     is the vector constant and N is the element desired.
+
+`(const_string STR)'
+     Represents a constant string with value STR.  Currently this is
+     used only for insn attributes (*note Insn Attributes::) since
+     constant strings in C are placed in memory.
+
+`(symbol_ref:MODE SYMBOL)'
+     Represents the value of an assembler label for data.  SYMBOL is a
+     string that describes the name of the assembler label.  If it
+     starts with a `*', the label is the rest of SYMBOL not including
+     the `*'.  Otherwise, the label is SYMBOL, usually prefixed with
+     `_'.
+
+     The `symbol_ref' contains a mode, which is usually `Pmode'.
+     Usually that is the only mode for which a symbol is directly valid.
+
+`(label_ref:MODE LABEL)'
+     Represents the value of an assembler label for code.  It contains
+     one operand, an expression, which must be a `code_label' or a
+     `note' of type `NOTE_INSN_DELETED_LABEL' that appears in the
+     instruction sequence to identify the place where the label should
+     go.
+
+     The reason for using a distinct expression type for code label
+     references is so that jump optimization can distinguish them.
+
+     The `label_ref' contains a mode, which is usually `Pmode'.
+     Usually that is the only mode for which a label is directly valid.
+
+`(const:M EXP)'
+     Represents a constant that is the result of an assembly-time
+     arithmetic computation.  The operand, EXP, is an expression that
+     contains only constants (`const_int', `symbol_ref' and `label_ref'
+     expressions) combined with `plus' and `minus'.  However, not all
+     combinations are valid, since the assembler cannot do arbitrary
+     arithmetic on relocatable symbols.
+
+     M should be `Pmode'.
+
+`(high:M EXP)'
+     Represents the high-order bits of EXP, usually a `symbol_ref'.
+     The number of bits is machine-dependent and is normally the number
+     of bits specified in an instruction that initializes the high
+     order bits of a register.  It is used with `lo_sum' to represent
+     the typical two-instruction sequence used in RISC machines to
+     reference a global memory location.
+
+     M should be `Pmode'.
+
+ The macro `CONST0_RTX (MODE)' refers to an expression with value 0 in
+mode MODE.  If mode MODE is of mode class `MODE_INT', it returns
+`const0_rtx'.  If mode MODE is of mode class `MODE_FLOAT', it returns a
+`CONST_DOUBLE' expression in mode MODE.  Otherwise, it returns a
+`CONST_VECTOR' expression in mode MODE.  Similarly, the macro
+`CONST1_RTX (MODE)' refers to an expression with value 1 in mode MODE
+and similarly for `CONST2_RTX'.  The `CONST1_RTX' and `CONST2_RTX'
+macros are undefined for vector modes.
+
+
+File: gccint.info,  Node: Regs and Memory,  Next: Arithmetic,  Prev: Constants,  Up: RTL
+
+10.8 Registers and Memory
+=========================
+
+Here are the RTL expression types for describing access to machine
+registers and to main memory.
+
+`(reg:M N)'
+     For small values of the integer N (those that are less than
+     `FIRST_PSEUDO_REGISTER'), this stands for a reference to machine
+     register number N: a "hard register".  For larger values of N, it
+     stands for a temporary value or "pseudo register".  The compiler's
+     strategy is to generate code assuming an unlimited number of such
+     pseudo registers, and later convert them into hard registers or
+     into memory references.
+
+     M is the machine mode of the reference.  It is necessary because
+     machines can generally refer to each register in more than one
+     mode.  For example, a register may contain a full word but there
+     may be instructions to refer to it as a half word or as a single
+     byte, as well as instructions to refer to it as a floating point
+     number of various precisions.
+
+     Even for a register that the machine can access in only one mode,
+     the mode must always be specified.
+
+     The symbol `FIRST_PSEUDO_REGISTER' is defined by the machine
+     description, since the number of hard registers on the machine is
+     an invariant characteristic of the machine.  Note, however, that
+     not all of the machine registers must be general registers.  All
+     the machine registers that can be used for storage of data are
+     given hard register numbers, even those that can be used only in
+     certain instructions or can hold only certain types of data.
+
+     A hard register may be accessed in various modes throughout one
+     function, but each pseudo register is given a natural mode and is
+     accessed only in that mode.  When it is necessary to describe an
+     access to a pseudo register using a nonnatural mode, a `subreg'
+     expression is used.
+
+     A `reg' expression with a machine mode that specifies more than
+     one word of data may actually stand for several consecutive
+     registers.  If in addition the register number specifies a
+     hardware register, then it actually represents several consecutive
+     hardware registers starting with the specified one.
+
+     Each pseudo register number used in a function's RTL code is
+     represented by a unique `reg' expression.
+
+     Some pseudo register numbers, those within the range of
+     `FIRST_VIRTUAL_REGISTER' to `LAST_VIRTUAL_REGISTER' only appear
+     during the RTL generation phase and are eliminated before the
+     optimization phases.  These represent locations in the stack frame
+     that cannot be determined until RTL generation for the function
+     has been completed.  The following virtual register numbers are
+     defined:
+
+    `VIRTUAL_INCOMING_ARGS_REGNUM'
+          This points to the first word of the incoming arguments
+          passed on the stack.  Normally these arguments are placed
+          there by the caller, but the callee may have pushed some
+          arguments that were previously passed in registers.
+
+          When RTL generation is complete, this virtual register is
+          replaced by the sum of the register given by
+          `ARG_POINTER_REGNUM' and the value of `FIRST_PARM_OFFSET'.
+
+    `VIRTUAL_STACK_VARS_REGNUM'
+          If `FRAME_GROWS_DOWNWARD' is defined to a nonzero value, this
+          points to immediately above the first variable on the stack.
+          Otherwise, it points to the first variable on the stack.
+
+          `VIRTUAL_STACK_VARS_REGNUM' is replaced with the sum of the
+          register given by `FRAME_POINTER_REGNUM' and the value
+          `STARTING_FRAME_OFFSET'.
+
+    `VIRTUAL_STACK_DYNAMIC_REGNUM'
+          This points to the location of dynamically allocated memory
+          on the stack immediately after the stack pointer has been
+          adjusted by the amount of memory desired.
+
+          This virtual register is replaced by the sum of the register
+          given by `STACK_POINTER_REGNUM' and the value
+          `STACK_DYNAMIC_OFFSET'.
+
+    `VIRTUAL_OUTGOING_ARGS_REGNUM'
+          This points to the location in the stack at which outgoing
+          arguments should be written when the stack is pre-pushed
+          (arguments pushed using push insns should always use
+          `STACK_POINTER_REGNUM').
+
+          This virtual register is replaced by the sum of the register
+          given by `STACK_POINTER_REGNUM' and the value
+          `STACK_POINTER_OFFSET'.
+
+`(subreg:M1 REG:M2 BYTENUM)'
+     `subreg' expressions are used to refer to a register in a machine
+     mode other than its natural one, or to refer to one register of a
+     multi-part `reg' that actually refers to several registers.
+
+     Each pseudo register has a natural mode.  If it is necessary to
+     operate on it in a different mode, the register must be enclosed
+     in a `subreg'.
+
+     There are currently three supported types for the first operand of
+     a `subreg':
+        * pseudo registers This is the most common case.  Most
+          `subreg's have pseudo `reg's as their first operand.
+
+        * mem `subreg's of `mem' were common in earlier versions of GCC
+          and are still supported.  During the reload pass these are
+          replaced by plain `mem's.  On machines that do not do
+          instruction scheduling, use of `subreg's of `mem' are still
+          used, but this is no longer recommended.  Such `subreg's are
+          considered to be `register_operand's rather than
+          `memory_operand's before and during reload.  Because of this,
+          the scheduling passes cannot properly schedule instructions
+          with `subreg's of `mem', so for machines that do scheduling,
+          `subreg's of `mem' should never be used.  To support this,
+          the combine and recog passes have explicit code to inhibit
+          the creation of `subreg's of `mem' when `INSN_SCHEDULING' is
+          defined.
+
+          The use of `subreg's of `mem' after the reload pass is an area
+          that is not well understood and should be avoided.  There is
+          still some code in the compiler to support this, but this
+          code has possibly rotted.  This use of `subreg's is
+          discouraged and will most likely not be supported in the
+          future.
+
+        * hard registers It is seldom necessary to wrap hard registers
+          in `subreg's; such registers would normally reduce to a
+          single `reg' rtx.  This use of `subreg's is discouraged and
+          may not be supported in the future.
+
+
+     `subreg's of `subreg's are not supported.  Using
+     `simplify_gen_subreg' is the recommended way to avoid this problem.
+
+     `subreg's come in two distinct flavors, each having its own usage
+     and rules:
+
+    Paradoxical subregs
+          When M1 is strictly wider than M2, the `subreg' expression is
+          called "paradoxical".  The canonical test for this class of
+          `subreg' is:
+
+               GET_MODE_SIZE (M1) > GET_MODE_SIZE (M2)
+
+          Paradoxical `subreg's can be used as both lvalues and rvalues.
+          When used as an lvalue, the low-order bits of the source value
+          are stored in REG and the high-order bits are discarded.
+          When used as an rvalue, the low-order bits of the `subreg' are
+          taken from REG while the high-order bits may or may not be
+          defined.
+
+          The high-order bits of rvalues are in the following
+          circumstances:
+
+             * `subreg's of `mem' When M2 is smaller than a word, the
+               macro `LOAD_EXTEND_OP', can control how the high-order
+               bits are defined.
+
+             * `subreg' of `reg's The upper bits are defined when
+               `SUBREG_PROMOTED_VAR_P' is true.
+               `SUBREG_PROMOTED_UNSIGNED_P' describes what the upper
+               bits hold.  Such subregs usually represent local
+               variables, register variables and parameter pseudo
+               variables that have been promoted to a wider mode.
+
+
+          BYTENUM is always zero for a paradoxical `subreg', even on
+          big-endian targets.
+
+          For example, the paradoxical `subreg':
+
+               (set (subreg:SI (reg:HI X) 0) Y)
+
+          stores the lower 2 bytes of Y in X and discards the upper 2
+          bytes.  A subsequent:
+
+               (set Z (subreg:SI (reg:HI X) 0))
+
+          would set the lower two bytes of Z to Y and set the upper two
+          bytes to an unknown value assuming `SUBREG_PROMOTED_VAR_P' is
+          false.
+
+    Normal subregs
+          When M1 is at least as narrow as M2 the `subreg' expression
+          is called "normal".
+
+          Normal `subreg's restrict consideration to certain bits of
+          REG.  There are two cases.  If M1 is smaller than a word, the
+          `subreg' refers to the least-significant part (or "lowpart")
+          of one word of REG.  If M1 is word-sized or greater, the
+          `subreg' refers to one or more complete words.
+
+          When used as an lvalue, `subreg' is a word-based accessor.
+          Storing to a `subreg' modifies all the words of REG that
+          overlap the `subreg', but it leaves the other words of REG
+          alone.
+
+          When storing to a normal `subreg' that is smaller than a word,
+          the other bits of the referenced word are usually left in an
+          undefined state.  This laxity makes it easier to generate
+          efficient code for such instructions.  To represent an
+          instruction that preserves all the bits outside of those in
+          the `subreg', use `strict_low_part' or `zero_extract' around
+          the `subreg'.
+
+          BYTENUM must identify the offset of the first byte of the
+          `subreg' from the start of REG, assuming that REG is laid out
+          in memory order.  The memory order of bytes is defined by two
+          target macros, `WORDS_BIG_ENDIAN' and `BYTES_BIG_ENDIAN':
+
+             * `WORDS_BIG_ENDIAN', if set to 1, says that byte number
+               zero is part of the most significant word; otherwise, it
+               is part of the least significant word.
+
+             * `BYTES_BIG_ENDIAN', if set to 1, says that byte number
+               zero is the most significant byte within a word;
+               otherwise, it is the least significant byte within a
+               word.
+
+          On a few targets, `FLOAT_WORDS_BIG_ENDIAN' disagrees with
+          `WORDS_BIG_ENDIAN'.  However, most parts of the compiler treat
+          floating point values as if they had the same endianness as
+          integer values.  This works because they handle them solely
+          as a collection of integer values, with no particular
+          numerical value.  Only real.c and the runtime libraries care
+          about `FLOAT_WORDS_BIG_ENDIAN'.
+
+          Thus,
+
+               (subreg:HI (reg:SI X) 2)
+
+          on a `BYTES_BIG_ENDIAN', `UNITS_PER_WORD == 4' target is the
+          same as
+
+               (subreg:HI (reg:SI X) 0)
+
+          on a little-endian, `UNITS_PER_WORD == 4' target.  Both
+          `subreg's access the lower two bytes of register X.
+
+
+     A `MODE_PARTIAL_INT' mode behaves as if it were as wide as the
+     corresponding `MODE_INT' mode, except that it has an unknown
+     number of undefined bits.  For example:
+
+          (subreg:PSI (reg:SI 0) 0)
+
+     accesses the whole of `(reg:SI 0)', but the exact relationship
+     between the `PSImode' value and the `SImode' value is not defined.
+     If we assume `UNITS_PER_WORD <= 4', then the following two
+     `subreg's:
+
+          (subreg:PSI (reg:DI 0) 0)
+          (subreg:PSI (reg:DI 0) 4)
+
+     represent independent 4-byte accesses to the two halves of
+     `(reg:DI 0)'.  Both `subreg's have an unknown number of undefined
+     bits.
+
+     If `UNITS_PER_WORD <= 2' then these two `subreg's:
+
+          (subreg:HI (reg:PSI 0) 0)
+          (subreg:HI (reg:PSI 0) 2)
+
+     represent independent 2-byte accesses that together span the whole
+     of `(reg:PSI 0)'.  Storing to the first `subreg' does not affect
+     the value of the second, and vice versa.  `(reg:PSI 0)' has an
+     unknown number of undefined bits, so the assignment:
+
+          (set (subreg:HI (reg:PSI 0) 0) (reg:HI 4))
+
+     does not guarantee that `(subreg:HI (reg:PSI 0) 0)' has the value
+     `(reg:HI 4)'.
+
+     The rules above apply to both pseudo REGs and hard REGs.  If the
+     semantics are not correct for particular combinations of M1, M2
+     and hard REG, the target-specific code must ensure that those
+     combinations are never used.  For example:
+
+          CANNOT_CHANGE_MODE_CLASS (M2, M1, CLASS)
+
+     must be true for every class CLASS that includes REG.
+
+     The first operand of a `subreg' expression is customarily accessed
+     with the `SUBREG_REG' macro and the second operand is customarily
+     accessed with the `SUBREG_BYTE' macro.
+
+     It has been several years since a platform in which
+     `BYTES_BIG_ENDIAN' not equal to `WORDS_BIG_ENDIAN' has been
+     tested.  Anyone wishing to support such a platform in the future
+     may be confronted with code rot.
+
+`(scratch:M)'
+     This represents a scratch register that will be required for the
+     execution of a single instruction and not used subsequently.  It is
+     converted into a `reg' by either the local register allocator or
+     the reload pass.
+
+     `scratch' is usually present inside a `clobber' operation (*note
+     Side Effects::).
+
+`(cc0)'
+     This refers to the machine's condition code register.  It has no
+     operands and may not have a machine mode.  There are two ways to
+     use it:
+
+        * To stand for a complete set of condition code flags.  This is
+          best on most machines, where each comparison sets the entire
+          series of flags.
+
+          With this technique, `(cc0)' may be validly used in only two
+          contexts: as the destination of an assignment (in test and
+          compare instructions) and in comparison operators comparing
+          against zero (`const_int' with value zero; that is to say,
+          `const0_rtx').
+
+        * To stand for a single flag that is the result of a single
+          condition.  This is useful on machines that have only a
+          single flag bit, and in which comparison instructions must
+          specify the condition to test.
+
+          With this technique, `(cc0)' may be validly used in only two
+          contexts: as the destination of an assignment (in test and
+          compare instructions) where the source is a comparison
+          operator, and as the first operand of `if_then_else' (in a
+          conditional branch).
+
+     There is only one expression object of code `cc0'; it is the value
+     of the variable `cc0_rtx'.  Any attempt to create an expression of
+     code `cc0' will return `cc0_rtx'.
+
+     Instructions can set the condition code implicitly.  On many
+     machines, nearly all instructions set the condition code based on
+     the value that they compute or store.  It is not necessary to
+     record these actions explicitly in the RTL because the machine
+     description includes a prescription for recognizing the
+     instructions that do so (by means of the macro
+     `NOTICE_UPDATE_CC').  *Note Condition Code::.  Only instructions
+     whose sole purpose is to set the condition code, and instructions
+     that use the condition code, need mention `(cc0)'.
+
+     On some machines, the condition code register is given a register
+     number and a `reg' is used instead of `(cc0)'.  This is usually the
+     preferable approach if only a small subset of instructions modify
+     the condition code.  Other machines store condition codes in
+     general registers; in such cases a pseudo register should be used.
+
+     Some machines, such as the SPARC and RS/6000, have two sets of
+     arithmetic instructions, one that sets and one that does not set
+     the condition code.  This is best handled by normally generating
+     the instruction that does not set the condition code, and making a
+     pattern that both performs the arithmetic and sets the condition
+     code register (which would not be `(cc0)' in this case).  For
+     examples, search for `addcc' and `andcc' in `sparc.md'.
+
+`(pc)'
+     This represents the machine's program counter.  It has no operands
+     and may not have a machine mode.  `(pc)' may be validly used only
+     in certain specific contexts in jump instructions.
+
+     There is only one expression object of code `pc'; it is the value
+     of the variable `pc_rtx'.  Any attempt to create an expression of
+     code `pc' will return `pc_rtx'.
+
+     All instructions that do not jump alter the program counter
+     implicitly by incrementing it, but there is no need to mention
+     this in the RTL.
+
+`(mem:M ADDR ALIAS)'
+     This RTX represents a reference to main memory at an address
+     represented by the expression ADDR.  M specifies how large a unit
+     of memory is accessed.  ALIAS specifies an alias set for the
+     reference.  In general two items are in different alias sets if
+     they cannot reference the same memory address.
+
+     The construct `(mem:BLK (scratch))' is considered to alias all
+     other memories.  Thus it may be used as a memory barrier in
+     epilogue stack deallocation patterns.
+
+`(concatM RTX RTX)'
+     This RTX represents the concatenation of two other RTXs.  This is
+     used for complex values.  It should only appear in the RTL
+     attached to declarations and during RTL generation.  It should not
+     appear in the ordinary insn chain.
+
+`(concatnM [RTX ...])'
+     This RTX represents the concatenation of all the RTX to make a
+     single value.  Like `concat', this should only appear in
+     declarations, and not in the insn chain.
+
+
+File: gccint.info,  Node: Arithmetic,  Next: Comparisons,  Prev: Regs and Memory,  Up: RTL
+
+10.9 RTL Expressions for Arithmetic
+===================================
+
+Unless otherwise specified, all the operands of arithmetic expressions
+must be valid for mode M.  An operand is valid for mode M if it has
+mode M, or if it is a `const_int' or `const_double' and M is a mode of
+class `MODE_INT'.
+
+ For commutative binary operations, constants should be placed in the
+second operand.
+
+`(plus:M X Y)'
+`(ss_plus:M X Y)'
+`(us_plus:M X Y)'
+     These three expressions all represent the sum of the values
+     represented by X and Y carried out in machine mode M.  They differ
+     in their behavior on overflow of integer modes.  `plus' wraps
+     round modulo the width of M; `ss_plus' saturates at the maximum
+     signed value representable in M; `us_plus' saturates at the
+     maximum unsigned value.
+
+`(lo_sum:M X Y)'
+     This expression represents the sum of X and the low-order bits of
+     Y.  It is used with `high' (*note Constants::) to represent the
+     typical two-instruction sequence used in RISC machines to
+     reference a global memory location.
+
+     The number of low order bits is machine-dependent but is normally
+     the number of bits in a `Pmode' item minus the number of bits set
+     by `high'.
+
+     M should be `Pmode'.
+
+`(minus:M X Y)'
+`(ss_minus:M X Y)'
+`(us_minus:M X Y)'
+     These three expressions represent the result of subtracting Y from
+     X, carried out in mode M.  Behavior on overflow is the same as for
+     the three variants of `plus' (see above).
+
+`(compare:M X Y)'
+     Represents the result of subtracting Y from X for purposes of
+     comparison.  The result is computed without overflow, as if with
+     infinite precision.
+
+     Of course, machines can't really subtract with infinite precision.
+     However, they can pretend to do so when only the sign of the
+     result will be used, which is the case when the result is stored
+     in the condition code.  And that is the _only_ way this kind of
+     expression may validly be used: as a value to be stored in the
+     condition codes, either `(cc0)' or a register.  *Note
+     Comparisons::.
+
+     The mode M is not related to the modes of X and Y, but instead is
+     the mode of the condition code value.  If `(cc0)' is used, it is
+     `VOIDmode'.  Otherwise it is some mode in class `MODE_CC', often
+     `CCmode'.  *Note Condition Code::.  If M is `VOIDmode' or
+     `CCmode', the operation returns sufficient information (in an
+     unspecified format) so that any comparison operator can be applied
+     to the result of the `COMPARE' operation.  For other modes in
+     class `MODE_CC', the operation only returns a subset of this
+     information.
+
+     Normally, X and Y must have the same mode.  Otherwise, `compare'
+     is valid only if the mode of X is in class `MODE_INT' and Y is a
+     `const_int' or `const_double' with mode `VOIDmode'.  The mode of X
+     determines what mode the comparison is to be done in; thus it must
+     not be `VOIDmode'.
+
+     If one of the operands is a constant, it should be placed in the
+     second operand and the comparison code adjusted as appropriate.
+
+     A `compare' specifying two `VOIDmode' constants is not valid since
+     there is no way to know in what mode the comparison is to be
+     performed; the comparison must either be folded during the
+     compilation or the first operand must be loaded into a register
+     while its mode is still known.
+
+`(neg:M X)'
+`(ss_neg:M X)'
+`(us_neg:M X)'
+     These two expressions represent the negation (subtraction from
+     zero) of the value represented by X, carried out in mode M.  They
+     differ in the behavior on overflow of integer modes.  In the case
+     of `neg', the negation of the operand may be a number not
+     representable in mode M, in which case it is truncated to M.
+     `ss_neg' and `us_neg' ensure that an out-of-bounds result
+     saturates to the maximum or minimum signed or unsigned value.
+
+`(mult:M X Y)'
+`(ss_mult:M X Y)'
+`(us_mult:M X Y)'
+     Represents the signed product of the values represented by X and Y
+     carried out in machine mode M.  `ss_mult' and `us_mult' ensure
+     that an out-of-bounds result saturates to the maximum or minimum
+     signed or unsigned value.
+
+     Some machines support a multiplication that generates a product
+     wider than the operands.  Write the pattern for this as
+
+          (mult:M (sign_extend:M X) (sign_extend:M Y))
+
+     where M is wider than the modes of X and Y, which need not be the
+     same.
+
+     For unsigned widening multiplication, use the same idiom, but with
+     `zero_extend' instead of `sign_extend'.
+
+`(div:M X Y)'
+`(ss_div:M X Y)'
+     Represents the quotient in signed division of X by Y, carried out
+     in machine mode M.  If M is a floating point mode, it represents
+     the exact quotient; otherwise, the integerized quotient.  `ss_div'
+     ensures that an out-of-bounds result saturates to the maximum or
+     minimum signed value.
+
+     Some machines have division instructions in which the operands and
+     quotient widths are not all the same; you should represent such
+     instructions using `truncate' and `sign_extend' as in,
+
+          (truncate:M1 (div:M2 X (sign_extend:M2 Y)))
+
+`(udiv:M X Y)'
+`(us_div:M X Y)'
+     Like `div' but represents unsigned division.  `us_div' ensures
+     that an out-of-bounds result saturates to the maximum or minimum
+     unsigned value.
+
+`(mod:M X Y)'
+`(umod:M X Y)'
+     Like `div' and `udiv' but represent the remainder instead of the
+     quotient.
+
+`(smin:M X Y)'
+`(smax:M X Y)'
+     Represents the smaller (for `smin') or larger (for `smax') of X
+     and Y, interpreted as signed values in mode M.  When used with
+     floating point, if both operands are zeros, or if either operand
+     is `NaN', then it is unspecified which of the two operands is
+     returned as the result.
+
+`(umin:M X Y)'
+`(umax:M X Y)'
+     Like `smin' and `smax', but the values are interpreted as unsigned
+     integers.
+
+`(not:M X)'
+     Represents the bitwise complement of the value represented by X,
+     carried out in mode M, which must be a fixed-point machine mode.
+
+`(and:M X Y)'
+     Represents the bitwise logical-and of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     machine mode.
+
+`(ior:M X Y)'
+     Represents the bitwise inclusive-or of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     mode.
+
+`(xor:M X Y)'
+     Represents the bitwise exclusive-or of the values represented by X
+     and Y, carried out in machine mode M, which must be a fixed-point
+     mode.
+
+`(ashift:M X C)'
+`(ss_ashift:M X C)'
+`(us_ashift:M X C)'
+     These three expressions represent the result of arithmetically
+     shifting X left by C places.  They differ in their behavior on
+     overflow of integer modes.  An `ashift' operation is a plain shift
+     with no special behavior in case of a change in the sign bit;
+     `ss_ashift' and `us_ashift' saturates to the minimum or maximum
+     representable value if any of the bits shifted out differs from
+     the final sign bit.
+
+     X have mode M, a fixed-point machine mode.  C be a fixed-point
+     mode or be a constant with mode `VOIDmode'; which mode is
+     determined by the mode called for in the machine description entry
+     for the left-shift instruction.  For example, on the VAX, the mode
+     of C is `QImode' regardless of M.
+
+`(lshiftrt:M X C)'
+`(ashiftrt:M X C)'
+     Like `ashift' but for right shift.  Unlike the case for left shift,
+     these two operations are distinct.
+
+`(rotate:M X C)'
+`(rotatert:M X C)'
+     Similar but represent left and right rotate.  If C is a constant,
+     use `rotate'.
+
+`(abs:M X)'
+
+`(ss_abs:M X)'
+     Represents the absolute value of X, computed in mode M.  `ss_abs'
+     ensures that an out-of-bounds result saturates to the maximum
+     signed value.
+
+`(sqrt:M X)'
+     Represents the square root of X, computed in mode M.  Most often M
+     will be a floating point mode.
+
+`(ffs:M X)'
+     Represents one plus the index of the least significant 1-bit in X,
+     represented as an integer of mode M.  (The value is zero if X is
+     zero.)  The mode of X need not be M; depending on the target
+     machine, various mode combinations may be valid.
+
+`(clz:M X)'
+     Represents the number of leading 0-bits in X, represented as an
+     integer of mode M, starting at the most significant bit position.
+     If X is zero, the value is determined by
+     `CLZ_DEFINED_VALUE_AT_ZERO' (*note Misc::).  Note that this is one
+     of the few expressions that is not invariant under widening.  The
+     mode of X will usually be an integer mode.
+
+`(ctz:M X)'
+     Represents the number of trailing 0-bits in X, represented as an
+     integer of mode M, starting at the least significant bit position.
+     If X is zero, the value is determined by
+     `CTZ_DEFINED_VALUE_AT_ZERO' (*note Misc::).  Except for this case,
+     `ctz(x)' is equivalent to `ffs(X) - 1'.  The mode of X will
+     usually be an integer mode.
+
+`(popcount:M X)'
+     Represents the number of 1-bits in X, represented as an integer of
+     mode M.  The mode of X will usually be an integer mode.
+
+`(parity:M X)'
+     Represents the number of 1-bits modulo 2 in X, represented as an
+     integer of mode M.  The mode of X will usually be an integer mode.
+
+`(bswap:M X)'
+     Represents the value X with the order of bytes reversed, carried
+     out in mode M, which must be a fixed-point machine mode.
+
+
+File: gccint.info,  Node: Comparisons,  Next: Bit-Fields,  Prev: Arithmetic,  Up: RTL
+
+10.10 Comparison Operations
+===========================
+
+Comparison operators test a relation on two operands and are considered
+to represent a machine-dependent nonzero value described by, but not
+necessarily equal to, `STORE_FLAG_VALUE' (*note Misc::) if the relation
+holds, or zero if it does not, for comparison operators whose results
+have a `MODE_INT' mode, `FLOAT_STORE_FLAG_VALUE' (*note Misc::) if the
+relation holds, or zero if it does not, for comparison operators that
+return floating-point values, and a vector of either
+`VECTOR_STORE_FLAG_VALUE' (*note Misc::) if the relation holds, or of
+zeros if it does not, for comparison operators that return vector
+results.  The mode of the comparison operation is independent of the
+mode of the data being compared.  If the comparison operation is being
+tested (e.g., the first operand of an `if_then_else'), the mode must be
+`VOIDmode'.
+
+ There are two ways that comparison operations may be used.  The
+comparison operators may be used to compare the condition codes `(cc0)'
+against zero, as in `(eq (cc0) (const_int 0))'.  Such a construct
+actually refers to the result of the preceding instruction in which the
+condition codes were set.  The instruction setting the condition code
+must be adjacent to the instruction using the condition code; only
+`note' insns may separate them.
+
+ Alternatively, a comparison operation may directly compare two data
+objects.  The mode of the comparison is determined by the operands; they
+must both be valid for a common machine mode.  A comparison with both
+operands constant would be invalid as the machine mode could not be
+deduced from it, but such a comparison should never exist in RTL due to
+constant folding.
+
+ In the example above, if `(cc0)' were last set to `(compare X Y)', the
+comparison operation is identical to `(eq X Y)'.  Usually only one style
+of comparisons is supported on a particular machine, but the combine
+pass will try to merge the operations to produce the `eq' shown in case
+it exists in the context of the particular insn involved.
+
+ Inequality comparisons come in two flavors, signed and unsigned.  Thus,
+there are distinct expression codes `gt' and `gtu' for signed and
+unsigned greater-than.  These can produce different results for the same
+pair of integer values: for example, 1 is signed greater-than -1 but not
+unsigned greater-than, because -1 when regarded as unsigned is actually
+`0xffffffff' which is greater than 1.
+
+ The signed comparisons are also used for floating point values.
+Floating point comparisons are distinguished by the machine modes of
+the operands.
+
+`(eq:M X Y)'
+     `STORE_FLAG_VALUE' if the values represented by X and Y are equal,
+     otherwise 0.
+
+`(ne:M X Y)'
+     `STORE_FLAG_VALUE' if the values represented by X and Y are not
+     equal, otherwise 0.
+
+`(gt:M X Y)'
+     `STORE_FLAG_VALUE' if the X is greater than Y.  If they are
+     fixed-point, the comparison is done in a signed sense.
+
+`(gtu:M X Y)'
+     Like `gt' but does unsigned comparison, on fixed-point numbers
+     only.
+
+`(lt:M X Y)'
+`(ltu:M X Y)'
+     Like `gt' and `gtu' but test for "less than".
+
+`(ge:M X Y)'
+`(geu:M X Y)'
+     Like `gt' and `gtu' but test for "greater than or equal".
+
+`(le:M X Y)'
+`(leu:M X Y)'
+     Like `gt' and `gtu' but test for "less than or equal".
+
+`(if_then_else COND THEN ELSE)'
+     This is not a comparison operation but is listed here because it is
+     always used in conjunction with a comparison operation.  To be
+     precise, COND is a comparison expression.  This expression
+     represents a choice, according to COND, between the value
+     represented by THEN and the one represented by ELSE.
+
+     On most machines, `if_then_else' expressions are valid only to
+     express conditional jumps.
+
+`(cond [TEST1 VALUE1 TEST2 VALUE2 ...] DEFAULT)'
+     Similar to `if_then_else', but more general.  Each of TEST1,
+     TEST2, ... is performed in turn.  The result of this expression is
+     the VALUE corresponding to the first nonzero test, or DEFAULT if
+     none of the tests are nonzero expressions.
+
+     This is currently not valid for instruction patterns and is
+     supported only for insn attributes.  *Note Insn Attributes::.
+
+
+File: gccint.info,  Node: Bit-Fields,  Next: Vector Operations,  Prev: Comparisons,  Up: RTL
+
+10.11 Bit-Fields
+================
+
+Special expression codes exist to represent bit-field instructions.
+
+`(sign_extract:M LOC SIZE POS)'
+     This represents a reference to a sign-extended bit-field contained
+     or starting in LOC (a memory or register reference).  The bit-field
+     is SIZE bits wide and starts at bit POS.  The compilation option
+     `BITS_BIG_ENDIAN' says which end of the memory unit POS counts
+     from.
+
+     If LOC is in memory, its mode must be a single-byte integer mode.
+     If LOC is in a register, the mode to use is specified by the
+     operand of the `insv' or `extv' pattern (*note Standard Names::)
+     and is usually a full-word integer mode, which is the default if
+     none is specified.
+
+     The mode of POS is machine-specific and is also specified in the
+     `insv' or `extv' pattern.
+
+     The mode M is the same as the mode that would be used for LOC if
+     it were a register.
+
+     A `sign_extract' can not appear as an lvalue, or part thereof, in
+     RTL.
+
+`(zero_extract:M LOC SIZE POS)'
+     Like `sign_extract' but refers to an unsigned or zero-extended
+     bit-field.  The same sequence of bits are extracted, but they are
+     filled to an entire word with zeros instead of by sign-extension.
+
+     Unlike `sign_extract', this type of expressions can be lvalues in
+     RTL; they may appear on the left side of an assignment, indicating
+     insertion of a value into the specified bit-field.
+
+
+File: gccint.info,  Node: Vector Operations,  Next: Conversions,  Prev: Bit-Fields,  Up: RTL
+
+10.12 Vector Operations
+=======================
+
+All normal RTL expressions can be used with vector modes; they are
+interpreted as operating on each part of the vector independently.
+Additionally, there are a few new expressions to describe specific
+vector operations.
+
+`(vec_merge:M VEC1 VEC2 ITEMS)'
+     This describes a merge operation between two vectors.  The result
+     is a vector of mode M; its elements are selected from either VEC1
+     or VEC2.  Which elements are selected is described by ITEMS, which
+     is a bit mask represented by a `const_int'; a zero bit indicates
+     the corresponding element in the result vector is taken from VEC2
+     while a set bit indicates it is taken from VEC1.
+
+`(vec_select:M VEC1 SELECTION)'
+     This describes an operation that selects parts of a vector.  VEC1
+     is the source vector, and SELECTION is a `parallel' that contains a
+     `const_int' for each of the subparts of the result vector, giving
+     the number of the source subpart that should be stored into it.
+     The result mode M is either the submode for a single element of
+     VEC1 (if only one subpart is selected), or another vector mode
+     with that element submode (if multiple subparts are selected).
+
+`(vec_concat:M VEC1 VEC2)'
+     Describes a vector concat operation.  The result is a
+     concatenation of the vectors VEC1 and VEC2; its length is the sum
+     of the lengths of the two inputs.
+
+`(vec_duplicate:M VEC)'
+     This operation converts a small vector into a larger one by
+     duplicating the input values.  The output vector mode must have
+     the same submodes as the input vector mode, and the number of
+     output parts must be an integer multiple of the number of input
+     parts.
+
+
+
+File: gccint.info,  Node: Conversions,  Next: RTL Declarations,  Prev: Vector Operations,  Up: RTL
+
+10.13 Conversions
+=================
+
+All conversions between machine modes must be represented by explicit
+conversion operations.  For example, an expression which is the sum of
+a byte and a full word cannot be written as `(plus:SI (reg:QI 34)
+(reg:SI 80))' because the `plus' operation requires two operands of the
+same machine mode.  Therefore, the byte-sized operand is enclosed in a
+conversion operation, as in
+
+     (plus:SI (sign_extend:SI (reg:QI 34)) (reg:SI 80))
+
+ The conversion operation is not a mere placeholder, because there may
+be more than one way of converting from a given starting mode to the
+desired final mode.  The conversion operation code says how to do it.
+
+ For all conversion operations, X must not be `VOIDmode' because the
+mode in which to do the conversion would not be known.  The conversion
+must either be done at compile-time or X must be placed into a register.
+
+`(sign_extend:M X)'
+     Represents the result of sign-extending the value X to machine
+     mode M.  M must be a fixed-point mode and X a fixed-point value of
+     a mode narrower than M.
+
+`(zero_extend:M X)'
+     Represents the result of zero-extending the value X to machine
+     mode M.  M must be a fixed-point mode and X a fixed-point value of
+     a mode narrower than M.
+
+`(float_extend:M X)'
+     Represents the result of extending the value X to machine mode M.
+     M must be a floating point mode and X a floating point value of a
+     mode narrower than M.
+
+`(truncate:M X)'
+     Represents the result of truncating the value X to machine mode M.
+     M must be a fixed-point mode and X a fixed-point value of a mode
+     wider than M.
+
+`(ss_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M,
+     using signed saturation in the case of overflow.  Both M and the
+     mode of X must be fixed-point modes.
+
+`(us_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M,
+     using unsigned saturation in the case of overflow.  Both M and the
+     mode of X must be fixed-point modes.
+
+`(float_truncate:M X)'
+     Represents the result of truncating the value X to machine mode M.
+     M must be a floating point mode and X a floating point value of a
+     mode wider than M.
+
+`(float:M X)'
+     Represents the result of converting fixed point value X, regarded
+     as signed, to floating point mode M.
+
+`(unsigned_float:M X)'
+     Represents the result of converting fixed point value X, regarded
+     as unsigned, to floating point mode M.
+
+`(fix:M X)'
+     When M is a floating-point mode, represents the result of
+     converting floating point value X (valid for mode M) to an
+     integer, still represented in floating point mode M, by rounding
+     towards zero.
+
+     When M is a fixed-point mode, represents the result of converting
+     floating point value X to mode M, regarded as signed.  How
+     rounding is done is not specified, so this operation may be used
+     validly in compiling C code only for integer-valued operands.
+
+`(unsigned_fix:M X)'
+     Represents the result of converting floating point value X to
+     fixed point mode M, regarded as unsigned.  How rounding is done is
+     not specified.
+
+`(fract_convert:M X)'
+     Represents the result of converting fixed-point value X to
+     fixed-point mode M, signed integer value X to fixed-point mode M,
+     floating-point value X to fixed-point mode M, fixed-point value X
+     to integer mode M regarded as signed, or fixed-point value X to
+     floating-point mode M.  When overflows or underflows happen, the
+     results are undefined.
+
+`(sat_fract:M X)'
+     Represents the result of converting fixed-point value X to
+     fixed-point mode M, signed integer value X to fixed-point mode M,
+     or floating-point value X to fixed-point mode M.  When overflows
+     or underflows happen, the results are saturated to the maximum or
+     the minimum.
+
+`(unsigned_fract_convert:M X)'
+     Represents the result of converting fixed-point value X to integer
+     mode M regarded as unsigned, or unsigned integer value X to
+     fixed-point mode M.  When overflows or underflows happen, the
+     results are undefined.
+
+`(unsigned_sat_fract:M X)'
+     Represents the result of converting unsigned integer value X to
+     fixed-point mode M.  When overflows or underflows happen, the
+     results are saturated to the maximum or the minimum.
+
+
+File: gccint.info,  Node: RTL Declarations,  Next: Side Effects,  Prev: Conversions,  Up: RTL
+
+10.14 Declarations
+==================
+
+Declaration expression codes do not represent arithmetic operations but
+rather state assertions about their operands.
+
+`(strict_low_part (subreg:M (reg:N R) 0))'
+     This expression code is used in only one context: as the
+     destination operand of a `set' expression.  In addition, the
+     operand of this expression must be a non-paradoxical `subreg'
+     expression.
+
+     The presence of `strict_low_part' says that the part of the
+     register which is meaningful in mode N, but is not part of mode M,
+     is not to be altered.  Normally, an assignment to such a subreg is
+     allowed to have undefined effects on the rest of the register when
+     M is less than a word.
+
+
+File: gccint.info,  Node: Side Effects,  Next: Incdec,  Prev: RTL Declarations,  Up: RTL
+
+10.15 Side Effect Expressions
+=============================
+
+The expression codes described so far represent values, not actions.
+But machine instructions never produce values; they are meaningful only
+for their side effects on the state of the machine.  Special expression
+codes are used to represent side effects.
+
+ The body of an instruction is always one of these side effect codes;
+the codes described above, which represent values, appear only as the
+operands of these.
+
+`(set LVAL X)'
+     Represents the action of storing the value of X into the place
+     represented by LVAL.  LVAL must be an expression representing a
+     place that can be stored in: `reg' (or `subreg', `strict_low_part'
+     or `zero_extract'), `mem', `pc', `parallel', or `cc0'.
+
+     If LVAL is a `reg', `subreg' or `mem', it has a machine mode; then
+     X must be valid for that mode.
+
+     If LVAL is a `reg' whose machine mode is less than the full width
+     of the register, then it means that the part of the register
+     specified by the machine mode is given the specified value and the
+     rest of the register receives an undefined value.  Likewise, if
+     LVAL is a `subreg' whose machine mode is narrower than the mode of
+     the register, the rest of the register can be changed in an
+     undefined way.
+
+     If LVAL is a `strict_low_part' of a subreg, then the part of the
+     register specified by the machine mode of the `subreg' is given
+     the value X and the rest of the register is not changed.
+
+     If LVAL is a `zero_extract', then the referenced part of the
+     bit-field (a memory or register reference) specified by the
+     `zero_extract' is given the value X and the rest of the bit-field
+     is not changed.  Note that `sign_extract' can not appear in LVAL.
+
+     If LVAL is `(cc0)', it has no machine mode, and X may be either a
+     `compare' expression or a value that may have any mode.  The
+     latter case represents a "test" instruction.  The expression `(set
+     (cc0) (reg:M N))' is equivalent to `(set (cc0) (compare (reg:M N)
+     (const_int 0)))'.  Use the former expression to save space during
+     the compilation.
+
+     If LVAL is a `parallel', it is used to represent the case of a
+     function returning a structure in multiple registers.  Each element
+     of the `parallel' is an `expr_list' whose first operand is a `reg'
+     and whose second operand is a `const_int' representing the offset
+     (in bytes) into the structure at which the data in that register
+     corresponds.  The first element may be null to indicate that the
+     structure is also passed partly in memory.
+
+     If LVAL is `(pc)', we have a jump instruction, and the
+     possibilities for X are very limited.  It may be a `label_ref'
+     expression (unconditional jump).  It may be an `if_then_else'
+     (conditional jump), in which case either the second or the third
+     operand must be `(pc)' (for the case which does not jump) and the
+     other of the two must be a `label_ref' (for the case which does
+     jump).  X may also be a `mem' or `(plus:SI (pc) Y)', where Y may
+     be a `reg' or a `mem'; these unusual patterns are used to
+     represent jumps through branch tables.
+
+     If LVAL is neither `(cc0)' nor `(pc)', the mode of LVAL must not
+     be `VOIDmode' and the mode of X must be valid for the mode of LVAL.
+
+     LVAL is customarily accessed with the `SET_DEST' macro and X with
+     the `SET_SRC' macro.
+
+`(return)'
+     As the sole expression in a pattern, represents a return from the
+     current function, on machines where this can be done with one
+     instruction, such as VAXen.  On machines where a multi-instruction
+     "epilogue" must be executed in order to return from the function,
+     returning is done by jumping to a label which precedes the
+     epilogue, and the `return' expression code is never used.
+
+     Inside an `if_then_else' expression, represents the value to be
+     placed in `pc' to return to the caller.
+
+     Note that an insn pattern of `(return)' is logically equivalent to
+     `(set (pc) (return))', but the latter form is never used.
+
+`(call FUNCTION NARGS)'
+     Represents a function call.  FUNCTION is a `mem' expression whose
+     address is the address of the function to be called.  NARGS is an
+     expression which can be used for two purposes: on some machines it
+     represents the number of bytes of stack argument; on others, it
+     represents the number of argument registers.
+
+     Each machine has a standard machine mode which FUNCTION must have.
+     The machine description defines macro `FUNCTION_MODE' to expand
+     into the requisite mode name.  The purpose of this mode is to
+     specify what kind of addressing is allowed, on machines where the
+     allowed kinds of addressing depend on the machine mode being
+     addressed.
+
+`(clobber X)'
+     Represents the storing or possible storing of an unpredictable,
+     undescribed value into X, which must be a `reg', `scratch',
+     `parallel' or `mem' expression.
+
+     One place this is used is in string instructions that store
+     standard values into particular hard registers.  It may not be
+     worth the trouble to describe the values that are stored, but it
+     is essential to inform the compiler that the registers will be
+     altered, lest it attempt to keep data in them across the string
+     instruction.
+
+     If X is `(mem:BLK (const_int 0))' or `(mem:BLK (scratch))', it
+     means that all memory locations must be presumed clobbered.  If X
+     is a `parallel', it has the same meaning as a `parallel' in a
+     `set' expression.
+
+     Note that the machine description classifies certain hard
+     registers as "call-clobbered".  All function call instructions are
+     assumed by default to clobber these registers, so there is no need
+     to use `clobber' expressions to indicate this fact.  Also, each
+     function call is assumed to have the potential to alter any memory
+     location, unless the function is declared `const'.
+
+     If the last group of expressions in a `parallel' are each a
+     `clobber' expression whose arguments are `reg' or `match_scratch'
+     (*note RTL Template::) expressions, the combiner phase can add the
+     appropriate `clobber' expressions to an insn it has constructed
+     when doing so will cause a pattern to be matched.
+
+     This feature can be used, for example, on a machine that whose
+     multiply and add instructions don't use an MQ register but which
+     has an add-accumulate instruction that does clobber the MQ
+     register.  Similarly, a combined instruction might require a
+     temporary register while the constituent instructions might not.
+
+     When a `clobber' expression for a register appears inside a
+     `parallel' with other side effects, the register allocator
+     guarantees that the register is unoccupied both before and after
+     that insn if it is a hard register clobber.  For pseudo-register
+     clobber, the register allocator and the reload pass do not assign
+     the same hard register to the clobber and the input operands if
+     there is an insn alternative containing the `&' constraint (*note
+     Modifiers::) for the clobber and the hard register is in register
+     classes of the clobber in the alternative.  You can clobber either
+     a specific hard register, a pseudo register, or a `scratch'
+     expression; in the latter two cases, GCC will allocate a hard
+     register that is available there for use as a temporary.
+
+     For instructions that require a temporary register, you should use
+     `scratch' instead of a pseudo-register because this will allow the
+     combiner phase to add the `clobber' when required.  You do this by
+     coding (`clobber' (`match_scratch' ...)).  If you do clobber a
+     pseudo register, use one which appears nowhere else--generate a
+     new one each time.  Otherwise, you may confuse CSE.
+
+     There is one other known use for clobbering a pseudo register in a
+     `parallel': when one of the input operands of the insn is also
+     clobbered by the insn.  In this case, using the same pseudo
+     register in the clobber and elsewhere in the insn produces the
+     expected results.
+
+`(use X)'
+     Represents the use of the value of X.  It indicates that the value
+     in X at this point in the program is needed, even though it may
+     not be apparent why this is so.  Therefore, the compiler will not
+     attempt to delete previous instructions whose only effect is to
+     store a value in X.  X must be a `reg' expression.
+
+     In some situations, it may be tempting to add a `use' of a
+     register in a `parallel' to describe a situation where the value
+     of a special register will modify the behavior of the instruction.
+     A hypothetical example might be a pattern for an addition that can
+     either wrap around or use saturating addition depending on the
+     value of a special control register:
+
+          (parallel [(set (reg:SI 2) (unspec:SI [(reg:SI 3)
+                                                 (reg:SI 4)] 0))
+                     (use (reg:SI 1))])
+
+     This will not work, several of the optimizers only look at
+     expressions locally; it is very likely that if you have multiple
+     insns with identical inputs to the `unspec', they will be
+     optimized away even if register 1 changes in between.
+
+     This means that `use' can _only_ be used to describe that the
+     register is live.  You should think twice before adding `use'
+     statements, more often you will want to use `unspec' instead.  The
+     `use' RTX is most commonly useful to describe that a fixed
+     register is implicitly used in an insn.  It is also safe to use in
+     patterns where the compiler knows for other reasons that the result
+     of the whole pattern is variable, such as `movmemM' or `call'
+     patterns.
+
+     During the reload phase, an insn that has a `use' as pattern can
+     carry a reg_equal note.  These `use' insns will be deleted before
+     the reload phase exits.
+
+     During the delayed branch scheduling phase, X may be an insn.
+     This indicates that X previously was located at this place in the
+     code and its data dependencies need to be taken into account.
+     These `use' insns will be deleted before the delayed branch
+     scheduling phase exits.
+
+`(parallel [X0 X1 ...])'
+     Represents several side effects performed in parallel.  The square
+     brackets stand for a vector; the operand of `parallel' is a vector
+     of expressions.  X0, X1 and so on are individual side effect
+     expressions--expressions of code `set', `call', `return',
+     `clobber' or `use'.
+
+     "In parallel" means that first all the values used in the
+     individual side-effects are computed, and second all the actual
+     side-effects are performed.  For example,
+
+          (parallel [(set (reg:SI 1) (mem:SI (reg:SI 1)))
+                     (set (mem:SI (reg:SI 1)) (reg:SI 1))])
+
+     says unambiguously that the values of hard register 1 and the
+     memory location addressed by it are interchanged.  In both places
+     where `(reg:SI 1)' appears as a memory address it refers to the
+     value in register 1 _before_ the execution of the insn.
+
+     It follows that it is _incorrect_ to use `parallel' and expect the
+     result of one `set' to be available for the next one.  For
+     example, people sometimes attempt to represent a jump-if-zero
+     instruction this way:
+
+          (parallel [(set (cc0) (reg:SI 34))
+                     (set (pc) (if_then_else
+                                  (eq (cc0) (const_int 0))
+                                  (label_ref ...)
+                                  (pc)))])
+
+     But this is incorrect, because it says that the jump condition
+     depends on the condition code value _before_ this instruction, not
+     on the new value that is set by this instruction.
+
+     Peephole optimization, which takes place together with final
+     assembly code output, can produce insns whose patterns consist of
+     a `parallel' whose elements are the operands needed to output the
+     resulting assembler code--often `reg', `mem' or constant
+     expressions.  This would not be well-formed RTL at any other stage
+     in compilation, but it is ok then because no further optimization
+     remains to be done.  However, the definition of the macro
+     `NOTICE_UPDATE_CC', if any, must deal with such insns if you
+     define any peephole optimizations.
+
+`(cond_exec [COND EXPR])'
+     Represents a conditionally executed expression.  The EXPR is
+     executed only if the COND is nonzero.  The COND expression must
+     not have side-effects, but the EXPR may very well have
+     side-effects.
+
+`(sequence [INSNS ...])'
+     Represents a sequence of insns.  Each of the INSNS that appears in
+     the vector is suitable for appearing in the chain of insns, so it
+     must be an `insn', `jump_insn', `call_insn', `code_label',
+     `barrier' or `note'.
+
+     A `sequence' RTX is never placed in an actual insn during RTL
+     generation.  It represents the sequence of insns that result from a
+     `define_expand' _before_ those insns are passed to `emit_insn' to
+     insert them in the chain of insns.  When actually inserted, the
+     individual sub-insns are separated out and the `sequence' is
+     forgotten.
+
+     After delay-slot scheduling is completed, an insn and all the
+     insns that reside in its delay slots are grouped together into a
+     `sequence'.  The insn requiring the delay slot is the first insn
+     in the vector; subsequent insns are to be placed in the delay slot.
+
+     `INSN_ANNULLED_BRANCH_P' is set on an insn in a delay slot to
+     indicate that a branch insn should be used that will conditionally
+     annul the effect of the insns in the delay slots.  In such a case,
+     `INSN_FROM_TARGET_P' indicates that the insn is from the target of
+     the branch and should be executed only if the branch is taken;
+     otherwise the insn should be executed only if the branch is not
+     taken.  *Note Delay Slots::.
+
+ These expression codes appear in place of a side effect, as the body of
+an insn, though strictly speaking they do not always describe side
+effects as such:
+
+`(asm_input S)'
+     Represents literal assembler code as described by the string S.
+
+`(unspec [OPERANDS ...] INDEX)'
+`(unspec_volatile [OPERANDS ...] INDEX)'
+     Represents a machine-specific operation on OPERANDS.  INDEX
+     selects between multiple machine-specific operations.
+     `unspec_volatile' is used for volatile operations and operations
+     that may trap; `unspec' is used for other operations.
+
+     These codes may appear inside a `pattern' of an insn, inside a
+     `parallel', or inside an expression.
+
+`(addr_vec:M [LR0 LR1 ...])'
+     Represents a table of jump addresses.  The vector elements LR0,
+     etc., are `label_ref' expressions.  The mode M specifies how much
+     space is given to each address; normally M would be `Pmode'.
+
+`(addr_diff_vec:M BASE [LR0 LR1 ...] MIN MAX FLAGS)'
+     Represents a table of jump addresses expressed as offsets from
+     BASE.  The vector elements LR0, etc., are `label_ref' expressions
+     and so is BASE.  The mode M specifies how much space is given to
+     each address-difference.  MIN and MAX are set up by branch
+     shortening and hold a label with a minimum and a maximum address,
+     respectively.  FLAGS indicates the relative position of BASE, MIN
+     and MAX to the containing insn and of MIN and MAX to BASE.  See
+     rtl.def for details.
+
+`(prefetch:M ADDR RW LOCALITY)'
+     Represents prefetch of memory at address ADDR.  Operand RW is 1 if
+     the prefetch is for data to be written, 0 otherwise; targets that
+     do not support write prefetches should treat this as a normal
+     prefetch.  Operand LOCALITY specifies the amount of temporal
+     locality; 0 if there is none or 1, 2, or 3 for increasing levels
+     of temporal locality; targets that do not support locality hints
+     should ignore this.
+
+     This insn is used to minimize cache-miss latency by moving data
+     into a cache before it is accessed.  It should use only
+     non-faulting data prefetch instructions.
+
+
+File: gccint.info,  Node: Incdec,  Next: Assembler,  Prev: Side Effects,  Up: RTL
+
+10.16 Embedded Side-Effects on Addresses
+========================================
+
+Six special side-effect expression codes appear as memory addresses.
+
+`(pre_dec:M X)'
+     Represents the side effect of decrementing X by a standard amount
+     and represents also the value that X has after being decremented.
+     X must be a `reg' or `mem', but most machines allow only a `reg'.
+     M must be the machine mode for pointers on the machine in use.
+     The amount X is decremented by is the length in bytes of the
+     machine mode of the containing memory reference of which this
+     expression serves as the address.  Here is an example of its use:
+
+          (mem:DF (pre_dec:SI (reg:SI 39)))
+
+     This says to decrement pseudo register 39 by the length of a
+     `DFmode' value and use the result to address a `DFmode' value.
+
+`(pre_inc:M X)'
+     Similar, but specifies incrementing X instead of decrementing it.
+
+`(post_dec:M X)'
+     Represents the same side effect as `pre_dec' but a different
+     value.  The value represented here is the value X has before being
+     decremented.
+
+`(post_inc:M X)'
+     Similar, but specifies incrementing X instead of decrementing it.
+
+`(post_modify:M X Y)'
+     Represents the side effect of setting X to Y and represents X
+     before X is modified.  X must be a `reg' or `mem', but most
+     machines allow only a `reg'.  M must be the machine mode for
+     pointers on the machine in use.
+
+     The expression Y must be one of three forms: `(plus:M X Z)',
+     `(minus:M X Z)', or `(plus:M X I)', where Z is an index register
+     and I is a constant.
+
+     Here is an example of its use:
+
+          (mem:SF (post_modify:SI (reg:SI 42) (plus (reg:SI 42)
+                                                    (reg:SI 48))))
+
+     This says to modify pseudo register 42 by adding the contents of
+     pseudo register 48 to it, after the use of what ever 42 points to.
+
+`(pre_modify:M X EXPR)'
+     Similar except side effects happen before the use.
+
+ These embedded side effect expressions must be used with care.
+Instruction patterns may not use them.  Until the `flow' pass of the
+compiler, they may occur only to represent pushes onto the stack.  The
+`flow' pass finds cases where registers are incremented or decremented
+in one instruction and used as an address shortly before or after;
+these cases are then transformed to use pre- or post-increment or
+-decrement.
+
+ If a register used as the operand of these expressions is used in
+another address in an insn, the original value of the register is used.
+Uses of the register outside of an address are not permitted within the
+same insn as a use in an embedded side effect expression because such
+insns behave differently on different machines and hence must be treated
+as ambiguous and disallowed.
+
+ An instruction that can be represented with an embedded side effect
+could also be represented using `parallel' containing an additional
+`set' to describe how the address register is altered.  This is not
+done because machines that allow these operations at all typically
+allow them wherever a memory address is called for.  Describing them as
+additional parallel stores would require doubling the number of entries
+in the machine description.
+
+
+File: gccint.info,  Node: Assembler,  Next: Debug Information,  Prev: Incdec,  Up: RTL
+
+10.17 Assembler Instructions as Expressions
+===========================================
+
+The RTX code `asm_operands' represents a value produced by a
+user-specified assembler instruction.  It is used to represent an `asm'
+statement with arguments.  An `asm' statement with a single output
+operand, like this:
+
+     asm ("foo %1,%2,%0" : "=a" (outputvar) : "g" (x + y), "di" (*z));
+
+is represented using a single `asm_operands' RTX which represents the
+value that is stored in `outputvar':
+
+     (set RTX-FOR-OUTPUTVAR
+          (asm_operands "foo %1,%2,%0" "a" 0
+                        [RTX-FOR-ADDITION-RESULT RTX-FOR-*Z]
+                        [(asm_input:M1 "g")
+                         (asm_input:M2 "di")]))
+
+Here the operands of the `asm_operands' RTX are the assembler template
+string, the output-operand's constraint, the index-number of the output
+operand among the output operands specified, a vector of input operand
+RTX's, and a vector of input-operand modes and constraints.  The mode
+M1 is the mode of the sum `x+y'; M2 is that of `*z'.
+
+ When an `asm' statement has multiple output values, its insn has
+several such `set' RTX's inside of a `parallel'.  Each `set' contains
+an `asm_operands'; all of these share the same assembler template and
+vectors, but each contains the constraint for the respective output
+operand.  They are also distinguished by the output-operand index
+number, which is 0, 1, ... for successive output operands.
+
+
+File: gccint.info,  Node: Debug Information,  Next: Insns,  Prev: Assembler,  Up: RTL
+
+10.18 Variable Location Debug Information in RTL
+================================================
+
+Variable tracking relies on `MEM_EXPR' and `REG_EXPR' annotations to
+determine what user variables memory and register references refer to.
+
+ Variable tracking at assignments uses these notes only when they refer
+to variables that live at fixed locations (e.g., addressable variables,
+global non-automatic variables).  For variables whose location may
+vary, it relies on the following types of notes.
+
+`(var_location:MODE VAR EXP STAT)'
+     Binds variable `var', a tree, to value EXP, an RTL expression.  It
+     appears only in `NOTE_INSN_VAR_LOCATION' and `DEBUG_INSN's, with
+     slightly different meanings.  MODE, if present, represents the
+     mode of EXP, which is useful if it is a modeless expression.  STAT
+     is only meaningful in notes, indicating whether the variable is
+     known to be initialized or uninitialized.
+
+`(debug_expr:MODE DECL)'
+     Stands for the value bound to the `DEBUG_EXPR_DECL' DECL, that
+     points back to it, within value expressions in `VAR_LOCATION'
+     nodes.
+
+
+
+File: gccint.info,  Node: Insns,  Next: Calls,  Prev: Debug Information,  Up: RTL
+
+10.19 Insns
+===========
+
+The RTL representation of the code for a function is a doubly-linked
+chain of objects called "insns".  Insns are expressions with special
+codes that are used for no other purpose.  Some insns are actual
+instructions; others represent dispatch tables for `switch' statements;
+others represent labels to jump to or various sorts of declarative
+information.
+
+ In addition to its own specific data, each insn must have a unique
+id-number that distinguishes it from all other insns in the current
+function (after delayed branch scheduling, copies of an insn with the
+same id-number may be present in multiple places in a function, but
+these copies will always be identical and will only appear inside a
+`sequence'), and chain pointers to the preceding and following insns.
+These three fields occupy the same position in every insn, independent
+of the expression code of the insn.  They could be accessed with `XEXP'
+and `XINT', but instead three special macros are always used:
+
+`INSN_UID (I)'
+     Accesses the unique id of insn I.
+
+`PREV_INSN (I)'
+     Accesses the chain pointer to the insn preceding I.  If I is the
+     first insn, this is a null pointer.
+
+`NEXT_INSN (I)'
+     Accesses the chain pointer to the insn following I.  If I is the
+     last insn, this is a null pointer.
+
+ The first insn in the chain is obtained by calling `get_insns'; the
+last insn is the result of calling `get_last_insn'.  Within the chain
+delimited by these insns, the `NEXT_INSN' and `PREV_INSN' pointers must
+always correspond: if INSN is not the first insn,
+
+     NEXT_INSN (PREV_INSN (INSN)) == INSN
+
+is always true and if INSN is not the last insn,
+
+     PREV_INSN (NEXT_INSN (INSN)) == INSN
+
+is always true.
+
+ After delay slot scheduling, some of the insns in the chain might be
+`sequence' expressions, which contain a vector of insns.  The value of
+`NEXT_INSN' in all but the last of these insns is the next insn in the
+vector; the value of `NEXT_INSN' of the last insn in the vector is the
+same as the value of `NEXT_INSN' for the `sequence' in which it is
+contained.  Similar rules apply for `PREV_INSN'.
+
+ This means that the above invariants are not necessarily true for insns
+inside `sequence' expressions.  Specifically, if INSN is the first insn
+in a `sequence', `NEXT_INSN (PREV_INSN (INSN))' is the insn containing
+the `sequence' expression, as is the value of `PREV_INSN (NEXT_INSN
+(INSN))' if INSN is the last insn in the `sequence' expression.  You
+can use these expressions to find the containing `sequence' expression.
+
+ Every insn has one of the following expression codes:
+
+`insn'
+     The expression code `insn' is used for instructions that do not
+     jump and do not do function calls.  `sequence' expressions are
+     always contained in insns with code `insn' even if one of those
+     insns should jump or do function calls.
+
+     Insns with code `insn' have four additional fields beyond the three
+     mandatory ones listed above.  These four are described in a table
+     below.
+
+`jump_insn'
+     The expression code `jump_insn' is used for instructions that may
+     jump (or, more generally, may contain `label_ref' expressions to
+     which `pc' can be set in that instruction).  If there is an
+     instruction to return from the current function, it is recorded as
+     a `jump_insn'.
+
+     `jump_insn' insns have the same extra fields as `insn' insns,
+     accessed in the same way and in addition contain a field
+     `JUMP_LABEL' which is defined once jump optimization has completed.
+
+     For simple conditional and unconditional jumps, this field contains
+     the `code_label' to which this insn will (possibly conditionally)
+     branch.  In a more complex jump, `JUMP_LABEL' records one of the
+     labels that the insn refers to; other jump target labels are
+     recorded as `REG_LABEL_TARGET' notes.  The exception is `addr_vec'
+     and `addr_diff_vec', where `JUMP_LABEL' is `NULL_RTX' and the only
+     way to find the labels is to scan the entire body of the insn.
+
+     Return insns count as jumps, but since they do not refer to any
+     labels, their `JUMP_LABEL' is `NULL_RTX'.
+
+`call_insn'
+     The expression code `call_insn' is used for instructions that may
+     do function calls.  It is important to distinguish these
+     instructions because they imply that certain registers and memory
+     locations may be altered unpredictably.
+
+     `call_insn' insns have the same extra fields as `insn' insns,
+     accessed in the same way and in addition contain a field
+     `CALL_INSN_FUNCTION_USAGE', which contains a list (chain of
+     `expr_list' expressions) containing `use' and `clobber'
+     expressions that denote hard registers and `MEM's used or
+     clobbered by the called function.
+
+     A `MEM' generally points to a stack slots in which arguments passed
+     to the libcall by reference (*note TARGET_PASS_BY_REFERENCE:
+     Register Arguments.) are stored.  If the argument is caller-copied
+     (*note TARGET_CALLEE_COPIES: Register Arguments.), the stack slot
+     will be mentioned in `CLOBBER' and `USE' entries; if it's
+     callee-copied, only a `USE' will appear, and the `MEM' may point
+     to addresses that are not stack slots.
+
+     `CLOBBER'ed registers in this list augment registers specified in
+     `CALL_USED_REGISTERS' (*note Register Basics::).
+
+`code_label'
+     A `code_label' insn represents a label that a jump insn can jump
+     to.  It contains two special fields of data in addition to the
+     three standard ones.  `CODE_LABEL_NUMBER' is used to hold the
+     "label number", a number that identifies this label uniquely among
+     all the labels in the compilation (not just in the current
+     function).  Ultimately, the label is represented in the assembler
+     output as an assembler label, usually of the form `LN' where N is
+     the label number.
+
+     When a `code_label' appears in an RTL expression, it normally
+     appears within a `label_ref' which represents the address of the
+     label, as a number.
+
+     Besides as a `code_label', a label can also be represented as a
+     `note' of type `NOTE_INSN_DELETED_LABEL'.
+
+     The field `LABEL_NUSES' is only defined once the jump optimization
+     phase is completed.  It contains the number of times this label is
+     referenced in the current function.
+
+     The field `LABEL_KIND' differentiates four different types of
+     labels: `LABEL_NORMAL', `LABEL_STATIC_ENTRY',
+     `LABEL_GLOBAL_ENTRY', and `LABEL_WEAK_ENTRY'.  The only labels
+     that do not have type `LABEL_NORMAL' are "alternate entry points"
+     to the current function.  These may be static (visible only in the
+     containing translation unit), global (exposed to all translation
+     units), or weak (global, but can be overridden by another symbol
+     with the same name).
+
+     Much of the compiler treats all four kinds of label identically.
+     Some of it needs to know whether or not a label is an alternate
+     entry point; for this purpose, the macro `LABEL_ALT_ENTRY_P' is
+     provided.  It is equivalent to testing whether `LABEL_KIND (label)
+     == LABEL_NORMAL'.  The only place that cares about the distinction
+     between static, global, and weak alternate entry points, besides
+     the front-end code that creates them, is the function
+     `output_alternate_entry_point', in `final.c'.
+
+     To set the kind of a label, use the `SET_LABEL_KIND' macro.
+
+`barrier'
+     Barriers are placed in the instruction stream when control cannot
+     flow past them.  They are placed after unconditional jump
+     instructions to indicate that the jumps are unconditional and
+     after calls to `volatile' functions, which do not return (e.g.,
+     `exit').  They contain no information beyond the three standard
+     fields.
+
+`note'
+     `note' insns are used to represent additional debugging and
+     declarative information.  They contain two nonstandard fields, an
+     integer which is accessed with the macro `NOTE_LINE_NUMBER' and a
+     string accessed with `NOTE_SOURCE_FILE'.
+
+     If `NOTE_LINE_NUMBER' is positive, the note represents the
+     position of a source line and `NOTE_SOURCE_FILE' is the source
+     file name that the line came from.  These notes control generation
+     of line number data in the assembler output.
+
+     Otherwise, `NOTE_LINE_NUMBER' is not really a line number but a
+     code with one of the following values (and `NOTE_SOURCE_FILE' must
+     contain a null pointer):
+
+    `NOTE_INSN_DELETED'
+          Such a note is completely ignorable.  Some passes of the
+          compiler delete insns by altering them into notes of this
+          kind.
+
+    `NOTE_INSN_DELETED_LABEL'
+          This marks what used to be a `code_label', but was not used
+          for other purposes than taking its address and was
+          transformed to mark that no code jumps to it.
+
+    `NOTE_INSN_BLOCK_BEG'
+    `NOTE_INSN_BLOCK_END'
+          These types of notes indicate the position of the beginning
+          and end of a level of scoping of variable names.  They
+          control the output of debugging information.
+
+    `NOTE_INSN_EH_REGION_BEG'
+    `NOTE_INSN_EH_REGION_END'
+          These types of notes indicate the position of the beginning
+          and end of a level of scoping for exception handling.
+          `NOTE_BLOCK_NUMBER' identifies which `CODE_LABEL' or `note'
+          of type `NOTE_INSN_DELETED_LABEL' is associated with the
+          given region.
+
+    `NOTE_INSN_LOOP_BEG'
+    `NOTE_INSN_LOOP_END'
+          These types of notes indicate the position of the beginning
+          and end of a `while' or `for' loop.  They enable the loop
+          optimizer to find loops quickly.
+
+    `NOTE_INSN_LOOP_CONT'
+          Appears at the place in a loop that `continue' statements
+          jump to.
+
+    `NOTE_INSN_LOOP_VTOP'
+          This note indicates the place in a loop where the exit test
+          begins for those loops in which the exit test has been
+          duplicated.  This position becomes another virtual start of
+          the loop when considering loop invariants.
+
+    `NOTE_INSN_FUNCTION_BEG'
+          Appears at the start of the function body, after the function
+          prologue.
+
+    `NOTE_INSN_VAR_LOCATION'
+          This note is used to generate variable location debugging
+          information.  It indicates that the user variable in its
+          `VAR_LOCATION' operand is at the location given in the RTL
+          expression, or holds a value that can be computed by
+          evaluating the RTL expression from that static point in the
+          program up to the next such note for the same user variable.
+
+
+     These codes are printed symbolically when they appear in debugging
+     dumps.
+
+`debug_insn'
+     The expression code `debug_insn' is used for pseudo-instructions
+     that hold debugging information for variable tracking at
+     assignments (see `-fvar-tracking-assignments' option).  They are
+     the RTL representation of `GIMPLE_DEBUG' statements (*note
+     `GIMPLE_DEBUG'::), with a `VAR_LOCATION' operand that binds a user
+     variable tree to an RTL representation of the `value' in the
+     corresponding statement.  A `DEBUG_EXPR' in it stands for the
+     value bound to the corresponding `DEBUG_EXPR_DECL'.
+
+     Throughout optimization passes, binding information is kept in
+     pseudo-instruction form, so that, unlike notes, it gets the same
+     treatment and adjustments that regular instructions would.  It is
+     the variable tracking pass that turns these pseudo-instructions
+     into var location notes, analyzing control flow, value
+     equivalences and changes to registers and memory referenced in
+     value expressions, propagating the values of debug temporaries and
+     determining expressions that can be used to compute the value of
+     each user variable at as many points (ranges, actually) in the
+     program as possible.
+
+     Unlike `NOTE_INSN_VAR_LOCATION', the value expression in an
+     `INSN_VAR_LOCATION' denotes a value at that specific point in the
+     program, rather than an expression that can be evaluated at any
+     later point before an overriding `VAR_LOCATION' is encountered.
+     E.g., if a user variable is bound to a `REG' and then a subsequent
+     insn modifies the `REG', the note location would keep mapping the
+     user variable to the register across the insn, whereas the insn
+     location would keep the variable bound to the value, so that the
+     variable tracking pass would emit another location note for the
+     variable at the point in which the register is modified.
+
+
+ The machine mode of an insn is normally `VOIDmode', but some phases
+use the mode for various purposes.
+
+ The common subexpression elimination pass sets the mode of an insn to
+`QImode' when it is the first insn in a block that has already been
+processed.
+
+ The second Haifa scheduling pass, for targets that can multiple issue,
+sets the mode of an insn to `TImode' when it is believed that the
+instruction begins an issue group.  That is, when the instruction
+cannot issue simultaneously with the previous.  This may be relied on
+by later passes, in particular machine-dependent reorg.
+
+ Here is a table of the extra fields of `insn', `jump_insn' and
+`call_insn' insns:
+
+`PATTERN (I)'
+     An expression for the side effect performed by this insn.  This
+     must be one of the following codes: `set', `call', `use',
+     `clobber', `return', `asm_input', `asm_output', `addr_vec',
+     `addr_diff_vec', `trap_if', `unspec', `unspec_volatile',
+     `parallel', `cond_exec', or `sequence'.  If it is a `parallel',
+     each element of the `parallel' must be one these codes, except that
+     `parallel' expressions cannot be nested and `addr_vec' and
+     `addr_diff_vec' are not permitted inside a `parallel' expression.
+
+`INSN_CODE (I)'
+     An integer that says which pattern in the machine description
+     matches this insn, or -1 if the matching has not yet been
+     attempted.
+
+     Such matching is never attempted and this field remains -1 on an
+     insn whose pattern consists of a single `use', `clobber',
+     `asm_input', `addr_vec' or `addr_diff_vec' expression.
+
+     Matching is also never attempted on insns that result from an `asm'
+     statement.  These contain at least one `asm_operands' expression.
+     The function `asm_noperands' returns a non-negative value for such
+     insns.
+
+     In the debugging output, this field is printed as a number
+     followed by a symbolic representation that locates the pattern in
+     the `md' file as some small positive or negative offset from a
+     named pattern.
+
+`LOG_LINKS (I)'
+     A list (chain of `insn_list' expressions) giving information about
+     dependencies between instructions within a basic block.  Neither a
+     jump nor a label may come between the related insns.  These are
+     only used by the schedulers and by combine.  This is a deprecated
+     data structure.  Def-use and use-def chains are now preferred.
+
+`REG_NOTES (I)'
+     A list (chain of `expr_list' and `insn_list' expressions) giving
+     miscellaneous information about the insn.  It is often information
+     pertaining to the registers used in this insn.
+
+ The `LOG_LINKS' field of an insn is a chain of `insn_list'
+expressions.  Each of these has two operands: the first is an insn, and
+the second is another `insn_list' expression (the next one in the
+chain).  The last `insn_list' in the chain has a null pointer as second
+operand.  The significant thing about the chain is which insns appear
+in it (as first operands of `insn_list' expressions).  Their order is
+not significant.
+
+ This list is originally set up by the flow analysis pass; it is a null
+pointer until then.  Flow only adds links for those data dependencies
+which can be used for instruction combination.  For each insn, the flow
+analysis pass adds a link to insns which store into registers values
+that are used for the first time in this insn.
+
+ The `REG_NOTES' field of an insn is a chain similar to the `LOG_LINKS'
+field but it includes `expr_list' expressions in addition to
+`insn_list' expressions.  There are several kinds of register notes,
+which are distinguished by the machine mode, which in a register note
+is really understood as being an `enum reg_note'.  The first operand OP
+of the note is data whose meaning depends on the kind of note.
+
+ The macro `REG_NOTE_KIND (X)' returns the kind of register note.  Its
+counterpart, the macro `PUT_REG_NOTE_KIND (X, NEWKIND)' sets the
+register note type of X to be NEWKIND.
+
+ Register notes are of three classes: They may say something about an
+input to an insn, they may say something about an output of an insn, or
+they may create a linkage between two insns.  There are also a set of
+values that are only used in `LOG_LINKS'.
+
+ These register notes annotate inputs to an insn:
+
+`REG_DEAD'
+     The value in OP dies in this insn; that is to say, altering the
+     value immediately after this insn would not affect the future
+     behavior of the program.
+
+     It does not follow that the register OP has no useful value after
+     this insn since OP is not necessarily modified by this insn.
+     Rather, no subsequent instruction uses the contents of OP.
+
+`REG_UNUSED'
+     The register OP being set by this insn will not be used in a
+     subsequent insn.  This differs from a `REG_DEAD' note, which
+     indicates that the value in an input will not be used subsequently.
+     These two notes are independent; both may be present for the same
+     register.
+
+`REG_INC'
+     The register OP is incremented (or decremented; at this level
+     there is no distinction) by an embedded side effect inside this
+     insn.  This means it appears in a `post_inc', `pre_inc',
+     `post_dec' or `pre_dec' expression.
+
+`REG_NONNEG'
+     The register OP is known to have a nonnegative value when this
+     insn is reached.  This is used so that decrement and branch until
+     zero instructions, such as the m68k dbra, can be matched.
+
+     The `REG_NONNEG' note is added to insns only if the machine
+     description has a `decrement_and_branch_until_zero' pattern.
+
+`REG_LABEL_OPERAND'
+     This insn uses OP, a `code_label' or a `note' of type
+     `NOTE_INSN_DELETED_LABEL', but is not a `jump_insn', or it is a
+     `jump_insn' that refers to the operand as an ordinary operand.
+     The label may still eventually be a jump target, but if so in an
+     indirect jump in a subsequent insn.  The presence of this note
+     allows jump optimization to be aware that OP is, in fact, being
+     used, and flow optimization to build an accurate flow graph.
+
+`REG_LABEL_TARGET'
+     This insn is a `jump_insn' but not an `addr_vec' or
+     `addr_diff_vec'.  It uses OP, a `code_label' as a direct or
+     indirect jump target.  Its purpose is similar to that of
+     `REG_LABEL_OPERAND'.  This note is only present if the insn has
+     multiple targets; the last label in the insn (in the highest
+     numbered insn-field) goes into the `JUMP_LABEL' field and does not
+     have a `REG_LABEL_TARGET' note.  *Note JUMP_LABEL: Insns.
+
+`REG_CROSSING_JUMP'
+     This insn is a branching instruction (either an unconditional jump
+     or an indirect jump) which crosses between hot and cold sections,
+     which could potentially be very far apart in the executable.  The
+     presence of this note indicates to other optimizations that this
+     branching instruction should not be "collapsed" into a simpler
+     branching construct.  It is used when the optimization to
+     partition basic blocks into hot and cold sections is turned on.
+
+`REG_SETJMP'
+     Appears attached to each `CALL_INSN' to `setjmp' or a related
+     function.
+
+ The following notes describe attributes of outputs of an insn:
+
+`REG_EQUIV'
+`REG_EQUAL'
+     This note is only valid on an insn that sets only one register and
+     indicates that that register will be equal to OP at run time; the
+     scope of this equivalence differs between the two types of notes.
+     The value which the insn explicitly copies into the register may
+     look different from OP, but they will be equal at run time.  If the
+     output of the single `set' is a `strict_low_part' expression, the
+     note refers to the register that is contained in `SUBREG_REG' of
+     the `subreg' expression.
+
+     For `REG_EQUIV', the register is equivalent to OP throughout the
+     entire function, and could validly be replaced in all its
+     occurrences by OP.  ("Validly" here refers to the data flow of the
+     program; simple replacement may make some insns invalid.)  For
+     example, when a constant is loaded into a register that is never
+     assigned any other value, this kind of note is used.
+
+     When a parameter is copied into a pseudo-register at entry to a
+     function, a note of this kind records that the register is
+     equivalent to the stack slot where the parameter was passed.
+     Although in this case the register may be set by other insns, it
+     is still valid to replace the register by the stack slot
+     throughout the function.
+
+     A `REG_EQUIV' note is also used on an instruction which copies a
+     register parameter into a pseudo-register at entry to a function,
+     if there is a stack slot where that parameter could be stored.
+     Although other insns may set the pseudo-register, it is valid for
+     the compiler to replace the pseudo-register by stack slot
+     throughout the function, provided the compiler ensures that the
+     stack slot is properly initialized by making the replacement in
+     the initial copy instruction as well.  This is used on machines
+     for which the calling convention allocates stack space for
+     register parameters.  See `REG_PARM_STACK_SPACE' in *note Stack
+     Arguments::.
+
+     In the case of `REG_EQUAL', the register that is set by this insn
+     will be equal to OP at run time at the end of this insn but not
+     necessarily elsewhere in the function.  In this case, OP is
+     typically an arithmetic expression.  For example, when a sequence
+     of insns such as a library call is used to perform an arithmetic
+     operation, this kind of note is attached to the insn that produces
+     or copies the final value.
+
+     These two notes are used in different ways by the compiler passes.
+     `REG_EQUAL' is used by passes prior to register allocation (such as
+     common subexpression elimination and loop optimization) to tell
+     them how to think of that value.  `REG_EQUIV' notes are used by
+     register allocation to indicate that there is an available
+     substitute expression (either a constant or a `mem' expression for
+     the location of a parameter on the stack) that may be used in
+     place of a register if insufficient registers are available.
+
+     Except for stack homes for parameters, which are indicated by a
+     `REG_EQUIV' note and are not useful to the early optimization
+     passes and pseudo registers that are equivalent to a memory
+     location throughout their entire life, which is not detected until
+     later in the compilation, all equivalences are initially indicated
+     by an attached `REG_EQUAL' note.  In the early stages of register
+     allocation, a `REG_EQUAL' note is changed into a `REG_EQUIV' note
+     if OP is a constant and the insn represents the only set of its
+     destination register.
+
+     Thus, compiler passes prior to register allocation need only check
+     for `REG_EQUAL' notes and passes subsequent to register allocation
+     need only check for `REG_EQUIV' notes.
+
+ These notes describe linkages between insns.  They occur in pairs: one
+insn has one of a pair of notes that points to a second insn, which has
+the inverse note pointing back to the first insn.
+
+`REG_CC_SETTER'
+`REG_CC_USER'
+     On machines that use `cc0', the insns which set and use `cc0' set
+     and use `cc0' are adjacent.  However, when branch delay slot
+     filling is done, this may no longer be true.  In this case a
+     `REG_CC_USER' note will be placed on the insn setting `cc0' to
+     point to the insn using `cc0' and a `REG_CC_SETTER' note will be
+     placed on the insn using `cc0' to point to the insn setting `cc0'.
+
+ These values are only used in the `LOG_LINKS' field, and indicate the
+type of dependency that each link represents.  Links which indicate a
+data dependence (a read after write dependence) do not use any code,
+they simply have mode `VOIDmode', and are printed without any
+descriptive text.
+
+`REG_DEP_TRUE'
+     This indicates a true dependence (a read after write dependence).
+
+`REG_DEP_OUTPUT'
+     This indicates an output dependence (a write after write
+     dependence).
+
+`REG_DEP_ANTI'
+     This indicates an anti dependence (a write after read dependence).
+
+
+ These notes describe information gathered from gcov profile data.  They
+are stored in the `REG_NOTES' field of an insn as an `expr_list'.
+
+`REG_BR_PROB'
+     This is used to specify the ratio of branches to non-branches of a
+     branch insn according to the profile data.  The value is stored as
+     a value between 0 and REG_BR_PROB_BASE; larger values indicate a
+     higher probability that the branch will be taken.
+
+`REG_BR_PRED'
+     These notes are found in JUMP insns after delayed branch scheduling
+     has taken place.  They indicate both the direction and the
+     likelihood of the JUMP.  The format is a bitmask of ATTR_FLAG_*
+     values.
+
+`REG_FRAME_RELATED_EXPR'
+     This is used on an RTX_FRAME_RELATED_P insn wherein the attached
+     expression is used in place of the actual insn pattern.  This is
+     done in cases where the pattern is either complex or misleading.
+
+ For convenience, the machine mode in an `insn_list' or `expr_list' is
+printed using these symbolic codes in debugging dumps.
+
+ The only difference between the expression codes `insn_list' and
+`expr_list' is that the first operand of an `insn_list' is assumed to
+be an insn and is printed in debugging dumps as the insn's unique id;
+the first operand of an `expr_list' is printed in the ordinary way as
+an expression.
+
+
+File: gccint.info,  Node: Calls,  Next: Sharing,  Prev: Insns,  Up: RTL
+
+10.20 RTL Representation of Function-Call Insns
+===============================================
+
+Insns that call subroutines have the RTL expression code `call_insn'.
+These insns must satisfy special rules, and their bodies must use a
+special RTL expression code, `call'.
+
+ A `call' expression has two operands, as follows:
+
+     (call (mem:FM ADDR) NBYTES)
+
+Here NBYTES is an operand that represents the number of bytes of
+argument data being passed to the subroutine, FM is a machine mode
+(which must equal as the definition of the `FUNCTION_MODE' macro in the
+machine description) and ADDR represents the address of the subroutine.
+
+ For a subroutine that returns no value, the `call' expression as shown
+above is the entire body of the insn, except that the insn might also
+contain `use' or `clobber' expressions.
+
+ For a subroutine that returns a value whose mode is not `BLKmode', the
+value is returned in a hard register.  If this register's number is R,
+then the body of the call insn looks like this:
+
+     (set (reg:M R)
+          (call (mem:FM ADDR) NBYTES))
+
+This RTL expression makes it clear (to the optimizer passes) that the
+appropriate register receives a useful value in this insn.
+
+ When a subroutine returns a `BLKmode' value, it is handled by passing
+to the subroutine the address of a place to store the value.  So the
+call insn itself does not "return" any value, and it has the same RTL
+form as a call that returns nothing.
+
+ On some machines, the call instruction itself clobbers some register,
+for example to contain the return address.  `call_insn' insns on these
+machines should have a body which is a `parallel' that contains both
+the `call' expression and `clobber' expressions that indicate which
+registers are destroyed.  Similarly, if the call instruction requires
+some register other than the stack pointer that is not explicitly
+mentioned in its RTL, a `use' subexpression should mention that
+register.
+
+ Functions that are called are assumed to modify all registers listed in
+the configuration macro `CALL_USED_REGISTERS' (*note Register Basics::)
+and, with the exception of `const' functions and library calls, to
+modify all of memory.
+
+ Insns containing just `use' expressions directly precede the
+`call_insn' insn to indicate which registers contain inputs to the
+function.  Similarly, if registers other than those in
+`CALL_USED_REGISTERS' are clobbered by the called function, insns
+containing a single `clobber' follow immediately after the call to
+indicate which registers.
+
+
+File: gccint.info,  Node: Sharing,  Next: Reading RTL,  Prev: Calls,  Up: RTL
+
+10.21 Structure Sharing Assumptions
+===================================
+
+The compiler assumes that certain kinds of RTL expressions are unique;
+there do not exist two distinct objects representing the same value.
+In other cases, it makes an opposite assumption: that no RTL expression
+object of a certain kind appears in more than one place in the
+containing structure.
+
+ These assumptions refer to a single function; except for the RTL
+objects that describe global variables and external functions, and a
+few standard objects such as small integer constants, no RTL objects
+are common to two functions.
+
+   * Each pseudo-register has only a single `reg' object to represent
+     it, and therefore only a single machine mode.
+
+   * For any symbolic label, there is only one `symbol_ref' object
+     referring to it.
+
+   * All `const_int' expressions with equal values are shared.
+
+   * There is only one `pc' expression.
+
+   * There is only one `cc0' expression.
+
+   * There is only one `const_double' expression with value 0 for each
+     floating point mode.  Likewise for values 1 and 2.
+
+   * There is only one `const_vector' expression with value 0 for each
+     vector mode, be it an integer or a double constant vector.
+
+   * No `label_ref' or `scratch' appears in more than one place in the
+     RTL structure; in other words, it is safe to do a tree-walk of all
+     the insns in the function and assume that each time a `label_ref'
+     or `scratch' is seen it is distinct from all others that are seen.
+
+   * Only one `mem' object is normally created for each static variable
+     or stack slot, so these objects are frequently shared in all the
+     places they appear.  However, separate but equal objects for these
+     variables are occasionally made.
+
+   * When a single `asm' statement has multiple output operands, a
+     distinct `asm_operands' expression is made for each output operand.
+     However, these all share the vector which contains the sequence of
+     input operands.  This sharing is used later on to test whether two
+     `asm_operands' expressions come from the same statement, so all
+     optimizations must carefully preserve the sharing if they copy the
+     vector at all.
+
+   * No RTL object appears in more than one place in the RTL structure
+     except as described above.  Many passes of the compiler rely on
+     this by assuming that they can modify RTL objects in place without
+     unwanted side-effects on other insns.
+
+   * During initial RTL generation, shared structure is freely
+     introduced.  After all the RTL for a function has been generated,
+     all shared structure is copied by `unshare_all_rtl' in
+     `emit-rtl.c', after which the above rules are guaranteed to be
+     followed.
+
+   * During the combiner pass, shared structure within an insn can exist
+     temporarily.  However, the shared structure is copied before the
+     combiner is finished with the insn.  This is done by calling
+     `copy_rtx_if_shared', which is a subroutine of `unshare_all_rtl'.
+
+
+File: gccint.info,  Node: Reading RTL,  Prev: Sharing,  Up: RTL
+
+10.22 Reading RTL
+=================
+
+To read an RTL object from a file, call `read_rtx'.  It takes one
+argument, a stdio stream, and returns a single RTL object.  This routine
+is defined in `read-rtl.c'.  It is not available in the compiler
+itself, only the various programs that generate the compiler back end
+from the machine description.
+
+ People frequently have the idea of using RTL stored as text in a file
+as an interface between a language front end and the bulk of GCC.  This
+idea is not feasible.
+
+ GCC was designed to use RTL internally only.  Correct RTL for a given
+program is very dependent on the particular target machine.  And the RTL
+does not contain all the information about the program.
+
+ The proper way to interface GCC to a new language front end is with
+the "tree" data structure, described in the files `tree.h' and
+`tree.def'.  The documentation for this structure (*note GENERIC::) is
+incomplete.
+
+
+File: gccint.info,  Node: GENERIC,  Next: GIMPLE,  Prev: Passes,  Up: Top
+
+11 GENERIC
+**********
+
+The purpose of GENERIC is simply to provide a language-independent way
+of representing an entire function in trees.  To this end, it was
+necessary to add a few new tree codes to the back end, but most
+everything was already there.  If you can express it with the codes in
+`gcc/tree.def', it's GENERIC.
+
+ Early on, there was a great deal of debate about how to think about
+statements in a tree IL.  In GENERIC, a statement is defined as any
+expression whose value, if any, is ignored.  A statement will always
+have `TREE_SIDE_EFFECTS' set (or it will be discarded), but a
+non-statement expression may also have side effects.  A `CALL_EXPR',
+for instance.
+
+ It would be possible for some local optimizations to work on the
+GENERIC form of a function; indeed, the adapted tree inliner works fine
+on GENERIC, but the current compiler performs inlining after lowering
+to GIMPLE (a restricted form described in the next section). Indeed,
+currently the frontends perform this lowering before handing off to
+`tree_rest_of_compilation', but this seems inelegant.
+
+* Menu:
+
+* Deficiencies::                Topics net yet covered in this document.
+* Tree overview::               All about `tree's.
+* Types::                       Fundamental and aggregate types.
+* Declarations::                Type declarations and variables.
+* Attributes::                  Declaration and type attributes.
+* Expressions: Expression trees.            Operating on data.
+* Statements::                  Control flow and related trees.
+* Functions::           	Function bodies, linkage, and other aspects.
+* Language-dependent trees::    Topics and trees specific to language front ends.
+* C and C++ Trees::     	Trees specific to C and C++.
+* Java Trees:: 	                Trees specific to Java.
+
+
+File: gccint.info,  Node: Deficiencies,  Next: Tree overview,  Up: GENERIC
+
+11.1 Deficiencies
+=================
+
+There are many places in which this document is incomplet and incorrekt.
+It is, as of yet, only _preliminary_ documentation.
+
+
+File: gccint.info,  Node: Tree overview,  Next: Types,  Prev: Deficiencies,  Up: GENERIC
+
+11.2 Overview
+=============
+
+The central data structure used by the internal representation is the
+`tree'.  These nodes, while all of the C type `tree', are of many
+varieties.  A `tree' is a pointer type, but the object to which it
+points may be of a variety of types.  From this point forward, we will
+refer to trees in ordinary type, rather than in `this font', except
+when talking about the actual C type `tree'.
+
+ You can tell what kind of node a particular tree is by using the
+`TREE_CODE' macro.  Many, many macros take trees as input and return
+trees as output.  However, most macros require a certain kind of tree
+node as input.  In other words, there is a type-system for trees, but
+it is not reflected in the C type-system.
+
+ For safety, it is useful to configure GCC with `--enable-checking'.
+Although this results in a significant performance penalty (since all
+tree types are checked at run-time), and is therefore inappropriate in a
+release version, it is extremely helpful during the development process.
+
+ Many macros behave as predicates.  Many, although not all, of these
+predicates end in `_P'.  Do not rely on the result type of these macros
+being of any particular type.  You may, however, rely on the fact that
+the type can be compared to `0', so that statements like
+     if (TEST_P (t) && !TEST_P (y))
+       x = 1;
+ and
+     int i = (TEST_P (t) != 0);
+ are legal.  Macros that return `int' values now may be changed to
+return `tree' values, or other pointers in the future.  Even those that
+continue to return `int' may return multiple nonzero codes where
+previously they returned only zero and one.  Therefore, you should not
+write code like
+     if (TEST_P (t) == 1)
+ as this code is not guaranteed to work correctly in the future.
+
+ You should not take the address of values returned by the macros or
+functions described here.  In particular, no guarantee is given that the
+values are lvalues.
+
+ In general, the names of macros are all in uppercase, while the names
+of functions are entirely in lowercase.  There are rare exceptions to
+this rule.  You should assume that any macro or function whose name is
+made up entirely of uppercase letters may evaluate its arguments more
+than once.  You may assume that a macro or function whose name is made
+up entirely of lowercase letters will evaluate its arguments only once.
+
+ The `error_mark_node' is a special tree.  Its tree code is
+`ERROR_MARK', but since there is only ever one node with that code, the
+usual practice is to compare the tree against `error_mark_node'.  (This
+test is just a test for pointer equality.)  If an error has occurred
+during front-end processing the flag `errorcount' will be set.  If the
+front end has encountered code it cannot handle, it will issue a
+message to the user and set `sorrycount'.  When these flags are set,
+any macro or function which normally returns a tree of a particular
+kind may instead return the `error_mark_node'.  Thus, if you intend to
+do any processing of erroneous code, you must be prepared to deal with
+the `error_mark_node'.
+
+ Occasionally, a particular tree slot (like an operand to an expression,
+or a particular field in a declaration) will be referred to as
+"reserved for the back end".  These slots are used to store RTL when
+the tree is converted to RTL for use by the GCC back end.  However, if
+that process is not taking place (e.g., if the front end is being hooked
+up to an intelligent editor), then those slots may be used by the back
+end presently in use.
+
+ If you encounter situations that do not match this documentation, such
+as tree nodes of types not mentioned here, or macros documented to
+return entities of a particular kind that instead return entities of
+some different kind, you have found a bug, either in the front end or in
+the documentation.  Please report these bugs as you would any other bug.
+
+* Menu:
+
+* Macros and Functions::Macros and functions that can be used with all trees.
+* Identifiers::         The names of things.
+* Containers::          Lists and vectors.
+
+
+File: gccint.info,  Node: Macros and Functions,  Next: Identifiers,  Up: Tree overview
+
+11.2.1 Trees
+------------
+
+All GENERIC trees have two fields in common.  First, `TREE_CHAIN' is a
+pointer that can be used as a singly-linked list to other trees.  The
+other is `TREE_TYPE'.  Many trees store the type of an expression or
+declaration in this field.
+
+ These are some other functions for handling trees:
+
+`tree_size'
+     Return the number of bytes a tree takes.
+
+`build0'
+`build1'
+`build2'
+`build3'
+`build4'
+`build5'
+`build6'
+     These functions build a tree and supply values to put in each
+     parameter.  The basic signature is `code, type, [operands]'.
+     `code' is the `TREE_CODE', and `type' is a tree representing the
+     `TREE_TYPE'.  These are followed by the operands, each of which is
+     also a tree.
+
+
+
+File: gccint.info,  Node: Identifiers,  Next: Containers,  Prev: Macros and Functions,  Up: Tree overview
+
+11.2.2 Identifiers
+------------------
+
+An `IDENTIFIER_NODE' represents a slightly more general concept that
+the standard C or C++ concept of identifier.  In particular, an
+`IDENTIFIER_NODE' may contain a `$', or other extraordinary characters.
+
+ There are never two distinct `IDENTIFIER_NODE's representing the same
+identifier.  Therefore, you may use pointer equality to compare
+`IDENTIFIER_NODE's, rather than using a routine like `strcmp'.  Use
+`get_identifier' to obtain the unique `IDENTIFIER_NODE' for a supplied
+string.
+
+ You can use the following macros to access identifiers:
+`IDENTIFIER_POINTER'
+     The string represented by the identifier, represented as a
+     `char*'.  This string is always `NUL'-terminated, and contains no
+     embedded `NUL' characters.
+
+`IDENTIFIER_LENGTH'
+     The length of the string returned by `IDENTIFIER_POINTER', not
+     including the trailing `NUL'.  This value of `IDENTIFIER_LENGTH
+     (x)' is always the same as `strlen (IDENTIFIER_POINTER (x))'.
+
+`IDENTIFIER_OPNAME_P'
+     This predicate holds if the identifier represents the name of an
+     overloaded operator.  In this case, you should not depend on the
+     contents of either the `IDENTIFIER_POINTER' or the
+     `IDENTIFIER_LENGTH'.
+
+`IDENTIFIER_TYPENAME_P'
+     This predicate holds if the identifier represents the name of a
+     user-defined conversion operator.  In this case, the `TREE_TYPE' of
+     the `IDENTIFIER_NODE' holds the type to which the conversion
+     operator converts.
+
+
+
+File: gccint.info,  Node: Containers,  Prev: Identifiers,  Up: Tree overview
+
+11.2.3 Containers
+-----------------
+
+Two common container data structures can be represented directly with
+tree nodes.  A `TREE_LIST' is a singly linked list containing two trees
+per node.  These are the `TREE_PURPOSE' and `TREE_VALUE' of each node.
+(Often, the `TREE_PURPOSE' contains some kind of tag, or additional
+information, while the `TREE_VALUE' contains the majority of the
+payload.  In other cases, the `TREE_PURPOSE' is simply `NULL_TREE',
+while in still others both the `TREE_PURPOSE' and `TREE_VALUE' are of
+equal stature.)  Given one `TREE_LIST' node, the next node is found by
+following the `TREE_CHAIN'.  If the `TREE_CHAIN' is `NULL_TREE', then
+you have reached the end of the list.
+
+ A `TREE_VEC' is a simple vector.  The `TREE_VEC_LENGTH' is an integer
+(not a tree) giving the number of nodes in the vector.  The nodes
+themselves are accessed using the `TREE_VEC_ELT' macro, which takes two
+arguments.  The first is the `TREE_VEC' in question; the second is an
+integer indicating which element in the vector is desired.  The
+elements are indexed from zero.
+
+
+File: gccint.info,  Node: Types,  Next: Declarations,  Prev: Tree overview,  Up: GENERIC
+
+11.3 Types
+==========
+
+All types have corresponding tree nodes.  However, you should not assume
+that there is exactly one tree node corresponding to each type.  There
+are often multiple nodes corresponding to the same type.
+
+ For the most part, different kinds of types have different tree codes.
+(For example, pointer types use a `POINTER_TYPE' code while arrays use
+an `ARRAY_TYPE' code.)  However, pointers to member functions use the
+`RECORD_TYPE' code.  Therefore, when writing a `switch' statement that
+depends on the code associated with a particular type, you should take
+care to handle pointers to member functions under the `RECORD_TYPE'
+case label.
+
+ The following functions and macros deal with cv-qualification of types:
+`TYPE_MAIN_VARIANT'
+     This macro returns the unqualified version of a type.  It may be
+     applied to an unqualified type, but it is not always the identity
+     function in that case.
+
+ A few other macros and functions are usable with all types:
+`TYPE_SIZE'
+     The number of bits required to represent the type, represented as
+     an `INTEGER_CST'.  For an incomplete type, `TYPE_SIZE' will be
+     `NULL_TREE'.
+
+`TYPE_ALIGN'
+     The alignment of the type, in bits, represented as an `int'.
+
+`TYPE_NAME'
+     This macro returns a declaration (in the form of a `TYPE_DECL') for
+     the type.  (Note this macro does _not_ return an
+     `IDENTIFIER_NODE', as you might expect, given its name!)  You can
+     look at the `DECL_NAME' of the `TYPE_DECL' to obtain the actual
+     name of the type.  The `TYPE_NAME' will be `NULL_TREE' for a type
+     that is not a built-in type, the result of a typedef, or a named
+     class type.
+
+`TYPE_CANONICAL'
+     This macro returns the "canonical" type for the given type node.
+     Canonical types are used to improve performance in the C++ and
+     Objective-C++ front ends by allowing efficient comparison between
+     two type nodes in `same_type_p': if the `TYPE_CANONICAL' values of
+     the types are equal, the types are equivalent; otherwise, the types
+     are not equivalent. The notion of equivalence for canonical types
+     is the same as the notion of type equivalence in the language
+     itself. For instance,
+
+     When `TYPE_CANONICAL' is `NULL_TREE', there is no canonical type
+     for the given type node. In this case, comparison between this
+     type and any other type requires the compiler to perform a deep,
+     "structural" comparison to see if the two type nodes have the same
+     form and properties.
+
+     The canonical type for a node is always the most fundamental type
+     in the equivalence class of types. For instance, `int' is its own
+     canonical type. A typedef `I' of `int' will have `int' as its
+     canonical type. Similarly, `I*' and a typedef `IP' (defined to
+     `I*') will has `int*' as their canonical type. When building a new
+     type node, be sure to set `TYPE_CANONICAL' to the appropriate
+     canonical type. If the new type is a compound type (built from
+     other types), and any of those other types require structural
+     equality, use `SET_TYPE_STRUCTURAL_EQUALITY' to ensure that the
+     new type also requires structural equality. Finally, if for some
+     reason you cannot guarantee that `TYPE_CANONICAL' will point to
+     the canonical type, use `SET_TYPE_STRUCTURAL_EQUALITY' to make
+     sure that the new type-and any type constructed based on
+     it-requires structural equality. If you suspect that the canonical
+     type system is miscomparing types, pass `--param
+     verify-canonical-types=1' to the compiler or configure with
+     `--enable-checking' to force the compiler to verify its
+     canonical-type comparisons against the structural comparisons; the
+     compiler will then print any warnings if the canonical types
+     miscompare.
+
+`TYPE_STRUCTURAL_EQUALITY_P'
+     This predicate holds when the node requires structural equality
+     checks, e.g., when `TYPE_CANONICAL' is `NULL_TREE'.
+
+`SET_TYPE_STRUCTURAL_EQUALITY'
+     This macro states that the type node it is given requires
+     structural equality checks, e.g., it sets `TYPE_CANONICAL' to
+     `NULL_TREE'.
+
+`same_type_p'
+     This predicate takes two types as input, and holds if they are the
+     same type.  For example, if one type is a `typedef' for the other,
+     or both are `typedef's for the same type.  This predicate also
+     holds if the two trees given as input are simply copies of one
+     another; i.e., there is no difference between them at the source
+     level, but, for whatever reason, a duplicate has been made in the
+     representation.  You should never use `==' (pointer equality) to
+     compare types; always use `same_type_p' instead.
+
+ Detailed below are the various kinds of types, and the macros that can
+be used to access them.  Although other kinds of types are used
+elsewhere in G++, the types described here are the only ones that you
+will encounter while examining the intermediate representation.
+
+`VOID_TYPE'
+     Used to represent the `void' type.
+
+`INTEGER_TYPE'
+     Used to represent the various integral types, including `char',
+     `short', `int', `long', and `long long'.  This code is not used
+     for enumeration types, nor for the `bool' type.  The
+     `TYPE_PRECISION' is the number of bits used in the representation,
+     represented as an `unsigned int'.  (Note that in the general case
+     this is not the same value as `TYPE_SIZE'; suppose that there were
+     a 24-bit integer type, but that alignment requirements for the ABI
+     required 32-bit alignment.  Then, `TYPE_SIZE' would be an
+     `INTEGER_CST' for 32, while `TYPE_PRECISION' would be 24.)  The
+     integer type is unsigned if `TYPE_UNSIGNED' holds; otherwise, it
+     is signed.
+
+     The `TYPE_MIN_VALUE' is an `INTEGER_CST' for the smallest integer
+     that may be represented by this type.  Similarly, the
+     `TYPE_MAX_VALUE' is an `INTEGER_CST' for the largest integer that
+     may be represented by this type.
+
+`REAL_TYPE'
+     Used to represent the `float', `double', and `long double' types.
+     The number of bits in the floating-point representation is given
+     by `TYPE_PRECISION', as in the `INTEGER_TYPE' case.
+
+`FIXED_POINT_TYPE'
+     Used to represent the `short _Fract', `_Fract', `long _Fract',
+     `long long _Fract', `short _Accum', `_Accum', `long _Accum', and
+     `long long _Accum' types.  The number of bits in the fixed-point
+     representation is given by `TYPE_PRECISION', as in the
+     `INTEGER_TYPE' case.  There may be padding bits, fractional bits
+     and integral bits.  The number of fractional bits is given by
+     `TYPE_FBIT', and the number of integral bits is given by
+     `TYPE_IBIT'.  The fixed-point type is unsigned if `TYPE_UNSIGNED'
+     holds; otherwise, it is signed.  The fixed-point type is
+     saturating if `TYPE_SATURATING' holds; otherwise, it is not
+     saturating.
+
+`COMPLEX_TYPE'
+     Used to represent GCC built-in `__complex__' data types.  The
+     `TREE_TYPE' is the type of the real and imaginary parts.
+
+`ENUMERAL_TYPE'
+     Used to represent an enumeration type.  The `TYPE_PRECISION' gives
+     (as an `int'), the number of bits used to represent the type.  If
+     there are no negative enumeration constants, `TYPE_UNSIGNED' will
+     hold.  The minimum and maximum enumeration constants may be
+     obtained with `TYPE_MIN_VALUE' and `TYPE_MAX_VALUE', respectively;
+     each of these macros returns an `INTEGER_CST'.
+
+     The actual enumeration constants themselves may be obtained by
+     looking at the `TYPE_VALUES'.  This macro will return a
+     `TREE_LIST', containing the constants.  The `TREE_PURPOSE' of each
+     node will be an `IDENTIFIER_NODE' giving the name of the constant;
+     the `TREE_VALUE' will be an `INTEGER_CST' giving the value
+     assigned to that constant.  These constants will appear in the
+     order in which they were declared.  The `TREE_TYPE' of each of
+     these constants will be the type of enumeration type itself.
+
+`BOOLEAN_TYPE'
+     Used to represent the `bool' type.
+
+`POINTER_TYPE'
+     Used to represent pointer types, and pointer to data member types.
+     The `TREE_TYPE' gives the type to which this type points.
+
+`REFERENCE_TYPE'
+     Used to represent reference types.  The `TREE_TYPE' gives the type
+     to which this type refers.
+
+`FUNCTION_TYPE'
+     Used to represent the type of non-member functions and of static
+     member functions.  The `TREE_TYPE' gives the return type of the
+     function.  The `TYPE_ARG_TYPES' are a `TREE_LIST' of the argument
+     types.  The `TREE_VALUE' of each node in this list is the type of
+     the corresponding argument; the `TREE_PURPOSE' is an expression
+     for the default argument value, if any.  If the last node in the
+     list is `void_list_node' (a `TREE_LIST' node whose `TREE_VALUE' is
+     the `void_type_node'), then functions of this type do not take
+     variable arguments.  Otherwise, they do take a variable number of
+     arguments.
+
+     Note that in C (but not in C++) a function declared like `void f()'
+     is an unprototyped function taking a variable number of arguments;
+     the `TYPE_ARG_TYPES' of such a function will be `NULL'.
+
+`METHOD_TYPE'
+     Used to represent the type of a non-static member function.  Like a
+     `FUNCTION_TYPE', the return type is given by the `TREE_TYPE'.  The
+     type of `*this', i.e., the class of which functions of this type
+     are a member, is given by the `TYPE_METHOD_BASETYPE'.  The
+     `TYPE_ARG_TYPES' is the parameter list, as for a `FUNCTION_TYPE',
+     and includes the `this' argument.
+
+`ARRAY_TYPE'
+     Used to represent array types.  The `TREE_TYPE' gives the type of
+     the elements in the array.  If the array-bound is present in the
+     type, the `TYPE_DOMAIN' is an `INTEGER_TYPE' whose
+     `TYPE_MIN_VALUE' and `TYPE_MAX_VALUE' will be the lower and upper
+     bounds of the array, respectively.  The `TYPE_MIN_VALUE' will
+     always be an `INTEGER_CST' for zero, while the `TYPE_MAX_VALUE'
+     will be one less than the number of elements in the array, i.e.,
+     the highest value which may be used to index an element in the
+     array.
+
+`RECORD_TYPE'
+     Used to represent `struct' and `class' types, as well as pointers
+     to member functions and similar constructs in other languages.
+     `TYPE_FIELDS' contains the items contained in this type, each of
+     which can be a `FIELD_DECL', `VAR_DECL', `CONST_DECL', or
+     `TYPE_DECL'.  You may not make any assumptions about the ordering
+     of the fields in the type or whether one or more of them overlap.
+
+`UNION_TYPE'
+     Used to represent `union' types.  Similar to `RECORD_TYPE' except
+     that all `FIELD_DECL' nodes in `TYPE_FIELD' start at bit position
+     zero.
+
+`QUAL_UNION_TYPE'
+     Used to represent part of a variant record in Ada.  Similar to
+     `UNION_TYPE' except that each `FIELD_DECL' has a `DECL_QUALIFIER'
+     field, which contains a boolean expression that indicates whether
+     the field is present in the object.  The type will only have one
+     field, so each field's `DECL_QUALIFIER' is only evaluated if none
+     of the expressions in the previous fields in `TYPE_FIELDS' are
+     nonzero.  Normally these expressions will reference a field in the
+     outer object using a `PLACEHOLDER_EXPR'.
+
+`LANG_TYPE'
+     This node is used to represent a language-specific type.  The front
+     end must handle it.
+
+`OFFSET_TYPE'
+     This node is used to represent a pointer-to-data member.  For a
+     data member `X::m' the `TYPE_OFFSET_BASETYPE' is `X' and the
+     `TREE_TYPE' is the type of `m'.
+
+
+ There are variables whose values represent some of the basic types.
+These include:
+`void_type_node'
+     A node for `void'.
+
+`integer_type_node'
+     A node for `int'.
+
+`unsigned_type_node.'
+     A node for `unsigned int'.
+
+`char_type_node.'
+     A node for `char'.
+ It may sometimes be useful to compare one of these variables with a
+type in hand, using `same_type_p'.
+
+
+File: gccint.info,  Node: Declarations,  Next: Attributes,  Prev: Types,  Up: GENERIC
+
+11.4 Declarations
+=================
+
+This section covers the various kinds of declarations that appear in the
+internal representation, except for declarations of functions
+(represented by `FUNCTION_DECL' nodes), which are described in *note
+Functions::.
+
+* Menu:
+
+* Working with declarations::  Macros and functions that work on
+declarations.
+* Internal structure:: How declaration nodes are represented.
+
+
+File: gccint.info,  Node: Working with declarations,  Next: Internal structure,  Up: Declarations
+
+11.4.1 Working with declarations
+--------------------------------
+
+Some macros can be used with any kind of declaration.  These include:
+`DECL_NAME'
+     This macro returns an `IDENTIFIER_NODE' giving the name of the
+     entity.
+
+`TREE_TYPE'
+     This macro returns the type of the entity declared.
+
+`EXPR_FILENAME'
+     This macro returns the name of the file in which the entity was
+     declared, as a `char*'.  For an entity declared implicitly by the
+     compiler (like `__builtin_memcpy'), this will be the string
+     `"<internal>"'.
+
+`EXPR_LINENO'
+     This macro returns the line number at which the entity was
+     declared, as an `int'.
+
+`DECL_ARTIFICIAL'
+     This predicate holds if the declaration was implicitly generated
+     by the compiler.  For example, this predicate will hold of an
+     implicitly declared member function, or of the `TYPE_DECL'
+     implicitly generated for a class type.  Recall that in C++ code
+     like:
+          struct S {};
+     is roughly equivalent to C code like:
+          struct S {};
+          typedef struct S S;
+     The implicitly generated `typedef' declaration is represented by a
+     `TYPE_DECL' for which `DECL_ARTIFICIAL' holds.
+
+
+ The various kinds of declarations include:
+`LABEL_DECL'
+     These nodes are used to represent labels in function bodies.  For
+     more information, see *note Functions::.  These nodes only appear
+     in block scopes.
+
+`CONST_DECL'
+     These nodes are used to represent enumeration constants.  The
+     value of the constant is given by `DECL_INITIAL' which will be an
+     `INTEGER_CST' with the same type as the `TREE_TYPE' of the
+     `CONST_DECL', i.e., an `ENUMERAL_TYPE'.
+
+`RESULT_DECL'
+     These nodes represent the value returned by a function.  When a
+     value is assigned to a `RESULT_DECL', that indicates that the
+     value should be returned, via bitwise copy, by the function.  You
+     can use `DECL_SIZE' and `DECL_ALIGN' on a `RESULT_DECL', just as
+     with a `VAR_DECL'.
+
+`TYPE_DECL'
+     These nodes represent `typedef' declarations.  The `TREE_TYPE' is
+     the type declared to have the name given by `DECL_NAME'.  In some
+     cases, there is no associated name.
+
+`VAR_DECL'
+     These nodes represent variables with namespace or block scope, as
+     well as static data members.  The `DECL_SIZE' and `DECL_ALIGN' are
+     analogous to `TYPE_SIZE' and `TYPE_ALIGN'.  For a declaration, you
+     should always use the `DECL_SIZE' and `DECL_ALIGN' rather than the
+     `TYPE_SIZE' and `TYPE_ALIGN' given by the `TREE_TYPE', since
+     special attributes may have been applied to the variable to give
+     it a particular size and alignment.  You may use the predicates
+     `DECL_THIS_STATIC' or `DECL_THIS_EXTERN' to test whether the
+     storage class specifiers `static' or `extern' were used to declare
+     a variable.
+
+     If this variable is initialized (but does not require a
+     constructor), the `DECL_INITIAL' will be an expression for the
+     initializer.  The initializer should be evaluated, and a bitwise
+     copy into the variable performed.  If the `DECL_INITIAL' is the
+     `error_mark_node', there is an initializer, but it is given by an
+     explicit statement later in the code; no bitwise copy is required.
+
+     GCC provides an extension that allows either automatic variables,
+     or global variables, to be placed in particular registers.  This
+     extension is being used for a particular `VAR_DECL' if
+     `DECL_REGISTER' holds for the `VAR_DECL', and if
+     `DECL_ASSEMBLER_NAME' is not equal to `DECL_NAME'.  In that case,
+     `DECL_ASSEMBLER_NAME' is the name of the register into which the
+     variable will be placed.
+
+`PARM_DECL'
+     Used to represent a parameter to a function.  Treat these nodes
+     similarly to `VAR_DECL' nodes.  These nodes only appear in the
+     `DECL_ARGUMENTS' for a `FUNCTION_DECL'.
+
+     The `DECL_ARG_TYPE' for a `PARM_DECL' is the type that will
+     actually be used when a value is passed to this function.  It may
+     be a wider type than the `TREE_TYPE' of the parameter; for
+     example, the ordinary type might be `short' while the
+     `DECL_ARG_TYPE' is `int'.
+
+`DEBUG_EXPR_DECL'
+     Used to represent an anonymous debug-information temporary created
+     to hold an expression as it is optimized away, so that its value
+     can be referenced in debug bind statements.
+
+`FIELD_DECL'
+     These nodes represent non-static data members.  The `DECL_SIZE' and
+     `DECL_ALIGN' behave as for `VAR_DECL' nodes.  The position of the
+     field within the parent record is specified by a combination of
+     three attributes.  `DECL_FIELD_OFFSET' is the position, counting
+     in bytes, of the `DECL_OFFSET_ALIGN'-bit sized word containing the
+     bit of the field closest to the beginning of the structure.
+     `DECL_FIELD_BIT_OFFSET' is the bit offset of the first bit of the
+     field within this word; this may be nonzero even for fields that
+     are not bit-fields, since `DECL_OFFSET_ALIGN' may be greater than
+     the natural alignment of the field's type.
+
+     If `DECL_C_BIT_FIELD' holds, this field is a bit-field.  In a
+     bit-field, `DECL_BIT_FIELD_TYPE' also contains the type that was
+     originally specified for it, while DECL_TYPE may be a modified
+     type with lesser precision, according to the size of the bit field.
+
+`NAMESPACE_DECL'
+     Namespaces provide a name hierarchy for other declarations.  They
+     appear in the `DECL_CONTEXT' of other `_DECL' nodes.
+
+
+
+File: gccint.info,  Node: Internal structure,  Prev: Working with declarations,  Up: Declarations
+
+11.4.2 Internal structure
+-------------------------
+
+`DECL' nodes are represented internally as a hierarchy of structures.
+
+* Menu:
+
+* Current structure hierarchy::  The current DECL node structure
+hierarchy.
+* Adding new DECL node types:: How to add a new DECL node to a
+frontend.
+
+
+File: gccint.info,  Node: Current structure hierarchy,  Next: Adding new DECL node types,  Up: Internal structure
+
+11.4.2.1 Current structure hierarchy
+....................................
+
+`struct tree_decl_minimal'
+     This is the minimal structure to inherit from in order for common
+     `DECL' macros to work.  The fields it contains are a unique ID,
+     source location, context, and name.
+
+`struct tree_decl_common'
+     This structure inherits from `struct tree_decl_minimal'.  It
+     contains fields that most `DECL' nodes need, such as a field to
+     store alignment, machine mode, size, and attributes.
+
+`struct tree_field_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `FIELD_DECL'.
+
+`struct tree_label_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `LABEL_DECL'.
+
+`struct tree_translation_unit_decl'
+     This structure inherits from `struct tree_decl_common'.  It is
+     used to represent `TRANSLATION_UNIT_DECL'.
+
+`struct tree_decl_with_rtl'
+     This structure inherits from `struct tree_decl_common'.  It
+     contains a field to store the low-level RTL associated with a
+     `DECL' node.
+
+`struct tree_result_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `RESULT_DECL'.
+
+`struct tree_const_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `CONST_DECL'.
+
+`struct tree_parm_decl'
+     This structure inherits from `struct tree_decl_with_rtl'.  It is
+     used to represent `PARM_DECL'.
+
+`struct tree_decl_with_vis'
+     This structure inherits from `struct tree_decl_with_rtl'.  It
+     contains fields necessary to store visibility information, as well
+     as a section name and assembler name.
+
+`struct tree_var_decl'
+     This structure inherits from `struct tree_decl_with_vis'.  It is
+     used to represent `VAR_DECL'.
+
+`struct tree_function_decl'
+     This structure inherits from `struct tree_decl_with_vis'.  It is
+     used to represent `FUNCTION_DECL'.
+
+
+
+File: gccint.info,  Node: Adding new DECL node types,  Prev: Current structure hierarchy,  Up: Internal structure
+
+11.4.2.2 Adding new DECL node types
+...................................
+
+Adding a new `DECL' tree consists of the following steps
+
+Add a new tree code for the `DECL' node
+     For language specific `DECL' nodes, there is a `.def' file in each
+     frontend directory where the tree code should be added.  For
+     `DECL' nodes that are part of the middle-end, the code should be
+     added to `tree.def'.
+
+Create a new structure type for the `DECL' node
+     These structures should inherit from one of the existing
+     structures in the language hierarchy by using that structure as
+     the first member.
+
+          struct tree_foo_decl
+          {
+             struct tree_decl_with_vis common;
+          }
+
+     Would create a structure name `tree_foo_decl' that inherits from
+     `struct tree_decl_with_vis'.
+
+     For language specific `DECL' nodes, this new structure type should
+     go in the appropriate `.h' file.  For `DECL' nodes that are part
+     of the middle-end, the structure type should go in `tree.h'.
+
+Add a member to the tree structure enumerator for the node
+     For garbage collection and dynamic checking purposes, each `DECL'
+     node structure type is required to have a unique enumerator value
+     specified with it.  For language specific `DECL' nodes, this new
+     enumerator value should go in the appropriate `.def' file.  For
+     `DECL' nodes that are part of the middle-end, the enumerator
+     values are specified in `treestruct.def'.
+
+Update `union tree_node'
+     In order to make your new structure type usable, it must be added
+     to `union tree_node'.  For language specific `DECL' nodes, a new
+     entry should be added to the appropriate `.h' file of the form
+            struct tree_foo_decl GTY ((tag ("TS_VAR_DECL"))) foo_decl;
+     For `DECL' nodes that are part of the middle-end, the additional
+     member goes directly into `union tree_node' in `tree.h'.
+
+Update dynamic checking info
+     In order to be able to check whether accessing a named portion of
+     `union tree_node' is legal, and whether a certain `DECL' node
+     contains one of the enumerated `DECL' node structures in the
+     hierarchy, a simple lookup table is used.  This lookup table needs
+     to be kept up to date with the tree structure hierarchy, or else
+     checking and containment macros will fail inappropriately.
+
+     For language specific `DECL' nodes, their is an `init_ts' function
+     in an appropriate `.c' file, which initializes the lookup table.
+     Code setting up the table for new `DECL' nodes should be added
+     there.  For each `DECL' tree code and enumerator value
+     representing a member of the inheritance  hierarchy, the table
+     should contain 1 if that tree code inherits (directly or
+     indirectly) from that member.  Thus, a `FOO_DECL' node derived
+     from `struct decl_with_rtl', and enumerator value `TS_FOO_DECL',
+     would be set up as follows
+          tree_contains_struct[FOO_DECL][TS_FOO_DECL] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_WRTL] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_COMMON] = 1;
+          tree_contains_struct[FOO_DECL][TS_DECL_MINIMAL] = 1;
+
+     For `DECL' nodes that are part of the middle-end, the setup code
+     goes into `tree.c'.
+
+Add macros to access any new fields and flags
+     Each added field or flag should have a macro that is used to access
+     it, that performs appropriate checking to ensure only the right
+     type of `DECL' nodes access the field.
+
+     These macros generally take the following form
+          #define FOO_DECL_FIELDNAME(NODE) FOO_DECL_CHECK(NODE)->foo_decl.fieldname
+     However, if the structure is simply a base class for further
+     structures, something like the following should be used
+          #define BASE_STRUCT_CHECK(T) CONTAINS_STRUCT_CHECK(T, TS_BASE_STRUCT)
+          #define BASE_STRUCT_FIELDNAME(NODE) \
+             (BASE_STRUCT_CHECK(NODE)->base_struct.fieldname
+
+
+
+File: gccint.info,  Node: Attributes,  Next: Expression trees,  Prev: Declarations,  Up: GENERIC
+
+11.5 Attributes in trees
+========================
+
+Attributes, as specified using the `__attribute__' keyword, are
+represented internally as a `TREE_LIST'.  The `TREE_PURPOSE' is the
+name of the attribute, as an `IDENTIFIER_NODE'.  The `TREE_VALUE' is a
+`TREE_LIST' of the arguments of the attribute, if any, or `NULL_TREE'
+if there are no arguments; the arguments are stored as the `TREE_VALUE'
+of successive entries in the list, and may be identifiers or
+expressions.  The `TREE_CHAIN' of the attribute is the next attribute
+in a list of attributes applying to the same declaration or type, or
+`NULL_TREE' if there are no further attributes in the list.
+
+ Attributes may be attached to declarations and to types; these
+attributes may be accessed with the following macros.  All attributes
+are stored in this way, and many also cause other changes to the
+declaration or type or to other internal compiler data structures.
+
+ -- Tree Macro: tree DECL_ATTRIBUTES (tree DECL)
+     This macro returns the attributes on the declaration DECL.
+
+ -- Tree Macro: tree TYPE_ATTRIBUTES (tree TYPE)
+     This macro returns the attributes on the type TYPE.
+
+
+File: gccint.info,  Node: Expression trees,  Next: Statements,  Prev: Attributes,  Up: GENERIC
+
+11.6 Expressions
+================
+
+The internal representation for expressions is for the most part quite
+straightforward.  However, there are a few facts that one must bear in
+mind.  In particular, the expression "tree" is actually a directed
+acyclic graph.  (For example there may be many references to the integer
+constant zero throughout the source program; many of these will be
+represented by the same expression node.)  You should not rely on
+certain kinds of node being shared, nor should you rely on certain
+kinds of nodes being unshared.
+
+ The following macros can be used with all expression nodes:
+
+`TREE_TYPE'
+     Returns the type of the expression.  This value may not be
+     precisely the same type that would be given the expression in the
+     original program.
+
+ In what follows, some nodes that one might expect to always have type
+`bool' are documented to have either integral or boolean type.  At some
+point in the future, the C front end may also make use of this same
+intermediate representation, and at this point these nodes will
+certainly have integral type.  The previous sentence is not meant to
+imply that the C++ front end does not or will not give these nodes
+integral type.
+
+ Below, we list the various kinds of expression nodes.  Except where
+noted otherwise, the operands to an expression are accessed using the
+`TREE_OPERAND' macro.  For example, to access the first operand to a
+binary plus expression `expr', use:
+
+     TREE_OPERAND (expr, 0)
+ As this example indicates, the operands are zero-indexed.
+
+* Menu:
+
+* Constants: Constant expressions.
+* Storage References::
+* Unary and Binary Expressions::
+* Vectors::
+
+
+File: gccint.info,  Node: Constant expressions,  Next: Storage References,  Up: Expression trees
+
+11.6.1 Constant expressions
+---------------------------
+
+The table below begins with constants, moves on to unary expressions,
+then proceeds to binary expressions, and concludes with various other
+kinds of expressions:
+
+`INTEGER_CST'
+     These nodes represent integer constants.  Note that the type of
+     these constants is obtained with `TREE_TYPE'; they are not always
+     of type `int'.  In particular, `char' constants are represented
+     with `INTEGER_CST' nodes.  The value of the integer constant `e' is
+     given by
+          ((TREE_INT_CST_HIGH (e) << HOST_BITS_PER_WIDE_INT)
+          + TREE_INST_CST_LOW (e))
+     HOST_BITS_PER_WIDE_INT is at least thirty-two on all platforms.
+     Both `TREE_INT_CST_HIGH' and `TREE_INT_CST_LOW' return a
+     `HOST_WIDE_INT'.  The value of an `INTEGER_CST' is interpreted as
+     a signed or unsigned quantity depending on the type of the
+     constant.  In general, the expression given above will overflow,
+     so it should not be used to calculate the value of the constant.
+
+     The variable `integer_zero_node' is an integer constant with value
+     zero.  Similarly, `integer_one_node' is an integer constant with
+     value one.  The `size_zero_node' and `size_one_node' variables are
+     analogous, but have type `size_t' rather than `int'.
+
+     The function `tree_int_cst_lt' is a predicate which holds if its
+     first argument is less than its second.  Both constants are
+     assumed to have the same signedness (i.e., either both should be
+     signed or both should be unsigned.)  The full width of the
+     constant is used when doing the comparison; the usual rules about
+     promotions and conversions are ignored.  Similarly,
+     `tree_int_cst_equal' holds if the two constants are equal.  The
+     `tree_int_cst_sgn' function returns the sign of a constant.  The
+     value is `1', `0', or `-1' according on whether the constant is
+     greater than, equal to, or less than zero.  Again, the signedness
+     of the constant's type is taken into account; an unsigned constant
+     is never less than zero, no matter what its bit-pattern.
+
+`REAL_CST'
+     FIXME: Talk about how to obtain representations of this constant,
+     do comparisons, and so forth.
+
+`FIXED_CST'
+     These nodes represent fixed-point constants.  The type of these
+     constants is obtained with `TREE_TYPE'.  `TREE_FIXED_CST_PTR'
+     points to a `struct fixed_value';  `TREE_FIXED_CST' returns the
+     structure itself.  `struct fixed_value' contains `data' with the
+     size of two `HOST_BITS_PER_WIDE_INT' and `mode' as the associated
+     fixed-point machine mode for `data'.
+
+`COMPLEX_CST'
+     These nodes are used to represent complex number constants, that
+     is a `__complex__' whose parts are constant nodes.  The
+     `TREE_REALPART' and `TREE_IMAGPART' return the real and the
+     imaginary parts respectively.
+
+`VECTOR_CST'
+     These nodes are used to represent vector constants, whose parts are
+     constant nodes.  Each individual constant node is either an
+     integer or a double constant node.  The first operand is a
+     `TREE_LIST' of the constant nodes and is accessed through
+     `TREE_VECTOR_CST_ELTS'.
+
+`STRING_CST'
+     These nodes represent string-constants.  The `TREE_STRING_LENGTH'
+     returns the length of the string, as an `int'.  The
+     `TREE_STRING_POINTER' is a `char*' containing the string itself.
+     The string may not be `NUL'-terminated, and it may contain
+     embedded `NUL' characters.  Therefore, the `TREE_STRING_LENGTH'
+     includes the trailing `NUL' if it is present.
+
+     For wide string constants, the `TREE_STRING_LENGTH' is the number
+     of bytes in the string, and the `TREE_STRING_POINTER' points to an
+     array of the bytes of the string, as represented on the target
+     system (that is, as integers in the target endianness).  Wide and
+     non-wide string constants are distinguished only by the `TREE_TYPE'
+     of the `STRING_CST'.
+
+     FIXME: The formats of string constants are not well-defined when
+     the target system bytes are not the same width as host system
+     bytes.
+
+
+
+File: gccint.info,  Node: Storage References,  Next: Unary and Binary Expressions,  Prev: Constant expressions,  Up: Expression trees
+
+11.6.2 References to storage
+----------------------------
+
+`ARRAY_REF'
+     These nodes represent array accesses.  The first operand is the
+     array; the second is the index.  To calculate the address of the
+     memory accessed, you must scale the index by the size of the type
+     of the array elements.  The type of these expressions must be the
+     type of a component of the array.  The third and fourth operands
+     are used after gimplification to represent the lower bound and
+     component size but should not be used directly; call
+     `array_ref_low_bound' and `array_ref_element_size' instead.
+
+`ARRAY_RANGE_REF'
+     These nodes represent access to a range (or "slice") of an array.
+     The operands are the same as that for `ARRAY_REF' and have the same
+     meanings.  The type of these expressions must be an array whose
+     component type is the same as that of the first operand.  The
+     range of that array type determines the amount of data these
+     expressions access.
+
+`TARGET_MEM_REF'
+     These nodes represent memory accesses whose address directly map to
+     an addressing mode of the target architecture.  The first argument
+     is `TMR_SYMBOL' and must be a `VAR_DECL' of an object with a fixed
+     address.  The second argument is `TMR_BASE' and the third one is
+     `TMR_INDEX'.  The fourth argument is `TMR_STEP' and must be an
+     `INTEGER_CST'.  The fifth argument is `TMR_OFFSET' and must be an
+     `INTEGER_CST'.  Any of the arguments may be NULL if the
+     appropriate component does not appear in the address.  Address of
+     the `TARGET_MEM_REF' is determined in the following way.
+
+          &TMR_SYMBOL + TMR_BASE + TMR_INDEX * TMR_STEP + TMR_OFFSET
+
+     The sixth argument is the reference to the original memory access,
+     which is preserved for the purposes of the RTL alias analysis.
+     The seventh argument is a tag representing the results of tree
+     level alias analysis.
+
+`ADDR_EXPR'
+     These nodes are used to represent the address of an object.  (These
+     expressions will always have pointer or reference type.)  The
+     operand may be another expression, or it may be a declaration.
+
+     As an extension, GCC allows users to take the address of a label.
+     In this case, the operand of the `ADDR_EXPR' will be a
+     `LABEL_DECL'.  The type of such an expression is `void*'.
+
+     If the object addressed is not an lvalue, a temporary is created,
+     and the address of the temporary is used.
+
+`INDIRECT_REF'
+     These nodes are used to represent the object pointed to by a
+     pointer.  The operand is the pointer being dereferenced; it will
+     always have pointer or reference type.
+
+`COMPONENT_REF'
+     These nodes represent non-static data member accesses.  The first
+     operand is the object (rather than a pointer to it); the second
+     operand is the `FIELD_DECL' for the data member.  The third
+     operand represents the byte offset of the field, but should not be
+     used directly; call `component_ref_field_offset' instead.
+
+
+
+File: gccint.info,  Node: Unary and Binary Expressions,  Next: Vectors,  Prev: Storage References,  Up: Expression trees
+
+11.6.3 Unary and Binary Expressions
+-----------------------------------
+
+`NEGATE_EXPR'
+     These nodes represent unary negation of the single operand, for
+     both integer and floating-point types.  The type of negation can be
+     determined by looking at the type of the expression.
+
+     The behavior of this operation on signed arithmetic overflow is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`ABS_EXPR'
+     These nodes represent the absolute value of the single operand, for
+     both integer and floating-point types.  This is typically used to
+     implement the `abs', `labs' and `llabs' builtins for integer
+     types, and the `fabs', `fabsf' and `fabsl' builtins for floating
+     point types.  The type of abs operation can be determined by
+     looking at the type of the expression.
+
+     This node is not used for complex types.  To represent the modulus
+     or complex abs of a complex value, use the `BUILT_IN_CABS',
+     `BUILT_IN_CABSF' or `BUILT_IN_CABSL' builtins, as used to
+     implement the C99 `cabs', `cabsf' and `cabsl' built-in functions.
+
+`BIT_NOT_EXPR'
+     These nodes represent bitwise complement, and will always have
+     integral type.  The only operand is the value to be complemented.
+
+`TRUTH_NOT_EXPR'
+     These nodes represent logical negation, and will always have
+     integral (or boolean) type.  The operand is the value being
+     negated.  The type of the operand and that of the result are
+     always of `BOOLEAN_TYPE' or `INTEGER_TYPE'.
+
+`PREDECREMENT_EXPR'
+`PREINCREMENT_EXPR'
+`POSTDECREMENT_EXPR'
+`POSTINCREMENT_EXPR'
+     These nodes represent increment and decrement expressions.  The
+     value of the single operand is computed, and the operand
+     incremented or decremented.  In the case of `PREDECREMENT_EXPR' and
+     `PREINCREMENT_EXPR', the value of the expression is the value
+     resulting after the increment or decrement; in the case of
+     `POSTDECREMENT_EXPR' and `POSTINCREMENT_EXPR' is the value before
+     the increment or decrement occurs.  The type of the operand, like
+     that of the result, will be either integral, boolean, or
+     floating-point.
+
+`FIX_TRUNC_EXPR'
+     These nodes represent conversion of a floating-point value to an
+     integer.  The single operand will have a floating-point type, while
+     the complete expression will have an integral (or boolean) type.
+     The operand is rounded towards zero.
+
+`FLOAT_EXPR'
+     These nodes represent conversion of an integral (or boolean) value
+     to a floating-point value.  The single operand will have integral
+     type, while the complete expression will have a floating-point
+     type.
+
+     FIXME: How is the operand supposed to be rounded?  Is this
+     dependent on `-mieee'?
+
+`COMPLEX_EXPR'
+     These nodes are used to represent complex numbers constructed from
+     two expressions of the same (integer or real) type.  The first
+     operand is the real part and the second operand is the imaginary
+     part.
+
+`CONJ_EXPR'
+     These nodes represent the conjugate of their operand.
+
+`REALPART_EXPR'
+`IMAGPART_EXPR'
+     These nodes represent respectively the real and the imaginary parts
+     of complex numbers (their sole argument).
+
+`NON_LVALUE_EXPR'
+     These nodes indicate that their one and only operand is not an
+     lvalue.  A back end can treat these identically to the single
+     operand.
+
+`NOP_EXPR'
+     These nodes are used to represent conversions that do not require
+     any code-generation.  For example, conversion of a `char*' to an
+     `int*' does not require any code be generated; such a conversion is
+     represented by a `NOP_EXPR'.  The single operand is the expression
+     to be converted.  The conversion from a pointer to a reference is
+     also represented with a `NOP_EXPR'.
+
+`CONVERT_EXPR'
+     These nodes are similar to `NOP_EXPR's, but are used in those
+     situations where code may need to be generated.  For example, if an
+     `int*' is converted to an `int' code may need to be generated on
+     some platforms.  These nodes are never used for C++-specific
+     conversions, like conversions between pointers to different
+     classes in an inheritance hierarchy.  Any adjustments that need to
+     be made in such cases are always indicated explicitly.  Similarly,
+     a user-defined conversion is never represented by a
+     `CONVERT_EXPR'; instead, the function calls are made explicit.
+
+`FIXED_CONVERT_EXPR'
+     These nodes are used to represent conversions that involve
+     fixed-point values.  For example, from a fixed-point value to
+     another fixed-point value, from an integer to a fixed-point value,
+     from a fixed-point value to an integer, from a floating-point
+     value to a fixed-point value, or from a fixed-point value to a
+     floating-point value.
+
+`LSHIFT_EXPR'
+`RSHIFT_EXPR'
+     These nodes represent left and right shifts, respectively.  The
+     first operand is the value to shift; it will always be of integral
+     type.  The second operand is an expression for the number of bits
+     by which to shift.  Right shift should be treated as arithmetic,
+     i.e., the high-order bits should be zero-filled when the
+     expression has unsigned type and filled with the sign bit when the
+     expression has signed type.  Note that the result is undefined if
+     the second operand is larger than or equal to the first operand's
+     type size.
+
+`BIT_IOR_EXPR'
+`BIT_XOR_EXPR'
+`BIT_AND_EXPR'
+     These nodes represent bitwise inclusive or, bitwise exclusive or,
+     and bitwise and, respectively.  Both operands will always have
+     integral type.
+
+`TRUTH_ANDIF_EXPR'
+`TRUTH_ORIF_EXPR'
+     These nodes represent logical "and" and logical "or", respectively.
+     These operators are not strict; i.e., the second operand is
+     evaluated only if the value of the expression is not determined by
+     evaluation of the first operand.  The type of the operands and
+     that of the result are always of `BOOLEAN_TYPE' or `INTEGER_TYPE'.
+
+`TRUTH_AND_EXPR'
+`TRUTH_OR_EXPR'
+`TRUTH_XOR_EXPR'
+     These nodes represent logical and, logical or, and logical
+     exclusive or.  They are strict; both arguments are always
+     evaluated.  There are no corresponding operators in C or C++, but
+     the front end will sometimes generate these expressions anyhow, if
+     it can tell that strictness does not matter.  The type of the
+     operands and that of the result are always of `BOOLEAN_TYPE' or
+     `INTEGER_TYPE'.
+
+`POINTER_PLUS_EXPR'
+     This node represents pointer arithmetic.  The first operand is
+     always a pointer/reference type.  The second operand is always an
+     unsigned integer type compatible with sizetype.  This is the only
+     binary arithmetic operand that can operate on pointer types.
+
+`PLUS_EXPR'
+`MINUS_EXPR'
+`MULT_EXPR'
+     These nodes represent various binary arithmetic operations.
+     Respectively, these operations are addition, subtraction (of the
+     second operand from the first) and multiplication.  Their operands
+     may have either integral or floating type, but there will never be
+     case in which one operand is of floating type and the other is of
+     integral type.
+
+     The behavior of these operations on signed arithmetic overflow is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`RDIV_EXPR'
+     This node represents a floating point division operation.
+
+`TRUNC_DIV_EXPR'
+`FLOOR_DIV_EXPR'
+`CEIL_DIV_EXPR'
+`ROUND_DIV_EXPR'
+     These nodes represent integer division operations that return an
+     integer result.  `TRUNC_DIV_EXPR' rounds towards zero,
+     `FLOOR_DIV_EXPR' rounds towards negative infinity, `CEIL_DIV_EXPR'
+     rounds towards positive infinity and `ROUND_DIV_EXPR' rounds to
+     the closest integer.  Integer division in C and C++ is truncating,
+     i.e. `TRUNC_DIV_EXPR'.
+
+     The behavior of these operations on signed arithmetic overflow,
+     when dividing the minimum signed integer by minus one, is
+     controlled by the `flag_wrapv' and `flag_trapv' variables.
+
+`TRUNC_MOD_EXPR'
+`FLOOR_MOD_EXPR'
+`CEIL_MOD_EXPR'
+`ROUND_MOD_EXPR'
+     These nodes represent the integer remainder or modulus operation.
+     The integer modulus of two operands `a' and `b' is defined as `a -
+     (a/b)*b' where the division calculated using the corresponding
+     division operator.  Hence for `TRUNC_MOD_EXPR' this definition
+     assumes division using truncation towards zero, i.e.
+     `TRUNC_DIV_EXPR'.  Integer remainder in C and C++ uses truncating
+     division, i.e. `TRUNC_MOD_EXPR'.
+
+`EXACT_DIV_EXPR'
+     The `EXACT_DIV_EXPR' code is used to represent integer divisions
+     where the numerator is known to be an exact multiple of the
+     denominator.  This allows the backend to choose between the faster
+     of `TRUNC_DIV_EXPR', `CEIL_DIV_EXPR' and `FLOOR_DIV_EXPR' for the
+     current target.
+
+`LT_EXPR'
+`LE_EXPR'
+`GT_EXPR'
+`GE_EXPR'
+`EQ_EXPR'
+`NE_EXPR'
+     These nodes represent the less than, less than or equal to, greater
+     than, greater than or equal to, equal, and not equal comparison
+     operators.  The first and second operand with either be both of
+     integral type or both of floating type.  The result type of these
+     expressions will always be of integral or boolean type.  These
+     operations return the result type's zero value for false, and the
+     result type's one value for true.
+
+     For floating point comparisons, if we honor IEEE NaNs and either
+     operand is NaN, then `NE_EXPR' always returns true and the
+     remaining operators always return false.  On some targets,
+     comparisons against an IEEE NaN, other than equality and
+     inequality, may generate a floating point exception.
+
+`ORDERED_EXPR'
+`UNORDERED_EXPR'
+     These nodes represent non-trapping ordered and unordered comparison
+     operators.  These operations take two floating point operands and
+     determine whether they are ordered or unordered relative to each
+     other.  If either operand is an IEEE NaN, their comparison is
+     defined to be unordered, otherwise the comparison is defined to be
+     ordered.  The result type of these expressions will always be of
+     integral or boolean type.  These operations return the result
+     type's zero value for false, and the result type's one value for
+     true.
+
+`UNLT_EXPR'
+`UNLE_EXPR'
+`UNGT_EXPR'
+`UNGE_EXPR'
+`UNEQ_EXPR'
+`LTGT_EXPR'
+     These nodes represent the unordered comparison operators.  These
+     operations take two floating point operands and determine whether
+     the operands are unordered or are less than, less than or equal to,
+     greater than, greater than or equal to, or equal respectively.  For
+     example, `UNLT_EXPR' returns true if either operand is an IEEE NaN
+     or the first operand is less than the second.  With the possible
+     exception of `LTGT_EXPR', all of these operations are guaranteed
+     not to generate a floating point exception.  The result type of
+     these expressions will always be of integral or boolean type.
+     These operations return the result type's zero value for false,
+     and the result type's one value for true.
+
+`MODIFY_EXPR'
+     These nodes represent assignment.  The left-hand side is the first
+     operand; the right-hand side is the second operand.  The left-hand
+     side will be a `VAR_DECL', `INDIRECT_REF', `COMPONENT_REF', or
+     other lvalue.
+
+     These nodes are used to represent not only assignment with `=' but
+     also compound assignments (like `+='), by reduction to `='
+     assignment.  In other words, the representation for `i += 3' looks
+     just like that for `i = i + 3'.
+
+`INIT_EXPR'
+     These nodes are just like `MODIFY_EXPR', but are used only when a
+     variable is initialized, rather than assigned to subsequently.
+     This means that we can assume that the target of the
+     initialization is not used in computing its own value; any
+     reference to the lhs in computing the rhs is undefined.
+
+`COMPOUND_EXPR'
+     These nodes represent comma-expressions.  The first operand is an
+     expression whose value is computed and thrown away prior to the
+     evaluation of the second operand.  The value of the entire
+     expression is the value of the second operand.
+
+`COND_EXPR'
+     These nodes represent `?:' expressions.  The first operand is of
+     boolean or integral type.  If it evaluates to a nonzero value, the
+     second operand should be evaluated, and returned as the value of
+     the expression.  Otherwise, the third operand is evaluated, and
+     returned as the value of the expression.
+
+     The second operand must have the same type as the entire
+     expression, unless it unconditionally throws an exception or calls
+     a noreturn function, in which case it should have void type.  The
+     same constraints apply to the third operand.  This allows array
+     bounds checks to be represented conveniently as `(i >= 0 && i <
+     10) ? i : abort()'.
+
+     As a GNU extension, the C language front-ends allow the second
+     operand of the `?:' operator may be omitted in the source.  For
+     example, `x ? : 3' is equivalent to `x ? x : 3', assuming that `x'
+     is an expression without side-effects.  In the tree
+     representation, however, the second operand is always present,
+     possibly protected by `SAVE_EXPR' if the first argument does cause
+     side-effects.
+
+`CALL_EXPR'
+     These nodes are used to represent calls to functions, including
+     non-static member functions.  `CALL_EXPR's are implemented as
+     expression nodes with a variable number of operands.  Rather than
+     using `TREE_OPERAND' to extract them, it is preferable to use the
+     specialized accessor macros and functions that operate
+     specifically on `CALL_EXPR' nodes.
+
+     `CALL_EXPR_FN' returns a pointer to the function to call; it is
+     always an expression whose type is a `POINTER_TYPE'.
+
+     The number of arguments to the call is returned by
+     `call_expr_nargs', while the arguments themselves can be accessed
+     with the `CALL_EXPR_ARG' macro.  The arguments are zero-indexed
+     and numbered left-to-right.  You can iterate over the arguments
+     using `FOR_EACH_CALL_EXPR_ARG', as in:
+
+          tree call, arg;
+          call_expr_arg_iterator iter;
+          FOR_EACH_CALL_EXPR_ARG (arg, iter, call)
+            /* arg is bound to successive arguments of call.  */
+            ...;
+
+     For non-static member functions, there will be an operand
+     corresponding to the `this' pointer.  There will always be
+     expressions corresponding to all of the arguments, even if the
+     function is declared with default arguments and some arguments are
+     not explicitly provided at the call sites.
+
+     `CALL_EXPR's also have a `CALL_EXPR_STATIC_CHAIN' operand that is
+     used to implement nested functions.  This operand is otherwise
+     null.
+
+`CLEANUP_POINT_EXPR'
+     These nodes represent full-expressions.  The single operand is an
+     expression to evaluate.  Any destructor calls engendered by the
+     creation of temporaries during the evaluation of that expression
+     should be performed immediately after the expression is evaluated.
+
+`CONSTRUCTOR'
+     These nodes represent the brace-enclosed initializers for a
+     structure or array.  The first operand is reserved for use by the
+     back end.  The second operand is a `TREE_LIST'.  If the
+     `TREE_TYPE' of the `CONSTRUCTOR' is a `RECORD_TYPE' or
+     `UNION_TYPE', then the `TREE_PURPOSE' of each node in the
+     `TREE_LIST' will be a `FIELD_DECL' and the `TREE_VALUE' of each
+     node will be the expression used to initialize that field.
+
+     If the `TREE_TYPE' of the `CONSTRUCTOR' is an `ARRAY_TYPE', then
+     the `TREE_PURPOSE' of each element in the `TREE_LIST' will be an
+     `INTEGER_CST' or a `RANGE_EXPR' of two `INTEGER_CST's.  A single
+     `INTEGER_CST' indicates which element of the array (indexed from
+     zero) is being assigned to.  A `RANGE_EXPR' indicates an inclusive
+     range of elements to initialize.  In both cases the `TREE_VALUE'
+     is the corresponding initializer.  It is re-evaluated for each
+     element of a `RANGE_EXPR'.  If the `TREE_PURPOSE' is `NULL_TREE',
+     then the initializer is for the next available array element.
+
+     In the front end, you should not depend on the fields appearing in
+     any particular order.  However, in the middle end, fields must
+     appear in declaration order.  You should not assume that all
+     fields will be represented.  Unrepresented fields will be set to
+     zero.
+
+`COMPOUND_LITERAL_EXPR'
+     These nodes represent ISO C99 compound literals.  The
+     `COMPOUND_LITERAL_EXPR_DECL_EXPR' is a `DECL_EXPR' containing an
+     anonymous `VAR_DECL' for the unnamed object represented by the
+     compound literal; the `DECL_INITIAL' of that `VAR_DECL' is a
+     `CONSTRUCTOR' representing the brace-enclosed list of initializers
+     in the compound literal.  That anonymous `VAR_DECL' can also be
+     accessed directly by the `COMPOUND_LITERAL_EXPR_DECL' macro.
+
+`SAVE_EXPR'
+     A `SAVE_EXPR' represents an expression (possibly involving
+     side-effects) that is used more than once.  The side-effects should
+     occur only the first time the expression is evaluated.  Subsequent
+     uses should just reuse the computed value.  The first operand to
+     the `SAVE_EXPR' is the expression to evaluate.  The side-effects
+     should be executed where the `SAVE_EXPR' is first encountered in a
+     depth-first preorder traversal of the expression tree.
+
+`TARGET_EXPR'
+     A `TARGET_EXPR' represents a temporary object.  The first operand
+     is a `VAR_DECL' for the temporary variable.  The second operand is
+     the initializer for the temporary.  The initializer is evaluated
+     and, if non-void, copied (bitwise) into the temporary.  If the
+     initializer is void, that means that it will perform the
+     initialization itself.
+
+     Often, a `TARGET_EXPR' occurs on the right-hand side of an
+     assignment, or as the second operand to a comma-expression which is
+     itself the right-hand side of an assignment, etc.  In this case,
+     we say that the `TARGET_EXPR' is "normal"; otherwise, we say it is
+     "orphaned".  For a normal `TARGET_EXPR' the temporary variable
+     should be treated as an alias for the left-hand side of the
+     assignment, rather than as a new temporary variable.
+
+     The third operand to the `TARGET_EXPR', if present, is a
+     cleanup-expression (i.e., destructor call) for the temporary.  If
+     this expression is orphaned, then this expression must be executed
+     when the statement containing this expression is complete.  These
+     cleanups must always be executed in the order opposite to that in
+     which they were encountered.  Note that if a temporary is created
+     on one branch of a conditional operator (i.e., in the second or
+     third operand to a `COND_EXPR'), the cleanup must be run only if
+     that branch is actually executed.
+
+`VA_ARG_EXPR'
+     This node is used to implement support for the C/C++ variable
+     argument-list mechanism.  It represents expressions like `va_arg
+     (ap, type)'.  Its `TREE_TYPE' yields the tree representation for
+     `type' and its sole argument yields the representation for `ap'.
+
+
+
+File: gccint.info,  Node: Vectors,  Prev: Unary and Binary Expressions,  Up: Expression trees
+
+11.6.4 Vectors
+--------------
+
+`VEC_LSHIFT_EXPR'
+`VEC_RSHIFT_EXPR'
+     These nodes represent whole vector left and right shifts,
+     respectively.  The first operand is the vector to shift; it will
+     always be of vector type.  The second operand is an expression for
+     the number of bits by which to shift.  Note that the result is
+     undefined if the second operand is larger than or equal to the
+     first operand's type size.
+
+`VEC_WIDEN_MULT_HI_EXPR'
+`VEC_WIDEN_MULT_LO_EXPR'
+     These nodes represent widening vector multiplication of the high
+     and low parts of the two input vectors, respectively.  Their
+     operands are vectors that contain the same number of elements
+     (`N') of the same integral type.  The result is a vector that
+     contains half as many elements, of an integral type whose size is
+     twice as wide.  In the case of `VEC_WIDEN_MULT_HI_EXPR' the high
+     `N/2' elements of the two vector are multiplied to produce the
+     vector of `N/2' products. In the case of `VEC_WIDEN_MULT_LO_EXPR'
+     the low `N/2' elements of the two vector are multiplied to produce
+     the vector of `N/2' products.
+
+`VEC_UNPACK_HI_EXPR'
+`VEC_UNPACK_LO_EXPR'
+     These nodes represent unpacking of the high and low parts of the
+     input vector, respectively.  The single operand is a vector that
+     contains `N' elements of the same integral or floating point type.
+     The result is a vector that contains half as many elements, of an
+     integral or floating point type whose size is twice as wide.  In
+     the case of `VEC_UNPACK_HI_EXPR' the high `N/2' elements of the
+     vector are extracted and widened (promoted).  In the case of
+     `VEC_UNPACK_LO_EXPR' the low `N/2' elements of the vector are
+     extracted and widened (promoted).
+
+`VEC_UNPACK_FLOAT_HI_EXPR'
+`VEC_UNPACK_FLOAT_LO_EXPR'
+     These nodes represent unpacking of the high and low parts of the
+     input vector, where the values are converted from fixed point to
+     floating point.  The single operand is a vector that contains `N'
+     elements of the same integral type.  The result is a vector that
+     contains half as many elements of a floating point type whose size
+     is twice as wide.  In the case of `VEC_UNPACK_HI_EXPR' the high
+     `N/2' elements of the vector are extracted, converted and widened.
+     In the case of `VEC_UNPACK_LO_EXPR' the low `N/2' elements of the
+     vector are extracted, converted and widened.
+
+`VEC_PACK_TRUNC_EXPR'
+     This node represents packing of truncated elements of the two
+     input vectors into the output vector.  Input operands are vectors
+     that contain the same number of elements of the same integral or
+     floating point type.  The result is a vector that contains twice
+     as many elements of an integral or floating point type whose size
+     is half as wide. The elements of the two vectors are demoted and
+     merged (concatenated) to form the output vector.
+
+`VEC_PACK_SAT_EXPR'
+     This node represents packing of elements of the two input vectors
+     into the output vector using saturation.  Input operands are
+     vectors that contain the same number of elements of the same
+     integral type.  The result is a vector that contains twice as many
+     elements of an integral type whose size is half as wide.  The
+     elements of the two vectors are demoted and merged (concatenated)
+     to form the output vector.
+
+`VEC_PACK_FIX_TRUNC_EXPR'
+     This node represents packing of elements of the two input vectors
+     into the output vector, where the values are converted from
+     floating point to fixed point.  Input operands are vectors that
+     contain the same number of elements of a floating point type.  The
+     result is a vector that contains twice as many elements of an
+     integral type whose size is half as wide.  The elements of the two
+     vectors are merged (concatenated) to form the output vector.
+
+`VEC_EXTRACT_EVEN_EXPR'
+`VEC_EXTRACT_ODD_EXPR'
+     These nodes represent extracting of the even/odd elements of the
+     two input vectors, respectively. Their operands and result are
+     vectors that contain the same number of elements of the same type.
+
+`VEC_INTERLEAVE_HIGH_EXPR'
+`VEC_INTERLEAVE_LOW_EXPR'
+     These nodes represent merging and interleaving of the high/low
+     elements of the two input vectors, respectively. The operands and
+     the result are vectors that contain the same number of elements
+     (`N') of the same type.  In the case of
+     `VEC_INTERLEAVE_HIGH_EXPR', the high `N/2' elements of the first
+     input vector are interleaved with the high `N/2' elements of the
+     second input vector. In the case of `VEC_INTERLEAVE_LOW_EXPR', the
+     low `N/2' elements of the first input vector are interleaved with
+     the low `N/2' elements of the second input vector.
+
+
+
+File: gccint.info,  Node: Statements,  Next: Functions,  Prev: Expression trees,  Up: GENERIC
+
+11.7 Statements
+===============
+
+Most statements in GIMPLE are assignment statements, represented by
+`GIMPLE_ASSIGN'.  No other C expressions can appear at statement level;
+a reference to a volatile object is converted into a `GIMPLE_ASSIGN'.
+
+ There are also several varieties of complex statements.
+
+* Menu:
+
+* Basic Statements::
+* Blocks::
+* Statement Sequences::
+* Empty Statements::
+* Jumps::
+* Cleanups::
+* OpenMP::
+
+
+File: gccint.info,  Node: Basic Statements,  Next: Blocks,  Up: Statements
+
+11.7.1 Basic Statements
+-----------------------
+
+`ASM_EXPR'
+     Used to represent an inline assembly statement.  For an inline
+     assembly statement like:
+          asm ("mov x, y");
+     The `ASM_STRING' macro will return a `STRING_CST' node for `"mov
+     x, y"'.  If the original statement made use of the
+     extended-assembly syntax, then `ASM_OUTPUTS', `ASM_INPUTS', and
+     `ASM_CLOBBERS' will be the outputs, inputs, and clobbers for the
+     statement, represented as `STRING_CST' nodes.  The
+     extended-assembly syntax looks like:
+          asm ("fsinx %1,%0" : "=f" (result) : "f" (angle));
+     The first string is the `ASM_STRING', containing the instruction
+     template.  The next two strings are the output and inputs,
+     respectively; this statement has no clobbers.  As this example
+     indicates, "plain" assembly statements are merely a special case
+     of extended assembly statements; they have no cv-qualifiers,
+     outputs, inputs, or clobbers.  All of the strings will be
+     `NUL'-terminated, and will contain no embedded `NUL'-characters.
+
+     If the assembly statement is declared `volatile', or if the
+     statement was not an extended assembly statement, and is therefore
+     implicitly volatile, then the predicate `ASM_VOLATILE_P' will hold
+     of the `ASM_EXPR'.
+
+`DECL_EXPR'
+     Used to represent a local declaration.  The `DECL_EXPR_DECL' macro
+     can be used to obtain the entity declared.  This declaration may
+     be a `LABEL_DECL', indicating that the label declared is a local
+     label.  (As an extension, GCC allows the declaration of labels
+     with scope.)  In C, this declaration may be a `FUNCTION_DECL',
+     indicating the use of the GCC nested function extension.  For more
+     information, *note Functions::.
+
+`LABEL_EXPR'
+     Used to represent a label.  The `LABEL_DECL' declared by this
+     statement can be obtained with the `LABEL_EXPR_LABEL' macro.  The
+     `IDENTIFIER_NODE' giving the name of the label can be obtained from
+     the `LABEL_DECL' with `DECL_NAME'.
+
+`GOTO_EXPR'
+     Used to represent a `goto' statement.  The `GOTO_DESTINATION' will
+     usually be a `LABEL_DECL'.  However, if the "computed goto"
+     extension has been used, the `GOTO_DESTINATION' will be an
+     arbitrary expression indicating the destination.  This expression
+     will always have pointer type.
+
+`RETURN_EXPR'
+     Used to represent a `return' statement.  Operand 0 represents the
+     value to return.  It should either be the `RESULT_DECL' for the
+     containing function, or a `MODIFY_EXPR' or `INIT_EXPR' setting the
+     function's `RESULT_DECL'.  It will be `NULL_TREE' if the statement
+     was just
+          return;
+
+`LOOP_EXPR'
+     These nodes represent "infinite" loops.  The `LOOP_EXPR_BODY'
+     represents the body of the loop.  It should be executed forever,
+     unless an `EXIT_EXPR' is encountered.
+
+`EXIT_EXPR'
+     These nodes represent conditional exits from the nearest enclosing
+     `LOOP_EXPR'.  The single operand is the condition; if it is
+     nonzero, then the loop should be exited.  An `EXIT_EXPR' will only
+     appear within a `LOOP_EXPR'.
+
+`SWITCH_STMT'
+     Used to represent a `switch' statement.  The `SWITCH_STMT_COND' is
+     the expression on which the switch is occurring.  See the
+     documentation for an `IF_STMT' for more information on the
+     representation used for the condition.  The `SWITCH_STMT_BODY' is
+     the body of the switch statement.   The `SWITCH_STMT_TYPE' is the
+     original type of switch expression as given in the source, before
+     any compiler conversions.
+
+`CASE_LABEL_EXPR'
+     Use to represent a `case' label, range of `case' labels, or a
+     `default' label.  If `CASE_LOW' is `NULL_TREE', then this is a
+     `default' label.  Otherwise, if `CASE_HIGH' is `NULL_TREE', then
+     this is an ordinary `case' label.  In this case, `CASE_LOW' is an
+     expression giving the value of the label.  Both `CASE_LOW' and
+     `CASE_HIGH' are `INTEGER_CST' nodes.  These values will have the
+     same type as the condition expression in the switch statement.
+
+     Otherwise, if both `CASE_LOW' and `CASE_HIGH' are defined, the
+     statement is a range of case labels.  Such statements originate
+     with the extension that allows users to write things of the form:
+          case 2 ... 5:
+     The first value will be `CASE_LOW', while the second will be
+     `CASE_HIGH'.
+
+
+
+File: gccint.info,  Node: Blocks,  Next: Statement Sequences,  Prev: Basic Statements,  Up: Statements
+
+11.7.2 Blocks
+-------------
+
+Block scopes and the variables they declare in GENERIC are expressed
+using the `BIND_EXPR' code, which in previous versions of GCC was
+primarily used for the C statement-expression extension.
+
+ Variables in a block are collected into `BIND_EXPR_VARS' in
+declaration order through their `TREE_CHAIN' field.  Any runtime
+initialization is moved out of `DECL_INITIAL' and into a statement in
+the controlled block.  When gimplifying from C or C++, this
+initialization replaces the `DECL_STMT'.  These variables will never
+require cleanups.  The scope of these variables is just the body
+
+ Variable-length arrays (VLAs) complicate this process, as their size
+often refers to variables initialized earlier in the block.  To handle
+this, we currently split the block at that point, and move the VLA into
+a new, inner `BIND_EXPR'.  This strategy may change in the future.
+
+ A C++ program will usually contain more `BIND_EXPR's than there are
+syntactic blocks in the source code, since several C++ constructs have
+implicit scopes associated with them.  On the other hand, although the
+C++ front end uses pseudo-scopes to handle cleanups for objects with
+destructors, these don't translate into the GIMPLE form; multiple
+declarations at the same level use the same `BIND_EXPR'.
+
+
+File: gccint.info,  Node: Statement Sequences,  Next: Empty Statements,  Prev: Blocks,  Up: Statements
+
+11.7.3 Statement Sequences
+--------------------------
+
+Multiple statements at the same nesting level are collected into a
+`STATEMENT_LIST'.  Statement lists are modified and traversed using the
+interface in `tree-iterator.h'.
+
+
+File: gccint.info,  Node: Empty Statements,  Next: Jumps,  Prev: Statement Sequences,  Up: Statements
+
+11.7.4 Empty Statements
+-----------------------
+
+Whenever possible, statements with no effect are discarded.  But if
+they are nested within another construct which cannot be discarded for
+some reason, they are instead replaced with an empty statement,
+generated by `build_empty_stmt'.  Initially, all empty statements were
+shared, after the pattern of the Java front end, but this caused a lot
+of trouble in practice.
+
+ An empty statement is represented as `(void)0'.
+
+
+File: gccint.info,  Node: Jumps,  Next: Cleanups,  Prev: Empty Statements,  Up: Statements
+
+11.7.5 Jumps
+------------
+
+Other jumps are expressed by either `GOTO_EXPR' or `RETURN_EXPR'.
+
+ The operand of a `GOTO_EXPR' must be either a label or a variable
+containing the address to jump to.
+
+ The operand of a `RETURN_EXPR' is either `NULL_TREE', `RESULT_DECL',
+or a `MODIFY_EXPR' which sets the return value.  It would be nice to
+move the `MODIFY_EXPR' into a separate statement, but the special
+return semantics in `expand_return' make that difficult.  It may still
+happen in the future, perhaps by moving most of that logic into
+`expand_assignment'.
+
+
+File: gccint.info,  Node: Cleanups,  Next: OpenMP,  Prev: Jumps,  Up: Statements
+
+11.7.6 Cleanups
+---------------
+
+Destructors for local C++ objects and similar dynamic cleanups are
+represented in GIMPLE by a `TRY_FINALLY_EXPR'.  `TRY_FINALLY_EXPR' has
+two operands, both of which are a sequence of statements to execute.
+The first sequence is executed.  When it completes the second sequence
+is executed.
+
+ The first sequence may complete in the following ways:
+
+  1. Execute the last statement in the sequence and fall off the end.
+
+  2. Execute a goto statement (`GOTO_EXPR') to an ordinary label
+     outside the sequence.
+
+  3. Execute a return statement (`RETURN_EXPR').
+
+  4. Throw an exception.  This is currently not explicitly represented
+     in GIMPLE.
+
+
+ The second sequence is not executed if the first sequence completes by
+calling `setjmp' or `exit' or any other function that does not return.
+The second sequence is also not executed if the first sequence
+completes via a non-local goto or a computed goto (in general the
+compiler does not know whether such a goto statement exits the first
+sequence or not, so we assume that it doesn't).
+
+ After the second sequence is executed, if it completes normally by
+falling off the end, execution continues wherever the first sequence
+would have continued, by falling off the end, or doing a goto, etc.
+
+ `TRY_FINALLY_EXPR' complicates the flow graph, since the cleanup needs
+to appear on every edge out of the controlled block; this reduces the
+freedom to move code across these edges.  Therefore, the EH lowering
+pass which runs before most of the optimization passes eliminates these
+expressions by explicitly adding the cleanup to each edge.  Rethrowing
+the exception is represented using `RESX_EXPR'.
+
+
+File: gccint.info,  Node: OpenMP,  Prev: Cleanups,  Up: Statements
+
+11.7.7 OpenMP
+-------------
+
+All the statements starting with `OMP_' represent directives and
+clauses used by the OpenMP API `http://www.openmp.org/'.
+
+`OMP_PARALLEL'
+     Represents `#pragma omp parallel [clause1 ... clauseN]'. It has
+     four operands:
+
+     Operand `OMP_PARALLEL_BODY' is valid while in GENERIC and High
+     GIMPLE forms.  It contains the body of code to be executed by all
+     the threads.  During GIMPLE lowering, this operand becomes `NULL'
+     and the body is emitted linearly after `OMP_PARALLEL'.
+
+     Operand `OMP_PARALLEL_CLAUSES' is the list of clauses associated
+     with the directive.
+
+     Operand `OMP_PARALLEL_FN' is created by `pass_lower_omp', it
+     contains the `FUNCTION_DECL' for the function that will contain
+     the body of the parallel region.
+
+     Operand `OMP_PARALLEL_DATA_ARG' is also created by
+     `pass_lower_omp'. If there are shared variables to be communicated
+     to the children threads, this operand will contain the `VAR_DECL'
+     that contains all the shared values and variables.
+
+`OMP_FOR'
+     Represents `#pragma omp for [clause1 ... clauseN]'.  It has 5
+     operands:
+
+     Operand `OMP_FOR_BODY' contains the loop body.
+
+     Operand `OMP_FOR_CLAUSES' is the list of clauses associated with
+     the directive.
+
+     Operand `OMP_FOR_INIT' is the loop initialization code of the form
+     `VAR = N1'.
+
+     Operand `OMP_FOR_COND' is the loop conditional expression of the
+     form `VAR {<,>,<=,>=} N2'.
+
+     Operand `OMP_FOR_INCR' is the loop index increment of the form
+     `VAR {+=,-=} INCR'.
+
+     Operand `OMP_FOR_PRE_BODY' contains side-effect code from operands
+     `OMP_FOR_INIT', `OMP_FOR_COND' and `OMP_FOR_INC'.  These
+     side-effects are part of the `OMP_FOR' block but must be evaluated
+     before the start of loop body.
+
+     The loop index variable `VAR' must be a signed integer variable,
+     which is implicitly private to each thread.  Bounds `N1' and `N2'
+     and the increment expression `INCR' are required to be loop
+     invariant integer expressions that are evaluated without any
+     synchronization. The evaluation order, frequency of evaluation and
+     side-effects are unspecified by the standard.
+
+`OMP_SECTIONS'
+     Represents `#pragma omp sections [clause1 ... clauseN]'.
+
+     Operand `OMP_SECTIONS_BODY' contains the sections body, which in
+     turn contains a set of `OMP_SECTION' nodes for each of the
+     concurrent sections delimited by `#pragma omp section'.
+
+     Operand `OMP_SECTIONS_CLAUSES' is the list of clauses associated
+     with the directive.
+
+`OMP_SECTION'
+     Section delimiter for `OMP_SECTIONS'.
+
+`OMP_SINGLE'
+     Represents `#pragma omp single'.
+
+     Operand `OMP_SINGLE_BODY' contains the body of code to be executed
+     by a single thread.
+
+     Operand `OMP_SINGLE_CLAUSES' is the list of clauses associated
+     with the directive.
+
+`OMP_MASTER'
+     Represents `#pragma omp master'.
+
+     Operand `OMP_MASTER_BODY' contains the body of code to be executed
+     by the master thread.
+
+`OMP_ORDERED'
+     Represents `#pragma omp ordered'.
+
+     Operand `OMP_ORDERED_BODY' contains the body of code to be
+     executed in the sequential order dictated by the loop index
+     variable.
+
+`OMP_CRITICAL'
+     Represents `#pragma omp critical [name]'.
+
+     Operand `OMP_CRITICAL_BODY' is the critical section.
+
+     Operand `OMP_CRITICAL_NAME' is an optional identifier to label the
+     critical section.
+
+`OMP_RETURN'
+     This does not represent any OpenMP directive, it is an artificial
+     marker to indicate the end of the body of an OpenMP. It is used by
+     the flow graph (`tree-cfg.c') and OpenMP region building code
+     (`omp-low.c').
+
+`OMP_CONTINUE'
+     Similarly, this instruction does not represent an OpenMP
+     directive, it is used by `OMP_FOR' and `OMP_SECTIONS' to mark the
+     place where the code needs to loop to the next iteration (in the
+     case of `OMP_FOR') or the next section (in the case of
+     `OMP_SECTIONS').
+
+     In some cases, `OMP_CONTINUE' is placed right before `OMP_RETURN'.
+     But if there are cleanups that need to occur right after the
+     looping body, it will be emitted between `OMP_CONTINUE' and
+     `OMP_RETURN'.
+
+`OMP_ATOMIC'
+     Represents `#pragma omp atomic'.
+
+     Operand 0 is the address at which the atomic operation is to be
+     performed.
+
+     Operand 1 is the expression to evaluate.  The gimplifier tries
+     three alternative code generation strategies.  Whenever possible,
+     an atomic update built-in is used.  If that fails, a
+     compare-and-swap loop is attempted.  If that also fails, a regular
+     critical section around the expression is used.
+
+`OMP_CLAUSE'
+     Represents clauses associated with one of the `OMP_' directives.
+     Clauses are represented by separate sub-codes defined in `tree.h'.
+     Clauses codes can be one of: `OMP_CLAUSE_PRIVATE',
+     `OMP_CLAUSE_SHARED', `OMP_CLAUSE_FIRSTPRIVATE',
+     `OMP_CLAUSE_LASTPRIVATE', `OMP_CLAUSE_COPYIN',
+     `OMP_CLAUSE_COPYPRIVATE', `OMP_CLAUSE_IF',
+     `OMP_CLAUSE_NUM_THREADS', `OMP_CLAUSE_SCHEDULE',
+     `OMP_CLAUSE_NOWAIT', `OMP_CLAUSE_ORDERED', `OMP_CLAUSE_DEFAULT',
+     and `OMP_CLAUSE_REDUCTION'.  Each code represents the
+     corresponding OpenMP clause.
+
+     Clauses associated with the same directive are chained together
+     via `OMP_CLAUSE_CHAIN'. Those clauses that accept a list of
+     variables are restricted to exactly one, accessed with
+     `OMP_CLAUSE_VAR'.  Therefore, multiple variables under the same
+     clause `C' need to be represented as multiple `C' clauses chained
+     together.  This facilitates adding new clauses during compilation.
+
+
+
+File: gccint.info,  Node: Functions,  Next: Language-dependent trees,  Prev: Statements,  Up: GENERIC
+
+11.8 Functions
+==============
+
+A function is represented by a `FUNCTION_DECL' node.  It stores the
+basic pieces of the function such as body, parameters, and return type
+as well as information on the surrounding context, visibility, and
+linkage.
+
+* Menu:
+
+* Function Basics::     Function names, body, and parameters.
+* Function Properties:: Context, linkage, etc.
+
+
+File: gccint.info,  Node: Function Basics,  Next: Function Properties,  Up: Functions
+
+11.8.1 Function Basics
+----------------------
+
+A function has four core parts: the name, the parameters, the result,
+and the body.  The following macros and functions access these parts of
+a `FUNCTION_DECL' as well as other basic features:
+`DECL_NAME'
+     This macro returns the unqualified name of the function, as an
+     `IDENTIFIER_NODE'.  For an instantiation of a function template,
+     the `DECL_NAME' is the unqualified name of the template, not
+     something like `f<int>'.  The value of `DECL_NAME' is undefined
+     when used on a constructor, destructor, overloaded operator, or
+     type-conversion operator, or any function that is implicitly
+     generated by the compiler.  See below for macros that can be used
+     to distinguish these cases.
+
+`DECL_ASSEMBLER_NAME'
+     This macro returns the mangled name of the function, also an
+     `IDENTIFIER_NODE'.  This name does not contain leading underscores
+     on systems that prefix all identifiers with underscores.  The
+     mangled name is computed in the same way on all platforms; if
+     special processing is required to deal with the object file format
+     used on a particular platform, it is the responsibility of the
+     back end to perform those modifications.  (Of course, the back end
+     should not modify `DECL_ASSEMBLER_NAME' itself.)
+
+     Using `DECL_ASSEMBLER_NAME' will cause additional memory to be
+     allocated (for the mangled name of the entity) so it should be used
+     only when emitting assembly code.  It should not be used within the
+     optimizers to determine whether or not two declarations are the
+     same, even though some of the existing optimizers do use it in
+     that way.  These uses will be removed over time.
+
+`DECL_ARGUMENTS'
+     This macro returns the `PARM_DECL' for the first argument to the
+     function.  Subsequent `PARM_DECL' nodes can be obtained by
+     following the `TREE_CHAIN' links.
+
+`DECL_RESULT'
+     This macro returns the `RESULT_DECL' for the function.
+
+`DECL_SAVED_TREE'
+     This macro returns the complete body of the function.
+
+`TREE_TYPE'
+     This macro returns the `FUNCTION_TYPE' or `METHOD_TYPE' for the
+     function.
+
+`DECL_INITIAL'
+     A function that has a definition in the current translation unit
+     will have a non-`NULL' `DECL_INITIAL'.  However, back ends should
+     not make use of the particular value given by `DECL_INITIAL'.
+
+     It should contain a tree of `BLOCK' nodes that mirrors the scopes
+     that variables are bound in the function.  Each block contains a
+     list of decls declared in a basic block, a pointer to a chain of
+     blocks at the next lower scope level, then a pointer to the next
+     block at the same level and a backpointer to the parent `BLOCK' or
+     `FUNCTION_DECL'.  So given a function as follows:
+
+          void foo()
+          {
+            int a;
+            {
+              int b;
+            }
+            int c;
+          }
+
+     you would get the following:
+
+          tree foo = FUNCTION_DECL;
+          tree decl_a = VAR_DECL;
+          tree decl_b = VAR_DECL;
+          tree decl_c = VAR_DECL;
+          tree block_a = BLOCK;
+          tree block_b = BLOCK;
+          tree block_c = BLOCK;
+          BLOCK_VARS(block_a) = decl_a;
+          BLOCK_SUBBLOCKS(block_a) = block_b;
+          BLOCK_CHAIN(block_a) = block_c;
+          BLOCK_SUPERCONTEXT(block_a) = foo;
+          BLOCK_VARS(block_b) = decl_b;
+          BLOCK_SUPERCONTEXT(block_b) = block_a;
+          BLOCK_VARS(block_c) = decl_c;
+          BLOCK_SUPERCONTEXT(block_c) = foo;
+          DECL_INITIAL(foo) = block_a;
+
+
+
+File: gccint.info,  Node: Function Properties,  Prev: Function Basics,  Up: Functions
+
+11.8.2 Function Properties
+--------------------------
+
+To determine the scope of a function, you can use the `DECL_CONTEXT'
+macro.  This macro will return the class (either a `RECORD_TYPE' or a
+`UNION_TYPE') or namespace (a `NAMESPACE_DECL') of which the function
+is a member.  For a virtual function, this macro returns the class in
+which the function was actually defined, not the base class in which
+the virtual declaration occurred.
+
+ In C, the `DECL_CONTEXT' for a function maybe another function.  This
+representation indicates that the GNU nested function extension is in
+use.  For details on the semantics of nested functions, see the GCC
+Manual.  The nested function can refer to local variables in its
+containing function.  Such references are not explicitly marked in the
+tree structure; back ends must look at the `DECL_CONTEXT' for the
+referenced `VAR_DECL'.  If the `DECL_CONTEXT' for the referenced
+`VAR_DECL' is not the same as the function currently being processed,
+and neither `DECL_EXTERNAL' nor `TREE_STATIC' hold, then the reference
+is to a local variable in a containing function, and the back end must
+take appropriate action.
+
+`DECL_EXTERNAL'
+     This predicate holds if the function is undefined.
+
+`TREE_PUBLIC'
+     This predicate holds if the function has external linkage.
+
+`TREE_STATIC'
+     This predicate holds if the function has been defined.
+
+`TREE_THIS_VOLATILE'
+     This predicate holds if the function does not return normally.
+
+`TREE_READONLY'
+     This predicate holds if the function can only read its arguments.
+
+`DECL_PURE_P'
+     This predicate holds if the function can only read its arguments,
+     but may also read global memory.
+
+`DECL_VIRTUAL_P'
+     This predicate holds if the function is virtual.
+
+`DECL_ARTIFICIAL'
+     This macro holds if the function was implicitly generated by the
+     compiler, rather than explicitly declared.  In addition to
+     implicitly generated class member functions, this macro holds for
+     the special functions created to implement static initialization
+     and destruction, to compute run-time type information, and so
+     forth.
+
+`DECL_FUNCTION_SPECIFIC_TARGET'
+     This macro returns a tree node that holds the target options that
+     are to be used to compile this particular function or `NULL_TREE'
+     if the function is to be compiled with the target options
+     specified on the command line.
+
+`DECL_FUNCTION_SPECIFIC_OPTIMIZATION'
+     This macro returns a tree node that holds the optimization options
+     that are to be used to compile this particular function or
+     `NULL_TREE' if the function is to be compiled with the
+     optimization options specified on the command line.
+
+
+11.8.2.1 Statements
+...................
+
+There are tree nodes corresponding to all of the source-level statement
+constructs, used within the C and C++ frontends.  These are enumerated
+here, together with a list of the various macros that can be used to
+obtain information about them.  There are a few macros that can be used
+with all statements:
+
+
+File: gccint.info,  Node: Language-dependent trees,  Next: C and C++ Trees,  Prev: Functions,  Up: GENERIC
+
+11.9 Language-dependent trees
+=============================
+
+Front ends may wish to keep some state associated with various GENERIC
+trees while parsing.  To support this, trees provide a set of flags
+that may be used by the front end.  They are accessed using
+`TREE_LANG_FLAG_n' where `n' is currently 0 through 6.
+
+ If necessary, a front end can use some language-dependent tree codes
+in its GENERIC representation, so long as it provides a hook for
+converting them to GIMPLE and doesn't expect them to work with any
+(hypothetical) optimizers that run before the conversion to GIMPLE. The
+intermediate representation used while parsing C and C++ looks very
+little like GENERIC, but the C and C++ gimplifier hooks are perfectly
+happy to take it as input and spit out GIMPLE.
+
+
+File: gccint.info,  Node: C and C++ Trees,  Next: Java Trees,  Prev: Language-dependent trees,  Up: GENERIC
+
+11.10 C and C++ Trees
+=====================
+
+This section documents the internal representation used by GCC to
+represent C and C++ source programs.  When presented with a C or C++
+source program, GCC parses the program, performs semantic analysis
+(including the generation of error messages), and then produces the
+internal representation described here.  This representation contains a
+complete representation for the entire translation unit provided as
+input to the front end.  This representation is then typically processed
+by a code-generator in order to produce machine code, but could also be
+used in the creation of source browsers, intelligent editors, automatic
+documentation generators, interpreters, and any other programs needing
+the ability to process C or C++ code.
+
+ This section explains the internal representation.  In particular, it
+documents the internal representation for C and C++ source constructs,
+and the macros, functions, and variables that can be used to access
+these constructs.  The C++ representation is largely a superset of the
+representation used in the C front end.  There is only one construct
+used in C that does not appear in the C++ front end and that is the GNU
+"nested function" extension.  Many of the macros documented here do not
+apply in C because the corresponding language constructs do not appear
+in C.
+
+ The C and C++ front ends generate a mix of GENERIC trees and ones
+specific to C and C++.  These language-specific trees are higher-level
+constructs than the ones in GENERIC to make the parser's job easier.
+This section describes those trees that aren't part of GENERIC as well
+as aspects of GENERIC trees that are treated in a language-specific
+manner.
+
+ If you are developing a "back end", be it is a code-generator or some
+other tool, that uses this representation, you may occasionally find
+that you need to ask questions not easily answered by the functions and
+macros available here.  If that situation occurs, it is quite likely
+that GCC already supports the functionality you desire, but that the
+interface is simply not documented here.  In that case, you should ask
+the GCC maintainers (via mail to <gcc@gcc.gnu.org>) about documenting
+the functionality you require.  Similarly, if you find yourself writing
+functions that do not deal directly with your back end, but instead
+might be useful to other people using the GCC front end, you should
+submit your patches for inclusion in GCC.
+
+* Menu:
+
+* Types for C++::               Fundamental and aggregate types.
+* Namespaces::                  Namespaces.
+* Classes::                     Classes.
+* Functions for C++::           Overloading and accessors for C++.
+* Statements for C++::          Statements specific to C and C++.
+* C++ Expressions::    From `typeid' to `throw'.
+
+
+File: gccint.info,  Node: Types for C++,  Next: Namespaces,  Up: C and C++ Trees
+
+11.10.1 Types for C++
+---------------------
+
+In C++, an array type is not qualified; rather the type of the array
+elements is qualified.  This situation is reflected in the intermediate
+representation.  The macros described here will always examine the
+qualification of the underlying element type when applied to an array
+type.  (If the element type is itself an array, then the recursion
+continues until a non-array type is found, and the qualification of this
+type is examined.)  So, for example, `CP_TYPE_CONST_P' will hold of the
+type `const int ()[7]', denoting an array of seven `int's.
+
+ The following functions and macros deal with cv-qualification of types:
+`CP_TYPE_QUALS'
+     This macro returns the set of type qualifiers applied to this type.
+     This value is `TYPE_UNQUALIFIED' if no qualifiers have been
+     applied.  The `TYPE_QUAL_CONST' bit is set if the type is
+     `const'-qualified.  The `TYPE_QUAL_VOLATILE' bit is set if the
+     type is `volatile'-qualified.  The `TYPE_QUAL_RESTRICT' bit is set
+     if the type is `restrict'-qualified.
+
+`CP_TYPE_CONST_P'
+     This macro holds if the type is `const'-qualified.
+
+`CP_TYPE_VOLATILE_P'
+     This macro holds if the type is `volatile'-qualified.
+
+`CP_TYPE_RESTRICT_P'
+     This macro holds if the type is `restrict'-qualified.
+
+`CP_TYPE_CONST_NON_VOLATILE_P'
+     This predicate holds for a type that is `const'-qualified, but
+     _not_ `volatile'-qualified; other cv-qualifiers are ignored as
+     well: only the `const'-ness is tested.
+
+
+ A few other macros and functions are usable with all types:
+`TYPE_SIZE'
+     The number of bits required to represent the type, represented as
+     an `INTEGER_CST'.  For an incomplete type, `TYPE_SIZE' will be
+     `NULL_TREE'.
+
+`TYPE_ALIGN'
+     The alignment of the type, in bits, represented as an `int'.
+
+`TYPE_NAME'
+     This macro returns a declaration (in the form of a `TYPE_DECL') for
+     the type.  (Note this macro does _not_ return an
+     `IDENTIFIER_NODE', as you might expect, given its name!)  You can
+     look at the `DECL_NAME' of the `TYPE_DECL' to obtain the actual
+     name of the type.  The `TYPE_NAME' will be `NULL_TREE' for a type
+     that is not a built-in type, the result of a typedef, or a named
+     class type.
+
+`CP_INTEGRAL_TYPE'
+     This predicate holds if the type is an integral type.  Notice that
+     in C++, enumerations are _not_ integral types.
+
+`ARITHMETIC_TYPE_P'
+     This predicate holds if the type is an integral type (in the C++
+     sense) or a floating point type.
+
+`CLASS_TYPE_P'
+     This predicate holds for a class-type.
+
+`TYPE_BUILT_IN'
+     This predicate holds for a built-in type.
+
+`TYPE_PTRMEM_P'
+     This predicate holds if the type is a pointer to data member.
+
+`TYPE_PTR_P'
+     This predicate holds if the type is a pointer type, and the
+     pointee is not a data member.
+
+`TYPE_PTRFN_P'
+     This predicate holds for a pointer to function type.
+
+`TYPE_PTROB_P'
+     This predicate holds for a pointer to object type.  Note however
+     that it does not hold for the generic pointer to object type `void
+     *'.  You may use `TYPE_PTROBV_P' to test for a pointer to object
+     type as well as `void *'.
+
+
+ The table below describes types specific to C and C++ as well as
+language-dependent info about GENERIC types.
+
+`POINTER_TYPE'
+     Used to represent pointer types, and pointer to data member types.
+     If `TREE_TYPE' is a pointer to data member type, then
+     `TYPE_PTRMEM_P' will hold.  For a pointer to data member type of
+     the form `T X::*', `TYPE_PTRMEM_CLASS_TYPE' will be the type `X',
+     while `TYPE_PTRMEM_POINTED_TO_TYPE' will be the type `T'.
+
+`RECORD_TYPE'
+     Used to represent `struct' and `class' types in C and C++.  If
+     `TYPE_PTRMEMFUNC_P' holds, then this type is a pointer-to-member
+     type.  In that case, the `TYPE_PTRMEMFUNC_FN_TYPE' is a
+     `POINTER_TYPE' pointing to a `METHOD_TYPE'.  The `METHOD_TYPE' is
+     the type of a function pointed to by the pointer-to-member
+     function.  If `TYPE_PTRMEMFUNC_P' does not hold, this type is a
+     class type.  For more information, see *note Classes::.
+
+`UNKNOWN_TYPE'
+     This node is used to represent a type the knowledge of which is
+     insufficient for a sound processing.
+
+`TYPENAME_TYPE'
+     Used to represent a construct of the form `typename T::A'.  The
+     `TYPE_CONTEXT' is `T'; the `TYPE_NAME' is an `IDENTIFIER_NODE' for
+     `A'.  If the type is specified via a template-id, then
+     `TYPENAME_TYPE_FULLNAME' yields a `TEMPLATE_ID_EXPR'.  The
+     `TREE_TYPE' is non-`NULL' if the node is implicitly generated in
+     support for the implicit typename extension; in which case the
+     `TREE_TYPE' is a type node for the base-class.
+
+`TYPEOF_TYPE'
+     Used to represent the `__typeof__' extension.  The `TYPE_FIELDS'
+     is the expression the type of which is being represented.
+
+
+
+File: gccint.info,  Node: Namespaces,  Next: Classes,  Prev: Types for C++,  Up: C and C++ Trees
+
+11.10.2 Namespaces
+------------------
+
+The root of the entire intermediate representation is the variable
+`global_namespace'.  This is the namespace specified with `::' in C++
+source code.  All other namespaces, types, variables, functions, and so
+forth can be found starting with this namespace.
+
+ However, except for the fact that it is distinguished as the root of
+the representation, the global namespace is no different from any other
+namespace.  Thus, in what follows, we describe namespaces generally,
+rather than the global namespace in particular.
+
+ A namespace is represented by a `NAMESPACE_DECL' node.
+
+ The following macros and functions can be used on a `NAMESPACE_DECL':
+
+`DECL_NAME'
+     This macro is used to obtain the `IDENTIFIER_NODE' corresponding to
+     the unqualified name of the name of the namespace (*note
+     Identifiers::).  The name of the global namespace is `::', even
+     though in C++ the global namespace is unnamed.  However, you
+     should use comparison with `global_namespace', rather than
+     `DECL_NAME' to determine whether or not a namespace is the global
+     one.  An unnamed namespace will have a `DECL_NAME' equal to
+     `anonymous_namespace_name'.  Within a single translation unit, all
+     unnamed namespaces will have the same name.
+
+`DECL_CONTEXT'
+     This macro returns the enclosing namespace.  The `DECL_CONTEXT' for
+     the `global_namespace' is `NULL_TREE'.
+
+`DECL_NAMESPACE_ALIAS'
+     If this declaration is for a namespace alias, then
+     `DECL_NAMESPACE_ALIAS' is the namespace for which this one is an
+     alias.
+
+     Do not attempt to use `cp_namespace_decls' for a namespace which is
+     an alias.  Instead, follow `DECL_NAMESPACE_ALIAS' links until you
+     reach an ordinary, non-alias, namespace, and call
+     `cp_namespace_decls' there.
+
+`DECL_NAMESPACE_STD_P'
+     This predicate holds if the namespace is the special `::std'
+     namespace.
+
+`cp_namespace_decls'
+     This function will return the declarations contained in the
+     namespace, including types, overloaded functions, other
+     namespaces, and so forth.  If there are no declarations, this
+     function will return `NULL_TREE'.  The declarations are connected
+     through their `TREE_CHAIN' fields.
+
+     Although most entries on this list will be declarations,
+     `TREE_LIST' nodes may also appear.  In this case, the `TREE_VALUE'
+     will be an `OVERLOAD'.  The value of the `TREE_PURPOSE' is
+     unspecified; back ends should ignore this value.  As with the
+     other kinds of declarations returned by `cp_namespace_decls', the
+     `TREE_CHAIN' will point to the next declaration in this list.
+
+     For more information on the kinds of declarations that can occur
+     on this list, *Note Declarations::.  Some declarations will not
+     appear on this list.  In particular, no `FIELD_DECL',
+     `LABEL_DECL', or `PARM_DECL' nodes will appear here.
+
+     This function cannot be used with namespaces that have
+     `DECL_NAMESPACE_ALIAS' set.
+
+
+
+File: gccint.info,  Node: Classes,  Next: Functions for C++,  Prev: Namespaces,  Up: C and C++ Trees
+
+11.10.3 Classes
+---------------
+
+Besides namespaces, the other high-level scoping construct in C++ is the
+class.  (Throughout this manual the term "class" is used to mean the
+types referred to in the ANSI/ISO C++ Standard as classes; these include
+types defined with the `class', `struct', and `union' keywords.)
+
+ A class type is represented by either a `RECORD_TYPE' or a
+`UNION_TYPE'.  A class declared with the `union' tag is represented by
+a `UNION_TYPE', while classes declared with either the `struct' or the
+`class' tag are represented by `RECORD_TYPE's.  You can use the
+`CLASSTYPE_DECLARED_CLASS' macro to discern whether or not a particular
+type is a `class' as opposed to a `struct'.  This macro will be true
+only for classes declared with the `class' tag.
+
+ Almost all non-function members are available on the `TYPE_FIELDS'
+list.  Given one member, the next can be found by following the
+`TREE_CHAIN'.  You should not depend in any way on the order in which
+fields appear on this list.  All nodes on this list will be `DECL'
+nodes.  A `FIELD_DECL' is used to represent a non-static data member, a
+`VAR_DECL' is used to represent a static data member, and a `TYPE_DECL'
+is used to represent a type.  Note that the `CONST_DECL' for an
+enumeration constant will appear on this list, if the enumeration type
+was declared in the class.  (Of course, the `TYPE_DECL' for the
+enumeration type will appear here as well.)  There are no entries for
+base classes on this list.  In particular, there is no `FIELD_DECL' for
+the "base-class portion" of an object.
+
+ The `TYPE_VFIELD' is a compiler-generated field used to point to
+virtual function tables.  It may or may not appear on the `TYPE_FIELDS'
+list.  However, back ends should handle the `TYPE_VFIELD' just like all
+the entries on the `TYPE_FIELDS' list.
+
+ The function members are available on the `TYPE_METHODS' list.  Again,
+subsequent members are found by following the `TREE_CHAIN' field.  If a
+function is overloaded, each of the overloaded functions appears; no
+`OVERLOAD' nodes appear on the `TYPE_METHODS' list.  Implicitly
+declared functions (including default constructors, copy constructors,
+assignment operators, and destructors) will appear on this list as well.
+
+ Every class has an associated "binfo", which can be obtained with
+`TYPE_BINFO'.  Binfos are used to represent base-classes.  The binfo
+given by `TYPE_BINFO' is the degenerate case, whereby every class is
+considered to be its own base-class.  The base binfos for a particular
+binfo are held in a vector, whose length is obtained with
+`BINFO_N_BASE_BINFOS'.  The base binfos themselves are obtained with
+`BINFO_BASE_BINFO' and `BINFO_BASE_ITERATE'.  To add a new binfo, use
+`BINFO_BASE_APPEND'.  The vector of base binfos can be obtained with
+`BINFO_BASE_BINFOS', but normally you do not need to use that.  The
+class type associated with a binfo is given by `BINFO_TYPE'.  It is not
+always the case that `BINFO_TYPE (TYPE_BINFO (x))', because of typedefs
+and qualified types.  Neither is it the case that `TYPE_BINFO
+(BINFO_TYPE (y))' is the same binfo as `y'.  The reason is that if `y'
+is a binfo representing a base-class `B' of a derived class `D', then
+`BINFO_TYPE (y)' will be `B', and `TYPE_BINFO (BINFO_TYPE (y))' will be
+`B' as its own base-class, rather than as a base-class of `D'.
+
+ The access to a base type can be found with `BINFO_BASE_ACCESS'.  This
+will produce `access_public_node', `access_private_node' or
+`access_protected_node'.  If bases are always public,
+`BINFO_BASE_ACCESSES' may be `NULL'.
+
+ `BINFO_VIRTUAL_P' is used to specify whether the binfo is inherited
+virtually or not.  The other flags, `BINFO_MARKED_P' and `BINFO_FLAG_1'
+to `BINFO_FLAG_6' can be used for language specific use.
+
+ The following macros can be used on a tree node representing a
+class-type.
+
+`LOCAL_CLASS_P'
+     This predicate holds if the class is local class _i.e._ declared
+     inside a function body.
+
+`TYPE_POLYMORPHIC_P'
+     This predicate holds if the class has at least one virtual function
+     (declared or inherited).
+
+`TYPE_HAS_DEFAULT_CONSTRUCTOR'
+     This predicate holds whenever its argument represents a class-type
+     with default constructor.
+
+`CLASSTYPE_HAS_MUTABLE'
+`TYPE_HAS_MUTABLE_P'
+     These predicates hold for a class-type having a mutable data
+     member.
+
+`CLASSTYPE_NON_POD_P'
+     This predicate holds only for class-types that are not PODs.
+
+`TYPE_HAS_NEW_OPERATOR'
+     This predicate holds for a class-type that defines `operator new'.
+
+`TYPE_HAS_ARRAY_NEW_OPERATOR'
+     This predicate holds for a class-type for which `operator new[]'
+     is defined.
+
+`TYPE_OVERLOADS_CALL_EXPR'
+     This predicate holds for class-type for which the function call
+     `operator()' is overloaded.
+
+`TYPE_OVERLOADS_ARRAY_REF'
+     This predicate holds for a class-type that overloads `operator[]'
+
+`TYPE_OVERLOADS_ARROW'
+     This predicate holds for a class-type for which `operator->' is
+     overloaded.
+
+
+
+File: gccint.info,  Node: Functions for C++,  Next: Statements for C++,  Prev: Classes,  Up: C and C++ Trees
+
+11.10.4 Functions for C++
+-------------------------
+
+A function is represented by a `FUNCTION_DECL' node.  A set of
+overloaded functions is sometimes represented by an `OVERLOAD' node.
+
+ An `OVERLOAD' node is not a declaration, so none of the `DECL_' macros
+should be used on an `OVERLOAD'.  An `OVERLOAD' node is similar to a
+`TREE_LIST'.  Use `OVL_CURRENT' to get the function associated with an
+`OVERLOAD' node; use `OVL_NEXT' to get the next `OVERLOAD' node in the
+list of overloaded functions.  The macros `OVL_CURRENT' and `OVL_NEXT'
+are actually polymorphic; you can use them to work with `FUNCTION_DECL'
+nodes as well as with overloads.  In the case of a `FUNCTION_DECL',
+`OVL_CURRENT' will always return the function itself, and `OVL_NEXT'
+will always be `NULL_TREE'.
+
+ To determine the scope of a function, you can use the `DECL_CONTEXT'
+macro.  This macro will return the class (either a `RECORD_TYPE' or a
+`UNION_TYPE') or namespace (a `NAMESPACE_DECL') of which the function
+is a member.  For a virtual function, this macro returns the class in
+which the function was actually defined, not the base class in which
+the virtual declaration occurred.
+
+ If a friend function is defined in a class scope, the
+`DECL_FRIEND_CONTEXT' macro can be used to determine the class in which
+it was defined.  For example, in
+     class C { friend void f() {} };
+ the `DECL_CONTEXT' for `f' will be the `global_namespace', but the
+`DECL_FRIEND_CONTEXT' will be the `RECORD_TYPE' for `C'.
+
+ The following macros and functions can be used on a `FUNCTION_DECL':
+`DECL_MAIN_P'
+     This predicate holds for a function that is the program entry point
+     `::code'.
+
+`DECL_LOCAL_FUNCTION_P'
+     This predicate holds if the function was declared at block scope,
+     even though it has a global scope.
+
+`DECL_ANTICIPATED'
+     This predicate holds if the function is a built-in function but its
+     prototype is not yet explicitly declared.
+
+`DECL_EXTERN_C_FUNCTION_P'
+     This predicate holds if the function is declared as an ``extern
+     "C"'' function.
+
+`DECL_LINKONCE_P'
+     This macro holds if multiple copies of this function may be
+     emitted in various translation units.  It is the responsibility of
+     the linker to merge the various copies.  Template instantiations
+     are the most common example of functions for which
+     `DECL_LINKONCE_P' holds; G++ instantiates needed templates in all
+     translation units which require them, and then relies on the
+     linker to remove duplicate instantiations.
+
+     FIXME: This macro is not yet implemented.
+
+`DECL_FUNCTION_MEMBER_P'
+     This macro holds if the function is a member of a class, rather
+     than a member of a namespace.
+
+`DECL_STATIC_FUNCTION_P'
+     This predicate holds if the function a static member function.
+
+`DECL_NONSTATIC_MEMBER_FUNCTION_P'
+     This macro holds for a non-static member function.
+
+`DECL_CONST_MEMFUNC_P'
+     This predicate holds for a `const'-member function.
+
+`DECL_VOLATILE_MEMFUNC_P'
+     This predicate holds for a `volatile'-member function.
+
+`DECL_CONSTRUCTOR_P'
+     This macro holds if the function is a constructor.
+
+`DECL_NONCONVERTING_P'
+     This predicate holds if the constructor is a non-converting
+     constructor.
+
+`DECL_COMPLETE_CONSTRUCTOR_P'
+     This predicate holds for a function which is a constructor for an
+     object of a complete type.
+
+`DECL_BASE_CONSTRUCTOR_P'
+     This predicate holds for a function which is a constructor for a
+     base class sub-object.
+
+`DECL_COPY_CONSTRUCTOR_P'
+     This predicate holds for a function which is a copy-constructor.
+
+`DECL_DESTRUCTOR_P'
+     This macro holds if the function is a destructor.
+
+`DECL_COMPLETE_DESTRUCTOR_P'
+     This predicate holds if the function is the destructor for an
+     object a complete type.
+
+`DECL_OVERLOADED_OPERATOR_P'
+     This macro holds if the function is an overloaded operator.
+
+`DECL_CONV_FN_P'
+     This macro holds if the function is a type-conversion operator.
+
+`DECL_GLOBAL_CTOR_P'
+     This predicate holds if the function is a file-scope initialization
+     function.
+
+`DECL_GLOBAL_DTOR_P'
+     This predicate holds if the function is a file-scope finalization
+     function.
+
+`DECL_THUNK_P'
+     This predicate holds if the function is a thunk.
+
+     These functions represent stub code that adjusts the `this' pointer
+     and then jumps to another function.  When the jumped-to function
+     returns, control is transferred directly to the caller, without
+     returning to the thunk.  The first parameter to the thunk is
+     always the `this' pointer; the thunk should add `THUNK_DELTA' to
+     this value.  (The `THUNK_DELTA' is an `int', not an `INTEGER_CST'.)
+
+     Then, if `THUNK_VCALL_OFFSET' (an `INTEGER_CST') is nonzero the
+     adjusted `this' pointer must be adjusted again.  The complete
+     calculation is given by the following pseudo-code:
+
+          this += THUNK_DELTA
+          if (THUNK_VCALL_OFFSET)
+            this += (*((ptrdiff_t **) this))[THUNK_VCALL_OFFSET]
+
+     Finally, the thunk should jump to the location given by
+     `DECL_INITIAL'; this will always be an expression for the address
+     of a function.
+
+`DECL_NON_THUNK_FUNCTION_P'
+     This predicate holds if the function is _not_ a thunk function.
+
+`GLOBAL_INIT_PRIORITY'
+     If either `DECL_GLOBAL_CTOR_P' or `DECL_GLOBAL_DTOR_P' holds, then
+     this gives the initialization priority for the function.  The
+     linker will arrange that all functions for which
+     `DECL_GLOBAL_CTOR_P' holds are run in increasing order of priority
+     before `main' is called.  When the program exits, all functions for
+     which `DECL_GLOBAL_DTOR_P' holds are run in the reverse order.
+
+`TYPE_RAISES_EXCEPTIONS'
+     This macro returns the list of exceptions that a (member-)function
+     can raise.  The returned list, if non `NULL', is comprised of nodes
+     whose `TREE_VALUE' represents a type.
+
+`TYPE_NOTHROW_P'
+     This predicate holds when the exception-specification of its
+     arguments is of the form ``()''.
+
+`DECL_ARRAY_DELETE_OPERATOR_P'
+     This predicate holds if the function an overloaded `operator
+     delete[]'.
+
+
+
+File: gccint.info,  Node: Statements for C++,  Next: C++ Expressions,  Prev: Functions for C++,  Up: C and C++ Trees
+
+11.10.5 Statements for C++
+--------------------------
+
+A function that has a definition in the current translation unit will
+have a non-`NULL' `DECL_INITIAL'.  However, back ends should not make
+use of the particular value given by `DECL_INITIAL'.
+
+ The `DECL_SAVED_TREE' macro will give the complete body of the
+function.
+
+11.10.5.1 Statements
+....................
+
+There are tree nodes corresponding to all of the source-level statement
+constructs, used within the C and C++ frontends.  These are enumerated
+here, together with a list of the various macros that can be used to
+obtain information about them.  There are a few macros that can be used
+with all statements:
+
+`STMT_IS_FULL_EXPR_P'
+     In C++, statements normally constitute "full expressions";
+     temporaries created during a statement are destroyed when the
+     statement is complete.  However, G++ sometimes represents
+     expressions by statements; these statements will not have
+     `STMT_IS_FULL_EXPR_P' set.  Temporaries created during such
+     statements should be destroyed when the innermost enclosing
+     statement with `STMT_IS_FULL_EXPR_P' set is exited.
+
+
+ Here is the list of the various statement nodes, and the macros used to
+access them.  This documentation describes the use of these nodes in
+non-template functions (including instantiations of template functions).
+In template functions, the same nodes are used, but sometimes in
+slightly different ways.
+
+ Many of the statements have substatements.  For example, a `while'
+loop will have a body, which is itself a statement.  If the substatement
+is `NULL_TREE', it is considered equivalent to a statement consisting
+of a single `;', i.e., an expression statement in which the expression
+has been omitted.  A substatement may in fact be a list of statements,
+connected via their `TREE_CHAIN's.  So, you should always process the
+statement tree by looping over substatements, like this:
+     void process_stmt (stmt)
+          tree stmt;
+     {
+       while (stmt)
+         {
+           switch (TREE_CODE (stmt))
+             {
+             case IF_STMT:
+               process_stmt (THEN_CLAUSE (stmt));
+               /* More processing here.  */
+               break;
+
+             ...
+             }
+
+           stmt = TREE_CHAIN (stmt);
+         }
+     }
+ In other words, while the `then' clause of an `if' statement in C++
+can be only one statement (although that one statement may be a
+compound statement), the intermediate representation will sometimes use
+several statements chained together.
+
+`BREAK_STMT'
+     Used to represent a `break' statement.  There are no additional
+     fields.
+
+`CLEANUP_STMT'
+     Used to represent an action that should take place upon exit from
+     the enclosing scope.  Typically, these actions are calls to
+     destructors for local objects, but back ends cannot rely on this
+     fact.  If these nodes are in fact representing such destructors,
+     `CLEANUP_DECL' will be the `VAR_DECL' destroyed.  Otherwise,
+     `CLEANUP_DECL' will be `NULL_TREE'.  In any case, the
+     `CLEANUP_EXPR' is the expression to execute.  The cleanups
+     executed on exit from a scope should be run in the reverse order
+     of the order in which the associated `CLEANUP_STMT's were
+     encountered.
+
+`CONTINUE_STMT'
+     Used to represent a `continue' statement.  There are no additional
+     fields.
+
+`CTOR_STMT'
+     Used to mark the beginning (if `CTOR_BEGIN_P' holds) or end (if
+     `CTOR_END_P' holds of the main body of a constructor.  See also
+     `SUBOBJECT' for more information on how to use these nodes.
+
+`DO_STMT'
+     Used to represent a `do' loop.  The body of the loop is given by
+     `DO_BODY' while the termination condition for the loop is given by
+     `DO_COND'.  The condition for a `do'-statement is always an
+     expression.
+
+`EMPTY_CLASS_EXPR'
+     Used to represent a temporary object of a class with no data whose
+     address is never taken.  (All such objects are interchangeable.)
+     The `TREE_TYPE' represents the type of the object.
+
+`EXPR_STMT'
+     Used to represent an expression statement.  Use `EXPR_STMT_EXPR' to
+     obtain the expression.
+
+`FOR_STMT'
+     Used to represent a `for' statement.  The `FOR_INIT_STMT' is the
+     initialization statement for the loop.  The `FOR_COND' is the
+     termination condition.  The `FOR_EXPR' is the expression executed
+     right before the `FOR_COND' on each loop iteration; often, this
+     expression increments a counter.  The body of the loop is given by
+     `FOR_BODY'.  Note that `FOR_INIT_STMT' and `FOR_BODY' return
+     statements, while `FOR_COND' and `FOR_EXPR' return expressions.
+
+`HANDLER'
+     Used to represent a C++ `catch' block.  The `HANDLER_TYPE' is the
+     type of exception that will be caught by this handler; it is equal
+     (by pointer equality) to `NULL' if this handler is for all types.
+     `HANDLER_PARMS' is the `DECL_STMT' for the catch parameter, and
+     `HANDLER_BODY' is the code for the block itself.
+
+`IF_STMT'
+     Used to represent an `if' statement.  The `IF_COND' is the
+     expression.
+
+     If the condition is a `TREE_LIST', then the `TREE_PURPOSE' is a
+     statement (usually a `DECL_STMT').  Each time the condition is
+     evaluated, the statement should be executed.  Then, the
+     `TREE_VALUE' should be used as the conditional expression itself.
+     This representation is used to handle C++ code like this:
+
+     C++ distinguishes between this and `COND_EXPR' for handling
+     templates.
+
+          if (int i = 7) ...
+
+     where there is a new local variable (or variables) declared within
+     the condition.
+
+     The `THEN_CLAUSE' represents the statement given by the `then'
+     condition, while the `ELSE_CLAUSE' represents the statement given
+     by the `else' condition.
+
+`SUBOBJECT'
+     In a constructor, these nodes are used to mark the point at which a
+     subobject of `this' is fully constructed.  If, after this point, an
+     exception is thrown before a `CTOR_STMT' with `CTOR_END_P' set is
+     encountered, the `SUBOBJECT_CLEANUP' must be executed.  The
+     cleanups must be executed in the reverse order in which they
+     appear.
+
+`SWITCH_STMT'
+     Used to represent a `switch' statement.  The `SWITCH_STMT_COND' is
+     the expression on which the switch is occurring.  See the
+     documentation for an `IF_STMT' for more information on the
+     representation used for the condition.  The `SWITCH_STMT_BODY' is
+     the body of the switch statement.   The `SWITCH_STMT_TYPE' is the
+     original type of switch expression as given in the source, before
+     any compiler conversions.
+
+`TRY_BLOCK'
+     Used to represent a `try' block.  The body of the try block is
+     given by `TRY_STMTS'.  Each of the catch blocks is a `HANDLER'
+     node.  The first handler is given by `TRY_HANDLERS'.  Subsequent
+     handlers are obtained by following the `TREE_CHAIN' link from one
+     handler to the next.  The body of the handler is given by
+     `HANDLER_BODY'.
+
+     If `CLEANUP_P' holds of the `TRY_BLOCK', then the `TRY_HANDLERS'
+     will not be a `HANDLER' node.  Instead, it will be an expression
+     that should be executed if an exception is thrown in the try
+     block.  It must rethrow the exception after executing that code.
+     And, if an exception is thrown while the expression is executing,
+     `terminate' must be called.
+
+`USING_STMT'
+     Used to represent a `using' directive.  The namespace is given by
+     `USING_STMT_NAMESPACE', which will be a NAMESPACE_DECL.  This node
+     is needed inside template functions, to implement using directives
+     during instantiation.
+
+`WHILE_STMT'
+     Used to represent a `while' loop.  The `WHILE_COND' is the
+     termination condition for the loop.  See the documentation for an
+     `IF_STMT' for more information on the representation used for the
+     condition.
+
+     The `WHILE_BODY' is the body of the loop.
+
+
+
+File: gccint.info,  Node: C++ Expressions,  Prev: Statements for C++,  Up: C and C++ Trees
+
+11.10.6 C++ Expressions
+-----------------------
+
+This section describes expressions specific to the C and C++ front ends.
+
+`TYPEID_EXPR'
+     Used to represent a `typeid' expression.
+
+`NEW_EXPR'
+`VEC_NEW_EXPR'
+     Used to represent a call to `new' and `new[]' respectively.
+
+`DELETE_EXPR'
+`VEC_DELETE_EXPR'
+     Used to represent a call to `delete' and `delete[]' respectively.
+
+`MEMBER_REF'
+     Represents a reference to a member of a class.
+
+`THROW_EXPR'
+     Represents an instance of `throw' in the program.  Operand 0,
+     which is the expression to throw, may be `NULL_TREE'.
+
+`AGGR_INIT_EXPR'
+     An `AGGR_INIT_EXPR' represents the initialization as the return
+     value of a function call, or as the result of a constructor.  An
+     `AGGR_INIT_EXPR' will only appear as a full-expression, or as the
+     second operand of a `TARGET_EXPR'.  `AGGR_INIT_EXPR's have a
+     representation similar to that of `CALL_EXPR's.  You can use the
+     `AGGR_INIT_EXPR_FN' and `AGGR_INIT_EXPR_ARG' macros to access the
+     function to call and the arguments to pass.
+
+     If `AGGR_INIT_VIA_CTOR_P' holds of the `AGGR_INIT_EXPR', then the
+     initialization is via a constructor call.  The address of the
+     `AGGR_INIT_EXPR_SLOT' operand, which is always a `VAR_DECL', is
+     taken, and this value replaces the first argument in the argument
+     list.
+
+     In either case, the expression is void.
+
+
+
+File: gccint.info,  Node: Java Trees,  Prev: C and C++ Trees,  Up: GENERIC
+
+11.11 Java Trees
+================
+
+
+File: gccint.info,  Node: GIMPLE,  Next: Tree SSA,  Prev: GENERIC,  Up: Top
+
+12 GIMPLE
+*********
+
+GIMPLE is a three-address representation derived from GENERIC by
+breaking down GENERIC expressions into tuples of no more than 3
+operands (with some exceptions like function calls).  GIMPLE was
+heavily influenced by the SIMPLE IL used by the McCAT compiler project
+at McGill University, though we have made some different choices.  For
+one thing, SIMPLE doesn't support `goto'.
+
+ Temporaries are introduced to hold intermediate values needed to
+compute complex expressions. Additionally, all the control structures
+used in GENERIC are lowered into conditional jumps, lexical scopes are
+removed and exception regions are converted into an on the side
+exception region tree.
+
+ The compiler pass which converts GENERIC into GIMPLE is referred to as
+the `gimplifier'.  The gimplifier works recursively, generating GIMPLE
+tuples out of the original GENERIC expressions.
+
+ One of the early implementation strategies used for the GIMPLE
+representation was to use the same internal data structures used by
+front ends to represent parse trees. This simplified implementation
+because we could leverage existing functionality and interfaces.
+However, GIMPLE is a much more restrictive representation than abstract
+syntax trees (AST), therefore it does not require the full structural
+complexity provided by the main tree data structure.
+
+ The GENERIC representation of a function is stored in the
+`DECL_SAVED_TREE' field of the associated `FUNCTION_DECL' tree node.
+It is converted to GIMPLE by a call to `gimplify_function_tree'.
+
+ If a front end wants to include language-specific tree codes in the
+tree representation which it provides to the back end, it must provide a
+definition of `LANG_HOOKS_GIMPLIFY_EXPR' which knows how to convert the
+front end trees to GIMPLE.  Usually such a hook will involve much of
+the same code for expanding front end trees to RTL.  This function can
+return fully lowered GIMPLE, or it can return GENERIC trees and let the
+main gimplifier lower them the rest of the way; this is often simpler.
+GIMPLE that is not fully lowered is known as "High GIMPLE" and consists
+of the IL before the pass `pass_lower_cf'.  High GIMPLE contains some
+container statements like lexical scopes (represented by `GIMPLE_BIND')
+and nested expressions (e.g., `GIMPLE_TRY'), while "Low GIMPLE" exposes
+all of the implicit jumps for control and exception expressions
+directly in the IL and EH region trees.
+
+ The C and C++ front ends currently convert directly from front end
+trees to GIMPLE, and hand that off to the back end rather than first
+converting to GENERIC.  Their gimplifier hooks know about all the
+`_STMT' nodes and how to convert them to GENERIC forms.  There was some
+work done on a genericization pass which would run first, but the
+existence of `STMT_EXPR' meant that in order to convert all of the C
+statements into GENERIC equivalents would involve walking the entire
+tree anyway, so it was simpler to lower all the way.  This might change
+in the future if someone writes an optimization pass which would work
+better with higher-level trees, but currently the optimizers all expect
+GIMPLE.
+
+ You can request to dump a C-like representation of the GIMPLE form
+with the flag `-fdump-tree-gimple'.
+
+* Menu:
+
+* Tuple representation::
+* GIMPLE instruction set::
+* GIMPLE Exception Handling::
+* Temporaries::
+* Operands::
+* Manipulating GIMPLE statements::
+* Tuple specific accessors::
+* GIMPLE sequences::
+* Sequence iterators::
+* Adding a new GIMPLE statement code::
+* Statement and operand traversals::
+
+
+File: gccint.info,  Node: Tuple representation,  Next: GIMPLE instruction set,  Up: GIMPLE
+
+12.1 Tuple representation
+=========================
+
+GIMPLE instructions are tuples of variable size divided in two groups:
+a header describing the instruction and its locations, and a variable
+length body with all the operands. Tuples are organized into a
+hierarchy with 3 main classes of tuples.
+
+12.1.1 `gimple_statement_base' (gsbase)
+---------------------------------------
+
+This is the root of the hierarchy, it holds basic information needed by
+most GIMPLE statements. There are some fields that may not be relevant
+to every GIMPLE statement, but those were moved into the base structure
+to take advantage of holes left by other fields (thus making the
+structure more compact).  The structure takes 4 words (32 bytes) on 64
+bit hosts:
+
+Field                   Size (bits)
+`code'                  8
+`subcode'               16
+`no_warning'            1
+`visited'               1
+`nontemporal_move'      1
+`plf'                   2
+`modified'              1
+`has_volatile_ops'      1
+`references_memory_p'   1
+`uid'                   32
+`location'              32
+`num_ops'               32
+`bb'                    64
+`block'                 63
+Total size              32 bytes
+
+   * `code' Main identifier for a GIMPLE instruction.
+
+   * `subcode' Used to distinguish different variants of the same basic
+     instruction or provide flags applicable to a given code. The
+     `subcode' flags field has different uses depending on the code of
+     the instruction, but mostly it distinguishes instructions of the
+     same family. The most prominent use of this field is in
+     assignments, where subcode indicates the operation done on the RHS
+     of the assignment. For example, a = b + c is encoded as
+     `GIMPLE_ASSIGN <PLUS_EXPR, a, b, c>'.
+
+   * `no_warning' Bitflag to indicate whether a warning has already
+     been issued on this statement.
+
+   * `visited' General purpose "visited" marker. Set and cleared by
+     each pass when needed.
+
+   * `nontemporal_move' Bitflag used in assignments that represent
+     non-temporal moves.  Although this bitflag is only used in
+     assignments, it was moved into the base to take advantage of the
+     bit holes left by the previous fields.
+
+   * `plf' Pass Local Flags. This 2-bit mask can be used as general
+     purpose markers by any pass. Passes are responsible for clearing
+     and setting these two flags accordingly.
+
+   * `modified' Bitflag to indicate whether the statement has been
+     modified.  Used mainly by the operand scanner to determine when to
+     re-scan a statement for operands.
+
+   * `has_volatile_ops' Bitflag to indicate whether this statement
+     contains operands that have been marked volatile.
+
+   * `references_memory_p' Bitflag to indicate whether this statement
+     contains memory references (i.e., its operands are either global
+     variables, or pointer dereferences or anything that must reside in
+     memory).
+
+   * `uid' This is an unsigned integer used by passes that want to
+     assign IDs to every statement. These IDs must be assigned and used
+     by each pass.
+
+   * `location' This is a `location_t' identifier to specify source code
+     location for this statement. It is inherited from the front end.
+
+   * `num_ops' Number of operands that this statement has. This
+     specifies the size of the operand vector embedded in the tuple.
+     Only used in some tuples, but it is declared in the base tuple to
+     take advantage of the 32-bit hole left by the previous fields.
+
+   * `bb' Basic block holding the instruction.
+
+   * `block' Lexical block holding this statement.  Also used for debug
+     information generation.
+
+12.1.2 `gimple_statement_with_ops'
+----------------------------------
+
+This tuple is actually split in two: `gimple_statement_with_ops_base'
+and `gimple_statement_with_ops'. This is needed to accommodate the way
+the operand vector is allocated. The operand vector is defined to be an
+array of 1 element. So, to allocate a dynamic number of operands, the
+memory allocator (`gimple_alloc') simply allocates enough memory to
+hold the structure itself plus `N - 1' operands which run "off the end"
+of the structure. For example, to allocate space for a tuple with 3
+operands, `gimple_alloc' reserves `sizeof (struct
+gimple_statement_with_ops) + 2 * sizeof (tree)' bytes.
+
+ On the other hand, several fields in this tuple need to be shared with
+the `gimple_statement_with_memory_ops' tuple. So, these common fields
+are placed in `gimple_statement_with_ops_base' which is then inherited
+from the other two tuples.
+
+`gsbase'            256
+`addresses_taken'   64
+`def_ops'           64
+`use_ops'           64
+`op'                `num_ops' * 64
+Total size          56 + 8 * `num_ops' bytes
+
+   * `gsbase' Inherited from `struct gimple_statement_base'.
+
+   * `addresses_taken' Bitmap holding the UIDs of all the `VAR_DECL's
+     whose addresses are taken by this statement. For example, a
+     statement of the form `p = &b' will have the UID for symbol `b' in
+     this set.
+
+   * `def_ops' Array of pointers into the operand array indicating all
+     the slots that contain a variable written-to by the statement.
+     This array is also used for immediate use chaining. Note that it
+     would be possible to not rely on this array, but the changes
+     required to implement this are pretty invasive.
+
+   * `use_ops' Similar to `def_ops' but for variables read by the
+     statement.
+
+   * `op' Array of trees with `num_ops' slots.
+
+12.1.3 `gimple_statement_with_memory_ops'
+-----------------------------------------
+
+This tuple is essentially identical to `gimple_statement_with_ops',
+except that it contains 4 additional fields to hold vectors related
+memory stores and loads.  Similar to the previous case, the structure
+is split in two to accommodate for the operand vector
+(`gimple_statement_with_memory_ops_base' and
+`gimple_statement_with_memory_ops').
+
+Field               Size (bits)
+`gsbase'            256
+`addresses_taken'   64
+`def_ops'           64
+`use_ops'           64
+`vdef_ops'          64
+`vuse_ops'          64
+`stores'            64
+`loads'             64
+`op'                `num_ops' * 64
+Total size          88 + 8 * `num_ops' bytes
+
+   * `vdef_ops' Similar to `def_ops' but for `VDEF' operators. There is
+     one entry per memory symbol written by this statement. This is
+     used to maintain the memory SSA use-def and def-def chains.
+
+   * `vuse_ops' Similar to `use_ops' but for `VUSE' operators. There is
+     one entry per memory symbol loaded by this statement. This is used
+     to maintain the memory SSA use-def chains.
+
+   * `stores' Bitset with all the UIDs for the symbols written-to by the
+     statement.  This is different than `vdef_ops' in that all the
+     affected symbols are mentioned in this set.  If memory
+     partitioning is enabled, the `vdef_ops' vector will refer to memory
+     partitions. Furthermore, no SSA information is stored in this set.
+
+   * `loads' Similar to `stores', but for memory loads. (Note that there
+     is some amount of redundancy here, it should be possible to reduce
+     memory utilization further by removing these sets).
+
+ All the other tuples are defined in terms of these three basic ones.
+Each tuple will add some fields. The main gimple type is defined to be
+the union of all these structures (`GTY' markers elided for clarity):
+
+     union gimple_statement_d
+     {
+       struct gimple_statement_base gsbase;
+       struct gimple_statement_with_ops gsops;
+       struct gimple_statement_with_memory_ops gsmem;
+       struct gimple_statement_omp omp;
+       struct gimple_statement_bind gimple_bind;
+       struct gimple_statement_catch gimple_catch;
+       struct gimple_statement_eh_filter gimple_eh_filter;
+       struct gimple_statement_phi gimple_phi;
+       struct gimple_statement_resx gimple_resx;
+       struct gimple_statement_try gimple_try;
+       struct gimple_statement_wce gimple_wce;
+       struct gimple_statement_asm gimple_asm;
+       struct gimple_statement_omp_critical gimple_omp_critical;
+       struct gimple_statement_omp_for gimple_omp_for;
+       struct gimple_statement_omp_parallel gimple_omp_parallel;
+       struct gimple_statement_omp_task gimple_omp_task;
+       struct gimple_statement_omp_sections gimple_omp_sections;
+       struct gimple_statement_omp_single gimple_omp_single;
+       struct gimple_statement_omp_continue gimple_omp_continue;
+       struct gimple_statement_omp_atomic_load gimple_omp_atomic_load;
+       struct gimple_statement_omp_atomic_store gimple_omp_atomic_store;
+     };
+
+
+File: gccint.info,  Node: GIMPLE instruction set,  Next: GIMPLE Exception Handling,  Prev: Tuple representation,  Up: GIMPLE
+
+12.2 GIMPLE instruction set
+===========================
+
+The following table briefly describes the GIMPLE instruction set.
+
+Instruction                    High GIMPLE   Low GIMPLE
+`GIMPLE_ASM'                   x             x
+`GIMPLE_ASSIGN'                x             x
+`GIMPLE_BIND'                  x             
+`GIMPLE_CALL'                  x             x
+`GIMPLE_CATCH'                 x             
+`GIMPLE_COND'                  x             x
+`GIMPLE_DEBUG'                 x             x
+`GIMPLE_EH_FILTER'             x             
+`GIMPLE_GOTO'                  x             x
+`GIMPLE_LABEL'                 x             x
+`GIMPLE_NOP'                   x             x
+`GIMPLE_OMP_ATOMIC_LOAD'       x             x
+`GIMPLE_OMP_ATOMIC_STORE'      x             x
+`GIMPLE_OMP_CONTINUE'          x             x
+`GIMPLE_OMP_CRITICAL'          x             x
+`GIMPLE_OMP_FOR'               x             x
+`GIMPLE_OMP_MASTER'            x             x
+`GIMPLE_OMP_ORDERED'           x             x
+`GIMPLE_OMP_PARALLEL'          x             x
+`GIMPLE_OMP_RETURN'            x             x
+`GIMPLE_OMP_SECTION'           x             x
+`GIMPLE_OMP_SECTIONS'          x             x
+`GIMPLE_OMP_SECTIONS_SWITCH'   x             x
+`GIMPLE_OMP_SINGLE'            x             x
+`GIMPLE_PHI'                                 x
+`GIMPLE_RESX'                                x
+`GIMPLE_RETURN'                x             x
+`GIMPLE_SWITCH'                x             x
+`GIMPLE_TRY'                   x             
+
+
+File: gccint.info,  Node: GIMPLE Exception Handling,  Next: Temporaries,  Prev: GIMPLE instruction set,  Up: GIMPLE
+
+12.3 Exception Handling
+=======================
+
+Other exception handling constructs are represented using
+`GIMPLE_TRY_CATCH'.  `GIMPLE_TRY_CATCH' has two operands.  The first
+operand is a sequence of statements to execute.  If executing these
+statements does not throw an exception, then the second operand is
+ignored.  Otherwise, if an exception is thrown, then the second operand
+of the `GIMPLE_TRY_CATCH' is checked.  The second operand may have the
+following forms:
+
+  1. A sequence of statements to execute.  When an exception occurs,
+     these statements are executed, and then the exception is rethrown.
+
+  2. A sequence of `GIMPLE_CATCH' statements.  Each `GIMPLE_CATCH' has
+     a list of applicable exception types and handler code.  If the
+     thrown exception matches one of the caught types, the associated
+     handler code is executed.  If the handler code falls off the
+     bottom, execution continues after the original `GIMPLE_TRY_CATCH'.
+
+  3. A `GIMPLE_EH_FILTER' statement.  This has a list of permitted
+     exception types, and code to handle a match failure.  If the
+     thrown exception does not match one of the allowed types, the
+     associated match failure code is executed.  If the thrown exception
+     does match, it continues unwinding the stack looking for the next
+     handler.
+
+
+ Currently throwing an exception is not directly represented in GIMPLE,
+since it is implemented by calling a function.  At some point in the
+future we will want to add some way to express that the call will throw
+an exception of a known type.
+
+ Just before running the optimizers, the compiler lowers the high-level
+EH constructs above into a set of `goto's, magic labels, and EH
+regions.  Continuing to unwind at the end of a cleanup is represented
+with a `GIMPLE_RESX'.
+
+
+File: gccint.info,  Node: Temporaries,  Next: Operands,  Prev: GIMPLE Exception Handling,  Up: GIMPLE
+
+12.4 Temporaries
+================
+
+When gimplification encounters a subexpression that is too complex, it
+creates a new temporary variable to hold the value of the
+subexpression, and adds a new statement to initialize it before the
+current statement. These special temporaries are known as `expression
+temporaries', and are allocated using `get_formal_tmp_var'.  The
+compiler tries to always evaluate identical expressions into the same
+temporary, to simplify elimination of redundant calculations.
+
+ We can only use expression temporaries when we know that it will not
+be reevaluated before its value is used, and that it will not be
+otherwise modified(1). Other temporaries can be allocated using
+`get_initialized_tmp_var' or `create_tmp_var'.
+
+ Currently, an expression like `a = b + 5' is not reduced any further.
+We tried converting it to something like
+       T1 = b + 5;
+       a = T1;
+ but this bloated the representation for minimal benefit.  However, a
+variable which must live in memory cannot appear in an expression; its
+value is explicitly loaded into a temporary first.  Similarly, storing
+the value of an expression to a memory variable goes through a
+temporary.
+
+ ---------- Footnotes ----------
+
+ (1) These restrictions are derived from those in Morgan 4.8.
+
+
+File: gccint.info,  Node: Operands,  Next: Manipulating GIMPLE statements,  Prev: Temporaries,  Up: GIMPLE
+
+12.5 Operands
+=============
+
+In general, expressions in GIMPLE consist of an operation and the
+appropriate number of simple operands; these operands must either be a
+GIMPLE rvalue (`is_gimple_val'), i.e. a constant or a register
+variable.  More complex operands are factored out into temporaries, so
+that
+       a = b + c + d
+ becomes
+       T1 = b + c;
+       a = T1 + d;
+
+ The same rule holds for arguments to a `GIMPLE_CALL'.
+
+ The target of an assignment is usually a variable, but can also be an
+`INDIRECT_REF' or a compound lvalue as described below.
+
+* Menu:
+
+* Compound Expressions::
+* Compound Lvalues::
+* Conditional Expressions::
+* Logical Operators::
+
+
+File: gccint.info,  Node: Compound Expressions,  Next: Compound Lvalues,  Up: Operands
+
+12.5.1 Compound Expressions
+---------------------------
+
+The left-hand side of a C comma expression is simply moved into a
+separate statement.
+
+
+File: gccint.info,  Node: Compound Lvalues,  Next: Conditional Expressions,  Prev: Compound Expressions,  Up: Operands
+
+12.5.2 Compound Lvalues
+-----------------------
+
+Currently compound lvalues involving array and structure field
+references are not broken down; an expression like `a.b[2] = 42' is not
+reduced any further (though complex array subscripts are).  This
+restriction is a workaround for limitations in later optimizers; if we
+were to convert this to
+
+       T1 = &a.b;
+       T1[2] = 42;
+
+ alias analysis would not remember that the reference to `T1[2]' came
+by way of `a.b', so it would think that the assignment could alias
+another member of `a'; this broke `struct-alias-1.c'.  Future optimizer
+improvements may make this limitation unnecessary.
+
+
+File: gccint.info,  Node: Conditional Expressions,  Next: Logical Operators,  Prev: Compound Lvalues,  Up: Operands
+
+12.5.3 Conditional Expressions
+------------------------------
+
+A C `?:' expression is converted into an `if' statement with each
+branch assigning to the same temporary.  So,
+
+       a = b ? c : d;
+ becomes
+       if (b == 1)
+         T1 = c;
+       else
+         T1 = d;
+       a = T1;
+
+ The GIMPLE level if-conversion pass re-introduces `?:' expression, if
+appropriate. It is used to vectorize loops with conditions using vector
+conditional operations.
+
+ Note that in GIMPLE, `if' statements are represented using
+`GIMPLE_COND', as described below.
+
+
+File: gccint.info,  Node: Logical Operators,  Prev: Conditional Expressions,  Up: Operands
+
+12.5.4 Logical Operators
+------------------------
+
+Except when they appear in the condition operand of a `GIMPLE_COND',
+logical `and' and `or' operators are simplified as follows: `a = b &&
+c' becomes
+
+       T1 = (bool)b;
+       if (T1 == true)
+         T1 = (bool)c;
+       a = T1;
+
+ Note that `T1' in this example cannot be an expression temporary,
+because it has two different assignments.
+
+12.5.5 Manipulating operands
+----------------------------
+
+All gimple operands are of type `tree'.  But only certain types of
+trees are allowed to be used as operand tuples.  Basic validation is
+controlled by the function `get_gimple_rhs_class', which given a tree
+code, returns an `enum' with the following values of type `enum
+gimple_rhs_class'
+
+   * `GIMPLE_INVALID_RHS' The tree cannot be used as a GIMPLE operand.
+
+   * `GIMPLE_BINARY_RHS' The tree is a valid GIMPLE binary operation.
+
+   * `GIMPLE_UNARY_RHS' The tree is a valid GIMPLE unary operation.
+
+   * `GIMPLE_SINGLE_RHS' The tree is a single object, that cannot be
+     split into simpler operands (for instance, `SSA_NAME', `VAR_DECL',
+     `COMPONENT_REF', etc).
+
+     This operand class also acts as an escape hatch for tree nodes
+     that may be flattened out into the operand vector, but would need
+     more than two slots on the RHS.  For instance, a `COND_EXPR'
+     expression of the form `(a op b) ? x : y' could be flattened out
+     on the operand vector using 4 slots, but it would also require
+     additional processing to distinguish `c = a op b' from `c = a op b
+     ? x : y'.  Something similar occurs with `ASSERT_EXPR'.   In time,
+     these special case tree expressions should be flattened into the
+     operand vector.
+
+ For tree nodes in the categories `GIMPLE_BINARY_RHS' and
+`GIMPLE_UNARY_RHS', they cannot be stored inside tuples directly.  They
+first need to be flattened and separated into individual components.
+For instance, given the GENERIC expression
+
+     a = b + c
+
+ its tree representation is:
+
+     MODIFY_EXPR <VAR_DECL  <a>, PLUS_EXPR <VAR_DECL <b>, VAR_DECL <c>>>
+
+ In this case, the GIMPLE form for this statement is logically
+identical to its GENERIC form but in GIMPLE, the `PLUS_EXPR' on the RHS
+of the assignment is not represented as a tree, instead the two
+operands are taken out of the `PLUS_EXPR' sub-tree and flattened into
+the GIMPLE tuple as follows:
+
+     GIMPLE_ASSIGN <PLUS_EXPR, VAR_DECL <a>, VAR_DECL <b>, VAR_DECL <c>>
+
+12.5.6 Operand vector allocation
+--------------------------------
+
+The operand vector is stored at the bottom of the three tuple
+structures that accept operands. This means, that depending on the code
+of a given statement, its operand vector will be at different offsets
+from the base of the structure.  To access tuple operands use the
+following accessors
+
+ -- GIMPLE function: unsigned gimple_num_ops (gimple g)
+     Returns the number of operands in statement G.
+
+ -- GIMPLE function: tree gimple_op (gimple g, unsigned i)
+     Returns operand `I' from statement `G'.
+
+ -- GIMPLE function: tree *gimple_ops (gimple g)
+     Returns a pointer into the operand vector for statement `G'.  This
+     is computed using an internal table called `gimple_ops_offset_'[].
+     This table is indexed by the gimple code of `G'.
+
+     When the compiler is built, this table is filled-in using the
+     sizes of the structures used by each statement code defined in
+     gimple.def.  Since the operand vector is at the bottom of the
+     structure, for a gimple code `C' the offset is computed as sizeof
+     (struct-of `C') - sizeof (tree).
+
+     This mechanism adds one memory indirection to every access when
+     using `gimple_op'(), if this becomes a bottleneck, a pass can
+     choose to memoize the result from `gimple_ops'() and use that to
+     access the operands.
+
+12.5.7 Operand validation
+-------------------------
+
+When adding a new operand to a gimple statement, the operand will be
+validated according to what each tuple accepts in its operand vector.
+These predicates are called by the `gimple_<name>_set_...()'.  Each
+tuple will use one of the following predicates (Note, this list is not
+exhaustive):
+
+ -- GIMPLE function: is_gimple_operand (tree t)
+     This is the most permissive of the predicates.  It essentially
+     checks whether t has a `gimple_rhs_class' of `GIMPLE_SINGLE_RHS'.
+
+ -- GIMPLE function: is_gimple_val (tree t)
+     Returns true if t is a "GIMPLE value", which are all the
+     non-addressable stack variables (variables for which
+     `is_gimple_reg' returns true) and constants (expressions for which
+     `is_gimple_min_invariant' returns true).
+
+ -- GIMPLE function: is_gimple_addressable (tree t)
+     Returns true if t is a symbol or memory reference whose address
+     can be taken.
+
+ -- GIMPLE function: is_gimple_asm_val (tree t)
+     Similar to `is_gimple_val' but it also accepts hard registers.
+
+ -- GIMPLE function: is_gimple_call_addr (tree t)
+     Return true if t is a valid expression to use as the function
+     called by a `GIMPLE_CALL'.
+
+ -- GIMPLE function: is_gimple_constant (tree t)
+     Return true if t is a valid gimple constant.
+
+ -- GIMPLE function: is_gimple_min_invariant (tree t)
+     Return true if t is a valid minimal invariant.  This is different
+     from constants, in that the specific value of t may not be known
+     at compile time, but it is known that it doesn't change (e.g., the
+     address of a function local variable).
+
+ -- GIMPLE function: is_gimple_min_invariant_address (tree t)
+     Return true if t is an `ADDR_EXPR' that does not change once a
+     function is running.
+
+ -- GIMPLE function: is_gimple_ip_invariant (tree t)
+     Return true if t is an interprocedural invariant.  This means that
+     t is a valid invariant in all functions (e.g. it can be an address
+     of a global variable but not of a local one).
+
+ -- GIMPLE function: is_gimple_ip_invariant_address (tree t)
+     Return true if t is an `ADDR_EXPR' that does not change once the
+     program is running (and which is valid in all functions).
+
+12.5.8 Statement validation
+---------------------------
+
+ -- GIMPLE function: is_gimple_assign (gimple g)
+     Return true if the code of g is `GIMPLE_ASSIGN'.
+
+ -- GIMPLE function: is_gimple_call (gimple g)
+     Return true if the code of g is `GIMPLE_CALL'.
+
+ -- GIMPLE function: is_gimple_debug (gimple g)
+     Return true if the code of g is `GIMPLE_DEBUG'.
+
+ -- GIMPLE function: gimple_assign_cast_p (gimple g)
+     Return true if g is a `GIMPLE_ASSIGN' that performs a type cast
+     operation.
+
+ -- GIMPLE function: gimple_debug_bind_p (gimple g)
+     Return true if g is a `GIMPLE_DEBUG' that binds the value of an
+     expression to a variable.
+
+
+File: gccint.info,  Node: Manipulating GIMPLE statements,  Next: Tuple specific accessors,  Prev: Operands,  Up: GIMPLE
+
+12.6 Manipulating GIMPLE statements
+===================================
+
+This section documents all the functions available to handle each of
+the GIMPLE instructions.
+
+12.6.1 Common accessors
+-----------------------
+
+The following are common accessors for gimple statements.
+
+ -- GIMPLE function: enum gimple_code gimple_code (gimple g)
+     Return the code for statement `G'.
+
+ -- GIMPLE function: basic_block gimple_bb (gimple g)
+     Return the basic block to which statement `G' belongs to.
+
+ -- GIMPLE function: tree gimple_block (gimple g)
+     Return the lexical scope block holding statement `G'.
+
+ -- GIMPLE function: tree gimple_expr_type (gimple stmt)
+     Return the type of the main expression computed by `STMT'. Return
+     `void_type_node' if `STMT' computes nothing. This will only return
+     something meaningful for `GIMPLE_ASSIGN', `GIMPLE_COND' and
+     `GIMPLE_CALL'.  For all other tuple codes, it will return
+     `void_type_node'.
+
+ -- GIMPLE function: enum tree_code gimple_expr_code (gimple stmt)
+     Return the tree code for the expression computed by `STMT'.  This
+     is only meaningful for `GIMPLE_CALL', `GIMPLE_ASSIGN' and
+     `GIMPLE_COND'.  If `STMT' is `GIMPLE_CALL', it will return
+     `CALL_EXPR'.  For `GIMPLE_COND', it returns the code of the
+     comparison predicate.  For `GIMPLE_ASSIGN' it returns the code of
+     the operation performed by the `RHS' of the assignment.
+
+ -- GIMPLE function: void gimple_set_block (gimple g, tree block)
+     Set the lexical scope block of `G' to `BLOCK'.
+
+ -- GIMPLE function: location_t gimple_locus (gimple g)
+     Return locus information for statement `G'.
+
+ -- GIMPLE function: void gimple_set_locus (gimple g, location_t locus)
+     Set locus information for statement `G'.
+
+ -- GIMPLE function: bool gimple_locus_empty_p (gimple g)
+     Return true if `G' does not have locus information.
+
+ -- GIMPLE function: bool gimple_no_warning_p (gimple stmt)
+     Return true if no warnings should be emitted for statement `STMT'.
+
+ -- GIMPLE function: void gimple_set_visited (gimple stmt, bool
+          visited_p)
+     Set the visited status on statement `STMT' to `VISITED_P'.
+
+ -- GIMPLE function: bool gimple_visited_p (gimple stmt)
+     Return the visited status on statement `STMT'.
+
+ -- GIMPLE function: void gimple_set_plf (gimple stmt, enum plf_mask
+          plf, bool val_p)
+     Set pass local flag `PLF' on statement `STMT' to `VAL_P'.
+
+ -- GIMPLE function: unsigned int gimple_plf (gimple stmt, enum
+          plf_mask plf)
+     Return the value of pass local flag `PLF' on statement `STMT'.
+
+ -- GIMPLE function: bool gimple_has_ops (gimple g)
+     Return true if statement `G' has register or memory operands.
+
+ -- GIMPLE function: bool gimple_has_mem_ops (gimple g)
+     Return true if statement `G' has memory operands.
+
+ -- GIMPLE function: unsigned gimple_num_ops (gimple g)
+     Return the number of operands for statement `G'.
+
+ -- GIMPLE function: tree *gimple_ops (gimple g)
+     Return the array of operands for statement `G'.
+
+ -- GIMPLE function: tree gimple_op (gimple g, unsigned i)
+     Return operand `I' for statement `G'.
+
+ -- GIMPLE function: tree *gimple_op_ptr (gimple g, unsigned i)
+     Return a pointer to operand `I' for statement `G'.
+
+ -- GIMPLE function: void gimple_set_op (gimple g, unsigned i, tree op)
+     Set operand `I' of statement `G' to `OP'.
+
+ -- GIMPLE function: bitmap gimple_addresses_taken (gimple stmt)
+     Return the set of symbols that have had their address taken by
+     `STMT'.
+
+ -- GIMPLE function: struct def_optype_d *gimple_def_ops (gimple g)
+     Return the set of `DEF' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_def_ops (gimple g, struct
+          def_optype_d *def)
+     Set `DEF' to be the set of `DEF' operands for statement `G'.
+
+ -- GIMPLE function: struct use_optype_d *gimple_use_ops (gimple g)
+     Return the set of `USE' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_use_ops (gimple g, struct
+          use_optype_d *use)
+     Set `USE' to be the set of `USE' operands for statement `G'.
+
+ -- GIMPLE function: struct voptype_d *gimple_vuse_ops (gimple g)
+     Return the set of `VUSE' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_vuse_ops (gimple g, struct
+          voptype_d *ops)
+     Set `OPS' to be the set of `VUSE' operands for statement `G'.
+
+ -- GIMPLE function: struct voptype_d *gimple_vdef_ops (gimple g)
+     Return the set of `VDEF' operands for statement `G'.
+
+ -- GIMPLE function: void gimple_set_vdef_ops (gimple g, struct
+          voptype_d *ops)
+     Set `OPS' to be the set of `VDEF' operands for statement `G'.
+
+ -- GIMPLE function: bitmap gimple_loaded_syms (gimple g)
+     Return the set of symbols loaded by statement `G'.  Each element of
+     the set is the `DECL_UID' of the corresponding symbol.
+
+ -- GIMPLE function: bitmap gimple_stored_syms (gimple g)
+     Return the set of symbols stored by statement `G'.  Each element of
+     the set is the `DECL_UID' of the corresponding symbol.
+
+ -- GIMPLE function: bool gimple_modified_p (gimple g)
+     Return true if statement `G' has operands and the modified field
+     has been set.
+
+ -- GIMPLE function: bool gimple_has_volatile_ops (gimple stmt)
+     Return true if statement `STMT' contains volatile operands.
+
+ -- GIMPLE function: void gimple_set_has_volatile_ops (gimple stmt,
+          bool volatilep)
+     Return true if statement `STMT' contains volatile operands.
+
+ -- GIMPLE function: void update_stmt (gimple s)
+     Mark statement `S' as modified, and update it.
+
+ -- GIMPLE function: void update_stmt_if_modified (gimple s)
+     Update statement `S' if it has been marked modified.
+
+ -- GIMPLE function: gimple gimple_copy (gimple stmt)
+     Return a deep copy of statement `STMT'.
+
+
+File: gccint.info,  Node: Tuple specific accessors,  Next: GIMPLE sequences,  Prev: Manipulating GIMPLE statements,  Up: GIMPLE
+
+12.7 Tuple specific accessors
+=============================
+
+* Menu:
+
+* `GIMPLE_ASM'::
+* `GIMPLE_ASSIGN'::
+* `GIMPLE_BIND'::
+* `GIMPLE_CALL'::
+* `GIMPLE_CATCH'::
+* `GIMPLE_COND'::
+* `GIMPLE_DEBUG'::
+* `GIMPLE_EH_FILTER'::
+* `GIMPLE_LABEL'::
+* `GIMPLE_NOP'::
+* `GIMPLE_OMP_ATOMIC_LOAD'::
+* `GIMPLE_OMP_ATOMIC_STORE'::
+* `GIMPLE_OMP_CONTINUE'::
+* `GIMPLE_OMP_CRITICAL'::
+* `GIMPLE_OMP_FOR'::
+* `GIMPLE_OMP_MASTER'::
+* `GIMPLE_OMP_ORDERED'::
+* `GIMPLE_OMP_PARALLEL'::
+* `GIMPLE_OMP_RETURN'::
+* `GIMPLE_OMP_SECTION'::
+* `GIMPLE_OMP_SECTIONS'::
+* `GIMPLE_OMP_SINGLE'::
+* `GIMPLE_PHI'::
+* `GIMPLE_RESX'::
+* `GIMPLE_RETURN'::
+* `GIMPLE_SWITCH'::
+* `GIMPLE_TRY'::
+* `GIMPLE_WITH_CLEANUP_EXPR'::
+
+
+File: gccint.info,  Node: `GIMPLE_ASM',  Next: `GIMPLE_ASSIGN',  Up: Tuple specific accessors
+
+12.7.1 `GIMPLE_ASM'
+-------------------
+
+ -- GIMPLE function: gimple gimple_build_asm (const char *string,
+          ninputs, noutputs, nclobbers, ...)
+     Build a `GIMPLE_ASM' statement.  This statement is used for
+     building in-line assembly constructs.  `STRING' is the assembly
+     code.  `NINPUT' is the number of register inputs.  `NOUTPUT' is the
+     number of register outputs.  `NCLOBBERS' is the number of clobbered
+     registers.  The rest of the arguments trees for each input,
+     output, and clobbered registers.
+
+ -- GIMPLE function: gimple gimple_build_asm_vec (const char *,
+          VEC(tree,gc) *, VEC(tree,gc) *, VEC(tree,gc) *)
+     Identical to gimple_build_asm, but the arguments are passed in
+     VECs.
+
+ -- GIMPLE function: gimple_asm_ninputs (gimple g)
+     Return the number of input operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: gimple_asm_noutputs (gimple g)
+     Return the number of output operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: gimple_asm_nclobbers (gimple g)
+     Return the number of clobber operands for `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_input_op (gimple g, unsigned index)
+     Return input operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_input_op (gimple g, unsigned
+          index, tree in_op)
+     Set `IN_OP' to be input operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_output_op (gimple g, unsigned
+          index)
+     Return output operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_output_op (gimple g, unsigned
+          index, tree out_op)
+     Set `OUT_OP' to be output operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: tree gimple_asm_clobber_op (gimple g, unsigned
+          index)
+     Return clobber operand `INDEX' of `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: void gimple_asm_set_clobber_op (gimple g, unsigned
+          index, tree clobber_op)
+     Set `CLOBBER_OP' to be clobber operand `INDEX' in `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: const char *gimple_asm_string (gimple g)
+     Return the string representing the assembly instruction in
+     `GIMPLE_ASM' `G'.
+
+ -- GIMPLE function: bool gimple_asm_volatile_p (gimple g)
+     Return true if `G' is an asm statement marked volatile.
+
+ -- GIMPLE function: void gimple_asm_set_volatile (gimple g)
+     Mark asm statement `G' as volatile.
+
+ -- GIMPLE function: void gimple_asm_clear_volatile (gimple g)
+     Remove volatile marker from asm statement `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_ASSIGN',  Next: `GIMPLE_BIND',  Prev: `GIMPLE_ASM',  Up: Tuple specific accessors
+
+12.7.2 `GIMPLE_ASSIGN'
+----------------------
+
+ -- GIMPLE function: gimple gimple_build_assign (tree lhs, tree rhs)
+     Build a `GIMPLE_ASSIGN' statement.  The left-hand side is an lvalue
+     passed in lhs.  The right-hand side can be either a unary or
+     binary tree expression.  The expression tree rhs will be flattened
+     and its operands assigned to the corresponding operand slots in
+     the new statement.  This function is useful when you already have
+     a tree expression that you want to convert into a tuple.  However,
+     try to avoid building expression trees for the sole purpose of
+     calling this function.  If you already have the operands in
+     separate trees, it is better to use `gimple_build_assign_with_ops'.
+
+ -- GIMPLE function: gimple gimplify_assign (tree dst, tree src,
+          gimple_seq *seq_p)
+     Build a new `GIMPLE_ASSIGN' tuple and append it to the end of
+     `*SEQ_P'.
+
+ `DST'/`SRC' are the destination and source respectively.  You can pass
+ungimplified trees in `DST' or `SRC', in which case they will be
+converted to a gimple operand if necessary.
+
+ This function returns the newly created `GIMPLE_ASSIGN' tuple.
+
+ -- GIMPLE function: gimple gimple_build_assign_with_ops (enum
+          tree_code subcode, tree lhs, tree op1, tree op2)
+     This function is similar to `gimple_build_assign', but is used to
+     build a `GIMPLE_ASSIGN' statement when the operands of the
+     right-hand side of the assignment are already split into different
+     operands.
+
+     The left-hand side is an lvalue passed in lhs.  Subcode is the
+     `tree_code' for the right-hand side of the assignment.  Op1 and op2
+     are the operands.  If op2 is null, subcode must be a `tree_code'
+     for a unary expression.
+
+ -- GIMPLE function: enum tree_code gimple_assign_rhs_code (gimple g)
+     Return the code of the expression computed on the `RHS' of
+     assignment statement `G'.
+
+ -- GIMPLE function: enum gimple_rhs_class gimple_assign_rhs_class
+          (gimple g)
+     Return the gimple rhs class of the code for the expression
+     computed on the rhs of assignment statement `G'.  This will never
+     return `GIMPLE_INVALID_RHS'.
+
+ -- GIMPLE function: tree gimple_assign_lhs (gimple g)
+     Return the `LHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree *gimple_assign_lhs_ptr (gimple g)
+     Return a pointer to the `LHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs1 (gimple g)
+     Return the first operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree *gimple_assign_rhs1_ptr (gimple g)
+     Return the address of the first operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs2 (gimple g)
+     Return the second operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree *gimple_assign_rhs2_ptr (gimple g)
+     Return the address of the second operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of assignment statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_rhs1 (gimple g, tree rhs)
+     Set `RHS' to be the first operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: tree gimple_assign_rhs2 (gimple g)
+     Return the second operand on the `RHS' of assignment statement `G'.
+
+ -- GIMPLE function: tree *gimple_assign_rhs2_ptr (gimple g)
+     Return a pointer to the second operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: void gimple_assign_set_rhs2 (gimple g, tree rhs)
+     Set `RHS' to be the second operand on the `RHS' of assignment
+     statement `G'.
+
+ -- GIMPLE function: bool gimple_assign_cast_p (gimple s)
+     Return true if `S' is a type-cast assignment.
+
+
+File: gccint.info,  Node: `GIMPLE_BIND',  Next: `GIMPLE_CALL',  Prev: `GIMPLE_ASSIGN',  Up: Tuple specific accessors
+
+12.7.3 `GIMPLE_BIND'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_bind (tree vars, gimple_seq
+          body)
+     Build a `GIMPLE_BIND' statement with a list of variables in `VARS'
+     and a body of statements in sequence `BODY'.
+
+ -- GIMPLE function: tree gimple_bind_vars (gimple g)
+     Return the variables declared in the `GIMPLE_BIND' statement `G'.
+
+ -- GIMPLE function: void gimple_bind_set_vars (gimple g, tree vars)
+     Set `VARS' to be the set of variables declared in the `GIMPLE_BIND'
+     statement `G'.
+
+ -- GIMPLE function: void gimple_bind_append_vars (gimple g, tree vars)
+     Append `VARS' to the set of variables declared in the `GIMPLE_BIND'
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_bind_body (gimple g)
+     Return the GIMPLE sequence contained in the `GIMPLE_BIND' statement
+     `G'.
+
+ -- GIMPLE function: void gimple_bind_set_body (gimple g, gimple_seq
+          seq)
+     Set `SEQ' to be sequence contained in the `GIMPLE_BIND' statement
+     `G'.
+
+ -- GIMPLE function: void gimple_bind_add_stmt (gimple gs, gimple stmt)
+     Append a statement to the end of a `GIMPLE_BIND''s body.
+
+ -- GIMPLE function: void gimple_bind_add_seq (gimple gs, gimple_seq
+          seq)
+     Append a sequence of statements to the end of a `GIMPLE_BIND''s
+     body.
+
+ -- GIMPLE function: tree gimple_bind_block (gimple g)
+     Return the `TREE_BLOCK' node associated with `GIMPLE_BIND'
+     statement `G'. This is analogous to the `BIND_EXPR_BLOCK' field in
+     trees.
+
+ -- GIMPLE function: void gimple_bind_set_block (gimple g, tree block)
+     Set `BLOCK' to be the `TREE_BLOCK' node associated with
+     `GIMPLE_BIND' statement `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_CALL',  Next: `GIMPLE_CATCH',  Prev: `GIMPLE_BIND',  Up: Tuple specific accessors
+
+12.7.4 `GIMPLE_CALL'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_call (tree fn, unsigned nargs,
+          ...)
+     Build a `GIMPLE_CALL' statement to function `FN'.  The argument
+     `FN' must be either a `FUNCTION_DECL' or a gimple call address as
+     determined by `is_gimple_call_addr'.  `NARGS' are the number of
+     arguments.  The rest of the arguments follow the argument `NARGS',
+     and must be trees that are valid as rvalues in gimple (i.e., each
+     operand is validated with `is_gimple_operand').
+
+ -- GIMPLE function: gimple gimple_build_call_from_tree (tree call_expr)
+     Build a `GIMPLE_CALL' from a `CALL_EXPR' node.  The arguments and
+     the function are taken from the expression directly.  This routine
+     assumes that `call_expr' is already in GIMPLE form.  That is, its
+     operands are GIMPLE values and the function call needs no further
+     simplification.  All the call flags in `call_expr' are copied over
+     to the new `GIMPLE_CALL'.
+
+ -- GIMPLE function: gimple gimple_build_call_vec (tree fn, `VEC'(tree,
+          heap) *args)
+     Identical to `gimple_build_call' but the arguments are stored in a
+     `VEC'().
+
+ -- GIMPLE function: tree gimple_call_lhs (gimple g)
+     Return the `LHS' of call statement `G'.
+
+ -- GIMPLE function: tree *gimple_call_lhs_ptr (gimple g)
+     Return a pointer to the `LHS' of call statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_fn (gimple g)
+     Return the tree node representing the function called by call
+     statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_fn (gimple g, tree fn)
+     Set `FN' to be the function called by call statement `G'.  This has
+     to be a gimple value specifying the address of the called function.
+
+ -- GIMPLE function: tree gimple_call_fndecl (gimple g)
+     If a given `GIMPLE_CALL''s callee is a `FUNCTION_DECL', return it.
+     Otherwise return `NULL'.  This function is analogous to
+     `get_callee_fndecl' in `GENERIC'.
+
+ -- GIMPLE function: tree gimple_call_set_fndecl (gimple g, tree fndecl)
+     Set the called function to `FNDECL'.
+
+ -- GIMPLE function: tree gimple_call_return_type (gimple g)
+     Return the type returned by call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_chain (gimple g)
+     Return the static chain for call statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_chain (gimple g, tree chain)
+     Set `CHAIN' to be the static chain for call statement `G'.
+
+ -- GIMPLE function: gimple_call_num_args (gimple g)
+     Return the number of arguments used by call statement `G'.
+
+ -- GIMPLE function: tree gimple_call_arg (gimple g, unsigned index)
+     Return the argument at position `INDEX' for call statement `G'.
+     The first argument is 0.
+
+ -- GIMPLE function: tree *gimple_call_arg_ptr (gimple g, unsigned
+          index)
+     Return a pointer to the argument at position `INDEX' for call
+     statement `G'.
+
+ -- GIMPLE function: void gimple_call_set_arg (gimple g, unsigned
+          index, tree arg)
+     Set `ARG' to be the argument at position `INDEX' for call statement
+     `G'.
+
+ -- GIMPLE function: void gimple_call_set_tail (gimple s)
+     Mark call statement `S' as being a tail call (i.e., a call just
+     before the exit of a function). These calls are candidate for tail
+     call optimization.
+
+ -- GIMPLE function: bool gimple_call_tail_p (gimple s)
+     Return true if `GIMPLE_CALL' `S' is marked as a tail call.
+
+ -- GIMPLE function: void gimple_call_mark_uninlinable (gimple s)
+     Mark `GIMPLE_CALL' `S' as being uninlinable.
+
+ -- GIMPLE function: bool gimple_call_cannot_inline_p (gimple s)
+     Return true if `GIMPLE_CALL' `S' cannot be inlined.
+
+ -- GIMPLE function: bool gimple_call_noreturn_p (gimple s)
+     Return true if `S' is a noreturn call.
+
+ -- GIMPLE function: gimple gimple_call_copy_skip_args (gimple stmt,
+          bitmap args_to_skip)
+     Build a `GIMPLE_CALL' identical to `STMT' but skipping the
+     arguments in the positions marked by the set `ARGS_TO_SKIP'.
+
+
+File: gccint.info,  Node: `GIMPLE_CATCH',  Next: `GIMPLE_COND',  Prev: `GIMPLE_CALL',  Up: Tuple specific accessors
+
+12.7.5 `GIMPLE_CATCH'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_catch (tree types, gimple_seq
+          handler)
+     Build a `GIMPLE_CATCH' statement.  `TYPES' are the tree types this
+     catch handles.  `HANDLER' is a sequence of statements with the code
+     for the handler.
+
+ -- GIMPLE function: tree gimple_catch_types (gimple g)
+     Return the types handled by `GIMPLE_CATCH' statement `G'.
+
+ -- GIMPLE function: tree *gimple_catch_types_ptr (gimple g)
+     Return a pointer to the types handled by `GIMPLE_CATCH' statement
+     `G'.
+
+ -- GIMPLE function: gimple_seq gimple_catch_handler (gimple g)
+     Return the GIMPLE sequence representing the body of the handler of
+     `GIMPLE_CATCH' statement `G'.
+
+ -- GIMPLE function: void gimple_catch_set_types (gimple g, tree t)
+     Set `T' to be the set of types handled by `GIMPLE_CATCH' `G'.
+
+ -- GIMPLE function: void gimple_catch_set_handler (gimple g,
+          gimple_seq handler)
+     Set `HANDLER' to be the body of `GIMPLE_CATCH' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_COND',  Next: `GIMPLE_DEBUG',  Prev: `GIMPLE_CATCH',  Up: Tuple specific accessors
+
+12.7.6 `GIMPLE_COND'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_cond (enum tree_code
+          pred_code, tree lhs, tree rhs, tree t_label, tree f_label)
+     Build a `GIMPLE_COND' statement.  `A' `GIMPLE_COND' statement
+     compares `LHS' and `RHS' and if the condition in `PRED_CODE' is
+     true, jump to the label in `t_label', otherwise jump to the label
+     in `f_label'.  `PRED_CODE' are relational operator tree codes like
+     `EQ_EXPR', `LT_EXPR', `LE_EXPR', `NE_EXPR', etc.
+
+ -- GIMPLE function: gimple gimple_build_cond_from_tree (tree cond,
+          tree t_label, tree f_label)
+     Build a `GIMPLE_COND' statement from the conditional expression
+     tree `COND'.  `T_LABEL' and `F_LABEL' are as in
+     `gimple_build_cond'.
+
+ -- GIMPLE function: enum tree_code gimple_cond_code (gimple g)
+     Return the code of the predicate computed by conditional statement
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_code (gimple g, enum
+          tree_code code)
+     Set `CODE' to be the predicate code for the conditional statement
+     `G'.
+
+ -- GIMPLE function: tree gimple_cond_lhs (gimple g)
+     Return the `LHS' of the predicate computed by conditional statement
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_lhs (gimple g, tree lhs)
+     Set `LHS' to be the `LHS' operand of the predicate computed by
+     conditional statement `G'.
+
+ -- GIMPLE function: tree gimple_cond_rhs (gimple g)
+     Return the `RHS' operand of the predicate computed by conditional
+     `G'.
+
+ -- GIMPLE function: void gimple_cond_set_rhs (gimple g, tree rhs)
+     Set `RHS' to be the `RHS' operand of the predicate computed by
+     conditional statement `G'.
+
+ -- GIMPLE function: tree gimple_cond_true_label (gimple g)
+     Return the label used by conditional statement `G' when its
+     predicate evaluates to true.
+
+ -- GIMPLE function: void gimple_cond_set_true_label (gimple g, tree
+          label)
+     Set `LABEL' to be the label used by conditional statement `G' when
+     its predicate evaluates to true.
+
+ -- GIMPLE function: void gimple_cond_set_false_label (gimple g, tree
+          label)
+     Set `LABEL' to be the label used by conditional statement `G' when
+     its predicate evaluates to false.
+
+ -- GIMPLE function: tree gimple_cond_false_label (gimple g)
+     Return the label used by conditional statement `G' when its
+     predicate evaluates to false.
+
+ -- GIMPLE function: void gimple_cond_make_false (gimple g)
+     Set the conditional `COND_STMT' to be of the form 'if (1 == 0)'.
+
+ -- GIMPLE function: void gimple_cond_make_true (gimple g)
+     Set the conditional `COND_STMT' to be of the form 'if (1 == 1)'.
+
+
+File: gccint.info,  Node: `GIMPLE_DEBUG',  Next: `GIMPLE_EH_FILTER',  Prev: `GIMPLE_COND',  Up: Tuple specific accessors
+
+12.7.7 `GIMPLE_DEBUG'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_debug_bind (tree var, tree
+          value, gimple stmt)
+     Build a `GIMPLE_DEBUG' statement with `GIMPLE_DEBUG_BIND' of
+     `subcode'.  The effect of this statement is to tell debug
+     information generation machinery that the value of user variable
+     `var' is given by `value' at that point, and to remain with that
+     value until `var' runs out of scope, a dynamically-subsequent
+     debug bind statement overrides the binding, or conflicting values
+     reach a control flow merge point.  Even if components of the
+     `value' expression change afterwards, the variable is supposed to
+     retain the same value, though not necessarily the same location.
+
+     It is expected that `var' be most often a tree for automatic user
+     variables (`VAR_DECL' or `PARM_DECL') that satisfy the
+     requirements for gimple registers, but it may also be a tree for a
+     scalarized component of a user variable (`ARRAY_REF',
+     `COMPONENT_REF'), or a debug temporary (`DEBUG_EXPR_DECL').
+
+     As for `value', it can be an arbitrary tree expression, but it is
+     recommended that it be in a suitable form for a gimple assignment
+     `RHS'.  It is not expected that user variables that could appear
+     as `var' ever appear in `value', because in the latter we'd have
+     their `SSA_NAME's instead, but even if they were not in SSA form,
+     user variables appearing in `value' are to be regarded as part of
+     the executable code space, whereas those in `var' are to be
+     regarded as part of the source code space.  There is no way to
+     refer to the value bound to a user variable within a `value'
+     expression.
+
+     If `value' is `GIMPLE_DEBUG_BIND_NOVALUE', debug information
+     generation machinery is informed that the variable `var' is
+     unbound, i.e., that its value is indeterminate, which sometimes
+     means it is really unavailable, and other times that the compiler
+     could not keep track of it.
+
+     Block and location information for the newly-created stmt are
+     taken from `stmt', if given.
+
+ -- GIMPLE function: tree gimple_debug_bind_get_var (gimple stmt)
+     Return the user variable VAR that is bound at `stmt'.
+
+ -- GIMPLE function: tree gimple_debug_bind_get_value (gimple stmt)
+     Return the value expression that is bound to a user variable at
+     `stmt'.
+
+ -- GIMPLE function: tree *gimple_debug_bind_get_value_ptr (gimple stmt)
+     Return a pointer to the value expression that is bound to a user
+     variable at `stmt'.
+
+ -- GIMPLE function: void gimple_debug_bind_set_var (gimple stmt, tree
+          var)
+     Modify the user variable bound at `stmt' to VAR.
+
+ -- GIMPLE function: void gimple_debug_bind_set_value (gimple stmt,
+          tree var)
+     Modify the value bound to the user variable bound at `stmt' to
+     VALUE.
+
+ -- GIMPLE function: void gimple_debug_bind_reset_value (gimple stmt)
+     Modify the value bound to the user variable bound at `stmt' so
+     that the variable becomes unbound.
+
+ -- GIMPLE function: bool gimple_debug_bind_has_value_p (gimple stmt)
+     Return `TRUE' if `stmt' binds a user variable to a value, and
+     `FALSE' if it unbinds the variable.
+
+
+File: gccint.info,  Node: `GIMPLE_EH_FILTER',  Next: `GIMPLE_LABEL',  Prev: `GIMPLE_DEBUG',  Up: Tuple specific accessors
+
+12.7.8 `GIMPLE_EH_FILTER'
+-------------------------
+
+ -- GIMPLE function: gimple gimple_build_eh_filter (tree types,
+          gimple_seq failure)
+     Build a `GIMPLE_EH_FILTER' statement.  `TYPES' are the filter's
+     types.  `FAILURE' is a sequence with the filter's failure action.
+
+ -- GIMPLE function: tree gimple_eh_filter_types (gimple g)
+     Return the types handled by `GIMPLE_EH_FILTER' statement `G'.
+
+ -- GIMPLE function: tree *gimple_eh_filter_types_ptr (gimple g)
+     Return a pointer to the types handled by `GIMPLE_EH_FILTER'
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_eh_filter_failure (gimple g)
+     Return the sequence of statement to execute when `GIMPLE_EH_FILTER'
+     statement fails.
+
+ -- GIMPLE function: void gimple_eh_filter_set_types (gimple g, tree
+          types)
+     Set `TYPES' to be the set of types handled by `GIMPLE_EH_FILTER'
+     `G'.
+
+ -- GIMPLE function: void gimple_eh_filter_set_failure (gimple g,
+          gimple_seq failure)
+     Set `FAILURE' to be the sequence of statements to execute on
+     failure for `GIMPLE_EH_FILTER' `G'.
+
+ -- GIMPLE function: bool gimple_eh_filter_must_not_throw (gimple g)
+     Return the `EH_FILTER_MUST_NOT_THROW' flag.
+
+ -- GIMPLE function: void gimple_eh_filter_set_must_not_throw (gimple
+          g, bool mntp)
+     Set the `EH_FILTER_MUST_NOT_THROW' flag.
+
+
+File: gccint.info,  Node: `GIMPLE_LABEL',  Next: `GIMPLE_NOP',  Prev: `GIMPLE_EH_FILTER',  Up: Tuple specific accessors
+
+12.7.9 `GIMPLE_LABEL'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_label (tree label)
+     Build a `GIMPLE_LABEL' statement with corresponding to the tree
+     label, `LABEL'.
+
+ -- GIMPLE function: tree gimple_label_label (gimple g)
+     Return the `LABEL_DECL' node used by `GIMPLE_LABEL' statement `G'.
+
+ -- GIMPLE function: void gimple_label_set_label (gimple g, tree label)
+     Set `LABEL' to be the `LABEL_DECL' node used by `GIMPLE_LABEL'
+     statement `G'.
+
+ -- GIMPLE function: gimple gimple_build_goto (tree dest)
+     Build a `GIMPLE_GOTO' statement to label `DEST'.
+
+ -- GIMPLE function: tree gimple_goto_dest (gimple g)
+     Return the destination of the unconditional jump `G'.
+
+ -- GIMPLE function: void gimple_goto_set_dest (gimple g, tree dest)
+     Set `DEST' to be the destination of the unconditional jump `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_NOP',  Next: `GIMPLE_OMP_ATOMIC_LOAD',  Prev: `GIMPLE_LABEL',  Up: Tuple specific accessors
+
+12.7.10 `GIMPLE_NOP'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_nop (void)
+     Build a `GIMPLE_NOP' statement.
+
+ -- GIMPLE function: bool gimple_nop_p (gimple g)
+     Returns `TRUE' if statement `G' is a `GIMPLE_NOP'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ATOMIC_LOAD',  Next: `GIMPLE_OMP_ATOMIC_STORE',  Prev: `GIMPLE_NOP',  Up: Tuple specific accessors
+
+12.7.11 `GIMPLE_OMP_ATOMIC_LOAD'
+--------------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_atomic_load (tree lhs,
+          tree rhs)
+     Build a `GIMPLE_OMP_ATOMIC_LOAD' statement.  `LHS' is the left-hand
+     side of the assignment.  `RHS' is the right-hand side of the
+     assignment.
+
+ -- GIMPLE function: void gimple_omp_atomic_load_set_lhs (gimple g,
+          tree lhs)
+     Set the `LHS' of an atomic load.
+
+ -- GIMPLE function: tree gimple_omp_atomic_load_lhs (gimple g)
+     Get the `LHS' of an atomic load.
+
+ -- GIMPLE function: void gimple_omp_atomic_load_set_rhs (gimple g,
+          tree rhs)
+     Set the `RHS' of an atomic set.
+
+ -- GIMPLE function: tree gimple_omp_atomic_load_rhs (gimple g)
+     Get the `RHS' of an atomic set.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ATOMIC_STORE',  Next: `GIMPLE_OMP_CONTINUE',  Prev: `GIMPLE_OMP_ATOMIC_LOAD',  Up: Tuple specific accessors
+
+12.7.12 `GIMPLE_OMP_ATOMIC_STORE'
+---------------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_atomic_store (tree val)
+     Build a `GIMPLE_OMP_ATOMIC_STORE' statement. `VAL' is the value to
+     be stored.
+
+ -- GIMPLE function: void gimple_omp_atomic_store_set_val (gimple g,
+          tree val)
+     Set the value being stored in an atomic store.
+
+ -- GIMPLE function: tree gimple_omp_atomic_store_val (gimple g)
+     Return the value being stored in an atomic store.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_CONTINUE',  Next: `GIMPLE_OMP_CRITICAL',  Prev: `GIMPLE_OMP_ATOMIC_STORE',  Up: Tuple specific accessors
+
+12.7.13 `GIMPLE_OMP_CONTINUE'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_continue (tree
+          control_def, tree control_use)
+     Build a `GIMPLE_OMP_CONTINUE' statement.  `CONTROL_DEF' is the
+     definition of the control variable.  `CONTROL_USE' is the use of
+     the control variable.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_def (gimple s)
+     Return the definition of the control variable on a
+     `GIMPLE_OMP_CONTINUE' in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_def_ptr (gimple s)
+     Same as above, but return the pointer.
+
+ -- GIMPLE function: tree gimple_omp_continue_set_control_def (gimple s)
+     Set the control variable definition for a `GIMPLE_OMP_CONTINUE'
+     statement in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_use (gimple s)
+     Return the use of the control variable on a `GIMPLE_OMP_CONTINUE'
+     in `S'.
+
+ -- GIMPLE function: tree gimple_omp_continue_control_use_ptr (gimple s)
+     Same as above, but return the pointer.
+
+ -- GIMPLE function: tree gimple_omp_continue_set_control_use (gimple s)
+     Set the control variable use for a `GIMPLE_OMP_CONTINUE' statement
+     in `S'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_CRITICAL',  Next: `GIMPLE_OMP_FOR',  Prev: `GIMPLE_OMP_CONTINUE',  Up: Tuple specific accessors
+
+12.7.14 `GIMPLE_OMP_CRITICAL'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_critical (gimple_seq body,
+          tree name)
+     Build a `GIMPLE_OMP_CRITICAL' statement. `BODY' is the sequence of
+     statements for which only one thread can execute.  `NAME' is an
+     optional identifier for this critical block.
+
+ -- GIMPLE function: tree gimple_omp_critical_name (gimple g)
+     Return the name associated with `OMP_CRITICAL' statement `G'.
+
+ -- GIMPLE function: tree *gimple_omp_critical_name_ptr (gimple g)
+     Return a pointer to the name associated with `OMP' critical
+     statement `G'.
+
+ -- GIMPLE function: void gimple_omp_critical_set_name (gimple g, tree
+          name)
+     Set `NAME' to be the name associated with `OMP' critical statement
+     `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_FOR',  Next: `GIMPLE_OMP_MASTER',  Prev: `GIMPLE_OMP_CRITICAL',  Up: Tuple specific accessors
+
+12.7.15 `GIMPLE_OMP_FOR'
+------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_for (gimple_seq body, tree
+          clauses, tree index, tree initial, tree final, tree incr,
+          gimple_seq pre_body, enum tree_code omp_for_cond)
+     Build a `GIMPLE_OMP_FOR' statement. `BODY' is sequence of
+     statements inside the for loop.  `CLAUSES', are any of the `OMP'
+     loop construct's clauses: private, firstprivate,  lastprivate,
+     reductions, ordered, schedule, and nowait.  `PRE_BODY' is the
+     sequence of statements that are loop invariant.  `INDEX' is the
+     index variable.  `INITIAL' is the initial value of `INDEX'.
+     `FINAL' is final value of `INDEX'.  OMP_FOR_COND is the predicate
+     used to compare `INDEX' and `FINAL'.  `INCR' is the increment
+     expression.
+
+ -- GIMPLE function: tree gimple_omp_for_clauses (gimple g)
+     Return the clauses associated with `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_for_clauses_ptr (gimple g)
+     Return a pointer to the `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_clauses (gimple g, tree
+          clauses)
+     Set `CLAUSES' to be the list of clauses associated with `OMP_FOR'
+     `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_index (gimple g)
+     Return the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_for_index_ptr (gimple g)
+     Return a pointer to the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_index (gimple g, tree
+          index)
+     Set `INDEX' to be the index variable for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_initial (gimple g)
+     Return the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_for_initial_ptr (gimple g)
+     Return a pointer to the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_initial (gimple g, tree
+          initial)
+     Set `INITIAL' to be the initial value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_final (gimple g)
+     Return the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_for_final_ptr (gimple g)
+     turn a pointer to the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_final (gimple g, tree
+          final)
+     Set `FINAL' to be the final value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree gimple_omp_for_incr (gimple g)
+     Return the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_for_incr_ptr (gimple g)
+     Return a pointer to the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: void gimple_omp_for_set_incr (gimple g, tree incr)
+     Set `INCR' to be the increment value for `OMP_FOR' `G'.
+
+ -- GIMPLE function: gimple_seq gimple_omp_for_pre_body (gimple g)
+     Return the sequence of statements to execute before the `OMP_FOR'
+     statement `G' starts.
+
+ -- GIMPLE function: void gimple_omp_for_set_pre_body (gimple g,
+          gimple_seq pre_body)
+     Set `PRE_BODY' to be the sequence of statements to execute before
+     the `OMP_FOR' statement `G' starts.
+
+ -- GIMPLE function: void gimple_omp_for_set_cond (gimple g, enum
+          tree_code cond)
+     Set `COND' to be the condition code for `OMP_FOR' `G'.
+
+ -- GIMPLE function: enum tree_code gimple_omp_for_cond (gimple g)
+     Return the condition code associated with `OMP_FOR' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_MASTER',  Next: `GIMPLE_OMP_ORDERED',  Prev: `GIMPLE_OMP_FOR',  Up: Tuple specific accessors
+
+12.7.16 `GIMPLE_OMP_MASTER'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_master (gimple_seq body)
+     Build a `GIMPLE_OMP_MASTER' statement. `BODY' is the sequence of
+     statements to be executed by just the master.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_ORDERED',  Next: `GIMPLE_OMP_PARALLEL',  Prev: `GIMPLE_OMP_MASTER',  Up: Tuple specific accessors
+
+12.7.17 `GIMPLE_OMP_ORDERED'
+----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_ordered (gimple_seq body)
+     Build a `GIMPLE_OMP_ORDERED' statement.
+
+ `BODY' is the sequence of statements inside a loop that will executed
+in sequence.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_PARALLEL',  Next: `GIMPLE_OMP_RETURN',  Prev: `GIMPLE_OMP_ORDERED',  Up: Tuple specific accessors
+
+12.7.18 `GIMPLE_OMP_PARALLEL'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_parallel (gimple_seq body,
+          tree clauses, tree child_fn, tree data_arg)
+     Build a `GIMPLE_OMP_PARALLEL' statement.
+
+ `BODY' is sequence of statements which are executed in parallel.
+`CLAUSES', are the `OMP' parallel construct's clauses.  `CHILD_FN' is
+the function created for the parallel threads to execute.  `DATA_ARG'
+are the shared data argument(s).
+
+ -- GIMPLE function: bool gimple_omp_parallel_combined_p (gimple g)
+     Return true if `OMP' parallel statement `G' has the
+     `GF_OMP_PARALLEL_COMBINED' flag set.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_combined_p (gimple g)
+     Set the `GF_OMP_PARALLEL_COMBINED' field in `OMP' parallel
+     statement `G'.
+
+ -- GIMPLE function: gimple_seq gimple_omp_body (gimple g)
+     Return the body for the `OMP' statement `G'.
+
+ -- GIMPLE function: void gimple_omp_set_body (gimple g, gimple_seq
+          body)
+     Set `BODY' to be the body for the `OMP' statement `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_clauses (gimple g)
+     Return the clauses associated with `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_parallel_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_clauses (gimple g,
+          tree clauses)
+     Set `CLAUSES' to be the list of clauses associated with
+     `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_child_fn (gimple g)
+     Return the child function used to hold the body of `OMP_PARALLEL'
+     `G'.
+
+ -- GIMPLE function: tree *gimple_omp_parallel_child_fn_ptr (gimple g)
+     Return a pointer to the child function used to hold the body of
+     `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_child_fn (gimple g,
+          tree child_fn)
+     Set `CHILD_FN' to be the child function for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree gimple_omp_parallel_data_arg (gimple g)
+     Return the artificial argument used to send variables and values
+     from the parent to the children threads in `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_parallel_data_arg_ptr (gimple g)
+     Return a pointer to the data argument for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: void gimple_omp_parallel_set_data_arg (gimple g,
+          tree data_arg)
+     Set `DATA_ARG' to be the data argument for `OMP_PARALLEL' `G'.
+
+ -- GIMPLE function: bool is_gimple_omp (gimple stmt)
+     Returns true when the gimple statement `STMT' is any of the OpenMP
+     types.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_RETURN',  Next: `GIMPLE_OMP_SECTION',  Prev: `GIMPLE_OMP_PARALLEL',  Up: Tuple specific accessors
+
+12.7.19 `GIMPLE_OMP_RETURN'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_return (bool wait_p)
+     Build a `GIMPLE_OMP_RETURN' statement. `WAIT_P' is true if this is
+     a non-waiting return.
+
+ -- GIMPLE function: void gimple_omp_return_set_nowait (gimple s)
+     Set the nowait flag on `GIMPLE_OMP_RETURN' statement `S'.
+
+ -- GIMPLE function: bool gimple_omp_return_nowait_p (gimple g)
+     Return true if `OMP' return statement `G' has the
+     `GF_OMP_RETURN_NOWAIT' flag set.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SECTION',  Next: `GIMPLE_OMP_SECTIONS',  Prev: `GIMPLE_OMP_RETURN',  Up: Tuple specific accessors
+
+12.7.20 `GIMPLE_OMP_SECTION'
+----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_section (gimple_seq body)
+     Build a `GIMPLE_OMP_SECTION' statement for a sections statement.
+
+ `BODY' is the sequence of statements in the section.
+
+ -- GIMPLE function: bool gimple_omp_section_last_p (gimple g)
+     Return true if `OMP' section statement `G' has the
+     `GF_OMP_SECTION_LAST' flag set.
+
+ -- GIMPLE function: void gimple_omp_section_set_last (gimple g)
+     Set the `GF_OMP_SECTION_LAST' flag on `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SECTIONS',  Next: `GIMPLE_OMP_SINGLE',  Prev: `GIMPLE_OMP_SECTION',  Up: Tuple specific accessors
+
+12.7.21 `GIMPLE_OMP_SECTIONS'
+-----------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_sections (gimple_seq body,
+          tree clauses)
+     Build a `GIMPLE_OMP_SECTIONS' statement. `BODY' is a sequence of
+     section statements.  `CLAUSES' are any of the `OMP' sections
+     construct's clauses: private, firstprivate, lastprivate,
+     reduction, and nowait.
+
+ -- GIMPLE function: gimple gimple_build_omp_sections_switch (void)
+     Build a `GIMPLE_OMP_SECTIONS_SWITCH' statement.
+
+ -- GIMPLE function: tree gimple_omp_sections_control (gimple g)
+     Return the control variable associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: tree *gimple_omp_sections_control_ptr (gimple g)
+     Return a pointer to the clauses associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: void gimple_omp_sections_set_control (gimple g,
+          tree control)
+     Set `CONTROL' to be the set of clauses associated with the
+     `GIMPLE_OMP_SECTIONS' in `G'.
+
+ -- GIMPLE function: tree gimple_omp_sections_clauses (gimple g)
+     Return the clauses associated with `OMP_SECTIONS' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_sections_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_SECTIONS' `G'.
+
+ -- GIMPLE function: void gimple_omp_sections_set_clauses (gimple g,
+          tree clauses)
+     Set `CLAUSES' to be the set of clauses associated with
+     `OMP_SECTIONS' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_OMP_SINGLE',  Next: `GIMPLE_PHI',  Prev: `GIMPLE_OMP_SECTIONS',  Up: Tuple specific accessors
+
+12.7.22 `GIMPLE_OMP_SINGLE'
+---------------------------
+
+ -- GIMPLE function: gimple gimple_build_omp_single (gimple_seq body,
+          tree clauses)
+     Build a `GIMPLE_OMP_SINGLE' statement. `BODY' is the sequence of
+     statements that will be executed once.  `CLAUSES' are any of the
+     `OMP' single construct's clauses: private, firstprivate,
+     copyprivate, nowait.
+
+ -- GIMPLE function: tree gimple_omp_single_clauses (gimple g)
+     Return the clauses associated with `OMP_SINGLE' `G'.
+
+ -- GIMPLE function: tree *gimple_omp_single_clauses_ptr (gimple g)
+     Return a pointer to the clauses associated with `OMP_SINGLE' `G'.
+
+ -- GIMPLE function: void gimple_omp_single_set_clauses (gimple g, tree
+          clauses)
+     Set `CLAUSES' to be the clauses associated with `OMP_SINGLE' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_PHI',  Next: `GIMPLE_RESX',  Prev: `GIMPLE_OMP_SINGLE',  Up: Tuple specific accessors
+
+12.7.23 `GIMPLE_PHI'
+--------------------
+
+ -- GIMPLE function: gimple make_phi_node (tree var, int len)
+     Build a `PHI' node with len argument slots for variable var.
+
+ -- GIMPLE function: unsigned gimple_phi_capacity (gimple g)
+     Return the maximum number of arguments supported by `GIMPLE_PHI'
+     `G'.
+
+ -- GIMPLE function: unsigned gimple_phi_num_args (gimple g)
+     Return the number of arguments in `GIMPLE_PHI' `G'. This must
+     always be exactly the number of incoming edges for the basic block
+     holding `G'.
+
+ -- GIMPLE function: tree gimple_phi_result (gimple g)
+     Return the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: tree *gimple_phi_result_ptr (gimple g)
+     Return a pointer to the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: void gimple_phi_set_result (gimple g, tree result)
+     Set `RESULT' to be the `SSA' name created by `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: struct phi_arg_d *gimple_phi_arg (gimple g, index)
+     Return the `PHI' argument corresponding to incoming edge `INDEX'
+     for `GIMPLE_PHI' `G'.
+
+ -- GIMPLE function: void gimple_phi_set_arg (gimple g, index, struct
+          phi_arg_d * phiarg)
+     Set `PHIARG' to be the argument corresponding to incoming edge
+     `INDEX' for `GIMPLE_PHI' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_RESX',  Next: `GIMPLE_RETURN',  Prev: `GIMPLE_PHI',  Up: Tuple specific accessors
+
+12.7.24 `GIMPLE_RESX'
+---------------------
+
+ -- GIMPLE function: gimple gimple_build_resx (int region)
+     Build a `GIMPLE_RESX' statement which is a statement.  This
+     statement is a placeholder for _Unwind_Resume before we know if a
+     function call or a branch is needed.  `REGION' is the exception
+     region from which control is flowing.
+
+ -- GIMPLE function: int gimple_resx_region (gimple g)
+     Return the region number for `GIMPLE_RESX' `G'.
+
+ -- GIMPLE function: void gimple_resx_set_region (gimple g, int region)
+     Set `REGION' to be the region number for `GIMPLE_RESX' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_RETURN',  Next: `GIMPLE_SWITCH',  Prev: `GIMPLE_RESX',  Up: Tuple specific accessors
+
+12.7.25 `GIMPLE_RETURN'
+-----------------------
+
+ -- GIMPLE function: gimple gimple_build_return (tree retval)
+     Build a `GIMPLE_RETURN' statement whose return value is retval.
+
+ -- GIMPLE function: tree gimple_return_retval (gimple g)
+     Return the return value for `GIMPLE_RETURN' `G'.
+
+ -- GIMPLE function: void gimple_return_set_retval (gimple g, tree
+          retval)
+     Set `RETVAL' to be the return value for `GIMPLE_RETURN' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_SWITCH',  Next: `GIMPLE_TRY',  Prev: `GIMPLE_RETURN',  Up: Tuple specific accessors
+
+12.7.26 `GIMPLE_SWITCH'
+-----------------------
+
+ -- GIMPLE function: gimple gimple_build_switch ( nlabels, tree index,
+          tree default_label, ...)
+     Build a `GIMPLE_SWITCH' statement.  `NLABELS' are the number of
+     labels excluding the default label.  The default label is passed
+     in `DEFAULT_LABEL'.  The rest of the arguments are trees
+     representing the labels.  Each label is a tree of code
+     `CASE_LABEL_EXPR'.
+
+ -- GIMPLE function: gimple gimple_build_switch_vec (tree index, tree
+          default_label, `VEC'(tree,heap) *args)
+     This function is an alternate way of building `GIMPLE_SWITCH'
+     statements.  `INDEX' and `DEFAULT_LABEL' are as in
+     gimple_build_switch.  `ARGS' is a vector of `CASE_LABEL_EXPR' trees
+     that contain the labels.
+
+ -- GIMPLE function: unsigned gimple_switch_num_labels (gimple g)
+     Return the number of labels associated with the switch statement
+     `G'.
+
+ -- GIMPLE function: void gimple_switch_set_num_labels (gimple g,
+          unsigned nlabels)
+     Set `NLABELS' to be the number of labels for the switch statement
+     `G'.
+
+ -- GIMPLE function: tree gimple_switch_index (gimple g)
+     Return the index variable used by the switch statement `G'.
+
+ -- GIMPLE function: void gimple_switch_set_index (gimple g, tree index)
+     Set `INDEX' to be the index variable for switch statement `G'.
+
+ -- GIMPLE function: tree gimple_switch_label (gimple g, unsigned index)
+     Return the label numbered `INDEX'. The default label is 0, followed
+     by any labels in a switch statement.
+
+ -- GIMPLE function: void gimple_switch_set_label (gimple g, unsigned
+          index, tree label)
+     Set the label number `INDEX' to `LABEL'. 0 is always the default
+     label.
+
+ -- GIMPLE function: tree gimple_switch_default_label (gimple g)
+     Return the default label for a switch statement.
+
+ -- GIMPLE function: void gimple_switch_set_default_label (gimple g,
+          tree label)
+     Set the default label for a switch statement.
+
+
+File: gccint.info,  Node: `GIMPLE_TRY',  Next: `GIMPLE_WITH_CLEANUP_EXPR',  Prev: `GIMPLE_SWITCH',  Up: Tuple specific accessors
+
+12.7.27 `GIMPLE_TRY'
+--------------------
+
+ -- GIMPLE function: gimple gimple_build_try (gimple_seq eval,
+          gimple_seq cleanup, unsigned int kind)
+     Build a `GIMPLE_TRY' statement.  `EVAL' is a sequence with the
+     expression to evaluate.  `CLEANUP' is a sequence of statements to
+     run at clean-up time.  `KIND' is the enumeration value
+     `GIMPLE_TRY_CATCH' if this statement denotes a try/catch construct
+     or `GIMPLE_TRY_FINALLY' if this statement denotes a try/finally
+     construct.
+
+ -- GIMPLE function: enum gimple_try_flags gimple_try_kind (gimple g)
+     Return the kind of try block represented by `GIMPLE_TRY' `G'. This
+     is either `GIMPLE_TRY_CATCH' or `GIMPLE_TRY_FINALLY'.
+
+ -- GIMPLE function: bool gimple_try_catch_is_cleanup (gimple g)
+     Return the `GIMPLE_TRY_CATCH_IS_CLEANUP' flag.
+
+ -- GIMPLE function: gimple_seq gimple_try_eval (gimple g)
+     Return the sequence of statements used as the body for `GIMPLE_TRY'
+     `G'.
+
+ -- GIMPLE function: gimple_seq gimple_try_cleanup (gimple g)
+     Return the sequence of statements used as the cleanup body for
+     `GIMPLE_TRY' `G'.
+
+ -- GIMPLE function: void gimple_try_set_catch_is_cleanup (gimple g,
+          bool catch_is_cleanup)
+     Set the `GIMPLE_TRY_CATCH_IS_CLEANUP' flag.
+
+ -- GIMPLE function: void gimple_try_set_eval (gimple g, gimple_seq
+          eval)
+     Set `EVAL' to be the sequence of statements to use as the body for
+     `GIMPLE_TRY' `G'.
+
+ -- GIMPLE function: void gimple_try_set_cleanup (gimple g, gimple_seq
+          cleanup)
+     Set `CLEANUP' to be the sequence of statements to use as the
+     cleanup body for `GIMPLE_TRY' `G'.
+
+
+File: gccint.info,  Node: `GIMPLE_WITH_CLEANUP_EXPR',  Prev: `GIMPLE_TRY',  Up: Tuple specific accessors
+
+12.7.28 `GIMPLE_WITH_CLEANUP_EXPR'
+----------------------------------
+
+ -- GIMPLE function: gimple gimple_build_wce (gimple_seq cleanup)
+     Build a `GIMPLE_WITH_CLEANUP_EXPR' statement.  `CLEANUP' is the
+     clean-up expression.
+
+ -- GIMPLE function: gimple_seq gimple_wce_cleanup (gimple g)
+     Return the cleanup sequence for cleanup statement `G'.
+
+ -- GIMPLE function: void gimple_wce_set_cleanup (gimple g, gimple_seq
+          cleanup)
+     Set `CLEANUP' to be the cleanup sequence for `G'.
+
+ -- GIMPLE function: bool gimple_wce_cleanup_eh_only (gimple g)
+     Return the `CLEANUP_EH_ONLY' flag for a `WCE' tuple.
+
+ -- GIMPLE function: void gimple_wce_set_cleanup_eh_only (gimple g,
+          bool eh_only_p)
+     Set the `CLEANUP_EH_ONLY' flag for a `WCE' tuple.
+
+
+File: gccint.info,  Node: GIMPLE sequences,  Next: Sequence iterators,  Prev: Tuple specific accessors,  Up: GIMPLE
+
+12.8 GIMPLE sequences
+=====================
+
+GIMPLE sequences are the tuple equivalent of `STATEMENT_LIST''s used in
+`GENERIC'.  They are used to chain statements together, and when used
+in conjunction with sequence iterators, provide a framework for
+iterating through statements.
+
+ GIMPLE sequences are of type struct `gimple_sequence', but are more
+commonly passed by reference to functions dealing with sequences.  The
+type for a sequence pointer is `gimple_seq' which is the same as struct
+`gimple_sequence' *.  When declaring a local sequence, you can define a
+local variable of type struct `gimple_sequence'.  When declaring a
+sequence allocated on the garbage collected heap, use the function
+`gimple_seq_alloc' documented below.
+
+ There are convenience functions for iterating through sequences in the
+section entitled Sequence Iterators.
+
+ Below is a list of functions to manipulate and query sequences.
+
+ -- GIMPLE function: void gimple_seq_add_stmt (gimple_seq *seq, gimple
+          g)
+     Link a gimple statement to the end of the sequence *`SEQ' if `G' is
+     not `NULL'.  If *`SEQ' is `NULL', allocate a sequence before
+     linking.
+
+ -- GIMPLE function: void gimple_seq_add_seq (gimple_seq *dest,
+          gimple_seq src)
+     Append sequence `SRC' to the end of sequence *`DEST' if `SRC' is
+     not `NULL'.  If *`DEST' is `NULL', allocate a new sequence before
+     appending.
+
+ -- GIMPLE function: gimple_seq gimple_seq_deep_copy (gimple_seq src)
+     Perform a deep copy of sequence `SRC' and return the result.
+
+ -- GIMPLE function: gimple_seq gimple_seq_reverse (gimple_seq seq)
+     Reverse the order of the statements in the sequence `SEQ'.  Return
+     `SEQ'.
+
+ -- GIMPLE function: gimple gimple_seq_first (gimple_seq s)
+     Return the first statement in sequence `S'.
+
+ -- GIMPLE function: gimple gimple_seq_last (gimple_seq s)
+     Return the last statement in sequence `S'.
+
+ -- GIMPLE function: void gimple_seq_set_last (gimple_seq s, gimple
+          last)
+     Set the last statement in sequence `S' to the statement in `LAST'.
+
+ -- GIMPLE function: void gimple_seq_set_first (gimple_seq s, gimple
+          first)
+     Set the first statement in sequence `S' to the statement in
+     `FIRST'.
+
+ -- GIMPLE function: void gimple_seq_init (gimple_seq s)
+     Initialize sequence `S' to an empty sequence.
+
+ -- GIMPLE function: gimple_seq gimple_seq_alloc (void)
+     Allocate a new sequence in the garbage collected store and return
+     it.
+
+ -- GIMPLE function: void gimple_seq_copy (gimple_seq dest, gimple_seq
+          src)
+     Copy the sequence `SRC' into the sequence `DEST'.
+
+ -- GIMPLE function: bool gimple_seq_empty_p (gimple_seq s)
+     Return true if the sequence `S' is empty.
+
+ -- GIMPLE function: gimple_seq bb_seq (basic_block bb)
+     Returns the sequence of statements in `BB'.
+
+ -- GIMPLE function: void set_bb_seq (basic_block bb, gimple_seq seq)
+     Sets the sequence of statements in `BB' to `SEQ'.
+
+ -- GIMPLE function: bool gimple_seq_singleton_p (gimple_seq seq)
+     Determine whether `SEQ' contains exactly one statement.
+
+
+File: gccint.info,  Node: Sequence iterators,  Next: Adding a new GIMPLE statement code,  Prev: GIMPLE sequences,  Up: GIMPLE
+
+12.9 Sequence iterators
+=======================
+
+Sequence iterators are convenience constructs for iterating through
+statements in a sequence.  Given a sequence `SEQ', here is a typical
+use of gimple sequence iterators:
+
+     gimple_stmt_iterator gsi;
+
+     for (gsi = gsi_start (seq); !gsi_end_p (gsi); gsi_next (&gsi))
+       {
+         gimple g = gsi_stmt (gsi);
+         /* Do something with gimple statement `G'.  */
+       }
+
+ Backward iterations are possible:
+
+             for (gsi = gsi_last (seq); !gsi_end_p (gsi); gsi_prev (&gsi))
+
+ Forward and backward iterations on basic blocks are possible with
+`gsi_start_bb' and `gsi_last_bb'.
+
+ In the documentation below we sometimes refer to enum
+`gsi_iterator_update'.  The valid options for this enumeration are:
+
+   * `GSI_NEW_STMT' Only valid when a single statement is added.  Move
+     the iterator to it.
+
+   * `GSI_SAME_STMT' Leave the iterator at the same statement.
+
+   * `GSI_CONTINUE_LINKING' Move iterator to whatever position is
+     suitable for linking other statements in the same direction.
+
+ Below is a list of the functions used to manipulate and use statement
+iterators.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_start (gimple_seq seq)
+     Return a new iterator pointing to the sequence `SEQ''s first
+     statement.  If `SEQ' is empty, the iterator's basic block is
+     `NULL'.  Use `gsi_start_bb' instead when the iterator needs to
+     always have the correct basic block set.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_start_bb (basic_block bb)
+     Return a new iterator pointing to the first statement in basic
+     block `BB'.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_last (gimple_seq seq)
+     Return a new iterator initially pointing to the last statement of
+     sequence `SEQ'.  If `SEQ' is empty, the iterator's basic block is
+     `NULL'.  Use `gsi_last_bb' instead when the iterator needs to
+     always have the correct basic block set.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_last_bb (basic_block bb)
+     Return a new iterator pointing to the last statement in basic
+     block `BB'.
+
+ -- GIMPLE function: bool gsi_end_p (gimple_stmt_iterator i)
+     Return `TRUE' if at the end of `I'.
+
+ -- GIMPLE function: bool gsi_one_before_end_p (gimple_stmt_iterator i)
+     Return `TRUE' if we're one statement before the end of `I'.
+
+ -- GIMPLE function: void gsi_next (gimple_stmt_iterator *i)
+     Advance the iterator to the next gimple statement.
+
+ -- GIMPLE function: void gsi_prev (gimple_stmt_iterator *i)
+     Advance the iterator to the previous gimple statement.
+
+ -- GIMPLE function: gimple gsi_stmt (gimple_stmt_iterator i)
+     Return the current stmt.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_after_labels (basic_block
+          bb)
+     Return a block statement iterator that points to the first
+     non-label statement in block `BB'.
+
+ -- GIMPLE function: gimple *gsi_stmt_ptr (gimple_stmt_iterator *i)
+     Return a pointer to the current stmt.
+
+ -- GIMPLE function: basic_block gsi_bb (gimple_stmt_iterator i)
+     Return the basic block associated with this iterator.
+
+ -- GIMPLE function: gimple_seq gsi_seq (gimple_stmt_iterator i)
+     Return the sequence associated with this iterator.
+
+ -- GIMPLE function: void gsi_remove (gimple_stmt_iterator *i, bool
+          remove_eh_info)
+     Remove the current stmt from the sequence.  The iterator is
+     updated to point to the next statement.  When `REMOVE_EH_INFO' is
+     true we remove the statement pointed to by iterator `I' from the
+     `EH' tables.  Otherwise we do not modify the `EH' tables.
+     Generally, `REMOVE_EH_INFO' should be true when the statement is
+     going to be removed from the `IL' and not reinserted elsewhere.
+
+ -- GIMPLE function: void gsi_link_seq_before (gimple_stmt_iterator *i,
+          gimple_seq seq, enum gsi_iterator_update mode)
+     Links the sequence of statements `SEQ' before the statement pointed
+     by iterator `I'.  `MODE' indicates what to do with the iterator
+     after insertion (see `enum gsi_iterator_update' above).
+
+ -- GIMPLE function: void gsi_link_before (gimple_stmt_iterator *i,
+          gimple g, enum gsi_iterator_update mode)
+     Links statement `G' before the statement pointed-to by iterator
+     `I'.  Updates iterator `I' according to `MODE'.
+
+ -- GIMPLE function: void gsi_link_seq_after (gimple_stmt_iterator *i,
+          gimple_seq seq, enum gsi_iterator_update mode)
+     Links sequence `SEQ' after the statement pointed-to by iterator
+     `I'.  `MODE' is as in `gsi_insert_after'.
+
+ -- GIMPLE function: void gsi_link_after (gimple_stmt_iterator *i,
+          gimple g, enum gsi_iterator_update mode)
+     Links statement `G' after the statement pointed-to by iterator `I'.
+     `MODE' is as in `gsi_insert_after'.
+
+ -- GIMPLE function: gimple_seq gsi_split_seq_after
+          (gimple_stmt_iterator i)
+     Move all statements in the sequence after `I' to a new sequence.
+     Return this new sequence.
+
+ -- GIMPLE function: gimple_seq gsi_split_seq_before
+          (gimple_stmt_iterator *i)
+     Move all statements in the sequence before `I' to a new sequence.
+     Return this new sequence.
+
+ -- GIMPLE function: void gsi_replace (gimple_stmt_iterator *i, gimple
+          stmt, bool update_eh_info)
+     Replace the statement pointed-to by `I' to `STMT'.  If
+     `UPDATE_EH_INFO' is true, the exception handling information of
+     the original statement is moved to the new statement.
+
+ -- GIMPLE function: void gsi_insert_before (gimple_stmt_iterator *i,
+          gimple stmt, enum gsi_iterator_update mode)
+     Insert statement `STMT' before the statement pointed-to by iterator
+     `I', update `STMT''s basic block and scan it for new operands.
+     `MODE' specifies how to update iterator `I' after insertion (see
+     enum `gsi_iterator_update').
+
+ -- GIMPLE function: void gsi_insert_seq_before (gimple_stmt_iterator
+          *i, gimple_seq seq, enum gsi_iterator_update mode)
+     Like `gsi_insert_before', but for all the statements in `SEQ'.
+
+ -- GIMPLE function: void gsi_insert_after (gimple_stmt_iterator *i,
+          gimple stmt, enum gsi_iterator_update mode)
+     Insert statement `STMT' after the statement pointed-to by iterator
+     `I', update `STMT''s basic block and scan it for new operands.
+     `MODE' specifies how to update iterator `I' after insertion (see
+     enum `gsi_iterator_update').
+
+ -- GIMPLE function: void gsi_insert_seq_after (gimple_stmt_iterator
+          *i, gimple_seq seq, enum gsi_iterator_update mode)
+     Like `gsi_insert_after', but for all the statements in `SEQ'.
+
+ -- GIMPLE function: gimple_stmt_iterator gsi_for_stmt (gimple stmt)
+     Finds iterator for `STMT'.
+
+ -- GIMPLE function: void gsi_move_after (gimple_stmt_iterator *from,
+          gimple_stmt_iterator *to)
+     Move the statement at `FROM' so it comes right after the statement
+     at `TO'.
+
+ -- GIMPLE function: void gsi_move_before (gimple_stmt_iterator *from,
+          gimple_stmt_iterator *to)
+     Move the statement at `FROM' so it comes right before the statement
+     at `TO'.
+
+ -- GIMPLE function: void gsi_move_to_bb_end (gimple_stmt_iterator
+          *from, basic_block bb)
+     Move the statement at `FROM' to the end of basic block `BB'.
+
+ -- GIMPLE function: void gsi_insert_on_edge (edge e, gimple stmt)
+     Add `STMT' to the pending list of edge `E'.  No actual insertion is
+     made until a call to `gsi_commit_edge_inserts'() is made.
+
+ -- GIMPLE function: void gsi_insert_seq_on_edge (edge e, gimple_seq
+          seq)
+     Add the sequence of statements in `SEQ' to the pending list of edge
+     `E'.  No actual insertion is made until a call to
+     `gsi_commit_edge_inserts'() is made.
+
+ -- GIMPLE function: basic_block gsi_insert_on_edge_immediate (edge e,
+          gimple stmt)
+     Similar to `gsi_insert_on_edge'+`gsi_commit_edge_inserts'.  If a
+     new block has to be created, it is returned.
+
+ -- GIMPLE function: void gsi_commit_one_edge_insert (edge e,
+          basic_block *new_bb)
+     Commit insertions pending at edge `E'.  If a new block is created,
+     set `NEW_BB' to this block, otherwise set it to `NULL'.
+
+ -- GIMPLE function: void gsi_commit_edge_inserts (void)
+     This routine will commit all pending edge insertions, creating any
+     new basic blocks which are necessary.
+
+
+File: gccint.info,  Node: Adding a new GIMPLE statement code,  Next: Statement and operand traversals,  Prev: Sequence iterators,  Up: GIMPLE
+
+12.10 Adding a new GIMPLE statement code
+========================================
+
+The first step in adding a new GIMPLE statement code, is modifying the
+file `gimple.def', which contains all the GIMPLE codes.  Then you must
+add a corresponding structure, and an entry in `union
+gimple_statement_d', both of which are located in `gimple.h'.  This in
+turn, will require you to add a corresponding `GTY' tag in
+`gsstruct.def', and code to handle this tag in `gss_for_code' which is
+located in `gimple.c'.
+
+ In order for the garbage collector to know the size of the structure
+you created in `gimple.h', you need to add a case to handle your new
+GIMPLE statement in `gimple_size' which is located in `gimple.c'.
+
+ You will probably want to create a function to build the new gimple
+statement in `gimple.c'.  The function should be called
+`gimple_build_<`NEW_TUPLE_NAME'>', and should return the new tuple of
+type gimple.
+
+ If your new statement requires accessors for any members or operands
+it may have, put simple inline accessors in `gimple.h' and any
+non-trivial accessors in `gimple.c' with a corresponding prototype in
+`gimple.h'.
+
+
+File: gccint.info,  Node: Statement and operand traversals,  Prev: Adding a new GIMPLE statement code,  Up: GIMPLE
+
+12.11 Statement and operand traversals
+======================================
+
+There are two functions available for walking statements and sequences:
+`walk_gimple_stmt' and `walk_gimple_seq', accordingly, and a third
+function for walking the operands in a statement: `walk_gimple_op'.
+
+ -- GIMPLE function: tree walk_gimple_stmt (gimple_stmt_iterator *gsi,
+          walk_stmt_fn callback_stmt, walk_tree_fn callback_op, struct
+          walk_stmt_info *wi)
+     This function is used to walk the current statement in `GSI',
+     optionally using traversal state stored in `WI'.  If `WI' is
+     `NULL', no state is kept during the traversal.
+
+     The callback `CALLBACK_STMT' is called.  If `CALLBACK_STMT' returns
+     true, it means that the callback function has handled all the
+     operands of the statement and it is not necessary to walk its
+     operands.
+
+     If `CALLBACK_STMT' is `NULL' or it returns false, `CALLBACK_OP' is
+     called on each operand of the statement via `walk_gimple_op'.  If
+     `walk_gimple_op' returns non-`NULL' for any operand, the remaining
+     operands are not scanned.
+
+     The return value is that returned by the last call to
+     `walk_gimple_op', or `NULL_TREE' if no `CALLBACK_OP' is specified.
+
+ -- GIMPLE function: tree walk_gimple_op (gimple stmt, walk_tree_fn
+          callback_op, struct walk_stmt_info *wi)
+     Use this function to walk the operands of statement `STMT'.  Every
+     operand is walked via `walk_tree' with optional state information
+     in `WI'.
+
+     `CALLBACK_OP' is called on each operand of `STMT' via `walk_tree'.
+     Additional parameters to `walk_tree' must be stored in `WI'.  For
+     each operand `OP', `walk_tree' is called as:
+
+              walk_tree (&`OP', `CALLBACK_OP', `WI', `WI'- `PSET')
+
+     If `CALLBACK_OP' returns non-`NULL' for an operand, the remaining
+     operands are not scanned.  The return value is that returned by
+     the last call to `walk_tree', or `NULL_TREE' if no `CALLBACK_OP' is
+     specified.
+
+ -- GIMPLE function: tree walk_gimple_seq (gimple_seq seq, walk_stmt_fn
+          callback_stmt, walk_tree_fn callback_op, struct
+          walk_stmt_info *wi)
+     This function walks all the statements in the sequence `SEQ'
+     calling `walk_gimple_stmt' on each one.  `WI' is as in
+     `walk_gimple_stmt'.  If `walk_gimple_stmt' returns non-`NULL', the
+     walk is stopped and the value returned.  Otherwise, all the
+     statements are walked and `NULL_TREE' returned.
+
+
+File: gccint.info,  Node: Tree SSA,  Next: RTL,  Prev: GIMPLE,  Up: Top
+
+13 Analysis and Optimization of GIMPLE tuples
+*********************************************
+
+GCC uses three main intermediate languages to represent the program
+during compilation: GENERIC, GIMPLE and RTL.  GENERIC is a
+language-independent representation generated by each front end.  It is
+used to serve as an interface between the parser and optimizer.
+GENERIC is a common representation that is able to represent programs
+written in all the languages supported by GCC.
+
+ GIMPLE and RTL are used to optimize the program.  GIMPLE is used for
+target and language independent optimizations (e.g., inlining, constant
+propagation, tail call elimination, redundancy elimination, etc).  Much
+like GENERIC, GIMPLE is a language independent, tree based
+representation.  However, it differs from GENERIC in that the GIMPLE
+grammar is more restrictive: expressions contain no more than 3
+operands (except function calls), it has no control flow structures and
+expressions with side-effects are only allowed on the right hand side
+of assignments.  See the chapter describing GENERIC and GIMPLE for more
+details.
+
+ This chapter describes the data structures and functions used in the
+GIMPLE optimizers (also known as "tree optimizers" or "middle end").
+In particular, it focuses on all the macros, data structures, functions
+and programming constructs needed to implement optimization passes for
+GIMPLE.
+
+* Menu:
+
+* Annotations::         Attributes for variables.
+* SSA Operands::        SSA names referenced by GIMPLE statements.
+* SSA::                 Static Single Assignment representation.
+* Alias analysis::      Representing aliased loads and stores.
+* Memory model::        Memory model used by the middle-end.
+
+
+File: gccint.info,  Node: Annotations,  Next: SSA Operands,  Up: Tree SSA
+
+13.1 Annotations
+================
+
+The optimizers need to associate attributes with variables during the
+optimization process.  For instance, we need to know whether a variable
+has aliases.  All these attributes are stored in data structures called
+annotations which are then linked to the field `ann' in `struct
+tree_common'.
+
+ Presently, we define annotations for variables (`var_ann_t').
+Annotations are defined and documented in `tree-flow.h'.
+
+
+File: gccint.info,  Node: SSA Operands,  Next: SSA,  Prev: Annotations,  Up: Tree SSA
+
+13.2 SSA Operands
+=================
+
+Almost every GIMPLE statement will contain a reference to a variable or
+memory location.  Since statements come in different shapes and sizes,
+their operands are going to be located at various spots inside the
+statement's tree.  To facilitate access to the statement's operands,
+they are organized into lists associated inside each statement's
+annotation.  Each element in an operand list is a pointer to a
+`VAR_DECL', `PARM_DECL' or `SSA_NAME' tree node.  This provides a very
+convenient way of examining and replacing operands.
+
+ Data flow analysis and optimization is done on all tree nodes
+representing variables.  Any node for which `SSA_VAR_P' returns nonzero
+is considered when scanning statement operands.  However, not all
+`SSA_VAR_P' variables are processed in the same way.  For the purposes
+of optimization, we need to distinguish between references to local
+scalar variables and references to globals, statics, structures,
+arrays, aliased variables, etc.  The reason is simple, the compiler can
+gather complete data flow information for a local scalar.  On the other
+hand, a global variable may be modified by a function call, it may not
+be possible to keep track of all the elements of an array or the fields
+of a structure, etc.
+
+ The operand scanner gathers two kinds of operands: "real" and
+"virtual".  An operand for which `is_gimple_reg' returns true is
+considered real, otherwise it is a virtual operand.  We also
+distinguish between uses and definitions.  An operand is used if its
+value is loaded by the statement (e.g., the operand at the RHS of an
+assignment).  If the statement assigns a new value to the operand, the
+operand is considered a definition (e.g., the operand at the LHS of an
+assignment).
+
+ Virtual and real operands also have very different data flow
+properties.  Real operands are unambiguous references to the full
+object that they represent.  For instance, given
+
+     {
+       int a, b;
+       a = b
+     }
+
+ Since `a' and `b' are non-aliased locals, the statement `a = b' will
+have one real definition and one real use because variable `a' is
+completely modified with the contents of variable `b'.  Real definition
+are also known as "killing definitions".  Similarly, the use of `b'
+reads all its bits.
+
+ In contrast, virtual operands are used with variables that can have a
+partial or ambiguous reference.  This includes structures, arrays,
+globals, and aliased variables.  In these cases, we have two types of
+definitions.  For globals, structures, and arrays, we can determine from
+a statement whether a variable of these types has a killing definition.
+If the variable does, then the statement is marked as having a "must
+definition" of that variable.  However, if a statement is only defining
+a part of the variable (i.e. a field in a structure), or if we know
+that a statement might define the variable but we cannot say for sure,
+then we mark that statement as having a "may definition".  For
+instance, given
+
+     {
+       int a, b, *p;
+
+       if (...)
+         p = &a;
+       else
+         p = &b;
+       *p = 5;
+       return *p;
+     }
+
+ The assignment `*p = 5' may be a definition of `a' or `b'.  If we
+cannot determine statically where `p' is pointing to at the time of the
+store operation, we create virtual definitions to mark that statement
+as a potential definition site for `a' and `b'.  Memory loads are
+similarly marked with virtual use operands.  Virtual operands are shown
+in tree dumps right before the statement that contains them.  To
+request a tree dump with virtual operands, use the `-vops' option to
+`-fdump-tree':
+
+     {
+       int a, b, *p;
+
+       if (...)
+         p = &a;
+       else
+         p = &b;
+       # a = VDEF <a>
+       # b = VDEF <b>
+       *p = 5;
+
+       # VUSE <a>
+       # VUSE <b>
+       return *p;
+     }
+
+ Notice that `VDEF' operands have two copies of the referenced
+variable.  This indicates that this is not a killing definition of that
+variable.  In this case we refer to it as a "may definition" or
+"aliased store".  The presence of the second copy of the variable in
+the `VDEF' operand will become important when the function is converted
+into SSA form.  This will be used to link all the non-killing
+definitions to prevent optimizations from making incorrect assumptions
+about them.
+
+ Operands are updated as soon as the statement is finished via a call
+to `update_stmt'.  If statement elements are changed via `SET_USE' or
+`SET_DEF', then no further action is required (i.e., those macros take
+care of updating the statement).  If changes are made by manipulating
+the statement's tree directly, then a call must be made to
+`update_stmt' when complete.  Calling one of the `bsi_insert' routines
+or `bsi_replace' performs an implicit call to `update_stmt'.
+
+13.2.1 Operand Iterators And Access Routines
+--------------------------------------------
+
+Operands are collected by `tree-ssa-operands.c'.  They are stored
+inside each statement's annotation and can be accessed through either
+the operand iterators or an access routine.
+
+ The following access routines are available for examining operands:
+
+  1. `SINGLE_SSA_{USE,DEF,TREE}_OPERAND': These accessors will return
+     NULL unless there is exactly one operand matching the specified
+     flags.  If there is exactly one operand, the operand is returned
+     as either a `tree', `def_operand_p', or `use_operand_p'.
+
+          tree t = SINGLE_SSA_TREE_OPERAND (stmt, flags);
+          use_operand_p u = SINGLE_SSA_USE_OPERAND (stmt, SSA_ALL_VIRTUAL_USES);
+          def_operand_p d = SINGLE_SSA_DEF_OPERAND (stmt, SSA_OP_ALL_DEFS);
+
+  2. `ZERO_SSA_OPERANDS': This macro returns true if there are no
+     operands matching the specified flags.
+
+          if (ZERO_SSA_OPERANDS (stmt, SSA_OP_ALL_VIRTUALS))
+            return;
+
+  3. `NUM_SSA_OPERANDS': This macro Returns the number of operands
+     matching 'flags'.  This actually executes a loop to perform the
+     count, so only use this if it is really needed.
+
+          int count = NUM_SSA_OPERANDS (stmt, flags)
+
+ If you wish to iterate over some or all operands, use the
+`FOR_EACH_SSA_{USE,DEF,TREE}_OPERAND' iterator.  For example, to print
+all the operands for a statement:
+
+     void
+     print_ops (tree stmt)
+     {
+       ssa_op_iter;
+       tree var;
+
+       FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_ALL_OPERANDS)
+         print_generic_expr (stderr, var, TDF_SLIM);
+     }
+
+ How to choose the appropriate iterator:
+
+  1. Determine whether you are need to see the operand pointers, or
+     just the trees, and choose the appropriate macro:
+
+          Need            Macro:
+          ----            -------
+          use_operand_p   FOR_EACH_SSA_USE_OPERAND
+          def_operand_p   FOR_EACH_SSA_DEF_OPERAND
+          tree            FOR_EACH_SSA_TREE_OPERAND
+
+  2. You need to declare a variable of the type you are interested in,
+     and an ssa_op_iter structure which serves as the loop controlling
+     variable.
+
+  3. Determine which operands you wish to use, and specify the flags of
+     those you are interested in.  They are documented in
+     `tree-ssa-operands.h':
+
+          #define SSA_OP_USE              0x01    /* Real USE operands.  */
+          #define SSA_OP_DEF              0x02    /* Real DEF operands.  */
+          #define SSA_OP_VUSE             0x04    /* VUSE operands.  */
+          #define SSA_OP_VMAYUSE          0x08    /* USE portion of VDEFS.  */
+          #define SSA_OP_VDEF             0x10    /* DEF portion of VDEFS.  */
+
+          /* These are commonly grouped operand flags.  */
+          #define SSA_OP_VIRTUAL_USES     (SSA_OP_VUSE | SSA_OP_VMAYUSE)
+          #define SSA_OP_VIRTUAL_DEFS     (SSA_OP_VDEF)
+          #define SSA_OP_ALL_USES         (SSA_OP_VIRTUAL_USES | SSA_OP_USE)
+          #define SSA_OP_ALL_DEFS         (SSA_OP_VIRTUAL_DEFS | SSA_OP_DEF)
+          #define SSA_OP_ALL_OPERANDS     (SSA_OP_ALL_USES | SSA_OP_ALL_DEFS)
+
+ So if you want to look at the use pointers for all the `USE' and
+`VUSE' operands, you would do something like:
+
+       use_operand_p use_p;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_USE_OPERAND (use_p, stmt, iter, (SSA_OP_USE | SSA_OP_VUSE))
+         {
+           process_use_ptr (use_p);
+         }
+
+ The `TREE' macro is basically the same as the `USE' and `DEF' macros,
+only with the use or def dereferenced via `USE_FROM_PTR (use_p)' and
+`DEF_FROM_PTR (def_p)'.  Since we aren't using operand pointers, use
+and defs flags can be mixed.
+
+       tree var;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_TREE_OPERAND (var, stmt, iter, SSA_OP_VUSE)
+         {
+            print_generic_expr (stderr, var, TDF_SLIM);
+         }
+
+ `VDEF's are broken into two flags, one for the `DEF' portion
+(`SSA_OP_VDEF') and one for the USE portion (`SSA_OP_VMAYUSE').  If all
+you want to look at are the `VDEF's together, there is a fourth
+iterator macro for this, which returns both a def_operand_p and a
+use_operand_p for each `VDEF' in the statement.  Note that you don't
+need any flags for this one.
+
+       use_operand_p use_p;
+       def_operand_p def_p;
+       ssa_op_iter iter;
+
+       FOR_EACH_SSA_MAYDEF_OPERAND (def_p, use_p, stmt, iter)
+         {
+           my_code;
+         }
+
+ There are many examples in the code as well, as well as the
+documentation in `tree-ssa-operands.h'.
+
+ There are also a couple of variants on the stmt iterators regarding PHI
+nodes.
+
+ `FOR_EACH_PHI_ARG' Works exactly like `FOR_EACH_SSA_USE_OPERAND',
+except it works over `PHI' arguments instead of statement operands.
+
+     /* Look at every virtual PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_VIRTUAL_USES)
+     {
+        my_code;
+     }
+
+     /* Look at every real PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_USES)
+       my_code;
+
+     /* Look at every PHI use.  */
+     FOR_EACH_PHI_ARG (use_p, phi_stmt, iter, SSA_OP_ALL_USES)
+       my_code;
+
+ `FOR_EACH_PHI_OR_STMT_{USE,DEF}' works exactly like
+`FOR_EACH_SSA_{USE,DEF}_OPERAND', except it will function on either a
+statement or a `PHI' node.  These should be used when it is appropriate
+but they are not quite as efficient as the individual `FOR_EACH_PHI'
+and `FOR_EACH_SSA' routines.
+
+     FOR_EACH_PHI_OR_STMT_USE (use_operand_p, stmt, iter, flags)
+       {
+          my_code;
+       }
+
+     FOR_EACH_PHI_OR_STMT_DEF (def_operand_p, phi, iter, flags)
+       {
+          my_code;
+       }
+
+13.2.2 Immediate Uses
+---------------------
+
+Immediate use information is now always available.  Using the immediate
+use iterators, you may examine every use of any `SSA_NAME'. For
+instance, to change each use of `ssa_var' to `ssa_var2' and call
+fold_stmt on each stmt after that is done:
+
+       use_operand_p imm_use_p;
+       imm_use_iterator iterator;
+       tree ssa_var, stmt;
+
+
+       FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+         {
+           FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+             SET_USE (imm_use_p, ssa_var_2);
+           fold_stmt (stmt);
+         }
+
+ There are 2 iterators which can be used. `FOR_EACH_IMM_USE_FAST' is
+used when the immediate uses are not changed, i.e., you are looking at
+the uses, but not setting them.
+
+ If they do get changed, then care must be taken that things are not
+changed under the iterators, so use the `FOR_EACH_IMM_USE_STMT' and
+`FOR_EACH_IMM_USE_ON_STMT' iterators.  They attempt to preserve the
+sanity of the use list by moving all the uses for a statement into a
+controlled position, and then iterating over those uses.  Then the
+optimization can manipulate the stmt when all the uses have been
+processed.  This is a little slower than the FAST version since it adds
+a placeholder element and must sort through the list a bit for each
+statement.  This placeholder element must be also be removed if the
+loop is terminated early.  The macro `BREAK_FROM_IMM_USE_SAFE' is
+provided to do this :
+
+       FOR_EACH_IMM_USE_STMT (stmt, iterator, ssa_var)
+         {
+           if (stmt == last_stmt)
+             BREAK_FROM_SAFE_IMM_USE (iter);
+
+           FOR_EACH_IMM_USE_ON_STMT (imm_use_p, iterator)
+             SET_USE (imm_use_p, ssa_var_2);
+           fold_stmt (stmt);
+         }
+
+ There are checks in `verify_ssa' which verify that the immediate use
+list is up to date, as well as checking that an optimization didn't
+break from the loop without using this macro.  It is safe to simply
+'break'; from a `FOR_EACH_IMM_USE_FAST' traverse.
+
+ Some useful functions and macros:
+  1. `has_zero_uses (ssa_var)' : Returns true if there are no uses of
+     `ssa_var'.
+
+  2. `has_single_use (ssa_var)' : Returns true if there is only a
+     single use of `ssa_var'.
+
+  3. `single_imm_use (ssa_var, use_operand_p *ptr, tree *stmt)' :
+     Returns true if there is only a single use of `ssa_var', and also
+     returns the use pointer and statement it occurs in, in the second
+     and third parameters.
+
+  4. `num_imm_uses (ssa_var)' : Returns the number of immediate uses of
+     `ssa_var'. It is better not to use this if possible since it simply
+     utilizes a loop to count the uses.
+
+  5. `PHI_ARG_INDEX_FROM_USE (use_p)' : Given a use within a `PHI'
+     node, return the index number for the use.  An assert is triggered
+     if the use isn't located in a `PHI' node.
+
+  6. `USE_STMT (use_p)' : Return the statement a use occurs in.
+
+ Note that uses are not put into an immediate use list until their
+statement is actually inserted into the instruction stream via a
+`bsi_*' routine.
+
+ It is also still possible to utilize lazy updating of statements, but
+this should be used only when absolutely required.  Both alias analysis
+and the dominator optimizations currently do this.
+
+ When lazy updating is being used, the immediate use information is out
+of date and cannot be used reliably.  Lazy updating is achieved by
+simply marking statements modified via calls to `mark_stmt_modified'
+instead of `update_stmt'.  When lazy updating is no longer required,
+all the modified statements must have `update_stmt' called in order to
+bring them up to date.  This must be done before the optimization is
+finished, or `verify_ssa' will trigger an abort.
+
+ This is done with a simple loop over the instruction stream:
+       block_stmt_iterator bsi;
+       basic_block bb;
+       FOR_EACH_BB (bb)
+         {
+           for (bsi = bsi_start (bb); !bsi_end_p (bsi); bsi_next (&bsi))
+             update_stmt_if_modified (bsi_stmt (bsi));
+         }
+
+
+File: gccint.info,  Node: SSA,  Next: Alias analysis,  Prev: SSA Operands,  Up: Tree SSA
+
+13.3 Static Single Assignment
+=============================
+
+Most of the tree optimizers rely on the data flow information provided
+by the Static Single Assignment (SSA) form.  We implement the SSA form
+as described in `R. Cytron, J. Ferrante, B. Rosen, M. Wegman, and K.
+Zadeck.  Efficiently Computing Static Single Assignment Form and the
+Control Dependence Graph.  ACM Transactions on Programming Languages
+and Systems, 13(4):451-490, October 1991'.
+
+ The SSA form is based on the premise that program variables are
+assigned in exactly one location in the program.  Multiple assignments
+to the same variable create new versions of that variable.  Naturally,
+actual programs are seldom in SSA form initially because variables tend
+to be assigned multiple times.  The compiler modifies the program
+representation so that every time a variable is assigned in the code, a
+new version of the variable is created.  Different versions of the same
+variable are distinguished by subscripting the variable name with its
+version number.  Variables used in the right-hand side of expressions
+are renamed so that their version number matches that of the most
+recent assignment.
+
+ We represent variable versions using `SSA_NAME' nodes.  The renaming
+process in `tree-ssa.c' wraps every real and virtual operand with an
+`SSA_NAME' node which contains the version number and the statement
+that created the `SSA_NAME'.  Only definitions and virtual definitions
+may create new `SSA_NAME' nodes.
+
+ Sometimes, flow of control makes it impossible to determine the most
+recent version of a variable.  In these cases, the compiler inserts an
+artificial definition for that variable called "PHI function" or "PHI
+node".  This new definition merges all the incoming versions of the
+variable to create a new name for it.  For instance,
+
+     if (...)
+       a_1 = 5;
+     else if (...)
+       a_2 = 2;
+     else
+       a_3 = 13;
+
+     # a_4 = PHI <a_1, a_2, a_3>
+     return a_4;
+
+ Since it is not possible to determine which of the three branches will
+be taken at runtime, we don't know which of `a_1', `a_2' or `a_3' to
+use at the return statement.  So, the SSA renamer creates a new version
+`a_4' which is assigned the result of "merging" `a_1', `a_2' and `a_3'.
+Hence, PHI nodes mean "one of these operands.  I don't know which".
+
+ The following macros can be used to examine PHI nodes
+
+ -- Macro: PHI_RESULT (PHI)
+     Returns the `SSA_NAME' created by PHI node PHI (i.e., PHI's LHS).
+
+ -- Macro: PHI_NUM_ARGS (PHI)
+     Returns the number of arguments in PHI.  This number is exactly
+     the number of incoming edges to the basic block holding PHI.
+
+ -- Macro: PHI_ARG_ELT (PHI, I)
+     Returns a tuple representing the Ith argument of PHI.  Each
+     element of this tuple contains an `SSA_NAME' VAR and the incoming
+     edge through which VAR flows.
+
+ -- Macro: PHI_ARG_EDGE (PHI, I)
+     Returns the incoming edge for the Ith argument of PHI.
+
+ -- Macro: PHI_ARG_DEF (PHI, I)
+     Returns the `SSA_NAME' for the Ith argument of PHI.
+
+13.3.1 Preserving the SSA form
+------------------------------
+
+Some optimization passes make changes to the function that invalidate
+the SSA property.  This can happen when a pass has added new symbols or
+changed the program so that variables that were previously aliased
+aren't anymore.  Whenever something like this happens, the affected
+symbols must be renamed into SSA form again.  Transformations that emit
+new code or replicate existing statements will also need to update the
+SSA form.
+
+ Since GCC implements two different SSA forms for register and virtual
+variables, keeping the SSA form up to date depends on whether you are
+updating register or virtual names.  In both cases, the general idea
+behind incremental SSA updates is similar: when new SSA names are
+created, they typically are meant to replace other existing names in
+the program.
+
+ For instance, given the following code:
+
+          1  L0:
+          2  x_1 = PHI (0, x_5)
+          3  if (x_1 < 10)
+          4    if (x_1 > 7)
+          5      y_2 = 0
+          6    else
+          7      y_3 = x_1 + x_7
+          8    endif
+          9    x_5 = x_1 + 1
+          10   goto L0;
+          11 endif
+
+ Suppose that we insert new names `x_10' and `x_11' (lines `4' and `8').
+
+          1  L0:
+          2  x_1 = PHI (0, x_5)
+          3  if (x_1 < 10)
+          4    x_10 = ...
+          5    if (x_1 > 7)
+          6      y_2 = 0
+          7    else
+          8      x_11 = ...
+          9      y_3 = x_1 + x_7
+          10   endif
+          11   x_5 = x_1 + 1
+          12   goto L0;
+          13 endif
+
+ We want to replace all the uses of `x_1' with the new definitions of
+`x_10' and `x_11'.  Note that the only uses that should be replaced are
+those at lines `5', `9' and `11'.  Also, the use of `x_7' at line `9'
+should _not_ be replaced (this is why we cannot just mark symbol `x' for
+renaming).
+
+ Additionally, we may need to insert a PHI node at line `11' because
+that is a merge point for `x_10' and `x_11'.  So the use of `x_1' at
+line `11' will be replaced with the new PHI node.  The insertion of PHI
+nodes is optional.  They are not strictly necessary to preserve the SSA
+form, and depending on what the caller inserted, they may not even be
+useful for the optimizers.
+
+ Updating the SSA form is a two step process.  First, the pass has to
+identify which names need to be updated and/or which symbols need to be
+renamed into SSA form for the first time.  When new names are
+introduced to replace existing names in the program, the mapping
+between the old and the new names are registered by calling
+`register_new_name_mapping' (note that if your pass creates new code by
+duplicating basic blocks, the call to `tree_duplicate_bb' will set up
+the necessary mappings automatically).  On the other hand, if your pass
+exposes a new symbol that should be put in SSA form for the first time,
+the new symbol should be registered with `mark_sym_for_renaming'.
+
+ After the replacement mappings have been registered and new symbols
+marked for renaming, a call to `update_ssa' makes the registered
+changes.  This can be done with an explicit call or by creating `TODO'
+flags in the `tree_opt_pass' structure for your pass.  There are
+several `TODO' flags that control the behavior of `update_ssa':
+
+   * `TODO_update_ssa'.  Update the SSA form inserting PHI nodes for
+     newly exposed symbols and virtual names marked for updating.  When
+     updating real names, only insert PHI nodes for a real name `O_j'
+     in blocks reached by all the new and old definitions for `O_j'.
+     If the iterated dominance frontier for `O_j' is not pruned, we may
+     end up inserting PHI nodes in blocks that have one or more edges
+     with no incoming definition for `O_j'.  This would lead to
+     uninitialized warnings for `O_j''s symbol.
+
+   * `TODO_update_ssa_no_phi'.  Update the SSA form without inserting
+     any new PHI nodes at all.  This is used by passes that have either
+     inserted all the PHI nodes themselves or passes that need only to
+     patch use-def and def-def chains for virtuals (e.g., DCE).
+
+   * `TODO_update_ssa_full_phi'.  Insert PHI nodes everywhere they are
+     needed.  No pruning of the IDF is done.  This is used by passes
+     that need the PHI nodes for `O_j' even if it means that some
+     arguments will come from the default definition of `O_j''s symbol
+     (e.g., `pass_linear_transform').
+
+     WARNING: If you need to use this flag, chances are that your pass
+     may be doing something wrong.  Inserting PHI nodes for an old name
+     where not all edges carry a new replacement may lead to silent
+     codegen errors or spurious uninitialized warnings.
+
+   * `TODO_update_ssa_only_virtuals'.  Passes that update the SSA form
+     on their own may want to delegate the updating of virtual names to
+     the generic updater.  Since FUD chains are easier to maintain,
+     this simplifies the work they need to do.  NOTE: If this flag is
+     used, any OLD->NEW mappings for real names are explicitly
+     destroyed and only the symbols marked for renaming are processed.
+
+13.3.2 Preserving the virtual SSA form
+--------------------------------------
+
+The virtual SSA form is harder to preserve than the non-virtual SSA form
+mainly because the set of virtual operands for a statement may change at
+what some would consider unexpected times.  In general, statement
+modifications should be bracketed between calls to `push_stmt_changes'
+and `pop_stmt_changes'.  For example,
+
+         munge_stmt (tree stmt)
+         {
+            push_stmt_changes (&stmt);
+            ... rewrite STMT ...
+            pop_stmt_changes (&stmt);
+         }
+
+ The call to `push_stmt_changes' saves the current state of the
+statement operands and the call to `pop_stmt_changes' compares the
+saved state with the current one and does the appropriate symbol
+marking for the SSA renamer.
+
+ It is possible to modify several statements at a time, provided that
+`push_stmt_changes' and `pop_stmt_changes' are called in LIFO order, as
+when processing a stack of statements.
+
+ Additionally, if the pass discovers that it did not need to make
+changes to the statement after calling `push_stmt_changes', it can
+simply discard the topmost change buffer by calling
+`discard_stmt_changes'.  This will avoid the expensive operand re-scan
+operation and the buffer comparison that determines if symbols need to
+be marked for renaming.
+
+13.3.3 Examining `SSA_NAME' nodes
+---------------------------------
+
+The following macros can be used to examine `SSA_NAME' nodes
+
+ -- Macro: SSA_NAME_DEF_STMT (VAR)
+     Returns the statement S that creates the `SSA_NAME' VAR.  If S is
+     an empty statement (i.e., `IS_EMPTY_STMT (S)' returns `true'), it
+     means that the first reference to this variable is a USE or a VUSE.
+
+ -- Macro: SSA_NAME_VERSION (VAR)
+     Returns the version number of the `SSA_NAME' object VAR.
+
+13.3.4 Walking use-def chains
+-----------------------------
+
+ -- Tree SSA function: void walk_use_def_chains (VAR, FN, DATA)
+     Walks use-def chains starting at the `SSA_NAME' node VAR.  Calls
+     function FN at each reaching definition found.  Function FN takes
+     three arguments: VAR, its defining statement (DEF_STMT) and a
+     generic pointer to whatever state information that FN may want to
+     maintain (DATA).  Function FN is able to stop the walk by
+     returning `true', otherwise in order to continue the walk, FN
+     should return `false'.
+
+     Note, that if DEF_STMT is a `PHI' node, the semantics are slightly
+     different.  For each argument ARG of the PHI node, this function
+     will:
+
+       1. Walk the use-def chains for ARG.
+
+       2. Call `FN (ARG, PHI, DATA)'.
+
+     Note how the first argument to FN is no longer the original
+     variable VAR, but the PHI argument currently being examined.  If
+     FN wants to get at VAR, it should call `PHI_RESULT' (PHI).
+
+13.3.5 Walking the dominator tree
+---------------------------------
+
+ -- Tree SSA function: void walk_dominator_tree (WALK_DATA, BB)
+     This function walks the dominator tree for the current CFG calling
+     a set of callback functions defined in STRUCT DOM_WALK_DATA in
+     `domwalk.h'.  The call back functions you need to define give you
+     hooks to execute custom code at various points during traversal:
+
+       1. Once to initialize any local data needed while processing BB
+          and its children.  This local data is pushed into an internal
+          stack which is automatically pushed and popped as the walker
+          traverses the dominator tree.
+
+       2. Once before traversing all the statements in the BB.
+
+       3. Once for every statement inside BB.
+
+       4. Once after traversing all the statements and before recursing
+          into BB's dominator children.
+
+       5. It then recurses into all the dominator children of BB.
+
+       6. After recursing into all the dominator children of BB it can,
+          optionally, traverse every statement in BB again (i.e.,
+          repeating steps 2 and 3).
+
+       7. Once after walking the statements in BB and BB's dominator
+          children.  At this stage, the block local data stack is
+          popped.
+
+
+File: gccint.info,  Node: Alias analysis,  Next: Memory model,  Prev: SSA,  Up: Tree SSA
+
+13.4 Alias analysis
+===================
+
+Alias analysis in GIMPLE SSA form consists of two pieces.  First the
+virtual SSA web ties conflicting memory accesses and provides a SSA
+use-def chain and SSA immediate-use chains for walking possibly
+dependent memory accesses.  Second an alias-oracle can be queried to
+disambiguate explicit and implicit memory references.
+
+  1. Memory SSA form.
+
+     All statements that may use memory have exactly one accompanied
+     use of a virtual SSA name that represents the state of memory at
+     the given point in the IL.
+
+     All statements that may define memory have exactly one accompanied
+     definition of a virtual SSA name using the previous state of memory
+     and defining the new state of memory after the given point in the
+     IL.
+
+          int i;
+          int foo (void)
+          {
+            # .MEM_3 = VDEF <.MEM_2(D)>
+            i = 1;
+            # VUSE <.MEM_3>
+            return i;
+          }
+
+     The virtual SSA names in this case are `.MEM_2(D)' and `.MEM_3'.
+     The store to the global variable `i' defines `.MEM_3' invalidating
+     `.MEM_2(D)'.  The load from `i' uses that new state `.MEM_3'.
+
+     The virtual SSA web serves as constraints to SSA optimizers
+     preventing illegitimate code-motion and optimization.  It also
+     provides a way to walk related memory statements.
+
+  2. Points-to and escape analysis.
+
+     Points-to analysis builds a set of constraints from the GIMPLE SSA
+     IL representing all pointer operations and facts we do or do not
+     know about pointers.  Solving this set of constraints yields a
+     conservatively correct solution for each pointer variable in the
+     program (though we are only interested in SSA name pointers) as to
+     what it may possibly point to.
+
+     This points-to solution for a given SSA name pointer is stored in
+     the `pt_solution' sub-structure of the `SSA_NAME_PTR_INFO' record.
+     The following accessor functions are available:
+
+        * `pt_solution_includes'
+
+        * `pt_solutions_intersect'
+
+     Points-to analysis also computes the solution for two special set
+     of pointers, `ESCAPED' and `CALLUSED'.  Those represent all memory
+     that has escaped the scope of analysis or that is used by pure or
+     nested const calls.
+
+  3. Type-based alias analysis
+
+     Type-based alias analysis is frontend dependent though generic
+     support is provided by the middle-end in `alias.c'.  TBAA code is
+     used by both tree optimizers and RTL optimizers.
+
+     Every language that wishes to perform language-specific alias
+     analysis should define a function that computes, given a `tree'
+     node, an alias set for the node.  Nodes in different alias sets
+     are not allowed to alias.  For an example, see the C front-end
+     function `c_get_alias_set'.
+
+  4. Tree alias-oracle
+
+     The tree alias-oracle provides means to disambiguate two memory
+     references and memory references against statements.  The following
+     queries are available:
+
+        * `refs_may_alias_p'
+
+        * `ref_maybe_used_by_stmt_p'
+
+        * `stmt_may_clobber_ref_p'
+
+     In addition to those two kind of statement walkers are available
+     walking statements related to a reference ref.
+     `walk_non_aliased_vuses' walks over dominating memory defining
+     statements and calls back if the statement does not clobber ref
+     providing the non-aliased VUSE.  The walk stops at the first
+     clobbering statement or if asked to.  `walk_aliased_vdefs' walks
+     over dominating memory defining statements and calls back on each
+     statement clobbering ref providing its aliasing VDEF.  The walk
+     stops if asked to.
+
+
+
+File: gccint.info,  Node: Memory model,  Prev: Alias analysis,  Up: Tree SSA
+
+13.5 Memory model
+=================
+
+The memory model used by the middle-end models that of the C/C++
+languages.  The middle-end has the notion of an effective type of a
+memory region which is used for type-based alias analysis.
+
+ The following is a refinement of ISO C99 6.5/6, clarifying the block
+copy case to follow common sense and extending the concept of a dynamic
+effective type to objects with a declared type as required for C++.
+
+     The effective type of an object for an access to its stored value is
+     the declared type of the object or the effective type determined by
+     a previous store to it.  If a value is stored into an object through
+     an lvalue having a type that is not a character type, then the
+     type of the lvalue becomes the effective type of the object for that
+     access and for subsequent accesses that do not modify the stored value.
+     If a value is copied into an object using `memcpy' or `memmove',
+     or is copied as an array of character type, then the effective type
+     of the modified object for that access and for subsequent accesses that
+     do not modify the value is undetermined.  For all other accesses to an
+     object, the effective type of the object is simply the type of the
+     lvalue used for the access.
+
+
+File: gccint.info,  Node: Loop Analysis and Representation,  Next: Machine Desc,  Prev: Control Flow,  Up: Top
+
+14 Analysis and Representation of Loops
+***************************************
+
+GCC provides extensive infrastructure for work with natural loops, i.e.,
+strongly connected components of CFG with only one entry block.  This
+chapter describes representation of loops in GCC, both on GIMPLE and in
+RTL, as well as the interfaces to loop-related analyses (induction
+variable analysis and number of iterations analysis).
+
+* Menu:
+
+* Loop representation::         Representation and analysis of loops.
+* Loop querying::               Getting information about loops.
+* Loop manipulation::           Loop manipulation functions.
+* LCSSA::                       Loop-closed SSA form.
+* Scalar evolutions::           Induction variables on GIMPLE.
+* loop-iv::                     Induction variables on RTL.
+* Number of iterations::        Number of iterations analysis.
+* Dependency analysis::         Data dependency analysis.
+* Lambda::                      Linear loop transformations framework.
+* Omega::                       A solver for linear programming problems.
+
+
+File: gccint.info,  Node: Loop representation,  Next: Loop querying,  Up: Loop Analysis and Representation
+
+14.1 Loop representation
+========================
+
+This chapter describes the representation of loops in GCC, and functions
+that can be used to build, modify and analyze this representation.  Most
+of the interfaces and data structures are declared in `cfgloop.h'.  At
+the moment, loop structures are analyzed and this information is
+updated only by the optimization passes that deal with loops, but some
+efforts are being made to make it available throughout most of the
+optimization passes.
+
+ In general, a natural loop has one entry block (header) and possibly
+several back edges (latches) leading to the header from the inside of
+the loop.  Loops with several latches may appear if several loops share
+a single header, or if there is a branching in the middle of the loop.
+The representation of loops in GCC however allows only loops with a
+single latch.  During loop analysis, headers of such loops are split and
+forwarder blocks are created in order to disambiguate their structures.
+Heuristic based on profile information and structure of the induction
+variables in the loops is used to determine whether the latches
+correspond to sub-loops or to control flow in a single loop.  This means
+that the analysis sometimes changes the CFG, and if you run it in the
+middle of an optimization pass, you must be able to deal with the new
+blocks.  You may avoid CFG changes by passing
+`LOOPS_MAY_HAVE_MULTIPLE_LATCHES' flag to the loop discovery, note
+however that most other loop manipulation functions will not work
+correctly for loops with multiple latch edges (the functions that only
+query membership of blocks to loops and subloop relationships, or
+enumerate and test loop exits, can be expected to work).
+
+ Body of the loop is the set of blocks that are dominated by its header,
+and reachable from its latch against the direction of edges in CFG.  The
+loops are organized in a containment hierarchy (tree) such that all the
+loops immediately contained inside loop L are the children of L in the
+tree.  This tree is represented by the `struct loops' structure.  The
+root of this tree is a fake loop that contains all blocks in the
+function.  Each of the loops is represented in a `struct loop'
+structure.  Each loop is assigned an index (`num' field of the `struct
+loop' structure), and the pointer to the loop is stored in the
+corresponding field of the `larray' vector in the loops structure.  The
+indices do not have to be continuous, there may be empty (`NULL')
+entries in the `larray' created by deleting loops.  Also, there is no
+guarantee on the relative order of a loop and its subloops in the
+numbering.  The index of a loop never changes.
+
+ The entries of the `larray' field should not be accessed directly.
+The function `get_loop' returns the loop description for a loop with
+the given index.  `number_of_loops' function returns number of loops in
+the function.  To traverse all loops, use `FOR_EACH_LOOP' macro.  The
+`flags' argument of the macro is used to determine the direction of
+traversal and the set of loops visited.  Each loop is guaranteed to be
+visited exactly once, regardless of the changes to the loop tree, and
+the loops may be removed during the traversal.  The newly created loops
+are never traversed, if they need to be visited, this must be done
+separately after their creation.  The `FOR_EACH_LOOP' macro allocates
+temporary variables.  If the `FOR_EACH_LOOP' loop were ended using
+break or goto, they would not be released; `FOR_EACH_LOOP_BREAK' macro
+must be used instead.
+
+ Each basic block contains the reference to the innermost loop it
+belongs to (`loop_father').  For this reason, it is only possible to
+have one `struct loops' structure initialized at the same time for each
+CFG.  The global variable `current_loops' contains the `struct loops'
+structure.  Many of the loop manipulation functions assume that
+dominance information is up-to-date.
+
+ The loops are analyzed through `loop_optimizer_init' function.  The
+argument of this function is a set of flags represented in an integer
+bitmask.  These flags specify what other properties of the loop
+structures should be calculated/enforced and preserved later:
+
+   * `LOOPS_MAY_HAVE_MULTIPLE_LATCHES': If this flag is set, no changes
+     to CFG will be performed in the loop analysis, in particular,
+     loops with multiple latch edges will not be disambiguated.  If a
+     loop has multiple latches, its latch block is set to NULL.  Most of
+     the loop manipulation functions will not work for loops in this
+     shape.  No other flags that require CFG changes can be passed to
+     loop_optimizer_init.
+
+   * `LOOPS_HAVE_PREHEADERS': Forwarder blocks are created in such a
+     way that each loop has only one entry edge, and additionally, the
+     source block of this entry edge has only one successor.  This
+     creates a natural place where the code can be moved out of the
+     loop, and ensures that the entry edge of the loop leads from its
+     immediate super-loop.
+
+   * `LOOPS_HAVE_SIMPLE_LATCHES': Forwarder blocks are created to force
+     the latch block of each loop to have only one successor.  This
+     ensures that the latch of the loop does not belong to any of its
+     sub-loops, and makes manipulation with the loops significantly
+     easier.  Most of the loop manipulation functions assume that the
+     loops are in this shape.  Note that with this flag, the "normal"
+     loop without any control flow inside and with one exit consists of
+     two basic blocks.
+
+   * `LOOPS_HAVE_MARKED_IRREDUCIBLE_REGIONS': Basic blocks and edges in
+     the strongly connected components that are not natural loops (have
+     more than one entry block) are marked with `BB_IRREDUCIBLE_LOOP'
+     and `EDGE_IRREDUCIBLE_LOOP' flags.  The flag is not set for blocks
+     and edges that belong to natural loops that are in such an
+     irreducible region (but it is set for the entry and exit edges of
+     such a loop, if they lead to/from this region).
+
+   * `LOOPS_HAVE_RECORDED_EXITS': The lists of exits are recorded and
+     updated for each loop.  This makes some functions (e.g.,
+     `get_loop_exit_edges') more efficient.  Some functions (e.g.,
+     `single_exit') can be used only if the lists of exits are recorded.
+
+ These properties may also be computed/enforced later, using functions
+`create_preheaders', `force_single_succ_latches',
+`mark_irreducible_loops' and `record_loop_exits'.
+
+ The memory occupied by the loops structures should be freed with
+`loop_optimizer_finalize' function.
+
+ The CFG manipulation functions in general do not update loop
+structures.  Specialized versions that additionally do so are provided
+for the most common tasks.  On GIMPLE, `cleanup_tree_cfg_loop' function
+can be used to cleanup CFG while updating the loops structures if
+`current_loops' is set.
+
+
+File: gccint.info,  Node: Loop querying,  Next: Loop manipulation,  Prev: Loop representation,  Up: Loop Analysis and Representation
+
+14.2 Loop querying
+==================
+
+The functions to query the information about loops are declared in
+`cfgloop.h'.  Some of the information can be taken directly from the
+structures.  `loop_father' field of each basic block contains the
+innermost loop to that the block belongs.  The most useful fields of
+loop structure (that are kept up-to-date at all times) are:
+
+   * `header', `latch': Header and latch basic blocks of the loop.
+
+   * `num_nodes': Number of basic blocks in the loop (including the
+     basic blocks of the sub-loops).
+
+   * `depth': The depth of the loop in the loops tree, i.e., the number
+     of super-loops of the loop.
+
+   * `outer', `inner', `next': The super-loop, the first sub-loop, and
+     the sibling of the loop in the loops tree.
+
+ There are other fields in the loop structures, many of them used only
+by some of the passes, or not updated during CFG changes; in general,
+they should not be accessed directly.
+
+ The most important functions to query loop structures are:
+
+   * `flow_loops_dump': Dumps the information about loops to a file.
+
+   * `verify_loop_structure': Checks consistency of the loop structures.
+
+   * `loop_latch_edge': Returns the latch edge of a loop.
+
+   * `loop_preheader_edge': If loops have preheaders, returns the
+     preheader edge of a loop.
+
+   * `flow_loop_nested_p': Tests whether loop is a sub-loop of another
+     loop.
+
+   * `flow_bb_inside_loop_p': Tests whether a basic block belongs to a
+     loop (including its sub-loops).
+
+   * `find_common_loop': Finds the common super-loop of two loops.
+
+   * `superloop_at_depth': Returns the super-loop of a loop with the
+     given depth.
+
+   * `tree_num_loop_insns', `num_loop_insns': Estimates the number of
+     insns in the loop, on GIMPLE and on RTL.
+
+   * `loop_exit_edge_p': Tests whether edge is an exit from a loop.
+
+   * `mark_loop_exit_edges': Marks all exit edges of all loops with
+     `EDGE_LOOP_EXIT' flag.
+
+   * `get_loop_body', `get_loop_body_in_dom_order',
+     `get_loop_body_in_bfs_order': Enumerates the basic blocks in the
+     loop in depth-first search order in reversed CFG, ordered by
+     dominance relation, and breath-first search order, respectively.
+
+   * `single_exit': Returns the single exit edge of the loop, or `NULL'
+     if the loop has more than one exit.  You can only use this
+     function if LOOPS_HAVE_MARKED_SINGLE_EXITS property is used.
+
+   * `get_loop_exit_edges': Enumerates the exit edges of a loop.
+
+   * `just_once_each_iteration_p': Returns true if the basic block is
+     executed exactly once during each iteration of a loop (that is, it
+     does not belong to a sub-loop, and it dominates the latch of the
+     loop).
+
+
+File: gccint.info,  Node: Loop manipulation,  Next: LCSSA,  Prev: Loop querying,  Up: Loop Analysis and Representation
+
+14.3 Loop manipulation
+======================
+
+The loops tree can be manipulated using the following functions:
+
+   * `flow_loop_tree_node_add': Adds a node to the tree.
+
+   * `flow_loop_tree_node_remove': Removes a node from the tree.
+
+   * `add_bb_to_loop': Adds a basic block to a loop.
+
+   * `remove_bb_from_loops': Removes a basic block from loops.
+
+ Most low-level CFG functions update loops automatically.  The following
+functions handle some more complicated cases of CFG manipulations:
+
+   * `remove_path': Removes an edge and all blocks it dominates.
+
+   * `split_loop_exit_edge': Splits exit edge of the loop, ensuring
+     that PHI node arguments remain in the loop (this ensures that
+     loop-closed SSA form is preserved).  Only useful on GIMPLE.
+
+ Finally, there are some higher-level loop transformations implemented.
+While some of them are written so that they should work on non-innermost
+loops, they are mostly untested in that case, and at the moment, they
+are only reliable for the innermost loops:
+
+   * `create_iv': Creates a new induction variable.  Only works on
+     GIMPLE.  `standard_iv_increment_position' can be used to find a
+     suitable place for the iv increment.
+
+   * `duplicate_loop_to_header_edge',
+     `tree_duplicate_loop_to_header_edge': These functions (on RTL and
+     on GIMPLE) duplicate the body of the loop prescribed number of
+     times on one of the edges entering loop header, thus performing
+     either loop unrolling or loop peeling.  `can_duplicate_loop_p'
+     (`can_unroll_loop_p' on GIMPLE) must be true for the duplicated
+     loop.
+
+   * `loop_version', `tree_ssa_loop_version': These function create a
+     copy of a loop, and a branch before them that selects one of them
+     depending on the prescribed condition.  This is useful for
+     optimizations that need to verify some assumptions in runtime (one
+     of the copies of the loop is usually left unchanged, while the
+     other one is transformed in some way).
+
+   * `tree_unroll_loop': Unrolls the loop, including peeling the extra
+     iterations to make the number of iterations divisible by unroll
+     factor, updating the exit condition, and removing the exits that
+     now cannot be taken.  Works only on GIMPLE.
+
+
+File: gccint.info,  Node: LCSSA,  Next: Scalar evolutions,  Prev: Loop manipulation,  Up: Loop Analysis and Representation
+
+14.4 Loop-closed SSA form
+=========================
+
+Throughout the loop optimizations on tree level, one extra condition is
+enforced on the SSA form:  No SSA name is used outside of the loop in
+that it is defined.  The SSA form satisfying this condition is called
+"loop-closed SSA form" - LCSSA.  To enforce LCSSA, PHI nodes must be
+created at the exits of the loops for the SSA names that are used
+outside of them.  Only the real operands (not virtual SSA names) are
+held in LCSSA, in order to save memory.
+
+ There are various benefits of LCSSA:
+
+   * Many optimizations (value range analysis, final value replacement)
+     are interested in the values that are defined in the loop and used
+     outside of it, i.e., exactly those for that we create new PHI
+     nodes.
+
+   * In induction variable analysis, it is not necessary to specify the
+     loop in that the analysis should be performed - the scalar
+     evolution analysis always returns the results with respect to the
+     loop in that the SSA name is defined.
+
+   * It makes updating of SSA form during loop transformations simpler.
+     Without LCSSA, operations like loop unrolling may force creation
+     of PHI nodes arbitrarily far from the loop, while in LCSSA, the
+     SSA form can be updated locally.  However, since we only keep real
+     operands in LCSSA, we cannot use this advantage (we could have
+     local updating of real operands, but it is not much more efficient
+     than to use generic SSA form updating for it as well; the amount
+     of changes to SSA is the same).
+
+ However, it also means LCSSA must be updated.  This is usually
+straightforward, unless you create a new value in loop and use it
+outside, or unless you manipulate loop exit edges (functions are
+provided to make these manipulations simple).
+`rewrite_into_loop_closed_ssa' is used to rewrite SSA form to LCSSA,
+and `verify_loop_closed_ssa' to check that the invariant of LCSSA is
+preserved.
+
+
+File: gccint.info,  Node: Scalar evolutions,  Next: loop-iv,  Prev: LCSSA,  Up: Loop Analysis and Representation
+
+14.5 Scalar evolutions
+======================
+
+Scalar evolutions (SCEV) are used to represent results of induction
+variable analysis on GIMPLE.  They enable us to represent variables with
+complicated behavior in a simple and consistent way (we only use it to
+express values of polynomial induction variables, but it is possible to
+extend it).  The interfaces to SCEV analysis are declared in
+`tree-scalar-evolution.h'.  To use scalar evolutions analysis,
+`scev_initialize' must be used.  To stop using SCEV, `scev_finalize'
+should be used.  SCEV analysis caches results in order to save time and
+memory.  This cache however is made invalid by most of the loop
+transformations, including removal of code.  If such a transformation
+is performed, `scev_reset' must be called to clean the caches.
+
+ Given an SSA name, its behavior in loops can be analyzed using the
+`analyze_scalar_evolution' function.  The returned SCEV however does
+not have to be fully analyzed and it may contain references to other
+SSA names defined in the loop.  To resolve these (potentially
+recursive) references, `instantiate_parameters' or `resolve_mixers'
+functions must be used.  `instantiate_parameters' is useful when you
+use the results of SCEV only for some analysis, and when you work with
+whole nest of loops at once.  It will try replacing all SSA names by
+their SCEV in all loops, including the super-loops of the current loop,
+thus providing a complete information about the behavior of the
+variable in the loop nest.  `resolve_mixers' is useful if you work with
+only one loop at a time, and if you possibly need to create code based
+on the value of the induction variable.  It will only resolve the SSA
+names defined in the current loop, leaving the SSA names defined
+outside unchanged, even if their evolution in the outer loops is known.
+
+ The SCEV is a normal tree expression, except for the fact that it may
+contain several special tree nodes.  One of them is `SCEV_NOT_KNOWN',
+used for SSA names whose value cannot be expressed.  The other one is
+`POLYNOMIAL_CHREC'.  Polynomial chrec has three arguments - base, step
+and loop (both base and step may contain further polynomial chrecs).
+Type of the expression and of base and step must be the same.  A
+variable has evolution `POLYNOMIAL_CHREC(base, step, loop)' if it is
+(in the specified loop) equivalent to `x_1' in the following example
+
+     while (...)
+       {
+         x_1 = phi (base, x_2);
+         x_2 = x_1 + step;
+       }
+
+ Note that this includes the language restrictions on the operations.
+For example, if we compile C code and `x' has signed type, then the
+overflow in addition would cause undefined behavior, and we may assume
+that this does not happen.  Hence, the value with this SCEV cannot
+overflow (which restricts the number of iterations of such a loop).
+
+ In many cases, one wants to restrict the attention just to affine
+induction variables.  In this case, the extra expressive power of SCEV
+is not useful, and may complicate the optimizations.  In this case,
+`simple_iv' function may be used to analyze a value - the result is a
+loop-invariant base and step.
+
+
+File: gccint.info,  Node: loop-iv,  Next: Number of iterations,  Prev: Scalar evolutions,  Up: Loop Analysis and Representation
+
+14.6 IV analysis on RTL
+=======================
+
+The induction variable on RTL is simple and only allows analysis of
+affine induction variables, and only in one loop at once.  The interface
+is declared in `cfgloop.h'.  Before analyzing induction variables in a
+loop L, `iv_analysis_loop_init' function must be called on L.  After
+the analysis (possibly calling `iv_analysis_loop_init' for several
+loops) is finished, `iv_analysis_done' should be called.  The following
+functions can be used to access the results of the analysis:
+
+   * `iv_analyze': Analyzes a single register used in the given insn.
+     If no use of the register in this insn is found, the following
+     insns are scanned, so that this function can be called on the insn
+     returned by get_condition.
+
+   * `iv_analyze_result': Analyzes result of the assignment in the
+     given insn.
+
+   * `iv_analyze_expr': Analyzes a more complicated expression.  All
+     its operands are analyzed by `iv_analyze', and hence they must be
+     used in the specified insn or one of the following insns.
+
+ The description of the induction variable is provided in `struct
+rtx_iv'.  In order to handle subregs, the representation is a bit
+complicated; if the value of the `extend' field is not `UNKNOWN', the
+value of the induction variable in the i-th iteration is
+
+     delta + mult * extend_{extend_mode} (subreg_{mode} (base + i * step)),
+
+ with the following exception:  if `first_special' is true, then the
+value in the first iteration (when `i' is zero) is `delta + mult *
+base'.  However, if `extend' is equal to `UNKNOWN', then
+`first_special' must be false, `delta' 0, `mult' 1 and the value in the
+i-th iteration is
+
+     subreg_{mode} (base + i * step)
+
+ The function `get_iv_value' can be used to perform these calculations.
+
+
+File: gccint.info,  Node: Number of iterations,  Next: Dependency analysis,  Prev: loop-iv,  Up: Loop Analysis and Representation
+
+14.7 Number of iterations analysis
+==================================
+
+Both on GIMPLE and on RTL, there are functions available to determine
+the number of iterations of a loop, with a similar interface.  The
+number of iterations of a loop in GCC is defined as the number of
+executions of the loop latch.  In many cases, it is not possible to
+determine the number of iterations unconditionally - the determined
+number is correct only if some assumptions are satisfied.  The analysis
+tries to verify these conditions using the information contained in the
+program; if it fails, the conditions are returned together with the
+result.  The following information and conditions are provided by the
+analysis:
+
+   * `assumptions': If this condition is false, the rest of the
+     information is invalid.
+
+   * `noloop_assumptions' on RTL, `may_be_zero' on GIMPLE: If this
+     condition is true, the loop exits in the first iteration.
+
+   * `infinite': If this condition is true, the loop is infinite.  This
+     condition is only available on RTL.  On GIMPLE, conditions for
+     finiteness of the loop are included in `assumptions'.
+
+   * `niter_expr' on RTL, `niter' on GIMPLE: The expression that gives
+     number of iterations.  The number of iterations is defined as the
+     number of executions of the loop latch.
+
+ Both on GIMPLE and on RTL, it necessary for the induction variable
+analysis framework to be initialized (SCEV on GIMPLE, loop-iv on RTL).
+On GIMPLE, the results are stored to `struct tree_niter_desc'
+structure.  Number of iterations before the loop is exited through a
+given exit can be determined using `number_of_iterations_exit'
+function.  On RTL, the results are returned in `struct niter_desc'
+structure.  The corresponding function is named `check_simple_exit'.
+There are also functions that pass through all the exits of a loop and
+try to find one with easy to determine number of iterations -
+`find_loop_niter' on GIMPLE and `find_simple_exit' on RTL.  Finally,
+there are functions that provide the same information, but additionally
+cache it, so that repeated calls to number of iterations are not so
+costly - `number_of_latch_executions' on GIMPLE and
+`get_simple_loop_desc' on RTL.
+
+ Note that some of these functions may behave slightly differently than
+others - some of them return only the expression for the number of
+iterations, and fail if there are some assumptions.  The function
+`number_of_latch_executions' works only for single-exit loops.  The
+function `number_of_cond_exit_executions' can be used to determine
+number of executions of the exit condition of a single-exit loop (i.e.,
+the `number_of_latch_executions' increased by one).
+
+
+File: gccint.info,  Node: Dependency analysis,  Next: Lambda,  Prev: Number of iterations,  Up: Loop Analysis and Representation
+
+14.8 Data Dependency Analysis
+=============================
+
+The code for the data dependence analysis can be found in
+`tree-data-ref.c' and its interface and data structures are described
+in `tree-data-ref.h'.  The function that computes the data dependences
+for all the array and pointer references for a given loop is
+`compute_data_dependences_for_loop'.  This function is currently used
+by the linear loop transform and the vectorization passes.  Before
+calling this function, one has to allocate two vectors: a first vector
+will contain the set of data references that are contained in the
+analyzed loop body, and the second vector will contain the dependence
+relations between the data references.  Thus if the vector of data
+references is of size `n', the vector containing the dependence
+relations will contain `n*n' elements.  However if the analyzed loop
+contains side effects, such as calls that potentially can interfere
+with the data references in the current analyzed loop, the analysis
+stops while scanning the loop body for data references, and inserts a
+single `chrec_dont_know' in the dependence relation array.
+
+ The data references are discovered in a particular order during the
+scanning of the loop body: the loop body is analyzed in execution order,
+and the data references of each statement are pushed at the end of the
+data reference array.  Two data references syntactically occur in the
+program in the same order as in the array of data references.  This
+syntactic order is important in some classical data dependence tests,
+and mapping this order to the elements of this array avoids costly
+queries to the loop body representation.
+
+ Three types of data references are currently handled: ARRAY_REF,
+INDIRECT_REF and COMPONENT_REF. The data structure for the data
+reference is `data_reference', where `data_reference_p' is a name of a
+pointer to the data reference structure. The structure contains the
+following elements:
+
+   * `base_object_info': Provides information about the base object of
+     the data reference and its access functions. These access functions
+     represent the evolution of the data reference in the loop relative
+     to its base, in keeping with the classical meaning of the data
+     reference access function for the support of arrays. For example,
+     for a reference `a.b[i][j]', the base object is `a.b' and the
+     access functions, one for each array subscript, are: `{i_init, +
+     i_step}_1, {j_init, +, j_step}_2'.
+
+   * `first_location_in_loop': Provides information about the first
+     location accessed by the data reference in the loop and about the
+     access function used to represent evolution relative to this
+     location. This data is used to support pointers, and is not used
+     for arrays (for which we have base objects). Pointer accesses are
+     represented as a one-dimensional access that starts from the first
+     location accessed in the loop. For example:
+
+                for1 i
+                   for2 j
+                    *((int *)p + i + j) = a[i][j];
+
+     The access function of the pointer access is `{0, + 4B}_for2'
+     relative to `p + i'. The access functions of the array are
+     `{i_init, + i_step}_for1' and `{j_init, +, j_step}_for2' relative
+     to `a'.
+
+     Usually, the object the pointer refers to is either unknown, or we
+     can't prove that the access is confined to the boundaries of a
+     certain object.
+
+     Two data references can be compared only if at least one of these
+     two representations has all its fields filled for both data
+     references.
+
+     The current strategy for data dependence tests is as follows: If
+     both `a' and `b' are represented as arrays, compare
+     `a.base_object' and `b.base_object'; if they are equal, apply
+     dependence tests (use access functions based on base_objects).
+     Else if both `a' and `b' are represented as pointers, compare
+     `a.first_location' and `b.first_location'; if they are equal,
+     apply dependence tests (use access functions based on first
+     location).  However, if `a' and `b' are represented differently,
+     only try to prove that the bases are definitely different.
+
+   * Aliasing information.
+
+   * Alignment information.
+
+ The structure describing the relation between two data references is
+`data_dependence_relation' and the shorter name for a pointer to such a
+structure is `ddr_p'.  This structure contains:
+
+   * a pointer to each data reference,
+
+   * a tree node `are_dependent' that is set to `chrec_known' if the
+     analysis has proved that there is no dependence between these two
+     data references, `chrec_dont_know' if the analysis was not able to
+     determine any useful result and potentially there could exist a
+     dependence between these data references, and `are_dependent' is
+     set to `NULL_TREE' if there exist a dependence relation between the
+     data references, and the description of this dependence relation is
+     given in the `subscripts', `dir_vects', and `dist_vects' arrays,
+
+   * a boolean that determines whether the dependence relation can be
+     represented by a classical distance vector,
+
+   * an array `subscripts' that contains a description of each
+     subscript of the data references.  Given two array accesses a
+     subscript is the tuple composed of the access functions for a given
+     dimension.  For example, given `A[f1][f2][f3]' and
+     `B[g1][g2][g3]', there are three subscripts: `(f1, g1), (f2, g2),
+     (f3, g3)'.
+
+   * two arrays `dir_vects' and `dist_vects' that contain classical
+     representations of the data dependences under the form of
+     direction and distance dependence vectors,
+
+   * an array of loops `loop_nest' that contains the loops to which the
+     distance and direction vectors refer to.
+
+ Several functions for pretty printing the information extracted by the
+data dependence analysis are available: `dump_ddrs' prints with a
+maximum verbosity the details of a data dependence relations array,
+`dump_dist_dir_vectors' prints only the classical distance and
+direction vectors for a data dependence relations array, and
+`dump_data_references' prints the details of the data references
+contained in a data reference array.
+
+
+File: gccint.info,  Node: Lambda,  Next: Omega,  Prev: Dependency analysis,  Up: Loop Analysis and Representation
+
+14.9 Linear loop transformations framework
+==========================================
+
+Lambda is a framework that allows transformations of loops using
+non-singular matrix based transformations of the iteration space and
+loop bounds. This allows compositions of skewing, scaling, interchange,
+and reversal transformations.  These transformations are often used to
+improve cache behavior or remove inner loop dependencies to allow
+parallelization and vectorization to take place.
+
+ To perform these transformations, Lambda requires that the loopnest be
+converted into an internal form that can be matrix transformed easily.
+To do this conversion, the function `gcc_loopnest_to_lambda_loopnest'
+is provided.  If the loop cannot be transformed using lambda, this
+function will return NULL.
+
+ Once a `lambda_loopnest' is obtained from the conversion function, it
+can be transformed by using `lambda_loopnest_transform', which takes a
+transformation matrix to apply.  Note that it is up to the caller to
+verify that the transformation matrix is legal to apply to the loop
+(dependence respecting, etc).  Lambda simply applies whatever matrix it
+is told to provide.  It can be extended to make legal matrices out of
+any non-singular matrix, but this is not currently implemented.
+Legality of a matrix for a given loopnest can be verified using
+`lambda_transform_legal_p'.
+
+ Given a transformed loopnest, conversion back into gcc IR is done by
+`lambda_loopnest_to_gcc_loopnest'.  This function will modify the loops
+so that they match the transformed loopnest.
+
+
+File: gccint.info,  Node: Omega,  Prev: Lambda,  Up: Loop Analysis and Representation
+
+14.10 Omega a solver for linear programming problems
+====================================================
+
+The data dependence analysis contains several solvers triggered
+sequentially from the less complex ones to the more sophisticated.  For
+ensuring the consistency of the results of these solvers, a data
+dependence check pass has been implemented based on two different
+solvers.  The second method that has been integrated to GCC is based on
+the Omega dependence solver, written in the 1990's by William Pugh and
+David Wonnacott.  Data dependence tests can be formulated using a
+subset of the Presburger arithmetics that can be translated to linear
+constraint systems.  These linear constraint systems can then be solved
+using the Omega solver.
+
+ The Omega solver is using Fourier-Motzkin's algorithm for variable
+elimination: a linear constraint system containing `n' variables is
+reduced to a linear constraint system with `n-1' variables.  The Omega
+solver can also be used for solving other problems that can be
+expressed under the form of a system of linear equalities and
+inequalities.  The Omega solver is known to have an exponential worst
+case, also known under the name of "omega nightmare" in the literature,
+but in practice, the omega test is known to be efficient for the common
+data dependence tests.
+
+ The interface used by the Omega solver for describing the linear
+programming problems is described in `omega.h', and the solver is
+`omega_solve_problem'.
+
+
+File: gccint.info,  Node: Control Flow,  Next: Loop Analysis and Representation,  Prev: RTL,  Up: Top
+
+15 Control Flow Graph
+*********************
+
+A control flow graph (CFG) is a data structure built on top of the
+intermediate code representation (the RTL or `tree' instruction stream)
+abstracting the control flow behavior of a function that is being
+compiled.  The CFG is a directed graph where the vertices represent
+basic blocks and edges represent possible transfer of control flow from
+one basic block to another.  The data structures used to represent the
+control flow graph are defined in `basic-block.h'.
+
+* Menu:
+
+* Basic Blocks::           The definition and representation of basic blocks.
+* Edges::                  Types of edges and their representation.
+* Profile information::    Representation of frequencies and probabilities.
+* Maintaining the CFG::    Keeping the control flow graph and up to date.
+* Liveness information::   Using and maintaining liveness information.
+
+
+File: gccint.info,  Node: Basic Blocks,  Next: Edges,  Up: Control Flow
+
+15.1 Basic Blocks
+=================
+
+A basic block is a straight-line sequence of code with only one entry
+point and only one exit.  In GCC, basic blocks are represented using
+the `basic_block' data type.
+
+ Two pointer members of the `basic_block' structure are the pointers
+`next_bb' and `prev_bb'.  These are used to keep doubly linked chain of
+basic blocks in the same order as the underlying instruction stream.
+The chain of basic blocks is updated transparently by the provided API
+for manipulating the CFG.  The macro `FOR_EACH_BB' can be used to visit
+all the basic blocks in lexicographical order.  Dominator traversals
+are also possible using `walk_dominator_tree'.  Given two basic blocks
+A and B, block A dominates block B if A is _always_ executed before B.
+
+ The `BASIC_BLOCK' array contains all basic blocks in an unspecified
+order.  Each `basic_block' structure has a field that holds a unique
+integer identifier `index' that is the index of the block in the
+`BASIC_BLOCK' array.  The total number of basic blocks in the function
+is `n_basic_blocks'.  Both the basic block indices and the total number
+of basic blocks may vary during the compilation process, as passes
+reorder, create, duplicate, and destroy basic blocks.  The index for
+any block should never be greater than `last_basic_block'.
+
+ Special basic blocks represent possible entry and exit points of a
+function.  These blocks are called `ENTRY_BLOCK_PTR' and
+`EXIT_BLOCK_PTR'.  These blocks do not contain any code, and are not
+elements of the `BASIC_BLOCK' array.  Therefore they have been assigned
+unique, negative index numbers.
+
+ Each `basic_block' also contains pointers to the first instruction
+(the "head") and the last instruction (the "tail") or "end" of the
+instruction stream contained in a basic block.  In fact, since the
+`basic_block' data type is used to represent blocks in both major
+intermediate representations of GCC (`tree' and RTL), there are
+pointers to the head and end of a basic block for both representations.
+
+ For RTL, these pointers are `rtx head, end'.  In the RTL function
+representation, the head pointer always points either to a
+`NOTE_INSN_BASIC_BLOCK' or to a `CODE_LABEL', if present.  In the RTL
+representation of a function, the instruction stream contains not only
+the "real" instructions, but also "notes".  Any function that moves or
+duplicates the basic blocks needs to take care of updating of these
+notes.  Many of these notes expect that the instruction stream consists
+of linear regions, making such updates difficult.   The
+`NOTE_INSN_BASIC_BLOCK' note is the only kind of note that may appear
+in the instruction stream contained in a basic block.  The instruction
+stream of a basic block always follows a `NOTE_INSN_BASIC_BLOCK',  but
+zero or more `CODE_LABEL' nodes can precede the block note.   A basic
+block ends by control flow instruction or last instruction before
+following `CODE_LABEL' or `NOTE_INSN_BASIC_BLOCK'.  A `CODE_LABEL'
+cannot appear in the instruction stream of a basic block.
+
+ In addition to notes, the jump table vectors are also represented as
+"pseudo-instructions" inside the insn stream.  These vectors never
+appear in the basic block and should always be placed just after the
+table jump instructions referencing them.  After removing the
+table-jump it is often difficult to eliminate the code computing the
+address and referencing the vector, so cleaning up these vectors is
+postponed until after liveness analysis.   Thus the jump table vectors
+may appear in the insn stream unreferenced and without any purpose.
+Before any edge is made "fall-thru", the existence of such construct in
+the way needs to be checked by calling `can_fallthru' function.
+
+ For the `tree' representation, the head and end of the basic block are
+being pointed to by the `stmt_list' field, but this special `tree'
+should never be referenced directly.  Instead, at the tree level
+abstract containers and iterators are used to access statements and
+expressions in basic blocks.  These iterators are called "block
+statement iterators" (BSIs).  Grep for `^bsi' in the various `tree-*'
+files.  The following snippet will pretty-print all the statements of
+the program in the GIMPLE representation.
+
+     FOR_EACH_BB (bb)
+       {
+          block_stmt_iterator si;
+
+          for (si = bsi_start (bb); !bsi_end_p (si); bsi_next (&si))
+            {
+               tree stmt = bsi_stmt (si);
+               print_generic_stmt (stderr, stmt, 0);
+            }
+       }
+
+
+File: gccint.info,  Node: Edges,  Next: Profile information,  Prev: Basic Blocks,  Up: Control Flow
+
+15.2 Edges
+==========
+
+Edges represent possible control flow transfers from the end of some
+basic block A to the head of another basic block B.  We say that A is a
+predecessor of B, and B is a successor of A.  Edges are represented in
+GCC with the `edge' data type.  Each `edge' acts as a link between two
+basic blocks: the `src' member of an edge points to the predecessor
+basic block of the `dest' basic block.  The members `preds' and `succs'
+of the `basic_block' data type point to type-safe vectors of edges to
+the predecessors and successors of the block.
+
+ When walking the edges in an edge vector, "edge iterators" should be
+used.  Edge iterators are constructed using the `edge_iterator' data
+structure and several methods are available to operate on them:
+
+`ei_start'
+     This function initializes an `edge_iterator' that points to the
+     first edge in a vector of edges.
+
+`ei_last'
+     This function initializes an `edge_iterator' that points to the
+     last edge in a vector of edges.
+
+`ei_end_p'
+     This predicate is `true' if an `edge_iterator' represents the last
+     edge in an edge vector.
+
+`ei_one_before_end_p'
+     This predicate is `true' if an `edge_iterator' represents the
+     second last edge in an edge vector.
+
+`ei_next'
+     This function takes a pointer to an `edge_iterator' and makes it
+     point to the next edge in the sequence.
+
+`ei_prev'
+     This function takes a pointer to an `edge_iterator' and makes it
+     point to the previous edge in the sequence.
+
+`ei_edge'
+     This function returns the `edge' currently pointed to by an
+     `edge_iterator'.
+
+`ei_safe_safe'
+     This function returns the `edge' currently pointed to by an
+     `edge_iterator', but returns `NULL' if the iterator is pointing at
+     the end of the sequence.  This function has been provided for
+     existing code makes the assumption that a `NULL' edge indicates
+     the end of the sequence.
+
+
+ The convenience macro `FOR_EACH_EDGE' can be used to visit all of the
+edges in a sequence of predecessor or successor edges.  It must not be
+used when an element might be removed during the traversal, otherwise
+elements will be missed.  Here is an example of how to use the macro:
+
+     edge e;
+     edge_iterator ei;
+
+     FOR_EACH_EDGE (e, ei, bb->succs)
+       {
+          if (e->flags & EDGE_FALLTHRU)
+            break;
+       }
+
+ There are various reasons why control flow may transfer from one block
+to another.  One possibility is that some instruction, for example a
+`CODE_LABEL', in a linearized instruction stream just always starts a
+new basic block.  In this case a "fall-thru" edge links the basic block
+to the first following basic block.  But there are several other
+reasons why edges may be created.  The `flags' field of the `edge' data
+type is used to store information about the type of edge we are dealing
+with.  Each edge is of one of the following types:
+
+_jump_
+     No type flags are set for edges corresponding to jump instructions.
+     These edges are used for unconditional or conditional jumps and in
+     RTL also for table jumps.  They are the easiest to manipulate as
+     they may be freely redirected when the flow graph is not in SSA
+     form.
+
+_fall-thru_
+     Fall-thru edges are present in case where the basic block may
+     continue execution to the following one without branching.  These
+     edges have the `EDGE_FALLTHRU' flag set.  Unlike other types of
+     edges, these edges must come into the basic block immediately
+     following in the instruction stream.  The function
+     `force_nonfallthru' is available to insert an unconditional jump
+     in the case that redirection is needed.  Note that this may
+     require creation of a new basic block.
+
+_exception handling_
+     Exception handling edges represent possible control transfers from
+     a trapping instruction to an exception handler.  The definition of
+     "trapping" varies.  In C++, only function calls can throw, but for
+     Java, exceptions like division by zero or segmentation fault are
+     defined and thus each instruction possibly throwing this kind of
+     exception needs to be handled as control flow instruction.
+     Exception edges have the `EDGE_ABNORMAL' and `EDGE_EH' flags set.
+
+     When updating the instruction stream it is easy to change possibly
+     trapping instruction to non-trapping, by simply removing the
+     exception edge.  The opposite conversion is difficult, but should
+     not happen anyway.  The edges can be eliminated via
+     `purge_dead_edges' call.
+
+     In the RTL representation, the destination of an exception edge is
+     specified by `REG_EH_REGION' note attached to the insn.  In case
+     of a trapping call the `EDGE_ABNORMAL_CALL' flag is set too.  In
+     the `tree' representation, this extra flag is not set.
+
+     In the RTL representation, the predicate `may_trap_p' may be used
+     to check whether instruction still may trap or not.  For the tree
+     representation, the `tree_could_trap_p' predicate is available,
+     but this predicate only checks for possible memory traps, as in
+     dereferencing an invalid pointer location.
+
+_sibling calls_
+     Sibling calls or tail calls terminate the function in a
+     non-standard way and thus an edge to the exit must be present.
+     `EDGE_SIBCALL' and `EDGE_ABNORMAL' are set in such case.  These
+     edges only exist in the RTL representation.
+
+_computed jumps_
+     Computed jumps contain edges to all labels in the function
+     referenced from the code.  All those edges have `EDGE_ABNORMAL'
+     flag set.  The edges used to represent computed jumps often cause
+     compile time performance problems, since functions consisting of
+     many taken labels and many computed jumps may have _very_ dense
+     flow graphs, so these edges need to be handled with special care.
+     During the earlier stages of the compilation process, GCC tries to
+     avoid such dense flow graphs by factoring computed jumps.  For
+     example, given the following series of jumps,
+
+            goto *x;
+            [ ... ]
+
+            goto *x;
+            [ ... ]
+
+            goto *x;
+            [ ... ]
+
+     factoring the computed jumps results in the following code sequence
+     which has a much simpler flow graph:
+
+            goto y;
+            [ ... ]
+
+            goto y;
+            [ ... ]
+
+            goto y;
+            [ ... ]
+
+          y:
+            goto *x;
+
+     However, the classic problem with this transformation is that it
+     has a runtime cost in there resulting code: An extra jump.
+     Therefore, the computed jumps are un-factored in the later passes
+     of the compiler.  Be aware of that when you work on passes in that
+     area.  There have been numerous examples already where the compile
+     time for code with unfactored computed jumps caused some serious
+     headaches.
+
+_nonlocal goto handlers_
+     GCC allows nested functions to return into caller using a `goto'
+     to a label passed to as an argument to the callee.  The labels
+     passed to nested functions contain special code to cleanup after
+     function call.  Such sections of code are referred to as "nonlocal
+     goto receivers".  If a function contains such nonlocal goto
+     receivers, an edge from the call to the label is created with the
+     `EDGE_ABNORMAL' and `EDGE_ABNORMAL_CALL' flags set.
+
+_function entry points_
+     By definition, execution of function starts at basic block 0, so
+     there is always an edge from the `ENTRY_BLOCK_PTR' to basic block
+     0.  There is no `tree' representation for alternate entry points at
+     this moment.  In RTL, alternate entry points are specified by
+     `CODE_LABEL' with `LABEL_ALTERNATE_NAME' defined.  This feature is
+     currently used for multiple entry point prologues and is limited
+     to post-reload passes only.  This can be used by back-ends to emit
+     alternate prologues for functions called from different contexts.
+     In future full support for multiple entry functions defined by
+     Fortran 90 needs to be implemented.
+
+_function exits_
+     In the pre-reload representation a function terminates after the
+     last instruction in the insn chain and no explicit return
+     instructions are used.  This corresponds to the fall-thru edge
+     into exit block.  After reload, optimal RTL epilogues are used
+     that use explicit (conditional) return instructions that are
+     represented by edges with no flags set.
+
+
+
+File: gccint.info,  Node: Profile information,  Next: Maintaining the CFG,  Prev: Edges,  Up: Control Flow
+
+15.3 Profile information
+========================
+
+In many cases a compiler must make a choice whether to trade speed in
+one part of code for speed in another, or to trade code size for code
+speed.  In such cases it is useful to know information about how often
+some given block will be executed.  That is the purpose for maintaining
+profile within the flow graph.  GCC can handle profile information
+obtained through "profile feedback", but it can also  estimate branch
+probabilities based on statics and heuristics.
+
+ The feedback based profile is produced by compiling the program with
+instrumentation, executing it on a train run and reading the numbers of
+executions of basic blocks and edges back to the compiler while
+re-compiling the program to produce the final executable.  This method
+provides very accurate information about where a program spends most of
+its time on the train run.  Whether it matches the average run of
+course depends on the choice of train data set, but several studies
+have shown that the behavior of a program usually changes just
+marginally over different data sets.
+
+ When profile feedback is not available, the compiler may be asked to
+attempt to predict the behavior of each branch in the program using a
+set of heuristics (see `predict.def' for details) and compute estimated
+frequencies of each basic block by propagating the probabilities over
+the graph.
+
+ Each `basic_block' contains two integer fields to represent profile
+information: `frequency' and `count'.  The `frequency' is an estimation
+how often is basic block executed within a function.  It is represented
+as an integer scaled in the range from 0 to `BB_FREQ_BASE'.  The most
+frequently executed basic block in function is initially set to
+`BB_FREQ_BASE' and the rest of frequencies are scaled accordingly.
+During optimization, the frequency of the most frequent basic block can
+both decrease (for instance by loop unrolling) or grow (for instance by
+cross-jumping optimization), so scaling sometimes has to be performed
+multiple times.
+
+ The `count' contains hard-counted numbers of execution measured during
+training runs and is nonzero only when profile feedback is available.
+This value is represented as the host's widest integer (typically a 64
+bit integer) of the special type `gcov_type'.
+
+ Most optimization passes can use only the frequency information of a
+basic block, but a few passes may want to know hard execution counts.
+The frequencies should always match the counts after scaling, however
+during updating of the profile information numerical error may
+accumulate into quite large errors.
+
+ Each edge also contains a branch probability field: an integer in the
+range from 0 to `REG_BR_PROB_BASE'.  It represents probability of
+passing control from the end of the `src' basic block to the `dest'
+basic block, i.e. the probability that control will flow along this
+edge.   The `EDGE_FREQUENCY' macro is available to compute how
+frequently a given edge is taken.  There is a `count' field for each
+edge as well, representing same information as for a basic block.
+
+ The basic block frequencies are not represented in the instruction
+stream, but in the RTL representation the edge frequencies are
+represented for conditional jumps (via the `REG_BR_PROB' macro) since
+they are used when instructions are output to the assembly file and the
+flow graph is no longer maintained.
+
+ The probability that control flow arrives via a given edge to its
+destination basic block is called "reverse probability" and is not
+directly represented, but it may be easily computed from frequencies of
+basic blocks.
+
+ Updating profile information is a delicate task that can unfortunately
+not be easily integrated with the CFG manipulation API.  Many of the
+functions and hooks to modify the CFG, such as
+`redirect_edge_and_branch', do not have enough information to easily
+update the profile, so updating it is in the majority of cases left up
+to the caller.  It is difficult to uncover bugs in the profile updating
+code, because they manifest themselves only by producing worse code,
+and checking profile consistency is not possible because of numeric
+error accumulation.  Hence special attention needs to be given to this
+issue in each pass that modifies the CFG.
+
+ It is important to point out that `REG_BR_PROB_BASE' and
+`BB_FREQ_BASE' are both set low enough to be possible to compute second
+power of any frequency or probability in the flow graph, it is not
+possible to even square the `count' field, as modern CPUs are fast
+enough to execute $2^32$ operations quickly.
+
+
+File: gccint.info,  Node: Maintaining the CFG,  Next: Liveness information,  Prev: Profile information,  Up: Control Flow
+
+15.4 Maintaining the CFG
+========================
+
+An important task of each compiler pass is to keep both the control
+flow graph and all profile information up-to-date.  Reconstruction of
+the control flow graph after each pass is not an option, since it may be
+very expensive and lost profile information cannot be reconstructed at
+all.
+
+ GCC has two major intermediate representations, and both use the
+`basic_block' and `edge' data types to represent control flow.  Both
+representations share as much of the CFG maintenance code as possible.
+For each representation, a set of "hooks" is defined so that each
+representation can provide its own implementation of CFG manipulation
+routines when necessary.  These hooks are defined in `cfghooks.h'.
+There are hooks for almost all common CFG manipulations, including
+block splitting and merging, edge redirection and creating and deleting
+basic blocks.  These hooks should provide everything you need to
+maintain and manipulate the CFG in both the RTL and `tree'
+representation.
+
+ At the moment, the basic block boundaries are maintained transparently
+when modifying instructions, so there rarely is a need to move them
+manually (such as in case someone wants to output instruction outside
+basic block explicitly).  Often the CFG may be better viewed as
+integral part of instruction chain, than structure built on the top of
+it.  However, in principle the control flow graph for the `tree'
+representation is _not_ an integral part of the representation, in that
+a function tree may be expanded without first building a  flow graph
+for the `tree' representation at all.  This happens when compiling
+without any `tree' optimization enabled.  When the `tree' optimizations
+are enabled and the instruction stream is rewritten in SSA form, the
+CFG is very tightly coupled with the instruction stream.  In
+particular, statement insertion and removal has to be done with care.
+In fact, the whole `tree' representation can not be easily used or
+maintained without proper maintenance of the CFG simultaneously.
+
+ In the RTL representation, each instruction has a `BLOCK_FOR_INSN'
+value that represents pointer to the basic block that contains the
+instruction.  In the `tree' representation, the function `bb_for_stmt'
+returns a pointer to the basic block containing the queried statement.
+
+ When changes need to be applied to a function in its `tree'
+representation, "block statement iterators" should be used.  These
+iterators provide an integrated abstraction of the flow graph and the
+instruction stream.  Block statement iterators are constructed using
+the `block_stmt_iterator' data structure and several modifier are
+available, including the following:
+
+`bsi_start'
+     This function initializes a `block_stmt_iterator' that points to
+     the first non-empty statement in a basic block.
+
+`bsi_last'
+     This function initializes a `block_stmt_iterator' that points to
+     the last statement in a basic block.
+
+`bsi_end_p'
+     This predicate is `true' if a `block_stmt_iterator' represents the
+     end of a basic block.
+
+`bsi_next'
+     This function takes a `block_stmt_iterator' and makes it point to
+     its successor.
+
+`bsi_prev'
+     This function takes a `block_stmt_iterator' and makes it point to
+     its predecessor.
+
+`bsi_insert_after'
+     This function inserts a statement after the `block_stmt_iterator'
+     passed in.  The final parameter determines whether the statement
+     iterator is updated to point to the newly inserted statement, or
+     left pointing to the original statement.
+
+`bsi_insert_before'
+     This function inserts a statement before the `block_stmt_iterator'
+     passed in.  The final parameter determines whether the statement
+     iterator is updated to point to the newly inserted statement, or
+     left pointing to the original  statement.
+
+`bsi_remove'
+     This function removes the `block_stmt_iterator' passed in and
+     rechains the remaining statements in a basic block, if any.
+
+ In the RTL representation, the macros `BB_HEAD' and `BB_END' may be
+used to get the head and end `rtx' of a basic block.  No abstract
+iterators are defined for traversing the insn chain, but you can just
+use `NEXT_INSN' and `PREV_INSN' instead.  See *Note Insns::.
+
+ Usually a code manipulating pass simplifies the instruction stream and
+the flow of control, possibly eliminating some edges.  This may for
+example happen when a conditional jump is replaced with an
+unconditional jump, but also when simplifying possibly trapping
+instruction to non-trapping while compiling Java.  Updating of edges is
+not transparent and each optimization pass is required to do so
+manually.  However only few cases occur in practice.  The pass may call
+`purge_dead_edges' on a given basic block to remove superfluous edges,
+if any.
+
+ Another common scenario is redirection of branch instructions, but
+this is best modeled as redirection of edges in the control flow graph
+and thus use of `redirect_edge_and_branch' is preferred over more low
+level functions, such as `redirect_jump' that operate on RTL chain
+only.  The CFG hooks defined in `cfghooks.h' should provide the
+complete API required for manipulating and maintaining the CFG.
+
+ It is also possible that a pass has to insert control flow instruction
+into the middle of a basic block, thus creating an entry point in the
+middle of the basic block, which is impossible by definition: The block
+must be split to make sure it only has one entry point, i.e. the head
+of the basic block.  The CFG hook `split_block' may be used when an
+instruction in the middle of a basic block has to become the target of
+a jump or branch instruction.
+
+ For a global optimizer, a common operation is to split edges in the
+flow graph and insert instructions on them.  In the RTL representation,
+this can be easily done using the `insert_insn_on_edge' function that
+emits an instruction "on the edge", caching it for a later
+`commit_edge_insertions' call that will take care of moving the
+inserted instructions off the edge into the instruction stream
+contained in a basic block.  This includes the creation of new basic
+blocks where needed.  In the `tree' representation, the equivalent
+functions are `bsi_insert_on_edge' which inserts a block statement
+iterator on an edge, and `bsi_commit_edge_inserts' which flushes the
+instruction to actual instruction stream.
+
+ While debugging the optimization pass, a `verify_flow_info' function
+may be useful to find bugs in the control flow graph updating code.
+
+ Note that at present, the representation of control flow in the `tree'
+representation is discarded before expanding to RTL.  Long term the CFG
+should be maintained and "expanded" to the RTL representation along
+with the function `tree' itself.
+
+
+File: gccint.info,  Node: Liveness information,  Prev: Maintaining the CFG,  Up: Control Flow
+
+15.5 Liveness information
+=========================
+
+Liveness information is useful to determine whether some register is
+"live" at given point of program, i.e. that it contains a value that
+may be used at a later point in the program.  This information is used,
+for instance, during register allocation, as the pseudo registers only
+need to be assigned to a unique hard register or to a stack slot if
+they are live.  The hard registers and stack slots may be freely reused
+for other values when a register is dead.
+
+ Liveness information is available in the back end starting with
+`pass_df_initialize' and ending with `pass_df_finish'.  Three flavors
+of live analysis are available: With `LR', it is possible to determine
+at any point `P' in the function if the register may be used on some
+path from `P' to the end of the function.  With `UR', it is possible to
+determine if there is a path from the beginning of the function to `P'
+that defines the variable.  `LIVE' is the intersection of the `LR' and
+`UR' and a variable is live at `P' if there is both an assignment that
+reaches it from the beginning of the function and a use that can be
+reached on some path from `P' to the end of the function.
+
+ In general `LIVE' is the most useful of the three.  The macros
+`DF_[LR,UR,LIVE]_[IN,OUT]' can be used to access this information.  The
+macros take a basic block number and return a bitmap that is indexed by
+the register number.  This information is only guaranteed to be up to
+date after calls are made to `df_analyze'.  See the file `df-core.c'
+for details on using the dataflow.
+
+ The liveness information is stored partly in the RTL instruction stream
+and partly in the flow graph.  Local information is stored in the
+instruction stream: Each instruction may contain `REG_DEAD' notes
+representing that the value of a given register is no longer needed, or
+`REG_UNUSED' notes representing that the value computed by the
+instruction is never used.  The second is useful for instructions
+computing multiple values at once.
+
+
+File: gccint.info,  Node: Machine Desc,  Next: Target Macros,  Prev: Loop Analysis and Representation,  Up: Top
+
+16 Machine Descriptions
+***********************
+
+A machine description has two parts: a file of instruction patterns
+(`.md' file) and a C header file of macro definitions.
+
+ The `.md' file for a target machine contains a pattern for each
+instruction that the target machine supports (or at least each
+instruction that is worth telling the compiler about).  It may also
+contain comments.  A semicolon causes the rest of the line to be a
+comment, unless the semicolon is inside a quoted string.
+
+ See the next chapter for information on the C header file.
+
+* Menu:
+
+* Overview::            How the machine description is used.
+* Patterns::            How to write instruction patterns.
+* Example::             An explained example of a `define_insn' pattern.
+* RTL Template::        The RTL template defines what insns match a pattern.
+* Output Template::     The output template says how to make assembler code
+                        from such an insn.
+* Output Statement::    For more generality, write C code to output
+                        the assembler code.
+* Predicates::          Controlling what kinds of operands can be used
+                        for an insn.
+* Constraints::         Fine-tuning operand selection.
+* Standard Names::      Names mark patterns to use for code generation.
+* Pattern Ordering::    When the order of patterns makes a difference.
+* Dependent Patterns::  Having one pattern may make you need another.
+* Jump Patterns::       Special considerations for patterns for jump insns.
+* Looping Patterns::    How to define patterns for special looping insns.
+* Insn Canonicalizations::Canonicalization of Instructions
+* Expander Definitions::Generating a sequence of several RTL insns
+                        for a standard operation.
+* Insn Splitting::      Splitting Instructions into Multiple Instructions.
+* Including Patterns::  Including Patterns in Machine Descriptions.
+* Peephole Definitions::Defining machine-specific peephole optimizations.
+* Insn Attributes::     Specifying the value of attributes for generated insns.
+* Conditional Execution::Generating `define_insn' patterns for
+                         predication.
+* Constant Definitions::Defining symbolic constants that can be used in the
+                        md file.
+* Iterators::           Using iterators to generate patterns from a template.
+
+
+File: gccint.info,  Node: Overview,  Next: Patterns,  Up: Machine Desc
+
+16.1 Overview of How the Machine Description is Used
+====================================================
+
+There are three main conversions that happen in the compiler:
+
+  1. The front end reads the source code and builds a parse tree.
+
+  2. The parse tree is used to generate an RTL insn list based on named
+     instruction patterns.
+
+  3. The insn list is matched against the RTL templates to produce
+     assembler code.
+
+
+ For the generate pass, only the names of the insns matter, from either
+a named `define_insn' or a `define_expand'.  The compiler will choose
+the pattern with the right name and apply the operands according to the
+documentation later in this chapter, without regard for the RTL
+template or operand constraints.  Note that the names the compiler looks
+for are hard-coded in the compiler--it will ignore unnamed patterns and
+patterns with names it doesn't know about, but if you don't provide a
+named pattern it needs, it will abort.
+
+ If a `define_insn' is used, the template given is inserted into the
+insn list.  If a `define_expand' is used, one of three things happens,
+based on the condition logic.  The condition logic may manually create
+new insns for the insn list, say via `emit_insn()', and invoke `DONE'.
+For certain named patterns, it may invoke `FAIL' to tell the compiler
+to use an alternate way of performing that task.  If it invokes neither
+`DONE' nor `FAIL', the template given in the pattern is inserted, as if
+the `define_expand' were a `define_insn'.
+
+ Once the insn list is generated, various optimization passes convert,
+replace, and rearrange the insns in the insn list.  This is where the
+`define_split' and `define_peephole' patterns get used, for example.
+
+ Finally, the insn list's RTL is matched up with the RTL templates in
+the `define_insn' patterns, and those patterns are used to emit the
+final assembly code.  For this purpose, each named `define_insn' acts
+like it's unnamed, since the names are ignored.
+
+
+File: gccint.info,  Node: Patterns,  Next: Example,  Prev: Overview,  Up: Machine Desc
+
+16.2 Everything about Instruction Patterns
+==========================================
+
+Each instruction pattern contains an incomplete RTL expression, with
+pieces to be filled in later, operand constraints that restrict how the
+pieces can be filled in, and an output pattern or C code to generate
+the assembler output, all wrapped up in a `define_insn' expression.
+
+ A `define_insn' is an RTL expression containing four or five operands:
+
+  1. An optional name.  The presence of a name indicate that this
+     instruction pattern can perform a certain standard job for the
+     RTL-generation pass of the compiler.  This pass knows certain
+     names and will use the instruction patterns with those names, if
+     the names are defined in the machine description.
+
+     The absence of a name is indicated by writing an empty string
+     where the name should go.  Nameless instruction patterns are never
+     used for generating RTL code, but they may permit several simpler
+     insns to be combined later on.
+
+     Names that are not thus known and used in RTL-generation have no
+     effect; they are equivalent to no name at all.
+
+     For the purpose of debugging the compiler, you may also specify a
+     name beginning with the `*' character.  Such a name is used only
+     for identifying the instruction in RTL dumps; it is entirely
+     equivalent to having a nameless pattern for all other purposes.
+
+  2. The "RTL template" (*note RTL Template::) is a vector of incomplete
+     RTL expressions which show what the instruction should look like.
+     It is incomplete because it may contain `match_operand',
+     `match_operator', and `match_dup' expressions that stand for
+     operands of the instruction.
+
+     If the vector has only one element, that element is the template
+     for the instruction pattern.  If the vector has multiple elements,
+     then the instruction pattern is a `parallel' expression containing
+     the elements described.
+
+  3. A condition.  This is a string which contains a C expression that
+     is the final test to decide whether an insn body matches this
+     pattern.
+
+     For a named pattern, the condition (if present) may not depend on
+     the data in the insn being matched, but only the
+     target-machine-type flags.  The compiler needs to test these
+     conditions during initialization in order to learn exactly which
+     named instructions are available in a particular run.
+
+     For nameless patterns, the condition is applied only when matching
+     an individual insn, and only after the insn has matched the
+     pattern's recognition template.  The insn's operands may be found
+     in the vector `operands'.  For an insn where the condition has
+     once matched, it can't be used to control register allocation, for
+     example by excluding certain hard registers or hard register
+     combinations.
+
+  4. The "output template": a string that says how to output matching
+     insns as assembler code.  `%' in this string specifies where to
+     substitute the value of an operand.  *Note Output Template::.
+
+     When simple substitution isn't general enough, you can specify a
+     piece of C code to compute the output.  *Note Output Statement::.
+
+  5. Optionally, a vector containing the values of attributes for insns
+     matching this pattern.  *Note Insn Attributes::.
+
+
+File: gccint.info,  Node: Example,  Next: RTL Template,  Prev: Patterns,  Up: Machine Desc
+
+16.3 Example of `define_insn'
+=============================
+
+Here is an actual example of an instruction pattern, for the
+68000/68020.
+
+     (define_insn "tstsi"
+       [(set (cc0)
+             (match_operand:SI 0 "general_operand" "rm"))]
+       ""
+       "*
+     {
+       if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+         return \"tstl %0\";
+       return \"cmpl #0,%0\";
+     }")
+
+This can also be written using braced strings:
+
+     (define_insn "tstsi"
+       [(set (cc0)
+             (match_operand:SI 0 "general_operand" "rm"))]
+       ""
+     {
+       if (TARGET_68020 || ! ADDRESS_REG_P (operands[0]))
+         return "tstl %0";
+       return "cmpl #0,%0";
+     })
+
+ This is an instruction that sets the condition codes based on the
+value of a general operand.  It has no condition, so any insn whose RTL
+description has the form shown may be handled according to this
+pattern.  The name `tstsi' means "test a `SImode' value" and tells the
+RTL generation pass that, when it is necessary to test such a value, an
+insn to do so can be constructed using this pattern.
+
+ The output control string is a piece of C code which chooses which
+output template to return based on the kind of operand and the specific
+type of CPU for which code is being generated.
+
+ `"rm"' is an operand constraint.  Its meaning is explained below.
+
+
+File: gccint.info,  Node: RTL Template,  Next: Output Template,  Prev: Example,  Up: Machine Desc
+
+16.4 RTL Template
+=================
+
+The RTL template is used to define which insns match the particular
+pattern and how to find their operands.  For named patterns, the RTL
+template also says how to construct an insn from specified operands.
+
+ Construction involves substituting specified operands into a copy of
+the template.  Matching involves determining the values that serve as
+the operands in the insn being matched.  Both of these activities are
+controlled by special expression types that direct matching and
+substitution of the operands.
+
+`(match_operand:M N PREDICATE CONSTRAINT)'
+     This expression is a placeholder for operand number N of the insn.
+     When constructing an insn, operand number N will be substituted at
+     this point.  When matching an insn, whatever appears at this
+     position in the insn will be taken as operand number N; but it
+     must satisfy PREDICATE or this instruction pattern will not match
+     at all.
+
+     Operand numbers must be chosen consecutively counting from zero in
+     each instruction pattern.  There may be only one `match_operand'
+     expression in the pattern for each operand number.  Usually
+     operands are numbered in the order of appearance in `match_operand'
+     expressions.  In the case of a `define_expand', any operand numbers
+     used only in `match_dup' expressions have higher values than all
+     other operand numbers.
+
+     PREDICATE is a string that is the name of a function that accepts
+     two arguments, an expression and a machine mode.  *Note
+     Predicates::.  During matching, the function will be called with
+     the putative operand as the expression and M as the mode argument
+     (if M is not specified, `VOIDmode' will be used, which normally
+     causes PREDICATE to accept any mode).  If it returns zero, this
+     instruction pattern fails to match.  PREDICATE may be an empty
+     string; then it means no test is to be done on the operand, so
+     anything which occurs in this position is valid.
+
+     Most of the time, PREDICATE will reject modes other than M--but
+     not always.  For example, the predicate `address_operand' uses M
+     as the mode of memory ref that the address should be valid for.
+     Many predicates accept `const_int' nodes even though their mode is
+     `VOIDmode'.
+
+     CONSTRAINT controls reloading and the choice of the best register
+     class to use for a value, as explained later (*note Constraints::).
+     If the constraint would be an empty string, it can be omitted.
+
+     People are often unclear on the difference between the constraint
+     and the predicate.  The predicate helps decide whether a given
+     insn matches the pattern.  The constraint plays no role in this
+     decision; instead, it controls various decisions in the case of an
+     insn which does match.
+
+`(match_scratch:M N CONSTRAINT)'
+     This expression is also a placeholder for operand number N and
+     indicates that operand must be a `scratch' or `reg' expression.
+
+     When matching patterns, this is equivalent to
+
+          (match_operand:M N "scratch_operand" PRED)
+
+     but, when generating RTL, it produces a (`scratch':M) expression.
+
+     If the last few expressions in a `parallel' are `clobber'
+     expressions whose operands are either a hard register or
+     `match_scratch', the combiner can add or delete them when
+     necessary.  *Note Side Effects::.
+
+`(match_dup N)'
+     This expression is also a placeholder for operand number N.  It is
+     used when the operand needs to appear more than once in the insn.
+
+     In construction, `match_dup' acts just like `match_operand': the
+     operand is substituted into the insn being constructed.  But in
+     matching, `match_dup' behaves differently.  It assumes that operand
+     number N has already been determined by a `match_operand'
+     appearing earlier in the recognition template, and it matches only
+     an identical-looking expression.
+
+     Note that `match_dup' should not be used to tell the compiler that
+     a particular register is being used for two operands (example:
+     `add' that adds one register to another; the second register is
+     both an input operand and the output operand).  Use a matching
+     constraint (*note Simple Constraints::) for those.  `match_dup' is
+     for the cases where one operand is used in two places in the
+     template, such as an instruction that computes both a quotient and
+     a remainder, where the opcode takes two input operands but the RTL
+     template has to refer to each of those twice; once for the
+     quotient pattern and once for the remainder pattern.
+
+`(match_operator:M N PREDICATE [OPERANDS...])'
+     This pattern is a kind of placeholder for a variable RTL expression
+     code.
+
+     When constructing an insn, it stands for an RTL expression whose
+     expression code is taken from that of operand N, and whose
+     operands are constructed from the patterns OPERANDS.
+
+     When matching an expression, it matches an expression if the
+     function PREDICATE returns nonzero on that expression _and_ the
+     patterns OPERANDS match the operands of the expression.
+
+     Suppose that the function `commutative_operator' is defined as
+     follows, to match any expression whose operator is one of the
+     commutative arithmetic operators of RTL and whose mode is MODE:
+
+          int
+          commutative_integer_operator (x, mode)
+               rtx x;
+               enum machine_mode mode;
+          {
+            enum rtx_code code = GET_CODE (x);
+            if (GET_MODE (x) != mode)
+              return 0;
+            return (GET_RTX_CLASS (code) == RTX_COMM_ARITH
+                    || code == EQ || code == NE);
+          }
+
+     Then the following pattern will match any RTL expression consisting
+     of a commutative operator applied to two general operands:
+
+          (match_operator:SI 3 "commutative_operator"
+            [(match_operand:SI 1 "general_operand" "g")
+             (match_operand:SI 2 "general_operand" "g")])
+
+     Here the vector `[OPERANDS...]' contains two patterns because the
+     expressions to be matched all contain two operands.
+
+     When this pattern does match, the two operands of the commutative
+     operator are recorded as operands 1 and 2 of the insn.  (This is
+     done by the two instances of `match_operand'.)  Operand 3 of the
+     insn will be the entire commutative expression: use `GET_CODE
+     (operands[3])' to see which commutative operator was used.
+
+     The machine mode M of `match_operator' works like that of
+     `match_operand': it is passed as the second argument to the
+     predicate function, and that function is solely responsible for
+     deciding whether the expression to be matched "has" that mode.
+
+     When constructing an insn, argument 3 of the gen-function will
+     specify the operation (i.e. the expression code) for the
+     expression to be made.  It should be an RTL expression, whose
+     expression code is copied into a new expression whose operands are
+     arguments 1 and 2 of the gen-function.  The subexpressions of
+     argument 3 are not used; only its expression code matters.
+
+     When `match_operator' is used in a pattern for matching an insn,
+     it usually best if the operand number of the `match_operator' is
+     higher than that of the actual operands of the insn.  This improves
+     register allocation because the register allocator often looks at
+     operands 1 and 2 of insns to see if it can do register tying.
+
+     There is no way to specify constraints in `match_operator'.  The
+     operand of the insn which corresponds to the `match_operator'
+     never has any constraints because it is never reloaded as a whole.
+     However, if parts of its OPERANDS are matched by `match_operand'
+     patterns, those parts may have constraints of their own.
+
+`(match_op_dup:M N[OPERANDS...])'
+     Like `match_dup', except that it applies to operators instead of
+     operands.  When constructing an insn, operand number N will be
+     substituted at this point.  But in matching, `match_op_dup' behaves
+     differently.  It assumes that operand number N has already been
+     determined by a `match_operator' appearing earlier in the
+     recognition template, and it matches only an identical-looking
+     expression.
+
+`(match_parallel N PREDICATE [SUBPAT...])'
+     This pattern is a placeholder for an insn that consists of a
+     `parallel' expression with a variable number of elements.  This
+     expression should only appear at the top level of an insn pattern.
+
+     When constructing an insn, operand number N will be substituted at
+     this point.  When matching an insn, it matches if the body of the
+     insn is a `parallel' expression with at least as many elements as
+     the vector of SUBPAT expressions in the `match_parallel', if each
+     SUBPAT matches the corresponding element of the `parallel', _and_
+     the function PREDICATE returns nonzero on the `parallel' that is
+     the body of the insn.  It is the responsibility of the predicate
+     to validate elements of the `parallel' beyond those listed in the
+     `match_parallel'.
+
+     A typical use of `match_parallel' is to match load and store
+     multiple expressions, which can contain a variable number of
+     elements in a `parallel'.  For example,
+
+          (define_insn ""
+            [(match_parallel 0 "load_multiple_operation"
+               [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                     (match_operand:SI 2 "memory_operand" "m"))
+                (use (reg:SI 179))
+                (clobber (reg:SI 179))])]
+            ""
+            "loadm 0,0,%1,%2")
+
+     This example comes from `a29k.md'.  The function
+     `load_multiple_operation' is defined in `a29k.c' and checks that
+     subsequent elements in the `parallel' are the same as the `set' in
+     the pattern, except that they are referencing subsequent registers
+     and memory locations.
+
+     An insn that matches this pattern might look like:
+
+          (parallel
+           [(set (reg:SI 20) (mem:SI (reg:SI 100)))
+            (use (reg:SI 179))
+            (clobber (reg:SI 179))
+            (set (reg:SI 21)
+                 (mem:SI (plus:SI (reg:SI 100)
+                                  (const_int 4))))
+            (set (reg:SI 22)
+                 (mem:SI (plus:SI (reg:SI 100)
+                                  (const_int 8))))])
+
+`(match_par_dup N [SUBPAT...])'
+     Like `match_op_dup', but for `match_parallel' instead of
+     `match_operator'.
+
+
+
+File: gccint.info,  Node: Output Template,  Next: Output Statement,  Prev: RTL Template,  Up: Machine Desc
+
+16.5 Output Templates and Operand Substitution
+==============================================
+
+The "output template" is a string which specifies how to output the
+assembler code for an instruction pattern.  Most of the template is a
+fixed string which is output literally.  The character `%' is used to
+specify where to substitute an operand; it can also be used to identify
+places where different variants of the assembler require different
+syntax.
+
+ In the simplest case, a `%' followed by a digit N says to output
+operand N at that point in the string.
+
+ `%' followed by a letter and a digit says to output an operand in an
+alternate fashion.  Four letters have standard, built-in meanings
+described below.  The machine description macro `PRINT_OPERAND' can
+define additional letters with nonstandard meanings.
+
+ `%cDIGIT' can be used to substitute an operand that is a constant
+value without the syntax that normally indicates an immediate operand.
+
+ `%nDIGIT' is like `%cDIGIT' except that the value of the constant is
+negated before printing.
+
+ `%aDIGIT' can be used to substitute an operand as if it were a memory
+reference, with the actual operand treated as the address.  This may be
+useful when outputting a "load address" instruction, because often the
+assembler syntax for such an instruction requires you to write the
+operand as if it were a memory reference.
+
+ `%lDIGIT' is used to substitute a `label_ref' into a jump instruction.
+
+ `%=' outputs a number which is unique to each instruction in the
+entire compilation.  This is useful for making local labels to be
+referred to more than once in a single template that generates multiple
+assembler instructions.
+
+ `%' followed by a punctuation character specifies a substitution that
+does not use an operand.  Only one case is standard: `%%' outputs a `%'
+into the assembler code.  Other nonstandard cases can be defined in the
+`PRINT_OPERAND' macro.  You must also define which punctuation
+characters are valid with the `PRINT_OPERAND_PUNCT_VALID_P' macro.
+
+ The template may generate multiple assembler instructions.  Write the
+text for the instructions, with `\;' between them.
+
+ When the RTL contains two operands which are required by constraint to
+match each other, the output template must refer only to the
+lower-numbered operand.  Matching operands are not always identical,
+and the rest of the compiler arranges to put the proper RTL expression
+for printing into the lower-numbered operand.
+
+ One use of nonstandard letters or punctuation following `%' is to
+distinguish between different assembler languages for the same machine;
+for example, Motorola syntax versus MIT syntax for the 68000.  Motorola
+syntax requires periods in most opcode names, while MIT syntax does
+not.  For example, the opcode `movel' in MIT syntax is `move.l' in
+Motorola syntax.  The same file of patterns is used for both kinds of
+output syntax, but the character sequence `%.' is used in each place
+where Motorola syntax wants a period.  The `PRINT_OPERAND' macro for
+Motorola syntax defines the sequence to output a period; the macro for
+MIT syntax defines it to do nothing.
+
+ As a special case, a template consisting of the single character `#'
+instructs the compiler to first split the insn, and then output the
+resulting instructions separately.  This helps eliminate redundancy in
+the output templates.   If you have a `define_insn' that needs to emit
+multiple assembler instructions, and there is a matching `define_split'
+already defined, then you can simply use `#' as the output template
+instead of writing an output template that emits the multiple assembler
+instructions.
+
+ If the macro `ASSEMBLER_DIALECT' is defined, you can use construct of
+the form `{option0|option1|option2}' in the templates.  These describe
+multiple variants of assembler language syntax.  *Note Instruction
+Output::.
+
+
+File: gccint.info,  Node: Output Statement,  Next: Predicates,  Prev: Output Template,  Up: Machine Desc
+
+16.6 C Statements for Assembler Output
+======================================
+
+Often a single fixed template string cannot produce correct and
+efficient assembler code for all the cases that are recognized by a
+single instruction pattern.  For example, the opcodes may depend on the
+kinds of operands; or some unfortunate combinations of operands may
+require extra machine instructions.
+
+ If the output control string starts with a `@', then it is actually a
+series of templates, each on a separate line.  (Blank lines and leading
+spaces and tabs are ignored.)  The templates correspond to the
+pattern's constraint alternatives (*note Multi-Alternative::).  For
+example, if a target machine has a two-address add instruction `addr'
+to add into a register and another `addm' to add a register to memory,
+you might write this pattern:
+
+     (define_insn "addsi3"
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (plus:SI (match_operand:SI 1 "general_operand" "0,0")
+                      (match_operand:SI 2 "general_operand" "g,r")))]
+       ""
+       "@
+        addr %2,%0
+        addm %2,%0")
+
+ If the output control string starts with a `*', then it is not an
+output template but rather a piece of C program that should compute a
+template.  It should execute a `return' statement to return the
+template-string you want.  Most such templates use C string literals,
+which require doublequote characters to delimit them.  To include these
+doublequote characters in the string, prefix each one with `\'.
+
+ If the output control string is written as a brace block instead of a
+double-quoted string, it is automatically assumed to be C code.  In that
+case, it is not necessary to put in a leading asterisk, or to escape the
+doublequotes surrounding C string literals.
+
+ The operands may be found in the array `operands', whose C data type
+is `rtx []'.
+
+ It is very common to select different ways of generating assembler code
+based on whether an immediate operand is within a certain range.  Be
+careful when doing this, because the result of `INTVAL' is an integer
+on the host machine.  If the host machine has more bits in an `int'
+than the target machine has in the mode in which the constant will be
+used, then some of the bits you get from `INTVAL' will be superfluous.
+For proper results, you must carefully disregard the values of those
+bits.
+
+ It is possible to output an assembler instruction and then go on to
+output or compute more of them, using the subroutine `output_asm_insn'.
+This receives two arguments: a template-string and a vector of
+operands.  The vector may be `operands', or it may be another array of
+`rtx' that you declare locally and initialize yourself.
+
+ When an insn pattern has multiple alternatives in its constraints,
+often the appearance of the assembler code is determined mostly by
+which alternative was matched.  When this is so, the C code can test
+the variable `which_alternative', which is the ordinal number of the
+alternative that was actually satisfied (0 for the first, 1 for the
+second alternative, etc.).
+
+ For example, suppose there are two opcodes for storing zero, `clrreg'
+for registers and `clrmem' for memory locations.  Here is how a pattern
+could use `which_alternative' to choose between them:
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (const_int 0))]
+       ""
+       {
+       return (which_alternative == 0
+               ? "clrreg %0" : "clrmem %0");
+       })
+
+ The example above, where the assembler code to generate was _solely_
+determined by the alternative, could also have been specified as
+follows, having the output control string start with a `@':
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,m")
+             (const_int 0))]
+       ""
+       "@
+        clrreg %0
+        clrmem %0")
+
+
+File: gccint.info,  Node: Predicates,  Next: Constraints,  Prev: Output Statement,  Up: Machine Desc
+
+16.7 Predicates
+===============
+
+A predicate determines whether a `match_operand' or `match_operator'
+expression matches, and therefore whether the surrounding instruction
+pattern will be used for that combination of operands.  GCC has a
+number of machine-independent predicates, and you can define
+machine-specific predicates as needed.  By convention, predicates used
+with `match_operand' have names that end in `_operand', and those used
+with `match_operator' have names that end in `_operator'.
+
+ All predicates are Boolean functions (in the mathematical sense) of
+two arguments: the RTL expression that is being considered at that
+position in the instruction pattern, and the machine mode that the
+`match_operand' or `match_operator' specifies.  In this section, the
+first argument is called OP and the second argument MODE.  Predicates
+can be called from C as ordinary two-argument functions; this can be
+useful in output templates or other machine-specific code.
+
+ Operand predicates can allow operands that are not actually acceptable
+to the hardware, as long as the constraints give reload the ability to
+fix them up (*note Constraints::).  However, GCC will usually generate
+better code if the predicates specify the requirements of the machine
+instructions as closely as possible.  Reload cannot fix up operands
+that must be constants ("immediate operands"); you must use a predicate
+that allows only constants, or else enforce the requirement in the
+extra condition.
+
+ Most predicates handle their MODE argument in a uniform manner.  If
+MODE is `VOIDmode' (unspecified), then OP can have any mode.  If MODE
+is anything else, then OP must have the same mode, unless OP is a
+`CONST_INT' or integer `CONST_DOUBLE'.  These RTL expressions always
+have `VOIDmode', so it would be counterproductive to check that their
+mode matches.  Instead, predicates that accept `CONST_INT' and/or
+integer `CONST_DOUBLE' check that the value stored in the constant will
+fit in the requested mode.
+
+ Predicates with this behavior are called "normal".  `genrecog' can
+optimize the instruction recognizer based on knowledge of how normal
+predicates treat modes.  It can also diagnose certain kinds of common
+errors in the use of normal predicates; for instance, it is almost
+always an error to use a normal predicate without specifying a mode.
+
+ Predicates that do something different with their MODE argument are
+called "special".  The generic predicates `address_operand' and
+`pmode_register_operand' are special predicates.  `genrecog' does not
+do any optimizations or diagnosis when special predicates are used.
+
+* Menu:
+
+* Machine-Independent Predicates::  Predicates available to all back ends.
+* Defining Predicates::             How to write machine-specific predicate
+                                    functions.
+
+
+File: gccint.info,  Node: Machine-Independent Predicates,  Next: Defining Predicates,  Up: Predicates
+
+16.7.1 Machine-Independent Predicates
+-------------------------------------
+
+These are the generic predicates available to all back ends.  They are
+defined in `recog.c'.  The first category of predicates allow only
+constant, or "immediate", operands.
+
+ -- Function: immediate_operand
+     This predicate allows any sort of constant that fits in MODE.  It
+     is an appropriate choice for instructions that take operands that
+     must be constant.
+
+ -- Function: const_int_operand
+     This predicate allows any `CONST_INT' expression that fits in
+     MODE.  It is an appropriate choice for an immediate operand that
+     does not allow a symbol or label.
+
+ -- Function: const_double_operand
+     This predicate accepts any `CONST_DOUBLE' expression that has
+     exactly MODE.  If MODE is `VOIDmode', it will also accept
+     `CONST_INT'.  It is intended for immediate floating point
+     constants.
+
+The second category of predicates allow only some kind of machine
+register.
+
+ -- Function: register_operand
+     This predicate allows any `REG' or `SUBREG' expression that is
+     valid for MODE.  It is often suitable for arithmetic instruction
+     operands on a RISC machine.
+
+ -- Function: pmode_register_operand
+     This is a slight variant on `register_operand' which works around
+     a limitation in the machine-description reader.
+
+          (match_operand N "pmode_register_operand" CONSTRAINT)
+
+     means exactly what
+
+          (match_operand:P N "register_operand" CONSTRAINT)
+
+     would mean, if the machine-description reader accepted `:P' mode
+     suffixes.  Unfortunately, it cannot, because `Pmode' is an alias
+     for some other mode, and might vary with machine-specific options.
+     *Note Misc::.
+
+ -- Function: scratch_operand
+     This predicate allows hard registers and `SCRATCH' expressions,
+     but not pseudo-registers.  It is used internally by
+     `match_scratch'; it should not be used directly.
+
+The third category of predicates allow only some kind of memory
+reference.
+
+ -- Function: memory_operand
+     This predicate allows any valid reference to a quantity of mode
+     MODE in memory, as determined by the weak form of
+     `GO_IF_LEGITIMATE_ADDRESS' (*note Addressing Modes::).
+
+ -- Function: address_operand
+     This predicate is a little unusual; it allows any operand that is a
+     valid expression for the _address_ of a quantity of mode MODE,
+     again determined by the weak form of `GO_IF_LEGITIMATE_ADDRESS'.
+     To first order, if `(mem:MODE (EXP))' is acceptable to
+     `memory_operand', then EXP is acceptable to `address_operand'.
+     Note that EXP does not necessarily have the mode MODE.
+
+ -- Function: indirect_operand
+     This is a stricter form of `memory_operand' which allows only
+     memory references with a `general_operand' as the address
+     expression.  New uses of this predicate are discouraged, because
+     `general_operand' is very permissive, so it's hard to tell what an
+     `indirect_operand' does or does not allow.  If a target has
+     different requirements for memory operands for different
+     instructions, it is better to define target-specific predicates
+     which enforce the hardware's requirements explicitly.
+
+ -- Function: push_operand
+     This predicate allows a memory reference suitable for pushing a
+     value onto the stack.  This will be a `MEM' which refers to
+     `stack_pointer_rtx', with a side-effect in its address expression
+     (*note Incdec::); which one is determined by the `STACK_PUSH_CODE'
+     macro (*note Frame Layout::).
+
+ -- Function: pop_operand
+     This predicate allows a memory reference suitable for popping a
+     value off the stack.  Again, this will be a `MEM' referring to
+     `stack_pointer_rtx', with a side-effect in its address expression.
+     However, this time `STACK_POP_CODE' is expected.
+
+The fourth category of predicates allow some combination of the above
+operands.
+
+ -- Function: nonmemory_operand
+     This predicate allows any immediate or register operand valid for
+     MODE.
+
+ -- Function: nonimmediate_operand
+     This predicate allows any register or memory operand valid for
+     MODE.
+
+ -- Function: general_operand
+     This predicate allows any immediate, register, or memory operand
+     valid for MODE.
+
+Finally, there are two generic operator predicates.
+
+ -- Function: comparison_operator
+     This predicate matches any expression which performs an arithmetic
+     comparison in MODE; that is, `COMPARISON_P' is true for the
+     expression code.
+
+ -- Function: ordered_comparison_operator
+     This predicate matches any expression which performs an arithmetic
+     comparison in MODE and whose expression code is valid for integer
+     modes; that is, the expression code will be one of `eq', `ne',
+     `lt', `ltu', `le', `leu', `gt', `gtu', `ge', `geu'.
+
+
+File: gccint.info,  Node: Defining Predicates,  Prev: Machine-Independent Predicates,  Up: Predicates
+
+16.7.2 Defining Machine-Specific Predicates
+-------------------------------------------
+
+Many machines have requirements for their operands that cannot be
+expressed precisely using the generic predicates.  You can define
+additional predicates using `define_predicate' and
+`define_special_predicate' expressions.  These expressions have three
+operands:
+
+   * The name of the predicate, as it will be referred to in
+     `match_operand' or `match_operator' expressions.
+
+   * An RTL expression which evaluates to true if the predicate allows
+     the operand OP, false if it does not.  This expression can only use
+     the following RTL codes:
+
+    `MATCH_OPERAND'
+          When written inside a predicate expression, a `MATCH_OPERAND'
+          expression evaluates to true if the predicate it names would
+          allow OP.  The operand number and constraint are ignored.
+          Due to limitations in `genrecog', you can only refer to
+          generic predicates and predicates that have already been
+          defined.
+
+    `MATCH_CODE'
+          This expression evaluates to true if OP or a specified
+          subexpression of OP has one of a given list of RTX codes.
+
+          The first operand of this expression is a string constant
+          containing a comma-separated list of RTX code names (in lower
+          case).  These are the codes for which the `MATCH_CODE' will
+          be true.
+
+          The second operand is a string constant which indicates what
+          subexpression of OP to examine.  If it is absent or the empty
+          string, OP itself is examined.  Otherwise, the string constant
+          must be a sequence of digits and/or lowercase letters.  Each
+          character indicates a subexpression to extract from the
+          current expression; for the first character this is OP, for
+          the second and subsequent characters it is the result of the
+          previous character.  A digit N extracts `XEXP (E, N)'; a
+          letter L extracts `XVECEXP (E, 0, N)' where N is the
+          alphabetic ordinal of L (0 for `a', 1 for 'b', and so on).
+          The `MATCH_CODE' then examines the RTX code of the
+          subexpression extracted by the complete string.  It is not
+          possible to extract components of an `rtvec' that is not at
+          position 0 within its RTX object.
+
+    `MATCH_TEST'
+          This expression has one operand, a string constant containing
+          a C expression.  The predicate's arguments, OP and MODE, are
+          available with those names in the C expression.  The
+          `MATCH_TEST' evaluates to true if the C expression evaluates
+          to a nonzero value.  `MATCH_TEST' expressions must not have
+          side effects.
+
+    `AND'
+    `IOR'
+    `NOT'
+    `IF_THEN_ELSE'
+          The basic `MATCH_' expressions can be combined using these
+          logical operators, which have the semantics of the C operators
+          `&&', `||', `!', and `? :' respectively.  As in Common Lisp,
+          you may give an `AND' or `IOR' expression an arbitrary number
+          of arguments; this has exactly the same effect as writing a
+          chain of two-argument `AND' or `IOR' expressions.
+
+   * An optional block of C code, which should execute `return true' if
+     the predicate is found to match and `return false' if it does not.
+     It must not have any side effects.  The predicate arguments, OP
+     and MODE, are available with those names.
+
+     If a code block is present in a predicate definition, then the RTL
+     expression must evaluate to true _and_ the code block must execute
+     `return true' for the predicate to allow the operand.  The RTL
+     expression is evaluated first; do not re-check anything in the
+     code block that was checked in the RTL expression.
+
+ The program `genrecog' scans `define_predicate' and
+`define_special_predicate' expressions to determine which RTX codes are
+possibly allowed.  You should always make this explicit in the RTL
+predicate expression, using `MATCH_OPERAND' and `MATCH_CODE'.
+
+ Here is an example of a simple predicate definition, from the IA64
+machine description:
+
+     ;; True if OP is a `SYMBOL_REF' which refers to the sdata section.
+     (define_predicate "small_addr_symbolic_operand"
+       (and (match_code "symbol_ref")
+            (match_test "SYMBOL_REF_SMALL_ADDR_P (op)")))
+
+And here is another, showing the use of the C block.
+
+     ;; True if OP is a register operand that is (or could be) a GR reg.
+     (define_predicate "gr_register_operand"
+       (match_operand 0 "register_operand")
+     {
+       unsigned int regno;
+       if (GET_CODE (op) == SUBREG)
+         op = SUBREG_REG (op);
+
+       regno = REGNO (op);
+       return (regno >= FIRST_PSEUDO_REGISTER || GENERAL_REGNO_P (regno));
+     })
+
+ Predicates written with `define_predicate' automatically include a
+test that MODE is `VOIDmode', or OP has the same mode as MODE, or OP is
+a `CONST_INT' or `CONST_DOUBLE'.  They do _not_ check specifically for
+integer `CONST_DOUBLE', nor do they test that the value of either kind
+of constant fits in the requested mode.  This is because
+target-specific predicates that take constants usually have to do more
+stringent value checks anyway.  If you need the exact same treatment of
+`CONST_INT' or `CONST_DOUBLE' that the generic predicates provide, use
+a `MATCH_OPERAND' subexpression to call `const_int_operand',
+`const_double_operand', or `immediate_operand'.
+
+ Predicates written with `define_special_predicate' do not get any
+automatic mode checks, and are treated as having special mode handling
+by `genrecog'.
+
+ The program `genpreds' is responsible for generating code to test
+predicates.  It also writes a header file containing function
+declarations for all machine-specific predicates.  It is not necessary
+to declare these predicates in `CPU-protos.h'.
+
+
+File: gccint.info,  Node: Constraints,  Next: Standard Names,  Prev: Predicates,  Up: Machine Desc
+
+16.8 Operand Constraints
+========================
+
+Each `match_operand' in an instruction pattern can specify constraints
+for the operands allowed.  The constraints allow you to fine-tune
+matching within the set of operands allowed by the predicate.
+
+ Constraints can say whether an operand may be in a register, and which
+kinds of register; whether the operand can be a memory reference, and
+which kinds of address; whether the operand may be an immediate
+constant, and which possible values it may have.  Constraints can also
+require two operands to match.
+
+* Menu:
+
+* Simple Constraints::  Basic use of constraints.
+* Multi-Alternative::   When an insn has two alternative constraint-patterns.
+* Class Preferences::   Constraints guide which hard register to put things in.
+* Modifiers::           More precise control over effects of constraints.
+* Disable Insn Alternatives:: Disable insn alternatives using the `enabled' attribute.
+* Machine Constraints:: Existing constraints for some particular machines.
+* Define Constraints::  How to define machine-specific constraints.
+* C Constraint Interface:: How to test constraints from C code.
+
+
+File: gccint.info,  Node: Simple Constraints,  Next: Multi-Alternative,  Up: Constraints
+
+16.8.1 Simple Constraints
+-------------------------
+
+The simplest kind of constraint is a string full of letters, each of
+which describes one kind of operand that is permitted.  Here are the
+letters that are allowed:
+
+whitespace
+     Whitespace characters are ignored and can be inserted at any
+     position except the first.  This enables each alternative for
+     different operands to be visually aligned in the machine
+     description even if they have different number of constraints and
+     modifiers.
+
+`m'
+     A memory operand is allowed, with any kind of address that the
+     machine supports in general.  Note that the letter used for the
+     general memory constraint can be re-defined by a back end using
+     the `TARGET_MEM_CONSTRAINT' macro.
+
+`o'
+     A memory operand is allowed, but only if the address is
+     "offsettable".  This means that adding a small integer (actually,
+     the width in bytes of the operand, as determined by its machine
+     mode) may be added to the address and the result is also a valid
+     memory address.
+
+     For example, an address which is constant is offsettable; so is an
+     address that is the sum of a register and a constant (as long as a
+     slightly larger constant is also within the range of
+     address-offsets supported by the machine); but an autoincrement or
+     autodecrement address is not offsettable.  More complicated
+     indirect/indexed addresses may or may not be offsettable depending
+     on the other addressing modes that the machine supports.
+
+     Note that in an output operand which can be matched by another
+     operand, the constraint letter `o' is valid only when accompanied
+     by both `<' (if the target machine has predecrement addressing)
+     and `>' (if the target machine has preincrement addressing).
+
+`V'
+     A memory operand that is not offsettable.  In other words,
+     anything that would fit the `m' constraint but not the `o'
+     constraint.
+
+`<'
+     A memory operand with autodecrement addressing (either
+     predecrement or postdecrement) is allowed.
+
+`>'
+     A memory operand with autoincrement addressing (either
+     preincrement or postincrement) is allowed.
+
+`r'
+     A register operand is allowed provided that it is in a general
+     register.
+
+`i'
+     An immediate integer operand (one with constant value) is allowed.
+     This includes symbolic constants whose values will be known only at
+     assembly time or later.
+
+`n'
+     An immediate integer operand with a known numeric value is allowed.
+     Many systems cannot support assembly-time constants for operands
+     less than a word wide.  Constraints for these operands should use
+     `n' rather than `i'.
+
+`I', `J', `K', ... `P'
+     Other letters in the range `I' through `P' may be defined in a
+     machine-dependent fashion to permit immediate integer operands with
+     explicit integer values in specified ranges.  For example, on the
+     68000, `I' is defined to stand for the range of values 1 to 8.
+     This is the range permitted as a shift count in the shift
+     instructions.
+
+`E'
+     An immediate floating operand (expression code `const_double') is
+     allowed, but only if the target floating point format is the same
+     as that of the host machine (on which the compiler is running).
+
+`F'
+     An immediate floating operand (expression code `const_double' or
+     `const_vector') is allowed.
+
+`G', `H'
+     `G' and `H' may be defined in a machine-dependent fashion to
+     permit immediate floating operands in particular ranges of values.
+
+`s'
+     An immediate integer operand whose value is not an explicit
+     integer is allowed.
+
+     This might appear strange; if an insn allows a constant operand
+     with a value not known at compile time, it certainly must allow
+     any known value.  So why use `s' instead of `i'?  Sometimes it
+     allows better code to be generated.
+
+     For example, on the 68000 in a fullword instruction it is possible
+     to use an immediate operand; but if the immediate value is between
+     -128 and 127, better code results from loading the value into a
+     register and using the register.  This is because the load into
+     the register can be done with a `moveq' instruction.  We arrange
+     for this to happen by defining the letter `K' to mean "any integer
+     outside the range -128 to 127", and then specifying `Ks' in the
+     operand constraints.
+
+`g'
+     Any register, memory or immediate integer operand is allowed,
+     except for registers that are not general registers.
+
+`X'
+     Any operand whatsoever is allowed, even if it does not satisfy
+     `general_operand'.  This is normally used in the constraint of a
+     `match_scratch' when certain alternatives will not actually
+     require a scratch register.
+
+`0', `1', `2', ... `9'
+     An operand that matches the specified operand number is allowed.
+     If a digit is used together with letters within the same
+     alternative, the digit should come last.
+
+     This number is allowed to be more than a single digit.  If multiple
+     digits are encountered consecutively, they are interpreted as a
+     single decimal integer.  There is scant chance for ambiguity,
+     since to-date it has never been desirable that `10' be interpreted
+     as matching either operand 1 _or_ operand 0.  Should this be
+     desired, one can use multiple alternatives instead.
+
+     This is called a "matching constraint" and what it really means is
+     that the assembler has only a single operand that fills two roles
+     considered separate in the RTL insn.  For example, an add insn has
+     two input operands and one output operand in the RTL, but on most
+     CISC machines an add instruction really has only two operands, one
+     of them an input-output operand:
+
+          addl #35,r12
+
+     Matching constraints are used in these circumstances.  More
+     precisely, the two operands that match must include one input-only
+     operand and one output-only operand.  Moreover, the digit must be a
+     smaller number than the number of the operand that uses it in the
+     constraint.
+
+     For operands to match in a particular case usually means that they
+     are identical-looking RTL expressions.  But in a few special cases
+     specific kinds of dissimilarity are allowed.  For example, `*x' as
+     an input operand will match `*x++' as an output operand.  For
+     proper results in such cases, the output template should always
+     use the output-operand's number when printing the operand.
+
+`p'
+     An operand that is a valid memory address is allowed.  This is for
+     "load address" and "push address" instructions.
+
+     `p' in the constraint must be accompanied by `address_operand' as
+     the predicate in the `match_operand'.  This predicate interprets
+     the mode specified in the `match_operand' as the mode of the memory
+     reference for which the address would be valid.
+
+OTHER-LETTERS
+     Other letters can be defined in machine-dependent fashion to stand
+     for particular classes of registers or other arbitrary operand
+     types.  `d', `a' and `f' are defined on the 68000/68020 to stand
+     for data, address and floating point registers.
+
+ In order to have valid assembler code, each operand must satisfy its
+constraint.  But a failure to do so does not prevent the pattern from
+applying to an insn.  Instead, it directs the compiler to modify the
+code so that the constraint will be satisfied.  Usually this is done by
+copying an operand into a register.
+
+ Contrast, therefore, the two instruction patterns that follow:
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r")
+             (plus:SI (match_dup 0)
+                      (match_operand:SI 1 "general_operand" "r")))]
+       ""
+       "...")
+
+which has two operands, one of which must appear in two places, and
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r")
+             (plus:SI (match_operand:SI 1 "general_operand" "0")
+                      (match_operand:SI 2 "general_operand" "r")))]
+       ""
+       "...")
+
+which has three operands, two of which are required by a constraint to
+be identical.  If we are considering an insn of the form
+
+     (insn N PREV NEXT
+       (set (reg:SI 3)
+            (plus:SI (reg:SI 6) (reg:SI 109)))
+       ...)
+
+the first pattern would not apply at all, because this insn does not
+contain two identical subexpressions in the right place.  The pattern
+would say, "That does not look like an add instruction; try other
+patterns".  The second pattern would say, "Yes, that's an add
+instruction, but there is something wrong with it".  It would direct
+the reload pass of the compiler to generate additional insns to make
+the constraint true.  The results might look like this:
+
+     (insn N2 PREV N
+       (set (reg:SI 3) (reg:SI 6))
+       ...)
+
+     (insn N N2 NEXT
+       (set (reg:SI 3)
+            (plus:SI (reg:SI 3) (reg:SI 109)))
+       ...)
+
+ It is up to you to make sure that each operand, in each pattern, has
+constraints that can handle any RTL expression that could be present for
+that operand.  (When multiple alternatives are in use, each pattern
+must, for each possible combination of operand expressions, have at
+least one alternative which can handle that combination of operands.)
+The constraints don't need to _allow_ any possible operand--when this is
+the case, they do not constrain--but they must at least point the way to
+reloading any possible operand so that it will fit.
+
+   * If the constraint accepts whatever operands the predicate permits,
+     there is no problem: reloading is never necessary for this operand.
+
+     For example, an operand whose constraints permit everything except
+     registers is safe provided its predicate rejects registers.
+
+     An operand whose predicate accepts only constant values is safe
+     provided its constraints include the letter `i'.  If any possible
+     constant value is accepted, then nothing less than `i' will do; if
+     the predicate is more selective, then the constraints may also be
+     more selective.
+
+   * Any operand expression can be reloaded by copying it into a
+     register.  So if an operand's constraints allow some kind of
+     register, it is certain to be safe.  It need not permit all
+     classes of registers; the compiler knows how to copy a register
+     into another register of the proper class in order to make an
+     instruction valid.
+
+   * A nonoffsettable memory reference can be reloaded by copying the
+     address into a register.  So if the constraint uses the letter
+     `o', all memory references are taken care of.
+
+   * A constant operand can be reloaded by allocating space in memory to
+     hold it as preinitialized data.  Then the memory reference can be
+     used in place of the constant.  So if the constraint uses the
+     letters `o' or `m', constant operands are not a problem.
+
+   * If the constraint permits a constant and a pseudo register used in
+     an insn was not allocated to a hard register and is equivalent to
+     a constant, the register will be replaced with the constant.  If
+     the predicate does not permit a constant and the insn is
+     re-recognized for some reason, the compiler will crash.  Thus the
+     predicate must always recognize any objects allowed by the
+     constraint.
+
+ If the operand's predicate can recognize registers, but the constraint
+does not permit them, it can make the compiler crash.  When this
+operand happens to be a register, the reload pass will be stymied,
+because it does not know how to copy a register temporarily into memory.
+
+ If the predicate accepts a unary operator, the constraint applies to
+the operand.  For example, the MIPS processor at ISA level 3 supports an
+instruction which adds two registers in `SImode' to produce a `DImode'
+result, but only if the registers are correctly sign extended.  This
+predicate for the input operands accepts a `sign_extend' of an `SImode'
+register.  Write the constraint to indicate the type of register that
+is required for the operand of the `sign_extend'.
+
+
+File: gccint.info,  Node: Multi-Alternative,  Next: Class Preferences,  Prev: Simple Constraints,  Up: Constraints
+
+16.8.2 Multiple Alternative Constraints
+---------------------------------------
+
+Sometimes a single instruction has multiple alternative sets of possible
+operands.  For example, on the 68000, a logical-or instruction can
+combine register or an immediate value into memory, or it can combine
+any kind of operand into a register; but it cannot combine one memory
+location into another.
+
+ These constraints are represented as multiple alternatives.  An
+alternative can be described by a series of letters for each operand.
+The overall constraint for an operand is made from the letters for this
+operand from the first alternative, a comma, the letters for this
+operand from the second alternative, a comma, and so on until the last
+alternative.  Here is how it is done for fullword logical-or on the
+68000:
+
+     (define_insn "iorsi3"
+       [(set (match_operand:SI 0 "general_operand" "=m,d")
+             (ior:SI (match_operand:SI 1 "general_operand" "%0,0")
+                     (match_operand:SI 2 "general_operand" "dKs,dmKs")))]
+       ...)
+
+ The first alternative has `m' (memory) for operand 0, `0' for operand
+1 (meaning it must match operand 0), and `dKs' for operand 2.  The
+second alternative has `d' (data register) for operand 0, `0' for
+operand 1, and `dmKs' for operand 2.  The `=' and `%' in the
+constraints apply to all the alternatives; their meaning is explained
+in the next section (*note Class Preferences::).
+
+ If all the operands fit any one alternative, the instruction is valid.
+Otherwise, for each alternative, the compiler counts how many
+instructions must be added to copy the operands so that that
+alternative applies.  The alternative requiring the least copying is
+chosen.  If two alternatives need the same amount of copying, the one
+that comes first is chosen.  These choices can be altered with the `?'
+and `!' characters:
+
+`?'
+     Disparage slightly the alternative that the `?' appears in, as a
+     choice when no alternative applies exactly.  The compiler regards
+     this alternative as one unit more costly for each `?' that appears
+     in it.
+
+`!'
+     Disparage severely the alternative that the `!' appears in.  This
+     alternative can still be used if it fits without reloading, but if
+     reloading is needed, some other alternative will be used.
+
+ When an insn pattern has multiple alternatives in its constraints,
+often the appearance of the assembler code is determined mostly by which
+alternative was matched.  When this is so, the C code for writing the
+assembler code can use the variable `which_alternative', which is the
+ordinal number of the alternative that was actually satisfied (0 for
+the first, 1 for the second alternative, etc.).  *Note Output
+Statement::.
+
+
+File: gccint.info,  Node: Class Preferences,  Next: Modifiers,  Prev: Multi-Alternative,  Up: Constraints
+
+16.8.3 Register Class Preferences
+---------------------------------
+
+The operand constraints have another function: they enable the compiler
+to decide which kind of hardware register a pseudo register is best
+allocated to.  The compiler examines the constraints that apply to the
+insns that use the pseudo register, looking for the machine-dependent
+letters such as `d' and `a' that specify classes of registers.  The
+pseudo register is put in whichever class gets the most "votes".  The
+constraint letters `g' and `r' also vote: they vote in favor of a
+general register.  The machine description says which registers are
+considered general.
+
+ Of course, on some machines all registers are equivalent, and no
+register classes are defined.  Then none of this complexity is relevant.
+
+
+File: gccint.info,  Node: Modifiers,  Next: Disable Insn Alternatives,  Prev: Class Preferences,  Up: Constraints
+
+16.8.4 Constraint Modifier Characters
+-------------------------------------
+
+Here are constraint modifier characters.
+
+`='
+     Means that this operand is write-only for this instruction: the
+     previous value is discarded and replaced by output data.
+
+`+'
+     Means that this operand is both read and written by the
+     instruction.
+
+     When the compiler fixes up the operands to satisfy the constraints,
+     it needs to know which operands are inputs to the instruction and
+     which are outputs from it.  `=' identifies an output; `+'
+     identifies an operand that is both input and output; all other
+     operands are assumed to be input only.
+
+     If you specify `=' or `+' in a constraint, you put it in the first
+     character of the constraint string.
+
+`&'
+     Means (in a particular alternative) that this operand is an
+     "earlyclobber" operand, which is modified before the instruction is
+     finished using the input operands.  Therefore, this operand may
+     not lie in a register that is used as an input operand or as part
+     of any memory address.
+
+     `&' applies only to the alternative in which it is written.  In
+     constraints with multiple alternatives, sometimes one alternative
+     requires `&' while others do not.  See, for example, the `movdf'
+     insn of the 68000.
+
+     An input operand can be tied to an earlyclobber operand if its only
+     use as an input occurs before the early result is written.  Adding
+     alternatives of this form often allows GCC to produce better code
+     when only some of the inputs can be affected by the earlyclobber.
+     See, for example, the `mulsi3' insn of the ARM.
+
+     `&' does not obviate the need to write `='.
+
+`%'
+     Declares the instruction to be commutative for this operand and the
+     following operand.  This means that the compiler may interchange
+     the two operands if that is the cheapest way to make all operands
+     fit the constraints.  This is often used in patterns for addition
+     instructions that really have only two operands: the result must
+     go in one of the arguments.  Here for example, is how the 68000
+     halfword-add instruction is defined:
+
+          (define_insn "addhi3"
+            [(set (match_operand:HI 0 "general_operand" "=m,r")
+               (plus:HI (match_operand:HI 1 "general_operand" "%0,0")
+                        (match_operand:HI 2 "general_operand" "di,g")))]
+            ...)
+     GCC can only handle one commutative pair in an asm; if you use
+     more, the compiler may fail.  Note that you need not use the
+     modifier if the two alternatives are strictly identical; this
+     would only waste time in the reload pass.  The modifier is not
+     operational after register allocation, so the result of
+     `define_peephole2' and `define_split's performed after reload
+     cannot rely on `%' to make the intended insn match.
+
+`#'
+     Says that all following characters, up to the next comma, are to be
+     ignored as a constraint.  They are significant only for choosing
+     register preferences.
+
+`*'
+     Says that the following character should be ignored when choosing
+     register preferences.  `*' has no effect on the meaning of the
+     constraint as a constraint, and no effect on reloading.
+
+     Here is an example: the 68000 has an instruction to sign-extend a
+     halfword in a data register, and can also sign-extend a value by
+     copying it into an address register.  While either kind of
+     register is acceptable, the constraints on an address-register
+     destination are less strict, so it is best if register allocation
+     makes an address register its goal.  Therefore, `*' is used so
+     that the `d' constraint letter (for data register) is ignored when
+     computing register preferences.
+
+          (define_insn "extendhisi2"
+            [(set (match_operand:SI 0 "general_operand" "=*d,a")
+                  (sign_extend:SI
+                   (match_operand:HI 1 "general_operand" "0,g")))]
+            ...)
+
+
+File: gccint.info,  Node: Machine Constraints,  Next: Define Constraints,  Prev: Disable Insn Alternatives,  Up: Constraints
+
+16.8.5 Constraints for Particular Machines
+------------------------------------------
+
+Whenever possible, you should use the general-purpose constraint letters
+in `asm' arguments, since they will convey meaning more readily to
+people reading your code.  Failing that, use the constraint letters
+that usually have very similar meanings across architectures.  The most
+commonly used constraints are `m' and `r' (for memory and
+general-purpose registers respectively; *note Simple Constraints::), and
+`I', usually the letter indicating the most common immediate-constant
+format.
+
+ Each architecture defines additional constraints.  These constraints
+are used by the compiler itself for instruction generation, as well as
+for `asm' statements; therefore, some of the constraints are not
+particularly useful for `asm'.  Here is a summary of some of the
+machine-dependent constraints available on some particular machines; it
+includes both constraints that are useful for `asm' and constraints
+that aren't.  The compiler source file mentioned in the table heading
+for each architecture is the definitive reference for the meanings of
+that architecture's constraints.
+
+_ARM family--`config/arm/arm.h'_
+
+    `f'
+          Floating-point register
+
+    `w'
+          VFP floating-point register
+
+    `F'
+          One of the floating-point constants 0.0, 0.5, 1.0, 2.0, 3.0,
+          4.0, 5.0 or 10.0
+
+    `G'
+          Floating-point constant that would satisfy the constraint `F'
+          if it were negated
+
+    `I'
+          Integer that is valid as an immediate operand in a data
+          processing instruction.  That is, an integer in the range 0
+          to 255 rotated by a multiple of 2
+
+    `J'
+          Integer in the range -4095 to 4095
+
+    `K'
+          Integer that satisfies constraint `I' when inverted (ones
+          complement)
+
+    `L'
+          Integer that satisfies constraint `I' when negated (twos
+          complement)
+
+    `M'
+          Integer in the range 0 to 32
+
+    `Q'
+          A memory reference where the exact address is in a single
+          register (``m'' is preferable for `asm' statements)
+
+    `R'
+          An item in the constant pool
+
+    `S'
+          A symbol in the text segment of the current file
+
+    `Uv'
+          A memory reference suitable for VFP load/store insns
+          (reg+constant offset)
+
+    `Uy'
+          A memory reference suitable for iWMMXt load/store
+          instructions.
+
+    `Uq'
+          A memory reference suitable for the ARMv4 ldrsb instruction.
+
+_AVR family--`config/avr/constraints.md'_
+
+    `l'
+          Registers from r0 to r15
+
+    `a'
+          Registers from r16 to r23
+
+    `d'
+          Registers from r16 to r31
+
+    `w'
+          Registers from r24 to r31.  These registers can be used in
+          `adiw' command
+
+    `e'
+          Pointer register (r26-r31)
+
+    `b'
+          Base pointer register (r28-r31)
+
+    `q'
+          Stack pointer register (SPH:SPL)
+
+    `t'
+          Temporary register r0
+
+    `x'
+          Register pair X (r27:r26)
+
+    `y'
+          Register pair Y (r29:r28)
+
+    `z'
+          Register pair Z (r31:r30)
+
+    `I'
+          Constant greater than -1, less than 64
+
+    `J'
+          Constant greater than -64, less than 1
+
+    `K'
+          Constant integer 2
+
+    `L'
+          Constant integer 0
+
+    `M'
+          Constant that fits in 8 bits
+
+    `N'
+          Constant integer -1
+
+    `O'
+          Constant integer 8, 16, or 24
+
+    `P'
+          Constant integer 1
+
+    `G'
+          A floating point constant 0.0
+
+    `R'
+          Integer constant in the range -6 ... 5.
+
+    `Q'
+          A memory address based on Y or Z pointer with displacement.
+
+_CRX Architecture--`config/crx/crx.h'_
+
+    `b'
+          Registers from r0 to r14 (registers without stack pointer)
+
+    `l'
+          Register r16 (64-bit accumulator lo register)
+
+    `h'
+          Register r17 (64-bit accumulator hi register)
+
+    `k'
+          Register pair r16-r17. (64-bit accumulator lo-hi pair)
+
+    `I'
+          Constant that fits in 3 bits
+
+    `J'
+          Constant that fits in 4 bits
+
+    `K'
+          Constant that fits in 5 bits
+
+    `L'
+          Constant that is one of -1, 4, -4, 7, 8, 12, 16, 20, 32, 48
+
+    `G'
+          Floating point constant that is legal for store immediate
+
+_Hewlett-Packard PA-RISC--`config/pa/pa.h'_
+
+    `a'
+          General register 1
+
+    `f'
+          Floating point register
+
+    `q'
+          Shift amount register
+
+    `x'
+          Floating point register (deprecated)
+
+    `y'
+          Upper floating point register (32-bit), floating point
+          register (64-bit)
+
+    `Z'
+          Any register
+
+    `I'
+          Signed 11-bit integer constant
+
+    `J'
+          Signed 14-bit integer constant
+
+    `K'
+          Integer constant that can be deposited with a `zdepi'
+          instruction
+
+    `L'
+          Signed 5-bit integer constant
+
+    `M'
+          Integer constant 0
+
+    `N'
+          Integer constant that can be loaded with a `ldil' instruction
+
+    `O'
+          Integer constant whose value plus one is a power of 2
+
+    `P'
+          Integer constant that can be used for `and' operations in
+          `depi' and `extru' instructions
+
+    `S'
+          Integer constant 31
+
+    `U'
+          Integer constant 63
+
+    `G'
+          Floating-point constant 0.0
+
+    `A'
+          A `lo_sum' data-linkage-table memory operand
+
+    `Q'
+          A memory operand that can be used as the destination operand
+          of an integer store instruction
+
+    `R'
+          A scaled or unscaled indexed memory operand
+
+    `T'
+          A memory operand for floating-point loads and stores
+
+    `W'
+          A register indirect memory operand
+
+_picoChip family--`picochip.h'_
+
+    `k'
+          Stack register.
+
+    `f'
+          Pointer register.  A register which can be used to access
+          memory without supplying an offset.  Any other register can
+          be used to access memory, but will need a constant offset.
+          In the case of the offset being zero, it is more efficient to
+          use a pointer register, since this reduces code size.
+
+    `t'
+          A twin register.  A register which may be paired with an
+          adjacent register to create a 32-bit register.
+
+    `a'
+          Any absolute memory address (e.g., symbolic constant, symbolic
+          constant + offset).
+
+    `I'
+          4-bit signed integer.
+
+    `J'
+          4-bit unsigned integer.
+
+    `K'
+          8-bit signed integer.
+
+    `M'
+          Any constant whose absolute value is no greater than 4-bits.
+
+    `N'
+          10-bit signed integer
+
+    `O'
+          16-bit signed integer.
+
+
+_PowerPC and IBM RS6000--`config/rs6000/rs6000.h'_
+
+    `b'
+          Address base register
+
+    `d'
+          Floating point register (containing 64-bit value)
+
+    `f'
+          Floating point register (containing 32-bit value)
+
+    `v'
+          Altivec vector register
+
+    `wd'
+          VSX vector register to hold vector double data
+
+    `wf'
+          VSX vector register to hold vector float data
+
+    `ws'
+          VSX vector register to hold scalar float data
+
+    `wa'
+          Any VSX register
+
+    `h'
+          `MQ', `CTR', or `LINK' register
+
+    `q'
+          `MQ' register
+
+    `c'
+          `CTR' register
+
+    `l'
+          `LINK' register
+
+    `x'
+          `CR' register (condition register) number 0
+
+    `y'
+          `CR' register (condition register)
+
+    `z'
+          `FPMEM' stack memory for FPR-GPR transfers
+
+    `I'
+          Signed 16-bit constant
+
+    `J'
+          Unsigned 16-bit constant shifted left 16 bits (use `L'
+          instead for `SImode' constants)
+
+    `K'
+          Unsigned 16-bit constant
+
+    `L'
+          Signed 16-bit constant shifted left 16 bits
+
+    `M'
+          Constant larger than 31
+
+    `N'
+          Exact power of 2
+
+    `O'
+          Zero
+
+    `P'
+          Constant whose negation is a signed 16-bit constant
+
+    `G'
+          Floating point constant that can be loaded into a register
+          with one instruction per word
+
+    `H'
+          Integer/Floating point constant that can be loaded into a
+          register using three instructions
+
+    `m'
+          Memory operand.  Note that on PowerPC targets, `m' can include
+          addresses that update the base register.  It is therefore
+          only safe to use `m' in an `asm' statement if that `asm'
+          statement accesses the operand exactly once.  The `asm'
+          statement must also use `%U<OPNO>' as a placeholder for the
+          "update" flag in the corresponding load or store instruction.
+          For example:
+
+               asm ("st%U0 %1,%0" : "=m" (mem) : "r" (val));
+
+          is correct but:
+
+               asm ("st %1,%0" : "=m" (mem) : "r" (val));
+
+          is not.  Use `es' rather than `m' if you don't want the base
+          register to be updated.
+
+    `es'
+          A "stable" memory operand; that is, one which does not
+          include any automodification of the base register.  Unlike
+          `m', this constraint can be used in `asm' statements that
+          might access the operand several times, or that might not
+          access it at all.
+
+    `Q'
+          Memory operand that is an offset from a register (it is
+          usually better to use `m' or `es' in `asm' statements)
+
+    `Z'
+          Memory operand that is an indexed or indirect from a register
+          (it is usually better to use `m' or `es' in `asm' statements)
+
+    `R'
+          AIX TOC entry
+
+    `a'
+          Address operand that is an indexed or indirect from a
+          register (`p' is preferable for `asm' statements)
+
+    `S'
+          Constant suitable as a 64-bit mask operand
+
+    `T'
+          Constant suitable as a 32-bit mask operand
+
+    `U'
+          System V Release 4 small data area reference
+
+    `t'
+          AND masks that can be performed by two rldic{l, r}
+          instructions
+
+    `W'
+          Vector constant that does not require memory
+
+    `j'
+          Vector constant that is all zeros.
+
+
+_Intel 386--`config/i386/constraints.md'_
+
+    `R'
+          Legacy register--the eight integer registers available on all
+          i386 processors (`a', `b', `c', `d', `si', `di', `bp', `sp').
+
+    `q'
+          Any register accessible as `Rl'.  In 32-bit mode, `a', `b',
+          `c', and `d'; in 64-bit mode, any integer register.
+
+    `Q'
+          Any register accessible as `Rh': `a', `b', `c', and `d'.
+
+    `l'
+          Any register that can be used as the index in a base+index
+          memory access: that is, any general register except the stack
+          pointer.
+
+    `a'
+          The `a' register.
+
+    `b'
+          The `b' register.
+
+    `c'
+          The `c' register.
+
+    `d'
+          The `d' register.
+
+    `S'
+          The `si' register.
+
+    `D'
+          The `di' register.
+
+    `A'
+          The `a' and `d' registers, as a pair (for instructions that
+          return half the result in one and half in the other).
+
+    `f'
+          Any 80387 floating-point (stack) register.
+
+    `t'
+          Top of 80387 floating-point stack (`%st(0)').
+
+    `u'
+          Second from top of 80387 floating-point stack (`%st(1)').
+
+    `y'
+          Any MMX register.
+
+    `x'
+          Any SSE register.
+
+    `Yz'
+          First SSE register (`%xmm0').
+
+    `Y2'
+          Any SSE register, when SSE2 is enabled.
+
+    `Yi'
+          Any SSE register, when SSE2 and inter-unit moves are enabled.
+
+    `Ym'
+          Any MMX register, when inter-unit moves are enabled.
+
+    `I'
+          Integer constant in the range 0 ... 31, for 32-bit shifts.
+
+    `J'
+          Integer constant in the range 0 ... 63, for 64-bit shifts.
+
+    `K'
+          Signed 8-bit integer constant.
+
+    `L'
+          `0xFF' or `0xFFFF', for andsi as a zero-extending move.
+
+    `M'
+          0, 1, 2, or 3 (shifts for the `lea' instruction).
+
+    `N'
+          Unsigned 8-bit integer constant (for `in' and `out'
+          instructions).
+
+    `O'
+          Integer constant in the range 0 ... 127, for 128-bit shifts.
+
+    `G'
+          Standard 80387 floating point constant.
+
+    `C'
+          Standard SSE floating point constant.
+
+    `e'
+          32-bit signed integer constant, or a symbolic reference known
+          to fit that range (for immediate operands in sign-extending
+          x86-64 instructions).
+
+    `Z'
+          32-bit unsigned integer constant, or a symbolic reference
+          known to fit that range (for immediate operands in
+          zero-extending x86-64 instructions).
+
+
+_Intel IA-64--`config/ia64/ia64.h'_
+
+    `a'
+          General register `r0' to `r3' for `addl' instruction
+
+    `b'
+          Branch register
+
+    `c'
+          Predicate register (`c' as in "conditional")
+
+    `d'
+          Application register residing in M-unit
+
+    `e'
+          Application register residing in I-unit
+
+    `f'
+          Floating-point register
+
+    `m'
+          Memory operand.  Remember that `m' allows postincrement and
+          postdecrement which require printing with `%Pn' on IA-64.
+          Use `S' to disallow postincrement and postdecrement.
+
+    `G'
+          Floating-point constant 0.0 or 1.0
+
+    `I'
+          14-bit signed integer constant
+
+    `J'
+          22-bit signed integer constant
+
+    `K'
+          8-bit signed integer constant for logical instructions
+
+    `L'
+          8-bit adjusted signed integer constant for compare pseudo-ops
+
+    `M'
+          6-bit unsigned integer constant for shift counts
+
+    `N'
+          9-bit signed integer constant for load and store
+          postincrements
+
+    `O'
+          The constant zero
+
+    `P'
+          0 or -1 for `dep' instruction
+
+    `Q'
+          Non-volatile memory for floating-point loads and stores
+
+    `R'
+          Integer constant in the range 1 to 4 for `shladd' instruction
+
+    `S'
+          Memory operand except postincrement and postdecrement
+
+_FRV--`config/frv/frv.h'_
+
+    `a'
+          Register in the class `ACC_REGS' (`acc0' to `acc7').
+
+    `b'
+          Register in the class `EVEN_ACC_REGS' (`acc0' to `acc7').
+
+    `c'
+          Register in the class `CC_REGS' (`fcc0' to `fcc3' and `icc0'
+          to `icc3').
+
+    `d'
+          Register in the class `GPR_REGS' (`gr0' to `gr63').
+
+    `e'
+          Register in the class `EVEN_REGS' (`gr0' to `gr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `f'
+          Register in the class `FPR_REGS' (`fr0' to `fr63').
+
+    `h'
+          Register in the class `FEVEN_REGS' (`fr0' to `fr63').  Odd
+          registers are excluded not in the class but through the use
+          of a machine mode larger than 4 bytes.
+
+    `l'
+          Register in the class `LR_REG' (the `lr' register).
+
+    `q'
+          Register in the class `QUAD_REGS' (`gr2' to `gr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `t'
+          Register in the class `ICC_REGS' (`icc0' to `icc3').
+
+    `u'
+          Register in the class `FCC_REGS' (`fcc0' to `fcc3').
+
+    `v'
+          Register in the class `ICR_REGS' (`cc4' to `cc7').
+
+    `w'
+          Register in the class `FCR_REGS' (`cc0' to `cc3').
+
+    `x'
+          Register in the class `QUAD_FPR_REGS' (`fr0' to `fr63').
+          Register numbers not divisible by 4 are excluded not in the
+          class but through the use of a machine mode larger than 8
+          bytes.
+
+    `z'
+          Register in the class `SPR_REGS' (`lcr' and `lr').
+
+    `A'
+          Register in the class `QUAD_ACC_REGS' (`acc0' to `acc7').
+
+    `B'
+          Register in the class `ACCG_REGS' (`accg0' to `accg7').
+
+    `C'
+          Register in the class `CR_REGS' (`cc0' to `cc7').
+
+    `G'
+          Floating point constant zero
+
+    `I'
+          6-bit signed integer constant
+
+    `J'
+          10-bit signed integer constant
+
+    `L'
+          16-bit signed integer constant
+
+    `M'
+          16-bit unsigned integer constant
+
+    `N'
+          12-bit signed integer constant that is negative--i.e. in the
+          range of -2048 to -1
+
+    `O'
+          Constant zero
+
+    `P'
+          12-bit signed integer constant that is greater than
+          zero--i.e. in the range of 1 to 2047.
+
+
+_Blackfin family--`config/bfin/constraints.md'_
+
+    `a'
+          P register
+
+    `d'
+          D register
+
+    `z'
+          A call clobbered P register.
+
+    `qN'
+          A single register.  If N is in the range 0 to 7, the
+          corresponding D register.  If it is `A', then the register P0.
+
+    `D'
+          Even-numbered D register
+
+    `W'
+          Odd-numbered D register
+
+    `e'
+          Accumulator register.
+
+    `A'
+          Even-numbered accumulator register.
+
+    `B'
+          Odd-numbered accumulator register.
+
+    `b'
+          I register
+
+    `v'
+          B register
+
+    `f'
+          M register
+
+    `c'
+          Registers used for circular buffering, i.e. I, B, or L
+          registers.
+
+    `C'
+          The CC register.
+
+    `t'
+          LT0 or LT1.
+
+    `k'
+          LC0 or LC1.
+
+    `u'
+          LB0 or LB1.
+
+    `x'
+          Any D, P, B, M, I or L register.
+
+    `y'
+          Additional registers typically used only in prologues and
+          epilogues: RETS, RETN, RETI, RETX, RETE, ASTAT, SEQSTAT and
+          USP.
+
+    `w'
+          Any register except accumulators or CC.
+
+    `Ksh'
+          Signed 16 bit integer (in the range -32768 to 32767)
+
+    `Kuh'
+          Unsigned 16 bit integer (in the range 0 to 65535)
+
+    `Ks7'
+          Signed 7 bit integer (in the range -64 to 63)
+
+    `Ku7'
+          Unsigned 7 bit integer (in the range 0 to 127)
+
+    `Ku5'
+          Unsigned 5 bit integer (in the range 0 to 31)
+
+    `Ks4'
+          Signed 4 bit integer (in the range -8 to 7)
+
+    `Ks3'
+          Signed 3 bit integer (in the range -3 to 4)
+
+    `Ku3'
+          Unsigned 3 bit integer (in the range 0 to 7)
+
+    `PN'
+          Constant N, where N is a single-digit constant in the range 0
+          to 4.
+
+    `PA'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use with either accumulator.
+
+    `PB'
+          An integer equal to one of the MACFLAG_XXX constants that is
+          suitable for use only with accumulator A1.
+
+    `M1'
+          Constant 255.
+
+    `M2'
+          Constant 65535.
+
+    `J'
+          An integer constant with exactly a single bit set.
+
+    `L'
+          An integer constant with all bits set except exactly one.
+
+    `H'
+
+    `Q'
+          Any SYMBOL_REF.
+
+_M32C--`config/m32c/m32c.c'_
+
+    `Rsp'
+    `Rfb'
+    `Rsb'
+          `$sp', `$fb', `$sb'.
+
+    `Rcr'
+          Any control register, when they're 16 bits wide (nothing if
+          control registers are 24 bits wide)
+
+    `Rcl'
+          Any control register, when they're 24 bits wide.
+
+    `R0w'
+    `R1w'
+    `R2w'
+    `R3w'
+          $r0, $r1, $r2, $r3.
+
+    `R02'
+          $r0 or $r2, or $r2r0 for 32 bit values.
+
+    `R13'
+          $r1 or $r3, or $r3r1 for 32 bit values.
+
+    `Rdi'
+          A register that can hold a 64 bit value.
+
+    `Rhl'
+          $r0 or $r1 (registers with addressable high/low bytes)
+
+    `R23'
+          $r2 or $r3
+
+    `Raa'
+          Address registers
+
+    `Raw'
+          Address registers when they're 16 bits wide.
+
+    `Ral'
+          Address registers when they're 24 bits wide.
+
+    `Rqi'
+          Registers that can hold QI values.
+
+    `Rad'
+          Registers that can be used with displacements ($a0, $a1, $sb).
+
+    `Rsi'
+          Registers that can hold 32 bit values.
+
+    `Rhi'
+          Registers that can hold 16 bit values.
+
+    `Rhc'
+          Registers chat can hold 16 bit values, including all control
+          registers.
+
+    `Rra'
+          $r0 through R1, plus $a0 and $a1.
+
+    `Rfl'
+          The flags register.
+
+    `Rmm'
+          The memory-based pseudo-registers $mem0 through $mem15.
+
+    `Rpi'
+          Registers that can hold pointers (16 bit registers for r8c,
+          m16c; 24 bit registers for m32cm, m32c).
+
+    `Rpa'
+          Matches multiple registers in a PARALLEL to form a larger
+          register.  Used to match function return values.
+
+    `Is3'
+          -8 ... 7
+
+    `IS1'
+          -128 ... 127
+
+    `IS2'
+          -32768 ... 32767
+
+    `IU2'
+          0 ... 65535
+
+    `In4'
+          -8 ... -1 or 1 ... 8
+
+    `In5'
+          -16 ... -1 or 1 ... 16
+
+    `In6'
+          -32 ... -1 or 1 ... 32
+
+    `IM2'
+          -65536 ... -1
+
+    `Ilb'
+          An 8 bit value with exactly one bit set.
+
+    `Ilw'
+          A 16 bit value with exactly one bit set.
+
+    `Sd'
+          The common src/dest memory addressing modes.
+
+    `Sa'
+          Memory addressed using $a0 or $a1.
+
+    `Si'
+          Memory addressed with immediate addresses.
+
+    `Ss'
+          Memory addressed using the stack pointer ($sp).
+
+    `Sf'
+          Memory addressed using the frame base register ($fb).
+
+    `Ss'
+          Memory addressed using the small base register ($sb).
+
+    `S1'
+          $r1h
+
+_MeP--`config/mep/constraints.md'_
+
+    `a'
+          The $sp register.
+
+    `b'
+          The $tp register.
+
+    `c'
+          Any control register.
+
+    `d'
+          Either the $hi or the $lo register.
+
+    `em'
+          Coprocessor registers that can be directly loaded ($c0-$c15).
+
+    `ex'
+          Coprocessor registers that can be moved to each other.
+
+    `er'
+          Coprocessor registers that can be moved to core registers.
+
+    `h'
+          The $hi register.
+
+    `j'
+          The $rpc register.
+
+    `l'
+          The $lo register.
+
+    `t'
+          Registers which can be used in $tp-relative addressing.
+
+    `v'
+          The $gp register.
+
+    `x'
+          The coprocessor registers.
+
+    `y'
+          The coprocessor control registers.
+
+    `z'
+          The $0 register.
+
+    `A'
+          User-defined register set A.
+
+    `B'
+          User-defined register set B.
+
+    `C'
+          User-defined register set C.
+
+    `D'
+          User-defined register set D.
+
+    `I'
+          Offsets for $gp-rel addressing.
+
+    `J'
+          Constants that can be used directly with boolean insns.
+
+    `K'
+          Constants that can be moved directly to registers.
+
+    `L'
+          Small constants that can be added to registers.
+
+    `M'
+          Long shift counts.
+
+    `N'
+          Small constants that can be compared to registers.
+
+    `O'
+          Constants that can be loaded into the top half of registers.
+
+    `S'
+          Signed 8-bit immediates.
+
+    `T'
+          Symbols encoded for $tp-rel or $gp-rel addressing.
+
+    `U'
+          Non-constant addresses for loading/saving coprocessor
+          registers.
+
+    `W'
+          The top half of a symbol's value.
+
+    `Y'
+          A register indirect address without offset.
+
+    `Z'
+          Symbolic references to the control bus.
+
+
+_MIPS--`config/mips/constraints.md'_
+
+    `d'
+          An address register.  This is equivalent to `r' unless
+          generating MIPS16 code.
+
+    `f'
+          A floating-point register (if available).
+
+    `h'
+          Formerly the `hi' register.  This constraint is no longer
+          supported.
+
+    `l'
+          The `lo' register.  Use this register to store values that are
+          no bigger than a word.
+
+    `x'
+          The concatenated `hi' and `lo' registers.  Use this register
+          to store doubleword values.
+
+    `c'
+          A register suitable for use in an indirect jump.  This will
+          always be `$25' for `-mabicalls'.
+
+    `v'
+          Register `$3'.  Do not use this constraint in new code; it is
+          retained only for compatibility with glibc.
+
+    `y'
+          Equivalent to `r'; retained for backwards compatibility.
+
+    `z'
+          A floating-point condition code register.
+
+    `I'
+          A signed 16-bit constant (for arithmetic instructions).
+
+    `J'
+          Integer zero.
+
+    `K'
+          An unsigned 16-bit constant (for logic instructions).
+
+    `L'
+          A signed 32-bit constant in which the lower 16 bits are zero.
+          Such constants can be loaded using `lui'.
+
+    `M'
+          A constant that cannot be loaded using `lui', `addiu' or
+          `ori'.
+
+    `N'
+          A constant in the range -65535 to -1 (inclusive).
+
+    `O'
+          A signed 15-bit constant.
+
+    `P'
+          A constant in the range 1 to 65535 (inclusive).
+
+    `G'
+          Floating-point zero.
+
+    `R'
+          An address that can be used in a non-macro load or store.
+
+_Motorola 680x0--`config/m68k/constraints.md'_
+
+    `a'
+          Address register
+
+    `d'
+          Data register
+
+    `f'
+          68881 floating-point register, if available
+
+    `I'
+          Integer in the range 1 to 8
+
+    `J'
+          16-bit signed number
+
+    `K'
+          Signed number whose magnitude is greater than 0x80
+
+    `L'
+          Integer in the range -8 to -1
+
+    `M'
+          Signed number whose magnitude is greater than 0x100
+
+    `N'
+          Range 24 to 31, rotatert:SI 8 to 1 expressed as rotate
+
+    `O'
+          16 (for rotate using swap)
+
+    `P'
+          Range 8 to 15, rotatert:HI 8 to 1 expressed as rotate
+
+    `R'
+          Numbers that mov3q can handle
+
+    `G'
+          Floating point constant that is not a 68881 constant
+
+    `S'
+          Operands that satisfy 'm' when -mpcrel is in effect
+
+    `T'
+          Operands that satisfy 's' when -mpcrel is not in effect
+
+    `Q'
+          Address register indirect addressing mode
+
+    `U'
+          Register offset addressing
+
+    `W'
+          const_call_operand
+
+    `Cs'
+          symbol_ref or const
+
+    `Ci'
+          const_int
+
+    `C0'
+          const_int 0
+
+    `Cj'
+          Range of signed numbers that don't fit in 16 bits
+
+    `Cmvq'
+          Integers valid for mvq
+
+    `Capsw'
+          Integers valid for a moveq followed by a swap
+
+    `Cmvz'
+          Integers valid for mvz
+
+    `Cmvs'
+          Integers valid for mvs
+
+    `Ap'
+          push_operand
+
+    `Ac'
+          Non-register operands allowed in clr
+
+
+_Motorola 68HC11 & 68HC12 families--`config/m68hc11/m68hc11.h'_
+
+    `a'
+          Register `a'
+
+    `b'
+          Register `b'
+
+    `d'
+          Register `d'
+
+    `q'
+          An 8-bit register
+
+    `t'
+          Temporary soft register _.tmp
+
+    `u'
+          A soft register _.d1 to _.d31
+
+    `w'
+          Stack pointer register
+
+    `x'
+          Register `x'
+
+    `y'
+          Register `y'
+
+    `z'
+          Pseudo register `z' (replaced by `x' or `y' at the end)
+
+    `A'
+          An address register: x, y or z
+
+    `B'
+          An address register: x or y
+
+    `D'
+          Register pair (x:d) to form a 32-bit value
+
+    `L'
+          Constants in the range -65536 to 65535
+
+    `M'
+          Constants whose 16-bit low part is zero
+
+    `N'
+          Constant integer 1 or -1
+
+    `O'
+          Constant integer 16
+
+    `P'
+          Constants in the range -8 to 2
+
+
+_Moxie--`config/moxie/constraints.md'_
+
+    `A'
+          An absolute address
+
+    `B'
+          An offset address
+
+    `W'
+          A register indirect memory operand
+
+    `I'
+          A constant in the range of 0 to 255.
+
+    `N'
+          A constant in the range of 0 to -255.
+
+
+_RX--`config/rx/constraints.md'_
+
+    `Q'
+          An address which does not involve register indirect
+          addressing or pre/post increment/decrement addressing.
+
+    `Symbol'
+          A symbol reference.
+
+    `Int08'
+          A constant in the range -256 to 255, inclusive.
+
+    `Sint08'
+          A constant in the range -128 to 127, inclusive.
+
+    `Sint16'
+          A constant in the range -32768 to 32767, inclusive.
+
+    `Sint24'
+          A constant in the range -8388608 to 8388607, inclusive.
+
+    `Uint04'
+          A constant in the range 0 to 15, inclusive.
+
+
+_SPARC--`config/sparc/sparc.h'_
+
+    `f'
+          Floating-point register on the SPARC-V8 architecture and
+          lower floating-point register on the SPARC-V9 architecture.
+
+    `e'
+          Floating-point register.  It is equivalent to `f' on the
+          SPARC-V8 architecture and contains both lower and upper
+          floating-point registers on the SPARC-V9 architecture.
+
+    `c'
+          Floating-point condition code register.
+
+    `d'
+          Lower floating-point register.  It is only valid on the
+          SPARC-V9 architecture when the Visual Instruction Set is
+          available.
+
+    `b'
+          Floating-point register.  It is only valid on the SPARC-V9
+          architecture when the Visual Instruction Set is available.
+
+    `h'
+          64-bit global or out register for the SPARC-V8+ architecture.
+
+    `D'
+          A vector constant
+
+    `I'
+          Signed 13-bit constant
+
+    `J'
+          Zero
+
+    `K'
+          32-bit constant with the low 12 bits clear (a constant that
+          can be loaded with the `sethi' instruction)
+
+    `L'
+          A constant in the range supported by `movcc' instructions
+
+    `M'
+          A constant in the range supported by `movrcc' instructions
+
+    `N'
+          Same as `K', except that it verifies that bits that are not
+          in the lower 32-bit range are all zero.  Must be used instead
+          of `K' for modes wider than `SImode'
+
+    `O'
+          The constant 4096
+
+    `G'
+          Floating-point zero
+
+    `H'
+          Signed 13-bit constant, sign-extended to 32 or 64 bits
+
+    `Q'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single sethi
+          instruction
+
+    `R'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a single mov instruction
+
+    `S'
+          Floating-point constant whose integral representation can be
+          moved into an integer register using a high/lo_sum
+          instruction sequence
+
+    `T'
+          Memory address aligned to an 8-byte boundary
+
+    `U'
+          Even register
+
+    `W'
+          Memory address for `e' constraint registers
+
+    `Y'
+          Vector zero
+
+
+_SPU--`config/spu/spu.h'_
+
+    `a'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 64 bit value.
+
+    `c'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 64 bit value.
+
+    `d'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 64 bit value.
+
+    `f'
+          An immediate which can be loaded with `fsmbi'.
+
+    `A'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is treated as a 32 bit value.
+
+    `B'
+          An immediate for most arithmetic instructions.  const_int is
+          treated as a 32 bit value.
+
+    `C'
+          An immediate for and/xor/or instructions.  const_int is
+          treated as a 32 bit value.
+
+    `D'
+          An immediate for the `iohl' instruction.  const_int is
+          treated as a 32 bit value.
+
+    `I'
+          A constant in the range [-64, 63] for shift/rotate
+          instructions.
+
+    `J'
+          An unsigned 7-bit constant for conversion/nop/channel
+          instructions.
+
+    `K'
+          A signed 10-bit constant for most arithmetic instructions.
+
+    `M'
+          A signed 16 bit immediate for `stop'.
+
+    `N'
+          An unsigned 16-bit constant for `iohl' and `fsmbi'.
+
+    `O'
+          An unsigned 7-bit constant whose 3 least significant bits are
+          0.
+
+    `P'
+          An unsigned 3-bit constant for 16-byte rotates and shifts
+
+    `R'
+          Call operand, reg, for indirect calls
+
+    `S'
+          Call operand, symbol, for relative calls.
+
+    `T'
+          Call operand, const_int, for absolute calls.
+
+    `U'
+          An immediate which can be loaded with the il/ila/ilh/ilhu
+          instructions.  const_int is sign extended to 128 bit.
+
+    `W'
+          An immediate for shift and rotate instructions.  const_int is
+          treated as a 32 bit value.
+
+    `Y'
+          An immediate for and/xor/or instructions.  const_int is sign
+          extended as a 128 bit.
+
+    `Z'
+          An immediate for the `iohl' instruction.  const_int is sign
+          extended to 128 bit.
+
+
+_S/390 and zSeries--`config/s390/s390.h'_
+
+    `a'
+          Address register (general purpose register except r0)
+
+    `c'
+          Condition code register
+
+    `d'
+          Data register (arbitrary general purpose register)
+
+    `f'
+          Floating-point register
+
+    `I'
+          Unsigned 8-bit constant (0-255)
+
+    `J'
+          Unsigned 12-bit constant (0-4095)
+
+    `K'
+          Signed 16-bit constant (-32768-32767)
+
+    `L'
+          Value appropriate as displacement.
+         `(0..4095)'
+               for short displacement
+
+         `(-524288..524287)'
+               for long displacement
+
+    `M'
+          Constant integer with a value of 0x7fffffff.
+
+    `N'
+          Multiple letter constraint followed by 4 parameter letters.
+         `0..9:'
+               number of the part counting from most to least
+               significant
+
+         `H,Q:'
+               mode of the part
+
+         `D,S,H:'
+               mode of the containing operand
+
+         `0,F:'
+               value of the other parts (F--all bits set)
+          The constraint matches if the specified part of a constant
+          has a value different from its other parts.
+
+    `Q'
+          Memory reference without index register and with short
+          displacement.
+
+    `R'
+          Memory reference with index register and short displacement.
+
+    `S'
+          Memory reference without index register but with long
+          displacement.
+
+    `T'
+          Memory reference with index register and long displacement.
+
+    `U'
+          Pointer with short displacement.
+
+    `W'
+          Pointer with long displacement.
+
+    `Y'
+          Shift count operand.
+
+
+_Score family--`config/score/score.h'_
+
+    `d'
+          Registers from r0 to r32.
+
+    `e'
+          Registers from r0 to r16.
+
+    `t'
+          r8--r11 or r22--r27 registers.
+
+    `h'
+          hi register.
+
+    `l'
+          lo register.
+
+    `x'
+          hi + lo register.
+
+    `q'
+          cnt register.
+
+    `y'
+          lcb register.
+
+    `z'
+          scb register.
+
+    `a'
+          cnt + lcb + scb register.
+
+    `c'
+          cr0--cr15 register.
+
+    `b'
+          cp1 registers.
+
+    `f'
+          cp2 registers.
+
+    `i'
+          cp3 registers.
+
+    `j'
+          cp1 + cp2 + cp3 registers.
+
+    `I'
+          High 16-bit constant (32-bit constant with 16 LSBs zero).
+
+    `J'
+          Unsigned 5 bit integer (in the range 0 to 31).
+
+    `K'
+          Unsigned 16 bit integer (in the range 0 to 65535).
+
+    `L'
+          Signed 16 bit integer (in the range -32768 to 32767).
+
+    `M'
+          Unsigned 14 bit integer (in the range 0 to 16383).
+
+    `N'
+          Signed 14 bit integer (in the range -8192 to 8191).
+
+    `Z'
+          Any SYMBOL_REF.
+
+_Xstormy16--`config/stormy16/stormy16.h'_
+
+    `a'
+          Register r0.
+
+    `b'
+          Register r1.
+
+    `c'
+          Register r2.
+
+    `d'
+          Register r8.
+
+    `e'
+          Registers r0 through r7.
+
+    `t'
+          Registers r0 and r1.
+
+    `y'
+          The carry register.
+
+    `z'
+          Registers r8 and r9.
+
+    `I'
+          A constant between 0 and 3 inclusive.
+
+    `J'
+          A constant that has exactly one bit set.
+
+    `K'
+          A constant that has exactly one bit clear.
+
+    `L'
+          A constant between 0 and 255 inclusive.
+
+    `M'
+          A constant between -255 and 0 inclusive.
+
+    `N'
+          A constant between -3 and 0 inclusive.
+
+    `O'
+          A constant between 1 and 4 inclusive.
+
+    `P'
+          A constant between -4 and -1 inclusive.
+
+    `Q'
+          A memory reference that is a stack push.
+
+    `R'
+          A memory reference that is a stack pop.
+
+    `S'
+          A memory reference that refers to a constant address of known
+          value.
+
+    `T'
+          The register indicated by Rx (not implemented yet).
+
+    `U'
+          A constant that is not between 2 and 15 inclusive.
+
+    `Z'
+          The constant 0.
+
+
+_Xtensa--`config/xtensa/constraints.md'_
+
+    `a'
+          General-purpose 32-bit register
+
+    `b'
+          One-bit boolean register
+
+    `A'
+          MAC16 40-bit accumulator register
+
+    `I'
+          Signed 12-bit integer constant, for use in MOVI instructions
+
+    `J'
+          Signed 8-bit integer constant, for use in ADDI instructions
+
+    `K'
+          Integer constant valid for BccI instructions
+
+    `L'
+          Unsigned constant valid for BccUI instructions
+
+
+
+
+File: gccint.info,  Node: Disable Insn Alternatives,  Next: Machine Constraints,  Prev: Modifiers,  Up: Constraints
+
+16.8.6 Disable insn alternatives using the `enabled' attribute
+--------------------------------------------------------------
+
+The `enabled' insn attribute may be used to disable certain insn
+alternatives for machine-specific reasons.  This is useful when adding
+new instructions to an existing pattern which are only available for
+certain cpu architecture levels as specified with the `-march=' option.
+
+ If an insn alternative is disabled, then it will never be used.  The
+compiler treats the constraints for the disabled alternative as
+unsatisfiable.
+
+ In order to make use of the `enabled' attribute a back end has to add
+in the machine description files:
+
+  1. A definition of the `enabled' insn attribute.  The attribute is
+     defined as usual using the `define_attr' command.  This definition
+     should be based on other insn attributes and/or target flags.  The
+     `enabled' attribute is a numeric attribute and should evaluate to
+     `(const_int 1)' for an enabled alternative and to `(const_int 0)'
+     otherwise.
+
+  2. A definition of another insn attribute used to describe for what
+     reason an insn alternative might be available or not.  E.g.
+     `cpu_facility' as in the example below.
+
+  3. An assignment for the second attribute to each insn definition
+     combining instructions which are not all available under the same
+     circumstances.  (Note: It obviously only makes sense for
+     definitions with more than one alternative.  Otherwise the insn
+     pattern should be disabled or enabled using the insn condition.)
+
+ E.g. the following two patterns could easily be merged using the
+`enabled' attribute:
+
+
+     (define_insn "*movdi_old"
+       [(set (match_operand:DI 0 "register_operand" "=d")
+             (match_operand:DI 1 "register_operand" " d"))]
+       "!TARGET_NEW"
+       "lgr %0,%1")
+
+     (define_insn "*movdi_new"
+       [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+             (match_operand:DI 1 "register_operand" " d,d,f"))]
+       "TARGET_NEW"
+       "@
+        lgr  %0,%1
+        ldgr %0,%1
+        lgdr %0,%1")
+
+ to:
+
+
+     (define_insn "*movdi_combined"
+       [(set (match_operand:DI 0 "register_operand" "=d,f,d")
+             (match_operand:DI 1 "register_operand" " d,d,f"))]
+       ""
+       "@
+        lgr  %0,%1
+        ldgr %0,%1
+        lgdr %0,%1"
+       [(set_attr "cpu_facility" "*,new,new")])
+
+ with the `enabled' attribute defined like this:
+
+
+     (define_attr "cpu_facility" "standard,new" (const_string "standard"))
+
+     (define_attr "enabled" ""
+       (cond [(eq_attr "cpu_facility" "standard") (const_int 1)
+              (and (eq_attr "cpu_facility" "new")
+                   (ne (symbol_ref "TARGET_NEW") (const_int 0)))
+              (const_int 1)]
+             (const_int 0)))
+
+
+File: gccint.info,  Node: Define Constraints,  Next: C Constraint Interface,  Prev: Machine Constraints,  Up: Constraints
+
+16.8.7 Defining Machine-Specific Constraints
+--------------------------------------------
+
+Machine-specific constraints fall into two categories: register and
+non-register constraints.  Within the latter category, constraints
+which allow subsets of all possible memory or address operands should
+be specially marked, to give `reload' more information.
+
+ Machine-specific constraints can be given names of arbitrary length,
+but they must be entirely composed of letters, digits, underscores
+(`_'), and angle brackets (`< >').  Like C identifiers, they must begin
+with a letter or underscore.
+
+ In order to avoid ambiguity in operand constraint strings, no
+constraint can have a name that begins with any other constraint's
+name.  For example, if `x' is defined as a constraint name, `xy' may
+not be, and vice versa.  As a consequence of this rule, no constraint
+may begin with one of the generic constraint letters: `E F V X g i m n
+o p r s'.
+
+ Register constraints correspond directly to register classes.  *Note
+Register Classes::.  There is thus not much flexibility in their
+definitions.
+
+ -- MD Expression: define_register_constraint name regclass docstring
+     All three arguments are string constants.  NAME is the name of the
+     constraint, as it will appear in `match_operand' expressions.  If
+     NAME is a multi-letter constraint its length shall be the same for
+     all constraints starting with the same letter.  REGCLASS can be
+     either the name of the corresponding register class (*note
+     Register Classes::), or a C expression which evaluates to the
+     appropriate register class.  If it is an expression, it must have
+     no side effects, and it cannot look at the operand.  The usual use
+     of expressions is to map some register constraints to `NO_REGS'
+     when the register class is not available on a given
+     subarchitecture.
+
+     DOCSTRING is a sentence documenting the meaning of the constraint.
+     Docstrings are explained further below.
+
+ Non-register constraints are more like predicates: the constraint
+definition gives a Boolean expression which indicates whether the
+constraint matches.
+
+ -- MD Expression: define_constraint name docstring exp
+     The NAME and DOCSTRING arguments are the same as for
+     `define_register_constraint', but note that the docstring comes
+     immediately after the name for these expressions.  EXP is an RTL
+     expression, obeying the same rules as the RTL expressions in
+     predicate definitions.  *Note Defining Predicates::, for details.
+     If it evaluates true, the constraint matches; if it evaluates
+     false, it doesn't. Constraint expressions should indicate which
+     RTL codes they might match, just like predicate expressions.
+
+     `match_test' C expressions have access to the following variables:
+
+    OP
+          The RTL object defining the operand.
+
+    MODE
+          The machine mode of OP.
+
+    IVAL
+          `INTVAL (OP)', if OP is a `const_int'.
+
+    HVAL
+          `CONST_DOUBLE_HIGH (OP)', if OP is an integer `const_double'.
+
+    LVAL
+          `CONST_DOUBLE_LOW (OP)', if OP is an integer `const_double'.
+
+    RVAL
+          `CONST_DOUBLE_REAL_VALUE (OP)', if OP is a floating-point
+          `const_double'.
+
+     The *VAL variables should only be used once another piece of the
+     expression has verified that OP is the appropriate kind of RTL
+     object.
+
+ Most non-register constraints should be defined with
+`define_constraint'.  The remaining two definition expressions are only
+appropriate for constraints that should be handled specially by
+`reload' if they fail to match.
+
+ -- MD Expression: define_memory_constraint name docstring exp
+     Use this expression for constraints that match a subset of all
+     memory operands: that is, `reload' can make them match by
+     converting the operand to the form `(mem (reg X))', where X is a
+     base register (from the register class specified by
+     `BASE_REG_CLASS', *note Register Classes::).
+
+     For example, on the S/390, some instructions do not accept
+     arbitrary memory references, but only those that do not make use
+     of an index register.  The constraint letter `Q' is defined to
+     represent a memory address of this type.  If `Q' is defined with
+     `define_memory_constraint', a `Q' constraint can handle any memory
+     operand, because `reload' knows it can simply copy the memory
+     address into a base register if required.  This is analogous to
+     the way an `o' constraint can handle any memory operand.
+
+     The syntax and semantics are otherwise identical to
+     `define_constraint'.
+
+ -- MD Expression: define_address_constraint name docstring exp
+     Use this expression for constraints that match a subset of all
+     address operands: that is, `reload' can make the constraint match
+     by converting the operand to the form `(reg X)', again with X a
+     base register.
+
+     Constraints defined with `define_address_constraint' can only be
+     used with the `address_operand' predicate, or machine-specific
+     predicates that work the same way.  They are treated analogously to
+     the generic `p' constraint.
+
+     The syntax and semantics are otherwise identical to
+     `define_constraint'.
+
+ For historical reasons, names beginning with the letters `G H' are
+reserved for constraints that match only `const_double's, and names
+beginning with the letters `I J K L M N O P' are reserved for
+constraints that match only `const_int's.  This may change in the
+future.  For the time being, constraints with these names must be
+written in a stylized form, so that `genpreds' can tell you did it
+correctly:
+
+     (define_constraint "[GHIJKLMNOP]..."
+       "DOC..."
+       (and (match_code "const_int")  ; `const_double' for G/H
+            CONDITION...))            ; usually a `match_test'
+
+ It is fine to use names beginning with other letters for constraints
+that match `const_double's or `const_int's.
+
+ Each docstring in a constraint definition should be one or more
+complete sentences, marked up in Texinfo format.  _They are currently
+unused._ In the future they will be copied into the GCC manual, in
+*note Machine Constraints::, replacing the hand-maintained tables
+currently found in that section.  Also, in the future the compiler may
+use this to give more helpful diagnostics when poor choice of `asm'
+constraints causes a reload failure.
+
+ If you put the pseudo-Texinfo directive `@internal' at the beginning
+of a docstring, then (in the future) it will appear only in the
+internals manual's version of the machine-specific constraint tables.
+Use this for constraints that should not appear in `asm' statements.
+
+
+File: gccint.info,  Node: C Constraint Interface,  Prev: Define Constraints,  Up: Constraints
+
+16.8.8 Testing constraints from C
+---------------------------------
+
+It is occasionally useful to test a constraint from C code rather than
+implicitly via the constraint string in a `match_operand'.  The
+generated file `tm_p.h' declares a few interfaces for working with
+machine-specific constraints.  None of these interfaces work with the
+generic constraints described in *note Simple Constraints::.  This may
+change in the future.
+
+ *Warning:* `tm_p.h' may declare other functions that operate on
+constraints, besides the ones documented here.  Do not use those
+functions from machine-dependent code.  They exist to implement the old
+constraint interface that machine-independent components of the
+compiler still expect.  They will change or disappear in the future.
+
+ Some valid constraint names are not valid C identifiers, so there is a
+mangling scheme for referring to them from C.  Constraint names that do
+not contain angle brackets or underscores are left unchanged.
+Underscores are doubled, each `<' is replaced with `_l', and each `>'
+with `_g'.  Here are some examples:
+
+     *Original* *Mangled*
+     `x'        `x'
+     `P42x'     `P42x'
+     `P4_x'     `P4__x'
+     `P4>x'     `P4_gx'
+     `P4>>'     `P4_g_g'
+     `P4_g>'    `P4__g_g'
+
+ Throughout this section, the variable C is either a constraint in the
+abstract sense, or a constant from `enum constraint_num'; the variable
+M is a mangled constraint name (usually as part of a larger identifier).
+
+ -- Enum: constraint_num
+     For each machine-specific constraint, there is a corresponding
+     enumeration constant: `CONSTRAINT_' plus the mangled name of the
+     constraint.  Functions that take an `enum constraint_num' as an
+     argument expect one of these constants.
+
+     Machine-independent constraints do not have associated constants.
+     This may change in the future.
+
+ -- Function: inline bool satisfies_constraint_M (rtx EXP)
+     For each machine-specific, non-register constraint M, there is one
+     of these functions; it returns `true' if EXP satisfies the
+     constraint.  These functions are only visible if `rtl.h' was
+     included before `tm_p.h'.
+
+ -- Function: bool constraint_satisfied_p (rtx EXP, enum constraint_num
+          C)
+     Like the `satisfies_constraint_M' functions, but the constraint to
+     test is given as an argument, C.  If C specifies a register
+     constraint, this function will always return `false'.
+
+ -- Function: enum reg_class regclass_for_constraint (enum
+          constraint_num C)
+     Returns the register class associated with C.  If C is not a
+     register constraint, or those registers are not available for the
+     currently selected subtarget, returns `NO_REGS'.
+
+ Here is an example use of `satisfies_constraint_M'.  In peephole
+optimizations (*note Peephole Definitions::), operand constraint
+strings are ignored, so if there are relevant constraints, they must be
+tested in the C condition.  In the example, the optimization is applied
+if operand 2 does _not_ satisfy the `K' constraint.  (This is a
+simplified version of a peephole definition from the i386 machine
+description.)
+
+     (define_peephole2
+       [(match_scratch:SI 3 "r")
+        (set (match_operand:SI 0 "register_operand" "")
+             (mult:SI (match_operand:SI 1 "memory_operand" "")
+                      (match_operand:SI 2 "immediate_operand" "")))]
+
+       "!satisfies_constraint_K (operands[2])"
+
+       [(set (match_dup 3) (match_dup 1))
+        (set (match_dup 0) (mult:SI (match_dup 3) (match_dup 2)))]
+
+       "")
+
+
+File: gccint.info,  Node: Standard Names,  Next: Pattern Ordering,  Prev: Constraints,  Up: Machine Desc
+
+16.9 Standard Pattern Names For Generation
+==========================================
+
+Here is a table of the instruction names that are meaningful in the RTL
+generation pass of the compiler.  Giving one of these names to an
+instruction pattern tells the RTL generation pass that it can use the
+pattern to accomplish a certain task.
+
+`movM'
+     Here M stands for a two-letter machine mode name, in lowercase.
+     This instruction pattern moves data with that machine mode from
+     operand 1 to operand 0.  For example, `movsi' moves full-word data.
+
+     If operand 0 is a `subreg' with mode M of a register whose own
+     mode is wider than M, the effect of this instruction is to store
+     the specified value in the part of the register that corresponds
+     to mode M.  Bits outside of M, but which are within the same
+     target word as the `subreg' are undefined.  Bits which are outside
+     the target word are left unchanged.
+
+     This class of patterns is special in several ways.  First of all,
+     each of these names up to and including full word size _must_ be
+     defined, because there is no other way to copy a datum from one
+     place to another.  If there are patterns accepting operands in
+     larger modes, `movM' must be defined for integer modes of those
+     sizes.
+
+     Second, these patterns are not used solely in the RTL generation
+     pass.  Even the reload pass can generate move insns to copy values
+     from stack slots into temporary registers.  When it does so, one
+     of the operands is a hard register and the other is an operand
+     that can need to be reloaded into a register.
+
+     Therefore, when given such a pair of operands, the pattern must
+     generate RTL which needs no reloading and needs no temporary
+     registers--no registers other than the operands.  For example, if
+     you support the pattern with a `define_expand', then in such a
+     case the `define_expand' mustn't call `force_reg' or any other such
+     function which might generate new pseudo registers.
+
+     This requirement exists even for subword modes on a RISC machine
+     where fetching those modes from memory normally requires several
+     insns and some temporary registers.
+
+     During reload a memory reference with an invalid address may be
+     passed as an operand.  Such an address will be replaced with a
+     valid address later in the reload pass.  In this case, nothing may
+     be done with the address except to use it as it stands.  If it is
+     copied, it will not be replaced with a valid address.  No attempt
+     should be made to make such an address into a valid address and no
+     routine (such as `change_address') that will do so may be called.
+     Note that `general_operand' will fail when applied to such an
+     address.
+
+     The global variable `reload_in_progress' (which must be explicitly
+     declared if required) can be used to determine whether such special
+     handling is required.
+
+     The variety of operands that have reloads depends on the rest of
+     the machine description, but typically on a RISC machine these can
+     only be pseudo registers that did not get hard registers, while on
+     other machines explicit memory references will get optional
+     reloads.
+
+     If a scratch register is required to move an object to or from
+     memory, it can be allocated using `gen_reg_rtx' prior to life
+     analysis.
+
+     If there are cases which need scratch registers during or after
+     reload, you must provide an appropriate secondary_reload target
+     hook.
+
+     The macro `can_create_pseudo_p' can be used to determine if it is
+     unsafe to create new pseudo registers.  If this variable is
+     nonzero, then it is unsafe to call `gen_reg_rtx' to allocate a new
+     pseudo.
+
+     The constraints on a `movM' must permit moving any hard register
+     to any other hard register provided that `HARD_REGNO_MODE_OK'
+     permits mode M in both registers and `REGISTER_MOVE_COST' applied
+     to their classes returns a value of 2.
+
+     It is obligatory to support floating point `movM' instructions
+     into and out of any registers that can hold fixed point values,
+     because unions and structures (which have modes `SImode' or
+     `DImode') can be in those registers and they may have floating
+     point members.
+
+     There may also be a need to support fixed point `movM'
+     instructions in and out of floating point registers.
+     Unfortunately, I have forgotten why this was so, and I don't know
+     whether it is still true.  If `HARD_REGNO_MODE_OK' rejects fixed
+     point values in floating point registers, then the constraints of
+     the fixed point `movM' instructions must be designed to avoid ever
+     trying to reload into a floating point register.
+
+`reload_inM'
+`reload_outM'
+     These named patterns have been obsoleted by the target hook
+     `secondary_reload'.
+
+     Like `movM', but used when a scratch register is required to move
+     between operand 0 and operand 1.  Operand 2 describes the scratch
+     register.  See the discussion of the `SECONDARY_RELOAD_CLASS'
+     macro in *note Register Classes::.
+
+     There are special restrictions on the form of the `match_operand's
+     used in these patterns.  First, only the predicate for the reload
+     operand is examined, i.e., `reload_in' examines operand 1, but not
+     the predicates for operand 0 or 2.  Second, there may be only one
+     alternative in the constraints.  Third, only a single register
+     class letter may be used for the constraint; subsequent constraint
+     letters are ignored.  As a special exception, an empty constraint
+     string matches the `ALL_REGS' register class.  This may relieve
+     ports of the burden of defining an `ALL_REGS' constraint letter
+     just for these patterns.
+
+`movstrictM'
+     Like `movM' except that if operand 0 is a `subreg' with mode M of
+     a register whose natural mode is wider, the `movstrictM'
+     instruction is guaranteed not to alter any of the register except
+     the part which belongs to mode M.
+
+`movmisalignM'
+     This variant of a move pattern is designed to load or store a value
+     from a memory address that is not naturally aligned for its mode.
+     For a store, the memory will be in operand 0; for a load, the
+     memory will be in operand 1.  The other operand is guaranteed not
+     to be a memory, so that it's easy to tell whether this is a load
+     or store.
+
+     This pattern is used by the autovectorizer, and when expanding a
+     `MISALIGNED_INDIRECT_REF' expression.
+
+`load_multiple'
+     Load several consecutive memory locations into consecutive
+     registers.  Operand 0 is the first of the consecutive registers,
+     operand 1 is the first memory location, and operand 2 is a
+     constant: the number of consecutive registers.
+
+     Define this only if the target machine really has such an
+     instruction; do not define this if the most efficient way of
+     loading consecutive registers from memory is to do them one at a
+     time.
+
+     On some machines, there are restrictions as to which consecutive
+     registers can be stored into memory, such as particular starting or
+     ending register numbers or only a range of valid counts.  For those
+     machines, use a `define_expand' (*note Expander Definitions::) and
+     make the pattern fail if the restrictions are not met.
+
+     Write the generated insn as a `parallel' with elements being a
+     `set' of one register from the appropriate memory location (you may
+     also need `use' or `clobber' elements).  Use a `match_parallel'
+     (*note RTL Template::) to recognize the insn.  See `rs6000.md' for
+     examples of the use of this insn pattern.
+
+`store_multiple'
+     Similar to `load_multiple', but store several consecutive registers
+     into consecutive memory locations.  Operand 0 is the first of the
+     consecutive memory locations, operand 1 is the first register, and
+     operand 2 is a constant: the number of consecutive registers.
+
+`vec_setM'
+     Set given field in the vector value.  Operand 0 is the vector to
+     modify, operand 1 is new value of field and operand 2 specify the
+     field index.
+
+`vec_extractM'
+     Extract given field from the vector value.  Operand 1 is the
+     vector, operand 2 specify field index and operand 0 place to store
+     value into.
+
+`vec_extract_evenM'
+     Extract even elements from the input vectors (operand 1 and
+     operand 2).  The even elements of operand 2 are concatenated to
+     the even elements of operand 1 in their original order. The result
+     is stored in operand 0.  The output and input vectors should have
+     the same modes.
+
+`vec_extract_oddM'
+     Extract odd elements from the input vectors (operand 1 and operand
+     2).  The odd elements of operand 2 are concatenated to the odd
+     elements of operand 1 in their original order. The result is
+     stored in operand 0.  The output and input vectors should have the
+     same modes.
+
+`vec_interleave_highM'
+     Merge high elements of the two input vectors into the output
+     vector. The output and input vectors should have the same modes
+     (`N' elements). The high `N/2' elements of the first input vector
+     are interleaved with the high `N/2' elements of the second input
+     vector.
+
+`vec_interleave_lowM'
+     Merge low elements of the two input vectors into the output
+     vector. The output and input vectors should have the same modes
+     (`N' elements). The low `N/2' elements of the first input vector
+     are interleaved with the low `N/2' elements of the second input
+     vector.
+
+`vec_initM'
+     Initialize the vector to given values.  Operand 0 is the vector to
+     initialize and operand 1 is parallel containing values for
+     individual fields.
+
+`pushM1'
+     Output a push instruction.  Operand 0 is value to push.  Used only
+     when `PUSH_ROUNDING' is defined.  For historical reason, this
+     pattern may be missing and in such case an `mov' expander is used
+     instead, with a `MEM' expression forming the push operation.  The
+     `mov' expander method is deprecated.
+
+`addM3'
+     Add operand 2 and operand 1, storing the result in operand 0.  All
+     operands must have mode M.  This can be used even on two-address
+     machines, by means of constraints requiring operands 1 and 0 to be
+     the same location.
+
+`ssaddM3', `usaddM3'
+
+`subM3', `sssubM3', `ussubM3'
+
+`mulM3', `ssmulM3', `usmulM3'
+`divM3', `ssdivM3'
+`udivM3', `usdivM3'
+`modM3', `umodM3'
+`uminM3', `umaxM3'
+`andM3', `iorM3', `xorM3'
+     Similar, for other arithmetic operations.
+
+`sminM3', `smaxM3'
+     Signed minimum and maximum operations.  When used with floating
+     point, if both operands are zeros, or if either operand is `NaN',
+     then it is unspecified which of the two operands is returned as
+     the result.
+
+`reduc_smin_M', `reduc_smax_M'
+     Find the signed minimum/maximum of the elements of a vector. The
+     vector is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_umin_M', `reduc_umax_M'
+     Find the unsigned minimum/maximum of the elements of a vector. The
+     vector is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_splus_M'
+     Compute the sum of the signed elements of a vector. The vector is
+     operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`reduc_uplus_M'
+     Compute the sum of the unsigned elements of a vector. The vector
+     is operand 1, and the scalar result is stored in the least
+     significant bits of operand 0 (also a vector). The output and
+     input vector should have the same modes.
+
+`sdot_prodM'
+
+`udot_prodM'
+     Compute the sum of the products of two signed/unsigned elements.
+     Operand 1 and operand 2 are of the same mode. Their product, which
+     is of a wider mode, is computed and added to operand 3. Operand 3
+     is of a mode equal or wider than the mode of the product. The
+     result is placed in operand 0, which is of the same mode as
+     operand 3.
+
+`ssum_widenM3'
+
+`usum_widenM3'
+     Operands 0 and 2 are of the same mode, which is wider than the
+     mode of operand 1. Add operand 1 to operand 2 and place the
+     widened result in operand 0. (This is used express accumulation of
+     elements into an accumulator of a wider mode.)
+
+`vec_shl_M', `vec_shr_M'
+     Whole vector left/right shift in bits.  Operand 1 is a vector to
+     be shifted.  Operand 2 is an integer shift amount in bits.
+     Operand 0 is where the resulting shifted vector is stored.  The
+     output and input vectors should have the same modes.
+
+`vec_pack_trunc_M'
+     Narrow (demote) and merge the elements of two vectors. Operands 1
+     and 2 are vectors of the same mode having N integral or floating
+     point elements of size S.  Operand 0 is the resulting vector in
+     which 2*N elements of size N/2 are concatenated after narrowing
+     them down using truncation.
+
+`vec_pack_ssat_M', `vec_pack_usat_M'
+     Narrow (demote) and merge the elements of two vectors.  Operands 1
+     and 2 are vectors of the same mode having N integral elements of
+     size S.  Operand 0 is the resulting vector in which the elements
+     of the two input vectors are concatenated after narrowing them
+     down using signed/unsigned saturating arithmetic.
+
+`vec_pack_sfix_trunc_M', `vec_pack_ufix_trunc_M'
+     Narrow, convert to signed/unsigned integral type and merge the
+     elements of two vectors.  Operands 1 and 2 are vectors of the same
+     mode having N floating point elements of size S.  Operand 0 is the
+     resulting vector in which 2*N elements of size N/2 are
+     concatenated.
+
+`vec_unpacks_hi_M', `vec_unpacks_lo_M'
+     Extract and widen (promote) the high/low part of a vector of signed
+     integral or floating point elements.  The input vector (operand 1)
+     has N elements of size S.  Widen (promote) the high/low elements
+     of the vector using signed or floating point extension and place
+     the resulting N/2 values of size 2*S in the output vector (operand
+     0).
+
+`vec_unpacku_hi_M', `vec_unpacku_lo_M'
+     Extract and widen (promote) the high/low part of a vector of
+     unsigned integral elements.  The input vector (operand 1) has N
+     elements of size S.  Widen (promote) the high/low elements of the
+     vector using zero extension and place the resulting N/2 values of
+     size 2*S in the output vector (operand 0).
+
+`vec_unpacks_float_hi_M', `vec_unpacks_float_lo_M'
+`vec_unpacku_float_hi_M', `vec_unpacku_float_lo_M'
+     Extract, convert to floating point type and widen the high/low
+     part of a vector of signed/unsigned integral elements.  The input
+     vector (operand 1) has N elements of size S.  Convert the high/low
+     elements of the vector using floating point conversion and place
+     the resulting N/2 values of size 2*S in the output vector (operand
+     0).
+
+`vec_widen_umult_hi_M', `vec_widen_umult_lo_M'
+`vec_widen_smult_hi_M', `vec_widen_smult_lo_M'
+     Signed/Unsigned widening multiplication.  The two inputs (operands
+     1 and 2) are vectors with N signed/unsigned elements of size S.
+     Multiply the high/low elements of the two vectors, and put the N/2
+     products of size 2*S in the output vector (operand 0).
+
+`mulhisi3'
+     Multiply operands 1 and 2, which have mode `HImode', and store a
+     `SImode' product in operand 0.
+
+`mulqihi3', `mulsidi3'
+     Similar widening-multiplication instructions of other widths.
+
+`umulqihi3', `umulhisi3', `umulsidi3'
+     Similar widening-multiplication instructions that do unsigned
+     multiplication.
+
+`usmulqihi3', `usmulhisi3', `usmulsidi3'
+     Similar widening-multiplication instructions that interpret the
+     first operand as unsigned and the second operand as signed, then
+     do a signed multiplication.
+
+`smulM3_highpart'
+     Perform a signed multiplication of operands 1 and 2, which have
+     mode M, and store the most significant half of the product in
+     operand 0.  The least significant half of the product is discarded.
+
+`umulM3_highpart'
+     Similar, but the multiplication is unsigned.
+
+`maddMN4'
+     Multiply operands 1 and 2, sign-extend them to mode N, add operand
+     3, and store the result in operand 0.  Operands 1 and 2 have mode
+     M and operands 0 and 3 have mode N.  Both modes must be integer or
+     fixed-point modes and N must be twice the size of M.
+
+     In other words, `maddMN4' is like `mulMN3' except that it also
+     adds operand 3.
+
+     These instructions are not allowed to `FAIL'.
+
+`umaddMN4'
+     Like `maddMN4', but zero-extend the multiplication operands
+     instead of sign-extending them.
+
+`ssmaddMN4'
+     Like `maddMN4', but all involved operations must be
+     signed-saturating.
+
+`usmaddMN4'
+     Like `umaddMN4', but all involved operations must be
+     unsigned-saturating.
+
+`msubMN4'
+     Multiply operands 1 and 2, sign-extend them to mode N, subtract the
+     result from operand 3, and store the result in operand 0.
+     Operands 1 and 2 have mode M and operands 0 and 3 have mode N.
+     Both modes must be integer or fixed-point modes and N must be twice
+     the size of M.
+
+     In other words, `msubMN4' is like `mulMN3' except that it also
+     subtracts the result from operand 3.
+
+     These instructions are not allowed to `FAIL'.
+
+`umsubMN4'
+     Like `msubMN4', but zero-extend the multiplication operands
+     instead of sign-extending them.
+
+`ssmsubMN4'
+     Like `msubMN4', but all involved operations must be
+     signed-saturating.
+
+`usmsubMN4'
+     Like `umsubMN4', but all involved operations must be
+     unsigned-saturating.
+
+`divmodM4'
+     Signed division that produces both a quotient and a remainder.
+     Operand 1 is divided by operand 2 to produce a quotient stored in
+     operand 0 and a remainder stored in operand 3.
+
+     For machines with an instruction that produces both a quotient and
+     a remainder, provide a pattern for `divmodM4' but do not provide
+     patterns for `divM3' and `modM3'.  This allows optimization in the
+     relatively common case when both the quotient and remainder are
+     computed.
+
+     If an instruction that just produces a quotient or just a remainder
+     exists and is more efficient than the instruction that produces
+     both, write the output routine of `divmodM4' to call
+     `find_reg_note' and look for a `REG_UNUSED' note on the quotient
+     or remainder and generate the appropriate instruction.
+
+`udivmodM4'
+     Similar, but does unsigned division.
+
+`ashlM3', `ssashlM3', `usashlM3'
+     Arithmetic-shift operand 1 left by a number of bits specified by
+     operand 2, and store the result in operand 0.  Here M is the mode
+     of operand 0 and operand 1; operand 2's mode is specified by the
+     instruction pattern, and the compiler will convert the operand to
+     that mode before generating the instruction.  The meaning of
+     out-of-range shift counts can optionally be specified by
+     `TARGET_SHIFT_TRUNCATION_MASK'.  *Note
+     TARGET_SHIFT_TRUNCATION_MASK::.  Operand 2 is always a scalar type.
+
+`ashrM3', `lshrM3', `rotlM3', `rotrM3'
+     Other shift and rotate instructions, analogous to the `ashlM3'
+     instructions.  Operand 2 is always a scalar type.
+
+`vashlM3', `vashrM3', `vlshrM3', `vrotlM3', `vrotrM3'
+     Vector shift and rotate instructions that take vectors as operand 2
+     instead of a scalar type.
+
+`negM2', `ssnegM2', `usnegM2'
+     Negate operand 1 and store the result in operand 0.
+
+`absM2'
+     Store the absolute value of operand 1 into operand 0.
+
+`sqrtM2'
+     Store the square root of operand 1 into operand 0.
+
+     The `sqrt' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `sqrtf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`fmodM3'
+     Store the remainder of dividing operand 1 by operand 2 into
+     operand 0, rounded towards zero to an integer.
+
+     The `fmod' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `fmodf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`remainderM3'
+     Store the remainder of dividing operand 1 by operand 2 into
+     operand 0, rounded to the nearest integer.
+
+     The `remainder' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `remainderf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`cosM2'
+     Store the cosine of operand 1 into operand 0.
+
+     The `cos' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `cosf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`sinM2'
+     Store the sine of operand 1 into operand 0.
+
+     The `sin' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `sinf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`expM2'
+     Store the exponential of operand 1 into operand 0.
+
+     The `exp' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `expf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`logM2'
+     Store the natural logarithm of operand 1 into operand 0.
+
+     The `log' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `logf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`powM3'
+     Store the value of operand 1 raised to the exponent operand 2 into
+     operand 0.
+
+     The `pow' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `powf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`atan2M3'
+     Store the arc tangent (inverse tangent) of operand 1 divided by
+     operand 2 into operand 0, using the signs of both arguments to
+     determine the quadrant of the result.
+
+     The `atan2' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `atan2f' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`floorM2'
+     Store the largest integral value not greater than argument.
+
+     The `floor' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `floorf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`btruncM2'
+     Store the argument rounded to integer towards zero.
+
+     The `trunc' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `truncf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`roundM2'
+     Store the argument rounded to integer away from zero.
+
+     The `round' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `roundf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`ceilM2'
+     Store the argument rounded to integer away from zero.
+
+     The `ceil' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `ceilf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`nearbyintM2'
+     Store the argument rounded according to the default rounding mode
+
+     The `nearbyint' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `nearbyintf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`rintM2'
+     Store the argument rounded according to the default rounding mode
+     and raise the inexact exception when the result differs in value
+     from the argument
+
+     The `rint' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `rintf' built-in
+     function uses the mode which corresponds to the C data type
+     `float'.
+
+`lrintMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number according to the current rounding mode
+     and store in operand 0 (which has mode N).
+
+`lroundM2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding to nearest and away from zero
+     and store in operand 0 (which has mode N).
+
+`lfloorM2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding down and store in operand 0
+     (which has mode N).
+
+`lceilM2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number rounding up and store in operand 0
+     (which has mode N).
+
+`copysignM3'
+     Store a value with the magnitude of operand 1 and the sign of
+     operand 2 into operand 0.
+
+     The `copysign' built-in function of C always uses the mode which
+     corresponds to the C data type `double' and the `copysignf'
+     built-in function uses the mode which corresponds to the C data
+     type `float'.
+
+`ffsM2'
+     Store into operand 0 one plus the index of the least significant
+     1-bit of operand 1.  If operand 1 is zero, store zero.  M is the
+     mode of operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+     The `ffs' built-in function of C always uses the mode which
+     corresponds to the C data type `int'.
+
+`clzM2'
+     Store into operand 0 the number of leading 0-bits in X, starting
+     at the most significant bit position.  If X is 0, the
+     `CLZ_DEFINED_VALUE_AT_ZERO' (*note Misc::) macro defines if the
+     result is undefined or has a useful value.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`ctzM2'
+     Store into operand 0 the number of trailing 0-bits in X, starting
+     at the least significant bit position.  If X is 0, the
+     `CTZ_DEFINED_VALUE_AT_ZERO' (*note Misc::) macro defines if the
+     result is undefined or has a useful value.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`popcountM2'
+     Store into operand 0 the number of 1-bits in X.  M is the mode of
+     operand 0; operand 1's mode is specified by the instruction
+     pattern, and the compiler will convert the operand to that mode
+     before generating the instruction.
+
+`parityM2'
+     Store into operand 0 the parity of X, i.e. the number of 1-bits in
+     X modulo 2.  M is the mode of operand 0; operand 1's mode is
+     specified by the instruction pattern, and the compiler will convert
+     the operand to that mode before generating the instruction.
+
+`one_cmplM2'
+     Store the bitwise-complement of operand 1 into operand 0.
+
+`movmemM'
+     Block move instruction.  The destination and source blocks of
+     memory are the first two operands, and both are `mem:BLK's with an
+     address in mode `Pmode'.
+
+     The number of bytes to move is the third operand, in mode M.
+     Usually, you specify `word_mode' for M.  However, if you can
+     generate better code knowing the range of valid lengths is smaller
+     than those representable in a full word, you should provide a
+     pattern with a mode corresponding to the range of values you can
+     handle efficiently (e.g., `QImode' for values in the range 0-127;
+     note we avoid numbers that appear negative) and also a pattern
+     with `word_mode'.
+
+     The fourth operand is the known shared alignment of the source and
+     destination, in the form of a `const_int' rtx.  Thus, if the
+     compiler knows that both source and destination are word-aligned,
+     it may provide the value 4 for this operand.
+
+     Optional operands 5 and 6 specify expected alignment and size of
+     block respectively.  The expected alignment differs from alignment
+     in operand 4 in a way that the blocks are not required to be
+     aligned according to it in all cases. This expected alignment is
+     also in bytes, just like operand 4.  Expected size, when unknown,
+     is set to `(const_int -1)'.
+
+     Descriptions of multiple `movmemM' patterns can only be beneficial
+     if the patterns for smaller modes have fewer restrictions on their
+     first, second and fourth operands.  Note that the mode M in
+     `movmemM' does not impose any restriction on the mode of
+     individually moved data units in the block.
+
+     These patterns need not give special consideration to the
+     possibility that the source and destination strings might overlap.
+
+`movstr'
+     String copy instruction, with `stpcpy' semantics.  Operand 0 is an
+     output operand in mode `Pmode'.  The addresses of the destination
+     and source strings are operands 1 and 2, and both are `mem:BLK's
+     with addresses in mode `Pmode'.  The execution of the expansion of
+     this pattern should store in operand 0 the address in which the
+     `NUL' terminator was stored in the destination string.
+
+`setmemM'
+     Block set instruction.  The destination string is the first
+     operand, given as a `mem:BLK' whose address is in mode `Pmode'.
+     The number of bytes to set is the second operand, in mode M.  The
+     value to initialize the memory with is the third operand. Targets
+     that only support the clearing of memory should reject any value
+     that is not the constant 0.  See `movmemM' for a discussion of the
+     choice of mode.
+
+     The fourth operand is the known alignment of the destination, in
+     the form of a `const_int' rtx.  Thus, if the compiler knows that
+     the destination is word-aligned, it may provide the value 4 for
+     this operand.
+
+     Optional operands 5 and 6 specify expected alignment and size of
+     block respectively.  The expected alignment differs from alignment
+     in operand 4 in a way that the blocks are not required to be
+     aligned according to it in all cases. This expected alignment is
+     also in bytes, just like operand 4.  Expected size, when unknown,
+     is set to `(const_int -1)'.
+
+     The use for multiple `setmemM' is as for `movmemM'.
+
+`cmpstrnM'
+     String compare instruction, with five operands.  Operand 0 is the
+     output; it has mode M.  The remaining four operands are like the
+     operands of `movmemM'.  The two memory blocks specified are
+     compared byte by byte in lexicographic order starting at the
+     beginning of each string.  The instruction is not allowed to
+     prefetch more than one byte at a time since either string may end
+     in the first byte and reading past that may access an invalid page
+     or segment and cause a fault.  The effect of the instruction is to
+     store a value in operand 0 whose sign indicates the result of the
+     comparison.
+
+`cmpstrM'
+     String compare instruction, without known maximum length.  Operand
+     0 is the output; it has mode M.  The second and third operand are
+     the blocks of memory to be compared; both are `mem:BLK' with an
+     address in mode `Pmode'.
+
+     The fourth operand is the known shared alignment of the source and
+     destination, in the form of a `const_int' rtx.  Thus, if the
+     compiler knows that both source and destination are word-aligned,
+     it may provide the value 4 for this operand.
+
+     The two memory blocks specified are compared byte by byte in
+     lexicographic order starting at the beginning of each string.  The
+     instruction is not allowed to prefetch more than one byte at a
+     time since either string may end in the first byte and reading
+     past that may access an invalid page or segment and cause a fault.
+     The effect of the instruction is to store a value in operand 0
+     whose sign indicates the result of the comparison.
+
+`cmpmemM'
+     Block compare instruction, with five operands like the operands of
+     `cmpstrM'.  The two memory blocks specified are compared byte by
+     byte in lexicographic order starting at the beginning of each
+     block.  Unlike `cmpstrM' the instruction can prefetch any bytes in
+     the two memory blocks.  The effect of the instruction is to store
+     a value in operand 0 whose sign indicates the result of the
+     comparison.
+
+`strlenM'
+     Compute the length of a string, with three operands.  Operand 0 is
+     the result (of mode M), operand 1 is a `mem' referring to the
+     first character of the string, operand 2 is the character to
+     search for (normally zero), and operand 3 is a constant describing
+     the known alignment of the beginning of the string.
+
+`floatMN2'
+     Convert signed integer operand 1 (valid for fixed point mode M) to
+     floating point mode N and store in operand 0 (which has mode N).
+
+`floatunsMN2'
+     Convert unsigned integer operand 1 (valid for fixed point mode M)
+     to floating point mode N and store in operand 0 (which has mode N).
+
+`fixMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as a signed number and store in operand 0 (which has mode
+     N).  This instruction's result is defined only when the value of
+     operand 1 is an integer.
+
+     If the machine description defines this pattern, it also needs to
+     define the `ftrunc' pattern.
+
+`fixunsMN2'
+     Convert operand 1 (valid for floating point mode M) to fixed point
+     mode N as an unsigned number and store in operand 0 (which has
+     mode N).  This instruction's result is defined only when the value
+     of operand 1 is an integer.
+
+`ftruncM2'
+     Convert operand 1 (valid for floating point mode M) to an integer
+     value, still represented in floating point mode M, and store it in
+     operand 0 (valid for floating point mode M).
+
+`fix_truncMN2'
+     Like `fixMN2' but works for any floating point value of mode M by
+     converting the value to an integer.
+
+`fixuns_truncMN2'
+     Like `fixunsMN2' but works for any floating point value of mode M
+     by converting the value to an integer.
+
+`truncMN2'
+     Truncate operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point or
+     both floating point.
+
+`extendMN2'
+     Sign-extend operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point or
+     both floating point.
+
+`zero_extendMN2'
+     Zero-extend operand 1 (valid for mode M) to mode N and store in
+     operand 0 (which has mode N).  Both modes must be fixed point.
+
+`fractMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be fixed-point to
+     fixed-point, signed integer to fixed-point, fixed-point to signed
+     integer, floating-point to fixed-point, or fixed-point to
+     floating-point.  When overflows or underflows happen, the results
+     are undefined.
+
+`satfractMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be fixed-point to
+     fixed-point, signed integer to fixed-point, or floating-point to
+     fixed-point.  When overflows or underflows happen, the instruction
+     saturates the results to the maximum or the minimum.
+
+`fractunsMN2'
+     Convert operand 1 of mode M to mode N and store in operand 0
+     (which has mode N).  Mode M and mode N could be unsigned integer
+     to fixed-point, or fixed-point to unsigned integer.  When
+     overflows or underflows happen, the results are undefined.
+
+`satfractunsMN2'
+     Convert unsigned integer operand 1 of mode M to fixed-point mode N
+     and store in operand 0 (which has mode N).  When overflows or
+     underflows happen, the instruction saturates the results to the
+     maximum or the minimum.
+
+`extv'
+     Extract a bit-field from operand 1 (a register or memory operand),
+     where operand 2 specifies the width in bits and operand 3 the
+     starting bit, and store it in operand 0.  Operand 0 must have mode
+     `word_mode'.  Operand 1 may have mode `byte_mode' or `word_mode';
+     often `word_mode' is allowed only for registers.  Operands 2 and 3
+     must be valid for `word_mode'.
+
+     The RTL generation pass generates this instruction only with
+     constants for operands 2 and 3 and the constant is never zero for
+     operand 2.
+
+     The bit-field value is sign-extended to a full word integer before
+     it is stored in operand 0.
+
+`extzv'
+     Like `extv' except that the bit-field value is zero-extended.
+
+`insv'
+     Store operand 3 (which must be valid for `word_mode') into a
+     bit-field in operand 0, where operand 1 specifies the width in
+     bits and operand 2 the starting bit.  Operand 0 may have mode
+     `byte_mode' or `word_mode'; often `word_mode' is allowed only for
+     registers.  Operands 1 and 2 must be valid for `word_mode'.
+
+     The RTL generation pass generates this instruction only with
+     constants for operands 1 and 2 and the constant is never zero for
+     operand 1.
+
+`movMODEcc'
+     Conditionally move operand 2 or operand 3 into operand 0 according
+     to the comparison in operand 1.  If the comparison is true,
+     operand 2 is moved into operand 0, otherwise operand 3 is moved.
+
+     The mode of the operands being compared need not be the same as
+     the operands being moved.  Some machines, sparc64 for example,
+     have instructions that conditionally move an integer value based
+     on the floating point condition codes and vice versa.
+
+     If the machine does not have conditional move instructions, do not
+     define these patterns.
+
+`addMODEcc'
+     Similar to `movMODEcc' but for conditional addition.  Conditionally
+     move operand 2 or (operands 2 + operand 3) into operand 0
+     according to the comparison in operand 1.  If the comparison is
+     true, operand 2 is moved into operand 0, otherwise (operand 2 +
+     operand 3) is moved.
+
+`cstoreMODE4'
+     Store zero or nonzero in operand 0 according to whether a
+     comparison is true.  Operand 1 is a comparison operator.  Operand
+     2 and operand 3 are the first and second operand of the
+     comparison, respectively.  You specify the mode that operand 0
+     must have when you write the `match_operand' expression.  The
+     compiler automatically sees which mode you have used and supplies
+     an operand of that mode.
+
+     The value stored for a true condition must have 1 as its low bit,
+     or else must be negative.  Otherwise the instruction is not
+     suitable and you should omit it from the machine description.  You
+     describe to the compiler exactly which value is stored by defining
+     the macro `STORE_FLAG_VALUE' (*note Misc::).  If a description
+     cannot be found that can be used for all the `sCOND' patterns, you
+     should omit those operations from the machine description.
+
+     These operations may fail, but should do so only in relatively
+     uncommon cases; if they would fail for common cases involving
+     integer comparisons, it is best to omit these patterns.
+
+     If these operations are omitted, the compiler will usually
+     generate code that copies the constant one to the target and
+     branches around an assignment of zero to the target.  If this code
+     is more efficient than the potential instructions used for the
+     `cstoreMODE4' pattern followed by those required to convert the
+     result into a 1 or a zero in `SImode', you should omit the
+     `cstoreMODE4' operations from the machine description.
+
+`cbranchMODE4'
+     Conditional branch instruction combined with a compare instruction.
+     Operand 0 is a comparison operator.  Operand 1 and operand 2 are
+     the first and second operands of the comparison, respectively.
+     Operand 3 is a `label_ref' that refers to the label to jump to.
+
+`jump'
+     A jump inside a function; an unconditional branch.  Operand 0 is
+     the `label_ref' of the label to jump to.  This pattern name is
+     mandatory on all machines.
+
+`call'
+     Subroutine call instruction returning no value.  Operand 0 is the
+     function to call; operand 1 is the number of bytes of arguments
+     pushed as a `const_int'; operand 2 is the number of registers used
+     as operands.
+
+     On most machines, operand 2 is not actually stored into the RTL
+     pattern.  It is supplied for the sake of some RISC machines which
+     need to put this information into the assembler code; they can put
+     it in the RTL instead of operand 1.
+
+     Operand 0 should be a `mem' RTX whose address is the address of the
+     function.  Note, however, that this address can be a `symbol_ref'
+     expression even if it would not be a legitimate memory address on
+     the target machine.  If it is also not a valid argument for a call
+     instruction, the pattern for this operation should be a
+     `define_expand' (*note Expander Definitions::) that places the
+     address into a register and uses that register in the call
+     instruction.
+
+`call_value'
+     Subroutine call instruction returning a value.  Operand 0 is the
+     hard register in which the value is returned.  There are three more
+     operands, the same as the three operands of the `call' instruction
+     (but with numbers increased by one).
+
+     Subroutines that return `BLKmode' objects use the `call' insn.
+
+`call_pop', `call_value_pop'
+     Similar to `call' and `call_value', except used if defined and if
+     `RETURN_POPS_ARGS' is nonzero.  They should emit a `parallel' that
+     contains both the function call and a `set' to indicate the
+     adjustment made to the frame pointer.
+
+     For machines where `RETURN_POPS_ARGS' can be nonzero, the use of
+     these patterns increases the number of functions for which the
+     frame pointer can be eliminated, if desired.
+
+`untyped_call'
+     Subroutine call instruction returning a value of any type.
+     Operand 0 is the function to call; operand 1 is a memory location
+     where the result of calling the function is to be stored; operand
+     2 is a `parallel' expression where each element is a `set'
+     expression that indicates the saving of a function return value
+     into the result block.
+
+     This instruction pattern should be defined to support
+     `__builtin_apply' on machines where special instructions are needed
+     to call a subroutine with arbitrary arguments or to save the value
+     returned.  This instruction pattern is required on machines that
+     have multiple registers that can hold a return value (i.e.
+     `FUNCTION_VALUE_REGNO_P' is true for more than one register).
+
+`return'
+     Subroutine return instruction.  This instruction pattern name
+     should be defined only if a single instruction can do all the work
+     of returning from a function.
+
+     Like the `movM' patterns, this pattern is also used after the RTL
+     generation phase.  In this case it is to support machines where
+     multiple instructions are usually needed to return from a
+     function, but some class of functions only requires one
+     instruction to implement a return.  Normally, the applicable
+     functions are those which do not need to save any registers or
+     allocate stack space.
+
+     For such machines, the condition specified in this pattern should
+     only be true when `reload_completed' is nonzero and the function's
+     epilogue would only be a single instruction.  For machines with
+     register windows, the routine `leaf_function_p' may be used to
+     determine if a register window push is required.
+
+     Machines that have conditional return instructions should define
+     patterns such as
+
+          (define_insn ""
+            [(set (pc)
+                  (if_then_else (match_operator
+                                   0 "comparison_operator"
+                                   [(cc0) (const_int 0)])
+                                (return)
+                                (pc)))]
+            "CONDITION"
+            "...")
+
+     where CONDITION would normally be the same condition specified on
+     the named `return' pattern.
+
+`untyped_return'
+     Untyped subroutine return instruction.  This instruction pattern
+     should be defined to support `__builtin_return' on machines where
+     special instructions are needed to return a value of any type.
+
+     Operand 0 is a memory location where the result of calling a
+     function with `__builtin_apply' is stored; operand 1 is a
+     `parallel' expression where each element is a `set' expression
+     that indicates the restoring of a function return value from the
+     result block.
+
+`nop'
+     No-op instruction.  This instruction pattern name should always be
+     defined to output a no-op in assembler code.  `(const_int 0)' will
+     do as an RTL pattern.
+
+`indirect_jump'
+     An instruction to jump to an address which is operand zero.  This
+     pattern name is mandatory on all machines.
+
+`casesi'
+     Instruction to jump through a dispatch table, including bounds
+     checking.  This instruction takes five operands:
+
+       1. The index to dispatch on, which has mode `SImode'.
+
+       2. The lower bound for indices in the table, an integer constant.
+
+       3. The total range of indices in the table--the largest index
+          minus the smallest one (both inclusive).
+
+       4. A label that precedes the table itself.
+
+       5. A label to jump to if the index has a value outside the
+          bounds.
+
+     The table is an `addr_vec' or `addr_diff_vec' inside of a
+     `jump_insn'.  The number of elements in the table is one plus the
+     difference between the upper bound and the lower bound.
+
+`tablejump'
+     Instruction to jump to a variable address.  This is a low-level
+     capability which can be used to implement a dispatch table when
+     there is no `casesi' pattern.
+
+     This pattern requires two operands: the address or offset, and a
+     label which should immediately precede the jump table.  If the
+     macro `CASE_VECTOR_PC_RELATIVE' evaluates to a nonzero value then
+     the first operand is an offset which counts from the address of
+     the table; otherwise, it is an absolute address to jump to.  In
+     either case, the first operand has mode `Pmode'.
+
+     The `tablejump' insn is always the last insn before the jump table
+     it uses.  Its assembler code normally has no need to use the
+     second operand, but you should incorporate it in the RTL pattern so
+     that the jump optimizer will not delete the table as unreachable
+     code.
+
+`decrement_and_branch_until_zero'
+     Conditional branch instruction that decrements a register and
+     jumps if the register is nonzero.  Operand 0 is the register to
+     decrement and test; operand 1 is the label to jump to if the
+     register is nonzero.  *Note Looping Patterns::.
+
+     This optional instruction pattern is only used by the combiner,
+     typically for loops reversed by the loop optimizer when strength
+     reduction is enabled.
+
+`doloop_end'
+     Conditional branch instruction that decrements a register and
+     jumps if the register is nonzero.  This instruction takes five
+     operands: Operand 0 is the register to decrement and test; operand
+     1 is the number of loop iterations as a `const_int' or
+     `const0_rtx' if this cannot be determined until run-time; operand
+     2 is the actual or estimated maximum number of iterations as a
+     `const_int'; operand 3 is the number of enclosed loops as a
+     `const_int' (an innermost loop has a value of 1); operand 4 is the
+     label to jump to if the register is nonzero.  *Note Looping
+     Patterns::.
+
+     This optional instruction pattern should be defined for machines
+     with low-overhead looping instructions as the loop optimizer will
+     try to modify suitable loops to utilize it.  If nested
+     low-overhead looping is not supported, use a `define_expand'
+     (*note Expander Definitions::) and make the pattern fail if
+     operand 3 is not `const1_rtx'.  Similarly, if the actual or
+     estimated maximum number of iterations is too large for this
+     instruction, make it fail.
+
+`doloop_begin'
+     Companion instruction to `doloop_end' required for machines that
+     need to perform some initialization, such as loading special
+     registers used by a low-overhead looping instruction.  If
+     initialization insns do not always need to be emitted, use a
+     `define_expand' (*note Expander Definitions::) and make it fail.
+
+`canonicalize_funcptr_for_compare'
+     Canonicalize the function pointer in operand 1 and store the result
+     into operand 0.
+
+     Operand 0 is always a `reg' and has mode `Pmode'; operand 1 may be
+     a `reg', `mem', `symbol_ref', `const_int', etc and also has mode
+     `Pmode'.
+
+     Canonicalization of a function pointer usually involves computing
+     the address of the function which would be called if the function
+     pointer were used in an indirect call.
+
+     Only define this pattern if function pointers on the target machine
+     can have different values but still call the same function when
+     used in an indirect call.
+
+`save_stack_block'
+`save_stack_function'
+`save_stack_nonlocal'
+`restore_stack_block'
+`restore_stack_function'
+`restore_stack_nonlocal'
+     Most machines save and restore the stack pointer by copying it to
+     or from an object of mode `Pmode'.  Do not define these patterns on
+     such machines.
+
+     Some machines require special handling for stack pointer saves and
+     restores.  On those machines, define the patterns corresponding to
+     the non-standard cases by using a `define_expand' (*note Expander
+     Definitions::) that produces the required insns.  The three types
+     of saves and restores are:
+
+       1. `save_stack_block' saves the stack pointer at the start of a
+          block that allocates a variable-sized object, and
+          `restore_stack_block' restores the stack pointer when the
+          block is exited.
+
+       2. `save_stack_function' and `restore_stack_function' do a
+          similar job for the outermost block of a function and are
+          used when the function allocates variable-sized objects or
+          calls `alloca'.  Only the epilogue uses the restored stack
+          pointer, allowing a simpler save or restore sequence on some
+          machines.
+
+       3. `save_stack_nonlocal' is used in functions that contain labels
+          branched to by nested functions.  It saves the stack pointer
+          in such a way that the inner function can use
+          `restore_stack_nonlocal' to restore the stack pointer.  The
+          compiler generates code to restore the frame and argument
+          pointer registers, but some machines require saving and
+          restoring additional data such as register window information
+          or stack backchains.  Place insns in these patterns to save
+          and restore any such required data.
+
+     When saving the stack pointer, operand 0 is the save area and
+     operand 1 is the stack pointer.  The mode used to allocate the
+     save area defaults to `Pmode' but you can override that choice by
+     defining the `STACK_SAVEAREA_MODE' macro (*note Storage Layout::).
+     You must specify an integral mode, or `VOIDmode' if no save area
+     is needed for a particular type of save (either because no save is
+     needed or because a machine-specific save area can be used).
+     Operand 0 is the stack pointer and operand 1 is the save area for
+     restore operations.  If `save_stack_block' is defined, operand 0
+     must not be `VOIDmode' since these saves can be arbitrarily nested.
+
+     A save area is a `mem' that is at a constant offset from
+     `virtual_stack_vars_rtx' when the stack pointer is saved for use by
+     nonlocal gotos and a `reg' in the other two cases.
+
+`allocate_stack'
+     Subtract (or add if `STACK_GROWS_DOWNWARD' is undefined) operand 1
+     from the stack pointer to create space for dynamically allocated
+     data.
+
+     Store the resultant pointer to this space into operand 0.  If you
+     are allocating space from the main stack, do this by emitting a
+     move insn to copy `virtual_stack_dynamic_rtx' to operand 0.  If
+     you are allocating the space elsewhere, generate code to copy the
+     location of the space to operand 0.  In the latter case, you must
+     ensure this space gets freed when the corresponding space on the
+     main stack is free.
+
+     Do not define this pattern if all that must be done is the
+     subtraction.  Some machines require other operations such as stack
+     probes or maintaining the back chain.  Define this pattern to emit
+     those operations in addition to updating the stack pointer.
+
+`check_stack'
+     If stack checking (*note Stack Checking::) cannot be done on your
+     system by probing the stack, define this pattern to perform the
+     needed check and signal an error if the stack has overflowed.  The
+     single operand is the address in the stack farthest from the
+     current stack pointer that you need to validate.  Normally, on
+     platforms where this pattern is needed, you would obtain the stack
+     limit from a global or thread-specific variable or register.
+
+`probe_stack'
+     If stack checking (*note Stack Checking::) can be done on your
+     system by probing the stack but doing it with a "store zero"
+     instruction is not valid or optimal, define this pattern to do the
+     probing differently and signal an error if the stack has
+     overflowed.  The single operand is the memory reference in the
+     stack that needs to be probed.
+
+`nonlocal_goto'
+     Emit code to generate a non-local goto, e.g., a jump from one
+     function to a label in an outer function.  This pattern has four
+     arguments, each representing a value to be used in the jump.  The
+     first argument is to be loaded into the frame pointer, the second
+     is the address to branch to (code to dispatch to the actual label),
+     the third is the address of a location where the stack is saved,
+     and the last is the address of the label, to be placed in the
+     location for the incoming static chain.
+
+     On most machines you need not define this pattern, since GCC will
+     already generate the correct code, which is to load the frame
+     pointer and static chain, restore the stack (using the
+     `restore_stack_nonlocal' pattern, if defined), and jump indirectly
+     to the dispatcher.  You need only define this pattern if this code
+     will not work on your machine.
+
+`nonlocal_goto_receiver'
+     This pattern, if defined, contains code needed at the target of a
+     nonlocal goto after the code already generated by GCC.  You will
+     not normally need to define this pattern.  A typical reason why
+     you might need this pattern is if some value, such as a pointer to
+     a global table, must be restored when the frame pointer is
+     restored.  Note that a nonlocal goto only occurs within a
+     unit-of-translation, so a global table pointer that is shared by
+     all functions of a given module need not be restored.  There are
+     no arguments.
+
+`exception_receiver'
+     This pattern, if defined, contains code needed at the site of an
+     exception handler that isn't needed at the site of a nonlocal
+     goto.  You will not normally need to define this pattern.  A
+     typical reason why you might need this pattern is if some value,
+     such as a pointer to a global table, must be restored after
+     control flow is branched to the handler of an exception.  There
+     are no arguments.
+
+`builtin_setjmp_setup'
+     This pattern, if defined, contains additional code needed to
+     initialize the `jmp_buf'.  You will not normally need to define
+     this pattern.  A typical reason why you might need this pattern is
+     if some value, such as a pointer to a global table, must be
+     restored.  Though it is preferred that the pointer value be
+     recalculated if possible (given the address of a label for
+     instance).  The single argument is a pointer to the `jmp_buf'.
+     Note that the buffer is five words long and that the first three
+     are normally used by the generic mechanism.
+
+`builtin_setjmp_receiver'
+     This pattern, if defined, contains code needed at the site of a
+     built-in setjmp that isn't needed at the site of a nonlocal goto.
+     You will not normally need to define this pattern.  A typical
+     reason why you might need this pattern is if some value, such as a
+     pointer to a global table, must be restored.  It takes one
+     argument, which is the label to which builtin_longjmp transfered
+     control; this pattern may be emitted at a small offset from that
+     label.
+
+`builtin_longjmp'
+     This pattern, if defined, performs the entire action of the
+     longjmp.  You will not normally need to define this pattern unless
+     you also define `builtin_setjmp_setup'.  The single argument is a
+     pointer to the `jmp_buf'.
+
+`eh_return'
+     This pattern, if defined, affects the way `__builtin_eh_return',
+     and thence the call frame exception handling library routines, are
+     built.  It is intended to handle non-trivial actions needed along
+     the abnormal return path.
+
+     The address of the exception handler to which the function should
+     return is passed as operand to this pattern.  It will normally
+     need to copied by the pattern to some special register or memory
+     location.  If the pattern needs to determine the location of the
+     target call frame in order to do so, it may use
+     `EH_RETURN_STACKADJ_RTX', if defined; it will have already been
+     assigned.
+
+     If this pattern is not defined, the default action will be to
+     simply copy the return address to `EH_RETURN_HANDLER_RTX'.  Either
+     that macro or this pattern needs to be defined if call frame
+     exception handling is to be used.
+
+`prologue'
+     This pattern, if defined, emits RTL for entry to a function.  The
+     function entry is responsible for setting up the stack frame,
+     initializing the frame pointer register, saving callee saved
+     registers, etc.
+
+     Using a prologue pattern is generally preferred over defining
+     `TARGET_ASM_FUNCTION_PROLOGUE' to emit assembly code for the
+     prologue.
+
+     The `prologue' pattern is particularly useful for targets which
+     perform instruction scheduling.
+
+`epilogue'
+     This pattern emits RTL for exit from a function.  The function
+     exit is responsible for deallocating the stack frame, restoring
+     callee saved registers and emitting the return instruction.
+
+     Using an epilogue pattern is generally preferred over defining
+     `TARGET_ASM_FUNCTION_EPILOGUE' to emit assembly code for the
+     epilogue.
+
+     The `epilogue' pattern is particularly useful for targets which
+     perform instruction scheduling or which have delay slots for their
+     return instruction.
+
+`sibcall_epilogue'
+     This pattern, if defined, emits RTL for exit from a function
+     without the final branch back to the calling function.  This
+     pattern will be emitted before any sibling call (aka tail call)
+     sites.
+
+     The `sibcall_epilogue' pattern must not clobber any arguments used
+     for parameter passing or any stack slots for arguments passed to
+     the current function.
+
+`trap'
+     This pattern, if defined, signals an error, typically by causing
+     some kind of signal to be raised.  Among other places, it is used
+     by the Java front end to signal `invalid array index' exceptions.
+
+`ctrapMM4'
+     Conditional trap instruction.  Operand 0 is a piece of RTL which
+     performs a comparison, and operands 1 and 2 are the arms of the
+     comparison.  Operand 3 is the trap code, an integer.
+
+     A typical `ctrap' pattern looks like
+
+          (define_insn "ctrapsi4"
+            [(trap_if (match_operator 0 "trap_operator"
+                       [(match_operand 1 "register_operand")
+                        (match_operand 2 "immediate_operand")])
+                      (match_operand 3 "const_int_operand" "i"))]
+            ""
+            "...")
+
+`prefetch'
+     This pattern, if defined, emits code for a non-faulting data
+     prefetch instruction.  Operand 0 is the address of the memory to
+     prefetch.  Operand 1 is a constant 1 if the prefetch is preparing
+     for a write to the memory address, or a constant 0 otherwise.
+     Operand 2 is the expected degree of temporal locality of the data
+     and is a value between 0 and 3, inclusive; 0 means that the data
+     has no temporal locality, so it need not be left in the cache
+     after the access; 3 means that the data has a high degree of
+     temporal locality and should be left in all levels of cache
+     possible;  1 and 2 mean, respectively, a low or moderate degree of
+     temporal locality.
+
+     Targets that do not support write prefetches or locality hints can
+     ignore the values of operands 1 and 2.
+
+`blockage'
+     This pattern defines a pseudo insn that prevents the instruction
+     scheduler from moving instructions across the boundary defined by
+     the blockage insn.  Normally an UNSPEC_VOLATILE pattern.
+
+`memory_barrier'
+     If the target memory model is not fully synchronous, then this
+     pattern should be defined to an instruction that orders both loads
+     and stores before the instruction with respect to loads and stores
+     after the instruction.  This pattern has no operands.
+
+`sync_compare_and_swapMODE'
+     This pattern, if defined, emits code for an atomic compare-and-swap
+     operation.  Operand 1 is the memory on which the atomic operation
+     is performed.  Operand 2 is the "old" value to be compared against
+     the current contents of the memory location.  Operand 3 is the
+     "new" value to store in the memory if the compare succeeds.
+     Operand 0 is the result of the operation; it should contain the
+     contents of the memory before the operation.  If the compare
+     succeeds, this should obviously be a copy of operand 2.
+
+     This pattern must show that both operand 0 and operand 1 are
+     modified.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     For targets where the success or failure of the compare-and-swap
+     operation is available via the status flags, it is possible to
+     avoid a separate compare operation and issue the subsequent branch
+     or store-flag operation immediately after the compare-and-swap.
+     To this end, GCC will look for a `MODE_CC' set in the output of
+     `sync_compare_and_swapMODE'; if the machine description includes
+     such a set, the target should also define special `cbranchcc4'
+     and/or `cstorecc4' instructions.  GCC will then be able to take
+     the destination of the `MODE_CC' set and pass it to the
+     `cbranchcc4' or `cstorecc4' pattern as the first operand of the
+     comparison (the second will be `(const_int 0)').
+
+`sync_addMODE', `sync_subMODE'
+`sync_iorMODE', `sync_andMODE'
+`sync_xorMODE', `sync_nandMODE'
+     These patterns emit code for an atomic operation on memory.
+     Operand 0 is the memory on which the atomic operation is performed.
+     Operand 1 is the second operand to the binary operator.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     If these patterns are not defined, the operation will be
+     constructed from a compare-and-swap operation, if defined.
+
+`sync_old_addMODE', `sync_old_subMODE'
+`sync_old_iorMODE', `sync_old_andMODE'
+`sync_old_xorMODE', `sync_old_nandMODE'
+     These patterns are emit code for an atomic operation on memory,
+     and return the value that the memory contained before the
+     operation.  Operand 0 is the result value, operand 1 is the memory
+     on which the atomic operation is performed, and operand 2 is the
+     second operand to the binary operator.
+
+     This pattern must issue any memory barrier instructions such that
+     all memory operations before the atomic operation occur before the
+     atomic operation and all memory operations after the atomic
+     operation occur after the atomic operation.
+
+     If these patterns are not defined, the operation will be
+     constructed from a compare-and-swap operation, if defined.
+
+`sync_new_addMODE', `sync_new_subMODE'
+`sync_new_iorMODE', `sync_new_andMODE'
+`sync_new_xorMODE', `sync_new_nandMODE'
+     These patterns are like their `sync_old_OP' counterparts, except
+     that they return the value that exists in the memory location
+     after the operation, rather than before the operation.
+
+`sync_lock_test_and_setMODE'
+     This pattern takes two forms, based on the capabilities of the
+     target.  In either case, operand 0 is the result of the operand,
+     operand 1 is the memory on which the atomic operation is
+     performed, and operand 2 is the value to set in the lock.
+
+     In the ideal case, this operation is an atomic exchange operation,
+     in which the previous value in memory operand is copied into the
+     result operand, and the value operand is stored in the memory
+     operand.
+
+     For less capable targets, any value operand that is not the
+     constant 1 should be rejected with `FAIL'.  In this case the
+     target may use an atomic test-and-set bit operation.  The result
+     operand should contain 1 if the bit was previously set and 0 if
+     the bit was previously clear.  The true contents of the memory
+     operand are implementation defined.
+
+     This pattern must issue any memory barrier instructions such that
+     the pattern as a whole acts as an acquire barrier, that is all
+     memory operations after the pattern do not occur until the lock is
+     acquired.
+
+     If this pattern is not defined, the operation will be constructed
+     from a compare-and-swap operation, if defined.
+
+`sync_lock_releaseMODE'
+     This pattern, if defined, releases a lock set by
+     `sync_lock_test_and_setMODE'.  Operand 0 is the memory that
+     contains the lock; operand 1 is the value to store in the lock.
+
+     If the target doesn't implement full semantics for
+     `sync_lock_test_and_setMODE', any value operand which is not the
+     constant 0 should be rejected with `FAIL', and the true contents
+     of the memory operand are implementation defined.
+
+     This pattern must issue any memory barrier instructions such that
+     the pattern as a whole acts as a release barrier, that is the lock
+     is released only after all previous memory operations have
+     completed.
+
+     If this pattern is not defined, then a `memory_barrier' pattern
+     will be emitted, followed by a store of the value to the memory
+     operand.
+
+`stack_protect_set'
+     This pattern, if defined, moves a `Pmode' value from the memory in
+     operand 1 to the memory in operand 0 without leaving the value in
+     a register afterward.  This is to avoid leaking the value some
+     place that an attacker might use to rewrite the stack guard slot
+     after having clobbered it.
+
+     If this pattern is not defined, then a plain move pattern is
+     generated.
+
+`stack_protect_test'
+     This pattern, if defined, compares a `Pmode' value from the memory
+     in operand 1 with the memory in operand 0 without leaving the
+     value in a register afterward and branches to operand 2 if the
+     values weren't equal.
+
+     If this pattern is not defined, then a plain compare pattern and
+     conditional branch pattern is used.
+
+`clear_cache'
+     This pattern, if defined, flushes the instruction cache for a
+     region of memory.  The region is bounded to by the Pmode pointers
+     in operand 0 inclusive and operand 1 exclusive.
+
+     If this pattern is not defined, a call to the library function
+     `__clear_cache' is used.
+
+
+
+File: gccint.info,  Node: Pattern Ordering,  Next: Dependent Patterns,  Prev: Standard Names,  Up: Machine Desc
+
+16.10 When the Order of Patterns Matters
+========================================
+
+Sometimes an insn can match more than one instruction pattern.  Then the
+pattern that appears first in the machine description is the one used.
+Therefore, more specific patterns (patterns that will match fewer
+things) and faster instructions (those that will produce better code
+when they do match) should usually go first in the description.
+
+ In some cases the effect of ordering the patterns can be used to hide
+a pattern when it is not valid.  For example, the 68000 has an
+instruction for converting a fullword to floating point and another for
+converting a byte to floating point.  An instruction converting an
+integer to floating point could match either one.  We put the pattern
+to convert the fullword first to make sure that one will be used rather
+than the other.  (Otherwise a large integer might be generated as a
+single-byte immediate quantity, which would not work.)  Instead of
+using this pattern ordering it would be possible to make the pattern
+for convert-a-byte smart enough to deal properly with any constant
+value.
+
+
+File: gccint.info,  Node: Dependent Patterns,  Next: Jump Patterns,  Prev: Pattern Ordering,  Up: Machine Desc
+
+16.11 Interdependence of Patterns
+=================================
+
+In some cases machines support instructions identical except for the
+machine mode of one or more operands.  For example, there may be
+"sign-extend halfword" and "sign-extend byte" instructions whose
+patterns are
+
+     (set (match_operand:SI 0 ...)
+          (extend:SI (match_operand:HI 1 ...)))
+
+     (set (match_operand:SI 0 ...)
+          (extend:SI (match_operand:QI 1 ...)))
+
+Constant integers do not specify a machine mode, so an instruction to
+extend a constant value could match either pattern.  The pattern it
+actually will match is the one that appears first in the file.  For
+correct results, this must be the one for the widest possible mode
+(`HImode', here).  If the pattern matches the `QImode' instruction, the
+results will be incorrect if the constant value does not actually fit
+that mode.
+
+ Such instructions to extend constants are rarely generated because
+they are optimized away, but they do occasionally happen in nonoptimized
+compilations.
+
+ If a constraint in a pattern allows a constant, the reload pass may
+replace a register with a constant permitted by the constraint in some
+cases.  Similarly for memory references.  Because of this substitution,
+you should not provide separate patterns for increment and decrement
+instructions.  Instead, they should be generated from the same pattern
+that supports register-register add insns by examining the operands and
+generating the appropriate machine instruction.
+
+
+File: gccint.info,  Node: Jump Patterns,  Next: Looping Patterns,  Prev: Dependent Patterns,  Up: Machine Desc
+
+16.12 Defining Jump Instruction Patterns
+========================================
+
+GCC does not assume anything about how the machine realizes jumps.  The
+machine description should define a single pattern, usually a
+`define_expand', which expands to all the required insns.
+
+ Usually, this would be a comparison insn to set the condition code and
+a separate branch insn testing the condition code and branching or not
+according to its value.  For many machines, however, separating
+compares and branches is limiting, which is why the more flexible
+approach with one `define_expand' is used in GCC.  The machine
+description becomes clearer for architectures that have
+compare-and-branch instructions but no condition code.  It also works
+better when different sets of comparison operators are supported by
+different kinds of conditional branches (e.g. integer vs.
+floating-point), or by conditional branches with respect to conditional
+stores.
+
+ Two separate insns are always used if the machine description
+represents a condition code register using the legacy RTL expression
+`(cc0)', and on most machines that use a separate condition code
+register (*note Condition Code::).  For machines that use `(cc0)', in
+fact, the set and use of the condition code must be separate and
+adjacent(1), thus allowing flags in `cc_status' to be used (*note
+Condition Code::) and so that the comparison and branch insns could be
+located from each other by using the functions `prev_cc0_setter' and
+`next_cc0_user'.
+
+ Even in this case having a single entry point for conditional branches
+is advantageous, because it handles equally well the case where a single
+comparison instruction records the results of both signed and unsigned
+comparison of the given operands (with the branch insns coming in
+distinct signed and unsigned flavors) as in the x86 or SPARC, and the
+case where there are distinct signed and unsigned compare instructions
+and only one set of conditional branch instructions as in the PowerPC.
+
+ ---------- Footnotes ----------
+
+ (1) `note' insns can separate them, though.
+
+
+File: gccint.info,  Node: Looping Patterns,  Next: Insn Canonicalizations,  Prev: Jump Patterns,  Up: Machine Desc
+
+16.13 Defining Looping Instruction Patterns
+===========================================
+
+Some machines have special jump instructions that can be utilized to
+make loops more efficient.  A common example is the 68000 `dbra'
+instruction which performs a decrement of a register and a branch if the
+result was greater than zero.  Other machines, in particular digital
+signal processors (DSPs), have special block repeat instructions to
+provide low-overhead loop support.  For example, the TI TMS320C3x/C4x
+DSPs have a block repeat instruction that loads special registers to
+mark the top and end of a loop and to count the number of loop
+iterations.  This avoids the need for fetching and executing a
+`dbra'-like instruction and avoids pipeline stalls associated with the
+jump.
+
+ GCC has three special named patterns to support low overhead looping.
+They are `decrement_and_branch_until_zero', `doloop_begin', and
+`doloop_end'.  The first pattern, `decrement_and_branch_until_zero', is
+not emitted during RTL generation but may be emitted during the
+instruction combination phase.  This requires the assistance of the
+loop optimizer, using information collected during strength reduction,
+to reverse a loop to count down to zero.  Some targets also require the
+loop optimizer to add a `REG_NONNEG' note to indicate that the
+iteration count is always positive.  This is needed if the target
+performs a signed loop termination test.  For example, the 68000 uses a
+pattern similar to the following for its `dbra' instruction:
+
+     (define_insn "decrement_and_branch_until_zero"
+       [(set (pc)
+             (if_then_else
+               (ge (plus:SI (match_operand:SI 0 "general_operand" "+d*am")
+                            (const_int -1))
+                   (const_int 0))
+               (label_ref (match_operand 1 "" ""))
+               (pc)))
+        (set (match_dup 0)
+             (plus:SI (match_dup 0)
+                      (const_int -1)))]
+       "find_reg_note (insn, REG_NONNEG, 0)"
+       "...")
+
+ Note that since the insn is both a jump insn and has an output, it must
+deal with its own reloads, hence the `m' constraints.  Also note that
+since this insn is generated by the instruction combination phase
+combining two sequential insns together into an implicit parallel insn,
+the iteration counter needs to be biased by the same amount as the
+decrement operation, in this case -1.  Note that the following similar
+pattern will not be matched by the combiner.
+
+     (define_insn "decrement_and_branch_until_zero"
+       [(set (pc)
+             (if_then_else
+               (ge (match_operand:SI 0 "general_operand" "+d*am")
+                   (const_int 1))
+               (label_ref (match_operand 1 "" ""))
+               (pc)))
+        (set (match_dup 0)
+             (plus:SI (match_dup 0)
+                      (const_int -1)))]
+       "find_reg_note (insn, REG_NONNEG, 0)"
+       "...")
+
+ The other two special looping patterns, `doloop_begin' and
+`doloop_end', are emitted by the loop optimizer for certain
+well-behaved loops with a finite number of loop iterations using
+information collected during strength reduction.
+
+ The `doloop_end' pattern describes the actual looping instruction (or
+the implicit looping operation) and the `doloop_begin' pattern is an
+optional companion pattern that can be used for initialization needed
+for some low-overhead looping instructions.
+
+ Note that some machines require the actual looping instruction to be
+emitted at the top of the loop (e.g., the TMS320C3x/C4x DSPs).  Emitting
+the true RTL for a looping instruction at the top of the loop can cause
+problems with flow analysis.  So instead, a dummy `doloop' insn is
+emitted at the end of the loop.  The machine dependent reorg pass checks
+for the presence of this `doloop' insn and then searches back to the
+top of the loop, where it inserts the true looping insn (provided there
+are no instructions in the loop which would cause problems).  Any
+additional labels can be emitted at this point.  In addition, if the
+desired special iteration counter register was not allocated, this
+machine dependent reorg pass could emit a traditional compare and jump
+instruction pair.
+
+ The essential difference between the `decrement_and_branch_until_zero'
+and the `doloop_end' patterns is that the loop optimizer allocates an
+additional pseudo register for the latter as an iteration counter.
+This pseudo register cannot be used within the loop (i.e., general
+induction variables cannot be derived from it), however, in many cases
+the loop induction variable may become redundant and removed by the
+flow pass.
+
+
+File: gccint.info,  Node: Insn Canonicalizations,  Next: Expander Definitions,  Prev: Looping Patterns,  Up: Machine Desc
+
+16.14 Canonicalization of Instructions
+======================================
+
+There are often cases where multiple RTL expressions could represent an
+operation performed by a single machine instruction.  This situation is
+most commonly encountered with logical, branch, and multiply-accumulate
+instructions.  In such cases, the compiler attempts to convert these
+multiple RTL expressions into a single canonical form to reduce the
+number of insn patterns required.
+
+ In addition to algebraic simplifications, following canonicalizations
+are performed:
+
+   * For commutative and comparison operators, a constant is always
+     made the second operand.  If a machine only supports a constant as
+     the second operand, only patterns that match a constant in the
+     second operand need be supplied.
+
+   * For associative operators, a sequence of operators will always
+     chain to the left; for instance, only the left operand of an
+     integer `plus' can itself be a `plus'.  `and', `ior', `xor',
+     `plus', `mult', `smin', `smax', `umin', and `umax' are associative
+     when applied to integers, and sometimes to floating-point.
+
+   * For these operators, if only one operand is a `neg', `not',
+     `mult', `plus', or `minus' expression, it will be the first
+     operand.
+
+   * In combinations of `neg', `mult', `plus', and `minus', the `neg'
+     operations (if any) will be moved inside the operations as far as
+     possible.  For instance, `(neg (mult A B))' is canonicalized as
+     `(mult (neg A) B)', but `(plus (mult (neg B) C) A)' is
+     canonicalized as `(minus A (mult B C))'.
+
+   * For the `compare' operator, a constant is always the second operand
+     if the first argument is a condition code register or `(cc0)'.
+
+   * An operand of `neg', `not', `mult', `plus', or `minus' is made the
+     first operand under the same conditions as above.
+
+   * `(ltu (plus A B) B)' is converted to `(ltu (plus A B) A)'.
+     Likewise with `geu' instead of `ltu'.
+
+   * `(minus X (const_int N))' is converted to `(plus X (const_int
+     -N))'.
+
+   * Within address computations (i.e., inside `mem'), a left shift is
+     converted into the appropriate multiplication by a power of two.
+
+   * De Morgan's Law is used to move bitwise negation inside a bitwise
+     logical-and or logical-or operation.  If this results in only one
+     operand being a `not' expression, it will be the first one.
+
+     A machine that has an instruction that performs a bitwise
+     logical-and of one operand with the bitwise negation of the other
+     should specify the pattern for that instruction as
+
+          (define_insn ""
+            [(set (match_operand:M 0 ...)
+                  (and:M (not:M (match_operand:M 1 ...))
+                               (match_operand:M 2 ...)))]
+            "..."
+            "...")
+
+     Similarly, a pattern for a "NAND" instruction should be written
+
+          (define_insn ""
+            [(set (match_operand:M 0 ...)
+                  (ior:M (not:M (match_operand:M 1 ...))
+                               (not:M (match_operand:M 2 ...))))]
+            "..."
+            "...")
+
+     In both cases, it is not necessary to include patterns for the many
+     logically equivalent RTL expressions.
+
+   * The only possible RTL expressions involving both bitwise
+     exclusive-or and bitwise negation are `(xor:M X Y)' and `(not:M
+     (xor:M X Y))'.
+
+   * The sum of three items, one of which is a constant, will only
+     appear in the form
+
+          (plus:M (plus:M X Y) CONSTANT)
+
+   * Equality comparisons of a group of bits (usually a single bit)
+     with zero will be written using `zero_extract' rather than the
+     equivalent `and' or `sign_extract' operations.
+
+
+ Further canonicalization rules are defined in the function
+`commutative_operand_precedence' in `gcc/rtlanal.c'.
+
+
+File: gccint.info,  Node: Expander Definitions,  Next: Insn Splitting,  Prev: Insn Canonicalizations,  Up: Machine Desc
+
+16.15 Defining RTL Sequences for Code Generation
+================================================
+
+On some target machines, some standard pattern names for RTL generation
+cannot be handled with single insn, but a sequence of RTL insns can
+represent them.  For these target machines, you can write a
+`define_expand' to specify how to generate the sequence of RTL.
+
+ A `define_expand' is an RTL expression that looks almost like a
+`define_insn'; but, unlike the latter, a `define_expand' is used only
+for RTL generation and it can produce more than one RTL insn.
+
+ A `define_expand' RTX has four operands:
+
+   * The name.  Each `define_expand' must have a name, since the only
+     use for it is to refer to it by name.
+
+   * The RTL template.  This is a vector of RTL expressions representing
+     a sequence of separate instructions.  Unlike `define_insn', there
+     is no implicit surrounding `PARALLEL'.
+
+   * The condition, a string containing a C expression.  This
+     expression is used to express how the availability of this pattern
+     depends on subclasses of target machine, selected by command-line
+     options when GCC is run.  This is just like the condition of a
+     `define_insn' that has a standard name.  Therefore, the condition
+     (if present) may not depend on the data in the insn being matched,
+     but only the target-machine-type flags.  The compiler needs to
+     test these conditions during initialization in order to learn
+     exactly which named instructions are available in a particular run.
+
+   * The preparation statements, a string containing zero or more C
+     statements which are to be executed before RTL code is generated
+     from the RTL template.
+
+     Usually these statements prepare temporary registers for use as
+     internal operands in the RTL template, but they can also generate
+     RTL insns directly by calling routines such as `emit_insn', etc.
+     Any such insns precede the ones that come from the RTL template.
+
+ Every RTL insn emitted by a `define_expand' must match some
+`define_insn' in the machine description.  Otherwise, the compiler will
+crash when trying to generate code for the insn or trying to optimize
+it.
+
+ The RTL template, in addition to controlling generation of RTL insns,
+also describes the operands that need to be specified when this pattern
+is used.  In particular, it gives a predicate for each operand.
+
+ A true operand, which needs to be specified in order to generate RTL
+from the pattern, should be described with a `match_operand' in its
+first occurrence in the RTL template.  This enters information on the
+operand's predicate into the tables that record such things.  GCC uses
+the information to preload the operand into a register if that is
+required for valid RTL code.  If the operand is referred to more than
+once, subsequent references should use `match_dup'.
+
+ The RTL template may also refer to internal "operands" which are
+temporary registers or labels used only within the sequence made by the
+`define_expand'.  Internal operands are substituted into the RTL
+template with `match_dup', never with `match_operand'.  The values of
+the internal operands are not passed in as arguments by the compiler
+when it requests use of this pattern.  Instead, they are computed
+within the pattern, in the preparation statements.  These statements
+compute the values and store them into the appropriate elements of
+`operands' so that `match_dup' can find them.
+
+ There are two special macros defined for use in the preparation
+statements: `DONE' and `FAIL'.  Use them with a following semicolon, as
+a statement.
+
+`DONE'
+     Use the `DONE' macro to end RTL generation for the pattern.  The
+     only RTL insns resulting from the pattern on this occasion will be
+     those already emitted by explicit calls to `emit_insn' within the
+     preparation statements; the RTL template will not be generated.
+
+`FAIL'
+     Make the pattern fail on this occasion.  When a pattern fails, it
+     means that the pattern was not truly available.  The calling
+     routines in the compiler will try other strategies for code
+     generation using other patterns.
+
+     Failure is currently supported only for binary (addition,
+     multiplication, shifting, etc.) and bit-field (`extv', `extzv',
+     and `insv') operations.
+
+ If the preparation falls through (invokes neither `DONE' nor `FAIL'),
+then the `define_expand' acts like a `define_insn' in that the RTL
+template is used to generate the insn.
+
+ The RTL template is not used for matching, only for generating the
+initial insn list.  If the preparation statement always invokes `DONE'
+or `FAIL', the RTL template may be reduced to a simple list of
+operands, such as this example:
+
+     (define_expand "addsi3"
+       [(match_operand:SI 0 "register_operand" "")
+        (match_operand:SI 1 "register_operand" "")
+        (match_operand:SI 2 "register_operand" "")]
+       ""
+       "
+     {
+       handle_add (operands[0], operands[1], operands[2]);
+       DONE;
+     }")
+
+ Here is an example, the definition of left-shift for the SPUR chip:
+
+     (define_expand "ashlsi3"
+       [(set (match_operand:SI 0 "register_operand" "")
+             (ashift:SI
+               (match_operand:SI 1 "register_operand" "")
+               (match_operand:SI 2 "nonmemory_operand" "")))]
+       ""
+       "
+
+     {
+       if (GET_CODE (operands[2]) != CONST_INT
+           || (unsigned) INTVAL (operands[2]) > 3)
+         FAIL;
+     }")
+
+This example uses `define_expand' so that it can generate an RTL insn
+for shifting when the shift-count is in the supported range of 0 to 3
+but fail in other cases where machine insns aren't available.  When it
+fails, the compiler tries another strategy using different patterns
+(such as, a library call).
+
+ If the compiler were able to handle nontrivial condition-strings in
+patterns with names, then it would be possible to use a `define_insn'
+in that case.  Here is another case (zero-extension on the 68000) which
+makes more use of the power of `define_expand':
+
+     (define_expand "zero_extendhisi2"
+       [(set (match_operand:SI 0 "general_operand" "")
+             (const_int 0))
+        (set (strict_low_part
+               (subreg:HI
+                 (match_dup 0)
+                 0))
+             (match_operand:HI 1 "general_operand" ""))]
+       ""
+       "operands[1] = make_safe_from (operands[1], operands[0]);")
+
+Here two RTL insns are generated, one to clear the entire output operand
+and the other to copy the input operand into its low half.  This
+sequence is incorrect if the input operand refers to [the old value of]
+the output operand, so the preparation statement makes sure this isn't
+so.  The function `make_safe_from' copies the `operands[1]' into a
+temporary register if it refers to `operands[0]'.  It does this by
+emitting another RTL insn.
+
+ Finally, a third example shows the use of an internal operand.
+Zero-extension on the SPUR chip is done by `and'-ing the result against
+a halfword mask.  But this mask cannot be represented by a `const_int'
+because the constant value is too large to be legitimate on this
+machine.  So it must be copied into a register with `force_reg' and
+then the register used in the `and'.
+
+     (define_expand "zero_extendhisi2"
+       [(set (match_operand:SI 0 "register_operand" "")
+             (and:SI (subreg:SI
+                       (match_operand:HI 1 "register_operand" "")
+                       0)
+                     (match_dup 2)))]
+       ""
+       "operands[2]
+          = force_reg (SImode, GEN_INT (65535)); ")
+
+ _Note:_ If the `define_expand' is used to serve a standard binary or
+unary arithmetic operation or a bit-field operation, then the last insn
+it generates must not be a `code_label', `barrier' or `note'.  It must
+be an `insn', `jump_insn' or `call_insn'.  If you don't need a real insn
+at the end, emit an insn to copy the result of the operation into
+itself.  Such an insn will generate no code, but it can avoid problems
+in the compiler.
+
+
+File: gccint.info,  Node: Insn Splitting,  Next: Including Patterns,  Prev: Expander Definitions,  Up: Machine Desc
+
+16.16 Defining How to Split Instructions
+========================================
+
+There are two cases where you should specify how to split a pattern
+into multiple insns.  On machines that have instructions requiring
+delay slots (*note Delay Slots::) or that have instructions whose
+output is not available for multiple cycles (*note Processor pipeline
+description::), the compiler phases that optimize these cases need to
+be able to move insns into one-instruction delay slots.  However, some
+insns may generate more than one machine instruction.  These insns
+cannot be placed into a delay slot.
+
+ Often you can rewrite the single insn as a list of individual insns,
+each corresponding to one machine instruction.  The disadvantage of
+doing so is that it will cause the compilation to be slower and require
+more space.  If the resulting insns are too complex, it may also
+suppress some optimizations.  The compiler splits the insn if there is a
+reason to believe that it might improve instruction or delay slot
+scheduling.
+
+ The insn combiner phase also splits putative insns.  If three insns are
+merged into one insn with a complex expression that cannot be matched by
+some `define_insn' pattern, the combiner phase attempts to split the
+complex pattern into two insns that are recognized.  Usually it can
+break the complex pattern into two patterns by splitting out some
+subexpression.  However, in some other cases, such as performing an
+addition of a large constant in two insns on a RISC machine, the way to
+split the addition into two insns is machine-dependent.
+
+ The `define_split' definition tells the compiler how to split a
+complex insn into several simpler insns.  It looks like this:
+
+     (define_split
+       [INSN-PATTERN]
+       "CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS")
+
+ INSN-PATTERN is a pattern that needs to be split and CONDITION is the
+final condition to be tested, as in a `define_insn'.  When an insn
+matching INSN-PATTERN and satisfying CONDITION is found, it is replaced
+in the insn list with the insns given by NEW-INSN-PATTERN-1,
+NEW-INSN-PATTERN-2, etc.
+
+ The PREPARATION-STATEMENTS are similar to those statements that are
+specified for `define_expand' (*note Expander Definitions::) and are
+executed before the new RTL is generated to prepare for the generated
+code or emit some insns whose pattern is not fixed.  Unlike those in
+`define_expand', however, these statements must not generate any new
+pseudo-registers.  Once reload has completed, they also must not
+allocate any space in the stack frame.
+
+ Patterns are matched against INSN-PATTERN in two different
+circumstances.  If an insn needs to be split for delay slot scheduling
+or insn scheduling, the insn is already known to be valid, which means
+that it must have been matched by some `define_insn' and, if
+`reload_completed' is nonzero, is known to satisfy the constraints of
+that `define_insn'.  In that case, the new insn patterns must also be
+insns that are matched by some `define_insn' and, if `reload_completed'
+is nonzero, must also satisfy the constraints of those definitions.
+
+ As an example of this usage of `define_split', consider the following
+example from `a29k.md', which splits a `sign_extend' from `HImode' to
+`SImode' into a pair of shift insns:
+
+     (define_split
+       [(set (match_operand:SI 0 "gen_reg_operand" "")
+             (sign_extend:SI (match_operand:HI 1 "gen_reg_operand" "")))]
+       ""
+       [(set (match_dup 0)
+             (ashift:SI (match_dup 1)
+                        (const_int 16)))
+        (set (match_dup 0)
+             (ashiftrt:SI (match_dup 0)
+                          (const_int 16)))]
+       "
+     { operands[1] = gen_lowpart (SImode, operands[1]); }")
+
+ When the combiner phase tries to split an insn pattern, it is always
+the case that the pattern is _not_ matched by any `define_insn'.  The
+combiner pass first tries to split a single `set' expression and then
+the same `set' expression inside a `parallel', but followed by a
+`clobber' of a pseudo-reg to use as a scratch register.  In these
+cases, the combiner expects exactly two new insn patterns to be
+generated.  It will verify that these patterns match some `define_insn'
+definitions, so you need not do this test in the `define_split' (of
+course, there is no point in writing a `define_split' that will never
+produce insns that match).
+
+ Here is an example of this use of `define_split', taken from
+`rs6000.md':
+
+     (define_split
+       [(set (match_operand:SI 0 "gen_reg_operand" "")
+             (plus:SI (match_operand:SI 1 "gen_reg_operand" "")
+                      (match_operand:SI 2 "non_add_cint_operand" "")))]
+       ""
+       [(set (match_dup 0) (plus:SI (match_dup 1) (match_dup 3)))
+        (set (match_dup 0) (plus:SI (match_dup 0) (match_dup 4)))]
+     "
+     {
+       int low = INTVAL (operands[2]) & 0xffff;
+       int high = (unsigned) INTVAL (operands[2]) >> 16;
+
+       if (low & 0x8000)
+         high++, low |= 0xffff0000;
+
+       operands[3] = GEN_INT (high << 16);
+       operands[4] = GEN_INT (low);
+     }")
+
+ Here the predicate `non_add_cint_operand' matches any `const_int' that
+is _not_ a valid operand of a single add insn.  The add with the
+smaller displacement is written so that it can be substituted into the
+address of a subsequent operation.
+
+ An example that uses a scratch register, from the same file, generates
+an equality comparison of a register and a large constant:
+
+     (define_split
+       [(set (match_operand:CC 0 "cc_reg_operand" "")
+             (compare:CC (match_operand:SI 1 "gen_reg_operand" "")
+                         (match_operand:SI 2 "non_short_cint_operand" "")))
+        (clobber (match_operand:SI 3 "gen_reg_operand" ""))]
+       "find_single_use (operands[0], insn, 0)
+        && (GET_CODE (*find_single_use (operands[0], insn, 0)) == EQ
+            || GET_CODE (*find_single_use (operands[0], insn, 0)) == NE)"
+       [(set (match_dup 3) (xor:SI (match_dup 1) (match_dup 4)))
+        (set (match_dup 0) (compare:CC (match_dup 3) (match_dup 5)))]
+       "
+     {
+       /* Get the constant we are comparing against, C, and see what it
+          looks like sign-extended to 16 bits.  Then see what constant
+          could be XOR'ed with C to get the sign-extended value.  */
+
+       int c = INTVAL (operands[2]);
+       int sextc = (c << 16) >> 16;
+       int xorv = c ^ sextc;
+
+       operands[4] = GEN_INT (xorv);
+       operands[5] = GEN_INT (sextc);
+     }")
+
+ To avoid confusion, don't write a single `define_split' that accepts
+some insns that match some `define_insn' as well as some insns that
+don't.  Instead, write two separate `define_split' definitions, one for
+the insns that are valid and one for the insns that are not valid.
+
+ The splitter is allowed to split jump instructions into sequence of
+jumps or create new jumps in while splitting non-jump instructions.  As
+the central flowgraph and branch prediction information needs to be
+updated, several restriction apply.
+
+ Splitting of jump instruction into sequence that over by another jump
+instruction is always valid, as compiler expect identical behavior of
+new jump.  When new sequence contains multiple jump instructions or new
+labels, more assistance is needed.  Splitter is required to create only
+unconditional jumps, or simple conditional jump instructions.
+Additionally it must attach a `REG_BR_PROB' note to each conditional
+jump.  A global variable `split_branch_probability' holds the
+probability of the original branch in case it was a simple conditional
+jump, -1 otherwise.  To simplify recomputing of edge frequencies, the
+new sequence is required to have only forward jumps to the newly
+created labels.
+
+ For the common case where the pattern of a define_split exactly
+matches the pattern of a define_insn, use `define_insn_and_split'.  It
+looks like this:
+
+     (define_insn_and_split
+       [INSN-PATTERN]
+       "CONDITION"
+       "OUTPUT-TEMPLATE"
+       "SPLIT-CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS"
+       [INSN-ATTRIBUTES])
+
+ INSN-PATTERN, CONDITION, OUTPUT-TEMPLATE, and INSN-ATTRIBUTES are used
+as in `define_insn'.  The NEW-INSN-PATTERN vector and the
+PREPARATION-STATEMENTS are used as in a `define_split'.  The
+SPLIT-CONDITION is also used as in `define_split', with the additional
+behavior that if the condition starts with `&&', the condition used for
+the split will be the constructed as a logical "and" of the split
+condition with the insn condition.  For example, from i386.md:
+
+     (define_insn_and_split "zero_extendhisi2_and"
+       [(set (match_operand:SI 0 "register_operand" "=r")
+          (zero_extend:SI (match_operand:HI 1 "register_operand" "0")))
+        (clobber (reg:CC 17))]
+       "TARGET_ZERO_EXTEND_WITH_AND && !optimize_size"
+       "#"
+       "&& reload_completed"
+       [(parallel [(set (match_dup 0)
+                        (and:SI (match_dup 0) (const_int 65535)))
+                   (clobber (reg:CC 17))])]
+       ""
+       [(set_attr "type" "alu1")])
+
+ In this case, the actual split condition will be
+`TARGET_ZERO_EXTEND_WITH_AND && !optimize_size && reload_completed'.
+
+ The `define_insn_and_split' construction provides exactly the same
+functionality as two separate `define_insn' and `define_split'
+patterns.  It exists for compactness, and as a maintenance tool to
+prevent having to ensure the two patterns' templates match.
+
+
+File: gccint.info,  Node: Including Patterns,  Next: Peephole Definitions,  Prev: Insn Splitting,  Up: Machine Desc
+
+16.17 Including Patterns in Machine Descriptions.
+=================================================
+
+The `include' pattern tells the compiler tools where to look for
+patterns that are in files other than in the file `.md'.  This is used
+only at build time and there is no preprocessing allowed.
+
+ It looks like:
+
+
+     (include
+       PATHNAME)
+
+ For example:
+
+
+     (include "filestuff")
+
+ Where PATHNAME is a string that specifies the location of the file,
+specifies the include file to be in `gcc/config/target/filestuff'.  The
+directory `gcc/config/target' is regarded as the default directory.
+
+ Machine descriptions may be split up into smaller more manageable
+subsections and placed into subdirectories.
+
+ By specifying:
+
+
+     (include "BOGUS/filestuff")
+
+ the include file is specified to be in
+`gcc/config/TARGET/BOGUS/filestuff'.
+
+ Specifying an absolute path for the include file such as;
+
+     (include "/u2/BOGUS/filestuff")
+ is permitted but is not encouraged.
+
+16.17.1 RTL Generation Tool Options for Directory Search
+--------------------------------------------------------
+
+The `-IDIR' option specifies directories to search for machine
+descriptions.  For example:
+
+
+     genrecog -I/p1/abc/proc1 -I/p2/abcd/pro2 target.md
+
+ Add the directory DIR to the head of the list of directories to be
+searched for header files.  This can be used to override a system
+machine definition file, substituting your own version, since these
+directories are searched before the default machine description file
+directories.  If you use more than one `-I' option, the directories are
+scanned in left-to-right order; the standard default directory come
+after.
+
+
+File: gccint.info,  Node: Peephole Definitions,  Next: Insn Attributes,  Prev: Including Patterns,  Up: Machine Desc
+
+16.18 Machine-Specific Peephole Optimizers
+==========================================
+
+In addition to instruction patterns the `md' file may contain
+definitions of machine-specific peephole optimizations.
+
+ The combiner does not notice certain peephole optimizations when the
+data flow in the program does not suggest that it should try them.  For
+example, sometimes two consecutive insns related in purpose can be
+combined even though the second one does not appear to use a register
+computed in the first one.  A machine-specific peephole optimizer can
+detect such opportunities.
+
+ There are two forms of peephole definitions that may be used.  The
+original `define_peephole' is run at assembly output time to match
+insns and substitute assembly text.  Use of `define_peephole' is
+deprecated.
+
+ A newer `define_peephole2' matches insns and substitutes new insns.
+The `peephole2' pass is run after register allocation but before
+scheduling, which may result in much better code for targets that do
+scheduling.
+
+* Menu:
+
+* define_peephole::     RTL to Text Peephole Optimizers
+* define_peephole2::    RTL to RTL Peephole Optimizers
+
+
+File: gccint.info,  Node: define_peephole,  Next: define_peephole2,  Up: Peephole Definitions
+
+16.18.1 RTL to Text Peephole Optimizers
+---------------------------------------
+
+A definition looks like this:
+
+     (define_peephole
+       [INSN-PATTERN-1
+        INSN-PATTERN-2
+        ...]
+       "CONDITION"
+       "TEMPLATE"
+       "OPTIONAL-INSN-ATTRIBUTES")
+
+The last string operand may be omitted if you are not using any
+machine-specific information in this machine description.  If present,
+it must obey the same rules as in a `define_insn'.
+
+ In this skeleton, INSN-PATTERN-1 and so on are patterns to match
+consecutive insns.  The optimization applies to a sequence of insns when
+INSN-PATTERN-1 matches the first one, INSN-PATTERN-2 matches the next,
+and so on.
+
+ Each of the insns matched by a peephole must also match a
+`define_insn'.  Peepholes are checked only at the last stage just
+before code generation, and only optionally.  Therefore, any insn which
+would match a peephole but no `define_insn' will cause a crash in code
+generation in an unoptimized compilation, or at various optimization
+stages.
+
+ The operands of the insns are matched with `match_operands',
+`match_operator', and `match_dup', as usual.  What is not usual is that
+the operand numbers apply to all the insn patterns in the definition.
+So, you can check for identical operands in two insns by using
+`match_operand' in one insn and `match_dup' in the other.
+
+ The operand constraints used in `match_operand' patterns do not have
+any direct effect on the applicability of the peephole, but they will
+be validated afterward, so make sure your constraints are general enough
+to apply whenever the peephole matches.  If the peephole matches but
+the constraints are not satisfied, the compiler will crash.
+
+ It is safe to omit constraints in all the operands of the peephole; or
+you can write constraints which serve as a double-check on the criteria
+previously tested.
+
+ Once a sequence of insns matches the patterns, the CONDITION is
+checked.  This is a C expression which makes the final decision whether
+to perform the optimization (we do so if the expression is nonzero).  If
+CONDITION is omitted (in other words, the string is empty) then the
+optimization is applied to every sequence of insns that matches the
+patterns.
+
+ The defined peephole optimizations are applied after register
+allocation is complete.  Therefore, the peephole definition can check
+which operands have ended up in which kinds of registers, just by
+looking at the operands.
+
+ The way to refer to the operands in CONDITION is to write
+`operands[I]' for operand number I (as matched by `(match_operand I
+...)').  Use the variable `insn' to refer to the last of the insns
+being matched; use `prev_active_insn' to find the preceding insns.
+
+ When optimizing computations with intermediate results, you can use
+CONDITION to match only when the intermediate results are not used
+elsewhere.  Use the C expression `dead_or_set_p (INSN, OP)', where INSN
+is the insn in which you expect the value to be used for the last time
+(from the value of `insn', together with use of `prev_nonnote_insn'),
+and OP is the intermediate value (from `operands[I]').
+
+ Applying the optimization means replacing the sequence of insns with
+one new insn.  The TEMPLATE controls ultimate output of assembler code
+for this combined insn.  It works exactly like the template of a
+`define_insn'.  Operand numbers in this template are the same ones used
+in matching the original sequence of insns.
+
+ The result of a defined peephole optimizer does not need to match any
+of the insn patterns in the machine description; it does not even have
+an opportunity to match them.  The peephole optimizer definition itself
+serves as the insn pattern to control how the insn is output.
+
+ Defined peephole optimizers are run as assembler code is being output,
+so the insns they produce are never combined or rearranged in any way.
+
+ Here is an example, taken from the 68000 machine description:
+
+     (define_peephole
+       [(set (reg:SI 15) (plus:SI (reg:SI 15) (const_int 4)))
+        (set (match_operand:DF 0 "register_operand" "=f")
+             (match_operand:DF 1 "register_operand" "ad"))]
+       "FP_REG_P (operands[0]) && ! FP_REG_P (operands[1])"
+     {
+       rtx xoperands[2];
+       xoperands[1] = gen_rtx_REG (SImode, REGNO (operands[1]) + 1);
+     #ifdef MOTOROLA
+       output_asm_insn ("move.l %1,(sp)", xoperands);
+       output_asm_insn ("move.l %1,-(sp)", operands);
+       return "fmove.d (sp)+,%0";
+     #else
+       output_asm_insn ("movel %1,sp@", xoperands);
+       output_asm_insn ("movel %1,sp@-", operands);
+       return "fmoved sp@+,%0";
+     #endif
+     })
+
+ The effect of this optimization is to change
+
+     jbsr _foobar
+     addql #4,sp
+     movel d1,sp@-
+     movel d0,sp@-
+     fmoved sp@+,fp0
+
+into
+
+     jbsr _foobar
+     movel d1,sp@
+     movel d0,sp@-
+     fmoved sp@+,fp0
+
+ INSN-PATTERN-1 and so on look _almost_ like the second operand of
+`define_insn'.  There is one important difference: the second operand
+of `define_insn' consists of one or more RTX's enclosed in square
+brackets.  Usually, there is only one: then the same action can be
+written as an element of a `define_peephole'.  But when there are
+multiple actions in a `define_insn', they are implicitly enclosed in a
+`parallel'.  Then you must explicitly write the `parallel', and the
+square brackets within it, in the `define_peephole'.  Thus, if an insn
+pattern looks like this,
+
+     (define_insn "divmodsi4"
+       [(set (match_operand:SI 0 "general_operand" "=d")
+             (div:SI (match_operand:SI 1 "general_operand" "0")
+                     (match_operand:SI 2 "general_operand" "dmsK")))
+        (set (match_operand:SI 3 "general_operand" "=d")
+             (mod:SI (match_dup 1) (match_dup 2)))]
+       "TARGET_68020"
+       "divsl%.l %2,%3:%0")
+
+then the way to mention this insn in a peephole is as follows:
+
+     (define_peephole
+       [...
+        (parallel
+         [(set (match_operand:SI 0 "general_operand" "=d")
+               (div:SI (match_operand:SI 1 "general_operand" "0")
+                       (match_operand:SI 2 "general_operand" "dmsK")))
+          (set (match_operand:SI 3 "general_operand" "=d")
+               (mod:SI (match_dup 1) (match_dup 2)))])
+        ...]
+       ...)
+
+
+File: gccint.info,  Node: define_peephole2,  Prev: define_peephole,  Up: Peephole Definitions
+
+16.18.2 RTL to RTL Peephole Optimizers
+--------------------------------------
+
+The `define_peephole2' definition tells the compiler how to substitute
+one sequence of instructions for another sequence, what additional
+scratch registers may be needed and what their lifetimes must be.
+
+     (define_peephole2
+       [INSN-PATTERN-1
+        INSN-PATTERN-2
+        ...]
+       "CONDITION"
+       [NEW-INSN-PATTERN-1
+        NEW-INSN-PATTERN-2
+        ...]
+       "PREPARATION-STATEMENTS")
+
+ The definition is almost identical to `define_split' (*note Insn
+Splitting::) except that the pattern to match is not a single
+instruction, but a sequence of instructions.
+
+ It is possible to request additional scratch registers for use in the
+output template.  If appropriate registers are not free, the pattern
+will simply not match.
+
+ Scratch registers are requested with a `match_scratch' pattern at the
+top level of the input pattern.  The allocated register (initially) will
+be dead at the point requested within the original sequence.  If the
+scratch is used at more than a single point, a `match_dup' pattern at
+the top level of the input pattern marks the last position in the input
+sequence at which the register must be available.
+
+ Here is an example from the IA-32 machine description:
+
+     (define_peephole2
+       [(match_scratch:SI 2 "r")
+        (parallel [(set (match_operand:SI 0 "register_operand" "")
+                        (match_operator:SI 3 "arith_or_logical_operator"
+                          [(match_dup 0)
+                           (match_operand:SI 1 "memory_operand" "")]))
+                   (clobber (reg:CC 17))])]
+       "! optimize_size && ! TARGET_READ_MODIFY"
+       [(set (match_dup 2) (match_dup 1))
+        (parallel [(set (match_dup 0)
+                        (match_op_dup 3 [(match_dup 0) (match_dup 2)]))
+                   (clobber (reg:CC 17))])]
+       "")
+
+This pattern tries to split a load from its use in the hopes that we'll
+be able to schedule around the memory load latency.  It allocates a
+single `SImode' register of class `GENERAL_REGS' (`"r"') that needs to
+be live only at the point just before the arithmetic.
+
+ A real example requiring extended scratch lifetimes is harder to come
+by, so here's a silly made-up example:
+
+     (define_peephole2
+       [(match_scratch:SI 4 "r")
+        (set (match_operand:SI 0 "" "") (match_operand:SI 1 "" ""))
+        (set (match_operand:SI 2 "" "") (match_dup 1))
+        (match_dup 4)
+        (set (match_operand:SI 3 "" "") (match_dup 1))]
+       "/* determine 1 does not overlap 0 and 2 */"
+       [(set (match_dup 4) (match_dup 1))
+        (set (match_dup 0) (match_dup 4))
+        (set (match_dup 2) (match_dup 4))]
+        (set (match_dup 3) (match_dup 4))]
+       "")
+
+If we had not added the `(match_dup 4)' in the middle of the input
+sequence, it might have been the case that the register we chose at the
+beginning of the sequence is killed by the first or second `set'.
+
+
+File: gccint.info,  Node: Insn Attributes,  Next: Conditional Execution,  Prev: Peephole Definitions,  Up: Machine Desc
+
+16.19 Instruction Attributes
+============================
+
+In addition to describing the instruction supported by the target
+machine, the `md' file also defines a group of "attributes" and a set of
+values for each.  Every generated insn is assigned a value for each
+attribute.  One possible attribute would be the effect that the insn
+has on the machine's condition code.  This attribute can then be used
+by `NOTICE_UPDATE_CC' to track the condition codes.
+
+* Menu:
+
+* Defining Attributes:: Specifying attributes and their values.
+* Expressions::         Valid expressions for attribute values.
+* Tagging Insns::       Assigning attribute values to insns.
+* Attr Example::        An example of assigning attributes.
+* Insn Lengths::        Computing the length of insns.
+* Constant Attributes:: Defining attributes that are constant.
+* Delay Slots::         Defining delay slots required for a machine.
+* Processor pipeline description:: Specifying information for insn scheduling.
+
+
+File: gccint.info,  Node: Defining Attributes,  Next: Expressions,  Up: Insn Attributes
+
+16.19.1 Defining Attributes and their Values
+--------------------------------------------
+
+The `define_attr' expression is used to define each attribute required
+by the target machine.  It looks like:
+
+     (define_attr NAME LIST-OF-VALUES DEFAULT)
+
+ NAME is a string specifying the name of the attribute being defined.
+
+ LIST-OF-VALUES is either a string that specifies a comma-separated
+list of values that can be assigned to the attribute, or a null string
+to indicate that the attribute takes numeric values.
+
+ DEFAULT is an attribute expression that gives the value of this
+attribute for insns that match patterns whose definition does not
+include an explicit value for this attribute.  *Note Attr Example::,
+for more information on the handling of defaults.  *Note Constant
+Attributes::, for information on attributes that do not depend on any
+particular insn.
+
+ For each defined attribute, a number of definitions are written to the
+`insn-attr.h' file.  For cases where an explicit set of values is
+specified for an attribute, the following are defined:
+
+   * A `#define' is written for the symbol `HAVE_ATTR_NAME'.
+
+   * An enumerated class is defined for `attr_NAME' with elements of
+     the form `UPPER-NAME_UPPER-VALUE' where the attribute name and
+     value are first converted to uppercase.
+
+   * A function `get_attr_NAME' is defined that is passed an insn and
+     returns the attribute value for that insn.
+
+ For example, if the following is present in the `md' file:
+
+     (define_attr "type" "branch,fp,load,store,arith" ...)
+
+the following lines will be written to the file `insn-attr.h'.
+
+     #define HAVE_ATTR_type
+     enum attr_type {TYPE_BRANCH, TYPE_FP, TYPE_LOAD,
+                      TYPE_STORE, TYPE_ARITH};
+     extern enum attr_type get_attr_type ();
+
+ If the attribute takes numeric values, no `enum' type will be defined
+and the function to obtain the attribute's value will return `int'.
+
+ There are attributes which are tied to a specific meaning.  These
+attributes are not free to use for other purposes:
+
+`length'
+     The `length' attribute is used to calculate the length of emitted
+     code chunks.  This is especially important when verifying branch
+     distances. *Note Insn Lengths::.
+
+`enabled'
+     The `enabled' attribute can be defined to prevent certain
+     alternatives of an insn definition from being used during code
+     generation. *Note Disable Insn Alternatives::.
+
+
+
+File: gccint.info,  Node: Expressions,  Next: Tagging Insns,  Prev: Defining Attributes,  Up: Insn Attributes
+
+16.19.2 Attribute Expressions
+-----------------------------
+
+RTL expressions used to define attributes use the codes described above
+plus a few specific to attribute definitions, to be discussed below.
+Attribute value expressions must have one of the following forms:
+
+`(const_int I)'
+     The integer I specifies the value of a numeric attribute.  I must
+     be non-negative.
+
+     The value of a numeric attribute can be specified either with a
+     `const_int', or as an integer represented as a string in
+     `const_string', `eq_attr' (see below), `attr', `symbol_ref',
+     simple arithmetic expressions, and `set_attr' overrides on
+     specific instructions (*note Tagging Insns::).
+
+`(const_string VALUE)'
+     The string VALUE specifies a constant attribute value.  If VALUE
+     is specified as `"*"', it means that the default value of the
+     attribute is to be used for the insn containing this expression.
+     `"*"' obviously cannot be used in the DEFAULT expression of a
+     `define_attr'.
+
+     If the attribute whose value is being specified is numeric, VALUE
+     must be a string containing a non-negative integer (normally
+     `const_int' would be used in this case).  Otherwise, it must
+     contain one of the valid values for the attribute.
+
+`(if_then_else TEST TRUE-VALUE FALSE-VALUE)'
+     TEST specifies an attribute test, whose format is defined below.
+     The value of this expression is TRUE-VALUE if TEST is true,
+     otherwise it is FALSE-VALUE.
+
+`(cond [TEST1 VALUE1 ...] DEFAULT)'
+     The first operand of this expression is a vector containing an even
+     number of expressions and consisting of pairs of TEST and VALUE
+     expressions.  The value of the `cond' expression is that of the
+     VALUE corresponding to the first true TEST expression.  If none of
+     the TEST expressions are true, the value of the `cond' expression
+     is that of the DEFAULT expression.
+
+ TEST expressions can have one of the following forms:
+
+`(const_int I)'
+     This test is true if I is nonzero and false otherwise.
+
+`(not TEST)'
+`(ior TEST1 TEST2)'
+`(and TEST1 TEST2)'
+     These tests are true if the indicated logical function is true.
+
+`(match_operand:M N PRED CONSTRAINTS)'
+     This test is true if operand N of the insn whose attribute value
+     is being determined has mode M (this part of the test is ignored
+     if M is `VOIDmode') and the function specified by the string PRED
+     returns a nonzero value when passed operand N and mode M (this
+     part of the test is ignored if PRED is the null string).
+
+     The CONSTRAINTS operand is ignored and should be the null string.
+
+`(le ARITH1 ARITH2)'
+`(leu ARITH1 ARITH2)'
+`(lt ARITH1 ARITH2)'
+`(ltu ARITH1 ARITH2)'
+`(gt ARITH1 ARITH2)'
+`(gtu ARITH1 ARITH2)'
+`(ge ARITH1 ARITH2)'
+`(geu ARITH1 ARITH2)'
+`(ne ARITH1 ARITH2)'
+`(eq ARITH1 ARITH2)'
+     These tests are true if the indicated comparison of the two
+     arithmetic expressions is true.  Arithmetic expressions are formed
+     with `plus', `minus', `mult', `div', `mod', `abs', `neg', `and',
+     `ior', `xor', `not', `ashift', `lshiftrt', and `ashiftrt'
+     expressions.
+
+     `const_int' and `symbol_ref' are always valid terms (*note Insn
+     Lengths::,for additional forms).  `symbol_ref' is a string
+     denoting a C expression that yields an `int' when evaluated by the
+     `get_attr_...' routine.  It should normally be a global variable.
+
+`(eq_attr NAME VALUE)'
+     NAME is a string specifying the name of an attribute.
+
+     VALUE is a string that is either a valid value for attribute NAME,
+     a comma-separated list of values, or `!' followed by a value or
+     list.  If VALUE does not begin with a `!', this test is true if
+     the value of the NAME attribute of the current insn is in the list
+     specified by VALUE.  If VALUE begins with a `!', this test is true
+     if the attribute's value is _not_ in the specified list.
+
+     For example,
+
+          (eq_attr "type" "load,store")
+
+     is equivalent to
+
+          (ior (eq_attr "type" "load") (eq_attr "type" "store"))
+
+     If NAME specifies an attribute of `alternative', it refers to the
+     value of the compiler variable `which_alternative' (*note Output
+     Statement::) and the values must be small integers.  For example,
+
+          (eq_attr "alternative" "2,3")
+
+     is equivalent to
+
+          (ior (eq (symbol_ref "which_alternative") (const_int 2))
+               (eq (symbol_ref "which_alternative") (const_int 3)))
+
+     Note that, for most attributes, an `eq_attr' test is simplified in
+     cases where the value of the attribute being tested is known for
+     all insns matching a particular pattern.  This is by far the most
+     common case.
+
+`(attr_flag NAME)'
+     The value of an `attr_flag' expression is true if the flag
+     specified by NAME is true for the `insn' currently being scheduled.
+
+     NAME is a string specifying one of a fixed set of flags to test.
+     Test the flags `forward' and `backward' to determine the direction
+     of a conditional branch.  Test the flags `very_likely', `likely',
+     `very_unlikely', and `unlikely' to determine if a conditional
+     branch is expected to be taken.
+
+     If the `very_likely' flag is true, then the `likely' flag is also
+     true.  Likewise for the `very_unlikely' and `unlikely' flags.
+
+     This example describes a conditional branch delay slot which can
+     be nullified for forward branches that are taken (annul-true) or
+     for backward branches which are not taken (annul-false).
+
+          (define_delay (eq_attr "type" "cbranch")
+            [(eq_attr "in_branch_delay" "true")
+             (and (eq_attr "in_branch_delay" "true")
+                  (attr_flag "forward"))
+             (and (eq_attr "in_branch_delay" "true")
+                  (attr_flag "backward"))])
+
+     The `forward' and `backward' flags are false if the current `insn'
+     being scheduled is not a conditional branch.
+
+     The `very_likely' and `likely' flags are true if the `insn' being
+     scheduled is not a conditional branch.  The `very_unlikely' and
+     `unlikely' flags are false if the `insn' being scheduled is not a
+     conditional branch.
+
+     `attr_flag' is only used during delay slot scheduling and has no
+     meaning to other passes of the compiler.
+
+`(attr NAME)'
+     The value of another attribute is returned.  This is most useful
+     for numeric attributes, as `eq_attr' and `attr_flag' produce more
+     efficient code for non-numeric attributes.
+
+
+File: gccint.info,  Node: Tagging Insns,  Next: Attr Example,  Prev: Expressions,  Up: Insn Attributes
+
+16.19.3 Assigning Attribute Values to Insns
+-------------------------------------------
+
+The value assigned to an attribute of an insn is primarily determined by
+which pattern is matched by that insn (or which `define_peephole'
+generated it).  Every `define_insn' and `define_peephole' can have an
+optional last argument to specify the values of attributes for matching
+insns.  The value of any attribute not specified in a particular insn
+is set to the default value for that attribute, as specified in its
+`define_attr'.  Extensive use of default values for attributes permits
+the specification of the values for only one or two attributes in the
+definition of most insn patterns, as seen in the example in the next
+section.
+
+ The optional last argument of `define_insn' and `define_peephole' is a
+vector of expressions, each of which defines the value for a single
+attribute.  The most general way of assigning an attribute's value is
+to use a `set' expression whose first operand is an `attr' expression
+giving the name of the attribute being set.  The second operand of the
+`set' is an attribute expression (*note Expressions::) giving the value
+of the attribute.
+
+ When the attribute value depends on the `alternative' attribute (i.e.,
+which is the applicable alternative in the constraint of the insn), the
+`set_attr_alternative' expression can be used.  It allows the
+specification of a vector of attribute expressions, one for each
+alternative.
+
+ When the generality of arbitrary attribute expressions is not required,
+the simpler `set_attr' expression can be used, which allows specifying
+a string giving either a single attribute value or a list of attribute
+values, one for each alternative.
+
+ The form of each of the above specifications is shown below.  In each
+case, NAME is a string specifying the attribute to be set.
+
+`(set_attr NAME VALUE-STRING)'
+     VALUE-STRING is either a string giving the desired attribute value,
+     or a string containing a comma-separated list giving the values for
+     succeeding alternatives.  The number of elements must match the
+     number of alternatives in the constraint of the insn pattern.
+
+     Note that it may be useful to specify `*' for some alternative, in
+     which case the attribute will assume its default value for insns
+     matching that alternative.
+
+`(set_attr_alternative NAME [VALUE1 VALUE2 ...])'
+     Depending on the alternative of the insn, the value will be one of
+     the specified values.  This is a shorthand for using a `cond' with
+     tests on the `alternative' attribute.
+
+`(set (attr NAME) VALUE)'
+     The first operand of this `set' must be the special RTL expression
+     `attr', whose sole operand is a string giving the name of the
+     attribute being set.  VALUE is the value of the attribute.
+
+ The following shows three different ways of representing the same
+attribute value specification:
+
+     (set_attr "type" "load,store,arith")
+
+     (set_attr_alternative "type"
+                           [(const_string "load") (const_string "store")
+                            (const_string "arith")])
+
+     (set (attr "type")
+          (cond [(eq_attr "alternative" "1") (const_string "load")
+                 (eq_attr "alternative" "2") (const_string "store")]
+                (const_string "arith")))
+
+ The `define_asm_attributes' expression provides a mechanism to specify
+the attributes assigned to insns produced from an `asm' statement.  It
+has the form:
+
+     (define_asm_attributes [ATTR-SETS])
+
+where ATTR-SETS is specified the same as for both the `define_insn' and
+the `define_peephole' expressions.
+
+ These values will typically be the "worst case" attribute values.  For
+example, they might indicate that the condition code will be clobbered.
+
+ A specification for a `length' attribute is handled specially.  The
+way to compute the length of an `asm' insn is to multiply the length
+specified in the expression `define_asm_attributes' by the number of
+machine instructions specified in the `asm' statement, determined by
+counting the number of semicolons and newlines in the string.
+Therefore, the value of the `length' attribute specified in a
+`define_asm_attributes' should be the maximum possible length of a
+single machine instruction.
+
+
+File: gccint.info,  Node: Attr Example,  Next: Insn Lengths,  Prev: Tagging Insns,  Up: Insn Attributes
+
+16.19.4 Example of Attribute Specifications
+-------------------------------------------
+
+The judicious use of defaulting is important in the efficient use of
+insn attributes.  Typically, insns are divided into "types" and an
+attribute, customarily called `type', is used to represent this value.
+This attribute is normally used only to define the default value for
+other attributes.  An example will clarify this usage.
+
+ Assume we have a RISC machine with a condition code and in which only
+full-word operations are performed in registers.  Let us assume that we
+can divide all insns into loads, stores, (integer) arithmetic
+operations, floating point operations, and branches.
+
+ Here we will concern ourselves with determining the effect of an insn
+on the condition code and will limit ourselves to the following possible
+effects:  The condition code can be set unpredictably (clobbered), not
+be changed, be set to agree with the results of the operation, or only
+changed if the item previously set into the condition code has been
+modified.
+
+ Here is part of a sample `md' file for such a machine:
+
+     (define_attr "type" "load,store,arith,fp,branch" (const_string "arith"))
+
+     (define_attr "cc" "clobber,unchanged,set,change0"
+                  (cond [(eq_attr "type" "load")
+                             (const_string "change0")
+                         (eq_attr "type" "store,branch")
+                             (const_string "unchanged")
+                         (eq_attr "type" "arith")
+                             (if_then_else (match_operand:SI 0 "" "")
+                                           (const_string "set")
+                                           (const_string "clobber"))]
+                        (const_string "clobber")))
+
+     (define_insn ""
+       [(set (match_operand:SI 0 "general_operand" "=r,r,m")
+             (match_operand:SI 1 "general_operand" "r,m,r"))]
+       ""
+       "@
+        move %0,%1
+        load %0,%1
+        store %0,%1"
+       [(set_attr "type" "arith,load,store")])
+
+ Note that we assume in the above example that arithmetic operations
+performed on quantities smaller than a machine word clobber the
+condition code since they will set the condition code to a value
+corresponding to the full-word result.
+
+
+File: gccint.info,  Node: Insn Lengths,  Next: Constant Attributes,  Prev: Attr Example,  Up: Insn Attributes
+
+16.19.5 Computing the Length of an Insn
+---------------------------------------
+
+For many machines, multiple types of branch instructions are provided,
+each for different length branch displacements.  In most cases, the
+assembler will choose the correct instruction to use.  However, when
+the assembler cannot do so, GCC can when a special attribute, the
+`length' attribute, is defined.  This attribute must be defined to have
+numeric values by specifying a null string in its `define_attr'.
+
+ In the case of the `length' attribute, two additional forms of
+arithmetic terms are allowed in test expressions:
+
+`(match_dup N)'
+     This refers to the address of operand N of the current insn, which
+     must be a `label_ref'.
+
+`(pc)'
+     This refers to the address of the _current_ insn.  It might have
+     been more consistent with other usage to make this the address of
+     the _next_ insn but this would be confusing because the length of
+     the current insn is to be computed.
+
+ For normal insns, the length will be determined by value of the
+`length' attribute.  In the case of `addr_vec' and `addr_diff_vec' insn
+patterns, the length is computed as the number of vectors multiplied by
+the size of each vector.
+
+ Lengths are measured in addressable storage units (bytes).
+
+ The following macros can be used to refine the length computation:
+
+`ADJUST_INSN_LENGTH (INSN, LENGTH)'
+     If defined, modifies the length assigned to instruction INSN as a
+     function of the context in which it is used.  LENGTH is an lvalue
+     that contains the initially computed length of the insn and should
+     be updated with the correct length of the insn.
+
+     This macro will normally not be required.  A case in which it is
+     required is the ROMP.  On this machine, the size of an `addr_vec'
+     insn must be increased by two to compensate for the fact that
+     alignment may be required.
+
+ The routine that returns `get_attr_length' (the value of the `length'
+attribute) can be used by the output routine to determine the form of
+the branch instruction to be written, as the example below illustrates.
+
+ As an example of the specification of variable-length branches,
+consider the IBM 360.  If we adopt the convention that a register will
+be set to the starting address of a function, we can jump to labels
+within 4k of the start using a four-byte instruction.  Otherwise, we
+need a six-byte sequence to load the address from memory and then
+branch to it.
+
+ On such a machine, a pattern for a branch instruction might be
+specified as follows:
+
+     (define_insn "jump"
+       [(set (pc)
+             (label_ref (match_operand 0 "" "")))]
+       ""
+     {
+        return (get_attr_length (insn) == 4
+                ? "b %l0" : "l r15,=a(%l0); br r15");
+     }
+       [(set (attr "length")
+             (if_then_else (lt (match_dup 0) (const_int 4096))
+                           (const_int 4)
+                           (const_int 6)))])
+
+
+File: gccint.info,  Node: Constant Attributes,  Next: Delay Slots,  Prev: Insn Lengths,  Up: Insn Attributes
+
+16.19.6 Constant Attributes
+---------------------------
+
+A special form of `define_attr', where the expression for the default
+value is a `const' expression, indicates an attribute that is constant
+for a given run of the compiler.  Constant attributes may be used to
+specify which variety of processor is used.  For example,
+
+     (define_attr "cpu" "m88100,m88110,m88000"
+      (const
+       (cond [(symbol_ref "TARGET_88100") (const_string "m88100")
+              (symbol_ref "TARGET_88110") (const_string "m88110")]
+             (const_string "m88000"))))
+
+     (define_attr "memory" "fast,slow"
+      (const
+       (if_then_else (symbol_ref "TARGET_FAST_MEM")
+                     (const_string "fast")
+                     (const_string "slow"))))
+
+ The routine generated for constant attributes has no parameters as it
+does not depend on any particular insn.  RTL expressions used to define
+the value of a constant attribute may use the `symbol_ref' form, but
+may not use either the `match_operand' form or `eq_attr' forms
+involving insn attributes.
+
+
+File: gccint.info,  Node: Delay Slots,  Next: Processor pipeline description,  Prev: Constant Attributes,  Up: Insn Attributes
+
+16.19.7 Delay Slot Scheduling
+-----------------------------
+
+The insn attribute mechanism can be used to specify the requirements for
+delay slots, if any, on a target machine.  An instruction is said to
+require a "delay slot" if some instructions that are physically after
+the instruction are executed as if they were located before it.
+Classic examples are branch and call instructions, which often execute
+the following instruction before the branch or call is performed.
+
+ On some machines, conditional branch instructions can optionally
+"annul" instructions in the delay slot.  This means that the
+instruction will not be executed for certain branch outcomes.  Both
+instructions that annul if the branch is true and instructions that
+annul if the branch is false are supported.
+
+ Delay slot scheduling differs from instruction scheduling in that
+determining whether an instruction needs a delay slot is dependent only
+on the type of instruction being generated, not on data flow between the
+instructions.  See the next section for a discussion of data-dependent
+instruction scheduling.
+
+ The requirement of an insn needing one or more delay slots is indicated
+via the `define_delay' expression.  It has the following form:
+
+     (define_delay TEST
+                   [DELAY-1 ANNUL-TRUE-1 ANNUL-FALSE-1
+                    DELAY-2 ANNUL-TRUE-2 ANNUL-FALSE-2
+                    ...])
+
+ TEST is an attribute test that indicates whether this `define_delay'
+applies to a particular insn.  If so, the number of required delay
+slots is determined by the length of the vector specified as the second
+argument.  An insn placed in delay slot N must satisfy attribute test
+DELAY-N.  ANNUL-TRUE-N is an attribute test that specifies which insns
+may be annulled if the branch is true.  Similarly, ANNUL-FALSE-N
+specifies which insns in the delay slot may be annulled if the branch
+is false.  If annulling is not supported for that delay slot, `(nil)'
+should be coded.
+
+ For example, in the common case where branch and call insns require a
+single delay slot, which may contain any insn other than a branch or
+call, the following would be placed in the `md' file:
+
+     (define_delay (eq_attr "type" "branch,call")
+                   [(eq_attr "type" "!branch,call") (nil) (nil)])
+
+ Multiple `define_delay' expressions may be specified.  In this case,
+each such expression specifies different delay slot requirements and
+there must be no insn for which tests in two `define_delay' expressions
+are both true.
+
+ For example, if we have a machine that requires one delay slot for
+branches but two for calls,  no delay slot can contain a branch or call
+insn, and any valid insn in the delay slot for the branch can be
+annulled if the branch is true, we might represent this as follows:
+
+     (define_delay (eq_attr "type" "branch")
+        [(eq_attr "type" "!branch,call")
+         (eq_attr "type" "!branch,call")
+         (nil)])
+
+     (define_delay (eq_attr "type" "call")
+                   [(eq_attr "type" "!branch,call") (nil) (nil)
+                    (eq_attr "type" "!branch,call") (nil) (nil)])
+
+
+File: gccint.info,  Node: Processor pipeline description,  Prev: Delay Slots,  Up: Insn Attributes
+
+16.19.8 Specifying processor pipeline description
+-------------------------------------------------
+
+To achieve better performance, most modern processors (super-pipelined,
+superscalar RISC, and VLIW processors) have many "functional units" on
+which several instructions can be executed simultaneously.  An
+instruction starts execution if its issue conditions are satisfied.  If
+not, the instruction is stalled until its conditions are satisfied.
+Such "interlock (pipeline) delay" causes interruption of the fetching
+of successor instructions (or demands nop instructions, e.g. for some
+MIPS processors).
+
+ There are two major kinds of interlock delays in modern processors.
+The first one is a data dependence delay determining "instruction
+latency time".  The instruction execution is not started until all
+source data have been evaluated by prior instructions (there are more
+complex cases when the instruction execution starts even when the data
+are not available but will be ready in given time after the instruction
+execution start).  Taking the data dependence delays into account is
+simple.  The data dependence (true, output, and anti-dependence) delay
+between two instructions is given by a constant.  In most cases this
+approach is adequate.  The second kind of interlock delays is a
+reservation delay.  The reservation delay means that two instructions
+under execution will be in need of shared processors resources, i.e.
+buses, internal registers, and/or functional units, which are reserved
+for some time.  Taking this kind of delay into account is complex
+especially for modern RISC processors.
+
+ The task of exploiting more processor parallelism is solved by an
+instruction scheduler.  For a better solution to this problem, the
+instruction scheduler has to have an adequate description of the
+processor parallelism (or "pipeline description").  GCC machine
+descriptions describe processor parallelism and functional unit
+reservations for groups of instructions with the aid of "regular
+expressions".
+
+ The GCC instruction scheduler uses a "pipeline hazard recognizer" to
+figure out the possibility of the instruction issue by the processor on
+a given simulated processor cycle.  The pipeline hazard recognizer is
+automatically generated from the processor pipeline description.  The
+pipeline hazard recognizer generated from the machine description is
+based on a deterministic finite state automaton (DFA): the instruction
+issue is possible if there is a transition from one automaton state to
+another one.  This algorithm is very fast, and furthermore, its speed
+is not dependent on processor complexity(1).
+
+ The rest of this section describes the directives that constitute an
+automaton-based processor pipeline description.  The order of these
+constructions within the machine description file is not important.
+
+ The following optional construction describes names of automata
+generated and used for the pipeline hazards recognition.  Sometimes the
+generated finite state automaton used by the pipeline hazard recognizer
+is large.  If we use more than one automaton and bind functional units
+to the automata, the total size of the automata is usually less than
+the size of the single automaton.  If there is no one such
+construction, only one finite state automaton is generated.
+
+     (define_automaton AUTOMATA-NAMES)
+
+ AUTOMATA-NAMES is a string giving names of the automata.  The names
+are separated by commas.  All the automata should have unique names.
+The automaton name is used in the constructions `define_cpu_unit' and
+`define_query_cpu_unit'.
+
+ Each processor functional unit used in the description of instruction
+reservations should be described by the following construction.
+
+     (define_cpu_unit UNIT-NAMES [AUTOMATON-NAME])
+
+ UNIT-NAMES is a string giving the names of the functional units
+separated by commas.  Don't use name `nothing', it is reserved for
+other goals.
+
+ AUTOMATON-NAME is a string giving the name of the automaton with which
+the unit is bound.  The automaton should be described in construction
+`define_automaton'.  You should give "automaton-name", if there is a
+defined automaton.
+
+ The assignment of units to automata are constrained by the uses of the
+units in insn reservations.  The most important constraint is: if a
+unit reservation is present on a particular cycle of an alternative for
+an insn reservation, then some unit from the same automaton must be
+present on the same cycle for the other alternatives of the insn
+reservation.  The rest of the constraints are mentioned in the
+description of the subsequent constructions.
+
+ The following construction describes CPU functional units analogously
+to `define_cpu_unit'.  The reservation of such units can be queried for
+an automaton state.  The instruction scheduler never queries
+reservation of functional units for given automaton state.  So as a
+rule, you don't need this construction.  This construction could be
+used for future code generation goals (e.g. to generate VLIW insn
+templates).
+
+     (define_query_cpu_unit UNIT-NAMES [AUTOMATON-NAME])
+
+ UNIT-NAMES is a string giving names of the functional units separated
+by commas.
+
+ AUTOMATON-NAME is a string giving the name of the automaton with which
+the unit is bound.
+
+ The following construction is the major one to describe pipeline
+characteristics of an instruction.
+
+     (define_insn_reservation INSN-NAME DEFAULT_LATENCY
+                              CONDITION REGEXP)
+
+ DEFAULT_LATENCY is a number giving latency time of the instruction.
+There is an important difference between the old description and the
+automaton based pipeline description.  The latency time is used for all
+dependencies when we use the old description.  In the automaton based
+pipeline description, the given latency time is only used for true
+dependencies.  The cost of anti-dependencies is always zero and the
+cost of output dependencies is the difference between latency times of
+the producing and consuming insns (if the difference is negative, the
+cost is considered to be zero).  You can always change the default
+costs for any description by using the target hook
+`TARGET_SCHED_ADJUST_COST' (*note Scheduling::).
+
+ INSN-NAME is a string giving the internal name of the insn.  The
+internal names are used in constructions `define_bypass' and in the
+automaton description file generated for debugging.  The internal name
+has nothing in common with the names in `define_insn'.  It is a good
+practice to use insn classes described in the processor manual.
+
+ CONDITION defines what RTL insns are described by this construction.
+You should remember that you will be in trouble if CONDITION for two or
+more different `define_insn_reservation' constructions is TRUE for an
+insn.  In this case what reservation will be used for the insn is not
+defined.  Such cases are not checked during generation of the pipeline
+hazards recognizer because in general recognizing that two conditions
+may have the same value is quite difficult (especially if the conditions
+contain `symbol_ref').  It is also not checked during the pipeline
+hazard recognizer work because it would slow down the recognizer
+considerably.
+
+ REGEXP is a string describing the reservation of the cpu's functional
+units by the instruction.  The reservations are described by a regular
+expression according to the following syntax:
+
+            regexp = regexp "," oneof
+                   | oneof
+
+            oneof = oneof "|" allof
+                  | allof
+
+            allof = allof "+" repeat
+                  | repeat
+
+            repeat = element "*" number
+                   | element
+
+            element = cpu_function_unit_name
+                    | reservation_name
+                    | result_name
+                    | "nothing"
+                    | "(" regexp ")"
+
+   * `,' is used for describing the start of the next cycle in the
+     reservation.
+
+   * `|' is used for describing a reservation described by the first
+     regular expression *or* a reservation described by the second
+     regular expression *or* etc.
+
+   * `+' is used for describing a reservation described by the first
+     regular expression *and* a reservation described by the second
+     regular expression *and* etc.
+
+   * `*' is used for convenience and simply means a sequence in which
+     the regular expression are repeated NUMBER times with cycle
+     advancing (see `,').
+
+   * `cpu_function_unit_name' denotes reservation of the named
+     functional unit.
+
+   * `reservation_name' -- see description of construction
+     `define_reservation'.
+
+   * `nothing' denotes no unit reservations.
+
+ Sometimes unit reservations for different insns contain common parts.
+In such case, you can simplify the pipeline description by describing
+the common part by the following construction
+
+     (define_reservation RESERVATION-NAME REGEXP)
+
+ RESERVATION-NAME is a string giving name of REGEXP.  Functional unit
+names and reservation names are in the same name space.  So the
+reservation names should be different from the functional unit names
+and can not be the reserved name `nothing'.
+
+ The following construction is used to describe exceptions in the
+latency time for given instruction pair.  This is so called bypasses.
+
+     (define_bypass NUMBER OUT_INSN_NAMES IN_INSN_NAMES
+                    [GUARD])
+
+ NUMBER defines when the result generated by the instructions given in
+string OUT_INSN_NAMES will be ready for the instructions given in
+string IN_INSN_NAMES.  The instructions in the string are separated by
+commas.
+
+ GUARD is an optional string giving the name of a C function which
+defines an additional guard for the bypass.  The function will get the
+two insns as parameters.  If the function returns zero the bypass will
+be ignored for this case.  The additional guard is necessary to
+recognize complicated bypasses, e.g. when the consumer is only an
+address of insn `store' (not a stored value).
+
+ If there are more one bypass with the same output and input insns, the
+chosen bypass is the first bypass with a guard in description whose
+guard function returns nonzero.  If there is no such bypass, then
+bypass without the guard function is chosen.
+
+ The following five constructions are usually used to describe VLIW
+processors, or more precisely, to describe a placement of small
+instructions into VLIW instruction slots.  They can be used for RISC
+processors, too.
+
+     (exclusion_set UNIT-NAMES UNIT-NAMES)
+     (presence_set UNIT-NAMES PATTERNS)
+     (final_presence_set UNIT-NAMES PATTERNS)
+     (absence_set UNIT-NAMES PATTERNS)
+     (final_absence_set UNIT-NAMES PATTERNS)
+
+ UNIT-NAMES is a string giving names of functional units separated by
+commas.
+
+ PATTERNS is a string giving patterns of functional units separated by
+comma.  Currently pattern is one unit or units separated by
+white-spaces.
+
+ The first construction (`exclusion_set') means that each functional
+unit in the first string can not be reserved simultaneously with a unit
+whose name is in the second string and vice versa.  For example, the
+construction is useful for describing processors (e.g. some SPARC
+processors) with a fully pipelined floating point functional unit which
+can execute simultaneously only single floating point insns or only
+double floating point insns.
+
+ The second construction (`presence_set') means that each functional
+unit in the first string can not be reserved unless at least one of
+pattern of units whose names are in the second string is reserved.
+This is an asymmetric relation.  For example, it is useful for
+description that VLIW `slot1' is reserved after `slot0' reservation.
+We could describe it by the following construction
+
+     (presence_set "slot1" "slot0")
+
+ Or `slot1' is reserved only after `slot0' and unit `b0' reservation.
+In this case we could write
+
+     (presence_set "slot1" "slot0 b0")
+
+ The third construction (`final_presence_set') is analogous to
+`presence_set'.  The difference between them is when checking is done.
+When an instruction is issued in given automaton state reflecting all
+current and planned unit reservations, the automaton state is changed.
+The first state is a source state, the second one is a result state.
+Checking for `presence_set' is done on the source state reservation,
+checking for `final_presence_set' is done on the result reservation.
+This construction is useful to describe a reservation which is actually
+two subsequent reservations.  For example, if we use
+
+     (presence_set "slot1" "slot0")
+
+ the following insn will be never issued (because `slot1' requires
+`slot0' which is absent in the source state).
+
+     (define_reservation "insn_and_nop" "slot0 + slot1")
+
+ but it can be issued if we use analogous `final_presence_set'.
+
+ The forth construction (`absence_set') means that each functional unit
+in the first string can be reserved only if each pattern of units whose
+names are in the second string is not reserved.  This is an asymmetric
+relation (actually `exclusion_set' is analogous to this one but it is
+symmetric).  For example it might be useful in a VLIW description to
+say that `slot0' cannot be reserved after either `slot1' or `slot2'
+have been reserved.  This can be described as:
+
+     (absence_set "slot0" "slot1, slot2")
+
+ Or `slot2' can not be reserved if `slot0' and unit `b0' are reserved
+or `slot1' and unit `b1' are reserved.  In this case we could write
+
+     (absence_set "slot2" "slot0 b0, slot1 b1")
+
+ All functional units mentioned in a set should belong to the same
+automaton.
+
+ The last construction (`final_absence_set') is analogous to
+`absence_set' but checking is done on the result (state) reservation.
+See comments for `final_presence_set'.
+
+ You can control the generator of the pipeline hazard recognizer with
+the following construction.
+
+     (automata_option OPTIONS)
+
+ OPTIONS is a string giving options which affect the generated code.
+Currently there are the following options:
+
+   * "no-minimization" makes no minimization of the automaton.  This is
+     only worth to do when we are debugging the description and need to
+     look more accurately at reservations of states.
+
+   * "time" means printing time statistics about the generation of
+     automata.
+
+   * "stats" means printing statistics about the generated automata
+     such as the number of DFA states, NDFA states and arcs.
+
+   * "v" means a generation of the file describing the result automata.
+     The file has suffix `.dfa' and can be used for the description
+     verification and debugging.
+
+   * "w" means a generation of warning instead of error for
+     non-critical errors.
+
+   * "ndfa" makes nondeterministic finite state automata.  This affects
+     the treatment of operator `|' in the regular expressions.  The
+     usual treatment of the operator is to try the first alternative
+     and, if the reservation is not possible, the second alternative.
+     The nondeterministic treatment means trying all alternatives, some
+     of them may be rejected by reservations in the subsequent insns.
+
+   * "progress" means output of a progress bar showing how many states
+     were generated so far for automaton being processed.  This is
+     useful during debugging a DFA description.  If you see too many
+     generated states, you could interrupt the generator of the pipeline
+     hazard recognizer and try to figure out a reason for generation of
+     the huge automaton.
+
+ As an example, consider a superscalar RISC machine which can issue
+three insns (two integer insns and one floating point insn) on the
+cycle but can finish only two insns.  To describe this, we define the
+following functional units.
+
+     (define_cpu_unit "i0_pipeline, i1_pipeline, f_pipeline")
+     (define_cpu_unit "port0, port1")
+
+ All simple integer insns can be executed in any integer pipeline and
+their result is ready in two cycles.  The simple integer insns are
+issued into the first pipeline unless it is reserved, otherwise they
+are issued into the second pipeline.  Integer division and
+multiplication insns can be executed only in the second integer
+pipeline and their results are ready correspondingly in 8 and 4 cycles.
+The integer division is not pipelined, i.e. the subsequent integer
+division insn can not be issued until the current division insn
+finished.  Floating point insns are fully pipelined and their results
+are ready in 3 cycles.  Where the result of a floating point insn is
+used by an integer insn, an additional delay of one cycle is incurred.
+To describe all of this we could specify
+
+     (define_cpu_unit "div")
+
+     (define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                              "(i0_pipeline | i1_pipeline), (port0 | port1)")
+
+     (define_insn_reservation "mult" 4 (eq_attr "type" "mult")
+                              "i1_pipeline, nothing*2, (port0 | port1)")
+
+     (define_insn_reservation "div" 8 (eq_attr "type" "div")
+                              "i1_pipeline, div*7, div + (port0 | port1)")
+
+     (define_insn_reservation "float" 3 (eq_attr "type" "float")
+                              "f_pipeline, nothing, (port0 | port1))
+
+     (define_bypass 4 "float" "simple,mult,div")
+
+ To simplify the description we could describe the following reservation
+
+     (define_reservation "finish" "port0|port1")
+
+ and use it in all `define_insn_reservation' as in the following
+construction
+
+     (define_insn_reservation "simple" 2 (eq_attr "type" "int")
+                              "(i0_pipeline | i1_pipeline), finish")
+
+ ---------- Footnotes ----------
+
+ (1) However, the size of the automaton depends on processor
+complexity.  To limit this effect, machine descriptions can split
+orthogonal parts of the machine description among several automata: but
+then, since each of these must be stepped independently, this does
+cause a small decrease in the algorithm's performance.
+
+
+File: gccint.info,  Node: Conditional Execution,  Next: Constant Definitions,  Prev: Insn Attributes,  Up: Machine Desc
+
+16.20 Conditional Execution
+===========================
+
+A number of architectures provide for some form of conditional
+execution, or predication.  The hallmark of this feature is the ability
+to nullify most of the instructions in the instruction set.  When the
+instruction set is large and not entirely symmetric, it can be quite
+tedious to describe these forms directly in the `.md' file.  An
+alternative is the `define_cond_exec' template.
+
+     (define_cond_exec
+       [PREDICATE-PATTERN]
+       "CONDITION"
+       "OUTPUT-TEMPLATE")
+
+ PREDICATE-PATTERN is the condition that must be true for the insn to
+be executed at runtime and should match a relational operator.  One can
+use `match_operator' to match several relational operators at once.
+Any `match_operand' operands must have no more than one alternative.
+
+ CONDITION is a C expression that must be true for the generated
+pattern to match.
+
+ OUTPUT-TEMPLATE is a string similar to the `define_insn' output
+template (*note Output Template::), except that the `*' and `@' special
+cases do not apply.  This is only useful if the assembly text for the
+predicate is a simple prefix to the main insn.  In order to handle the
+general case, there is a global variable `current_insn_predicate' that
+will contain the entire predicate if the current insn is predicated,
+and will otherwise be `NULL'.
+
+ When `define_cond_exec' is used, an implicit reference to the
+`predicable' instruction attribute is made.  *Note Insn Attributes::.
+This attribute must be boolean (i.e. have exactly two elements in its
+LIST-OF-VALUES).  Further, it must not be used with complex
+expressions.  That is, the default and all uses in the insns must be a
+simple constant, not dependent on the alternative or anything else.
+
+ For each `define_insn' for which the `predicable' attribute is true, a
+new `define_insn' pattern will be generated that matches a predicated
+version of the instruction.  For example,
+
+     (define_insn "addsi"
+       [(set (match_operand:SI 0 "register_operand" "r")
+             (plus:SI (match_operand:SI 1 "register_operand" "r")
+                      (match_operand:SI 2 "register_operand" "r")))]
+       "TEST1"
+       "add %2,%1,%0")
+
+     (define_cond_exec
+       [(ne (match_operand:CC 0 "register_operand" "c")
+            (const_int 0))]
+       "TEST2"
+       "(%0)")
+
+generates a new pattern
+
+     (define_insn ""
+       [(cond_exec
+          (ne (match_operand:CC 3 "register_operand" "c") (const_int 0))
+          (set (match_operand:SI 0 "register_operand" "r")
+               (plus:SI (match_operand:SI 1 "register_operand" "r")
+                        (match_operand:SI 2 "register_operand" "r"))))]
+       "(TEST2) && (TEST1)"
+       "(%3) add %2,%1,%0")
+
+
+File: gccint.info,  Node: Constant Definitions,  Next: Iterators,  Prev: Conditional Execution,  Up: Machine Desc
+
+16.21 Constant Definitions
+==========================
+
+Using literal constants inside instruction patterns reduces legibility
+and can be a maintenance problem.
+
+ To overcome this problem, you may use the `define_constants'
+expression.  It contains a vector of name-value pairs.  From that point
+on, wherever any of the names appears in the MD file, it is as if the
+corresponding value had been written instead.  You may use
+`define_constants' multiple times; each appearance adds more constants
+to the table.  It is an error to redefine a constant with a different
+value.
+
+ To come back to the a29k load multiple example, instead of
+
+     (define_insn ""
+       [(match_parallel 0 "load_multiple_operation"
+          [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                (match_operand:SI 2 "memory_operand" "m"))
+           (use (reg:SI 179))
+           (clobber (reg:SI 179))])]
+       ""
+       "loadm 0,0,%1,%2")
+
+ You could write:
+
+     (define_constants [
+         (R_BP 177)
+         (R_FC 178)
+         (R_CR 179)
+         (R_Q  180)
+     ])
+
+     (define_insn ""
+       [(match_parallel 0 "load_multiple_operation"
+          [(set (match_operand:SI 1 "gpc_reg_operand" "=r")
+                (match_operand:SI 2 "memory_operand" "m"))
+           (use (reg:SI R_CR))
+           (clobber (reg:SI R_CR))])]
+       ""
+       "loadm 0,0,%1,%2")
+
+ The constants that are defined with a define_constant are also output
+in the insn-codes.h header file as #defines.
+
+
+File: gccint.info,  Node: Iterators,  Prev: Constant Definitions,  Up: Machine Desc
+
+16.22 Iterators
+===============
+
+Ports often need to define similar patterns for more than one machine
+mode or for more than one rtx code.  GCC provides some simple iterator
+facilities to make this process easier.
+
+* Menu:
+
+* Mode Iterators::         Generating variations of patterns for different modes.
+* Code Iterators::         Doing the same for codes.
+
+
+File: gccint.info,  Node: Mode Iterators,  Next: Code Iterators,  Up: Iterators
+
+16.22.1 Mode Iterators
+----------------------
+
+Ports often need to define similar patterns for two or more different
+modes.  For example:
+
+   * If a processor has hardware support for both single and double
+     floating-point arithmetic, the `SFmode' patterns tend to be very
+     similar to the `DFmode' ones.
+
+   * If a port uses `SImode' pointers in one configuration and `DImode'
+     pointers in another, it will usually have very similar `SImode'
+     and `DImode' patterns for manipulating pointers.
+
+ Mode iterators allow several patterns to be instantiated from one
+`.md' file template.  They can be used with any type of rtx-based
+construct, such as a `define_insn', `define_split', or
+`define_peephole2'.
+
+* Menu:
+
+* Defining Mode Iterators:: Defining a new mode iterator.
+* Substitutions::           Combining mode iterators with substitutions
+* Examples::                Examples
+
+
+File: gccint.info,  Node: Defining Mode Iterators,  Next: Substitutions,  Up: Mode Iterators
+
+16.22.1.1 Defining Mode Iterators
+.................................
+
+The syntax for defining a mode iterator is:
+
+     (define_mode_iterator NAME [(MODE1 "COND1") ... (MODEN "CONDN")])
+
+ This allows subsequent `.md' file constructs to use the mode suffix
+`:NAME'.  Every construct that does so will be expanded N times, once
+with every use of `:NAME' replaced by `:MODE1', once with every use
+replaced by `:MODE2', and so on.  In the expansion for a particular
+MODEI, every C condition will also require that CONDI be true.
+
+ For example:
+
+     (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+
+ defines a new mode suffix `:P'.  Every construct that uses `:P' will
+be expanded twice, once with every `:P' replaced by `:SI' and once with
+every `:P' replaced by `:DI'.  The `:SI' version will only apply if
+`Pmode == SImode' and the `:DI' version will only apply if `Pmode ==
+DImode'.
+
+ As with other `.md' conditions, an empty string is treated as "always
+true".  `(MODE "")' can also be abbreviated to `MODE'.  For example:
+
+     (define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+
+ means that the `:DI' expansion only applies if `TARGET_64BIT' but that
+the `:SI' expansion has no such constraint.
+
+ Iterators are applied in the order they are defined.  This can be
+significant if two iterators are used in a construct that requires
+substitutions.  *Note Substitutions::.
+
+
+File: gccint.info,  Node: Substitutions,  Next: Examples,  Prev: Defining Mode Iterators,  Up: Mode Iterators
+
+16.22.1.2 Substitution in Mode Iterators
+........................................
+
+If an `.md' file construct uses mode iterators, each version of the
+construct will often need slightly different strings or modes.  For
+example:
+
+   * When a `define_expand' defines several `addM3' patterns (*note
+     Standard Names::), each expander will need to use the appropriate
+     mode name for M.
+
+   * When a `define_insn' defines several instruction patterns, each
+     instruction will often use a different assembler mnemonic.
+
+   * When a `define_insn' requires operands with different modes, using
+     an iterator for one of the operand modes usually requires a
+     specific mode for the other operand(s).
+
+ GCC supports such variations through a system of "mode attributes".
+There are two standard attributes: `mode', which is the name of the
+mode in lower case, and `MODE', which is the same thing in upper case.
+You can define other attributes using:
+
+     (define_mode_attr NAME [(MODE1 "VALUE1") ... (MODEN "VALUEN")])
+
+ where NAME is the name of the attribute and VALUEI is the value
+associated with MODEI.
+
+ When GCC replaces some :ITERATOR with :MODE, it will scan each string
+and mode in the pattern for sequences of the form `<ITERATOR:ATTR>',
+where ATTR is the name of a mode attribute.  If the attribute is
+defined for MODE, the whole `<...>' sequence will be replaced by the
+appropriate attribute value.
+
+ For example, suppose an `.md' file has:
+
+     (define_mode_iterator P [(SI "Pmode == SImode") (DI "Pmode == DImode")])
+     (define_mode_attr load [(SI "lw") (DI "ld")])
+
+ If one of the patterns that uses `:P' contains the string
+`"<P:load>\t%0,%1"', the `SI' version of that pattern will use
+`"lw\t%0,%1"' and the `DI' version will use `"ld\t%0,%1"'.
+
+ Here is an example of using an attribute for a mode:
+
+     (define_mode_iterator LONG [SI DI])
+     (define_mode_attr SHORT [(SI "HI") (DI "SI")])
+     (define_insn ...
+       (sign_extend:LONG (match_operand:<LONG:SHORT> ...)) ...)
+
+ The `ITERATOR:' prefix may be omitted, in which case the substitution
+will be attempted for every iterator expansion.
+
+
+File: gccint.info,  Node: Examples,  Prev: Substitutions,  Up: Mode Iterators
+
+16.22.1.3 Mode Iterator Examples
+................................
+
+Here is an example from the MIPS port.  It defines the following modes
+and attributes (among others):
+
+     (define_mode_iterator GPR [SI (DI "TARGET_64BIT")])
+     (define_mode_attr d [(SI "") (DI "d")])
+
+ and uses the following template to define both `subsi3' and `subdi3':
+
+     (define_insn "sub<mode>3"
+       [(set (match_operand:GPR 0 "register_operand" "=d")
+             (minus:GPR (match_operand:GPR 1 "register_operand" "d")
+                        (match_operand:GPR 2 "register_operand" "d")))]
+       ""
+       "<d>subu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "<MODE>")])
+
+ This is exactly equivalent to:
+
+     (define_insn "subsi3"
+       [(set (match_operand:SI 0 "register_operand" "=d")
+             (minus:SI (match_operand:SI 1 "register_operand" "d")
+                       (match_operand:SI 2 "register_operand" "d")))]
+       ""
+       "subu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "SI")])
+
+     (define_insn "subdi3"
+       [(set (match_operand:DI 0 "register_operand" "=d")
+             (minus:DI (match_operand:DI 1 "register_operand" "d")
+                       (match_operand:DI 2 "register_operand" "d")))]
+       ""
+       "dsubu\t%0,%1,%2"
+       [(set_attr "type" "arith")
+        (set_attr "mode" "DI")])
+
+
+File: gccint.info,  Node: Code Iterators,  Prev: Mode Iterators,  Up: Iterators
+
+16.22.2 Code Iterators
+----------------------
+
+Code iterators operate in a similar way to mode iterators.  *Note Mode
+Iterators::.
+
+ The construct:
+
+     (define_code_iterator NAME [(CODE1 "COND1") ... (CODEN "CONDN")])
+
+ defines a pseudo rtx code NAME that can be instantiated as CODEI if
+condition CONDI is true.  Each CODEI must have the same rtx format.
+*Note RTL Classes::.
+
+ As with mode iterators, each pattern that uses NAME will be expanded N
+times, once with all uses of NAME replaced by CODE1, once with all uses
+replaced by CODE2, and so on.  *Note Defining Mode Iterators::.
+
+ It is possible to define attributes for codes as well as for modes.
+There are two standard code attributes: `code', the name of the code in
+lower case, and `CODE', the name of the code in upper case.  Other
+attributes are defined using:
+
+     (define_code_attr NAME [(CODE1 "VALUE1") ... (CODEN "VALUEN")])
+
+ Here's an example of code iterators in action, taken from the MIPS
+port:
+
+     (define_code_iterator any_cond [unordered ordered unlt unge uneq ltgt unle ungt
+                                     eq ne gt ge lt le gtu geu ltu leu])
+
+     (define_expand "b<code>"
+       [(set (pc)
+             (if_then_else (any_cond:CC (cc0)
+                                        (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, <CODE>);
+       DONE;
+     })
+
+ This is equivalent to:
+
+     (define_expand "bunordered"
+       [(set (pc)
+             (if_then_else (unordered:CC (cc0)
+                                         (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, UNORDERED);
+       DONE;
+     })
+
+     (define_expand "bordered"
+       [(set (pc)
+             (if_then_else (ordered:CC (cc0)
+                                       (const_int 0))
+                           (label_ref (match_operand 0 ""))
+                           (pc)))]
+       ""
+     {
+       gen_conditional_branch (operands, ORDERED);
+       DONE;
+     })
+
+     ...
+
+
+File: gccint.info,  Node: Target Macros,  Next: Host Config,  Prev: Machine Desc,  Up: Top
+
+17 Target Description Macros and Functions
+******************************************
+
+In addition to the file `MACHINE.md', a machine description includes a
+C header file conventionally given the name `MACHINE.h' and a C source
+file named `MACHINE.c'.  The header file defines numerous macros that
+convey the information about the target machine that does not fit into
+the scheme of the `.md' file.  The file `tm.h' should be a link to
+`MACHINE.h'.  The header file `config.h' includes `tm.h' and most
+compiler source files include `config.h'.  The source file defines a
+variable `targetm', which is a structure containing pointers to
+functions and data relating to the target machine.  `MACHINE.c' should
+also contain their definitions, if they are not defined elsewhere in
+GCC, and other functions called through the macros defined in the `.h'
+file.
+
+* Menu:
+
+* Target Structure::    The `targetm' variable.
+* Driver::              Controlling how the driver runs the compilation passes.
+* Run-time Target::     Defining `-m' options like `-m68000' and `-m68020'.
+* Per-Function Data::   Defining data structures for per-function information.
+* Storage Layout::      Defining sizes and alignments of data.
+* Type Layout::         Defining sizes and properties of basic user data types.
+* Registers::           Naming and describing the hardware registers.
+* Register Classes::    Defining the classes of hardware registers.
+* Old Constraints::     The old way to define machine-specific constraints.
+* Stack and Calling::   Defining which way the stack grows and by how much.
+* Varargs::             Defining the varargs macros.
+* Trampolines::         Code set up at run time to enter a nested function.
+* Library Calls::       Controlling how library routines are implicitly called.
+* Addressing Modes::    Defining addressing modes valid for memory operands.
+* Anchored Addresses::  Defining how `-fsection-anchors' should work.
+* Condition Code::      Defining how insns update the condition code.
+* Costs::               Defining relative costs of different operations.
+* Scheduling::          Adjusting the behavior of the instruction scheduler.
+* Sections::            Dividing storage into text, data, and other sections.
+* PIC::                 Macros for position independent code.
+* Assembler Format::    Defining how to write insns and pseudo-ops to output.
+* Debugging Info::      Defining the format of debugging output.
+* Floating Point::      Handling floating point for cross-compilers.
+* Mode Switching::      Insertion of mode-switching instructions.
+* Target Attributes::   Defining target-specific uses of `__attribute__'.
+* Emulated TLS::        Emulated TLS support.
+* MIPS Coprocessors::   MIPS coprocessor support and how to customize it.
+* PCH Target::          Validity checking for precompiled headers.
+* C++ ABI::             Controlling C++ ABI changes.
+* Named Address Spaces:: Adding support for named address spaces
+* Misc::                Everything else.
+
+
+File: gccint.info,  Node: Target Structure,  Next: Driver,  Up: Target Macros
+
+17.1 The Global `targetm' Variable
+==================================
+
+ -- Variable: struct gcc_target targetm
+     The target `.c' file must define the global `targetm' variable
+     which contains pointers to functions and data relating to the
+     target machine.  The variable is declared in `target.h';
+     `target-def.h' defines the macro `TARGET_INITIALIZER' which is
+     used to initialize the variable, and macros for the default
+     initializers for elements of the structure.  The `.c' file should
+     override those macros for which the default definition is
+     inappropriate.  For example:
+          #include "target.h"
+          #include "target-def.h"
+
+          /* Initialize the GCC target structure.  */
+
+          #undef TARGET_COMP_TYPE_ATTRIBUTES
+          #define TARGET_COMP_TYPE_ATTRIBUTES MACHINE_comp_type_attributes
+
+          struct gcc_target targetm = TARGET_INITIALIZER;
+
+Where a macro should be defined in the `.c' file in this manner to form
+part of the `targetm' structure, it is documented below as a "Target
+Hook" with a prototype.  Many macros will change in future from being
+defined in the `.h' file to being part of the `targetm' structure.
+
+
+File: gccint.info,  Node: Driver,  Next: Run-time Target,  Prev: Target Structure,  Up: Target Macros
+
+17.2 Controlling the Compilation Driver, `gcc'
+==============================================
+
+You can control the compilation driver.
+
+ -- Macro: SWITCH_TAKES_ARG (CHAR)
+     A C expression which determines whether the option `-CHAR' takes
+     arguments.  The value should be the number of arguments that
+     option takes-zero, for many options.
+
+     By default, this macro is defined as `DEFAULT_SWITCH_TAKES_ARG',
+     which handles the standard options properly.  You need not define
+     `SWITCH_TAKES_ARG' unless you wish to add additional options which
+     take arguments.  Any redefinition should call
+     `DEFAULT_SWITCH_TAKES_ARG' and then check for additional options.
+
+ -- Macro: WORD_SWITCH_TAKES_ARG (NAME)
+     A C expression which determines whether the option `-NAME' takes
+     arguments.  The value should be the number of arguments that
+     option takes-zero, for many options.  This macro rather than
+     `SWITCH_TAKES_ARG' is used for multi-character option names.
+
+     By default, this macro is defined as
+     `DEFAULT_WORD_SWITCH_TAKES_ARG', which handles the standard options
+     properly.  You need not define `WORD_SWITCH_TAKES_ARG' unless you
+     wish to add additional options which take arguments.  Any
+     redefinition should call `DEFAULT_WORD_SWITCH_TAKES_ARG' and then
+     check for additional options.
+
+ -- Macro: SWITCH_CURTAILS_COMPILATION (CHAR)
+     A C expression which determines whether the option `-CHAR' stops
+     compilation before the generation of an executable.  The value is
+     boolean, nonzero if the option does stop an executable from being
+     generated, zero otherwise.
+
+     By default, this macro is defined as
+     `DEFAULT_SWITCH_CURTAILS_COMPILATION', which handles the standard
+     options properly.  You need not define
+     `SWITCH_CURTAILS_COMPILATION' unless you wish to add additional
+     options which affect the generation of an executable.  Any
+     redefinition should call `DEFAULT_SWITCH_CURTAILS_COMPILATION' and
+     then check for additional options.
+
+ -- Macro: SWITCHES_NEED_SPACES
+     A string-valued C expression which enumerates the options for which
+     the linker needs a space between the option and its argument.
+
+     If this macro is not defined, the default value is `""'.
+
+ -- Macro: TARGET_OPTION_TRANSLATE_TABLE
+     If defined, a list of pairs of strings, the first of which is a
+     potential command line target to the `gcc' driver program, and the
+     second of which is a space-separated (tabs and other whitespace
+     are not supported) list of options with which to replace the first
+     option.  The target defining this list is responsible for assuring
+     that the results are valid.  Replacement options may not be the
+     `--opt' style, they must be the `-opt' style.  It is the intention
+     of this macro to provide a mechanism for substitution that affects
+     the multilibs chosen, such as one option that enables many
+     options, some of which select multilibs.  Example nonsensical
+     definition, where `-malt-abi', `-EB', and `-mspoo' cause different
+     multilibs to be chosen:
+
+          #define TARGET_OPTION_TRANSLATE_TABLE \
+          { "-fast",   "-march=fast-foo -malt-abi -I/usr/fast-foo" }, \
+          { "-compat", "-EB -malign=4 -mspoo" }
+
+ -- Macro: DRIVER_SELF_SPECS
+     A list of specs for the driver itself.  It should be a suitable
+     initializer for an array of strings, with no surrounding braces.
+
+     The driver applies these specs to its own command line between
+     loading default `specs' files (but not command-line specified
+     ones) and choosing the multilib directory or running any
+     subcommands.  It applies them in the order given, so each spec can
+     depend on the options added by earlier ones.  It is also possible
+     to remove options using `%<OPTION' in the usual way.
+
+     This macro can be useful when a port has several interdependent
+     target options.  It provides a way of standardizing the command
+     line so that the other specs are easier to write.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: OPTION_DEFAULT_SPECS
+     A list of specs used to support configure-time default options
+     (i.e.  `--with' options) in the driver.  It should be a suitable
+     initializer for an array of structures, each containing two
+     strings, without the outermost pair of surrounding braces.
+
+     The first item in the pair is the name of the default.  This must
+     match the code in `config.gcc' for the target.  The second item is
+     a spec to apply if a default with this name was specified.  The
+     string `%(VALUE)' in the spec will be replaced by the value of the
+     default everywhere it occurs.
+
+     The driver will apply these specs to its own command line between
+     loading default `specs' files and processing `DRIVER_SELF_SPECS',
+     using the same mechanism as `DRIVER_SELF_SPECS'.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CPP_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to CPP.  It can also specify how to translate options you
+     give to GCC into options for GCC to pass to the CPP.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CPLUSPLUS_CPP_SPEC
+     This macro is just like `CPP_SPEC', but is used for C++, rather
+     than C.  If you do not define this macro, then the value of
+     `CPP_SPEC' (if any) will be used instead.
+
+ -- Macro: CC1_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to `cc1', `cc1plus', `f771', and the other language front
+     ends.  It can also specify how to translate options you give to
+     GCC into options for GCC to pass to front ends.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: CC1PLUS_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to `cc1plus'.  It can also specify how to translate options
+     you give to GCC into options for GCC to pass to the `cc1plus'.
+
+     Do not define this macro if it does not need to do anything.  Note
+     that everything defined in CC1_SPEC is already passed to `cc1plus'
+     so there is no need to duplicate the contents of CC1_SPEC in
+     CC1PLUS_SPEC.
+
+ -- Macro: ASM_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to the assembler.  It can also specify how to translate
+     options you give to GCC into options for GCC to pass to the
+     assembler.  See the file `sun3.h' for an example of this.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: ASM_FINAL_SPEC
+     A C string constant that tells the GCC driver program how to run
+     any programs which cleanup after the normal assembler.  Normally,
+     this is not needed.  See the file `mips.h' for an example of this.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: AS_NEEDS_DASH_FOR_PIPED_INPUT
+     Define this macro, with no value, if the driver should give the
+     assembler an argument consisting of a single dash, `-', to
+     instruct it to read from its standard input (which will be a pipe
+     connected to the output of the compiler proper).  This argument is
+     given after any `-o' option specifying the name of the output file.
+
+     If you do not define this macro, the assembler is assumed to read
+     its standard input if given no non-option arguments.  If your
+     assembler cannot read standard input at all, use a `%{pipe:%e}'
+     construct; see `mips.h' for instance.
+
+ -- Macro: LINK_SPEC
+     A C string constant that tells the GCC driver program options to
+     pass to the linker.  It can also specify how to translate options
+     you give to GCC into options for GCC to pass to the linker.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: LIB_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `LIB_SPEC' is used at the end
+     of the command given to the linker.
+
+     If this macro is not defined, a default is provided that loads the
+     standard C library from the usual place.  See `gcc.c'.
+
+ -- Macro: LIBGCC_SPEC
+     Another C string constant that tells the GCC driver program how
+     and when to place a reference to `libgcc.a' into the linker
+     command line.  This constant is placed both before and after the
+     value of `LIB_SPEC'.
+
+     If this macro is not defined, the GCC driver provides a default
+     that passes the string `-lgcc' to the linker.
+
+ -- Macro: REAL_LIBGCC_SPEC
+     By default, if `ENABLE_SHARED_LIBGCC' is defined, the
+     `LIBGCC_SPEC' is not directly used by the driver program but is
+     instead modified to refer to different versions of `libgcc.a'
+     depending on the values of the command line flags `-static',
+     `-shared', `-static-libgcc', and `-shared-libgcc'.  On targets
+     where these modifications are inappropriate, define
+     `REAL_LIBGCC_SPEC' instead.  `REAL_LIBGCC_SPEC' tells the driver
+     how to place a reference to `libgcc' on the link command line,
+     but, unlike `LIBGCC_SPEC', it is used unmodified.
+
+ -- Macro: USE_LD_AS_NEEDED
+     A macro that controls the modifications to `LIBGCC_SPEC' mentioned
+     in `REAL_LIBGCC_SPEC'.  If nonzero, a spec will be generated that
+     uses -as-needed and the shared libgcc in place of the static
+     exception handler library, when linking without any of `-static',
+     `-static-libgcc', or `-shared-libgcc'.
+
+ -- Macro: LINK_EH_SPEC
+     If defined, this C string constant is added to `LINK_SPEC'.  When
+     `USE_LD_AS_NEEDED' is zero or undefined, it also affects the
+     modifications to `LIBGCC_SPEC' mentioned in `REAL_LIBGCC_SPEC'.
+
+ -- Macro: STARTFILE_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `STARTFILE_SPEC' is used at the
+     very beginning of the command given to the linker.
+
+     If this macro is not defined, a default is provided that loads the
+     standard C startup file from the usual place.  See `gcc.c'.
+
+ -- Macro: ENDFILE_SPEC
+     Another C string constant used much like `LINK_SPEC'.  The
+     difference between the two is that `ENDFILE_SPEC' is used at the
+     very end of the command given to the linker.
+
+     Do not define this macro if it does not need to do anything.
+
+ -- Macro: THREAD_MODEL_SPEC
+     GCC `-v' will print the thread model GCC was configured to use.
+     However, this doesn't work on platforms that are multilibbed on
+     thread models, such as AIX 4.3.  On such platforms, define
+     `THREAD_MODEL_SPEC' such that it evaluates to a string without
+     blanks that names one of the recognized thread models.  `%*', the
+     default value of this macro, will expand to the value of
+     `thread_file' set in `config.gcc'.
+
+ -- Macro: SYSROOT_SUFFIX_SPEC
+     Define this macro to add a suffix to the target sysroot when GCC is
+     configured with a sysroot.  This will cause GCC to search for
+     usr/lib, et al, within sysroot+suffix.
+
+ -- Macro: SYSROOT_HEADERS_SUFFIX_SPEC
+     Define this macro to add a headers_suffix to the target sysroot
+     when GCC is configured with a sysroot.  This will cause GCC to
+     pass the updated sysroot+headers_suffix to CPP, causing it to
+     search for usr/include, et al, within sysroot+headers_suffix.
+
+ -- Macro: EXTRA_SPECS
+     Define this macro to provide additional specifications to put in
+     the `specs' file that can be used in various specifications like
+     `CC1_SPEC'.
+
+     The definition should be an initializer for an array of structures,
+     containing a string constant, that defines the specification name,
+     and a string constant that provides the specification.
+
+     Do not define this macro if it does not need to do anything.
+
+     `EXTRA_SPECS' is useful when an architecture contains several
+     related targets, which have various `..._SPECS' which are similar
+     to each other, and the maintainer would like one central place to
+     keep these definitions.
+
+     For example, the PowerPC System V.4 targets use `EXTRA_SPECS' to
+     define either `_CALL_SYSV' when the System V calling sequence is
+     used or `_CALL_AIX' when the older AIX-based calling sequence is
+     used.
+
+     The `config/rs6000/rs6000.h' target file defines:
+
+          #define EXTRA_SPECS \
+            { "cpp_sysv_default", CPP_SYSV_DEFAULT },
+
+          #define CPP_SYS_DEFAULT ""
+
+     The `config/rs6000/sysv.h' target file defines:
+          #undef CPP_SPEC
+          #define CPP_SPEC \
+          "%{posix: -D_POSIX_SOURCE } \
+          %{mcall-sysv: -D_CALL_SYSV } \
+          %{!mcall-sysv: %(cpp_sysv_default) } \
+          %{msoft-float: -D_SOFT_FLOAT} %{mcpu=403: -D_SOFT_FLOAT}"
+
+          #undef CPP_SYSV_DEFAULT
+          #define CPP_SYSV_DEFAULT "-D_CALL_SYSV"
+
+     while the `config/rs6000/eabiaix.h' target file defines
+     `CPP_SYSV_DEFAULT' as:
+
+          #undef CPP_SYSV_DEFAULT
+          #define CPP_SYSV_DEFAULT "-D_CALL_AIX"
+
+ -- Macro: LINK_LIBGCC_SPECIAL_1
+     Define this macro if the driver program should find the library
+     `libgcc.a'.  If you do not define this macro, the driver program
+     will pass the argument `-lgcc' to tell the linker to do the search.
+
+ -- Macro: LINK_GCC_C_SEQUENCE_SPEC
+     The sequence in which libgcc and libc are specified to the linker.
+     By default this is `%G %L %G'.
+
+ -- Macro: LINK_COMMAND_SPEC
+     A C string constant giving the complete command line need to
+     execute the linker.  When you do this, you will need to update
+     your port each time a change is made to the link command line
+     within `gcc.c'.  Therefore, define this macro only if you need to
+     completely redefine the command line for invoking the linker and
+     there is no other way to accomplish the effect you need.
+     Overriding this macro may be avoidable by overriding
+     `LINK_GCC_C_SEQUENCE_SPEC' instead.
+
+ -- Macro: LINK_ELIMINATE_DUPLICATE_LDIRECTORIES
+     A nonzero value causes `collect2' to remove duplicate
+     `-LDIRECTORY' search directories from linking commands.  Do not
+     give it a nonzero value if removing duplicate search directories
+     changes the linker's semantics.
+
+ -- Macro: MULTILIB_DEFAULTS
+     Define this macro as a C expression for the initializer of an
+     array of string to tell the driver program which options are
+     defaults for this target and thus do not need to be handled
+     specially when using `MULTILIB_OPTIONS'.
+
+     Do not define this macro if `MULTILIB_OPTIONS' is not defined in
+     the target makefile fragment or if none of the options listed in
+     `MULTILIB_OPTIONS' are set by default.  *Note Target Fragment::.
+
+ -- Macro: RELATIVE_PREFIX_NOT_LINKDIR
+     Define this macro to tell `gcc' that it should only translate a
+     `-B' prefix into a `-L' linker option if the prefix indicates an
+     absolute file name.
+
+ -- Macro: MD_EXEC_PREFIX
+     If defined, this macro is an additional prefix to try after
+     `STANDARD_EXEC_PREFIX'.  `MD_EXEC_PREFIX' is not searched when the
+     `-b' option is used, or the compiler is built as a cross compiler.
+     If you define `MD_EXEC_PREFIX', then be sure to add it to the list
+     of directories used to find the assembler in `configure.in'.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `libdir' as the default prefix to try when
+     searching for startup files such as `crt0.o'.
+     `STANDARD_STARTFILE_PREFIX' is not searched when the compiler is
+     built as a cross compiler.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX_1
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/lib' as a prefix to try after the default
+     prefix when searching for startup files such as `crt0.o'.
+     `STANDARD_STARTFILE_PREFIX_1' is not searched when the compiler is
+     built as a cross compiler.
+
+ -- Macro: STANDARD_STARTFILE_PREFIX_2
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/lib' as yet another prefix to try after
+     the default prefix when searching for startup files such as
+     `crt0.o'.  `STANDARD_STARTFILE_PREFIX_2' is not searched when the
+     compiler is built as a cross compiler.
+
+ -- Macro: MD_STARTFILE_PREFIX
+     If defined, this macro supplies an additional prefix to try after
+     the standard prefixes.  `MD_EXEC_PREFIX' is not searched when the
+     `-b' option is used, or when the compiler is built as a cross
+     compiler.
+
+ -- Macro: MD_STARTFILE_PREFIX_1
+     If defined, this macro supplies yet another prefix to try after the
+     standard prefixes.  It is not searched when the `-b' option is
+     used, or when the compiler is built as a cross compiler.
+
+ -- Macro: INIT_ENVIRONMENT
+     Define this macro as a C string constant if you wish to set
+     environment variables for programs called by the driver, such as
+     the assembler and loader.  The driver passes the value of this
+     macro to `putenv' to initialize the necessary environment
+     variables.
+
+ -- Macro: LOCAL_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/usr/local/include' as the default prefix
+     to try when searching for local header files.  `LOCAL_INCLUDE_DIR'
+     comes before `SYSTEM_INCLUDE_DIR' in the search order.
+
+     Cross compilers do not search either `/usr/local/include' or its
+     replacement.
+
+ -- Macro: MODIFY_TARGET_NAME
+     Define this macro if you wish to define command-line switches that
+     modify the default target name.
+
+     For each switch, you can include a string to be appended to the
+     first part of the configuration name or a string to be deleted
+     from the configuration name, if present.  The definition should be
+     an initializer for an array of structures.  Each array element
+     should have three elements: the switch name (a string constant,
+     including the initial dash), one of the enumeration codes `ADD' or
+     `DELETE' to indicate whether the string should be inserted or
+     deleted, and the string to be inserted or deleted (a string
+     constant).
+
+     For example, on a machine where `64' at the end of the
+     configuration name denotes a 64-bit target and you want the `-32'
+     and `-64' switches to select between 32- and 64-bit targets, you
+     would code
+
+          #define MODIFY_TARGET_NAME \
+            { { "-32", DELETE, "64"}, \
+               {"-64", ADD, "64"}}
+
+ -- Macro: SYSTEM_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to specify a
+     system-specific directory to search for header files before the
+     standard directory.  `SYSTEM_INCLUDE_DIR' comes before
+     `STANDARD_INCLUDE_DIR' in the search order.
+
+     Cross compilers do not use this macro and do not search the
+     directory specified.
+
+ -- Macro: STANDARD_INCLUDE_DIR
+     Define this macro as a C string constant if you wish to override
+     the standard choice of `/usr/include' as the default prefix to try
+     when searching for header files.
+
+     Cross compilers ignore this macro and do not search either
+     `/usr/include' or its replacement.
+
+ -- Macro: STANDARD_INCLUDE_COMPONENT
+     The "component" corresponding to `STANDARD_INCLUDE_DIR'.  See
+     `INCLUDE_DEFAULTS', below, for the description of components.  If
+     you do not define this macro, no component is used.
+
+ -- Macro: INCLUDE_DEFAULTS
+     Define this macro if you wish to override the entire default
+     search path for include files.  For a native compiler, the default
+     search path usually consists of `GCC_INCLUDE_DIR',
+     `LOCAL_INCLUDE_DIR', `SYSTEM_INCLUDE_DIR',
+     `GPLUSPLUS_INCLUDE_DIR', and `STANDARD_INCLUDE_DIR'.  In addition,
+     `GPLUSPLUS_INCLUDE_DIR' and `GCC_INCLUDE_DIR' are defined
+     automatically by `Makefile', and specify private search areas for
+     GCC.  The directory `GPLUSPLUS_INCLUDE_DIR' is used only for C++
+     programs.
+
+     The definition should be an initializer for an array of structures.
+     Each array element should have four elements: the directory name (a
+     string constant), the component name (also a string constant), a
+     flag for C++-only directories, and a flag showing that the
+     includes in the directory don't need to be wrapped in `extern `C''
+     when compiling C++.  Mark the end of the array with a null element.
+
+     The component name denotes what GNU package the include file is
+     part of, if any, in all uppercase letters.  For example, it might
+     be `GCC' or `BINUTILS'.  If the package is part of a
+     vendor-supplied operating system, code the component name as `0'.
+
+     For example, here is the definition used for VAX/VMS:
+
+          #define INCLUDE_DEFAULTS \
+          {                                       \
+            { "GNU_GXX_INCLUDE:", "G++", 1, 1},   \
+            { "GNU_CC_INCLUDE:", "GCC", 0, 0},    \
+            { "SYS$SYSROOT:[SYSLIB.]", 0, 0, 0},  \
+            { ".", 0, 0, 0},                      \
+            { 0, 0, 0, 0}                         \
+          }
+
+ Here is the order of prefixes tried for exec files:
+
+  1. Any prefixes specified by the user with `-B'.
+
+  2. The environment variable `GCC_EXEC_PREFIX' or, if `GCC_EXEC_PREFIX'
+     is not set and the compiler has not been installed in the
+     configure-time PREFIX, the location in which the compiler has
+     actually been installed.
+
+  3. The directories specified by the environment variable
+     `COMPILER_PATH'.
+
+  4. The macro `STANDARD_EXEC_PREFIX', if the compiler has been
+     installed in the configured-time PREFIX.
+
+  5. The location `/usr/libexec/gcc/', but only if this is a native
+     compiler.
+
+  6. The location `/usr/lib/gcc/', but only if this is a native
+     compiler.
+
+  7. The macro `MD_EXEC_PREFIX', if defined, but only if this is a
+     native compiler.
+
+ Here is the order of prefixes tried for startfiles:
+
+  1. Any prefixes specified by the user with `-B'.
+
+  2. The environment variable `GCC_EXEC_PREFIX' or its automatically
+     determined value based on the installed toolchain location.
+
+  3. The directories specified by the environment variable
+     `LIBRARY_PATH' (or port-specific name; native only, cross
+     compilers do not use this).
+
+  4. The macro `STANDARD_EXEC_PREFIX', but only if the toolchain is
+     installed in the configured PREFIX or this is a native compiler.
+
+  5. The location `/usr/lib/gcc/', but only if this is a native
+     compiler.
+
+  6. The macro `MD_EXEC_PREFIX', if defined, but only if this is a
+     native compiler.
+
+  7. The macro `MD_STARTFILE_PREFIX', if defined, but only if this is a
+     native compiler, or we have a target system root.
+
+  8. The macro `MD_STARTFILE_PREFIX_1', if defined, but only if this is
+     a native compiler, or we have a target system root.
+
+  9. The macro `STANDARD_STARTFILE_PREFIX', with any sysroot
+     modifications.  If this path is relative it will be prefixed by
+     `GCC_EXEC_PREFIX' and the machine suffix or `STANDARD_EXEC_PREFIX'
+     and the machine suffix.
+
+ 10. The macro `STANDARD_STARTFILE_PREFIX_1', but only if this is a
+     native compiler, or we have a target system root. The default for
+     this macro is `/lib/'.
+
+ 11. The macro `STANDARD_STARTFILE_PREFIX_2', but only if this is a
+     native compiler, or we have a target system root. The default for
+     this macro is `/usr/lib/'.
+
+
+File: gccint.info,  Node: Run-time Target,  Next: Per-Function Data,  Prev: Driver,  Up: Target Macros
+
+17.3 Run-time Target Specification
+==================================
+
+Here are run-time target specifications.
+
+ -- Macro: TARGET_CPU_CPP_BUILTINS ()
+     This function-like macro expands to a block of code that defines
+     built-in preprocessor macros and assertions for the target CPU,
+     using the functions `builtin_define', `builtin_define_std' and
+     `builtin_assert'.  When the front end calls this macro it provides
+     a trailing semicolon, and since it has finished command line
+     option processing your code can use those results freely.
+
+     `builtin_assert' takes a string in the form you pass to the
+     command-line option `-A', such as `cpu=mips', and creates the
+     assertion.  `builtin_define' takes a string in the form accepted
+     by option `-D' and unconditionally defines the macro.
+
+     `builtin_define_std' takes a string representing the name of an
+     object-like macro.  If it doesn't lie in the user's namespace,
+     `builtin_define_std' defines it unconditionally.  Otherwise, it
+     defines a version with two leading underscores, and another version
+     with two leading and trailing underscores, and defines the original
+     only if an ISO standard was not requested on the command line.  For
+     example, passing `unix' defines `__unix', `__unix__' and possibly
+     `unix'; passing `_mips' defines `__mips', `__mips__' and possibly
+     `_mips', and passing `_ABI64' defines only `_ABI64'.
+
+     You can also test for the C dialect being compiled.  The variable
+     `c_language' is set to one of `clk_c', `clk_cplusplus' or
+     `clk_objective_c'.  Note that if we are preprocessing assembler,
+     this variable will be `clk_c' but the function-like macro
+     `preprocessing_asm_p()' will return true, so you might want to
+     check for that first.  If you need to check for strict ANSI, the
+     variable `flag_iso' can be used.  The function-like macro
+     `preprocessing_trad_p()' can be used to check for traditional
+     preprocessing.
+
+ -- Macro: TARGET_OS_CPP_BUILTINS ()
+     Similarly to `TARGET_CPU_CPP_BUILTINS' but this macro is optional
+     and is used for the target operating system instead.
+
+ -- Macro: TARGET_OBJFMT_CPP_BUILTINS ()
+     Similarly to `TARGET_CPU_CPP_BUILTINS' but this macro is optional
+     and is used for the target object format.  `elfos.h' uses this
+     macro to define `__ELF__', so you probably do not need to define
+     it yourself.
+
+ -- Variable: extern int target_flags
+     This variable is declared in `options.h', which is included before
+     any target-specific headers.
+
+ -- Target Hook: int TARGET_DEFAULT_TARGET_FLAGS
+     This variable specifies the initial value of `target_flags'.  Its
+     default setting is 0.
+
+ -- Target Hook: bool TARGET_HANDLE_OPTION (size_t CODE, const char
+          *ARG, int VALUE)
+     This hook is called whenever the user specifies one of the
+     target-specific options described by the `.opt' definition files
+     (*note Options::).  It has the opportunity to do some
+     option-specific processing and should return true if the option is
+     valid.  The default definition does nothing but return true.
+
+     CODE specifies the `OPT_NAME' enumeration value associated with
+     the selected option; NAME is just a rendering of the option name
+     in which non-alphanumeric characters are replaced by underscores.
+     ARG specifies the string argument and is null if no argument was
+     given.  If the option is flagged as a `UInteger' (*note Option
+     properties::), VALUE is the numeric value of the argument.
+     Otherwise VALUE is 1 if the positive form of the option was used
+     and 0 if the "no-" form was.
+
+ -- Target Hook: bool TARGET_HANDLE_C_OPTION (size_t CODE, const char
+          *ARG, int VALUE)
+     This target hook is called whenever the user specifies one of the
+     target-specific C language family options described by the `.opt'
+     definition files(*note Options::).  It has the opportunity to do
+     some option-specific processing and should return true if the
+     option is valid.  The arguments are like for
+     `TARGET_HANDLE_OPTION'.  The default definition does nothing but
+     return false.
+
+     In general, you should use `TARGET_HANDLE_OPTION' to handle
+     options.  However, if processing an option requires routines that
+     are only available in the C (and related language) front ends,
+     then you should use `TARGET_HANDLE_C_OPTION' instead.
+
+ -- Macro: TARGET_VERSION
+     This macro is a C statement to print on `stderr' a string
+     describing the particular machine description choice.  Every
+     machine description should define `TARGET_VERSION'.  For example:
+
+          #ifdef MOTOROLA
+          #define TARGET_VERSION \
+            fprintf (stderr, " (68k, Motorola syntax)");
+          #else
+          #define TARGET_VERSION \
+            fprintf (stderr, " (68k, MIT syntax)");
+          #endif
+
+ -- Macro: OVERRIDE_OPTIONS
+     Sometimes certain combinations of command options do not make
+     sense on a particular target machine.  You can define a macro
+     `OVERRIDE_OPTIONS' to take account of this.  This macro, if
+     defined, is executed once just after all the command options have
+     been parsed.
+
+     Don't use this macro to turn on various extra optimizations for
+     `-O'.  That is what `OPTIMIZATION_OPTIONS' is for.
+
+     If you need to do something whenever the optimization level is
+     changed via the optimize attribute or pragma, see
+     `TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE'
+
+ -- Target Hook: void TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE (void)
+     This target function is similar to the macro `OVERRIDE_OPTIONS'
+     but is called when the optimize level is changed via an attribute
+     or pragma or when it is reset at the end of the code affected by
+     the attribute or pragma.  It is not called at the beginning of
+     compilation when `OVERRIDE_OPTIONS' is called so if you want to
+     perform these actions then, you should have `OVERRIDE_OPTIONS' call
+     `TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE'.
+
+ -- Macro: C_COMMON_OVERRIDE_OPTIONS
+     This is similar to `OVERRIDE_OPTIONS' but is only used in the C
+     language frontends (C, Objective-C, C++, Objective-C++) and so can
+     be used to alter option flag variables which only exist in those
+     frontends.
+
+ -- Macro: OPTIMIZATION_OPTIONS (LEVEL, SIZE)
+     Some machines may desire to change what optimizations are
+     performed for various optimization levels.   This macro, if
+     defined, is executed once just after the optimization level is
+     determined and before the remainder of the command options have
+     been parsed.  Values set in this macro are used as the default
+     values for the other command line options.
+
+     LEVEL is the optimization level specified; 2 if `-O2' is
+     specified, 1 if `-O' is specified, and 0 if neither is specified.
+
+     SIZE is nonzero if `-Os' is specified and zero otherwise.
+
+     This macro is run once at program startup and when the optimization
+     options are changed via `#pragma GCC optimize' or by using the
+     `optimize' attribute.
+
+     *Do not examine `write_symbols' in this macro!* The debugging
+     options are not supposed to alter the generated code.
+
+ -- Target Hook: void TARGET_HELP (void)
+     This hook is called in response to the user invoking
+     `--target-help' on the command line.  It gives the target a chance
+     to display extra information on the target specific command line
+     options found in its `.opt' file.
+
+ -- Macro: CAN_DEBUG_WITHOUT_FP
+     Define this macro if debugging can be performed even without a
+     frame pointer.  If this macro is defined, GCC will turn on the
+     `-fomit-frame-pointer' option whenever `-O' is specified.
+
+
+File: gccint.info,  Node: Per-Function Data,  Next: Storage Layout,  Prev: Run-time Target,  Up: Target Macros
+
+17.4 Defining data structures for per-function information.
+===========================================================
+
+If the target needs to store information on a per-function basis, GCC
+provides a macro and a couple of variables to allow this.  Note, just
+using statics to store the information is a bad idea, since GCC supports
+nested functions, so you can be halfway through encoding one function
+when another one comes along.
+
+ GCC defines a data structure called `struct function' which contains
+all of the data specific to an individual function.  This structure
+contains a field called `machine' whose type is `struct
+machine_function *', which can be used by targets to point to their own
+specific data.
+
+ If a target needs per-function specific data it should define the type
+`struct machine_function' and also the macro `INIT_EXPANDERS'.  This
+macro should be used to initialize the function pointer
+`init_machine_status'.  This pointer is explained below.
+
+ One typical use of per-function, target specific data is to create an
+RTX to hold the register containing the function's return address.  This
+RTX can then be used to implement the `__builtin_return_address'
+function, for level 0.
+
+ Note--earlier implementations of GCC used a single data area to hold
+all of the per-function information.  Thus when processing of a nested
+function began the old per-function data had to be pushed onto a stack,
+and when the processing was finished, it had to be popped off the
+stack.  GCC used to provide function pointers called
+`save_machine_status' and `restore_machine_status' to handle the saving
+and restoring of the target specific information.  Since the single
+data area approach is no longer used, these pointers are no longer
+supported.
+
+ -- Macro: INIT_EXPANDERS
+     Macro called to initialize any target specific information.  This
+     macro is called once per function, before generation of any RTL
+     has begun.  The intention of this macro is to allow the
+     initialization of the function pointer `init_machine_status'.
+
+ -- Variable: void (*)(struct function *) init_machine_status
+     If this function pointer is non-`NULL' it will be called once per
+     function, before function compilation starts, in order to allow the
+     target to perform any target specific initialization of the
+     `struct function' structure.  It is intended that this would be
+     used to initialize the `machine' of that structure.
+
+     `struct machine_function' structures are expected to be freed by
+     GC.  Generally, any memory that they reference must be allocated
+     by using `ggc_alloc', including the structure itself.
+
+
+File: gccint.info,  Node: Storage Layout,  Next: Type Layout,  Prev: Per-Function Data,  Up: Target Macros
+
+17.5 Storage Layout
+===================
+
+Note that the definitions of the macros in this table which are sizes or
+alignments measured in bits do not need to be constant.  They can be C
+expressions that refer to static variables, such as the `target_flags'.
+*Note Run-time Target::.
+
+ -- Macro: BITS_BIG_ENDIAN
+     Define this macro to have the value 1 if the most significant bit
+     in a byte has the lowest number; otherwise define it to have the
+     value zero.  This means that bit-field instructions count from the
+     most significant bit.  If the machine has no bit-field
+     instructions, then this must still be defined, but it doesn't
+     matter which value it is defined to.  This macro need not be a
+     constant.
+
+     This macro does not affect the way structure fields are packed into
+     bytes or words; that is controlled by `BYTES_BIG_ENDIAN'.
+
+ -- Macro: BYTES_BIG_ENDIAN
+     Define this macro to have the value 1 if the most significant byte
+     in a word has the lowest number.  This macro need not be a
+     constant.
+
+ -- Macro: WORDS_BIG_ENDIAN
+     Define this macro to have the value 1 if, in a multiword object,
+     the most significant word has the lowest number.  This applies to
+     both memory locations and registers; GCC fundamentally assumes
+     that the order of words in memory is the same as the order in
+     registers.  This macro need not be a constant.
+
+ -- Macro: LIBGCC2_WORDS_BIG_ENDIAN
+     Define this macro if `WORDS_BIG_ENDIAN' is not constant.  This
+     must be a constant value with the same meaning as
+     `WORDS_BIG_ENDIAN', which will be used only when compiling
+     `libgcc2.c'.  Typically the value will be set based on
+     preprocessor defines.
+
+ -- Macro: FLOAT_WORDS_BIG_ENDIAN
+     Define this macro to have the value 1 if `DFmode', `XFmode' or
+     `TFmode' floating point numbers are stored in memory with the word
+     containing the sign bit at the lowest address; otherwise define it
+     to have the value 0.  This macro need not be a constant.
+
+     You need not define this macro if the ordering is the same as for
+     multi-word integers.
+
+ -- Macro: BITS_PER_UNIT
+     Define this macro to be the number of bits in an addressable
+     storage unit (byte).  If you do not define this macro the default
+     is 8.
+
+ -- Macro: BITS_PER_WORD
+     Number of bits in a word.  If you do not define this macro, the
+     default is `BITS_PER_UNIT * UNITS_PER_WORD'.
+
+ -- Macro: MAX_BITS_PER_WORD
+     Maximum number of bits in a word.  If this is undefined, the
+     default is `BITS_PER_WORD'.  Otherwise, it is the constant value
+     that is the largest value that `BITS_PER_WORD' can have at
+     run-time.
+
+ -- Macro: UNITS_PER_WORD
+     Number of storage units in a word; normally the size of a
+     general-purpose register, a power of two from 1 or 8.
+
+ -- Macro: MIN_UNITS_PER_WORD
+     Minimum number of units in a word.  If this is undefined, the
+     default is `UNITS_PER_WORD'.  Otherwise, it is the constant value
+     that is the smallest value that `UNITS_PER_WORD' can have at
+     run-time.
+
+ -- Macro: UNITS_PER_SIMD_WORD (MODE)
+     Number of units in the vectors that the vectorizer can produce for
+     scalar mode MODE.  The default is equal to `UNITS_PER_WORD',
+     because the vectorizer can do some transformations even in absence
+     of specialized SIMD hardware.
+
+ -- Macro: POINTER_SIZE
+     Width of a pointer, in bits.  You must specify a value no wider
+     than the width of `Pmode'.  If it is not equal to the width of
+     `Pmode', you must define `POINTERS_EXTEND_UNSIGNED'.  If you do
+     not specify a value the default is `BITS_PER_WORD'.
+
+ -- Macro: POINTERS_EXTEND_UNSIGNED
+     A C expression that determines how pointers should be extended from
+     `ptr_mode' to either `Pmode' or `word_mode'.  It is greater than
+     zero if pointers should be zero-extended, zero if they should be
+     sign-extended, and negative if some other sort of conversion is
+     needed.  In the last case, the extension is done by the target's
+     `ptr_extend' instruction.
+
+     You need not define this macro if the `ptr_mode', `Pmode' and
+     `word_mode' are all the same width.
+
+ -- Macro: PROMOTE_MODE (M, UNSIGNEDP, TYPE)
+     A macro to update M and UNSIGNEDP when an object whose type is
+     TYPE and which has the specified mode and signedness is to be
+     stored in a register.  This macro is only called when TYPE is a
+     scalar type.
+
+     On most RISC machines, which only have operations that operate on
+     a full register, define this macro to set M to `word_mode' if M is
+     an integer mode narrower than `BITS_PER_WORD'.  In most cases,
+     only integer modes should be widened because wider-precision
+     floating-point operations are usually more expensive than their
+     narrower counterparts.
+
+     For most machines, the macro definition does not change UNSIGNEDP.
+     However, some machines, have instructions that preferentially
+     handle either signed or unsigned quantities of certain modes.  For
+     example, on the DEC Alpha, 32-bit loads from memory and 32-bit add
+     instructions sign-extend the result to 64 bits.  On such machines,
+     set UNSIGNEDP according to which kind of extension is more
+     efficient.
+
+     Do not define this macro if it would never modify M.
+
+ -- Target Hook: enum machine_mode TARGET_PROMOTE_FUNCTION_MODE
+          (const_tree TYPE, enum machine_mode MODE, int *PUNSIGNEDP,
+          const_tree FUNTYPE, int FOR_RETURN)
+     Like `PROMOTE_MODE', but it is applied to outgoing function
+     arguments or function return values.  The target hook should
+     return the new mode and possibly change `*PUNSIGNEDP' if the
+     promotion should change signedness.  This function is called only
+     for scalar _or pointer_ types.
+
+     FOR_RETURN allows to distinguish the promotion of arguments and
+     return values.  If it is `1', a return value is being promoted and
+     `TARGET_FUNCTION_VALUE' must perform the same promotions done here.
+     If it is `2', the returned mode should be that of the register in
+     which an incoming parameter is copied, or the outgoing result is
+     computed; then the hook should return the same mode as
+     `promote_mode', though the signedness may be different.
+
+     The default is to not promote arguments and return values.  You can
+     also define the hook to
+     `default_promote_function_mode_always_promote' if you would like
+     to apply the same rules given by `PROMOTE_MODE'.
+
+ -- Macro: PARM_BOUNDARY
+     Normal alignment required for function parameters on the stack, in
+     bits.  All stack parameters receive at least this much alignment
+     regardless of data type.  On most machines, this is the same as the
+     size of an integer.
+
+ -- Macro: STACK_BOUNDARY
+     Define this macro to the minimum alignment enforced by hardware
+     for the stack pointer on this machine.  The definition is a C
+     expression for the desired alignment (measured in bits).  This
+     value is used as a default if `PREFERRED_STACK_BOUNDARY' is not
+     defined.  On most machines, this should be the same as
+     `PARM_BOUNDARY'.
+
+ -- Macro: PREFERRED_STACK_BOUNDARY
+     Define this macro if you wish to preserve a certain alignment for
+     the stack pointer, greater than what the hardware enforces.  The
+     definition is a C expression for the desired alignment (measured
+     in bits).  This macro must evaluate to a value equal to or larger
+     than `STACK_BOUNDARY'.
+
+ -- Macro: INCOMING_STACK_BOUNDARY
+     Define this macro if the incoming stack boundary may be different
+     from `PREFERRED_STACK_BOUNDARY'.  This macro must evaluate to a
+     value equal to or larger than `STACK_BOUNDARY'.
+
+ -- Macro: FUNCTION_BOUNDARY
+     Alignment required for a function entry point, in bits.
+
+ -- Macro: BIGGEST_ALIGNMENT
+     Biggest alignment that any data type can require on this machine,
+     in bits.  Note that this is not the biggest alignment that is
+     supported, just the biggest alignment that, when violated, may
+     cause a fault.
+
+ -- Macro: MALLOC_ABI_ALIGNMENT
+     Alignment, in bits, a C conformant malloc implementation has to
+     provide.  If not defined, the default value is `BITS_PER_WORD'.
+
+ -- Macro: ATTRIBUTE_ALIGNED_VALUE
+     Alignment used by the `__attribute__ ((aligned))' construct.  If
+     not defined, the default value is `BIGGEST_ALIGNMENT'.
+
+ -- Macro: MINIMUM_ATOMIC_ALIGNMENT
+     If defined, the smallest alignment, in bits, that can be given to
+     an object that can be referenced in one operation, without
+     disturbing any nearby object.  Normally, this is `BITS_PER_UNIT',
+     but may be larger on machines that don't have byte or half-word
+     store operations.
+
+ -- Macro: BIGGEST_FIELD_ALIGNMENT
+     Biggest alignment that any structure or union field can require on
+     this machine, in bits.  If defined, this overrides
+     `BIGGEST_ALIGNMENT' for structure and union fields only, unless
+     the field alignment has been set by the `__attribute__ ((aligned
+     (N)))' construct.
+
+ -- Macro: ADJUST_FIELD_ALIGN (FIELD, COMPUTED)
+     An expression for the alignment of a structure field FIELD if the
+     alignment computed in the usual way (including applying of
+     `BIGGEST_ALIGNMENT' and `BIGGEST_FIELD_ALIGNMENT' to the
+     alignment) is COMPUTED.  It overrides alignment only if the field
+     alignment has not been set by the `__attribute__ ((aligned (N)))'
+     construct.
+
+ -- Macro: MAX_STACK_ALIGNMENT
+     Biggest stack alignment guaranteed by the backend.  Use this macro
+     to specify the maximum alignment of a variable on stack.
+
+     If not defined, the default value is `STACK_BOUNDARY'.
+
+
+ -- Macro: MAX_OFILE_ALIGNMENT
+     Biggest alignment supported by the object file format of this
+     machine.  Use this macro to limit the alignment which can be
+     specified using the `__attribute__ ((aligned (N)))' construct.  If
+     not defined, the default value is `BIGGEST_ALIGNMENT'.
+
+     On systems that use ELF, the default (in `config/elfos.h') is the
+     largest supported 32-bit ELF section alignment representable on a
+     32-bit host e.g. `(((unsigned HOST_WIDEST_INT) 1 << 28) * 8)'.  On
+     32-bit ELF the largest supported section alignment in bits is
+     `(0x80000000 * 8)', but this is not representable on 32-bit hosts.
+
+ -- Macro: DATA_ALIGNMENT (TYPE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for a variable
+     in the static store.  TYPE is the data type, and BASIC-ALIGN is
+     the alignment that the object would ordinarily have.  The value of
+     this macro is used instead of that alignment to align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.  Another is to cause
+     character arrays to be word-aligned so that `strcpy' calls that
+     copy constants to character arrays can be done inline.
+
+ -- Macro: CONSTANT_ALIGNMENT (CONSTANT, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment given to a
+     constant that is being placed in memory.  CONSTANT is the constant
+     and BASIC-ALIGN is the alignment that the object would ordinarily
+     have.  The value of this macro is used instead of that alignment to
+     align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     The typical use of this macro is to increase alignment for string
+     constants to be word aligned so that `strcpy' calls that copy
+     constants can be done inline.
+
+ -- Macro: LOCAL_ALIGNMENT (TYPE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for a variable
+     in the local store.  TYPE is the data type, and BASIC-ALIGN is the
+     alignment that the object would ordinarily have.  The value of this
+     macro is used instead of that alignment to align the object.
+
+     If this macro is not defined, then BASIC-ALIGN is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.
+
+ -- Macro: STACK_SLOT_ALIGNMENT (TYPE, MODE, BASIC-ALIGN)
+     If defined, a C expression to compute the alignment for stack slot.
+     TYPE is the data type, MODE is the widest mode available, and
+     BASIC-ALIGN is the alignment that the slot would ordinarily have.
+     The value of this macro is used instead of that alignment to align
+     the slot.
+
+     If this macro is not defined, then BASIC-ALIGN is used when TYPE
+     is `NULL'.  Otherwise, `LOCAL_ALIGNMENT' will be used.
+
+     This macro is to set alignment of stack slot to the maximum
+     alignment of all possible modes which the slot may have.
+
+ -- Macro: LOCAL_DECL_ALIGNMENT (DECL)
+     If defined, a C expression to compute the alignment for a local
+     variable DECL.
+
+     If this macro is not defined, then `LOCAL_ALIGNMENT (TREE_TYPE
+     (DECL), DECL_ALIGN (DECL))' is used.
+
+     One use of this macro is to increase alignment of medium-size data
+     to make it all fit in fewer cache lines.
+
+ -- Macro: MINIMUM_ALIGNMENT (EXP, MODE, ALIGN)
+     If defined, a C expression to compute the minimum required
+     alignment for dynamic stack realignment purposes for EXP (a type
+     or decl), MODE, assuming normal alignment ALIGN.
+
+     If this macro is not defined, then ALIGN will be used.
+
+ -- Macro: EMPTY_FIELD_BOUNDARY
+     Alignment in bits to be given to a structure bit-field that
+     follows an empty field such as `int : 0;'.
+
+     If `PCC_BITFIELD_TYPE_MATTERS' is true, it overrides this macro.
+
+ -- Macro: STRUCTURE_SIZE_BOUNDARY
+     Number of bits which any structure or union's size must be a
+     multiple of.  Each structure or union's size is rounded up to a
+     multiple of this.
+
+     If you do not define this macro, the default is the same as
+     `BITS_PER_UNIT'.
+
+ -- Macro: STRICT_ALIGNMENT
+     Define this macro to be the value 1 if instructions will fail to
+     work if given data not on the nominal alignment.  If instructions
+     will merely go slower in that case, define this macro as 0.
+
+ -- Macro: PCC_BITFIELD_TYPE_MATTERS
+     Define this if you wish to imitate the way many other C compilers
+     handle alignment of bit-fields and the structures that contain
+     them.
+
+     The behavior is that the type written for a named bit-field (`int',
+     `short', or other integer type) imposes an alignment for the entire
+     structure, as if the structure really did contain an ordinary
+     field of that type.  In addition, the bit-field is placed within
+     the structure so that it would fit within such a field, not
+     crossing a boundary for it.
+
+     Thus, on most machines, a named bit-field whose type is written as
+     `int' would not cross a four-byte boundary, and would force
+     four-byte alignment for the whole structure.  (The alignment used
+     may not be four bytes; it is controlled by the other alignment
+     parameters.)
+
+     An unnamed bit-field will not affect the alignment of the
+     containing structure.
+
+     If the macro is defined, its definition should be a C expression;
+     a nonzero value for the expression enables this behavior.
+
+     Note that if this macro is not defined, or its value is zero, some
+     bit-fields may cross more than one alignment boundary.  The
+     compiler can support such references if there are `insv', `extv',
+     and `extzv' insns that can directly reference memory.
+
+     The other known way of making bit-fields work is to define
+     `STRUCTURE_SIZE_BOUNDARY' as large as `BIGGEST_ALIGNMENT'.  Then
+     every structure can be accessed with fullwords.
+
+     Unless the machine has bit-field instructions or you define
+     `STRUCTURE_SIZE_BOUNDARY' that way, you must define
+     `PCC_BITFIELD_TYPE_MATTERS' to have a nonzero value.
+
+     If your aim is to make GCC use the same conventions for laying out
+     bit-fields as are used by another compiler, here is how to
+     investigate what the other compiler does.  Compile and run this
+     program:
+
+          struct foo1
+          {
+            char x;
+            char :0;
+            char y;
+          };
+
+          struct foo2
+          {
+            char x;
+            int :0;
+            char y;
+          };
+
+          main ()
+          {
+            printf ("Size of foo1 is %d\n",
+                    sizeof (struct foo1));
+            printf ("Size of foo2 is %d\n",
+                    sizeof (struct foo2));
+            exit (0);
+          }
+
+     If this prints 2 and 5, then the compiler's behavior is what you
+     would get from `PCC_BITFIELD_TYPE_MATTERS'.
+
+ -- Macro: BITFIELD_NBYTES_LIMITED
+     Like `PCC_BITFIELD_TYPE_MATTERS' except that its effect is limited
+     to aligning a bit-field within the structure.
+
+ -- Target Hook: bool TARGET_ALIGN_ANON_BITFIELD (void)
+     When `PCC_BITFIELD_TYPE_MATTERS' is true this hook will determine
+     whether unnamed bitfields affect the alignment of the containing
+     structure.  The hook should return true if the structure should
+     inherit the alignment requirements of an unnamed bitfield's type.
+
+ -- Target Hook: bool TARGET_NARROW_VOLATILE_BITFIELD (void)
+     This target hook should return `true' if accesses to volatile
+     bitfields should use the narrowest mode possible.  It should
+     return `false' if these accesses should use the bitfield container
+     type.
+
+     The default is `!TARGET_STRICT_ALIGN'.
+
+ -- Macro: MEMBER_TYPE_FORCES_BLK (FIELD, MODE)
+     Return 1 if a structure or array containing FIELD should be
+     accessed using `BLKMODE'.
+
+     If FIELD is the only field in the structure, MODE is its mode,
+     otherwise MODE is VOIDmode.  MODE is provided in the case where
+     structures of one field would require the structure's mode to
+     retain the field's mode.
+
+     Normally, this is not needed.
+
+ -- Macro: ROUND_TYPE_ALIGN (TYPE, COMPUTED, SPECIFIED)
+     Define this macro as an expression for the alignment of a type
+     (given by TYPE as a tree node) if the alignment computed in the
+     usual way is COMPUTED and the alignment explicitly specified was
+     SPECIFIED.
+
+     The default is to use SPECIFIED if it is larger; otherwise, use
+     the smaller of COMPUTED and `BIGGEST_ALIGNMENT'
+
+ -- Macro: MAX_FIXED_MODE_SIZE
+     An integer expression for the size in bits of the largest integer
+     machine mode that should actually be used.  All integer machine
+     modes of this size or smaller can be used for structures and
+     unions with the appropriate sizes.  If this macro is undefined,
+     `GET_MODE_BITSIZE (DImode)' is assumed.
+
+ -- Macro: STACK_SAVEAREA_MODE (SAVE_LEVEL)
+     If defined, an expression of type `enum machine_mode' that
+     specifies the mode of the save area operand of a
+     `save_stack_LEVEL' named pattern (*note Standard Names::).
+     SAVE_LEVEL is one of `SAVE_BLOCK', `SAVE_FUNCTION', or
+     `SAVE_NONLOCAL' and selects which of the three named patterns is
+     having its mode specified.
+
+     You need not define this macro if it always returns `Pmode'.  You
+     would most commonly define this macro if the `save_stack_LEVEL'
+     patterns need to support both a 32- and a 64-bit mode.
+
+ -- Macro: STACK_SIZE_MODE
+     If defined, an expression of type `enum machine_mode' that
+     specifies the mode of the size increment operand of an
+     `allocate_stack' named pattern (*note Standard Names::).
+
+     You need not define this macro if it always returns `word_mode'.
+     You would most commonly define this macro if the `allocate_stack'
+     pattern needs to support both a 32- and a 64-bit mode.
+
+ -- Target Hook: enum machine_mode TARGET_LIBGCC_CMP_RETURN_MODE (void)
+     This target hook should return the mode to be used for the return
+     value of compare instructions expanded to libgcc calls.  If not
+     defined `word_mode' is returned which is the right choice for a
+     majority of targets.
+
+ -- Target Hook: enum machine_mode TARGET_LIBGCC_SHIFT_COUNT_MODE (void)
+     This target hook should return the mode to be used for the shift
+     count operand of shift instructions expanded to libgcc calls.  If
+     not defined `word_mode' is returned which is the right choice for
+     a majority of targets.
+
+ -- Target Hook: enum machine_mode TARGET_UNWIND_WORD_MODE (void)
+     Return machine mode to be used for `_Unwind_Word' type.  The
+     default is to use `word_mode'.
+
+ -- Macro: ROUND_TOWARDS_ZERO
+     If defined, this macro should be true if the prevailing rounding
+     mode is towards zero.
+
+     Defining this macro only affects the way `libgcc.a' emulates
+     floating-point arithmetic.
+
+     Not defining this macro is equivalent to returning zero.
+
+ -- Macro: LARGEST_EXPONENT_IS_NORMAL (SIZE)
+     This macro should return true if floats with SIZE bits do not have
+     a NaN or infinity representation, but use the largest exponent for
+     normal numbers instead.
+
+     Defining this macro only affects the way `libgcc.a' emulates
+     floating-point arithmetic.
+
+     The default definition of this macro returns false for all sizes.
+
+ -- Target Hook: bool TARGET_MS_BITFIELD_LAYOUT_P (const_tree
+          RECORD_TYPE)
+     This target hook returns `true' if bit-fields in the given
+     RECORD_TYPE are to be laid out following the rules of Microsoft
+     Visual C/C++, namely: (i) a bit-field won't share the same storage
+     unit with the previous bit-field if their underlying types have
+     different sizes, and the bit-field will be aligned to the highest
+     alignment of the underlying types of itself and of the previous
+     bit-field; (ii) a zero-sized bit-field will affect the alignment of
+     the whole enclosing structure, even if it is unnamed; except that
+     (iii) a zero-sized bit-field will be disregarded unless it follows
+     another bit-field of nonzero size.  If this hook returns `true',
+     other macros that control bit-field layout are ignored.
+
+     When a bit-field is inserted into a packed record, the whole size
+     of the underlying type is used by one or more same-size adjacent
+     bit-fields (that is, if its long:3, 32 bits is used in the record,
+     and any additional adjacent long bit-fields are packed into the
+     same chunk of 32 bits.  However, if the size changes, a new field
+     of that size is allocated).  In an unpacked record, this is the
+     same as using alignment, but not equivalent when packing.
+
+     If both MS bit-fields and `__attribute__((packed))' are used, the
+     latter will take precedence.  If `__attribute__((packed))' is used
+     on a single field when MS bit-fields are in use, it will take
+     precedence for that field, but the alignment of the rest of the
+     structure may affect its placement.
+
+ -- Target Hook: bool TARGET_DECIMAL_FLOAT_SUPPORTED_P (void)
+     Returns true if the target supports decimal floating point.
+
+ -- Target Hook: bool TARGET_FIXED_POINT_SUPPORTED_P (void)
+     Returns true if the target supports fixed-point arithmetic.
+
+ -- Target Hook: void TARGET_EXPAND_TO_RTL_HOOK (void)
+     This hook is called just before expansion into rtl, allowing the
+     target to perform additional initializations or analysis before
+     the expansion.  For example, the rs6000 port uses it to allocate a
+     scratch stack slot for use in copying SDmode values between memory
+     and floating point registers whenever the function being expanded
+     has any SDmode usage.
+
+ -- Target Hook: void TARGET_INSTANTIATE_DECLS (void)
+     This hook allows the backend to perform additional instantiations
+     on rtl that are not actually in any insns yet, but will be later.
+
+ -- Target Hook: const char * TARGET_MANGLE_TYPE (const_tree TYPE)
+     If your target defines any fundamental types, or any types your
+     target uses should be mangled differently from the default, define
+     this hook to return the appropriate encoding for these types as
+     part of a C++ mangled name.  The TYPE argument is the tree
+     structure representing the type to be mangled.  The hook may be
+     applied to trees which are not target-specific fundamental types;
+     it should return `NULL' for all such types, as well as arguments
+     it does not recognize.  If the return value is not `NULL', it must
+     point to a statically-allocated string constant.
+
+     Target-specific fundamental types might be new fundamental types or
+     qualified versions of ordinary fundamental types.  Encode new
+     fundamental types as `u N NAME', where NAME is the name used for
+     the type in source code, and N is the length of NAME in decimal.
+     Encode qualified versions of ordinary types as `U N NAME CODE',
+     where NAME is the name used for the type qualifier in source code,
+     N is the length of NAME as above, and CODE is the code used to
+     represent the unqualified version of this type.  (See
+     `write_builtin_type' in `cp/mangle.c' for the list of codes.)  In
+     both cases the spaces are for clarity; do not include any spaces
+     in your string.
+
+     This hook is applied to types prior to typedef resolution.  If the
+     mangled name for a particular type depends only on that type's
+     main variant, you can perform typedef resolution yourself using
+     `TYPE_MAIN_VARIANT' before mangling.
+
+     The default version of this hook always returns `NULL', which is
+     appropriate for a target that does not define any new fundamental
+     types.
+
+
+File: gccint.info,  Node: Type Layout,  Next: Registers,  Prev: Storage Layout,  Up: Target Macros
+
+17.6 Layout of Source Language Data Types
+=========================================
+
+These macros define the sizes and other characteristics of the standard
+basic data types used in programs being compiled.  Unlike the macros in
+the previous section, these apply to specific features of C and related
+languages, rather than to fundamental aspects of storage layout.
+
+ -- Macro: INT_TYPE_SIZE
+     A C expression for the size in bits of the type `int' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: SHORT_TYPE_SIZE
+     A C expression for the size in bits of the type `short' on the
+     target machine.  If you don't define this, the default is half a
+     word.  (If this would be less than one storage unit, it is rounded
+     up to one unit.)
+
+ -- Macro: LONG_TYPE_SIZE
+     A C expression for the size in bits of the type `long' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: ADA_LONG_TYPE_SIZE
+     On some machines, the size used for the Ada equivalent of the type
+     `long' by a native Ada compiler differs from that used by C.  In
+     that situation, define this macro to be a C expression to be used
+     for the size of that type.  If you don't define this, the default
+     is the value of `LONG_TYPE_SIZE'.
+
+ -- Macro: LONG_LONG_TYPE_SIZE
+     A C expression for the size in bits of the type `long long' on the
+     target machine.  If you don't define this, the default is two
+     words.  If you want to support GNU Ada on your machine, the value
+     of this macro must be at least 64.
+
+ -- Macro: CHAR_TYPE_SIZE
+     A C expression for the size in bits of the type `char' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT'.
+
+ -- Macro: BOOL_TYPE_SIZE
+     A C expression for the size in bits of the C++ type `bool' and C99
+     type `_Bool' on the target machine.  If you don't define this, and
+     you probably shouldn't, the default is `CHAR_TYPE_SIZE'.
+
+ -- Macro: FLOAT_TYPE_SIZE
+     A C expression for the size in bits of the type `float' on the
+     target machine.  If you don't define this, the default is one word.
+
+ -- Macro: DOUBLE_TYPE_SIZE
+     A C expression for the size in bits of the type `double' on the
+     target machine.  If you don't define this, the default is two
+     words.
+
+ -- Macro: LONG_DOUBLE_TYPE_SIZE
+     A C expression for the size in bits of the type `long double' on
+     the target machine.  If you don't define this, the default is two
+     words.
+
+ -- Macro: SHORT_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `short _Fract' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT'.
+
+ -- Macro: FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `_Fract' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 2'.
+
+ -- Macro: LONG_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `long _Fract' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 4'.
+
+ -- Macro: LONG_LONG_FRACT_TYPE_SIZE
+     A C expression for the size in bits of the type `long long _Fract'
+     on the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 8'.
+
+ -- Macro: SHORT_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `short _Accum' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 2'.
+
+ -- Macro: ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `_Accum' on the
+     target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 4'.
+
+ -- Macro: LONG_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `long _Accum' on
+     the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 8'.
+
+ -- Macro: LONG_LONG_ACCUM_TYPE_SIZE
+     A C expression for the size in bits of the type `long long _Accum'
+     on the target machine.  If you don't define this, the default is
+     `BITS_PER_UNIT * 16'.
+
+ -- Macro: LIBGCC2_LONG_DOUBLE_TYPE_SIZE
+     Define this macro if `LONG_DOUBLE_TYPE_SIZE' is not constant or if
+     you want routines in `libgcc2.a' for a size other than
+     `LONG_DOUBLE_TYPE_SIZE'.  If you don't define this, the default is
+     `LONG_DOUBLE_TYPE_SIZE'.
+
+ -- Macro: LIBGCC2_HAS_DF_MODE
+     Define this macro if neither `LIBGCC2_DOUBLE_TYPE_SIZE' nor
+     `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is `DFmode' but you want `DFmode'
+     routines in `libgcc2.a' anyway.  If you don't define this and
+     either `LIBGCC2_DOUBLE_TYPE_SIZE' or
+     `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 64 then the default is 1,
+     otherwise it is 0.
+
+ -- Macro: LIBGCC2_HAS_XF_MODE
+     Define this macro if `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is not
+     `XFmode' but you want `XFmode' routines in `libgcc2.a' anyway.  If
+     you don't define this and `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 80
+     then the default is 1, otherwise it is 0.
+
+ -- Macro: LIBGCC2_HAS_TF_MODE
+     Define this macro if `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is not
+     `TFmode' but you want `TFmode' routines in `libgcc2.a' anyway.  If
+     you don't define this and `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 128
+     then the default is 1, otherwise it is 0.
+
+ -- Macro: SF_SIZE
+ -- Macro: DF_SIZE
+ -- Macro: XF_SIZE
+ -- Macro: TF_SIZE
+     Define these macros to be the size in bits of the mantissa of
+     `SFmode', `DFmode', `XFmode' and `TFmode' values, if the defaults
+     in `libgcc2.h' are inappropriate.  By default, `FLT_MANT_DIG' is
+     used for `SF_SIZE', `LDBL_MANT_DIG' for `XF_SIZE' and `TF_SIZE',
+     and `DBL_MANT_DIG' or `LDBL_MANT_DIG' for `DF_SIZE' according to
+     whether `LIBGCC2_DOUBLE_TYPE_SIZE' or
+     `LIBGCC2_LONG_DOUBLE_TYPE_SIZE' is 64.
+
+ -- Macro: TARGET_FLT_EVAL_METHOD
+     A C expression for the value for `FLT_EVAL_METHOD' in `float.h',
+     assuming, if applicable, that the floating-point control word is
+     in its default state.  If you do not define this macro the value of
+     `FLT_EVAL_METHOD' will be zero.
+
+ -- Macro: WIDEST_HARDWARE_FP_SIZE
+     A C expression for the size in bits of the widest floating-point
+     format supported by the hardware.  If you define this macro, you
+     must specify a value less than or equal to the value of
+     `LONG_DOUBLE_TYPE_SIZE'.  If you do not define this macro, the
+     value of `LONG_DOUBLE_TYPE_SIZE' is the default.
+
+ -- Macro: DEFAULT_SIGNED_CHAR
+     An expression whose value is 1 or 0, according to whether the type
+     `char' should be signed or unsigned by default.  The user can
+     always override this default with the options `-fsigned-char' and
+     `-funsigned-char'.
+
+ -- Target Hook: bool TARGET_DEFAULT_SHORT_ENUMS (void)
+     This target hook should return true if the compiler should give an
+     `enum' type only as many bytes as it takes to represent the range
+     of possible values of that type.  It should return false if all
+     `enum' types should be allocated like `int'.
+
+     The default is to return false.
+
+ -- Macro: SIZE_TYPE
+     A C expression for a string describing the name of the data type
+     to use for size values.  The typedef name `size_t' is defined
+     using the contents of the string.
+
+     The string can contain more than one keyword.  If so, separate
+     them with spaces, and write first any length keyword, then
+     `unsigned' if appropriate, and finally `int'.  The string must
+     exactly match one of the data type names defined in the function
+     `init_decl_processing' in the file `c-decl.c'.  You may not omit
+     `int' or change the order--that would cause the compiler to crash
+     on startup.
+
+     If you don't define this macro, the default is `"long unsigned
+     int"'.
+
+ -- Macro: PTRDIFF_TYPE
+     A C expression for a string describing the name of the data type
+     to use for the result of subtracting two pointers.  The typedef
+     name `ptrdiff_t' is defined using the contents of the string.  See
+     `SIZE_TYPE' above for more information.
+
+     If you don't define this macro, the default is `"long int"'.
+
+ -- Macro: WCHAR_TYPE
+     A C expression for a string describing the name of the data type
+     to use for wide characters.  The typedef name `wchar_t' is defined
+     using the contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is `"int"'.
+
+ -- Macro: WCHAR_TYPE_SIZE
+     A C expression for the size in bits of the data type for wide
+     characters.  This is used in `cpp', which cannot make use of
+     `WCHAR_TYPE'.
+
+ -- Macro: WINT_TYPE
+     A C expression for a string describing the name of the data type to
+     use for wide characters passed to `printf' and returned from
+     `getwc'.  The typedef name `wint_t' is defined using the contents
+     of the string.  See `SIZE_TYPE' above for more information.
+
+     If you don't define this macro, the default is `"unsigned int"'.
+
+ -- Macro: INTMAX_TYPE
+     A C expression for a string describing the name of the data type
+     that can represent any value of any standard or extended signed
+     integer type.  The typedef name `intmax_t' is defined using the
+     contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is the first of
+     `"int"', `"long int"', or `"long long int"' that has as much
+     precision as `long long int'.
+
+ -- Macro: UINTMAX_TYPE
+     A C expression for a string describing the name of the data type
+     that can represent any value of any standard or extended unsigned
+     integer type.  The typedef name `uintmax_t' is defined using the
+     contents of the string.  See `SIZE_TYPE' above for more
+     information.
+
+     If you don't define this macro, the default is the first of
+     `"unsigned int"', `"long unsigned int"', or `"long long unsigned
+     int"' that has as much precision as `long long unsigned int'.
+
+ -- Macro: SIG_ATOMIC_TYPE
+ -- Macro: INT8_TYPE
+ -- Macro: INT16_TYPE
+ -- Macro: INT32_TYPE
+ -- Macro: INT64_TYPE
+ -- Macro: UINT8_TYPE
+ -- Macro: UINT16_TYPE
+ -- Macro: UINT32_TYPE
+ -- Macro: UINT64_TYPE
+ -- Macro: INT_LEAST8_TYPE
+ -- Macro: INT_LEAST16_TYPE
+ -- Macro: INT_LEAST32_TYPE
+ -- Macro: INT_LEAST64_TYPE
+ -- Macro: UINT_LEAST8_TYPE
+ -- Macro: UINT_LEAST16_TYPE
+ -- Macro: UINT_LEAST32_TYPE
+ -- Macro: UINT_LEAST64_TYPE
+ -- Macro: INT_FAST8_TYPE
+ -- Macro: INT_FAST16_TYPE
+ -- Macro: INT_FAST32_TYPE
+ -- Macro: INT_FAST64_TYPE
+ -- Macro: UINT_FAST8_TYPE
+ -- Macro: UINT_FAST16_TYPE
+ -- Macro: UINT_FAST32_TYPE
+ -- Macro: UINT_FAST64_TYPE
+ -- Macro: INTPTR_TYPE
+ -- Macro: UINTPTR_TYPE
+     C expressions for the standard types `sig_atomic_t', `int8_t',
+     `int16_t', `int32_t', `int64_t', `uint8_t', `uint16_t',
+     `uint32_t', `uint64_t', `int_least8_t', `int_least16_t',
+     `int_least32_t', `int_least64_t', `uint_least8_t',
+     `uint_least16_t', `uint_least32_t', `uint_least64_t',
+     `int_fast8_t', `int_fast16_t', `int_fast32_t', `int_fast64_t',
+     `uint_fast8_t', `uint_fast16_t', `uint_fast32_t', `uint_fast64_t',
+     `intptr_t', and `uintptr_t'.  See `SIZE_TYPE' above for more
+     information.
+
+     If any of these macros evaluates to a null pointer, the
+     corresponding type is not supported; if GCC is configured to
+     provide `<stdint.h>' in such a case, the header provided may not
+     conform to C99, depending on the type in question.  The defaults
+     for all of these macros are null pointers.
+
+ -- Macro: TARGET_PTRMEMFUNC_VBIT_LOCATION
+     The C++ compiler represents a pointer-to-member-function with a
+     struct that looks like:
+
+            struct {
+              union {
+                void (*fn)();
+                ptrdiff_t vtable_index;
+              };
+              ptrdiff_t delta;
+            };
+
+     The C++ compiler must use one bit to indicate whether the function
+     that will be called through a pointer-to-member-function is
+     virtual.  Normally, we assume that the low-order bit of a function
+     pointer must always be zero.  Then, by ensuring that the
+     vtable_index is odd, we can distinguish which variant of the union
+     is in use.  But, on some platforms function pointers can be odd,
+     and so this doesn't work.  In that case, we use the low-order bit
+     of the `delta' field, and shift the remainder of the `delta' field
+     to the left.
+
+     GCC will automatically make the right selection about where to
+     store this bit using the `FUNCTION_BOUNDARY' setting for your
+     platform.  However, some platforms such as ARM/Thumb have
+     `FUNCTION_BOUNDARY' set such that functions always start at even
+     addresses, but the lowest bit of pointers to functions indicate
+     whether the function at that address is in ARM or Thumb mode.  If
+     this is the case of your architecture, you should define this
+     macro to `ptrmemfunc_vbit_in_delta'.
+
+     In general, you should not have to define this macro.  On
+     architectures in which function addresses are always even,
+     according to `FUNCTION_BOUNDARY', GCC will automatically define
+     this macro to `ptrmemfunc_vbit_in_pfn'.
+
+ -- Macro: TARGET_VTABLE_USES_DESCRIPTORS
+     Normally, the C++ compiler uses function pointers in vtables.  This
+     macro allows the target to change to use "function descriptors"
+     instead.  Function descriptors are found on targets for whom a
+     function pointer is actually a small data structure.  Normally the
+     data structure consists of the actual code address plus a data
+     pointer to which the function's data is relative.
+
+     If vtables are used, the value of this macro should be the number
+     of words that the function descriptor occupies.
+
+ -- Macro: TARGET_VTABLE_ENTRY_ALIGN
+     By default, the vtable entries are void pointers, the so the
+     alignment is the same as pointer alignment.  The value of this
+     macro specifies the alignment of the vtable entry in bits.  It
+     should be defined only when special alignment is necessary. */
+
+ -- Macro: TARGET_VTABLE_DATA_ENTRY_DISTANCE
+     There are a few non-descriptor entries in the vtable at offsets
+     below zero.  If these entries must be padded (say, to preserve the
+     alignment specified by `TARGET_VTABLE_ENTRY_ALIGN'), set this to
+     the number of words in each data entry.
+
+
+File: gccint.info,  Node: Registers,  Next: Register Classes,  Prev: Type Layout,  Up: Target Macros
+
+17.7 Register Usage
+===================
+
+This section explains how to describe what registers the target machine
+has, and how (in general) they can be used.
+
+ The description of which registers a specific instruction can use is
+done with register classes; see *note Register Classes::.  For
+information on using registers to access a stack frame, see *note Frame
+Registers::.  For passing values in registers, see *note Register
+Arguments::.  For returning values in registers, see *note Scalar
+Return::.
+
+* Menu:
+
+* Register Basics::             Number and kinds of registers.
+* Allocation Order::            Order in which registers are allocated.
+* Values in Registers::         What kinds of values each reg can hold.
+* Leaf Functions::              Renumbering registers for leaf functions.
+* Stack Registers::             Handling a register stack such as 80387.
+
+
+File: gccint.info,  Node: Register Basics,  Next: Allocation Order,  Up: Registers
+
+17.7.1 Basic Characteristics of Registers
+-----------------------------------------
+
+Registers have various characteristics.
+
+ -- Macro: FIRST_PSEUDO_REGISTER
+     Number of hardware registers known to the compiler.  They receive
+     numbers 0 through `FIRST_PSEUDO_REGISTER-1'; thus, the first
+     pseudo register's number really is assigned the number
+     `FIRST_PSEUDO_REGISTER'.
+
+ -- Macro: FIXED_REGISTERS
+     An initializer that says which registers are used for fixed
+     purposes all throughout the compiled code and are therefore not
+     available for general allocation.  These would include the stack
+     pointer, the frame pointer (except on machines where that can be
+     used as a general register when no frame pointer is needed), the
+     program counter on machines where that is considered one of the
+     addressable registers, and any other numbered register with a
+     standard use.
+
+     This information is expressed as a sequence of numbers, separated
+     by commas and surrounded by braces.  The Nth number is 1 if
+     register N is fixed, 0 otherwise.
+
+     The table initialized from this macro, and the table initialized by
+     the following one, may be overridden at run time either
+     automatically, by the actions of the macro
+     `CONDITIONAL_REGISTER_USAGE', or by the user with the command
+     options `-ffixed-REG', `-fcall-used-REG' and `-fcall-saved-REG'.
+
+ -- Macro: CALL_USED_REGISTERS
+     Like `FIXED_REGISTERS' but has 1 for each register that is
+     clobbered (in general) by function calls as well as for fixed
+     registers.  This macro therefore identifies the registers that are
+     not available for general allocation of values that must live
+     across function calls.
+
+     If a register has 0 in `CALL_USED_REGISTERS', the compiler
+     automatically saves it on function entry and restores it on
+     function exit, if the register is used within the function.
+
+ -- Macro: CALL_REALLY_USED_REGISTERS
+     Like `CALL_USED_REGISTERS' except this macro doesn't require that
+     the entire set of `FIXED_REGISTERS' be included.
+     (`CALL_USED_REGISTERS' must be a superset of `FIXED_REGISTERS').
+     This macro is optional.  If not specified, it defaults to the value
+     of `CALL_USED_REGISTERS'.
+
+ -- Macro: HARD_REGNO_CALL_PART_CLOBBERED (REGNO, MODE)
+     A C expression that is nonzero if it is not permissible to store a
+     value of mode MODE in hard register number REGNO across a call
+     without some part of it being clobbered.  For most machines this
+     macro need not be defined.  It is only required for machines that
+     do not preserve the entire contents of a register across a call.
+
+ -- Macro: CONDITIONAL_REGISTER_USAGE
+     Zero or more C statements that may conditionally modify five
+     variables `fixed_regs', `call_used_regs', `global_regs',
+     `reg_names', and `reg_class_contents', to take into account any
+     dependence of these register sets on target flags.  The first three
+     of these are of type `char []' (interpreted as Boolean vectors).
+     `global_regs' is a `const char *[]', and `reg_class_contents' is a
+     `HARD_REG_SET'.  Before the macro is called, `fixed_regs',
+     `call_used_regs', `reg_class_contents', and `reg_names' have been
+     initialized from `FIXED_REGISTERS', `CALL_USED_REGISTERS',
+     `REG_CLASS_CONTENTS', and `REGISTER_NAMES', respectively.
+     `global_regs' has been cleared, and any `-ffixed-REG',
+     `-fcall-used-REG' and `-fcall-saved-REG' command options have been
+     applied.
+
+     You need not define this macro if it has no work to do.
+
+     If the usage of an entire class of registers depends on the target
+     flags, you may indicate this to GCC by using this macro to modify
+     `fixed_regs' and `call_used_regs' to 1 for each of the registers
+     in the classes which should not be used by GCC.  Also define the
+     macro `REG_CLASS_FROM_LETTER' / `REG_CLASS_FROM_CONSTRAINT' to
+     return `NO_REGS' if it is called with a letter for a class that
+     shouldn't be used.
+
+     (However, if this class is not included in `GENERAL_REGS' and all
+     of the insn patterns whose constraints permit this class are
+     controlled by target switches, then GCC will automatically avoid
+     using these registers when the target switches are opposed to
+     them.)
+
+ -- Macro: INCOMING_REGNO (OUT)
+     Define this macro if the target machine has register windows.
+     This C expression returns the register number as seen by the
+     called function corresponding to the register number OUT as seen
+     by the calling function.  Return OUT if register number OUT is not
+     an outbound register.
+
+ -- Macro: OUTGOING_REGNO (IN)
+     Define this macro if the target machine has register windows.
+     This C expression returns the register number as seen by the
+     calling function corresponding to the register number IN as seen
+     by the called function.  Return IN if register number IN is not an
+     inbound register.
+
+ -- Macro: LOCAL_REGNO (REGNO)
+     Define this macro if the target machine has register windows.
+     This C expression returns true if the register is call-saved but
+     is in the register window.  Unlike most call-saved registers, such
+     registers need not be explicitly restored on function exit or
+     during non-local gotos.
+
+ -- Macro: PC_REGNUM
+     If the program counter has a register number, define this as that
+     register number.  Otherwise, do not define it.
+
+
+File: gccint.info,  Node: Allocation Order,  Next: Values in Registers,  Prev: Register Basics,  Up: Registers
+
+17.7.2 Order of Allocation of Registers
+---------------------------------------
+
+Registers are allocated in order.
+
+ -- Macro: REG_ALLOC_ORDER
+     If defined, an initializer for a vector of integers, containing the
+     numbers of hard registers in the order in which GCC should prefer
+     to use them (from most preferred to least).
+
+     If this macro is not defined, registers are used lowest numbered
+     first (all else being equal).
+
+     One use of this macro is on machines where the highest numbered
+     registers must always be saved and the save-multiple-registers
+     instruction supports only sequences of consecutive registers.  On
+     such machines, define `REG_ALLOC_ORDER' to be an initializer that
+     lists the highest numbered allocable register first.
+
+ -- Macro: ORDER_REGS_FOR_LOCAL_ALLOC
+     A C statement (sans semicolon) to choose the order in which to
+     allocate hard registers for pseudo-registers local to a basic
+     block.
+
+     Store the desired register order in the array `reg_alloc_order'.
+     Element 0 should be the register to allocate first; element 1, the
+     next register; and so on.
+
+     The macro body should not assume anything about the contents of
+     `reg_alloc_order' before execution of the macro.
+
+     On most machines, it is not necessary to define this macro.
+
+ -- Macro: IRA_HARD_REGNO_ADD_COST_MULTIPLIER (REGNO)
+     In some case register allocation order is not enough for the
+     Integrated Register Allocator (IRA) to generate a good code.  If
+     this macro is defined, it should return a floating point value
+     based on REGNO.  The cost of using REGNO for a pseudo will be
+     increased by approximately the pseudo's usage frequency times the
+     value returned by this macro.  Not defining this macro is
+     equivalent to having it always return `0.0'.
+
+     On most machines, it is not necessary to define this macro.
+
+
+File: gccint.info,  Node: Values in Registers,  Next: Leaf Functions,  Prev: Allocation Order,  Up: Registers
+
+17.7.3 How Values Fit in Registers
+----------------------------------
+
+This section discusses the macros that describe which kinds of values
+(specifically, which machine modes) each register can hold, and how many
+consecutive registers are needed for a given mode.
+
+ -- Macro: HARD_REGNO_NREGS (REGNO, MODE)
+     A C expression for the number of consecutive hard registers,
+     starting at register number REGNO, required to hold a value of mode
+     MODE.  This macro must never return zero, even if a register
+     cannot hold the requested mode - indicate that with
+     HARD_REGNO_MODE_OK and/or CANNOT_CHANGE_MODE_CLASS instead.
+
+     On a machine where all registers are exactly one word, a suitable
+     definition of this macro is
+
+          #define HARD_REGNO_NREGS(REGNO, MODE)            \
+             ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1)  \
+              / UNITS_PER_WORD)
+
+ -- Macro: HARD_REGNO_NREGS_HAS_PADDING (REGNO, MODE)
+     A C expression that is nonzero if a value of mode MODE, stored in
+     memory, ends with padding that causes it to take up more space than
+     in registers starting at register number REGNO (as determined by
+     multiplying GCC's notion of the size of the register when
+     containing this mode by the number of registers returned by
+     `HARD_REGNO_NREGS').  By default this is zero.
+
+     For example, if a floating-point value is stored in three 32-bit
+     registers but takes up 128 bits in memory, then this would be
+     nonzero.
+
+     This macros only needs to be defined if there are cases where
+     `subreg_get_info' would otherwise wrongly determine that a
+     `subreg' can be represented by an offset to the register number,
+     when in fact such a `subreg' would contain some of the padding not
+     stored in registers and so not be representable.
+
+ -- Macro: HARD_REGNO_NREGS_WITH_PADDING (REGNO, MODE)
+     For values of REGNO and MODE for which
+     `HARD_REGNO_NREGS_HAS_PADDING' returns nonzero, a C expression
+     returning the greater number of registers required to hold the
+     value including any padding.  In the example above, the value
+     would be four.
+
+ -- Macro: REGMODE_NATURAL_SIZE (MODE)
+     Define this macro if the natural size of registers that hold values
+     of mode MODE is not the word size.  It is a C expression that
+     should give the natural size in bytes for the specified mode.  It
+     is used by the register allocator to try to optimize its results.
+     This happens for example on SPARC 64-bit where the natural size of
+     floating-point registers is still 32-bit.
+
+ -- Macro: HARD_REGNO_MODE_OK (REGNO, MODE)
+     A C expression that is nonzero if it is permissible to store a
+     value of mode MODE in hard register number REGNO (or in several
+     registers starting with that one).  For a machine where all
+     registers are equivalent, a suitable definition is
+
+          #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
+
+     You need not include code to check for the numbers of fixed
+     registers, because the allocation mechanism considers them to be
+     always occupied.
+
+     On some machines, double-precision values must be kept in even/odd
+     register pairs.  You can implement that by defining this macro to
+     reject odd register numbers for such modes.
+
+     The minimum requirement for a mode to be OK in a register is that
+     the `movMODE' instruction pattern support moves between the
+     register and other hard register in the same class and that moving
+     a value into the register and back out not alter it.
+
+     Since the same instruction used to move `word_mode' will work for
+     all narrower integer modes, it is not necessary on any machine for
+     `HARD_REGNO_MODE_OK' to distinguish between these modes, provided
+     you define patterns `movhi', etc., to take advantage of this.  This
+     is useful because of the interaction between `HARD_REGNO_MODE_OK'
+     and `MODES_TIEABLE_P'; it is very desirable for all integer modes
+     to be tieable.
+
+     Many machines have special registers for floating point arithmetic.
+     Often people assume that floating point machine modes are allowed
+     only in floating point registers.  This is not true.  Any
+     registers that can hold integers can safely _hold_ a floating
+     point machine mode, whether or not floating arithmetic can be done
+     on it in those registers.  Integer move instructions can be used
+     to move the values.
+
+     On some machines, though, the converse is true: fixed-point machine
+     modes may not go in floating registers.  This is true if the
+     floating registers normalize any value stored in them, because
+     storing a non-floating value there would garble it.  In this case,
+     `HARD_REGNO_MODE_OK' should reject fixed-point machine modes in
+     floating registers.  But if the floating registers do not
+     automatically normalize, if you can store any bit pattern in one
+     and retrieve it unchanged without a trap, then any machine mode
+     may go in a floating register, so you can define this macro to say
+     so.
+
+     The primary significance of special floating registers is rather
+     that they are the registers acceptable in floating point arithmetic
+     instructions.  However, this is of no concern to
+     `HARD_REGNO_MODE_OK'.  You handle it by writing the proper
+     constraints for those instructions.
+
+     On some machines, the floating registers are especially slow to
+     access, so that it is better to store a value in a stack frame
+     than in such a register if floating point arithmetic is not being
+     done.  As long as the floating registers are not in class
+     `GENERAL_REGS', they will not be used unless some pattern's
+     constraint asks for one.
+
+ -- Macro: HARD_REGNO_RENAME_OK (FROM, TO)
+     A C expression that is nonzero if it is OK to rename a hard
+     register FROM to another hard register TO.
+
+     One common use of this macro is to prevent renaming of a register
+     to another register that is not saved by a prologue in an interrupt
+     handler.
+
+     The default is always nonzero.
+
+ -- Macro: MODES_TIEABLE_P (MODE1, MODE2)
+     A C expression that is nonzero if a value of mode MODE1 is
+     accessible in mode MODE2 without copying.
+
+     If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
+     MODE2)' are always the same for any R, then `MODES_TIEABLE_P
+     (MODE1, MODE2)' should be nonzero.  If they differ for any R, you
+     should define this macro to return zero unless some other
+     mechanism ensures the accessibility of the value in a narrower
+     mode.
+
+     You should define this macro to return nonzero in as many cases as
+     possible since doing so will allow GCC to perform better register
+     allocation.
+
+ -- Target Hook: bool TARGET_HARD_REGNO_SCRATCH_OK (unsigned int REGNO)
+     This target hook should return `true' if it is OK to use a hard
+     register REGNO as scratch reg in peephole2.
+
+     One common use of this macro is to prevent using of a register that
+     is not saved by a prologue in an interrupt handler.
+
+     The default version of this hook always returns `true'.
+
+ -- Macro: AVOID_CCMODE_COPIES
+     Define this macro if the compiler should avoid copies to/from
+     `CCmode' registers.  You should only define this macro if support
+     for copying to/from `CCmode' is incomplete.
+
+
+File: gccint.info,  Node: Leaf Functions,  Next: Stack Registers,  Prev: Values in Registers,  Up: Registers
+
+17.7.4 Handling Leaf Functions
+------------------------------
+
+On some machines, a leaf function (i.e., one which makes no calls) can
+run more efficiently if it does not make its own register window.
+Often this means it is required to receive its arguments in the
+registers where they are passed by the caller, instead of the registers
+where they would normally arrive.
+
+ The special treatment for leaf functions generally applies only when
+other conditions are met; for example, often they may use only those
+registers for its own variables and temporaries.  We use the term "leaf
+function" to mean a function that is suitable for this special
+handling, so that functions with no calls are not necessarily "leaf
+functions".
+
+ GCC assigns register numbers before it knows whether the function is
+suitable for leaf function treatment.  So it needs to renumber the
+registers in order to output a leaf function.  The following macros
+accomplish this.
+
+ -- Macro: LEAF_REGISTERS
+     Name of a char vector, indexed by hard register number, which
+     contains 1 for a register that is allowable in a candidate for leaf
+     function treatment.
+
+     If leaf function treatment involves renumbering the registers,
+     then the registers marked here should be the ones before
+     renumbering--those that GCC would ordinarily allocate.  The
+     registers which will actually be used in the assembler code, after
+     renumbering, should not be marked with 1 in this vector.
+
+     Define this macro only if the target machine offers a way to
+     optimize the treatment of leaf functions.
+
+ -- Macro: LEAF_REG_REMAP (REGNO)
+     A C expression whose value is the register number to which REGNO
+     should be renumbered, when a function is treated as a leaf
+     function.
+
+     If REGNO is a register number which should not appear in a leaf
+     function before renumbering, then the expression should yield -1,
+     which will cause the compiler to abort.
+
+     Define this macro only if the target machine offers a way to
+     optimize the treatment of leaf functions, and registers need to be
+     renumbered to do this.
+
+ `TARGET_ASM_FUNCTION_PROLOGUE' and `TARGET_ASM_FUNCTION_EPILOGUE' must
+usually treat leaf functions specially.  They can test the C variable
+`current_function_is_leaf' which is nonzero for leaf functions.
+`current_function_is_leaf' is set prior to local register allocation
+and is valid for the remaining compiler passes.  They can also test the
+C variable `current_function_uses_only_leaf_regs' which is nonzero for
+leaf functions which only use leaf registers.
+`current_function_uses_only_leaf_regs' is valid after all passes that
+modify the instructions have been run and is only useful if
+`LEAF_REGISTERS' is defined.
+
+
+File: gccint.info,  Node: Stack Registers,  Prev: Leaf Functions,  Up: Registers
+
+17.7.5 Registers That Form a Stack
+----------------------------------
+
+There are special features to handle computers where some of the
+"registers" form a stack.  Stack registers are normally written by
+pushing onto the stack, and are numbered relative to the top of the
+stack.
+
+ Currently, GCC can only handle one group of stack-like registers, and
+they must be consecutively numbered.  Furthermore, the existing support
+for stack-like registers is specific to the 80387 floating point
+coprocessor.  If you have a new architecture that uses stack-like
+registers, you will need to do substantial work on `reg-stack.c' and
+write your machine description to cooperate with it, as well as
+defining these macros.
+
+ -- Macro: STACK_REGS
+     Define this if the machine has any stack-like registers.
+
+ -- Macro: STACK_REG_COVER_CLASS
+     This is a cover class containing the stack registers.  Define this
+     if the machine has any stack-like registers.
+
+ -- Macro: FIRST_STACK_REG
+     The number of the first stack-like register.  This one is the top
+     of the stack.
+
+ -- Macro: LAST_STACK_REG
+     The number of the last stack-like register.  This one is the
+     bottom of the stack.
+
+
+File: gccint.info,  Node: Register Classes,  Next: Old Constraints,  Prev: Registers,  Up: Target Macros
+
+17.8 Register Classes
+=====================
+
+On many machines, the numbered registers are not all equivalent.  For
+example, certain registers may not be allowed for indexed addressing;
+certain registers may not be allowed in some instructions.  These
+machine restrictions are described to the compiler using "register
+classes".
+
+ You define a number of register classes, giving each one a name and
+saying which of the registers belong to it.  Then you can specify
+register classes that are allowed as operands to particular instruction
+patterns.
+
+ In general, each register will belong to several classes.  In fact, one
+class must be named `ALL_REGS' and contain all the registers.  Another
+class must be named `NO_REGS' and contain no registers.  Often the
+union of two classes will be another class; however, this is not
+required.
+
+ One of the classes must be named `GENERAL_REGS'.  There is nothing
+terribly special about the name, but the operand constraint letters `r'
+and `g' specify this class.  If `GENERAL_REGS' is the same as
+`ALL_REGS', just define it as a macro which expands to `ALL_REGS'.
+
+ Order the classes so that if class X is contained in class Y then X
+has a lower class number than Y.
+
+ The way classes other than `GENERAL_REGS' are specified in operand
+constraints is through machine-dependent operand constraint letters.
+You can define such letters to correspond to various classes, then use
+them in operand constraints.
+
+ You should define a class for the union of two classes whenever some
+instruction allows both classes.  For example, if an instruction allows
+either a floating point (coprocessor) register or a general register
+for a certain operand, you should define a class `FLOAT_OR_GENERAL_REGS'
+which includes both of them.  Otherwise you will get suboptimal code.
+
+ You must also specify certain redundant information about the register
+classes: for each class, which classes contain it and which ones are
+contained in it; for each pair of classes, the largest class contained
+in their union.
+
+ When a value occupying several consecutive registers is expected in a
+certain class, all the registers used must belong to that class.
+Therefore, register classes cannot be used to enforce a requirement for
+a register pair to start with an even-numbered register.  The way to
+specify this requirement is with `HARD_REGNO_MODE_OK'.
+
+ Register classes used for input-operands of bitwise-and or shift
+instructions have a special requirement: each such class must have, for
+each fixed-point machine mode, a subclass whose registers can transfer
+that mode to or from memory.  For example, on some machines, the
+operations for single-byte values (`QImode') are limited to certain
+registers.  When this is so, each register class that is used in a
+bitwise-and or shift instruction must have a subclass consisting of
+registers from which single-byte values can be loaded or stored.  This
+is so that `PREFERRED_RELOAD_CLASS' can always have a possible value to
+return.
+
+ -- Data type: enum reg_class
+     An enumerated type that must be defined with all the register
+     class names as enumerated values.  `NO_REGS' must be first.
+     `ALL_REGS' must be the last register class, followed by one more
+     enumerated value, `LIM_REG_CLASSES', which is not a register class
+     but rather tells how many classes there are.
+
+     Each register class has a number, which is the value of casting
+     the class name to type `int'.  The number serves as an index in
+     many of the tables described below.
+
+ -- Macro: N_REG_CLASSES
+     The number of distinct register classes, defined as follows:
+
+          #define N_REG_CLASSES (int) LIM_REG_CLASSES
+
+ -- Macro: REG_CLASS_NAMES
+     An initializer containing the names of the register classes as C
+     string constants.  These names are used in writing some of the
+     debugging dumps.
+
+ -- Macro: REG_CLASS_CONTENTS
+     An initializer containing the contents of the register classes, as
+     integers which are bit masks.  The Nth integer specifies the
+     contents of class N.  The way the integer MASK is interpreted is
+     that register R is in the class if `MASK & (1 << R)' is 1.
+
+     When the machine has more than 32 registers, an integer does not
+     suffice.  Then the integers are replaced by sub-initializers,
+     braced groupings containing several integers.  Each
+     sub-initializer must be suitable as an initializer for the type
+     `HARD_REG_SET' which is defined in `hard-reg-set.h'.  In this
+     situation, the first integer in each sub-initializer corresponds to
+     registers 0 through 31, the second integer to registers 32 through
+     63, and so on.
+
+ -- Macro: REGNO_REG_CLASS (REGNO)
+     A C expression whose value is a register class containing hard
+     register REGNO.  In general there is more than one such class;
+     choose a class which is "minimal", meaning that no smaller class
+     also contains the register.
+
+ -- Macro: BASE_REG_CLASS
+     A macro whose definition is the name of the class to which a valid
+     base register must belong.  A base register is one used in an
+     address which is the register value plus a displacement.
+
+ -- Macro: MODE_BASE_REG_CLASS (MODE)
+     This is a variation of the `BASE_REG_CLASS' macro which allows the
+     selection of a base register in a mode dependent manner.  If MODE
+     is VOIDmode then it should return the same value as
+     `BASE_REG_CLASS'.
+
+ -- Macro: MODE_BASE_REG_REG_CLASS (MODE)
+     A C expression whose value is the register class to which a valid
+     base register must belong in order to be used in a base plus index
+     register address.  You should define this macro if base plus index
+     addresses have different requirements than other base register
+     uses.
+
+ -- Macro: MODE_CODE_BASE_REG_CLASS (MODE, OUTER_CODE, INDEX_CODE)
+     A C expression whose value is the register class to which a valid
+     base register must belong.  OUTER_CODE and INDEX_CODE define the
+     context in which the base register occurs.  OUTER_CODE is the code
+     of the immediately enclosing expression (`MEM' for the top level
+     of an address, `ADDRESS' for something that occurs in an
+     `address_operand').  INDEX_CODE is the code of the corresponding
+     index expression if OUTER_CODE is `PLUS'; `SCRATCH' otherwise.
+
+ -- Macro: INDEX_REG_CLASS
+     A macro whose definition is the name of the class to which a valid
+     index register must belong.  An index register is one used in an
+     address where its value is either multiplied by a scale factor or
+     added to another register (as well as added to a displacement).
+
+ -- Macro: REGNO_OK_FOR_BASE_P (NUM)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as a base register in operand addresses.  Like
+     `TARGET_LEGITIMATE_ADDRESS_P', this macro should also define a
+     strict and a non-strict variant.  Both variants behave the same
+     for hard register; for pseudos, the strict variant will pass only
+     those that have been allocated to a valid hard registers, while
+     the non-strict variant will pass all pseudos.
+
+     Compiler source files that want to use the strict variant of this
+     and other macros define the macro `REG_OK_STRICT'.  You should use
+     an `#ifdef REG_OK_STRICT' conditional to define the strict variant
+     in that case and the non-strict variant otherwise.
+
+ -- Macro: REGNO_MODE_OK_FOR_BASE_P (NUM, MODE)
+     A C expression that is just like `REGNO_OK_FOR_BASE_P', except that
+     that expression may examine the mode of the memory reference in
+     MODE.  You should define this macro if the mode of the memory
+     reference affects whether a register may be used as a base
+     register.  If you define this macro, the compiler will use it
+     instead of `REGNO_OK_FOR_BASE_P'.  The mode may be `VOIDmode' for
+     addresses that appear outside a `MEM', i.e., as an
+     `address_operand'.
+
+     This macro also has strict and non-strict variants.
+
+ -- Macro: REGNO_MODE_OK_FOR_REG_BASE_P (NUM, MODE)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as a base register in base plus index operand addresses,
+     accessing memory in mode MODE.  It may be either a suitable hard
+     register or a pseudo register that has been allocated such a hard
+     register.  You should define this macro if base plus index
+     addresses have different requirements than other base register
+     uses.
+
+     Use of this macro is deprecated; please use the more general
+     `REGNO_MODE_CODE_OK_FOR_BASE_P'.
+
+     This macro also has strict and non-strict variants.
+
+ -- Macro: REGNO_MODE_CODE_OK_FOR_BASE_P (NUM, MODE, OUTER_CODE,
+          INDEX_CODE)
+     A C expression that is just like `REGNO_MODE_OK_FOR_BASE_P', except
+     that that expression may examine the context in which the register
+     appears in the memory reference.  OUTER_CODE is the code of the
+     immediately enclosing expression (`MEM' if at the top level of the
+     address, `ADDRESS' for something that occurs in an
+     `address_operand').  INDEX_CODE is the code of the corresponding
+     index expression if OUTER_CODE is `PLUS'; `SCRATCH' otherwise.
+     The mode may be `VOIDmode' for addresses that appear outside a
+     `MEM', i.e., as an `address_operand'.
+
+     This macro also has strict and non-strict variants.
+
+ -- Macro: REGNO_OK_FOR_INDEX_P (NUM)
+     A C expression which is nonzero if register number NUM is suitable
+     for use as an index register in operand addresses.  It may be
+     either a suitable hard register or a pseudo register that has been
+     allocated such a hard register.
+
+     The difference between an index register and a base register is
+     that the index register may be scaled.  If an address involves the
+     sum of two registers, neither one of them scaled, then either one
+     may be labeled the "base" and the other the "index"; but whichever
+     labeling is used must fit the machine's constraints of which
+     registers may serve in each capacity.  The compiler will try both
+     labelings, looking for one that is valid, and will reload one or
+     both registers only if neither labeling works.
+
+     This macro also has strict and non-strict variants.
+
+ -- Macro: PREFERRED_RELOAD_CLASS (X, CLASS)
+     A C expression that places additional restrictions on the register
+     class to use when it is necessary to copy value X into a register
+     in class CLASS.  The value is a register class; perhaps CLASS, or
+     perhaps another, smaller class.  On many machines, the following
+     definition is safe:
+
+          #define PREFERRED_RELOAD_CLASS(X,CLASS) CLASS
+
+     Sometimes returning a more restrictive class makes better code.
+     For example, on the 68000, when X is an integer constant that is
+     in range for a `moveq' instruction, the value of this macro is
+     always `DATA_REGS' as long as CLASS includes the data registers.
+     Requiring a data register guarantees that a `moveq' will be used.
+
+     One case where `PREFERRED_RELOAD_CLASS' must not return CLASS is
+     if X is a legitimate constant which cannot be loaded into some
+     register class.  By returning `NO_REGS' you can force X into a
+     memory location.  For example, rs6000 can load immediate values
+     into general-purpose registers, but does not have an instruction
+     for loading an immediate value into a floating-point register, so
+     `PREFERRED_RELOAD_CLASS' returns `NO_REGS' when X is a
+     floating-point constant.  If the constant can't be loaded into any
+     kind of register, code generation will be better if
+     `LEGITIMATE_CONSTANT_P' makes the constant illegitimate instead of
+     using `PREFERRED_RELOAD_CLASS'.
+
+     If an insn has pseudos in it after register allocation, reload
+     will go through the alternatives and call repeatedly
+     `PREFERRED_RELOAD_CLASS' to find the best one.  Returning
+     `NO_REGS', in this case, makes reload add a `!' in front of the
+     constraint: the x86 back-end uses this feature to discourage usage
+     of 387 registers when math is done in the SSE registers (and vice
+     versa).
+
+ -- Macro: PREFERRED_OUTPUT_RELOAD_CLASS (X, CLASS)
+     Like `PREFERRED_RELOAD_CLASS', but for output reloads instead of
+     input reloads.  If you don't define this macro, the default is to
+     use CLASS, unchanged.
+
+     You can also use `PREFERRED_OUTPUT_RELOAD_CLASS' to discourage
+     reload from using some alternatives, like `PREFERRED_RELOAD_CLASS'.
+
+ -- Macro: LIMIT_RELOAD_CLASS (MODE, CLASS)
+     A C expression that places additional restrictions on the register
+     class to use when it is necessary to be able to hold a value of
+     mode MODE in a reload register for which class CLASS would
+     ordinarily be used.
+
+     Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
+     there are certain modes that simply can't go in certain reload
+     classes.
+
+     The value is a register class; perhaps CLASS, or perhaps another,
+     smaller class.
+
+     Don't define this macro unless the target machine has limitations
+     which require the macro to do something nontrivial.
+
+ -- Target Hook: enum reg_class TARGET_SECONDARY_RELOAD (bool IN_P, rtx
+          X, enum reg_class RELOAD_CLASS, enum machine_mode
+          RELOAD_MODE, secondary_reload_info *SRI)
+     Many machines have some registers that cannot be copied directly
+     to or from memory or even from other types of registers.  An
+     example is the `MQ' register, which on most machines, can only be
+     copied to or from general registers, but not memory.  Below, we
+     shall be using the term 'intermediate register' when a move
+     operation cannot be performed directly, but has to be done by
+     copying the source into the intermediate register first, and then
+     copying the intermediate register to the destination.  An
+     intermediate register always has the same mode as source and
+     destination.  Since it holds the actual value being copied, reload
+     might apply optimizations to re-use an intermediate register and
+     eliding the copy from the source when it can determine that the
+     intermediate register still holds the required value.
+
+     Another kind of secondary reload is required on some machines which
+     allow copying all registers to and from memory, but require a
+     scratch register for stores to some memory locations (e.g., those
+     with symbolic address on the RT, and those with certain symbolic
+     address on the SPARC when compiling PIC).  Scratch registers need
+     not have the same mode as the value being copied, and usually hold
+     a different value than that being copied.  Special patterns in the
+     md file are needed to describe how the copy is performed with the
+     help of the scratch register; these patterns also describe the
+     number, register class(es) and mode(s) of the scratch register(s).
+
+     In some cases, both an intermediate and a scratch register are
+     required.
+
+     For input reloads, this target hook is called with nonzero IN_P,
+     and X is an rtx that needs to be copied to a register of class
+     RELOAD_CLASS in RELOAD_MODE.  For output reloads, this target hook
+     is called with zero IN_P, and a register of class RELOAD_CLASS
+     needs to be copied to rtx X in RELOAD_MODE.
+
+     If copying a register of RELOAD_CLASS from/to X requires an
+     intermediate register, the hook `secondary_reload' should return
+     the register class required for this intermediate register.  If no
+     intermediate register is required, it should return NO_REGS.  If
+     more than one intermediate register is required, describe the one
+     that is closest in the copy chain to the reload register.
+
+     If scratch registers are needed, you also have to describe how to
+     perform the copy from/to the reload register to/from this closest
+     intermediate register.  Or if no intermediate register is
+     required, but still a scratch register is needed, describe the
+     copy  from/to the reload register to/from the reload operand X.
+
+     You do this by setting `sri->icode' to the instruction code of a
+     pattern in the md file which performs the move.  Operands 0 and 1
+     are the output and input of this copy, respectively.  Operands
+     from operand 2 onward are for scratch operands.  These scratch
+     operands must have a mode, and a single-register-class output
+     constraint.
+
+     When an intermediate register is used, the `secondary_reload' hook
+     will be called again to determine how to copy the intermediate
+     register to/from the reload operand X, so your hook must also have
+     code to handle the register class of the intermediate operand.
+
+     X might be a pseudo-register or a `subreg' of a pseudo-register,
+     which could either be in a hard register or in memory.  Use
+     `true_regnum' to find out; it will return -1 if the pseudo is in
+     memory and the hard register number if it is in a register.
+
+     Scratch operands in memory (constraint `"=m"' / `"=&m"') are
+     currently not supported.  For the time being, you will have to
+     continue to use `SECONDARY_MEMORY_NEEDED' for that purpose.
+
+     `copy_cost' also uses this target hook to find out how values are
+     copied.  If you want it to include some extra cost for the need to
+     allocate (a) scratch register(s), set `sri->extra_cost' to the
+     additional cost.  Or if two dependent moves are supposed to have a
+     lower cost than the sum of the individual moves due to expected
+     fortuitous scheduling and/or special forwarding logic, you can set
+     `sri->extra_cost' to a negative amount.
+
+ -- Macro: SECONDARY_RELOAD_CLASS (CLASS, MODE, X)
+ -- Macro: SECONDARY_INPUT_RELOAD_CLASS (CLASS, MODE, X)
+ -- Macro: SECONDARY_OUTPUT_RELOAD_CLASS (CLASS, MODE, X)
+     These macros are obsolete, new ports should use the target hook
+     `TARGET_SECONDARY_RELOAD' instead.
+
+     These are obsolete macros, replaced by the
+     `TARGET_SECONDARY_RELOAD' target hook.  Older ports still define
+     these macros to indicate to the reload phase that it may need to
+     allocate at least one register for a reload in addition to the
+     register to contain the data.  Specifically, if copying X to a
+     register CLASS in MODE requires an intermediate register, you were
+     supposed to define `SECONDARY_INPUT_RELOAD_CLASS' to return the
+     largest register class all of whose registers can be used as
+     intermediate registers or scratch registers.
+
+     If copying a register CLASS in MODE to X requires an intermediate
+     or scratch register, `SECONDARY_OUTPUT_RELOAD_CLASS' was supposed
+     to be defined be defined to return the largest register class
+     required.  If the requirements for input and output reloads were
+     the same, the macro `SECONDARY_RELOAD_CLASS' should have been used
+     instead of defining both macros identically.
+
+     The values returned by these macros are often `GENERAL_REGS'.
+     Return `NO_REGS' if no spare register is needed; i.e., if X can be
+     directly copied to or from a register of CLASS in MODE without
+     requiring a scratch register.  Do not define this macro if it
+     would always return `NO_REGS'.
+
+     If a scratch register is required (either with or without an
+     intermediate register), you were supposed to define patterns for
+     `reload_inM' or `reload_outM', as required (*note Standard
+     Names::.  These patterns, which were normally implemented with a
+     `define_expand', should be similar to the `movM' patterns, except
+     that operand 2 is the scratch register.
+
+     These patterns need constraints for the reload register and scratch
+     register that contain a single register class.  If the original
+     reload register (whose class is CLASS) can meet the constraint
+     given in the pattern, the value returned by these macros is used
+     for the class of the scratch register.  Otherwise, two additional
+     reload registers are required.  Their classes are obtained from
+     the constraints in the insn pattern.
+
+     X might be a pseudo-register or a `subreg' of a pseudo-register,
+     which could either be in a hard register or in memory.  Use
+     `true_regnum' to find out; it will return -1 if the pseudo is in
+     memory and the hard register number if it is in a register.
+
+     These macros should not be used in the case where a particular
+     class of registers can only be copied to memory and not to another
+     class of registers.  In that case, secondary reload registers are
+     not needed and would not be helpful.  Instead, a stack location
+     must be used to perform the copy and the `movM' pattern should use
+     memory as an intermediate storage.  This case often occurs between
+     floating-point and general registers.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED (CLASS1, CLASS2, M)
+     Certain machines have the property that some registers cannot be
+     copied to some other registers without using memory.  Define this
+     macro on those machines to be a C expression that is nonzero if
+     objects of mode M in registers of CLASS1 can only be copied to
+     registers of class CLASS2 by storing a register of CLASS1 into
+     memory and loading that memory location into a register of CLASS2.
+
+     Do not define this macro if its value would always be zero.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED_RTX (MODE)
+     Normally when `SECONDARY_MEMORY_NEEDED' is defined, the compiler
+     allocates a stack slot for a memory location needed for register
+     copies.  If this macro is defined, the compiler instead uses the
+     memory location defined by this macro.
+
+     Do not define this macro if you do not define
+     `SECONDARY_MEMORY_NEEDED'.
+
+ -- Macro: SECONDARY_MEMORY_NEEDED_MODE (MODE)
+     When the compiler needs a secondary memory location to copy
+     between two registers of mode MODE, it normally allocates
+     sufficient memory to hold a quantity of `BITS_PER_WORD' bits and
+     performs the store and load operations in a mode that many bits
+     wide and whose class is the same as that of MODE.
+
+     This is right thing to do on most machines because it ensures that
+     all bits of the register are copied and prevents accesses to the
+     registers in a narrower mode, which some machines prohibit for
+     floating-point registers.
+
+     However, this default behavior is not correct on some machines,
+     such as the DEC Alpha, that store short integers in floating-point
+     registers differently than in integer registers.  On those
+     machines, the default widening will not work correctly and you
+     must define this macro to suppress that widening in some cases.
+     See the file `alpha.h' for details.
+
+     Do not define this macro if you do not define
+     `SECONDARY_MEMORY_NEEDED' or if widening MODE to a mode that is
+     `BITS_PER_WORD' bits wide is correct for your machine.
+
+ -- Macro: SMALL_REGISTER_CLASSES
+     On some machines, it is risky to let hard registers live across
+     arbitrary insns.  Typically, these machines have instructions that
+     require values to be in specific registers (like an accumulator),
+     and reload will fail if the required hard register is used for
+     another purpose across such an insn.
+
+     Define `SMALL_REGISTER_CLASSES' to be an expression with a nonzero
+     value on these machines.  When this macro has a nonzero value, the
+     compiler will try to minimize the lifetime of hard registers.
+
+     It is always safe to define this macro with a nonzero value, but
+     if you unnecessarily define it, you will reduce the amount of
+     optimizations that can be performed in some cases.  If you do not
+     define this macro with a nonzero value when it is required, the
+     compiler will run out of spill registers and print a fatal error
+     message.  For most machines, you should not define this macro at
+     all.
+
+ -- Macro: CLASS_LIKELY_SPILLED_P (CLASS)
+     A C expression whose value is nonzero if pseudos that have been
+     assigned to registers of class CLASS would likely be spilled
+     because registers of CLASS are needed for spill registers.
+
+     The default value of this macro returns 1 if CLASS has exactly one
+     register and zero otherwise.  On most machines, this default
+     should be used.  Only define this macro to some other expression
+     if pseudos allocated by `local-alloc.c' end up in memory because
+     their hard registers were needed for spill registers.  If this
+     macro returns nonzero for those classes, those pseudos will only
+     be allocated by `global.c', which knows how to reallocate the
+     pseudo to another register.  If there would not be another
+     register available for reallocation, you should not change the
+     definition of this macro since the only effect of such a
+     definition would be to slow down register allocation.
+
+ -- Macro: CLASS_MAX_NREGS (CLASS, MODE)
+     A C expression for the maximum number of consecutive registers of
+     class CLASS needed to hold a value of mode MODE.
+
+     This is closely related to the macro `HARD_REGNO_NREGS'.  In fact,
+     the value of the macro `CLASS_MAX_NREGS (CLASS, MODE)' should be
+     the maximum value of `HARD_REGNO_NREGS (REGNO, MODE)' for all
+     REGNO values in the class CLASS.
+
+     This macro helps control the handling of multiple-word values in
+     the reload pass.
+
+ -- Macro: CANNOT_CHANGE_MODE_CLASS (FROM, TO, CLASS)
+     If defined, a C expression that returns nonzero for a CLASS for
+     which a change from mode FROM to mode TO is invalid.
+
+     For the example, loading 32-bit integer or floating-point objects
+     into floating-point registers on the Alpha extends them to 64 bits.
+     Therefore loading a 64-bit object and then storing it as a 32-bit
+     object does not store the low-order 32 bits, as would be the case
+     for a normal register.  Therefore, `alpha.h' defines
+     `CANNOT_CHANGE_MODE_CLASS' as below:
+
+          #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
+            (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
+             ? reg_classes_intersect_p (FLOAT_REGS, (CLASS)) : 0)
+
+ -- Target Hook: const enum reg_class * TARGET_IRA_COVER_CLASSES (void)
+     Return an array of cover classes for the Integrated Register
+     Allocator (IRA).  Cover classes are a set of non-intersecting
+     register classes covering all hard registers used for register
+     allocation purposes.  If a move between two registers in the same
+     cover class is possible, it should be cheaper than a load or store
+     of the registers.  The array is terminated by a `LIM_REG_CLASSES'
+     element.
+
+     The order of cover classes in the array is important.  If two
+     classes have the same cost of usage for a pseudo, the class
+     occurred first in the array is chosen for the pseudo.
+
+     This hook is called once at compiler startup, after the
+     command-line options have been processed. It is then re-examined
+     by every call to `target_reinit'.
+
+     The default implementation returns `IRA_COVER_CLASSES', if defined,
+     otherwise there is no default implementation.  You must define
+     either this macro or `IRA_COVER_CLASSES' in order to use the
+     integrated register allocator with Chaitin-Briggs coloring. If the
+     macro is not defined, the only available coloring algorithm is
+     Chow's priority coloring.
+
+ -- Macro: IRA_COVER_CLASSES
+     See the documentation for `TARGET_IRA_COVER_CLASSES'.
+
+
+File: gccint.info,  Node: Old Constraints,  Next: Stack and Calling,  Prev: Register Classes,  Up: Target Macros
+
+17.9 Obsolete Macros for Defining Constraints
+=============================================
+
+Machine-specific constraints can be defined with these macros instead
+of the machine description constructs described in *note Define
+Constraints::.  This mechanism is obsolete.  New ports should not use
+it; old ports should convert to the new mechanism.
+
+ -- Macro: CONSTRAINT_LEN (CHAR, STR)
+     For the constraint at the start of STR, which starts with the
+     letter C, return the length.  This allows you to have register
+     class / constant / extra constraints that are longer than a single
+     letter; you don't need to define this macro if you can do with
+     single-letter constraints only.  The definition of this macro
+     should use DEFAULT_CONSTRAINT_LEN for all the characters that you
+     don't want to handle specially.  There are some sanity checks in
+     genoutput.c that check the constraint lengths for the md file, so
+     you can also use this macro to help you while you are
+     transitioning from a byzantine single-letter-constraint scheme:
+     when you return a negative length for a constraint you want to
+     re-use, genoutput will complain about every instance where it is
+     used in the md file.
+
+ -- Macro: REG_CLASS_FROM_LETTER (CHAR)
+     A C expression which defines the machine-dependent operand
+     constraint letters for register classes.  If CHAR is such a
+     letter, the value should be the register class corresponding to
+     it.  Otherwise, the value should be `NO_REGS'.  The register
+     letter `r', corresponding to class `GENERAL_REGS', will not be
+     passed to this macro; you do not need to handle it.
+
+ -- Macro: REG_CLASS_FROM_CONSTRAINT (CHAR, STR)
+     Like `REG_CLASS_FROM_LETTER', but you also get the constraint
+     string passed in STR, so that you can use suffixes to distinguish
+     between different variants.
+
+ -- Macro: CONST_OK_FOR_LETTER_P (VALUE, C)
+     A C expression that defines the machine-dependent operand
+     constraint letters (`I', `J', `K', ... `P') that specify
+     particular ranges of integer values.  If C is one of those
+     letters, the expression should check that VALUE, an integer, is in
+     the appropriate range and return 1 if so, 0 otherwise.  If C is
+     not one of those letters, the value should be 0 regardless of
+     VALUE.
+
+ -- Macro: CONST_OK_FOR_CONSTRAINT_P (VALUE, C, STR)
+     Like `CONST_OK_FOR_LETTER_P', but you also get the constraint
+     string passed in STR, so that you can use suffixes to distinguish
+     between different variants.
+
+ -- Macro: CONST_DOUBLE_OK_FOR_LETTER_P (VALUE, C)
+     A C expression that defines the machine-dependent operand
+     constraint letters that specify particular ranges of
+     `const_double' values (`G' or `H').
+
+     If C is one of those letters, the expression should check that
+     VALUE, an RTX of code `const_double', is in the appropriate range
+     and return 1 if so, 0 otherwise.  If C is not one of those
+     letters, the value should be 0 regardless of VALUE.
+
+     `const_double' is used for all floating-point constants and for
+     `DImode' fixed-point constants.  A given letter can accept either
+     or both kinds of values.  It can use `GET_MODE' to distinguish
+     between these kinds.
+
+ -- Macro: CONST_DOUBLE_OK_FOR_CONSTRAINT_P (VALUE, C, STR)
+     Like `CONST_DOUBLE_OK_FOR_LETTER_P', but you also get the
+     constraint string passed in STR, so that you can use suffixes to
+     distinguish between different variants.
+
+ -- Macro: EXTRA_CONSTRAINT (VALUE, C)
+     A C expression that defines the optional machine-dependent
+     constraint letters that can be used to segregate specific types of
+     operands, usually memory references, for the target machine.  Any
+     letter that is not elsewhere defined and not matched by
+     `REG_CLASS_FROM_LETTER' / `REG_CLASS_FROM_CONSTRAINT' may be used.
+     Normally this macro will not be defined.
+
+     If it is required for a particular target machine, it should
+     return 1 if VALUE corresponds to the operand type represented by
+     the constraint letter C.  If C is not defined as an extra
+     constraint, the value returned should be 0 regardless of VALUE.
+
+     For example, on the ROMP, load instructions cannot have their
+     output in r0 if the memory reference contains a symbolic address.
+     Constraint letter `Q' is defined as representing a memory address
+     that does _not_ contain a symbolic address.  An alternative is
+     specified with a `Q' constraint on the input and `r' on the
+     output.  The next alternative specifies `m' on the input and a
+     register class that does not include r0 on the output.
+
+ -- Macro: EXTRA_CONSTRAINT_STR (VALUE, C, STR)
+     Like `EXTRA_CONSTRAINT', but you also get the constraint string
+     passed in STR, so that you can use suffixes to distinguish between
+     different variants.
+
+ -- Macro: EXTRA_MEMORY_CONSTRAINT (C, STR)
+     A C expression that defines the optional machine-dependent
+     constraint letters, amongst those accepted by `EXTRA_CONSTRAINT',
+     that should be treated like memory constraints by the reload pass.
+
+     It should return 1 if the operand type represented by the
+     constraint at the start of STR, the first letter of which is the
+     letter C, comprises a subset of all memory references including
+     all those whose address is simply a base register.  This allows
+     the reload pass to reload an operand, if it does not directly
+     correspond to the operand type of C, by copying its address into a
+     base register.
+
+     For example, on the S/390, some instructions do not accept
+     arbitrary memory references, but only those that do not make use
+     of an index register.  The constraint letter `Q' is defined via
+     `EXTRA_CONSTRAINT' as representing a memory address of this type.
+     If the letter `Q' is marked as `EXTRA_MEMORY_CONSTRAINT', a `Q'
+     constraint can handle any memory operand, because the reload pass
+     knows it can be reloaded by copying the memory address into a base
+     register if required.  This is analogous to the way an `o'
+     constraint can handle any memory operand.
+
+ -- Macro: EXTRA_ADDRESS_CONSTRAINT (C, STR)
+     A C expression that defines the optional machine-dependent
+     constraint letters, amongst those accepted by `EXTRA_CONSTRAINT' /
+     `EXTRA_CONSTRAINT_STR', that should be treated like address
+     constraints by the reload pass.
+
+     It should return 1 if the operand type represented by the
+     constraint at the start of STR, which starts with the letter C,
+     comprises a subset of all memory addresses including all those
+     that consist of just a base register.  This allows the reload pass
+     to reload an operand, if it does not directly correspond to the
+     operand type of STR, by copying it into a base register.
+
+     Any constraint marked as `EXTRA_ADDRESS_CONSTRAINT' can only be
+     used with the `address_operand' predicate.  It is treated
+     analogously to the `p' constraint.
+
+
+File: gccint.info,  Node: Stack and Calling,  Next: Varargs,  Prev: Old Constraints,  Up: Target Macros
+
+17.10 Stack Layout and Calling Conventions
+==========================================
+
+This describes the stack layout and calling conventions.
+
+* Menu:
+
+* Frame Layout::
+* Exception Handling::
+* Stack Checking::
+* Frame Registers::
+* Elimination::
+* Stack Arguments::
+* Register Arguments::
+* Scalar Return::
+* Aggregate Return::
+* Caller Saves::
+* Function Entry::
+* Profiling::
+* Tail Calls::
+* Stack Smashing Protection::
+
+
+File: gccint.info,  Node: Frame Layout,  Next: Exception Handling,  Up: Stack and Calling
+
+17.10.1 Basic Stack Layout
+--------------------------
+
+Here is the basic stack layout.
+
+ -- Macro: STACK_GROWS_DOWNWARD
+     Define this macro if pushing a word onto the stack moves the stack
+     pointer to a smaller address.
+
+     When we say, "define this macro if ...", it means that the
+     compiler checks this macro only with `#ifdef' so the precise
+     definition used does not matter.
+
+ -- Macro: STACK_PUSH_CODE
+     This macro defines the operation used when something is pushed on
+     the stack.  In RTL, a push operation will be `(set (mem
+     (STACK_PUSH_CODE (reg sp))) ...)'
+
+     The choices are `PRE_DEC', `POST_DEC', `PRE_INC', and `POST_INC'.
+     Which of these is correct depends on the stack direction and on
+     whether the stack pointer points to the last item on the stack or
+     whether it points to the space for the next item on the stack.
+
+     The default is `PRE_DEC' when `STACK_GROWS_DOWNWARD' is defined,
+     which is almost always right, and `PRE_INC' otherwise, which is
+     often wrong.
+
+ -- Macro: FRAME_GROWS_DOWNWARD
+     Define this macro to nonzero value if the addresses of local
+     variable slots are at negative offsets from the frame pointer.
+
+ -- Macro: ARGS_GROW_DOWNWARD
+     Define this macro if successive arguments to a function occupy
+     decreasing addresses on the stack.
+
+ -- Macro: STARTING_FRAME_OFFSET
+     Offset from the frame pointer to the first local variable slot to
+     be allocated.
+
+     If `FRAME_GROWS_DOWNWARD', find the next slot's offset by
+     subtracting the first slot's length from `STARTING_FRAME_OFFSET'.
+     Otherwise, it is found by adding the length of the first slot to
+     the value `STARTING_FRAME_OFFSET'.
+
+ -- Macro: STACK_ALIGNMENT_NEEDED
+     Define to zero to disable final alignment of the stack during
+     reload.  The nonzero default for this macro is suitable for most
+     ports.
+
+     On ports where `STARTING_FRAME_OFFSET' is nonzero or where there
+     is a register save block following the local block that doesn't
+     require alignment to `STACK_BOUNDARY', it may be beneficial to
+     disable stack alignment and do it in the backend.
+
+ -- Macro: STACK_POINTER_OFFSET
+     Offset from the stack pointer register to the first location at
+     which outgoing arguments are placed.  If not specified, the
+     default value of zero is used.  This is the proper value for most
+     machines.
+
+     If `ARGS_GROW_DOWNWARD', this is the offset to the location above
+     the first location at which outgoing arguments are placed.
+
+ -- Macro: FIRST_PARM_OFFSET (FUNDECL)
+     Offset from the argument pointer register to the first argument's
+     address.  On some machines it may depend on the data type of the
+     function.
+
+     If `ARGS_GROW_DOWNWARD', this is the offset to the location above
+     the first argument's address.
+
+ -- Macro: STACK_DYNAMIC_OFFSET (FUNDECL)
+     Offset from the stack pointer register to an item dynamically
+     allocated on the stack, e.g., by `alloca'.
+
+     The default value for this macro is `STACK_POINTER_OFFSET' plus the
+     length of the outgoing arguments.  The default is correct for most
+     machines.  See `function.c' for details.
+
+ -- Macro: INITIAL_FRAME_ADDRESS_RTX
+     A C expression whose value is RTL representing the address of the
+     initial stack frame. This address is passed to `RETURN_ADDR_RTX'
+     and `DYNAMIC_CHAIN_ADDRESS'.  If you don't define this macro, a
+     reasonable default value will be used.  Define this macro in order
+     to make frame pointer elimination work in the presence of
+     `__builtin_frame_address (count)' and `__builtin_return_address
+     (count)' for `count' not equal to zero.
+
+ -- Macro: DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)
+     A C expression whose value is RTL representing the address in a
+     stack frame where the pointer to the caller's frame is stored.
+     Assume that FRAMEADDR is an RTL expression for the address of the
+     stack frame itself.
+
+     If you don't define this macro, the default is to return the value
+     of FRAMEADDR--that is, the stack frame address is also the address
+     of the stack word that points to the previous frame.
+
+ -- Macro: SETUP_FRAME_ADDRESSES
+     If defined, a C expression that produces the machine-specific code
+     to setup the stack so that arbitrary frames can be accessed.  For
+     example, on the SPARC, we must flush all of the register windows
+     to the stack before we can access arbitrary stack frames.  You
+     will seldom need to define this macro.
+
+ -- Target Hook: rtx TARGET_BUILTIN_SETJMP_FRAME_VALUE (void)
+     This target hook should return an rtx that is used to store the
+     address of the current frame into the built in `setjmp' buffer.
+     The default value, `virtual_stack_vars_rtx', is correct for most
+     machines.  One reason you may need to define this target hook is if
+     `hard_frame_pointer_rtx' is the appropriate value on your machine.
+
+ -- Macro: FRAME_ADDR_RTX (FRAMEADDR)
+     A C expression whose value is RTL representing the value of the
+     frame address for the current frame.  FRAMEADDR is the frame
+     pointer of the current frame.  This is used for
+     __builtin_frame_address.  You need only define this macro if the
+     frame address is not the same as the frame pointer.  Most machines
+     do not need to define it.
+
+ -- Macro: RETURN_ADDR_RTX (COUNT, FRAMEADDR)
+     A C expression whose value is RTL representing the value of the
+     return address for the frame COUNT steps up from the current
+     frame, after the prologue.  FRAMEADDR is the frame pointer of the
+     COUNT frame, or the frame pointer of the COUNT - 1 frame if
+     `RETURN_ADDR_IN_PREVIOUS_FRAME' is defined.
+
+     The value of the expression must always be the correct address when
+     COUNT is zero, but may be `NULL_RTX' if there is no way to
+     determine the return address of other frames.
+
+ -- Macro: RETURN_ADDR_IN_PREVIOUS_FRAME
+     Define this if the return address of a particular stack frame is
+     accessed from the frame pointer of the previous stack frame.
+
+ -- Macro: INCOMING_RETURN_ADDR_RTX
+     A C expression whose value is RTL representing the location of the
+     incoming return address at the beginning of any function, before
+     the prologue.  This RTL is either a `REG', indicating that the
+     return value is saved in `REG', or a `MEM' representing a location
+     in the stack.
+
+     You only need to define this macro if you want to support call
+     frame debugging information like that provided by DWARF 2.
+
+     If this RTL is a `REG', you should also define
+     `DWARF_FRAME_RETURN_COLUMN' to `DWARF_FRAME_REGNUM (REGNO)'.
+
+ -- Macro: DWARF_ALT_FRAME_RETURN_COLUMN
+     A C expression whose value is an integer giving a DWARF 2 column
+     number that may be used as an alternative return column.  The
+     column must not correspond to any gcc hard register (that is, it
+     must not be in the range of `DWARF_FRAME_REGNUM').
+
+     This macro can be useful if `DWARF_FRAME_RETURN_COLUMN' is set to a
+     general register, but an alternative column needs to be used for
+     signal frames.  Some targets have also used different frame return
+     columns over time.
+
+ -- Macro: DWARF_ZERO_REG
+     A C expression whose value is an integer giving a DWARF 2 register
+     number that is considered to always have the value zero.  This
+     should only be defined if the target has an architected zero
+     register, and someone decided it was a good idea to use that
+     register number to terminate the stack backtrace.  New ports
+     should avoid this.
+
+ -- Target Hook: void TARGET_DWARF_HANDLE_FRAME_UNSPEC (const char
+          *LABEL, rtx PATTERN, int INDEX)
+     This target hook allows the backend to emit frame-related insns
+     that contain UNSPECs or UNSPEC_VOLATILEs.  The DWARF 2 call frame
+     debugging info engine will invoke it on insns of the form
+          (set (reg) (unspec [...] UNSPEC_INDEX))
+     and
+          (set (reg) (unspec_volatile [...] UNSPECV_INDEX)).
+     to let the backend emit the call frame instructions.  LABEL is the
+     CFI label attached to the insn, PATTERN is the pattern of the insn
+     and INDEX is `UNSPEC_INDEX' or `UNSPECV_INDEX'.
+
+ -- Macro: INCOMING_FRAME_SP_OFFSET
+     A C expression whose value is an integer giving the offset, in
+     bytes, from the value of the stack pointer register to the top of
+     the stack frame at the beginning of any function, before the
+     prologue.  The top of the frame is defined to be the value of the
+     stack pointer in the previous frame, just before the call
+     instruction.
+
+     You only need to define this macro if you want to support call
+     frame debugging information like that provided by DWARF 2.
+
+ -- Macro: ARG_POINTER_CFA_OFFSET (FUNDECL)
+     A C expression whose value is an integer giving the offset, in
+     bytes, from the argument pointer to the canonical frame address
+     (cfa).  The final value should coincide with that calculated by
+     `INCOMING_FRAME_SP_OFFSET'.  Which is unfortunately not usable
+     during virtual register instantiation.
+
+     The default value for this macro is `FIRST_PARM_OFFSET (fundecl) +
+     crtl->args.pretend_args_size', which is correct for most machines;
+     in general, the arguments are found immediately before the stack
+     frame.  Note that this is not the case on some targets that save
+     registers into the caller's frame, such as SPARC and rs6000, and
+     so such targets need to define this macro.
+
+     You only need to define this macro if the default is incorrect,
+     and you want to support call frame debugging information like that
+     provided by DWARF 2.
+
+ -- Macro: FRAME_POINTER_CFA_OFFSET (FUNDECL)
+     If defined, a C expression whose value is an integer giving the
+     offset in bytes from the frame pointer to the canonical frame
+     address (cfa).  The final value should coincide with that
+     calculated by `INCOMING_FRAME_SP_OFFSET'.
+
+     Normally the CFA is calculated as an offset from the argument
+     pointer, via `ARG_POINTER_CFA_OFFSET', but if the argument pointer
+     is variable due to the ABI, this may not be possible.  If this
+     macro is defined, it implies that the virtual register
+     instantiation should be based on the frame pointer instead of the
+     argument pointer.  Only one of `FRAME_POINTER_CFA_OFFSET' and
+     `ARG_POINTER_CFA_OFFSET' should be defined.
+
+ -- Macro: CFA_FRAME_BASE_OFFSET (FUNDECL)
+     If defined, a C expression whose value is an integer giving the
+     offset in bytes from the canonical frame address (cfa) to the
+     frame base used in DWARF 2 debug information.  The default is
+     zero.  A different value may reduce the size of debug information
+     on some ports.
+
+
+File: gccint.info,  Node: Exception Handling,  Next: Stack Checking,  Prev: Frame Layout,  Up: Stack and Calling
+
+17.10.2 Exception Handling Support
+----------------------------------
+
+ -- Macro: EH_RETURN_DATA_REGNO (N)
+     A C expression whose value is the Nth register number used for
+     data by exception handlers, or `INVALID_REGNUM' if fewer than N
+     registers are usable.
+
+     The exception handling library routines communicate with the
+     exception handlers via a set of agreed upon registers.  Ideally
+     these registers should be call-clobbered; it is possible to use
+     call-saved registers, but may negatively impact code size.  The
+     target must support at least 2 data registers, but should define 4
+     if there are enough free registers.
+
+     You must define this macro if you want to support call frame
+     exception handling like that provided by DWARF 2.
+
+ -- Macro: EH_RETURN_STACKADJ_RTX
+     A C expression whose value is RTL representing a location in which
+     to store a stack adjustment to be applied before function return.
+     This is used to unwind the stack to an exception handler's call
+     frame.  It will be assigned zero on code paths that return
+     normally.
+
+     Typically this is a call-clobbered hard register that is otherwise
+     untouched by the epilogue, but could also be a stack slot.
+
+     Do not define this macro if the stack pointer is saved and restored
+     by the regular prolog and epilog code in the call frame itself; in
+     this case, the exception handling library routines will update the
+     stack location to be restored in place.  Otherwise, you must define
+     this macro if you want to support call frame exception handling
+     like that provided by DWARF 2.
+
+ -- Macro: EH_RETURN_HANDLER_RTX
+     A C expression whose value is RTL representing a location in which
+     to store the address of an exception handler to which we should
+     return.  It will not be assigned on code paths that return
+     normally.
+
+     Typically this is the location in the call frame at which the
+     normal return address is stored.  For targets that return by
+     popping an address off the stack, this might be a memory address
+     just below the _target_ call frame rather than inside the current
+     call frame.  If defined, `EH_RETURN_STACKADJ_RTX' will have already
+     been assigned, so it may be used to calculate the location of the
+     target call frame.
+
+     Some targets have more complex requirements than storing to an
+     address calculable during initial code generation.  In that case
+     the `eh_return' instruction pattern should be used instead.
+
+     If you want to support call frame exception handling, you must
+     define either this macro or the `eh_return' instruction pattern.
+
+ -- Macro: RETURN_ADDR_OFFSET
+     If defined, an integer-valued C expression for which rtl will be
+     generated to add it to the exception handler address before it is
+     searched in the exception handling tables, and to subtract it
+     again from the address before using it to return to the exception
+     handler.
+
+ -- Macro: ASM_PREFERRED_EH_DATA_FORMAT (CODE, GLOBAL)
+     This macro chooses the encoding of pointers embedded in the
+     exception handling sections.  If at all possible, this should be
+     defined such that the exception handling section will not require
+     dynamic relocations, and so may be read-only.
+
+     CODE is 0 for data, 1 for code labels, 2 for function pointers.
+     GLOBAL is true if the symbol may be affected by dynamic
+     relocations.  The macro should return a combination of the
+     `DW_EH_PE_*' defines as found in `dwarf2.h'.
+
+     If this macro is not defined, pointers will not be encoded but
+     represented directly.
+
+ -- Macro: ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX (FILE, ENCODING, SIZE,
+          ADDR, DONE)
+     This macro allows the target to emit whatever special magic is
+     required to represent the encoding chosen by
+     `ASM_PREFERRED_EH_DATA_FORMAT'.  Generic code takes care of
+     pc-relative and indirect encodings; this must be defined if the
+     target uses text-relative or data-relative encodings.
+
+     This is a C statement that branches to DONE if the format was
+     handled.  ENCODING is the format chosen, SIZE is the number of
+     bytes that the format occupies, ADDR is the `SYMBOL_REF' to be
+     emitted.
+
+ -- Macro: MD_UNWIND_SUPPORT
+     A string specifying a file to be #include'd in unwind-dw2.c.  The
+     file so included typically defines `MD_FALLBACK_FRAME_STATE_FOR'.
+
+ -- Macro: MD_FALLBACK_FRAME_STATE_FOR (CONTEXT, FS)
+     This macro allows the target to add CPU and operating system
+     specific code to the call-frame unwinder for use when there is no
+     unwind data available.  The most common reason to implement this
+     macro is to unwind through signal frames.
+
+     This macro is called from `uw_frame_state_for' in `unwind-dw2.c',
+     `unwind-dw2-xtensa.c' and `unwind-ia64.c'.  CONTEXT is an
+     `_Unwind_Context'; FS is an `_Unwind_FrameState'.  Examine
+     `context->ra' for the address of the code being executed and
+     `context->cfa' for the stack pointer value.  If the frame can be
+     decoded, the register save addresses should be updated in FS and
+     the macro should evaluate to `_URC_NO_REASON'.  If the frame
+     cannot be decoded, the macro should evaluate to
+     `_URC_END_OF_STACK'.
+
+     For proper signal handling in Java this macro is accompanied by
+     `MAKE_THROW_FRAME', defined in `libjava/include/*-signal.h'
+     headers.
+
+ -- Macro: MD_HANDLE_UNWABI (CONTEXT, FS)
+     This macro allows the target to add operating system specific code
+     to the call-frame unwinder to handle the IA-64 `.unwabi' unwinding
+     directive, usually used for signal or interrupt frames.
+
+     This macro is called from `uw_update_context' in `unwind-ia64.c'.
+     CONTEXT is an `_Unwind_Context'; FS is an `_Unwind_FrameState'.
+     Examine `fs->unwabi' for the abi and context in the `.unwabi'
+     directive.  If the `.unwabi' directive can be handled, the
+     register save addresses should be updated in FS.
+
+ -- Macro: TARGET_USES_WEAK_UNWIND_INFO
+     A C expression that evaluates to true if the target requires unwind
+     info to be given comdat linkage.  Define it to be `1' if comdat
+     linkage is necessary.  The default is `0'.
+
+
+File: gccint.info,  Node: Stack Checking,  Next: Frame Registers,  Prev: Exception Handling,  Up: Stack and Calling
+
+17.10.3 Specifying How Stack Checking is Done
+---------------------------------------------
+
+GCC will check that stack references are within the boundaries of the
+stack, if the option `-fstack-check' is specified, in one of three ways:
+
+  1. If the value of the `STACK_CHECK_BUILTIN' macro is nonzero, GCC
+     will assume that you have arranged for full stack checking to be
+     done at appropriate places in the configuration files.  GCC will
+     not do other special processing.
+
+  2. If `STACK_CHECK_BUILTIN' is zero and the value of the
+     `STACK_CHECK_STATIC_BUILTIN' macro is nonzero, GCC will assume
+     that you have arranged for static stack checking (checking of the
+     static stack frame of functions) to be done at appropriate places
+     in the configuration files.  GCC will only emit code to do dynamic
+     stack checking (checking on dynamic stack allocations) using the
+     third approach below.
+
+  3. If neither of the above are true, GCC will generate code to
+     periodically "probe" the stack pointer using the values of the
+     macros defined below.
+
+ If neither STACK_CHECK_BUILTIN nor STACK_CHECK_STATIC_BUILTIN is
+defined, GCC will change its allocation strategy for large objects if
+the option `-fstack-check' is specified: they will always be allocated
+dynamically if their size exceeds `STACK_CHECK_MAX_VAR_SIZE' bytes.
+
+ -- Macro: STACK_CHECK_BUILTIN
+     A nonzero value if stack checking is done by the configuration
+     files in a machine-dependent manner.  You should define this macro
+     if stack checking is required by the ABI of your machine or if you
+     would like to do stack checking in some more efficient way than
+     the generic approach.  The default value of this macro is zero.
+
+ -- Macro: STACK_CHECK_STATIC_BUILTIN
+     A nonzero value if static stack checking is done by the
+     configuration files in a machine-dependent manner.  You should
+     define this macro if you would like to do static stack checking in
+     some more efficient way than the generic approach.  The default
+     value of this macro is zero.
+
+ -- Macro: STACK_CHECK_PROBE_INTERVAL_EXP
+     An integer specifying the interval at which GCC must generate
+     stack probe instructions, defined as 2 raised to this integer.
+     You will normally define this macro so that the interval be no
+     larger than the size of the "guard pages" at the end of a stack
+     area.  The default value of 12 (4096-byte interval) is suitable
+     for most systems.
+
+ -- Macro: STACK_CHECK_MOVING_SP
+     An integer which is nonzero if GCC should move the stack pointer
+     page by page when doing probes.  This can be necessary on systems
+     where the stack pointer contains the bottom address of the memory
+     area accessible to the executing thread at any point in time.  In
+     this situation an alternate signal stack is required in order to
+     be able to recover from a stack overflow.  The default value of
+     this macro is zero.
+
+ -- Macro: STACK_CHECK_PROTECT
+     The number of bytes of stack needed to recover from a stack
+     overflow, for languages where such a recovery is supported.  The
+     default value of 75 words with the `setjmp'/`longjmp'-based
+     exception handling mechanism and 8192 bytes with other exception
+     handling mechanisms should be adequate for most machines.
+
+ The following macros are relevant only if neither STACK_CHECK_BUILTIN
+nor STACK_CHECK_STATIC_BUILTIN is defined; you can omit them altogether
+in the opposite case.
+
+ -- Macro: STACK_CHECK_MAX_FRAME_SIZE
+     The maximum size of a stack frame, in bytes.  GCC will generate
+     probe instructions in non-leaf functions to ensure at least this
+     many bytes of stack are available.  If a stack frame is larger
+     than this size, stack checking will not be reliable and GCC will
+     issue a warning.  The default is chosen so that GCC only generates
+     one instruction on most systems.  You should normally not change
+     the default value of this macro.
+
+ -- Macro: STACK_CHECK_FIXED_FRAME_SIZE
+     GCC uses this value to generate the above warning message.  It
+     represents the amount of fixed frame used by a function, not
+     including space for any callee-saved registers, temporaries and
+     user variables.  You need only specify an upper bound for this
+     amount and will normally use the default of four words.
+
+ -- Macro: STACK_CHECK_MAX_VAR_SIZE
+     The maximum size, in bytes, of an object that GCC will place in the
+     fixed area of the stack frame when the user specifies
+     `-fstack-check'.  GCC computed the default from the values of the
+     above macros and you will normally not need to override that
+     default.
+
+
+File: gccint.info,  Node: Frame Registers,  Next: Elimination,  Prev: Stack Checking,  Up: Stack and Calling
+
+17.10.4 Registers That Address the Stack Frame
+----------------------------------------------
+
+This discusses registers that address the stack frame.
+
+ -- Macro: STACK_POINTER_REGNUM
+     The register number of the stack pointer register, which must also
+     be a fixed register according to `FIXED_REGISTERS'.  On most
+     machines, the hardware determines which register this is.
+
+ -- Macro: FRAME_POINTER_REGNUM
+     The register number of the frame pointer register, which is used to
+     access automatic variables in the stack frame.  On some machines,
+     the hardware determines which register this is.  On other
+     machines, you can choose any register you wish for this purpose.
+
+ -- Macro: HARD_FRAME_POINTER_REGNUM
+     On some machines the offset between the frame pointer and starting
+     offset of the automatic variables is not known until after register
+     allocation has been done (for example, because the saved registers
+     are between these two locations).  On those machines, define
+     `FRAME_POINTER_REGNUM' the number of a special, fixed register to
+     be used internally until the offset is known, and define
+     `HARD_FRAME_POINTER_REGNUM' to be the actual hard register number
+     used for the frame pointer.
+
+     You should define this macro only in the very rare circumstances
+     when it is not possible to calculate the offset between the frame
+     pointer and the automatic variables until after register
+     allocation has been completed.  When this macro is defined, you
+     must also indicate in your definition of `ELIMINABLE_REGS' how to
+     eliminate `FRAME_POINTER_REGNUM' into either
+     `HARD_FRAME_POINTER_REGNUM' or `STACK_POINTER_REGNUM'.
+
+     Do not define this macro if it would be the same as
+     `FRAME_POINTER_REGNUM'.
+
+ -- Macro: ARG_POINTER_REGNUM
+     The register number of the arg pointer register, which is used to
+     access the function's argument list.  On some machines, this is
+     the same as the frame pointer register.  On some machines, the
+     hardware determines which register this is.  On other machines,
+     you can choose any register you wish for this purpose.  If this is
+     not the same register as the frame pointer register, then you must
+     mark it as a fixed register according to `FIXED_REGISTERS', or
+     arrange to be able to eliminate it (*note Elimination::).
+
+ -- Macro: RETURN_ADDRESS_POINTER_REGNUM
+     The register number of the return address pointer register, which
+     is used to access the current function's return address from the
+     stack.  On some machines, the return address is not at a fixed
+     offset from the frame pointer or stack pointer or argument
+     pointer.  This register can be defined to point to the return
+     address on the stack, and then be converted by `ELIMINABLE_REGS'
+     into either the frame pointer or stack pointer.
+
+     Do not define this macro unless there is no other way to get the
+     return address from the stack.
+
+ -- Macro: STATIC_CHAIN_REGNUM
+ -- Macro: STATIC_CHAIN_INCOMING_REGNUM
+     Register numbers used for passing a function's static chain
+     pointer.  If register windows are used, the register number as
+     seen by the called function is `STATIC_CHAIN_INCOMING_REGNUM',
+     while the register number as seen by the calling function is
+     `STATIC_CHAIN_REGNUM'.  If these registers are the same,
+     `STATIC_CHAIN_INCOMING_REGNUM' need not be defined.
+
+     The static chain register need not be a fixed register.
+
+     If the static chain is passed in memory, these macros should not be
+     defined; instead, the `TARGET_STATIC_CHAIN' hook should be used.
+
+ -- Target Hook: rtx TARGET_STATIC_CHAIN (const_tree FNDECL, bool
+          INCOMING_P)
+     This hook replaces the use of `STATIC_CHAIN_REGNUM' et al for
+     targets that may use different static chain locations for different
+     nested functions.  This may be required if the target has function
+     attributes that affect the calling conventions of the function and
+     those calling conventions use different static chain locations.
+
+     The default version of this hook uses `STATIC_CHAIN_REGNUM' et al.
+
+     If the static chain is passed in memory, this hook should be used
+     to provide rtx giving `mem' expressions that denote where they are
+     stored.  Often the `mem' expression as seen by the caller will be
+     at an offset from the stack pointer and the `mem' expression as
+     seen by the callee will be at an offset from the frame pointer.  The
+     variables `stack_pointer_rtx', `frame_pointer_rtx', and
+     `arg_pointer_rtx' will have been initialized and should be used to
+     refer to those items.
+
+ -- Macro: DWARF_FRAME_REGISTERS
+     This macro specifies the maximum number of hard registers that can
+     be saved in a call frame.  This is used to size data structures
+     used in DWARF2 exception handling.
+
+     Prior to GCC 3.0, this macro was needed in order to establish a
+     stable exception handling ABI in the face of adding new hard
+     registers for ISA extensions.  In GCC 3.0 and later, the EH ABI is
+     insulated from changes in the number of hard registers.
+     Nevertheless, this macro can still be used to reduce the runtime
+     memory requirements of the exception handling routines, which can
+     be substantial if the ISA contains a lot of registers that are not
+     call-saved.
+
+     If this macro is not defined, it defaults to
+     `FIRST_PSEUDO_REGISTER'.
+
+ -- Macro: PRE_GCC3_DWARF_FRAME_REGISTERS
+     This macro is similar to `DWARF_FRAME_REGISTERS', but is provided
+     for backward compatibility in pre GCC 3.0 compiled code.
+
+     If this macro is not defined, it defaults to
+     `DWARF_FRAME_REGISTERS'.
+
+ -- Macro: DWARF_REG_TO_UNWIND_COLUMN (REGNO)
+     Define this macro if the target's representation for dwarf
+     registers is different than the internal representation for unwind
+     column.  Given a dwarf register, this macro should return the
+     internal unwind column number to use instead.
+
+     See the PowerPC's SPE target for an example.
+
+ -- Macro: DWARF_FRAME_REGNUM (REGNO)
+     Define this macro if the target's representation for dwarf
+     registers used in .eh_frame or .debug_frame is different from that
+     used in other debug info sections.  Given a GCC hard register
+     number, this macro should return the .eh_frame register number.
+     The default is `DBX_REGISTER_NUMBER (REGNO)'.
+
+
+ -- Macro: DWARF2_FRAME_REG_OUT (REGNO, FOR_EH)
+     Define this macro to map register numbers held in the call frame
+     info that GCC has collected using `DWARF_FRAME_REGNUM' to those
+     that should be output in .debug_frame (`FOR_EH' is zero) and
+     .eh_frame (`FOR_EH' is nonzero).  The default is to return `REGNO'.
+
+
+
+File: gccint.info,  Node: Elimination,  Next: Stack Arguments,  Prev: Frame Registers,  Up: Stack and Calling
+
+17.10.5 Eliminating Frame Pointer and Arg Pointer
+-------------------------------------------------
+
+This is about eliminating the frame pointer and arg pointer.
+
+ -- Target Hook: bool TARGET_FRAME_POINTER_REQUIRED (void)
+     This target hook should return `true' if a function must have and
+     use a frame pointer.  This target hook is called in the reload
+     pass.  If its return value is `true' the function will have a
+     frame pointer.
+
+     This target hook can in principle examine the current function and
+     decide according to the facts, but on most machines the constant
+     `false' or the constant `true' suffices.  Use `false' when the
+     machine allows code to be generated with no frame pointer, and
+     doing so saves some time or space.  Use `true' when there is no
+     possible advantage to avoiding a frame pointer.
+
+     In certain cases, the compiler does not know how to produce valid
+     code without a frame pointer.  The compiler recognizes those cases
+     and automatically gives the function a frame pointer regardless of
+     what `TARGET_FRAME_POINTER_REQUIRED' returns.  You don't need to
+     worry about them.
+
+     In a function that does not require a frame pointer, the frame
+     pointer register can be allocated for ordinary usage, unless you
+     mark it as a fixed register.  See `FIXED_REGISTERS' for more
+     information.
+
+     Default return value is `false'.
+
+ -- Macro: INITIAL_FRAME_POINTER_OFFSET (DEPTH-VAR)
+     A C statement to store in the variable DEPTH-VAR the difference
+     between the frame pointer and the stack pointer values immediately
+     after the function prologue.  The value would be computed from
+     information such as the result of `get_frame_size ()' and the
+     tables of registers `regs_ever_live' and `call_used_regs'.
+
+     If `ELIMINABLE_REGS' is defined, this macro will be not be used and
+     need not be defined.  Otherwise, it must be defined even if
+     `TARGET_FRAME_POINTER_REQUIRED' always returns true; in that case,
+     you may set DEPTH-VAR to anything.
+
+ -- Macro: ELIMINABLE_REGS
+     If defined, this macro specifies a table of register pairs used to
+     eliminate unneeded registers that point into the stack frame.  If
+     it is not defined, the only elimination attempted by the compiler
+     is to replace references to the frame pointer with references to
+     the stack pointer.
+
+     The definition of this macro is a list of structure
+     initializations, each of which specifies an original and
+     replacement register.
+
+     On some machines, the position of the argument pointer is not
+     known until the compilation is completed.  In such a case, a
+     separate hard register must be used for the argument pointer.
+     This register can be eliminated by replacing it with either the
+     frame pointer or the argument pointer, depending on whether or not
+     the frame pointer has been eliminated.
+
+     In this case, you might specify:
+          #define ELIMINABLE_REGS  \
+          {{ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
+           {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
+           {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
+
+     Note that the elimination of the argument pointer with the stack
+     pointer is specified first since that is the preferred elimination.
+
+ -- Target Hook: bool TARGET_CAN_ELIMINATE (const int FROM_REG, const
+          int TO_REG)
+     This target hook should returns `true' if the compiler is allowed
+     to try to replace register number FROM_REG with register number
+     TO_REG.  This target hook need only be defined if `ELIMINABLE_REGS'
+     is defined, and will usually be `true', since most of the cases
+     preventing register elimination are things that the compiler
+     already knows about.
+
+     Default return value is `true'.
+
+ -- Macro: INITIAL_ELIMINATION_OFFSET (FROM-REG, TO-REG, OFFSET-VAR)
+     This macro is similar to `INITIAL_FRAME_POINTER_OFFSET'.  It
+     specifies the initial difference between the specified pair of
+     registers.  This macro must be defined if `ELIMINABLE_REGS' is
+     defined.
+
+
+File: gccint.info,  Node: Stack Arguments,  Next: Register Arguments,  Prev: Elimination,  Up: Stack and Calling
+
+17.10.6 Passing Function Arguments on the Stack
+-----------------------------------------------
+
+The macros in this section control how arguments are passed on the
+stack.  See the following section for other macros that control passing
+certain arguments in registers.
+
+ -- Target Hook: bool TARGET_PROMOTE_PROTOTYPES (const_tree FNTYPE)
+     This target hook returns `true' if an argument declared in a
+     prototype as an integral type smaller than `int' should actually be
+     passed as an `int'.  In addition to avoiding errors in certain
+     cases of mismatch, it also makes for better code on certain
+     machines.  The default is to not promote prototypes.
+
+ -- Macro: PUSH_ARGS
+     A C expression.  If nonzero, push insns will be used to pass
+     outgoing arguments.  If the target machine does not have a push
+     instruction, set it to zero.  That directs GCC to use an alternate
+     strategy: to allocate the entire argument block and then store the
+     arguments into it.  When `PUSH_ARGS' is nonzero, `PUSH_ROUNDING'
+     must be defined too.
+
+ -- Macro: PUSH_ARGS_REVERSED
+     A C expression.  If nonzero, function arguments will be evaluated
+     from last to first, rather than from first to last.  If this macro
+     is not defined, it defaults to `PUSH_ARGS' on targets where the
+     stack and args grow in opposite directions, and 0 otherwise.
+
+ -- Macro: PUSH_ROUNDING (NPUSHED)
+     A C expression that is the number of bytes actually pushed onto the
+     stack when an instruction attempts to push NPUSHED bytes.
+
+     On some machines, the definition
+
+          #define PUSH_ROUNDING(BYTES) (BYTES)
+
+     will suffice.  But on other machines, instructions that appear to
+     push one byte actually push two bytes in an attempt to maintain
+     alignment.  Then the definition should be
+
+          #define PUSH_ROUNDING(BYTES) (((BYTES) + 1) & ~1)
+
+ -- Macro: ACCUMULATE_OUTGOING_ARGS
+     A C expression.  If nonzero, the maximum amount of space required
+     for outgoing arguments will be computed and placed into the
+     variable `current_function_outgoing_args_size'.  No space will be
+     pushed onto the stack for each call; instead, the function
+     prologue should increase the stack frame size by this amount.
+
+     Setting both `PUSH_ARGS' and `ACCUMULATE_OUTGOING_ARGS' is not
+     proper.
+
+ -- Macro: REG_PARM_STACK_SPACE (FNDECL)
+     Define this macro if functions should assume that stack space has
+     been allocated for arguments even when their values are passed in
+     registers.
+
+     The value of this macro is the size, in bytes, of the area
+     reserved for arguments passed in registers for the function
+     represented by FNDECL, which can be zero if GCC is calling a
+     library function.  The argument FNDECL can be the FUNCTION_DECL,
+     or the type itself of the function.
+
+     This space can be allocated by the caller, or be a part of the
+     machine-dependent stack frame: `OUTGOING_REG_PARM_STACK_SPACE' says
+     which.
+
+ -- Macro: OUTGOING_REG_PARM_STACK_SPACE (FNTYPE)
+     Define this to a nonzero value if it is the responsibility of the
+     caller to allocate the area reserved for arguments passed in
+     registers when calling a function of FNTYPE.  FNTYPE may be NULL
+     if the function called is a library function.
+
+     If `ACCUMULATE_OUTGOING_ARGS' is defined, this macro controls
+     whether the space for these arguments counts in the value of
+     `current_function_outgoing_args_size'.
+
+ -- Macro: STACK_PARMS_IN_REG_PARM_AREA
+     Define this macro if `REG_PARM_STACK_SPACE' is defined, but the
+     stack parameters don't skip the area specified by it.
+
+     Normally, when a parameter is not passed in registers, it is
+     placed on the stack beyond the `REG_PARM_STACK_SPACE' area.
+     Defining this macro suppresses this behavior and causes the
+     parameter to be passed on the stack in its natural location.
+
+ -- Macro: RETURN_POPS_ARGS (FUNDECL, FUNTYPE, STACK-SIZE)
+     A C expression that should indicate the number of bytes of its own
+     arguments that a function pops on returning, or 0 if the function
+     pops no arguments and the caller must therefore pop them all after
+     the function returns.
+
+     FUNDECL is a C variable whose value is a tree node that describes
+     the function in question.  Normally it is a node of type
+     `FUNCTION_DECL' that describes the declaration of the function.
+     From this you can obtain the `DECL_ATTRIBUTES' of the function.
+
+     FUNTYPE is a C variable whose value is a tree node that describes
+     the function in question.  Normally it is a node of type
+     `FUNCTION_TYPE' that describes the data type of the function.
+     From this it is possible to obtain the data types of the value and
+     arguments (if known).
+
+     When a call to a library function is being considered, FUNDECL
+     will contain an identifier node for the library function.  Thus, if
+     you need to distinguish among various library functions, you can
+     do so by their names.  Note that "library function" in this
+     context means a function used to perform arithmetic, whose name is
+     known specially in the compiler and was not mentioned in the C
+     code being compiled.
+
+     STACK-SIZE is the number of bytes of arguments passed on the
+     stack.  If a variable number of bytes is passed, it is zero, and
+     argument popping will always be the responsibility of the calling
+     function.
+
+     On the VAX, all functions always pop their arguments, so the
+     definition of this macro is STACK-SIZE.  On the 68000, using the
+     standard calling convention, no functions pop their arguments, so
+     the value of the macro is always 0 in this case.  But an
+     alternative calling convention is available in which functions
+     that take a fixed number of arguments pop them but other functions
+     (such as `printf') pop nothing (the caller pops all).  When this
+     convention is in use, FUNTYPE is examined to determine whether a
+     function takes a fixed number of arguments.
+
+ -- Macro: CALL_POPS_ARGS (CUM)
+     A C expression that should indicate the number of bytes a call
+     sequence pops off the stack.  It is added to the value of
+     `RETURN_POPS_ARGS' when compiling a function call.
+
+     CUM is the variable in which all arguments to the called function
+     have been accumulated.
+
+     On certain architectures, such as the SH5, a call trampoline is
+     used that pops certain registers off the stack, depending on the
+     arguments that have been passed to the function.  Since this is a
+     property of the call site, not of the called function,
+     `RETURN_POPS_ARGS' is not appropriate.
+
+
+File: gccint.info,  Node: Register Arguments,  Next: Scalar Return,  Prev: Stack Arguments,  Up: Stack and Calling
+
+17.10.7 Passing Arguments in Registers
+--------------------------------------
+
+This section describes the macros which let you control how various
+types of arguments are passed in registers or how they are arranged in
+the stack.
+
+ -- Macro: FUNCTION_ARG (CUM, MODE, TYPE, NAMED)
+     A C expression that controls whether a function argument is passed
+     in a register, and which register.
+
+     The arguments are CUM, which summarizes all the previous
+     arguments; MODE, the machine mode of the argument; TYPE, the data
+     type of the argument as a tree node or 0 if that is not known
+     (which happens for C support library functions); and NAMED, which
+     is 1 for an ordinary argument and 0 for nameless arguments that
+     correspond to `...' in the called function's prototype.  TYPE can
+     be an incomplete type if a syntax error has previously occurred.
+
+     The value of the expression is usually either a `reg' RTX for the
+     hard register in which to pass the argument, or zero to pass the
+     argument on the stack.
+
+     For machines like the VAX and 68000, where normally all arguments
+     are pushed, zero suffices as a definition.
+
+     The value of the expression can also be a `parallel' RTX.  This is
+     used when an argument is passed in multiple locations.  The mode
+     of the `parallel' should be the mode of the entire argument.  The
+     `parallel' holds any number of `expr_list' pairs; each one
+     describes where part of the argument is passed.  In each
+     `expr_list' the first operand must be a `reg' RTX for the hard
+     register in which to pass this part of the argument, and the mode
+     of the register RTX indicates how large this part of the argument
+     is.  The second operand of the `expr_list' is a `const_int' which
+     gives the offset in bytes into the entire argument of where this
+     part starts.  As a special exception the first `expr_list' in the
+     `parallel' RTX may have a first operand of zero.  This indicates
+     that the entire argument is also stored on the stack.
+
+     The last time this macro is called, it is called with `MODE ==
+     VOIDmode', and its result is passed to the `call' or `call_value'
+     pattern as operands 2 and 3 respectively.
+
+     The usual way to make the ISO library `stdarg.h' work on a machine
+     where some arguments are usually passed in registers, is to cause
+     nameless arguments to be passed on the stack instead.  This is done
+     by making `FUNCTION_ARG' return 0 whenever NAMED is 0.
+
+     You may use the hook `targetm.calls.must_pass_in_stack' in the
+     definition of this macro to determine if this argument is of a
+     type that must be passed in the stack.  If `REG_PARM_STACK_SPACE'
+     is not defined and `FUNCTION_ARG' returns nonzero for such an
+     argument, the compiler will abort.  If `REG_PARM_STACK_SPACE' is
+     defined, the argument will be computed in the stack and then
+     loaded into a register.
+
+ -- Target Hook: bool TARGET_MUST_PASS_IN_STACK (enum machine_mode
+          MODE, const_tree TYPE)
+     This target hook should return `true' if we should not pass TYPE
+     solely in registers.  The file `expr.h' defines a definition that
+     is usually appropriate, refer to `expr.h' for additional
+     documentation.
+
+ -- Macro: FUNCTION_INCOMING_ARG (CUM, MODE, TYPE, NAMED)
+     Define this macro if the target machine has "register windows", so
+     that the register in which a function sees an arguments is not
+     necessarily the same as the one in which the caller passed the
+     argument.
+
+     For such machines, `FUNCTION_ARG' computes the register in which
+     the caller passes the value, and `FUNCTION_INCOMING_ARG' should be
+     defined in a similar fashion to tell the function being called
+     where the arguments will arrive.
+
+     If `FUNCTION_INCOMING_ARG' is not defined, `FUNCTION_ARG' serves
+     both purposes.
+
+ -- Target Hook: int TARGET_ARG_PARTIAL_BYTES (CUMULATIVE_ARGS *CUM,
+          enum machine_mode MODE, tree TYPE, bool NAMED)
+     This target hook returns the number of bytes at the beginning of an
+     argument that must be put in registers.  The value must be zero for
+     arguments that are passed entirely in registers or that are
+     entirely pushed on the stack.
+
+     On some machines, certain arguments must be passed partially in
+     registers and partially in memory.  On these machines, typically
+     the first few words of arguments are passed in registers, and the
+     rest on the stack.  If a multi-word argument (a `double' or a
+     structure) crosses that boundary, its first few words must be
+     passed in registers and the rest must be pushed.  This macro tells
+     the compiler when this occurs, and how many bytes should go in
+     registers.
+
+     `FUNCTION_ARG' for these arguments should return the first
+     register to be used by the caller for this argument; likewise
+     `FUNCTION_INCOMING_ARG', for the called function.
+
+ -- Target Hook: bool TARGET_PASS_BY_REFERENCE (CUMULATIVE_ARGS *CUM,
+          enum machine_mode MODE, tree TYPE, bool NAMED)
+     This target hook should return `true' if an argument at the
+     position indicated by CUM should be passed by reference.  This
+     predicate is queried after target independent reasons for being
+     passed by reference, such as `TREE_ADDRESSABLE (type)'.
+
+     If the hook returns true, a copy of that argument is made in
+     memory and a pointer to the argument is passed instead of the
+     argument itself.  The pointer is passed in whatever way is
+     appropriate for passing a pointer to that type.
+
+ -- Target Hook: bool TARGET_CALLEE_COPIES (CUMULATIVE_ARGS *CUM, enum
+          machine_mode MODE, const_tree TYPE, bool NAMED)
+     The function argument described by the parameters to this hook is
+     known to be passed by reference.  The hook should return true if
+     the function argument should be copied by the callee instead of
+     copied by the caller.
+
+     For any argument for which the hook returns true, if it can be
+     determined that the argument is not modified, then a copy need not
+     be generated.
+
+     The default version of this hook always returns false.
+
+ -- Macro: CUMULATIVE_ARGS
+     A C type for declaring a variable that is used as the first
+     argument of `FUNCTION_ARG' and other related values.  For some
+     target machines, the type `int' suffices and can hold the number
+     of bytes of argument so far.
+
+     There is no need to record in `CUMULATIVE_ARGS' anything about the
+     arguments that have been passed on the stack.  The compiler has
+     other variables to keep track of that.  For target machines on
+     which all arguments are passed on the stack, there is no need to
+     store anything in `CUMULATIVE_ARGS'; however, the data structure
+     must exist and should not be empty, so use `int'.
+
+ -- Macro: OVERRIDE_ABI_FORMAT (FNDECL)
+     If defined, this macro is called before generating any code for a
+     function, but after the CFUN descriptor for the function has been
+     created.  The back end may use this macro to update CFUN to
+     reflect an ABI other than that which would normally be used by
+     default.  If the compiler is generating code for a
+     compiler-generated function, FNDECL may be `NULL'.
+
+ -- Macro: INIT_CUMULATIVE_ARGS (CUM, FNTYPE, LIBNAME, FNDECL,
+          N_NAMED_ARGS)
+     A C statement (sans semicolon) for initializing the variable CUM
+     for the state at the beginning of the argument list.  The variable
+     has type `CUMULATIVE_ARGS'.  The value of FNTYPE is the tree node
+     for the data type of the function which will receive the args, or
+     0 if the args are to a compiler support library function.  For
+     direct calls that are not libcalls, FNDECL contain the declaration
+     node of the function.  FNDECL is also set when
+     `INIT_CUMULATIVE_ARGS' is used to find arguments for the function
+     being compiled.  N_NAMED_ARGS is set to the number of named
+     arguments, including a structure return address if it is passed as
+     a parameter, when making a call.  When processing incoming
+     arguments, N_NAMED_ARGS is set to -1.
+
+     When processing a call to a compiler support library function,
+     LIBNAME identifies which one.  It is a `symbol_ref' rtx which
+     contains the name of the function, as a string.  LIBNAME is 0 when
+     an ordinary C function call is being processed.  Thus, each time
+     this macro is called, either LIBNAME or FNTYPE is nonzero, but
+     never both of them at once.
+
+ -- Macro: INIT_CUMULATIVE_LIBCALL_ARGS (CUM, MODE, LIBNAME)
+     Like `INIT_CUMULATIVE_ARGS' but only used for outgoing libcalls,
+     it gets a `MODE' argument instead of FNTYPE, that would be `NULL'.
+     INDIRECT would always be zero, too.  If this macro is not defined,
+     `INIT_CUMULATIVE_ARGS (cum, NULL_RTX, libname, 0)' is used instead.
+
+ -- Macro: INIT_CUMULATIVE_INCOMING_ARGS (CUM, FNTYPE, LIBNAME)
+     Like `INIT_CUMULATIVE_ARGS' but overrides it for the purposes of
+     finding the arguments for the function being compiled.  If this
+     macro is undefined, `INIT_CUMULATIVE_ARGS' is used instead.
+
+     The value passed for LIBNAME is always 0, since library routines
+     with special calling conventions are never compiled with GCC.  The
+     argument LIBNAME exists for symmetry with `INIT_CUMULATIVE_ARGS'.
+
+ -- Macro: FUNCTION_ARG_ADVANCE (CUM, MODE, TYPE, NAMED)
+     A C statement (sans semicolon) to update the summarizer variable
+     CUM to advance past an argument in the argument list.  The values
+     MODE, TYPE and NAMED describe that argument.  Once this is done,
+     the variable CUM is suitable for analyzing the _following_
+     argument with `FUNCTION_ARG', etc.
+
+     This macro need not do anything if the argument in question was
+     passed on the stack.  The compiler knows how to track the amount
+     of stack space used for arguments without any special help.
+
+ -- Macro: FUNCTION_ARG_OFFSET (MODE, TYPE)
+     If defined, a C expression that is the number of bytes to add to
+     the offset of the argument passed in memory.  This is needed for
+     the SPU, which passes `char' and `short' arguments in the preferred
+     slot that is in the middle of the quad word instead of starting at
+     the top.
+
+ -- Macro: FUNCTION_ARG_PADDING (MODE, TYPE)
+     If defined, a C expression which determines whether, and in which
+     direction, to pad out an argument with extra space.  The value
+     should be of type `enum direction': either `upward' to pad above
+     the argument, `downward' to pad below, or `none' to inhibit
+     padding.
+
+     The _amount_ of padding is always just enough to reach the next
+     multiple of `FUNCTION_ARG_BOUNDARY'; this macro does not control
+     it.
+
+     This macro has a default definition which is right for most
+     systems.  For little-endian machines, the default is to pad
+     upward.  For big-endian machines, the default is to pad downward
+     for an argument of constant size shorter than an `int', and upward
+     otherwise.
+
+ -- Macro: PAD_VARARGS_DOWN
+     If defined, a C expression which determines whether the default
+     implementation of va_arg will attempt to pad down before reading
+     the next argument, if that argument is smaller than its aligned
+     space as controlled by `PARM_BOUNDARY'.  If this macro is not
+     defined, all such arguments are padded down if `BYTES_BIG_ENDIAN'
+     is true.
+
+ -- Macro: BLOCK_REG_PADDING (MODE, TYPE, FIRST)
+     Specify padding for the last element of a block move between
+     registers and memory.  FIRST is nonzero if this is the only
+     element.  Defining this macro allows better control of register
+     function parameters on big-endian machines, without using
+     `PARALLEL' rtl.  In particular, `MUST_PASS_IN_STACK' need not test
+     padding and mode of types in registers, as there is no longer a
+     "wrong" part of a register;  For example, a three byte aggregate
+     may be passed in the high part of a register if so required.
+
+ -- Macro: FUNCTION_ARG_BOUNDARY (MODE, TYPE)
+     If defined, a C expression that gives the alignment boundary, in
+     bits, of an argument with the specified mode and type.  If it is
+     not defined, `PARM_BOUNDARY' is used for all arguments.
+
+ -- Macro: FUNCTION_ARG_REGNO_P (REGNO)
+     A C expression that is nonzero if REGNO is the number of a hard
+     register in which function arguments are sometimes passed.  This
+     does _not_ include implicit arguments such as the static chain and
+     the structure-value address.  On many machines, no registers can be
+     used for this purpose since all function arguments are pushed on
+     the stack.
+
+ -- Target Hook: bool TARGET_SPLIT_COMPLEX_ARG (const_tree TYPE)
+     This hook should return true if parameter of type TYPE are passed
+     as two scalar parameters.  By default, GCC will attempt to pack
+     complex arguments into the target's word size.  Some ABIs require
+     complex arguments to be split and treated as their individual
+     components.  For example, on AIX64, complex floats should be
+     passed in a pair of floating point registers, even though a
+     complex float would fit in one 64-bit floating point register.
+
+     The default value of this hook is `NULL', which is treated as
+     always false.
+
+ -- Target Hook: tree TARGET_BUILD_BUILTIN_VA_LIST (void)
+     This hook returns a type node for `va_list' for the target.  The
+     default version of the hook returns `void*'.
+
+ -- Target Hook: tree TARGET_FN_ABI_VA_LIST (tree FNDECL)
+     This hook returns the va_list type of the calling convention
+     specified by FNDECL.  The default version of this hook returns
+     `va_list_type_node'.
+
+ -- Target Hook: tree TARGET_CANONICAL_VA_LIST_TYPE (tree TYPE)
+     This hook returns the va_list type of the calling convention
+     specified by the type of TYPE. If TYPE is not a valid va_list
+     type, it returns `NULL_TREE'.
+
+ -- Target Hook: tree TARGET_GIMPLIFY_VA_ARG_EXPR (tree VALIST, tree
+          TYPE, gimple_seq *PRE_P, gimple_seq *POST_P)
+     This hook performs target-specific gimplification of
+     `VA_ARG_EXPR'.  The first two parameters correspond to the
+     arguments to `va_arg'; the latter two are as in
+     `gimplify.c:gimplify_expr'.
+
+ -- Target Hook: bool TARGET_VALID_POINTER_MODE (enum machine_mode MODE)
+     Define this to return nonzero if the port can handle pointers with
+     machine mode MODE.  The default version of this hook returns true
+     for both `ptr_mode' and `Pmode'.
+
+ -- Target Hook: bool TARGET_SCALAR_MODE_SUPPORTED_P (enum machine_mode
+          MODE)
+     Define this to return nonzero if the port is prepared to handle
+     insns involving scalar mode MODE.  For a scalar mode to be
+     considered supported, all the basic arithmetic and comparisons
+     must work.
+
+     The default version of this hook returns true for any mode
+     required to handle the basic C types (as defined by the port).
+     Included here are the double-word arithmetic supported by the code
+     in `optabs.c'.
+
+ -- Target Hook: bool TARGET_VECTOR_MODE_SUPPORTED_P (enum machine_mode
+          MODE)
+     Define this to return nonzero if the port is prepared to handle
+     insns involving vector mode MODE.  At the very least, it must have
+     move patterns for this mode.
+
+
+File: gccint.info,  Node: Scalar Return,  Next: Aggregate Return,  Prev: Register Arguments,  Up: Stack and Calling
+
+17.10.8 How Scalar Function Values Are Returned
+-----------------------------------------------
+
+This section discusses the macros that control returning scalars as
+values--values that can fit in registers.
+
+ -- Target Hook: rtx TARGET_FUNCTION_VALUE (const_tree RET_TYPE,
+          const_tree FN_DECL_OR_TYPE, bool OUTGOING)
+     Define this to return an RTX representing the place where a
+     function returns or receives a value of data type RET_TYPE, a tree
+     node representing a data type.  FN_DECL_OR_TYPE is a tree node
+     representing `FUNCTION_DECL' or `FUNCTION_TYPE' of a function
+     being called.  If OUTGOING is false, the hook should compute the
+     register in which the caller will see the return value.
+     Otherwise, the hook should return an RTX representing the place
+     where a function returns a value.
+
+     On many machines, only `TYPE_MODE (RET_TYPE)' is relevant.
+     (Actually, on most machines, scalar values are returned in the same
+     place regardless of mode.)  The value of the expression is usually
+     a `reg' RTX for the hard register where the return value is stored.
+     The value can also be a `parallel' RTX, if the return value is in
+     multiple places.  See `FUNCTION_ARG' for an explanation of the
+     `parallel' form.   Note that the callee will populate every
+     location specified in the `parallel', but if the first element of
+     the `parallel' contains the whole return value, callers will use
+     that element as the canonical location and ignore the others.  The
+     m68k port uses this type of `parallel' to return pointers in both
+     `%a0' (the canonical location) and `%d0'.
+
+     If `TARGET_PROMOTE_FUNCTION_RETURN' returns true, you must apply
+     the same promotion rules specified in `PROMOTE_MODE' if VALTYPE is
+     a scalar type.
+
+     If the precise function being called is known, FUNC is a tree node
+     (`FUNCTION_DECL') for it; otherwise, FUNC is a null pointer.  This
+     makes it possible to use a different value-returning convention
+     for specific functions when all their calls are known.
+
+     Some target machines have "register windows" so that the register
+     in which a function returns its value is not the same as the one
+     in which the caller sees the value.  For such machines, you should
+     return different RTX depending on OUTGOING.
+
+     `TARGET_FUNCTION_VALUE' is not used for return values with
+     aggregate data types, because these are returned in another way.
+     See `TARGET_STRUCT_VALUE_RTX' and related macros, below.
+
+ -- Macro: FUNCTION_VALUE (VALTYPE, FUNC)
+     This macro has been deprecated.  Use `TARGET_FUNCTION_VALUE' for a
+     new target instead.
+
+ -- Macro: FUNCTION_OUTGOING_VALUE (VALTYPE, FUNC)
+     This macro has been deprecated.  Use `TARGET_FUNCTION_VALUE' for a
+     new target instead.
+
+ -- Macro: LIBCALL_VALUE (MODE)
+     A C expression to create an RTX representing the place where a
+     library function returns a value of mode MODE.
+
+     Note that "library function" in this context means a compiler
+     support routine, used to perform arithmetic, whose name is known
+     specially by the compiler and was not mentioned in the C code being
+     compiled.
+
+ -- Target Hook: rtx TARGET_LIBCALL_VALUE (enum machine_mode
+     MODE, const_rtx FUN) Define this hook if the back-end needs to
+     know the name of the libcall function in order to determine where
+     the result should be returned.
+
+     The mode of the result is given by MODE and the name of the called
+     library function is given by FUN.  The hook should return an RTX
+     representing the place where the library function result will be
+     returned.
+
+     If this hook is not defined, then LIBCALL_VALUE will be used.
+
+ -- Macro: FUNCTION_VALUE_REGNO_P (REGNO)
+     A C expression that is nonzero if REGNO is the number of a hard
+     register in which the values of called function may come back.
+
+     A register whose use for returning values is limited to serving as
+     the second of a pair (for a value of type `double', say) need not
+     be recognized by this macro.  So for most machines, this definition
+     suffices:
+
+          #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
+
+     If the machine has register windows, so that the caller and the
+     called function use different registers for the return value, this
+     macro should recognize only the caller's register numbers.
+
+ -- Macro: TARGET_ENUM_VA_LIST (IDX, PNAME, PTYPE)
+     This target macro is used in function `c_common_nodes_and_builtins'
+     to iterate through the target specific builtin types for va_list.
+     The variable IDX is used as iterator. PNAME has to be a pointer to
+     a `const char *' and PTYPE a pointer to a `tree' typed variable.
+     The arguments PNAME and PTYPE are used to store the result of this
+     macro and are set to the name of the va_list builtin type and its
+     internal type.  If the return value of this macro is zero, then
+     there is no more element.  Otherwise the IDX should be increased
+     for the next call of this macro to iterate through all types.
+
+ -- Macro: APPLY_RESULT_SIZE
+     Define this macro if `untyped_call' and `untyped_return' need more
+     space than is implied by `FUNCTION_VALUE_REGNO_P' for saving and
+     restoring an arbitrary return value.
+
+ -- Target Hook: bool TARGET_RETURN_IN_MSB (const_tree TYPE)
+     This hook should return true if values of type TYPE are returned
+     at the most significant end of a register (in other words, if they
+     are padded at the least significant end).  You can assume that TYPE
+     is returned in a register; the caller is required to check this.
+
+     Note that the register provided by `TARGET_FUNCTION_VALUE' must be
+     able to hold the complete return value.  For example, if a 1-, 2-
+     or 3-byte structure is returned at the most significant end of a
+     4-byte register, `TARGET_FUNCTION_VALUE' should provide an
+     `SImode' rtx.
+
+
+File: gccint.info,  Node: Aggregate Return,  Next: Caller Saves,  Prev: Scalar Return,  Up: Stack and Calling
+
+17.10.9 How Large Values Are Returned
+-------------------------------------
+
+When a function value's mode is `BLKmode' (and in some other cases),
+the value is not returned according to `TARGET_FUNCTION_VALUE' (*note
+Scalar Return::).  Instead, the caller passes the address of a block of
+memory in which the value should be stored.  This address is called the
+"structure value address".
+
+ This section describes how to control returning structure values in
+memory.
+
+ -- Target Hook: bool TARGET_RETURN_IN_MEMORY (const_tree TYPE,
+          const_tree FNTYPE)
+     This target hook should return a nonzero value to say to return the
+     function value in memory, just as large structures are always
+     returned.  Here TYPE will be the data type of the value, and FNTYPE
+     will be the type of the function doing the returning, or `NULL' for
+     libcalls.
+
+     Note that values of mode `BLKmode' must be explicitly handled by
+     this function.  Also, the option `-fpcc-struct-return' takes
+     effect regardless of this macro.  On most systems, it is possible
+     to leave the hook undefined; this causes a default definition to
+     be used, whose value is the constant 1 for `BLKmode' values, and 0
+     otherwise.
+
+     Do not use this hook to indicate that structures and unions should
+     always be returned in memory.  You should instead use
+     `DEFAULT_PCC_STRUCT_RETURN' to indicate this.
+
+ -- Macro: DEFAULT_PCC_STRUCT_RETURN
+     Define this macro to be 1 if all structure and union return values
+     must be in memory.  Since this results in slower code, this should
+     be defined only if needed for compatibility with other compilers
+     or with an ABI.  If you define this macro to be 0, then the
+     conventions used for structure and union return values are decided
+     by the `TARGET_RETURN_IN_MEMORY' target hook.
+
+     If not defined, this defaults to the value 1.
+
+ -- Target Hook: rtx TARGET_STRUCT_VALUE_RTX (tree FNDECL, int INCOMING)
+     This target hook should return the location of the structure value
+     address (normally a `mem' or `reg'), or 0 if the address is passed
+     as an "invisible" first argument.  Note that FNDECL may be `NULL',
+     for libcalls.  You do not need to define this target hook if the
+     address is always passed as an "invisible" first argument.
+
+     On some architectures the place where the structure value address
+     is found by the called function is not the same place that the
+     caller put it.  This can be due to register windows, or it could
+     be because the function prologue moves it to a different place.
+     INCOMING is `1' or `2' when the location is needed in the context
+     of the called function, and `0' in the context of the caller.
+
+     If INCOMING is nonzero and the address is to be found on the
+     stack, return a `mem' which refers to the frame pointer. If
+     INCOMING is `2', the result is being used to fetch the structure
+     value address at the beginning of a function.  If you need to emit
+     adjusting code, you should do it at this point.
+
+ -- Macro: PCC_STATIC_STRUCT_RETURN
+     Define this macro if the usual system convention on the target
+     machine for returning structures and unions is for the called
+     function to return the address of a static variable containing the
+     value.
+
+     Do not define this if the usual system convention is for the
+     caller to pass an address to the subroutine.
+
+     This macro has effect in `-fpcc-struct-return' mode, but it does
+     nothing when you use `-freg-struct-return' mode.
+
+
+File: gccint.info,  Node: Caller Saves,  Next: Function Entry,  Prev: Aggregate Return,  Up: Stack and Calling
+
+17.10.10 Caller-Saves Register Allocation
+-----------------------------------------
+
+If you enable it, GCC can save registers around function calls.  This
+makes it possible to use call-clobbered registers to hold variables that
+must live across calls.
+
+ -- Macro: CALLER_SAVE_PROFITABLE (REFS, CALLS)
+     A C expression to determine whether it is worthwhile to consider
+     placing a pseudo-register in a call-clobbered hard register and
+     saving and restoring it around each function call.  The expression
+     should be 1 when this is worth doing, and 0 otherwise.
+
+     If you don't define this macro, a default is used which is good on
+     most machines: `4 * CALLS < REFS'.
+
+ -- Macro: HARD_REGNO_CALLER_SAVE_MODE (REGNO, NREGS)
+     A C expression specifying which mode is required for saving NREGS
+     of a pseudo-register in call-clobbered hard register REGNO.  If
+     REGNO is unsuitable for caller save, `VOIDmode' should be
+     returned.  For most machines this macro need not be defined since
+     GCC will select the smallest suitable mode.
+
+
+File: gccint.info,  Node: Function Entry,  Next: Profiling,  Prev: Caller Saves,  Up: Stack and Calling
+
+17.10.11 Function Entry and Exit
+--------------------------------
+
+This section describes the macros that output function entry
+("prologue") and exit ("epilogue") code.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_PROLOGUE (FILE *FILE,
+          HOST_WIDE_INT SIZE)
+     If defined, a function that outputs the assembler code for entry
+     to a function.  The prologue is responsible for setting up the
+     stack frame, initializing the frame pointer register, saving
+     registers that must be saved, and allocating SIZE additional bytes
+     of storage for the local variables.  SIZE is an integer.  FILE is
+     a stdio stream to which the assembler code should be output.
+
+     The label for the beginning of the function need not be output by
+     this macro.  That has already been done when the macro is run.
+
+     To determine which registers to save, the macro can refer to the
+     array `regs_ever_live': element R is nonzero if hard register R is
+     used anywhere within the function.  This implies the function
+     prologue should save register R, provided it is not one of the
+     call-used registers.  (`TARGET_ASM_FUNCTION_EPILOGUE' must
+     likewise use `regs_ever_live'.)
+
+     On machines that have "register windows", the function entry code
+     does not save on the stack the registers that are in the windows,
+     even if they are supposed to be preserved by function calls;
+     instead it takes appropriate steps to "push" the register stack,
+     if any non-call-used registers are used in the function.
+
+     On machines where functions may or may not have frame-pointers, the
+     function entry code must vary accordingly; it must set up the frame
+     pointer if one is wanted, and not otherwise.  To determine whether
+     a frame pointer is in wanted, the macro can refer to the variable
+     `frame_pointer_needed'.  The variable's value will be 1 at run
+     time in a function that needs a frame pointer.  *Note
+     Elimination::.
+
+     The function entry code is responsible for allocating any stack
+     space required for the function.  This stack space consists of the
+     regions listed below.  In most cases, these regions are allocated
+     in the order listed, with the last listed region closest to the
+     top of the stack (the lowest address if `STACK_GROWS_DOWNWARD' is
+     defined, and the highest address if it is not defined).  You can
+     use a different order for a machine if doing so is more convenient
+     or required for compatibility reasons.  Except in cases where
+     required by standard or by a debugger, there is no reason why the
+     stack layout used by GCC need agree with that used by other
+     compilers for a machine.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_END_PROLOGUE (FILE *FILE)
+     If defined, a function that outputs assembler code at the end of a
+     prologue.  This should be used when the function prologue is being
+     emitted as RTL, and you have some extra assembler that needs to be
+     emitted.  *Note prologue instruction pattern::.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_BEGIN_EPILOGUE (FILE *FILE)
+     If defined, a function that outputs assembler code at the start of
+     an epilogue.  This should be used when the function epilogue is
+     being emitted as RTL, and you have some extra assembler that needs
+     to be emitted.  *Note epilogue instruction pattern::.
+
+ -- Target Hook: void TARGET_ASM_FUNCTION_EPILOGUE (FILE *FILE,
+          HOST_WIDE_INT SIZE)
+     If defined, a function that outputs the assembler code for exit
+     from a function.  The epilogue is responsible for restoring the
+     saved registers and stack pointer to their values when the
+     function was called, and returning control to the caller.  This
+     macro takes the same arguments as the macro
+     `TARGET_ASM_FUNCTION_PROLOGUE', and the registers to restore are
+     determined from `regs_ever_live' and `CALL_USED_REGISTERS' in the
+     same way.
+
+     On some machines, there is a single instruction that does all the
+     work of returning from the function.  On these machines, give that
+     instruction the name `return' and do not define the macro
+     `TARGET_ASM_FUNCTION_EPILOGUE' at all.
+
+     Do not define a pattern named `return' if you want the
+     `TARGET_ASM_FUNCTION_EPILOGUE' to be used.  If you want the target
+     switches to control whether return instructions or epilogues are
+     used, define a `return' pattern with a validity condition that
+     tests the target switches appropriately.  If the `return'
+     pattern's validity condition is false, epilogues will be used.
+
+     On machines where functions may or may not have frame-pointers, the
+     function exit code must vary accordingly.  Sometimes the code for
+     these two cases is completely different.  To determine whether a
+     frame pointer is wanted, the macro can refer to the variable
+     `frame_pointer_needed'.  The variable's value will be 1 when
+     compiling a function that needs a frame pointer.
+
+     Normally, `TARGET_ASM_FUNCTION_PROLOGUE' and
+     `TARGET_ASM_FUNCTION_EPILOGUE' must treat leaf functions specially.
+     The C variable `current_function_is_leaf' is nonzero for such a
+     function.  *Note Leaf Functions::.
+
+     On some machines, some functions pop their arguments on exit while
+     others leave that for the caller to do.  For example, the 68020
+     when given `-mrtd' pops arguments in functions that take a fixed
+     number of arguments.
+
+     Your definition of the macro `RETURN_POPS_ARGS' decides which
+     functions pop their own arguments.  `TARGET_ASM_FUNCTION_EPILOGUE'
+     needs to know what was decided.  The number of bytes of the current
+     function's arguments that this function should pop is available in
+     `crtl->args.pops_args'.  *Note Scalar Return::.
+
+   * A region of `current_function_pretend_args_size' bytes of
+     uninitialized space just underneath the first argument arriving on
+     the stack.  (This may not be at the very start of the allocated
+     stack region if the calling sequence has pushed anything else
+     since pushing the stack arguments.  But usually, on such machines,
+     nothing else has been pushed yet, because the function prologue
+     itself does all the pushing.)  This region is used on machines
+     where an argument may be passed partly in registers and partly in
+     memory, and, in some cases to support the features in `<stdarg.h>'.
+
+   * An area of memory used to save certain registers used by the
+     function.  The size of this area, which may also include space for
+     such things as the return address and pointers to previous stack
+     frames, is machine-specific and usually depends on which registers
+     have been used in the function.  Machines with register windows
+     often do not require a save area.
+
+   * A region of at least SIZE bytes, possibly rounded up to an
+     allocation boundary, to contain the local variables of the
+     function.  On some machines, this region and the save area may
+     occur in the opposite order, with the save area closer to the top
+     of the stack.
+
+   * Optionally, when `ACCUMULATE_OUTGOING_ARGS' is defined, a region of
+     `current_function_outgoing_args_size' bytes to be used for outgoing
+     argument lists of the function.  *Note Stack Arguments::.
+
+ -- Macro: EXIT_IGNORE_STACK
+     Define this macro as a C expression that is nonzero if the return
+     instruction or the function epilogue ignores the value of the stack
+     pointer; in other words, if it is safe to delete an instruction to
+     adjust the stack pointer before a return from the function.  The
+     default is 0.
+
+     Note that this macro's value is relevant only for functions for
+     which frame pointers are maintained.  It is never safe to delete a
+     final stack adjustment in a function that has no frame pointer,
+     and the compiler knows this regardless of `EXIT_IGNORE_STACK'.
+
+ -- Macro: EPILOGUE_USES (REGNO)
+     Define this macro as a C expression that is nonzero for registers
+     that are used by the epilogue or the `return' pattern.  The stack
+     and frame pointer registers are already assumed to be used as
+     needed.
+
+ -- Macro: EH_USES (REGNO)
+     Define this macro as a C expression that is nonzero for registers
+     that are used by the exception handling mechanism, and so should
+     be considered live on entry to an exception edge.
+
+ -- Macro: DELAY_SLOTS_FOR_EPILOGUE
+     Define this macro if the function epilogue contains delay slots to
+     which instructions from the rest of the function can be "moved".
+     The definition should be a C expression whose value is an integer
+     representing the number of delay slots there.
+
+ -- Macro: ELIGIBLE_FOR_EPILOGUE_DELAY (INSN, N)
+     A C expression that returns 1 if INSN can be placed in delay slot
+     number N of the epilogue.
+
+     The argument N is an integer which identifies the delay slot now
+     being considered (since different slots may have different rules of
+     eligibility).  It is never negative and is always less than the
+     number of epilogue delay slots (what `DELAY_SLOTS_FOR_EPILOGUE'
+     returns).  If you reject a particular insn for a given delay slot,
+     in principle, it may be reconsidered for a subsequent delay slot.
+     Also, other insns may (at least in principle) be considered for
+     the so far unfilled delay slot.
+
+     The insns accepted to fill the epilogue delay slots are put in an
+     RTL list made with `insn_list' objects, stored in the variable
+     `current_function_epilogue_delay_list'.  The insn for the first
+     delay slot comes first in the list.  Your definition of the macro
+     `TARGET_ASM_FUNCTION_EPILOGUE' should fill the delay slots by
+     outputting the insns in this list, usually by calling
+     `final_scan_insn'.
+
+     You need not define this macro if you did not define
+     `DELAY_SLOTS_FOR_EPILOGUE'.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_MI_THUNK (FILE *FILE, tree
+          THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT
+          VCALL_OFFSET, tree FUNCTION)
+     A function that outputs the assembler code for a thunk function,
+     used to implement C++ virtual function calls with multiple
+     inheritance.  The thunk acts as a wrapper around a virtual
+     function, adjusting the implicit object parameter before handing
+     control off to the real function.
+
+     First, emit code to add the integer DELTA to the location that
+     contains the incoming first argument.  Assume that this argument
+     contains a pointer, and is the one used to pass the `this' pointer
+     in C++.  This is the incoming argument _before_ the function
+     prologue, e.g. `%o0' on a sparc.  The addition must preserve the
+     values of all other incoming arguments.
+
+     Then, if VCALL_OFFSET is nonzero, an additional adjustment should
+     be made after adding `delta'.  In particular, if P is the adjusted
+     pointer, the following adjustment should be made:
+
+          p += (*((ptrdiff_t **)p))[vcall_offset/sizeof(ptrdiff_t)]
+
+     After the additions, emit code to jump to FUNCTION, which is a
+     `FUNCTION_DECL'.  This is a direct pure jump, not a call, and does
+     not touch the return address.  Hence returning from FUNCTION will
+     return to whoever called the current `thunk'.
+
+     The effect must be as if FUNCTION had been called directly with
+     the adjusted first argument.  This macro is responsible for
+     emitting all of the code for a thunk function;
+     `TARGET_ASM_FUNCTION_PROLOGUE' and `TARGET_ASM_FUNCTION_EPILOGUE'
+     are not invoked.
+
+     The THUNK_FNDECL is redundant.  (DELTA and FUNCTION have already
+     been extracted from it.)  It might possibly be useful on some
+     targets, but probably not.
+
+     If you do not define this macro, the target-independent code in
+     the C++ front end will generate a less efficient heavyweight thunk
+     that calls FUNCTION instead of jumping to it.  The generic
+     approach does not support varargs.
+
+ -- Target Hook: bool TARGET_ASM_CAN_OUTPUT_MI_THUNK (const_tree
+          THUNK_FNDECL, HOST_WIDE_INT DELTA, HOST_WIDE_INT
+          VCALL_OFFSET, const_tree FUNCTION)
+     A function that returns true if TARGET_ASM_OUTPUT_MI_THUNK would
+     be able to output the assembler code for the thunk function
+     specified by the arguments it is passed, and false otherwise.  In
+     the latter case, the generic approach will be used by the C++
+     front end, with the limitations previously exposed.
+
+
+File: gccint.info,  Node: Profiling,  Next: Tail Calls,  Prev: Function Entry,  Up: Stack and Calling
+
+17.10.12 Generating Code for Profiling
+--------------------------------------
+
+These macros will help you generate code for profiling.
+
+ -- Macro: FUNCTION_PROFILER (FILE, LABELNO)
+     A C statement or compound statement to output to FILE some
+     assembler code to call the profiling subroutine `mcount'.
+
+     The details of how `mcount' expects to be called are determined by
+     your operating system environment, not by GCC.  To figure them out,
+     compile a small program for profiling using the system's installed
+     C compiler and look at the assembler code that results.
+
+     Older implementations of `mcount' expect the address of a counter
+     variable to be loaded into some register.  The name of this
+     variable is `LP' followed by the number LABELNO, so you would
+     generate the name using `LP%d' in a `fprintf'.
+
+ -- Macro: PROFILE_HOOK
+     A C statement or compound statement to output to FILE some assembly
+     code to call the profiling subroutine `mcount' even the target does
+     not support profiling.
+
+ -- Macro: NO_PROFILE_COUNTERS
+     Define this macro to be an expression with a nonzero value if the
+     `mcount' subroutine on your system does not need a counter variable
+     allocated for each function.  This is true for almost all modern
+     implementations.  If you define this macro, you must not use the
+     LABELNO argument to `FUNCTION_PROFILER'.
+
+ -- Macro: PROFILE_BEFORE_PROLOGUE
+     Define this macro if the code for function profiling should come
+     before the function prologue.  Normally, the profiling code comes
+     after.
+
+
+File: gccint.info,  Node: Tail Calls,  Next: Stack Smashing Protection,  Prev: Profiling,  Up: Stack and Calling
+
+17.10.13 Permitting tail calls
+------------------------------
+
+ -- Target Hook: bool TARGET_FUNCTION_OK_FOR_SIBCALL (tree DECL, tree
+          EXP)
+     True if it is ok to do sibling call optimization for the specified
+     call expression EXP.  DECL will be the called function, or `NULL'
+     if this is an indirect call.
+
+     It is not uncommon for limitations of calling conventions to
+     prevent tail calls to functions outside the current unit of
+     translation, or during PIC compilation.  The hook is used to
+     enforce these restrictions, as the `sibcall' md pattern can not
+     fail, or fall over to a "normal" call.  The criteria for
+     successful sibling call optimization may vary greatly between
+     different architectures.
+
+ -- Target Hook: void TARGET_EXTRA_LIVE_ON_ENTRY (bitmap REGS)
+     Add any hard registers to REGS that are live on entry to the
+     function.  This hook only needs to be defined to provide registers
+     that cannot be found by examination of FUNCTION_ARG_REGNO_P, the
+     callee saved registers, STATIC_CHAIN_INCOMING_REGNUM,
+     STATIC_CHAIN_REGNUM, TARGET_STRUCT_VALUE_RTX,
+     FRAME_POINTER_REGNUM, EH_USES, FRAME_POINTER_REGNUM,
+     ARG_POINTER_REGNUM, and the PIC_OFFSET_TABLE_REGNUM.
+
+
+File: gccint.info,  Node: Stack Smashing Protection,  Prev: Tail Calls,  Up: Stack and Calling
+
+17.10.14 Stack smashing protection
+----------------------------------
+
+ -- Target Hook: tree TARGET_STACK_PROTECT_GUARD (void)
+     This hook returns a `DECL' node for the external variable to use
+     for the stack protection guard.  This variable is initialized by
+     the runtime to some random value and is used to initialize the
+     guard value that is placed at the top of the local stack frame.
+     The type of this variable must be `ptr_type_node'.
+
+     The default version of this hook creates a variable called
+     `__stack_chk_guard', which is normally defined in `libgcc2.c'.
+
+ -- Target Hook: tree TARGET_STACK_PROTECT_FAIL (void)
+     This hook returns a tree expression that alerts the runtime that
+     the stack protect guard variable has been modified.  This
+     expression should involve a call to a `noreturn' function.
+
+     The default version of this hook invokes a function called
+     `__stack_chk_fail', taking no arguments.  This function is
+     normally defined in `libgcc2.c'.
+
+
+File: gccint.info,  Node: Varargs,  Next: Trampolines,  Prev: Stack and Calling,  Up: Target Macros
+
+17.11 Implementing the Varargs Macros
+=====================================
+
+GCC comes with an implementation of `<varargs.h>' and `<stdarg.h>' that
+work without change on machines that pass arguments on the stack.
+Other machines require their own implementations of varargs, and the
+two machine independent header files must have conditionals to include
+it.
+
+ ISO `<stdarg.h>' differs from traditional `<varargs.h>' mainly in the
+calling convention for `va_start'.  The traditional implementation
+takes just one argument, which is the variable in which to store the
+argument pointer.  The ISO implementation of `va_start' takes an
+additional second argument.  The user is supposed to write the last
+named argument of the function here.
+
+ However, `va_start' should not use this argument.  The way to find the
+end of the named arguments is with the built-in functions described
+below.
+
+ -- Macro: __builtin_saveregs ()
+     Use this built-in function to save the argument registers in
+     memory so that the varargs mechanism can access them.  Both ISO
+     and traditional versions of `va_start' must use
+     `__builtin_saveregs', unless you use
+     `TARGET_SETUP_INCOMING_VARARGS' (see below) instead.
+
+     On some machines, `__builtin_saveregs' is open-coded under the
+     control of the target hook `TARGET_EXPAND_BUILTIN_SAVEREGS'.  On
+     other machines, it calls a routine written in assembler language,
+     found in `libgcc2.c'.
+
+     Code generated for the call to `__builtin_saveregs' appears at the
+     beginning of the function, as opposed to where the call to
+     `__builtin_saveregs' is written, regardless of what the code is.
+     This is because the registers must be saved before the function
+     starts to use them for its own purposes.
+
+ -- Macro: __builtin_args_info (CATEGORY)
+     Use this built-in function to find the first anonymous arguments in
+     registers.
+
+     In general, a machine may have several categories of registers
+     used for arguments, each for a particular category of data types.
+     (For example, on some machines, floating-point registers are used
+     for floating-point arguments while other arguments are passed in
+     the general registers.)  To make non-varargs functions use the
+     proper calling convention, you have defined the `CUMULATIVE_ARGS'
+     data type to record how many registers in each category have been
+     used so far
+
+     `__builtin_args_info' accesses the same data structure of type
+     `CUMULATIVE_ARGS' after the ordinary argument layout is finished
+     with it, with CATEGORY specifying which word to access.  Thus, the
+     value indicates the first unused register in a given category.
+
+     Normally, you would use `__builtin_args_info' in the implementation
+     of `va_start', accessing each category just once and storing the
+     value in the `va_list' object.  This is because `va_list' will
+     have to update the values, and there is no way to alter the values
+     accessed by `__builtin_args_info'.
+
+ -- Macro: __builtin_next_arg (LASTARG)
+     This is the equivalent of `__builtin_args_info', for stack
+     arguments.  It returns the address of the first anonymous stack
+     argument, as type `void *'.  If `ARGS_GROW_DOWNWARD', it returns
+     the address of the location above the first anonymous stack
+     argument.  Use it in `va_start' to initialize the pointer for
+     fetching arguments from the stack.  Also use it in `va_start' to
+     verify that the second parameter LASTARG is the last named argument
+     of the current function.
+
+ -- Macro: __builtin_classify_type (OBJECT)
+     Since each machine has its own conventions for which data types are
+     passed in which kind of register, your implementation of `va_arg'
+     has to embody these conventions.  The easiest way to categorize the
+     specified data type is to use `__builtin_classify_type' together
+     with `sizeof' and `__alignof__'.
+
+     `__builtin_classify_type' ignores the value of OBJECT, considering
+     only its data type.  It returns an integer describing what kind of
+     type that is--integer, floating, pointer, structure, and so on.
+
+     The file `typeclass.h' defines an enumeration that you can use to
+     interpret the values of `__builtin_classify_type'.
+
+ These machine description macros help implement varargs:
+
+ -- Target Hook: rtx TARGET_EXPAND_BUILTIN_SAVEREGS (void)
+     If defined, this hook produces the machine-specific code for a
+     call to `__builtin_saveregs'.  This code will be moved to the very
+     beginning of the function, before any parameter access are made.
+     The return value of this function should be an RTX that contains
+     the value to use as the return of `__builtin_saveregs'.
+
+ -- Target Hook: void TARGET_SETUP_INCOMING_VARARGS (CUMULATIVE_ARGS
+          *ARGS_SO_FAR, enum machine_mode MODE, tree TYPE, int
+          *PRETEND_ARGS_SIZE, int SECOND_TIME)
+     This target hook offers an alternative to using
+     `__builtin_saveregs' and defining the hook
+     `TARGET_EXPAND_BUILTIN_SAVEREGS'.  Use it to store the anonymous
+     register arguments into the stack so that all the arguments appear
+     to have been passed consecutively on the stack.  Once this is
+     done, you can use the standard implementation of varargs that
+     works for machines that pass all their arguments on the stack.
+
+     The argument ARGS_SO_FAR points to the `CUMULATIVE_ARGS' data
+     structure, containing the values that are obtained after
+     processing the named arguments.  The arguments MODE and TYPE
+     describe the last named argument--its machine mode and its data
+     type as a tree node.
+
+     The target hook should do two things: first, push onto the stack
+     all the argument registers _not_ used for the named arguments, and
+     second, store the size of the data thus pushed into the
+     `int'-valued variable pointed to by PRETEND_ARGS_SIZE.  The value
+     that you store here will serve as additional offset for setting up
+     the stack frame.
+
+     Because you must generate code to push the anonymous arguments at
+     compile time without knowing their data types,
+     `TARGET_SETUP_INCOMING_VARARGS' is only useful on machines that
+     have just a single category of argument register and use it
+     uniformly for all data types.
+
+     If the argument SECOND_TIME is nonzero, it means that the
+     arguments of the function are being analyzed for the second time.
+     This happens for an inline function, which is not actually
+     compiled until the end of the source file.  The hook
+     `TARGET_SETUP_INCOMING_VARARGS' should not generate any
+     instructions in this case.
+
+ -- Target Hook: bool TARGET_STRICT_ARGUMENT_NAMING (CUMULATIVE_ARGS
+          *CA)
+     Define this hook to return `true' if the location where a function
+     argument is passed depends on whether or not it is a named
+     argument.
+
+     This hook controls how the NAMED argument to `FUNCTION_ARG' is set
+     for varargs and stdarg functions.  If this hook returns `true',
+     the NAMED argument is always true for named arguments, and false
+     for unnamed arguments.  If it returns `false', but
+     `TARGET_PRETEND_OUTGOING_VARARGS_NAMED' returns `true', then all
+     arguments are treated as named.  Otherwise, all named arguments
+     except the last are treated as named.
+
+     You need not define this hook if it always returns `false'.
+
+ -- Target Hook: bool TARGET_PRETEND_OUTGOING_VARARGS_NAMED
+          (CUMULATIVE_ARGS *CA)
+     If you need to conditionally change ABIs so that one works with
+     `TARGET_SETUP_INCOMING_VARARGS', but the other works like neither
+     `TARGET_SETUP_INCOMING_VARARGS' nor
+     `TARGET_STRICT_ARGUMENT_NAMING' was defined, then define this hook
+     to return `true' if `TARGET_SETUP_INCOMING_VARARGS' is used,
+     `false' otherwise.  Otherwise, you should not define this hook.
+
+
+File: gccint.info,  Node: Trampolines,  Next: Library Calls,  Prev: Varargs,  Up: Target Macros
+
+17.12 Trampolines for Nested Functions
+======================================
+
+A "trampoline" is a small piece of code that is created at run time
+when the address of a nested function is taken.  It normally resides on
+the stack, in the stack frame of the containing function.  These macros
+tell GCC how to generate code to allocate and initialize a trampoline.
+
+ The instructions in the trampoline must do two things: load a constant
+address into the static chain register, and jump to the real address of
+the nested function.  On CISC machines such as the m68k, this requires
+two instructions, a move immediate and a jump.  Then the two addresses
+exist in the trampoline as word-long immediate operands.  On RISC
+machines, it is often necessary to load each address into a register in
+two parts.  Then pieces of each address form separate immediate
+operands.
+
+ The code generated to initialize the trampoline must store the variable
+parts--the static chain value and the function address--into the
+immediate operands of the instructions.  On a CISC machine, this is
+simply a matter of copying each address to a memory reference at the
+proper offset from the start of the trampoline.  On a RISC machine, it
+may be necessary to take out pieces of the address and store them
+separately.
+
+ -- Target Hook: void TARGET_ASM_TRAMPOLINE_TEMPLATE (FILE *F)
+     This hook is called by `assemble_trampoline_template' to output,
+     on the stream F, assembler code for a block of data that contains
+     the constant parts of a trampoline.  This code should not include a
+     label--the label is taken care of automatically.
+
+     If you do not define this hook, it means no template is needed for
+     the target.  Do not define this hook on systems where the block
+     move code to copy the trampoline into place would be larger than
+     the code to generate it on the spot.
+
+ -- Macro: TRAMPOLINE_SECTION
+     Return the section into which the trampoline template is to be
+     placed (*note Sections::).  The default value is
+     `readonly_data_section'.
+
+ -- Macro: TRAMPOLINE_SIZE
+     A C expression for the size in bytes of the trampoline, as an
+     integer.
+
+ -- Macro: TRAMPOLINE_ALIGNMENT
+     Alignment required for trampolines, in bits.
+
+     If you don't define this macro, the value of `FUNCTION_ALIGNMENT'
+     is used for aligning trampolines.
+
+ -- Target Hook: void TARGET_TRAMPOLINE_INIT (rtx M_TRAMP, tree FNDECL,
+          rtx STATIC_CHAIN)
+     This hook is called to initialize a trampoline.  M_TRAMP is an RTX
+     for the memory block for the trampoline; FNDECL is the
+     `FUNCTION_DECL' for the nested function; STATIC_CHAIN is an RTX
+     for the static chain value that should be passed to the function
+     when it is called.
+
+     If the target defines `TARGET_ASM_TRAMPOLINE_TEMPLATE', then the
+     first thing this hook should do is emit a block move into M_TRAMP
+     from the memory block returned by `assemble_trampoline_template'.
+     Note that the block move need only cover the constant parts of the
+     trampoline.  If the target isolates the variable parts of the
+     trampoline to the end, not all `TRAMPOLINE_SIZE' bytes need be
+     copied.
+
+     If the target requires any other actions, such as flushing caches
+     or enabling stack execution, these actions should be performed
+     after initializing the trampoline proper.
+
+ -- Target Hook: rtx TARGET_TRAMPOLINE_ADJUST_ADDRESS (rtx ADDR)
+     This hook should perform any machine-specific adjustment in the
+     address of the trampoline.  Its argument contains the address of
+     the memory block that was passed to `TARGET_TRAMPOLINE_INIT'.  In
+     case the address to be used for a function call should be
+     different from the address at which the template was stored, the
+     different address should be returned; otherwise ADDR should be
+     returned unchanged.  If this hook is not defined, ADDR will be
+     used for function calls.
+
+ Implementing trampolines is difficult on many machines because they
+have separate instruction and data caches.  Writing into a stack
+location fails to clear the memory in the instruction cache, so when
+the program jumps to that location, it executes the old contents.
+
+ Here are two possible solutions.  One is to clear the relevant parts of
+the instruction cache whenever a trampoline is set up.  The other is to
+make all trampolines identical, by having them jump to a standard
+subroutine.  The former technique makes trampoline execution faster; the
+latter makes initialization faster.
+
+ To clear the instruction cache when a trampoline is initialized, define
+the following macro.
+
+ -- Macro: CLEAR_INSN_CACHE (BEG, END)
+     If defined, expands to a C expression clearing the _instruction
+     cache_ in the specified interval.  The definition of this macro
+     would typically be a series of `asm' statements.  Both BEG and END
+     are both pointer expressions.
+
+ The operating system may also require the stack to be made executable
+before calling the trampoline.  To implement this requirement, define
+the following macro.
+
+ -- Macro: ENABLE_EXECUTE_STACK
+     Define this macro if certain operations must be performed before
+     executing code located on the stack.  The macro should expand to a
+     series of C file-scope constructs (e.g. functions) and provide a
+     unique entry point named `__enable_execute_stack'.  The target is
+     responsible for emitting calls to the entry point in the code, for
+     example from the `TARGET_TRAMPOLINE_INIT' hook.
+
+ To use a standard subroutine, define the following macro.  In addition,
+you must make sure that the instructions in a trampoline fill an entire
+cache line with identical instructions, or else ensure that the
+beginning of the trampoline code is always aligned at the same point in
+its cache line.  Look in `m68k.h' as a guide.
+
+ -- Macro: TRANSFER_FROM_TRAMPOLINE
+     Define this macro if trampolines need a special subroutine to do
+     their work.  The macro should expand to a series of `asm'
+     statements which will be compiled with GCC.  They go in a library
+     function named `__transfer_from_trampoline'.
+
+     If you need to avoid executing the ordinary prologue code of a
+     compiled C function when you jump to the subroutine, you can do so
+     by placing a special label of your own in the assembler code.  Use
+     one `asm' statement to generate an assembler label, and another to
+     make the label global.  Then trampolines can use that label to
+     jump directly to your special assembler code.
+
+
+File: gccint.info,  Node: Library Calls,  Next: Addressing Modes,  Prev: Trampolines,  Up: Target Macros
+
+17.13 Implicit Calls to Library Routines
+========================================
+
+Here is an explanation of implicit calls to library routines.
+
+ -- Macro: DECLARE_LIBRARY_RENAMES
+     This macro, if defined, should expand to a piece of C code that
+     will get expanded when compiling functions for libgcc.a.  It can
+     be used to provide alternate names for GCC's internal library
+     functions if there are ABI-mandated names that the compiler should
+     provide.
+
+ -- Target Hook: void TARGET_INIT_LIBFUNCS (void)
+     This hook should declare additional library routines or rename
+     existing ones, using the functions `set_optab_libfunc' and
+     `init_one_libfunc' defined in `optabs.c'.  `init_optabs' calls
+     this macro after initializing all the normal library routines.
+
+     The default is to do nothing.  Most ports don't need to define
+     this hook.
+
+ -- Macro: FLOAT_LIB_COMPARE_RETURNS_BOOL (MODE, COMPARISON)
+     This macro should return `true' if the library routine that
+     implements the floating point comparison operator COMPARISON in
+     mode MODE will return a boolean, and FALSE if it will return a
+     tristate.
+
+     GCC's own floating point libraries return tristates from the
+     comparison operators, so the default returns false always.  Most
+     ports don't need to define this macro.
+
+ -- Macro: TARGET_LIB_INT_CMP_BIASED
+     This macro should evaluate to `true' if the integer comparison
+     functions (like `__cmpdi2') return 0 to indicate that the first
+     operand is smaller than the second, 1 to indicate that they are
+     equal, and 2 to indicate that the first operand is greater than
+     the second.  If this macro evaluates to `false' the comparison
+     functions return -1, 0, and 1 instead of 0, 1, and 2.  If the
+     target uses the routines in `libgcc.a', you do not need to define
+     this macro.
+
+ -- Macro: US_SOFTWARE_GOFAST
+     Define this macro if your system C library uses the US Software
+     GOFAST library to provide floating point emulation.
+
+     In addition to defining this macro, your architecture must set
+     `TARGET_INIT_LIBFUNCS' to `gofast_maybe_init_libfuncs', or else
+     call that function from its version of that hook.  It is defined
+     in `config/gofast.h', which must be included by your
+     architecture's `CPU.c' file.  See `sparc/sparc.c' for an example.
+
+     If this macro is defined, the
+     `TARGET_FLOAT_LIB_COMPARE_RETURNS_BOOL' target hook must return
+     false for `SFmode' and `DFmode' comparisons.
+
+ -- Macro: TARGET_EDOM
+     The value of `EDOM' on the target machine, as a C integer constant
+     expression.  If you don't define this macro, GCC does not attempt
+     to deposit the value of `EDOM' into `errno' directly.  Look in
+     `/usr/include/errno.h' to find the value of `EDOM' on your system.
+
+     If you do not define `TARGET_EDOM', then compiled code reports
+     domain errors by calling the library function and letting it
+     report the error.  If mathematical functions on your system use
+     `matherr' when there is an error, then you should leave
+     `TARGET_EDOM' undefined so that `matherr' is used normally.
+
+ -- Macro: GEN_ERRNO_RTX
+     Define this macro as a C expression to create an rtl expression
+     that refers to the global "variable" `errno'.  (On certain systems,
+     `errno' may not actually be a variable.)  If you don't define this
+     macro, a reasonable default is used.
+
+ -- Macro: TARGET_C99_FUNCTIONS
+     When this macro is nonzero, GCC will implicitly optimize `sin'
+     calls into `sinf' and similarly for other functions defined by C99
+     standard.  The default is zero because a number of existing
+     systems lack support for these functions in their runtime so this
+     macro needs to be redefined to one on systems that do support the
+     C99 runtime.
+
+ -- Macro: TARGET_HAS_SINCOS
+     When this macro is nonzero, GCC will implicitly optimize calls to
+     `sin' and `cos' with the same argument to a call to `sincos'.  The
+     default is zero.  The target has to provide the following
+     functions:
+          void sincos(double x, double *sin, double *cos);
+          void sincosf(float x, float *sin, float *cos);
+          void sincosl(long double x, long double *sin, long double *cos);
+
+ -- Macro: NEXT_OBJC_RUNTIME
+     Define this macro to generate code for Objective-C message sending
+     using the calling convention of the NeXT system.  This calling
+     convention involves passing the object, the selector and the
+     method arguments all at once to the method-lookup library function.
+
+     The default calling convention passes just the object and the
+     selector to the lookup function, which returns a pointer to the
+     method.
+
+
+File: gccint.info,  Node: Addressing Modes,  Next: Anchored Addresses,  Prev: Library Calls,  Up: Target Macros
+
+17.14 Addressing Modes
+======================
+
+This is about addressing modes.
+
+ -- Macro: HAVE_PRE_INCREMENT
+ -- Macro: HAVE_PRE_DECREMENT
+ -- Macro: HAVE_POST_INCREMENT
+ -- Macro: HAVE_POST_DECREMENT
+     A C expression that is nonzero if the machine supports
+     pre-increment, pre-decrement, post-increment, or post-decrement
+     addressing respectively.
+
+ -- Macro: HAVE_PRE_MODIFY_DISP
+ -- Macro: HAVE_POST_MODIFY_DISP
+     A C expression that is nonzero if the machine supports pre- or
+     post-address side-effect generation involving constants other than
+     the size of the memory operand.
+
+ -- Macro: HAVE_PRE_MODIFY_REG
+ -- Macro: HAVE_POST_MODIFY_REG
+     A C expression that is nonzero if the machine supports pre- or
+     post-address side-effect generation involving a register
+     displacement.
+
+ -- Macro: CONSTANT_ADDRESS_P (X)
+     A C expression that is 1 if the RTX X is a constant which is a
+     valid address.  On most machines the default definition of
+     `(CONSTANT_P (X) && GET_CODE (X) != CONST_DOUBLE)' is acceptable,
+     but a few machines are more restrictive as to which constant
+     addresses are supported.
+
+ -- Macro: CONSTANT_P (X)
+     `CONSTANT_P', which is defined by target-independent code, accepts
+     integer-values expressions whose values are not explicitly known,
+     such as `symbol_ref', `label_ref', and `high' expressions and
+     `const' arithmetic expressions, in addition to `const_int' and
+     `const_double' expressions.
+
+ -- Macro: MAX_REGS_PER_ADDRESS
+     A number, the maximum number of registers that can appear in a
+     valid memory address.  Note that it is up to you to specify a
+     value equal to the maximum number that
+     `TARGET_LEGITIMATE_ADDRESS_P' would ever accept.
+
+ -- Target Hook: bool TARGET_LEGITIMATE_ADDRESS_P (enum machine_mode
+          MODE, rtx X, bool STRICT)
+     A function that returns whether X (an RTX) is a legitimate memory
+     address on the target machine for a memory operand of mode MODE.
+
+     Legitimate addresses are defined in two variants: a strict variant
+     and a non-strict one.  The STRICT parameter chooses which variant
+     is desired by the caller.
+
+     The strict variant is used in the reload pass.  It must be defined
+     so that any pseudo-register that has not been allocated a hard
+     register is considered a memory reference.  This is because in
+     contexts where some kind of register is required, a
+     pseudo-register with no hard register must be rejected.  For
+     non-hard registers, the strict variant should look up the
+     `reg_renumber' array; it should then proceed using the hard
+     register number in the array, or treat the pseudo as a memory
+     reference if the array holds `-1'.
+
+     The non-strict variant is used in other passes.  It must be
+     defined to accept all pseudo-registers in every context where some
+     kind of register is required.
+
+     Normally, constant addresses which are the sum of a `symbol_ref'
+     and an integer are stored inside a `const' RTX to mark them as
+     constant.  Therefore, there is no need to recognize such sums
+     specifically as legitimate addresses.  Normally you would simply
+     recognize any `const' as legitimate.
+
+     Usually `PRINT_OPERAND_ADDRESS' is not prepared to handle constant
+     sums that are not marked with  `const'.  It assumes that a naked
+     `plus' indicates indexing.  If so, then you _must_ reject such
+     naked constant sums as illegitimate addresses, so that none of
+     them will be given to `PRINT_OPERAND_ADDRESS'.
+
+     On some machines, whether a symbolic address is legitimate depends
+     on the section that the address refers to.  On these machines,
+     define the target hook `TARGET_ENCODE_SECTION_INFO' to store the
+     information into the `symbol_ref', and then check for it here.
+     When you see a `const', you will have to look inside it to find the
+     `symbol_ref' in order to determine the section.  *Note Assembler
+     Format::.
+
+     Some ports are still using a deprecated legacy substitute for this
+     hook, the `GO_IF_LEGITIMATE_ADDRESS' macro.  This macro has this
+     syntax:
+
+          #define GO_IF_LEGITIMATE_ADDRESS (MODE, X, LABEL)
+
+     and should `goto LABEL' if the address X is a valid address on the
+     target machine for a memory operand of mode MODE.  Whether the
+     strict or non-strict variants are desired is defined by the
+     `REG_OK_STRICT' macro introduced earlier in this section.  Using
+     the hook is usually simpler because it limits the number of files
+     that are recompiled when changes are made.
+
+ -- Macro: TARGET_MEM_CONSTRAINT
+     A single character to be used instead of the default `'m''
+     character for general memory addresses.  This defines the
+     constraint letter which matches the memory addresses accepted by
+     `TARGET_LEGITIMATE_ADDRESS_P'.  Define this macro if you want to
+     support new address formats in your back end without changing the
+     semantics of the `'m'' constraint.  This is necessary in order to
+     preserve functionality of inline assembly constructs using the
+     `'m'' constraint.
+
+ -- Macro: FIND_BASE_TERM (X)
+     A C expression to determine the base term of address X, or to
+     provide a simplified version of X from which `alias.c' can easily
+     find the base term.  This macro is used in only two places:
+     `find_base_value' and `find_base_term' in `alias.c'.
+
+     It is always safe for this macro to not be defined.  It exists so
+     that alias analysis can understand machine-dependent addresses.
+
+     The typical use of this macro is to handle addresses containing a
+     label_ref or symbol_ref within an UNSPEC.
+
+ -- Target Hook: rtx TARGET_LEGITIMIZE_ADDRESS (rtx X, rtx OLDX, enum
+          machine_mode MODE)
+     This hook is given an invalid memory address X for an operand of
+     mode MODE and should try to return a valid memory address.
+
+     X will always be the result of a call to `break_out_memory_refs',
+     and OLDX will be the operand that was given to that function to
+     produce X.
+
+     The code of the hook should not alter the substructure of X.  If
+     it transforms X into a more legitimate form, it should return the
+     new X.
+
+     It is not necessary for this hook to come up with a legitimate
+     address.  The compiler has standard ways of doing so in all cases.
+     In fact, it is safe to omit this hook or make it return X if it
+     cannot find a valid way to legitimize the address.  But often a
+     machine-dependent strategy can generate better code.
+
+ -- Macro: LEGITIMIZE_RELOAD_ADDRESS (X, MODE, OPNUM, TYPE, IND_LEVELS,
+          WIN)
+     A C compound statement that attempts to replace X, which is an
+     address that needs reloading, with a valid memory address for an
+     operand of mode MODE.  WIN will be a C statement label elsewhere
+     in the code.  It is not necessary to define this macro, but it
+     might be useful for performance reasons.
+
+     For example, on the i386, it is sometimes possible to use a single
+     reload register instead of two by reloading a sum of two pseudo
+     registers into a register.  On the other hand, for number of RISC
+     processors offsets are limited so that often an intermediate
+     address needs to be generated in order to address a stack slot.
+     By defining `LEGITIMIZE_RELOAD_ADDRESS' appropriately, the
+     intermediate addresses generated for adjacent some stack slots can
+     be made identical, and thus be shared.
+
+     _Note_: This macro should be used with caution.  It is necessary
+     to know something of how reload works in order to effectively use
+     this, and it is quite easy to produce macros that build in too
+     much knowledge of reload internals.
+
+     _Note_: This macro must be able to reload an address created by a
+     previous invocation of this macro.  If it fails to handle such
+     addresses then the compiler may generate incorrect code or abort.
+
+     The macro definition should use `push_reload' to indicate parts
+     that need reloading; OPNUM, TYPE and IND_LEVELS are usually
+     suitable to be passed unaltered to `push_reload'.
+
+     The code generated by this macro must not alter the substructure of
+     X.  If it transforms X into a more legitimate form, it should
+     assign X (which will always be a C variable) a new value.  This
+     also applies to parts that you change indirectly by calling
+     `push_reload'.
+
+     The macro definition may use `strict_memory_address_p' to test if
+     the address has become legitimate.
+
+     If you want to change only a part of X, one standard way of doing
+     this is to use `copy_rtx'.  Note, however, that it unshares only a
+     single level of rtl.  Thus, if the part to be changed is not at the
+     top level, you'll need to replace first the top level.  It is not
+     necessary for this macro to come up with a legitimate address;
+     but often a machine-dependent strategy can generate better code.
+
+ -- Macro: GO_IF_MODE_DEPENDENT_ADDRESS (ADDR, LABEL)
+     A C statement or compound statement with a conditional `goto
+     LABEL;' executed if memory address X (an RTX) can have different
+     meanings depending on the machine mode of the memory reference it
+     is used for or if the address is valid for some modes but not
+     others.
+
+     Autoincrement and autodecrement addresses typically have
+     mode-dependent effects because the amount of the increment or
+     decrement is the size of the operand being addressed.  Some
+     machines have other mode-dependent addresses.  Many RISC machines
+     have no mode-dependent addresses.
+
+     You may assume that ADDR is a valid address for the machine.
+
+ -- Macro: LEGITIMATE_CONSTANT_P (X)
+     A C expression that is nonzero if X is a legitimate constant for
+     an immediate operand on the target machine.  You can assume that X
+     satisfies `CONSTANT_P', so you need not check this.  In fact, `1'
+     is a suitable definition for this macro on machines where anything
+     `CONSTANT_P' is valid.
+
+ -- Target Hook: rtx TARGET_DELEGITIMIZE_ADDRESS (rtx X)
+     This hook is used to undo the possibly obfuscating effects of the
+     `LEGITIMIZE_ADDRESS' and `LEGITIMIZE_RELOAD_ADDRESS' target
+     macros.  Some backend implementations of these macros wrap symbol
+     references inside an `UNSPEC' rtx to represent PIC or similar
+     addressing modes.  This target hook allows GCC's optimizers to
+     understand the semantics of these opaque `UNSPEC's by converting
+     them back into their original form.
+
+ -- Target Hook: bool TARGET_CANNOT_FORCE_CONST_MEM (rtx X)
+     This hook should return true if X is of a form that cannot (or
+     should not) be spilled to the constant pool.  The default version
+     of this hook returns false.
+
+     The primary reason to define this hook is to prevent reload from
+     deciding that a non-legitimate constant would be better reloaded
+     from the constant pool instead of spilling and reloading a register
+     holding the constant.  This restriction is often true of addresses
+     of TLS symbols for various targets.
+
+ -- Target Hook: bool TARGET_USE_BLOCKS_FOR_CONSTANT_P (enum
+          machine_mode MODE, const_rtx X)
+     This hook should return true if pool entries for constant X can be
+     placed in an `object_block' structure.  MODE is the mode of X.
+
+     The default version returns false for all constants.
+
+ -- Target Hook: tree TARGET_BUILTIN_RECIPROCAL (unsigned FN, bool
+          MD_FN, bool SQRT)
+     This hook should return the DECL of a function that implements
+     reciprocal of the builtin function with builtin function code FN,
+     or `NULL_TREE' if such a function is not available.  MD_FN is true
+     when FN is a code of a machine-dependent builtin function.  When
+     SQRT is true, additional optimizations that apply only to the
+     reciprocal of a square root function are performed, and only
+     reciprocals of `sqrt' function are valid.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD (void)
+     This hook should return the DECL of a function F that given an
+     address ADDR as an argument returns a mask M that can be used to
+     extract from two vectors the relevant data that resides in ADDR in
+     case ADDR is not properly aligned.
+
+     The autovectorizer, when vectorizing a load operation from an
+     address ADDR that may be unaligned, will generate two vector loads
+     from the two aligned addresses around ADDR. It then generates a
+     `REALIGN_LOAD' operation to extract the relevant data from the two
+     loaded vectors. The first two arguments to `REALIGN_LOAD', V1 and
+     V2, are the two vectors, each of size VS, and the third argument,
+     OFF, defines how the data will be extracted from these two
+     vectors: if OFF is 0, then the returned vector is V2; otherwise,
+     the returned vector is composed from the last VS-OFF elements of
+     V1 concatenated to the first OFF elements of V2.
+
+     If this hook is defined, the autovectorizer will generate a call
+     to F (using the DECL tree that this hook returns) and will use the
+     return value of F as the argument OFF to `REALIGN_LOAD'.
+     Therefore, the mask M returned by F should comply with the
+     semantics expected by `REALIGN_LOAD' described above.  If this
+     hook is not defined, then ADDR will be used as the argument OFF to
+     `REALIGN_LOAD', in which case the low log2(VS) - 1 bits of ADDR
+     will be considered.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN (tree X)
+     This hook should return the DECL of a function F that implements
+     widening multiplication of the even elements of two input vectors
+     of type X.
+
+     If this hook is defined, the autovectorizer will use it along with
+     the `TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD' target hook when
+     vectorizing widening multiplication in cases that the order of the
+     results does not have to be preserved (e.g. used only by a
+     reduction computation). Otherwise, the `widen_mult_hi/lo' idioms
+     will be used.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD (tree X)
+     This hook should return the DECL of a function F that implements
+     widening multiplication of the odd elements of two input vectors
+     of type X.
+
+     If this hook is defined, the autovectorizer will use it along with
+     the `TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN' target hook when
+     vectorizing widening multiplication in cases that the order of the
+     results does not have to be preserved (e.g. used only by a
+     reduction computation). Otherwise, the `widen_mult_hi/lo' idioms
+     will be used.
+
+ -- Target Hook: int TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST (bool
+          RUNTIME_TEST)
+     Returns the cost to be added to the overhead involved with
+     executing the vectorized version of a loop.
+
+ -- Target Hook: bool TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE
+          (const_tree TYPE, bool IS_PACKED)
+     Return true if vector alignment is reachable (by peeling N
+     iterations) for the given type.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_VEC_PERM (tree TYPE,
+          tree *MASK_ELEMENT_TYPE)
+     Target builtin that implements vector permute.
+
+ -- Target Hook: bool TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK (tree
+          VEC_TYPE, tree MASK)
+     Return true if a vector created for `builtin_vec_perm' is valid.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_CONVERSION (unsigned
+          CODE, tree TYPE)
+     This hook should return the DECL of a function that implements
+     conversion of the input vector of type TYPE.  If TYPE is an
+     integral type, the result of the conversion is a vector of
+     floating-point type of the same size.  If TYPE is a floating-point
+     type, the result of the conversion is a vector of integral type of
+     the same size.  The value of CODE is one of the enumerators in
+     `enum tree_code' and specifies how the conversion is to be applied
+     (truncation, rounding, etc.).
+
+     If this hook is defined, the autovectorizer will use the
+     `TARGET_VECTORIZE_BUILTIN_CONVERSION' target hook when vectorizing
+     conversion. Otherwise, it will return `NULL_TREE'.
+
+ -- Target Hook: tree TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION
+          (tree FNDECL, tree VEC_TYPE_OUT, tree VEC_TYPE_IN)
+     This hook should return the decl of a function that implements the
+     vectorized variant of the builtin function with builtin function
+     code CODE or `NULL_TREE' if such a function is not available.  The
+     value of FNDECL is the builtin function declaration.  The return
+     type of the vectorized function shall be of vector type
+     VEC_TYPE_OUT and the argument types should be VEC_TYPE_IN.
+
+ -- Target Hook: bool TARGET_SUPPORT_VECTOR_MISALIGNMENT (enum
+          machine_mode MODE, const_tree TYPE, int MISALIGNMENT, bool
+          IS_PACKED)
+     This hook should return true if the target supports misaligned
+     vector store/load of a specific factor denoted in the MISALIGNMENT
+     parameter.  The vector store/load should be of machine mode MODE
+     and the elements in the vectors should be of type TYPE.  IS_PACKED
+     parameter is true if the memory access is defined in a packed
+     struct.
+
+
+File: gccint.info,  Node: Anchored Addresses,  Next: Condition Code,  Prev: Addressing Modes,  Up: Target Macros
+
+17.15 Anchored Addresses
+========================
+
+GCC usually addresses every static object as a separate entity.  For
+example, if we have:
+
+     static int a, b, c;
+     int foo (void) { return a + b + c; }
+
+ the code for `foo' will usually calculate three separate symbolic
+addresses: those of `a', `b' and `c'.  On some targets, it would be
+better to calculate just one symbolic address and access the three
+variables relative to it.  The equivalent pseudocode would be something
+like:
+
+     int foo (void)
+     {
+       register int *xr = &x;
+       return xr[&a - &x] + xr[&b - &x] + xr[&c - &x];
+     }
+
+ (which isn't valid C).  We refer to shared addresses like `x' as
+"section anchors".  Their use is controlled by `-fsection-anchors'.
+
+ The hooks below describe the target properties that GCC needs to know
+in order to make effective use of section anchors.  It won't use
+section anchors at all unless either `TARGET_MIN_ANCHOR_OFFSET' or
+`TARGET_MAX_ANCHOR_OFFSET' is set to a nonzero value.
+
+ -- Target Hook: HOST_WIDE_INT TARGET_MIN_ANCHOR_OFFSET
+     The minimum offset that should be applied to a section anchor.  On
+     most targets, it should be the smallest offset that can be applied
+     to a base register while still giving a legitimate address for
+     every mode.  The default value is 0.
+
+ -- Target Hook: HOST_WIDE_INT TARGET_MAX_ANCHOR_OFFSET
+     Like `TARGET_MIN_ANCHOR_OFFSET', but the maximum (inclusive)
+     offset that should be applied to section anchors.  The default
+     value is 0.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_ANCHOR (rtx X)
+     Write the assembly code to define section anchor X, which is a
+     `SYMBOL_REF' for which `SYMBOL_REF_ANCHOR_P (X)' is true.  The
+     hook is called with the assembly output position set to the
+     beginning of `SYMBOL_REF_BLOCK (X)'.
+
+     If `ASM_OUTPUT_DEF' is available, the hook's default definition
+     uses it to define the symbol as `. + SYMBOL_REF_BLOCK_OFFSET (X)'.
+     If `ASM_OUTPUT_DEF' is not available, the hook's default definition
+     is `NULL', which disables the use of section anchors altogether.
+
+ -- Target Hook: bool TARGET_USE_ANCHORS_FOR_SYMBOL_P (const_rtx X)
+     Return true if GCC should attempt to use anchors to access
+     `SYMBOL_REF' X.  You can assume `SYMBOL_REF_HAS_BLOCK_INFO_P (X)'
+     and `!SYMBOL_REF_ANCHOR_P (X)'.
+
+     The default version is correct for most targets, but you might
+     need to intercept this hook to handle things like target-specific
+     attributes or target-specific sections.
+
+
+File: gccint.info,  Node: Condition Code,  Next: Costs,  Prev: Anchored Addresses,  Up: Target Macros
+
+17.16 Condition Code Status
+===========================
+
+The macros in this section can be split in two families, according to
+the two ways of representing condition codes in GCC.
+
+ The first representation is the so called `(cc0)' representation
+(*note Jump Patterns::), where all instructions can have an implicit
+clobber of the condition codes.  The second is the condition code
+register representation, which provides better schedulability for
+architectures that do have a condition code register, but on which most
+instructions do not affect it.  The latter category includes most RISC
+machines.
+
+ The implicit clobbering poses a strong restriction on the placement of
+the definition and use of the condition code, which need to be in
+adjacent insns for machines using `(cc0)'.  This can prevent important
+optimizations on some machines.  For example, on the IBM RS/6000, there
+is a delay for taken branches unless the condition code register is set
+three instructions earlier than the conditional branch.  The instruction
+scheduler cannot perform this optimization if it is not permitted to
+separate the definition and use of the condition code register.
+
+ For this reason, it is possible and suggested to use a register to
+represent the condition code for new ports.  If there is a specific
+condition code register in the machine, use a hard register.  If the
+condition code or comparison result can be placed in any general
+register, or if there are multiple condition registers, use a pseudo
+register.  Registers used to store the condition code value will
+usually have a mode that is in class `MODE_CC'.
+
+ Alternatively, you can use `BImode' if the comparison operator is
+specified already in the compare instruction.  In this case, you are not
+interested in most macros in this section.
+
+* Menu:
+
+* CC0 Condition Codes::      Old style representation of condition codes.
+* MODE_CC Condition Codes::  Modern representation of condition codes.
+* Cond. Exec. Macros::       Macros to control conditional execution.
+
+
+File: gccint.info,  Node: CC0 Condition Codes,  Next: MODE_CC Condition Codes,  Up: Condition Code
+
+17.16.1 Representation of condition codes using `(cc0)'
+-------------------------------------------------------
+
+The file `conditions.h' defines a variable `cc_status' to describe how
+the condition code was computed (in case the interpretation of the
+condition code depends on the instruction that it was set by).  This
+variable contains the RTL expressions on which the condition code is
+currently based, and several standard flags.
+
+ Sometimes additional machine-specific flags must be defined in the
+machine description header file.  It can also add additional
+machine-specific information by defining `CC_STATUS_MDEP'.
+
+ -- Macro: CC_STATUS_MDEP
+     C code for a data type which is used for declaring the `mdep'
+     component of `cc_status'.  It defaults to `int'.
+
+     This macro is not used on machines that do not use `cc0'.
+
+ -- Macro: CC_STATUS_MDEP_INIT
+     A C expression to initialize the `mdep' field to "empty".  The
+     default definition does nothing, since most machines don't use the
+     field anyway.  If you want to use the field, you should probably
+     define this macro to initialize it.
+
+     This macro is not used on machines that do not use `cc0'.
+
+ -- Macro: NOTICE_UPDATE_CC (EXP, INSN)
+     A C compound statement to set the components of `cc_status'
+     appropriately for an insn INSN whose body is EXP.  It is this
+     macro's responsibility to recognize insns that set the condition
+     code as a byproduct of other activity as well as those that
+     explicitly set `(cc0)'.
+
+     This macro is not used on machines that do not use `cc0'.
+
+     If there are insns that do not set the condition code but do alter
+     other machine registers, this macro must check to see whether they
+     invalidate the expressions that the condition code is recorded as
+     reflecting.  For example, on the 68000, insns that store in address
+     registers do not set the condition code, which means that usually
+     `NOTICE_UPDATE_CC' can leave `cc_status' unaltered for such insns.
+     But suppose that the previous insn set the condition code based on
+     location `a4@(102)' and the current insn stores a new value in
+     `a4'.  Although the condition code is not changed by this, it will
+     no longer be true that it reflects the contents of `a4@(102)'.
+     Therefore, `NOTICE_UPDATE_CC' must alter `cc_status' in this case
+     to say that nothing is known about the condition code value.
+
+     The definition of `NOTICE_UPDATE_CC' must be prepared to deal with
+     the results of peephole optimization: insns whose patterns are
+     `parallel' RTXs containing various `reg', `mem' or constants which
+     are just the operands.  The RTL structure of these insns is not
+     sufficient to indicate what the insns actually do.  What
+     `NOTICE_UPDATE_CC' should do when it sees one is just to run
+     `CC_STATUS_INIT'.
+
+     A possible definition of `NOTICE_UPDATE_CC' is to call a function
+     that looks at an attribute (*note Insn Attributes::) named, for
+     example, `cc'.  This avoids having detailed information about
+     patterns in two places, the `md' file and in `NOTICE_UPDATE_CC'.
+
+
+File: gccint.info,  Node: MODE_CC Condition Codes,  Next: Cond. Exec. Macros,  Prev: CC0 Condition Codes,  Up: Condition Code
+
+17.16.2 Representation of condition codes using registers
+---------------------------------------------------------
+
+ -- Macro: SELECT_CC_MODE (OP, X, Y)
+     On many machines, the condition code may be produced by other
+     instructions than compares, for example the branch can use
+     directly the condition code set by a subtract instruction.
+     However, on some machines when the condition code is set this way
+     some bits (such as the overflow bit) are not set in the same way
+     as a test instruction, so that a different branch instruction must
+     be used for some conditional branches.  When this happens, use the
+     machine mode of the condition code register to record different
+     formats of the condition code register.  Modes can also be used to
+     record which compare instruction (e.g. a signed or an unsigned
+     comparison) produced the condition codes.
+
+     If other modes than `CCmode' are required, add them to
+     `MACHINE-modes.def' and define `SELECT_CC_MODE' to choose a mode
+     given an operand of a compare.  This is needed because the modes
+     have to be chosen not only during RTL generation but also, for
+     example, by instruction combination.  The result of
+     `SELECT_CC_MODE' should be consistent with the mode used in the
+     patterns; for example to support the case of the add on the SPARC
+     discussed above, we have the pattern
+
+          (define_insn ""
+            [(set (reg:CC_NOOV 0)
+                  (compare:CC_NOOV
+                    (plus:SI (match_operand:SI 0 "register_operand" "%r")
+                             (match_operand:SI 1 "arith_operand" "rI"))
+                    (const_int 0)))]
+            ""
+            "...")
+
+     together with a `SELECT_CC_MODE' that returns `CC_NOOVmode' for
+     comparisons whose argument is a `plus':
+
+          #define SELECT_CC_MODE(OP,X,Y) \
+            (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT          \
+             ? ((OP == EQ || OP == NE) ? CCFPmode : CCFPEmode)    \
+             : ((GET_CODE (X) == PLUS || GET_CODE (X) == MINUS    \
+                 || GET_CODE (X) == NEG) \
+                ? CC_NOOVmode : CCmode))
+
+     Another reason to use modes is to retain information on which
+     operands were used by the comparison; see `REVERSIBLE_CC_MODE'
+     later in this section.
+
+     You should define this macro if and only if you define extra CC
+     modes in `MACHINE-modes.def'.
+
+ -- Macro: CANONICALIZE_COMPARISON (CODE, OP0, OP1)
+     On some machines not all possible comparisons are defined, but you
+     can convert an invalid comparison into a valid one.  For example,
+     the Alpha does not have a `GT' comparison, but you can use an `LT'
+     comparison instead and swap the order of the operands.
+
+     On such machines, define this macro to be a C statement to do any
+     required conversions.  CODE is the initial comparison code and OP0
+     and OP1 are the left and right operands of the comparison,
+     respectively.  You should modify CODE, OP0, and OP1 as required.
+
+     GCC will not assume that the comparison resulting from this macro
+     is valid but will see if the resulting insn matches a pattern in
+     the `md' file.
+
+     You need not define this macro if it would never change the
+     comparison code or operands.
+
+ -- Macro: REVERSIBLE_CC_MODE (MODE)
+     A C expression whose value is one if it is always safe to reverse a
+     comparison whose mode is MODE.  If `SELECT_CC_MODE' can ever
+     return MODE for a floating-point inequality comparison, then
+     `REVERSIBLE_CC_MODE (MODE)' must be zero.
+
+     You need not define this macro if it would always returns zero or
+     if the floating-point format is anything other than
+     `IEEE_FLOAT_FORMAT'.  For example, here is the definition used on
+     the SPARC, where floating-point inequality comparisons are always
+     given `CCFPEmode':
+
+          #define REVERSIBLE_CC_MODE(MODE)  ((MODE) != CCFPEmode)
+
+ -- Macro: REVERSE_CONDITION (CODE, MODE)
+     A C expression whose value is reversed condition code of the CODE
+     for comparison done in CC_MODE MODE.  The macro is used only in
+     case `REVERSIBLE_CC_MODE (MODE)' is nonzero.  Define this macro in
+     case machine has some non-standard way how to reverse certain
+     conditionals.  For instance in case all floating point conditions
+     are non-trapping, compiler may freely convert unordered compares
+     to ordered one.  Then definition may look like:
+
+          #define REVERSE_CONDITION(CODE, MODE) \
+             ((MODE) != CCFPmode ? reverse_condition (CODE) \
+              : reverse_condition_maybe_unordered (CODE))
+
+ -- Target Hook: bool TARGET_FIXED_CONDITION_CODE_REGS (unsigned int
+          *P1, unsigned int *P2)
+     On targets which do not use `(cc0)', and which use a hard register
+     rather than a pseudo-register to hold condition codes, the regular
+     CSE passes are often not able to identify cases in which the hard
+     register is set to a common value.  Use this hook to enable a
+     small pass which optimizes such cases.  This hook should return
+     true to enable this pass, and it should set the integers to which
+     its arguments point to the hard register numbers used for
+     condition codes.  When there is only one such register, as is true
+     on most systems, the integer pointed to by P2 should be set to
+     `INVALID_REGNUM'.
+
+     The default version of this hook returns false.
+
+ -- Target Hook: enum machine_mode TARGET_CC_MODES_COMPATIBLE (enum
+          machine_mode M1, enum machine_mode M2)
+     On targets which use multiple condition code modes in class
+     `MODE_CC', it is sometimes the case that a comparison can be
+     validly done in more than one mode.  On such a system, define this
+     target hook to take two mode arguments and to return a mode in
+     which both comparisons may be validly done.  If there is no such
+     mode, return `VOIDmode'.
+
+     The default version of this hook checks whether the modes are the
+     same.  If they are, it returns that mode.  If they are different,
+     it returns `VOIDmode'.
+
+
+File: gccint.info,  Node: Cond. Exec. Macros,  Prev: MODE_CC Condition Codes,  Up: Condition Code
+
+17.16.3 Macros to control conditional execution
+-----------------------------------------------
+
+There is one macro that may need to be defined for targets supporting
+conditional execution, independent of how they represent conditional
+branches.
+
+ -- Macro: REVERSE_CONDEXEC_PREDICATES_P (OP1, OP2)
+     A C expression that returns true if the conditional execution
+     predicate OP1, a comparison operation, is the inverse of OP2 and
+     vice versa.  Define this to return 0 if the target has conditional
+     execution predicates that cannot be reversed safely.  There is no
+     need to validate that the arguments of op1 and op2 are the same,
+     this is done separately.  If no expansion is specified, this macro
+     is defined as follows:
+
+          #define REVERSE_CONDEXEC_PREDICATES_P (x, y) \
+             (GET_CODE ((x)) == reversed_comparison_code ((y), NULL))
+
+
+File: gccint.info,  Node: Costs,  Next: Scheduling,  Prev: Condition Code,  Up: Target Macros
+
+17.17 Describing Relative Costs of Operations
+=============================================
+
+These macros let you describe the relative speed of various operations
+on the target machine.
+
+ -- Macro: REGISTER_MOVE_COST (MODE, FROM, TO)
+     A C expression for the cost of moving data of mode MODE from a
+     register in class FROM to one in class TO.  The classes are
+     expressed using the enumeration values such as `GENERAL_REGS'.  A
+     value of 2 is the default; other values are interpreted relative to
+     that.
+
+     It is not required that the cost always equal 2 when FROM is the
+     same as TO; on some machines it is expensive to move between
+     registers if they are not general registers.
+
+     If reload sees an insn consisting of a single `set' between two
+     hard registers, and if `REGISTER_MOVE_COST' applied to their
+     classes returns a value of 2, reload does not check to ensure that
+     the constraints of the insn are met.  Setting a cost of other than
+     2 will allow reload to verify that the constraints are met.  You
+     should do this if the `movM' pattern's constraints do not allow
+     such copying.
+
+ -- Macro: MEMORY_MOVE_COST (MODE, CLASS, IN)
+     A C expression for the cost of moving data of mode MODE between a
+     register of class CLASS and memory; IN is zero if the value is to
+     be written to memory, nonzero if it is to be read in.  This cost
+     is relative to those in `REGISTER_MOVE_COST'.  If moving between
+     registers and memory is more expensive than between two registers,
+     you should define this macro to express the relative cost.
+
+     If you do not define this macro, GCC uses a default cost of 4 plus
+     the cost of copying via a secondary reload register, if one is
+     needed.  If your machine requires a secondary reload register to
+     copy between memory and a register of CLASS but the reload
+     mechanism is more complex than copying via an intermediate, define
+     this macro to reflect the actual cost of the move.
+
+     GCC defines the function `memory_move_secondary_cost' if secondary
+     reloads are needed.  It computes the costs due to copying via a
+     secondary register.  If your machine copies from memory using a
+     secondary register in the conventional way but the default base
+     value of 4 is not correct for your machine, define this macro to
+     add some other value to the result of that function.  The
+     arguments to that function are the same as to this macro.
+
+ -- Macro: BRANCH_COST (SPEED_P, PREDICTABLE_P)
+     A C expression for the cost of a branch instruction.  A value of 1
+     is the default; other values are interpreted relative to that.
+     Parameter SPEED_P is true when the branch in question should be
+     optimized for speed.  When it is false, `BRANCH_COST' should be
+     returning value optimal for code size rather then performance
+     considerations.  PREDICTABLE_P is true for well predictable
+     branches. On many architectures the `BRANCH_COST' can be reduced
+     then.
+
+ Here are additional macros which do not specify precise relative costs,
+but only that certain actions are more expensive than GCC would
+ordinarily expect.
+
+ -- Macro: SLOW_BYTE_ACCESS
+     Define this macro as a C expression which is nonzero if accessing
+     less than a word of memory (i.e. a `char' or a `short') is no
+     faster than accessing a word of memory, i.e., if such access
+     require more than one instruction or if there is no difference in
+     cost between byte and (aligned) word loads.
+
+     When this macro is not defined, the compiler will access a field by
+     finding the smallest containing object; when it is defined, a
+     fullword load will be used if alignment permits.  Unless bytes
+     accesses are faster than word accesses, using word accesses is
+     preferable since it may eliminate subsequent memory access if
+     subsequent accesses occur to other fields in the same word of the
+     structure, but to different bytes.
+
+ -- Macro: SLOW_UNALIGNED_ACCESS (MODE, ALIGNMENT)
+     Define this macro to be the value 1 if memory accesses described
+     by the MODE and ALIGNMENT parameters have a cost many times greater
+     than aligned accesses, for example if they are emulated in a trap
+     handler.
+
+     When this macro is nonzero, the compiler will act as if
+     `STRICT_ALIGNMENT' were nonzero when generating code for block
+     moves.  This can cause significantly more instructions to be
+     produced.  Therefore, do not set this macro nonzero if unaligned
+     accesses only add a cycle or two to the time for a memory access.
+
+     If the value of this macro is always zero, it need not be defined.
+     If this macro is defined, it should produce a nonzero value when
+     `STRICT_ALIGNMENT' is nonzero.
+
+ -- Macro: MOVE_RATIO (SPEED)
+     The threshold of number of scalar memory-to-memory move insns,
+     _below_ which a sequence of insns should be generated instead of a
+     string move insn or a library call.  Increasing the value will
+     always make code faster, but eventually incurs high cost in
+     increased code size.
+
+     Note that on machines where the corresponding move insn is a
+     `define_expand' that emits a sequence of insns, this macro counts
+     the number of such sequences.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, a reasonable default is used.
+
+ -- Macro: MOVE_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `move_by_pieces' will be
+     used to copy a chunk of memory, or whether some other block move
+     mechanism will be used.  Defaults to 1 if `move_by_pieces_ninsns'
+     returns less than `MOVE_RATIO'.
+
+ -- Macro: MOVE_MAX_PIECES
+     A C expression used by `move_by_pieces' to determine the largest
+     unit a load or store used to copy memory is.  Defaults to
+     `MOVE_MAX'.
+
+ -- Macro: CLEAR_RATIO (SPEED)
+     The threshold of number of scalar move insns, _below_ which a
+     sequence of insns should be generated to clear memory instead of a
+     string clear insn or a library call.  Increasing the value will
+     always make code faster, but eventually incurs high cost in
+     increased code size.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, a reasonable default is used.
+
+ -- Macro: CLEAR_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `clear_by_pieces' will be
+     used to clear a chunk of memory, or whether some other block clear
+     mechanism will be used.  Defaults to 1 if `move_by_pieces_ninsns'
+     returns less than `CLEAR_RATIO'.
+
+ -- Macro: SET_RATIO (SPEED)
+     The threshold of number of scalar move insns, _below_ which a
+     sequence of insns should be generated to set memory to a constant
+     value, instead of a block set insn or a library call.  Increasing
+     the value will always make code faster, but eventually incurs high
+     cost in increased code size.
+
+     The parameter SPEED is true if the code is currently being
+     optimized for speed rather than size.
+
+     If you don't define this, it defaults to the value of `MOVE_RATIO'.
+
+ -- Macro: SET_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `store_by_pieces' will be
+     used to set a chunk of memory to a constant value, or whether some
+     other mechanism will be used.  Used by `__builtin_memset' when
+     storing values other than constant zero.  Defaults to 1 if
+     `move_by_pieces_ninsns' returns less than `SET_RATIO'.
+
+ -- Macro: STORE_BY_PIECES_P (SIZE, ALIGNMENT)
+     A C expression used to determine whether `store_by_pieces' will be
+     used to set a chunk of memory to a constant string value, or
+     whether some other mechanism will be used.  Used by
+     `__builtin_strcpy' when called with a constant source string.
+     Defaults to 1 if `move_by_pieces_ninsns' returns less than
+     `MOVE_RATIO'.
+
+ -- Macro: USE_LOAD_POST_INCREMENT (MODE)
+     A C expression used to determine whether a load postincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_INCREMENT'.
+
+ -- Macro: USE_LOAD_POST_DECREMENT (MODE)
+     A C expression used to determine whether a load postdecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_DECREMENT'.
+
+ -- Macro: USE_LOAD_PRE_INCREMENT (MODE)
+     A C expression used to determine whether a load preincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_INCREMENT'.
+
+ -- Macro: USE_LOAD_PRE_DECREMENT (MODE)
+     A C expression used to determine whether a load predecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_DECREMENT'.
+
+ -- Macro: USE_STORE_POST_INCREMENT (MODE)
+     A C expression used to determine whether a store postincrement is
+     a good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_INCREMENT'.
+
+ -- Macro: USE_STORE_POST_DECREMENT (MODE)
+     A C expression used to determine whether a store postdecrement is
+     a good thing to use for a given mode.  Defaults to the value of
+     `HAVE_POST_DECREMENT'.
+
+ -- Macro: USE_STORE_PRE_INCREMENT (MODE)
+     This macro is used to determine whether a store preincrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_INCREMENT'.
+
+ -- Macro: USE_STORE_PRE_DECREMENT (MODE)
+     This macro is used to determine whether a store predecrement is a
+     good thing to use for a given mode.  Defaults to the value of
+     `HAVE_PRE_DECREMENT'.
+
+ -- Macro: NO_FUNCTION_CSE
+     Define this macro if it is as good or better to call a constant
+     function address than to call an address kept in a register.
+
+ -- Macro: RANGE_TEST_NON_SHORT_CIRCUIT
+     Define this macro if a non-short-circuit operation produced by
+     `fold_range_test ()' is optimal.  This macro defaults to true if
+     `BRANCH_COST' is greater than or equal to the value 2.
+
+ -- Target Hook: bool TARGET_RTX_COSTS (rtx X, int CODE, int
+          OUTER_CODE, int *TOTAL, bool SPEED)
+     This target hook describes the relative costs of RTL expressions.
+
+     The cost may depend on the precise form of the expression, which is
+     available for examination in X, and the rtx code of the expression
+     in which it is contained, found in OUTER_CODE.  CODE is the
+     expression code--redundant, since it can be obtained with
+     `GET_CODE (X)'.
+
+     In implementing this hook, you can use the construct
+     `COSTS_N_INSNS (N)' to specify a cost equal to N fast instructions.
+
+     On entry to the hook, `*TOTAL' contains a default estimate for the
+     cost of the expression.  The hook should modify this value as
+     necessary.  Traditionally, the default costs are `COSTS_N_INSNS
+     (5)' for multiplications, `COSTS_N_INSNS (7)' for division and
+     modulus operations, and `COSTS_N_INSNS (1)' for all other
+     operations.
+
+     When optimizing for code size, i.e. when `speed' is false, this
+     target hook should be used to estimate the relative size cost of
+     an expression, again relative to `COSTS_N_INSNS'.
+
+     The hook returns true when all subexpressions of X have been
+     processed, and false when `rtx_cost' should recurse.
+
+ -- Target Hook: int TARGET_ADDRESS_COST (rtx ADDRESS, bool SPEED)
+     This hook computes the cost of an addressing mode that contains
+     ADDRESS.  If not defined, the cost is computed from the ADDRESS
+     expression and the `TARGET_RTX_COST' hook.
+
+     For most CISC machines, the default cost is a good approximation
+     of the true cost of the addressing mode.  However, on RISC
+     machines, all instructions normally have the same length and
+     execution time.  Hence all addresses will have equal costs.
+
+     In cases where more than one form of an address is known, the form
+     with the lowest cost will be used.  If multiple forms have the
+     same, lowest, cost, the one that is the most complex will be used.
+
+     For example, suppose an address that is equal to the sum of a
+     register and a constant is used twice in the same basic block.
+     When this macro is not defined, the address will be computed in a
+     register and memory references will be indirect through that
+     register.  On machines where the cost of the addressing mode
+     containing the sum is no higher than that of a simple indirect
+     reference, this will produce an additional instruction and
+     possibly require an additional register.  Proper specification of
+     this macro eliminates this overhead for such machines.
+
+     This hook is never called with an invalid address.
+
+     On machines where an address involving more than one register is as
+     cheap as an address computation involving only one register,
+     defining `TARGET_ADDRESS_COST' to reflect this can cause two
+     registers to be live over a region of code where only one would
+     have been if `TARGET_ADDRESS_COST' were not defined in that
+     manner.  This effect should be considered in the definition of
+     this macro.  Equivalent costs should probably only be given to
+     addresses with different numbers of registers on machines with
+     lots of registers.
+
+
+File: gccint.info,  Node: Scheduling,  Next: Sections,  Prev: Costs,  Up: Target Macros
+
+17.18 Adjusting the Instruction Scheduler
+=========================================
+
+The instruction scheduler may need a fair amount of machine-specific
+adjustment in order to produce good code.  GCC provides several target
+hooks for this purpose.  It is usually enough to define just a few of
+them: try the first ones in this list first.
+
+ -- Target Hook: int TARGET_SCHED_ISSUE_RATE (void)
+     This hook returns the maximum number of instructions that can ever
+     issue at the same time on the target machine.  The default is one.
+     Although the insn scheduler can define itself the possibility of
+     issue an insn on the same cycle, the value can serve as an
+     additional constraint to issue insns on the same simulated
+     processor cycle (see hooks `TARGET_SCHED_REORDER' and
+     `TARGET_SCHED_REORDER2').  This value must be constant over the
+     entire compilation.  If you need it to vary depending on what the
+     instructions are, you must use `TARGET_SCHED_VARIABLE_ISSUE'.
+
+ -- Target Hook: int TARGET_SCHED_VARIABLE_ISSUE (FILE *FILE, int
+          VERBOSE, rtx INSN, int MORE)
+     This hook is executed by the scheduler after it has scheduled an
+     insn from the ready list.  It should return the number of insns
+     which can still be issued in the current cycle.  The default is
+     `MORE - 1' for insns other than `CLOBBER' and `USE', which
+     normally are not counted against the issue rate.  You should
+     define this hook if some insns take more machine resources than
+     others, so that fewer insns can follow them in the same cycle.
+     FILE is either a null pointer, or a stdio stream to write any
+     debug output to.  VERBOSE is the verbose level provided by
+     `-fsched-verbose-N'.  INSN is the instruction that was scheduled.
+
+ -- Target Hook: int TARGET_SCHED_ADJUST_COST (rtx INSN, rtx LINK, rtx
+          DEP_INSN, int COST)
+     This function corrects the value of COST based on the relationship
+     between INSN and DEP_INSN through the dependence LINK.  It should
+     return the new value.  The default is to make no adjustment to
+     COST.  This can be used for example to specify to the scheduler
+     using the traditional pipeline description that an output- or
+     anti-dependence does not incur the same cost as a data-dependence.
+     If the scheduler using the automaton based pipeline description,
+     the cost of anti-dependence is zero and the cost of
+     output-dependence is maximum of one and the difference of latency
+     times of the first and the second insns.  If these values are not
+     acceptable, you could use the hook to modify them too.  See also
+     *note Processor pipeline description::.
+
+ -- Target Hook: int TARGET_SCHED_ADJUST_PRIORITY (rtx INSN, int
+          PRIORITY)
+     This hook adjusts the integer scheduling priority PRIORITY of
+     INSN.  It should return the new priority.  Increase the priority to
+     execute INSN earlier, reduce the priority to execute INSN later.
+     Do not define this hook if you do not need to adjust the
+     scheduling priorities of insns.
+
+ -- Target Hook: int TARGET_SCHED_REORDER (FILE *FILE, int VERBOSE, rtx
+          *READY, int *N_READYP, int CLOCK)
+     This hook is executed by the scheduler after it has scheduled the
+     ready list, to allow the machine description to reorder it (for
+     example to combine two small instructions together on `VLIW'
+     machines).  FILE is either a null pointer, or a stdio stream to
+     write any debug output to.  VERBOSE is the verbose level provided
+     by `-fsched-verbose-N'.  READY is a pointer to the ready list of
+     instructions that are ready to be scheduled.  N_READYP is a
+     pointer to the number of elements in the ready list.  The scheduler
+     reads the ready list in reverse order, starting with
+     READY[*N_READYP - 1] and going to READY[0].  CLOCK is the timer
+     tick of the scheduler.  You may modify the ready list and the
+     number of ready insns.  The return value is the number of insns
+     that can issue this cycle; normally this is just `issue_rate'.
+     See also `TARGET_SCHED_REORDER2'.
+
+ -- Target Hook: int TARGET_SCHED_REORDER2 (FILE *FILE, int VERBOSE,
+          rtx *READY, int *N_READYP, int CLOCK)
+     Like `TARGET_SCHED_REORDER', but called at a different time.  That
+     function is called whenever the scheduler starts a new cycle.
+     This one is called once per iteration over a cycle, immediately
+     after `TARGET_SCHED_VARIABLE_ISSUE'; it can reorder the ready list
+     and return the number of insns to be scheduled in the same cycle.
+     Defining this hook can be useful if there are frequent situations
+     where scheduling one insn causes other insns to become ready in
+     the same cycle.  These other insns can then be taken into account
+     properly.
+
+ -- Target Hook: void TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK (rtx
+          HEAD, rtx TAIL)
+     This hook is called after evaluation forward dependencies of insns
+     in chain given by two parameter values (HEAD and TAIL
+     correspondingly) but before insns scheduling of the insn chain.
+     For example, it can be used for better insn classification if it
+     requires analysis of dependencies.  This hook can use backward and
+     forward dependencies of the insn scheduler because they are already
+     calculated.
+
+ -- Target Hook: void TARGET_SCHED_INIT (FILE *FILE, int VERBOSE, int
+          MAX_READY)
+     This hook is executed by the scheduler at the beginning of each
+     block of instructions that are to be scheduled.  FILE is either a
+     null pointer, or a stdio stream to write any debug output to.
+     VERBOSE is the verbose level provided by `-fsched-verbose-N'.
+     MAX_READY is the maximum number of insns in the current scheduling
+     region that can be live at the same time.  This can be used to
+     allocate scratch space if it is needed, e.g. by
+     `TARGET_SCHED_REORDER'.
+
+ -- Target Hook: void TARGET_SCHED_FINISH (FILE *FILE, int VERBOSE)
+     This hook is executed by the scheduler at the end of each block of
+     instructions that are to be scheduled.  It can be used to perform
+     cleanup of any actions done by the other scheduling hooks.  FILE
+     is either a null pointer, or a stdio stream to write any debug
+     output to.  VERBOSE is the verbose level provided by
+     `-fsched-verbose-N'.
+
+ -- Target Hook: void TARGET_SCHED_INIT_GLOBAL (FILE *FILE, int
+          VERBOSE, int OLD_MAX_UID)
+     This hook is executed by the scheduler after function level
+     initializations.  FILE is either a null pointer, or a stdio stream
+     to write any debug output to.  VERBOSE is the verbose level
+     provided by `-fsched-verbose-N'.  OLD_MAX_UID is the maximum insn
+     uid when scheduling begins.
+
+ -- Target Hook: void TARGET_SCHED_FINISH_GLOBAL (FILE *FILE, int
+          VERBOSE)
+     This is the cleanup hook corresponding to
+     `TARGET_SCHED_INIT_GLOBAL'.  FILE is either a null pointer, or a
+     stdio stream to write any debug output to.  VERBOSE is the verbose
+     level provided by `-fsched-verbose-N'.
+
+ -- Target Hook: rtx TARGET_SCHED_DFA_PRE_CYCLE_INSN (void)
+     The hook returns an RTL insn.  The automaton state used in the
+     pipeline hazard recognizer is changed as if the insn were scheduled
+     when the new simulated processor cycle starts.  Usage of the hook
+     may simplify the automaton pipeline description for some VLIW
+     processors.  If the hook is defined, it is used only for the
+     automaton based pipeline description.  The default is not to
+     change the state when the new simulated processor cycle starts.
+
+ -- Target Hook: void TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN (void)
+     The hook can be used to initialize data used by the previous hook.
+
+ -- Target Hook: rtx TARGET_SCHED_DFA_POST_CYCLE_INSN (void)
+     The hook is analogous to `TARGET_SCHED_DFA_PRE_CYCLE_INSN' but used
+     to changed the state as if the insn were scheduled when the new
+     simulated processor cycle finishes.
+
+ -- Target Hook: void TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN (void)
+     The hook is analogous to `TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN' but
+     used to initialize data used by the previous hook.
+
+ -- Target Hook: void TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE (void)
+     The hook to notify target that the current simulated cycle is
+     about to finish.  The hook is analogous to
+     `TARGET_SCHED_DFA_PRE_CYCLE_INSN' but used to change the state in
+     more complicated situations - e.g., when advancing state on a
+     single insn is not enough.
+
+ -- Target Hook: void TARGET_SCHED_DFA_POST_ADVANCE_CYCLE (void)
+     The hook to notify target that new simulated cycle has just
+     started.  The hook is analogous to
+     `TARGET_SCHED_DFA_POST_CYCLE_INSN' but used to change the state in
+     more complicated situations - e.g., when advancing state on a
+     single insn is not enough.
+
+ -- Target Hook: int TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+          (void)
+     This hook controls better choosing an insn from the ready insn
+     queue for the DFA-based insn scheduler.  Usually the scheduler
+     chooses the first insn from the queue.  If the hook returns a
+     positive value, an additional scheduler code tries all
+     permutations of `TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD
+     ()' subsequent ready insns to choose an insn whose issue will
+     result in maximal number of issued insns on the same cycle.  For
+     the VLIW processor, the code could actually solve the problem of
+     packing simple insns into the VLIW insn.  Of course, if the rules
+     of VLIW packing are described in the automaton.
+
+     This code also could be used for superscalar RISC processors.  Let
+     us consider a superscalar RISC processor with 3 pipelines.  Some
+     insns can be executed in pipelines A or B, some insns can be
+     executed only in pipelines B or C, and one insn can be executed in
+     pipeline B.  The processor may issue the 1st insn into A and the
+     2nd one into B.  In this case, the 3rd insn will wait for freeing B
+     until the next cycle.  If the scheduler issues the 3rd insn the
+     first, the processor could issue all 3 insns per cycle.
+
+     Actually this code demonstrates advantages of the automaton based
+     pipeline hazard recognizer.  We try quickly and easy many insn
+     schedules to choose the best one.
+
+     The default is no multipass scheduling.
+
+ -- Target Hook: int
+TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD (rtx INSN)
+     This hook controls what insns from the ready insn queue will be
+     considered for the multipass insn scheduling.  If the hook returns
+     zero for INSN, the insn will be not chosen to be issued.
+
+     The default is that any ready insns can be chosen to be issued.
+
+ -- Target Hook: int TARGET_SCHED_DFA_NEW_CYCLE (FILE *DUMP, int
+          VERBOSE, rtx INSN, int LAST_CLOCK, int CLOCK, int *SORT_P)
+     This hook is called by the insn scheduler before issuing INSN on
+     cycle CLOCK.  If the hook returns nonzero, INSN is not issued on
+     this processor cycle.  Instead, the processor cycle is advanced.
+     If *SORT_P is zero, the insn ready queue is not sorted on the new
+     cycle start as usually.  DUMP and VERBOSE specify the file and
+     verbosity level to use for debugging output.  LAST_CLOCK and CLOCK
+     are, respectively, the processor cycle on which the previous insn
+     has been issued, and the current processor cycle.
+
+ -- Target Hook: bool TARGET_SCHED_IS_COSTLY_DEPENDENCE (struct _dep
+          *_DEP, int COST, int DISTANCE)
+     This hook is used to define which dependences are considered
+     costly by the target, so costly that it is not advisable to
+     schedule the insns that are involved in the dependence too close
+     to one another.  The parameters to this hook are as follows:  The
+     first parameter _DEP is the dependence being evaluated.  The
+     second parameter COST is the cost of the dependence as estimated
+     by the scheduler, and the third parameter DISTANCE is the distance
+     in cycles between the two insns.  The hook returns `true' if
+     considering the distance between the two insns the dependence
+     between them is considered costly by the target, and `false'
+     otherwise.
+
+     Defining this hook can be useful in multiple-issue out-of-order
+     machines, where (a) it's practically hopeless to predict the
+     actual data/resource delays, however: (b) there's a better chance
+     to predict the actual grouping that will be formed, and (c)
+     correctly emulating the grouping can be very important.  In such
+     targets one may want to allow issuing dependent insns closer to
+     one another--i.e., closer than the dependence distance;  however,
+     not in cases of "costly dependences", which this hooks allows to
+     define.
+
+ -- Target Hook: void TARGET_SCHED_H_I_D_EXTENDED (void)
+     This hook is called by the insn scheduler after emitting a new
+     instruction to the instruction stream.  The hook notifies a target
+     backend to extend its per instruction data structures.
+
+ -- Target Hook: void * TARGET_SCHED_ALLOC_SCHED_CONTEXT (void)
+     Return a pointer to a store large enough to hold target scheduling
+     context.
+
+ -- Target Hook: void TARGET_SCHED_INIT_SCHED_CONTEXT (void *TC, bool
+          CLEAN_P)
+     Initialize store pointed to by TC to hold target scheduling
+     context.  It CLEAN_P is true then initialize TC as if scheduler is
+     at the beginning of the block.  Otherwise, copy the current
+     context into TC.
+
+ -- Target Hook: void TARGET_SCHED_SET_SCHED_CONTEXT (void *TC)
+     Copy target scheduling context pointed to by TC to the current
+     context.
+
+ -- Target Hook: void TARGET_SCHED_CLEAR_SCHED_CONTEXT (void *TC)
+     Deallocate internal data in target scheduling context pointed to
+     by TC.
+
+ -- Target Hook: void TARGET_SCHED_FREE_SCHED_CONTEXT (void *TC)
+     Deallocate a store for target scheduling context pointed to by TC.
+
+ -- Target Hook: int TARGET_SCHED_SPECULATE_INSN (rtx INSN, int
+          REQUEST, rtx *NEW_PAT)
+     This hook is called by the insn scheduler when INSN has only
+     speculative dependencies and therefore can be scheduled
+     speculatively.  The hook is used to check if the pattern of INSN
+     has a speculative version and, in case of successful check, to
+     generate that speculative pattern.  The hook should return 1, if
+     the instruction has a speculative form, or -1, if it doesn't.
+     REQUEST describes the type of requested speculation.  If the
+     return value equals 1 then NEW_PAT is assigned the generated
+     speculative pattern.
+
+ -- Target Hook: bool TARGET_SCHED_NEEDS_BLOCK_P (int DEP_STATUS)
+     This hook is called by the insn scheduler during generation of
+     recovery code for INSN.  It should return `true', if the
+     corresponding check instruction should branch to recovery code, or
+     `false' otherwise.
+
+ -- Target Hook: rtx TARGET_SCHED_GEN_SPEC_CHECK (rtx INSN, rtx LABEL,
+          int MUTATE_P)
+     This hook is called by the insn scheduler to generate a pattern
+     for recovery check instruction.  If MUTATE_P is zero, then INSN is
+     a speculative instruction for which the check should be generated.
+     LABEL is either a label of a basic block, where recovery code
+     should be emitted, or a null pointer, when requested check doesn't
+     branch to recovery code (a simple check).  If MUTATE_P is nonzero,
+     then a pattern for a branchy check corresponding to a simple check
+     denoted by INSN should be generated.  In this case LABEL can't be
+     null.
+
+ -- Target Hook: bool
+TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC (const_rtx
+          INSN)
+     This hook is used as a workaround for
+     `TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD' not being
+     called on the first instruction of the ready list.  The hook is
+     used to discard speculative instructions that stand first in the
+     ready list from being scheduled on the current cycle.  If the hook
+     returns `false', INSN will not be chosen to be issued.  For
+     non-speculative instructions, the hook should always return
+     `true'.  For example, in the ia64 backend the hook is used to
+     cancel data speculative insns when the ALAT table is nearly full.
+
+ -- Target Hook: void TARGET_SCHED_SET_SCHED_FLAGS (struct
+          spec_info_def *SPEC_INFO)
+     This hook is used by the insn scheduler to find out what features
+     should be enabled/used.  The structure *SPEC_INFO should be filled
+     in by the target.  The structure describes speculation types that
+     can be used in the scheduler.
+
+ -- Target Hook: int TARGET_SCHED_SMS_RES_MII (struct ddg *G)
+     This hook is called by the swing modulo scheduler to calculate a
+     resource-based lower bound which is based on the resources
+     available in the machine and the resources required by each
+     instruction.  The target backend can use G to calculate such
+     bound.  A very simple lower bound will be used in case this hook
+     is not implemented: the total number of instructions divided by
+     the issue rate.
+
+
+File: gccint.info,  Node: Sections,  Next: PIC,  Prev: Scheduling,  Up: Target Macros
+
+17.19 Dividing the Output into Sections (Texts, Data, ...)
+==========================================================
+
+An object file is divided into sections containing different types of
+data.  In the most common case, there are three sections: the "text
+section", which holds instructions and read-only data; the "data
+section", which holds initialized writable data; and the "bss section",
+which holds uninitialized data.  Some systems have other kinds of
+sections.
+
+ `varasm.c' provides several well-known sections, such as
+`text_section', `data_section' and `bss_section'.  The normal way of
+controlling a `FOO_section' variable is to define the associated
+`FOO_SECTION_ASM_OP' macro, as described below.  The macros are only
+read once, when `varasm.c' initializes itself, so their values must be
+run-time constants.  They may however depend on command-line flags.
+
+ _Note:_ Some run-time files, such `crtstuff.c', also make use of the
+`FOO_SECTION_ASM_OP' macros, and expect them to be string literals.
+
+ Some assemblers require a different string to be written every time a
+section is selected.  If your assembler falls into this category, you
+should define the `TARGET_ASM_INIT_SECTIONS' hook and use
+`get_unnamed_section' to set up the sections.
+
+ You must always create a `text_section', either by defining
+`TEXT_SECTION_ASM_OP' or by initializing `text_section' in
+`TARGET_ASM_INIT_SECTIONS'.  The same is true of `data_section' and
+`DATA_SECTION_ASM_OP'.  If you do not create a distinct
+`readonly_data_section', the default is to reuse `text_section'.
+
+ All the other `varasm.c' sections are optional, and are null if the
+target does not provide them.
+
+ -- Macro: TEXT_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation that should precede
+     instructions and read-only data.  Normally `"\t.text"' is right.
+
+ -- Macro: HOT_TEXT_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing most frequently executed functions of the program.  If
+     not defined, GCC will provide a default definition if the target
+     supports named sections.
+
+ -- Macro: UNLIKELY_EXECUTED_TEXT_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing unlikely executed functions in the program.
+
+ -- Macro: DATA_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation to identify the following data
+     as writable initialized data.  Normally `"\t.data"' is right.
+
+ -- Macro: SDATA_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as initialized, writable small data.
+
+ -- Macro: READONLY_DATA_SECTION_ASM_OP
+     A C expression whose value is a string, including spacing,
+     containing the assembler operation to identify the following data
+     as read-only initialized data.
+
+ -- Macro: BSS_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as uninitialized global data.  If not defined, and
+     neither `ASM_OUTPUT_BSS' nor `ASM_OUTPUT_ALIGNED_BSS' are defined,
+     uninitialized global data will be output in the data section if
+     `-fno-common' is passed, otherwise `ASM_OUTPUT_COMMON' will be
+     used.
+
+ -- Macro: SBSS_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as uninitialized, writable small data.
+
+ -- Macro: TLS_COMMON_ASM_OP
+     If defined, a C expression whose value is a string containing the
+     assembler operation to identify the following data as thread-local
+     common data.  The default is `".tls_common"'.
+
+ -- Macro: TLS_SECTION_ASM_FLAG
+     If defined, a C expression whose value is a character constant
+     containing the flag used to mark a section as a TLS section.  The
+     default is `'T''.
+
+ -- Macro: INIT_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as initialization code.  If not defined, GCC will
+     assume such a section does not exist.  This section has no
+     corresponding `init_section' variable; it is used entirely in
+     runtime code.
+
+ -- Macro: FINI_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as finalization code.  If not defined, GCC will
+     assume such a section does not exist.  This section has no
+     corresponding `fini_section' variable; it is used entirely in
+     runtime code.
+
+ -- Macro: INIT_ARRAY_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as part of the `.init_array' (or equivalent)
+     section.  If not defined, GCC will assume such a section does not
+     exist.  Do not define both this macro and `INIT_SECTION_ASM_OP'.
+
+ -- Macro: FINI_ARRAY_SECTION_ASM_OP
+     If defined, a C expression whose value is a string, including
+     spacing, containing the assembler operation to identify the
+     following data as part of the `.fini_array' (or equivalent)
+     section.  If not defined, GCC will assume such a section does not
+     exist.  Do not define both this macro and `FINI_SECTION_ASM_OP'.
+
+ -- Macro: CRT_CALL_STATIC_FUNCTION (SECTION_OP, FUNCTION)
+     If defined, an ASM statement that switches to a different section
+     via SECTION_OP, calls FUNCTION, and switches back to the text
+     section.  This is used in `crtstuff.c' if `INIT_SECTION_ASM_OP' or
+     `FINI_SECTION_ASM_OP' to calls to initialization and finalization
+     functions from the init and fini sections.  By default, this macro
+     uses a simple function call.  Some ports need hand-crafted
+     assembly code to avoid dependencies on registers initialized in
+     the function prologue or to ensure that constant pools don't end
+     up too far way in the text section.
+
+ -- Macro: TARGET_LIBGCC_SDATA_SECTION
+     If defined, a string which names the section into which small
+     variables defined in crtstuff and libgcc should go.  This is useful
+     when the target has options for optimizing access to small data,
+     and you want the crtstuff and libgcc routines to be conservative
+     in what they expect of your application yet liberal in what your
+     application expects.  For example, for targets with a `.sdata'
+     section (like MIPS), you could compile crtstuff with `-G 0' so
+     that it doesn't require small data support from your application,
+     but use this macro to put small data into `.sdata' so that your
+     application can access these variables whether it uses small data
+     or not.
+
+ -- Macro: FORCE_CODE_SECTION_ALIGN
+     If defined, an ASM statement that aligns a code section to some
+     arbitrary boundary.  This is used to force all fragments of the
+     `.init' and `.fini' sections to have to same alignment and thus
+     prevent the linker from having to add any padding.
+
+ -- Macro: JUMP_TABLES_IN_TEXT_SECTION
+     Define this macro to be an expression with a nonzero value if jump
+     tables (for `tablejump' insns) should be output in the text
+     section, along with the assembler instructions.  Otherwise, the
+     readonly data section is used.
+
+     This macro is irrelevant if there is no separate readonly data
+     section.
+
+ -- Target Hook: void TARGET_ASM_INIT_SECTIONS (void)
+     Define this hook if you need to do something special to set up the
+     `varasm.c' sections, or if your target has some special sections
+     of its own that you need to create.
+
+     GCC calls this hook after processing the command line, but before
+     writing any assembly code, and before calling any of the
+     section-returning hooks described below.
+
+ -- Target Hook: int TARGET_ASM_RELOC_RW_MASK (void)
+     Return a mask describing how relocations should be treated when
+     selecting sections.  Bit 1 should be set if global relocations
+     should be placed in a read-write section; bit 0 should be set if
+     local relocations should be placed in a read-write section.
+
+     The default version of this function returns 3 when `-fpic' is in
+     effect, and 0 otherwise.  The hook is typically redefined when the
+     target cannot support (some kinds of) dynamic relocations in
+     read-only sections even in executables.
+
+ -- Target Hook: section * TARGET_ASM_SELECT_SECTION (tree EXP, int
+          RELOC, unsigned HOST_WIDE_INT ALIGN)
+     Return the section into which EXP should be placed.  You can
+     assume that EXP is either a `VAR_DECL' node or a constant of some
+     sort.  RELOC indicates whether the initial value of EXP requires
+     link-time relocations.  Bit 0 is set when variable contains local
+     relocations only, while bit 1 is set for global relocations.
+     ALIGN is the constant alignment in bits.
+
+     The default version of this function takes care of putting
+     read-only variables in `readonly_data_section'.
+
+     See also USE_SELECT_SECTION_FOR_FUNCTIONS.
+
+ -- Macro: USE_SELECT_SECTION_FOR_FUNCTIONS
+     Define this macro if you wish TARGET_ASM_SELECT_SECTION to be
+     called for `FUNCTION_DECL's as well as for variables and constants.
+
+     In the case of a `FUNCTION_DECL', RELOC will be zero if the
+     function has been determined to be likely to be called, and
+     nonzero if it is unlikely to be called.
+
+ -- Target Hook: void TARGET_ASM_UNIQUE_SECTION (tree DECL, int RELOC)
+     Build up a unique section name, expressed as a `STRING_CST' node,
+     and assign it to `DECL_SECTION_NAME (DECL)'.  As with
+     `TARGET_ASM_SELECT_SECTION', RELOC indicates whether the initial
+     value of EXP requires link-time relocations.
+
+     The default version of this function appends the symbol name to the
+     ELF section name that would normally be used for the symbol.  For
+     example, the function `foo' would be placed in `.text.foo'.
+     Whatever the actual target object format, this is often good
+     enough.
+
+ -- Target Hook: section * TARGET_ASM_FUNCTION_RODATA_SECTION (tree
+          DECL)
+     Return the readonly data section associated with
+     `DECL_SECTION_NAME (DECL)'.  The default version of this function
+     selects `.gnu.linkonce.r.name' if the function's section is
+     `.gnu.linkonce.t.name', `.rodata.name' if function is in
+     `.text.name', and the normal readonly-data section otherwise.
+
+ -- Target Hook: section * TARGET_ASM_SELECT_RTX_SECTION (enum
+          machine_mode MODE, rtx X, unsigned HOST_WIDE_INT ALIGN)
+     Return the section into which a constant X, of mode MODE, should
+     be placed.  You can assume that X is some kind of constant in RTL.
+     The argument MODE is redundant except in the case of a `const_int'
+     rtx.  ALIGN is the constant alignment in bits.
+
+     The default version of this function takes care of putting symbolic
+     constants in `flag_pic' mode in `data_section' and everything else
+     in `readonly_data_section'.
+
+ -- Target Hook: tree TARGET_MANGLE_DECL_ASSEMBLER_NAME (tree DECL,
+          tree ID)
+     Define this hook if you need to postprocess the assembler name
+     generated by target-independent code.  The ID provided to this
+     hook will be the computed name (e.g., the macro `DECL_NAME' of the
+     DECL in C, or the mangled name of the DECL in C++).  The return
+     value of the hook is an `IDENTIFIER_NODE' for the appropriate
+     mangled name on your target system.  The default implementation of
+     this hook just returns the ID provided.
+
+ -- Target Hook: void TARGET_ENCODE_SECTION_INFO (tree DECL, rtx RTL,
+          int NEW_DECL_P)
+     Define this hook if references to a symbol or a constant must be
+     treated differently depending on something about the variable or
+     function named by the symbol (such as what section it is in).
+
+     The hook is executed immediately after rtl has been created for
+     DECL, which may be a variable or function declaration or an entry
+     in the constant pool.  In either case, RTL is the rtl in question.
+     Do _not_ use `DECL_RTL (DECL)' in this hook; that field may not
+     have been initialized yet.
+
+     In the case of a constant, it is safe to assume that the rtl is a
+     `mem' whose address is a `symbol_ref'.  Most decls will also have
+     this form, but that is not guaranteed.  Global register variables,
+     for instance, will have a `reg' for their rtl.  (Normally the
+     right thing to do with such unusual rtl is leave it alone.)
+
+     The NEW_DECL_P argument will be true if this is the first time
+     that `TARGET_ENCODE_SECTION_INFO' has been invoked on this decl.
+     It will be false for subsequent invocations, which will happen for
+     duplicate declarations.  Whether or not anything must be done for
+     the duplicate declaration depends on whether the hook examines
+     `DECL_ATTRIBUTES'.  NEW_DECL_P is always true when the hook is
+     called for a constant.
+
+     The usual thing for this hook to do is to record flags in the
+     `symbol_ref', using `SYMBOL_REF_FLAG' or `SYMBOL_REF_FLAGS'.
+     Historically, the name string was modified if it was necessary to
+     encode more than one bit of information, but this practice is now
+     discouraged; use `SYMBOL_REF_FLAGS'.
+
+     The default definition of this hook, `default_encode_section_info'
+     in `varasm.c', sets a number of commonly-useful bits in
+     `SYMBOL_REF_FLAGS'.  Check whether the default does what you need
+     before overriding it.
+
+ -- Target Hook: const char * TARGET_STRIP_NAME_ENCODING (const char
+          *NAME)
+     Decode NAME and return the real name part, sans the characters
+     that `TARGET_ENCODE_SECTION_INFO' may have added.
+
+ -- Target Hook: bool TARGET_IN_SMALL_DATA_P (const_tree EXP)
+     Returns true if EXP should be placed into a "small data" section.
+     The default version of this hook always returns false.
+
+ -- Target Hook: bool TARGET_HAVE_SRODATA_SECTION
+     Contains the value true if the target places read-only "small
+     data" into a separate section.  The default value is false.
+
+ -- Target Hook: bool TARGET_BINDS_LOCAL_P (const_tree EXP)
+     Returns true if EXP names an object for which name resolution
+     rules must resolve to the current "module" (dynamic shared library
+     or executable image).
+
+     The default version of this hook implements the name resolution
+     rules for ELF, which has a looser model of global name binding
+     than other currently supported object file formats.
+
+ -- Target Hook: bool TARGET_HAVE_TLS
+     Contains the value true if the target supports thread-local
+     storage.  The default value is false.
+
+
+File: gccint.info,  Node: PIC,  Next: Assembler Format,  Prev: Sections,  Up: Target Macros
+
+17.20 Position Independent Code
+===============================
+
+This section describes macros that help implement generation of position
+independent code.  Simply defining these macros is not enough to
+generate valid PIC; you must also add support to the hook
+`TARGET_LEGITIMATE_ADDRESS_P' and to the macro `PRINT_OPERAND_ADDRESS',
+as well as `LEGITIMIZE_ADDRESS'.  You must modify the definition of
+`movsi' to do something appropriate when the source operand contains a
+symbolic address.  You may also need to alter the handling of switch
+statements so that they use relative addresses.
+
+ -- Macro: PIC_OFFSET_TABLE_REGNUM
+     The register number of the register used to address a table of
+     static data addresses in memory.  In some cases this register is
+     defined by a processor's "application binary interface" (ABI).
+     When this macro is defined, RTL is generated for this register
+     once, as with the stack pointer and frame pointer registers.  If
+     this macro is not defined, it is up to the machine-dependent files
+     to allocate such a register (if necessary).  Note that this
+     register must be fixed when in use (e.g.  when `flag_pic' is true).
+
+ -- Macro: PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
+     Define this macro if the register defined by
+     `PIC_OFFSET_TABLE_REGNUM' is clobbered by calls.  Do not define
+     this macro if `PIC_OFFSET_TABLE_REGNUM' is not defined.
+
+ -- Macro: LEGITIMATE_PIC_OPERAND_P (X)
+     A C expression that is nonzero if X is a legitimate immediate
+     operand on the target machine when generating position independent
+     code.  You can assume that X satisfies `CONSTANT_P', so you need
+     not check this.  You can also assume FLAG_PIC is true, so you need
+     not check it either.  You need not define this macro if all
+     constants (including `SYMBOL_REF') can be immediate operands when
+     generating position independent code.
+
+
+File: gccint.info,  Node: Assembler Format,  Next: Debugging Info,  Prev: PIC,  Up: Target Macros
+
+17.21 Defining the Output Assembler Language
+============================================
+
+This section describes macros whose principal purpose is to describe how
+to write instructions in assembler language--rather than what the
+instructions do.
+
+* Menu:
+
+* File Framework::       Structural information for the assembler file.
+* Data Output::          Output of constants (numbers, strings, addresses).
+* Uninitialized Data::   Output of uninitialized variables.
+* Label Output::         Output and generation of labels.
+* Initialization::       General principles of initialization
+                         and termination routines.
+* Macros for Initialization::
+                         Specific macros that control the handling of
+                         initialization and termination routines.
+* Instruction Output::   Output of actual instructions.
+* Dispatch Tables::      Output of jump tables.
+* Exception Region Output:: Output of exception region code.
+* Alignment Output::     Pseudo ops for alignment and skipping data.
+
+
+File: gccint.info,  Node: File Framework,  Next: Data Output,  Up: Assembler Format
+
+17.21.1 The Overall Framework of an Assembler File
+--------------------------------------------------
+
+This describes the overall framework of an assembly file.
+
+ -- Target Hook: void TARGET_ASM_FILE_START (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the beginning of a file.  The default behavior is
+     controlled by two flags, documented below.  Unless your target's
+     assembler is quite unusual, if you override the default, you
+     should call `default_file_start' at some point in your target
+     hook.  This lets other target files rely on these variables.
+
+ -- Target Hook: bool TARGET_ASM_FILE_START_APP_OFF
+     If this flag is true, the text of the macro `ASM_APP_OFF' will be
+     printed as the very first line in the assembly file, unless
+     `-fverbose-asm' is in effect.  (If that macro has been defined to
+     the empty string, this variable has no effect.)  With the normal
+     definition of `ASM_APP_OFF', the effect is to notify the GNU
+     assembler that it need not bother stripping comments or extra
+     whitespace from its input.  This allows it to work a bit faster.
+
+     The default is false.  You should not set it to true unless you
+     have verified that your port does not generate any extra
+     whitespace or comments that will cause GAS to issue errors in
+     NO_APP mode.
+
+ -- Target Hook: bool TARGET_ASM_FILE_START_FILE_DIRECTIVE
+     If this flag is true, `output_file_directive' will be called for
+     the primary source file, immediately after printing `ASM_APP_OFF'
+     (if that is enabled).  Most ELF assemblers expect this to be done.
+     The default is false.
+
+ -- Target Hook: void TARGET_ASM_FILE_END (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the end of a file.  The default is to output nothing.
+
+ -- Function: void file_end_indicate_exec_stack ()
+     Some systems use a common convention, the `.note.GNU-stack'
+     special section, to indicate whether or not an object file relies
+     on the stack being executable.  If your system uses this
+     convention, you should define `TARGET_ASM_FILE_END' to this
+     function.  If you need to do other things in that hook, have your
+     hook function call this function.
+
+ -- Target Hook: void TARGET_ASM_LTO_START (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the start of an LTO section.  The default is to output
+     nothing.
+
+ -- Target Hook: void TARGET_ASM_LTO_END (void)
+     Output to `asm_out_file' any text which the assembler expects to
+     find at the end of an LTO section.  The default is to output
+     nothing.
+
+ -- Target Hook: void TARGET_ASM_CODE_END (void)
+     Output to `asm_out_file' any text which is needed before emitting
+     unwind info and debug info at the end of a file.  Some targets emit
+     here PIC setup thunks that cannot be emitted at the end of file,
+     because they couldn't have unwind info then.  The default is to
+     output nothing.
+
+ -- Macro: ASM_COMMENT_START
+     A C string constant describing how to begin a comment in the target
+     assembler language.  The compiler assumes that the comment will
+     end at the end of the line.
+
+ -- Macro: ASM_APP_ON
+     A C string constant for text to be output before each `asm'
+     statement or group of consecutive ones.  Normally this is
+     `"#APP"', which is a comment that has no effect on most assemblers
+     but tells the GNU assembler that it must check the lines that
+     follow for all valid assembler constructs.
+
+ -- Macro: ASM_APP_OFF
+     A C string constant for text to be output after each `asm'
+     statement or group of consecutive ones.  Normally this is
+     `"#NO_APP"', which tells the GNU assembler to resume making the
+     time-saving assumptions that are valid for ordinary compiler
+     output.
+
+ -- Macro: ASM_OUTPUT_SOURCE_FILENAME (STREAM, NAME)
+     A C statement to output COFF information or DWARF debugging
+     information which indicates that filename NAME is the current
+     source file to the stdio stream STREAM.
+
+     This macro need not be defined if the standard form of output for
+     the file format in use is appropriate.
+
+ -- Macro: OUTPUT_QUOTED_STRING (STREAM, STRING)
+     A C statement to output the string STRING to the stdio stream
+     STREAM.  If you do not call the function `output_quoted_string' in
+     your config files, GCC will only call it to output filenames to
+     the assembler source.  So you can use it to canonicalize the format
+     of the filename using this macro.
+
+ -- Macro: ASM_OUTPUT_IDENT (STREAM, STRING)
+     A C statement to output something to the assembler file to handle a
+     `#ident' directive containing the text STRING.  If this macro is
+     not defined, nothing is output for a `#ident' directive.
+
+ -- Target Hook: void TARGET_ASM_NAMED_SECTION (const char *NAME,
+          unsigned int FLAGS, tree DECL)
+     Output assembly directives to switch to section NAME.  The section
+     should have attributes as specified by FLAGS, which is a bit mask
+     of the `SECTION_*' flags defined in `output.h'.  If DECL is
+     non-NULL, it is the `VAR_DECL' or `FUNCTION_DECL' with which this
+     section is associated.
+
+ -- Target Hook: bool TARGET_HAVE_NAMED_SECTIONS
+     This flag is true if the target supports
+     `TARGET_ASM_NAMED_SECTION'.
+
+ -- Target Hook: bool TARGET_HAVE_SWITCHABLE_BSS_SECTIONS
+     This flag is true if we can create zeroed data by switching to a
+     BSS section and then using `ASM_OUTPUT_SKIP' to allocate the space.
+     This is true on most ELF targets.
+
+ -- Target Hook: unsigned int TARGET_SECTION_TYPE_FLAGS (tree DECL,
+          const char *NAME, int RELOC)
+     Choose a set of section attributes for use by
+     `TARGET_ASM_NAMED_SECTION' based on a variable or function decl, a
+     section name, and whether or not the declaration's initializer may
+     contain runtime relocations.  DECL may be null, in which case
+     read-write data should be assumed.
+
+     The default version of this function handles choosing code vs data,
+     read-only vs read-write data, and `flag_pic'.  You should only
+     need to override this if your target has special flags that might
+     be set via `__attribute__'.
+
+ -- Target Hook: int TARGET_ASM_RECORD_GCC_SWITCHES (print_switch_type
+          TYPE, const char *TEXT)
+     Provides the target with the ability to record the gcc command line
+     switches that have been passed to the compiler, and options that
+     are enabled.  The TYPE argument specifies what is being recorded.
+     It can take the following values:
+
+    `SWITCH_TYPE_PASSED'
+          TEXT is a command line switch that has been set by the user.
+
+    `SWITCH_TYPE_ENABLED'
+          TEXT is an option which has been enabled.  This might be as a
+          direct result of a command line switch, or because it is
+          enabled by default or because it has been enabled as a side
+          effect of a different command line switch.  For example, the
+          `-O2' switch enables various different individual
+          optimization passes.
+
+    `SWITCH_TYPE_DESCRIPTIVE'
+          TEXT is either NULL or some descriptive text which should be
+          ignored.  If TEXT is NULL then it is being used to warn the
+          target hook that either recording is starting or ending.  The
+          first time TYPE is SWITCH_TYPE_DESCRIPTIVE and TEXT is NULL,
+          the warning is for start up and the second time the warning
+          is for wind down.  This feature is to allow the target hook
+          to make any necessary preparations before it starts to record
+          switches and to perform any necessary tidying up after it has
+          finished recording switches.
+
+    `SWITCH_TYPE_LINE_START'
+          This option can be ignored by this target hook.
+
+    `SWITCH_TYPE_LINE_END'
+          This option can be ignored by this target hook.
+
+     The hook's return value must be zero.  Other return values may be
+     supported in the future.
+
+     By default this hook is set to NULL, but an example implementation
+     is provided for ELF based targets.  Called ELF_RECORD_GCC_SWITCHES,
+     it records the switches as ASCII text inside a new, string
+     mergeable section in the assembler output file.  The name of the
+     new section is provided by the
+     `TARGET_ASM_RECORD_GCC_SWITCHES_SECTION' target hook.
+
+ -- Target Hook: const char * TARGET_ASM_RECORD_GCC_SWITCHES_SECTION
+     This is the name of the section that will be created by the example
+     ELF implementation of the `TARGET_ASM_RECORD_GCC_SWITCHES' target
+     hook.
+
+
+File: gccint.info,  Node: Data Output,  Next: Uninitialized Data,  Prev: File Framework,  Up: Assembler Format
+
+17.21.2 Output of Data
+----------------------
+
+ -- Target Hook: const char * TARGET_ASM_BYTE_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_HI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_SI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_DI_OP
+ -- Target Hook: const char * TARGET_ASM_ALIGNED_TI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_HI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_SI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_DI_OP
+ -- Target Hook: const char * TARGET_ASM_UNALIGNED_TI_OP
+     These hooks specify assembly directives for creating certain kinds
+     of integer object.  The `TARGET_ASM_BYTE_OP' directive creates a
+     byte-sized object, the `TARGET_ASM_ALIGNED_HI_OP' one creates an
+     aligned two-byte object, and so on.  Any of the hooks may be
+     `NULL', indicating that no suitable directive is available.
+
+     The compiler will print these strings at the start of a new line,
+     followed immediately by the object's initial value.  In most cases,
+     the string should contain a tab, a pseudo-op, and then another tab.
+
+ -- Target Hook: bool TARGET_ASM_INTEGER (rtx X, unsigned int SIZE, int
+          ALIGNED_P)
+     The `assemble_integer' function uses this hook to output an
+     integer object.  X is the object's value, SIZE is its size in
+     bytes and ALIGNED_P indicates whether it is aligned.  The function
+     should return `true' if it was able to output the object.  If it
+     returns false, `assemble_integer' will try to split the object
+     into smaller parts.
+
+     The default implementation of this hook will use the
+     `TARGET_ASM_BYTE_OP' family of strings, returning `false' when the
+     relevant string is `NULL'.
+
+ -- Macro: OUTPUT_ADDR_CONST_EXTRA (STREAM, X, FAIL)
+     A C statement to recognize RTX patterns that `output_addr_const'
+     can't deal with, and output assembly code to STREAM corresponding
+     to the pattern X.  This may be used to allow machine-dependent
+     `UNSPEC's to appear within constants.
+
+     If `OUTPUT_ADDR_CONST_EXTRA' fails to recognize a pattern, it must
+     `goto fail', so that a standard error message is printed.  If it
+     prints an error message itself, by calling, for example,
+     `output_operand_lossage', it may just complete normally.
+
+ -- Macro: ASM_OUTPUT_ASCII (STREAM, PTR, LEN)
+     A C statement to output to the stdio stream STREAM an assembler
+     instruction to assemble a string constant containing the LEN bytes
+     at PTR.  PTR will be a C expression of type `char *' and LEN a C
+     expression of type `int'.
+
+     If the assembler has a `.ascii' pseudo-op as found in the Berkeley
+     Unix assembler, do not define the macro `ASM_OUTPUT_ASCII'.
+
+ -- Macro: ASM_OUTPUT_FDESC (STREAM, DECL, N)
+     A C statement to output word N of a function descriptor for DECL.
+     This must be defined if `TARGET_VTABLE_USES_DESCRIPTORS' is
+     defined, and is otherwise unused.
+
+ -- Macro: CONSTANT_POOL_BEFORE_FUNCTION
+     You may define this macro as a C expression.  You should define the
+     expression to have a nonzero value if GCC should output the
+     constant pool for a function before the code for the function, or
+     a zero value if GCC should output the constant pool after the
+     function.  If you do not define this macro, the usual case, GCC
+     will output the constant pool before the function.
+
+ -- Macro: ASM_OUTPUT_POOL_PROLOGUE (FILE, FUNNAME, FUNDECL, SIZE)
+     A C statement to output assembler commands to define the start of
+     the constant pool for a function.  FUNNAME is a string giving the
+     name of the function.  Should the return type of the function be
+     required, it can be obtained via FUNDECL.  SIZE is the size, in
+     bytes, of the constant pool that will be written immediately after
+     this call.
+
+     If no constant-pool prefix is required, the usual case, this macro
+     need not be defined.
+
+ -- Macro: ASM_OUTPUT_SPECIAL_POOL_ENTRY (FILE, X, MODE, ALIGN,
+          LABELNO, JUMPTO)
+     A C statement (with or without semicolon) to output a constant in
+     the constant pool, if it needs special treatment.  (This macro
+     need not do anything for RTL expressions that can be output
+     normally.)
+
+     The argument FILE is the standard I/O stream to output the
+     assembler code on.  X is the RTL expression for the constant to
+     output, and MODE is the machine mode (in case X is a `const_int').
+     ALIGN is the required alignment for the value X; you should output
+     an assembler directive to force this much alignment.
+
+     The argument LABELNO is a number to use in an internal label for
+     the address of this pool entry.  The definition of this macro is
+     responsible for outputting the label definition at the proper
+     place.  Here is how to do this:
+
+          `(*targetm.asm_out.internal_label)' (FILE, "LC", LABELNO);
+
+     When you output a pool entry specially, you should end with a
+     `goto' to the label JUMPTO.  This will prevent the same pool entry
+     from being output a second time in the usual manner.
+
+     You need not define this macro if it would do nothing.
+
+ -- Macro: ASM_OUTPUT_POOL_EPILOGUE (FILE FUNNAME FUNDECL SIZE)
+     A C statement to output assembler commands to at the end of the
+     constant pool for a function.  FUNNAME is a string giving the name
+     of the function.  Should the return type of the function be
+     required, you can obtain it via FUNDECL.  SIZE is the size, in
+     bytes, of the constant pool that GCC wrote immediately before this
+     call.
+
+     If no constant-pool epilogue is required, the usual case, you need
+     not define this macro.
+
+ -- Macro: IS_ASM_LOGICAL_LINE_SEPARATOR (C, STR)
+     Define this macro as a C expression which is nonzero if C is used
+     as a logical line separator by the assembler.  STR points to the
+     position in the string where C was found; this can be used if a
+     line separator uses multiple characters.
+
+     If you do not define this macro, the default is that only the
+     character `;' is treated as a logical line separator.
+
+ -- Target Hook: const char * TARGET_ASM_OPEN_PAREN
+ -- Target Hook: const char * TARGET_ASM_CLOSE_PAREN
+     These target hooks are C string constants, describing the syntax
+     in the assembler for grouping arithmetic expressions.  If not
+     overridden, they default to normal parentheses, which is correct
+     for most assemblers.
+
+ These macros are provided by `real.h' for writing the definitions of
+`ASM_OUTPUT_DOUBLE' and the like:
+
+ -- Macro: REAL_VALUE_TO_TARGET_SINGLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DOUBLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_LONG_DOUBLE (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL32 (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL64 (X, L)
+ -- Macro: REAL_VALUE_TO_TARGET_DECIMAL128 (X, L)
+     These translate X, of type `REAL_VALUE_TYPE', to the target's
+     floating point representation, and store its bit pattern in the
+     variable L.  For `REAL_VALUE_TO_TARGET_SINGLE' and
+     `REAL_VALUE_TO_TARGET_DECIMAL32', this variable should be a simple
+     `long int'.  For the others, it should be an array of `long int'.
+     The number of elements in this array is determined by the size of
+     the desired target floating point data type: 32 bits of it go in
+     each `long int' array element.  Each array element holds 32 bits
+     of the result, even if `long int' is wider than 32 bits on the
+     host machine.
+
+     The array element values are designed so that you can print them
+     out using `fprintf' in the order they should appear in the target
+     machine's memory.
+
+
+File: gccint.info,  Node: Uninitialized Data,  Next: Label Output,  Prev: Data Output,  Up: Assembler Format
+
+17.21.3 Output of Uninitialized Variables
+-----------------------------------------
+
+Each of the macros in this section is used to do the whole job of
+outputting a single uninitialized variable.
+
+ -- Macro: ASM_OUTPUT_COMMON (STREAM, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a common-label named NAME whose
+     size is SIZE bytes.  The variable ROUNDED is the size rounded up
+     to whatever alignment the caller wants.  It is possible that SIZE
+     may be zero, for instance if a struct with no other member than a
+     zero-length array is defined.  In this case, the backend must
+     output a symbol definition that allocates at least one byte, both
+     so that the address of the resulting object does not compare equal
+     to any other, and because some object formats cannot even express
+     the concept of a zero-sized common symbol, as that is how they
+     represent an ordinary undefined external.
+
+     Use the expression `assemble_name (STREAM, NAME)' to output the
+     name itself; before and after that, output the additional
+     assembler syntax for defining the name, and a newline.
+
+     This macro controls how the assembler definitions of uninitialized
+     common global variables are output.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_COMMON (STREAM, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_COMMON' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_COMMON', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_DECL_COMMON (STREAM, DECL, NAME, SIZE,
+          ALIGNMENT)
+     Like `ASM_OUTPUT_ALIGNED_COMMON' except that DECL of the variable
+     to be output, if there is one, or `NULL_TREE' if there is no
+     corresponding variable.  If you define this macro, GCC will use it
+     in place of both `ASM_OUTPUT_COMMON' and
+     `ASM_OUTPUT_ALIGNED_COMMON'.  Define this macro when you need to
+     see the variable's decl in order to chose what to output.
+
+ -- Macro: ASM_OUTPUT_BSS (STREAM, DECL, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of uninitialized global DECL named
+     NAME whose size is SIZE bytes.  The variable ROUNDED is the size
+     rounded up to whatever alignment the caller wants.
+
+     Try to use function `asm_output_bss' defined in `varasm.c' when
+     defining this macro.  If unable, use the expression `assemble_name
+     (STREAM, NAME)' to output the name itself; before and after that,
+     output the additional assembler syntax for defining the name, and
+     a newline.
+
+     There are two ways of handling global BSS.  One is to define either
+     this macro or its aligned counterpart, `ASM_OUTPUT_ALIGNED_BSS'.
+     The other is to have `TARGET_ASM_SELECT_SECTION' return a
+     switchable BSS section (*note
+     TARGET_HAVE_SWITCHABLE_BSS_SECTIONS::).  You do not need to do
+     both.
+
+     Some languages do not have `common' data, and require a non-common
+     form of global BSS in order to handle uninitialized globals
+     efficiently.  C++ is one example of this.  However, if the target
+     does not support global BSS, the front end may choose to make
+     globals common in order to save space in the object file.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_BSS (STREAM, DECL, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_BSS' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_BSS', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+     Try to use function `asm_output_aligned_bss' defined in file
+     `varasm.c' when defining this macro.
+
+ -- Macro: ASM_OUTPUT_LOCAL (STREAM, NAME, SIZE, ROUNDED)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a local-common-label named NAME
+     whose size is SIZE bytes.  The variable ROUNDED is the size
+     rounded up to whatever alignment the caller wants.
+
+     Use the expression `assemble_name (STREAM, NAME)' to output the
+     name itself; before and after that, output the additional
+     assembler syntax for defining the name, and a newline.
+
+     This macro controls how the assembler definitions of uninitialized
+     static variables are output.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_LOCAL (STREAM, NAME, SIZE, ALIGNMENT)
+     Like `ASM_OUTPUT_LOCAL' except takes the required alignment as a
+     separate, explicit argument.  If you define this macro, it is used
+     in place of `ASM_OUTPUT_LOCAL', and gives you more flexibility in
+     handling the required alignment of the variable.  The alignment is
+     specified as the number of bits.
+
+ -- Macro: ASM_OUTPUT_ALIGNED_DECL_LOCAL (STREAM, DECL, NAME, SIZE,
+          ALIGNMENT)
+     Like `ASM_OUTPUT_ALIGNED_DECL' except that DECL of the variable to
+     be output, if there is one, or `NULL_TREE' if there is no
+     corresponding variable.  If you define this macro, GCC will use it
+     in place of both `ASM_OUTPUT_DECL' and `ASM_OUTPUT_ALIGNED_DECL'.
+     Define this macro when you need to see the variable's decl in
+     order to chose what to output.
+
+
+File: gccint.info,  Node: Label Output,  Next: Initialization,  Prev: Uninitialized Data,  Up: Assembler Format
+
+17.21.4 Output and Generation of Labels
+---------------------------------------
+
+This is about outputting labels.
+
+ -- Macro: ASM_OUTPUT_LABEL (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM the assembler definition of a label named NAME.  Use the
+     expression `assemble_name (STREAM, NAME)' to output the name
+     itself; before and after that, output the additional assembler
+     syntax for defining the name, and a newline.  A default definition
+     of this macro is provided which is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_INTERNAL_LABEL (STREAM, NAME)
+     Identical to `ASM_OUTPUT_LABEL', except that NAME is known to
+     refer to a compiler-generated label.  The default definition uses
+     `assemble_name_raw', which is like `assemble_name' except that it
+     is more efficient.
+
+ -- Macro: SIZE_ASM_OP
+     A C string containing the appropriate assembler directive to
+     specify the size of a symbol, without any arguments.  On systems
+     that use ELF, the default (in `config/elfos.h') is `"\t.size\t"';
+     on other systems, the default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definitions of `ASM_OUTPUT_SIZE_DIRECTIVE' and
+     `ASM_OUTPUT_MEASURED_SIZE' for your system.  If you need your own
+     custom definitions of those macros, or if you do not need explicit
+     symbol sizes at all, do not define this macro.
+
+ -- Macro: ASM_OUTPUT_SIZE_DIRECTIVE (STREAM, NAME, SIZE)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler that the size of the
+     symbol NAME is SIZE.  SIZE is a `HOST_WIDE_INT'.  If you define
+     `SIZE_ASM_OP', a default definition of this macro is provided.
+
+ -- Macro: ASM_OUTPUT_MEASURED_SIZE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler to calculate the size of
+     the symbol NAME by subtracting its address from the current
+     address.
+
+     If you define `SIZE_ASM_OP', a default definition of this macro is
+     provided.  The default assumes that the assembler recognizes a
+     special `.' symbol as referring to the current address, and can
+     calculate the difference between this and another symbol.  If your
+     assembler does not recognize `.' or cannot do calculations with
+     it, you will need to redefine `ASM_OUTPUT_MEASURED_SIZE' to use
+     some other technique.
+
+ -- Macro: TYPE_ASM_OP
+     A C string containing the appropriate assembler directive to
+     specify the type of a symbol, without any arguments.  On systems
+     that use ELF, the default (in `config/elfos.h') is `"\t.type\t"';
+     on other systems, the default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definition of `ASM_OUTPUT_TYPE_DIRECTIVE' for your system.  If you
+     need your own custom definition of this macro, or if you do not
+     need explicit symbol types at all, do not define this macro.
+
+ -- Macro: TYPE_OPERAND_FMT
+     A C string which specifies (using `printf' syntax) the format of
+     the second operand to `TYPE_ASM_OP'.  On systems that use ELF, the
+     default (in `config/elfos.h') is `"@%s"'; on other systems, the
+     default is not to define this macro.
+
+     Define this macro only if it is correct to use the default
+     definition of `ASM_OUTPUT_TYPE_DIRECTIVE' for your system.  If you
+     need your own custom definition of this macro, or if you do not
+     need explicit symbol types at all, do not define this macro.
+
+ -- Macro: ASM_OUTPUT_TYPE_DIRECTIVE (STREAM, TYPE)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a directive telling the assembler that the type of the
+     symbol NAME is TYPE.  TYPE is a C string; currently, that string
+     is always either `"function"' or `"object"', but you should not
+     count on this.
+
+     If you define `TYPE_ASM_OP' and `TYPE_OPERAND_FMT', a default
+     definition of this macro is provided.
+
+ -- Macro: ASM_DECLARE_FUNCTION_NAME (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name NAME of a
+     function which is being defined.  This macro is responsible for
+     outputting the label definition (perhaps using
+     `ASM_OUTPUT_LABEL').  The argument DECL is the `FUNCTION_DECL'
+     tree node representing the function.
+
+     If this macro is not defined, then the function name is defined in
+     the usual manner as a label (by means of `ASM_OUTPUT_LABEL').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' in the definition
+     of this macro.
+
+ -- Macro: ASM_DECLARE_FUNCTION_SIZE (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the size of a function
+     which is being defined.  The argument NAME is the name of the
+     function.  The argument DECL is the `FUNCTION_DECL' tree node
+     representing the function.
+
+     If this macro is not defined, then the function size is not
+     defined.
+
+     You may wish to use `ASM_OUTPUT_MEASURED_SIZE' in the definition
+     of this macro.
+
+ -- Macro: ASM_DECLARE_OBJECT_NAME (STREAM, NAME, DECL)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name NAME of an
+     initialized variable which is being defined.  This macro must
+     output the label definition (perhaps using `ASM_OUTPUT_LABEL').
+     The argument DECL is the `VAR_DECL' tree node representing the
+     variable.
+
+     If this macro is not defined, then the variable name is defined in
+     the usual manner as a label (by means of `ASM_OUTPUT_LABEL').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' and/or
+     `ASM_OUTPUT_SIZE_DIRECTIVE' in the definition of this macro.
+
+ -- Macro: ASM_DECLARE_CONSTANT_NAME (STREAM, NAME, EXP, SIZE)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name NAME of a
+     constant which is being defined.  This macro is responsible for
+     outputting the label definition (perhaps using
+     `ASM_OUTPUT_LABEL').  The argument EXP is the value of the
+     constant, and SIZE is the size of the constant in bytes.  NAME
+     will be an internal label.
+
+     If this macro is not defined, then the NAME is defined in the
+     usual manner as a label (by means of `ASM_OUTPUT_LABEL').
+
+     You may wish to use `ASM_OUTPUT_TYPE_DIRECTIVE' in the definition
+     of this macro.
+
+ -- Macro: ASM_DECLARE_REGISTER_GLOBAL (STREAM, DECL, REGNO, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for claiming a register REGNO for a
+     global variable DECL with name NAME.
+
+     If you don't define this macro, that is equivalent to defining it
+     to do nothing.
+
+ -- Macro: ASM_FINISH_DECLARE_OBJECT (STREAM, DECL, TOPLEVEL, ATEND)
+     A C statement (sans semicolon) to finish up declaring a variable
+     name once the compiler has processed its initializer fully and
+     thus has had a chance to determine the size of an array when
+     controlled by an initializer.  This is used on systems where it's
+     necessary to declare something about the size of the object.
+
+     If you don't define this macro, that is equivalent to defining it
+     to do nothing.
+
+     You may wish to use `ASM_OUTPUT_SIZE_DIRECTIVE' and/or
+     `ASM_OUTPUT_MEASURED_SIZE' in the definition of this macro.
+
+ -- Target Hook: void TARGET_ASM_GLOBALIZE_LABEL (FILE *STREAM, const
+          char *NAME)
+     This target hook is a function to output to the stdio stream
+     STREAM some commands that will make the label NAME global; that
+     is, available for reference from other files.
+
+     The default implementation relies on a proper definition of
+     `GLOBAL_ASM_OP'.
+
+ -- Target Hook: void TARGET_ASM_GLOBALIZE_DECL_NAME (FILE *STREAM,
+          tree DECL)
+     This target hook is a function to output to the stdio stream
+     STREAM some commands that will make the name associated with DECL
+     global; that is, available for reference from other files.
+
+     The default implementation uses the TARGET_ASM_GLOBALIZE_LABEL
+     target hook.
+
+ -- Macro: ASM_WEAKEN_LABEL (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM some commands that will make the label NAME weak; that is,
+     available for reference from other files but only used if no other
+     definition is available.  Use the expression `assemble_name
+     (STREAM, NAME)' to output the name itself; before and after that,
+     output the additional assembler syntax for making that name weak,
+     and a newline.
+
+     If you don't define this macro or `ASM_WEAKEN_DECL', GCC will not
+     support weak symbols and you should not define the `SUPPORTS_WEAK'
+     macro.
+
+ -- Macro: ASM_WEAKEN_DECL (STREAM, DECL, NAME, VALUE)
+     Combines (and replaces) the function of `ASM_WEAKEN_LABEL' and
+     `ASM_OUTPUT_WEAK_ALIAS', allowing access to the associated function
+     or variable decl.  If VALUE is not `NULL', this C statement should
+     output to the stdio stream STREAM assembler code which defines
+     (equates) the weak symbol NAME to have the value VALUE.  If VALUE
+     is `NULL', it should output commands to make NAME weak.
+
+ -- Macro: ASM_OUTPUT_WEAKREF (STREAM, DECL, NAME, VALUE)
+     Outputs a directive that enables NAME to be used to refer to
+     symbol VALUE with weak-symbol semantics.  `decl' is the
+     declaration of `name'.
+
+ -- Macro: SUPPORTS_WEAK
+     A C expression which evaluates to true if the target supports weak
+     symbols.
+
+     If you don't define this macro, `defaults.h' provides a default
+     definition.  If either `ASM_WEAKEN_LABEL' or `ASM_WEAKEN_DECL' is
+     defined, the default definition is `1'; otherwise, it is `0'.
+     Define this macro if you want to control weak symbol support with
+     a compiler flag such as `-melf'.
+
+ -- Macro: MAKE_DECL_ONE_ONLY (DECL)
+     A C statement (sans semicolon) to mark DECL to be emitted as a
+     public symbol such that extra copies in multiple translation units
+     will be discarded by the linker.  Define this macro if your object
+     file format provides support for this concept, such as the `COMDAT'
+     section flags in the Microsoft Windows PE/COFF format, and this
+     support requires changes to DECL, such as putting it in a separate
+     section.
+
+ -- Macro: SUPPORTS_ONE_ONLY
+     A C expression which evaluates to true if the target supports
+     one-only semantics.
+
+     If you don't define this macro, `varasm.c' provides a default
+     definition.  If `MAKE_DECL_ONE_ONLY' is defined, the default
+     definition is `1'; otherwise, it is `0'.  Define this macro if you
+     want to control one-only symbol support with a compiler flag, or if
+     setting the `DECL_ONE_ONLY' flag is enough to mark a declaration to
+     be emitted as one-only.
+
+ -- Target Hook: void TARGET_ASM_ASSEMBLE_VISIBILITY (tree DECL, int
+          VISIBILITY)
+     This target hook is a function to output to ASM_OUT_FILE some
+     commands that will make the symbol(s) associated with DECL have
+     hidden, protected or internal visibility as specified by
+     VISIBILITY.
+
+ -- Macro: TARGET_WEAK_NOT_IN_ARCHIVE_TOC
+     A C expression that evaluates to true if the target's linker
+     expects that weak symbols do not appear in a static archive's
+     table of contents.  The default is `0'.
+
+     Leaving weak symbols out of an archive's table of contents means
+     that, if a symbol will only have a definition in one translation
+     unit and will have undefined references from other translation
+     units, that symbol should not be weak.  Defining this macro to be
+     nonzero will thus have the effect that certain symbols that would
+     normally be weak (explicit template instantiations, and vtables
+     for polymorphic classes with noninline key methods) will instead
+     be nonweak.
+
+     The C++ ABI requires this macro to be zero.  Define this macro for
+     targets where full C++ ABI compliance is impossible and where
+     linker restrictions require weak symbols to be left out of a
+     static archive's table of contents.
+
+ -- Macro: ASM_OUTPUT_EXTERNAL (STREAM, DECL, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM any text necessary for declaring the name of an external
+     symbol named NAME which is referenced in this compilation but not
+     defined.  The value of DECL is the tree node for the declaration.
+
+     This macro need not be defined if it does not need to output
+     anything.  The GNU assembler and most Unix assemblers don't
+     require anything.
+
+ -- Target Hook: void TARGET_ASM_EXTERNAL_LIBCALL (rtx SYMREF)
+     This target hook is a function to output to ASM_OUT_FILE an
+     assembler pseudo-op to declare a library function name external.
+     The name of the library function is given by SYMREF, which is a
+     `symbol_ref'.
+
+ -- Target Hook: void TARGET_ASM_MARK_DECL_PRESERVED (const char
+          *SYMBOL)
+     This target hook is a function to output to ASM_OUT_FILE an
+     assembler directive to annotate SYMBOL as used.  The Darwin target
+     uses the .no_dead_code_strip directive.
+
+ -- Macro: ASM_OUTPUT_LABELREF (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM a reference in assembler syntax to a label named NAME.
+     This should add `_' to the front of the name, if that is customary
+     on your operating system, as it is in most Berkeley Unix systems.
+     This macro is used in `assemble_name'.
+
+ -- Macro: ASM_OUTPUT_SYMBOL_REF (STREAM, SYM)
+     A C statement (sans semicolon) to output a reference to
+     `SYMBOL_REF' SYM.  If not defined, `assemble_name' will be used to
+     output the name of the symbol.  This macro may be used to modify
+     the way a symbol is referenced depending on information encoded by
+     `TARGET_ENCODE_SECTION_INFO'.
+
+ -- Macro: ASM_OUTPUT_LABEL_REF (STREAM, BUF)
+     A C statement (sans semicolon) to output a reference to BUF, the
+     result of `ASM_GENERATE_INTERNAL_LABEL'.  If not defined,
+     `assemble_name' will be used to output the name of the symbol.
+     This macro is not used by `output_asm_label', or the `%l'
+     specifier that calls it; the intention is that this macro should
+     be set when it is necessary to output a label differently when its
+     address is being taken.
+
+ -- Target Hook: void TARGET_ASM_INTERNAL_LABEL (FILE *STREAM, const
+          char *PREFIX, unsigned long LABELNO)
+     A function to output to the stdio stream STREAM a label whose name
+     is made from the string PREFIX and the number LABELNO.
+
+     It is absolutely essential that these labels be distinct from the
+     labels used for user-level functions and variables.  Otherwise,
+     certain programs will have name conflicts with internal labels.
+
+     It is desirable to exclude internal labels from the symbol table
+     of the object file.  Most assemblers have a naming convention for
+     labels that should be excluded; on many systems, the letter `L' at
+     the beginning of a label has this effect.  You should find out what
+     convention your system uses, and follow it.
+
+     The default version of this function utilizes
+     `ASM_GENERATE_INTERNAL_LABEL'.
+
+ -- Macro: ASM_OUTPUT_DEBUG_LABEL (STREAM, PREFIX, NUM)
+     A C statement to output to the stdio stream STREAM a debug info
+     label whose name is made from the string PREFIX and the number
+     NUM.  This is useful for VLIW targets, where debug info labels may
+     need to be treated differently than branch target labels.  On some
+     systems, branch target labels must be at the beginning of
+     instruction bundles, but debug info labels can occur in the middle
+     of instruction bundles.
+
+     If this macro is not defined, then
+     `(*targetm.asm_out.internal_label)' will be used.
+
+ -- Macro: ASM_GENERATE_INTERNAL_LABEL (STRING, PREFIX, NUM)
+     A C statement to store into the string STRING a label whose name
+     is made from the string PREFIX and the number NUM.
+
+     This string, when output subsequently by `assemble_name', should
+     produce the output that `(*targetm.asm_out.internal_label)' would
+     produce with the same PREFIX and NUM.
+
+     If the string begins with `*', then `assemble_name' will output
+     the rest of the string unchanged.  It is often convenient for
+     `ASM_GENERATE_INTERNAL_LABEL' to use `*' in this way.  If the
+     string doesn't start with `*', then `ASM_OUTPUT_LABELREF' gets to
+     output the string, and may change it.  (Of course,
+     `ASM_OUTPUT_LABELREF' is also part of your machine description, so
+     you should know what it does on your machine.)
+
+ -- Macro: ASM_FORMAT_PRIVATE_NAME (OUTVAR, NAME, NUMBER)
+     A C expression to assign to OUTVAR (which is a variable of type
+     `char *') a newly allocated string made from the string NAME and
+     the number NUMBER, with some suitable punctuation added.  Use
+     `alloca' to get space for the string.
+
+     The string will be used as an argument to `ASM_OUTPUT_LABELREF' to
+     produce an assembler label for an internal static variable whose
+     name is NAME.  Therefore, the string must be such as to result in
+     valid assembler code.  The argument NUMBER is different each time
+     this macro is executed; it prevents conflicts between
+     similarly-named internal static variables in different scopes.
+
+     Ideally this string should not be a valid C identifier, to prevent
+     any conflict with the user's own symbols.  Most assemblers allow
+     periods or percent signs in assembler symbols; putting at least
+     one of these between the name and the number will suffice.
+
+     If this macro is not defined, a default definition will be provided
+     which is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_DEF (STREAM, NAME, VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the symbol NAME to have the value VALUE.
+
+     If `SET_ASM_OP' is defined, a default definition is provided which
+     is correct for most systems.
+
+ -- Macro: ASM_OUTPUT_DEF_FROM_DECLS (STREAM, DECL_OF_NAME,
+          DECL_OF_VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the symbol whose tree node is DECL_OF_NAME
+     to have the value of the tree node DECL_OF_VALUE.  This macro will
+     be used in preference to `ASM_OUTPUT_DEF' if it is defined and if
+     the tree nodes are available.
+
+     If `SET_ASM_OP' is defined, a default definition is provided which
+     is correct for most systems.
+
+ -- Macro: TARGET_DEFERRED_OUTPUT_DEFS (DECL_OF_NAME, DECL_OF_VALUE)
+     A C statement that evaluates to true if the assembler code which
+     defines (equates) the symbol whose tree node is DECL_OF_NAME to
+     have the value of the tree node DECL_OF_VALUE should be emitted
+     near the end of the current compilation unit.  The default is to
+     not defer output of defines.  This macro affects defines output by
+     `ASM_OUTPUT_DEF' and `ASM_OUTPUT_DEF_FROM_DECLS'.
+
+ -- Macro: ASM_OUTPUT_WEAK_ALIAS (STREAM, NAME, VALUE)
+     A C statement to output to the stdio stream STREAM assembler code
+     which defines (equates) the weak symbol NAME to have the value
+     VALUE.  If VALUE is `NULL', it defines NAME as an undefined weak
+     symbol.
+
+     Define this macro if the target only supports weak aliases; define
+     `ASM_OUTPUT_DEF' instead if possible.
+
+ -- Macro: OBJC_GEN_METHOD_LABEL (BUF, IS_INST, CLASS_NAME, CAT_NAME,
+          SEL_NAME)
+     Define this macro to override the default assembler names used for
+     Objective-C methods.
+
+     The default name is a unique method number followed by the name of
+     the class (e.g. `_1_Foo').  For methods in categories, the name of
+     the category is also included in the assembler name (e.g.
+     `_1_Foo_Bar').
+
+     These names are safe on most systems, but make debugging difficult
+     since the method's selector is not present in the name.
+     Therefore, particular systems define other ways of computing names.
+
+     BUF is an expression of type `char *' which gives you a buffer in
+     which to store the name; its length is as long as CLASS_NAME,
+     CAT_NAME and SEL_NAME put together, plus 50 characters extra.
+
+     The argument IS_INST specifies whether the method is an instance
+     method or a class method; CLASS_NAME is the name of the class;
+     CAT_NAME is the name of the category (or `NULL' if the method is
+     not in a category); and SEL_NAME is the name of the selector.
+
+     On systems where the assembler can handle quoted names, you can
+     use this macro to provide more human-readable names.
+
+ -- Macro: ASM_DECLARE_CLASS_REFERENCE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM commands to declare that the label NAME is an Objective-C
+     class reference.  This is only needed for targets whose linkers
+     have special support for NeXT-style runtimes.
+
+ -- Macro: ASM_DECLARE_UNRESOLVED_REFERENCE (STREAM, NAME)
+     A C statement (sans semicolon) to output to the stdio stream
+     STREAM commands to declare that the label NAME is an unresolved
+     Objective-C class reference.  This is only needed for targets
+     whose linkers have special support for NeXT-style runtimes.
+
+
+File: gccint.info,  Node: Initialization,  Next: Macros for Initialization,  Prev: Label Output,  Up: Assembler Format
+
+17.21.5 How Initialization Functions Are Handled
+------------------------------------------------
+
+The compiled code for certain languages includes "constructors" (also
+called "initialization routines")--functions to initialize data in the
+program when the program is started.  These functions need to be called
+before the program is "started"--that is to say, before `main' is
+called.
+
+ Compiling some languages generates "destructors" (also called
+"termination routines") that should be called when the program
+terminates.
+
+ To make the initialization and termination functions work, the compiler
+must output something in the assembler code to cause those functions to
+be called at the appropriate time.  When you port the compiler to a new
+system, you need to specify how to do this.
+
+ There are two major ways that GCC currently supports the execution of
+initialization and termination functions.  Each way has two variants.
+Much of the structure is common to all four variations.
+
+ The linker must build two lists of these functions--a list of
+initialization functions, called `__CTOR_LIST__', and a list of
+termination functions, called `__DTOR_LIST__'.
+
+ Each list always begins with an ignored function pointer (which may
+hold 0, -1, or a count of the function pointers after it, depending on
+the environment).  This is followed by a series of zero or more function
+pointers to constructors (or destructors), followed by a function
+pointer containing zero.
+
+ Depending on the operating system and its executable file format,
+either `crtstuff.c' or `libgcc2.c' traverses these lists at startup
+time and exit time.  Constructors are called in reverse order of the
+list; destructors in forward order.
+
+ The best way to handle static constructors works only for object file
+formats which provide arbitrarily-named sections.  A section is set
+aside for a list of constructors, and another for a list of destructors.
+Traditionally these are called `.ctors' and `.dtors'.  Each object file
+that defines an initialization function also puts a word in the
+constructor section to point to that function.  The linker accumulates
+all these words into one contiguous `.ctors' section.  Termination
+functions are handled similarly.
+
+ This method will be chosen as the default by `target-def.h' if
+`TARGET_ASM_NAMED_SECTION' is defined.  A target that does not support
+arbitrary sections, but does support special designated constructor and
+destructor sections may define `CTORS_SECTION_ASM_OP' and
+`DTORS_SECTION_ASM_OP' to achieve the same effect.
+
+ When arbitrary sections are available, there are two variants,
+depending upon how the code in `crtstuff.c' is called.  On systems that
+support a ".init" section which is executed at program startup, parts
+of `crtstuff.c' are compiled into that section.  The program is linked
+by the `gcc' driver like this:
+
+     ld -o OUTPUT_FILE crti.o crtbegin.o ... -lgcc crtend.o crtn.o
+
+ The prologue of a function (`__init') appears in the `.init' section
+of `crti.o'; the epilogue appears in `crtn.o'.  Likewise for the
+function `__fini' in the ".fini" section.  Normally these files are
+provided by the operating system or by the GNU C library, but are
+provided by GCC for a few targets.
+
+ The objects `crtbegin.o' and `crtend.o' are (for most targets)
+compiled from `crtstuff.c'.  They contain, among other things, code
+fragments within the `.init' and `.fini' sections that branch to
+routines in the `.text' section.  The linker will pull all parts of a
+section together, which results in a complete `__init' function that
+invokes the routines we need at startup.
+
+ To use this variant, you must define the `INIT_SECTION_ASM_OP' macro
+properly.
+
+ If no init section is available, when GCC compiles any function called
+`main' (or more accurately, any function designated as a program entry
+point by the language front end calling `expand_main_function'), it
+inserts a procedure call to `__main' as the first executable code after
+the function prologue.  The `__main' function is defined in `libgcc2.c'
+and runs the global constructors.
+
+ In file formats that don't support arbitrary sections, there are again
+two variants.  In the simplest variant, the GNU linker (GNU `ld') and
+an `a.out' format must be used.  In this case, `TARGET_ASM_CONSTRUCTOR'
+is defined to produce a `.stabs' entry of type `N_SETT', referencing
+the name `__CTOR_LIST__', and with the address of the void function
+containing the initialization code as its value.  The GNU linker
+recognizes this as a request to add the value to a "set"; the values
+are accumulated, and are eventually placed in the executable as a
+vector in the format described above, with a leading (ignored) count
+and a trailing zero element.  `TARGET_ASM_DESTRUCTOR' is handled
+similarly.  Since no init section is available, the absence of
+`INIT_SECTION_ASM_OP' causes the compilation of `main' to call `__main'
+as above, starting the initialization process.
+
+ The last variant uses neither arbitrary sections nor the GNU linker.
+This is preferable when you want to do dynamic linking and when using
+file formats which the GNU linker does not support, such as `ECOFF'.  In
+this case, `TARGET_HAVE_CTORS_DTORS' is false, initialization and
+termination functions are recognized simply by their names.  This
+requires an extra program in the linkage step, called `collect2'.  This
+program pretends to be the linker, for use with GCC; it does its job by
+running the ordinary linker, but also arranges to include the vectors of
+initialization and termination functions.  These functions are called
+via `__main' as described above.  In order to use this method,
+`use_collect2' must be defined in the target in `config.gcc'.
+
+ The following section describes the specific macros that control and
+customize the handling of initialization and termination functions.
+
+
+File: gccint.info,  Node: Macros for Initialization,  Next: Instruction Output,  Prev: Initialization,  Up: Assembler Format
+
+17.21.6 Macros Controlling Initialization Routines
+--------------------------------------------------
+
+Here are the macros that control how the compiler handles initialization
+and termination functions:
+
+ -- Macro: INIT_SECTION_ASM_OP
+     If defined, a C string constant, including spacing, for the
+     assembler operation to identify the following data as
+     initialization code.  If not defined, GCC will assume such a
+     section does not exist.  When you are using special sections for
+     initialization and termination functions, this macro also controls
+     how `crtstuff.c' and `libgcc2.c' arrange to run the initialization
+     functions.
+
+ -- Macro: HAS_INIT_SECTION
+     If defined, `main' will not call `__main' as described above.
+     This macro should be defined for systems that control start-up code
+     on a symbol-by-symbol basis, such as OSF/1, and should not be
+     defined explicitly for systems that support `INIT_SECTION_ASM_OP'.
+
+ -- Macro: LD_INIT_SWITCH
+     If defined, a C string constant for a switch that tells the linker
+     that the following symbol is an initialization routine.
+
+ -- Macro: LD_FINI_SWITCH
+     If defined, a C string constant for a switch that tells the linker
+     that the following symbol is a finalization routine.
+
+ -- Macro: COLLECT_SHARED_INIT_FUNC (STREAM, FUNC)
+     If defined, a C statement that will write a function that can be
+     automatically called when a shared library is loaded.  The function
+     should call FUNC, which takes no arguments.  If not defined, and
+     the object format requires an explicit initialization function,
+     then a function called `_GLOBAL__DI' will be generated.
+
+     This function and the following one are used by collect2 when
+     linking a shared library that needs constructors or destructors,
+     or has DWARF2 exception tables embedded in the code.
+
+ -- Macro: COLLECT_SHARED_FINI_FUNC (STREAM, FUNC)
+     If defined, a C statement that will write a function that can be
+     automatically called when a shared library is unloaded.  The
+     function should call FUNC, which takes no arguments.  If not
+     defined, and the object format requires an explicit finalization
+     function, then a function called `_GLOBAL__DD' will be generated.
+
+ -- Macro: INVOKE__main
+     If defined, `main' will call `__main' despite the presence of
+     `INIT_SECTION_ASM_OP'.  This macro should be defined for systems
+     where the init section is not actually run automatically, but is
+     still useful for collecting the lists of constructors and
+     destructors.
+
+ -- Macro: SUPPORTS_INIT_PRIORITY
+     If nonzero, the C++ `init_priority' attribute is supported and the
+     compiler should emit instructions to control the order of
+     initialization of objects.  If zero, the compiler will issue an
+     error message upon encountering an `init_priority' attribute.
+
+ -- Target Hook: bool TARGET_HAVE_CTORS_DTORS
+     This value is true if the target supports some "native" method of
+     collecting constructors and destructors to be run at startup and
+     exit.  It is false if we must use `collect2'.
+
+ -- Target Hook: void TARGET_ASM_CONSTRUCTOR (rtx SYMBOL, int PRIORITY)
+     If defined, a function that outputs assembler code to arrange to
+     call the function referenced by SYMBOL at initialization time.
+
+     Assume that SYMBOL is a `SYMBOL_REF' for a function taking no
+     arguments and with no return value.  If the target supports
+     initialization priorities, PRIORITY is a value between 0 and
+     `MAX_INIT_PRIORITY'; otherwise it must be `DEFAULT_INIT_PRIORITY'.
+
+     If this macro is not defined by the target, a suitable default will
+     be chosen if (1) the target supports arbitrary section names, (2)
+     the target defines `CTORS_SECTION_ASM_OP', or (3) `USE_COLLECT2'
+     is not defined.
+
+ -- Target Hook: void TARGET_ASM_DESTRUCTOR (rtx SYMBOL, int PRIORITY)
+     This is like `TARGET_ASM_CONSTRUCTOR' but used for termination
+     functions rather than initialization functions.
+
+ If `TARGET_HAVE_CTORS_DTORS' is true, the initialization routine
+generated for the generated object file will have static linkage.
+
+ If your system uses `collect2' as the means of processing
+constructors, then that program normally uses `nm' to scan an object
+file for constructor functions to be called.
+
+ On certain kinds of systems, you can define this macro to make
+`collect2' work faster (and, in some cases, make it work at all):
+
+ -- Macro: OBJECT_FORMAT_COFF
+     Define this macro if the system uses COFF (Common Object File
+     Format) object files, so that `collect2' can assume this format
+     and scan object files directly for dynamic constructor/destructor
+     functions.
+
+     This macro is effective only in a native compiler; `collect2' as
+     part of a cross compiler always uses `nm' for the target machine.
+
+ -- Macro: REAL_NM_FILE_NAME
+     Define this macro as a C string constant containing the file name
+     to use to execute `nm'.  The default is to search the path
+     normally for `nm'.
+
+     If your system supports shared libraries and has a program to list
+     the dynamic dependencies of a given library or executable, you can
+     define these macros to enable support for running initialization
+     and termination functions in shared libraries:
+
+ -- Macro: LDD_SUFFIX
+     Define this macro to a C string constant containing the name of
+     the program which lists dynamic dependencies, like `"ldd"' under
+     SunOS 4.
+
+ -- Macro: PARSE_LDD_OUTPUT (PTR)
+     Define this macro to be C code that extracts filenames from the
+     output of the program denoted by `LDD_SUFFIX'.  PTR is a variable
+     of type `char *' that points to the beginning of a line of output
+     from `LDD_SUFFIX'.  If the line lists a dynamic dependency, the
+     code must advance PTR to the beginning of the filename on that
+     line.  Otherwise, it must set PTR to `NULL'.
+
+ -- Macro: SHLIB_SUFFIX
+     Define this macro to a C string constant containing the default
+     shared library extension of the target (e.g., `".so"').  `collect2'
+     strips version information after this suffix when generating global
+     constructor and destructor names.  This define is only needed on
+     targets that use `collect2' to process constructors and
+     destructors.
+
+
+File: gccint.info,  Node: Instruction Output,  Next: Dispatch Tables,  Prev: Macros for Initialization,  Up: Assembler Format
+
+17.21.7 Output of Assembler Instructions
+----------------------------------------
+
+This describes assembler instruction output.
+
+ -- Macro: REGISTER_NAMES
+     A C initializer containing the assembler's names for the machine
+     registers, each one as a C string constant.  This is what
+     translates register numbers in the compiler into assembler
+     language.
+
+ -- Macro: ADDITIONAL_REGISTER_NAMES
+     If defined, a C initializer for an array of structures containing
+     a name and a register number.  This macro defines additional names
+     for hard registers, thus allowing the `asm' option in declarations
+     to refer to registers using alternate names.
+
+ -- Macro: ASM_OUTPUT_OPCODE (STREAM, PTR)
+     Define this macro if you are using an unusual assembler that
+     requires different names for the machine instructions.
+
+     The definition is a C statement or statements which output an
+     assembler instruction opcode to the stdio stream STREAM.  The
+     macro-operand PTR is a variable of type `char *' which points to
+     the opcode name in its "internal" form--the form that is written
+     in the machine description.  The definition should output the
+     opcode name to STREAM, performing any translation you desire, and
+     increment the variable PTR to point at the end of the opcode so
+     that it will not be output twice.
+
+     In fact, your macro definition may process less than the entire
+     opcode name, or more than the opcode name; but if you want to
+     process text that includes `%'-sequences to substitute operands,
+     you must take care of the substitution yourself.  Just be sure to
+     increment PTR over whatever text should not be output normally.
+
+     If you need to look at the operand values, they can be found as the
+     elements of `recog_data.operand'.
+
+     If the macro definition does nothing, the instruction is output in
+     the usual way.
+
+ -- Macro: FINAL_PRESCAN_INSN (INSN, OPVEC, NOPERANDS)
+     If defined, a C statement to be executed just prior to the output
+     of assembler code for INSN, to modify the extracted operands so
+     they will be output differently.
+
+     Here the argument OPVEC is the vector containing the operands
+     extracted from INSN, and NOPERANDS is the number of elements of
+     the vector which contain meaningful data for this insn.  The
+     contents of this vector are what will be used to convert the insn
+     template into assembler code, so you can change the assembler
+     output by changing the contents of the vector.
+
+     This macro is useful when various assembler syntaxes share a single
+     file of instruction patterns; by defining this macro differently,
+     you can cause a large class of instructions to be output
+     differently (such as with rearranged operands).  Naturally,
+     variations in assembler syntax affecting individual insn patterns
+     ought to be handled by writing conditional output routines in
+     those patterns.
+
+     If this macro is not defined, it is equivalent to a null statement.
+
+ -- Target Hook: void TARGET_ASM_FINAL_POSTSCAN_INSN (FILE *FILE, rtx
+          INSN, rtx *OPVEC, int NOPERANDS)
+     If defined, this target hook is a function which is executed just
+     after the output of assembler code for INSN, to change the mode of
+     the assembler if necessary.
+
+     Here the argument OPVEC is the vector containing the operands
+     extracted from INSN, and NOPERANDS is the number of elements of
+     the vector which contain meaningful data for this insn.  The
+     contents of this vector are what was used to convert the insn
+     template into assembler code, so you can change the assembler mode
+     by checking the contents of the vector.
+
+ -- Macro: PRINT_OPERAND (STREAM, X, CODE)
+     A C compound statement to output to stdio stream STREAM the
+     assembler syntax for an instruction operand X.  X is an RTL
+     expression.
+
+     CODE is a value that can be used to specify one of several ways of
+     printing the operand.  It is used when identical operands must be
+     printed differently depending on the context.  CODE comes from the
+     `%' specification that was used to request printing of the
+     operand.  If the specification was just `%DIGIT' then CODE is 0;
+     if the specification was `%LTR DIGIT' then CODE is the ASCII code
+     for LTR.
+
+     If X is a register, this macro should print the register's name.
+     The names can be found in an array `reg_names' whose type is `char
+     *[]'.  `reg_names' is initialized from `REGISTER_NAMES'.
+
+     When the machine description has a specification `%PUNCT' (a `%'
+     followed by a punctuation character), this macro is called with a
+     null pointer for X and the punctuation character for CODE.
+
+ -- Macro: PRINT_OPERAND_PUNCT_VALID_P (CODE)
+     A C expression which evaluates to true if CODE is a valid
+     punctuation character for use in the `PRINT_OPERAND' macro.  If
+     `PRINT_OPERAND_PUNCT_VALID_P' is not defined, it means that no
+     punctuation characters (except for the standard one, `%') are used
+     in this way.
+
+ -- Macro: PRINT_OPERAND_ADDRESS (STREAM, X)
+     A C compound statement to output to stdio stream STREAM the
+     assembler syntax for an instruction operand that is a memory
+     reference whose address is X.  X is an RTL expression.
+
+     On some machines, the syntax for a symbolic address depends on the
+     section that the address refers to.  On these machines, define the
+     hook `TARGET_ENCODE_SECTION_INFO' to store the information into the
+     `symbol_ref', and then check for it here.  *Note Assembler
+     Format::.
+
+ -- Macro: DBR_OUTPUT_SEQEND (FILE)
+     A C statement, to be executed after all slot-filler instructions
+     have been output.  If necessary, call `dbr_sequence_length' to
+     determine the number of slots filled in a sequence (zero if not
+     currently outputting a sequence), to decide how many no-ops to
+     output, or whatever.
+
+     Don't define this macro if it has nothing to do, but it is helpful
+     in reading assembly output if the extent of the delay sequence is
+     made explicit (e.g. with white space).
+
+ Note that output routines for instructions with delay slots must be
+prepared to deal with not being output as part of a sequence (i.e. when
+the scheduling pass is not run, or when no slot fillers could be
+found.)  The variable `final_sequence' is null when not processing a
+sequence, otherwise it contains the `sequence' rtx being output.
+
+ -- Macro: REGISTER_PREFIX
+ -- Macro: LOCAL_LABEL_PREFIX
+ -- Macro: USER_LABEL_PREFIX
+ -- Macro: IMMEDIATE_PREFIX
+     If defined, C string expressions to be used for the `%R', `%L',
+     `%U', and `%I' options of `asm_fprintf' (see `final.c').  These
+     are useful when a single `md' file must support multiple assembler
+     formats.  In that case, the various `tm.h' files can define these
+     macros differently.
+
+ -- Macro: ASM_FPRINTF_EXTENSIONS (FILE, ARGPTR, FORMAT)
+     If defined this macro should expand to a series of `case'
+     statements which will be parsed inside the `switch' statement of
+     the `asm_fprintf' function.  This allows targets to define extra
+     printf formats which may useful when generating their assembler
+     statements.  Note that uppercase letters are reserved for future
+     generic extensions to asm_fprintf, and so are not available to
+     target specific code.  The output file is given by the parameter
+     FILE.  The varargs input pointer is ARGPTR and the rest of the
+     format string, starting the character after the one that is being
+     switched upon, is pointed to by FORMAT.
+
+ -- Macro: ASSEMBLER_DIALECT
+     If your target supports multiple dialects of assembler language
+     (such as different opcodes), define this macro as a C expression
+     that gives the numeric index of the assembler language dialect to
+     use, with zero as the first variant.
+
+     If this macro is defined, you may use constructs of the form
+          `{option0|option1|option2...}'
+     in the output templates of patterns (*note Output Template::) or
+     in the first argument of `asm_fprintf'.  This construct outputs
+     `option0', `option1', `option2', etc., if the value of
+     `ASSEMBLER_DIALECT' is zero, one, two, etc.  Any special characters
+     within these strings retain their usual meaning.  If there are
+     fewer alternatives within the braces than the value of
+     `ASSEMBLER_DIALECT', the construct outputs nothing.
+
+     If you do not define this macro, the characters `{', `|' and `}'
+     do not have any special meaning when used in templates or operands
+     to `asm_fprintf'.
+
+     Define the macros `REGISTER_PREFIX', `LOCAL_LABEL_PREFIX',
+     `USER_LABEL_PREFIX' and `IMMEDIATE_PREFIX' if you can express the
+     variations in assembler language syntax with that mechanism.
+     Define `ASSEMBLER_DIALECT' and use the `{option0|option1}' syntax
+     if the syntax variant are larger and involve such things as
+     different opcodes or operand order.
+
+ -- Macro: ASM_OUTPUT_REG_PUSH (STREAM, REGNO)
+     A C expression to output to STREAM some assembler code which will
+     push hard register number REGNO onto the stack.  The code need not
+     be optimal, since this macro is used only when profiling.
+
+ -- Macro: ASM_OUTPUT_REG_POP (STREAM, REGNO)
+     A C expression to output to STREAM some assembler code which will
+     pop hard register number REGNO off of the stack.  The code need
+     not be optimal, since this macro is used only when profiling.
+
+
+File: gccint.info,  Node: Dispatch Tables,  Next: Exception Region Output,  Prev: Instruction Output,  Up: Assembler Format
+
+17.21.8 Output of Dispatch Tables
+---------------------------------
+
+This concerns dispatch tables.
+
+ -- Macro: ASM_OUTPUT_ADDR_DIFF_ELT (STREAM, BODY, VALUE, REL)
+     A C statement to output to the stdio stream STREAM an assembler
+     pseudo-instruction to generate a difference between two labels.
+     VALUE and REL are the numbers of two internal labels.  The
+     definitions of these labels are output using
+     `(*targetm.asm_out.internal_label)', and they must be printed in
+     the same way here.  For example,
+
+          fprintf (STREAM, "\t.word L%d-L%d\n",
+                   VALUE, REL)
+
+     You must provide this macro on machines where the addresses in a
+     dispatch table are relative to the table's own address.  If
+     defined, GCC will also use this macro on all machines when
+     producing PIC.  BODY is the body of the `ADDR_DIFF_VEC'; it is
+     provided so that the mode and flags can be read.
+
+ -- Macro: ASM_OUTPUT_ADDR_VEC_ELT (STREAM, VALUE)
+     This macro should be provided on machines where the addresses in a
+     dispatch table are absolute.
+
+     The definition should be a C statement to output to the stdio
+     stream STREAM an assembler pseudo-instruction to generate a
+     reference to a label.  VALUE is the number of an internal label
+     whose definition is output using
+     `(*targetm.asm_out.internal_label)'.  For example,
+
+          fprintf (STREAM, "\t.word L%d\n", VALUE)
+
+ -- Macro: ASM_OUTPUT_CASE_LABEL (STREAM, PREFIX, NUM, TABLE)
+     Define this if the label before a jump-table needs to be output
+     specially.  The first three arguments are the same as for
+     `(*targetm.asm_out.internal_label)'; the fourth argument is the
+     jump-table which follows (a `jump_insn' containing an `addr_vec'
+     or `addr_diff_vec').
+
+     This feature is used on system V to output a `swbeg' statement for
+     the table.
+
+     If this macro is not defined, these labels are output with
+     `(*targetm.asm_out.internal_label)'.
+
+ -- Macro: ASM_OUTPUT_CASE_END (STREAM, NUM, TABLE)
+     Define this if something special must be output at the end of a
+     jump-table.  The definition should be a C statement to be executed
+     after the assembler code for the table is written.  It should write
+     the appropriate code to stdio stream STREAM.  The argument TABLE
+     is the jump-table insn, and NUM is the label-number of the
+     preceding label.
+
+     If this macro is not defined, nothing special is output at the end
+     of the jump-table.
+
+ -- Target Hook: void TARGET_ASM_EMIT_UNWIND_LABEL (FILE *STREAM, tree
+          DECL, int FOR_EH, int EMPTY)
+     This target hook emits a label at the beginning of each FDE.  It
+     should be defined on targets where FDEs need special labels, and it
+     should write the appropriate label, for the FDE associated with the
+     function declaration DECL, to the stdio stream STREAM.  The third
+     argument, FOR_EH, is a boolean: true if this is for an exception
+     table.  The fourth argument, EMPTY, is a boolean: true if this is
+     a placeholder label for an omitted FDE.
+
+     The default is that FDEs are not given nonlocal labels.
+
+ -- Target Hook: void TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL (FILE *STREAM)
+     This target hook emits a label at the beginning of the exception
+     table.  It should be defined on targets where it is desirable for
+     the table to be broken up according to function.
+
+     The default is that no label is emitted.
+
+ -- Target Hook: void TARGET_UNWIND_EMIT (FILE *STREAM, rtx INSN)
+     This target hook emits assembly directives required to unwind the
+     given instruction.  This is only used when TARGET_UNWIND_INFO is
+     set.
+
+
+File: gccint.info,  Node: Exception Region Output,  Next: Alignment Output,  Prev: Dispatch Tables,  Up: Assembler Format
+
+17.21.9 Assembler Commands for Exception Regions
+------------------------------------------------
+
+This describes commands marking the start and the end of an exception
+region.
+
+ -- Macro: EH_FRAME_SECTION_NAME
+     If defined, a C string constant for the name of the section
+     containing exception handling frame unwind information.  If not
+     defined, GCC will provide a default definition if the target
+     supports named sections.  `crtstuff.c' uses this macro to switch
+     to the appropriate section.
+
+     You should define this symbol if your target supports DWARF 2 frame
+     unwind information and the default definition does not work.
+
+ -- Macro: EH_FRAME_IN_DATA_SECTION
+     If defined, DWARF 2 frame unwind information will be placed in the
+     data section even though the target supports named sections.  This
+     might be necessary, for instance, if the system linker does garbage
+     collection and sections cannot be marked as not to be collected.
+
+     Do not define this macro unless `TARGET_ASM_NAMED_SECTION' is also
+     defined.
+
+ -- Macro: EH_TABLES_CAN_BE_READ_ONLY
+     Define this macro to 1 if your target is such that no frame unwind
+     information encoding used with non-PIC code will ever require a
+     runtime relocation, but the linker may not support merging
+     read-only and read-write sections into a single read-write section.
+
+ -- Macro: MASK_RETURN_ADDR
+     An rtx used to mask the return address found via
+     `RETURN_ADDR_RTX', so that it does not contain any extraneous set
+     bits in it.
+
+ -- Macro: DWARF2_UNWIND_INFO
+     Define this macro to 0 if your target supports DWARF 2 frame unwind
+     information, but it does not yet work with exception handling.
+     Otherwise, if your target supports this information (if it defines
+     `INCOMING_RETURN_ADDR_RTX' and either `UNALIGNED_INT_ASM_OP' or
+     `OBJECT_FORMAT_ELF'), GCC will provide a default definition of 1.
+
+     If `TARGET_UNWIND_INFO' is defined, the target specific unwinder
+     will be used in all cases.  Defining this macro will enable the
+     generation of DWARF 2 frame debugging information.
+
+     If `TARGET_UNWIND_INFO' is not defined, and this macro is defined
+     to 1, the DWARF 2 unwinder will be the default exception handling
+     mechanism; otherwise, the `setjmp'/`longjmp'-based scheme will be
+     used by default.
+
+ -- Macro: TARGET_UNWIND_INFO
+     Define this macro if your target has ABI specified unwind tables.
+     Usually these will be output by `TARGET_UNWIND_EMIT'.
+
+ -- Target Hook: bool TARGET_UNWIND_TABLES_DEFAULT
+     This variable should be set to `true' if the target ABI requires
+     unwinding tables even when exceptions are not used.
+
+ -- Macro: MUST_USE_SJLJ_EXCEPTIONS
+     This macro need only be defined if `DWARF2_UNWIND_INFO' is
+     runtime-variable.  In that case, `except.h' cannot correctly
+     determine the corresponding definition of
+     `MUST_USE_SJLJ_EXCEPTIONS', so the target must provide it directly.
+
+ -- Macro: DONT_USE_BUILTIN_SETJMP
+     Define this macro to 1 if the `setjmp'/`longjmp'-based scheme
+     should use the `setjmp'/`longjmp' functions from the C library
+     instead of the `__builtin_setjmp'/`__builtin_longjmp' machinery.
+
+ -- Macro: DWARF_CIE_DATA_ALIGNMENT
+     This macro need only be defined if the target might save registers
+     in the function prologue at an offset to the stack pointer that is
+     not aligned to `UNITS_PER_WORD'.  The definition should be the
+     negative minimum alignment if `STACK_GROWS_DOWNWARD' is defined,
+     and the positive minimum alignment otherwise.  *Note SDB and
+     DWARF::.  Only applicable if the target supports DWARF 2 frame
+     unwind information.
+
+ -- Target Hook: bool TARGET_TERMINATE_DW2_EH_FRAME_INFO
+     Contains the value true if the target should add a zero word onto
+     the end of a Dwarf-2 frame info section when used for exception
+     handling.  Default value is false if `EH_FRAME_SECTION_NAME' is
+     defined, and true otherwise.
+
+ -- Target Hook: rtx TARGET_DWARF_REGISTER_SPAN (rtx REG)
+     Given a register, this hook should return a parallel of registers
+     to represent where to find the register pieces.  Define this hook
+     if the register and its mode are represented in Dwarf in
+     non-contiguous locations, or if the register should be represented
+     in more than one register in Dwarf.  Otherwise, this hook should
+     return `NULL_RTX'.  If not defined, the default is to return
+     `NULL_RTX'.
+
+ -- Target Hook: void TARGET_INIT_DWARF_REG_SIZES_EXTRA (tree ADDRESS)
+     If some registers are represented in Dwarf-2 unwind information in
+     multiple pieces, define this hook to fill in information about the
+     sizes of those pieces in the table used by the unwinder at runtime.
+     It will be called by `expand_builtin_init_dwarf_reg_sizes' after
+     filling in a single size corresponding to each hard register;
+     ADDRESS is the address of the table.
+
+ -- Target Hook: bool TARGET_ASM_TTYPE (rtx SYM)
+     This hook is used to output a reference from a frame unwinding
+     table to the type_info object identified by SYM.  It should return
+     `true' if the reference was output.  Returning `false' will cause
+     the reference to be output using the normal Dwarf2 routines.
+
+ -- Target Hook: bool TARGET_ARM_EABI_UNWINDER
+     This flag should be set to `true' on targets that use an ARM EABI
+     based unwinding library, and `false' on other targets.  This
+     effects the format of unwinding tables, and how the unwinder in
+     entered after running a cleanup.  The default is `false'.
+
+
+File: gccint.info,  Node: Alignment Output,  Prev: Exception Region Output,  Up: Assembler Format
+
+17.21.10 Assembler Commands for Alignment
+-----------------------------------------
+
+This describes commands for alignment.
+
+ -- Macro: JUMP_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which is a
+     common destination of jumps and has no fallthru incoming edge.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable ALIGN_JUMPS in the target's
+     `OVERRIDE_OPTIONS'.  Otherwise, you should try to honor the user's
+     selection in ALIGN_JUMPS in a `JUMP_ALIGN' implementation.
+
+ -- Macro: LABEL_ALIGN_AFTER_BARRIER (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which follows
+     a `BARRIER'.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+ -- Macro: LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
+     The maximum number of bytes to skip when applying
+     `LABEL_ALIGN_AFTER_BARRIER'.  This works only if
+     `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: LOOP_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL, which follows
+     a `NOTE_INSN_LOOP_BEG' note.
+
+     This macro need not be defined if you don't want any special
+     alignment to be done at such a time.  Most machine descriptions do
+     not currently define the macro.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable `align_loops' in the target's
+     `OVERRIDE_OPTIONS'.  Otherwise, you should try to honor the user's
+     selection in `align_loops' in a `LOOP_ALIGN' implementation.
+
+ -- Macro: LOOP_ALIGN_MAX_SKIP
+     The maximum number of bytes to skip when applying `LOOP_ALIGN'.
+     This works only if `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: LABEL_ALIGN (LABEL)
+     The alignment (log base 2) to put in front of LABEL.  If
+     `LABEL_ALIGN_AFTER_BARRIER' / `LOOP_ALIGN' specify a different
+     alignment, the maximum of the specified values is used.
+
+     Unless it's necessary to inspect the LABEL parameter, it is better
+     to set the variable `align_labels' in the target's
+     `OVERRIDE_OPTIONS'.  Otherwise, you should try to honor the user's
+     selection in `align_labels' in a `LABEL_ALIGN' implementation.
+
+ -- Macro: LABEL_ALIGN_MAX_SKIP
+     The maximum number of bytes to skip when applying `LABEL_ALIGN'.
+     This works only if `ASM_OUTPUT_MAX_SKIP_ALIGN' is defined.
+
+ -- Macro: ASM_OUTPUT_SKIP (STREAM, NBYTES)
+     A C statement to output to the stdio stream STREAM an assembler
+     instruction to advance the location counter by NBYTES bytes.
+     Those bytes should be zero when loaded.  NBYTES will be a C
+     expression of type `unsigned HOST_WIDE_INT'.
+
+ -- Macro: ASM_NO_SKIP_IN_TEXT
+     Define this macro if `ASM_OUTPUT_SKIP' should not be used in the
+     text section because it fails to put zeros in the bytes that are
+     skipped.  This is true on many Unix systems, where the pseudo-op
+     to skip bytes produces no-op instructions rather than zeros when
+     used in the text section.
+
+ -- Macro: ASM_OUTPUT_ALIGN (STREAM, POWER)
+     A C statement to output to the stdio stream STREAM an assembler
+     command to advance the location counter to a multiple of 2 to the
+     POWER bytes.  POWER will be a C expression of type `int'.
+
+ -- Macro: ASM_OUTPUT_ALIGN_WITH_NOP (STREAM, POWER)
+     Like `ASM_OUTPUT_ALIGN', except that the "nop" instruction is used
+     for padding, if necessary.
+
+ -- Macro: ASM_OUTPUT_MAX_SKIP_ALIGN (STREAM, POWER, MAX_SKIP)
+     A C statement to output to the stdio stream STREAM an assembler
+     command to advance the location counter to a multiple of 2 to the
+     POWER bytes, but only if MAX_SKIP or fewer bytes are needed to
+     satisfy the alignment request.  POWER and MAX_SKIP will be a C
+     expression of type `int'.
+
+
+File: gccint.info,  Node: Debugging Info,  Next: Floating Point,  Prev: Assembler Format,  Up: Target Macros
+
+17.22 Controlling Debugging Information Format
+==============================================
+
+This describes how to specify debugging information.
+
+* Menu:
+
+* All Debuggers::      Macros that affect all debugging formats uniformly.
+* DBX Options::        Macros enabling specific options in DBX format.
+* DBX Hooks::          Hook macros for varying DBX format.
+* File Names and DBX:: Macros controlling output of file names in DBX format.
+* SDB and DWARF::      Macros for SDB (COFF) and DWARF formats.
+* VMS Debug::          Macros for VMS debug format.
+
+
+File: gccint.info,  Node: All Debuggers,  Next: DBX Options,  Up: Debugging Info
+
+17.22.1 Macros Affecting All Debugging Formats
+----------------------------------------------
+
+These macros affect all debugging formats.
+
+ -- Macro: DBX_REGISTER_NUMBER (REGNO)
+     A C expression that returns the DBX register number for the
+     compiler register number REGNO.  In the default macro provided,
+     the value of this expression will be REGNO itself.  But sometimes
+     there are some registers that the compiler knows about and DBX
+     does not, or vice versa.  In such cases, some register may need to
+     have one number in the compiler and another for DBX.
+
+     If two registers have consecutive numbers inside GCC, and they can
+     be used as a pair to hold a multiword value, then they _must_ have
+     consecutive numbers after renumbering with `DBX_REGISTER_NUMBER'.
+     Otherwise, debuggers will be unable to access such a pair, because
+     they expect register pairs to be consecutive in their own
+     numbering scheme.
+
+     If you find yourself defining `DBX_REGISTER_NUMBER' in way that
+     does not preserve register pairs, then what you must do instead is
+     redefine the actual register numbering scheme.
+
+ -- Macro: DEBUGGER_AUTO_OFFSET (X)
+     A C expression that returns the integer offset value for an
+     automatic variable having address X (an RTL expression).  The
+     default computation assumes that X is based on the frame-pointer
+     and gives the offset from the frame-pointer.  This is required for
+     targets that produce debugging output for DBX or COFF-style
+     debugging output for SDB and allow the frame-pointer to be
+     eliminated when the `-g' options is used.
+
+ -- Macro: DEBUGGER_ARG_OFFSET (OFFSET, X)
+     A C expression that returns the integer offset value for an
+     argument having address X (an RTL expression).  The nominal offset
+     is OFFSET.
+
+ -- Macro: PREFERRED_DEBUGGING_TYPE
+     A C expression that returns the type of debugging output GCC should
+     produce when the user specifies just `-g'.  Define this if you
+     have arranged for GCC to support more than one format of debugging
+     output.  Currently, the allowable values are `DBX_DEBUG',
+     `SDB_DEBUG', `DWARF_DEBUG', `DWARF2_DEBUG', `XCOFF_DEBUG',
+     `VMS_DEBUG', and `VMS_AND_DWARF2_DEBUG'.
+
+     When the user specifies `-ggdb', GCC normally also uses the value
+     of this macro to select the debugging output format, but with two
+     exceptions.  If `DWARF2_DEBUGGING_INFO' is defined, GCC uses the
+     value `DWARF2_DEBUG'.  Otherwise, if `DBX_DEBUGGING_INFO' is
+     defined, GCC uses `DBX_DEBUG'.
+
+     The value of this macro only affects the default debugging output;
+     the user can always get a specific type of output by using
+     `-gstabs', `-gcoff', `-gdwarf-2', `-gxcoff', or `-gvms'.
+
+
+File: gccint.info,  Node: DBX Options,  Next: DBX Hooks,  Prev: All Debuggers,  Up: Debugging Info
+
+17.22.2 Specific Options for DBX Output
+---------------------------------------
+
+These are specific options for DBX output.
+
+ -- Macro: DBX_DEBUGGING_INFO
+     Define this macro if GCC should produce debugging output for DBX
+     in response to the `-g' option.
+
+ -- Macro: XCOFF_DEBUGGING_INFO
+     Define this macro if GCC should produce XCOFF format debugging
+     output in response to the `-g' option.  This is a variant of DBX
+     format.
+
+ -- Macro: DEFAULT_GDB_EXTENSIONS
+     Define this macro to control whether GCC should by default generate
+     GDB's extended version of DBX debugging information (assuming
+     DBX-format debugging information is enabled at all).  If you don't
+     define the macro, the default is 1: always generate the extended
+     information if there is any occasion to.
+
+ -- Macro: DEBUG_SYMS_TEXT
+     Define this macro if all `.stabs' commands should be output while
+     in the text section.
+
+ -- Macro: ASM_STABS_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabs\t"' to define an ordinary
+     debugging symbol.  If you don't define this macro, `"\t.stabs\t"'
+     is used.  This macro applies only to DBX debugging information
+     format.
+
+ -- Macro: ASM_STABD_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabd\t"' to define a debugging
+     symbol whose value is the current location.  If you don't define
+     this macro, `"\t.stabd\t"' is used.  This macro applies only to
+     DBX debugging information format.
+
+ -- Macro: ASM_STABN_OP
+     A C string constant, including spacing, naming the assembler
+     pseudo op to use instead of `"\t.stabn\t"' to define a debugging
+     symbol with no name.  If you don't define this macro,
+     `"\t.stabn\t"' is used.  This macro applies only to DBX debugging
+     information format.
+
+ -- Macro: DBX_NO_XREFS
+     Define this macro if DBX on your system does not support the
+     construct `xsTAGNAME'.  On some systems, this construct is used to
+     describe a forward reference to a structure named TAGNAME.  On
+     other systems, this construct is not supported at all.
+
+ -- Macro: DBX_CONTIN_LENGTH
+     A symbol name in DBX-format debugging information is normally
+     continued (split into two separate `.stabs' directives) when it
+     exceeds a certain length (by default, 80 characters).  On some
+     operating systems, DBX requires this splitting; on others,
+     splitting must not be done.  You can inhibit splitting by defining
+     this macro with the value zero.  You can override the default
+     splitting-length by defining this macro as an expression for the
+     length you desire.
+
+ -- Macro: DBX_CONTIN_CHAR
+     Normally continuation is indicated by adding a `\' character to
+     the end of a `.stabs' string when a continuation follows.  To use
+     a different character instead, define this macro as a character
+     constant for the character you want to use.  Do not define this
+     macro if backslash is correct for your system.
+
+ -- Macro: DBX_STATIC_STAB_DATA_SECTION
+     Define this macro if it is necessary to go to the data section
+     before outputting the `.stabs' pseudo-op for a non-global static
+     variable.
+
+ -- Macro: DBX_TYPE_DECL_STABS_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a typedef.  The default is `N_LSYM'.
+
+ -- Macro: DBX_STATIC_CONST_VAR_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a static variable located in the text section.  DBX format does not
+     provide any "right" way to do this.  The default is `N_FUN'.
+
+ -- Macro: DBX_REGPARM_STABS_CODE
+     The value to use in the "code" field of the `.stabs' directive for
+     a parameter passed in registers.  DBX format does not provide any
+     "right" way to do this.  The default is `N_RSYM'.
+
+ -- Macro: DBX_REGPARM_STABS_LETTER
+     The letter to use in DBX symbol data to identify a symbol as a
+     parameter passed in registers.  DBX format does not customarily
+     provide any way to do this.  The default is `'P''.
+
+ -- Macro: DBX_FUNCTION_FIRST
+     Define this macro if the DBX information for a function and its
+     arguments should precede the assembler code for the function.
+     Normally, in DBX format, the debugging information entirely
+     follows the assembler code.
+
+ -- Macro: DBX_BLOCKS_FUNCTION_RELATIVE
+     Define this macro, with value 1, if the value of a symbol
+     describing the scope of a block (`N_LBRAC' or `N_RBRAC') should be
+     relative to the start of the enclosing function.  Normally, GCC
+     uses an absolute address.
+
+ -- Macro: DBX_LINES_FUNCTION_RELATIVE
+     Define this macro, with value 1, if the value of a symbol
+     indicating the current line number (`N_SLINE') should be relative
+     to the start of the enclosing function.  Normally, GCC uses an
+     absolute address.
+
+ -- Macro: DBX_USE_BINCL
+     Define this macro if GCC should generate `N_BINCL' and `N_EINCL'
+     stabs for included header files, as on Sun systems.  This macro
+     also directs GCC to output a type number as a pair of a file
+     number and a type number within the file.  Normally, GCC does not
+     generate `N_BINCL' or `N_EINCL' stabs, and it outputs a single
+     number for a type number.
+
+
+File: gccint.info,  Node: DBX Hooks,  Next: File Names and DBX,  Prev: DBX Options,  Up: Debugging Info
+
+17.22.3 Open-Ended Hooks for DBX Format
+---------------------------------------
+
+These are hooks for DBX format.
+
+ -- Macro: DBX_OUTPUT_LBRAC (STREAM, NAME)
+     Define this macro to say how to output to STREAM the debugging
+     information for the start of a scope level for variable names.  The
+     argument NAME is the name of an assembler symbol (for use with
+     `assemble_name') whose value is the address where the scope begins.
+
+ -- Macro: DBX_OUTPUT_RBRAC (STREAM, NAME)
+     Like `DBX_OUTPUT_LBRAC', but for the end of a scope level.
+
+ -- Macro: DBX_OUTPUT_NFUN (STREAM, LSCOPE_LABEL, DECL)
+     Define this macro if the target machine requires special handling
+     to output an `N_FUN' entry for the function DECL.
+
+ -- Macro: DBX_OUTPUT_SOURCE_LINE (STREAM, LINE, COUNTER)
+     A C statement to output DBX debugging information before code for
+     line number LINE of the current source file to the stdio stream
+     STREAM.  COUNTER is the number of time the macro was invoked,
+     including the current invocation; it is intended to generate
+     unique labels in the assembly output.
+
+     This macro should not be defined if the default output is correct,
+     or if it can be made correct by defining
+     `DBX_LINES_FUNCTION_RELATIVE'.
+
+ -- Macro: NO_DBX_FUNCTION_END
+     Some stabs encapsulation formats (in particular ECOFF), cannot
+     handle the `.stabs "",N_FUN,,0,0,Lscope-function-1' gdb dbx
+     extension construct.  On those machines, define this macro to turn
+     this feature off without disturbing the rest of the gdb extensions.
+
+ -- Macro: NO_DBX_BNSYM_ENSYM
+     Some assemblers cannot handle the `.stabd BNSYM/ENSYM,0,0' gdb dbx
+     extension construct.  On those machines, define this macro to turn
+     this feature off without disturbing the rest of the gdb extensions.
+
+
+File: gccint.info,  Node: File Names and DBX,  Next: SDB and DWARF,  Prev: DBX Hooks,  Up: Debugging Info
+
+17.22.4 File Names in DBX Format
+--------------------------------
+
+This describes file names in DBX format.
+
+ -- Macro: DBX_OUTPUT_MAIN_SOURCE_FILENAME (STREAM, NAME)
+     A C statement to output DBX debugging information to the stdio
+     stream STREAM, which indicates that file NAME is the main source
+     file--the file specified as the input file for compilation.  This
+     macro is called only once, at the beginning of compilation.
+
+     This macro need not be defined if the standard form of output for
+     DBX debugging information is appropriate.
+
+     It may be necessary to refer to a label equal to the beginning of
+     the text section.  You can use `assemble_name (stream,
+     ltext_label_name)' to do so.  If you do this, you must also set
+     the variable USED_LTEXT_LABEL_NAME to `true'.
+
+ -- Macro: NO_DBX_MAIN_SOURCE_DIRECTORY
+     Define this macro, with value 1, if GCC should not emit an
+     indication of the current directory for compilation and current
+     source language at the beginning of the file.
+
+ -- Macro: NO_DBX_GCC_MARKER
+     Define this macro, with value 1, if GCC should not emit an
+     indication that this object file was compiled by GCC.  The default
+     is to emit an `N_OPT' stab at the beginning of every source file,
+     with `gcc2_compiled.' for the string and value 0.
+
+ -- Macro: DBX_OUTPUT_MAIN_SOURCE_FILE_END (STREAM, NAME)
+     A C statement to output DBX debugging information at the end of
+     compilation of the main source file NAME.  Output should be
+     written to the stdio stream STREAM.
+
+     If you don't define this macro, nothing special is output at the
+     end of compilation, which is correct for most machines.
+
+ -- Macro: DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END
+     Define this macro _instead of_ defining
+     `DBX_OUTPUT_MAIN_SOURCE_FILE_END', if what needs to be output at
+     the end of compilation is an `N_SO' stab with an empty string,
+     whose value is the highest absolute text address in the file.
+
+
+File: gccint.info,  Node: SDB and DWARF,  Next: VMS Debug,  Prev: File Names and DBX,  Up: Debugging Info
+
+17.22.5 Macros for SDB and DWARF Output
+---------------------------------------
+
+Here are macros for SDB and DWARF output.
+
+ -- Macro: SDB_DEBUGGING_INFO
+     Define this macro if GCC should produce COFF-style debugging output
+     for SDB in response to the `-g' option.
+
+ -- Macro: DWARF2_DEBUGGING_INFO
+     Define this macro if GCC should produce dwarf version 2 format
+     debugging output in response to the `-g' option.
+
+      -- Target Hook: int TARGET_DWARF_CALLING_CONVENTION (const_tree
+               FUNCTION)
+          Define this to enable the dwarf attribute
+          `DW_AT_calling_convention' to be emitted for each function.
+          Instead of an integer return the enum value for the `DW_CC_'
+          tag.
+
+     To support optional call frame debugging information, you must also
+     define `INCOMING_RETURN_ADDR_RTX' and either set
+     `RTX_FRAME_RELATED_P' on the prologue insns if you use RTL for the
+     prologue, or call `dwarf2out_def_cfa' and `dwarf2out_reg_save' as
+     appropriate from `TARGET_ASM_FUNCTION_PROLOGUE' if you don't.
+
+ -- Macro: DWARF2_FRAME_INFO
+     Define this macro to a nonzero value if GCC should always output
+     Dwarf 2 frame information.  If `DWARF2_UNWIND_INFO' (*note
+     Exception Region Output:: is nonzero, GCC will output this
+     information not matter how you define `DWARF2_FRAME_INFO'.
+
+ -- Macro: DWARF2_ASM_LINE_DEBUG_INFO
+     Define this macro to be a nonzero value if the assembler can
+     generate Dwarf 2 line debug info sections.  This will result in
+     much more compact line number tables, and hence is desirable if it
+     works.
+
+ -- Macro: ASM_OUTPUT_DWARF_DELTA (STREAM, SIZE, LABEL1, LABEL2)
+     A C statement to issue assembly directives that create a difference
+     LAB1 minus LAB2, using an integer of the given SIZE.
+
+ -- Macro: ASM_OUTPUT_DWARF_OFFSET (STREAM, SIZE, LABEL, SECTION)
+     A C statement to issue assembly directives that create a
+     section-relative reference to the given LABEL, using an integer of
+     the given SIZE.  The label is known to be defined in the given
+     SECTION.
+
+ -- Macro: ASM_OUTPUT_DWARF_PCREL (STREAM, SIZE, LABEL)
+     A C statement to issue assembly directives that create a
+     self-relative reference to the given LABEL, using an integer of
+     the given SIZE.
+
+ -- Macro: ASM_OUTPUT_DWARF_TABLE_REF (LABEL)
+     A C statement to issue assembly directives that create a reference
+     to the DWARF table identifier LABEL from the current section.  This
+     is used on some systems to avoid garbage collecting a DWARF table
+     which is referenced by a function.
+
+ -- Target Hook: void TARGET_ASM_OUTPUT_DWARF_DTPREL (FILE *FILE, int
+          SIZE, rtx X)
+     If defined, this target hook is a function which outputs a
+     DTP-relative reference to the given TLS symbol of the specified
+     size.
+
+ -- Macro: PUT_SDB_...
+     Define these macros to override the assembler syntax for the
+     special SDB assembler directives.  See `sdbout.c' for a list of
+     these macros and their arguments.  If the standard syntax is used,
+     you need not define them yourself.
+
+ -- Macro: SDB_DELIM
+     Some assemblers do not support a semicolon as a delimiter, even
+     between SDB assembler directives.  In that case, define this macro
+     to be the delimiter to use (usually `\n').  It is not necessary to
+     define a new set of `PUT_SDB_OP' macros if this is the only change
+     required.
+
+ -- Macro: SDB_ALLOW_UNKNOWN_REFERENCES
+     Define this macro to allow references to unknown structure, union,
+     or enumeration tags to be emitted.  Standard COFF does not allow
+     handling of unknown references, MIPS ECOFF has support for it.
+
+ -- Macro: SDB_ALLOW_FORWARD_REFERENCES
+     Define this macro to allow references to structure, union, or
+     enumeration tags that have not yet been seen to be handled.  Some
+     assemblers choke if forward tags are used, while some require it.
+
+ -- Macro: SDB_OUTPUT_SOURCE_LINE (STREAM, LINE)
+     A C statement to output SDB debugging information before code for
+     line number LINE of the current source file to the stdio stream
+     STREAM.  The default is to emit an `.ln' directive.
+
+
+File: gccint.info,  Node: VMS Debug,  Prev: SDB and DWARF,  Up: Debugging Info
+
+17.22.6 Macros for VMS Debug Format
+-----------------------------------
+
+Here are macros for VMS debug format.
+
+ -- Macro: VMS_DEBUGGING_INFO
+     Define this macro if GCC should produce debugging output for VMS
+     in response to the `-g' option.  The default behavior for VMS is
+     to generate minimal debug info for a traceback in the absence of
+     `-g' unless explicitly overridden with `-g0'.  This behavior is
+     controlled by `OPTIMIZATION_OPTIONS' and `OVERRIDE_OPTIONS'.
+
+
+File: gccint.info,  Node: Floating Point,  Next: Mode Switching,  Prev: Debugging Info,  Up: Target Macros
+
+17.23 Cross Compilation and Floating Point
+==========================================
+
+While all modern machines use twos-complement representation for
+integers, there are a variety of representations for floating point
+numbers.  This means that in a cross-compiler the representation of
+floating point numbers in the compiled program may be different from
+that used in the machine doing the compilation.
+
+ Because different representation systems may offer different amounts of
+range and precision, all floating point constants must be represented in
+the target machine's format.  Therefore, the cross compiler cannot
+safely use the host machine's floating point arithmetic; it must emulate
+the target's arithmetic.  To ensure consistency, GCC always uses
+emulation to work with floating point values, even when the host and
+target floating point formats are identical.
+
+ The following macros are provided by `real.h' for the compiler to use.
+All parts of the compiler which generate or optimize floating-point
+calculations must use these macros.  They may evaluate their operands
+more than once, so operands must not have side effects.
+
+ -- Macro: REAL_VALUE_TYPE
+     The C data type to be used to hold a floating point value in the
+     target machine's format.  Typically this is a `struct' containing
+     an array of `HOST_WIDE_INT', but all code should treat it as an
+     opaque quantity.
+
+ -- Macro: int REAL_VALUES_EQUAL (REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Compares for equality the two values, X and Y.  If the target
+     floating point format supports negative zeroes and/or NaNs,
+     `REAL_VALUES_EQUAL (-0.0, 0.0)' is true, and `REAL_VALUES_EQUAL
+     (NaN, NaN)' is false.
+
+ -- Macro: int REAL_VALUES_LESS (REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Tests whether X is less than Y.
+
+ -- Macro: HOST_WIDE_INT REAL_VALUE_FIX (REAL_VALUE_TYPE X)
+     Truncates X to a signed integer, rounding toward zero.
+
+ -- Macro: unsigned HOST_WIDE_INT REAL_VALUE_UNSIGNED_FIX
+          (REAL_VALUE_TYPE X)
+     Truncates X to an unsigned integer, rounding toward zero.  If X is
+     negative, returns zero.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_ATOF (const char *STRING, enum
+          machine_mode MODE)
+     Converts STRING into a floating point number in the target
+     machine's representation for mode MODE.  This routine can handle
+     both decimal and hexadecimal floating point constants, using the
+     syntax defined by the C language for both.
+
+ -- Macro: int REAL_VALUE_NEGATIVE (REAL_VALUE_TYPE X)
+     Returns 1 if X is negative (including negative zero), 0 otherwise.
+
+ -- Macro: int REAL_VALUE_ISINF (REAL_VALUE_TYPE X)
+     Determines whether X represents infinity (positive or negative).
+
+ -- Macro: int REAL_VALUE_ISNAN (REAL_VALUE_TYPE X)
+     Determines whether X represents a "NaN" (not-a-number).
+
+ -- Macro: void REAL_ARITHMETIC (REAL_VALUE_TYPE OUTPUT, enum tree_code
+          CODE, REAL_VALUE_TYPE X, REAL_VALUE_TYPE Y)
+     Calculates an arithmetic operation on the two floating point values
+     X and Y, storing the result in OUTPUT (which must be a variable).
+
+     The operation to be performed is specified by CODE.  Only the
+     following codes are supported: `PLUS_EXPR', `MINUS_EXPR',
+     `MULT_EXPR', `RDIV_EXPR', `MAX_EXPR', `MIN_EXPR'.
+
+     If `REAL_ARITHMETIC' is asked to evaluate division by zero and the
+     target's floating point format cannot represent infinity, it will
+     call `abort'.  Callers should check for this situation first, using
+     `MODE_HAS_INFINITIES'.  *Note Storage Layout::.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_NEGATE (REAL_VALUE_TYPE X)
+     Returns the negative of the floating point value X.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_ABS (REAL_VALUE_TYPE X)
+     Returns the absolute value of X.
+
+ -- Macro: REAL_VALUE_TYPE REAL_VALUE_TRUNCATE (REAL_VALUE_TYPE MODE,
+          enum machine_mode X)
+     Truncates the floating point value X to fit in MODE.  The return
+     value is still a full-size `REAL_VALUE_TYPE', but it has an
+     appropriate bit pattern to be output as a floating constant whose
+     precision accords with mode MODE.
+
+ -- Macro: void REAL_VALUE_TO_INT (HOST_WIDE_INT LOW, HOST_WIDE_INT
+          HIGH, REAL_VALUE_TYPE X)
+     Converts a floating point value X into a double-precision integer
+     which is then stored into LOW and HIGH.  If the value is not
+     integral, it is truncated.
+
+ -- Macro: void REAL_VALUE_FROM_INT (REAL_VALUE_TYPE X, HOST_WIDE_INT
+          LOW, HOST_WIDE_INT HIGH, enum machine_mode MODE)
+     Converts a double-precision integer found in LOW and HIGH, into a
+     floating point value which is then stored into X.  The value is
+     truncated to fit in mode MODE.
+
+
+File: gccint.info,  Node: Mode Switching,  Next: Target Attributes,  Prev: Floating Point,  Up: Target Macros
+
+17.24 Mode Switching Instructions
+=================================
+
+The following macros control mode switching optimizations:
+
+ -- Macro: OPTIMIZE_MODE_SWITCHING (ENTITY)
+     Define this macro if the port needs extra instructions inserted
+     for mode switching in an optimizing compilation.
+
+     For an example, the SH4 can perform both single and double
+     precision floating point operations, but to perform a single
+     precision operation, the FPSCR PR bit has to be cleared, while for
+     a double precision operation, this bit has to be set.  Changing
+     the PR bit requires a general purpose register as a scratch
+     register, hence these FPSCR sets have to be inserted before
+     reload, i.e. you can't put this into instruction emitting or
+     `TARGET_MACHINE_DEPENDENT_REORG'.
+
+     You can have multiple entities that are mode-switched, and select
+     at run time which entities actually need it.
+     `OPTIMIZE_MODE_SWITCHING' should return nonzero for any ENTITY
+     that needs mode-switching.  If you define this macro, you also
+     have to define `NUM_MODES_FOR_MODE_SWITCHING', `MODE_NEEDED',
+     `MODE_PRIORITY_TO_MODE' and `EMIT_MODE_SET'.  `MODE_AFTER',
+     `MODE_ENTRY', and `MODE_EXIT' are optional.
+
+ -- Macro: NUM_MODES_FOR_MODE_SWITCHING
+     If you define `OPTIMIZE_MODE_SWITCHING', you have to define this as
+     initializer for an array of integers.  Each initializer element N
+     refers to an entity that needs mode switching, and specifies the
+     number of different modes that might need to be set for this
+     entity.  The position of the initializer in the
+     initializer--starting counting at zero--determines the integer
+     that is used to refer to the mode-switched entity in question.  In
+     macros that take mode arguments / yield a mode result, modes are
+     represented as numbers 0 ... N - 1.  N is used to specify that no
+     mode switch is needed / supplied.
+
+ -- Macro: MODE_NEEDED (ENTITY, INSN)
+     ENTITY is an integer specifying a mode-switched entity.  If
+     `OPTIMIZE_MODE_SWITCHING' is defined, you must define this macro to
+     return an integer value not larger than the corresponding element
+     in `NUM_MODES_FOR_MODE_SWITCHING', to denote the mode that ENTITY
+     must be switched into prior to the execution of INSN.
+
+ -- Macro: MODE_AFTER (MODE, INSN)
+     If this macro is defined, it is evaluated for every INSN during
+     mode switching.  It determines the mode that an insn results in (if
+     different from the incoming mode).
+
+ -- Macro: MODE_ENTRY (ENTITY)
+     If this macro is defined, it is evaluated for every ENTITY that
+     needs mode switching.  It should evaluate to an integer, which is
+     a mode that ENTITY is assumed to be switched to at function entry.
+     If `MODE_ENTRY' is defined then `MODE_EXIT' must be defined.
+
+ -- Macro: MODE_EXIT (ENTITY)
+     If this macro is defined, it is evaluated for every ENTITY that
+     needs mode switching.  It should evaluate to an integer, which is
+     a mode that ENTITY is assumed to be switched to at function exit.
+     If `MODE_EXIT' is defined then `MODE_ENTRY' must be defined.
+
+ -- Macro: MODE_PRIORITY_TO_MODE (ENTITY, N)
+     This macro specifies the order in which modes for ENTITY are
+     processed.  0 is the highest priority,
+     `NUM_MODES_FOR_MODE_SWITCHING[ENTITY] - 1' the lowest.  The value
+     of the macro should be an integer designating a mode for ENTITY.
+     For any fixed ENTITY, `mode_priority_to_mode' (ENTITY, N) shall be
+     a bijection in 0 ...  `num_modes_for_mode_switching[ENTITY] - 1'.
+
+ -- Macro: EMIT_MODE_SET (ENTITY, MODE, HARD_REGS_LIVE)
+     Generate one or more insns to set ENTITY to MODE.  HARD_REG_LIVE
+     is the set of hard registers live at the point where the insn(s)
+     are to be inserted.
+
+
+File: gccint.info,  Node: Target Attributes,  Next: Emulated TLS,  Prev: Mode Switching,  Up: Target Macros
+
+17.25 Defining target-specific uses of `__attribute__'
+======================================================
+
+Target-specific attributes may be defined for functions, data and types.
+These are described using the following target hooks; they also need to
+be documented in `extend.texi'.
+
+ -- Target Hook: const struct attribute_spec * TARGET_ATTRIBUTE_TABLE
+     If defined, this target hook points to an array of `struct
+     attribute_spec' (defined in `tree.h') specifying the machine
+     specific attributes for this target and some of the restrictions
+     on the entities to which these attributes are applied and the
+     arguments they take.
+
+ -- Target Hook: int TARGET_COMP_TYPE_ATTRIBUTES (const_tree TYPE1,
+          const_tree TYPE2)
+     If defined, this target hook is a function which returns zero if
+     the attributes on TYPE1 and TYPE2 are incompatible, one if they
+     are compatible, and two if they are nearly compatible (which
+     causes a warning to be generated).  If this is not defined,
+     machine-specific attributes are supposed always to be compatible.
+
+ -- Target Hook: void TARGET_SET_DEFAULT_TYPE_ATTRIBUTES (tree TYPE)
+     If defined, this target hook is a function which assigns default
+     attributes to the newly defined TYPE.
+
+ -- Target Hook: tree TARGET_MERGE_TYPE_ATTRIBUTES (tree TYPE1, tree
+          TYPE2)
+     Define this target hook if the merging of type attributes needs
+     special handling.  If defined, the result is a list of the combined
+     `TYPE_ATTRIBUTES' of TYPE1 and TYPE2.  It is assumed that
+     `comptypes' has already been called and returned 1.  This function
+     may call `merge_attributes' to handle machine-independent merging.
+
+ -- Target Hook: tree TARGET_MERGE_DECL_ATTRIBUTES (tree OLDDECL, tree
+          NEWDECL)
+     Define this target hook if the merging of decl attributes needs
+     special handling.  If defined, the result is a list of the combined
+     `DECL_ATTRIBUTES' of OLDDECL and NEWDECL.  NEWDECL is a duplicate
+     declaration of OLDDECL.  Examples of when this is needed are when
+     one attribute overrides another, or when an attribute is nullified
+     by a subsequent definition.  This function may call
+     `merge_attributes' to handle machine-independent merging.
+
+     If the only target-specific handling you require is `dllimport'
+     for Microsoft Windows targets, you should define the macro
+     `TARGET_DLLIMPORT_DECL_ATTRIBUTES' to `1'.  The compiler will then
+     define a function called `merge_dllimport_decl_attributes' which
+     can then be defined as the expansion of
+     `TARGET_MERGE_DECL_ATTRIBUTES'.  You can also add
+     `handle_dll_attribute' in the attribute table for your port to
+     perform initial processing of the `dllimport' and `dllexport'
+     attributes.  This is done in `i386/cygwin.h' and `i386/i386.c',
+     for example.
+
+ -- Target Hook: bool TARGET_VALID_DLLIMPORT_ATTRIBUTE_P (const_tree
+          DECL)
+     DECL is a variable or function with `__attribute__((dllimport))'
+     specified. Use this hook if the target needs to add extra
+     validation checks to `handle_dll_attribute'.
+
+ -- Macro: TARGET_DECLSPEC
+     Define this macro to a nonzero value if you want to treat
+     `__declspec(X)' as equivalent to `__attribute((X))'.  By default,
+     this behavior is enabled only for targets that define
+     `TARGET_DLLIMPORT_DECL_ATTRIBUTES'.  The current implementation of
+     `__declspec' is via a built-in macro, but you should not rely on
+     this implementation detail.
+
+ -- Target Hook: void TARGET_INSERT_ATTRIBUTES (tree NODE, tree
+          *ATTR_PTR)
+     Define this target hook if you want to be able to add attributes
+     to a decl when it is being created.  This is normally useful for
+     back ends which wish to implement a pragma by using the attributes
+     which correspond to the pragma's effect.  The NODE argument is the
+     decl which is being created.  The ATTR_PTR argument is a pointer
+     to the attribute list for this decl.  The list itself should not
+     be modified, since it may be shared with other decls, but
+     attributes may be chained on the head of the list and `*ATTR_PTR'
+     modified to point to the new attributes, or a copy of the list may
+     be made if further changes are needed.
+
+ -- Target Hook: bool TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P (const_tree
+          FNDECL)
+     This target hook returns `true' if it is ok to inline FNDECL into
+     the current function, despite its having target-specific
+     attributes, `false' otherwise.  By default, if a function has a
+     target specific attribute attached to it, it will not be inlined.
+
+ -- Target Hook: bool TARGET_OPTION_VALID_ATTRIBUTE_P (tree FNDECL,
+          tree NAME, tree ARGS, int FLAGS)
+     This hook is called to parse the `attribute(option("..."))', and
+     it allows the function to set different target machine compile time
+     options for the current function that might be different than the
+     options specified on the command line.  The hook should return
+     `true' if the options are valid.
+
+     The hook should set the DECL_FUNCTION_SPECIFIC_TARGET field in the
+     function declaration to hold a pointer to a target specific STRUCT
+     CL_TARGET_OPTION structure.
+
+ -- Target Hook: void TARGET_OPTION_SAVE (struct cl_target_option *PTR)
+     This hook is called to save any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.  *Note Option file format::.
+
+ -- Target Hook: void TARGET_OPTION_RESTORE (struct cl_target_option
+          *PTR)
+     This hook is called to restore any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.
+
+ -- Target Hook: void TARGET_OPTION_PRINT (FILE *FILE, int INDENT,
+          struct cl_target_option *PTR)
+     This hook is called to print any additional target specific
+     information in the STRUCT CL_TARGET_OPTION structure for function
+     specific options.
+
+ -- Target Hook: bool TARGET_OPTION_PRAGMA_PARSE (target ARGS)
+     This target hook parses the options for `#pragma GCC option' to
+     set the machine specific options for functions that occur later in
+     the input stream.  The options should be the same as handled by the
+     `TARGET_VALID_OPTION_ATTRIBUTE_P' hook.
+
+ -- Target Hook: bool TARGET_CAN_INLINE_P (tree CALLER, tree CALLEE)
+     This target hook returns `false' if the CALLER function cannot
+     inline CALLEE, based on target specific information.  By default,
+     inlining is not allowed if the callee function has function
+     specific target options and the caller does not use the same
+     options.
+
+
+File: gccint.info,  Node: Emulated TLS,  Next: MIPS Coprocessors,  Prev: Target Attributes,  Up: Target Macros
+
+17.26 Emulating TLS
+===================
+
+For targets whose psABI does not provide Thread Local Storage via
+specific relocations and instruction sequences, an emulation layer is
+used.  A set of target hooks allows this emulation layer to be
+configured for the requirements of a particular target.  For instance
+the psABI may in fact specify TLS support in terms of an emulation
+layer.
+
+ The emulation layer works by creating a control object for every TLS
+object.  To access the TLS object, a lookup function is provided which,
+when given the address of the control object, will return the address
+of the current thread's instance of the TLS object.
+
+ -- Target Hook: const char * TARGET_EMUTLS_GET_ADDRESS
+     Contains the name of the helper function that uses a TLS control
+     object to locate a TLS instance.  The default causes libgcc's
+     emulated TLS helper function to be used.
+
+ -- Target Hook: const char * TARGET_EMUTLS_REGISTER_COMMON
+     Contains the name of the helper function that should be used at
+     program startup to register TLS objects that are implicitly
+     initialized to zero.  If this is `NULL', all TLS objects will have
+     explicit initializers.  The default causes libgcc's emulated TLS
+     registration function to be used.
+
+ -- Target Hook: const char * TARGET_EMUTLS_VAR_SECTION
+     Contains the name of the section in which TLS control variables
+     should be placed.  The default of `NULL' allows these to be placed
+     in any section.
+
+ -- Target Hook: const char * TARGET_EMUTLS_TMPL_SECTION
+     Contains the name of the section in which TLS initializers should
+     be placed.  The default of `NULL' allows these to be placed in any
+     section.
+
+ -- Target Hook: const char * TARGET_EMUTLS_VAR_PREFIX
+     Contains the prefix to be prepended to TLS control variable names.
+     The default of `NULL' uses a target-specific prefix.
+
+ -- Target Hook: const char * TARGET_EMUTLS_TMPL_PREFIX
+     Contains the prefix to be prepended to TLS initializer objects.
+     The default of `NULL' uses a target-specific prefix.
+
+ -- Target Hook: tree TARGET_EMUTLS_VAR_FIELDS (tree TYPE, tree *NAME)
+     Specifies a function that generates the FIELD_DECLs for a TLS
+     control object type.  TYPE is the RECORD_TYPE the fields are for
+     and NAME should be filled with the structure tag, if the default of
+     `__emutls_object' is unsuitable.  The default creates a type
+     suitable for libgcc's emulated TLS function.
+
+ -- Target Hook: tree TARGET_EMUTLS_VAR_INIT (tree VAR, tree DECL, tree
+          TMPL_ADDR)
+     Specifies a function that generates the CONSTRUCTOR to initialize a
+     TLS control object.  VAR is the TLS control object, DECL is the
+     TLS object and TMPL_ADDR is the address of the initializer.  The
+     default initializes libgcc's emulated TLS control object.
+
+ -- Target Hook: bool TARGET_EMUTLS_VAR_ALIGN_FIXED
+     Specifies whether the alignment of TLS control variable objects is
+     fixed and should not be increased as some backends may do to
+     optimize single objects.  The default is false.
+
+ -- Target Hook: bool TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS
+     Specifies whether a DWARF `DW_OP_form_tls_address' location
+     descriptor may be used to describe emulated TLS control objects.
+
+
+File: gccint.info,  Node: MIPS Coprocessors,  Next: PCH Target,  Prev: Emulated TLS,  Up: Target Macros
+
+17.27 Defining coprocessor specifics for MIPS targets.
+======================================================
+
+The MIPS specification allows MIPS implementations to have as many as 4
+coprocessors, each with as many as 32 private registers.  GCC supports
+accessing these registers and transferring values between the registers
+and memory using asm-ized variables.  For example:
+
+       register unsigned int cp0count asm ("c0r1");
+       unsigned int d;
+
+       d = cp0count + 3;
+
+ ("c0r1" is the default name of register 1 in coprocessor 0; alternate
+names may be added as described below, or the default names may be
+overridden entirely in `SUBTARGET_CONDITIONAL_REGISTER_USAGE'.)
+
+ Coprocessor registers are assumed to be epilogue-used; sets to them
+will be preserved even if it does not appear that the register is used
+again later in the function.
+
+ Another note: according to the MIPS spec, coprocessor 1 (if present) is
+the FPU.  One accesses COP1 registers through standard mips
+floating-point support; they are not included in this mechanism.
+
+ There is one macro used in defining the MIPS coprocessor interface
+which you may want to override in subtargets; it is described below.
+
+ -- Macro: ALL_COP_ADDITIONAL_REGISTER_NAMES
+     A comma-separated list (with leading comma) of pairs describing the
+     alternate names of coprocessor registers.  The format of each
+     entry should be
+          { ALTERNATENAME, REGISTER_NUMBER}
+     Default: empty.
+
+
+File: gccint.info,  Node: PCH Target,  Next: C++ ABI,  Prev: MIPS Coprocessors,  Up: Target Macros
+
+17.28 Parameters for Precompiled Header Validity Checking
+=========================================================
+
+ -- Target Hook: void * TARGET_GET_PCH_VALIDITY (size_t *SZ)
+     This hook returns a pointer to the data needed by
+     `TARGET_PCH_VALID_P' and sets `*SZ' to the size of the data in
+     bytes.
+
+ -- Target Hook: const char * TARGET_PCH_VALID_P (const void *DATA,
+          size_t SZ)
+     This hook checks whether the options used to create a PCH file are
+     compatible with the current settings.  It returns `NULL' if so and
+     a suitable error message if not.  Error messages will be presented
+     to the user and must be localized using `_(MSG)'.
+
+     DATA is the data that was returned by `TARGET_GET_PCH_VALIDITY'
+     when the PCH file was created and SZ is the size of that data in
+     bytes.  It's safe to assume that the data was created by the same
+     version of the compiler, so no format checking is needed.
+
+     The default definition of `default_pch_valid_p' should be suitable
+     for most targets.
+
+ -- Target Hook: const char * TARGET_CHECK_PCH_TARGET_FLAGS (int
+          PCH_FLAGS)
+     If this hook is nonnull, the default implementation of
+     `TARGET_PCH_VALID_P' will use it to check for compatible values of
+     `target_flags'.  PCH_FLAGS specifies the value that `target_flags'
+     had when the PCH file was created.  The return value is the same
+     as for `TARGET_PCH_VALID_P'.
+
+
+File: gccint.info,  Node: C++ ABI,  Next: Named Address Spaces,  Prev: PCH Target,  Up: Target Macros
+
+17.29 C++ ABI parameters
+========================
+
+ -- Target Hook: tree TARGET_CXX_GUARD_TYPE (void)
+     Define this hook to override the integer type used for guard
+     variables.  These are used to implement one-time construction of
+     static objects.  The default is long_long_integer_type_node.
+
+ -- Target Hook: bool TARGET_CXX_GUARD_MASK_BIT (void)
+     This hook determines how guard variables are used.  It should
+     return `false' (the default) if the first byte should be used.  A
+     return value of `true' indicates that only the least significant
+     bit should be used.
+
+ -- Target Hook: tree TARGET_CXX_GET_COOKIE_SIZE (tree TYPE)
+     This hook returns the size of the cookie to use when allocating an
+     array whose elements have the indicated TYPE.  Assumes that it is
+     already known that a cookie is needed.  The default is `max(sizeof
+     (size_t), alignof(type))', as defined in section 2.7 of the
+     IA64/Generic C++ ABI.
+
+ -- Target Hook: bool TARGET_CXX_COOKIE_HAS_SIZE (void)
+     This hook should return `true' if the element size should be
+     stored in array cookies.  The default is to return `false'.
+
+ -- Target Hook: int TARGET_CXX_IMPORT_EXPORT_CLASS (tree TYPE, int
+          IMPORT_EXPORT)
+     If defined by a backend this hook allows the decision made to
+     export class TYPE to be overruled.  Upon entry IMPORT_EXPORT will
+     contain 1 if the class is going to be exported, -1 if it is going
+     to be imported and 0 otherwise.  This function should return the
+     modified value and perform any other actions necessary to support
+     the backend's targeted operating system.
+
+ -- Target Hook: bool TARGET_CXX_CDTOR_RETURNS_THIS (void)
+     This hook should return `true' if constructors and destructors
+     return the address of the object created/destroyed.  The default
+     is to return `false'.
+
+ -- Target Hook: bool TARGET_CXX_KEY_METHOD_MAY_BE_INLINE (void)
+     This hook returns true if the key method for a class (i.e., the
+     method which, if defined in the current translation unit, causes
+     the virtual table to be emitted) may be an inline function.  Under
+     the standard Itanium C++ ABI the key method may be an inline
+     function so long as the function is not declared inline in the
+     class definition.  Under some variants of the ABI, an inline
+     function can never be the key method.  The default is to return
+     `true'.
+
+ -- Target Hook: void TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY (tree
+          DECL)
+     DECL is a virtual table, virtual table table, typeinfo object, or
+     other similar implicit class data object that will be emitted with
+     external linkage in this translation unit.  No ELF visibility has
+     been explicitly specified.  If the target needs to specify a
+     visibility other than that of the containing class, use this hook
+     to set `DECL_VISIBILITY' and `DECL_VISIBILITY_SPECIFIED'.
+
+ -- Target Hook: bool TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT (void)
+     This hook returns true (the default) if virtual tables and other
+     similar implicit class data objects are always COMDAT if they have
+     external linkage.  If this hook returns false, then class data for
+     classes whose virtual table will be emitted in only one translation
+     unit will not be COMDAT.
+
+ -- Target Hook: bool TARGET_CXX_LIBRARY_RTTI_COMDAT (void)
+     This hook returns true (the default) if the RTTI information for
+     the basic types which is defined in the C++ runtime should always
+     be COMDAT, false if it should not be COMDAT.
+
+ -- Target Hook: bool TARGET_CXX_USE_AEABI_ATEXIT (void)
+     This hook returns true if `__aeabi_atexit' (as defined by the ARM
+     EABI) should be used to register static destructors when
+     `-fuse-cxa-atexit' is in effect.  The default is to return false
+     to use `__cxa_atexit'.
+
+ -- Target Hook: bool TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT (void)
+     This hook returns true if the target `atexit' function can be used
+     in the same manner as `__cxa_atexit' to register C++ static
+     destructors. This requires that `atexit'-registered functions in
+     shared libraries are run in the correct order when the libraries
+     are unloaded. The default is to return false.
+
+ -- Target Hook: void TARGET_CXX_ADJUST_CLASS_AT_DEFINITION (tree TYPE)
+     TYPE is a C++ class (i.e., RECORD_TYPE or UNION_TYPE) that has
+     just been defined.  Use this hook to make adjustments to the class
+     (eg, tweak visibility or perform any other required target
+     modifications).
+
+
+File: gccint.info,  Node: Named Address Spaces,  Next: Misc,  Prev: C++ ABI,  Up: Target Macros
+
+17.30 Adding support for named address spaces
+=============================================
+
+The draft technical report of the ISO/IEC JTC1 S22 WG14 N1275 standards
+committee, `Programming Languages - C - Extensions to support embedded
+processors', specifies a syntax for embedded processors to specify
+alternate address spaces.  You can configure a GCC port to support
+section 5.1 of the draft report to add support for address spaces other
+than the default address space.  These address spaces are new keywords
+that are similar to the `volatile' and `const' type attributes.
+
+ Pointers to named address spaces can have a different size than
+pointers to the generic address space.
+
+ For example, the SPU port uses the `__ea' address space to refer to
+memory in the host processor, rather than memory local to the SPU
+processor.  Access to memory in the `__ea' address space involves
+issuing DMA operations to move data between the host processor and the
+local processor memory address space.  Pointers in the `__ea' address
+space are either 32 bits or 64 bits based on the `-mea32' or `-mea64'
+switches (native SPU pointers are always 32 bits).
+
+ Internally, address spaces are represented as a small integer in the
+range 0 to 15 with address space 0 being reserved for the generic
+address space.
+
+ -- Macro: TARGET_ADDR_SPACE_KEYWORDS
+     A list of `ADDR_SPACE_KEYWORD' macros to define each named address
+     keyword.  The `ADDR_SPACE_KEYWORD' macro takes two arguments, the
+     keyword string and the number of the named address space.  For
+     example, the SPU port uses the following to declare `__ea' as the
+     keyword for named address space #1:
+          #define ADDR_SPACE_EA 1
+          #define TARGET_ADDR_SPACE_KEYWORDS ADDR_SPACE_KEYWORD ("__ea", ADDR_SPACE_EA)
+
+ -- Target Hook: enum machine_mode TARGET_ADDR_SPACE_POINTER_MODE
+          (addr_space_t ADDRESS_SPACE)
+     Define this to return the machine mode to use for pointers to
+     ADDRESS_SPACE if the target supports named address spaces.  The
+     default version of this hook returns `ptr_mode' for the generic
+     address space only.
+
+ -- Target Hook: enum machine_mode TARGET_ADDR_SPACE_ADDRESS_MODE
+          (addr_space_t ADDRESS_SPACE)
+     Define this to return the machine mode to use for addresses in
+     ADDRESS_SPACE if the target supports named address spaces.  The
+     default version of this hook returns `Pmode' for the generic
+     address space only.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_VALID_POINTER_MODE (enum
+          machine_mode MODE, addr_space_t AS)
+     Define this to return nonzero if the port can handle pointers with
+     machine mode MODE to address space AS.  This target hook is the
+     same as the `TARGET_VALID_POINTER_MODE' target hook, except that
+     it includes explicit named address space support.  The default
+     version of this hook returns true for the modes returned by either
+     the `TARGET_ADDR_SPACE_POINTER_MODE' or
+     `TARGET_ADDR_SPACE_ADDRESS_MODE' target hooks for the given
+     address space.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P (enum
+          machine_mode MODE, rtx EXP, bool STRICT, addr_space_t AS)
+     Define this to return true if EXP is a valid address for mode MODE
+     in the named address space AS.  The STRICT parameter says whether
+     strict addressing is in effect after reload has finished.  This
+     target hook is the same as the `TARGET_LEGITIMATE_ADDRESS_P'
+     target hook, except that it includes explicit named address space
+     support.
+
+ -- Target Hook: rtx TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS (rtx X, rtx
+          OLDX, enum machine_mode MODE, addr_space_t AS)
+     Define this to modify an invalid address X to be a valid address
+     with mode MODE in the named address space AS.  This target hook is
+     the same as the `TARGET_LEGITIMIZE_ADDRESS' target hook, except
+     that it includes explicit named address space support.
+
+ -- Target Hook: bool TARGET_ADDR_SPACE_SUBSET_P (addr_space_t
+          SUPERSET, addr_space_t SUBSET)
+     Define this to return whether the SUBSET named address space is
+     contained within the SUPERSET named address space.  Pointers to a
+     named address space that is a subset of another named address space
+     will be converted automatically without a cast if used together in
+     arithmetic operations.  Pointers to a superset address space can be
+     converted to pointers to a subset address space via explicit casts.
+
+ -- Target Hook: rtx TARGET_ADDR_SPACE_CONVERT (rtx OP, tree FROM_TYPE,
+          tree TO_TYPE)
+     Define this to convert the pointer expression represented by the
+     RTL OP with type FROM_TYPE that points to a named address space to
+     a new pointer expression with type TO_TYPE that points to a
+     different named address space.  When this hook it called, it is
+     guaranteed that one of the two address spaces is a subset of the
+     other, as determined by the `TARGET_ADDR_SPACE_SUBSET_P' target
+     hook.
+
+
+File: gccint.info,  Node: Misc,  Prev: Named Address Spaces,  Up: Target Macros
+
+17.31 Miscellaneous Parameters
+==============================
+
+Here are several miscellaneous parameters.
+
+ -- Macro: HAS_LONG_COND_BRANCH
+     Define this boolean macro to indicate whether or not your
+     architecture has conditional branches that can span all of memory.
+     It is used in conjunction with an optimization that partitions hot
+     and cold basic blocks into separate sections of the executable.
+     If this macro is set to false, gcc will convert any conditional
+     branches that attempt to cross between sections into unconditional
+     branches or indirect jumps.
+
+ -- Macro: HAS_LONG_UNCOND_BRANCH
+     Define this boolean macro to indicate whether or not your
+     architecture has unconditional branches that can span all of
+     memory.  It is used in conjunction with an optimization that
+     partitions hot and cold basic blocks into separate sections of the
+     executable.  If this macro is set to false, gcc will convert any
+     unconditional branches that attempt to cross between sections into
+     indirect jumps.
+
+ -- Macro: CASE_VECTOR_MODE
+     An alias for a machine mode name.  This is the machine mode that
+     elements of a jump-table should have.
+
+ -- Macro: CASE_VECTOR_SHORTEN_MODE (MIN_OFFSET, MAX_OFFSET, BODY)
+     Optional: return the preferred mode for an `addr_diff_vec' when
+     the minimum and maximum offset are known.  If you define this, it
+     enables extra code in branch shortening to deal with
+     `addr_diff_vec'.  To make this work, you also have to define
+     `INSN_ALIGN' and make the alignment for `addr_diff_vec' explicit.
+     The BODY argument is provided so that the offset_unsigned and scale
+     flags can be updated.
+
+ -- Macro: CASE_VECTOR_PC_RELATIVE
+     Define this macro to be a C expression to indicate when jump-tables
+     should contain relative addresses.  You need not define this macro
+     if jump-tables never contain relative addresses, or jump-tables
+     should contain relative addresses only when `-fPIC' or `-fPIC' is
+     in effect.
+
+ -- Target Hook: unsigned int TARGET_CASE_VALUES_THRESHOLD (void)
+     This function return the smallest number of different values for
+     which it is best to use a jump-table instead of a tree of
+     conditional branches.  The default is four for machines with a
+     `casesi' instruction and five otherwise.  This is best for most
+     machines.
+
+ -- Macro: CASE_USE_BIT_TESTS
+     Define this macro to be a C expression to indicate whether C switch
+     statements may be implemented by a sequence of bit tests.  This is
+     advantageous on processors that can efficiently implement left
+     shift of 1 by the number of bits held in a register, but
+     inappropriate on targets that would require a loop.  By default,
+     this macro returns `true' if the target defines an `ashlsi3'
+     pattern, and `false' otherwise.
+
+ -- Macro: WORD_REGISTER_OPERATIONS
+     Define this macro if operations between registers with integral
+     mode smaller than a word are always performed on the entire
+     register.  Most RISC machines have this property and most CISC
+     machines do not.
+
+ -- Macro: LOAD_EXTEND_OP (MEM_MODE)
+     Define this macro to be a C expression indicating when insns that
+     read memory in MEM_MODE, an integral mode narrower than a word,
+     set the bits outside of MEM_MODE to be either the sign-extension
+     or the zero-extension of the data read.  Return `SIGN_EXTEND' for
+     values of MEM_MODE for which the insn sign-extends, `ZERO_EXTEND'
+     for which it zero-extends, and `UNKNOWN' for other modes.
+
+     This macro is not called with MEM_MODE non-integral or with a width
+     greater than or equal to `BITS_PER_WORD', so you may return any
+     value in this case.  Do not define this macro if it would always
+     return `UNKNOWN'.  On machines where this macro is defined, you
+     will normally define it as the constant `SIGN_EXTEND' or
+     `ZERO_EXTEND'.
+
+     You may return a non-`UNKNOWN' value even if for some hard
+     registers the sign extension is not performed, if for the
+     `REGNO_REG_CLASS' of these hard registers
+     `CANNOT_CHANGE_MODE_CLASS' returns nonzero when the FROM mode is
+     MEM_MODE and the TO mode is any integral mode larger than this but
+     not larger than `word_mode'.
+
+     You must return `UNKNOWN' if for some hard registers that allow
+     this mode, `CANNOT_CHANGE_MODE_CLASS' says that they cannot change
+     to `word_mode', but that they can change to another integral mode
+     that is larger then MEM_MODE but still smaller than `word_mode'.
+
+ -- Macro: SHORT_IMMEDIATES_SIGN_EXTEND
+     Define this macro if loading short immediate values into registers
+     sign extends.
+
+ -- Macro: FIXUNS_TRUNC_LIKE_FIX_TRUNC
+     Define this macro if the same instructions that convert a floating
+     point number to a signed fixed point number also convert validly
+     to an unsigned one.
+
+ -- Target Hook: unsigned int TARGET_MIN_DIVISIONS_FOR_RECIP_MUL (enum
+          machine_mode MODE)
+     When `-ffast-math' is in effect, GCC tries to optimize divisions
+     by the same divisor, by turning them into multiplications by the
+     reciprocal.  This target hook specifies the minimum number of
+     divisions that should be there for GCC to perform the optimization
+     for a variable of mode MODE.  The default implementation returns 3
+     if the machine has an instruction for the division, and 2 if it
+     does not.
+
+ -- Macro: MOVE_MAX
+     The maximum number of bytes that a single instruction can move
+     quickly between memory and registers or between two memory
+     locations.
+
+ -- Macro: MAX_MOVE_MAX
+     The maximum number of bytes that a single instruction can move
+     quickly between memory and registers or between two memory
+     locations.  If this is undefined, the default is `MOVE_MAX'.
+     Otherwise, it is the constant value that is the largest value that
+     `MOVE_MAX' can have at run-time.
+
+ -- Macro: SHIFT_COUNT_TRUNCATED
+     A C expression that is nonzero if on this machine the number of
+     bits actually used for the count of a shift operation is equal to
+     the number of bits needed to represent the size of the object
+     being shifted.  When this macro is nonzero, the compiler will
+     assume that it is safe to omit a sign-extend, zero-extend, and
+     certain bitwise `and' instructions that truncates the count of a
+     shift operation.  On machines that have instructions that act on
+     bit-fields at variable positions, which may include `bit test'
+     instructions, a nonzero `SHIFT_COUNT_TRUNCATED' also enables
+     deletion of truncations of the values that serve as arguments to
+     bit-field instructions.
+
+     If both types of instructions truncate the count (for shifts) and
+     position (for bit-field operations), or if no variable-position
+     bit-field instructions exist, you should define this macro.
+
+     However, on some machines, such as the 80386 and the 680x0,
+     truncation only applies to shift operations and not the (real or
+     pretended) bit-field operations.  Define `SHIFT_COUNT_TRUNCATED'
+     to be zero on such machines.  Instead, add patterns to the `md'
+     file that include the implied truncation of the shift instructions.
+
+     You need not define this macro if it would always have the value
+     of zero.
+
+ -- Target Hook: unsigned HOST_WIDE_INT TARGET_SHIFT_TRUNCATION_MASK
+          (enum machine_mode MODE)
+     This function describes how the standard shift patterns for MODE
+     deal with shifts by negative amounts or by more than the width of
+     the mode.  *Note shift patterns::.
+
+     On many machines, the shift patterns will apply a mask M to the
+     shift count, meaning that a fixed-width shift of X by Y is
+     equivalent to an arbitrary-width shift of X by Y & M.  If this is
+     true for mode MODE, the function should return M, otherwise it
+     should return 0.  A return value of 0 indicates that no particular
+     behavior is guaranteed.
+
+     Note that, unlike `SHIFT_COUNT_TRUNCATED', this function does
+     _not_ apply to general shift rtxes; it applies only to instructions
+     that are generated by the named shift patterns.
+
+     The default implementation of this function returns
+     `GET_MODE_BITSIZE (MODE) - 1' if `SHIFT_COUNT_TRUNCATED' and 0
+     otherwise.  This definition is always safe, but if
+     `SHIFT_COUNT_TRUNCATED' is false, and some shift patterns
+     nevertheless truncate the shift count, you may get better code by
+     overriding it.
+
+ -- Macro: TRULY_NOOP_TRUNCATION (OUTPREC, INPREC)
+     A C expression which is nonzero if on this machine it is safe to
+     "convert" an integer of INPREC bits to one of OUTPREC bits (where
+     OUTPREC is smaller than INPREC) by merely operating on it as if it
+     had only OUTPREC bits.
+
+     On many machines, this expression can be 1.
+
+     When `TRULY_NOOP_TRUNCATION' returns 1 for a pair of sizes for
+     modes for which `MODES_TIEABLE_P' is 0, suboptimal code can result.
+     If this is the case, making `TRULY_NOOP_TRUNCATION' return 0 in
+     such cases may improve things.
+
+ -- Target Hook: int TARGET_MODE_REP_EXTENDED (enum machine_mode MODE,
+          enum machine_mode REP_MODE)
+     The representation of an integral mode can be such that the values
+     are always extended to a wider integral mode.  Return
+     `SIGN_EXTEND' if values of MODE are represented in sign-extended
+     form to REP_MODE.  Return `UNKNOWN' otherwise.  (Currently, none
+     of the targets use zero-extended representation this way so unlike
+     `LOAD_EXTEND_OP', `TARGET_MODE_REP_EXTENDED' is expected to return
+     either `SIGN_EXTEND' or `UNKNOWN'.  Also no target extends MODE to
+     REP_MODE so that REP_MODE is not the next widest integral mode and
+     currently we take advantage of this fact.)
+
+     Similarly to `LOAD_EXTEND_OP' you may return a non-`UNKNOWN' value
+     even if the extension is not performed on certain hard registers
+     as long as for the `REGNO_REG_CLASS' of these hard registers
+     `CANNOT_CHANGE_MODE_CLASS' returns nonzero.
+
+     Note that `TARGET_MODE_REP_EXTENDED' and `LOAD_EXTEND_OP' describe
+     two related properties.  If you define `TARGET_MODE_REP_EXTENDED
+     (mode, word_mode)' you probably also want to define
+     `LOAD_EXTEND_OP (mode)' to return the same type of extension.
+
+     In order to enforce the representation of `mode',
+     `TRULY_NOOP_TRUNCATION' should return false when truncating to
+     `mode'.
+
+ -- Macro: STORE_FLAG_VALUE
+     A C expression describing the value returned by a comparison
+     operator with an integral mode and stored by a store-flag
+     instruction (`sCOND') when the condition is true.  This
+     description must apply to _all_ the `sCOND' patterns and all the
+     comparison operators whose results have a `MODE_INT' mode.
+
+     A value of 1 or -1 means that the instruction implementing the
+     comparison operator returns exactly 1 or -1 when the comparison is
+     true and 0 when the comparison is false.  Otherwise, the value
+     indicates which bits of the result are guaranteed to be 1 when the
+     comparison is true.  This value is interpreted in the mode of the
+     comparison operation, which is given by the mode of the first
+     operand in the `sCOND' pattern.  Either the low bit or the sign
+     bit of `STORE_FLAG_VALUE' be on.  Presently, only those bits are
+     used by the compiler.
+
+     If `STORE_FLAG_VALUE' is neither 1 or -1, the compiler will
+     generate code that depends only on the specified bits.  It can also
+     replace comparison operators with equivalent operations if they
+     cause the required bits to be set, even if the remaining bits are
+     undefined.  For example, on a machine whose comparison operators
+     return an `SImode' value and where `STORE_FLAG_VALUE' is defined as
+     `0x80000000', saying that just the sign bit is relevant, the
+     expression
+
+          (ne:SI (and:SI X (const_int POWER-OF-2)) (const_int 0))
+
+     can be converted to
+
+          (ashift:SI X (const_int N))
+
+     where N is the appropriate shift count to move the bit being
+     tested into the sign bit.
+
+     There is no way to describe a machine that always sets the
+     low-order bit for a true value, but does not guarantee the value
+     of any other bits, but we do not know of any machine that has such
+     an instruction.  If you are trying to port GCC to such a machine,
+     include an instruction to perform a logical-and of the result with
+     1 in the pattern for the comparison operators and let us know at
+     <gcc@gcc.gnu.org>.
+
+     Often, a machine will have multiple instructions that obtain a
+     value from a comparison (or the condition codes).  Here are rules
+     to guide the choice of value for `STORE_FLAG_VALUE', and hence the
+     instructions to be used:
+
+        * Use the shortest sequence that yields a valid definition for
+          `STORE_FLAG_VALUE'.  It is more efficient for the compiler to
+          "normalize" the value (convert it to, e.g., 1 or 0) than for
+          the comparison operators to do so because there may be
+          opportunities to combine the normalization with other
+          operations.
+
+        * For equal-length sequences, use a value of 1 or -1, with -1
+          being slightly preferred on machines with expensive jumps and
+          1 preferred on other machines.
+
+        * As a second choice, choose a value of `0x80000001' if
+          instructions exist that set both the sign and low-order bits
+          but do not define the others.
+
+        * Otherwise, use a value of `0x80000000'.
+
+     Many machines can produce both the value chosen for
+     `STORE_FLAG_VALUE' and its negation in the same number of
+     instructions.  On those machines, you should also define a pattern
+     for those cases, e.g., one matching
+
+          (set A (neg:M (ne:M B C)))
+
+     Some machines can also perform `and' or `plus' operations on
+     condition code values with less instructions than the corresponding
+     `sCOND' insn followed by `and' or `plus'.  On those machines,
+     define the appropriate patterns.  Use the names `incscc' and
+     `decscc', respectively, for the patterns which perform `plus' or
+     `minus' operations on condition code values.  See `rs6000.md' for
+     some examples.  The GNU Superoptizer can be used to find such
+     instruction sequences on other machines.
+
+     If this macro is not defined, the default value, 1, is used.  You
+     need not define `STORE_FLAG_VALUE' if the machine has no store-flag
+     instructions, or if the value generated by these instructions is 1.
+
+ -- Macro: FLOAT_STORE_FLAG_VALUE (MODE)
+     A C expression that gives a nonzero `REAL_VALUE_TYPE' value that is
+     returned when comparison operators with floating-point results are
+     true.  Define this macro on machines that have comparison
+     operations that return floating-point values.  If there are no
+     such operations, do not define this macro.
+
+ -- Macro: VECTOR_STORE_FLAG_VALUE (MODE)
+     A C expression that gives a rtx representing the nonzero true
+     element for vector comparisons.  The returned rtx should be valid
+     for the inner mode of MODE which is guaranteed to be a vector
+     mode.  Define this macro on machines that have vector comparison
+     operations that return a vector result.  If there are no such
+     operations, do not define this macro.  Typically, this macro is
+     defined as `const1_rtx' or `constm1_rtx'.  This macro may return
+     `NULL_RTX' to prevent the compiler optimizing such vector
+     comparison operations for the given mode.
+
+ -- Macro: CLZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE)
+ -- Macro: CTZ_DEFINED_VALUE_AT_ZERO (MODE, VALUE)
+     A C expression that indicates whether the architecture defines a
+     value for `clz' or `ctz' with a zero operand.  A result of `0'
+     indicates the value is undefined.  If the value is defined for
+     only the RTL expression, the macro should evaluate to `1'; if the
+     value applies also to the corresponding optab entry (which is
+     normally the case if it expands directly into the corresponding
+     RTL), then the macro should evaluate to `2'.  In the cases where
+     the value is defined, VALUE should be set to this value.
+
+     If this macro is not defined, the value of `clz' or `ctz' at zero
+     is assumed to be undefined.
+
+     This macro must be defined if the target's expansion for `ffs'
+     relies on a particular value to get correct results.  Otherwise it
+     is not necessary, though it may be used to optimize some corner
+     cases, and to provide a default expansion for the `ffs' optab.
+
+     Note that regardless of this macro the "definedness" of `clz' and
+     `ctz' at zero do _not_ extend to the builtin functions visible to
+     the user.  Thus one may be free to adjust the value at will to
+     match the target expansion of these operations without fear of
+     breaking the API.
+
+ -- Macro: Pmode
+     An alias for the machine mode for pointers.  On most machines,
+     define this to be the integer mode corresponding to the width of a
+     hardware pointer; `SImode' on 32-bit machine or `DImode' on 64-bit
+     machines.  On some machines you must define this to be one of the
+     partial integer modes, such as `PSImode'.
+
+     The width of `Pmode' must be at least as large as the value of
+     `POINTER_SIZE'.  If it is not equal, you must define the macro
+     `POINTERS_EXTEND_UNSIGNED' to specify how pointers are extended to
+     `Pmode'.
+
+ -- Macro: FUNCTION_MODE
+     An alias for the machine mode used for memory references to
+     functions being called, in `call' RTL expressions.  On most CISC
+     machines, where an instruction can begin at any byte address, this
+     should be `QImode'.  On most RISC machines, where all instructions
+     have fixed size and alignment, this should be a mode with the same
+     size and alignment as the machine instruction words - typically
+     `SImode' or `HImode'.
+
+ -- Macro: STDC_0_IN_SYSTEM_HEADERS
+     In normal operation, the preprocessor expands `__STDC__' to the
+     constant 1, to signify that GCC conforms to ISO Standard C.  On
+     some hosts, like Solaris, the system compiler uses a different
+     convention, where `__STDC__' is normally 0, but is 1 if the user
+     specifies strict conformance to the C Standard.
+
+     Defining `STDC_0_IN_SYSTEM_HEADERS' makes GNU CPP follows the host
+     convention when processing system header files, but when
+     processing user files `__STDC__' will always expand to 1.
+
+ -- Macro: NO_IMPLICIT_EXTERN_C
+     Define this macro if the system header files support C++ as well
+     as C.  This macro inhibits the usual method of using system header
+     files in C++, which is to pretend that the file's contents are
+     enclosed in `extern "C" {...}'.
+
+ -- Macro: REGISTER_TARGET_PRAGMAS ()
+     Define this macro if you want to implement any target-specific
+     pragmas.  If defined, it is a C expression which makes a series of
+     calls to `c_register_pragma' or `c_register_pragma_with_expansion'
+     for each pragma.  The macro may also do any setup required for the
+     pragmas.
+
+     The primary reason to define this macro is to provide
+     compatibility with other compilers for the same target.  In
+     general, we discourage definition of target-specific pragmas for
+     GCC.
+
+     If the pragma can be implemented by attributes then you should
+     consider defining the target hook `TARGET_INSERT_ATTRIBUTES' as
+     well.
+
+     Preprocessor macros that appear on pragma lines are not expanded.
+     All `#pragma' directives that do not match any registered pragma
+     are silently ignored, unless the user specifies
+     `-Wunknown-pragmas'.
+
+ -- Function: void c_register_pragma (const char *SPACE, const char
+          *NAME, void (*CALLBACK) (struct cpp_reader *))
+ -- Function: void c_register_pragma_with_expansion (const char *SPACE,
+          const char *NAME, void (*CALLBACK) (struct cpp_reader *))
+     Each call to `c_register_pragma' or
+     `c_register_pragma_with_expansion' establishes one pragma.  The
+     CALLBACK routine will be called when the preprocessor encounters a
+     pragma of the form
+
+          #pragma [SPACE] NAME ...
+
+     SPACE is the case-sensitive namespace of the pragma, or `NULL' to
+     put the pragma in the global namespace.  The callback routine
+     receives PFILE as its first argument, which can be passed on to
+     cpplib's functions if necessary.  You can lex tokens after the
+     NAME by calling `pragma_lex'.  Tokens that are not read by the
+     callback will be silently ignored.  The end of the line is
+     indicated by a token of type `CPP_EOF'.  Macro expansion occurs on
+     the arguments of pragmas registered with
+     `c_register_pragma_with_expansion' but not on the arguments of
+     pragmas registered with `c_register_pragma'.
+
+     Note that the use of `pragma_lex' is specific to the C and C++
+     compilers.  It will not work in the Java or Fortran compilers, or
+     any other language compilers for that matter.  Thus if
+     `pragma_lex' is going to be called from target-specific code, it
+     must only be done so when building the C and C++ compilers.  This
+     can be done by defining the variables `c_target_objs' and
+     `cxx_target_objs' in the target entry in the `config.gcc' file.
+     These variables should name the target-specific, language-specific
+     object file which contains the code that uses `pragma_lex'.  Note
+     it will also be necessary to add a rule to the makefile fragment
+     pointed to by `tmake_file' that shows how to build this object
+     file.
+
+ -- Macro: HANDLE_SYSV_PRAGMA
+     Define this macro (to a value of 1) if you want the System V style
+     pragmas `#pragma pack(<n>)' and `#pragma weak <name> [=<value>]'
+     to be supported by gcc.
+
+     The pack pragma specifies the maximum alignment (in bytes) of
+     fields within a structure, in much the same way as the
+     `__aligned__' and `__packed__' `__attribute__'s do.  A pack value
+     of zero resets the behavior to the default.
+
+     A subtlety for Microsoft Visual C/C++ style bit-field packing
+     (e.g. -mms-bitfields) for targets that support it: When a
+     bit-field is inserted into a packed record, the whole size of the
+     underlying type is used by one or more same-size adjacent
+     bit-fields (that is, if its long:3, 32 bits is used in the record,
+     and any additional adjacent long bit-fields are packed into the
+     same chunk of 32 bits.  However, if the size changes, a new field
+     of that size is allocated).
+
+     If both MS bit-fields and `__attribute__((packed))' are used, the
+     latter will take precedence.  If `__attribute__((packed))' is used
+     on a single field when MS bit-fields are in use, it will take
+     precedence for that field, but the alignment of the rest of the
+     structure may affect its placement.
+
+     The weak pragma only works if `SUPPORTS_WEAK' and
+     `ASM_WEAKEN_LABEL' are defined.  If enabled it allows the creation
+     of specifically named weak labels, optionally with a value.
+
+ -- Macro: HANDLE_PRAGMA_PACK_PUSH_POP
+     Define this macro (to a value of 1) if you want to support the
+     Win32 style pragmas `#pragma pack(push[,N])' and `#pragma
+     pack(pop)'.  The `pack(push,[N])' pragma specifies the maximum
+     alignment (in bytes) of fields within a structure, in much the
+     same way as the `__aligned__' and `__packed__' `__attribute__'s
+     do.  A pack value of zero resets the behavior to the default.
+     Successive invocations of this pragma cause the previous values to
+     be stacked, so that invocations of `#pragma pack(pop)' will return
+     to the previous value.
+
+ -- Macro: HANDLE_PRAGMA_PACK_WITH_EXPANSION
+     Define this macro, as well as `HANDLE_SYSV_PRAGMA', if macros
+     should be expanded in the arguments of `#pragma pack'.
+
+ -- Target Hook: bool TARGET_HANDLE_PRAGMA_EXTERN_PREFIX
+     True if `#pragma extern_prefix' is to be supported.
+
+ -- Macro: TARGET_DEFAULT_PACK_STRUCT
+     If your target requires a structure packing default other than 0
+     (meaning the machine default), define this macro to the necessary
+     value (in bytes).  This must be a value that would also be valid
+     to use with `#pragma pack()' (that is, a small power of two).
+
+ -- Macro: DOLLARS_IN_IDENTIFIERS
+     Define this macro to control use of the character `$' in
+     identifier names for the C family of languages.  0 means `$' is
+     not allowed by default; 1 means it is allowed.  1 is the default;
+     there is no need to define this macro in that case.
+
+ -- Macro: NO_DOLLAR_IN_LABEL
+     Define this macro if the assembler does not accept the character
+     `$' in label names.  By default constructors and destructors in
+     G++ have `$' in the identifiers.  If this macro is defined, `.' is
+     used instead.
+
+ -- Macro: NO_DOT_IN_LABEL
+     Define this macro if the assembler does not accept the character
+     `.' in label names.  By default constructors and destructors in G++
+     have names that use `.'.  If this macro is defined, these names
+     are rewritten to avoid `.'.
+
+ -- Macro: INSN_SETS_ARE_DELAYED (INSN)
+     Define this macro as a C expression that is nonzero if it is safe
+     for the delay slot scheduler to place instructions in the delay
+     slot of INSN, even if they appear to use a resource set or
+     clobbered in INSN.  INSN is always a `jump_insn' or an `insn'; GCC
+     knows that every `call_insn' has this behavior.  On machines where
+     some `insn' or `jump_insn' is really a function call and hence has
+     this behavior, you should define this macro.
+
+     You need not define this macro if it would always return zero.
+
+ -- Macro: INSN_REFERENCES_ARE_DELAYED (INSN)
+     Define this macro as a C expression that is nonzero if it is safe
+     for the delay slot scheduler to place instructions in the delay
+     slot of INSN, even if they appear to set or clobber a resource
+     referenced in INSN.  INSN is always a `jump_insn' or an `insn'.
+     On machines where some `insn' or `jump_insn' is really a function
+     call and its operands are registers whose use is actually in the
+     subroutine it calls, you should define this macro.  Doing so
+     allows the delay slot scheduler to move instructions which copy
+     arguments into the argument registers into the delay slot of INSN.
+
+     You need not define this macro if it would always return zero.
+
+ -- Macro: MULTIPLE_SYMBOL_SPACES
+     Define this macro as a C expression that is nonzero if, in some
+     cases, global symbols from one translation unit may not be bound
+     to undefined symbols in another translation unit without user
+     intervention.  For instance, under Microsoft Windows symbols must
+     be explicitly imported from shared libraries (DLLs).
+
+     You need not define this macro if it would always evaluate to zero.
+
+ -- Target Hook: tree TARGET_MD_ASM_CLOBBERS (tree OUTPUTS, tree
+          INPUTS, tree CLOBBERS)
+     This target hook should add to CLOBBERS `STRING_CST' trees for any
+     hard regs the port wishes to automatically clobber for an asm.  It
+     should return the result of the last `tree_cons' used to add a
+     clobber.  The OUTPUTS, INPUTS and CLOBBER lists are the
+     corresponding parameters to the asm and may be inspected to avoid
+     clobbering a register that is an input or output of the asm.  You
+     can use `tree_overlaps_hard_reg_set', declared in `tree.h', to test
+     for overlap with regards to asm-declared registers.
+
+ -- Macro: MATH_LIBRARY
+     Define this macro as a C string constant for the linker argument
+     to link in the system math library, or `""' if the target does not
+     have a separate math library.
+
+     You need only define this macro if the default of `"-lm"' is wrong.
+
+ -- Macro: LIBRARY_PATH_ENV
+     Define this macro as a C string constant for the environment
+     variable that specifies where the linker should look for libraries.
+
+     You need only define this macro if the default of `"LIBRARY_PATH"'
+     is wrong.
+
+ -- Macro: TARGET_POSIX_IO
+     Define this macro if the target supports the following POSIX file
+     functions, access, mkdir and  file locking with fcntl / F_SETLKW.
+     Defining `TARGET_POSIX_IO' will enable the test coverage code to
+     use file locking when exiting a program, which avoids race
+     conditions if the program has forked. It will also create
+     directories at run-time for cross-profiling.
+
+ -- Macro: MAX_CONDITIONAL_EXECUTE
+     A C expression for the maximum number of instructions to execute
+     via conditional execution instructions instead of a branch.  A
+     value of `BRANCH_COST'+1 is the default if the machine does not
+     use cc0, and 1 if it does use cc0.
+
+ -- Macro: IFCVT_MODIFY_TESTS (CE_INFO, TRUE_EXPR, FALSE_EXPR)
+     Used if the target needs to perform machine-dependent
+     modifications on the conditionals used for turning basic blocks
+     into conditionally executed code.  CE_INFO points to a data
+     structure, `struct ce_if_block', which contains information about
+     the currently processed blocks.  TRUE_EXPR and FALSE_EXPR are the
+     tests that are used for converting the then-block and the
+     else-block, respectively.  Set either TRUE_EXPR or FALSE_EXPR to a
+     null pointer if the tests cannot be converted.
+
+ -- Macro: IFCVT_MODIFY_MULTIPLE_TESTS (CE_INFO, BB, TRUE_EXPR,
+          FALSE_EXPR)
+     Like `IFCVT_MODIFY_TESTS', but used when converting more
+     complicated if-statements into conditions combined by `and' and
+     `or' operations.  BB contains the basic block that contains the
+     test that is currently being processed and about to be turned into
+     a condition.
+
+ -- Macro: IFCVT_MODIFY_INSN (CE_INFO, PATTERN, INSN)
+     A C expression to modify the PATTERN of an INSN that is to be
+     converted to conditional execution format.  CE_INFO points to a
+     data structure, `struct ce_if_block', which contains information
+     about the currently processed blocks.
+
+ -- Macro: IFCVT_MODIFY_FINAL (CE_INFO)
+     A C expression to perform any final machine dependent
+     modifications in converting code to conditional execution.  The
+     involved basic blocks can be found in the `struct ce_if_block'
+     structure that is pointed to by CE_INFO.
+
+ -- Macro: IFCVT_MODIFY_CANCEL (CE_INFO)
+     A C expression to cancel any machine dependent modifications in
+     converting code to conditional execution.  The involved basic
+     blocks can be found in the `struct ce_if_block' structure that is
+     pointed to by CE_INFO.
+
+ -- Macro: IFCVT_INIT_EXTRA_FIELDS (CE_INFO)
+     A C expression to initialize any extra fields in a `struct
+     ce_if_block' structure, which are defined by the
+     `IFCVT_EXTRA_FIELDS' macro.
+
+ -- Macro: IFCVT_EXTRA_FIELDS
+     If defined, it should expand to a set of field declarations that
+     will be added to the `struct ce_if_block' structure.  These should
+     be initialized by the `IFCVT_INIT_EXTRA_FIELDS' macro.
+
+ -- Target Hook: void TARGET_MACHINE_DEPENDENT_REORG (void)
+     If non-null, this hook performs a target-specific pass over the
+     instruction stream.  The compiler will run it at all optimization
+     levels, just before the point at which it normally does
+     delayed-branch scheduling.
+
+     The exact purpose of the hook varies from target to target.  Some
+     use it to do transformations that are necessary for correctness,
+     such as laying out in-function constant pools or avoiding hardware
+     hazards.  Others use it as an opportunity to do some
+     machine-dependent optimizations.
+
+     You need not implement the hook if it has nothing to do.  The
+     default definition is null.
+
+ -- Target Hook: void TARGET_INIT_BUILTINS (void)
+     Define this hook if you have any machine-specific built-in
+     functions that need to be defined.  It should be a function that
+     performs the necessary setup.
+
+     Machine specific built-in functions can be useful to expand
+     special machine instructions that would otherwise not normally be
+     generated because they have no equivalent in the source language
+     (for example, SIMD vector instructions or prefetch instructions).
+
+     To create a built-in function, call the function
+     `lang_hooks.builtin_function' which is defined by the language
+     front end.  You can use any type nodes set up by
+     `build_common_tree_nodes' and `build_common_tree_nodes_2'; only
+     language front ends that use those two functions will call
+     `TARGET_INIT_BUILTINS'.
+
+ -- Target Hook: tree TARGET_BUILTIN_DECL (unsigned CODE, bool
+          INITIALIZE_P)
+     Define this hook if you have any machine-specific built-in
+     functions that need to be defined.  It should be a function that
+     returns the builtin function declaration for the builtin function
+     code CODE.  If there is no such builtin and it cannot be
+     initialized at this time if INITIALIZE_P is true the function
+     should return `NULL_TREE'.  If CODE is out of range the function
+     should return `error_mark_node'.
+
+ -- Target Hook: rtx TARGET_EXPAND_BUILTIN (tree EXP, rtx TARGET, rtx
+          SUBTARGET, enum machine_mode MODE, int IGNORE)
+     Expand a call to a machine specific built-in function that was set
+     up by `TARGET_INIT_BUILTINS'.  EXP is the expression for the
+     function call; the result should go to TARGET if that is
+     convenient, and have mode MODE if that is convenient.  SUBTARGET
+     may be used as the target for computing one of EXP's operands.
+     IGNORE is nonzero if the value is to be ignored.  This function
+     should return the result of the call to the built-in function.
+
+ -- Target Hook: tree TARGET_RESOLVE_OVERLOADED_BUILTIN (unsigned int
+          LOC, tree FNDECL, void *ARGLIST)
+     Select a replacement for a machine specific built-in function that
+     was set up by `TARGET_INIT_BUILTINS'.  This is done _before_
+     regular type checking, and so allows the target to implement a
+     crude form of function overloading.  FNDECL is the declaration of
+     the built-in function.  ARGLIST is the list of arguments passed to
+     the built-in function.  The result is a complete expression that
+     implements the operation, usually another `CALL_EXPR'.  ARGLIST
+     really has type `VEC(tree,gc)*'
+
+ -- Target Hook: tree TARGET_FOLD_BUILTIN (tree FNDECL, tree ARGLIST,
+          bool IGNORE)
+     Fold a call to a machine specific built-in function that was set
+     up by `TARGET_INIT_BUILTINS'.  FNDECL is the declaration of the
+     built-in function.  ARGLIST is the list of arguments passed to the
+     built-in function.  The result is another tree containing a
+     simplified expression for the call's result.  If IGNORE is true
+     the value will be ignored.
+
+ -- Target Hook: const char * TARGET_INVALID_WITHIN_DOLOOP (const_rtx
+          INSN)
+     Take an instruction in INSN and return NULL if it is valid within a
+     low-overhead loop, otherwise return a string explaining why doloop
+     could not be applied.
+
+     Many targets use special registers for low-overhead looping. For
+     any instruction that clobbers these this function should return a
+     string indicating the reason why the doloop could not be applied.
+     By default, the RTL loop optimizer does not use a present doloop
+     pattern for loops containing function calls or branch on table
+     instructions.
+
+ -- Macro: MD_CAN_REDIRECT_BRANCH (BRANCH1, BRANCH2)
+     Take a branch insn in BRANCH1 and another in BRANCH2.  Return true
+     if redirecting BRANCH1 to the destination of BRANCH2 is possible.
+
+     On some targets, branches may have a limited range.  Optimizing the
+     filling of delay slots can result in branches being redirected,
+     and this may in turn cause a branch offset to overflow.
+
+ -- Target Hook: bool TARGET_COMMUTATIVE_P (const_rtx X, int OUTER_CODE)
+     This target hook returns `true' if X is considered to be
+     commutative.  Usually, this is just COMMUTATIVE_P (X), but the HP
+     PA doesn't consider PLUS to be commutative inside a MEM.
+     OUTER_CODE is the rtx code of the enclosing rtl, if known,
+     otherwise it is UNKNOWN.
+
+ -- Target Hook: rtx TARGET_ALLOCATE_INITIAL_VALUE (rtx HARD_REG)
+     When the initial value of a hard register has been copied in a
+     pseudo register, it is often not necessary to actually allocate
+     another register to this pseudo register, because the original
+     hard register or a stack slot it has been saved into can be used.
+     `TARGET_ALLOCATE_INITIAL_VALUE' is called at the start of register
+     allocation once for each hard register that had its initial value
+     copied by using `get_func_hard_reg_initial_val' or
+     `get_hard_reg_initial_val'.  Possible values are `NULL_RTX', if
+     you don't want to do any special allocation, a `REG' rtx--that
+     would typically be the hard register itself, if it is known not to
+     be clobbered--or a `MEM'.  If you are returning a `MEM', this is
+     only a hint for the allocator; it might decide to use another
+     register anyways.  You may use `current_function_leaf_function' in
+     the hook, functions that use `REG_N_SETS', to determine if the hard
+     register in question will not be clobbered.  The default value of
+     this hook is `NULL', which disables any special allocation.
+
+ -- Target Hook: int TARGET_UNSPEC_MAY_TRAP_P (const_rtx X, unsigned
+          FLAGS)
+     This target hook returns nonzero if X, an `unspec' or
+     `unspec_volatile' operation, might cause a trap.  Targets can use
+     this hook to enhance precision of analysis for `unspec' and
+     `unspec_volatile' operations.  You may call `may_trap_p_1' to
+     analyze inner elements of X in which case FLAGS should be passed
+     along.
+
+ -- Target Hook: void TARGET_SET_CURRENT_FUNCTION (tree DECL)
+     The compiler invokes this hook whenever it changes its current
+     function context (`cfun').  You can define this function if the
+     back end needs to perform any initialization or reset actions on a
+     per-function basis.  For example, it may be used to implement
+     function attributes that affect register usage or code generation
+     patterns.  The argument DECL is the declaration for the new
+     function context, and may be null to indicate that the compiler
+     has left a function context and is returning to processing at the
+     top level.  The default hook function does nothing.
+
+     GCC sets `cfun' to a dummy function context during initialization
+     of some parts of the back end.  The hook function is not invoked
+     in this situation; you need not worry about the hook being invoked
+     recursively, or when the back end is in a partially-initialized
+     state.  `cfun' might be `NULL' to indicate processing at top level,
+     outside of any function scope.
+
+ -- Macro: TARGET_OBJECT_SUFFIX
+     Define this macro to be a C string representing the suffix for
+     object files on your target machine.  If you do not define this
+     macro, GCC will use `.o' as the suffix for object files.
+
+ -- Macro: TARGET_EXECUTABLE_SUFFIX
+     Define this macro to be a C string representing the suffix to be
+     automatically added to executable files on your target machine.
+     If you do not define this macro, GCC will use the null string as
+     the suffix for executable files.
+
+ -- Macro: COLLECT_EXPORT_LIST
+     If defined, `collect2' will scan the individual object files
+     specified on its command line and create an export list for the
+     linker.  Define this macro for systems like AIX, where the linker
+     discards object files that are not referenced from `main' and uses
+     export lists.
+
+ -- Macro: MODIFY_JNI_METHOD_CALL (MDECL)
+     Define this macro to a C expression representing a variant of the
+     method call MDECL, if Java Native Interface (JNI) methods must be
+     invoked differently from other methods on your target.  For
+     example, on 32-bit Microsoft Windows, JNI methods must be invoked
+     using the `stdcall' calling convention and this macro is then
+     defined as this expression:
+
+          build_type_attribute_variant (MDECL,
+                                        build_tree_list
+                                        (get_identifier ("stdcall"),
+                                         NULL))
+
+ -- Target Hook: bool TARGET_CANNOT_MODIFY_JUMPS_P (void)
+     This target hook returns `true' past the point in which new jump
+     instructions could be created.  On machines that require a
+     register for every jump such as the SHmedia ISA of SH5, this point
+     would typically be reload, so this target hook should be defined
+     to a function such as:
+
+          static bool
+          cannot_modify_jumps_past_reload_p ()
+          {
+            return (reload_completed || reload_in_progress);
+          }
+
+ -- Target Hook: enum reg_class TARGET_BRANCH_TARGET_REGISTER_CLASS
+          (void)
+     This target hook returns a register class for which branch target
+     register optimizations should be applied.  All registers in this
+     class should be usable interchangeably.  After reload, registers
+     in this class will be re-allocated and loads will be hoisted out
+     of loops and be subjected to inter-block scheduling.
+
+ -- Target Hook: bool TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED (bool
+          AFTER_PROLOGUE_EPILOGUE_GEN)
+     Branch target register optimization will by default exclude
+     callee-saved registers that are not already live during the
+     current function; if this target hook returns true, they will be
+     included.  The target code must than make sure that all target
+     registers in the class returned by
+     `TARGET_BRANCH_TARGET_REGISTER_CLASS' that might need saving are
+     saved.  AFTER_PROLOGUE_EPILOGUE_GEN indicates if prologues and
+     epilogues have already been generated.  Note, even if you only
+     return true when AFTER_PROLOGUE_EPILOGUE_GEN is false, you still
+     are likely to have to make special provisions in
+     `INITIAL_ELIMINATION_OFFSET' to reserve space for caller-saved
+     target registers.
+
+ -- Target Hook: bool TARGET_HAVE_CONDITIONAL_EXECUTION (void)
+     This target hook returns true if the target supports conditional
+     execution.  This target hook is required only when the target has
+     several different modes and they have different conditional
+     execution capability, such as ARM.
+
+ -- Macro: POWI_MAX_MULTS
+     If defined, this macro is interpreted as a signed integer C
+     expression that specifies the maximum number of floating point
+     multiplications that should be emitted when expanding
+     exponentiation by an integer constant inline.  When this value is
+     defined, exponentiation requiring more than this number of
+     multiplications is implemented by calling the system library's
+     `pow', `powf' or `powl' routines.  The default value places no
+     upper bound on the multiplication count.
+
+ -- Macro: void TARGET_EXTRA_INCLUDES (const char *SYSROOT, const char
+          *IPREFIX, int STDINC)
+     This target hook should register any extra include files for the
+     target.  The parameter STDINC indicates if normal include files
+     are present.  The parameter SYSROOT is the system root directory.
+     The parameter IPREFIX is the prefix for the gcc directory.
+
+ -- Macro: void TARGET_EXTRA_PRE_INCLUDES (const char *SYSROOT, const
+          char *IPREFIX, int STDINC)
+     This target hook should register any extra include files for the
+     target before any standard headers.  The parameter STDINC
+     indicates if normal include files are present.  The parameter
+     SYSROOT is the system root directory.  The parameter IPREFIX is
+     the prefix for the gcc directory.
+
+ -- Macro: void TARGET_OPTF (char *PATH)
+     This target hook should register special include paths for the
+     target.  The parameter PATH is the include to register.  On Darwin
+     systems, this is used for Framework includes, which have semantics
+     that are different from `-I'.
+
+ -- Macro: bool TARGET_USE_LOCAL_THUNK_ALIAS_P (tree FNDECL)
+     This target macro returns `true' if it is safe to use a local alias
+     for a virtual function FNDECL when constructing thunks, `false'
+     otherwise.  By default, the macro returns `true' for all
+     functions, if a target supports aliases (i.e. defines
+     `ASM_OUTPUT_DEF'), `false' otherwise,
+
+ -- Macro: TARGET_FORMAT_TYPES
+     If defined, this macro is the name of a global variable containing
+     target-specific format checking information for the `-Wformat'
+     option.  The default is to have no target-specific format checks.
+
+ -- Macro: TARGET_N_FORMAT_TYPES
+     If defined, this macro is the number of entries in
+     `TARGET_FORMAT_TYPES'.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_ATTRIBUTES
+     If defined, this macro is the name of a global variable containing
+     target-specific format overrides for the `-Wformat' option. The
+     default is to have no target-specific format overrides. If defined,
+     `TARGET_FORMAT_TYPES' must be defined, too.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT
+     If defined, this macro specifies the number of entries in
+     `TARGET_OVERRIDES_FORMAT_ATTRIBUTES'.
+
+ -- Macro: TARGET_OVERRIDES_FORMAT_INIT
+     If defined, this macro specifies the optional initialization
+     routine for target specific customizations of the system printf
+     and scanf formatter settings.
+
+ -- Target Hook: bool TARGET_RELAXED_ORDERING
+     If set to `true', means that the target's memory model does not
+     guarantee that loads which do not depend on one another will access
+     main memory in the order of the instruction stream; if ordering is
+     important, an explicit memory barrier must be used.  This is true
+     of many recent processors which implement a policy of "relaxed,"
+     "weak," or "release" memory consistency, such as Alpha, PowerPC,
+     and ia64.  The default is `false'.
+
+ -- Target Hook: const char * TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN
+          (const_tree TYPELIST, const_tree FUNCDECL, const_tree VAL)
+     If defined, this macro returns the diagnostic message when it is
+     illegal to pass argument VAL to function FUNCDECL with prototype
+     TYPELIST.
+
+ -- Target Hook: const char * TARGET_INVALID_CONVERSION (const_tree
+          FROMTYPE, const_tree TOTYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to convert from FROMTYPE to TOTYPE, or `NULL' if validity
+     should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_UNARY_OP (int OP,
+          const_tree TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to apply operation OP (where unary plus is denoted by
+     `CONVERT_EXPR') to an operand of type TYPE, or `NULL' if validity
+     should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_BINARY_OP (int OP,
+          const_tree TYPE1, const_tree TYPE2)
+     If defined, this macro returns the diagnostic message when it is
+     invalid to apply operation OP to operands of types TYPE1 and
+     TYPE2, or `NULL' if validity should be determined by the front end.
+
+ -- Target Hook: const char * TARGET_INVALID_PARAMETER_TYPE (const_tree
+          TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid for functions to include parameters of type TYPE, or
+     `NULL' if validity should be determined by the front end.  This is
+     currently used only by the C and C++ front ends.
+
+ -- Target Hook: const char * TARGET_INVALID_RETURN_TYPE (const_tree
+          TYPE)
+     If defined, this macro returns the diagnostic message when it is
+     invalid for functions to have return type TYPE, or `NULL' if
+     validity should be determined by the front end.  This is currently
+     used only by the C and C++ front ends.
+
+ -- Target Hook: tree TARGET_PROMOTED_TYPE (const_tree TYPE)
+     If defined, this target hook returns the type to which values of
+     TYPE should be promoted when they appear in expressions, analogous
+     to the integer promotions, or `NULL_TREE' to use the front end's
+     normal promotion rules.  This hook is useful when there are
+     target-specific types with special promotion rules.  This is
+     currently used only by the C and C++ front ends.
+
+ -- Target Hook: tree TARGET_CONVERT_TO_TYPE (tree TYPE, tree EXPR)
+     If defined, this hook returns the result of converting EXPR to
+     TYPE.  It should return the converted expression, or `NULL_TREE'
+     to apply the front end's normal conversion rules.  This hook is
+     useful when there are target-specific types with special
+     conversion rules.  This is currently used only by the C and C++
+     front ends.
+
+ -- Macro: TARGET_USE_JCR_SECTION
+     This macro determines whether to use the JCR section to register
+     Java classes. By default, TARGET_USE_JCR_SECTION is defined to 1
+     if both SUPPORTS_WEAK and TARGET_HAVE_NAMED_SECTIONS are true,
+     else 0.
+
+ -- Macro: OBJC_JBLEN
+     This macro determines the size of the objective C jump buffer for
+     the NeXT runtime. By default, OBJC_JBLEN is defined to an
+     innocuous value.
+
+ -- Macro: LIBGCC2_UNWIND_ATTRIBUTE
+     Define this macro if any target-specific attributes need to be
+     attached to the functions in `libgcc' that provide low-level
+     support for call stack unwinding.  It is used in declarations in
+     `unwind-generic.h' and the associated definitions of those
+     functions.
+
+ -- Target Hook: void TARGET_UPDATE_STACK_BOUNDARY (void)
+     Define this macro to update the current function stack boundary if
+     necessary.
+
+ -- Target Hook: rtx TARGET_GET_DRAP_RTX (void)
+     This hook should return an rtx for Dynamic Realign Argument
+     Pointer (DRAP) if a different argument pointer register is needed
+     to access the function's argument list due to stack realignment.
+     Return `NULL' if no DRAP is needed.
+
+ -- Target Hook: bool TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS (void)
+     When optimization is disabled, this hook indicates whether or not
+     arguments should be allocated to stack slots.  Normally, GCC
+     allocates stacks slots for arguments when not optimizing in order
+     to make debugging easier.  However, when a function is declared
+     with `__attribute__((naked))', there is no stack frame, and the
+     compiler cannot safely move arguments from the registers in which
+     they are passed to the stack.  Therefore, this hook should return
+     true in general, but false for naked functions.  The default
+     implementation always returns true.
+
+ -- Target Hook: unsigned HOST_WIDE_INT TARGET_CONST_ANCHOR
+     On some architectures it can take multiple instructions to
+     synthesize a constant.  If there is another constant already in a
+     register that is close enough in value then it is preferable that
+     the new constant is computed from this register using immediate
+     addition or subtraction.  We accomplish this through CSE.  Besides
+     the value of the constant we also add a lower and an upper
+     constant anchor to the available expressions.  These are then
+     queried when encountering new constants.  The anchors are computed
+     by rounding the constant up and down to a multiple of the value of
+     `TARGET_CONST_ANCHOR'.  `TARGET_CONST_ANCHOR' should be the
+     maximum positive value accepted by immediate-add plus one.  We
+     currently assume that the value of `TARGET_CONST_ANCHOR' is a
+     power of 2.  For example, on MIPS, where add-immediate takes a
+     16-bit signed value, `TARGET_CONST_ANCHOR' is set to `0x8000'.
+     The default value is zero, which disables this optimization.
+
+
+File: gccint.info,  Node: Host Config,  Next: Fragments,  Prev: Target Macros,  Up: Top
+
+18 Host Configuration
+*********************
+
+Most details about the machine and system on which the compiler is
+actually running are detected by the `configure' script.  Some things
+are impossible for `configure' to detect; these are described in two
+ways, either by macros defined in a file named `xm-MACHINE.h' or by
+hook functions in the file specified by the OUT_HOST_HOOK_OBJ variable
+in `config.gcc'.  (The intention is that very few hosts will need a
+header file but nearly every fully supported host will need to override
+some hooks.)
+
+ If you need to define only a few macros, and they have simple
+definitions, consider using the `xm_defines' variable in your
+`config.gcc' entry instead of creating a host configuration header.
+*Note System Config::.
+
+* Menu:
+
+* Host Common::         Things every host probably needs implemented.
+* Filesystem::          Your host can't have the letter `a' in filenames?
+* Host Misc::           Rare configuration options for hosts.
+
+
+File: gccint.info,  Node: Host Common,  Next: Filesystem,  Up: Host Config
+
+18.1 Host Common
+================
+
+Some things are just not portable, even between similar operating
+systems, and are too difficult for autoconf to detect.  They get
+implemented using hook functions in the file specified by the
+HOST_HOOK_OBJ variable in `config.gcc'.
+
+ -- Host Hook: void HOST_HOOKS_EXTRA_SIGNALS (void)
+     This host hook is used to set up handling for extra signals.  The
+     most common thing to do in this hook is to detect stack overflow.
+
+ -- Host Hook: void * HOST_HOOKS_GT_PCH_GET_ADDRESS (size_t SIZE, int
+          FD)
+     This host hook returns the address of some space that is likely to
+     be free in some subsequent invocation of the compiler.  We intend
+     to load the PCH data at this address such that the data need not
+     be relocated.  The area should be able to hold SIZE bytes.  If the
+     host uses `mmap', FD is an open file descriptor that can be used
+     for probing.
+
+ -- Host Hook: int HOST_HOOKS_GT_PCH_USE_ADDRESS (void * ADDRESS,
+          size_t SIZE, int FD, size_t OFFSET)
+     This host hook is called when a PCH file is about to be loaded.
+     We want to load SIZE bytes from FD at OFFSET into memory at
+     ADDRESS.  The given address will be the result of a previous
+     invocation of `HOST_HOOKS_GT_PCH_GET_ADDRESS'.  Return -1 if we
+     couldn't allocate SIZE bytes at ADDRESS.  Return 0 if the memory
+     is allocated but the data is not loaded.  Return 1 if the hook has
+     performed everything.
+
+     If the implementation uses reserved address space, free any
+     reserved space beyond SIZE, regardless of the return value.  If no
+     PCH will be loaded, this hook may be called with SIZE zero, in
+     which case all reserved address space should be freed.
+
+     Do not try to handle values of ADDRESS that could not have been
+     returned by this executable; just return -1.  Such values usually
+     indicate an out-of-date PCH file (built by some other GCC
+     executable), and such a PCH file won't work.
+
+ -- Host Hook: size_t HOST_HOOKS_GT_PCH_ALLOC_GRANULARITY (void);
+     This host hook returns the alignment required for allocating
+     virtual memory.  Usually this is the same as getpagesize, but on
+     some hosts the alignment for reserving memory differs from the
+     pagesize for committing memory.
+
+
+File: gccint.info,  Node: Filesystem,  Next: Host Misc,  Prev: Host Common,  Up: Host Config
+
+18.2 Host Filesystem
+====================
+
+GCC needs to know a number of things about the semantics of the host
+machine's filesystem.  Filesystems with Unix and MS-DOS semantics are
+automatically detected.  For other systems, you can define the
+following macros in `xm-MACHINE.h'.
+
+`HAVE_DOS_BASED_FILE_SYSTEM'
+     This macro is automatically defined by `system.h' if the host file
+     system obeys the semantics defined by MS-DOS instead of Unix.  DOS
+     file systems are case insensitive, file specifications may begin
+     with a drive letter, and both forward slash and backslash (`/' and
+     `\') are directory separators.
+
+`DIR_SEPARATOR'
+`DIR_SEPARATOR_2'
+     If defined, these macros expand to character constants specifying
+     separators for directory names within a file specification.
+     `system.h' will automatically give them appropriate values on Unix
+     and MS-DOS file systems.  If your file system is neither of these,
+     define one or both appropriately in `xm-MACHINE.h'.
+
+     However, operating systems like VMS, where constructing a pathname
+     is more complicated than just stringing together directory names
+     separated by a special character, should not define either of these
+     macros.
+
+`PATH_SEPARATOR'
+     If defined, this macro should expand to a character constant
+     specifying the separator for elements of search paths.  The default
+     value is a colon (`:').  DOS-based systems usually, but not
+     always, use semicolon (`;').
+
+`VMS'
+     Define this macro if the host system is VMS.
+
+`HOST_OBJECT_SUFFIX'
+     Define this macro to be a C string representing the suffix for
+     object files on your host machine.  If you do not define this
+     macro, GCC will use `.o' as the suffix for object files.
+
+`HOST_EXECUTABLE_SUFFIX'
+     Define this macro to be a C string representing the suffix for
+     executable files on your host machine.  If you do not define this
+     macro, GCC will use the null string as the suffix for executable
+     files.
+
+`HOST_BIT_BUCKET'
+     A pathname defined by the host operating system, which can be
+     opened as a file and written to, but all the information written
+     is discarded.  This is commonly known as a "bit bucket" or "null
+     device".  If you do not define this macro, GCC will use
+     `/dev/null' as the bit bucket.  If the host does not support a bit
+     bucket, define this macro to an invalid filename.
+
+`UPDATE_PATH_HOST_CANONICALIZE (PATH)'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent canonicalization when a path used in a compilation
+     driver or preprocessor is canonicalized.  PATH is a malloc-ed path
+     to be canonicalized.  If the C statement does canonicalize PATH
+     into a different buffer, the old path should be freed and the new
+     buffer should have been allocated with malloc.
+
+`DUMPFILE_FORMAT'
+     Define this macro to be a C string representing the format to use
+     for constructing the index part of debugging dump file names.  The
+     resultant string must fit in fifteen bytes.  The full filename
+     will be the concatenation of: the prefix of the assembler file
+     name, the string resulting from applying this format to an index
+     number, and a string unique to each dump file kind, e.g. `rtl'.
+
+     If you do not define this macro, GCC will use `.%02d.'.  You should
+     define this macro if using the default will create an invalid file
+     name.
+
+`DELETE_IF_ORDINARY'
+     Define this macro to be a C statement (sans semicolon) that
+     performs host-dependent removal of ordinary temp files in the
+     compilation driver.
+
+     If you do not define this macro, GCC will use the default version.
+     You should define this macro if the default version does not
+     reliably remove the temp file as, for example, on VMS which allows
+     multiple versions of a file.
+
+`HOST_LACKS_INODE_NUMBERS'
+     Define this macro if the host filesystem does not report
+     meaningful inode numbers in struct stat.
+
+
+File: gccint.info,  Node: Host Misc,  Prev: Filesystem,  Up: Host Config
+
+18.3 Host Misc
+==============
+
+`FATAL_EXIT_CODE'
+     A C expression for the status code to be returned when the compiler
+     exits after serious errors.  The default is the system-provided
+     macro `EXIT_FAILURE', or `1' if the system doesn't define that
+     macro.  Define this macro only if these defaults are incorrect.
+
+`SUCCESS_EXIT_CODE'
+     A C expression for the status code to be returned when the compiler
+     exits without serious errors.  (Warnings are not serious errors.)
+     The default is the system-provided macro `EXIT_SUCCESS', or `0' if
+     the system doesn't define that macro.  Define this macro only if
+     these defaults are incorrect.
+
+`USE_C_ALLOCA'
+     Define this macro if GCC should use the C implementation of
+     `alloca' provided by `libiberty.a'.  This only affects how some
+     parts of the compiler itself allocate memory.  It does not change
+     code generation.
+
+     When GCC is built with a compiler other than itself, the C `alloca'
+     is always used.  This is because most other implementations have
+     serious bugs.  You should define this macro only on a system where
+     no stack-based `alloca' can possibly work.  For instance, if a
+     system has a small limit on the size of the stack, GCC's builtin
+     `alloca' will not work reliably.
+
+`COLLECT2_HOST_INITIALIZATION'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent initialization when `collect2' is being initialized.
+
+`GCC_DRIVER_HOST_INITIALIZATION'
+     If defined, a C statement (sans semicolon) that performs
+     host-dependent initialization when a compilation driver is being
+     initialized.
+
+`HOST_LONG_LONG_FORMAT'
+     If defined, the string used to indicate an argument of type `long
+     long' to functions like `printf'.  The default value is `"ll"'.
+
+`HOST_LONG_FORMAT'
+     If defined, the string used to indicate an argument of type `long'
+     to functions like `printf'.  The default value is `"l"'.
+
+`HOST_PTR_PRINTF'
+     If defined, the string used to indicate an argument of type `void
+     *' to functions like `printf'.  The default value is `"%p"'.
+
+ In addition, if `configure' generates an incorrect definition of any
+of the macros in `auto-host.h', you can override that definition in a
+host configuration header.  If you need to do this, first see if it is
+possible to fix `configure'.
+
+
+File: gccint.info,  Node: Fragments,  Next: Collect2,  Prev: Host Config,  Up: Top
+
+19 Makefile Fragments
+*********************
+
+When you configure GCC using the `configure' script, it will construct
+the file `Makefile' from the template file `Makefile.in'.  When it does
+this, it can incorporate makefile fragments from the `config'
+directory.  These are used to set Makefile parameters that are not
+amenable to being calculated by autoconf.  The list of fragments to
+incorporate is set by `config.gcc' (and occasionally `config.build' and
+`config.host'); *Note System Config::.
+
+ Fragments are named either `t-TARGET' or `x-HOST', depending on
+whether they are relevant to configuring GCC to produce code for a
+particular target, or to configuring GCC to run on a particular host.
+Here TARGET and HOST are mnemonics which usually have some relationship
+to the canonical system name, but no formal connection.
+
+ If these files do not exist, it means nothing needs to be added for a
+given target or host.  Most targets need a few `t-TARGET' fragments,
+but needing `x-HOST' fragments is rare.
+
+* Menu:
+
+* Target Fragment:: Writing `t-TARGET' files.
+* Host Fragment::   Writing `x-HOST' files.
+
+
+File: gccint.info,  Node: Target Fragment,  Next: Host Fragment,  Up: Fragments
+
+19.1 Target Makefile Fragments
+==============================
+
+Target makefile fragments can set these Makefile variables.
+
+`LIBGCC2_CFLAGS'
+     Compiler flags to use when compiling `libgcc2.c'.
+
+`LIB2FUNCS_EXTRA'
+     A list of source file names to be compiled or assembled and
+     inserted into `libgcc.a'.
+
+`Floating Point Emulation'
+     To have GCC include software floating point libraries in `libgcc.a'
+     define `FPBIT' and `DPBIT' along with a few rules as follows:
+          # We want fine grained libraries, so use the new code
+          # to build the floating point emulation libraries.
+          FPBIT = fp-bit.c
+          DPBIT = dp-bit.c
+
+
+          fp-bit.c: $(srcdir)/config/fp-bit.c
+                  echo '#define FLOAT' > fp-bit.c
+                  cat $(srcdir)/config/fp-bit.c >> fp-bit.c
+
+          dp-bit.c: $(srcdir)/config/fp-bit.c
+                  cat $(srcdir)/config/fp-bit.c > dp-bit.c
+
+     You may need to provide additional #defines at the beginning of
+     `fp-bit.c' and `dp-bit.c' to control target endianness and other
+     options.
+
+`CRTSTUFF_T_CFLAGS'
+     Special flags used when compiling `crtstuff.c'.  *Note
+     Initialization::.
+
+`CRTSTUFF_T_CFLAGS_S'
+     Special flags used when compiling `crtstuff.c' for shared linking.
+     Used if you use `crtbeginS.o' and `crtendS.o' in `EXTRA-PARTS'.
+     *Note Initialization::.
+
+`MULTILIB_OPTIONS'
+     For some targets, invoking GCC in different ways produces objects
+     that can not be linked together.  For example, for some targets GCC
+     produces both big and little endian code.  For these targets, you
+     must arrange for multiple versions of `libgcc.a' to be compiled,
+     one for each set of incompatible options.  When GCC invokes the
+     linker, it arranges to link in the right version of `libgcc.a',
+     based on the command line options used.
+
+     The `MULTILIB_OPTIONS' macro lists the set of options for which
+     special versions of `libgcc.a' must be built.  Write options that
+     are mutually incompatible side by side, separated by a slash.
+     Write options that may be used together separated by a space.  The
+     build procedure will build all combinations of compatible options.
+
+     For example, if you set `MULTILIB_OPTIONS' to `m68000/m68020
+     msoft-float', `Makefile' will build special versions of `libgcc.a'
+     using the following sets of options:  `-m68000', `-m68020',
+     `-msoft-float', `-m68000 -msoft-float', and `-m68020 -msoft-float'.
+
+`MULTILIB_DIRNAMES'
+     If `MULTILIB_OPTIONS' is used, this variable specifies the
+     directory names that should be used to hold the various libraries.
+     Write one element in `MULTILIB_DIRNAMES' for each element in
+     `MULTILIB_OPTIONS'.  If `MULTILIB_DIRNAMES' is not used, the
+     default value will be `MULTILIB_OPTIONS', with all slashes treated
+     as spaces.
+
+     For example, if `MULTILIB_OPTIONS' is set to `m68000/m68020
+     msoft-float', then the default value of `MULTILIB_DIRNAMES' is
+     `m68000 m68020 msoft-float'.  You may specify a different value if
+     you desire a different set of directory names.
+
+`MULTILIB_MATCHES'
+     Sometimes the same option may be written in two different ways.
+     If an option is listed in `MULTILIB_OPTIONS', GCC needs to know
+     about any synonyms.  In that case, set `MULTILIB_MATCHES' to a
+     list of items of the form `option=option' to describe all relevant
+     synonyms.  For example, `m68000=mc68000 m68020=mc68020'.
+
+`MULTILIB_EXCEPTIONS'
+     Sometimes when there are multiple sets of `MULTILIB_OPTIONS' being
+     specified, there are combinations that should not be built.  In
+     that case, set `MULTILIB_EXCEPTIONS' to be all of the switch
+     exceptions in shell case syntax that should not be built.
+
+     For example the ARM processor cannot execute both hardware floating
+     point instructions and the reduced size THUMB instructions at the
+     same time, so there is no need to build libraries with both of
+     these options enabled.  Therefore `MULTILIB_EXCEPTIONS' is set to:
+          *mthumb/*mhard-float*
+
+`MULTILIB_EXTRA_OPTS'
+     Sometimes it is desirable that when building multiple versions of
+     `libgcc.a' certain options should always be passed on to the
+     compiler.  In that case, set `MULTILIB_EXTRA_OPTS' to be the list
+     of options to be used for all builds.  If you set this, you should
+     probably set `CRTSTUFF_T_CFLAGS' to a dash followed by it.
+
+`NATIVE_SYSTEM_HEADER_DIR'
+     If the default location for system headers is not `/usr/include',
+     you must set this to the directory containing the headers.  This
+     value should match the value of the `SYSTEM_INCLUDE_DIR' macro.
+
+`SPECS'
+     Unfortunately, setting `MULTILIB_EXTRA_OPTS' is not enough, since
+     it does not affect the build of target libraries, at least not the
+     build of the default multilib.  One possible work-around is to use
+     `DRIVER_SELF_SPECS' to bring options from the `specs' file as if
+     they had been passed in the compiler driver command line.
+     However, you don't want to be adding these options after the
+     toolchain is installed, so you can instead tweak the `specs' file
+     that will be used during the toolchain build, while you still
+     install the original, built-in `specs'.  The trick is to set
+     `SPECS' to some other filename (say `specs.install'), that will
+     then be created out of the built-in specs, and introduce a
+     `Makefile' rule to generate the `specs' file that's going to be
+     used at build time out of your `specs.install'.
+
+`T_CFLAGS'
+     These are extra flags to pass to the C compiler.  They are used
+     both when building GCC, and when compiling things with the
+     just-built GCC.  This variable is deprecated and should not be
+     used.
+
+
+File: gccint.info,  Node: Host Fragment,  Prev: Target Fragment,  Up: Fragments
+
+19.2 Host Makefile Fragments
+============================
+
+The use of `x-HOST' fragments is discouraged.  You should only use it
+for makefile dependencies.
+
+
+File: gccint.info,  Node: Collect2,  Next: Header Dirs,  Prev: Fragments,  Up: Top
+
+20 `collect2'
+*************
+
+GCC uses a utility called `collect2' on nearly all systems to arrange
+to call various initialization functions at start time.
+
+ The program `collect2' works by linking the program once and looking
+through the linker output file for symbols with particular names
+indicating they are constructor functions.  If it finds any, it creates
+a new temporary `.c' file containing a table of them, compiles it, and
+links the program a second time including that file.
+
+ The actual calls to the constructors are carried out by a subroutine
+called `__main', which is called (automatically) at the beginning of
+the body of `main' (provided `main' was compiled with GNU CC).  Calling
+`__main' is necessary, even when compiling C code, to allow linking C
+and C++ object code together.  (If you use `-nostdlib', you get an
+unresolved reference to `__main', since it's defined in the standard
+GCC library.  Include `-lgcc' at the end of your compiler command line
+to resolve this reference.)
+
+ The program `collect2' is installed as `ld' in the directory where the
+passes of the compiler are installed.  When `collect2' needs to find
+the _real_ `ld', it tries the following file names:
+
+   * a hard coded linker file name, if GCC was configured with the
+     `--with-ld' option.
+
+   * `real-ld' in the directories listed in the compiler's search
+     directories.
+
+   * `real-ld' in the directories listed in the environment variable
+     `PATH'.
+
+   * The file specified in the `REAL_LD_FILE_NAME' configuration macro,
+     if specified.
+
+   * `ld' in the compiler's search directories, except that `collect2'
+     will not execute itself recursively.
+
+   * `ld' in `PATH'.
+
+ "The compiler's search directories" means all the directories where
+`gcc' searches for passes of the compiler.  This includes directories
+that you specify with `-B'.
+
+ Cross-compilers search a little differently:
+
+   * `real-ld' in the compiler's search directories.
+
+   * `TARGET-real-ld' in `PATH'.
+
+   * The file specified in the `REAL_LD_FILE_NAME' configuration macro,
+     if specified.
+
+   * `ld' in the compiler's search directories.
+
+   * `TARGET-ld' in `PATH'.
+
+ `collect2' explicitly avoids running `ld' using the file name under
+which `collect2' itself was invoked.  In fact, it remembers up a list
+of such names--in case one copy of `collect2' finds another copy (or
+version) of `collect2' installed as `ld' in a second place in the
+search path.
+
+ `collect2' searches for the utilities `nm' and `strip' using the same
+algorithm as above for `ld'.
+
+
+File: gccint.info,  Node: Header Dirs,  Next: Type Information,  Prev: Collect2,  Up: Top
+
+21 Standard Header File Directories
+***********************************
+
+`GCC_INCLUDE_DIR' means the same thing for native and cross.  It is
+where GCC stores its private include files, and also where GCC stores
+the fixed include files.  A cross compiled GCC runs `fixincludes' on
+the header files in `$(tooldir)/include'.  (If the cross compilation
+header files need to be fixed, they must be installed before GCC is
+built.  If the cross compilation header files are already suitable for
+GCC, nothing special need be done).
+
+ `GPLUSPLUS_INCLUDE_DIR' means the same thing for native and cross.  It
+is where `g++' looks first for header files.  The C++ library installs
+only target independent header files in that directory.
+
+ `LOCAL_INCLUDE_DIR' is used only by native compilers.  GCC doesn't
+install anything there.  It is normally `/usr/local/include'.  This is
+where local additions to a packaged system should place header files.
+
+ `CROSS_INCLUDE_DIR' is used only by cross compilers.  GCC doesn't
+install anything there.
+
+ `TOOL_INCLUDE_DIR' is used for both native and cross compilers.  It is
+the place for other packages to install header files that GCC will use.
+For a cross-compiler, this is the equivalent of `/usr/include'.  When
+you build a cross-compiler, `fixincludes' processes any header files in
+this directory.
+
+
+File: gccint.info,  Node: Type Information,  Next: Plugins,  Prev: Header Dirs,  Up: Top
+
+22 Memory Management and Type Information
+*****************************************
+
+GCC uses some fairly sophisticated memory management techniques, which
+involve determining information about GCC's data structures from GCC's
+source code and using this information to perform garbage collection and
+implement precompiled headers.
+
+ A full C parser would be too complicated for this task, so a limited
+subset of C is interpreted and special markers are used to determine
+what parts of the source to look at.  All `struct' and `union'
+declarations that define data structures that are allocated under
+control of the garbage collector must be marked.  All global variables
+that hold pointers to garbage-collected memory must also be marked.
+Finally, all global variables that need to be saved and restored by a
+precompiled header must be marked.  (The precompiled header mechanism
+can only save static variables if they're scalar.  Complex data
+structures must be allocated in garbage-collected memory to be saved in
+a precompiled header.)
+
+ The full format of a marker is
+     GTY (([OPTION] [(PARAM)], [OPTION] [(PARAM)] ...))
+ but in most cases no options are needed.  The outer double parentheses
+are still necessary, though: `GTY(())'.  Markers can appear:
+
+   * In a structure definition, before the open brace;
+
+   * In a global variable declaration, after the keyword `static' or
+     `extern'; and
+
+   * In a structure field definition, before the name of the field.
+
+ Here are some examples of marking simple data structures and globals.
+
+     struct GTY(()) TAG
+     {
+       FIELDS...
+     };
+
+     typedef struct GTY(()) TAG
+     {
+       FIELDS...
+     } *TYPENAME;
+
+     static GTY(()) struct TAG *LIST;   /* points to GC memory */
+     static GTY(()) int COUNTER;        /* save counter in a PCH */
+
+ The parser understands simple typedefs such as `typedef struct TAG
+*NAME;' and `typedef int NAME;'.  These don't need to be marked.
+
+* Menu:
+
+* GTY Options::         What goes inside a `GTY(())'.
+* GGC Roots::           Making global variables GGC roots.
+* Files::               How the generated files work.
+* Invoking the garbage collector::   How to invoke the garbage collector.
+
+
+File: gccint.info,  Node: GTY Options,  Next: GGC Roots,  Up: Type Information
+
+22.1 The Inside of a `GTY(())'
+==============================
+
+Sometimes the C code is not enough to fully describe the type
+structure.  Extra information can be provided with `GTY' options and
+additional markers.  Some options take a parameter, which may be either
+a string or a type name, depending on the parameter.  If an option
+takes no parameter, it is acceptable either to omit the parameter
+entirely, or to provide an empty string as a parameter.  For example,
+`GTY ((skip))' and `GTY ((skip ("")))' are equivalent.
+
+ When the parameter is a string, often it is a fragment of C code.  Four
+special escapes may be used in these strings, to refer to pieces of the
+data structure being marked:
+
+`%h'
+     The current structure.
+
+`%1'
+     The structure that immediately contains the current structure.
+
+`%0'
+     The outermost structure that contains the current structure.
+
+`%a'
+     A partial expression of the form `[i1][i2]...' that indexes the
+     array item currently being marked.
+
+ For instance, suppose that you have a structure of the form
+     struct A {
+       ...
+     };
+     struct B {
+       struct A foo[12];
+     };
+ and `b' is a variable of type `struct B'.  When marking `b.foo[11]',
+`%h' would expand to `b.foo[11]', `%0' and `%1' would both expand to
+`b', and `%a' would expand to `[11]'.
+
+ As in ordinary C, adjacent strings will be concatenated; this is
+helpful when you have a complicated expression.
+     GTY ((chain_next ("TREE_CODE (&%h.generic) == INTEGER_TYPE"
+                       " ? TYPE_NEXT_VARIANT (&%h.generic)"
+                       " : TREE_CHAIN (&%h.generic)")))
+
+ The available options are:
+
+`length ("EXPRESSION")'
+     There are two places the type machinery will need to be explicitly
+     told the length of an array.  The first case is when a structure
+     ends in a variable-length array, like this:
+          struct GTY(()) rtvec_def {
+            int num_elem;         /* number of elements */
+            rtx GTY ((length ("%h.num_elem"))) elem[1];
+          };
+
+     In this case, the `length' option is used to override the specified
+     array length (which should usually be `1').  The parameter of the
+     option is a fragment of C code that calculates the length.
+
+     The second case is when a structure or a global variable contains a
+     pointer to an array, like this:
+          tree *
+            GTY ((length ("%h.regno_pointer_align_length"))) regno_decl;
+     In this case, `regno_decl' has been allocated by writing something
+     like
+            x->regno_decl =
+              ggc_alloc (x->regno_pointer_align_length * sizeof (tree));
+     and the `length' provides the length of the field.
+
+     This second use of `length' also works on global variables, like:   static GTY((length ("reg_base_value_size")))
+         rtx *reg_base_value;
+
+`skip'
+     If `skip' is applied to a field, the type machinery will ignore it.
+     This is somewhat dangerous; the only safe use is in a union when
+     one field really isn't ever used.
+
+`desc ("EXPRESSION")'
+`tag ("CONSTANT")'
+`default'
+     The type machinery needs to be told which field of a `union' is
+     currently active.  This is done by giving each field a constant
+     `tag' value, and then specifying a discriminator using `desc'.
+     The value of the expression given by `desc' is compared against
+     each `tag' value, each of which should be different.  If no `tag'
+     is matched, the field marked with `default' is used if there is
+     one, otherwise no field in the union will be marked.
+
+     In the `desc' option, the "current structure" is the union that it
+     discriminates.  Use `%1' to mean the structure containing it.
+     There are no escapes available to the `tag' option, since it is a
+     constant.
+
+     For example,
+          struct GTY(()) tree_binding
+          {
+            struct tree_common common;
+            union tree_binding_u {
+              tree GTY ((tag ("0"))) scope;
+              struct cp_binding_level * GTY ((tag ("1"))) level;
+            } GTY ((desc ("BINDING_HAS_LEVEL_P ((tree)&%0)"))) xscope;
+            tree value;
+          };
+
+     In this example, the value of BINDING_HAS_LEVEL_P when applied to a
+     `struct tree_binding *' is presumed to be 0 or 1.  If 1, the type
+     mechanism will treat the field `level' as being present and if 0,
+     will treat the field `scope' as being present.
+
+`param_is (TYPE)'
+`use_param'
+     Sometimes it's convenient to define some data structure to work on
+     generic pointers (that is, `PTR') and then use it with a specific
+     type.  `param_is' specifies the real type pointed to, and
+     `use_param' says where in the generic data structure that type
+     should be put.
+
+     For instance, to have a `htab_t' that points to trees, one would
+     write the definition of `htab_t' like this:
+          typedef struct GTY(()) {
+            ...
+            void ** GTY ((use_param, ...)) entries;
+            ...
+          } htab_t;
+     and then declare variables like this:
+            static htab_t GTY ((param_is (union tree_node))) ict;
+
+`paramN_is (TYPE)'
+`use_paramN'
+     In more complicated cases, the data structure might need to work on
+     several different types, which might not necessarily all be
+     pointers.  For this, `param1_is' through `param9_is' may be used to
+     specify the real type of a field identified by `use_param1' through
+     `use_param9'.
+
+`use_params'
+     When a structure contains another structure that is parameterized,
+     there's no need to do anything special, the inner structure
+     inherits the parameters of the outer one.  When a structure
+     contains a pointer to a parameterized structure, the type
+     machinery won't automatically detect this (it could, it just
+     doesn't yet), so it's necessary to tell it that the pointed-to
+     structure should use the same parameters as the outer structure.
+     This is done by marking the pointer with the `use_params' option.
+
+`deletable'
+     `deletable', when applied to a global variable, indicates that when
+     garbage collection runs, there's no need to mark anything pointed
+     to by this variable, it can just be set to `NULL' instead.  This
+     is used to keep a list of free structures around for re-use.
+
+`if_marked ("EXPRESSION")'
+     Suppose you want some kinds of object to be unique, and so you put
+     them in a hash table.  If garbage collection marks the hash table,
+     these objects will never be freed, even if the last other
+     reference to them goes away.  GGC has special handling to deal
+     with this: if you use the `if_marked' option on a global hash
+     table, GGC will call the routine whose name is the parameter to
+     the option on each hash table entry.  If the routine returns
+     nonzero, the hash table entry will be marked as usual.  If the
+     routine returns zero, the hash table entry will be deleted.
+
+     The routine `ggc_marked_p' can be used to determine if an element
+     has been marked already; in fact, the usual case is to use
+     `if_marked ("ggc_marked_p")'.
+
+`mark_hook ("HOOK-ROUTINE-NAME")'
+     If provided for a structure or union type, the given
+     HOOK-ROUTINE-NAME (between double-quotes) is the name of a routine
+     called when the garbage collector has just marked the data as
+     reachable. This routine should not change the data, or call any ggc
+     routine. Its only argument is a pointer to the just marked (const)
+     structure or union.
+
+`maybe_undef'
+     When applied to a field, `maybe_undef' indicates that it's OK if
+     the structure that this fields points to is never defined, so long
+     as this field is always `NULL'.  This is used to avoid requiring
+     backends to define certain optional structures.  It doesn't work
+     with language frontends.
+
+`nested_ptr (TYPE, "TO EXPRESSION", "FROM EXPRESSION")'
+     The type machinery expects all pointers to point to the start of an
+     object.  Sometimes for abstraction purposes it's convenient to have
+     a pointer which points inside an object.  So long as it's possible
+     to convert the original object to and from the pointer, such
+     pointers can still be used.  TYPE is the type of the original
+     object, the TO EXPRESSION returns the pointer given the original
+     object, and the FROM EXPRESSION returns the original object given
+     the pointer.  The pointer will be available using the `%h' escape.
+
+`chain_next ("EXPRESSION")'
+`chain_prev ("EXPRESSION")'
+`chain_circular ("EXPRESSION")'
+     It's helpful for the type machinery to know if objects are often
+     chained together in long lists; this lets it generate code that
+     uses less stack space by iterating along the list instead of
+     recursing down it.  `chain_next' is an expression for the next
+     item in the list, `chain_prev' is an expression for the previous
+     item.  For singly linked lists, use only `chain_next'; for doubly
+     linked lists, use both.  The machinery requires that taking the
+     next item of the previous item gives the original item.
+     `chain_circular' is similar to `chain_next', but can be used for
+     circular single linked lists.
+
+`reorder ("FUNCTION NAME")'
+     Some data structures depend on the relative ordering of pointers.
+     If the precompiled header machinery needs to change that ordering,
+     it will call the function referenced by the `reorder' option,
+     before changing the pointers in the object that's pointed to by
+     the field the option applies to.  The function must take four
+     arguments, with the signature
+     `void *, void *, gt_pointer_operator, void *'.  The first
+     parameter is a pointer to the structure that contains the object
+     being updated, or the object itself if there is no containing
+     structure.  The second parameter is a cookie that should be
+     ignored.  The third parameter is a routine that, given a pointer,
+     will update it to its correct new value.  The fourth parameter is
+     a cookie that must be passed to the second parameter.
+
+     PCH cannot handle data structures that depend on the absolute
+     values of pointers.  `reorder' functions can be expensive.  When
+     possible, it is better to depend on properties of the data, like
+     an ID number or the hash of a string instead.
+
+`special ("NAME")'
+     The `special' option is used to mark types that have to be dealt
+     with by special case machinery.  The parameter is the name of the
+     special case.  See `gengtype.c' for further details.  Avoid adding
+     new special cases unless there is no other alternative.
+
+
+File: gccint.info,  Node: GGC Roots,  Next: Files,  Prev: GTY Options,  Up: Type Information
+
+22.2 Marking Roots for the Garbage Collector
+============================================
+
+In addition to keeping track of types, the type machinery also locates
+the global variables ("roots") that the garbage collector starts at.
+Roots must be declared using one of the following syntaxes:
+
+   * `extern GTY(([OPTIONS])) TYPE NAME;'
+
+   * `static GTY(([OPTIONS])) TYPE NAME;'
+ The syntax
+   * `GTY(([OPTIONS])) TYPE NAME;'
+ is _not_ accepted.  There should be an `extern' declaration of such a
+variable in a header somewhere--mark that, not the definition.  Or, if
+the variable is only used in one file, make it `static'.
+
+
+File: gccint.info,  Node: Files,  Next: Invoking the garbage collector,  Prev: GGC Roots,  Up: Type Information
+
+22.3 Source Files Containing Type Information
+=============================================
+
+Whenever you add `GTY' markers to a source file that previously had
+none, or create a new source file containing `GTY' markers, there are
+three things you need to do:
+
+  1. You need to add the file to the list of source files the type
+     machinery scans.  There are four cases:
+
+       a. For a back-end file, this is usually done automatically; if
+          not, you should add it to `target_gtfiles' in the appropriate
+          port's entries in `config.gcc'.
+
+       b. For files shared by all front ends, add the filename to the
+          `GTFILES' variable in `Makefile.in'.
+
+       c. For files that are part of one front end, add the filename to
+          the `gtfiles' variable defined in the appropriate
+          `config-lang.in'.  For C, the file is `c-config-lang.in'.
+          Headers should appear before non-headers in this list.
+
+       d. For files that are part of some but not all front ends, add
+          the filename to the `gtfiles' variable of _all_ the front ends
+          that use it.
+
+  2. If the file was a header file, you'll need to check that it's
+     included in the right place to be visible to the generated files.
+     For a back-end header file, this should be done automatically.
+     For a front-end header file, it needs to be included by the same
+     file that includes `gtype-LANG.h'.  For other header files, it
+     needs to be included in `gtype-desc.c', which is a generated file,
+     so add it to `ifiles' in `open_base_file' in `gengtype.c'.
+
+     For source files that aren't header files, the machinery will
+     generate a header file that should be included in the source file
+     you just changed.  The file will be called `gt-PATH.h' where PATH
+     is the pathname relative to the `gcc' directory with slashes
+     replaced by -, so for example the header file to be included in
+     `cp/parser.c' is called `gt-cp-parser.c'.  The generated header
+     file should be included after everything else in the source file.
+     Don't forget to mention this file as a dependency in the
+     `Makefile'!
+
+
+ For language frontends, there is another file that needs to be included
+somewhere.  It will be called `gtype-LANG.h', where LANG is the name of
+the subdirectory the language is contained in.
+
+ Plugins can add additional root tables.  Run the `gengtype' utility in
+plugin mode as `gengtype -P pluginout.h SOURCE-DIR FILE-LIST PLUGIN*.C'
+with your plugin files PLUGIN*.C using `GTY' to generate the
+PLUGINOUT.H file.  The GCC build tree is needed to be present in that
+mode.
+
+
+File: gccint.info,  Node: Invoking the garbage collector,  Prev: Files,  Up: Type Information
+
+22.4 How to invoke the garbage collector
+========================================
+
+The GCC garbage collector GGC is only invoked explicitly. In contrast
+with many other garbage collectors, it is not implicitly invoked by
+allocation routines when a lot of memory has been consumed. So the only
+way to have GGC reclaim storage it to call the `ggc_collect' function
+explicitly. This call is an expensive operation, as it may have to scan
+the entire heap. Beware that local variables (on the GCC call stack)
+are not followed by such an invocation (as many other garbage
+collectors do): you should reference all your data from static or
+external `GTY'-ed variables, and it is advised to call `ggc_collect'
+with a shallow call stack. The GGC is an exact mark and sweep garbage
+collector (so it does not scan the call stack for pointers). In
+practice GCC passes don't often call `ggc_collect' themselves, because
+it is called by the pass manager between passes.
+
+
+File: gccint.info,  Node: Plugins,  Next: Funding,  Prev: Type Information,  Up: Top
+
+23 Plugins
+**********
+
+23.1 Loading Plugins
+====================
+
+Plugins are supported on platforms that support `-ldl -rdynamic'.  They
+are loaded by the compiler using `dlopen' and invoked at pre-determined
+locations in the compilation process.
+
+ Plugins are loaded with
+
+ `-fplugin=/path/to/NAME.so' `-fplugin-arg-NAME-<key1>[=<value1>]'
+
+ The plugin arguments are parsed by GCC and passed to respective
+plugins as key-value pairs. Multiple plugins can be invoked by
+specifying multiple `-fplugin' arguments.
+
+23.2 Plugin API
+===============
+
+Plugins are activated by the compiler at specific events as defined in
+`gcc-plugin.h'.  For each event of interest, the plugin should call
+`register_callback' specifying the name of the event and address of the
+callback function that will handle that event.
+
+ The header `gcc-plugin.h' must be the first gcc header to be included.
+
+23.2.1 Plugin license check
+---------------------------
+
+Every plugin should define the global symbol `plugin_is_GPL_compatible'
+to assert that it has been licensed under a GPL-compatible license.  If
+this symbol does not exist, the compiler will emit a fatal error and
+exit with the error message:
+
+     fatal error: plugin <name> is not licensed under a GPL-compatible license
+     <name>: undefined symbol: plugin_is_GPL_compatible
+     compilation terminated
+
+ The type of the symbol is irrelevant.  The compiler merely asserts that
+it exists in the global scope.  Something like this is enough:
+
+     int plugin_is_GPL_compatible;
+
+23.2.2 Plugin initialization
+----------------------------
+
+Every plugin should export a function called `plugin_init' that is
+called right after the plugin is loaded. This function is responsible
+for registering all the callbacks required by the plugin and do any
+other required initialization.
+
+ This function is called from `compile_file' right before invoking the
+parser.  The arguments to `plugin_init' are:
+
+   * `plugin_info': Plugin invocation information.
+
+   * `version': GCC version.
+
+ The `plugin_info' struct is defined as follows:
+
+     struct plugin_name_args
+     {
+       char *base_name;              /* Short name of the plugin
+                                        (filename without .so suffix). */
+       const char *full_name;        /* Path to the plugin as specified with
+                                        -fplugin=. */
+       int argc;                     /* Number of arguments specified with
+                                        -fplugin-arg-.... */
+       struct plugin_argument *argv; /* Array of ARGC key-value pairs. */
+       const char *version;          /* Version string provided by plugin. */
+       const char *help;             /* Help string provided by plugin. */
+     }
+
+ If initialization fails, `plugin_init' must return a non-zero value.
+Otherwise, it should return 0.
+
+ The version of the GCC compiler loading the plugin is described by the
+following structure:
+
+     struct plugin_gcc_version
+     {
+       const char *basever;
+       const char *datestamp;
+       const char *devphase;
+       const char *revision;
+       const char *configuration_arguments;
+     };
+
+ The function `plugin_default_version_check' takes two pointers to such
+structure and compare them field by field. It can be used by the
+plugin's `plugin_init' function.
+
+ The version of GCC used to compile the plugin can be found in the
+symbol `gcc_version' defined in the header `plugin-version.h'. The
+recommended version check to perform looks like
+
+     #include "plugin-version.h"
+     ...
+
+     int
+     plugin_init (struct plugin_name_args *plugin_info,
+                  struct plugin_gcc_version *version)
+     {
+       if (!plugin_default_version_check (version, &gcc_version))
+         return 1;
+
+     }
+
+ but you can also check the individual fields if you want a less strict
+check.
+
+23.2.3 Plugin callbacks
+-----------------------
+
+Callback functions have the following prototype:
+
+     /* The prototype for a plugin callback function.
+          gcc_data  - event-specific data provided by GCC
+          user_data - plugin-specific data provided by the plug-in.  */
+     typedef void (*plugin_callback_func)(void *gcc_data, void *user_data);
+
+ Callbacks can be invoked at the following pre-determined events:
+
+     enum plugin_event
+     {
+       PLUGIN_PASS_MANAGER_SETUP,    /* To hook into pass manager.  */
+       PLUGIN_FINISH_TYPE,           /* After finishing parsing a type.  */
+       PLUGIN_FINISH_UNIT,           /* Useful for summary processing.  */
+       PLUGIN_PRE_GENERICIZE,        /* Allows to see low level AST in C and C++ frontends.  */
+       PLUGIN_FINISH,                /* Called before GCC exits.  */
+       PLUGIN_INFO,                  /* Information about the plugin. */
+       PLUGIN_GGC_START,             /* Called at start of GCC Garbage Collection. */
+       PLUGIN_GGC_MARKING,           /* Extend the GGC marking. */
+       PLUGIN_GGC_END,               /* Called at end of GGC. */
+       PLUGIN_REGISTER_GGC_ROOTS,    /* Register an extra GGC root table. */
+       PLUGIN_REGISTER_GGC_CACHES,   /* Register an extra GGC cache table. */
+       PLUGIN_ATTRIBUTES,            /* Called during attribute registration */
+       PLUGIN_START_UNIT,            /* Called before processing a translation unit.  */
+       PLUGIN_PRAGMAS,               /* Called during pragma registration. */
+       /* Called before first pass from all_passes.  */
+       PLUGIN_ALL_PASSES_START,
+       /* Called after last pass from all_passes.  */
+       PLUGIN_ALL_PASSES_END,
+       /* Called before first ipa pass.  */
+       PLUGIN_ALL_IPA_PASSES_START,
+       /* Called after last ipa pass.  */
+       PLUGIN_ALL_IPA_PASSES_END,
+       /* Allows to override pass gate decision for current_pass.  */
+       PLUGIN_OVERRIDE_GATE,
+       /* Called before executing a pass.  */
+       PLUGIN_PASS_EXECUTION,
+       /* Called before executing subpasses of a GIMPLE_PASS in
+          execute_ipa_pass_list.  */
+       PLUGIN_EARLY_GIMPLE_PASSES_START,
+       /* Called after executing subpasses of a GIMPLE_PASS in
+          execute_ipa_pass_list.  */
+       PLUGIN_EARLY_GIMPLE_PASSES_END,
+       /* Called when a pass is first instantiated.  */
+       PLUGIN_NEW_PASS,
+
+       PLUGIN_EVENT_FIRST_DYNAMIC    /* Dummy event used for indexing callback
+                                        array.  */
+     };
+
+ In addition, plugins can also look up the enumerator of a named event,
+and / or generate new events dynamically, by calling the function
+`get_named_event_id'.
+
+ To register a callback, the plugin calls `register_callback' with the
+arguments:
+
+   * `char *name': Plugin name.
+
+   * `int event': The event code.
+
+   * `plugin_callback_func callback': The function that handles `event'.
+
+   * `void *user_data': Pointer to plugin-specific data.
+
+ For the PLUGIN_PASS_MANAGER_SETUP, PLUGIN_INFO,
+PLUGIN_REGISTER_GGC_ROOTS and PLUGIN_REGISTER_GGC_CACHES pseudo-events
+the `callback' should be null, and the `user_data' is specific.
+
+ When the PLUGIN_PRAGMAS event is triggered (with a null pointer as
+data from GCC), plugins may register their own pragmas using functions
+like `c_register_pragma' or `c_register_pragma_with_expansion'.
+
+23.3 Interacting with the pass manager
+======================================
+
+There needs to be a way to add/reorder/remove passes dynamically. This
+is useful for both analysis plugins (plugging in after a certain pass
+such as CFG or an IPA pass) and optimization plugins.
+
+ Basic support for inserting new passes or replacing existing passes is
+provided. A plugin registers a new pass with GCC by calling
+`register_callback' with the `PLUGIN_PASS_MANAGER_SETUP' event and a
+pointer to a `struct register_pass_info' object defined as follows
+
+     enum pass_positioning_ops
+     {
+       PASS_POS_INSERT_AFTER,  // Insert after the reference pass.
+       PASS_POS_INSERT_BEFORE, // Insert before the reference pass.
+       PASS_POS_REPLACE        // Replace the reference pass.
+     };
+
+     struct register_pass_info
+     {
+       struct opt_pass *pass;            /* New pass provided by the plugin.  */
+       const char *reference_pass_name;  /* Name of the reference pass for hooking
+                                            up the new pass.  */
+       int ref_pass_instance_number;     /* Insert the pass at the specified
+                                            instance number of the reference pass.  */
+                                         /* Do it for every instance if it is 0.  */
+       enum pass_positioning_ops pos_op; /* how to insert the new pass.  */
+     };
+
+
+     /* Sample plugin code that registers a new pass.  */
+     int
+     plugin_init (struct plugin_name_args *plugin_info,
+                  struct plugin_gcc_version *version)
+     {
+       struct register_pass_info pass_info;
+
+       ...
+
+       /* Code to fill in the pass_info object with new pass information.  */
+
+       ...
+
+       /* Register the new pass.  */
+       register_callback (plugin_info->base_name, PLUGIN_PASS_MANAGER_SETUP, NULL, &pass_info);
+
+       ...
+     }
+
+23.4 Interacting with the GCC Garbage Collector
+===============================================
+
+Some plugins may want to be informed when GGC (the GCC Garbage
+Collector) is running. They can register callbacks for the
+`PLUGIN_GGC_START' and `PLUGIN_GGC_END' events (for which the callback
+is called with a null `gcc_data') to be notified of the start or end of
+the GCC garbage collection.
+
+ Some plugins may need to have GGC mark additional data. This can be
+done by registering a callback (called with a null `gcc_data') for the
+`PLUGIN_GGC_MARKING' event. Such callbacks can call the `ggc_set_mark'
+routine, preferably thru the `ggc_mark' macro (and conversely, these
+routines should usually not be used in plugins outside of the
+`PLUGIN_GGC_MARKING' event).
+
+ Some plugins may need to add extra GGC root tables, e.g. to handle
+their own `GTY'-ed data. This can be done with the
+`PLUGIN_REGISTER_GGC_ROOTS' pseudo-event with a null callback and the
+extra root table (of type `struct ggc_root_tab*') as `user_data'.
+Plugins that want to use the `if_marked' hash table option can add the
+extra GGC cache tables generated by `gengtype' using the
+`PLUGIN_REGISTER_GGC_CACHES' pseudo-event with a null callback and the
+extra cache table (of type `struct ggc_cache_tab*') as `user_data'.
+Running the `gengtype -p SOURCE-DIR FILE-LIST PLUGIN*.C ...' utility
+generates these extra root tables.
+
+ You should understand the details of memory management inside GCC
+before using `PLUGIN_GGC_MARKING', `PLUGIN_REGISTER_GGC_ROOTS' or
+`PLUGIN_REGISTER_GGC_CACHES'.
+
+23.5 Giving information about a plugin
+======================================
+
+A plugin should give some information to the user about itself. This
+uses the following structure:
+
+     struct plugin_info
+     {
+       const char *version;
+       const char *help;
+     };
+
+ Such a structure is passed as the `user_data' by the plugin's init
+routine using `register_callback' with the `PLUGIN_INFO' pseudo-event
+and a null callback.
+
+23.6 Registering custom attributes or pragmas
+=============================================
+
+For analysis (or other) purposes it is useful to be able to add custom
+attributes or pragmas.
+
+ The `PLUGIN_ATTRIBUTES' callback is called during attribute
+registration. Use the `register_attribute' function to register custom
+attributes.
+
+     /* Attribute handler callback */
+     static tree
+     handle_user_attribute (tree *node, tree name, tree args,
+                            int flags, bool *no_add_attrs)
+     {
+       return NULL_TREE;
+     }
+
+     /* Attribute definition */
+     static struct attribute_spec user_attr =
+       { "user", 1, 1, false,  false, false, handle_user_attribute };
+
+     /* Plugin callback called during attribute registration.
+     Registered with register_callback (plugin_name, PLUGIN_ATTRIBUTES, register_attributes, NULL)
+     */
+     static void
+     register_attributes (void *event_data, void *data)
+     {
+       warning (0, G_("Callback to register attributes"));
+       register_attribute (&user_attr);
+     }
+
+ The `PLUGIN_PRAGMAS' callback is called during pragmas registration.
+Use the `c_register_pragma' or `c_register_pragma_with_expansion'
+functions to register custom pragmas.
+
+     /* Plugin callback called during pragmas registration. Registered with
+          register_callback (plugin_name, PLUGIN_PRAGMAS,
+                             register_my_pragma, NULL);
+     */
+     static void
+     register_my_pragma (void *event_data, void *data)
+     {
+       warning (0, G_("Callback to register pragmas"));
+       c_register_pragma ("GCCPLUGIN", "sayhello", handle_pragma_sayhello);
+     }
+
+ It is suggested to pass `"GCCPLUGIN"' (or a short name identifying
+your plugin) as the "space" argument of your pragma.
+
+23.7 Recording information about pass execution
+===============================================
+
+The event PLUGIN_PASS_EXECUTION passes the pointer to the executed pass
+(the same as current_pass) as `gcc_data' to the callback.  You can also
+inspect cfun to find out about which function this pass is executed for.
+Note that this event will only be invoked if the gate check (if
+applicable, modified by PLUGIN_OVERRIDE_GATE) succeeds.  You can use
+other hooks, like `PLUGIN_ALL_PASSES_START', `PLUGIN_ALL_PASSES_END',
+`PLUGIN_ALL_IPA_PASSES_START', `PLUGIN_ALL_IPA_PASSES_END',
+`PLUGIN_EARLY_GIMPLE_PASSES_START', and/or
+`PLUGIN_EARLY_GIMPLE_PASSES_END' to manipulate global state in your
+plugin(s) in order to get context for the pass execution.
+
+23.8 Controlling which passes are being run
+===========================================
+
+After the original gate function for a pass is called, its result - the
+gate status - is stored as an integer.  Then the event
+`PLUGIN_OVERRIDE_GATE' is invoked, with a pointer to the gate status in
+the `gcc_data' parameter to the callback function.  A nonzero value of
+the gate status means that the pass is to be executed.  You can both
+read and write the gate status via the passed pointer.
+
+23.9 Keeping track of available passes
+======================================
+
+When your plugin is loaded, you can inspect the various pass lists to
+determine what passes are available.  However, other plugins might add
+new passes.  Also, future changes to GCC might cause generic passes to
+be added after plugin loading.  When a pass is first added to one of
+the pass lists, the event `PLUGIN_NEW_PASS' is invoked, with the
+callback parameter `gcc_data' pointing to the new pass.
+
+23.10 Building GCC plugins
+==========================
+
+If plugins are enabled, GCC installs the headers needed to build a
+plugin (somewhere in the installation tree, e.g. under `/usr/local').
+In particular a `plugin/include' directory is installed, containing all
+the header files needed to build plugins.
+
+ On most systems, you can query this `plugin' directory by invoking
+`gcc -print-file-name=plugin' (replace if needed `gcc' with the
+appropriate program path).
+
+ The following GNU Makefile excerpt shows how to build a simple plugin:
+
+     GCC=gcc
+     PLUGIN_SOURCE_FILES= plugin1.c plugin2.c
+     PLUGIN_OBJECT_FILES= $(patsubst %.c,%.o,$(PLUGIN_SOURCE_FILES))
+     GCCPLUGINS_DIR:= $(shell $(GCC) -print-file-name=plugin)
+     CFLAGS+= -I$(GCCPLUGINS_DIR)/include -fPIC -O2
+
+     plugin.so: $(PLUGIN_OBJECT_FILES)
+        $(GCC) -shared $^ -o $@
+
+ A single source file plugin may be built with `gcc -I`gcc
+-print-file-name=plugin`/include -fPIC -shared -O2 plugin.c -o
+plugin.so', using backquote shell syntax to query the `plugin'
+directory.
+
+ Plugins needing to use `gengtype' require a GCC build directory for
+the same version of GCC that they will be linked against.
+
+
+File: gccint.info,  Node: Funding,  Next: GNU Project,  Prev: Plugins,  Up: Top
+
+Funding Free Software
+*********************
+
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+
+ Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers--the Free Software Foundation, and others.
+
+ The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+
+ To make this approach work, you must insist on numbers that you can
+compare, such as, "We will donate ten dollars to the Frobnitz project
+for each disk sold."  Don't be satisfied with a vague promise, such as
+"A portion of the profits are donated," since it doesn't give a basis
+for comparison.
+
+ Even a precise fraction "of the profits from this disk" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is $50, ten percent of the profit is probably less
+than a dollar; it might be a few cents, or nothing at all.
+
+ Some redistributors do development work themselves.  This is useful
+too; but to keep everyone honest, you need to inquire how much they do,
+and what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new CPU to the GNU Compiler Collection
+contribute more; major new features or packages contribute the most.
+
+ By establishing the idea that supporting further development is "the
+proper thing to do" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+
+     Copyright (C) 1994 Free Software Foundation, Inc.
+     Verbatim copying and redistribution of this section is permitted
+     without royalty; alteration is not permitted.
+
+
+File: gccint.info,  Node: GNU Project,  Next: Copying,  Prev: Funding,  Up: Top
+
+The GNU Project and GNU/Linux
+*****************************
+
+The GNU Project was launched in 1984 to develop a complete Unix-like
+operating system which is free software: the GNU system.  (GNU is a
+recursive acronym for "GNU's Not Unix"; it is pronounced "guh-NEW".)
+Variants of the GNU operating system, which use the kernel Linux, are
+now widely used; though these systems are often referred to as "Linux",
+they are more accurately called GNU/Linux systems.
+
+ For more information, see:
+     `http://www.gnu.org/'
+     `http://www.gnu.org/gnu/linux-and-gnu.html'
+
+
+File: gccint.info,  Node: Copying,  Next: GNU Free Documentation License,  Prev: GNU Project,  Up: Top
+
+GNU General Public License
+**************************
+
+                        Version 3, 29 June 2007
+
+     Copyright (C) 2007 Free Software Foundation, Inc. `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies of this
+     license document, but changing it is not allowed.
+
+Preamble
+========
+
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+
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+     permission to propagate or modify any covered work.  These actions
+     infringe copyright if you do not accept this License.  Therefore,
+     by modifying or propagating a covered work, you indicate your
+     acceptance of this License to do so.
+
+ 10. Automatic Licensing of Downstream Recipients.
+
+     Each time you convey a covered work, the recipient automatically
+     receives a license from the original licensors, to run, modify and
+     propagate that work, subject to this License.  You are not
+     responsible for enforcing compliance by third parties with this
+     License.
+
+     An "entity transaction" is a transaction transferring control of an
+     organization, or substantially all assets of one, or subdividing an
+     organization, or merging organizations.  If propagation of a
+     covered work results from an entity transaction, each party to that
+     transaction who receives a copy of the work also receives whatever
+     licenses to the work the party's predecessor in interest had or
+     could give under the previous paragraph, plus a right to
+     possession of the Corresponding Source of the work from the
+     predecessor in interest, if the predecessor has it or can get it
+     with reasonable efforts.
+
+     You may not impose any further restrictions on the exercise of the
+     rights granted or affirmed under this License.  For example, you
+     may not impose a license fee, royalty, or other charge for
+     exercise of rights granted under this License, and you may not
+     initiate litigation (including a cross-claim or counterclaim in a
+     lawsuit) alleging that any patent claim is infringed by making,
+     using, selling, offering for sale, or importing the Program or any
+     portion of it.
+
+ 11. Patents.
+
+     A "contributor" is a copyright holder who authorizes use under this
+     License of the Program or a work on which the Program is based.
+     The work thus licensed is called the contributor's "contributor
+     version".
+
+     A contributor's "essential patent claims" are all patent claims
+     owned or controlled by the contributor, whether already acquired or
+     hereafter acquired, that would be infringed by some manner,
+     permitted by this License, of making, using, or selling its
+     contributor version, but do not include claims that would be
+     infringed only as a consequence of further modification of the
+     contributor version.  For purposes of this definition, "control"
+     includes the right to grant patent sublicenses in a manner
+     consistent with the requirements of this License.
+
+     Each contributor grants you a non-exclusive, worldwide,
+     royalty-free patent license under the contributor's essential
+     patent claims, to make, use, sell, offer for sale, import and
+     otherwise run, modify and propagate the contents of its
+     contributor version.
+
+     In the following three paragraphs, a "patent license" is any
+     express agreement or commitment, however denominated, not to
+     enforce a patent (such as an express permission to practice a
+     patent or covenant not to sue for patent infringement).  To
+     "grant" such a patent license to a party means to make such an
+     agreement or commitment not to enforce a patent against the party.
+
+     If you convey a covered work, knowingly relying on a patent
+     license, and the Corresponding Source of the work is not available
+     for anyone to copy, free of charge and under the terms of this
+     License, through a publicly available network server or other
+     readily accessible means, then you must either (1) cause the
+     Corresponding Source to be so available, or (2) arrange to deprive
+     yourself of the benefit of the patent license for this particular
+     work, or (3) arrange, in a manner consistent with the requirements
+     of this License, to extend the patent license to downstream
+     recipients.  "Knowingly relying" means you have actual knowledge
+     that, but for the patent license, your conveying the covered work
+     in a country, or your recipient's use of the covered work in a
+     country, would infringe one or more identifiable patents in that
+     country that you have reason to believe are valid.
+
+     If, pursuant to or in connection with a single transaction or
+     arrangement, you convey, or propagate by procuring conveyance of, a
+     covered work, and grant a patent license to some of the parties
+     receiving the covered work authorizing them to use, propagate,
+     modify or convey a specific copy of the covered work, then the
+     patent license you grant is automatically extended to all
+     recipients of the covered work and works based on it.
+
+     A patent license is "discriminatory" if it does not include within
+     the scope of its coverage, prohibits the exercise of, or is
+     conditioned on the non-exercise of one or more of the rights that
+     are specifically granted under this License.  You may not convey a
+     covered work if you are a party to an arrangement with a third
+     party that is in the business of distributing software, under
+     which you make payment to the third party based on the extent of
+     your activity of conveying the work, and under which the third
+     party grants, to any of the parties who would receive the covered
+     work from you, a discriminatory patent license (a) in connection
+     with copies of the covered work conveyed by you (or copies made
+     from those copies), or (b) primarily for and in connection with
+     specific products or compilations that contain the covered work,
+     unless you entered into that arrangement, or that patent license
+     was granted, prior to 28 March 2007.
+
+     Nothing in this License shall be construed as excluding or limiting
+     any implied license or other defenses to infringement that may
+     otherwise be available to you under applicable patent law.
+
+ 12. No Surrender of Others' Freedom.
+
+     If conditions are imposed on you (whether by court order,
+     agreement or otherwise) that contradict the conditions of this
+     License, they do not excuse you from the conditions of this
+     License.  If you cannot convey a covered work so as to satisfy
+     simultaneously your obligations under this License and any other
+     pertinent obligations, then as a consequence you may not convey it
+     at all.  For example, if you agree to terms that obligate you to
+     collect a royalty for further conveying from those to whom you
+     convey the Program, the only way you could satisfy both those
+     terms and this License would be to refrain entirely from conveying
+     the Program.
+
+ 13. Use with the GNU Affero General Public License.
+
+     Notwithstanding any other provision of this License, you have
+     permission to link or combine any covered work with a work licensed
+     under version 3 of the GNU Affero General Public License into a
+     single combined work, and to convey the resulting work.  The terms
+     of this License will continue to apply to the part which is the
+     covered work, but the special requirements of the GNU Affero
+     General Public License, section 13, concerning interaction through
+     a network will apply to the combination as such.
+
+ 14. Revised Versions of this License.
+
+     The Free Software Foundation may publish revised and/or new
+     versions of the GNU General Public License from time to time.
+     Such new versions will be similar in spirit to the present
+     version, but may differ in detail to address new problems or
+     concerns.
+
+     Each version is given a distinguishing version number.  If the
+     Program specifies that a certain numbered version of the GNU
+     General Public License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that numbered version or of any later version published by the
+     Free Software Foundation.  If the Program does not specify a
+     version number of the GNU General Public License, you may choose
+     any version ever published by the Free Software Foundation.
+
+     If the Program specifies that a proxy can decide which future
+     versions of the GNU General Public License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Program.
+
+     Later license versions may give you additional or different
+     permissions.  However, no additional obligations are imposed on any
+     author or copyright holder as a result of your choosing to follow a
+     later version.
+
+ 15. Disclaimer of Warranty.
+
+     THERE IS NO WARRANTY FOR THE PROGRAM, TO THE EXTENT PERMITTED BY
+     APPLICABLE LAW.  EXCEPT WHEN OTHERWISE STATED IN WRITING THE
+     COPYRIGHT HOLDERS AND/OR OTHER PARTIES PROVIDE THE PROGRAM "AS IS"
+     WITHOUT WARRANTY OF ANY KIND, EITHER EXPRESSED OR IMPLIED,
+     INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+     MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.  THE ENTIRE
+     RISK AS TO THE QUALITY AND PERFORMANCE OF THE PROGRAM IS WITH YOU.
+     SHOULD THE PROGRAM PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL
+     NECESSARY SERVICING, REPAIR OR CORRECTION.
+
+ 16. Limitation of Liability.
+
+     IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN
+     WRITING WILL ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MODIFIES
+     AND/OR CONVEYS THE PROGRAM AS PERMITTED ABOVE, BE LIABLE TO YOU
+     FOR DAMAGES, INCLUDING ANY GENERAL, SPECIAL, INCIDENTAL OR
+     CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE OR INABILITY TO USE
+     THE PROGRAM (INCLUDING BUT NOT LIMITED TO LOSS OF DATA OR DATA
+     BEING RENDERED INACCURATE OR LOSSES SUSTAINED BY YOU OR THIRD
+     PARTIES OR A FAILURE OF THE PROGRAM TO OPERATE WITH ANY OTHER
+     PROGRAMS), EVEN IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF
+     THE POSSIBILITY OF SUCH DAMAGES.
+
+ 17. Interpretation of Sections 15 and 16.
+
+     If the disclaimer of warranty and limitation of liability provided
+     above cannot be given local legal effect according to their terms,
+     reviewing courts shall apply local law that most closely
+     approximates an absolute waiver of all civil liability in
+     connection with the Program, unless a warranty or assumption of
+     liability accompanies a copy of the Program in return for a fee.
+
+
+END OF TERMS AND CONDITIONS
+===========================
+
+How to Apply These Terms to Your New Programs
+=============================================
+
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+
+ To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least the
+"copyright" line and a pointer to where the full notice is found.
+
+     ONE LINE TO GIVE THE PROGRAM'S NAME AND A BRIEF IDEA OF WHAT IT DOES.
+     Copyright (C) YEAR NAME OF AUTHOR
+
+     This program is free software: you can redistribute it and/or modify
+     it under the terms of the GNU General Public License as published by
+     the Free Software Foundation, either version 3 of the License, or (at
+     your option) any later version.
+
+     This program is distributed in the hope that it will be useful, but
+     WITHOUT ANY WARRANTY; without even the implied warranty of
+     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+     General Public License for more details.
+
+     You should have received a copy of the GNU General Public License
+     along with this program.  If not, see `http://www.gnu.org/licenses/'.
+
+ Also add information on how to contact you by electronic and paper
+mail.
+
+ If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+
+     PROGRAM Copyright (C) YEAR NAME OF AUTHOR
+     This program comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+     This is free software, and you are welcome to redistribute it
+     under certain conditions; type `show c' for details.
+
+ The hypothetical commands `show w' and `show c' should show the
+appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a GUI interface, you would
+use an "about box".
+
+ You should also get your employer (if you work as a programmer) or
+school, if any, to sign a "copyright disclaimer" for the program, if
+necessary.  For more information on this, and how to apply and follow
+the GNU GPL, see `http://www.gnu.org/licenses/'.
+
+ The GNU General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use the
+GNU Lesser General Public License instead of this License.  But first,
+please read `http://www.gnu.org/philosophy/why-not-lgpl.html'.
+
+
+File: gccint.info,  Node: GNU Free Documentation License,  Next: Contributors,  Prev: Copying,  Up: Top
+
+GNU Free Documentation License
+******************************
+
+                      Version 1.2, November 2002
+
+     Copyright (C) 2000,2001,2002 Free Software Foundation, Inc.
+     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
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+
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+
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+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
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+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided for under this License.  Any other
+     attempt to copy, modify, sublicense or distribute the Document is
+     void, and will automatically terminate your rights under this
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+     from you under this License will not have their licenses
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+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
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+     have the option of following the terms and conditions either of
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+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.
+
+ADDENDUM: How to use this License for your documents
+====================================================
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+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
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+       under the terms of the GNU Free Documentation License, Version 1.2
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+replace the "with...Texts." line with this:
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+
+
+File: gccint.info,  Node: Contributors,  Next: Option Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Contributors to GCC
+*******************
+
+The GCC project would like to thank its many contributors.  Without
+them the project would not have been nearly as successful as it has
+been.  Any omissions in this list are accidental.  Feel free to contact
+<law@redhat.com> or <gerald@pfeifer.com> if you have been left out or
+some of your contributions are not listed.  Please keep this list in
+alphabetical order.
+
+   * Analog Devices helped implement the support for complex data types
+     and iterators.
+
+   * John David Anglin for threading-related fixes and improvements to
+     libstdc++-v3, and the HP-UX port.
+
+   * James van Artsdalen wrote the code that makes efficient use of the
+     Intel 80387 register stack.
+
+   * Abramo and Roberto Bagnara for the SysV68 Motorola 3300 Delta
+     Series port.
+
+   * Alasdair Baird for various bug fixes.
+
+   * Giovanni Bajo for analyzing lots of complicated C++ problem
+     reports.
+
+   * Peter Barada for his work to improve code generation for new
+     ColdFire cores.
+
+   * Gerald Baumgartner added the signature extension to the C++ front
+     end.
+
+   * Godmar Back for his Java improvements and encouragement.
+
+   * Scott Bambrough for help porting the Java compiler.
+
+   * Wolfgang Bangerth for processing tons of bug reports.
+
+   * Jon Beniston for his Microsoft Windows port of Java and port to
+     Lattice Mico32.
+
+   * Daniel Berlin for better DWARF2 support, faster/better
+     optimizations, improved alias analysis, plus migrating GCC to
+     Bugzilla.
+
+   * Geoff Berry for his Java object serialization work and various
+     patches.
+
+   * Uros Bizjak for the implementation of x87 math built-in functions
+     and for various middle end and i386 back end improvements and bug
+     fixes.
+
+   * Eric Blake for helping to make GCJ and libgcj conform to the
+     specifications.
+
+   * Janne Blomqvist for contributions to GNU Fortran.
+
+   * Segher Boessenkool for various fixes.
+
+   * Hans-J. Boehm for his garbage collector, IA-64 libffi port, and
+     other Java work.
+
+   * Neil Booth for work on cpplib, lang hooks, debug hooks and other
+     miscellaneous clean-ups.
+
+   * Steven Bosscher for integrating the GNU Fortran front end into GCC
+     and for contributing to the tree-ssa branch.
+
+   * Eric Botcazou for fixing middle- and backend bugs left and right.
+
+   * Per Bothner for his direction via the steering committee and
+     various improvements to the infrastructure for supporting new
+     languages.  Chill front end implementation.  Initial
+     implementations of cpplib, fix-header, config.guess, libio, and
+     past C++ library (libg++) maintainer.  Dreaming up, designing and
+     implementing much of GCJ.
+
+   * Devon Bowen helped port GCC to the Tahoe.
+
+   * Don Bowman for mips-vxworks contributions.
+
+   * Dave Brolley for work on cpplib and Chill.
+
+   * Paul Brook for work on the ARM architecture and maintaining GNU
+     Fortran.
+
+   * Robert Brown implemented the support for Encore 32000 systems.
+
+   * Christian Bruel for improvements to local store elimination.
+
+   * Herman A.J. ten Brugge for various fixes.
+
+   * Joerg Brunsmann for Java compiler hacking and help with the GCJ
+     FAQ.
+
+   * Joe Buck for his direction via the steering committee.
+
+   * Craig Burley for leadership of the G77 Fortran effort.
+
+   * Stephan Buys for contributing Doxygen notes for libstdc++.
+
+   * Paolo Carlini for libstdc++ work: lots of efficiency improvements
+     to the C++ strings, streambufs and formatted I/O, hard detective
+     work on the frustrating localization issues, and keeping up with
+     the problem reports.
+
+   * John Carr for his alias work, SPARC hacking, infrastructure
+     improvements, previous contributions to the steering committee,
+     loop optimizations, etc.
+
+   * Stephane Carrez for 68HC11 and 68HC12 ports.
+
+   * Steve Chamberlain for support for the Renesas SH and H8 processors
+     and the PicoJava processor, and for GCJ config fixes.
+
+   * Glenn Chambers for help with the GCJ FAQ.
+
+   * John-Marc Chandonia for various libgcj patches.
+
+   * Denis Chertykov for contributing and maintaining the AVR port, the
+     first GCC port for an 8-bit architecture.
+
+   * Scott Christley for his Objective-C contributions.
+
+   * Eric Christopher for his Java porting help and clean-ups.
+
+   * Branko Cibej for more warning contributions.
+
+   * The GNU Classpath project for all of their merged runtime code.
+
+   * Nick Clifton for arm, mcore, fr30, v850, m32r, rx work, `--help',
+     and other random hacking.
+
+   * Michael Cook for libstdc++ cleanup patches to reduce warnings.
+
+   * R. Kelley Cook for making GCC buildable from a read-only directory
+     as well as other miscellaneous build process and documentation
+     clean-ups.
+
+   * Ralf Corsepius for SH testing and minor bug fixing.
+
+   * Stan Cox for care and feeding of the x86 port and lots of behind
+     the scenes hacking.
+
+   * Alex Crain provided changes for the 3b1.
+
+   * Ian Dall for major improvements to the NS32k port.
+
+   * Paul Dale for his work to add uClinux platform support to the m68k
+     backend.
+
+   * Dario Dariol contributed the four varieties of sample programs
+     that print a copy of their source.
+
+   * Russell Davidson for fstream and stringstream fixes in libstdc++.
+
+   * Bud Davis for work on the G77 and GNU Fortran compilers.
+
+   * Mo DeJong for GCJ and libgcj bug fixes.
+
+   * DJ Delorie for the DJGPP port, build and libiberty maintenance,
+     various bug fixes, and the M32C and MeP ports.
+
+   * Arnaud Desitter for helping to debug GNU Fortran.
+
+   * Gabriel Dos Reis for contributions to G++, contributions and
+     maintenance of GCC diagnostics infrastructure, libstdc++-v3,
+     including `valarray<>', `complex<>', maintaining the numerics
+     library (including that pesky `<limits>' :-) and keeping
+     up-to-date anything to do with numbers.
+
+   * Ulrich Drepper for his work on glibc, testing of GCC using glibc,
+     ISO C99 support, CFG dumping support, etc., plus support of the
+     C++ runtime libraries including for all kinds of C interface
+     issues, contributing and maintaining `complex<>', sanity checking
+     and disbursement, configuration architecture, libio maintenance,
+     and early math work.
+
+   * Zdenek Dvorak for a new loop unroller and various fixes.
+
+   * Richard Earnshaw for his ongoing work with the ARM.
+
+   * David Edelsohn for his direction via the steering committee,
+     ongoing work with the RS6000/PowerPC port, help cleaning up Haifa
+     loop changes, doing the entire AIX port of libstdc++ with his bare
+     hands, and for ensuring GCC properly keeps working on AIX.
+
+   * Kevin Ediger for the floating point formatting of num_put::do_put
+     in libstdc++.
+
+   * Phil Edwards for libstdc++ work including configuration hackery,
+     documentation maintainer, chief breaker of the web pages, the
+     occasional iostream bug fix, and work on shared library symbol
+     versioning.
+
+   * Paul Eggert for random hacking all over GCC.
+
+   * Mark Elbrecht for various DJGPP improvements, and for libstdc++
+     configuration support for locales and fstream-related fixes.
+
+   * Vadim Egorov for libstdc++ fixes in strings, streambufs, and
+     iostreams.
+
+   * Christian Ehrhardt for dealing with bug reports.
+
+   * Ben Elliston for his work to move the Objective-C runtime into its
+     own subdirectory and for his work on autoconf.
+
+   * Revital Eres for work on the PowerPC 750CL port.
+
+   * Marc Espie for OpenBSD support.
+
+   * Doug Evans for much of the global optimization framework, arc,
+     m32r, and SPARC work.
+
+   * Christopher Faylor for his work on the Cygwin port and for caring
+     and feeding the gcc.gnu.org box and saving its users tons of spam.
+
+   * Fred Fish for BeOS support and Ada fixes.
+
+   * Ivan Fontes Garcia for the Portuguese translation of the GCJ FAQ.
+
+   * Peter Gerwinski for various bug fixes and the Pascal front end.
+
+   * Kaveh R. Ghazi for his direction via the steering committee,
+     amazing work to make `-W -Wall -W* -Werror' useful, and
+     continuously testing GCC on a plethora of platforms.  Kaveh
+     extends his gratitude to the CAIP Center at Rutgers University for
+     providing him with computing resources to work on Free Software
+     since the late 1980s.
+
+   * John Gilmore for a donation to the FSF earmarked improving GNU
+     Java.
+
+   * Judy Goldberg for c++ contributions.
+
+   * Torbjorn Granlund for various fixes and the c-torture testsuite,
+     multiply- and divide-by-constant optimization, improved long long
+     support, improved leaf function register allocation, and his
+     direction via the steering committee.
+
+   * Anthony Green for his `-Os' contributions, the moxie port, and
+     Java front end work.
+
+   * Stu Grossman for gdb hacking, allowing GCJ developers to debug
+     Java code.
+
+   * Michael K. Gschwind contributed the port to the PDP-11.
+
+   * Richard Guenther for his ongoing middle-end contributions and bug
+     fixes and for release management.
+
+   * Ron Guilmette implemented the `protoize' and `unprotoize' tools,
+     the support for Dwarf symbolic debugging information, and much of
+     the support for System V Release 4.  He has also worked heavily on
+     the Intel 386 and 860 support.
+
+   * Mostafa Hagog for Swing Modulo Scheduling (SMS) and post reload
+     GCSE.
+
+   * Bruno Haible for improvements in the runtime overhead for EH, new
+     warnings and assorted bug fixes.
+
+   * Andrew Haley for his amazing Java compiler and library efforts.
+
+   * Chris Hanson assisted in making GCC work on HP-UX for the 9000
+     series 300.
+
+   * Michael Hayes for various thankless work he's done trying to get
+     the c30/c40 ports functional.  Lots of loop and unroll
+     improvements and fixes.
+
+   * Dara Hazeghi for wading through myriads of target-specific bug
+     reports.
+
+   * Kate Hedstrom for staking the G77 folks with an initial testsuite.
+
+   * Richard Henderson for his ongoing SPARC, alpha, ia32, and ia64
+     work, loop opts, and generally fixing lots of old problems we've
+     ignored for years, flow rewrite and lots of further stuff,
+     including reviewing tons of patches.
+
+   * Aldy Hernandez for working on the PowerPC port, SIMD support, and
+     various fixes.
+
+   * Nobuyuki Hikichi of Software Research Associates, Tokyo,
+     contributed the support for the Sony NEWS machine.
+
+   * Kazu Hirata for caring and feeding the Renesas H8/300 port and
+     various fixes.
+
+   * Katherine Holcomb for work on GNU Fortran.
+
+   * Manfred Hollstein for his ongoing work to keep the m88k alive, lots
+     of testing and bug fixing, particularly of GCC configury code.
+
+   * Steve Holmgren for MachTen patches.
+
+   * Jan Hubicka for his x86 port improvements.
+
+   * Falk Hueffner for working on C and optimization bug reports.
+
+   * Bernardo Innocenti for his m68k work, including merging of
+     ColdFire improvements and uClinux support.
+
+   * Christian Iseli for various bug fixes.
+
+   * Kamil Iskra for general m68k hacking.
+
+   * Lee Iverson for random fixes and MIPS testing.
+
+   * Andreas Jaeger for testing and benchmarking of GCC and various bug
+     fixes.
+
+   * Jakub Jelinek for his SPARC work and sibling call optimizations as
+     well as lots of bug fixes and test cases, and for improving the
+     Java build system.
+
+   * Janis Johnson for ia64 testing and fixes, her quality improvement
+     sidetracks, and web page maintenance.
+
+   * Kean Johnston for SCO OpenServer support and various fixes.
+
+   * Tim Josling for the sample language treelang based originally on
+     Richard Kenner's "toy" language.
+
+   * Nicolai Josuttis for additional libstdc++ documentation.
+
+   * Klaus Kaempf for his ongoing work to make alpha-vms a viable
+     target.
+
+   * Steven G. Kargl for work on GNU Fortran.
+
+   * David Kashtan of SRI adapted GCC to VMS.
+
+   * Ryszard Kabatek for many, many libstdc++ bug fixes and
+     optimizations of strings, especially member functions, and for
+     auto_ptr fixes.
+
+   * Geoffrey Keating for his ongoing work to make the PPC work for
+     GNU/Linux and his automatic regression tester.
+
+   * Brendan Kehoe for his ongoing work with G++ and for a lot of early
+     work in just about every part of libstdc++.
+
+   * Oliver M. Kellogg of Deutsche Aerospace contributed the port to the
+     MIL-STD-1750A.
+
+   * Richard Kenner of the New York University Ultracomputer Research
+     Laboratory wrote the machine descriptions for the AMD 29000, the
+     DEC Alpha, the IBM RT PC, and the IBM RS/6000 as well as the
+     support for instruction attributes.  He also made changes to
+     better support RISC processors including changes to common
+     subexpression elimination, strength reduction, function calling
+     sequence handling, and condition code support, in addition to
+     generalizing the code for frame pointer elimination and delay slot
+     scheduling.  Richard Kenner was also the head maintainer of GCC
+     for several years.
+
+   * Mumit Khan for various contributions to the Cygwin and Mingw32
+     ports and maintaining binary releases for Microsoft Windows hosts,
+     and for massive libstdc++ porting work to Cygwin/Mingw32.
+
+   * Robin Kirkham for cpu32 support.
+
+   * Mark Klein for PA improvements.
+
+   * Thomas Koenig for various bug fixes.
+
+   * Bruce Korb for the new and improved fixincludes code.
+
+   * Benjamin Kosnik for his G++ work and for leading the libstdc++-v3
+     effort.
+
+   * Charles LaBrec contributed the support for the Integrated Solutions
+     68020 system.
+
+   * Asher Langton and Mike Kumbera for contributing Cray pointer
+     support to GNU Fortran, and for other GNU Fortran improvements.
+
+   * Jeff Law for his direction via the steering committee,
+     coordinating the entire egcs project and GCC 2.95, rolling out
+     snapshots and releases, handling merges from GCC2, reviewing tons
+     of patches that might have fallen through the cracks else, and
+     random but extensive hacking.
+
+   * Marc Lehmann for his direction via the steering committee and
+     helping with analysis and improvements of x86 performance.
+
+   * Victor Leikehman for work on GNU Fortran.
+
+   * Ted Lemon wrote parts of the RTL reader and printer.
+
+   * Kriang Lerdsuwanakij for C++ improvements including template as
+     template parameter support, and many C++ fixes.
+
+   * Warren Levy for tremendous work on libgcj (Java Runtime Library)
+     and random work on the Java front end.
+
+   * Alain Lichnewsky ported GCC to the MIPS CPU.
+
+   * Oskar Liljeblad for hacking on AWT and his many Java bug reports
+     and patches.
+
+   * Robert Lipe for OpenServer support, new testsuites, testing, etc.
+
+   * Chen Liqin for various S+core related fixes/improvement, and for
+     maintaining the S+core port.
+
+   * Weiwen Liu for testing and various bug fixes.
+
+   * Manuel Lo'pez-Iba'n~ez for improving `-Wconversion' and many other
+     diagnostics fixes and improvements.
+
+   * Dave Love for his ongoing work with the Fortran front end and
+     runtime libraries.
+
+   * Martin von Lo"wis for internal consistency checking infrastructure,
+     various C++ improvements including namespace support, and tons of
+     assistance with libstdc++/compiler merges.
+
+   * H.J. Lu for his previous contributions to the steering committee,
+     many x86 bug reports, prototype patches, and keeping the GNU/Linux
+     ports working.
+
+   * Greg McGary for random fixes and (someday) bounded pointers.
+
+   * Andrew MacLeod for his ongoing work in building a real EH system,
+     various code generation improvements, work on the global
+     optimizer, etc.
+
+   * Vladimir Makarov for hacking some ugly i960 problems, PowerPC
+     hacking improvements to compile-time performance, overall
+     knowledge and direction in the area of instruction scheduling, and
+     design and implementation of the automaton based instruction
+     scheduler.
+
+   * Bob Manson for his behind the scenes work on dejagnu.
+
+   * Philip Martin for lots of libstdc++ string and vector iterator
+     fixes and improvements, and string clean up and testsuites.
+
+   * All of the Mauve project contributors, for Java test code.
+
+   * Bryce McKinlay for numerous GCJ and libgcj fixes and improvements.
+
+   * Adam Megacz for his work on the Microsoft Windows port of GCJ.
+
+   * Michael Meissner for LRS framework, ia32, m32r, v850, m88k, MIPS,
+     powerpc, haifa, ECOFF debug support, and other assorted hacking.
+
+   * Jason Merrill for his direction via the steering committee and
+     leading the G++ effort.
+
+   * Martin Michlmayr for testing GCC on several architectures using the
+     entire Debian archive.
+
+   * David Miller for his direction via the steering committee, lots of
+     SPARC work, improvements in jump.c and interfacing with the Linux
+     kernel developers.
+
+   * Gary Miller ported GCC to Charles River Data Systems machines.
+
+   * Alfred Minarik for libstdc++ string and ios bug fixes, and turning
+     the entire libstdc++ testsuite namespace-compatible.
+
+   * Mark Mitchell for his direction via the steering committee,
+     mountains of C++ work, load/store hoisting out of loops, alias
+     analysis improvements, ISO C `restrict' support, and serving as
+     release manager for GCC 3.x.
+
+   * Alan Modra for various GNU/Linux bits and testing.
+
+   * Toon Moene for his direction via the steering committee, Fortran
+     maintenance, and his ongoing work to make us make Fortran run fast.
+
+   * Jason Molenda for major help in the care and feeding of all the
+     services on the gcc.gnu.org (formerly egcs.cygnus.com)
+     machine--mail, web services, ftp services, etc etc.  Doing all
+     this work on scrap paper and the backs of envelopes would have
+     been... difficult.
+
+   * Catherine Moore for fixing various ugly problems we have sent her
+     way, including the haifa bug which was killing the Alpha & PowerPC
+     Linux kernels.
+
+   * Mike Moreton for his various Java patches.
+
+   * David Mosberger-Tang for various Alpha improvements, and for the
+     initial IA-64 port.
+
+   * Stephen Moshier contributed the floating point emulator that
+     assists in cross-compilation and permits support for floating
+     point numbers wider than 64 bits and for ISO C99 support.
+
+   * Bill Moyer for his behind the scenes work on various issues.
+
+   * Philippe De Muyter for his work on the m68k port.
+
+   * Joseph S. Myers for his work on the PDP-11 port, format checking
+     and ISO C99 support, and continuous emphasis on (and contributions
+     to) documentation.
+
+   * Nathan Myers for his work on libstdc++-v3: architecture and
+     authorship through the first three snapshots, including
+     implementation of locale infrastructure, string, shadow C headers,
+     and the initial project documentation (DESIGN, CHECKLIST, and so
+     forth).  Later, more work on MT-safe string and shadow headers.
+
+   * Felix Natter for documentation on porting libstdc++.
+
+   * Nathanael Nerode for cleaning up the configuration/build process.
+
+   * NeXT, Inc. donated the front end that supports the Objective-C
+     language.
+
+   * Hans-Peter Nilsson for the CRIS and MMIX ports, improvements to
+     the search engine setup, various documentation fixes and other
+     small fixes.
+
+   * Geoff Noer for his work on getting cygwin native builds working.
+
+   * Diego Novillo for his work on Tree SSA, OpenMP, SPEC performance
+     tracking web pages, GIMPLE tuples, and assorted fixes.
+
+   * David O'Brien for the FreeBSD/alpha, FreeBSD/AMD x86-64,
+     FreeBSD/ARM, FreeBSD/PowerPC, and FreeBSD/SPARC64 ports and
+     related infrastructure improvements.
+
+   * Alexandre Oliva for various build infrastructure improvements,
+     scripts and amazing testing work, including keeping libtool issues
+     sane and happy.
+
+   * Stefan Olsson for work on mt_alloc.
+
+   * Melissa O'Neill for various NeXT fixes.
+
+   * Rainer Orth for random MIPS work, including improvements to GCC's
+     o32 ABI support, improvements to dejagnu's MIPS support, Java
+     configuration clean-ups and porting work, and maintaining the
+     IRIX, Solaris 2, and Tru64 UNIX ports.
+
+   * Hartmut Penner for work on the s390 port.
+
+   * Paul Petersen wrote the machine description for the Alliant FX/8.
+
+   * Alexandre Petit-Bianco for implementing much of the Java compiler
+     and continued Java maintainership.
+
+   * Matthias Pfaller for major improvements to the NS32k port.
+
+   * Gerald Pfeifer for his direction via the steering committee,
+     pointing out lots of problems we need to solve, maintenance of the
+     web pages, and taking care of documentation maintenance in general.
+
+   * Andrew Pinski for processing bug reports by the dozen.
+
+   * Ovidiu Predescu for his work on the Objective-C front end and
+     runtime libraries.
+
+   * Jerry Quinn for major performance improvements in C++ formatted
+     I/O.
+
+   * Ken Raeburn for various improvements to checker, MIPS ports and
+     various cleanups in the compiler.
+
+   * Rolf W. Rasmussen for hacking on AWT.
+
+   * David Reese of Sun Microsystems contributed to the Solaris on
+     PowerPC port.
+
+   * Volker Reichelt for keeping up with the problem reports.
+
+   * Joern Rennecke for maintaining the sh port, loop, regmove & reload
+     hacking.
+
+   * Loren J. Rittle for improvements to libstdc++-v3 including the
+     FreeBSD port, threading fixes, thread-related configury changes,
+     critical threading documentation, and solutions to really tricky
+     I/O problems, as well as keeping GCC properly working on FreeBSD
+     and continuous testing.
+
+   * Craig Rodrigues for processing tons of bug reports.
+
+   * Ola Ro"nnerup for work on mt_alloc.
+
+   * Gavin Romig-Koch for lots of behind the scenes MIPS work.
+
+   * David Ronis inspired and encouraged Craig to rewrite the G77
+     documentation in texinfo format by contributing a first pass at a
+     translation of the old `g77-0.5.16/f/DOC' file.
+
+   * Ken Rose for fixes to GCC's delay slot filling code.
+
+   * Paul Rubin wrote most of the preprocessor.
+
+   * Pe'tur Runo'lfsson for major performance improvements in C++
+     formatted I/O and large file support in C++ filebuf.
+
+   * Chip Salzenberg for libstdc++ patches and improvements to locales,
+     traits, Makefiles, libio, libtool hackery, and "long long" support.
+
+   * Juha Sarlin for improvements to the H8 code generator.
+
+   * Greg Satz assisted in making GCC work on HP-UX for the 9000 series
+     300.
+
+   * Roger Sayle for improvements to constant folding and GCC's RTL
+     optimizers as well as for fixing numerous bugs.
+
+   * Bradley Schatz for his work on the GCJ FAQ.
+
+   * Peter Schauer wrote the code to allow debugging to work on the
+     Alpha.
+
+   * William Schelter did most of the work on the Intel 80386 support.
+
+   * Tobias Schlu"ter for work on GNU Fortran.
+
+   * Bernd Schmidt for various code generation improvements and major
+     work in the reload pass as well a serving as release manager for
+     GCC 2.95.3.
+
+   * Peter Schmid for constant testing of libstdc++--especially
+     application testing, going above and beyond what was requested for
+     the release criteria--and libstdc++ header file tweaks.
+
+   * Jason Schroeder for jcf-dump patches.
+
+   * Andreas Schwab for his work on the m68k port.
+
+   * Lars Segerlund for work on GNU Fortran.
+
+   * Joel Sherrill for his direction via the steering committee, RTEMS
+     contributions and RTEMS testing.
+
+   * Nathan Sidwell for many C++ fixes/improvements.
+
+   * Jeffrey Siegal for helping RMS with the original design of GCC,
+     some code which handles the parse tree and RTL data structures,
+     constant folding and help with the original VAX & m68k ports.
+
+   * Kenny Simpson for prompting libstdc++ fixes due to defect reports
+     from the LWG (thereby keeping GCC in line with updates from the
+     ISO).
+
+   * Franz Sirl for his ongoing work with making the PPC port stable
+     for GNU/Linux.
+
+   * Andrey Slepuhin for assorted AIX hacking.
+
+   * Trevor Smigiel for contributing the SPU port.
+
+   * Christopher Smith did the port for Convex machines.
+
+   * Danny Smith for his major efforts on the Mingw (and Cygwin) ports.
+
+   * Randy Smith finished the Sun FPA support.
+
+   * Scott Snyder for queue, iterator, istream, and string fixes and
+     libstdc++ testsuite entries.  Also for providing the patch to G77
+     to add rudimentary support for `INTEGER*1', `INTEGER*2', and
+     `LOGICAL*1'.
+
+   * Brad Spencer for contributions to the GLIBCPP_FORCE_NEW technique.
+
+   * Richard Stallman, for writing the original GCC and launching the
+     GNU project.
+
+   * Jan Stein of the Chalmers Computer Society provided support for
+     Genix, as well as part of the 32000 machine description.
+
+   * Nigel Stephens for various mips16 related fixes/improvements.
+
+   * Jonathan Stone wrote the machine description for the Pyramid
+     computer.
+
+   * Graham Stott for various infrastructure improvements.
+
+   * John Stracke for his Java HTTP protocol fixes.
+
+   * Mike Stump for his Elxsi port, G++ contributions over the years
+     and more recently his vxworks contributions
+
+   * Jeff Sturm for Java porting help, bug fixes, and encouragement.
+
+   * Shigeya Suzuki for this fixes for the bsdi platforms.
+
+   * Ian Lance Taylor for his mips16 work, general configury hacking,
+     fixincludes, etc.
+
+   * Holger Teutsch provided the support for the Clipper CPU.
+
+   * Gary Thomas for his ongoing work to make the PPC work for
+     GNU/Linux.
+
+   * Philipp Thomas for random bug fixes throughout the compiler
+
+   * Jason Thorpe for thread support in libstdc++ on NetBSD.
+
+   * Kresten Krab Thorup wrote the run time support for the Objective-C
+     language and the fantastic Java bytecode interpreter.
+
+   * Michael Tiemann for random bug fixes, the first instruction
+     scheduler, initial C++ support, function integration, NS32k, SPARC
+     and M88k machine description work, delay slot scheduling.
+
+   * Andreas Tobler for his work porting libgcj to Darwin.
+
+   * Teemu Torma for thread safe exception handling support.
+
+   * Leonard Tower wrote parts of the parser, RTL generator, and RTL
+     definitions, and of the VAX machine description.
+
+   * Daniel Towner and Hariharan Sandanagobalane contributed and
+     maintain the picoChip port.
+
+   * Jeremy Bennett of Embecosm and Jonas Bonn of South Pole
+     contributed the OpenRISC 1000 port, which in turn was based on
+     earlier work by Rich D'Addio, Damjan Lampret, Matjaz Breskvar and
+     others.
+
+   * Tom Tromey for internationalization support and for his many Java
+     contributions and libgcj maintainership.
+
+   * Lassi Tuura for improvements to config.guess to determine HP
+     processor types.
+
+   * Petter Urkedal for libstdc++ CXXFLAGS, math, and algorithms fixes.
+
+   * Andy Vaught for the design and initial implementation of the GNU
+     Fortran front end.
+
+   * Brent Verner for work with the libstdc++ cshadow files and their
+     associated configure steps.
+
+   * Todd Vierling for contributions for NetBSD ports.
+
+   * Jonathan Wakely for contributing libstdc++ Doxygen notes and XHTML
+     guidance.
+
+   * Dean Wakerley for converting the install documentation from HTML
+     to texinfo in time for GCC 3.0.
+
+   * Krister Walfridsson for random bug fixes.
+
+   * Feng Wang for contributions to GNU Fortran.
+
+   * Stephen M. Webb for time and effort on making libstdc++ shadow
+     files work with the tricky Solaris 8+ headers, and for pushing the
+     build-time header tree.
+
+   * John Wehle for various improvements for the x86 code generator,
+     related infrastructure improvements to help x86 code generation,
+     value range propagation and other work, WE32k port.
+
+   * Ulrich Weigand for work on the s390 port.
+
+   * Zack Weinberg for major work on cpplib and various other bug fixes.
+
+   * Matt Welsh for help with Linux Threads support in GCJ.
+
+   * Urban Widmark for help fixing java.io.
+
+   * Mark Wielaard for new Java library code and his work integrating
+     with Classpath.
+
+   * Dale Wiles helped port GCC to the Tahoe.
+
+   * Bob Wilson from Tensilica, Inc. for the Xtensa port.
+
+   * Jim Wilson for his direction via the steering committee, tackling
+     hard problems in various places that nobody else wanted to work
+     on, strength reduction and other loop optimizations.
+
+   * Paul Woegerer and Tal Agmon for the CRX port.
+
+   * Carlo Wood for various fixes.
+
+   * Tom Wood for work on the m88k port.
+
+   * Canqun Yang for work on GNU Fortran.
+
+   * Masanobu Yuhara of Fujitsu Laboratories implemented the machine
+     description for the Tron architecture (specifically, the Gmicro).
+
+   * Kevin Zachmann helped port GCC to the Tahoe.
+
+   * Ayal Zaks for Swing Modulo Scheduling (SMS).
+
+   * Xiaoqiang Zhang for work on GNU Fortran.
+
+   * Gilles Zunino for help porting Java to Irix.
+
+
+ The following people are recognized for their contributions to GNAT,
+the Ada front end of GCC:
+   * Bernard Banner
+
+   * Romain Berrendonner
+
+   * Geert Bosch
+
+   * Emmanuel Briot
+
+   * Joel Brobecker
+
+   * Ben Brosgol
+
+   * Vincent Celier
+
+   * Arnaud Charlet
+
+   * Chien Chieng
+
+   * Cyrille Comar
+
+   * Cyrille Crozes
+
+   * Robert Dewar
+
+   * Gary Dismukes
+
+   * Robert Duff
+
+   * Ed Falis
+
+   * Ramon Fernandez
+
+   * Sam Figueroa
+
+   * Vasiliy Fofanov
+
+   * Michael Friess
+
+   * Franco Gasperoni
+
+   * Ted Giering
+
+   * Matthew Gingell
+
+   * Laurent Guerby
+
+   * Jerome Guitton
+
+   * Olivier Hainque
+
+   * Jerome Hugues
+
+   * Hristian Kirtchev
+
+   * Jerome Lambourg
+
+   * Bruno Leclerc
+
+   * Albert Lee
+
+   * Sean McNeil
+
+   * Javier Miranda
+
+   * Laurent Nana
+
+   * Pascal Obry
+
+   * Dong-Ik Oh
+
+   * Laurent Pautet
+
+   * Brett Porter
+
+   * Thomas Quinot
+
+   * Nicolas Roche
+
+   * Pat Rogers
+
+   * Jose Ruiz
+
+   * Douglas Rupp
+
+   * Sergey Rybin
+
+   * Gail Schenker
+
+   * Ed Schonberg
+
+   * Nicolas Setton
+
+   * Samuel Tardieu
+
+
+ The following people are recognized for their contributions of new
+features, bug reports, testing and integration of classpath/libgcj for
+GCC version 4.1:
+   * Lillian Angel for `JTree' implementation and lots Free Swing
+     additions and bug fixes.
+
+   * Wolfgang Baer for `GapContent' bug fixes.
+
+   * Anthony Balkissoon for `JList', Free Swing 1.5 updates and mouse
+     event fixes, lots of Free Swing work including `JTable' editing.
+
+   * Stuart Ballard for RMI constant fixes.
+
+   * Goffredo Baroncelli for `HTTPURLConnection' fixes.
+
+   * Gary Benson for `MessageFormat' fixes.
+
+   * Daniel Bonniot for `Serialization' fixes.
+
+   * Chris Burdess for lots of gnu.xml and http protocol fixes, `StAX'
+     and `DOM xml:id' support.
+
+   * Ka-Hing Cheung for `TreePath' and `TreeSelection' fixes.
+
+   * Archie Cobbs for build fixes, VM interface updates,
+     `URLClassLoader' updates.
+
+   * Kelley Cook for build fixes.
+
+   * Martin Cordova for Suggestions for better `SocketTimeoutException'.
+
+   * David Daney for `BitSet' bug fixes, `HttpURLConnection' rewrite
+     and improvements.
+
+   * Thomas Fitzsimmons for lots of upgrades to the gtk+ AWT and Cairo
+     2D support. Lots of imageio framework additions, lots of AWT and
+     Free Swing bug fixes.
+
+   * Jeroen Frijters for `ClassLoader' and nio cleanups, serialization
+     fixes, better `Proxy' support, bug fixes and IKVM integration.
+
+   * Santiago Gala for `AccessControlContext' fixes.
+
+   * Nicolas Geoffray for `VMClassLoader' and `AccessController'
+     improvements.
+
+   * David Gilbert for `basic' and `metal' icon and plaf support and
+     lots of documenting, Lots of Free Swing and metal theme additions.
+     `MetalIconFactory' implementation.
+
+   * Anthony Green for `MIDI' framework, `ALSA' and `DSSI' providers.
+
+   * Andrew Haley for `Serialization' and `URLClassLoader' fixes, gcj
+     build speedups.
+
+   * Kim Ho for `JFileChooser' implementation.
+
+   * Andrew John Hughes for `Locale' and net fixes, URI RFC2986
+     updates, `Serialization' fixes, `Properties' XML support and
+     generic branch work, VMIntegration guide update.
+
+   * Bastiaan Huisman for `TimeZone' bug fixing.
+
+   * Andreas Jaeger for mprec updates.
+
+   * Paul Jenner for better `-Werror' support.
+
+   * Ito Kazumitsu for `NetworkInterface' implementation and updates.
+
+   * Roman Kennke for `BoxLayout', `GrayFilter' and `SplitPane', plus
+     bug fixes all over. Lots of Free Swing work including styled text.
+
+   * Simon Kitching for `String' cleanups and optimization suggestions.
+
+   * Michael Koch for configuration fixes, `Locale' updates, bug and
+     build fixes.
+
+   * Guilhem Lavaux for configuration, thread and channel fixes and
+     Kaffe integration. JCL native `Pointer' updates. Logger bug fixes.
+
+   * David Lichteblau for JCL support library global/local reference
+     cleanups.
+
+   * Aaron Luchko for JDWP updates and documentation fixes.
+
+   * Ziga Mahkovec for `Graphics2D' upgraded to Cairo 0.5 and new regex
+     features.
+
+   * Sven de Marothy for BMP imageio support, CSS and `TextLayout'
+     fixes. `GtkImage' rewrite, 2D, awt, free swing and date/time fixes
+     and implementing the Qt4 peers.
+
+   * Casey Marshall for crypto algorithm fixes, `FileChannel' lock,
+     `SystemLogger' and `FileHandler' rotate implementations, NIO
+     `FileChannel.map' support, security and policy updates.
+
+   * Bryce McKinlay for RMI work.
+
+   * Audrius Meskauskas for lots of Free Corba, RMI and HTML work plus
+     testing and documenting.
+
+   * Kalle Olavi Niemitalo for build fixes.
+
+   * Rainer Orth for build fixes.
+
+   * Andrew Overholt for `File' locking fixes.
+
+   * Ingo Proetel for `Image', `Logger' and `URLClassLoader' updates.
+
+   * Olga Rodimina for `MenuSelectionManager' implementation.
+
+   * Jan Roehrich for `BasicTreeUI' and `JTree' fixes.
+
+   * Julian Scheid for documentation updates and gjdoc support.
+
+   * Christian Schlichtherle for zip fixes and cleanups.
+
+   * Robert Schuster for documentation updates and beans fixes,
+     `TreeNode' enumerations and `ActionCommand' and various fixes, XML
+     and URL, AWT and Free Swing bug fixes.
+
+   * Keith Seitz for lots of JDWP work.
+
+   * Christian Thalinger for 64-bit cleanups, Configuration and VM
+     interface fixes and `CACAO' integration, `fdlibm' updates.
+
+   * Gael Thomas for `VMClassLoader' boot packages support suggestions.
+
+   * Andreas Tobler for Darwin and Solaris testing and fixing, `Qt4'
+     support for Darwin/OS X, `Graphics2D' support, `gtk+' updates.
+
+   * Dalibor Topic for better `DEBUG' support, build cleanups and Kaffe
+     integration. `Qt4' build infrastructure, `SHA1PRNG' and
+     `GdkPixbugDecoder' updates.
+
+   * Tom Tromey for Eclipse integration, generics work, lots of bug
+     fixes and gcj integration including coordinating The Big Merge.
+
+   * Mark Wielaard for bug fixes, packaging and release management,
+     `Clipboard' implementation, system call interrupts and network
+     timeouts and `GdkPixpufDecoder' fixes.
+
+
+ In addition to the above, all of which also contributed time and
+energy in testing GCC, we would like to thank the following for their
+contributions to testing:
+
+   * Michael Abd-El-Malek
+
+   * Thomas Arend
+
+   * Bonzo Armstrong
+
+   * Steven Ashe
+
+   * Chris Baldwin
+
+   * David Billinghurst
+
+   * Jim Blandy
+
+   * Stephane Bortzmeyer
+
+   * Horst von Brand
+
+   * Frank Braun
+
+   * Rodney Brown
+
+   * Sidney Cadot
+
+   * Bradford Castalia
+
+   * Robert Clark
+
+   * Jonathan Corbet
+
+   * Ralph Doncaster
+
+   * Richard Emberson
+
+   * Levente Farkas
+
+   * Graham Fawcett
+
+   * Mark Fernyhough
+
+   * Robert A. French
+
+   * Jo"rgen Freyh
+
+   * Mark K. Gardner
+
+   * Charles-Antoine Gauthier
+
+   * Yung Shing Gene
+
+   * David Gilbert
+
+   * Simon Gornall
+
+   * Fred Gray
+
+   * John Griffin
+
+   * Patrik Hagglund
+
+   * Phil Hargett
+
+   * Amancio Hasty
+
+   * Takafumi Hayashi
+
+   * Bryan W. Headley
+
+   * Kevin B. Hendricks
+
+   * Joep Jansen
+
+   * Christian Joensson
+
+   * Michel Kern
+
+   * David Kidd
+
+   * Tobias Kuipers
+
+   * Anand Krishnaswamy
+
+   * A. O. V. Le Blanc
+
+   * llewelly
+
+   * Damon Love
+
+   * Brad Lucier
+
+   * Matthias Klose
+
+   * Martin Knoblauch
+
+   * Rick Lutowski
+
+   * Jesse Macnish
+
+   * Stefan Morrell
+
+   * Anon A. Mous
+
+   * Matthias Mueller
+
+   * Pekka Nikander
+
+   * Rick Niles
+
+   * Jon Olson
+
+   * Magnus Persson
+
+   * Chris Pollard
+
+   * Richard Polton
+
+   * Derk Reefman
+
+   * David Rees
+
+   * Paul Reilly
+
+   * Tom Reilly
+
+   * Torsten Rueger
+
+   * Danny Sadinoff
+
+   * Marc Schifer
+
+   * Erik Schnetter
+
+   * Wayne K. Schroll
+
+   * David Schuler
+
+   * Vin Shelton
+
+   * Tim Souder
+
+   * Adam Sulmicki
+
+   * Bill Thorson
+
+   * George Talbot
+
+   * Pedro A. M. Vazquez
+
+   * Gregory Warnes
+
+   * Ian Watson
+
+   * David E. Young
+
+   * And many others
+
+ And finally we'd like to thank everyone who uses the compiler, provides
+feedback and generally reminds us why we're doing this work in the first
+place.
+
+
+File: gccint.info,  Node: Option Index,  Next: Concept Index,  Prev: Contributors,  Up: Top
+
+Option Index
+************
+
+GCC's command line options are indexed here without any initial `-' or
+`--'.  Where an option has both positive and negative forms (such as
+`-fOPTION' and `-fno-OPTION'), relevant entries in the manual are
+indexed under the most appropriate form; it may sometimes be useful to
+look up both forms.
+
+[index]
+* Menu:
+
+* msoft-float:                           Soft float library routines.
+                                                                (line 6)
+
+
+File: gccint.info,  Node: Concept Index,  Prev: Option Index,  Up: Top
+
+Concept Index
+*************
+
+[index]
+* Menu:
+
+* ! in constraint:                       Multi-Alternative.  (line   47)
+* # in constraint:                       Modifiers.          (line   67)
+* # in template:                         Output Template.    (line   66)
+* #pragma:                               Misc.               (line  381)
+* % in constraint:                       Modifiers.          (line   45)
+* % in GTY option:                       GTY Options.        (line   18)
+* % in template:                         Output Template.    (line    6)
+* & in constraint:                       Modifiers.          (line   25)
+* ( <1>:                                 Logical Operators.  (line  141)
+* ( <2>:                                 GIMPLE_CALL.        (line   63)
+* ( <3>:                                 Logical Operators.  (line  107)
+* ( <4>:                                 GIMPLE_ASM.         (line   27)
+* ( <5>:                                 Logical Operators.  (line  159)
+* (:                                     GIMPLE_ASM.         (line   21)
+* (nil):                                 RTL Objects.        (line   73)
+* *:                                     Host Common.        (line   17)
+* * in constraint:                       Modifiers.          (line   72)
+* * in template:                         Output Statement.   (line   29)
+* *gimple_assign_lhs_ptr:                GIMPLE_ASSIGN.      (line   54)
+* *gimple_assign_rhs1_ptr:               GIMPLE_ASSIGN.      (line   60)
+* *gimple_assign_rhs2_ptr:               GIMPLE_ASSIGN.      (line   81)
+* *gimple_call_arg_ptr:                  GIMPLE_CALL.        (line   71)
+* *gimple_call_lhs_ptr:                  GIMPLE_CALL.        (line   32)
+* *gimple_catch_types_ptr:               GIMPLE_CATCH.       (line   16)
+* *gimple_debug_bind_get_value_ptr:      GIMPLE_DEBUG.       (line   52)
+* *gimple_eh_filter_types_ptr:           GIMPLE_EH_FILTER.   (line   15)
+* *gimple_omp_critical_name_ptr:         GIMPLE_OMP_CRITICAL.
+                                                             (line   16)
+* *gimple_omp_for_clauses_ptr:           GIMPLE_OMP_FOR.     (line   23)
+* *gimple_omp_for_final_ptr:             GIMPLE_OMP_FOR.     (line   54)
+* *gimple_omp_for_incr_ptr:              GIMPLE_OMP_FOR.     (line   64)
+* *gimple_omp_for_index_ptr:             GIMPLE_OMP_FOR.     (line   34)
+* *gimple_omp_for_initial_ptr:           GIMPLE_OMP_FOR.     (line   44)
+* *gimple_omp_parallel_child_fn_ptr:     GIMPLE_OMP_PARALLEL.
+                                                             (line   46)
+* *gimple_omp_parallel_clauses_ptr:      GIMPLE_OMP_PARALLEL.
+                                                             (line   34)
+* *gimple_omp_parallel_data_arg_ptr:     GIMPLE_OMP_PARALLEL.
+                                                             (line   58)
+* *gimple_omp_sections_clauses_ptr:      GIMPLE_OMP_SECTIONS.
+                                                             (line   33)
+* *gimple_omp_sections_control_ptr:      GIMPLE_OMP_SECTIONS.
+                                                             (line   21)
+* *gimple_omp_single_clauses_ptr:        GIMPLE_OMP_SINGLE.  (line   17)
+* *gimple_op_ptr:                        Manipulating GIMPLE statements.
+                                                             (line   84)
+* *gimple_ops <1>:                       Manipulating GIMPLE statements.
+                                                             (line   78)
+* *gimple_ops:                           Logical Operators.  (line   82)
+* *gimple_phi_result_ptr:                GIMPLE_PHI.         (line   22)
+* *gsi_stmt_ptr:                         Sequence iterators. (line   80)
+* + in constraint:                       Modifiers.          (line   12)
+* -fsection-anchors <1>:                 Anchored Addresses. (line    6)
+* -fsection-anchors:                     Special Accessors.  (line  110)
+* /c in RTL dump:                        Flags.              (line  239)
+* /f in RTL dump:                        Flags.              (line  247)
+* /i in RTL dump:                        Flags.              (line  299)
+* /j in RTL dump:                        Flags.              (line  314)
+* /s in RTL dump:                        Flags.              (line  263)
+* /u in RTL dump:                        Flags.              (line  324)
+* /v in RTL dump:                        Flags.              (line  356)
+* 0 in constraint:                       Simple Constraints. (line  120)
+* < in constraint:                       Simple Constraints. (line   48)
+* = in constraint:                       Modifiers.          (line    8)
+* > in constraint:                       Simple Constraints. (line   52)
+* ? in constraint:                       Multi-Alternative.  (line   41)
+* \:                                     Output Template.    (line   46)
+* __absvdi2:                             Integer library routines.
+                                                             (line  107)
+* __absvsi2:                             Integer library routines.
+                                                             (line  106)
+* __addda3:                              Fixed-point fractional library routines.
+                                                             (line   45)
+* __adddf3:                              Soft float library routines.
+                                                             (line   23)
+* __adddq3:                              Fixed-point fractional library routines.
+                                                             (line   33)
+* __addha3:                              Fixed-point fractional library routines.
+                                                             (line   43)
+* __addhq3:                              Fixed-point fractional library routines.
+                                                             (line   30)
+* __addqq3:                              Fixed-point fractional library routines.
+                                                             (line   29)
+* __addsa3:                              Fixed-point fractional library routines.
+                                                             (line   44)
+* __addsf3:                              Soft float library routines.
+                                                             (line   22)
+* __addsq3:                              Fixed-point fractional library routines.
+                                                             (line   31)
+* __addta3:                              Fixed-point fractional library routines.
+                                                             (line   47)
+* __addtf3:                              Soft float library routines.
+                                                             (line   25)
+* __adduda3:                             Fixed-point fractional library routines.
+                                                             (line   53)
+* __addudq3:                             Fixed-point fractional library routines.
+                                                             (line   41)
+* __adduha3:                             Fixed-point fractional library routines.
+                                                             (line   49)
+* __adduhq3:                             Fixed-point fractional library routines.
+                                                             (line   37)
+* __adduqq3:                             Fixed-point fractional library routines.
+                                                             (line   35)
+* __addusa3:                             Fixed-point fractional library routines.
+                                                             (line   51)
+* __addusq3:                             Fixed-point fractional library routines.
+                                                             (line   39)
+* __adduta3:                             Fixed-point fractional library routines.
+                                                             (line   55)
+* __addvdi3:                             Integer library routines.
+                                                             (line  111)
+* __addvsi3:                             Integer library routines.
+                                                             (line  110)
+* __addxf3:                              Soft float library routines.
+                                                             (line   27)
+* __ashlda3:                             Fixed-point fractional library routines.
+                                                             (line  351)
+* __ashldi3:                             Integer library routines.
+                                                             (line   14)
+* __ashldq3:                             Fixed-point fractional library routines.
+                                                             (line  340)
+* __ashlha3:                             Fixed-point fractional library routines.
+                                                             (line  349)
+* __ashlhq3:                             Fixed-point fractional library routines.
+                                                             (line  337)
+* __ashlqq3:                             Fixed-point fractional library routines.
+                                                             (line  336)
+* __ashlsa3:                             Fixed-point fractional library routines.
+                                                             (line  350)
+* __ashlsi3:                             Integer library routines.
+                                                             (line   13)
+* __ashlsq3:                             Fixed-point fractional library routines.
+                                                             (line  338)
+* __ashlta3:                             Fixed-point fractional library routines.
+                                                             (line  353)
+* __ashlti3:                             Integer library routines.
+                                                             (line   15)
+* __ashluda3:                            Fixed-point fractional library routines.
+                                                             (line  359)
+* __ashludq3:                            Fixed-point fractional library routines.
+                                                             (line  348)
+* __ashluha3:                            Fixed-point fractional library routines.
+                                                             (line  355)
+* __ashluhq3:                            Fixed-point fractional library routines.
+                                                             (line  344)
+* __ashluqq3:                            Fixed-point fractional library routines.
+                                                             (line  342)
+* __ashlusa3:                            Fixed-point fractional library routines.
+                                                             (line  357)
+* __ashlusq3:                            Fixed-point fractional library routines.
+                                                             (line  346)
+* __ashluta3:                            Fixed-point fractional library routines.
+                                                             (line  361)
+* __ashrda3:                             Fixed-point fractional library routines.
+                                                             (line  371)
+* __ashrdi3:                             Integer library routines.
+                                                             (line   19)
+* __ashrdq3:                             Fixed-point fractional library routines.
+                                                             (line  368)
+* __ashrha3:                             Fixed-point fractional library routines.
+                                                             (line  369)
+* __ashrhq3:                             Fixed-point fractional library routines.
+                                                             (line  365)
+* __ashrqq3:                             Fixed-point fractional library routines.
+                                                             (line  364)
+* __ashrsa3:                             Fixed-point fractional library routines.
+                                                             (line  370)
+* __ashrsi3:                             Integer library routines.
+                                                             (line   18)
+* __ashrsq3:                             Fixed-point fractional library routines.
+                                                             (line  366)
+* __ashrta3:                             Fixed-point fractional library routines.
+                                                             (line  373)
+* __ashrti3:                             Integer library routines.
+                                                             (line   20)
+* __bid_adddd3:                          Decimal float library routines.
+                                                             (line   25)
+* __bid_addsd3:                          Decimal float library routines.
+                                                             (line   21)
+* __bid_addtd3:                          Decimal float library routines.
+                                                             (line   29)
+* __bid_divdd3:                          Decimal float library routines.
+                                                             (line   68)
+* __bid_divsd3:                          Decimal float library routines.
+                                                             (line   64)
+* __bid_divtd3:                          Decimal float library routines.
+                                                             (line   72)
+* __bid_eqdd2:                           Decimal float library routines.
+                                                             (line  259)
+* __bid_eqsd2:                           Decimal float library routines.
+                                                             (line  257)
+* __bid_eqtd2:                           Decimal float library routines.
+                                                             (line  261)
+* __bid_extendddtd2:                     Decimal float library routines.
+                                                             (line   92)
+* __bid_extendddtf:                      Decimal float library routines.
+                                                             (line  140)
+* __bid_extendddxf:                      Decimal float library routines.
+                                                             (line  134)
+* __bid_extenddfdd:                      Decimal float library routines.
+                                                             (line  147)
+* __bid_extenddftd:                      Decimal float library routines.
+                                                             (line  107)
+* __bid_extendsddd2:                     Decimal float library routines.
+                                                             (line   88)
+* __bid_extendsddf:                      Decimal float library routines.
+                                                             (line  128)
+* __bid_extendsdtd2:                     Decimal float library routines.
+                                                             (line   90)
+* __bid_extendsdtf:                      Decimal float library routines.
+                                                             (line  138)
+* __bid_extendsdxf:                      Decimal float library routines.
+                                                             (line  132)
+* __bid_extendsfdd:                      Decimal float library routines.
+                                                             (line  103)
+* __bid_extendsfsd:                      Decimal float library routines.
+                                                             (line  145)
+* __bid_extendsftd:                      Decimal float library routines.
+                                                             (line  105)
+* __bid_extendtftd:                      Decimal float library routines.
+                                                             (line  149)
+* __bid_extendxftd:                      Decimal float library routines.
+                                                             (line  109)
+* __bid_fixdddi:                         Decimal float library routines.
+                                                             (line  170)
+* __bid_fixddsi:                         Decimal float library routines.
+                                                             (line  162)
+* __bid_fixsddi:                         Decimal float library routines.
+                                                             (line  168)
+* __bid_fixsdsi:                         Decimal float library routines.
+                                                             (line  160)
+* __bid_fixtddi:                         Decimal float library routines.
+                                                             (line  172)
+* __bid_fixtdsi:                         Decimal float library routines.
+                                                             (line  164)
+* __bid_fixunsdddi:                      Decimal float library routines.
+                                                             (line  187)
+* __bid_fixunsddsi:                      Decimal float library routines.
+                                                             (line  178)
+* __bid_fixunssddi:                      Decimal float library routines.
+                                                             (line  185)
+* __bid_fixunssdsi:                      Decimal float library routines.
+                                                             (line  176)
+* __bid_fixunstddi:                      Decimal float library routines.
+                                                             (line  189)
+* __bid_fixunstdsi:                      Decimal float library routines.
+                                                             (line  180)
+* __bid_floatdidd:                       Decimal float library routines.
+                                                             (line  205)
+* __bid_floatdisd:                       Decimal float library routines.
+                                                             (line  203)
+* __bid_floatditd:                       Decimal float library routines.
+                                                             (line  207)
+* __bid_floatsidd:                       Decimal float library routines.
+                                                             (line  196)
+* __bid_floatsisd:                       Decimal float library routines.
+                                                             (line  194)
+* __bid_floatsitd:                       Decimal float library routines.
+                                                             (line  198)
+* __bid_floatunsdidd:                    Decimal float library routines.
+                                                             (line  223)
+* __bid_floatunsdisd:                    Decimal float library routines.
+                                                             (line  221)
+* __bid_floatunsditd:                    Decimal float library routines.
+                                                             (line  225)
+* __bid_floatunssidd:                    Decimal float library routines.
+                                                             (line  214)
+* __bid_floatunssisd:                    Decimal float library routines.
+                                                             (line  212)
+* __bid_floatunssitd:                    Decimal float library routines.
+                                                             (line  216)
+* __bid_gedd2:                           Decimal float library routines.
+                                                             (line  277)
+* __bid_gesd2:                           Decimal float library routines.
+                                                             (line  275)
+* __bid_getd2:                           Decimal float library routines.
+                                                             (line  279)
+* __bid_gtdd2:                           Decimal float library routines.
+                                                             (line  304)
+* __bid_gtsd2:                           Decimal float library routines.
+                                                             (line  302)
+* __bid_gttd2:                           Decimal float library routines.
+                                                             (line  306)
+* __bid_ledd2:                           Decimal float library routines.
+                                                             (line  295)
+* __bid_lesd2:                           Decimal float library routines.
+                                                             (line  293)
+* __bid_letd2:                           Decimal float library routines.
+                                                             (line  297)
+* __bid_ltdd2:                           Decimal float library routines.
+                                                             (line  286)
+* __bid_ltsd2:                           Decimal float library routines.
+                                                             (line  284)
+* __bid_lttd2:                           Decimal float library routines.
+                                                             (line  288)
+* __bid_muldd3:                          Decimal float library routines.
+                                                             (line   54)
+* __bid_mulsd3:                          Decimal float library routines.
+                                                             (line   50)
+* __bid_multd3:                          Decimal float library routines.
+                                                             (line   58)
+* __bid_nedd2:                           Decimal float library routines.
+                                                             (line  268)
+* __bid_negdd2:                          Decimal float library routines.
+                                                             (line   78)
+* __bid_negsd2:                          Decimal float library routines.
+                                                             (line   76)
+* __bid_negtd2:                          Decimal float library routines.
+                                                             (line   80)
+* __bid_nesd2:                           Decimal float library routines.
+                                                             (line  266)
+* __bid_netd2:                           Decimal float library routines.
+                                                             (line  270)
+* __bid_subdd3:                          Decimal float library routines.
+                                                             (line   39)
+* __bid_subsd3:                          Decimal float library routines.
+                                                             (line   35)
+* __bid_subtd3:                          Decimal float library routines.
+                                                             (line   43)
+* __bid_truncdddf:                       Decimal float library routines.
+                                                             (line  153)
+* __bid_truncddsd2:                      Decimal float library routines.
+                                                             (line   94)
+* __bid_truncddsf:                       Decimal float library routines.
+                                                             (line  124)
+* __bid_truncdfsd:                       Decimal float library routines.
+                                                             (line  111)
+* __bid_truncsdsf:                       Decimal float library routines.
+                                                             (line  151)
+* __bid_trunctddd2:                      Decimal float library routines.
+                                                             (line   98)
+* __bid_trunctddf:                       Decimal float library routines.
+                                                             (line  130)
+* __bid_trunctdsd2:                      Decimal float library routines.
+                                                             (line   96)
+* __bid_trunctdsf:                       Decimal float library routines.
+                                                             (line  126)
+* __bid_trunctdtf:                       Decimal float library routines.
+                                                             (line  155)
+* __bid_trunctdxf:                       Decimal float library routines.
+                                                             (line  136)
+* __bid_trunctfdd:                       Decimal float library routines.
+                                                             (line  119)
+* __bid_trunctfsd:                       Decimal float library routines.
+                                                             (line  115)
+* __bid_truncxfdd:                       Decimal float library routines.
+                                                             (line  117)
+* __bid_truncxfsd:                       Decimal float library routines.
+                                                             (line  113)
+* __bid_unorddd2:                        Decimal float library routines.
+                                                             (line  235)
+* __bid_unordsd2:                        Decimal float library routines.
+                                                             (line  233)
+* __bid_unordtd2:                        Decimal float library routines.
+                                                             (line  237)
+* __bswapdi2:                            Integer library routines.
+                                                             (line  162)
+* __bswapsi2:                            Integer library routines.
+                                                             (line  161)
+* __builtin_args_info:                   Varargs.            (line   42)
+* __builtin_classify_type:               Varargs.            (line   76)
+* __builtin_next_arg:                    Varargs.            (line   66)
+* __builtin_saveregs:                    Varargs.            (line   24)
+* __clear_cache:                         Miscellaneous routines.
+                                                             (line   10)
+* __clzdi2:                              Integer library routines.
+                                                             (line  131)
+* __clzsi2:                              Integer library routines.
+                                                             (line  130)
+* __clzti2:                              Integer library routines.
+                                                             (line  132)
+* __cmpda2:                              Fixed-point fractional library routines.
+                                                             (line  451)
+* __cmpdf2:                              Soft float library routines.
+                                                             (line  164)
+* __cmpdi2:                              Integer library routines.
+                                                             (line   87)
+* __cmpdq2:                              Fixed-point fractional library routines.
+                                                             (line  441)
+* __cmpha2:                              Fixed-point fractional library routines.
+                                                             (line  449)
+* __cmphq2:                              Fixed-point fractional library routines.
+                                                             (line  438)
+* __cmpqq2:                              Fixed-point fractional library routines.
+                                                             (line  437)
+* __cmpsa2:                              Fixed-point fractional library routines.
+                                                             (line  450)
+* __cmpsf2:                              Soft float library routines.
+                                                             (line  163)
+* __cmpsq2:                              Fixed-point fractional library routines.
+                                                             (line  439)
+* __cmpta2:                              Fixed-point fractional library routines.
+                                                             (line  453)
+* __cmptf2:                              Soft float library routines.
+                                                             (line  165)
+* __cmpti2:                              Integer library routines.
+                                                             (line   88)
+* __cmpuda2:                             Fixed-point fractional library routines.
+                                                             (line  458)
+* __cmpudq2:                             Fixed-point fractional library routines.
+                                                             (line  448)
+* __cmpuha2:                             Fixed-point fractional library routines.
+                                                             (line  455)
+* __cmpuhq2:                             Fixed-point fractional library routines.
+                                                             (line  444)
+* __cmpuqq2:                             Fixed-point fractional library routines.
+                                                             (line  443)
+* __cmpusa2:                             Fixed-point fractional library routines.
+                                                             (line  456)
+* __cmpusq2:                             Fixed-point fractional library routines.
+                                                             (line  446)
+* __cmputa2:                             Fixed-point fractional library routines.
+                                                             (line  460)
+* __CTOR_LIST__:                         Initialization.     (line   25)
+* __ctzdi2:                              Integer library routines.
+                                                             (line  138)
+* __ctzsi2:                              Integer library routines.
+                                                             (line  137)
+* __ctzti2:                              Integer library routines.
+                                                             (line  139)
+* __divda3:                              Fixed-point fractional library routines.
+                                                             (line  227)
+* __divdc3:                              Soft float library routines.
+                                                             (line  252)
+* __divdf3:                              Soft float library routines.
+                                                             (line   48)
+* __divdi3:                              Integer library routines.
+                                                             (line   25)
+* __divdq3:                              Fixed-point fractional library routines.
+                                                             (line  223)
+* __divha3:                              Fixed-point fractional library routines.
+                                                             (line  225)
+* __divhq3:                              Fixed-point fractional library routines.
+                                                             (line  220)
+* __divqq3:                              Fixed-point fractional library routines.
+                                                             (line  219)
+* __divsa3:                              Fixed-point fractional library routines.
+                                                             (line  226)
+* __divsc3:                              Soft float library routines.
+                                                             (line  250)
+* __divsf3:                              Soft float library routines.
+                                                             (line   47)
+* __divsi3:                              Integer library routines.
+                                                             (line   24)
+* __divsq3:                              Fixed-point fractional library routines.
+                                                             (line  221)
+* __divta3:                              Fixed-point fractional library routines.
+                                                             (line  229)
+* __divtc3:                              Soft float library routines.
+                                                             (line  254)
+* __divtf3:                              Soft float library routines.
+                                                             (line   50)
+* __divti3:                              Integer library routines.
+                                                             (line   26)
+* __divxc3:                              Soft float library routines.
+                                                             (line  256)
+* __divxf3:                              Soft float library routines.
+                                                             (line   52)
+* __dpd_adddd3:                          Decimal float library routines.
+                                                             (line   23)
+* __dpd_addsd3:                          Decimal float library routines.
+                                                             (line   19)
+* __dpd_addtd3:                          Decimal float library routines.
+                                                             (line   27)
+* __dpd_divdd3:                          Decimal float library routines.
+                                                             (line   66)
+* __dpd_divsd3:                          Decimal float library routines.
+                                                             (line   62)
+* __dpd_divtd3:                          Decimal float library routines.
+                                                             (line   70)
+* __dpd_eqdd2:                           Decimal float library routines.
+                                                             (line  258)
+* __dpd_eqsd2:                           Decimal float library routines.
+                                                             (line  256)
+* __dpd_eqtd2:                           Decimal float library routines.
+                                                             (line  260)
+* __dpd_extendddtd2:                     Decimal float library routines.
+                                                             (line   91)
+* __dpd_extendddtf:                      Decimal float library routines.
+                                                             (line  139)
+* __dpd_extendddxf:                      Decimal float library routines.
+                                                             (line  133)
+* __dpd_extenddfdd:                      Decimal float library routines.
+                                                             (line  146)
+* __dpd_extenddftd:                      Decimal float library routines.
+                                                             (line  106)
+* __dpd_extendsddd2:                     Decimal float library routines.
+                                                             (line   87)
+* __dpd_extendsddf:                      Decimal float library routines.
+                                                             (line  127)
+* __dpd_extendsdtd2:                     Decimal float library routines.
+                                                             (line   89)
+* __dpd_extendsdtf:                      Decimal float library routines.
+                                                             (line  137)
+* __dpd_extendsdxf:                      Decimal float library routines.
+                                                             (line  131)
+* __dpd_extendsfdd:                      Decimal float library routines.
+                                                             (line  102)
+* __dpd_extendsfsd:                      Decimal float library routines.
+                                                             (line  144)
+* __dpd_extendsftd:                      Decimal float library routines.
+                                                             (line  104)
+* __dpd_extendtftd:                      Decimal float library routines.
+                                                             (line  148)
+* __dpd_extendxftd:                      Decimal float library routines.
+                                                             (line  108)
+* __dpd_fixdddi:                         Decimal float library routines.
+                                                             (line  169)
+* __dpd_fixddsi:                         Decimal float library routines.
+                                                             (line  161)
+* __dpd_fixsddi:                         Decimal float library routines.
+                                                             (line  167)
+* __dpd_fixsdsi:                         Decimal float library routines.
+                                                             (line  159)
+* __dpd_fixtddi:                         Decimal float library routines.
+                                                             (line  171)
+* __dpd_fixtdsi:                         Decimal float library routines.
+                                                             (line  163)
+* __dpd_fixunsdddi:                      Decimal float library routines.
+                                                             (line  186)
+* __dpd_fixunsddsi:                      Decimal float library routines.
+                                                             (line  177)
+* __dpd_fixunssddi:                      Decimal float library routines.
+                                                             (line  184)
+* __dpd_fixunssdsi:                      Decimal float library routines.
+                                                             (line  175)
+* __dpd_fixunstddi:                      Decimal float library routines.
+                                                             (line  188)
+* __dpd_fixunstdsi:                      Decimal float library routines.
+                                                             (line  179)
+* __dpd_floatdidd:                       Decimal float library routines.
+                                                             (line  204)
+* __dpd_floatdisd:                       Decimal float library routines.
+                                                             (line  202)
+* __dpd_floatditd:                       Decimal float library routines.
+                                                             (line  206)
+* __dpd_floatsidd:                       Decimal float library routines.
+                                                             (line  195)
+* __dpd_floatsisd:                       Decimal float library routines.
+                                                             (line  193)
+* __dpd_floatsitd:                       Decimal float library routines.
+                                                             (line  197)
+* __dpd_floatunsdidd:                    Decimal float library routines.
+                                                             (line  222)
+* __dpd_floatunsdisd:                    Decimal float library routines.
+                                                             (line  220)
+* __dpd_floatunsditd:                    Decimal float library routines.
+                                                             (line  224)
+* __dpd_floatunssidd:                    Decimal float library routines.
+                                                             (line  213)
+* __dpd_floatunssisd:                    Decimal float library routines.
+                                                             (line  211)
+* __dpd_floatunssitd:                    Decimal float library routines.
+                                                             (line  215)
+* __dpd_gedd2:                           Decimal float library routines.
+                                                             (line  276)
+* __dpd_gesd2:                           Decimal float library routines.
+                                                             (line  274)
+* __dpd_getd2:                           Decimal float library routines.
+                                                             (line  278)
+* __dpd_gtdd2:                           Decimal float library routines.
+                                                             (line  303)
+* __dpd_gtsd2:                           Decimal float library routines.
+                                                             (line  301)
+* __dpd_gttd2:                           Decimal float library routines.
+                                                             (line  305)
+* __dpd_ledd2:                           Decimal float library routines.
+                                                             (line  294)
+* __dpd_lesd2:                           Decimal float library routines.
+                                                             (line  292)
+* __dpd_letd2:                           Decimal float library routines.
+                                                             (line  296)
+* __dpd_ltdd2:                           Decimal float library routines.
+                                                             (line  285)
+* __dpd_ltsd2:                           Decimal float library routines.
+                                                             (line  283)
+* __dpd_lttd2:                           Decimal float library routines.
+                                                             (line  287)
+* __dpd_muldd3:                          Decimal float library routines.
+                                                             (line   52)
+* __dpd_mulsd3:                          Decimal float library routines.
+                                                             (line   48)
+* __dpd_multd3:                          Decimal float library routines.
+                                                             (line   56)
+* __dpd_nedd2:                           Decimal float library routines.
+                                                             (line  267)
+* __dpd_negdd2:                          Decimal float library routines.
+                                                             (line   77)
+* __dpd_negsd2:                          Decimal float library routines.
+                                                             (line   75)
+* __dpd_negtd2:                          Decimal float library routines.
+                                                             (line   79)
+* __dpd_nesd2:                           Decimal float library routines.
+                                                             (line  265)
+* __dpd_netd2:                           Decimal float library routines.
+                                                             (line  269)
+* __dpd_subdd3:                          Decimal float library routines.
+                                                             (line   37)
+* __dpd_subsd3:                          Decimal float library routines.
+                                                             (line   33)
+* __dpd_subtd3:                          Decimal float library routines.
+                                                             (line   41)
+* __dpd_truncdddf:                       Decimal float library routines.
+                                                             (line  152)
+* __dpd_truncddsd2:                      Decimal float library routines.
+                                                             (line   93)
+* __dpd_truncddsf:                       Decimal float library routines.
+                                                             (line  123)
+* __dpd_truncdfsd:                       Decimal float library routines.
+                                                             (line  110)
+* __dpd_truncsdsf:                       Decimal float library routines.
+                                                             (line  150)
+* __dpd_trunctddd2:                      Decimal float library routines.
+                                                             (line   97)
+* __dpd_trunctddf:                       Decimal float library routines.
+                                                             (line  129)
+* __dpd_trunctdsd2:                      Decimal float library routines.
+                                                             (line   95)
+* __dpd_trunctdsf:                       Decimal float library routines.
+                                                             (line  125)
+* __dpd_trunctdtf:                       Decimal float library routines.
+                                                             (line  154)
+* __dpd_trunctdxf:                       Decimal float library routines.
+                                                             (line  135)
+* __dpd_trunctfdd:                       Decimal float library routines.
+                                                             (line  118)
+* __dpd_trunctfsd:                       Decimal float library routines.
+                                                             (line  114)
+* __dpd_truncxfdd:                       Decimal float library routines.
+                                                             (line  116)
+* __dpd_truncxfsd:                       Decimal float library routines.
+                                                             (line  112)
+* __dpd_unorddd2:                        Decimal float library routines.
+                                                             (line  234)
+* __dpd_unordsd2:                        Decimal float library routines.
+                                                             (line  232)
+* __dpd_unordtd2:                        Decimal float library routines.
+                                                             (line  236)
+* __DTOR_LIST__:                         Initialization.     (line   25)
+* __eqdf2:                               Soft float library routines.
+                                                             (line  194)
+* __eqsf2:                               Soft float library routines.
+                                                             (line  193)
+* __eqtf2:                               Soft float library routines.
+                                                             (line  195)
+* __extenddftf2:                         Soft float library routines.
+                                                             (line   68)
+* __extenddfxf2:                         Soft float library routines.
+                                                             (line   69)
+* __extendsfdf2:                         Soft float library routines.
+                                                             (line   65)
+* __extendsftf2:                         Soft float library routines.
+                                                             (line   66)
+* __extendsfxf2:                         Soft float library routines.
+                                                             (line   67)
+* __ffsdi2:                              Integer library routines.
+                                                             (line  144)
+* __ffsti2:                              Integer library routines.
+                                                             (line  145)
+* __fixdfdi:                             Soft float library routines.
+                                                             (line   88)
+* __fixdfsi:                             Soft float library routines.
+                                                             (line   81)
+* __fixdfti:                             Soft float library routines.
+                                                             (line   94)
+* __fixsfdi:                             Soft float library routines.
+                                                             (line   87)
+* __fixsfsi:                             Soft float library routines.
+                                                             (line   80)
+* __fixsfti:                             Soft float library routines.
+                                                             (line   93)
+* __fixtfdi:                             Soft float library routines.
+                                                             (line   89)
+* __fixtfsi:                             Soft float library routines.
+                                                             (line   82)
+* __fixtfti:                             Soft float library routines.
+                                                             (line   95)
+* __fixunsdfdi:                          Soft float library routines.
+                                                             (line  108)
+* __fixunsdfsi:                          Soft float library routines.
+                                                             (line  101)
+* __fixunsdfti:                          Soft float library routines.
+                                                             (line  115)
+* __fixunssfdi:                          Soft float library routines.
+                                                             (line  107)
+* __fixunssfsi:                          Soft float library routines.
+                                                             (line  100)
+* __fixunssfti:                          Soft float library routines.
+                                                             (line  114)
+* __fixunstfdi:                          Soft float library routines.
+                                                             (line  109)
+* __fixunstfsi:                          Soft float library routines.
+                                                             (line  102)
+* __fixunstfti:                          Soft float library routines.
+                                                             (line  116)
+* __fixunsxfdi:                          Soft float library routines.
+                                                             (line  110)
+* __fixunsxfsi:                          Soft float library routines.
+                                                             (line  103)
+* __fixunsxfti:                          Soft float library routines.
+                                                             (line  117)
+* __fixxfdi:                             Soft float library routines.
+                                                             (line   90)
+* __fixxfsi:                             Soft float library routines.
+                                                             (line   83)
+* __fixxfti:                             Soft float library routines.
+                                                             (line   96)
+* __floatdidf:                           Soft float library routines.
+                                                             (line  128)
+* __floatdisf:                           Soft float library routines.
+                                                             (line  127)
+* __floatditf:                           Soft float library routines.
+                                                             (line  129)
+* __floatdixf:                           Soft float library routines.
+                                                             (line  130)
+* __floatsidf:                           Soft float library routines.
+                                                             (line  122)
+* __floatsisf:                           Soft float library routines.
+                                                             (line  121)
+* __floatsitf:                           Soft float library routines.
+                                                             (line  123)
+* __floatsixf:                           Soft float library routines.
+                                                             (line  124)
+* __floattidf:                           Soft float library routines.
+                                                             (line  134)
+* __floattisf:                           Soft float library routines.
+                                                             (line  133)
+* __floattitf:                           Soft float library routines.
+                                                             (line  135)
+* __floattixf:                           Soft float library routines.
+                                                             (line  136)
+* __floatundidf:                         Soft float library routines.
+                                                             (line  146)
+* __floatundisf:                         Soft float library routines.
+                                                             (line  145)
+* __floatunditf:                         Soft float library routines.
+                                                             (line  147)
+* __floatundixf:                         Soft float library routines.
+                                                             (line  148)
+* __floatunsidf:                         Soft float library routines.
+                                                             (line  140)
+* __floatunsisf:                         Soft float library routines.
+                                                             (line  139)
+* __floatunsitf:                         Soft float library routines.
+                                                             (line  141)
+* __floatunsixf:                         Soft float library routines.
+                                                             (line  142)
+* __floatuntidf:                         Soft float library routines.
+                                                             (line  152)
+* __floatuntisf:                         Soft float library routines.
+                                                             (line  151)
+* __floatuntitf:                         Soft float library routines.
+                                                             (line  153)
+* __floatuntixf:                         Soft float library routines.
+                                                             (line  154)
+* __fractdadf:                           Fixed-point fractional library routines.
+                                                             (line  636)
+* __fractdadi:                           Fixed-point fractional library routines.
+                                                             (line  633)
+* __fractdadq:                           Fixed-point fractional library routines.
+                                                             (line  616)
+* __fractdaha2:                          Fixed-point fractional library routines.
+                                                             (line  617)
+* __fractdahi:                           Fixed-point fractional library routines.
+                                                             (line  631)
+* __fractdahq:                           Fixed-point fractional library routines.
+                                                             (line  614)
+* __fractdaqi:                           Fixed-point fractional library routines.
+                                                             (line  630)
+* __fractdaqq:                           Fixed-point fractional library routines.
+                                                             (line  613)
+* __fractdasa2:                          Fixed-point fractional library routines.
+                                                             (line  618)
+* __fractdasf:                           Fixed-point fractional library routines.
+                                                             (line  635)
+* __fractdasi:                           Fixed-point fractional library routines.
+                                                             (line  632)
+* __fractdasq:                           Fixed-point fractional library routines.
+                                                             (line  615)
+* __fractdata2:                          Fixed-point fractional library routines.
+                                                             (line  619)
+* __fractdati:                           Fixed-point fractional library routines.
+                                                             (line  634)
+* __fractdauda:                          Fixed-point fractional library routines.
+                                                             (line  627)
+* __fractdaudq:                          Fixed-point fractional library routines.
+                                                             (line  624)
+* __fractdauha:                          Fixed-point fractional library routines.
+                                                             (line  625)
+* __fractdauhq:                          Fixed-point fractional library routines.
+                                                             (line  621)
+* __fractdauqq:                          Fixed-point fractional library routines.
+                                                             (line  620)
+* __fractdausa:                          Fixed-point fractional library routines.
+                                                             (line  626)
+* __fractdausq:                          Fixed-point fractional library routines.
+                                                             (line  622)
+* __fractdauta:                          Fixed-point fractional library routines.
+                                                             (line  629)
+* __fractdfda:                           Fixed-point fractional library routines.
+                                                             (line 1025)
+* __fractdfdq:                           Fixed-point fractional library routines.
+                                                             (line 1022)
+* __fractdfha:                           Fixed-point fractional library routines.
+                                                             (line 1023)
+* __fractdfhq:                           Fixed-point fractional library routines.
+                                                             (line 1020)
+* __fractdfqq:                           Fixed-point fractional library routines.
+                                                             (line 1019)
+* __fractdfsa:                           Fixed-point fractional library routines.
+                                                             (line 1024)
+* __fractdfsq:                           Fixed-point fractional library routines.
+                                                             (line 1021)
+* __fractdfta:                           Fixed-point fractional library routines.
+                                                             (line 1026)
+* __fractdfuda:                          Fixed-point fractional library routines.
+                                                             (line 1033)
+* __fractdfudq:                          Fixed-point fractional library routines.
+                                                             (line 1030)
+* __fractdfuha:                          Fixed-point fractional library routines.
+                                                             (line 1031)
+* __fractdfuhq:                          Fixed-point fractional library routines.
+                                                             (line 1028)
+* __fractdfuqq:                          Fixed-point fractional library routines.
+                                                             (line 1027)
+* __fractdfusa:                          Fixed-point fractional library routines.
+                                                             (line 1032)
+* __fractdfusq:                          Fixed-point fractional library routines.
+                                                             (line 1029)
+* __fractdfuta:                          Fixed-point fractional library routines.
+                                                             (line 1034)
+* __fractdida:                           Fixed-point fractional library routines.
+                                                             (line  975)
+* __fractdidq:                           Fixed-point fractional library routines.
+                                                             (line  972)
+* __fractdiha:                           Fixed-point fractional library routines.
+                                                             (line  973)
+* __fractdihq:                           Fixed-point fractional library routines.
+                                                             (line  970)
+* __fractdiqq:                           Fixed-point fractional library routines.
+                                                             (line  969)
+* __fractdisa:                           Fixed-point fractional library routines.
+                                                             (line  974)
+* __fractdisq:                           Fixed-point fractional library routines.
+                                                             (line  971)
+* __fractdita:                           Fixed-point fractional library routines.
+                                                             (line  976)
+* __fractdiuda:                          Fixed-point fractional library routines.
+                                                             (line  983)
+* __fractdiudq:                          Fixed-point fractional library routines.
+                                                             (line  980)
+* __fractdiuha:                          Fixed-point fractional library routines.
+                                                             (line  981)
+* __fractdiuhq:                          Fixed-point fractional library routines.
+                                                             (line  978)
+* __fractdiuqq:                          Fixed-point fractional library routines.
+                                                             (line  977)
+* __fractdiusa:                          Fixed-point fractional library routines.
+                                                             (line  982)
+* __fractdiusq:                          Fixed-point fractional library routines.
+                                                             (line  979)
+* __fractdiuta:                          Fixed-point fractional library routines.
+                                                             (line  984)
+* __fractdqda:                           Fixed-point fractional library routines.
+                                                             (line  544)
+* __fractdqdf:                           Fixed-point fractional library routines.
+                                                             (line  566)
+* __fractdqdi:                           Fixed-point fractional library routines.
+                                                             (line  563)
+* __fractdqha:                           Fixed-point fractional library routines.
+                                                             (line  542)
+* __fractdqhi:                           Fixed-point fractional library routines.
+                                                             (line  561)
+* __fractdqhq2:                          Fixed-point fractional library routines.
+                                                             (line  540)
+* __fractdqqi:                           Fixed-point fractional library routines.
+                                                             (line  560)
+* __fractdqqq2:                          Fixed-point fractional library routines.
+                                                             (line  539)
+* __fractdqsa:                           Fixed-point fractional library routines.
+                                                             (line  543)
+* __fractdqsf:                           Fixed-point fractional library routines.
+                                                             (line  565)
+* __fractdqsi:                           Fixed-point fractional library routines.
+                                                             (line  562)
+* __fractdqsq2:                          Fixed-point fractional library routines.
+                                                             (line  541)
+* __fractdqta:                           Fixed-point fractional library routines.
+                                                             (line  545)
+* __fractdqti:                           Fixed-point fractional library routines.
+                                                             (line  564)
+* __fractdquda:                          Fixed-point fractional library routines.
+                                                             (line  557)
+* __fractdqudq:                          Fixed-point fractional library routines.
+                                                             (line  552)
+* __fractdquha:                          Fixed-point fractional library routines.
+                                                             (line  554)
+* __fractdquhq:                          Fixed-point fractional library routines.
+                                                             (line  548)
+* __fractdquqq:                          Fixed-point fractional library routines.
+                                                             (line  547)
+* __fractdqusa:                          Fixed-point fractional library routines.
+                                                             (line  555)
+* __fractdqusq:                          Fixed-point fractional library routines.
+                                                             (line  550)
+* __fractdquta:                          Fixed-point fractional library routines.
+                                                             (line  559)
+* __fracthada2:                          Fixed-point fractional library routines.
+                                                             (line  572)
+* __fracthadf:                           Fixed-point fractional library routines.
+                                                             (line  590)
+* __fracthadi:                           Fixed-point fractional library routines.
+                                                             (line  587)
+* __fracthadq:                           Fixed-point fractional library routines.
+                                                             (line  570)
+* __fracthahi:                           Fixed-point fractional library routines.
+                                                             (line  585)
+* __fracthahq:                           Fixed-point fractional library routines.
+                                                             (line  568)
+* __fracthaqi:                           Fixed-point fractional library routines.
+                                                             (line  584)
+* __fracthaqq:                           Fixed-point fractional library routines.
+                                                             (line  567)
+* __fracthasa2:                          Fixed-point fractional library routines.
+                                                             (line  571)
+* __fracthasf:                           Fixed-point fractional library routines.
+                                                             (line  589)
+* __fracthasi:                           Fixed-point fractional library routines.
+                                                             (line  586)
+* __fracthasq:                           Fixed-point fractional library routines.
+                                                             (line  569)
+* __fracthata2:                          Fixed-point fractional library routines.
+                                                             (line  573)
+* __fracthati:                           Fixed-point fractional library routines.
+                                                             (line  588)
+* __fracthauda:                          Fixed-point fractional library routines.
+                                                             (line  581)
+* __fracthaudq:                          Fixed-point fractional library routines.
+                                                             (line  578)
+* __fracthauha:                          Fixed-point fractional library routines.
+                                                             (line  579)
+* __fracthauhq:                          Fixed-point fractional library routines.
+                                                             (line  575)
+* __fracthauqq:                          Fixed-point fractional library routines.
+                                                             (line  574)
+* __fracthausa:                          Fixed-point fractional library routines.
+                                                             (line  580)
+* __fracthausq:                          Fixed-point fractional library routines.
+                                                             (line  576)
+* __fracthauta:                          Fixed-point fractional library routines.
+                                                             (line  583)
+* __fracthida:                           Fixed-point fractional library routines.
+                                                             (line  943)
+* __fracthidq:                           Fixed-point fractional library routines.
+                                                             (line  940)
+* __fracthiha:                           Fixed-point fractional library routines.
+                                                             (line  941)
+* __fracthihq:                           Fixed-point fractional library routines.
+                                                             (line  938)
+* __fracthiqq:                           Fixed-point fractional library routines.
+                                                             (line  937)
+* __fracthisa:                           Fixed-point fractional library routines.
+                                                             (line  942)
+* __fracthisq:                           Fixed-point fractional library routines.
+                                                             (line  939)
+* __fracthita:                           Fixed-point fractional library routines.
+                                                             (line  944)
+* __fracthiuda:                          Fixed-point fractional library routines.
+                                                             (line  951)
+* __fracthiudq:                          Fixed-point fractional library routines.
+                                                             (line  948)
+* __fracthiuha:                          Fixed-point fractional library routines.
+                                                             (line  949)
+* __fracthiuhq:                          Fixed-point fractional library routines.
+                                                             (line  946)
+* __fracthiuqq:                          Fixed-point fractional library routines.
+                                                             (line  945)
+* __fracthiusa:                          Fixed-point fractional library routines.
+                                                             (line  950)
+* __fracthiusq:                          Fixed-point fractional library routines.
+                                                             (line  947)
+* __fracthiuta:                          Fixed-point fractional library routines.
+                                                             (line  952)
+* __fracthqda:                           Fixed-point fractional library routines.
+                                                             (line  498)
+* __fracthqdf:                           Fixed-point fractional library routines.
+                                                             (line  514)
+* __fracthqdi:                           Fixed-point fractional library routines.
+                                                             (line  511)
+* __fracthqdq2:                          Fixed-point fractional library routines.
+                                                             (line  495)
+* __fracthqha:                           Fixed-point fractional library routines.
+                                                             (line  496)
+* __fracthqhi:                           Fixed-point fractional library routines.
+                                                             (line  509)
+* __fracthqqi:                           Fixed-point fractional library routines.
+                                                             (line  508)
+* __fracthqqq2:                          Fixed-point fractional library routines.
+                                                             (line  493)
+* __fracthqsa:                           Fixed-point fractional library routines.
+                                                             (line  497)
+* __fracthqsf:                           Fixed-point fractional library routines.
+                                                             (line  513)
+* __fracthqsi:                           Fixed-point fractional library routines.
+                                                             (line  510)
+* __fracthqsq2:                          Fixed-point fractional library routines.
+                                                             (line  494)
+* __fracthqta:                           Fixed-point fractional library routines.
+                                                             (line  499)
+* __fracthqti:                           Fixed-point fractional library routines.
+                                                             (line  512)
+* __fracthquda:                          Fixed-point fractional library routines.
+                                                             (line  506)
+* __fracthqudq:                          Fixed-point fractional library routines.
+                                                             (line  503)
+* __fracthquha:                          Fixed-point fractional library routines.
+                                                             (line  504)
+* __fracthquhq:                          Fixed-point fractional library routines.
+                                                             (line  501)
+* __fracthquqq:                          Fixed-point fractional library routines.
+                                                             (line  500)
+* __fracthqusa:                          Fixed-point fractional library routines.
+                                                             (line  505)
+* __fracthqusq:                          Fixed-point fractional library routines.
+                                                             (line  502)
+* __fracthquta:                          Fixed-point fractional library routines.
+                                                             (line  507)
+* __fractqida:                           Fixed-point fractional library routines.
+                                                             (line  925)
+* __fractqidq:                           Fixed-point fractional library routines.
+                                                             (line  922)
+* __fractqiha:                           Fixed-point fractional library routines.
+                                                             (line  923)
+* __fractqihq:                           Fixed-point fractional library routines.
+                                                             (line  920)
+* __fractqiqq:                           Fixed-point fractional library routines.
+                                                             (line  919)
+* __fractqisa:                           Fixed-point fractional library routines.
+                                                             (line  924)
+* __fractqisq:                           Fixed-point fractional library routines.
+                                                             (line  921)
+* __fractqita:                           Fixed-point fractional library routines.
+                                                             (line  926)
+* __fractqiuda:                          Fixed-point fractional library routines.
+                                                             (line  934)
+* __fractqiudq:                          Fixed-point fractional library routines.
+                                                             (line  931)
+* __fractqiuha:                          Fixed-point fractional library routines.
+                                                             (line  932)
+* __fractqiuhq:                          Fixed-point fractional library routines.
+                                                             (line  928)
+* __fractqiuqq:                          Fixed-point fractional library routines.
+                                                             (line  927)
+* __fractqiusa:                          Fixed-point fractional library routines.
+                                                             (line  933)
+* __fractqiusq:                          Fixed-point fractional library routines.
+                                                             (line  929)
+* __fractqiuta:                          Fixed-point fractional library routines.
+                                                             (line  936)
+* __fractqqda:                           Fixed-point fractional library routines.
+                                                             (line  474)
+* __fractqqdf:                           Fixed-point fractional library routines.
+                                                             (line  492)
+* __fractqqdi:                           Fixed-point fractional library routines.
+                                                             (line  489)
+* __fractqqdq2:                          Fixed-point fractional library routines.
+                                                             (line  471)
+* __fractqqha:                           Fixed-point fractional library routines.
+                                                             (line  472)
+* __fractqqhi:                           Fixed-point fractional library routines.
+                                                             (line  487)
+* __fractqqhq2:                          Fixed-point fractional library routines.
+                                                             (line  469)
+* __fractqqqi:                           Fixed-point fractional library routines.
+                                                             (line  486)
+* __fractqqsa:                           Fixed-point fractional library routines.
+                                                             (line  473)
+* __fractqqsf:                           Fixed-point fractional library routines.
+                                                             (line  491)
+* __fractqqsi:                           Fixed-point fractional library routines.
+                                                             (line  488)
+* __fractqqsq2:                          Fixed-point fractional library routines.
+                                                             (line  470)
+* __fractqqta:                           Fixed-point fractional library routines.
+                                                             (line  475)
+* __fractqqti:                           Fixed-point fractional library routines.
+                                                             (line  490)
+* __fractqquda:                          Fixed-point fractional library routines.
+                                                             (line  483)
+* __fractqqudq:                          Fixed-point fractional library routines.
+                                                             (line  480)
+* __fractqquha:                          Fixed-point fractional library routines.
+                                                             (line  481)
+* __fractqquhq:                          Fixed-point fractional library routines.
+                                                             (line  477)
+* __fractqquqq:                          Fixed-point fractional library routines.
+                                                             (line  476)
+* __fractqqusa:                          Fixed-point fractional library routines.
+                                                             (line  482)
+* __fractqqusq:                          Fixed-point fractional library routines.
+                                                             (line  478)
+* __fractqquta:                          Fixed-point fractional library routines.
+                                                             (line  485)
+* __fractsada2:                          Fixed-point fractional library routines.
+                                                             (line  596)
+* __fractsadf:                           Fixed-point fractional library routines.
+                                                             (line  612)
+* __fractsadi:                           Fixed-point fractional library routines.
+                                                             (line  609)
+* __fractsadq:                           Fixed-point fractional library routines.
+                                                             (line  594)
+* __fractsaha2:                          Fixed-point fractional library routines.
+                                                             (line  595)
+* __fractsahi:                           Fixed-point fractional library routines.
+                                                             (line  607)
+* __fractsahq:                           Fixed-point fractional library routines.
+                                                             (line  592)
+* __fractsaqi:                           Fixed-point fractional library routines.
+                                                             (line  606)
+* __fractsaqq:                           Fixed-point fractional library routines.
+                                                             (line  591)
+* __fractsasf:                           Fixed-point fractional library routines.
+                                                             (line  611)
+* __fractsasi:                           Fixed-point fractional library routines.
+                                                             (line  608)
+* __fractsasq:                           Fixed-point fractional library routines.
+                                                             (line  593)
+* __fractsata2:                          Fixed-point fractional library routines.
+                                                             (line  597)
+* __fractsati:                           Fixed-point fractional library routines.
+                                                             (line  610)
+* __fractsauda:                          Fixed-point fractional library routines.
+                                                             (line  604)
+* __fractsaudq:                          Fixed-point fractional library routines.
+                                                             (line  601)
+* __fractsauha:                          Fixed-point fractional library routines.
+                                                             (line  602)
+* __fractsauhq:                          Fixed-point fractional library routines.
+                                                             (line  599)
+* __fractsauqq:                          Fixed-point fractional library routines.
+                                                             (line  598)
+* __fractsausa:                          Fixed-point fractional library routines.
+                                                             (line  603)
+* __fractsausq:                          Fixed-point fractional library routines.
+                                                             (line  600)
+* __fractsauta:                          Fixed-point fractional library routines.
+                                                             (line  605)
+* __fractsfda:                           Fixed-point fractional library routines.
+                                                             (line 1009)
+* __fractsfdq:                           Fixed-point fractional library routines.
+                                                             (line 1006)
+* __fractsfha:                           Fixed-point fractional library routines.
+                                                             (line 1007)
+* __fractsfhq:                           Fixed-point fractional library routines.
+                                                             (line 1004)
+* __fractsfqq:                           Fixed-point fractional library routines.
+                                                             (line 1003)
+* __fractsfsa:                           Fixed-point fractional library routines.
+                                                             (line 1008)
+* __fractsfsq:                           Fixed-point fractional library routines.
+                                                             (line 1005)
+* __fractsfta:                           Fixed-point fractional library routines.
+                                                             (line 1010)
+* __fractsfuda:                          Fixed-point fractional library routines.
+                                                             (line 1017)
+* __fractsfudq:                          Fixed-point fractional library routines.
+                                                             (line 1014)
+* __fractsfuha:                          Fixed-point fractional library routines.
+                                                             (line 1015)
+* __fractsfuhq:                          Fixed-point fractional library routines.
+                                                             (line 1012)
+* __fractsfuqq:                          Fixed-point fractional library routines.
+                                                             (line 1011)
+* __fractsfusa:                          Fixed-point fractional library routines.
+                                                             (line 1016)
+* __fractsfusq:                          Fixed-point fractional library routines.
+                                                             (line 1013)
+* __fractsfuta:                          Fixed-point fractional library routines.
+                                                             (line 1018)
+* __fractsida:                           Fixed-point fractional library routines.
+                                                             (line  959)
+* __fractsidq:                           Fixed-point fractional library routines.
+                                                             (line  956)
+* __fractsiha:                           Fixed-point fractional library routines.
+                                                             (line  957)
+* __fractsihq:                           Fixed-point fractional library routines.
+                                                             (line  954)
+* __fractsiqq:                           Fixed-point fractional library routines.
+                                                             (line  953)
+* __fractsisa:                           Fixed-point fractional library routines.
+                                                             (line  958)
+* __fractsisq:                           Fixed-point fractional library routines.
+                                                             (line  955)
+* __fractsita:                           Fixed-point fractional library routines.
+                                                             (line  960)
+* __fractsiuda:                          Fixed-point fractional library routines.
+                                                             (line  967)
+* __fractsiudq:                          Fixed-point fractional library routines.
+                                                             (line  964)
+* __fractsiuha:                          Fixed-point fractional library routines.
+                                                             (line  965)
+* __fractsiuhq:                          Fixed-point fractional library routines.
+                                                             (line  962)
+* __fractsiuqq:                          Fixed-point fractional library routines.
+                                                             (line  961)
+* __fractsiusa:                          Fixed-point fractional library routines.
+                                                             (line  966)
+* __fractsiusq:                          Fixed-point fractional library routines.
+                                                             (line  963)
+* __fractsiuta:                          Fixed-point fractional library routines.
+                                                             (line  968)
+* __fractsqda:                           Fixed-point fractional library routines.
+                                                             (line  520)
+* __fractsqdf:                           Fixed-point fractional library routines.
+                                                             (line  538)
+* __fractsqdi:                           Fixed-point fractional library routines.
+                                                             (line  535)
+* __fractsqdq2:                          Fixed-point fractional library routines.
+                                                             (line  517)
+* __fractsqha:                           Fixed-point fractional library routines.
+                                                             (line  518)
+* __fractsqhi:                           Fixed-point fractional library routines.
+                                                             (line  533)
+* __fractsqhq2:                          Fixed-point fractional library routines.
+                                                             (line  516)
+* __fractsqqi:                           Fixed-point fractional library routines.
+                                                             (line  532)
+* __fractsqqq2:                          Fixed-point fractional library routines.
+                                                             (line  515)
+* __fractsqsa:                           Fixed-point fractional library routines.
+                                                             (line  519)
+* __fractsqsf:                           Fixed-point fractional library routines.
+                                                             (line  537)
+* __fractsqsi:                           Fixed-point fractional library routines.
+                                                             (line  534)
+* __fractsqta:                           Fixed-point fractional library routines.
+                                                             (line  521)
+* __fractsqti:                           Fixed-point fractional library routines.
+                                                             (line  536)
+* __fractsquda:                          Fixed-point fractional library routines.
+                                                             (line  529)
+* __fractsqudq:                          Fixed-point fractional library routines.
+                                                             (line  526)
+* __fractsquha:                          Fixed-point fractional library routines.
+                                                             (line  527)
+* __fractsquhq:                          Fixed-point fractional library routines.
+                                                             (line  523)
+* __fractsquqq:                          Fixed-point fractional library routines.
+                                                             (line  522)
+* __fractsqusa:                          Fixed-point fractional library routines.
+                                                             (line  528)
+* __fractsqusq:                          Fixed-point fractional library routines.
+                                                             (line  524)
+* __fractsquta:                          Fixed-point fractional library routines.
+                                                             (line  531)
+* __fracttada2:                          Fixed-point fractional library routines.
+                                                             (line  643)
+* __fracttadf:                           Fixed-point fractional library routines.
+                                                             (line  664)
+* __fracttadi:                           Fixed-point fractional library routines.
+                                                             (line  661)
+* __fracttadq:                           Fixed-point fractional library routines.
+                                                             (line  640)
+* __fracttaha2:                          Fixed-point fractional library routines.
+                                                             (line  641)
+* __fracttahi:                           Fixed-point fractional library routines.
+                                                             (line  659)
+* __fracttahq:                           Fixed-point fractional library routines.
+                                                             (line  638)
+* __fracttaqi:                           Fixed-point fractional library routines.
+                                                             (line  658)
+* __fracttaqq:                           Fixed-point fractional library routines.
+                                                             (line  637)
+* __fracttasa2:                          Fixed-point fractional library routines.
+                                                             (line  642)
+* __fracttasf:                           Fixed-point fractional library routines.
+                                                             (line  663)
+* __fracttasi:                           Fixed-point fractional library routines.
+                                                             (line  660)
+* __fracttasq:                           Fixed-point fractional library routines.
+                                                             (line  639)
+* __fracttati:                           Fixed-point fractional library routines.
+                                                             (line  662)
+* __fracttauda:                          Fixed-point fractional library routines.
+                                                             (line  655)
+* __fracttaudq:                          Fixed-point fractional library routines.
+                                                             (line  650)
+* __fracttauha:                          Fixed-point fractional library routines.
+                                                             (line  652)
+* __fracttauhq:                          Fixed-point fractional library routines.
+                                                             (line  646)
+* __fracttauqq:                          Fixed-point fractional library routines.
+                                                             (line  645)
+* __fracttausa:                          Fixed-point fractional library routines.
+                                                             (line  653)
+* __fracttausq:                          Fixed-point fractional library routines.
+                                                             (line  648)
+* __fracttauta:                          Fixed-point fractional library routines.
+                                                             (line  657)
+* __fracttida:                           Fixed-point fractional library routines.
+                                                             (line  991)
+* __fracttidq:                           Fixed-point fractional library routines.
+                                                             (line  988)
+* __fracttiha:                           Fixed-point fractional library routines.
+                                                             (line  989)
+* __fracttihq:                           Fixed-point fractional library routines.
+                                                             (line  986)
+* __fracttiqq:                           Fixed-point fractional library routines.
+                                                             (line  985)
+* __fracttisa:                           Fixed-point fractional library routines.
+                                                             (line  990)
+* __fracttisq:                           Fixed-point fractional library routines.
+                                                             (line  987)
+* __fracttita:                           Fixed-point fractional library routines.
+                                                             (line  992)
+* __fracttiuda:                          Fixed-point fractional library routines.
+                                                             (line 1000)
+* __fracttiudq:                          Fixed-point fractional library routines.
+                                                             (line  997)
+* __fracttiuha:                          Fixed-point fractional library routines.
+                                                             (line  998)
+* __fracttiuhq:                          Fixed-point fractional library routines.
+                                                             (line  994)
+* __fracttiuqq:                          Fixed-point fractional library routines.
+                                                             (line  993)
+* __fracttiusa:                          Fixed-point fractional library routines.
+                                                             (line  999)
+* __fracttiusq:                          Fixed-point fractional library routines.
+                                                             (line  995)
+* __fracttiuta:                          Fixed-point fractional library routines.
+                                                             (line 1002)
+* __fractudada:                          Fixed-point fractional library routines.
+                                                             (line  858)
+* __fractudadf:                          Fixed-point fractional library routines.
+                                                             (line  881)
+* __fractudadi:                          Fixed-point fractional library routines.
+                                                             (line  878)
+* __fractudadq:                          Fixed-point fractional library routines.
+                                                             (line  855)
+* __fractudaha:                          Fixed-point fractional library routines.
+                                                             (line  856)
+* __fractudahi:                          Fixed-point fractional library routines.
+                                                             (line  876)
+* __fractudahq:                          Fixed-point fractional library routines.
+                                                             (line  852)
+* __fractudaqi:                          Fixed-point fractional library routines.
+                                                             (line  875)
+* __fractudaqq:                          Fixed-point fractional library routines.
+                                                             (line  851)
+* __fractudasa:                          Fixed-point fractional library routines.
+                                                             (line  857)
+* __fractudasf:                          Fixed-point fractional library routines.
+                                                             (line  880)
+* __fractudasi:                          Fixed-point fractional library routines.
+                                                             (line  877)
+* __fractudasq:                          Fixed-point fractional library routines.
+                                                             (line  853)
+* __fractudata:                          Fixed-point fractional library routines.
+                                                             (line  860)
+* __fractudati:                          Fixed-point fractional library routines.
+                                                             (line  879)
+* __fractudaudq:                         Fixed-point fractional library routines.
+                                                             (line  868)
+* __fractudauha2:                        Fixed-point fractional library routines.
+                                                             (line  870)
+* __fractudauhq:                         Fixed-point fractional library routines.
+                                                             (line  864)
+* __fractudauqq:                         Fixed-point fractional library routines.
+                                                             (line  862)
+* __fractudausa2:                        Fixed-point fractional library routines.
+                                                             (line  872)
+* __fractudausq:                         Fixed-point fractional library routines.
+                                                             (line  866)
+* __fractudauta2:                        Fixed-point fractional library routines.
+                                                             (line  874)
+* __fractudqda:                          Fixed-point fractional library routines.
+                                                             (line  766)
+* __fractudqdf:                          Fixed-point fractional library routines.
+                                                             (line  791)
+* __fractudqdi:                          Fixed-point fractional library routines.
+                                                             (line  787)
+* __fractudqdq:                          Fixed-point fractional library routines.
+                                                             (line  761)
+* __fractudqha:                          Fixed-point fractional library routines.
+                                                             (line  763)
+* __fractudqhi:                          Fixed-point fractional library routines.
+                                                             (line  785)
+* __fractudqhq:                          Fixed-point fractional library routines.
+                                                             (line  757)
+* __fractudqqi:                          Fixed-point fractional library routines.
+                                                             (line  784)
+* __fractudqqq:                          Fixed-point fractional library routines.
+                                                             (line  756)
+* __fractudqsa:                          Fixed-point fractional library routines.
+                                                             (line  764)
+* __fractudqsf:                          Fixed-point fractional library routines.
+                                                             (line  790)
+* __fractudqsi:                          Fixed-point fractional library routines.
+                                                             (line  786)
+* __fractudqsq:                          Fixed-point fractional library routines.
+                                                             (line  759)
+* __fractudqta:                          Fixed-point fractional library routines.
+                                                             (line  768)
+* __fractudqti:                          Fixed-point fractional library routines.
+                                                             (line  789)
+* __fractudquda:                         Fixed-point fractional library routines.
+                                                             (line  780)
+* __fractudquha:                         Fixed-point fractional library routines.
+                                                             (line  776)
+* __fractudquhq2:                        Fixed-point fractional library routines.
+                                                             (line  772)
+* __fractudquqq2:                        Fixed-point fractional library routines.
+                                                             (line  770)
+* __fractudqusa:                         Fixed-point fractional library routines.
+                                                             (line  778)
+* __fractudqusq2:                        Fixed-point fractional library routines.
+                                                             (line  774)
+* __fractudquta:                         Fixed-point fractional library routines.
+                                                             (line  782)
+* __fractuhada:                          Fixed-point fractional library routines.
+                                                             (line  799)
+* __fractuhadf:                          Fixed-point fractional library routines.
+                                                             (line  822)
+* __fractuhadi:                          Fixed-point fractional library routines.
+                                                             (line  819)
+* __fractuhadq:                          Fixed-point fractional library routines.
+                                                             (line  796)
+* __fractuhaha:                          Fixed-point fractional library routines.
+                                                             (line  797)
+* __fractuhahi:                          Fixed-point fractional library routines.
+                                                             (line  817)
+* __fractuhahq:                          Fixed-point fractional library routines.
+                                                             (line  793)
+* __fractuhaqi:                          Fixed-point fractional library routines.
+                                                             (line  816)
+* __fractuhaqq:                          Fixed-point fractional library routines.
+                                                             (line  792)
+* __fractuhasa:                          Fixed-point fractional library routines.
+                                                             (line  798)
+* __fractuhasf:                          Fixed-point fractional library routines.
+                                                             (line  821)
+* __fractuhasi:                          Fixed-point fractional library routines.
+                                                             (line  818)
+* __fractuhasq:                          Fixed-point fractional library routines.
+                                                             (line  794)
+* __fractuhata:                          Fixed-point fractional library routines.
+                                                             (line  801)
+* __fractuhati:                          Fixed-point fractional library routines.
+                                                             (line  820)
+* __fractuhauda2:                        Fixed-point fractional library routines.
+                                                             (line  813)
+* __fractuhaudq:                         Fixed-point fractional library routines.
+                                                             (line  809)
+* __fractuhauhq:                         Fixed-point fractional library routines.
+                                                             (line  805)
+* __fractuhauqq:                         Fixed-point fractional library routines.
+                                                             (line  803)
+* __fractuhausa2:                        Fixed-point fractional library routines.
+                                                             (line  811)
+* __fractuhausq:                         Fixed-point fractional library routines.
+                                                             (line  807)
+* __fractuhauta2:                        Fixed-point fractional library routines.
+                                                             (line  815)
+* __fractuhqda:                          Fixed-point fractional library routines.
+                                                             (line  702)
+* __fractuhqdf:                          Fixed-point fractional library routines.
+                                                             (line  723)
+* __fractuhqdi:                          Fixed-point fractional library routines.
+                                                             (line  720)
+* __fractuhqdq:                          Fixed-point fractional library routines.
+                                                             (line  699)
+* __fractuhqha:                          Fixed-point fractional library routines.
+                                                             (line  700)
+* __fractuhqhi:                          Fixed-point fractional library routines.
+                                                             (line  718)
+* __fractuhqhq:                          Fixed-point fractional library routines.
+                                                             (line  697)
+* __fractuhqqi:                          Fixed-point fractional library routines.
+                                                             (line  717)
+* __fractuhqqq:                          Fixed-point fractional library routines.
+                                                             (line  696)
+* __fractuhqsa:                          Fixed-point fractional library routines.
+                                                             (line  701)
+* __fractuhqsf:                          Fixed-point fractional library routines.
+                                                             (line  722)
+* __fractuhqsi:                          Fixed-point fractional library routines.
+                                                             (line  719)
+* __fractuhqsq:                          Fixed-point fractional library routines.
+                                                             (line  698)
+* __fractuhqta:                          Fixed-point fractional library routines.
+                                                             (line  703)
+* __fractuhqti:                          Fixed-point fractional library routines.
+                                                             (line  721)
+* __fractuhquda:                         Fixed-point fractional library routines.
+                                                             (line  714)
+* __fractuhqudq2:                        Fixed-point fractional library routines.
+                                                             (line  709)
+* __fractuhquha:                         Fixed-point fractional library routines.
+                                                             (line  711)
+* __fractuhquqq2:                        Fixed-point fractional library routines.
+                                                             (line  705)
+* __fractuhqusa:                         Fixed-point fractional library routines.
+                                                             (line  712)
+* __fractuhqusq2:                        Fixed-point fractional library routines.
+                                                             (line  707)
+* __fractuhquta:                         Fixed-point fractional library routines.
+                                                             (line  716)
+* __fractunsdadi:                        Fixed-point fractional library routines.
+                                                             (line 1555)
+* __fractunsdahi:                        Fixed-point fractional library routines.
+                                                             (line 1553)
+* __fractunsdaqi:                        Fixed-point fractional library routines.
+                                                             (line 1552)
+* __fractunsdasi:                        Fixed-point fractional library routines.
+                                                             (line 1554)
+* __fractunsdati:                        Fixed-point fractional library routines.
+                                                             (line 1556)
+* __fractunsdida:                        Fixed-point fractional library routines.
+                                                             (line 1707)
+* __fractunsdidq:                        Fixed-point fractional library routines.
+                                                             (line 1704)
+* __fractunsdiha:                        Fixed-point fractional library routines.
+                                                             (line 1705)
+* __fractunsdihq:                        Fixed-point fractional library routines.
+                                                             (line 1702)
+* __fractunsdiqq:                        Fixed-point fractional library routines.
+                                                             (line 1701)
+* __fractunsdisa:                        Fixed-point fractional library routines.
+                                                             (line 1706)
+* __fractunsdisq:                        Fixed-point fractional library routines.
+                                                             (line 1703)
+* __fractunsdita:                        Fixed-point fractional library routines.
+                                                             (line 1708)
+* __fractunsdiuda:                       Fixed-point fractional library routines.
+                                                             (line 1720)
+* __fractunsdiudq:                       Fixed-point fractional library routines.
+                                                             (line 1715)
+* __fractunsdiuha:                       Fixed-point fractional library routines.
+                                                             (line 1717)
+* __fractunsdiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1711)
+* __fractunsdiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1710)
+* __fractunsdiusa:                       Fixed-point fractional library routines.
+                                                             (line 1718)
+* __fractunsdiusq:                       Fixed-point fractional library routines.
+                                                             (line 1713)
+* __fractunsdiuta:                       Fixed-point fractional library routines.
+                                                             (line 1722)
+* __fractunsdqdi:                        Fixed-point fractional library routines.
+                                                             (line 1539)
+* __fractunsdqhi:                        Fixed-point fractional library routines.
+                                                             (line 1537)
+* __fractunsdqqi:                        Fixed-point fractional library routines.
+                                                             (line 1536)
+* __fractunsdqsi:                        Fixed-point fractional library routines.
+                                                             (line 1538)
+* __fractunsdqti:                        Fixed-point fractional library routines.
+                                                             (line 1541)
+* __fractunshadi:                        Fixed-point fractional library routines.
+                                                             (line 1545)
+* __fractunshahi:                        Fixed-point fractional library routines.
+                                                             (line 1543)
+* __fractunshaqi:                        Fixed-point fractional library routines.
+                                                             (line 1542)
+* __fractunshasi:                        Fixed-point fractional library routines.
+                                                             (line 1544)
+* __fractunshati:                        Fixed-point fractional library routines.
+                                                             (line 1546)
+* __fractunshida:                        Fixed-point fractional library routines.
+                                                             (line 1663)
+* __fractunshidq:                        Fixed-point fractional library routines.
+                                                             (line 1660)
+* __fractunshiha:                        Fixed-point fractional library routines.
+                                                             (line 1661)
+* __fractunshihq:                        Fixed-point fractional library routines.
+                                                             (line 1658)
+* __fractunshiqq:                        Fixed-point fractional library routines.
+                                                             (line 1657)
+* __fractunshisa:                        Fixed-point fractional library routines.
+                                                             (line 1662)
+* __fractunshisq:                        Fixed-point fractional library routines.
+                                                             (line 1659)
+* __fractunshita:                        Fixed-point fractional library routines.
+                                                             (line 1664)
+* __fractunshiuda:                       Fixed-point fractional library routines.
+                                                             (line 1676)
+* __fractunshiudq:                       Fixed-point fractional library routines.
+                                                             (line 1671)
+* __fractunshiuha:                       Fixed-point fractional library routines.
+                                                             (line 1673)
+* __fractunshiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1667)
+* __fractunshiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1666)
+* __fractunshiusa:                       Fixed-point fractional library routines.
+                                                             (line 1674)
+* __fractunshiusq:                       Fixed-point fractional library routines.
+                                                             (line 1669)
+* __fractunshiuta:                       Fixed-point fractional library routines.
+                                                             (line 1678)
+* __fractunshqdi:                        Fixed-point fractional library routines.
+                                                             (line 1529)
+* __fractunshqhi:                        Fixed-point fractional library routines.
+                                                             (line 1527)
+* __fractunshqqi:                        Fixed-point fractional library routines.
+                                                             (line 1526)
+* __fractunshqsi:                        Fixed-point fractional library routines.
+                                                             (line 1528)
+* __fractunshqti:                        Fixed-point fractional library routines.
+                                                             (line 1530)
+* __fractunsqida:                        Fixed-point fractional library routines.
+                                                             (line 1641)
+* __fractunsqidq:                        Fixed-point fractional library routines.
+                                                             (line 1638)
+* __fractunsqiha:                        Fixed-point fractional library routines.
+                                                             (line 1639)
+* __fractunsqihq:                        Fixed-point fractional library routines.
+                                                             (line 1636)
+* __fractunsqiqq:                        Fixed-point fractional library routines.
+                                                             (line 1635)
+* __fractunsqisa:                        Fixed-point fractional library routines.
+                                                             (line 1640)
+* __fractunsqisq:                        Fixed-point fractional library routines.
+                                                             (line 1637)
+* __fractunsqita:                        Fixed-point fractional library routines.
+                                                             (line 1642)
+* __fractunsqiuda:                       Fixed-point fractional library routines.
+                                                             (line 1654)
+* __fractunsqiudq:                       Fixed-point fractional library routines.
+                                                             (line 1649)
+* __fractunsqiuha:                       Fixed-point fractional library routines.
+                                                             (line 1651)
+* __fractunsqiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1645)
+* __fractunsqiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1644)
+* __fractunsqiusa:                       Fixed-point fractional library routines.
+                                                             (line 1652)
+* __fractunsqiusq:                       Fixed-point fractional library routines.
+                                                             (line 1647)
+* __fractunsqiuta:                       Fixed-point fractional library routines.
+                                                             (line 1656)
+* __fractunsqqdi:                        Fixed-point fractional library routines.
+                                                             (line 1524)
+* __fractunsqqhi:                        Fixed-point fractional library routines.
+                                                             (line 1522)
+* __fractunsqqqi:                        Fixed-point fractional library routines.
+                                                             (line 1521)
+* __fractunsqqsi:                        Fixed-point fractional library routines.
+                                                             (line 1523)
+* __fractunsqqti:                        Fixed-point fractional library routines.
+                                                             (line 1525)
+* __fractunssadi:                        Fixed-point fractional library routines.
+                                                             (line 1550)
+* __fractunssahi:                        Fixed-point fractional library routines.
+                                                             (line 1548)
+* __fractunssaqi:                        Fixed-point fractional library routines.
+                                                             (line 1547)
+* __fractunssasi:                        Fixed-point fractional library routines.
+                                                             (line 1549)
+* __fractunssati:                        Fixed-point fractional library routines.
+                                                             (line 1551)
+* __fractunssida:                        Fixed-point fractional library routines.
+                                                             (line 1685)
+* __fractunssidq:                        Fixed-point fractional library routines.
+                                                             (line 1682)
+* __fractunssiha:                        Fixed-point fractional library routines.
+                                                             (line 1683)
+* __fractunssihq:                        Fixed-point fractional library routines.
+                                                             (line 1680)
+* __fractunssiqq:                        Fixed-point fractional library routines.
+                                                             (line 1679)
+* __fractunssisa:                        Fixed-point fractional library routines.
+                                                             (line 1684)
+* __fractunssisq:                        Fixed-point fractional library routines.
+                                                             (line 1681)
+* __fractunssita:                        Fixed-point fractional library routines.
+                                                             (line 1686)
+* __fractunssiuda:                       Fixed-point fractional library routines.
+                                                             (line 1698)
+* __fractunssiudq:                       Fixed-point fractional library routines.
+                                                             (line 1693)
+* __fractunssiuha:                       Fixed-point fractional library routines.
+                                                             (line 1695)
+* __fractunssiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1689)
+* __fractunssiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1688)
+* __fractunssiusa:                       Fixed-point fractional library routines.
+                                                             (line 1696)
+* __fractunssiusq:                       Fixed-point fractional library routines.
+                                                             (line 1691)
+* __fractunssiuta:                       Fixed-point fractional library routines.
+                                                             (line 1700)
+* __fractunssqdi:                        Fixed-point fractional library routines.
+                                                             (line 1534)
+* __fractunssqhi:                        Fixed-point fractional library routines.
+                                                             (line 1532)
+* __fractunssqqi:                        Fixed-point fractional library routines.
+                                                             (line 1531)
+* __fractunssqsi:                        Fixed-point fractional library routines.
+                                                             (line 1533)
+* __fractunssqti:                        Fixed-point fractional library routines.
+                                                             (line 1535)
+* __fractunstadi:                        Fixed-point fractional library routines.
+                                                             (line 1560)
+* __fractunstahi:                        Fixed-point fractional library routines.
+                                                             (line 1558)
+* __fractunstaqi:                        Fixed-point fractional library routines.
+                                                             (line 1557)
+* __fractunstasi:                        Fixed-point fractional library routines.
+                                                             (line 1559)
+* __fractunstati:                        Fixed-point fractional library routines.
+                                                             (line 1562)
+* __fractunstida:                        Fixed-point fractional library routines.
+                                                             (line 1730)
+* __fractunstidq:                        Fixed-point fractional library routines.
+                                                             (line 1727)
+* __fractunstiha:                        Fixed-point fractional library routines.
+                                                             (line 1728)
+* __fractunstihq:                        Fixed-point fractional library routines.
+                                                             (line 1724)
+* __fractunstiqq:                        Fixed-point fractional library routines.
+                                                             (line 1723)
+* __fractunstisa:                        Fixed-point fractional library routines.
+                                                             (line 1729)
+* __fractunstisq:                        Fixed-point fractional library routines.
+                                                             (line 1725)
+* __fractunstita:                        Fixed-point fractional library routines.
+                                                             (line 1732)
+* __fractunstiuda:                       Fixed-point fractional library routines.
+                                                             (line 1746)
+* __fractunstiudq:                       Fixed-point fractional library routines.
+                                                             (line 1740)
+* __fractunstiuha:                       Fixed-point fractional library routines.
+                                                             (line 1742)
+* __fractunstiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1736)
+* __fractunstiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1734)
+* __fractunstiusa:                       Fixed-point fractional library routines.
+                                                             (line 1744)
+* __fractunstiusq:                       Fixed-point fractional library routines.
+                                                             (line 1738)
+* __fractunstiuta:                       Fixed-point fractional library routines.
+                                                             (line 1748)
+* __fractunsudadi:                       Fixed-point fractional library routines.
+                                                             (line 1622)
+* __fractunsudahi:                       Fixed-point fractional library routines.
+                                                             (line 1618)
+* __fractunsudaqi:                       Fixed-point fractional library routines.
+                                                             (line 1616)
+* __fractunsudasi:                       Fixed-point fractional library routines.
+                                                             (line 1620)
+* __fractunsudati:                       Fixed-point fractional library routines.
+                                                             (line 1624)
+* __fractunsudqdi:                       Fixed-point fractional library routines.
+                                                             (line 1596)
+* __fractunsudqhi:                       Fixed-point fractional library routines.
+                                                             (line 1592)
+* __fractunsudqqi:                       Fixed-point fractional library routines.
+                                                             (line 1590)
+* __fractunsudqsi:                       Fixed-point fractional library routines.
+                                                             (line 1594)
+* __fractunsudqti:                       Fixed-point fractional library routines.
+                                                             (line 1598)
+* __fractunsuhadi:                       Fixed-point fractional library routines.
+                                                             (line 1606)
+* __fractunsuhahi:                       Fixed-point fractional library routines.
+                                                             (line 1602)
+* __fractunsuhaqi:                       Fixed-point fractional library routines.
+                                                             (line 1600)
+* __fractunsuhasi:                       Fixed-point fractional library routines.
+                                                             (line 1604)
+* __fractunsuhati:                       Fixed-point fractional library routines.
+                                                             (line 1608)
+* __fractunsuhqdi:                       Fixed-point fractional library routines.
+                                                             (line 1576)
+* __fractunsuhqhi:                       Fixed-point fractional library routines.
+                                                             (line 1574)
+* __fractunsuhqqi:                       Fixed-point fractional library routines.
+                                                             (line 1573)
+* __fractunsuhqsi:                       Fixed-point fractional library routines.
+                                                             (line 1575)
+* __fractunsuhqti:                       Fixed-point fractional library routines.
+                                                             (line 1578)
+* __fractunsuqqdi:                       Fixed-point fractional library routines.
+                                                             (line 1570)
+* __fractunsuqqhi:                       Fixed-point fractional library routines.
+                                                             (line 1566)
+* __fractunsuqqqi:                       Fixed-point fractional library routines.
+                                                             (line 1564)
+* __fractunsuqqsi:                       Fixed-point fractional library routines.
+                                                             (line 1568)
+* __fractunsuqqti:                       Fixed-point fractional library routines.
+                                                             (line 1572)
+* __fractunsusadi:                       Fixed-point fractional library routines.
+                                                             (line 1612)
+* __fractunsusahi:                       Fixed-point fractional library routines.
+                                                             (line 1610)
+* __fractunsusaqi:                       Fixed-point fractional library routines.
+                                                             (line 1609)
+* __fractunsusasi:                       Fixed-point fractional library routines.
+                                                             (line 1611)
+* __fractunsusati:                       Fixed-point fractional library routines.
+                                                             (line 1614)
+* __fractunsusqdi:                       Fixed-point fractional library routines.
+                                                             (line 1586)
+* __fractunsusqhi:                       Fixed-point fractional library routines.
+                                                             (line 1582)
+* __fractunsusqqi:                       Fixed-point fractional library routines.
+                                                             (line 1580)
+* __fractunsusqsi:                       Fixed-point fractional library routines.
+                                                             (line 1584)
+* __fractunsusqti:                       Fixed-point fractional library routines.
+                                                             (line 1588)
+* __fractunsutadi:                       Fixed-point fractional library routines.
+                                                             (line 1632)
+* __fractunsutahi:                       Fixed-point fractional library routines.
+                                                             (line 1628)
+* __fractunsutaqi:                       Fixed-point fractional library routines.
+                                                             (line 1626)
+* __fractunsutasi:                       Fixed-point fractional library routines.
+                                                             (line 1630)
+* __fractunsutati:                       Fixed-point fractional library routines.
+                                                             (line 1634)
+* __fractuqqda:                          Fixed-point fractional library routines.
+                                                             (line  672)
+* __fractuqqdf:                          Fixed-point fractional library routines.
+                                                             (line  695)
+* __fractuqqdi:                          Fixed-point fractional library routines.
+                                                             (line  692)
+* __fractuqqdq:                          Fixed-point fractional library routines.
+                                                             (line  669)
+* __fractuqqha:                          Fixed-point fractional library routines.
+                                                             (line  670)
+* __fractuqqhi:                          Fixed-point fractional library routines.
+                                                             (line  690)
+* __fractuqqhq:                          Fixed-point fractional library routines.
+                                                             (line  666)
+* __fractuqqqi:                          Fixed-point fractional library routines.
+                                                             (line  689)
+* __fractuqqqq:                          Fixed-point fractional library routines.
+                                                             (line  665)
+* __fractuqqsa:                          Fixed-point fractional library routines.
+                                                             (line  671)
+* __fractuqqsf:                          Fixed-point fractional library routines.
+                                                             (line  694)
+* __fractuqqsi:                          Fixed-point fractional library routines.
+                                                             (line  691)
+* __fractuqqsq:                          Fixed-point fractional library routines.
+                                                             (line  667)
+* __fractuqqta:                          Fixed-point fractional library routines.
+                                                             (line  674)
+* __fractuqqti:                          Fixed-point fractional library routines.
+                                                             (line  693)
+* __fractuqquda:                         Fixed-point fractional library routines.
+                                                             (line  686)
+* __fractuqqudq2:                        Fixed-point fractional library routines.
+                                                             (line  680)
+* __fractuqquha:                         Fixed-point fractional library routines.
+                                                             (line  682)
+* __fractuqquhq2:                        Fixed-point fractional library routines.
+                                                             (line  676)
+* __fractuqqusa:                         Fixed-point fractional library routines.
+                                                             (line  684)
+* __fractuqqusq2:                        Fixed-point fractional library routines.
+                                                             (line  678)
+* __fractuqquta:                         Fixed-point fractional library routines.
+                                                             (line  688)
+* __fractusada:                          Fixed-point fractional library routines.
+                                                             (line  829)
+* __fractusadf:                          Fixed-point fractional library routines.
+                                                             (line  850)
+* __fractusadi:                          Fixed-point fractional library routines.
+                                                             (line  847)
+* __fractusadq:                          Fixed-point fractional library routines.
+                                                             (line  826)
+* __fractusaha:                          Fixed-point fractional library routines.
+                                                             (line  827)
+* __fractusahi:                          Fixed-point fractional library routines.
+                                                             (line  845)
+* __fractusahq:                          Fixed-point fractional library routines.
+                                                             (line  824)
+* __fractusaqi:                          Fixed-point fractional library routines.
+                                                             (line  844)
+* __fractusaqq:                          Fixed-point fractional library routines.
+                                                             (line  823)
+* __fractusasa:                          Fixed-point fractional library routines.
+                                                             (line  828)
+* __fractusasf:                          Fixed-point fractional library routines.
+                                                             (line  849)
+* __fractusasi:                          Fixed-point fractional library routines.
+                                                             (line  846)
+* __fractusasq:                          Fixed-point fractional library routines.
+                                                             (line  825)
+* __fractusata:                          Fixed-point fractional library routines.
+                                                             (line  830)
+* __fractusati:                          Fixed-point fractional library routines.
+                                                             (line  848)
+* __fractusauda2:                        Fixed-point fractional library routines.
+                                                             (line  841)
+* __fractusaudq:                         Fixed-point fractional library routines.
+                                                             (line  837)
+* __fractusauha2:                        Fixed-point fractional library routines.
+                                                             (line  839)
+* __fractusauhq:                         Fixed-point fractional library routines.
+                                                             (line  833)
+* __fractusauqq:                         Fixed-point fractional library routines.
+                                                             (line  832)
+* __fractusausq:                         Fixed-point fractional library routines.
+                                                             (line  835)
+* __fractusauta2:                        Fixed-point fractional library routines.
+                                                             (line  843)
+* __fractusqda:                          Fixed-point fractional library routines.
+                                                             (line  731)
+* __fractusqdf:                          Fixed-point fractional library routines.
+                                                             (line  754)
+* __fractusqdi:                          Fixed-point fractional library routines.
+                                                             (line  751)
+* __fractusqdq:                          Fixed-point fractional library routines.
+                                                             (line  728)
+* __fractusqha:                          Fixed-point fractional library routines.
+                                                             (line  729)
+* __fractusqhi:                          Fixed-point fractional library routines.
+                                                             (line  749)
+* __fractusqhq:                          Fixed-point fractional library routines.
+                                                             (line  725)
+* __fractusqqi:                          Fixed-point fractional library routines.
+                                                             (line  748)
+* __fractusqqq:                          Fixed-point fractional library routines.
+                                                             (line  724)
+* __fractusqsa:                          Fixed-point fractional library routines.
+                                                             (line  730)
+* __fractusqsf:                          Fixed-point fractional library routines.
+                                                             (line  753)
+* __fractusqsi:                          Fixed-point fractional library routines.
+                                                             (line  750)
+* __fractusqsq:                          Fixed-point fractional library routines.
+                                                             (line  726)
+* __fractusqta:                          Fixed-point fractional library routines.
+                                                             (line  733)
+* __fractusqti:                          Fixed-point fractional library routines.
+                                                             (line  752)
+* __fractusquda:                         Fixed-point fractional library routines.
+                                                             (line  745)
+* __fractusqudq2:                        Fixed-point fractional library routines.
+                                                             (line  739)
+* __fractusquha:                         Fixed-point fractional library routines.
+                                                             (line  741)
+* __fractusquhq2:                        Fixed-point fractional library routines.
+                                                             (line  737)
+* __fractusquqq2:                        Fixed-point fractional library routines.
+                                                             (line  735)
+* __fractusqusa:                         Fixed-point fractional library routines.
+                                                             (line  743)
+* __fractusquta:                         Fixed-point fractional library routines.
+                                                             (line  747)
+* __fractutada:                          Fixed-point fractional library routines.
+                                                             (line  893)
+* __fractutadf:                          Fixed-point fractional library routines.
+                                                             (line  918)
+* __fractutadi:                          Fixed-point fractional library routines.
+                                                             (line  914)
+* __fractutadq:                          Fixed-point fractional library routines.
+                                                             (line  888)
+* __fractutaha:                          Fixed-point fractional library routines.
+                                                             (line  890)
+* __fractutahi:                          Fixed-point fractional library routines.
+                                                             (line  912)
+* __fractutahq:                          Fixed-point fractional library routines.
+                                                             (line  884)
+* __fractutaqi:                          Fixed-point fractional library routines.
+                                                             (line  911)
+* __fractutaqq:                          Fixed-point fractional library routines.
+                                                             (line  883)
+* __fractutasa:                          Fixed-point fractional library routines.
+                                                             (line  891)
+* __fractutasf:                          Fixed-point fractional library routines.
+                                                             (line  917)
+* __fractutasi:                          Fixed-point fractional library routines.
+                                                             (line  913)
+* __fractutasq:                          Fixed-point fractional library routines.
+                                                             (line  886)
+* __fractutata:                          Fixed-point fractional library routines.
+                                                             (line  895)
+* __fractutati:                          Fixed-point fractional library routines.
+                                                             (line  916)
+* __fractutauda2:                        Fixed-point fractional library routines.
+                                                             (line  909)
+* __fractutaudq:                         Fixed-point fractional library routines.
+                                                             (line  903)
+* __fractutauha2:                        Fixed-point fractional library routines.
+                                                             (line  905)
+* __fractutauhq:                         Fixed-point fractional library routines.
+                                                             (line  899)
+* __fractutauqq:                         Fixed-point fractional library routines.
+                                                             (line  897)
+* __fractutausa2:                        Fixed-point fractional library routines.
+                                                             (line  907)
+* __fractutausq:                         Fixed-point fractional library routines.
+                                                             (line  901)
+* __gedf2:                               Soft float library routines.
+                                                             (line  206)
+* __gesf2:                               Soft float library routines.
+                                                             (line  205)
+* __getf2:                               Soft float library routines.
+                                                             (line  207)
+* __gtdf2:                               Soft float library routines.
+                                                             (line  224)
+* __gtsf2:                               Soft float library routines.
+                                                             (line  223)
+* __gttf2:                               Soft float library routines.
+                                                             (line  225)
+* __ledf2:                               Soft float library routines.
+                                                             (line  218)
+* __lesf2:                               Soft float library routines.
+                                                             (line  217)
+* __letf2:                               Soft float library routines.
+                                                             (line  219)
+* __lshrdi3:                             Integer library routines.
+                                                             (line   31)
+* __lshrsi3:                             Integer library routines.
+                                                             (line   30)
+* __lshrti3:                             Integer library routines.
+                                                             (line   32)
+* __lshruda3:                            Fixed-point fractional library routines.
+                                                             (line  390)
+* __lshrudq3:                            Fixed-point fractional library routines.
+                                                             (line  384)
+* __lshruha3:                            Fixed-point fractional library routines.
+                                                             (line  386)
+* __lshruhq3:                            Fixed-point fractional library routines.
+                                                             (line  380)
+* __lshruqq3:                            Fixed-point fractional library routines.
+                                                             (line  378)
+* __lshrusa3:                            Fixed-point fractional library routines.
+                                                             (line  388)
+* __lshrusq3:                            Fixed-point fractional library routines.
+                                                             (line  382)
+* __lshruta3:                            Fixed-point fractional library routines.
+                                                             (line  392)
+* __ltdf2:                               Soft float library routines.
+                                                             (line  212)
+* __ltsf2:                               Soft float library routines.
+                                                             (line  211)
+* __lttf2:                               Soft float library routines.
+                                                             (line  213)
+* __main:                                Collect2.           (line   15)
+* __moddi3:                              Integer library routines.
+                                                             (line   37)
+* __modsi3:                              Integer library routines.
+                                                             (line   36)
+* __modti3:                              Integer library routines.
+                                                             (line   38)
+* __mulda3:                              Fixed-point fractional library routines.
+                                                             (line  171)
+* __muldc3:                              Soft float library routines.
+                                                             (line  241)
+* __muldf3:                              Soft float library routines.
+                                                             (line   40)
+* __muldi3:                              Integer library routines.
+                                                             (line   43)
+* __muldq3:                              Fixed-point fractional library routines.
+                                                             (line  159)
+* __mulha3:                              Fixed-point fractional library routines.
+                                                             (line  169)
+* __mulhq3:                              Fixed-point fractional library routines.
+                                                             (line  156)
+* __mulqq3:                              Fixed-point fractional library routines.
+                                                             (line  155)
+* __mulsa3:                              Fixed-point fractional library routines.
+                                                             (line  170)
+* __mulsc3:                              Soft float library routines.
+                                                             (line  239)
+* __mulsf3:                              Soft float library routines.
+                                                             (line   39)
+* __mulsi3:                              Integer library routines.
+                                                             (line   42)
+* __mulsq3:                              Fixed-point fractional library routines.
+                                                             (line  157)
+* __multa3:                              Fixed-point fractional library routines.
+                                                             (line  173)
+* __multc3:                              Soft float library routines.
+                                                             (line  243)
+* __multf3:                              Soft float library routines.
+                                                             (line   42)
+* __multi3:                              Integer library routines.
+                                                             (line   44)
+* __muluda3:                             Fixed-point fractional library routines.
+                                                             (line  179)
+* __muludq3:                             Fixed-point fractional library routines.
+                                                             (line  167)
+* __muluha3:                             Fixed-point fractional library routines.
+                                                             (line  175)
+* __muluhq3:                             Fixed-point fractional library routines.
+                                                             (line  163)
+* __muluqq3:                             Fixed-point fractional library routines.
+                                                             (line  161)
+* __mulusa3:                             Fixed-point fractional library routines.
+                                                             (line  177)
+* __mulusq3:                             Fixed-point fractional library routines.
+                                                             (line  165)
+* __muluta3:                             Fixed-point fractional library routines.
+                                                             (line  181)
+* __mulvdi3:                             Integer library routines.
+                                                             (line  115)
+* __mulvsi3:                             Integer library routines.
+                                                             (line  114)
+* __mulxc3:                              Soft float library routines.
+                                                             (line  245)
+* __mulxf3:                              Soft float library routines.
+                                                             (line   44)
+* __nedf2:                               Soft float library routines.
+                                                             (line  200)
+* __negda2:                              Fixed-point fractional library routines.
+                                                             (line  299)
+* __negdf2:                              Soft float library routines.
+                                                             (line   56)
+* __negdi2:                              Integer library routines.
+                                                             (line   47)
+* __negdq2:                              Fixed-point fractional library routines.
+                                                             (line  289)
+* __negha2:                              Fixed-point fractional library routines.
+                                                             (line  297)
+* __neghq2:                              Fixed-point fractional library routines.
+                                                             (line  287)
+* __negqq2:                              Fixed-point fractional library routines.
+                                                             (line  286)
+* __negsa2:                              Fixed-point fractional library routines.
+                                                             (line  298)
+* __negsf2:                              Soft float library routines.
+                                                             (line   55)
+* __negsq2:                              Fixed-point fractional library routines.
+                                                             (line  288)
+* __negta2:                              Fixed-point fractional library routines.
+                                                             (line  300)
+* __negtf2:                              Soft float library routines.
+                                                             (line   57)
+* __negti2:                              Integer library routines.
+                                                             (line   48)
+* __neguda2:                             Fixed-point fractional library routines.
+                                                             (line  305)
+* __negudq2:                             Fixed-point fractional library routines.
+                                                             (line  296)
+* __neguha2:                             Fixed-point fractional library routines.
+                                                             (line  302)
+* __neguhq2:                             Fixed-point fractional library routines.
+                                                             (line  292)
+* __neguqq2:                             Fixed-point fractional library routines.
+                                                             (line  291)
+* __negusa2:                             Fixed-point fractional library routines.
+                                                             (line  303)
+* __negusq2:                             Fixed-point fractional library routines.
+                                                             (line  294)
+* __neguta2:                             Fixed-point fractional library routines.
+                                                             (line  307)
+* __negvdi2:                             Integer library routines.
+                                                             (line  119)
+* __negvsi2:                             Integer library routines.
+                                                             (line  118)
+* __negxf2:                              Soft float library routines.
+                                                             (line   58)
+* __nesf2:                               Soft float library routines.
+                                                             (line  199)
+* __netf2:                               Soft float library routines.
+                                                             (line  201)
+* __paritydi2:                           Integer library routines.
+                                                             (line  151)
+* __paritysi2:                           Integer library routines.
+                                                             (line  150)
+* __parityti2:                           Integer library routines.
+                                                             (line  152)
+* __popcountdi2:                         Integer library routines.
+                                                             (line  157)
+* __popcountsi2:                         Integer library routines.
+                                                             (line  156)
+* __popcountti2:                         Integer library routines.
+                                                             (line  158)
+* __powidf2:                             Soft float library routines.
+                                                             (line  233)
+* __powisf2:                             Soft float library routines.
+                                                             (line  232)
+* __powitf2:                             Soft float library routines.
+                                                             (line  234)
+* __powixf2:                             Soft float library routines.
+                                                             (line  235)
+* __satfractdadq:                        Fixed-point fractional library routines.
+                                                             (line 1153)
+* __satfractdaha2:                       Fixed-point fractional library routines.
+                                                             (line 1154)
+* __satfractdahq:                        Fixed-point fractional library routines.
+                                                             (line 1151)
+* __satfractdaqq:                        Fixed-point fractional library routines.
+                                                             (line 1150)
+* __satfractdasa2:                       Fixed-point fractional library routines.
+                                                             (line 1155)
+* __satfractdasq:                        Fixed-point fractional library routines.
+                                                             (line 1152)
+* __satfractdata2:                       Fixed-point fractional library routines.
+                                                             (line 1156)
+* __satfractdauda:                       Fixed-point fractional library routines.
+                                                             (line 1166)
+* __satfractdaudq:                       Fixed-point fractional library routines.
+                                                             (line 1162)
+* __satfractdauha:                       Fixed-point fractional library routines.
+                                                             (line 1164)
+* __satfractdauhq:                       Fixed-point fractional library routines.
+                                                             (line 1159)
+* __satfractdauqq:                       Fixed-point fractional library routines.
+                                                             (line 1158)
+* __satfractdausa:                       Fixed-point fractional library routines.
+                                                             (line 1165)
+* __satfractdausq:                       Fixed-point fractional library routines.
+                                                             (line 1160)
+* __satfractdauta:                       Fixed-point fractional library routines.
+                                                             (line 1168)
+* __satfractdfda:                        Fixed-point fractional library routines.
+                                                             (line 1506)
+* __satfractdfdq:                        Fixed-point fractional library routines.
+                                                             (line 1503)
+* __satfractdfha:                        Fixed-point fractional library routines.
+                                                             (line 1504)
+* __satfractdfhq:                        Fixed-point fractional library routines.
+                                                             (line 1501)
+* __satfractdfqq:                        Fixed-point fractional library routines.
+                                                             (line 1500)
+* __satfractdfsa:                        Fixed-point fractional library routines.
+                                                             (line 1505)
+* __satfractdfsq:                        Fixed-point fractional library routines.
+                                                             (line 1502)
+* __satfractdfta:                        Fixed-point fractional library routines.
+                                                             (line 1507)
+* __satfractdfuda:                       Fixed-point fractional library routines.
+                                                             (line 1515)
+* __satfractdfudq:                       Fixed-point fractional library routines.
+                                                             (line 1512)
+* __satfractdfuha:                       Fixed-point fractional library routines.
+                                                             (line 1513)
+* __satfractdfuhq:                       Fixed-point fractional library routines.
+                                                             (line 1509)
+* __satfractdfuqq:                       Fixed-point fractional library routines.
+                                                             (line 1508)
+* __satfractdfusa:                       Fixed-point fractional library routines.
+                                                             (line 1514)
+* __satfractdfusq:                       Fixed-point fractional library routines.
+                                                             (line 1510)
+* __satfractdfuta:                       Fixed-point fractional library routines.
+                                                             (line 1517)
+* __satfractdida:                        Fixed-point fractional library routines.
+                                                             (line 1456)
+* __satfractdidq:                        Fixed-point fractional library routines.
+                                                             (line 1453)
+* __satfractdiha:                        Fixed-point fractional library routines.
+                                                             (line 1454)
+* __satfractdihq:                        Fixed-point fractional library routines.
+                                                             (line 1451)
+* __satfractdiqq:                        Fixed-point fractional library routines.
+                                                             (line 1450)
+* __satfractdisa:                        Fixed-point fractional library routines.
+                                                             (line 1455)
+* __satfractdisq:                        Fixed-point fractional library routines.
+                                                             (line 1452)
+* __satfractdita:                        Fixed-point fractional library routines.
+                                                             (line 1457)
+* __satfractdiuda:                       Fixed-point fractional library routines.
+                                                             (line 1464)
+* __satfractdiudq:                       Fixed-point fractional library routines.
+                                                             (line 1461)
+* __satfractdiuha:                       Fixed-point fractional library routines.
+                                                             (line 1462)
+* __satfractdiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1459)
+* __satfractdiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1458)
+* __satfractdiusa:                       Fixed-point fractional library routines.
+                                                             (line 1463)
+* __satfractdiusq:                       Fixed-point fractional library routines.
+                                                             (line 1460)
+* __satfractdiuta:                       Fixed-point fractional library routines.
+                                                             (line 1465)
+* __satfractdqda:                        Fixed-point fractional library routines.
+                                                             (line 1098)
+* __satfractdqha:                        Fixed-point fractional library routines.
+                                                             (line 1096)
+* __satfractdqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1094)
+* __satfractdqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1093)
+* __satfractdqsa:                        Fixed-point fractional library routines.
+                                                             (line 1097)
+* __satfractdqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1095)
+* __satfractdqta:                        Fixed-point fractional library routines.
+                                                             (line 1099)
+* __satfractdquda:                       Fixed-point fractional library routines.
+                                                             (line 1111)
+* __satfractdqudq:                       Fixed-point fractional library routines.
+                                                             (line 1106)
+* __satfractdquha:                       Fixed-point fractional library routines.
+                                                             (line 1108)
+* __satfractdquhq:                       Fixed-point fractional library routines.
+                                                             (line 1102)
+* __satfractdquqq:                       Fixed-point fractional library routines.
+                                                             (line 1101)
+* __satfractdqusa:                       Fixed-point fractional library routines.
+                                                             (line 1109)
+* __satfractdqusq:                       Fixed-point fractional library routines.
+                                                             (line 1104)
+* __satfractdquta:                       Fixed-point fractional library routines.
+                                                             (line 1113)
+* __satfracthada2:                       Fixed-point fractional library routines.
+                                                             (line 1119)
+* __satfracthadq:                        Fixed-point fractional library routines.
+                                                             (line 1117)
+* __satfracthahq:                        Fixed-point fractional library routines.
+                                                             (line 1115)
+* __satfracthaqq:                        Fixed-point fractional library routines.
+                                                             (line 1114)
+* __satfracthasa2:                       Fixed-point fractional library routines.
+                                                             (line 1118)
+* __satfracthasq:                        Fixed-point fractional library routines.
+                                                             (line 1116)
+* __satfracthata2:                       Fixed-point fractional library routines.
+                                                             (line 1120)
+* __satfracthauda:                       Fixed-point fractional library routines.
+                                                             (line 1132)
+* __satfracthaudq:                       Fixed-point fractional library routines.
+                                                             (line 1127)
+* __satfracthauha:                       Fixed-point fractional library routines.
+                                                             (line 1129)
+* __satfracthauhq:                       Fixed-point fractional library routines.
+                                                             (line 1123)
+* __satfracthauqq:                       Fixed-point fractional library routines.
+                                                             (line 1122)
+* __satfracthausa:                       Fixed-point fractional library routines.
+                                                             (line 1130)
+* __satfracthausq:                       Fixed-point fractional library routines.
+                                                             (line 1125)
+* __satfracthauta:                       Fixed-point fractional library routines.
+                                                             (line 1134)
+* __satfracthida:                        Fixed-point fractional library routines.
+                                                             (line 1424)
+* __satfracthidq:                        Fixed-point fractional library routines.
+                                                             (line 1421)
+* __satfracthiha:                        Fixed-point fractional library routines.
+                                                             (line 1422)
+* __satfracthihq:                        Fixed-point fractional library routines.
+                                                             (line 1419)
+* __satfracthiqq:                        Fixed-point fractional library routines.
+                                                             (line 1418)
+* __satfracthisa:                        Fixed-point fractional library routines.
+                                                             (line 1423)
+* __satfracthisq:                        Fixed-point fractional library routines.
+                                                             (line 1420)
+* __satfracthita:                        Fixed-point fractional library routines.
+                                                             (line 1425)
+* __satfracthiuda:                       Fixed-point fractional library routines.
+                                                             (line 1432)
+* __satfracthiudq:                       Fixed-point fractional library routines.
+                                                             (line 1429)
+* __satfracthiuha:                       Fixed-point fractional library routines.
+                                                             (line 1430)
+* __satfracthiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1427)
+* __satfracthiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1426)
+* __satfracthiusa:                       Fixed-point fractional library routines.
+                                                             (line 1431)
+* __satfracthiusq:                       Fixed-point fractional library routines.
+                                                             (line 1428)
+* __satfracthiuta:                       Fixed-point fractional library routines.
+                                                             (line 1433)
+* __satfracthqda:                        Fixed-point fractional library routines.
+                                                             (line 1064)
+* __satfracthqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1061)
+* __satfracthqha:                        Fixed-point fractional library routines.
+                                                             (line 1062)
+* __satfracthqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1059)
+* __satfracthqsa:                        Fixed-point fractional library routines.
+                                                             (line 1063)
+* __satfracthqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1060)
+* __satfracthqta:                        Fixed-point fractional library routines.
+                                                             (line 1065)
+* __satfracthquda:                       Fixed-point fractional library routines.
+                                                             (line 1072)
+* __satfracthqudq:                       Fixed-point fractional library routines.
+                                                             (line 1069)
+* __satfracthquha:                       Fixed-point fractional library routines.
+                                                             (line 1070)
+* __satfracthquhq:                       Fixed-point fractional library routines.
+                                                             (line 1067)
+* __satfracthquqq:                       Fixed-point fractional library routines.
+                                                             (line 1066)
+* __satfracthqusa:                       Fixed-point fractional library routines.
+                                                             (line 1071)
+* __satfracthqusq:                       Fixed-point fractional library routines.
+                                                             (line 1068)
+* __satfracthquta:                       Fixed-point fractional library routines.
+                                                             (line 1073)
+* __satfractqida:                        Fixed-point fractional library routines.
+                                                             (line 1402)
+* __satfractqidq:                        Fixed-point fractional library routines.
+                                                             (line 1399)
+* __satfractqiha:                        Fixed-point fractional library routines.
+                                                             (line 1400)
+* __satfractqihq:                        Fixed-point fractional library routines.
+                                                             (line 1397)
+* __satfractqiqq:                        Fixed-point fractional library routines.
+                                                             (line 1396)
+* __satfractqisa:                        Fixed-point fractional library routines.
+                                                             (line 1401)
+* __satfractqisq:                        Fixed-point fractional library routines.
+                                                             (line 1398)
+* __satfractqita:                        Fixed-point fractional library routines.
+                                                             (line 1403)
+* __satfractqiuda:                       Fixed-point fractional library routines.
+                                                             (line 1415)
+* __satfractqiudq:                       Fixed-point fractional library routines.
+                                                             (line 1410)
+* __satfractqiuha:                       Fixed-point fractional library routines.
+                                                             (line 1412)
+* __satfractqiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1406)
+* __satfractqiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1405)
+* __satfractqiusa:                       Fixed-point fractional library routines.
+                                                             (line 1413)
+* __satfractqiusq:                       Fixed-point fractional library routines.
+                                                             (line 1408)
+* __satfractqiuta:                       Fixed-point fractional library routines.
+                                                             (line 1417)
+* __satfractqqda:                        Fixed-point fractional library routines.
+                                                             (line 1043)
+* __satfractqqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1040)
+* __satfractqqha:                        Fixed-point fractional library routines.
+                                                             (line 1041)
+* __satfractqqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1038)
+* __satfractqqsa:                        Fixed-point fractional library routines.
+                                                             (line 1042)
+* __satfractqqsq2:                       Fixed-point fractional library routines.
+                                                             (line 1039)
+* __satfractqqta:                        Fixed-point fractional library routines.
+                                                             (line 1044)
+* __satfractqquda:                       Fixed-point fractional library routines.
+                                                             (line 1056)
+* __satfractqqudq:                       Fixed-point fractional library routines.
+                                                             (line 1051)
+* __satfractqquha:                       Fixed-point fractional library routines.
+                                                             (line 1053)
+* __satfractqquhq:                       Fixed-point fractional library routines.
+                                                             (line 1047)
+* __satfractqquqq:                       Fixed-point fractional library routines.
+                                                             (line 1046)
+* __satfractqqusa:                       Fixed-point fractional library routines.
+                                                             (line 1054)
+* __satfractqqusq:                       Fixed-point fractional library routines.
+                                                             (line 1049)
+* __satfractqquta:                       Fixed-point fractional library routines.
+                                                             (line 1058)
+* __satfractsada2:                       Fixed-point fractional library routines.
+                                                             (line 1140)
+* __satfractsadq:                        Fixed-point fractional library routines.
+                                                             (line 1138)
+* __satfractsaha2:                       Fixed-point fractional library routines.
+                                                             (line 1139)
+* __satfractsahq:                        Fixed-point fractional library routines.
+                                                             (line 1136)
+* __satfractsaqq:                        Fixed-point fractional library routines.
+                                                             (line 1135)
+* __satfractsasq:                        Fixed-point fractional library routines.
+                                                             (line 1137)
+* __satfractsata2:                       Fixed-point fractional library routines.
+                                                             (line 1141)
+* __satfractsauda:                       Fixed-point fractional library routines.
+                                                             (line 1148)
+* __satfractsaudq:                       Fixed-point fractional library routines.
+                                                             (line 1145)
+* __satfractsauha:                       Fixed-point fractional library routines.
+                                                             (line 1146)
+* __satfractsauhq:                       Fixed-point fractional library routines.
+                                                             (line 1143)
+* __satfractsauqq:                       Fixed-point fractional library routines.
+                                                             (line 1142)
+* __satfractsausa:                       Fixed-point fractional library routines.
+                                                             (line 1147)
+* __satfractsausq:                       Fixed-point fractional library routines.
+                                                             (line 1144)
+* __satfractsauta:                       Fixed-point fractional library routines.
+                                                             (line 1149)
+* __satfractsfda:                        Fixed-point fractional library routines.
+                                                             (line 1490)
+* __satfractsfdq:                        Fixed-point fractional library routines.
+                                                             (line 1487)
+* __satfractsfha:                        Fixed-point fractional library routines.
+                                                             (line 1488)
+* __satfractsfhq:                        Fixed-point fractional library routines.
+                                                             (line 1485)
+* __satfractsfqq:                        Fixed-point fractional library routines.
+                                                             (line 1484)
+* __satfractsfsa:                        Fixed-point fractional library routines.
+                                                             (line 1489)
+* __satfractsfsq:                        Fixed-point fractional library routines.
+                                                             (line 1486)
+* __satfractsfta:                        Fixed-point fractional library routines.
+                                                             (line 1491)
+* __satfractsfuda:                       Fixed-point fractional library routines.
+                                                             (line 1498)
+* __satfractsfudq:                       Fixed-point fractional library routines.
+                                                             (line 1495)
+* __satfractsfuha:                       Fixed-point fractional library routines.
+                                                             (line 1496)
+* __satfractsfuhq:                       Fixed-point fractional library routines.
+                                                             (line 1493)
+* __satfractsfuqq:                       Fixed-point fractional library routines.
+                                                             (line 1492)
+* __satfractsfusa:                       Fixed-point fractional library routines.
+                                                             (line 1497)
+* __satfractsfusq:                       Fixed-point fractional library routines.
+                                                             (line 1494)
+* __satfractsfuta:                       Fixed-point fractional library routines.
+                                                             (line 1499)
+* __satfractsida:                        Fixed-point fractional library routines.
+                                                             (line 1440)
+* __satfractsidq:                        Fixed-point fractional library routines.
+                                                             (line 1437)
+* __satfractsiha:                        Fixed-point fractional library routines.
+                                                             (line 1438)
+* __satfractsihq:                        Fixed-point fractional library routines.
+                                                             (line 1435)
+* __satfractsiqq:                        Fixed-point fractional library routines.
+                                                             (line 1434)
+* __satfractsisa:                        Fixed-point fractional library routines.
+                                                             (line 1439)
+* __satfractsisq:                        Fixed-point fractional library routines.
+                                                             (line 1436)
+* __satfractsita:                        Fixed-point fractional library routines.
+                                                             (line 1441)
+* __satfractsiuda:                       Fixed-point fractional library routines.
+                                                             (line 1448)
+* __satfractsiudq:                       Fixed-point fractional library routines.
+                                                             (line 1445)
+* __satfractsiuha:                       Fixed-point fractional library routines.
+                                                             (line 1446)
+* __satfractsiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1443)
+* __satfractsiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1442)
+* __satfractsiusa:                       Fixed-point fractional library routines.
+                                                             (line 1447)
+* __satfractsiusq:                       Fixed-point fractional library routines.
+                                                             (line 1444)
+* __satfractsiuta:                       Fixed-point fractional library routines.
+                                                             (line 1449)
+* __satfractsqda:                        Fixed-point fractional library routines.
+                                                             (line 1079)
+* __satfractsqdq2:                       Fixed-point fractional library routines.
+                                                             (line 1076)
+* __satfractsqha:                        Fixed-point fractional library routines.
+                                                             (line 1077)
+* __satfractsqhq2:                       Fixed-point fractional library routines.
+                                                             (line 1075)
+* __satfractsqqq2:                       Fixed-point fractional library routines.
+                                                             (line 1074)
+* __satfractsqsa:                        Fixed-point fractional library routines.
+                                                             (line 1078)
+* __satfractsqta:                        Fixed-point fractional library routines.
+                                                             (line 1080)
+* __satfractsquda:                       Fixed-point fractional library routines.
+                                                             (line 1090)
+* __satfractsqudq:                       Fixed-point fractional library routines.
+                                                             (line 1086)
+* __satfractsquha:                       Fixed-point fractional library routines.
+                                                             (line 1088)
+* __satfractsquhq:                       Fixed-point fractional library routines.
+                                                             (line 1083)
+* __satfractsquqq:                       Fixed-point fractional library routines.
+                                                             (line 1082)
+* __satfractsqusa:                       Fixed-point fractional library routines.
+                                                             (line 1089)
+* __satfractsqusq:                       Fixed-point fractional library routines.
+                                                             (line 1084)
+* __satfractsquta:                       Fixed-point fractional library routines.
+                                                             (line 1092)
+* __satfracttada2:                       Fixed-point fractional library routines.
+                                                             (line 1175)
+* __satfracttadq:                        Fixed-point fractional library routines.
+                                                             (line 1172)
+* __satfracttaha2:                       Fixed-point fractional library routines.
+                                                             (line 1173)
+* __satfracttahq:                        Fixed-point fractional library routines.
+                                                             (line 1170)
+* __satfracttaqq:                        Fixed-point fractional library routines.
+                                                             (line 1169)
+* __satfracttasa2:                       Fixed-point fractional library routines.
+                                                             (line 1174)
+* __satfracttasq:                        Fixed-point fractional library routines.
+                                                             (line 1171)
+* __satfracttauda:                       Fixed-point fractional library routines.
+                                                             (line 1187)
+* __satfracttaudq:                       Fixed-point fractional library routines.
+                                                             (line 1182)
+* __satfracttauha:                       Fixed-point fractional library routines.
+                                                             (line 1184)
+* __satfracttauhq:                       Fixed-point fractional library routines.
+                                                             (line 1178)
+* __satfracttauqq:                       Fixed-point fractional library routines.
+                                                             (line 1177)
+* __satfracttausa:                       Fixed-point fractional library routines.
+                                                             (line 1185)
+* __satfracttausq:                       Fixed-point fractional library routines.
+                                                             (line 1180)
+* __satfracttauta:                       Fixed-point fractional library routines.
+                                                             (line 1189)
+* __satfracttida:                        Fixed-point fractional library routines.
+                                                             (line 1472)
+* __satfracttidq:                        Fixed-point fractional library routines.
+                                                             (line 1469)
+* __satfracttiha:                        Fixed-point fractional library routines.
+                                                             (line 1470)
+* __satfracttihq:                        Fixed-point fractional library routines.
+                                                             (line 1467)
+* __satfracttiqq:                        Fixed-point fractional library routines.
+                                                             (line 1466)
+* __satfracttisa:                        Fixed-point fractional library routines.
+                                                             (line 1471)
+* __satfracttisq:                        Fixed-point fractional library routines.
+                                                             (line 1468)
+* __satfracttita:                        Fixed-point fractional library routines.
+                                                             (line 1473)
+* __satfracttiuda:                       Fixed-point fractional library routines.
+                                                             (line 1481)
+* __satfracttiudq:                       Fixed-point fractional library routines.
+                                                             (line 1478)
+* __satfracttiuha:                       Fixed-point fractional library routines.
+                                                             (line 1479)
+* __satfracttiuhq:                       Fixed-point fractional library routines.
+                                                             (line 1475)
+* __satfracttiuqq:                       Fixed-point fractional library routines.
+                                                             (line 1474)
+* __satfracttiusa:                       Fixed-point fractional library routines.
+                                                             (line 1480)
+* __satfracttiusq:                       Fixed-point fractional library routines.
+                                                             (line 1476)
+* __satfracttiuta:                       Fixed-point fractional library routines.
+                                                             (line 1483)
+* __satfractudada:                       Fixed-point fractional library routines.
+                                                             (line 1351)
+* __satfractudadq:                       Fixed-point fractional library routines.
+                                                             (line 1347)
+* __satfractudaha:                       Fixed-point fractional library routines.
+                                                             (line 1349)
+* __satfractudahq:                       Fixed-point fractional library routines.
+                                                             (line 1344)
+* __satfractudaqq:                       Fixed-point fractional library routines.
+                                                             (line 1343)
+* __satfractudasa:                       Fixed-point fractional library routines.
+                                                             (line 1350)
+* __satfractudasq:                       Fixed-point fractional library routines.
+                                                             (line 1345)
+* __satfractudata:                       Fixed-point fractional library routines.
+                                                             (line 1353)
+* __satfractudaudq:                      Fixed-point fractional library routines.
+                                                             (line 1361)
+* __satfractudauha2:                     Fixed-point fractional library routines.
+                                                             (line 1363)
+* __satfractudauhq:                      Fixed-point fractional library routines.
+                                                             (line 1357)
+* __satfractudauqq:                      Fixed-point fractional library routines.
+                                                             (line 1355)
+* __satfractudausa2:                     Fixed-point fractional library routines.
+                                                             (line 1365)
+* __satfractudausq:                      Fixed-point fractional library routines.
+                                                             (line 1359)
+* __satfractudauta2:                     Fixed-point fractional library routines.
+                                                             (line 1367)
+* __satfractudqda:                       Fixed-point fractional library routines.
+                                                             (line 1276)
+* __satfractudqdq:                       Fixed-point fractional library routines.
+                                                             (line 1271)
+* __satfractudqha:                       Fixed-point fractional library routines.
+                                                             (line 1273)
+* __satfractudqhq:                       Fixed-point fractional library routines.
+                                                             (line 1267)
+* __satfractudqqq:                       Fixed-point fractional library routines.
+                                                             (line 1266)
+* __satfractudqsa:                       Fixed-point fractional library routines.
+                                                             (line 1274)
+* __satfractudqsq:                       Fixed-point fractional library routines.
+                                                             (line 1269)
+* __satfractudqta:                       Fixed-point fractional library routines.
+                                                             (line 1278)
+* __satfractudquda:                      Fixed-point fractional library routines.
+                                                             (line 1290)
+* __satfractudquha:                      Fixed-point fractional library routines.
+                                                             (line 1286)
+* __satfractudquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1282)
+* __satfractudquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1280)
+* __satfractudqusa:                      Fixed-point fractional library routines.
+                                                             (line 1288)
+* __satfractudqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1284)
+* __satfractudquta:                      Fixed-point fractional library routines.
+                                                             (line 1292)
+* __satfractuhada:                       Fixed-point fractional library routines.
+                                                             (line 1304)
+* __satfractuhadq:                       Fixed-point fractional library routines.
+                                                             (line 1299)
+* __satfractuhaha:                       Fixed-point fractional library routines.
+                                                             (line 1301)
+* __satfractuhahq:                       Fixed-point fractional library routines.
+                                                             (line 1295)
+* __satfractuhaqq:                       Fixed-point fractional library routines.
+                                                             (line 1294)
+* __satfractuhasa:                       Fixed-point fractional library routines.
+                                                             (line 1302)
+* __satfractuhasq:                       Fixed-point fractional library routines.
+                                                             (line 1297)
+* __satfractuhata:                       Fixed-point fractional library routines.
+                                                             (line 1306)
+* __satfractuhauda2:                     Fixed-point fractional library routines.
+                                                             (line 1318)
+* __satfractuhaudq:                      Fixed-point fractional library routines.
+                                                             (line 1314)
+* __satfractuhauhq:                      Fixed-point fractional library routines.
+                                                             (line 1310)
+* __satfractuhauqq:                      Fixed-point fractional library routines.
+                                                             (line 1308)
+* __satfractuhausa2:                     Fixed-point fractional library routines.
+                                                             (line 1316)
+* __satfractuhausq:                      Fixed-point fractional library routines.
+                                                             (line 1312)
+* __satfractuhauta2:                     Fixed-point fractional library routines.
+                                                             (line 1320)
+* __satfractuhqda:                       Fixed-point fractional library routines.
+                                                             (line 1224)
+* __satfractuhqdq:                       Fixed-point fractional library routines.
+                                                             (line 1221)
+* __satfractuhqha:                       Fixed-point fractional library routines.
+                                                             (line 1222)
+* __satfractuhqhq:                       Fixed-point fractional library routines.
+                                                             (line 1219)
+* __satfractuhqqq:                       Fixed-point fractional library routines.
+                                                             (line 1218)
+* __satfractuhqsa:                       Fixed-point fractional library routines.
+                                                             (line 1223)
+* __satfractuhqsq:                       Fixed-point fractional library routines.
+                                                             (line 1220)
+* __satfractuhqta:                       Fixed-point fractional library routines.
+                                                             (line 1225)
+* __satfractuhquda:                      Fixed-point fractional library routines.
+                                                             (line 1236)
+* __satfractuhqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1231)
+* __satfractuhquha:                      Fixed-point fractional library routines.
+                                                             (line 1233)
+* __satfractuhquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1227)
+* __satfractuhqusa:                      Fixed-point fractional library routines.
+                                                             (line 1234)
+* __satfractuhqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1229)
+* __satfractuhquta:                      Fixed-point fractional library routines.
+                                                             (line 1238)
+* __satfractunsdida:                     Fixed-point fractional library routines.
+                                                             (line 1834)
+* __satfractunsdidq:                     Fixed-point fractional library routines.
+                                                             (line 1831)
+* __satfractunsdiha:                     Fixed-point fractional library routines.
+                                                             (line 1832)
+* __satfractunsdihq:                     Fixed-point fractional library routines.
+                                                             (line 1828)
+* __satfractunsdiqq:                     Fixed-point fractional library routines.
+                                                             (line 1827)
+* __satfractunsdisa:                     Fixed-point fractional library routines.
+                                                             (line 1833)
+* __satfractunsdisq:                     Fixed-point fractional library routines.
+                                                             (line 1829)
+* __satfractunsdita:                     Fixed-point fractional library routines.
+                                                             (line 1836)
+* __satfractunsdiuda:                    Fixed-point fractional library routines.
+                                                             (line 1850)
+* __satfractunsdiudq:                    Fixed-point fractional library routines.
+                                                             (line 1844)
+* __satfractunsdiuha:                    Fixed-point fractional library routines.
+                                                             (line 1846)
+* __satfractunsdiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1840)
+* __satfractunsdiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1838)
+* __satfractunsdiusa:                    Fixed-point fractional library routines.
+                                                             (line 1848)
+* __satfractunsdiusq:                    Fixed-point fractional library routines.
+                                                             (line 1842)
+* __satfractunsdiuta:                    Fixed-point fractional library routines.
+                                                             (line 1852)
+* __satfractunshida:                     Fixed-point fractional library routines.
+                                                             (line 1786)
+* __satfractunshidq:                     Fixed-point fractional library routines.
+                                                             (line 1783)
+* __satfractunshiha:                     Fixed-point fractional library routines.
+                                                             (line 1784)
+* __satfractunshihq:                     Fixed-point fractional library routines.
+                                                             (line 1780)
+* __satfractunshiqq:                     Fixed-point fractional library routines.
+                                                             (line 1779)
+* __satfractunshisa:                     Fixed-point fractional library routines.
+                                                             (line 1785)
+* __satfractunshisq:                     Fixed-point fractional library routines.
+                                                             (line 1781)
+* __satfractunshita:                     Fixed-point fractional library routines.
+                                                             (line 1788)
+* __satfractunshiuda:                    Fixed-point fractional library routines.
+                                                             (line 1802)
+* __satfractunshiudq:                    Fixed-point fractional library routines.
+                                                             (line 1796)
+* __satfractunshiuha:                    Fixed-point fractional library routines.
+                                                             (line 1798)
+* __satfractunshiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1792)
+* __satfractunshiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1790)
+* __satfractunshiusa:                    Fixed-point fractional library routines.
+                                                             (line 1800)
+* __satfractunshiusq:                    Fixed-point fractional library routines.
+                                                             (line 1794)
+* __satfractunshiuta:                    Fixed-point fractional library routines.
+                                                             (line 1804)
+* __satfractunsqida:                     Fixed-point fractional library routines.
+                                                             (line 1760)
+* __satfractunsqidq:                     Fixed-point fractional library routines.
+                                                             (line 1757)
+* __satfractunsqiha:                     Fixed-point fractional library routines.
+                                                             (line 1758)
+* __satfractunsqihq:                     Fixed-point fractional library routines.
+                                                             (line 1754)
+* __satfractunsqiqq:                     Fixed-point fractional library routines.
+                                                             (line 1753)
+* __satfractunsqisa:                     Fixed-point fractional library routines.
+                                                             (line 1759)
+* __satfractunsqisq:                     Fixed-point fractional library routines.
+                                                             (line 1755)
+* __satfractunsqita:                     Fixed-point fractional library routines.
+                                                             (line 1762)
+* __satfractunsqiuda:                    Fixed-point fractional library routines.
+                                                             (line 1776)
+* __satfractunsqiudq:                    Fixed-point fractional library routines.
+                                                             (line 1770)
+* __satfractunsqiuha:                    Fixed-point fractional library routines.
+                                                             (line 1772)
+* __satfractunsqiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1766)
+* __satfractunsqiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1764)
+* __satfractunsqiusa:                    Fixed-point fractional library routines.
+                                                             (line 1774)
+* __satfractunsqiusq:                    Fixed-point fractional library routines.
+                                                             (line 1768)
+* __satfractunsqiuta:                    Fixed-point fractional library routines.
+                                                             (line 1778)
+* __satfractunssida:                     Fixed-point fractional library routines.
+                                                             (line 1811)
+* __satfractunssidq:                     Fixed-point fractional library routines.
+                                                             (line 1808)
+* __satfractunssiha:                     Fixed-point fractional library routines.
+                                                             (line 1809)
+* __satfractunssihq:                     Fixed-point fractional library routines.
+                                                             (line 1806)
+* __satfractunssiqq:                     Fixed-point fractional library routines.
+                                                             (line 1805)
+* __satfractunssisa:                     Fixed-point fractional library routines.
+                                                             (line 1810)
+* __satfractunssisq:                     Fixed-point fractional library routines.
+                                                             (line 1807)
+* __satfractunssita:                     Fixed-point fractional library routines.
+                                                             (line 1812)
+* __satfractunssiuda:                    Fixed-point fractional library routines.
+                                                             (line 1824)
+* __satfractunssiudq:                    Fixed-point fractional library routines.
+                                                             (line 1819)
+* __satfractunssiuha:                    Fixed-point fractional library routines.
+                                                             (line 1821)
+* __satfractunssiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1815)
+* __satfractunssiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1814)
+* __satfractunssiusa:                    Fixed-point fractional library routines.
+                                                             (line 1822)
+* __satfractunssiusq:                    Fixed-point fractional library routines.
+                                                             (line 1817)
+* __satfractunssiuta:                    Fixed-point fractional library routines.
+                                                             (line 1826)
+* __satfractunstida:                     Fixed-point fractional library routines.
+                                                             (line 1864)
+* __satfractunstidq:                     Fixed-point fractional library routines.
+                                                             (line 1859)
+* __satfractunstiha:                     Fixed-point fractional library routines.
+                                                             (line 1861)
+* __satfractunstihq:                     Fixed-point fractional library routines.
+                                                             (line 1855)
+* __satfractunstiqq:                     Fixed-point fractional library routines.
+                                                             (line 1854)
+* __satfractunstisa:                     Fixed-point fractional library routines.
+                                                             (line 1862)
+* __satfractunstisq:                     Fixed-point fractional library routines.
+                                                             (line 1857)
+* __satfractunstita:                     Fixed-point fractional library routines.
+                                                             (line 1866)
+* __satfractunstiuda:                    Fixed-point fractional library routines.
+                                                             (line 1880)
+* __satfractunstiudq:                    Fixed-point fractional library routines.
+                                                             (line 1874)
+* __satfractunstiuha:                    Fixed-point fractional library routines.
+                                                             (line 1876)
+* __satfractunstiuhq:                    Fixed-point fractional library routines.
+                                                             (line 1870)
+* __satfractunstiuqq:                    Fixed-point fractional library routines.
+                                                             (line 1868)
+* __satfractunstiusa:                    Fixed-point fractional library routines.
+                                                             (line 1878)
+* __satfractunstiusq:                    Fixed-point fractional library routines.
+                                                             (line 1872)
+* __satfractunstiuta:                    Fixed-point fractional library routines.
+                                                             (line 1882)
+* __satfractuqqda:                       Fixed-point fractional library routines.
+                                                             (line 1201)
+* __satfractuqqdq:                       Fixed-point fractional library routines.
+                                                             (line 1196)
+* __satfractuqqha:                       Fixed-point fractional library routines.
+                                                             (line 1198)
+* __satfractuqqhq:                       Fixed-point fractional library routines.
+                                                             (line 1192)
+* __satfractuqqqq:                       Fixed-point fractional library routines.
+                                                             (line 1191)
+* __satfractuqqsa:                       Fixed-point fractional library routines.
+                                                             (line 1199)
+* __satfractuqqsq:                       Fixed-point fractional library routines.
+                                                             (line 1194)
+* __satfractuqqta:                       Fixed-point fractional library routines.
+                                                             (line 1203)
+* __satfractuqquda:                      Fixed-point fractional library routines.
+                                                             (line 1215)
+* __satfractuqqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1209)
+* __satfractuqquha:                      Fixed-point fractional library routines.
+                                                             (line 1211)
+* __satfractuqquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1205)
+* __satfractuqqusa:                      Fixed-point fractional library routines.
+                                                             (line 1213)
+* __satfractuqqusq2:                     Fixed-point fractional library routines.
+                                                             (line 1207)
+* __satfractuqquta:                      Fixed-point fractional library routines.
+                                                             (line 1217)
+* __satfractusada:                       Fixed-point fractional library routines.
+                                                             (line 1327)
+* __satfractusadq:                       Fixed-point fractional library routines.
+                                                             (line 1324)
+* __satfractusaha:                       Fixed-point fractional library routines.
+                                                             (line 1325)
+* __satfractusahq:                       Fixed-point fractional library routines.
+                                                             (line 1322)
+* __satfractusaqq:                       Fixed-point fractional library routines.
+                                                             (line 1321)
+* __satfractusasa:                       Fixed-point fractional library routines.
+                                                             (line 1326)
+* __satfractusasq:                       Fixed-point fractional library routines.
+                                                             (line 1323)
+* __satfractusata:                       Fixed-point fractional library routines.
+                                                             (line 1328)
+* __satfractusauda2:                     Fixed-point fractional library routines.
+                                                             (line 1339)
+* __satfractusaudq:                      Fixed-point fractional library routines.
+                                                             (line 1335)
+* __satfractusauha2:                     Fixed-point fractional library routines.
+                                                             (line 1337)
+* __satfractusauhq:                      Fixed-point fractional library routines.
+                                                             (line 1331)
+* __satfractusauqq:                      Fixed-point fractional library routines.
+                                                             (line 1330)
+* __satfractusausq:                      Fixed-point fractional library routines.
+                                                             (line 1333)
+* __satfractusauta2:                     Fixed-point fractional library routines.
+                                                             (line 1341)
+* __satfractusqda:                       Fixed-point fractional library routines.
+                                                             (line 1248)
+* __satfractusqdq:                       Fixed-point fractional library routines.
+                                                             (line 1244)
+* __satfractusqha:                       Fixed-point fractional library routines.
+                                                             (line 1246)
+* __satfractusqhq:                       Fixed-point fractional library routines.
+                                                             (line 1241)
+* __satfractusqqq:                       Fixed-point fractional library routines.
+                                                             (line 1240)
+* __satfractusqsa:                       Fixed-point fractional library routines.
+                                                             (line 1247)
+* __satfractusqsq:                       Fixed-point fractional library routines.
+                                                             (line 1242)
+* __satfractusqta:                       Fixed-point fractional library routines.
+                                                             (line 1250)
+* __satfractusquda:                      Fixed-point fractional library routines.
+                                                             (line 1262)
+* __satfractusqudq2:                     Fixed-point fractional library routines.
+                                                             (line 1256)
+* __satfractusquha:                      Fixed-point fractional library routines.
+                                                             (line 1258)
+* __satfractusquhq2:                     Fixed-point fractional library routines.
+                                                             (line 1254)
+* __satfractusquqq2:                     Fixed-point fractional library routines.
+                                                             (line 1252)
+* __satfractusqusa:                      Fixed-point fractional library routines.
+                                                             (line 1260)
+* __satfractusquta:                      Fixed-point fractional library routines.
+                                                             (line 1264)
+* __satfractutada:                       Fixed-point fractional library routines.
+                                                             (line 1379)
+* __satfractutadq:                       Fixed-point fractional library routines.
+                                                             (line 1374)
+* __satfractutaha:                       Fixed-point fractional library routines.
+                                                             (line 1376)
+* __satfractutahq:                       Fixed-point fractional library routines.
+                                                             (line 1370)
+* __satfractutaqq:                       Fixed-point fractional library routines.
+                                                             (line 1369)
+* __satfractutasa:                       Fixed-point fractional library routines.
+                                                             (line 1377)
+* __satfractutasq:                       Fixed-point fractional library routines.
+                                                             (line 1372)
+* __satfractutata:                       Fixed-point fractional library routines.
+                                                             (line 1381)
+* __satfractutauda2:                     Fixed-point fractional library routines.
+                                                             (line 1395)
+* __satfractutaudq:                      Fixed-point fractional library routines.
+                                                             (line 1389)
+* __satfractutauha2:                     Fixed-point fractional library routines.
+                                                             (line 1391)
+* __satfractutauhq:                      Fixed-point fractional library routines.
+                                                             (line 1385)
+* __satfractutauqq:                      Fixed-point fractional library routines.
+                                                             (line 1383)
+* __satfractutausa2:                     Fixed-point fractional library routines.
+                                                             (line 1393)
+* __satfractutausq:                      Fixed-point fractional library routines.
+                                                             (line 1387)
+* __ssaddda3:                            Fixed-point fractional library routines.
+                                                             (line   67)
+* __ssadddq3:                            Fixed-point fractional library routines.
+                                                             (line   63)
+* __ssaddha3:                            Fixed-point fractional library routines.
+                                                             (line   65)
+* __ssaddhq3:                            Fixed-point fractional library routines.
+                                                             (line   60)
+* __ssaddqq3:                            Fixed-point fractional library routines.
+                                                             (line   59)
+* __ssaddsa3:                            Fixed-point fractional library routines.
+                                                             (line   66)
+* __ssaddsq3:                            Fixed-point fractional library routines.
+                                                             (line   61)
+* __ssaddta3:                            Fixed-point fractional library routines.
+                                                             (line   69)
+* __ssashlda3:                           Fixed-point fractional library routines.
+                                                             (line  402)
+* __ssashldq3:                           Fixed-point fractional library routines.
+                                                             (line  399)
+* __ssashlha3:                           Fixed-point fractional library routines.
+                                                             (line  400)
+* __ssashlhq3:                           Fixed-point fractional library routines.
+                                                             (line  396)
+* __ssashlsa3:                           Fixed-point fractional library routines.
+                                                             (line  401)
+* __ssashlsq3:                           Fixed-point fractional library routines.
+                                                             (line  397)
+* __ssashlta3:                           Fixed-point fractional library routines.
+                                                             (line  404)
+* __ssdivda3:                            Fixed-point fractional library routines.
+                                                             (line  261)
+* __ssdivdq3:                            Fixed-point fractional library routines.
+                                                             (line  257)
+* __ssdivha3:                            Fixed-point fractional library routines.
+                                                             (line  259)
+* __ssdivhq3:                            Fixed-point fractional library routines.
+                                                             (line  254)
+* __ssdivqq3:                            Fixed-point fractional library routines.
+                                                             (line  253)
+* __ssdivsa3:                            Fixed-point fractional library routines.
+                                                             (line  260)
+* __ssdivsq3:                            Fixed-point fractional library routines.
+                                                             (line  255)
+* __ssdivta3:                            Fixed-point fractional library routines.
+                                                             (line  263)
+* __ssmulda3:                            Fixed-point fractional library routines.
+                                                             (line  193)
+* __ssmuldq3:                            Fixed-point fractional library routines.
+                                                             (line  189)
+* __ssmulha3:                            Fixed-point fractional library routines.
+                                                             (line  191)
+* __ssmulhq3:                            Fixed-point fractional library routines.
+                                                             (line  186)
+* __ssmulqq3:                            Fixed-point fractional library routines.
+                                                             (line  185)
+* __ssmulsa3:                            Fixed-point fractional library routines.
+                                                             (line  192)
+* __ssmulsq3:                            Fixed-point fractional library routines.
+                                                             (line  187)
+* __ssmulta3:                            Fixed-point fractional library routines.
+                                                             (line  195)
+* __ssnegda2:                            Fixed-point fractional library routines.
+                                                             (line  316)
+* __ssnegdq2:                            Fixed-point fractional library routines.
+                                                             (line  313)
+* __ssnegha2:                            Fixed-point fractional library routines.
+                                                             (line  314)
+* __ssneghq2:                            Fixed-point fractional library routines.
+                                                             (line  311)
+* __ssnegqq2:                            Fixed-point fractional library routines.
+                                                             (line  310)
+* __ssnegsa2:                            Fixed-point fractional library routines.
+                                                             (line  315)
+* __ssnegsq2:                            Fixed-point fractional library routines.
+                                                             (line  312)
+* __ssnegta2:                            Fixed-point fractional library routines.
+                                                             (line  317)
+* __sssubda3:                            Fixed-point fractional library routines.
+                                                             (line  129)
+* __sssubdq3:                            Fixed-point fractional library routines.
+                                                             (line  125)
+* __sssubha3:                            Fixed-point fractional library routines.
+                                                             (line  127)
+* __sssubhq3:                            Fixed-point fractional library routines.
+                                                             (line  122)
+* __sssubqq3:                            Fixed-point fractional library routines.
+                                                             (line  121)
+* __sssubsa3:                            Fixed-point fractional library routines.
+                                                             (line  128)
+* __sssubsq3:                            Fixed-point fractional library routines.
+                                                             (line  123)
+* __sssubta3:                            Fixed-point fractional library routines.
+                                                             (line  131)
+* __subda3:                              Fixed-point fractional library routines.
+                                                             (line  107)
+* __subdf3:                              Soft float library routines.
+                                                             (line   31)
+* __subdq3:                              Fixed-point fractional library routines.
+                                                             (line   95)
+* __subha3:                              Fixed-point fractional library routines.
+                                                             (line  105)
+* __subhq3:                              Fixed-point fractional library routines.
+                                                             (line   92)
+* __subqq3:                              Fixed-point fractional library routines.
+                                                             (line   91)
+* __subsa3:                              Fixed-point fractional library routines.
+                                                             (line  106)
+* __subsf3:                              Soft float library routines.
+                                                             (line   30)
+* __subsq3:                              Fixed-point fractional library routines.
+                                                             (line   93)
+* __subta3:                              Fixed-point fractional library routines.
+                                                             (line  109)
+* __subtf3:                              Soft float library routines.
+                                                             (line   33)
+* __subuda3:                             Fixed-point fractional library routines.
+                                                             (line  115)
+* __subudq3:                             Fixed-point fractional library routines.
+                                                             (line  103)
+* __subuha3:                             Fixed-point fractional library routines.
+                                                             (line  111)
+* __subuhq3:                             Fixed-point fractional library routines.
+                                                             (line   99)
+* __subuqq3:                             Fixed-point fractional library routines.
+                                                             (line   97)
+* __subusa3:                             Fixed-point fractional library routines.
+                                                             (line  113)
+* __subusq3:                             Fixed-point fractional library routines.
+                                                             (line  101)
+* __subuta3:                             Fixed-point fractional library routines.
+                                                             (line  117)
+* __subvdi3:                             Integer library routines.
+                                                             (line  123)
+* __subvsi3:                             Integer library routines.
+                                                             (line  122)
+* __subxf3:                              Soft float library routines.
+                                                             (line   35)
+* __truncdfsf2:                          Soft float library routines.
+                                                             (line   76)
+* __trunctfdf2:                          Soft float library routines.
+                                                             (line   73)
+* __trunctfsf2:                          Soft float library routines.
+                                                             (line   75)
+* __truncxfdf2:                          Soft float library routines.
+                                                             (line   72)
+* __truncxfsf2:                          Soft float library routines.
+                                                             (line   74)
+* __ucmpdi2:                             Integer library routines.
+                                                             (line   93)
+* __ucmpti2:                             Integer library routines.
+                                                             (line   95)
+* __udivdi3:                             Integer library routines.
+                                                             (line   54)
+* __udivmoddi3:                          Integer library routines.
+                                                             (line   61)
+* __udivsi3:                             Integer library routines.
+                                                             (line   52)
+* __udivti3:                             Integer library routines.
+                                                             (line   56)
+* __udivuda3:                            Fixed-point fractional library routines.
+                                                             (line  246)
+* __udivudq3:                            Fixed-point fractional library routines.
+                                                             (line  240)
+* __udivuha3:                            Fixed-point fractional library routines.
+                                                             (line  242)
+* __udivuhq3:                            Fixed-point fractional library routines.
+                                                             (line  236)
+* __udivuqq3:                            Fixed-point fractional library routines.
+                                                             (line  234)
+* __udivusa3:                            Fixed-point fractional library routines.
+                                                             (line  244)
+* __udivusq3:                            Fixed-point fractional library routines.
+                                                             (line  238)
+* __udivuta3:                            Fixed-point fractional library routines.
+                                                             (line  248)
+* __umoddi3:                             Integer library routines.
+                                                             (line   71)
+* __umodsi3:                             Integer library routines.
+                                                             (line   69)
+* __umodti3:                             Integer library routines.
+                                                             (line   73)
+* __unorddf2:                            Soft float library routines.
+                                                             (line  173)
+* __unordsf2:                            Soft float library routines.
+                                                             (line  172)
+* __unordtf2:                            Soft float library routines.
+                                                             (line  174)
+* __usadduda3:                           Fixed-point fractional library routines.
+                                                             (line   85)
+* __usaddudq3:                           Fixed-point fractional library routines.
+                                                             (line   79)
+* __usadduha3:                           Fixed-point fractional library routines.
+                                                             (line   81)
+* __usadduhq3:                           Fixed-point fractional library routines.
+                                                             (line   75)
+* __usadduqq3:                           Fixed-point fractional library routines.
+                                                             (line   73)
+* __usaddusa3:                           Fixed-point fractional library routines.
+                                                             (line   83)
+* __usaddusq3:                           Fixed-point fractional library routines.
+                                                             (line   77)
+* __usadduta3:                           Fixed-point fractional library routines.
+                                                             (line   87)
+* __usashluda3:                          Fixed-point fractional library routines.
+                                                             (line  421)
+* __usashludq3:                          Fixed-point fractional library routines.
+                                                             (line  415)
+* __usashluha3:                          Fixed-point fractional library routines.
+                                                             (line  417)
+* __usashluhq3:                          Fixed-point fractional library routines.
+                                                             (line  411)
+* __usashluqq3:                          Fixed-point fractional library routines.
+                                                             (line  409)
+* __usashlusa3:                          Fixed-point fractional library routines.
+                                                             (line  419)
+* __usashlusq3:                          Fixed-point fractional library routines.
+                                                             (line  413)
+* __usashluta3:                          Fixed-point fractional library routines.
+                                                             (line  423)
+* __usdivuda3:                           Fixed-point fractional library routines.
+                                                             (line  280)
+* __usdivudq3:                           Fixed-point fractional library routines.
+                                                             (line  274)
+* __usdivuha3:                           Fixed-point fractional library routines.
+                                                             (line  276)
+* __usdivuhq3:                           Fixed-point fractional library routines.
+                                                             (line  270)
+* __usdivuqq3:                           Fixed-point fractional library routines.
+                                                             (line  268)
+* __usdivusa3:                           Fixed-point fractional library routines.
+                                                             (line  278)
+* __usdivusq3:                           Fixed-point fractional library routines.
+                                                             (line  272)
+* __usdivuta3:                           Fixed-point fractional library routines.
+                                                             (line  282)
+* __usmuluda3:                           Fixed-point fractional library routines.
+                                                             (line  212)
+* __usmuludq3:                           Fixed-point fractional library routines.
+                                                             (line  206)
+* __usmuluha3:                           Fixed-point fractional library routines.
+                                                             (line  208)
+* __usmuluhq3:                           Fixed-point fractional library routines.
+                                                             (line  202)
+* __usmuluqq3:                           Fixed-point fractional library routines.
+                                                             (line  200)
+* __usmulusa3:                           Fixed-point fractional library routines.
+                                                             (line  210)
+* __usmulusq3:                           Fixed-point fractional library routines.
+                                                             (line  204)
+* __usmuluta3:                           Fixed-point fractional library routines.
+                                                             (line  214)
+* __usneguda2:                           Fixed-point fractional library routines.
+                                                             (line  331)
+* __usnegudq2:                           Fixed-point fractional library routines.
+                                                             (line  326)
+* __usneguha2:                           Fixed-point fractional library routines.
+                                                             (line  328)
+* __usneguhq2:                           Fixed-point fractional library routines.
+                                                             (line  322)
+* __usneguqq2:                           Fixed-point fractional library routines.
+                                                             (line  321)
+* __usnegusa2:                           Fixed-point fractional library routines.
+                                                             (line  329)
+* __usnegusq2:                           Fixed-point fractional library routines.
+                                                             (line  324)
+* __usneguta2:                           Fixed-point fractional library routines.
+                                                             (line  333)
+* __ussubuda3:                           Fixed-point fractional library routines.
+                                                             (line  148)
+* __ussubudq3:                           Fixed-point fractional library routines.
+                                                             (line  142)
+* __ussubuha3:                           Fixed-point fractional library routines.
+                                                             (line  144)
+* __ussubuhq3:                           Fixed-point fractional library routines.
+                                                             (line  138)
+* __ussubuqq3:                           Fixed-point fractional library routines.
+                                                             (line  136)
+* __ussubusa3:                           Fixed-point fractional library routines.
+                                                             (line  146)
+* __ussubusq3:                           Fixed-point fractional library routines.
+                                                             (line  140)
+* __ussubuta3:                           Fixed-point fractional library routines.
+                                                             (line  150)
+* abort:                                 Portability.        (line   21)
+* abs:                                   Arithmetic.         (line  195)
+* abs and attributes:                    Expressions.        (line   64)
+* ABS_EXPR:                              Unary and Binary Expressions.
+                                                             (line    6)
+* absence_set:                           Processor pipeline description.
+                                                             (line  220)
+* absM2 instruction pattern:             Standard Names.     (line  452)
+* absolute value:                        Arithmetic.         (line  195)
+* access to operands:                    Accessors.          (line    6)
+* access to special operands:            Special Accessors.  (line    6)
+* accessors:                             Accessors.          (line    6)
+* ACCUM_TYPE_SIZE:                       Type Layout.        (line   88)
+* ACCUMULATE_OUTGOING_ARGS:              Stack Arguments.    (line   46)
+* ACCUMULATE_OUTGOING_ARGS and stack frames: Function Entry. (line  135)
+* ADA_LONG_TYPE_SIZE:                    Type Layout.        (line   26)
+* Adding a new GIMPLE statement code:    Adding a new GIMPLE statement code.
+                                                             (line    6)
+* ADDITIONAL_REGISTER_NAMES:             Instruction Output. (line   15)
+* addM3 instruction pattern:             Standard Names.     (line  216)
+* addMODEcc instruction pattern:         Standard Names.     (line  886)
+* addr_diff_vec:                         Side Effects.       (line  302)
+* addr_diff_vec, length of:              Insn Lengths.       (line   26)
+* ADDR_EXPR:                             Storage References. (line    6)
+* addr_vec:                              Side Effects.       (line  297)
+* addr_vec, length of:                   Insn Lengths.       (line   26)
+* address constraints:                   Simple Constraints. (line  154)
+* address_operand <1>:                   Machine-Independent Predicates.
+                                                             (line   63)
+* address_operand:                       Simple Constraints. (line  158)
+* addressing modes:                      Addressing Modes.   (line    6)
+* ADJUST_FIELD_ALIGN:                    Storage Layout.     (line  202)
+* ADJUST_INSN_LENGTH:                    Insn Lengths.       (line   35)
+* aggregates as return values:           Aggregate Return.   (line    6)
+* alias:                                 Alias analysis.     (line    6)
+* ALL_COP_ADDITIONAL_REGISTER_NAMES:     MIPS Coprocessors.  (line   32)
+* ALL_REGS:                              Register Classes.   (line   17)
+* allocate_stack instruction pattern:    Standard Names.     (line 1186)
+* alternate entry points:                Insns.              (line  140)
+* anchored addresses:                    Anchored Addresses. (line    6)
+* and:                                   Arithmetic.         (line  153)
+* and and attributes:                    Expressions.        (line   50)
+* and, canonicalization of:              Insn Canonicalizations.
+                                                             (line   52)
+* andM3 instruction pattern:             Standard Names.     (line  222)
+* annotations:                           Annotations.        (line    6)
+* APPLY_RESULT_SIZE:                     Scalar Return.      (line  107)
+* ARG_POINTER_CFA_OFFSET:                Frame Layout.       (line  194)
+* ARG_POINTER_REGNUM:                    Frame Registers.    (line   41)
+* ARG_POINTER_REGNUM and virtual registers: Regs and Memory. (line   65)
+* arg_pointer_rtx:                       Frame Registers.    (line   90)
+* ARGS_GROW_DOWNWARD:                    Frame Layout.       (line   35)
+* argument passing:                      Interface.          (line   36)
+* arguments in registers:                Register Arguments. (line    6)
+* arguments on stack:                    Stack Arguments.    (line    6)
+* arithmetic library:                    Soft float library routines.
+                                                             (line    6)
+* arithmetic shift:                      Arithmetic.         (line  168)
+* arithmetic shift with signed saturation: Arithmetic.       (line  168)
+* arithmetic shift with unsigned saturation: Arithmetic.     (line  168)
+* arithmetic, in RTL:                    Arithmetic.         (line    6)
+* ARITHMETIC_TYPE_P:                     Types for C++.      (line   61)
+* array:                                 Types.              (line    6)
+* ARRAY_RANGE_REF:                       Storage References. (line    6)
+* ARRAY_REF:                             Storage References. (line    6)
+* ARRAY_TYPE:                            Types.              (line    6)
+* AS_NEEDS_DASH_FOR_PIPED_INPUT:         Driver.             (line  151)
+* ashift:                                Arithmetic.         (line  168)
+* ashift and attributes:                 Expressions.        (line   64)
+* ashiftrt:                              Arithmetic.         (line  185)
+* ashiftrt and attributes:               Expressions.        (line   64)
+* ashlM3 instruction pattern:            Standard Names.     (line  431)
+* ashrM3 instruction pattern:            Standard Names.     (line  441)
+* ASM_APP_OFF:                           File Framework.     (line   78)
+* ASM_APP_ON:                            File Framework.     (line   71)
+* ASM_COMMENT_START:                     File Framework.     (line   66)
+* ASM_DECLARE_CLASS_REFERENCE:           Label Output.       (line  437)
+* ASM_DECLARE_CONSTANT_NAME:             Label Output.       (line  128)
+* ASM_DECLARE_FUNCTION_NAME:             Label Output.       (line   87)
+* ASM_DECLARE_FUNCTION_SIZE:             Label Output.       (line  101)
+* ASM_DECLARE_OBJECT_NAME:               Label Output.       (line  114)
+* ASM_DECLARE_REGISTER_GLOBAL:           Label Output.       (line  143)
+* ASM_DECLARE_UNRESOLVED_REFERENCE:      Label Output.       (line  443)
+* ASM_FINAL_SPEC:                        Driver.             (line  144)
+* ASM_FINISH_DECLARE_OBJECT:             Label Output.       (line  151)
+* ASM_FORMAT_PRIVATE_NAME:               Label Output.       (line  355)
+* asm_fprintf:                           Instruction Output. (line  136)
+* ASM_FPRINTF_EXTENSIONS:                Instruction Output. (line  147)
+* ASM_GENERATE_INTERNAL_LABEL:           Label Output.       (line  339)
+* asm_input:                             Side Effects.       (line  284)
+* asm_input and /v:                      Flags.              (line   94)
+* ASM_MAYBE_OUTPUT_ENCODED_ADDR_RTX:     Exception Handling. (line   82)
+* ASM_NO_SKIP_IN_TEXT:                   Alignment Output.   (line   72)
+* asm_noperands:                         Insns.              (line  307)
+* asm_operands and /v:                   Flags.              (line   94)
+* asm_operands, RTL sharing:             Sharing.            (line   45)
+* asm_operands, usage:                   Assembler.          (line    6)
+* ASM_OUTPUT_ADDR_DIFF_ELT:              Dispatch Tables.    (line    9)
+* ASM_OUTPUT_ADDR_VEC_ELT:               Dispatch Tables.    (line   26)
+* ASM_OUTPUT_ALIGN:                      Alignment Output.   (line   79)
+* ASM_OUTPUT_ALIGN_WITH_NOP:             Alignment Output.   (line   84)
+* ASM_OUTPUT_ALIGNED_BSS:                Uninitialized Data. (line   71)
+* ASM_OUTPUT_ALIGNED_COMMON:             Uninitialized Data. (line   30)
+* ASM_OUTPUT_ALIGNED_DECL_COMMON:        Uninitialized Data. (line   38)
+* ASM_OUTPUT_ALIGNED_DECL_LOCAL:         Uninitialized Data. (line  102)
+* ASM_OUTPUT_ALIGNED_LOCAL:              Uninitialized Data. (line   94)
+* ASM_OUTPUT_ASCII:                      Data Output.        (line   50)
+* ASM_OUTPUT_BSS:                        Uninitialized Data. (line   46)
+* ASM_OUTPUT_CASE_END:                   Dispatch Tables.    (line   51)
+* ASM_OUTPUT_CASE_LABEL:                 Dispatch Tables.    (line   38)
+* ASM_OUTPUT_COMMON:                     Uninitialized Data. (line   10)
+* ASM_OUTPUT_DEBUG_LABEL:                Label Output.       (line  327)
+* ASM_OUTPUT_DEF:                        Label Output.       (line  376)
+* ASM_OUTPUT_DEF_FROM_DECLS:             Label Output.       (line  384)
+* ASM_OUTPUT_DWARF_DELTA:                SDB and DWARF.      (line   42)
+* ASM_OUTPUT_DWARF_OFFSET:               SDB and DWARF.      (line   46)
+* ASM_OUTPUT_DWARF_PCREL:                SDB and DWARF.      (line   52)
+* ASM_OUTPUT_DWARF_TABLE_REF:            SDB and DWARF.      (line   57)
+* ASM_OUTPUT_EXTERNAL:                   Label Output.       (line  264)
+* ASM_OUTPUT_FDESC:                      Data Output.        (line   59)
+* ASM_OUTPUT_IDENT:                      File Framework.     (line  100)
+* ASM_OUTPUT_INTERNAL_LABEL:             Label Output.       (line   17)
+* ASM_OUTPUT_LABEL:                      Label Output.       (line    9)
+* ASM_OUTPUT_LABEL_REF:                  Label Output.       (line  300)
+* ASM_OUTPUT_LABELREF:                   Label Output.       (line  286)
+* ASM_OUTPUT_LOCAL:                      Uninitialized Data. (line   81)
+* ASM_OUTPUT_MAX_SKIP_ALIGN:             Alignment Output.   (line   88)
+* ASM_OUTPUT_MEASURED_SIZE:              Label Output.       (line   41)
+* ASM_OUTPUT_OPCODE:                     Instruction Output. (line   21)
+* ASM_OUTPUT_POOL_EPILOGUE:              Data Output.        (line  109)
+* ASM_OUTPUT_POOL_PROLOGUE:              Data Output.        (line   72)
+* ASM_OUTPUT_REG_POP:                    Instruction Output. (line  191)
+* ASM_OUTPUT_REG_PUSH:                   Instruction Output. (line  186)
+* ASM_OUTPUT_SIZE_DIRECTIVE:             Label Output.       (line   35)
+* ASM_OUTPUT_SKIP:                       Alignment Output.   (line   66)
+* ASM_OUTPUT_SOURCE_FILENAME:            File Framework.     (line   85)
+* ASM_OUTPUT_SPECIAL_POOL_ENTRY:         Data Output.        (line   84)
+* ASM_OUTPUT_SYMBOL_REF:                 Label Output.       (line  293)
+* ASM_OUTPUT_TYPE_DIRECTIVE:             Label Output.       (line   77)
+* ASM_OUTPUT_WEAK_ALIAS:                 Label Output.       (line  402)
+* ASM_OUTPUT_WEAKREF:                    Label Output.       (line  203)
+* ASM_PREFERRED_EH_DATA_FORMAT:          Exception Handling. (line   67)
+* ASM_SPEC:                              Driver.             (line  136)
+* ASM_STABD_OP:                          DBX Options.        (line   36)
+* ASM_STABN_OP:                          DBX Options.        (line   43)
+* ASM_STABS_OP:                          DBX Options.        (line   29)
+* ASM_WEAKEN_DECL:                       Label Output.       (line  195)
+* ASM_WEAKEN_LABEL:                      Label Output.       (line  182)
+* assemble_name:                         Label Output.       (line    8)
+* assemble_name_raw:                     Label Output.       (line   16)
+* assembler format:                      File Framework.     (line    6)
+* assembler instructions in RTL:         Assembler.          (line    6)
+* ASSEMBLER_DIALECT:                     Instruction Output. (line  159)
+* assigning attribute values to insns:   Tagging Insns.      (line    6)
+* asterisk in template:                  Output Statement.   (line   29)
+* atan2M3 instruction pattern:           Standard Names.     (line  522)
+* attr <1>:                              Tagging Insns.      (line   54)
+* attr:                                  Expressions.        (line  154)
+* attr_flag:                             Expressions.        (line  119)
+* attribute expressions:                 Expressions.        (line    6)
+* attribute specifications:              Attr Example.       (line    6)
+* attribute specifications example:      Attr Example.       (line    6)
+* ATTRIBUTE_ALIGNED_VALUE:               Storage Layout.     (line  184)
+* attributes:                            Attributes.         (line    6)
+* attributes, defining:                  Defining Attributes.
+                                                             (line    6)
+* attributes, target-specific:           Target Attributes.  (line    6)
+* autoincrement addressing, availability: Portability.       (line   21)
+* autoincrement/decrement addressing:    Simple Constraints. (line   30)
+* automata_option:                       Processor pipeline description.
+                                                             (line  301)
+* automaton based pipeline description:  Processor pipeline description.
+                                                             (line   49)
+* automaton based scheduler:             Processor pipeline description.
+                                                             (line    6)
+* AVOID_CCMODE_COPIES:                   Values in Registers.
+                                                             (line  153)
+* backslash:                             Output Template.    (line   46)
+* barrier:                               Insns.              (line  160)
+* barrier and /f:                        Flags.              (line  125)
+* barrier and /v:                        Flags.              (line   44)
+* BASE_REG_CLASS:                        Register Classes.   (line  107)
+* basic block:                           Basic Blocks.       (line    6)
+* Basic Statements:                      Basic Statements.   (line    6)
+* basic-block.h:                         Control Flow.       (line    6)
+* BASIC_BLOCK:                           Basic Blocks.       (line   19)
+* basic_block:                           Basic Blocks.       (line    6)
+* BB_HEAD, BB_END:                       Maintaining the CFG.
+                                                             (line   88)
+* bb_seq:                                GIMPLE sequences.   (line   73)
+* BIGGEST_ALIGNMENT:                     Storage Layout.     (line  174)
+* BIGGEST_FIELD_ALIGNMENT:               Storage Layout.     (line  195)
+* BImode:                                Machine Modes.      (line   22)
+* BIND_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* BINFO_TYPE:                            Classes.            (line    6)
+* bit-fields:                            Bit-Fields.         (line    6)
+* BIT_AND_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_IOR_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_NOT_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BIT_XOR_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* BITFIELD_NBYTES_LIMITED:               Storage Layout.     (line  383)
+* BITS_BIG_ENDIAN:                       Storage Layout.     (line   12)
+* BITS_BIG_ENDIAN, effect on sign_extract: Bit-Fields.       (line    8)
+* BITS_PER_UNIT:                         Storage Layout.     (line   52)
+* BITS_PER_WORD:                         Storage Layout.     (line   57)
+* bitwise complement:                    Arithmetic.         (line  149)
+* bitwise exclusive-or:                  Arithmetic.         (line  163)
+* bitwise inclusive-or:                  Arithmetic.         (line  158)
+* bitwise logical-and:                   Arithmetic.         (line  153)
+* BLKmode:                               Machine Modes.      (line  183)
+* BLKmode, and function return values:   Calls.              (line   23)
+* block statement iterators <1>:         Maintaining the CFG.
+                                                             (line   45)
+* block statement iterators:             Basic Blocks.       (line   68)
+* BLOCK_FOR_INSN, bb_for_stmt:           Maintaining the CFG.
+                                                             (line   40)
+* BLOCK_REG_PADDING:                     Register Arguments. (line  228)
+* blockage instruction pattern:          Standard Names.     (line 1376)
+* Blocks:                                Blocks.             (line    6)
+* bool:                                  Misc.               (line  876)
+* BOOL_TYPE_SIZE:                        Type Layout.        (line   44)
+* BOOLEAN_TYPE:                          Types.              (line    6)
+* branch prediction:                     Profile information.
+                                                             (line   24)
+* BRANCH_COST:                           Costs.              (line   52)
+* break_out_memory_refs:                 Addressing Modes.   (line  131)
+* BREAK_STMT:                            Statements for C++. (line    6)
+* bsi_commit_edge_inserts:               Maintaining the CFG.
+                                                             (line  118)
+* bsi_end_p:                             Maintaining the CFG.
+                                                             (line   60)
+* bsi_insert_after:                      Maintaining the CFG.
+                                                             (line   72)
+* bsi_insert_before:                     Maintaining the CFG.
+                                                             (line   78)
+* bsi_insert_on_edge:                    Maintaining the CFG.
+                                                             (line  118)
+* bsi_last:                              Maintaining the CFG.
+                                                             (line   56)
+* bsi_next:                              Maintaining the CFG.
+                                                             (line   64)
+* bsi_prev:                              Maintaining the CFG.
+                                                             (line   68)
+* bsi_remove:                            Maintaining the CFG.
+                                                             (line   84)
+* bsi_start:                             Maintaining the CFG.
+                                                             (line   52)
+* BSS_SECTION_ASM_OP:                    Sections.           (line   68)
+* bswap:                                 Arithmetic.         (line  236)
+* btruncM2 instruction pattern:          Standard Names.     (line  540)
+* build0:                                Macros and Functions.
+                                                             (line   16)
+* build1:                                Macros and Functions.
+                                                             (line   17)
+* build2:                                Macros and Functions.
+                                                             (line   18)
+* build3:                                Macros and Functions.
+                                                             (line   19)
+* build4:                                Macros and Functions.
+                                                             (line   20)
+* build5:                                Macros and Functions.
+                                                             (line   21)
+* build6:                                Macros and Functions.
+                                                             (line   22)
+* builtin_longjmp instruction pattern:   Standard Names.     (line 1279)
+* builtin_setjmp_receiver instruction pattern: Standard Names.
+                                                             (line 1269)
+* builtin_setjmp_setup instruction pattern: Standard Names.  (line 1258)
+* byte_mode:                             Machine Modes.      (line  336)
+* BYTES_BIG_ENDIAN:                      Storage Layout.     (line   24)
+* BYTES_BIG_ENDIAN, effect on subreg:    Regs and Memory.    (line  221)
+* C statements for assembler output:     Output Statement.   (line    6)
+* C99 math functions, implicit usage:    Library Calls.      (line   76)
+* C_COMMON_OVERRIDE_OPTIONS:             Run-time Target.    (line  128)
+* c_register_pragma:                     Misc.               (line  404)
+* c_register_pragma_with_expansion:      Misc.               (line  406)
+* call <1>:                              Flags.              (line  239)
+* call:                                  Side Effects.       (line   86)
+* call instruction pattern:              Standard Names.     (line  933)
+* call usage:                            Calls.              (line   10)
+* call, in call_insn:                    Flags.              (line   33)
+* call, in mem:                          Flags.              (line   99)
+* call-clobbered register:               Register Basics.    (line   46)
+* call-saved register:                   Register Basics.    (line   53)
+* call-used register:                    Register Basics.    (line   46)
+* CALL_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* call_insn:                             Insns.              (line   95)
+* call_insn and /c:                      Flags.              (line   33)
+* call_insn and /f:                      Flags.              (line  125)
+* call_insn and /i:                      Flags.              (line   24)
+* call_insn and /j:                      Flags.              (line  179)
+* call_insn and /s:                      Flags.              (line   49)
+* call_insn and /u:                      Flags.              (line   19)
+* call_insn and /u or /i:                Flags.              (line   29)
+* call_insn and /v:                      Flags.              (line   44)
+* CALL_INSN_FUNCTION_USAGE:              Insns.              (line  101)
+* call_pop instruction pattern:          Standard Names.     (line  961)
+* CALL_POPS_ARGS:                        Stack Arguments.    (line  130)
+* CALL_REALLY_USED_REGISTERS:            Register Basics.    (line   46)
+* CALL_USED_REGISTERS:                   Register Basics.    (line   35)
+* call_used_regs:                        Register Basics.    (line   59)
+* call_value instruction pattern:        Standard Names.     (line  953)
+* call_value_pop instruction pattern:    Standard Names.     (line  961)
+* CALLER_SAVE_PROFITABLE:                Caller Saves.       (line   11)
+* calling conventions:                   Stack and Calling.  (line    6)
+* calling functions in RTL:              Calls.              (line    6)
+* can_create_pseudo_p:                   Standard Names.     (line   75)
+* CAN_DEBUG_WITHOUT_FP:                  Run-time Target.    (line  160)
+* can_fallthru:                          Basic Blocks.       (line   57)
+* canadian:                              Configure Terms.    (line    6)
+* CANNOT_CHANGE_MODE_CLASS:              Register Classes.   (line  496)
+* CANNOT_CHANGE_MODE_CLASS and subreg semantics: Regs and Memory.
+                                                             (line  280)
+* canonicalization of instructions:      Insn Canonicalizations.
+                                                             (line    6)
+* CANONICALIZE_COMPARISON:               MODE_CC Condition Codes.
+                                                             (line   55)
+* canonicalize_funcptr_for_compare instruction pattern: Standard Names.
+                                                             (line 1117)
+* CASE_USE_BIT_TESTS:                    Misc.               (line   54)
+* CASE_VECTOR_MODE:                      Misc.               (line   27)
+* CASE_VECTOR_PC_RELATIVE:               Misc.               (line   40)
+* CASE_VECTOR_SHORTEN_MODE:              Misc.               (line   31)
+* casesi instruction pattern:            Standard Names.     (line 1041)
+* cbranchMODE4 instruction pattern:      Standard Names.     (line  922)
+* cc0 <1>:                               Regs and Memory.    (line  307)
+* cc0:                                   CC0 Condition Codes.
+                                                             (line    6)
+* cc0, RTL sharing:                      Sharing.            (line   27)
+* cc0_rtx:                               Regs and Memory.    (line  333)
+* CC1_SPEC:                              Driver.             (line  118)
+* CC1PLUS_SPEC:                          Driver.             (line  126)
+* cc_status:                             CC0 Condition Codes.
+                                                             (line    6)
+* CC_STATUS_MDEP:                        CC0 Condition Codes.
+                                                             (line   17)
+* CC_STATUS_MDEP_INIT:                   CC0 Condition Codes.
+                                                             (line   23)
+* CCmode <1>:                            Machine Modes.      (line  176)
+* CCmode:                                MODE_CC Condition Codes.
+                                                             (line    6)
+* CDImode:                               Machine Modes.      (line  202)
+* CEIL_DIV_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* CEIL_MOD_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* ceilM2 instruction pattern:            Standard Names.     (line  556)
+* CFA_FRAME_BASE_OFFSET:                 Frame Layout.       (line  226)
+* CFG, Control Flow Graph:               Control Flow.       (line    6)
+* cfghooks.h:                            Maintaining the CFG.
+                                                             (line    6)
+* cgraph_finalize_function:              Parsing pass.       (line   52)
+* chain_circular:                        GTY Options.        (line  195)
+* chain_next:                            GTY Options.        (line  195)
+* chain_prev:                            GTY Options.        (line  195)
+* change_address:                        Standard Names.     (line   47)
+* char:                                  GIMPLE_ASM.         (line   53)
+* CHAR_TYPE_SIZE:                        Type Layout.        (line   39)
+* check_stack instruction pattern:       Standard Names.     (line 1204)
+* CHImode:                               Machine Modes.      (line  202)
+* class definitions, register:           Register Classes.   (line    6)
+* class preference constraints:          Class Preferences.  (line    6)
+* class, scope:                          Classes.            (line    6)
+* CLASS_LIKELY_SPILLED_P:                Register Classes.   (line  467)
+* CLASS_MAX_NREGS:                       Register Classes.   (line  484)
+* CLASS_TYPE_P:                          Types for C++.      (line   65)
+* classes of RTX codes:                  RTL Classes.        (line    6)
+* CLASSTYPE_DECLARED_CLASS:              Classes.            (line    6)
+* CLASSTYPE_HAS_MUTABLE:                 Classes.            (line   85)
+* CLASSTYPE_NON_POD_P:                   Classes.            (line   90)
+* CLEANUP_DECL:                          Statements for C++. (line    6)
+* CLEANUP_EXPR:                          Statements for C++. (line    6)
+* CLEANUP_POINT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* CLEANUP_STMT:                          Statements for C++. (line    6)
+* Cleanups:                              Cleanups.           (line    6)
+* CLEAR_BY_PIECES_P:                     Costs.              (line  136)
+* clear_cache instruction pattern:       Standard Names.     (line 1520)
+* CLEAR_INSN_CACHE:                      Trampolines.        (line   99)
+* CLEAR_RATIO:                           Costs.              (line  124)
+* clobber:                               Side Effects.       (line  100)
+* clz:                                   Arithmetic.         (line  212)
+* CLZ_DEFINED_VALUE_AT_ZERO:             Misc.               (line  319)
+* clzM2 instruction pattern:             Standard Names.     (line  621)
+* cmpmemM instruction pattern:           Standard Names.     (line  751)
+* cmpstrM instruction pattern:           Standard Names.     (line  732)
+* cmpstrnM instruction pattern:          Standard Names.     (line  720)
+* code generation RTL sequences:         Expander Definitions.
+                                                             (line    6)
+* code iterators in .md files:           Code Iterators.     (line    6)
+* code_label:                            Insns.              (line  119)
+* code_label and /i:                     Flags.              (line   59)
+* code_label and /v:                     Flags.              (line   44)
+* CODE_LABEL_NUMBER:                     Insns.              (line  119)
+* codes, RTL expression:                 RTL Objects.        (line   47)
+* COImode:                               Machine Modes.      (line  202)
+* COLLECT2_HOST_INITIALIZATION:          Host Misc.          (line   32)
+* COLLECT_EXPORT_LIST:                   Misc.               (line  783)
+* COLLECT_SHARED_FINI_FUNC:              Macros for Initialization.
+                                                             (line   44)
+* COLLECT_SHARED_INIT_FUNC:              Macros for Initialization.
+                                                             (line   33)
+* commit_edge_insertions:                Maintaining the CFG.
+                                                             (line  118)
+* compare:                               Arithmetic.         (line   43)
+* compare, canonicalization of:          Insn Canonicalizations.
+                                                             (line   37)
+* comparison_operator:                   Machine-Independent Predicates.
+                                                             (line  111)
+* compiler passes and files:             Passes.             (line    6)
+* complement, bitwise:                   Arithmetic.         (line  149)
+* COMPLEX_CST:                           Constant expressions.
+                                                             (line    6)
+* COMPLEX_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* COMPLEX_TYPE:                          Types.              (line    6)
+* COMPONENT_REF:                         Storage References. (line    6)
+* Compound Expressions:                  Compound Expressions.
+                                                             (line    6)
+* Compound Lvalues:                      Compound Lvalues.   (line    6)
+* COMPOUND_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* COMPOUND_LITERAL_EXPR:                 Unary and Binary Expressions.
+                                                             (line    6)
+* COMPOUND_LITERAL_EXPR_DECL:            Unary and Binary Expressions.
+                                                             (line  367)
+* COMPOUND_LITERAL_EXPR_DECL_EXPR:       Unary and Binary Expressions.
+                                                             (line  367)
+* computed jump:                         Edges.              (line  128)
+* computing the length of an insn:       Insn Lengths.       (line    6)
+* concat:                                Regs and Memory.    (line  385)
+* concatn:                               Regs and Memory.    (line  391)
+* cond:                                  Comparisons.        (line   90)
+* cond and attributes:                   Expressions.        (line   37)
+* cond_exec:                             Side Effects.       (line  248)
+* COND_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* condition code register:               Regs and Memory.    (line  307)
+* condition code status:                 Condition Code.     (line    6)
+* condition codes:                       Comparisons.        (line   20)
+* conditional execution <1>:             Conditional Execution.
+                                                             (line    6)
+* conditional execution:                 Cond. Exec. Macros. (line    6)
+* Conditional Expressions:               Conditional Expressions.
+                                                             (line    6)
+* CONDITIONAL_REGISTER_USAGE:            Register Basics.    (line   60)
+* conditions, in patterns:               Patterns.           (line   43)
+* configuration file <1>:                Filesystem.         (line    6)
+* configuration file:                    Host Misc.          (line    6)
+* configure terms:                       Configure Terms.    (line    6)
+* CONJ_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* const:                                 Constants.          (line   99)
+* CONST0_RTX:                            Constants.          (line  119)
+* const0_rtx:                            Constants.          (line   16)
+* const1_rtx:                            Constants.          (line   16)
+* CONST1_RTX:                            Constants.          (line  119)
+* const2_rtx:                            Constants.          (line   16)
+* CONST2_RTX:                            Constants.          (line  119)
+* CONST_DECL:                            Declarations.       (line    6)
+* const_double:                          Constants.          (line   32)
+* const_double, RTL sharing:             Sharing.            (line   29)
+* CONST_DOUBLE_LOW:                      Constants.          (line   39)
+* CONST_DOUBLE_OK_FOR_CONSTRAINT_P:      Old Constraints.    (line   69)
+* CONST_DOUBLE_OK_FOR_LETTER_P:          Old Constraints.    (line   54)
+* const_double_operand:                  Machine-Independent Predicates.
+                                                             (line   21)
+* const_fixed:                           Constants.          (line   52)
+* const_int:                             Constants.          (line    8)
+* const_int and attribute tests:         Expressions.        (line   47)
+* const_int and attributes:              Expressions.        (line   10)
+* const_int, RTL sharing:                Sharing.            (line   23)
+* const_int_operand:                     Machine-Independent Predicates.
+                                                             (line   16)
+* CONST_OK_FOR_CONSTRAINT_P:             Old Constraints.    (line   49)
+* CONST_OK_FOR_LETTER_P:                 Old Constraints.    (line   40)
+* const_string:                          Constants.          (line   71)
+* const_string and attributes:           Expressions.        (line   20)
+* const_true_rtx:                        Constants.          (line   26)
+* const_vector:                          Constants.          (line   59)
+* const_vector, RTL sharing:             Sharing.            (line   32)
+* constant attributes:                   Constant Attributes.
+                                                             (line    6)
+* constant definitions:                  Constant Definitions.
+                                                             (line    6)
+* CONSTANT_ADDRESS_P:                    Addressing Modes.   (line   29)
+* CONSTANT_ALIGNMENT:                    Storage Layout.     (line  242)
+* CONSTANT_P:                            Addressing Modes.   (line   36)
+* CONSTANT_POOL_ADDRESS_P:               Flags.              (line   10)
+* CONSTANT_POOL_BEFORE_FUNCTION:         Data Output.        (line   64)
+* constants in constraints:              Simple Constraints. (line   60)
+* constm1_rtx:                           Constants.          (line   16)
+* constraint modifier characters:        Modifiers.          (line    6)
+* constraint, matching:                  Simple Constraints. (line  132)
+* CONSTRAINT_LEN:                        Old Constraints.    (line   12)
+* constraint_num:                        C Constraint Interface.
+                                                             (line   38)
+* constraint_satisfied_p:                C Constraint Interface.
+                                                             (line   54)
+* constraints:                           Constraints.        (line    6)
+* constraints, defining:                 Define Constraints. (line    6)
+* constraints, defining, obsolete method: Old Constraints.   (line    6)
+* constraints, machine specific:         Machine Constraints.
+                                                             (line    6)
+* constraints, testing:                  C Constraint Interface.
+                                                             (line    6)
+* CONSTRUCTOR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* constructors, automatic calls:         Collect2.           (line   15)
+* constructors, output of:               Initialization.     (line    6)
+* container:                             Containers.         (line    6)
+* CONTINUE_STMT:                         Statements for C++. (line    6)
+* contributors:                          Contributors.       (line    6)
+* controlling register usage:            Register Basics.    (line   76)
+* controlling the compilation driver:    Driver.             (line    6)
+* conventions, run-time:                 Interface.          (line    6)
+* conversions:                           Conversions.        (line    6)
+* CONVERT_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* copy_rtx:                              Addressing Modes.   (line  184)
+* copy_rtx_if_shared:                    Sharing.            (line   64)
+* copysignM3 instruction pattern:        Standard Names.     (line  602)
+* cosM2 instruction pattern:             Standard Names.     (line  481)
+* costs of instructions:                 Costs.              (line    6)
+* CP_INTEGRAL_TYPE:                      Types for C++.      (line   57)
+* cp_namespace_decls:                    Namespaces.         (line   49)
+* CP_TYPE_CONST_NON_VOLATILE_P:          Types for C++.      (line   33)
+* CP_TYPE_CONST_P:                       Types for C++.      (line   24)
+* CP_TYPE_QUALS:                         Types for C++.      (line    6)
+* CP_TYPE_RESTRICT_P:                    Types for C++.      (line   30)
+* CP_TYPE_VOLATILE_P:                    Types for C++.      (line   27)
+* CPLUSPLUS_CPP_SPEC:                    Driver.             (line  113)
+* CPP_SPEC:                              Driver.             (line  106)
+* CQImode:                               Machine Modes.      (line  202)
+* cross compilation and floating point:  Floating Point.     (line    6)
+* CRT_CALL_STATIC_FUNCTION:              Sections.           (line  122)
+* CRTSTUFF_T_CFLAGS:                     Target Fragment.    (line   35)
+* CRTSTUFF_T_CFLAGS_S:                   Target Fragment.    (line   39)
+* CSImode:                               Machine Modes.      (line  202)
+* cstoreMODE4 instruction pattern:       Standard Names.     (line  893)
+* CTImode:                               Machine Modes.      (line  202)
+* ctrapMM4 instruction pattern:          Standard Names.     (line 1345)
+* ctz:                                   Arithmetic.         (line  220)
+* CTZ_DEFINED_VALUE_AT_ZERO:             Misc.               (line  320)
+* ctzM2 instruction pattern:             Standard Names.     (line  630)
+* CUMULATIVE_ARGS:                       Register Arguments. (line  127)
+* current_function_epilogue_delay_list:  Function Entry.     (line  181)
+* current_function_is_leaf:              Leaf Functions.     (line   51)
+* current_function_outgoing_args_size:   Stack Arguments.    (line   45)
+* current_function_pops_args:            Function Entry.     (line  106)
+* current_function_pretend_args_size:    Function Entry.     (line  112)
+* current_function_uses_only_leaf_regs:  Leaf Functions.     (line   51)
+* current_insn_predicate:                Conditional Execution.
+                                                             (line   26)
+* DAmode:                                Machine Modes.      (line  152)
+* data bypass:                           Processor pipeline description.
+                                                             (line  106)
+* data dependence delays:                Processor pipeline description.
+                                                             (line    6)
+* Data Dependency Analysis:              Dependency analysis.
+                                                             (line    6)
+* data structures:                       Per-Function Data.  (line    6)
+* DATA_ALIGNMENT:                        Storage Layout.     (line  229)
+* DATA_SECTION_ASM_OP:                   Sections.           (line   53)
+* DBR_OUTPUT_SEQEND:                     Instruction Output. (line  120)
+* dbr_sequence_length:                   Instruction Output. (line  119)
+* DBX_BLOCKS_FUNCTION_RELATIVE:          DBX Options.        (line  103)
+* DBX_CONTIN_CHAR:                       DBX Options.        (line   66)
+* DBX_CONTIN_LENGTH:                     DBX Options.        (line   56)
+* DBX_DEBUGGING_INFO:                    DBX Options.        (line    9)
+* DBX_FUNCTION_FIRST:                    DBX Options.        (line   97)
+* DBX_LINES_FUNCTION_RELATIVE:           DBX Options.        (line  109)
+* DBX_NO_XREFS:                          DBX Options.        (line   50)
+* DBX_OUTPUT_LBRAC:                      DBX Hooks.          (line    9)
+* DBX_OUTPUT_MAIN_SOURCE_FILE_END:       File Names and DBX. (line   34)
+* DBX_OUTPUT_MAIN_SOURCE_FILENAME:       File Names and DBX. (line    9)
+* DBX_OUTPUT_NFUN:                       DBX Hooks.          (line   18)
+* DBX_OUTPUT_NULL_N_SO_AT_MAIN_SOURCE_FILE_END: File Names and DBX.
+                                                             (line   42)
+* DBX_OUTPUT_RBRAC:                      DBX Hooks.          (line   15)
+* DBX_OUTPUT_SOURCE_LINE:                DBX Hooks.          (line   22)
+* DBX_REGISTER_NUMBER:                   All Debuggers.      (line    9)
+* DBX_REGPARM_STABS_CODE:                DBX Options.        (line   87)
+* DBX_REGPARM_STABS_LETTER:              DBX Options.        (line   92)
+* DBX_STATIC_CONST_VAR_CODE:             DBX Options.        (line   82)
+* DBX_STATIC_STAB_DATA_SECTION:          DBX Options.        (line   73)
+* DBX_TYPE_DECL_STABS_CODE:              DBX Options.        (line   78)
+* DBX_USE_BINCL:                         DBX Options.        (line  115)
+* DCmode:                                Machine Modes.      (line  197)
+* DDmode:                                Machine Modes.      (line   90)
+* De Morgan's law:                       Insn Canonicalizations.
+                                                             (line   52)
+* dead_or_set_p:                         define_peephole.    (line   65)
+* debug_expr:                            Debug Information.  (line   22)
+* DEBUG_EXPR_DECL:                       Declarations.       (line    6)
+* debug_insn:                            Insns.              (line  239)
+* DEBUG_SYMS_TEXT:                       DBX Options.        (line   25)
+* DEBUGGER_ARG_OFFSET:                   All Debuggers.      (line   37)
+* DEBUGGER_AUTO_OFFSET:                  All Debuggers.      (line   28)
+* decimal float library:                 Decimal float library routines.
+                                                             (line    6)
+* DECL_ALIGN:                            Declarations.       (line    6)
+* DECL_ANTICIPATED:                      Functions for C++.  (line   42)
+* DECL_ARGUMENTS:                        Function Basics.    (line   36)
+* DECL_ARRAY_DELETE_OPERATOR_P:          Functions for C++.  (line  158)
+* DECL_ARTIFICIAL <1>:                   Function Properties.
+                                                             (line   47)
+* DECL_ARTIFICIAL <2>:                   Function Basics.    (line    6)
+* DECL_ARTIFICIAL:                       Working with declarations.
+                                                             (line   24)
+* DECL_ASSEMBLER_NAME:                   Function Basics.    (line    6)
+* DECL_ATTRIBUTES:                       Attributes.         (line   22)
+* DECL_BASE_CONSTRUCTOR_P:               Functions for C++.  (line   88)
+* DECL_COMPLETE_CONSTRUCTOR_P:           Functions for C++.  (line   84)
+* DECL_COMPLETE_DESTRUCTOR_P:            Functions for C++.  (line   98)
+* DECL_CONST_MEMFUNC_P:                  Functions for C++.  (line   71)
+* DECL_CONSTRUCTOR_P:                    Functions for C++.  (line   77)
+* DECL_CONTEXT:                          Namespaces.         (line   31)
+* DECL_CONV_FN_P:                        Functions for C++.  (line  105)
+* DECL_COPY_CONSTRUCTOR_P:               Functions for C++.  (line   92)
+* DECL_DESTRUCTOR_P:                     Functions for C++.  (line   95)
+* DECL_EXTERN_C_FUNCTION_P:              Functions for C++.  (line   46)
+* DECL_EXTERNAL <1>:                     Function Properties.
+                                                             (line   25)
+* DECL_EXTERNAL:                         Declarations.       (line    6)
+* DECL_FUNCTION_MEMBER_P:                Functions for C++.  (line   61)
+* DECL_FUNCTION_SPECIFIC_OPTIMIZATION <1>: Function Basics.  (line    6)
+* DECL_FUNCTION_SPECIFIC_OPTIMIZATION:   Function Properties.
+                                                             (line   61)
+* DECL_FUNCTION_SPECIFIC_TARGET <1>:     Function Basics.    (line    6)
+* DECL_FUNCTION_SPECIFIC_TARGET:         Function Properties.
+                                                             (line   55)
+* DECL_GLOBAL_CTOR_P:                    Functions for C++.  (line  108)
+* DECL_GLOBAL_DTOR_P:                    Functions for C++.  (line  112)
+* DECL_INITIAL <1>:                      Function Basics.    (line   51)
+* DECL_INITIAL:                          Declarations.       (line    6)
+* DECL_LINKONCE_P:                       Functions for C++.  (line   50)
+* DECL_LOCAL_FUNCTION_P:                 Functions for C++.  (line   38)
+* DECL_MAIN_P:                           Functions for C++.  (line   34)
+* DECL_NAME <1>:                         Working with declarations.
+                                                             (line    7)
+* DECL_NAME <2>:                         Function Basics.    (line    6)
+* DECL_NAME:                             Namespaces.         (line   20)
+* DECL_NAMESPACE_ALIAS:                  Namespaces.         (line   35)
+* DECL_NAMESPACE_STD_P:                  Namespaces.         (line   45)
+* DECL_NON_THUNK_FUNCTION_P:             Functions for C++.  (line  138)
+* DECL_NONCONVERTING_P:                  Functions for C++.  (line   80)
+* DECL_NONSTATIC_MEMBER_FUNCTION_P:      Functions for C++.  (line   68)
+* DECL_OVERLOADED_OPERATOR_P:            Functions for C++.  (line  102)
+* DECL_PURE_P:                           Function Properties.
+                                                             (line   40)
+* DECL_RESULT:                           Function Basics.    (line   41)
+* DECL_SAVED_TREE:                       Function Basics.    (line   44)
+* DECL_SIZE:                             Declarations.       (line    6)
+* DECL_STATIC_FUNCTION_P:                Functions for C++.  (line   65)
+* DECL_STMT:                             Statements for C++. (line    6)
+* DECL_STMT_DECL:                        Statements for C++. (line    6)
+* DECL_THUNK_P:                          Functions for C++.  (line  116)
+* DECL_VIRTUAL_P:                        Function Properties.
+                                                             (line   44)
+* DECL_VOLATILE_MEMFUNC_P:               Functions for C++.  (line   74)
+* declaration:                           Declarations.       (line    6)
+* declarations, RTL:                     RTL Declarations.   (line    6)
+* DECLARE_LIBRARY_RENAMES:               Library Calls.      (line    9)
+* decrement_and_branch_until_zero instruction pattern: Standard Names.
+                                                             (line 1079)
+* def_optype_d:                          Manipulating GIMPLE statements.
+                                                             (line   94)
+* default:                               GTY Options.        (line   81)
+* default_file_start:                    File Framework.     (line    8)
+* DEFAULT_GDB_EXTENSIONS:                DBX Options.        (line   18)
+* DEFAULT_PCC_STRUCT_RETURN:             Aggregate Return.   (line   35)
+* DEFAULT_SIGNED_CHAR:                   Type Layout.        (line  154)
+* define_address_constraint:             Define Constraints. (line  107)
+* define_asm_attributes:                 Tagging Insns.      (line   73)
+* define_attr:                           Defining Attributes.
+                                                             (line    6)
+* define_automaton:                      Processor pipeline description.
+                                                             (line   53)
+* define_bypass:                         Processor pipeline description.
+                                                             (line  197)
+* define_code_attr:                      Code Iterators.     (line    6)
+* define_code_iterator:                  Code Iterators.     (line    6)
+* define_cond_exec:                      Conditional Execution.
+                                                             (line   13)
+* define_constants:                      Constant Definitions.
+                                                             (line    6)
+* define_constraint:                     Define Constraints. (line   48)
+* define_cpu_unit:                       Processor pipeline description.
+                                                             (line   68)
+* define_delay:                          Delay Slots.        (line   25)
+* define_expand:                         Expander Definitions.
+                                                             (line   11)
+* define_insn:                           Patterns.           (line    6)
+* define_insn example:                   Example.            (line    6)
+* define_insn_and_split:                 Insn Splitting.     (line  170)
+* define_insn_reservation:               Processor pipeline description.
+                                                             (line  106)
+* define_memory_constraint:              Define Constraints. (line   88)
+* define_mode_attr:                      Substitutions.      (line    6)
+* define_mode_iterator:                  Defining Mode Iterators.
+                                                             (line    6)
+* define_peephole:                       define_peephole.    (line    6)
+* define_peephole2:                      define_peephole2.   (line    6)
+* define_predicate:                      Defining Predicates.
+                                                             (line    6)
+* define_query_cpu_unit:                 Processor pipeline description.
+                                                             (line   90)
+* define_register_constraint:            Define Constraints. (line   28)
+* define_reservation:                    Processor pipeline description.
+                                                             (line  186)
+* define_special_predicate:              Defining Predicates.
+                                                             (line    6)
+* define_split:                          Insn Splitting.     (line   32)
+* defining attributes and their values:  Defining Attributes.
+                                                             (line    6)
+* defining constraints:                  Define Constraints. (line    6)
+* defining constraints, obsolete method: Old Constraints.    (line    6)
+* defining jump instruction patterns:    Jump Patterns.      (line    6)
+* defining looping instruction patterns: Looping Patterns.   (line    6)
+* defining peephole optimizers:          Peephole Definitions.
+                                                             (line    6)
+* defining predicates:                   Defining Predicates.
+                                                             (line    6)
+* defining RTL sequences for code generation: Expander Definitions.
+                                                             (line    6)
+* delay slots, defining:                 Delay Slots.        (line    6)
+* DELAY_SLOTS_FOR_EPILOGUE:              Function Entry.     (line  163)
+* deletable:                             GTY Options.        (line  149)
+* DELETE_IF_ORDINARY:                    Filesystem.         (line   79)
+* Dependent Patterns:                    Dependent Patterns. (line    6)
+* desc:                                  GTY Options.        (line   81)
+* destructors, output of:                Initialization.     (line    6)
+* deterministic finite state automaton:  Processor pipeline description.
+                                                             (line  301)
+* DF_SIZE:                               Type Layout.        (line  130)
+* DFmode:                                Machine Modes.      (line   73)
+* digits in constraint:                  Simple Constraints. (line  120)
+* DImode:                                Machine Modes.      (line   45)
+* DIR_SEPARATOR:                         Filesystem.         (line   18)
+* DIR_SEPARATOR_2:                       Filesystem.         (line   19)
+* directory options .md:                 Including Patterns. (line   44)
+* disabling certain registers:           Register Basics.    (line   76)
+* dispatch table:                        Dispatch Tables.    (line    8)
+* div:                                   Arithmetic.         (line  111)
+* div and attributes:                    Expressions.        (line   64)
+* division:                              Arithmetic.         (line  131)
+* divM3 instruction pattern:             Standard Names.     (line  222)
+* divmodM4 instruction pattern:          Standard Names.     (line  411)
+* DO_BODY:                               Statements for C++. (line    6)
+* DO_COND:                               Statements for C++. (line    6)
+* DO_STMT:                               Statements for C++. (line    6)
+* DOLLARS_IN_IDENTIFIERS:                Misc.               (line  491)
+* doloop_begin instruction pattern:      Standard Names.     (line 1110)
+* doloop_end instruction pattern:        Standard Names.     (line 1089)
+* DONE:                                  Expander Definitions.
+                                                             (line   74)
+* DONT_USE_BUILTIN_SETJMP:               Exception Region Output.
+                                                             (line   70)
+* DOUBLE_TYPE_SIZE:                      Type Layout.        (line   53)
+* DQmode:                                Machine Modes.      (line  115)
+* driver:                                Driver.             (line    6)
+* DRIVER_SELF_SPECS:                     Driver.             (line   71)
+* DUMPFILE_FORMAT:                       Filesystem.         (line   67)
+* DWARF2_ASM_LINE_DEBUG_INFO:            SDB and DWARF.      (line   36)
+* DWARF2_DEBUGGING_INFO:                 SDB and DWARF.      (line   13)
+* DWARF2_FRAME_INFO:                     SDB and DWARF.      (line   30)
+* DWARF2_FRAME_REG_OUT:                  Frame Registers.    (line  136)
+* DWARF2_UNWIND_INFO:                    Exception Region Output.
+                                                             (line   40)
+* DWARF_ALT_FRAME_RETURN_COLUMN:         Frame Layout.       (line  152)
+* DWARF_CIE_DATA_ALIGNMENT:              Exception Region Output.
+                                                             (line   75)
+* DWARF_FRAME_REGISTERS:                 Frame Registers.    (line   96)
+* DWARF_FRAME_REGNUM:                    Frame Registers.    (line  128)
+* DWARF_REG_TO_UNWIND_COLUMN:            Frame Registers.    (line  120)
+* DWARF_ZERO_REG:                        Frame Layout.       (line  163)
+* DYNAMIC_CHAIN_ADDRESS:                 Frame Layout.       (line   92)
+* E in constraint:                       Simple Constraints. (line   79)
+* earlyclobber operand:                  Modifiers.          (line   25)
+* edge:                                  Edges.              (line    6)
+* edge in the flow graph:                Edges.              (line    6)
+* edge iterators:                        Edges.              (line   15)
+* edge splitting:                        Maintaining the CFG.
+                                                             (line  118)
+* EDGE_ABNORMAL:                         Edges.              (line  128)
+* EDGE_ABNORMAL, EDGE_ABNORMAL_CALL:     Edges.              (line  171)
+* EDGE_ABNORMAL, EDGE_EH:                Edges.              (line   96)
+* EDGE_ABNORMAL, EDGE_SIBCALL:           Edges.              (line  122)
+* EDGE_FALLTHRU, force_nonfallthru:      Edges.              (line   86)
+* EDOM, implicit usage:                  Library Calls.      (line   58)
+* EH_FRAME_IN_DATA_SECTION:              Exception Region Output.
+                                                             (line   20)
+* EH_FRAME_SECTION_NAME:                 Exception Region Output.
+                                                             (line   10)
+* eh_return instruction pattern:         Standard Names.     (line 1285)
+* EH_RETURN_DATA_REGNO:                  Exception Handling. (line    7)
+* EH_RETURN_HANDLER_RTX:                 Exception Handling. (line   39)
+* EH_RETURN_STACKADJ_RTX:                Exception Handling. (line   22)
+* EH_TABLES_CAN_BE_READ_ONLY:            Exception Region Output.
+                                                             (line   29)
+* EH_USES:                               Function Entry.     (line  158)
+* ei_edge:                               Edges.              (line   43)
+* ei_end_p:                              Edges.              (line   27)
+* ei_last:                               Edges.              (line   23)
+* ei_next:                               Edges.              (line   35)
+* ei_one_before_end_p:                   Edges.              (line   31)
+* ei_prev:                               Edges.              (line   39)
+* ei_safe_safe:                          Edges.              (line   47)
+* ei_start:                              Edges.              (line   19)
+* ELIGIBLE_FOR_EPILOGUE_DELAY:           Function Entry.     (line  169)
+* ELIMINABLE_REGS:                       Elimination.        (line   47)
+* ELSE_CLAUSE:                           Statements for C++. (line    6)
+* Embedded C:                            Fixed-point fractional library routines.
+                                                             (line    6)
+* EMIT_MODE_SET:                         Mode Switching.     (line   74)
+* Empty Statements:                      Empty Statements.   (line    6)
+* EMPTY_CLASS_EXPR:                      Statements for C++. (line    6)
+* EMPTY_FIELD_BOUNDARY:                  Storage Layout.     (line  296)
+* Emulated TLS:                          Emulated TLS.       (line    6)
+* ENABLE_EXECUTE_STACK:                  Trampolines.        (line  109)
+* enabled:                               Disable Insn Alternatives.
+                                                             (line    6)
+* ENDFILE_SPEC:                          Driver.             (line  218)
+* endianness:                            Portability.        (line   21)
+* ENTRY_BLOCK_PTR, EXIT_BLOCK_PTR:       Basic Blocks.       (line   28)
+* enum machine_mode:                     Machine Modes.      (line    6)
+* enum reg_class:                        Register Classes.   (line   65)
+* ENUMERAL_TYPE:                         Types.              (line    6)
+* epilogue:                              Function Entry.     (line    6)
+* epilogue instruction pattern:          Standard Names.     (line 1317)
+* EPILOGUE_USES:                         Function Entry.     (line  152)
+* eq:                                    Comparisons.        (line   52)
+* eq and attributes:                     Expressions.        (line   64)
+* eq_attr:                               Expressions.        (line   85)
+* EQ_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* equal:                                 Comparisons.        (line   52)
+* errno, implicit usage:                 Library Calls.      (line   70)
+* EXACT_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* examining SSA_NAMEs:                   SSA.                (line  218)
+* exception handling <1>:                Edges.              (line   96)
+* exception handling:                    Exception Handling. (line    6)
+* exception_receiver instruction pattern: Standard Names.    (line 1249)
+* exclamation point:                     Multi-Alternative.  (line   47)
+* exclusion_set:                         Processor pipeline description.
+                                                             (line  220)
+* exclusive-or, bitwise:                 Arithmetic.         (line  163)
+* EXIT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* EXIT_IGNORE_STACK:                     Function Entry.     (line  140)
+* expander definitions:                  Expander Definitions.
+                                                             (line    6)
+* expM2 instruction pattern:             Standard Names.     (line  497)
+* EXPR_FILENAME:                         Working with declarations.
+                                                             (line   14)
+* EXPR_LINENO:                           Working with declarations.
+                                                             (line   20)
+* expr_list:                             Insns.              (line  545)
+* EXPR_STMT:                             Statements for C++. (line    6)
+* EXPR_STMT_EXPR:                        Statements for C++. (line    6)
+* expression:                            Expression trees.   (line    6)
+* expression codes:                      RTL Objects.        (line   47)
+* extendMN2 instruction pattern:         Standard Names.     (line  808)
+* extensible constraints:                Simple Constraints. (line  163)
+* EXTRA_ADDRESS_CONSTRAINT:              Old Constraints.    (line  123)
+* EXTRA_CONSTRAINT:                      Old Constraints.    (line   74)
+* EXTRA_CONSTRAINT_STR:                  Old Constraints.    (line   95)
+* EXTRA_MEMORY_CONSTRAINT:               Old Constraints.    (line  100)
+* EXTRA_SPECS:                           Driver.             (line  245)
+* extv instruction pattern:              Standard Names.     (line  844)
+* extzv instruction pattern:             Standard Names.     (line  859)
+* F in constraint:                       Simple Constraints. (line   84)
+* FAIL:                                  Expander Definitions.
+                                                             (line   80)
+* fall-thru:                             Edges.              (line   69)
+* FATAL_EXIT_CODE:                       Host Misc.          (line    6)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                             (line    6)
+* features, optional, in system conventions: Run-time Target.
+                                                             (line   59)
+* ffs:                                   Arithmetic.         (line  206)
+* ffsM2 instruction pattern:             Standard Names.     (line  611)
+* FIELD_DECL:                            Declarations.       (line    6)
+* file_end_indicate_exec_stack:          File Framework.     (line   41)
+* files and passes of the compiler:      Passes.             (line    6)
+* files, generated:                      Files.              (line    6)
+* final_absence_set:                     Processor pipeline description.
+                                                             (line  220)
+* FINAL_PRESCAN_INSN:                    Instruction Output. (line   46)
+* final_presence_set:                    Processor pipeline description.
+                                                             (line  220)
+* final_scan_insn:                       Function Entry.     (line  181)
+* final_sequence:                        Instruction Output. (line  130)
+* FIND_BASE_TERM:                        Addressing Modes.   (line  115)
+* FINI_ARRAY_SECTION_ASM_OP:             Sections.           (line  115)
+* FINI_SECTION_ASM_OP:                   Sections.           (line  100)
+* finite state automaton minimization:   Processor pipeline description.
+                                                             (line  301)
+* FIRST_PARM_OFFSET:                     Frame Layout.       (line   67)
+* FIRST_PARM_OFFSET and virtual registers: Regs and Memory.  (line   65)
+* FIRST_PSEUDO_REGISTER:                 Register Basics.    (line    9)
+* FIRST_STACK_REG:                       Stack Registers.    (line   27)
+* FIRST_VIRTUAL_REGISTER:                Regs and Memory.    (line   51)
+* fix:                                   Conversions.        (line   66)
+* FIX_TRUNC_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* fix_truncMN2 instruction pattern:      Standard Names.     (line  795)
+* fixed register:                        Register Basics.    (line   15)
+* fixed-point fractional library:        Fixed-point fractional library routines.
+                                                             (line    6)
+* FIXED_CONVERT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* FIXED_CST:                             Constant expressions.
+                                                             (line    6)
+* FIXED_POINT_TYPE:                      Types.              (line    6)
+* FIXED_REGISTERS:                       Register Basics.    (line   15)
+* fixed_regs:                            Register Basics.    (line   59)
+* fixMN2 instruction pattern:            Standard Names.     (line  775)
+* FIXUNS_TRUNC_LIKE_FIX_TRUNC:           Misc.               (line  100)
+* fixuns_truncMN2 instruction pattern:   Standard Names.     (line  799)
+* fixunsMN2 instruction pattern:         Standard Names.     (line  784)
+* flags in RTL expression:               Flags.              (line    6)
+* float:                                 Conversions.        (line   58)
+* FLOAT_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* float_extend:                          Conversions.        (line   33)
+* FLOAT_LIB_COMPARE_RETURNS_BOOL:        Library Calls.      (line   25)
+* FLOAT_STORE_FLAG_VALUE:                Misc.               (line  301)
+* float_truncate:                        Conversions.        (line   53)
+* FLOAT_TYPE_SIZE:                       Type Layout.        (line   49)
+* FLOAT_WORDS_BIG_ENDIAN:                Storage Layout.     (line   43)
+* FLOAT_WORDS_BIG_ENDIAN, (lack of) effect on subreg: Regs and Memory.
+                                                             (line  226)
+* floating point and cross compilation:  Floating Point.     (line    6)
+* Floating Point Emulation:              Target Fragment.    (line   15)
+* floating point emulation library, US Software GOFAST: Library Calls.
+                                                             (line   44)
+* floatMN2 instruction pattern:          Standard Names.     (line  767)
+* floatunsMN2 instruction pattern:       Standard Names.     (line  771)
+* FLOOR_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* FLOOR_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* floorM2 instruction pattern:           Standard Names.     (line  532)
+* flow-insensitive alias analysis:       Alias analysis.     (line    6)
+* flow-sensitive alias analysis:         Alias analysis.     (line    6)
+* fmodM3 instruction pattern:            Standard Names.     (line  463)
+* FOR_BODY:                              Statements for C++. (line    6)
+* FOR_COND:                              Statements for C++. (line    6)
+* FOR_EXPR:                              Statements for C++. (line    6)
+* FOR_INIT_STMT:                         Statements for C++. (line    6)
+* FOR_STMT:                              Statements for C++. (line    6)
+* FORCE_CODE_SECTION_ALIGN:              Sections.           (line  146)
+* force_reg:                             Standard Names.     (line   36)
+* fract_convert:                         Conversions.        (line   82)
+* FRACT_TYPE_SIZE:                       Type Layout.        (line   68)
+* fractional types:                      Fixed-point fractional library routines.
+                                                             (line    6)
+* fractMN2 instruction pattern:          Standard Names.     (line  817)
+* fractunsMN2 instruction pattern:       Standard Names.     (line  832)
+* frame layout:                          Frame Layout.       (line    6)
+* FRAME_ADDR_RTX:                        Frame Layout.       (line  116)
+* FRAME_GROWS_DOWNWARD:                  Frame Layout.       (line   31)
+* FRAME_GROWS_DOWNWARD and virtual registers: Regs and Memory.
+                                                             (line   69)
+* FRAME_POINTER_CFA_OFFSET:              Frame Layout.       (line  212)
+* frame_pointer_needed:                  Function Entry.     (line   34)
+* FRAME_POINTER_REGNUM:                  Frame Registers.    (line   14)
+* FRAME_POINTER_REGNUM and virtual registers: Regs and Memory.
+                                                             (line   74)
+* frame_pointer_rtx:                     Frame Registers.    (line   90)
+* frame_related:                         Flags.              (line  247)
+* frame_related, in insn, call_insn, jump_insn, barrier, and set: Flags.
+                                                             (line  125)
+* frame_related, in mem:                 Flags.              (line  103)
+* frame_related, in reg:                 Flags.              (line  112)
+* frame_related, in symbol_ref:          Flags.              (line  183)
+* frequency, count, BB_FREQ_BASE:        Profile information.
+                                                             (line   30)
+* ftruncM2 instruction pattern:          Standard Names.     (line  790)
+* function <1>:                          Functions for C++.  (line    6)
+* function:                              Functions.          (line    6)
+* function call conventions:             Interface.          (line    6)
+* function entry and exit:               Function Entry.     (line    6)
+* function entry point, alternate function entry point: Edges.
+                                                             (line  180)
+* function properties:                   Function Properties.
+                                                             (line    6)
+* function-call insns:                   Calls.              (line    6)
+* FUNCTION_ARG:                          Register Arguments. (line   11)
+* FUNCTION_ARG_ADVANCE:                  Register Arguments. (line  185)
+* FUNCTION_ARG_BOUNDARY:                 Register Arguments. (line  238)
+* FUNCTION_ARG_OFFSET:                   Register Arguments. (line  196)
+* FUNCTION_ARG_PADDING:                  Register Arguments. (line  203)
+* FUNCTION_ARG_REGNO_P:                  Register Arguments. (line  243)
+* FUNCTION_BOUNDARY:                     Storage Layout.     (line  171)
+* FUNCTION_DECL <1>:                     Functions.          (line    6)
+* FUNCTION_DECL:                         Functions for C++.  (line    6)
+* FUNCTION_INCOMING_ARG:                 Register Arguments. (line   68)
+* FUNCTION_MODE:                         Misc.               (line  356)
+* FUNCTION_OUTGOING_VALUE:               Scalar Return.      (line   56)
+* FUNCTION_PROFILER:                     Profiling.          (line    9)
+* FUNCTION_TYPE:                         Types.              (line    6)
+* FUNCTION_VALUE:                        Scalar Return.      (line   52)
+* FUNCTION_VALUE_REGNO_P:                Scalar Return.      (line   81)
+* functions, leaf:                       Leaf Functions.     (line    6)
+* fundamental type:                      Types.              (line    6)
+* g in constraint:                       Simple Constraints. (line  110)
+* G in constraint:                       Simple Constraints. (line   88)
+* garbage collector, invocation:         Invoking the garbage collector.
+                                                             (line    6)
+* GCC and portability:                   Portability.        (line    6)
+* GCC_DRIVER_HOST_INITIALIZATION:        Host Misc.          (line   36)
+* gcov_type:                             Profile information.
+                                                             (line   41)
+* ge:                                    Comparisons.        (line   72)
+* ge and attributes:                     Expressions.        (line   64)
+* GE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* GEN_ERRNO_RTX:                         Library Calls.      (line   71)
+* gencodes:                              RTL passes.         (line   18)
+* general_operand:                       Machine-Independent Predicates.
+                                                             (line  105)
+* GENERAL_REGS:                          Register Classes.   (line   23)
+* generated files:                       Files.              (line    6)
+* generating assembler output:           Output Statement.   (line    6)
+* generating insns:                      RTL Template.       (line    6)
+* GENERIC <1>:                           Gimplification pass.
+                                                             (line   12)
+* GENERIC <2>:                           GENERIC.            (line    6)
+* GENERIC:                               Parsing pass.       (line    6)
+* generic predicates:                    Machine-Independent Predicates.
+                                                             (line    6)
+* genflags:                              RTL passes.         (line   18)
+* get_attr:                              Expressions.        (line   80)
+* get_attr_length:                       Insn Lengths.       (line   46)
+* GET_CLASS_NARROWEST_MODE:              Machine Modes.      (line  333)
+* GET_CODE:                              RTL Objects.        (line   47)
+* get_frame_size:                        Elimination.        (line   34)
+* get_insns:                             Insns.              (line   34)
+* get_last_insn:                         Insns.              (line   34)
+* GET_MODE:                              Machine Modes.      (line  280)
+* GET_MODE_ALIGNMENT:                    Machine Modes.      (line  320)
+* GET_MODE_BITSIZE:                      Machine Modes.      (line  304)
+* GET_MODE_CLASS:                        Machine Modes.      (line  294)
+* GET_MODE_FBIT:                         Machine Modes.      (line  311)
+* GET_MODE_IBIT:                         Machine Modes.      (line  307)
+* GET_MODE_MASK:                         Machine Modes.      (line  315)
+* GET_MODE_NAME:                         Machine Modes.      (line  291)
+* GET_MODE_NUNITS:                       Machine Modes.      (line  329)
+* GET_MODE_SIZE:                         Machine Modes.      (line  301)
+* GET_MODE_UNIT_SIZE:                    Machine Modes.      (line  323)
+* GET_MODE_WIDER_MODE:                   Machine Modes.      (line  297)
+* GET_RTX_CLASS:                         RTL Classes.        (line    6)
+* GET_RTX_FORMAT:                        RTL Classes.        (line  130)
+* GET_RTX_LENGTH:                        RTL Classes.        (line  127)
+* geu:                                   Comparisons.        (line   72)
+* geu and attributes:                    Expressions.        (line   64)
+* GGC:                                   Type Information.   (line    6)
+* ggc_collect:                           Invoking the garbage collector.
+                                                             (line    6)
+* GIMPLE <1>:                            Parsing pass.       (line   14)
+* GIMPLE <2>:                            Gimplification pass.
+                                                             (line    6)
+* GIMPLE:                                GIMPLE.             (line    6)
+* GIMPLE Exception Handling:             GIMPLE Exception Handling.
+                                                             (line    6)
+* GIMPLE instruction set:                GIMPLE instruction set.
+                                                             (line    6)
+* GIMPLE sequences:                      GIMPLE sequences.   (line    6)
+* gimple_addresses_taken:                Manipulating GIMPLE statements.
+                                                             (line   90)
+* GIMPLE_ASM:                            GIMPLE_ASM.         (line    6)
+* gimple_asm_clear_volatile:             GIMPLE_ASM.         (line   63)
+* gimple_asm_clobber_op:                 GIMPLE_ASM.         (line   46)
+* gimple_asm_input_op:                   GIMPLE_ASM.         (line   30)
+* gimple_asm_output_op:                  GIMPLE_ASM.         (line   38)
+* gimple_asm_set_clobber_op:             GIMPLE_ASM.         (line   50)
+* gimple_asm_set_input_op:               GIMPLE_ASM.         (line   34)
+* gimple_asm_set_output_op:              GIMPLE_ASM.         (line   42)
+* gimple_asm_set_volatile:               GIMPLE_ASM.         (line   60)
+* gimple_asm_volatile_p:                 GIMPLE_ASM.         (line   57)
+* GIMPLE_ASSIGN:                         GIMPLE_ASSIGN.      (line    6)
+* gimple_assign_cast_p:                  GIMPLE_ASSIGN.      (line   89)
+* gimple_assign_lhs:                     GIMPLE_ASSIGN.      (line   51)
+* gimple_assign_rhs1:                    GIMPLE_ASSIGN.      (line   57)
+* gimple_assign_rhs2:                    GIMPLE_ASSIGN.      (line   64)
+* gimple_assign_set_lhs:                 GIMPLE_ASSIGN.      (line   71)
+* gimple_assign_set_rhs1:                GIMPLE_ASSIGN.      (line   74)
+* gimple_assign_set_rhs2:                GIMPLE_ASSIGN.      (line   85)
+* gimple_bb:                             Manipulating GIMPLE statements.
+                                                             (line   18)
+* GIMPLE_BIND:                           GIMPLE_BIND.        (line    6)
+* gimple_bind_add_seq:                   GIMPLE_BIND.        (line   36)
+* gimple_bind_add_stmt:                  GIMPLE_BIND.        (line   32)
+* gimple_bind_append_vars:               GIMPLE_BIND.        (line   19)
+* gimple_bind_block:                     GIMPLE_BIND.        (line   40)
+* gimple_bind_body:                      GIMPLE_BIND.        (line   23)
+* gimple_bind_set_block:                 GIMPLE_BIND.        (line   45)
+* gimple_bind_set_body:                  GIMPLE_BIND.        (line   28)
+* gimple_bind_set_vars:                  GIMPLE_BIND.        (line   15)
+* gimple_bind_vars:                      GIMPLE_BIND.        (line   12)
+* gimple_block:                          Manipulating GIMPLE statements.
+                                                             (line   21)
+* gimple_build_asm:                      GIMPLE_ASM.         (line    8)
+* gimple_build_asm_vec:                  GIMPLE_ASM.         (line   17)
+* gimple_build_assign:                   GIMPLE_ASSIGN.      (line    7)
+* gimple_build_assign_with_ops:          GIMPLE_ASSIGN.      (line   30)
+* gimple_build_bind:                     GIMPLE_BIND.        (line    8)
+* gimple_build_call:                     GIMPLE_CALL.        (line    8)
+* gimple_build_call_from_tree:           GIMPLE_CALL.        (line   16)
+* gimple_build_call_vec:                 GIMPLE_CALL.        (line   25)
+* gimple_build_catch:                    GIMPLE_CATCH.       (line    8)
+* gimple_build_cond:                     GIMPLE_COND.        (line    8)
+* gimple_build_cond_from_tree:           GIMPLE_COND.        (line   16)
+* gimple_build_debug_bind:               GIMPLE_DEBUG.       (line    8)
+* gimple_build_eh_filter:                GIMPLE_EH_FILTER.   (line    8)
+* gimple_build_goto:                     GIMPLE_LABEL.       (line   18)
+* gimple_build_label:                    GIMPLE_LABEL.       (line    7)
+* gimple_build_nop:                      GIMPLE_NOP.         (line    7)
+* gimple_build_omp_atomic_load:          GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line    8)
+* gimple_build_omp_atomic_store:         GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line    7)
+* gimple_build_omp_continue:             GIMPLE_OMP_CONTINUE.
+                                                             (line    8)
+* gimple_build_omp_critical:             GIMPLE_OMP_CRITICAL.
+                                                             (line    8)
+* gimple_build_omp_for:                  GIMPLE_OMP_FOR.     (line    9)
+* gimple_build_omp_master:               GIMPLE_OMP_MASTER.  (line    7)
+* gimple_build_omp_ordered:              GIMPLE_OMP_ORDERED. (line    7)
+* gimple_build_omp_parallel:             GIMPLE_OMP_PARALLEL.
+                                                             (line    8)
+* gimple_build_omp_return:               GIMPLE_OMP_RETURN.  (line    7)
+* gimple_build_omp_section:              GIMPLE_OMP_SECTION. (line    7)
+* gimple_build_omp_sections:             GIMPLE_OMP_SECTIONS.
+                                                             (line    8)
+* gimple_build_omp_sections_switch:      GIMPLE_OMP_SECTIONS.
+                                                             (line   14)
+* gimple_build_omp_single:               GIMPLE_OMP_SINGLE.  (line    8)
+* gimple_build_resx:                     GIMPLE_RESX.        (line    7)
+* gimple_build_return:                   GIMPLE_RETURN.      (line    7)
+* gimple_build_switch:                   GIMPLE_SWITCH.      (line    8)
+* gimple_build_switch_vec:               GIMPLE_SWITCH.      (line   16)
+* gimple_build_try:                      GIMPLE_TRY.         (line    8)
+* gimple_build_wce:                      GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line    7)
+* GIMPLE_CALL:                           GIMPLE_CALL.        (line    6)
+* gimple_call_arg:                       GIMPLE_CALL.        (line   66)
+* gimple_call_cannot_inline_p:           GIMPLE_CALL.        (line   91)
+* gimple_call_chain:                     GIMPLE_CALL.        (line   57)
+* gimple_call_copy_skip_args:            GIMPLE_CALL.        (line   98)
+* gimple_call_fn:                        GIMPLE_CALL.        (line   38)
+* gimple_call_fndecl:                    GIMPLE_CALL.        (line   46)
+* gimple_call_lhs:                       GIMPLE_CALL.        (line   29)
+* gimple_call_mark_uninlinable:          GIMPLE_CALL.        (line   88)
+* gimple_call_noreturn_p:                GIMPLE_CALL.        (line   94)
+* gimple_call_return_type:               GIMPLE_CALL.        (line   54)
+* gimple_call_set_arg:                   GIMPLE_CALL.        (line   76)
+* gimple_call_set_chain:                 GIMPLE_CALL.        (line   60)
+* gimple_call_set_fn:                    GIMPLE_CALL.        (line   42)
+* gimple_call_set_fndecl:                GIMPLE_CALL.        (line   51)
+* gimple_call_set_lhs:                   GIMPLE_CALL.        (line   35)
+* gimple_call_set_tail:                  GIMPLE_CALL.        (line   80)
+* gimple_call_tail_p:                    GIMPLE_CALL.        (line   85)
+* GIMPLE_CATCH:                          GIMPLE_CATCH.       (line    6)
+* gimple_catch_handler:                  GIMPLE_CATCH.       (line   20)
+* gimple_catch_set_handler:              GIMPLE_CATCH.       (line   28)
+* gimple_catch_set_types:                GIMPLE_CATCH.       (line   24)
+* gimple_catch_types:                    GIMPLE_CATCH.       (line   13)
+* gimple_code:                           Manipulating GIMPLE statements.
+                                                             (line   15)
+* GIMPLE_COND:                           GIMPLE_COND.        (line    6)
+* gimple_cond_false_label:               GIMPLE_COND.        (line   60)
+* gimple_cond_lhs:                       GIMPLE_COND.        (line   30)
+* gimple_cond_make_false:                GIMPLE_COND.        (line   64)
+* gimple_cond_make_true:                 GIMPLE_COND.        (line   67)
+* gimple_cond_rhs:                       GIMPLE_COND.        (line   38)
+* gimple_cond_set_code:                  GIMPLE_COND.        (line   26)
+* gimple_cond_set_false_label:           GIMPLE_COND.        (line   56)
+* gimple_cond_set_lhs:                   GIMPLE_COND.        (line   34)
+* gimple_cond_set_rhs:                   GIMPLE_COND.        (line   42)
+* gimple_cond_set_true_label:            GIMPLE_COND.        (line   51)
+* gimple_cond_true_label:                GIMPLE_COND.        (line   46)
+* gimple_copy:                           Manipulating GIMPLE statements.
+                                                             (line  147)
+* GIMPLE_DEBUG:                          GIMPLE_DEBUG.       (line    6)
+* GIMPLE_DEBUG_BIND:                     GIMPLE_DEBUG.       (line    6)
+* gimple_debug_bind_get_value:           GIMPLE_DEBUG.       (line   48)
+* gimple_debug_bind_get_var:             GIMPLE_DEBUG.       (line   45)
+* gimple_debug_bind_has_value_p:         GIMPLE_DEBUG.       (line   69)
+* gimple_debug_bind_reset_value:         GIMPLE_DEBUG.       (line   65)
+* gimple_debug_bind_set_value:           GIMPLE_DEBUG.       (line   61)
+* gimple_debug_bind_set_var:             GIMPLE_DEBUG.       (line   57)
+* GIMPLE_EH_FILTER:                      GIMPLE_EH_FILTER.   (line    6)
+* gimple_eh_filter_failure:              GIMPLE_EH_FILTER.   (line   19)
+* gimple_eh_filter_must_not_throw:       GIMPLE_EH_FILTER.   (line   33)
+* gimple_eh_filter_set_failure:          GIMPLE_EH_FILTER.   (line   29)
+* gimple_eh_filter_set_must_not_throw:   GIMPLE_EH_FILTER.   (line   37)
+* gimple_eh_filter_set_types:            GIMPLE_EH_FILTER.   (line   24)
+* gimple_eh_filter_types:                GIMPLE_EH_FILTER.   (line   12)
+* gimple_expr_type:                      Manipulating GIMPLE statements.
+                                                             (line   24)
+* gimple_goto_dest:                      GIMPLE_LABEL.       (line   21)
+* gimple_goto_set_dest:                  GIMPLE_LABEL.       (line   24)
+* gimple_has_mem_ops:                    Manipulating GIMPLE statements.
+                                                             (line   72)
+* gimple_has_ops:                        Manipulating GIMPLE statements.
+                                                             (line   69)
+* gimple_has_volatile_ops:               Manipulating GIMPLE statements.
+                                                             (line  134)
+* GIMPLE_LABEL:                          GIMPLE_LABEL.       (line    6)
+* gimple_label_label:                    GIMPLE_LABEL.       (line   11)
+* gimple_label_set_label:                GIMPLE_LABEL.       (line   14)
+* gimple_loaded_syms:                    Manipulating GIMPLE statements.
+                                                             (line  122)
+* gimple_locus:                          Manipulating GIMPLE statements.
+                                                             (line   42)
+* gimple_locus_empty_p:                  Manipulating GIMPLE statements.
+                                                             (line   48)
+* gimple_modified_p:                     Manipulating GIMPLE statements.
+                                                             (line  130)
+* gimple_no_warning_p:                   Manipulating GIMPLE statements.
+                                                             (line   51)
+* GIMPLE_NOP:                            GIMPLE_NOP.         (line    6)
+* gimple_nop_p:                          GIMPLE_NOP.         (line   10)
+* gimple_num_ops <1>:                    Logical Operators.  (line   76)
+* gimple_num_ops:                        Manipulating GIMPLE statements.
+                                                             (line   75)
+* GIMPLE_OMP_ATOMIC_LOAD:                GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line    6)
+* gimple_omp_atomic_load_lhs:            GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   17)
+* gimple_omp_atomic_load_rhs:            GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   24)
+* gimple_omp_atomic_load_set_lhs:        GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   14)
+* gimple_omp_atomic_load_set_rhs:        GIMPLE_OMP_ATOMIC_LOAD.
+                                                             (line   21)
+* GIMPLE_OMP_ATOMIC_STORE:               GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line    6)
+* gimple_omp_atomic_store_set_val:       GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line   12)
+* gimple_omp_atomic_store_val:           GIMPLE_OMP_ATOMIC_STORE.
+                                                             (line   15)
+* gimple_omp_body:                       GIMPLE_OMP_PARALLEL.
+                                                             (line   24)
+* GIMPLE_OMP_CONTINUE:                   GIMPLE_OMP_CONTINUE.
+                                                             (line    6)
+* gimple_omp_continue_control_def:       GIMPLE_OMP_CONTINUE.
+                                                             (line   13)
+* gimple_omp_continue_control_def_ptr:   GIMPLE_OMP_CONTINUE.
+                                                             (line   17)
+* gimple_omp_continue_control_use:       GIMPLE_OMP_CONTINUE.
+                                                             (line   24)
+* gimple_omp_continue_control_use_ptr:   GIMPLE_OMP_CONTINUE.
+                                                             (line   28)
+* gimple_omp_continue_set_control_def:   GIMPLE_OMP_CONTINUE.
+                                                             (line   20)
+* gimple_omp_continue_set_control_use:   GIMPLE_OMP_CONTINUE.
+                                                             (line   31)
+* GIMPLE_OMP_CRITICAL:                   GIMPLE_OMP_CRITICAL.
+                                                             (line    6)
+* gimple_omp_critical_name:              GIMPLE_OMP_CRITICAL.
+                                                             (line   13)
+* gimple_omp_critical_set_name:          GIMPLE_OMP_CRITICAL.
+                                                             (line   21)
+* GIMPLE_OMP_FOR:                        GIMPLE_OMP_FOR.     (line    6)
+* gimple_omp_for_clauses:                GIMPLE_OMP_FOR.     (line   20)
+* gimple_omp_for_final:                  GIMPLE_OMP_FOR.     (line   51)
+* gimple_omp_for_incr:                   GIMPLE_OMP_FOR.     (line   61)
+* gimple_omp_for_index:                  GIMPLE_OMP_FOR.     (line   31)
+* gimple_omp_for_initial:                GIMPLE_OMP_FOR.     (line   41)
+* gimple_omp_for_pre_body:               GIMPLE_OMP_FOR.     (line   70)
+* gimple_omp_for_set_clauses:            GIMPLE_OMP_FOR.     (line   27)
+* gimple_omp_for_set_cond:               GIMPLE_OMP_FOR.     (line   80)
+* gimple_omp_for_set_final:              GIMPLE_OMP_FOR.     (line   58)
+* gimple_omp_for_set_incr:               GIMPLE_OMP_FOR.     (line   67)
+* gimple_omp_for_set_index:              GIMPLE_OMP_FOR.     (line   38)
+* gimple_omp_for_set_initial:            GIMPLE_OMP_FOR.     (line   48)
+* gimple_omp_for_set_pre_body:           GIMPLE_OMP_FOR.     (line   75)
+* GIMPLE_OMP_MASTER:                     GIMPLE_OMP_MASTER.  (line    6)
+* GIMPLE_OMP_ORDERED:                    GIMPLE_OMP_ORDERED. (line    6)
+* GIMPLE_OMP_PARALLEL:                   GIMPLE_OMP_PARALLEL.
+                                                             (line    6)
+* gimple_omp_parallel_child_fn:          GIMPLE_OMP_PARALLEL.
+                                                             (line   42)
+* gimple_omp_parallel_clauses:           GIMPLE_OMP_PARALLEL.
+                                                             (line   31)
+* gimple_omp_parallel_combined_p:        GIMPLE_OMP_PARALLEL.
+                                                             (line   16)
+* gimple_omp_parallel_data_arg:          GIMPLE_OMP_PARALLEL.
+                                                             (line   54)
+* gimple_omp_parallel_set_child_fn:      GIMPLE_OMP_PARALLEL.
+                                                             (line   51)
+* gimple_omp_parallel_set_clauses:       GIMPLE_OMP_PARALLEL.
+                                                             (line   38)
+* gimple_omp_parallel_set_combined_p:    GIMPLE_OMP_PARALLEL.
+                                                             (line   20)
+* gimple_omp_parallel_set_data_arg:      GIMPLE_OMP_PARALLEL.
+                                                             (line   62)
+* GIMPLE_OMP_RETURN:                     GIMPLE_OMP_RETURN.  (line    6)
+* gimple_omp_return_nowait_p:            GIMPLE_OMP_RETURN.  (line   14)
+* gimple_omp_return_set_nowait:          GIMPLE_OMP_RETURN.  (line   11)
+* GIMPLE_OMP_SECTION:                    GIMPLE_OMP_SECTION. (line    6)
+* gimple_omp_section_last_p:             GIMPLE_OMP_SECTION. (line   12)
+* gimple_omp_section_set_last:           GIMPLE_OMP_SECTION. (line   16)
+* GIMPLE_OMP_SECTIONS:                   GIMPLE_OMP_SECTIONS.
+                                                             (line    6)
+* gimple_omp_sections_clauses:           GIMPLE_OMP_SECTIONS.
+                                                             (line   30)
+* gimple_omp_sections_control:           GIMPLE_OMP_SECTIONS.
+                                                             (line   17)
+* gimple_omp_sections_set_clauses:       GIMPLE_OMP_SECTIONS.
+                                                             (line   37)
+* gimple_omp_sections_set_control:       GIMPLE_OMP_SECTIONS.
+                                                             (line   26)
+* gimple_omp_set_body:                   GIMPLE_OMP_PARALLEL.
+                                                             (line   28)
+* GIMPLE_OMP_SINGLE:                     GIMPLE_OMP_SINGLE.  (line    6)
+* gimple_omp_single_clauses:             GIMPLE_OMP_SINGLE.  (line   14)
+* gimple_omp_single_set_clauses:         GIMPLE_OMP_SINGLE.  (line   21)
+* gimple_op <1>:                         Logical Operators.  (line   79)
+* gimple_op:                             Manipulating GIMPLE statements.
+                                                             (line   81)
+* GIMPLE_PHI:                            GIMPLE_PHI.         (line    6)
+* gimple_phi_capacity:                   GIMPLE_PHI.         (line   10)
+* gimple_phi_num_args:                   GIMPLE_PHI.         (line   14)
+* gimple_phi_result:                     GIMPLE_PHI.         (line   19)
+* gimple_phi_set_arg:                    GIMPLE_PHI.         (line   33)
+* gimple_phi_set_result:                 GIMPLE_PHI.         (line   25)
+* GIMPLE_RESX:                           GIMPLE_RESX.        (line    6)
+* gimple_resx_region:                    GIMPLE_RESX.        (line   13)
+* gimple_resx_set_region:                GIMPLE_RESX.        (line   16)
+* GIMPLE_RETURN:                         GIMPLE_RETURN.      (line    6)
+* gimple_return_retval:                  GIMPLE_RETURN.      (line   10)
+* gimple_return_set_retval:              GIMPLE_RETURN.      (line   14)
+* gimple_rhs_class:                      GIMPLE_ASSIGN.      (line   46)
+* gimple_seq_add_seq:                    GIMPLE sequences.   (line   32)
+* gimple_seq_add_stmt:                   GIMPLE sequences.   (line   26)
+* gimple_seq_alloc:                      GIMPLE sequences.   (line   62)
+* gimple_seq_copy:                       GIMPLE sequences.   (line   67)
+* gimple_seq_deep_copy:                  GIMPLE sequences.   (line   37)
+* gimple_seq_empty_p:                    GIMPLE sequences.   (line   70)
+* gimple_seq_first:                      GIMPLE sequences.   (line   44)
+* gimple_seq_init:                       GIMPLE sequences.   (line   59)
+* gimple_seq_last:                       GIMPLE sequences.   (line   47)
+* gimple_seq_reverse:                    GIMPLE sequences.   (line   40)
+* gimple_seq_set_first:                  GIMPLE sequences.   (line   55)
+* gimple_seq_set_last:                   GIMPLE sequences.   (line   51)
+* gimple_seq_singleton_p:                GIMPLE sequences.   (line   79)
+* gimple_set_block:                      Manipulating GIMPLE statements.
+                                                             (line   39)
+* gimple_set_def_ops:                    Manipulating GIMPLE statements.
+                                                             (line   98)
+* gimple_set_has_volatile_ops:           Manipulating GIMPLE statements.
+                                                             (line  138)
+* gimple_set_locus:                      Manipulating GIMPLE statements.
+                                                             (line   45)
+* gimple_set_op:                         Manipulating GIMPLE statements.
+                                                             (line   87)
+* gimple_set_plf:                        Manipulating GIMPLE statements.
+                                                             (line   62)
+* gimple_set_use_ops:                    Manipulating GIMPLE statements.
+                                                             (line  105)
+* gimple_set_vdef_ops:                   Manipulating GIMPLE statements.
+                                                             (line  119)
+* gimple_set_visited:                    Manipulating GIMPLE statements.
+                                                             (line   55)
+* gimple_set_vuse_ops:                   Manipulating GIMPLE statements.
+                                                             (line  112)
+* gimple_statement_base:                 Tuple representation.
+                                                             (line   14)
+* gimple_statement_with_ops:             Tuple representation.
+                                                             (line   96)
+* gimple_stored_syms:                    Manipulating GIMPLE statements.
+                                                             (line  126)
+* GIMPLE_SWITCH:                         GIMPLE_SWITCH.      (line    6)
+* gimple_switch_default_label:           GIMPLE_SWITCH.      (line   46)
+* gimple_switch_index:                   GIMPLE_SWITCH.      (line   31)
+* gimple_switch_label:                   GIMPLE_SWITCH.      (line   37)
+* gimple_switch_num_labels:              GIMPLE_SWITCH.      (line   22)
+* gimple_switch_set_default_label:       GIMPLE_SWITCH.      (line   50)
+* gimple_switch_set_index:               GIMPLE_SWITCH.      (line   34)
+* gimple_switch_set_label:               GIMPLE_SWITCH.      (line   42)
+* gimple_switch_set_num_labels:          GIMPLE_SWITCH.      (line   27)
+* GIMPLE_TRY:                            GIMPLE_TRY.         (line    6)
+* gimple_try_catch_is_cleanup:           GIMPLE_TRY.         (line   20)
+* gimple_try_cleanup:                    GIMPLE_TRY.         (line   27)
+* gimple_try_eval:                       GIMPLE_TRY.         (line   23)
+* gimple_try_flags:                      GIMPLE_TRY.         (line   16)
+* gimple_try_set_catch_is_cleanup:       GIMPLE_TRY.         (line   32)
+* gimple_try_set_cleanup:                GIMPLE_TRY.         (line   41)
+* gimple_try_set_eval:                   GIMPLE_TRY.         (line   36)
+* gimple_visited_p:                      Manipulating GIMPLE statements.
+                                                             (line   58)
+* gimple_wce_cleanup:                    GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   11)
+* gimple_wce_cleanup_eh_only:            GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   18)
+* gimple_wce_set_cleanup:                GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   15)
+* gimple_wce_set_cleanup_eh_only:        GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line   22)
+* GIMPLE_WITH_CLEANUP_EXPR:              GIMPLE_WITH_CLEANUP_EXPR.
+                                                             (line    6)
+* gimplification <1>:                    Gimplification pass.
+                                                             (line    6)
+* gimplification:                        Parsing pass.       (line   14)
+* gimplifier:                            Parsing pass.       (line   14)
+* gimplify_assign:                       GIMPLE_ASSIGN.      (line   19)
+* gimplify_expr:                         Gimplification pass.
+                                                             (line   18)
+* gimplify_function_tree:                Gimplification pass.
+                                                             (line   18)
+* GLOBAL_INIT_PRIORITY:                  Functions for C++.  (line  141)
+* global_regs:                           Register Basics.    (line   59)
+* GO_IF_LEGITIMATE_ADDRESS:              Addressing Modes.   (line   91)
+* GO_IF_MODE_DEPENDENT_ADDRESS:          Addressing Modes.   (line  192)
+* GOFAST, floating point emulation library: Library Calls.   (line   44)
+* gofast_maybe_init_libfuncs:            Library Calls.      (line   44)
+* greater than:                          Comparisons.        (line   60)
+* gsi_after_labels:                      Sequence iterators. (line   76)
+* gsi_bb:                                Sequence iterators. (line   83)
+* gsi_commit_edge_inserts:               Sequence iterators. (line  194)
+* gsi_commit_one_edge_insert:            Sequence iterators. (line  190)
+* gsi_end_p:                             Sequence iterators. (line   60)
+* gsi_for_stmt:                          Sequence iterators. (line  157)
+* gsi_insert_after:                      Sequence iterators. (line  147)
+* gsi_insert_before:                     Sequence iterators. (line  136)
+* gsi_insert_on_edge:                    Sequence iterators. (line  174)
+* gsi_insert_on_edge_immediate:          Sequence iterators. (line  185)
+* gsi_insert_seq_after:                  Sequence iterators. (line  154)
+* gsi_insert_seq_before:                 Sequence iterators. (line  143)
+* gsi_insert_seq_on_edge:                Sequence iterators. (line  179)
+* gsi_last:                              Sequence iterators. (line   50)
+* gsi_last_bb:                           Sequence iterators. (line   56)
+* gsi_link_after:                        Sequence iterators. (line  115)
+* gsi_link_before:                       Sequence iterators. (line  105)
+* gsi_link_seq_after:                    Sequence iterators. (line  110)
+* gsi_link_seq_before:                   Sequence iterators. (line   99)
+* gsi_move_after:                        Sequence iterators. (line  161)
+* gsi_move_before:                       Sequence iterators. (line  166)
+* gsi_move_to_bb_end:                    Sequence iterators. (line  171)
+* gsi_next:                              Sequence iterators. (line   66)
+* gsi_one_before_end_p:                  Sequence iterators. (line   63)
+* gsi_prev:                              Sequence iterators. (line   69)
+* gsi_remove:                            Sequence iterators. (line   90)
+* gsi_replace:                           Sequence iterators. (line  130)
+* gsi_seq:                               Sequence iterators. (line   86)
+* gsi_split_seq_after:                   Sequence iterators. (line  120)
+* gsi_split_seq_before:                  Sequence iterators. (line  125)
+* gsi_start:                             Sequence iterators. (line   40)
+* gsi_start_bb:                          Sequence iterators. (line   46)
+* gsi_stmt:                              Sequence iterators. (line   72)
+* gt:                                    Comparisons.        (line   60)
+* gt and attributes:                     Expressions.        (line   64)
+* GT_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* gtu:                                   Comparisons.        (line   64)
+* gtu and attributes:                    Expressions.        (line   64)
+* GTY:                                   Type Information.   (line    6)
+* H in constraint:                       Simple Constraints. (line   88)
+* HAmode:                                Machine Modes.      (line  144)
+* HANDLE_PRAGMA_PACK_PUSH_POP:           Misc.               (line  467)
+* HANDLE_PRAGMA_PACK_WITH_EXPANSION:     Misc.               (line  478)
+* HANDLE_SYSV_PRAGMA:                    Misc.               (line  438)
+* HANDLER:                               Statements for C++. (line    6)
+* HANDLER_BODY:                          Statements for C++. (line    6)
+* HANDLER_PARMS:                         Statements for C++. (line    6)
+* hard registers:                        Regs and Memory.    (line    9)
+* HARD_FRAME_POINTER_REGNUM:             Frame Registers.    (line   20)
+* HARD_REGNO_CALL_PART_CLOBBERED:        Register Basics.    (line   53)
+* HARD_REGNO_CALLER_SAVE_MODE:           Caller Saves.       (line   20)
+* HARD_REGNO_MODE_OK:                    Values in Registers.
+                                                             (line   58)
+* HARD_REGNO_NREGS:                      Values in Registers.
+                                                             (line   11)
+* HARD_REGNO_NREGS_HAS_PADDING:          Values in Registers.
+                                                             (line   25)
+* HARD_REGNO_NREGS_WITH_PADDING:         Values in Registers.
+                                                             (line   43)
+* HARD_REGNO_RENAME_OK:                  Values in Registers.
+                                                             (line  119)
+* HAS_INIT_SECTION:                      Macros for Initialization.
+                                                             (line   19)
+* HAS_LONG_COND_BRANCH:                  Misc.               (line    9)
+* HAS_LONG_UNCOND_BRANCH:                Misc.               (line   18)
+* HAVE_DOS_BASED_FILE_SYSTEM:            Filesystem.         (line   11)
+* HAVE_POST_DECREMENT:                   Addressing Modes.   (line   12)
+* HAVE_POST_INCREMENT:                   Addressing Modes.   (line   11)
+* HAVE_POST_MODIFY_DISP:                 Addressing Modes.   (line   18)
+* HAVE_POST_MODIFY_REG:                  Addressing Modes.   (line   24)
+* HAVE_PRE_DECREMENT:                    Addressing Modes.   (line   10)
+* HAVE_PRE_INCREMENT:                    Addressing Modes.   (line    9)
+* HAVE_PRE_MODIFY_DISP:                  Addressing Modes.   (line   17)
+* HAVE_PRE_MODIFY_REG:                   Addressing Modes.   (line   23)
+* HCmode:                                Machine Modes.      (line  197)
+* HFmode:                                Machine Modes.      (line   58)
+* high:                                  Constants.          (line  109)
+* HImode:                                Machine Modes.      (line   29)
+* HImode, in insn:                       Insns.              (line  272)
+* host configuration:                    Host Config.        (line    6)
+* host functions:                        Host Common.        (line    6)
+* host hooks:                            Host Common.        (line    6)
+* host makefile fragment:                Host Fragment.      (line    6)
+* HOST_BIT_BUCKET:                       Filesystem.         (line   51)
+* HOST_EXECUTABLE_SUFFIX:                Filesystem.         (line   45)
+* HOST_HOOKS_EXTRA_SIGNALS:              Host Common.        (line   12)
+* HOST_HOOKS_GT_PCH_ALLOC_GRANULARITY:   Host Common.        (line   45)
+* HOST_HOOKS_GT_PCH_USE_ADDRESS:         Host Common.        (line   26)
+* HOST_LACKS_INODE_NUMBERS:              Filesystem.         (line   89)
+* HOST_LONG_FORMAT:                      Host Misc.          (line   45)
+* HOST_LONG_LONG_FORMAT:                 Host Misc.          (line   41)
+* HOST_OBJECT_SUFFIX:                    Filesystem.         (line   40)
+* HOST_PTR_PRINTF:                       Host Misc.          (line   49)
+* HOT_TEXT_SECTION_NAME:                 Sections.           (line   43)
+* HQmode:                                Machine Modes.      (line  107)
+* i in constraint:                       Simple Constraints. (line   60)
+* I in constraint:                       Simple Constraints. (line   71)
+* identifier:                            Identifiers.        (line    6)
+* IDENTIFIER_LENGTH:                     Identifiers.        (line   22)
+* IDENTIFIER_NODE:                       Identifiers.        (line    6)
+* IDENTIFIER_OPNAME_P:                   Identifiers.        (line   27)
+* IDENTIFIER_POINTER:                    Identifiers.        (line   17)
+* IDENTIFIER_TYPENAME_P:                 Identifiers.        (line   33)
+* IEEE 754-2008:                         Decimal float library routines.
+                                                             (line    6)
+* IF_COND:                               Statements for C++. (line    6)
+* if_marked:                             GTY Options.        (line  155)
+* IF_STMT:                               Statements for C++. (line    6)
+* if_then_else:                          Comparisons.        (line   80)
+* if_then_else and attributes:           Expressions.        (line   32)
+* if_then_else usage:                    Side Effects.       (line   56)
+* IFCVT_EXTRA_FIELDS:                    Misc.               (line  622)
+* IFCVT_INIT_EXTRA_FIELDS:               Misc.               (line  617)
+* IFCVT_MODIFY_CANCEL:                   Misc.               (line  611)
+* IFCVT_MODIFY_FINAL:                    Misc.               (line  605)
+* IFCVT_MODIFY_INSN:                     Misc.               (line  599)
+* IFCVT_MODIFY_MULTIPLE_TESTS:           Misc.               (line  592)
+* IFCVT_MODIFY_TESTS:                    Misc.               (line  581)
+* IMAGPART_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* Immediate Uses:                        SSA Operands.       (line  274)
+* immediate_operand:                     Machine-Independent Predicates.
+                                                             (line   11)
+* IMMEDIATE_PREFIX:                      Instruction Output. (line  140)
+* in_struct:                             Flags.              (line  263)
+* in_struct, in code_label and note:     Flags.              (line   59)
+* in_struct, in insn and jump_insn and call_insn: Flags.     (line   49)
+* in_struct, in insn, jump_insn and call_insn: Flags.        (line  166)
+* in_struct, in mem:                     Flags.              (line   70)
+* in_struct, in subreg:                  Flags.              (line  205)
+* include:                               Including Patterns. (line    6)
+* INCLUDE_DEFAULTS:                      Driver.             (line  430)
+* inclusive-or, bitwise:                 Arithmetic.         (line  158)
+* INCOMING_FRAME_SP_OFFSET:              Frame Layout.       (line  183)
+* INCOMING_REGNO:                        Register Basics.    (line   91)
+* INCOMING_RETURN_ADDR_RTX:              Frame Layout.       (line  139)
+* INCOMING_STACK_BOUNDARY:               Storage Layout.     (line  166)
+* INDEX_REG_CLASS:                       Register Classes.   (line  134)
+* indirect_jump instruction pattern:     Standard Names.     (line 1037)
+* indirect_operand:                      Machine-Independent Predicates.
+                                                             (line   71)
+* INDIRECT_REF:                          Storage References. (line    6)
+* INIT_ARRAY_SECTION_ASM_OP:             Sections.           (line  108)
+* INIT_CUMULATIVE_ARGS:                  Register Arguments. (line  149)
+* INIT_CUMULATIVE_INCOMING_ARGS:         Register Arguments. (line  176)
+* INIT_CUMULATIVE_LIBCALL_ARGS:          Register Arguments. (line  170)
+* INIT_ENVIRONMENT:                      Driver.             (line  369)
+* INIT_EXPANDERS:                        Per-Function Data.  (line   39)
+* INIT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* init_machine_status:                   Per-Function Data.  (line   45)
+* init_one_libfunc:                      Library Calls.      (line   15)
+* INIT_SECTION_ASM_OP <1>:               Macros for Initialization.
+                                                             (line   10)
+* INIT_SECTION_ASM_OP:                   Sections.           (line   92)
+* INITIAL_ELIMINATION_OFFSET:            Elimination.        (line   85)
+* INITIAL_FRAME_ADDRESS_RTX:             Frame Layout.       (line   83)
+* INITIAL_FRAME_POINTER_OFFSET:          Elimination.        (line   35)
+* initialization routines:               Initialization.     (line    6)
+* inlining:                              Target Attributes.  (line   87)
+* insert_insn_on_edge:                   Maintaining the CFG.
+                                                             (line  118)
+* insn:                                  Insns.              (line   63)
+* insn and /f:                           Flags.              (line  125)
+* insn and /j:                           Flags.              (line  175)
+* insn and /s:                           Flags.              (line   49)
+* insn and /u:                           Flags.              (line   39)
+* insn and /v:                           Flags.              (line   44)
+* insn attributes:                       Insn Attributes.    (line    6)
+* insn canonicalization:                 Insn Canonicalizations.
+                                                             (line    6)
+* insn includes:                         Including Patterns. (line    6)
+* insn lengths, computing:               Insn Lengths.       (line    6)
+* insn splitting:                        Insn Splitting.     (line    6)
+* insn-attr.h:                           Defining Attributes.
+                                                             (line   24)
+* INSN_ANNULLED_BRANCH_P:                Flags.              (line   39)
+* INSN_CODE:                             Insns.              (line  298)
+* INSN_DELETED_P:                        Flags.              (line   44)
+* INSN_FROM_TARGET_P:                    Flags.              (line   49)
+* insn_list:                             Insns.              (line  545)
+* INSN_REFERENCES_ARE_DELAYED:           Misc.               (line  520)
+* INSN_SETS_ARE_DELAYED:                 Misc.               (line  509)
+* INSN_UID:                              Insns.              (line   23)
+* INSN_VAR_LOCATION:                     Insns.              (line  239)
+* insns:                                 Insns.              (line    6)
+* insns, generating:                     RTL Template.       (line    6)
+* insns, recognizing:                    RTL Template.       (line    6)
+* instruction attributes:                Insn Attributes.    (line    6)
+* instruction latency time:              Processor pipeline description.
+                                                             (line  106)
+* instruction patterns:                  Patterns.           (line    6)
+* instruction splitting:                 Insn Splitting.     (line    6)
+* insv instruction pattern:              Standard Names.     (line  862)
+* int:                                   Manipulating GIMPLE statements.
+                                                             (line   66)
+* INT16_TYPE:                            Type Layout.        (line  237)
+* INT32_TYPE:                            Type Layout.        (line  238)
+* INT64_TYPE:                            Type Layout.        (line  239)
+* INT8_TYPE:                             Type Layout.        (line  236)
+* INT_FAST16_TYPE:                       Type Layout.        (line  253)
+* INT_FAST32_TYPE:                       Type Layout.        (line  254)
+* INT_FAST64_TYPE:                       Type Layout.        (line  255)
+* INT_FAST8_TYPE:                        Type Layout.        (line  252)
+* INT_LEAST16_TYPE:                      Type Layout.        (line  245)
+* INT_LEAST32_TYPE:                      Type Layout.        (line  246)
+* INT_LEAST64_TYPE:                      Type Layout.        (line  247)
+* INT_LEAST8_TYPE:                       Type Layout.        (line  244)
+* INT_TYPE_SIZE:                         Type Layout.        (line   12)
+* INTEGER_CST:                           Constant expressions.
+                                                             (line    6)
+* INTEGER_TYPE:                          Types.              (line    6)
+* Interdependence of Patterns:           Dependent Patterns. (line    6)
+* interfacing to GCC output:             Interface.          (line    6)
+* interlock delays:                      Processor pipeline description.
+                                                             (line    6)
+* intermediate representation lowering:  Parsing pass.       (line   14)
+* INTMAX_TYPE:                           Type Layout.        (line  213)
+* INTPTR_TYPE:                           Type Layout.        (line  260)
+* introduction:                          Top.                (line    6)
+* INVOKE__main:                          Macros for Initialization.
+                                                             (line   51)
+* ior:                                   Arithmetic.         (line  158)
+* ior and attributes:                    Expressions.        (line   50)
+* ior, canonicalization of:              Insn Canonicalizations.
+                                                             (line   52)
+* iorM3 instruction pattern:             Standard Names.     (line  222)
+* IRA_COVER_CLASSES:                     Register Classes.   (line  535)
+* IRA_HARD_REGNO_ADD_COST_MULTIPLIER:    Allocation Order.   (line   37)
+* IS_ASM_LOGICAL_LINE_SEPARATOR:         Data Output.        (line  120)
+* is_gimple_omp:                         GIMPLE_OMP_PARALLEL.
+                                                             (line   65)
+* iterators in .md files:                Iterators.          (line    6)
+* IV analysis on GIMPLE:                 Scalar evolutions.  (line    6)
+* IV analysis on RTL:                    loop-iv.            (line    6)
+* jump:                                  Flags.              (line  314)
+* jump instruction pattern:              Standard Names.     (line  928)
+* jump instruction patterns:             Jump Patterns.      (line    6)
+* jump instructions and set:             Side Effects.       (line   56)
+* jump, in call_insn:                    Flags.              (line  179)
+* jump, in insn:                         Flags.              (line  175)
+* jump, in mem:                          Flags.              (line   79)
+* JUMP_ALIGN:                            Alignment Output.   (line    9)
+* jump_insn:                             Insns.              (line   73)
+* jump_insn and /f:                      Flags.              (line  125)
+* jump_insn and /s:                      Flags.              (line  166)
+* jump_insn and /u:                      Flags.              (line   39)
+* jump_insn and /v:                      Flags.              (line   44)
+* JUMP_LABEL:                            Insns.              (line   80)
+* JUMP_TABLES_IN_TEXT_SECTION:           Sections.           (line  152)
+* Jumps:                                 Jumps.              (line    6)
+* LABEL_ALIGN:                           Alignment Output.   (line   52)
+* LABEL_ALIGN_AFTER_BARRIER:             Alignment Output.   (line   22)
+* LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP:    Alignment Output.   (line   30)
+* LABEL_ALIGN_MAX_SKIP:                  Alignment Output.   (line   62)
+* LABEL_ALT_ENTRY_P:                     Insns.              (line  140)
+* LABEL_ALTERNATE_NAME:                  Edges.              (line  180)
+* LABEL_DECL:                            Declarations.       (line    6)
+* LABEL_KIND:                            Insns.              (line  140)
+* LABEL_NUSES:                           Insns.              (line  136)
+* LABEL_PRESERVE_P:                      Flags.              (line   59)
+* label_ref:                             Constants.          (line   86)
+* label_ref and /v:                      Flags.              (line   65)
+* label_ref, RTL sharing:                Sharing.            (line   35)
+* LABEL_REF_NONLOCAL_P:                  Flags.              (line   65)
+* lang_hooks.gimplify_expr:              Gimplification pass.
+                                                             (line   18)
+* lang_hooks.parse_file:                 Parsing pass.       (line    6)
+* language-dependent trees:              Language-dependent trees.
+                                                             (line    6)
+* language-independent intermediate representation: Parsing pass.
+                                                             (line   14)
+* large return values:                   Aggregate Return.   (line    6)
+* LARGEST_EXPONENT_IS_NORMAL:            Storage Layout.     (line  474)
+* LAST_STACK_REG:                        Stack Registers.    (line   31)
+* LAST_VIRTUAL_REGISTER:                 Regs and Memory.    (line   51)
+* lceilMN2:                              Standard Names.     (line  597)
+* LCSSA:                                 LCSSA.              (line    6)
+* LD_FINI_SWITCH:                        Macros for Initialization.
+                                                             (line   29)
+* LD_INIT_SWITCH:                        Macros for Initialization.
+                                                             (line   25)
+* LDD_SUFFIX:                            Macros for Initialization.
+                                                             (line  116)
+* le:                                    Comparisons.        (line   76)
+* le and attributes:                     Expressions.        (line   64)
+* LE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* leaf functions:                        Leaf Functions.     (line    6)
+* leaf_function_p:                       Standard Names.     (line  999)
+* LEAF_REG_REMAP:                        Leaf Functions.     (line   39)
+* LEAF_REGISTERS:                        Leaf Functions.     (line   25)
+* left rotate:                           Arithmetic.         (line  190)
+* left shift:                            Arithmetic.         (line  168)
+* LEGITIMATE_CONSTANT_P:                 Addressing Modes.   (line  207)
+* LEGITIMATE_PIC_OPERAND_P:              PIC.                (line   31)
+* LEGITIMIZE_RELOAD_ADDRESS:             Addressing Modes.   (line  147)
+* length:                                GTY Options.        (line   50)
+* less than:                             Comparisons.        (line   68)
+* less than or equal:                    Comparisons.        (line   76)
+* leu:                                   Comparisons.        (line   76)
+* leu and attributes:                    Expressions.        (line   64)
+* lfloorMN2:                             Standard Names.     (line  592)
+* LIB2FUNCS_EXTRA:                       Target Fragment.    (line   11)
+* LIB_SPEC:                              Driver.             (line  170)
+* LIBCALL_VALUE:                         Scalar Return.      (line   60)
+* libgcc.a:                              Library Calls.      (line    6)
+* LIBGCC2_CFLAGS:                        Target Fragment.    (line    8)
+* LIBGCC2_HAS_DF_MODE:                   Type Layout.        (line  109)
+* LIBGCC2_HAS_TF_MODE:                   Type Layout.        (line  123)
+* LIBGCC2_HAS_XF_MODE:                   Type Layout.        (line  117)
+* LIBGCC2_LONG_DOUBLE_TYPE_SIZE:         Type Layout.        (line  103)
+* LIBGCC2_UNWIND_ATTRIBUTE:              Misc.               (line  982)
+* LIBGCC2_WORDS_BIG_ENDIAN:              Storage Layout.     (line   36)
+* LIBGCC_SPEC:                           Driver.             (line  178)
+* library subroutine names:              Library Calls.      (line    6)
+* LIBRARY_PATH_ENV:                      Misc.               (line  560)
+* LIMIT_RELOAD_CLASS:                    Register Classes.   (line  254)
+* Linear loop transformations framework: Lambda.             (line    6)
+* LINK_COMMAND_SPEC:                     Driver.             (line  299)
+* LINK_EH_SPEC:                          Driver.             (line  205)
+* LINK_ELIMINATE_DUPLICATE_LDIRECTORIES: Driver.             (line  309)
+* LINK_GCC_C_SEQUENCE_SPEC:              Driver.             (line  295)
+* LINK_LIBGCC_SPECIAL_1:                 Driver.             (line  290)
+* LINK_SPEC:                             Driver.             (line  163)
+* list:                                  Containers.         (line    6)
+* Liveness representation:               Liveness information.
+                                                             (line    6)
+* lo_sum:                                Arithmetic.         (line   24)
+* load address instruction:              Simple Constraints. (line  154)
+* LOAD_EXTEND_OP:                        Misc.               (line   69)
+* load_multiple instruction pattern:     Standard Names.     (line  137)
+* LOCAL_ALIGNMENT:                       Storage Layout.     (line  255)
+* LOCAL_CLASS_P:                         Classes.            (line   73)
+* LOCAL_DECL_ALIGNMENT:                  Storage Layout.     (line  279)
+* LOCAL_INCLUDE_DIR:                     Driver.             (line  376)
+* LOCAL_LABEL_PREFIX:                    Instruction Output. (line  138)
+* LOCAL_REGNO:                           Register Basics.    (line  105)
+* LOG_LINKS:                             Insns.              (line  317)
+* Logical Operators:                     Logical Operators.  (line    6)
+* logical-and, bitwise:                  Arithmetic.         (line  153)
+* logM2 instruction pattern:             Standard Names.     (line  505)
+* LONG_ACCUM_TYPE_SIZE:                  Type Layout.        (line   93)
+* LONG_DOUBLE_TYPE_SIZE:                 Type Layout.        (line   58)
+* LONG_FRACT_TYPE_SIZE:                  Type Layout.        (line   73)
+* LONG_LONG_ACCUM_TYPE_SIZE:             Type Layout.        (line   98)
+* LONG_LONG_FRACT_TYPE_SIZE:             Type Layout.        (line   78)
+* LONG_LONG_TYPE_SIZE:                   Type Layout.        (line   33)
+* LONG_TYPE_SIZE:                        Type Layout.        (line   22)
+* longjmp and automatic variables:       Interface.          (line   52)
+* Loop analysis:                         Loop representation.
+                                                             (line    6)
+* Loop manipulation:                     Loop manipulation.  (line    6)
+* Loop querying:                         Loop querying.      (line    6)
+* Loop representation:                   Loop representation.
+                                                             (line    6)
+* Loop-closed SSA form:                  LCSSA.              (line    6)
+* LOOP_ALIGN:                            Alignment Output.   (line   35)
+* LOOP_ALIGN_MAX_SKIP:                   Alignment Output.   (line   48)
+* LOOP_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* looping instruction patterns:          Looping Patterns.   (line    6)
+* lowering, language-dependent intermediate representation: Parsing pass.
+                                                             (line   14)
+* lrintMN2:                              Standard Names.     (line  582)
+* lroundMN2:                             Standard Names.     (line  587)
+* LSHIFT_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* lshiftrt:                              Arithmetic.         (line  185)
+* lshiftrt and attributes:               Expressions.        (line   64)
+* lshrM3 instruction pattern:            Standard Names.     (line  441)
+* lt:                                    Comparisons.        (line   68)
+* lt and attributes:                     Expressions.        (line   64)
+* LT_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* LTGT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* ltu:                                   Comparisons.        (line   68)
+* m in constraint:                       Simple Constraints. (line   17)
+* machine attributes:                    Target Attributes.  (line    6)
+* machine description macros:            Target Macros.      (line    6)
+* machine descriptions:                  Machine Desc.       (line    6)
+* machine mode conversions:              Conversions.        (line    6)
+* machine modes:                         Machine Modes.      (line    6)
+* machine specific constraints:          Machine Constraints.
+                                                             (line    6)
+* machine-independent predicates:        Machine-Independent Predicates.
+                                                             (line    6)
+* macros, target description:            Target Macros.      (line    6)
+* maddMN4 instruction pattern:           Standard Names.     (line  364)
+* MAKE_DECL_ONE_ONLY:                    Label Output.       (line  218)
+* make_phi_node:                         GIMPLE_PHI.         (line    7)
+* make_safe_from:                        Expander Definitions.
+                                                             (line  148)
+* makefile fragment:                     Fragments.          (line    6)
+* makefile targets:                      Makefile.           (line    6)
+* MALLOC_ABI_ALIGNMENT:                  Storage Layout.     (line  180)
+* Manipulating GIMPLE statements:        Manipulating GIMPLE statements.
+                                                             (line    6)
+* mark_hook:                             GTY Options.        (line  170)
+* marking roots:                         GGC Roots.          (line    6)
+* MASK_RETURN_ADDR:                      Exception Region Output.
+                                                             (line   35)
+* match_dup <1>:                         RTL Template.       (line   73)
+* match_dup:                             define_peephole2.   (line   28)
+* match_dup and attributes:              Insn Lengths.       (line   16)
+* match_op_dup:                          RTL Template.       (line  163)
+* match_operand:                         RTL Template.       (line   16)
+* match_operand and attributes:          Expressions.        (line   55)
+* match_operator:                        RTL Template.       (line   95)
+* match_par_dup:                         RTL Template.       (line  219)
+* match_parallel:                        RTL Template.       (line  172)
+* match_scratch <1>:                     RTL Template.       (line   58)
+* match_scratch:                         define_peephole2.   (line   28)
+* matching constraint:                   Simple Constraints. (line  132)
+* matching operands:                     Output Template.    (line   49)
+* math library:                          Soft float library routines.
+                                                             (line    6)
+* math, in RTL:                          Arithmetic.         (line    6)
+* MATH_LIBRARY:                          Misc.               (line  553)
+* matherr:                               Library Calls.      (line   58)
+* MAX_BITS_PER_WORD:                     Storage Layout.     (line   61)
+* MAX_CONDITIONAL_EXECUTE:               Misc.               (line  575)
+* MAX_FIXED_MODE_SIZE:                   Storage Layout.     (line  421)
+* MAX_MOVE_MAX:                          Misc.               (line  120)
+* MAX_OFILE_ALIGNMENT:                   Storage Layout.     (line  217)
+* MAX_REGS_PER_ADDRESS:                  Addressing Modes.   (line   43)
+* MAX_STACK_ALIGNMENT:                   Storage Layout.     (line  210)
+* maxM3 instruction pattern:             Standard Names.     (line  234)
+* may_trap_p, tree_could_trap_p:         Edges.              (line  115)
+* maybe_undef:                           GTY Options.        (line  178)
+* mcount:                                Profiling.          (line   12)
+* MD_CAN_REDIRECT_BRANCH:                Misc.               (line  712)
+* MD_EXEC_PREFIX:                        Driver.             (line  330)
+* MD_FALLBACK_FRAME_STATE_FOR:           Exception Handling. (line   98)
+* MD_HANDLE_UNWABI:                      Exception Handling. (line  118)
+* MD_STARTFILE_PREFIX:                   Driver.             (line  358)
+* MD_STARTFILE_PREFIX_1:                 Driver.             (line  364)
+* MD_UNWIND_SUPPORT:                     Exception Handling. (line   94)
+* mem:                                   Regs and Memory.    (line  374)
+* mem and /c:                            Flags.              (line   99)
+* mem and /f:                            Flags.              (line  103)
+* mem and /i:                            Flags.              (line   85)
+* mem and /j:                            Flags.              (line   79)
+* mem and /s:                            Flags.              (line   70)
+* mem and /u:                            Flags.              (line  152)
+* mem and /v:                            Flags.              (line   94)
+* mem, RTL sharing:                      Sharing.            (line   40)
+* MEM_ADDR_SPACE:                        Special Accessors.  (line   39)
+* MEM_ALIAS_SET:                         Special Accessors.  (line    9)
+* MEM_ALIGN:                             Special Accessors.  (line   36)
+* MEM_EXPR:                              Special Accessors.  (line   20)
+* MEM_IN_STRUCT_P:                       Flags.              (line   70)
+* MEM_KEEP_ALIAS_SET_P:                  Flags.              (line   79)
+* MEM_NOTRAP_P:                          Flags.              (line   99)
+* MEM_OFFSET:                            Special Accessors.  (line   28)
+* MEM_POINTER:                           Flags.              (line  103)
+* MEM_READONLY_P:                        Flags.              (line  152)
+* MEM_SCALAR_P:                          Flags.              (line   85)
+* MEM_SIZE:                              Special Accessors.  (line   31)
+* MEM_VOLATILE_P:                        Flags.              (line   94)
+* MEMBER_TYPE_FORCES_BLK:                Storage Layout.     (line  401)
+* memory model:                          Memory model.       (line    6)
+* memory reference, nonoffsettable:      Simple Constraints. (line  246)
+* memory references in constraints:      Simple Constraints. (line   17)
+* memory_barrier instruction pattern:    Standard Names.     (line 1381)
+* MEMORY_MOVE_COST:                      Costs.              (line   29)
+* memory_operand:                        Machine-Independent Predicates.
+                                                             (line   58)
+* METHOD_TYPE:                           Types.              (line    6)
+* MIN_UNITS_PER_WORD:                    Storage Layout.     (line   71)
+* MINIMUM_ALIGNMENT:                     Storage Layout.     (line  289)
+* MINIMUM_ATOMIC_ALIGNMENT:              Storage Layout.     (line  188)
+* minM3 instruction pattern:             Standard Names.     (line  234)
+* minus:                                 Arithmetic.         (line   36)
+* minus and attributes:                  Expressions.        (line   64)
+* minus, canonicalization of:            Insn Canonicalizations.
+                                                             (line   27)
+* MINUS_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* MIPS coprocessor-definition macros:    MIPS Coprocessors.  (line    6)
+* mod:                                   Arithmetic.         (line  131)
+* mod and attributes:                    Expressions.        (line   64)
+* mode classes:                          Machine Modes.      (line  219)
+* mode iterators in .md files:           Mode Iterators.     (line    6)
+* mode switching:                        Mode Switching.     (line    6)
+* MODE_ACCUM:                            Machine Modes.      (line  249)
+* MODE_AFTER:                            Mode Switching.     (line   49)
+* MODE_BASE_REG_CLASS:                   Register Classes.   (line  112)
+* MODE_BASE_REG_REG_CLASS:               Register Classes.   (line  118)
+* MODE_CC <1>:                           Machine Modes.      (line  268)
+* MODE_CC:                               MODE_CC Condition Codes.
+                                                             (line    6)
+* MODE_CODE_BASE_REG_CLASS:              Register Classes.   (line  125)
+* MODE_COMPLEX_FLOAT:                    Machine Modes.      (line  260)
+* MODE_COMPLEX_INT:                      Machine Modes.      (line  257)
+* MODE_DECIMAL_FLOAT:                    Machine Modes.      (line  237)
+* MODE_ENTRY:                            Mode Switching.     (line   54)
+* MODE_EXIT:                             Mode Switching.     (line   60)
+* MODE_FLOAT:                            Machine Modes.      (line  233)
+* MODE_FRACT:                            Machine Modes.      (line  241)
+* MODE_FUNCTION:                         Machine Modes.      (line  264)
+* MODE_INT:                              Machine Modes.      (line  225)
+* MODE_NEEDED:                           Mode Switching.     (line   42)
+* MODE_PARTIAL_INT:                      Machine Modes.      (line  229)
+* MODE_PRIORITY_TO_MODE:                 Mode Switching.     (line   66)
+* MODE_RANDOM:                           Machine Modes.      (line  273)
+* MODE_UACCUM:                           Machine Modes.      (line  253)
+* MODE_UFRACT:                           Machine Modes.      (line  245)
+* MODES_TIEABLE_P:                       Values in Registers.
+                                                             (line  129)
+* modifiers in constraints:              Modifiers.          (line    6)
+* MODIFY_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* MODIFY_JNI_METHOD_CALL:                Misc.               (line  790)
+* MODIFY_TARGET_NAME:                    Driver.             (line  385)
+* modM3 instruction pattern:             Standard Names.     (line  222)
+* modulo scheduling:                     RTL passes.         (line  131)
+* MOVE_BY_PIECES_P:                      Costs.              (line  113)
+* MOVE_MAX:                              Misc.               (line  115)
+* MOVE_MAX_PIECES:                       Costs.              (line  119)
+* MOVE_RATIO:                            Costs.              (line   97)
+* movM instruction pattern:              Standard Names.     (line   11)
+* movmemM instruction pattern:           Standard Names.     (line  654)
+* movmisalignM instruction pattern:      Standard Names.     (line  126)
+* movMODEcc instruction pattern:         Standard Names.     (line  873)
+* movstr instruction pattern:            Standard Names.     (line  689)
+* movstrictM instruction pattern:        Standard Names.     (line  120)
+* msubMN4 instruction pattern:           Standard Names.     (line  387)
+* mulhisi3 instruction pattern:          Standard Names.     (line  340)
+* mulM3 instruction pattern:             Standard Names.     (line  222)
+* mulqihi3 instruction pattern:          Standard Names.     (line  344)
+* mulsidi3 instruction pattern:          Standard Names.     (line  344)
+* mult:                                  Arithmetic.         (line   92)
+* mult and attributes:                   Expressions.        (line   64)
+* mult, canonicalization of:             Insn Canonicalizations.
+                                                             (line   27)
+* MULT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* MULTILIB_DEFAULTS:                     Driver.             (line  315)
+* MULTILIB_DIRNAMES:                     Target Fragment.    (line   64)
+* MULTILIB_EXCEPTIONS:                   Target Fragment.    (line   84)
+* MULTILIB_EXTRA_OPTS:                   Target Fragment.    (line   96)
+* MULTILIB_MATCHES:                      Target Fragment.    (line   77)
+* MULTILIB_OPTIONS:                      Target Fragment.    (line   44)
+* multiple alternative constraints:      Multi-Alternative.  (line    6)
+* MULTIPLE_SYMBOL_SPACES:                Misc.               (line  533)
+* multiplication:                        Arithmetic.         (line   92)
+* multiplication with signed saturation: Arithmetic.         (line   92)
+* multiplication with unsigned saturation: Arithmetic.       (line   92)
+* MUST_USE_SJLJ_EXCEPTIONS:              Exception Region Output.
+                                                             (line   64)
+* n in constraint:                       Simple Constraints. (line   65)
+* N_REG_CLASSES:                         Register Classes.   (line   76)
+* name:                                  Identifiers.        (line    6)
+* named address spaces:                  Named Address Spaces.
+                                                             (line    6)
+* named patterns and conditions:         Patterns.           (line   47)
+* names, pattern:                        Standard Names.     (line    6)
+* namespace, scope:                      Namespaces.         (line    6)
+* NAMESPACE_DECL <1>:                    Namespaces.         (line    6)
+* NAMESPACE_DECL:                        Declarations.       (line    6)
+* NATIVE_SYSTEM_HEADER_DIR:              Target Fragment.    (line  103)
+* ne:                                    Comparisons.        (line   56)
+* ne and attributes:                     Expressions.        (line   64)
+* NE_EXPR:                               Unary and Binary Expressions.
+                                                             (line    6)
+* nearbyintM2 instruction pattern:       Standard Names.     (line  564)
+* neg:                                   Arithmetic.         (line   81)
+* neg and attributes:                    Expressions.        (line   64)
+* neg, canonicalization of:              Insn Canonicalizations.
+                                                             (line   27)
+* NEGATE_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* negation:                              Arithmetic.         (line   81)
+* negation with signed saturation:       Arithmetic.         (line   81)
+* negation with unsigned saturation:     Arithmetic.         (line   81)
+* negM2 instruction pattern:             Standard Names.     (line  449)
+* nested functions, trampolines for:     Trampolines.        (line    6)
+* nested_ptr:                            GTY Options.        (line  185)
+* next_bb, prev_bb, FOR_EACH_BB:         Basic Blocks.       (line   10)
+* NEXT_INSN:                             Insns.              (line   30)
+* NEXT_OBJC_RUNTIME:                     Library Calls.      (line   94)
+* nil:                                   RTL Objects.        (line   73)
+* NO_DBX_BNSYM_ENSYM:                    DBX Hooks.          (line   39)
+* NO_DBX_FUNCTION_END:                   DBX Hooks.          (line   33)
+* NO_DBX_GCC_MARKER:                     File Names and DBX. (line   28)
+* NO_DBX_MAIN_SOURCE_DIRECTORY:          File Names and DBX. (line   23)
+* NO_DOLLAR_IN_LABEL:                    Misc.               (line  497)
+* NO_DOT_IN_LABEL:                       Misc.               (line  503)
+* NO_FUNCTION_CSE:                       Costs.              (line  209)
+* NO_IMPLICIT_EXTERN_C:                  Misc.               (line  376)
+* NO_PROFILE_COUNTERS:                   Profiling.          (line   28)
+* NO_REGS:                               Register Classes.   (line   17)
+* NON_LVALUE_EXPR:                       Unary and Binary Expressions.
+                                                             (line    6)
+* nondeterministic finite state automaton: Processor pipeline description.
+                                                             (line  301)
+* nonimmediate_operand:                  Machine-Independent Predicates.
+                                                             (line  101)
+* nonlocal goto handler:                 Edges.              (line  171)
+* nonlocal_goto instruction pattern:     Standard Names.     (line 1221)
+* nonlocal_goto_receiver instruction pattern: Standard Names.
+                                                             (line 1238)
+* nonmemory_operand:                     Machine-Independent Predicates.
+                                                             (line   97)
+* nonoffsettable memory reference:       Simple Constraints. (line  246)
+* nop instruction pattern:               Standard Names.     (line 1032)
+* NOP_EXPR:                              Unary and Binary Expressions.
+                                                             (line    6)
+* normal predicates:                     Predicates.         (line   31)
+* not:                                   Arithmetic.         (line  149)
+* not and attributes:                    Expressions.        (line   50)
+* not equal:                             Comparisons.        (line   56)
+* not, canonicalization of:              Insn Canonicalizations.
+                                                             (line   27)
+* note:                                  Insns.              (line  168)
+* note and /i:                           Flags.              (line   59)
+* note and /v:                           Flags.              (line   44)
+* NOTE_INSN_BASIC_BLOCK, CODE_LABEL, notes: Basic Blocks.    (line   41)
+* NOTE_INSN_BLOCK_BEG:                   Insns.              (line  193)
+* NOTE_INSN_BLOCK_END:                   Insns.              (line  193)
+* NOTE_INSN_DELETED:                     Insns.              (line  183)
+* NOTE_INSN_DELETED_LABEL:               Insns.              (line  188)
+* NOTE_INSN_EH_REGION_BEG:               Insns.              (line  199)
+* NOTE_INSN_EH_REGION_END:               Insns.              (line  199)
+* NOTE_INSN_FUNCTION_BEG:                Insns.              (line  223)
+* NOTE_INSN_LOOP_BEG:                    Insns.              (line  207)
+* NOTE_INSN_LOOP_CONT:                   Insns.              (line  213)
+* NOTE_INSN_LOOP_END:                    Insns.              (line  207)
+* NOTE_INSN_LOOP_VTOP:                   Insns.              (line  217)
+* NOTE_INSN_VAR_LOCATION:                Insns.              (line  227)
+* NOTE_LINE_NUMBER:                      Insns.              (line  168)
+* NOTE_SOURCE_FILE:                      Insns.              (line  168)
+* NOTE_VAR_LOCATION:                     Insns.              (line  227)
+* NOTICE_UPDATE_CC:                      CC0 Condition Codes.
+                                                             (line   31)
+* NUM_MACHINE_MODES:                     Machine Modes.      (line  286)
+* NUM_MODES_FOR_MODE_SWITCHING:          Mode Switching.     (line   30)
+* Number of iterations analysis:         Number of iterations.
+                                                             (line    6)
+* o in constraint:                       Simple Constraints. (line   23)
+* OBJC_GEN_METHOD_LABEL:                 Label Output.       (line  412)
+* OBJC_JBLEN:                            Misc.               (line  977)
+* OBJECT_FORMAT_COFF:                    Macros for Initialization.
+                                                             (line   97)
+* OFFSET_TYPE:                           Types.              (line    6)
+* offsettable address:                   Simple Constraints. (line   23)
+* OImode:                                Machine Modes.      (line   51)
+* Omega a solver for linear programming problems: Omega.     (line    6)
+* OMP_ATOMIC:                            OpenMP.             (line    6)
+* OMP_CLAUSE:                            OpenMP.             (line    6)
+* OMP_CONTINUE:                          OpenMP.             (line    6)
+* OMP_CRITICAL:                          OpenMP.             (line    6)
+* OMP_FOR:                               OpenMP.             (line    6)
+* OMP_MASTER:                            OpenMP.             (line    6)
+* OMP_ORDERED:                           OpenMP.             (line    6)
+* OMP_PARALLEL:                          OpenMP.             (line    6)
+* OMP_RETURN:                            OpenMP.             (line    6)
+* OMP_SECTION:                           OpenMP.             (line    6)
+* OMP_SECTIONS:                          OpenMP.             (line    6)
+* OMP_SINGLE:                            OpenMP.             (line    6)
+* one_cmplM2 instruction pattern:        Standard Names.     (line  651)
+* operand access:                        Accessors.          (line    6)
+* Operand Access Routines:               SSA Operands.       (line  119)
+* operand constraints:                   Constraints.        (line    6)
+* Operand Iterators:                     SSA Operands.       (line  119)
+* operand predicates:                    Predicates.         (line    6)
+* operand substitution:                  Output Template.    (line    6)
+* operands <1>:                          Patterns.           (line   53)
+* operands:                              SSA Operands.       (line    6)
+* Operands:                              Operands.           (line    6)
+* operator predicates:                   Predicates.         (line    6)
+* optc-gen.awk:                          Options.            (line    6)
+* Optimization infrastructure for GIMPLE: Tree SSA.          (line    6)
+* OPTIMIZATION_OPTIONS:                  Run-time Target.    (line  134)
+* OPTIMIZE_MODE_SWITCHING:               Mode Switching.     (line    9)
+* option specification files:            Options.            (line    6)
+* OPTION_DEFAULT_SPECS:                  Driver.             (line   88)
+* optional hardware or system features:  Run-time Target.    (line   59)
+* options, directory search:             Including Patterns. (line   44)
+* order of register allocation:          Allocation Order.   (line    6)
+* ORDER_REGS_FOR_LOCAL_ALLOC:            Allocation Order.   (line   23)
+* ordered_comparison_operator:           Machine-Independent Predicates.
+                                                             (line  116)
+* ORDERED_EXPR:                          Unary and Binary Expressions.
+                                                             (line    6)
+* Ordering of Patterns:                  Pattern Ordering.   (line    6)
+* ORIGINAL_REGNO:                        Special Accessors.  (line   44)
+* other register constraints:            Simple Constraints. (line  163)
+* OUTGOING_REG_PARM_STACK_SPACE:         Stack Arguments.    (line   71)
+* OUTGOING_REGNO:                        Register Basics.    (line   98)
+* output of assembler code:              File Framework.     (line    6)
+* output statements:                     Output Statement.   (line    6)
+* output templates:                      Output Template.    (line    6)
+* OUTPUT_ADDR_CONST_EXTRA:               Data Output.        (line   39)
+* output_asm_insn:                       Output Statement.   (line   53)
+* OUTPUT_QUOTED_STRING:                  File Framework.     (line   93)
+* OVERLOAD:                              Functions for C++.  (line    6)
+* OVERRIDE_ABI_FORMAT:                   Register Arguments. (line  140)
+* OVERRIDE_OPTIONS:                      Run-time Target.    (line  105)
+* OVL_CURRENT:                           Functions for C++.  (line    6)
+* OVL_NEXT:                              Functions for C++.  (line    6)
+* p in constraint:                       Simple Constraints. (line  154)
+* PAD_VARARGS_DOWN:                      Register Arguments. (line  220)
+* parallel:                              Side Effects.       (line  204)
+* param_is:                              GTY Options.        (line  113)
+* parameters, c++ abi:                   C++ ABI.            (line    6)
+* parameters, miscellaneous:             Misc.               (line    6)
+* parameters, precompiled headers:       PCH Target.         (line    6)
+* paramN_is:                             GTY Options.        (line  131)
+* parity:                                Arithmetic.         (line  232)
+* parityM2 instruction pattern:          Standard Names.     (line  645)
+* PARM_BOUNDARY:                         Storage Layout.     (line  145)
+* PARM_DECL:                             Declarations.       (line    6)
+* PARSE_LDD_OUTPUT:                      Macros for Initialization.
+                                                             (line  121)
+* passes and files of the compiler:      Passes.             (line    6)
+* passing arguments:                     Interface.          (line   36)
+* PATH_SEPARATOR:                        Filesystem.         (line   31)
+* PATTERN:                               Insns.              (line  288)
+* pattern conditions:                    Patterns.           (line   43)
+* pattern names:                         Standard Names.     (line    6)
+* Pattern Ordering:                      Pattern Ordering.   (line    6)
+* patterns:                              Patterns.           (line    6)
+* pc:                                    Regs and Memory.    (line  361)
+* pc and attributes:                     Insn Lengths.       (line   20)
+* pc, RTL sharing:                       Sharing.            (line   25)
+* PC_REGNUM:                             Register Basics.    (line  112)
+* pc_rtx:                                Regs and Memory.    (line  366)
+* PCC_BITFIELD_TYPE_MATTERS:             Storage Layout.     (line  315)
+* PCC_STATIC_STRUCT_RETURN:              Aggregate Return.   (line   65)
+* PDImode:                               Machine Modes.      (line   40)
+* peephole optimization, RTL representation: Side Effects.   (line  238)
+* peephole optimizer definitions:        Peephole Definitions.
+                                                             (line    6)
+* per-function data:                     Per-Function Data.  (line    6)
+* percent sign:                          Output Template.    (line    6)
+* PHI nodes:                             SSA.                (line   31)
+* phi_arg_d:                             GIMPLE_PHI.         (line   28)
+* PHI_ARG_DEF:                           SSA.                (line   71)
+* PHI_ARG_EDGE:                          SSA.                (line   68)
+* PHI_ARG_ELT:                           SSA.                (line   63)
+* PHI_NUM_ARGS:                          SSA.                (line   59)
+* PHI_RESULT:                            SSA.                (line   56)
+* PIC:                                   PIC.                (line    6)
+* PIC_OFFSET_TABLE_REG_CALL_CLOBBERED:   PIC.                (line   26)
+* PIC_OFFSET_TABLE_REGNUM:               PIC.                (line   16)
+* pipeline hazard recognizer:            Processor pipeline description.
+                                                             (line    6)
+* Plugins:                               Plugins.            (line    6)
+* plus:                                  Arithmetic.         (line   14)
+* plus and attributes:                   Expressions.        (line   64)
+* plus, canonicalization of:             Insn Canonicalizations.
+                                                             (line   27)
+* PLUS_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* Pmode:                                 Misc.               (line  344)
+* pmode_register_operand:                Machine-Independent Predicates.
+                                                             (line   35)
+* pointer:                               Types.              (line    6)
+* POINTER_PLUS_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* POINTER_SIZE:                          Storage Layout.     (line   83)
+* POINTER_TYPE:                          Types.              (line    6)
+* POINTERS_EXTEND_UNSIGNED:              Storage Layout.     (line   89)
+* pop_operand:                           Machine-Independent Predicates.
+                                                             (line   88)
+* popcount:                              Arithmetic.         (line  228)
+* popcountM2 instruction pattern:        Standard Names.     (line  639)
+* portability:                           Portability.        (line    6)
+* position independent code:             PIC.                (line    6)
+* post_dec:                              Incdec.             (line   25)
+* post_inc:                              Incdec.             (line   30)
+* post_modify:                           Incdec.             (line   33)
+* POSTDECREMENT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* POSTINCREMENT_EXPR:                    Unary and Binary Expressions.
+                                                             (line    6)
+* POWI_MAX_MULTS:                        Misc.               (line  845)
+* powM3 instruction pattern:             Standard Names.     (line  513)
+* pragma:                                Misc.               (line  381)
+* pre_dec:                               Incdec.             (line    8)
+* PRE_GCC3_DWARF_FRAME_REGISTERS:        Frame Registers.    (line  113)
+* pre_inc:                               Incdec.             (line   22)
+* pre_modify:                            Incdec.             (line   51)
+* PREDECREMENT_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* predefined macros:                     Run-time Target.    (line    6)
+* predicates:                            Predicates.         (line    6)
+* predicates and machine modes:          Predicates.         (line   31)
+* predication <1>:                       Conditional Execution.
+                                                             (line    6)
+* predication:                           Cond. Exec. Macros. (line    6)
+* predict.def:                           Profile information.
+                                                             (line   24)
+* PREFERRED_DEBUGGING_TYPE:              All Debuggers.      (line   42)
+* PREFERRED_OUTPUT_RELOAD_CLASS:         Register Classes.   (line  246)
+* PREFERRED_RELOAD_CLASS:                Register Classes.   (line  211)
+* PREFERRED_STACK_BOUNDARY:              Storage Layout.     (line  159)
+* prefetch:                              Side Effects.       (line  312)
+* prefetch and /v:                       Flags.              (line  232)
+* prefetch instruction pattern:          Standard Names.     (line 1360)
+* PREFETCH_SCHEDULE_BARRIER_P:           Flags.              (line  232)
+* PREINCREMENT_EXPR:                     Unary and Binary Expressions.
+                                                             (line    6)
+* presence_set:                          Processor pipeline description.
+                                                             (line  220)
+* preserving SSA form:                   SSA.                (line   76)
+* preserving virtual SSA form:           SSA.                (line  186)
+* prev_active_insn:                      define_peephole.    (line   60)
+* PREV_INSN:                             Insns.              (line   26)
+* PRINT_OPERAND:                         Instruction Output. (line   81)
+* PRINT_OPERAND_ADDRESS:                 Instruction Output. (line  109)
+* PRINT_OPERAND_PUNCT_VALID_P:           Instruction Output. (line  102)
+* probe_stack instruction pattern:       Standard Names.     (line 1213)
+* processor functional units:            Processor pipeline description.
+                                                             (line   68)
+* processor pipeline description:        Processor pipeline description.
+                                                             (line    6)
+* product:                               Arithmetic.         (line   92)
+* profile feedback:                      Profile information.
+                                                             (line   14)
+* profile representation:                Profile information.
+                                                             (line    6)
+* PROFILE_BEFORE_PROLOGUE:               Profiling.          (line   35)
+* PROFILE_HOOK:                          Profiling.          (line   23)
+* profiling, code generation:            Profiling.          (line    6)
+* program counter:                       Regs and Memory.    (line  362)
+* prologue:                              Function Entry.     (line    6)
+* prologue instruction pattern:          Standard Names.     (line 1304)
+* PROMOTE_MODE:                          Storage Layout.     (line  100)
+* pseudo registers:                      Regs and Memory.    (line    9)
+* PSImode:                               Machine Modes.      (line   32)
+* PTRDIFF_TYPE:                          Type Layout.        (line  184)
+* purge_dead_edges <1>:                  Edges.              (line  104)
+* purge_dead_edges:                      Maintaining the CFG.
+                                                             (line   93)
+* push address instruction:              Simple Constraints. (line  154)
+* PUSH_ARGS:                             Stack Arguments.    (line   18)
+* PUSH_ARGS_REVERSED:                    Stack Arguments.    (line   26)
+* push_operand:                          Machine-Independent Predicates.
+                                                             (line   81)
+* push_reload:                           Addressing Modes.   (line  171)
+* PUSH_ROUNDING:                         Stack Arguments.    (line   32)
+* pushM1 instruction pattern:            Standard Names.     (line  209)
+* PUT_CODE:                              RTL Objects.        (line   47)
+* PUT_MODE:                              Machine Modes.      (line  283)
+* PUT_REG_NOTE_KIND:                     Insns.              (line  350)
+* PUT_SDB_:                              SDB and DWARF.      (line   69)
+* QCmode:                                Machine Modes.      (line  197)
+* QFmode:                                Machine Modes.      (line   54)
+* QImode:                                Machine Modes.      (line   25)
+* QImode, in insn:                       Insns.              (line  272)
+* QQmode:                                Machine Modes.      (line  103)
+* qualified type <1>:                    Types for C++.      (line    6)
+* qualified type:                        Types.              (line    6)
+* querying function unit reservations:   Processor pipeline description.
+                                                             (line   90)
+* question mark:                         Multi-Alternative.  (line   41)
+* quotient:                              Arithmetic.         (line  111)
+* r in constraint:                       Simple Constraints. (line   56)
+* RANGE_TEST_NON_SHORT_CIRCUIT:          Costs.              (line  213)
+* RDIV_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* READONLY_DATA_SECTION_ASM_OP:          Sections.           (line   63)
+* real operands:                         SSA Operands.       (line    6)
+* REAL_ARITHMETIC:                       Floating Point.     (line   66)
+* REAL_CST:                              Constant expressions.
+                                                             (line    6)
+* REAL_LIBGCC_SPEC:                      Driver.             (line  187)
+* REAL_NM_FILE_NAME:                     Macros for Initialization.
+                                                             (line  106)
+* REAL_TYPE:                             Types.              (line    6)
+* REAL_VALUE_ABS:                        Floating Point.     (line   82)
+* REAL_VALUE_ATOF:                       Floating Point.     (line   50)
+* REAL_VALUE_FIX:                        Floating Point.     (line   41)
+* REAL_VALUE_FROM_INT:                   Floating Point.     (line   99)
+* REAL_VALUE_ISINF:                      Floating Point.     (line   59)
+* REAL_VALUE_ISNAN:                      Floating Point.     (line   62)
+* REAL_VALUE_NEGATE:                     Floating Point.     (line   79)
+* REAL_VALUE_NEGATIVE:                   Floating Point.     (line   56)
+* REAL_VALUE_TO_INT:                     Floating Point.     (line   93)
+* REAL_VALUE_TO_TARGET_DECIMAL128:       Data Output.        (line  144)
+* REAL_VALUE_TO_TARGET_DECIMAL32:        Data Output.        (line  142)
+* REAL_VALUE_TO_TARGET_DECIMAL64:        Data Output.        (line  143)
+* REAL_VALUE_TO_TARGET_DOUBLE:           Data Output.        (line  140)
+* REAL_VALUE_TO_TARGET_LONG_DOUBLE:      Data Output.        (line  141)
+* REAL_VALUE_TO_TARGET_SINGLE:           Data Output.        (line  139)
+* REAL_VALUE_TRUNCATE:                   Floating Point.     (line   86)
+* REAL_VALUE_TYPE:                       Floating Point.     (line   26)
+* REAL_VALUE_UNSIGNED_FIX:               Floating Point.     (line   45)
+* REAL_VALUES_EQUAL:                     Floating Point.     (line   32)
+* REAL_VALUES_LESS:                      Floating Point.     (line   38)
+* REALPART_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* recog_data.operand:                    Instruction Output. (line   39)
+* recognizing insns:                     RTL Template.       (line    6)
+* RECORD_TYPE <1>:                       Types.              (line    6)
+* RECORD_TYPE:                           Classes.            (line    6)
+* redirect_edge_and_branch:              Profile information.
+                                                             (line   71)
+* redirect_edge_and_branch, redirect_jump: Maintaining the CFG.
+                                                             (line  103)
+* reduc_smax_M instruction pattern:      Standard Names.     (line  240)
+* reduc_smin_M instruction pattern:      Standard Names.     (line  240)
+* reduc_splus_M instruction pattern:     Standard Names.     (line  252)
+* reduc_umax_M instruction pattern:      Standard Names.     (line  246)
+* reduc_umin_M instruction pattern:      Standard Names.     (line  246)
+* reduc_uplus_M instruction pattern:     Standard Names.     (line  258)
+* reference:                             Types.              (line    6)
+* REFERENCE_TYPE:                        Types.              (line    6)
+* reg:                                   Regs and Memory.    (line    9)
+* reg and /f:                            Flags.              (line  112)
+* reg and /i:                            Flags.              (line  107)
+* reg and /v:                            Flags.              (line  116)
+* reg, RTL sharing:                      Sharing.            (line   17)
+* REG_ALLOC_ORDER:                       Allocation Order.   (line    9)
+* REG_BR_PRED:                           Insns.              (line  531)
+* REG_BR_PROB:                           Insns.              (line  525)
+* REG_BR_PROB_BASE, BB_FREQ_BASE, count: Profile information.
+                                                             (line   82)
+* REG_BR_PROB_BASE, EDGE_FREQUENCY:      Profile information.
+                                                             (line   52)
+* REG_CC_SETTER:                         Insns.              (line  496)
+* REG_CC_USER:                           Insns.              (line  496)
+* REG_CLASS_CONTENTS:                    Register Classes.   (line   86)
+* reg_class_contents:                    Register Basics.    (line   59)
+* REG_CLASS_FROM_CONSTRAINT:             Old Constraints.    (line   35)
+* REG_CLASS_FROM_LETTER:                 Old Constraints.    (line   27)
+* REG_CLASS_NAMES:                       Register Classes.   (line   81)
+* REG_CROSSING_JUMP:                     Insns.              (line  409)
+* REG_DEAD:                              Insns.              (line  361)
+* REG_DEAD, REG_UNUSED:                  Liveness information.
+                                                             (line   32)
+* REG_DEP_ANTI:                          Insns.              (line  518)
+* REG_DEP_OUTPUT:                        Insns.              (line  514)
+* REG_DEP_TRUE:                          Insns.              (line  511)
+* REG_EH_REGION, EDGE_ABNORMAL_CALL:     Edges.              (line  110)
+* REG_EQUAL:                             Insns.              (line  424)
+* REG_EQUIV:                             Insns.              (line  424)
+* REG_EXPR:                              Special Accessors.  (line   50)
+* REG_FRAME_RELATED_EXPR:                Insns.              (line  537)
+* REG_FUNCTION_VALUE_P:                  Flags.              (line  107)
+* REG_INC:                               Insns.              (line  377)
+* reg_label and /v:                      Flags.              (line   65)
+* REG_LABEL_OPERAND:                     Insns.              (line  391)
+* REG_LABEL_TARGET:                      Insns.              (line  400)
+* reg_names <1>:                         Instruction Output. (line   93)
+* reg_names:                             Register Basics.    (line   59)
+* REG_NONNEG:                            Insns.              (line  383)
+* REG_NOTE_KIND:                         Insns.              (line  350)
+* REG_NOTES:                             Insns.              (line  324)
+* REG_OFFSET:                            Special Accessors.  (line   54)
+* REG_OK_STRICT:                         Register Classes.   (line  148)
+* REG_PARM_STACK_SPACE:                  Stack Arguments.    (line   56)
+* REG_PARM_STACK_SPACE, and FUNCTION_ARG: Register Arguments.
+                                                             (line   52)
+* REG_POINTER:                           Flags.              (line  112)
+* REG_SETJMP:                            Insns.              (line  418)
+* REG_UNUSED:                            Insns.              (line  370)
+* REG_USERVAR_P:                         Flags.              (line  116)
+* regclass_for_constraint:               C Constraint Interface.
+                                                             (line   60)
+* register allocation order:             Allocation Order.   (line    6)
+* register class definitions:            Register Classes.   (line    6)
+* register class preference constraints: Class Preferences.  (line    6)
+* register pairs:                        Values in Registers.
+                                                             (line   69)
+* Register Transfer Language (RTL):      RTL.                (line    6)
+* register usage:                        Registers.          (line    6)
+* REGISTER_MOVE_COST:                    Costs.              (line   10)
+* REGISTER_NAMES:                        Instruction Output. (line    9)
+* register_operand:                      Machine-Independent Predicates.
+                                                             (line   30)
+* REGISTER_PREFIX:                       Instruction Output. (line  137)
+* REGISTER_TARGET_PRAGMAS:               Misc.               (line  382)
+* registers arguments:                   Register Arguments. (line    6)
+* registers in constraints:              Simple Constraints. (line   56)
+* REGMODE_NATURAL_SIZE:                  Values in Registers.
+                                                             (line   50)
+* REGNO_MODE_CODE_OK_FOR_BASE_P:         Register Classes.   (line  181)
+* REGNO_MODE_OK_FOR_BASE_P:              Register Classes.   (line  154)
+* REGNO_MODE_OK_FOR_REG_BASE_P:          Register Classes.   (line  166)
+* REGNO_OK_FOR_BASE_P:                   Register Classes.   (line  140)
+* REGNO_OK_FOR_INDEX_P:                  Register Classes.   (line  194)
+* REGNO_REG_CLASS:                       Register Classes.   (line  101)
+* regs_ever_live:                        Function Entry.     (line   21)
+* regular expressions:                   Processor pipeline description.
+                                                             (line  106)
+* relative costs:                        Costs.              (line    6)
+* RELATIVE_PREFIX_NOT_LINKDIR:           Driver.             (line  325)
+* reload_completed:                      Standard Names.     (line  999)
+* reload_in instruction pattern:         Standard Names.     (line   99)
+* reload_in_progress:                    Standard Names.     (line   57)
+* reload_out instruction pattern:        Standard Names.     (line   99)
+* reloading:                             RTL passes.         (line  182)
+* remainder:                             Arithmetic.         (line  131)
+* remainderM3 instruction pattern:       Standard Names.     (line  472)
+* reorder:                               GTY Options.        (line  209)
+* representation of RTL:                 RTL.                (line    6)
+* reservation delays:                    Processor pipeline description.
+                                                             (line    6)
+* rest_of_decl_compilation:              Parsing pass.       (line   52)
+* rest_of_type_compilation:              Parsing pass.       (line   52)
+* restore_stack_block instruction pattern: Standard Names.   (line 1133)
+* restore_stack_function instruction pattern: Standard Names.
+                                                             (line 1133)
+* restore_stack_nonlocal instruction pattern: Standard Names.
+                                                             (line 1133)
+* RESULT_DECL:                           Declarations.       (line    6)
+* return:                                Side Effects.       (line   72)
+* return instruction pattern:            Standard Names.     (line  986)
+* return values in registers:            Scalar Return.      (line    6)
+* RETURN_ADDR_IN_PREVIOUS_FRAME:         Frame Layout.       (line  135)
+* RETURN_ADDR_OFFSET:                    Exception Handling. (line   60)
+* RETURN_ADDR_RTX:                       Frame Layout.       (line  124)
+* RETURN_ADDRESS_POINTER_REGNUM:         Frame Registers.    (line   51)
+* RETURN_EXPR:                           Statements for C++. (line    6)
+* RETURN_POPS_ARGS:                      Stack Arguments.    (line   90)
+* RETURN_STMT:                           Statements for C++. (line    6)
+* return_val:                            Flags.              (line  299)
+* return_val, in call_insn:              Flags.              (line   24)
+* return_val, in mem:                    Flags.              (line   85)
+* return_val, in reg:                    Flags.              (line  107)
+* return_val, in symbol_ref:             Flags.              (line  220)
+* returning aggregate values:            Aggregate Return.   (line    6)
+* returning structures and unions:       Interface.          (line   10)
+* reverse probability:                   Profile information.
+                                                             (line   66)
+* REVERSE_CONDEXEC_PREDICATES_P:         Cond. Exec. Macros. (line   11)
+* REVERSE_CONDITION:                     MODE_CC Condition Codes.
+                                                             (line   87)
+* REVERSIBLE_CC_MODE:                    MODE_CC Condition Codes.
+                                                             (line   73)
+* right rotate:                          Arithmetic.         (line  190)
+* right shift:                           Arithmetic.         (line  185)
+* rintM2 instruction pattern:            Standard Names.     (line  572)
+* RISC:                                  Processor pipeline description.
+                                                             (line  220)
+* roots, marking:                        GGC Roots.          (line    6)
+* rotate:                                Arithmetic.         (line  190)
+* rotatert:                              Arithmetic.         (line  190)
+* rotlM3 instruction pattern:            Standard Names.     (line  441)
+* rotrM3 instruction pattern:            Standard Names.     (line  441)
+* ROUND_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* ROUND_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* ROUND_TOWARDS_ZERO:                    Storage Layout.     (line  465)
+* ROUND_TYPE_ALIGN:                      Storage Layout.     (line  412)
+* roundM2 instruction pattern:           Standard Names.     (line  548)
+* RSHIFT_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* RTL addition:                          Arithmetic.         (line   14)
+* RTL addition with signed saturation:   Arithmetic.         (line   14)
+* RTL addition with unsigned saturation: Arithmetic.         (line   14)
+* RTL classes:                           RTL Classes.        (line    6)
+* RTL comparison:                        Arithmetic.         (line   43)
+* RTL comparison operations:             Comparisons.        (line    6)
+* RTL constant expression types:         Constants.          (line    6)
+* RTL constants:                         Constants.          (line    6)
+* RTL declarations:                      RTL Declarations.   (line    6)
+* RTL difference:                        Arithmetic.         (line   36)
+* RTL expression:                        RTL Objects.        (line    6)
+* RTL expressions for arithmetic:        Arithmetic.         (line    6)
+* RTL format:                            RTL Classes.        (line   71)
+* RTL format characters:                 RTL Classes.        (line   76)
+* RTL function-call insns:               Calls.              (line    6)
+* RTL insn template:                     RTL Template.       (line    6)
+* RTL integers:                          RTL Objects.        (line    6)
+* RTL memory expressions:                Regs and Memory.    (line    6)
+* RTL object types:                      RTL Objects.        (line    6)
+* RTL postdecrement:                     Incdec.             (line    6)
+* RTL postincrement:                     Incdec.             (line    6)
+* RTL predecrement:                      Incdec.             (line    6)
+* RTL preincrement:                      Incdec.             (line    6)
+* RTL register expressions:              Regs and Memory.    (line    6)
+* RTL representation:                    RTL.                (line    6)
+* RTL side effect expressions:           Side Effects.       (line    6)
+* RTL strings:                           RTL Objects.        (line    6)
+* RTL structure sharing assumptions:     Sharing.            (line    6)
+* RTL subtraction:                       Arithmetic.         (line   36)
+* RTL subtraction with signed saturation: Arithmetic.        (line   36)
+* RTL subtraction with unsigned saturation: Arithmetic.      (line   36)
+* RTL sum:                               Arithmetic.         (line   14)
+* RTL vectors:                           RTL Objects.        (line    6)
+* RTL_CONST_CALL_P:                      Flags.              (line   19)
+* RTL_CONST_OR_PURE_CALL_P:              Flags.              (line   29)
+* RTL_LOOPING_CONST_OR_PURE_CALL_P:      Flags.              (line   33)
+* RTL_PURE_CALL_P:                       Flags.              (line   24)
+* RTX (See RTL):                         RTL Objects.        (line    6)
+* RTX codes, classes of:                 RTL Classes.        (line    6)
+* RTX_FRAME_RELATED_P:                   Flags.              (line  125)
+* run-time conventions:                  Interface.          (line    6)
+* run-time target specification:         Run-time Target.    (line    6)
+* s in constraint:                       Simple Constraints. (line   92)
+* same_type_p:                           Types.              (line   88)
+* SAmode:                                Machine Modes.      (line  148)
+* sat_fract:                             Conversions.        (line   90)
+* satfractMN2 instruction pattern:       Standard Names.     (line  825)
+* satfractunsMN2 instruction pattern:    Standard Names.     (line  838)
+* satisfies_constraint_:                 C Constraint Interface.
+                                                             (line   47)
+* SAVE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* save_stack_block instruction pattern:  Standard Names.     (line 1133)
+* save_stack_function instruction pattern: Standard Names.   (line 1133)
+* save_stack_nonlocal instruction pattern: Standard Names.   (line 1133)
+* SBSS_SECTION_ASM_OP:                   Sections.           (line   77)
+* Scalar evolutions:                     Scalar evolutions.  (line    6)
+* scalars, returned as values:           Scalar Return.      (line    6)
+* SCHED_GROUP_P:                         Flags.              (line  166)
+* SCmode:                                Machine Modes.      (line  197)
+* scratch:                               Regs and Memory.    (line  298)
+* scratch operands:                      Regs and Memory.    (line  298)
+* scratch, RTL sharing:                  Sharing.            (line   35)
+* scratch_operand:                       Machine-Independent Predicates.
+                                                             (line   50)
+* SDATA_SECTION_ASM_OP:                  Sections.           (line   58)
+* SDB_ALLOW_FORWARD_REFERENCES:          SDB and DWARF.      (line   87)
+* SDB_ALLOW_UNKNOWN_REFERENCES:          SDB and DWARF.      (line   82)
+* SDB_DEBUGGING_INFO:                    SDB and DWARF.      (line    9)
+* SDB_DELIM:                             SDB and DWARF.      (line   75)
+* SDB_OUTPUT_SOURCE_LINE:                SDB and DWARF.      (line   92)
+* SDmode:                                Machine Modes.      (line   85)
+* sdot_prodM instruction pattern:        Standard Names.     (line  264)
+* search options:                        Including Patterns. (line   44)
+* SECONDARY_INPUT_RELOAD_CLASS:          Register Classes.   (line  350)
+* SECONDARY_MEMORY_NEEDED:               Register Classes.   (line  406)
+* SECONDARY_MEMORY_NEEDED_MODE:          Register Classes.   (line  425)
+* SECONDARY_MEMORY_NEEDED_RTX:           Register Classes.   (line  416)
+* SECONDARY_OUTPUT_RELOAD_CLASS:         Register Classes.   (line  351)
+* SECONDARY_RELOAD_CLASS:                Register Classes.   (line  349)
+* SELECT_CC_MODE:                        MODE_CC Condition Codes.
+                                                             (line    7)
+* sequence:                              Side Effects.       (line  254)
+* Sequence iterators:                    Sequence iterators. (line    6)
+* set:                                   Side Effects.       (line   15)
+* set and /f:                            Flags.              (line  125)
+* SET_ASM_OP:                            Label Output.       (line  390)
+* set_attr:                              Tagging Insns.      (line   31)
+* set_attr_alternative:                  Tagging Insns.      (line   49)
+* set_bb_seq:                            GIMPLE sequences.   (line   76)
+* SET_BY_PIECES_P:                       Costs.              (line  154)
+* SET_DEST:                              Side Effects.       (line   69)
+* SET_IS_RETURN_P:                       Flags.              (line  175)
+* SET_LABEL_KIND:                        Insns.              (line  140)
+* set_optab_libfunc:                     Library Calls.      (line   15)
+* SET_RATIO:                             Costs.              (line  142)
+* SET_SRC:                               Side Effects.       (line   69)
+* SET_TYPE_STRUCTURAL_EQUALITY:          Types.              (line   83)
+* setmemM instruction pattern:           Standard Names.     (line  697)
+* SETUP_FRAME_ADDRESSES:                 Frame Layout.       (line  102)
+* SF_SIZE:                               Type Layout.        (line  129)
+* SFmode:                                Machine Modes.      (line   66)
+* sharing of RTL components:             Sharing.            (line    6)
+* shift:                                 Arithmetic.         (line  168)
+* SHIFT_COUNT_TRUNCATED:                 Misc.               (line  127)
+* SHLIB_SUFFIX:                          Macros for Initialization.
+                                                             (line  129)
+* SHORT_ACCUM_TYPE_SIZE:                 Type Layout.        (line   83)
+* SHORT_FRACT_TYPE_SIZE:                 Type Layout.        (line   63)
+* SHORT_IMMEDIATES_SIGN_EXTEND:          Misc.               (line   96)
+* SHORT_TYPE_SIZE:                       Type Layout.        (line   16)
+* sibcall_epilogue instruction pattern:  Standard Names.     (line 1330)
+* sibling call:                          Edges.              (line  122)
+* SIBLING_CALL_P:                        Flags.              (line  179)
+* SIG_ATOMIC_TYPE:                       Type Layout.        (line  235)
+* sign_extend:                           Conversions.        (line   23)
+* sign_extract:                          Bit-Fields.         (line    8)
+* sign_extract, canonicalization of:     Insn Canonicalizations.
+                                                             (line   88)
+* signed division:                       Arithmetic.         (line  111)
+* signed division with signed saturation: Arithmetic.        (line  111)
+* signed maximum:                        Arithmetic.         (line  136)
+* signed minimum:                        Arithmetic.         (line  136)
+* SImode:                                Machine Modes.      (line   37)
+* simple constraints:                    Simple Constraints. (line    6)
+* sincos math function, implicit usage:  Library Calls.      (line   84)
+* sinM2 instruction pattern:             Standard Names.     (line  489)
+* SIZE_ASM_OP:                           Label Output.       (line   23)
+* SIZE_TYPE:                             Type Layout.        (line  168)
+* skip:                                  GTY Options.        (line   76)
+* SLOW_BYTE_ACCESS:                      Costs.              (line   66)
+* SLOW_UNALIGNED_ACCESS:                 Costs.              (line   81)
+* SMALL_REGISTER_CLASSES:                Register Classes.   (line  448)
+* smax:                                  Arithmetic.         (line  136)
+* smin:                                  Arithmetic.         (line  136)
+* sms, swing, software pipelining:       RTL passes.         (line  131)
+* smulM3_highpart instruction pattern:   Standard Names.     (line  356)
+* soft float library:                    Soft float library routines.
+                                                             (line    6)
+* special:                               GTY Options.        (line  229)
+* special predicates:                    Predicates.         (line   31)
+* SPECS:                                 Target Fragment.    (line  108)
+* speed of instructions:                 Costs.              (line    6)
+* split_block:                           Maintaining the CFG.
+                                                             (line  110)
+* splitting instructions:                Insn Splitting.     (line    6)
+* SQmode:                                Machine Modes.      (line  111)
+* sqrt:                                  Arithmetic.         (line  202)
+* sqrtM2 instruction pattern:            Standard Names.     (line  455)
+* square root:                           Arithmetic.         (line  202)
+* ss_abs:                                Arithmetic.         (line  195)
+* ss_ashift:                             Arithmetic.         (line  168)
+* ss_div:                                Arithmetic.         (line  111)
+* ss_minus:                              Arithmetic.         (line   36)
+* ss_mult:                               Arithmetic.         (line   92)
+* ss_neg:                                Arithmetic.         (line   81)
+* ss_plus:                               Arithmetic.         (line   14)
+* ss_truncate:                           Conversions.        (line   43)
+* SSA:                                   SSA.                (line    6)
+* SSA_NAME_DEF_STMT:                     SSA.                (line  221)
+* SSA_NAME_VERSION:                      SSA.                (line  226)
+* ssaddM3 instruction pattern:           Standard Names.     (line  222)
+* ssashlM3 instruction pattern:          Standard Names.     (line  431)
+* ssdivM3 instruction pattern:           Standard Names.     (line  222)
+* ssmaddMN4 instruction pattern:         Standard Names.     (line  379)
+* ssmsubMN4 instruction pattern:         Standard Names.     (line  403)
+* ssmulM3 instruction pattern:           Standard Names.     (line  222)
+* ssnegM2 instruction pattern:           Standard Names.     (line  449)
+* sssubM3 instruction pattern:           Standard Names.     (line  222)
+* ssum_widenM3 instruction pattern:      Standard Names.     (line  274)
+* stack arguments:                       Stack Arguments.    (line    6)
+* stack frame layout:                    Frame Layout.       (line    6)
+* stack smashing protection:             Stack Smashing Protection.
+                                                             (line    6)
+* STACK_ALIGNMENT_NEEDED:                Frame Layout.       (line   48)
+* STACK_BOUNDARY:                        Storage Layout.     (line  151)
+* STACK_CHECK_BUILTIN:                   Stack Checking.     (line   32)
+* STACK_CHECK_FIXED_FRAME_SIZE:          Stack Checking.     (line   83)
+* STACK_CHECK_MAX_FRAME_SIZE:            Stack Checking.     (line   74)
+* STACK_CHECK_MAX_VAR_SIZE:              Stack Checking.     (line   90)
+* STACK_CHECK_MOVING_SP:                 Stack Checking.     (line   54)
+* STACK_CHECK_PROBE_INTERVAL_EXP:        Stack Checking.     (line   46)
+* STACK_CHECK_PROTECT:                   Stack Checking.     (line   63)
+* STACK_CHECK_STATIC_BUILTIN:            Stack Checking.     (line   39)
+* STACK_DYNAMIC_OFFSET:                  Frame Layout.       (line   75)
+* STACK_DYNAMIC_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   83)
+* STACK_GROWS_DOWNWARD:                  Frame Layout.       (line    9)
+* STACK_PARMS_IN_REG_PARM_AREA:          Stack Arguments.    (line   81)
+* STACK_POINTER_OFFSET:                  Frame Layout.       (line   58)
+* STACK_POINTER_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   93)
+* STACK_POINTER_REGNUM:                  Frame Registers.    (line    9)
+* STACK_POINTER_REGNUM and virtual registers: Regs and Memory.
+                                                             (line   83)
+* stack_pointer_rtx:                     Frame Registers.    (line   90)
+* stack_protect_set instruction pattern: Standard Names.     (line 1501)
+* stack_protect_test instruction pattern: Standard Names.    (line 1511)
+* STACK_PUSH_CODE:                       Frame Layout.       (line   17)
+* STACK_REG_COVER_CLASS:                 Stack Registers.    (line   23)
+* STACK_REGS:                            Stack Registers.    (line   20)
+* STACK_SAVEAREA_MODE:                   Storage Layout.     (line  428)
+* STACK_SIZE_MODE:                       Storage Layout.     (line  440)
+* STACK_SLOT_ALIGNMENT:                  Storage Layout.     (line  266)
+* standard pattern names:                Standard Names.     (line    6)
+* STANDARD_INCLUDE_COMPONENT:            Driver.             (line  425)
+* STANDARD_INCLUDE_DIR:                  Driver.             (line  417)
+* STANDARD_STARTFILE_PREFIX:             Driver.             (line  337)
+* STANDARD_STARTFILE_PREFIX_1:           Driver.             (line  344)
+* STANDARD_STARTFILE_PREFIX_2:           Driver.             (line  351)
+* STARTFILE_SPEC:                        Driver.             (line  210)
+* STARTING_FRAME_OFFSET:                 Frame Layout.       (line   39)
+* STARTING_FRAME_OFFSET and virtual registers: Regs and Memory.
+                                                             (line   74)
+* Statement and operand traversals:      Statement and operand traversals.
+                                                             (line    6)
+* Statement Sequences:                   Statement Sequences.
+                                                             (line    6)
+* statements <1>:                        Statements for C++. (line    6)
+* statements:                            Function Properties.
+                                                             (line    6)
+* Statements:                            Statements.         (line    6)
+* Static profile estimation:             Profile information.
+                                                             (line   24)
+* static single assignment:              SSA.                (line    6)
+* STATIC_CHAIN_INCOMING_REGNUM:          Frame Registers.    (line   64)
+* STATIC_CHAIN_REGNUM:                   Frame Registers.    (line   63)
+* stdarg.h and register arguments:       Register Arguments. (line   47)
+* STDC_0_IN_SYSTEM_HEADERS:              Misc.               (line  365)
+* STMT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* STMT_IS_FULL_EXPR_P:                   Statements for C++. (line   22)
+* storage layout:                        Storage Layout.     (line    6)
+* STORE_BY_PIECES_P:                     Costs.              (line  161)
+* STORE_FLAG_VALUE:                      Misc.               (line  216)
+* store_multiple instruction pattern:    Standard Names.     (line  160)
+* strcpy:                                Storage Layout.     (line  236)
+* STRICT_ALIGNMENT:                      Storage Layout.     (line  310)
+* strict_low_part:                       RTL Declarations.   (line    9)
+* strict_memory_address_p:               Addressing Modes.   (line  181)
+* STRING_CST:                            Constant expressions.
+                                                             (line    6)
+* STRING_POOL_ADDRESS_P:                 Flags.              (line  183)
+* strlenM instruction pattern:           Standard Names.     (line  760)
+* structure value address:               Aggregate Return.   (line    6)
+* STRUCTURE_SIZE_BOUNDARY:               Storage Layout.     (line  302)
+* structures, returning:                 Interface.          (line   10)
+* subM3 instruction pattern:             Standard Names.     (line  222)
+* SUBOBJECT:                             Statements for C++. (line    6)
+* SUBOBJECT_CLEANUP:                     Statements for C++. (line    6)
+* subreg:                                Regs and Memory.    (line   97)
+* subreg and /s:                         Flags.              (line  205)
+* subreg and /u:                         Flags.              (line  198)
+* subreg and /u and /v:                  Flags.              (line  188)
+* subreg, in strict_low_part:            RTL Declarations.   (line    9)
+* SUBREG_BYTE:                           Regs and Memory.    (line  289)
+* SUBREG_PROMOTED_UNSIGNED_P:            Flags.              (line  188)
+* SUBREG_PROMOTED_UNSIGNED_SET:          Flags.              (line  198)
+* SUBREG_PROMOTED_VAR_P:                 Flags.              (line  205)
+* SUBREG_REG:                            Regs and Memory.    (line  289)
+* SUCCESS_EXIT_CODE:                     Host Misc.          (line   12)
+* SUPPORTS_INIT_PRIORITY:                Macros for Initialization.
+                                                             (line   58)
+* SUPPORTS_ONE_ONLY:                     Label Output.       (line  227)
+* SUPPORTS_WEAK:                         Label Output.       (line  208)
+* SWITCH_BODY:                           Statements for C++. (line    6)
+* SWITCH_COND:                           Statements for C++. (line    6)
+* SWITCH_CURTAILS_COMPILATION:           Driver.             (line   33)
+* SWITCH_STMT:                           Statements for C++. (line    6)
+* SWITCH_TAKES_ARG:                      Driver.             (line    9)
+* SWITCHES_NEED_SPACES:                  Driver.             (line   47)
+* SYMBOL_FLAG_ANCHOR:                    Special Accessors.  (line  110)
+* SYMBOL_FLAG_EXTERNAL:                  Special Accessors.  (line   92)
+* SYMBOL_FLAG_FUNCTION:                  Special Accessors.  (line   85)
+* SYMBOL_FLAG_HAS_BLOCK_INFO:            Special Accessors.  (line  106)
+* SYMBOL_FLAG_LOCAL:                     Special Accessors.  (line   88)
+* SYMBOL_FLAG_SMALL:                     Special Accessors.  (line   97)
+* SYMBOL_FLAG_TLS_SHIFT:                 Special Accessors.  (line  101)
+* symbol_ref:                            Constants.          (line   76)
+* symbol_ref and /f:                     Flags.              (line  183)
+* symbol_ref and /i:                     Flags.              (line  220)
+* symbol_ref and /u:                     Flags.              (line   10)
+* symbol_ref and /v:                     Flags.              (line  224)
+* symbol_ref, RTL sharing:               Sharing.            (line   20)
+* SYMBOL_REF_ANCHOR_P:                   Special Accessors.  (line  110)
+* SYMBOL_REF_BLOCK:                      Special Accessors.  (line  123)
+* SYMBOL_REF_BLOCK_OFFSET:               Special Accessors.  (line  128)
+* SYMBOL_REF_CONSTANT:                   Special Accessors.  (line   71)
+* SYMBOL_REF_DATA:                       Special Accessors.  (line   75)
+* SYMBOL_REF_DECL:                       Special Accessors.  (line   59)
+* SYMBOL_REF_EXTERNAL_P:                 Special Accessors.  (line   92)
+* SYMBOL_REF_FLAG:                       Flags.              (line  224)
+* SYMBOL_REF_FLAG, in TARGET_ENCODE_SECTION_INFO: Sections.  (line  269)
+* SYMBOL_REF_FLAGS:                      Special Accessors.  (line   79)
+* SYMBOL_REF_FUNCTION_P:                 Special Accessors.  (line   85)
+* SYMBOL_REF_HAS_BLOCK_INFO_P:           Special Accessors.  (line  106)
+* SYMBOL_REF_LOCAL_P:                    Special Accessors.  (line   88)
+* SYMBOL_REF_SMALL_P:                    Special Accessors.  (line   97)
+* SYMBOL_REF_TLS_MODEL:                  Special Accessors.  (line  101)
+* SYMBOL_REF_USED:                       Flags.              (line  215)
+* SYMBOL_REF_WEAK:                       Flags.              (line  220)
+* symbolic label:                        Sharing.            (line   20)
+* sync_addMODE instruction pattern:      Standard Names.     (line 1417)
+* sync_andMODE instruction pattern:      Standard Names.     (line 1417)
+* sync_compare_and_swapMODE instruction pattern: Standard Names.
+                                                             (line 1387)
+* sync_iorMODE instruction pattern:      Standard Names.     (line 1417)
+* sync_lock_releaseMODE instruction pattern: Standard Names. (line 1482)
+* sync_lock_test_and_setMODE instruction pattern: Standard Names.
+                                                             (line 1456)
+* sync_nandMODE instruction pattern:     Standard Names.     (line 1417)
+* sync_new_addMODE instruction pattern:  Standard Names.     (line 1449)
+* sync_new_andMODE instruction pattern:  Standard Names.     (line 1449)
+* sync_new_iorMODE instruction pattern:  Standard Names.     (line 1449)
+* sync_new_nandMODE instruction pattern: Standard Names.     (line 1449)
+* sync_new_subMODE instruction pattern:  Standard Names.     (line 1449)
+* sync_new_xorMODE instruction pattern:  Standard Names.     (line 1449)
+* sync_old_addMODE instruction pattern:  Standard Names.     (line 1432)
+* sync_old_andMODE instruction pattern:  Standard Names.     (line 1432)
+* sync_old_iorMODE instruction pattern:  Standard Names.     (line 1432)
+* sync_old_nandMODE instruction pattern: Standard Names.     (line 1432)
+* sync_old_subMODE instruction pattern:  Standard Names.     (line 1432)
+* sync_old_xorMODE instruction pattern:  Standard Names.     (line 1432)
+* sync_subMODE instruction pattern:      Standard Names.     (line 1417)
+* sync_xorMODE instruction pattern:      Standard Names.     (line 1417)
+* SYSROOT_HEADERS_SUFFIX_SPEC:           Driver.             (line  239)
+* SYSROOT_SUFFIX_SPEC:                   Driver.             (line  234)
+* SYSTEM_INCLUDE_DIR:                    Driver.             (line  408)
+* t-TARGET:                              Target Fragment.    (line    6)
+* table jump:                            Basic Blocks.       (line   57)
+* tablejump instruction pattern:         Standard Names.     (line 1061)
+* tag:                                   GTY Options.        (line   81)
+* tagging insns:                         Tagging Insns.      (line    6)
+* tail calls:                            Tail Calls.         (line    6)
+* TAmode:                                Machine Modes.      (line  156)
+* target attributes:                     Target Attributes.  (line    6)
+* target description macros:             Target Macros.      (line    6)
+* target functions:                      Target Structure.   (line    6)
+* target hooks:                          Target Structure.   (line    6)
+* target makefile fragment:              Target Fragment.    (line    6)
+* target specifications:                 Run-time Target.    (line    6)
+* TARGET_ADDR_SPACE_ADDRESS_MODE:        Named Address Spaces.
+                                                             (line   47)
+* TARGET_ADDR_SPACE_CONVERT:             Named Address Spaces.
+                                                             (line   90)
+* TARGET_ADDR_SPACE_KEYWORDS:            Named Address Spaces.
+                                                             (line   30)
+* TARGET_ADDR_SPACE_LEGITIMATE_ADDRESS_P: Named Address Spaces.
+                                                             (line   65)
+* TARGET_ADDR_SPACE_LEGITIMIZE_ADDRESS:  Named Address Spaces.
+                                                             (line   74)
+* TARGET_ADDR_SPACE_POINTER_MODE:        Named Address Spaces.
+                                                             (line   40)
+* TARGET_ADDR_SPACE_SUBSET_P:            Named Address Spaces.
+                                                             (line   81)
+* TARGET_ADDR_SPACE_VALID_POINTER_MODE:  Named Address Spaces.
+                                                             (line   54)
+* TARGET_ADDRESS_COST:                   Costs.              (line  245)
+* TARGET_ALIGN_ANON_BITFIELD:            Storage Layout.     (line  387)
+* TARGET_ALLOCATE_INITIAL_VALUE:         Misc.               (line  727)
+* TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS:  Misc.               (line  999)
+* TARGET_ARG_PARTIAL_BYTES:              Register Arguments. (line   83)
+* TARGET_ARM_EABI_UNWINDER:              Exception Region Output.
+                                                             (line  113)
+* TARGET_ASM_ALIGNED_DI_OP:              Data Output.        (line   10)
+* TARGET_ASM_ALIGNED_HI_OP:              Data Output.        (line    8)
+* TARGET_ASM_ALIGNED_SI_OP:              Data Output.        (line    9)
+* TARGET_ASM_ALIGNED_TI_OP:              Data Output.        (line   11)
+* TARGET_ASM_ASSEMBLE_VISIBILITY:        Label Output.       (line  239)
+* TARGET_ASM_BYTE_OP:                    Data Output.        (line    7)
+* TARGET_ASM_CAN_OUTPUT_MI_THUNK:        Function Entry.     (line  237)
+* TARGET_ASM_CLOSE_PAREN:                Data Output.        (line  130)
+* TARGET_ASM_CODE_END:                   File Framework.     (line   59)
+* TARGET_ASM_CONSTRUCTOR:                Macros for Initialization.
+                                                             (line   69)
+* TARGET_ASM_DESTRUCTOR:                 Macros for Initialization.
+                                                             (line   83)
+* TARGET_ASM_EMIT_EXCEPT_TABLE_LABEL:    Dispatch Tables.    (line   74)
+* TARGET_ASM_EMIT_UNWIND_LABEL:          Dispatch Tables.    (line   63)
+* TARGET_ASM_EXTERNAL_LIBCALL:           Label Output.       (line  274)
+* TARGET_ASM_FILE_END:                   File Framework.     (line   37)
+* TARGET_ASM_FILE_START:                 File Framework.     (line    9)
+* TARGET_ASM_FILE_START_APP_OFF:         File Framework.     (line   17)
+* TARGET_ASM_FILE_START_FILE_DIRECTIVE:  File Framework.     (line   31)
+* TARGET_ASM_FINAL_POSTSCAN_INSN:        Instruction Output. (line   69)
+* TARGET_ASM_FUNCTION_BEGIN_EPILOGUE:    Function Entry.     (line   61)
+* TARGET_ASM_FUNCTION_END_PROLOGUE:      Function Entry.     (line   55)
+* TARGET_ASM_FUNCTION_EPILOGUE:          Function Entry.     (line   68)
+* TARGET_ASM_FUNCTION_PROLOGUE:          Function Entry.     (line   11)
+* TARGET_ASM_FUNCTION_RODATA_SECTION:    Sections.           (line  216)
+* TARGET_ASM_GLOBALIZE_DECL_NAME:        Label Output.       (line  174)
+* TARGET_ASM_GLOBALIZE_LABEL:            Label Output.       (line  165)
+* TARGET_ASM_INIT_SECTIONS:              Sections.           (line  161)
+* TARGET_ASM_INTEGER:                    Data Output.        (line   27)
+* TARGET_ASM_INTERNAL_LABEL:             Label Output.       (line  310)
+* TARGET_ASM_LTO_END:                    File Framework.     (line   54)
+* TARGET_ASM_LTO_START:                  File Framework.     (line   49)
+* TARGET_ASM_MARK_DECL_PRESERVED:        Label Output.       (line  281)
+* TARGET_ASM_NAMED_SECTION:              File Framework.     (line  106)
+* TARGET_ASM_OPEN_PAREN:                 Data Output.        (line  129)
+* TARGET_ASM_OUTPUT_ANCHOR:              Anchored Addresses. (line   44)
+* TARGET_ASM_OUTPUT_DWARF_DTPREL:        SDB and DWARF.      (line   64)
+* TARGET_ASM_OUTPUT_MI_THUNK:            Function Entry.     (line  195)
+* TARGET_ASM_RECORD_GCC_SWITCHES:        File Framework.     (line  136)
+* TARGET_ASM_RECORD_GCC_SWITCHES_SECTION: File Framework.    (line  180)
+* TARGET_ASM_RELOC_RW_MASK:              Sections.           (line  170)
+* TARGET_ASM_SELECT_RTX_SECTION:         Sections.           (line  224)
+* TARGET_ASM_SELECT_SECTION:             Sections.           (line  182)
+* TARGET_ASM_TRAMPOLINE_TEMPLATE:        Trampolines.        (line   29)
+* TARGET_ASM_TTYPE:                      Exception Region Output.
+                                                             (line  107)
+* TARGET_ASM_UNALIGNED_DI_OP:            Data Output.        (line   14)
+* TARGET_ASM_UNALIGNED_HI_OP:            Data Output.        (line   12)
+* TARGET_ASM_UNALIGNED_SI_OP:            Data Output.        (line   13)
+* TARGET_ASM_UNALIGNED_TI_OP:            Data Output.        (line   15)
+* TARGET_ASM_UNIQUE_SECTION:             Sections.           (line  203)
+* TARGET_ATTRIBUTE_TABLE:                Target Attributes.  (line   11)
+* TARGET_BINDS_LOCAL_P:                  Sections.           (line  294)
+* TARGET_BRANCH_TARGET_REGISTER_CALLEE_SAVED: Misc.          (line  825)
+* TARGET_BRANCH_TARGET_REGISTER_CLASS:   Misc.               (line  817)
+* TARGET_BUILD_BUILTIN_VA_LIST:          Register Arguments. (line  263)
+* TARGET_BUILTIN_DECL:                   Misc.               (line  660)
+* TARGET_BUILTIN_RECIPROCAL:             Addressing Modes.   (line  242)
+* TARGET_BUILTIN_SETJMP_FRAME_VALUE:     Frame Layout.       (line  109)
+* TARGET_C99_FUNCTIONS:                  Library Calls.      (line   77)
+* TARGET_CALLEE_COPIES:                  Register Arguments. (line  115)
+* TARGET_CAN_ELIMINATE:                  Elimination.        (line   75)
+* TARGET_CAN_INLINE_P:                   Target Attributes.  (line  128)
+* TARGET_CANNOT_FORCE_CONST_MEM:         Addressing Modes.   (line  223)
+* TARGET_CANNOT_MODIFY_JUMPS_P:          Misc.               (line  803)
+* TARGET_CANONICAL_VA_LIST_TYPE:         Register Arguments. (line  272)
+* TARGET_CASE_VALUES_THRESHOLD:          Misc.               (line   47)
+* TARGET_CC_MODES_COMPATIBLE:            MODE_CC Condition Codes.
+                                                             (line  116)
+* TARGET_CHECK_PCH_TARGET_FLAGS:         PCH Target.         (line   28)
+* TARGET_COMMUTATIVE_P:                  Misc.               (line  720)
+* TARGET_COMP_TYPE_ATTRIBUTES:           Target Attributes.  (line   19)
+* TARGET_CONST_ANCHOR:                   Misc.               (line 1010)
+* TARGET_CONVERT_TO_TYPE:                Misc.               (line  963)
+* TARGET_CPU_CPP_BUILTINS:               Run-time Target.    (line    9)
+* TARGET_CXX_ADJUST_CLASS_AT_DEFINITION: C++ ABI.            (line   87)
+* TARGET_CXX_CDTOR_RETURNS_THIS:         C++ ABI.            (line   38)
+* TARGET_CXX_CLASS_DATA_ALWAYS_COMDAT:   C++ ABI.            (line   62)
+* TARGET_CXX_COOKIE_HAS_SIZE:            C++ ABI.            (line   25)
+* TARGET_CXX_DETERMINE_CLASS_DATA_VISIBILITY: C++ ABI.       (line   54)
+* TARGET_CXX_GET_COOKIE_SIZE:            C++ ABI.            (line   18)
+* TARGET_CXX_GUARD_MASK_BIT:             C++ ABI.            (line   12)
+* TARGET_CXX_GUARD_TYPE:                 C++ ABI.            (line    7)
+* TARGET_CXX_IMPORT_EXPORT_CLASS:        C++ ABI.            (line   30)
+* TARGET_CXX_KEY_METHOD_MAY_BE_INLINE:   C++ ABI.            (line   43)
+* TARGET_CXX_LIBRARY_RTTI_COMDAT:        C++ ABI.            (line   69)
+* TARGET_CXX_USE_AEABI_ATEXIT:           C++ ABI.            (line   74)
+* TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT:  C++ ABI.            (line   80)
+* TARGET_DECIMAL_FLOAT_SUPPORTED_P:      Storage Layout.     (line  512)
+* TARGET_DECLSPEC:                       Target Attributes.  (line   65)
+* TARGET_DEFAULT_PACK_STRUCT:            Misc.               (line  485)
+* TARGET_DEFAULT_SHORT_ENUMS:            Type Layout.        (line  160)
+* TARGET_DEFAULT_TARGET_FLAGS:           Run-time Target.    (line   56)
+* TARGET_DEFERRED_OUTPUT_DEFS:           Label Output.       (line  394)
+* TARGET_DELEGITIMIZE_ADDRESS:           Addressing Modes.   (line  214)
+* TARGET_DLLIMPORT_DECL_ATTRIBUTES:      Target Attributes.  (line   47)
+* TARGET_DWARF_CALLING_CONVENTION:       SDB and DWARF.      (line   18)
+* TARGET_DWARF_HANDLE_FRAME_UNSPEC:      Frame Layout.       (line  172)
+* TARGET_DWARF_REGISTER_SPAN:            Exception Region Output.
+                                                             (line   90)
+* TARGET_EDOM:                           Library Calls.      (line   59)
+* TARGET_EMUTLS_DEBUG_FORM_TLS_ADDRESS:  Emulated TLS.       (line   68)
+* TARGET_EMUTLS_GET_ADDRESS:             Emulated TLS.       (line   19)
+* TARGET_EMUTLS_REGISTER_COMMON:         Emulated TLS.       (line   24)
+* TARGET_EMUTLS_TMPL_PREFIX:             Emulated TLS.       (line   45)
+* TARGET_EMUTLS_TMPL_SECTION:            Emulated TLS.       (line   36)
+* TARGET_EMUTLS_VAR_ALIGN_FIXED:         Emulated TLS.       (line   63)
+* TARGET_EMUTLS_VAR_FIELDS:              Emulated TLS.       (line   49)
+* TARGET_EMUTLS_VAR_INIT:                Emulated TLS.       (line   57)
+* TARGET_EMUTLS_VAR_PREFIX:              Emulated TLS.       (line   41)
+* TARGET_EMUTLS_VAR_SECTION:             Emulated TLS.       (line   31)
+* TARGET_ENCODE_SECTION_INFO:            Sections.           (line  245)
+* TARGET_ENCODE_SECTION_INFO and address validation: Addressing Modes.
+                                                             (line   83)
+* TARGET_ENCODE_SECTION_INFO usage:      Instruction Output. (line  113)
+* TARGET_ENUM_VA_LIST:                   Scalar Return.      (line   96)
+* TARGET_EXECUTABLE_SUFFIX:              Misc.               (line  777)
+* TARGET_EXPAND_BUILTIN:                 Misc.               (line  670)
+* TARGET_EXPAND_BUILTIN_SAVEREGS:        Varargs.            (line   92)
+* TARGET_EXPAND_TO_RTL_HOOK:             Storage Layout.     (line  518)
+* TARGET_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* TARGET_EXTRA_INCLUDES:                 Misc.               (line  856)
+* TARGET_EXTRA_LIVE_ON_ENTRY:            Tail Calls.         (line   21)
+* TARGET_EXTRA_PRE_INCLUDES:             Misc.               (line  863)
+* TARGET_FIXED_CONDITION_CODE_REGS:      MODE_CC Condition Codes.
+                                                             (line  101)
+* TARGET_FIXED_POINT_SUPPORTED_P:        Storage Layout.     (line  515)
+* target_flags:                          Run-time Target.    (line   52)
+* TARGET_FLT_EVAL_METHOD:                Type Layout.        (line  141)
+* TARGET_FN_ABI_VA_LIST:                 Register Arguments. (line  267)
+* TARGET_FOLD_BUILTIN:                   Misc.               (line  691)
+* TARGET_FORMAT_TYPES:                   Misc.               (line  883)
+* TARGET_FRAME_POINTER_REQUIRED:         Elimination.        (line    9)
+* TARGET_FUNCTION_ATTRIBUTE_INLINABLE_P: Target Attributes.  (line   87)
+* TARGET_FUNCTION_OK_FOR_SIBCALL:        Tail Calls.         (line    8)
+* TARGET_FUNCTION_VALUE:                 Scalar Return.      (line   11)
+* TARGET_GET_DRAP_RTX:                   Misc.               (line  993)
+* TARGET_GET_PCH_VALIDITY:               PCH Target.         (line    7)
+* TARGET_GIMPLIFY_VA_ARG_EXPR:           Register Arguments. (line  278)
+* TARGET_HANDLE_C_OPTION:                Run-time Target.    (line   78)
+* TARGET_HANDLE_OPTION:                  Run-time Target.    (line   61)
+* TARGET_HANDLE_PRAGMA_EXTERN_PREFIX:    Misc.               (line  482)
+* TARGET_HARD_REGNO_SCRATCH_OK:          Values in Registers.
+                                                             (line  144)
+* TARGET_HAS_SINCOS:                     Library Calls.      (line   85)
+* TARGET_HAVE_CONDITIONAL_EXECUTION:     Misc.               (line  839)
+* TARGET_HAVE_CTORS_DTORS:               Macros for Initialization.
+                                                             (line   64)
+* TARGET_HAVE_NAMED_SECTIONS:            File Framework.     (line  113)
+* TARGET_HAVE_SRODATA_SECTION:           Sections.           (line  290)
+* TARGET_HAVE_SWITCHABLE_BSS_SECTIONS:   File Framework.     (line  117)
+* TARGET_HAVE_TLS:                       Sections.           (line  303)
+* TARGET_HELP:                           Run-time Target.    (line  154)
+* TARGET_IN_SMALL_DATA_P:                Sections.           (line  286)
+* TARGET_INIT_BUILTINS:                  Misc.               (line  642)
+* TARGET_INIT_DWARF_REG_SIZES_EXTRA:     Exception Region Output.
+                                                             (line   99)
+* TARGET_INIT_LIBFUNCS:                  Library Calls.      (line   16)
+* TARGET_INSERT_ATTRIBUTES:              Target Attributes.  (line   74)
+* TARGET_INSTANTIATE_DECLS:              Storage Layout.     (line  526)
+* TARGET_INVALID_ARG_FOR_UNPROTOTYPED_FN: Misc.              (line  917)
+* TARGET_INVALID_BINARY_OP:              Misc.               (line  936)
+* TARGET_INVALID_CONVERSION:             Misc.               (line  923)
+* TARGET_INVALID_PARAMETER_TYPE:         Misc.               (line  942)
+* TARGET_INVALID_RETURN_TYPE:            Misc.               (line  949)
+* TARGET_INVALID_UNARY_OP:               Misc.               (line  929)
+* TARGET_INVALID_WITHIN_DOLOOP:          Misc.               (line  700)
+* TARGET_IRA_COVER_CLASSES:              Register Classes.   (line  511)
+* TARGET_LEGITIMATE_ADDRESS_P:           Addressing Modes.   (line   50)
+* TARGET_LEGITIMIZE_ADDRESS:             Addressing Modes.   (line  128)
+* TARGET_LIB_INT_CMP_BIASED:             Library Calls.      (line   35)
+* TARGET_LIBCALL_VALUE:                  Scalar Return.      (line   69)
+* TARGET_LIBGCC_CMP_RETURN_MODE:         Storage Layout.     (line  449)
+* TARGET_LIBGCC_SDATA_SECTION:           Sections.           (line  133)
+* TARGET_LIBGCC_SHIFT_COUNT_MODE:        Storage Layout.     (line  455)
+* TARGET_MACHINE_DEPENDENT_REORG:        Misc.               (line  627)
+* TARGET_MANGLE_DECL_ASSEMBLER_NAME:     Sections.           (line  235)
+* TARGET_MANGLE_TYPE:                    Storage Layout.     (line  530)
+* TARGET_MAX_ANCHOR_OFFSET:              Anchored Addresses. (line   39)
+* TARGET_MD_ASM_CLOBBERS:                Misc.               (line  543)
+* TARGET_MEM_CONSTRAINT:                 Addressing Modes.   (line  105)
+* TARGET_MEM_REF:                        Storage References. (line    6)
+* TARGET_MERGE_DECL_ATTRIBUTES:          Target Attributes.  (line   39)
+* TARGET_MERGE_TYPE_ATTRIBUTES:          Target Attributes.  (line   31)
+* TARGET_MIN_ANCHOR_OFFSET:              Anchored Addresses. (line   33)
+* TARGET_MIN_DIVISIONS_FOR_RECIP_MUL:    Misc.               (line  106)
+* TARGET_MODE_REP_EXTENDED:              Misc.               (line  191)
+* TARGET_MS_BITFIELD_LAYOUT_P:           Storage Layout.     (line  485)
+* TARGET_MUST_PASS_IN_STACK:             Register Arguments. (line   62)
+* TARGET_MUST_PASS_IN_STACK, and FUNCTION_ARG: Register Arguments.
+                                                             (line   52)
+* TARGET_N_FORMAT_TYPES:                 Misc.               (line  888)
+* TARGET_NARROW_VOLATILE_BITFIELD:       Storage Layout.     (line  393)
+* TARGET_OBJECT_SUFFIX:                  Misc.               (line  772)
+* TARGET_OBJFMT_CPP_BUILTINS:            Run-time Target.    (line   46)
+* TARGET_OPTF:                           Misc.               (line  870)
+* TARGET_OPTION_PRAGMA_PARSE:            Target Attributes.  (line  122)
+* TARGET_OPTION_PRINT:                   Target Attributes.  (line  117)
+* TARGET_OPTION_RESTORE:                 Target Attributes.  (line  111)
+* TARGET_OPTION_SAVE:                    Target Attributes.  (line  105)
+* TARGET_OPTION_TRANSLATE_TABLE:         Driver.             (line   53)
+* TARGET_OPTION_VALID_ATTRIBUTE_P:       Target Attributes.  (line   94)
+* TARGET_OS_CPP_BUILTINS:                Run-time Target.    (line   42)
+* TARGET_OVERRIDE_OPTIONS_AFTER_CHANGE:  Run-time Target.    (line  119)
+* TARGET_OVERRIDES_FORMAT_ATTRIBUTES:    Misc.               (line  892)
+* TARGET_OVERRIDES_FORMAT_ATTRIBUTES_COUNT: Misc.            (line  898)
+* TARGET_OVERRIDES_FORMAT_INIT:          Misc.               (line  902)
+* TARGET_PASS_BY_REFERENCE:              Register Arguments. (line  103)
+* TARGET_PCH_VALID_P:                    PCH Target.         (line   13)
+* TARGET_POSIX_IO:                       Misc.               (line  567)
+* TARGET_PRETEND_OUTGOING_VARARGS_NAMED: Varargs.            (line  153)
+* TARGET_PROMOTE_FUNCTION_MODE:          Storage Layout.     (line  125)
+* TARGET_PROMOTE_PROTOTYPES:             Stack Arguments.    (line   11)
+* TARGET_PROMOTED_TYPE:                  Misc.               (line  955)
+* TARGET_PTRMEMFUNC_VBIT_LOCATION:       Type Layout.        (line  278)
+* TARGET_RELAXED_ORDERING:               Misc.               (line  907)
+* TARGET_RESOLVE_OVERLOADED_BUILTIN:     Misc.               (line  680)
+* TARGET_RETURN_IN_MEMORY:               Aggregate Return.   (line   17)
+* TARGET_RETURN_IN_MSB:                  Scalar Return.      (line  112)
+* TARGET_RTX_COSTS:                      Costs.              (line  219)
+* TARGET_SCALAR_MODE_SUPPORTED_P:        Register Arguments. (line  290)
+* TARGET_SCHED_ADJUST_COST:              Scheduling.         (line   37)
+* TARGET_SCHED_ADJUST_PRIORITY:          Scheduling.         (line   52)
+* TARGET_SCHED_ALLOC_SCHED_CONTEXT:      Scheduling.         (line  243)
+* TARGET_SCHED_CLEAR_SCHED_CONTEXT:      Scheduling.         (line  258)
+* TARGET_SCHED_DEPENDENCIES_EVALUATION_HOOK: Scheduling.     (line   89)
+* TARGET_SCHED_DFA_NEW_CYCLE:            Scheduling.         (line  204)
+* TARGET_SCHED_DFA_POST_ADVANCE_CYCLE:   Scheduling.         (line  160)
+* TARGET_SCHED_DFA_POST_CYCLE_INSN:      Scheduling.         (line  144)
+* TARGET_SCHED_DFA_PRE_ADVANCE_CYCLE:    Scheduling.         (line  153)
+* TARGET_SCHED_DFA_PRE_CYCLE_INSN:       Scheduling.         (line  132)
+* TARGET_SCHED_FINISH:                   Scheduling.         (line  109)
+* TARGET_SCHED_FINISH_GLOBAL:            Scheduling.         (line  126)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD: Scheduling.
+                                                             (line  168)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD: Scheduling.
+                                                             (line  196)
+* TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD_GUARD_SPEC: Scheduling.
+                                                             (line  297)
+* TARGET_SCHED_FREE_SCHED_CONTEXT:       Scheduling.         (line  262)
+* TARGET_SCHED_GEN_SPEC_CHECK:           Scheduling.         (line  284)
+* TARGET_SCHED_H_I_D_EXTENDED:           Scheduling.         (line  238)
+* TARGET_SCHED_INIT:                     Scheduling.         (line   99)
+* TARGET_SCHED_INIT_DFA_POST_CYCLE_INSN: Scheduling.         (line  149)
+* TARGET_SCHED_INIT_DFA_PRE_CYCLE_INSN:  Scheduling.         (line  141)
+* TARGET_SCHED_INIT_GLOBAL:              Scheduling.         (line  118)
+* TARGET_SCHED_INIT_SCHED_CONTEXT:       Scheduling.         (line  248)
+* TARGET_SCHED_IS_COSTLY_DEPENDENCE:     Scheduling.         (line  215)
+* TARGET_SCHED_ISSUE_RATE:               Scheduling.         (line   12)
+* TARGET_SCHED_NEEDS_BLOCK_P:            Scheduling.         (line  277)
+* TARGET_SCHED_REORDER:                  Scheduling.         (line   60)
+* TARGET_SCHED_REORDER2:                 Scheduling.         (line   77)
+* TARGET_SCHED_SET_SCHED_CONTEXT:        Scheduling.         (line  254)
+* TARGET_SCHED_SET_SCHED_FLAGS:          Scheduling.         (line  309)
+* TARGET_SCHED_SMS_RES_MII:              Scheduling.         (line  315)
+* TARGET_SCHED_SPECULATE_INSN:           Scheduling.         (line  266)
+* TARGET_SCHED_VARIABLE_ISSUE:           Scheduling.         (line   24)
+* TARGET_SECONDARY_RELOAD:               Register Classes.   (line  272)
+* TARGET_SECTION_TYPE_FLAGS:             File Framework.     (line  123)
+* TARGET_SET_CURRENT_FUNCTION:           Misc.               (line  754)
+* TARGET_SET_DEFAULT_TYPE_ATTRIBUTES:    Target Attributes.  (line   26)
+* TARGET_SETUP_INCOMING_VARARGS:         Varargs.            (line  101)
+* TARGET_SHIFT_TRUNCATION_MASK:          Misc.               (line  154)
+* TARGET_SPLIT_COMPLEX_ARG:              Register Arguments. (line  251)
+* TARGET_STACK_PROTECT_FAIL:             Stack Smashing Protection.
+                                                             (line   17)
+* TARGET_STACK_PROTECT_GUARD:            Stack Smashing Protection.
+                                                             (line    7)
+* TARGET_STATIC_CHAIN:                   Frame Registers.    (line   78)
+* TARGET_STRICT_ARGUMENT_NAMING:         Varargs.            (line  137)
+* TARGET_STRIP_NAME_ENCODING:            Sections.           (line  282)
+* TARGET_STRUCT_VALUE_RTX:               Aggregate Return.   (line   45)
+* TARGET_SUPPORT_VECTOR_MISALIGNMENT:    Addressing Modes.   (line  345)
+* TARGET_TERMINATE_DW2_EH_FRAME_INFO:    Exception Region Output.
+                                                             (line   84)
+* TARGET_TRAMPOLINE_ADJUST_ADDRESS:      Trampolines.        (line   75)
+* TARGET_TRAMPOLINE_INIT:                Trampolines.        (line   56)
+* TARGET_UNSPEC_MAY_TRAP_P:              Misc.               (line  746)
+* TARGET_UNWIND_EMIT:                    Dispatch Tables.    (line   81)
+* TARGET_UNWIND_INFO:                    Exception Region Output.
+                                                             (line   56)
+* TARGET_UNWIND_TABLES_DEFAULT:          Exception Region Output.
+                                                             (line   60)
+* TARGET_UNWIND_WORD_MODE:               Storage Layout.     (line  461)
+* TARGET_UPDATE_STACK_BOUNDARY:          Misc.               (line  989)
+* TARGET_USE_ANCHORS_FOR_SYMBOL_P:       Anchored Addresses. (line   55)
+* TARGET_USE_BLOCKS_FOR_CONSTANT_P:      Addressing Modes.   (line  235)
+* TARGET_USE_JCR_SECTION:                Misc.               (line  971)
+* TARGET_USES_WEAK_UNWIND_INFO:          Exception Handling. (line  129)
+* TARGET_VALID_DLLIMPORT_ATTRIBUTE_P:    Target Attributes.  (line   60)
+* TARGET_VALID_POINTER_MODE:             Register Arguments. (line  284)
+* TARGET_VECTOR_MODE_SUPPORTED_P:        Register Arguments. (line  302)
+* TARGET_VECTORIZE_BUILTIN_CONVERSION:   Addressing Modes.   (line  320)
+* TARGET_VECTORIZE_BUILTIN_MASK_FOR_LOAD: Addressing Modes.  (line  251)
+* TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_EVEN: Addressing Modes. (line  277)
+* TARGET_VECTORIZE_BUILTIN_MUL_WIDEN_ODD: Addressing Modes.  (line  289)
+* TARGET_VECTORIZE_BUILTIN_VEC_PERM:     Addressing Modes.   (line  312)
+* TARGET_VECTORIZE_BUILTIN_VEC_PERM_OK:  Addressing Modes.   (line  316)
+* TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST: Addressing Modes.
+                                                             (line  302)
+* TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION: Addressing Modes.
+                                                             (line  335)
+* TARGET_VECTORIZE_VECTOR_ALIGNMENT_REACHABLE: Addressing Modes.
+                                                             (line  307)
+* TARGET_VERSION:                        Run-time Target.    (line   92)
+* TARGET_VTABLE_DATA_ENTRY_DISTANCE:     Type Layout.        (line  331)
+* TARGET_VTABLE_ENTRY_ALIGN:             Type Layout.        (line  325)
+* TARGET_VTABLE_USES_DESCRIPTORS:        Type Layout.        (line  314)
+* TARGET_WEAK_NOT_IN_ARCHIVE_TOC:        Label Output.       (line  245)
+* targetm:                               Target Structure.   (line    7)
+* targets, makefile:                     Makefile.           (line    6)
+* TCmode:                                Machine Modes.      (line  197)
+* TDmode:                                Machine Modes.      (line   94)
+* TEMPLATE_DECL:                         Declarations.       (line    6)
+* Temporaries:                           Temporaries.        (line    6)
+* termination routines:                  Initialization.     (line    6)
+* testing constraints:                   C Constraint Interface.
+                                                             (line    6)
+* TEXT_SECTION_ASM_OP:                   Sections.           (line   38)
+* TF_SIZE:                               Type Layout.        (line  132)
+* TFmode:                                Machine Modes.      (line   98)
+* THEN_CLAUSE:                           Statements for C++. (line    6)
+* THREAD_MODEL_SPEC:                     Driver.             (line  225)
+* THROW_EXPR:                            Unary and Binary Expressions.
+                                                             (line    6)
+* THUNK_DECL:                            Declarations.       (line    6)
+* THUNK_DELTA:                           Declarations.       (line    6)
+* TImode:                                Machine Modes.      (line   48)
+* TImode, in insn:                       Insns.              (line  272)
+* TLS_COMMON_ASM_OP:                     Sections.           (line   82)
+* TLS_SECTION_ASM_FLAG:                  Sections.           (line   87)
+* tm.h macros:                           Target Macros.      (line    6)
+* TQFmode:                               Machine Modes.      (line   62)
+* TQmode:                                Machine Modes.      (line  119)
+* TRAMPOLINE_ALIGNMENT:                  Trampolines.        (line   49)
+* TRAMPOLINE_SECTION:                    Trampolines.        (line   40)
+* TRAMPOLINE_SIZE:                       Trampolines.        (line   45)
+* trampolines for nested functions:      Trampolines.        (line    6)
+* TRANSFER_FROM_TRAMPOLINE:              Trampolines.        (line  123)
+* trap instruction pattern:              Standard Names.     (line 1340)
+* tree <1>:                              Tree overview.      (line    6)
+* tree:                                  Macros and Functions.
+                                                             (line    6)
+* Tree SSA:                              Tree SSA.           (line    6)
+* TREE_CHAIN:                            Macros and Functions.
+                                                             (line    6)
+* tree_code <1>:                         Manipulating GIMPLE statements.
+                                                             (line   31)
+* tree_code <2>:                         GIMPLE_COND.        (line   21)
+* tree_code <3>:                         GIMPLE_OMP_FOR.     (line   83)
+* tree_code:                             GIMPLE_ASSIGN.      (line   41)
+* TREE_CODE:                             Tree overview.      (line    6)
+* tree_int_cst_equal:                    Constant expressions.
+                                                             (line    6)
+* TREE_INT_CST_HIGH:                     Constant expressions.
+                                                             (line    6)
+* TREE_INT_CST_LOW:                      Constant expressions.
+                                                             (line    6)
+* tree_int_cst_lt:                       Constant expressions.
+                                                             (line    6)
+* TREE_LIST:                             Containers.         (line    6)
+* TREE_OPERAND:                          Expression trees.   (line    6)
+* TREE_PUBLIC <1>:                       Function Properties.
+                                                             (line   28)
+* TREE_PUBLIC:                           Function Basics.    (line    6)
+* TREE_PURPOSE:                          Containers.         (line    6)
+* TREE_READONLY:                         Function Properties.
+                                                             (line   37)
+* tree_size:                             Macros and Functions.
+                                                             (line   13)
+* TREE_STATIC:                           Function Properties.
+                                                             (line   31)
+* TREE_STRING_LENGTH:                    Constant expressions.
+                                                             (line    6)
+* TREE_STRING_POINTER:                   Constant expressions.
+                                                             (line    6)
+* TREE_THIS_VOLATILE:                    Function Properties.
+                                                             (line   34)
+* TREE_TYPE <1>:                         Expression trees.   (line    6)
+* TREE_TYPE <2>:                         Types.              (line    6)
+* TREE_TYPE <3>:                         Expression trees.   (line   17)
+* TREE_TYPE <4>:                         Working with declarations.
+                                                             (line   11)
+* TREE_TYPE <5>:                         Types for C++.      (line    6)
+* TREE_TYPE <6>:                         Macros and Functions.
+                                                             (line    6)
+* TREE_TYPE:                             Function Basics.    (line   47)
+* TREE_VALUE:                            Containers.         (line    6)
+* TREE_VEC:                              Containers.         (line    6)
+* TREE_VEC_ELT:                          Containers.         (line    6)
+* TREE_VEC_LENGTH:                       Containers.         (line    6)
+* TRULY_NOOP_TRUNCATION:                 Misc.               (line  177)
+* TRUNC_DIV_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUNC_MOD_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* truncate:                              Conversions.        (line   38)
+* truncMN2 instruction pattern:          Standard Names.     (line  803)
+* TRUTH_AND_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_ANDIF_EXPR:                      Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_NOT_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_OR_EXPR:                         Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_ORIF_EXPR:                       Unary and Binary Expressions.
+                                                             (line    6)
+* TRUTH_XOR_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* TRY_BLOCK:                             Statements for C++. (line    6)
+* TRY_HANDLERS:                          Statements for C++. (line    6)
+* TRY_STMTS:                             Statements for C++. (line    6)
+* Tuple specific accessors:              Tuple specific accessors.
+                                                             (line    6)
+* tuples:                                Tuple representation.
+                                                             (line    6)
+* type:                                  Types.              (line    6)
+* type declaration:                      Declarations.       (line    6)
+* TYPE_ALIGN <1>:                        Types for C++.      (line   45)
+* TYPE_ALIGN <2>:                        Types.              (line    6)
+* TYPE_ALIGN:                            Types for C++.      (line    6)
+* TYPE_ARG_TYPES <1>:                    Types for C++.      (line    6)
+* TYPE_ARG_TYPES:                        Types.              (line    6)
+* TYPE_ASM_OP:                           Label Output.       (line   55)
+* TYPE_ATTRIBUTES:                       Attributes.         (line   25)
+* TYPE_BINFO:                            Classes.            (line    6)
+* TYPE_BUILT_IN:                         Types for C++.      (line   68)
+* TYPE_CANONICAL:                        Types.              (line   42)
+* TYPE_CONTEXT <1>:                      Types for C++.      (line    6)
+* TYPE_CONTEXT:                          Types.              (line    6)
+* TYPE_DECL:                             Declarations.       (line    6)
+* TYPE_FIELDS <1>:                       Types for C++.      (line    6)
+* TYPE_FIELDS <2>:                       Classes.            (line    6)
+* TYPE_FIELDS:                           Types.              (line    6)
+* TYPE_HAS_ARRAY_NEW_OPERATOR:           Classes.            (line   96)
+* TYPE_HAS_DEFAULT_CONSTRUCTOR:          Classes.            (line   81)
+* TYPE_HAS_MUTABLE_P:                    Classes.            (line   86)
+* TYPE_HAS_NEW_OPERATOR:                 Classes.            (line   93)
+* TYPE_MAIN_VARIANT <1>:                 Types for C++.      (line    6)
+* TYPE_MAIN_VARIANT:                     Types.              (line    6)
+* TYPE_MAX_VALUE:                        Types.              (line    6)
+* TYPE_METHOD_BASETYPE <1>:              Types.              (line    6)
+* TYPE_METHOD_BASETYPE:                  Types for C++.      (line    6)
+* TYPE_METHODS:                          Classes.            (line    6)
+* TYPE_MIN_VALUE:                        Types.              (line    6)
+* TYPE_NAME <1>:                         Types for C++.      (line   48)
+* TYPE_NAME <2>:                         Types.              (line    6)
+* TYPE_NAME <3>:                         Types for C++.      (line    6)
+* TYPE_NAME:                             Types.              (line   33)
+* TYPE_NOTHROW_P:                        Functions for C++.  (line  154)
+* TYPE_OFFSET_BASETYPE <1>:              Types for C++.      (line    6)
+* TYPE_OFFSET_BASETYPE:                  Types.              (line    6)
+* TYPE_OPERAND_FMT:                      Label Output.       (line   66)
+* TYPE_OVERLOADS_ARRAY_REF:              Classes.            (line  104)
+* TYPE_OVERLOADS_ARROW:                  Classes.            (line  107)
+* TYPE_OVERLOADS_CALL_EXPR:              Classes.            (line  100)
+* TYPE_POLYMORPHIC_P:                    Classes.            (line   77)
+* TYPE_PRECISION <1>:                    Types for C++.      (line    6)
+* TYPE_PRECISION:                        Types.              (line    6)
+* TYPE_PTR_P:                            Types for C++.      (line   74)
+* TYPE_PTRFN_P:                          Types for C++.      (line   78)
+* TYPE_PTRMEM_P:                         Types for C++.      (line   71)
+* TYPE_PTROB_P:                          Types for C++.      (line   81)
+* TYPE_PTROBV_P:                         Types for C++.      (line    6)
+* TYPE_QUAL_CONST <1>:                   Types.              (line    6)
+* TYPE_QUAL_CONST:                       Types for C++.      (line    6)
+* TYPE_QUAL_RESTRICT <1>:                Types for C++.      (line    6)
+* TYPE_QUAL_RESTRICT:                    Types.              (line    6)
+* TYPE_QUAL_VOLATILE <1>:                Types.              (line    6)
+* TYPE_QUAL_VOLATILE:                    Types for C++.      (line    6)
+* TYPE_RAISES_EXCEPTIONS:                Functions for C++.  (line  149)
+* TYPE_SIZE <1>:                         Types for C++.      (line    6)
+* TYPE_SIZE <2>:                         Types.              (line    6)
+* TYPE_SIZE <3>:                         Types for C++.      (line   40)
+* TYPE_SIZE:                             Types.              (line   25)
+* TYPE_STRUCTURAL_EQUALITY_P:            Types.              (line   79)
+* TYPE_UNQUALIFIED <1>:                  Types.              (line    6)
+* TYPE_UNQUALIFIED:                      Types for C++.      (line    6)
+* TYPE_VFIELD:                           Classes.            (line    6)
+* TYPENAME_TYPE:                         Types for C++.      (line    6)
+* TYPENAME_TYPE_FULLNAME <1>:            Types.              (line    6)
+* TYPENAME_TYPE_FULLNAME:                Types for C++.      (line    6)
+* TYPEOF_TYPE:                           Types for C++.      (line    6)
+* UDAmode:                               Machine Modes.      (line  168)
+* udiv:                                  Arithmetic.         (line  125)
+* udivM3 instruction pattern:            Standard Names.     (line  222)
+* udivmodM4 instruction pattern:         Standard Names.     (line  428)
+* udot_prodM instruction pattern:        Standard Names.     (line  265)
+* UDQmode:                               Machine Modes.      (line  136)
+* UHAmode:                               Machine Modes.      (line  160)
+* UHQmode:                               Machine Modes.      (line  128)
+* UINT16_TYPE:                           Type Layout.        (line  241)
+* UINT32_TYPE:                           Type Layout.        (line  242)
+* UINT64_TYPE:                           Type Layout.        (line  243)
+* UINT8_TYPE:                            Type Layout.        (line  240)
+* UINT_FAST16_TYPE:                      Type Layout.        (line  257)
+* UINT_FAST32_TYPE:                      Type Layout.        (line  258)
+* UINT_FAST64_TYPE:                      Type Layout.        (line  259)
+* UINT_FAST8_TYPE:                       Type Layout.        (line  256)
+* UINT_LEAST16_TYPE:                     Type Layout.        (line  249)
+* UINT_LEAST32_TYPE:                     Type Layout.        (line  250)
+* UINT_LEAST64_TYPE:                     Type Layout.        (line  251)
+* UINT_LEAST8_TYPE:                      Type Layout.        (line  248)
+* UINTMAX_TYPE:                          Type Layout.        (line  224)
+* UINTPTR_TYPE:                          Type Layout.        (line  261)
+* umaddMN4 instruction pattern:          Standard Names.     (line  375)
+* umax:                                  Arithmetic.         (line  144)
+* umaxM3 instruction pattern:            Standard Names.     (line  222)
+* umin:                                  Arithmetic.         (line  144)
+* uminM3 instruction pattern:            Standard Names.     (line  222)
+* umod:                                  Arithmetic.         (line  131)
+* umodM3 instruction pattern:            Standard Names.     (line  222)
+* umsubMN4 instruction pattern:          Standard Names.     (line  399)
+* umulhisi3 instruction pattern:         Standard Names.     (line  347)
+* umulM3_highpart instruction pattern:   Standard Names.     (line  361)
+* umulqihi3 instruction pattern:         Standard Names.     (line  347)
+* umulsidi3 instruction pattern:         Standard Names.     (line  347)
+* unchanging:                            Flags.              (line  324)
+* unchanging, in call_insn:              Flags.              (line   19)
+* unchanging, in jump_insn, call_insn and insn: Flags.       (line   39)
+* unchanging, in mem:                    Flags.              (line  152)
+* unchanging, in subreg:                 Flags.              (line  188)
+* unchanging, in symbol_ref:             Flags.              (line   10)
+* UNEQ_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNGE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNGT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNION_TYPE <1>:                        Types.              (line    6)
+* UNION_TYPE:                            Classes.            (line    6)
+* unions, returning:                     Interface.          (line   10)
+* UNITS_PER_SIMD_WORD:                   Storage Layout.     (line   77)
+* UNITS_PER_WORD:                        Storage Layout.     (line   67)
+* UNKNOWN_TYPE <1>:                      Types for C++.      (line    6)
+* UNKNOWN_TYPE:                          Types.              (line    6)
+* UNLE_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNLIKELY_EXECUTED_TEXT_SECTION_NAME:   Sections.           (line   49)
+* UNLT_EXPR:                             Unary and Binary Expressions.
+                                                             (line    6)
+* UNORDERED_EXPR:                        Unary and Binary Expressions.
+                                                             (line    6)
+* unshare_all_rtl:                       Sharing.            (line   58)
+* unsigned division:                     Arithmetic.         (line  125)
+* unsigned division with unsigned saturation: Arithmetic.    (line  125)
+* unsigned greater than:                 Comparisons.        (line   72)
+* unsigned less than:                    Comparisons.        (line   68)
+* unsigned minimum and maximum:          Arithmetic.         (line  144)
+* unsigned_fix:                          Conversions.        (line   77)
+* unsigned_float:                        Conversions.        (line   62)
+* unsigned_fract_convert:                Conversions.        (line   97)
+* unsigned_sat_fract:                    Conversions.        (line  103)
+* unspec:                                Side Effects.       (line  287)
+* unspec_volatile:                       Side Effects.       (line  287)
+* untyped_call instruction pattern:      Standard Names.     (line  971)
+* untyped_return instruction pattern:    Standard Names.     (line 1021)
+* UPDATE_PATH_HOST_CANONICALIZE (PATH):  Filesystem.         (line   59)
+* update_ssa:                            SSA.                (line   76)
+* update_stmt <1>:                       SSA Operands.       (line    6)
+* update_stmt:                           Manipulating GIMPLE statements.
+                                                             (line  141)
+* update_stmt_if_modified:               Manipulating GIMPLE statements.
+                                                             (line  144)
+* UQQmode:                               Machine Modes.      (line  123)
+* US Software GOFAST, floating point emulation library: Library Calls.
+                                                             (line   44)
+* us_ashift:                             Arithmetic.         (line  168)
+* us_minus:                              Arithmetic.         (line   36)
+* us_mult:                               Arithmetic.         (line   92)
+* us_neg:                                Arithmetic.         (line   81)
+* us_plus:                               Arithmetic.         (line   14)
+* US_SOFTWARE_GOFAST:                    Library Calls.      (line   45)
+* us_truncate:                           Conversions.        (line   48)
+* usaddM3 instruction pattern:           Standard Names.     (line  222)
+* USAmode:                               Machine Modes.      (line  164)
+* usashlM3 instruction pattern:          Standard Names.     (line  431)
+* usdivM3 instruction pattern:           Standard Names.     (line  222)
+* use:                                   Side Effects.       (line  162)
+* USE_C_ALLOCA:                          Host Misc.          (line   19)
+* USE_LD_AS_NEEDED:                      Driver.             (line  198)
+* USE_LOAD_POST_DECREMENT:               Costs.              (line  174)
+* USE_LOAD_POST_INCREMENT:               Costs.              (line  169)
+* USE_LOAD_PRE_DECREMENT:                Costs.              (line  184)
+* USE_LOAD_PRE_INCREMENT:                Costs.              (line  179)
+* use_optype_d:                          Manipulating GIMPLE statements.
+                                                             (line  101)
+* use_param:                             GTY Options.        (line  113)
+* use_paramN:                            GTY Options.        (line  131)
+* use_params:                            GTY Options.        (line  139)
+* USE_SELECT_SECTION_FOR_FUNCTIONS:      Sections.           (line  195)
+* USE_STORE_POST_DECREMENT:              Costs.              (line  194)
+* USE_STORE_POST_INCREMENT:              Costs.              (line  189)
+* USE_STORE_PRE_DECREMENT:               Costs.              (line  204)
+* USE_STORE_PRE_INCREMENT:               Costs.              (line  199)
+* used:                                  Flags.              (line  342)
+* used, in symbol_ref:                   Flags.              (line  215)
+* USER_LABEL_PREFIX:                     Instruction Output. (line  139)
+* USING_STMT:                            Statements for C++. (line    6)
+* usmaddMN4 instruction pattern:         Standard Names.     (line  383)
+* usmsubMN4 instruction pattern:         Standard Names.     (line  407)
+* usmulhisi3 instruction pattern:        Standard Names.     (line  351)
+* usmulM3 instruction pattern:           Standard Names.     (line  222)
+* usmulqihi3 instruction pattern:        Standard Names.     (line  351)
+* usmulsidi3 instruction pattern:        Standard Names.     (line  351)
+* usnegM2 instruction pattern:           Standard Names.     (line  449)
+* USQmode:                               Machine Modes.      (line  132)
+* ussubM3 instruction pattern:           Standard Names.     (line  222)
+* usum_widenM3 instruction pattern:      Standard Names.     (line  275)
+* UTAmode:                               Machine Modes.      (line  172)
+* UTQmode:                               Machine Modes.      (line  140)
+* V in constraint:                       Simple Constraints. (line   43)
+* VA_ARG_EXPR:                           Unary and Binary Expressions.
+                                                             (line    6)
+* values, returned by functions:         Scalar Return.      (line    6)
+* VAR_DECL:                              Declarations.       (line    6)
+* var_location:                          Debug Information.  (line   14)
+* varargs implementation:                Varargs.            (line    6)
+* variable:                              Declarations.       (line    6)
+* Variable Location Debug Information in RTL: Debug Information.
+                                                             (line    6)
+* vashlM3 instruction pattern:           Standard Names.     (line  445)
+* vashrM3 instruction pattern:           Standard Names.     (line  445)
+* vec_concat:                            Vector Operations.  (line   28)
+* vec_duplicate:                         Vector Operations.  (line   33)
+* VEC_EXTRACT_EVEN_EXPR:                 Vectors.            (line    6)
+* vec_extract_evenM instruction pattern: Standard Names.     (line  176)
+* VEC_EXTRACT_ODD_EXPR:                  Vectors.            (line    6)
+* vec_extract_oddM instruction pattern:  Standard Names.     (line  183)
+* vec_extractM instruction pattern:      Standard Names.     (line  171)
+* vec_initM instruction pattern:         Standard Names.     (line  204)
+* VEC_INTERLEAVE_HIGH_EXPR:              Vectors.            (line    6)
+* vec_interleave_highM instruction pattern: Standard Names.  (line  190)
+* VEC_INTERLEAVE_LOW_EXPR:               Vectors.            (line    6)
+* vec_interleave_lowM instruction pattern: Standard Names.   (line  197)
+* VEC_LSHIFT_EXPR:                       Vectors.            (line    6)
+* vec_merge:                             Vector Operations.  (line   11)
+* VEC_PACK_FIX_TRUNC_EXPR:               Vectors.            (line    6)
+* VEC_PACK_SAT_EXPR:                     Vectors.            (line    6)
+* vec_pack_sfix_trunc_M instruction pattern: Standard Names. (line  302)
+* vec_pack_ssat_M instruction pattern:   Standard Names.     (line  295)
+* VEC_PACK_TRUNC_EXPR:                   Vectors.            (line    6)
+* vec_pack_trunc_M instruction pattern:  Standard Names.     (line  288)
+* vec_pack_ufix_trunc_M instruction pattern: Standard Names. (line  302)
+* vec_pack_usat_M instruction pattern:   Standard Names.     (line  295)
+* VEC_RSHIFT_EXPR:                       Vectors.            (line    6)
+* vec_select:                            Vector Operations.  (line   19)
+* vec_setM instruction pattern:          Standard Names.     (line  166)
+* vec_shl_M instruction pattern:         Standard Names.     (line  282)
+* vec_shr_M instruction pattern:         Standard Names.     (line  282)
+* VEC_UNPACK_FLOAT_HI_EXPR:              Vectors.            (line    6)
+* VEC_UNPACK_FLOAT_LO_EXPR:              Vectors.            (line    6)
+* VEC_UNPACK_HI_EXPR:                    Vectors.            (line    6)
+* VEC_UNPACK_LO_EXPR:                    Vectors.            (line    6)
+* vec_unpacks_float_hi_M instruction pattern: Standard Names.
+                                                             (line  324)
+* vec_unpacks_float_lo_M instruction pattern: Standard Names.
+                                                             (line  324)
+* vec_unpacks_hi_M instruction pattern:  Standard Names.     (line  309)
+* vec_unpacks_lo_M instruction pattern:  Standard Names.     (line  309)
+* vec_unpacku_float_hi_M instruction pattern: Standard Names.
+                                                             (line  324)
+* vec_unpacku_float_lo_M instruction pattern: Standard Names.
+                                                             (line  324)
+* vec_unpacku_hi_M instruction pattern:  Standard Names.     (line  317)
+* vec_unpacku_lo_M instruction pattern:  Standard Names.     (line  317)
+* VEC_WIDEN_MULT_HI_EXPR:                Vectors.            (line    6)
+* VEC_WIDEN_MULT_LO_EXPR:                Vectors.            (line    6)
+* vec_widen_smult_hi_M instruction pattern: Standard Names.  (line  333)
+* vec_widen_smult_lo_M instruction pattern: Standard Names.  (line  333)
+* vec_widen_umult_hi_M instruction pattern: Standard Names.  (line  333)
+* vec_widen_umult_lo__M instruction pattern: Standard Names. (line  333)
+* vector:                                Containers.         (line    6)
+* vector operations:                     Vector Operations.  (line    6)
+* VECTOR_CST:                            Constant expressions.
+                                                             (line    6)
+* VECTOR_STORE_FLAG_VALUE:               Misc.               (line  308)
+* virtual operands:                      SSA Operands.       (line    6)
+* VIRTUAL_INCOMING_ARGS_REGNUM:          Regs and Memory.    (line   59)
+* VIRTUAL_OUTGOING_ARGS_REGNUM:          Regs and Memory.    (line   87)
+* VIRTUAL_STACK_DYNAMIC_REGNUM:          Regs and Memory.    (line   78)
+* VIRTUAL_STACK_VARS_REGNUM:             Regs and Memory.    (line   69)
+* VLIW:                                  Processor pipeline description.
+                                                             (line    6)
+* vlshrM3 instruction pattern:           Standard Names.     (line  445)
+* VMS:                                   Filesystem.         (line   37)
+* VMS_DEBUGGING_INFO:                    VMS Debug.          (line    9)
+* VOID_TYPE:                             Types.              (line    6)
+* VOIDmode:                              Machine Modes.      (line  190)
+* volatil:                               Flags.              (line  356)
+* volatil, in insn, call_insn, jump_insn, code_label, barrier, and note: Flags.
+                                                             (line   44)
+* volatil, in label_ref and reg_label:   Flags.              (line   65)
+* volatil, in mem, asm_operands, and asm_input: Flags.       (line   94)
+* volatil, in reg:                       Flags.              (line  116)
+* volatil, in subreg:                    Flags.              (line  188)
+* volatil, in symbol_ref:                Flags.              (line  224)
+* volatile memory references:            Flags.              (line  357)
+* volatile, in prefetch:                 Flags.              (line  232)
+* voptype_d:                             Manipulating GIMPLE statements.
+                                                             (line  115)
+* voting between constraint alternatives: Class Preferences. (line    6)
+* vrotlM3 instruction pattern:           Standard Names.     (line  445)
+* vrotrM3 instruction pattern:           Standard Names.     (line  445)
+* walk_dominator_tree:                   SSA.                (line  256)
+* walk_gimple_op:                        Statement and operand traversals.
+                                                             (line   32)
+* walk_gimple_seq:                       Statement and operand traversals.
+                                                             (line   50)
+* walk_gimple_stmt:                      Statement and operand traversals.
+                                                             (line   13)
+* walk_use_def_chains:                   SSA.                (line  232)
+* WCHAR_TYPE:                            Type Layout.        (line  192)
+* WCHAR_TYPE_SIZE:                       Type Layout.        (line  200)
+* which_alternative:                     Output Statement.   (line   59)
+* WHILE_BODY:                            Statements for C++. (line    6)
+* WHILE_COND:                            Statements for C++. (line    6)
+* WHILE_STMT:                            Statements for C++. (line    6)
+* WIDEST_HARDWARE_FP_SIZE:               Type Layout.        (line  147)
+* WINT_TYPE:                             Type Layout.        (line  205)
+* word_mode:                             Machine Modes.      (line  336)
+* WORD_REGISTER_OPERATIONS:              Misc.               (line   63)
+* WORD_SWITCH_TAKES_ARG:                 Driver.             (line   20)
+* WORDS_BIG_ENDIAN:                      Storage Layout.     (line   29)
+* WORDS_BIG_ENDIAN, effect on subreg:    Regs and Memory.    (line  217)
+* X in constraint:                       Simple Constraints. (line  114)
+* x-HOST:                                Host Fragment.      (line    6)
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+* XCOFF_DEBUGGING_INFO:                  DBX Options.        (line   13)
+* XEXP:                                  Accessors.          (line    6)
+* XF_SIZE:                               Type Layout.        (line  131)
+* XFmode:                                Machine Modes.      (line   79)
+* XINT:                                  Accessors.          (line    6)
+* xm-MACHINE.h <1>:                      Filesystem.         (line    6)
+* xm-MACHINE.h:                          Host Misc.          (line    6)
+* xor:                                   Arithmetic.         (line  163)
+* xor, canonicalization of:              Insn Canonicalizations.
+                                                             (line   79)
+* xorM3 instruction pattern:             Standard Names.     (line  222)
+* XSTR:                                  Accessors.          (line    6)
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+* XVECEXP:                               Accessors.          (line   48)
+* XVECLEN:                               Accessors.          (line   44)
+* XWINT:                                 Accessors.          (line    6)
+* zero_extend:                           Conversions.        (line   28)
+* zero_extendMN2 instruction pattern:    Standard Names.     (line  813)
+* zero_extract:                          Bit-Fields.         (line   30)
+* zero_extract, canonicalization of:     Insn Canonicalizations.
+                                                             (line   88)
+
+
+
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+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gprof.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gprof.info
new file mode 100644
index 00000000..af55b332
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/gprof.info
@@ -0,0 +1,2469 @@
+This is gprof.info, produced by makeinfo version 4.13 from ../../../binutils-2.20/gprof/gprof.texi.
+
+START-INFO-DIR-ENTRY
+* gprof: (gprof).                Profiling your program's execution
+END-INFO-DIR-ENTRY
+
+   This file documents the gprof profiler of the GNU system.
+
+   Copyright (C) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008,
+2009 Free Software Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: gprof.info,  Node: Top,  Next: Introduction,  Up: (dir)
+
+Profiling a Program: Where Does It Spend Its Time?
+**************************************************
+
+This manual describes the GNU profiler, `gprof', and how you can use it
+to determine which parts of a program are taking most of the execution
+time.  We assume that you know how to write, compile, and execute
+programs.  GNU `gprof' was written by Jay Fenlason.
+
+   This manual is for `gprof' (GNU Binutils) version 2.20.
+
+   This document is distributed under the terms of the GNU Free
+Documentation License version 1.3.  A copy of the license is included
+in the section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* Introduction::        What profiling means, and why it is useful.
+
+* Compiling::           How to compile your program for profiling.
+* Executing::           Executing your program to generate profile data
+* Invoking::            How to run `gprof', and its options
+
+* Output::              Interpreting `gprof''s output
+
+* Inaccuracy::          Potential problems you should be aware of
+* How do I?::           Answers to common questions
+* Incompatibilities::   (between GNU `gprof' and Unix `gprof'.)
+* Details::             Details of how profiling is done
+* GNU Free Documentation License::  GNU Free Documentation License
+
+
+File: gprof.info,  Node: Introduction,  Next: Compiling,  Prev: Top,  Up: Top
+
+1 Introduction to Profiling
+***************************
+
+Profiling allows you to learn where your program spent its time and
+which functions called which other functions while it was executing.
+This information can show you which pieces of your program are slower
+than you expected, and might be candidates for rewriting to make your
+program execute faster.  It can also tell you which functions are being
+called more or less often than you expected.  This may help you spot
+bugs that had otherwise been unnoticed.
+
+   Since the profiler uses information collected during the actual
+execution of your program, it can be used on programs that are too
+large or too complex to analyze by reading the source.  However, how
+your program is run will affect the information that shows up in the
+profile data.  If you don't use some feature of your program while it
+is being profiled, no profile information will be generated for that
+feature.
+
+   Profiling has several steps:
+
+   * You must compile and link your program with profiling enabled.
+     *Note Compiling a Program for Profiling: Compiling.
+
+   * You must execute your program to generate a profile data file.
+     *Note Executing the Program: Executing.
+
+   * You must run `gprof' to analyze the profile data.  *Note `gprof'
+     Command Summary: Invoking.
+
+   The next three chapters explain these steps in greater detail.
+
+   Several forms of output are available from the analysis.
+
+   The "flat profile" shows how much time your program spent in each
+function, and how many times that function was called.  If you simply
+want to know which functions burn most of the cycles, it is stated
+concisely here.  *Note The Flat Profile: Flat Profile.
+
+   The "call graph" shows, for each function, which functions called
+it, which other functions it called, and how many times.  There is also
+an estimate of how much time was spent in the subroutines of each
+function.  This can suggest places where you might try to eliminate
+function calls that use a lot of time.  *Note The Call Graph: Call
+Graph.
+
+   The "annotated source" listing is a copy of the program's source
+code, labeled with the number of times each line of the program was
+executed.  *Note The Annotated Source Listing: Annotated Source.
+
+   To better understand how profiling works, you may wish to read a
+description of its implementation.  *Note Implementation of Profiling:
+Implementation.
+
+
+File: gprof.info,  Node: Compiling,  Next: Executing,  Prev: Introduction,  Up: Top
+
+2 Compiling a Program for Profiling
+***********************************
+
+The first step in generating profile information for your program is to
+compile and link it with profiling enabled.
+
+   To compile a source file for profiling, specify the `-pg' option when
+you run the compiler.  (This is in addition to the options you normally
+use.)
+
+   To link the program for profiling, if you use a compiler such as `cc'
+to do the linking, simply specify `-pg' in addition to your usual
+options.  The same option, `-pg', alters either compilation or linking
+to do what is necessary for profiling.  Here are examples:
+
+     cc -g -c myprog.c utils.c -pg
+     cc -o myprog myprog.o utils.o -pg
+
+   The `-pg' option also works with a command that both compiles and
+links:
+
+     cc -o myprog myprog.c utils.c -g -pg
+
+   Note: The `-pg' option must be part of your compilation options as
+well as your link options.  If it is not then no call-graph data will
+be gathered and when you run `gprof' you will get an error message like
+this:
+
+     gprof: gmon.out file is missing call-graph data
+
+   If you add the `-Q' switch to suppress the printing of the call
+graph data you will still be able to see the time samples:
+
+     Flat profile:
+
+     Each sample counts as 0.01 seconds.
+       %   cumulative   self              self     total
+      time   seconds   seconds    calls  Ts/call  Ts/call  name
+      44.12      0.07     0.07                             zazLoop
+      35.29      0.14     0.06                             main
+      20.59      0.17     0.04                             bazMillion
+
+   If you run the linker `ld' directly instead of through a compiler
+such as `cc', you may have to specify a profiling startup file
+`gcrt0.o' as the first input file instead of the usual startup file
+`crt0.o'.  In addition, you would probably want to specify the
+profiling C library, `libc_p.a', by writing `-lc_p' instead of the
+usual `-lc'.  This is not absolutely necessary, but doing this gives
+you number-of-calls information for standard library functions such as
+`read' and `open'.  For example:
+
+     ld -o myprog /lib/gcrt0.o myprog.o utils.o -lc_p
+
+   If you are running the program on a system which supports shared
+libraries you may run into problems with the profiling support code in
+a shared library being called before that library has been fully
+initialised.  This is usually detected by the program encountering a
+segmentation fault as soon as it is run.  The solution is to link
+against a static version of the library containing the profiling
+support code, which for `gcc' users can be done via the `-static' or
+`-static-libgcc' command line option.  For example:
+
+     gcc -g -pg -static-libgcc myprog.c utils.c -o myprog
+
+   If you compile only some of the modules of the program with `-pg',
+you can still profile the program, but you won't get complete
+information about the modules that were compiled without `-pg'.  The
+only information you get for the functions in those modules is the
+total time spent in them; there is no record of how many times they
+were called, or from where.  This will not affect the flat profile
+(except that the `calls' field for the functions will be blank), but
+will greatly reduce the usefulness of the call graph.
+
+   If you wish to perform line-by-line profiling you should use the
+`gcov' tool instead of `gprof'.  See that tool's manual or info pages
+for more details of how to do this.
+
+   Note, older versions of `gcc' produce line-by-line profiling
+information that works with `gprof' rather than `gcov' so there is
+still support for displaying this kind of information in `gprof'. *Note
+Line-by-line Profiling: Line-by-line.
+
+   It also worth noting that `gcc' implements a
+`-finstrument-functions' command line option which will insert calls to
+special user supplied instrumentation routines at the entry and exit of
+every function in their program.  This can be used to implement an
+alternative profiling scheme.
+
+
+File: gprof.info,  Node: Executing,  Next: Invoking,  Prev: Compiling,  Up: Top
+
+3 Executing the Program
+***********************
+
+Once the program is compiled for profiling, you must run it in order to
+generate the information that `gprof' needs.  Simply run the program as
+usual, using the normal arguments, file names, etc.  The program should
+run normally, producing the same output as usual.  It will, however, run
+somewhat slower than normal because of the time spent collecting and
+writing the profile data.
+
+   The way you run the program--the arguments and input that you give
+it--may have a dramatic effect on what the profile information shows.
+The profile data will describe the parts of the program that were
+activated for the particular input you use.  For example, if the first
+command you give to your program is to quit, the profile data will show
+the time used in initialization and in cleanup, but not much else.
+
+   Your program will write the profile data into a file called
+`gmon.out' just before exiting.  If there is already a file called
+`gmon.out', its contents are overwritten.  There is currently no way to
+tell the program to write the profile data under a different name, but
+you can rename the file afterwards if you are concerned that it may be
+overwritten.
+
+   In order to write the `gmon.out' file properly, your program must
+exit normally: by returning from `main' or by calling `exit'.  Calling
+the low-level function `_exit' does not write the profile data, and
+neither does abnormal termination due to an unhandled signal.
+
+   The `gmon.out' file is written in the program's _current working
+directory_ at the time it exits.  This means that if your program calls
+`chdir', the `gmon.out' file will be left in the last directory your
+program `chdir''d to.  If you don't have permission to write in this
+directory, the file is not written, and you will get an error message.
+
+   Older versions of the GNU profiling library may also write a file
+called `bb.out'.  This file, if present, contains an human-readable
+listing of the basic-block execution counts.  Unfortunately, the
+appearance of a human-readable `bb.out' means the basic-block counts
+didn't get written into `gmon.out'.  The Perl script `bbconv.pl',
+included with the `gprof' source distribution, will convert a `bb.out'
+file into a format readable by `gprof'.  Invoke it like this:
+
+     bbconv.pl < bb.out > BH-DATA
+
+   This translates the information in `bb.out' into a form that `gprof'
+can understand.  But you still need to tell `gprof' about the existence
+of this translated information.  To do that, include BB-DATA on the
+`gprof' command line, _along with `gmon.out'_, like this:
+
+     gprof OPTIONS EXECUTABLE-FILE gmon.out BB-DATA [YET-MORE-PROFILE-DATA-FILES...] [> OUTFILE]
+
+
+File: gprof.info,  Node: Invoking,  Next: Output,  Prev: Executing,  Up: Top
+
+4 `gprof' Command Summary
+*************************
+
+After you have a profile data file `gmon.out', you can run `gprof' to
+interpret the information in it.  The `gprof' program prints a flat
+profile and a call graph on standard output.  Typically you would
+redirect the output of `gprof' into a file with `>'.
+
+   You run `gprof' like this:
+
+     gprof OPTIONS [EXECUTABLE-FILE [PROFILE-DATA-FILES...]] [> OUTFILE]
+
+Here square-brackets indicate optional arguments.
+
+   If you omit the executable file name, the file `a.out' is used.  If
+you give no profile data file name, the file `gmon.out' is used.  If
+any file is not in the proper format, or if the profile data file does
+not appear to belong to the executable file, an error message is
+printed.
+
+   You can give more than one profile data file by entering all their
+names after the executable file name; then the statistics in all the
+data files are summed together.
+
+   The order of these options does not matter.
+
+* Menu:
+
+* Output Options::      Controlling `gprof''s output style
+* Analysis Options::    Controlling how `gprof' analyzes its data
+* Miscellaneous Options::
+* Deprecated Options::  Options you no longer need to use, but which
+                            have been retained for compatibility
+* Symspecs::            Specifying functions to include or exclude
+
+
+File: gprof.info,  Node: Output Options,  Next: Analysis Options,  Up: Invoking
+
+4.1 Output Options
+==================
+
+These options specify which of several output formats `gprof' should
+produce.
+
+   Many of these options take an optional "symspec" to specify
+functions to be included or excluded.  These options can be specified
+multiple times, with different symspecs, to include or exclude sets of
+symbols.  *Note Symspecs: Symspecs.
+
+   Specifying any of these options overrides the default (`-p -q'),
+which prints a flat profile and call graph analysis for all functions.
+
+`-A[SYMSPEC]'
+`--annotated-source[=SYMSPEC]'
+     The `-A' option causes `gprof' to print annotated source code.  If
+     SYMSPEC is specified, print output only for matching symbols.
+     *Note The Annotated Source Listing: Annotated Source.
+
+`-b'
+`--brief'
+     If the `-b' option is given, `gprof' doesn't print the verbose
+     blurbs that try to explain the meaning of all of the fields in the
+     tables.  This is useful if you intend to print out the output, or
+     are tired of seeing the blurbs.
+
+`-C[SYMSPEC]'
+`--exec-counts[=SYMSPEC]'
+     The `-C' option causes `gprof' to print a tally of functions and
+     the number of times each was called.  If SYMSPEC is specified,
+     print tally only for matching symbols.
+
+     If the profile data file contains basic-block count records,
+     specifying the `-l' option, along with `-C', will cause basic-block
+     execution counts to be tallied and displayed.
+
+`-i'
+`--file-info'
+     The `-i' option causes `gprof' to display summary information
+     about the profile data file(s) and then exit.  The number of
+     histogram, call graph, and basic-block count records is displayed.
+
+`-I DIRS'
+`--directory-path=DIRS'
+     The `-I' option specifies a list of search directories in which to
+     find source files.  Environment variable GPROF_PATH can also be
+     used to convey this information.  Used mostly for annotated source
+     output.
+
+`-J[SYMSPEC]'
+`--no-annotated-source[=SYMSPEC]'
+     The `-J' option causes `gprof' not to print annotated source code.
+     If SYMSPEC is specified, `gprof' prints annotated source, but
+     excludes matching symbols.
+
+`-L'
+`--print-path'
+     Normally, source filenames are printed with the path component
+     suppressed.  The `-L' option causes `gprof' to print the full
+     pathname of source filenames, which is determined from symbolic
+     debugging information in the image file and is relative to the
+     directory in which the compiler was invoked.
+
+`-p[SYMSPEC]'
+`--flat-profile[=SYMSPEC]'
+     The `-p' option causes `gprof' to print a flat profile.  If
+     SYMSPEC is specified, print flat profile only for matching symbols.
+     *Note The Flat Profile: Flat Profile.
+
+`-P[SYMSPEC]'
+`--no-flat-profile[=SYMSPEC]'
+     The `-P' option causes `gprof' to suppress printing a flat profile.
+     If SYMSPEC is specified, `gprof' prints a flat profile, but
+     excludes matching symbols.
+
+`-q[SYMSPEC]'
+`--graph[=SYMSPEC]'
+     The `-q' option causes `gprof' to print the call graph analysis.
+     If SYMSPEC is specified, print call graph only for matching symbols
+     and their children.  *Note The Call Graph: Call Graph.
+
+`-Q[SYMSPEC]'
+`--no-graph[=SYMSPEC]'
+     The `-Q' option causes `gprof' to suppress printing the call graph.
+     If SYMSPEC is specified, `gprof' prints a call graph, but excludes
+     matching symbols.
+
+`-t'
+`--table-length=NUM'
+     The `-t' option causes the NUM most active source lines in each
+     source file to be listed when source annotation is enabled.  The
+     default is 10.
+
+`-y'
+`--separate-files'
+     This option affects annotated source output only.  Normally,
+     `gprof' prints annotated source files to standard-output.  If this
+     option is specified, annotated source for a file named
+     `path/FILENAME' is generated in the file `FILENAME-ann'.  If the
+     underlying file system would truncate `FILENAME-ann' so that it
+     overwrites the original `FILENAME', `gprof' generates annotated
+     source in the file `FILENAME.ann' instead (if the original file
+     name has an extension, that extension is _replaced_ with `.ann').
+
+`-Z[SYMSPEC]'
+`--no-exec-counts[=SYMSPEC]'
+     The `-Z' option causes `gprof' not to print a tally of functions
+     and the number of times each was called.  If SYMSPEC is specified,
+     print tally, but exclude matching symbols.
+
+`-r'
+`--function-ordering'
+     The `--function-ordering' option causes `gprof' to print a
+     suggested function ordering for the program based on profiling
+     data.  This option suggests an ordering which may improve paging,
+     tlb and cache behavior for the program on systems which support
+     arbitrary ordering of functions in an executable.
+
+     The exact details of how to force the linker to place functions in
+     a particular order is system dependent and out of the scope of this
+     manual.
+
+`-R MAP_FILE'
+`--file-ordering MAP_FILE'
+     The `--file-ordering' option causes `gprof' to print a suggested
+     .o link line ordering for the program based on profiling data.
+     This option suggests an ordering which may improve paging, tlb and
+     cache behavior for the program on systems which do not support
+     arbitrary ordering of functions in an executable.
+
+     Use of the `-a' argument is highly recommended with this option.
+
+     The MAP_FILE argument is a pathname to a file which provides
+     function name to object file mappings.  The format of the file is
+     similar to the output of the program `nm'.
+
+          c-parse.o:00000000 T yyparse
+          c-parse.o:00000004 C yyerrflag
+          c-lang.o:00000000 T maybe_objc_method_name
+          c-lang.o:00000000 T print_lang_statistics
+          c-lang.o:00000000 T recognize_objc_keyword
+          c-decl.o:00000000 T print_lang_identifier
+          c-decl.o:00000000 T print_lang_type
+          ...
+
+     To create a MAP_FILE with GNU `nm', type a command like `nm
+     --extern-only --defined-only -v --print-file-name program-name'.
+
+`-T'
+`--traditional'
+     The `-T' option causes `gprof' to print its output in
+     "traditional" BSD style.
+
+`-w WIDTH'
+`--width=WIDTH'
+     Sets width of output lines to WIDTH.  Currently only used when
+     printing the function index at the bottom of the call graph.
+
+`-x'
+`--all-lines'
+     This option affects annotated source output only.  By default,
+     only the lines at the beginning of a basic-block are annotated.
+     If this option is specified, every line in a basic-block is
+     annotated by repeating the annotation for the first line.  This
+     behavior is similar to `tcov''s `-a'.
+
+`--demangle[=STYLE]'
+`--no-demangle'
+     These options control whether C++ symbol names should be demangled
+     when printing output.  The default is to demangle symbols.  The
+     `--no-demangle' option may be used to turn off demangling.
+     Different compilers have different mangling styles.  The optional
+     demangling style argument can be used to choose an appropriate
+     demangling style for your compiler.
+
+
+File: gprof.info,  Node: Analysis Options,  Next: Miscellaneous Options,  Prev: Output Options,  Up: Invoking
+
+4.2 Analysis Options
+====================
+
+`-a'
+`--no-static'
+     The `-a' option causes `gprof' to suppress the printing of
+     statically declared (private) functions.  (These are functions
+     whose names are not listed as global, and which are not visible
+     outside the file/function/block where they were defined.)  Time
+     spent in these functions, calls to/from them, etc., will all be
+     attributed to the function that was loaded directly before it in
+     the executable file.  This option affects both the flat profile
+     and the call graph.
+
+`-c'
+`--static-call-graph'
+     The `-c' option causes the call graph of the program to be
+     augmented by a heuristic which examines the text space of the
+     object file and identifies function calls in the binary machine
+     code.  Since normal call graph records are only generated when
+     functions are entered, this option identifies children that could
+     have been called, but never were.  Calls to functions that were
+     not compiled with profiling enabled are also identified, but only
+     if symbol table entries are present for them.  Calls to dynamic
+     library routines are typically _not_ found by this option.
+     Parents or children identified via this heuristic are indicated in
+     the call graph with call counts of `0'.
+
+`-D'
+`--ignore-non-functions'
+     The `-D' option causes `gprof' to ignore symbols which are not
+     known to be functions.  This option will give more accurate
+     profile data on systems where it is supported (Solaris and HPUX for
+     example).
+
+`-k FROM/TO'
+     The `-k' option allows you to delete from the call graph any arcs
+     from symbols matching symspec FROM to those matching symspec TO.
+
+`-l'
+`--line'
+     The `-l' option enables line-by-line profiling, which causes
+     histogram hits to be charged to individual source code lines,
+     instead of functions.  This feature only works with programs
+     compiled by older versions of the `gcc' compiler.  Newer versions
+     of `gcc' are designed to work with the `gcov' tool instead.
+
+     If the program was compiled with basic-block counting enabled,
+     this option will also identify how many times each line of code
+     was executed.  While line-by-line profiling can help isolate where
+     in a large function a program is spending its time, it also
+     significantly increases the running time of `gprof', and magnifies
+     statistical inaccuracies.  *Note Statistical Sampling Error:
+     Sampling Error.
+
+`-m NUM'
+`--min-count=NUM'
+     This option affects execution count output only.  Symbols that are
+     executed less than NUM times are suppressed.
+
+`-nSYMSPEC'
+`--time=SYMSPEC'
+     The `-n' option causes `gprof', in its call graph analysis, to
+     only propagate times for symbols matching SYMSPEC.
+
+`-NSYMSPEC'
+`--no-time=SYMSPEC'
+     The `-n' option causes `gprof', in its call graph analysis, not to
+     propagate times for symbols matching SYMSPEC.
+
+`-SFILENAME'
+`--external-symbol-table=FILENAME'
+     The `-S' option causes `gprof' to read an external symbol table
+     file, such as `/proc/kallsyms', rather than read the symbol table
+     from the given object file (the default is `a.out'). This is useful
+     for profiling kernel modules.
+
+`-z'
+`--display-unused-functions'
+     If you give the `-z' option, `gprof' will mention all functions in
+     the flat profile, even those that were never called, and that had
+     no time spent in them.  This is useful in conjunction with the
+     `-c' option for discovering which routines were never called.
+
+
+
+File: gprof.info,  Node: Miscellaneous Options,  Next: Deprecated Options,  Prev: Analysis Options,  Up: Invoking
+
+4.3 Miscellaneous Options
+=========================
+
+`-d[NUM]'
+`--debug[=NUM]'
+     The `-d NUM' option specifies debugging options.  If NUM is not
+     specified, enable all debugging.  *Note Debugging `gprof':
+     Debugging.
+
+`-h'
+`--help'
+     The `-h' option prints command line usage.
+
+`-ONAME'
+`--file-format=NAME'
+     Selects the format of the profile data files.  Recognized formats
+     are `auto' (the default), `bsd', `4.4bsd', `magic', and `prof'
+     (not yet supported).
+
+`-s'
+`--sum'
+     The `-s' option causes `gprof' to summarize the information in the
+     profile data files it read in, and write out a profile data file
+     called `gmon.sum', which contains all the information from the
+     profile data files that `gprof' read in.  The file `gmon.sum' may
+     be one of the specified input files; the effect of this is to
+     merge the data in the other input files into `gmon.sum'.
+
+     Eventually you can run `gprof' again without `-s' to analyze the
+     cumulative data in the file `gmon.sum'.
+
+`-v'
+`--version'
+     The `-v' flag causes `gprof' to print the current version number,
+     and then exit.
+
+
+
+File: gprof.info,  Node: Deprecated Options,  Next: Symspecs,  Prev: Miscellaneous Options,  Up: Invoking
+
+4.4 Deprecated Options
+======================
+
+     These options have been replaced with newer versions that use
+     symspecs.
+
+`-e FUNCTION_NAME'
+     The `-e FUNCTION' option tells `gprof' to not print information
+     about the function FUNCTION_NAME (and its children...) in the call
+     graph.  The function will still be listed as a child of any
+     functions that call it, but its index number will be shown as
+     `[not printed]'.  More than one `-e' option may be given; only one
+     FUNCTION_NAME may be indicated with each `-e' option.
+
+`-E FUNCTION_NAME'
+     The `-E FUNCTION' option works like the `-e' option, but time
+     spent in the function (and children who were not called from
+     anywhere else), will not be used to compute the
+     percentages-of-time for the call graph.  More than one `-E' option
+     may be given; only one FUNCTION_NAME may be indicated with each
+     `-E' option.
+
+`-f FUNCTION_NAME'
+     The `-f FUNCTION' option causes `gprof' to limit the call graph to
+     the function FUNCTION_NAME and its children (and their
+     children...).  More than one `-f' option may be given; only one
+     FUNCTION_NAME may be indicated with each `-f' option.
+
+`-F FUNCTION_NAME'
+     The `-F FUNCTION' option works like the `-f' option, but only time
+     spent in the function and its children (and their children...)
+     will be used to determine total-time and percentages-of-time for
+     the call graph.  More than one `-F' option may be given; only one
+     FUNCTION_NAME may be indicated with each `-F' option.  The `-F'
+     option overrides the `-E' option.
+
+
+   Note that only one function can be specified with each `-e', `-E',
+`-f' or `-F' option.  To specify more than one function, use multiple
+options.  For example, this command:
+
+     gprof -e boring -f foo -f bar myprogram > gprof.output
+
+lists in the call graph all functions that were reached from either
+`foo' or `bar' and were not reachable from `boring'.
+
+
+File: gprof.info,  Node: Symspecs,  Prev: Deprecated Options,  Up: Invoking
+
+4.5 Symspecs
+============
+
+Many of the output options allow functions to be included or excluded
+using "symspecs" (symbol specifications), which observe the following
+syntax:
+
+       filename_containing_a_dot
+     | funcname_not_containing_a_dot
+     | linenumber
+     | ( [ any_filename ] `:' ( any_funcname | linenumber ) )
+
+   Here are some sample symspecs:
+
+`main.c'
+     Selects everything in file `main.c'--the dot in the string tells
+     `gprof' to interpret the string as a filename, rather than as a
+     function name.  To select a file whose name does not contain a
+     dot, a trailing colon should be specified.  For example, `odd:' is
+     interpreted as the file named `odd'.
+
+`main'
+     Selects all functions named `main'.
+
+     Note that there may be multiple instances of the same function name
+     because some of the definitions may be local (i.e., static).
+     Unless a function name is unique in a program, you must use the
+     colon notation explained below to specify a function from a
+     specific source file.
+
+     Sometimes, function names contain dots.  In such cases, it is
+     necessary to add a leading colon to the name.  For example,
+     `:.mul' selects function `.mul'.
+
+     In some object file formats, symbols have a leading underscore.
+     `gprof' will normally not print these underscores.  When you name a
+     symbol in a symspec, you should type it exactly as `gprof' prints
+     it in its output.  For example, if the compiler produces a symbol
+     `_main' from your `main' function, `gprof' still prints it as
+     `main' in its output, so you should use `main' in symspecs.
+
+`main.c:main'
+     Selects function `main' in file `main.c'.
+
+`main.c:134'
+     Selects line 134 in file `main.c'.
+
+
+File: gprof.info,  Node: Output,  Next: Inaccuracy,  Prev: Invoking,  Up: Top
+
+5 Interpreting `gprof''s Output
+*******************************
+
+`gprof' can produce several different output styles, the most important
+of which are described below.  The simplest output styles (file
+information, execution count, and function and file ordering) are not
+described here, but are documented with the respective options that
+trigger them.  *Note Output Options: Output Options.
+
+* Menu:
+
+* Flat Profile::        The flat profile shows how much time was spent
+                            executing directly in each function.
+* Call Graph::          The call graph shows which functions called which
+                            others, and how much time each function used
+                            when its subroutine calls are included.
+* Line-by-line::        `gprof' can analyze individual source code lines
+* Annotated Source::    The annotated source listing displays source code
+                            labeled with execution counts
+
+
+File: gprof.info,  Node: Flat Profile,  Next: Call Graph,  Up: Output
+
+5.1 The Flat Profile
+====================
+
+The "flat profile" shows the total amount of time your program spent
+executing each function.  Unless the `-z' option is given, functions
+with no apparent time spent in them, and no apparent calls to them, are
+not mentioned.  Note that if a function was not compiled for profiling,
+and didn't run long enough to show up on the program counter histogram,
+it will be indistinguishable from a function that was never called.
+
+   This is part of a flat profile for a small program:
+
+     Flat profile:
+
+     Each sample counts as 0.01 seconds.
+       %   cumulative   self              self     total
+      time   seconds   seconds    calls  ms/call  ms/call  name
+      33.34      0.02     0.02     7208     0.00     0.00  open
+      16.67      0.03     0.01      244     0.04     0.12  offtime
+      16.67      0.04     0.01        8     1.25     1.25  memccpy
+      16.67      0.05     0.01        7     1.43     1.43  write
+      16.67      0.06     0.01                             mcount
+       0.00      0.06     0.00      236     0.00     0.00  tzset
+       0.00      0.06     0.00      192     0.00     0.00  tolower
+       0.00      0.06     0.00       47     0.00     0.00  strlen
+       0.00      0.06     0.00       45     0.00     0.00  strchr
+       0.00      0.06     0.00        1     0.00    50.00  main
+       0.00      0.06     0.00        1     0.00     0.00  memcpy
+       0.00      0.06     0.00        1     0.00    10.11  print
+       0.00      0.06     0.00        1     0.00     0.00  profil
+       0.00      0.06     0.00        1     0.00    50.00  report
+     ...
+
+The functions are sorted first by decreasing run-time spent in them,
+then by decreasing number of calls, then alphabetically by name.  The
+functions `mcount' and `profil' are part of the profiling apparatus and
+appear in every flat profile; their time gives a measure of the amount
+of overhead due to profiling.
+
+   Just before the column headers, a statement appears indicating how
+much time each sample counted as.  This "sampling period" estimates the
+margin of error in each of the time figures.  A time figure that is not
+much larger than this is not reliable.  In this example, each sample
+counted as 0.01 seconds, suggesting a 100 Hz sampling rate.  The
+program's total execution time was 0.06 seconds, as indicated by the
+`cumulative seconds' field.  Since each sample counted for 0.01
+seconds, this means only six samples were taken during the run.  Two of
+the samples occurred while the program was in the `open' function, as
+indicated by the `self seconds' field.  Each of the other four samples
+occurred one each in `offtime', `memccpy', `write', and `mcount'.
+Since only six samples were taken, none of these values can be regarded
+as particularly reliable.  In another run, the `self seconds' field for
+`mcount' might well be `0.00' or `0.02'.  *Note Statistical Sampling
+Error: Sampling Error, for a complete discussion.
+
+   The remaining functions in the listing (those whose `self seconds'
+field is `0.00') didn't appear in the histogram samples at all.
+However, the call graph indicated that they were called, so therefore
+they are listed, sorted in decreasing order by the `calls' field.
+Clearly some time was spent executing these functions, but the paucity
+of histogram samples prevents any determination of how much time each
+took.
+
+   Here is what the fields in each line mean:
+
+`% time'
+     This is the percentage of the total execution time your program
+     spent in this function.  These should all add up to 100%.
+
+`cumulative seconds'
+     This is the cumulative total number of seconds the computer spent
+     executing this functions, plus the time spent in all the functions
+     above this one in this table.
+
+`self seconds'
+     This is the number of seconds accounted for by this function alone.
+     The flat profile listing is sorted first by this number.
+
+`calls'
+     This is the total number of times the function was called.  If the
+     function was never called, or the number of times it was called
+     cannot be determined (probably because the function was not
+     compiled with profiling enabled), the "calls" field is blank.
+
+`self ms/call'
+     This represents the average number of milliseconds spent in this
+     function per call, if this function is profiled.  Otherwise, this
+     field is blank for this function.
+
+`total ms/call'
+     This represents the average number of milliseconds spent in this
+     function and its descendants per call, if this function is
+     profiled.  Otherwise, this field is blank for this function.  This
+     is the only field in the flat profile that uses call graph
+     analysis.
+
+`name'
+     This is the name of the function.   The flat profile is sorted by
+     this field alphabetically after the "self seconds" and "calls"
+     fields are sorted.
+
+
+File: gprof.info,  Node: Call Graph,  Next: Line-by-line,  Prev: Flat Profile,  Up: Output
+
+5.2 The Call Graph
+==================
+
+The "call graph" shows how much time was spent in each function and its
+children.  From this information, you can find functions that, while
+they themselves may not have used much time, called other functions
+that did use unusual amounts of time.
+
+   Here is a sample call from a small program.  This call came from the
+same `gprof' run as the flat profile example in the previous section.
+
+     granularity: each sample hit covers 2 byte(s) for 20.00% of 0.05 seconds
+
+     index % time    self  children    called     name
+                                                      <spontaneous>
+     [1]    100.0    0.00    0.05                 start [1]
+                     0.00    0.05       1/1           main [2]
+                     0.00    0.00       1/2           on_exit [28]
+                     0.00    0.00       1/1           exit [59]
+     -----------------------------------------------
+                     0.00    0.05       1/1           start [1]
+     [2]    100.0    0.00    0.05       1         main [2]
+                     0.00    0.05       1/1           report [3]
+     -----------------------------------------------
+                     0.00    0.05       1/1           main [2]
+     [3]    100.0    0.00    0.05       1         report [3]
+                     0.00    0.03       8/8           timelocal [6]
+                     0.00    0.01       1/1           print [9]
+                     0.00    0.01       9/9           fgets [12]
+                     0.00    0.00      12/34          strncmp <cycle 1> [40]
+                     0.00    0.00       8/8           lookup [20]
+                     0.00    0.00       1/1           fopen [21]
+                     0.00    0.00       8/8           chewtime [24]
+                     0.00    0.00       8/16          skipspace [44]
+     -----------------------------------------------
+     [4]     59.8    0.01        0.02       8+472     <cycle 2 as a whole> [4]
+                     0.01        0.02     244+260         offtime <cycle 2> [7]
+                     0.00        0.00     236+1           tzset <cycle 2> [26]
+     -----------------------------------------------
+
+   The lines full of dashes divide this table into "entries", one for
+each function.  Each entry has one or more lines.
+
+   In each entry, the primary line is the one that starts with an index
+number in square brackets.  The end of this line says which function
+the entry is for.  The preceding lines in the entry describe the
+callers of this function and the following lines describe its
+subroutines (also called "children" when we speak of the call graph).
+
+   The entries are sorted by time spent in the function and its
+subroutines.
+
+   The internal profiling function `mcount' (*note The Flat Profile:
+Flat Profile.) is never mentioned in the call graph.
+
+* Menu:
+
+* Primary::       Details of the primary line's contents.
+* Callers::       Details of caller-lines' contents.
+* Subroutines::   Details of subroutine-lines' contents.
+* Cycles::        When there are cycles of recursion,
+                   such as `a' calls `b' calls `a'...
+
+
+File: gprof.info,  Node: Primary,  Next: Callers,  Up: Call Graph
+
+5.2.1 The Primary Line
+----------------------
+
+The "primary line" in a call graph entry is the line that describes the
+function which the entry is about and gives the overall statistics for
+this function.
+
+   For reference, we repeat the primary line from the entry for function
+`report' in our main example, together with the heading line that shows
+the names of the fields:
+
+     index  % time    self  children called     name
+     ...
+     [3]    100.0    0.00    0.05       1         report [3]
+
+   Here is what the fields in the primary line mean:
+
+`index'
+     Entries are numbered with consecutive integers.  Each function
+     therefore has an index number, which appears at the beginning of
+     its primary line.
+
+     Each cross-reference to a function, as a caller or subroutine of
+     another, gives its index number as well as its name.  The index
+     number guides you if you wish to look for the entry for that
+     function.
+
+`% time'
+     This is the percentage of the total time that was spent in this
+     function, including time spent in subroutines called from this
+     function.
+
+     The time spent in this function is counted again for the callers of
+     this function.  Therefore, adding up these percentages is
+     meaningless.
+
+`self'
+     This is the total amount of time spent in this function.  This
+     should be identical to the number printed in the `seconds' field
+     for this function in the flat profile.
+
+`children'
+     This is the total amount of time spent in the subroutine calls
+     made by this function.  This should be equal to the sum of all the
+     `self' and `children' entries of the children listed directly
+     below this function.
+
+`called'
+     This is the number of times the function was called.
+
+     If the function called itself recursively, there are two numbers,
+     separated by a `+'.  The first number counts non-recursive calls,
+     and the second counts recursive calls.
+
+     In the example above, the function `report' was called once from
+     `main'.
+
+`name'
+     This is the name of the current function.  The index number is
+     repeated after it.
+
+     If the function is part of a cycle of recursion, the cycle number
+     is printed between the function's name and the index number (*note
+     How Mutually Recursive Functions Are Described: Cycles.).  For
+     example, if function `gnurr' is part of cycle number one, and has
+     index number twelve, its primary line would be end like this:
+
+          gnurr <cycle 1> [12]
+
+
+File: gprof.info,  Node: Callers,  Next: Subroutines,  Prev: Primary,  Up: Call Graph
+
+5.2.2 Lines for a Function's Callers
+------------------------------------
+
+A function's entry has a line for each function it was called by.
+These lines' fields correspond to the fields of the primary line, but
+their meanings are different because of the difference in context.
+
+   For reference, we repeat two lines from the entry for the function
+`report', the primary line and one caller-line preceding it, together
+with the heading line that shows the names of the fields:
+
+     index  % time    self  children called     name
+     ...
+                     0.00    0.05       1/1           main [2]
+     [3]    100.0    0.00    0.05       1         report [3]
+
+   Here are the meanings of the fields in the caller-line for `report'
+called from `main':
+
+`self'
+     An estimate of the amount of time spent in `report' itself when it
+     was called from `main'.
+
+`children'
+     An estimate of the amount of time spent in subroutines of `report'
+     when `report' was called from `main'.
+
+     The sum of the `self' and `children' fields is an estimate of the
+     amount of time spent within calls to `report' from `main'.
+
+`called'
+     Two numbers: the number of times `report' was called from `main',
+     followed by the total number of non-recursive calls to `report'
+     from all its callers.
+
+`name and index number'
+     The name of the caller of `report' to which this line applies,
+     followed by the caller's index number.
+
+     Not all functions have entries in the call graph; some options to
+     `gprof' request the omission of certain functions.  When a caller
+     has no entry of its own, it still has caller-lines in the entries
+     of the functions it calls.
+
+     If the caller is part of a recursion cycle, the cycle number is
+     printed between the name and the index number.
+
+   If the identity of the callers of a function cannot be determined, a
+dummy caller-line is printed which has `<spontaneous>' as the "caller's
+name" and all other fields blank.  This can happen for signal handlers.
+
+
+File: gprof.info,  Node: Subroutines,  Next: Cycles,  Prev: Callers,  Up: Call Graph
+
+5.2.3 Lines for a Function's Subroutines
+----------------------------------------
+
+A function's entry has a line for each of its subroutines--in other
+words, a line for each other function that it called.  These lines'
+fields correspond to the fields of the primary line, but their meanings
+are different because of the difference in context.
+
+   For reference, we repeat two lines from the entry for the function
+`main', the primary line and a line for a subroutine, together with the
+heading line that shows the names of the fields:
+
+     index  % time    self  children called     name
+     ...
+     [2]    100.0    0.00    0.05       1         main [2]
+                     0.00    0.05       1/1           report [3]
+
+   Here are the meanings of the fields in the subroutine-line for `main'
+calling `report':
+
+`self'
+     An estimate of the amount of time spent directly within `report'
+     when `report' was called from `main'.
+
+`children'
+     An estimate of the amount of time spent in subroutines of `report'
+     when `report' was called from `main'.
+
+     The sum of the `self' and `children' fields is an estimate of the
+     total time spent in calls to `report' from `main'.
+
+`called'
+     Two numbers, the number of calls to `report' from `main' followed
+     by the total number of non-recursive calls to `report'.  This
+     ratio is used to determine how much of `report''s `self' and
+     `children' time gets credited to `main'.  *Note Estimating
+     `children' Times: Assumptions.
+
+`name'
+     The name of the subroutine of `main' to which this line applies,
+     followed by the subroutine's index number.
+
+     If the caller is part of a recursion cycle, the cycle number is
+     printed between the name and the index number.
+
+
+File: gprof.info,  Node: Cycles,  Prev: Subroutines,  Up: Call Graph
+
+5.2.4 How Mutually Recursive Functions Are Described
+----------------------------------------------------
+
+The graph may be complicated by the presence of "cycles of recursion"
+in the call graph.  A cycle exists if a function calls another function
+that (directly or indirectly) calls (or appears to call) the original
+function.  For example: if `a' calls `b', and `b' calls `a', then `a'
+and `b' form a cycle.
+
+   Whenever there are call paths both ways between a pair of functions,
+they belong to the same cycle.  If `a' and `b' call each other and `b'
+and `c' call each other, all three make one cycle.  Note that even if
+`b' only calls `a' if it was not called from `a', `gprof' cannot
+determine this, so `a' and `b' are still considered a cycle.
+
+   The cycles are numbered with consecutive integers.  When a function
+belongs to a cycle, each time the function name appears in the call
+graph it is followed by `<cycle NUMBER>'.
+
+   The reason cycles matter is that they make the time values in the
+call graph paradoxical.  The "time spent in children" of `a' should
+include the time spent in its subroutine `b' and in `b''s
+subroutines--but one of `b''s subroutines is `a'!  How much of `a''s
+time should be included in the children of `a', when `a' is indirectly
+recursive?
+
+   The way `gprof' resolves this paradox is by creating a single entry
+for the cycle as a whole.  The primary line of this entry describes the
+total time spent directly in the functions of the cycle.  The
+"subroutines" of the cycle are the individual functions of the cycle,
+and all other functions that were called directly by them.  The
+"callers" of the cycle are the functions, outside the cycle, that
+called functions in the cycle.
+
+   Here is an example portion of a call graph which shows a cycle
+containing functions `a' and `b'.  The cycle was entered by a call to
+`a' from `main'; both `a' and `b' called `c'.
+
+     index  % time    self  children called     name
+     ----------------------------------------
+                      1.77        0    1/1        main [2]
+     [3]     91.71    1.77        0    1+5    <cycle 1 as a whole> [3]
+                      1.02        0    3          b <cycle 1> [4]
+                      0.75        0    2          a <cycle 1> [5]
+     ----------------------------------------
+                                       3          a <cycle 1> [5]
+     [4]     52.85    1.02        0    0      b <cycle 1> [4]
+                                       2          a <cycle 1> [5]
+                         0        0    3/6        c [6]
+     ----------------------------------------
+                      1.77        0    1/1        main [2]
+                                       2          b <cycle 1> [4]
+     [5]     38.86    0.75        0    1      a <cycle 1> [5]
+                                       3          b <cycle 1> [4]
+                         0        0    3/6        c [6]
+     ----------------------------------------
+
+(The entire call graph for this program contains in addition an entry
+for `main', which calls `a', and an entry for `c', with callers `a' and
+`b'.)
+
+     index  % time    self  children called     name
+                                                  <spontaneous>
+     [1]    100.00       0     1.93    0      start [1]
+                      0.16     1.77    1/1        main [2]
+     ----------------------------------------
+                      0.16     1.77    1/1        start [1]
+     [2]    100.00    0.16     1.77    1      main [2]
+                      1.77        0    1/1        a <cycle 1> [5]
+     ----------------------------------------
+                      1.77        0    1/1        main [2]
+     [3]     91.71    1.77        0    1+5    <cycle 1 as a whole> [3]
+                      1.02        0    3          b <cycle 1> [4]
+                      0.75        0    2          a <cycle 1> [5]
+                         0        0    6/6        c [6]
+     ----------------------------------------
+                                       3          a <cycle 1> [5]
+     [4]     52.85    1.02        0    0      b <cycle 1> [4]
+                                       2          a <cycle 1> [5]
+                         0        0    3/6        c [6]
+     ----------------------------------------
+                      1.77        0    1/1        main [2]
+                                       2          b <cycle 1> [4]
+     [5]     38.86    0.75        0    1      a <cycle 1> [5]
+                                       3          b <cycle 1> [4]
+                         0        0    3/6        c [6]
+     ----------------------------------------
+                         0        0    3/6        b <cycle 1> [4]
+                         0        0    3/6        a <cycle 1> [5]
+     [6]      0.00       0        0    6      c [6]
+     ----------------------------------------
+
+   The `self' field of the cycle's primary line is the total time spent
+in all the functions of the cycle.  It equals the sum of the `self'
+fields for the individual functions in the cycle, found in the entry in
+the subroutine lines for these functions.
+
+   The `children' fields of the cycle's primary line and subroutine
+lines count only subroutines outside the cycle.  Even though `a' calls
+`b', the time spent in those calls to `b' is not counted in `a''s
+`children' time.  Thus, we do not encounter the problem of what to do
+when the time in those calls to `b' includes indirect recursive calls
+back to `a'.
+
+   The `children' field of a caller-line in the cycle's entry estimates
+the amount of time spent _in the whole cycle_, and its other
+subroutines, on the times when that caller called a function in the
+cycle.
+
+   The `called' field in the primary line for the cycle has two numbers:
+first, the number of times functions in the cycle were called by
+functions outside the cycle; second, the number of times they were
+called by functions in the cycle (including times when a function in
+the cycle calls itself).  This is a generalization of the usual split
+into non-recursive and recursive calls.
+
+   The `called' field of a subroutine-line for a cycle member in the
+cycle's entry says how many time that function was called from
+functions in the cycle.  The total of all these is the second number in
+the primary line's `called' field.
+
+   In the individual entry for a function in a cycle, the other
+functions in the same cycle can appear as subroutines and as callers.
+These lines show how many times each function in the cycle called or
+was called from each other function in the cycle.  The `self' and
+`children' fields in these lines are blank because of the difficulty of
+defining meanings for them when recursion is going on.
+
+
+File: gprof.info,  Node: Line-by-line,  Next: Annotated Source,  Prev: Call Graph,  Up: Output
+
+5.3 Line-by-line Profiling
+==========================
+
+`gprof''s `-l' option causes the program to perform "line-by-line"
+profiling.  In this mode, histogram samples are assigned not to
+functions, but to individual lines of source code.  This only works
+with programs compiled with older versions of the `gcc' compiler.
+Newer versions of `gcc' use a different program - `gcov' - to display
+line-by-line profiling information.
+
+   With the older versions of `gcc' the program usually has to be
+compiled with a `-g' option, in addition to `-pg', in order to generate
+debugging symbols for tracking source code lines.  Note, in much older
+versions of `gcc' the program had to be compiled with the `-a' command
+line option as well.
+
+   The flat profile is the most useful output table in line-by-line
+mode.  The call graph isn't as useful as normal, since the current
+version of `gprof' does not propagate call graph arcs from source code
+lines to the enclosing function.  The call graph does, however, show
+each line of code that called each function, along with a count.
+
+   Here is a section of `gprof''s output, without line-by-line
+profiling.  Note that `ct_init' accounted for four histogram hits, and
+13327 calls to `init_block'.
+
+     Flat profile:
+
+     Each sample counts as 0.01 seconds.
+       %   cumulative   self              self     total
+      time   seconds   seconds    calls  us/call  us/call  name
+      30.77      0.13     0.04     6335     6.31     6.31  ct_init
+
+
+     		     Call graph (explanation follows)
+
+
+     granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+     index % time    self  children    called     name
+
+                     0.00    0.00       1/13496       name_too_long
+                     0.00    0.00      40/13496       deflate
+                     0.00    0.00     128/13496       deflate_fast
+                     0.00    0.00   13327/13496       ct_init
+     [7]      0.0    0.00    0.00   13496         init_block
+
+   Now let's look at some of `gprof''s output from the same program run,
+this time with line-by-line profiling enabled.  Note that `ct_init''s
+four histogram hits are broken down into four lines of source code--one
+hit occurred on each of lines 349, 351, 382 and 385.  In the call graph,
+note how `ct_init''s 13327 calls to `init_block' are broken down into
+one call from line 396, 3071 calls from line 384, 3730 calls from line
+385, and 6525 calls from 387.
+
+     Flat profile:
+
+     Each sample counts as 0.01 seconds.
+       %   cumulative   self
+      time   seconds   seconds    calls  name
+       7.69      0.10     0.01           ct_init (trees.c:349)
+       7.69      0.11     0.01           ct_init (trees.c:351)
+       7.69      0.12     0.01           ct_init (trees.c:382)
+       7.69      0.13     0.01           ct_init (trees.c:385)
+
+
+     		     Call graph (explanation follows)
+
+
+     granularity: each sample hit covers 4 byte(s) for 7.69% of 0.13 seconds
+
+       % time    self  children    called     name
+
+                 0.00    0.00       1/13496       name_too_long (gzip.c:1440)
+                 0.00    0.00       1/13496       deflate (deflate.c:763)
+                 0.00    0.00       1/13496       ct_init (trees.c:396)
+                 0.00    0.00       2/13496       deflate (deflate.c:727)
+                 0.00    0.00       4/13496       deflate (deflate.c:686)
+                 0.00    0.00       5/13496       deflate (deflate.c:675)
+                 0.00    0.00      12/13496       deflate (deflate.c:679)
+                 0.00    0.00      16/13496       deflate (deflate.c:730)
+                 0.00    0.00     128/13496       deflate_fast (deflate.c:654)
+                 0.00    0.00    3071/13496       ct_init (trees.c:384)
+                 0.00    0.00    3730/13496       ct_init (trees.c:385)
+                 0.00    0.00    6525/13496       ct_init (trees.c:387)
+     [6]  0.0    0.00    0.00   13496         init_block (trees.c:408)
+
+
+File: gprof.info,  Node: Annotated Source,  Prev: Line-by-line,  Up: Output
+
+5.4 The Annotated Source Listing
+================================
+
+`gprof''s `-A' option triggers an annotated source listing, which lists
+the program's source code, each function labeled with the number of
+times it was called.  You may also need to specify the `-I' option, if
+`gprof' can't find the source code files.
+
+   With older versions of `gcc' compiling with `gcc ... -g -pg -a'
+augments your program with basic-block counting code, in addition to
+function counting code.  This enables `gprof' to determine how many
+times each line of code was executed.  With newer versions of `gcc'
+support for displaying basic-block counts is provided by the `gcov'
+program.
+
+   For example, consider the following function, taken from gzip, with
+line numbers added:
+
+      1 ulg updcrc(s, n)
+      2     uch *s;
+      3     unsigned n;
+      4 {
+      5     register ulg c;
+      6
+      7     static ulg crc = (ulg)0xffffffffL;
+      8
+      9     if (s == NULL) {
+     10         c = 0xffffffffL;
+     11     } else {
+     12         c = crc;
+     13         if (n) do {
+     14             c = crc_32_tab[...];
+     15         } while (--n);
+     16     }
+     17     crc = c;
+     18     return c ^ 0xffffffffL;
+     19 }
+
+   `updcrc' has at least five basic-blocks.  One is the function
+itself.  The `if' statement on line 9 generates two more basic-blocks,
+one for each branch of the `if'.  A fourth basic-block results from the
+`if' on line 13, and the contents of the `do' loop form the fifth
+basic-block.  The compiler may also generate additional basic-blocks to
+handle various special cases.
+
+   A program augmented for basic-block counting can be analyzed with
+`gprof -l -A'.  The `-x' option is also helpful, to ensure that each
+line of code is labeled at least once.  Here is `updcrc''s annotated
+source listing for a sample `gzip' run:
+
+                     ulg updcrc(s, n)
+                         uch *s;
+                         unsigned n;
+                 2 ->{
+                         register ulg c;
+
+                         static ulg crc = (ulg)0xffffffffL;
+
+                 2 ->    if (s == NULL) {
+                 1 ->        c = 0xffffffffL;
+                 1 ->    } else {
+                 1 ->        c = crc;
+                 1 ->        if (n) do {
+             26312 ->            c = crc_32_tab[...];
+     26312,1,26311 ->        } while (--n);
+                         }
+                 2 ->    crc = c;
+                 2 ->    return c ^ 0xffffffffL;
+                 2 ->}
+
+   In this example, the function was called twice, passing once through
+each branch of the `if' statement.  The body of the `do' loop was
+executed a total of 26312 times.  Note how the `while' statement is
+annotated.  It began execution 26312 times, once for each iteration
+through the loop.  One of those times (the last time) it exited, while
+it branched back to the beginning of the loop 26311 times.
+
+
+File: gprof.info,  Node: Inaccuracy,  Next: How do I?,  Prev: Output,  Up: Top
+
+6 Inaccuracy of `gprof' Output
+******************************
+
+* Menu:
+
+* Sampling Error::      Statistical margins of error
+* Assumptions::         Estimating children times
+
+
+File: gprof.info,  Node: Sampling Error,  Next: Assumptions,  Up: Inaccuracy
+
+6.1 Statistical Sampling Error
+==============================
+
+The run-time figures that `gprof' gives you are based on a sampling
+process, so they are subject to statistical inaccuracy.  If a function
+runs only a small amount of time, so that on the average the sampling
+process ought to catch that function in the act only once, there is a
+pretty good chance it will actually find that function zero times, or
+twice.
+
+   By contrast, the number-of-calls and basic-block figures are derived
+by counting, not sampling.  They are completely accurate and will not
+vary from run to run if your program is deterministic.
+
+   The "sampling period" that is printed at the beginning of the flat
+profile says how often samples are taken.  The rule of thumb is that a
+run-time figure is accurate if it is considerably bigger than the
+sampling period.
+
+   The actual amount of error can be predicted.  For N samples, the
+_expected_ error is the square-root of N.  For example, if the sampling
+period is 0.01 seconds and `foo''s run-time is 1 second, N is 100
+samples (1 second/0.01 seconds), sqrt(N) is 10 samples, so the expected
+error in `foo''s run-time is 0.1 seconds (10*0.01 seconds), or ten
+percent of the observed value.  Again, if the sampling period is 0.01
+seconds and `bar''s run-time is 100 seconds, N is 10000 samples,
+sqrt(N) is 100 samples, so the expected error in `bar''s run-time is 1
+second, or one percent of the observed value.  It is likely to vary
+this much _on the average_ from one profiling run to the next.
+(_Sometimes_ it will vary more.)
+
+   This does not mean that a small run-time figure is devoid of
+information.  If the program's _total_ run-time is large, a small
+run-time for one function does tell you that that function used an
+insignificant fraction of the whole program's time.  Usually this means
+it is not worth optimizing.
+
+   One way to get more accuracy is to give your program more (but
+similar) input data so it will take longer.  Another way is to combine
+the data from several runs, using the `-s' option of `gprof'.  Here is
+how:
+
+  1. Run your program once.
+
+  2. Issue the command `mv gmon.out gmon.sum'.
+
+  3. Run your program again, the same as before.
+
+  4. Merge the new data in `gmon.out' into `gmon.sum' with this command:
+
+          gprof -s EXECUTABLE-FILE gmon.out gmon.sum
+
+  5. Repeat the last two steps as often as you wish.
+
+  6. Analyze the cumulative data using this command:
+
+          gprof EXECUTABLE-FILE gmon.sum > OUTPUT-FILE
+
+
+File: gprof.info,  Node: Assumptions,  Prev: Sampling Error,  Up: Inaccuracy
+
+6.2 Estimating `children' Times
+===============================
+
+Some of the figures in the call graph are estimates--for example, the
+`children' time values and all the time figures in caller and
+subroutine lines.
+
+   There is no direct information about these measurements in the
+profile data itself.  Instead, `gprof' estimates them by making an
+assumption about your program that might or might not be true.
+
+   The assumption made is that the average time spent in each call to
+any function `foo' is not correlated with who called `foo'.  If `foo'
+used 5 seconds in all, and 2/5 of the calls to `foo' came from `a',
+then `foo' contributes 2 seconds to `a''s `children' time, by
+assumption.
+
+   This assumption is usually true enough, but for some programs it is
+far from true.  Suppose that `foo' returns very quickly when its
+argument is zero; suppose that `a' always passes zero as an argument,
+while other callers of `foo' pass other arguments.  In this program,
+all the time spent in `foo' is in the calls from callers other than `a'.
+But `gprof' has no way of knowing this; it will blindly and incorrectly
+charge 2 seconds of time in `foo' to the children of `a'.
+
+   We hope some day to put more complete data into `gmon.out', so that
+this assumption is no longer needed, if we can figure out how.  For the
+novice, the estimated figures are usually more useful than misleading.
+
+
+File: gprof.info,  Node: How do I?,  Next: Incompatibilities,  Prev: Inaccuracy,  Up: Top
+
+7 Answers to Common Questions
+*****************************
+
+How can I get more exact information about hot spots in my program?
+     Looking at the per-line call counts only tells part of the story.
+     Because `gprof' can only report call times and counts by function,
+     the best way to get finer-grained information on where the program
+     is spending its time is to re-factor large functions into sequences
+     of calls to smaller ones.  Beware however that this can introduce
+     artificial hot spots since compiling with `-pg' adds a significant
+     overhead to function calls.  An alternative solution is to use a
+     non-intrusive profiler, e.g. oprofile.
+
+How do I find which lines in my program were executed the most times?
+     Use the `gcov' program.
+
+How do I find which lines in my program called a particular function?
+     Use `gprof -l' and lookup the function in the call graph.  The
+     callers will be broken down by function and line number.
+
+How do I analyze a program that runs for less than a second?
+     Try using a shell script like this one:
+
+          for i in `seq 1 100`; do
+            fastprog
+            mv gmon.out gmon.out.$i
+          done
+
+          gprof -s fastprog gmon.out.*
+
+          gprof fastprog gmon.sum
+
+     If your program is completely deterministic, all the call counts
+     will be simple multiples of 100 (i.e., a function called once in
+     each run will appear with a call count of 100).
+
+
+
+File: gprof.info,  Node: Incompatibilities,  Next: Details,  Prev: How do I?,  Up: Top
+
+8 Incompatibilities with Unix `gprof'
+*************************************
+
+GNU `gprof' and Berkeley Unix `gprof' use the same data file
+`gmon.out', and provide essentially the same information.  But there
+are a few differences.
+
+   * GNU `gprof' uses a new, generalized file format with support for
+     basic-block execution counts and non-realtime histograms.  A magic
+     cookie and version number allows `gprof' to easily identify new
+     style files.  Old BSD-style files can still be read.  *Note
+     Profiling Data File Format: File Format.
+
+   * For a recursive function, Unix `gprof' lists the function as a
+     parent and as a child, with a `calls' field that lists the number
+     of recursive calls.  GNU `gprof' omits these lines and puts the
+     number of recursive calls in the primary line.
+
+   * When a function is suppressed from the call graph with `-e', GNU
+     `gprof' still lists it as a subroutine of functions that call it.
+
+   * GNU `gprof' accepts the `-k' with its argument in the form
+     `from/to', instead of `from to'.
+
+   * In the annotated source listing, if there are multiple basic
+     blocks on the same line, GNU `gprof' prints all of their counts,
+     separated by commas.
+
+   * The blurbs, field widths, and output formats are different.  GNU
+     `gprof' prints blurbs after the tables, so that you can see the
+     tables without skipping the blurbs.
+
+
+File: gprof.info,  Node: Details,  Next: GNU Free Documentation License,  Prev: Incompatibilities,  Up: Top
+
+9 Details of Profiling
+**********************
+
+* Menu:
+
+* Implementation::      How a program collects profiling information
+* File Format::         Format of `gmon.out' files
+* Internals::           `gprof''s internal operation
+* Debugging::           Using `gprof''s `-d' option
+
+
+File: gprof.info,  Node: Implementation,  Next: File Format,  Up: Details
+
+9.1 Implementation of Profiling
+===============================
+
+Profiling works by changing how every function in your program is
+compiled so that when it is called, it will stash away some information
+about where it was called from.  From this, the profiler can figure out
+what function called it, and can count how many times it was called.
+This change is made by the compiler when your program is compiled with
+the `-pg' option, which causes every function to call `mcount' (or
+`_mcount', or `__mcount', depending on the OS and compiler) as one of
+its first operations.
+
+   The `mcount' routine, included in the profiling library, is
+responsible for recording in an in-memory call graph table both its
+parent routine (the child) and its parent's parent.  This is typically
+done by examining the stack frame to find both the address of the
+child, and the return address in the original parent.  Since this is a
+very machine-dependent operation, `mcount' itself is typically a short
+assembly-language stub routine that extracts the required information,
+and then calls `__mcount_internal' (a normal C function) with two
+arguments--`frompc' and `selfpc'.  `__mcount_internal' is responsible
+for maintaining the in-memory call graph, which records `frompc',
+`selfpc', and the number of times each of these call arcs was traversed.
+
+   GCC Version 2 provides a magical function
+(`__builtin_return_address'), which allows a generic `mcount' function
+to extract the required information from the stack frame.  However, on
+some architectures, most notably the SPARC, using this builtin can be
+very computationally expensive, and an assembly language version of
+`mcount' is used for performance reasons.
+
+   Number-of-calls information for library routines is collected by
+using a special version of the C library.  The programs in it are the
+same as in the usual C library, but they were compiled with `-pg'.  If
+you link your program with `gcc ... -pg', it automatically uses the
+profiling version of the library.
+
+   Profiling also involves watching your program as it runs, and
+keeping a histogram of where the program counter happens to be every
+now and then.  Typically the program counter is looked at around 100
+times per second of run time, but the exact frequency may vary from
+system to system.
+
+   This is done is one of two ways.  Most UNIX-like operating systems
+provide a `profil()' system call, which registers a memory array with
+the kernel, along with a scale factor that determines how the program's
+address space maps into the array.  Typical scaling values cause every
+2 to 8 bytes of address space to map into a single array slot.  On
+every tick of the system clock (assuming the profiled program is
+running), the value of the program counter is examined and the
+corresponding slot in the memory array is incremented.  Since this is
+done in the kernel, which had to interrupt the process anyway to handle
+the clock interrupt, very little additional system overhead is required.
+
+   However, some operating systems, most notably Linux 2.0 (and
+earlier), do not provide a `profil()' system call.  On such a system,
+arrangements are made for the kernel to periodically deliver a signal
+to the process (typically via `setitimer()'), which then performs the
+same operation of examining the program counter and incrementing a slot
+in the memory array.  Since this method requires a signal to be
+delivered to user space every time a sample is taken, it uses
+considerably more overhead than kernel-based profiling.  Also, due to
+the added delay required to deliver the signal, this method is less
+accurate as well.
+
+   A special startup routine allocates memory for the histogram and
+either calls `profil()' or sets up a clock signal handler.  This
+routine (`monstartup') can be invoked in several ways.  On Linux
+systems, a special profiling startup file `gcrt0.o', which invokes
+`monstartup' before `main', is used instead of the default `crt0.o'.
+Use of this special startup file is one of the effects of using `gcc
+... -pg' to link.  On SPARC systems, no special startup files are used.
+Rather, the `mcount' routine, when it is invoked for the first time
+(typically when `main' is called), calls `monstartup'.
+
+   If the compiler's `-a' option was used, basic-block counting is also
+enabled.  Each object file is then compiled with a static array of
+counts, initially zero.  In the executable code, every time a new
+basic-block begins (i.e., when an `if' statement appears), an extra
+instruction is inserted to increment the corresponding count in the
+array.  At compile time, a paired array was constructed that recorded
+the starting address of each basic-block.  Taken together, the two
+arrays record the starting address of every basic-block, along with the
+number of times it was executed.
+
+   The profiling library also includes a function (`mcleanup') which is
+typically registered using `atexit()' to be called as the program
+exits, and is responsible for writing the file `gmon.out'.  Profiling
+is turned off, various headers are output, and the histogram is
+written, followed by the call-graph arcs and the basic-block counts.
+
+   The output from `gprof' gives no indication of parts of your program
+that are limited by I/O or swapping bandwidth.  This is because samples
+of the program counter are taken at fixed intervals of the program's
+run time.  Therefore, the time measurements in `gprof' output say
+nothing about time that your program was not running.  For example, a
+part of the program that creates so much data that it cannot all fit in
+physical memory at once may run very slowly due to thrashing, but
+`gprof' will say it uses little time.  On the other hand, sampling by
+run time has the advantage that the amount of load due to other users
+won't directly affect the output you get.
+
+
+File: gprof.info,  Node: File Format,  Next: Internals,  Prev: Implementation,  Up: Details
+
+9.2 Profiling Data File Format
+==============================
+
+The old BSD-derived file format used for profile data does not contain a
+magic cookie that allows to check whether a data file really is a
+`gprof' file.  Furthermore, it does not provide a version number, thus
+rendering changes to the file format almost impossible.  GNU `gprof'
+uses a new file format that provides these features.  For backward
+compatibility, GNU `gprof' continues to support the old BSD-derived
+format, but not all features are supported with it.  For example,
+basic-block execution counts cannot be accommodated by the old file
+format.
+
+   The new file format is defined in header file `gmon_out.h'.  It
+consists of a header containing the magic cookie and a version number,
+as well as some spare bytes available for future extensions.  All data
+in a profile data file is in the native format of the target for which
+the profile was collected.  GNU `gprof' adapts automatically to the
+byte-order in use.
+
+   In the new file format, the header is followed by a sequence of
+records.  Currently, there are three different record types: histogram
+records, call-graph arc records, and basic-block execution count
+records.  Each file can contain any number of each record type.  When
+reading a file, GNU `gprof' will ensure records of the same type are
+compatible with each other and compute the union of all records.  For
+example, for basic-block execution counts, the union is simply the sum
+of all execution counts for each basic-block.
+
+9.2.1 Histogram Records
+-----------------------
+
+Histogram records consist of a header that is followed by an array of
+bins.  The header contains the text-segment range that the histogram
+spans, the size of the histogram in bytes (unlike in the old BSD
+format, this does not include the size of the header), the rate of the
+profiling clock, and the physical dimension that the bin counts
+represent after being scaled by the profiling clock rate.  The physical
+dimension is specified in two parts: a long name of up to 15 characters
+and a single character abbreviation.  For example, a histogram
+representing real-time would specify the long name as "seconds" and the
+abbreviation as "s".  This feature is useful for architectures that
+support performance monitor hardware (which, fortunately, is becoming
+increasingly common).  For example, under DEC OSF/1, the "uprofile"
+command can be used to produce a histogram of, say, instruction cache
+misses.  In this case, the dimension in the histogram header could be
+set to "i-cache misses" and the abbreviation could be set to "1"
+(because it is simply a count, not a physical dimension).  Also, the
+profiling rate would have to be set to 1 in this case.
+
+   Histogram bins are 16-bit numbers and each bin represent an equal
+amount of text-space.  For example, if the text-segment is one thousand
+bytes long and if there are ten bins in the histogram, each bin
+represents one hundred bytes.
+
+9.2.2 Call-Graph Records
+------------------------
+
+Call-graph records have a format that is identical to the one used in
+the BSD-derived file format.  It consists of an arc in the call graph
+and a count indicating the number of times the arc was traversed during
+program execution.  Arcs are specified by a pair of addresses: the
+first must be within caller's function and the second must be within
+the callee's function.  When performing profiling at the function
+level, these addresses can point anywhere within the respective
+function.  However, when profiling at the line-level, it is better if
+the addresses are as close to the call-site/entry-point as possible.
+This will ensure that the line-level call-graph is able to identify
+exactly which line of source code performed calls to a function.
+
+9.2.3 Basic-Block Execution Count Records
+-----------------------------------------
+
+Basic-block execution count records consist of a header followed by a
+sequence of address/count pairs.  The header simply specifies the
+length of the sequence.  In an address/count pair, the address
+identifies a basic-block and the count specifies the number of times
+that basic-block was executed.  Any address within the basic-address can
+be used.
+
+
+File: gprof.info,  Node: Internals,  Next: Debugging,  Prev: File Format,  Up: Details
+
+9.3 `gprof''s Internal Operation
+================================
+
+Like most programs, `gprof' begins by processing its options.  During
+this stage, it may building its symspec list (`sym_ids.c:sym_id_add'),
+if options are specified which use symspecs.  `gprof' maintains a
+single linked list of symspecs, which will eventually get turned into
+12 symbol tables, organized into six include/exclude pairs--one pair
+each for the flat profile (INCL_FLAT/EXCL_FLAT), the call graph arcs
+(INCL_ARCS/EXCL_ARCS), printing in the call graph
+(INCL_GRAPH/EXCL_GRAPH), timing propagation in the call graph
+(INCL_TIME/EXCL_TIME), the annotated source listing
+(INCL_ANNO/EXCL_ANNO), and the execution count listing
+(INCL_EXEC/EXCL_EXEC).
+
+   After option processing, `gprof' finishes building the symspec list
+by adding all the symspecs in `default_excluded_list' to the exclude
+lists EXCL_TIME and EXCL_GRAPH, and if line-by-line profiling is
+specified, EXCL_FLAT as well.  These default excludes are not added to
+EXCL_ANNO, EXCL_ARCS, and EXCL_EXEC.
+
+   Next, the BFD library is called to open the object file, verify that
+it is an object file, and read its symbol table (`core.c:core_init'),
+using `bfd_canonicalize_symtab' after mallocing an appropriately sized
+array of symbols.  At this point, function mappings are read (if the
+`--file-ordering' option has been specified), and the core text space
+is read into memory (if the `-c' option was given).
+
+   `gprof''s own symbol table, an array of Sym structures, is now built.
+This is done in one of two ways, by one of two routines, depending on
+whether line-by-line profiling (`-l' option) has been enabled.  For
+normal profiling, the BFD canonical symbol table is scanned.  For
+line-by-line profiling, every text space address is examined, and a new
+symbol table entry gets created every time the line number changes.  In
+either case, two passes are made through the symbol table--one to count
+the size of the symbol table required, and the other to actually read
+the symbols.  In between the two passes, a single array of type `Sym'
+is created of the appropriate length.  Finally,
+`symtab.c:symtab_finalize' is called to sort the symbol table and
+remove duplicate entries (entries with the same memory address).
+
+   The symbol table must be a contiguous array for two reasons.  First,
+the `qsort' library function (which sorts an array) will be used to
+sort the symbol table.  Also, the symbol lookup routine
+(`symtab.c:sym_lookup'), which finds symbols based on memory address,
+uses a binary search algorithm which requires the symbol table to be a
+sorted array.  Function symbols are indicated with an `is_func' flag.
+Line number symbols have no special flags set.  Additionally, a symbol
+can have an `is_static' flag to indicate that it is a local symbol.
+
+   With the symbol table read, the symspecs can now be translated into
+Syms (`sym_ids.c:sym_id_parse').  Remember that a single symspec can
+match multiple symbols.  An array of symbol tables (`syms') is created,
+each entry of which is a symbol table of Syms to be included or
+excluded from a particular listing.  The master symbol table and the
+symspecs are examined by nested loops, and every symbol that matches a
+symspec is inserted into the appropriate syms table.  This is done
+twice, once to count the size of each required symbol table, and again
+to build the tables, which have been malloced between passes.  From now
+on, to determine whether a symbol is on an include or exclude symspec
+list, `gprof' simply uses its standard symbol lookup routine on the
+appropriate table in the `syms' array.
+
+   Now the profile data file(s) themselves are read
+(`gmon_io.c:gmon_out_read'), first by checking for a new-style
+`gmon.out' header, then assuming this is an old-style BSD `gmon.out' if
+the magic number test failed.
+
+   New-style histogram records are read by `hist.c:hist_read_rec'.  For
+the first histogram record, allocate a memory array to hold all the
+bins, and read them in.  When multiple profile data files (or files
+with multiple histogram records) are read, the memory ranges of each
+pair of histogram records must be either equal, or non-overlapping.
+For each pair of histogram records, the resolution (memory region size
+divided by the number of bins) must be the same.  The time unit must be
+the same for all histogram records. If the above containts are met, all
+histograms for the same memory range are merged.
+
+   As each call graph record is read (`call_graph.c:cg_read_rec'), the
+parent and child addresses are matched to symbol table entries, and a
+call graph arc is created by `cg_arcs.c:arc_add', unless the arc fails
+a symspec check against INCL_ARCS/EXCL_ARCS.  As each arc is added, a
+linked list is maintained of the parent's child arcs, and of the child's
+parent arcs.  Both the child's call count and the arc's call count are
+incremented by the record's call count.
+
+   Basic-block records are read (`basic_blocks.c:bb_read_rec'), but
+only if line-by-line profiling has been selected.  Each basic-block
+address is matched to a corresponding line symbol in the symbol table,
+and an entry made in the symbol's bb_addr and bb_calls arrays.  Again,
+if multiple basic-block records are present for the same address, the
+call counts are cumulative.
+
+   A gmon.sum file is dumped, if requested (`gmon_io.c:gmon_out_write').
+
+   If histograms were present in the data files, assign them to symbols
+(`hist.c:hist_assign_samples') by iterating over all the sample bins
+and assigning them to symbols.  Since the symbol table is sorted in
+order of ascending memory addresses, we can simple follow along in the
+symbol table as we make our pass over the sample bins.  This step
+includes a symspec check against INCL_FLAT/EXCL_FLAT.  Depending on the
+histogram scale factor, a sample bin may span multiple symbols, in
+which case a fraction of the sample count is allocated to each symbol,
+proportional to the degree of overlap.  This effect is rare for normal
+profiling, but overlaps are more common during line-by-line profiling,
+and can cause each of two adjacent lines to be credited with half a
+hit, for example.
+
+   If call graph data is present, `cg_arcs.c:cg_assemble' is called.
+First, if `-c' was specified, a machine-dependent routine (`find_call')
+scans through each symbol's machine code, looking for subroutine call
+instructions, and adding them to the call graph with a zero call count.
+A topological sort is performed by depth-first numbering all the
+symbols (`cg_dfn.c:cg_dfn'), so that children are always numbered less
+than their parents, then making a array of pointers into the symbol
+table and sorting it into numerical order, which is reverse topological
+order (children appear before parents).  Cycles are also detected at
+this point, all members of which are assigned the same topological
+number.  Two passes are now made through this sorted array of symbol
+pointers.  The first pass, from end to beginning (parents to children),
+computes the fraction of child time to propagate to each parent and a
+print flag.  The print flag reflects symspec handling of
+INCL_GRAPH/EXCL_GRAPH, with a parent's include or exclude (print or no
+print) property being propagated to its children, unless they
+themselves explicitly appear in INCL_GRAPH or EXCL_GRAPH.  A second
+pass, from beginning to end (children to parents) actually propagates
+the timings along the call graph, subject to a check against
+INCL_TIME/EXCL_TIME.  With the print flag, fractions, and timings now
+stored in the symbol structures, the topological sort array is now
+discarded, and a new array of pointers is assembled, this time sorted
+by propagated time.
+
+   Finally, print the various outputs the user requested, which is now
+fairly straightforward.  The call graph (`cg_print.c:cg_print') and
+flat profile (`hist.c:hist_print') are regurgitations of values already
+computed.  The annotated source listing
+(`basic_blocks.c:print_annotated_source') uses basic-block information,
+if present, to label each line of code with call counts, otherwise only
+the function call counts are presented.
+
+   The function ordering code is marginally well documented in the
+source code itself (`cg_print.c').  Basically, the functions with the
+most use and the most parents are placed first, followed by other
+functions with the most use, followed by lower use functions, followed
+by unused functions at the end.
+
+
+File: gprof.info,  Node: Debugging,  Prev: Internals,  Up: Details
+
+9.4 Debugging `gprof'
+=====================
+
+If `gprof' was compiled with debugging enabled, the `-d' option
+triggers debugging output (to stdout) which can be helpful in
+understanding its operation.  The debugging number specified is
+interpreted as a sum of the following options:
+
+2 - Topological sort
+     Monitor depth-first numbering of symbols during call graph analysis
+
+4 - Cycles
+     Shows symbols as they are identified as cycle heads
+
+16 - Tallying
+     As the call graph arcs are read, show each arc and how the total
+     calls to each function are tallied
+
+32 - Call graph arc sorting
+     Details sorting individual parents/children within each call graph
+     entry
+
+64 - Reading histogram and call graph records
+     Shows address ranges of histograms as they are read, and each call
+     graph arc
+
+128 - Symbol table
+     Reading, classifying, and sorting the symbol table from the object
+     file.  For line-by-line profiling (`-l' option), also shows line
+     numbers being assigned to memory addresses.
+
+256 - Static call graph
+     Trace operation of `-c' option
+
+512 - Symbol table and arc table lookups
+     Detail operation of lookup routines
+
+1024 - Call graph propagation
+     Shows how function times are propagated along the call graph
+
+2048 - Basic-blocks
+     Shows basic-block records as they are read from profile data (only
+     meaningful with `-l' option)
+
+4096 - Symspecs
+     Shows symspec-to-symbol pattern matching operation
+
+8192 - Annotate source
+     Tracks operation of `-A' option
+
+
+File: gprof.info,  Node: GNU Free Documentation License,  Prev: Details,  Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+
+Tag Table:
+Node: Top761
+Node: Introduction2084
+Node: Compiling4576
+Node: Executing8632
+Node: Invoking11420
+Node: Output Options12835
+Node: Analysis Options19924
+Node: Miscellaneous Options23622
+Node: Deprecated Options24877
+Node: Symspecs26956
+Node: Output28782
+Node: Flat Profile29822
+Node: Call Graph34775
+Node: Primary38007
+Node: Callers40595
+Node: Subroutines42712
+Node: Cycles44553
+Node: Line-by-line51330
+Node: Annotated Source55403
+Node: Inaccuracy58402
+Node: Sampling Error58660
+Node: Assumptions61230
+Node: How do I?62700
+Node: Incompatibilities64254
+Node: Details65748
+Node: Implementation66141
+Node: File Format72038
+Node: Internals76328
+Node: Debugging84823
+Node: GNU Free Documentation License86424
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/ld.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/ld.info
new file mode 100644
index 00000000..5874290e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/ld.info
@@ -0,0 +1,7608 @@
+This is ld.info, produced by makeinfo version 4.13 from ../../../binutils-2.20/ld/ld.texinfo.
+
+START-INFO-DIR-ENTRY
+* Ld: (ld).                       The GNU linker.
+END-INFO-DIR-ENTRY
+
+   This file documents the GNU linker LD (GNU Binutils) version 2.20.
+
+   Copyright (C) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software
+Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: ld.info,  Node: Top,  Next: Overview,  Up: (dir)
+
+LD
+**
+
+This file documents the GNU linker ld (GNU Binutils) version 2.20.
+
+   This document is distributed under the terms of the GNU Free
+Documentation License version 1.3.  A copy of the license is included
+in the section entitled "GNU Free Documentation License".
+
+* Menu:
+
+* Overview::                    Overview
+* Invocation::                  Invocation
+* Scripts::                     Linker Scripts
+
+* Machine Dependent::           Machine Dependent Features
+
+* BFD::                         BFD
+
+* Reporting Bugs::              Reporting Bugs
+* MRI::                         MRI Compatible Script Files
+* GNU Free Documentation License::  GNU Free Documentation License
+* LD Index::                       LD Index
+
+
+File: ld.info,  Node: Overview,  Next: Invocation,  Prev: Top,  Up: Top
+
+1 Overview
+**********
+
+`ld' combines a number of object and archive files, relocates their
+data and ties up symbol references. Usually the last step in compiling
+a program is to run `ld'.
+
+   `ld' accepts Linker Command Language files written in a superset of
+AT&T's Link Editor Command Language syntax, to provide explicit and
+total control over the linking process.
+
+   This version of `ld' uses the general purpose BFD libraries to
+operate on object files. This allows `ld' to read, combine, and write
+object files in many different formats--for example, COFF or `a.out'.
+Different formats may be linked together to produce any available kind
+of object file.  *Note BFD::, for more information.
+
+   Aside from its flexibility, the GNU linker is more helpful than other
+linkers in providing diagnostic information.  Many linkers abandon
+execution immediately upon encountering an error; whenever possible,
+`ld' continues executing, allowing you to identify other errors (or, in
+some cases, to get an output file in spite of the error).
+
+
+File: ld.info,  Node: Invocation,  Next: Scripts,  Prev: Overview,  Up: Top
+
+2 Invocation
+************
+
+The GNU linker `ld' is meant to cover a broad range of situations, and
+to be as compatible as possible with other linkers.  As a result, you
+have many choices to control its behavior.
+
+* Menu:
+
+* Options::                     Command Line Options
+* Environment::                 Environment Variables
+
+
+File: ld.info,  Node: Options,  Next: Environment,  Up: Invocation
+
+2.1 Command Line Options
+========================
+
+   The linker supports a plethora of command-line options, but in actual
+practice few of them are used in any particular context.  For instance,
+a frequent use of `ld' is to link standard Unix object files on a
+standard, supported Unix system.  On such a system, to link a file
+`hello.o':
+
+     ld -o OUTPUT /lib/crt0.o hello.o -lc
+
+   This tells `ld' to produce a file called OUTPUT as the result of
+linking the file `/lib/crt0.o' with `hello.o' and the library `libc.a',
+which will come from the standard search directories.  (See the
+discussion of the `-l' option below.)
+
+   Some of the command-line options to `ld' may be specified at any
+point in the command line.  However, options which refer to files, such
+as `-l' or `-T', cause the file to be read at the point at which the
+option appears in the command line, relative to the object files and
+other file options.  Repeating non-file options with a different
+argument will either have no further effect, or override prior
+occurrences (those further to the left on the command line) of that
+option.  Options which may be meaningfully specified more than once are
+noted in the descriptions below.
+
+   Non-option arguments are object files or archives which are to be
+linked together.  They may follow, precede, or be mixed in with
+command-line options, except that an object file argument may not be
+placed between an option and its argument.
+
+   Usually the linker is invoked with at least one object file, but you
+can specify other forms of binary input files using `-l', `-R', and the
+script command language.  If _no_ binary input files at all are
+specified, the linker does not produce any output, and issues the
+message `No input files'.
+
+   If the linker cannot recognize the format of an object file, it will
+assume that it is a linker script.  A script specified in this way
+augments the main linker script used for the link (either the default
+linker script or the one specified by using `-T').  This feature
+permits the linker to link against a file which appears to be an object
+or an archive, but actually merely defines some symbol values, or uses
+`INPUT' or `GROUP' to load other objects.  Specifying a script in this
+way merely augments the main linker script, with the extra commands
+placed after the main script; use the `-T' option to replace the
+default linker script entirely, but note the effect of the `INSERT'
+command.  *Note Scripts::.
+
+   For options whose names are a single letter, option arguments must
+either follow the option letter without intervening whitespace, or be
+given as separate arguments immediately following the option that
+requires them.
+
+   For options whose names are multiple letters, either one dash or two
+can precede the option name; for example, `-trace-symbol' and
+`--trace-symbol' are equivalent.  Note--there is one exception to this
+rule.  Multiple letter options that start with a lower case 'o' can
+only be preceded by two dashes.  This is to reduce confusion with the
+`-o' option.  So for example `-omagic' sets the output file name to
+`magic' whereas `--omagic' sets the NMAGIC flag on the output.
+
+   Arguments to multiple-letter options must either be separated from
+the option name by an equals sign, or be given as separate arguments
+immediately following the option that requires them.  For example,
+`--trace-symbol foo' and `--trace-symbol=foo' are equivalent.  Unique
+abbreviations of the names of multiple-letter options are accepted.
+
+   Note--if the linker is being invoked indirectly, via a compiler
+driver (e.g. `gcc') then all the linker command line options should be
+prefixed by `-Wl,' (or whatever is appropriate for the particular
+compiler driver) like this:
+
+       gcc -Wl,--start-group foo.o bar.o -Wl,--end-group
+
+   This is important, because otherwise the compiler driver program may
+silently drop the linker options, resulting in a bad link.  Confusion
+may also arise when passing options that require values through a
+driver, as the use of a space between option and argument acts as a
+separator, and causes the driver to pass only the option to the linker
+and the argument to the compiler.  In this case, it is simplest to use
+the joined forms of both single- and multiple-letter options, such as:
+
+       gcc foo.o bar.o -Wl,-eENTRY -Wl,-Map=a.map
+
+   Here is a table of the generic command line switches accepted by the
+GNU linker:
+
+`@FILE'
+     Read command-line options from FILE.  The options read are
+     inserted in place of the original @FILE option.  If FILE does not
+     exist, or cannot be read, then the option will be treated
+     literally, and not removed.
+
+     Options in FILE are separated by whitespace.  A whitespace
+     character may be included in an option by surrounding the entire
+     option in either single or double quotes.  Any character
+     (including a backslash) may be included by prefixing the character
+     to be included with a backslash.  The FILE may itself contain
+     additional @FILE options; any such options will be processed
+     recursively.
+
+`-a KEYWORD'
+     This option is supported for HP/UX compatibility.  The KEYWORD
+     argument must be one of the strings `archive', `shared', or
+     `default'.  `-aarchive' is functionally equivalent to `-Bstatic',
+     and the other two keywords are functionally equivalent to
+     `-Bdynamic'.  This option may be used any number of times.
+
+`-A ARCHITECTURE'
+`--architecture=ARCHITECTURE'
+     In the current release of `ld', this option is useful only for the
+     Intel 960 family of architectures.  In that `ld' configuration, the
+     ARCHITECTURE argument identifies the particular architecture in
+     the 960 family, enabling some safeguards and modifying the
+     archive-library search path.  *Note `ld' and the Intel 960 family:
+     i960, for details.
+
+     Future releases of `ld' may support similar functionality for
+     other architecture families.
+
+`-b INPUT-FORMAT'
+`--format=INPUT-FORMAT'
+     `ld' may be configured to support more than one kind of object
+     file.  If your `ld' is configured this way, you can use the `-b'
+     option to specify the binary format for input object files that
+     follow this option on the command line.  Even when `ld' is
+     configured to support alternative object formats, you don't
+     usually need to specify this, as `ld' should be configured to
+     expect as a default input format the most usual format on each
+     machine.  INPUT-FORMAT is a text string, the name of a particular
+     format supported by the BFD libraries.  (You can list the
+     available binary formats with `objdump -i'.)  *Note BFD::.
+
+     You may want to use this option if you are linking files with an
+     unusual binary format.  You can also use `-b' to switch formats
+     explicitly (when linking object files of different formats), by
+     including `-b INPUT-FORMAT' before each group of object files in a
+     particular format.
+
+     The default format is taken from the environment variable
+     `GNUTARGET'.  *Note Environment::.  You can also define the input
+     format from a script, using the command `TARGET'; see *note Format
+     Commands::.
+
+`-c MRI-COMMANDFILE'
+`--mri-script=MRI-COMMANDFILE'
+     For compatibility with linkers produced by MRI, `ld' accepts script
+     files written in an alternate, restricted command language,
+     described in *note MRI Compatible Script Files: MRI.  Introduce
+     MRI script files with the option `-c'; use the `-T' option to run
+     linker scripts written in the general-purpose `ld' scripting
+     language.  If MRI-CMDFILE does not exist, `ld' looks for it in the
+     directories specified by any `-L' options.
+
+`-d'
+`-dc'
+`-dp'
+     These three options are equivalent; multiple forms are supported
+     for compatibility with other linkers.  They assign space to common
+     symbols even if a relocatable output file is specified (with
+     `-r').  The script command `FORCE_COMMON_ALLOCATION' has the same
+     effect.  *Note Miscellaneous Commands::.
+
+`-e ENTRY'
+`--entry=ENTRY'
+     Use ENTRY as the explicit symbol for beginning execution of your
+     program, rather than the default entry point.  If there is no
+     symbol named ENTRY, the linker will try to parse ENTRY as a number,
+     and use that as the entry address (the number will be interpreted
+     in base 10; you may use a leading `0x' for base 16, or a leading
+     `0' for base 8).  *Note Entry Point::, for a discussion of defaults
+     and other ways of specifying the entry point.
+
+`--exclude-libs LIB,LIB,...'
+     Specifies a list of archive libraries from which symbols should
+     not be automatically exported.  The library names may be delimited
+     by commas or colons.  Specifying `--exclude-libs ALL' excludes
+     symbols in all archive libraries from automatic export.  This
+     option is available only for the i386 PE targeted port of the
+     linker and for ELF targeted ports.  For i386 PE, symbols
+     explicitly listed in a .def file are still exported, regardless of
+     this option.  For ELF targeted ports, symbols affected by this
+     option will be treated as hidden.
+
+`--exclude-modules-for-implib MODULE,MODULE,...'
+     Specifies a list of object files or archive members, from which
+     symbols should not be automatically exported, but which should be
+     copied wholesale into the import library being generated during
+     the link.  The module names may be delimited by commas or colons,
+     and must match exactly the filenames used by `ld' to open the
+     files; for archive members, this is simply the member name, but
+     for object files the name listed must include and match precisely
+     any path used to specify the input file on the linker's
+     command-line.  This option is available only for the i386 PE
+     targeted port of the linker.  Symbols explicitly listed in a .def
+     file are still exported, regardless of this option.
+
+`-E'
+`--export-dynamic'
+`--no-export-dynamic'
+     When creating a dynamically linked executable, using the `-E'
+     option or the `--export-dynamic' option causes the linker to add
+     all symbols to the dynamic symbol table.  The dynamic symbol table
+     is the set of symbols which are visible from dynamic objects at
+     run time.
+
+     If you do not use either of these options (or use the
+     `--no-export-dynamic' option to restore the default behavior), the
+     dynamic symbol table will normally contain only those symbols
+     which are referenced by some dynamic object mentioned in the link.
+
+     If you use `dlopen' to load a dynamic object which needs to refer
+     back to the symbols defined by the program, rather than some other
+     dynamic object, then you will probably need to use this option when
+     linking the program itself.
+
+     You can also use the dynamic list to control what symbols should
+     be added to the dynamic symbol table if the output format supports
+     it.  See the description of `--dynamic-list'.
+
+     Note that this option is specific to ELF targeted ports.  PE
+     targets support a similar function to export all symbols from a
+     DLL or EXE; see the description of `--export-all-symbols' below.
+
+`-EB'
+     Link big-endian objects.  This affects the default output format.
+
+`-EL'
+     Link little-endian objects.  This affects the default output
+     format.
+
+`-f NAME'
+`--auxiliary=NAME'
+     When creating an ELF shared object, set the internal DT_AUXILIARY
+     field to the specified name.  This tells the dynamic linker that
+     the symbol table of the shared object should be used as an
+     auxiliary filter on the symbol table of the shared object NAME.
+
+     If you later link a program against this filter object, then, when
+     you run the program, the dynamic linker will see the DT_AUXILIARY
+     field.  If the dynamic linker resolves any symbols from the filter
+     object, it will first check whether there is a definition in the
+     shared object NAME.  If there is one, it will be used instead of
+     the definition in the filter object.  The shared object NAME need
+     not exist.  Thus the shared object NAME may be used to provide an
+     alternative implementation of certain functions, perhaps for
+     debugging or for machine specific performance.
+
+     This option may be specified more than once.  The DT_AUXILIARY
+     entries will be created in the order in which they appear on the
+     command line.
+
+`-F NAME'
+`--filter=NAME'
+     When creating an ELF shared object, set the internal DT_FILTER
+     field to the specified name.  This tells the dynamic linker that
+     the symbol table of the shared object which is being created
+     should be used as a filter on the symbol table of the shared
+     object NAME.
+
+     If you later link a program against this filter object, then, when
+     you run the program, the dynamic linker will see the DT_FILTER
+     field.  The dynamic linker will resolve symbols according to the
+     symbol table of the filter object as usual, but it will actually
+     link to the definitions found in the shared object NAME.  Thus the
+     filter object can be used to select a subset of the symbols
+     provided by the object NAME.
+
+     Some older linkers used the `-F' option throughout a compilation
+     toolchain for specifying object-file format for both input and
+     output object files.  The GNU linker uses other mechanisms for
+     this purpose: the `-b', `--format', `--oformat' options, the
+     `TARGET' command in linker scripts, and the `GNUTARGET'
+     environment variable.  The GNU linker will ignore the `-F' option
+     when not creating an ELF shared object.
+
+`-fini=NAME'
+     When creating an ELF executable or shared object, call NAME when
+     the executable or shared object is unloaded, by setting DT_FINI to
+     the address of the function.  By default, the linker uses `_fini'
+     as the function to call.
+
+`-g'
+     Ignored.  Provided for compatibility with other tools.
+
+`-G VALUE'
+`--gpsize=VALUE'
+     Set the maximum size of objects to be optimized using the GP
+     register to SIZE.  This is only meaningful for object file formats
+     such as MIPS ECOFF which supports putting large and small objects
+     into different sections.  This is ignored for other object file
+     formats.
+
+`-h NAME'
+`-soname=NAME'
+     When creating an ELF shared object, set the internal DT_SONAME
+     field to the specified name.  When an executable is linked with a
+     shared object which has a DT_SONAME field, then when the
+     executable is run the dynamic linker will attempt to load the
+     shared object specified by the DT_SONAME field rather than the
+     using the file name given to the linker.
+
+`-i'
+     Perform an incremental link (same as option `-r').
+
+`-init=NAME'
+     When creating an ELF executable or shared object, call NAME when
+     the executable or shared object is loaded, by setting DT_INIT to
+     the address of the function.  By default, the linker uses `_init'
+     as the function to call.
+
+`-l NAMESPEC'
+`--library=NAMESPEC'
+     Add the archive or object file specified by NAMESPEC to the list
+     of files to link.  This option may be used any number of times.
+     If NAMESPEC is of the form `:FILENAME', `ld' will search the
+     library path for a file called FILENAME, otherwise it will search
+     the library path for a file called `libNAMESPEC.a'.
+
+     On systems which support shared libraries, `ld' may also search for
+     files other than `libNAMESPEC.a'.  Specifically, on ELF and SunOS
+     systems, `ld' will search a directory for a library called
+     `libNAMESPEC.so' before searching for one called `libNAMESPEC.a'.
+     (By convention, a `.so' extension indicates a shared library.)
+     Note that this behavior does not apply to `:FILENAME', which
+     always specifies a file called FILENAME.
+
+     The linker will search an archive only once, at the location where
+     it is specified on the command line.  If the archive defines a
+     symbol which was undefined in some object which appeared before
+     the archive on the command line, the linker will include the
+     appropriate file(s) from the archive.  However, an undefined
+     symbol in an object appearing later on the command line will not
+     cause the linker to search the archive again.
+
+     See the `-(' option for a way to force the linker to search
+     archives multiple times.
+
+     You may list the same archive multiple times on the command line.
+
+     This type of archive searching is standard for Unix linkers.
+     However, if you are using `ld' on AIX, note that it is different
+     from the behaviour of the AIX linker.
+
+`-L SEARCHDIR'
+`--library-path=SEARCHDIR'
+     Add path SEARCHDIR to the list of paths that `ld' will search for
+     archive libraries and `ld' control scripts.  You may use this
+     option any number of times.  The directories are searched in the
+     order in which they are specified on the command line.
+     Directories specified on the command line are searched before the
+     default directories.  All `-L' options apply to all `-l' options,
+     regardless of the order in which the options appear.  `-L' options
+     do not affect how `ld' searches for a linker script unless `-T'
+     option is specified.
+
+     If SEARCHDIR begins with `=', then the `=' will be replaced by the
+     "sysroot prefix", a path specified when the linker is configured.
+
+     The default set of paths searched (without being specified with
+     `-L') depends on which emulation mode `ld' is using, and in some
+     cases also on how it was configured.  *Note Environment::.
+
+     The paths can also be specified in a link script with the
+     `SEARCH_DIR' command.  Directories specified this way are searched
+     at the point in which the linker script appears in the command
+     line.
+
+`-m EMULATION'
+     Emulate the EMULATION linker.  You can list the available
+     emulations with the `--verbose' or `-V' options.
+
+     If the `-m' option is not used, the emulation is taken from the
+     `LDEMULATION' environment variable, if that is defined.
+
+     Otherwise, the default emulation depends upon how the linker was
+     configured.
+
+`-M'
+`--print-map'
+     Print a link map to the standard output.  A link map provides
+     information about the link, including the following:
+
+        * Where object files are mapped into memory.
+
+        * How common symbols are allocated.
+
+        * All archive members included in the link, with a mention of
+          the symbol which caused the archive member to be brought in.
+
+        * The values assigned to symbols.
+
+          Note - symbols whose values are computed by an expression
+          which involves a reference to a previous value of the same
+          symbol may not have correct result displayed in the link map.
+          This is because the linker discards intermediate results and
+          only retains the final value of an expression.  Under such
+          circumstances the linker will display the final value
+          enclosed by square brackets.  Thus for example a linker
+          script containing:
+
+                  foo = 1
+                  foo = foo * 4
+                  foo = foo + 8
+
+          will produce the following output in the link map if the `-M'
+          option is used:
+
+                  0x00000001                foo = 0x1
+                  [0x0000000c]                foo = (foo * 0x4)
+                  [0x0000000c]                foo = (foo + 0x8)
+
+          See *note Expressions:: for more information about
+          expressions in linker scripts.
+
+`-n'
+`--nmagic'
+     Turn off page alignment of sections, and mark the output as
+     `NMAGIC' if possible.
+
+`-N'
+`--omagic'
+     Set the text and data sections to be readable and writable.  Also,
+     do not page-align the data segment, and disable linking against
+     shared libraries.  If the output format supports Unix style magic
+     numbers, mark the output as `OMAGIC'. Note: Although a writable
+     text section is allowed for PE-COFF targets, it does not conform
+     to the format specification published by Microsoft.
+
+`--no-omagic'
+     This option negates most of the effects of the `-N' option.  It
+     sets the text section to be read-only, and forces the data segment
+     to be page-aligned.  Note - this option does not enable linking
+     against shared libraries.  Use `-Bdynamic' for this.
+
+`-o OUTPUT'
+`--output=OUTPUT'
+     Use OUTPUT as the name for the program produced by `ld'; if this
+     option is not specified, the name `a.out' is used by default.  The
+     script command `OUTPUT' can also specify the output file name.
+
+`-O LEVEL'
+     If LEVEL is a numeric values greater than zero `ld' optimizes the
+     output.  This might take significantly longer and therefore
+     probably should only be enabled for the final binary.  At the
+     moment this option only affects ELF shared library generation.
+     Future releases of the linker may make more use of this option.
+     Also currently there is no difference in the linker's behaviour
+     for different non-zero values of this option.  Again this may
+     change with future releases.
+
+`-q'
+`--emit-relocs'
+     Leave relocation sections and contents in fully linked executables.
+     Post link analysis and optimization tools may need this
+     information in order to perform correct modifications of
+     executables.  This results in larger executables.
+
+     This option is currently only supported on ELF platforms.
+
+`--force-dynamic'
+     Force the output file to have dynamic sections.  This option is
+     specific to VxWorks targets.
+
+`-r'
+`--relocatable'
+     Generate relocatable output--i.e., generate an output file that
+     can in turn serve as input to `ld'.  This is often called "partial
+     linking".  As a side effect, in environments that support standard
+     Unix magic numbers, this option also sets the output file's magic
+     number to `OMAGIC'.  If this option is not specified, an absolute
+     file is produced.  When linking C++ programs, this option _will
+     not_ resolve references to constructors; to do that, use `-Ur'.
+
+     When an input file does not have the same format as the output
+     file, partial linking is only supported if that input file does
+     not contain any relocations.  Different output formats can have
+     further restrictions; for example some `a.out'-based formats do
+     not support partial linking with input files in other formats at
+     all.
+
+     This option does the same thing as `-i'.
+
+`-R FILENAME'
+`--just-symbols=FILENAME'
+     Read symbol names and their addresses from FILENAME, but do not
+     relocate it or include it in the output.  This allows your output
+     file to refer symbolically to absolute locations of memory defined
+     in other programs.  You may use this option more than once.
+
+     For compatibility with other ELF linkers, if the `-R' option is
+     followed by a directory name, rather than a file name, it is
+     treated as the `-rpath' option.
+
+`-s'
+`--strip-all'
+     Omit all symbol information from the output file.
+
+`-S'
+`--strip-debug'
+     Omit debugger symbol information (but not all symbols) from the
+     output file.
+
+`-t'
+`--trace'
+     Print the names of the input files as `ld' processes them.
+
+`-T SCRIPTFILE'
+`--script=SCRIPTFILE'
+     Use SCRIPTFILE as the linker script.  This script replaces `ld''s
+     default linker script (rather than adding to it), so COMMANDFILE
+     must specify everything necessary to describe the output file.
+     *Note Scripts::.  If SCRIPTFILE does not exist in the current
+     directory, `ld' looks for it in the directories specified by any
+     preceding `-L' options.  Multiple `-T' options accumulate.
+
+`-dT SCRIPTFILE'
+`--default-script=SCRIPTFILE'
+     Use SCRIPTFILE as the default linker script.  *Note Scripts::.
+
+     This option is similar to the `--script' option except that
+     processing of the script is delayed until after the rest of the
+     command line has been processed.  This allows options placed after
+     the `--default-script' option on the command line to affect the
+     behaviour of the linker script, which can be important when the
+     linker command line cannot be directly controlled by the user.
+     (eg because the command line is being constructed by another tool,
+     such as `gcc').
+
+`-u SYMBOL'
+`--undefined=SYMBOL'
+     Force SYMBOL to be entered in the output file as an undefined
+     symbol.  Doing this may, for example, trigger linking of additional
+     modules from standard libraries.  `-u' may be repeated with
+     different option arguments to enter additional undefined symbols.
+     This option is equivalent to the `EXTERN' linker script command.
+
+`-Ur'
+     For anything other than C++ programs, this option is equivalent to
+     `-r': it generates relocatable output--i.e., an output file that
+     can in turn serve as input to `ld'.  When linking C++ programs,
+     `-Ur' _does_ resolve references to constructors, unlike `-r'.  It
+     does not work to use `-Ur' on files that were themselves linked
+     with `-Ur'; once the constructor table has been built, it cannot
+     be added to.  Use `-Ur' only for the last partial link, and `-r'
+     for the others.
+
+`--unique[=SECTION]'
+     Creates a separate output section for every input section matching
+     SECTION, or if the optional wildcard SECTION argument is missing,
+     for every orphan input section.  An orphan section is one not
+     specifically mentioned in a linker script.  You may use this option
+     multiple times on the command line;  It prevents the normal
+     merging of input sections with the same name, overriding output
+     section assignments in a linker script.
+
+`-v'
+`--version'
+`-V'
+     Display the version number for `ld'.  The `-V' option also lists
+     the supported emulations.
+
+`-x'
+`--discard-all'
+     Delete all local symbols.
+
+`-X'
+`--discard-locals'
+     Delete all temporary local symbols.  (These symbols start with
+     system-specific local label prefixes, typically `.L' for ELF
+     systems or `L' for traditional a.out systems.)
+
+`-y SYMBOL'
+`--trace-symbol=SYMBOL'
+     Print the name of each linked file in which SYMBOL appears.  This
+     option may be given any number of times.  On many systems it is
+     necessary to prepend an underscore.
+
+     This option is useful when you have an undefined symbol in your
+     link but don't know where the reference is coming from.
+
+`-Y PATH'
+     Add PATH to the default library search path.  This option exists
+     for Solaris compatibility.
+
+`-z KEYWORD'
+     The recognized keywords are:
+    `combreloc'
+          Combines multiple reloc sections and sorts them to make
+          dynamic symbol lookup caching possible.
+
+    `defs'
+          Disallows undefined symbols in object files.  Undefined
+          symbols in shared libraries are still allowed.
+
+    `execstack'
+          Marks the object as requiring executable stack.
+
+    `initfirst'
+          This option is only meaningful when building a shared object.
+          It marks the object so that its runtime initialization will
+          occur before the runtime initialization of any other objects
+          brought into the process at the same time.  Similarly the
+          runtime finalization of the object will occur after the
+          runtime finalization of any other objects.
+
+    `interpose'
+          Marks the object that its symbol table interposes before all
+          symbols but the primary executable.
+
+    `lazy'
+          When generating an executable or shared library, mark it to
+          tell the dynamic linker to defer function call resolution to
+          the point when the function is called (lazy binding), rather
+          than at load time.  Lazy binding is the default.
+
+    `loadfltr'
+          Marks  the object that its filters be processed immediately at
+          runtime.
+
+    `muldefs'
+          Allows multiple definitions.
+
+    `nocombreloc'
+          Disables multiple reloc sections combining.
+
+    `nocopyreloc'
+          Disables production of copy relocs.
+
+    `nodefaultlib'
+          Marks the object that the search for dependencies of this
+          object will ignore any default library search paths.
+
+    `nodelete'
+          Marks the object shouldn't be unloaded at runtime.
+
+    `nodlopen'
+          Marks the object not available to `dlopen'.
+
+    `nodump'
+          Marks the object can not be dumped by `dldump'.
+
+    `noexecstack'
+          Marks the object as not requiring executable stack.
+
+    `norelro'
+          Don't create an ELF `PT_GNU_RELRO' segment header in the
+          object.
+
+    `now'
+          When generating an executable or shared library, mark it to
+          tell the dynamic linker to resolve all symbols when the
+          program is started, or when the shared library is linked to
+          using dlopen, instead of deferring function call resolution
+          to the point when the function is first called.
+
+    `origin'
+          Marks the object may contain $ORIGIN.
+
+    `relro'
+          Create an ELF `PT_GNU_RELRO' segment header in the object.
+
+    `max-page-size=VALUE'
+          Set the emulation maximum page size to VALUE.
+
+    `common-page-size=VALUE'
+          Set the emulation common page size to VALUE.
+
+
+     Other keywords are ignored for Solaris compatibility.
+
+`-( ARCHIVES -)'
+`--start-group ARCHIVES --end-group'
+     The ARCHIVES should be a list of archive files.  They may be
+     either explicit file names, or `-l' options.
+
+     The specified archives are searched repeatedly until no new
+     undefined references are created.  Normally, an archive is
+     searched only once in the order that it is specified on the
+     command line.  If a symbol in that archive is needed to resolve an
+     undefined symbol referred to by an object in an archive that
+     appears later on the command line, the linker would not be able to
+     resolve that reference.  By grouping the archives, they all be
+     searched repeatedly until all possible references are resolved.
+
+     Using this option has a significant performance cost.  It is best
+     to use it only when there are unavoidable circular references
+     between two or more archives.
+
+`--accept-unknown-input-arch'
+`--no-accept-unknown-input-arch'
+     Tells the linker to accept input files whose architecture cannot be
+     recognised.  The assumption is that the user knows what they are
+     doing and deliberately wants to link in these unknown input files.
+     This was the default behaviour of the linker, before release 2.14.
+     The default behaviour from release 2.14 onwards is to reject such
+     input files, and so the `--accept-unknown-input-arch' option has
+     been added to restore the old behaviour.
+
+`--as-needed'
+`--no-as-needed'
+     This option affects ELF DT_NEEDED tags for dynamic libraries
+     mentioned on the command line after the `--as-needed' option.
+     Normally, the linker will add a DT_NEEDED tag for each dynamic
+     library mentioned on the command line, regardless of whether the
+     library is actually needed.  `--as-needed' causes a DT_NEEDED tag
+     to only be emitted for a library that satisfies a symbol reference
+     from regular objects which is undefined at the point that the
+     library was linked, or, if the library is not found in the
+     DT_NEEDED lists of other libraries linked up to that point, a
+     reference from another dynamic library.  `--no-as-needed' restores
+     the default behaviour.
+
+`--add-needed'
+`--no-add-needed'
+     This option affects the treatment of dynamic libraries from ELF
+     DT_NEEDED tags in dynamic libraries mentioned on the command line
+     after the `--no-add-needed' option.  Normally, the linker will add
+     a DT_NEEDED tag for each dynamic library from DT_NEEDED tags.
+     `--no-add-needed' causes DT_NEEDED tags will never be emitted for
+     those libraries from DT_NEEDED tags. `--add-needed' restores the
+     default behaviour.
+
+`-assert KEYWORD'
+     This option is ignored for SunOS compatibility.
+
+`-Bdynamic'
+`-dy'
+`-call_shared'
+     Link against dynamic libraries.  This is only meaningful on
+     platforms for which shared libraries are supported.  This option
+     is normally the default on such platforms.  The different variants
+     of this option are for compatibility with various systems.  You
+     may use this option multiple times on the command line: it affects
+     library searching for `-l' options which follow it.
+
+`-Bgroup'
+     Set the `DF_1_GROUP' flag in the `DT_FLAGS_1' entry in the dynamic
+     section.  This causes the runtime linker to handle lookups in this
+     object and its dependencies to be performed only inside the group.
+     `--unresolved-symbols=report-all' is implied.  This option is only
+     meaningful on ELF platforms which support shared libraries.
+
+`-Bstatic'
+`-dn'
+`-non_shared'
+`-static'
+     Do not link against shared libraries.  This is only meaningful on
+     platforms for which shared libraries are supported.  The different
+     variants of this option are for compatibility with various
+     systems.  You may use this option multiple times on the command
+     line: it affects library searching for `-l' options which follow
+     it.  This option also implies `--unresolved-symbols=report-all'.
+     This option can be used with `-shared'.  Doing so means that a
+     shared library is being created but that all of the library's
+     external references must be resolved by pulling in entries from
+     static libraries.
+
+`-Bsymbolic'
+     When creating a shared library, bind references to global symbols
+     to the definition within the shared library, if any.  Normally, it
+     is possible for a program linked against a shared library to
+     override the definition within the shared library.  This option is
+     only meaningful on ELF platforms which support shared libraries.
+
+`-Bsymbolic-functions'
+     When creating a shared library, bind references to global function
+     symbols to the definition within the shared library, if any.  This
+     option is only meaningful on ELF platforms which support shared
+     libraries.
+
+`--dynamic-list=DYNAMIC-LIST-FILE'
+     Specify the name of a dynamic list file to the linker.  This is
+     typically used when creating shared libraries to specify a list of
+     global symbols whose references shouldn't be bound to the
+     definition within the shared library, or creating dynamically
+     linked executables to specify a list of symbols which should be
+     added to the symbol table in the executable.  This option is only
+     meaningful on ELF platforms which support shared libraries.
+
+     The format of the dynamic list is the same as the version node
+     without scope and node name.  See *note VERSION:: for more
+     information.
+
+`--dynamic-list-data'
+     Include all global data symbols to the dynamic list.
+
+`--dynamic-list-cpp-new'
+     Provide the builtin dynamic list for C++ operator new and delete.
+     It is mainly useful for building shared libstdc++.
+
+`--dynamic-list-cpp-typeinfo'
+     Provide the builtin dynamic list for C++ runtime type
+     identification.
+
+`--check-sections'
+`--no-check-sections'
+     Asks the linker _not_ to check section addresses after they have
+     been assigned to see if there are any overlaps.  Normally the
+     linker will perform this check, and if it finds any overlaps it
+     will produce suitable error messages.  The linker does know about,
+     and does make allowances for sections in overlays.  The default
+     behaviour can be restored by using the command line switch
+     `--check-sections'.  Section overlap is not usually checked for
+     relocatable links.  You can force checking in that case by using
+     the `--check-sections' option.
+
+`--cref'
+     Output a cross reference table.  If a linker map file is being
+     generated, the cross reference table is printed to the map file.
+     Otherwise, it is printed on the standard output.
+
+     The format of the table is intentionally simple, so that it may be
+     easily processed by a script if necessary.  The symbols are
+     printed out, sorted by name.  For each symbol, a list of file
+     names is given.  If the symbol is defined, the first file listed
+     is the location of the definition.  The remaining files contain
+     references to the symbol.
+
+`--no-define-common'
+     This option inhibits the assignment of addresses to common symbols.
+     The script command `INHIBIT_COMMON_ALLOCATION' has the same effect.
+     *Note Miscellaneous Commands::.
+
+     The `--no-define-common' option allows decoupling the decision to
+     assign addresses to Common symbols from the choice of the output
+     file type; otherwise a non-Relocatable output type forces
+     assigning addresses to Common symbols.  Using `--no-define-common'
+     allows Common symbols that are referenced from a shared library to
+     be assigned addresses only in the main program.  This eliminates
+     the unused duplicate space in the shared library, and also
+     prevents any possible confusion over resolving to the wrong
+     duplicate when there are many dynamic modules with specialized
+     search paths for runtime symbol resolution.
+
+`--defsym=SYMBOL=EXPRESSION'
+     Create a global symbol in the output file, containing the absolute
+     address given by EXPRESSION.  You may use this option as many
+     times as necessary to define multiple symbols in the command line.
+     A limited form of arithmetic is supported for the EXPRESSION in
+     this context: you may give a hexadecimal constant or the name of
+     an existing symbol, or use `+' and `-' to add or subtract
+     hexadecimal constants or symbols.  If you need more elaborate
+     expressions, consider using the linker command language from a
+     script (*note Assignment: Symbol Definitions: Assignments.).
+     _Note:_ there should be no white space between SYMBOL, the equals
+     sign ("<=>"), and EXPRESSION.
+
+`--demangle[=STYLE]'
+`--no-demangle'
+     These options control whether to demangle symbol names in error
+     messages and other output.  When the linker is told to demangle,
+     it tries to present symbol names in a readable fashion: it strips
+     leading underscores if they are used by the object file format,
+     and converts C++ mangled symbol names into user readable names.
+     Different compilers have different mangling styles.  The optional
+     demangling style argument can be used to choose an appropriate
+     demangling style for your compiler.  The linker will demangle by
+     default unless the environment variable `COLLECT_NO_DEMANGLE' is
+     set.  These options may be used to override the default.
+
+`-IFILE'
+`--dynamic-linker=FILE'
+     Set the name of the dynamic linker.  This is only meaningful when
+     generating dynamically linked ELF executables.  The default dynamic
+     linker is normally correct; don't use this unless you know what
+     you are doing.
+
+`--fatal-warnings'
+`--no-fatal-warnings'
+     Treat all warnings as errors.  The default behaviour can be
+     restored with the option `--no-fatal-warnings'.
+
+`--force-exe-suffix'
+     Make sure that an output file has a .exe suffix.
+
+     If a successfully built fully linked output file does not have a
+     `.exe' or `.dll' suffix, this option forces the linker to copy the
+     output file to one of the same name with a `.exe' suffix. This
+     option is useful when using unmodified Unix makefiles on a
+     Microsoft Windows host, since some versions of Windows won't run
+     an image unless it ends in a `.exe' suffix.
+
+`--gc-sections'
+`--no-gc-sections'
+     Enable garbage collection of unused input sections.  It is ignored
+     on targets that do not support this option.  The default behaviour
+     (of not performing this garbage collection) can be restored by
+     specifying `--no-gc-sections' on the command line.
+
+     `--gc-sections' decides which input sections are used by examining
+     symbols and relocations.  The section containing the entry symbol
+     and all sections containing symbols undefined on the command-line
+     will be kept, as will sections containing symbols referenced by
+     dynamic objects.  Note that when building shared libraries, the
+     linker must assume that any visible symbol is referenced.  Once
+     this initial set of sections has been determined, the linker
+     recursively marks as used any section referenced by their
+     relocations.  See `--entry' and `--undefined'.
+
+     This option can be set when doing a partial link (enabled with
+     option `-r').  In this case the root of symbols kept must be
+     explicitely specified either by an `--entry' or `--undefined'
+     option or by a `ENTRY' command in the linker script.
+
+`--print-gc-sections'
+`--no-print-gc-sections'
+     List all sections removed by garbage collection.  The listing is
+     printed on stderr.  This option is only effective if garbage
+     collection has been enabled via the `--gc-sections') option.  The
+     default behaviour (of not listing the sections that are removed)
+     can be restored by specifying `--no-print-gc-sections' on the
+     command line.
+
+`--help'
+     Print a summary of the command-line options on the standard output
+     and exit.
+
+`--target-help'
+     Print a summary of all target specific options on the standard
+     output and exit.
+
+`-Map=MAPFILE'
+     Print a link map to the file MAPFILE.  See the description of the
+     `-M' option, above.
+
+`--no-keep-memory'
+     `ld' normally optimizes for speed over memory usage by caching the
+     symbol tables of input files in memory.  This option tells `ld' to
+     instead optimize for memory usage, by rereading the symbol tables
+     as necessary.  This may be required if `ld' runs out of memory
+     space while linking a large executable.
+
+`--no-undefined'
+`-z defs'
+     Report unresolved symbol references from regular object files.
+     This is done even if the linker is creating a non-symbolic shared
+     library.  The switch `--[no-]allow-shlib-undefined' controls the
+     behaviour for reporting unresolved references found in shared
+     libraries being linked in.
+
+`--allow-multiple-definition'
+`-z muldefs'
+     Normally when a symbol is defined multiple times, the linker will
+     report a fatal error. These options allow multiple definitions and
+     the first definition will be used.
+
+`--allow-shlib-undefined'
+`--no-allow-shlib-undefined'
+     Allows or disallows undefined symbols in shared libraries.  This
+     switch is similar to `--no-undefined' except that it determines
+     the behaviour when the undefined symbols are in a shared library
+     rather than a regular object file.  It does not affect how
+     undefined symbols in regular object files are handled.
+
+     The default behaviour is to report errors for any undefined symbols
+     referenced in shared libraries if the linker is being used to
+     create an executable, but to allow them if the linker is being
+     used to create a shared library.
+
+     The reasons for allowing undefined symbol references in shared
+     libraries specified at link time are that:
+
+        * A shared library specified at link time may not be the same
+          as the one that is available at load time, so the symbol
+          might actually be resolvable at load time.
+
+        * There are some operating systems, eg BeOS and HPPA, where
+          undefined symbols in shared libraries are normal.
+
+          The BeOS kernel for example patches shared libraries at load
+          time to select whichever function is most appropriate for the
+          current architecture.  This is used, for example, to
+          dynamically select an appropriate memset function.
+
+`--no-undefined-version'
+     Normally when a symbol has an undefined version, the linker will
+     ignore it. This option disallows symbols with undefined version
+     and a fatal error will be issued instead.
+
+`--default-symver'
+     Create and use a default symbol version (the soname) for
+     unversioned exported symbols.
+
+`--default-imported-symver'
+     Create and use a default symbol version (the soname) for
+     unversioned imported symbols.
+
+`--no-warn-mismatch'
+     Normally `ld' will give an error if you try to link together input
+     files that are mismatched for some reason, perhaps because they
+     have been compiled for different processors or for different
+     endiannesses.  This option tells `ld' that it should silently
+     permit such possible errors.  This option should only be used with
+     care, in cases when you have taken some special action that
+     ensures that the linker errors are inappropriate.
+
+`--no-warn-search-mismatch'
+     Normally `ld' will give a warning if it finds an incompatible
+     library during a library search.  This option silences the warning.
+
+`--no-whole-archive'
+     Turn off the effect of the `--whole-archive' option for subsequent
+     archive files.
+
+`--noinhibit-exec'
+     Retain the executable output file whenever it is still usable.
+     Normally, the linker will not produce an output file if it
+     encounters errors during the link process; it exits without
+     writing an output file when it issues any error whatsoever.
+
+`-nostdlib'
+     Only search library directories explicitly specified on the
+     command line.  Library directories specified in linker scripts
+     (including linker scripts specified on the command line) are
+     ignored.
+
+`--oformat=OUTPUT-FORMAT'
+     `ld' may be configured to support more than one kind of object
+     file.  If your `ld' is configured this way, you can use the
+     `--oformat' option to specify the binary format for the output
+     object file.  Even when `ld' is configured to support alternative
+     object formats, you don't usually need to specify this, as `ld'
+     should be configured to produce as a default output format the most
+     usual format on each machine.  OUTPUT-FORMAT is a text string, the
+     name of a particular format supported by the BFD libraries.  (You
+     can list the available binary formats with `objdump -i'.)  The
+     script command `OUTPUT_FORMAT' can also specify the output format,
+     but this option overrides it.  *Note BFD::.
+
+`-pie'
+`--pic-executable'
+     Create a position independent executable.  This is currently only
+     supported on ELF platforms.  Position independent executables are
+     similar to shared libraries in that they are relocated by the
+     dynamic linker to the virtual address the OS chooses for them
+     (which can vary between invocations).  Like normal dynamically
+     linked executables they can be executed and symbols defined in the
+     executable cannot be overridden by shared libraries.
+
+`-qmagic'
+     This option is ignored for Linux compatibility.
+
+`-Qy'
+     This option is ignored for SVR4 compatibility.
+
+`--relax'
+     An option with machine dependent effects.  This option is only
+     supported on a few targets.  *Note `ld' and the H8/300: H8/300.
+     *Note `ld' and the Intel 960 family: i960.  *Note `ld' and Xtensa
+     Processors: Xtensa.  *Note `ld' and the 68HC11 and 68HC12:
+     M68HC11/68HC12.  *Note `ld' and PowerPC 32-bit ELF Support:
+     PowerPC ELF32.
+
+     On some platforms, the `--relax' option performs global
+     optimizations that become possible when the linker resolves
+     addressing in the program, such as relaxing address modes and
+     synthesizing new instructions in the output object file.
+
+     On some platforms these link time global optimizations may make
+     symbolic debugging of the resulting executable impossible.  This
+     is known to be the case for the Matsushita MN10200 and MN10300
+     family of processors.
+
+     On platforms where this is not supported, `--relax' is accepted,
+     but ignored.
+
+`--retain-symbols-file=FILENAME'
+     Retain _only_ the symbols listed in the file FILENAME, discarding
+     all others.  FILENAME is simply a flat file, with one symbol name
+     per line.  This option is especially useful in environments (such
+     as VxWorks) where a large global symbol table is accumulated
+     gradually, to conserve run-time memory.
+
+     `--retain-symbols-file' does _not_ discard undefined symbols, or
+     symbols needed for relocations.
+
+     You may only specify `--retain-symbols-file' once in the command
+     line.  It overrides `-s' and `-S'.
+
+`-rpath=DIR'
+     Add a directory to the runtime library search path.  This is used
+     when linking an ELF executable with shared objects.  All `-rpath'
+     arguments are concatenated and passed to the runtime linker, which
+     uses them to locate shared objects at runtime.  The `-rpath'
+     option is also used when locating shared objects which are needed
+     by shared objects explicitly included in the link; see the
+     description of the `-rpath-link' option.  If `-rpath' is not used
+     when linking an ELF executable, the contents of the environment
+     variable `LD_RUN_PATH' will be used if it is defined.
+
+     The `-rpath' option may also be used on SunOS.  By default, on
+     SunOS, the linker will form a runtime search patch out of all the
+     `-L' options it is given.  If a `-rpath' option is used, the
+     runtime search path will be formed exclusively using the `-rpath'
+     options, ignoring the `-L' options.  This can be useful when using
+     gcc, which adds many `-L' options which may be on NFS mounted file
+     systems.
+
+     For compatibility with other ELF linkers, if the `-R' option is
+     followed by a directory name, rather than a file name, it is
+     treated as the `-rpath' option.
+
+`-rpath-link=DIR'
+     When using ELF or SunOS, one shared library may require another.
+     This happens when an `ld -shared' link includes a shared library
+     as one of the input files.
+
+     When the linker encounters such a dependency when doing a
+     non-shared, non-relocatable link, it will automatically try to
+     locate the required shared library and include it in the link, if
+     it is not included explicitly.  In such a case, the `-rpath-link'
+     option specifies the first set of directories to search.  The
+     `-rpath-link' option may specify a sequence of directory names
+     either by specifying a list of names separated by colons, or by
+     appearing multiple times.
+
+     This option should be used with caution as it overrides the search
+     path that may have been hard compiled into a shared library. In
+     such a case it is possible to use unintentionally a different
+     search path than the runtime linker would do.
+
+     The linker uses the following search paths to locate required
+     shared libraries:
+       1. Any directories specified by `-rpath-link' options.
+
+       2. Any directories specified by `-rpath' options.  The difference
+          between `-rpath' and `-rpath-link' is that directories
+          specified by `-rpath' options are included in the executable
+          and used at runtime, whereas the `-rpath-link' option is only
+          effective at link time. Searching `-rpath' in this way is
+          only supported by native linkers and cross linkers which have
+          been configured with the `--with-sysroot' option.
+
+       3. On an ELF system, for native linkers, if the `-rpath' and
+          `-rpath-link' options were not used, search the contents of
+          the environment variable `LD_RUN_PATH'.
+
+       4. On SunOS, if the `-rpath' option was not used, search any
+          directories specified using `-L' options.
+
+       5. For a native linker, the search the contents of the
+          environment variable `LD_LIBRARY_PATH'.
+
+       6. For a native ELF linker, the directories in `DT_RUNPATH' or
+          `DT_RPATH' of a shared library are searched for shared
+          libraries needed by it. The `DT_RPATH' entries are ignored if
+          `DT_RUNPATH' entries exist.
+
+       7. The default directories, normally `/lib' and `/usr/lib'.
+
+       8. For a native linker on an ELF system, if the file
+          `/etc/ld.so.conf' exists, the list of directories found in
+          that file.
+
+     If the required shared library is not found, the linker will issue
+     a warning and continue with the link.
+
+`-shared'
+`-Bshareable'
+     Create a shared library.  This is currently only supported on ELF,
+     XCOFF and SunOS platforms.  On SunOS, the linker will
+     automatically create a shared library if the `-e' option is not
+     used and there are undefined symbols in the link.
+
+`--sort-common'
+`--sort-common=ascending'
+`--sort-common=descending'
+     This option tells `ld' to sort the common symbols by alignment in
+     ascending or descending order when it places them in the
+     appropriate output sections.  The symbol alignments considered are
+     sixteen-byte or larger, eight-byte, four-byte, two-byte, and
+     one-byte. This is to prevent gaps between symbols due to alignment
+     constraints.  If no sorting order is specified, then descending
+     order is assumed.
+
+`--sort-section=name'
+     This option will apply `SORT_BY_NAME' to all wildcard section
+     patterns in the linker script.
+
+`--sort-section=alignment'
+     This option will apply `SORT_BY_ALIGNMENT' to all wildcard section
+     patterns in the linker script.
+
+`--split-by-file[=SIZE]'
+     Similar to `--split-by-reloc' but creates a new output section for
+     each input file when SIZE is reached.  SIZE defaults to a size of
+     1 if not given.
+
+`--split-by-reloc[=COUNT]'
+     Tries to creates extra sections in the output file so that no
+     single output section in the file contains more than COUNT
+     relocations.  This is useful when generating huge relocatable
+     files for downloading into certain real time kernels with the COFF
+     object file format; since COFF cannot represent more than 65535
+     relocations in a single section.  Note that this will fail to work
+     with object file formats which do not support arbitrary sections.
+     The linker will not split up individual input sections for
+     redistribution, so if a single input section contains more than
+     COUNT relocations one output section will contain that many
+     relocations.  COUNT defaults to a value of 32768.
+
+`--stats'
+     Compute and display statistics about the operation of the linker,
+     such as execution time and memory usage.
+
+`--sysroot=DIRECTORY'
+     Use DIRECTORY as the location of the sysroot, overriding the
+     configure-time default.  This option is only supported by linkers
+     that were configured using `--with-sysroot'.
+
+`--traditional-format'
+     For some targets, the output of `ld' is different in some ways from
+     the output of some existing linker.  This switch requests `ld' to
+     use the traditional format instead.
+
+     For example, on SunOS, `ld' combines duplicate entries in the
+     symbol string table.  This can reduce the size of an output file
+     with full debugging information by over 30 percent.
+     Unfortunately, the SunOS `dbx' program can not read the resulting
+     program (`gdb' has no trouble).  The `--traditional-format' switch
+     tells `ld' to not combine duplicate entries.
+
+`--section-start=SECTIONNAME=ORG'
+     Locate a section in the output file at the absolute address given
+     by ORG.  You may use this option as many times as necessary to
+     locate multiple sections in the command line.  ORG must be a
+     single hexadecimal integer; for compatibility with other linkers,
+     you may omit the leading `0x' usually associated with hexadecimal
+     values.  _Note:_ there should be no white space between
+     SECTIONNAME, the equals sign ("<=>"), and ORG.
+
+`-Tbss=ORG'
+`-Tdata=ORG'
+`-Ttext=ORG'
+     Same as `--section-start', with `.bss', `.data' or `.text' as the
+     SECTIONNAME.
+
+`-Ttext-segment=ORG'
+     When creating an ELF executable or shared object, it will set the
+     address of the first byte of the text segment.
+
+`--unresolved-symbols=METHOD'
+     Determine how to handle unresolved symbols.  There are four
+     possible values for `method':
+
+    `ignore-all'
+          Do not report any unresolved symbols.
+
+    `report-all'
+          Report all unresolved symbols.  This is the default.
+
+    `ignore-in-object-files'
+          Report unresolved symbols that are contained in shared
+          libraries, but ignore them if they come from regular object
+          files.
+
+    `ignore-in-shared-libs'
+          Report unresolved symbols that come from regular object
+          files, but ignore them if they come from shared libraries.
+          This can be useful when creating a dynamic binary and it is
+          known that all the shared libraries that it should be
+          referencing are included on the linker's command line.
+
+     The behaviour for shared libraries on their own can also be
+     controlled by the `--[no-]allow-shlib-undefined' option.
+
+     Normally the linker will generate an error message for each
+     reported unresolved symbol but the option
+     `--warn-unresolved-symbols' can change this to a warning.
+
+`--dll-verbose'
+`--verbose'
+     Display the version number for `ld' and list the linker emulations
+     supported.  Display which input files can and cannot be opened.
+     Display the linker script being used by the linker.
+
+`--version-script=VERSION-SCRIPTFILE'
+     Specify the name of a version script to the linker.  This is
+     typically used when creating shared libraries to specify
+     additional information about the version hierarchy for the library
+     being created.  This option is only fully supported on ELF
+     platforms which support shared libraries; see *note VERSION::.  It
+     is partially supported on PE platforms, which can use version
+     scripts to filter symbol visibility in auto-export mode: any
+     symbols marked `local' in the version script will not be exported.
+     *Note WIN32::.
+
+`--warn-common'
+     Warn when a common symbol is combined with another common symbol
+     or with a symbol definition.  Unix linkers allow this somewhat
+     sloppy practise, but linkers on some other operating systems do
+     not.  This option allows you to find potential problems from
+     combining global symbols.  Unfortunately, some C libraries use
+     this practise, so you may get some warnings about symbols in the
+     libraries as well as in your programs.
+
+     There are three kinds of global symbols, illustrated here by C
+     examples:
+
+    `int i = 1;'
+          A definition, which goes in the initialized data section of
+          the output file.
+
+    `extern int i;'
+          An undefined reference, which does not allocate space.  There
+          must be either a definition or a common symbol for the
+          variable somewhere.
+
+    `int i;'
+          A common symbol.  If there are only (one or more) common
+          symbols for a variable, it goes in the uninitialized data
+          area of the output file.  The linker merges multiple common
+          symbols for the same variable into a single symbol.  If they
+          are of different sizes, it picks the largest size.  The
+          linker turns a common symbol into a declaration, if there is
+          a definition of the same variable.
+
+     The `--warn-common' option can produce five kinds of warnings.
+     Each warning consists of a pair of lines: the first describes the
+     symbol just encountered, and the second describes the previous
+     symbol encountered with the same name.  One or both of the two
+     symbols will be a common symbol.
+
+       1. Turning a common symbol into a reference, because there is
+          already a definition for the symbol.
+               FILE(SECTION): warning: common of `SYMBOL'
+                  overridden by definition
+               FILE(SECTION): warning: defined here
+
+       2. Turning a common symbol into a reference, because a later
+          definition for the symbol is encountered.  This is the same
+          as the previous case, except that the symbols are encountered
+          in a different order.
+               FILE(SECTION): warning: definition of `SYMBOL'
+                  overriding common
+               FILE(SECTION): warning: common is here
+
+       3. Merging a common symbol with a previous same-sized common
+          symbol.
+               FILE(SECTION): warning: multiple common
+                  of `SYMBOL'
+               FILE(SECTION): warning: previous common is here
+
+       4. Merging a common symbol with a previous larger common symbol.
+               FILE(SECTION): warning: common of `SYMBOL'
+                  overridden by larger common
+               FILE(SECTION): warning: larger common is here
+
+       5. Merging a common symbol with a previous smaller common
+          symbol.  This is the same as the previous case, except that
+          the symbols are encountered in a different order.
+               FILE(SECTION): warning: common of `SYMBOL'
+                  overriding smaller common
+               FILE(SECTION): warning: smaller common is here
+
+`--warn-constructors'
+     Warn if any global constructors are used.  This is only useful for
+     a few object file formats.  For formats like COFF or ELF, the
+     linker can not detect the use of global constructors.
+
+`--warn-multiple-gp'
+     Warn if multiple global pointer values are required in the output
+     file.  This is only meaningful for certain processors, such as the
+     Alpha.  Specifically, some processors put large-valued constants
+     in a special section.  A special register (the global pointer)
+     points into the middle of this section, so that constants can be
+     loaded efficiently via a base-register relative addressing mode.
+     Since the offset in base-register relative mode is fixed and
+     relatively small (e.g., 16 bits), this limits the maximum size of
+     the constant pool.  Thus, in large programs, it is often necessary
+     to use multiple global pointer values in order to be able to
+     address all possible constants.  This option causes a warning to
+     be issued whenever this case occurs.
+
+`--warn-once'
+     Only warn once for each undefined symbol, rather than once per
+     module which refers to it.
+
+`--warn-section-align'
+     Warn if the address of an output section is changed because of
+     alignment.  Typically, the alignment will be set by an input
+     section.  The address will only be changed if it not explicitly
+     specified; that is, if the `SECTIONS' command does not specify a
+     start address for the section (*note SECTIONS::).
+
+`--warn-shared-textrel'
+     Warn if the linker adds a DT_TEXTREL to a shared object.
+
+`--warn-alternate-em'
+     Warn if an object has alternate ELF machine code.
+
+`--warn-unresolved-symbols'
+     If the linker is going to report an unresolved symbol (see the
+     option `--unresolved-symbols') it will normally generate an error.
+     This option makes it generate a warning instead.
+
+`--error-unresolved-symbols'
+     This restores the linker's default behaviour of generating errors
+     when it is reporting unresolved symbols.
+
+`--whole-archive'
+     For each archive mentioned on the command line after the
+     `--whole-archive' option, include every object file in the archive
+     in the link, rather than searching the archive for the required
+     object files.  This is normally used to turn an archive file into
+     a shared library, forcing every object to be included in the
+     resulting shared library.  This option may be used more than once.
+
+     Two notes when using this option from gcc: First, gcc doesn't know
+     about this option, so you have to use `-Wl,-whole-archive'.
+     Second, don't forget to use `-Wl,-no-whole-archive' after your
+     list of archives, because gcc will add its own list of archives to
+     your link and you may not want this flag to affect those as well.
+
+`--wrap=SYMBOL'
+     Use a wrapper function for SYMBOL.  Any undefined reference to
+     SYMBOL will be resolved to `__wrap_SYMBOL'.  Any undefined
+     reference to `__real_SYMBOL' will be resolved to SYMBOL.
+
+     This can be used to provide a wrapper for a system function.  The
+     wrapper function should be called `__wrap_SYMBOL'.  If it wishes
+     to call the system function, it should call `__real_SYMBOL'.
+
+     Here is a trivial example:
+
+          void *
+          __wrap_malloc (size_t c)
+          {
+            printf ("malloc called with %zu\n", c);
+            return __real_malloc (c);
+          }
+
+     If you link other code with this file using `--wrap malloc', then
+     all calls to `malloc' will call the function `__wrap_malloc'
+     instead.  The call to `__real_malloc' in `__wrap_malloc' will call
+     the real `malloc' function.
+
+     You may wish to provide a `__real_malloc' function as well, so that
+     links without the `--wrap' option will succeed.  If you do this,
+     you should not put the definition of `__real_malloc' in the same
+     file as `__wrap_malloc'; if you do, the assembler may resolve the
+     call before the linker has a chance to wrap it to `malloc'.
+
+`--eh-frame-hdr'
+     Request creation of `.eh_frame_hdr' section and ELF
+     `PT_GNU_EH_FRAME' segment header.
+
+`--enable-new-dtags'
+`--disable-new-dtags'
+     This linker can create the new dynamic tags in ELF. But the older
+     ELF systems may not understand them. If you specify
+     `--enable-new-dtags', the dynamic tags will be created as needed.
+     If you specify `--disable-new-dtags', no new dynamic tags will be
+     created. By default, the new dynamic tags are not created. Note
+     that those options are only available for ELF systems.
+
+`--hash-size=NUMBER'
+     Set the default size of the linker's hash tables to a prime number
+     close to NUMBER.  Increasing this value can reduce the length of
+     time it takes the linker to perform its tasks, at the expense of
+     increasing the linker's memory requirements.  Similarly reducing
+     this value can reduce the memory requirements at the expense of
+     speed.
+
+`--hash-style=STYLE'
+     Set the type of linker's hash table(s).  STYLE can be either
+     `sysv' for classic ELF `.hash' section, `gnu' for new style GNU
+     `.gnu.hash' section or `both' for both the classic ELF `.hash' and
+     new style GNU `.gnu.hash' hash tables.  The default is `sysv'.
+
+`--reduce-memory-overheads'
+     This option reduces memory requirements at ld runtime, at the
+     expense of linking speed.  This was introduced to select the old
+     O(n^2) algorithm for link map file generation, rather than the new
+     O(n) algorithm which uses about 40% more memory for symbol storage.
+
+     Another effect of the switch is to set the default hash table size
+     to 1021, which again saves memory at the cost of lengthening the
+     linker's run time.  This is not done however if the `--hash-size'
+     switch has been used.
+
+     The `--reduce-memory-overheads' switch may be also be used to
+     enable other tradeoffs in future versions of the linker.
+
+`--build-id'
+`--build-id=STYLE'
+     Request creation of `.note.gnu.build-id' ELF note section.  The
+     contents of the note are unique bits identifying this linked file.
+     STYLE can be `uuid' to use 128 random bits, `sha1' to use a
+     160-bit SHA1 hash on the normative parts of the output contents,
+     `md5' to use a 128-bit MD5 hash on the normative parts of the
+     output contents, or `0xHEXSTRING' to use a chosen bit string
+     specified as an even number of hexadecimal digits (`-' and `:'
+     characters between digit pairs are ignored).  If STYLE is omitted,
+     `sha1' is used.
+
+     The `md5' and `sha1' styles produces an identifier that is always
+     the same in an identical output file, but will be unique among all
+     nonidentical output files.  It is not intended to be compared as a
+     checksum for the file's contents.  A linked file may be changed
+     later by other tools, but the build ID bit string identifying the
+     original linked file does not change.
+
+     Passing `none' for STYLE disables the setting from any
+     `--build-id' options earlier on the command line.
+
+2.1.1 Options Specific to i386 PE Targets
+-----------------------------------------
+
+The i386 PE linker supports the `-shared' option, which causes the
+output to be a dynamically linked library (DLL) instead of a normal
+executable.  You should name the output `*.dll' when you use this
+option.  In addition, the linker fully supports the standard `*.def'
+files, which may be specified on the linker command line like an object
+file (in fact, it should precede archives it exports symbols from, to
+ensure that they get linked in, just like a normal object file).
+
+   In addition to the options common to all targets, the i386 PE linker
+support additional command line options that are specific to the i386
+PE target.  Options that take values may be separated from their values
+by either a space or an equals sign.
+
+`--add-stdcall-alias'
+     If given, symbols with a stdcall suffix (@NN) will be exported
+     as-is and also with the suffix stripped.  [This option is specific
+     to the i386 PE targeted port of the linker]
+
+`--base-file FILE'
+     Use FILE as the name of a file in which to save the base addresses
+     of all the relocations needed for generating DLLs with `dlltool'.
+     [This is an i386 PE specific option]
+
+`--dll'
+     Create a DLL instead of a regular executable.  You may also use
+     `-shared' or specify a `LIBRARY' in a given `.def' file.  [This
+     option is specific to the i386 PE targeted port of the linker]
+
+`--enable-long-section-names'
+`--disable-long-section-names'
+     The PE variants of the Coff object format add an extension that
+     permits the use of section names longer than eight characters, the
+     normal limit for Coff.  By default, these names are only allowed
+     in object files, as fully-linked executable images do not carry
+     the Coff string table required to support the longer names.  As a
+     GNU extension, it is possible to allow their use in executable
+     images as well, or to (probably pointlessly!)  disallow it in
+     object files, by using these two options.  Executable images
+     generated with these long section names are slightly non-standard,
+     carrying as they do a string table, and may generate confusing
+     output when examined with non-GNU PE-aware tools, such as file
+     viewers and dumpers.  However, GDB relies on the use of PE long
+     section names to find Dwarf-2 debug information sections in an
+     executable image at runtime, and so if neither option is specified
+     on the command-line, `ld' will enable long section names,
+     overriding the default and technically correct behaviour, when it
+     finds the presence of debug information while linking an executable
+     image and not stripping symbols.  [This option is valid for all PE
+     targeted ports of the linker]
+
+`--enable-stdcall-fixup'
+`--disable-stdcall-fixup'
+     If the link finds a symbol that it cannot resolve, it will attempt
+     to do "fuzzy linking" by looking for another defined symbol that
+     differs only in the format of the symbol name (cdecl vs stdcall)
+     and will resolve that symbol by linking to the match.  For
+     example, the undefined symbol `_foo' might be linked to the
+     function `_foo@12', or the undefined symbol `_bar@16' might be
+     linked to the function `_bar'.  When the linker does this, it
+     prints a warning, since it normally should have failed to link,
+     but sometimes import libraries generated from third-party dlls may
+     need this feature to be usable.  If you specify
+     `--enable-stdcall-fixup', this feature is fully enabled and
+     warnings are not printed.  If you specify
+     `--disable-stdcall-fixup', this feature is disabled and such
+     mismatches are considered to be errors.  [This option is specific
+     to the i386 PE targeted port of the linker]
+
+`--export-all-symbols'
+     If given, all global symbols in the objects used to build a DLL
+     will be exported by the DLL.  Note that this is the default if
+     there otherwise wouldn't be any exported symbols.  When symbols are
+     explicitly exported via DEF files or implicitly exported via
+     function attributes, the default is to not export anything else
+     unless this option is given.  Note that the symbols `DllMain@12',
+     `DllEntryPoint@0', `DllMainCRTStartup@12', and `impure_ptr' will
+     not be automatically exported.  Also, symbols imported from other
+     DLLs will not be re-exported, nor will symbols specifying the
+     DLL's internal layout such as those beginning with `_head_' or
+     ending with `_iname'.  In addition, no symbols from `libgcc',
+     `libstd++', `libmingw32', or `crtX.o' will be exported.  Symbols
+     whose names begin with `__rtti_' or `__builtin_' will not be
+     exported, to help with C++ DLLs.  Finally, there is an extensive
+     list of cygwin-private symbols that are not exported (obviously,
+     this applies on when building DLLs for cygwin targets).  These
+     cygwin-excludes are: `_cygwin_dll_entry@12',
+     `_cygwin_crt0_common@8', `_cygwin_noncygwin_dll_entry@12',
+     `_fmode', `_impure_ptr', `cygwin_attach_dll', `cygwin_premain0',
+     `cygwin_premain1', `cygwin_premain2', `cygwin_premain3', and
+     `environ'.  [This option is specific to the i386 PE targeted port
+     of the linker]
+
+`--exclude-symbols SYMBOL,SYMBOL,...'
+     Specifies a list of symbols which should not be automatically
+     exported.  The symbol names may be delimited by commas or colons.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--file-alignment'
+     Specify the file alignment.  Sections in the file will always
+     begin at file offsets which are multiples of this number.  This
+     defaults to 512.  [This option is specific to the i386 PE targeted
+     port of the linker]
+
+`--heap RESERVE'
+`--heap RESERVE,COMMIT'
+     Specify the number of bytes of memory to reserve (and optionally
+     commit) to be used as heap for this program.  The default is 1Mb
+     reserved, 4K committed.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--image-base VALUE'
+     Use VALUE as the base address of your program or dll.  This is the
+     lowest memory location that will be used when your program or dll
+     is loaded.  To reduce the need to relocate and improve performance
+     of your dlls, each should have a unique base address and not
+     overlap any other dlls.  The default is 0x400000 for executables,
+     and 0x10000000 for dlls.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--kill-at'
+     If given, the stdcall suffixes (@NN) will be stripped from symbols
+     before they are exported.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--large-address-aware'
+     If given, the appropriate bit in the "Characteristics" field of
+     the COFF header is set to indicate that this executable supports
+     virtual addresses greater than 2 gigabytes.  This should be used
+     in conjunction with the /3GB or /USERVA=VALUE megabytes switch in
+     the "[operating systems]" section of the BOOT.INI.  Otherwise,
+     this bit has no effect.  [This option is specific to PE targeted
+     ports of the linker]
+
+`--major-image-version VALUE'
+     Sets the major number of the "image version".  Defaults to 1.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--major-os-version VALUE'
+     Sets the major number of the "os version".  Defaults to 4.  [This
+     option is specific to the i386 PE targeted port of the linker]
+
+`--major-subsystem-version VALUE'
+     Sets the major number of the "subsystem version".  Defaults to 4.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--minor-image-version VALUE'
+     Sets the minor number of the "image version".  Defaults to 0.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--minor-os-version VALUE'
+     Sets the minor number of the "os version".  Defaults to 0.  [This
+     option is specific to the i386 PE targeted port of the linker]
+
+`--minor-subsystem-version VALUE'
+     Sets the minor number of the "subsystem version".  Defaults to 0.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--output-def FILE'
+     The linker will create the file FILE which will contain a DEF file
+     corresponding to the DLL the linker is generating.  This DEF file
+     (which should be called `*.def') may be used to create an import
+     library with `dlltool' or may be used as a reference to
+     automatically or implicitly exported symbols.  [This option is
+     specific to the i386 PE targeted port of the linker]
+
+`--out-implib FILE'
+     The linker will create the file FILE which will contain an import
+     lib corresponding to the DLL the linker is generating. This import
+     lib (which should be called `*.dll.a' or `*.a' may be used to link
+     clients against the generated DLL; this behaviour makes it
+     possible to skip a separate `dlltool' import library creation step.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--enable-auto-image-base'
+     Automatically choose the image base for DLLs, unless one is
+     specified using the `--image-base' argument.  By using a hash
+     generated from the dllname to create unique image bases for each
+     DLL, in-memory collisions and relocations which can delay program
+     execution are avoided.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--disable-auto-image-base'
+     Do not automatically generate a unique image base.  If there is no
+     user-specified image base (`--image-base') then use the platform
+     default.  [This option is specific to the i386 PE targeted port of
+     the linker]
+
+`--dll-search-prefix STRING'
+     When linking dynamically to a dll without an import library,
+     search for `<string><basename>.dll' in preference to
+     `lib<basename>.dll'. This behaviour allows easy distinction
+     between DLLs built for the various "subplatforms": native, cygwin,
+     uwin, pw, etc.  For instance, cygwin DLLs typically use
+     `--dll-search-prefix=cyg'.  [This option is specific to the i386
+     PE targeted port of the linker]
+
+`--enable-auto-import'
+     Do sophisticated linking of `_symbol' to `__imp__symbol' for DATA
+     imports from DLLs, and create the necessary thunking symbols when
+     building the import libraries with those DATA exports. Note: Use
+     of the 'auto-import' extension will cause the text section of the
+     image file to be made writable. This does not conform to the
+     PE-COFF format specification published by Microsoft.
+
+     Note - use of the 'auto-import' extension will also cause read only
+     data which would normally be placed into the .rdata section to be
+     placed into the .data section instead.  This is in order to work
+     around a problem with consts that is described here:
+     http://www.cygwin.com/ml/cygwin/2004-09/msg01101.html
+
+     Using 'auto-import' generally will 'just work' - but sometimes you
+     may see this message:
+
+     "variable '<var>' can't be auto-imported. Please read the
+     documentation for ld's `--enable-auto-import' for details."
+
+     This message occurs when some (sub)expression accesses an address
+     ultimately given by the sum of two constants (Win32 import tables
+     only allow one).  Instances where this may occur include accesses
+     to member fields of struct variables imported from a DLL, as well
+     as using a constant index into an array variable imported from a
+     DLL.  Any multiword variable (arrays, structs, long long, etc) may
+     trigger this error condition.  However, regardless of the exact
+     data type of the offending exported variable, ld will always
+     detect it, issue the warning, and exit.
+
+     There are several ways to address this difficulty, regardless of
+     the data type of the exported variable:
+
+     One way is to use -enable-runtime-pseudo-reloc switch. This leaves
+     the task of adjusting references in your client code for runtime
+     environment, so this method works only when runtime environment
+     supports this feature.
+
+     A second solution is to force one of the 'constants' to be a
+     variable - that is, unknown and un-optimizable at compile time.
+     For arrays, there are two possibilities: a) make the indexee (the
+     array's address) a variable, or b) make the 'constant' index a
+     variable.  Thus:
+
+          extern type extern_array[];
+          extern_array[1] -->
+             { volatile type *t=extern_array; t[1] }
+
+     or
+
+          extern type extern_array[];
+          extern_array[1] -->
+             { volatile int t=1; extern_array[t] }
+
+     For structs (and most other multiword data types) the only option
+     is to make the struct itself (or the long long, or the ...)
+     variable:
+
+          extern struct s extern_struct;
+          extern_struct.field -->
+             { volatile struct s *t=&extern_struct; t->field }
+
+     or
+
+          extern long long extern_ll;
+          extern_ll -->
+            { volatile long long * local_ll=&extern_ll; *local_ll }
+
+     A third method of dealing with this difficulty is to abandon
+     'auto-import' for the offending symbol and mark it with
+     `__declspec(dllimport)'.  However, in practise that requires using
+     compile-time #defines to indicate whether you are building a DLL,
+     building client code that will link to the DLL, or merely
+     building/linking to a static library.   In making the choice
+     between the various methods of resolving the 'direct address with
+     constant offset' problem, you should consider typical real-world
+     usage:
+
+     Original:
+          --foo.h
+          extern int arr[];
+          --foo.c
+          #include "foo.h"
+          void main(int argc, char **argv){
+            printf("%d\n",arr[1]);
+          }
+
+     Solution 1:
+          --foo.h
+          extern int arr[];
+          --foo.c
+          #include "foo.h"
+          void main(int argc, char **argv){
+            /* This workaround is for win32 and cygwin; do not "optimize" */
+            volatile int *parr = arr;
+            printf("%d\n",parr[1]);
+          }
+
+     Solution 2:
+          --foo.h
+          /* Note: auto-export is assumed (no __declspec(dllexport)) */
+          #if (defined(_WIN32) || defined(__CYGWIN__)) && \
+            !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
+          #define FOO_IMPORT __declspec(dllimport)
+          #else
+          #define FOO_IMPORT
+          #endif
+          extern FOO_IMPORT int arr[];
+          --foo.c
+          #include "foo.h"
+          void main(int argc, char **argv){
+            printf("%d\n",arr[1]);
+          }
+
+     A fourth way to avoid this problem is to re-code your library to
+     use a functional interface rather than a data interface for the
+     offending variables (e.g. set_foo() and get_foo() accessor
+     functions).  [This option is specific to the i386 PE targeted port
+     of the linker]
+
+`--disable-auto-import'
+     Do not attempt to do sophisticated linking of `_symbol' to
+     `__imp__symbol' for DATA imports from DLLs.  [This option is
+     specific to the i386 PE targeted port of the linker]
+
+`--enable-runtime-pseudo-reloc'
+     If your code contains expressions described in -enable-auto-import
+     section, that is, DATA imports from DLL with non-zero offset, this
+     switch will create a vector of 'runtime pseudo relocations' which
+     can be used by runtime environment to adjust references to such
+     data in your client code.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--disable-runtime-pseudo-reloc'
+     Do not create pseudo relocations for non-zero offset DATA imports
+     from DLLs.  This is the default.  [This option is specific to the
+     i386 PE targeted port of the linker]
+
+`--enable-extra-pe-debug'
+     Show additional debug info related to auto-import symbol thunking.
+     [This option is specific to the i386 PE targeted port of the
+     linker]
+
+`--section-alignment'
+     Sets the section alignment.  Sections in memory will always begin
+     at addresses which are a multiple of this number.  Defaults to
+     0x1000.  [This option is specific to the i386 PE targeted port of
+     the linker]
+
+`--stack RESERVE'
+`--stack RESERVE,COMMIT'
+     Specify the number of bytes of memory to reserve (and optionally
+     commit) to be used as stack for this program.  The default is 2Mb
+     reserved, 4K committed.  [This option is specific to the i386 PE
+     targeted port of the linker]
+
+`--subsystem WHICH'
+`--subsystem WHICH:MAJOR'
+`--subsystem WHICH:MAJOR.MINOR'
+     Specifies the subsystem under which your program will execute.  The
+     legal values for WHICH are `native', `windows', `console',
+     `posix', and `xbox'.  You may optionally set the subsystem version
+     also.  Numeric values are also accepted for WHICH.  [This option
+     is specific to the i386 PE targeted port of the linker]
+
+     The following options set flags in the `DllCharacteristics' field
+     of the PE file header: [These options are specific to PE targeted
+     ports of the linker]
+
+`--dynamicbase'
+     The image base address may be relocated using address space layout
+     randomization (ASLR).  This feature was introduced with MS Windows
+     Vista for i386 PE targets.
+
+`--forceinteg'
+     Code integrity checks are enforced.
+
+`--nxcompat'
+     The image is compatible with the Data Execution Prevention.  This
+     feature was introduced with MS Windows XP SP2 for i386 PE targets.
+
+`--no-isolation'
+     Although the image understands isolation, do not isolate the image.
+
+`--no-seh'
+     The image does not use SEH. No SE handler may be called from this
+     image.
+
+`--no-bind'
+     Do not bind this image.
+
+`--wdmdriver'
+     The driver uses the MS Windows Driver Model.
+
+`--tsaware'
+     The image is Terminal Server aware.
+
+
+2.1.2 Options specific to Motorola 68HC11 and 68HC12 targets
+------------------------------------------------------------
+
+The 68HC11 and 68HC12 linkers support specific options to control the
+memory bank switching mapping and trampoline code generation.
+
+`--no-trampoline'
+     This option disables the generation of trampoline. By default a
+     trampoline is generated for each far function which is called
+     using a `jsr' instruction (this happens when a pointer to a far
+     function is taken).
+
+`--bank-window NAME'
+     This option indicates to the linker the name of the memory region
+     in the `MEMORY' specification that describes the memory bank
+     window.  The definition of such region is then used by the linker
+     to compute paging and addresses within the memory window.
+
+
+2.1.3 Options specific to Motorola 68K target
+---------------------------------------------
+
+The following options are supported to control handling of GOT
+generation when linking for 68K targets.
+
+`--got=TYPE'
+     This option tells the linker which GOT generation scheme to use.
+     TYPE should be one of `single', `negative', `multigot' or
+     `target'.  For more information refer to the Info entry for `ld'.
+
+
+
+File: ld.info,  Node: Environment,  Prev: Options,  Up: Invocation
+
+2.2 Environment Variables
+=========================
+
+You can change the behaviour of `ld' with the environment variables
+`GNUTARGET', `LDEMULATION' and `COLLECT_NO_DEMANGLE'.
+
+   `GNUTARGET' determines the input-file object format if you don't use
+`-b' (or its synonym `--format').  Its value should be one of the BFD
+names for an input format (*note BFD::).  If there is no `GNUTARGET' in
+the environment, `ld' uses the natural format of the target. If
+`GNUTARGET' is set to `default' then BFD attempts to discover the input
+format by examining binary input files; this method often succeeds, but
+there are potential ambiguities, since there is no method of ensuring
+that the magic number used to specify object-file formats is unique.
+However, the configuration procedure for BFD on each system places the
+conventional format for that system first in the search-list, so
+ambiguities are resolved in favor of convention.
+
+   `LDEMULATION' determines the default emulation if you don't use the
+`-m' option.  The emulation can affect various aspects of linker
+behaviour, particularly the default linker script.  You can list the
+available emulations with the `--verbose' or `-V' options.  If the `-m'
+option is not used, and the `LDEMULATION' environment variable is not
+defined, the default emulation depends upon how the linker was
+configured.
+
+   Normally, the linker will default to demangling symbols.  However, if
+`COLLECT_NO_DEMANGLE' is set in the environment, then it will default
+to not demangling symbols.  This environment variable is used in a
+similar fashion by the `gcc' linker wrapper program.  The default may
+be overridden by the `--demangle' and `--no-demangle' options.
+
+
+File: ld.info,  Node: Scripts,  Next: Machine Dependent,  Prev: Invocation,  Up: Top
+
+3 Linker Scripts
+****************
+
+Every link is controlled by a "linker script".  This script is written
+in the linker command language.
+
+   The main purpose of the linker script is to describe how the
+sections in the input files should be mapped into the output file, and
+to control the memory layout of the output file.  Most linker scripts
+do nothing more than this.  However, when necessary, the linker script
+can also direct the linker to perform many other operations, using the
+commands described below.
+
+   The linker always uses a linker script.  If you do not supply one
+yourself, the linker will use a default script that is compiled into the
+linker executable.  You can use the `--verbose' command line option to
+display the default linker script.  Certain command line options, such
+as `-r' or `-N', will affect the default linker script.
+
+   You may supply your own linker script by using the `-T' command line
+option.  When you do this, your linker script will replace the default
+linker script.
+
+   You may also use linker scripts implicitly by naming them as input
+files to the linker, as though they were files to be linked.  *Note
+Implicit Linker Scripts::.
+
+* Menu:
+
+* Basic Script Concepts::	Basic Linker Script Concepts
+* Script Format::		Linker Script Format
+* Simple Example::		Simple Linker Script Example
+* Simple Commands::		Simple Linker Script Commands
+* Assignments::			Assigning Values to Symbols
+* SECTIONS::			SECTIONS Command
+* MEMORY::			MEMORY Command
+* PHDRS::			PHDRS Command
+* VERSION::			VERSION Command
+* Expressions::			Expressions in Linker Scripts
+* Implicit Linker Scripts::	Implicit Linker Scripts
+
+
+File: ld.info,  Node: Basic Script Concepts,  Next: Script Format,  Up: Scripts
+
+3.1 Basic Linker Script Concepts
+================================
+
+We need to define some basic concepts and vocabulary in order to
+describe the linker script language.
+
+   The linker combines input files into a single output file.  The
+output file and each input file are in a special data format known as an
+"object file format".  Each file is called an "object file".  The
+output file is often called an "executable", but for our purposes we
+will also call it an object file.  Each object file has, among other
+things, a list of "sections".  We sometimes refer to a section in an
+input file as an "input section"; similarly, a section in the output
+file is an "output section".
+
+   Each section in an object file has a name and a size.  Most sections
+also have an associated block of data, known as the "section contents".
+A section may be marked as "loadable", which mean that the contents
+should be loaded into memory when the output file is run.  A section
+with no contents may be "allocatable", which means that an area in
+memory should be set aside, but nothing in particular should be loaded
+there (in some cases this memory must be zeroed out).  A section which
+is neither loadable nor allocatable typically contains some sort of
+debugging information.
+
+   Every loadable or allocatable output section has two addresses.  The
+first is the "VMA", or virtual memory address.  This is the address the
+section will have when the output file is run.  The second is the
+"LMA", or load memory address.  This is the address at which the
+section will be loaded.  In most cases the two addresses will be the
+same.  An example of when they might be different is when a data section
+is loaded into ROM, and then copied into RAM when the program starts up
+(this technique is often used to initialize global variables in a ROM
+based system).  In this case the ROM address would be the LMA, and the
+RAM address would be the VMA.
+
+   You can see the sections in an object file by using the `objdump'
+program with the `-h' option.
+
+   Every object file also has a list of "symbols", known as the "symbol
+table".  A symbol may be defined or undefined.  Each symbol has a name,
+and each defined symbol has an address, among other information.  If
+you compile a C or C++ program into an object file, you will get a
+defined symbol for every defined function and global or static
+variable.  Every undefined function or global variable which is
+referenced in the input file will become an undefined symbol.
+
+   You can see the symbols in an object file by using the `nm' program,
+or by using the `objdump' program with the `-t' option.
+
+
+File: ld.info,  Node: Script Format,  Next: Simple Example,  Prev: Basic Script Concepts,  Up: Scripts
+
+3.2 Linker Script Format
+========================
+
+Linker scripts are text files.
+
+   You write a linker script as a series of commands.  Each command is
+either a keyword, possibly followed by arguments, or an assignment to a
+symbol.  You may separate commands using semicolons.  Whitespace is
+generally ignored.
+
+   Strings such as file or format names can normally be entered
+directly.  If the file name contains a character such as a comma which
+would otherwise serve to separate file names, you may put the file name
+in double quotes.  There is no way to use a double quote character in a
+file name.
+
+   You may include comments in linker scripts just as in C, delimited by
+`/*' and `*/'.  As in C, comments are syntactically equivalent to
+whitespace.
+
+
+File: ld.info,  Node: Simple Example,  Next: Simple Commands,  Prev: Script Format,  Up: Scripts
+
+3.3 Simple Linker Script Example
+================================
+
+Many linker scripts are fairly simple.
+
+   The simplest possible linker script has just one command:
+`SECTIONS'.  You use the `SECTIONS' command to describe the memory
+layout of the output file.
+
+   The `SECTIONS' command is a powerful command.  Here we will describe
+a simple use of it.  Let's assume your program consists only of code,
+initialized data, and uninitialized data.  These will be in the
+`.text', `.data', and `.bss' sections, respectively.  Let's assume
+further that these are the only sections which appear in your input
+files.
+
+   For this example, let's say that the code should be loaded at address
+0x10000, and that the data should start at address 0x8000000.  Here is a
+linker script which will do that:
+     SECTIONS
+     {
+       . = 0x10000;
+       .text : { *(.text) }
+       . = 0x8000000;
+       .data : { *(.data) }
+       .bss : { *(.bss) }
+     }
+
+   You write the `SECTIONS' command as the keyword `SECTIONS', followed
+by a series of symbol assignments and output section descriptions
+enclosed in curly braces.
+
+   The first line inside the `SECTIONS' command of the above example
+sets the value of the special symbol `.', which is the location
+counter.  If you do not specify the address of an output section in some
+other way (other ways are described later), the address is set from the
+current value of the location counter.  The location counter is then
+incremented by the size of the output section.  At the start of the
+`SECTIONS' command, the location counter has the value `0'.
+
+   The second line defines an output section, `.text'.  The colon is
+required syntax which may be ignored for now.  Within the curly braces
+after the output section name, you list the names of the input sections
+which should be placed into this output section.  The `*' is a wildcard
+which matches any file name.  The expression `*(.text)' means all
+`.text' input sections in all input files.
+
+   Since the location counter is `0x10000' when the output section
+`.text' is defined, the linker will set the address of the `.text'
+section in the output file to be `0x10000'.
+
+   The remaining lines define the `.data' and `.bss' sections in the
+output file.  The linker will place the `.data' output section at
+address `0x8000000'.  After the linker places the `.data' output
+section, the value of the location counter will be `0x8000000' plus the
+size of the `.data' output section.  The effect is that the linker will
+place the `.bss' output section immediately after the `.data' output
+section in memory.
+
+   The linker will ensure that each output section has the required
+alignment, by increasing the location counter if necessary.  In this
+example, the specified addresses for the `.text' and `.data' sections
+will probably satisfy any alignment constraints, but the linker may
+have to create a small gap between the `.data' and `.bss' sections.
+
+   That's it!  That's a simple and complete linker script.
+
+
+File: ld.info,  Node: Simple Commands,  Next: Assignments,  Prev: Simple Example,  Up: Scripts
+
+3.4 Simple Linker Script Commands
+=================================
+
+In this section we describe the simple linker script commands.
+
+* Menu:
+
+* Entry Point::			Setting the entry point
+* File Commands::		Commands dealing with files
+
+* Format Commands::		Commands dealing with object file formats
+
+* REGION_ALIAS::		Assign alias names to memory regions
+* Miscellaneous Commands::	Other linker script commands
+
+
+File: ld.info,  Node: Entry Point,  Next: File Commands,  Up: Simple Commands
+
+3.4.1 Setting the Entry Point
+-----------------------------
+
+The first instruction to execute in a program is called the "entry
+point".  You can use the `ENTRY' linker script command to set the entry
+point.  The argument is a symbol name:
+     ENTRY(SYMBOL)
+
+   There are several ways to set the entry point.  The linker will set
+the entry point by trying each of the following methods in order, and
+stopping when one of them succeeds:
+   * the `-e' ENTRY command-line option;
+
+   * the `ENTRY(SYMBOL)' command in a linker script;
+
+   * the value of the symbol `start', if defined;
+
+   * the address of the first byte of the `.text' section, if present;
+
+   * The address `0'.
+
+
+File: ld.info,  Node: File Commands,  Next: Format Commands,  Prev: Entry Point,  Up: Simple Commands
+
+3.4.2 Commands Dealing with Files
+---------------------------------
+
+Several linker script commands deal with files.
+
+`INCLUDE FILENAME'
+     Include the linker script FILENAME at this point.  The file will
+     be searched for in the current directory, and in any directory
+     specified with the `-L' option.  You can nest calls to `INCLUDE'
+     up to 10 levels deep.
+
+     You can place `INCLUDE' directives at the top level, in `MEMORY' or
+     `SECTIONS' commands, or in output section descriptions.
+
+`INPUT(FILE, FILE, ...)'
+`INPUT(FILE FILE ...)'
+     The `INPUT' command directs the linker to include the named files
+     in the link, as though they were named on the command line.
+
+     For example, if you always want to include `subr.o' any time you do
+     a link, but you can't be bothered to put it on every link command
+     line, then you can put `INPUT (subr.o)' in your linker script.
+
+     In fact, if you like, you can list all of your input files in the
+     linker script, and then invoke the linker with nothing but a `-T'
+     option.
+
+     In case a "sysroot prefix" is configured, and the filename starts
+     with the `/' character, and the script being processed was located
+     inside the "sysroot prefix", the filename will be looked for in
+     the "sysroot prefix".  Otherwise, the linker will try to open the
+     file in the current directory.  If it is not found, the linker
+     will search through the archive library search path.  See the
+     description of `-L' in *note Command Line Options: Options.
+
+     If you use `INPUT (-lFILE)', `ld' will transform the name to
+     `libFILE.a', as with the command line argument `-l'.
+
+     When you use the `INPUT' command in an implicit linker script, the
+     files will be included in the link at the point at which the linker
+     script file is included.  This can affect archive searching.
+
+`GROUP(FILE, FILE, ...)'
+`GROUP(FILE FILE ...)'
+     The `GROUP' command is like `INPUT', except that the named files
+     should all be archives, and they are searched repeatedly until no
+     new undefined references are created.  See the description of `-('
+     in *note Command Line Options: Options.
+
+`AS_NEEDED(FILE, FILE, ...)'
+`AS_NEEDED(FILE FILE ...)'
+     This construct can appear only inside of the `INPUT' or `GROUP'
+     commands, among other filenames.  The files listed will be handled
+     as if they appear directly in the `INPUT' or `GROUP' commands,
+     with the exception of ELF shared libraries, that will be added only
+     when they are actually needed.  This construct essentially enables
+     `--as-needed' option for all the files listed inside of it and
+     restores previous `--as-needed' resp. `--no-as-needed' setting
+     afterwards.
+
+`OUTPUT(FILENAME)'
+     The `OUTPUT' command names the output file.  Using
+     `OUTPUT(FILENAME)' in the linker script is exactly like using `-o
+     FILENAME' on the command line (*note Command Line Options:
+     Options.).  If both are used, the command line option takes
+     precedence.
+
+     You can use the `OUTPUT' command to define a default name for the
+     output file other than the usual default of `a.out'.
+
+`SEARCH_DIR(PATH)'
+     The `SEARCH_DIR' command adds PATH to the list of paths where `ld'
+     looks for archive libraries.  Using `SEARCH_DIR(PATH)' is exactly
+     like using `-L PATH' on the command line (*note Command Line
+     Options: Options.).  If both are used, then the linker will search
+     both paths.  Paths specified using the command line option are
+     searched first.
+
+`STARTUP(FILENAME)'
+     The `STARTUP' command is just like the `INPUT' command, except
+     that FILENAME will become the first input file to be linked, as
+     though it were specified first on the command line.  This may be
+     useful when using a system in which the entry point is always the
+     start of the first file.
+
+
+File: ld.info,  Node: Format Commands,  Next: REGION_ALIAS,  Prev: File Commands,  Up: Simple Commands
+
+3.4.3 Commands Dealing with Object File Formats
+-----------------------------------------------
+
+A couple of linker script commands deal with object file formats.
+
+`OUTPUT_FORMAT(BFDNAME)'
+`OUTPUT_FORMAT(DEFAULT, BIG, LITTLE)'
+     The `OUTPUT_FORMAT' command names the BFD format to use for the
+     output file (*note BFD::).  Using `OUTPUT_FORMAT(BFDNAME)' is
+     exactly like using `--oformat BFDNAME' on the command line (*note
+     Command Line Options: Options.).  If both are used, the command
+     line option takes precedence.
+
+     You can use `OUTPUT_FORMAT' with three arguments to use different
+     formats based on the `-EB' and `-EL' command line options.  This
+     permits the linker script to set the output format based on the
+     desired endianness.
+
+     If neither `-EB' nor `-EL' are used, then the output format will
+     be the first argument, DEFAULT.  If `-EB' is used, the output
+     format will be the second argument, BIG.  If `-EL' is used, the
+     output format will be the third argument, LITTLE.
+
+     For example, the default linker script for the MIPS ELF target
+     uses this command:
+          OUTPUT_FORMAT(elf32-bigmips, elf32-bigmips, elf32-littlemips)
+     This says that the default format for the output file is
+     `elf32-bigmips', but if the user uses the `-EL' command line
+     option, the output file will be created in the `elf32-littlemips'
+     format.
+
+`TARGET(BFDNAME)'
+     The `TARGET' command names the BFD format to use when reading input
+     files.  It affects subsequent `INPUT' and `GROUP' commands.  This
+     command is like using `-b BFDNAME' on the command line (*note
+     Command Line Options: Options.).  If the `TARGET' command is used
+     but `OUTPUT_FORMAT' is not, then the last `TARGET' command is also
+     used to set the format for the output file.  *Note BFD::.
+
+
+File: ld.info,  Node: REGION_ALIAS,  Next: Miscellaneous Commands,  Prev: Format Commands,  Up: Simple Commands
+
+3.4.4 Assign alias names to memory regions
+------------------------------------------
+
+Alias names can be added to existing memory regions created with the
+*note MEMORY:: command.  Each name corresponds to at most one memory
+region.
+
+     REGION_ALIAS(ALIAS, REGION)
+
+   The `REGION_ALIAS' function creates an alias name ALIAS for the
+memory region REGION.  This allows a flexible mapping of output sections
+to memory regions.  An example follows.
+
+   Suppose we have an application for embedded systems which come with
+various memory storage devices.  All have a general purpose, volatile
+memory `RAM' that allows code execution or data storage.  Some may have
+a read-only, non-volatile memory `ROM' that allows code execution and
+read-only data access.  The last variant is a read-only, non-volatile
+memory `ROM2' with read-only data access and no code execution
+capability.  We have four output sections:
+
+   * `.text' program code;
+
+   * `.rodata' read-only data;
+
+   * `.data' read-write initialized data;
+
+   * `.bss' read-write zero initialized data.
+
+   The goal is to provide a linker command file that contains a system
+independent part defining the output sections and a system dependent
+part mapping the output sections to the memory regions available on the
+system.  Our embedded systems come with three different memory setups
+`A', `B' and `C':
+Section            Variant A          Variant B          Variant C
+.text              RAM                ROM                ROM
+.rodata            RAM                ROM                ROM2
+.data              RAM                RAM/ROM            RAM/ROM2
+.bss               RAM                RAM                RAM
+   The notation `RAM/ROM' or `RAM/ROM2' means that this section is
+loaded into region `ROM' or `ROM2' respectively.  Please note that the
+load address of the `.data' section starts in all three variants at the
+end of the `.rodata' section.
+
+   The base linker script that deals with the output sections follows.
+It includes the system dependent `linkcmds.memory' file that describes
+the memory layout:
+     INCLUDE linkcmds.memory
+
+     SECTIONS
+       {
+         .text :
+           {
+             *(.text)
+           } > REGION_TEXT
+         .rodata :
+           {
+             *(.rodata)
+             rodata_end = .;
+           } > REGION_RODATA
+         .data : AT (rodata_end)
+           {
+             data_start = .;
+             *(.data)
+           } > REGION_DATA
+         data_size = SIZEOF(.data);
+         data_load_start = LOADADDR(.data);
+         .bss :
+           {
+             *(.bss)
+           } > REGION_BSS
+       }
+
+   Now we need three different `linkcmds.memory' files to define memory
+regions and alias names.  The content of `linkcmds.memory' for the three
+variants `A', `B' and `C':
+`A'
+     Here everything goes into the `RAM'.
+          MEMORY
+            {
+              RAM : ORIGIN = 0, LENGTH = 4M
+            }
+
+          REGION_ALIAS("REGION_TEXT", RAM);
+          REGION_ALIAS("REGION_RODATA", RAM);
+          REGION_ALIAS("REGION_DATA", RAM);
+          REGION_ALIAS("REGION_BSS", RAM);
+
+`B'
+     Program code and read-only data go into the `ROM'.  Read-write
+     data goes into the `RAM'.  An image of the initialized data is
+     loaded into the `ROM' and will be copied during system start into
+     the `RAM'.
+          MEMORY
+            {
+              ROM : ORIGIN = 0, LENGTH = 3M
+              RAM : ORIGIN = 0x10000000, LENGTH = 1M
+            }
+
+          REGION_ALIAS("REGION_TEXT", ROM);
+          REGION_ALIAS("REGION_RODATA", ROM);
+          REGION_ALIAS("REGION_DATA", RAM);
+          REGION_ALIAS("REGION_BSS", RAM);
+
+`C'
+     Program code goes into the `ROM'.  Read-only data goes into the
+     `ROM2'.  Read-write data goes into the `RAM'.  An image of the
+     initialized data is loaded into the `ROM2' and will be copied
+     during system start into the `RAM'.
+          MEMORY
+            {
+              ROM : ORIGIN = 0, LENGTH = 2M
+              ROM2 : ORIGIN = 0x10000000, LENGTH = 1M
+              RAM : ORIGIN = 0x20000000, LENGTH = 1M
+            }
+
+          REGION_ALIAS("REGION_TEXT", ROM);
+          REGION_ALIAS("REGION_RODATA", ROM2);
+          REGION_ALIAS("REGION_DATA", RAM);
+          REGION_ALIAS("REGION_BSS", RAM);
+
+   It is possible to write a common system initialization routine to
+copy the `.data' section from `ROM' or `ROM2' into the `RAM' if
+necessary:
+     #include <string.h>
+
+     extern char data_start [];
+     extern char data_size [];
+     extern char data_load_start [];
+
+     void copy_data(void)
+     {
+       if (data_start != data_load_start)
+         {
+           memcpy(data_start, data_load_start, (size_t) data_size);
+         }
+     }
+
+
+File: ld.info,  Node: Miscellaneous Commands,  Prev: REGION_ALIAS,  Up: Simple Commands
+
+3.4.5 Other Linker Script Commands
+----------------------------------
+
+There are a few other linker scripts commands.
+
+`ASSERT(EXP, MESSAGE)'
+     Ensure that EXP is non-zero.  If it is zero, then exit the linker
+     with an error code, and print MESSAGE.
+
+`EXTERN(SYMBOL SYMBOL ...)'
+     Force SYMBOL to be entered in the output file as an undefined
+     symbol.  Doing this may, for example, trigger linking of additional
+     modules from standard libraries.  You may list several SYMBOLs for
+     each `EXTERN', and you may use `EXTERN' multiple times.  This
+     command has the same effect as the `-u' command-line option.
+
+`FORCE_COMMON_ALLOCATION'
+     This command has the same effect as the `-d' command-line option:
+     to make `ld' assign space to common symbols even if a relocatable
+     output file is specified (`-r').
+
+`INHIBIT_COMMON_ALLOCATION'
+     This command has the same effect as the `--no-define-common'
+     command-line option: to make `ld' omit the assignment of addresses
+     to common symbols even for a non-relocatable output file.
+
+`INSERT [ AFTER | BEFORE ] OUTPUT_SECTION'
+     This command is typically used in a script specified by `-T' to
+     augment the default `SECTIONS' with, for example, overlays.  It
+     inserts all prior linker script statements after (or before)
+     OUTPUT_SECTION, and also causes `-T' to not override the default
+     linker script.  The exact insertion point is as for orphan
+     sections.  *Note Location Counter::.  The insertion happens after
+     the linker has mapped input sections to output sections.  Prior to
+     the insertion, since `-T' scripts are parsed before the default
+     linker script, statements in the `-T' script occur before the
+     default linker script statements in the internal linker
+     representation of the script.  In particular, input section
+     assignments will be made to `-T' output sections before those in
+     the default script.  Here is an example of how a `-T' script using
+     `INSERT' might look:
+
+          SECTIONS
+          {
+            OVERLAY :
+            {
+              .ov1 { ov1*(.text) }
+              .ov2 { ov2*(.text) }
+            }
+          }
+          INSERT AFTER .text;
+
+`NOCROSSREFS(SECTION SECTION ...)'
+     This command may be used to tell `ld' to issue an error about any
+     references among certain output sections.
+
+     In certain types of programs, particularly on embedded systems when
+     using overlays, when one section is loaded into memory, another
+     section will not be.  Any direct references between the two
+     sections would be errors.  For example, it would be an error if
+     code in one section called a function defined in the other section.
+
+     The `NOCROSSREFS' command takes a list of output section names.  If
+     `ld' detects any cross references between the sections, it reports
+     an error and returns a non-zero exit status.  Note that the
+     `NOCROSSREFS' command uses output section names, not input section
+     names.
+
+`OUTPUT_ARCH(BFDARCH)'
+     Specify a particular output machine architecture.  The argument is
+     one of the names used by the BFD library (*note BFD::).  You can
+     see the architecture of an object file by using the `objdump'
+     program with the `-f' option.
+
+
+File: ld.info,  Node: Assignments,  Next: SECTIONS,  Prev: Simple Commands,  Up: Scripts
+
+3.5 Assigning Values to Symbols
+===============================
+
+You may assign a value to a symbol in a linker script.  This will define
+the symbol and place it into the symbol table with a global scope.
+
+* Menu:
+
+* Simple Assignments::		Simple Assignments
+* PROVIDE::			PROVIDE
+* PROVIDE_HIDDEN::		PROVIDE_HIDDEN
+* Source Code Reference::	How to use a linker script defined symbol in source code
+
+
+File: ld.info,  Node: Simple Assignments,  Next: PROVIDE,  Up: Assignments
+
+3.5.1 Simple Assignments
+------------------------
+
+You may assign to a symbol using any of the C assignment operators:
+
+`SYMBOL = EXPRESSION ;'
+`SYMBOL += EXPRESSION ;'
+`SYMBOL -= EXPRESSION ;'
+`SYMBOL *= EXPRESSION ;'
+`SYMBOL /= EXPRESSION ;'
+`SYMBOL <<= EXPRESSION ;'
+`SYMBOL >>= EXPRESSION ;'
+`SYMBOL &= EXPRESSION ;'
+`SYMBOL |= EXPRESSION ;'
+
+   The first case will define SYMBOL to the value of EXPRESSION.  In
+the other cases, SYMBOL must already be defined, and the value will be
+adjusted accordingly.
+
+   The special symbol name `.' indicates the location counter.  You may
+only use this within a `SECTIONS' command.  *Note Location Counter::.
+
+   The semicolon after EXPRESSION is required.
+
+   Expressions are defined below; see *note Expressions::.
+
+   You may write symbol assignments as commands in their own right, or
+as statements within a `SECTIONS' command, or as part of an output
+section description in a `SECTIONS' command.
+
+   The section of the symbol will be set from the section of the
+expression; for more information, see *note Expression Section::.
+
+   Here is an example showing the three different places that symbol
+assignments may be used:
+
+     floating_point = 0;
+     SECTIONS
+     {
+       .text :
+         {
+           *(.text)
+           _etext = .;
+         }
+       _bdata = (. + 3) & ~ 3;
+       .data : { *(.data) }
+     }
+   In this example, the symbol `floating_point' will be defined as
+zero.  The symbol `_etext' will be defined as the address following the
+last `.text' input section.  The symbol `_bdata' will be defined as the
+address following the `.text' output section aligned upward to a 4 byte
+boundary.
+
+
+File: ld.info,  Node: PROVIDE,  Next: PROVIDE_HIDDEN,  Prev: Simple Assignments,  Up: Assignments
+
+3.5.2 PROVIDE
+-------------
+
+In some cases, it is desirable for a linker script to define a symbol
+only if it is referenced and is not defined by any object included in
+the link.  For example, traditional linkers defined the symbol `etext'.
+However, ANSI C requires that the user be able to use `etext' as a
+function name without encountering an error.  The `PROVIDE' keyword may
+be used to define a symbol, such as `etext', only if it is referenced
+but not defined.  The syntax is `PROVIDE(SYMBOL = EXPRESSION)'.
+
+   Here is an example of using `PROVIDE' to define `etext':
+     SECTIONS
+     {
+       .text :
+         {
+           *(.text)
+           _etext = .;
+           PROVIDE(etext = .);
+         }
+     }
+
+   In this example, if the program defines `_etext' (with a leading
+underscore), the linker will give a multiple definition error.  If, on
+the other hand, the program defines `etext' (with no leading
+underscore), the linker will silently use the definition in the program.
+If the program references `etext' but does not define it, the linker
+will use the definition in the linker script.
+
+
+File: ld.info,  Node: PROVIDE_HIDDEN,  Next: Source Code Reference,  Prev: PROVIDE,  Up: Assignments
+
+3.5.3 PROVIDE_HIDDEN
+--------------------
+
+Similar to `PROVIDE'.  For ELF targeted ports, the symbol will be
+hidden and won't be exported.
+
+
+File: ld.info,  Node: Source Code Reference,  Prev: PROVIDE_HIDDEN,  Up: Assignments
+
+3.5.4 Source Code Reference
+---------------------------
+
+Accessing a linker script defined variable from source code is not
+intuitive.  In particular a linker script symbol is not equivalent to a
+variable declaration in a high level language, it is instead a symbol
+that does not have a value.
+
+   Before going further, it is important to note that compilers often
+transform names in the source code into different names when they are
+stored in the symbol table.  For example, Fortran compilers commonly
+prepend or append an underscore, and C++ performs extensive `name
+mangling'.  Therefore there might be a discrepancy between the name of
+a variable as it is used in source code and the name of the same
+variable as it is defined in a linker script.  For example in C a
+linker script variable might be referred to as:
+
+       extern int foo;
+
+   But in the linker script it might be defined as:
+
+       _foo = 1000;
+
+   In the remaining examples however it is assumed that no name
+transformation has taken place.
+
+   When a symbol is declared in a high level language such as C, two
+things happen.  The first is that the compiler reserves enough space in
+the program's memory to hold the _value_ of the symbol.  The second is
+that the compiler creates an entry in the program's symbol table which
+holds the symbol's _address_.  ie the symbol table contains the address
+of the block of memory holding the symbol's value.  So for example the
+following C declaration, at file scope:
+
+       int foo = 1000;
+
+   creates a entry called `foo' in the symbol table.  This entry holds
+the address of an `int' sized block of memory where the number 1000 is
+initially stored.
+
+   When a program references a symbol the compiler generates code that
+first accesses the symbol table to find the address of the symbol's
+memory block and then code to read the value from that memory block.
+So:
+
+       foo = 1;
+
+   looks up the symbol `foo' in the symbol table, gets the address
+associated with this symbol and then writes the value 1 into that
+address.  Whereas:
+
+       int * a = & foo;
+
+   looks up the symbol `foo' in the symbol table, gets it address and
+then copies this address into the block of memory associated with the
+variable `a'.
+
+   Linker scripts symbol declarations, by contrast, create an entry in
+the symbol table but do not assign any memory to them.  Thus they are
+an address without a value.  So for example the linker script
+definition:
+
+       foo = 1000;
+
+   creates an entry in the symbol table called `foo' which holds the
+address of memory location 1000, but nothing special is stored at
+address 1000.  This means that you cannot access the _value_ of a
+linker script defined symbol - it has no value - all you can do is
+access the _address_ of a linker script defined symbol.
+
+   Hence when you are using a linker script defined symbol in source
+code you should always take the address of the symbol, and never
+attempt to use its value.  For example suppose you want to copy the
+contents of a section of memory called .ROM into a section called
+.FLASH and the linker script contains these declarations:
+
+       start_of_ROM   = .ROM;
+       end_of_ROM     = .ROM + sizeof (.ROM) - 1;
+       start_of_FLASH = .FLASH;
+
+   Then the C source code to perform the copy would be:
+
+       extern char start_of_ROM, end_of_ROM, start_of_FLASH;
+
+       memcpy (& start_of_FLASH, & start_of_ROM, & end_of_ROM - & start_of_ROM);
+
+   Note the use of the `&' operators.  These are correct.
+
+
+File: ld.info,  Node: SECTIONS,  Next: MEMORY,  Prev: Assignments,  Up: Scripts
+
+3.6 SECTIONS Command
+====================
+
+The `SECTIONS' command tells the linker how to map input sections into
+output sections, and how to place the output sections in memory.
+
+   The format of the `SECTIONS' command is:
+     SECTIONS
+     {
+       SECTIONS-COMMAND
+       SECTIONS-COMMAND
+       ...
+     }
+
+   Each SECTIONS-COMMAND may of be one of the following:
+
+   * an `ENTRY' command (*note Entry command: Entry Point.)
+
+   * a symbol assignment (*note Assignments::)
+
+   * an output section description
+
+   * an overlay description
+
+   The `ENTRY' command and symbol assignments are permitted inside the
+`SECTIONS' command for convenience in using the location counter in
+those commands.  This can also make the linker script easier to
+understand because you can use those commands at meaningful points in
+the layout of the output file.
+
+   Output section descriptions and overlay descriptions are described
+below.
+
+   If you do not use a `SECTIONS' command in your linker script, the
+linker will place each input section into an identically named output
+section in the order that the sections are first encountered in the
+input files.  If all input sections are present in the first file, for
+example, the order of sections in the output file will match the order
+in the first input file.  The first section will be at address zero.
+
+* Menu:
+
+* Output Section Description::	Output section description
+* Output Section Name::		Output section name
+* Output Section Address::	Output section address
+* Input Section::		Input section description
+* Output Section Data::		Output section data
+* Output Section Keywords::	Output section keywords
+* Output Section Discarding::	Output section discarding
+* Output Section Attributes::	Output section attributes
+* Overlay Description::		Overlay description
+
+
+File: ld.info,  Node: Output Section Description,  Next: Output Section Name,  Up: SECTIONS
+
+3.6.1 Output Section Description
+--------------------------------
+
+The full description of an output section looks like this:
+     SECTION [ADDRESS] [(TYPE)] :
+       [AT(LMA)]
+       [ALIGN(SECTION_ALIGN)]
+       [SUBALIGN(SUBSECTION_ALIGN)]
+       [CONSTRAINT]
+       {
+         OUTPUT-SECTION-COMMAND
+         OUTPUT-SECTION-COMMAND
+         ...
+       } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP]
+
+   Most output sections do not use most of the optional section
+attributes.
+
+   The whitespace around SECTION is required, so that the section name
+is unambiguous.  The colon and the curly braces are also required.  The
+line breaks and other white space are optional.
+
+   Each OUTPUT-SECTION-COMMAND may be one of the following:
+
+   * a symbol assignment (*note Assignments::)
+
+   * an input section description (*note Input Section::)
+
+   * data values to include directly (*note Output Section Data::)
+
+   * a special output section keyword (*note Output Section Keywords::)
+
+
+File: ld.info,  Node: Output Section Name,  Next: Output Section Address,  Prev: Output Section Description,  Up: SECTIONS
+
+3.6.2 Output Section Name
+-------------------------
+
+The name of the output section is SECTION.  SECTION must meet the
+constraints of your output format.  In formats which only support a
+limited number of sections, such as `a.out', the name must be one of
+the names supported by the format (`a.out', for example, allows only
+`.text', `.data' or `.bss'). If the output format supports any number
+of sections, but with numbers and not names (as is the case for Oasys),
+the name should be supplied as a quoted numeric string.  A section name
+may consist of any sequence of characters, but a name which contains
+any unusual characters such as commas must be quoted.
+
+   The output section name `/DISCARD/' is special; *note Output Section
+Discarding::.
+
+
+File: ld.info,  Node: Output Section Address,  Next: Input Section,  Prev: Output Section Name,  Up: SECTIONS
+
+3.6.3 Output Section Address
+----------------------------
+
+The ADDRESS is an expression for the VMA (the virtual memory address)
+of the output section.  If you do not provide ADDRESS, the linker will
+set it based on REGION if present, or otherwise based on the current
+value of the location counter.
+
+   If you provide ADDRESS, the address of the output section will be
+set to precisely that.  If you provide neither ADDRESS nor REGION, then
+the address of the output section will be set to the current value of
+the location counter aligned to the alignment requirements of the
+output section.  The alignment requirement of the output section is the
+strictest alignment of any input section contained within the output
+section.
+
+   For example,
+     .text . : { *(.text) }
+   and
+     .text : { *(.text) }
+   are subtly different.  The first will set the address of the `.text'
+output section to the current value of the location counter.  The
+second will set it to the current value of the location counter aligned
+to the strictest alignment of a `.text' input section.
+
+   The ADDRESS may be an arbitrary expression; *note Expressions::.
+For example, if you want to align the section on a 0x10 byte boundary,
+so that the lowest four bits of the section address are zero, you could
+do something like this:
+     .text ALIGN(0x10) : { *(.text) }
+   This works because `ALIGN' returns the current location counter
+aligned upward to the specified value.
+
+   Specifying ADDRESS for a section will change the value of the
+location counter, provided that the section is non-empty.  (Empty
+sections are ignored).
+
+
+File: ld.info,  Node: Input Section,  Next: Output Section Data,  Prev: Output Section Address,  Up: SECTIONS
+
+3.6.4 Input Section Description
+-------------------------------
+
+The most common output section command is an input section description.
+
+   The input section description is the most basic linker script
+operation.  You use output sections to tell the linker how to lay out
+your program in memory.  You use input section descriptions to tell the
+linker how to map the input files into your memory layout.
+
+* Menu:
+
+* Input Section Basics::	Input section basics
+* Input Section Wildcards::	Input section wildcard patterns
+* Input Section Common::	Input section for common symbols
+* Input Section Keep::		Input section and garbage collection
+* Input Section Example::	Input section example
+
+
+File: ld.info,  Node: Input Section Basics,  Next: Input Section Wildcards,  Up: Input Section
+
+3.6.4.1 Input Section Basics
+............................
+
+An input section description consists of a file name optionally followed
+by a list of section names in parentheses.
+
+   The file name and the section name may be wildcard patterns, which we
+describe further below (*note Input Section Wildcards::).
+
+   The most common input section description is to include all input
+sections with a particular name in the output section.  For example, to
+include all input `.text' sections, you would write:
+     *(.text)
+   Here the `*' is a wildcard which matches any file name.  To exclude
+a list of files from matching the file name wildcard, EXCLUDE_FILE may
+be used to match all files except the ones specified in the
+EXCLUDE_FILE list.  For example:
+     *(EXCLUDE_FILE (*crtend.o *otherfile.o) .ctors)
+   will cause all .ctors sections from all files except `crtend.o' and
+`otherfile.o' to be included.
+
+   There are two ways to include more than one section:
+     *(.text .rdata)
+     *(.text) *(.rdata)
+   The difference between these is the order in which the `.text' and
+`.rdata' input sections will appear in the output section.  In the
+first example, they will be intermingled, appearing in the same order as
+they are found in the linker input.  In the second example, all `.text'
+input sections will appear first, followed by all `.rdata' input
+sections.
+
+   You can specify a file name to include sections from a particular
+file.  You would do this if one or more of your files contain special
+data that needs to be at a particular location in memory.  For example:
+     data.o(.data)
+
+   You can also specify files within archives by writing a pattern
+matching the archive, a colon, then the pattern matching the file, with
+no whitespace around the colon.
+
+`archive:file'
+     matches file within archive
+
+`archive:'
+     matches the whole archive
+
+`:file'
+     matches file but not one in an archive
+
+   Either one or both of `archive' and `file' can contain shell
+wildcards.  On DOS based file systems, the linker will assume that a
+single letter followed by a colon is a drive specifier, so `c:myfile.o'
+is a simple file specification, not `myfile.o' within an archive called
+`c'.  `archive:file' filespecs may also be used within an
+`EXCLUDE_FILE' list, but may not appear in other linker script
+contexts.  For instance, you cannot extract a file from an archive by
+using `archive:file' in an `INPUT' command.
+
+   If you use a file name without a list of sections, then all sections
+in the input file will be included in the output section.  This is not
+commonly done, but it may by useful on occasion.  For example:
+     data.o
+
+   When you use a file name which is not an `archive:file' specifier
+and does not contain any wild card characters, the linker will first
+see if you also specified the file name on the linker command line or
+in an `INPUT' command.  If you did not, the linker will attempt to open
+the file as an input file, as though it appeared on the command line.
+Note that this differs from an `INPUT' command, because the linker will
+not search for the file in the archive search path.
+
+
+File: ld.info,  Node: Input Section Wildcards,  Next: Input Section Common,  Prev: Input Section Basics,  Up: Input Section
+
+3.6.4.2 Input Section Wildcard Patterns
+.......................................
+
+In an input section description, either the file name or the section
+name or both may be wildcard patterns.
+
+   The file name of `*' seen in many examples is a simple wildcard
+pattern for the file name.
+
+   The wildcard patterns are like those used by the Unix shell.
+
+`*'
+     matches any number of characters
+
+`?'
+     matches any single character
+
+`[CHARS]'
+     matches a single instance of any of the CHARS; the `-' character
+     may be used to specify a range of characters, as in `[a-z]' to
+     match any lower case letter
+
+`\'
+     quotes the following character
+
+   When a file name is matched with a wildcard, the wildcard characters
+will not match a `/' character (used to separate directory names on
+Unix).  A pattern consisting of a single `*' character is an exception;
+it will always match any file name, whether it contains a `/' or not.
+In a section name, the wildcard characters will match a `/' character.
+
+   File name wildcard patterns only match files which are explicitly
+specified on the command line or in an `INPUT' command.  The linker
+does not search directories to expand wildcards.
+
+   If a file name matches more than one wildcard pattern, or if a file
+name appears explicitly and is also matched by a wildcard pattern, the
+linker will use the first match in the linker script.  For example, this
+sequence of input section descriptions is probably in error, because the
+`data.o' rule will not be used:
+     .data : { *(.data) }
+     .data1 : { data.o(.data) }
+
+   Normally, the linker will place files and sections matched by
+wildcards in the order in which they are seen during the link.  You can
+change this by using the `SORT_BY_NAME' keyword, which appears before a
+wildcard pattern in parentheses (e.g., `SORT_BY_NAME(.text*)').  When
+the `SORT_BY_NAME' keyword is used, the linker will sort the files or
+sections into ascending order by name before placing them in the output
+file.
+
+   `SORT_BY_ALIGNMENT' is very similar to `SORT_BY_NAME'. The
+difference is `SORT_BY_ALIGNMENT' will sort sections into ascending
+order by alignment before placing them in the output file.
+
+   `SORT' is an alias for `SORT_BY_NAME'.
+
+   When there are nested section sorting commands in linker script,
+there can be at most 1 level of nesting for section sorting commands.
+
+  1. `SORT_BY_NAME' (`SORT_BY_ALIGNMENT' (wildcard section pattern)).
+     It will sort the input sections by name first, then by alignment
+     if 2 sections have the same name.
+
+  2. `SORT_BY_ALIGNMENT' (`SORT_BY_NAME' (wildcard section pattern)).
+     It will sort the input sections by alignment first, then by name
+     if 2 sections have the same alignment.
+
+  3. `SORT_BY_NAME' (`SORT_BY_NAME' (wildcard section pattern)) is
+     treated the same as `SORT_BY_NAME' (wildcard section pattern).
+
+  4. `SORT_BY_ALIGNMENT' (`SORT_BY_ALIGNMENT' (wildcard section
+     pattern)) is treated the same as `SORT_BY_ALIGNMENT' (wildcard
+     section pattern).
+
+  5. All other nested section sorting commands are invalid.
+
+   When both command line section sorting option and linker script
+section sorting command are used, section sorting command always takes
+precedence over the command line option.
+
+   If the section sorting command in linker script isn't nested, the
+command line option will make the section sorting command to be treated
+as nested sorting command.
+
+  1. `SORT_BY_NAME' (wildcard section pattern ) with `--sort-sections
+     alignment' is equivalent to `SORT_BY_NAME' (`SORT_BY_ALIGNMENT'
+     (wildcard section pattern)).
+
+  2. `SORT_BY_ALIGNMENT' (wildcard section pattern) with
+     `--sort-section name' is equivalent to `SORT_BY_ALIGNMENT'
+     (`SORT_BY_NAME' (wildcard section pattern)).
+
+   If the section sorting command in linker script is nested, the
+command line option will be ignored.
+
+   If you ever get confused about where input sections are going, use
+the `-M' linker option to generate a map file.  The map file shows
+precisely how input sections are mapped to output sections.
+
+   This example shows how wildcard patterns might be used to partition
+files.  This linker script directs the linker to place all `.text'
+sections in `.text' and all `.bss' sections in `.bss'.  The linker will
+place the `.data' section from all files beginning with an upper case
+character in `.DATA'; for all other files, the linker will place the
+`.data' section in `.data'.
+     SECTIONS {
+       .text : { *(.text) }
+       .DATA : { [A-Z]*(.data) }
+       .data : { *(.data) }
+       .bss : { *(.bss) }
+     }
+
+
+File: ld.info,  Node: Input Section Common,  Next: Input Section Keep,  Prev: Input Section Wildcards,  Up: Input Section
+
+3.6.4.3 Input Section for Common Symbols
+........................................
+
+A special notation is needed for common symbols, because in many object
+file formats common symbols do not have a particular input section.  The
+linker treats common symbols as though they are in an input section
+named `COMMON'.
+
+   You may use file names with the `COMMON' section just as with any
+other input sections.  You can use this to place common symbols from a
+particular input file in one section while common symbols from other
+input files are placed in another section.
+
+   In most cases, common symbols in input files will be placed in the
+`.bss' section in the output file.  For example:
+     .bss { *(.bss) *(COMMON) }
+
+   Some object file formats have more than one type of common symbol.
+For example, the MIPS ELF object file format distinguishes standard
+common symbols and small common symbols.  In this case, the linker will
+use a different special section name for other types of common symbols.
+In the case of MIPS ELF, the linker uses `COMMON' for standard common
+symbols and `.scommon' for small common symbols.  This permits you to
+map the different types of common symbols into memory at different
+locations.
+
+   You will sometimes see `[COMMON]' in old linker scripts.  This
+notation is now considered obsolete.  It is equivalent to `*(COMMON)'.
+
+
+File: ld.info,  Node: Input Section Keep,  Next: Input Section Example,  Prev: Input Section Common,  Up: Input Section
+
+3.6.4.4 Input Section and Garbage Collection
+............................................
+
+When link-time garbage collection is in use (`--gc-sections'), it is
+often useful to mark sections that should not be eliminated.  This is
+accomplished by surrounding an input section's wildcard entry with
+`KEEP()', as in `KEEP(*(.init))' or `KEEP(SORT_BY_NAME(*)(.ctors))'.
+
+
+File: ld.info,  Node: Input Section Example,  Prev: Input Section Keep,  Up: Input Section
+
+3.6.4.5 Input Section Example
+.............................
+
+The following example is a complete linker script.  It tells the linker
+to read all of the sections from file `all.o' and place them at the
+start of output section `outputa' which starts at location `0x10000'.
+All of section `.input1' from file `foo.o' follows immediately, in the
+same output section.  All of section `.input2' from `foo.o' goes into
+output section `outputb', followed by section `.input1' from `foo1.o'.
+All of the remaining `.input1' and `.input2' sections from any files
+are written to output section `outputc'.
+
+     SECTIONS {
+       outputa 0x10000 :
+         {
+         all.o
+         foo.o (.input1)
+         }
+       outputb :
+         {
+         foo.o (.input2)
+         foo1.o (.input1)
+         }
+       outputc :
+         {
+         *(.input1)
+         *(.input2)
+         }
+     }
+
+
+File: ld.info,  Node: Output Section Data,  Next: Output Section Keywords,  Prev: Input Section,  Up: SECTIONS
+
+3.6.5 Output Section Data
+-------------------------
+
+You can include explicit bytes of data in an output section by using
+`BYTE', `SHORT', `LONG', `QUAD', or `SQUAD' as an output section
+command.  Each keyword is followed by an expression in parentheses
+providing the value to store (*note Expressions::).  The value of the
+expression is stored at the current value of the location counter.
+
+   The `BYTE', `SHORT', `LONG', and `QUAD' commands store one, two,
+four, and eight bytes (respectively).  After storing the bytes, the
+location counter is incremented by the number of bytes stored.
+
+   For example, this will store the byte 1 followed by the four byte
+value of the symbol `addr':
+     BYTE(1)
+     LONG(addr)
+
+   When using a 64 bit host or target, `QUAD' and `SQUAD' are the same;
+they both store an 8 byte, or 64 bit, value.  When both host and target
+are 32 bits, an expression is computed as 32 bits.  In this case `QUAD'
+stores a 32 bit value zero extended to 64 bits, and `SQUAD' stores a 32
+bit value sign extended to 64 bits.
+
+   If the object file format of the output file has an explicit
+endianness, which is the normal case, the value will be stored in that
+endianness.  When the object file format does not have an explicit
+endianness, as is true of, for example, S-records, the value will be
+stored in the endianness of the first input object file.
+
+   Note--these commands only work inside a section description and not
+between them, so the following will produce an error from the linker:
+     SECTIONS { .text : { *(.text) } LONG(1) .data : { *(.data) } }
+   whereas this will work:
+     SECTIONS { .text : { *(.text) ; LONG(1) } .data : { *(.data) } }
+
+   You may use the `FILL' command to set the fill pattern for the
+current section.  It is followed by an expression in parentheses.  Any
+otherwise unspecified regions of memory within the section (for example,
+gaps left due to the required alignment of input sections) are filled
+with the value of the expression, repeated as necessary.  A `FILL'
+statement covers memory locations after the point at which it occurs in
+the section definition; by including more than one `FILL' statement,
+you can have different fill patterns in different parts of an output
+section.
+
+   This example shows how to fill unspecified regions of memory with the
+value `0x90':
+     FILL(0x90909090)
+
+   The `FILL' command is similar to the `=FILLEXP' output section
+attribute, but it only affects the part of the section following the
+`FILL' command, rather than the entire section.  If both are used, the
+`FILL' command takes precedence.  *Note Output Section Fill::, for
+details on the fill expression.
+
+
+File: ld.info,  Node: Output Section Keywords,  Next: Output Section Discarding,  Prev: Output Section Data,  Up: SECTIONS
+
+3.6.6 Output Section Keywords
+-----------------------------
+
+There are a couple of keywords which can appear as output section
+commands.
+
+`CREATE_OBJECT_SYMBOLS'
+     The command tells the linker to create a symbol for each input
+     file.  The name of each symbol will be the name of the
+     corresponding input file.  The section of each symbol will be the
+     output section in which the `CREATE_OBJECT_SYMBOLS' command
+     appears.
+
+     This is conventional for the a.out object file format.  It is not
+     normally used for any other object file format.
+
+`CONSTRUCTORS'
+     When linking using the a.out object file format, the linker uses an
+     unusual set construct to support C++ global constructors and
+     destructors.  When linking object file formats which do not support
+     arbitrary sections, such as ECOFF and XCOFF, the linker will
+     automatically recognize C++ global constructors and destructors by
+     name.  For these object file formats, the `CONSTRUCTORS' command
+     tells the linker to place constructor information in the output
+     section where the `CONSTRUCTORS' command appears.  The
+     `CONSTRUCTORS' command is ignored for other object file formats.
+
+     The symbol `__CTOR_LIST__' marks the start of the global
+     constructors, and the symbol `__CTOR_END__' marks the end.
+     Similarly, `__DTOR_LIST__' and `__DTOR_END__' mark the start and
+     end of the global destructors.  The first word in the list is the
+     number of entries, followed by the address of each constructor or
+     destructor, followed by a zero word.  The compiler must arrange to
+     actually run the code.  For these object file formats GNU C++
+     normally calls constructors from a subroutine `__main'; a call to
+     `__main' is automatically inserted into the startup code for
+     `main'.  GNU C++ normally runs destructors either by using
+     `atexit', or directly from the function `exit'.
+
+     For object file formats such as `COFF' or `ELF' which support
+     arbitrary section names, GNU C++ will normally arrange to put the
+     addresses of global constructors and destructors into the `.ctors'
+     and `.dtors' sections.  Placing the following sequence into your
+     linker script will build the sort of table which the GNU C++
+     runtime code expects to see.
+
+                __CTOR_LIST__ = .;
+                LONG((__CTOR_END__ - __CTOR_LIST__) / 4 - 2)
+                *(.ctors)
+                LONG(0)
+                __CTOR_END__ = .;
+                __DTOR_LIST__ = .;
+                LONG((__DTOR_END__ - __DTOR_LIST__) / 4 - 2)
+                *(.dtors)
+                LONG(0)
+                __DTOR_END__ = .;
+
+     If you are using the GNU C++ support for initialization priority,
+     which provides some control over the order in which global
+     constructors are run, you must sort the constructors at link time
+     to ensure that they are executed in the correct order.  When using
+     the `CONSTRUCTORS' command, use `SORT_BY_NAME(CONSTRUCTORS)'
+     instead.  When using the `.ctors' and `.dtors' sections, use
+     `*(SORT_BY_NAME(.ctors))' and `*(SORT_BY_NAME(.dtors))' instead of
+     just `*(.ctors)' and `*(.dtors)'.
+
+     Normally the compiler and linker will handle these issues
+     automatically, and you will not need to concern yourself with
+     them.  However, you may need to consider this if you are using C++
+     and writing your own linker scripts.
+
+
+
+File: ld.info,  Node: Output Section Discarding,  Next: Output Section Attributes,  Prev: Output Section Keywords,  Up: SECTIONS
+
+3.6.7 Output Section Discarding
+-------------------------------
+
+The linker will not create output sections with no contents.  This is
+for convenience when referring to input sections that may or may not be
+present in any of the input files.  For example:
+     .foo : { *(.foo) }
+   will only create a `.foo' section in the output file if there is a
+`.foo' section in at least one input file, and if the input sections
+are not all empty.  Other link script directives that allocate space in
+an output section will also create the output section.
+
+   The linker will ignore address assignments (*note Output Section
+Address::) on discarded output sections, except when the linker script
+defines symbols in the output section.  In that case the linker will
+obey the address assignments, possibly advancing dot even though the
+section is discarded.
+
+   The special output section name `/DISCARD/' may be used to discard
+input sections.  Any input sections which are assigned to an output
+section named `/DISCARD/' are not included in the output file.
+
+
+File: ld.info,  Node: Output Section Attributes,  Next: Overlay Description,  Prev: Output Section Discarding,  Up: SECTIONS
+
+3.6.8 Output Section Attributes
+-------------------------------
+
+We showed above that the full description of an output section looked
+like this:
+
+     SECTION [ADDRESS] [(TYPE)] :
+       [AT(LMA)]
+       [ALIGN(SECTION_ALIGN)]
+       [SUBALIGN(SUBSECTION_ALIGN)]
+       [CONSTRAINT]
+       {
+         OUTPUT-SECTION-COMMAND
+         OUTPUT-SECTION-COMMAND
+         ...
+       } [>REGION] [AT>LMA_REGION] [:PHDR :PHDR ...] [=FILLEXP]
+
+   We've already described SECTION, ADDRESS, and
+OUTPUT-SECTION-COMMAND.  In this section we will describe the remaining
+section attributes.
+
+* Menu:
+
+* Output Section Type::		Output section type
+* Output Section LMA::		Output section LMA
+* Forced Output Alignment::	Forced Output Alignment
+* Forced Input Alignment::	Forced Input Alignment
+* Output Section Constraint::   Output section constraint
+* Output Section Region::	Output section region
+* Output Section Phdr::		Output section phdr
+* Output Section Fill::		Output section fill
+
+
+File: ld.info,  Node: Output Section Type,  Next: Output Section LMA,  Up: Output Section Attributes
+
+3.6.8.1 Output Section Type
+...........................
+
+Each output section may have a type.  The type is a keyword in
+parentheses.  The following types are defined:
+
+`NOLOAD'
+     The section should be marked as not loadable, so that it will not
+     be loaded into memory when the program is run.
+
+`DSECT'
+`COPY'
+`INFO'
+`OVERLAY'
+     These type names are supported for backward compatibility, and are
+     rarely used.  They all have the same effect: the section should be
+     marked as not allocatable, so that no memory is allocated for the
+     section when the program is run.
+
+   The linker normally sets the attributes of an output section based on
+the input sections which map into it.  You can override this by using
+the section type.  For example, in the script sample below, the `ROM'
+section is addressed at memory location `0' and does not need to be
+loaded when the program is run.  The contents of the `ROM' section will
+appear in the linker output file as usual.
+     SECTIONS {
+       ROM 0 (NOLOAD) : { ... }
+       ...
+     }
+
+
+File: ld.info,  Node: Output Section LMA,  Next: Forced Output Alignment,  Prev: Output Section Type,  Up: Output Section Attributes
+
+3.6.8.2 Output Section LMA
+..........................
+
+Every section has a virtual address (VMA) and a load address (LMA); see
+*note Basic Script Concepts::.  The address expression which may appear
+in an output section description sets the VMA (*note Output Section
+Address::).
+
+   The expression LMA that follows the `AT' keyword specifies the load
+address of the section.
+
+   Alternatively, with `AT>LMA_REGION' expression, you may specify a
+memory region for the section's load address. *Note MEMORY::.  Note
+that if the section has not had a VMA assigned to it then the linker
+will use the LMA_REGION as the VMA region as well.
+
+   If neither `AT' nor `AT>' is specified for an allocatable section,
+the linker will set the LMA such that the difference between VMA and
+LMA for the section is the same as the preceding output section in the
+same region.  If there is no preceding output section or the section is
+not allocatable, the linker will set the LMA equal to the VMA.  *Note
+Output Section Region::.
+
+   This feature is designed to make it easy to build a ROM image.  For
+example, the following linker script creates three output sections: one
+called `.text', which starts at `0x1000', one called `.mdata', which is
+loaded at the end of the `.text' section even though its VMA is
+`0x2000', and one called `.bss' to hold uninitialized data at address
+`0x3000'.  The symbol `_data' is defined with the value `0x2000', which
+shows that the location counter holds the VMA value, not the LMA value.
+
+     SECTIONS
+       {
+       .text 0x1000 : { *(.text) _etext = . ; }
+       .mdata 0x2000 :
+         AT ( ADDR (.text) + SIZEOF (.text) )
+         { _data = . ; *(.data); _edata = . ;  }
+       .bss 0x3000 :
+         { _bstart = . ;  *(.bss) *(COMMON) ; _bend = . ;}
+     }
+
+   The run-time initialization code for use with a program generated
+with this linker script would include something like the following, to
+copy the initialized data from the ROM image to its runtime address.
+Notice how this code takes advantage of the symbols defined by the
+linker script.
+
+     extern char _etext, _data, _edata, _bstart, _bend;
+     char *src = &_etext;
+     char *dst = &_data;
+
+     /* ROM has data at end of text; copy it. */
+     while (dst < &_edata) {
+       *dst++ = *src++;
+     }
+
+     /* Zero bss */
+     for (dst = &_bstart; dst< &_bend; dst++)
+       *dst = 0;
+
+
+File: ld.info,  Node: Forced Output Alignment,  Next: Forced Input Alignment,  Prev: Output Section LMA,  Up: Output Section Attributes
+
+3.6.8.3 Forced Output Alignment
+...............................
+
+You can increase an output section's alignment by using ALIGN.
+
+
+File: ld.info,  Node: Forced Input Alignment,  Next: Output Section Constraint,  Prev: Forced Output Alignment,  Up: Output Section Attributes
+
+3.6.8.4 Forced Input Alignment
+..............................
+
+You can force input section alignment within an output section by using
+SUBALIGN.  The value specified overrides any alignment given by input
+sections, whether larger or smaller.
+
+
+File: ld.info,  Node: Output Section Constraint,  Next: Output Section Region,  Prev: Forced Input Alignment,  Up: Output Section Attributes
+
+3.6.8.5 Output Section Constraint
+.................................
+
+You can specify that an output section should only be created if all of
+its input sections are read-only or all of its input sections are
+read-write by using the keyword `ONLY_IF_RO' and `ONLY_IF_RW'
+respectively.
+
+
+File: ld.info,  Node: Output Section Region,  Next: Output Section Phdr,  Prev: Output Section Constraint,  Up: Output Section Attributes
+
+3.6.8.6 Output Section Region
+.............................
+
+You can assign a section to a previously defined region of memory by
+using `>REGION'.  *Note MEMORY::.
+
+   Here is a simple example:
+     MEMORY { rom : ORIGIN = 0x1000, LENGTH = 0x1000 }
+     SECTIONS { ROM : { *(.text) } >rom }
+
+
+File: ld.info,  Node: Output Section Phdr,  Next: Output Section Fill,  Prev: Output Section Region,  Up: Output Section Attributes
+
+3.6.8.7 Output Section Phdr
+...........................
+
+You can assign a section to a previously defined program segment by
+using `:PHDR'.  *Note PHDRS::.  If a section is assigned to one or more
+segments, then all subsequent allocated sections will be assigned to
+those segments as well, unless they use an explicitly `:PHDR' modifier.
+You can use `:NONE' to tell the linker to not put the section in any
+segment at all.
+
+   Here is a simple example:
+     PHDRS { text PT_LOAD ; }
+     SECTIONS { .text : { *(.text) } :text }
+
+
+File: ld.info,  Node: Output Section Fill,  Prev: Output Section Phdr,  Up: Output Section Attributes
+
+3.6.8.8 Output Section Fill
+...........................
+
+You can set the fill pattern for an entire section by using `=FILLEXP'.
+FILLEXP is an expression (*note Expressions::).  Any otherwise
+unspecified regions of memory within the output section (for example,
+gaps left due to the required alignment of input sections) will be
+filled with the value, repeated as necessary.  If the fill expression
+is a simple hex number, ie. a string of hex digit starting with `0x'
+and without a trailing `k' or `M', then an arbitrarily long sequence of
+hex digits can be used to specify the fill pattern;  Leading zeros
+become part of the pattern too.  For all other cases, including extra
+parentheses or a unary `+', the fill pattern is the four least
+significant bytes of the value of the expression.  In all cases, the
+number is big-endian.
+
+   You can also change the fill value with a `FILL' command in the
+output section commands; (*note Output Section Data::).
+
+   Here is a simple example:
+     SECTIONS { .text : { *(.text) } =0x90909090 }
+
+
+File: ld.info,  Node: Overlay Description,  Prev: Output Section Attributes,  Up: SECTIONS
+
+3.6.9 Overlay Description
+-------------------------
+
+An overlay description provides an easy way to describe sections which
+are to be loaded as part of a single memory image but are to be run at
+the same memory address.  At run time, some sort of overlay manager will
+copy the overlaid sections in and out of the runtime memory address as
+required, perhaps by simply manipulating addressing bits.  This approach
+can be useful, for example, when a certain region of memory is faster
+than another.
+
+   Overlays are described using the `OVERLAY' command.  The `OVERLAY'
+command is used within a `SECTIONS' command, like an output section
+description.  The full syntax of the `OVERLAY' command is as follows:
+     OVERLAY [START] : [NOCROSSREFS] [AT ( LDADDR )]
+       {
+         SECNAME1
+           {
+             OUTPUT-SECTION-COMMAND
+             OUTPUT-SECTION-COMMAND
+             ...
+           } [:PHDR...] [=FILL]
+         SECNAME2
+           {
+             OUTPUT-SECTION-COMMAND
+             OUTPUT-SECTION-COMMAND
+             ...
+           } [:PHDR...] [=FILL]
+         ...
+       } [>REGION] [:PHDR...] [=FILL]
+
+   Everything is optional except `OVERLAY' (a keyword), and each
+section must have a name (SECNAME1 and SECNAME2 above).  The section
+definitions within the `OVERLAY' construct are identical to those
+within the general `SECTIONS' contruct (*note SECTIONS::), except that
+no addresses and no memory regions may be defined for sections within
+an `OVERLAY'.
+
+   The sections are all defined with the same starting address.  The
+load addresses of the sections are arranged such that they are
+consecutive in memory starting at the load address used for the
+`OVERLAY' as a whole (as with normal section definitions, the load
+address is optional, and defaults to the start address; the start
+address is also optional, and defaults to the current value of the
+location counter).
+
+   If the `NOCROSSREFS' keyword is used, and there any references among
+the sections, the linker will report an error.  Since the sections all
+run at the same address, it normally does not make sense for one
+section to refer directly to another.  *Note NOCROSSREFS: Miscellaneous
+Commands.
+
+   For each section within the `OVERLAY', the linker automatically
+provides two symbols.  The symbol `__load_start_SECNAME' is defined as
+the starting load address of the section.  The symbol
+`__load_stop_SECNAME' is defined as the final load address of the
+section.  Any characters within SECNAME which are not legal within C
+identifiers are removed.  C (or assembler) code may use these symbols
+to move the overlaid sections around as necessary.
+
+   At the end of the overlay, the value of the location counter is set
+to the start address of the overlay plus the size of the largest
+section.
+
+   Here is an example.  Remember that this would appear inside a
+`SECTIONS' construct.
+       OVERLAY 0x1000 : AT (0x4000)
+        {
+          .text0 { o1/*.o(.text) }
+          .text1 { o2/*.o(.text) }
+        }
+This will define both `.text0' and `.text1' to start at address 0x1000.
+`.text0' will be loaded at address 0x4000, and `.text1' will be loaded
+immediately after `.text0'.  The following symbols will be defined if
+referenced: `__load_start_text0', `__load_stop_text0',
+`__load_start_text1', `__load_stop_text1'.
+
+   C code to copy overlay `.text1' into the overlay area might look
+like the following.
+
+       extern char __load_start_text1, __load_stop_text1;
+       memcpy ((char *) 0x1000, &__load_start_text1,
+               &__load_stop_text1 - &__load_start_text1);
+
+   Note that the `OVERLAY' command is just syntactic sugar, since
+everything it does can be done using the more basic commands.  The above
+example could have been written identically as follows.
+
+       .text0 0x1000 : AT (0x4000) { o1/*.o(.text) }
+       PROVIDE (__load_start_text0 = LOADADDR (.text0));
+       PROVIDE (__load_stop_text0 = LOADADDR (.text0) + SIZEOF (.text0));
+       .text1 0x1000 : AT (0x4000 + SIZEOF (.text0)) { o2/*.o(.text) }
+       PROVIDE (__load_start_text1 = LOADADDR (.text1));
+       PROVIDE (__load_stop_text1 = LOADADDR (.text1) + SIZEOF (.text1));
+       . = 0x1000 + MAX (SIZEOF (.text0), SIZEOF (.text1));
+
+
+File: ld.info,  Node: MEMORY,  Next: PHDRS,  Prev: SECTIONS,  Up: Scripts
+
+3.7 MEMORY Command
+==================
+
+The linker's default configuration permits allocation of all available
+memory.  You can override this by using the `MEMORY' command.
+
+   The `MEMORY' command describes the location and size of blocks of
+memory in the target.  You can use it to describe which memory regions
+may be used by the linker, and which memory regions it must avoid.  You
+can then assign sections to particular memory regions.  The linker will
+set section addresses based on the memory regions, and will warn about
+regions that become too full.  The linker will not shuffle sections
+around to fit into the available regions.
+
+   A linker script may contain at most one use of the `MEMORY' command.
+However, you can define as many blocks of memory within it as you wish.
+The syntax is:
+     MEMORY
+       {
+         NAME [(ATTR)] : ORIGIN = ORIGIN, LENGTH = LEN
+         ...
+       }
+
+   The NAME is a name used in the linker script to refer to the region.
+The region name has no meaning outside of the linker script.  Region
+names are stored in a separate name space, and will not conflict with
+symbol names, file names, or section names.  Each memory region must
+have a distinct name within the `MEMORY' command.  However you can add
+later alias names to existing memory regions with the *note
+REGION_ALIAS:: command.
+
+   The ATTR string is an optional list of attributes that specify
+whether to use a particular memory region for an input section which is
+not explicitly mapped in the linker script.  As described in *note
+SECTIONS::, if you do not specify an output section for some input
+section, the linker will create an output section with the same name as
+the input section.  If you define region attributes, the linker will use
+them to select the memory region for the output section that it creates.
+
+   The ATTR string must consist only of the following characters:
+`R'
+     Read-only section
+
+`W'
+     Read/write section
+
+`X'
+     Executable section
+
+`A'
+     Allocatable section
+
+`I'
+     Initialized section
+
+`L'
+     Same as `I'
+
+`!'
+     Invert the sense of any of the preceding attributes
+
+   If a unmapped section matches any of the listed attributes other than
+`!', it will be placed in the memory region.  The `!' attribute
+reverses this test, so that an unmapped section will be placed in the
+memory region only if it does not match any of the listed attributes.
+
+   The ORIGIN is an numerical expression for the start address of the
+memory region.  The expression must evaluate to a constant and it
+cannot involve any symbols.  The keyword `ORIGIN' may be abbreviated to
+`org' or `o' (but not, for example, `ORG').
+
+   The LEN is an expression for the size in bytes of the memory region.
+As with the ORIGIN expression, the expression must be numerical only
+and must evaluate to a constant.  The keyword `LENGTH' may be
+abbreviated to `len' or `l'.
+
+   In the following example, we specify that there are two memory
+regions available for allocation: one starting at `0' for 256 kilobytes,
+and the other starting at `0x40000000' for four megabytes.  The linker
+will place into the `rom' memory region every section which is not
+explicitly mapped into a memory region, and is either read-only or
+executable.  The linker will place other sections which are not
+explicitly mapped into a memory region into the `ram' memory region.
+
+     MEMORY
+       {
+         rom (rx)  : ORIGIN = 0, LENGTH = 256K
+         ram (!rx) : org = 0x40000000, l = 4M
+       }
+
+   Once you define a memory region, you can direct the linker to place
+specific output sections into that memory region by using the `>REGION'
+output section attribute.  For example, if you have a memory region
+named `mem', you would use `>mem' in the output section definition.
+*Note Output Section Region::.  If no address was specified for the
+output section, the linker will set the address to the next available
+address within the memory region.  If the combined output sections
+directed to a memory region are too large for the region, the linker
+will issue an error message.
+
+   It is possible to access the origin and length of a memory in an
+expression via the `ORIGIN(MEMORY)' and `LENGTH(MEMORY)' functions:
+
+       _fstack = ORIGIN(ram) + LENGTH(ram) - 4;
+
+
+File: ld.info,  Node: PHDRS,  Next: VERSION,  Prev: MEMORY,  Up: Scripts
+
+3.8 PHDRS Command
+=================
+
+The ELF object file format uses "program headers", also knows as
+"segments".  The program headers describe how the program should be
+loaded into memory.  You can print them out by using the `objdump'
+program with the `-p' option.
+
+   When you run an ELF program on a native ELF system, the system loader
+reads the program headers in order to figure out how to load the
+program.  This will only work if the program headers are set correctly.
+This manual does not describe the details of how the system loader
+interprets program headers; for more information, see the ELF ABI.
+
+   The linker will create reasonable program headers by default.
+However, in some cases, you may need to specify the program headers more
+precisely.  You may use the `PHDRS' command for this purpose.  When the
+linker sees the `PHDRS' command in the linker script, it will not
+create any program headers other than the ones specified.
+
+   The linker only pays attention to the `PHDRS' command when
+generating an ELF output file.  In other cases, the linker will simply
+ignore `PHDRS'.
+
+   This is the syntax of the `PHDRS' command.  The words `PHDRS',
+`FILEHDR', `AT', and `FLAGS' are keywords.
+
+     PHDRS
+     {
+       NAME TYPE [ FILEHDR ] [ PHDRS ] [ AT ( ADDRESS ) ]
+             [ FLAGS ( FLAGS ) ] ;
+     }
+
+   The NAME is used only for reference in the `SECTIONS' command of the
+linker script.  It is not put into the output file.  Program header
+names are stored in a separate name space, and will not conflict with
+symbol names, file names, or section names.  Each program header must
+have a distinct name.
+
+   Certain program header types describe segments of memory which the
+system loader will load from the file.  In the linker script, you
+specify the contents of these segments by placing allocatable output
+sections in the segments.  You use the `:PHDR' output section attribute
+to place a section in a particular segment.  *Note Output Section
+Phdr::.
+
+   It is normal to put certain sections in more than one segment.  This
+merely implies that one segment of memory contains another.  You may
+repeat `:PHDR', using it once for each segment which should contain the
+section.
+
+   If you place a section in one or more segments using `:PHDR', then
+the linker will place all subsequent allocatable sections which do not
+specify `:PHDR' in the same segments.  This is for convenience, since
+generally a whole set of contiguous sections will be placed in a single
+segment.  You can use `:NONE' to override the default segment and tell
+the linker to not put the section in any segment at all.
+
+   You may use the `FILEHDR' and `PHDRS' keywords appear after the
+program header type to further describe the contents of the segment.
+The `FILEHDR' keyword means that the segment should include the ELF
+file header.  The `PHDRS' keyword means that the segment should include
+the ELF program headers themselves.
+
+   The TYPE may be one of the following.  The numbers indicate the
+value of the keyword.
+
+`PT_NULL' (0)
+     Indicates an unused program header.
+
+`PT_LOAD' (1)
+     Indicates that this program header describes a segment to be
+     loaded from the file.
+
+`PT_DYNAMIC' (2)
+     Indicates a segment where dynamic linking information can be found.
+
+`PT_INTERP' (3)
+     Indicates a segment where the name of the program interpreter may
+     be found.
+
+`PT_NOTE' (4)
+     Indicates a segment holding note information.
+
+`PT_SHLIB' (5)
+     A reserved program header type, defined but not specified by the
+     ELF ABI.
+
+`PT_PHDR' (6)
+     Indicates a segment where the program headers may be found.
+
+EXPRESSION
+     An expression giving the numeric type of the program header.  This
+     may be used for types not defined above.
+
+   You can specify that a segment should be loaded at a particular
+address in memory by using an `AT' expression.  This is identical to the
+`AT' command used as an output section attribute (*note Output Section
+LMA::).  The `AT' command for a program header overrides the output
+section attribute.
+
+   The linker will normally set the segment flags based on the sections
+which comprise the segment.  You may use the `FLAGS' keyword to
+explicitly specify the segment flags.  The value of FLAGS must be an
+integer.  It is used to set the `p_flags' field of the program header.
+
+   Here is an example of `PHDRS'.  This shows a typical set of program
+headers used on a native ELF system.
+
+     PHDRS
+     {
+       headers PT_PHDR PHDRS ;
+       interp PT_INTERP ;
+       text PT_LOAD FILEHDR PHDRS ;
+       data PT_LOAD ;
+       dynamic PT_DYNAMIC ;
+     }
+
+     SECTIONS
+     {
+       . = SIZEOF_HEADERS;
+       .interp : { *(.interp) } :text :interp
+       .text : { *(.text) } :text
+       .rodata : { *(.rodata) } /* defaults to :text */
+       ...
+       . = . + 0x1000; /* move to a new page in memory */
+       .data : { *(.data) } :data
+       .dynamic : { *(.dynamic) } :data :dynamic
+       ...
+     }
+
+
+File: ld.info,  Node: VERSION,  Next: Expressions,  Prev: PHDRS,  Up: Scripts
+
+3.9 VERSION Command
+===================
+
+The linker supports symbol versions when using ELF.  Symbol versions are
+only useful when using shared libraries.  The dynamic linker can use
+symbol versions to select a specific version of a function when it runs
+a program that may have been linked against an earlier version of the
+shared library.
+
+   You can include a version script directly in the main linker script,
+or you can supply the version script as an implicit linker script.  You
+can also use the `--version-script' linker option.
+
+   The syntax of the `VERSION' command is simply
+     VERSION { version-script-commands }
+
+   The format of the version script commands is identical to that used
+by Sun's linker in Solaris 2.5.  The version script defines a tree of
+version nodes.  You specify the node names and interdependencies in the
+version script.  You can specify which symbols are bound to which
+version nodes, and you can reduce a specified set of symbols to local
+scope so that they are not globally visible outside of the shared
+library.
+
+   The easiest way to demonstrate the version script language is with a
+few examples.
+
+     VERS_1.1 {
+     	 global:
+     		 foo1;
+     	 local:
+     		 old*;
+     		 original*;
+     		 new*;
+     };
+
+     VERS_1.2 {
+     		 foo2;
+     } VERS_1.1;
+
+     VERS_2.0 {
+     		 bar1; bar2;
+     	 extern "C++" {
+     		 ns::*;
+     		 "int f(int, double)";
+              }
+     } VERS_1.2;
+
+   This example version script defines three version nodes.  The first
+version node defined is `VERS_1.1'; it has no other dependencies.  The
+script binds the symbol `foo1' to `VERS_1.1'.  It reduces a number of
+symbols to local scope so that they are not visible outside of the
+shared library; this is done using wildcard patterns, so that any
+symbol whose name begins with `old', `original', or `new' is matched.
+The wildcard patterns available are the same as those used in the shell
+when matching filenames (also known as "globbing").  However, if you
+specify the symbol name inside double quotes, then the name is treated
+as literal, rather than as a glob pattern.
+
+   Next, the version script defines node `VERS_1.2'.  This node depends
+upon `VERS_1.1'.  The script binds the symbol `foo2' to the version
+node `VERS_1.2'.
+
+   Finally, the version script defines node `VERS_2.0'.  This node
+depends upon `VERS_1.2'.  The scripts binds the symbols `bar1' and
+`bar2' are bound to the version node `VERS_2.0'.
+
+   When the linker finds a symbol defined in a library which is not
+specifically bound to a version node, it will effectively bind it to an
+unspecified base version of the library.  You can bind all otherwise
+unspecified symbols to a given version node by using `global: *;'
+somewhere in the version script.  Note that it's slightly crazy to use
+wildcards in a global spec except on the last version node.  Global
+wildcards elsewhere run the risk of accidentally adding symbols to the
+set exported for an old version.  That's wrong since older versions
+ought to have a fixed set of symbols.
+
+   The names of the version nodes have no specific meaning other than
+what they might suggest to the person reading them.  The `2.0' version
+could just as well have appeared in between `1.1' and `1.2'.  However,
+this would be a confusing way to write a version script.
+
+   Node name can be omitted, provided it is the only version node in
+the version script.  Such version script doesn't assign any versions to
+symbols, only selects which symbols will be globally visible out and
+which won't.
+
+     { global: foo; bar; local: *; };
+
+   When you link an application against a shared library that has
+versioned symbols, the application itself knows which version of each
+symbol it requires, and it also knows which version nodes it needs from
+each shared library it is linked against.  Thus at runtime, the dynamic
+loader can make a quick check to make sure that the libraries you have
+linked against do in fact supply all of the version nodes that the
+application will need to resolve all of the dynamic symbols.  In this
+way it is possible for the dynamic linker to know with certainty that
+all external symbols that it needs will be resolvable without having to
+search for each symbol reference.
+
+   The symbol versioning is in effect a much more sophisticated way of
+doing minor version checking that SunOS does.  The fundamental problem
+that is being addressed here is that typically references to external
+functions are bound on an as-needed basis, and are not all bound when
+the application starts up.  If a shared library is out of date, a
+required interface may be missing; when the application tries to use
+that interface, it may suddenly and unexpectedly fail.  With symbol
+versioning, the user will get a warning when they start their program if
+the libraries being used with the application are too old.
+
+   There are several GNU extensions to Sun's versioning approach.  The
+first of these is the ability to bind a symbol to a version node in the
+source file where the symbol is defined instead of in the versioning
+script.  This was done mainly to reduce the burden on the library
+maintainer.  You can do this by putting something like:
+     __asm__(".symver original_foo,foo@VERS_1.1");
+   in the C source file.  This renames the function `original_foo' to
+be an alias for `foo' bound to the version node `VERS_1.1'.  The
+`local:' directive can be used to prevent the symbol `original_foo'
+from being exported. A `.symver' directive takes precedence over a
+version script.
+
+   The second GNU extension is to allow multiple versions of the same
+function to appear in a given shared library.  In this way you can make
+an incompatible change to an interface without increasing the major
+version number of the shared library, while still allowing applications
+linked against the old interface to continue to function.
+
+   To do this, you must use multiple `.symver' directives in the source
+file.  Here is an example:
+
+     __asm__(".symver original_foo,foo@");
+     __asm__(".symver old_foo,foo@VERS_1.1");
+     __asm__(".symver old_foo1,foo@VERS_1.2");
+     __asm__(".symver new_foo,foo@@VERS_2.0");
+
+   In this example, `foo@' represents the symbol `foo' bound to the
+unspecified base version of the symbol.  The source file that contains
+this example would define 4 C functions: `original_foo', `old_foo',
+`old_foo1', and `new_foo'.
+
+   When you have multiple definitions of a given symbol, there needs to
+be some way to specify a default version to which external references to
+this symbol will be bound.  You can do this with the `foo@@VERS_2.0'
+type of `.symver' directive.  You can only declare one version of a
+symbol as the default in this manner; otherwise you would effectively
+have multiple definitions of the same symbol.
+
+   If you wish to bind a reference to a specific version of the symbol
+within the shared library, you can use the aliases of convenience
+(i.e., `old_foo'), or you can use the `.symver' directive to
+specifically bind to an external version of the function in question.
+
+   You can also specify the language in the version script:
+
+     VERSION extern "lang" { version-script-commands }
+
+   The supported `lang's are `C', `C++', and `Java'.  The linker will
+iterate over the list of symbols at the link time and demangle them
+according to `lang' before matching them to the patterns specified in
+`version-script-commands'.
+
+   Demangled names may contains spaces and other special characters.  As
+described above, you can use a glob pattern to match demangled names,
+or you can use a double-quoted string to match the string exactly.  In
+the latter case, be aware that minor differences (such as differing
+whitespace) between the version script and the demangler output will
+cause a mismatch.  As the exact string generated by the demangler might
+change in the future, even if the mangled name does not, you should
+check that all of your version directives are behaving as you expect
+when you upgrade.
+
+
+File: ld.info,  Node: Expressions,  Next: Implicit Linker Scripts,  Prev: VERSION,  Up: Scripts
+
+3.10 Expressions in Linker Scripts
+==================================
+
+The syntax for expressions in the linker script language is identical to
+that of C expressions.  All expressions are evaluated as integers.  All
+expressions are evaluated in the same size, which is 32 bits if both the
+host and target are 32 bits, and is otherwise 64 bits.
+
+   You can use and set symbol values in expressions.
+
+   The linker defines several special purpose builtin functions for use
+in expressions.
+
+* Menu:
+
+* Constants::			Constants
+* Symbolic Constants::          Symbolic constants
+* Symbols::			Symbol Names
+* Orphan Sections::		Orphan Sections
+* Location Counter::		The Location Counter
+* Operators::			Operators
+* Evaluation::			Evaluation
+* Expression Section::		The Section of an Expression
+* Builtin Functions::		Builtin Functions
+
+
+File: ld.info,  Node: Constants,  Next: Symbolic Constants,  Up: Expressions
+
+3.10.1 Constants
+----------------
+
+All constants are integers.
+
+   As in C, the linker considers an integer beginning with `0' to be
+octal, and an integer beginning with `0x' or `0X' to be hexadecimal.
+Alternatively the linker accepts suffixes of `h' or `H' for
+hexadeciaml, `o' or `O' for octal, `b' or `B' for binary and `d' or `D'
+for decimal.  Any integer value without a prefix or a suffix is
+considered to be decimal.
+
+   In addition, you can use the suffixes `K' and `M' to scale a
+constant by `1024' or `1024*1024' respectively.  For example, the
+following all refer to the same quantity:
+
+     _fourk_1 = 4K;
+     _fourk_2 = 4096;
+     _fourk_3 = 0x1000;
+     _fourk_4 = 10000o;
+
+   Note - the `K' and `M' suffixes cannot be used in conjunction with
+the base suffixes mentioned above.
+
+
+File: ld.info,  Node: Symbolic Constants,  Next: Symbols,  Prev: Constants,  Up: Expressions
+
+3.10.2 Symbolic Constants
+-------------------------
+
+It is possible to refer to target specific constants via the use of the
+`CONSTANT(NAME)' operator, where NAME is one of:
+
+`MAXPAGESIZE'
+     The target's maximum page size.
+
+`COMMONPAGESIZE'
+     The target's default page size.
+
+   So for example:
+
+       .text ALIGN (CONSTANT (MAXPAGESIZE)) : { *(.text) }
+
+   will create a text section aligned to the largest page boundary
+supported by the target.
+
+
+File: ld.info,  Node: Symbols,  Next: Orphan Sections,  Prev: Symbolic Constants,  Up: Expressions
+
+3.10.3 Symbol Names
+-------------------
+
+Unless quoted, symbol names start with a letter, underscore, or period
+and may include letters, digits, underscores, periods, and hyphens.
+Unquoted symbol names must not conflict with any keywords.  You can
+specify a symbol which contains odd characters or has the same name as a
+keyword by surrounding the symbol name in double quotes:
+     "SECTION" = 9;
+     "with a space" = "also with a space" + 10;
+
+   Since symbols can contain many non-alphabetic characters, it is
+safest to delimit symbols with spaces.  For example, `A-B' is one
+symbol, whereas `A - B' is an expression involving subtraction.
+
+
+File: ld.info,  Node: Orphan Sections,  Next: Location Counter,  Prev: Symbols,  Up: Expressions
+
+3.10.4 Orphan Sections
+----------------------
+
+Orphan sections are sections present in the input files which are not
+explicitly placed into the output file by the linker script.  The
+linker will still copy these sections into the output file, but it has
+to guess as to where they should be placed.  The linker uses a simple
+heuristic to do this.  It attempts to place orphan sections after
+non-orphan sections of the same attribute, such as code vs data,
+loadable vs non-loadable, etc.  If there is not enough room to do this
+then it places at the end of the file.
+
+   For ELF targets, the attribute of the section includes section type
+as well as section flag.
+
+   If an orphaned section's name is representable as a C identifier then
+the linker will automatically *note PROVIDE:: two symbols:
+__start_SECNAME and __end_SECNAME, where SECNAME is the name of the
+section.  These indicate the start address and end address of the
+orphaned section respectively.  Note: most section names are not
+representable as C identifiers because they contain a `.' character.
+
+
+File: ld.info,  Node: Location Counter,  Next: Operators,  Prev: Orphan Sections,  Up: Expressions
+
+3.10.5 The Location Counter
+---------------------------
+
+The special linker variable "dot" `.' always contains the current
+output location counter.  Since the `.' always refers to a location in
+an output section, it may only appear in an expression within a
+`SECTIONS' command.  The `.' symbol may appear anywhere that an
+ordinary symbol is allowed in an expression.
+
+   Assigning a value to `.' will cause the location counter to be
+moved.  This may be used to create holes in the output section.  The
+location counter may not be moved backwards inside an output section,
+and may not be moved backwards outside of an output section if so doing
+creates areas with overlapping LMAs.
+
+     SECTIONS
+     {
+       output :
+         {
+           file1(.text)
+           . = . + 1000;
+           file2(.text)
+           . += 1000;
+           file3(.text)
+         } = 0x12345678;
+     }
+   In the previous example, the `.text' section from `file1' is located
+at the beginning of the output section `output'.  It is followed by a
+1000 byte gap.  Then the `.text' section from `file2' appears, also
+with a 1000 byte gap following before the `.text' section from `file3'.
+The notation `= 0x12345678' specifies what data to write in the gaps
+(*note Output Section Fill::).
+
+   Note: `.' actually refers to the byte offset from the start of the
+current containing object.  Normally this is the `SECTIONS' statement,
+whose start address is 0, hence `.' can be used as an absolute address.
+If `.' is used inside a section description however, it refers to the
+byte offset from the start of that section, not an absolute address.
+Thus in a script like this:
+
+     SECTIONS
+     {
+         . = 0x100
+         .text: {
+           *(.text)
+           . = 0x200
+         }
+         . = 0x500
+         .data: {
+           *(.data)
+           . += 0x600
+         }
+     }
+
+   The `.text' section will be assigned a starting address of 0x100 and
+a size of exactly 0x200 bytes, even if there is not enough data in the
+`.text' input sections to fill this area.  (If there is too much data,
+an error will be produced because this would be an attempt to move `.'
+backwards).  The `.data' section will start at 0x500 and it will have
+an extra 0x600 bytes worth of space after the end of the values from
+the `.data' input sections and before the end of the `.data' output
+section itself.
+
+   Setting symbols to the value of the location counter outside of an
+output section statement can result in unexpected values if the linker
+needs to place orphan sections.  For example, given the following:
+
+     SECTIONS
+     {
+         start_of_text = . ;
+         .text: { *(.text) }
+         end_of_text = . ;
+
+         start_of_data = . ;
+         .data: { *(.data) }
+         end_of_data = . ;
+     }
+
+   If the linker needs to place some input section, e.g. `.rodata', not
+mentioned in the script, it might choose to place that section between
+`.text' and `.data'.  You might think the linker should place `.rodata'
+on the blank line in the above script, but blank lines are of no
+particular significance to the linker.  As well, the linker doesn't
+associate the above symbol names with their sections.  Instead, it
+assumes that all assignments or other statements belong to the previous
+output section, except for the special case of an assignment to `.'.
+I.e., the linker will place the orphan `.rodata' section as if the
+script was written as follows:
+
+     SECTIONS
+     {
+         start_of_text = . ;
+         .text: { *(.text) }
+         end_of_text = . ;
+
+         start_of_data = . ;
+         .rodata: { *(.rodata) }
+         .data: { *(.data) }
+         end_of_data = . ;
+     }
+
+   This may or may not be the script author's intention for the value of
+`start_of_data'.  One way to influence the orphan section placement is
+to assign the location counter to itself, as the linker assumes that an
+assignment to `.' is setting the start address of a following output
+section and thus should be grouped with that section.  So you could
+write:
+
+     SECTIONS
+     {
+         start_of_text = . ;
+         .text: { *(.text) }
+         end_of_text = . ;
+
+         . = . ;
+         start_of_data = . ;
+         .data: { *(.data) }
+         end_of_data = . ;
+     }
+
+   Now, the orphan `.rodata' section will be placed between
+`end_of_text' and `start_of_data'.
+
+
+File: ld.info,  Node: Operators,  Next: Evaluation,  Prev: Location Counter,  Up: Expressions
+
+3.10.6 Operators
+----------------
+
+The linker recognizes the standard C set of arithmetic operators, with
+the standard bindings and precedence levels:
+     precedence      associativity   Operators                Notes
+     (highest)
+     1               left            !  -  ~                  (1)
+     2               left            *  /  %
+     3               left            +  -
+     4               left            >>  <<
+     5               left            ==  !=  >  <  <=  >=
+     6               left            &
+     7               left            |
+     8               left            &&
+     9               left            ||
+     10              right           ? :
+     11              right           &=  +=  -=  *=  /=       (2)
+     (lowest)
+   Notes: (1) Prefix operators (2) *Note Assignments::.
+
+
+File: ld.info,  Node: Evaluation,  Next: Expression Section,  Prev: Operators,  Up: Expressions
+
+3.10.7 Evaluation
+-----------------
+
+The linker evaluates expressions lazily.  It only computes the value of
+an expression when absolutely necessary.
+
+   The linker needs some information, such as the value of the start
+address of the first section, and the origins and lengths of memory
+regions, in order to do any linking at all.  These values are computed
+as soon as possible when the linker reads in the linker script.
+
+   However, other values (such as symbol values) are not known or needed
+until after storage allocation.  Such values are evaluated later, when
+other information (such as the sizes of output sections) is available
+for use in the symbol assignment expression.
+
+   The sizes of sections cannot be known until after allocation, so
+assignments dependent upon these are not performed until after
+allocation.
+
+   Some expressions, such as those depending upon the location counter
+`.', must be evaluated during section allocation.
+
+   If the result of an expression is required, but the value is not
+available, then an error results.  For example, a script like the
+following
+     SECTIONS
+       {
+         .text 9+this_isnt_constant :
+           { *(.text) }
+       }
+will cause the error message `non constant expression for initial
+address'.
+
+
+File: ld.info,  Node: Expression Section,  Next: Builtin Functions,  Prev: Evaluation,  Up: Expressions
+
+3.10.8 The Section of an Expression
+-----------------------------------
+
+When the linker evaluates an expression, the result is either absolute
+or relative to some section.  A relative expression is expressed as a
+fixed offset from the base of a section.
+
+   The position of the expression within the linker script determines
+whether it is absolute or relative.  An expression which appears within
+an output section definition is relative to the base of the output
+section.  An expression which appears elsewhere will be absolute.
+
+   A symbol set to a relative expression will be relocatable if you
+request relocatable output using the `-r' option.  That means that a
+further link operation may change the value of the symbol.  The symbol's
+section will be the section of the relative expression.
+
+   A symbol set to an absolute expression will retain the same value
+through any further link operation.  The symbol will be absolute, and
+will not have any particular associated section.
+
+   You can use the builtin function `ABSOLUTE' to force an expression
+to be absolute when it would otherwise be relative.  For example, to
+create an absolute symbol set to the address of the end of the output
+section `.data':
+     SECTIONS
+       {
+         .data : { *(.data) _edata = ABSOLUTE(.); }
+       }
+   If `ABSOLUTE' were not used, `_edata' would be relative to the
+`.data' section.
+
+
+File: ld.info,  Node: Builtin Functions,  Prev: Expression Section,  Up: Expressions
+
+3.10.9 Builtin Functions
+------------------------
+
+The linker script language includes a number of builtin functions for
+use in linker script expressions.
+
+`ABSOLUTE(EXP)'
+     Return the absolute (non-relocatable, as opposed to non-negative)
+     value of the expression EXP.  Primarily useful to assign an
+     absolute value to a symbol within a section definition, where
+     symbol values are normally section relative.  *Note Expression
+     Section::.
+
+`ADDR(SECTION)'
+     Return the absolute address (the VMA) of the named SECTION.  Your
+     script must previously have defined the location of that section.
+     In the following example, `symbol_1' and `symbol_2' are assigned
+     identical values:
+          SECTIONS { ...
+            .output1 :
+              {
+              start_of_output_1 = ABSOLUTE(.);
+              ...
+              }
+            .output :
+              {
+              symbol_1 = ADDR(.output1);
+              symbol_2 = start_of_output_1;
+              }
+          ... }
+
+`ALIGN(ALIGN)'
+`ALIGN(EXP,ALIGN)'
+     Return the location counter (`.') or arbitrary expression aligned
+     to the next ALIGN boundary.  The single operand `ALIGN' doesn't
+     change the value of the location counter--it just does arithmetic
+     on it.  The two operand `ALIGN' allows an arbitrary expression to
+     be aligned upwards (`ALIGN(ALIGN)' is equivalent to `ALIGN(.,
+     ALIGN)').
+
+     Here is an example which aligns the output `.data' section to the
+     next `0x2000' byte boundary after the preceding section and sets a
+     variable within the section to the next `0x8000' boundary after the
+     input sections:
+          SECTIONS { ...
+            .data ALIGN(0x2000): {
+              *(.data)
+              variable = ALIGN(0x8000);
+            }
+          ... }
+     The first use of `ALIGN' in this example specifies the location of
+     a section because it is used as the optional ADDRESS attribute of
+     a section definition (*note Output Section Address::).  The second
+     use of `ALIGN' is used to defines the value of a symbol.
+
+     The builtin function `NEXT' is closely related to `ALIGN'.
+
+`ALIGNOF(SECTION)'
+     Return the alignment in bytes of the named SECTION, if that
+     section has been allocated.  If the section has not been allocated
+     when this is evaluated, the linker will report an error. In the
+     following example, the alignment of the `.output' section is
+     stored as the first value in that section.
+          SECTIONS{ ...
+            .output {
+              LONG (ALIGNOF (.output))
+              ...
+              }
+          ... }
+
+`BLOCK(EXP)'
+     This is a synonym for `ALIGN', for compatibility with older linker
+     scripts.  It is most often seen when setting the address of an
+     output section.
+
+`DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE)'
+     This is equivalent to either
+          (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - 1)))
+     or
+          (ALIGN(MAXPAGESIZE) + (. & (MAXPAGESIZE - COMMONPAGESIZE)))
+     depending on whether the latter uses fewer COMMONPAGESIZE sized
+     pages for the data segment (area between the result of this
+     expression and `DATA_SEGMENT_END') than the former or not.  If the
+     latter form is used, it means COMMONPAGESIZE bytes of runtime
+     memory will be saved at the expense of up to COMMONPAGESIZE wasted
+     bytes in the on-disk file.
+
+     This expression can only be used directly in `SECTIONS' commands,
+     not in any output section descriptions and only once in the linker
+     script.  COMMONPAGESIZE should be less or equal to MAXPAGESIZE and
+     should be the system page size the object wants to be optimized
+     for (while still working on system page sizes up to MAXPAGESIZE).
+
+     Example:
+            . = DATA_SEGMENT_ALIGN(0x10000, 0x2000);
+
+`DATA_SEGMENT_END(EXP)'
+     This defines the end of data segment for `DATA_SEGMENT_ALIGN'
+     evaluation purposes.
+
+            . = DATA_SEGMENT_END(.);
+
+`DATA_SEGMENT_RELRO_END(OFFSET, EXP)'
+     This defines the end of the `PT_GNU_RELRO' segment when `-z relro'
+     option is used.  Second argument is returned.  When `-z relro'
+     option is not present, `DATA_SEGMENT_RELRO_END' does nothing,
+     otherwise `DATA_SEGMENT_ALIGN' is padded so that EXP + OFFSET is
+     aligned to the most commonly used page boundary for particular
+     target.  If present in the linker script, it must always come in
+     between `DATA_SEGMENT_ALIGN' and `DATA_SEGMENT_END'.
+
+            . = DATA_SEGMENT_RELRO_END(24, .);
+
+`DEFINED(SYMBOL)'
+     Return 1 if SYMBOL is in the linker global symbol table and is
+     defined before the statement using DEFINED in the script, otherwise
+     return 0.  You can use this function to provide default values for
+     symbols.  For example, the following script fragment shows how to
+     set a global symbol `begin' to the first location in the `.text'
+     section--but if a symbol called `begin' already existed, its value
+     is preserved:
+
+          SECTIONS { ...
+            .text : {
+              begin = DEFINED(begin) ? begin : . ;
+              ...
+            }
+            ...
+          }
+
+`LENGTH(MEMORY)'
+     Return the length of the memory region named MEMORY.
+
+`LOADADDR(SECTION)'
+     Return the absolute LMA of the named SECTION.  This is normally
+     the same as `ADDR', but it may be different if the `AT' attribute
+     is used in the output section definition (*note Output Section
+     LMA::).
+
+`MAX(EXP1, EXP2)'
+     Returns the maximum of EXP1 and EXP2.
+
+`MIN(EXP1, EXP2)'
+     Returns the minimum of EXP1 and EXP2.
+
+`NEXT(EXP)'
+     Return the next unallocated address that is a multiple of EXP.
+     This function is closely related to `ALIGN(EXP)'; unless you use
+     the `MEMORY' command to define discontinuous memory for the output
+     file, the two functions are equivalent.
+
+`ORIGIN(MEMORY)'
+     Return the origin of the memory region named MEMORY.
+
+`SEGMENT_START(SEGMENT, DEFAULT)'
+     Return the base address of the named SEGMENT.  If an explicit
+     value has been given for this segment (with a command-line `-T'
+     option) that value will be returned; otherwise the value will be
+     DEFAULT.  At present, the `-T' command-line option can only be
+     used to set the base address for the "text", "data", and "bss"
+     sections, but you use `SEGMENT_START' with any segment name.
+
+`SIZEOF(SECTION)'
+     Return the size in bytes of the named SECTION, if that section has
+     been allocated.  If the section has not been allocated when this is
+     evaluated, the linker will report an error.  In the following
+     example, `symbol_1' and `symbol_2' are assigned identical values:
+          SECTIONS{ ...
+            .output {
+              .start = . ;
+              ...
+              .end = . ;
+              }
+            symbol_1 = .end - .start ;
+            symbol_2 = SIZEOF(.output);
+          ... }
+
+`SIZEOF_HEADERS'
+`sizeof_headers'
+     Return the size in bytes of the output file's headers.  This is
+     information which appears at the start of the output file.  You
+     can use this number when setting the start address of the first
+     section, if you choose, to facilitate paging.
+
+     When producing an ELF output file, if the linker script uses the
+     `SIZEOF_HEADERS' builtin function, the linker must compute the
+     number of program headers before it has determined all the section
+     addresses and sizes.  If the linker later discovers that it needs
+     additional program headers, it will report an error `not enough
+     room for program headers'.  To avoid this error, you must avoid
+     using the `SIZEOF_HEADERS' function, or you must rework your linker
+     script to avoid forcing the linker to use additional program
+     headers, or you must define the program headers yourself using the
+     `PHDRS' command (*note PHDRS::).
+
+
+File: ld.info,  Node: Implicit Linker Scripts,  Prev: Expressions,  Up: Scripts
+
+3.11 Implicit Linker Scripts
+============================
+
+If you specify a linker input file which the linker can not recognize as
+an object file or an archive file, it will try to read the file as a
+linker script.  If the file can not be parsed as a linker script, the
+linker will report an error.
+
+   An implicit linker script will not replace the default linker script.
+
+   Typically an implicit linker script would contain only symbol
+assignments, or the `INPUT', `GROUP', or `VERSION' commands.
+
+   Any input files read because of an implicit linker script will be
+read at the position in the command line where the implicit linker
+script was read.  This can affect archive searching.
+
+
+File: ld.info,  Node: Machine Dependent,  Next: BFD,  Prev: Scripts,  Up: Top
+
+4 Machine Dependent Features
+****************************
+
+`ld' has additional features on some platforms; the following sections
+describe them.  Machines where `ld' has no additional functionality are
+not listed.
+
+* Menu:
+
+
+* H8/300::                      `ld' and the H8/300
+
+* i960::                        `ld' and the Intel 960 family
+
+* ARM::				`ld' and the ARM family
+
+* HPPA ELF32::                  `ld' and HPPA 32-bit ELF
+
+* M68K::			`ld' and the Motorola 68K family
+
+* MMIX::			`ld' and MMIX
+
+* MSP430::			`ld' and MSP430
+
+* M68HC11/68HC12::		`ld' and the Motorola 68HC11 and 68HC12 families
+
+* PowerPC ELF32::		`ld' and PowerPC 32-bit ELF Support
+
+* PowerPC64 ELF64::		`ld' and PowerPC64 64-bit ELF Support
+
+* SPU ELF::			`ld' and SPU ELF Support
+
+* TI COFF::                     `ld' and TI COFF
+
+* WIN32::                       `ld' and WIN32 (cygwin/mingw)
+
+* Xtensa::                      `ld' and Xtensa Processors
+
+
+File: ld.info,  Node: H8/300,  Next: i960,  Up: Machine Dependent
+
+4.1 `ld' and the H8/300
+=======================
+
+For the H8/300, `ld' can perform these global optimizations when you
+specify the `--relax' command-line option.
+
+_relaxing address modes_
+     `ld' finds all `jsr' and `jmp' instructions whose targets are
+     within eight bits, and turns them into eight-bit program-counter
+     relative `bsr' and `bra' instructions, respectively.
+
+_synthesizing instructions_
+     `ld' finds all `mov.b' instructions which use the sixteen-bit
+     absolute address form, but refer to the top page of memory, and
+     changes them to use the eight-bit address form.  (That is: the
+     linker turns `mov.b `@'AA:16' into `mov.b `@'AA:8' whenever the
+     address AA is in the top page of memory).
+
+_bit manipulation instructions_
+     `ld' finds all bit manipulation instructions like `band, bclr,
+     biand, bild, bior, bist, bixor, bld, bnot, bor, bset, bst, btst,
+     bxor' which use 32 bit and 16 bit absolute address form, but refer
+     to the top page of memory, and changes them to use the 8 bit
+     address form.  (That is: the linker turns `bset #xx:3,`@'AA:32'
+     into `bset #xx:3,`@'AA:8' whenever the address AA is in the top
+     page of memory).
+
+_system control instructions_
+     `ld' finds all `ldc.w, stc.w' instructions which use the 32 bit
+     absolute address form, but refer to the top page of memory, and
+     changes them to use 16 bit address form.  (That is: the linker
+     turns `ldc.w `@'AA:32,ccr' into `ldc.w `@'AA:16,ccr' whenever the
+     address AA is in the top page of memory).
+
+
+File: ld.info,  Node: i960,  Next: ARM,  Prev: H8/300,  Up: Machine Dependent
+
+4.2 `ld' and the Intel 960 Family
+=================================
+
+You can use the `-AARCHITECTURE' command line option to specify one of
+the two-letter names identifying members of the 960 family; the option
+specifies the desired output target, and warns of any incompatible
+instructions in the input files.  It also modifies the linker's search
+strategy for archive libraries, to support the use of libraries
+specific to each particular architecture, by including in the search
+loop names suffixed with the string identifying the architecture.
+
+   For example, if your `ld' command line included `-ACA' as well as
+`-ltry', the linker would look (in its built-in search paths, and in
+any paths you specify with `-L') for a library with the names
+
+     try
+     libtry.a
+     tryca
+     libtryca.a
+
+The first two possibilities would be considered in any event; the last
+two are due to the use of `-ACA'.
+
+   You can meaningfully use `-A' more than once on a command line, since
+the 960 architecture family allows combination of target architectures;
+each use will add another pair of name variants to search for when `-l'
+specifies a library.
+
+   `ld' supports the `--relax' option for the i960 family.  If you
+specify `--relax', `ld' finds all `balx' and `calx' instructions whose
+targets are within 24 bits, and turns them into 24-bit program-counter
+relative `bal' and `cal' instructions, respectively.  `ld' also turns
+`cal' instructions into `bal' instructions when it determines that the
+target subroutine is a leaf routine (that is, the target subroutine does
+not itself call any subroutines).
+
+   The `--fix-cortex-a8' switch enables a link-time workaround for an
+erratum in certain Cortex-A8 processors.  The workaround is enabled by
+default if you are targeting the ARM v7-A architecture profile.  It can
+be enabled otherwise by specifying `--fix-cortex-a8', or disabled
+unconditionally by specifying `--no-fix-cortex-a8'.
+
+   The erratum only affects Thumb-2 code.  Please contact ARM for
+further details.
+
+
+File: ld.info,  Node: M68HC11/68HC12,  Next: PowerPC ELF32,  Prev: MSP430,  Up: Machine Dependent
+
+4.3 `ld' and the Motorola 68HC11 and 68HC12 families
+====================================================
+
+4.3.1 Linker Relaxation
+-----------------------
+
+For the Motorola 68HC11, `ld' can perform these global optimizations
+when you specify the `--relax' command-line option.
+
+_relaxing address modes_
+     `ld' finds all `jsr' and `jmp' instructions whose targets are
+     within eight bits, and turns them into eight-bit program-counter
+     relative `bsr' and `bra' instructions, respectively.
+
+     `ld' also looks at all 16-bit extended addressing modes and
+     transforms them in a direct addressing mode when the address is in
+     page 0 (between 0 and 0x0ff).
+
+_relaxing gcc instruction group_
+     When `gcc' is called with `-mrelax', it can emit group of
+     instructions that the linker can optimize to use a 68HC11 direct
+     addressing mode. These instructions consists of `bclr' or `bset'
+     instructions.
+
+
+4.3.2 Trampoline Generation
+---------------------------
+
+For 68HC11 and 68HC12, `ld' can generate trampoline code to call a far
+function using a normal `jsr' instruction. The linker will also change
+the relocation to some far function to use the trampoline address
+instead of the function address. This is typically the case when a
+pointer to a function is taken. The pointer will in fact point to the
+function trampoline.
+
+
+File: ld.info,  Node: ARM,  Next: HPPA ELF32,  Prev: i960,  Up: Machine Dependent
+
+4.4 `ld' and the ARM family
+===========================
+
+For the ARM, `ld' will generate code stubs to allow functions calls
+between ARM and Thumb code.  These stubs only work with code that has
+been compiled and assembled with the `-mthumb-interwork' command line
+option.  If it is necessary to link with old ARM object files or
+libraries, which have not been compiled with the -mthumb-interwork
+option then the `--support-old-code' command line switch should be
+given to the linker.  This will make it generate larger stub functions
+which will work with non-interworking aware ARM code.  Note, however,
+the linker does not support generating stubs for function calls to
+non-interworking aware Thumb code.
+
+   The `--thumb-entry' switch is a duplicate of the generic `--entry'
+switch, in that it sets the program's starting address.  But it also
+sets the bottom bit of the address, so that it can be branched to using
+a BX instruction, and the program will start executing in Thumb mode
+straight away.
+
+   The `--use-nul-prefixed-import-tables' switch is specifying, that
+the import tables idata4 and idata5 have to be generated with a zero
+elememt prefix for import libraries. This is the old style to generate
+import tables. By default this option is turned off.
+
+   The `--be8' switch instructs `ld' to generate BE8 format
+executables.  This option is only valid when linking big-endian objects.
+The resulting image will contain big-endian data and little-endian code.
+
+   The `R_ARM_TARGET1' relocation is typically used for entries in the
+`.init_array' section.  It is interpreted as either `R_ARM_REL32' or
+`R_ARM_ABS32', depending on the target.  The `--target1-rel' and
+`--target1-abs' switches override the default.
+
+   The `--target2=type' switch overrides the default definition of the
+`R_ARM_TARGET2' relocation.  Valid values for `type', their meanings,
+and target defaults are as follows:
+`rel'
+     `R_ARM_REL32' (arm*-*-elf, arm*-*-eabi)
+
+`abs'
+     `R_ARM_ABS32' (arm*-*-symbianelf)
+
+`got-rel'
+     `R_ARM_GOT_PREL' (arm*-*-linux, arm*-*-*bsd)
+
+   The `R_ARM_V4BX' relocation (defined by the ARM AAELF specification)
+enables objects compiled for the ARMv4 architecture to be
+interworking-safe when linked with other objects compiled for ARMv4t,
+but also allows pure ARMv4 binaries to be built from the same ARMv4
+objects.
+
+   In the latter case, the switch `--fix-v4bx' must be passed to the
+linker, which causes v4t `BX rM' instructions to be rewritten as `MOV
+PC,rM', since v4 processors do not have a `BX' instruction.
+
+   In the former case, the switch should not be used, and `R_ARM_V4BX'
+relocations are ignored.
+
+   Replace `BX rM' instructions identified by `R_ARM_V4BX' relocations
+with a branch to the following veneer:
+
+     TST rM, #1
+     MOVEQ PC, rM
+     BX Rn
+
+   This allows generation of libraries/applications that work on ARMv4
+cores and are still interworking safe.  Note that the above veneer
+clobbers the condition flags, so may cause incorrect progrm behavior in
+rare cases.
+
+   The `--use-blx' switch enables the linker to use ARM/Thumb BLX
+instructions (available on ARMv5t and above) in various situations.
+Currently it is used to perform calls via the PLT from Thumb code using
+BLX rather than using BX and a mode-switching stub before each PLT
+entry. This should lead to such calls executing slightly faster.
+
+   This option is enabled implicitly for SymbianOS, so there is no need
+to specify it if you are using that target.
+
+   The `--vfp11-denorm-fix' switch enables a link-time workaround for a
+bug in certain VFP11 coprocessor hardware, which sometimes allows
+instructions with denorm operands (which must be handled by support
+code) to have those operands overwritten by subsequent instructions
+before the support code can read the intended values.
+
+   The bug may be avoided in scalar mode if you allow at least one
+intervening instruction between a VFP11 instruction which uses a
+register and another instruction which writes to the same register, or
+at least two intervening instructions if vector mode is in use. The bug
+only affects full-compliance floating-point mode: you do not need this
+workaround if you are using "runfast" mode. Please contact ARM for
+further details.
+
+   If you know you are using buggy VFP11 hardware, you can enable this
+workaround by specifying the linker option `--vfp-denorm-fix=scalar' if
+you are using the VFP11 scalar mode only, or `--vfp-denorm-fix=vector'
+if you are using vector mode (the latter also works for scalar code).
+The default is `--vfp-denorm-fix=none'.
+
+   If the workaround is enabled, instructions are scanned for
+potentially-troublesome sequences, and a veneer is created for each
+such sequence which may trigger the erratum. The veneer consists of the
+first instruction of the sequence and a branch back to the subsequent
+instruction. The original instruction is then replaced with a branch to
+the veneer. The extra cycles required to call and return from the veneer
+are sufficient to avoid the erratum in both the scalar and vector cases.
+
+   The `--no-enum-size-warning' switch prevents the linker from warning
+when linking object files that specify incompatible EABI enumeration
+size attributes.  For example, with this switch enabled, linking of an
+object file using 32-bit enumeration values with another using
+enumeration values fitted into the smallest possible space will not be
+diagnosed.
+
+   The `--no-wchar-size-warning' switch prevents the linker from
+warning when linking object files that specify incompatible EABI
+`wchar_t' size attributes.  For example, with this switch enabled,
+linking of an object file using 32-bit `wchar_t' values with another
+using 16-bit `wchar_t' values will not be diagnosed.
+
+   The `--pic-veneer' switch makes the linker use PIC sequences for
+ARM/Thumb interworking veneers, even if the rest of the binary is not
+PIC.  This avoids problems on uClinux targets where `--emit-relocs' is
+used to generate relocatable binaries.
+
+   The linker will automatically generate and insert small sequences of
+code into a linked ARM ELF executable whenever an attempt is made to
+perform a function call to a symbol that is too far away.  The
+placement of these sequences of instructions - called stubs - is
+controlled by the command line option `--stub-group-size=N'.  The
+placement is important because a poor choice can create a need for
+duplicate stubs, increasing the code sizw.  The linker will try to
+group stubs together in order to reduce interruptions to the flow of
+code, but it needs guidance as to how big these groups should be and
+where they should be placed.
+
+   The value of `N', the parameter to the `--stub-group-size=' option
+controls where the stub groups are placed.  If it is negative then all
+stubs are placed after the first branch that needs them.  If it is
+positive then the stubs can be placed either before or after the
+branches that need them.  If the value of `N' is 1 (either +1 or -1)
+then the linker will choose exactly where to place groups of stubs,
+using its built in heuristics.  A value of `N' greater than 1 (or
+smaller than -1) tells the linker that a single group of stubs can
+service at most `N' bytes from the input sections.
+
+   The default, if `--stub-group-size=' is not specified, is `N = +1'.
+
+   Farcalls stubs insertion is fully supported for the ARM-EABI target
+only, because it relies on object files properties not present
+otherwise.
+
+
+File: ld.info,  Node: HPPA ELF32,  Next: M68K,  Prev: ARM,  Up: Machine Dependent
+
+4.5 `ld' and HPPA 32-bit ELF Support
+====================================
+
+When generating a shared library, `ld' will by default generate import
+stubs suitable for use with a single sub-space application.  The
+`--multi-subspace' switch causes `ld' to generate export stubs, and
+different (larger) import stubs suitable for use with multiple
+sub-spaces.
+
+   Long branch stubs and import/export stubs are placed by `ld' in stub
+sections located between groups of input sections.  `--stub-group-size'
+specifies the maximum size of a group of input sections handled by one
+stub section.  Since branch offsets are signed, a stub section may
+serve two groups of input sections, one group before the stub section,
+and one group after it.  However, when using conditional branches that
+require stubs, it may be better (for branch prediction) that stub
+sections only serve one group of input sections.  A negative value for
+`N' chooses this scheme, ensuring that branches to stubs always use a
+negative offset.  Two special values of `N' are recognized, `1' and
+`-1'.  These both instruct `ld' to automatically size input section
+groups for the branch types detected, with the same behaviour regarding
+stub placement as other positive or negative values of `N' respectively.
+
+   Note that `--stub-group-size' does not split input sections.  A
+single input section larger than the group size specified will of course
+create a larger group (of one section).  If input sections are too
+large, it may not be possible for a branch to reach its stub.
+
+
+File: ld.info,  Node: M68K,  Next: MMIX,  Prev: HPPA ELF32,  Up: Machine Dependent
+
+4.6 `ld' and the Motorola 68K family
+====================================
+
+The `--got=TYPE' option lets you choose the GOT generation scheme.  The
+choices are `single', `negative', `multigot' and `target'.  When
+`target' is selected the linker chooses the default GOT generation
+scheme for the current target.  `single' tells the linker to generate a
+single GOT with entries only at non-negative offsets.  `negative'
+instructs the linker to generate a single GOT with entries at both
+negative and positive offsets.  Not all environments support such GOTs.
+`multigot' allows the linker to generate several GOTs in the output
+file.  All GOT references from a single input object file access the
+same GOT, but references from different input object files might access
+different GOTs.  Not all environments support such GOTs.
+
+
+File: ld.info,  Node: MMIX,  Next: MSP430,  Prev: M68K,  Up: Machine Dependent
+
+4.7 `ld' and MMIX
+=================
+
+For MMIX, there is a choice of generating `ELF' object files or `mmo'
+object files when linking.  The simulator `mmix' understands the `mmo'
+format.  The binutils `objcopy' utility can translate between the two
+formats.
+
+   There is one special section, the `.MMIX.reg_contents' section.
+Contents in this section is assumed to correspond to that of global
+registers, and symbols referring to it are translated to special
+symbols, equal to registers.  In a final link, the start address of the
+`.MMIX.reg_contents' section corresponds to the first allocated global
+register multiplied by 8.  Register `$255' is not included in this
+section; it is always set to the program entry, which is at the symbol
+`Main' for `mmo' files.
+
+   Global symbols with the prefix `__.MMIX.start.', for example
+`__.MMIX.start..text' and `__.MMIX.start..data' are special.  The
+default linker script uses these to set the default start address of a
+section.
+
+   Initial and trailing multiples of zero-valued 32-bit words in a
+section, are left out from an mmo file.
+
+
+File: ld.info,  Node: MSP430,  Next: M68HC11/68HC12,  Prev: MMIX,  Up: Machine Dependent
+
+4.8 `ld' and MSP430
+===================
+
+For the MSP430 it is possible to select the MPU architecture.  The flag
+`-m [mpu type]' will select an appropriate linker script for selected
+MPU type.  (To get a list of known MPUs just pass `-m help' option to
+the linker).
+
+   The linker will recognize some extra sections which are MSP430
+specific:
+
+``.vectors''
+     Defines a portion of ROM where interrupt vectors located.
+
+``.bootloader''
+     Defines the bootloader portion of the ROM (if applicable).  Any
+     code in this section will be uploaded to the MPU.
+
+``.infomem''
+     Defines an information memory section (if applicable).  Any code in
+     this section will be uploaded to the MPU.
+
+``.infomemnobits''
+     This is the same as the `.infomem' section except that any code in
+     this section will not be uploaded to the MPU.
+
+``.noinit''
+     Denotes a portion of RAM located above `.bss' section.
+
+     The last two sections are used by gcc.
+
+
+File: ld.info,  Node: PowerPC ELF32,  Next: PowerPC64 ELF64,  Prev: M68HC11/68HC12,  Up: Machine Dependent
+
+4.9 `ld' and PowerPC 32-bit ELF Support
+=======================================
+
+Branches on PowerPC processors are limited to a signed 26-bit
+displacement, which may result in `ld' giving `relocation truncated to
+fit' errors with very large programs.  `--relax' enables the generation
+of trampolines that can access the entire 32-bit address space.  These
+trampolines are inserted at section boundaries, so may not themselves
+be reachable if an input section exceeds 33M in size.  You may combine
+`-r' and `--relax' to add trampolines in a partial link.  In that case
+both branches to undefined symbols and inter-section branches are also
+considered potentially out of range, and trampolines inserted.
+
+`--bss-plt'
+     Current PowerPC GCC accepts a `-msecure-plt' option that generates
+     code capable of using a newer PLT and GOT layout that has the
+     security advantage of no executable section ever needing to be
+     writable and no writable section ever being executable.  PowerPC
+     `ld' will generate this layout, including stubs to access the PLT,
+     if all input files (including startup and static libraries) were
+     compiled with `-msecure-plt'.  `--bss-plt' forces the old BSS PLT
+     (and GOT layout) which can give slightly better performance.
+
+`--secure-plt'
+     `ld' will use the new PLT and GOT layout if it is linking new
+     `-fpic' or `-fPIC' code, but does not do so automatically when
+     linking non-PIC code.  This option requests the new PLT and GOT
+     layout.  A warning will be given if some object file requires the
+     old style BSS PLT.
+
+`--sdata-got'
+     The new secure PLT and GOT are placed differently relative to other
+     sections compared to older BSS PLT and GOT placement.  The
+     location of `.plt' must change because the new secure PLT is an
+     initialized section while the old PLT is uninitialized.  The
+     reason for the `.got' change is more subtle:  The new placement
+     allows `.got' to be read-only in applications linked with `-z
+     relro -z now'.  However, this placement means that `.sdata' cannot
+     always be used in shared libraries, because the PowerPC ABI
+     accesses `.sdata' in shared libraries from the GOT pointer.
+     `--sdata-got' forces the old GOT placement.  PowerPC GCC doesn't
+     use `.sdata' in shared libraries, so this option is really only
+     useful for other compilers that may do so.
+
+`--emit-stub-syms'
+     This option causes `ld' to label linker stubs with a local symbol
+     that encodes the stub type and destination.
+
+`--no-tls-optimize'
+     PowerPC `ld' normally performs some optimization of code sequences
+     used to access Thread-Local Storage.  Use this option to disable
+     the optimization.
+
+
+File: ld.info,  Node: PowerPC64 ELF64,  Next: SPU ELF,  Prev: PowerPC ELF32,  Up: Machine Dependent
+
+4.10 `ld' and PowerPC64 64-bit ELF Support
+==========================================
+
+`--stub-group-size'
+     Long branch stubs, PLT call stubs  and TOC adjusting stubs are
+     placed by `ld' in stub sections located between groups of input
+     sections.  `--stub-group-size' specifies the maximum size of a
+     group of input sections handled by one stub section.  Since branch
+     offsets are signed, a stub section may serve two groups of input
+     sections, one group before the stub section, and one group after
+     it.  However, when using conditional branches that require stubs,
+     it may be better (for branch prediction) that stub sections only
+     serve one group of input sections.  A negative value for `N'
+     chooses this scheme, ensuring that branches to stubs always use a
+     negative offset.  Two special values of `N' are recognized, `1'
+     and `-1'.  These both instruct `ld' to automatically size input
+     section groups for the branch types detected, with the same
+     behaviour regarding stub placement as other positive or negative
+     values of `N' respectively.
+
+     Note that `--stub-group-size' does not split input sections.  A
+     single input section larger than the group size specified will of
+     course create a larger group (of one section).  If input sections
+     are too large, it may not be possible for a branch to reach its
+     stub.
+
+`--emit-stub-syms'
+     This option causes `ld' to label linker stubs with a local symbol
+     that encodes the stub type and destination.
+
+`--dotsyms, --no-dotsyms'
+     These two options control how `ld' interprets version patterns in
+     a version script.  Older PowerPC64 compilers emitted both a
+     function descriptor symbol with the same name as the function, and
+     a code entry symbol with the name prefixed by a dot (`.').  To
+     properly version a function `foo', the version script thus needs
+     to control both `foo' and `.foo'.  The option `--dotsyms', on by
+     default, automatically adds the required dot-prefixed patterns.
+     Use `--no-dotsyms' to disable this feature.
+
+`--no-tls-optimize'
+     PowerPC64 `ld' normally performs some optimization of code
+     sequences used to access Thread-Local Storage.  Use this option to
+     disable the optimization.
+
+`--no-opd-optimize'
+     PowerPC64 `ld' normally removes `.opd' section entries
+     corresponding to deleted link-once functions, or functions removed
+     by the action of `--gc-sections' or linker script `/DISCARD/'.
+     Use this option to disable `.opd' optimization.
+
+`--non-overlapping-opd'
+     Some PowerPC64 compilers have an option to generate compressed
+     `.opd' entries spaced 16 bytes apart, overlapping the third word,
+     the static chain pointer (unused in C) with the first word of the
+     next entry.  This option expands such entries to the full 24 bytes.
+
+`--no-toc-optimize'
+     PowerPC64 `ld' normally removes unused `.toc' section entries.
+     Such entries are detected by examining relocations that reference
+     the TOC in code sections.  A reloc in a deleted code section marks
+     a TOC word as unneeded, while a reloc in a kept code section marks
+     a TOC word as needed.  Since the TOC may reference itself, TOC
+     relocs are also examined.  TOC words marked as both needed and
+     unneeded will of course be kept.  TOC words without any referencing
+     reloc are assumed to be part of a multi-word entry, and are kept or
+     discarded as per the nearest marked preceding word.  This works
+     reliably for compiler generated code, but may be incorrect if
+     assembly code is used to insert TOC entries.  Use this option to
+     disable the optimization.
+
+`--no-multi-toc'
+     By default, PowerPC64 GCC generates code for a TOC model where TOC
+     entries are accessed with a 16-bit offset from r2.  This limits the
+     total TOC size to 64K.  PowerPC64 `ld' extends this limit by
+     grouping code sections such that each group uses less than 64K for
+     its TOC entries, then inserts r2 adjusting stubs between
+     inter-group calls.  `ld' does not split apart input sections, so
+     cannot help if a single input file has a `.toc' section that
+     exceeds 64K, most likely from linking multiple files with `ld -r'.
+     Use this option to turn off this feature.
+
+
+File: ld.info,  Node: SPU ELF,  Next: TI COFF,  Prev: PowerPC64 ELF64,  Up: Machine Dependent
+
+4.11 `ld' and SPU ELF Support
+=============================
+
+`--plugin'
+     This option marks an executable as a PIC plugin module.
+
+`--no-overlays'
+     Normally, `ld' recognizes calls to functions within overlay
+     regions, and redirects such calls to an overlay manager via a stub.
+     `ld' also provides a built-in overlay manager.  This option turns
+     off all this special overlay handling.
+
+`--emit-stub-syms'
+     This option causes `ld' to label overlay stubs with a local symbol
+     that encodes the stub type and destination.
+
+`--extra-overlay-stubs'
+     This option causes `ld' to add overlay call stubs on all function
+     calls out of overlay regions.  Normally stubs are not added on
+     calls to non-overlay regions.
+
+`--local-store=lo:hi'
+     `ld' usually checks that a final executable for SPU fits in the
+     address range 0 to 256k.  This option may be used to change the
+     range.  Disable the check entirely with `--local-store=0:0'.
+
+`--stack-analysis'
+     SPU local store space is limited.  Over-allocation of stack space
+     unnecessarily limits space available for code and data, while
+     under-allocation results in runtime failures.  If given this
+     option, `ld' will provide an estimate of maximum stack usage.
+     `ld' does this by examining symbols in code sections to determine
+     the extents of functions, and looking at function prologues for
+     stack adjusting instructions.  A call-graph is created by looking
+     for relocations on branch instructions.  The graph is then searched
+     for the maximum stack usage path.  Note that this analysis does not
+     find calls made via function pointers, and does not handle
+     recursion and other cycles in the call graph.  Stack usage may be
+     under-estimated if your code makes such calls.  Also, stack usage
+     for dynamic allocation, e.g. alloca, will not be detected.  If a
+     link map is requested, detailed information about each function's
+     stack usage and calls will be given.
+
+`--emit-stack-syms'
+     This option, if given along with `--stack-analysis' will result in
+     `ld' emitting stack sizing symbols for each function.  These take
+     the form `__stack_<function_name>' for global functions, and
+     `__stack_<number>_<function_name>' for static functions.
+     `<number>' is the section id in hex.  The value of such symbols is
+     the stack requirement for the corresponding function.  The symbol
+     size will be zero, type `STT_NOTYPE', binding `STB_LOCAL', and
+     section `SHN_ABS'.
+
+
+File: ld.info,  Node: TI COFF,  Next: WIN32,  Prev: SPU ELF,  Up: Machine Dependent
+
+4.12 `ld''s Support for Various TI COFF Versions
+================================================
+
+The `--format' switch allows selection of one of the various TI COFF
+versions.  The latest of this writing is 2; versions 0 and 1 are also
+supported.  The TI COFF versions also vary in header byte-order format;
+`ld' will read any version or byte order, but the output header format
+depends on the default specified by the specific target.
+
+
+File: ld.info,  Node: WIN32,  Next: Xtensa,  Prev: TI COFF,  Up: Machine Dependent
+
+4.13 `ld' and WIN32 (cygwin/mingw)
+==================================
+
+This section describes some of the win32 specific `ld' issues.  See
+*note Command Line Options: Options. for detailed description of the
+command line options mentioned here.
+
+_import libraries_
+     The standard Windows linker creates and uses so-called import
+     libraries, which contains information for linking to dll's.  They
+     are regular static archives and are handled as any other static
+     archive.  The cygwin and mingw ports of `ld' have specific support
+     for creating such libraries provided with the `--out-implib'
+     command line option.
+
+_exporting DLL symbols_
+     The cygwin/mingw `ld' has several ways to export symbols for dll's.
+
+    _using auto-export functionality_
+          By default `ld' exports symbols with the auto-export
+          functionality, which is controlled by the following command
+          line options:
+
+             * -export-all-symbols   [This is the default]
+
+             * -exclude-symbols
+
+             * -exclude-libs
+
+             * -exclude-modules-for-implib
+
+             * -version-script
+
+          When auto-export is in operation, `ld' will export all the
+          non-local (global and common) symbols it finds in a DLL, with
+          the exception of a few symbols known to belong to the
+          system's runtime and libraries.  As it will often not be
+          desirable to export all of a DLL's symbols, which may include
+          private functions that are not part of any public interface,
+          the command-line options listed above may be used to filter
+          symbols out from the list for exporting.  The `--output-def'
+          option can be used in order to see the final list of exported
+          symbols with all exclusions taken into effect.
+
+          If `--export-all-symbols' is not given explicitly on the
+          command line, then the default auto-export behavior will be
+          _disabled_ if either of the following are true:
+
+             * A DEF file is used.
+
+             * Any symbol in any object file was marked with the
+               __declspec(dllexport) attribute.
+
+    _using a DEF file_
+          Another way of exporting symbols is using a DEF file.  A DEF
+          file is an ASCII file containing definitions of symbols which
+          should be exported when a dll is created.  Usually it is
+          named `<dll name>.def' and is added as any other object file
+          to the linker's command line.  The file's name must end in
+          `.def' or `.DEF'.
+
+               gcc -o <output> <objectfiles> <dll name>.def
+
+          Using a DEF file turns off the normal auto-export behavior,
+          unless the `--export-all-symbols' option is also used.
+
+          Here is an example of a DEF file for a shared library called
+          `xyz.dll':
+
+               LIBRARY "xyz.dll" BASE=0x20000000
+
+               EXPORTS
+               foo
+               bar
+               _bar = bar
+               another_foo = abc.dll.afoo
+               var1 DATA
+
+          This example defines a DLL with a non-default base address
+          and five symbols in the export table. The third exported
+          symbol `_bar' is an alias for the second. The fourth symbol,
+          `another_foo' is resolved by "forwarding" to another module
+          and treating it as an alias for `afoo' exported from the DLL
+          `abc.dll'. The final symbol `var1' is declared to be a data
+          object.
+
+          The optional `LIBRARY <name>' command indicates the _internal_
+          name of the output DLL. If `<name>' does not include a suffix,
+          the default library suffix, `.DLL' is appended.
+
+          When the .DEF file is used to build an application, rather
+          than a library, the `NAME <name>' command should be used
+          instead of `LIBRARY'. If `<name>' does not include a suffix,
+          the default executable suffix, `.EXE' is appended.
+
+          With either `LIBRARY <name>' or `NAME <name>' the optional
+          specification `BASE = <number>' may be used to specify a
+          non-default base address for the image.
+
+          If neither `LIBRARY <name>' nor  `NAME <name>' is specified,
+          or they specify an empty string, the internal name is the
+          same as the filename specified on the command line.
+
+          The complete specification of an export symbol is:
+
+               EXPORTS
+                 ( (  ( <name1> [ = <name2> ] )
+                    | ( <name1> = <module-name> . <external-name>))
+                 [ @ <integer> ] [NONAME] [DATA] [CONSTANT] [PRIVATE] ) *
+
+          Declares `<name1>' as an exported symbol from the DLL, or
+          declares `<name1>' as an exported alias for `<name2>'; or
+          declares `<name1>' as a "forward" alias for the symbol
+          `<external-name>' in the DLL `<module-name>'.  Optionally,
+          the symbol may be exported by the specified ordinal
+          `<integer>' alias.
+
+          The optional keywords that follow the declaration indicate:
+
+          `NONAME': Do not put the symbol name in the DLL's export
+          table.  It will still be exported by its ordinal alias
+          (either the value specified by the .def specification or,
+          otherwise, the value assigned by the linker). The symbol
+          name, however, does remain visible in the import library (if
+          any), unless `PRIVATE' is also specified.
+
+          `DATA': The symbol is a variable or object, rather than a
+          function.  The import lib will export only an indirect
+          reference to `foo' as the symbol `_imp__foo' (ie, `foo' must
+          be resolved as `*_imp__foo').
+
+          `CONSTANT': Like `DATA', but put the undecorated `foo' as
+          well as `_imp__foo' into the import library. Both refer to the
+          read-only import address table's pointer to the variable, not
+          to the variable itself. This can be dangerous. If the user
+          code fails to add the `dllimport' attribute and also fails to
+          explicitly add the extra indirection that the use of the
+          attribute enforces, the application will behave unexpectedly.
+
+          `PRIVATE': Put the symbol in the DLL's export table, but do
+          not put it into the static import library used to resolve
+          imports at link time. The symbol can still be imported using
+          the `LoadLibrary/GetProcAddress' API at runtime or by by
+          using the GNU ld extension of linking directly to the DLL
+          without an import library.
+
+          See ld/deffilep.y in the binutils sources for the full
+          specification of other DEF file statements
+
+          While linking a shared dll, `ld' is able to create a DEF file
+          with the `--output-def <file>' command line option.
+
+    _Using decorations_
+          Another way of marking symbols for export is to modify the
+          source code itself, so that when building the DLL each symbol
+          to be exported is declared as:
+
+               __declspec(dllexport) int a_variable
+               __declspec(dllexport) void a_function(int with_args)
+
+          All such symbols will be exported from the DLL.  If, however,
+          any of the object files in the DLL contain symbols decorated
+          in this way, then the normal auto-export behavior is
+          disabled, unless the `--export-all-symbols' option is also
+          used.
+
+          Note that object files that wish to access these symbols must
+          _not_ decorate them with dllexport.  Instead, they should use
+          dllimport, instead:
+
+               __declspec(dllimport) int a_variable
+               __declspec(dllimport) void a_function(int with_args)
+
+          This complicates the structure of library header files,
+          because when included by the library itself the header must
+          declare the variables and functions as dllexport, but when
+          included by client code the header must declare them as
+          dllimport.  There are a number of idioms that are typically
+          used to do this; often client code can omit the __declspec()
+          declaration completely.  See `--enable-auto-import' and
+          `automatic data imports' for more information.
+
+_automatic data imports_
+     The standard Windows dll format supports data imports from dlls
+     only by adding special decorations (dllimport/dllexport), which
+     let the compiler produce specific assembler instructions to deal
+     with this issue.  This increases the effort necessary to port
+     existing Un*x code to these platforms, especially for large c++
+     libraries and applications.  The auto-import feature, which was
+     initially provided by Paul Sokolovsky, allows one to omit the
+     decorations to achieve a behavior that conforms to that on
+     POSIX/Un*x platforms. This feature is enabled with the
+     `--enable-auto-import' command-line option, although it is enabled
+     by default on cygwin/mingw.  The `--enable-auto-import' option
+     itself now serves mainly to suppress any warnings that are
+     ordinarily emitted when linked objects trigger the feature's use.
+
+     auto-import of variables does not always work flawlessly without
+     additional assistance.  Sometimes, you will see this message
+
+     "variable '<var>' can't be auto-imported. Please read the
+     documentation for ld's `--enable-auto-import' for details."
+
+     The `--enable-auto-import' documentation explains why this error
+     occurs, and several methods that can be used to overcome this
+     difficulty.  One of these methods is the _runtime pseudo-relocs_
+     feature, described below.
+
+     For complex variables imported from DLLs (such as structs or
+     classes), object files typically contain a base address for the
+     variable and an offset (_addend_) within the variable-to specify a
+     particular field or public member, for instance.  Unfortunately,
+     the runtime loader used in win32 environments is incapable of
+     fixing these references at runtime without the additional
+     information supplied by dllimport/dllexport decorations.  The
+     standard auto-import feature described above is unable to resolve
+     these references.
+
+     The `--enable-runtime-pseudo-relocs' switch allows these
+     references to be resolved without error, while leaving the task of
+     adjusting the references themselves (with their non-zero addends)
+     to specialized code provided by the runtime environment.  Recent
+     versions of the cygwin and mingw environments and compilers
+     provide this runtime support; older versions do not.  However, the
+     support is only necessary on the developer's platform; the
+     compiled result will run without error on an older system.
+
+     `--enable-runtime-pseudo-relocs' is not the default; it must be
+     explicitly enabled as needed.
+
+_direct linking to a dll_
+     The cygwin/mingw ports of `ld' support the direct linking,
+     including data symbols, to a dll without the usage of any import
+     libraries.  This is much faster and uses much less memory than
+     does the traditional import library method, especially when
+     linking large libraries or applications.  When `ld' creates an
+     import lib, each function or variable exported from the dll is
+     stored in its own bfd, even though a single bfd could contain many
+     exports.  The overhead involved in storing, loading, and
+     processing so many bfd's is quite large, and explains the
+     tremendous time, memory, and storage needed to link against
+     particularly large or complex libraries when using import libs.
+
+     Linking directly to a dll uses no extra command-line switches
+     other than `-L' and `-l', because `ld' already searches for a
+     number of names to match each library.  All that is needed from
+     the developer's perspective is an understanding of this search, in
+     order to force ld to select the dll instead of an import library.
+
+     For instance, when ld is called with the argument `-lxxx' it will
+     attempt to find, in the first directory of its search path,
+
+          libxxx.dll.a
+          xxx.dll.a
+          libxxx.a
+          xxx.lib
+          cygxxx.dll (*)
+          libxxx.dll
+          xxx.dll
+
+     before moving on to the next directory in the search path.
+
+     (*) Actually, this is not `cygxxx.dll' but in fact is
+     `<prefix>xxx.dll', where `<prefix>' is set by the `ld' option
+     `--dll-search-prefix=<prefix>'. In the case of cygwin, the
+     standard gcc spec file includes `--dll-search-prefix=cyg', so in
+     effect we actually search for `cygxxx.dll'.
+
+     Other win32-based unix environments, such as mingw or pw32, may
+     use other `<prefix>'es, although at present only cygwin makes use
+     of this feature.  It was originally intended to help avoid name
+     conflicts among dll's built for the various win32/un*x
+     environments, so that (for example) two versions of a zlib dll
+     could coexist on the same machine.
+
+     The generic cygwin/mingw path layout uses a `bin' directory for
+     applications and dll's and a `lib' directory for the import
+     libraries (using cygwin nomenclature):
+
+          bin/
+          	cygxxx.dll
+          lib/
+          	libxxx.dll.a   (in case of dll's)
+          	libxxx.a       (in case of static archive)
+
+     Linking directly to a dll without using the import library can be
+     done two ways:
+
+     1. Use the dll directly by adding the `bin' path to the link line
+          gcc -Wl,-verbose  -o a.exe -L../bin/ -lxxx
+
+     However, as the dll's often have version numbers appended to their
+     names (`cygncurses-5.dll') this will often fail, unless one
+     specifies `-L../bin -lncurses-5' to include the version.  Import
+     libs are generally not versioned, and do not have this difficulty.
+
+     2. Create a symbolic link from the dll to a file in the `lib'
+     directory according to the above mentioned search pattern.  This
+     should be used to avoid unwanted changes in the tools needed for
+     making the app/dll.
+
+          ln -s bin/cygxxx.dll lib/[cyg|lib|]xxx.dll[.a]
+
+     Then you can link without any make environment changes.
+
+          gcc -Wl,-verbose  -o a.exe -L../lib/ -lxxx
+
+     This technique also avoids the version number problems, because
+     the following is perfectly legal
+
+          bin/
+          	cygxxx-5.dll
+          lib/
+          	libxxx.dll.a -> ../bin/cygxxx-5.dll
+
+     Linking directly to a dll without using an import lib will work
+     even when auto-import features are exercised, and even when
+     `--enable-runtime-pseudo-relocs' is used.
+
+     Given the improvements in speed and memory usage, one might
+     justifiably wonder why import libraries are used at all.  There
+     are three reasons:
+
+     1. Until recently, the link-directly-to-dll functionality did _not_
+     work with auto-imported data.
+
+     2. Sometimes it is necessary to include pure static objects within
+     the import library (which otherwise contains only bfd's for
+     indirection symbols that point to the exports of a dll).  Again,
+     the import lib for the cygwin kernel makes use of this ability,
+     and it is not possible to do this without an import lib.
+
+     3. Symbol aliases can only be resolved using an import lib.  This
+     is critical when linking against OS-supplied dll's (eg, the win32
+     API) in which symbols are usually exported as undecorated aliases
+     of their stdcall-decorated assembly names.
+
+     So, import libs are not going away.  But the ability to replace
+     true import libs with a simple symbolic link to (or a copy of) a
+     dll, in many cases, is a useful addition to the suite of tools
+     binutils makes available to the win32 developer.  Given the
+     massive improvements in memory requirements during linking, storage
+     requirements, and linking speed, we expect that many developers
+     will soon begin to use this feature whenever possible.
+
+_symbol aliasing_
+
+    _adding additional names_
+          Sometimes, it is useful to export symbols with additional
+          names.  A symbol `foo' will be exported as `foo', but it can
+          also be exported as `_foo' by using special directives in the
+          DEF file when creating the dll.  This will affect also the
+          optional created import library.  Consider the following DEF
+          file:
+
+               LIBRARY "xyz.dll" BASE=0x61000000
+
+               EXPORTS
+               foo
+               _foo = foo
+
+          The line `_foo = foo' maps the symbol `foo' to `_foo'.
+
+          Another method for creating a symbol alias is to create it in
+          the source code using the "weak" attribute:
+
+               void foo () { /* Do something.  */; }
+               void _foo () __attribute__ ((weak, alias ("foo")));
+
+          See the gcc manual for more information about attributes and
+          weak symbols.
+
+    _renaming symbols_
+          Sometimes it is useful to rename exports.  For instance, the
+          cygwin kernel does this regularly.  A symbol `_foo' can be
+          exported as `foo' but not as `_foo' by using special
+          directives in the DEF file. (This will also affect the import
+          library, if it is created).  In the following example:
+
+               LIBRARY "xyz.dll" BASE=0x61000000
+
+               EXPORTS
+               _foo = foo
+
+          The line `_foo = foo' maps the exported symbol `foo' to
+          `_foo'.
+
+     Note: using a DEF file disables the default auto-export behavior,
+     unless the `--export-all-symbols' command line option is used.
+     If, however, you are trying to rename symbols, then you should list
+     _all_ desired exports in the DEF file, including the symbols that
+     are not being renamed, and do _not_ use the `--export-all-symbols'
+     option.  If you list only the renamed symbols in the DEF file, and
+     use `--export-all-symbols' to handle the other symbols, then the
+     both the new names _and_ the original names for the renamed
+     symbols will be exported.  In effect, you'd be aliasing those
+     symbols, not renaming them, which is probably not what you wanted.
+
+_weak externals_
+     The Windows object format, PE, specifies a form of weak symbols
+     called weak externals.  When a weak symbol is linked and the
+     symbol is not defined, the weak symbol becomes an alias for some
+     other symbol.  There are three variants of weak externals:
+        * Definition is searched for in objects and libraries,
+          historically called lazy externals.
+
+        * Definition is searched for only in other objects, not in
+          libraries.  This form is not presently implemented.
+
+        * No search; the symbol is an alias.  This form is not presently
+          implemented.
+     As a GNU extension, weak symbols that do not specify an alternate
+     symbol are supported.  If the symbol is undefined when linking,
+     the symbol uses a default value.
+
+_aligned common symbols_
+     As a GNU extension to the PE file format, it is possible to
+     specify the desired alignment for a common symbol.  This
+     information is conveyed from the assembler or compiler to the
+     linker by means of GNU-specific commands carried in the object
+     file's `.drectve' section, which are recognized by `ld' and
+     respected when laying out the common symbols.  Native tools will
+     be able to process object files employing this GNU extension, but
+     will fail to respect the alignment instructions, and may issue
+     noisy warnings about unknown linker directives.
+
+
+File: ld.info,  Node: Xtensa,  Prev: WIN32,  Up: Machine Dependent
+
+4.14 `ld' and Xtensa Processors
+===============================
+
+The default `ld' behavior for Xtensa processors is to interpret
+`SECTIONS' commands so that lists of explicitly named sections in a
+specification with a wildcard file will be interleaved when necessary to
+keep literal pools within the range of PC-relative load offsets.  For
+example, with the command:
+
+     SECTIONS
+     {
+       .text : {
+         *(.literal .text)
+       }
+     }
+
+`ld' may interleave some of the `.literal' and `.text' sections from
+different object files to ensure that the literal pools are within the
+range of PC-relative load offsets.  A valid interleaving might place
+the `.literal' sections from an initial group of files followed by the
+`.text' sections of that group of files.  Then, the `.literal' sections
+from the rest of the files and the `.text' sections from the rest of
+the files would follow.
+
+   Relaxation is enabled by default for the Xtensa version of `ld' and
+provides two important link-time optimizations.  The first optimization
+is to combine identical literal values to reduce code size.  A redundant
+literal will be removed and all the `L32R' instructions that use it
+will be changed to reference an identical literal, as long as the
+location of the replacement literal is within the offset range of all
+the `L32R' instructions.  The second optimization is to remove
+unnecessary overhead from assembler-generated "longcall" sequences of
+`L32R'/`CALLXN' when the target functions are within range of direct
+`CALLN' instructions.
+
+   For each of these cases where an indirect call sequence can be
+optimized to a direct call, the linker will change the `CALLXN'
+instruction to a `CALLN' instruction, remove the `L32R' instruction,
+and remove the literal referenced by the `L32R' instruction if it is
+not used for anything else.  Removing the `L32R' instruction always
+reduces code size but can potentially hurt performance by changing the
+alignment of subsequent branch targets.  By default, the linker will
+always preserve alignments, either by switching some instructions
+between 24-bit encodings and the equivalent density instructions or by
+inserting a no-op in place of the `L32R' instruction that was removed.
+If code size is more important than performance, the `--size-opt'
+option can be used to prevent the linker from widening density
+instructions or inserting no-ops, except in a few cases where no-ops
+are required for correctness.
+
+   The following Xtensa-specific command-line options can be used to
+control the linker:
+
+`--no-relax'
+     Since the Xtensa version of `ld' enables the `--relax' option by
+     default, the `--no-relax' option is provided to disable relaxation.
+
+`--size-opt'
+     When optimizing indirect calls to direct calls, optimize for code
+     size more than performance.  With this option, the linker will not
+     insert no-ops or widen density instructions to preserve branch
+     target alignment.  There may still be some cases where no-ops are
+     required to preserve the correctness of the code.
+
+
+File: ld.info,  Node: BFD,  Next: Reporting Bugs,  Prev: Machine Dependent,  Up: Top
+
+5 BFD
+*****
+
+The linker accesses object and archive files using the BFD libraries.
+These libraries allow the linker to use the same routines to operate on
+object files whatever the object file format.  A different object file
+format can be supported simply by creating a new BFD back end and adding
+it to the library.  To conserve runtime memory, however, the linker and
+associated tools are usually configured to support only a subset of the
+object file formats available.  You can use `objdump -i' (*note
+objdump: (binutils.info)objdump.) to list all the formats available for
+your configuration.
+
+   As with most implementations, BFD is a compromise between several
+conflicting requirements. The major factor influencing BFD design was
+efficiency: any time used converting between formats is time which
+would not have been spent had BFD not been involved. This is partly
+offset by abstraction payback; since BFD simplifies applications and
+back ends, more time and care may be spent optimizing algorithms for a
+greater speed.
+
+   One minor artifact of the BFD solution which you should bear in mind
+is the potential for information loss.  There are two places where
+useful information can be lost using the BFD mechanism: during
+conversion and during output. *Note BFD information loss::.
+
+* Menu:
+
+* BFD outline::                 How it works: an outline of BFD
+
+
+File: ld.info,  Node: BFD outline,  Up: BFD
+
+5.1 How It Works: An Outline of BFD
+===================================
+
+When an object file is opened, BFD subroutines automatically determine
+the format of the input object file.  They then build a descriptor in
+memory with pointers to routines that will be used to access elements of
+the object file's data structures.
+
+   As different information from the object files is required, BFD
+reads from different sections of the file and processes them.  For
+example, a very common operation for the linker is processing symbol
+tables.  Each BFD back end provides a routine for converting between
+the object file's representation of symbols and an internal canonical
+format. When the linker asks for the symbol table of an object file, it
+calls through a memory pointer to the routine from the relevant BFD
+back end which reads and converts the table into a canonical form.  The
+linker then operates upon the canonical form. When the link is finished
+and the linker writes the output file's symbol table, another BFD back
+end routine is called to take the newly created symbol table and
+convert it into the chosen output format.
+
+* Menu:
+
+* BFD information loss::	Information Loss
+* Canonical format::		The BFD	canonical object-file format
+
+
+File: ld.info,  Node: BFD information loss,  Next: Canonical format,  Up: BFD outline
+
+5.1.1 Information Loss
+----------------------
+
+_Information can be lost during output._ The output formats supported
+by BFD do not provide identical facilities, and information which can
+be described in one form has nowhere to go in another format. One
+example of this is alignment information in `b.out'. There is nowhere
+in an `a.out' format file to store alignment information on the
+contained data, so when a file is linked from `b.out' and an `a.out'
+image is produced, alignment information will not propagate to the
+output file. (The linker will still use the alignment information
+internally, so the link is performed correctly).
+
+   Another example is COFF section names. COFF files may contain an
+unlimited number of sections, each one with a textual section name. If
+the target of the link is a format which does not have many sections
+(e.g., `a.out') or has sections without names (e.g., the Oasys format),
+the link cannot be done simply. You can circumvent this problem by
+describing the desired input-to-output section mapping with the linker
+command language.
+
+   _Information can be lost during canonicalization._ The BFD internal
+canonical form of the external formats is not exhaustive; there are
+structures in input formats for which there is no direct representation
+internally.  This means that the BFD back ends cannot maintain all
+possible data richness through the transformation between external to
+internal and back to external formats.
+
+   This limitation is only a problem when an application reads one
+format and writes another.  Each BFD back end is responsible for
+maintaining as much data as possible, and the internal BFD canonical
+form has structures which are opaque to the BFD core, and exported only
+to the back ends. When a file is read in one format, the canonical form
+is generated for BFD and the application. At the same time, the back
+end saves away any information which may otherwise be lost. If the data
+is then written back in the same format, the back end routine will be
+able to use the canonical form provided by the BFD core as well as the
+information it prepared earlier.  Since there is a great deal of
+commonality between back ends, there is no information lost when
+linking or copying big endian COFF to little endian COFF, or `a.out' to
+`b.out'.  When a mixture of formats is linked, the information is only
+lost from the files whose format differs from the destination.
+
+
+File: ld.info,  Node: Canonical format,  Prev: BFD information loss,  Up: BFD outline
+
+5.1.2 The BFD canonical object-file format
+------------------------------------------
+
+The greatest potential for loss of information occurs when there is the
+least overlap between the information provided by the source format,
+that stored by the canonical format, and that needed by the destination
+format. A brief description of the canonical form may help you
+understand which kinds of data you can count on preserving across
+conversions.  
+
+_files_
+     Information stored on a per-file basis includes target machine
+     architecture, particular implementation format type, a demand
+     pageable bit, and a write protected bit.  Information like Unix
+     magic numbers is not stored here--only the magic numbers' meaning,
+     so a `ZMAGIC' file would have both the demand pageable bit and the
+     write protected text bit set.  The byte order of the target is
+     stored on a per-file basis, so that big- and little-endian object
+     files may be used with one another.
+
+_sections_
+     Each section in the input file contains the name of the section,
+     the section's original address in the object file, size and
+     alignment information, various flags, and pointers into other BFD
+     data structures.
+
+_symbols_
+     Each symbol contains a pointer to the information for the object
+     file which originally defined it, its name, its value, and various
+     flag bits.  When a BFD back end reads in a symbol table, it
+     relocates all symbols to make them relative to the base of the
+     section where they were defined.  Doing this ensures that each
+     symbol points to its containing section.  Each symbol also has a
+     varying amount of hidden private data for the BFD back end.  Since
+     the symbol points to the original file, the private data format
+     for that symbol is accessible.  `ld' can operate on a collection
+     of symbols of wildly different formats without problems.
+
+     Normal global and simple local symbols are maintained on output,
+     so an output file (no matter its format) will retain symbols
+     pointing to functions and to global, static, and common variables.
+     Some symbol information is not worth retaining; in `a.out', type
+     information is stored in the symbol table as long symbol names.
+     This information would be useless to most COFF debuggers; the
+     linker has command line switches to allow users to throw it away.
+
+     There is one word of type information within the symbol, so if the
+     format supports symbol type information within symbols (for
+     example, COFF, IEEE, Oasys) and the type is simple enough to fit
+     within one word (nearly everything but aggregates), the
+     information will be preserved.
+
+_relocation level_
+     Each canonical BFD relocation record contains a pointer to the
+     symbol to relocate to, the offset of the data to relocate, the
+     section the data is in, and a pointer to a relocation type
+     descriptor. Relocation is performed by passing messages through
+     the relocation type descriptor and the symbol pointer. Therefore,
+     relocations can be performed on output data using a relocation
+     method that is only available in one of the input formats. For
+     instance, Oasys provides a byte relocation format.  A relocation
+     record requesting this relocation type would point indirectly to a
+     routine to perform this, so the relocation may be performed on a
+     byte being written to a 68k COFF file, even though 68k COFF has no
+     such relocation type.
+
+_line numbers_
+     Object formats can contain, for debugging purposes, some form of
+     mapping between symbols, source line numbers, and addresses in the
+     output file.  These addresses have to be relocated along with the
+     symbol information.  Each symbol with an associated list of line
+     number records points to the first record of the list.  The head
+     of a line number list consists of a pointer to the symbol, which
+     allows finding out the address of the function whose line number
+     is being described. The rest of the list is made up of pairs:
+     offsets into the section and line numbers. Any format which can
+     simply derive this information can pass it successfully between
+     formats (COFF, IEEE and Oasys).
+
+
+File: ld.info,  Node: Reporting Bugs,  Next: MRI,  Prev: BFD,  Up: Top
+
+6 Reporting Bugs
+****************
+
+Your bug reports play an essential role in making `ld' reliable.
+
+   Reporting a bug may help you by bringing a solution to your problem,
+or it may not.  But in any case the principal function of a bug report
+is to help the entire community by making the next version of `ld' work
+better.  Bug reports are your contribution to the maintenance of `ld'.
+
+   In order for a bug report to serve its purpose, you must include the
+information that enables us to fix the bug.
+
+* Menu:
+
+* Bug Criteria::                Have you found a bug?
+* Bug Reporting::               How to report bugs
+
+
+File: ld.info,  Node: Bug Criteria,  Next: Bug Reporting,  Up: Reporting Bugs
+
+6.1 Have You Found a Bug?
+=========================
+
+If you are not sure whether you have found a bug, here are some
+guidelines:
+
+   * If the linker gets a fatal signal, for any input whatever, that is
+     a `ld' bug.  Reliable linkers never crash.
+
+   * If `ld' produces an error message for valid input, that is a bug.
+
+   * If `ld' does not produce an error message for invalid input, that
+     may be a bug.  In the general case, the linker can not verify that
+     object files are correct.
+
+   * If you are an experienced user of linkers, your suggestions for
+     improvement of `ld' are welcome in any case.
+
+
+File: ld.info,  Node: Bug Reporting,  Prev: Bug Criteria,  Up: Reporting Bugs
+
+6.2 How to Report Bugs
+======================
+
+A number of companies and individuals offer support for GNU products.
+If you obtained `ld' from a support organization, we recommend you
+contact that organization first.
+
+   You can find contact information for many support companies and
+individuals in the file `etc/SERVICE' in the GNU Emacs distribution.
+
+   Otherwise, send bug reports for `ld' to
+`http://www.sourceware.org/bugzilla/'.
+
+   The fundamental principle of reporting bugs usefully is this:
+*report all the facts*.  If you are not sure whether to state a fact or
+leave it out, state it!
+
+   Often people omit facts because they think they know what causes the
+problem and assume that some details do not matter.  Thus, you might
+assume that the name of a symbol you use in an example does not matter.
+Well, probably it does not, but one cannot be sure.  Perhaps the bug is
+a stray memory reference which happens to fetch from the location where
+that name is stored in memory; perhaps, if the name were different, the
+contents of that location would fool the linker into doing the right
+thing despite the bug.  Play it safe and give a specific, complete
+example.  That is the easiest thing for you to do, and the most helpful.
+
+   Keep in mind that the purpose of a bug report is to enable us to fix
+the bug if it is new to us.  Therefore, always write your bug reports
+on the assumption that the bug has not been reported previously.
+
+   Sometimes people give a few sketchy facts and ask, "Does this ring a
+bell?"  This cannot help us fix a bug, so it is basically useless.  We
+respond by asking for enough details to enable us to investigate.  You
+might as well expedite matters by sending them to begin with.
+
+   To enable us to fix the bug, you should include all these things:
+
+   * The version of `ld'.  `ld' announces it if you start it with the
+     `--version' argument.
+
+     Without this, we will not know whether there is any point in
+     looking for the bug in the current version of `ld'.
+
+   * Any patches you may have applied to the `ld' source, including any
+     patches made to the `BFD' library.
+
+   * The type of machine you are using, and the operating system name
+     and version number.
+
+   * What compiler (and its version) was used to compile `ld'--e.g.
+     "`gcc-2.7'".
+
+   * The command arguments you gave the linker to link your example and
+     observe the bug.  To guarantee you will not omit something
+     important, list them all.  A copy of the Makefile (or the output
+     from make) is sufficient.
+
+     If we were to try to guess the arguments, we would probably guess
+     wrong and then we might not encounter the bug.
+
+   * A complete input file, or set of input files, that will reproduce
+     the bug.  It is generally most helpful to send the actual object
+     files provided that they are reasonably small.  Say no more than
+     10K.  For bigger files you can either make them available by FTP
+     or HTTP or else state that you are willing to send the object
+     file(s) to whomever requests them.  (Note - your email will be
+     going to a mailing list, so we do not want to clog it up with
+     large attachments).  But small attachments are best.
+
+     If the source files were assembled using `gas' or compiled using
+     `gcc', then it may be OK to send the source files rather than the
+     object files.  In this case, be sure to say exactly what version of
+     `gas' or `gcc' was used to produce the object files.  Also say how
+     `gas' or `gcc' were configured.
+
+   * A description of what behavior you observe that you believe is
+     incorrect.  For example, "It gets a fatal signal."
+
+     Of course, if the bug is that `ld' gets a fatal signal, then we
+     will certainly notice it.  But if the bug is incorrect output, we
+     might not notice unless it is glaringly wrong.  You might as well
+     not give us a chance to make a mistake.
+
+     Even if the problem you experience is a fatal signal, you should
+     still say so explicitly.  Suppose something strange is going on,
+     such as, your copy of `ld' is out of sync, or you have encountered
+     a bug in the C library on your system.  (This has happened!)  Your
+     copy might crash and ours would not.  If you told us to expect a
+     crash, then when ours fails to crash, we would know that the bug
+     was not happening for us.  If you had not told us to expect a
+     crash, then we would not be able to draw any conclusion from our
+     observations.
+
+   * If you wish to suggest changes to the `ld' source, send us context
+     diffs, as generated by `diff' with the `-u', `-c', or `-p' option.
+     Always send diffs from the old file to the new file.  If you even
+     discuss something in the `ld' source, refer to it by context, not
+     by line number.
+
+     The line numbers in our development sources will not match those
+     in your sources.  Your line numbers would convey no useful
+     information to us.
+
+   Here are some things that are not necessary:
+
+   * A description of the envelope of the bug.
+
+     Often people who encounter a bug spend a lot of time investigating
+     which changes to the input file will make the bug go away and which
+     changes will not affect it.
+
+     This is often time consuming and not very useful, because the way
+     we will find the bug is by running a single example under the
+     debugger with breakpoints, not by pure deduction from a series of
+     examples.  We recommend that you save your time for something else.
+
+     Of course, if you can find a simpler example to report _instead_
+     of the original one, that is a convenience for us.  Errors in the
+     output will be easier to spot, running under the debugger will take
+     less time, and so on.
+
+     However, simplification is not vital; if you do not want to do
+     this, report the bug anyway and send us the entire test case you
+     used.
+
+   * A patch for the bug.
+
+     A patch for the bug does help us if it is a good one.  But do not
+     omit the necessary information, such as the test case, on the
+     assumption that a patch is all we need.  We might see problems
+     with your patch and decide to fix the problem another way, or we
+     might not understand it at all.
+
+     Sometimes with a program as complicated as `ld' it is very hard to
+     construct an example that will make the program follow a certain
+     path through the code.  If you do not send us the example, we will
+     not be able to construct one, so we will not be able to verify
+     that the bug is fixed.
+
+     And if we cannot understand what bug you are trying to fix, or why
+     your patch should be an improvement, we will not install it.  A
+     test case will help us to understand.
+
+   * A guess about what the bug is or what it depends on.
+
+     Such guesses are usually wrong.  Even we cannot guess right about
+     such things without first using the debugger to find the facts.
+
+
+File: ld.info,  Node: MRI,  Next: GNU Free Documentation License,  Prev: Reporting Bugs,  Up: Top
+
+Appendix A MRI Compatible Script Files
+**************************************
+
+To aid users making the transition to GNU `ld' from the MRI linker,
+`ld' can use MRI compatible linker scripts as an alternative to the
+more general-purpose linker scripting language described in *note
+Scripts::.  MRI compatible linker scripts have a much simpler command
+set than the scripting language otherwise used with `ld'.  GNU `ld'
+supports the most commonly used MRI linker commands; these commands are
+described here.
+
+   In general, MRI scripts aren't of much use with the `a.out' object
+file format, since it only has three sections and MRI scripts lack some
+features to make use of them.
+
+   You can specify a file containing an MRI-compatible script using the
+`-c' command-line option.
+
+   Each command in an MRI-compatible script occupies its own line; each
+command line starts with the keyword that identifies the command (though
+blank lines are also allowed for punctuation).  If a line of an
+MRI-compatible script begins with an unrecognized keyword, `ld' issues
+a warning message, but continues processing the script.
+
+   Lines beginning with `*' are comments.
+
+   You can write these commands using all upper-case letters, or all
+lower case; for example, `chip' is the same as `CHIP'.  The following
+list shows only the upper-case form of each command.
+
+`ABSOLUTE SECNAME'
+`ABSOLUTE SECNAME, SECNAME, ... SECNAME'
+     Normally, `ld' includes in the output file all sections from all
+     the input files.  However, in an MRI-compatible script, you can
+     use the `ABSOLUTE' command to restrict the sections that will be
+     present in your output program.  If the `ABSOLUTE' command is used
+     at all in a script, then only the sections named explicitly in
+     `ABSOLUTE' commands will appear in the linker output.  You can
+     still use other input sections (whatever you select on the command
+     line, or using `LOAD') to resolve addresses in the output file.
+
+`ALIAS OUT-SECNAME, IN-SECNAME'
+     Use this command to place the data from input section IN-SECNAME
+     in a section called OUT-SECNAME in the linker output file.
+
+     IN-SECNAME may be an integer.
+
+`ALIGN SECNAME = EXPRESSION'
+     Align the section called SECNAME to EXPRESSION.  The EXPRESSION
+     should be a power of two.
+
+`BASE EXPRESSION'
+     Use the value of EXPRESSION as the lowest address (other than
+     absolute addresses) in the output file.
+
+`CHIP EXPRESSION'
+`CHIP EXPRESSION, EXPRESSION'
+     This command does nothing; it is accepted only for compatibility.
+
+`END'
+     This command does nothing whatever; it's only accepted for
+     compatibility.
+
+`FORMAT OUTPUT-FORMAT'
+     Similar to the `OUTPUT_FORMAT' command in the more general linker
+     language, but restricted to one of these output formats:
+
+       1. S-records, if OUTPUT-FORMAT is `S'
+
+       2. IEEE, if OUTPUT-FORMAT is `IEEE'
+
+       3. COFF (the `coff-m68k' variant in BFD), if OUTPUT-FORMAT is
+          `COFF'
+
+`LIST ANYTHING...'
+     Print (to the standard output file) a link map, as produced by the
+     `ld' command-line option `-M'.
+
+     The keyword `LIST' may be followed by anything on the same line,
+     with no change in its effect.
+
+`LOAD FILENAME'
+`LOAD FILENAME, FILENAME, ... FILENAME'
+     Include one or more object file FILENAME in the link; this has the
+     same effect as specifying FILENAME directly on the `ld' command
+     line.
+
+`NAME OUTPUT-NAME'
+     OUTPUT-NAME is the name for the program produced by `ld'; the
+     MRI-compatible command `NAME' is equivalent to the command-line
+     option `-o' or the general script language command `OUTPUT'.
+
+`ORDER SECNAME, SECNAME, ... SECNAME'
+`ORDER SECNAME SECNAME SECNAME'
+     Normally, `ld' orders the sections in its output file in the order
+     in which they first appear in the input files.  In an
+     MRI-compatible script, you can override this ordering with the
+     `ORDER' command.  The sections you list with `ORDER' will appear
+     first in your output file, in the order specified.
+
+`PUBLIC NAME=EXPRESSION'
+`PUBLIC NAME,EXPRESSION'
+`PUBLIC NAME EXPRESSION'
+     Supply a value (EXPRESSION) for external symbol NAME used in the
+     linker input files.
+
+`SECT SECNAME, EXPRESSION'
+`SECT SECNAME=EXPRESSION'
+`SECT SECNAME EXPRESSION'
+     You can use any of these three forms of the `SECT' command to
+     specify the start address (EXPRESSION) for section SECNAME.  If
+     you have more than one `SECT' statement for the same SECNAME, only
+     the _first_ sets the start address.
+
+
+File: ld.info,  Node: GNU Free Documentation License,  Next: LD Index,  Prev: MRI,  Up: Top
+
+Appendix B GNU Free Documentation License
+*****************************************
+
+                        Version 1.1, March 2000
+
+     Copyright (C) 2000, 2003 Free Software Foundation, Inc.
+     51 Franklin Street, Fifth Floor, Boston, MA  02110-1301  USA
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     written document "free" in the sense of freedom: to assure everyone
+     the effective freedom to copy and redistribute it, with or without
+     modifying it, either commercially or noncommercially.  Secondarily,
+     this License preserves for the author and publisher a way to get
+     credit for their work, while not being considered responsible for
+     modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work that contains a
+     notice placed by the copyright holder saying it can be distributed
+     under the terms of this License.  The "Document", below, refers to
+     any such manual or work.  Any member of the public is a licensee,
+     and is addressed as "you."
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter
+     section of the Document that deals exclusively with the
+     relationship of the publishers or authors of the Document to the
+     Document's overall subject (or to related matters) and contains
+     nothing that could fall directly within that overall subject.
+     (For example, if the Document is in part a textbook of
+     mathematics, a Secondary Section may not explain any mathematics.)
+     The relationship could be a matter of historical connection with
+     the subject or with related matters, or of legal, commercial,
+     philosophical, ethical or political position regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, whose contents can be viewed and edited directly
+     and straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup has been designed
+     to thwart or discourage subsequent modification by readers is not
+     Transparent.  A copy that is not "Transparent" is called "Opaque."
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML designed for human modification.
+     Opaque formats include PostScript, PDF, proprietary formats that
+     can be read and edited only by proprietary word processors, SGML
+     or XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML produced by some word
+     processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies of the Document numbering more than
+     100, and the Document's license notice requires Cover Texts, you
+     must enclose the copies in covers that carry, clearly and legibly,
+     all these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a publicly-accessible
+     computer-network location containing a complete Transparent copy
+     of the Document, free of added material, which the general
+     network-using public has access to download anonymously at no
+     charge using public-standard network protocols.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+     A. Use in the Title Page (and on the covers, if any) a title
+     distinct    from that of the Document, and from those of previous
+     versions    (which should, if there were any, be listed in the
+     History section    of the Document).  You may use the same title
+     as a previous version    if the original publisher of that version
+     gives permission.
+     B. List on the Title Page, as authors, one or more persons or
+     entities    responsible for authorship of the modifications in the
+     Modified    Version, together with at least five of the principal
+     authors of the    Document (all of its principal authors, if it
+     has less than five).
+     C. State on the Title page the name of the publisher of the
+     Modified Version, as the publisher.
+     D. Preserve all the copyright notices of the Document.
+     E. Add an appropriate copyright notice for your modifications
+     adjacent to the other copyright notices.
+     F. Include, immediately after the copyright notices, a license
+     notice    giving the public permission to use the Modified Version
+     under the    terms of this License, in the form shown in the
+     Addendum below.
+     G. Preserve in that license notice the full lists of Invariant
+     Sections    and required Cover Texts given in the Document's
+     license notice.
+     H. Include an unaltered copy of this License.
+     I. Preserve the section entitled "History", and its title, and add
+     to    it an item stating at least the title, year, new authors, and
+       publisher of the Modified Version as given on the Title Page.  If
+       there is no section entitled "History" in the Document, create
+     one    stating the title, year, authors, and publisher of the
+     Document as    given on its Title Page, then add an item
+     describing the Modified    Version as stated in the previous
+     sentence.
+     J. Preserve the network location, if any, given in the Document for
+       public access to a Transparent copy of the Document, and likewise
+       the network locations given in the Document for previous versions
+       it was based on.  These may be placed in the "History" section.
+       You may omit a network location for a work that was published at
+       least four years before the Document itself, or if the original
+      publisher of the version it refers to gives permission.
+     K. In any section entitled "Acknowledgements" or "Dedications",
+     preserve the section's title, and preserve in the section all the
+      substance and tone of each of the contributor acknowledgements
+     and/or dedications given therein.
+     L. Preserve all the Invariant Sections of the Document,
+     unaltered in their text and in their titles.  Section numbers
+     or the equivalent are not considered part of the section titles.
+     M. Delete any section entitled "Endorsements."  Such a section
+     may not be included in the Modified Version.
+     N. Do not retitle any existing section as "Endorsements"    or to
+     conflict in title with any Invariant Section.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties-for example, statements of peer review or that the text has
+     been approved by an organization as the authoritative definition
+     of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections entitled
+     "History" in the various original documents, forming one section
+     entitled "History"; likewise combine any sections entitled
+     "Acknowledgements", and any sections entitled "Dedications."  You
+     must delete all sections entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, does not as a whole count as a
+     Modified Version of the Document, provided no compilation
+     copyright is claimed for the compilation.  Such a compilation is
+     called an "aggregate", and this License does not apply to the
+     other self-contained works thus compiled with the Document, on
+     account of their being thus compiled, if they are not themselves
+     derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one
+     quarter of the entire aggregate, the Document's Cover Texts may be
+     placed on covers that surround only the Document within the
+     aggregate.  Otherwise they must appear on covers around the whole
+     aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License provided that you also include the
+     original English version of this License.  In case of a
+     disagreement between the translation and the original English
+     version of this License, the original English version will prevail.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided for under this License.  Any other
+     attempt to copy, modify, sublicense or distribute the Document is
+     void, and will automatically terminate your rights under this
+     License.  However, parties who have received copies, or rights,
+     from you under this License will not have their licenses
+     terminated so long as such parties remain in full compliance.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     http://www.gnu.org/copyleft/.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+     Copyright (C)  YEAR  YOUR NAME.
+     Permission is granted to copy, distribute and/or modify this document
+     under the terms of the GNU Free Documentation License, Version 1.1
+     or any later version published by the Free Software Foundation;
+     with the Invariant Sections being LIST THEIR TITLES, with the
+     Front-Cover Texts being LIST, and with the Back-Cover Texts being LIST.
+     A copy of the license is included in the section entitled "GNU
+     Free Documentation License."
+
+   If you have no Invariant Sections, write "with no Invariant Sections"
+instead of saying which ones are invariant.  If you have no Front-Cover
+Texts, write "no Front-Cover Texts" instead of "Front-Cover Texts being
+LIST"; likewise for Back-Cover Texts.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: ld.info,  Node: LD Index,  Prev: GNU Free Documentation License,  Up: Top
+
+LD Index
+********
+
+[index]
+* Menu:
+
+* ":                                     Symbols.            (line    6)
+* -(:                                    Options.            (line  675)
+* --accept-unknown-input-arch:           Options.            (line  693)
+* --add-needed:                          Options.            (line  717)
+* --add-stdcall-alias:                   Options.            (line 1527)
+* --allow-multiple-definition:           Options.            (line  945)
+* --allow-shlib-undefined:               Options.            (line  951)
+* --architecture=ARCH:                   Options.            (line  113)
+* --as-needed:                           Options.            (line  703)
+* --auxiliary=NAME:                      Options.            (line  235)
+* --bank-window:                         Options.            (line 1926)
+* --base-file:                           Options.            (line 1532)
+* --be8:                                 ARM.                (line   28)
+* --bss-plt:                             PowerPC ELF32.      (line   16)
+* --build-id:                            Options.            (line 1489)
+* --build-id=STYLE:                      Options.            (line 1489)
+* --check-sections:                      Options.            (line  799)
+* --cref:                                Options.            (line  811)
+* --default-imported-symver:             Options.            (line  988)
+* --default-script=SCRIPT:               Options.            (line  520)
+* --default-symver:                      Options.            (line  984)
+* --defsym=SYMBOL=EXP:                   Options.            (line  839)
+* --demangle[=STYLE]:                    Options.            (line  852)
+* --disable-auto-image-base:             Options.            (line 1701)
+* --disable-auto-import:                 Options.            (line 1836)
+* --disable-long-section-names:          Options.            (line 1542)
+* --disable-new-dtags:                   Options.            (line 1452)
+* --disable-runtime-pseudo-reloc:        Options.            (line 1849)
+* --disable-stdcall-fixup:               Options.            (line 1564)
+* --discard-all:                         Options.            (line  566)
+* --discard-locals:                      Options.            (line  570)
+* --dll:                                 Options.            (line 1537)
+* --dll-search-prefix:                   Options.            (line 1707)
+* --dotsyms:                             PowerPC64 ELF64.    (line   33)
+* --dynamic-linker=FILE:                 Options.            (line  865)
+* --dynamic-list-cpp-new:                Options.            (line  791)
+* --dynamic-list-cpp-typeinfo:           Options.            (line  795)
+* --dynamic-list-data:                   Options.            (line  788)
+* --dynamic-list=DYNAMIC-LIST-FILE:      Options.            (line  775)
+* --dynamicbase:                         Options.            (line 1885)
+* --eh-frame-hdr:                        Options.            (line 1448)
+* --emit-relocs:                         Options.            (line  455)
+* --emit-stack-syms:                     SPU ELF.            (line   46)
+* --emit-stub-syms <1>:                  PowerPC ELF32.      (line   47)
+* --emit-stub-syms <2>:                  SPU ELF.            (line   15)
+* --emit-stub-syms:                      PowerPC64 ELF64.    (line   29)
+* --enable-auto-image-base:              Options.            (line 1693)
+* --enable-auto-import:                  Options.            (line 1716)
+* --enable-extra-pe-debug:               Options.            (line 1854)
+* --enable-long-section-names:           Options.            (line 1542)
+* --enable-new-dtags:                    Options.            (line 1452)
+* --enable-runtime-pseudo-reloc:         Options.            (line 1841)
+* --enable-stdcall-fixup:                Options.            (line 1564)
+* --entry=ENTRY:                         Options.            (line  167)
+* --error-unresolved-symbols:            Options.            (line 1401)
+* --exclude-libs:                        Options.            (line  177)
+* --exclude-modules-for-implib:          Options.            (line  188)
+* --exclude-symbols:                     Options.            (line 1606)
+* --export-all-symbols:                  Options.            (line 1582)
+* --export-dynamic:                      Options.            (line  201)
+* --extra-overlay-stubs:                 SPU ELF.            (line   19)
+* --fatal-warnings:                      Options.            (line  872)
+* --file-alignment:                      Options.            (line 1612)
+* --filter=NAME:                         Options.            (line  256)
+* --fix-cortex-a8:                       i960.               (line   39)
+* --fix-v4bx:                            ARM.                (line   49)
+* --fix-v4bx-interworking:               ARM.                (line   62)
+* --force-dynamic:                       Options.            (line  464)
+* --force-exe-suffix:                    Options.            (line  877)
+* --forceinteg:                          Options.            (line 1890)
+* --format=FORMAT:                       Options.            (line  124)
+* --format=VERSION:                      TI COFF.            (line    6)
+* --gc-sections:                         Options.            (line  887)
+* --got:                                 Options.            (line 1939)
+* --got=TYPE:                            M68K.               (line    6)
+* --gpsize=VALUE:                        Options.            (line  289)
+* --hash-size=NUMBER:                    Options.            (line 1461)
+* --hash-style=STYLE:                    Options.            (line 1469)
+* --heap:                                Options.            (line 1618)
+* --help:                                Options.            (line  918)
+* --image-base:                          Options.            (line 1625)
+* --just-symbols=FILE:                   Options.            (line  487)
+* --kill-at:                             Options.            (line 1634)
+* --large-address-aware:                 Options.            (line 1639)
+* --library-path=DIR:                    Options.            (line  348)
+* --library=NAMESPEC:                    Options.            (line  315)
+* --local-store=lo:hi:                   SPU ELF.            (line   24)
+* --major-image-version:                 Options.            (line 1648)
+* --major-os-version:                    Options.            (line 1653)
+* --major-subsystem-version:             Options.            (line 1657)
+* --minor-image-version:                 Options.            (line 1662)
+* --minor-os-version:                    Options.            (line 1667)
+* --minor-subsystem-version:             Options.            (line 1671)
+* --mri-script=MRI-CMDFILE:              Options.            (line  148)
+* --multi-subspace:                      HPPA ELF32.         (line    6)
+* --nmagic:                              Options.            (line  419)
+* --no-accept-unknown-input-arch:        Options.            (line  693)
+* --no-add-needed:                       Options.            (line  717)
+* --no-allow-shlib-undefined:            Options.            (line  951)
+* --no-as-needed:                        Options.            (line  703)
+* --no-bind:                             Options.            (line 1904)
+* --no-check-sections:                   Options.            (line  799)
+* --no-define-common:                    Options.            (line  823)
+* --no-demangle:                         Options.            (line  852)
+* --no-dotsyms:                          PowerPC64 ELF64.    (line   33)
+* --no-enum-size-warning:                ARM.                (line  111)
+* --no-export-dynamic:                   Options.            (line  201)
+* --no-fatal-warnings:                   Options.            (line  872)
+* --no-fix-cortex-a8:                    i960.               (line   39)
+* --no-gc-sections:                      Options.            (line  887)
+* --no-isolation:                        Options.            (line 1897)
+* --no-keep-memory:                      Options.            (line  930)
+* --no-multi-toc:                        PowerPC64 ELF64.    (line   74)
+* --no-omagic:                           Options.            (line  433)
+* --no-opd-optimize:                     PowerPC64 ELF64.    (line   48)
+* --no-overlays:                         SPU ELF.            (line    9)
+* --no-print-gc-sections:                Options.            (line  909)
+* --no-relax:                            Xtensa.             (line   56)
+* --no-seh:                              Options.            (line 1900)
+* --no-tls-optimize <1>:                 PowerPC ELF32.      (line   51)
+* --no-tls-optimize:                     PowerPC64 ELF64.    (line   43)
+* --no-toc-optimize:                     PowerPC64 ELF64.    (line   60)
+* --no-trampoline:                       Options.            (line 1920)
+* --no-undefined:                        Options.            (line  937)
+* --no-undefined-version:                Options.            (line  979)
+* --no-warn-mismatch:                    Options.            (line  992)
+* --no-warn-search-mismatch:             Options.            (line 1001)
+* --no-wchar-size-warning:               ARM.                (line  118)
+* --no-whole-archive:                    Options.            (line 1005)
+* --noinhibit-exec:                      Options.            (line 1009)
+* --non-overlapping-opd:                 PowerPC64 ELF64.    (line   54)
+* --nxcompat:                            Options.            (line 1893)
+* --oformat=OUTPUT-FORMAT:               Options.            (line 1021)
+* --omagic:                              Options.            (line  424)
+* --out-implib:                          Options.            (line 1684)
+* --output-def:                          Options.            (line 1676)
+* --output=OUTPUT:                       Options.            (line  439)
+* --pic-executable:                      Options.            (line 1034)
+* --pic-veneer:                          ARM.                (line  124)
+* --plugin:                              SPU ELF.            (line    6)
+* --print-gc-sections:                   Options.            (line  909)
+* --print-map:                           Options.            (line  382)
+* --reduce-memory-overheads:             Options.            (line 1475)
+* --relax:                               Options.            (line 1050)
+* --relax on i960:                       i960.               (line   31)
+* --relax on PowerPC:                    PowerPC ELF32.      (line    6)
+* --relax on Xtensa:                     Xtensa.             (line   27)
+* --relocatable:                         Options.            (line  468)
+* --retain-symbols-file=FILENAME:        Options.            (line 1071)
+* --script=SCRIPT:                       Options.            (line  511)
+* --sdata-got:                           PowerPC ELF32.      (line   33)
+* --section-alignment:                   Options.            (line 1859)
+* --section-start=SECTIONNAME=ORG:       Options.            (line 1227)
+* --secure-plt:                          PowerPC ELF32.      (line   26)
+* --sort-common:                         Options.            (line 1169)
+* --sort-section=alignment:              Options.            (line 1184)
+* --sort-section=name:                   Options.            (line 1180)
+* --split-by-file:                       Options.            (line 1188)
+* --split-by-reloc:                      Options.            (line 1193)
+* --stack:                               Options.            (line 1865)
+* --stack-analysis:                      SPU ELF.            (line   29)
+* --stats:                               Options.            (line 1206)
+* --strip-all:                           Options.            (line  498)
+* --strip-debug:                         Options.            (line  502)
+* --stub-group-size:                     PowerPC64 ELF64.    (line    6)
+* --stub-group-size=N <1>:               ARM.                (line  129)
+* --stub-group-size=N:                   HPPA ELF32.         (line   12)
+* --subsystem:                           Options.            (line 1872)
+* --support-old-code:                    ARM.                (line    6)
+* --sysroot=DIRECTORY:                   Options.            (line 1210)
+* --target-help:                         Options.            (line  922)
+* --target1-abs:                         ARM.                (line   32)
+* --target1-rel:                         ARM.                (line   32)
+* --target2=TYPE:                        ARM.                (line   37)
+* --thumb-entry=ENTRY:                   ARM.                (line   17)
+* --trace:                               Options.            (line  507)
+* --trace-symbol=SYMBOL:                 Options.            (line  576)
+* --traditional-format:                  Options.            (line 1215)
+* --tsaware:                             Options.            (line 1910)
+* --undefined=SYMBOL:                    Options.            (line  533)
+* --unique[=SECTION]:                    Options.            (line  551)
+* --unresolved-symbols:                  Options.            (line 1246)
+* --use-blx:                             ARM.                (line   74)
+* --use-nul-prefixed-import-tables:      ARM.                (line   23)
+* --verbose:                             Options.            (line 1275)
+* --version:                             Options.            (line  560)
+* --version-script=VERSION-SCRIPTFILE:   Options.            (line 1281)
+* --vfp11-denorm-fix:                    ARM.                (line   83)
+* --warn-alternate-em:                   Options.            (line 1393)
+* --warn-common:                         Options.            (line 1292)
+* --warn-constructors:                   Options.            (line 1360)
+* --warn-multiple-gp:                    Options.            (line 1365)
+* --warn-once:                           Options.            (line 1379)
+* --warn-section-align:                  Options.            (line 1383)
+* --warn-shared-textrel:                 Options.            (line 1390)
+* --warn-unresolved-symbols:             Options.            (line 1396)
+* --wdmdriver:                           Options.            (line 1907)
+* --whole-archive:                       Options.            (line 1405)
+* --wrap=SYMBOL:                         Options.            (line 1419)
+* -A ARCH:                               Options.            (line  112)
+* -a KEYWORD:                            Options.            (line  105)
+* -assert KEYWORD:                       Options.            (line  727)
+* -b FORMAT:                             Options.            (line  124)
+* -Bdynamic:                             Options.            (line  730)
+* -Bgroup:                               Options.            (line  740)
+* -Bshareable:                           Options.            (line 1162)
+* -Bstatic:                              Options.            (line  747)
+* -Bsymbolic:                            Options.            (line  762)
+* -Bsymbolic-functions:                  Options.            (line  769)
+* -c MRI-CMDFILE:                        Options.            (line  148)
+* -call_shared:                          Options.            (line  730)
+* -d:                                    Options.            (line  158)
+* -dc:                                   Options.            (line  158)
+* -dn:                                   Options.            (line  747)
+* -dp:                                   Options.            (line  158)
+* -dT SCRIPT:                            Options.            (line  520)
+* -dy:                                   Options.            (line  730)
+* -E:                                    Options.            (line  201)
+* -e ENTRY:                              Options.            (line  167)
+* -EB:                                   Options.            (line  228)
+* -EL:                                   Options.            (line  231)
+* -F NAME:                               Options.            (line  256)
+* -f NAME:                               Options.            (line  235)
+* -fini=NAME:                            Options.            (line  280)
+* -g:                                    Options.            (line  286)
+* -G VALUE:                              Options.            (line  289)
+* -h NAME:                               Options.            (line  297)
+* -i:                                    Options.            (line  306)
+* -IFILE:                                Options.            (line  865)
+* -init=NAME:                            Options.            (line  309)
+* -L DIR:                                Options.            (line  348)
+* -l NAMESPEC:                           Options.            (line  315)
+* -M:                                    Options.            (line  382)
+* -m EMULATION:                          Options.            (line  372)
+* -Map=MAPFILE:                          Options.            (line  926)
+* -N:                                    Options.            (line  424)
+* -n:                                    Options.            (line  419)
+* -non_shared:                           Options.            (line  747)
+* -nostdlib:                             Options.            (line 1015)
+* -O LEVEL:                              Options.            (line  445)
+* -o OUTPUT:                             Options.            (line  439)
+* -pie:                                  Options.            (line 1034)
+* -q:                                    Options.            (line  455)
+* -qmagic:                               Options.            (line 1044)
+* -Qy:                                   Options.            (line 1047)
+* -r:                                    Options.            (line  468)
+* -R FILE:                               Options.            (line  487)
+* -rpath-link=DIR:                       Options.            (line 1107)
+* -rpath=DIR:                            Options.            (line 1085)
+* -s:                                    Options.            (line  498)
+* -S:                                    Options.            (line  502)
+* -shared:                               Options.            (line 1162)
+* -soname=NAME:                          Options.            (line  297)
+* -static:                               Options.            (line  747)
+* -t:                                    Options.            (line  507)
+* -T SCRIPT:                             Options.            (line  511)
+* -Tbss=ORG:                             Options.            (line 1236)
+* -Tdata=ORG:                            Options.            (line 1236)
+* -Ttext-segment=ORG:                    Options.            (line 1242)
+* -Ttext=ORG:                            Options.            (line 1236)
+* -u SYMBOL:                             Options.            (line  533)
+* -Ur:                                   Options.            (line  541)
+* -V:                                    Options.            (line  560)
+* -v:                                    Options.            (line  560)
+* -X:                                    Options.            (line  570)
+* -x:                                    Options.            (line  566)
+* -Y PATH:                               Options.            (line  585)
+* -y SYMBOL:                             Options.            (line  576)
+* -z defs:                               Options.            (line  937)
+* -z KEYWORD:                            Options.            (line  589)
+* -z muldefs:                            Options.            (line  945)
+* .:                                     Location Counter.   (line    6)
+* /DISCARD/:                             Output Section Discarding.
+                                                             (line   21)
+* :PHDR:                                 Output Section Phdr.
+                                                             (line    6)
+* =FILLEXP:                              Output Section Fill.
+                                                             (line    6)
+* >REGION:                               Output Section Region.
+                                                             (line    6)
+* [COMMON]:                              Input Section Common.
+                                                             (line   29)
+* ABSOLUTE (MRI):                        MRI.                (line   33)
+* absolute and relocatable symbols:      Expression Section. (line    6)
+* absolute expressions:                  Expression Section. (line    6)
+* ABSOLUTE(EXP):                         Builtin Functions.  (line   10)
+* ADDR(SECTION):                         Builtin Functions.  (line   17)
+* address, section:                      Output Section Address.
+                                                             (line    6)
+* ALIAS (MRI):                           MRI.                (line   44)
+* ALIGN (MRI):                           MRI.                (line   50)
+* align expression:                      Builtin Functions.  (line   36)
+* align location counter:                Builtin Functions.  (line   36)
+* ALIGN(ALIGN):                          Builtin Functions.  (line   36)
+* ALIGN(EXP,ALIGN):                      Builtin Functions.  (line   36)
+* ALIGN(SECTION_ALIGN):                  Forced Output Alignment.
+                                                             (line    6)
+* aligned common symbols:                WIN32.              (line  418)
+* ALIGNOF(SECTION):                      Builtin Functions.  (line   61)
+* allocating memory:                     MEMORY.             (line    6)
+* architecture:                          Miscellaneous Commands.
+                                                             (line   72)
+* architectures:                         Options.            (line  112)
+* archive files, from cmd line:          Options.            (line  315)
+* archive search path in linker script:  File Commands.      (line   74)
+* arithmetic:                            Expressions.        (line    6)
+* arithmetic operators:                  Operators.          (line    6)
+* ARM interworking support:              ARM.                (line    6)
+* AS_NEEDED(FILES):                      File Commands.      (line   54)
+* ASSERT:                                Miscellaneous Commands.
+                                                             (line    9)
+* assertion in linker script:            Miscellaneous Commands.
+                                                             (line    9)
+* assignment in scripts:                 Assignments.        (line    6)
+* AT(LMA):                               Output Section LMA. (line    6)
+* AT>LMA_REGION:                         Output Section LMA. (line    6)
+* automatic data imports:                WIN32.              (line  185)
+* back end:                              BFD.                (line    6)
+* BASE (MRI):                            MRI.                (line   54)
+* BE8:                                   ARM.                (line   28)
+* BFD canonical format:                  Canonical format.   (line   11)
+* BFD requirements:                      BFD.                (line   16)
+* big-endian objects:                    Options.            (line  228)
+* binary input format:                   Options.            (line  124)
+* BLOCK(EXP):                            Builtin Functions.  (line   74)
+* bug criteria:                          Bug Criteria.       (line    6)
+* bug reports:                           Bug Reporting.      (line    6)
+* bugs in ld:                            Reporting Bugs.     (line    6)
+* BYTE(EXPRESSION):                      Output Section Data.
+                                                             (line    6)
+* C++ constructors, arranging in link:   Output Section Keywords.
+                                                             (line   19)
+* CHIP (MRI):                            MRI.                (line   58)
+* COLLECT_NO_DEMANGLE:                   Environment.        (line   29)
+* combining symbols, warnings on:        Options.            (line 1292)
+* command files:                         Scripts.            (line    6)
+* command line:                          Options.            (line    6)
+* common allocation:                     Options.            (line  158)
+* common allocation in linker script:    Miscellaneous Commands.
+                                                             (line   20)
+* common symbol placement:               Input Section Common.
+                                                             (line    6)
+* COMMONPAGESIZE:                        Symbolic Constants. (line   13)
+* compatibility, MRI:                    Options.            (line  148)
+* CONSTANT:                              Symbolic Constants. (line    6)
+* constants in linker scripts:           Constants.          (line    6)
+* constraints on output sections:        Output Section Constraint.
+                                                             (line    6)
+* CONSTRUCTORS:                          Output Section Keywords.
+                                                             (line   19)
+* constructors:                          Options.            (line  541)
+* constructors, arranging in link:       Output Section Keywords.
+                                                             (line   19)
+* Cortex-A8 erratum workaround:          i960.               (line   39)
+* crash of linker:                       Bug Criteria.       (line    9)
+* CREATE_OBJECT_SYMBOLS:                 Output Section Keywords.
+                                                             (line    9)
+* creating a DEF file:                   WIN32.              (line  152)
+* cross reference table:                 Options.            (line  811)
+* cross references:                      Miscellaneous Commands.
+                                                             (line   56)
+* current output location:               Location Counter.   (line    6)
+* data:                                  Output Section Data.
+                                                             (line    6)
+* DATA_SEGMENT_ALIGN(MAXPAGESIZE, COMMONPAGESIZE): Builtin Functions.
+                                                             (line   79)
+* DATA_SEGMENT_END(EXP):                 Builtin Functions.  (line  100)
+* DATA_SEGMENT_RELRO_END(OFFSET, EXP):   Builtin Functions.  (line  106)
+* dbx:                                   Options.            (line 1220)
+* DEF files, creating:                   Options.            (line 1676)
+* default emulation:                     Environment.        (line   21)
+* default input format:                  Environment.        (line    9)
+* DEFINED(SYMBOL):                       Builtin Functions.  (line  117)
+* deleting local symbols:                Options.            (line  566)
+* demangling, default:                   Environment.        (line   29)
+* demangling, from command line:         Options.            (line  852)
+* direct linking to a dll:               WIN32.              (line  233)
+* discarding sections:                   Output Section Discarding.
+                                                             (line    6)
+* discontinuous memory:                  MEMORY.             (line    6)
+* DLLs, creating:                        Options.            (line 1676)
+* DLLs, linking to:                      Options.            (line 1707)
+* dot:                                   Location Counter.   (line    6)
+* dot inside sections:                   Location Counter.   (line   36)
+* dot outside sections:                  Location Counter.   (line   66)
+* dynamic linker, from command line:     Options.            (line  865)
+* dynamic symbol table:                  Options.            (line  201)
+* ELF program headers:                   PHDRS.              (line    6)
+* emulation:                             Options.            (line  372)
+* emulation, default:                    Environment.        (line   21)
+* END (MRI):                             MRI.                (line   62)
+* endianness:                            Options.            (line  228)
+* entry point:                           Entry Point.        (line    6)
+* entry point, from command line:        Options.            (line  167)
+* entry point, thumb:                    ARM.                (line   17)
+* ENTRY(SYMBOL):                         Entry Point.        (line    6)
+* error on valid input:                  Bug Criteria.       (line   12)
+* example of linker script:              Simple Example.     (line    6)
+* exporting DLL symbols:                 WIN32.              (line   19)
+* expression evaluation order:           Evaluation.         (line    6)
+* expression sections:                   Expression Section. (line    6)
+* expression, absolute:                  Builtin Functions.  (line   10)
+* expressions:                           Expressions.        (line    6)
+* EXTERN:                                Miscellaneous Commands.
+                                                             (line   13)
+* fatal signal:                          Bug Criteria.       (line    9)
+* file name wildcard patterns:           Input Section Wildcards.
+                                                             (line    6)
+* FILEHDR:                               PHDRS.              (line   61)
+* filename symbols:                      Output Section Keywords.
+                                                             (line    9)
+* fill pattern, entire section:          Output Section Fill.
+                                                             (line    6)
+* FILL(EXPRESSION):                      Output Section Data.
+                                                             (line   39)
+* finalization function:                 Options.            (line  280)
+* first input file:                      File Commands.      (line   82)
+* first instruction:                     Entry Point.        (line    6)
+* FIX_V4BX:                              ARM.                (line   49)
+* FIX_V4BX_INTERWORKING:                 ARM.                (line   62)
+* FORCE_COMMON_ALLOCATION:               Miscellaneous Commands.
+                                                             (line   20)
+* forcing input section alignment:       Forced Input Alignment.
+                                                             (line    6)
+* forcing output section alignment:      Forced Output Alignment.
+                                                             (line    6)
+* forcing the creation of dynamic sections: Options.         (line  464)
+* FORMAT (MRI):                          MRI.                (line   66)
+* functions in expressions:              Builtin Functions.  (line    6)
+* garbage collection <1>:                Options.            (line  909)
+* garbage collection <2>:                Input Section Keep. (line    6)
+* garbage collection:                    Options.            (line  887)
+* generating optimized output:           Options.            (line  445)
+* GNU linker:                            Overview.           (line    6)
+* GNUTARGET:                             Environment.        (line    9)
+* GROUP(FILES):                          File Commands.      (line   47)
+* grouping input files:                  File Commands.      (line   47)
+* groups of archives:                    Options.            (line  675)
+* H8/300 support:                        H8/300.             (line    6)
+* header size:                           Builtin Functions.  (line  182)
+* heap size:                             Options.            (line 1618)
+* help:                                  Options.            (line  918)
+* holes:                                 Location Counter.   (line   12)
+* holes, filling:                        Output Section Data.
+                                                             (line   39)
+* HPPA multiple sub-space stubs:         HPPA ELF32.         (line    6)
+* HPPA stub grouping:                    HPPA ELF32.         (line   12)
+* i960 support:                          i960.               (line    6)
+* image base:                            Options.            (line 1625)
+* implicit linker scripts:               Implicit Linker Scripts.
+                                                             (line    6)
+* import libraries:                      WIN32.              (line   10)
+* INCLUDE FILENAME:                      File Commands.      (line    9)
+* including a linker script:             File Commands.      (line    9)
+* including an entire archive:           Options.            (line 1405)
+* incremental link:                      Options.            (line  306)
+* INHIBIT_COMMON_ALLOCATION:             Miscellaneous Commands.
+                                                             (line   25)
+* initialization function:               Options.            (line  309)
+* initialized data in ROM:               Output Section LMA. (line   26)
+* input file format in linker script:    Format Commands.    (line   35)
+* input filename symbols:                Output Section Keywords.
+                                                             (line    9)
+* input files in linker scripts:         File Commands.      (line   19)
+* input files, displaying:               Options.            (line  507)
+* input format:                          Options.            (line  124)
+* input object files in linker scripts:  File Commands.      (line   19)
+* input section alignment:               Forced Input Alignment.
+                                                             (line    6)
+* input section basics:                  Input Section Basics.
+                                                             (line    6)
+* input section wildcards:               Input Section Wildcards.
+                                                             (line    6)
+* input sections:                        Input Section.      (line    6)
+* INPUT(FILES):                          File Commands.      (line   19)
+* INSERT:                                Miscellaneous Commands.
+                                                             (line   30)
+* insert user script into default script: Miscellaneous Commands.
+                                                             (line   30)
+* integer notation:                      Constants.          (line    6)
+* integer suffixes:                      Constants.          (line   15)
+* internal object-file format:           Canonical format.   (line   11)
+* invalid input:                         Bug Criteria.       (line   14)
+* K and M integer suffixes:              Constants.          (line   15)
+* KEEP:                                  Input Section Keep. (line    6)
+* l =:                                   MEMORY.             (line   74)
+* lazy evaluation:                       Evaluation.         (line    6)
+* ld bugs, reporting:                    Bug Reporting.      (line    6)
+* LDEMULATION:                           Environment.        (line   21)
+* len =:                                 MEMORY.             (line   74)
+* LENGTH =:                              MEMORY.             (line   74)
+* LENGTH(MEMORY):                        Builtin Functions.  (line  134)
+* library search path in linker script:  File Commands.      (line   74)
+* link map:                              Options.            (line  382)
+* link-time runtime library search path: Options.            (line 1107)
+* linker crash:                          Bug Criteria.       (line    9)
+* linker script concepts:                Basic Script Concepts.
+                                                             (line    6)
+* linker script example:                 Simple Example.     (line    6)
+* linker script file commands:           File Commands.      (line    6)
+* linker script format:                  Script Format.      (line    6)
+* linker script input object files:      File Commands.      (line   19)
+* linker script simple commands:         Simple Commands.    (line    6)
+* linker scripts:                        Scripts.            (line    6)
+* LIST (MRI):                            MRI.                (line   77)
+* little-endian objects:                 Options.            (line  231)
+* LOAD (MRI):                            MRI.                (line   84)
+* load address:                          Output Section LMA. (line    6)
+* LOADADDR(SECTION):                     Builtin Functions.  (line  137)
+* loading, preventing:                   Output Section Type.
+                                                             (line   22)
+* local symbols, deleting:               Options.            (line  570)
+* location counter:                      Location Counter.   (line    6)
+* LONG(EXPRESSION):                      Output Section Data.
+                                                             (line    6)
+* M and K integer suffixes:              Constants.          (line   15)
+* M68HC11 and 68HC12 support:            M68HC11/68HC12.     (line    6)
+* machine architecture:                  Miscellaneous Commands.
+                                                             (line   72)
+* machine dependencies:                  Machine Dependent.  (line    6)
+* mapping input sections to output sections: Input Section.  (line    6)
+* MAX:                                   Builtin Functions.  (line  142)
+* MAXPAGESIZE:                           Symbolic Constants. (line   10)
+* MEMORY:                                MEMORY.             (line    6)
+* memory region attributes:              MEMORY.             (line   34)
+* memory regions:                        MEMORY.             (line    6)
+* memory regions and sections:           Output Section Region.
+                                                             (line    6)
+* memory usage:                          Options.            (line  930)
+* MIN:                                   Builtin Functions.  (line  145)
+* Motorola 68K GOT generation:           M68K.               (line    6)
+* MRI compatibility:                     MRI.                (line    6)
+* MSP430 extra sections:                 MSP430.             (line   11)
+* NAME (MRI):                            MRI.                (line   90)
+* name, section:                         Output Section Name.
+                                                             (line    6)
+* names:                                 Symbols.            (line    6)
+* naming the output file:                Options.            (line  439)
+* NEXT(EXP):                             Builtin Functions.  (line  149)
+* NMAGIC:                                Options.            (line  419)
+* NO_ENUM_SIZE_WARNING:                  ARM.                (line  111)
+* NO_WCHAR_SIZE_WARNING:                 ARM.                (line  118)
+* NOCROSSREFS(SECTIONS):                 Miscellaneous Commands.
+                                                             (line   56)
+* NOLOAD:                                Output Section Type.
+                                                             (line   22)
+* not enough room for program headers:   Builtin Functions.  (line  187)
+* o =:                                   MEMORY.             (line   69)
+* objdump -i:                            BFD.                (line    6)
+* object file management:                BFD.                (line    6)
+* object files:                          Options.            (line   29)
+* object formats available:              BFD.                (line    6)
+* object size:                           Options.            (line  289)
+* OMAGIC:                                Options.            (line  424)
+* ONLY_IF_RO:                            Output Section Constraint.
+                                                             (line    6)
+* ONLY_IF_RW:                            Output Section Constraint.
+                                                             (line    6)
+* opening object files:                  BFD outline.        (line    6)
+* operators for arithmetic:              Operators.          (line    6)
+* options:                               Options.            (line    6)
+* ORDER (MRI):                           MRI.                (line   95)
+* org =:                                 MEMORY.             (line   69)
+* ORIGIN =:                              MEMORY.             (line   69)
+* ORIGIN(MEMORY):                        Builtin Functions.  (line  155)
+* orphan:                                Orphan Sections.    (line    6)
+* output file after errors:              Options.            (line 1009)
+* output file format in linker script:   Format Commands.    (line   10)
+* output file name in linker script:     File Commands.      (line   64)
+* output section alignment:              Forced Output Alignment.
+                                                             (line    6)
+* output section attributes:             Output Section Attributes.
+                                                             (line    6)
+* output section data:                   Output Section Data.
+                                                             (line    6)
+* OUTPUT(FILENAME):                      File Commands.      (line   64)
+* OUTPUT_ARCH(BFDARCH):                  Miscellaneous Commands.
+                                                             (line   72)
+* OUTPUT_FORMAT(BFDNAME):                Format Commands.    (line   10)
+* OVERLAY:                               Overlay Description.
+                                                             (line    6)
+* overlays:                              Overlay Description.
+                                                             (line    6)
+* partial link:                          Options.            (line  468)
+* PE import table prefixing:             ARM.                (line   23)
+* PHDRS:                                 PHDRS.              (line   61)
+* PIC_VENEER:                            ARM.                (line  124)
+* position independent executables:      Options.            (line 1036)
+* PowerPC ELF32 options:                 PowerPC ELF32.      (line   16)
+* PowerPC GOT:                           PowerPC ELF32.      (line   33)
+* PowerPC long branches:                 PowerPC ELF32.      (line    6)
+* PowerPC PLT:                           PowerPC ELF32.      (line   16)
+* PowerPC stub symbols:                  PowerPC ELF32.      (line   47)
+* PowerPC TLS optimization:              PowerPC ELF32.      (line   51)
+* PowerPC64 dot symbols:                 PowerPC64 ELF64.    (line   33)
+* PowerPC64 ELF64 options:               PowerPC64 ELF64.    (line    6)
+* PowerPC64 multi-TOC:                   PowerPC64 ELF64.    (line   74)
+* PowerPC64 OPD optimization:            PowerPC64 ELF64.    (line   48)
+* PowerPC64 OPD spacing:                 PowerPC64 ELF64.    (line   54)
+* PowerPC64 stub grouping:               PowerPC64 ELF64.    (line    6)
+* PowerPC64 stub symbols:                PowerPC64 ELF64.    (line   29)
+* PowerPC64 TLS optimization:            PowerPC64 ELF64.    (line   43)
+* PowerPC64 TOC optimization:            PowerPC64 ELF64.    (line   60)
+* precedence in expressions:             Operators.          (line    6)
+* prevent unnecessary loading:           Output Section Type.
+                                                             (line   22)
+* program headers:                       PHDRS.              (line    6)
+* program headers and sections:          Output Section Phdr.
+                                                             (line    6)
+* program headers, not enough room:      Builtin Functions.  (line  187)
+* program segments:                      PHDRS.              (line    6)
+* PROVIDE:                               PROVIDE.            (line    6)
+* PROVIDE_HIDDEN:                        PROVIDE_HIDDEN.     (line    6)
+* PUBLIC (MRI):                          MRI.                (line  103)
+* QUAD(EXPRESSION):                      Output Section Data.
+                                                             (line    6)
+* quoted symbol names:                   Symbols.            (line    6)
+* read-only text:                        Options.            (line  419)
+* read/write from cmd line:              Options.            (line  424)
+* region alias:                          REGION_ALIAS.       (line    6)
+* region names:                          REGION_ALIAS.       (line    6)
+* REGION_ALIAS(ALIAS, REGION):           REGION_ALIAS.       (line    6)
+* regions of memory:                     MEMORY.             (line    6)
+* relative expressions:                  Expression Section. (line    6)
+* relaxing addressing modes:             Options.            (line 1050)
+* relaxing on H8/300:                    H8/300.             (line    9)
+* relaxing on i960:                      i960.               (line   31)
+* relaxing on M68HC11:                   M68HC11/68HC12.     (line   12)
+* relaxing on Xtensa:                    Xtensa.             (line   27)
+* relocatable and absolute symbols:      Expression Section. (line    6)
+* relocatable output:                    Options.            (line  468)
+* removing sections:                     Output Section Discarding.
+                                                             (line    6)
+* reporting bugs in ld:                  Reporting Bugs.     (line    6)
+* requirements for BFD:                  BFD.                (line   16)
+* retain relocations in final executable: Options.           (line  455)
+* retaining specified symbols:           Options.            (line 1071)
+* ROM initialized data:                  Output Section LMA. (line   26)
+* round up expression:                   Builtin Functions.  (line   36)
+* round up location counter:             Builtin Functions.  (line   36)
+* runtime library name:                  Options.            (line  297)
+* runtime library search path:           Options.            (line 1085)
+* runtime pseudo-relocation:             WIN32.              (line  211)
+* scaled integers:                       Constants.          (line   15)
+* scommon section:                       Input Section Common.
+                                                             (line   20)
+* script files:                          Options.            (line  520)
+* scripts:                               Scripts.            (line    6)
+* search directory, from cmd line:       Options.            (line  348)
+* search path in linker script:          File Commands.      (line   74)
+* SEARCH_DIR(PATH):                      File Commands.      (line   74)
+* SECT (MRI):                            MRI.                (line  109)
+* section address:                       Output Section Address.
+                                                             (line    6)
+* section address in expression:         Builtin Functions.  (line   17)
+* section alignment:                     Builtin Functions.  (line   61)
+* section alignment, warnings on:        Options.            (line 1383)
+* section data:                          Output Section Data.
+                                                             (line    6)
+* section fill pattern:                  Output Section Fill.
+                                                             (line    6)
+* section load address:                  Output Section LMA. (line    6)
+* section load address in expression:    Builtin Functions.  (line  137)
+* section name:                          Output Section Name.
+                                                             (line    6)
+* section name wildcard patterns:        Input Section Wildcards.
+                                                             (line    6)
+* section size:                          Builtin Functions.  (line  166)
+* section, assigning to memory region:   Output Section Region.
+                                                             (line    6)
+* section, assigning to program header:  Output Section Phdr.
+                                                             (line    6)
+* SECTIONS:                              SECTIONS.           (line    6)
+* sections, discarding:                  Output Section Discarding.
+                                                             (line    6)
+* segment origins, cmd line:             Options.            (line 1236)
+* SEGMENT_START(SEGMENT, DEFAULT):       Builtin Functions.  (line  158)
+* segments, ELF:                         PHDRS.              (line    6)
+* shared libraries:                      Options.            (line 1164)
+* SHORT(EXPRESSION):                     Output Section Data.
+                                                             (line    6)
+* SIZEOF(SECTION):                       Builtin Functions.  (line  166)
+* SIZEOF_HEADERS:                        Builtin Functions.  (line  182)
+* small common symbols:                  Input Section Common.
+                                                             (line   20)
+* SORT:                                  Input Section Wildcards.
+                                                             (line   58)
+* SORT_BY_ALIGNMENT:                     Input Section Wildcards.
+                                                             (line   54)
+* SORT_BY_NAME:                          Input Section Wildcards.
+                                                             (line   46)
+* SPU:                                   SPU ELF.            (line   29)
+* SPU ELF options:                       SPU ELF.            (line    6)
+* SPU extra overlay stubs:               SPU ELF.            (line   19)
+* SPU local store size:                  SPU ELF.            (line   24)
+* SPU overlay stub symbols:              SPU ELF.            (line   15)
+* SPU overlays:                          SPU ELF.            (line    9)
+* SPU plugins:                           SPU ELF.            (line    6)
+* SQUAD(EXPRESSION):                     Output Section Data.
+                                                             (line    6)
+* stack size:                            Options.            (line 1865)
+* standard Unix system:                  Options.            (line    7)
+* start of execution:                    Entry Point.        (line    6)
+* STARTUP(FILENAME):                     File Commands.      (line   82)
+* strip all symbols:                     Options.            (line  498)
+* strip debugger symbols:                Options.            (line  502)
+* stripping all but some symbols:        Options.            (line 1071)
+* STUB_GROUP_SIZE:                       ARM.                (line  129)
+* SUBALIGN(SUBSECTION_ALIGN):            Forced Input Alignment.
+                                                             (line    6)
+* suffixes for integers:                 Constants.          (line   15)
+* symbol defaults:                       Builtin Functions.  (line  117)
+* symbol definition, scripts:            Assignments.        (line    6)
+* symbol names:                          Symbols.            (line    6)
+* symbol tracing:                        Options.            (line  576)
+* symbol versions:                       VERSION.            (line    6)
+* symbol-only input:                     Options.            (line  487)
+* symbolic constants:                    Symbolic Constants. (line    6)
+* symbols, from command line:            Options.            (line  839)
+* symbols, relocatable and absolute:     Expression Section. (line    6)
+* symbols, retaining selectively:        Options.            (line 1071)
+* synthesizing linker:                   Options.            (line 1050)
+* synthesizing on H8/300:                H8/300.             (line   14)
+* TARGET(BFDNAME):                       Format Commands.    (line   35)
+* TARGET1:                               ARM.                (line   32)
+* TARGET2:                               ARM.                (line   37)
+* text segment origin, cmd line:         Options.            (line 1243)
+* thumb entry point:                     ARM.                (line   17)
+* TI COFF versions:                      TI COFF.            (line    6)
+* traditional format:                    Options.            (line 1215)
+* trampoline generation on M68HC11:      M68HC11/68HC12.     (line   31)
+* trampoline generation on M68HC12:      M68HC11/68HC12.     (line   31)
+* unallocated address, next:             Builtin Functions.  (line  149)
+* undefined symbol:                      Options.            (line  533)
+* undefined symbol in linker script:     Miscellaneous Commands.
+                                                             (line   13)
+* undefined symbols, warnings on:        Options.            (line 1379)
+* uninitialized data placement:          Input Section Common.
+                                                             (line    6)
+* unspecified memory:                    Output Section Data.
+                                                             (line   39)
+* usage:                                 Options.            (line  918)
+* USE_BLX:                               ARM.                (line   74)
+* using a DEF file:                      WIN32.              (line   57)
+* using auto-export functionality:       WIN32.              (line   22)
+* Using decorations:                     WIN32.              (line  156)
+* variables, defining:                   Assignments.        (line    6)
+* verbose:                               Options.            (line 1275)
+* version:                               Options.            (line  560)
+* version script:                        VERSION.            (line    6)
+* version script, symbol versions:       Options.            (line 1281)
+* VERSION {script text}:                 VERSION.            (line    6)
+* versions of symbols:                   VERSION.            (line    6)
+* VFP11_DENORM_FIX:                      ARM.                (line   83)
+* warnings, on combining symbols:        Options.            (line 1292)
+* warnings, on section alignment:        Options.            (line 1383)
+* warnings, on undefined symbols:        Options.            (line 1379)
+* weak externals:                        WIN32.              (line  401)
+* what is this?:                         Overview.           (line    6)
+* wildcard file name patterns:           Input Section Wildcards.
+                                                             (line    6)
+* Xtensa options:                        Xtensa.             (line   56)
+* Xtensa processors:                     Xtensa.             (line    6)
+
+
+
+Tag Table:
+Node: Top786
+Node: Overview1569
+Node: Invocation2683
+Node: Options3091
+Node: Environment90633
+Node: Scripts92393
+Node: Basic Script Concepts94127
+Node: Script Format96834
+Node: Simple Example97697
+Node: Simple Commands100793
+Node: Entry Point101299
+Node: File Commands102058
+Node: Format Commands106059
+Node: REGION_ALIAS108015
+Node: Miscellaneous Commands112847
+Node: Assignments116223
+Node: Simple Assignments116714
+Node: PROVIDE118450
+Node: PROVIDE_HIDDEN119655
+Node: Source Code Reference119899
+Node: SECTIONS123479
+Node: Output Section Description125370
+Node: Output Section Name126457
+Node: Output Section Address127333
+Node: Input Section129053
+Node: Input Section Basics129854
+Node: Input Section Wildcards133072
+Node: Input Section Common137805
+Node: Input Section Keep139287
+Node: Input Section Example139777
+Node: Output Section Data140745
+Node: Output Section Keywords143522
+Node: Output Section Discarding147091
+Node: Output Section Attributes148272
+Node: Output Section Type149373
+Node: Output Section LMA150527
+Node: Forced Output Alignment153040
+Node: Forced Input Alignment153308
+Node: Output Section Constraint153697
+Node: Output Section Region154125
+Node: Output Section Phdr154558
+Node: Output Section Fill155222
+Node: Overlay Description156364
+Node: MEMORY160666
+Node: PHDRS164998
+Node: VERSION170037
+Node: Expressions178112
+Node: Constants179041
+Node: Symbolic Constants179916
+Node: Symbols180467
+Node: Orphan Sections181214
+Node: Location Counter182378
+Node: Operators186814
+Node: Evaluation187736
+Node: Expression Section189100
+Node: Builtin Functions190589
+Node: Implicit Linker Scripts198551
+Node: Machine Dependent199326
+Node: H8/300200342
+Node: i960201967
+Node: M68HC11/68HC12204068
+Node: ARM205522
+Node: HPPA ELF32213034
+Node: M68K214657
+Node: MMIX215566
+Node: MSP430216731
+Node: PowerPC ELF32217780
+Node: PowerPC64 ELF64220616
+Node: SPU ELF225032
+Node: TI COFF227664
+Node: WIN32228190
+Node: Xtensa247914
+Node: BFD251036
+Node: BFD outline252491
+Node: BFD information loss253777
+Node: Canonical format256294
+Node: Reporting Bugs260651
+Node: Bug Criteria261345
+Node: Bug Reporting262044
+Node: MRI269083
+Node: GNU Free Documentation License273726
+Node: LD Index293431
+
+End Tag Table
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/standards.info b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/standards.info
new file mode 100644
index 00000000..74c19694
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/info/standards.info
@@ -0,0 +1,5744 @@
+This is standards.info, produced by makeinfo version 4.13 from
+../../../newlib-2.0.0/etc/standards.texi.
+
+INFO-DIR-SECTION GNU organization
+START-INFO-DIR-ENTRY
+* Standards: (standards).       GNU coding standards.
+END-INFO-DIR-ENTRY
+
+   The GNU coding standards, last updated April 12, 2010.
+
+   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software
+Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+
+File: standards.info,  Node: Top,  Next: Preface,  Prev: (dir),  Up: (dir)
+
+Version
+*******
+
+The GNU coding standards, last updated April 12, 2010.
+
+   Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
+2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010 Free Software
+Foundation, Inc.
+
+   Permission is granted to copy, distribute and/or modify this document
+under the terms of the GNU Free Documentation License, Version 1.3 or
+any later version published by the Free Software Foundation; with no
+Invariant Sections, with no Front-Cover Texts, and with no Back-Cover
+Texts.  A copy of the license is included in the section entitled "GNU
+Free Documentation License".
+
+* Menu:
+
+* Preface::                     About the GNU Coding Standards.
+* Legal Issues::                Keeping free software free.
+* Design Advice::               General program design.
+* Program Behavior::            Program behavior for all programs
+* Writing C::                   Making the best use of C.
+* Documentation::               Documenting programs.
+* Managing Releases::           The release process.
+* References::                  Mentioning non-free software or documentation.
+* GNU Free Documentation License::  Copying and sharing this manual.
+* Index::
+
+
+File: standards.info,  Node: Preface,  Next: Legal Issues,  Prev: Top,  Up: Top
+
+1 About the GNU Coding Standards
+********************************
+
+The GNU Coding Standards were written by Richard Stallman and other GNU
+Project volunteers.  Their purpose is to make the GNU system clean,
+consistent, and easy to install.  This document can also be read as a
+guide to writing portable, robust and reliable programs.  It focuses on
+programs written in C, but many of the rules and principles are useful
+even if you write in another programming language.  The rules often
+state reasons for writing in a certain way.
+
+   If you did not obtain this file directly from the GNU project and
+recently, please check for a newer version.  You can get the GNU Coding
+Standards from the GNU web server in many different formats, including
+the Texinfo source, PDF, HTML, DVI, plain text, and more, at:
+`http://www.gnu.org/prep/standards/'.
+
+   If you are maintaining an official GNU package, in addition to this
+document, please read and follow the GNU maintainer information (*note
+Contents: (maintain)Top.).
+
+   If you want to receive diffs for every change to these GNU documents,
+join the mailing list `gnustandards-commit@gnu.org', via the web
+interface at
+`http://lists.gnu.org/mailman/listinfo/gnustandards-commit'.  Archives
+are also available there.
+
+   Please send corrections or suggestions for this document to
+<bug-standards@gnu.org>.  If you make a suggestion, please include a
+suggested new wording for it, to help us consider the suggestion
+efficiently.  We prefer a context diff to the Texinfo source, but if
+that's difficult for you, you can make a context diff for some other
+version of this document, or propose it in any way that makes it clear.
+The source repository for this document can be found at
+`http://savannah.gnu.org/projects/gnustandards'.
+
+   These standards cover the minimum of what is important when writing a
+GNU package.  Likely, the need for additional standards will come up.
+Sometimes, you might suggest that such standards be added to this
+document.  If you think your standards would be generally useful, please
+do suggest them.
+
+   You should also set standards for your package on many questions not
+addressed or not firmly specified here.  The most important point is to
+be self-consistent--try to stick to the conventions you pick, and try
+to document them as much as possible.  That way, your program will be
+more maintainable by others.
+
+   The GNU Hello program serves as an example of how to follow the GNU
+coding standards for a trivial program.
+`http://www.gnu.org/software/hello/hello.html'.
+
+   This release of the GNU Coding Standards was last updated April 12,
+2010.
+
+
+File: standards.info,  Node: Legal Issues,  Next: Design Advice,  Prev: Preface,  Up: Top
+
+2 Keeping Free Software Free
+****************************
+
+This chapter discusses how you can make sure that GNU software avoids
+legal difficulties, and other related issues.
+
+* Menu:
+
+* Reading Non-Free Code::       Referring to proprietary programs.
+* Contributions::               Accepting contributions.
+* Trademarks::                  How we deal with trademark issues.
+
+
+File: standards.info,  Node: Reading Non-Free Code,  Next: Contributions,  Up: Legal Issues
+
+2.1 Referring to Proprietary Programs
+=====================================
+
+Don't in any circumstances refer to Unix source code for or during your
+work on GNU!  (Or to any other proprietary programs.)
+
+   If you have a vague recollection of the internals of a Unix program,
+this does not absolutely mean you can't write an imitation of it, but
+do try to organize the imitation internally along different lines,
+because this is likely to make the details of the Unix version
+irrelevant and dissimilar to your results.
+
+   For example, Unix utilities were generally optimized to minimize
+memory use; if you go for speed instead, your program will be very
+different.  You could keep the entire input file in memory and scan it
+there instead of using stdio.  Use a smarter algorithm discovered more
+recently than the Unix program.  Eliminate use of temporary files.  Do
+it in one pass instead of two (we did this in the assembler).
+
+   Or, on the contrary, emphasize simplicity instead of speed.  For some
+applications, the speed of today's computers makes simpler algorithms
+adequate.
+
+   Or go for generality.  For example, Unix programs often have static
+tables or fixed-size strings, which make for arbitrary limits; use
+dynamic allocation instead.  Make sure your program handles NULs and
+other funny characters in the input files.  Add a programming language
+for extensibility and write part of the program in that language.
+
+   Or turn some parts of the program into independently usable
+libraries.  Or use a simple garbage collector instead of tracking
+precisely when to free memory, or use a new GNU facility such as
+obstacks.
+
+
+File: standards.info,  Node: Contributions,  Next: Trademarks,  Prev: Reading Non-Free Code,  Up: Legal Issues
+
+2.2 Accepting Contributions
+===========================
+
+If the program you are working on is copyrighted by the Free Software
+Foundation, then when someone else sends you a piece of code to add to
+the program, we need legal papers to use it--just as we asked you to
+sign papers initially.  _Each_ person who makes a nontrivial
+contribution to a program must sign some sort of legal papers in order
+for us to have clear title to the program; the main author alone is not
+enough.
+
+   So, before adding in any contributions from other people, please tell
+us, so we can arrange to get the papers.  Then wait until we tell you
+that we have received the signed papers, before you actually use the
+contribution.
+
+   This applies both before you release the program and afterward.  If
+you receive diffs to fix a bug, and they make significant changes, we
+need legal papers for that change.
+
+   This also applies to comments and documentation files.  For copyright
+law, comments and code are just text.  Copyright applies to all kinds of
+text, so we need legal papers for all kinds.
+
+   We know it is frustrating to ask for legal papers; it's frustrating
+for us as well.  But if you don't wait, you are going out on a limb--for
+example, what if the contributor's employer won't sign a disclaimer?
+You might have to take that code out again!
+
+   You don't need papers for changes of a few lines here or there, since
+they are not significant for copyright purposes.  Also, you don't need
+papers if all you get from the suggestion is some ideas, not actual code
+which you use.  For example, if someone sent you one implementation, but
+you write a different implementation of the same idea, you don't need to
+get papers.
+
+   The very worst thing is if you forget to tell us about the other
+contributor.  We could be very embarrassed in court some day as a
+result.
+
+   We have more detailed advice for maintainers of programs; if you have
+reached the stage of actually maintaining a program for GNU (whether
+released or not), please ask us for a copy.  It is also available
+online for your perusal: `http://www.gnu.org/prep/maintain/'.
+
+
+File: standards.info,  Node: Trademarks,  Prev: Contributions,  Up: Legal Issues
+
+2.3 Trademarks
+==============
+
+Please do not include any trademark acknowledgements in GNU software
+packages or documentation.
+
+   Trademark acknowledgements are the statements that such-and-such is a
+trademark of so-and-so.  The GNU Project has no objection to the basic
+idea of trademarks, but these acknowledgements feel like kowtowing, and
+there is no legal requirement for them, so we don't use them.
+
+   What is legally required, as regards other people's trademarks, is to
+avoid using them in ways which a reader might reasonably understand as
+naming or labeling our own programs or activities.  For example, since
+"Objective C" is (or at least was) a trademark, we made sure to say
+that we provide a "compiler for the Objective C language" rather than
+an "Objective C compiler".  The latter would have been meant as a
+shorter way of saying the former, but it does not explicitly state the
+relationship, so it could be misinterpreted as using "Objective C" as a
+label for the compiler rather than for the language.
+
+   Please don't use "win" as an abbreviation for Microsoft Windows in
+GNU software or documentation.  In hacker terminology, calling
+something a "win" is a form of praise.  If you wish to praise Microsoft
+Windows when speaking on your own, by all means do so, but not in GNU
+software.  Usually we write the name "Windows" in full, but when
+brevity is very important (as in file names and sometimes symbol
+names), we abbreviate it to "w".  For instance, the files and functions
+in Emacs that deal with Windows start with `w32'.
+
+
+File: standards.info,  Node: Design Advice,  Next: Program Behavior,  Prev: Legal Issues,  Up: Top
+
+3 General Program Design
+************************
+
+This chapter discusses some of the issues you should take into account
+when designing your program.
+
+* Menu:
+
+* Source Language::             Which languages to use.
+* Compatibility::               Compatibility with other implementations.
+* Using Extensions::            Using non-standard features.
+* Standard C::                  Using standard C features.
+* Conditional Compilation::     Compiling code only if a conditional is true.
+
+
+File: standards.info,  Node: Source Language,  Next: Compatibility,  Up: Design Advice
+
+3.1 Which Languages to Use
+==========================
+
+When you want to use a language that gets compiled and runs at high
+speed, the best language to use is C.  Using another language is like
+using a non-standard feature: it will cause trouble for users.  Even if
+GCC supports the other language, users may find it inconvenient to have
+to install the compiler for that other language in order to build your
+program.  For example, if you write your program in C++, people will
+have to install the GNU C++ compiler in order to compile your program.
+
+   C has one other advantage over C++ and other compiled languages: more
+people know C, so more people will find it easy to read and modify the
+program if it is written in C.
+
+   So in general it is much better to use C, rather than the comparable
+alternatives.
+
+   But there are two exceptions to that conclusion:
+
+   * It is no problem to use another language to write a tool
+     specifically intended for use with that language.  That is because
+     the only people who want to build the tool will be those who have
+     installed the other language anyway.
+
+   * If an application is of interest only to a narrow part of the
+     community, then the question of which language it is written in
+     has less effect on other people, so you may as well please
+     yourself.
+
+   Many programs are designed to be extensible: they include an
+interpreter for a language that is higher level than C.  Often much of
+the program is written in that language, too.  The Emacs editor
+pioneered this technique.
+
+   The standard extensibility interpreter for GNU software is Guile
+(`http://www.gnu.org/software/guile/'), which implements the language
+Scheme (an especially clean and simple dialect of Lisp).  Guile also
+includes bindings for GTK+/GNOME, making it practical to write modern
+GUI functionality within Guile.  We don't reject programs written in
+other "scripting languages" such as Perl and Python, but using Guile is
+very important for the overall consistency of the GNU system.
+
+
+File: standards.info,  Node: Compatibility,  Next: Using Extensions,  Prev: Source Language,  Up: Design Advice
+
+3.2 Compatibility with Other Implementations
+============================================
+
+With occasional exceptions, utility programs and libraries for GNU
+should be upward compatible with those in Berkeley Unix, and upward
+compatible with Standard C if Standard C specifies their behavior, and
+upward compatible with POSIX if POSIX specifies their behavior.
+
+   When these standards conflict, it is useful to offer compatibility
+modes for each of them.
+
+   Standard C and POSIX prohibit many kinds of extensions.  Feel free
+to make the extensions anyway, and include a `--ansi', `--posix', or
+`--compatible' option to turn them off.  However, if the extension has
+a significant chance of breaking any real programs or scripts, then it
+is not really upward compatible.  So you should try to redesign its
+interface to make it upward compatible.
+
+   Many GNU programs suppress extensions that conflict with POSIX if the
+environment variable `POSIXLY_CORRECT' is defined (even if it is
+defined with a null value).  Please make your program recognize this
+variable if appropriate.
+
+   When a feature is used only by users (not by programs or command
+files), and it is done poorly in Unix, feel free to replace it
+completely with something totally different and better.  (For example,
+`vi' is replaced with Emacs.)  But it is nice to offer a compatible
+feature as well.  (There is a free `vi' clone, so we offer it.)
+
+   Additional useful features are welcome regardless of whether there
+is any precedent for them.
+
+
+File: standards.info,  Node: Using Extensions,  Next: Standard C,  Prev: Compatibility,  Up: Design Advice
+
+3.3 Using Non-standard Features
+===============================
+
+Many GNU facilities that already exist support a number of convenient
+extensions over the comparable Unix facilities.  Whether to use these
+extensions in implementing your program is a difficult question.
+
+   On the one hand, using the extensions can make a cleaner program.
+On the other hand, people will not be able to build the program unless
+the other GNU tools are available.  This might cause the program to
+work on fewer kinds of machines.
+
+   With some extensions, it might be easy to provide both alternatives.
+For example, you can define functions with a "keyword" `INLINE' and
+define that as a macro to expand into either `inline' or nothing,
+depending on the compiler.
+
+   In general, perhaps it is best not to use the extensions if you can
+straightforwardly do without them, but to use the extensions if they
+are a big improvement.
+
+   An exception to this rule are the large, established programs (such
+as Emacs) which run on a great variety of systems.  Using GNU
+extensions in such programs would make many users unhappy, so we don't
+do that.
+
+   Another exception is for programs that are used as part of
+compilation: anything that must be compiled with other compilers in
+order to bootstrap the GNU compilation facilities.  If these require
+the GNU compiler, then no one can compile them without having them
+installed already.  That would be extremely troublesome in certain
+cases.
+
+
+File: standards.info,  Node: Standard C,  Next: Conditional Compilation,  Prev: Using Extensions,  Up: Design Advice
+
+3.4 Standard C and Pre-Standard C
+=================================
+
+1989 Standard C is widespread enough now that it is ok to use its
+features in new programs.  There is one exception: do not ever use the
+"trigraph" feature of Standard C.
+
+   1999 Standard C is not widespread yet, so please do not require its
+features in programs.  It is ok to use its features if they are present.
+
+   However, it is easy to support pre-standard compilers in most
+programs, so if you know how to do that, feel free.  If a program you
+are maintaining has such support, you should try to keep it working.
+
+   To support pre-standard C, instead of writing function definitions in
+standard prototype form,
+
+     int
+     foo (int x, int y)
+     ...
+
+write the definition in pre-standard style like this,
+
+     int
+     foo (x, y)
+          int x, y;
+     ...
+
+and use a separate declaration to specify the argument prototype:
+
+     int foo (int, int);
+
+   You need such a declaration anyway, in a header file, to get the
+benefit of prototypes in all the files where the function is called.
+And once you have the declaration, you normally lose nothing by writing
+the function definition in the pre-standard style.
+
+   This technique does not work for integer types narrower than `int'.
+If you think of an argument as being of a type narrower than `int',
+declare it as `int' instead.
+
+   There are a few special cases where this technique is hard to use.
+For example, if a function argument needs to hold the system type
+`dev_t', you run into trouble, because `dev_t' is shorter than `int' on
+some machines; but you cannot use `int' instead, because `dev_t' is
+wider than `int' on some machines.  There is no type you can safely use
+on all machines in a non-standard definition.  The only way to support
+non-standard C and pass such an argument is to check the width of
+`dev_t' using Autoconf and choose the argument type accordingly.  This
+may not be worth the trouble.
+
+   In order to support pre-standard compilers that do not recognize
+prototypes, you may want to use a preprocessor macro like this:
+
+     /* Declare the prototype for a general external function.  */
+     #if defined (__STDC__) || defined (WINDOWSNT)
+     #define P_(proto) proto
+     #else
+     #define P_(proto) ()
+     #endif
+
+
+File: standards.info,  Node: Conditional Compilation,  Prev: Standard C,  Up: Design Advice
+
+3.5 Conditional Compilation
+===========================
+
+When supporting configuration options already known when building your
+program we prefer using `if (... )' over conditional compilation, as in
+the former case the compiler is able to perform more extensive checking
+of all possible code paths.
+
+   For example, please write
+
+       if (HAS_FOO)
+         ...
+       else
+         ...
+
+instead of:
+
+       #ifdef HAS_FOO
+         ...
+       #else
+         ...
+       #endif
+
+   A modern compiler such as GCC will generate exactly the same code in
+both cases, and we have been using similar techniques with good success
+in several projects.  Of course, the former method assumes that
+`HAS_FOO' is defined as either 0 or 1.
+
+   While this is not a silver bullet solving all portability problems,
+and is not always appropriate, following this policy would have saved
+GCC developers many hours, or even days, per year.
+
+   In the case of function-like macros like `REVERSIBLE_CC_MODE' in GCC
+which cannot be simply used in `if (...)' statements, there is an easy
+workaround.  Simply introduce another macro `HAS_REVERSIBLE_CC_MODE' as
+in the following example:
+
+       #ifdef REVERSIBLE_CC_MODE
+       #define HAS_REVERSIBLE_CC_MODE 1
+       #else
+       #define HAS_REVERSIBLE_CC_MODE 0
+       #endif
+
+
+File: standards.info,  Node: Program Behavior,  Next: Writing C,  Prev: Design Advice,  Up: Top
+
+4 Program Behavior for All Programs
+***********************************
+
+This chapter describes conventions for writing robust software.  It
+also describes general standards for error messages, the command line
+interface, and how libraries should behave.
+
+* Menu:
+
+* Non-GNU Standards::           We consider standards such as POSIX;
+                                  we don't "obey" them.
+* Semantics::                   Writing robust programs.
+* Libraries::                   Library behavior.
+* Errors::                      Formatting error messages.
+* User Interfaces::             Standards about interfaces generally.
+* Graphical Interfaces::        Standards for graphical interfaces.
+* Command-Line Interfaces::     Standards for command line interfaces.
+* Option Table::                Table of long options.
+* OID Allocations::             Table of OID slots for GNU.
+* Memory Usage::                When and how to care about memory needs.
+* File Usage::                  Which files to use, and where.
+
+
+File: standards.info,  Node: Non-GNU Standards,  Next: Semantics,  Up: Program Behavior
+
+4.1 Non-GNU Standards
+=====================
+
+The GNU Project regards standards published by other organizations as
+suggestions, not orders.  We consider those standards, but we do not
+"obey" them.  In developing a GNU program, you should implement an
+outside standard's specifications when that makes the GNU system better
+overall in an objective sense.  When it doesn't, you shouldn't.
+
+   In most cases, following published standards is convenient for
+users--it means that their programs or scripts will work more portably.
+For instance, GCC implements nearly all the features of Standard C as
+specified by that standard.  C program developers would be unhappy if
+it did not.  And GNU utilities mostly follow specifications of POSIX.2;
+shell script writers and users would be unhappy if our programs were
+incompatible.
+
+   But we do not follow either of these specifications rigidly, and
+there are specific points on which we decided not to follow them, so as
+to make the GNU system better for users.
+
+   For instance, Standard C says that nearly all extensions to C are
+prohibited.  How silly!  GCC implements many extensions, some of which
+were later adopted as part of the standard.  If you want these
+constructs to give an error message as "required" by the standard, you
+must specify `--pedantic', which was implemented only so that we can
+say "GCC is a 100% implementation of the standard," not because there
+is any reason to actually use it.
+
+   POSIX.2 specifies that `df' and `du' must output sizes by default in
+units of 512 bytes.  What users want is units of 1k, so that is what we
+do by default.  If you want the ridiculous behavior "required" by
+POSIX, you must set the environment variable `POSIXLY_CORRECT' (which
+was originally going to be named `POSIX_ME_HARDER').
+
+   GNU utilities also depart from the letter of the POSIX.2
+specification when they support long-named command-line options, and
+intermixing options with ordinary arguments.  This minor
+incompatibility with POSIX is never a problem in practice, and it is
+very useful.
+
+   In particular, don't reject a new feature, or remove an old one,
+merely because a standard says it is "forbidden" or "deprecated."
+
+
+File: standards.info,  Node: Semantics,  Next: Libraries,  Prev: Non-GNU Standards,  Up: Program Behavior
+
+4.2 Writing Robust Programs
+===========================
+
+Avoid arbitrary limits on the length or number of _any_ data structure,
+including file names, lines, files, and symbols, by allocating all data
+structures dynamically.  In most Unix utilities, "long lines are
+silently truncated".  This is not acceptable in a GNU utility.
+
+   Utilities reading files should not drop NUL characters, or any other
+nonprinting characters _including those with codes above 0177_.  The
+only sensible exceptions would be utilities specifically intended for
+interface to certain types of terminals or printers that can't handle
+those characters.  Whenever possible, try to make programs work
+properly with sequences of bytes that represent multibyte characters,
+using encodings such as UTF-8 and others.
+
+   Check every system call for an error return, unless you know you
+wish to ignore errors.  Include the system error text (from `perror' or
+equivalent) in _every_ error message resulting from a failing system
+call, as well as the name of the file if any and the name of the
+utility.  Just "cannot open foo.c" or "stat failed" is not sufficient.
+
+   Check every call to `malloc' or `realloc' to see if it returned
+zero.  Check `realloc' even if you are making the block smaller; in a
+system that rounds block sizes to a power of 2, `realloc' may get a
+different block if you ask for less space.
+
+   In Unix, `realloc' can destroy the storage block if it returns zero.
+GNU `realloc' does not have this bug: if it fails, the original block
+is unchanged.  Feel free to assume the bug is fixed.  If you wish to
+run your program on Unix, and wish to avoid lossage in this case, you
+can use the GNU `malloc'.
+
+   You must expect `free' to alter the contents of the block that was
+freed.  Anything you want to fetch from the block, you must fetch before
+calling `free'.
+
+   If `malloc' fails in a noninteractive program, make that a fatal
+error.  In an interactive program (one that reads commands from the
+user), it is better to abort the command and return to the command
+reader loop.  This allows the user to kill other processes to free up
+virtual memory, and then try the command again.
+
+   Use `getopt_long' to decode arguments, unless the argument syntax
+makes this unreasonable.
+
+   When static storage is to be written in during program execution, use
+explicit C code to initialize it.  Reserve C initialized declarations
+for data that will not be changed.
+
+   Try to avoid low-level interfaces to obscure Unix data structures
+(such as file directories, utmp, or the layout of kernel memory), since
+these are less likely to work compatibly.  If you need to find all the
+files in a directory, use `readdir' or some other high-level interface.
+These are supported compatibly by GNU.
+
+   The preferred signal handling facilities are the BSD variant of
+`signal', and the POSIX `sigaction' function; the alternative USG
+`signal' interface is an inferior design.
+
+   Nowadays, using the POSIX signal functions may be the easiest way to
+make a program portable.  If you use `signal', then on GNU/Linux
+systems running GNU libc version 1, you should include `bsd/signal.h'
+instead of `signal.h', so as to get BSD behavior.  It is up to you
+whether to support systems where `signal' has only the USG behavior, or
+give up on them.
+
+   In error checks that detect "impossible" conditions, just abort.
+There is usually no point in printing any message.  These checks
+indicate the existence of bugs.  Whoever wants to fix the bugs will have
+to read the source code and run a debugger.  So explain the problem with
+comments in the source.  The relevant data will be in variables, which
+are easy to examine with the debugger, so there is no point moving them
+elsewhere.
+
+   Do not use a count of errors as the exit status for a program.
+_That does not work_, because exit status values are limited to 8 bits
+(0 through 255).  A single run of the program might have 256 errors; if
+you try to return 256 as the exit status, the parent process will see 0
+as the status, and it will appear that the program succeeded.
+
+   If you make temporary files, check the `TMPDIR' environment
+variable; if that variable is defined, use the specified directory
+instead of `/tmp'.
+
+   In addition, be aware that there is a possible security problem when
+creating temporary files in world-writable directories.  In C, you can
+avoid this problem by creating temporary files in this manner:
+
+     fd = open (filename, O_WRONLY | O_CREAT | O_EXCL, 0600);
+
+or by using the `mkstemps' function from libiberty.
+
+   In bash, use `set -C' to avoid this problem.
+
+
+File: standards.info,  Node: Libraries,  Next: Errors,  Prev: Semantics,  Up: Program Behavior
+
+4.3 Library Behavior
+====================
+
+Try to make library functions reentrant.  If they need to do dynamic
+storage allocation, at least try to avoid any nonreentrancy aside from
+that of `malloc' itself.
+
+   Here are certain name conventions for libraries, to avoid name
+conflicts.
+
+   Choose a name prefix for the library, more than two characters long.
+All external function and variable names should start with this prefix.
+In addition, there should only be one of these in any given library
+member.  This usually means putting each one in a separate source file.
+
+   An exception can be made when two external symbols are always used
+together, so that no reasonable program could use one without the
+other; then they can both go in the same file.
+
+   External symbols that are not documented entry points for the user
+should have names beginning with `_'.  The `_' should be followed by
+the chosen name prefix for the library, to prevent collisions with
+other libraries.  These can go in the same files with user entry points
+if you like.
+
+   Static functions and variables can be used as you like and need not
+fit any naming convention.
+
+
+File: standards.info,  Node: Errors,  Next: User Interfaces,  Prev: Libraries,  Up: Program Behavior
+
+4.4 Formatting Error Messages
+=============================
+
+Error messages from compilers should look like this:
+
+     SOURCE-FILE-NAME:LINENO: MESSAGE
+
+If you want to mention the column number, use one of these formats:
+
+     SOURCE-FILE-NAME:LINENO:COLUMN: MESSAGE
+     SOURCE-FILE-NAME:LINENO.COLUMN: MESSAGE
+
+Line numbers should start from 1 at the beginning of the file, and
+column numbers should start from 1 at the beginning of the line.  (Both
+of these conventions are chosen for compatibility.)  Calculate column
+numbers assuming that space and all ASCII printing characters have
+equal width, and assuming tab stops every 8 columns.
+
+   The error message can also give both the starting and ending
+positions of the erroneous text.  There are several formats so that you
+can avoid redundant information such as a duplicate line number.  Here
+are the possible formats:
+
+     SOURCE-FILE-NAME:LINENO-1.COLUMN-1-LINENO-2.COLUMN-2: MESSAGE
+     SOURCE-FILE-NAME:LINENO-1.COLUMN-1-COLUMN-2: MESSAGE
+     SOURCE-FILE-NAME:LINENO-1-LINENO-2: MESSAGE
+
+When an error is spread over several files, you can use this format:
+
+     FILE-1:LINENO-1.COLUMN-1-FILE-2:LINENO-2.COLUMN-2: MESSAGE
+
+   Error messages from other noninteractive programs should look like
+this:
+
+     PROGRAM:SOURCE-FILE-NAME:LINENO: MESSAGE
+
+when there is an appropriate source file, or like this:
+
+     PROGRAM: MESSAGE
+
+when there is no relevant source file.
+
+   If you want to mention the column number, use this format:
+
+     PROGRAM:SOURCE-FILE-NAME:LINENO:COLUMN: MESSAGE
+
+   In an interactive program (one that is reading commands from a
+terminal), it is better not to include the program name in an error
+message.  The place to indicate which program is running is in the
+prompt or with the screen layout.  (When the same program runs with
+input from a source other than a terminal, it is not interactive and
+would do best to print error messages using the noninteractive style.)
+
+   The string MESSAGE should not begin with a capital letter when it
+follows a program name and/or file name, because that isn't the
+beginning of a sentence.  (The sentence conceptually starts at the
+beginning of the line.)  Also, it should not end with a period.
+
+   Error messages from interactive programs, and other messages such as
+usage messages, should start with a capital letter.  But they should not
+end with a period.
+
+
+File: standards.info,  Node: User Interfaces,  Next: Graphical Interfaces,  Prev: Errors,  Up: Program Behavior
+
+4.5 Standards for Interfaces Generally
+======================================
+
+Please don't make the behavior of a utility depend on the name used to
+invoke it.  It is useful sometimes to make a link to a utility with a
+different name, and that should not change what it does.
+
+   Instead, use a run time option or a compilation switch or both to
+select among the alternate behaviors.
+
+   Likewise, please don't make the behavior of the program depend on the
+type of output device it is used with.  Device independence is an
+important principle of the system's design; do not compromise it merely
+to save someone from typing an option now and then.  (Variation in error
+message syntax when using a terminal is ok, because that is a side issue
+that people do not depend on.)
+
+   If you think one behavior is most useful when the output is to a
+terminal, and another is most useful when the output is a file or a
+pipe, then it is usually best to make the default behavior the one that
+is useful with output to a terminal, and have an option for the other
+behavior.
+
+   Compatibility requires certain programs to depend on the type of
+output device.  It would be disastrous if `ls' or `sh' did not do so in
+the way all users expect.  In some of these cases, we supplement the
+program with a preferred alternate version that does not depend on the
+output device type.  For example, we provide a `dir' program much like
+`ls' except that its default output format is always multi-column
+format.
+
+
+File: standards.info,  Node: Graphical Interfaces,  Next: Command-Line Interfaces,  Prev: User Interfaces,  Up: Program Behavior
+
+4.6 Standards for Graphical Interfaces
+======================================
+
+When you write a program that provides a graphical user interface,
+please make it work with the X Window System and the GTK+ toolkit
+unless the functionality specifically requires some alternative (for
+example, "displaying jpeg images while in console mode").
+
+   In addition, please provide a command-line interface to control the
+functionality.  (In many cases, the graphical user interface can be a
+separate program which invokes the command-line program.)  This is so
+that the same jobs can be done from scripts.
+
+   Please also consider providing a D-bus interface for use from other
+running programs, such as within GNOME.  (GNOME used to use CORBA for
+this, but that is being phased out.)  In addition, consider providing a
+library interface (for use from C), and perhaps a keyboard-driven
+console interface (for use by users from console mode).  Once you are
+doing the work to provide the functionality and the graphical
+interface, these won't be much extra work.
+
+
+File: standards.info,  Node: Command-Line Interfaces,  Next: Option Table,  Prev: Graphical Interfaces,  Up: Program Behavior
+
+4.7 Standards for Command Line Interfaces
+=========================================
+
+It is a good idea to follow the POSIX guidelines for the command-line
+options of a program.  The easiest way to do this is to use `getopt' to
+parse them.  Note that the GNU version of `getopt' will normally permit
+options anywhere among the arguments unless the special argument `--'
+is used.  This is not what POSIX specifies; it is a GNU extension.
+
+   Please define long-named options that are equivalent to the
+single-letter Unix-style options.  We hope to make GNU more user
+friendly this way.  This is easy to do with the GNU function
+`getopt_long'.
+
+   One of the advantages of long-named options is that they can be
+consistent from program to program.  For example, users should be able
+to expect the "verbose" option of any GNU program which has one, to be
+spelled precisely `--verbose'.  To achieve this uniformity, look at the
+table of common long-option names when you choose the option names for
+your program (*note Option Table::).
+
+   It is usually a good idea for file names given as ordinary arguments
+to be input files only; any output files would be specified using
+options (preferably `-o' or `--output').  Even if you allow an output
+file name as an ordinary argument for compatibility, try to provide an
+option as another way to specify it.  This will lead to more consistency
+among GNU utilities, and fewer idiosyncrasies for users to remember.
+
+   All programs should support two standard options: `--version' and
+`--help'.  CGI programs should accept these as command-line options,
+and also if given as the `PATH_INFO'; for instance, visiting
+`http://example.org/p.cgi/--help' in a browser should output the same
+information as invoking `p.cgi --help' from the command line.
+
+* Menu:
+
+* --version::       The standard output for --version.
+* --help::          The standard output for --help.
+
+
+File: standards.info,  Node: --version,  Next: --help,  Up: Command-Line Interfaces
+
+4.7.1 `--version'
+-----------------
+
+The standard `--version' option should direct the program to print
+information about its name, version, origin and legal status, all on
+standard output, and then exit successfully.  Other options and
+arguments should be ignored once this is seen, and the program should
+not perform its normal function.
+
+   The first line is meant to be easy for a program to parse; the
+version number proper starts after the last space.  In addition, it
+contains the canonical name for this program, in this format:
+
+     GNU Emacs 19.30
+
+The program's name should be a constant string; _don't_ compute it from
+`argv[0]'.  The idea is to state the standard or canonical name for the
+program, not its file name.  There are other ways to find out the
+precise file name where a command is found in `PATH'.
+
+   If the program is a subsidiary part of a larger package, mention the
+package name in parentheses, like this:
+
+     emacsserver (GNU Emacs) 19.30
+
+If the package has a version number which is different from this
+program's version number, you can mention the package version number
+just before the close-parenthesis.
+
+   If you _need_ to mention the version numbers of libraries which are
+distributed separately from the package which contains this program,
+you can do so by printing an additional line of version info for each
+library you want to mention.  Use the same format for these lines as for
+the first line.
+
+   Please do not mention all of the libraries that the program uses
+"just for completeness"--that would produce a lot of unhelpful clutter.
+Please mention library version numbers only if you find in practice that
+they are very important to you in debugging.
+
+   The following line, after the version number line or lines, should
+be a copyright notice.  If more than one copyright notice is called
+for, put each on a separate line.
+
+   Next should follow a line stating the license, preferably using one
+of abbrevations below, and a brief statement that the program is free
+software, and that users are free to copy and change it.  Also mention
+that there is no warranty, to the extent permitted by law.  See
+recommended wording below.
+
+   It is ok to finish the output with a list of the major authors of the
+program, as a way of giving credit.
+
+   Here's an example of output that follows these rules:
+
+     GNU hello 2.3
+     Copyright (C) 2007 Free Software Foundation, Inc.
+     License GPLv3+: GNU GPL version 3 or later <http://gnu.org/licenses/gpl.html>
+     This is free software: you are free to change and redistribute it.
+     There is NO WARRANTY, to the extent permitted by law.
+
+   You should adapt this to your program, of course, filling in the
+proper year, copyright holder, name of program, and the references to
+distribution terms, and changing the rest of the wording as necessary.
+
+   This copyright notice only needs to mention the most recent year in
+which changes were made--there's no need to list the years for previous
+versions' changes.  You don't have to mention the name of the program in
+these notices, if that is inconvenient, since it appeared in the first
+line.  (The rules are different for copyright notices in source files;
+*note Copyright Notices: (maintain)Copyright Notices.)
+
+   Translations of the above lines must preserve the validity of the
+copyright notices (*note Internationalization::).  If the translation's
+character set supports it, the `(C)' should be replaced with the
+copyright symbol, as follows:
+
+   (the official copyright symbol, which is the letter C in a circle);
+
+   Write the word "Copyright" exactly like that, in English.  Do not
+translate it into another language.  International treaties recognize
+the English word "Copyright"; translations into other languages do not
+have legal significance.
+
+   Finally, here is the table of our suggested license abbreviations.
+Any abbreviation can be followed by `vVERSION[+]', meaning that
+particular version, or later versions with the `+', as shown above.
+
+   In the case of exceptions for extra permissions with the GPL, we use
+`/' for a separator; the version number can follow the license
+abbreviation as usual, as in the examples below.
+
+GPL
+     GNU General Public License, `http://www.gnu.org/licenses/gpl.html'.
+
+LGPL
+     GNU Lesser General Public License,
+     `http://www.gnu.org/licenses/lgpl.html'.
+
+GPL/Ada
+     GNU GPL with the exception for Ada.
+
+Apache
+     The Apache Software Foundation license,
+     `http://www.apache.org/licenses'.
+
+Artistic
+     The Artistic license used for Perl,
+     `http://www.perlfoundation.org/legal'.
+
+Expat
+     The Expat license, `http://www.jclark.com/xml/copying.txt'.
+
+MPL
+     The Mozilla Public License, `http://www.mozilla.org/MPL/'.
+
+OBSD
+     The original (4-clause) BSD license, incompatible with the GNU GPL
+     `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#6'.
+
+PHP
+     The license used for PHP, `http://www.php.net/license/'.
+
+public domain
+     The non-license that is being in the public domain,
+     `http://www.gnu.org/licenses/license-list.html#PublicDomain'.
+
+Python
+     The license for Python, `http://www.python.org/2.0.1/license.html'.
+
+RBSD
+     The revised (3-clause) BSD, compatible with the GNU GPL,
+     `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#5'.
+
+X11
+     The simple non-copyleft license used for most versions of the X
+     Window System, `http://www.xfree86.org/3.3.6/COPYRIGHT2.html#3'.
+
+Zlib
+     The license for Zlib, `http://www.gzip.org/zlib/zlib_license.html'.
+
+
+   More information about these licenses and many more are on the GNU
+licensing web pages, `http://www.gnu.org/licenses/license-list.html'.
+
+
+File: standards.info,  Node: --help,  Prev: --version,  Up: Command-Line Interfaces
+
+4.7.2 `--help'
+--------------
+
+The standard `--help' option should output brief documentation for how
+to invoke the program, on standard output, then exit successfully.
+Other options and arguments should be ignored once this is seen, and
+the program should not perform its normal function.
+
+   Near the end of the `--help' option's output, please place lines
+giving the email address for bug reports, the package's home page
+(normally <http://www.gnu.org/software/PKG>, and the general page for
+help using GNU programs.  The format should be like this:
+
+     Report bugs to: MAILING-ADDRESS
+     PKG home page: <http://www.gnu.org/software/PKG/>
+     General help using GNU software: <http://www.gnu.org/gethelp/>
+
+   It is ok to mention other appropriate mailing lists and web pages.
+
+
+File: standards.info,  Node: Option Table,  Next: OID Allocations,  Prev: Command-Line Interfaces,  Up: Program Behavior
+
+4.8 Table of Long Options
+=========================
+
+Here is a table of long options used by GNU programs.  It is surely
+incomplete, but we aim to list all the options that a new program might
+want to be compatible with.  If you use names not already in the table,
+please send <bug-standards@gnu.org> a list of them, with their
+meanings, so we can update the table.
+
+`after-date'
+     `-N' in `tar'.
+
+`all'
+     `-a' in `du', `ls', `nm', `stty', `uname', and `unexpand'.
+
+`all-text'
+     `-a' in `diff'.
+
+`almost-all'
+     `-A' in `ls'.
+
+`append'
+     `-a' in `etags', `tee', `time'; `-r' in `tar'.
+
+`archive'
+     `-a' in `cp'.
+
+`archive-name'
+     `-n' in `shar'.
+
+`arglength'
+     `-l' in `m4'.
+
+`ascii'
+     `-a' in `diff'.
+
+`assign'
+     `-v' in `gawk'.
+
+`assume-new'
+     `-W' in `make'.
+
+`assume-old'
+     `-o' in `make'.
+
+`auto-check'
+     `-a' in `recode'.
+
+`auto-pager'
+     `-a' in `wdiff'.
+
+`auto-reference'
+     `-A' in `ptx'.
+
+`avoid-wraps'
+     `-n' in `wdiff'.
+
+`background'
+     For server programs, run in the background.
+
+`backward-search'
+     `-B' in `ctags'.
+
+`basename'
+     `-f' in `shar'.
+
+`batch'
+     Used in GDB.
+
+`baud'
+     Used in GDB.
+
+`before'
+     `-b' in `tac'.
+
+`binary'
+     `-b' in `cpio' and `diff'.
+
+`bits-per-code'
+     `-b' in `shar'.
+
+`block-size'
+     Used in `cpio' and `tar'.
+
+`blocks'
+     `-b' in `head' and `tail'.
+
+`break-file'
+     `-b' in `ptx'.
+
+`brief'
+     Used in various programs to make output shorter.
+
+`bytes'
+     `-c' in `head', `split', and `tail'.
+
+`c++'
+     `-C' in `etags'.
+
+`catenate'
+     `-A' in `tar'.
+
+`cd'
+     Used in various programs to specify the directory to use.
+
+`changes'
+     `-c' in `chgrp' and `chown'.
+
+`classify'
+     `-F' in `ls'.
+
+`colons'
+     `-c' in `recode'.
+
+`command'
+     `-c' in `su'; `-x' in GDB.
+
+`compare'
+     `-d' in `tar'.
+
+`compat'
+     Used in `gawk'.
+
+`compress'
+     `-Z' in `tar' and `shar'.
+
+`concatenate'
+     `-A' in `tar'.
+
+`confirmation'
+     `-w' in `tar'.
+
+`context'
+     Used in `diff'.
+
+`copyleft'
+     `-W copyleft' in `gawk'.
+
+`copyright'
+     `-C' in `ptx', `recode', and `wdiff'; `-W copyright' in `gawk'.
+
+`core'
+     Used in GDB.
+
+`count'
+     `-q' in `who'.
+
+`count-links'
+     `-l' in `du'.
+
+`create'
+     Used in `tar' and `cpio'.
+
+`cut-mark'
+     `-c' in `shar'.
+
+`cxref'
+     `-x' in `ctags'.
+
+`date'
+     `-d' in `touch'.
+
+`debug'
+     `-d' in `make' and `m4'; `-t' in Bison.
+
+`define'
+     `-D' in `m4'.
+
+`defines'
+     `-d' in Bison and `ctags'.
+
+`delete'
+     `-D' in `tar'.
+
+`dereference'
+     `-L' in `chgrp', `chown', `cpio', `du', `ls', and `tar'.
+
+`dereference-args'
+     `-D' in `du'.
+
+`device'
+     Specify an I/O device (special file name).
+
+`diacritics'
+     `-d' in `recode'.
+
+`dictionary-order'
+     `-d' in `look'.
+
+`diff'
+     `-d' in `tar'.
+
+`digits'
+     `-n' in `csplit'.
+
+`directory'
+     Specify the directory to use, in various programs.  In `ls', it
+     means to show directories themselves rather than their contents.
+     In `rm' and `ln', it means to not treat links to directories
+     specially.
+
+`discard-all'
+     `-x' in `strip'.
+
+`discard-locals'
+     `-X' in `strip'.
+
+`dry-run'
+     `-n' in `make'.
+
+`ed'
+     `-e' in `diff'.
+
+`elide-empty-files'
+     `-z' in `csplit'.
+
+`end-delete'
+     `-x' in `wdiff'.
+
+`end-insert'
+     `-z' in `wdiff'.
+
+`entire-new-file'
+     `-N' in `diff'.
+
+`environment-overrides'
+     `-e' in `make'.
+
+`eof'
+     `-e' in `xargs'.
+
+`epoch'
+     Used in GDB.
+
+`error-limit'
+     Used in `makeinfo'.
+
+`error-output'
+     `-o' in `m4'.
+
+`escape'
+     `-b' in `ls'.
+
+`exclude-from'
+     `-X' in `tar'.
+
+`exec'
+     Used in GDB.
+
+`exit'
+     `-x' in `xargs'.
+
+`exit-0'
+     `-e' in `unshar'.
+
+`expand-tabs'
+     `-t' in `diff'.
+
+`expression'
+     `-e' in `sed'.
+
+`extern-only'
+     `-g' in `nm'.
+
+`extract'
+     `-i' in `cpio'; `-x' in `tar'.
+
+`faces'
+     `-f' in `finger'.
+
+`fast'
+     `-f' in `su'.
+
+`fatal-warnings'
+     `-E' in `m4'.
+
+`file'
+     `-f' in `gawk', `info', `make', `mt', `sed', and `tar'.
+
+`field-separator'
+     `-F' in `gawk'.
+
+`file-prefix'
+     `-b' in Bison.
+
+`file-type'
+     `-F' in `ls'.
+
+`files-from'
+     `-T' in `tar'.
+
+`fill-column'
+     Used in `makeinfo'.
+
+`flag-truncation'
+     `-F' in `ptx'.
+
+`fixed-output-files'
+     `-y' in Bison.
+
+`follow'
+     `-f' in `tail'.
+
+`footnote-style'
+     Used in `makeinfo'.
+
+`force'
+     `-f' in `cp', `ln', `mv', and `rm'.
+
+`force-prefix'
+     `-F' in `shar'.
+
+`foreground'
+     For server programs, run in the foreground; in other words, don't
+     do anything special to run the server in the background.
+
+`format'
+     Used in `ls', `time', and `ptx'.
+
+`freeze-state'
+     `-F' in `m4'.
+
+`fullname'
+     Used in GDB.
+
+`gap-size'
+     `-g' in `ptx'.
+
+`get'
+     `-x' in `tar'.
+
+`graphic'
+     `-i' in `ul'.
+
+`graphics'
+     `-g' in `recode'.
+
+`group'
+     `-g' in `install'.
+
+`gzip'
+     `-z' in `tar' and `shar'.
+
+`hashsize'
+     `-H' in `m4'.
+
+`header'
+     `-h' in `objdump' and `recode'
+
+`heading'
+     `-H' in `who'.
+
+`help'
+     Used to ask for brief usage information.
+
+`here-delimiter'
+     `-d' in `shar'.
+
+`hide-control-chars'
+     `-q' in `ls'.
+
+`html'
+     In `makeinfo', output HTML.
+
+`idle'
+     `-u' in `who'.
+
+`ifdef'
+     `-D' in `diff'.
+
+`ignore'
+     `-I' in `ls'; `-x' in `recode'.
+
+`ignore-all-space'
+     `-w' in `diff'.
+
+`ignore-backups'
+     `-B' in `ls'.
+
+`ignore-blank-lines'
+     `-B' in `diff'.
+
+`ignore-case'
+     `-f' in `look' and `ptx'; `-i' in `diff' and `wdiff'.
+
+`ignore-errors'
+     `-i' in `make'.
+
+`ignore-file'
+     `-i' in `ptx'.
+
+`ignore-indentation'
+     `-I' in `etags'.
+
+`ignore-init-file'
+     `-f' in Oleo.
+
+`ignore-interrupts'
+     `-i' in `tee'.
+
+`ignore-matching-lines'
+     `-I' in `diff'.
+
+`ignore-space-change'
+     `-b' in `diff'.
+
+`ignore-zeros'
+     `-i' in `tar'.
+
+`include'
+     `-i' in `etags'; `-I' in `m4'.
+
+`include-dir'
+     `-I' in `make'.
+
+`incremental'
+     `-G' in `tar'.
+
+`info'
+     `-i', `-l', and `-m' in Finger.
+
+`init-file'
+     In some programs, specify the name of the file to read as the
+     user's init file.
+
+`initial'
+     `-i' in `expand'.
+
+`initial-tab'
+     `-T' in `diff'.
+
+`inode'
+     `-i' in `ls'.
+
+`interactive'
+     `-i' in `cp', `ln', `mv', `rm'; `-e' in `m4'; `-p' in `xargs';
+     `-w' in `tar'.
+
+`intermix-type'
+     `-p' in `shar'.
+
+`iso-8601'
+     Used in `date'
+
+`jobs'
+     `-j' in `make'.
+
+`just-print'
+     `-n' in `make'.
+
+`keep-going'
+     `-k' in `make'.
+
+`keep-files'
+     `-k' in `csplit'.
+
+`kilobytes'
+     `-k' in `du' and `ls'.
+
+`language'
+     `-l' in `etags'.
+
+`less-mode'
+     `-l' in `wdiff'.
+
+`level-for-gzip'
+     `-g' in `shar'.
+
+`line-bytes'
+     `-C' in `split'.
+
+`lines'
+     Used in `split', `head', and `tail'.
+
+`link'
+     `-l' in `cpio'.
+
+`lint'
+`lint-old'
+     Used in `gawk'.
+
+`list'
+     `-t' in `cpio'; `-l' in `recode'.
+
+`list'
+     `-t' in `tar'.
+
+`literal'
+     `-N' in `ls'.
+
+`load-average'
+     `-l' in `make'.
+
+`login'
+     Used in `su'.
+
+`machine'
+     Used in `uname'.
+
+`macro-name'
+     `-M' in `ptx'.
+
+`mail'
+     `-m' in `hello' and `uname'.
+
+`make-directories'
+     `-d' in `cpio'.
+
+`makefile'
+     `-f' in `make'.
+
+`mapped'
+     Used in GDB.
+
+`max-args'
+     `-n' in `xargs'.
+
+`max-chars'
+     `-n' in `xargs'.
+
+`max-lines'
+     `-l' in `xargs'.
+
+`max-load'
+     `-l' in `make'.
+
+`max-procs'
+     `-P' in `xargs'.
+
+`mesg'
+     `-T' in `who'.
+
+`message'
+     `-T' in `who'.
+
+`minimal'
+     `-d' in `diff'.
+
+`mixed-uuencode'
+     `-M' in `shar'.
+
+`mode'
+     `-m' in `install', `mkdir', and `mkfifo'.
+
+`modification-time'
+     `-m' in `tar'.
+
+`multi-volume'
+     `-M' in `tar'.
+
+`name-prefix'
+     `-a' in Bison.
+
+`nesting-limit'
+     `-L' in `m4'.
+
+`net-headers'
+     `-a' in `shar'.
+
+`new-file'
+     `-W' in `make'.
+
+`no-builtin-rules'
+     `-r' in `make'.
+
+`no-character-count'
+     `-w' in `shar'.
+
+`no-check-existing'
+     `-x' in `shar'.
+
+`no-common'
+     `-3' in `wdiff'.
+
+`no-create'
+     `-c' in `touch'.
+
+`no-defines'
+     `-D' in `etags'.
+
+`no-deleted'
+     `-1' in `wdiff'.
+
+`no-dereference'
+     `-d' in `cp'.
+
+`no-inserted'
+     `-2' in `wdiff'.
+
+`no-keep-going'
+     `-S' in `make'.
+
+`no-lines'
+     `-l' in Bison.
+
+`no-piping'
+     `-P' in `shar'.
+
+`no-prof'
+     `-e' in `gprof'.
+
+`no-regex'
+     `-R' in `etags'.
+
+`no-sort'
+     `-p' in `nm'.
+
+`no-splash'
+     Don't print a startup splash screen.
+
+`no-split'
+     Used in `makeinfo'.
+
+`no-static'
+     `-a' in `gprof'.
+
+`no-time'
+     `-E' in `gprof'.
+
+`no-timestamp'
+     `-m' in `shar'.
+
+`no-validate'
+     Used in `makeinfo'.
+
+`no-wait'
+     Used in `emacsclient'.
+
+`no-warn'
+     Used in various programs to inhibit warnings.
+
+`node'
+     `-n' in `info'.
+
+`nodename'
+     `-n' in `uname'.
+
+`nonmatching'
+     `-f' in `cpio'.
+
+`nstuff'
+     `-n' in `objdump'.
+
+`null'
+     `-0' in `xargs'.
+
+`number'
+     `-n' in `cat'.
+
+`number-nonblank'
+     `-b' in `cat'.
+
+`numeric-sort'
+     `-n' in `nm'.
+
+`numeric-uid-gid'
+     `-n' in `cpio' and `ls'.
+
+`nx'
+     Used in GDB.
+
+`old-archive'
+     `-o' in `tar'.
+
+`old-file'
+     `-o' in `make'.
+
+`one-file-system'
+     `-l' in `tar', `cp', and `du'.
+
+`only-file'
+     `-o' in `ptx'.
+
+`only-prof'
+     `-f' in `gprof'.
+
+`only-time'
+     `-F' in `gprof'.
+
+`options'
+     `-o' in `getopt', `fdlist', `fdmount', `fdmountd', and `fdumount'.
+
+`output'
+     In various programs, specify the output file name.
+
+`output-prefix'
+     `-o' in `shar'.
+
+`override'
+     `-o' in `rm'.
+
+`overwrite'
+     `-c' in `unshar'.
+
+`owner'
+     `-o' in `install'.
+
+`paginate'
+     `-l' in `diff'.
+
+`paragraph-indent'
+     Used in `makeinfo'.
+
+`parents'
+     `-p' in `mkdir' and `rmdir'.
+
+`pass-all'
+     `-p' in `ul'.
+
+`pass-through'
+     `-p' in `cpio'.
+
+`port'
+     `-P' in `finger'.
+
+`portability'
+     `-c' in `cpio' and `tar'.
+
+`posix'
+     Used in `gawk'.
+
+`prefix-builtins'
+     `-P' in `m4'.
+
+`prefix'
+     `-f' in `csplit'.
+
+`preserve'
+     Used in `tar' and `cp'.
+
+`preserve-environment'
+     `-p' in `su'.
+
+`preserve-modification-time'
+     `-m' in `cpio'.
+
+`preserve-order'
+     `-s' in `tar'.
+
+`preserve-permissions'
+     `-p' in `tar'.
+
+`print'
+     `-l' in `diff'.
+
+`print-chars'
+     `-L' in `cmp'.
+
+`print-data-base'
+     `-p' in `make'.
+
+`print-directory'
+     `-w' in `make'.
+
+`print-file-name'
+     `-o' in `nm'.
+
+`print-symdefs'
+     `-s' in `nm'.
+
+`printer'
+     `-p' in `wdiff'.
+
+`prompt'
+     `-p' in `ed'.
+
+`proxy'
+     Specify an HTTP proxy.
+
+`query-user'
+     `-X' in `shar'.
+
+`question'
+     `-q' in `make'.
+
+`quiet'
+     Used in many programs to inhibit the usual output.  Every program
+     accepting `--quiet' should accept `--silent' as a synonym.
+
+`quiet-unshar'
+     `-Q' in `shar'
+
+`quote-name'
+     `-Q' in `ls'.
+
+`rcs'
+     `-n' in `diff'.
+
+`re-interval'
+     Used in `gawk'.
+
+`read-full-blocks'
+     `-B' in `tar'.
+
+`readnow'
+     Used in GDB.
+
+`recon'
+     `-n' in `make'.
+
+`record-number'
+     `-R' in `tar'.
+
+`recursive'
+     Used in `chgrp', `chown', `cp', `ls', `diff', and `rm'.
+
+`reference'
+     `-r' in `touch'.
+
+`references'
+     `-r' in `ptx'.
+
+`regex'
+     `-r' in `tac' and `etags'.
+
+`release'
+     `-r' in `uname'.
+
+`reload-state'
+     `-R' in `m4'.
+
+`relocation'
+     `-r' in `objdump'.
+
+`rename'
+     `-r' in `cpio'.
+
+`replace'
+     `-i' in `xargs'.
+
+`report-identical-files'
+     `-s' in `diff'.
+
+`reset-access-time'
+     `-a' in `cpio'.
+
+`reverse'
+     `-r' in `ls' and `nm'.
+
+`reversed-ed'
+     `-f' in `diff'.
+
+`right-side-defs'
+     `-R' in `ptx'.
+
+`same-order'
+     `-s' in `tar'.
+
+`same-permissions'
+     `-p' in `tar'.
+
+`save'
+     `-g' in `stty'.
+
+`se'
+     Used in GDB.
+
+`sentence-regexp'
+     `-S' in `ptx'.
+
+`separate-dirs'
+     `-S' in `du'.
+
+`separator'
+     `-s' in `tac'.
+
+`sequence'
+     Used by `recode' to chose files or pipes for sequencing passes.
+
+`shell'
+     `-s' in `su'.
+
+`show-all'
+     `-A' in `cat'.
+
+`show-c-function'
+     `-p' in `diff'.
+
+`show-ends'
+     `-E' in `cat'.
+
+`show-function-line'
+     `-F' in `diff'.
+
+`show-tabs'
+     `-T' in `cat'.
+
+`silent'
+     Used in many programs to inhibit the usual output.  Every program
+     accepting `--silent' should accept `--quiet' as a synonym.
+
+`size'
+     `-s' in `ls'.
+
+`socket'
+     Specify a file descriptor for a network server to use for its
+     socket, instead of opening and binding a new socket.  This
+     provides a way to run, in a non-privileged process, a server that
+     normally needs a reserved port number.
+
+`sort'
+     Used in `ls'.
+
+`source'
+     `-W source' in `gawk'.
+
+`sparse'
+     `-S' in `tar'.
+
+`speed-large-files'
+     `-H' in `diff'.
+
+`split-at'
+     `-E' in `unshar'.
+
+`split-size-limit'
+     `-L' in `shar'.
+
+`squeeze-blank'
+     `-s' in `cat'.
+
+`start-delete'
+     `-w' in `wdiff'.
+
+`start-insert'
+     `-y' in `wdiff'.
+
+`starting-file'
+     Used in `tar' and `diff' to specify which file within a directory
+     to start processing with.
+
+`statistics'
+     `-s' in `wdiff'.
+
+`stdin-file-list'
+     `-S' in `shar'.
+
+`stop'
+     `-S' in `make'.
+
+`strict'
+     `-s' in `recode'.
+
+`strip'
+     `-s' in `install'.
+
+`strip-all'
+     `-s' in `strip'.
+
+`strip-debug'
+     `-S' in `strip'.
+
+`submitter'
+     `-s' in `shar'.
+
+`suffix'
+     `-S' in `cp', `ln', `mv'.
+
+`suffix-format'
+     `-b' in `csplit'.
+
+`sum'
+     `-s' in `gprof'.
+
+`summarize'
+     `-s' in `du'.
+
+`symbolic'
+     `-s' in `ln'.
+
+`symbols'
+     Used in GDB and `objdump'.
+
+`synclines'
+     `-s' in `m4'.
+
+`sysname'
+     `-s' in `uname'.
+
+`tabs'
+     `-t' in `expand' and `unexpand'.
+
+`tabsize'
+     `-T' in `ls'.
+
+`terminal'
+     `-T' in `tput' and `ul'.  `-t' in `wdiff'.
+
+`text'
+     `-a' in `diff'.
+
+`text-files'
+     `-T' in `shar'.
+
+`time'
+     Used in `ls' and `touch'.
+
+`timeout'
+     Specify how long to wait before giving up on some operation.
+
+`to-stdout'
+     `-O' in `tar'.
+
+`total'
+     `-c' in `du'.
+
+`touch'
+     `-t' in `make', `ranlib', and `recode'.
+
+`trace'
+     `-t' in `m4'.
+
+`traditional'
+     `-t' in `hello'; `-W traditional' in `gawk'; `-G' in `ed', `m4',
+     and `ptx'.
+
+`tty'
+     Used in GDB.
+
+`typedefs'
+     `-t' in `ctags'.
+
+`typedefs-and-c++'
+     `-T' in `ctags'.
+
+`typeset-mode'
+     `-t' in `ptx'.
+
+`uncompress'
+     `-z' in `tar'.
+
+`unconditional'
+     `-u' in `cpio'.
+
+`undefine'
+     `-U' in `m4'.
+
+`undefined-only'
+     `-u' in `nm'.
+
+`update'
+     `-u' in `cp', `ctags', `mv', `tar'.
+
+`usage'
+     Used in `gawk'; same as `--help'.
+
+`uuencode'
+     `-B' in `shar'.
+
+`vanilla-operation'
+     `-V' in `shar'.
+
+`verbose'
+     Print more information about progress.  Many programs support this.
+
+`verify'
+     `-W' in `tar'.
+
+`version'
+     Print the version number.
+
+`version-control'
+     `-V' in `cp', `ln', `mv'.
+
+`vgrind'
+     `-v' in `ctags'.
+
+`volume'
+     `-V' in `tar'.
+
+`what-if'
+     `-W' in `make'.
+
+`whole-size-limit'
+     `-l' in `shar'.
+
+`width'
+     `-w' in `ls' and `ptx'.
+
+`word-regexp'
+     `-W' in `ptx'.
+
+`writable'
+     `-T' in `who'.
+
+`zeros'
+     `-z' in `gprof'.
+
+
+File: standards.info,  Node: OID Allocations,  Next: Memory Usage,  Prev: Option Table,  Up: Program Behavior
+
+4.9 OID Allocations
+===================
+
+The OID (object identifier) 1.3.6.1.4.1.11591 has been assigned to the
+GNU Project (thanks to Werner Koch).  These are used for SNMP, LDAP,
+X.509 certificates, and so on.  The web site
+`http://www.alvestrand.no/objectid' has a (voluntary) listing of many
+OID assignments.
+
+   If you need a new slot for your GNU package, write
+<maintainers@gnu.org>.  Here is a list of arcs currently assigned:
+
+
+     1.3.6.1.4.1.11591 GNU
+
+     1.3.6.1.4.1.11591.1 GNU Radius
+
+     1.3.6.1.4.1.11591.2 GnuPG
+       1.3.6.1.4.1.11591.2.1   notation
+       1.3.6.1.4.1.11591.2.1.1 pkaAddress
+
+     1.3.6.1.4.1.11591.3 GNU Radar
+
+     1.3.6.1.4.1.11591.4 GNU GSS
+
+     1.3.6.1.4.1.11591.5 GNU Mailutils
+
+     1.3.6.1.4.1.11591.6 GNU Shishi
+
+     1.3.6.1.4.1.11591.7 GNU Radio
+
+     1.3.6.1.4.1.11591.12 digestAlgorithm
+       1.3.6.1.4.1.11591.12.2 TIGER/192
+       1.3.6.1.4.1.11591.13 encryptionAlgorithm
+         1.3.6.1.4.1.11591.13.2 Serpent
+           1.3.6.1.4.1.11591.13.2.1 Serpent-128-ECB
+           1.3.6.1.4.1.11591.13.2.2 Serpent-128-CBC
+           1.3.6.1.4.1.11591.13.2.3 Serpent-128-OFB
+           1.3.6.1.4.1.11591.13.2.4 Serpent-128-CFB
+           1.3.6.1.4.1.11591.13.2.21 Serpent-192-ECB
+           1.3.6.1.4.1.11591.13.2.22 Serpent-192-CBC
+           1.3.6.1.4.1.11591.13.2.23 Serpent-192-OFB
+           1.3.6.1.4.1.11591.13.2.24 Serpent-192-CFB
+           1.3.6.1.4.1.11591.13.2.41 Serpent-256-ECB
+           1.3.6.1.4.1.11591.13.2.42 Serpent-256-CBC
+           1.3.6.1.4.1.11591.13.2.43 Serpent-256-OFB
+           1.3.6.1.4.1.11591.13.2.44 Serpent-256-CFB
+       1.3.6.1.4.1.11591.14 CRC algorithms
+         1.3.6.1.4.1.11591.14.1 CRC 32
+
+
+File: standards.info,  Node: Memory Usage,  Next: File Usage,  Prev: OID Allocations,  Up: Program Behavior
+
+4.10 Memory Usage
+=================
+
+If a program typically uses just a few meg of memory, don't bother
+making any effort to reduce memory usage.  For example, if it is
+impractical for other reasons to operate on files more than a few meg
+long, it is reasonable to read entire input files into memory to
+operate on them.
+
+   However, for programs such as `cat' or `tail', that can usefully
+operate on very large files, it is important to avoid using a technique
+that would artificially limit the size of files it can handle.  If a
+program works by lines and could be applied to arbitrary user-supplied
+input files, it should keep only a line in memory, because this is not
+very hard and users will want to be able to operate on input files that
+are bigger than will fit in memory all at once.
+
+   If your program creates complicated data structures, just make them
+in memory and give a fatal error if `malloc' returns zero.
+
+
+File: standards.info,  Node: File Usage,  Prev: Memory Usage,  Up: Program Behavior
+
+4.11 File Usage
+===============
+
+Programs should be prepared to operate when `/usr' and `/etc' are
+read-only file systems.  Thus, if the program manages log files, lock
+files, backup files, score files, or any other files which are modified
+for internal purposes, these files should not be stored in `/usr' or
+`/etc'.
+
+   There are two exceptions.  `/etc' is used to store system
+configuration information; it is reasonable for a program to modify
+files in `/etc' when its job is to update the system configuration.
+Also, if the user explicitly asks to modify one file in a directory, it
+is reasonable for the program to store other files in the same
+directory.
+
+
+File: standards.info,  Node: Writing C,  Next: Documentation,  Prev: Program Behavior,  Up: Top
+
+5 Making The Best Use of C
+**************************
+
+This chapter provides advice on how best to use the C language when
+writing GNU software.
+
+* Menu:
+
+* Formatting::                  Formatting your source code.
+* Comments::                    Commenting your work.
+* Syntactic Conventions::       Clean use of C constructs.
+* Names::                       Naming variables, functions, and files.
+* System Portability::          Portability among different operating systems.
+* CPU Portability::             Supporting the range of CPU types.
+* System Functions::            Portability and ``standard'' library functions.
+* Internationalization::        Techniques for internationalization.
+* Character Set::               Use ASCII by default.
+* Quote Characters::            Use `...' in the C locale.
+* Mmap::                        How you can safely use `mmap'.
+
+
+File: standards.info,  Node: Formatting,  Next: Comments,  Up: Writing C
+
+5.1 Formatting Your Source Code
+===============================
+
+It is important to put the open-brace that starts the body of a C
+function in column one, so that they will start a defun.  Several tools
+look for open-braces in column one to find the beginnings of C
+functions.  These tools will not work on code not formatted that way.
+
+   Avoid putting open-brace, open-parenthesis or open-bracket in column
+one when they are inside a function, so that they won't start a defun.
+The open-brace that starts a `struct' body can go in column one if you
+find it useful to treat that definition as a defun.
+
+   It is also important for function definitions to start the name of
+the function in column one.  This helps people to search for function
+definitions, and may also help certain tools recognize them.  Thus,
+using Standard C syntax, the format is this:
+
+     static char *
+     concat (char *s1, char *s2)
+     {
+       ...
+     }
+
+or, if you want to use traditional C syntax, format the definition like
+this:
+
+     static char *
+     concat (s1, s2)        /* Name starts in column one here */
+          char *s1, *s2;
+     {                     /* Open brace in column one here */
+       ...
+     }
+
+   In Standard C, if the arguments don't fit nicely on one line, split
+it like this:
+
+     int
+     lots_of_args (int an_integer, long a_long, short a_short,
+                   double a_double, float a_float)
+     ...
+
+   The rest of this section gives our recommendations for other aspects
+of C formatting style, which is also the default style of the `indent'
+program in version 1.2 and newer.  It corresponds to the options
+
+     -nbad -bap -nbc -bbo -bl -bli2 -bls -ncdb -nce -cp1 -cs -di2
+     -ndj -nfc1 -nfca -hnl -i2 -ip5 -lp -pcs -psl -nsc -nsob
+
+   We don't think of these recommendations as requirements, because it
+causes no problems for users if two different programs have different
+formatting styles.
+
+   But whatever style you use, please use it consistently, since a
+mixture of styles within one program tends to look ugly.  If you are
+contributing changes to an existing program, please follow the style of
+that program.
+
+   For the body of the function, our recommended style looks like this:
+
+     if (x < foo (y, z))
+       haha = bar[4] + 5;
+     else
+       {
+         while (z)
+           {
+             haha += foo (z, z);
+             z--;
+           }
+         return ++x + bar ();
+       }
+
+   We find it easier to read a program when it has spaces before the
+open-parentheses and after the commas.  Especially after the commas.
+
+   When you split an expression into multiple lines, split it before an
+operator, not after one.  Here is the right way:
+
+     if (foo_this_is_long && bar > win (x, y, z)
+         && remaining_condition)
+
+   Try to avoid having two operators of different precedence at the same
+level of indentation.  For example, don't write this:
+
+     mode = (inmode[j] == VOIDmode
+             || GET_MODE_SIZE (outmode[j]) > GET_MODE_SIZE (inmode[j])
+             ? outmode[j] : inmode[j]);
+
+   Instead, use extra parentheses so that the indentation shows the
+nesting:
+
+     mode = ((inmode[j] == VOIDmode
+              || (GET_MODE_SIZE (outmode[j]) > GET_MODE_SIZE (inmode[j])))
+             ? outmode[j] : inmode[j]);
+
+   Insert extra parentheses so that Emacs will indent the code properly.
+For example, the following indentation looks nice if you do it by hand,
+
+     v = rup->ru_utime.tv_sec*1000 + rup->ru_utime.tv_usec/1000
+         + rup->ru_stime.tv_sec*1000 + rup->ru_stime.tv_usec/1000;
+
+but Emacs would alter it.  Adding a set of parentheses produces
+something that looks equally nice, and which Emacs will preserve:
+
+     v = (rup->ru_utime.tv_sec*1000 + rup->ru_utime.tv_usec/1000
+          + rup->ru_stime.tv_sec*1000 + rup->ru_stime.tv_usec/1000);
+
+   Format do-while statements like this:
+
+     do
+       {
+         a = foo (a);
+       }
+     while (a > 0);
+
+   Please use formfeed characters (control-L) to divide the program into
+pages at logical places (but not within a function).  It does not matter
+just how long the pages are, since they do not have to fit on a printed
+page.  The formfeeds should appear alone on lines by themselves.
+
+
+File: standards.info,  Node: Comments,  Next: Syntactic Conventions,  Prev: Formatting,  Up: Writing C
+
+5.2 Commenting Your Work
+========================
+
+Every program should start with a comment saying briefly what it is for.
+Example: `fmt - filter for simple filling of text'.  This comment
+should be at the top of the source file containing the `main' function
+of the program.
+
+   Also, please write a brief comment at the start of each source file,
+with the file name and a line or two about the overall purpose of the
+file.
+
+   Please write the comments in a GNU program in English, because
+English is the one language that nearly all programmers in all
+countries can read.  If you do not write English well, please write
+comments in English as well as you can, then ask other people to help
+rewrite them.  If you can't write comments in English, please find
+someone to work with you and translate your comments into English.
+
+   Please put a comment on each function saying what the function does,
+what sorts of arguments it gets, and what the possible values of
+arguments mean and are used for.  It is not necessary to duplicate in
+words the meaning of the C argument declarations, if a C type is being
+used in its customary fashion.  If there is anything nonstandard about
+its use (such as an argument of type `char *' which is really the
+address of the second character of a string, not the first), or any
+possible values that would not work the way one would expect (such as,
+that strings containing newlines are not guaranteed to work), be sure
+to say so.
+
+   Also explain the significance of the return value, if there is one.
+
+   Please put two spaces after the end of a sentence in your comments,
+so that the Emacs sentence commands will work.  Also, please write
+complete sentences and capitalize the first word.  If a lower-case
+identifier comes at the beginning of a sentence, don't capitalize it!
+Changing the spelling makes it a different identifier.  If you don't
+like starting a sentence with a lower case letter, write the sentence
+differently (e.g., "The identifier lower-case is ...").
+
+   The comment on a function is much clearer if you use the argument
+names to speak about the argument values.  The variable name itself
+should be lower case, but write it in upper case when you are speaking
+about the value rather than the variable itself.  Thus, "the inode
+number NODE_NUM" rather than "an inode".
+
+   There is usually no purpose in restating the name of the function in
+the comment before it, because the reader can see that for himself.
+There might be an exception when the comment is so long that the
+function itself would be off the bottom of the screen.
+
+   There should be a comment on each static variable as well, like this:
+
+     /* Nonzero means truncate lines in the display;
+        zero means continue them.  */
+     int truncate_lines;
+
+   Every `#endif' should have a comment, except in the case of short
+conditionals (just a few lines) that are not nested.  The comment should
+state the condition of the conditional that is ending, _including its
+sense_.  `#else' should have a comment describing the condition _and
+sense_ of the code that follows.  For example:
+
+     #ifdef foo
+       ...
+     #else /* not foo */
+       ...
+     #endif /* not foo */
+     #ifdef foo
+       ...
+     #endif /* foo */
+
+but, by contrast, write the comments this way for a `#ifndef':
+
+     #ifndef foo
+       ...
+     #else /* foo */
+       ...
+     #endif /* foo */
+     #ifndef foo
+       ...
+     #endif /* not foo */
+
+
+File: standards.info,  Node: Syntactic Conventions,  Next: Names,  Prev: Comments,  Up: Writing C
+
+5.3 Clean Use of C Constructs
+=============================
+
+Please explicitly declare the types of all objects.  For example, you
+should explicitly declare all arguments to functions, and you should
+declare functions to return `int' rather than omitting the `int'.
+
+   Some programmers like to use the GCC `-Wall' option, and change the
+code whenever it issues a warning.  If you want to do this, then do.
+Other programmers prefer not to use `-Wall', because it gives warnings
+for valid and legitimate code which they do not want to change.  If you
+want to do this, then do.  The compiler should be your servant, not
+your master.
+
+   Declarations of external functions and functions to appear later in
+the source file should all go in one place near the beginning of the
+file (somewhere before the first function definition in the file), or
+else should go in a header file.  Don't put `extern' declarations inside
+functions.
+
+   It used to be common practice to use the same local variables (with
+names like `tem') over and over for different values within one
+function.  Instead of doing this, it is better to declare a separate
+local variable for each distinct purpose, and give it a name which is
+meaningful.  This not only makes programs easier to understand, it also
+facilitates optimization by good compilers.  You can also move the
+declaration of each local variable into the smallest scope that includes
+all its uses.  This makes the program even cleaner.
+
+   Don't use local variables or parameters that shadow global
+identifiers.
+
+   Don't declare multiple variables in one declaration that spans lines.
+Start a new declaration on each line, instead.  For example, instead of
+this:
+
+     int    foo,
+            bar;
+
+write either this:
+
+     int foo, bar;
+
+or this:
+
+     int foo;
+     int bar;
+
+(If they are global variables, each should have a comment preceding it
+anyway.)
+
+   When you have an `if'-`else' statement nested in another `if'
+statement, always put braces around the `if'-`else'.  Thus, never write
+like this:
+
+     if (foo)
+       if (bar)
+         win ();
+       else
+         lose ();
+
+always like this:
+
+     if (foo)
+       {
+         if (bar)
+           win ();
+         else
+           lose ();
+       }
+
+   If you have an `if' statement nested inside of an `else' statement,
+either write `else if' on one line, like this,
+
+     if (foo)
+       ...
+     else if (bar)
+       ...
+
+with its `then'-part indented like the preceding `then'-part, or write
+the nested `if' within braces like this:
+
+     if (foo)
+       ...
+     else
+       {
+         if (bar)
+           ...
+       }
+
+   Don't declare both a structure tag and variables or typedefs in the
+same declaration.  Instead, declare the structure tag separately and
+then use it to declare the variables or typedefs.
+
+   Try to avoid assignments inside `if'-conditions (assignments inside
+`while'-conditions are ok).  For example, don't write this:
+
+     if ((foo = (char *) malloc (sizeof *foo)) == 0)
+       fatal ("virtual memory exhausted");
+
+instead, write this:
+
+     foo = (char *) malloc (sizeof *foo);
+     if (foo == 0)
+       fatal ("virtual memory exhausted");
+
+   Don't make the program ugly to placate `lint'.  Please don't insert
+any casts to `void'.  Zero without a cast is perfectly fine as a null
+pointer constant, except when calling a varargs function.
+
+
+File: standards.info,  Node: Names,  Next: System Portability,  Prev: Syntactic Conventions,  Up: Writing C
+
+5.4 Naming Variables, Functions, and Files
+==========================================
+
+The names of global variables and functions in a program serve as
+comments of a sort.  So don't choose terse names--instead, look for
+names that give useful information about the meaning of the variable or
+function.  In a GNU program, names should be English, like other
+comments.
+
+   Local variable names can be shorter, because they are used only
+within one context, where (presumably) comments explain their purpose.
+
+   Try to limit your use of abbreviations in symbol names.  It is ok to
+make a few abbreviations, explain what they mean, and then use them
+frequently, but don't use lots of obscure abbreviations.
+
+   Please use underscores to separate words in a name, so that the Emacs
+word commands can be useful within them.  Stick to lower case; reserve
+upper case for macros and `enum' constants, and for name-prefixes that
+follow a uniform convention.
+
+   For example, you should use names like `ignore_space_change_flag';
+don't use names like `iCantReadThis'.
+
+   Variables that indicate whether command-line options have been
+specified should be named after the meaning of the option, not after
+the option-letter.  A comment should state both the exact meaning of
+the option and its letter.  For example,
+
+     /* Ignore changes in horizontal whitespace (-b).  */
+     int ignore_space_change_flag;
+
+   When you want to define names with constant integer values, use
+`enum' rather than `#define'.  GDB knows about enumeration constants.
+
+   You might want to make sure that none of the file names would
+conflict if the files were loaded onto an MS-DOS file system which
+shortens the names.  You can use the program `doschk' to test for this.
+
+   Some GNU programs were designed to limit themselves to file names of
+14 characters or less, to avoid file name conflicts if they are read
+into older System V systems.  Please preserve this feature in the
+existing GNU programs that have it, but there is no need to do this in
+new GNU programs.  `doschk' also reports file names longer than 14
+characters.
+
+
+File: standards.info,  Node: System Portability,  Next: CPU Portability,  Prev: Names,  Up: Writing C
+
+5.5 Portability between System Types
+====================================
+
+In the Unix world, "portability" refers to porting to different Unix
+versions.  For a GNU program, this kind of portability is desirable, but
+not paramount.
+
+   The primary purpose of GNU software is to run on top of the GNU
+kernel, compiled with the GNU C compiler, on various types of CPU.  So
+the kinds of portability that are absolutely necessary are quite
+limited.  But it is important to support Linux-based GNU systems, since
+they are the form of GNU that is popular.
+
+   Beyond that, it is good to support the other free operating systems
+(*BSD), and it is nice to support other Unix-like systems if you want
+to.  Supporting a variety of Unix-like systems is desirable, although
+not paramount.  It is usually not too hard, so you may as well do it.
+But you don't have to consider it an obligation, if it does turn out to
+be hard.
+
+   The easiest way to achieve portability to most Unix-like systems is
+to use Autoconf.  It's unlikely that your program needs to know more
+information about the host platform than Autoconf can provide, simply
+because most of the programs that need such knowledge have already been
+written.
+
+   Avoid using the format of semi-internal data bases (e.g.,
+directories) when there is a higher-level alternative (`readdir').
+
+   As for systems that are not like Unix, such as MSDOS, Windows, VMS,
+MVS, and older Macintosh systems, supporting them is often a lot of
+work.  When that is the case, it is better to spend your time adding
+features that will be useful on GNU and GNU/Linux, rather than on
+supporting other incompatible systems.
+
+   If you do support Windows, please do not abbreviate it as "win".  In
+hacker terminology, calling something a "win" is a form of praise.
+You're free to praise Microsoft Windows on your own if you want, but
+please don't do this in GNU packages.  Instead of abbreviating
+"Windows" to "win", you can write it in full or abbreviate it to "woe"
+or "w".  In GNU Emacs, for instance, we use `w32' in file names of
+Windows-specific files, but the macro for Windows conditionals is
+called `WINDOWSNT'.
+
+   It is a good idea to define the "feature test macro" `_GNU_SOURCE'
+when compiling your C files.  When you compile on GNU or GNU/Linux,
+this will enable the declarations of GNU library extension functions,
+and that will usually give you a compiler error message if you define
+the same function names in some other way in your program.  (You don't
+have to actually _use_ these functions, if you prefer to make the
+program more portable to other systems.)
+
+   But whether or not you use these GNU extensions, you should avoid
+using their names for any other meanings.  Doing so would make it hard
+to move your code into other GNU programs.
+
+
+File: standards.info,  Node: CPU Portability,  Next: System Functions,  Prev: System Portability,  Up: Writing C
+
+5.6 Portability between CPUs
+============================
+
+Even GNU systems will differ because of differences among CPU
+types--for example, difference in byte ordering and alignment
+requirements.  It is absolutely essential to handle these differences.
+However, don't make any effort to cater to the possibility that an
+`int' will be less than 32 bits.  We don't support 16-bit machines in
+GNU.
+
+   Similarly, don't make any effort to cater to the possibility that
+`long' will be smaller than predefined types like `size_t'.  For
+example, the following code is ok:
+
+     printf ("size = %lu\n", (unsigned long) sizeof array);
+     printf ("diff = %ld\n", (long) (pointer2 - pointer1));
+
+   1989 Standard C requires this to work, and we know of only one
+counterexample: 64-bit programs on Microsoft Windows.  We will leave it
+to those who want to port GNU programs to that environment to figure
+out how to do it.
+
+   Predefined file-size types like `off_t' are an exception: they are
+longer than `long' on many platforms, so code like the above won't work
+with them.  One way to print an `off_t' value portably is to print its
+digits yourself, one by one.
+
+   Don't assume that the address of an `int' object is also the address
+of its least-significant byte.  This is false on big-endian machines.
+Thus, don't make the following mistake:
+
+     int c;
+     ...
+     while ((c = getchar ()) != EOF)
+       write (file_descriptor, &c, 1);
+
+Instead, use `unsigned char' as follows.  (The `unsigned' is for
+portability to unusual systems where `char' is signed and where there
+is integer overflow checking.)
+
+     int c;
+     while ((c = getchar ()) != EOF)
+       {
+         unsigned char u = c;
+         write (file_descriptor, &u, 1);
+       }
+
+   It used to be ok to not worry about the difference between pointers
+and integers when passing arguments to functions.  However, on most
+modern 64-bit machines pointers are wider than `int'.  Conversely,
+integer types like `long long int' and `off_t' are wider than pointers
+on most modern 32-bit machines.  Hence it's often better nowadays to
+use prototypes to define functions whose argument types are not trivial.
+
+   In particular, if functions accept varying argument counts or types
+they should be declared using prototypes containing `...' and defined
+using `stdarg.h'.  For an example of this, please see the Gnulib
+(http://www.gnu.org/software/gnulib/) error module, which declares and
+defines the following function:
+
+     /* Print a message with `fprintf (stderr, FORMAT, ...)';
+        if ERRNUM is nonzero, follow it with ": " and strerror (ERRNUM).
+        If STATUS is nonzero, terminate the program with `exit (STATUS)'.  */
+
+     void error (int status, int errnum, const char *format, ...);
+
+   A simple way to use the Gnulib error module is to obtain the two
+source files `error.c' and `error.h' from the Gnulib library source
+code repository at `http://git.savannah.gnu.org/gitweb/?p=gnulib.git'.
+Here's a sample use:
+
+     #include "error.h"
+     #include <errno.h>
+     #include <stdio.h>
+
+     char *program_name = "myprogram";
+
+     FILE *
+     xfopen (char const *name)
+     {
+       FILE *fp = fopen (name, "r");
+       if (! fp)
+         error (1, errno, "cannot read %s", name);
+       return fp;
+     }
+
+   Avoid casting pointers to integers if you can.  Such casts greatly
+reduce portability, and in most programs they are easy to avoid.  In the
+cases where casting pointers to integers is essential--such as, a Lisp
+interpreter which stores type information as well as an address in one
+word--you'll have to make explicit provisions to handle different word
+sizes.  You will also need to make provision for systems in which the
+normal range of addresses you can get from `malloc' starts far away
+from zero.
+
+
+File: standards.info,  Node: System Functions,  Next: Internationalization,  Prev: CPU Portability,  Up: Writing C
+
+5.7 Calling System Functions
+============================
+
+C implementations differ substantially.  Standard C reduces but does
+not eliminate the incompatibilities; meanwhile, many GNU packages still
+support pre-standard compilers because this is not hard to do.  This
+chapter gives recommendations for how to use the more-or-less standard C
+library functions to avoid unnecessary loss of portability.
+
+   * Don't use the return value of `sprintf'.  It returns the number of
+     characters written on some systems, but not on all systems.
+
+   * Be aware that `vfprintf' is not always available.
+
+   * `main' should be declared to return type `int'.  It should
+     terminate either by calling `exit' or by returning the integer
+     status code; make sure it cannot ever return an undefined value.
+
+   * Don't declare system functions explicitly.
+
+     Almost any declaration for a system function is wrong on some
+     system.  To minimize conflicts, leave it to the system header
+     files to declare system functions.  If the headers don't declare a
+     function, let it remain undeclared.
+
+     While it may seem unclean to use a function without declaring it,
+     in practice this works fine for most system library functions on
+     the systems where this really happens; thus, the disadvantage is
+     only theoretical.  By contrast, actual declarations have
+     frequently caused actual conflicts.
+
+   * If you must declare a system function, don't specify the argument
+     types.  Use an old-style declaration, not a Standard C prototype.
+     The more you specify about the function, the more likely a
+     conflict.
+
+   * In particular, don't unconditionally declare `malloc' or `realloc'.
+
+     Most GNU programs use those functions just once, in functions
+     conventionally named `xmalloc' and `xrealloc'.  These functions
+     call `malloc' and `realloc', respectively, and check the results.
+
+     Because `xmalloc' and `xrealloc' are defined in your program, you
+     can declare them in other files without any risk of type conflict.
+
+     On most systems, `int' is the same length as a pointer; thus, the
+     calls to `malloc' and `realloc' work fine.  For the few
+     exceptional systems (mostly 64-bit machines), you can use
+     *conditionalized* declarations of `malloc' and `realloc'--or put
+     these declarations in configuration files specific to those
+     systems.
+
+   * The string functions require special treatment.  Some Unix systems
+     have a header file `string.h'; others have `strings.h'.  Neither
+     file name is portable.  There are two things you can do: use
+     Autoconf to figure out which file to include, or don't include
+     either file.
+
+   * If you don't include either strings file, you can't get
+     declarations for the string functions from the header file in the
+     usual way.
+
+     That causes less of a problem than you might think.  The newer
+     standard string functions should be avoided anyway because many
+     systems still don't support them.  The string functions you can
+     use are these:
+
+          strcpy   strncpy   strcat   strncat
+          strlen   strcmp    strncmp
+          strchr   strrchr
+
+     The copy and concatenate functions work fine without a declaration
+     as long as you don't use their values.  Using their values without
+     a declaration fails on systems where the width of a pointer
+     differs from the width of `int', and perhaps in other cases.  It
+     is trivial to avoid using their values, so do that.
+
+     The compare functions and `strlen' work fine without a declaration
+     on most systems, possibly all the ones that GNU software runs on.
+     You may find it necessary to declare them *conditionally* on a few
+     systems.
+
+     The search functions must be declared to return `char *'.  Luckily,
+     there is no variation in the data type they return.  But there is
+     variation in their names.  Some systems give these functions the
+     names `index' and `rindex'; other systems use the names `strchr'
+     and `strrchr'.  Some systems support both pairs of names, but
+     neither pair works on all systems.
+
+     You should pick a single pair of names and use it throughout your
+     program.  (Nowadays, it is better to choose `strchr' and `strrchr'
+     for new programs, since those are the standard names.)  Declare
+     both of those names as functions returning `char *'.  On systems
+     which don't support those names, define them as macros in terms of
+     the other pair.  For example, here is what to put at the beginning
+     of your file (or in a header) if you want to use the names
+     `strchr' and `strrchr' throughout:
+
+          #ifndef HAVE_STRCHR
+          #define strchr index
+          #endif
+          #ifndef HAVE_STRRCHR
+          #define strrchr rindex
+          #endif
+
+          char *strchr ();
+          char *strrchr ();
+
+   Here we assume that `HAVE_STRCHR' and `HAVE_STRRCHR' are macros
+defined in systems where the corresponding functions exist.  One way to
+get them properly defined is to use Autoconf.
+
+
+File: standards.info,  Node: Internationalization,  Next: Character Set,  Prev: System Functions,  Up: Writing C
+
+5.8 Internationalization
+========================
+
+GNU has a library called GNU gettext that makes it easy to translate the
+messages in a program into various languages.  You should use this
+library in every program.  Use English for the messages as they appear
+in the program, and let gettext provide the way to translate them into
+other languages.
+
+   Using GNU gettext involves putting a call to the `gettext' macro
+around each string that might need translation--like this:
+
+     printf (gettext ("Processing file `%s'..."));
+
+This permits GNU gettext to replace the string `"Processing file
+`%s'..."' with a translated version.
+
+   Once a program uses gettext, please make a point of writing calls to
+`gettext' when you add new strings that call for translation.
+
+   Using GNU gettext in a package involves specifying a "text domain
+name" for the package.  The text domain name is used to separate the
+translations for this package from the translations for other packages.
+Normally, the text domain name should be the same as the name of the
+package--for example, `coreutils' for the GNU core utilities.
+
+   To enable gettext to work well, avoid writing code that makes
+assumptions about the structure of words or sentences.  When you want
+the precise text of a sentence to vary depending on the data, use two or
+more alternative string constants each containing a complete sentences,
+rather than inserting conditionalized words or phrases into a single
+sentence framework.
+
+   Here is an example of what not to do:
+
+     printf ("%s is full", capacity > 5000000 ? "disk" : "floppy disk");
+
+   If you apply gettext to all strings, like this,
+
+     printf (gettext ("%s is full"),
+             capacity > 5000000 ? gettext ("disk") : gettext ("floppy disk"));
+
+the translator will hardly know that "disk" and "floppy disk" are meant
+to be substituted in the other string.  Worse, in some languages (like
+French) the construction will not work: the translation of the word
+"full" depends on the gender of the first part of the sentence; it
+happens to be not the same for "disk" as for "floppy disk".
+
+   Complete sentences can be translated without problems:
+
+     printf (capacity > 5000000 ? gettext ("disk is full")
+             : gettext ("floppy disk is full"));
+
+   A similar problem appears at the level of sentence structure with
+this code:
+
+     printf ("#  Implicit rule search has%s been done.\n",
+             f->tried_implicit ? "" : " not");
+
+Adding `gettext' calls to this code cannot give correct results for all
+languages, because negation in some languages requires adding words at
+more than one place in the sentence.  By contrast, adding `gettext'
+calls does the job straightforwardly if the code starts out like this:
+
+     printf (f->tried_implicit
+             ? "#  Implicit rule search has been done.\n",
+             : "#  Implicit rule search has not been done.\n");
+
+   Another example is this one:
+
+     printf ("%d file%s processed", nfiles,
+             nfiles != 1 ? "s" : "");
+
+The problem with this example is that it assumes that plurals are made
+by adding `s'.  If you apply gettext to the format string, like this,
+
+     printf (gettext ("%d file%s processed"), nfiles,
+             nfiles != 1 ? "s" : "");
+
+the message can use different words, but it will still be forced to use
+`s' for the plural.  Here is a better way, with gettext being applied to
+the two strings independently:
+
+     printf ((nfiles != 1 ? gettext ("%d files processed")
+              : gettext ("%d file processed")),
+             nfiles);
+
+But this still doesn't work for languages like Polish, which has three
+plural forms: one for nfiles == 1, one for nfiles == 2, 3, 4, 22, 23,
+24, ...  and one for the rest.  The GNU `ngettext' function solves this
+problem:
+
+     printf (ngettext ("%d files processed", "%d file processed", nfiles),
+             nfiles);
+
+
+File: standards.info,  Node: Character Set,  Next: Quote Characters,  Prev: Internationalization,  Up: Writing C
+
+5.9 Character Set
+=================
+
+Sticking to the ASCII character set (plain text, 7-bit characters) is
+preferred in GNU source code comments, text documents, and other
+contexts, unless there is good reason to do something else because of
+the application domain.  For example, if source code deals with the
+French Revolutionary calendar, it is OK if its literal strings contain
+accented characters in month names like "Flore'al".  Also, it is OK to
+use non-ASCII characters to represent proper names of contributors in
+change logs (*note Change Logs::).
+
+   If you need to use non-ASCII characters, you should normally stick
+with one encoding, as one cannot in general mix encodings reliably.
+
+
+File: standards.info,  Node: Quote Characters,  Next: Mmap,  Prev: Character Set,  Up: Writing C
+
+5.10 Quote Characters
+=====================
+
+In the C locale, GNU programs should stick to plain ASCII for quotation
+characters in messages to users: preferably 0x60 (``') for left quotes
+and 0x27 (`'') for right quotes.  It is ok, but not required, to use
+locale-specific quotes in other locales.
+
+   The Gnulib (http://www.gnu.org/software/gnulib/) `quote' and
+`quotearg' modules provide a reasonably straightforward way to support
+locale-specific quote characters, as well as taking care of other
+issues, such as quoting a filename that itself contains a quote
+character.  See the Gnulib documentation for usage details.
+
+   In any case, the documentation for your program should clearly
+specify how it does quoting, if different than the preferred method of
+``' and `''.  This is especially important if the output of your
+program is ever likely to be parsed by another program.
+
+   Quotation characters are a difficult area in the computing world at
+this time: there are no true left or right quote characters in Latin1;
+the ``' character we use was standardized there as a grave accent.
+Moreover, Latin1 is still not universally usable.
+
+   Unicode contains the unambiguous quote characters required, and its
+common encoding UTF-8 is upward compatible with Latin1.  However,
+Unicode and UTF-8 are not universally well-supported, either.
+
+   This may change over the next few years, and then we will revisit
+this.
+
+
+File: standards.info,  Node: Mmap,  Prev: Quote Characters,  Up: Writing C
+
+5.11 Mmap
+=========
+
+Don't assume that `mmap' either works on all files or fails for all
+files.  It may work on some files and fail on others.
+
+   The proper way to use `mmap' is to try it on the specific file for
+which you want to use it--and if `mmap' doesn't work, fall back on
+doing the job in another way using `read' and `write'.
+
+   The reason this precaution is needed is that the GNU kernel (the
+HURD) provides a user-extensible file system, in which there can be many
+different kinds of "ordinary files."  Many of them support `mmap', but
+some do not.  It is important to make programs handle all these kinds
+of files.
+
+
+File: standards.info,  Node: Documentation,  Next: Managing Releases,  Prev: Writing C,  Up: Top
+
+6 Documenting Programs
+**********************
+
+A GNU program should ideally come with full free documentation, adequate
+for both reference and tutorial purposes.  If the package can be
+programmed or extended, the documentation should cover programming or
+extending it, as well as just using it.
+
+* Menu:
+
+* GNU Manuals::                 Writing proper manuals.
+* Doc Strings and Manuals::     Compiling doc strings doesn't make a manual.
+* Manual Structure Details::    Specific structure conventions.
+* License for Manuals::         Writing the distribution terms for a manual.
+* Manual Credits::              Giving credit to documentation contributors.
+* Printed Manuals::             Mentioning the printed manual.
+* NEWS File::                   NEWS files supplement manuals.
+* Change Logs::                 Recording changes.
+* Man Pages::                   Man pages are secondary.
+* Reading other Manuals::       How far you can go in learning
+                                from other manuals.
+
+
+File: standards.info,  Node: GNU Manuals,  Next: Doc Strings and Manuals,  Up: Documentation
+
+6.1 GNU Manuals
+===============
+
+The preferred document format for the GNU system is the Texinfo
+formatting language.  Every GNU package should (ideally) have
+documentation in Texinfo both for reference and for learners.  Texinfo
+makes it possible to produce a good quality formatted book, using TeX,
+and to generate an Info file.  It is also possible to generate HTML
+output from Texinfo source.  See the Texinfo manual, either the
+hardcopy, or the on-line version available through `info' or the Emacs
+Info subsystem (`C-h i').
+
+   Nowadays some other formats such as Docbook and Sgmltexi can be
+converted automatically into Texinfo.  It is ok to produce the Texinfo
+documentation by conversion this way, as long as it gives good results.
+
+   Make sure your manual is clear to a reader who knows nothing about
+the topic and reads it straight through.  This means covering basic
+topics at the beginning, and advanced topics only later.  This also
+means defining every specialized term when it is first used.
+
+   Programmers tend to carry over the structure of the program as the
+structure for its documentation.  But this structure is not necessarily
+good for explaining how to use the program; it may be irrelevant and
+confusing for a user.
+
+   Instead, the right way to structure documentation is according to the
+concepts and questions that a user will have in mind when reading it.
+This principle applies at every level, from the lowest (ordering
+sentences in a paragraph) to the highest (ordering of chapter topics
+within the manual).  Sometimes this structure of ideas matches the
+structure of the implementation of the software being documented--but
+often they are different.  An important part of learning to write good
+documentation is to learn to notice when you have unthinkingly
+structured the documentation like the implementation, stop yourself,
+and look for better alternatives.
+
+   For example, each program in the GNU system probably ought to be
+documented in one manual; but this does not mean each program should
+have its own manual.  That would be following the structure of the
+implementation, rather than the structure that helps the user
+understand.
+
+   Instead, each manual should cover a coherent _topic_.  For example,
+instead of a manual for `diff' and a manual for `diff3', we have one
+manual for "comparison of files" which covers both of those programs,
+as well as `cmp'.  By documenting these programs together, we can make
+the whole subject clearer.
+
+   The manual which discusses a program should certainly document all of
+the program's command-line options and all of its commands.  It should
+give examples of their use.  But don't organize the manual as a list of
+features.  Instead, organize it logically, by subtopics.  Address the
+questions that a user will ask when thinking about the job that the
+program does.  Don't just tell the reader what each feature can do--say
+what jobs it is good for, and show how to use it for those jobs.
+Explain what is recommended usage, and what kinds of usage users should
+avoid.
+
+   In general, a GNU manual should serve both as tutorial and reference.
+It should be set up for convenient access to each topic through Info,
+and for reading straight through (appendixes aside).  A GNU manual
+should give a good introduction to a beginner reading through from the
+start, and should also provide all the details that hackers want.  The
+Bison manual is a good example of this--please take a look at it to see
+what we mean.
+
+   That is not as hard as it first sounds.  Arrange each chapter as a
+logical breakdown of its topic, but order the sections, and write their
+text, so that reading the chapter straight through makes sense.  Do
+likewise when structuring the book into chapters, and when structuring a
+section into paragraphs.  The watchword is, _at each point, address the
+most fundamental and important issue raised by the preceding text._
+
+   If necessary, add extra chapters at the beginning of the manual which
+are purely tutorial and cover the basics of the subject.  These provide
+the framework for a beginner to understand the rest of the manual.  The
+Bison manual provides a good example of how to do this.
+
+   To serve as a reference, a manual should have an Index that list all
+the functions, variables, options, and important concepts that are part
+of the program.  One combined Index should do for a short manual, but
+sometimes for a complex package it is better to use multiple indices.
+The Texinfo manual includes advice on preparing good index entries, see
+*note Making Index Entries: (texinfo)Index Entries, and see *note
+Defining the Entries of an Index: (texinfo)Indexing Commands.
+
+   Don't use Unix man pages as a model for how to write GNU
+documentation; most of them are terse, badly structured, and give
+inadequate explanation of the underlying concepts.  (There are, of
+course, some exceptions.)  Also, Unix man pages use a particular format
+which is different from what we use in GNU manuals.
+
+   Please include an email address in the manual for where to report
+bugs _in the text of the manual_.
+
+   Please do not use the term "pathname" that is used in Unix
+documentation; use "file name" (two words) instead.  We use the term
+"path" only for search paths, which are lists of directory names.
+
+   Please do not use the term "illegal" to refer to erroneous input to
+a computer program.  Please use "invalid" for this, and reserve the
+term "illegal" for activities prohibited by law.
+
+   Please do not write `()' after a function name just to indicate it
+is a function.  `foo ()' is not a function, it is a function call with
+no arguments.
+
+
+File: standards.info,  Node: Doc Strings and Manuals,  Next: Manual Structure Details,  Prev: GNU Manuals,  Up: Documentation
+
+6.2 Doc Strings and Manuals
+===========================
+
+Some programming systems, such as Emacs, provide a documentation string
+for each function, command or variable.  You may be tempted to write a
+reference manual by compiling the documentation strings and writing a
+little additional text to go around them--but you must not do it.  That
+approach is a fundamental mistake.  The text of well-written
+documentation strings will be entirely wrong for a manual.
+
+   A documentation string needs to stand alone--when it appears on the
+screen, there will be no other text to introduce or explain it.
+Meanwhile, it can be rather informal in style.
+
+   The text describing a function or variable in a manual must not stand
+alone; it appears in the context of a section or subsection.  Other text
+at the beginning of the section should explain some of the concepts, and
+should often make some general points that apply to several functions or
+variables.  The previous descriptions of functions and variables in the
+section will also have given information about the topic.  A description
+written to stand alone would repeat some of that information; this
+redundancy looks bad.  Meanwhile, the informality that is acceptable in
+a documentation string is totally unacceptable in a manual.
+
+   The only good way to use documentation strings in writing a good
+manual is to use them as a source of information for writing good text.
+
+
+File: standards.info,  Node: Manual Structure Details,  Next: License for Manuals,  Prev: Doc Strings and Manuals,  Up: Documentation
+
+6.3 Manual Structure Details
+============================
+
+The title page of the manual should state the version of the programs or
+packages documented in the manual.  The Top node of the manual should
+also contain this information.  If the manual is changing more
+frequently than or independent of the program, also state a version
+number for the manual in both of these places.
+
+   Each program documented in the manual should have a node named
+`PROGRAM Invocation' or `Invoking PROGRAM'.  This node (together with
+its subnodes, if any) should describe the program's command line
+arguments and how to run it (the sort of information people would look
+for in a man page).  Start with an `@example' containing a template for
+all the options and arguments that the program uses.
+
+   Alternatively, put a menu item in some menu whose item name fits one
+of the above patterns.  This identifies the node which that item points
+to as the node for this purpose, regardless of the node's actual name.
+
+   The `--usage' feature of the Info reader looks for such a node or
+menu item in order to find the relevant text, so it is essential for
+every Texinfo file to have one.
+
+   If one manual describes several programs, it should have such a node
+for each program described in the manual.
+
+
+File: standards.info,  Node: License for Manuals,  Next: Manual Credits,  Prev: Manual Structure Details,  Up: Documentation
+
+6.4 License for Manuals
+=======================
+
+Please use the GNU Free Documentation License for all GNU manuals that
+are more than a few pages long.  Likewise for a collection of short
+documents--you only need one copy of the GNU FDL for the whole
+collection.  For a single short document, you can use a very permissive
+non-copyleft license, to avoid taking up space with a long license.
+
+   See `http://www.gnu.org/copyleft/fdl-howto.html' for more explanation
+of how to employ the GFDL.
+
+   Note that it is not obligatory to include a copy of the GNU GPL or
+GNU LGPL in a manual whose license is neither the GPL nor the LGPL.  It
+can be a good idea to include the program's license in a large manual;
+in a short manual, whose size would be increased considerably by
+including the program's license, it is probably better not to include
+it.
+
+
+File: standards.info,  Node: Manual Credits,  Next: Printed Manuals,  Prev: License for Manuals,  Up: Documentation
+
+6.5 Manual Credits
+==================
+
+Please credit the principal human writers of the manual as the authors,
+on the title page of the manual.  If a company sponsored the work, thank
+the company in a suitable place in the manual, but do not cite the
+company as an author.
+
+
+File: standards.info,  Node: Printed Manuals,  Next: NEWS File,  Prev: Manual Credits,  Up: Documentation
+
+6.6 Printed Manuals
+===================
+
+The FSF publishes some GNU manuals in printed form.  To encourage sales
+of these manuals, the on-line versions of the manual should mention at
+the very start that the printed manual is available and should point at
+information for getting it--for instance, with a link to the page
+`http://www.gnu.org/order/order.html'.  This should not be included in
+the printed manual, though, because there it is redundant.
+
+   It is also useful to explain in the on-line forms of the manual how
+the user can print out the manual from the sources.
+
+
+File: standards.info,  Node: NEWS File,  Next: Change Logs,  Prev: Printed Manuals,  Up: Documentation
+
+6.7 The NEWS File
+=================
+
+In addition to its manual, the package should have a file named `NEWS'
+which contains a list of user-visible changes worth mentioning.  In
+each new release, add items to the front of the file and identify the
+version they pertain to.  Don't discard old items; leave them in the
+file after the newer items.  This way, a user upgrading from any
+previous version can see what is new.
+
+   If the `NEWS' file gets very long, move some of the older items into
+a file named `ONEWS' and put a note at the end referring the user to
+that file.
+
+
+File: standards.info,  Node: Change Logs,  Next: Man Pages,  Prev: NEWS File,  Up: Documentation
+
+6.8 Change Logs
+===============
+
+Keep a change log to describe all the changes made to program source
+files.  The purpose of this is so that people investigating bugs in the
+future will know about the changes that might have introduced the bug.
+Often a new bug can be found by looking at what was recently changed.
+More importantly, change logs can help you eliminate conceptual
+inconsistencies between different parts of a program, by giving you a
+history of how the conflicting concepts arose and who they came from.
+
+* Menu:
+
+* Change Log Concepts::
+* Style of Change Logs::
+* Simple Changes::
+* Conditional Changes::
+* Indicating the Part Changed::
+
+
+File: standards.info,  Node: Change Log Concepts,  Next: Style of Change Logs,  Up: Change Logs
+
+6.8.1 Change Log Concepts
+-------------------------
+
+You can think of the change log as a conceptual "undo list" which
+explains how earlier versions were different from the current version.
+People can see the current version; they don't need the change log to
+tell them what is in it.  What they want from a change log is a clear
+explanation of how the earlier version differed.
+
+   The change log file is normally called `ChangeLog' and covers an
+entire directory.  Each directory can have its own change log, or a
+directory can use the change log of its parent directory--it's up to
+you.
+
+   Another alternative is to record change log information with a
+version control system such as RCS or CVS.  This can be converted
+automatically to a `ChangeLog' file using `rcs2log'; in Emacs, the
+command `C-x v a' (`vc-update-change-log') does the job.
+
+   There's no need to describe the full purpose of the changes or how
+they work together.  However, sometimes it is useful to write one line
+to describe the overall purpose of a change or a batch of changes.  If
+you think that a change calls for explanation, you're probably right.
+Please do explain it--but please put the full explanation in comments
+in the code, where people will see it whenever they see the code.  For
+example, "New function" is enough for the change log when you add a
+function, because there should be a comment before the function
+definition to explain what it does.
+
+   In the past, we recommended not mentioning changes in non-software
+files (manuals, help files, etc.) in change logs.  However, we've been
+advised that it is a good idea to include them, for the sake of
+copyright records.
+
+   The easiest way to add an entry to `ChangeLog' is with the Emacs
+command `M-x add-change-log-entry'.  An entry should have an asterisk,
+the name of the changed file, and then in parentheses the name of the
+changed functions, variables or whatever, followed by a colon.  Then
+describe the changes you made to that function or variable.
+
+
+File: standards.info,  Node: Style of Change Logs,  Next: Simple Changes,  Prev: Change Log Concepts,  Up: Change Logs
+
+6.8.2 Style of Change Logs
+--------------------------
+
+Here are some simple examples of change log entries, starting with the
+header line that says who made the change and when it was installed,
+followed by descriptions of specific changes.  (These examples are
+drawn from Emacs and GCC.)
+
+     1998-08-17  Richard Stallman  <rms@gnu.org>
+
+     * register.el (insert-register): Return nil.
+     (jump-to-register): Likewise.
+
+     * sort.el (sort-subr): Return nil.
+
+     * tex-mode.el (tex-bibtex-file, tex-file, tex-region):
+     Restart the tex shell if process is gone or stopped.
+     (tex-shell-running): New function.
+
+     * expr.c (store_one_arg): Round size up for move_block_to_reg.
+     (expand_call): Round up when emitting USE insns.
+     * stmt.c (assign_parms): Round size up for move_block_from_reg.
+
+   It's important to name the changed function or variable in full.
+Don't abbreviate function or variable names, and don't combine them.
+Subsequent maintainers will often search for a function name to find all
+the change log entries that pertain to it; if you abbreviate the name,
+they won't find it when they search.
+
+   For example, some people are tempted to abbreviate groups of function
+names by writing `* register.el ({insert,jump-to}-register)'; this is
+not a good idea, since searching for `jump-to-register' or
+`insert-register' would not find that entry.
+
+   Separate unrelated change log entries with blank lines.  When two
+entries represent parts of the same change, so that they work together,
+then don't put blank lines between them.  Then you can omit the file
+name and the asterisk when successive entries are in the same file.
+
+   Break long lists of function names by closing continued lines with
+`)', rather than `,', and opening the continuation with `(' as in this
+example:
+
+     * keyboard.c (menu_bar_items, tool_bar_items)
+     (Fexecute_extended_command): Deal with `keymap' property.
+
+   When you install someone else's changes, put the contributor's name
+in the change log entry rather than in the text of the entry.  In other
+words, write this:
+
+     2002-07-14  John Doe  <jdoe@gnu.org>
+
+             * sewing.c: Make it sew.
+
+rather than this:
+
+     2002-07-14  Usual Maintainer  <usual@gnu.org>
+
+             * sewing.c: Make it sew.  Patch by jdoe@gnu.org.
+
+   As for the date, that should be the date you applied the change.
+
+
+File: standards.info,  Node: Simple Changes,  Next: Conditional Changes,  Prev: Style of Change Logs,  Up: Change Logs
+
+6.8.3 Simple Changes
+--------------------
+
+Certain simple kinds of changes don't need much detail in the change
+log.
+
+   When you change the calling sequence of a function in a simple
+fashion, and you change all the callers of the function to use the new
+calling sequence, there is no need to make individual entries for all
+the callers that you changed.  Just write in the entry for the function
+being called, "All callers changed"--like this:
+
+     * keyboard.c (Fcommand_execute): New arg SPECIAL.
+     All callers changed.
+
+   When you change just comments or doc strings, it is enough to write
+an entry for the file, without mentioning the functions.  Just "Doc
+fixes" is enough for the change log.
+
+   There's no technical need to make change log entries for
+documentation files.  This is because documentation is not susceptible
+to bugs that are hard to fix.  Documentation does not consist of parts
+that must interact in a precisely engineered fashion.  To correct an
+error, you need not know the history of the erroneous passage; it is
+enough to compare what the documentation says with the way the program
+actually works.
+
+   However, you should keep change logs for documentation files when the
+project gets copyright assignments from its contributors, so as to make
+the records of authorship more accurate.
+
+
+File: standards.info,  Node: Conditional Changes,  Next: Indicating the Part Changed,  Prev: Simple Changes,  Up: Change Logs
+
+6.8.4 Conditional Changes
+-------------------------
+
+C programs often contain compile-time `#if' conditionals.  Many changes
+are conditional; sometimes you add a new definition which is entirely
+contained in a conditional.  It is very useful to indicate in the
+change log the conditions for which the change applies.
+
+   Our convention for indicating conditional changes is to use square
+brackets around the name of the condition.
+
+   Here is a simple example, describing a change which is conditional
+but does not have a function or entity name associated with it:
+
+     * xterm.c [SOLARIS2]: Include string.h.
+
+   Here is an entry describing a new definition which is entirely
+conditional.  This new definition for the macro `FRAME_WINDOW_P' is
+used only when `HAVE_X_WINDOWS' is defined:
+
+     * frame.h [HAVE_X_WINDOWS] (FRAME_WINDOW_P): Macro defined.
+
+   Here is an entry for a change within the function `init_display',
+whose definition as a whole is unconditional, but the changes themselves
+are contained in a `#ifdef HAVE_LIBNCURSES' conditional:
+
+     * dispnew.c (init_display) [HAVE_LIBNCURSES]: If X, call tgetent.
+
+   Here is an entry for a change that takes affect only when a certain
+macro is _not_ defined:
+
+     (gethostname) [!HAVE_SOCKETS]: Replace with winsock version.
+
+
+File: standards.info,  Node: Indicating the Part Changed,  Prev: Conditional Changes,  Up: Change Logs
+
+6.8.5 Indicating the Part Changed
+---------------------------------
+
+Indicate the part of a function which changed by using angle brackets
+enclosing an indication of what the changed part does.  Here is an entry
+for a change in the part of the function `sh-while-getopts' that deals
+with `sh' commands:
+
+     * progmodes/sh-script.el (sh-while-getopts) <sh>: Handle case that
+     user-specified option string is empty.
+
+
+File: standards.info,  Node: Man Pages,  Next: Reading other Manuals,  Prev: Change Logs,  Up: Documentation
+
+6.9 Man Pages
+=============
+
+In the GNU project, man pages are secondary.  It is not necessary or
+expected for every GNU program to have a man page, but some of them do.
+It's your choice whether to include a man page in your program.
+
+   When you make this decision, consider that supporting a man page
+requires continual effort each time the program is changed.  The time
+you spend on the man page is time taken away from more useful work.
+
+   For a simple program which changes little, updating the man page may
+be a small job.  Then there is little reason not to include a man page,
+if you have one.
+
+   For a large program that changes a great deal, updating a man page
+may be a substantial burden.  If a user offers to donate a man page,
+you may find this gift costly to accept.  It may be better to refuse
+the man page unless the same person agrees to take full responsibility
+for maintaining it--so that you can wash your hands of it entirely.  If
+this volunteer later ceases to do the job, then don't feel obliged to
+pick it up yourself; it may be better to withdraw the man page from the
+distribution until someone else agrees to update it.
+
+   When a program changes only a little, you may feel that the
+discrepancies are small enough that the man page remains useful without
+updating.  If so, put a prominent note near the beginning of the man
+page explaining that you don't maintain it and that the Texinfo manual
+is more authoritative.  The note should say how to access the Texinfo
+documentation.
+
+   Be sure that man pages include a copyright statement and free
+license.  The simple all-permissive license is appropriate for simple
+man pages (*note License Notices for Other Files: (maintain)License
+Notices for Other Files.).
+
+   For long man pages, with enough explanation and documentation that
+they can be considered true manuals, use the GFDL (*note License for
+Manuals::).
+
+   Finally, the GNU help2man program
+(`http://www.gnu.org/software/help2man/') is one way to automate
+generation of a man page, in this case from `--help' output.  This is
+sufficient in many cases.
+
+
+File: standards.info,  Node: Reading other Manuals,  Prev: Man Pages,  Up: Documentation
+
+6.10 Reading other Manuals
+==========================
+
+There may be non-free books or documentation files that describe the
+program you are documenting.
+
+   It is ok to use these documents for reference, just as the author of
+a new algebra textbook can read other books on algebra.  A large portion
+of any non-fiction book consists of facts, in this case facts about how
+a certain program works, and these facts are necessarily the same for
+everyone who writes about the subject.  But be careful not to copy your
+outline structure, wording, tables or examples from preexisting non-free
+documentation.  Copying from free documentation may be ok; please check
+with the FSF about the individual case.
+
+
+File: standards.info,  Node: Managing Releases,  Next: References,  Prev: Documentation,  Up: Top
+
+7 The Release Process
+*********************
+
+Making a release is more than just bundling up your source files in a
+tar file and putting it up for FTP.  You should set up your software so
+that it can be configured to run on a variety of systems.  Your Makefile
+should conform to the GNU standards described below, and your directory
+layout should also conform to the standards discussed below.  Doing so
+makes it easy to include your package into the larger framework of all
+GNU software.
+
+* Menu:
+
+* Configuration::               How configuration of GNU packages should work.
+* Makefile Conventions::        Makefile conventions.
+* Releases::                    Making releases
+
+
+File: standards.info,  Node: Configuration,  Next: Makefile Conventions,  Up: Managing Releases
+
+7.1 How Configuration Should Work
+=================================
+
+Each GNU distribution should come with a shell script named
+`configure'.  This script is given arguments which describe the kind of
+machine and system you want to compile the program for.  The
+`configure' script must record the configuration options so that they
+affect compilation.
+
+   The description here is the specification of the interface for the
+`configure' script in GNU packages.  Many packages implement it using
+GNU Autoconf (*note Introduction: (autoconf)Top.)  and/or GNU Automake
+(*note Introduction: (automake)Top.), but you do not have to use these
+tools.  You can implement it any way you like; for instance, by making
+`configure' be a wrapper around a completely different configuration
+system.
+
+   Another way for the `configure' script to operate is to make a link
+from a standard name such as `config.h' to the proper configuration
+file for the chosen system.  If you use this technique, the
+distribution should _not_ contain a file named `config.h'.  This is so
+that people won't be able to build the program without configuring it
+first.
+
+   Another thing that `configure' can do is to edit the Makefile.  If
+you do this, the distribution should _not_ contain a file named
+`Makefile'.  Instead, it should include a file `Makefile.in' which
+contains the input used for editing.  Once again, this is so that people
+won't be able to build the program without configuring it first.
+
+   If `configure' does write the `Makefile', then `Makefile' should
+have a target named `Makefile' which causes `configure' to be rerun,
+setting up the same configuration that was set up last time.  The files
+that `configure' reads should be listed as dependencies of `Makefile'.
+
+   All the files which are output from the `configure' script should
+have comments at the beginning explaining that they were generated
+automatically using `configure'.  This is so that users won't think of
+trying to edit them by hand.
+
+   The `configure' script should write a file named `config.status'
+which describes which configuration options were specified when the
+program was last configured.  This file should be a shell script which,
+if run, will recreate the same configuration.
+
+   The `configure' script should accept an option of the form
+`--srcdir=DIRNAME' to specify the directory where sources are found (if
+it is not the current directory).  This makes it possible to build the
+program in a separate directory, so that the actual source directory is
+not modified.
+
+   If the user does not specify `--srcdir', then `configure' should
+check both `.' and `..' to see if it can find the sources.  If it finds
+the sources in one of these places, it should use them from there.
+Otherwise, it should report that it cannot find the sources, and should
+exit with nonzero status.
+
+   Usually the easy way to support `--srcdir' is by editing a
+definition of `VPATH' into the Makefile.  Some rules may need to refer
+explicitly to the specified source directory.  To make this possible,
+`configure' can add to the Makefile a variable named `srcdir' whose
+value is precisely the specified directory.
+
+   In addition, the `configure' script should take options
+corresponding to most of the standard directory variables (*note
+Directory Variables::).  Here is the list:
+
+     --prefix --exec-prefix --bindir --sbindir --libexecdir --sysconfdir
+     --sharedstatedir --localstatedir --libdir --includedir --oldincludedir
+     --datarootdir --datadir --infodir --localedir --mandir --docdir
+     --htmldir --dvidir --pdfdir --psdir
+
+   The `configure' script should also take an argument which specifies
+the type of system to build the program for.  This argument should look
+like this:
+
+     CPU-COMPANY-SYSTEM
+
+   For example, an Athlon-based GNU/Linux system might be
+`i686-pc-linux-gnu'.
+
+   The `configure' script needs to be able to decode all plausible
+alternatives for how to describe a machine.  Thus,
+`athlon-pc-gnu/linux' would be a valid alias.  There is a shell script
+called `config.sub'
+(http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.sub;hb=HEAD)
+that you can use as a subroutine to validate system types and
+canonicalize aliases.
+
+   The `configure' script should also take the option
+`--build=BUILDTYPE', which should be equivalent to a plain BUILDTYPE
+argument.  For example, `configure --build=i686-pc-linux-gnu' is
+equivalent to `configure i686-pc-linux-gnu'.  When the build type is
+not specified by an option or argument, the `configure' script should
+normally guess it using the shell script `config.guess'
+(http://git.savannah.gnu.org/gitweb/?p=config.git;a=blob_plain;f=config.guess;hb=HEAD).
+
+   Other options are permitted to specify in more detail the software
+or hardware present on the machine, to include or exclude optional parts
+of the package, or to adjust the name of some tools or arguments to
+them:
+
+`--enable-FEATURE[=PARAMETER]'
+     Configure the package to build and install an optional user-level
+     facility called FEATURE.  This allows users to choose which
+     optional features to include.  Giving an optional PARAMETER of
+     `no' should omit FEATURE, if it is built by default.
+
+     No `--enable' option should *ever* cause one feature to replace
+     another.  No `--enable' option should ever substitute one useful
+     behavior for another useful behavior.  The only proper use for
+     `--enable' is for questions of whether to build part of the program
+     or exclude it.
+
+`--with-PACKAGE'
+     The package PACKAGE will be installed, so configure this package
+     to work with PACKAGE.
+
+     Possible values of PACKAGE include `gnu-as' (or `gas'), `gnu-ld',
+     `gnu-libc', `gdb', `x', and `x-toolkit'.
+
+     Do not use a `--with' option to specify the file name to use to
+     find certain files.  That is outside the scope of what `--with'
+     options are for.
+
+`VARIABLE=VALUE'
+     Set the value of the variable VARIABLE to VALUE.  This is used to
+     override the default values of commands or arguments in the build
+     process.  For example, the user could issue `configure CFLAGS=-g
+     CXXFLAGS=-g' to build with debugging information and without the
+     default optimization.
+
+     Specifying variables as arguments to `configure', like this:
+          ./configure CC=gcc
+     is preferable to setting them in environment variables:
+          CC=gcc ./configure
+     as it helps to recreate the same configuration later with
+     `config.status'.  However, both methods should be supported.
+
+   All `configure' scripts should accept all of the "detail" options
+and the variable settings, whether or not they make any difference to
+the particular package at hand.  In particular, they should accept any
+option that starts with `--with-' or `--enable-'.  This is so users
+will be able to configure an entire GNU source tree at once with a
+single set of options.
+
+   You will note that the categories `--with-' and `--enable-' are
+narrow: they *do not* provide a place for any sort of option you might
+think of.  That is deliberate.  We want to limit the possible
+configuration options in GNU software.  We do not want GNU programs to
+have idiosyncratic configuration options.
+
+   Packages that perform part of the compilation process may support
+cross-compilation.  In such a case, the host and target machines for the
+program may be different.
+
+   The `configure' script should normally treat the specified type of
+system as both the host and the target, thus producing a program which
+works for the same type of machine that it runs on.
+
+   To compile a program to run on a host type that differs from the
+build type, use the configure option `--host=HOSTTYPE', where HOSTTYPE
+uses the same syntax as BUILDTYPE.  The host type normally defaults to
+the build type.
+
+   To configure a cross-compiler, cross-assembler, or what have you, you
+should specify a target different from the host, using the configure
+option `--target=TARGETTYPE'.  The syntax for TARGETTYPE is the same as
+for the host type.  So the command would look like this:
+
+     ./configure --host=HOSTTYPE --target=TARGETTYPE
+
+   The target type normally defaults to the host type.  Programs for
+which cross-operation is not meaningful need not accept the `--target'
+option, because configuring an entire operating system for
+cross-operation is not a meaningful operation.
+
+   Some programs have ways of configuring themselves automatically.  If
+your program is set up to do this, your `configure' script can simply
+ignore most of its arguments.
+
+
+File: standards.info,  Node: Makefile Conventions,  Next: Releases,  Prev: Configuration,  Up: Managing Releases
+
+7.2 Makefile Conventions
+========================
+
+This node describes conventions for writing the Makefiles for GNU
+programs.  Using Automake will help you write a Makefile that follows
+these conventions.
+
+* Menu:
+
+* Makefile Basics::             General conventions for Makefiles.
+* Utilities in Makefiles::      Utilities to be used in Makefiles.
+* Command Variables::           Variables for specifying commands.
+* DESTDIR::                     Supporting staged installs.
+* Directory Variables::         Variables for installation directories.
+* Standard Targets::            Standard targets for users.
+* Install Command Categories::  Three categories of commands in the `install'
+                                  rule: normal, pre-install and post-install.
+
+
+File: standards.info,  Node: Makefile Basics,  Next: Utilities in Makefiles,  Up: Makefile Conventions
+
+7.2.1 General Conventions for Makefiles
+---------------------------------------
+
+Every Makefile should contain this line:
+
+     SHELL = /bin/sh
+
+to avoid trouble on systems where the `SHELL' variable might be
+inherited from the environment.  (This is never a problem with GNU
+`make'.)
+
+   Different `make' programs have incompatible suffix lists and
+implicit rules, and this sometimes creates confusion or misbehavior.  So
+it is a good idea to set the suffix list explicitly using only the
+suffixes you need in the particular Makefile, like this:
+
+     .SUFFIXES:
+     .SUFFIXES: .c .o
+
+The first line clears out the suffix list, the second introduces all
+suffixes which may be subject to implicit rules in this Makefile.
+
+   Don't assume that `.' is in the path for command execution.  When
+you need to run programs that are a part of your package during the
+make, please make sure that it uses `./' if the program is built as
+part of the make or `$(srcdir)/' if the file is an unchanging part of
+the source code.  Without one of these prefixes, the current search
+path is used.
+
+   The distinction between `./' (the "build directory") and
+`$(srcdir)/' (the "source directory") is important because users can
+build in a separate directory using the `--srcdir' option to
+`configure'.  A rule of the form:
+
+     foo.1 : foo.man sedscript
+             sed -e sedscript foo.man > foo.1
+
+will fail when the build directory is not the source directory, because
+`foo.man' and `sedscript' are in the source directory.
+
+   When using GNU `make', relying on `VPATH' to find the source file
+will work in the case where there is a single dependency file, since
+the `make' automatic variable `$<' will represent the source file
+wherever it is.  (Many versions of `make' set `$<' only in implicit
+rules.)  A Makefile target like
+
+     foo.o : bar.c
+             $(CC) -I. -I$(srcdir) $(CFLAGS) -c bar.c -o foo.o
+
+should instead be written as
+
+     foo.o : bar.c
+             $(CC) -I. -I$(srcdir) $(CFLAGS) -c $< -o $@
+
+in order to allow `VPATH' to work correctly.  When the target has
+multiple dependencies, using an explicit `$(srcdir)' is the easiest way
+to make the rule work well.  For example, the target above for `foo.1'
+is best written as:
+
+     foo.1 : foo.man sedscript
+             sed -e $(srcdir)/sedscript $(srcdir)/foo.man > $@
+
+   GNU distributions usually contain some files which are not source
+files--for example, Info files, and the output from Autoconf, Automake,
+Bison or Flex.  Since these files normally appear in the source
+directory, they should always appear in the source directory, not in the
+build directory.  So Makefile rules to update them should put the
+updated files in the source directory.
+
+   However, if a file does not appear in the distribution, then the
+Makefile should not put it in the source directory, because building a
+program in ordinary circumstances should not modify the source directory
+in any way.
+
+   Try to make the build and installation targets, at least (and all
+their subtargets) work correctly with a parallel `make'.
+
+
+File: standards.info,  Node: Utilities in Makefiles,  Next: Command Variables,  Prev: Makefile Basics,  Up: Makefile Conventions
+
+7.2.2 Utilities in Makefiles
+----------------------------
+
+Write the Makefile commands (and any shell scripts, such as
+`configure') to run in `sh', not in `csh'.  Don't use any special
+features of `ksh' or `bash'.
+
+   The `configure' script and the Makefile rules for building and
+installation should not use any utilities directly except these:
+
+     cat cmp cp diff echo egrep expr false grep install-info
+     ln ls mkdir mv pwd rm rmdir sed sleep sort tar test touch true
+
+   The compression program `gzip' can be used in the `dist' rule.
+
+   Stick to the generally supported options for these programs.  For
+example, don't use `mkdir -p', convenient as it may be, because most
+systems don't support it.
+
+   It is a good idea to avoid creating symbolic links in makefiles,
+since a few systems don't support them.
+
+   The Makefile rules for building and installation can also use
+compilers and related programs, but should do so via `make' variables
+so that the user can substitute alternatives.  Here are some of the
+programs we mean:
+
+     ar bison cc flex install ld ldconfig lex
+     make makeinfo ranlib texi2dvi yacc
+
+   Use the following `make' variables to run those programs:
+
+     $(AR) $(BISON) $(CC) $(FLEX) $(INSTALL) $(LD) $(LDCONFIG) $(LEX)
+     $(MAKE) $(MAKEINFO) $(RANLIB) $(TEXI2DVI) $(YACC)
+
+   When you use `ranlib' or `ldconfig', you should make sure nothing
+bad happens if the system does not have the program in question.
+Arrange to ignore an error from that command, and print a message before
+the command to tell the user that failure of this command does not mean
+a problem.  (The Autoconf `AC_PROG_RANLIB' macro can help with this.)
+
+   If you use symbolic links, you should implement a fallback for
+systems that don't have symbolic links.
+
+   Additional utilities that can be used via Make variables are:
+
+     chgrp chmod chown mknod
+
+   It is ok to use other utilities in Makefile portions (or scripts)
+intended only for particular systems where you know those utilities
+exist.
+
+
+File: standards.info,  Node: Command Variables,  Next: DESTDIR,  Prev: Utilities in Makefiles,  Up: Makefile Conventions
+
+7.2.3 Variables for Specifying Commands
+---------------------------------------
+
+Makefiles should provide variables for overriding certain commands,
+options, and so on.
+
+   In particular, you should run most utility programs via variables.
+Thus, if you use Bison, have a variable named `BISON' whose default
+value is set with `BISON = bison', and refer to it with `$(BISON)'
+whenever you need to use Bison.
+
+   File management utilities such as `ln', `rm', `mv', and so on, need
+not be referred to through variables in this way, since users don't
+need to replace them with other programs.
+
+   Each program-name variable should come with an options variable that
+is used to supply options to the program.  Append `FLAGS' to the
+program-name variable name to get the options variable name--for
+example, `BISONFLAGS'.  (The names `CFLAGS' for the C compiler,
+`YFLAGS' for yacc, and `LFLAGS' for lex, are exceptions to this rule,
+but we keep them because they are standard.)  Use `CPPFLAGS' in any
+compilation command that runs the preprocessor, and use `LDFLAGS' in
+any compilation command that does linking as well as in any direct use
+of `ld'.
+
+   If there are C compiler options that _must_ be used for proper
+compilation of certain files, do not include them in `CFLAGS'.  Users
+expect to be able to specify `CFLAGS' freely themselves.  Instead,
+arrange to pass the necessary options to the C compiler independently
+of `CFLAGS', by writing them explicitly in the compilation commands or
+by defining an implicit rule, like this:
+
+     CFLAGS = -g
+     ALL_CFLAGS = -I. $(CFLAGS)
+     .c.o:
+             $(CC) -c $(CPPFLAGS) $(ALL_CFLAGS) $<
+
+   Do include the `-g' option in `CFLAGS', because that is not
+_required_ for proper compilation.  You can consider it a default that
+is only recommended.  If the package is set up so that it is compiled
+with GCC by default, then you might as well include `-O' in the default
+value of `CFLAGS' as well.
+
+   Put `CFLAGS' last in the compilation command, after other variables
+containing compiler options, so the user can use `CFLAGS' to override
+the others.
+
+   `CFLAGS' should be used in every invocation of the C compiler, both
+those which do compilation and those which do linking.
+
+   Every Makefile should define the variable `INSTALL', which is the
+basic command for installing a file into the system.
+
+   Every Makefile should also define the variables `INSTALL_PROGRAM'
+and `INSTALL_DATA'.  (The default for `INSTALL_PROGRAM' should be
+`$(INSTALL)'; the default for `INSTALL_DATA' should be `${INSTALL} -m
+644'.)  Then it should use those variables as the commands for actual
+installation, for executables and non-executables respectively.
+Minimal use of these variables is as follows:
+
+     $(INSTALL_PROGRAM) foo $(bindir)/foo
+     $(INSTALL_DATA) libfoo.a $(libdir)/libfoo.a
+
+   However, it is preferable to support a `DESTDIR' prefix on the
+target files, as explained in the next section.
+
+Always use a file name, not a directory name, as the second argument of
+the installation commands.  Use a separate command for each file to be
+installed.
+
+
+File: standards.info,  Node: DESTDIR,  Next: Directory Variables,  Prev: Command Variables,  Up: Makefile Conventions
+
+7.2.4 `DESTDIR': support for staged installs
+--------------------------------------------
+
+`DESTDIR' is a variable prepended to each installed target file, like
+this:
+
+     $(INSTALL_PROGRAM) foo $(DESTDIR)$(bindir)/foo
+     $(INSTALL_DATA) libfoo.a $(DESTDIR)$(libdir)/libfoo.a
+
+   The `DESTDIR' variable is specified by the user on the `make'
+command line.  For example:
+
+     make DESTDIR=/tmp/stage install
+
+`DESTDIR' should be supported only in the `install*' and `uninstall*'
+targets, as those are the only targets where it is useful.
+
+   If your installation step would normally install
+`/usr/local/bin/foo' and `/usr/local/lib/libfoo.a', then an
+installation invoked as in the example above would install
+`/tmp/stage/usr/local/bin/foo' and `/tmp/stage/usr/local/lib/libfoo.a'
+instead.
+
+   Prepending the variable `DESTDIR' to each target in this way
+provides for "staged installs", where the installed files are not
+placed directly into their expected location but are instead copied
+into a temporary location (`DESTDIR').  However, installed files
+maintain their relative directory structure and any embedded file names
+will not be modified.
+
+   You should not set the value of `DESTDIR' in your `Makefile' at all;
+then the files are installed into their expected locations by default.
+Also, specifying `DESTDIR' should not change the operation of the
+software in any way, so its value should not be included in any file
+contents.
+
+   `DESTDIR' support is commonly used in package creation.  It is also
+helpful to users who want to understand what a given package will
+install where, and to allow users who don't normally have permissions
+to install into protected areas to build and install before gaining
+those permissions.  Finally, it can be useful with tools such as
+`stow', where code is installed in one place but made to appear to be
+installed somewhere else using symbolic links or special mount
+operations.  So, we strongly recommend GNU packages support `DESTDIR',
+though it is not an absolute requirement.
+
+
+File: standards.info,  Node: Directory Variables,  Next: Standard Targets,  Prev: DESTDIR,  Up: Makefile Conventions
+
+7.2.5 Variables for Installation Directories
+--------------------------------------------
+
+Installation directories should always be named by variables, so it is
+easy to install in a nonstandard place.  The standard names for these
+variables and the values they should have in GNU packages are described
+below.  They are based on a standard file system layout; variants of it
+are used in GNU/Linux and other modern operating systems.
+
+   Installers are expected to override these values when calling `make'
+(e.g., `make prefix=/usr install' or `configure' (e.g., `configure
+--prefix=/usr').  GNU packages should not try to guess which value
+should be appropriate for these variables on the system they are being
+installed onto: use the default settings specified here so that all GNU
+packages behave identically, allowing the installer to achieve any
+desired layout.
+
+   These first two variables set the root for the installation.  All the
+other installation directories should be subdirectories of one of these
+two, and nothing should be directly installed into these two
+directories.
+
+`prefix'
+     A prefix used in constructing the default values of the variables
+     listed below.  The default value of `prefix' should be
+     `/usr/local'.  When building the complete GNU system, the prefix
+     will be empty and `/usr' will be a symbolic link to `/'.  (If you
+     are using Autoconf, write it as `@prefix@'.)
+
+     Running `make install' with a different value of `prefix' from the
+     one used to build the program should _not_ recompile the program.
+
+`exec_prefix'
+     A prefix used in constructing the default values of some of the
+     variables listed below.  The default value of `exec_prefix' should
+     be `$(prefix)'.  (If you are using Autoconf, write it as
+     `@exec_prefix@'.)
+
+     Generally, `$(exec_prefix)' is used for directories that contain
+     machine-specific files (such as executables and subroutine
+     libraries), while `$(prefix)' is used directly for other
+     directories.
+
+     Running `make install' with a different value of `exec_prefix'
+     from the one used to build the program should _not_ recompile the
+     program.
+
+   Executable programs are installed in one of the following
+directories.
+
+`bindir'
+     The directory for installing executable programs that users can
+     run.  This should normally be `/usr/local/bin', but write it as
+     `$(exec_prefix)/bin'.  (If you are using Autoconf, write it as
+     `@bindir@'.)
+
+`sbindir'
+     The directory for installing executable programs that can be run
+     from the shell, but are only generally useful to system
+     administrators.  This should normally be `/usr/local/sbin', but
+     write it as `$(exec_prefix)/sbin'.  (If you are using Autoconf,
+     write it as `@sbindir@'.)
+
+`libexecdir'
+     The directory for installing executable programs to be run by other
+     programs rather than by users.  This directory should normally be
+     `/usr/local/libexec', but write it as `$(exec_prefix)/libexec'.
+     (If you are using Autoconf, write it as `@libexecdir@'.)
+
+     The definition of `libexecdir' is the same for all packages, so
+     you should install your data in a subdirectory thereof.  Most
+     packages install their data under `$(libexecdir)/PACKAGE-NAME/',
+     possibly within additional subdirectories thereof, such as
+     `$(libexecdir)/PACKAGE-NAME/MACHINE/VERSION'.
+
+   Data files used by the program during its execution are divided into
+categories in two ways.
+
+   * Some files are normally modified by programs; others are never
+     normally modified (though users may edit some of these).
+
+   * Some files are architecture-independent and can be shared by all
+     machines at a site; some are architecture-dependent and can be
+     shared only by machines of the same kind and operating system;
+     others may never be shared between two machines.
+
+   This makes for six different possibilities.  However, we want to
+discourage the use of architecture-dependent files, aside from object
+files and libraries.  It is much cleaner to make other data files
+architecture-independent, and it is generally not hard.
+
+   Here are the variables Makefiles should use to specify directories
+to put these various kinds of files in:
+
+`datarootdir'
+     The root of the directory tree for read-only
+     architecture-independent data files.  This should normally be
+     `/usr/local/share', but write it as `$(prefix)/share'.  (If you
+     are using Autoconf, write it as `@datarootdir@'.)  `datadir''s
+     default value is based on this variable; so are `infodir',
+     `mandir', and others.
+
+`datadir'
+     The directory for installing idiosyncratic read-only
+     architecture-independent data files for this program.  This is
+     usually the same place as `datarootdir', but we use the two
+     separate variables so that you can move these program-specific
+     files without altering the location for Info files, man pages, etc.
+
+     This should normally be `/usr/local/share', but write it as
+     `$(datarootdir)'.  (If you are using Autoconf, write it as
+     `@datadir@'.)
+
+     The definition of `datadir' is the same for all packages, so you
+     should install your data in a subdirectory thereof.  Most packages
+     install their data under `$(datadir)/PACKAGE-NAME/'.
+
+`sysconfdir'
+     The directory for installing read-only data files that pertain to a
+     single machine-that is to say, files for configuring a host.
+     Mailer and network configuration files, `/etc/passwd', and so
+     forth belong here.  All the files in this directory should be
+     ordinary ASCII text files.  This directory should normally be
+     `/usr/local/etc', but write it as `$(prefix)/etc'.  (If you are
+     using Autoconf, write it as `@sysconfdir@'.)
+
+     Do not install executables here in this directory (they probably
+     belong in `$(libexecdir)' or `$(sbindir)').  Also do not install
+     files that are modified in the normal course of their use (programs
+     whose purpose is to change the configuration of the system
+     excluded).  Those probably belong in `$(localstatedir)'.
+
+`sharedstatedir'
+     The directory for installing architecture-independent data files
+     which the programs modify while they run.  This should normally be
+     `/usr/local/com', but write it as `$(prefix)/com'.  (If you are
+     using Autoconf, write it as `@sharedstatedir@'.)
+
+`localstatedir'
+     The directory for installing data files which the programs modify
+     while they run, and that pertain to one specific machine.  Users
+     should never need to modify files in this directory to configure
+     the package's operation; put such configuration information in
+     separate files that go in `$(datadir)' or `$(sysconfdir)'.
+     `$(localstatedir)' should normally be `/usr/local/var', but write
+     it as `$(prefix)/var'.  (If you are using Autoconf, write it as
+     `@localstatedir@'.)
+
+   These variables specify the directory for installing certain specific
+types of files, if your program has them.  Every GNU package should
+have Info files, so every program needs `infodir', but not all need
+`libdir' or `lispdir'.
+
+`includedir'
+     The directory for installing header files to be included by user
+     programs with the C `#include' preprocessor directive.  This
+     should normally be `/usr/local/include', but write it as
+     `$(prefix)/include'.  (If you are using Autoconf, write it as
+     `@includedir@'.)
+
+     Most compilers other than GCC do not look for header files in
+     directory `/usr/local/include'.  So installing the header files
+     this way is only useful with GCC.  Sometimes this is not a problem
+     because some libraries are only really intended to work with GCC.
+     But some libraries are intended to work with other compilers.
+     They should install their header files in two places, one
+     specified by `includedir' and one specified by `oldincludedir'.
+
+`oldincludedir'
+     The directory for installing `#include' header files for use with
+     compilers other than GCC.  This should normally be `/usr/include'.
+     (If you are using Autoconf, you can write it as `@oldincludedir@'.)
+
+     The Makefile commands should check whether the value of
+     `oldincludedir' is empty.  If it is, they should not try to use
+     it; they should cancel the second installation of the header files.
+
+     A package should not replace an existing header in this directory
+     unless the header came from the same package.  Thus, if your Foo
+     package provides a header file `foo.h', then it should install the
+     header file in the `oldincludedir' directory if either (1) there
+     is no `foo.h' there or (2) the `foo.h' that exists came from the
+     Foo package.
+
+     To tell whether `foo.h' came from the Foo package, put a magic
+     string in the file--part of a comment--and `grep' for that string.
+
+`docdir'
+     The directory for installing documentation files (other than Info)
+     for this package.  By default, it should be
+     `/usr/local/share/doc/YOURPKG', but it should be written as
+     `$(datarootdir)/doc/YOURPKG'.  (If you are using Autoconf, write
+     it as `@docdir@'.)  The YOURPKG subdirectory, which may include a
+     version number, prevents collisions among files with common names,
+     such as `README'.
+
+`infodir'
+     The directory for installing the Info files for this package.  By
+     default, it should be `/usr/local/share/info', but it should be
+     written as `$(datarootdir)/info'.  (If you are using Autoconf,
+     write it as `@infodir@'.)  `infodir' is separate from `docdir' for
+     compatibility with existing practice.
+
+`htmldir'
+`dvidir'
+`pdfdir'
+`psdir'
+     Directories for installing documentation files in the particular
+     format.  They should all be set to `$(docdir)' by default.  (If
+     you are using Autoconf, write them as `@htmldir@', `@dvidir@',
+     etc.)  Packages which supply several translations of their
+     documentation should install them in `$(htmldir)/'LL,
+     `$(pdfdir)/'LL, etc. where LL is a locale abbreviation such as
+     `en' or `pt_BR'.
+
+`libdir'
+     The directory for object files and libraries of object code.  Do
+     not install executables here, they probably ought to go in
+     `$(libexecdir)' instead.  The value of `libdir' should normally be
+     `/usr/local/lib', but write it as `$(exec_prefix)/lib'.  (If you
+     are using Autoconf, write it as `@libdir@'.)
+
+`lispdir'
+     The directory for installing any Emacs Lisp files in this package.
+     By default, it should be `/usr/local/share/emacs/site-lisp', but it
+     should be written as `$(datarootdir)/emacs/site-lisp'.
+
+     If you are using Autoconf, write the default as `@lispdir@'.  In
+     order to make `@lispdir@' work, you need the following lines in
+     your `configure.in' file:
+
+          lispdir='${datarootdir}/emacs/site-lisp'
+          AC_SUBST(lispdir)
+
+`localedir'
+     The directory for installing locale-specific message catalogs for
+     this package.  By default, it should be `/usr/local/share/locale',
+     but it should be written as `$(datarootdir)/locale'.  (If you are
+     using Autoconf, write it as `@localedir@'.)  This directory
+     usually has a subdirectory per locale.
+
+   Unix-style man pages are installed in one of the following:
+
+`mandir'
+     The top-level directory for installing the man pages (if any) for
+     this package.  It will normally be `/usr/local/share/man', but you
+     should write it as `$(datarootdir)/man'.  (If you are using
+     Autoconf, write it as `@mandir@'.)
+
+`man1dir'
+     The directory for installing section 1 man pages.  Write it as
+     `$(mandir)/man1'.
+
+`man2dir'
+     The directory for installing section 2 man pages.  Write it as
+     `$(mandir)/man2'
+
+`...'
+     *Don't make the primary documentation for any GNU software be a
+     man page.  Write a manual in Texinfo instead.  Man pages are just
+     for the sake of people running GNU software on Unix, which is a
+     secondary application only.*
+
+`manext'
+     The file name extension for the installed man page.  This should
+     contain a period followed by the appropriate digit; it should
+     normally be `.1'.
+
+`man1ext'
+     The file name extension for installed section 1 man pages.
+
+`man2ext'
+     The file name extension for installed section 2 man pages.
+
+`...'
+     Use these names instead of `manext' if the package needs to
+     install man pages in more than one section of the manual.
+
+   And finally, you should set the following variable:
+
+`srcdir'
+     The directory for the sources being compiled.  The value of this
+     variable is normally inserted by the `configure' shell script.
+     (If you are using Autoconf, use `srcdir = @srcdir@'.)
+
+   For example:
+
+     # Common prefix for installation directories.
+     # NOTE: This directory must exist when you start the install.
+     prefix = /usr/local
+     datarootdir = $(prefix)/share
+     datadir = $(datarootdir)
+     exec_prefix = $(prefix)
+     # Where to put the executable for the command `gcc'.
+     bindir = $(exec_prefix)/bin
+     # Where to put the directories used by the compiler.
+     libexecdir = $(exec_prefix)/libexec
+     # Where to put the Info files.
+     infodir = $(datarootdir)/info
+
+   If your program installs a large number of files into one of the
+standard user-specified directories, it might be useful to group them
+into a subdirectory particular to that program.  If you do this, you
+should write the `install' rule to create these subdirectories.
+
+   Do not expect the user to include the subdirectory name in the value
+of any of the variables listed above.  The idea of having a uniform set
+of variable names for installation directories is to enable the user to
+specify the exact same values for several different GNU packages.  In
+order for this to be useful, all the packages must be designed so that
+they will work sensibly when the user does so.
+
+   At times, not all of these variables may be implemented in the
+current release of Autoconf and/or Automake; but as of Autoconf 2.60, we
+believe all of them are.  When any are missing, the descriptions here
+serve as specifications for what Autoconf will implement.  As a
+programmer, you can either use a development version of Autoconf or
+avoid using these variables until a stable release is made which
+supports them.
+
+
+File: standards.info,  Node: Standard Targets,  Next: Install Command Categories,  Prev: Directory Variables,  Up: Makefile Conventions
+
+7.2.6 Standard Targets for Users
+--------------------------------
+
+All GNU programs should have the following targets in their Makefiles:
+
+`all'
+     Compile the entire program.  This should be the default target.
+     This target need not rebuild any documentation files; Info files
+     should normally be included in the distribution, and DVI (and other
+     documentation format) files should be made only when explicitly
+     asked for.
+
+     By default, the Make rules should compile and link with `-g', so
+     that executable programs have debugging symbols.  Users who don't
+     mind being helpless can strip the executables later if they wish.
+
+`install'
+     Compile the program and copy the executables, libraries, and so on
+     to the file names where they should reside for actual use.  If
+     there is a simple test to verify that a program is properly
+     installed, this target should run that test.
+
+     Do not strip executables when installing them.  Devil-may-care
+     users can use the `install-strip' target to do that.
+
+     If possible, write the `install' target rule so that it does not
+     modify anything in the directory where the program was built,
+     provided `make all' has just been done.  This is convenient for
+     building the program under one user name and installing it under
+     another.
+
+     The commands should create all the directories in which files are
+     to be installed, if they don't already exist.  This includes the
+     directories specified as the values of the variables `prefix' and
+     `exec_prefix', as well as all subdirectories that are needed.  One
+     way to do this is by means of an `installdirs' target as described
+     below.
+
+     Use `-' before any command for installing a man page, so that
+     `make' will ignore any errors.  This is in case there are systems
+     that don't have the Unix man page documentation system installed.
+
+     The way to install Info files is to copy them into `$(infodir)'
+     with `$(INSTALL_DATA)' (*note Command Variables::), and then run
+     the `install-info' program if it is present.  `install-info' is a
+     program that edits the Info `dir' file to add or update the menu
+     entry for the given Info file; it is part of the Texinfo package.
+     Here is a sample rule to install an Info file:
+
+          $(DESTDIR)$(infodir)/foo.info: foo.info
+                  $(POST_INSTALL)
+          # There may be a newer info file in . than in srcdir.
+                  -if test -f foo.info; then d=.; \
+                   else d=$(srcdir); fi; \
+                  $(INSTALL_DATA) $$d/foo.info $(DESTDIR)$@; \
+          # Run install-info only if it exists.
+          # Use `if' instead of just prepending `-' to the
+          # line so we notice real errors from install-info.
+          # We use `$(SHELL) -c' because some shells do not
+          # fail gracefully when there is an unknown command.
+                  if $(SHELL) -c 'install-info --version' \
+                     >/dev/null 2>&1; then \
+                    install-info --dir-file=$(DESTDIR)$(infodir)/dir \
+                                 $(DESTDIR)$(infodir)/foo.info; \
+                  else true; fi
+
+     When writing the `install' target, you must classify all the
+     commands into three categories: normal ones, "pre-installation"
+     commands and "post-installation" commands.  *Note Install Command
+     Categories::.
+
+`install-html'
+`install-dvi'
+`install-pdf'
+`install-ps'
+     These targets install documentation in formats other than Info;
+     they're intended to be called explicitly by the person installing
+     the package, if that format is desired.  GNU prefers Info files,
+     so these must be installed by the `install' target.
+
+     When you have many documentation files to install, we recommend
+     that you avoid collisions and clutter by arranging for these
+     targets to install in subdirectories of the appropriate
+     installation directory, such as `htmldir'.  As one example, if
+     your package has multiple manuals, and you wish to install HTML
+     documentation with many files (such as the "split" mode output by
+     `makeinfo --html'), you'll certainly want to use subdirectories,
+     or two nodes with the same name in different manuals will
+     overwrite each other.
+
+     Please make these `install-FORMAT' targets invoke the commands for
+     the FORMAT target, for example, by making FORMAT a dependency.
+
+`uninstall'
+     Delete all the installed files--the copies that the `install' and
+     `install-*' targets create.
+
+     This rule should not modify the directories where compilation is
+     done, only the directories where files are installed.
+
+     The uninstallation commands are divided into three categories,
+     just like the installation commands.  *Note Install Command
+     Categories::.
+
+`install-strip'
+     Like `install', but strip the executable files while installing
+     them.  In simple cases, this target can use the `install' target in
+     a simple way:
+
+          install-strip:
+                  $(MAKE) INSTALL_PROGRAM='$(INSTALL_PROGRAM) -s' \
+                          install
+
+     But if the package installs scripts as well as real executables,
+     the `install-strip' target can't just refer to the `install'
+     target; it has to strip the executables but not the scripts.
+
+     `install-strip' should not strip the executables in the build
+     directory which are being copied for installation.  It should only
+     strip the copies that are installed.
+
+     Normally we do not recommend stripping an executable unless you
+     are sure the program has no bugs.  However, it can be reasonable
+     to install a stripped executable for actual execution while saving
+     the unstripped executable elsewhere in case there is a bug.
+
+`clean'
+     Delete all files in the current directory that are normally
+     created by building the program.  Also delete files in other
+     directories if they are created by this makefile.  However, don't
+     delete the files that record the configuration.  Also preserve
+     files that could be made by building, but normally aren't because
+     the distribution comes with them.  There is no need to delete
+     parent directories that were created with `mkdir -p', since they
+     could have existed anyway.
+
+     Delete `.dvi' files here if they are not part of the distribution.
+
+`distclean'
+     Delete all files in the current directory (or created by this
+     makefile) that are created by configuring or building the program.
+     If you have unpacked the source and built the program without
+     creating any other files, `make distclean' should leave only the
+     files that were in the distribution.  However, there is no need to
+     delete parent directories that were created with `mkdir -p', since
+     they could have existed anyway.
+
+`mostlyclean'
+     Like `clean', but may refrain from deleting a few files that people
+     normally don't want to recompile.  For example, the `mostlyclean'
+     target for GCC does not delete `libgcc.a', because recompiling it
+     is rarely necessary and takes a lot of time.
+
+`maintainer-clean'
+     Delete almost everything that can be reconstructed with this
+     Makefile.  This typically includes everything deleted by
+     `distclean', plus more: C source files produced by Bison, tags
+     tables, Info files, and so on.
+
+     The reason we say "almost everything" is that running the command
+     `make maintainer-clean' should not delete `configure' even if
+     `configure' can be remade using a rule in the Makefile.  More
+     generally, `make maintainer-clean' should not delete anything that
+     needs to exist in order to run `configure' and then begin to build
+     the program.  Also, there is no need to delete parent directories
+     that were created with `mkdir -p', since they could have existed
+     anyway.  These are the only exceptions; `maintainer-clean' should
+     delete everything else that can be rebuilt.
+
+     The `maintainer-clean' target is intended to be used by a
+     maintainer of the package, not by ordinary users.  You may need
+     special tools to reconstruct some of the files that `make
+     maintainer-clean' deletes.  Since these files are normally
+     included in the distribution, we don't take care to make them easy
+     to reconstruct.  If you find you need to unpack the full
+     distribution again, don't blame us.
+
+     To help make users aware of this, the commands for the special
+     `maintainer-clean' target should start with these two:
+
+          @echo 'This command is intended for maintainers to use; it'
+          @echo 'deletes files that may need special tools to rebuild.'
+
+`TAGS'
+     Update a tags table for this program.
+
+`info'
+     Generate any Info files needed.  The best way to write the rules
+     is as follows:
+
+          info: foo.info
+
+          foo.info: foo.texi chap1.texi chap2.texi
+                  $(MAKEINFO) $(srcdir)/foo.texi
+
+     You must define the variable `MAKEINFO' in the Makefile.  It should
+     run the `makeinfo' program, which is part of the Texinfo
+     distribution.
+
+     Normally a GNU distribution comes with Info files, and that means
+     the Info files are present in the source directory.  Therefore,
+     the Make rule for an info file should update it in the source
+     directory.  When users build the package, ordinarily Make will not
+     update the Info files because they will already be up to date.
+
+`dvi'
+`html'
+`pdf'
+`ps'
+     Generate documentation files in the given format.  These targets
+     should always exist, but any or all can be a no-op if the given
+     output format cannot be generated.  These targets should not be
+     dependencies of the `all' target; the user must manually invoke
+     them.
+
+     Here's an example rule for generating DVI files from Texinfo:
+
+          dvi: foo.dvi
+
+          foo.dvi: foo.texi chap1.texi chap2.texi
+                  $(TEXI2DVI) $(srcdir)/foo.texi
+
+     You must define the variable `TEXI2DVI' in the Makefile.  It should
+     run the program `texi2dvi', which is part of the Texinfo
+     distribution.(1)  Alternatively, write just the dependencies, and
+     allow GNU `make' to provide the command.
+
+     Here's another example, this one for generating HTML from Texinfo:
+
+          html: foo.html
+
+          foo.html: foo.texi chap1.texi chap2.texi
+                  $(TEXI2HTML) $(srcdir)/foo.texi
+
+     Again, you would define the variable `TEXI2HTML' in the Makefile;
+     for example, it might run `makeinfo --no-split --html' (`makeinfo'
+     is part of the Texinfo distribution).
+
+`dist'
+     Create a distribution tar file for this program.  The tar file
+     should be set up so that the file names in the tar file start with
+     a subdirectory name which is the name of the package it is a
+     distribution for.  This name can include the version number.
+
+     For example, the distribution tar file of GCC version 1.40 unpacks
+     into a subdirectory named `gcc-1.40'.
+
+     The easiest way to do this is to create a subdirectory
+     appropriately named, use `ln' or `cp' to install the proper files
+     in it, and then `tar' that subdirectory.
+
+     Compress the tar file with `gzip'.  For example, the actual
+     distribution file for GCC version 1.40 is called `gcc-1.40.tar.gz'.
+
+     The `dist' target should explicitly depend on all non-source files
+     that are in the distribution, to make sure they are up to date in
+     the distribution.  *Note Making Releases: Releases.
+
+`check'
+     Perform self-tests (if any).  The user must build the program
+     before running the tests, but need not install the program; you
+     should write the self-tests so that they work when the program is
+     built but not installed.
+
+   The following targets are suggested as conventional names, for
+programs in which they are useful.
+
+`installcheck'
+     Perform installation tests (if any).  The user must build and
+     install the program before running the tests.  You should not
+     assume that `$(bindir)' is in the search path.
+
+`installdirs'
+     It's useful to add a target named `installdirs' to create the
+     directories where files are installed, and their parent
+     directories.  There is a script called `mkinstalldirs' which is
+     convenient for this; you can find it in the Texinfo package.  You
+     can use a rule like this:
+
+          # Make sure all installation directories (e.g. $(bindir))
+          # actually exist by making them if necessary.
+          installdirs: mkinstalldirs
+                  $(srcdir)/mkinstalldirs $(bindir) $(datadir) \
+                                          $(libdir) $(infodir) \
+                                          $(mandir)
+
+     or, if you wish to support `DESTDIR',
+
+          # Make sure all installation directories (e.g. $(bindir))
+          # actually exist by making them if necessary.
+          installdirs: mkinstalldirs
+                  $(srcdir)/mkinstalldirs \
+                      $(DESTDIR)$(bindir) $(DESTDIR)$(datadir) \
+                      $(DESTDIR)$(libdir) $(DESTDIR)$(infodir) \
+                      $(DESTDIR)$(mandir)
+
+     This rule should not modify the directories where compilation is
+     done.  It should do nothing but create installation directories.
+
+   ---------- Footnotes ----------
+
+   (1) `texi2dvi' uses TeX to do the real work of formatting. TeX is
+not distributed with Texinfo.
+
+
+File: standards.info,  Node: Install Command Categories,  Prev: Standard Targets,  Up: Makefile Conventions
+
+7.2.7 Install Command Categories
+--------------------------------
+
+When writing the `install' target, you must classify all the commands
+into three categories: normal ones, "pre-installation" commands and
+"post-installation" commands.
+
+   Normal commands move files into their proper places, and set their
+modes.  They may not alter any files except the ones that come entirely
+from the package they belong to.
+
+   Pre-installation and post-installation commands may alter other
+files; in particular, they can edit global configuration files or data
+bases.
+
+   Pre-installation commands are typically executed before the normal
+commands, and post-installation commands are typically run after the
+normal commands.
+
+   The most common use for a post-installation command is to run
+`install-info'.  This cannot be done with a normal command, since it
+alters a file (the Info directory) which does not come entirely and
+solely from the package being installed.  It is a post-installation
+command because it needs to be done after the normal command which
+installs the package's Info files.
+
+   Most programs don't need any pre-installation commands, but we have
+the feature just in case it is needed.
+
+   To classify the commands in the `install' rule into these three
+categories, insert "category lines" among them.  A category line
+specifies the category for the commands that follow.
+
+   A category line consists of a tab and a reference to a special Make
+variable, plus an optional comment at the end.  There are three
+variables you can use, one for each category; the variable name
+specifies the category.  Category lines are no-ops in ordinary execution
+because these three Make variables are normally undefined (and you
+_should not_ define them in the makefile).
+
+   Here are the three possible category lines, each with a comment that
+explains what it means:
+
+             $(PRE_INSTALL)     # Pre-install commands follow.
+             $(POST_INSTALL)    # Post-install commands follow.
+             $(NORMAL_INSTALL)  # Normal commands follow.
+
+   If you don't use a category line at the beginning of the `install'
+rule, all the commands are classified as normal until the first category
+line.  If you don't use any category lines, all the commands are
+classified as normal.
+
+   These are the category lines for `uninstall':
+
+             $(PRE_UNINSTALL)     # Pre-uninstall commands follow.
+             $(POST_UNINSTALL)    # Post-uninstall commands follow.
+             $(NORMAL_UNINSTALL)  # Normal commands follow.
+
+   Typically, a pre-uninstall command would be used for deleting entries
+from the Info directory.
+
+   If the `install' or `uninstall' target has any dependencies which
+act as subroutines of installation, then you should start _each_
+dependency's commands with a category line, and start the main target's
+commands with a category line also.  This way, you can ensure that each
+command is placed in the right category regardless of which of the
+dependencies actually run.
+
+   Pre-installation and post-installation commands should not run any
+programs except for these:
+
+     [ basename bash cat chgrp chmod chown cmp cp dd diff echo
+     egrep expand expr false fgrep find getopt grep gunzip gzip
+     hostname install install-info kill ldconfig ln ls md5sum
+     mkdir mkfifo mknod mv printenv pwd rm rmdir sed sort tee
+     test touch true uname xargs yes
+
+   The reason for distinguishing the commands in this way is for the
+sake of making binary packages.  Typically a binary package contains
+all the executables and other files that need to be installed, and has
+its own method of installing them--so it does not need to run the normal
+installation commands.  But installing the binary package does need to
+execute the pre-installation and post-installation commands.
+
+   Programs to build binary packages work by extracting the
+pre-installation and post-installation commands.  Here is one way of
+extracting the pre-installation commands (the `-s' option to `make' is
+needed to silence messages about entering subdirectories):
+
+     make -s -n install -o all \
+           PRE_INSTALL=pre-install \
+           POST_INSTALL=post-install \
+           NORMAL_INSTALL=normal-install \
+       | gawk -f pre-install.awk
+
+where the file `pre-install.awk' could contain this:
+
+     $0 ~ /^(normal-install|post-install)[ \t]*$/ {on = 0}
+     on {print $0}
+     $0 ~ /^pre-install[ \t]*$/ {on = 1}
+
+
+File: standards.info,  Node: Releases,  Prev: Makefile Conventions,  Up: Managing Releases
+
+7.3 Making Releases
+===================
+
+You should identify each release with a pair of version numbers, a
+major version and a minor.  We have no objection to using more than two
+numbers, but it is very unlikely that you really need them.
+
+   Package the distribution of `Foo version 69.96' up in a gzipped tar
+file with the name `foo-69.96.tar.gz'.  It should unpack into a
+subdirectory named `foo-69.96'.
+
+   Building and installing the program should never modify any of the
+files contained in the distribution.  This means that all the files
+that form part of the program in any way must be classified into "source
+files" and "non-source files".  Source files are written by humans and
+never changed automatically; non-source files are produced from source
+files by programs under the control of the Makefile.
+
+   The distribution should contain a file named `README' which gives
+the name of the package, and a general description of what it does.  It
+is also good to explain the purpose of each of the first-level
+subdirectories in the package, if there are any.  The `README' file
+should either state the version number of the package, or refer to where
+in the package it can be found.
+
+   The `README' file should refer to the file `INSTALL', which should
+contain an explanation of the installation procedure.
+
+   The `README' file should also refer to the file which contains the
+copying conditions.  The GNU GPL, if used, should be in a file called
+`COPYING'.  If the GNU LGPL is used, it should be in a file called
+`COPYING.LESSER'.
+
+   Naturally, all the source files must be in the distribution.  It is
+okay to include non-source files in the distribution, provided they are
+up-to-date and machine-independent, so that building the distribution
+normally will never modify them.  We commonly include non-source files
+produced by Bison, `lex', TeX, and `makeinfo'; this helps avoid
+unnecessary dependencies between our distributions, so that users can
+install whichever packages they want to install.
+
+   Non-source files that might actually be modified by building and
+installing the program should *never* be included in the distribution.
+So if you do distribute non-source files, always make sure they are up
+to date when you make a new distribution.
+
+   Make sure that all the files in the distribution are world-readable,
+and that directories are world-readable and world-searchable (octal
+mode 755).  We used to recommend that all directories in the
+distribution also be world-writable (octal mode 777), because ancient
+versions of `tar' would otherwise not cope when extracting the archive
+as an unprivileged user.  That can easily lead to security issues when
+creating the archive, however, so now we recommend against that.
+
+   Don't include any symbolic links in the distribution itself.  If the
+tar file contains symbolic links, then people cannot even unpack it on
+systems that don't support symbolic links.  Also, don't use multiple
+names for one file in different directories, because certain file
+systems cannot handle this and that prevents unpacking the distribution.
+
+   Try to make sure that all the file names will be unique on MS-DOS.  A
+name on MS-DOS consists of up to 8 characters, optionally followed by a
+period and up to three characters.  MS-DOS will truncate extra
+characters both before and after the period.  Thus, `foobarhacker.c'
+and `foobarhacker.o' are not ambiguous; they are truncated to
+`foobarha.c' and `foobarha.o', which are distinct.
+
+   Include in your distribution a copy of the `texinfo.tex' you used to
+test print any `*.texinfo' or `*.texi' files.
+
+   Likewise, if your program uses small GNU software packages like
+regex, getopt, obstack, or termcap, include them in the distribution
+file.  Leaving them out would make the distribution file a little
+smaller at the expense of possible inconvenience to a user who doesn't
+know what other files to get.
+
+
+File: standards.info,  Node: References,  Next: GNU Free Documentation License,  Prev: Managing Releases,  Up: Top
+
+8 References to Non-Free Software and Documentation
+***************************************************
+
+A GNU program should not recommend, promote, or grant legitimacy to the
+use of any non-free program.  Proprietary software is a social and
+ethical problem, and our aim is to put an end to that problem.  We
+can't stop some people from writing proprietary programs, or stop other
+people from using them, but we can and should refuse to advertise them
+to new potential customers, or to give the public the idea that their
+existence is ethical.
+
+   The GNU definition of free software is found on the GNU web site at
+`http://www.gnu.org/philosophy/free-sw.html', and the definition of
+free documentation is found at
+`http://www.gnu.org/philosophy/free-doc.html'.  The terms "free" and
+"non-free", used in this document, refer to those definitions.
+
+   A list of important licenses and whether they qualify as free is in
+`http://www.gnu.org/licenses/license-list.html'.  If it is not clear
+whether a license qualifies as free, please ask the GNU Project by
+writing to <licensing@gnu.org>.  We will answer, and if the license is
+an important one, we will add it to the list.
+
+   When a non-free program or system is well known, you can mention it
+in passing--that is harmless, since users who might want to use it
+probably already know about it.  For instance, it is fine to explain
+how to build your package on top of some widely used non-free operating
+system, or how to use it together with some widely used non-free
+program.
+
+   However, you should give only the necessary information to help those
+who already use the non-free program to use your program with it--don't
+give, or refer to, any further information about the proprietary
+program, and don't imply that the proprietary program enhances your
+program, or that its existence is in any way a good thing.  The goal
+should be that people already using the proprietary program will get
+the advice they need about how to use your free program with it, while
+people who don't already use the proprietary program will not see
+anything likely to lead them to take an interest in it.
+
+   If a non-free program or system is obscure in your program's domain,
+your program should not mention or support it at all, since doing so
+would tend to popularize the non-free program more than it popularizes
+your program.  (You cannot hope to find many additional users for your
+program among the users of Foobar, if the existence of Foobar is not
+generally known among people who might want to use your program.)
+
+   Sometimes a program is free software in itself but depends on a
+non-free platform in order to run.  For instance, many Java programs
+depend on some non-free Java libraries.  To recommend or promote such a
+program is to promote the other programs it needs.  This is why we are
+careful about listing Java programs in the Free Software Directory: we
+don't want to promote the non-free Java libraries.
+
+   We hope this particular problem with Java will be gone by and by, as
+we replace the remaining non-free standard Java libraries with free
+software, but the general principle will remain the same: don't
+recommend, promote or legitimize programs that depend on non-free
+software to run.
+
+   Some free programs strongly encourage the use of non-free software.
+A typical example is `mplayer'.  It is free software in itself, and the
+free code can handle some kinds of files.  However, `mplayer'
+recommends use of non-free codecs for other kinds of files, and users
+that install `mplayer' are very likely to install those codecs along
+with it.  To recommend `mplayer' is, in effect, to promote use of the
+non-free codecs.
+
+   Thus, you should not recommend programs that strongly encourage the
+use of non-free software.  This is why we do not list `mplayer' in the
+Free Software Directory.
+
+   A GNU package should not refer the user to any non-free documentation
+for free software.  Free documentation that can be included in free
+operating systems is essential for completing the GNU system, or any
+free operating system, so encouraging it is a priority; to recommend
+use of documentation that we are not allowed to include undermines the
+impetus for the community to produce documentation that we can include.
+So GNU packages should never recommend non-free documentation.
+
+   By contrast, it is ok to refer to journal articles and textbooks in
+the comments of a program for explanation of how it functions, even
+though they are non-free.  This is because we don't include such things
+in the GNU system even they are free--they are outside the scope of
+what a software distribution needs to include.
+
+   Referring to a web site that describes or recommends a non-free
+program is promoting that program, so please do not make links (or
+mention by name) web sites that contain such material.  This policy is
+relevant particularly for the web pages for a GNU package.
+
+   Following links from nearly any web site can lead eventually to
+non-free software; this is inherent in the nature of the web.  So it
+makes no sense to criticize a site for having such links.  As long as
+the site does not itself recommend a non-free program, there is no need
+to consider the question of the sites that it links to for other
+reasons.
+
+   Thus, for example, you should not refer to AT&T's web site if that
+recommends AT&T's non-free software packages; you should not refer to a
+site that links to AT&T's site presenting it as a place to get some
+non-free program, because that link recommends and legitimizes the
+non-free program.  However, that a site contains a link to AT&T's web
+site for some other purpose (such as long-distance telephone service)
+is not an objection against it.
+
+
+File: standards.info,  Node: GNU Free Documentation License,  Next: Index,  Prev: References,  Up: Top
+
+Appendix A GNU Free Documentation License
+*****************************************
+
+                     Version 1.3, 3 November 2008
+
+     Copyright (C) 2000, 2001, 2002, 2007, 2008 Free Software Foundation, Inc.
+     `http://fsf.org/'
+
+     Everyone is permitted to copy and distribute verbatim copies
+     of this license document, but changing it is not allowed.
+
+  0. PREAMBLE
+
+     The purpose of this License is to make a manual, textbook, or other
+     functional and useful document "free" in the sense of freedom: to
+     assure everyone the effective freedom to copy and redistribute it,
+     with or without modifying it, either commercially or
+     noncommercially.  Secondarily, this License preserves for the
+     author and publisher a way to get credit for their work, while not
+     being considered responsible for modifications made by others.
+
+     This License is a kind of "copyleft", which means that derivative
+     works of the document must themselves be free in the same sense.
+     It complements the GNU General Public License, which is a copyleft
+     license designed for free software.
+
+     We have designed this License in order to use it for manuals for
+     free software, because free software needs free documentation: a
+     free program should come with manuals providing the same freedoms
+     that the software does.  But this License is not limited to
+     software manuals; it can be used for any textual work, regardless
+     of subject matter or whether it is published as a printed book.
+     We recommend this License principally for works whose purpose is
+     instruction or reference.
+
+  1. APPLICABILITY AND DEFINITIONS
+
+     This License applies to any manual or other work, in any medium,
+     that contains a notice placed by the copyright holder saying it
+     can be distributed under the terms of this License.  Such a notice
+     grants a world-wide, royalty-free license, unlimited in duration,
+     to use that work under the conditions stated herein.  The
+     "Document", below, refers to any such manual or work.  Any member
+     of the public is a licensee, and is addressed as "you".  You
+     accept the license if you copy, modify or distribute the work in a
+     way requiring permission under copyright law.
+
+     A "Modified Version" of the Document means any work containing the
+     Document or a portion of it, either copied verbatim, or with
+     modifications and/or translated into another language.
+
+     A "Secondary Section" is a named appendix or a front-matter section
+     of the Document that deals exclusively with the relationship of the
+     publishers or authors of the Document to the Document's overall
+     subject (or to related matters) and contains nothing that could
+     fall directly within that overall subject.  (Thus, if the Document
+     is in part a textbook of mathematics, a Secondary Section may not
+     explain any mathematics.)  The relationship could be a matter of
+     historical connection with the subject or with related matters, or
+     of legal, commercial, philosophical, ethical or political position
+     regarding them.
+
+     The "Invariant Sections" are certain Secondary Sections whose
+     titles are designated, as being those of Invariant Sections, in
+     the notice that says that the Document is released under this
+     License.  If a section does not fit the above definition of
+     Secondary then it is not allowed to be designated as Invariant.
+     The Document may contain zero Invariant Sections.  If the Document
+     does not identify any Invariant Sections then there are none.
+
+     The "Cover Texts" are certain short passages of text that are
+     listed, as Front-Cover Texts or Back-Cover Texts, in the notice
+     that says that the Document is released under this License.  A
+     Front-Cover Text may be at most 5 words, and a Back-Cover Text may
+     be at most 25 words.
+
+     A "Transparent" copy of the Document means a machine-readable copy,
+     represented in a format whose specification is available to the
+     general public, that is suitable for revising the document
+     straightforwardly with generic text editors or (for images
+     composed of pixels) generic paint programs or (for drawings) some
+     widely available drawing editor, and that is suitable for input to
+     text formatters or for automatic translation to a variety of
+     formats suitable for input to text formatters.  A copy made in an
+     otherwise Transparent file format whose markup, or absence of
+     markup, has been arranged to thwart or discourage subsequent
+     modification by readers is not Transparent.  An image format is
+     not Transparent if used for any substantial amount of text.  A
+     copy that is not "Transparent" is called "Opaque".
+
+     Examples of suitable formats for Transparent copies include plain
+     ASCII without markup, Texinfo input format, LaTeX input format,
+     SGML or XML using a publicly available DTD, and
+     standard-conforming simple HTML, PostScript or PDF designed for
+     human modification.  Examples of transparent image formats include
+     PNG, XCF and JPG.  Opaque formats include proprietary formats that
+     can be read and edited only by proprietary word processors, SGML or
+     XML for which the DTD and/or processing tools are not generally
+     available, and the machine-generated HTML, PostScript or PDF
+     produced by some word processors for output purposes only.
+
+     The "Title Page" means, for a printed book, the title page itself,
+     plus such following pages as are needed to hold, legibly, the
+     material this License requires to appear in the title page.  For
+     works in formats which do not have any title page as such, "Title
+     Page" means the text near the most prominent appearance of the
+     work's title, preceding the beginning of the body of the text.
+
+     The "publisher" means any person or entity that distributes copies
+     of the Document to the public.
+
+     A section "Entitled XYZ" means a named subunit of the Document
+     whose title either is precisely XYZ or contains XYZ in parentheses
+     following text that translates XYZ in another language.  (Here XYZ
+     stands for a specific section name mentioned below, such as
+     "Acknowledgements", "Dedications", "Endorsements", or "History".)
+     To "Preserve the Title" of such a section when you modify the
+     Document means that it remains a section "Entitled XYZ" according
+     to this definition.
+
+     The Document may include Warranty Disclaimers next to the notice
+     which states that this License applies to the Document.  These
+     Warranty Disclaimers are considered to be included by reference in
+     this License, but only as regards disclaiming warranties: any other
+     implication that these Warranty Disclaimers may have is void and
+     has no effect on the meaning of this License.
+
+  2. VERBATIM COPYING
+
+     You may copy and distribute the Document in any medium, either
+     commercially or noncommercially, provided that this License, the
+     copyright notices, and the license notice saying this License
+     applies to the Document are reproduced in all copies, and that you
+     add no other conditions whatsoever to those of this License.  You
+     may not use technical measures to obstruct or control the reading
+     or further copying of the copies you make or distribute.  However,
+     you may accept compensation in exchange for copies.  If you
+     distribute a large enough number of copies you must also follow
+     the conditions in section 3.
+
+     You may also lend copies, under the same conditions stated above,
+     and you may publicly display copies.
+
+  3. COPYING IN QUANTITY
+
+     If you publish printed copies (or copies in media that commonly
+     have printed covers) of the Document, numbering more than 100, and
+     the Document's license notice requires Cover Texts, you must
+     enclose the copies in covers that carry, clearly and legibly, all
+     these Cover Texts: Front-Cover Texts on the front cover, and
+     Back-Cover Texts on the back cover.  Both covers must also clearly
+     and legibly identify you as the publisher of these copies.  The
+     front cover must present the full title with all words of the
+     title equally prominent and visible.  You may add other material
+     on the covers in addition.  Copying with changes limited to the
+     covers, as long as they preserve the title of the Document and
+     satisfy these conditions, can be treated as verbatim copying in
+     other respects.
+
+     If the required texts for either cover are too voluminous to fit
+     legibly, you should put the first ones listed (as many as fit
+     reasonably) on the actual cover, and continue the rest onto
+     adjacent pages.
+
+     If you publish or distribute Opaque copies of the Document
+     numbering more than 100, you must either include a
+     machine-readable Transparent copy along with each Opaque copy, or
+     state in or with each Opaque copy a computer-network location from
+     which the general network-using public has access to download
+     using public-standard network protocols a complete Transparent
+     copy of the Document, free of added material.  If you use the
+     latter option, you must take reasonably prudent steps, when you
+     begin distribution of Opaque copies in quantity, to ensure that
+     this Transparent copy will remain thus accessible at the stated
+     location until at least one year after the last time you
+     distribute an Opaque copy (directly or through your agents or
+     retailers) of that edition to the public.
+
+     It is requested, but not required, that you contact the authors of
+     the Document well before redistributing any large number of
+     copies, to give them a chance to provide you with an updated
+     version of the Document.
+
+  4. MODIFICATIONS
+
+     You may copy and distribute a Modified Version of the Document
+     under the conditions of sections 2 and 3 above, provided that you
+     release the Modified Version under precisely this License, with
+     the Modified Version filling the role of the Document, thus
+     licensing distribution and modification of the Modified Version to
+     whoever possesses a copy of it.  In addition, you must do these
+     things in the Modified Version:
+
+       A. Use in the Title Page (and on the covers, if any) a title
+          distinct from that of the Document, and from those of
+          previous versions (which should, if there were any, be listed
+          in the History section of the Document).  You may use the
+          same title as a previous version if the original publisher of
+          that version gives permission.
+
+       B. List on the Title Page, as authors, one or more persons or
+          entities responsible for authorship of the modifications in
+          the Modified Version, together with at least five of the
+          principal authors of the Document (all of its principal
+          authors, if it has fewer than five), unless they release you
+          from this requirement.
+
+       C. State on the Title page the name of the publisher of the
+          Modified Version, as the publisher.
+
+       D. Preserve all the copyright notices of the Document.
+
+       E. Add an appropriate copyright notice for your modifications
+          adjacent to the other copyright notices.
+
+       F. Include, immediately after the copyright notices, a license
+          notice giving the public permission to use the Modified
+          Version under the terms of this License, in the form shown in
+          the Addendum below.
+
+       G. Preserve in that license notice the full lists of Invariant
+          Sections and required Cover Texts given in the Document's
+          license notice.
+
+       H. Include an unaltered copy of this License.
+
+       I. Preserve the section Entitled "History", Preserve its Title,
+          and add to it an item stating at least the title, year, new
+          authors, and publisher of the Modified Version as given on
+          the Title Page.  If there is no section Entitled "History" in
+          the Document, create one stating the title, year, authors,
+          and publisher of the Document as given on its Title Page,
+          then add an item describing the Modified Version as stated in
+          the previous sentence.
+
+       J. Preserve the network location, if any, given in the Document
+          for public access to a Transparent copy of the Document, and
+          likewise the network locations given in the Document for
+          previous versions it was based on.  These may be placed in
+          the "History" section.  You may omit a network location for a
+          work that was published at least four years before the
+          Document itself, or if the original publisher of the version
+          it refers to gives permission.
+
+       K. For any section Entitled "Acknowledgements" or "Dedications",
+          Preserve the Title of the section, and preserve in the
+          section all the substance and tone of each of the contributor
+          acknowledgements and/or dedications given therein.
+
+       L. Preserve all the Invariant Sections of the Document,
+          unaltered in their text and in their titles.  Section numbers
+          or the equivalent are not considered part of the section
+          titles.
+
+       M. Delete any section Entitled "Endorsements".  Such a section
+          may not be included in the Modified Version.
+
+       N. Do not retitle any existing section to be Entitled
+          "Endorsements" or to conflict in title with any Invariant
+          Section.
+
+       O. Preserve any Warranty Disclaimers.
+
+     If the Modified Version includes new front-matter sections or
+     appendices that qualify as Secondary Sections and contain no
+     material copied from the Document, you may at your option
+     designate some or all of these sections as invariant.  To do this,
+     add their titles to the list of Invariant Sections in the Modified
+     Version's license notice.  These titles must be distinct from any
+     other section titles.
+
+     You may add a section Entitled "Endorsements", provided it contains
+     nothing but endorsements of your Modified Version by various
+     parties--for example, statements of peer review or that the text
+     has been approved by an organization as the authoritative
+     definition of a standard.
+
+     You may add a passage of up to five words as a Front-Cover Text,
+     and a passage of up to 25 words as a Back-Cover Text, to the end
+     of the list of Cover Texts in the Modified Version.  Only one
+     passage of Front-Cover Text and one of Back-Cover Text may be
+     added by (or through arrangements made by) any one entity.  If the
+     Document already includes a cover text for the same cover,
+     previously added by you or by arrangement made by the same entity
+     you are acting on behalf of, you may not add another; but you may
+     replace the old one, on explicit permission from the previous
+     publisher that added the old one.
+
+     The author(s) and publisher(s) of the Document do not by this
+     License give permission to use their names for publicity for or to
+     assert or imply endorsement of any Modified Version.
+
+  5. COMBINING DOCUMENTS
+
+     You may combine the Document with other documents released under
+     this License, under the terms defined in section 4 above for
+     modified versions, provided that you include in the combination
+     all of the Invariant Sections of all of the original documents,
+     unmodified, and list them all as Invariant Sections of your
+     combined work in its license notice, and that you preserve all
+     their Warranty Disclaimers.
+
+     The combined work need only contain one copy of this License, and
+     multiple identical Invariant Sections may be replaced with a single
+     copy.  If there are multiple Invariant Sections with the same name
+     but different contents, make the title of each such section unique
+     by adding at the end of it, in parentheses, the name of the
+     original author or publisher of that section if known, or else a
+     unique number.  Make the same adjustment to the section titles in
+     the list of Invariant Sections in the license notice of the
+     combined work.
+
+     In the combination, you must combine any sections Entitled
+     "History" in the various original documents, forming one section
+     Entitled "History"; likewise combine any sections Entitled
+     "Acknowledgements", and any sections Entitled "Dedications".  You
+     must delete all sections Entitled "Endorsements."
+
+  6. COLLECTIONS OF DOCUMENTS
+
+     You may make a collection consisting of the Document and other
+     documents released under this License, and replace the individual
+     copies of this License in the various documents with a single copy
+     that is included in the collection, provided that you follow the
+     rules of this License for verbatim copying of each of the
+     documents in all other respects.
+
+     You may extract a single document from such a collection, and
+     distribute it individually under this License, provided you insert
+     a copy of this License into the extracted document, and follow
+     this License in all other respects regarding verbatim copying of
+     that document.
+
+  7. AGGREGATION WITH INDEPENDENT WORKS
+
+     A compilation of the Document or its derivatives with other
+     separate and independent documents or works, in or on a volume of
+     a storage or distribution medium, is called an "aggregate" if the
+     copyright resulting from the compilation is not used to limit the
+     legal rights of the compilation's users beyond what the individual
+     works permit.  When the Document is included in an aggregate, this
+     License does not apply to the other works in the aggregate which
+     are not themselves derivative works of the Document.
+
+     If the Cover Text requirement of section 3 is applicable to these
+     copies of the Document, then if the Document is less than one half
+     of the entire aggregate, the Document's Cover Texts may be placed
+     on covers that bracket the Document within the aggregate, or the
+     electronic equivalent of covers if the Document is in electronic
+     form.  Otherwise they must appear on printed covers that bracket
+     the whole aggregate.
+
+  8. TRANSLATION
+
+     Translation is considered a kind of modification, so you may
+     distribute translations of the Document under the terms of section
+     4.  Replacing Invariant Sections with translations requires special
+     permission from their copyright holders, but you may include
+     translations of some or all Invariant Sections in addition to the
+     original versions of these Invariant Sections.  You may include a
+     translation of this License, and all the license notices in the
+     Document, and any Warranty Disclaimers, provided that you also
+     include the original English version of this License and the
+     original versions of those notices and disclaimers.  In case of a
+     disagreement between the translation and the original version of
+     this License or a notice or disclaimer, the original version will
+     prevail.
+
+     If a section in the Document is Entitled "Acknowledgements",
+     "Dedications", or "History", the requirement (section 4) to
+     Preserve its Title (section 1) will typically require changing the
+     actual title.
+
+  9. TERMINATION
+
+     You may not copy, modify, sublicense, or distribute the Document
+     except as expressly provided under this License.  Any attempt
+     otherwise to copy, modify, sublicense, or distribute it is void,
+     and will automatically terminate your rights under this License.
+
+     However, if you cease all violation of this License, then your
+     license from a particular copyright holder is reinstated (a)
+     provisionally, unless and until the copyright holder explicitly
+     and finally terminates your license, and (b) permanently, if the
+     copyright holder fails to notify you of the violation by some
+     reasonable means prior to 60 days after the cessation.
+
+     Moreover, your license from a particular copyright holder is
+     reinstated permanently if the copyright holder notifies you of the
+     violation by some reasonable means, this is the first time you have
+     received notice of violation of this License (for any work) from
+     that copyright holder, and you cure the violation prior to 30 days
+     after your receipt of the notice.
+
+     Termination of your rights under this section does not terminate
+     the licenses of parties who have received copies or rights from
+     you under this License.  If your rights have been terminated and
+     not permanently reinstated, receipt of a copy of some or all of
+     the same material does not give you any rights to use it.
+
+ 10. FUTURE REVISIONS OF THIS LICENSE
+
+     The Free Software Foundation may publish new, revised versions of
+     the GNU Free Documentation License from time to time.  Such new
+     versions will be similar in spirit to the present version, but may
+     differ in detail to address new problems or concerns.  See
+     `http://www.gnu.org/copyleft/'.
+
+     Each version of the License is given a distinguishing version
+     number.  If the Document specifies that a particular numbered
+     version of this License "or any later version" applies to it, you
+     have the option of following the terms and conditions either of
+     that specified version or of any later version that has been
+     published (not as a draft) by the Free Software Foundation.  If
+     the Document does not specify a version number of this License,
+     you may choose any version ever published (not as a draft) by the
+     Free Software Foundation.  If the Document specifies that a proxy
+     can decide which future versions of this License can be used, that
+     proxy's public statement of acceptance of a version permanently
+     authorizes you to choose that version for the Document.
+
+ 11. RELICENSING
+
+     "Massive Multiauthor Collaboration Site" (or "MMC Site") means any
+     World Wide Web server that publishes copyrightable works and also
+     provides prominent facilities for anybody to edit those works.  A
+     public wiki that anybody can edit is an example of such a server.
+     A "Massive Multiauthor Collaboration" (or "MMC") contained in the
+     site means any set of copyrightable works thus published on the MMC
+     site.
+
+     "CC-BY-SA" means the Creative Commons Attribution-Share Alike 3.0
+     license published by Creative Commons Corporation, a not-for-profit
+     corporation with a principal place of business in San Francisco,
+     California, as well as future copyleft versions of that license
+     published by that same organization.
+
+     "Incorporate" means to publish or republish a Document, in whole or
+     in part, as part of another Document.
+
+     An MMC is "eligible for relicensing" if it is licensed under this
+     License, and if all works that were first published under this
+     License somewhere other than this MMC, and subsequently
+     incorporated in whole or in part into the MMC, (1) had no cover
+     texts or invariant sections, and (2) were thus incorporated prior
+     to November 1, 2008.
+
+     The operator of an MMC Site may republish an MMC contained in the
+     site under CC-BY-SA on the same site at any time before August 1,
+     2009, provided the MMC is eligible for relicensing.
+
+
+ADDENDUM: How to use this License for your documents
+====================================================
+
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and license
+notices just after the title page:
+
+       Copyright (C)  YEAR  YOUR NAME.
+       Permission is granted to copy, distribute and/or modify this document
+       under the terms of the GNU Free Documentation License, Version 1.3
+       or any later version published by the Free Software Foundation;
+       with no Invariant Sections, no Front-Cover Texts, and no Back-Cover
+       Texts.  A copy of the license is included in the section entitled ``GNU
+       Free Documentation License''.
+
+   If you have Invariant Sections, Front-Cover Texts and Back-Cover
+Texts, replace the "with...Texts." line with this:
+
+         with the Invariant Sections being LIST THEIR TITLES, with
+         the Front-Cover Texts being LIST, and with the Back-Cover Texts
+         being LIST.
+
+   If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+
+   If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the GNU General Public License, to
+permit their use in free software.
+
+
+File: standards.info,  Node: Index,  Prev: GNU Free Documentation License,  Up: Top
+
+Index
+*****
+
+[index]
+* Menu:
+
+* #endif, commenting:                    Comments.            (line  60)
+* --help output:                         --help.              (line   6)
+* --version output:                      --version.           (line   6)
+* -Wall compiler option:                 Syntactic Conventions.
+                                                              (line  10)
+* accepting contributions:               Contributions.       (line   6)
+* address for bug reports:               --help.              (line  11)
+* ANSI C standard:                       Standard C.          (line   6)
+* arbitrary limits on data:              Semantics.           (line   6)
+* ASCII characters:                      Character Set.       (line   6)
+* autoconf:                              System Portability.  (line  23)
+* avoiding proprietary code:             Reading Non-Free Code.
+                                                              (line   6)
+* behavior, dependent on program's name: User Interfaces.     (line   6)
+* binary packages:                       Install Command Categories.
+                                                              (line  80)
+* bindir:                                Directory Variables. (line  54)
+* braces, in C source:                   Formatting.          (line   6)
+* bug reports:                           --help.              (line  11)
+* bug-standards@gnu.org email address:   Preface.             (line  30)
+* canonical name of a program:           --version.           (line  12)
+* casting pointers to integers:          CPU Portability.     (line  89)
+* CGI programs, standard options for:    Command-Line Interfaces.
+                                                              (line  31)
+* change logs:                           Change Logs.         (line   6)
+* change logs, conditional changes:      Conditional Changes. (line   6)
+* change logs, style:                    Style of Change Logs.
+                                                              (line   6)
+* character set:                         Character Set.       (line   6)
+* command-line arguments, decoding:      Semantics.           (line  46)
+* command-line interface:                Command-Line Interfaces.
+                                                              (line   6)
+* commenting:                            Comments.            (line   6)
+* compatibility with C and POSIX standards: Compatibility.    (line   6)
+* compiler warnings:                     Syntactic Conventions.
+                                                              (line  10)
+* conditional changes, and change logs:  Conditional Changes. (line   6)
+* conditionals, comments for:            Comments.            (line  60)
+* configure:                             Configuration.       (line   6)
+* control-L:                             Formatting.          (line 118)
+* conventions for makefiles:             Makefile Conventions.
+                                                              (line   6)
+* CORBA:                                 Graphical Interfaces.
+                                                              (line  16)
+* credits for manuals:                   Manual Credits.      (line   6)
+* D-bus:                                 Graphical Interfaces.
+                                                              (line  16)
+* data types, and portability:           CPU Portability.     (line   6)
+* declaration for system functions:      System Functions.    (line  21)
+* DESTDIR:                               DESTDIR.             (line   6)
+* documentation:                         Documentation.       (line   6)
+* doschk:                                Names.               (line  38)
+* downloading this manual:               Preface.             (line  14)
+* encodings:                             Character Set.       (line   6)
+* error messages:                        Semantics.           (line  19)
+* error messages, formatting:            Errors.              (line   6)
+* exec_prefix:                           Directory Variables. (line  36)
+* expressions, splitting:                Formatting.          (line  81)
+* FDL, GNU Free Documentation License:   GNU Free Documentation License.
+                                                              (line   6)
+* file usage:                            File Usage.          (line   6)
+* file-name limitations:                 Names.               (line  38)
+* formatting error messages:             Errors.              (line   6)
+* formatting source code:                Formatting.          (line   6)
+* formfeed:                              Formatting.          (line 118)
+* function argument, declaring:          Syntactic Conventions.
+                                                              (line   6)
+* function prototypes:                   Standard C.          (line  17)
+* getopt:                                Command-Line Interfaces.
+                                                              (line   6)
+* gettext:                               Internationalization.
+                                                              (line   6)
+* GNOME:                                 Graphical Interfaces.
+                                                              (line  16)
+* GNOME and Guile:                       Source Language.     (line  38)
+* gnustandards project repository:       Preface.             (line  30)
+* gnustandards-commit@gnu.org mailing list: Preface.          (line  24)
+* graphical user interface:              Graphical Interfaces.
+                                                              (line   6)
+* grave accent:                          Quote Characters.    (line   6)
+* GTK+:                                  Graphical Interfaces.
+                                                              (line   6)
+* Guile:                                 Source Language.     (line  38)
+* implicit int:                          Syntactic Conventions.
+                                                              (line   6)
+* impossible conditions:                 Semantics.           (line  70)
+* installations, staged:                 DESTDIR.             (line   6)
+* interface styles:                      Graphical Interfaces.
+                                                              (line   6)
+* internationalization:                  Internationalization.
+                                                              (line   6)
+* keyboard interface:                    Graphical Interfaces.
+                                                              (line  16)
+* LDAP:                                  OID Allocations.     (line   6)
+* left quote:                            Quote Characters.    (line   6)
+* legal aspects:                         Legal Issues.        (line   6)
+* legal papers:                          Contributions.       (line   6)
+* libexecdir:                            Directory Variables. (line  67)
+* libraries:                             Libraries.           (line   6)
+* library functions, and portability:    System Functions.    (line   6)
+* library interface:                     Graphical Interfaces.
+                                                              (line  16)
+* license for manuals:                   License for Manuals. (line   6)
+* lint:                                  Syntactic Conventions.
+                                                              (line 109)
+* locale-specific quote characters:      Quote Characters.    (line   6)
+* long option names:                     Option Table.        (line   6)
+* long-named options:                    Command-Line Interfaces.
+                                                              (line  12)
+* makefile, conventions for:             Makefile Conventions.
+                                                              (line   6)
+* malloc return value:                   Semantics.           (line  25)
+* man pages:                             Man Pages.           (line   6)
+* manual structure:                      Manual Structure Details.
+                                                              (line   6)
+* memory allocation failure:             Semantics.           (line  25)
+* memory usage:                          Memory Usage.        (line   6)
+* message text, and internationalization: Internationalization.
+                                                              (line  29)
+* mmap:                                  Mmap.                (line   6)
+* multiple variables in a line:          Syntactic Conventions.
+                                                              (line  35)
+* names of variables, functions, and files: Names.            (line   6)
+* NEWS file:                             NEWS File.           (line   6)
+* non-ASCII characters:                  Character Set.       (line   6)
+* non-POSIX systems, and portability:    System Portability.  (line  32)
+* non-standard extensions:               Using Extensions.    (line   6)
+* NUL characters:                        Semantics.           (line  11)
+* OID allocations for GNU:               OID Allocations.     (line   6)
+* open brace:                            Formatting.          (line   6)
+* optional features, configure-time:     Configuration.       (line 100)
+* options for compatibility:             Compatibility.       (line  14)
+* options, standard command-line:        Command-Line Interfaces.
+                                                              (line  31)
+* output device and program's behavior:  User Interfaces.     (line  13)
+* packaging:                             Releases.            (line   6)
+* PATH_INFO, specifying standard options as: Command-Line Interfaces.
+                                                              (line  31)
+* portability, and data types:           CPU Portability.     (line   6)
+* portability, and library functions:    System Functions.    (line   6)
+* portability, between system types:     System Portability.  (line   6)
+* POSIX compatibility:                   Compatibility.       (line   6)
+* POSIXLY_CORRECT, environment variable: Compatibility.       (line  21)
+* post-installation commands:            Install Command Categories.
+                                                              (line   6)
+* pre-installation commands:             Install Command Categories.
+                                                              (line   6)
+* prefix:                                Directory Variables. (line  26)
+* program configuration:                 Configuration.       (line   6)
+* program design:                        Design Advice.       (line   6)
+* program name and its behavior:         User Interfaces.     (line   6)
+* program's canonical name:              --version.           (line  12)
+* programming languages:                 Source Language.     (line   6)
+* proprietary programs:                  Reading Non-Free Code.
+                                                              (line   6)
+* quote characters:                      Quote Characters.    (line   6)
+* README file:                           Releases.            (line  21)
+* references to non-free material:       References.          (line   6)
+* releasing:                             Managing Releases.   (line   6)
+* Savannah repository for gnustandards:  Preface.             (line  30)
+* sbindir:                               Directory Variables. (line  60)
+* signal handling:                       Semantics.           (line  59)
+* SNMP:                                  OID Allocations.     (line   6)
+* spaces before open-paren:              Formatting.          (line  75)
+* staged installs:                       DESTDIR.             (line   6)
+* standard command-line options:         Command-Line Interfaces.
+                                                              (line  31)
+* standards for makefiles:               Makefile Conventions.
+                                                              (line   6)
+* string library functions:              System Functions.    (line  55)
+* syntactic conventions:                 Syntactic Conventions.
+                                                              (line   6)
+* table of long options:                 Option Table.        (line   6)
+* temporary files:                       Semantics.           (line  84)
+* temporary variables:                   Syntactic Conventions.
+                                                              (line  23)
+* texinfo.tex, in a distribution:        Releases.            (line  70)
+* TMPDIR environment variable:           Semantics.           (line  84)
+* trademarks:                            Trademarks.          (line   6)
+* user interface styles:                 Graphical Interfaces.
+                                                              (line   6)
+* where to obtain standards.texi:        Preface.             (line  14)
+* X.509:                                 OID Allocations.     (line   6)
+
+
+
+Tag Table:
+Node: Top839
+Node: Preface2114
+Node: Legal Issues4827
+Node: Reading Non-Free Code5297
+Node: Contributions7027
+Node: Trademarks9265
+Node: Design Advice10900
+Node: Source Language11492
+Node: Compatibility13618
+Node: Using Extensions15246
+Node: Standard C16822
+Node: Conditional Compilation19225
+Node: Program Behavior20623
+Node: Non-GNU Standards21739
+Node: Semantics24020
+Node: Libraries28740
+Node: Errors29985
+Node: User Interfaces32478
+Node: Graphical Interfaces34083
+Node: Command-Line Interfaces35267
+Node: --version37299
+Node: --help43036
+Node: Option Table43909
+Node: OID Allocations58864
+Node: Memory Usage60661
+Node: File Usage61697
+Node: Writing C62447
+Node: Formatting63419
+Node: Comments67708
+Node: Syntactic Conventions71260
+Node: Names74722
+Node: System Portability76934
+Node: CPU Portability79825
+Node: System Functions83726
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+Node: Manual Credits106747
+Node: Printed Manuals107140
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+Node: Index208927
+
+End Tag Table
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-addr2line.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-addr2line.1
new file mode 100644
index 00000000..c77f9898
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-addr2line.1
@@ -0,0 +1,273 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "ADDR2LINE 1"
+.TH ADDR2LINE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+addr2line \- convert addresses into file names and line numbers.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+addr2line [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+          [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]]
+          [\fB\-e\fR \fIfilename\fR|\fB\-\-exe=\fR\fIfilename\fR]
+          [\fB\-f\fR|\fB\-\-functions\fR] [\fB\-s\fR|\fB\-\-basename\fR]
+          [\fB\-i\fR|\fB\-\-inlines\fR]
+          [\fB\-j\fR|\fB\-\-section=\fR\fIname\fR]
+          [\fB\-H\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+          [addr addr ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBaddr2line\fR translates addresses into file names and line numbers.
+Given an address in an executable or an offset in a section of a relocatable
+object, it uses the debugging information to figure out which file name and
+line number are associated with it.
+.PP
+The executable or relocatable object to use is specified with the \fB\-e\fR
+option.  The default is the file \fIa.out\fR.  The section in the relocatable
+object to use is specified with the \fB\-j\fR option.
+.PP
+\&\fBaddr2line\fR has two modes of operation.
+.PP
+In the first, hexadecimal addresses are specified on the command line,
+and \fBaddr2line\fR displays the file name and line number for each
+address.
+.PP
+In the second, \fBaddr2line\fR reads hexadecimal addresses from
+standard input, and prints the file name and line number for each
+address on standard output.  In this mode, \fBaddr2line\fR may be used
+in a pipe to convert dynamically chosen addresses.
+.PP
+The format of the output is \fB\s-1FILENAME:LINENO\s0\fR.  The file name and
+line number for each address is printed on a separate line.  If the
+\&\fB\-f\fR option is used, then each \fB\s-1FILENAME:LINENO\s0\fR line is
+preceded by a \fB\s-1FUNCTIONNAME\s0\fR line which is the name of the function
+containing the address.
+.PP
+If the file name or function name can not be determined,
+\&\fBaddr2line\fR will print two question marks in their place.  If the
+line number can not be determined, \fBaddr2line\fR will print 0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable.  Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-exe=\fR\fIfilename\fR" 4
+.IX Item "--exe=filename"
+.PD
+Specify the name of the executable for which addresses should be
+translated.  The default file is \fIa.out\fR.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-functions\fR" 4
+.IX Item "--functions"
+.PD
+Display function names as well as file and line number information.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-basenames\fR" 4
+.IX Item "--basenames"
+.PD
+Display only the base of each file name.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-inlines\fR" 4
+.IX Item "--inlines"
+.PD
+If the address belongs to a function that was inlined, the source
+information for all enclosing scopes back to the first non-inlined
+function will also be printed.  For example, if \f(CW\*(C`main\*(C'\fR inlines
+\&\f(CW\*(C`callee1\*(C'\fR which inlines \f(CW\*(C`callee2\*(C'\fR, and address is from
+\&\f(CW\*(C`callee2\*(C'\fR, the source information for \f(CW\*(C`callee1\*(C'\fR and \f(CW\*(C`main\*(C'\fR
+will also be printed.
+.IP "\fB\-j\fR" 4
+.IX Item "-j"
+.PD 0
+.IP "\fB\-\-section\fR" 4
+.IX Item "--section"
+.PD
+Read offsets relative to the specified section instead of absolute addresses.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ar.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ar.1
new file mode 100644
index 00000000..9fa94e1f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ar.1
@@ -0,0 +1,429 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AR 1"
+.TH AR 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ar \- create, modify, and extract from archives
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ar [\fB\-\-plugin\fR \fIname\fR] [\fB\-X32_64\fR] [\fB\-\fR]\fIp\fR[\fImod\fR [\fIrelpos\fR] [\fIcount\fR]] \fIarchive\fR [\fImember\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBar\fR program creates, modifies, and extracts from
+archives.  An \fIarchive\fR is a single file holding a collection of
+other files in a structure that makes it possible to retrieve
+the original individual files (called \fImembers\fR of the archive).
+.PP
+The original files' contents, mode (permissions), timestamp, owner, and
+group are preserved in the archive, and can be restored on
+extraction.
+.PP
+\&\s-1GNU\s0 \fBar\fR can maintain archives whose members have names of any
+length; however, depending on how \fBar\fR is configured on your
+system, a limit on member-name length may be imposed for compatibility
+with archive formats maintained with other tools.  If it exists, the
+limit is often 15 characters (typical of formats related to a.out) or 16
+characters (typical of formats related to coff).
+.PP
+\&\fBar\fR is considered a binary utility because archives of this sort
+are most often used as \fIlibraries\fR holding commonly needed
+subroutines.
+.PP
+\&\fBar\fR creates an index to the symbols defined in relocatable
+object modules in the archive when you specify the modifier \fBs\fR.
+Once created, this index is updated in the archive whenever \fBar\fR
+makes a change to its contents (save for the \fBq\fR update operation).
+An archive with such an index speeds up linking to the library, and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index
+table.  If an archive lacks the table, another form of \fBar\fR called
+\&\fBranlib\fR can be used to add just the table.
+.PP
+\&\s-1GNU\s0 \fBar\fR can optionally create a \fIthin\fR archive,
+which contains a symbol index and references to the original copies
+of the member files of the archives.  Such an archive is useful
+for building libraries for use within a local build, where the
+relocatable objects are expected to remain available, and copying the
+contents of each object would only waste time and space.  Thin archives
+are also \fIflattened\fR, so that adding one or more archives to a
+thin archive will add the elements of the nested archive individually.
+The paths to the elements of the archive are stored relative to the
+archive itself.
+.PP
+\&\s-1GNU\s0 \fBar\fR is designed to be compatible with two different
+facilities.  You can control its activity using command-line options,
+like the different varieties of \fBar\fR on Unix systems; or, if you
+specify the single command-line option \fB\-M\fR, you can control it
+with a script supplied via standard input, like the \s-1MRI\s0 \*(L"librarian\*(R"
+program.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+\&\s-1GNU\s0 \fBar\fR allows you to mix the operation code \fIp\fR and modifier
+flags \fImod\fR in any order, within the first command-line argument.
+.PP
+If you wish, you may begin the first command-line argument with a
+dash.
+.PP
+The \fIp\fR keyletter specifies what operation to execute; it may be
+any of the following, but you must specify only one of them:
+.IP "\fBd\fR" 4
+.IX Item "d"
+\&\fIDelete\fR modules from the archive.  Specify the names of modules to
+be deleted as \fImember\fR...; the archive is untouched if you
+specify no files to delete.
+.Sp
+If you specify the \fBv\fR modifier, \fBar\fR lists each module
+as it is deleted.
+.IP "\fBm\fR" 4
+.IX Item "m"
+Use this operation to \fImove\fR members in an archive.
+.Sp
+The ordering of members in an archive can make a difference in how
+programs are linked using the library, if a symbol is defined in more
+than one member.
+.Sp
+If no modifiers are used with \f(CW\*(C`m\*(C'\fR, any members you name in the
+\&\fImember\fR arguments are moved to the \fIend\fR of the archive;
+you can use the \fBa\fR, \fBb\fR, or \fBi\fR modifiers to move them to a
+specified place instead.
+.IP "\fBp\fR" 4
+.IX Item "p"
+\&\fIPrint\fR the specified members of the archive, to the standard
+output file.  If the \fBv\fR modifier is specified, show the member
+name before copying its contents to standard output.
+.Sp
+If you specify no \fImember\fR arguments, all the files in the archive are
+printed.
+.IP "\fBq\fR" 4
+.IX Item "q"
+\&\fIQuick append\fR; Historically, add the files \fImember\fR... to the end of
+\&\fIarchive\fR, without checking for replacement.
+.Sp
+The modifiers \fBa\fR, \fBb\fR, and \fBi\fR do \fInot\fR affect this
+operation; new members are always placed at the end of the archive.
+.Sp
+The modifier \fBv\fR makes \fBar\fR list each file as it is appended.
+.Sp
+Since the point of this operation is speed, the archive's symbol table
+index is not updated, even if it already existed; you can use \fBar s\fR or
+\&\fBranlib\fR explicitly to update the symbol table index.
+.Sp
+However, too many different systems assume quick append rebuilds the
+index, so \s-1GNU\s0 \fBar\fR implements \fBq\fR as a synonym for \fBr\fR.
+.IP "\fBr\fR" 4
+.IX Item "r"
+Insert the files \fImember\fR... into \fIarchive\fR (with
+\&\fIreplacement\fR). This operation differs from \fBq\fR in that any
+previously existing members are deleted if their names match those being
+added.
+.Sp
+If one of the files named in \fImember\fR... does not exist, \fBar\fR
+displays an error message, and leaves undisturbed any existing members
+of the archive matching that name.
+.Sp
+By default, new members are added at the end of the file; but you may
+use one of the modifiers \fBa\fR, \fBb\fR, or \fBi\fR to request
+placement relative to some existing member.
+.Sp
+The modifier \fBv\fR used with this operation elicits a line of
+output for each file inserted, along with one of the letters \fBa\fR or
+\&\fBr\fR to indicate whether the file was appended (no old member
+deleted) or replaced.
+.IP "\fBt\fR" 4
+.IX Item "t"
+Display a \fItable\fR listing the contents of \fIarchive\fR, or those
+of the files listed in \fImember\fR... that are present in the
+archive.  Normally only the member name is shown; if you also want to
+see the modes (permissions), timestamp, owner, group, and size, you can
+request that by also specifying the \fBv\fR modifier.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are listed.
+.Sp
+If there is more than one file with the same name (say, \fBfie\fR) in
+an archive (say \fBb.a\fR), \fBar t b.a fie\fR lists only the
+first instance; to see them all, you must ask for a complete
+listing\-\-\-in our example, \fBar t b.a\fR.
+.IP "\fBx\fR" 4
+.IX Item "x"
+\&\fIExtract\fR members (named \fImember\fR) from the archive.  You can
+use the \fBv\fR modifier with this operation, to request that
+\&\fBar\fR list each name as it extracts it.
+.Sp
+If you do not specify a \fImember\fR, all files in the archive
+are extracted.
+.Sp
+Files cannot be extracted from a thin archive.
+.PP
+A number of modifiers (\fImod\fR) may immediately follow the \fIp\fR
+keyletter, to specify variations on an operation's behavior:
+.IP "\fBa\fR" 4
+.IX Item "a"
+Add new files \fIafter\fR an existing member of the
+archive.  If you use the modifier \fBa\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification.
+.IP "\fBb\fR" 4
+.IX Item "b"
+Add new files \fIbefore\fR an existing member of the
+archive.  If you use the modifier \fBb\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification.  (same as \fBi\fR).
+.IP "\fBc\fR" 4
+.IX Item "c"
+\&\fICreate\fR the archive.  The specified \fIarchive\fR is always
+created if it did not exist, when you request an update.  But a warning is
+issued unless you specify in advance that you expect to create it, by
+using this modifier.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Operate in \fIdeterministic\fR mode.  When adding files and the archive
+index use zero for UIDs, GIDs, timestamps, and use consistent file modes
+for all files.  When this option is used, if \fBar\fR is used with
+identical options and identical input files, multiple runs will create
+identical output files regardless of the input files' owners, groups,
+file modes, or modification times.
+.IP "\fBf\fR" 4
+.IX Item "f"
+Truncate names in the archive.  \s-1GNU\s0 \fBar\fR will normally permit file
+names of any length.  This will cause it to create archives which are
+not compatible with the native \fBar\fR program on some systems.  If
+this is a concern, the \fBf\fR modifier may be used to truncate file
+names when putting them in the archive.
+.IP "\fBi\fR" 4
+.IX Item "i"
+Insert new files \fIbefore\fR an existing member of the
+archive.  If you use the modifier \fBi\fR, the name of an existing archive
+member must be present as the \fIrelpos\fR argument, before the
+\&\fIarchive\fR specification.  (same as \fBb\fR).
+.IP "\fBl\fR" 4
+.IX Item "l"
+This modifier is accepted but not used.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Uses the \fIcount\fR parameter.  This is used if there are multiple
+entries in the archive with the same name.  Extract or delete instance
+\&\fIcount\fR of the given name from the archive.
+.IP "\fBo\fR" 4
+.IX Item "o"
+Preserve the \fIoriginal\fR dates of members when extracting them.  If
+you do not specify this modifier, files extracted from the archive
+are stamped with the time of extraction.
+.IP "\fBP\fR" 4
+.IX Item "P"
+Use the full path name when matching names in the archive.  \s-1GNU\s0
+\&\fBar\fR can not create an archive with a full path name (such archives
+are not \s-1POSIX\s0 complaint), but other archive creators can.  This option
+will cause \s-1GNU\s0 \fBar\fR to match file names using a complete path
+name, which can be convenient when extracting a single file from an
+archive created by another tool.
+.IP "\fBs\fR" 4
+.IX Item "s"
+Write an object-file index into the archive, or update an existing one,
+even if no other change is made to the archive.  You may use this modifier
+flag either with any operation, or alone.  Running \fBar s\fR on an
+archive is equivalent to running \fBranlib\fR on it.
+.IP "\fBS\fR" 4
+.IX Item "S"
+Do not generate an archive symbol table.  This can speed up building a
+large library in several steps.  The resulting archive can not be used
+with the linker.  In order to build a symbol table, you must omit the
+\&\fBS\fR modifier on the last execution of \fBar\fR, or you must run
+\&\fBranlib\fR on the archive.
+.IP "\fBT\fR" 4
+.IX Item "T"
+Make the specified \fIarchive\fR a \fIthin\fR archive.  If it already
+exists and is a regular archive, the existing members must be present
+in the same directory as \fIarchive\fR.
+.IP "\fBu\fR" 4
+.IX Item "u"
+Normally, \fBar r\fR... inserts all files
+listed into the archive.  If you would like to insert \fIonly\fR those
+of the files you list that are newer than existing members of the same
+names, use this modifier.  The \fBu\fR modifier is allowed only for the
+operation \fBr\fR (replace).  In particular, the combination \fBqu\fR is
+not allowed, since checking the timestamps would lose any speed
+advantage from the operation \fBq\fR.
+.IP "\fBv\fR" 4
+.IX Item "v"
+This modifier requests the \fIverbose\fR version of an operation.  Many
+operations display additional information, such as filenames processed,
+when the modifier \fBv\fR is appended.
+.IP "\fBV\fR" 4
+.IX Item "V"
+This modifier shows the version number of \fBar\fR.
+.PP
+\&\fBar\fR ignores an initial option spelt \fB\-X32_64\fR, for
+compatibility with \s-1AIX\s0.  The behaviour produced by this option is the
+default for \s-1GNU\s0 \fBar\fR.  \fBar\fR does not support any of the other
+\&\fB\-X\fR options; in particular, it does not support \fB\-X32\fR
+which is the default for \s-1AIX\s0 \fBar\fR.
+.PP
+The optional command line switch \fB\-\-plugin\fR \fIname\fR causes
+\&\fBar\fR to load the plugin called \fIname\fR which adds support
+for more file formats.  This option is only available if the toolchain
+has been built with plugin support enabled.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-as.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-as.1
new file mode 100644
index 00000000..b1c28da9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-as.1
@@ -0,0 +1,1200 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "AS 1"
+.TH AS 1 "2013-10-22" "binutils-2.20" "GNU Development Tools"
+.SH "NAME"
+AS \- the portable GNU assembler.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+as [\fB\-a\fR[\fBcdghlns\fR][=\fIfile\fR]] [\fB\-\-alternate\fR] [\fB\-D\fR]
+ [\fB\-\-debug\-prefix\-map\fR \fIold\fR=\fInew\fR]
+ [\fB\-\-defsym\fR \fIsym\fR=\fIval\fR] [\fB\-f\fR] [\fB\-g\fR] [\fB\-\-gstabs\fR]
+ [\fB\-\-gstabs+\fR] [\fB\-\-gdwarf\-2\fR] [\fB\-\-help\fR] [\fB\-I\fR \fIdir\fR] [\fB\-J\fR]
+ [\fB\-K\fR] [\fB\-L\fR] [\fB\-\-listing\-lhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-lhs\-width2\fR=\fI\s-1NUM\s0\fR] [\fB\-\-listing\-rhs\-width\fR=\fI\s-1NUM\s0\fR]
+ [\fB\-\-listing\-cont\-lines\fR=\fI\s-1NUM\s0\fR] [\fB\-\-keep\-locals\fR] [\fB\-o\fR
+ \fIobjfile\fR] [\fB\-R\fR] [\fB\-\-reduce\-memory\-overheads\fR] [\fB\-\-statistics\fR]
+ [\fB\-v\fR] [\fB\-version\fR] [\fB\-\-version\fR] [\fB\-W\fR] [\fB\-\-warn\fR]
+ [\fB\-\-fatal\-warnings\fR] [\fB\-w\fR] [\fB\-x\fR] [\fB\-Z\fR] [\fB@\fR\fI\s-1FILE\s0\fR]
+ [\fB\-\-target\-help\fR] [\fItarget-options\fR]
+ [\fB\-\-\fR|\fIfiles\fR ...]
+.PP
+\&\fITarget Alpha options:\fR
+   [\fB\-m\fR\fIcpu\fR]
+   [\fB\-mdebug\fR | \fB\-no\-mdebug\fR]
+   [\fB\-replace\fR | \fB\-noreplace\fR]
+   [\fB\-relax\fR] [\fB\-g\fR] [\fB\-G\fR\fIsize\fR]
+   [\fB\-F\fR] [\fB\-32addr\fR]
+.PP
+\&\fITarget \s-1ARC\s0 options:\fR
+   [\fB\-marc[5|6|7|8]\fR]
+   [\fB\-EB\fR|\fB\-EL\fR]
+.PP
+\&\fITarget \s-1ARM\s0 options:\fR
+   [\fB\-mcpu\fR=\fIprocessor\fR[+\fIextension\fR...]]
+   [\fB\-march\fR=\fIarchitecture\fR[+\fIextension\fR...]]
+   [\fB\-mfpu\fR=\fIfloating-point-format\fR]
+   [\fB\-mfloat\-abi\fR=\fIabi\fR]
+   [\fB\-meabi\fR=\fIver\fR]
+   [\fB\-mthumb\fR]
+   [\fB\-EB\fR|\fB\-EL\fR]
+   [\fB\-mapcs\-32\fR|\fB\-mapcs\-26\fR|\fB\-mapcs\-float\fR|
+    \fB\-mapcs\-reentrant\fR]
+   [\fB\-mthumb\-interwork\fR] [\fB\-k\fR]
+.PP
+\&\fITarget \s-1CRIS\s0 options:\fR
+   [\fB\-\-underscore\fR | \fB\-\-no\-underscore\fR]
+   [\fB\-\-pic\fR] [\fB\-N\fR]
+   [\fB\-\-emulation=criself\fR | \fB\-\-emulation=crisaout\fR]
+   [\fB\-\-march=v0_v10\fR | \fB\-\-march=v10\fR | \fB\-\-march=v32\fR | \fB\-\-march=common_v10_v32\fR]
+.PP
+\&\fITarget D10V options:\fR
+   [\fB\-O\fR]
+.PP
+\&\fITarget D30V options:\fR
+   [\fB\-O\fR|\fB\-n\fR|\fB\-N\fR]
+.PP
+\&\fITarget H8/300 options:\fR
+   [\-h\-tick\-hex]
+.PP
+\&\fITarget i386 options:\fR
+   [\fB\-\-32\fR|\fB\-\-64\fR] [\fB\-n\fR]
+   [\fB\-march\fR=\fI\s-1CPU\s0\fR[+\fI\s-1EXTENSION\s0\fR...]] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR]
+.PP
+\&\fITarget i960 options:\fR
+   [\fB\-ACA\fR|\fB\-ACA_A\fR|\fB\-ACB\fR|\fB\-ACC\fR|\fB\-AKA\fR|\fB\-AKB\fR|
+    \fB\-AKC\fR|\fB\-AMC\fR]
+   [\fB\-b\fR] [\fB\-no\-relax\fR]
+.PP
+\&\fITarget \s-1IA\-64\s0 options:\fR
+   [\fB\-mconstant\-gp\fR|\fB\-mauto\-pic\fR]
+   [\fB\-milp32\fR|\fB\-milp64\fR|\fB\-mlp64\fR|\fB\-mp64\fR]
+   [\fB\-mle\fR|\fBmbe\fR]
+   [\fB\-mtune=itanium1\fR|\fB\-mtune=itanium2\fR]
+   [\fB\-munwind\-check=warning\fR|\fB\-munwind\-check=error\fR]
+   [\fB\-mhint.b=ok\fR|\fB\-mhint.b=warning\fR|\fB\-mhint.b=error\fR]
+   [\fB\-x\fR|\fB\-xexplicit\fR] [\fB\-xauto\fR] [\fB\-xdebug\fR]
+.PP
+\&\fITarget \s-1IP2K\s0 options:\fR
+   [\fB\-mip2022\fR|\fB\-mip2022ext\fR]
+.PP
+\&\fITarget M32C options:\fR
+   [\fB\-m32c\fR|\fB\-m16c\fR] [\-relax] [\-h\-tick\-hex]
+.PP
+\&\fITarget M32R options:\fR
+   [\fB\-\-m32rx\fR|\fB\-\-[no\-]warn\-explicit\-parallel\-conflicts\fR|
+   \fB\-\-W[n]p\fR]
+.PP
+\&\fITarget M680X0 options:\fR
+   [\fB\-l\fR] [\fB\-m68000\fR|\fB\-m68010\fR|\fB\-m68020\fR|...]
+.PP
+\&\fITarget M68HC11 options:\fR
+   [\fB\-m68hc11\fR|\fB\-m68hc12\fR|\fB\-m68hcs12\fR]
+   [\fB\-mshort\fR|\fB\-mlong\fR]
+   [\fB\-mshort\-double\fR|\fB\-mlong\-double\fR]
+   [\fB\-\-force\-long\-branches\fR] [\fB\-\-short\-branches\fR]
+   [\fB\-\-strict\-direct\-mode\fR] [\fB\-\-print\-insn\-syntax\fR]
+   [\fB\-\-print\-opcodes\fR] [\fB\-\-generate\-example\fR]
+.PP
+\&\fITarget \s-1MCORE\s0 options:\fR
+   [\fB\-jsri2bsr\fR] [\fB\-sifilter\fR] [\fB\-relax\fR]
+   [\fB\-mcpu=[210|340]\fR]
+\&\fITarget \s-1MICROBLAZE\s0 options:\fR
+.PP
+\&\fITarget \s-1MIPS\s0 options:\fR
+   [\fB\-nocpp\fR] [\fB\-EL\fR] [\fB\-EB\fR] [\fB\-O\fR[\fIoptimization level\fR]]
+   [\fB\-g\fR[\fIdebug level\fR]] [\fB\-G\fR \fInum\fR] [\fB\-KPIC\fR] [\fB\-call_shared\fR]
+   [\fB\-non_shared\fR] [\fB\-xgot\fR [\fB\-mvxworks\-pic\fR]
+   [\fB\-mabi\fR=\fI\s-1ABI\s0\fR] [\fB\-32\fR] [\fB\-n32\fR] [\fB\-64\fR] [\fB\-mfp32\fR] [\fB\-mgp32\fR]
+   [\fB\-march\fR=\fI\s-1CPU\s0\fR] [\fB\-mtune\fR=\fI\s-1CPU\s0\fR] [\fB\-mips1\fR] [\fB\-mips2\fR]
+   [\fB\-mips3\fR] [\fB\-mips4\fR] [\fB\-mips5\fR] [\fB\-mips32\fR] [\fB\-mips32r2\fR]
+   [\fB\-mips64\fR] [\fB\-mips64r2\fR]
+   [\fB\-construct\-floats\fR] [\fB\-no\-construct\-floats\fR]
+   [\fB\-trap\fR] [\fB\-no\-break\fR] [\fB\-break\fR] [\fB\-no\-trap\fR]
+   [\fB\-mfix7000\fR] [\fB\-mno\-fix7000\fR]
+   [\fB\-mips16\fR] [\fB\-no\-mips16\fR]
+   [\fB\-msmartmips\fR] [\fB\-mno\-smartmips\fR]
+   [\fB\-mips3d\fR] [\fB\-no\-mips3d\fR]
+   [\fB\-mdmx\fR] [\fB\-no\-mdmx\fR]
+   [\fB\-mdsp\fR] [\fB\-mno\-dsp\fR]
+   [\fB\-mdspr2\fR] [\fB\-mno\-dspr2\fR]
+   [\fB\-mmt\fR] [\fB\-mno\-mt\fR]
+   [\fB\-mdebug\fR] [\fB\-no\-mdebug\fR]
+   [\fB\-mpdr\fR] [\fB\-mno\-pdr\fR]
+.PP
+\&\fITarget \s-1MMIX\s0 options:\fR
+   [\fB\-\-fixed\-special\-register\-names\fR] [\fB\-\-globalize\-symbols\fR]
+   [\fB\-\-gnu\-syntax\fR] [\fB\-\-relax\fR] [\fB\-\-no\-predefined\-symbols\fR]
+   [\fB\-\-no\-expand\fR] [\fB\-\-no\-merge\-gregs\fR] [\fB\-x\fR]
+   [\fB\-\-linker\-allocated\-gregs\fR]
+.PP
+\&\fITarget \s-1PDP11\s0 options:\fR
+   [\fB\-mpic\fR|\fB\-mno\-pic\fR] [\fB\-mall\fR] [\fB\-mno\-extensions\fR]
+   [\fB\-m\fR\fIextension\fR|\fB\-mno\-\fR\fIextension\fR]
+   [\fB\-m\fR\fIcpu\fR] [\fB\-m\fR\fImachine\fR]  
+.PP
+\&\fITarget picoJava options:\fR
+   [\fB\-mb\fR|\fB\-me\fR]
+.PP
+\&\fITarget PowerPC options:\fR
+   [\fB\-mpwrx\fR|\fB\-mpwr2\fR|\fB\-mpwr\fR|\fB\-m601\fR|\fB\-mppc\fR|\fB\-mppc32\fR|\fB\-m603\fR|\fB\-m604\fR|
+    \fB\-m403\fR|\fB\-m405\fR|\fB\-mppc64\fR|\fB\-m620\fR|\fB\-mppc64bridge\fR|\fB\-mbooke\fR]
+   [\fB\-mcom\fR|\fB\-many\fR|\fB\-maltivec\fR|\fB\-mvsx\fR] [\fB\-memb\fR]
+   [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+   [\fB\-mrelocatable\fR|\fB\-mrelocatable\-lib\fR]
+   [\fB\-mlittle\fR|\fB\-mlittle\-endian\fR|\fB\-mbig\fR|\fB\-mbig\-endian\fR]
+   [\fB\-msolaris\fR|\fB\-mno\-solaris\fR]
+.PP
+\&\fITarget s390 options:\fR
+   [\fB\-m31\fR|\fB\-m64\fR] [\fB\-mesa\fR|\fB\-mzarch\fR] [\fB\-march\fR=\fI\s-1CPU\s0\fR]
+   [\fB\-mregnames\fR|\fB\-mno\-regnames\fR]
+   [\fB\-mwarn\-areg\-zero\fR]
+.PP
+\&\fITarget \s-1SCORE\s0 options:\fR
+   [\fB\-EB\fR][\fB\-EL\fR][\fB\-FIXDD\fR][\fB\-NWARN\fR]
+   [\fB\-SCORE5\fR][\fB\-SCORE5U\fR][\fB\-SCORE7\fR][\fB\-SCORE3\fR]
+   [\fB\-march=score7\fR][\fB\-march=score3\fR]
+   [\fB\-USE_R1\fR][\fB\-KPIC\fR][\fB\-O0\fR][\fB\-G\fR \fInum\fR][\fB\-V\fR]
+.PP
+\&\fITarget \s-1SPARC\s0 options:\fR
+   [\fB\-Av6\fR|\fB\-Av7\fR|\fB\-Av8\fR|\fB\-Asparclet\fR|\fB\-Asparclite\fR
+    \fB\-Av8plus\fR|\fB\-Av8plusa\fR|\fB\-Av9\fR|\fB\-Av9a\fR]
+   [\fB\-xarch=v8plus\fR|\fB\-xarch=v8plusa\fR] [\fB\-bump\fR]
+   [\fB\-32\fR|\fB\-64\fR]
+.PP
+\&\fITarget \s-1TIC54X\s0 options:\fR
+ [\fB\-mcpu=54[123589]\fR|\fB\-mcpu=54[56]lp\fR] [\fB\-mfar\-mode\fR|\fB\-mf\fR] 
+ [\fB\-merrors\-to\-file\fR \fI<filename>\fR|\fB\-me\fR \fI<filename>\fR]
+.PP
+\&\fITarget Z80 options:\fR
+  [\fB\-z80\fR] [\fB\-r800\fR]
+  [ \fB\-ignore\-undocumented\-instructions\fR] [\fB\-Wnud\fR]
+  [ \fB\-ignore\-unportable\-instructions\fR] [\fB\-Wnup\fR]
+  [ \fB\-warn\-undocumented\-instructions\fR] [\fB\-Wud\fR]
+  [ \fB\-warn\-unportable\-instructions\fR] [\fB\-Wup\fR]
+  [ \fB\-forbid\-undocumented\-instructions\fR] [\fB\-Fud\fR]
+  [ \fB\-forbid\-unportable\-instructions\fR] [\fB\-Fup\fR]
+.PP
+\&\fITarget Xtensa options:\fR
+ [\fB\-\-[no\-]text\-section\-literals\fR] [\fB\-\-[no\-]absolute\-literals\fR]
+ [\fB\-\-[no\-]target\-align\fR] [\fB\-\-[no\-]longcalls\fR]
+ [\fB\-\-[no\-]transform\fR]
+ [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBas\fR is really a family of assemblers.
+If you use (or have used) the \s-1GNU\s0 assembler on one architecture, you
+should find a fairly similar environment when you use it on another
+architecture.  Each version has much in common with the others,
+including object file formats, most assembler directives (often called
+\&\fIpseudo-ops\fR) and assembler syntax.
+.PP
+\&\fBas\fR is primarily intended to assemble the output of the
+\&\s-1GNU\s0 C compiler \f(CW\*(C`gcc\*(C'\fR for use by the linker
+\&\f(CW\*(C`ld\*(C'\fR.  Nevertheless, we've tried to make \fBas\fR
+assemble correctly everything that other assemblers for the same
+machine would assemble.
+Any exceptions are documented explicitly.
+This doesn't mean \fBas\fR always uses the same syntax as another
+assembler for the same architecture; for example, we know of several
+incompatible versions of 680x0 assembly language syntax.
+.PP
+Each time you run \fBas\fR it assembles exactly one source
+program.  The source program is made up of one or more files.
+(The standard input is also a file.)
+.PP
+You give \fBas\fR a command line that has zero or more input file
+names.  The input files are read (from left file name to right).  A
+command line argument (in any position) that has no special meaning
+is taken to be an input file name.
+.PP
+If you give \fBas\fR no file names it attempts to read one input file
+from the \fBas\fR standard input, which is normally your terminal.  You
+may have to type \fBctl-D\fR to tell \fBas\fR there is no more program
+to assemble.
+.PP
+Use \fB\-\-\fR if you need to explicitly name the standard input file
+in your command line.
+.PP
+If the source is empty, \fBas\fR produces a small, empty object
+file.
+.PP
+\&\fBas\fR may write warnings and error messages to the standard error
+file (usually your terminal).  This should not happen when  a compiler
+runs \fBas\fR automatically.  Warnings report an assumption made so
+that \fBas\fR could keep assembling a flawed program; errors report a
+grave problem that stops the assembly.
+.PP
+If you are invoking \fBas\fR via the \s-1GNU\s0 C compiler,
+you can use the \fB\-Wa\fR option to pass arguments through to the assembler.
+The assembler arguments must be separated from each other (and the \fB\-Wa\fR)
+by commas.  For example:
+.PP
+.Vb 1
+\&        gcc -c -g -O -Wa,-alh,-L file.c
+.Ve
+.PP
+This passes two options to the assembler: \fB\-alh\fR (emit a listing to
+standard output with high-level and assembly source) and \fB\-L\fR (retain
+local symbols in the symbol table).
+.PP
+Usually you do not need to use this \fB\-Wa\fR mechanism, since many compiler
+command-line options are automatically passed to the assembler by the compiler.
+(You can call the \s-1GNU\s0 compiler driver with the \fB\-v\fR option to see
+precisely what options it passes to each compilation pass, including the
+assembler.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.  
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a[cdghlmns]\fR" 4
+.IX Item "-a[cdghlmns]"
+Turn on listings, in any of a variety of ways:
+.RS 4
+.IP "\fB\-ac\fR" 4
+.IX Item "-ac"
+omit false conditionals
+.IP "\fB\-ad\fR" 4
+.IX Item "-ad"
+omit debugging directives
+.IP "\fB\-ag\fR" 4
+.IX Item "-ag"
+include general information, like as version and options passed
+.IP "\fB\-ah\fR" 4
+.IX Item "-ah"
+include high-level source
+.IP "\fB\-al\fR" 4
+.IX Item "-al"
+include assembly
+.IP "\fB\-am\fR" 4
+.IX Item "-am"
+include macro expansions
+.IP "\fB\-an\fR" 4
+.IX Item "-an"
+omit forms processing
+.IP "\fB\-as\fR" 4
+.IX Item "-as"
+include symbols
+.IP "\fB=file\fR" 4
+.IX Item "=file"
+set the name of the listing file
+.RE
+.RS 4
+.Sp
+You may combine these options; for example, use \fB\-aln\fR for assembly
+listing without forms processing.  The \fB=file\fR option, if used, must be
+the last one.  By itself, \fB\-a\fR defaults to \fB\-ahls\fR.
+.RE
+.IP "\fB\-\-alternate\fR" 4
+.IX Item "--alternate"
+Begin in alternate macro mode.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+Ignored.  This option is accepted for script compatibility with calls to
+other assemblers.
+.IP "\fB\-\-debug\-prefix\-map\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--debug-prefix-map old=new"
+When assembling files in directory \fI\fIold\fI\fR, record debugging
+information describing them as in \fI\fInew\fI\fR instead.
+.IP "\fB\-\-defsym\fR \fIsym\fR\fB=\fR\fIvalue\fR" 4
+.IX Item "--defsym sym=value"
+Define the symbol \fIsym\fR to be \fIvalue\fR before assembling the input file.
+\&\fIvalue\fR must be an integer constant.  As in C, a leading \fB0x\fR
+indicates a hexadecimal value, and a leading \fB0\fR indicates an octal
+value.  The value of the symbol can be overridden inside a source file via the
+use of a \f(CW\*(C`.set\*(C'\fR pseudo\-op.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+\&\*(L"fast\*(R"\-\-\-skip whitespace and comment preprocessing (assume source is
+compiler output).
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-gen\-debug\fR" 4
+.IX Item "--gen-debug"
+.PD
+Generate debugging information for each assembler source line using whichever
+debug format is preferred by the target.  This currently means either \s-1STABS\s0,
+\&\s-1ECOFF\s0 or \s-1DWARF2\s0.
+.IP "\fB\-\-gstabs\fR" 4
+.IX Item "--gstabs"
+Generate stabs debugging information for each assembler line.  This
+may help debugging assembler code, if the debugger can handle it.
+.IP "\fB\-\-gstabs+\fR" 4
+.IX Item "--gstabs+"
+Generate stabs debugging information for each assembler line, with \s-1GNU\s0
+extensions that probably only gdb can handle, and that could make other
+debuggers crash or refuse to read your program.  This
+may help debugging assembler code.  Currently the only \s-1GNU\s0 extension is
+the location of the current working directory at assembling time.
+.IP "\fB\-\-gdwarf\-2\fR" 4
+.IX Item "--gdwarf-2"
+Generate \s-1DWARF2\s0 debugging information for each assembler line.  This
+may help debugging assembler code, if the debugger can handle it.  Note\-\-\-this
+option is only supported by some targets, not all of them.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command line options and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options and exit.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add directory \fIdir\fR to the search list for \f(CW\*(C`.include\*(C'\fR directives.
+.IP "\fB\-J\fR" 4
+.IX Item "-J"
+Don't warn about signed overflow.
+.IP "\fB\-K\fR" 4
+.IX Item "-K"
+Issue warnings when difference tables altered for long displacements.
+.IP "\fB\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.IP "\fB\-\-keep\-locals\fR" 4
+.IX Item "--keep-locals"
+.PD
+Keep (in the symbol table) local symbols.  These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.
+.IP "\fB\-\-listing\-lhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width=number"
+Set the maximum width, in words, of the output data column for an assembler
+listing to \fInumber\fR.
+.IP "\fB\-\-listing\-lhs\-width2=\fR\fInumber\fR" 4
+.IX Item "--listing-lhs-width2=number"
+Set the maximum width, in words, of the output data column for continuation
+lines in an assembler listing to \fInumber\fR.
+.IP "\fB\-\-listing\-rhs\-width=\fR\fInumber\fR" 4
+.IX Item "--listing-rhs-width=number"
+Set the maximum width of an input source line, as displayed in a listing, to
+\&\fInumber\fR bytes.
+.IP "\fB\-\-listing\-cont\-lines=\fR\fInumber\fR" 4
+.IX Item "--listing-cont-lines=number"
+Set the maximum number of lines printed in a listing for a single line of input
+to \fInumber\fR + 1.
+.IP "\fB\-o\fR \fIobjfile\fR" 4
+.IX Item "-o objfile"
+Name the object-file output from \fBas\fR \fIobjfile\fR.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+Fold the data section into the text section.
+.Sp
+Set the default size of \s-1GAS\s0's hash tables to a prime number close to
+\&\fInumber\fR.  Increasing this value can reduce the length of time it takes the
+assembler to perform its tasks, at the expense of increasing the assembler's
+memory requirements.  Similarly reducing this value can reduce the memory
+requirements at the expense of speed.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces \s-1GAS\s0's memory requirements, at the expense of making the
+assembly processes slower.  Currently this switch is a synonym for
+\&\fB\-\-hash\-size=4051\fR, but in the future it may have other effects as well.
+.IP "\fB\-\-statistics\fR" 4
+.IX Item "--statistics"
+Print the maximum space (in bytes) and total time (in seconds) used by
+assembly.
+.IP "\fB\-\-strip\-local\-absolute\fR" 4
+.IX Item "--strip-local-absolute"
+Remove local absolute symbols from the outgoing symbol table.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD
+Print the \fBas\fR version.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the \fBas\fR version and exit.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-no\-warn\fR" 4
+.IX Item "--no-warn"
+.PD
+Suppress warning messages.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+Treat warnings as errors.
+.IP "\fB\-\-warn\fR" 4
+.IX Item "--warn"
+Don't suppress warning messages or treat them as errors.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Ignored.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+Ignored.
+.IP "\fB\-Z\fR" 4
+.IX Item "-Z"
+Generate an object file even after errors.
+.IP "\fB\-\- |\fR \fIfiles\fR \fB...\fR" 4
+.IX Item "-- | files ..."
+Standard input, or source files to assemble.
+.PP
+The following options are available when as is configured for
+an \s-1ARC\s0 processor.
+.IP "\fB\-marc[5|6|7|8]\fR" 4
+.IX Item "-marc[5|6|7|8]"
+This option selects the core processor variant.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.PP
+The following options are available when as is configured for the \s-1ARM\s0
+processor family.
+.IP "\fB\-mcpu=\fR\fIprocessor\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-mcpu=processor[+extension...]"
+Specify which \s-1ARM\s0 processor variant is the target.
+.IP "\fB\-march=\fR\fIarchitecture\fR\fB[+\fR\fIextension\fR\fB...]\fR" 4
+.IX Item "-march=architecture[+extension...]"
+Specify which \s-1ARM\s0 architecture variant is used by the target.
+.IP "\fB\-mfpu=\fR\fIfloating-point-format\fR" 4
+.IX Item "-mfpu=floating-point-format"
+Select which Floating Point architecture is the target.
+.IP "\fB\-mfloat\-abi=\fR\fIabi\fR" 4
+.IX Item "-mfloat-abi=abi"
+Select which floating point \s-1ABI\s0 is in use.
+.IP "\fB\-mthumb\fR" 4
+.IX Item "-mthumb"
+Enable Thumb only instruction decoding.
+.IP "\fB\-mapcs\-32 | \-mapcs\-26 | \-mapcs\-float | \-mapcs\-reentrant\fR" 4
+.IX Item "-mapcs-32 | -mapcs-26 | -mapcs-float | -mapcs-reentrant"
+Select which procedure calling convention is in use.
+.IP "\fB\-EB | \-EL\fR" 4
+.IX Item "-EB | -EL"
+Select either big-endian (\-EB) or little-endian (\-EL) output.
+.IP "\fB\-mthumb\-interwork\fR" 4
+.IX Item "-mthumb-interwork"
+Specify that the code has been generated with interworking between Thumb and
+\&\s-1ARM\s0 code in mind.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+Specify that \s-1PIC\s0 code has been generated.
+.PP
+See the info pages for documentation of the CRIS-specific options.
+.PP
+The following options are available when as is configured for
+a D10V processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.PP
+The following options are available when as is configured for a D30V
+processor.
+.IP "\fB\-O\fR" 4
+.IX Item "-O"
+Optimize output by parallelizing instructions.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+Warn when nops are generated.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+Warn when a nop after a 32\-bit multiply instruction is generated.
+.PP
+The following options are available when as is configured for the
+Intel 80960 processor.
+.IP "\fB\-ACA | \-ACA_A | \-ACB | \-ACC | \-AKA | \-AKB | \-AKC | \-AMC\fR" 4
+.IX Item "-ACA | -ACA_A | -ACB | -ACC | -AKA | -AKB | -AKC | -AMC"
+Specify which variant of the 960 architecture is the target.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+Add code to collect statistics about branches taken.
+.IP "\fB\-no\-relax\fR" 4
+.IX Item "-no-relax"
+Do not alter compare-and-branch instructions for long displacements;
+error if necessary.
+.PP
+The following options are available when as is configured for the
+Ubicom \s-1IP2K\s0 series.
+.IP "\fB\-mip2022ext\fR" 4
+.IX Item "-mip2022ext"
+Specifies that the extended \s-1IP2022\s0 instructions are allowed.
+.IP "\fB\-mip2022\fR" 4
+.IX Item "-mip2022"
+Restores the default behaviour, which restricts the permitted instructions to
+just the basic \s-1IP2022\s0 ones.
+.PP
+The following options are available when as is configured for the
+Renesas M32C and M16C processors.
+.IP "\fB\-m32c\fR" 4
+.IX Item "-m32c"
+Assemble M32C instructions.
+.IP "\fB\-m16c\fR" 4
+.IX Item "-m16c"
+Assemble M16C instructions (the default).
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Enable support for link-time relaxations.
+.IP "\fB\-h\-tick\-hex\fR" 4
+.IX Item "-h-tick-hex"
+Support H'00 style hex constants in addition to 0x00 style.
+.PP
+The following options are available when as is configured for the
+Renesas M32R (formerly Mitsubishi M32R) series.
+.IP "\fB\-\-m32rx\fR" 4
+.IX Item "--m32rx"
+Specify which processor in the M32R family is the target.  The default
+is normally the M32R, but this option changes it to the M32RX.
+.IP "\fB\-\-warn\-explicit\-parallel\-conflicts or \-\-Wp\fR" 4
+.IX Item "--warn-explicit-parallel-conflicts or --Wp"
+Produce warning messages when questionable parallel constructs are
+encountered. 
+.IP "\fB\-\-no\-warn\-explicit\-parallel\-conflicts or \-\-Wnp\fR" 4
+.IX Item "--no-warn-explicit-parallel-conflicts or --Wnp"
+Do not produce warning messages when questionable parallel constructs are 
+encountered. 
+.PP
+The following options are available when as is configured for the
+Motorola 68000 series.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+Shorten references to undefined symbols, to one word instead of two.
+.IP "\fB\-m68000 | \-m68008 | \-m68010 | \-m68020 | \-m68030\fR" 4
+.IX Item "-m68000 | -m68008 | -m68010 | -m68020 | -m68030"
+.PD 0
+.IP "\fB| \-m68040 | \-m68060 | \-m68302 | \-m68331 | \-m68332\fR" 4
+.IX Item "| -m68040 | -m68060 | -m68302 | -m68331 | -m68332"
+.IP "\fB| \-m68333 | \-m68340 | \-mcpu32 | \-m5200\fR" 4
+.IX Item "| -m68333 | -m68340 | -mcpu32 | -m5200"
+.PD
+Specify what processor in the 68000 family is the target.  The default
+is normally the 68020, but this can be changed at configuration time.
+.IP "\fB\-m68881 | \-m68882 | \-mno\-68881 | \-mno\-68882\fR" 4
+.IX Item "-m68881 | -m68882 | -mno-68881 | -mno-68882"
+The target machine does (or does not) have a floating-point coprocessor.
+The default is to assume a coprocessor for 68020, 68030, and cpu32.  Although
+the basic 68000 is not compatible with the 68881, a combination of the
+two can be specified, since it's possible to do emulation of the
+coprocessor instructions with the main processor.
+.IP "\fB\-m68851 | \-mno\-68851\fR" 4
+.IX Item "-m68851 | -mno-68851"
+The target machine does (or does not) have a memory-management
+unit coprocessor.  The default is to assume an \s-1MMU\s0 for 68020 and up.
+.PP
+For details about the \s-1PDP\-11\s0 machine dependent features options,
+see \fBPDP\-11\-Options\fR.
+.IP "\fB\-mpic | \-mno\-pic\fR" 4
+.IX Item "-mpic | -mno-pic"
+Generate position-independent (or position\-dependent) code.  The
+default is \fB\-mpic\fR.
+.IP "\fB\-mall\fR" 4
+.IX Item "-mall"
+.PD 0
+.IP "\fB\-mall\-extensions\fR" 4
+.IX Item "-mall-extensions"
+.PD
+Enable all instruction set extensions.  This is the default.
+.IP "\fB\-mno\-extensions\fR" 4
+.IX Item "-mno-extensions"
+Disable all instruction set extensions.
+.IP "\fB\-m\fR\fIextension\fR \fB| \-mno\-\fR\fIextension\fR" 4
+.IX Item "-mextension | -mno-extension"
+Enable (or disable) a particular instruction set extension.
+.IP "\fB\-m\fR\fIcpu\fR" 4
+.IX Item "-mcpu"
+Enable the instruction set extensions supported by a particular \s-1CPU\s0, and
+disable all other extensions.
+.IP "\fB\-m\fR\fImachine\fR" 4
+.IX Item "-mmachine"
+Enable the instruction set extensions supported by a particular machine
+model, and disable all other extensions.
+.PP
+The following options are available when as is configured for
+a picoJava processor.
+.IP "\fB\-mb\fR" 4
+.IX Item "-mb"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-ml\fR" 4
+.IX Item "-ml"
+Generate \*(L"little endian\*(R" format output.
+.PP
+The following options are available when as is configured for the
+Motorola 68HC11 or 68HC12 series.
+.IP "\fB\-m68hc11 | \-m68hc12 | \-m68hcs12\fR" 4
+.IX Item "-m68hc11 | -m68hc12 | -m68hcs12"
+Specify what processor is the target.  The default is
+defined by the configuration option when building the assembler.
+.IP "\fB\-mshort\fR" 4
+.IX Item "-mshort"
+Specify to use the 16\-bit integer \s-1ABI\s0.
+.IP "\fB\-mlong\fR" 4
+.IX Item "-mlong"
+Specify to use the 32\-bit integer \s-1ABI\s0.  
+.IP "\fB\-mshort\-double\fR" 4
+.IX Item "-mshort-double"
+Specify to use the 32\-bit double \s-1ABI\s0.  
+.IP "\fB\-mlong\-double\fR" 4
+.IX Item "-mlong-double"
+Specify to use the 64\-bit double \s-1ABI\s0.  
+.IP "\fB\-\-force\-long\-branches\fR" 4
+.IX Item "--force-long-branches"
+Relative branches are turned into absolute ones. This concerns
+conditional branches, unconditional branches and branches to a
+sub routine.
+.IP "\fB\-S | \-\-short\-branches\fR" 4
+.IX Item "-S | --short-branches"
+Do not turn relative branches into absolute ones
+when the offset is out of range.
+.IP "\fB\-\-strict\-direct\-mode\fR" 4
+.IX Item "--strict-direct-mode"
+Do not turn the direct addressing mode into extended addressing mode
+when the instruction does not support direct addressing mode.
+.IP "\fB\-\-print\-insn\-syntax\fR" 4
+.IX Item "--print-insn-syntax"
+Print the syntax of instruction in case of error.
+.IP "\fB\-\-print\-opcodes\fR" 4
+.IX Item "--print-opcodes"
+print the list of instructions with syntax and then exit.
+.IP "\fB\-\-generate\-example\fR" 4
+.IX Item "--generate-example"
+print an example of instruction for each possible instruction and then exit.
+This option is only useful for testing \fBas\fR.
+.PP
+The following options are available when \fBas\fR is configured
+for the \s-1SPARC\s0 architecture:
+.IP "\fB\-Av6 | \-Av7 | \-Av8 | \-Asparclet | \-Asparclite\fR" 4
+.IX Item "-Av6 | -Av7 | -Av8 | -Asparclet | -Asparclite"
+.PD 0
+.IP "\fB\-Av8plus | \-Av8plusa | \-Av9 | \-Av9a\fR" 4
+.IX Item "-Av8plus | -Av8plusa | -Av9 | -Av9a"
+.PD
+Explicitly select a variant of the \s-1SPARC\s0 architecture.
+.Sp
+\&\fB\-Av8plus\fR and \fB\-Av8plusa\fR select a 32 bit environment.
+\&\fB\-Av9\fR and \fB\-Av9a\fR select a 64 bit environment.
+.Sp
+\&\fB\-Av8plusa\fR and \fB\-Av9a\fR enable the \s-1SPARC\s0 V9 instruction set with
+UltraSPARC extensions.
+.IP "\fB\-xarch=v8plus | \-xarch=v8plusa\fR" 4
+.IX Item "-xarch=v8plus | -xarch=v8plusa"
+For compatibility with the Solaris v9 assembler.  These options are
+equivalent to \-Av8plus and \-Av8plusa, respectively.
+.IP "\fB\-bump\fR" 4
+.IX Item "-bump"
+Warn when the assembler switches to another architecture.
+.PP
+The following options are available when as is configured for the 'c54x
+architecture. 
+.IP "\fB\-mfar\-mode\fR" 4
+.IX Item "-mfar-mode"
+Enable extended addressing mode.  All addresses and relocations will assume
+extended addressing (usually 23 bits).
+.IP "\fB\-mcpu=\fR\fI\s-1CPU_VERSION\s0\fR" 4
+.IX Item "-mcpu=CPU_VERSION"
+Sets the \s-1CPU\s0 version being compiled for.
+.IP "\fB\-merrors\-to\-file\fR \fI\s-1FILENAME\s0\fR" 4
+.IX Item "-merrors-to-file FILENAME"
+Redirect error output to a file, for broken systems which don't support such
+behaviour in the shell.
+.PP
+The following options are available when as is configured for
+a \s-1MIPS\s0 processor.
+.IP "\fB\-G\fR \fInum\fR" 4
+.IX Item "-G num"
+This option sets the largest size of an object that can be referenced
+implicitly with the \f(CW\*(C`gp\*(C'\fR register.  It is only accepted for targets that
+use \s-1ECOFF\s0 format, such as a DECstation running Ultrix.  The default value is 8.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Generate \*(L"big endian\*(R" format output.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Generate \*(L"little endian\*(R" format output.
+.IP "\fB\-mips1\fR" 4
+.IX Item "-mips1"
+.PD 0
+.IP "\fB\-mips2\fR" 4
+.IX Item "-mips2"
+.IP "\fB\-mips3\fR" 4
+.IX Item "-mips3"
+.IP "\fB\-mips4\fR" 4
+.IX Item "-mips4"
+.IP "\fB\-mips5\fR" 4
+.IX Item "-mips5"
+.IP "\fB\-mips32\fR" 4
+.IX Item "-mips32"
+.IP "\fB\-mips32r2\fR" 4
+.IX Item "-mips32r2"
+.IP "\fB\-mips64\fR" 4
+.IX Item "-mips64"
+.IP "\fB\-mips64r2\fR" 4
+.IX Item "-mips64r2"
+.PD
+Generate code for a particular \s-1MIPS\s0 Instruction Set Architecture level.
+\&\fB\-mips1\fR is an alias for \fB\-march=r3000\fR, \fB\-mips2\fR is an
+alias for \fB\-march=r6000\fR, \fB\-mips3\fR is an alias for
+\&\fB\-march=r4000\fR and \fB\-mips4\fR is an alias for \fB\-march=r8000\fR.
+\&\fB\-mips5\fR, \fB\-mips32\fR, \fB\-mips32r2\fR, \fB\-mips64\fR, and
+\&\fB\-mips64r2\fR
+correspond to generic
+\&\fB\s-1MIPS\s0 V\fR, \fB\s-1MIPS32\s0\fR, \fB\s-1MIPS32\s0 Release 2\fR, \fB\s-1MIPS64\s0\fR,
+and \fB\s-1MIPS64\s0 Release 2\fR
+\&\s-1ISA\s0 processors, respectively.
+.IP "\fB\-march=\fR\fI\s-1CPU\s0\fR" 4
+.IX Item "-march=CPU"
+Generate code for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mtune=\fR\fIcpu\fR" 4
+.IX Item "-mtune=cpu"
+Schedule and tune for a particular \s-1MIPS\s0 cpu.
+.IP "\fB\-mfix7000\fR" 4
+.IX Item "-mfix7000"
+.PD 0
+.IP "\fB\-mno\-fix7000\fR" 4
+.IX Item "-mno-fix7000"
+.PD
+Cause nops to be inserted if the read of the destination register
+of an mfhi or mflo instruction occurs in the following two instructions.
+.IP "\fB\-mdebug\fR" 4
+.IX Item "-mdebug"
+.PD 0
+.IP "\fB\-no\-mdebug\fR" 4
+.IX Item "-no-mdebug"
+.PD
+Cause stabs-style debugging output to go into an ECOFF-style .mdebug
+section instead of the standard \s-1ELF\s0 .stabs sections.
+.IP "\fB\-mpdr\fR" 4
+.IX Item "-mpdr"
+.PD 0
+.IP "\fB\-mno\-pdr\fR" 4
+.IX Item "-mno-pdr"
+.PD
+Control generation of \f(CW\*(C`.pdr\*(C'\fR sections.
+.IP "\fB\-mgp32\fR" 4
+.IX Item "-mgp32"
+.PD 0
+.IP "\fB\-mfp32\fR" 4
+.IX Item "-mfp32"
+.PD
+The register sizes are normally inferred from the \s-1ISA\s0 and \s-1ABI\s0, but these
+flags force a certain group of registers to be treated as 32 bits wide at
+all times.  \fB\-mgp32\fR controls the size of general-purpose registers
+and \fB\-mfp32\fR controls the size of floating-point registers.
+.IP "\fB\-mips16\fR" 4
+.IX Item "-mips16"
+.PD 0
+.IP "\fB\-no\-mips16\fR" 4
+.IX Item "-no-mips16"
+.PD
+Generate code for the \s-1MIPS\s0 16 processor.  This is equivalent to putting
+\&\f(CW\*(C`.set mips16\*(C'\fR at the start of the assembly file.  \fB\-no\-mips16\fR
+turns off this option.
+.IP "\fB\-msmartmips\fR" 4
+.IX Item "-msmartmips"
+.PD 0
+.IP "\fB\-mno\-smartmips\fR" 4
+.IX Item "-mno-smartmips"
+.PD
+Enables the SmartMIPS extension to the \s-1MIPS32\s0 instruction set. This is
+equivalent to putting \f(CW\*(C`.set smartmips\*(C'\fR at the start of the assembly file.
+\&\fB\-mno\-smartmips\fR turns off this option.
+.IP "\fB\-mips3d\fR" 4
+.IX Item "-mips3d"
+.PD 0
+.IP "\fB\-no\-mips3d\fR" 4
+.IX Item "-no-mips3d"
+.PD
+Generate code for the \s-1MIPS\-3D\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MIPS\-3D\s0 instructions.
+\&\fB\-no\-mips3d\fR turns off this option.
+.IP "\fB\-mdmx\fR" 4
+.IX Item "-mdmx"
+.PD 0
+.IP "\fB\-no\-mdmx\fR" 4
+.IX Item "-no-mdmx"
+.PD
+Generate code for the \s-1MDMX\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MDMX\s0 instructions.
+\&\fB\-no\-mdmx\fR turns off this option.
+.IP "\fB\-mdsp\fR" 4
+.IX Item "-mdsp"
+.PD 0
+.IP "\fB\-mno\-dsp\fR" 4
+.IX Item "-mno-dsp"
+.PD
+Generate code for the \s-1DSP\s0 Release 1 Application Specific Extension.
+This tells the assembler to accept \s-1DSP\s0 Release 1 instructions.
+\&\fB\-mno\-dsp\fR turns off this option.
+.IP "\fB\-mdspr2\fR" 4
+.IX Item "-mdspr2"
+.PD 0
+.IP "\fB\-mno\-dspr2\fR" 4
+.IX Item "-mno-dspr2"
+.PD
+Generate code for the \s-1DSP\s0 Release 2 Application Specific Extension.
+This option implies \-mdsp.
+This tells the assembler to accept \s-1DSP\s0 Release 2 instructions.
+\&\fB\-mno\-dspr2\fR turns off this option.
+.IP "\fB\-mmt\fR" 4
+.IX Item "-mmt"
+.PD 0
+.IP "\fB\-mno\-mt\fR" 4
+.IX Item "-mno-mt"
+.PD
+Generate code for the \s-1MT\s0 Application Specific Extension.
+This tells the assembler to accept \s-1MT\s0 instructions.
+\&\fB\-mno\-mt\fR turns off this option.
+.IP "\fB\-\-construct\-floats\fR" 4
+.IX Item "--construct-floats"
+.PD 0
+.IP "\fB\-\-no\-construct\-floats\fR" 4
+.IX Item "--no-construct-floats"
+.PD
+The \fB\-\-no\-construct\-floats\fR option disables the construction of
+double width floating point constants by loading the two halves of the
+value into the two single width floating point registers that make up
+the double width register.  By default \fB\-\-construct\-floats\fR is
+selected, allowing construction of these floating point constants.
+.IP "\fB\-\-emulation=\fR\fIname\fR" 4
+.IX Item "--emulation=name"
+This option causes \fBas\fR to emulate \fBas\fR configured
+for some other target, in all respects, including output format (choosing
+between \s-1ELF\s0 and \s-1ECOFF\s0 only), handling of pseudo-opcodes which may generate
+debugging information or store symbol table information, and default
+endianness.  The available configuration names are: \fBmipsecoff\fR,
+\&\fBmipself\fR, \fBmipslecoff\fR, \fBmipsbecoff\fR, \fBmipslelf\fR,
+\&\fBmipsbelf\fR.  The first two do not alter the default endianness from that
+of the primary target for which the assembler was configured; the others change
+the default to little\- or big-endian as indicated by the \fBb\fR or \fBl\fR
+in the name.  Using \fB\-EB\fR or \fB\-EL\fR will override the endianness
+selection in any case.
+.Sp
+This option is currently supported only when the primary target
+\&\fBas\fR is configured for is a \s-1MIPS\s0 \s-1ELF\s0 or \s-1ECOFF\s0 target.
+Furthermore, the primary target or others specified with
+\&\fB\-\-enable\-targets=...\fR at configuration time must include support for
+the other format, if both are to be available.  For example, the Irix 5
+configuration includes support for both.
+.Sp
+Eventually, this option will support more configurations, with more
+fine-grained control over the assembler's behavior, and will be supported for
+more processors.
+.IP "\fB\-nocpp\fR" 4
+.IX Item "-nocpp"
+\&\fBas\fR ignores this option.  It is accepted for compatibility with
+the native tools.
+.IP "\fB\-\-trap\fR" 4
+.IX Item "--trap"
+.PD 0
+.IP "\fB\-\-no\-trap\fR" 4
+.IX Item "--no-trap"
+.IP "\fB\-\-break\fR" 4
+.IX Item "--break"
+.IP "\fB\-\-no\-break\fR" 4
+.IX Item "--no-break"
+.PD
+Control how to deal with multiplication overflow and division by zero.
+\&\fB\-\-trap\fR or \fB\-\-no\-break\fR (which are synonyms) take a trap exception
+(and only work for Instruction Set Architecture level 2 and higher);
+\&\fB\-\-break\fR or \fB\-\-no\-trap\fR (also synonyms, and the default) take a
+break exception.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+When this option is used, \fBas\fR will issue a warning every
+time it generates a nop instruction from a macro.
+.PP
+The following options are available when as is configured for
+an MCore processor.
+.IP "\fB\-jsri2bsr\fR" 4
+.IX Item "-jsri2bsr"
+.PD 0
+.IP "\fB\-nojsri2bsr\fR" 4
+.IX Item "-nojsri2bsr"
+.PD
+Enable or disable the \s-1JSRI\s0 to \s-1BSR\s0 transformation.  By default this is enabled.
+The command line option \fB\-nojsri2bsr\fR can be used to disable it.
+.IP "\fB\-sifilter\fR" 4
+.IX Item "-sifilter"
+.PD 0
+.IP "\fB\-nosifilter\fR" 4
+.IX Item "-nosifilter"
+.PD
+Enable or disable the silicon filter behaviour.  By default this is disabled.
+The default can be overridden by the \fB\-sifilter\fR command line option.
+.IP "\fB\-relax\fR" 4
+.IX Item "-relax"
+Alter jump instructions for long displacements.
+.IP "\fB\-mcpu=[210|340]\fR" 4
+.IX Item "-mcpu=[210|340]"
+Select the cpu type on the target hardware.  This controls which instructions
+can be assembled.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Assemble for a big endian target.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Assemble for a little endian target.
+.PP
+See the info pages for documentation of the MMIX-specific options.
+.PP
+The following options are available when as is configured for the s390
+processor family.
+.IP "\fB\-m31\fR" 4
+.IX Item "-m31"
+.PD 0
+.IP "\fB\-m64\fR" 4
+.IX Item "-m64"
+.PD
+Select the word size, either 31/32 bits or 64 bits.
+.IP "\fB\-mesa\fR" 4
+.IX Item "-mesa"
+.PD 0
+.IP "\fB\-mzarch\fR" 4
+.IX Item "-mzarch"
+.PD
+Select the architecture mode, either the Enterprise System
+Architecture (esa) or the z/Architecture mode (zarch).
+.IP "\fB\-march=\fR\fIprocessor\fR" 4
+.IX Item "-march=processor"
+Specify which s390 processor variant is the target, \fBg6\fR, \fBg6\fR,
+\&\fBz900\fR, \fBz990\fR, \fBz9\-109\fR, \fBz9\-ec\fR, or \fBz10\fR.
+.IP "\fB\-mregnames\fR" 4
+.IX Item "-mregnames"
+.PD 0
+.IP "\fB\-mno\-regnames\fR" 4
+.IX Item "-mno-regnames"
+.PD
+Allow or disallow symbolic names for registers.
+.IP "\fB\-mwarn\-areg\-zero\fR" 4
+.IX Item "-mwarn-areg-zero"
+Warn whenever the operand for a base or index register has been specified
+but evaluates to zero.
+.PP
+The following options are available when as is configured for
+an Xtensa processor.
+.IP "\fB\-\-text\-section\-literals | \-\-no\-text\-section\-literals\fR" 4
+.IX Item "--text-section-literals | --no-text-section-literals"
+With \fB\-\-text\-section\-literals\fR, literal pools are interspersed
+in the text section.  The default is
+\&\fB\-\-no\-text\-section\-literals\fR, which places literals in a
+separate section in the output file.  These options only affect literals
+referenced via PC-relative \f(CW\*(C`L32R\*(C'\fR instructions; literals for
+absolute mode \f(CW\*(C`L32R\*(C'\fR instructions are handled separately.
+.IP "\fB\-\-absolute\-literals | \-\-no\-absolute\-literals\fR" 4
+.IX Item "--absolute-literals | --no-absolute-literals"
+Indicate to the assembler whether \f(CW\*(C`L32R\*(C'\fR instructions use absolute
+or PC-relative addressing.  The default is to assume absolute addressing
+if the Xtensa processor includes the absolute \f(CW\*(C`L32R\*(C'\fR addressing
+option.  Otherwise, only the PC-relative \f(CW\*(C`L32R\*(C'\fR mode can be used.
+.IP "\fB\-\-target\-align | \-\-no\-target\-align\fR" 4
+.IX Item "--target-align | --no-target-align"
+Enable or disable automatic alignment to reduce branch penalties at the
+expense of some code density.  The default is \fB\-\-target\-align\fR.
+.IP "\fB\-\-longcalls | \-\-no\-longcalls\fR" 4
+.IX Item "--longcalls | --no-longcalls"
+Enable or disable transformation of call instructions to allow calls
+across a greater range of addresses.  The default is
+\&\fB\-\-no\-longcalls\fR.
+.IP "\fB\-\-transform | \-\-no\-transform\fR" 4
+.IX Item "--transform | --no-transform"
+Enable or disable all assembler transformations of Xtensa instructions.
+The default is \fB\-\-transform\fR;
+\&\fB\-\-no\-transform\fR should be used only in the rare cases when the
+instructions must be exactly as specified in the assembly source.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR" 4
+.IX Item "--rename-section oldname=newname"
+When generating output sections, rename the \fIoldname\fR section to
+\&\fInewname\fR.
+.PP
+The following options are available when as is configured for
+a Z80 family processor.
+.IP "\fB\-z80\fR" 4
+.IX Item "-z80"
+Assemble for Z80 processor.
+.IP "\fB\-r800\fR" 4
+.IX Item "-r800"
+Assemble for R800 processor.
+.IP "\fB\-ignore\-undocumented\-instructions\fR" 4
+.IX Item "-ignore-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wnud\fR" 4
+.IX Item "-Wnud"
+.PD
+Assemble undocumented Z80 instructions that also work on R800 without warning.
+.IP "\fB\-ignore\-unportable\-instructions\fR" 4
+.IX Item "-ignore-unportable-instructions"
+.PD 0
+.IP "\fB\-Wnup\fR" 4
+.IX Item "-Wnup"
+.PD
+Assemble all undocumented Z80 instructions without warning.
+.IP "\fB\-warn\-undocumented\-instructions\fR" 4
+.IX Item "-warn-undocumented-instructions"
+.PD 0
+.IP "\fB\-Wud\fR" 4
+.IX Item "-Wud"
+.PD
+Issue a warning for undocumented Z80 instructions that also work on R800.
+.IP "\fB\-warn\-unportable\-instructions\fR" 4
+.IX Item "-warn-unportable-instructions"
+.PD 0
+.IP "\fB\-Wup\fR" 4
+.IX Item "-Wup"
+.PD
+Issue a warning for undocumented Z80 instructions that do not work on R800.  
+.IP "\fB\-forbid\-undocumented\-instructions\fR" 4
+.IX Item "-forbid-undocumented-instructions"
+.PD 0
+.IP "\fB\-Fud\fR" 4
+.IX Item "-Fud"
+.PD
+Treat all undocumented instructions as errors.
+.IP "\fB\-forbid\-unportable\-instructions\fR" 4
+.IX Item "-forbid-unportable-instructions"
+.PD 0
+.IP "\fB\-Fup\fR" 4
+.IX Item "-Fup"
+.PD
+Treat undocumented Z80 instructions that do not work on R800 as errors.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgcc\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIbinutils\fR and \fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001, 2002,
+2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-c++filt.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-c++filt.1
new file mode 100644
index 00000000..b4a9f778
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-c++filt.1
@@ -0,0 +1,337 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "C++FILT 1"
+.TH C++FILT 1 "2013-10-22" "binutils-2.20" "GNU Development Tools"
+.SH "NAME"
+c++filt \- Demangle C++ and Java symbols.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+c++filt [\fB\-_\fR|\fB\-\-strip\-underscores\fR]
+        [\fB\-n\fR|\fB\-\-no\-strip\-underscores\fR]
+        [\fB\-p\fR|\fB\-\-no\-params\fR]
+        [\fB\-t\fR|\fB\-\-types\fR]
+        [\fB\-i\fR|\fB\-\-no\-verbose\fR]
+        [\fB\-s\fR \fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+        [\fB\-\-help\fR]  [\fB\-\-version\fR]  [\fIsymbol\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \*(C+ and Java languages provide function overloading, which means
+that you can write many functions with the same name, providing that
+each function takes parameters of different types.  In order to be
+able to distinguish these similarly named functions \*(C+ and Java
+encode them into a low-level assembler name which uniquely identifies
+each different version.  This process is known as \fImangling\fR. The
+\&\fBc++filt\fR
+[1]
+program does the inverse mapping: it decodes (\fIdemangles\fR) low-level
+names into user-level names so that they can be read.
+.PP
+Every alphanumeric word (consisting of letters, digits, underscores,
+dollars, or periods) seen in the input is a potential mangled name.
+If the name decodes into a \*(C+ name, the \*(C+ name replaces the
+low-level name in the output, otherwise the original word is output.
+In this way you can pass an entire assembler source file, containing
+mangled names, through \fBc++filt\fR and see the same source file
+containing demangled names.
+.PP
+You can also use \fBc++filt\fR to decipher individual symbols by
+passing them on the command line:
+.PP
+.Vb 1
+\&        c++filt <symbol>
+.Ve
+.PP
+If no \fIsymbol\fR arguments are given, \fBc++filt\fR reads symbol
+names from the standard input instead.  All the results are printed on
+the standard output.  The difference between reading names from the
+command line versus reading names from the standard input is that
+command line arguments are expected to be just mangled names and no
+checking is performed to separate them from surrounding text.  Thus
+for example:
+.PP
+.Vb 1
+\&        c++filt -n _Z1fv
+.Ve
+.PP
+will work and demangle the name to \*(L"f()\*(R" whereas:
+.PP
+.Vb 1
+\&        c++filt -n _Z1fv,
+.Ve
+.PP
+will not work.  (Note the extra comma at the end of the mangled
+name which makes it invalid).  This command however will work:
+.PP
+.Vb 1
+\&        echo _Z1fv, | c++filt -n
+.Ve
+.PP
+and will display \*(L"f(),\*(R", i.e., the demangled name followed by a
+trailing comma.  This behaviour is because when the names are read
+from the standard input it is expected that they might be part of an
+assembler source file where there might be extra, extraneous
+characters trailing after a mangled name.  For example:
+.PP
+.Vb 1
+\&            .type   _Z1fv, @function
+.Ve
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-_\fR" 4
+.IX Item "-_"
+.PD 0
+.IP "\fB\-\-strip\-underscores\fR" 4
+.IX Item "--strip-underscores"
+.PD
+On some systems, both the C and \*(C+ compilers put an underscore in front
+of every name.  For example, the C name \f(CW\*(C`foo\*(C'\fR gets the low-level
+name \f(CW\*(C`_foo\*(C'\fR.  This option removes the initial underscore.  Whether
+\&\fBc++filt\fR removes the underscore by default is target dependent.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-strip\-underscores\fR" 4
+.IX Item "--no-strip-underscores"
+.PD
+Do not remove the initial underscore.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-params\fR" 4
+.IX Item "--no-params"
+.PD
+When demangling the name of a function, do not display the types of
+the function's parameters.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-types\fR" 4
+.IX Item "--types"
+.PD
+Attempt to demangle types as well as function names.  This is disabled
+by default since mangled types are normally only used internally in
+the compiler, and they can be confused with non-mangled names.  For example,
+a function called \*(L"a\*(R" treated as a mangled type name would be
+demangled to \*(L"signed char\*(R".
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-no\-verbose\fR" 4
+.IX Item "--no-verbose"
+.PD
+Do not include implementation details (if any) in the demangled
+output.
+.IP "\fB\-s\fR \fIformat\fR" 4
+.IX Item "-s format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+\&\fBc++filt\fR can decode various methods of mangling, used by
+different compilers.  The argument to this option selects which
+method it uses:
+.RS 4
+.ie n .IP """auto""" 4
+.el .IP "\f(CWauto\fR" 4
+.IX Item "auto"
+Automatic selection based on executable (the default method)
+.ie n .IP """gnu""" 4
+.el .IP "\f(CWgnu\fR" 4
+.IX Item "gnu"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++)
+.ie n .IP """lucid""" 4
+.el .IP "\f(CWlucid\fR" 4
+.IX Item "lucid"
+the one used by the Lucid compiler (lcc)
+.ie n .IP """arm""" 4
+.el .IP "\f(CWarm\fR" 4
+.IX Item "arm"
+the one specified by the \*(C+ Annotated Reference Manual
+.ie n .IP """hp""" 4
+.el .IP "\f(CWhp\fR" 4
+.IX Item "hp"
+the one used by the \s-1HP\s0 compiler (aCC)
+.ie n .IP """edg""" 4
+.el .IP "\f(CWedg\fR" 4
+.IX Item "edg"
+the one used by the \s-1EDG\s0 compiler
+.ie n .IP """gnu\-v3""" 4
+.el .IP "\f(CWgnu\-v3\fR" 4
+.IX Item "gnu-v3"
+the one used by the \s-1GNU\s0 \*(C+ compiler (g++) with the V3 \s-1ABI\s0.
+.ie n .IP """java""" 4
+.el .IP "\f(CWjava\fR" 4
+.IX Item "java"
+the one used by the \s-1GNU\s0 Java compiler (gcj)
+.ie n .IP """gnat""" 4
+.el .IP "\f(CWgnat\fR" 4
+.IX Item "gnat"
+the one used by the \s-1GNU\s0 Ada compiler (\s-1GNAT\s0).
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the options to \fBc++filt\fR and exit.
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+Print the version number of \fBc++filt\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.  
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "FOOTNOTES"
+.IX Header "FOOTNOTES"
+.IP "1." 4
+MS-DOS does not allow \f(CW\*(C`+\*(C'\fR characters in file names, so on
+MS-DOS this program is named \fB\s-1CXXFILT\s0\fR.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-cpp.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-cpp.1
new file mode 100644
index 00000000..985583aa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-cpp.1
@@ -0,0 +1,988 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "CPP 1"
+.TH CPP 1 "2010-07-31" "gcc-4.5.1" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+cpp \- The C Preprocessor
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+cpp [\fB\-D\fR\fImacro\fR[=\fIdefn\fR]...] [\fB\-U\fR\fImacro\fR]
+    [\fB\-I\fR\fIdir\fR...] [\fB\-iquote\fR\fIdir\fR...]
+    [\fB\-W\fR\fIwarn\fR...]
+    [\fB\-M\fR|\fB\-MM\fR] [\fB\-MG\fR] [\fB\-MF\fR \fIfilename\fR]
+    [\fB\-MP\fR] [\fB\-MQ\fR \fItarget\fR...]
+    [\fB\-MT\fR \fItarget\fR...]
+    [\fB\-P\fR] [\fB\-fno\-working\-directory\fR]
+    [\fB\-x\fR \fIlanguage\fR] [\fB\-std=\fR\fIstandard\fR]
+    \fIinfile\fR \fIoutfile\fR
+.PP
+Only the most useful options are listed here; see below for the remainder.
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The C preprocessor, often known as \fIcpp\fR, is a \fImacro processor\fR
+that is used automatically by the C compiler to transform your program
+before compilation.  It is called a macro processor because it allows
+you to define \fImacros\fR, which are brief abbreviations for longer
+constructs.
+.PP
+The C preprocessor is intended to be used only with C, \*(C+, and
+Objective-C source code.  In the past, it has been abused as a general
+text processor.  It will choke on input which does not obey C's lexical
+rules.  For example, apostrophes will be interpreted as the beginning of
+character constants, and cause errors.  Also, you cannot rely on it
+preserving characteristics of the input which are not significant to
+C\-family languages.  If a Makefile is preprocessed, all the hard tabs
+will be removed, and the Makefile will not work.
+.PP
+Having said that, you can often get away with using cpp on things which
+are not C.  Other Algol-ish programming languages are often safe
+(Pascal, Ada, etc.) So is assembly, with caution.  \fB\-traditional\-cpp\fR
+mode preserves more white space, and is otherwise more permissive.  Many
+of the problems can be avoided by writing C or \*(C+ style comments
+instead of native language comments, and keeping macros simple.
+.PP
+Wherever possible, you should use a preprocessor geared to the language
+you are writing in.  Modern versions of the \s-1GNU\s0 assembler have macro
+facilities.  Most high level programming languages have their own
+conditional compilation and inclusion mechanism.  If all else fails,
+try a true general text processor, such as \s-1GNU\s0 M4.
+.PP
+C preprocessors vary in some details.  This manual discusses the \s-1GNU\s0 C
+preprocessor, which provides a small superset of the features of \s-1ISO\s0
+Standard C.  In its default mode, the \s-1GNU\s0 C preprocessor does not do a
+few things required by the standard.  These are features which are
+rarely, if ever, used, and may cause surprising changes to the meaning
+of a program which does not expect them.  To get strict \s-1ISO\s0 Standard C,
+you should use the \fB\-std=c90\fR or \fB\-std=c99\fR options, depending
+on which version of the standard you want.  To get all the mandatory
+diagnostics, you must also use \fB\-pedantic\fR.
+.PP
+This manual describes the behavior of the \s-1ISO\s0 preprocessor.  To
+minimize gratuitous differences, where the \s-1ISO\s0 preprocessor's
+behavior does not conflict with traditional semantics, the
+traditional preprocessor should behave the same way.  The various
+differences that do exist are detailed in the section \fBTraditional
+Mode\fR.
+.PP
+For clarity, unless noted otherwise, references to \fB\s-1CPP\s0\fR in this
+manual refer to \s-1GNU\s0 \s-1CPP\s0.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The C preprocessor expects two file names as arguments, \fIinfile\fR and
+\&\fIoutfile\fR.  The preprocessor reads \fIinfile\fR together with any
+other files it specifies with \fB#include\fR.  All the output generated
+by the combined input files is written in \fIoutfile\fR.
+.PP
+Either \fIinfile\fR or \fIoutfile\fR may be \fB\-\fR, which as
+\&\fIinfile\fR means to read from standard input and as \fIoutfile\fR
+means to write to standard output.  Also, if either file is omitted, it
+means the same as if \fB\-\fR had been specified for that file.
+.PP
+Unless otherwise noted, or the option ends in \fB=\fR, all options
+which take an argument may have that argument appear either immediately
+after the option, or with a space between option and argument:
+\&\fB\-Ifoo\fR and \fB\-I foo\fR have the same effect.
+.PP
+Many options have multi-letter names; therefore multiple single-letter
+options may \fInot\fR be grouped: \fB\-dM\fR is very different from
+\&\fB\-d\ \-M\fR.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+Predefine \fIname\fR as a macro, with definition \f(CW1\fR.
+.IP "\fB\-D\fR \fIname\fR\fB=\fR\fIdefinition\fR" 4
+.IX Item "-D name=definition"
+The contents of \fIdefinition\fR are tokenized and processed as if
+they appeared during translation phase three in a \fB#define\fR
+directive.  In particular, the definition will be truncated by
+embedded newline characters.
+.Sp
+If you are invoking the preprocessor from a shell or shell-like
+program you may need to use the shell's quoting syntax to protect
+characters such as spaces that have a meaning in the shell syntax.
+.Sp
+If you wish to define a function-like macro on the command line, write
+its argument list with surrounding parentheses before the equals sign
+(if any).  Parentheses are meaningful to most shells, so you will need
+to quote the option.  With \fBsh\fR and \fBcsh\fR,
+\&\fB\-D'\fR\fIname\fR\fB(\fR\fIargs...\fR\fB)=\fR\fIdefinition\fR\fB'\fR works.
+.Sp
+\&\fB\-D\fR and \fB\-U\fR options are processed in the order they
+are given on the command line.  All \fB\-imacros\fR \fIfile\fR and
+\&\fB\-include\fR \fIfile\fR options are processed after all
+\&\fB\-D\fR and \fB\-U\fR options.
+.IP "\fB\-U\fR \fIname\fR" 4
+.IX Item "-U name"
+Cancel any previous definition of \fIname\fR, either built in or
+provided with a \fB\-D\fR option.
+.IP "\fB\-undef\fR" 4
+.IX Item "-undef"
+Do not predefine any system-specific or GCC-specific macros.  The
+standard predefined macros remain defined.
+.IP "\fB\-I\fR \fIdir\fR" 4
+.IX Item "-I dir"
+Add the directory \fIdir\fR to the list of directories to be searched
+for header files.
+.Sp
+Directories named by \fB\-I\fR are searched before the standard
+system include directories.  If the directory \fIdir\fR is a standard
+system include directory, the option is ignored to ensure that the
+default search order for system directories and the special treatment
+of system headers are not defeated
+\&.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Write output to \fIfile\fR.  This is the same as specifying \fIfile\fR
+as the second non-option argument to \fBcpp\fR.  \fBgcc\fR has a
+different interpretation of a second non-option argument, so you must
+use \fB\-o\fR to specify the output file.
+.IP "\fB\-Wall\fR" 4
+.IX Item "-Wall"
+Turns on all optional warnings which are desirable for normal code.
+At present this is \fB\-Wcomment\fR, \fB\-Wtrigraphs\fR,
+\&\fB\-Wmultichar\fR and a warning about integer promotion causing a
+change of sign in \f(CW\*(C`#if\*(C'\fR expressions.  Note that many of the
+preprocessor's warnings are on by default and have no options to
+control them.
+.IP "\fB\-Wcomment\fR" 4
+.IX Item "-Wcomment"
+.PD 0
+.IP "\fB\-Wcomments\fR" 4
+.IX Item "-Wcomments"
+.PD
+Warn whenever a comment-start sequence \fB/*\fR appears in a \fB/*\fR
+comment, or whenever a backslash-newline appears in a \fB//\fR comment.
+(Both forms have the same effect.)
+.IP "\fB\-Wtrigraphs\fR" 4
+.IX Item "-Wtrigraphs"
+Most trigraphs in comments cannot affect the meaning of the program.
+However, a trigraph that would form an escaped newline (\fB??/\fR at
+the end of a line) can, by changing where the comment begins or ends.
+Therefore, only trigraphs that would form escaped newlines produce
+warnings inside a comment.
+.Sp
+This option is implied by \fB\-Wall\fR.  If \fB\-Wall\fR is not
+given, this option is still enabled unless trigraphs are enabled.  To
+get trigraph conversion without warnings, but get the other
+\&\fB\-Wall\fR warnings, use \fB\-trigraphs \-Wall \-Wno\-trigraphs\fR.
+.IP "\fB\-Wtraditional\fR" 4
+.IX Item "-Wtraditional"
+Warn about certain constructs that behave differently in traditional and
+\&\s-1ISO\s0 C.  Also warn about \s-1ISO\s0 C constructs that have no traditional C
+equivalent, and problematic constructs which should be avoided.
+.IP "\fB\-Wundef\fR" 4
+.IX Item "-Wundef"
+Warn whenever an identifier which is not a macro is encountered in an
+\&\fB#if\fR directive, outside of \fBdefined\fR.  Such identifiers are
+replaced with zero.
+.IP "\fB\-Wunused\-macros\fR" 4
+.IX Item "-Wunused-macros"
+Warn about macros defined in the main file that are unused.  A macro
+is \fIused\fR if it is expanded or tested for existence at least once.
+The preprocessor will also warn if the macro has not been used at the
+time it is redefined or undefined.
+.Sp
+Built-in macros, macros defined on the command line, and macros
+defined in include files are not warned about.
+.Sp
+\&\fINote:\fR If a macro is actually used, but only used in skipped
+conditional blocks, then \s-1CPP\s0 will report it as unused.  To avoid the
+warning in such a case, you might improve the scope of the macro's
+definition by, for example, moving it into the first skipped block.
+Alternatively, you could provide a dummy use with something like:
+.Sp
+.Vb 2
+\&        #if defined the_macro_causing_the_warning
+\&        #endif
+.Ve
+.IP "\fB\-Wendif\-labels\fR" 4
+.IX Item "-Wendif-labels"
+Warn whenever an \fB#else\fR or an \fB#endif\fR are followed by text.
+This usually happens in code of the form
+.Sp
+.Vb 5
+\&        #if FOO
+\&        ...
+\&        #else FOO
+\&        ...
+\&        #endif FOO
+.Ve
+.Sp
+The second and third \f(CW\*(C`FOO\*(C'\fR should be in comments, but often are not
+in older programs.  This warning is on by default.
+.IP "\fB\-Werror\fR" 4
+.IX Item "-Werror"
+Make all warnings into hard errors.  Source code which triggers warnings
+will be rejected.
+.IP "\fB\-Wsystem\-headers\fR" 4
+.IX Item "-Wsystem-headers"
+Issue warnings for code in system headers.  These are normally unhelpful
+in finding bugs in your own code, therefore suppressed.  If you are
+responsible for the system library, you may want to see them.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+Suppress all warnings, including those which \s-1GNU\s0 \s-1CPP\s0 issues by default.
+.IP "\fB\-pedantic\fR" 4
+.IX Item "-pedantic"
+Issue all the mandatory diagnostics listed in the C standard.  Some of
+them are left out by default, since they trigger frequently on harmless
+code.
+.IP "\fB\-pedantic\-errors\fR" 4
+.IX Item "-pedantic-errors"
+Issue all the mandatory diagnostics, and make all mandatory diagnostics
+into errors.  This includes mandatory diagnostics that \s-1GCC\s0 issues
+without \fB\-pedantic\fR but treats as warnings.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+Instead of outputting the result of preprocessing, output a rule
+suitable for \fBmake\fR describing the dependencies of the main
+source file.  The preprocessor outputs one \fBmake\fR rule containing
+the object file name for that source file, a colon, and the names of all
+the included files, including those coming from \fB\-include\fR or
+\&\fB\-imacros\fR command line options.
+.Sp
+Unless specified explicitly (with \fB\-MT\fR or \fB\-MQ\fR), the
+object file name consists of the name of the source file with any
+suffix replaced with object file suffix and with any leading directory
+parts removed.  If there are many included files then the rule is
+split into several lines using \fB\e\fR\-newline.  The rule has no
+commands.
+.Sp
+This option does not suppress the preprocessor's debug output, such as
+\&\fB\-dM\fR.  To avoid mixing such debug output with the dependency
+rules you should explicitly specify the dependency output file with
+\&\fB\-MF\fR, or use an environment variable like
+\&\fB\s-1DEPENDENCIES_OUTPUT\s0\fR.  Debug output
+will still be sent to the regular output stream as normal.
+.Sp
+Passing \fB\-M\fR to the driver implies \fB\-E\fR, and suppresses
+warnings with an implicit \fB\-w\fR.
+.IP "\fB\-MM\fR" 4
+.IX Item "-MM"
+Like \fB\-M\fR but do not mention header files that are found in
+system header directories, nor header files that are included,
+directly or indirectly, from such a header.
+.Sp
+This implies that the choice of angle brackets or double quotes in an
+\&\fB#include\fR directive does not in itself determine whether that
+header will appear in \fB\-MM\fR dependency output.  This is a
+slight change in semantics from \s-1GCC\s0 versions 3.0 and earlier.
+.IP "\fB\-MF\fR \fIfile\fR" 4
+.IX Item "-MF file"
+When used with \fB\-M\fR or \fB\-MM\fR, specifies a
+file to write the dependencies to.  If no \fB\-MF\fR switch is given
+the preprocessor sends the rules to the same place it would have sent
+preprocessed output.
+.Sp
+When used with the driver options \fB\-MD\fR or \fB\-MMD\fR,
+\&\fB\-MF\fR overrides the default dependency output file.
+.IP "\fB\-MG\fR" 4
+.IX Item "-MG"
+In conjunction with an option such as \fB\-M\fR requesting
+dependency generation, \fB\-MG\fR assumes missing header files are
+generated files and adds them to the dependency list without raising
+an error.  The dependency filename is taken directly from the
+\&\f(CW\*(C`#include\*(C'\fR directive without prepending any path.  \fB\-MG\fR
+also suppresses preprocessed output, as a missing header file renders
+this useless.
+.Sp
+This feature is used in automatic updating of makefiles.
+.IP "\fB\-MP\fR" 4
+.IX Item "-MP"
+This option instructs \s-1CPP\s0 to add a phony target for each dependency
+other than the main file, causing each to depend on nothing.  These
+dummy rules work around errors \fBmake\fR gives if you remove header
+files without updating the \fIMakefile\fR to match.
+.Sp
+This is typical output:
+.Sp
+.Vb 1
+\&        test.o: test.c test.h
+\&        
+\&        test.h:
+.Ve
+.IP "\fB\-MT\fR \fItarget\fR" 4
+.IX Item "-MT target"
+Change the target of the rule emitted by dependency generation.  By
+default \s-1CPP\s0 takes the name of the main input file, deletes any
+directory components and any file suffix such as \fB.c\fR, and
+appends the platform's usual object suffix.  The result is the target.
+.Sp
+An \fB\-MT\fR option will set the target to be exactly the string you
+specify.  If you want multiple targets, you can specify them as a single
+argument to \fB\-MT\fR, or use multiple \fB\-MT\fR options.
+.Sp
+For example, \fB\-MT\ '$(objpfx)foo.o'\fR might give
+.Sp
+.Vb 1
+\&        $(objpfx)foo.o: foo.c
+.Ve
+.IP "\fB\-MQ\fR \fItarget\fR" 4
+.IX Item "-MQ target"
+Same as \fB\-MT\fR, but it quotes any characters which are special to
+Make.  \fB\-MQ\ '$(objpfx)foo.o'\fR gives
+.Sp
+.Vb 1
+\&        $$(objpfx)foo.o: foo.c
+.Ve
+.Sp
+The default target is automatically quoted, as if it were given with
+\&\fB\-MQ\fR.
+.IP "\fB\-MD\fR" 4
+.IX Item "-MD"
+\&\fB\-MD\fR is equivalent to \fB\-M \-MF\fR \fIfile\fR, except that
+\&\fB\-E\fR is not implied.  The driver determines \fIfile\fR based on
+whether an \fB\-o\fR option is given.  If it is, the driver uses its
+argument but with a suffix of \fI.d\fR, otherwise it takes the name
+of the input file, removes any directory components and suffix, and
+applies a \fI.d\fR suffix.
+.Sp
+If \fB\-MD\fR is used in conjunction with \fB\-E\fR, any
+\&\fB\-o\fR switch is understood to specify the dependency output file, but if used without \fB\-E\fR, each \fB\-o\fR
+is understood to specify a target object file.
+.Sp
+Since \fB\-E\fR is not implied, \fB\-MD\fR can be used to generate
+a dependency output file as a side-effect of the compilation process.
+.IP "\fB\-MMD\fR" 4
+.IX Item "-MMD"
+Like \fB\-MD\fR except mention only user header files, not system
+header files.
+.IP "\fB\-x c\fR" 4
+.IX Item "-x c"
+.PD 0
+.IP "\fB\-x c++\fR" 4
+.IX Item "-x c++"
+.IP "\fB\-x objective-c\fR" 4
+.IX Item "-x objective-c"
+.IP "\fB\-x assembler-with-cpp\fR" 4
+.IX Item "-x assembler-with-cpp"
+.PD
+Specify the source language: C, \*(C+, Objective-C, or assembly.  This has
+nothing to do with standards conformance or extensions; it merely
+selects which base syntax to expect.  If you give none of these options,
+cpp will deduce the language from the extension of the source file:
+\&\fB.c\fR, \fB.cc\fR, \fB.m\fR, or \fB.S\fR.  Some other common
+extensions for \*(C+ and assembly are also recognized.  If cpp does not
+recognize the extension, it will treat the file as C; this is the most
+generic mode.
+.Sp
+\&\fINote:\fR Previous versions of cpp accepted a \fB\-lang\fR option
+which selected both the language and the standards conformance level.
+This option has been removed, because it conflicts with the \fB\-l\fR
+option.
+.IP "\fB\-std=\fR\fIstandard\fR" 4
+.IX Item "-std=standard"
+.PD 0
+.IP "\fB\-ansi\fR" 4
+.IX Item "-ansi"
+.PD
+Specify the standard to which the code should conform.  Currently \s-1CPP\s0
+knows about C and \*(C+ standards; others may be added in the future.
+.Sp
+\&\fIstandard\fR
+may be one of:
+.RS 4
+.ie n .IP """c90""" 4
+.el .IP "\f(CWc90\fR" 4
+.IX Item "c90"
+.PD 0
+.ie n .IP """c89""" 4
+.el .IP "\f(CWc89\fR" 4
+.IX Item "c89"
+.ie n .IP """iso9899:1990""" 4
+.el .IP "\f(CWiso9899:1990\fR" 4
+.IX Item "iso9899:1990"
+.PD
+The \s-1ISO\s0 C standard from 1990.  \fBc90\fR is the customary shorthand for
+this version of the standard.
+.Sp
+The \fB\-ansi\fR option is equivalent to \fB\-std=c90\fR.
+.ie n .IP """iso9899:199409""" 4
+.el .IP "\f(CWiso9899:199409\fR" 4
+.IX Item "iso9899:199409"
+The 1990 C standard, as amended in 1994.
+.ie n .IP """iso9899:1999""" 4
+.el .IP "\f(CWiso9899:1999\fR" 4
+.IX Item "iso9899:1999"
+.PD 0
+.ie n .IP """c99""" 4
+.el .IP "\f(CWc99\fR" 4
+.IX Item "c99"
+.ie n .IP """iso9899:199x""" 4
+.el .IP "\f(CWiso9899:199x\fR" 4
+.IX Item "iso9899:199x"
+.ie n .IP """c9x""" 4
+.el .IP "\f(CWc9x\fR" 4
+.IX Item "c9x"
+.PD
+The revised \s-1ISO\s0 C standard, published in December 1999.  Before
+publication, this was known as C9X.
+.ie n .IP """gnu90""" 4
+.el .IP "\f(CWgnu90\fR" 4
+.IX Item "gnu90"
+.PD 0
+.ie n .IP """gnu89""" 4
+.el .IP "\f(CWgnu89\fR" 4
+.IX Item "gnu89"
+.PD
+The 1990 C standard plus \s-1GNU\s0 extensions.  This is the default.
+.ie n .IP """gnu99""" 4
+.el .IP "\f(CWgnu99\fR" 4
+.IX Item "gnu99"
+.PD 0
+.ie n .IP """gnu9x""" 4
+.el .IP "\f(CWgnu9x\fR" 4
+.IX Item "gnu9x"
+.PD
+The 1999 C standard plus \s-1GNU\s0 extensions.
+.ie n .IP """c++98""" 4
+.el .IP "\f(CWc++98\fR" 4
+.IX Item "c++98"
+The 1998 \s-1ISO\s0 \*(C+ standard plus amendments.
+.ie n .IP """gnu++98""" 4
+.el .IP "\f(CWgnu++98\fR" 4
+.IX Item "gnu++98"
+The same as \fB\-std=c++98\fR plus \s-1GNU\s0 extensions.  This is the
+default for \*(C+ code.
+.RE
+.RS 4
+.RE
+.IP "\fB\-I\-\fR" 4
+.IX Item "-I-"
+Split the include path.  Any directories specified with \fB\-I\fR
+options before \fB\-I\-\fR are searched only for headers requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR.  If additional directories are
+specified with \fB\-I\fR options after the \fB\-I\-\fR, those
+directories are searched for all \fB#include\fR directives.
+.Sp
+In addition, \fB\-I\-\fR inhibits the use of the directory of the current
+file directory as the first search directory for \f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR.
+.Sp
+This option has been deprecated.
+.IP "\fB\-nostdinc\fR" 4
+.IX Item "-nostdinc"
+Do not search the standard system directories for header files.
+Only the directories you have specified with \fB\-I\fR options
+(and the directory of the current file, if appropriate) are searched.
+.IP "\fB\-nostdinc++\fR" 4
+.IX Item "-nostdinc++"
+Do not search for header files in the \*(C+\-specific standard directories,
+but do still search the other standard directories.  (This option is
+used when building the \*(C+ library.)
+.IP "\fB\-include\fR \fIfile\fR" 4
+.IX Item "-include file"
+Process \fIfile\fR as if \f(CW\*(C`#include "file"\*(C'\fR appeared as the first
+line of the primary source file.  However, the first directory searched
+for \fIfile\fR is the preprocessor's working directory \fIinstead of\fR
+the directory containing the main source file.  If not found there, it
+is searched for in the remainder of the \f(CW\*(C`#include "..."\*(C'\fR search
+chain as normal.
+.Sp
+If multiple \fB\-include\fR options are given, the files are included
+in the order they appear on the command line.
+.IP "\fB\-imacros\fR \fIfile\fR" 4
+.IX Item "-imacros file"
+Exactly like \fB\-include\fR, except that any output produced by
+scanning \fIfile\fR is thrown away.  Macros it defines remain defined.
+This allows you to acquire all the macros from a header without also
+processing its declarations.
+.Sp
+All files specified by \fB\-imacros\fR are processed before all files
+specified by \fB\-include\fR.
+.IP "\fB\-idirafter\fR \fIdir\fR" 4
+.IX Item "-idirafter dir"
+Search \fIdir\fR for header files, but do it \fIafter\fR all
+directories specified with \fB\-I\fR and the standard system directories
+have been exhausted.  \fIdir\fR is treated as a system include directory.
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iprefix\fR \fIprefix\fR" 4
+.IX Item "-iprefix prefix"
+Specify \fIprefix\fR as the prefix for subsequent \fB\-iwithprefix\fR
+options.  If the prefix represents a directory, you should include the
+final \fB/\fR.
+.IP "\fB\-iwithprefix\fR \fIdir\fR" 4
+.IX Item "-iwithprefix dir"
+.PD 0
+.IP "\fB\-iwithprefixbefore\fR \fIdir\fR" 4
+.IX Item "-iwithprefixbefore dir"
+.PD
+Append \fIdir\fR to the prefix specified previously with
+\&\fB\-iprefix\fR, and add the resulting directory to the include search
+path.  \fB\-iwithprefixbefore\fR puts it in the same place \fB\-I\fR
+would; \fB\-iwithprefix\fR puts it where \fB\-idirafter\fR would.
+.IP "\fB\-isysroot\fR \fIdir\fR" 4
+.IX Item "-isysroot dir"
+This option is like the \fB\-\-sysroot\fR option, but applies only to
+header files.  See the \fB\-\-sysroot\fR option for more information.
+.IP "\fB\-imultilib\fR \fIdir\fR" 4
+.IX Item "-imultilib dir"
+Use \fIdir\fR as a subdirectory of the directory containing
+target-specific \*(C+ headers.
+.IP "\fB\-isystem\fR \fIdir\fR" 4
+.IX Item "-isystem dir"
+Search \fIdir\fR for header files, after all directories specified by
+\&\fB\-I\fR but before the standard system directories.  Mark it
+as a system directory, so that it gets the same special treatment as
+is applied to the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-iquote\fR \fIdir\fR" 4
+.IX Item "-iquote dir"
+Search \fIdir\fR only for header files requested with
+\&\f(CW\*(C`#include\ "\f(CIfile\f(CW"\*(C'\fR; they are not searched for
+\&\f(CW\*(C`#include\ <\f(CIfile\f(CW>\*(C'\fR, before all directories specified by
+\&\fB\-I\fR and before the standard system directories.
+.Sp
+If \fIdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the sysroot prefix; see \fB\-\-sysroot\fR and \fB\-isysroot\fR.
+.IP "\fB\-fdirectives\-only\fR" 4
+.IX Item "-fdirectives-only"
+When preprocessing, handle directives, but do not expand macros.
+.Sp
+The option's behavior depends on the \fB\-E\fR and \fB\-fpreprocessed\fR
+options.
+.Sp
+With \fB\-E\fR, preprocessing is limited to the handling of directives
+such as \f(CW\*(C`#define\*(C'\fR, \f(CW\*(C`#ifdef\*(C'\fR, and \f(CW\*(C`#error\*(C'\fR.  Other
+preprocessor operations, such as macro expansion and trigraph
+conversion are not performed.  In addition, the \fB\-dD\fR option is
+implicitly enabled.
+.Sp
+With \fB\-fpreprocessed\fR, predefinition of command line and most
+builtin macros is disabled.  Macros such as \f(CW\*(C`_\|_LINE_\|_\*(C'\fR, which are
+contextually dependent, are handled normally.  This enables compilation of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.Sp
+With both \fB\-E\fR and \fB\-fpreprocessed\fR, the rules for
+\&\fB\-fpreprocessed\fR take precedence.  This enables full preprocessing of
+files previously preprocessed with \f(CW\*(C`\-E \-fdirectives\-only\*(C'\fR.
+.IP "\fB\-fdollars\-in\-identifiers\fR" 4
+.IX Item "-fdollars-in-identifiers"
+Accept \fB$\fR in identifiers.
+.IP "\fB\-fextended\-identifiers\fR" 4
+.IX Item "-fextended-identifiers"
+Accept universal character names in identifiers.  This option is
+experimental; in a future version of \s-1GCC\s0, it will be enabled by
+default for C99 and \*(C+.
+.IP "\fB\-fpreprocessed\fR" 4
+.IX Item "-fpreprocessed"
+Indicate to the preprocessor that the input file has already been
+preprocessed.  This suppresses things like macro expansion, trigraph
+conversion, escaped newline splicing, and processing of most directives.
+The preprocessor still recognizes and removes comments, so that you can
+pass a file preprocessed with \fB\-C\fR to the compiler without
+problems.  In this mode the integrated preprocessor is little more than
+a tokenizer for the front ends.
+.Sp
+\&\fB\-fpreprocessed\fR is implicit if the input file has one of the
+extensions \fB.i\fR, \fB.ii\fR or \fB.mi\fR.  These are the
+extensions that \s-1GCC\s0 uses for preprocessed files created by
+\&\fB\-save\-temps\fR.
+.IP "\fB\-ftabstop=\fR\fIwidth\fR" 4
+.IX Item "-ftabstop=width"
+Set the distance between tab stops.  This helps the preprocessor report
+correct column numbers in warnings or errors, even if tabs appear on the
+line.  If the value is less than 1 or greater than 100, the option is
+ignored.  The default is 8.
+.IP "\fB\-fexec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fexec-charset=charset"
+Set the execution character set, used for string and character
+constants.  The default is \s-1UTF\-8\s0.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fwide\-exec\-charset=\fR\fIcharset\fR" 4
+.IX Item "-fwide-exec-charset=charset"
+Set the wide execution character set, used for wide string and
+character constants.  The default is \s-1UTF\-32\s0 or \s-1UTF\-16\s0, whichever
+corresponds to the width of \f(CW\*(C`wchar_t\*(C'\fR.  As with
+\&\fB\-fexec\-charset\fR, \fIcharset\fR can be any encoding supported
+by the system's \f(CW\*(C`iconv\*(C'\fR library routine; however, you will have
+problems with encodings that do not fit exactly in \f(CW\*(C`wchar_t\*(C'\fR.
+.IP "\fB\-finput\-charset=\fR\fIcharset\fR" 4
+.IX Item "-finput-charset=charset"
+Set the input character set, used for translation from the character
+set of the input file to the source character set used by \s-1GCC\s0.  If the
+locale does not specify, or \s-1GCC\s0 cannot get this information from the
+locale, the default is \s-1UTF\-8\s0.  This can be overridden by either the locale
+or this command line option.  Currently the command line option takes
+precedence if there's a conflict.  \fIcharset\fR can be any encoding
+supported by the system's \f(CW\*(C`iconv\*(C'\fR library routine.
+.IP "\fB\-fworking\-directory\fR" 4
+.IX Item "-fworking-directory"
+Enable generation of linemarkers in the preprocessor output that will
+let the compiler know the current working directory at the time of
+preprocessing.  When this option is enabled, the preprocessor will
+emit, after the initial linemarker, a second linemarker with the
+current working directory followed by two slashes.  \s-1GCC\s0 will use this
+directory, when it's present in the preprocessed input, as the
+directory emitted as the current working directory in some debugging
+information formats.  This option is implicitly enabled if debugging
+information is enabled, but this can be inhibited with the negated
+form \fB\-fno\-working\-directory\fR.  If the \fB\-P\fR flag is
+present in the command line, this option has no effect, since no
+\&\f(CW\*(C`#line\*(C'\fR directives are emitted whatsoever.
+.IP "\fB\-fno\-show\-column\fR" 4
+.IX Item "-fno-show-column"
+Do not print column numbers in diagnostics.  This may be necessary if
+diagnostics are being scanned by a program that does not understand the
+column numbers, such as \fBdejagnu\fR.
+.IP "\fB\-A\fR \fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A predicate=answer"
+Make an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.  This form is preferred to the older form \fB\-A\fR
+\&\fIpredicate\fR\fB(\fR\fIanswer\fR\fB)\fR, which is still supported, because
+it does not use shell special characters.
+.IP "\fB\-A \-\fR\fIpredicate\fR\fB=\fR\fIanswer\fR" 4
+.IX Item "-A -predicate=answer"
+Cancel an assertion with the predicate \fIpredicate\fR and answer
+\&\fIanswer\fR.
+.IP "\fB\-dCHARS\fR" 4
+.IX Item "-dCHARS"
+\&\fI\s-1CHARS\s0\fR is a sequence of one or more of the following characters,
+and must not be preceded by a space.  Other characters are interpreted
+by the compiler proper, or reserved for future versions of \s-1GCC\s0, and so
+are silently ignored.  If you specify characters whose behavior
+conflicts, the result is undefined.
+.RS 4
+.IP "\fBM\fR" 4
+.IX Item "M"
+Instead of the normal output, generate a list of \fB#define\fR
+directives for all the macros defined during the execution of the
+preprocessor, including predefined macros.  This gives you a way of
+finding out what is predefined in your version of the preprocessor.
+Assuming you have no file \fIfoo.h\fR, the command
+.Sp
+.Vb 1
+\&        touch foo.h; cpp \-dM foo.h
+.Ve
+.Sp
+will show all the predefined macros.
+.Sp
+If you use \fB\-dM\fR without the \fB\-E\fR option, \fB\-dM\fR is
+interpreted as a synonym for \fB\-fdump\-rtl\-mach\fR.
+.IP "\fBD\fR" 4
+.IX Item "D"
+Like \fBM\fR except in two respects: it does \fInot\fR include the
+predefined macros, and it outputs \fIboth\fR the \fB#define\fR
+directives and the result of preprocessing.  Both kinds of output go to
+the standard output file.
+.IP "\fBN\fR" 4
+.IX Item "N"
+Like \fBD\fR, but emit only the macro names, not their expansions.
+.IP "\fBI\fR" 4
+.IX Item "I"
+Output \fB#include\fR directives in addition to the result of
+preprocessing.
+.IP "\fBU\fR" 4
+.IX Item "U"
+Like \fBD\fR except that only macros that are expanded, or whose
+definedness is tested in preprocessor directives, are output; the
+output is delayed until the use or test of the macro; and
+\&\fB#undef\fR directives are also output for macros tested but
+undefined at the time.
+.RE
+.RS 4
+.RE
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+Inhibit generation of linemarkers in the output from the preprocessor.
+This might be useful when running the preprocessor on something that is
+not C code, and will be sent to a program which might be confused by the
+linemarkers.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+Do not discard comments.  All comments are passed through to the output
+file, except for comments in processed directives, which are deleted
+along with the directive.
+.Sp
+You should be prepared for side effects when using \fB\-C\fR; it
+causes the preprocessor to treat comments as tokens in their own right.
+For example, comments appearing at the start of what would be a
+directive line have the effect of turning that line into an ordinary
+source line, since the first token on the line is no longer a \fB#\fR.
+.IP "\fB\-CC\fR" 4
+.IX Item "-CC"
+Do not discard comments, including during macro expansion.  This is
+like \fB\-C\fR, except that comments contained within macros are
+also passed through to the output file where the macro is expanded.
+.Sp
+In addition to the side-effects of the \fB\-C\fR option, the
+\&\fB\-CC\fR option causes all \*(C+\-style comments inside a macro
+to be converted to C\-style comments.  This is to prevent later use
+of that macro from inadvertently commenting out the remainder of
+the source line.
+.Sp
+The \fB\-CC\fR option is generally used to support lint comments.
+.IP "\fB\-traditional\-cpp\fR" 4
+.IX Item "-traditional-cpp"
+Try to imitate the behavior of old-fashioned C preprocessors, as
+opposed to \s-1ISO\s0 C preprocessors.
+.IP "\fB\-trigraphs\fR" 4
+.IX Item "-trigraphs"
+Process trigraph sequences.
+.IP "\fB\-remap\fR" 4
+.IX Item "-remap"
+Enable special code to work around file systems which only permit very
+short file names, such as MS-DOS.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD 0
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+.PD
+Print text describing all the command line options instead of
+preprocessing anything.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Verbose mode.  Print out \s-1GNU\s0 \s-1CPP\s0's version number at the beginning of
+execution, and report the final form of the include path.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+Print the name of each header file used, in addition to other normal
+activities.  Each name is indented to show how deep in the
+\&\fB#include\fR stack it is.  Precompiled header files are also
+printed, even if they are found to be invalid; an invalid precompiled
+header file is printed with \fB...x\fR and a valid one with \fB...!\fR .
+.IP "\fB\-version\fR" 4
+.IX Item "-version"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print out \s-1GNU\s0 \s-1CPP\s0's version number.  With one dash, proceed to
+preprocess as normal.  With two dashes, exit immediately.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+This section describes the environment variables that affect how \s-1CPP\s0
+operates.  You can use them to specify directories or prefixes to use
+when searching for include files, or to control dependency output.
+.PP
+Note that you can also specify places to search using options such as
+\&\fB\-I\fR, and control dependency output with options like
+\&\fB\-M\fR.  These take precedence over
+environment variables, which in turn take precedence over the
+configuration of \s-1GCC\s0.
+.IP "\fB\s-1CPATH\s0\fR" 4
+.IX Item "CPATH"
+.PD 0
+.IP "\fBC_INCLUDE_PATH\fR" 4
+.IX Item "C_INCLUDE_PATH"
+.IP "\fB\s-1CPLUS_INCLUDE_PATH\s0\fR" 4
+.IX Item "CPLUS_INCLUDE_PATH"
+.IP "\fB\s-1OBJC_INCLUDE_PATH\s0\fR" 4
+.IX Item "OBJC_INCLUDE_PATH"
+.PD
+Each variable's value is a list of directories separated by a special
+character, much like \fB\s-1PATH\s0\fR, in which to look for header files.
+The special character, \f(CW\*(C`PATH_SEPARATOR\*(C'\fR, is target-dependent and
+determined at \s-1GCC\s0 build time.  For Microsoft Windows-based targets it is a
+semicolon, and for almost all other targets it is a colon.
+.Sp
+\&\fB\s-1CPATH\s0\fR specifies a list of directories to be searched as if
+specified with \fB\-I\fR, but after any paths given with \fB\-I\fR
+options on the command line.  This environment variable is used
+regardless of which language is being preprocessed.
+.Sp
+The remaining environment variables apply only when preprocessing the
+particular language indicated.  Each specifies a list of directories
+to be searched as if specified with \fB\-isystem\fR, but after any
+paths given with \fB\-isystem\fR options on the command line.
+.Sp
+In all these variables, an empty element instructs the compiler to
+search its current working directory.  Empty elements can appear at the
+beginning or end of a path.  For instance, if the value of
+\&\fB\s-1CPATH\s0\fR is \f(CW\*(C`:/special/include\*(C'\fR, that has the same
+effect as \fB\-I.\ \-I/special/include\fR.
+.IP "\fB\s-1DEPENDENCIES_OUTPUT\s0\fR" 4
+.IX Item "DEPENDENCIES_OUTPUT"
+If this variable is set, its value specifies how to output
+dependencies for Make based on the non-system header files processed
+by the compiler.  System header files are ignored in the dependency
+output.
+.Sp
+The value of \fB\s-1DEPENDENCIES_OUTPUT\s0\fR can be just a file name, in
+which case the Make rules are written to that file, guessing the target
+name from the source file name.  Or the value can have the form
+\&\fIfile\fR\fB \fR\fItarget\fR, in which case the rules are written to
+file \fIfile\fR using \fItarget\fR as the target name.
+.Sp
+In other words, this environment variable is equivalent to combining
+the options \fB\-MM\fR and \fB\-MF\fR,
+with an optional \fB\-MT\fR switch too.
+.IP "\fB\s-1SUNPRO_DEPENDENCIES\s0\fR" 4
+.IX Item "SUNPRO_DEPENDENCIES"
+This variable is the same as \fB\s-1DEPENDENCIES_OUTPUT\s0\fR (see above),
+except that system header files are not ignored, so it implies
+\&\fB\-M\fR rather than \fB\-MM\fR.  However, the dependence on the
+main input file is omitted.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7),
+\&\fIgcc\fR\|(1), \fIas\fR\|(1), \fIld\fR\|(1), and the Info entries for \fIcpp\fR, \fIgcc\fR, and
+\&\fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1987, 1989, 1991, 1992, 1993, 1994, 1995, 1996,
+1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
+2008, 2009, 2010
+Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation.  A copy of
+the license is included in the
+man page \fIgfdl\fR\|(7).
+This manual contains no Invariant Sections.  The Front-Cover Texts are
+(a) (see below), and the Back-Cover Texts are (b) (see below).
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-dlltool.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-dlltool.1
new file mode 100644
index 00000000..5d9dd275
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-dlltool.1
@@ -0,0 +1,529 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
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+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
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+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
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+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "DLLTOOL 1"
+.TH DLLTOOL 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+dlltool \- Create files needed to build and use DLLs.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+dlltool [\fB\-d\fR|\fB\-\-input\-def\fR \fIdef-file-name\fR]
+        [\fB\-b\fR|\fB\-\-base\-file\fR \fIbase-file-name\fR]
+        [\fB\-e\fR|\fB\-\-output\-exp\fR \fIexports-file-name\fR]
+        [\fB\-z\fR|\fB\-\-output\-def\fR \fIdef-file-name\fR]
+        [\fB\-l\fR|\fB\-\-output\-lib\fR \fIlibrary-file-name\fR]
+        [\fB\-y\fR|\fB\-\-output\-delaylib\fR \fIlibrary-file-name\fR]
+        [\fB\-\-export\-all\-symbols\fR] [\fB\-\-no\-export\-all\-symbols\fR]
+        [\fB\-\-exclude\-symbols\fR \fIlist\fR]
+        [\fB\-\-no\-default\-excludes\fR]
+        [\fB\-S\fR|\fB\-\-as\fR \fIpath-to-assembler\fR] [\fB\-f\fR|\fB\-\-as\-flags\fR \fIoptions\fR]
+        [\fB\-D\fR|\fB\-\-dllname\fR \fIname\fR] [\fB\-m\fR|\fB\-\-machine\fR \fImachine\fR]
+        [\fB\-a\fR|\fB\-\-add\-indirect\fR]
+        [\fB\-U\fR|\fB\-\-add\-underscore\fR] [\fB\-\-add\-stdcall\-underscore\fR]
+        [\fB\-k\fR|\fB\-\-kill\-at\fR] [\fB\-A\fR|\fB\-\-add\-stdcall\-alias\fR]
+        [\fB\-p\fR|\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR]
+        [\fB\-x\fR|\fB\-\-no\-idata4\fR] [\fB\-c\fR|\fB\-\-no\-idata5\fR]
+        [\fB\-\-use\-nul\-prefixed\-import\-tables\fR]
+        [\fB\-I\fR|\fB\-\-identify\fR \fIlibrary-file-name\fR] [\fB\-\-identify\-strict\fR]
+        [\fB\-i\fR|\fB\-\-interwork\fR]
+        [\fB\-n\fR|\fB\-\-nodelete\fR] [\fB\-t\fR|\fB\-\-temp\-prefix\fR \fIprefix\fR]
+        [\fB\-v\fR|\fB\-\-verbose\fR]
+        [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+        [object\-file ...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBdlltool\fR reads its inputs, which can come from the \fB\-d\fR and
+\&\fB\-b\fR options as well as object files specified on the command
+line.  It then processes these inputs and if the \fB\-e\fR option has
+been specified it creates a exports file.  If the \fB\-l\fR option
+has been specified it creates a library file and if the \fB\-z\fR option
+has been specified it creates a def file.  Any or all of the \fB\-e\fR,
+\&\fB\-l\fR and \fB\-z\fR options can be present in one invocation of
+dlltool.
+.PP
+When creating a \s-1DLL\s0, along with the source for the \s-1DLL\s0, it is necessary
+to have three other files.  \fBdlltool\fR can help with the creation of
+these files.
+.PP
+The first file is a \fI.def\fR file which specifies which functions are
+exported from the \s-1DLL\s0, which functions the \s-1DLL\s0 imports, and so on.  This
+is a text file and can be created by hand, or \fBdlltool\fR can be used
+to create it using the \fB\-z\fR option.  In this case \fBdlltool\fR
+will scan the object files specified on its command line looking for
+those functions which have been specially marked as being exported and
+put entries for them in the \fI.def\fR file it creates.
+.PP
+In order to mark a function as being exported from a \s-1DLL\s0, it needs to
+have an \fB\-export:<name_of_function>\fR entry in the \fB.drectve\fR
+section of the object file.  This can be done in C by using the
+\&\fIasm()\fR operator:
+.PP
+.Vb 2
+\&          asm (".section .drectve");
+\&          asm (".ascii \e"\-export:my_func\e"");
+\&        
+\&          int my_func (void) { ... }
+.Ve
+.PP
+The second file needed for \s-1DLL\s0 creation is an exports file.  This file
+is linked with the object files that make up the body of the \s-1DLL\s0 and it
+handles the interface between the \s-1DLL\s0 and the outside world.  This is a
+binary file and it can be created by giving the \fB\-e\fR option to
+\&\fBdlltool\fR when it is creating or reading in a \fI.def\fR file.
+.PP
+The third file needed for \s-1DLL\s0 creation is the library file that programs
+will link with in order to access the functions in the \s-1DLL\s0 (an `import
+library').  This file can be created by giving the \fB\-l\fR option to
+dlltool when it is creating or reading in a \fI.def\fR file.
+.PP
+If the \fB\-y\fR option is specified, dlltool generates a delay-import
+library that can be used instead of the normal import library to allow
+a program to link to the dll only as soon as an imported function is
+called for the first time. The resulting executable will need to be
+linked to the static delayimp library containing _\|\fI_delayLoadHelper2()\fR,
+which in turn will import LoadLibraryA and GetProcAddress from kernel32.
+.PP
+\&\fBdlltool\fR builds the library file by hand, but it builds the
+exports file by creating temporary files containing assembler statements
+and then assembling these.  The \fB\-S\fR command line option can be
+used to specify the path to the assembler that dlltool will use,
+and the \fB\-f\fR option can be used to pass specific flags to that
+assembler.  The \fB\-n\fR can be used to prevent dlltool from deleting
+these temporary assembler files when it is done, and if \fB\-n\fR is
+specified twice then this will prevent dlltool from deleting the
+temporary object files it used to build the library.
+.PP
+Here is an example of creating a \s-1DLL\s0 from a source file \fBdll.c\fR and
+also creating a program (from an object file called \fBprogram.o\fR)
+that uses that \s-1DLL:\s0
+.PP
+.Vb 4
+\&          gcc \-c dll.c
+\&          dlltool \-e exports.o \-l dll.lib dll.o
+\&          gcc dll.o exports.o \-o dll.dll
+\&          gcc program.o dll.lib \-o program
+.Ve
+.PP
+\&\fBdlltool\fR may also be used to query an existing import library
+to determine the name of the \s-1DLL\s0 to which it is associated.  See the 
+description of the \fB\-I\fR or \fB\-\-identify\fR option.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-d\fR \fIfilename\fR" 4
+.IX Item "-d filename"
+.PD 0
+.IP "\fB\-\-input\-def\fR \fIfilename\fR" 4
+.IX Item "--input-def filename"
+.PD
+Specifies the name of a \fI.def\fR file to be read in and processed.
+.IP "\fB\-b\fR \fIfilename\fR" 4
+.IX Item "-b filename"
+.PD 0
+.IP "\fB\-\-base\-file\fR \fIfilename\fR" 4
+.IX Item "--base-file filename"
+.PD
+Specifies the name of a base file to be read in and processed.  The
+contents of this file will be added to the relocation section in the
+exports file generated by dlltool.
+.IP "\fB\-e\fR \fIfilename\fR" 4
+.IX Item "-e filename"
+.PD 0
+.IP "\fB\-\-output\-exp\fR \fIfilename\fR" 4
+.IX Item "--output-exp filename"
+.PD
+Specifies the name of the export file to be created by dlltool.
+.IP "\fB\-z\fR \fIfilename\fR" 4
+.IX Item "-z filename"
+.PD 0
+.IP "\fB\-\-output\-def\fR \fIfilename\fR" 4
+.IX Item "--output-def filename"
+.PD
+Specifies the name of the \fI.def\fR file to be created by dlltool.
+.IP "\fB\-l\fR \fIfilename\fR" 4
+.IX Item "-l filename"
+.PD 0
+.IP "\fB\-\-output\-lib\fR \fIfilename\fR" 4
+.IX Item "--output-lib filename"
+.PD
+Specifies the name of the library file to be created by dlltool.
+.IP "\fB\-y\fR \fIfilename\fR" 4
+.IX Item "-y filename"
+.PD 0
+.IP "\fB\-\-output\-delaylib\fR \fIfilename\fR" 4
+.IX Item "--output-delaylib filename"
+.PD
+Specifies the name of the delay-import library file to be created by dlltool.
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+Treat all global and weak defined symbols found in the input object
+files as symbols to be exported.  There is a small list of symbols which
+are not exported by default; see the \fB\-\-no\-default\-excludes\fR
+option.  You may add to the list of symbols to not export by using the
+\&\fB\-\-exclude\-symbols\fR option.
+.IP "\fB\-\-no\-export\-all\-symbols\fR" 4
+.IX Item "--no-export-all-symbols"
+Only export symbols explicitly listed in an input \fI.def\fR file or in
+\&\fB.drectve\fR sections in the input object files.  This is the default
+behaviour.  The \fB.drectve\fR sections are created by \fBdllexport\fR
+attributes in the source code.
+.IP "\fB\-\-exclude\-symbols\fR \fIlist\fR" 4
+.IX Item "--exclude-symbols list"
+Do not export the symbols in \fIlist\fR.  This is a list of symbol names
+separated by comma or colon characters.  The symbol names should not
+contain a leading underscore.  This is only meaningful when
+\&\fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-\-no\-default\-excludes\fR" 4
+.IX Item "--no-default-excludes"
+When \fB\-\-export\-all\-symbols\fR is used, it will by default avoid
+exporting certain special symbols.  The current list of symbols to avoid
+exporting is \fBDllMain@12\fR, \fBDllEntryPoint@0\fR,
+\&\fBimpure_ptr\fR.  You may use the \fB\-\-no\-default\-excludes\fR option
+to go ahead and export these special symbols.  This is only meaningful
+when \fB\-\-export\-all\-symbols\fR is used.
+.IP "\fB\-S\fR \fIpath\fR" 4
+.IX Item "-S path"
+.PD 0
+.IP "\fB\-\-as\fR \fIpath\fR" 4
+.IX Item "--as path"
+.PD
+Specifies the path, including the filename, of the assembler to be used
+to create the exports file.
+.IP "\fB\-f\fR \fIoptions\fR" 4
+.IX Item "-f options"
+.PD 0
+.IP "\fB\-\-as\-flags\fR \fIoptions\fR" 4
+.IX Item "--as-flags options"
+.PD
+Specifies any specific command line options to be passed to the
+assembler when building the exports file.  This option will work even if
+the \fB\-S\fR option is not used.  This option only takes one argument,
+and if it occurs more than once on the command line, then later
+occurrences will override earlier occurrences.  So if it is necessary to
+pass multiple options to the assembler they should be enclosed in
+double quotes.
+.IP "\fB\-D\fR \fIname\fR" 4
+.IX Item "-D name"
+.PD 0
+.IP "\fB\-\-dll\-name\fR \fIname\fR" 4
+.IX Item "--dll-name name"
+.PD
+Specifies the name to be stored in the \fI.def\fR file as the name of
+the \s-1DLL\s0 when the \fB\-e\fR option is used.  If this option is not
+present, then the filename given to the \fB\-e\fR option will be
+used as the name of the \s-1DLL\s0.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-machine\fR \fImachine\fR" 4
+.IX Item "-machine machine"
+.PD
+Specifies the type of machine for which the library file should be
+built.  \fBdlltool\fR has a built in default type, depending upon how
+it was created, but this option can be used to override that.  This is
+normally only useful when creating DLLs for an \s-1ARM\s0 processor, when the
+contents of the \s-1DLL\s0 are actually encode using Thumb instructions.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-add\-indirect\fR" 4
+.IX Item "--add-indirect"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add a section which allows the exported functions to be
+referenced without using the import library.  Whatever the hell that
+means!
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-add\-underscore\fR" 4
+.IX Item "--add-underscore"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of \fIall\fR exported symbols.
+.IP "\fB\-\-add\-stdcall\-underscore\fR" 4
+.IX Item "--add-stdcall-underscore"
+Specifies that when \fBdlltool\fR is creating the exports file it
+should prepend an underscore to the names of exported \fIstdcall\fR
+functions. Variable names and non-stdcall function names are not modified.
+This option is useful when creating GNU-compatible import libs for third
+party DLLs that were built with MS-Windows tools.
+.IP "\fB\-k\fR" 4
+.IX Item "-k"
+.PD 0
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should not append the string \fB@ <number>\fR.  These numbers are
+called ordinal numbers and they represent another way of accessing the
+function in a \s-1DLL\s0, other than by name.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports file it
+should add aliases for stdcall symbols without \fB@ <number>\fR
+in addition to the symbols with \fB@ <number>\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-ext\-prefix\-alias\fR \fIprefix\fR" 4
+.IX Item "--ext-prefix-alias prefix"
+.PD
+Causes \fBdlltool\fR to create external aliases for all \s-1DLL\s0
+imports with the specified prefix.  The aliases are created for both
+external and import symbols with no leading underscore.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-no\-idata4\fR" 4
+.IX Item "--no-idata4"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata4\*(C'\fR section.  This is for compatibility
+with certain operating systems.
+.IP "\fB\-\-use\-nul\-prefixed\-import\-tables\fR" 4
+.IX Item "--use-nul-prefixed-import-tables"
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should prefix the \f(CW\*(C`.idata4\*(C'\fR and \f(CW\*(C`.idata5\*(C'\fR by zero an
+element. This emulates old gnu import library generation of
+\&\f(CW\*(C`dlltool\*(C'\fR. By default this option is turned off.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-no\-idata5\fR" 4
+.IX Item "--no-idata5"
+.PD
+Specifies that when \fBdlltool\fR is creating the exports and library
+files it should omit the \f(CW\*(C`.idata5\*(C'\fR section.  This is for compatibility
+with certain operating systems.
+.IP "\fB\-I\fR \fIfilename\fR" 4
+.IX Item "-I filename"
+.PD 0
+.IP "\fB\-\-identify\fR \fIfilename\fR" 4
+.IX Item "--identify filename"
+.PD
+Specifies that \fBdlltool\fR should inspect the import library
+indicated by \fIfilename\fR and report, on \f(CW\*(C`stdout\*(C'\fR, the name(s)
+of the associated \s-1DLL\s0(s).  This can be performed in addition to any
+other operations indicated by the other options and arguments.
+\&\fBdlltool\fR fails if the import library does not exist or is not
+actually an import library. See also \fB\-\-identify\-strict\fR.
+.IP "\fB\-\-identify\-strict\fR" 4
+.IX Item "--identify-strict"
+Modifies the behavior of the \fB\-\-identify\fR option, such
+that an error is reported if \fIfilename\fR is associated with
+more than one \s-1DLL\s0.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-interwork\fR" 4
+.IX Item "--interwork"
+.PD
+Specifies that \fBdlltool\fR should mark the objects in the library
+file and exports file that it produces as supporting interworking
+between \s-1ARM\s0 and Thumb code.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nodelete\fR" 4
+.IX Item "--nodelete"
+.PD
+Makes \fBdlltool\fR preserve the temporary assembler files it used to
+create the exports file.  If this option is repeated then dlltool will
+also preserve the temporary object files it uses to create the library
+file.
+.IP "\fB\-t\fR \fIprefix\fR" 4
+.IX Item "-t prefix"
+.PD 0
+.IP "\fB\-\-temp\-prefix\fR \fIprefix\fR" 4
+.IX Item "--temp-prefix prefix"
+.PD
+Makes \fBdlltool\fR use \fIprefix\fR when constructing the names of
+temporary assembler and object files.  By default, the temp file prefix
+is generated from the pid.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Make dlltool describe what it is doing.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Displays dlltool's version number and then exits.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+The Info pages for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcc.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcc.1
new file mode 100644
index 00000000..99ef1862
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcc.1
@@ -0,0 +1,132 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCC 1"
+.TH GCC 1 "2013-10-22" "gcc-4.5.1-tc32-1.3" "GNU"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcov.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcov.1
new file mode 100644
index 00000000..f995c9e1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gcov.1
@@ -0,0 +1,628 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.if n .na
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GCOV 1"
+.TH GCOV 1 "2013-10-22" "gcc-4.5.1-tc32-1.3" "GNU"
+.SH "NAME"
+gcov \- coverage testing tool
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gcov [\fB\-v\fR|\fB\-\-version\fR] [\fB\-h\fR|\fB\-\-help\fR]
+     [\fB\-a\fR|\fB\-\-all\-blocks\fR]
+     [\fB\-b\fR|\fB\-\-branch\-probabilities\fR]
+     [\fB\-c\fR|\fB\-\-branch\-counts\fR]
+     [\fB\-n\fR|\fB\-\-no\-output\fR]
+     [\fB\-l\fR|\fB\-\-long\-file\-names\fR]
+     [\fB\-p\fR|\fB\-\-preserve\-paths\fR]
+     [\fB\-f\fR|\fB\-\-function\-summaries\fR]
+     [\fB\-o\fR|\fB\-\-object\-directory\fR \fIdirectory|file\fR] \fIsourcefiles\fR
+     [\fB\-u\fR|\fB\-\-unconditional\-branches\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBgcov\fR is a test coverage program.  Use it in concert with \s-1GCC\s0
+to analyze your programs to help create more efficient, faster running
+code and to discover untested parts of your program.  You can use
+\&\fBgcov\fR as a profiling tool to help discover where your
+optimization efforts will best affect your code.  You can also use
+\&\fBgcov\fR along with the other profiling tool, \fBgprof\fR, to
+assess which parts of your code use the greatest amount of computing
+time.
+.PP
+Profiling tools help you analyze your code's performance.  Using a
+profiler such as \fBgcov\fR or \fBgprof\fR, you can find out some
+basic performance statistics, such as:
+.IP "\(bu" 4
+how often each line of code executes
+.IP "\(bu" 4
+what lines of code are actually executed
+.IP "\(bu" 4
+how much computing time each section of code uses
+.PP
+Once you know these things about how your code works when compiled, you
+can look at each module to see which modules should be optimized.
+\&\fBgcov\fR helps you determine where to work on optimization.
+.PP
+Software developers also use coverage testing in concert with
+testsuites, to make sure software is actually good enough for a release.
+Testsuites can verify that a program works as expected; a coverage
+program tests to see how much of the program is exercised by the
+testsuite.  Developers can then determine what kinds of test cases need
+to be added to the testsuites to create both better testing and a better
+final product.
+.PP
+You should compile your code without optimization if you plan to use
+\&\fBgcov\fR because the optimization, by combining some lines of code
+into one function, may not give you as much information as you need to
+look for `hot spots' where the code is using a great deal of computer
+time.  Likewise, because \fBgcov\fR accumulates statistics by line (at
+the lowest resolution), it works best with a programming style that
+places only one statement on each line.  If you use complicated macros
+that expand to loops or to other control structures, the statistics are
+less helpful\-\-\-they only report on the line where the macro call
+appears.  If your complex macros behave like functions, you can replace
+them with inline functions to solve this problem.
+.PP
+\&\fBgcov\fR creates a logfile called \fI\fIsourcefile\fI.gcov\fR which
+indicates how many times each line of a source file \fI\fIsourcefile\fI.c\fR
+has executed.  You can use these logfiles along with \fBgprof\fR to aid
+in fine-tuning the performance of your programs.  \fBgprof\fR gives
+timing information you can use along with the information you get from
+\&\fBgcov\fR.
+.PP
+\&\fBgcov\fR works only on code compiled with \s-1GCC\s0.  It is not
+compatible with any other profiling or test coverage mechanism.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display help about using \fBgcov\fR (on the standard output), and
+exit without doing any further processing.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the \fBgcov\fR version number (on the standard output),
+and exit without doing any further processing.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\-blocks\fR" 4
+.IX Item "--all-blocks"
+.PD
+Write individual execution counts for every basic block.  Normally gcov
+outputs execution counts only for the main blocks of a line.  With this
+option you can determine if blocks within a single line are not being
+executed.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-branch\-probabilities\fR" 4
+.IX Item "--branch-probabilities"
+.PD
+Write branch frequencies to the output file, and write branch summary
+info to the standard output.  This option allows you to see how often
+each branch in your program was taken.  Unconditional branches will not
+be shown, unless the \fB\-u\fR option is given.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-branch\-counts\fR" 4
+.IX Item "--branch-counts"
+.PD
+Write branch frequencies as the number of branches taken, rather than
+the percentage of branches taken.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-no\-output\fR" 4
+.IX Item "--no-output"
+.PD
+Do not create the \fBgcov\fR output file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-long\-file\-names\fR" 4
+.IX Item "--long-file-names"
+.PD
+Create long file names for included source files.  For example, if the
+header file \fIx.h\fR contains code, and was included in the file
+\&\fIa.c\fR, then running \fBgcov\fR on the file \fIa.c\fR will produce
+an output file called \fIa.c##x.h.gcov\fR instead of \fIx.h.gcov\fR.
+This can be useful if \fIx.h\fR is included in multiple source
+files.  If you use the \fB\-p\fR option, both the including and
+included file names will be complete path names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-paths\fR" 4
+.IX Item "--preserve-paths"
+.PD
+Preserve complete path information in the names of generated
+\&\fI.gcov\fR files.  Without this option, just the filename component is
+used.  With this option, all directories are used, with \fB/\fR characters
+translated to \fB#\fR characters, \fI.\fR directory components
+removed and \fI..\fR
+components renamed to \fB^\fR.  This is useful if sourcefiles are in several
+different directories.  It also affects the \fB\-l\fR option.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-function\-summaries\fR" 4
+.IX Item "--function-summaries"
+.PD
+Output summaries for each function in addition to the file level summary.
+.IP "\fB\-o\fR \fIdirectory|file\fR" 4
+.IX Item "-o directory|file"
+.PD 0
+.IP "\fB\-\-object\-directory\fR \fIdirectory\fR" 4
+.IX Item "--object-directory directory"
+.IP "\fB\-\-object\-file\fR \fIfile\fR" 4
+.IX Item "--object-file file"
+.PD
+Specify either the directory containing the gcov data files, or the
+object path name.  The \fI.gcno\fR, and
+\&\fI.gcda\fR data files are searched for using this option.  If a directory
+is specified, the data files are in that directory and named after the
+source file name, without its extension.  If a file is specified here,
+the data files are named after that file, without its extension.  If this
+option is not supplied, it defaults to the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unconditional\-branches\fR" 4
+.IX Item "--unconditional-branches"
+.PD
+When branch probabilities are given, include those of unconditional branches.
+Unconditional branches are normally not interesting.
+.PP
+\&\fBgcov\fR should be run with the current directory the same as that
+when you invoked the compiler.  Otherwise it will not be able to locate
+the source files.  \fBgcov\fR produces files called
+\&\fI\fImangledname\fI.gcov\fR in the current directory.  These contain
+the coverage information of the source file they correspond to.
+One \fI.gcov\fR file is produced for each source file containing code,
+which was compiled to produce the data files.  The \fImangledname\fR part
+of the output file name is usually simply the source file name, but can
+be something more complicated if the \fB\-l\fR or \fB\-p\fR options are
+given.  Refer to those options for details.
+.PP
+The \fI.gcov\fR files contain the \fB:\fR separated fields along with
+program source code.  The format is
+.PP
+.Vb 1
+\&        <execution_count>:<line_number>:<source line text>
+.Ve
+.PP
+Additional block information may succeed each line, when requested by
+command line option.  The \fIexecution_count\fR is \fB\-\fR for lines
+containing no code and \fB#####\fR for lines which were never executed.
+Some lines of information at the start have \fIline_number\fR of zero.
+.PP
+The preamble lines are of the form
+.PP
+.Vb 1
+\&        -:0:<tag>:<value>
+.Ve
+.PP
+The ordering and number of these preamble lines will be augmented as
+\&\fBgcov\fR development progresses \-\-\- do not rely on them remaining
+unchanged.  Use \fItag\fR to locate a particular preamble line.
+.PP
+The additional block information is of the form
+.PP
+.Vb 1
+\&        <tag> <information>
+.Ve
+.PP
+The \fIinformation\fR is human readable, but designed to be simple
+enough for machine parsing too.
+.PP
+When printing percentages, 0% and 100% are only printed when the values
+are \fIexactly\fR 0% and 100% respectively.  Other values which would
+conventionally be rounded to 0% or 100% are instead printed as the
+nearest non-boundary value.
+.PP
+When using \fBgcov\fR, you must first compile your program with two
+special \s-1GCC\s0 options: \fB\-fprofile\-arcs \-ftest\-coverage\fR.
+This tells the compiler to generate additional information needed by
+gcov (basically a flow graph of the program) and also includes
+additional code in the object files for generating the extra profiling
+information needed by gcov.  These additional files are placed in the
+directory where the object file is located.
+.PP
+Running the program will cause profile output to be generated.  For each
+source file compiled with \fB\-fprofile\-arcs\fR, an accompanying
+\&\fI.gcda\fR file will be placed in the object file directory.
+.PP
+Running \fBgcov\fR with your program's source file names as arguments
+will now produce a listing of the code along with frequency of execution
+for each line.  For example, if your program is called \fItmp.c\fR, this
+is what you see when you use the basic \fBgcov\fR facility:
+.PP
+.Vb 5
+\&        $ gcc -fprofile-arcs -ftest-coverage tmp.c
+\&        $ a.out
+\&        $ gcov tmp.c
+\&        90.00% of 10 source lines executed in file tmp.c
+\&        Creating tmp.c.gcov.
+.Ve
+.PP
+The file \fItmp.c.gcov\fR contains output from \fBgcov\fR.
+Here is a sample:
+.PP
+.Vb 22
+\&                -:    0:Source:tmp.c
+\&                -:    0:Graph:tmp.gcno
+\&                -:    0:Data:tmp.gcda
+\&                -:    0:Runs:1
+\&                -:    0:Programs:1
+\&                -:    1:#include <stdio.h>
+\&                -:    2:
+\&                -:    3:int main (void)
+\&                1:    4:{
+\&                1:    5:  int i, total;
+\&                -:    6:
+\&                1:    7:  total = 0;
+\&                -:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&               10:   10:    total += i;
+\&                -:   11:
+\&                1:   12:  if (total != 45)
+\&            #####:   13:    printf ("Failure\en");
+\&                -:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&                1:   16:  return 0;
+\&                -:   17:}
+.Ve
+.PP
+When you use the \fB\-a\fR option, you will get individual block
+counts, and the output looks like this:
+.PP
+.Vb 29
+\&                -:    0:Source:tmp.c
+\&                -:    0:Graph:tmp.gcno
+\&                -:    0:Data:tmp.gcda
+\&                -:    0:Runs:1
+\&                -:    0:Programs:1
+\&                -:    1:#include <stdio.h>
+\&                -:    2:
+\&                -:    3:int main (void)
+\&                1:    4:{
+\&                1:    4-block  0
+\&                1:    5:  int i, total;
+\&                -:    6:
+\&                1:    7:  total = 0;
+\&                -:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&               11:    9-block  0
+\&               10:   10:    total += i;
+\&               10:   10-block  0
+\&                -:   11:
+\&                1:   12:  if (total != 45)
+\&                1:   12-block  0
+\&            #####:   13:    printf ("Failure\en");
+\&            $$$$$:   13-block  0
+\&                -:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&                1:   15-block  0
+\&                1:   16:  return 0;
+\&                1:   16-block  0
+\&                -:   17:}
+.Ve
+.PP
+In this mode, each basic block is only shown on one line \*(-- the last
+line of the block.  A multi-line block will only contribute to the
+execution count of that last line, and other lines will not be shown
+to contain code, unless previous blocks end on those lines.
+The total execution count of a line is shown and subsequent lines show
+the execution counts for individual blocks that end on that line.  After each
+block, the branch and call counts of the block will be shown, if the
+\&\fB\-b\fR option is given.
+.PP
+Because of the way \s-1GCC\s0 instruments calls, a call count can be shown
+after a line with no individual blocks.
+As you can see, line 13 contains a basic block that was not executed.
+.PP
+When you use the \fB\-b\fR option, your output looks like this:
+.PP
+.Vb 6
+\&        $ gcov -b tmp.c
+\&        90.00% of 10 source lines executed in file tmp.c
+\&        80.00% of 5 branches executed in file tmp.c
+\&        80.00% of 5 branches taken at least once in file tmp.c
+\&        50.00% of 2 calls executed in file tmp.c
+\&        Creating tmp.c.gcov.
+.Ve
+.PP
+Here is a sample of a resulting \fItmp.c.gcov\fR file:
+.PP
+.Vb 29
+\&                -:    0:Source:tmp.c
+\&                -:    0:Graph:tmp.gcno
+\&                -:    0:Data:tmp.gcda
+\&                -:    0:Runs:1
+\&                -:    0:Programs:1
+\&                -:    1:#include <stdio.h>
+\&                -:    2:
+\&                -:    3:int main (void)
+\&        function main called 1 returned 1 blocks executed 75%
+\&                1:    4:{
+\&                1:    5:  int i, total;
+\&                -:    6:
+\&                1:    7:  total = 0;
+\&                -:    8:
+\&               11:    9:  for (i = 0; i < 10; i++)
+\&        branch  0 taken 91% (fallthrough)
+\&        branch  1 taken 9%
+\&               10:   10:    total += i;
+\&                -:   11:
+\&                1:   12:  if (total != 45)
+\&        branch  0 taken 0% (fallthrough)
+\&        branch  1 taken 100%
+\&            #####:   13:    printf ("Failure\en");
+\&        call    0 never executed
+\&                -:   14:  else
+\&                1:   15:    printf ("Success\en");
+\&        call    0 called 1 returned 100%
+\&                1:   16:  return 0;
+\&                -:   17:}
+.Ve
+.PP
+For each function, a line is printed showing how many times the function
+is called, how many times it returns and what percentage of the
+function's blocks were executed.
+.PP
+For each basic block, a line is printed after the last line of the basic
+block describing the branch or call that ends the basic block.  There can
+be multiple branches and calls listed for a single source line if there
+are multiple basic blocks that end on that line.  In this case, the
+branches and calls are each given a number.  There is no simple way to map
+these branches and calls back to source constructs.  In general, though,
+the lowest numbered branch or call will correspond to the leftmost construct
+on the source line.
+.PP
+For a branch, if it was executed at least once, then a percentage
+indicating the number of times the branch was taken divided by the
+number of times the branch was executed will be printed.  Otherwise, the
+message \*(L"never executed\*(R" is printed.
+.PP
+For a call, if it was executed at least once, then a percentage
+indicating the number of times the call returned divided by the number
+of times the call was executed will be printed.  This will usually be
+100%, but may be less for functions that call \f(CW\*(C`exit\*(C'\fR or \f(CW\*(C`longjmp\*(C'\fR,
+and thus may not return every time they are called.
+.PP
+The execution counts are cumulative.  If the example program were
+executed again without removing the \fI.gcda\fR file, the count for the
+number of times each line in the source was executed would be added to
+the results of the previous run(s).  This is potentially useful in
+several ways.  For example, it could be used to accumulate data over a
+number of program runs as part of a test verification suite, or to
+provide more accurate long-term information over a large number of
+program runs.
+.PP
+The data in the \fI.gcda\fR files is saved immediately before the program
+exits.  For each source file compiled with \fB\-fprofile\-arcs\fR, the
+profiling code first attempts to read in an existing \fI.gcda\fR file; if
+the file doesn't match the executable (differing number of basic block
+counts) it will ignore the contents of the file.  It then adds in the
+new execution counts and finally writes the data to the file.
+.Sh "Using \fBgcov\fP with \s-1GCC\s0 Optimization"
+.IX Subsection "Using gcov with GCC Optimization"
+If you plan to use \fBgcov\fR to help optimize your code, you must
+first compile your program with two special \s-1GCC\s0 options:
+\&\fB\-fprofile\-arcs \-ftest\-coverage\fR.  Aside from that, you can use any
+other \s-1GCC\s0 options; but if you want to prove that every single line
+in your program was executed, you should not compile with optimization
+at the same time.  On some machines the optimizer can eliminate some
+simple code lines by combining them with other lines.  For example, code
+like this:
+.PP
+.Vb 4
+\&        if (a != b)
+\&          c = 1;
+\&        else
+\&          c = 0;
+.Ve
+.PP
+can be compiled into one instruction on some machines.  In this case,
+there is no way for \fBgcov\fR to calculate separate execution counts
+for each line because there isn't separate code for each line.  Hence
+the \fBgcov\fR output looks like this if you compiled the program with
+optimization:
+.PP
+.Vb 4
+\&              100:   12:if (a != b)
+\&              100:   13:  c = 1;
+\&              100:   14:else
+\&              100:   15:  c = 0;
+.Ve
+.PP
+The output shows that this block of code, combined by optimization,
+executed 100 times.  In one sense this result is correct, because there
+was only one instruction representing all four of these lines.  However,
+the output does not indicate how many times the result was 0 and how
+many times the result was 1.
+.PP
+Inlineable functions can create unexpected line counts.  Line counts are
+shown for the source code of the inlineable function, but what is shown
+depends on where the function is inlined, or if it is not inlined at all.
+.PP
+If the function is not inlined, the compiler must emit an out of line
+copy of the function, in any object file that needs it.  If
+\&\fIfileA.o\fR and \fIfileB.o\fR both contain out of line bodies of a
+particular inlineable function, they will also both contain coverage
+counts for that function.  When \fIfileA.o\fR and \fIfileB.o\fR are
+linked together, the linker will, on many systems, select one of those
+out of line bodies for all calls to that function, and remove or ignore
+the other.  Unfortunately, it will not remove the coverage counters for
+the unused function body.  Hence when instrumented, all but one use of
+that function will show zero counts.
+.PP
+If the function is inlined in several places, the block structure in
+each location might not be the same.  For instance, a condition might
+now be calculable at compile time in some instances.  Because the
+coverage of all the uses of the inline function will be shown for the
+same source lines, the line counts themselves might seem inconsistent.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7), \fIgcc\fR\|(1) and the Info entry for \fIgcc\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1996, 1997, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
+2008  Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.2 or
+any later version published by the Free Software Foundation; with the
+Invariant Sections being \*(L"\s-1GNU\s0 General Public License\*(R" and \*(L"Funding
+Free Software\*(R", the Front-Cover texts being (a) (see below), and with
+the Back-Cover Texts being (b) (see below).  A copy of the license is
+included in the \fIgfdl\fR\|(7) man page.
+.PP
+(a) The \s-1FSF\s0's Front-Cover Text is:
+.PP
+.Vb 1
+\&     A GNU Manual
+.Ve
+.PP
+(b) The \s-1FSF\s0's Back-Cover Text is:
+.PP
+.Vb 3
+\&     You have freedom to copy and modify this GNU Manual, like GNU
+\&     software.  Copies published by the Free Software Foundation raise
+\&     funds for GNU development.
+.Ve
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gprof.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gprof.1
new file mode 100644
index 00000000..57d46d2a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-gprof.1
@@ -0,0 +1,758 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
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+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GPROF 1"
+.TH GPROF 1 "2013-10-22" "binutils-2.20" "GNU"
+.SH "NAME"
+gprof \- display call graph profile data
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+gprof [ \-[abcDhilLrsTvwxyz] ] [ \-[ACeEfFJnNOpPqQZ][\fIname\fR] ] 
+ [ \-I \fIdirs\fR ] [ \-d[\fInum\fR] ] [ \-k \fIfrom/to\fR ]
+ [ \-m \fImin-count\fR ] [ \-R \fImap_file\fR ] [ \-t \fItable-length\fR ]
+ [ \-\-[no\-]annotated\-source[=\fIname\fR] ] 
+ [ \-\-[no\-]exec\-counts[=\fIname\fR] ]
+ [ \-\-[no\-]flat\-profile[=\fIname\fR] ] [ \-\-[no\-]graph[=\fIname\fR] ]
+ [ \-\-[no\-]time=\fIname\fR] [ \-\-all\-lines ] [ \-\-brief ] 
+ [ \-\-debug[=\fIlevel\fR] ] [ \-\-function\-ordering ] 
+ [ \-\-file\-ordering \fImap_file\fR ] [ \-\-directory\-path=\fIdirs\fR ]
+ [ \-\-display\-unused\-functions ] [ \-\-file\-format=\fIname\fR ]
+ [ \-\-file\-info ] [ \-\-help ] [ \-\-line ] [ \-\-min\-count=\fIn\fR ]
+ [ \-\-no\-static ] [ \-\-print\-path ] [ \-\-separate\-files ]
+ [ \-\-static\-call\-graph ] [ \-\-sum ] [ \-\-table\-length=\fIlen\fR ]
+ [ \-\-traditional ] [ \-\-version ] [ \-\-width=\fIn\fR ]
+ [ \-\-ignore\-non\-functions ] [ \-\-demangle[=\fI\s-1STYLE\s0\fR] ]
+ [ \-\-no\-demangle ] [\-\-external\-symbol\-table=name] 
+ [ \fIimage-file\fR ] [ \fIprofile-file\fR ... ]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\f(CW\*(C`gprof\*(C'\fR produces an execution profile of C, Pascal, or Fortran77 
+programs.  The effect of called routines is incorporated in the profile 
+of each caller.  The profile data is taken from the call graph profile file
+(\fIgmon.out\fR default) which is created by programs
+that are compiled with the \fB\-pg\fR option of
+\&\f(CW\*(C`cc\*(C'\fR, \f(CW\*(C`pc\*(C'\fR, and \f(CW\*(C`f77\*(C'\fR.
+The \fB\-pg\fR option also links in versions of the library routines
+that are compiled for profiling.  \f(CW\*(C`Gprof\*(C'\fR reads the given object 
+file (the default is \f(CW\*(C`a.out\*(C'\fR) and establishes the relation between
+its symbol table and the call graph profile from \fIgmon.out\fR.
+If more than one profile file is specified, the \f(CW\*(C`gprof\*(C'\fR
+output shows the sum of the profile information in the given profile files.
+.PP
+\&\f(CW\*(C`Gprof\*(C'\fR calculates the amount of time spent in each routine.
+Next, these times are propagated along the edges of the call graph.
+Cycles are discovered, and calls into a cycle are made to share the time
+of the cycle.
+.PP
+Several forms of output are available from the analysis.
+.PP
+The \fIflat profile\fR shows how much time your program spent in each function,
+and how many times that function was called.  If you simply want to know
+which functions burn most of the cycles, it is stated concisely here.
+.PP
+The \fIcall graph\fR shows, for each function, which functions called it, which
+other functions it called, and how many times.  There is also an estimate
+of how much time was spent in the subroutines of each function.  This can
+suggest places where you might try to eliminate function calls that use a
+lot of time.  
+.PP
+The \fIannotated source\fR listing is a copy of the program's
+source code, labeled with the number of times each line of the
+program was executed.  
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+These options specify which of several output formats
+\&\f(CW\*(C`gprof\*(C'\fR should produce.
+.PP
+Many of these options take an optional \fIsymspec\fR to specify
+functions to be included or excluded.  These options can be
+specified multiple times, with different symspecs, to include
+or exclude sets of symbols.  
+.PP
+Specifying any of these options overrides the default (\fB\-p \-q\fR),
+which prints a flat profile and call graph analysis
+for all functions.
+.ie n .IP """\-A[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-A[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-A[symspec]"
+.PD 0
+.ie n .IP """\-\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--annotated-source[=symspec]"
+.PD
+The \fB\-A\fR option causes \f(CW\*(C`gprof\*(C'\fR to print annotated source code.
+If \fIsymspec\fR is specified, print output only for matching symbols.
+.ie n .IP """\-b""" 4
+.el .IP "\f(CW\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.ie n .IP """\-\-brief""" 4
+.el .IP "\f(CW\-\-brief\fR" 4
+.IX Item "--brief"
+.PD
+If the \fB\-b\fR option is given, \f(CW\*(C`gprof\*(C'\fR doesn't print the
+verbose blurbs that try to explain the meaning of all of the fields in
+the tables.  This is useful if you intend to print out the output, or
+are tired of seeing the blurbs.
+.ie n .IP """\-C[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-C[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-C[symspec]"
+.PD 0
+.ie n .IP """\-\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--exec-counts[=symspec]"
+.PD
+The \fB\-C\fR option causes \f(CW\*(C`gprof\*(C'\fR to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally only for matching symbols.
+.Sp
+If the profile data file contains basic-block count records, specifying
+the \fB\-l\fR option, along with \fB\-C\fR, will cause basic-block
+execution counts to be tallied and displayed.
+.ie n .IP """\-i""" 4
+.el .IP "\f(CW\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.ie n .IP """\-\-file\-info""" 4
+.el .IP "\f(CW\-\-file\-info\fR" 4
+.IX Item "--file-info"
+.PD
+The \fB\-i\fR option causes \f(CW\*(C`gprof\*(C'\fR to display summary information
+about the profile data file(s) and then exit.  The number of histogram,
+call graph, and basic-block count records is displayed.
+.ie n .IP """\-I \f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-I \f(CIdirs\f(CW\fR" 4
+.IX Item "-I dirs"
+.PD 0
+.ie n .IP """\-\-directory\-path=\f(CIdirs\f(CW""" 4
+.el .IP "\f(CW\-\-directory\-path=\f(CIdirs\f(CW\fR" 4
+.IX Item "--directory-path=dirs"
+.PD
+The \fB\-I\fR option specifies a list of search directories in
+which to find source files.  Environment variable \fI\s-1GPROF_PATH\s0\fR
+can also be used to convey this information.
+Used mostly for annotated source output.
+.ie n .IP """\-J[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-J[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-J[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-annotated\-source[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-annotated-source[=symspec]"
+.PD
+The \fB\-J\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print annotated source code.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints annotated source,
+but excludes matching symbols.
+.ie n .IP """\-L""" 4
+.el .IP "\f(CW\-L\fR" 4
+.IX Item "-L"
+.PD 0
+.ie n .IP """\-\-print\-path""" 4
+.el .IP "\f(CW\-\-print\-path\fR" 4
+.IX Item "--print-path"
+.PD
+Normally, source filenames are printed with the path
+component suppressed.  The \fB\-L\fR option causes \f(CW\*(C`gprof\*(C'\fR
+to print the full pathname of
+source filenames, which is determined
+from symbolic debugging information in the image file
+and is relative to the directory in which the compiler
+was invoked.
+.ie n .IP """\-p[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-p[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-p[symspec]"
+.PD 0
+.ie n .IP """\-\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--flat-profile[=symspec]"
+.PD
+The \fB\-p\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a flat profile.
+If \fIsymspec\fR is specified, print flat profile only for matching symbols.
+.ie n .IP """\-P[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-P[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-P[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-flat\-profile[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-flat-profile[=symspec]"
+.PD
+The \fB\-P\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing a flat profile.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a flat profile,
+but excludes matching symbols.
+.ie n .IP """\-q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-q[symspec]"
+.PD 0
+.ie n .IP """\-\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--graph[=symspec]"
+.PD
+The \fB\-q\fR option causes \f(CW\*(C`gprof\*(C'\fR to print the call graph analysis.
+If \fIsymspec\fR is specified, print call graph only for matching symbols
+and their children.
+.ie n .IP """\-Q[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Q[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Q[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-graph[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-graph[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-graph[=symspec]"
+.PD
+The \fB\-Q\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress printing the
+call graph.
+If \fIsymspec\fR is specified, \f(CW\*(C`gprof\*(C'\fR prints a call graph,
+but excludes matching symbols.
+.ie n .IP """\-t""" 4
+.el .IP "\f(CW\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.ie n .IP """\-\-table\-length=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-table\-length=\f(CInum\f(CW\fR" 4
+.IX Item "--table-length=num"
+.PD
+The \fB\-t\fR option causes the \fInum\fR most active source lines in
+each source file to be listed when source annotation is enabled.  The
+default is 10.
+.ie n .IP """\-y""" 4
+.el .IP "\f(CW\-y\fR" 4
+.IX Item "-y"
+.PD 0
+.ie n .IP """\-\-separate\-files""" 4
+.el .IP "\f(CW\-\-separate\-files\fR" 4
+.IX Item "--separate-files"
+.PD
+This option affects annotated source output only.
+Normally, \f(CW\*(C`gprof\*(C'\fR prints annotated source files
+to standard\-output.  If this option is specified,
+annotated source for a file named \fIpath/\fIfilename\fI\fR
+is generated in the file \fI\fIfilename\fI\-ann\fR.  If the underlying
+file system would truncate \fI\fIfilename\fI\-ann\fR so that it
+overwrites the original \fI\fIfilename\fI\fR, \f(CW\*(C`gprof\*(C'\fR generates
+annotated source in the file \fI\fIfilename\fI.ann\fR instead (if the
+original file name has an extension, that extension is \fIreplaced\fR
+with \fI.ann\fR).
+.ie n .IP """\-Z[\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-Z[\f(CIsymspec\f(CW]\fR" 4
+.IX Item "-Z[symspec]"
+.PD 0
+.ie n .IP """\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]""" 4
+.el .IP "\f(CW\-\-no\-exec\-counts[=\f(CIsymspec\f(CW]\fR" 4
+.IX Item "--no-exec-counts[=symspec]"
+.PD
+The \fB\-Z\fR option causes \f(CW\*(C`gprof\*(C'\fR not to
+print a tally of functions and the number of times each was called.
+If \fIsymspec\fR is specified, print tally, but exclude matching symbols.
+.ie n .IP """\-r""" 4
+.el .IP "\f(CW\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.ie n .IP """\-\-function\-ordering""" 4
+.el .IP "\f(CW\-\-function\-ordering\fR" 4
+.IX Item "--function-ordering"
+.PD
+The \fB\-\-function\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested function ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which support arbitrary
+ordering of functions in an executable.
+.Sp
+The exact details of how to force the linker to place functions
+in a particular order is system dependent and out of the scope of this
+manual.
+.ie n .IP """\-R \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-R \f(CImap_file\f(CW\fR" 4
+.IX Item "-R map_file"
+.PD 0
+.ie n .IP """\-\-file\-ordering \f(CImap_file\f(CW""" 4
+.el .IP "\f(CW\-\-file\-ordering \f(CImap_file\f(CW\fR" 4
+.IX Item "--file-ordering map_file"
+.PD
+The \fB\-\-file\-ordering\fR option causes \f(CW\*(C`gprof\*(C'\fR to print a
+suggested .o link line ordering for the program based on profiling data.
+This option suggests an ordering which may improve paging, tlb and
+cache behavior for the program on systems which do not support arbitrary
+ordering of functions in an executable.
+.Sp
+Use of the \fB\-a\fR argument is highly recommended with this option.
+.Sp
+The \fImap_file\fR argument is a pathname to a file which provides
+function name to object file mappings.  The format of the file is similar to
+the output of the program \f(CW\*(C`nm\*(C'\fR.
+.Sp
+.Vb 8
+\&        c-parse.o:00000000 T yyparse
+\&        c-parse.o:00000004 C yyerrflag
+\&        c-lang.o:00000000 T maybe_objc_method_name
+\&        c-lang.o:00000000 T print_lang_statistics
+\&        c-lang.o:00000000 T recognize_objc_keyword
+\&        c-decl.o:00000000 T print_lang_identifier
+\&        c-decl.o:00000000 T print_lang_type
+\&        ...
+.Ve
+.Sp
+To create a \fImap_file\fR with \s-1GNU\s0 \f(CW\*(C`nm\*(C'\fR, type a command like
+\&\f(CW\*(C`nm \-\-extern\-only \-\-defined\-only \-v \-\-print\-file\-name program\-name\*(C'\fR.
+.ie n .IP """\-T""" 4
+.el .IP "\f(CW\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.ie n .IP """\-\-traditional""" 4
+.el .IP "\f(CW\-\-traditional\fR" 4
+.IX Item "--traditional"
+.PD
+The \fB\-T\fR option causes \f(CW\*(C`gprof\*(C'\fR to print its output in
+\&\*(L"traditional\*(R" \s-1BSD\s0 style.
+.ie n .IP """\-w \f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-w \f(CIwidth\f(CW\fR" 4
+.IX Item "-w width"
+.PD 0
+.ie n .IP """\-\-width=\f(CIwidth\f(CW""" 4
+.el .IP "\f(CW\-\-width=\f(CIwidth\f(CW\fR" 4
+.IX Item "--width=width"
+.PD
+Sets width of output lines to \fIwidth\fR.
+Currently only used when printing the function index at the bottom
+of the call graph.
+.ie n .IP """\-x""" 4
+.el .IP "\f(CW\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.ie n .IP """\-\-all\-lines""" 4
+.el .IP "\f(CW\-\-all\-lines\fR" 4
+.IX Item "--all-lines"
+.PD
+This option affects annotated source output only.
+By default, only the lines at the beginning of a basic-block
+are annotated.  If this option is specified, every line in
+a basic-block is annotated by repeating the annotation for the
+first line.  This behavior is similar to \f(CW\*(C`tcov\*(C'\fR's \fB\-a\fR.
+.ie n .IP """\-\-demangle[=\f(CIstyle\f(CW]""" 4
+.el .IP "\f(CW\-\-demangle[=\f(CIstyle\f(CW]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.ie n .IP """\-\-no\-demangle""" 4
+.el .IP "\f(CW\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether \*(C+ symbol names should be demangled when
+printing output.  The default is to demangle symbols.  The
+\&\f(CW\*(C`\-\-no\-demangle\*(C'\fR option may be used to turn off demangling. Different 
+compilers have different mangling styles.  The optional demangling style 
+argument can be used to choose an appropriate demangling style for your 
+compiler.
+.Sh "Analysis Options"
+.IX Subsection "Analysis Options"
+.ie n .IP """\-a""" 4
+.el .IP "\f(CW\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.ie n .IP """\-\-no\-static""" 4
+.el .IP "\f(CW\-\-no\-static\fR" 4
+.IX Item "--no-static"
+.PD
+The \fB\-a\fR option causes \f(CW\*(C`gprof\*(C'\fR to suppress the printing of
+statically declared (private) functions.  (These are functions whose
+names are not listed as global, and which are not visible outside the
+file/function/block where they were defined.)  Time spent in these
+functions, calls to/from them, etc., will all be attributed to the
+function that was loaded directly before it in the executable file.
+This option affects both the flat profile and the call graph.
+.ie n .IP """\-c""" 4
+.el .IP "\f(CW\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.ie n .IP """\-\-static\-call\-graph""" 4
+.el .IP "\f(CW\-\-static\-call\-graph\fR" 4
+.IX Item "--static-call-graph"
+.PD
+The \fB\-c\fR option causes the call graph of the program to be
+augmented by a heuristic which examines the text space of the object
+file and identifies function calls in the binary machine code.
+Since normal call graph records are only generated when functions are
+entered, this option identifies children that could have been called,
+but never were.  Calls to functions that were not compiled with
+profiling enabled are also identified, but only if symbol table
+entries are present for them.
+Calls to dynamic library routines are typically \fInot\fR found
+by this option.
+Parents or children identified via this heuristic
+are indicated in the call graph with call counts of \fB0\fR.
+.ie n .IP """\-D""" 4
+.el .IP "\f(CW\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.ie n .IP """\-\-ignore\-non\-functions""" 4
+.el .IP "\f(CW\-\-ignore\-non\-functions\fR" 4
+.IX Item "--ignore-non-functions"
+.PD
+The \fB\-D\fR option causes \f(CW\*(C`gprof\*(C'\fR to ignore symbols which
+are not known to be functions.  This option will give more accurate
+profile data on systems where it is supported (Solaris and \s-1HPUX\s0 for
+example).
+.ie n .IP """\-k \f(CIfrom\f(CW/\f(CIto\f(CW""" 4
+.el .IP "\f(CW\-k \f(CIfrom\f(CW/\f(CIto\f(CW\fR" 4
+.IX Item "-k from/to"
+The \fB\-k\fR option allows you to delete from the call graph any arcs from
+symbols matching symspec \fIfrom\fR to those matching symspec \fIto\fR.
+.ie n .IP """\-l""" 4
+.el .IP "\f(CW\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.ie n .IP """\-\-line""" 4
+.el .IP "\f(CW\-\-line\fR" 4
+.IX Item "--line"
+.PD
+The \fB\-l\fR option enables line-by-line profiling, which causes
+histogram hits to be charged to individual source code lines,
+instead of functions.  This feature only works with programs compiled
+by older versions of the \f(CW\*(C`gcc\*(C'\fR compiler.  Newer versions of
+\&\f(CW\*(C`gcc\*(C'\fR are designed to work with the \f(CW\*(C`gcov\*(C'\fR tool instead.
+.Sp
+If the program was compiled with basic-block counting enabled,
+this option will also identify how many times each line of
+code was executed.
+While line-by-line profiling can help isolate where in a large function
+a program is spending its time, it also significantly increases
+the running time of \f(CW\*(C`gprof\*(C'\fR, and magnifies statistical
+inaccuracies.
+.ie n .IP """\-m \f(CInum\f(CW""" 4
+.el .IP "\f(CW\-m \f(CInum\f(CW\fR" 4
+.IX Item "-m num"
+.PD 0
+.ie n .IP """\-\-min\-count=\f(CInum\f(CW""" 4
+.el .IP "\f(CW\-\-min\-count=\f(CInum\f(CW\fR" 4
+.IX Item "--min-count=num"
+.PD
+This option affects execution count output only.
+Symbols that are executed less than \fInum\fR times are suppressed.
+.ie n .IP """\-n\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-n\f(CIsymspec\f(CW\fR" 4
+.IX Item "-nsymspec"
+.PD 0
+.ie n .IP """\-\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+to only propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-N\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-N\f(CIsymspec\f(CW\fR" 4
+.IX Item "-Nsymspec"
+.PD 0
+.ie n .IP """\-\-no\-time=\f(CIsymspec\f(CW""" 4
+.el .IP "\f(CW\-\-no\-time=\f(CIsymspec\f(CW\fR" 4
+.IX Item "--no-time=symspec"
+.PD
+The \fB\-n\fR option causes \f(CW\*(C`gprof\*(C'\fR, in its call graph analysis,
+not to propagate times for symbols matching \fIsymspec\fR.
+.ie n .IP """\-S\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-S\f(CIfilename\f(CW\fR" 4
+.IX Item "-Sfilename"
+.PD 0
+.ie n .IP """\-\-external\-symbol\-table=\f(CIfilename\f(CW""" 4
+.el .IP "\f(CW\-\-external\-symbol\-table=\f(CIfilename\f(CW\fR" 4
+.IX Item "--external-symbol-table=filename"
+.PD
+The \fB\-S\fR option causes \f(CW\*(C`gprof\*(C'\fR to read an external symbol table
+file, such as \fI/proc/kallsyms\fR, rather than read the symbol table 
+from the given object file (the default is \f(CW\*(C`a.out\*(C'\fR). This is useful 
+for profiling kernel modules.
+.ie n .IP """\-z""" 4
+.el .IP "\f(CW\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.ie n .IP """\-\-display\-unused\-functions""" 4
+.el .IP "\f(CW\-\-display\-unused\-functions\fR" 4
+.IX Item "--display-unused-functions"
+.PD
+If you give the \fB\-z\fR option, \f(CW\*(C`gprof\*(C'\fR will mention all
+functions in the flat profile, even those that were never called, and
+that had no time spent in them.  This is useful in conjunction with the
+\&\fB\-c\fR option for discovering which routines were never called.
+.Sh "Miscellaneous Options"
+.IX Subsection "Miscellaneous Options"
+.ie n .IP """\-d[\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-d[\f(CInum\f(CW]\fR" 4
+.IX Item "-d[num]"
+.PD 0
+.ie n .IP """\-\-debug[=\f(CInum\f(CW]""" 4
+.el .IP "\f(CW\-\-debug[=\f(CInum\f(CW]\fR" 4
+.IX Item "--debug[=num]"
+.PD
+The \fB\-d\fR \fInum\fR option specifies debugging options.
+If \fInum\fR is not specified, enable all debugging.
+.ie n .IP """\-h""" 4
+.el .IP "\f(CW\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.ie n .IP """\-\-help""" 4
+.el .IP "\f(CW\-\-help\fR" 4
+.IX Item "--help"
+.PD
+The \fB\-h\fR option prints command line usage.
+.ie n .IP """\-O\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-O\f(CIname\f(CW\fR" 4
+.IX Item "-Oname"
+.PD 0
+.ie n .IP """\-\-file\-format=\f(CIname\f(CW""" 4
+.el .IP "\f(CW\-\-file\-format=\f(CIname\f(CW\fR" 4
+.IX Item "--file-format=name"
+.PD
+Selects the format of the profile data files.  Recognized formats are
+\&\fBauto\fR (the default), \fBbsd\fR, \fB4.4bsd\fR, \fBmagic\fR, and
+\&\fBprof\fR (not yet supported).
+.ie n .IP """\-s""" 4
+.el .IP "\f(CW\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.ie n .IP """\-\-sum""" 4
+.el .IP "\f(CW\-\-sum\fR" 4
+.IX Item "--sum"
+.PD
+The \fB\-s\fR option causes \f(CW\*(C`gprof\*(C'\fR to summarize the information
+in the profile data files it read in, and write out a profile data
+file called \fIgmon.sum\fR, which contains all the information from
+the profile data files that \f(CW\*(C`gprof\*(C'\fR read in.  The file \fIgmon.sum\fR
+may be one of the specified input files; the effect of this is to
+merge the data in the other input files into \fIgmon.sum\fR.
+.Sp
+Eventually you can run \f(CW\*(C`gprof\*(C'\fR again without \fB\-s\fR to analyze the
+cumulative data in the file \fIgmon.sum\fR.
+.ie n .IP """\-v""" 4
+.el .IP "\f(CW\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.ie n .IP """\-\-version""" 4
+.el .IP "\f(CW\-\-version\fR" 4
+.IX Item "--version"
+.PD
+The \fB\-v\fR flag causes \f(CW\*(C`gprof\*(C'\fR to print the current version
+number, and then exit.
+.Sh "Deprecated Options"
+.IX Subsection "Deprecated Options"
+.RS 4
+These options have been replaced with newer versions that use symspecs.
+.RE
+.ie n .IP """\-e \f(CIfunction_name\f(CW""" 4
+.el .IP "\f(CW\-e \f(CIfunction_name\f(CW\fR" 4
+.IX Item "-e function_name"
+The \fB\-e\fR \fIfunction\fR option tells \f(CW\*(C`gprof\*(C'\fR to not print
+information about the function \fIfunction_name\fR (and its
+children...) in the call graph.  The function will still be listed
+as a child of any functions that call it, but its index number will be
+shown as \fB[not printed]\fR.  More than one \fB\-e\fR option may be
+given; only one \fIfunction_name\fR may be indicated with each \fB\-e\fR
+option. 
+.ie n .IP """\-E \f(CIfunction_name\f(CW""" 4
+.el .IP "\f(CW\-E \f(CIfunction_name\f(CW\fR" 4
+.IX Item "-E function_name"
+The \f(CW\*(C`\-E \f(CIfunction\f(CW\*(C'\fR option works like the \f(CW\*(C`\-e\*(C'\fR option, but
+time spent in the function (and children who were not called from
+anywhere else), will not be used to compute the percentages-of-time for
+the call graph.  More than one \fB\-E\fR option may be given; only one
+\&\fIfunction_name\fR may be indicated with each \fB\-E\fR option.
+.ie n .IP """\-f \f(CIfunction_name\f(CW""" 4
+.el .IP "\f(CW\-f \f(CIfunction_name\f(CW\fR" 4
+.IX Item "-f function_name"
+The \fB\-f\fR \fIfunction\fR option causes \f(CW\*(C`gprof\*(C'\fR to limit the
+call graph to the function \fIfunction_name\fR and its children (and
+their children...).  More than one \fB\-f\fR option may be given;
+only one \fIfunction_name\fR may be indicated with each \fB\-f\fR
+option.  
+.ie n .IP """\-F \f(CIfunction_name\f(CW""" 4
+.el .IP "\f(CW\-F \f(CIfunction_name\f(CW\fR" 4
+.IX Item "-F function_name"
+The \fB\-F\fR \fIfunction\fR option works like the \f(CW\*(C`\-f\*(C'\fR option, but
+only time spent in the function and its children (and their
+children...) will be used to determine total-time and
+percentages-of-time for the call graph.  More than one \fB\-F\fR option
+may be given; only one \fIfunction_name\fR may be indicated with each
+\&\fB\-F\fR option.  The \fB\-F\fR option overrides the \fB\-E\fR option.
+.SH "FILES"
+.IX Header "FILES"
+.ie n .IP """\f(CIa.out\f(CW""" 4
+.el .IP "\f(CW\f(CIa.out\f(CW\fR" 4
+.IX Item "a.out"
+the namelist and text space.
+.ie n .IP """\f(CIgmon.out\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.out\f(CW\fR" 4
+.IX Item "gmon.out"
+dynamic call graph and profile.
+.ie n .IP """\f(CIgmon.sum\f(CW""" 4
+.el .IP "\f(CW\f(CIgmon.sum\f(CW\fR" 4
+.IX Item "gmon.sum"
+summarized dynamic call graph and profile.  
+.SH "BUGS"
+.IX Header "BUGS"
+The granularity of the sampling is shown, but remains
+statistical at best.
+We assume that the time for each execution of a function
+can be expressed by the total time for the function divided
+by the number of times the function is called.
+Thus the time propagated along the call graph arcs to the function's
+parents is directly proportional to the number of times that
+arc is traversed.
+.PP
+Parents that are not themselves profiled will have the time of
+their profiled children propagated to them, but they will appear
+to be spontaneously invoked in the call graph listing, and will
+not have their time propagated further.
+Similarly, signal catchers, even though profiled, will appear
+to be spontaneous (although for more obscure reasons).
+Any profiled children of signal catchers should have their times
+propagated properly, unless the signal catcher was invoked during
+the execution of the profiling routine, in which case all is lost.
+.PP
+The profiled program must call \f(CW\*(C`exit\*(C'\fR(2)
+or return normally for the profiling information to be saved
+in the \fIgmon.out\fR file.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fImonitor\fR\|(3), \fIprofil\fR\|(2), \fIcc\fR\|(1), \fIprof\fR\|(1), and the Info entry for \fIgprof\fR.
+.PP
+\&\*(L"An Execution Profiler for Modular Programs\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Software \- Practice and Experience,
+Vol. 13, pp. 671\-685, 1983.
+.PP
+\&\*(L"gprof: A Call Graph Execution Profiler\*(R",
+by S. Graham, P. Kessler, M. McKusick;
+Proceedings of the \s-1SIGPLAN\s0 '82 Symposium on Compiler Construction,
+\&\s-1SIGPLAN\s0 Notices, Vol. 17, No  6, pp. 120\-126, June 1982.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1988, 92, 97, 98, 99, 2000, 2001, 2003, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ld.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ld.1
new file mode 100644
index 00000000..60865717
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ld.1
@@ -0,0 +1,2355 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "LD 1"
+.TH LD 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ld \- The GNU linker
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ld [\fBoptions\fR] \fIobjfile\fR ...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBld\fR combines a number of object and archive files, relocates
+their data and ties up symbol references. Usually the last step in
+compiling a program is to run \fBld\fR.
+.PP
+\&\fBld\fR accepts Linker Command Language files written in
+a superset of \s-1AT&T\s0's Link Editor Command Language syntax,
+to provide explicit and total control over the linking process.
+.PP
+This man page does not describe the command language; see the
+\&\fBld\fR entry in \f(CW\*(C`info\*(C'\fR for full details on the command
+language and on other aspects of the \s-1GNU\s0 linker.
+.PP
+This version of \fBld\fR uses the general purpose \s-1BFD\s0 libraries
+to operate on object files. This allows \fBld\fR to read, combine, and
+write object files in many different formats\-\-\-for example, \s-1COFF\s0 or
+\&\f(CW\*(C`a.out\*(C'\fR.  Different formats may be linked together to produce any
+available kind of object file.
+.PP
+Aside from its flexibility, the \s-1GNU\s0 linker is more helpful than other
+linkers in providing diagnostic information.  Many linkers abandon
+execution immediately upon encountering an error; whenever possible,
+\&\fBld\fR continues executing, allowing you to identify other errors
+(or, in some cases, to get an output file in spite of the error).
+.PP
+The \s-1GNU\s0 linker \fBld\fR is meant to cover a broad range of situations,
+and to be as compatible as possible with other linkers.  As a result,
+you have many choices to control its behavior.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The linker supports a plethora of command-line options, but in actual
+practice few of them are used in any particular context.
+For instance, a frequent use of \fBld\fR is to link standard Unix
+object files on a standard, supported Unix system.  On such a system, to
+link a file \f(CW\*(C`hello.o\*(C'\fR:
+.PP
+.Vb 1
+\&        ld \-o <output> /lib/crt0.o hello.o \-lc
+.Ve
+.PP
+This tells \fBld\fR to produce a file called \fIoutput\fR as the
+result of linking the file \f(CW\*(C`/lib/crt0.o\*(C'\fR with \f(CW\*(C`hello.o\*(C'\fR and
+the library \f(CW\*(C`libc.a\*(C'\fR, which will come from the standard search
+directories.  (See the discussion of the \fB\-l\fR option below.)
+.PP
+Some of the command-line options to \fBld\fR may be specified at any
+point in the command line.  However, options which refer to files, such
+as \fB\-l\fR or \fB\-T\fR, cause the file to be read at the point at
+which the option appears in the command line, relative to the object
+files and other file options.  Repeating non-file options with a
+different argument will either have no further effect, or override prior
+occurrences (those further to the left on the command line) of that
+option.  Options which may be meaningfully specified more than once are
+noted in the descriptions below.
+.PP
+Non-option arguments are object files or archives which are to be linked
+together.  They may follow, precede, or be mixed in with command-line
+options, except that an object file argument may not be placed between
+an option and its argument.
+.PP
+Usually the linker is invoked with at least one object file, but you can
+specify other forms of binary input files using \fB\-l\fR, \fB\-R\fR,
+and the script command language.  If \fIno\fR binary input files at all
+are specified, the linker does not produce any output, and issues the
+message \fBNo input files\fR.
+.PP
+If the linker cannot recognize the format of an object file, it will
+assume that it is a linker script.  A script specified in this way
+augments the main linker script used for the link (either the default
+linker script or the one specified by using \fB\-T\fR).  This feature
+permits the linker to link against a file which appears to be an object
+or an archive, but actually merely defines some symbol values, or uses
+\&\f(CW\*(C`INPUT\*(C'\fR or \f(CW\*(C`GROUP\*(C'\fR to load other objects.  Specifying a
+script in this way merely augments the main linker script, with the
+extra commands placed after the main script; use the \fB\-T\fR option
+to replace the default linker script entirely, but note the effect of
+the \f(CW\*(C`INSERT\*(C'\fR command.
+.PP
+For options whose names are a single letter,
+option arguments must either follow the option letter without intervening
+whitespace, or be given as separate arguments immediately following the
+option that requires them.
+.PP
+For options whose names are multiple letters, either one dash or two can
+precede the option name; for example, \fB\-trace\-symbol\fR and
+\&\fB\-\-trace\-symbol\fR are equivalent.  Note\-\-\-there is one exception to
+this rule.  Multiple letter options that start with a lower case 'o' can
+only be preceded by two dashes.  This is to reduce confusion with the
+\&\fB\-o\fR option.  So for example \fB\-omagic\fR sets the output file
+name to \fBmagic\fR whereas \fB\-\-omagic\fR sets the \s-1NMAGIC\s0 flag on the
+output.
+.PP
+Arguments to multiple-letter options must either be separated from the
+option name by an equals sign, or be given as separate arguments
+immediately following the option that requires them.  For example,
+\&\fB\-\-trace\-symbol foo\fR and \fB\-\-trace\-symbol=foo\fR are equivalent.
+Unique abbreviations of the names of multiple-letter options are
+accepted.
+.PP
+Note\-\-\-if the linker is being invoked indirectly, via a compiler driver
+(e.g. \fBgcc\fR) then all the linker command line options should be
+prefixed by \fB\-Wl,\fR (or whatever is appropriate for the particular
+compiler driver) like this:
+.PP
+.Vb 1
+\&          gcc \-Wl,\-\-start\-group foo.o bar.o \-Wl,\-\-end\-group
+.Ve
+.PP
+This is important, because otherwise the compiler driver program may
+silently drop the linker options, resulting in a bad link.  Confusion
+may also arise when passing options that require values through a
+driver, as the use of a space between option and argument acts as
+a separator, and causes the driver to pass only the option to the linker
+and the argument to the compiler.  In this case, it is simplest to use
+the joined forms of both single\- and multiple-letter options, such as:
+.PP
+.Vb 1
+\&          gcc foo.o bar.o \-Wl,\-eENTRY \-Wl,\-Map=a.map
+.Ve
+.PP
+Here is a table of the generic command line switches accepted by the \s-1GNU\s0
+linker:
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.IP "\fB\-a\fR \fIkeyword\fR" 4
+.IX Item "-a keyword"
+This option is supported for \s-1HP/UX\s0 compatibility.  The \fIkeyword\fR
+argument must be one of the strings \fBarchive\fR, \fBshared\fR, or
+\&\fBdefault\fR.  \fB\-aarchive\fR is functionally equivalent to
+\&\fB\-Bstatic\fR, and the other two keywords are functionally equivalent
+to \fB\-Bdynamic\fR.  This option may be used any number of times.
+.IP "\fB\-A\fR \fIarchitecture\fR" 4
+.IX Item "-A architecture"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fIarchitecture\fR" 4
+.IX Item "--architecture=architecture"
+.PD
+In the current release of \fBld\fR, this option is useful only for the
+Intel 960 family of architectures.  In that \fBld\fR configuration, the
+\&\fIarchitecture\fR argument identifies the particular architecture in
+the 960 family, enabling some safeguards and modifying the
+archive-library search path.
+.Sp
+Future releases of \fBld\fR may support similar functionality for
+other architecture families.
+.IP "\fB\-b\fR \fIinput-format\fR" 4
+.IX Item "-b input-format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIinput-format\fR" 4
+.IX Item "--format=input-format"
+.PD
+\&\fBld\fR may be configured to support more than one kind of object
+file.  If your \fBld\fR is configured this way, you can use the
+\&\fB\-b\fR option to specify the binary format for input object files
+that follow this option on the command line.  Even when \fBld\fR is
+configured to support alternative object formats, you don't usually need
+to specify this, as \fBld\fR should be configured to expect as a
+default input format the most usual format on each machine.
+\&\fIinput-format\fR is a text string, the name of a particular format
+supported by the \s-1BFD\s0 libraries.  (You can list the available binary
+formats with \fBobjdump \-i\fR.)
+.Sp
+You may want to use this option if you are linking files with an unusual
+binary format.  You can also use \fB\-b\fR to switch formats explicitly (when
+linking object files of different formats), by including
+\&\fB\-b\fR \fIinput-format\fR before each group of object files in a
+particular format.
+.Sp
+The default format is taken from the environment variable
+\&\f(CW\*(C`GNUTARGET\*(C'\fR.
+.Sp
+You can also define the input format from a script, using the command
+\&\f(CW\*(C`TARGET\*(C'\fR;
+.IP "\fB\-c\fR \fIMRI-commandfile\fR" 4
+.IX Item "-c MRI-commandfile"
+.PD 0
+.IP "\fB\-\-mri\-script=\fR\fIMRI-commandfile\fR" 4
+.IX Item "--mri-script=MRI-commandfile"
+.PD
+For compatibility with linkers produced by \s-1MRI\s0, \fBld\fR accepts script
+files written in an alternate, restricted command language, described in
+the \s-1MRI\s0 Compatible Script Files section of \s-1GNU\s0 ld documentation.
+Introduce \s-1MRI\s0 script files with
+the option \fB\-c\fR; use the \fB\-T\fR option to run linker
+scripts written in the general-purpose \fBld\fR scripting language.
+If \fIMRI-cmdfile\fR does not exist, \fBld\fR looks for it in the directories
+specified by any \fB\-L\fR options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-dc\fR" 4
+.IX Item "-dc"
+.IP "\fB\-dp\fR" 4
+.IX Item "-dp"
+.PD
+These three options are equivalent; multiple forms are supported for
+compatibility with other linkers.  They assign space to common symbols
+even if a relocatable output file is specified (with \fB\-r\fR).  The
+script command \f(CW\*(C`FORCE_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.IP "\fB\-e\fR \fIentry\fR" 4
+.IX Item "-e entry"
+.PD 0
+.IP "\fB\-\-entry=\fR\fIentry\fR" 4
+.IX Item "--entry=entry"
+.PD
+Use \fIentry\fR as the explicit symbol for beginning execution of your
+program, rather than the default entry point.  If there is no symbol
+named \fIentry\fR, the linker will try to parse \fIentry\fR as a number,
+and use that as the entry address (the number will be interpreted in
+base 10; you may use a leading \fB0x\fR for base 16, or a leading
+\&\fB0\fR for base 8).
+.IP "\fB\-\-exclude\-libs\fR \fIlib\fR\fB,\fR\fIlib\fR\fB,...\fR" 4
+.IX Item "--exclude-libs lib,lib,..."
+Specifies a list of archive libraries from which symbols should not be automatically
+exported.  The library names may be delimited by commas or colons.  Specifying
+\&\f(CW\*(C`\-\-exclude\-libs ALL\*(C'\fR excludes symbols in all archive libraries from
+automatic export.  This option is available only for the i386 \s-1PE\s0 targeted
+port of the linker and for \s-1ELF\s0 targeted ports.  For i386 \s-1PE\s0, symbols
+explicitly listed in a .def file are still exported, regardless of this
+option.  For \s-1ELF\s0 targeted ports, symbols affected by this option will
+be treated as hidden.
+.IP "\fB\-\-exclude\-modules\-for\-implib\fR \fImodule\fR\fB,\fR\fImodule\fR\fB,...\fR" 4
+.IX Item "--exclude-modules-for-implib module,module,..."
+Specifies a list of object files or archive members, from which symbols
+should not be automatically exported, but which should be copied wholesale
+into the import library being generated during the link.  The module names
+may be delimited by commas or colons, and must match exactly the filenames
+used by \fBld\fR to open the files; for archive members, this is simply
+the member name, but for object files the name listed must include and
+match precisely any path used to specify the input file on the linker's
+command-line.  This option is available only for the i386 \s-1PE\s0 targeted port
+of the linker.  Symbols explicitly listed in a .def file are still exported,
+regardless of this option.
+.IP "\fB\-E\fR" 4
+.IX Item "-E"
+.PD 0
+.IP "\fB\-\-export\-dynamic\fR" 4
+.IX Item "--export-dynamic"
+.IP "\fB\-\-no\-export\-dynamic\fR" 4
+.IX Item "--no-export-dynamic"
+.PD
+When creating a dynamically linked executable, using the \fB\-E\fR
+option or the \fB\-\-export\-dynamic\fR option causes the linker to add
+all symbols to the dynamic symbol table.  The dynamic symbol table is the
+set of symbols which are visible from dynamic objects at run time.
+.Sp
+If you do not use either of these options (or use the
+\&\fB\-\-no\-export\-dynamic\fR option to restore the default behavior), the
+dynamic symbol table will normally contain only those symbols which are
+referenced by some dynamic object mentioned in the link.
+.Sp
+If you use \f(CW\*(C`dlopen\*(C'\fR to load a dynamic object which needs to refer
+back to the symbols defined by the program, rather than some other
+dynamic object, then you will probably need to use this option when
+linking the program itself.
+.Sp
+You can also use the dynamic list to control what symbols should
+be added to the dynamic symbol table if the output format supports it.
+See the description of \fB\-\-dynamic\-list\fR.
+.Sp
+Note that this option is specific to \s-1ELF\s0 targeted ports.  \s-1PE\s0 targets
+support a similar function to export all symbols from a \s-1DLL\s0 or \s-1EXE\s0; see
+the description of \fB\-\-export\-all\-symbols\fR below.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+Link big-endian objects.  This affects the default output format.
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+Link little-endian objects.  This affects the default output format.
+.IP "\fB\-f\fR \fIname\fR" 4
+.IX Item "-f name"
+.PD 0
+.IP "\fB\-\-auxiliary=\fR\fIname\fR" 4
+.IX Item "--auxiliary=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_AUXILIARY\s0 field
+to the specified name.  This tells the dynamic linker that the symbol
+table of the shared object should be used as an auxiliary filter on the
+symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_AUXILIARY\s0 field.  If
+the dynamic linker resolves any symbols from the filter object, it will
+first check whether there is a definition in the shared object
+\&\fIname\fR.  If there is one, it will be used instead of the definition
+in the filter object.  The shared object \fIname\fR need not exist.
+Thus the shared object \fIname\fR may be used to provide an alternative
+implementation of certain functions, perhaps for debugging or for
+machine specific performance.
+.Sp
+This option may be specified more than once.  The \s-1DT_AUXILIARY\s0 entries
+will be created in the order in which they appear on the command line.
+.IP "\fB\-F\fR \fIname\fR" 4
+.IX Item "-F name"
+.PD 0
+.IP "\fB\-\-filter=\fR\fIname\fR" 4
+.IX Item "--filter=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_FILTER\s0 field to
+the specified name.  This tells the dynamic linker that the symbol table
+of the shared object which is being created should be used as a filter
+on the symbol table of the shared object \fIname\fR.
+.Sp
+If you later link a program against this filter object, then, when you
+run the program, the dynamic linker will see the \s-1DT_FILTER\s0 field.  The
+dynamic linker will resolve symbols according to the symbol table of the
+filter object as usual, but it will actually link to the definitions
+found in the shared object \fIname\fR.  Thus the filter object can be
+used to select a subset of the symbols provided by the object
+\&\fIname\fR.
+.Sp
+Some older linkers used the \fB\-F\fR option throughout a compilation
+toolchain for specifying object-file format for both input and output
+object files.
+The \s-1GNU\s0 linker uses other mechanisms for this purpose: the
+\&\fB\-b\fR, \fB\-\-format\fR, \fB\-\-oformat\fR options, the
+\&\f(CW\*(C`TARGET\*(C'\fR command in linker scripts, and the \f(CW\*(C`GNUTARGET\*(C'\fR
+environment variable.
+The \s-1GNU\s0 linker will ignore the \fB\-F\fR option when not
+creating an \s-1ELF\s0 shared object.
+.IP "\fB\-fini=\fR\fIname\fR" 4
+.IX Item "-fini=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is unloaded, by setting \s-1DT_FINI\s0 to the
+address of the function.  By default, the linker uses \f(CW\*(C`_fini\*(C'\fR as
+the function to call.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+Ignored.  Provided for compatibility with other tools.
+.IP "\fB\-G\fR \fIvalue\fR" 4
+.IX Item "-G value"
+.PD 0
+.IP "\fB\-\-gpsize=\fR\fIvalue\fR" 4
+.IX Item "--gpsize=value"
+.PD
+Set the maximum size of objects to be optimized using the \s-1GP\s0 register to
+\&\fIsize\fR.  This is only meaningful for object file formats such as
+\&\s-1MIPS\s0 \s-1ECOFF\s0 which supports putting large and small objects into different
+sections.  This is ignored for other object file formats.
+.IP "\fB\-h\fR \fIname\fR" 4
+.IX Item "-h name"
+.PD 0
+.IP "\fB\-soname=\fR\fIname\fR" 4
+.IX Item "-soname=name"
+.PD
+When creating an \s-1ELF\s0 shared object, set the internal \s-1DT_SONAME\s0 field to
+the specified name.  When an executable is linked with a shared object
+which has a \s-1DT_SONAME\s0 field, then when the executable is run the dynamic
+linker will attempt to load the shared object specified by the \s-1DT_SONAME\s0
+field rather than the using the file name given to the linker.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+Perform an incremental link (same as option \fB\-r\fR).
+.IP "\fB\-init=\fR\fIname\fR" 4
+.IX Item "-init=name"
+When creating an \s-1ELF\s0 executable or shared object, call \s-1NAME\s0 when the
+executable or shared object is loaded, by setting \s-1DT_INIT\s0 to the address
+of the function.  By default, the linker uses \f(CW\*(C`_init\*(C'\fR as the
+function to call.
+.IP "\fB\-l\fR \fInamespec\fR" 4
+.IX Item "-l namespec"
+.PD 0
+.IP "\fB\-\-library=\fR\fInamespec\fR" 4
+.IX Item "--library=namespec"
+.PD
+Add the archive or object file specified by \fInamespec\fR to the
+list of files to link.  This option may be used any number of times.
+If \fInamespec\fR is of the form \fI:\fIfilename\fI\fR, \fBld\fR
+will search the library path for a file called \fIfilename\fR, otherwise it
+will search the library path for a file called \fIlib\fInamespec\fI.a\fR.
+.Sp
+On systems which support shared libraries, \fBld\fR may also search for
+files other than \fIlib\fInamespec\fI.a\fR.  Specifically, on \s-1ELF\s0
+and SunOS systems, \fBld\fR will search a directory for a library
+called \fIlib\fInamespec\fI.so\fR before searching for one called
+\&\fIlib\fInamespec\fI.a\fR.  (By convention, a \f(CW\*(C`.so\*(C'\fR extension
+indicates a shared library.)  Note that this behavior does not apply
+to \fI:\fIfilename\fI\fR, which always specifies a file called
+\&\fIfilename\fR.
+.Sp
+The linker will search an archive only once, at the location where it is
+specified on the command line.  If the archive defines a symbol which
+was undefined in some object which appeared before the archive on the
+command line, the linker will include the appropriate file(s) from the
+archive.  However, an undefined symbol in an object appearing later on
+the command line will not cause the linker to search the archive again.
+.Sp
+See the \fB\-(\fR option for a way to force the linker to search
+archives multiple times.
+.Sp
+You may list the same archive multiple times on the command line.
+.Sp
+This type of archive searching is standard for Unix linkers.  However,
+if you are using \fBld\fR on \s-1AIX\s0, note that it is different from the
+behaviour of the \s-1AIX\s0 linker.
+.IP "\fB\-L\fR \fIsearchdir\fR" 4
+.IX Item "-L searchdir"
+.PD 0
+.IP "\fB\-\-library\-path=\fR\fIsearchdir\fR" 4
+.IX Item "--library-path=searchdir"
+.PD
+Add path \fIsearchdir\fR to the list of paths that \fBld\fR will search
+for archive libraries and \fBld\fR control scripts.  You may use this
+option any number of times.  The directories are searched in the order
+in which they are specified on the command line.  Directories specified
+on the command line are searched before the default directories.  All
+\&\fB\-L\fR options apply to all \fB\-l\fR options, regardless of the
+order in which the options appear.  \fB\-L\fR options do not affect
+how \fBld\fR searches for a linker script unless \fB\-T\fR
+option is specified.
+.Sp
+If \fIsearchdir\fR begins with \f(CW\*(C`=\*(C'\fR, then the \f(CW\*(C`=\*(C'\fR will be replaced
+by the \fIsysroot prefix\fR, a path specified when the linker is configured.
+.Sp
+The default set of paths searched (without being specified with
+\&\fB\-L\fR) depends on which emulation mode \fBld\fR is using, and in
+some cases also on how it was configured.
+.Sp
+The paths can also be specified in a link script with the
+\&\f(CW\*(C`SEARCH_DIR\*(C'\fR command.  Directories specified this way are searched
+at the point in which the linker script appears in the command line.
+.IP "\fB\-m\fR \fIemulation\fR" 4
+.IX Item "-m emulation"
+Emulate the \fIemulation\fR linker.  You can list the available
+emulations with the \fB\-\-verbose\fR or \fB\-V\fR options.
+.Sp
+If the \fB\-m\fR option is not used, the emulation is taken from the
+\&\f(CW\*(C`LDEMULATION\*(C'\fR environment variable, if that is defined.
+.Sp
+Otherwise, the default emulation depends upon how the linker was
+configured.
+.IP "\fB\-M\fR" 4
+.IX Item "-M"
+.PD 0
+.IP "\fB\-\-print\-map\fR" 4
+.IX Item "--print-map"
+.PD
+Print a link map to the standard output.  A link map provides
+information about the link, including the following:
+.RS 4
+.IP "\(bu" 4
+Where object files are mapped into memory.
+.IP "\(bu" 4
+How common symbols are allocated.
+.IP "\(bu" 4
+All archive members included in the link, with a mention of the symbol
+which caused the archive member to be brought in.
+.IP "\(bu" 4
+The values assigned to symbols.
+.Sp
+Note \- symbols whose values are computed by an expression which
+involves a reference to a previous value of the same symbol may not
+have correct result displayed in the link map.  This is because the
+linker discards intermediate results and only retains the final value
+of an expression.  Under such circumstances the linker will display
+the final value enclosed by square brackets.  Thus for example a
+linker script containing:
+.Sp
+.Vb 3
+\&           foo = 1
+\&           foo = foo * 4
+\&           foo = foo + 8
+.Ve
+.Sp
+will produce the following output in the link map if the \fB\-M\fR
+option is used:
+.Sp
+.Vb 3
+\&           0x00000001                foo = 0x1
+\&           [0x0000000c]                foo = (foo * 0x4)
+\&           [0x0000000c]                foo = (foo + 0x8)
+.Ve
+.Sp
+See \fBExpressions\fR for more information about expressions in linker
+scripts.
+.RE
+.RS 4
+.RE
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nmagic\fR" 4
+.IX Item "--nmagic"
+.PD
+Turn off page alignment of sections, and mark the output as
+\&\f(CW\*(C`NMAGIC\*(C'\fR if possible.
+.IP "\fB\-N\fR" 4
+.IX Item "-N"
+.PD 0
+.IP "\fB\-\-omagic\fR" 4
+.IX Item "--omagic"
+.PD
+Set the text and data sections to be readable and writable.  Also, do
+not page-align the data segment, and disable linking against shared
+libraries.  If the output format supports Unix style magic numbers,
+mark the output as \f(CW\*(C`OMAGIC\*(C'\fR. Note: Although a writable text section
+is allowed for PE-COFF targets, it does not conform to the format
+specification published by Microsoft.
+.IP "\fB\-\-no\-omagic\fR" 4
+.IX Item "--no-omagic"
+This option negates most of the effects of the \fB\-N\fR option.  It
+sets the text section to be read-only, and forces the data segment to
+be page-aligned.  Note \- this option does not enable linking against
+shared libraries.  Use \fB\-Bdynamic\fR for this.
+.IP "\fB\-o\fR \fIoutput\fR" 4
+.IX Item "-o output"
+.PD 0
+.IP "\fB\-\-output=\fR\fIoutput\fR" 4
+.IX Item "--output=output"
+.PD
+Use \fIoutput\fR as the name for the program produced by \fBld\fR; if this
+option is not specified, the name \fIa.out\fR is used by default.  The
+script command \f(CW\*(C`OUTPUT\*(C'\fR can also specify the output file name.
+.IP "\fB\-O\fR \fIlevel\fR" 4
+.IX Item "-O level"
+If \fIlevel\fR is a numeric values greater than zero \fBld\fR optimizes
+the output.  This might take significantly longer and therefore probably
+should only be enabled for the final binary.  At the moment this
+option only affects \s-1ELF\s0 shared library generation.  Future releases of
+the linker may make more use of this option.  Also currently there is
+no difference in the linker's behaviour for different non-zero values
+of this option.  Again this may change with future releases.
+.IP "\fB\-q\fR" 4
+.IX Item "-q"
+.PD 0
+.IP "\fB\-\-emit\-relocs\fR" 4
+.IX Item "--emit-relocs"
+.PD
+Leave relocation sections and contents in fully linked executables.
+Post link analysis and optimization tools may need this information in
+order to perform correct modifications of executables.  This results
+in larger executables.
+.Sp
+This option is currently only supported on \s-1ELF\s0 platforms.
+.IP "\fB\-\-force\-dynamic\fR" 4
+.IX Item "--force-dynamic"
+Force the output file to have dynamic sections.  This option is specific
+to VxWorks targets.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocatable\fR" 4
+.IX Item "--relocatable"
+.PD
+Generate relocatable output\-\-\-i.e., generate an output file that can in
+turn serve as input to \fBld\fR.  This is often called \fIpartial
+linking\fR.  As a side effect, in environments that support standard Unix
+magic numbers, this option also sets the output file's magic number to
+\&\f(CW\*(C`OMAGIC\*(C'\fR.
+If this option is not specified, an absolute file is produced.  When
+linking \*(C+ programs, this option \fIwill not\fR resolve references to
+constructors; to do that, use \fB\-Ur\fR.
+.Sp
+When an input file does not have the same format as the output file,
+partial linking is only supported if that input file does not contain any
+relocations.  Different output formats can have further restrictions; for
+example some \f(CW\*(C`a.out\*(C'\fR\-based formats do not support partial linking
+with input files in other formats at all.
+.Sp
+This option does the same thing as \fB\-i\fR.
+.IP "\fB\-R\fR \fIfilename\fR" 4
+.IX Item "-R filename"
+.PD 0
+.IP "\fB\-\-just\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--just-symbols=filename"
+.PD
+Read symbol names and their addresses from \fIfilename\fR, but do not
+relocate it or include it in the output.  This allows your output file
+to refer symbolically to absolute locations of memory defined in other
+programs.  You may use this option more than once.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Omit all symbol information from the output file.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Omit debugger symbol information (but not all symbols) from the output file.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-trace\fR" 4
+.IX Item "--trace"
+.PD
+Print the names of the input files as \fBld\fR processes them.
+.IP "\fB\-T\fR \fIscriptfile\fR" 4
+.IX Item "-T scriptfile"
+.PD 0
+.IP "\fB\-\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the linker script.  This script replaces
+\&\fBld\fR's default linker script (rather than adding to it), so
+\&\fIcommandfile\fR must specify everything necessary to describe the
+output file.    If \fIscriptfile\fR does not exist in
+the current directory, \f(CW\*(C`ld\*(C'\fR looks for it in the directories
+specified by any preceding \fB\-L\fR options.  Multiple \fB\-T\fR
+options accumulate.
+.IP "\fB\-dT\fR \fIscriptfile\fR" 4
+.IX Item "-dT scriptfile"
+.PD 0
+.IP "\fB\-\-default\-script=\fR\fIscriptfile\fR" 4
+.IX Item "--default-script=scriptfile"
+.PD
+Use \fIscriptfile\fR as the default linker script.
+.Sp
+This option is similar to the \fB\-\-script\fR option except that
+processing of the script is delayed until after the rest of the
+command line has been processed.  This allows options placed after the
+\&\fB\-\-default\-script\fR option on the command line to affect the
+behaviour of the linker script, which can be important when the linker
+command line cannot be directly controlled by the user.  (eg because
+the command line is being constructed by another tool, such as
+\&\fBgcc\fR).
+.IP "\fB\-u\fR \fIsymbol\fR" 4
+.IX Item "-u symbol"
+.PD 0
+.IP "\fB\-\-undefined=\fR\fIsymbol\fR" 4
+.IX Item "--undefined=symbol"
+.PD
+Force \fIsymbol\fR to be entered in the output file as an undefined
+symbol.  Doing this may, for example, trigger linking of additional
+modules from standard libraries.  \fB\-u\fR may be repeated with
+different option arguments to enter additional undefined symbols.  This
+option is equivalent to the \f(CW\*(C`EXTERN\*(C'\fR linker script command.
+.IP "\fB\-Ur\fR" 4
+.IX Item "-Ur"
+For anything other than \*(C+ programs, this option is equivalent to
+\&\fB\-r\fR: it generates relocatable output\-\-\-i.e., an output file that can in
+turn serve as input to \fBld\fR.  When linking \*(C+ programs, \fB\-Ur\fR
+\&\fIdoes\fR resolve references to constructors, unlike \fB\-r\fR.
+It does not work to use \fB\-Ur\fR on files that were themselves linked
+with \fB\-Ur\fR; once the constructor table has been built, it cannot
+be added to.  Use \fB\-Ur\fR only for the last partial link, and
+\&\fB\-r\fR for the others.
+.IP "\fB\-\-unique[=\fR\fI\s-1SECTION\s0\fR\fB]\fR" 4
+.IX Item "--unique[=SECTION]"
+Creates a separate output section for every input section matching
+\&\fI\s-1SECTION\s0\fR, or if the optional wildcard \fI\s-1SECTION\s0\fR argument is
+missing, for every orphan input section.  An orphan section is one not
+specifically mentioned in a linker script.  You may use this option
+multiple times on the command line;  It prevents the normal merging of
+input sections with the same name, overriding output section assignments
+in a linker script.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD
+Display the version number for \fBld\fR.  The \fB\-V\fR option also
+lists the supported emulations.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Delete all local symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Delete all temporary local symbols.  (These symbols start with
+system-specific local label prefixes, typically \fB.L\fR for \s-1ELF\s0 systems
+or \fBL\fR for traditional a.out systems.)
+.IP "\fB\-y\fR \fIsymbol\fR" 4
+.IX Item "-y symbol"
+.PD 0
+.IP "\fB\-\-trace\-symbol=\fR\fIsymbol\fR" 4
+.IX Item "--trace-symbol=symbol"
+.PD
+Print the name of each linked file in which \fIsymbol\fR appears.  This
+option may be given any number of times.  On many systems it is necessary
+to prepend an underscore.
+.Sp
+This option is useful when you have an undefined symbol in your link but
+don't know where the reference is coming from.
+.IP "\fB\-Y\fR \fIpath\fR" 4
+.IX Item "-Y path"
+Add \fIpath\fR to the default library search path.  This option exists
+for Solaris compatibility.
+.IP "\fB\-z\fR \fIkeyword\fR" 4
+.IX Item "-z keyword"
+The recognized keywords are:
+.RS 4
+.IP "\fBcombreloc\fR" 4
+.IX Item "combreloc"
+Combines multiple reloc sections and sorts them to make dynamic symbol
+lookup caching possible.
+.IP "\fBdefs\fR" 4
+.IX Item "defs"
+Disallows undefined symbols in object files.  Undefined symbols in
+shared libraries are still allowed.
+.IP "\fBexecstack\fR" 4
+.IX Item "execstack"
+Marks the object as requiring executable stack.
+.IP "\fBinitfirst\fR" 4
+.IX Item "initfirst"
+This option is only meaningful when building a shared object.
+It marks the object so that its runtime initialization will occur
+before the runtime initialization of any other objects brought into
+the process at the same time.  Similarly the runtime finalization of
+the object will occur after the runtime finalization of any other
+objects.
+.IP "\fBinterpose\fR" 4
+.IX Item "interpose"
+Marks the object that its symbol table interposes before all symbols
+but the primary executable.
+.IP "\fBlazy\fR" 4
+.IX Item "lazy"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to defer function call resolution to the point when
+the function is called (lazy binding), rather than at load time.
+Lazy binding is the default.
+.IP "\fBloadfltr\fR" 4
+.IX Item "loadfltr"
+Marks  the object that its filters be processed immediately at
+runtime.
+.IP "\fBmuldefs\fR" 4
+.IX Item "muldefs"
+Allows multiple definitions.
+.IP "\fBnocombreloc\fR" 4
+.IX Item "nocombreloc"
+Disables multiple reloc sections combining.
+.IP "\fBnocopyreloc\fR" 4
+.IX Item "nocopyreloc"
+Disables production of copy relocs.
+.IP "\fBnodefaultlib\fR" 4
+.IX Item "nodefaultlib"
+Marks the object that the search for dependencies of this object will
+ignore any default library search paths.
+.IP "\fBnodelete\fR" 4
+.IX Item "nodelete"
+Marks the object shouldn't be unloaded at runtime.
+.IP "\fBnodlopen\fR" 4
+.IX Item "nodlopen"
+Marks the object not available to \f(CW\*(C`dlopen\*(C'\fR.
+.IP "\fBnodump\fR" 4
+.IX Item "nodump"
+Marks the object can not be dumped by \f(CW\*(C`dldump\*(C'\fR.
+.IP "\fBnoexecstack\fR" 4
+.IX Item "noexecstack"
+Marks the object as not requiring executable stack.
+.IP "\fBnorelro\fR" 4
+.IX Item "norelro"
+Don't create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBnow\fR" 4
+.IX Item "now"
+When generating an executable or shared library, mark it to tell the
+dynamic linker to resolve all symbols when the program is started, or
+when the shared library is linked to using dlopen, instead of
+deferring function call resolution to the point when the function is
+first called.
+.IP "\fBorigin\fR" 4
+.IX Item "origin"
+Marks the object may contain \f(CW$ORIGIN\fR.
+.IP "\fBrelro\fR" 4
+.IX Item "relro"
+Create an \s-1ELF\s0 \f(CW\*(C`PT_GNU_RELRO\*(C'\fR segment header in the object.
+.IP "\fBmax\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "max-page-size=value"
+Set the emulation maximum page size to \fIvalue\fR.
+.IP "\fBcommon\-page\-size=\fR\fIvalue\fR" 4
+.IX Item "common-page-size=value"
+Set the emulation common page size to \fIvalue\fR.
+.RE
+.RS 4
+.Sp
+Other keywords are ignored for Solaris compatibility.
+.RE
+.IP "\fB\-(\fR \fIarchives\fR \fB\-)\fR" 4
+.IX Item "-( archives -)"
+.PD 0
+.IP "\fB\-\-start\-group\fR \fIarchives\fR \fB\-\-end\-group\fR" 4
+.IX Item "--start-group archives --end-group"
+.PD
+The \fIarchives\fR should be a list of archive files.  They may be
+either explicit file names, or \fB\-l\fR options.
+.Sp
+The specified archives are searched repeatedly until no new undefined
+references are created.  Normally, an archive is searched only once in
+the order that it is specified on the command line.  If a symbol in that
+archive is needed to resolve an undefined symbol referred to by an
+object in an archive that appears later on the command line, the linker
+would not be able to resolve that reference.  By grouping the archives,
+they all be searched repeatedly until all possible references are
+resolved.
+.Sp
+Using this option has a significant performance cost.  It is best to use
+it only when there are unavoidable circular references between two or
+more archives.
+.IP "\fB\-\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--accept-unknown-input-arch"
+.PD 0
+.IP "\fB\-\-no\-accept\-unknown\-input\-arch\fR" 4
+.IX Item "--no-accept-unknown-input-arch"
+.PD
+Tells the linker to accept input files whose architecture cannot be
+recognised.  The assumption is that the user knows what they are doing
+and deliberately wants to link in these unknown input files.  This was
+the default behaviour of the linker, before release 2.14.  The default
+behaviour from release 2.14 onwards is to reject such input files, and
+so the \fB\-\-accept\-unknown\-input\-arch\fR option has been added to
+restore the old behaviour.
+.IP "\fB\-\-as\-needed\fR" 4
+.IX Item "--as-needed"
+.PD 0
+.IP "\fB\-\-no\-as\-needed\fR" 4
+.IX Item "--no-as-needed"
+.PD
+This option affects \s-1ELF\s0 \s-1DT_NEEDED\s0 tags for dynamic libraries mentioned
+on the command line after the \fB\-\-as\-needed\fR option.  Normally,
+the linker will add a \s-1DT_NEEDED\s0 tag for each dynamic library mentioned
+on the command line, regardless of whether the library is actually
+needed.  \fB\-\-as\-needed\fR causes a \s-1DT_NEEDED\s0 tag to only be emitted
+for a library that satisfies a symbol reference from regular objects
+which is undefined at the point that the library was linked, or, if
+the library is not found in the \s-1DT_NEEDED\s0 lists of other libraries
+linked up to that point, a reference from another dynamic library.
+\&\fB\-\-no\-as\-needed\fR restores the default behaviour.
+.IP "\fB\-\-add\-needed\fR" 4
+.IX Item "--add-needed"
+.PD 0
+.IP "\fB\-\-no\-add\-needed\fR" 4
+.IX Item "--no-add-needed"
+.PD
+This option affects the treatment of dynamic libraries from \s-1ELF\s0
+\&\s-1DT_NEEDED\s0 tags in dynamic libraries mentioned on the command line after
+the \fB\-\-no\-add\-needed\fR option.  Normally, the linker will add
+a \s-1DT_NEEDED\s0 tag for each dynamic library from \s-1DT_NEEDED\s0 tags.
+\&\fB\-\-no\-add\-needed\fR causes \s-1DT_NEEDED\s0 tags will never be emitted
+for those libraries from \s-1DT_NEEDED\s0 tags. \fB\-\-add\-needed\fR restores
+the default behaviour.
+.IP "\fB\-assert\fR \fIkeyword\fR" 4
+.IX Item "-assert keyword"
+This option is ignored for SunOS compatibility.
+.IP "\fB\-Bdynamic\fR" 4
+.IX Item "-Bdynamic"
+.PD 0
+.IP "\fB\-dy\fR" 4
+.IX Item "-dy"
+.IP "\fB\-call_shared\fR" 4
+.IX Item "-call_shared"
+.PD
+Link against dynamic libraries.  This is only meaningful on platforms
+for which shared libraries are supported.  This option is normally the
+default on such platforms.  The different variants of this option are
+for compatibility with various systems.  You may use this option
+multiple times on the command line: it affects library searching for
+\&\fB\-l\fR options which follow it.
+.IP "\fB\-Bgroup\fR" 4
+.IX Item "-Bgroup"
+Set the \f(CW\*(C`DF_1_GROUP\*(C'\fR flag in the \f(CW\*(C`DT_FLAGS_1\*(C'\fR entry in the dynamic
+section.  This causes the runtime linker to handle lookups in this
+object and its dependencies to be performed only inside the group.
+\&\fB\-\-unresolved\-symbols=report\-all\fR is implied.  This option is
+only meaningful on \s-1ELF\s0 platforms which support shared libraries.
+.IP "\fB\-Bstatic\fR" 4
+.IX Item "-Bstatic"
+.PD 0
+.IP "\fB\-dn\fR" 4
+.IX Item "-dn"
+.IP "\fB\-non_shared\fR" 4
+.IX Item "-non_shared"
+.IP "\fB\-static\fR" 4
+.IX Item "-static"
+.PD
+Do not link against shared libraries.  This is only meaningful on
+platforms for which shared libraries are supported.  The different
+variants of this option are for compatibility with various systems.  You
+may use this option multiple times on the command line: it affects
+library searching for \fB\-l\fR options which follow it.  This
+option also implies \fB\-\-unresolved\-symbols=report\-all\fR.  This
+option can be used with \fB\-shared\fR.  Doing so means that a
+shared library is being created but that all of the library's external
+references must be resolved by pulling in entries from static
+libraries.
+.IP "\fB\-Bsymbolic\fR" 4
+.IX Item "-Bsymbolic"
+When creating a shared library, bind references to global symbols to the
+definition within the shared library, if any.  Normally, it is possible
+for a program linked against a shared library to override the definition
+within the shared library.  This option is only meaningful on \s-1ELF\s0
+platforms which support shared libraries.
+.IP "\fB\-Bsymbolic\-functions\fR" 4
+.IX Item "-Bsymbolic-functions"
+When creating a shared library, bind references to global function
+symbols to the definition within the shared library, if any.
+This option is only meaningful on \s-1ELF\s0 platforms which support shared
+libraries.
+.IP "\fB\-\-dynamic\-list=\fR\fIdynamic-list-file\fR" 4
+.IX Item "--dynamic-list=dynamic-list-file"
+Specify the name of a dynamic list file to the linker.  This is
+typically used when creating shared libraries to specify a list of
+global symbols whose references shouldn't be bound to the definition
+within the shared library, or creating dynamically linked executables
+to specify a list of symbols which should be added to the symbol table
+in the executable.  This option is only meaningful on \s-1ELF\s0 platforms
+which support shared libraries.
+.Sp
+The format of the dynamic list is the same as the version node without
+scope and node name.  See \fB\s-1VERSION\s0\fR for more information.
+.IP "\fB\-\-dynamic\-list\-data\fR" 4
+.IX Item "--dynamic-list-data"
+Include all global data symbols to the dynamic list.
+.IP "\fB\-\-dynamic\-list\-cpp\-new\fR" 4
+.IX Item "--dynamic-list-cpp-new"
+Provide the builtin dynamic list for \*(C+ operator new and delete.  It
+is mainly useful for building shared libstdc++.
+.IP "\fB\-\-dynamic\-list\-cpp\-typeinfo\fR" 4
+.IX Item "--dynamic-list-cpp-typeinfo"
+Provide the builtin dynamic list for \*(C+ runtime type identification.
+.IP "\fB\-\-check\-sections\fR" 4
+.IX Item "--check-sections"
+.PD 0
+.IP "\fB\-\-no\-check\-sections\fR" 4
+.IX Item "--no-check-sections"
+.PD
+Asks the linker \fInot\fR to check section addresses after they have
+been assigned to see if there are any overlaps.  Normally the linker will
+perform this check, and if it finds any overlaps it will produce
+suitable error messages.  The linker does know about, and does make
+allowances for sections in overlays.  The default behaviour can be
+restored by using the command line switch \fB\-\-check\-sections\fR.
+Section overlap is not usually checked for relocatable links.  You can
+force checking in that case by using the \fB\-\-check\-sections\fR
+option.
+.IP "\fB\-\-cref\fR" 4
+.IX Item "--cref"
+Output a cross reference table.  If a linker map file is being
+generated, the cross reference table is printed to the map file.
+Otherwise, it is printed on the standard output.
+.Sp
+The format of the table is intentionally simple, so that it may be
+easily processed by a script if necessary.  The symbols are printed out,
+sorted by name.  For each symbol, a list of file names is given.  If the
+symbol is defined, the first file listed is the location of the
+definition.  The remaining files contain references to the symbol.
+.IP "\fB\-\-no\-define\-common\fR" 4
+.IX Item "--no-define-common"
+This option inhibits the assignment of addresses to common symbols.
+The script command \f(CW\*(C`INHIBIT_COMMON_ALLOCATION\*(C'\fR has the same effect.
+.Sp
+The \fB\-\-no\-define\-common\fR option allows decoupling
+the decision to assign addresses to Common symbols from the choice
+of the output file type; otherwise a non-Relocatable output type
+forces assigning addresses to Common symbols.
+Using \fB\-\-no\-define\-common\fR allows Common symbols that are referenced
+from a shared library to be assigned addresses only in the main program.
+This eliminates the unused duplicate space in the shared library,
+and also prevents any possible confusion over resolving to the wrong
+duplicate when there are many dynamic modules with specialized search
+paths for runtime symbol resolution.
+.IP "\fB\-\-defsym=\fR\fIsymbol\fR\fB=\fR\fIexpression\fR" 4
+.IX Item "--defsym=symbol=expression"
+Create a global symbol in the output file, containing the absolute
+address given by \fIexpression\fR.  You may use this option as many
+times as necessary to define multiple symbols in the command line.  A
+limited form of arithmetic is supported for the \fIexpression\fR in this
+context: you may give a hexadecimal constant or the name of an existing
+symbol, or use \f(CW\*(C`+\*(C'\fR and \f(CW\*(C`\-\*(C'\fR to add or subtract hexadecimal
+constants or symbols.  If you need more elaborate expressions, consider
+using the linker command language from a script.  \fINote:\fR there should be no white
+space between \fIsymbol\fR, the equals sign ("\fB=\fR"), and
+\&\fIexpression\fR.
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD 0
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+.PD
+These options control whether to demangle symbol names in error messages
+and other output.  When the linker is told to demangle, it tries to
+present symbol names in a readable fashion: it strips leading
+underscores if they are used by the object file format, and converts \*(C+
+mangled symbol names into user readable names.  Different compilers have
+different mangling styles.  The optional demangling style argument can be used
+to choose an appropriate demangling style for your compiler.  The linker will
+demangle by default unless the environment variable \fB\s-1COLLECT_NO_DEMANGLE\s0\fR
+is set.  These options may be used to override the default.
+.IP "\fB\-I\fR\fIfile\fR" 4
+.IX Item "-Ifile"
+.PD 0
+.IP "\fB\-\-dynamic\-linker=\fR\fIfile\fR" 4
+.IX Item "--dynamic-linker=file"
+.PD
+Set the name of the dynamic linker.  This is only meaningful when
+generating dynamically linked \s-1ELF\s0 executables.  The default dynamic
+linker is normally correct; don't use this unless you know what you are
+doing.
+.IP "\fB\-\-fatal\-warnings\fR" 4
+.IX Item "--fatal-warnings"
+.PD 0
+.IP "\fB\-\-no\-fatal\-warnings\fR" 4
+.IX Item "--no-fatal-warnings"
+.PD
+Treat all warnings as errors.  The default behaviour can be restored
+with the option \fB\-\-no\-fatal\-warnings\fR.
+.IP "\fB\-\-force\-exe\-suffix\fR" 4
+.IX Item "--force-exe-suffix"
+Make sure that an output file has a .exe suffix.
+.Sp
+If a successfully built fully linked output file does not have a
+\&\f(CW\*(C`.exe\*(C'\fR or \f(CW\*(C`.dll\*(C'\fR suffix, this option forces the linker to copy
+the output file to one of the same name with a \f(CW\*(C`.exe\*(C'\fR suffix. This
+option is useful when using unmodified Unix makefiles on a Microsoft
+Windows host, since some versions of Windows won't run an image unless
+it ends in a \f(CW\*(C`.exe\*(C'\fR suffix.
+.IP "\fB\-\-gc\-sections\fR" 4
+.IX Item "--gc-sections"
+.PD 0
+.IP "\fB\-\-no\-gc\-sections\fR" 4
+.IX Item "--no-gc-sections"
+.PD
+Enable garbage collection of unused input sections.  It is ignored on
+targets that do not support this option.  The default behaviour (of not
+performing this garbage collection) can be restored by specifying
+\&\fB\-\-no\-gc\-sections\fR on the command line.
+.Sp
+\&\fB\-\-gc\-sections\fR decides which input sections are used by
+examining symbols and relocations.  The section containing the entry
+symbol and all sections containing symbols undefined on the
+command-line will be kept, as will sections containing symbols
+referenced by dynamic objects.  Note that when building shared
+libraries, the linker must assume that any visible symbol is
+referenced.  Once this initial set of sections has been determined,
+the linker recursively marks as used any section referenced by their
+relocations.  See \fB\-\-entry\fR and \fB\-\-undefined\fR.
+.Sp
+This option can be set when doing a partial link (enabled with option
+\&\fB\-r\fR).  In this case the root of symbols kept must be explicitely 
+specified either by an \fB\-\-entry\fR or \fB\-\-undefined\fR option or by
+a \f(CW\*(C`ENTRY\*(C'\fR command in the linker script.
+.IP "\fB\-\-print\-gc\-sections\fR" 4
+.IX Item "--print-gc-sections"
+.PD 0
+.IP "\fB\-\-no\-print\-gc\-sections\fR" 4
+.IX Item "--no-print-gc-sections"
+.PD
+List all sections removed by garbage collection.  The listing is
+printed on stderr.  This option is only effective if garbage
+collection has been enabled via the \fB\-\-gc\-sections\fR) option.  The
+default behaviour (of not listing the sections that are removed) can
+be restored by specifying \fB\-\-no\-print\-gc\-sections\fR on the command
+line.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the command-line options on the standard output and exit.
+.IP "\fB\-\-target\-help\fR" 4
+.IX Item "--target-help"
+Print a summary of all target specific options on the standard output and exit.
+.IP "\fB\-Map=\fR\fImapfile\fR" 4
+.IX Item "-Map=mapfile"
+Print a link map to the file \fImapfile\fR.  See the description of the
+\&\fB\-M\fR option, above.
+.IP "\fB\-\-no\-keep\-memory\fR" 4
+.IX Item "--no-keep-memory"
+\&\fBld\fR normally optimizes for speed over memory usage by caching the
+symbol tables of input files in memory.  This option tells \fBld\fR to
+instead optimize for memory usage, by rereading the symbol tables as
+necessary.  This may be required if \fBld\fR runs out of memory space
+while linking a large executable.
+.IP "\fB\-\-no\-undefined\fR" 4
+.IX Item "--no-undefined"
+.PD 0
+.IP "\fB\-z defs\fR" 4
+.IX Item "-z defs"
+.PD
+Report unresolved symbol references from regular object files.  This
+is done even if the linker is creating a non-symbolic shared library.
+The switch \fB\-\-[no\-]allow\-shlib\-undefined\fR controls the
+behaviour for reporting unresolved references found in shared
+libraries being linked in.
+.IP "\fB\-\-allow\-multiple\-definition\fR" 4
+.IX Item "--allow-multiple-definition"
+.PD 0
+.IP "\fB\-z muldefs\fR" 4
+.IX Item "-z muldefs"
+.PD
+Normally when a symbol is defined multiple times, the linker will
+report a fatal error. These options allow multiple definitions and the
+first definition will be used.
+.IP "\fB\-\-allow\-shlib\-undefined\fR" 4
+.IX Item "--allow-shlib-undefined"
+.PD 0
+.IP "\fB\-\-no\-allow\-shlib\-undefined\fR" 4
+.IX Item "--no-allow-shlib-undefined"
+.PD
+Allows or disallows undefined symbols in shared libraries.
+This switch is similar to \fB\-\-no\-undefined\fR except that it
+determines the behaviour when the undefined symbols are in a
+shared library rather than a regular object file.  It does not affect
+how undefined symbols in regular object files are handled.
+.Sp
+The default behaviour is to report errors for any undefined symbols
+referenced in shared libraries if the linker is being used to create
+an executable, but to allow them if the linker is being used to create
+a shared library.
+.Sp
+The reasons for allowing undefined symbol references in shared
+libraries specified at link time are that:
+.RS 4
+.IP "\(bu" 4
+A shared library specified at link time may not be the same as the one
+that is available at load time, so the symbol might actually be
+resolvable at load time.
+.IP "\(bu" 4
+There are some operating systems, eg BeOS and \s-1HPPA\s0, where undefined
+symbols in shared libraries are normal.
+.Sp
+The BeOS kernel for example patches shared libraries at load time to
+select whichever function is most appropriate for the current
+architecture.  This is used, for example, to dynamically select an
+appropriate memset function.
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-no\-undefined\-version\fR" 4
+.IX Item "--no-undefined-version"
+Normally when a symbol has an undefined version, the linker will ignore
+it. This option disallows symbols with undefined version and a fatal error
+will be issued instead.
+.IP "\fB\-\-default\-symver\fR" 4
+.IX Item "--default-symver"
+Create and use a default symbol version (the soname) for unversioned
+exported symbols.
+.IP "\fB\-\-default\-imported\-symver\fR" 4
+.IX Item "--default-imported-symver"
+Create and use a default symbol version (the soname) for unversioned
+imported symbols.
+.IP "\fB\-\-no\-warn\-mismatch\fR" 4
+.IX Item "--no-warn-mismatch"
+Normally \fBld\fR will give an error if you try to link together input
+files that are mismatched for some reason, perhaps because they have
+been compiled for different processors or for different endiannesses.
+This option tells \fBld\fR that it should silently permit such possible
+errors.  This option should only be used with care, in cases when you
+have taken some special action that ensures that the linker errors are
+inappropriate.
+.IP "\fB\-\-no\-warn\-search\-mismatch\fR" 4
+.IX Item "--no-warn-search-mismatch"
+Normally \fBld\fR will give a warning if it finds an incompatible
+library during a library search.  This option silences the warning.
+.IP "\fB\-\-no\-whole\-archive\fR" 4
+.IX Item "--no-whole-archive"
+Turn off the effect of the \fB\-\-whole\-archive\fR option for subsequent
+archive files.
+.IP "\fB\-\-noinhibit\-exec\fR" 4
+.IX Item "--noinhibit-exec"
+Retain the executable output file whenever it is still usable.
+Normally, the linker will not produce an output file if it encounters
+errors during the link process; it exits without writing an output file
+when it issues any error whatsoever.
+.IP "\fB\-nostdlib\fR" 4
+.IX Item "-nostdlib"
+Only search library directories explicitly specified on the
+command line.  Library directories specified in linker scripts
+(including linker scripts specified on the command line) are ignored.
+.IP "\fB\-\-oformat=\fR\fIoutput-format\fR" 4
+.IX Item "--oformat=output-format"
+\&\fBld\fR may be configured to support more than one kind of object
+file.  If your \fBld\fR is configured this way, you can use the
+\&\fB\-\-oformat\fR option to specify the binary format for the output
+object file.  Even when \fBld\fR is configured to support alternative
+object formats, you don't usually need to specify this, as \fBld\fR
+should be configured to produce as a default output format the most
+usual format on each machine.  \fIoutput-format\fR is a text string, the
+name of a particular format supported by the \s-1BFD\s0 libraries.  (You can
+list the available binary formats with \fBobjdump \-i\fR.)  The script
+command \f(CW\*(C`OUTPUT_FORMAT\*(C'\fR can also specify the output format, but
+this option overrides it.
+.IP "\fB\-pie\fR" 4
+.IX Item "-pie"
+.PD 0
+.IP "\fB\-\-pic\-executable\fR" 4
+.IX Item "--pic-executable"
+.PD
+Create a position independent executable.  This is currently only supported on
+\&\s-1ELF\s0 platforms.  Position independent executables are similar to shared
+libraries in that they are relocated by the dynamic linker to the virtual
+address the \s-1OS\s0 chooses for them (which can vary between invocations).  Like
+normal dynamically linked executables they can be executed and symbols
+defined in the executable cannot be overridden by shared libraries.
+.IP "\fB\-qmagic\fR" 4
+.IX Item "-qmagic"
+This option is ignored for Linux compatibility.
+.IP "\fB\-Qy\fR" 4
+.IX Item "-Qy"
+This option is ignored for \s-1SVR4\s0 compatibility.
+.IP "\fB\-\-relax\fR" 4
+.IX Item "--relax"
+An option with machine dependent effects.
+This option is only supported on a few targets.
+.Sp
+On some platforms, the \fB\-\-relax\fR option performs global
+optimizations that become possible when the linker resolves addressing
+in the program, such as relaxing address modes and synthesizing new
+instructions in the output object file.
+.Sp
+On some platforms these link time global optimizations may make symbolic
+debugging of the resulting executable impossible.
+This is known to be
+the case for the Matsushita \s-1MN10200\s0 and \s-1MN10300\s0 family of processors.
+.Sp
+On platforms where this is not supported, \fB\-\-relax\fR is accepted,
+but ignored.
+.IP "\fB\-\-retain\-symbols\-file=\fR\fIfilename\fR" 4
+.IX Item "--retain-symbols-file=filename"
+Retain \fIonly\fR the symbols listed in the file \fIfilename\fR,
+discarding all others.  \fIfilename\fR is simply a flat file, with one
+symbol name per line.  This option is especially useful in environments
+(such as VxWorks)
+where a large global symbol table is accumulated gradually, to conserve
+run-time memory.
+.Sp
+\&\fB\-\-retain\-symbols\-file\fR does \fInot\fR discard undefined symbols,
+or symbols needed for relocations.
+.Sp
+You may only specify \fB\-\-retain\-symbols\-file\fR once in the command
+line.  It overrides \fB\-s\fR and \fB\-S\fR.
+.IP "\fB\-rpath=\fR\fIdir\fR" 4
+.IX Item "-rpath=dir"
+Add a directory to the runtime library search path.  This is used when
+linking an \s-1ELF\s0 executable with shared objects.  All \fB\-rpath\fR
+arguments are concatenated and passed to the runtime linker, which uses
+them to locate shared objects at runtime.  The \fB\-rpath\fR option is
+also used when locating shared objects which are needed by shared
+objects explicitly included in the link; see the description of the
+\&\fB\-rpath\-link\fR option.  If \fB\-rpath\fR is not used when linking an
+\&\s-1ELF\s0 executable, the contents of the environment variable
+\&\f(CW\*(C`LD_RUN_PATH\*(C'\fR will be used if it is defined.
+.Sp
+The \fB\-rpath\fR option may also be used on SunOS.  By default, on
+SunOS, the linker will form a runtime search patch out of all the
+\&\fB\-L\fR options it is given.  If a \fB\-rpath\fR option is used, the
+runtime search path will be formed exclusively using the \fB\-rpath\fR
+options, ignoring the \fB\-L\fR options.  This can be useful when using
+gcc, which adds many \fB\-L\fR options which may be on \s-1NFS\s0 mounted
+file systems.
+.Sp
+For compatibility with other \s-1ELF\s0 linkers, if the \fB\-R\fR option is
+followed by a directory name, rather than a file name, it is treated as
+the \fB\-rpath\fR option.
+.IP "\fB\-rpath\-link=\fR\fIdir\fR" 4
+.IX Item "-rpath-link=dir"
+When using \s-1ELF\s0 or SunOS, one shared library may require another.  This
+happens when an \f(CW\*(C`ld \-shared\*(C'\fR link includes a shared library as one
+of the input files.
+.Sp
+When the linker encounters such a dependency when doing a non-shared,
+non-relocatable link, it will automatically try to locate the required
+shared library and include it in the link, if it is not included
+explicitly.  In such a case, the \fB\-rpath\-link\fR option
+specifies the first set of directories to search.  The
+\&\fB\-rpath\-link\fR option may specify a sequence of directory names
+either by specifying a list of names separated by colons, or by
+appearing multiple times.
+.Sp
+This option should be used with caution as it overrides the search path
+that may have been hard compiled into a shared library. In such a case it
+is possible to use unintentionally a different search path than the
+runtime linker would do.
+.Sp
+The linker uses the following search paths to locate required shared
+libraries:
+.RS 4
+.IP "1." 4
+Any directories specified by \fB\-rpath\-link\fR options.
+.IP "2." 4
+Any directories specified by \fB\-rpath\fR options.  The difference
+between \fB\-rpath\fR and \fB\-rpath\-link\fR is that directories
+specified by \fB\-rpath\fR options are included in the executable and
+used at runtime, whereas the \fB\-rpath\-link\fR option is only effective
+at link time. Searching \fB\-rpath\fR in this way is only supported
+by native linkers and cross linkers which have been configured with
+the \fB\-\-with\-sysroot\fR option.
+.IP "3." 4
+On an \s-1ELF\s0 system, for native linkers, if the \fB\-rpath\fR and
+\&\fB\-rpath\-link\fR options were not used, search the contents of the
+environment variable \f(CW\*(C`LD_RUN_PATH\*(C'\fR.
+.IP "4." 4
+On SunOS, if the \fB\-rpath\fR option was not used, search any
+directories specified using \fB\-L\fR options.
+.IP "5." 4
+For a native linker, the search the contents of the environment
+variable \f(CW\*(C`LD_LIBRARY_PATH\*(C'\fR.
+.IP "6." 4
+For a native \s-1ELF\s0 linker, the directories in \f(CW\*(C`DT_RUNPATH\*(C'\fR or
+\&\f(CW\*(C`DT_RPATH\*(C'\fR of a shared library are searched for shared
+libraries needed by it. The \f(CW\*(C`DT_RPATH\*(C'\fR entries are ignored if
+\&\f(CW\*(C`DT_RUNPATH\*(C'\fR entries exist.
+.IP "7." 4
+The default directories, normally \fI/lib\fR and \fI/usr/lib\fR.
+.IP "8." 4
+For a native linker on an \s-1ELF\s0 system, if the file \fI/etc/ld.so.conf\fR
+exists, the list of directories found in that file.
+.RE
+.RS 4
+.Sp
+If the required shared library is not found, the linker will issue a
+warning and continue with the link.
+.RE
+.IP "\fB\-shared\fR" 4
+.IX Item "-shared"
+.PD 0
+.IP "\fB\-Bshareable\fR" 4
+.IX Item "-Bshareable"
+.PD
+Create a shared library.  This is currently only supported on \s-1ELF\s0, \s-1XCOFF\s0
+and SunOS platforms.  On SunOS, the linker will automatically create a
+shared library if the \fB\-e\fR option is not used and there are
+undefined symbols in the link.
+.IP "\fB\-\-sort\-common\fR" 4
+.IX Item "--sort-common"
+.PD 0
+.IP "\fB\-\-sort\-common=ascending\fR" 4
+.IX Item "--sort-common=ascending"
+.IP "\fB\-\-sort\-common=descending\fR" 4
+.IX Item "--sort-common=descending"
+.PD
+This option tells \fBld\fR to sort the common symbols by alignment in
+ascending or descending order when it places them in the appropriate output
+sections.  The symbol alignments considered are sixteen-byte or larger,
+eight-byte, four-byte, two-byte, and one-byte. This is to prevent gaps
+between symbols due to alignment constraints.  If no sorting order is
+specified, then descending order is assumed.
+.IP "\fB\-\-sort\-section=name\fR" 4
+.IX Item "--sort-section=name"
+This option will apply \f(CW\*(C`SORT_BY_NAME\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-sort\-section=alignment\fR" 4
+.IX Item "--sort-section=alignment"
+This option will apply \f(CW\*(C`SORT_BY_ALIGNMENT\*(C'\fR to all wildcard section
+patterns in the linker script.
+.IP "\fB\-\-split\-by\-file[=\fR\fIsize\fR\fB]\fR" 4
+.IX Item "--split-by-file[=size]"
+Similar to \fB\-\-split\-by\-reloc\fR but creates a new output section for
+each input file when \fIsize\fR is reached.  \fIsize\fR defaults to a
+size of 1 if not given.
+.IP "\fB\-\-split\-by\-reloc[=\fR\fIcount\fR\fB]\fR" 4
+.IX Item "--split-by-reloc[=count]"
+Tries to creates extra sections in the output file so that no single
+output section in the file contains more than \fIcount\fR relocations.
+This is useful when generating huge relocatable files for downloading into
+certain real time kernels with the \s-1COFF\s0 object file format; since \s-1COFF\s0
+cannot represent more than 65535 relocations in a single section.  Note
+that this will fail to work with object file formats which do not
+support arbitrary sections.  The linker will not split up individual
+input sections for redistribution, so if a single input section contains
+more than \fIcount\fR relocations one output section will contain that
+many relocations.  \fIcount\fR defaults to a value of 32768.
+.IP "\fB\-\-stats\fR" 4
+.IX Item "--stats"
+Compute and display statistics about the operation of the linker, such
+as execution time and memory usage.
+.IP "\fB\-\-sysroot=\fR\fIdirectory\fR" 4
+.IX Item "--sysroot=directory"
+Use \fIdirectory\fR as the location of the sysroot, overriding the
+configure-time default.  This option is only supported by linkers
+that were configured using \fB\-\-with\-sysroot\fR.
+.IP "\fB\-\-traditional\-format\fR" 4
+.IX Item "--traditional-format"
+For some targets, the output of \fBld\fR is different in some ways from
+the output of some existing linker.  This switch requests \fBld\fR to
+use the traditional format instead.
+.Sp
+For example, on SunOS, \fBld\fR combines duplicate entries in the
+symbol string table.  This can reduce the size of an output file with
+full debugging information by over 30 percent.  Unfortunately, the SunOS
+\&\f(CW\*(C`dbx\*(C'\fR program can not read the resulting program (\f(CW\*(C`gdb\*(C'\fR has no
+trouble).  The \fB\-\-traditional\-format\fR switch tells \fBld\fR to not
+combine duplicate entries.
+.IP "\fB\-\-section\-start=\fR\fIsectionname\fR\fB=\fR\fIorg\fR" 4
+.IX Item "--section-start=sectionname=org"
+Locate a section in the output file at the absolute
+address given by \fIorg\fR.  You may use this option as many
+times as necessary to locate multiple sections in the command
+line.
+\&\fIorg\fR must be a single hexadecimal integer;
+for compatibility with other linkers, you may omit the leading
+\&\fB0x\fR usually associated with hexadecimal values.  \fINote:\fR there
+should be no white space between \fIsectionname\fR, the equals
+sign ("\fB=\fR"), and \fIorg\fR.
+.IP "\fB\-Tbss=\fR\fIorg\fR" 4
+.IX Item "-Tbss=org"
+.PD 0
+.IP "\fB\-Tdata=\fR\fIorg\fR" 4
+.IX Item "-Tdata=org"
+.IP "\fB\-Ttext=\fR\fIorg\fR" 4
+.IX Item "-Ttext=org"
+.PD
+Same as \fB\-\-section\-start\fR, with \f(CW\*(C`.bss\*(C'\fR, \f(CW\*(C`.data\*(C'\fR or
+\&\f(CW\*(C`.text\*(C'\fR as the \fIsectionname\fR.
+.IP "\fB\-Ttext\-segment=\fR\fIorg\fR" 4
+.IX Item "-Ttext-segment=org"
+When creating an \s-1ELF\s0 executable or shared object, it will set the address
+of the first byte of the text segment.
+.IP "\fB\-\-unresolved\-symbols=\fR\fImethod\fR" 4
+.IX Item "--unresolved-symbols=method"
+Determine how to handle unresolved symbols.  There are four possible
+values for \fBmethod\fR:
+.RS 4
+.IP "\fBignore-all\fR" 4
+.IX Item "ignore-all"
+Do not report any unresolved symbols.
+.IP "\fBreport-all\fR" 4
+.IX Item "report-all"
+Report all unresolved symbols.  This is the default.
+.IP "\fBignore-in-object-files\fR" 4
+.IX Item "ignore-in-object-files"
+Report unresolved symbols that are contained in shared libraries, but
+ignore them if they come from regular object files.
+.IP "\fBignore-in-shared-libs\fR" 4
+.IX Item "ignore-in-shared-libs"
+Report unresolved symbols that come from regular object files, but
+ignore them if they come from shared libraries.  This can be useful
+when creating a dynamic binary and it is known that all the shared
+libraries that it should be referencing are included on the linker's
+command line.
+.RE
+.RS 4
+.Sp
+The behaviour for shared libraries on their own can also be controlled
+by the \fB\-\-[no\-]allow\-shlib\-undefined\fR option.
+.Sp
+Normally the linker will generate an error message for each reported
+unresolved symbol but the option \fB\-\-warn\-unresolved\-symbols\fR
+can change this to a warning.
+.RE
+.IP "\fB\-\-dll\-verbose\fR" 4
+.IX Item "--dll-verbose"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Display the version number for \fBld\fR and list the linker emulations
+supported.  Display which input files can and cannot be opened.  Display
+the linker script being used by the linker.
+.IP "\fB\-\-version\-script=\fR\fIversion-scriptfile\fR" 4
+.IX Item "--version-script=version-scriptfile"
+Specify the name of a version script to the linker.  This is typically
+used when creating shared libraries to specify additional information
+about the version hierarchy for the library being created.  This option
+is only fully supported on \s-1ELF\s0 platforms which support shared libraries;
+see \fB\s-1VERSION\s0\fR.  It is partially supported on \s-1PE\s0 platforms, which can
+use version scripts to filter symbol visibility in auto-export mode: any
+symbols marked \fBlocal\fR in the version script will not be exported.
+.IP "\fB\-\-warn\-common\fR" 4
+.IX Item "--warn-common"
+Warn when a common symbol is combined with another common symbol or with
+a symbol definition.  Unix linkers allow this somewhat sloppy practise,
+but linkers on some other operating systems do not.  This option allows
+you to find potential problems from combining global symbols.
+Unfortunately, some C libraries use this practise, so you may get some
+warnings about symbols in the libraries as well as in your programs.
+.Sp
+There are three kinds of global symbols, illustrated here by C examples:
+.RS 4
+.IP "\fBint i = 1;\fR" 4
+.IX Item "int i = 1;"
+A definition, which goes in the initialized data section of the output
+file.
+.IP "\fBextern int i;\fR" 4
+.IX Item "extern int i;"
+An undefined reference, which does not allocate space.
+There must be either a definition or a common symbol for the
+variable somewhere.
+.IP "\fBint i;\fR" 4
+.IX Item "int i;"
+A common symbol.  If there are only (one or more) common symbols for a
+variable, it goes in the uninitialized data area of the output file.
+The linker merges multiple common symbols for the same variable into a
+single symbol.  If they are of different sizes, it picks the largest
+size.  The linker turns a common symbol into a declaration, if there is
+a definition of the same variable.
+.RE
+.RS 4
+.Sp
+The \fB\-\-warn\-common\fR option can produce five kinds of warnings.
+Each warning consists of a pair of lines: the first describes the symbol
+just encountered, and the second describes the previous symbol
+encountered with the same name.  One or both of the two symbols will be
+a common symbol.
+.IP "1." 4
+Turning a common symbol into a reference, because there is already a
+definition for the symbol.
+.Sp
+.Vb 3
+\&        <file>(<section>): warning: common of \`<symbol>\*(Aq
+\&           overridden by definition
+\&        <file>(<section>): warning: defined here
+.Ve
+.IP "2." 4
+Turning a common symbol into a reference, because a later definition for
+the symbol is encountered.  This is the same as the previous case,
+except that the symbols are encountered in a different order.
+.Sp
+.Vb 3
+\&        <file>(<section>): warning: definition of \`<symbol>\*(Aq
+\&           overriding common
+\&        <file>(<section>): warning: common is here
+.Ve
+.IP "3." 4
+Merging a common symbol with a previous same-sized common symbol.
+.Sp
+.Vb 3
+\&        <file>(<section>): warning: multiple common
+\&           of \`<symbol>\*(Aq
+\&        <file>(<section>): warning: previous common is here
+.Ve
+.IP "4." 4
+Merging a common symbol with a previous larger common symbol.
+.Sp
+.Vb 3
+\&        <file>(<section>): warning: common of \`<symbol>\*(Aq
+\&           overridden by larger common
+\&        <file>(<section>): warning: larger common is here
+.Ve
+.IP "5." 4
+Merging a common symbol with a previous smaller common symbol.  This is
+the same as the previous case, except that the symbols are
+encountered in a different order.
+.Sp
+.Vb 3
+\&        <file>(<section>): warning: common of \`<symbol>\*(Aq
+\&           overriding smaller common
+\&        <file>(<section>): warning: smaller common is here
+.Ve
+.RE
+.RS 4
+.RE
+.IP "\fB\-\-warn\-constructors\fR" 4
+.IX Item "--warn-constructors"
+Warn if any global constructors are used.  This is only useful for a few
+object file formats.  For formats like \s-1COFF\s0 or \s-1ELF\s0, the linker can not
+detect the use of global constructors.
+.IP "\fB\-\-warn\-multiple\-gp\fR" 4
+.IX Item "--warn-multiple-gp"
+Warn if multiple global pointer values are required in the output file.
+This is only meaningful for certain processors, such as the Alpha.
+Specifically, some processors put large-valued constants in a special
+section.  A special register (the global pointer) points into the middle
+of this section, so that constants can be loaded efficiently via a
+base-register relative addressing mode.  Since the offset in
+base-register relative mode is fixed and relatively small (e.g., 16
+bits), this limits the maximum size of the constant pool.  Thus, in
+large programs, it is often necessary to use multiple global pointer
+values in order to be able to address all possible constants.  This
+option causes a warning to be issued whenever this case occurs.
+.IP "\fB\-\-warn\-once\fR" 4
+.IX Item "--warn-once"
+Only warn once for each undefined symbol, rather than once per module
+which refers to it.
+.IP "\fB\-\-warn\-section\-align\fR" 4
+.IX Item "--warn-section-align"
+Warn if the address of an output section is changed because of
+alignment.  Typically, the alignment will be set by an input section.
+The address will only be changed if it not explicitly specified; that
+is, if the \f(CW\*(C`SECTIONS\*(C'\fR command does not specify a start address for
+the section.
+.IP "\fB\-\-warn\-shared\-textrel\fR" 4
+.IX Item "--warn-shared-textrel"
+Warn if the linker adds a \s-1DT_TEXTREL\s0 to a shared object.
+.IP "\fB\-\-warn\-alternate\-em\fR" 4
+.IX Item "--warn-alternate-em"
+Warn if an object has alternate \s-1ELF\s0 machine code.
+.IP "\fB\-\-warn\-unresolved\-symbols\fR" 4
+.IX Item "--warn-unresolved-symbols"
+If the linker is going to report an unresolved symbol (see the option
+\&\fB\-\-unresolved\-symbols\fR) it will normally generate an error.
+This option makes it generate a warning instead.
+.IP "\fB\-\-error\-unresolved\-symbols\fR" 4
+.IX Item "--error-unresolved-symbols"
+This restores the linker's default behaviour of generating errors when
+it is reporting unresolved symbols.
+.IP "\fB\-\-whole\-archive\fR" 4
+.IX Item "--whole-archive"
+For each archive mentioned on the command line after the
+\&\fB\-\-whole\-archive\fR option, include every object file in the archive
+in the link, rather than searching the archive for the required object
+files.  This is normally used to turn an archive file into a shared
+library, forcing every object to be included in the resulting shared
+library.  This option may be used more than once.
+.Sp
+Two notes when using this option from gcc: First, gcc doesn't know
+about this option, so you have to use \fB\-Wl,\-whole\-archive\fR.
+Second, don't forget to use \fB\-Wl,\-no\-whole\-archive\fR after your
+list of archives, because gcc will add its own list of archives to
+your link and you may not want this flag to affect those as well.
+.IP "\fB\-\-wrap=\fR\fIsymbol\fR" 4
+.IX Item "--wrap=symbol"
+Use a wrapper function for \fIsymbol\fR.  Any undefined reference to
+\&\fIsymbol\fR will be resolved to \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR.  Any
+undefined reference to \f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR will be resolved to
+\&\fIsymbol\fR.
+.Sp
+This can be used to provide a wrapper for a system function.  The
+wrapper function should be called \f(CW\*(C`_\|_wrap_\f(CIsymbol\f(CW\*(C'\fR.  If it
+wishes to call the system function, it should call
+\&\f(CW\*(C`_\|_real_\f(CIsymbol\f(CW\*(C'\fR.
+.Sp
+Here is a trivial example:
+.Sp
+.Vb 6
+\&        void *
+\&        _\|_wrap_malloc (size_t c)
+\&        {
+\&          printf ("malloc called with %zu\en", c);
+\&          return _\|_real_malloc (c);
+\&        }
+.Ve
+.Sp
+If you link other code with this file using \fB\-\-wrap malloc\fR, then
+all calls to \f(CW\*(C`malloc\*(C'\fR will call the function \f(CW\*(C`_\|_wrap_malloc\*(C'\fR
+instead.  The call to \f(CW\*(C`_\|_real_malloc\*(C'\fR in \f(CW\*(C`_\|_wrap_malloc\*(C'\fR will
+call the real \f(CW\*(C`malloc\*(C'\fR function.
+.Sp
+You may wish to provide a \f(CW\*(C`_\|_real_malloc\*(C'\fR function as well, so that
+links without the \fB\-\-wrap\fR option will succeed.  If you do this,
+you should not put the definition of \f(CW\*(C`_\|_real_malloc\*(C'\fR in the same
+file as \f(CW\*(C`_\|_wrap_malloc\*(C'\fR; if you do, the assembler may resolve the
+call before the linker has a chance to wrap it to \f(CW\*(C`malloc\*(C'\fR.
+.IP "\fB\-\-eh\-frame\-hdr\fR" 4
+.IX Item "--eh-frame-hdr"
+Request creation of \f(CW\*(C`.eh_frame_hdr\*(C'\fR section and \s-1ELF\s0
+\&\f(CW\*(C`PT_GNU_EH_FRAME\*(C'\fR segment header.
+.IP "\fB\-\-enable\-new\-dtags\fR" 4
+.IX Item "--enable-new-dtags"
+.PD 0
+.IP "\fB\-\-disable\-new\-dtags\fR" 4
+.IX Item "--disable-new-dtags"
+.PD
+This linker can create the new dynamic tags in \s-1ELF\s0. But the older \s-1ELF\s0
+systems may not understand them. If you specify
+\&\fB\-\-enable\-new\-dtags\fR, the dynamic tags will be created as needed.
+If you specify \fB\-\-disable\-new\-dtags\fR, no new dynamic tags will be
+created. By default, the new dynamic tags are not created. Note that
+those options are only available for \s-1ELF\s0 systems.
+.IP "\fB\-\-hash\-size=\fR\fInumber\fR" 4
+.IX Item "--hash-size=number"
+Set the default size of the linker's hash tables to a prime number
+close to \fInumber\fR.  Increasing this value can reduce the length of
+time it takes the linker to perform its tasks, at the expense of
+increasing the linker's memory requirements.  Similarly reducing this
+value can reduce the memory requirements at the expense of speed.
+.IP "\fB\-\-hash\-style=\fR\fIstyle\fR" 4
+.IX Item "--hash-style=style"
+Set the type of linker's hash table(s).  \fIstyle\fR can be either
+\&\f(CW\*(C`sysv\*(C'\fR for classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR section, \f(CW\*(C`gnu\*(C'\fR for
+new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR section or \f(CW\*(C`both\*(C'\fR for both
+the classic \s-1ELF\s0 \f(CW\*(C`.hash\*(C'\fR and new style \s-1GNU\s0 \f(CW\*(C`.gnu.hash\*(C'\fR
+hash tables.  The default is \f(CW\*(C`sysv\*(C'\fR.
+.IP "\fB\-\-reduce\-memory\-overheads\fR" 4
+.IX Item "--reduce-memory-overheads"
+This option reduces memory requirements at ld runtime, at the expense of
+linking speed.  This was introduced to select the old O(n^2) algorithm
+for link map file generation, rather than the new O(n) algorithm which uses
+about 40% more memory for symbol storage.
+.Sp
+Another effect of the switch is to set the default hash table size to
+1021, which again saves memory at the cost of lengthening the linker's
+run time.  This is not done however if the \fB\-\-hash\-size\fR switch
+has been used.
+.Sp
+The \fB\-\-reduce\-memory\-overheads\fR switch may be also be used to
+enable other tradeoffs in future versions of the linker.
+.IP "\fB\-\-build\-id\fR" 4
+.IX Item "--build-id"
+.PD 0
+.IP "\fB\-\-build\-id=\fR\fIstyle\fR" 4
+.IX Item "--build-id=style"
+.PD
+Request creation of \f(CW\*(C`.note.gnu.build\-id\*(C'\fR \s-1ELF\s0 note section.
+The contents of the note are unique bits identifying this linked
+file.  \fIstyle\fR can be \f(CW\*(C`uuid\*(C'\fR to use 128 random bits,
+\&\f(CW\*(C`sha1\*(C'\fR to use a 160\-bit \s-1SHA1\s0 hash on the normative
+parts of the output contents, \f(CW\*(C`md5\*(C'\fR to use a 128\-bit
+\&\s-1MD5\s0 hash on the normative parts of the output contents, or
+\&\f(CW\*(C`0x\f(CIhexstring\f(CW\*(C'\fR to use a chosen bit string specified as
+an even number of hexadecimal digits (\f(CW\*(C`\-\*(C'\fR and \f(CW\*(C`:\*(C'\fR
+characters between digit pairs are ignored).  If \fIstyle\fR is
+omitted, \f(CW\*(C`sha1\*(C'\fR is used.
+.Sp
+The \f(CW\*(C`md5\*(C'\fR and \f(CW\*(C`sha1\*(C'\fR styles produces an identifier
+that is always the same in an identical output file, but will be
+unique among all nonidentical output files.  It is not intended
+to be compared as a checksum for the file's contents.  A linked
+file may be changed later by other tools, but the build \s-1ID\s0 bit
+string identifying the original linked file does not change.
+.Sp
+Passing \f(CW\*(C`none\*(C'\fR for \fIstyle\fR disables the setting from any
+\&\f(CW\*(C`\-\-build\-id\*(C'\fR options earlier on the command line.
+.PP
+The i386 \s-1PE\s0 linker supports the \fB\-shared\fR option, which causes
+the output to be a dynamically linked library (\s-1DLL\s0) instead of a
+normal executable.  You should name the output \f(CW\*(C`*.dll\*(C'\fR when you
+use this option.  In addition, the linker fully supports the standard
+\&\f(CW\*(C`*.def\*(C'\fR files, which may be specified on the linker command line
+like an object file (in fact, it should precede archives it exports
+symbols from, to ensure that they get linked in, just like a normal
+object file).
+.PP
+In addition to the options common to all targets, the i386 \s-1PE\s0 linker
+support additional command line options that are specific to the i386
+\&\s-1PE\s0 target.  Options that take values may be separated from their
+values by either a space or an equals sign.
+.IP "\fB\-\-add\-stdcall\-alias\fR" 4
+.IX Item "--add-stdcall-alias"
+If given, symbols with a stdcall suffix (@\fInn\fR) will be exported
+as-is and also with the suffix stripped.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-base\-file\fR \fIfile\fR" 4
+.IX Item "--base-file file"
+Use \fIfile\fR as the name of a file in which to save the base
+addresses of all the relocations needed for generating DLLs with
+\&\fIdlltool\fR.
+[This is an i386 \s-1PE\s0 specific option]
+.IP "\fB\-\-dll\fR" 4
+.IX Item "--dll"
+Create a \s-1DLL\s0 instead of a regular executable.  You may also use
+\&\fB\-shared\fR or specify a \f(CW\*(C`LIBRARY\*(C'\fR in a given \f(CW\*(C`.def\*(C'\fR
+file.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-long\-section\-names\fR" 4
+.IX Item "--enable-long-section-names"
+.PD 0
+.IP "\fB\-\-disable\-long\-section\-names\fR" 4
+.IX Item "--disable-long-section-names"
+.PD
+The \s-1PE\s0 variants of the Coff object format add an extension that permits
+the use of section names longer than eight characters, the normal limit
+for Coff.  By default, these names are only allowed in object files, as
+fully-linked executable images do not carry the Coff string table required
+to support the longer names.  As a \s-1GNU\s0 extension, it is possible to
+allow their use in executable images as well, or to (probably pointlessly!)
+disallow it in object files, by using these two options.  Executable images
+generated with these long section names are slightly non-standard, carrying
+as they do a string table, and may generate confusing output when examined
+with non-GNU PE-aware tools, such as file viewers and dumpers.  However, 
+\&\s-1GDB\s0 relies on the use of \s-1PE\s0 long section names to find Dwarf\-2 debug 
+information sections in an executable image at runtime, and so if neither
+option is specified on the command-line, \fBld\fR will enable long
+section names, overriding the default and technically correct behaviour,
+when it finds the presence of debug information while linking an executable
+image and not stripping symbols.
+[This option is valid for all \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-enable\-stdcall\-fixup\fR" 4
+.IX Item "--enable-stdcall-fixup"
+.PD 0
+.IP "\fB\-\-disable\-stdcall\-fixup\fR" 4
+.IX Item "--disable-stdcall-fixup"
+.PD
+If the link finds a symbol that it cannot resolve, it will attempt to
+do \*(L"fuzzy linking\*(R" by looking for another defined symbol that differs
+only in the format of the symbol name (cdecl vs stdcall) and will
+resolve that symbol by linking to the match.  For example, the
+undefined symbol \f(CW\*(C`_foo\*(C'\fR might be linked to the function
+\&\f(CW\*(C`_foo@12\*(C'\fR, or the undefined symbol \f(CW\*(C`_bar@16\*(C'\fR might be linked
+to the function \f(CW\*(C`_bar\*(C'\fR.  When the linker does this, it prints a
+warning, since it normally should have failed to link, but sometimes
+import libraries generated from third-party dlls may need this feature
+to be usable.  If you specify \fB\-\-enable\-stdcall\-fixup\fR, this
+feature is fully enabled and warnings are not printed.  If you specify
+\&\fB\-\-disable\-stdcall\-fixup\fR, this feature is disabled and such
+mismatches are considered to be errors.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-export\-all\-symbols\fR" 4
+.IX Item "--export-all-symbols"
+If given, all global symbols in the objects used to build a \s-1DLL\s0 will
+be exported by the \s-1DLL\s0.  Note that this is the default if there
+otherwise wouldn't be any exported symbols.  When symbols are
+explicitly exported via \s-1DEF\s0 files or implicitly exported via function
+attributes, the default is to not export anything else unless this
+option is given.  Note that the symbols \f(CW\*(C`DllMain@12\*(C'\fR,
+\&\f(CW\*(C`DllEntryPoint@0\*(C'\fR, \f(CW\*(C`DllMainCRTStartup@12\*(C'\fR, and
+\&\f(CW\*(C`impure_ptr\*(C'\fR will not be automatically
+exported.  Also, symbols imported from other DLLs will not be
+re-exported, nor will symbols specifying the \s-1DLL\s0's internal layout
+such as those beginning with \f(CW\*(C`_head_\*(C'\fR or ending with
+\&\f(CW\*(C`_iname\*(C'\fR.  In addition, no symbols from \f(CW\*(C`libgcc\*(C'\fR,
+\&\f(CW\*(C`libstd++\*(C'\fR, \f(CW\*(C`libmingw32\*(C'\fR, or \f(CW\*(C`crtX.o\*(C'\fR will be exported.
+Symbols whose names begin with \f(CW\*(C`_\|_rtti_\*(C'\fR or \f(CW\*(C`_\|_builtin_\*(C'\fR will
+not be exported, to help with \*(C+ DLLs.  Finally, there is an
+extensive list of cygwin-private symbols that are not exported
+(obviously, this applies on when building DLLs for cygwin targets).
+These cygwin-excludes are: \f(CW\*(C`_cygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_cygwin_crt0_common@8\*(C'\fR, \f(CW\*(C`_cygwin_noncygwin_dll_entry@12\*(C'\fR,
+\&\f(CW\*(C`_fmode\*(C'\fR, \f(CW\*(C`_impure_ptr\*(C'\fR, \f(CW\*(C`cygwin_attach_dll\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain0\*(C'\fR, \f(CW\*(C`cygwin_premain1\*(C'\fR, \f(CW\*(C`cygwin_premain2\*(C'\fR,
+\&\f(CW\*(C`cygwin_premain3\*(C'\fR, and \f(CW\*(C`environ\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-exclude\-symbols\fR \fIsymbol\fR\fB,\fR\fIsymbol\fR\fB,...\fR" 4
+.IX Item "--exclude-symbols symbol,symbol,..."
+Specifies a list of symbols which should not be automatically
+exported.  The symbol names may be delimited by commas or colons.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-file\-alignment\fR" 4
+.IX Item "--file-alignment"
+Specify the file alignment.  Sections in the file will always begin at
+file offsets which are multiples of this number.  This defaults to
+512.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program.  The default is 1Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll.  This is
+the lowest memory location that will be used when your program or dll
+is loaded.  To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls.  The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-kill\-at\fR" 4
+.IX Item "--kill-at"
+If given, the stdcall suffixes (@\fInn\fR) will be stripped from
+symbols before they are exported.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-large\-address\-aware\fR" 4
+.IX Item "--large-address-aware"
+If given, the appropriate bit in the \*(L"Characteristics\*(R" field of the \s-1COFF\s0
+header is set to indicate that this executable supports virtual addresses
+greater than 2 gigabytes.  This should be used in conjunction with the /3GB
+or /USERVA=\fIvalue\fR megabytes switch in the \*(L"[operating systems]\*(R"
+section of the \s-1BOOT\s0.INI.  Otherwise, this bit has no effect.
+[This option is specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-major\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--major-image-version value"
+Sets the major number of the \*(L"image version\*(R".  Defaults to 1.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--major-os-version value"
+Sets the major number of the \*(L"os version\*(R".  Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-major\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--major-subsystem-version value"
+Sets the major number of the \*(L"subsystem version\*(R".  Defaults to 4.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-image\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-image-version value"
+Sets the minor number of the \*(L"image version\*(R".  Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-os\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-os-version value"
+Sets the minor number of the \*(L"os version\*(R".  Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-minor\-subsystem\-version\fR \fIvalue\fR" 4
+.IX Item "--minor-subsystem-version value"
+Sets the minor number of the \*(L"subsystem version\*(R".  Defaults to 0.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-output\-def\fR \fIfile\fR" 4
+.IX Item "--output-def file"
+The linker will create the file \fIfile\fR which will contain a \s-1DEF\s0
+file corresponding to the \s-1DLL\s0 the linker is generating.  This \s-1DEF\s0 file
+(which should be called \f(CW\*(C`*.def\*(C'\fR) may be used to create an import
+library with \f(CW\*(C`dlltool\*(C'\fR or may be used as a reference to
+automatically or implicitly exported symbols.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-out\-implib\fR \fIfile\fR" 4
+.IX Item "--out-implib file"
+The linker will create the file \fIfile\fR which will contain an
+import lib corresponding to the \s-1DLL\s0 the linker is generating. This
+import lib (which should be called \f(CW\*(C`*.dll.a\*(C'\fR or \f(CW\*(C`*.a\*(C'\fR
+may be used to link clients against the generated \s-1DLL\s0; this behaviour
+makes it possible to skip a separate \f(CW\*(C`dlltool\*(C'\fR import library
+creation step.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-image\-base\fR" 4
+.IX Item "--enable-auto-image-base"
+Automatically choose the image base for DLLs, unless one is specified
+using the \f(CW\*(C`\-\-image\-base\*(C'\fR argument.  By using a hash generated
+from the dllname to create unique image bases for each \s-1DLL\s0, in-memory
+collisions and relocations which can delay program execution are
+avoided.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-image\-base\fR" 4
+.IX Item "--disable-auto-image-base"
+Do not automatically generate a unique image base.  If there is no
+user-specified image base (\f(CW\*(C`\-\-image\-base\*(C'\fR) then use the platform
+default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-dll\-search\-prefix\fR \fIstring\fR" 4
+.IX Item "--dll-search-prefix string"
+When linking dynamically to a dll without an import library,
+search for \f(CW\*(C`<string><basename>.dll\*(C'\fR in preference to
+\&\f(CW\*(C`lib<basename>.dll\*(C'\fR. This behaviour allows easy distinction
+between DLLs built for the various \*(L"subplatforms\*(R": native, cygwin,
+uwin, pw, etc.  For instance, cygwin DLLs typically use
+\&\f(CW\*(C`\-\-dll\-search\-prefix=cyg\*(C'\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-auto\-import\fR" 4
+.IX Item "--enable-auto-import"
+Do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to \f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for
+\&\s-1DATA\s0 imports from DLLs, and create the necessary thunking symbols when
+building the import libraries with those \s-1DATA\s0 exports. Note: Use of the
+\&'auto\-import' extension will cause the text section of the image file
+to be made writable. This does not conform to the PE-COFF format
+specification published by Microsoft.
+.Sp
+Note \- use of the 'auto\-import' extension will also cause read only
+data which would normally be placed into the .rdata section to be
+placed into the .data section instead.  This is in order to work
+around a problem with consts that is described here:
+http://www.cygwin.com/ml/cygwin/2004\-09/msg01101.html
+.Sp
+Using 'auto\-import' generally will 'just work' \*(-- but sometimes you may
+see this message:
+.Sp
+"variable '<var>' can't be auto-imported. Please read the
+documentation for ld's \f(CW\*(C`\-\-enable\-auto\-import\*(C'\fR for details."
+.Sp
+This message occurs when some (sub)expression accesses an address
+ultimately given by the sum of two constants (Win32 import tables only
+allow one).  Instances where this may occur include accesses to member
+fields of struct variables imported from a \s-1DLL\s0, as well as using a
+constant index into an array variable imported from a \s-1DLL\s0.  Any
+multiword variable (arrays, structs, long long, etc) may trigger
+this error condition.  However, regardless of the exact data type
+of the offending exported variable, ld will always detect it, issue
+the warning, and exit.
+.Sp
+There are several ways to address this difficulty, regardless of the
+data type of the exported variable:
+.Sp
+One way is to use \-\-enable\-runtime\-pseudo\-reloc switch. This leaves the task
+of adjusting references in your client code for runtime environment, so
+this method works only when runtime environment supports this feature.
+.Sp
+A second solution is to force one of the 'constants' to be a variable \*(--
+that is, unknown and un-optimizable at compile time.  For arrays,
+there are two possibilities: a) make the indexee (the array's address)
+a variable, or b) make the 'constant' index a variable.  Thus:
+.Sp
+.Vb 3
+\&        extern type extern_array[];
+\&        extern_array[1] \-\->
+\&           { volatile type *t=extern_array; t[1] }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\&        extern type extern_array[];
+\&        extern_array[1] \-\->
+\&           { volatile int t=1; extern_array[t] }
+.Ve
+.Sp
+For structs (and most other multiword data types) the only option
+is to make the struct itself (or the long long, or the ...) variable:
+.Sp
+.Vb 3
+\&        extern struct s extern_struct;
+\&        extern_struct.field \-\->
+\&           { volatile struct s *t=&extern_struct; t\->field }
+.Ve
+.Sp
+or
+.Sp
+.Vb 3
+\&        extern long long extern_ll;
+\&        extern_ll \-\->
+\&          { volatile long long * local_ll=&extern_ll; *local_ll }
+.Ve
+.Sp
+A third method of dealing with this difficulty is to abandon
+\&'auto\-import' for the offending symbol and mark it with
+\&\f(CW\*(C`_\|_declspec(dllimport)\*(C'\fR.  However, in practise that
+requires using compile-time #defines to indicate whether you are
+building a \s-1DLL\s0, building client code that will link to the \s-1DLL\s0, or
+merely building/linking to a static library.   In making the choice
+between the various methods of resolving the 'direct address with
+constant offset' problem, you should consider typical real-world usage:
+.Sp
+Original:
+.Sp
+.Vb 7
+\&        \-\-foo.h
+\&        extern int arr[];
+\&        \-\-foo.c
+\&        #include "foo.h"
+\&        void main(int argc, char **argv){
+\&          printf("%d\en",arr[1]);
+\&        }
+.Ve
+.Sp
+Solution 1:
+.Sp
+.Vb 9
+\&        \-\-foo.h
+\&        extern int arr[];
+\&        \-\-foo.c
+\&        #include "foo.h"
+\&        void main(int argc, char **argv){
+\&          /* This workaround is for win32 and cygwin; do not "optimize" */
+\&          volatile int *parr = arr;
+\&          printf("%d\en",parr[1]);
+\&        }
+.Ve
+.Sp
+Solution 2:
+.Sp
+.Vb 10
+\&        \-\-foo.h
+\&        /* Note: auto\-export is assumed (no _\|_declspec(dllexport)) */
+\&        #if (defined(_WIN32) || defined(_\|_CYGWIN_\|_)) && \e
+\&          !(defined(FOO_BUILD_DLL) || defined(FOO_STATIC))
+\&        #define FOO_IMPORT _\|_declspec(dllimport)
+\&        #else
+\&        #define FOO_IMPORT
+\&        #endif
+\&        extern FOO_IMPORT int arr[];
+\&        \-\-foo.c
+\&        #include "foo.h"
+\&        void main(int argc, char **argv){
+\&          printf("%d\en",arr[1]);
+\&        }
+.Ve
+.Sp
+A fourth way to avoid this problem is to re-code your
+library to use a functional interface rather than a data interface
+for the offending variables (e.g. \fIset_foo()\fR and \fIget_foo()\fR accessor
+functions).
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-auto\-import\fR" 4
+.IX Item "--disable-auto-import"
+Do not attempt to do sophisticated linking of \f(CW\*(C`_symbol\*(C'\fR to
+\&\f(CW\*(C`_\|_imp_\|_symbol\*(C'\fR for \s-1DATA\s0 imports from DLLs.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--enable-runtime-pseudo-reloc"
+If your code contains expressions described in \-\-enable\-auto\-import section,
+that is, \s-1DATA\s0 imports from \s-1DLL\s0 with non-zero offset, this switch will create
+a vector of 'runtime pseudo relocations' which can be used by runtime
+environment to adjust references to such data in your client code.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-disable\-runtime\-pseudo\-reloc\fR" 4
+.IX Item "--disable-runtime-pseudo-reloc"
+Do not create pseudo relocations for non-zero offset \s-1DATA\s0 imports from
+DLLs.  This is the default.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-enable\-extra\-pe\-debug\fR" 4
+.IX Item "--enable-extra-pe-debug"
+Show additional debug info related to auto-import symbol thunking.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-section\-alignment\fR" 4
+.IX Item "--section-alignment"
+Sets the section alignment.  Sections in memory will always begin at
+addresses which are a multiple of this number.  Defaults to 0x1000.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program.  The default is 2Mb reserved, 4K
+committed.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute.  The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR.  You may optionally set
+the subsystem version also.  Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to the i386 \s-1PE\s0 targeted port of the linker]
+.Sp
+The following options set flags in the \f(CW\*(C`DllCharacteristics\*(C'\fR field
+of the \s-1PE\s0 file header:
+[These options are specific to \s-1PE\s0 targeted ports of the linker]
+.IP "\fB\-\-dynamicbase\fR" 4
+.IX Item "--dynamicbase"
+The image base address may be relocated using address space layout
+randomization (\s-1ASLR\s0).  This feature was introduced with \s-1MS\s0 Windows
+Vista for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-forceinteg\fR" 4
+.IX Item "--forceinteg"
+Code integrity checks are enforced.
+.IP "\fB\-\-nxcompat\fR" 4
+.IX Item "--nxcompat"
+The image is compatible with the Data Execution Prevention.
+This feature was introduced with \s-1MS\s0 Windows \s-1XP\s0 \s-1SP2\s0 for i386 \s-1PE\s0 targets.
+.IP "\fB\-\-no\-isolation\fR" 4
+.IX Item "--no-isolation"
+Although the image understands isolation, do not isolate the image.
+.IP "\fB\-\-no\-seh\fR" 4
+.IX Item "--no-seh"
+The image does not use \s-1SEH\s0. No \s-1SE\s0 handler may be called from
+this image.
+.IP "\fB\-\-no\-bind\fR" 4
+.IX Item "--no-bind"
+Do not bind this image.
+.IP "\fB\-\-wdmdriver\fR" 4
+.IX Item "--wdmdriver"
+The driver uses the \s-1MS\s0 Windows Driver Model.
+.IP "\fB\-\-tsaware\fR" 4
+.IX Item "--tsaware"
+The image is Terminal Server aware.
+.PP
+The 68HC11 and 68HC12 linkers support specific options to control the
+memory bank switching mapping and trampoline code generation.
+.IP "\fB\-\-no\-trampoline\fR" 4
+.IX Item "--no-trampoline"
+This option disables the generation of trampoline. By default a trampoline
+is generated for each far function which is called using a \f(CW\*(C`jsr\*(C'\fR
+instruction (this happens when a pointer to a far function is taken).
+.IP "\fB\-\-bank\-window\fR \fIname\fR" 4
+.IX Item "--bank-window name"
+This option indicates to the linker the name of the memory region in
+the \fB\s-1MEMORY\s0\fR specification that describes the memory bank window.
+The definition of such region is then used by the linker to compute
+paging and addresses within the memory window.
+.PP
+The following options are supported to control handling of \s-1GOT\s0 generation
+when linking for 68K targets.
+.IP "\fB\-\-got=\fR\fItype\fR" 4
+.IX Item "--got=type"
+This option tells the linker which \s-1GOT\s0 generation scheme to use.
+\&\fItype\fR should be one of \fBsingle\fR, \fBnegative\fR,
+\&\fBmultigot\fR or \fBtarget\fR.  For more information refer to the
+Info entry for \fIld\fR.
+.SH "ENVIRONMENT"
+.IX Header "ENVIRONMENT"
+You can change the behaviour of \fBld\fR with the environment variables
+\&\f(CW\*(C`GNUTARGET\*(C'\fR,
+\&\f(CW\*(C`LDEMULATION\*(C'\fR and \f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR.
+.PP
+\&\f(CW\*(C`GNUTARGET\*(C'\fR determines the input-file object format if you don't
+use \fB\-b\fR (or its synonym \fB\-\-format\fR).  Its value should be one
+of the \s-1BFD\s0 names for an input format.  If there is no
+\&\f(CW\*(C`GNUTARGET\*(C'\fR in the environment, \fBld\fR uses the natural format
+of the target. If \f(CW\*(C`GNUTARGET\*(C'\fR is set to \f(CW\*(C`default\*(C'\fR then \s-1BFD\s0
+attempts to discover the input format by examining binary input files;
+this method often succeeds, but there are potential ambiguities, since
+there is no method of ensuring that the magic number used to specify
+object-file formats is unique.  However, the configuration procedure for
+\&\s-1BFD\s0 on each system places the conventional format for that system first
+in the search-list, so ambiguities are resolved in favor of convention.
+.PP
+\&\f(CW\*(C`LDEMULATION\*(C'\fR determines the default emulation if you don't use the
+\&\fB\-m\fR option.  The emulation can affect various aspects of linker
+behaviour, particularly the default linker script.  You can list the
+available emulations with the \fB\-\-verbose\fR or \fB\-V\fR options.  If
+the \fB\-m\fR option is not used, and the \f(CW\*(C`LDEMULATION\*(C'\fR environment
+variable is not defined, the default emulation depends upon how the
+linker was configured.
+.PP
+Normally, the linker will default to demangling symbols.  However, if
+\&\f(CW\*(C`COLLECT_NO_DEMANGLE\*(C'\fR is set in the environment, then it will
+default to not demangling symbols.  This environment variable is used in
+a similar fashion by the \f(CW\*(C`gcc\*(C'\fR linker wrapper program.  The default
+may be overridden by the \fB\-\-demangle\fR and \fB\-\-no\-demangle\fR
+options.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjcopy\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1) and
+the Info entries for \fIbinutils\fR and
+\&\fIld\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 92, 93, 94, 95, 96, 97, 98, 99, 2000, 2001,
+2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nlmconv.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nlmconv.1
new file mode 100644
index 00000000..e01a0caf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nlmconv.1
@@ -0,0 +1,251 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NLMCONV 1"
+.TH NLMCONV 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nlmconv \- converts object code into an NLM.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nlmconv [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+        [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+        [\fB\-T\fR \fIheaderfile\fR|\fB\-\-header\-file=\fR\fIheaderfile\fR]
+        [\fB\-d\fR|\fB\-\-debug\fR] [\fB\-l\fR \fIlinker\fR|\fB\-\-linker=\fR\fIlinker\fR]
+        [\fB\-h\fR|\fB\-\-help\fR] [\fB\-V\fR|\fB\-\-version\fR]
+        \fIinfile\fR \fIoutfile\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBnlmconv\fR converts the relocatable \fBi386\fR object file
+\&\fIinfile\fR into the NetWare Loadable Module \fIoutfile\fR, optionally
+reading \fIheaderfile\fR for \s-1NLM\s0 header information.  For instructions
+on writing the \s-1NLM\s0 command file language used in header files, see the
+\&\fBlinkers\fR section, \fB\s-1NLMLINK\s0\fR in particular, of the \fI\s-1NLM\s0
+Development and Tools Overview\fR, which is part of the \s-1NLM\s0 Software
+Developer's Kit (\*(L"\s-1NLM\s0 \s-1SDK\s0\*(R"), available from Novell, Inc.
+\&\fBnlmconv\fR uses the \s-1GNU\s0 Binary File Descriptor library to read
+\&\fIinfile\fR;
+.PP
+\&\fBnlmconv\fR can perform a link step.  In other words, you can list
+more than one object file for input if you list them in the definitions
+file (rather than simply specifying one input file on the command line).
+In this case, \fBnlmconv\fR calls the linker for you.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Object format of the input file.  \fBnlmconv\fR can usually determine
+the format of a given file (so no default is necessary).
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Object format of the output file.  \fBnlmconv\fR infers the output
+format based on the input format, e.g. for a \fBi386\fR input file the
+output format is \fBnlm32\-i386\fR.
+.IP "\fB\-T\fR \fIheaderfile\fR" 4
+.IX Item "-T headerfile"
+.PD 0
+.IP "\fB\-\-header\-file=\fR\fIheaderfile\fR" 4
+.IX Item "--header-file=headerfile"
+.PD
+Reads \fIheaderfile\fR for \s-1NLM\s0 header information.  For instructions on
+writing the \s-1NLM\s0 command file language used in header files, see see the
+\&\fBlinkers\fR section, of the \fI\s-1NLM\s0 Development and Tools
+Overview\fR, which is part of the \s-1NLM\s0 Software Developer's Kit, available
+from Novell, Inc.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-debug\fR" 4
+.IX Item "--debug"
+.PD
+Displays (on standard error) the linker command line used by \fBnlmconv\fR.
+.IP "\fB\-l\fR \fIlinker\fR" 4
+.IX Item "-l linker"
+.PD 0
+.IP "\fB\-\-linker=\fR\fIlinker\fR" 4
+.IX Item "--linker=linker"
+.PD
+Use \fIlinker\fR for any linking.  \fIlinker\fR can be an absolute or a
+relative pathname.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBnlmconv\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nm.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nm.1
new file mode 100644
index 00000000..edee8112
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-nm.1
@@ -0,0 +1,523 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "NM 1"
+.TH NM 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+nm \- list symbols from object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+nm [\fB\-a\fR|\fB\-\-debug\-syms\fR]
+   [\fB\-g\fR|\fB\-\-extern\-only\fR][\fB\-\-plugin\fR \fIname\fR]
+   [\fB\-B\fR] [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR]] [\fB\-D\fR|\fB\-\-dynamic\fR]
+   [\fB\-S\fR|\fB\-\-print\-size\fR] [\fB\-s\fR|\fB\-\-print\-armap\fR]
+   [\fB\-A\fR|\fB\-o\fR|\fB\-\-print\-file\-name\fR][\fB\-\-special\-syms\fR]
+   [\fB\-n\fR|\fB\-v\fR|\fB\-\-numeric\-sort\fR] [\fB\-p\fR|\fB\-\-no\-sort\fR]
+   [\fB\-r\fR|\fB\-\-reverse\-sort\fR] [\fB\-\-size\-sort\fR] [\fB\-u\fR|\fB\-\-undefined\-only\fR]
+   [\fB\-t\fR \fIradix\fR|\fB\-\-radix=\fR\fIradix\fR] [\fB\-P\fR|\fB\-\-portability\fR]
+   [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-f\fR\fIformat\fR|\fB\-\-format=\fR\fIformat\fR]
+   [\fB\-\-defined\-only\fR] [\fB\-l\fR|\fB\-\-line\-numbers\fR] [\fB\-\-no\-demangle\fR]
+   [\fB\-V\fR|\fB\-\-version\fR] [\fB\-X 32_64\fR] [\fB\-\-help\fR]  [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBnm\fR lists the symbols from object files \fIobjfile\fR....
+If no object files are listed as arguments, \fBnm\fR assumes the file
+\&\fIa.out\fR.
+.PP
+For each symbol, \fBnm\fR shows:
+.IP "\(bu" 4
+The symbol value, in the radix selected by options (see below), or
+hexadecimal by default.
+.IP "\(bu" 4
+The symbol type.  At least the following types are used; others are, as
+well, depending on the object file format.  If lowercase, the symbol is
+local; if uppercase, the symbol is global (external).
+.RS 4
+.ie n .IP """A""" 4
+.el .IP "\f(CWA\fR" 4
+.IX Item "A"
+The symbol's value is absolute, and will not be changed by further
+linking.
+.ie n .IP """B""" 4
+.el .IP "\f(CWB\fR" 4
+.IX Item "B"
+.PD 0
+.ie n .IP """b""" 4
+.el .IP "\f(CWb\fR" 4
+.IX Item "b"
+.PD
+The symbol is in the uninitialized data section (known as \s-1BSS\s0).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol is common.  Common symbols are uninitialized data.  When
+linking, multiple common symbols may appear with the same name.  If the
+symbol is defined anywhere, the common symbols are treated as undefined
+references.
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD 0
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD
+The symbol is in the initialized data section.
+.ie n .IP """G""" 4
+.el .IP "\f(CWG\fR" 4
+.IX Item "G"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.PD
+The symbol is in an initialized data section for small objects.  Some
+object file formats permit more efficient access to small data objects,
+such as a global int variable as opposed to a large global array.
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+For \s-1PE\s0 format files this indicates that the symbol is in a section
+specific to the implementation of DLLs.  For \s-1ELF\s0 format files this
+indicates that the symbol is an indirect function.  This is a \s-1GNU\s0
+extension to the standard set of \s-1ELF\s0 symbol types.  It indicates a
+symbol which if referenced by a relocation does not evaluate to its
+address, but instead must be invoked at runtime.  The runtime
+execution will then return the value to be used in the relocation.
+.ie n .IP """N""" 4
+.el .IP "\f(CWN\fR" 4
+.IX Item "N"
+The symbol is a debugging symbol.
+.ie n .IP """p""" 4
+.el .IP "\f(CWp\fR" 4
+.IX Item "p"
+The symbols is in a stack unwind section.
+.ie n .IP """R""" 4
+.el .IP "\f(CWR\fR" 4
+.IX Item "R"
+.PD 0
+.ie n .IP """r""" 4
+.el .IP "\f(CWr\fR" 4
+.IX Item "r"
+.PD
+The symbol is in a read only data section.
+.ie n .IP """S""" 4
+.el .IP "\f(CWS\fR" 4
+.IX Item "S"
+.PD 0
+.ie n .IP """s""" 4
+.el .IP "\f(CWs\fR" 4
+.IX Item "s"
+.PD
+The symbol is in an uninitialized data section for small objects.
+.ie n .IP """T""" 4
+.el .IP "\f(CWT\fR" 4
+.IX Item "T"
+.PD 0
+.ie n .IP """t""" 4
+.el .IP "\f(CWt\fR" 4
+.IX Item "t"
+.PD
+The symbol is in the text (code) section.
+.ie n .IP """U""" 4
+.el .IP "\f(CWU\fR" 4
+.IX Item "U"
+The symbol is undefined.
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+The symbol is a unique global symbol.  This is a \s-1GNU\s0 extension to the
+standard set of \s-1ELF\s0 symbol bindings.  For such a symbol the dynamic linker
+will make sure that in the entire process there is just one symbol with
+this name and type in use.
+.ie n .IP """V""" 4
+.el .IP "\f(CWV\fR" 4
+.IX Item "V"
+.PD 0
+.ie n .IP """v""" 4
+.el .IP "\f(CWv\fR" 4
+.IX Item "v"
+.PD
+The symbol is a weak object.  When a weak defined symbol is linked with
+a normal defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the weak symbol becomes zero with no error.  On some
+systems, uppercase indicates that a default value has been specified.
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+.PD 0
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+.PD
+The symbol is a weak symbol that has not been specifically tagged as a
+weak object symbol.  When a weak defined symbol is linked with a normal
+defined symbol, the normal defined symbol is used with no error.
+When a weak undefined symbol is linked and the symbol is not defined,
+the value of the symbol is determined in a system-specific manner without
+error.  On some systems, uppercase indicates that a default value has been
+specified.
+.ie n .IP """\-""" 4
+.el .IP "\f(CW\-\fR" 4
+.IX Item "-"
+The symbol is a stabs symbol in an a.out object file.  In this case, the
+next values printed are the stabs other field, the stabs desc field, and
+the stab type.  Stabs symbols are used to hold debugging information.
+.ie n .IP """?""" 4
+.el .IP "\f(CW?\fR" 4
+.IX Item "?"
+The symbol type is unknown, or object file format specific.
+.RE
+.RS 4
+.RE
+.IP "\(bu" 4
+The symbol name.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Precede each symbol by the name of the input file (or archive member)
+in which it was found, rather than identifying the input file once only,
+before all of its symbols.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-debug\-syms\fR" 4
+.IX Item "--debug-syms"
+.PD
+Display all symbols, even debugger-only symbols; normally these are not
+listed.
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+The same as \fB\-\-format=bsd\fR (for compatibility with the \s-1MIPS\s0 \fBnm\fR).
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable. Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler.
+.IP "\fB\-\-no\-demangle\fR" 4
+.IX Item "--no-demangle"
+Do not demangle low-level symbol names.  This is the default.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Display the dynamic symbols rather than the normal symbols.  This is
+only meaningful for dynamic objects, such as certain types of shared
+libraries.
+.IP "\fB\-f\fR \fIformat\fR" 4
+.IX Item "-f format"
+.PD 0
+.IP "\fB\-\-format=\fR\fIformat\fR" 4
+.IX Item "--format=format"
+.PD
+Use the output format \fIformat\fR, which can be \f(CW\*(C`bsd\*(C'\fR,
+\&\f(CW\*(C`sysv\*(C'\fR, or \f(CW\*(C`posix\*(C'\fR.  The default is \f(CW\*(C`bsd\*(C'\fR.
+Only the first character of \fIformat\fR is significant; it can be
+either upper or lower case.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-extern\-only\fR" 4
+.IX Item "--extern-only"
+.PD
+Display only external symbols.
+.IP "\fB\-\-plugin\fR \fIname\fR" 4
+.IX Item "--plugin name"
+Load the plugin called \fIname\fR to add support for extra target
+types.  This option is only available if the toolchain has been built
+with plugin support enabled.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+For each symbol, use debugging information to try to find a filename and
+line number.  For a defined symbol, look for the line number of the
+address of the symbol.  For an undefined symbol, look for the line
+number of a relocation entry which refers to the symbol.  If line number
+information can be found, print it after the other symbol information.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.IP "\fB\-\-numeric\-sort\fR" 4
+.IX Item "--numeric-sort"
+.PD
+Sort symbols numerically by their addresses, rather than alphabetically
+by their names.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-no\-sort\fR" 4
+.IX Item "--no-sort"
+.PD
+Do not bother to sort the symbols in any order; print them in the order
+encountered.
+.IP "\fB\-P\fR" 4
+.IX Item "-P"
+.PD 0
+.IP "\fB\-\-portability\fR" 4
+.IX Item "--portability"
+.PD
+Use the \s-1POSIX\s0.2 standard output format instead of the default format.
+Equivalent to \fB\-f posix\fR.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-print\-size\fR" 4
+.IX Item "--print-size"
+.PD
+Print both value and size of defined symbols for the \f(CW\*(C`bsd\*(C'\fR output style.
+This option has no effect for object formats that do not record symbol
+sizes, unless \fB\-\-size\-sort\fR is also used in which case a
+calculated size is displayed.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-print\-armap\fR" 4
+.IX Item "--print-armap"
+.PD
+When listing symbols from archive members, include the index: a mapping
+(stored in the archive by \fBar\fR or \fBranlib\fR) of which modules
+contain definitions for which names.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reverse\-sort\fR" 4
+.IX Item "--reverse-sort"
+.PD
+Reverse the order of the sort (whether numeric or alphabetic); let the
+last come first.
+.IP "\fB\-\-size\-sort\fR" 4
+.IX Item "--size-sort"
+Sort symbols by size.  The size is computed as the difference between
+the value of the symbol and the value of the symbol with the next higher
+value.  If the \f(CW\*(C`bsd\*(C'\fR output format is used the size of the symbol
+is printed, rather than the value, and \fB\-S\fR must be used in order
+both size and value to be printed.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+Display symbols which have a target-specific special meaning.  These
+symbols are usually used by the target for some special processing and
+are not normally helpful when included included in the normal symbol
+lists.  For example for \s-1ARM\s0 targets this option would skip the mapping
+symbols used to mark transitions between \s-1ARM\s0 code, \s-1THUMB\s0 code and
+data.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Use \fIradix\fR as the radix for printing the symbol values.  It must be
+\&\fBd\fR for decimal, \fBo\fR for octal, or \fBx\fR for hexadecimal.
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify an object code format other than your system's default format.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-undefined\-only\fR" 4
+.IX Item "--undefined-only"
+.PD
+Display only undefined symbols (those external to each object file).
+.IP "\fB\-\-defined\-only\fR" 4
+.IX Item "--defined-only"
+Display only defined symbols for each object file.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBnm\fR and exit.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+This option is ignored for compatibility with the \s-1AIX\s0 version of
+\&\fBnm\fR.  It takes one parameter which must be the string
+\&\fB32_64\fR.  The default mode of \s-1AIX\s0 \fBnm\fR corresponds
+to \fB\-X 32\fR, which is not supported by \s-1GNU\s0 \fBnm\fR.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBnm\fR and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objcopy.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objcopy.1
new file mode 100644
index 00000000..cc041c0c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objcopy.1
@@ -0,0 +1,935 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJCOPY 1"
+.TH OBJCOPY 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+objcopy \- copy and translate object files
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objcopy [\fB\-F\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+        [\fB\-I\fR \fIbfdname\fR|\fB\-\-input\-target=\fR\fIbfdname\fR]
+        [\fB\-O\fR \fIbfdname\fR|\fB\-\-output\-target=\fR\fIbfdname\fR]
+        [\fB\-B\fR \fIbfdarch\fR|\fB\-\-binary\-architecture=\fR\fIbfdarch\fR]
+        [\fB\-S\fR|\fB\-\-strip\-all\fR]
+        [\fB\-g\fR|\fB\-\-strip\-debug\fR]
+        [\fB\-K\fR \fIsymbolname\fR|\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-N\fR \fIsymbolname\fR|\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-G\fR \fIsymbolname\fR|\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-\-localize\-hidden\fR]
+        [\fB\-L\fR \fIsymbolname\fR|\fB\-\-localize\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-W\fR \fIsymbolname\fR|\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR]
+        [\fB\-w\fR|\fB\-\-wildcard\fR]
+        [\fB\-x\fR|\fB\-\-discard\-all\fR]
+        [\fB\-X\fR|\fB\-\-discard\-locals\fR]
+        [\fB\-b\fR \fIbyte\fR|\fB\-\-byte=\fR\fIbyte\fR]
+        [\fB\-i\fR \fIinterleave\fR|\fB\-\-interleave=\fR\fIinterleave\fR]
+        [\fB\-j\fR \fIsectionname\fR|\fB\-\-only\-section=\fR\fIsectionname\fR]
+        [\fB\-R\fR \fIsectionname\fR|\fB\-\-remove\-section=\fR\fIsectionname\fR]
+        [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+        [\fB\-\-debugging\fR]
+        [\fB\-\-gap\-fill=\fR\fIval\fR]
+        [\fB\-\-pad\-to=\fR\fIaddress\fR]
+        [\fB\-\-set\-start=\fR\fIval\fR]
+        [\fB\-\-adjust\-start=\fR\fIincr\fR]
+        [\fB\-\-change\-addresses=\fR\fIincr\fR]
+        [\fB\-\-change\-section\-address\fR \fIsection\fR{=,+,\-}\fIval\fR]
+        [\fB\-\-change\-section\-lma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+        [\fB\-\-change\-section\-vma\fR \fIsection\fR{=,+,\-}\fIval\fR]
+        [\fB\-\-change\-warnings\fR] [\fB\-\-no\-change\-warnings\fR]
+        [\fB\-\-set\-section\-flags\fR \fIsection\fR=\fIflags\fR]
+        [\fB\-\-add\-section\fR \fIsectionname\fR=\fIfilename\fR]
+        [\fB\-\-rename\-section\fR \fIoldname\fR=\fInewname\fR[,\fIflags\fR]]
+        [\fB\-\-long\-section\-names\fR {enable,disable,keep}]
+        [\fB\-\-change\-leading\-char\fR] [\fB\-\-remove\-leading\-char\fR]
+        [\fB\-\-reverse\-bytes=\fR\fInum\fR]
+        [\fB\-\-srec\-len=\fR\fIival\fR] [\fB\-\-srec\-forceS3\fR]
+        [\fB\-\-redefine\-sym\fR \fIold\fR=\fInew\fR]
+        [\fB\-\-redefine\-syms=\fR\fIfilename\fR]
+        [\fB\-\-weaken\fR]
+        [\fB\-\-keep\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-strip\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-localize\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-globalize\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-weaken\-symbols=\fR\fIfilename\fR]
+        [\fB\-\-alt\-machine\-code=\fR\fIindex\fR]
+        [\fB\-\-prefix\-symbols=\fR\fIstring\fR]
+        [\fB\-\-prefix\-sections=\fR\fIstring\fR]
+        [\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR]
+        [\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR]
+        [\fB\-\-keep\-file\-symbols\fR]
+        [\fB\-\-only\-keep\-debug\fR]
+        [\fB\-\-extract\-symbol\fR]
+        [\fB\-\-writable\-text\fR]
+        [\fB\-\-readonly\-text\fR]
+        [\fB\-\-pure\fR]
+        [\fB\-\-impure\fR]
+        [\fB\-\-file\-alignment=\fR\fInum\fR]
+        [\fB\-\-heap=\fR\fIsize\fR]
+        [\fB\-\-image\-base=\fR\fIaddress\fR]
+        [\fB\-\-section\-alignment=\fR\fInum\fR]
+        [\fB\-\-stack=\fR\fIsize\fR]
+        [\fB\-\-subsystem=\fR\fIwhich\fR:\fImajor\fR.\fIminor\fR]
+        [\fB\-v\fR|\fB\-\-verbose\fR]
+        [\fB\-V\fR|\fB\-\-version\fR]
+        [\fB\-\-help\fR] [\fB\-\-info\fR]
+        \fIinfile\fR [\fIoutfile\fR]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBobjcopy\fR utility copies the contents of an object
+file to another.  \fBobjcopy\fR uses the \s-1GNU\s0 \s-1BFD\s0 Library to
+read and write the object files.  It can write the destination object
+file in a format different from that of the source object file.  The
+exact behavior of \fBobjcopy\fR is controlled by command-line options.
+Note that \fBobjcopy\fR should be able to copy a fully linked file
+between any two formats. However, copying a relocatable object file
+between any two formats may not work as expected.
+.PP
+\&\fBobjcopy\fR creates temporary files to do its translations and
+deletes them afterward.  \fBobjcopy\fR uses \s-1BFD\s0 to do all its
+translation work; it has access to all the formats described in \s-1BFD\s0
+and thus is able to recognize most formats without being told
+explicitly.
+.PP
+\&\fBobjcopy\fR can be used to generate S\-records by using an output
+target of \fBsrec\fR (e.g., use \fB\-O srec\fR).
+.PP
+\&\fBobjcopy\fR can be used to generate a raw binary file by using an
+output target of \fBbinary\fR (e.g., use \fB\-O binary\fR).  When
+\&\fBobjcopy\fR generates a raw binary file, it will essentially produce
+a memory dump of the contents of the input object file.  All symbols and
+relocation information will be discarded.  The memory dump will start at
+the load address of the lowest section copied into the output file.
+.PP
+When generating an S\-record or a raw binary file, it may be helpful to
+use \fB\-S\fR to remove sections containing debugging information.  In
+some cases \fB\-R\fR will be useful to remove sections which contain
+information that is not needed by the binary file.
+.PP
+Note\-\-\-\fBobjcopy\fR is not able to change the endianness of its input
+files.  If the input format has an endianness (some formats do not),
+\&\fBobjcopy\fR can only copy the inputs into file formats that have the
+same endianness or which have no endianness (e.g., \fBsrec\fR).
+(However, see the \fB\-\-reverse\-bytes\fR option.)
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fIinfile\fR" 4
+.IX Item "infile"
+.PD 0
+.IP "\fIoutfile\fR" 4
+.IX Item "outfile"
+.PD
+The input and output files, respectively.
+If you do not specify \fIoutfile\fR, \fBobjcopy\fR creates a
+temporary file and destructively renames the result with
+the name of \fIinfile\fR.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Consider the source file's object format to be \fIbfdname\fR, rather than
+attempting to deduce it.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Write the output file using the object format \fIbfdname\fR.
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Use \fIbfdname\fR as the object format for both the input and the output
+file; i.e., simply transfer data from source to destination with no
+translation.
+.IP "\fB\-B\fR \fIbfdarch\fR" 4
+.IX Item "-B bfdarch"
+.PD 0
+.IP "\fB\-\-binary\-architecture=\fR\fIbfdarch\fR" 4
+.IX Item "--binary-architecture=bfdarch"
+.PD
+Useful when transforming a raw binary input file into an object file.
+In this case the output architecture can be set to \fIbfdarch\fR. This
+option will be ignored if the input file has a known \fIbfdarch\fR. You
+can access this binary data inside a program by referencing the special
+symbols that are created by the conversion process.  These symbols are
+called _binary_\fIobjfile\fR_start, _binary_\fIobjfile\fR_end and
+_binary_\fIobjfile\fR_size.  e.g. you can transform a picture file into
+an object file and then access it in your code using these symbols.
+.IP "\fB\-j\fR \fIsectionname\fR" 4
+.IX Item "-j sectionname"
+.PD 0
+.IP "\fB\-\-only\-section=\fR\fIsectionname\fR" 4
+.IX Item "--only-section=sectionname"
+.PD
+Copy only the named section from the input file to the output file.
+This option may be given more than once.  Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file.  This
+option may be given more than once.  Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Do not copy relocation and symbol information from the source file.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Do not copy debugging symbols or sections from the source file.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Strip all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped.  This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Do not copy symbol \fIsymbolname\fR from the source file.  This option
+may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-unneeded-symbol=symbolname"
+Do not copy symbol \fIsymbolname\fR from the source file unless it is needed
+by a relocation.  This option may be given more than once.
+.IP "\fB\-G\fR \fIsymbolname\fR" 4
+.IX Item "-G symbolname"
+.PD 0
+.IP "\fB\-\-keep\-global\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-global-symbol=symbolname"
+.PD
+Keep only symbol \fIsymbolname\fR global.  Make all other symbols local
+to the file, so that they are not visible externally.  This option may
+be given more than once.
+.IP "\fB\-\-localize\-hidden\fR" 4
+.IX Item "--localize-hidden"
+In an \s-1ELF\s0 object, mark all symbols that have hidden or internal visibility
+as local.  This option applies on top of symbol-specific localization options
+such as \fB\-L\fR.
+.IP "\fB\-L\fR \fIsymbolname\fR" 4
+.IX Item "-L symbolname"
+.PD 0
+.IP "\fB\-\-localize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--localize-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR local to the file, so that it is not
+visible externally.  This option may be given more than once.
+.IP "\fB\-W\fR \fIsymbolname\fR" 4
+.IX Item "-W symbolname"
+.PD 0
+.IP "\fB\-\-weaken\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--weaken-symbol=symbolname"
+.PD
+Make symbol \fIsymbolname\fR weak. This option may be given more than once.
+.IP "\fB\-\-globalize\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--globalize-symbol=symbolname"
+Give symbol \fIsymbolname\fR global scoping so that it is visible
+outside of the file in which it is defined.  This option may be given
+more than once.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options.  The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name.  If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\&          \-w \-W !foo \-W fo*
+.Ve
+.Sp
+would cause objcopy to weaken all symbols that start with \*(L"fo\*(R"
+except for the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Do not copy non-global symbols from the source file.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Do not copy compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-b\fR \fIbyte\fR" 4
+.IX Item "-b byte"
+.PD 0
+.IP "\fB\-\-byte=\fR\fIbyte\fR" 4
+.IX Item "--byte=byte"
+.PD
+Keep only every \fIbyte\fRth byte of the input file (header data is not
+affected).  \fIbyte\fR can be in the range from 0 to \fIinterleave\fR\-1,
+where \fIinterleave\fR is given by the \fB\-i\fR or \fB\-\-interleave\fR
+option, or the default of 4.  This option is useful for creating files
+to program \s-1ROM\s0.  It is typically used with an \f(CW\*(C`srec\*(C'\fR output
+target.
+.IP "\fB\-i\fR \fIinterleave\fR" 4
+.IX Item "-i interleave"
+.PD 0
+.IP "\fB\-\-interleave=\fR\fIinterleave\fR" 4
+.IX Item "--interleave=interleave"
+.PD
+Only copy one out of every \fIinterleave\fR bytes.  Select which byte to
+copy with the \fB\-b\fR or \fB\-\-byte\fR option.  The default is 4.
+\&\fBobjcopy\fR ignores this option if you do not specify either \fB\-b\fR or
+\&\fB\-\-byte\fR.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Set the access and modification dates of the output file to be the same
+as those of the input file.
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+Convert debugging information, if possible.  This is not the default
+because only certain debugging formats are supported, and the
+conversion process can be time consuming.
+.IP "\fB\-\-gap\-fill\fR \fIval\fR" 4
+.IX Item "--gap-fill val"
+Fill gaps between sections with \fIval\fR.  This operation applies to
+the \fIload address\fR (\s-1LMA\s0) of the sections.  It is done by increasing
+the size of the section with the lower address, and filling in the extra
+space created with \fIval\fR.
+.IP "\fB\-\-pad\-to\fR \fIaddress\fR" 4
+.IX Item "--pad-to address"
+Pad the output file up to the load address \fIaddress\fR.  This is
+done by increasing the size of the last section.  The extra space is
+filled in with the value specified by \fB\-\-gap\-fill\fR (default zero).
+.IP "\fB\-\-set\-start\fR \fIval\fR" 4
+.IX Item "--set-start val"
+Set the start address of the new file to \fIval\fR.  Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-start\fR \fIincr\fR" 4
+.IX Item "--change-start incr"
+.PD 0
+.IP "\fB\-\-adjust\-start\fR \fIincr\fR" 4
+.IX Item "--adjust-start incr"
+.PD
+Change the start address by adding \fIincr\fR.  Not all object file
+formats support setting the start address.
+.IP "\fB\-\-change\-addresses\fR \fIincr\fR" 4
+.IX Item "--change-addresses incr"
+.PD 0
+.IP "\fB\-\-adjust\-vma\fR \fIincr\fR" 4
+.IX Item "--adjust-vma incr"
+.PD
+Change the \s-1VMA\s0 and \s-1LMA\s0 addresses of all sections, as well as the start
+address, by adding \fIincr\fR.  Some object file formats do not permit
+section addresses to be changed arbitrarily.  Note that this does not
+relocate the sections; if the program expects sections to be loaded at a
+certain address, and this option is used to change the sections such
+that they are loaded at a different address, the program may fail.
+.IP "\fB\-\-change\-section\-address\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-address section{=,+,-}val"
+.PD 0
+.IP "\fB\-\-adjust\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--adjust-section-vma section{=,+,-}val"
+.PD
+Set or change both the \s-1VMA\s0 address and the \s-1LMA\s0 address of the named
+\&\fIsection\fR.  If \fB=\fR is used, the section address is set to
+\&\fIval\fR.  Otherwise, \fIval\fR is added to or subtracted from the
+section address.  See the comments under \fB\-\-change\-addresses\fR,
+above. If \fIsection\fR does not exist in the input file, a warning will
+be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-lma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-lma section{=,+,-}val"
+Set or change the \s-1LMA\s0 address of the named \fIsection\fR.  The \s-1LMA\s0
+address is the address where the section will be loaded into memory at
+program load time.  Normally this is the same as the \s-1VMA\s0 address, which
+is the address of the section at program run time, but on some systems,
+especially those where a program is held in \s-1ROM\s0, the two can be
+different.  If \fB=\fR is used, the section address is set to
+\&\fIval\fR.  Otherwise, \fIval\fR is added to or subtracted from the
+section address.  See the comments under \fB\-\-change\-addresses\fR,
+above.  If \fIsection\fR does not exist in the input file, a warning
+will be issued, unless \fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-section\-vma\fR \fIsection\fR\fB{=,+,\-}\fR\fIval\fR" 4
+.IX Item "--change-section-vma section{=,+,-}val"
+Set or change the \s-1VMA\s0 address of the named \fIsection\fR.  The \s-1VMA\s0
+address is the address where the section will be located once the
+program has started executing.  Normally this is the same as the \s-1LMA\s0
+address, which is the address where the section will be loaded into
+memory, but on some systems, especially those where a program is held in
+\&\s-1ROM\s0, the two can be different.  If \fB=\fR is used, the section address
+is set to \fIval\fR.  Otherwise, \fIval\fR is added to or subtracted
+from the section address.  See the comments under
+\&\fB\-\-change\-addresses\fR, above.  If \fIsection\fR does not exist in
+the input file, a warning will be issued, unless
+\&\fB\-\-no\-change\-warnings\fR is used.
+.IP "\fB\-\-change\-warnings\fR" 4
+.IX Item "--change-warnings"
+.PD 0
+.IP "\fB\-\-adjust\-warnings\fR" 4
+.IX Item "--adjust-warnings"
+.PD
+If \fB\-\-change\-section\-address\fR or \fB\-\-change\-section\-lma\fR or
+\&\fB\-\-change\-section\-vma\fR is used, and the named section does not
+exist, issue a warning.  This is the default.
+.IP "\fB\-\-no\-change\-warnings\fR" 4
+.IX Item "--no-change-warnings"
+.PD 0
+.IP "\fB\-\-no\-adjust\-warnings\fR" 4
+.IX Item "--no-adjust-warnings"
+.PD
+Do not issue a warning if \fB\-\-change\-section\-address\fR or
+\&\fB\-\-adjust\-section\-lma\fR or \fB\-\-adjust\-section\-vma\fR is used, even
+if the named section does not exist.
+.IP "\fB\-\-set\-section\-flags\fR \fIsection\fR\fB=\fR\fIflags\fR" 4
+.IX Item "--set-section-flags section=flags"
+Set the flags for the named section.  The \fIflags\fR argument is a
+comma separated string of flag names.  The recognized names are
+\&\fBalloc\fR, \fBcontents\fR, \fBload\fR, \fBnoload\fR,
+\&\fBreadonly\fR, \fBcode\fR, \fBdata\fR, \fBrom\fR, \fBshare\fR, and
+\&\fBdebug\fR.  You can set the \fBcontents\fR flag for a section which
+does not have contents, but it is not meaningful to clear the
+\&\fBcontents\fR flag of a section which does have contents\*(--just remove
+the section instead.  Not all flags are meaningful for all object file
+formats.
+.IP "\fB\-\-add\-section\fR \fIsectionname\fR\fB=\fR\fIfilename\fR" 4
+.IX Item "--add-section sectionname=filename"
+Add a new section named \fIsectionname\fR while copying the file.  The
+contents of the new section are taken from the file \fIfilename\fR.  The
+size of the section will be the size of the file.  This option only
+works on file formats which can support sections with arbitrary names.
+.IP "\fB\-\-rename\-section\fR \fIoldname\fR\fB=\fR\fInewname\fR\fB[,\fR\fIflags\fR\fB]\fR" 4
+.IX Item "--rename-section oldname=newname[,flags]"
+Rename a section from \fIoldname\fR to \fInewname\fR, optionally
+changing the section's flags to \fIflags\fR in the process.  This has
+the advantage over usng a linker script to perform the rename in that
+the output stays as an object file and does not become a linked
+executable.
+.Sp
+This option is particularly helpful when the input format is binary,
+since this will always create a section called .data.  If for example,
+you wanted instead to create a section called .rodata containing binary
+data you could use the following command line to achieve it:
+.Sp
+.Vb 3
+\&          objcopy \-I binary \-O <output_format> \-B <architecture> \e
+\&           \-\-rename\-section .data=.rodata,alloc,load,readonly,data,contents \e
+\&           <input_binary_file> <output_object_file>
+.Ve
+.IP "\fB\-\-long\-section\-names {enable,disable,keep}\fR" 4
+.IX Item "--long-section-names {enable,disable,keep}"
+Controls the handling of long section names when processing \f(CW\*(C`COFF\*(C'\fR
+and \f(CW\*(C`PE\-COFF\*(C'\fR object formats.  The default behaviour, \fBkeep\fR,
+is to preserve long section names if any are present in the input file.
+The \fBenable\fR and \fBdisable\fR options forcibly enable or disable
+the use of long section names in the output object; when \fBdisable\fR
+is in effect, any long section names in the input object will be truncated.
+The \fBenable\fR option will only emit long section names if any are
+present in the inputs; this is mostly the same as \fBkeep\fR, but it
+is left undefined whether the \fBenable\fR option might force the 
+creation of an empty string table in the output file.
+.IP "\fB\-\-change\-leading\-char\fR" 4
+.IX Item "--change-leading-char"
+Some object file formats use special characters at the start of
+symbols.  The most common such character is underscore, which compilers
+often add before every symbol.  This option tells \fBobjcopy\fR to
+change the leading character of every symbol when it converts between
+object file formats.  If the object file formats use the same leading
+character, this option has no effect.  Otherwise, it will add a
+character, or remove a character, or change a character, as
+appropriate.
+.IP "\fB\-\-remove\-leading\-char\fR" 4
+.IX Item "--remove-leading-char"
+If the first character of a global symbol is a special symbol leading
+character used by the object file format, remove the character.  The
+most common symbol leading character is underscore.  This option will
+remove a leading underscore from all global symbols.  This can be useful
+if you want to link together objects of different file formats with
+different conventions for symbol names.  This is different from
+\&\fB\-\-change\-leading\-char\fR because it always changes the symbol name
+when appropriate, regardless of the object file format of the output
+file.
+.IP "\fB\-\-reverse\-bytes=\fR\fInum\fR" 4
+.IX Item "--reverse-bytes=num"
+Reverse the bytes in a section with output contents.  A section length must
+be evenly divisible by the value given in order for the swap to be able to
+take place. Reversing takes place before the interleaving is performed.
+.Sp
+This option is used typically in generating \s-1ROM\s0 images for problematic
+target systems.  For example, on some target boards, the 32\-bit words
+fetched from 8\-bit ROMs are re-assembled in little-endian byte order
+regardless of the \s-1CPU\s0 byte order.  Depending on the programming model, the
+endianness of the \s-1ROM\s0 may need to be modified.
+.Sp
+Consider a simple file with a section containing the following eight
+bytes:  \f(CW12345678\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=2\fR for the above example, the bytes in the
+output file would be ordered \f(CW21436587\fR.
+.Sp
+Using \fB\-\-reverse\-bytes=4\fR for the above example, the bytes in the
+output file would be ordered \f(CW43218765\fR.
+.Sp
+By using \fB\-\-reverse\-bytes=2\fR for the above example, followed by
+\&\fB\-\-reverse\-bytes=4\fR on the output file, the bytes in the second
+output file would be ordered \f(CW34127856\fR.
+.IP "\fB\-\-srec\-len=\fR\fIival\fR" 4
+.IX Item "--srec-len=ival"
+Meaningful only for srec output.  Set the maximum length of the Srecords
+being produced to \fIival\fR.  This length covers both address, data and
+crc fields.
+.IP "\fB\-\-srec\-forceS3\fR" 4
+.IX Item "--srec-forceS3"
+Meaningful only for srec output.  Avoid generation of S1/S2 records,
+creating S3\-only record format.
+.IP "\fB\-\-redefine\-sym\fR \fIold\fR\fB=\fR\fInew\fR" 4
+.IX Item "--redefine-sym old=new"
+Change the name of a symbol \fIold\fR, to \fInew\fR.  This can be useful
+when one is trying link two things together for which you have no
+source, and there are name collisions.
+.IP "\fB\-\-redefine\-syms=\fR\fIfilename\fR" 4
+.IX Item "--redefine-syms=filename"
+Apply \fB\-\-redefine\-sym\fR to each symbol pair "\fIold\fR \fInew\fR"
+listed in the file \fIfilename\fR.  \fIfilename\fR is simply a flat file,
+with one symbol pair per line.  Line comments may be introduced by the hash
+character.  This option may be given more than once.
+.IP "\fB\-\-weaken\fR" 4
+.IX Item "--weaken"
+Change all global symbols in the file to be weak.  This can be useful
+when building an object which will be linked against other objects using
+the \fB\-R\fR option to the linker.  This option is only effective when
+using an object file format which supports weak symbols.
+.IP "\fB\-\-keep\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-symbols=filename"
+Apply \fB\-\-keep\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR.  \fIfilename\fR is simply a flat file, with one symbol
+name per line.  Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-symbols=filename"
+Apply \fB\-\-strip\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR.  \fIfilename\fR is simply a flat file, with one symbol
+name per line.  Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-strip\-unneeded\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--strip-unneeded-symbols=filename"
+Apply \fB\-\-strip\-unneeded\-symbol\fR option to each symbol listed in
+the file \fIfilename\fR.  \fIfilename\fR is simply a flat file, with one
+symbol name per line.  Line comments may be introduced by the hash
+character.  This option may be given more than once.
+.IP "\fB\-\-keep\-global\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--keep-global-symbols=filename"
+Apply \fB\-\-keep\-global\-symbol\fR option to each symbol listed in the
+file \fIfilename\fR.  \fIfilename\fR is simply a flat file, with one
+symbol name per line.  Line comments may be introduced by the hash
+character.  This option may be given more than once.
+.IP "\fB\-\-localize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--localize-symbols=filename"
+Apply \fB\-\-localize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR.  \fIfilename\fR is simply a flat file, with one symbol
+name per line.  Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-globalize\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--globalize-symbols=filename"
+Apply \fB\-\-globalize\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR.  \fIfilename\fR is simply a flat file, with one symbol
+name per line.  Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-weaken\-symbols=\fR\fIfilename\fR" 4
+.IX Item "--weaken-symbols=filename"
+Apply \fB\-\-weaken\-symbol\fR option to each symbol listed in the file
+\&\fIfilename\fR.  \fIfilename\fR is simply a flat file, with one symbol
+name per line.  Line comments may be introduced by the hash character.
+This option may be given more than once.
+.IP "\fB\-\-alt\-machine\-code=\fR\fIindex\fR" 4
+.IX Item "--alt-machine-code=index"
+If the output architecture has alternate machine codes, use the
+\&\fIindex\fRth code instead of the default one.  This is useful in case
+a machine is assigned an official code and the tool-chain adopts the
+new code, but other applications still depend on the original code
+being used.  For \s-1ELF\s0 based architectures if the \fIindex\fR
+alternative does not exist then the value is treated as an absolute
+number to be stored in the e_machine field of the \s-1ELF\s0 header.
+.IP "\fB\-\-writable\-text\fR" 4
+.IX Item "--writable-text"
+Mark the output text as writable.  This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-readonly\-text\fR" 4
+.IX Item "--readonly-text"
+Make the output text write protected.  This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-pure\fR" 4
+.IX Item "--pure"
+Mark the output file as demand paged.  This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-impure\fR" 4
+.IX Item "--impure"
+Mark the output file as impure.  This option isn't meaningful for all
+object file formats.
+.IP "\fB\-\-prefix\-symbols=\fR\fIstring\fR" 4
+.IX Item "--prefix-symbols=string"
+Prefix all symbols in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-sections=string"
+Prefix all section names in the output file with \fIstring\fR.
+.IP "\fB\-\-prefix\-alloc\-sections=\fR\fIstring\fR" 4
+.IX Item "--prefix-alloc-sections=string"
+Prefix all the names of all allocated sections in the output file with
+\&\fIstring\fR.
+.IP "\fB\-\-add\-gnu\-debuglink=\fR\fIpath-to-file\fR" 4
+.IX Item "--add-gnu-debuglink=path-to-file"
+Creates a .gnu_debuglink section which contains a reference to \fIpath-to-file\fR
+and adds it to the output file.
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact.  In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable.  One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required.  The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal.  Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal.  Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary.  Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional.  You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to  \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to  \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to  foo.full>"
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run objcopy --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable.  It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files.  It
+does not make sense to use it on object files where the debugging
+information may be incomplete.  Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-\-file\-alignment\fR \fInum\fR" 4
+.IX Item "--file-alignment num"
+Specify the file alignment.  Sections in the file will always begin at
+file offsets which are multiples of this number.  This defaults to
+512.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-heap\fR \fIreserve\fR" 4
+.IX Item "--heap reserve"
+.PD 0
+.IP "\fB\-\-heap\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--heap reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as heap for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-image\-base\fR \fIvalue\fR" 4
+.IX Item "--image-base value"
+Use \fIvalue\fR as the base address of your program or dll.  This is
+the lowest memory location that will be used when your program or dll
+is loaded.  To reduce the need to relocate and improve performance of
+your dlls, each should have a unique base address and not overlap any
+other dlls.  The default is 0x400000 for executables, and 0x10000000
+for dlls.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-section\-alignment\fR \fInum\fR" 4
+.IX Item "--section-alignment num"
+Sets the section alignment.  Sections in memory will always begin at
+addresses which are a multiple of this number.  Defaults to 0x1000.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-stack\fR \fIreserve\fR" 4
+.IX Item "--stack reserve"
+.PD 0
+.IP "\fB\-\-stack\fR \fIreserve\fR\fB,\fR\fIcommit\fR" 4
+.IX Item "--stack reserve,commit"
+.PD
+Specify the number of bytes of memory to reserve (and optionally commit)
+to be used as stack for this program.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-subsystem\fR \fIwhich\fR" 4
+.IX Item "--subsystem which"
+.PD 0
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR" 4
+.IX Item "--subsystem which:major"
+.IP "\fB\-\-subsystem\fR \fIwhich\fR\fB:\fR\fImajor\fR\fB.\fR\fIminor\fR" 4
+.IX Item "--subsystem which:major.minor"
+.PD
+Specifies the subsystem under which your program will execute.  The
+legal values for \fIwhich\fR are \f(CW\*(C`native\*(C'\fR, \f(CW\*(C`windows\*(C'\fR,
+\&\f(CW\*(C`console\*(C'\fR, \f(CW\*(C`posix\*(C'\fR, \f(CW\*(C`efi\-app\*(C'\fR, \f(CW\*(C`efi\-bsd\*(C'\fR,
+\&\f(CW\*(C`efi\-rtd\*(C'\fR, \f(CW\*(C`sal\-rtd\*(C'\fR, and \f(CW\*(C`xbox\*(C'\fR.  You may optionally set
+the subsystem version also.  Numeric values are also accepted for
+\&\fIwhich\fR.
+[This option is specific to \s-1PE\s0 targets.]
+.IP "\fB\-\-extract\-symbol\fR" 4
+.IX Item "--extract-symbol"
+Keep the file's section flags and symbols but remove all section data.
+Specifically, the option:
+.RS 4
+.IP "*<removes the contents of all sections;>" 4
+.IX Item "*<removes the contents of all sections;>"
+.PD 0
+.IP "*<sets the size of every section to zero; and>" 4
+.IX Item "*<sets the size of every section to zero; and>"
+.IP "*<sets the file's start address to zero.>" 4
+.IX Item "*<sets the file's start address to zero.>"
+.RE
+.RS 4
+.PD
+.Sp
+This option is used to build a \fI.sym\fR file for a VxWorks kernel.
+It can also be a useful way of reducing the size of a \fB\-\-just\-symbols\fR
+linker input file.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBobjcopy\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified.  In the case of
+archives, \fBobjcopy \-V\fR lists all members of the archive.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBobjcopy\fR.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIld\fR\|(1), \fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objdump.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objdump.1
new file mode 100644
index 00000000..05ba35ca
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-objdump.1
@@ -0,0 +1,795 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
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+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
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+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "OBJDUMP 1"
+.TH OBJDUMP 1 "2013-10-22" "binutils-2.20" "GNU Development Tools"
+.SH "NAME"
+objdump \- display information from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+objdump [\fB\-a\fR|\fB\-\-archive\-headers\fR]
+        [\fB\-b\fR \fIbfdname\fR|\fB\-\-target=\fR\fIbfdname\fR]
+        [\fB\-C\fR|\fB\-\-demangle\fR[=\fIstyle\fR] ]
+        [\fB\-d\fR|\fB\-\-disassemble\fR]
+        [\fB\-D\fR|\fB\-\-disassemble\-all\fR]
+        [\fB\-z\fR|\fB\-\-disassemble\-zeroes\fR]
+        [\fB\-EB\fR|\fB\-EL\fR|\fB\-\-endian=\fR{big | little }]
+        [\fB\-f\fR|\fB\-\-file\-headers\fR]
+        [\fB\-F\fR|\fB\-\-file\-offsets\fR]
+        [\fB\-\-file\-start\-context\fR]
+        [\fB\-g\fR|\fB\-\-debugging\fR]
+        [\fB\-e\fR|\fB\-\-debugging\-tags\fR]
+        [\fB\-h\fR|\fB\-\-section\-headers\fR|\fB\-\-headers\fR]
+        [\fB\-i\fR|\fB\-\-info\fR]
+        [\fB\-j\fR \fIsection\fR|\fB\-\-section=\fR\fIsection\fR]
+        [\fB\-l\fR|\fB\-\-line\-numbers\fR]
+        [\fB\-S\fR|\fB\-\-source\fR]
+        [\fB\-m\fR \fImachine\fR|\fB\-\-architecture=\fR\fImachine\fR]
+        [\fB\-M\fR \fIoptions\fR|\fB\-\-disassembler\-options=\fR\fIoptions\fR]
+        [\fB\-p\fR|\fB\-\-private\-headers\fR]
+        [\fB\-r\fR|\fB\-\-reloc\fR]
+        [\fB\-R\fR|\fB\-\-dynamic\-reloc\fR]
+        [\fB\-s\fR|\fB\-\-full\-contents\fR]
+        [\fB\-W[lLiaprmfFsoR]\fR|
+         \fB\-\-dwarf\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+        [\fB\-G\fR|\fB\-\-stabs\fR]
+        [\fB\-t\fR|\fB\-\-syms\fR]
+        [\fB\-T\fR|\fB\-\-dynamic\-syms\fR]
+        [\fB\-x\fR|\fB\-\-all\-headers\fR]
+        [\fB\-w\fR|\fB\-\-wide\fR]
+        [\fB\-\-start\-address=\fR\fIaddress\fR]
+        [\fB\-\-stop\-address=\fR\fIaddress\fR]
+        [\fB\-\-prefix\-addresses\fR]
+        [\fB\-\-[no\-]show\-raw\-insn\fR]
+        [\fB\-\-adjust\-vma=\fR\fIoffset\fR]
+        [\fB\-\-special\-syms\fR]
+        [\fB\-\-prefix=\fR\fIprefix\fR]
+        [\fB\-\-prefix\-strip=\fR\fIlevel\fR]
+        [\fB\-\-insn\-width=\fR\fIwidth\fR]
+        [\fB\-V\fR|\fB\-\-version\fR]
+        [\fB\-H\fR|\fB\-\-help\fR]
+        \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBobjdump\fR displays information about one or more object files.
+The options control what particular information to display.  This
+information is mostly useful to programmers who are working on the
+compilation tools, as opposed to programmers who just want their
+program to compile and work.
+.PP
+\&\fIobjfile\fR... are the object files to be examined.  When you
+specify archives, \fBobjdump\fR shows information on each of the member
+object files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.  At least one option from the list
+\&\fB\-a,\-d,\-D,\-e,\-f,\-g,\-G,\-h,\-H,\-p,\-r,\-R,\-s,\-S,\-t,\-T,\-V,\-x\fR must be given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-archive\-header\fR" 4
+.IX Item "--archive-header"
+.PD
+If any of the \fIobjfile\fR files are archives, display the archive
+header information (in a format similar to \fBls \-l\fR).  Besides the
+information you could list with \fBar tv\fR, \fBobjdump \-a\fR shows
+the object file format of each archive member.
+.IP "\fB\-\-adjust\-vma=\fR\fIoffset\fR" 4
+.IX Item "--adjust-vma=offset"
+When dumping information, first add \fIoffset\fR to all the section
+addresses.  This is useful if the section addresses do not correspond to
+the symbol table, which can happen when putting sections at particular
+addresses when using a format which can not represent section addresses,
+such as a.out.
+.IP "\fB\-b\fR \fIbfdname\fR" 4
+.IX Item "-b bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify that the object-code format for the object files is
+\&\fIbfdname\fR.  This option may not be necessary; \fIobjdump\fR can
+automatically recognize many formats.
+.Sp
+For example,
+.Sp
+.Vb 1
+\&        objdump -b oasys -m vax -h fu.o
+.Ve
+.Sp
+displays summary information from the section headers (\fB\-h\fR) of
+\&\fIfu.o\fR, which is explicitly identified (\fB\-m\fR) as a \s-1VAX\s0 object
+file in the format produced by Oasys compilers.  You can list the
+formats available with the \fB\-i\fR option.
+.IP "\fB\-C\fR" 4
+.IX Item "-C"
+.PD 0
+.IP "\fB\-\-demangle[=\fR\fIstyle\fR\fB]\fR" 4
+.IX Item "--demangle[=style]"
+.PD
+Decode (\fIdemangle\fR) low-level symbol names into user-level names.
+Besides removing any initial underscore prepended by the system, this
+makes \*(C+ function names readable.  Different compilers have different
+mangling styles. The optional demangling style argument can be used to
+choose an appropriate demangling style for your compiler. 
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-debugging\fR" 4
+.IX Item "--debugging"
+.PD
+Display debugging information.  This attempts to parse \s-1STABS\s0 and \s-1IEEE\s0
+debugging format information stored in the file and print it out using
+a C like syntax.  If neither of these formats are found this option
+falls back on the \fB\-W\fR option to print any \s-1DWARF\s0 information in
+the file.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-debugging\-tags\fR" 4
+.IX Item "--debugging-tags"
+.PD
+Like \fB\-g\fR, but the information is generated in a format compatible
+with ctags tool.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-disassemble\fR" 4
+.IX Item "--disassemble"
+.PD
+Display the assembler mnemonics for the machine instructions from
+\&\fIobjfile\fR.  This option only disassembles those sections which are
+expected to contain instructions.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-disassemble\-all\fR" 4
+.IX Item "--disassemble-all"
+.PD
+Like \fB\-d\fR, but disassemble the contents of all sections, not just
+those expected to contain instructions.
+.Sp
+If the target is an \s-1ARM\s0 architecture this switch also has the effect
+of forcing the disassembler to decode pieces of data found in code
+sections as if they were instructions.
+.IP "\fB\-\-prefix\-addresses\fR" 4
+.IX Item "--prefix-addresses"
+When disassembling, print the complete address on each line.  This is
+the older disassembly format.
+.IP "\fB\-EB\fR" 4
+.IX Item "-EB"
+.PD 0
+.IP "\fB\-EL\fR" 4
+.IX Item "-EL"
+.IP "\fB\-\-endian={big|little}\fR" 4
+.IX Item "--endian={big|little}"
+.PD
+Specify the endianness of the object files.  This only affects
+disassembly.  This can be useful when disassembling a file format which
+does not describe endianness information, such as S\-records.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-file\-headers\fR" 4
+.IX Item "--file-headers"
+.PD
+Display summary information from the overall header of
+each of the \fIobjfile\fR files.
+.IP "\fB\-F\fR" 4
+.IX Item "-F"
+.PD 0
+.IP "\fB\-\-file\-offsets\fR" 4
+.IX Item "--file-offsets"
+.PD
+When disassembling sections, whenever a symbol is displayed, also
+display the file offset of the region of data that is about to be
+dumped.  If zeroes are being skipped, then when disassembly resumes,
+tell the user how many zeroes were skipped and the file offset of the
+location from where the disassembly resumes.  When dumping sections,
+display the file offset of the location from where the dump starts.
+.IP "\fB\-\-file\-start\-context\fR" 4
+.IX Item "--file-start-context"
+Specify that when displaying interlisted source code/disassembly
+(assumes \fB\-S\fR) from a file that has not yet been displayed, extend the
+context to the start of the file.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display summary information from the section headers of the
+object file.
+.Sp
+File segments may be relocated to nonstandard addresses, for example by
+using the \fB\-Ttext\fR, \fB\-Tdata\fR, or \fB\-Tbss\fR options to
+\&\fBld\fR.  However, some object file formats, such as a.out, do not
+store the starting address of the file segments.  In those situations,
+although \fBld\fR relocates the sections correctly, using \fBobjdump
+\&\-h\fR to list the file section headers cannot show the correct addresses.
+Instead, it shows the usual addresses, which are implicit for the
+target.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Print a summary of the options to \fBobjdump\fR and exit.
+.IP "\fB\-i\fR" 4
+.IX Item "-i"
+.PD 0
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+.PD
+Display a list showing all architectures and object formats available
+for specification with \fB\-b\fR or \fB\-m\fR.
+.IP "\fB\-j\fR \fIname\fR" 4
+.IX Item "-j name"
+.PD 0
+.IP "\fB\-\-section=\fR\fIname\fR" 4
+.IX Item "--section=name"
+.PD
+Display information only for section \fIname\fR.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-line\-numbers\fR" 4
+.IX Item "--line-numbers"
+.PD
+Label the display (using debugging information) with the filename and
+source line numbers corresponding to the object code or relocs shown.
+Only useful with \fB\-d\fR, \fB\-D\fR, or \fB\-r\fR.
+.IP "\fB\-m\fR \fImachine\fR" 4
+.IX Item "-m machine"
+.PD 0
+.IP "\fB\-\-architecture=\fR\fImachine\fR" 4
+.IX Item "--architecture=machine"
+.PD
+Specify the architecture to use when disassembling object files.  This
+can be useful when disassembling object files which do not describe
+architecture information, such as S\-records.  You can list the available
+architectures with the \fB\-i\fR option.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch has an
+additional effect.  It restricts the disassembly to only those
+instructions supported by the architecture specified by \fImachine\fR.
+If it is necessary to use this switch because the input file does not
+contain any architecture information, but it is also desired to
+disassemble all the instructions use \fB\-marm\fR.
+.IP "\fB\-M\fR \fIoptions\fR" 4
+.IX Item "-M options"
+.PD 0
+.IP "\fB\-\-disassembler\-options=\fR\fIoptions\fR" 4
+.IX Item "--disassembler-options=options"
+.PD
+Pass target specific information to the disassembler.  Only supported on
+some targets.  If it is necessary to specify more than one
+disassembler option then multiple \fB\-M\fR options can be used or
+can be placed together into a comma separated list.
+.Sp
+If the target is an \s-1ARM\s0 architecture then this switch can be used to
+select which register name set is used during disassembler.  Specifying
+\&\fB\-M reg-names-std\fR (the default) will select the register names as
+used in \s-1ARM\s0's instruction set documentation, but with register 13 called
+\&'sp', register 14 called 'lr' and register 15 called 'pc'.  Specifying
+\&\fB\-M reg-names-apcs\fR will select the name set used by the \s-1ARM\s0
+Procedure Call Standard, whilst specifying \fB\-M reg-names-raw\fR will
+just use \fBr\fR followed by the register number.
+.Sp
+There are also two variants on the \s-1APCS\s0 register naming scheme enabled
+by \fB\-M reg-names-atpcs\fR and \fB\-M reg-names-special-atpcs\fR which
+use the ARM/Thumb Procedure Call Standard naming conventions.  (Either
+with the normal register names or the special register names).
+.Sp
+This option can also be used for \s-1ARM\s0 architectures to force the
+disassembler to interpret all instructions as Thumb instructions by
+using the switch \fB\-\-disassembler\-options=force\-thumb\fR.  This can be
+useful when attempting to disassemble thumb code produced by other
+compilers.
+.Sp
+For the x86, some of the options duplicate functions of the \fB\-m\fR
+switch, but allow finer grained control.  Multiple selections from the
+following may be specified as a comma separated string.
+\&\fBx86\-64\fR, \fBi386\fR and \fBi8086\fR select disassembly for
+the given architecture.  \fBintel\fR and \fBatt\fR select between
+intel syntax mode and \s-1AT&T\s0 syntax mode.
+\&\fBintel-mnemonic\fR and \fBatt-mnemonic\fR select between
+intel mnemonic mode and \s-1AT&T\s0 mnemonic mode. \fBintel-mnemonic\fR
+implies \fBintel\fR and \fBatt-mnemonic\fR implies \fBatt\fR.
+\&\fBaddr64\fR, \fBaddr32\fR,
+\&\fBaddr16\fR, \fBdata32\fR and \fBdata16\fR specify the default
+address size and operand size.  These four options will be overridden if
+\&\fBx86\-64\fR, \fBi386\fR or \fBi8086\fR appear later in the
+option string.  Lastly, \fBsuffix\fR, when in \s-1AT&T\s0 mode,
+instructs the disassembler to print a mnemonic suffix even when the
+suffix could be inferred by the operands.
+.Sp
+For PowerPC, \fBbooke\fR controls the disassembly of BookE
+instructions.  \fB32\fR and \fB64\fR select PowerPC and
+PowerPC64 disassembly, respectively.  \fBe300\fR selects
+disassembly for the e300 family.  \fB440\fR selects disassembly for
+the PowerPC 440.  \fBppcps\fR selects disassembly for the paired
+single instructions of the \s-1PPC750CL\s0.
+.Sp
+For \s-1MIPS\s0, this option controls the printing of instruction mnemonic
+names and register names in disassembled instructions.  Multiple
+selections from the following may be specified as a comma separated
+string, and invalid options are ignored:
+.RS 4
+.ie n .IP """no\-aliases""" 4
+.el .IP "\f(CWno\-aliases\fR" 4
+.IX Item "no-aliases"
+Print the 'raw' instruction mnemonic instead of some pseudo
+instruction mnemonic.  I.e., print 'daddu' or 'or' instead of 'move',
+\&'sll' instead of 'nop', etc.
+.ie n .IP """gpr\-names=\f(CI\s-1ABI\s0\f(CW""" 4
+.el .IP "\f(CWgpr\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
+.IX Item "gpr-names=ABI"
+Print \s-1GPR\s0 (general\-purpose register) names as appropriate
+for the specified \s-1ABI\s0.  By default, \s-1GPR\s0 names are selected according to
+the \s-1ABI\s0 of the binary being disassembled.
+.ie n .IP """fpr\-names=\f(CI\s-1ABI\s0\f(CW""" 4
+.el .IP "\f(CWfpr\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
+.IX Item "fpr-names=ABI"
+Print \s-1FPR\s0 (floating\-point register) names as
+appropriate for the specified \s-1ABI\s0.  By default, \s-1FPR\s0 numbers are printed
+rather than names.
+.ie n .IP """cp0\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
+.el .IP "\f(CWcp0\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
+.IX Item "cp0-names=ARCH"
+Print \s-1CP0\s0 (system control coprocessor; coprocessor 0) register names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR.  By default, \s-1CP0\s0 register names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """hwr\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
+.el .IP "\f(CWhwr\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
+.IX Item "hwr-names=ARCH"
+Print \s-1HWR\s0 (hardware register, used by the \f(CW\*(C`rdhwr\*(C'\fR instruction) names
+as appropriate for the \s-1CPU\s0 or architecture specified by
+\&\fI\s-1ARCH\s0\fR.  By default, \s-1HWR\s0 names are selected according to
+the architecture and \s-1CPU\s0 of the binary being disassembled.
+.ie n .IP """reg\-names=\f(CI\s-1ABI\s0\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CI\s-1ABI\s0\f(CW\fR" 4
+.IX Item "reg-names=ABI"
+Print \s-1GPR\s0 and \s-1FPR\s0 names as appropriate for the selected \s-1ABI\s0.
+.ie n .IP """reg\-names=\f(CI\s-1ARCH\s0\f(CW""" 4
+.el .IP "\f(CWreg\-names=\f(CI\s-1ARCH\s0\f(CW\fR" 4
+.IX Item "reg-names=ARCH"
+Print CPU-specific register names (\s-1CP0\s0 register and \s-1HWR\s0 names)
+as appropriate for the selected \s-1CPU\s0 or architecture.
+.RE
+.RS 4
+.Sp
+For any of the options listed above, \fI\s-1ABI\s0\fR or
+\&\fI\s-1ARCH\s0\fR may be specified as \fBnumeric\fR to have numbers printed
+rather than names, for the selected types of registers.
+You can list the available values of \fI\s-1ABI\s0\fR and \fI\s-1ARCH\s0\fR using
+the \fB\-\-help\fR option.
+.Sp
+For \s-1VAX\s0, you can specify function entry addresses with \fB\-M
+entry:0xf00ba\fR.  You can use this multiple times to properly
+disassemble \s-1VAX\s0 binary files that don't contain symbol tables (like
+\&\s-1ROM\s0 dumps).  In these cases, the function entry mask would otherwise
+be decoded as \s-1VAX\s0 instructions, which would probably lead the rest
+of the function being wrongly disassembled.
+.RE
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-private\-headers\fR" 4
+.IX Item "--private-headers"
+.PD
+Print information that is specific to the object file format.  The exact
+information printed depends upon the object file format.  For some
+object file formats, no additional information is printed.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-reloc\fR" 4
+.IX Item "--reloc"
+.PD
+Print the relocation entries of the file.  If used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-R\fR" 4
+.IX Item "-R"
+.PD 0
+.IP "\fB\-\-dynamic\-reloc\fR" 4
+.IX Item "--dynamic-reloc"
+.PD
+Print the dynamic relocation entries of the file.  This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries.  As for \fB\-r\fR, if used with \fB\-d\fR or
+\&\fB\-D\fR, the relocations are printed interspersed with the
+disassembly.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-full\-contents\fR" 4
+.IX Item "--full-contents"
+.PD
+Display the full contents of any sections requested.  By default all
+non-empty sections are displayed.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-source\fR" 4
+.IX Item "--source"
+.PD
+Display source code intermixed with disassembly, if possible.  Implies
+\&\fB\-d\fR.
+.IP "\fB\-\-prefix=\fR\fIprefix\fR" 4
+.IX Item "--prefix=prefix"
+Specify \fIprefix\fR to add to the absolute paths when used with
+\&\fB\-S\fR. 
+.IP "\fB\-\-prefix\-strip=\fR\fIlevel\fR" 4
+.IX Item "--prefix-strip=level"
+Indicate how many initial directory names to strip off the hardwired
+absolute paths. It has no effect without \fB\-\-prefix=\fR\fIprefix\fR.
+.IP "\fB\-\-show\-raw\-insn\fR" 4
+.IX Item "--show-raw-insn"
+When disassembling instructions, print the instruction in hex as well as
+in symbolic form.  This is the default except when
+\&\fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-no\-show\-raw\-insn\fR" 4
+.IX Item "--no-show-raw-insn"
+When disassembling instructions, do not print the instruction bytes.
+This is the default when \fB\-\-prefix\-addresses\fR is used.
+.IP "\fB\-\-insn\-width=\fR\fIwidth\fR" 4
+.IX Item "--insn-width=width"
+Display \fIwidth\fR bytes on a single line when disassembling
+instructions.
+.IP "\fB\-W[lLiaprmfFsoR]\fR" 4
+.IX Item "-W[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--dwarf[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present.  If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.IP "\fB\-G\fR" 4
+.IX Item "-G"
+.PD 0
+.IP "\fB\-\-stabs\fR" 4
+.IX Item "--stabs"
+.PD
+Display the full contents of any sections requested.  Display the
+contents of the .stab and .stab.index and .stab.excl sections from an
+\&\s-1ELF\s0 file.  This is only useful on systems (such as Solaris 2.0) in which
+\&\f(CW\*(C`.stab\*(C'\fR debugging symbol-table entries are carried in an \s-1ELF\s0
+section.  In most other file formats, debugging symbol-table entries are
+interleaved with linkage symbols, and are visible in the \fB\-\-syms\fR
+output.
+.IP "\fB\-\-start\-address=\fR\fIaddress\fR" 4
+.IX Item "--start-address=address"
+Start displaying data at the specified address.  This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-\-stop\-address=\fR\fIaddress\fR" 4
+.IX Item "--stop-address=address"
+Stop displaying data at the specified address.  This affects the output
+of the \fB\-d\fR, \fB\-r\fR and \fB\-s\fR options.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Print the symbol table entries of the file.
+This is similar to the information provided by the \fBnm\fR program,
+although the display format is different.  The format of the output
+depends upon the format of the file being dumped, but there are two main
+types.  One looks like this:
+.Sp
+.Vb 2
+\&        [  4](sec  3)(fl 0x00)(ty   0)(scl   3) (nx 1) 0x00000000 .bss
+\&        [  6](sec  1)(fl 0x00)(ty   0)(scl   2) (nx 0) 0x00000000 fred
+.Ve
+.Sp
+where the number inside the square brackets is the number of the entry
+in the symbol table, the \fIsec\fR number is the section number, the
+\&\fIfl\fR value are the symbol's flag bits, the \fIty\fR number is the
+symbol's type, the \fIscl\fR number is the symbol's storage class and
+the \fInx\fR value is the number of auxilary entries associated with
+the symbol.  The last two fields are the symbol's value and its name.
+.Sp
+The other common output format, usually seen with \s-1ELF\s0 based files,
+looks like this:
+.Sp
+.Vb 2
+\&        00000000 l    d  .bss   00000000 .bss
+\&        00000000 g       .text  00000000 fred
+.Ve
+.Sp
+Here the first number is the symbol's value (sometimes refered to as
+its address).  The next field is actually a set of characters and
+spaces indicating the flag bits that are set on the symbol.  These
+characters are described below.  Next is the section with which the
+symbol is associated or \fI*ABS*\fR if the section is absolute (ie
+not connected with any section), or \fI*UND*\fR if the section is
+referenced in the file being dumped, but not defined there.
+.Sp
+After the section name comes another field, a number, which for common
+symbols is the alignment and for other symbol is the size.  Finally
+the symbol's name is displayed.
+.Sp
+The flag characters are divided into 7 groups as follows:
+.RS 4
+.ie n .IP """l""" 4
+.el .IP "\f(CWl\fR" 4
+.IX Item "l"
+.PD 0
+.ie n .IP """g""" 4
+.el .IP "\f(CWg\fR" 4
+.IX Item "g"
+.ie n .IP """u""" 4
+.el .IP "\f(CWu\fR" 4
+.IX Item "u"
+.ie n .IP """!""" 4
+.el .IP "\f(CW!\fR" 4
+.IX Item "!"
+.PD
+The symbol is a local (l), global (g), unique global (u), neither
+global nor local (a space) or both global and local (!).  A
+symbol can be neither local or global for a variety of reasons, e.g.,
+because it is used for debugging, but it is probably an indication of
+a bug if it is ever both local and global.  Unique global symbols are
+a \s-1GNU\s0 extension to the standard set of \s-1ELF\s0 symbol bindings.  For such
+a symbol the dynamic linker will make sure that in the entire process
+there is just one symbol with this name and type in use.
+.ie n .IP """w""" 4
+.el .IP "\f(CWw\fR" 4
+.IX Item "w"
+The symbol is weak (w) or strong (a space).
+.ie n .IP """C""" 4
+.el .IP "\f(CWC\fR" 4
+.IX Item "C"
+The symbol denotes a constructor (C) or an ordinary symbol (a space).
+.ie n .IP """W""" 4
+.el .IP "\f(CWW\fR" 4
+.IX Item "W"
+The symbol is a warning (W) or a normal symbol (a space).  A warning
+symbol's name is a message to be displayed if the symbol following the
+warning symbol is ever referenced.
+.ie n .IP """I""" 4
+.el .IP "\f(CWI\fR" 4
+.IX Item "I"
+.PD 0
+.ie n .IP """i""" 4
+.el .IP "\f(CWi\fR" 4
+.IX Item "i"
+.PD
+The symbol is an indirect reference to another symbol (I), a function
+to be evaluated during reloc processing (i) or a normal symbol (a
+space).
+.ie n .IP """d""" 4
+.el .IP "\f(CWd\fR" 4
+.IX Item "d"
+.PD 0
+.ie n .IP """D""" 4
+.el .IP "\f(CWD\fR" 4
+.IX Item "D"
+.PD
+The symbol is a debugging symbol (d) or a dynamic symbol (D) or a
+normal symbol (a space).
+.ie n .IP """F""" 4
+.el .IP "\f(CWF\fR" 4
+.IX Item "F"
+.PD 0
+.ie n .IP """f""" 4
+.el .IP "\f(CWf\fR" 4
+.IX Item "f"
+.ie n .IP """O""" 4
+.el .IP "\f(CWO\fR" 4
+.IX Item "O"
+.PD
+The symbol is the name of a function (F) or a file (f) or an object
+(O) or just a normal symbol (a space).
+.RE
+.RS 4
+.RE
+.IP "\fB\-T\fR" 4
+.IX Item "-T"
+.PD 0
+.IP "\fB\-\-dynamic\-syms\fR" 4
+.IX Item "--dynamic-syms"
+.PD
+Print the dynamic symbol table entries of the file.  This is only
+meaningful for dynamic objects, such as certain types of shared
+libraries.  This is similar to the information provided by the \fBnm\fR
+program when given the \fB\-D\fR (\fB\-\-dynamic\fR) option.
+.IP "\fB\-\-special\-syms\fR" 4
+.IX Item "--special-syms"
+When displaying symbols include those which the target considers to be
+special in some way and which would not normally be of interest to the
+user.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the version number of \fBobjdump\fR and exit.
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-all\-headers\fR" 4
+.IX Item "--all-headers"
+.PD
+Display all available header information, including the symbol table and
+relocation entries.  Using \fB\-x\fR is equivalent to specifying all of
+\&\fB\-a \-f \-h \-p \-r \-t\fR.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Format some lines for output devices that have more than 80 columns.
+Also do not truncate symbol names when they are displayed.
+.IP "\fB\-z\fR" 4
+.IX Item "-z"
+.PD 0
+.IP "\fB\-\-disassemble\-zeroes\fR" 4
+.IX Item "--disassemble-zeroes"
+.PD
+Normally the disassembly output will skip blocks of zeroes.  This
+option directs the disassembler to disassemble those blocks, just like
+any other data.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.  
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fInm\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ranlib.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ranlib.1
new file mode 100644
index 00000000..a72019c7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-ranlib.1
@@ -0,0 +1,199 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "RANLIB 1"
+.TH RANLIB 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+ranlib \- generate index to archive.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+ranlib [\fB\-vVt\fR] \fIarchive\fR
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBranlib\fR generates an index to the contents of an archive and
+stores it in the archive.  The index lists each symbol defined by a
+member of an archive that is a relocatable object file.
+.PP
+You may use \fBnm \-s\fR or \fBnm \-\-print\-armap\fR to list this index.
+.PP
+An archive with such an index speeds up linking to the library and
+allows routines in the library to call each other without regard to
+their placement in the archive.
+.PP
+The \s-1GNU\s0 \fBranlib\fR program is another form of \s-1GNU\s0 \fBar\fR; running
+\&\fBranlib\fR is completely equivalent to executing \fBar \-s\fR.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number of \fBranlib\fR.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+Update the timestamp of the symbol map of an archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-readelf.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-readelf.1
new file mode 100644
index 00000000..07132eee
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-readelf.1
@@ -0,0 +1,420 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "READELF 1"
+.TH READELF 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+readelf \- Displays information about ELF files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+readelf [\fB\-a\fR|\fB\-\-all\fR]
+        [\fB\-h\fR|\fB\-\-file\-header\fR]
+        [\fB\-l\fR|\fB\-\-program\-headers\fR|\fB\-\-segments\fR]
+        [\fB\-S\fR|\fB\-\-section\-headers\fR|\fB\-\-sections\fR]
+        [\fB\-g\fR|\fB\-\-section\-groups\fR]
+        [\fB\-t\fR|\fB\-\-section\-details\fR]
+        [\fB\-e\fR|\fB\-\-headers\fR]
+        [\fB\-s\fR|\fB\-\-syms\fR|\fB\-\-symbols\fR]
+        [\fB\-n\fR|\fB\-\-notes\fR]
+        [\fB\-r\fR|\fB\-\-relocs\fR]
+        [\fB\-u\fR|\fB\-\-unwind\fR]
+        [\fB\-d\fR|\fB\-\-dynamic\fR]
+        [\fB\-V\fR|\fB\-\-version\-info\fR]
+        [\fB\-A\fR|\fB\-\-arch\-specific\fR]
+        [\fB\-D\fR|\fB\-\-use\-dynamic\fR]
+        [\fB\-x\fR <number or name>|\fB\-\-hex\-dump=\fR<number or name>]
+        [\fB\-p\fR <number or name>|\fB\-\-string\-dump=\fR<number or name>]
+        [\fB\-R\fR <number or name>|\fB\-\-relocated\-dump=\fR<number or name>]
+        [\fB\-c\fR|\fB\-\-archive\-index\fR]
+        [\fB\-w[lLiaprmfFsoR]\fR|
+         \fB\-\-debug\-dump\fR[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]]
+        [\fB\-I\fR|\fB\-histogram\fR]
+        [\fB\-v\fR|\fB\-\-version\fR]
+        [\fB\-W\fR|\fB\-\-wide\fR]
+        [\fB\-H\fR|\fB\-\-help\fR]
+        \fIelffile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBreadelf\fR displays information about one or more \s-1ELF\s0 format object
+files.  The options control what particular information to display.
+.PP
+\&\fIelffile\fR... are the object files to be examined.  32\-bit and
+64\-bit \s-1ELF\s0 files are supported, as are archives containing \s-1ELF\s0 files.
+.PP
+This program performs a similar function to \fBobjdump\fR but it
+goes into more detail and it exists independently of the \s-1BFD\s0
+library, so if there is a bug in \s-1BFD\s0 then readelf will not be
+affected.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The long and short forms of options, shown here as alternatives, are
+equivalent.  At least one option besides \fB\-v\fR or \fB\-H\fR must be
+given.
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.PD
+Equivalent to specifying \fB\-\-file\-header\fR,
+\&\fB\-\-program\-headers\fR, \fB\-\-sections\fR, \fB\-\-symbols\fR,
+\&\fB\-\-relocs\fR, \fB\-\-dynamic\fR, \fB\-\-notes\fR and
+\&\fB\-\-version\-info\fR.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-file\-header\fR" 4
+.IX Item "--file-header"
+.PD
+Displays the information contained in the \s-1ELF\s0 header at the start of the
+file.
+.IP "\fB\-l\fR" 4
+.IX Item "-l"
+.PD 0
+.IP "\fB\-\-program\-headers\fR" 4
+.IX Item "--program-headers"
+.IP "\fB\-\-segments\fR" 4
+.IX Item "--segments"
+.PD
+Displays the information contained in the file's segment headers, if it
+has any.
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.PD 0
+.IP "\fB\-\-sections\fR" 4
+.IX Item "--sections"
+.IP "\fB\-\-section\-headers\fR" 4
+.IX Item "--section-headers"
+.PD
+Displays the information contained in the file's section headers, if it
+has any.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-\-section\-groups\fR" 4
+.IX Item "--section-groups"
+.PD
+Displays the information contained in the file's section groups, if it
+has any.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-section\-details\fR" 4
+.IX Item "--section-details"
+.PD
+Displays the detailed section information. Implies \fB\-S\fR.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-symbols\fR" 4
+.IX Item "--symbols"
+.IP "\fB\-\-syms\fR" 4
+.IX Item "--syms"
+.PD
+Displays the entries in symbol table section of the file, if it has one.
+.IP "\fB\-e\fR" 4
+.IX Item "-e"
+.PD 0
+.IP "\fB\-\-headers\fR" 4
+.IX Item "--headers"
+.PD
+Display all the headers in the file.  Equivalent to \fB\-h \-l \-S\fR.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-notes\fR" 4
+.IX Item "--notes"
+.PD
+Displays the contents of the \s-1NOTE\s0 segments and/or sections, if any.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+.PD 0
+.IP "\fB\-\-relocs\fR" 4
+.IX Item "--relocs"
+.PD
+Displays the contents of the file's relocation section, if it has one.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unwind\fR" 4
+.IX Item "--unwind"
+.PD
+Displays the contents of the file's unwind section, if it has one.  Only
+the unwind sections for \s-1IA64\s0 \s-1ELF\s0 files are currently supported.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-dynamic\fR" 4
+.IX Item "--dynamic"
+.PD
+Displays the contents of the file's dynamic section, if it has one.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\-info\fR" 4
+.IX Item "--version-info"
+.PD
+Displays the contents of the version sections in the file, it they
+exist.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-arch\-specific\fR" 4
+.IX Item "--arch-specific"
+.PD
+Displays architecture-specific information in the file, if there
+is any.
+.IP "\fB\-D\fR" 4
+.IX Item "-D"
+.PD 0
+.IP "\fB\-\-use\-dynamic\fR" 4
+.IX Item "--use-dynamic"
+.PD
+When displaying symbols, this option makes \fBreadelf\fR use the
+symbol table in the file's dynamic section, rather than the one in the
+symbols section.
+.IP "\fB\-x <number or name>\fR" 4
+.IX Item "-x <number or name>"
+.PD 0
+.IP "\fB\-\-hex\-dump=<number or name>\fR" 4
+.IX Item "--hex-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal bytes.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-R <number or name>\fR" 4
+.IX Item "-R <number or name>"
+.PD 0
+.IP "\fB\-\-relocated\-dump=<number or name>\fR" 4
+.IX Item "--relocated-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as a hexadecimal
+bytes.  A number identifies a particular section by index in the
+section table; any other string identifies all sections with that name
+in the object file.  The contents of the section will be relocated
+before they are displayed.
+.IP "\fB\-p <number or name>\fR" 4
+.IX Item "-p <number or name>"
+.PD 0
+.IP "\fB\-\-string\-dump=<number or name>\fR" 4
+.IX Item "--string-dump=<number or name>"
+.PD
+Displays the contents of the indicated section as printable strings.
+A number identifies a particular section by index in the section table;
+any other string identifies all sections with that name in the object file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-archive\-index\fR" 4
+.IX Item "--archive-index"
+.PD
+Displays the file symbol index infomation contained in the header part
+of binary archives.  Performs the same function as the \fBt\fR
+command to \fBar\fR, but without using the \s-1BFD\s0 library.
+.IP "\fB\-w[lLiaprmfFsoR]\fR" 4
+.IX Item "-w[lLiaprmfFsoR]"
+.PD 0
+.IP "\fB\-\-debug\-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames\-interp,=str,=loc,=Ranges]\fR" 4
+.IX Item "--debug-dump[=rawline,=decodedline,=info,=abbrev,=pubnames,=aranges,=macro,=frames,=frames-interp,=str,=loc,=Ranges]"
+.PD
+Displays the contents of the debug sections in the file, if any are
+present.  If one of the optional letters or words follows the switch
+then only data found in those specific sections will be dumped.
+.Sp
+Note: the \fB=decodedline\fR option will display the interpreted
+contents of a .debug_line section whereas the \fB=rawline\fR option
+dumps the contents in a raw format.
+.IP "\fB\-I\fR" 4
+.IX Item "-I"
+.PD 0
+.IP "\fB\-\-histogram\fR" 4
+.IX Item "--histogram"
+.PD
+Display a histogram of bucket list lengths when displaying the contents
+of the symbol tables.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of readelf.
+.IP "\fB\-W\fR" 4
+.IX Item "-W"
+.PD 0
+.IP "\fB\-\-wide\fR" 4
+.IX Item "--wide"
+.PD
+Don't break output lines to fit into 80 columns. By default
+\&\fBreadelf\fR breaks section header and segment listing lines for
+64\-bit \s-1ELF\s0 files, so that they fit into 80 columns. This option causes
+\&\fBreadelf\fR to print each section header resp. each segment one a
+single line, which is far more readable on terminals wider than 80 columns.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Display the command line options understood by \fBreadelf\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIobjdump\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-size.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-size.1
new file mode 100644
index 00000000..a76bebe9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-size.1
@@ -0,0 +1,275 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "SIZE 1"
+.TH SIZE 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+size \- list section sizes and total size.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+size [\fB\-A\fR|\fB\-B\fR|\fB\-\-format=\fR\fIcompatibility\fR]
+     [\fB\-\-help\fR]
+     [\fB\-d\fR|\fB\-o\fR|\fB\-x\fR|\fB\-\-radix=\fR\fInumber\fR]
+     [\fB\-\-common\fR]
+     [\fB\-t\fR|\fB\-\-totals\fR]
+     [\fB\-\-target=\fR\fIbfdname\fR] [\fB\-V\fR|\fB\-\-version\fR]
+     [\fIobjfile\fR...]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+The \s-1GNU\s0 \fBsize\fR utility lists the section sizes\-\-\-and the total
+size\-\-\-for each of the object or archive files \fIobjfile\fR in its
+argument list.  By default, one line of output is generated for each
+object file or each module in an archive.
+.PP
+\&\fIobjfile\fR... are the object files to be examined.
+If none are specified, the file \f(CW\*(C`a.out\*(C'\fR will be used.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+The command line options have the following meanings:
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-B\fR" 4
+.IX Item "-B"
+.IP "\fB\-\-format=\fR\fIcompatibility\fR" 4
+.IX Item "--format=compatibility"
+.PD
+Using one of these options, you can choose whether the output from \s-1GNU\s0
+\&\fBsize\fR resembles output from System V \fBsize\fR (using \fB\-A\fR,
+or \fB\-\-format=sysv\fR), or Berkeley \fBsize\fR (using \fB\-B\fR, or
+\&\fB\-\-format=berkeley\fR).  The default is the one-line format similar to
+Berkeley's.
+.Sp
+Here is an example of the Berkeley (default) format of output from
+\&\fBsize\fR:
+.Sp
+.Vb 4
+\&        $ size \-\-format=Berkeley ranlib size
+\&        text    data    bss     dec     hex     filename
+\&        294880  81920   11592   388392  5ed28   ranlib
+\&        294880  81920   11888   388688  5ee50   size
+.Ve
+.Sp
+This is the same data, but displayed closer to System V conventions:
+.Sp
+.Vb 7
+\&        $ size \-\-format=SysV ranlib size
+\&        ranlib  :
+\&        section         size         addr
+\&        .text         294880         8192
+\&        .data          81920       303104
+\&        .bss           11592       385024
+\&        Total         388392
+\&        
+\&        
+\&        size  :
+\&        section         size         addr
+\&        .text         294880         8192
+\&        .data          81920       303104
+\&        .bss           11888       385024
+\&        Total         388688
+.Ve
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of acceptable arguments and options.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.IP "\fB\-\-radix=\fR\fInumber\fR" 4
+.IX Item "--radix=number"
+.PD
+Using one of these options, you can control whether the size of each
+section is given in decimal (\fB\-d\fR, or \fB\-\-radix=10\fR); octal
+(\fB\-o\fR, or \fB\-\-radix=8\fR); or hexadecimal (\fB\-x\fR, or
+\&\fB\-\-radix=16\fR).  In \fB\-\-radix=\fR\fInumber\fR, only the three
+values (8, 10, 16) are supported.  The total size is always given in two
+radices; decimal and hexadecimal for \fB\-d\fR or \fB\-x\fR output, or
+octal and hexadecimal if you're using \fB\-o\fR.
+.IP "\fB\-\-common\fR" 4
+.IX Item "--common"
+Print total size of common symbols in each file.  When using Berkeley
+format these are included in the bss size.
+.IP "\fB\-t\fR" 4
+.IX Item "-t"
+.PD 0
+.IP "\fB\-\-totals\fR" 4
+.IX Item "--totals"
+.PD
+Show totals of all objects listed (Berkeley format listing mode only).
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+Specify that the object-code format for \fIobjfile\fR is
+\&\fIbfdname\fR.  This option may not be necessary; \fBsize\fR can
+automatically recognize many formats.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Display the version number of \fBsize\fR.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fIobjdump\fR\|(1), \fIreadelf\fR\|(1), and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strings.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strings.1
new file mode 100644
index 00000000..a63fe107
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strings.1
@@ -0,0 +1,256 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRINGS 1"
+.TH STRINGS 1 "2013-10-22" "binutils-2.20" "GNU Development Tools"
+.SH "NAME"
+strings \- print the strings of printable characters in files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strings [\fB\-afovV\fR] [\fB\-\fR\fImin-len\fR]
+        [\fB\-n\fR \fImin-len\fR] [\fB\-\-bytes=\fR\fImin-len\fR]
+        [\fB\-t\fR \fIradix\fR] [\fB\-\-radix=\fR\fIradix\fR]
+        [\fB\-e\fR \fIencoding\fR] [\fB\-\-encoding=\fR\fIencoding\fR]
+        [\fB\-\fR] [\fB\-\-all\fR] [\fB\-\-print\-file\-name\fR]
+        [\fB\-T\fR \fIbfdname\fR] [\fB\-\-target=\fR\fIbfdname\fR]
+        [\fB\-\-help\fR] [\fB\-\-version\fR] \fIfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+For each \fIfile\fR given, \s-1GNU\s0 \fBstrings\fR prints the printable
+character sequences that are at least 4 characters long (or the number
+given with the options below) and are followed by an unprintable
+character.  By default, it only prints the strings from the initialized
+and loaded sections of object files; for other types of files, it prints
+the strings from the whole file.
+.PP
+\&\fBstrings\fR is mainly useful for determining the contents of non-text
+files.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-all\fR" 4
+.IX Item "--all"
+.IP "\fB\-\fR" 4
+.IX Item "-"
+.PD
+Do not scan only the initialized and loaded sections of object files;
+scan the whole files.
+.IP "\fB\-f\fR" 4
+.IX Item "-f"
+.PD 0
+.IP "\fB\-\-print\-file\-name\fR" 4
+.IX Item "--print-file-name"
+.PD
+Print the name of the file before each string.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Print a summary of the program usage on the standard output and exit.
+.IP "\fB\-\fR\fImin-len\fR" 4
+.IX Item "-min-len"
+.PD 0
+.IP "\fB\-n\fR \fImin-len\fR" 4
+.IX Item "-n min-len"
+.IP "\fB\-\-bytes=\fR\fImin-len\fR" 4
+.IX Item "--bytes=min-len"
+.PD
+Print sequences of characters that are at least \fImin-len\fR characters
+long, instead of the default 4.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+Like \fB\-t o\fR.  Some other versions of \fBstrings\fR have \fB\-o\fR
+act like \fB\-t d\fR instead.  Since we can not be compatible with both
+ways, we simply chose one.
+.IP "\fB\-t\fR \fIradix\fR" 4
+.IX Item "-t radix"
+.PD 0
+.IP "\fB\-\-radix=\fR\fIradix\fR" 4
+.IX Item "--radix=radix"
+.PD
+Print the offset within the file before each string.  The single
+character argument specifies the radix of the offset\-\-\-\fBo\fR for
+octal, \fBx\fR for hexadecimal, or \fBd\fR for decimal.
+.IP "\fB\-e\fR \fIencoding\fR" 4
+.IX Item "-e encoding"
+.PD 0
+.IP "\fB\-\-encoding=\fR\fIencoding\fR" 4
+.IX Item "--encoding=encoding"
+.PD
+Select the character encoding of the strings that are to be found.
+Possible values for \fIencoding\fR are: \fBs\fR = single\-7\-bit\-byte
+characters (\s-1ASCII\s0, \s-1ISO\s0 8859, etc., default), \fBS\fR =
+single\-8\-bit\-byte characters, \fBb\fR = 16\-bit bigendian, \fBl\fR =
+16\-bit littleendian, \fBB\fR = 32\-bit bigendian, \fBL\fR = 32\-bit
+littleendian.  Useful for finding wide character strings. (\fBl\fR
+and \fBb\fR apply to, for example, Unicode \s-1UTF\-16/UCS\-2\s0 encodings).
+.IP "\fB\-T\fR \fIbfdname\fR" 4
+.IX Item "-T bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Specify an object code format other than your system's default format.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Print the program version number on the standard output and exit.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.  
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIar\fR\|(1), \fInm\fR\|(1), \fIobjdump\fR\|(1), \fIranlib\fR\|(1), \fIreadelf\fR\|(1)
+and the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strip.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strip.1
new file mode 100644
index 00000000..fba09c42
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-strip.1
@@ -0,0 +1,399 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "STRIP 1"
+.TH STRIP 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+strip \- Discard symbols from object files.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+strip [\fB\-F\fR \fIbfdname\fR |\fB\-\-target=\fR\fIbfdname\fR]
+      [\fB\-I\fR \fIbfdname\fR |\fB\-\-input\-target=\fR\fIbfdname\fR]
+      [\fB\-O\fR \fIbfdname\fR |\fB\-\-output\-target=\fR\fIbfdname\fR]
+      [\fB\-s\fR|\fB\-\-strip\-all\fR]
+      [\fB\-S\fR|\fB\-g\fR|\fB\-d\fR|\fB\-\-strip\-debug\fR]
+      [\fB\-K\fR \fIsymbolname\fR |\fB\-\-keep\-symbol=\fR\fIsymbolname\fR]
+      [\fB\-N\fR \fIsymbolname\fR |\fB\-\-strip\-symbol=\fR\fIsymbolname\fR]
+      [\fB\-w\fR|\fB\-\-wildcard\fR]
+      [\fB\-x\fR|\fB\-\-discard\-all\fR] [\fB\-X\fR |\fB\-\-discard\-locals\fR]
+      [\fB\-R\fR \fIsectionname\fR |\fB\-\-remove\-section=\fR\fIsectionname\fR]
+      [\fB\-o\fR \fIfile\fR] [\fB\-p\fR|\fB\-\-preserve\-dates\fR]
+      [\fB\-\-keep\-file\-symbols\fR]
+      [\fB\-\-only\-keep\-debug\fR]
+      [\fB\-v\fR |\fB\-\-verbose\fR] [\fB\-V\fR|\fB\-\-version\fR]
+      [\fB\-\-help\fR] [\fB\-\-info\fR]
+      \fIobjfile\fR...
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\s-1GNU\s0 \fBstrip\fR discards all symbols from object files
+\&\fIobjfile\fR.  The list of object files may include archives.
+At least one object file must be given.
+.PP
+\&\fBstrip\fR modifies the files named in its argument,
+rather than writing modified copies under different names.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-F\fR \fIbfdname\fR" 4
+.IX Item "-F bfdname"
+.PD 0
+.IP "\fB\-\-target=\fR\fIbfdname\fR" 4
+.IX Item "--target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR, and rewrite it in the same format.
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+Show a summary of the options to \fBstrip\fR and exit.
+.IP "\fB\-\-info\fR" 4
+.IX Item "--info"
+Display a list showing all architectures and object formats available.
+.IP "\fB\-I\fR \fIbfdname\fR" 4
+.IX Item "-I bfdname"
+.PD 0
+.IP "\fB\-\-input\-target=\fR\fIbfdname\fR" 4
+.IX Item "--input-target=bfdname"
+.PD
+Treat the original \fIobjfile\fR as a file with the object
+code format \fIbfdname\fR.
+.IP "\fB\-O\fR \fIbfdname\fR" 4
+.IX Item "-O bfdname"
+.PD 0
+.IP "\fB\-\-output\-target=\fR\fIbfdname\fR" 4
+.IX Item "--output-target=bfdname"
+.PD
+Replace \fIobjfile\fR with a file in the output format \fIbfdname\fR.
+.IP "\fB\-R\fR \fIsectionname\fR" 4
+.IX Item "-R sectionname"
+.PD 0
+.IP "\fB\-\-remove\-section=\fR\fIsectionname\fR" 4
+.IX Item "--remove-section=sectionname"
+.PD
+Remove any section named \fIsectionname\fR from the output file.  This
+option may be given more than once.  Note that using this option
+inappropriately may make the output file unusable.
+.IP "\fB\-s\fR" 4
+.IX Item "-s"
+.PD 0
+.IP "\fB\-\-strip\-all\fR" 4
+.IX Item "--strip-all"
+.PD
+Remove all symbols.
+.IP "\fB\-g\fR" 4
+.IX Item "-g"
+.PD 0
+.IP "\fB\-S\fR" 4
+.IX Item "-S"
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.IP "\fB\-\-strip\-debug\fR" 4
+.IX Item "--strip-debug"
+.PD
+Remove debugging symbols only.
+.IP "\fB\-\-strip\-unneeded\fR" 4
+.IX Item "--strip-unneeded"
+Remove all symbols that are not needed for relocation processing.
+.IP "\fB\-K\fR \fIsymbolname\fR" 4
+.IX Item "-K symbolname"
+.PD 0
+.IP "\fB\-\-keep\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--keep-symbol=symbolname"
+.PD
+When stripping symbols, keep symbol \fIsymbolname\fR even if it would
+normally be stripped.  This option may be given more than once.
+.IP "\fB\-N\fR \fIsymbolname\fR" 4
+.IX Item "-N symbolname"
+.PD 0
+.IP "\fB\-\-strip\-symbol=\fR\fIsymbolname\fR" 4
+.IX Item "--strip-symbol=symbolname"
+.PD
+Remove symbol \fIsymbolname\fR from the source file. This option may be
+given more than once, and may be combined with strip options other than
+\&\fB\-K\fR.
+.IP "\fB\-o\fR \fIfile\fR" 4
+.IX Item "-o file"
+Put the stripped output in \fIfile\fR, rather than replacing the
+existing file.  When this argument is used, only one \fIobjfile\fR
+argument may be specified.
+.IP "\fB\-p\fR" 4
+.IX Item "-p"
+.PD 0
+.IP "\fB\-\-preserve\-dates\fR" 4
+.IX Item "--preserve-dates"
+.PD
+Preserve the access and modification dates of the file.
+.IP "\fB\-w\fR" 4
+.IX Item "-w"
+.PD 0
+.IP "\fB\-\-wildcard\fR" 4
+.IX Item "--wildcard"
+.PD
+Permit regular expressions in \fIsymbolname\fRs used in other command
+line options.  The question mark (?), asterisk (*), backslash (\e) and
+square brackets ([]) operators can be used anywhere in the symbol
+name.  If the first character of the symbol name is the exclamation
+point (!) then the sense of the switch is reversed for that symbol.
+For example:
+.Sp
+.Vb 1
+\&          \-w \-K !foo \-K fo*
+.Ve
+.Sp
+would cause strip to only keep symbols that start with the letters
+\&\*(L"fo\*(R", but to discard the symbol \*(L"foo\*(R".
+.IP "\fB\-x\fR" 4
+.IX Item "-x"
+.PD 0
+.IP "\fB\-\-discard\-all\fR" 4
+.IX Item "--discard-all"
+.PD
+Remove non-global symbols.
+.IP "\fB\-X\fR" 4
+.IX Item "-X"
+.PD 0
+.IP "\fB\-\-discard\-locals\fR" 4
+.IX Item "--discard-locals"
+.PD
+Remove compiler-generated local symbols.
+(These usually start with \fBL\fR or \fB.\fR.)
+.IP "\fB\-\-keep\-file\-symbols\fR" 4
+.IX Item "--keep-file-symbols"
+When stripping a file, perhaps with \fB\-\-strip\-debug\fR or
+\&\fB\-\-strip\-unneeded\fR, retain any symbols specifying source file names,
+which would otherwise get stripped.
+.IP "\fB\-\-only\-keep\-debug\fR" 4
+.IX Item "--only-keep-debug"
+Strip a file, removing contents of any sections that would not be
+stripped by \fB\-\-strip\-debug\fR and leaving the debugging sections
+intact.  In \s-1ELF\s0 files, this preserves all note sections in the output.
+.Sp
+The intention is that this option will be used in conjunction with
+\&\fB\-\-add\-gnu\-debuglink\fR to create a two part executable.  One a
+stripped binary which will occupy less space in \s-1RAM\s0 and in a
+distribution and the second a debugging information file which is only
+needed if debugging abilities are required.  The suggested procedure
+to create these files is as follows:
+.RS 4
+.IP "1.<Link the executable as normal.  Assuming that is is called>" 4
+.IX Item "1.<Link the executable as normal.  Assuming that is is called>"
+\&\f(CW\*(C`foo\*(C'\fR then...
+.ie n .IP "1.<Run ""objcopy \-\-only\-keep\-debug foo foo.dbg"" to>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-only\-keep\-debug foo foo.dbg\fR to>" 4
+.IX Item "1.<Run objcopy --only-keep-debug foo foo.dbg to>"
+create a file containing the debugging info.
+.ie n .IP "1.<Run ""objcopy \-\-strip\-debug foo"" to create a>" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-strip\-debug foo\fR to create a>" 4
+.IX Item "1.<Run objcopy --strip-debug foo to create a>"
+stripped executable.
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.dbg foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.dbg foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.dbg foo>"
+to add a link to the debugging info into the stripped executable.
+.RE
+.RS 4
+.Sp
+Note\-\-\-the choice of \f(CW\*(C`.dbg\*(C'\fR as an extension for the debug info
+file is arbitrary.  Also the \f(CW\*(C`\-\-only\-keep\-debug\*(C'\fR step is
+optional.  You could instead do this:
+.IP "1.<Link the executable as normal.>" 4
+.IX Item "1.<Link the executable as normal.>"
+.PD 0
+.ie n .IP "1.<Copy ""foo""\fR to \f(CW""foo.full"">" 4
+.el .IP "1.<Copy \f(CWfoo\fR to \f(CWfoo.full\fR>" 4
+.IX Item "1.<Copy foo to foo.full>"
+.ie n .IP "1.<Run ""strip \-\-strip\-debug foo"">" 4
+.el .IP "1.<Run \f(CWstrip \-\-strip\-debug foo\fR>" 4
+.IX Item "1.<Run strip --strip-debug foo>"
+.ie n .IP "1.<Run ""objcopy \-\-add\-gnu\-debuglink=foo.full foo"">" 4
+.el .IP "1.<Run \f(CWobjcopy \-\-add\-gnu\-debuglink=foo.full foo\fR>" 4
+.IX Item "1.<Run objcopy --add-gnu-debuglink=foo.full foo>"
+.RE
+.RS 4
+.PD
+.Sp
+i.e., the file pointed to by the \fB\-\-add\-gnu\-debuglink\fR can be the
+full executable.  It does not have to be a file created by the
+\&\fB\-\-only\-keep\-debug\fR switch.
+.Sp
+Note\-\-\-this switch is only intended for use on fully linked files.  It
+does not make sense to use it on object files where the debugging
+information may be incomplete.  Besides the gnu_debuglink feature
+currently only supports the presence of one filename containing
+debugging information, not multiple filenames on a one-per-object-file
+basis.
+.RE
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Show the version number for \fBstrip\fR.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Verbose output: list all object files modified.  In the case of
+archives, \fBstrip \-v\fR lists all members of the archive.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windmc.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windmc.1
new file mode 100644
index 00000000..c15980e5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windmc.1
@@ -0,0 +1,351 @@
+.\" Automatically generated by Pod::Man v1.37, Pod::Parser v1.32
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  | will give a
+.\" real vertical bar.  \*(C+ will give a nicer C++.  Capital omega is used to
+.\" do unbreakable dashes and therefore won't be available.  \*(C` and \*(C'
+.\" expand to `' in nroff, nothing in troff, for use with C<>.
+.tr \(*W-|\(bv\*(Tr
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.if \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.\"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.hy 0
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDMC 1"
+.TH WINDMC 1 "2013-10-22" "binutils-2.20" "GNU Development Tools"
+.SH "NAME"
+windmc \- generates Windows message resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindmc\fR reads message definitions from an input file (.mc) and
+translate them into a set of output files.  The output files may be of
+four kinds:
+.ie n .IP """h""" 4
+.el .IP "\f(CWh\fR" 4
+.IX Item "h"
+A C header file containing the message definitions.
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A resource file compilable by the \fBwindres\fR tool.
+.ie n .IP """bin""" 4
+.el .IP "\f(CWbin\fR" 4
+.IX Item "bin"
+One or more binary files containing the resource data for a specific
+message language.
+.ie n .IP """dbg""" 4
+.el .IP "\f(CWdbg\fR" 4
+.IX Item "dbg"
+A C include file that maps message id's to their symbolic name.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindmc\fR converts from the \f(CW\*(C`mc\*(C'\fR format to the \f(CW\*(C`bin\*(C'\fR
+format, \f(CW\*(C`rc\*(C'\fR, \f(CW\*(C`h\*(C'\fR, and optional \f(CW\*(C`dbg\*(C'\fR it is acting like the
+Windows Message Compiler.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-a\fR" 4
+.IX Item "-a"
+.PD 0
+.IP "\fB\-\-ascii_in\fR" 4
+.IX Item "--ascii_in"
+.PD
+Specifies that the input file specified is \s-1ANSI\s0. This is the default
+behaviour.
+.IP "\fB\-A\fR" 4
+.IX Item "-A"
+.PD 0
+.IP "\fB\-\-ascii_out\fR" 4
+.IX Item "--ascii_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR files should be in \s-1ANSI\s0
+format.
+.IP "\fB\-b\fR" 4
+.IX Item "-b"
+.PD 0
+.IP "\fB\-\-binprefix\fR" 4
+.IX Item "--binprefix"
+.PD
+Specifies that \f(CW\*(C`bin\*(C'\fR filenames should have to be prefixed by the
+basename of the source file.
+.IP "\fB\-c\fR" 4
+.IX Item "-c"
+.PD 0
+.IP "\fB\-\-customflag\fR" 4
+.IX Item "--customflag"
+.PD
+Sets the customer bit in all message id's.
+.IP "\fB\-C\fR \fIcodepage\fR" 4
+.IX Item "-C codepage"
+.PD 0
+.IP "\fB\-\-codepage_in\fR \fIcodepage\fR" 4
+.IX Item "--codepage_in codepage"
+.PD
+Sets the default codepage to be used to convert input file to \s-1UTF16\s0. The
+default is ocdepage 1252.
+.IP "\fB\-d\fR" 4
+.IX Item "-d"
+.PD 0
+.IP "\fB\-\-decimal_values\fR" 4
+.IX Item "--decimal_values"
+.PD
+Outputs the constants in the header file in decimal. Default is using
+hexadecimal output.
+.IP "\fB\-e\fR \fIext\fR" 4
+.IX Item "-e ext"
+.PD 0
+.IP "\fB\-\-extension\fR \fIext\fR" 4
+.IX Item "--extension ext"
+.PD
+The extension for the header file. The default is .h extension.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a bin file as output.  This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets.  Normally \fBwindmc\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-h\fR \fIpath\fR" 4
+.IX Item "-h path"
+.PD 0
+.IP "\fB\-\-headerdir\fR \fIpath\fR" 4
+.IX Item "--headerdir path"
+.PD
+The target directory of the generated header file. The default is the
+current directory.
+.IP "\fB\-H\fR" 4
+.IX Item "-H"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Displays a list of command line options and then exits.
+.IP "\fB\-m\fR \fIcharacters\fR" 4
+.IX Item "-m characters"
+.PD 0
+.IP "\fB\-\-maxlength\fR \fIcharacters\fR" 4
+.IX Item "--maxlength characters"
+.PD
+Instructs \fBwindmc\fR to generate a warning if the length
+of any message exceeds the number specified.
+.IP "\fB\-n\fR" 4
+.IX Item "-n"
+.PD 0
+.IP "\fB\-\-nullterminate\fR" 4
+.IX Item "--nullterminate"
+.PD
+Terminate message text in \f(CW\*(C`bin\*(C'\fR files by zero. By default they are
+terminated by \s-1CR/LF\s0.
+.IP "\fB\-o\fR" 4
+.IX Item "-o"
+.PD 0
+.IP "\fB\-\-hresult_use\fR" 4
+.IX Item "--hresult_use"
+.PD
+Not yet implemented. Instructs \f(CW\*(C`windmc\*(C'\fR to generate an \s-1OLE2\s0 header
+file, using \s-1HRESULT\s0 definitions. Status codes are used if the flag is not
+specified.
+.IP "\fB\-O\fR \fIcodepage\fR" 4
+.IX Item "-O codepage"
+.PD 0
+.IP "\fB\-\-codepage_out\fR \fIcodepage\fR" 4
+.IX Item "--codepage_out codepage"
+.PD
+Sets the default codepage to be used to output text files. The default
+is ocdepage 1252.
+.IP "\fB\-r\fR \fIpath\fR" 4
+.IX Item "-r path"
+.PD 0
+.IP "\fB\-\-rcdir\fR \fIpath\fR" 4
+.IX Item "--rcdir path"
+.PD
+The target directory for the generated \f(CW\*(C`rc\*(C'\fR script and the generated
+\&\f(CW\*(C`bin\*(C'\fR files that the resource compiler script includes. The default
+is the current directory.
+.IP "\fB\-u\fR" 4
+.IX Item "-u"
+.PD 0
+.IP "\fB\-\-unicode_in\fR" 4
+.IX Item "--unicode_in"
+.PD
+Specifies that the input file is \s-1UTF16\s0.
+.IP "\fB\-U\fR" 4
+.IX Item "-U"
+.PD 0
+.IP "\fB\-\-unicode_out\fR" 4
+.IX Item "--unicode_out"
+.PD
+Specifies that messages in the output \f(CW\*(C`bin\*(C'\fR file should be in \s-1UTF16\s0
+format. This is the default behaviour.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+.PD 0
+.IP "\fB\-\-verbose\fR" 4
+.IX Item "--verbose"
+.PD
+Enable verbose mode.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindmc\fR.
+.IP "\fB\-x\fR \fIpath\fR" 4
+.IX Item "-x path"
+.PD 0
+.IP "\fB\-\-xdgb\fR \fIpath\fR" 4
+.IX Item "--xdgb path"
+.PD
+The path of the \f(CW\*(C`dbg\*(C'\fR C include file that maps message id's to the
+symbolic name. No such file is generated without specifying the switch.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.  
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windres.1 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windres.1
new file mode 100644
index 00000000..20694e01
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man1/tc32-elf-windres.1
@@ -0,0 +1,362 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "WINDRES 1"
+.TH WINDRES 1 "2009-10-16" "binutils-2.20" "GNU Development Tools"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+windres \- manipulate Windows resources.
+.SH "SYNOPSIS"
+.IX Header "SYNOPSIS"
+windmc [options] input-file
+windres [options] [input\-file] [output\-file]
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+\&\fBwindres\fR reads resources from an input file and copies them into
+an output file.  Either file may be in one of three formats:
+.ie n .IP """rc""" 4
+.el .IP "\f(CWrc\fR" 4
+.IX Item "rc"
+A text format read by the Resource Compiler.
+.ie n .IP """res""" 4
+.el .IP "\f(CWres\fR" 4
+.IX Item "res"
+A binary format generated by the Resource Compiler.
+.ie n .IP """coff""" 4
+.el .IP "\f(CWcoff\fR" 4
+.IX Item "coff"
+A \s-1COFF\s0 object or executable.
+.PP
+The exact description of these different formats is available in
+documentation from Microsoft.
+.PP
+When \fBwindres\fR converts from the \f(CW\*(C`rc\*(C'\fR format to the \f(CW\*(C`res\*(C'\fR
+format, it is acting like the Windows Resource Compiler.  When
+\&\fBwindres\fR converts from the \f(CW\*(C`res\*(C'\fR format to the \f(CW\*(C`coff\*(C'\fR
+format, it is acting like the Windows \f(CW\*(C`CVTRES\*(C'\fR program.
+.PP
+When \fBwindres\fR generates an \f(CW\*(C`rc\*(C'\fR file, the output is similar
+but not identical to the format expected for the input.  When an input
+\&\f(CW\*(C`rc\*(C'\fR file refers to an external filename, an output \f(CW\*(C`rc\*(C'\fR file
+will instead include the file contents.
+.PP
+If the input or output format is not specified, \fBwindres\fR will
+guess based on the file name, or, for the input file, the file contents.
+A file with an extension of \fI.rc\fR will be treated as an \f(CW\*(C`rc\*(C'\fR
+file, a file with an extension of \fI.res\fR will be treated as a
+\&\f(CW\*(C`res\*(C'\fR file, and a file with an extension of \fI.o\fR or
+\&\fI.exe\fR will be treated as a \f(CW\*(C`coff\*(C'\fR file.
+.PP
+If no output file is specified, \fBwindres\fR will print the resources
+in \f(CW\*(C`rc\*(C'\fR format to standard output.
+.PP
+The normal use is for you to write an \f(CW\*(C`rc\*(C'\fR file, use \fBwindres\fR
+to convert it to a \s-1COFF\s0 object file, and then link the \s-1COFF\s0 file into
+your application.  This will make the resources described in the
+\&\f(CW\*(C`rc\*(C'\fR file available to Windows.
+.SH "OPTIONS"
+.IX Header "OPTIONS"
+.IP "\fB\-i\fR \fIfilename\fR" 4
+.IX Item "-i filename"
+.PD 0
+.IP "\fB\-\-input\fR \fIfilename\fR" 4
+.IX Item "--input filename"
+.PD
+The name of the input file.  If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument as the input file
+name.  If there are no non-option arguments, then \fBwindres\fR will
+read from standard input.  \fBwindres\fR can not read a \s-1COFF\s0 file from
+standard input.
+.IP "\fB\-o\fR \fIfilename\fR" 4
+.IX Item "-o filename"
+.PD 0
+.IP "\fB\-\-output\fR \fIfilename\fR" 4
+.IX Item "--output filename"
+.PD
+The name of the output file.  If this option is not used, then
+\&\fBwindres\fR will use the first non-option argument, after any used
+for the input file name, as the output file name.  If there is no
+non-option argument, then \fBwindres\fR will write to standard output.
+\&\fBwindres\fR can not write a \s-1COFF\s0 file to standard output.  Note,
+for compatibility with \fBrc\fR the option \fB\-fo\fR is also
+accepted, but its use is not recommended.
+.IP "\fB\-J\fR \fIformat\fR" 4
+.IX Item "-J format"
+.PD 0
+.IP "\fB\-\-input\-format\fR \fIformat\fR" 4
+.IX Item "--input-format format"
+.PD
+The input format to read.  \fIformat\fR may be \fBres\fR, \fBrc\fR, or
+\&\fBcoff\fR.  If no input format is specified, \fBwindres\fR will
+guess, as described above.
+.IP "\fB\-O\fR \fIformat\fR" 4
+.IX Item "-O format"
+.PD 0
+.IP "\fB\-\-output\-format\fR \fIformat\fR" 4
+.IX Item "--output-format format"
+.PD
+The output format to generate.  \fIformat\fR may be \fBres\fR,
+\&\fBrc\fR, or \fBcoff\fR.  If no output format is specified,
+\&\fBwindres\fR will guess, as described above.
+.IP "\fB\-F\fR \fItarget\fR" 4
+.IX Item "-F target"
+.PD 0
+.IP "\fB\-\-target\fR \fItarget\fR" 4
+.IX Item "--target target"
+.PD
+Specify the \s-1BFD\s0 format to use for a \s-1COFF\s0 file as input or output.  This
+is a \s-1BFD\s0 target name; you can use the \fB\-\-help\fR option to see a list
+of supported targets.  Normally \fBwindres\fR will use the default
+format, which is the first one listed by the \fB\-\-help\fR option.
+.IP "\fB\-\-preprocessor\fR \fIprogram\fR" 4
+.IX Item "--preprocessor program"
+When \fBwindres\fR reads an \f(CW\*(C`rc\*(C'\fR file, it runs it through the C
+preprocessor first.  This option may be used to specify the preprocessor
+to use, including any leading arguments.  The default preprocessor
+argument is \f(CW\*(C`gcc \-E \-xc\-header \-DRC_INVOKED\*(C'\fR.
+.IP "\fB\-I\fR \fIdirectory\fR" 4
+.IX Item "-I directory"
+.PD 0
+.IP "\fB\-\-include\-dir\fR \fIdirectory\fR" 4
+.IX Item "--include-dir directory"
+.PD
+Specify an include directory to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fBwindres\fR will pass this to the preprocessor as an \fB\-I\fR
+option.  \fBwindres\fR will also search this directory when looking for
+files named in the \f(CW\*(C`rc\*(C'\fR file.  If the argument passed to this command
+matches any of the supported \fIformats\fR (as described in the \fB\-J\fR
+option), it will issue a deprecation warning, and behave just like the
+\&\fB\-J\fR option.  New programs should not use this behaviour.  If a
+directory happens to match a \fIformat\fR, simple prefix it with \fB./\fR
+to disable the backward compatibility.
+.IP "\fB\-D\fR \fItarget\fR" 4
+.IX Item "-D target"
+.PD 0
+.IP "\fB\-\-define\fR \fIsym\fR\fB[=\fR\fIval\fR\fB]\fR" 4
+.IX Item "--define sym[=val]"
+.PD
+Specify a \fB\-D\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-U\fR \fItarget\fR" 4
+.IX Item "-U target"
+.PD 0
+.IP "\fB\-\-undefine\fR \fIsym\fR" 4
+.IX Item "--undefine sym"
+.PD
+Specify a \fB\-U\fR option to pass to the preprocessor when reading an
+\&\f(CW\*(C`rc\*(C'\fR file.
+.IP "\fB\-r\fR" 4
+.IX Item "-r"
+Ignored for compatibility with rc.
+.IP "\fB\-v\fR" 4
+.IX Item "-v"
+Enable verbose mode.  This tells you what the preprocessor is if you
+didn't specify one.
+.IP "\fB\-c\fR \fIval\fR" 4
+.IX Item "-c val"
+.PD 0
+.IP "\fB\-\-codepage\fR \fIval\fR" 4
+.IX Item "--codepage val"
+.PD
+Specify the default codepage to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal prefixed by \fB0x\fR or decimal
+codepage code. The valid range is from zero up to 0xffff, but the
+validity of the codepage is host and configuration dependent.
+.IP "\fB\-l\fR \fIval\fR" 4
+.IX Item "-l val"
+.PD 0
+.IP "\fB\-\-language\fR \fIval\fR" 4
+.IX Item "--language val"
+.PD
+Specify the default language to use when reading an \f(CW\*(C`rc\*(C'\fR file.
+\&\fIval\fR should be a hexadecimal language code.  The low eight bits are
+the language, and the high eight bits are the sublanguage.
+.IP "\fB\-\-use\-temp\-file\fR" 4
+.IX Item "--use-temp-file"
+Use a temporary file to instead of using popen to read the output of
+the preprocessor. Use this option if the popen implementation is buggy
+on the host (eg., certain non-English language versions of Windows 95 and
+Windows 98 are known to have buggy popen where the output will instead
+go the console).
+.IP "\fB\-\-no\-use\-temp\-file\fR" 4
+.IX Item "--no-use-temp-file"
+Use popen, not a temporary file, to read the output of the preprocessor.
+This is the default behaviour.
+.IP "\fB\-h\fR" 4
+.IX Item "-h"
+.PD 0
+.IP "\fB\-\-help\fR" 4
+.IX Item "--help"
+.PD
+Prints a usage summary.
+.IP "\fB\-V\fR" 4
+.IX Item "-V"
+.PD 0
+.IP "\fB\-\-version\fR" 4
+.IX Item "--version"
+.PD
+Prints the version number for \fBwindres\fR.
+.IP "\fB\-\-yydebug\fR" 4
+.IX Item "--yydebug"
+If \fBwindres\fR is compiled with \f(CW\*(C`YYDEBUG\*(C'\fR defined as \f(CW1\fR,
+this will turn on parser debugging.
+.IP "\fB@\fR\fIfile\fR" 4
+.IX Item "@file"
+Read command-line options from \fIfile\fR.  The options read are
+inserted in place of the original @\fIfile\fR option.  If \fIfile\fR
+does not exist, or cannot be read, then the option will be treated
+literally, and not removed.
+.Sp
+Options in \fIfile\fR are separated by whitespace.  A whitespace
+character may be included in an option by surrounding the entire
+option in either single or double quotes.  Any character (including a
+backslash) may be included by prefixing the character to be included
+with a backslash.  The \fIfile\fR may itself contain additional
+@\fIfile\fR options; any such options will be processed recursively.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+the Info entries for \fIbinutils\fR.
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
+2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009 Free Software Foundation, Inc.
+.PP
+Permission is granted to copy, distribute and/or modify this document
+under the terms of the \s-1GNU\s0 Free Documentation License, Version 1.3
+or any later version published by the Free Software Foundation;
+with no Invariant Sections, with no Front-Cover Texts, and with no
+Back-Cover Texts.  A copy of the license is included in the
+section entitled \*(L"\s-1GNU\s0 Free Documentation License\*(R".
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/fsf-funding.7 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/fsf-funding.7
new file mode 100644
index 00000000..7be6fb9d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/fsf-funding.7
@@ -0,0 +1,192 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
+.if n \{\
+.    ds #H 0
+.    ds #V .8m
+.    ds #F .3m
+.    ds #[ \f1
+.    ds #] \fP
+.\}
+.if t \{\
+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
+.\}
+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
+.    ds ~ \\k:\h'-(\\n(.wu-\*(#H-.1m)'~\h'|\\n:u'
+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
+.ds 8 \h'\*(#H'\(*b\h'-\*(#H'
+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
+.ds d- \h'\*(#H'\(pd\h'-\w'~'u'\v'-.25m'\f2\(hy\fP\v'.25m'\h'-\*(#H'
+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
+.    ds 8 ss
+.    ds o a
+.    ds d- d\h'-1'\(ga
+.    ds D- D\h'-1'\(hy
+.    ds th \o'bp'
+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "FSF-FUNDING 7"
+.TH FSF-FUNDING 7 "2010-07-31" "gcc-4.5.1" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+fsf\-funding \- Funding Free Software
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "Funding Free Software"
+.IX Subsection "Funding Free Software"
+If you want to have more free software a few years from now, it makes
+sense for you to help encourage people to contribute funds for its
+development.  The most effective approach known is to encourage
+commercial redistributors to donate.
+.PP
+Users of free software systems can boost the pace of development by
+encouraging for-a-fee distributors to donate part of their selling price
+to free software developers\-\-\-the Free Software Foundation, and others.
+.PP
+The way to convince distributors to do this is to demand it and expect
+it from them.  So when you compare distributors, judge them partly by
+how much they give to free software development.  Show distributors
+they must compete to be the one who gives the most.
+.PP
+To make this approach work, you must insist on numbers that you can
+compare, such as, \*(L"We will donate ten dollars to the Frobnitz project
+for each disk sold.\*(R"  Don't be satisfied with a vague promise, such as
+\&\*(L"A portion of the profits are donated,\*(R" since it doesn't give a basis
+for comparison.
+.PP
+Even a precise fraction \*(L"of the profits from this disk\*(R" is not very
+meaningful, since creative accounting and unrelated business decisions
+can greatly alter what fraction of the sales price counts as profit.
+If the price you pay is \f(CW$50\fR, ten percent of the profit is probably
+less than a dollar; it might be a few cents, or nothing at all.
+.PP
+Some redistributors do development work themselves.  This is useful too;
+but to keep everyone honest, you need to inquire how much they do, and
+what kind.  Some kinds of development make much more long-term
+difference than others.  For example, maintaining a separate version of
+a program contributes very little; maintaining the standard version of a
+program for the whole community contributes much.  Easy new ports
+contribute little, since someone else would surely do them; difficult
+ports such as adding a new \s-1CPU\s0 to the \s-1GNU\s0 Compiler Collection contribute more;
+major new features or packages contribute the most.
+.PP
+By establishing the idea that supporting further development is \*(L"the
+proper thing to do\*(R" when distributing free software for a fee, we can
+assure a steady flow of resources into making more free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIgfdl\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 1994 Free Software Foundation, Inc.
+Verbatim copying and redistribution of this section is permitted
+without royalty; alteration is not permitted.
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gfdl.7 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gfdl.7
new file mode 100644
index 00000000..ae966fa6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gfdl.7
@@ -0,0 +1,591 @@
+.\" Automatically generated by Pod::Man 2.16 (Pod::Simple 3.05)
+.\"
+.\" Standard preamble:
+.\" ========================================================================
+.de Sh \" Subsection heading
+.br
+.if t .Sp
+.ne 5
+.PP
+\fB\\$1\fR
+.PP
+..
+.de Sp \" Vertical space (when we can't use .PP)
+.if t .sp .5v
+.if n .sp
+..
+.de Vb \" Begin verbatim text
+.ft CW
+.nf
+.ne \\$1
+..
+.de Ve \" End verbatim text
+.ft R
+.fi
+..
+.\" Set up some character translations and predefined strings.  \*(-- will
+.\" give an unbreakable dash, \*(PI will give pi, \*(L" will give a left
+.\" double quote, and \*(R" will give a right double quote.  \*(C+ will
+.\" give a nicer C++.  Capital omega is used to do unbreakable dashes and
+.\" therefore won't be available.  \*(C` and \*(C' expand to `' in nroff,
+.\" nothing in troff, for use with C<>.
+.tr \(*W-
+.ds C+ C\v'-.1v'\h'-1p'\s-2+\h'-1p'+\s0\v'.1v'\h'-1p'
+.ie n \{\
+.    ds -- \(*W-
+.    ds PI pi
+.    if (\n(.H=4u)&(1m=24u) .ds -- \(*W\h'-12u'\(*W\h'-12u'-\" diablo 10 pitch
+.    if (\n(.H=4u)&(1m=20u) .ds -- \(*W\h'-12u'\(*W\h'-8u'-\"  diablo 12 pitch
+.    ds L" ""
+.    ds R" ""
+.    ds C` ""
+.    ds C' ""
+'br\}
+.el\{\
+.    ds -- \|\(em\|
+.    ds PI \(*p
+.    ds L" ``
+.    ds R" ''
+'br\}
+.\"
+.\" Escape single quotes in literal strings from groff's Unicode transform.
+.ie \n(.g .ds Aq \(aq
+.el       .ds Aq '
+.\"
+.\" If the F register is turned on, we'll generate index entries on stderr for
+.\" titles (.TH), headers (.SH), subsections (.Sh), items (.Ip), and index
+.\" entries marked with X<> in POD.  Of course, you'll have to process the
+.\" output yourself in some meaningful fashion.
+.ie \nF \{\
+.    de IX
+.    tm Index:\\$1\t\\n%\t"\\$2"
+..
+.    nr % 0
+.    rr F
+.\}
+.el \{\
+.    de IX
+..
+.\}
+.\"
+.\" Accent mark definitions (@(#)ms.acc 1.5 88/02/08 SMI; from UCB 4.2).
+.\" Fear.  Run.  Save yourself.  No user-serviceable parts.
+.    \" fudge factors for nroff and troff
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+.    ds #H ((1u-(\\\\n(.fu%2u))*.13m)
+.    ds #V .6m
+.    ds #F 0
+.    ds #[ \&
+.    ds #] \&
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+.    \" simple accents for nroff and troff
+.if n \{\
+.    ds ' \&
+.    ds ` \&
+.    ds ^ \&
+.    ds , \&
+.    ds ~ ~
+.    ds /
+.\}
+.if t \{\
+.    ds ' \\k:\h'-(\\n(.wu*8/10-\*(#H)'\'\h"|\\n:u"
+.    ds ` \\k:\h'-(\\n(.wu*8/10-\*(#H)'\`\h'|\\n:u'
+.    ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'^\h'|\\n:u'
+.    ds , \\k:\h'-(\\n(.wu*8/10)',\h'|\\n:u'
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+.    ds / \\k:\h'-(\\n(.wu*8/10-\*(#H)'\z\(sl\h'|\\n:u'
+.\}
+.    \" troff and (daisy-wheel) nroff accents
+.ds : \\k:\h'-(\\n(.wu*8/10-\*(#H+.1m+\*(#F)'\v'-\*(#V'\z.\h'.2m+\*(#F'.\h'|\\n:u'\v'\*(#V'
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+.ds o \\k:\h'-(\\n(.wu+\w'\(de'u-\*(#H)/2u'\v'-.3n'\*(#[\z\(de\v'.3n'\h'|\\n:u'\*(#]
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+.ds D- D\\k:\h'-\w'D'u'\v'-.11m'\z\(hy\v'.11m'\h'|\\n:u'
+.ds th \*(#[\v'.3m'\s+1I\s-1\v'-.3m'\h'-(\w'I'u*2/3)'\s-1o\s+1\*(#]
+.ds Th \*(#[\s+2I\s-2\h'-\w'I'u*3/5'\v'-.3m'o\v'.3m'\*(#]
+.ds ae a\h'-(\w'a'u*4/10)'e
+.ds Ae A\h'-(\w'A'u*4/10)'E
+.    \" corrections for vroff
+.if v .ds ~ \\k:\h'-(\\n(.wu*9/10-\*(#H)'\s-2\u~\d\s+2\h'|\\n:u'
+.if v .ds ^ \\k:\h'-(\\n(.wu*10/11-\*(#H)'\v'-.4m'^\v'.4m'\h'|\\n:u'
+.    \" for low resolution devices (crt and lpr)
+.if \n(.H>23 .if \n(.V>19 \
+\{\
+.    ds : e
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+.    ds o a
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+.    ds D- D\h'-1'\(hy
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+.    ds Th \o'LP'
+.    ds ae ae
+.    ds Ae AE
+.\}
+.rm #[ #] #H #V #F C
+.\" ========================================================================
+.\"
+.IX Title "GFDL 7"
+.TH GFDL 7 "2010-07-31" "gcc-4.5.1" "GNU"
+.\" For nroff, turn off justification.  Always turn off hyphenation; it makes
+.\" way too many mistakes in technical documents.
+.if n .ad l
+.nh
+.SH "NAME"
+gfdl \- GNU Free Documentation License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "\s-1GNU\s0 Free Documentation License"
+.IX Subsection "GNU Free Documentation License"
+.Sh "Version 1.2, November 2002"
+.IX Subsection "Version 1.2, November 2002"
+.Vb 2
+\&        Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+\&        51 Franklin Street, Fifth Floor, Boston, MA  02110\-1301, USA
+\&        
+\&        Everyone is permitted to copy and distribute verbatim copies
+\&        of this license document, but changing it is not allowed.
+.Ve
+.IP "0." 4
+.IX Item "0."
+\&\s-1PREAMBLE\s0
+.Sp
+The purpose of this License is to make a manual, textbook, or other
+functional and useful document \fIfree\fR in the sense of freedom: to
+assure everyone the effective freedom to copy and redistribute it,
+with or without modifying it, either commercially or noncommercially.
+Secondarily, this License preserves for the author and publisher a way
+to get credit for their work, while not being considered responsible
+for modifications made by others.
+.Sp
+This License is a kind of \*(L"copyleft\*(R", which means that derivative
+works of the document must themselves be free in the same sense.  It
+complements the \s-1GNU\s0 General Public License, which is a copyleft
+license designed for free software.
+.Sp
+We have designed this License in order to use it for manuals for free
+software, because free software needs free documentation: a free
+program should come with manuals providing the same freedoms that the
+software does.  But this License is not limited to software manuals;
+it can be used for any textual work, regardless of subject matter or
+whether it is published as a printed book.  We recommend this License
+principally for works whose purpose is instruction or reference.
+.IP "1." 4
+.IX Item "1."
+\&\s-1APPLICABILITY\s0 \s-1AND\s0 \s-1DEFINITIONS\s0
+.Sp
+This License applies to any manual or other work, in any medium, that
+contains a notice placed by the copyright holder saying it can be
+distributed under the terms of this License.  Such a notice grants a
+world-wide, royalty-free license, unlimited in duration, to use that
+work under the conditions stated herein.  The \*(L"Document\*(R", below,
+refers to any such manual or work.  Any member of the public is a
+licensee, and is addressed as \*(L"you\*(R".  You accept the license if you
+copy, modify or distribute the work in a way requiring permission
+under copyright law.
+.Sp
+A \*(L"Modified Version\*(R" of the Document means any work containing the
+Document or a portion of it, either copied verbatim, or with
+modifications and/or translated into another language.
+.Sp
+A \*(L"Secondary Section\*(R" is a named appendix or a front-matter section
+of the Document that deals exclusively with the relationship of the
+publishers or authors of the Document to the Document's overall
+subject (or to related matters) and contains nothing that could fall
+directly within that overall subject.  (Thus, if the Document is in
+part a textbook of mathematics, a Secondary Section may not explain
+any mathematics.)  The relationship could be a matter of historical
+connection with the subject or with related matters, or of legal,
+commercial, philosophical, ethical or political position regarding
+them.
+.Sp
+The \*(L"Invariant Sections\*(R" are certain Secondary Sections whose titles
+are designated, as being those of Invariant Sections, in the notice
+that says that the Document is released under this License.  If a
+section does not fit the above definition of Secondary then it is not
+allowed to be designated as Invariant.  The Document may contain zero
+Invariant Sections.  If the Document does not identify any Invariant
+Sections then there are none.
+.Sp
+The \*(L"Cover Texts\*(R" are certain short passages of text that are listed,
+as Front-Cover Texts or Back-Cover Texts, in the notice that says that
+the Document is released under this License.  A Front-Cover Text may
+be at most 5 words, and a Back-Cover Text may be at most 25 words.
+.Sp
+A \*(L"Transparent\*(R" copy of the Document means a machine-readable copy,
+represented in a format whose specification is available to the
+general public, that is suitable for revising the document
+straightforwardly with generic text editors or (for images composed of
+pixels) generic paint programs or (for drawings) some widely available
+drawing editor, and that is suitable for input to text formatters or
+for automatic translation to a variety of formats suitable for input
+to text formatters.  A copy made in an otherwise Transparent file
+format whose markup, or absence of markup, has been arranged to thwart
+or discourage subsequent modification by readers is not Transparent.
+An image format is not Transparent if used for any substantial amount
+of text.  A copy that is not \*(L"Transparent\*(R" is called \*(L"Opaque\*(R".
+.Sp
+Examples of suitable formats for Transparent copies include plain
+\&\s-1ASCII\s0 without markup, Texinfo input format, LaTeX input
+format, \f(CW@acronym\fR{\s-1SGML\s0} or \f(CW@acronym\fR{\s-1XML\s0} using a publicly available
+\&\f(CW@acronym\fR{\s-1DTD\s0}, and standard-conforming simple \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} designed for human modification.  Examples
+of transparent image formats include \f(CW@acronym\fR{\s-1PNG\s0}, \f(CW@acronym\fR{\s-1XCF\s0} and
+\&\f(CW@acronym\fR{\s-1JPG\s0}.  Opaque formats include proprietary formats that can be
+read and edited only by proprietary word processors, \f(CW@acronym\fR{\s-1SGML\s0} or
+\&\f(CW@acronym\fR{\s-1XML\s0} for which the \f(CW@acronym\fR{\s-1DTD\s0} and/or processing tools are
+not generally available, and the machine-generated \f(CW@acronym\fR{\s-1HTML\s0},
+PostScript or \f(CW@acronym\fR{\s-1PDF\s0} produced by some word processors for
+output purposes only.
+.Sp
+The \*(L"Title Page\*(R" means, for a printed book, the title page itself,
+plus such following pages as are needed to hold, legibly, the material
+this License requires to appear in the title page.  For works in
+formats which do not have any title page as such, \*(L"Title Page\*(R" means
+the text near the most prominent appearance of the work's title,
+preceding the beginning of the body of the text.
+.Sp
+A section \*(L"Entitled \s-1XYZ\s0\*(R" means a named subunit of the Document whose
+title either is precisely \s-1XYZ\s0 or contains \s-1XYZ\s0 in parentheses following
+text that translates \s-1XYZ\s0 in another language.  (Here \s-1XYZ\s0 stands for a
+specific section name mentioned below, such as \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", \*(L"Endorsements\*(R", or \*(L"History\*(R".)  To \*(L"Preserve the Title\*(R"
+of such a section when you modify the Document means that it remains a
+section \*(L"Entitled \s-1XYZ\s0\*(R" according to this definition.
+.Sp
+The Document may include Warranty Disclaimers next to the notice which
+states that this License applies to the Document.  These Warranty
+Disclaimers are considered to be included by reference in this
+License, but only as regards disclaiming warranties: any other
+implication that these Warranty Disclaimers may have is void and has
+no effect on the meaning of this License.
+.IP "2." 4
+.IX Item "2."
+\&\s-1VERBATIM\s0 \s-1COPYING\s0
+.Sp
+You may copy and distribute the Document in any medium, either
+commercially or noncommercially, provided that this License, the
+copyright notices, and the license notice saying this License applies
+to the Document are reproduced in all copies, and that you add no other
+conditions whatsoever to those of this License.  You may not use
+technical measures to obstruct or control the reading or further
+copying of the copies you make or distribute.  However, you may accept
+compensation in exchange for copies.  If you distribute a large enough
+number of copies you must also follow the conditions in section 3.
+.Sp
+You may also lend copies, under the same conditions stated above, and
+you may publicly display copies.
+.IP "3." 4
+.IX Item "3."
+\&\s-1COPYING\s0 \s-1IN\s0 \s-1QUANTITY\s0
+.Sp
+If you publish printed copies (or copies in media that commonly have
+printed covers) of the Document, numbering more than 100, and the
+Document's license notice requires Cover Texts, you must enclose the
+copies in covers that carry, clearly and legibly, all these Cover
+Texts: Front-Cover Texts on the front cover, and Back-Cover Texts on
+the back cover.  Both covers must also clearly and legibly identify
+you as the publisher of these copies.  The front cover must present
+the full title with all words of the title equally prominent and
+visible.  You may add other material on the covers in addition.
+Copying with changes limited to the covers, as long as they preserve
+the title of the Document and satisfy these conditions, can be treated
+as verbatim copying in other respects.
+.Sp
+If the required texts for either cover are too voluminous to fit
+legibly, you should put the first ones listed (as many as fit
+reasonably) on the actual cover, and continue the rest onto adjacent
+pages.
+.Sp
+If you publish or distribute Opaque copies of the Document numbering
+more than 100, you must either include a machine-readable Transparent
+copy along with each Opaque copy, or state in or with each Opaque copy
+a computer-network location from which the general network-using
+public has access to download using public-standard network protocols
+a complete Transparent copy of the Document, free of added material.
+If you use the latter option, you must take reasonably prudent steps,
+when you begin distribution of Opaque copies in quantity, to ensure
+that this Transparent copy will remain thus accessible at the stated
+location until at least one year after the last time you distribute an
+Opaque copy (directly or through your agents or retailers) of that
+edition to the public.
+.Sp
+It is requested, but not required, that you contact the authors of the
+Document well before redistributing any large number of copies, to give
+them a chance to provide you with an updated version of the Document.
+.IP "4." 4
+.IX Item "4."
+\&\s-1MODIFICATIONS\s0
+.Sp
+You may copy and distribute a Modified Version of the Document under
+the conditions of sections 2 and 3 above, provided that you release
+the Modified Version under precisely this License, with the Modified
+Version filling the role of the Document, thus licensing distribution
+and modification of the Modified Version to whoever possesses a copy
+of it.  In addition, you must do these things in the Modified Version:
+.RS 4
+.IP "A." 4
+.IX Item "A."
+Use in the Title Page (and on the covers, if any) a title distinct
+from that of the Document, and from those of previous versions
+(which should, if there were any, be listed in the History section
+of the Document).  You may use the same title as a previous version
+if the original publisher of that version gives permission.
+.IP "B." 4
+.IX Item "B."
+List on the Title Page, as authors, one or more persons or entities
+responsible for authorship of the modifications in the Modified
+Version, together with at least five of the principal authors of the
+Document (all of its principal authors, if it has fewer than five),
+unless they release you from this requirement.
+.IP "C." 4
+.IX Item "C."
+State on the Title page the name of the publisher of the
+Modified Version, as the publisher.
+.IP "D." 4
+.IX Item "D."
+Preserve all the copyright notices of the Document.
+.IP "E." 4
+.IX Item "E."
+Add an appropriate copyright notice for your modifications
+adjacent to the other copyright notices.
+.IP "F." 4
+.IX Item "F."
+Include, immediately after the copyright notices, a license notice
+giving the public permission to use the Modified Version under the
+terms of this License, in the form shown in the Addendum below.
+.IP "G." 4
+.IX Item "G."
+Preserve in that license notice the full lists of Invariant Sections
+and required Cover Texts given in the Document's license notice.
+.IP "H." 4
+.IX Item "H."
+Include an unaltered copy of this License.
+.IP "I." 4
+.IX Item "I."
+Preserve the section Entitled \*(L"History\*(R", Preserve its Title, and add
+to it an item stating at least the title, year, new authors, and
+publisher of the Modified Version as given on the Title Page.  If
+there is no section Entitled \*(L"History\*(R" in the Document, create one
+stating the title, year, authors, and publisher of the Document as
+given on its Title Page, then add an item describing the Modified
+Version as stated in the previous sentence.
+.IP "J." 4
+.IX Item "J."
+Preserve the network location, if any, given in the Document for
+public access to a Transparent copy of the Document, and likewise
+the network locations given in the Document for previous versions
+it was based on.  These may be placed in the \*(L"History\*(R" section.
+You may omit a network location for a work that was published at
+least four years before the Document itself, or if the original
+publisher of the version it refers to gives permission.
+.IP "K." 4
+.IX Item "K."
+For any section Entitled \*(L"Acknowledgements\*(R" or \*(L"Dedications\*(R", Preserve
+the Title of the section, and preserve in the section all the
+substance and tone of each of the contributor acknowledgements and/or
+dedications given therein.
+.IP "L." 4
+.IX Item "L."
+Preserve all the Invariant Sections of the Document,
+unaltered in their text and in their titles.  Section numbers
+or the equivalent are not considered part of the section titles.
+.IP "M." 4
+.IX Item "M."
+Delete any section Entitled \*(L"Endorsements\*(R".  Such a section
+may not be included in the Modified Version.
+.IP "N." 4
+.IX Item "N."
+Do not retitle any existing section to be Entitled \*(L"Endorsements\*(R" or
+to conflict in title with any Invariant Section.
+.IP "O." 4
+.IX Item "O."
+Preserve any Warranty Disclaimers.
+.RE
+.RS 4
+.Sp
+If the Modified Version includes new front-matter sections or
+appendices that qualify as Secondary Sections and contain no material
+copied from the Document, you may at your option designate some or all
+of these sections as invariant.  To do this, add their titles to the
+list of Invariant Sections in the Modified Version's license notice.
+These titles must be distinct from any other section titles.
+.Sp
+You may add a section Entitled \*(L"Endorsements\*(R", provided it contains
+nothing but endorsements of your Modified Version by various
+parties\-\-\-for example, statements of peer review or that the text has
+been approved by an organization as the authoritative definition of a
+standard.
+.Sp
+You may add a passage of up to five words as a Front-Cover Text, and a
+passage of up to 25 words as a Back-Cover Text, to the end of the list
+of Cover Texts in the Modified Version.  Only one passage of
+Front-Cover Text and one of Back-Cover Text may be added by (or
+through arrangements made by) any one entity.  If the Document already
+includes a cover text for the same cover, previously added by you or
+by arrangement made by the same entity you are acting on behalf of,
+you may not add another; but you may replace the old one, on explicit
+permission from the previous publisher that added the old one.
+.Sp
+The author(s) and publisher(s) of the Document do not by this License
+give permission to use their names for publicity for or to assert or
+imply endorsement of any Modified Version.
+.RE
+.IP "5." 4
+.IX Item "5."
+\&\s-1COMBINING\s0 \s-1DOCUMENTS\s0
+.Sp
+You may combine the Document with other documents released under this
+License, under the terms defined in section 4 above for modified
+versions, provided that you include in the combination all of the
+Invariant Sections of all of the original documents, unmodified, and
+list them all as Invariant Sections of your combined work in its
+license notice, and that you preserve all their Warranty Disclaimers.
+.Sp
+The combined work need only contain one copy of this License, and
+multiple identical Invariant Sections may be replaced with a single
+copy.  If there are multiple Invariant Sections with the same name but
+different contents, make the title of each such section unique by
+adding at the end of it, in parentheses, the name of the original
+author or publisher of that section if known, or else a unique number.
+Make the same adjustment to the section titles in the list of
+Invariant Sections in the license notice of the combined work.
+.Sp
+In the combination, you must combine any sections Entitled \*(L"History\*(R"
+in the various original documents, forming one section Entitled
+\&\*(L"History\*(R"; likewise combine any sections Entitled \*(L"Acknowledgements\*(R",
+and any sections Entitled \*(L"Dedications\*(R".  You must delete all
+sections Entitled \*(L"Endorsements.\*(R"
+.IP "6." 4
+.IX Item "6."
+\&\s-1COLLECTIONS\s0 \s-1OF\s0 \s-1DOCUMENTS\s0
+.Sp
+You may make a collection consisting of the Document and other documents
+released under this License, and replace the individual copies of this
+License in the various documents with a single copy that is included in
+the collection, provided that you follow the rules of this License for
+verbatim copying of each of the documents in all other respects.
+.Sp
+You may extract a single document from such a collection, and distribute
+it individually under this License, provided you insert a copy of this
+License into the extracted document, and follow this License in all
+other respects regarding verbatim copying of that document.
+.IP "7." 4
+.IX Item "7."
+\&\s-1AGGREGATION\s0 \s-1WITH\s0 \s-1INDEPENDENT\s0 \s-1WORKS\s0
+.Sp
+A compilation of the Document or its derivatives with other separate
+and independent documents or works, in or on a volume of a storage or
+distribution medium, is called an \*(L"aggregate\*(R" if the copyright
+resulting from the compilation is not used to limit the legal rights
+of the compilation's users beyond what the individual works permit.
+When the Document is included in an aggregate, this License does not
+apply to the other works in the aggregate which are not themselves
+derivative works of the Document.
+.Sp
+If the Cover Text requirement of section 3 is applicable to these
+copies of the Document, then if the Document is less than one half of
+the entire aggregate, the Document's Cover Texts may be placed on
+covers that bracket the Document within the aggregate, or the
+electronic equivalent of covers if the Document is in electronic form.
+Otherwise they must appear on printed covers that bracket the whole
+aggregate.
+.IP "8." 4
+.IX Item "8."
+\&\s-1TRANSLATION\s0
+.Sp
+Translation is considered a kind of modification, so you may
+distribute translations of the Document under the terms of section 4.
+Replacing Invariant Sections with translations requires special
+permission from their copyright holders, but you may include
+translations of some or all Invariant Sections in addition to the
+original versions of these Invariant Sections.  You may include a
+translation of this License, and all the license notices in the
+Document, and any Warranty Disclaimers, provided that you also include
+the original English version of this License and the original versions
+of those notices and disclaimers.  In case of a disagreement between
+the translation and the original version of this License or a notice
+or disclaimer, the original version will prevail.
+.Sp
+If a section in the Document is Entitled \*(L"Acknowledgements\*(R",
+\&\*(L"Dedications\*(R", or \*(L"History\*(R", the requirement (section 4) to Preserve
+its Title (section 1) will typically require changing the actual
+title.
+.IP "9." 4
+.IX Item "9."
+\&\s-1TERMINATION\s0
+.Sp
+You may not copy, modify, sublicense, or distribute the Document except
+as expressly provided for under this License.  Any other attempt to
+copy, modify, sublicense or distribute the Document is void, and will
+automatically terminate your rights under this License.  However,
+parties who have received copies, or rights, from you under this
+License will not have their licenses terminated so long as such
+parties remain in full compliance.
+.IP "10." 4
+.IX Item "10."
+\&\s-1FUTURE\s0 \s-1REVISIONS\s0 \s-1OF\s0 \s-1THIS\s0 \s-1LICENSE\s0
+.Sp
+The Free Software Foundation may publish new, revised versions
+of the \s-1GNU\s0 Free Documentation License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.  See
+<\fBhttp://www.gnu.org/copyleft/\fR>.
+.Sp
+Each version of the License is given a distinguishing version number.
+If the Document specifies that a particular numbered version of this
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that specified version or
+of any later version that has been published (not as a draft) by the
+Free Software Foundation.  If the Document does not specify a version
+number of this License, you may choose any version ever published (not
+as a draft) by the Free Software Foundation.
+.Sh "\s-1ADDENDUM:\s0 How to use this License for your documents"
+.IX Subsection "ADDENDUM: How to use this License for your documents"
+To use this License in a document you have written, include a copy of
+the License in the document and put the following copyright and
+license notices just after the title page:
+.PP
+.Vb 7
+\&          Copyright (C)  <year>  <your name>.
+\&          Permission is granted to copy, distribute and/or modify this document
+\&          under the terms of the GNU Free Documentation License, Version 1.2
+\&          or any later version published by the Free Software Foundation;
+\&          with no Invariant Sections, no Front\-Cover Texts, and no Back\-Cover
+\&          Texts.  A copy of the license is included in the section entitled "GNU
+\&          Free Documentation License".
+.Ve
+.PP
+If you have Invariant Sections, Front-Cover Texts and Back-Cover Texts,
+replace the \*(L"with...Texts.\*(R" line with this:
+.PP
+.Vb 3
+\&            with the Invariant Sections being <list their titles>, with
+\&            the Front\-Cover Texts being <list>, and with the Back\-Cover Texts
+\&            being <list>.
+.Ve
+.PP
+If you have Invariant Sections without Cover Texts, or some other
+combination of the three, merge those two alternatives to suit the
+situation.
+.PP
+If your document contains nontrivial examples of program code, we
+recommend releasing these examples in parallel under your choice of
+free software license, such as the \s-1GNU\s0 General Public License,
+to permit their use in free software.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgpl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2000,2001,2002 Free Software Foundation, Inc.
+51 Franklin Street, Fifth Floor, Boston, \s-1MA\s0  02110\-1301, \s-1USA\s0
+.PP
+Everyone is permitted to copy and distribute verbatim copies
+of this license document, but changing it is not allowed.
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gpl.7 b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gpl.7
new file mode 100644
index 00000000..68ac1459
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/share/man/man7/gpl.7
@@ -0,0 +1,835 @@
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+.\" ========================================================================
+.\"
+.IX Title "GPL 7"
+.TH GPL 7 "2013-10-22" "gcc-4.5.1-tc32-1.3" "GNU"
+.SH "NAME"
+gpl \- GNU General Public License
+.SH "DESCRIPTION"
+.IX Header "DESCRIPTION"
+.Sh "\s-1GNU\s0 General Public License"
+.IX Subsection "GNU General Public License"
+.Sh "Version 3, 29 June 2007"
+.IX Subsection "Version 3, 29 June 2007"
+.Vb 1
+\&        Copyright (c) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+.Ve
+.PP
+.Vb 2
+\&        Everyone is permitted to copy and distribute verbatim copies of this
+\&        license document, but changing it is not allowed.
+.Ve
+.Sh "Preamble"
+.IX Subsection "Preamble"
+The \s-1GNU\s0 General Public License is a free, copyleft license for
+software and other kinds of works.
+.PP
+The licenses for most software and other practical works are designed
+to take away your freedom to share and change the works.  By contrast,
+the \s-1GNU\s0 General Public License is intended to guarantee your freedom
+to share and change all versions of a program\*(--to make sure it remains
+free software for all its users.  We, the Free Software Foundation,
+use the \s-1GNU\s0 General Public License for most of our software; it
+applies also to any other work released this way by its authors.  You
+can apply it to your programs, too.
+.PP
+When we speak of free software, we are referring to freedom, not
+price.  Our General Public Licenses are designed to make sure that you
+have the freedom to distribute copies of free software (and charge for
+them if you wish), that you receive source code or can get it if you
+want it, that you can change the software or use pieces of it in new
+free programs, and that you know you can do these things.
+.PP
+To protect your rights, we need to prevent others from denying you
+these rights or asking you to surrender the rights.  Therefore, you
+have certain responsibilities if you distribute copies of the
+software, or if you modify it: responsibilities to respect the freedom
+of others.
+.PP
+For example, if you distribute copies of such a program, whether
+gratis or for a fee, you must pass on to the recipients the same
+freedoms that you received.  You must make sure that they, too,
+receive or can get the source code.  And you must show them these
+terms so they know their rights.
+.PP
+Developers that use the \s-1GNU\s0 \s-1GPL\s0 protect your rights with two steps:
+(1) assert copyright on the software, and (2) offer you this License
+giving you legal permission to copy, distribute and/or modify it.
+.PP
+For the developers' and authors' protection, the \s-1GPL\s0 clearly explains
+that there is no warranty for this free software.  For both users' and
+authors' sake, the \s-1GPL\s0 requires that modified versions be marked as
+changed, so that their problems will not be attributed erroneously to
+authors of previous versions.
+.PP
+Some devices are designed to deny users access to install or run
+modified versions of the software inside them, although the
+manufacturer can do so.  This is fundamentally incompatible with the
+aim of protecting users' freedom to change the software.  The
+systematic pattern of such abuse occurs in the area of products for
+individuals to use, which is precisely where it is most unacceptable.
+Therefore, we have designed this version of the \s-1GPL\s0 to prohibit the
+practice for those products.  If such problems arise substantially in
+other domains, we stand ready to extend this provision to those
+domains in future versions of the \s-1GPL\s0, as needed to protect the
+freedom of users.
+.PP
+Finally, every program is threatened constantly by software patents.
+States should not allow patents to restrict development and use of
+software on general-purpose computers, but in those that do, we wish
+to avoid the special danger that patents applied to a free program
+could make it effectively proprietary.  To prevent this, the \s-1GPL\s0
+assures that patents cannot be used to render the program non\-free.
+.PP
+The precise terms and conditions for copying, distribution and
+modification follow.
+.Sh "\s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "TERMS AND CONDITIONS"
+.IP "0. Definitions." 4
+.IX Item "0. Definitions."
+\&\*(L"This License\*(R" refers to version 3 of the \s-1GNU\s0 General Public License.
+.Sp
+\&\*(L"Copyright\*(R" also means copyright-like laws that apply to other kinds
+of works, such as semiconductor masks.
+.Sp
+\&\*(L"The Program\*(R" refers to any copyrightable work licensed under this
+License.  Each licensee is addressed as \*(L"you\*(R".  \*(L"Licensees\*(R" and
+\&\*(L"recipients\*(R" may be individuals or organizations.
+.Sp
+To \*(L"modify\*(R" a work means to copy from or adapt all or part of the work
+in a fashion requiring copyright permission, other than the making of
+an exact copy.  The resulting work is called a \*(L"modified version\*(R" of
+the earlier work or a work \*(L"based on\*(R" the earlier work.
+.Sp
+A \*(L"covered work\*(R" means either the unmodified Program or a work based
+on the Program.
+.Sp
+To \*(L"propagate\*(R" a work means to do anything with it that, without
+permission, would make you directly or secondarily liable for
+infringement under applicable copyright law, except executing it on a
+computer or modifying a private copy.  Propagation includes copying,
+distribution (with or without modification), making available to the
+public, and in some countries other activities as well.
+.Sp
+To \*(L"convey\*(R" a work means any kind of propagation that enables other
+parties to make or receive copies.  Mere interaction with a user
+through a computer network, with no transfer of a copy, is not
+conveying.
+.Sp
+An interactive user interface displays \*(L"Appropriate Legal Notices\*(R" to
+the extent that it includes a convenient and prominently visible
+feature that (1) displays an appropriate copyright notice, and (2)
+tells the user that there is no warranty for the work (except to the
+extent that warranties are provided), that licensees may convey the
+work under this License, and how to view a copy of this License.  If
+the interface presents a list of user commands or options, such as a
+menu, a prominent item in the list meets this criterion.
+.IP "1. Source Code." 4
+.IX Item "1. Source Code."
+The \*(L"source code\*(R" for a work means the preferred form of the work for
+making modifications to it.  \*(L"Object code\*(R" means any non-source form
+of a work.
+.Sp
+A \*(L"Standard Interface\*(R" means an interface that either is an official
+standard defined by a recognized standards body, or, in the case of
+interfaces specified for a particular programming language, one that
+is widely used among developers working in that language.
+.Sp
+The \*(L"System Libraries\*(R" of an executable work include anything, other
+than the work as a whole, that (a) is included in the normal form of
+packaging a Major Component, but which is not part of that Major
+Component, and (b) serves only to enable use of the work with that
+Major Component, or to implement a Standard Interface for which an
+implementation is available to the public in source code form.  A
+\&\*(L"Major Component\*(R", in this context, means a major essential component
+(kernel, window system, and so on) of the specific operating system
+(if any) on which the executable work runs, or a compiler used to
+produce the work, or an object code interpreter used to run it.
+.Sp
+The \*(L"Corresponding Source\*(R" for a work in object code form means all
+the source code needed to generate, install, and (for an executable
+work) run the object code and to modify the work, including scripts to
+control those activities.  However, it does not include the work's
+System Libraries, or general-purpose tools or generally available free
+programs which are used unmodified in performing those activities but
+which are not part of the work.  For example, Corresponding Source
+includes interface definition files associated with source files for
+the work, and the source code for shared libraries and dynamically
+linked subprograms that the work is specifically designed to require,
+such as by intimate data communication or control flow between those
+subprograms and other parts of the work.
+.Sp
+The Corresponding Source need not include anything that users can
+regenerate automatically from other parts of the Corresponding Source.
+.Sp
+The Corresponding Source for a work in source code form is that same
+work.
+.IP "2. Basic Permissions." 4
+.IX Item "2. Basic Permissions."
+All rights granted under this License are granted for the term of
+copyright on the Program, and are irrevocable provided the stated
+conditions are met.  This License explicitly affirms your unlimited
+permission to run the unmodified Program.  The output from running a
+covered work is covered by this License only if the output, given its
+content, constitutes a covered work.  This License acknowledges your
+rights of fair use or other equivalent, as provided by copyright law.
+.Sp
+You may make, run and propagate covered works that you do not convey,
+without conditions so long as your license otherwise remains in force.
+You may convey covered works to others for the sole purpose of having
+them make modifications exclusively for you, or provide you with
+facilities for running those works, provided that you comply with the
+terms of this License in conveying all material for which you do not
+control copyright.  Those thus making or running the covered works for
+you must do so exclusively on your behalf, under your direction and
+control, on terms that prohibit them from making any copies of your
+copyrighted material outside their relationship with you.
+.Sp
+Conveying under any other circumstances is permitted solely under the
+conditions stated below.  Sublicensing is not allowed; section 10
+makes it unnecessary.
+.IP "3. Protecting Users' Legal Rights From Anti-Circumvention Law." 4
+.IX Item "3. Protecting Users' Legal Rights From Anti-Circumvention Law."
+No covered work shall be deemed part of an effective technological
+measure under any applicable law fulfilling obligations under article
+11 of the \s-1WIPO\s0 copyright treaty adopted on 20 December 1996, or
+similar laws prohibiting or restricting circumvention of such
+measures.
+.Sp
+When you convey a covered work, you waive any legal power to forbid
+circumvention of technological measures to the extent such
+circumvention is effected by exercising rights under this License with
+respect to the covered work, and you disclaim any intention to limit
+operation or modification of the work as a means of enforcing, against
+the work's users, your or third parties' legal rights to forbid
+circumvention of technological measures.
+.IP "4. Conveying Verbatim Copies." 4
+.IX Item "4. Conveying Verbatim Copies."
+You may convey verbatim copies of the Program's source code as you
+receive it, in any medium, provided that you conspicuously and
+appropriately publish on each copy an appropriate copyright notice;
+keep intact all notices stating that this License and any
+non-permissive terms added in accord with section 7 apply to the code;
+keep intact all notices of the absence of any warranty; and give all
+recipients a copy of this License along with the Program.
+.Sp
+You may charge any price or no price for each copy that you convey,
+and you may offer support or warranty protection for a fee.
+.IP "5. Conveying Modified Source Versions." 4
+.IX Item "5. Conveying Modified Source Versions."
+You may convey a work based on the Program, or the modifications to
+produce it from the Program, in the form of source code under the
+terms of section 4, provided that you also meet all of these
+conditions:
+.RS 4
+.IP "a." 4
+The work must carry prominent notices stating that you modified it,
+and giving a relevant date.
+.IP "b." 4
+The work must carry prominent notices stating that it is released
+under this License and any conditions added under section 7.  This
+requirement modifies the requirement in section 4 to \*(L"keep intact all
+notices\*(R".
+.IP "c." 4
+You must license the entire work, as a whole, under this License to
+anyone who comes into possession of a copy.  This License will
+therefore apply, along with any applicable section 7 additional terms,
+to the whole of the work, and all its parts, regardless of how they
+are packaged.  This License gives no permission to license the work in
+any other way, but it does not invalidate such permission if you have
+separately received it.
+.IP "d." 4
+If the work has interactive user interfaces, each must display
+Appropriate Legal Notices; however, if the Program has interactive
+interfaces that do not display Appropriate Legal Notices, your work
+need not make them do so.
+.RE
+.RS 4
+.Sp
+A compilation of a covered work with other separate and independent
+works, which are not by their nature extensions of the covered work,
+and which are not combined with it such as to form a larger program,
+in or on a volume of a storage or distribution medium, is called an
+\&\*(L"aggregate\*(R" if the compilation and its resulting copyright are not
+used to limit the access or legal rights of the compilation's users
+beyond what the individual works permit.  Inclusion of a covered work
+in an aggregate does not cause this License to apply to the other
+parts of the aggregate.
+.RE
+.IP "6. Conveying Non-Source Forms." 4
+.IX Item "6. Conveying Non-Source Forms."
+You may convey a covered work in object code form under the terms of
+sections 4 and 5, provided that you also convey the machine-readable
+Corresponding Source under the terms of this License, in one of these
+ways:
+.RS 4
+.IP "a." 4
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by the
+Corresponding Source fixed on a durable physical medium customarily
+used for software interchange.
+.IP "b." 4
+Convey the object code in, or embodied in, a physical product
+(including a physical distribution medium), accompanied by a written
+offer, valid for at least three years and valid for as long as you
+offer spare parts or customer support for that product model, to give
+anyone who possesses the object code either (1) a copy of the
+Corresponding Source for all the software in the product that is
+covered by this License, on a durable physical medium customarily used
+for software interchange, for a price no more than your reasonable
+cost of physically performing this conveying of source, or (2) access
+to copy the Corresponding Source from a network server at no charge.
+.IP "c." 4
+Convey individual copies of the object code with a copy of the written
+offer to provide the Corresponding Source.  This alternative is
+allowed only occasionally and noncommercially, and only if you
+received the object code with such an offer, in accord with subsection
+6b.
+.IP "d." 4
+Convey the object code by offering access from a designated place
+(gratis or for a charge), and offer equivalent access to the
+Corresponding Source in the same way through the same place at no
+further charge.  You need not require recipients to copy the
+Corresponding Source along with the object code.  If the place to copy
+the object code is a network server, the Corresponding Source may be
+on a different server (operated by you or a third party) that supports
+equivalent copying facilities, provided you maintain clear directions
+next to the object code saying where to find the Corresponding Source.
+Regardless of what server hosts the Corresponding Source, you remain
+obligated to ensure that it is available for as long as needed to
+satisfy these requirements.
+.IP "e." 4
+Convey the object code using peer-to-peer transmission, provided you
+inform other peers where the object code and Corresponding Source of
+the work are being offered to the general public at no charge under
+subsection 6d.
+.RE
+.RS 4
+.Sp
+A separable portion of the object code, whose source code is excluded
+from the Corresponding Source as a System Library, need not be
+included in conveying the object code work.
+.Sp
+A \*(L"User Product\*(R" is either (1) a \*(L"consumer product\*(R", which means any
+tangible personal property which is normally used for personal,
+family, or household purposes, or (2) anything designed or sold for
+incorporation into a dwelling.  In determining whether a product is a
+consumer product, doubtful cases shall be resolved in favor of
+coverage.  For a particular product received by a particular user,
+\&\*(L"normally used\*(R" refers to a typical or common use of that class of
+product, regardless of the status of the particular user or of the way
+in which the particular user actually uses, or expects or is expected
+to use, the product.  A product is a consumer product regardless of
+whether the product has substantial commercial, industrial or
+non-consumer uses, unless such uses represent the only significant
+mode of use of the product.
+.Sp
+\&\*(L"Installation Information\*(R" for a User Product means any methods,
+procedures, authorization keys, or other information required to
+install and execute modified versions of a covered work in that User
+Product from a modified version of its Corresponding Source.  The
+information must suffice to ensure that the continued functioning of
+the modified object code is in no case prevented or interfered with
+solely because modification has been made.
+.Sp
+If you convey an object code work under this section in, or with, or
+specifically for use in, a User Product, and the conveying occurs as
+part of a transaction in which the right of possession and use of the
+User Product is transferred to the recipient in perpetuity or for a
+fixed term (regardless of how the transaction is characterized), the
+Corresponding Source conveyed under this section must be accompanied
+by the Installation Information.  But this requirement does not apply
+if neither you nor any third party retains the ability to install
+modified object code on the User Product (for example, the work has
+been installed in \s-1ROM\s0).
+.Sp
+The requirement to provide Installation Information does not include a
+requirement to continue to provide support service, warranty, or
+updates for a work that has been modified or installed by the
+recipient, or for the User Product in which it has been modified or
+installed.  Access to a network may be denied when the modification
+itself materially and adversely affects the operation of the network
+or violates the rules and protocols for communication across the
+network.
+.Sp
+Corresponding Source conveyed, and Installation Information provided,
+in accord with this section must be in a format that is publicly
+documented (and with an implementation available to the public in
+source code form), and must require no special password or key for
+unpacking, reading or copying.
+.RE
+.IP "7. Additional Terms." 4
+.IX Item "7. Additional Terms."
+\&\*(L"Additional permissions\*(R" are terms that supplement the terms of this
+License by making exceptions from one or more of its conditions.
+Additional permissions that are applicable to the entire Program shall
+be treated as though they were included in this License, to the extent
+that they are valid under applicable law.  If additional permissions
+apply only to part of the Program, that part may be used separately
+under those permissions, but the entire Program remains governed by
+this License without regard to the additional permissions.
+.Sp
+When you convey a copy of a covered work, you may at your option
+remove any additional permissions from that copy, or from any part of
+it.  (Additional permissions may be written to require their own
+removal in certain cases when you modify the work.)  You may place
+additional permissions on material, added by you to a covered work,
+for which you have or can give appropriate copyright permission.
+.Sp
+Notwithstanding any other provision of this License, for material you
+add to a covered work, you may (if authorized by the copyright holders
+of that material) supplement the terms of this License with terms:
+.RS 4
+.IP "a." 4
+Disclaiming warranty or limiting liability differently from the terms
+of sections 15 and 16 of this License; or
+.IP "b." 4
+Requiring preservation of specified reasonable legal notices or author
+attributions in that material or in the Appropriate Legal Notices
+displayed by works containing it; or
+.IP "c." 4
+Prohibiting misrepresentation of the origin of that material, or
+requiring that modified versions of such material be marked in
+reasonable ways as different from the original version; or
+.IP "d." 4
+Limiting the use for publicity purposes of names of licensors or
+authors of the material; or
+.IP "e." 4
+Declining to grant rights under trademark law for use of some trade
+names, trademarks, or service marks; or
+.IP "f." 4
+Requiring indemnification of licensors and authors of that material by
+anyone who conveys the material (or modified versions of it) with
+contractual assumptions of liability to the recipient, for any
+liability that these contractual assumptions directly impose on those
+licensors and authors.
+.RE
+.RS 4
+.Sp
+All other non-permissive additional terms are considered \*(L"further
+restrictions\*(R" within the meaning of section 10.  If the Program as you
+received it, or any part of it, contains a notice stating that it is
+governed by this License along with a term that is a further
+restriction, you may remove that term.  If a license document contains
+a further restriction but permits relicensing or conveying under this
+License, you may add to a covered work material governed by the terms
+of that license document, provided that the further restriction does
+not survive such relicensing or conveying.
+.Sp
+If you add terms to a covered work in accord with this section, you
+must place, in the relevant source files, a statement of the
+additional terms that apply to those files, or a notice indicating
+where to find the applicable terms.
+.Sp
+Additional terms, permissive or non\-permissive, may be stated in the
+form of a separately written license, or stated as exceptions; the
+above requirements apply either way.
+.RE
+.IP "8. Termination." 4
+.IX Item "8. Termination."
+You may not propagate or modify a covered work except as expressly
+provided under this License.  Any attempt otherwise to propagate or
+modify it is void, and will automatically terminate your rights under
+this License (including any patent licenses granted under the third
+paragraph of section 11).
+.Sp
+However, if you cease all violation of this License, then your license
+from a particular copyright holder is reinstated (a) provisionally,
+unless and until the copyright holder explicitly and finally
+terminates your license, and (b) permanently, if the copyright holder
+fails to notify you of the violation by some reasonable means prior to
+60 days after the cessation.
+.Sp
+Moreover, your license from a particular copyright holder is
+reinstated permanently if the copyright holder notifies you of the
+violation by some reasonable means, this is the first time you have
+received notice of violation of this License (for any work) from that
+copyright holder, and you cure the violation prior to 30 days after
+your receipt of the notice.
+.Sp
+Termination of your rights under this section does not terminate the
+licenses of parties who have received copies or rights from you under
+this License.  If your rights have been terminated and not permanently
+reinstated, you do not qualify to receive new licenses for the same
+material under section 10.
+.IP "9. Acceptance Not Required for Having Copies." 4
+.IX Item "9. Acceptance Not Required for Having Copies."
+You are not required to accept this License in order to receive or run
+a copy of the Program.  Ancillary propagation of a covered work
+occurring solely as a consequence of using peer-to-peer transmission
+to receive a copy likewise does not require acceptance.  However,
+nothing other than this License grants you permission to propagate or
+modify any covered work.  These actions infringe copyright if you do
+not accept this License.  Therefore, by modifying or propagating a
+covered work, you indicate your acceptance of this License to do so.
+.IP "10. Automatic Licensing of Downstream Recipients." 4
+.IX Item "10. Automatic Licensing of Downstream Recipients."
+Each time you convey a covered work, the recipient automatically
+receives a license from the original licensors, to run, modify and
+propagate that work, subject to this License.  You are not responsible
+for enforcing compliance by third parties with this License.
+.Sp
+An \*(L"entity transaction\*(R" is a transaction transferring control of an
+organization, or substantially all assets of one, or subdividing an
+organization, or merging organizations.  If propagation of a covered
+work results from an entity transaction, each party to that
+transaction who receives a copy of the work also receives whatever
+licenses to the work the party's predecessor in interest had or could
+give under the previous paragraph, plus a right to possession of the
+Corresponding Source of the work from the predecessor in interest, if
+the predecessor has it or can get it with reasonable efforts.
+.Sp
+You may not impose any further restrictions on the exercise of the
+rights granted or affirmed under this License.  For example, you may
+not impose a license fee, royalty, or other charge for exercise of
+rights granted under this License, and you may not initiate litigation
+(including a cross-claim or counterclaim in a lawsuit) alleging that
+any patent claim is infringed by making, using, selling, offering for
+sale, or importing the Program or any portion of it.
+.IP "11. Patents." 4
+.IX Item "11. Patents."
+A \*(L"contributor\*(R" is a copyright holder who authorizes use under this
+License of the Program or a work on which the Program is based.  The
+work thus licensed is called the contributor's \*(L"contributor version\*(R".
+.Sp
+A contributor's \*(L"essential patent claims\*(R" are all patent claims owned
+or controlled by the contributor, whether already acquired or
+hereafter acquired, that would be infringed by some manner, permitted
+by this License, of making, using, or selling its contributor version,
+but do not include claims that would be infringed only as a
+consequence of further modification of the contributor version.  For
+purposes of this definition, \*(L"control\*(R" includes the right to grant
+patent sublicenses in a manner consistent with the requirements of
+this License.
+.Sp
+Each contributor grants you a non\-exclusive, worldwide, royalty-free
+patent license under the contributor's essential patent claims, to
+make, use, sell, offer for sale, import and otherwise run, modify and
+propagate the contents of its contributor version.
+.Sp
+In the following three paragraphs, a \*(L"patent license\*(R" is any express
+agreement or commitment, however denominated, not to enforce a patent
+(such as an express permission to practice a patent or covenant not to
+sue for patent infringement).  To \*(L"grant\*(R" such a patent license to a
+party means to make such an agreement or commitment not to enforce a
+patent against the party.
+.Sp
+If you convey a covered work, knowingly relying on a patent license,
+and the Corresponding Source of the work is not available for anyone
+to copy, free of charge and under the terms of this License, through a
+publicly available network server or other readily accessible means,
+then you must either (1) cause the Corresponding Source to be so
+available, or (2) arrange to deprive yourself of the benefit of the
+patent license for this particular work, or (3) arrange, in a manner
+consistent with the requirements of this License, to extend the patent
+license to downstream recipients.  \*(L"Knowingly relying\*(R" means you have
+actual knowledge that, but for the patent license, your conveying the
+covered work in a country, or your recipient's use of the covered work
+in a country, would infringe one or more identifiable patents in that
+country that you have reason to believe are valid.
+.Sp
+If, pursuant to or in connection with a single transaction or
+arrangement, you convey, or propagate by procuring conveyance of, a
+covered work, and grant a patent license to some of the parties
+receiving the covered work authorizing them to use, propagate, modify
+or convey a specific copy of the covered work, then the patent license
+you grant is automatically extended to all recipients of the covered
+work and works based on it.
+.Sp
+A patent license is \*(L"discriminatory\*(R" if it does not include within the
+scope of its coverage, prohibits the exercise of, or is conditioned on
+the non-exercise of one or more of the rights that are specifically
+granted under this License.  You may not convey a covered work if you
+are a party to an arrangement with a third party that is in the
+business of distributing software, under which you make payment to the
+third party based on the extent of your activity of conveying the
+work, and under which the third party grants, to any of the parties
+who would receive the covered work from you, a discriminatory patent
+license (a) in connection with copies of the covered work conveyed by
+you (or copies made from those copies), or (b) primarily for and in
+connection with specific products or compilations that contain the
+covered work, unless you entered into that arrangement, or that patent
+license was granted, prior to 28 March 2007.
+.Sp
+Nothing in this License shall be construed as excluding or limiting
+any implied license or other defenses to infringement that may
+otherwise be available to you under applicable patent law.
+.IP "12. No Surrender of Others' Freedom." 4
+.IX Item "12. No Surrender of Others' Freedom."
+If conditions are imposed on you (whether by court order, agreement or
+otherwise) that contradict the conditions of this License, they do not
+excuse you from the conditions of this License.  If you cannot convey
+a covered work so as to satisfy simultaneously your obligations under
+this License and any other pertinent obligations, then as a
+consequence you may not convey it at all.  For example, if you agree
+to terms that obligate you to collect a royalty for further conveying
+from those to whom you convey the Program, the only way you could
+satisfy both those terms and this License would be to refrain entirely
+from conveying the Program.
+.IP "13. Use with the \s-1GNU\s0 Affero General Public License." 4
+.IX Item "13. Use with the GNU Affero General Public License."
+Notwithstanding any other provision of this License, you have
+permission to link or combine any covered work with a work licensed
+under version 3 of the \s-1GNU\s0 Affero General Public License into a single
+combined work, and to convey the resulting work.  The terms of this
+License will continue to apply to the part which is the covered work,
+but the special requirements of the \s-1GNU\s0 Affero General Public License,
+section 13, concerning interaction through a network will apply to the
+combination as such.
+.IP "14. Revised Versions of this License." 4
+.IX Item "14. Revised Versions of this License."
+The Free Software Foundation may publish revised and/or new versions
+of the \s-1GNU\s0 General Public License from time to time.  Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+.Sp
+Each version is given a distinguishing version number.  If the Program
+specifies that a certain numbered version of the \s-1GNU\s0 General Public
+License \*(L"or any later version\*(R" applies to it, you have the option of
+following the terms and conditions either of that numbered version or
+of any later version published by the Free Software Foundation.  If
+the Program does not specify a version number of the \s-1GNU\s0 General
+Public License, you may choose any version ever published by the Free
+Software Foundation.
+.Sp
+If the Program specifies that a proxy can decide which future versions
+of the \s-1GNU\s0 General Public License can be used, that proxy's public
+statement of acceptance of a version permanently authorizes you to
+choose that version for the Program.
+.Sp
+Later license versions may give you additional or different
+permissions.  However, no additional obligations are imposed on any
+author or copyright holder as a result of your choosing to follow a
+later version.
+.IP "15. Disclaimer of Warranty." 4
+.IX Item "15. Disclaimer of Warranty."
+\&\s-1THERE\s0 \s-1IS\s0 \s-1NO\s0 \s-1WARRANTY\s0 \s-1FOR\s0 \s-1THE\s0 \s-1PROGRAM\s0, \s-1TO\s0 \s-1THE\s0 \s-1EXTENT\s0 \s-1PERMITTED\s0 \s-1BY\s0
+\&\s-1APPLICABLE\s0 \s-1LAW\s0.  \s-1EXCEPT\s0 \s-1WHEN\s0 \s-1OTHERWISE\s0 \s-1STATED\s0 \s-1IN\s0 \s-1WRITING\s0 \s-1THE\s0 \s-1COPYRIGHT\s0
+\&\s-1HOLDERS\s0 \s-1AND/OR\s0 \s-1OTHER\s0 \s-1PARTIES\s0 \s-1PROVIDE\s0 \s-1THE\s0 \s-1PROGRAM\s0 \*(L"\s-1AS\s0 \s-1IS\s0\*(R" \s-1WITHOUT\s0
+\&\s-1WARRANTY\s0 \s-1OF\s0 \s-1ANY\s0 \s-1KIND\s0, \s-1EITHER\s0 \s-1EXPRESSED\s0 \s-1OR\s0 \s-1IMPLIED\s0, \s-1INCLUDING\s0, \s-1BUT\s0 \s-1NOT\s0
+\&\s-1LIMITED\s0 \s-1TO\s0, \s-1THE\s0 \s-1IMPLIED\s0 \s-1WARRANTIES\s0 \s-1OF\s0 \s-1MERCHANTABILITY\s0 \s-1AND\s0 \s-1FITNESS\s0 \s-1FOR\s0
+A \s-1PARTICULAR\s0 \s-1PURPOSE\s0.  \s-1THE\s0 \s-1ENTIRE\s0 \s-1RISK\s0 \s-1AS\s0 \s-1TO\s0 \s-1THE\s0 \s-1QUALITY\s0 \s-1AND\s0
+\&\s-1PERFORMANCE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1IS\s0 \s-1WITH\s0 \s-1YOU\s0.  \s-1SHOULD\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1PROVE\s0
+\&\s-1DEFECTIVE\s0, \s-1YOU\s0 \s-1ASSUME\s0 \s-1THE\s0 \s-1COST\s0 \s-1OF\s0 \s-1ALL\s0 \s-1NECESSARY\s0 \s-1SERVICING\s0, \s-1REPAIR\s0 \s-1OR\s0
+\&\s-1CORRECTION\s0.
+.IP "16. Limitation of Liability." 4
+.IX Item "16. Limitation of Liability."
+\&\s-1IN\s0 \s-1NO\s0 \s-1EVENT\s0 \s-1UNLESS\s0 \s-1REQUIRED\s0 \s-1BY\s0 \s-1APPLICABLE\s0 \s-1LAW\s0 \s-1OR\s0 \s-1AGREED\s0 \s-1TO\s0 \s-1IN\s0 \s-1WRITING\s0
+\&\s-1WILL\s0 \s-1ANY\s0 \s-1COPYRIGHT\s0 \s-1HOLDER\s0, \s-1OR\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PARTY\s0 \s-1WHO\s0 \s-1MODIFIES\s0 \s-1AND/OR\s0
+\&\s-1CONVEYS\s0 \s-1THE\s0 \s-1PROGRAM\s0 \s-1AS\s0 \s-1PERMITTED\s0 \s-1ABOVE\s0, \s-1BE\s0 \s-1LIABLE\s0 \s-1TO\s0 \s-1YOU\s0 \s-1FOR\s0 \s-1DAMAGES\s0,
+\&\s-1INCLUDING\s0 \s-1ANY\s0 \s-1GENERAL\s0, \s-1SPECIAL\s0, \s-1INCIDENTAL\s0 \s-1OR\s0 \s-1CONSEQUENTIAL\s0 \s-1DAMAGES\s0
+\&\s-1ARISING\s0 \s-1OUT\s0 \s-1OF\s0 \s-1THE\s0 \s-1USE\s0 \s-1OR\s0 \s-1INABILITY\s0 \s-1TO\s0 \s-1USE\s0 \s-1THE\s0 \s-1PROGRAM\s0 (\s-1INCLUDING\s0 \s-1BUT\s0
+\&\s-1NOT\s0 \s-1LIMITED\s0 \s-1TO\s0 \s-1LOSS\s0 \s-1OF\s0 \s-1DATA\s0 \s-1OR\s0 \s-1DATA\s0 \s-1BEING\s0 \s-1RENDERED\s0 \s-1INACCURATE\s0 \s-1OR\s0
+\&\s-1LOSSES\s0 \s-1SUSTAINED\s0 \s-1BY\s0 \s-1YOU\s0 \s-1OR\s0 \s-1THIRD\s0 \s-1PARTIES\s0 \s-1OR\s0 A \s-1FAILURE\s0 \s-1OF\s0 \s-1THE\s0 \s-1PROGRAM\s0
+\&\s-1TO\s0 \s-1OPERATE\s0 \s-1WITH\s0 \s-1ANY\s0 \s-1OTHER\s0 \s-1PROGRAMS\s0), \s-1EVEN\s0 \s-1IF\s0 \s-1SUCH\s0 \s-1HOLDER\s0 \s-1OR\s0 \s-1OTHER\s0
+\&\s-1PARTY\s0 \s-1HAS\s0 \s-1BEEN\s0 \s-1ADVISED\s0 \s-1OF\s0 \s-1THE\s0 \s-1POSSIBILITY\s0 \s-1OF\s0 \s-1SUCH\s0 \s-1DAMAGES\s0.
+.IP "17. Interpretation of Sections 15 and 16." 4
+.IX Item "17. Interpretation of Sections 15 and 16."
+If the disclaimer of warranty and limitation of liability provided
+above cannot be given local legal effect according to their terms,
+reviewing courts shall apply local law that most closely approximates
+an absolute waiver of all civil liability in connection with the
+Program, unless a warranty or assumption of liability accompanies a
+copy of the Program in return for a fee.
+.Sh "\s-1END\s0 \s-1OF\s0 \s-1TERMS\s0 \s-1AND\s0 \s-1CONDITIONS\s0"
+.IX Subsection "END OF TERMS AND CONDITIONS"
+.Sh "How to Apply These Terms to Your New Programs"
+.IX Subsection "How to Apply These Terms to Your New Programs"
+If you develop a new program, and you want it to be of the greatest
+possible use to the public, the best way to achieve this is to make it
+free software which everyone can redistribute and change under these
+terms.
+.PP
+To do so, attach the following notices to the program.  It is safest
+to attach them to the start of each source file to most effectively
+state the exclusion of warranty; and each file should have at least
+the \*(L"copyright\*(R" line and a pointer to where the full notice is found.
+.PP
+.Vb 2
+\&        <one line to give the program's name and a brief idea of what it does.>  
+\&        Copyright (C) <year> <name of author>
+.Ve
+.PP
+.Vb 4
+\&        This program is free software: you can redistribute it and/or modify
+\&        it under the terms of the GNU General Public License as published by
+\&        the Free Software Foundation, either version 3 of the License, or (at
+\&        your option) any later version.
+.Ve
+.PP
+.Vb 4
+\&        This program is distributed in the hope that it will be useful, but
+\&        WITHOUT ANY WARRANTY; without even the implied warranty of
+\&        MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+\&        General Public License for more details.
+.Ve
+.PP
+.Vb 2
+\&        You should have received a copy of the GNU General Public License
+\&        along with this program.  If not, see <http://www.gnu.org/licenses/>.
+.Ve
+.PP
+Also add information on how to contact you by electronic and paper mail.
+.PP
+If the program does terminal interaction, make it output a short
+notice like this when it starts in an interactive mode:
+.PP
+.Vb 4
+\&        <program> Copyright (C) <year> <name of author> 
+\&        This program comes with ABSOLUTELY NO WARRANTY; for details type "show w".
+\&        This is free software, and you are welcome to redistribute it
+\&        under certain conditions; type "show c" for details.
+.Ve
+.PP
+The hypothetical commands \fBshow w\fR and \fBshow c\fR should show
+the appropriate parts of the General Public License.  Of course, your
+program's commands might be different; for a \s-1GUI\s0 interface, you would
+use an \*(L"about box\*(R".
+.PP
+You should also get your employer (if you work as a programmer) or school,
+if any, to sign a \*(L"copyright disclaimer\*(R" for the program, if necessary.
+For more information on this, and how to apply and follow the \s-1GNU\s0 \s-1GPL\s0, see
+<\fBhttp://www.gnu.org/licenses/\fR>.
+.PP
+The \s-1GNU\s0 General Public License does not permit incorporating your
+program into proprietary programs.  If your program is a subroutine
+library, you may consider it more useful to permit linking proprietary
+applications with the library.  If this is what you want to do, use
+the \s-1GNU\s0 Lesser General Public License instead of this License.  But
+first, please read <\fBhttp://www.gnu.org/philosophy/why\-not\-lgpl.html\fR>.
+.SH "SEE ALSO"
+.IX Header "SEE ALSO"
+\&\fIgfdl\fR\|(7), \fIfsf\-funding\fR\|(7).
+.SH "COPYRIGHT"
+.IX Header "COPYRIGHT"
+Copyright (c) 2007 Free Software Foundation, Inc.
+.PP
+Everyone is permitted to copy and distribute verbatim copies of this
+license document, but changing it is not allowed.
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ar.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ar.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/gcc.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/gcc.exe
new file mode 100644
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ld.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ld.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/objcopy.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/objcopy.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/objdump.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/objdump.exe
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Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/objdump.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ranlib.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ranlib.exe
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Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/ranlib.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/strip.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/bin/strip.exe
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_ansi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_ansi.h
new file mode 100644
index 00000000..c5597b30
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_ansi.h
@@ -0,0 +1,144 @@
+/* Provide support for both ANSI and non-ANSI environments.  */
+
+/* Some ANSI environments are "broken" in the sense that __STDC__ cannot be
+   relied upon to have it's intended meaning.  Therefore we must use our own
+   concoction: _HAVE_STDC.  Always use _HAVE_STDC instead of __STDC__ in newlib
+   sources!
+
+   To get a strict ANSI C environment, define macro __STRICT_ANSI__.  This will
+   "comment out" the non-ANSI parts of the ANSI header files (non-ANSI header
+   files aren't affected).  */
+
+#ifndef	_ANSIDECL_H_
+#define	_ANSIDECL_H_
+
+#include <newlib.h>
+#include <sys/config.h>
+
+/* First try to figure out whether we really are in an ANSI C environment.  */
+/* FIXME: This probably needs some work.  Perhaps sys/config.h can be
+   prevailed upon to give us a clue.  */
+
+#ifdef __STDC__
+#define _HAVE_STDC
+#endif
+
+/*  ISO C++.  */
+
+#ifdef __cplusplus
+#if !(defined(_BEGIN_STD_C) && defined(_END_STD_C))
+#ifdef _HAVE_STD_CXX
+#define _BEGIN_STD_C namespace std { extern "C" {
+#define _END_STD_C  } }
+#else
+#define _BEGIN_STD_C extern "C" {
+#define _END_STD_C  }
+#endif
+#if __GNUC_PREREQ (3, 3)
+#define _NOTHROW __attribute__ ((nothrow))
+#else
+#define _NOTHROW throw()
+#endif
+#endif
+#else
+#define _BEGIN_STD_C
+#define _END_STD_C
+#define _NOTHROW
+#endif
+
+#ifdef _HAVE_STDC
+#define	_PTR		void *
+#define	_AND		,
+#define	_NOARGS		void
+#define	_CONST		const
+#define	_VOLATILE	volatile
+#define	_SIGNED		signed
+#define	_DOTS		, ...
+#define _VOID void
+#ifdef __CYGWIN__
+#define	_EXFUN_NOTHROW(name, proto)	__cdecl name proto _NOTHROW
+#define	_EXFUN(name, proto)		__cdecl name proto
+#define	_EXPARM(name, proto)		(* __cdecl name) proto
+#define	_EXFNPTR(name, proto)		(__cdecl * name) proto
+#else
+#define	_EXFUN_NOTHROW(name, proto)	name proto _NOTHROW
+#define	_EXFUN(name, proto)		name proto
+#define _EXPARM(name, proto)		(* name) proto
+#define _EXFNPTR(name, proto)		(* name) proto
+#endif
+#define	_DEFUN(name, arglist, args)	name(args)
+#define	_DEFUN_VOID(name)		name(_NOARGS)
+#define _CAST_VOID (void)
+#ifndef _LONG_DOUBLE
+#define _LONG_DOUBLE long double
+#endif
+#ifndef _LONG_LONG_TYPE
+#define _LONG_LONG_TYPE long long
+#endif
+#ifndef _PARAMS
+#define _PARAMS(paramlist)		paramlist
+#endif
+#else	
+#define	_PTR		char *
+#define	_AND		;
+#define	_NOARGS
+#define	_CONST
+#define	_VOLATILE
+#define	_SIGNED
+#define	_DOTS
+#define _VOID void
+#define	_EXFUN(name, proto)		name()
+#define	_EXFUN_NOTHROW(name, proto)	name()
+#define	_DEFUN(name, arglist, args)	name arglist args;
+#define	_DEFUN_VOID(name)		name()
+#define _CAST_VOID
+#define _LONG_DOUBLE double
+#define _LONG_LONG_TYPE long
+#ifndef _PARAMS
+#define _PARAMS(paramlist)		()
+#endif
+#endif
+
+/* Support gcc's __attribute__ facility.  */
+
+#ifdef __GNUC__
+#define _ATTRIBUTE(attrs) __attribute__ (attrs)
+#else
+#define _ATTRIBUTE(attrs)
+#endif
+
+/*  The traditional meaning of 'extern inline' for GCC is not
+  to emit the function body unless the address is explicitly
+  taken.  However this behaviour is changing to match the C99
+  standard, which uses 'extern inline' to indicate that the
+  function body *must* be emitted.  Likewise, a function declared
+  without either 'extern' or 'static' defaults to extern linkage
+  (C99 6.2.2p5), and the compiler may choose whether to use the
+  inline version or call the extern linkage version (6.7.4p6).
+  If we are using GCC, but do not have the new behaviour, we need
+  to use extern inline; if we are using a new GCC with the
+  C99-compatible behaviour, or a non-GCC compiler (which we will
+  have to hope is C99, since there is no other way to achieve the
+  effect of omitting the function if it isn't referenced) we use
+  'static inline', which c99 defines to mean more-or-less the same
+  as the Gnu C 'extern inline'.  */
+#if defined(__GNUC__) && !defined(__GNUC_STDC_INLINE__)
+/* We're using GCC, but without the new C99-compatible behaviour.  */
+#define _ELIDABLE_INLINE extern __inline__ _ATTRIBUTE ((__always_inline__))
+#else
+/* We're using GCC in C99 mode, or an unknown compiler which
+  we just have to hope obeys the C99 semantics of inline.  */
+#define _ELIDABLE_INLINE static __inline__
+#endif
+
+#if __GNUC_PREREQ (3, 1)
+#define _NOINLINE		__attribute__ ((__noinline__))
+#define _NOINLINE_STATIC	_NOINLINE static
+#else
+/* On non-GNU compilers and GCC prior to version 3.1 the compiler can't be
+   trusted not to inline if it is static. */
+#define _NOINLINE
+#define _NOINLINE_STATIC
+#endif
+
+#endif /* _ANSIDECL_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_syslist.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_syslist.h
new file mode 100644
index 00000000..271644ef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/_syslist.h
@@ -0,0 +1,40 @@
+/* internal use only -- mapping of "system calls" for libraries that lose
+   and only provide C names, so that we end up in violation of ANSI */
+#ifndef __SYSLIST_H
+#define __SYSLIST_H
+
+#ifdef MISSING_SYSCALL_NAMES
+#define _close close
+#define _execve execve
+#define _fcntl fcntl
+#define _fork fork
+#define _fstat fstat
+#define _getpid getpid
+#define _gettimeofday gettimeofday
+#define _isatty isatty
+#define _kill kill
+#define _link link
+#define _lseek lseek
+#define _mkdir mkdir
+#define _open open
+#define _read read
+#define _sbrk sbrk
+#define _stat stat
+#define _times times
+#define _unlink unlink
+#define _wait wait
+#define _write write
+#endif /* MISSING_SYSCALL_NAMES */
+
+#if defined MISSING_SYSCALL_NAMES || !defined HAVE_OPENDIR
+/* If the system call interface is missing opendir, readdir, and
+   closedir, there is an implementation of these functions in
+   libc/posix that is implemented using open, getdents, and close. 
+   Note, these functions are currently not in the libc/syscalls
+   directory.  */
+#define _opendir opendir
+#define _readdir readdir
+#define _closedir closedir
+#endif /* MISSING_SYSCALL_NAMES || !HAVE_OPENDIR */
+
+#endif /* !__SYSLIST_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/alloca.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/alloca.h
new file mode 100644
index 00000000..2ea0fd9b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/alloca.h
@@ -0,0 +1,21 @@
+/* libc/include/alloca.h - Allocate memory on stack */
+
+/* Written 2000 by Werner Almesberger */
+/* Rearranged for general inclusion by stdlib.h.
+   2001, Corinna Vinschen <vinschen@redhat.com> */
+
+#ifndef _NEWLIB_ALLOCA_H
+#define _NEWLIB_ALLOCA_H
+
+#include "_ansi.h"
+#include <sys/reent.h>
+
+#undef alloca
+
+#ifdef __GNUC__
+#define alloca(size) __builtin_alloca(size)
+#else
+void * _EXFUN(alloca,(size_t));
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ar.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ar.h
new file mode 100644
index 00000000..ac2e4ca9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ar.h
@@ -0,0 +1,69 @@
+/*	$NetBSD: ar.h,v 1.4 1994/10/26 00:55:43 cgd Exp $	*/
+
+/*-
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ * (c) UNIX System Laboratories, Inc.
+ * All or some portions of this file are derived from material licensed
+ * to the University of California by American Telephone and Telegraph
+ * Co. or Unix System Laboratories, Inc. and are reproduced herein with
+ * the permission of UNIX System Laboratories, Inc.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Hugh Smith at The University of Guelph.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)ar.h	8.2 (Berkeley) 1/21/94
+ */
+
+#ifndef _AR_H_
+#define	_AR_H_
+
+/* Pre-4BSD archives had these magic numbers in them. */
+#define	OARMAG1	0177555
+#define	OARMAG2	0177545
+
+#define	ARMAG		"!<arch>\n"	/* ar "magic number" */
+#define	SARMAG		8		/* strlen(ARMAG); */
+
+#define	AR_EFMT1	"#1/"		/* extended format #1 */
+
+struct ar_hdr {
+	char ar_name[16];		/* name */
+	char ar_date[12];		/* modification time */
+	char ar_uid[6];			/* user id */
+	char ar_gid[6];			/* group id */
+	char ar_mode[8];		/* octal file permissions */
+	char ar_size[10];		/* size in bytes */
+#define	ARFMAG	"`\n"
+	char ar_fmag[2];		/* consistency check */
+};
+
+#endif /* !_AR_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/argz.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/argz.h
new file mode 100644
index 00000000..02c9adbf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/argz.h
@@ -0,0 +1,33 @@
+/* Copyright (C) 2002 by  Red Hat, Incorporated. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software
+ * is freely granted, provided that this notice is preserved.
+ */
+
+#ifndef _ARGZ_H_
+#define _ARGZ_H_
+
+#include <errno.h>
+#include <sys/types.h>
+
+#include "_ansi.h"
+
+_BEGIN_STD_C
+
+/* The newlib implementation of these functions assumes that sizeof(char) == 1. */
+error_t argz_create (char *const argv[], char **argz, size_t *argz_len);
+error_t argz_create_sep (const char *string, int sep, char **argz, size_t *argz_len);
+size_t argz_count (const char *argz, size_t argz_len);
+void argz_extract (char *argz, size_t argz_len, char **argv);
+void argz_stringify (char *argz, size_t argz_len, int sep);
+error_t argz_add (char **argz, size_t *argz_len, const char *str);
+error_t argz_add_sep (char **argz, size_t *argz_len, const char *str, int sep);
+error_t argz_append (char **argz, size_t *argz_len, const char *buf, size_t buf_len);
+error_t argz_delete (char **argz, size_t *argz_len, char *entry);
+error_t argz_insert (char **argz, size_t *argz_len, char *before, const char *entry);
+char * argz_next (char *argz, size_t argz_len, const char *entry);
+error_t argz_replace (char **argz, size_t *argz_len, const char *str, const char *with, unsigned *replace_count);
+
+_END_STD_C
+
+#endif /* _ARGZ_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/assert.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/assert.h
new file mode 100644
index 00000000..91bb040c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/assert.h
@@ -0,0 +1,50 @@
+/*
+	assert.h
+*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "_ansi.h"
+
+#undef assert
+
+#ifdef NDEBUG           /* required by ANSI standard */
+# define assert(__e) ((void)0)
+#else
+# define assert(__e) ((__e) ? (void)0 : __assert_func (__FILE__, __LINE__, \
+						       __ASSERT_FUNC, #__e))
+
+# ifndef __ASSERT_FUNC
+  /* Use g++'s demangled names in C++.  */
+#  if defined __cplusplus && defined __GNUC__
+#   define __ASSERT_FUNC __PRETTY_FUNCTION__
+
+  /* C99 requires the use of __func__.  */
+#  elif __STDC_VERSION__ >= 199901L
+#   define __ASSERT_FUNC __func__
+
+  /* Older versions of gcc don't have __func__ but can use __FUNCTION__.  */
+#  elif __GNUC__ >= 2
+#   define __ASSERT_FUNC __FUNCTION__
+
+  /* failed to detect __func__ support.  */
+#  else
+#   define __ASSERT_FUNC ((char *) 0)
+#  endif
+# endif /* !__ASSERT_FUNC */
+#endif /* !NDEBUG */
+
+void _EXFUN(__assert, (const char *, int, const char *)
+	    _ATTRIBUTE ((__noreturn__)));
+void _EXFUN(__assert_func, (const char *, int, const char *, const char *)
+	    _ATTRIBUTE ((__noreturn__)));
+
+#if __STDC_VERSION__ >= 201112L && !defined __cplusplus
+# define static_assert _Static_assert
+#endif
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/complex.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/complex.h
new file mode 100644
index 00000000..969b20e5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/complex.h
@@ -0,0 +1,124 @@
+/* $NetBSD: complex.h,v 1.3 2010/09/15 16:11:30 christos Exp $ */
+
+/*
+ * Written by Matthias Drochner.
+ * Public domain.
+ */
+
+#ifndef	_COMPLEX_H
+#define	_COMPLEX_H
+
+#define complex _Complex
+#define _Complex_I 1.0fi
+#define I _Complex_I
+
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+
+/* 7.3.5 Trigonometric functions */
+/* 7.3.5.1 The cacos functions */
+double complex cacos(double complex);
+float complex cacosf(float complex);
+
+/* 7.3.5.2 The casin functions */
+double complex casin(double complex);
+float complex casinf(float complex);
+
+/* 7.3.5.1 The catan functions */
+double complex catan(double complex);
+float complex catanf(float complex);
+
+/* 7.3.5.1 The ccos functions */
+double complex ccos(double complex);
+float complex ccosf(float complex);
+
+/* 7.3.5.1 The csin functions */
+double complex csin(double complex);
+float complex csinf(float complex);
+
+/* 7.3.5.1 The ctan functions */
+double complex ctan(double complex);
+float complex ctanf(float complex);
+
+/* 7.3.6 Hyperbolic functions */
+/* 7.3.6.1 The cacosh functions */
+double complex cacosh(double complex);
+float complex cacoshf(float complex);
+
+/* 7.3.6.2 The casinh functions */
+double complex casinh(double complex);
+float complex casinhf(float complex);
+
+/* 7.3.6.3 The catanh functions */
+double complex catanh(double complex);
+float complex catanhf(float complex);
+
+/* 7.3.6.4 The ccosh functions */
+double complex ccosh(double complex);
+float complex ccoshf(float complex);
+
+/* 7.3.6.5 The csinh functions */
+double complex csinh(double complex);
+float complex csinhf(float complex);
+
+/* 7.3.6.6 The ctanh functions */
+double complex ctanh(double complex);
+float complex ctanhf(float complex);
+
+/* 7.3.7 Exponential and logarithmic functions */
+/* 7.3.7.1 The cexp functions */
+double complex cexp(double complex);
+float complex cexpf(float complex);
+
+/* 7.3.7.2 The clog functions */
+double complex clog(double complex);
+float complex clogf(float complex);
+
+/* 7.3.8 Power and absolute-value functions */
+/* 7.3.8.1 The cabs functions */
+/*#ifndef __LIBM0_SOURCE__ */
+/* avoid conflict with historical cabs(struct complex) */
+/* double cabs(double complex) __RENAME(__c99_cabs);
+   float cabsf(float complex) __RENAME(__c99_cabsf);
+   #endif
+*/
+double cabs(double complex) ;
+float cabsf(float complex) ;
+
+/* 7.3.8.2 The cpow functions */
+double complex cpow(double complex, double complex);
+float complex cpowf(float complex, float complex);
+
+/* 7.3.8.3 The csqrt functions */
+double complex csqrt(double complex);
+float complex csqrtf(float complex);
+
+/* 7.3.9 Manipulation functions */
+/* 7.3.9.1 The carg functions */ 
+double carg(double complex);
+float cargf(float complex);
+
+/* 7.3.9.2 The cimag functions */
+double cimag(double complex);
+float cimagf(float complex);
+/*long double cimagl(long double complex); */
+
+/* 7.3.9.3 The conj functions */
+double complex conj(double complex);
+float complex conjf(float complex);
+/*long double complex conjl(long double complex); */
+
+/* 7.3.9.4 The cproj functions */
+double complex cproj(double complex);
+float complex cprojf(float complex);
+/*long double complex cprojl(long double complex); */
+
+/* 7.3.9.5 The creal functions */
+double creal(double complex);
+float crealf(float complex);
+/*long double creall(long double complex); */
+
+__END_DECLS
+
+#endif	/* ! _COMPLEX_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ctype.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ctype.h
new file mode 100644
index 00000000..56ad5abb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ctype.h
@@ -0,0 +1,113 @@
+#ifndef _CTYPE_H_
+#define _CTYPE_H_
+
+#include "_ansi.h"
+
+_BEGIN_STD_C
+
+int _EXFUN(isalnum, (int __c));
+int _EXFUN(isalpha, (int __c));
+int _EXFUN(iscntrl, (int __c));
+int _EXFUN(isdigit, (int __c));
+int _EXFUN(isgraph, (int __c));
+int _EXFUN(islower, (int __c));
+int _EXFUN(isprint, (int __c));
+int _EXFUN(ispunct, (int __c));
+int _EXFUN(isspace, (int __c));
+int _EXFUN(isupper, (int __c));
+int _EXFUN(isxdigit,(int __c));
+int _EXFUN(tolower, (int __c));
+int _EXFUN(toupper, (int __c));
+
+#if !defined(__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L
+int _EXFUN(isblank, (int __c));
+#endif
+
+#ifndef __STRICT_ANSI__
+int _EXFUN(isascii, (int __c));
+int _EXFUN(toascii, (int __c));
+#define _tolower(__c) ((unsigned char)(__c) - 'A' + 'a')
+#define _toupper(__c) ((unsigned char)(__c) - 'a' + 'A')
+#endif
+
+#define	_U	01
+#define	_L	02
+#define	_N	04
+#define	_S	010
+#define _P	020
+#define _C	040
+#define _X	0100
+#define	_B	0200
+
+#ifndef _MB_CAPABLE
+_CONST
+#endif
+extern	__IMPORT char	*__ctype_ptr__;
+
+#ifndef __cplusplus
+/* These macros are intentionally written in a manner that will trigger
+   a gcc -Wall warning if the user mistakenly passes a 'char' instead
+   of an int containing an 'unsigned char'.  Note that the sizeof will
+   always be 1, which is what we want for mapping EOF to __ctype_ptr__[0];
+   the use of a raw index inside the sizeof triggers the gcc warning if
+   __c was of type char, and sizeof masks side effects of the extra __c.
+   Meanwhile, the real index to __ctype_ptr__+1 must be cast to int,
+   since isalpha(0x100000001LL) must equal isalpha(1), rather than being
+   an out-of-bounds reference on a 64-bit machine.  */
+#define __ctype_lookup(__c) ((__ctype_ptr__+sizeof(""[__c]))[(int)(__c)])
+
+#define	isalpha(__c)	(__ctype_lookup(__c)&(_U|_L))
+#define	isupper(__c)	((__ctype_lookup(__c)&(_U|_L))==_U)
+#define	islower(__c)	((__ctype_lookup(__c)&(_U|_L))==_L)
+#define	isdigit(__c)	(__ctype_lookup(__c)&_N)
+#define	isxdigit(__c)	(__ctype_lookup(__c)&(_X|_N))
+#define	isspace(__c)	(__ctype_lookup(__c)&_S)
+#define ispunct(__c)	(__ctype_lookup(__c)&_P)
+#define isalnum(__c)	(__ctype_lookup(__c)&(_U|_L|_N))
+#define isprint(__c)	(__ctype_lookup(__c)&(_P|_U|_L|_N|_B))
+#define	isgraph(__c)	(__ctype_lookup(__c)&(_P|_U|_L|_N))
+#define iscntrl(__c)	(__ctype_lookup(__c)&_C)
+
+#if defined(__GNUC__) && \
+    (!defined(__STRICT_ANSI__) || __STDC_VERSION__ >= 199901L)
+#define isblank(__c) \
+  __extension__ ({ __typeof__ (__c) __x = (__c);		\
+        (__ctype_lookup(__x)&_B) || (int) (__x) == '\t';})
+#endif
+
+
+/* Non-gcc versions will get the library versions, and will be
+   slightly slower.  These macros are not NLS-aware so they are
+   disabled if the system supports the extended character sets. */
+# if defined(__GNUC__)
+#  if !defined (_MB_EXTENDED_CHARSETS_ISO) && !defined (_MB_EXTENDED_CHARSETS_WINDOWS)
+#   define toupper(__c) \
+  __extension__ ({ __typeof__ (__c) __x = (__c);	\
+      islower (__x) ? (int) __x - 'a' + 'A' : (int) __x;})
+#   define tolower(__c) \
+  __extension__ ({ __typeof__ (__c) __x = (__c);	\
+      isupper (__x) ? (int) __x - 'A' + 'a' : (int) __x;})
+#  else /* _MB_EXTENDED_CHARSETS* */
+/* Allow a gcc warning if the user passed 'char', but defer to the
+   function.  */
+#   define toupper(__c) \
+  __extension__ ({ __typeof__ (__c) __x = (__c);	\
+      (void) __ctype_ptr__[__x]; (toupper) (__x);})
+#   define tolower(__c) \
+  __extension__ ({ __typeof__ (__c) __x = (__c);	\
+      (void) __ctype_ptr__[__x]; (tolower) (__x);})
+#  endif /* _MB_EXTENDED_CHARSETS* */
+# endif /* __GNUC__ */
+#endif /* !__cplusplus */
+
+#ifndef __STRICT_ANSI__
+#define isascii(__c)	((unsigned)(__c)<=0177)
+#define toascii(__c)	((__c)&0177)
+#endif
+
+/* For C++ backward-compatibility only.  */
+extern	__IMPORT _CONST char	_ctype_[];
+
+_END_STD_C
+
+#endif /* _CTYPE_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/dirent.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/dirent.h
new file mode 100644
index 00000000..6fefc03c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/dirent.h
@@ -0,0 +1,15 @@
+#ifndef _DIRENT_H_
+#define _DIRENT_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <sys/dirent.h>
+
+#if !defined(MAXNAMLEN) && !defined(_POSIX_SOURCE)
+#define MAXNAMLEN 1024
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /*_DIRENT_H_*/
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envlock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envlock.h
new file mode 100644
index 00000000..9bb6a813
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envlock.h
@@ -0,0 +1,15 @@
+/* envlock.h -- header file for env routines.  */
+
+#ifndef _INCLUDE_ENVLOCK_H_
+#define _INCLUDE_ENVLOCK_H_
+
+#include <_ansi.h>
+#include <sys/reent.h>
+
+#define ENV_LOCK __env_lock(reent_ptr)
+#define ENV_UNLOCK __env_unlock(reent_ptr)
+
+void _EXFUN(__env_lock,(struct _reent *reent));
+void _EXFUN(__env_unlock,(struct _reent *reent));
+
+#endif /* _INCLUDE_ENVLOCK_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envz.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envz.h
new file mode 100644
index 00000000..e6a31c31
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/envz.h
@@ -0,0 +1,16 @@
+/* Copyright (C) 2002 by  Red Hat, Incorporated. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software
+ * is freely granted, provided that this notice is preserved.
+ */
+
+#include <errno.h>
+#include <sys/types.h>
+
+/* The newlib implementation of these functions assumes that sizeof(char) == 1. */
+char * envz_entry (const char *envz, size_t envz_len, const char *name);
+char * envz_get (const char *envz, size_t envz_len, const char *name);
+error_t envz_add (char **envz, size_t *envz_len, const char *name, const char *value);
+error_t envz_merge (char **envz, size_t *envz_len, const char *envz2, size_t envz2_len, int override);
+void envz_remove(char **envz, size_t *envz_len, const char *name);
+void envz_strip (char **envz, size_t *envz_len);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/errno.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/errno.h
new file mode 100644
index 00000000..7cc2ca86
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/errno.h
@@ -0,0 +1,11 @@
+#ifndef __ERRNO_H__
+#define __ERRNO_H__
+
+#ifndef __error_t_defined
+typedef int error_t;
+#define __error_t_defined 1
+#endif
+
+#include <sys/errno.h>
+
+#endif /* !__ERRNO_H__ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fastmath.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fastmath.h
new file mode 100644
index 00000000..95eea5f3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fastmath.h
@@ -0,0 +1,13 @@
+#ifndef _FASTMATH_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _FASTMATH_H_
+
+#include <math.h>
+#include <machine/fastmath.h>
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _FASTMATH_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fcntl.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fcntl.h
new file mode 100644
index 00000000..86a91677
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fcntl.h
@@ -0,0 +1 @@
+#include <sys/fcntl.h>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fnmatch.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fnmatch.h
new file mode 100644
index 00000000..06311fc4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/fnmatch.h
@@ -0,0 +1,55 @@
+/*-
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/include/fnmatch.h,v 1.10 2002/03/23 17:24:53 imp Exp $
+ *	@(#)fnmatch.h	8.1 (Berkeley) 6/2/93
+ */
+
+#ifndef	_FNMATCH_H_
+#define	_FNMATCH_H_
+
+#define	FNM_NOMATCH	1	/* Match failed. */
+
+#define	FNM_NOESCAPE	0x01	/* Disable backslash escaping. */
+#define	FNM_PATHNAME	0x02	/* Slash must be matched by slash. */
+#define	FNM_PERIOD	0x04	/* Period must be matched by period. */
+
+#if defined(_GNU_SOURCE) || !defined(_ANSI_SOURCE) && !defined(_POSIX_SOURCE)
+#define	FNM_LEADING_DIR	0x08	/* Ignore /<tail> after Imatch. */
+#define	FNM_CASEFOLD	0x10	/* Case insensitive search. */
+#define	FNM_IGNORECASE	FNM_CASEFOLD
+#define	FNM_FILE_NAME	FNM_PATHNAME
+#endif
+
+#include <sys/cdefs.h>
+
+__BEGIN_DECLS
+int	 fnmatch(const char *, const char *, int);
+__END_DECLS
+
+#endif /* !_FNMATCH_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/getopt.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/getopt.h
new file mode 100644
index 00000000..ba8da4a7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/getopt.h
@@ -0,0 +1,190 @@
+/****************************************************************************
+
+getopt.h - Read command line options
+
+AUTHOR: Gregory Pietsch
+CREATED Thu Jan 09 22:37:00 1997
+
+DESCRIPTION:
+
+The getopt() function parses the command line arguments.  Its arguments argc
+and argv are the argument count and array as passed to the main() function
+on program invocation.  The argument optstring is a list of available option
+characters.  If such a character is followed by a colon (`:'), the option
+takes an argument, which is placed in optarg.  If such a character is
+followed by two colons, the option takes an optional argument, which is
+placed in optarg.  If the option does not take an argument, optarg is NULL.
+
+The external variable optind is the index of the next array element of argv
+to be processed; it communicates from one call to the next which element to
+process.
+
+The getopt_long() function works like getopt() except that it also accepts
+long options started by two dashes `--'.  If these take values, it is either
+in the form
+
+--arg=value
+
+ or
+
+--arg value
+
+It takes the additional arguments longopts which is a pointer to the first
+element of an array of type GETOPT_LONG_OPTION_T, defined below.  The last
+element of the array has to be filled with NULL for the name field.
+
+The longind pointer points to the index of the current long option relative
+to longopts if it is non-NULL.
+
+The getopt() function returns the option character if the option was found
+successfully, `:' if there was a missing parameter for one of the options,
+`?' for an unknown option character, and EOF for the end of the option list.
+
+The getopt_long() function's return value is described below.
+
+The function getopt_long_only() is identical to getopt_long(), except that a
+plus sign `+' can introduce long options as well as `--'.
+
+Describe how to deal with options that follow non-option ARGV-elements.
+
+If the caller did not specify anything, the default is REQUIRE_ORDER if the
+environment variable POSIXLY_CORRECT is defined, PERMUTE otherwise.
+
+REQUIRE_ORDER means don't recognize them as options; stop option processing
+when the first non-option is seen.  This is what Unix does.  This mode of
+operation is selected by either setting the environment variable
+POSIXLY_CORRECT, or using `+' as the first character of the optstring
+parameter.
+
+PERMUTE is the default.  We permute the contents of ARGV as we scan, so that
+eventually all the non-options are at the end.  This allows options to be
+given in any order, even with programs that were not written to expect this.
+
+RETURN_IN_ORDER is an option available to programs that were written to
+expect options and other ARGV-elements in any order and that care about the
+ordering of the two.  We describe each non-option ARGV-element as if it were
+the argument of an option with character code 1.  Using `-' as the first
+character of the optstring parameter selects this mode of operation.
+
+The special argument `--' forces an end of option-scanning regardless of the
+value of `ordering'.  In the case of RETURN_IN_ORDER, only `--' can cause
+getopt() and friends to return EOF with optind != argc.
+
+COPYRIGHT NOTICE AND DISCLAIMER:
+
+Copyright (C) 1997 Gregory Pietsch
+
+This file and the accompanying getopt.c implementation file are hereby 
+placed in the public domain without restrictions.  Just give the author 
+credit, don't claim you wrote it or prevent anyone else from using it.
+
+Gregory Pietsch's current e-mail address:
+gpietsch@comcast.net
+****************************************************************************/
+
+/* This is a glibc-extension header file. */
+
+#ifndef GETOPT_H
+#define GETOPT_H
+
+#include <_ansi.h>
+
+/* include files needed by this include file */
+
+#define no_argument		0
+#define required_argument	1
+#define optional_argument	2
+
+#ifdef __cplusplus
+extern "C"
+{
+
+#endif				/* __cplusplus */
+
+/* types defined by this include file */
+  struct option
+  {
+    char *name;			/* the name of the long option */
+    int has_arg;		/* one of the above macros */
+    int *flag;			/* determines if getopt_long() returns a
+				 * value for a long option; if it is
+				 * non-NULL, 0 is returned as a function
+				 * value and the value of val is stored in
+				 * the area pointed to by flag.  Otherwise,
+				 * val is returned. */
+    int val;			/* determines the value to return if flag is
+				 * NULL. */
+
+  };
+
+/* While getopt.h is a glibc extension, the following are newlib extensions.
+ * They are optionally included via the __need_getopt_newlib flag.  */
+
+#ifdef __need_getopt_newlib
+
+  /* macros defined by this include file */
+  #define NO_ARG          	no_argument
+  #define REQUIRED_ARG    	required_argument
+  #define OPTIONAL_ARG    	optional_argument
+
+  /* The GETOPT_DATA_INITIALIZER macro is used to initialize a statically-
+     allocated variable of type struct getopt_data.  */
+  #define GETOPT_DATA_INITIALIZER	{0,0,0,0,0}
+
+  /* These #defines are to make accessing the reentrant functions easier.  */
+  #define getopt_r		__getopt_r
+  #define getopt_long_r		__getopt_long_r
+  #define getopt_long_only_r	__getopt_long_only_r
+
+  /* The getopt_data structure is for reentrancy. Its members are similar to
+     the externally-defined variables.  */
+  typedef struct getopt_data
+  {
+    char *optarg;
+    int optind, opterr, optopt, optwhere;
+  } getopt_data;
+
+#endif /* __need_getopt_newlib */
+
+  /* externally-defined variables */
+  extern char *optarg;
+  extern int optind;
+  extern int opterr;
+  extern int optopt;
+
+  /* function prototypes */
+  int _EXFUN (getopt,
+	      (int __argc, char *const __argv[], const char *__optstring));
+
+  int _EXFUN (getopt_long,
+	      (int __argc, char *const __argv[], const char *__shortopts,
+	       const struct option * __longopts, int *__longind));
+
+  int _EXFUN (getopt_long_only,
+	      (int __argc, char *const __argv[], const char *__shortopts,
+	       const struct option * __longopts, int *__longind));
+
+#ifdef __need_getopt_newlib
+  int _EXFUN (__getopt_r,
+	      (int __argc, char *const __argv[], const char *__optstring,
+	       struct getopt_data * __data));
+
+  int _EXFUN (__getopt_long_r,
+	      (int __argc, char *const __argv[], const char *__shortopts,
+	       const struct option * __longopts, int *__longind,
+	       struct getopt_data * __data));
+
+  int _EXFUN (__getopt_long_only_r,
+	      (int __argc, char *const __argv[], const char *__shortopts,
+	       const struct option * __longopts, int *__longind,
+	       struct getopt_data * __data));
+#endif /* __need_getopt_newlib */
+
+#ifdef __cplusplus
+};
+
+#endif /* __cplusplus  */
+
+#endif /* GETOPT_H */
+
+/* END OF FILE getopt.h */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/glob.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/glob.h
new file mode 100644
index 00000000..a7351350
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/glob.h
@@ -0,0 +1,89 @@
+/*
+ * Copyright (c) 1989, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Guido van Rossum.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)glob.h	8.1 (Berkeley) 6/2/93
+ * $FreeBSD: src/include/glob.h,v 1.6 2002/03/23 17:24:53 imp Exp $
+ */
+
+#ifndef _GLOB_H_
+#define	_GLOB_H_
+
+#include <sys/cdefs.h>
+
+struct stat;
+typedef struct {
+	int gl_pathc;		/* Count of total paths so far. */
+	int gl_matchc;		/* Count of paths matching pattern. */
+	int gl_offs;		/* Reserved at beginning of gl_pathv. */
+	int gl_flags;		/* Copy of flags parameter to glob. */
+	char **gl_pathv;	/* List of paths matching pattern. */
+				/* Copy of errfunc parameter to glob. */
+	int (*gl_errfunc)(const char *, int);
+
+	/*
+	 * Alternate filesystem access methods for glob; replacement
+	 * versions of closedir(3), readdir(3), opendir(3), stat(2)
+	 * and lstat(2).
+	 */
+	void (*gl_closedir)(void *);
+	struct dirent *(*gl_readdir)(void *);
+	void *(*gl_opendir)(const char *);
+	int (*gl_lstat)(const char *, struct stat *);
+	int (*gl_stat)(const char *, struct stat *);
+} glob_t;
+
+#define	GLOB_APPEND	0x0001	/* Append to output from previous call. */
+#define	GLOB_DOOFFS	0x0002	/* Use gl_offs. */
+#define	GLOB_ERR	0x0004	/* Return on error. */
+#define	GLOB_MARK	0x0008	/* Append / to matching directories. */
+#define	GLOB_NOCHECK	0x0010	/* Return pattern itself if nothing matches. */
+#define	GLOB_NOSORT	0x0020	/* Don't sort. */
+
+#define	GLOB_ALTDIRFUNC	0x0040	/* Use alternately specified directory funcs. */
+#define	GLOB_BRACE	0x0080	/* Expand braces ala csh. */
+#define	GLOB_MAGCHAR	0x0100	/* Pattern had globbing characters. */
+#define	GLOB_NOMAGIC	0x0200	/* GLOB_NOCHECK without magic chars (csh). */
+#define	GLOB_QUOTE	0x0400	/* Quote special chars with \. */
+#define	GLOB_TILDE	0x0800	/* Expand tilde names from the passwd file. */
+#define	GLOB_LIMIT	0x1000	/* limit number of returned paths */
+
+/* backwards compatibility, this is the old name for this option */
+#define GLOB_MAXPATH	GLOB_LIMIT
+
+#define	GLOB_NOSPACE	(-1)	/* Malloc call failed. */
+#define	GLOB_ABEND	(-2)	/* Unignored error. */
+
+__BEGIN_DECLS
+int	glob(const char *, int, int (*)(const char *, int), glob_t *);
+void	globfree(glob_t *);
+__END_DECLS
+
+#endif /* !_GLOB_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/grp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/grp.h
new file mode 100644
index 00000000..1273e395
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/grp.h
@@ -0,0 +1,94 @@
+/*	$NetBSD: grp.h,v 1.7 1995/04/29 05:30:40 cgd Exp $	*/
+
+/*-
+ * Copyright (c) 1989, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ * (c) UNIX System Laboratories, Inc.
+ * All or some portions of this file are derived from material licensed
+ * to the University of California by American Telephone and Telegraph
+ * Co. or Unix System Laboratories, Inc. and are reproduced herein with
+ * the permission of UNIX System Laboratories, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)grp.h	8.2 (Berkeley) 1/21/94
+ */
+
+#ifndef _GRP_H_
+#define	_GRP_H_
+
+#include <sys/types.h>
+#ifdef __CYGWIN__
+#include <cygwin/grp.h>
+#endif
+
+#if !defined(_POSIX_SOURCE) && !defined(_XOPEN_SOURCE)
+#define	_PATH_GROUP		"/etc/group"
+#endif
+
+struct group {
+	char	*gr_name;		/* group name */
+	char	*gr_passwd;		/* group password */
+	gid_t	gr_gid;			/* group id */
+	char	**gr_mem;		/* group members */
+};
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __INSIDE_CYGWIN__
+struct group	*getgrgid (gid_t);
+struct group	*getgrnam (const char *);
+int		 getgrnam_r (const char *, struct group *,
+			char *, size_t, struct group **);
+int		 getgrgid_r (gid_t, struct group *,
+			char *, size_t, struct group **);
+#ifndef _POSIX_SOURCE
+struct group	*getgrent (void);
+void		 setgrent (void);
+void		 endgrent (void);
+#ifndef __CYGWIN__
+void		 setgrfile (const char *);
+#endif /* !__CYGWIN__ */
+#ifndef _XOPEN_SOURCE
+#ifndef __CYGWIN__
+char		*group_from_gid (gid_t, int);
+int		 setgroupent (int);
+#endif /* !__CYGWIN__ */
+int		 initgroups (const char *, gid_t);
+#endif /* !_XOPEN_SOURCE */
+#endif /* !_POSIX_SOURCE */
+#endif /* !__INSIDE_CYGWIN__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* !_GRP_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/iconv.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/iconv.h
new file mode 100644
index 00000000..c4a283af
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/iconv.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (c) 2003-2004, Artem B. Bityuckiy, SoftMine Corporation.
+ * Rights transferred to Franklin Electronic Publishers.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+#ifndef _ICONV_H_
+#define _ICONV_H_
+
+#include <_ansi.h>
+#include <reent.h>
+#include <sys/types.h>
+#include <sys/_types.h>
+
+/* iconv_t: charset conversion descriptor type */
+typedef _iconv_t iconv_t;
+
+_BEGIN_STD_C
+
+#ifndef _REENT_ONLY
+iconv_t
+_EXFUN(iconv_open, (_CONST char *, _CONST char *));
+
+size_t
+_EXFUN(iconv, (iconv_t, char **, size_t *, char **, size_t *));
+
+int
+_EXFUN(iconv_close, (iconv_t));
+#endif
+
+iconv_t
+_EXFUN(_iconv_open_r, (struct _reent *, _CONST char *, _CONST char *));
+
+size_t
+_EXFUN(_iconv_r, (struct _reent *, iconv_t, _CONST char **,
+                  size_t *, char **, size_t *));
+
+int
+_EXFUN(_iconv_close_r, (struct _reent *, iconv_t));
+
+_END_STD_C
+
+#endif /* #ifndef _ICONV_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ieeefp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ieeefp.h
new file mode 100644
index 00000000..0b06fb78
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/ieeefp.h
@@ -0,0 +1,256 @@
+#ifndef _IEEE_FP_H_
+#define _IEEE_FP_H_
+
+#include "_ansi.h"
+
+#include <machine/ieeefp.h>
+
+_BEGIN_STD_C
+
+/* FIXME FIXME FIXME:
+   Neither of __ieee_{float,double}_shape_tape seem to be used anywhere
+   except in libm/test.  If that is the case, please delete these from here.
+   If that is not the case, please insert documentation here describing why
+   they're needed.  */
+
+#ifdef __IEEE_BIG_ENDIAN
+
+typedef union 
+{
+  double value;
+  struct 
+  {
+    unsigned int sign : 1;
+    unsigned int exponent: 11;
+    unsigned int fraction0:4;
+    unsigned int fraction1:16;
+    unsigned int fraction2:16;
+    unsigned int fraction3:16;
+    
+  } number;
+  struct 
+  {
+    unsigned int sign : 1;
+    unsigned int exponent: 11;
+    unsigned int quiet:1;
+    unsigned int function0:3;
+    unsigned int function1:16;
+    unsigned int function2:16;
+    unsigned int function3:16;
+  } nan;
+  struct 
+  {
+    unsigned long msw;
+    unsigned long lsw;
+  } parts;
+    long aslong[2];
+} __ieee_double_shape_type;
+
+#endif
+
+#ifdef __IEEE_LITTLE_ENDIAN
+
+typedef union 
+{
+  double value;
+  struct 
+  {
+#ifdef __SMALL_BITFIELDS
+    unsigned int fraction3:16;
+    unsigned int fraction2:16;
+    unsigned int fraction1:16;
+    unsigned int fraction0: 4;
+#else
+    unsigned int fraction1:32;
+    unsigned int fraction0:20;
+#endif
+    unsigned int exponent :11;
+    unsigned int sign     : 1;
+  } number;
+  struct 
+  {
+#ifdef __SMALL_BITFIELDS
+    unsigned int function3:16;
+    unsigned int function2:16;
+    unsigned int function1:16;
+    unsigned int function0:3;
+#else
+    unsigned int function1:32;
+    unsigned int function0:19;
+#endif
+    unsigned int quiet:1;
+    unsigned int exponent: 11;
+    unsigned int sign : 1;
+  } nan;
+  struct 
+  {
+    unsigned long lsw;
+    unsigned long msw;
+  } parts;
+
+  long aslong[2];
+
+} __ieee_double_shape_type;
+
+#endif
+
+#ifdef __IEEE_BIG_ENDIAN
+
+typedef union
+{
+  float value;
+  struct 
+  {
+    unsigned int sign : 1;
+    unsigned int exponent: 8;
+    unsigned int fraction0: 7;
+    unsigned int fraction1: 16;
+  } number;
+  struct 
+  {
+    unsigned int sign:1;
+    unsigned int exponent:8;
+    unsigned int quiet:1;
+    unsigned int function0:6;
+    unsigned int function1:16;
+  } nan;
+  long p1;
+  
+} __ieee_float_shape_type;
+
+#endif
+
+#ifdef __IEEE_LITTLE_ENDIAN
+
+typedef union
+{
+  float value;
+  struct 
+  {
+    unsigned int fraction0: 7;
+    unsigned int fraction1: 16;
+    unsigned int exponent: 8;
+    unsigned int sign : 1;
+  } number;
+  struct 
+  {
+    unsigned int function1:16;
+    unsigned int function0:6;
+    unsigned int quiet:1;
+    unsigned int exponent:8;
+    unsigned int sign:1;
+  } nan;
+  long p1;
+  
+} __ieee_float_shape_type;
+
+#endif
+
+
+
+
+
+/* FLOATING ROUNDING */
+
+typedef int fp_rnd;
+#define FP_RN 0 	/* Round to nearest 		*/
+#define FP_RM 1		/* Round down 			*/
+#define FP_RP 2		/* Round up 			*/
+#define FP_RZ 3		/* Round to zero (trunate) 	*/
+
+fp_rnd _EXFUN(fpgetround,(void));
+fp_rnd _EXFUN(fpsetround, (fp_rnd));
+
+/* EXCEPTIONS */
+
+typedef int fp_except;
+#define FP_X_INV 0x10	/* Invalid operation 		*/
+#define FP_X_DX  0x80	/* Divide by zero		*/
+#define FP_X_OFL 0x04	/* Overflow exception		*/
+#define FP_X_UFL 0x02	/* Underflow exception		*/
+#define FP_X_IMP 0x01	/* imprecise exception		*/
+
+fp_except _EXFUN(fpgetmask,(void));
+fp_except _EXFUN(fpsetmask,(fp_except));
+fp_except _EXFUN(fpgetsticky,(void));
+fp_except _EXFUN(fpsetsticky, (fp_except));
+
+/* INTEGER ROUNDING */
+
+typedef int fp_rdi;
+#define FP_RDI_TOZ 0	/* Round to Zero 		*/
+#define FP_RDI_RD  1	/* Follow float mode		*/
+
+fp_rdi _EXFUN(fpgetroundtoi,(void));
+fp_rdi _EXFUN(fpsetroundtoi,(fp_rdi));
+
+#undef isnan
+#undef isinf
+
+int _EXFUN(isnan, (double));
+int _EXFUN(isinf, (double));
+int _EXFUN(finite, (double));
+
+
+
+int _EXFUN(isnanf, (float));
+int _EXFUN(isinff, (float));
+int _EXFUN(finitef, (float));
+
+#define __IEEE_DBL_EXPBIAS 1023
+#define __IEEE_FLT_EXPBIAS 127
+
+#define __IEEE_DBL_EXPLEN 11
+#define __IEEE_FLT_EXPLEN 8
+
+
+#define __IEEE_DBL_FRACLEN (64 - (__IEEE_DBL_EXPLEN + 1))
+#define __IEEE_FLT_FRACLEN (32 - (__IEEE_FLT_EXPLEN + 1))
+
+#define __IEEE_DBL_MAXPOWTWO	((double)(1L << 32 - 2) * (1L << (32-11) - 32 + 1))
+#define __IEEE_FLT_MAXPOWTWO	((float)(1L << (32-8) - 1))
+
+#define __IEEE_DBL_NAN_EXP 0x7ff
+#define __IEEE_FLT_NAN_EXP 0xff
+
+#ifndef __ieeefp_isnanf
+#define __ieeefp_isnanf(x) (((*(long *)&(x) & 0x7f800000L)==0x7f800000L) && \
+			    ((*(long *)&(x) & 0x007fffffL)!=0000000000L))
+#endif
+#define isnanf(x)	__ieeefp_isnanf(x)
+
+#ifndef __ieeefp_isinff
+#define __ieeefp_isinff(x) (((*(long *)&(x) & 0x7f800000L)==0x7f800000L) && \
+			    ((*(long *)&(x) & 0x007fffffL)==0000000000L))
+#endif
+#define isinff(x)	__ieeefp_isinff(x)
+
+#ifndef __ieeefp_finitef
+#define __ieeefp_finitef(x) (((*(long *)&(x) & 0x7f800000L)!=0x7f800000L))
+#endif
+#define finitef(x)	__ieeefp_finitef(x)
+
+#ifdef _DOUBLE_IS_32BITS
+#undef __IEEE_DBL_EXPBIAS
+#define __IEEE_DBL_EXPBIAS __IEEE_FLT_EXPBIAS
+
+#undef __IEEE_DBL_EXPLEN
+#define __IEEE_DBL_EXPLEN __IEEE_FLT_EXPLEN
+
+#undef __IEEE_DBL_FRACLEN
+#define __IEEE_DBL_FRACLEN __IEEE_FLT_FRACLEN
+
+#undef __IEEE_DBL_MAXPOWTWO
+#define __IEEE_DBL_MAXPOWTWO __IEEE_FLT_MAXPOWTWO
+
+#undef __IEEE_DBL_NAN_EXP
+#define __IEEE_DBL_NAN_EXP __IEEE_FLT_NAN_EXP
+
+#undef __ieee_double_shape_type
+#define __ieee_double_shape_type __ieee_float_shape_type
+
+#endif /* _DOUBLE_IS_32BITS */
+
+_END_STD_C
+
+#endif /* _IEEE_FP_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/inttypes.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/inttypes.h
new file mode 100644
index 00000000..1631e21c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/inttypes.h
@@ -0,0 +1,300 @@
+/*
+ * Copyright (c) 2004, 2005 by
+ * Ralf Corsepius, Ulm/Germany. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software
+ * is freely granted, provided that this notice is preserved.
+ */
+
+/**
+ *  @file  inttypes.h
+ */
+
+#ifndef _INTTYPES_H
+#define _INTTYPES_H
+
+#include <sys/features.h>
+#include <stdint.h>
+#define __need_wchar_t
+#include <stddef.h>
+
+/* Don't use __STDINT_EXP test since GCC's stdint.h provides different
+   macros than newlib's stdint.h. */
+#if __GNUC_PREREQ(3, 2)
+  #define __INTTYPES_EXP(x) __##x##__
+#else
+  #define __INTTYPES_EXP(x) x
+  #include <limits.h>
+#endif
+
+#define __STRINGIFY(a) #a
+
+/* 8-bit types */
+#define __PRI8(x) __STRINGIFY(x)
+#define __SCN8(x) __STRINGIFY(hh##x)
+
+
+#define PRId8		__PRI8(d)
+#define PRIi8		__PRI8(i)
+#define PRIo8		__PRI8(o)
+#define PRIu8		__PRI8(u)
+#define PRIx8		__PRI8(x)
+#define PRIX8		__PRI8(X)
+
+#define SCNd8		__SCN8(d)
+#define SCNi8		__SCN8(i)
+#define SCNo8		__SCN8(o)
+#define SCNu8		__SCN8(u)
+#define SCNx8		__SCN8(x)
+
+
+#define PRIdLEAST8	__PRI8(d)
+#define PRIiLEAST8	__PRI8(i)
+#define PRIoLEAST8	__PRI8(o)
+#define PRIuLEAST8	__PRI8(u)
+#define PRIxLEAST8	__PRI8(x)
+#define PRIXLEAST8	__PRI8(X)
+
+#define SCNdLEAST8	__SCN8(d)
+#define SCNiLEAST8	__SCN8(i)
+#define SCNoLEAST8	__SCN8(o)
+#define SCNuLEAST8	__SCN8(u)
+#define SCNxLEAST8	__SCN8(x)
+
+
+#define PRIdFAST8	__PRI8(d)
+#define PRIiFAST8	__PRI8(i)
+#define PRIoFAST8	__PRI8(o)
+#define PRIuFAST8	__PRI8(u)
+#define PRIxFAST8	__PRI8(x)
+#define PRIXFAST8	__PRI8(X)
+
+#define SCNdFAST8	__SCN8(d)
+#define SCNiFAST8	__SCN8(i)
+#define SCNoFAST8	__SCN8(o)
+#define SCNuFAST8	__SCN8(u)
+#define SCNxFAST8	__SCN8(x)
+
+/* 16-bit types */
+#define __PRI16(x) __STRINGIFY(x)
+#define __SCN16(x) __STRINGIFY(h##x)
+
+
+#define PRId16		__PRI16(d)
+#define PRIi16		__PRI16(i)
+#define PRIo16		__PRI16(o)
+#define PRIu16		__PRI16(u)
+#define PRIx16		__PRI16(x)
+#define PRIX16		__PRI16(X)
+
+#define SCNd16		__SCN16(d)
+#define SCNi16		__SCN16(i)
+#define SCNo16		__SCN16(o)
+#define SCNu16		__SCN16(u)
+#define SCNx16		__SCN16(x)
+
+
+#define PRIdLEAST16	__PRI16(d)
+#define PRIiLEAST16	__PRI16(i)
+#define PRIoLEAST16	__PRI16(o)
+#define PRIuLEAST16	__PRI16(u)
+#define PRIxLEAST16	__PRI16(x)
+#define PRIXLEAST16	__PRI16(X)
+
+#define SCNdLEAST16	__SCN16(d)
+#define SCNiLEAST16	__SCN16(i)
+#define SCNoLEAST16	__SCN16(o)
+#define SCNuLEAST16	__SCN16(u)
+#define SCNxLEAST16	__SCN16(x)
+
+
+#define PRIdFAST16	__PRI16(d)
+#define PRIiFAST16	__PRI16(i)
+#define PRIoFAST16	__PRI16(o)
+#define PRIuFAST16	__PRI16(u)
+#define PRIxFAST16	__PRI16(x)
+#define PRIXFAST16	__PRI16(X)
+
+#define SCNdFAST16	__SCN16(d)
+#define SCNiFAST16	__SCN16(i)
+#define SCNoFAST16	__SCN16(o)
+#define SCNuFAST16	__SCN16(u)
+#define SCNxFAST16	__SCN16(x)
+
+/* 32-bit types */
+#if __have_long32
+#define __PRI32(x) __STRINGIFY(l##x)
+#define __SCN32(x) __STRINGIFY(l##x)
+#else
+#define __PRI32(x) __STRINGIFY(x)
+#define __SCN32(x) __STRINGIFY(x)
+#endif
+
+#define PRId32		__PRI32(d)
+#define PRIi32		__PRI32(i)
+#define PRIo32		__PRI32(o)
+#define PRIu32		__PRI32(u)
+#define PRIx32		__PRI32(x)
+#define PRIX32		__PRI32(X)
+
+#define SCNd32		__SCN32(d)
+#define SCNi32		__SCN32(i)
+#define SCNo32		__SCN32(o)
+#define SCNu32		__SCN32(u)
+#define SCNx32		__SCN32(x)
+
+
+#define PRIdLEAST32	__PRI32(d)
+#define PRIiLEAST32	__PRI32(i)
+#define PRIoLEAST32	__PRI32(o)
+#define PRIuLEAST32	__PRI32(u)
+#define PRIxLEAST32	__PRI32(x)
+#define PRIXLEAST32	__PRI32(X)
+
+#define SCNdLEAST32	__SCN32(d)
+#define SCNiLEAST32	__SCN32(i)
+#define SCNoLEAST32	__SCN32(o)
+#define SCNuLEAST32	__SCN32(u)
+#define SCNxLEAST32	__SCN32(x)
+
+
+#define PRIdFAST32	__PRI32(d)
+#define PRIiFAST32	__PRI32(i)
+#define PRIoFAST32	__PRI32(o)
+#define PRIuFAST32	__PRI32(u)
+#define PRIxFAST32	__PRI32(x)
+#define PRIXFAST32	__PRI32(X)
+
+#define SCNdFAST32	__SCN32(d)
+#define SCNiFAST32	__SCN32(i)
+#define SCNoFAST32	__SCN32(o)
+#define SCNuFAST32	__SCN32(u)
+#define SCNxFAST32	__SCN32(x)
+
+
+/* 64-bit types */
+#if __have_long64
+#define __PRI64(x) __STRINGIFY(l##x)
+#define __SCN64(x) __STRINGIFY(l##x)
+#elif __have_longlong64
+#define __PRI64(x) __STRINGIFY(ll##x)
+#define __SCN64(x) __STRINGIFY(ll##x)
+#else
+#define __PRI64(x) __STRINGIFY(x)
+#define __SCN64(x) __STRINGIFY(x)
+#endif
+
+#define PRId64		__PRI64(d)
+#define PRIi64		__PRI64(i)
+#define PRIo64		__PRI64(o)
+#define PRIu64		__PRI64(u)
+#define PRIx64		__PRI64(x)
+#define PRIX64		__PRI64(X)
+
+#define SCNd64		__SCN64(d)
+#define SCNi64		__SCN64(i)
+#define SCNo64		__SCN64(o)
+#define SCNu64		__SCN64(u)
+#define SCNx64		__SCN64(x)
+
+#if __int64_t_defined
+#define PRIdLEAST64	__PRI64(d)
+#define PRIiLEAST64	__PRI64(i)
+#define PRIoLEAST64	__PRI64(o)
+#define PRIuLEAST64	__PRI64(u)
+#define PRIxLEAST64	__PRI64(x)
+#define PRIXLEAST64	__PRI64(X)
+
+#define SCNdLEAST64	__SCN64(d)
+#define SCNiLEAST64	__SCN64(i)
+#define SCNoLEAST64	__SCN64(o)
+#define SCNuLEAST64	__SCN64(u)
+#define SCNxLEAST64	__SCN64(x)
+
+
+#define PRIdFAST64	__PRI64(d)
+#define PRIiFAST64	__PRI64(i)
+#define PRIoFAST64	__PRI64(o)
+#define PRIuFAST64	__PRI64(u)
+#define PRIxFAST64	__PRI64(x)
+#define PRIXFAST64	__PRI64(X)
+
+#define SCNdFAST64	__SCN64(d)
+#define SCNiFAST64	__SCN64(i)
+#define SCNoFAST64	__SCN64(o)
+#define SCNuFAST64	__SCN64(u)
+#define SCNxFAST64	__SCN64(x)
+#endif
+
+/* max-bit types */
+#if __have_long64
+#define __PRIMAX(x) __STRINGIFY(l##x)
+#define __SCNMAX(x) __STRINGIFY(l##x)
+#elif __have_longlong64
+#define __PRIMAX(x) __STRINGIFY(ll##x)
+#define __SCNMAX(x) __STRINGIFY(ll##x)
+#else
+#define __PRIMAX(x) __STRINGIFY(x)
+#define __SCNMAX(x) __STRINGIFY(x)
+#endif
+
+#define PRIdMAX		__PRIMAX(d)
+#define PRIiMAX		__PRIMAX(i)
+#define PRIoMAX		__PRIMAX(o)
+#define PRIuMAX		__PRIMAX(u)
+#define PRIxMAX		__PRIMAX(x)
+#define PRIXMAX		__PRIMAX(X)
+
+#define SCNdMAX		__SCNMAX(d)
+#define SCNiMAX		__SCNMAX(i)
+#define SCNoMAX		__SCNMAX(o)
+#define SCNuMAX		__SCNMAX(u)
+#define SCNxMAX		__SCNMAX(x)
+
+/* ptr types */
+#if PTRDIFF_MAX <= __INTTYPES_EXP(INT_MAX)
+# define __PRIPTR(x) __STRINGIFY(x)
+# define __SCNPTR(x) __STRINGIFY(x)
+#elif PTRDIFF_MAX <= __INTTYPES_EXP(LONG_MAX) || !defined(__have_longlong64)
+# define __PRIPTR(x) __STRINGIFY(l##x)
+# define __SCNPTR(x) __STRINGIFY(l##x)
+#else
+# define __PRIPTR(x) __STRINGIFY(ll##x)
+# define __SCNPTR(x) __STRINGIFY(ll##x)
+#endif
+
+#define PRIdPTR		__PRIPTR(d)
+#define PRIiPTR		__PRIPTR(i)
+#define PRIoPTR		__PRIPTR(o)
+#define PRIuPTR		__PRIPTR(u)
+#define PRIxPTR		__PRIPTR(x)
+#define PRIXPTR		__PRIPTR(X)
+
+#define SCNdPTR		__SCNPTR(d)
+#define SCNiPTR		__SCNPTR(i)
+#define SCNoPTR		__SCNPTR(o)
+#define SCNuPTR		__SCNPTR(u)
+#define SCNxPTR		__SCNPTR(x)
+
+
+typedef struct {
+  intmax_t	quot;
+  intmax_t	rem;
+} imaxdiv_t;
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+extern intmax_t  imaxabs(intmax_t j);
+extern imaxdiv_t imaxdiv(intmax_t numer, intmax_t denomer);
+extern intmax_t  strtoimax(const char *__restrict, char **__restrict, int);
+extern uintmax_t strtoumax(const char *__restrict, char **__restrict, int);
+extern intmax_t  wcstoimax(const wchar_t *__restrict, wchar_t **__restrict, int);
+extern uintmax_t wcstoumax(const wchar_t *__restrict, wchar_t **__restrict, int);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/langinfo.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/langinfo.h
new file mode 100644
index 00000000..9040adef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/langinfo.h
@@ -0,0 +1,316 @@
+/*-
+ * Copyright (c) 2001 Alexey Zelkin <phantom@FreeBSD.org>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD: src/include/langinfo.h,v 1.5 2002/03/23 17:24:53 imp Exp $
+ */
+
+#ifndef _LANGINFO_H_
+#define	_LANGINFO_H_
+
+#include <newlib.h>
+#include <sys/config.h>
+#include <sys/cdefs.h>
+
+typedef int nl_item;
+
+enum __nl_item
+{
+  /* POSIX and BSD defined items have to stick to the original values
+     to maintain backward compatibility. */
+  _NL_CTYPE_CODESET_NAME = 0,	/* codeset name */
+#define CODESET _NL_CTYPE_CODESET_NAME
+  D_T_FMT,			/* string for formatting date and time */
+#define D_T_FMT D_T_FMT
+  D_FMT,			/* date format string */
+#define D_FMT D_FMT
+  T_FMT,			/* time format string */
+#define T_FMT T_FMT
+  T_FMT_AMPM,			/* a.m. or p.m. time formatting string */
+#define T_FMT_AMPM T_FMT_AMPM
+  AM_STR,			/* Ante Meridian affix */
+#define AM_STR AM_STR
+  PM_STR,			/* Post Meridian affix */
+#define PM_STR PM_STR
+
+/* week day names */
+  DAY_1,
+#define DAY_1 DAY_1
+  DAY_2,
+#define DAY_2 DAY_2
+  DAY_3,
+#define DAY_3 DAY_3
+  DAY_4,
+#define DAY_4 DAY_4
+  DAY_5,
+#define DAY_5 DAY_5
+  DAY_6,
+#define DAY_6 DAY_6
+  DAY_7,
+#define DAY_7 DAY_7
+
+/* abbreviated week day names */
+  ABDAY_1,
+#define ABDAY_1 ABDAY_1
+  ABDAY_2,
+#define ABDAY_2 ABDAY_2
+  ABDAY_3,
+#define ABDAY_3 ABDAY_3
+  ABDAY_4,
+#define ABDAY_4 ABDAY_4
+  ABDAY_5,
+#define ABDAY_5 ABDAY_5
+  ABDAY_6,
+#define ABDAY_6 ABDAY_6
+  ABDAY_7,
+#define ABDAY_7 ABDAY_7
+
+/* month names */
+  MON_1,
+#define MON_1 MON_1
+  MON_2,
+#define MON_2 MON_2
+  MON_3,
+#define MON_3 MON_3
+  MON_4,
+#define MON_4 MON_4
+  MON_5,
+#define MON_5 MON_5
+  MON_6,
+#define MON_6 MON_6
+  MON_7,
+#define MON_7 MON_7
+  MON_8,
+#define MON_8 MON_8
+  MON_9,
+#define MON_9 MON_9
+  MON_10,
+#define MON_10 MON_10
+  MON_11,
+#define MON_11 MON_11
+  MON_12,
+#define MON_12 MON_12
+
+/* abbreviated month names */
+  ABMON_1,
+#define ABMON_1 ABMON_1
+  ABMON_2,
+#define ABMON_2 ABMON_2
+  ABMON_3,
+#define ABMON_3 ABMON_3
+  ABMON_4,
+#define ABMON_4 ABMON_4
+  ABMON_5,
+#define ABMON_5 ABMON_5
+  ABMON_6,
+#define ABMON_6 ABMON_6
+  ABMON_7,
+#define ABMON_7 ABMON_7
+  ABMON_8,
+#define ABMON_8 ABMON_8
+  ABMON_9,
+#define ABMON_9 ABMON_9
+  ABMON_10,
+#define ABMON_10 ABMON_10
+  ABMON_11,
+#define ABMON_11 ABMON_11
+  ABMON_12,
+#define ABMON_12 ABMON_12
+
+  ERA,				/* era description segments */
+#define ERA ERA
+  ERA_D_FMT,			/* era date format string */
+#define ERA_D_FMT ERA_D_FMT
+  ERA_D_T_FMT,			/* era date and time format string */
+#define ERA_D_T_FMT ERA_D_T_FMT
+  ERA_T_FMT,			/* era time format string */
+#define ERA_T_FMT ERA_T_FMT
+  ALT_DIGITS,			/* alternative symbols for digits */
+#define ALT_DIGITS ALT_DIGITS
+
+  RADIXCHAR,			/* radix char */
+#define RADIXCHAR RADIXCHAR
+  THOUSEP,			/* separator for thousands */
+#define THOUSEP THOUSEP
+
+  YESEXPR,			/* affirmative response expression */
+#define YESEXPR YESEXPR
+  NOEXPR,			/* negative response expression */
+#define NOEXPR NOEXPR
+  YESSTR,			/* affirmative response for yes/no queries */
+#define YESSTR YESSTR
+  NOSTR,			/* negative response for yes/no queries */
+#define NOSTR NOSTR
+
+  CRNCYSTR,			/* currency symbol */
+#define CRNCYSTR CRNCYSTR
+
+  D_MD_ORDER,			/* month/day order (BSD extension) */
+#define D_MD_ORDER D_MD_ORDER
+
+  _NL_TIME_DATE_FMT = 84,	/* date fmt used by date(1) (GNU extension) */
+#define _DATE_FMT _NL_TIME_DATE_FMT
+
+#ifdef __HAVE_LOCALE_INFO__
+  _NL_CTYPE_MB_CUR_MAX,
+  _NL_MESSAGES_CODESET,
+
+#ifdef __HAVE_LOCALE_INFO_EXTENDED__
+
+  /* NOTE:
+  
+     Always maintain the order and position of existing entries!
+     Always append new entry to the list, prior to the definition
+     of _NL_LOCALE_EXTENDED_LAST_ENTRY. */
+
+  _NL_LOCALE_EXTENDED_FIRST_ENTRY,
+
+  _NL_CTYPE_OUTDIGITS0_MB,
+  _NL_CTYPE_OUTDIGITS1_MB,
+  _NL_CTYPE_OUTDIGITS2_MB,
+  _NL_CTYPE_OUTDIGITS3_MB,
+  _NL_CTYPE_OUTDIGITS4_MB,
+  _NL_CTYPE_OUTDIGITS5_MB,
+  _NL_CTYPE_OUTDIGITS6_MB,
+  _NL_CTYPE_OUTDIGITS7_MB,
+  _NL_CTYPE_OUTDIGITS8_MB,
+  _NL_CTYPE_OUTDIGITS9_MB,
+  _NL_CTYPE_OUTDIGITS0_WC,
+  _NL_CTYPE_OUTDIGITS1_WC,
+  _NL_CTYPE_OUTDIGITS2_WC,
+  _NL_CTYPE_OUTDIGITS3_WC,
+  _NL_CTYPE_OUTDIGITS4_WC,
+  _NL_CTYPE_OUTDIGITS5_WC,
+  _NL_CTYPE_OUTDIGITS6_WC,
+  _NL_CTYPE_OUTDIGITS7_WC,
+  _NL_CTYPE_OUTDIGITS8_WC,
+  _NL_CTYPE_OUTDIGITS9_WC,
+
+  _NL_TIME_CODESET,
+  _NL_TIME_WMON_1,
+  _NL_TIME_WMON_2,
+  _NL_TIME_WMON_3,
+  _NL_TIME_WMON_4,
+  _NL_TIME_WMON_5,
+  _NL_TIME_WMON_6,
+  _NL_TIME_WMON_7,
+  _NL_TIME_WMON_8,
+  _NL_TIME_WMON_9,
+  _NL_TIME_WMON_10,
+  _NL_TIME_WMON_11,
+  _NL_TIME_WMON_12,
+  _NL_TIME_WMONTH_1,
+  _NL_TIME_WMONTH_2,
+  _NL_TIME_WMONTH_3,
+  _NL_TIME_WMONTH_4,
+  _NL_TIME_WMONTH_5,
+  _NL_TIME_WMONTH_6,
+  _NL_TIME_WMONTH_7,
+  _NL_TIME_WMONTH_8,
+  _NL_TIME_WMONTH_9,
+  _NL_TIME_WMONTH_10,
+  _NL_TIME_WMONTH_11,
+  _NL_TIME_WMONTH_12,
+  _NL_TIME_WWDAY_1,
+  _NL_TIME_WWDAY_2,
+  _NL_TIME_WWDAY_3,
+  _NL_TIME_WWDAY_4,
+  _NL_TIME_WWDAY_5,
+  _NL_TIME_WWDAY_6,
+  _NL_TIME_WWDAY_7,
+  _NL_TIME_WWEEKDAY_1,
+  _NL_TIME_WWEEKDAY_2,
+  _NL_TIME_WWEEKDAY_3,
+  _NL_TIME_WWEEKDAY_4,
+  _NL_TIME_WWEEKDAY_5,
+  _NL_TIME_WWEEKDAY_6,
+  _NL_TIME_WWEEKDAY_7,
+  _NL_TIME_WT_FMT,
+  _NL_TIME_WD_FMT,
+  _NL_TIME_WD_T_FMT,
+  _NL_TIME_WAM_STR,
+  _NL_TIME_WPM_STR,
+  _NL_TIME_WDATE_FMT,
+  _NL_TIME_WT_FMT_AMPM,
+  _NL_TIME_WERA,
+  _NL_TIME_WERA_D_FMT,
+  _NL_TIME_WERA_D_T_FMT,
+  _NL_TIME_WERA_T_FMT,
+  _NL_TIME_WALT_DIGITS,
+
+  _NL_NUMERIC_CODESET,
+  _NL_NUMERIC_GROUPING,
+  _NL_NUMERIC_DECIMAL_POINT_WC,
+  _NL_NUMERIC_THOUSANDS_SEP_WC,
+
+  _NL_MONETARY_INT_CURR_SYMBOL,
+  _NL_MONETARY_CURRENCY_SYMBOL,
+  _NL_MONETARY_MON_DECIMAL_POINT,
+  _NL_MONETARY_MON_THOUSANDS_SEP,
+  _NL_MONETARY_MON_GROUPING,
+  _NL_MONETARY_POSITIVE_SIGN,
+  _NL_MONETARY_NEGATIVE_SIGN,
+  _NL_MONETARY_INT_FRAC_DIGITS,
+  _NL_MONETARY_FRAC_DIGITS,
+  _NL_MONETARY_P_CS_PRECEDES,
+  _NL_MONETARY_P_SEP_BY_SPACE,
+  _NL_MONETARY_N_CS_PRECEDES,
+  _NL_MONETARY_N_SEP_BY_SPACE,
+  _NL_MONETARY_P_SIGN_POSN,
+  _NL_MONETARY_N_SIGN_POSN,
+  _NL_MONETARY_INT_P_CS_PRECEDES,
+  _NL_MONETARY_INT_P_SEP_BY_SPACE,
+  _NL_MONETARY_INT_N_CS_PRECEDES,
+  _NL_MONETARY_INT_N_SEP_BY_SPACE,
+  _NL_MONETARY_INT_P_SIGN_POSN,
+  _NL_MONETARY_INT_N_SIGN_POSN,
+  _NL_MONETARY_CODESET,
+  _NL_MONETARY_WINT_CURR_SYMBOL,
+  _NL_MONETARY_WCURRENCY_SYMBOL,
+  _NL_MONETARY_WMON_DECIMAL_POINT,
+  _NL_MONETARY_WMON_THOUSANDS_SEP,
+  _NL_MONETARY_WPOSITIVE_SIGN,
+  _NL_MONETARY_WNEGATIVE_SIGN,
+
+  _NL_MESSAGES_WYESEXPR,
+  _NL_MESSAGES_WNOEXPR,
+  _NL_MESSAGES_WYESSTR,
+  _NL_MESSAGES_WNOSTR,
+
+  _NL_COLLATE_CODESET,
+
+  /* This MUST be the last entry since it's used to check for an array
+     index in nl_langinfo(). */
+  _NL_LOCALE_EXTENDED_LAST_ENTRY
+
+#endif /* __HAVE_LOCALE_INFO_EXTENDED__ */
+#endif /* __HAVE_LOCALE_INFO__ */
+
+};
+
+__BEGIN_DECLS
+char	*nl_langinfo(nl_item);
+__END_DECLS
+
+#endif /* !_LANGINFO_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/libgen.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/libgen.h
new file mode 100644
index 00000000..abfab0e5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/libgen.h
@@ -0,0 +1,23 @@
+/*
+ * libgen.h - defined by XPG4
+ */
+
+#ifndef _LIBGEN_H_
+#define _LIBGEN_H_
+
+#include "_ansi.h"
+#include <sys/reent.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+char      *_EXFUN(basename,     (char *));
+char      *_EXFUN(dirname,     (char *));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _LIBGEN_H_ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/limits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/limits.h
new file mode 100644
index 00000000..19868a6a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/limits.h
@@ -0,0 +1,146 @@
+#ifndef _LIBC_LIMITS_H_
+# define _LIBC_LIMITS_H_	1
+
+#include <newlib.h>
+
+# ifdef _MB_LEN_MAX
+#  define MB_LEN_MAX	_MB_LEN_MAX
+# else
+#  define MB_LEN_MAX    1
+# endif
+
+/* Maximum number of positional arguments, if _WANT_IO_POS_ARGS.  */
+# ifndef NL_ARGMAX
+#  define NL_ARGMAX 32
+# endif
+
+/* if do not have #include_next support, then we
+   have to define the limits here. */
+# if !defined __GNUC__ || __GNUC__ < 2
+
+#  ifndef _LIMITS_H
+#   define _LIMITS_H	1
+
+#   include <sys/config.h>
+
+/* Number of bits in a `char'.  */
+#   undef CHAR_BIT
+#   define CHAR_BIT 8
+
+/* Minimum and maximum values a `signed char' can hold.  */
+#   undef SCHAR_MIN
+#   define SCHAR_MIN (-128)
+#   undef SCHAR_MAX
+#   define SCHAR_MAX 127
+
+/* Maximum value an `unsigned char' can hold.  (Minimum is 0).  */
+#   undef UCHAR_MAX
+#   define UCHAR_MAX 255
+
+/* Minimum and maximum values a `char' can hold.  */
+#   ifdef __CHAR_UNSIGNED__
+#    undef CHAR_MIN
+#    define CHAR_MIN 0
+#    undef CHAR_MAX
+#    define CHAR_MAX 255
+#   else
+#    undef CHAR_MIN
+#    define CHAR_MIN (-128)
+#    undef CHAR_MAX
+#    define CHAR_MAX 127
+#   endif
+
+/* Minimum and maximum values a `signed short int' can hold.  */
+#   undef SHRT_MIN
+/* For the sake of 16 bit hosts, we may not use -32768 */
+#   define SHRT_MIN (-32767-1)
+#   undef SHRT_MAX
+#   define SHRT_MAX 32767
+
+/* Maximum value an `unsigned short int' can hold.  (Minimum is 0).  */
+#   undef USHRT_MAX
+#   define USHRT_MAX 65535
+
+/* Minimum and maximum values a `signed int' can hold.  */
+#   ifndef __INT_MAX__
+#    define __INT_MAX__ 2147483647
+#   endif
+#   undef INT_MIN
+#   define INT_MIN (-INT_MAX-1)
+#   undef INT_MAX
+#   define INT_MAX __INT_MAX__
+
+/* Maximum value an `unsigned int' can hold.  (Minimum is 0).  */
+#   undef UINT_MAX
+#   define UINT_MAX (INT_MAX * 2U + 1)
+
+/* Minimum and maximum values a `signed long int' can hold.
+   (Same as `int').  */
+#   ifndef __LONG_MAX__
+#    if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) || defined (__sparcv9)
+#     define __LONG_MAX__ 9223372036854775807L
+#    else
+#     define __LONG_MAX__ 2147483647L
+#    endif /* __alpha__ || sparc64 */
+#   endif
+#   undef LONG_MIN
+#   define LONG_MIN (-LONG_MAX-1)
+#   undef LONG_MAX
+#   define LONG_MAX __LONG_MAX__
+
+/* Maximum value an `unsigned long int' can hold.  (Minimum is 0).  */
+#   undef ULONG_MAX
+#   define ULONG_MAX (LONG_MAX * 2UL + 1)
+
+#   ifndef __LONG_LONG_MAX__
+#    define __LONG_LONG_MAX__ 9223372036854775807LL
+#   endif
+
+#   if defined (__STDC_VERSION__) && __STDC_VERSION__ >= 199901L
+/* Minimum and maximum values a `signed long long int' can hold.  */
+#    undef LLONG_MIN
+#    define LLONG_MIN (-LLONG_MAX-1)
+#    undef LLONG_MAX
+#    define LLONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+#    undef ULLONG_MAX
+#    define ULLONG_MAX (LLONG_MAX * 2ULL + 1)
+#   endif
+
+#  if defined (__GNU_LIBRARY__) ? defined (__USE_GNU) : !defined (__STRICT_ANSI__)
+/* Minimum and maximum values a `signed long long int' can hold.  */
+#    undef LONG_LONG_MIN
+#    define LONG_LONG_MIN (-LONG_LONG_MAX-1)
+#    undef LONG_LONG_MAX
+#    define LONG_LONG_MAX __LONG_LONG_MAX__
+
+/* Maximum value an `unsigned long long int' can hold.  (Minimum is 0).  */
+#    undef ULONG_LONG_MAX
+#    define ULONG_LONG_MAX (LONG_LONG_MAX * 2ULL + 1)
+#   endif
+
+#  endif /* _LIMITS_H  */
+# endif	 /* GCC 2.  */
+
+#endif	 /* !_LIBC_LIMITS_H_ */
+
+#if defined __GNUC__ && !defined _GCC_LIMITS_H_
+/* `_GCC_LIMITS_H_' is what GCC's file defines.  */
+# include_next <limits.h>
+#endif /* __GNUC__ && !_GCC_LIMITS_H_ */
+
+#ifndef _POSIX2_RE_DUP_MAX
+/* The maximum number of repeated occurrences of a regular expression
+ *    permitted when using the interval notation `\{M,N\}'.  */
+#define _POSIX2_RE_DUP_MAX              255
+#endif /* _POSIX2_RE_DUP_MAX  */
+
+#ifndef ARG_MAX
+#define ARG_MAX		4096
+#endif
+
+#ifndef PATH_MAX
+#define PATH_MAX	4096
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/locale.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/locale.h
new file mode 100644
index 00000000..cbd658e4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/locale.h
@@ -0,0 +1,64 @@
+/*
+	locale.h
+	Values appropriate for the formatting of monetary and other
+	numberic quantities.
+*/
+
+#ifndef _LOCALE_H_
+#define _LOCALE_H_
+
+#include "_ansi.h"
+
+#define __need_NULL
+#include <stddef.h>
+
+#define LC_ALL	    0
+#define LC_COLLATE  1
+#define LC_CTYPE    2
+#define LC_MONETARY 3
+#define LC_NUMERIC  4
+#define LC_TIME     5
+#define LC_MESSAGES 6
+
+_BEGIN_STD_C
+
+struct lconv
+{
+  char *decimal_point;
+  char *thousands_sep;
+  char *grouping;
+  char *int_curr_symbol;
+  char *currency_symbol;
+  char *mon_decimal_point;
+  char *mon_thousands_sep;
+  char *mon_grouping;
+  char *positive_sign;
+  char *negative_sign;
+  char int_frac_digits;
+  char frac_digits;
+  char p_cs_precedes;
+  char p_sep_by_space;
+  char n_cs_precedes;
+  char n_sep_by_space;
+  char p_sign_posn;
+  char n_sign_posn;
+  char int_n_cs_precedes;
+  char int_n_sep_by_space;
+  char int_n_sign_posn;
+  char int_p_cs_precedes;
+  char int_p_sep_by_space;
+  char int_p_sign_posn;
+};
+
+#ifndef _REENT_ONLY
+char *_EXFUN(setlocale,(int category, const char *locale));
+struct lconv *_EXFUN(localeconv,(void));
+#endif
+
+struct _reent;
+char *_EXFUN(_setlocale_r,(struct _reent *, int category, const char *locale));
+struct lconv *_EXFUN(_localeconv_r,(struct _reent *));
+
+_END_STD_C
+
+#endif /* _LOCALE_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_default_types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_default_types.h
new file mode 100644
index 00000000..34ba4e09
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_default_types.h
@@ -0,0 +1,120 @@
+/*
+ *  $Id: _default_types.h,v 1.3 2012/10/16 18:45:23 corinna Exp $
+ */
+
+#ifndef _MACHINE__DEFAULT_TYPES_H
+#define _MACHINE__DEFAULT_TYPES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/*
+ * Guess on types by examining *_MIN / *_MAX defines.
+ */
+#if __GNUC_PREREQ (3, 3)
+/* GCC >= 3.3.0 has __<val>__ implicitly defined. */
+#define __EXP(x) __##x##__
+#else
+/* Fall back to POSIX versions from <limits.h> */
+#define __EXP(x) x
+#include <limits.h>
+#endif
+
+#if __EXP(SCHAR_MAX) == 0x7f
+typedef signed char __int8_t ;
+typedef unsigned char __uint8_t ;
+#define ___int8_t_defined 1
+#endif
+
+#if __EXP(INT_MAX) == 0x7fff
+typedef signed int __int16_t;
+typedef unsigned int __uint16_t;
+#define ___int16_t_defined 1
+#elif __EXP(SHRT_MAX) == 0x7fff
+typedef signed short __int16_t;
+typedef unsigned short __uint16_t;
+#define ___int16_t_defined 1
+#elif __EXP(SCHAR_MAX) == 0x7fff
+typedef signed char __int16_t;
+typedef unsigned char __uint16_t;
+#define ___int16_t_defined 1
+#endif
+
+#if ___int16_t_defined
+typedef __int16_t __int_least16_t;
+typedef __uint16_t __uint_least16_t;
+#define ___int_least16_t_defined 1
+
+#if !___int8_t_defined
+typedef __int16_t __int_least8_t;
+typedef __uint16_t __uint_least8_t;
+#define ___int_least8_t_defined 1
+#endif
+#endif
+
+#if __EXP(INT_MAX) == 0x7fffffffL
+typedef signed int __int32_t;
+typedef unsigned int __uint32_t;
+#define ___int32_t_defined 1
+#elif __EXP(LONG_MAX) == 0x7fffffffL
+typedef signed long __int32_t;
+typedef unsigned long __uint32_t;
+#define ___int32_t_defined 1
+#elif __EXP(SHRT_MAX) == 0x7fffffffL
+typedef signed short __int32_t;
+typedef unsigned short __uint32_t;
+#define ___int32_t_defined 1
+#elif __EXP(SCHAR_MAX) == 0x7fffffffL
+typedef signed char __int32_t;
+typedef unsigned char __uint32_t;
+#define ___int32_t_defined 1
+#endif
+
+#if ___int32_t_defined
+typedef __int32_t __int_least32_t;
+typedef __uint32_t __uint_least32_t;
+#define ___int_least32_t_defined 1
+
+#if !___int8_t_defined
+typedef __int32_t __int_least8_t;
+typedef __uint32_t __uint_least8_t;
+#define ___int_least8_t_defined 1
+#endif
+#if !___int16_t_defined
+typedef __int32_t __int_least16_t;
+typedef __uint32_t __uint_least16_t;
+#define ___int_least16_t_defined 1
+#endif
+#endif
+
+#if __EXP(LONG_MAX) > 0x7fffffff
+typedef signed long __int64_t;
+typedef unsigned long __uint64_t;
+#define ___int64_t_defined 1
+
+/* GCC has __LONG_LONG_MAX__ */
+#elif  defined(__LONG_LONG_MAX__) && (__LONG_LONG_MAX__ > 0x7fffffff)
+typedef signed long long __int64_t;
+typedef unsigned long long __uint64_t;
+#define ___int64_t_defined 1
+
+/* POSIX mandates LLONG_MAX in <limits.h> */
+#elif  defined(LLONG_MAX) && (LLONG_MAX > 0x7fffffff)
+typedef signed long long __int64_t;
+typedef unsigned long long __uint64_t;
+#define ___int64_t_defined 1
+
+#elif  __EXP(INT_MAX) > 0x7fffffff
+typedef signed int __int64_t;
+typedef unsigned int __uint64_t;
+#define ___int64_t_defined 1
+#endif
+
+#undef __EXP
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _MACHINE__DEFAULT_TYPES_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_types.h
new file mode 100644
index 00000000..18f96d5f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/_types.h
@@ -0,0 +1,8 @@
+/*
+ *  $Id: _types.h,v 1.3 2007/09/07 21:16:25 jjohnstn Exp $
+ */
+
+#ifndef _MACHINE__TYPES_H
+#define _MACHINE__TYPES_H
+#include <machine/_default_types.h>
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ansi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ansi.h
new file mode 100644
index 00000000..737b6d06
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ansi.h
@@ -0,0 +1 @@
+/* dummy header file to support BSD compiler */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/endian.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/endian.h
new file mode 100644
index 00000000..07ebc8f6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/endian.h
@@ -0,0 +1,20 @@
+#ifndef __MACHINE_ENDIAN_H__
+
+#include <sys/config.h>
+
+#ifndef BIG_ENDIAN
+#define BIG_ENDIAN 4321
+#endif
+#ifndef LITTLE_ENDIAN
+#define LITTLE_ENDIAN 1234
+#endif
+
+#ifndef BYTE_ORDER
+#if defined(__IEEE_LITTLE_ENDIAN) || defined(__IEEE_BYTES_LITTLE_ENDIAN)
+#define BYTE_ORDER LITTLE_ENDIAN
+#else
+#define BYTE_ORDER BIG_ENDIAN
+#endif
+#endif
+
+#endif /* __MACHINE_ENDIAN_H__ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/fastmath.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/fastmath.h
new file mode 100644
index 00000000..b13befa2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/fastmath.h
@@ -0,0 +1,100 @@
+#ifdef __sysvnecv70_target
+double EXFUN(fast_sin,(double));
+double EXFUN(fast_cos,(double));
+double EXFUN(fast_tan,(double));
+
+double EXFUN(fast_asin,(double));
+double EXFUN(fast_acos,(double));
+double EXFUN(fast_atan,(double));
+
+double EXFUN(fast_sinh,(double));
+double EXFUN(fast_cosh,(double));
+double EXFUN(fast_tanh,(double));
+
+double EXFUN(fast_asinh,(double));
+double EXFUN(fast_acosh,(double));
+double EXFUN(fast_atanh,(double));
+
+double EXFUN(fast_abs,(double));
+double EXFUN(fast_sqrt,(double));
+double EXFUN(fast_exp2,(double));
+double EXFUN(fast_exp10,(double));
+double EXFUN(fast_expe,(double));
+double EXFUN(fast_log10,(double));
+double EXFUN(fast_log2,(double));
+double EXFUN(fast_loge,(double));
+
+
+#define	sin(x)		fast_sin(x)
+#define	cos(x)		fast_cos(x)
+#define	tan(x)		fast_tan(x)
+#define	asin(x)		fast_asin(x)
+#define	acos(x)		fast_acos(x)
+#define	atan(x)		fast_atan(x)
+#define	sinh(x)		fast_sinh(x)
+#define	cosh(x)		fast_cosh(x)
+#define	tanh(x)		fast_tanh(x)
+#define	asinh(x)	fast_asinh(x)
+#define	acosh(x)	fast_acosh(x)
+#define	atanh(x)	fast_atanh(x)
+#define	abs(x)		fast_abs(x)
+#define	sqrt(x)		fast_sqrt(x)
+#define	exp2(x)		fast_exp2(x)
+#define	exp10(x)	fast_exp10(x)
+#define	expe(x)		fast_expe(x)
+#define	log10(x)	fast_log10(x)
+#define	log2(x)		fast_log2(x)
+#define	loge(x)		fast_loge(x)
+
+#ifdef _HAVE_STDC
+/* These functions are in assembler, they really do take floats. This
+   can only be used with a real ANSI compiler */
+
+float EXFUN(fast_sinf,(float));
+float EXFUN(fast_cosf,(float));
+float EXFUN(fast_tanf,(float));
+
+float EXFUN(fast_asinf,(float));
+float EXFUN(fast_acosf,(float));
+float EXFUN(fast_atanf,(float));
+
+float EXFUN(fast_sinhf,(float));
+float EXFUN(fast_coshf,(float));
+float EXFUN(fast_tanhf,(float));
+
+float EXFUN(fast_asinhf,(float));
+float EXFUN(fast_acoshf,(float));
+float EXFUN(fast_atanhf,(float));
+
+float EXFUN(fast_absf,(float));
+float EXFUN(fast_sqrtf,(float));
+float EXFUN(fast_exp2f,(float));
+float EXFUN(fast_exp10f,(float));
+float EXFUN(fast_expef,(float));
+float EXFUN(fast_log10f,(float));
+float EXFUN(fast_log2f,(float));
+float EXFUN(fast_logef,(float));
+#define	sinf(x)		fast_sinf(x)
+#define	cosf(x)		fast_cosf(x)
+#define	tanf(x)		fast_tanf(x)
+#define	asinf(x)	fast_asinf(x)
+#define	acosf(x)	fast_acosf(x)
+#define	atanf(x)	fast_atanf(x)
+#define	sinhf(x)	fast_sinhf(x)
+#define	coshf(x)	fast_coshf(x)
+#define	tanhf(x)	fast_tanhf(x)
+#define	asinhf(x)	fast_asinhf(x)
+#define	acoshf(x)	fast_acoshf(x)
+#define	atanhf(x)	fast_atanhf(x)
+#define	absf(x)		fast_absf(x)
+#define	sqrtf(x)	fast_sqrtf(x)
+#define	exp2f(x)	fast_exp2f(x)
+#define	exp10f(x)	fast_exp10f(x)
+#define	expef(x)	fast_expef(x)
+#define	log10f(x)	fast_log10f(x)
+#define	log2f(x)	fast_log2f(x)
+#define	logef(x)	fast_logef(x)
+#endif
+/* Override the functions defined in math.h */
+#endif /* __sysvnecv70_target */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ieeefp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ieeefp.h
new file mode 100644
index 00000000..5742f43c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/ieeefp.h
@@ -0,0 +1,405 @@
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+
+/* This file can define macros to choose variations of the IEEE float
+   format:
+
+   _FLT_LARGEST_EXPONENT_IS_NORMAL
+
+	Defined if the float format uses the largest exponent for finite
+	numbers rather than NaN and infinity representations.  Such a
+	format cannot represent NaNs or infinities at all, but it's FLT_MAX
+	is twice the IEEE value.
+
+   _FLT_NO_DENORMALS
+
+	Defined if the float format does not support IEEE denormals.  Every
+	float with a zero exponent is taken to be a zero representation.
+ 
+   ??? At the moment, there are no equivalent macros above for doubles and
+   the macros are not fully supported by --enable-newlib-hw-fp.
+
+   __IEEE_BIG_ENDIAN
+
+        Defined if the float format is big endian.  This is mutually exclusive
+        with __IEEE_LITTLE_ENDIAN.
+
+   __IEEE_LITTLE_ENDIAN
+ 
+        Defined if the float format is little endian.  This is mutually exclusive
+        with __IEEE_BIG_ENDIAN.
+
+   Note that one of __IEEE_BIG_ENDIAN or __IEEE_LITTLE_ENDIAN must be specified for a
+   platform or error will occur.
+
+   __IEEE_BYTES_LITTLE_ENDIAN
+
+        This flag is used in conjunction with __IEEE_BIG_ENDIAN to describe a situation 
+	whereby multiple words of an IEEE floating point are in big endian order, but the
+	words themselves are little endian with respect to the bytes.
+
+   _DOUBLE_IS_32BITS 
+
+        This is used on platforms that support double by using the 32-bit IEEE
+        float type.
+
+   _FLOAT_ARG
+
+        This represents what type a float arg is passed as.  It is used when the type is
+        not promoted to double.
+	
+*/
+
+
+#if defined(__tc32__)
+#  define __IEEE_LITTLE_ENDIAN
+#endif
+
+
+#if (defined(__arm__) || defined(__thumb__)) && !defined(__MAVERICK__)
+/* ARM traditionally used big-endian words; and within those words the
+   byte ordering was big or little endian depending upon the target.
+   Modern floating-point formats are naturally ordered; in this case
+   __VFP_FP__ will be defined, even if soft-float.  */
+#ifdef __VFP_FP__
+# ifdef __ARMEL__
+#  define __IEEE_LITTLE_ENDIAN
+# else
+#  define __IEEE_BIG_ENDIAN
+# endif
+#else
+# define __IEEE_BIG_ENDIAN
+# ifdef __ARMEL__
+#  define __IEEE_BYTES_LITTLE_ENDIAN
+# endif
+#endif
+#endif
+
+#if defined (__aarch64__)
+#if defined (__AARCH64EL__)
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#endif
+
+#ifdef __epiphany__
+#define __IEEE_LITTLE_ENDIAN
+#define Sudden_Underflow 1
+#endif
+
+#ifdef __hppa__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __SPU__
+#define __IEEE_BIG_ENDIAN
+
+#define isfinite(__y) \
+	(__extension__ ({int __cy; \
+		(sizeof (__y) == sizeof (float))  ? (1) : \
+		(__cy = fpclassify(__y)) != FP_INFINITE && __cy != FP_NAN;}))
+
+#define isinf(__x) ((sizeof (__x) == sizeof (float))  ?  (0) : __isinfd(__x))
+#define isnan(__x) ((sizeof (__x) == sizeof (float))  ?  (0) : __isnand(__x))
+
+/*
+ * Macros for use in ieeefp.h. We can't just define the real ones here
+ * (like those above) as we have name space issues when this is *not*
+ * included via generic the ieeefp.h.
+ */
+#define __ieeefp_isnanf(x)	0
+#define __ieeefp_isinff(x)	0
+#define __ieeefp_finitef(x)	1
+#endif
+
+#ifdef __sparc__
+#ifdef __LITTLE_ENDIAN_DATA__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#endif
+
+#if defined(__m68k__) || defined(__mc68000__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#if defined(__mc68hc11__) || defined(__mc68hc12__) || defined(__mc68hc1x__)
+#define __IEEE_BIG_ENDIAN
+#ifdef __HAVE_SHORT_DOUBLE__
+# define _DOUBLE_IS_32BITS
+#endif
+#endif
+
+#if defined (__H8300__) || defined (__H8300H__) || defined (__H8300S__) || defined (__H8500__) || defined (__H8300SX__)
+#define __IEEE_BIG_ENDIAN
+#define _FLOAT_ARG float
+#define _DOUBLE_IS_32BITS
+#endif
+
+#if defined (__xc16x__) || defined (__xc16xL__) || defined (__xc16xS__)
+#define __IEEE_LITTLE_ENDIAN
+#define _FLOAT_ARG float
+#define _DOUBLE_IS_32BITS
+#endif
+
+
+#ifdef __sh__
+#ifdef __LITTLE_ENDIAN__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#if defined(__SH2E__) || defined(__SH3E__) || defined(__SH4_SINGLE_ONLY__) || defined(__SH2A_SINGLE_ONLY__)
+#define _DOUBLE_IS_32BITS
+#endif
+#endif
+
+#ifdef _AM29K
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef _WIN32
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __i386__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __i960__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __lm32__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __M32R__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#if defined(_C4x) || defined(_C3x)
+#define __IEEE_BIG_ENDIAN
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __TMS320C6X__
+#ifdef _BIG_ENDIAN
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __TIC80__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __MIPSEL__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#ifdef __MIPSEB__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __MMIX__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __D30V__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+/* necv70 was __IEEE_LITTLE_ENDIAN. */
+
+#ifdef __W65__
+#define __IEEE_LITTLE_ENDIAN
+#define _DOUBLE_IS_32BITS
+#endif
+
+#if defined(__Z8001__) || defined(__Z8002__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __m88k__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mn10300__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __mn10200__
+#define __IEEE_LITTLE_ENDIAN
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __v800
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __v850
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __D10V__
+#define __IEEE_BIG_ENDIAN
+#if __DOUBLE__ == 32
+#define _DOUBLE_IS_32BITS
+#endif
+#endif
+
+#ifdef __PPC__
+#if (defined(_BIG_ENDIAN) && _BIG_ENDIAN) || (defined(_AIX) && _AIX)
+#define __IEEE_BIG_ENDIAN
+#else
+#if (defined(_LITTLE_ENDIAN) && _LITTLE_ENDIAN) || (defined(__sun__) && __sun__) || (defined(_WIN32) && _WIN32)
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+#endif
+
+#ifdef __xstormy16__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __arc__
+#ifdef __big_endian__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __CRX__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __fr30__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mcore__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __mt__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __frv__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __moxie__
+#ifdef __MOXIE_BIG_ENDIAN__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __ia64__
+#ifdef __BIG_ENDIAN__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+#endif
+
+#ifdef __AVR__
+#define __IEEE_LITTLE_ENDIAN
+#define _DOUBLE_IS_32BITS
+#endif
+
+#if defined(__or32__) || defined(__or1k__) || defined(__or16__)
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __IP2K__
+#define __IEEE_BIG_ENDIAN
+#define __SMALL_BITFIELDS
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __iq2000__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __MAVERICK__
+#ifdef __ARMEL__
+#  define __IEEE_LITTLE_ENDIAN
+#else  /* must be __ARMEB__ */
+#  define __IEEE_BIG_ENDIAN
+#endif /* __ARMEL__ */
+#endif /* __MAVERICK__ */
+
+#ifdef __m32c__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS
+#endif
+
+#ifdef __CRIS__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __BFIN__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __x86_64__
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifdef __mep__
+#ifdef __LITTLE_ENDIAN__
+#define __IEEE_LITTLE_ENDIAN
+#else
+#define __IEEE_BIG_ENDIAN
+#endif
+#endif
+
+#ifdef __MICROBLAZE__
+#define __IEEE_BIG_ENDIAN
+#endif
+
+#ifdef __RL78__
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS	/* 16 Bit INT */
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __RX__
+
+#ifdef __RX_BIG_ENDIAN__
+#define __IEEE_BIG_ENDIAN
+#else
+#define __IEEE_LITTLE_ENDIAN
+#endif
+
+#ifndef __RX_64BIT_DOUBLES__
+#define _DOUBLE_IS_32BITS
+#endif
+
+#ifdef __RX_16BIT_INTS__
+#define __SMALL_BITFIELDS
+#endif
+
+#endif
+
+#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
+#define __IEEE_LITTLE_ENDIAN
+#define __SMALL_BITFIELDS	/* 16 Bit INT */
+#endif
+
+#ifndef __IEEE_BIG_ENDIAN
+#ifndef __IEEE_LITTLE_ENDIAN
+#error Endianess not declared!!
+#endif /* not __IEEE_LITTLE_ENDIAN */
+#endif /* not __IEEE_BIG_ENDIAN */
+
+#endif /* not __IEEE_LITTLE_ENDIAN */
+#endif /* not __IEEE_BIG_ENDIAN */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/malloc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/malloc.h
new file mode 100644
index 00000000..fdada9ed
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/malloc.h
@@ -0,0 +1,8 @@
+#ifndef	_MACHMALLOC_H_
+#define	_MACHMALLOC_H_
+
+/* place holder so platforms may add malloc.h extensions */
+
+#endif	/* _MACHMALLOC_H_ */
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/param.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/param.h
new file mode 100644
index 00000000..1a2710d1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/param.h
@@ -0,0 +1,10 @@
+/* ARM configuration file; HZ is 100 rather than the default 60 */
+
+#ifndef _MACHINE_PARAM_H
+# define _MACHINE_PARAM_H
+
+# define HZ (100)
+
+#define BYTE_ORDER LITTLE_ENDIAN
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp-dj.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp-dj.h
new file mode 100644
index 00000000..6ca5e652
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp-dj.h
@@ -0,0 +1,43 @@
+/*
+ * Copyright (C) 1991 DJ Delorie
+ * All rights reserved.
+ *
+ * Redistribution, modification, and use in source and binary forms is permitted
+ * provided that the above copyright notice and following paragraph are
+ * duplicated in all such forms.
+ *
+ * This file is distributed WITHOUT ANY WARRANTY; without even the implied
+ * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
+ */
+
+/* Modified to use SETJMP_DJ_H rather than SETJMP_H to avoid
+   conflicting with setjmp.h.  Ian Taylor, Cygnus support, April,
+   1993.  */
+
+#ifndef _SETJMP_DJ_H_
+#define _SETJMP_DJ_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef struct {
+  unsigned long eax;
+  unsigned long ebx;
+  unsigned long ecx;
+  unsigned long edx;
+  unsigned long esi;
+  unsigned long edi;
+  unsigned long ebp;
+  unsigned long esp;
+  unsigned long eip;
+} jmp_buf[1];
+
+extern int setjmp(jmp_buf);
+extern void longjmp(jmp_buf, int);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp.h
new file mode 100644
index 00000000..6e2deb58
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/setjmp.h
@@ -0,0 +1,379 @@
+
+_BEGIN_STD_C
+
+
+#if defined(__tc32__)
+#define _JBLEN 23
+#endif
+
+
+#if defined(__arm__) || defined(__thumb__)
+/*
+ * All callee preserved registers:
+ * v1 - v7, fp, ip, sp, lr, f4, f5, f6, f7
+ */
+#define _JBLEN 23
+#endif
+
+#if defined(__aarch64__)
+#define _JBLEN 22
+#define _JBTYPE long long
+#endif
+
+#if defined(__AVR__)
+#define _JBLEN 24
+#endif
+
+#ifdef __sparc__
+/*
+ * onsstack,sigmask,sp,pc,npc,psr,g1,o0,wbcnt (sigcontext).
+ * All else recovered by under/over(flow) handling.
+ */
+#define	_JBLEN	13
+#endif
+
+#ifdef __BFIN__
+#define _JBLEN  40
+#endif
+
+#ifdef __epiphany__
+/* All callee preserved registers: r4-r10,fp, sp, lr,r15, r32-r39  */
+#define _JBTYPE long long
+#define _JBLEN 10
+#endif
+
+/* necv70 was 9 as well. */
+
+#if defined(__m68k__) || defined(__mc68000__)
+/*
+ * onsstack,sigmask,sp,pc,psl,d2-d7,a2-a6,
+ * fp2-fp7	for 68881.
+ * All else recovered by under/over(flow) handling.
+ */
+#define	_JBLEN	34
+#endif
+
+#if defined(__mc68hc11__) || defined(__mc68hc12__) || defined(__mc68hc1x__)
+/*
+ * D, X, Y are not saved.
+ * Only take into account the pseudo soft registers (max 32).
+ */
+#define _JBLEN  32
+#endif
+
+#if defined(__Z8001__) || defined(__Z8002__)
+/* 16 regs + pc */
+#define _JBLEN 20
+#endif
+
+#ifdef _AM29K
+/*
+ * onsstack,sigmask,sp,pc,npc,psr,g1,o0,wbcnt (sigcontext).
+ * All else recovered by under/over(flow) handling.
+ */
+#define	_JBLEN	9
+#endif
+
+#if defined(__CYGWIN__) && !defined (_JBLEN)
+#define _JBLEN (13 * 4)
+#elif defined (__i386__)
+#if defined(__unix__) || defined(__rtems__)
+# define _JBLEN	9
+#else
+#include "setjmp-dj.h"
+#endif
+#endif
+
+#ifdef __x86_64__
+#define _JBTYPE long long
+#define _JBLEN  8
+#endif
+
+#ifdef __i960__
+#define _JBLEN 35
+#endif
+
+#ifdef __M32R__
+/* Only 8 words are currently needed.  10 gives us some slop if we need
+   to expand.  */
+#define _JBLEN 10
+#endif
+
+#ifdef __mips__
+#ifdef __mips64
+#define _JBTYPE long long
+#endif
+#ifdef __mips_soft_float
+#define _JBLEN 11
+#else
+#define _JBLEN 23
+#endif
+#endif
+
+#ifdef __m88000__
+#define _JBLEN 21
+#endif
+
+#ifdef __H8300__
+#define _JBLEN 5
+#define _JBTYPE int
+#endif
+
+#ifdef __H8300H__
+/* same as H8/300 but registers are twice as big */
+#define _JBLEN 5
+#define _JBTYPE long
+#endif
+
+#if defined (__H8300S__) || defined (__H8300SX__)
+/* same as H8/300 but registers are twice as big */
+#define _JBLEN 5
+#define _JBTYPE long
+#endif
+
+#ifdef __H8500__
+#define _JBLEN 4
+#endif
+
+#ifdef  __sh__
+#if __SH5__
+#define _JBLEN 50
+#define _JBTYPE long long
+#else
+#define _JBLEN 20
+#endif /* __SH5__ */
+#endif
+
+#ifdef  __v800
+#define _JBLEN 28
+#endif
+
+#ifdef __PPC__
+#ifdef __ALTIVEC__
+#define _JBLEN 64
+#else
+#define _JBLEN 32
+#endif
+#define _JBTYPE double
+#endif
+
+#ifdef __MICROBLAZE__
+#define _JBLEN  20
+#define _JBTYPE unsigned int
+#endif
+
+#ifdef __hppa__
+/* %r30, %r2-%r18, %r27, pad, %fr12-%fr15.
+   Note space exists for the FP registers, but they are not
+   saved.  */
+#define _JBLEN 28
+#endif
+
+#if defined(__mn10300__) || defined(__mn10200__)
+#ifdef __AM33_2__
+#define _JBLEN 26
+#else
+/* A guess */
+#define _JBLEN 10
+#endif
+#endif
+
+#ifdef __v850
+/* I think our setjmp is saving 15 regs at the moment.  Gives us one word
+   slop if we need to expand.  */
+#define _JBLEN 16
+#endif
+
+#if defined(_C4x)
+#define _JBLEN 10
+#endif
+#if defined(_C3x)
+#define _JBLEN 9
+#endif
+
+#ifdef __TMS320C6X__
+#define _JBLEN 13
+#endif
+
+#ifdef __TIC80__
+#define _JBLEN 13
+#endif
+
+#ifdef __D10V__
+#define _JBLEN 8
+#endif
+
+#ifdef __D30V__
+#define _JBLEN ((64 /* GPR */ + (2*2) /* ACs */ + 18 /* CRs */) / 2)
+#define _JBTYPE double
+#endif
+
+#ifdef __frv__
+#define _JBLEN (68/2)  /* room for 68 32-bit regs */
+#define _JBTYPE double
+#endif
+
+#ifdef __moxie__
+#define _JBLEN 16
+#endif
+
+#ifdef __CRX__
+#define _JBLEN 9
+#endif
+
+#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
+/* r6, r7, r8, r9, r10, r11, r12 (r12L, r12H), 
+ * r13 (r13L, r13H), ra(raL, raH), sp(spL, spH) */
+#define _JBLEN 14
+#define _JBTYPE unsigned short
+#endif
+
+#ifdef __fr30__
+#define _JBLEN 10
+#endif
+
+#ifdef __iq2000__
+#define _JBLEN 32
+#endif
+
+#ifdef __mcore__
+#define _JBLEN 16
+#endif
+
+#ifdef __MMIX__
+/* Using a layout compatible with GCC's built-in.  */
+#define _JBLEN 5
+#define _JBTYPE unsigned long
+#endif
+
+#ifdef __mt__
+#define _JBLEN 16
+#endif
+
+#ifdef __SPU__
+#define _JBLEN 50 
+#define _JBTYPE __vector signed int
+#endif
+
+#ifdef __xstormy16__
+/* 4 GPRs plus SP plus PC. */
+#define _JBLEN 8
+#endif
+
+#ifdef __mep__
+/* 16 GPRs, pc, hi, lo */
+#define _JBLEN 19
+#endif
+
+#ifdef __CRIS__
+#define _JBLEN 18
+#endif
+
+#ifdef __lm32__
+#define _JBLEN 19
+#endif
+
+#ifdef __m32c__
+#if defined(__r8c_cpu__) || defined(__m16c_cpu__)
+#define _JBLEN (22/2)
+#else
+#define _JBLEN (34/2)
+#endif
+#define _JBTYPE unsigned short
+#endif /* __m32c__ */
+
+#ifdef __RL78__
+/* Three banks of registers, SP, CS, ES, PC */
+#define _JBLEN (8*3+8)
+#define _JBTYPE unsigned char
+#endif
+
+#ifdef __RX__
+#define _JBLEN 0x44
+#endif
+
+#ifdef _JBLEN
+#ifdef _JBTYPE
+typedef	_JBTYPE jmp_buf[_JBLEN];
+#else
+typedef	int jmp_buf[_JBLEN];
+#endif
+#endif
+
+_END_STD_C
+
+#if defined(__CYGWIN__) || defined(__rtems__)
+#include <signal.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* POSIX sigsetjmp/siglongjmp macros */
+#ifdef _JBTYPE
+typedef _JBTYPE sigjmp_buf[_JBLEN+1+(sizeof (sigset_t)/sizeof (_JBTYPE))];
+#else
+typedef int sigjmp_buf[_JBLEN+1+(sizeof (sigset_t)/sizeof (int))];
+#endif
+
+#define _SAVEMASK	_JBLEN
+#define _SIGMASK	(_JBLEN+1)
+
+#ifdef __CYGWIN__
+# define _CYGWIN_WORKING_SIGSETJMP
+#endif
+
+#ifdef _POSIX_THREADS
+#define __SIGMASK_FUNC pthread_sigmask
+#else
+#define __SIGMASK_FUNC sigprocmask
+#endif
+
+#if defined(__GNUC__)
+
+#define sigsetjmp(env, savemask) \
+            __extension__ \
+            ({ \
+              sigjmp_buf *_sjbuf = &(env); \
+              ((*_sjbuf)[_SAVEMASK] = savemask,\
+              __SIGMASK_FUNC (SIG_SETMASK, 0, (sigset_t *)((*_sjbuf) + _SIGMASK)),\
+              setjmp (*_sjbuf)); \
+            })
+
+#define siglongjmp(env, val) \
+            __extension__ \
+            ({ \
+              sigjmp_buf *_sjbuf = &(env); \
+              ((((*_sjbuf)[_SAVEMASK]) ? \
+               __SIGMASK_FUNC (SIG_SETMASK, (sigset_t *)((*_sjbuf) + _SIGMASK), 0)\
+               : 0), \
+               longjmp (*_sjbuf, val)); \
+            })
+
+#else /* !__GNUC__ */
+
+#define sigsetjmp(env, savemask) ((env)[_SAVEMASK] = savemask,\
+               __SIGMASK_FUNC (SIG_SETMASK, 0, (sigset_t *) ((env) + _SIGMASK)),\
+               setjmp (env))
+
+#define siglongjmp(env, val) ((((env)[_SAVEMASK])?\
+               __SIGMASK_FUNC (SIG_SETMASK, (sigset_t *) ((env) + _SIGMASK), 0):0),\
+               longjmp (env, val))
+
+#endif
+
+/* POSIX _setjmp/_longjmp, maintained for XSI compatibility.  These
+   are equivalent to sigsetjmp/siglongjmp when not saving the signal mask.
+   New applications should use sigsetjmp/siglongjmp instead. */
+#ifdef __CYGWIN__
+extern void _longjmp(jmp_buf, int);
+extern int _setjmp(jmp_buf);
+#else
+#define _setjmp(env)		sigsetjmp ((env), 0)
+#define _longjmp(env, val)	siglongjmp ((env), (val))
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* __CYGWIN__ or __rtems__ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/stdlib.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/stdlib.h
new file mode 100644
index 00000000..fa3f3a13
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/stdlib.h
@@ -0,0 +1,8 @@
+#ifndef	_MACHSTDLIB_H_
+#define	_MACHSTDLIB_H_
+
+/* place holder so platforms may add stdlib.h extensions */
+
+#endif	/* _MACHSTDLIB_H_ */
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/termios.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/termios.h
new file mode 100644
index 00000000..41fd4593
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/termios.h
@@ -0,0 +1 @@
+#define __MAX_BAUD  B4000000
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/time.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/time.h
new file mode 100644
index 00000000..06e2ccff
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/time.h
@@ -0,0 +1,19 @@
+#ifndef	_MACHTIME_H_
+#define	_MACHTIME_H_
+
+#if defined(__rtems__)
+#define _CLOCKS_PER_SEC_  sysconf(_SC_CLK_TCK)
+#else  /* !__rtems__ */
+#if defined(__aarch64__) || defined(__arm__) || defined(__thumb__)
+#define _CLOCKS_PER_SEC_ 100
+#endif
+#endif /* !__rtems__ */
+
+#ifdef __SPU__
+#include <sys/types.h>
+int nanosleep (const struct timespec *, struct timespec *);
+#endif
+
+#endif	/* _MACHTIME_H_ */
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/types.h
new file mode 100644
index 00000000..40a75faa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/machine/types.h
@@ -0,0 +1,30 @@
+#ifndef	_MACHTYPES_H_
+#define	_MACHTYPES_H_
+
+/*
+ *  The following section is RTEMS specific and is needed to more
+ *  closely match the types defined in the BSD machine/types.h.
+ *  This is needed to let the RTEMS/BSD TCP/IP stack compile.
+ */
+#if defined(__rtems__)
+#include <machine/_types.h>
+#endif
+
+#define	_CLOCK_T_	unsigned long		/* clock() */
+#define	_TIME_T_	long			/* time() */
+#define _CLOCKID_T_ 	unsigned long
+#define _TIMER_T_   	unsigned long
+
+#ifndef _HAVE_SYSTYPES
+typedef long int __off_t;
+typedef int __pid_t;
+#ifdef __GNUC__
+__extension__ typedef long long int __loff_t;
+#else
+typedef long int __loff_t;
+#endif
+#endif
+
+#endif	/* _MACHTYPES_H_ */
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/malloc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/malloc.h
new file mode 100644
index 00000000..c46357c6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/malloc.h
@@ -0,0 +1,169 @@
+/* malloc.h -- header file for memory routines.  */
+
+#ifndef _INCLUDE_MALLOC_H_
+#define _INCLUDE_MALLOC_H_
+
+#include <_ansi.h>
+#include <sys/reent.h>
+
+#define __need_size_t
+#include <stddef.h>
+
+/* include any machine-specific extensions */
+#include <machine/malloc.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* This version of struct mallinfo must match the one in
+   libc/stdlib/mallocr.c.  */
+
+struct mallinfo {
+  int arena;    /* total space allocated from system */
+  int ordblks;  /* number of non-inuse chunks */
+  int smblks;   /* unused -- always zero */
+  int hblks;    /* number of mmapped regions */
+  int hblkhd;   /* total space in mmapped regions */
+  int usmblks;  /* unused -- always zero */
+  int fsmblks;  /* unused -- always zero */
+  int uordblks; /* total allocated space */
+  int fordblks; /* total non-inuse space */
+  int keepcost; /* top-most, releasable (via malloc_trim) space */
+};	
+
+/* The routines.  */
+
+extern _PTR malloc _PARAMS ((size_t));
+#ifdef __CYGWIN__
+#undef _malloc_r
+#define _malloc_r(r, s) malloc (s)
+#else
+extern _PTR _malloc_r _PARAMS ((struct _reent *, size_t));
+#endif
+
+extern _VOID free _PARAMS ((_PTR));
+#ifdef __CYGWIN__
+#undef _free_r
+#define _free_r(r, p) free (p)
+#else
+extern _VOID _free_r _PARAMS ((struct _reent *, _PTR));
+#endif
+
+extern _PTR realloc _PARAMS ((_PTR, size_t));
+#ifdef __CYGWIN__
+#undef _realloc_r
+#define _realloc_r(r, p, s) realloc (p, s)
+#else
+extern _PTR _realloc_r _PARAMS ((struct _reent *, _PTR, size_t));
+#endif
+
+extern _PTR calloc _PARAMS ((size_t, size_t));
+#ifdef __CYGWIN__
+#undef _calloc_r
+#define _calloc_r(r, s1, s2) calloc (s1, s2);
+#else
+extern _PTR _calloc_r _PARAMS ((struct _reent *, size_t, size_t));
+#endif
+
+extern _PTR memalign _PARAMS ((size_t, size_t));
+#ifdef __CYGWIN__
+#undef _memalign_r
+#define _memalign_r(r, s1, s2) memalign (s1, s2);
+#else
+extern _PTR _memalign_r _PARAMS ((struct _reent *, size_t, size_t));
+#endif
+
+extern struct mallinfo mallinfo _PARAMS ((void));
+#ifdef __CYGWIN__
+#undef _mallinfo_r
+#define _mallinfo_r(r) mallinfo ()
+#else
+extern struct mallinfo _mallinfo_r _PARAMS ((struct _reent *));
+#endif
+
+extern void malloc_stats _PARAMS ((void));
+#ifdef __CYGWIN__
+#undef _malloc_stats_r
+#define _malloc_stats_r(r) malloc_stats ()
+#else
+extern void _malloc_stats_r _PARAMS ((struct _reent *));
+#endif
+
+extern int mallopt _PARAMS ((int, int));
+#ifdef __CYGWIN__
+#undef _mallopt_r
+#define _mallopt_r(i1, i2) mallopt (i1, i2)
+#else
+extern int _mallopt_r _PARAMS ((struct _reent *, int, int));
+#endif
+
+extern size_t malloc_usable_size _PARAMS ((_PTR));
+#ifdef __CYGWIN__
+#undef _malloc_usable_size_r
+#define _malloc_usable_size_r(r, p) malloc_usable_size (p)
+#else
+extern size_t _malloc_usable_size_r _PARAMS ((struct _reent *, _PTR));
+#endif
+
+/* These aren't too useful on an embedded system, but we define them
+   anyhow.  */
+
+extern _PTR valloc _PARAMS ((size_t));
+#ifdef __CYGWIN__
+#undef _valloc_r
+#define _valloc_r(r, s) valloc (s)
+#else
+extern _PTR _valloc_r _PARAMS ((struct _reent *, size_t));
+#endif
+
+extern _PTR pvalloc _PARAMS ((size_t));
+#ifdef __CYGWIN__
+#undef _pvalloc_r
+#define _pvalloc_r(r, s) pvalloc (s)
+#else
+extern _PTR _pvalloc_r _PARAMS ((struct _reent *, size_t));
+#endif
+
+extern int malloc_trim _PARAMS ((size_t));
+#ifdef __CYGWIN__
+#undef _malloc_trim_r
+#define _malloc_trim_r(r, s) malloc_trim (s)
+#else
+extern int _malloc_trim_r _PARAMS ((struct _reent *, size_t));
+#endif
+
+/* A compatibility routine for an earlier version of the allocator.  */
+
+extern _VOID mstats _PARAMS ((char *));
+#ifdef __CYGWIN__
+#undef _mstats_r
+#define _mstats_r(r, p) mstats (p)
+#else
+extern _VOID _mstats_r _PARAMS ((struct _reent *, char *));
+#endif
+
+/* SVID2/XPG mallopt options */
+
+#define M_MXFAST  1    /* UNUSED in this malloc */
+#define M_NLBLKS  2    /* UNUSED in this malloc */
+#define M_GRAIN   3    /* UNUSED in this malloc */
+#define M_KEEP    4    /* UNUSED in this malloc */
+
+/* mallopt options that actually do something */
+  
+#define M_TRIM_THRESHOLD    -1
+#define M_TOP_PAD           -2
+#define M_MMAP_THRESHOLD    -3 
+#define M_MMAP_MAX          -4
+
+#ifndef __CYGWIN__
+/* Some systems provide this, so do too for compatibility.  */
+extern void cfree _PARAMS ((_PTR));
+#endif /* __CYGWIN__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _INCLUDE_MALLOC_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/math.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/math.h
new file mode 100644
index 00000000..606fecfa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/math.h
@@ -0,0 +1,600 @@
+#ifndef  _MATH_H_
+
+#define  _MATH_H_
+
+#include <sys/reent.h>
+#include <machine/ieeefp.h>
+#include "_ansi.h"
+
+_BEGIN_STD_C
+
+/* __dmath, __fmath, and __ldmath are only here for backwards compatibility
+ * in case any code used them.  They are no longer used by Newlib, itself,
+ * other than legacy.  */
+union __dmath
+{
+  double d;
+  __ULong i[2];
+};
+
+union __fmath
+{
+  float f;
+  __ULong i[1];
+};
+
+#if defined(_HAVE_LONG_DOUBLE)
+union __ldmath
+{
+  long double ld;
+  __ULong i[4];
+};
+#endif
+
+/* Natural log of 2 */
+#define _M_LN2        0.693147180559945309417
+
+#if __GNUC_PREREQ (3, 3)
+ /* gcc >= 3.3 implicitly defines builtins for HUGE_VALx values.  */
+
+# ifndef HUGE_VAL
+#  define HUGE_VAL (__builtin_huge_val())
+# endif
+
+# ifndef HUGE_VALF
+#  define HUGE_VALF (__builtin_huge_valf())
+# endif
+
+# ifndef HUGE_VALL
+#  define HUGE_VALL (__builtin_huge_vall())
+# endif
+
+# ifndef INFINITY
+#  define INFINITY (__builtin_inff())
+# endif
+
+# ifndef NAN
+#  define NAN (__builtin_nanf(""))
+# endif
+
+#else /* !gcc >= 3.3  */
+
+ /*      No builtins.  Use fixed defines instead.  (All 3 HUGE plus the INFINITY
+  * and NAN macros are required to be constant expressions.  Using a variable--
+  * even a static const--does not meet this requirement, as it cannot be
+  * evaluated at translation time.)
+  *      The infinities are done using numbers that are far in excess of
+  * something that would be expected to be encountered in a floating-point
+  * implementation.  (A more certain way uses values from float.h, but that is
+  * avoided because system includes are not supposed to include each other.)
+  *      This method might produce warnings from some compilers.  (It does in
+  * newer GCCs, but not for ones that would hit this #else.)  If this happens,
+  * please report details to the Newlib mailing list.  */
+
+ #ifndef HUGE_VAL
+  #define HUGE_VAL (1.0e999999999)
+ #endif
+
+ #ifndef HUGE_VALF
+  #define HUGE_VALF (1.0e999999999F)
+ #endif
+
+ #if !defined(HUGE_VALL)  &&  defined(_HAVE_LONG_DOUBLE)
+  #define HUGE_VALL (1.0e999999999L)
+ #endif
+
+ #if !defined(INFINITY)
+  #define INFINITY (HUGE_VALF)
+ #endif
+
+ #if !defined(NAN)
+  #if defined(__GNUC__)  &&  defined(__cplusplus)
+    /* Exception:  older g++ versions warn about the divide by 0 used in the
+     * normal case (even though older gccs do not).  This trick suppresses the
+     * warning, but causes errors for plain gcc, so is only used in the one
+     * special case.  */
+    static const union { __ULong __i[1]; float __d; } __Nanf = {0x7FC00000};
+    #define NAN (__Nanf.__d)
+  #else
+    #define NAN (0.0F/0.0F)
+  #endif
+ #endif
+
+#endif /* !gcc >= 3.3  */
+
+/* Reentrant ANSI C functions.  */
+
+#ifndef __math_68881
+extern double atan _PARAMS((double));
+extern double cos _PARAMS((double));
+extern double sin _PARAMS((double));
+extern double tan _PARAMS((double));
+extern double tanh _PARAMS((double));
+extern double frexp _PARAMS((double, int *));
+extern double modf _PARAMS((double, double *));
+extern double ceil _PARAMS((double));
+extern double fabs _PARAMS((double));
+extern double floor _PARAMS((double));
+#endif /* ! defined (__math_68881) */
+
+/* Non reentrant ANSI C functions.  */
+
+#ifndef _REENT_ONLY
+#ifndef __math_68881
+extern double acos _PARAMS((double));
+extern double asin _PARAMS((double));
+extern double atan2 _PARAMS((double, double));
+extern double cosh _PARAMS((double));
+extern double sinh _PARAMS((double));
+extern double exp _PARAMS((double));
+extern double ldexp _PARAMS((double, int));
+extern double log _PARAMS((double));
+extern double log10 _PARAMS((double));
+extern double pow _PARAMS((double, double));
+extern double sqrt _PARAMS((double));
+extern double fmod _PARAMS((double, double));
+#endif /* ! defined (__math_68881) */
+#endif /* ! defined (_REENT_ONLY) */
+
+#if !defined(__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L
+
+/* ISO C99 types and macros. */
+
+/* FIXME:  FLT_EVAL_METHOD should somehow be gotten from float.h (which is hard,
+ * considering that the standard says the includes it defines should not
+ * include other includes that it defines) and that value used.  (This can be
+ * solved, but autoconf has a bug which makes the solution more difficult, so
+ * it has been skipped for now.)  */
+#if !defined(FLT_EVAL_METHOD) && defined(__FLT_EVAL_METHOD__)
+  #define FLT_EVAL_METHOD __FLT_EVAL_METHOD__
+  #define __TMP_FLT_EVAL_METHOD
+#endif /* FLT_EVAL_METHOD */
+#if defined FLT_EVAL_METHOD
+  #if FLT_EVAL_METHOD == 0
+    typedef float  float_t;
+    typedef double double_t;
+   #elif FLT_EVAL_METHOD == 1
+    typedef double float_t;
+    typedef double double_t;
+   #elif FLT_EVAL_METHOD == 2
+    typedef long double float_t;
+    typedef long double double_t;
+   #else
+    /* Implementation-defined.  Assume float_t and double_t have been
+     * defined previously for this configuration (e.g. config.h). */
+  #endif
+#else
+    /* Assume basic definitions.  */
+    typedef float  float_t;
+    typedef double double_t;
+#endif
+#if defined(__TMP_FLT_EVAL_METHOD)
+  #undef FLT_EVAL_METHOD
+#endif
+
+#define FP_NAN         0
+#define FP_INFINITE    1
+#define FP_ZERO        2
+#define FP_SUBNORMAL   3
+#define FP_NORMAL      4
+
+#ifndef FP_ILOGB0
+# define FP_ILOGB0 (-INT_MAX)
+#endif
+#ifndef FP_ILOGBNAN
+# define FP_ILOGBNAN INT_MAX
+#endif
+
+#ifndef MATH_ERRNO
+# define MATH_ERRNO 1
+#endif
+#ifndef MATH_ERREXCEPT
+# define MATH_ERREXCEPT 2
+#endif
+#ifndef math_errhandling
+# define math_errhandling MATH_ERRNO
+#endif
+
+extern int __isinff (float x);
+extern int __isinfd (double x);
+extern int __isnanf (float x);
+extern int __isnand (double x);
+extern int __fpclassifyf (float x);
+extern int __fpclassifyd (double x);
+extern int __signbitf (float x);
+extern int __signbitd (double x);
+
+#define fpclassify(__x) \
+	((sizeof(__x) == sizeof(float))  ? __fpclassifyf(__x) : \
+	__fpclassifyd(__x))
+
+#ifndef isfinite
+  #define isfinite(__y) \
+          (__extension__ ({int __cy = fpclassify(__y); \
+                           __cy != FP_INFINITE && __cy != FP_NAN;}))
+#endif
+
+/* Note: isinf and isnan were once functions in newlib that took double
+ *       arguments.  C99 specifies that these names are reserved for macros
+ *       supporting multiple floating point types.  Thus, they are
+ *       now defined as macros.  Implementations of the old functions
+ *       taking double arguments still exist for compatibility purposes
+ *       (prototypes for them are in <ieeefp.h>).  */
+#ifndef isinf
+  #define isinf(y) (fpclassify(y) == FP_INFINITE)
+#endif
+
+#ifndef isnan
+  #define isnan(y) (fpclassify(y) == FP_NAN)
+#endif
+
+#define isnormal(y) (fpclassify(y) == FP_NORMAL)
+#define signbit(__x) \
+	((sizeof(__x) == sizeof(float))  ?  __signbitf(__x) : \
+		__signbitd(__x))
+
+#define isgreater(x,y) \
+          (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \
+                           !isunordered(__x,__y) && (__x > __y);}))
+#define isgreaterequal(x,y) \
+          (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \
+                           !isunordered(__x,__y) && (__x >= __y);}))
+#define isless(x,y) \
+          (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \
+                           !isunordered(__x,__y) && (__x < __y);}))
+#define islessequal(x,y) \
+          (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \
+                           !isunordered(__x,__y) && (__x <= __y);}))
+#define islessgreater(x,y) \
+          (__extension__ ({__typeof__(x) __x = (x); __typeof__(y) __y = (y); \
+                           !isunordered(__x,__y) && (__x < __y || __x > __y);}))
+
+#define isunordered(a,b) \
+          (__extension__ ({__typeof__(a) __a = (a); __typeof__(b) __b = (b); \
+                           fpclassify(__a) == FP_NAN || fpclassify(__b) == FP_NAN;}))
+
+/* Non ANSI double precision functions.  */
+
+extern double infinity _PARAMS((void));
+extern double nan _PARAMS((const char *));
+extern int finite _PARAMS((double));
+extern double copysign _PARAMS((double, double));
+extern double logb _PARAMS((double));
+extern int ilogb _PARAMS((double));
+
+extern double asinh _PARAMS((double));
+extern double cbrt _PARAMS((double));
+extern double nextafter _PARAMS((double, double));
+extern double rint _PARAMS((double));
+extern double scalbn _PARAMS((double, int));
+
+extern double exp2 _PARAMS((double));
+extern double scalbln _PARAMS((double, long int));
+extern double tgamma _PARAMS((double));
+extern double nearbyint _PARAMS((double));
+extern long int lrint _PARAMS((double));
+extern _LONG_LONG_TYPE int llrint _PARAMS((double));
+extern double round _PARAMS((double));
+extern long int lround _PARAMS((double));
+extern long long int llround _PARAMS((double));
+extern double trunc _PARAMS((double));
+extern double remquo _PARAMS((double, double, int *));
+extern double fdim _PARAMS((double, double));
+extern double fmax _PARAMS((double, double));
+extern double fmin _PARAMS((double, double));
+extern double fma _PARAMS((double, double, double));
+
+#ifndef __math_68881
+extern double log1p _PARAMS((double));
+extern double expm1 _PARAMS((double));
+#endif /* ! defined (__math_68881) */
+
+#ifndef _REENT_ONLY
+extern double acosh _PARAMS((double));
+extern double atanh _PARAMS((double));
+extern double remainder _PARAMS((double, double));
+extern double gamma _PARAMS((double));
+extern double lgamma _PARAMS((double));
+extern double erf _PARAMS((double));
+extern double erfc _PARAMS((double));
+extern double log2 _PARAMS((double));
+#if !defined(__cplusplus)
+#define log2(x) (log (x) / _M_LN2)
+#endif
+
+#ifndef __math_68881
+extern double hypot _PARAMS((double, double));
+#endif
+
+#endif /* ! defined (_REENT_ONLY) */
+
+/* Single precision versions of ANSI functions.  */
+
+extern float atanf _PARAMS((float));
+extern float cosf _PARAMS((float));
+extern float sinf _PARAMS((float));
+extern float tanf _PARAMS((float));
+extern float tanhf _PARAMS((float));
+extern float frexpf _PARAMS((float, int *));
+extern float modff _PARAMS((float, float *));
+extern float ceilf _PARAMS((float));
+extern float fabsf _PARAMS((float));
+extern float floorf _PARAMS((float));
+
+#ifndef _REENT_ONLY
+extern float acosf _PARAMS((float));
+extern float asinf _PARAMS((float));
+extern float atan2f _PARAMS((float, float));
+extern float coshf _PARAMS((float));
+extern float sinhf _PARAMS((float));
+extern float expf _PARAMS((float));
+extern float ldexpf _PARAMS((float, int));
+extern float logf _PARAMS((float));
+extern float log10f _PARAMS((float));
+extern float powf _PARAMS((float, float));
+extern float sqrtf _PARAMS((float));
+extern float fmodf _PARAMS((float, float));
+#endif /* ! defined (_REENT_ONLY) */
+
+/* Other single precision functions.  */
+
+extern float exp2f _PARAMS((float));
+extern float scalblnf _PARAMS((float, long int));
+extern float tgammaf _PARAMS((float));
+extern float nearbyintf _PARAMS((float));
+extern long int lrintf _PARAMS((float));
+extern _LONG_LONG_TYPE llrintf _PARAMS((float));
+extern float roundf _PARAMS((float));
+extern long int lroundf _PARAMS((float));
+extern long long int llroundf _PARAMS((float));
+extern float truncf _PARAMS((float));
+extern float remquof _PARAMS((float, float, int *));
+extern float fdimf _PARAMS((float, float));
+extern float fmaxf _PARAMS((float, float));
+extern float fminf _PARAMS((float, float));
+extern float fmaf _PARAMS((float, float, float));
+
+extern float infinityf _PARAMS((void));
+extern float nanf _PARAMS((const char *));
+extern int finitef _PARAMS((float));
+extern float copysignf _PARAMS((float, float));
+extern float logbf _PARAMS((float));
+extern int ilogbf _PARAMS((float));
+
+extern float asinhf _PARAMS((float));
+extern float cbrtf _PARAMS((float));
+extern float nextafterf _PARAMS((float, float));
+extern float rintf _PARAMS((float));
+extern float scalbnf _PARAMS((float, int));
+extern float log1pf _PARAMS((float));
+extern float expm1f _PARAMS((float));
+
+#ifndef _REENT_ONLY
+extern float acoshf _PARAMS((float));
+extern float atanhf _PARAMS((float));
+extern float remainderf _PARAMS((float, float));
+extern float gammaf _PARAMS((float));
+extern float lgammaf _PARAMS((float));
+extern float erff _PARAMS((float));
+extern float erfcf _PARAMS((float));
+extern float log2f _PARAMS((float));
+extern float hypotf _PARAMS((float, float));
+#endif /* ! defined (_REENT_ONLY) */
+
+/* On platforms where long double equals double.  */
+#ifdef _LDBL_EQ_DBL
+/* Reentrant ANSI C functions.  */
+#ifndef __math_68881
+extern long double atanl _PARAMS((long double));
+extern long double cosl _PARAMS((long double));
+extern long double sinl _PARAMS((long double));
+extern long double tanl _PARAMS((long double));
+extern long double tanhl _PARAMS((long double));
+extern long double frexpl _PARAMS((long double value, int *));
+extern long double modfl _PARAMS((long double, long double *));
+extern long double ceill _PARAMS((long double));
+extern long double fabsl _PARAMS((long double));
+extern long double floorl _PARAMS((long double));
+extern long double log1pl _PARAMS((long double));
+extern long double expm1l _PARAMS((long double));
+#endif /* ! defined (__math_68881) */
+/* Non reentrant ANSI C functions.  */
+#ifndef _REENT_ONLY
+#ifndef __math_68881
+extern long double acosl _PARAMS((long double));
+extern long double asinl _PARAMS((long double));
+extern long double atan2l _PARAMS((long double, long double));
+extern long double coshl _PARAMS((long double));
+extern long double sinhl _PARAMS((long double));
+extern long double expl _PARAMS((long double));
+extern long double ldexpl _PARAMS((long double, int));
+extern long double logl _PARAMS((long double));
+extern long double log10l _PARAMS((long double));
+extern long double powl _PARAMS((long double, long double));
+extern long double sqrtl _PARAMS((long double));
+extern long double fmodl _PARAMS((long double, long double));
+extern long double hypotl _PARAMS((long double, long double));
+#endif /* ! defined (__math_68881) */
+#endif /* ! defined (_REENT_ONLY) */
+extern long double copysignl _PARAMS((long double, long double));
+extern long double nanl _PARAMS((const char *));
+extern int ilogbl _PARAMS((long double));
+extern long double asinhl _PARAMS((long double));
+extern long double cbrtl _PARAMS((long double));
+extern long double nextafterl _PARAMS((long double, long double));
+extern long double rintl _PARAMS((long double));
+extern long double scalbnl _PARAMS((long double, int));
+extern long double exp2l _PARAMS((long double));
+extern long double scalblnl _PARAMS((long double, long));
+extern long double tgammal _PARAMS((long double));
+extern long double nearbyintl _PARAMS((long double));
+extern long int lrintl _PARAMS((long double));
+extern long long int llrintl _PARAMS((long double));
+extern long double roundl _PARAMS((long double));
+extern long lroundl _PARAMS((long double));
+extern _LONG_LONG_TYPE int llroundl _PARAMS((long double));
+extern long double truncl _PARAMS((long double));
+extern long double remquol _PARAMS((long double, long double, int *));
+extern long double fdiml _PARAMS((long double, long double));
+extern long double fmaxl _PARAMS((long double, long double));
+extern long double fminl _PARAMS((long double, long double));
+extern long double fmal _PARAMS((long double, long double, long double));
+#ifndef _REENT_ONLY
+extern long double acoshl _PARAMS((long double));
+extern long double atanhl _PARAMS((long double));
+extern long double remainderl _PARAMS((long double, long double));
+extern long double lgammal _PARAMS((long double));
+extern long double erfl _PARAMS((long double));
+extern long double erfcl _PARAMS((long double));
+#endif /* ! defined (_REENT_ONLY) */
+#else /* !_LDBL_EQ_DBL */
+#ifdef __i386__
+/* Other long double precision functions.  */
+extern _LONG_DOUBLE rintl _PARAMS((_LONG_DOUBLE));
+extern long int lrintl _PARAMS((_LONG_DOUBLE));
+extern _LONG_LONG_TYPE llrintl _PARAMS((_LONG_DOUBLE));
+#endif /* __i386__ */
+#endif /* !_LDBL_EQ_DBL */
+
+#endif /* !defined (__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L */
+
+#if !defined (__STRICT_ANSI__) || defined(__cplusplus)
+
+extern double drem _PARAMS((double, double));
+extern void sincos _PARAMS((double, double *, double *));
+extern double gamma_r _PARAMS((double, int *));
+extern double lgamma_r _PARAMS((double, int *));
+
+extern double y0 _PARAMS((double));
+extern double y1 _PARAMS((double));
+extern double yn _PARAMS((int, double));
+extern double j0 _PARAMS((double));
+extern double j1 _PARAMS((double));
+extern double jn _PARAMS((int, double));
+
+extern float dremf _PARAMS((float, float));
+extern void sincosf _PARAMS((float, float *, float *));
+extern float gammaf_r _PARAMS((float, int *));
+extern float lgammaf_r _PARAMS((float, int *));
+
+extern float y0f _PARAMS((float));
+extern float y1f _PARAMS((float));
+extern float ynf _PARAMS((int, float));
+extern float j0f _PARAMS((float));
+extern float j1f _PARAMS((float));
+extern float jnf _PARAMS((int, float));
+
+/* GNU extensions */
+# ifndef exp10
+extern double exp10 _PARAMS((double));
+# endif
+# ifndef pow10
+extern double pow10 _PARAMS((double));
+# endif
+# ifndef exp10f
+extern float exp10f _PARAMS((float));
+# endif
+# ifndef pow10f
+extern float pow10f _PARAMS((float));
+# endif
+
+#endif /* !defined (__STRICT_ANSI__) || defined(__cplusplus) */
+
+#ifndef __STRICT_ANSI__
+
+/* The gamma functions use a global variable, signgam.  */
+#ifndef _REENT_ONLY
+#define signgam (*__signgam())
+extern int *__signgam _PARAMS((void));
+#endif /* ! defined (_REENT_ONLY) */
+
+#define __signgam_r(ptr) _REENT_SIGNGAM(ptr)
+
+/* The exception structure passed to the matherr routine.  */
+/* We have a problem when using C++ since `exception' is a reserved
+   name in C++.  */
+#ifdef __cplusplus
+struct __exception
+#else
+struct exception
+#endif
+{
+  int type;
+  char *name;
+  double arg1;
+  double arg2;
+  double retval;
+  int err;
+};
+
+#ifdef __cplusplus
+extern int matherr _PARAMS((struct __exception *e));
+#else
+extern int matherr _PARAMS((struct exception *e));
+#endif
+
+/* Values for the type field of struct exception.  */
+
+#define DOMAIN 1
+#define SING 2
+#define OVERFLOW 3
+#define UNDERFLOW 4
+#define TLOSS 5
+#define PLOSS 6
+
+/* Useful constants.  */
+
+#define MAXFLOAT	3.40282347e+38F
+
+#define M_E		2.7182818284590452354
+#define M_LOG2E		1.4426950408889634074
+#define M_LOG10E	0.43429448190325182765
+#define M_LN2		_M_LN2
+#define M_LN10		2.30258509299404568402
+#define M_PI		3.14159265358979323846
+#define M_TWOPI         (M_PI * 2.0)
+#define M_PI_2		1.57079632679489661923
+#define M_PI_4		0.78539816339744830962
+#define M_3PI_4		2.3561944901923448370E0
+#define M_SQRTPI        1.77245385090551602792981
+#define M_1_PI		0.31830988618379067154
+#define M_2_PI		0.63661977236758134308
+#define M_2_SQRTPI	1.12837916709551257390
+#define M_SQRT2		1.41421356237309504880
+#define M_SQRT1_2	0.70710678118654752440
+#define M_LN2LO         1.9082149292705877000E-10
+#define M_LN2HI         6.9314718036912381649E-1
+#define M_SQRT3	1.73205080756887719000
+#define M_IVLN10        0.43429448190325182765 /* 1 / log(10) */
+#define M_LOG2_E        _M_LN2
+#define M_INVLN2        1.4426950408889633870E0  /* 1 / log(2) */
+
+/* Global control over fdlibm error handling.  */
+
+enum __fdlibm_version
+{
+  __fdlibm_ieee = -1,
+  __fdlibm_svid,
+  __fdlibm_xopen,
+  __fdlibm_posix
+};
+
+#define _LIB_VERSION_TYPE enum __fdlibm_version
+#define _LIB_VERSION __fdlib_version
+
+extern __IMPORT _LIB_VERSION_TYPE _LIB_VERSION;
+
+#define _IEEE_  __fdlibm_ieee
+#define _SVID_  __fdlibm_svid
+#define _XOPEN_ __fdlibm_xopen
+#define _POSIX_ __fdlibm_posix
+
+#endif /* ! defined (__STRICT_ANSI__) */
+
+_END_STD_C
+
+#ifdef __FAST_MATH__
+#include <machine/fastmath.h>
+#endif
+
+#endif /* _MATH_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/newlib.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/newlib.h
new file mode 100644
index 00000000..c9092a41
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/newlib.h
@@ -0,0 +1,171 @@
+/* newlib.h.  Generated from newlib.hin by configure.  */
+/* newlib.hin.  Manually edited from the output of autoheader to
+   remove all PACKAGE_ macros which will collide with any user
+   package using newlib header files and having its own package name,
+   version, etc...  */
+#ifndef __NEWLIB_H__
+
+#define __NEWLIB_H__ 1
+
+/* EL/IX level */
+/* #undef _ELIX_LEVEL */
+
+/* Newlib version */
+#define _NEWLIB_VERSION "2.0.0"
+
+/* C99 formats support (such as %a, %zu, ...) in IO functions like
+ * printf/scanf enabled */
+/* #undef _WANT_IO_C99_FORMATS */
+
+/* long long type support in IO functions like printf/scanf enabled */
+/* #undef _WANT_IO_LONG_LONG */
+
+/* Register application finalization function using atexit. */
+/* #undef _WANT_REGISTER_FINI */
+
+/* long double type support in IO functions like printf/scanf enabled */
+/* #undef _WANT_IO_LONG_DOUBLE */
+
+/* Positional argument support in printf functions enabled.  */
+/* #undef _WANT_IO_POS_ARGS */
+
+/* Optional reentrant struct support.  Used mostly on platforms with
+   very restricted storage.  */
+/* #undef _WANT_REENT_SMALL */
+
+/* Multibyte supported */
+/* #undef _MB_CAPABLE */
+
+/* MB_LEN_MAX */
+#define _MB_LEN_MAX 1
+
+/* ICONV enabled */
+/* #undef _ICONV_ENABLED */
+
+/* Enable ICONV external CCS files loading capabilities */
+/* #undef _ICONV_ENABLE_EXTERNAL_CCS */
+
+/* Define if the linker supports .preinit_array/.init_array/.fini_array
+ * sections.  */
+#define HAVE_INITFINI_ARRAY 1
+
+/* True if atexit() may dynamically allocate space for cleanup
+   functions.  */
+#define _ATEXIT_DYNAMIC_ALLOC 1
+
+/* True if long double supported.  */
+#define _HAVE_LONG_DOUBLE 1
+
+/* True if long double supported and it is equal to double.  */
+#define _LDBL_EQ_DBL 1
+
+/*
+ * Iconv encodings enabled ("to" direction)
+ */
+/* #undef _ICONV_TO_ENCODING_BIG5 */
+/* #undef _ICONV_TO_ENCODING_CP775 */
+/* #undef _ICONV_TO_ENCODING_CP850 */
+/* #undef _ICONV_TO_ENCODING_CP852 */
+/* #undef _ICONV_TO_ENCODING_CP855 */
+/* #undef _ICONV_TO_ENCODING_CP866 */
+/* #undef _ICONV_TO_ENCODING_EUC_JP */
+/* #undef _ICONV_TO_ENCODING_EUC_TW */
+/* #undef _ICONV_TO_ENCODING_EUC_KR */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_1 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_10 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_11 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_13 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_14 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_15 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_2 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_3 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_4 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_5 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_6 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_7 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_8 */
+/* #undef _ICONV_TO_ENCODING_ISO_8859_9 */
+/* #undef _ICONV_TO_ENCODING_ISO_IR_111 */
+/* #undef _ICONV_TO_ENCODING_KOI8_R */
+/* #undef _ICONV_TO_ENCODING_KOI8_RU */
+/* #undef _ICONV_TO_ENCODING_KOI8_U */
+/* #undef _ICONV_TO_ENCODING_KOI8_UNI */
+/* #undef _ICONV_TO_ENCODING_UCS_2 */
+/* #undef _ICONV_TO_ENCODING_UCS_2_INTERNAL */
+/* #undef _ICONV_TO_ENCODING_UCS_2BE */
+/* #undef _ICONV_TO_ENCODING_UCS_2LE */
+/* #undef _ICONV_TO_ENCODING_UCS_4 */
+/* #undef _ICONV_TO_ENCODING_UCS_4_INTERNAL */
+/* #undef _ICONV_TO_ENCODING_UCS_4BE */
+/* #undef _ICONV_TO_ENCODING_UCS_4LE */
+/* #undef _ICONV_TO_ENCODING_US_ASCII */
+/* #undef _ICONV_TO_ENCODING_UTF_16 */
+/* #undef _ICONV_TO_ENCODING_UTF_16BE */
+/* #undef _ICONV_TO_ENCODING_UTF_16LE */
+/* #undef _ICONV_TO_ENCODING_UTF_8 */
+/* #undef _ICONV_TO_ENCODING_WIN_1250 */
+/* #undef _ICONV_TO_ENCODING_WIN_1251 */
+/* #undef _ICONV_TO_ENCODING_WIN_1252 */
+/* #undef _ICONV_TO_ENCODING_WIN_1253 */
+/* #undef _ICONV_TO_ENCODING_WIN_1254 */
+/* #undef _ICONV_TO_ENCODING_WIN_1255 */
+/* #undef _ICONV_TO_ENCODING_WIN_1256 */
+/* #undef _ICONV_TO_ENCODING_WIN_1257 */
+/* #undef _ICONV_TO_ENCODING_WIN_1258 */
+
+/*
+ * Iconv encodings enabled ("from" direction)
+ */
+/* #undef _ICONV_FROM_ENCODING_BIG5 */
+/* #undef _ICONV_FROM_ENCODING_CP775 */
+/* #undef _ICONV_FROM_ENCODING_CP850 */
+/* #undef _ICONV_FROM_ENCODING_CP852 */
+/* #undef _ICONV_FROM_ENCODING_CP855 */
+/* #undef _ICONV_FROM_ENCODING_CP866 */
+/* #undef _ICONV_FROM_ENCODING_EUC_JP */
+/* #undef _ICONV_FROM_ENCODING_EUC_TW */
+/* #undef _ICONV_FROM_ENCODING_EUC_KR */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_1 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_10 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_11 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_13 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_14 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_15 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_2 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_3 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_4 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_5 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_6 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_7 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_8 */
+/* #undef _ICONV_FROM_ENCODING_ISO_8859_9 */
+/* #undef _ICONV_FROM_ENCODING_ISO_IR_111 */
+/* #undef _ICONV_FROM_ENCODING_KOI8_R */
+/* #undef _ICONV_FROM_ENCODING_KOI8_RU */
+/* #undef _ICONV_FROM_ENCODING_KOI8_U */
+/* #undef _ICONV_FROM_ENCODING_KOI8_UNI */
+/* #undef _ICONV_FROM_ENCODING_UCS_2 */
+/* #undef _ICONV_FROM_ENCODING_UCS_2_INTERNAL */
+/* #undef _ICONV_FROM_ENCODING_UCS_2BE */
+/* #undef _ICONV_FROM_ENCODING_UCS_2LE */
+/* #undef _ICONV_FROM_ENCODING_UCS_4 */
+/* #undef _ICONV_FROM_ENCODING_UCS_4_INTERNAL */
+/* #undef _ICONV_FROM_ENCODING_UCS_4BE */
+/* #undef _ICONV_FROM_ENCODING_UCS_4LE */
+/* #undef _ICONV_FROM_ENCODING_US_ASCII */
+/* #undef _ICONV_FROM_ENCODING_UTF_16 */
+/* #undef _ICONV_FROM_ENCODING_UTF_16BE */
+/* #undef _ICONV_FROM_ENCODING_UTF_16LE */
+/* #undef _ICONV_FROM_ENCODING_UTF_8 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1250 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1251 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1252 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1253 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1254 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1255 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1256 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1257 */
+/* #undef _ICONV_FROM_ENCODING_WIN_1258 */
+
+#endif /* !__NEWLIB_H__ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/paths.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/paths.h
new file mode 100644
index 00000000..36cf78a9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/paths.h
@@ -0,0 +1,7 @@
+#ifndef	_PATHS_H_
+#define _PATHS_H_
+
+#define _PATH_DEV	"/dev/"
+#define _PATH_BSHELL    "/bin/sh"
+
+#endif /* _PATHS_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pthread.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pthread.h
new file mode 100644
index 00000000..2e95121b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pthread.h
@@ -0,0 +1,359 @@
+/*  pthread.h
+ *
+ *  Written by Joel Sherrill <joel@OARcorp.com>.
+ *
+ *  COPYRIGHT (c) 1989-2010.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Permission to use, copy, modify, and distribute this software for any
+ *  purpose without fee is hereby granted, provided that this entire notice
+ *  is included in all copies of any software which is or includes a copy
+ *  or modification of this software.
+ *
+ *  THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY.  IN PARTICULAR,  THE AUTHOR MAKES NO REPRESENTATION
+ *  OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS
+ *  SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ *  $Id: pthread.h,v 1.9 2010/12/08 14:44:06 corinna Exp $
+ */
+
+#ifndef __PTHREAD_h
+#define __PTHREAD_h
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <unistd.h>
+
+#if defined(_POSIX_THREADS)
+
+#include <sys/types.h>
+#include <time.h>
+#include <sys/sched.h>
+
+/* Register Fork Handlers */
+int	_EXFUN(pthread_atfork,(void (*prepare)(void), void (*parent)(void),
+                   void (*child)(void)));
+          
+/* Mutex Initialization Attributes, P1003.1c/Draft 10, p. 81 */
+
+int	_EXFUN(pthread_mutexattr_init, (pthread_mutexattr_t *__attr));
+int	_EXFUN(pthread_mutexattr_destroy, (pthread_mutexattr_t *__attr));
+int	_EXFUN(pthread_mutexattr_getpshared,
+		(_CONST pthread_mutexattr_t *__attr, int  *__pshared));
+int	_EXFUN(pthread_mutexattr_setpshared,
+		(pthread_mutexattr_t *__attr, int __pshared));
+
+#if defined(_UNIX98_THREAD_MUTEX_ATTRIBUTES)
+
+/* Single UNIX Specification 2 Mutex Attributes types */
+
+int _EXFUN(pthread_mutexattr_gettype,
+		(_CONST pthread_mutexattr_t *__attr, int *__kind));
+int _EXFUN(pthread_mutexattr_settype,
+		(pthread_mutexattr_t *__attr, int __kind));
+
+#endif
+
+/* Initializing and Destroying a Mutex, P1003.1c/Draft 10, p. 87 */
+
+int	_EXFUN(pthread_mutex_init,
+	(pthread_mutex_t *__mutex, _CONST pthread_mutexattr_t *__attr));
+int	_EXFUN(pthread_mutex_destroy, (pthread_mutex_t *__mutex));
+
+/* This is used to statically initialize a pthread_mutex_t. Example:
+  
+    pthread_mutex_t mutex = PTHREAD_MUTEX_INITIALIZER;
+ */
+
+#define PTHREAD_MUTEX_INITIALIZER  ((pthread_mutex_t) 0xFFFFFFFF)
+
+/*  Locking and Unlocking a Mutex, P1003.1c/Draft 10, p. 93
+    NOTE: P1003.4b/D8 adds pthread_mutex_timedlock(), p. 29 */
+
+int	_EXFUN(pthread_mutex_lock, (pthread_mutex_t *__mutex));
+int	_EXFUN(pthread_mutex_trylock, (pthread_mutex_t *__mutex));
+int	_EXFUN(pthread_mutex_unlock, (pthread_mutex_t *__mutex));
+
+#if defined(_POSIX_TIMEOUTS)
+
+int	_EXFUN(pthread_mutex_timedlock,
+	(pthread_mutex_t *__mutex, _CONST struct timespec *__timeout));
+
+#endif /* _POSIX_TIMEOUTS */
+
+/* Condition Variable Initialization Attributes, P1003.1c/Draft 10, p. 96 */
+ 
+int	_EXFUN(pthread_condattr_init, (pthread_condattr_t *__attr));
+int	_EXFUN(pthread_condattr_destroy, (pthread_condattr_t *__attr));
+int	_EXFUN(pthread_condattr_getpshared,
+		(_CONST pthread_condattr_t *__attr, int *__pshared));
+int	_EXFUN(pthread_condattr_setpshared,
+		(pthread_condattr_t *__attr, int __pshared));
+ 
+/* Initializing and Destroying a Condition Variable, P1003.1c/Draft 10, p. 87 */
+ 
+int	_EXFUN(pthread_cond_init,
+	(pthread_cond_t *__cond, _CONST pthread_condattr_t *__attr));
+int	_EXFUN(pthread_cond_destroy, (pthread_cond_t *__mutex));
+ 
+/* This is used to statically initialize a pthread_cond_t. Example:
+  
+    pthread_cond_t cond = PTHREAD_COND_INITIALIZER;
+ */
+ 
+#define PTHREAD_COND_INITIALIZER  ((pthread_mutex_t) 0xFFFFFFFF)
+ 
+/* Broadcasting and Signaling a Condition, P1003.1c/Draft 10, p. 101 */
+ 
+int	_EXFUN(pthread_cond_signal, (pthread_cond_t *__cond));
+int	_EXFUN(pthread_cond_broadcast, (pthread_cond_t *__cond));
+ 
+/* Waiting on a Condition, P1003.1c/Draft 10, p. 105 */
+ 
+int	_EXFUN(pthread_cond_wait,
+	(pthread_cond_t *__cond, pthread_mutex_t *__mutex));
+ 
+int	_EXFUN(pthread_cond_timedwait,
+		(pthread_cond_t *__cond, pthread_mutex_t *__mutex,
+		_CONST struct timespec *__abstime));
+ 
+#if defined(_POSIX_THREAD_PRIORITY_SCHEDULING)
+
+/* Thread Creation Scheduling Attributes, P1003.1c/Draft 10, p. 120 */
+
+int	_EXFUN(pthread_attr_setscope,
+		(pthread_attr_t *__attr, int __contentionscope));
+int	_EXFUN(pthread_attr_getscope,
+	(_CONST pthread_attr_t *__attr, int *__contentionscope));
+int	_EXFUN(pthread_attr_setinheritsched,
+	(pthread_attr_t *__attr, int __inheritsched));
+int	_EXFUN(pthread_attr_getinheritsched,
+	(_CONST pthread_attr_t *__attr, int *__inheritsched));
+int	_EXFUN(pthread_attr_setschedpolicy,
+	(pthread_attr_t *__attr, int __policy));
+int	_EXFUN(pthread_attr_getschedpolicy,
+	(_CONST pthread_attr_t *__attr, int *__policy));
+
+#endif /* defined(_POSIX_THREAD_PRIORITY_SCHEDULING) */
+
+int	_EXFUN(pthread_attr_setschedparam,
+	(pthread_attr_t *__attr, _CONST struct sched_param *__param));
+int	_EXFUN(pthread_attr_getschedparam,
+	(_CONST pthread_attr_t *__attr, struct sched_param *__param));
+
+#if defined(_POSIX_THREAD_PRIORITY_SCHEDULING)
+
+/* Dynamic Thread Scheduling Parameters Access, P1003.1c/Draft 10, p. 124 */
+
+int	_EXFUN(pthread_getschedparam,
+	(pthread_t __pthread, int *__policy, struct sched_param *__param));
+int	_EXFUN(pthread_setschedparam,
+	(pthread_t __pthread, int __policy, struct sched_param *__param));
+
+#endif /* defined(_POSIX_THREAD_PRIORITY_SCHEDULING) */
+
+#if defined(_POSIX_THREAD_PRIO_INHERIT) || defined(_POSIX_THREAD_PRIO_PROTECT)
+
+/* Mutex Initialization Scheduling Attributes, P1003.1c/Draft 10, p. 128 */
+ 
+int	_EXFUN(pthread_mutexattr_setprotocol,
+	(pthread_mutexattr_t *__attr, int __protocol));
+int	_EXFUN(pthread_mutexattr_getprotocol,
+	(_CONST pthread_mutexattr_t *__attr, int *__protocol));
+int	_EXFUN(pthread_mutexattr_setprioceiling,
+	(pthread_mutexattr_t *__attr, int __prioceiling));
+int	_EXFUN(pthread_mutexattr_getprioceiling,
+	(_CONST pthread_mutexattr_t *__attr, int *__prioceiling));
+
+#endif /* _POSIX_THREAD_PRIO_INHERIT || _POSIX_THREAD_PRIO_PROTECT */
+
+#if defined(_POSIX_THREAD_PRIO_PROTECT)
+
+/* Change the Priority Ceiling of a Mutex, P1003.1c/Draft 10, p. 131 */
+
+int	_EXFUN(pthread_mutex_setprioceiling,
+	(pthread_mutex_t *__mutex, int __prioceiling, int *__old_ceiling));
+int	_EXFUN(pthread_mutex_getprioceiling,
+	(pthread_mutex_t *__mutex, int *__prioceiling));
+
+#endif /* _POSIX_THREAD_PRIO_PROTECT */
+
+/* Thread Creation Attributes, P1003.1c/Draft 10, p, 140 */
+
+int	_EXFUN(pthread_attr_init, (pthread_attr_t *__attr));
+int	_EXFUN(pthread_attr_destroy, (pthread_attr_t *__attr));
+int	_EXFUN(pthread_attr_setstack, (pthread_attr_t *attr,
+	void *__stackaddr, size_t __stacksize));
+int	_EXFUN(pthread_attr_getstack, (_CONST pthread_attr_t *attr,
+	void **__stackaddr, size_t *__stacksize));
+int	_EXFUN(pthread_attr_getstacksize,
+	(_CONST pthread_attr_t *__attr, size_t *__stacksize));
+int	_EXFUN(pthread_attr_setstacksize,
+	(pthread_attr_t *__attr, size_t __stacksize));
+int	_EXFUN(pthread_attr_getstackaddr,
+	(_CONST pthread_attr_t *__attr, void **__stackaddr));
+int	_EXFUN(pthread_attr_setstackaddr,
+	(pthread_attr_t  *__attr, void *__stackaddr));
+int	_EXFUN(pthread_attr_getdetachstate,
+	(_CONST pthread_attr_t *__attr, int *__detachstate));
+int	_EXFUN(pthread_attr_setdetachstate,
+	(pthread_attr_t *__attr, int __detachstate));
+int	_EXFUN(pthread_attr_getguardsize,
+	(_CONST pthread_attr_t *__attr, size_t *__guardsize));
+int	_EXFUN(pthread_attr_setguardsize,
+	(pthread_attr_t *__attr, size_t __guardsize));
+
+/* Thread Creation, P1003.1c/Draft 10, p. 144 */
+
+int	_EXFUN(pthread_create,
+	(pthread_t *__pthread, _CONST pthread_attr_t  *__attr,
+	void *(*__start_routine)( void * ), void *__arg));
+
+/* Wait for Thread Termination, P1003.1c/Draft 10, p. 147 */
+
+int	_EXFUN(pthread_join, (pthread_t __pthread, void **__value_ptr));
+
+/* Detaching a Thread, P1003.1c/Draft 10, p. 149 */
+
+int	_EXFUN(pthread_detach, (pthread_t __pthread));
+
+/* Thread Termination, p1003.1c/Draft 10, p. 150 */
+
+void	_EXFUN(pthread_exit, (void *__value_ptr));
+
+/* Get Calling Thread's ID, p1003.1c/Draft 10, p. XXX */
+
+pthread_t	_EXFUN(pthread_self, (void));
+
+/* Compare Thread IDs, p1003.1c/Draft 10, p. 153 */
+
+int	_EXFUN(pthread_equal, (pthread_t __t1, pthread_t __t2));
+
+/* Dynamic Package Initialization */
+
+/* This is used to statically initialize a pthread_once_t. Example:
+  
+    pthread_once_t once = PTHREAD_ONCE_INIT;
+  
+    NOTE:  This is named inconsistently -- it should be INITIALIZER.  */
+ 
+#define PTHREAD_ONCE_INIT  { 1, 0 }  /* is initialized and not run */
+ 
+int	_EXFUN(pthread_once,
+	(pthread_once_t *__once_control, void (*__init_routine)(void)));
+
+/* Thread-Specific Data Key Create, P1003.1c/Draft 10, p. 163 */
+
+int	_EXFUN(pthread_key_create,
+	(pthread_key_t *__key, void (*__destructor)( void * )));
+
+/* Thread-Specific Data Management, P1003.1c/Draft 10, p. 165 */
+
+int	_EXFUN(pthread_setspecific,
+	(pthread_key_t __key, _CONST void *__value));
+void *	_EXFUN(pthread_getspecific, (pthread_key_t __key));
+
+/* Thread-Specific Data Key Deletion, P1003.1c/Draft 10, p. 167 */
+
+int	_EXFUN(pthread_key_delete, (pthread_key_t __key));
+
+/* Execution of a Thread, P1003.1c/Draft 10, p. 181 */
+
+#define PTHREAD_CANCEL_ENABLE  0
+#define PTHREAD_CANCEL_DISABLE 1
+
+#define PTHREAD_CANCEL_DEFERRED 0
+#define PTHREAD_CANCEL_ASYNCHRONOUS 1
+
+#define PTHREAD_CANCELED ((void *) -1)
+
+int	_EXFUN(pthread_cancel, (pthread_t __pthread));
+
+/* Setting Cancelability State, P1003.1c/Draft 10, p. 183 */
+
+int	_EXFUN(pthread_setcancelstate, (int __state, int *__oldstate));
+int	_EXFUN(pthread_setcanceltype, (int __type, int *__oldtype));
+void 	_EXFUN(pthread_testcancel, (void));
+
+/* Establishing Cancellation Handlers, P1003.1c/Draft 10, p. 184 */
+
+void 	_EXFUN(pthread_cleanup_push,
+	(void (*__routine)( void * ), void *__arg));
+void 	_EXFUN(pthread_cleanup_pop, (int __execute));
+
+#if defined(_POSIX_THREAD_CPUTIME)
+ 
+/* Accessing a Thread CPU-time Clock, P1003.4b/D8, p. 58 */
+ 
+int	_EXFUN(pthread_getcpuclockid,
+	(pthread_t __pthread_id, clockid_t *__clock_id));
+ 
+#endif /* defined(_POSIX_THREAD_CPUTIME) */
+
+
+#endif /* defined(_POSIX_THREADS) */
+
+#if defined(_POSIX_BARRIERS)
+
+int	_EXFUN(pthread_barrierattr_init, (pthread_barrierattr_t *__attr));
+int	_EXFUN(pthread_barrierattr_destroy, (pthread_barrierattr_t *__attr));
+int	_EXFUN(pthread_barrierattr_getpshared,
+	(_CONST pthread_barrierattr_t *__attr, int *__pshared));
+int	_EXFUN(pthread_barrierattr_setpshared,
+	(pthread_barrierattr_t *__attr, int __pshared));
+
+#define PTHREAD_BARRIER_SERIAL_THREAD -1
+
+int	_EXFUN(pthread_barrier_init,
+	(pthread_barrier_t *__barrier,
+	_CONST pthread_barrierattr_t *__attr, unsigned __count));
+int	_EXFUN(pthread_barrier_destroy, (pthread_barrier_t *__barrier));
+int	_EXFUN(pthread_barrier_wait,(pthread_barrier_t *__barrier));
+
+#endif /* defined(_POSIX_BARRIERS) */
+
+#if defined(_POSIX_SPIN_LOCKS)
+
+int	_EXFUN(pthread_spin_init,
+	(pthread_spinlock_t *__spinlock, int __pshared));
+int	_EXFUN(pthread_spin_destroy, (pthread_spinlock_t *__spinlock));
+int	_EXFUN(pthread_spin_lock, (pthread_spinlock_t *__spinlock));
+int	_EXFUN(pthread_spin_trylock, (pthread_spinlock_t *__spinlock));
+int	_EXFUN(pthread_spin_unlock, (pthread_spinlock_t *__spinlock));
+
+#endif /* defined(_POSIX_SPIN_LOCKS) */
+
+#if defined(_POSIX_READER_WRITER_LOCKS)
+
+int	_EXFUN(pthread_rwlockattr_init, (pthread_rwlockattr_t *__attr));
+int	_EXFUN(pthread_rwlockattr_destroy, (pthread_rwlockattr_t *__attr));
+int	_EXFUN(pthread_rwlockattr_getpshared,
+	(_CONST pthread_rwlockattr_t *__attr, int *__pshared));
+int	_EXFUN(pthread_rwlockattr_setpshared,
+	(pthread_rwlockattr_t *__attr, int __pshared));
+
+int	_EXFUN(pthread_rwlock_init,
+	(pthread_rwlock_t *__rwlock, _CONST pthread_rwlockattr_t *__attr));
+int	_EXFUN(pthread_rwlock_destroy, (pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_rdlock,(pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_tryrdlock,(pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_timedrdlock,
+        (pthread_rwlock_t *__rwlock, _CONST struct timespec *__abstime));
+int	_EXFUN(pthread_rwlock_unlock,(pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_wrlock,(pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_trywrlock,(pthread_rwlock_t *__rwlock));
+int	_EXFUN(pthread_rwlock_timedwrlock,
+        (pthread_rwlock_t *__rwlock, _CONST struct timespec *__abstime));
+
+#endif /* defined(_POSIX_READER_WRITER_LOCKS) */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pwd.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pwd.h
new file mode 100644
index 00000000..1526abfb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/pwd.h
@@ -0,0 +1,78 @@
+/*-
+ * Copyright (c) 1989 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)pwd.h	5.13 (Berkeley) 5/28/91
+ */
+
+#ifndef _PWD_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define	_PWD_H_
+
+#include <sys/types.h>
+
+#ifndef _POSIX_SOURCE
+#define	_PATH_PASSWD		"/etc/passwd"
+
+#define	_PASSWORD_LEN		128	/* max length, not counting NULL */
+#endif
+
+struct passwd {
+	char	*pw_name;		/* user name */
+	char	*pw_passwd;		/* encrypted password */
+	uid_t	pw_uid;			/* user uid */
+	gid_t	pw_gid;			/* user gid */
+	char	*pw_comment;		/* comment */
+	char	*pw_gecos;		/* Honeywell login info */
+	char	*pw_dir;		/* home directory */
+	char	*pw_shell;		/* default shell */
+};
+
+#ifndef __INSIDE_CYGWIN__
+struct passwd	*getpwuid (uid_t);
+struct passwd	*getpwnam (const char *);
+int 		 getpwnam_r (const char *, struct passwd *,
+			char *, size_t , struct passwd **);
+int		 getpwuid_r (uid_t, struct passwd *, char *,
+			size_t, struct passwd **);
+#ifndef _POSIX_SOURCE
+struct passwd	*getpwent (void);
+void		 setpwent (void);
+void		 endpwent (void);
+#endif
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _PWD_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/reent.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/reent.h
new file mode 100644
index 00000000..4617c0d9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/reent.h
@@ -0,0 +1,183 @@
+/* This header file provides the reentrancy.  */
+
+/* The reentrant system calls here serve two purposes:
+
+   1) Provide reentrant versions of the system calls the ANSI C library
+      requires.
+   2) Provide these system calls in a namespace clean way.
+
+   It is intended that *all* system calls that the ANSI C library needs
+   be declared here.  It documents them all in one place.  All library access
+   to the system is via some form of these functions.
+
+   The target may provide the needed syscalls by any of the following:
+
+   1) Define the reentrant versions of the syscalls directly.
+      (eg: _open_r, _close_r, etc.).  Please keep the namespace clean.
+      When you do this, set "syscall_dir" to "syscalls" and add
+      -DREENTRANT_SYSCALLS_PROVIDED to newlib_cflags in configure.host.
+
+   2) Define namespace clean versions of the system calls by prefixing
+      them with '_' (eg: _open, _close, etc.).  Technically, there won't be
+      true reentrancy at the syscall level, but the library will be namespace
+      clean.
+      When you do this, set "syscall_dir" to "syscalls" in configure.host.
+
+   3) Define or otherwise provide the regular versions of the syscalls
+      (eg: open, close, etc.).  The library won't be reentrant nor namespace
+      clean, but at least it will work.
+      When you do this, add -DMISSING_SYSCALL_NAMES to newlib_cflags in
+      configure.host.
+
+   4) Define or otherwise provide the regular versions of the syscalls,
+      and do not supply functional interfaces for any of the reentrant
+      calls. With this method, the reentrant syscalls are redefined to
+      directly call the regular system call without the reentrancy argument.
+      When you do this, specify both -DREENTRANT_SYSCALLS_PROVIDED and 
+      -DMISSING_SYSCALL_NAMES via newlib_cflags in configure.host and do
+      not specify "syscall_dir".
+
+   Stubs of the reentrant versions of the syscalls exist in the libc/reent
+   source directory and are provided if REENTRANT_SYSCALLS_PROVIDED isn't 
+   defined.  These stubs call the native system calls: _open, _close, etc. 
+   if MISSING_SYSCALL_NAMES is *not* defined, otherwise they call the
+   non-underscored versions: open, close, etc. when MISSING_SYSCALL_NAMES
+   *is* defined.
+
+   By default, newlib functions call the reentrant syscalls internally,
+   passing a reentrancy structure as an argument.  This reentrancy structure
+   contains data that is thread-specific.  For example, the errno value is
+   kept in the reentrancy structure.  If multiple threads exist, each will
+   keep a separate errno value which is intuitive since the application flow
+   cannot check for failure reliably otherwise.
+
+   The reentrant syscalls are either provided by the platform, by the 
+   libc/reent stubs, or in the case of both MISSING_SYSCALL_NAMES and 
+   REENTRANT_SYSCALLS_PROVIDED being defined, the calls are redefined to
+   simply call the regular syscalls with no reentrancy struct argument.
+
+   A single-threaded application does not need to worry about the reentrancy
+   structure.  It is used internally.  
+
+   A multi-threaded application needs either to manually manage reentrancy 
+   structures or use dynamic reentrancy.
+   
+   Manually managing reentrancy structures entails calling special reentrant
+   versions of newlib functions that have an additional reentrancy argument.
+   For example, _printf_r.  By convention, the first argument is the
+   reentrancy structure.  By default, the normal version of the function
+   uses the default reentrancy structure: _REENT.  The reentrancy structure
+   is passed internally, eventually to the reentrant syscalls themselves.
+   How the structures are stored and accessed in this model is up to the
+   application.
+
+   Dynamic reentrancy is specified by the __DYNAMIC_REENT__ flag.  This
+   flag denotes setting up a macro to replace _REENT with a function call
+   to __getreent().  This function needs to be implemented by the platform
+   and it is meant to return the reentrancy structure for the current
+   thread.  When the regular C functions (e.g. printf) go to call internal
+   routines with the default _REENT structure, they end up calling with 
+   the reentrancy structure for the thread.  Thus, application code does not
+   need to call the _r routines nor worry about reentrancy structures.  */
+
+/* WARNING: All identifiers here must begin with an underscore.  This file is
+   included by stdio.h and others and we therefore must only use identifiers
+   in the namespace allotted to us.  */
+
+#ifndef _REENT_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _REENT_H_
+
+#include <sys/reent.h>
+#include <sys/_types.h>
+#include <machine/types.h>
+
+#define __need_size_t
+#define __need_ptrdiff_t
+#include <stddef.h>
+
+/* FIXME: not namespace clean */
+struct stat;
+struct tms;
+struct timeval;
+struct timezone;
+
+#if defined(REENTRANT_SYSCALLS_PROVIDED) && defined(MISSING_SYSCALL_NAMES)
+
+#define _close_r(__reent, __fd)                   close(__fd)
+#define _execve_r(__reent, __f, __arg, __env)     execve(__f, __arg, __env)
+#define _fcntl_r(__reent, __fd, __cmd, __arg)     fcntl(__fd, __cmd, __arg)
+#define _fork_r(__reent)                          fork()
+#define _fstat_r(__reent, __fdes, __stat)         fstat(__fdes, __stat)
+#define _getpid_r(__reent)                        getpid()
+#define _isatty_r(__reent, __desc)                isatty(__desc)
+#define _kill_r(__reent, __pid, __signal)         kill(__pid, __signal)
+#define _link_r(__reent, __oldpath, __newpath)    link(__oldpath, __newpath)
+#define _lseek_r(__reent, __fdes, __off, __w)     lseek(__fdes, __off, __w)
+#define _mkdir_r(__reent, __path, __m)		  mkdir(__path, __m)
+#define _open_r(__reent, __path, __flag, __m)     open(__path, __flag, __m)
+#define _read_r(__reent, __fd, __buff, __cnt)     read(__fd, __buff, __cnt)
+#define _rename_r(__reent, __old, __new)	  rename(__old, __new)
+#define _sbrk_r(__reent, __incr)                  sbrk(__incr)
+#define _stat_r(__reent, __path, __buff)          stat(__path, __buff)
+#define _times_r(__reent, __time)                 times(__time)
+#define _unlink_r(__reent, __path)                unlink(__path)
+#define _wait_r(__reent, __status)                wait(__status)
+#define _write_r(__reent, __fd, __buff, __cnt)    write(__fd, __buff, __cnt)
+#define _gettimeofday_r(__reent, __tp, __tzp)     gettimeofday(__tp, __tzp)
+
+#ifdef __LARGE64_FILES
+#define _lseek64_r(__reent, __fd, __off, __w)     lseek64(__fd, __off, __w)
+#define _fstat64_r(__reent, __fd, __buff)         fstat64(__fd, __buff)
+#define _open64_r(__reent, __path, __flag, __m)   open64(__path, __flag, __m)
+#endif
+
+#else
+/* Reentrant versions of system calls.  */
+
+extern int _close_r _PARAMS ((struct _reent *, int));
+extern int _execve_r _PARAMS ((struct _reent *, const char *, char *const *, char *const *));
+extern int _fcntl_r _PARAMS ((struct _reent *, int, int, int));
+extern int _fork_r _PARAMS ((struct _reent *));
+extern int _fstat_r _PARAMS ((struct _reent *, int, struct stat *));
+extern int _getpid_r _PARAMS ((struct _reent *));
+extern int _isatty_r _PARAMS ((struct _reent *, int));
+extern int _kill_r _PARAMS ((struct _reent *, int, int));
+extern int _link_r _PARAMS ((struct _reent *, const char *, const char *));
+extern _off_t _lseek_r _PARAMS ((struct _reent *, int, _off_t, int));
+extern int _mkdir_r _PARAMS ((struct _reent *, const char *, int));
+extern int _open_r _PARAMS ((struct _reent *, const char *, int, int));
+extern _ssize_t _read_r _PARAMS ((struct _reent *, int, void *, size_t));
+extern int _rename_r _PARAMS ((struct _reent *, const char *, const char *));
+extern void *_sbrk_r _PARAMS ((struct _reent *, ptrdiff_t));
+extern int _stat_r _PARAMS ((struct _reent *, const char *, struct stat *));
+extern _CLOCK_T_ _times_r _PARAMS ((struct _reent *, struct tms *));
+extern int _unlink_r _PARAMS ((struct _reent *, const char *));
+extern int _wait_r _PARAMS ((struct _reent *, int *));
+extern _ssize_t _write_r _PARAMS ((struct _reent *, int, const void *, size_t));
+
+/* This one is not guaranteed to be available on all targets.  */
+extern int _gettimeofday_r _PARAMS ((struct _reent *, struct timeval *__tp, void *__tzp));
+
+#ifdef __LARGE64_FILES
+
+#if defined(__CYGWIN__) && defined(_COMPILING_NEWLIB)
+#define stat64 __stat64
+#endif
+
+struct stat64;
+
+extern _off64_t _lseek64_r _PARAMS ((struct _reent *, int, _off64_t, int));
+extern int _fstat64_r _PARAMS ((struct _reent *, int, struct stat64 *));
+extern int _open64_r _PARAMS ((struct _reent *, const char *, int, int));
+extern int _stat64_r _PARAMS ((struct _reent *, const char *, struct stat64 *));
+#endif
+
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _REENT_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regdef.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regdef.h
new file mode 100644
index 00000000..8cf144b8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regdef.h
@@ -0,0 +1,7 @@
+/* regdef.h -- define register names.  */
+
+/* This is a standard include file for MIPS targets.  Other target
+   probably don't define it, and attempts to include this file will
+   fail.  */
+
+#include <machine/regdef.h>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regex.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regex.h
new file mode 100644
index 00000000..2ac78f4c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/regex.h
@@ -0,0 +1,102 @@
+/*-
+ * Copyright (c) 1992 Henry Spencer.
+ * Copyright (c) 1992, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Henry Spencer of the University of Toronto.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)regex.h	8.2 (Berkeley) 1/3/94
+ * $FreeBSD: src/include/regex.h,v 1.4 2002/03/23 17:24:53 imp Exp $
+ */
+
+#ifndef _REGEX_H_
+#define	_REGEX_H_
+
+#include <sys/cdefs.h>
+
+/* types */
+typedef off_t regoff_t;
+
+typedef struct {
+	int re_magic;
+	size_t re_nsub;		/* number of parenthesized subexpressions */
+	__const char *re_endp;	/* end pointer for REG_PEND */
+	struct re_guts *re_g;	/* none of your business :-) */
+} regex_t;
+
+typedef struct {
+	regoff_t rm_so;		/* start of match */
+	regoff_t rm_eo;		/* end of match */
+} regmatch_t;
+
+/* regcomp() flags */
+#define	REG_BASIC	0000
+#define	REG_EXTENDED	0001
+#define	REG_ICASE	0002
+#define	REG_NOSUB	0004
+#define	REG_NEWLINE	0010
+#define	REG_NOSPEC	0020
+#define	REG_PEND	0040
+#define	REG_DUMP	0200
+
+/* regerror() flags */
+#define	REG_NOMATCH	 1
+#define	REG_BADPAT	 2
+#define	REG_ECOLLATE	 3
+#define	REG_ECTYPE	 4
+#define	REG_EESCAPE	 5
+#define	REG_ESUBREG	 6
+#define	REG_EBRACK	 7
+#define	REG_EPAREN	 8
+#define	REG_EBRACE	 9
+#define	REG_BADBR	10
+#define	REG_ERANGE	11
+#define	REG_ESPACE	12
+#define	REG_BADRPT	13
+#define	REG_EMPTY	14
+#define	REG_ASSERT	15
+#define	REG_INVARG	16
+#define	REG_ATOI	255	/* convert name to number (!) */
+#define	REG_ITOA	0400	/* convert number to name (!) */
+
+/* regexec() flags */
+#define	REG_NOTBOL	00001
+#define	REG_NOTEOL	00002
+#define	REG_STARTEND	00004
+#define	REG_TRACE	00400	/* tracing of execution */
+#define	REG_LARGE	01000	/* force large representation */
+#define	REG_BACKR	02000	/* force use of backref code */
+
+__BEGIN_DECLS
+int	regcomp(regex_t *, const char *, int);
+size_t	regerror(int, const regex_t *, char *, size_t);
+int	regexec(const regex_t *, const char *, size_t, regmatch_t [], int);
+void	regfree(regex_t *);
+__END_DECLS
+
+#endif /* !_REGEX_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sched.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sched.h
new file mode 100644
index 00000000..a3f58ac9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sched.h
@@ -0,0 +1,97 @@
+/*
+ *  Written by Joel Sherrill <joel@OARcorp.com>.
+ *
+ *  COPYRIGHT (c) 1989-2010.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Permission to use, copy, modify, and distribute this software for any
+ *  purpose without fee is hereby granted, provided that this entire notice
+ *  is included in all copies of any software which is or includes a copy
+ *  or modification of this software.
+ *
+ *  THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY.  IN PARTICULAR,  THE AUTHOR MAKES NO REPRESENTATION
+ *  OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS
+ *  SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ *  $Id: sched.h,v 1.2 2010/04/01 18:33:33 jjohnstn Exp $
+ */
+
+#ifndef _SCHED_H_
+#define _SCHED_H_
+
+#include <sys/types.h>
+#include <sys/sched.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if defined(_POSIX_PRIORITY_SCHEDULING)
+/*
+ *  XBD 13 - Set Scheduling Parameters, P1003.1b-2008, p. 1803
+ */
+int sched_setparam(
+  pid_t                     __pid,
+  const struct sched_param *__param
+);
+
+/*
+ *  XBD 13 - Set Scheduling Parameters, P1003.1b-2008, p. 1800
+ */
+int sched_getparam(
+  pid_t                     __pid,
+  struct sched_param       *__param
+);
+
+/*
+ *  XBD 13 - Set Scheduling Policy and Scheduling Parameters,
+ *         P1003.1b-2008, p. 1805
+ */
+int sched_setscheduler(
+  pid_t                     __pid,
+  int                       __policy,
+  const struct sched_param *__param
+);
+
+/*
+ *  XBD 13 - Get Scheduling Policy, P1003.1b-2008, p. 1801
+ */
+int sched_getscheduler(
+  pid_t                     __pid
+);
+
+/*
+ *  XBD 13 - Get Scheduling Parameter Limits, P1003.1b-2008, p. 1799
+ */
+int sched_get_priority_max(
+  int __policy
+);
+
+int sched_get_priority_min(
+  int  __policy
+);
+
+/*
+ *  XBD 13 - Get Scheduling Parameter Limits, P1003.1b-2008, p. 1802
+ */
+int sched_rr_get_interval(
+  pid_t             __pid,
+  struct timespec  *__interval
+);
+#endif /* _POSIX_PRIORITY_SCHEDULING */
+
+#if defined(_POSIX_THREADS) || defined(_POSIX_PRIORITY_SCHEDULING)
+
+/*
+ *  XBD 13 - Yield Processor, P1003.1b-2008, p. 1807
+ */
+int sched_yield( void );
+
+#endif /* _POSIX_THREADS or _POSIX_PRIORITY_SCHEDULING */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _SCHED_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/search.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/search.h
new file mode 100644
index 00000000..c78ce184
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/search.h
@@ -0,0 +1,59 @@
+/*	$NetBSD: search.h,v 1.12 1999/02/22 10:34:28 christos Exp $	*/
+/* $FreeBSD: src/include/search.h,v 1.4 2002/03/23 17:24:53 imp Exp $ */
+
+/*
+ * Written by J.T. Conklin <jtc@netbsd.org>
+ * Public domain.
+ */
+
+#ifndef _SEARCH_H_
+#define _SEARCH_H_
+
+#include <sys/cdefs.h>
+#include <machine/ansi.h>
+#include <sys/types.h>
+
+typedef struct entry {
+	char *key;
+	void *data;
+} ENTRY;
+
+typedef enum {
+	FIND, ENTER
+} ACTION;
+
+typedef enum {
+	preorder,
+	postorder,
+	endorder,
+	leaf
+} VISIT;
+
+#ifdef _SEARCH_PRIVATE
+typedef struct node {
+	char         *key;
+	struct node  *llink, *rlink;
+} node_t;
+#endif
+
+struct hsearch_data
+{
+  struct internal_head *htable;
+  size_t htablesize;
+};
+
+__BEGIN_DECLS
+int	 hcreate(size_t);
+void	 hdestroy(void);
+ENTRY	*hsearch(ENTRY, ACTION);
+int	 hcreate_r(size_t, struct hsearch_data *);
+void	 hdestroy_r(struct hsearch_data *);
+int	hsearch_r(ENTRY, ACTION, ENTRY **, struct hsearch_data *);
+void	*tdelete(const void *, void **, int (*)(const void *, const void *));
+void	tdestroy (void *, void (*)(void *));
+void	*tfind(const void *, void **, int (*)(const void *, const void *));
+void	*tsearch(const void *, void **, int (*)(const void *, const void *));
+void      twalk(const void *, void (*)(const void *, VISIT, int));
+__END_DECLS
+
+#endif /* !_SEARCH_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/setjmp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/setjmp.h
new file mode 100644
index 00000000..c958d904
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/setjmp.h
@@ -0,0 +1,20 @@
+/*
+	setjmp.h
+	stubs for future use.
+*/
+
+#ifndef _SETJMP_H_
+#define _SETJMP_H_
+
+#include "_ansi.h"
+#include <machine/setjmp.h>
+
+_BEGIN_STD_C
+
+void	_EXFUN(longjmp,(jmp_buf __jmpb, int __retval));
+int	_EXFUN(setjmp,(jmp_buf __jmpb));
+
+_END_STD_C
+
+#endif /* _SETJMP_H_ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/signal.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/signal.h
new file mode 100644
index 00000000..8c50a2eb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/signal.h
@@ -0,0 +1,32 @@
+#ifndef _SIGNAL_H_
+#define _SIGNAL_H_
+
+#include "_ansi.h"
+#include <sys/signal.h>
+
+_BEGIN_STD_C
+
+typedef int	sig_atomic_t;		/* Atomic entity type (ANSI) */
+#ifndef _POSIX_SOURCE
+typedef _sig_func_ptr sig_t;		/* BSD naming */
+typedef _sig_func_ptr sighandler_t;	/* glibc naming */
+#endif /* !_POSIX_SOURCE */
+
+#define SIG_DFL ((_sig_func_ptr)0)	/* Default action */
+#define SIG_IGN ((_sig_func_ptr)1)	/* Ignore action */
+#define SIG_ERR ((_sig_func_ptr)-1)	/* Error return */
+
+struct _reent;
+
+_sig_func_ptr _EXFUN(_signal_r, (struct _reent *, int, _sig_func_ptr));
+int	_EXFUN(_raise_r, (struct _reent *, int));
+
+#ifndef _REENT_ONLY
+_sig_func_ptr _EXFUN(signal, (int, _sig_func_ptr));
+int	_EXFUN(raise, (int));
+void	_EXFUN(psignal, (int, const char *));
+#endif
+
+_END_STD_C
+
+#endif /* _SIGNAL_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdint.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdint.h
new file mode 100644
index 00000000..d0374ae2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdint.h
@@ -0,0 +1,493 @@
+/*
+ * Copyright (c) 2004, 2005 by
+ * Ralf Corsepius, Ulm/Germany. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software
+ * is freely granted, provided that this notice is preserved.
+ */
+
+#ifndef _STDINT_H
+#define _STDINT_H
+
+#include <_ansi.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#if __GNUC_PREREQ (3, 2)
+/* gcc > 3.2 implicitly defines the values we are interested */
+#define __STDINT_EXP(x) __##x##__
+#else
+#define __STDINT_EXP(x) x
+#include <limits.h>
+#endif
+
+/* Check if "long long" is 64bit wide */
+/* Modern GCCs provide __LONG_LONG_MAX__, SUSv3 wants LLONG_MAX */
+#if ( defined(__LONG_LONG_MAX__) && (__LONG_LONG_MAX__ > 0x7fffffff) ) \
+  || ( defined(LLONG_MAX) && (LLONG_MAX > 0x7fffffff) )
+#define __have_longlong64 1
+#endif
+
+/* Check if "long" is 64bit or 32bit wide */
+#if __STDINT_EXP(LONG_MAX) > 0x7fffffff
+#define __have_long64 1
+#elif __STDINT_EXP(LONG_MAX) == 0x7fffffff && !defined(__SPU__)
+#define __have_long32 1
+#endif
+
+#if __STDINT_EXP(SCHAR_MAX) == 0x7f
+typedef signed char int8_t ;
+typedef unsigned char uint8_t ;
+#define __int8_t_defined 1
+#endif
+
+#if __int8_t_defined
+typedef signed char int_least8_t;
+typedef unsigned char uint_least8_t;
+#define __int_least8_t_defined 1
+#endif
+
+#if __STDINT_EXP(SHRT_MAX) == 0x7fff
+typedef signed short int16_t;
+typedef unsigned short uint16_t;
+#define __int16_t_defined 1
+#elif __STDINT_EXP(INT_MAX) == 0x7fff
+typedef signed int int16_t;
+typedef unsigned int uint16_t;
+#define __int16_t_defined 1
+#elif __STDINT_EXP(SCHAR_MAX) == 0x7fff
+typedef signed char int16_t;
+typedef unsigned char uint16_t;
+#define __int16_t_defined 1
+#endif
+
+#if __int16_t_defined
+typedef int16_t   	int_least16_t;
+typedef uint16_t 	uint_least16_t;
+#define __int_least16_t_defined 1
+
+#if !__int_least8_t_defined
+typedef int16_t	   	int_least8_t;
+typedef uint16_t  	uint_least8_t;
+#define __int_least8_t_defined 1
+#endif
+#endif
+
+#if __have_long32
+typedef signed long int32_t;
+typedef unsigned long uint32_t;
+#define __int32_t_defined 1
+#elif __STDINT_EXP(INT_MAX) == 0x7fffffffL
+typedef signed int int32_t;
+typedef unsigned int uint32_t;
+#define __int32_t_defined 1
+#elif __STDINT_EXP(SHRT_MAX) == 0x7fffffffL
+typedef signed short int32_t;
+typedef unsigned short uint32_t;
+#define __int32_t_defined 1
+#elif __STDINT_EXP(SCHAR_MAX) == 0x7fffffffL
+typedef signed char int32_t;
+typedef unsigned char uint32_t;
+#define __int32_t_defined 1
+#endif
+
+#if __int32_t_defined
+typedef int32_t   	int_least32_t;
+typedef uint32_t 	uint_least32_t;
+#define __int_least32_t_defined 1
+
+#if !__int_least8_t_defined
+typedef int32_t	   	int_least8_t;
+typedef uint32_t  	uint_least8_t;
+#define __int_least8_t_defined 1
+#endif
+
+#if !__int_least16_t_defined
+typedef int32_t	   	int_least16_t;
+typedef uint32_t  	uint_least16_t;
+#define __int_least16_t_defined 1
+#endif
+#endif
+
+#if __have_long64
+typedef signed long int64_t;
+typedef unsigned long uint64_t;
+#define __int64_t_defined 1
+#elif __have_longlong64
+typedef signed long long int64_t;
+typedef unsigned long long uint64_t;
+#define __int64_t_defined 1
+#elif  __STDINT_EXP(INT_MAX) > 0x7fffffff
+typedef signed int int64_t;
+typedef unsigned int uint64_t;
+#define __int64_t_defined 1
+#endif
+
+#if __int64_t_defined
+typedef int64_t   	int_least64_t;
+typedef uint64_t 	uint_least64_t;
+#define __int_least64_t_defined 1
+
+#if !__int_least8_t_defined
+typedef int64_t	   	int_least8_t;
+typedef uint64_t  	uint_least8_t;
+#define __int_least8_t_defined 1
+#endif
+
+#if !__int_least16_t_defined
+typedef int64_t	   	int_least16_t;
+typedef uint64_t  	uint_least16_t;
+#define __int_least16_t_defined 1
+#endif
+
+#if !__int_least32_t_defined
+typedef int64_t	   	int_least32_t;
+typedef uint64_t  	uint_least32_t;
+#define __int_least32_t_defined 1
+#endif
+#endif
+
+/*
+ * Fastest minimum-width integer types
+ *
+ * Assume int to be the fastest type for all types with a width 
+ * less than __INT_MAX__ rsp. INT_MAX
+ */
+#if __STDINT_EXP(INT_MAX) >= 0x7f
+  typedef signed int int_fast8_t;
+  typedef unsigned int uint_fast8_t;
+#define __int_fast8_t_defined 1
+#endif
+
+#if __STDINT_EXP(INT_MAX) >= 0x7fff
+  typedef signed int int_fast16_t;
+  typedef unsigned int uint_fast16_t;
+#define __int_fast16_t_defined 1
+#endif
+
+#if __STDINT_EXP(INT_MAX) >= 0x7fffffff
+  typedef signed int int_fast32_t;
+  typedef unsigned int uint_fast32_t;
+#define __int_fast32_t_defined 1
+#endif
+
+#if __STDINT_EXP(INT_MAX) > 0x7fffffff
+  typedef signed int int_fast64_t;
+  typedef unsigned int uint_fast64_t;
+#define __int_fast64_t_defined 1
+#endif
+
+/*
+ * Fall back to [u]int_least<N>_t for [u]int_fast<N>_t types
+ * not having been defined, yet.
+ * Leave undefined, if [u]int_least<N>_t should not be available.
+ */
+#if !__int_fast8_t_defined
+#if __int_least8_t_defined
+  typedef int_least8_t int_fast8_t;
+  typedef uint_least8_t uint_fast8_t;
+#define __int_fast8_t_defined 1
+#endif
+#endif
+
+#if !__int_fast16_t_defined
+#if __int_least16_t_defined
+  typedef int_least16_t int_fast16_t;
+  typedef uint_least16_t uint_fast16_t;
+#define __int_fast16_t_defined 1
+#endif
+#endif
+
+#if !__int_fast32_t_defined
+#if __int_least32_t_defined
+  typedef int_least32_t int_fast32_t;
+  typedef uint_least32_t uint_fast32_t;
+#define __int_fast32_t_defined 1
+#endif
+#endif
+
+#if !__int_fast64_t_defined
+#if __int_least64_t_defined
+  typedef int_least64_t int_fast64_t;
+  typedef uint_least64_t uint_fast64_t;
+#define __int_fast64_t_defined 1
+#endif
+#endif
+
+/* Greatest-width integer types */
+/* Modern GCCs provide __INTMAX_TYPE__ */
+#if defined(__INTMAX_TYPE__)
+  typedef __INTMAX_TYPE__ intmax_t;
+#elif __have_longlong64
+  typedef signed long long intmax_t;
+#else
+  typedef signed long intmax_t;
+#endif
+
+/* Modern GCCs provide __UINTMAX_TYPE__ */
+#if defined(__UINTMAX_TYPE__)
+  typedef __UINTMAX_TYPE__ uintmax_t;
+#elif __have_longlong64
+  typedef unsigned long long uintmax_t;
+#else
+  typedef unsigned long uintmax_t;
+#endif
+
+/*
+ * GCC doesn't provide an appropriate macro for [u]intptr_t
+ * For now, use __PTRDIFF_TYPE__
+ */
+#if defined(__PTRDIFF_TYPE__)
+typedef signed __PTRDIFF_TYPE__ intptr_t;
+typedef unsigned __PTRDIFF_TYPE__ uintptr_t;
+#define INTPTR_MAX PTRDIFF_MAX
+#define INTPTR_MIN PTRDIFF_MIN
+#ifdef __UINTPTR_MAX__
+#define UINTPTR_MAX __UINTPTR_MAX__
+#else
+#define UINTPTR_MAX (2UL * PTRDIFF_MAX + 1)
+#endif
+#else
+/*
+ * Fallback to hardcoded values, 
+ * should be valid on cpu's with 32bit int/32bit void*
+ */
+typedef signed long intptr_t;
+typedef unsigned long uintptr_t;
+#define INTPTR_MAX __STDINT_EXP(LONG_MAX)
+#define INTPTR_MIN (-__STDINT_EXP(LONG_MAX) - 1)
+#define UINTPTR_MAX (__STDINT_EXP(LONG_MAX) * 2UL + 1)
+#endif
+
+/* Limits of Specified-Width Integer Types */
+
+#if __int8_t_defined
+#define INT8_MIN 	-128
+#define INT8_MAX 	 127
+#define UINT8_MAX 	 255
+#endif
+
+#if __int_least8_t_defined
+#define INT_LEAST8_MIN 	-128
+#define INT_LEAST8_MAX 	 127
+#define UINT_LEAST8_MAX	 255
+#else
+#error required type int_least8_t missing
+#endif
+
+#if __int16_t_defined
+#define INT16_MIN 	-32768
+#define INT16_MAX 	 32767
+#define UINT16_MAX 	 65535
+#endif
+
+#if __int_least16_t_defined
+#define INT_LEAST16_MIN	-32768
+#define INT_LEAST16_MAX	 32767
+#define UINT_LEAST16_MAX 65535
+#else
+#error required type int_least16_t missing
+#endif
+
+#if __int32_t_defined
+#if __have_long32
+#define INT32_MIN 	 (-2147483647L-1)
+#define INT32_MAX 	 2147483647L
+#define UINT32_MAX       4294967295UL
+#else
+#define INT32_MIN 	 (-2147483647-1)
+#define INT32_MAX 	 2147483647
+#define UINT32_MAX       4294967295U
+#endif
+#endif
+
+#if __int_least32_t_defined
+#if __have_long32
+#define INT_LEAST32_MIN  (-2147483647L-1)
+#define INT_LEAST32_MAX  2147483647L
+#define UINT_LEAST32_MAX 4294967295UL
+#else
+#define INT_LEAST32_MIN  (-2147483647-1)
+#define INT_LEAST32_MAX  2147483647
+#define UINT_LEAST32_MAX 4294967295U
+#endif
+#else
+#error required type int_least32_t missing
+#endif
+
+#if __int64_t_defined
+#if __have_long64
+#define INT64_MIN 	(-9223372036854775807L-1L)
+#define INT64_MAX 	 9223372036854775807L
+#define UINT64_MAX 	18446744073709551615U
+#elif __have_longlong64
+#define INT64_MIN 	(-9223372036854775807LL-1LL)
+#define INT64_MAX 	 9223372036854775807LL
+#define UINT64_MAX 	18446744073709551615ULL
+#endif
+#endif
+
+#if __int_least64_t_defined
+#if __have_long64
+#define INT_LEAST64_MIN  (-9223372036854775807L-1L)
+#define INT_LEAST64_MAX  9223372036854775807L
+#define UINT_LEAST64_MAX 18446744073709551615U
+#elif __have_longlong64
+#define INT_LEAST64_MIN  (-9223372036854775807LL-1LL)
+#define INT_LEAST64_MAX  9223372036854775807LL
+#define UINT_LEAST64_MAX 18446744073709551615ULL
+#endif
+#endif
+
+#if __int_fast8_t_defined
+#if __STDINT_EXP(INT_MAX) >= 0x7f
+#define INT_FAST8_MIN	(-__STDINT_EXP(INT_MAX)-1)
+#define INT_FAST8_MAX	__STDINT_EXP(INT_MAX)
+#define UINT_FAST8_MAX	(__STDINT_EXP(INT_MAX)*2U+1U)
+#else
+#define INT_FAST8_MIN	INT_LEAST8_MIN
+#define INT_FAST8_MAX	INT_LEAST8_MAX
+#define UINT_FAST8_MAX	UINT_LEAST8_MAX
+#endif
+#endif
+
+#if __int_fast16_t_defined
+#if __STDINT_EXP(INT_MAX) >= 0x7fff
+#define INT_FAST16_MIN	(-__STDINT_EXP(INT_MAX)-1)
+#define INT_FAST16_MAX	__STDINT_EXP(INT_MAX)
+#define UINT_FAST16_MAX	(__STDINT_EXP(INT_MAX)*2U+1U)
+#else
+#define INT_FAST16_MIN	INT_LEAST16_MIN
+#define INT_FAST16_MAX	INT_LEAST16_MAX
+#define UINT_FAST16_MAX	UINT_LEAST16_MAX
+#endif
+#endif
+
+#if __int_fast32_t_defined
+#if __STDINT_EXP(INT_MAX) >= 0x7fffffff
+#define INT_FAST32_MIN	(-__STDINT_EXP(INT_MAX)-1)
+#define INT_FAST32_MAX	__STDINT_EXP(INT_MAX)
+#define UINT_FAST32_MAX	(__STDINT_EXP(INT_MAX)*2U+1U)
+#else
+#define INT_FAST32_MIN	INT_LEAST32_MIN
+#define INT_FAST32_MAX	INT_LEAST32_MAX
+#define UINT_FAST32_MAX	UINT_LEAST32_MAX
+#endif
+#endif
+
+#if __int_fast64_t_defined
+#if __STDINT_EXP(INT_MAX) > 0x7fffffff
+#define INT_FAST64_MIN	(-__STDINT_EXP(INT_MAX)-1)
+#define INT_FAST64_MAX	__STDINT_EXP(INT_MAX)
+#define UINT_FAST64_MAX	(__STDINT_EXP(INT_MAX)*2U+1U)
+#else
+#define INT_FAST64_MIN	INT_LEAST64_MIN
+#define INT_FAST64_MAX	INT_LEAST64_MAX
+#define UINT_FAST64_MAX	UINT_LEAST64_MAX
+#endif
+#endif
+
+#ifdef __INTMAX_MAX__
+#define INTMAX_MAX __INTMAX_MAX__
+#define INTMAX_MIN (-INTMAX_MAX - 1)
+#elif defined(__INTMAX_TYPE__)
+/* All relevant GCC versions prefer long to long long for intmax_t.  */
+#define INTMAX_MAX INT64_MAX
+#define INTMAX_MIN INT64_MIN
+#endif
+
+#ifdef __UINTMAX_MAX__
+#define UINTMAX_MAX __UINTMAX_MAX__
+#elif defined(__UINTMAX_TYPE__)
+/* All relevant GCC versions prefer long to long long for intmax_t.  */
+#define UINTMAX_MAX UINT64_MAX
+#endif
+
+/* This must match size_t in stddef.h, currently long unsigned int */
+#ifdef __SIZE_MAX__
+#define SIZE_MAX __SIZE_MAX__
+#else
+#define SIZE_MAX (__STDINT_EXP(LONG_MAX) * 2UL + 1)
+#endif
+
+/* This must match sig_atomic_t in <signal.h> (currently int) */
+#define SIG_ATOMIC_MIN (-__STDINT_EXP(INT_MAX) - 1)
+#define SIG_ATOMIC_MAX __STDINT_EXP(INT_MAX)
+
+/* This must match ptrdiff_t  in <stddef.h> (currently long int) */
+#ifdef __PTRDIFF_MAX__
+#define PTRDIFF_MAX __PTRDIFF_MAX__
+#else
+#define PTRDIFF_MAX __STDINT_EXP(LONG_MAX)
+#endif
+#define PTRDIFF_MIN (-PTRDIFF_MAX - 1)
+
+#ifdef __WCHAR_MAX__
+#define WCHAR_MAX __WCHAR_MAX__
+#endif
+#ifdef __WCHAR_MIN__
+#define WCHAR_MIN __WCHAR_MIN__
+#endif
+
+/* wint_t is unsigned int on almost all GCC targets.  */
+#ifdef __WINT_MAX__
+#define WINT_MAX __WINT_MAX__
+#else
+#define WINT_MAX (__STDINT_EXP(INT_MAX) * 2U + 1U)
+#endif
+#ifdef __WINT_MIN__
+#define WINT_MIN __WINT_MIN__
+#else
+#define WINT_MIN 0U
+#endif
+
+/** Macros for minimum-width integer constant expressions */
+#define INT8_C(x)	x
+#if __STDINT_EXP(INT_MAX) > 0x7f
+#define UINT8_C(x)	x
+#else
+#define UINT8_C(x)	x##U
+#endif
+
+#define INT16_C(x)	x
+#if __STDINT_EXP(INT_MAX) > 0x7fff
+#define UINT16_C(x)	x
+#else
+#define UINT16_C(x)	x##U
+#endif
+
+#if __have_long32
+#define INT32_C(x)	x##L
+#define UINT32_C(x)	x##UL
+#else
+#define INT32_C(x)	x
+#define UINT32_C(x)	x##U
+#endif
+
+#if __int64_t_defined
+#if __have_long64
+#define INT64_C(x)	x##L
+#define UINT64_C(x)	x##UL
+#else
+#define INT64_C(x)	x##LL
+#define UINT64_C(x)	x##ULL
+#endif
+#endif
+
+/** Macros for greatest-width integer constant expression */
+#if __have_long64
+#define INTMAX_C(x)	x##L
+#define UINTMAX_C(x)	x##UL
+#else
+#define INTMAX_C(x)	x##LL
+#define UINTMAX_C(x)	x##ULL
+#endif
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _STDINT_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio.h
new file mode 100644
index 00000000..534719af
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio.h
@@ -0,0 +1,685 @@
+/*
+ * Copyright (c) 1990 The Regents of the University of California.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms are permitted
+ * provided that the above copyright notice and this paragraph are
+ * duplicated in all such forms and that any documentation,
+ * advertising materials, and other materials related to such
+ * distribution and use acknowledge that the software was developed
+ * by the University of California, Berkeley.  The name of the
+ * University may not be used to endorse or promote products derived
+ * from this software without specific prior written permission.
+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE.
+ *
+ *	@(#)stdio.h	5.3 (Berkeley) 3/15/86
+ */
+
+/*
+ * NB: to fit things in six character monocase externals, the
+ * stdio code uses the prefix `__s' for stdio objects, typically
+ * followed by a three-character attempt at a mnemonic.
+ */
+
+#ifndef _STDIO_H_
+#define	_STDIO_H_
+
+#include "_ansi.h"
+
+#define	_FSTDIO			/* ``function stdio'' */
+
+#define __need_size_t
+#define __need_NULL
+#include <stddef.h>
+
+#define __need___va_list
+#include <stdarg.h>
+
+/*
+ * <sys/reent.h> defines __FILE, _fpos_t.
+ * They must be defined there because struct _reent needs them (and we don't
+ * want reent.h to include this file.
+ */
+
+#include <sys/reent.h>
+#include <sys/types.h>
+
+_BEGIN_STD_C
+
+typedef __FILE FILE;
+
+#ifdef __CYGWIN__
+typedef _fpos64_t fpos_t;
+#else
+typedef _fpos_t fpos_t;
+#ifdef __LARGE64_FILES
+typedef _fpos64_t fpos64_t;
+#endif
+#endif /* !__CYGWIN__ */
+
+#include <sys/stdio.h>
+
+#define	__SLBF	0x0001		/* line buffered */
+#define	__SNBF	0x0002		/* unbuffered */
+#define	__SRD	0x0004		/* OK to read */
+#define	__SWR	0x0008		/* OK to write */
+	/* RD and WR are never simultaneously asserted */
+#define	__SRW	0x0010		/* open for reading & writing */
+#define	__SEOF	0x0020		/* found EOF */
+#define	__SERR	0x0040		/* found error */
+#define	__SMBF	0x0080		/* _buf is from malloc */
+#define	__SAPP	0x0100		/* fdopen()ed in append mode - so must  write to end */
+#define	__SSTR	0x0200		/* this is an sprintf/snprintf string */
+#define	__SOPT	0x0400		/* do fseek() optimisation */
+#define	__SNPT	0x0800		/* do not do fseek() optimisation */
+#define	__SOFF	0x1000		/* set iff _offset is in fact correct */
+#define	__SORD	0x2000		/* true => stream orientation (byte/wide) decided */
+#if defined(__CYGWIN__)
+#  define __SCLE  0x4000        /* convert line endings CR/LF <-> NL */
+#endif
+#define	__SL64	0x8000		/* is 64-bit offset large file */
+
+/* _flags2 flags */
+#define	__SWID	0x2000		/* true => stream orientation wide, false => byte, only valid if __SORD in _flags is true */
+
+/*
+ * The following three definitions are for ANSI C, which took them
+ * from System V, which stupidly took internal interface macros and
+ * made them official arguments to setvbuf(), without renaming them.
+ * Hence, these ugly _IOxxx names are *supposed* to appear in user code.
+ *
+ * Although these happen to match their counterparts above, the
+ * implementation does not rely on that (so these could be renumbered).
+ */
+#define	_IOFBF	0		/* setvbuf should set fully buffered */
+#define	_IOLBF	1		/* setvbuf should set line buffered */
+#define	_IONBF	2		/* setvbuf should set unbuffered */
+
+#define	EOF	(-1)
+
+#ifdef __BUFSIZ__
+#define	BUFSIZ		__BUFSIZ__
+#else
+#define	BUFSIZ		1024
+#endif
+
+#ifdef __FOPEN_MAX__
+#define FOPEN_MAX	__FOPEN_MAX__
+#else
+#define	FOPEN_MAX	20
+#endif
+
+#ifdef __FILENAME_MAX__
+#define FILENAME_MAX    __FILENAME_MAX__
+#else
+#define	FILENAME_MAX	1024
+#endif
+
+#ifdef __L_tmpnam__
+#define L_tmpnam	__L_tmpnam__
+#else
+#define	L_tmpnam	FILENAME_MAX
+#endif
+
+#ifndef __STRICT_ANSI__
+#define P_tmpdir        "/tmp"
+#endif
+
+#ifndef SEEK_SET
+#define	SEEK_SET	0	/* set file offset to offset */
+#endif
+#ifndef SEEK_CUR
+#define	SEEK_CUR	1	/* set file offset to current plus offset */
+#endif
+#ifndef SEEK_END
+#define	SEEK_END	2	/* set file offset to EOF plus offset */
+#endif
+
+#define	TMP_MAX		26
+
+#ifndef _REENT_ONLY
+#define	stdin	(_REENT->_stdin)
+#define	stdout	(_REENT->_stdout)
+#define	stderr	(_REENT->_stderr)
+#else /* _REENT_ONLY */
+#define	stdin	(_impure_ptr->_stdin)
+#define	stdout	(_impure_ptr->_stdout)
+#define	stderr	(_impure_ptr->_stderr)
+#endif /* _REENT_ONLY */
+
+#define _stdin_r(x)	((x)->_stdin)
+#define _stdout_r(x)	((x)->_stdout)
+#define _stderr_r(x)	((x)->_stderr)
+
+/*
+ * Functions defined in ANSI C standard.
+ */
+
+#ifndef __VALIST
+#ifdef __GNUC__
+#define __VALIST __gnuc_va_list
+#else
+#define __VALIST char*
+#endif
+#endif
+
+FILE *	_EXFUN(tmpfile, (void));
+char *	_EXFUN(tmpnam, (char *));
+int	_EXFUN(fclose, (FILE *));
+int	_EXFUN(fflush, (FILE *));
+FILE *	_EXFUN(freopen, (const char *, const char *, FILE *));
+void	_EXFUN(setbuf, (FILE *, char *));
+int	_EXFUN(setvbuf, (FILE *, char *, int, size_t));
+int	_EXFUN(fprintf, (FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(fscanf, (FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+int	_EXFUN(printf, (const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 1, 2))));
+int	_EXFUN(scanf, (const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 1, 2))));
+int	_EXFUN(sscanf, (const char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+int	_EXFUN(vfprintf, (FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(vprintf, (const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 1, 0))));
+int	_EXFUN(vsprintf, (char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(fgetc, (FILE *));
+char *  _EXFUN(fgets, (char *, int, FILE *));
+int	_EXFUN(fputc, (int, FILE *));
+int	_EXFUN(fputs, (const char *, FILE *));
+int	_EXFUN(getc, (FILE *));
+int	_EXFUN(getchar, (void));
+char *  _EXFUN(gets, (char *));
+int	_EXFUN(putc, (int, FILE *));
+int	_EXFUN(putchar, (int));
+int	_EXFUN(puts, (const char *));
+int	_EXFUN(ungetc, (int, FILE *));
+size_t	_EXFUN(fread, (_PTR, size_t _size, size_t _n, FILE *));
+size_t	_EXFUN(fwrite, (const _PTR , size_t _size, size_t _n, FILE *));
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(fgetpos, (FILE *, _fpos_t *));
+#else
+int	_EXFUN(fgetpos, (FILE *, fpos_t *));
+#endif
+int	_EXFUN(fseek, (FILE *, long, int));
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(fsetpos, (FILE *, const _fpos_t *));
+#else
+int	_EXFUN(fsetpos, (FILE *, const fpos_t *));
+#endif
+long	_EXFUN(ftell, ( FILE *));
+void	_EXFUN(rewind, (FILE *));
+void	_EXFUN(clearerr, (FILE *));
+int	_EXFUN(feof, (FILE *));
+int	_EXFUN(ferror, (FILE *));
+void    _EXFUN(perror, (const char *));
+#ifndef _REENT_ONLY
+FILE *	_EXFUN(fopen, (const char *_name, const char *_type));
+int	_EXFUN(sprintf, (char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(remove, (const char *));
+int	_EXFUN(rename, (const char *, const char *));
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(_rename, (const char *, const char *));
+#endif
+#endif
+#if !defined(__STRICT_ANSI__) || defined(__USE_XOPEN2K)
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(fseeko, (FILE *, _off_t, int));
+_off_t	_EXFUN(ftello, ( FILE *));
+#else
+int	_EXFUN(fseeko, (FILE *, off_t, int));
+off_t	_EXFUN(ftello, ( FILE *));
+#endif
+#endif
+#if !defined(__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+#ifndef _REENT_ONLY
+int	_EXFUN(asiprintf, (char **, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+char *	_EXFUN(asniprintf, (char *, size_t *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+char *	_EXFUN(asnprintf, (char *, size_t *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(asprintf, (char **, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+#ifndef diprintf
+int	_EXFUN(diprintf, (int, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+#endif
+int	_EXFUN(fcloseall, (_VOID));
+int	_EXFUN(fiprintf, (FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(fiscanf, (FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+int	_EXFUN(iprintf, (const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 1, 2))));
+int	_EXFUN(iscanf, (const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 1, 2))));
+int	_EXFUN(siprintf, (char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(siscanf, (const char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+int	_EXFUN(snprintf, (char *, size_t, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(sniprintf, (char *, size_t, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+char *	_EXFUN(tempnam, (const char *, const char *));
+int	_EXFUN(vasiprintf, (char **, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+char *	_EXFUN(vasniprintf, (char *, size_t *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+char *	_EXFUN(vasnprintf, (char *, size_t *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(vasprintf, (char **, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(vdiprintf, (int, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(vfiprintf, (FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(vfiscanf, (FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+int	_EXFUN(vfscanf, (FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+int	_EXFUN(viprintf, (const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 1, 0))));
+int	_EXFUN(viscanf, (const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 1, 0))));
+int	_EXFUN(vscanf, (const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 1, 0))));
+int	_EXFUN(vsiprintf, (char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(vsiscanf, (const char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+int	_EXFUN(vsniprintf, (char *, size_t, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(vsnprintf, (char *, size_t, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(vsscanf, (const char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+#endif /* !_REENT_ONLY */
+#endif /* !__STRICT_ANSI__ */
+
+/*
+ * Routines in POSIX 1003.1:2001.
+ */
+
+#ifndef __STRICT_ANSI__
+#ifndef _REENT_ONLY
+FILE *	_EXFUN(fdopen, (int, const char *));
+#endif
+int	_EXFUN(fileno, (FILE *));
+int	_EXFUN(getw, (FILE *));
+int	_EXFUN(pclose, (FILE *));
+FILE *  _EXFUN(popen, (const char *, const char *));
+int	_EXFUN(putw, (int, FILE *));
+void    _EXFUN(setbuffer, (FILE *, char *, int));
+int	_EXFUN(setlinebuf, (FILE *));
+int	_EXFUN(getc_unlocked, (FILE *));
+int	_EXFUN(getchar_unlocked, (void));
+void	_EXFUN(flockfile, (FILE *));
+int	_EXFUN(ftrylockfile, (FILE *));
+void	_EXFUN(funlockfile, (FILE *));
+int	_EXFUN(putc_unlocked, (int, FILE *));
+int	_EXFUN(putchar_unlocked, (int));
+#endif /* ! __STRICT_ANSI__ */
+
+/*
+ * Routines in POSIX 1003.1:200x.
+ */
+
+#ifndef __STRICT_ANSI__
+# ifndef _REENT_ONLY
+#  ifndef dprintf
+int	_EXFUN(dprintf, (int, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+#  endif
+FILE *	_EXFUN(fmemopen, (void *, size_t, const char *));
+/* getdelim - see __getdelim for now */
+/* getline - see __getline for now */
+FILE *	_EXFUN(open_memstream, (char **, size_t *));
+#if defined (__CYGWIN__)
+int	_EXFUN(renameat, (int, const char *, int, const char *));
+#endif
+int	_EXFUN(vdprintf, (int, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+# endif
+#endif
+
+/*
+ * Recursive versions of the above.
+ */
+
+int	_EXFUN(_asiprintf_r, (struct _reent *, char **, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+char *	_EXFUN(_asniprintf_r, (struct _reent *, char *, size_t *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 5))));
+char *	_EXFUN(_asnprintf_r, (struct _reent *, char *, size_t *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 5))));
+int	_EXFUN(_asprintf_r, (struct _reent *, char **, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_diprintf_r, (struct _reent *, int, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_dprintf_r, (struct _reent *, int, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_fclose_r, (struct _reent *, FILE *));
+int	_EXFUN(_fcloseall_r, (struct _reent *));
+FILE *	_EXFUN(_fdopen_r, (struct _reent *, int, const char *));
+int	_EXFUN(_fflush_r, (struct _reent *, FILE *));
+int	_EXFUN(_fgetc_r, (struct _reent *, FILE *));
+char *  _EXFUN(_fgets_r, (struct _reent *, char *, int, FILE *));
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(_fgetpos_r, (struct _reent *, FILE *, _fpos_t *));
+int	_EXFUN(_fsetpos_r, (struct _reent *, FILE *, const _fpos_t *));
+#else
+int	_EXFUN(_fgetpos_r, (struct _reent *, FILE *, fpos_t *));
+int	_EXFUN(_fsetpos_r, (struct _reent *, FILE *, const fpos_t *));
+#endif
+int	_EXFUN(_fiprintf_r, (struct _reent *, FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_fiscanf_r, (struct _reent *, FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 4))));
+FILE *	_EXFUN(_fmemopen_r, (struct _reent *, void *, size_t, const char *));
+FILE *	_EXFUN(_fopen_r, (struct _reent *, const char *, const char *));
+FILE *	_EXFUN(_freopen_r, (struct _reent *, const char *, const char *, FILE *));
+int	_EXFUN(_fprintf_r, (struct _reent *, FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_fpurge_r, (struct _reent *, FILE *));
+int	_EXFUN(_fputc_r, (struct _reent *, int, FILE *));
+int	_EXFUN(_fputs_r, (struct _reent *, const char *, FILE *));
+size_t	_EXFUN(_fread_r, (struct _reent *, _PTR, size_t _size, size_t _n, FILE *));
+int	_EXFUN(_fscanf_r, (struct _reent *, FILE *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 4))));
+int	_EXFUN(_fseek_r, (struct _reent *, FILE *, long, int));
+int	_EXFUN(_fseeko_r,(struct _reent *, FILE *, _off_t, int));
+long	_EXFUN(_ftell_r, (struct _reent *, FILE *));
+_off_t	_EXFUN(_ftello_r,(struct _reent *, FILE *));
+void	_EXFUN(_rewind_r, (struct _reent *, FILE *));
+size_t	_EXFUN(_fwrite_r, (struct _reent *, const _PTR , size_t _size, size_t _n, FILE *));
+int	_EXFUN(_getc_r, (struct _reent *, FILE *));
+int	_EXFUN(_getc_unlocked_r, (struct _reent *, FILE *));
+int	_EXFUN(_getchar_r, (struct _reent *));
+int	_EXFUN(_getchar_unlocked_r, (struct _reent *));
+char *	_EXFUN(_gets_r, (struct _reent *, char *));
+int	_EXFUN(_iprintf_r, (struct _reent *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(_iscanf_r, (struct _reent *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+FILE *	_EXFUN(_open_memstream_r, (struct _reent *, char **, size_t *));
+void	_EXFUN(_perror_r, (struct _reent *, const char *));
+int	_EXFUN(_printf_r, (struct _reent *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 3))));
+int	_EXFUN(_putc_r, (struct _reent *, int, FILE *));
+int	_EXFUN(_putc_unlocked_r, (struct _reent *, int, FILE *));
+int	_EXFUN(_putchar_unlocked_r, (struct _reent *, int));
+int	_EXFUN(_putchar_r, (struct _reent *, int));
+int	_EXFUN(_puts_r, (struct _reent *, const char *));
+int	_EXFUN(_remove_r, (struct _reent *, const char *));
+int	_EXFUN(_rename_r, (struct _reent *,
+			   const char *_old, const char *_new));
+int	_EXFUN(_scanf_r, (struct _reent *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 3))));
+int	_EXFUN(_siprintf_r, (struct _reent *, char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_siscanf_r, (struct _reent *, const char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 4))));
+int	_EXFUN(_sniprintf_r, (struct _reent *, char *, size_t, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 5))));
+int	_EXFUN(_snprintf_r, (struct _reent *, char *, size_t, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 5))));
+int	_EXFUN(_sprintf_r, (struct _reent *, char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 4))));
+int	_EXFUN(_sscanf_r, (struct _reent *, const char *, const char *, ...)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 4))));
+char *	_EXFUN(_tempnam_r, (struct _reent *, const char *, const char *));
+FILE *	_EXFUN(_tmpfile_r, (struct _reent *));
+char *	_EXFUN(_tmpnam_r, (struct _reent *, char *));
+int	_EXFUN(_ungetc_r, (struct _reent *, int, FILE *));
+int	_EXFUN(_vasiprintf_r, (struct _reent *, char **, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+char *	_EXFUN(_vasniprintf_r, (struct _reent*, char *, size_t *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 0))));
+char *	_EXFUN(_vasnprintf_r, (struct _reent*, char *, size_t *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 0))));
+int	_EXFUN(_vasprintf_r, (struct _reent *, char **, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vdiprintf_r, (struct _reent *, int, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vdprintf_r, (struct _reent *, int, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vfiprintf_r, (struct _reent *, FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vfiscanf_r, (struct _reent *, FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 0))));
+int	_EXFUN(_vfprintf_r, (struct _reent *, FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vfscanf_r, (struct _reent *, FILE *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 0))));
+int	_EXFUN(_viprintf_r, (struct _reent *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(_viscanf_r, (struct _reent *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+int	_EXFUN(_vprintf_r, (struct _reent *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 2, 0))));
+int	_EXFUN(_vscanf_r, (struct _reent *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 2, 0))));
+int	_EXFUN(_vsiprintf_r, (struct _reent *, char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vsiscanf_r, (struct _reent *, const char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 0))));
+int	_EXFUN(_vsniprintf_r, (struct _reent *, char *, size_t, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 0))));
+int	_EXFUN(_vsnprintf_r, (struct _reent *, char *, size_t, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 4, 0))));
+int	_EXFUN(_vsprintf_r, (struct _reent *, char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__printf__, 3, 0))));
+int	_EXFUN(_vsscanf_r, (struct _reent *, const char *, const char *, __VALIST)
+               _ATTRIBUTE ((__format__ (__scanf__, 3, 0))));
+
+/* Other extensions.  */
+
+int	_EXFUN(fpurge, (FILE *));
+ssize_t _EXFUN(__getdelim, (char **, size_t *, int, FILE *));
+ssize_t _EXFUN(__getline, (char **, size_t *, FILE *));
+
+#ifdef __LARGE64_FILES
+#if !defined(__CYGWIN__) || defined(_COMPILING_NEWLIB)
+FILE *	_EXFUN(fdopen64, (int, const char *));
+FILE *  _EXFUN(fopen64, (const char *, const char *));
+FILE *  _EXFUN(freopen64, (_CONST char *, _CONST char *, FILE *));
+_off64_t _EXFUN(ftello64, (FILE *));
+_off64_t _EXFUN(fseeko64, (FILE *, _off64_t, int));
+int     _EXFUN(fgetpos64, (FILE *, _fpos64_t *));
+int     _EXFUN(fsetpos64, (FILE *, const _fpos64_t *));
+FILE *  _EXFUN(tmpfile64, (void));
+
+FILE *	_EXFUN(_fdopen64_r, (struct _reent *, int, const char *));
+FILE *  _EXFUN(_fopen64_r, (struct _reent *,const char *, const char *));
+FILE *  _EXFUN(_freopen64_r, (struct _reent *, _CONST char *, _CONST char *, FILE *));
+_off64_t _EXFUN(_ftello64_r, (struct _reent *, FILE *));
+_off64_t _EXFUN(_fseeko64_r, (struct _reent *, FILE *, _off64_t, int));
+int     _EXFUN(_fgetpos64_r, (struct _reent *, FILE *, _fpos64_t *));
+int     _EXFUN(_fsetpos64_r, (struct _reent *, FILE *, const _fpos64_t *));
+FILE *  _EXFUN(_tmpfile64_r, (struct _reent *));
+#endif /* !__CYGWIN__ */
+#endif /* __LARGE64_FILES */
+
+/*
+ * Routines internal to the implementation.
+ */
+
+int	_EXFUN(__srget_r, (struct _reent *, FILE *));
+int	_EXFUN(__swbuf_r, (struct _reent *, int, FILE *));
+
+/*
+ * Stdio function-access interface.
+ */
+
+#ifndef __STRICT_ANSI__
+# ifdef __LARGE64_FILES
+FILE	*_EXFUN(funopen,(const _PTR __cookie,
+		int (*__readfn)(_PTR __c, char *__buf, int __n),
+		int (*__writefn)(_PTR __c, const char *__buf, int __n),
+		_fpos64_t (*__seekfn)(_PTR __c, _fpos64_t __off, int __whence),
+		int (*__closefn)(_PTR __c)));
+FILE	*_EXFUN(_funopen_r,(struct _reent *, const _PTR __cookie,
+		int (*__readfn)(_PTR __c, char *__buf, int __n),
+		int (*__writefn)(_PTR __c, const char *__buf, int __n),
+		_fpos64_t (*__seekfn)(_PTR __c, _fpos64_t __off, int __whence),
+		int (*__closefn)(_PTR __c)));
+# else
+FILE	*_EXFUN(funopen,(const _PTR __cookie,
+		int (*__readfn)(_PTR __cookie, char *__buf, int __n),
+		int (*__writefn)(_PTR __cookie, const char *__buf, int __n),
+		fpos_t (*__seekfn)(_PTR __cookie, fpos_t __off, int __whence),
+		int (*__closefn)(_PTR __cookie)));
+FILE	*_EXFUN(_funopen_r,(struct _reent *, const _PTR __cookie,
+		int (*__readfn)(_PTR __cookie, char *__buf, int __n),
+		int (*__writefn)(_PTR __cookie, const char *__buf, int __n),
+		fpos_t (*__seekfn)(_PTR __cookie, fpos_t __off, int __whence),
+		int (*__closefn)(_PTR __cookie)));
+# endif /* !__LARGE64_FILES */
+
+# define	fropen(__cookie, __fn) funopen(__cookie, __fn, (int (*)())0, \
+					       (fpos_t (*)())0, (int (*)())0)
+# define	fwopen(__cookie, __fn) funopen(__cookie, (int (*)())0, __fn, \
+					       (fpos_t (*)())0, (int (*)())0)
+
+typedef ssize_t cookie_read_function_t(void *__cookie, char *__buf, size_t __n);
+typedef ssize_t cookie_write_function_t(void *__cookie, const char *__buf,
+					size_t __n);
+# ifdef __LARGE64_FILES
+typedef int cookie_seek_function_t(void *__cookie, _off64_t *__off,
+				   int __whence);
+# else
+typedef int cookie_seek_function_t(void *__cookie, off_t *__off, int __whence);
+# endif /* !__LARGE64_FILES */
+typedef int cookie_close_function_t(void *__cookie);
+typedef struct
+{
+  /* These four struct member names are dictated by Linux; hopefully,
+     they don't conflict with any macros.  */
+  cookie_read_function_t  *read;
+  cookie_write_function_t *write;
+  cookie_seek_function_t  *seek;
+  cookie_close_function_t *close;
+} cookie_io_functions_t;
+FILE *_EXFUN(fopencookie,(void *__cookie,
+		const char *__mode, cookie_io_functions_t __functions));
+FILE *_EXFUN(_fopencookie_r,(struct _reent *, void *__cookie,
+		const char *__mode, cookie_io_functions_t __functions));
+#endif /* ! __STRICT_ANSI__ */
+
+#ifndef __CUSTOM_FILE_IO__
+/*
+ * The __sfoo macros are here so that we can 
+ * define function versions in the C library.
+ */
+#define       __sgetc_raw_r(__ptr, __f) (--(__f)->_r < 0 ? __srget_r(__ptr, __f) : (int)(*(__f)->_p++))
+
+#ifdef __SCLE
+/*  For a platform with CR/LF, additional logic is required by
+  __sgetc_r which would otherwise simply be a macro; therefore we
+  use an inlined function.  The function is only meant to be inlined
+  in place as used and the function body should never be emitted.  
+
+  There are two possible means to this end when compiling with GCC,
+  one when compiling with a standard C99 compiler, and for other
+  compilers we're just stuck.  At the moment, this issue only
+  affects the Cygwin target, so we'll most likely be using GCC. */
+
+_ELIDABLE_INLINE int __sgetc_r(struct _reent *__ptr, FILE *__p);
+
+_ELIDABLE_INLINE int __sgetc_r(struct _reent *__ptr, FILE *__p)
+  {
+    int __c = __sgetc_raw_r(__ptr, __p);
+    if ((__p->_flags & __SCLE) && (__c == '\r'))
+      {
+      int __c2 = __sgetc_raw_r(__ptr, __p);
+      if (__c2 == '\n')
+        __c = __c2;
+      else
+        ungetc(__c2, __p);
+      }
+    return __c;
+  }
+#else
+#define __sgetc_r(__ptr, __p) __sgetc_raw_r(__ptr, __p)
+#endif
+
+#ifdef _never /* __GNUC__ */
+/* If this inline is actually used, then systems using coff debugging
+   info get hopelessly confused.  21sept93 rich@cygnus.com.  */
+_ELIDABLE_INLINE int __sputc_r(struct _reent *_ptr, int _c, FILE *_p) {
+	if (--_p->_w >= 0 || (_p->_w >= _p->_lbfsize && (char)_c != '\n'))
+		return (*_p->_p++ = _c);
+	else
+		return (__swbuf_r(_ptr, _c, _p));
+}
+#else
+/*
+ * This has been tuned to generate reasonable code on the vax using pcc
+ */
+#define       __sputc_raw_r(__ptr, __c, __p) \
+	(--(__p)->_w < 0 ? \
+		(__p)->_w >= (__p)->_lbfsize ? \
+			(*(__p)->_p = (__c)), *(__p)->_p != '\n' ? \
+				(int)*(__p)->_p++ : \
+				__swbuf_r(__ptr, '\n', __p) : \
+			__swbuf_r(__ptr, (int)(__c), __p) : \
+		(*(__p)->_p = (__c), (int)*(__p)->_p++))
+#ifdef __SCLE
+#define __sputc_r(__ptr, __c, __p) \
+        ((((__p)->_flags & __SCLE) && ((__c) == '\n')) \
+          ? __sputc_raw_r(__ptr, '\r', (__p)) : 0 , \
+        __sputc_raw_r((__ptr), (__c), (__p)))
+#else
+#define __sputc_r(__ptr, __c, __p) __sputc_raw_r(__ptr, __c, __p)
+#endif
+#endif
+
+#define	__sfeof(p)	(((p)->_flags & __SEOF) != 0)
+#define	__sferror(p)	(((p)->_flags & __SERR) != 0)
+#define	__sclearerr(p)	((void)((p)->_flags &= ~(__SERR|__SEOF)))
+#define	__sfileno(p)	((p)->_file)
+
+#ifndef _REENT_SMALL
+#define	feof(p)		__sfeof(p)
+#define	ferror(p)	__sferror(p)
+#define	clearerr(p)	__sclearerr(p)
+#endif
+
+#if 0 /*ndef __STRICT_ANSI__ - FIXME: must initialize stdio first, use fn */
+#define	fileno(p)	__sfileno(p)
+#endif
+
+#ifndef __CYGWIN__
+#ifndef lint
+#define	getc(fp)	__sgetc_r(_REENT, fp)
+#define putc(x, fp)	__sputc_r(_REENT, x, fp)
+#endif /* lint */
+#endif /* __CYGWIN__ */
+
+#ifndef __STRICT_ANSI__
+/* fast always-buffered version, true iff error */
+#define	fast_putc(x,p) (--(p)->_w < 0 ? \
+	__swbuf_r(_REENT, (int)(x), p) == EOF : (*(p)->_p = (x), (p)->_p++, 0))
+
+#define	L_cuserid	9		/* posix says it goes in stdio.h :( */
+#ifdef __CYGWIN__
+#define L_ctermid       16
+#endif
+#endif
+
+#endif /* !__CUSTOM_FILE_IO__ */
+
+#define	getchar()	getc(stdin)
+#define	putchar(x)	putc(x, stdout)
+
+_END_STD_C
+
+#endif /* _STDIO_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio_ext.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio_ext.h
new file mode 100644
index 00000000..fcfb662a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdio_ext.h
@@ -0,0 +1,22 @@
+/*
+ * stdio_ext.h
+ *
+ * Definitions for I/O internal operations, originally from Solaris.
+ */
+
+#ifndef _STDIO_EXT_H_
+#define _STDIO_EXT_H_
+
+#ifdef __rtems__
+#error "<stdio_ext.h> not supported"
+#endif
+
+#include <stdio.h>
+
+_BEGIN_STD_C
+
+void	 _EXFUN(__fpurge,(FILE *));
+
+_END_STD_C
+
+#endif /* _STDIO_EXT_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdlib.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdlib.h
new file mode 100644
index 00000000..5340e364
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/stdlib.h
@@ -0,0 +1,235 @@
+/*
+ * stdlib.h
+ *
+ * Definitions for common types, variables, and functions.
+ */
+
+#ifndef _STDLIB_H_
+#define _STDLIB_H_
+
+#include <machine/ieeefp.h>
+#include "_ansi.h"
+
+#define __need_size_t
+#define __need_wchar_t
+#define __need_NULL
+#include <stddef.h>
+
+#include <sys/reent.h>
+#include <machine/stdlib.h>
+#ifndef __STRICT_ANSI__
+#include <alloca.h>
+#endif
+
+#ifdef __CYGWIN__
+#include <cygwin/stdlib.h>
+#endif
+
+_BEGIN_STD_C
+
+typedef struct 
+{
+  int quot; /* quotient */
+  int rem; /* remainder */
+} div_t;
+
+typedef struct 
+{
+  long quot; /* quotient */
+  long rem; /* remainder */
+} ldiv_t;
+
+#ifndef __STRICT_ANSI__
+typedef struct
+{
+  long long int quot; /* quotient */
+  long long int rem; /* remainder */
+} lldiv_t;
+#endif
+
+#define EXIT_FAILURE 1
+#define EXIT_SUCCESS 0
+
+#define RAND_MAX __RAND_MAX
+
+int	_EXFUN(__locale_mb_cur_max,(_VOID));
+
+#define MB_CUR_MAX __locale_mb_cur_max()
+
+_VOID	_EXFUN(abort,(_VOID) _ATTRIBUTE ((noreturn)));
+int	_EXFUN(abs,(int));
+int	_EXFUN(atexit,(_VOID (*__func)(_VOID)));
+double	_EXFUN(atof,(const char *__nptr));
+#ifndef __STRICT_ANSI__
+float	_EXFUN(atoff,(const char *__nptr));
+#endif
+int	_EXFUN(atoi,(const char *__nptr));
+int	_EXFUN(_atoi_r,(struct _reent *, const char *__nptr));
+long	_EXFUN(atol,(const char *__nptr));
+long	_EXFUN(_atol_r,(struct _reent *, const char *__nptr));
+_PTR	_EXFUN(bsearch,(const _PTR __key,
+		       const _PTR __base,
+		       size_t __nmemb,
+		       size_t __size,
+		       int _EXFNPTR(_compar,(const _PTR, const _PTR))));
+_PTR	_EXFUN_NOTHROW(calloc,(size_t __nmemb, size_t __size));
+div_t	_EXFUN(div,(int __numer, int __denom));
+_VOID	_EXFUN(exit,(int __status) _ATTRIBUTE ((noreturn)));
+_VOID	_EXFUN_NOTHROW(free,(_PTR));
+char *  _EXFUN(getenv,(const char *__string));
+char *	_EXFUN(_getenv_r,(struct _reent *, const char *__string));
+char *	_EXFUN(_findenv,(_CONST char *, int *));
+char *	_EXFUN(_findenv_r,(struct _reent *, _CONST char *, int *));
+#ifndef __STRICT_ANSI__
+extern char *suboptarg;			/* getsubopt(3) external variable */
+int	_EXFUN(getsubopt,(char **, char * const *, char **));
+#endif
+long	_EXFUN(labs,(long));
+ldiv_t	_EXFUN(ldiv,(long __numer, long __denom));
+_PTR	_EXFUN_NOTHROW(malloc,(size_t __size));
+int	_EXFUN(mblen,(const char *, size_t));
+int	_EXFUN(_mblen_r,(struct _reent *, const char *, size_t, _mbstate_t *));
+int	_EXFUN(mbtowc,(wchar_t *, const char *, size_t));
+int	_EXFUN(_mbtowc_r,(struct _reent *, wchar_t *, const char *, size_t, _mbstate_t *));
+int	_EXFUN(wctomb,(char *, wchar_t));
+int	_EXFUN(_wctomb_r,(struct _reent *, char *, wchar_t, _mbstate_t *));
+size_t	_EXFUN(mbstowcs,(wchar_t *, const char *, size_t));
+size_t	_EXFUN(_mbstowcs_r,(struct _reent *, wchar_t *, const char *, size_t, _mbstate_t *));
+size_t	_EXFUN(wcstombs,(char *, const wchar_t *, size_t));
+size_t	_EXFUN(_wcstombs_r,(struct _reent *, char *, const wchar_t *, size_t, _mbstate_t *));
+#ifndef __STRICT_ANSI__
+#ifndef _REENT_ONLY
+char *	_EXFUN(mkdtemp,(char *));
+int	_EXFUN(mkostemp,(char *, int));
+int	_EXFUN(mkostemps,(char *, int, int));
+int	_EXFUN(mkstemp,(char *));
+int	_EXFUN(mkstemps,(char *, int));
+char *	_EXFUN(mktemp,(char *) _ATTRIBUTE ((__warning__ ("the use of `mktemp' is dangerous; use `mkstemp' instead"))));
+#endif
+char *	_EXFUN(_mkdtemp_r, (struct _reent *, char *));
+int	_EXFUN(_mkostemp_r, (struct _reent *, char *, int));
+int	_EXFUN(_mkostemps_r, (struct _reent *, char *, int, int));
+int	_EXFUN(_mkstemp_r, (struct _reent *, char *));
+int	_EXFUN(_mkstemps_r, (struct _reent *, char *, int));
+char *	_EXFUN(_mktemp_r, (struct _reent *, char *) _ATTRIBUTE ((__warning__ ("the use of `mktemp' is dangerous; use `mkstemp' instead"))));
+#endif
+_VOID	_EXFUN(qsort,(_PTR __base, size_t __nmemb, size_t __size, int(*_compar)(const _PTR, const _PTR)));
+int	_EXFUN(rand,(_VOID));
+_PTR	_EXFUN_NOTHROW(realloc,(_PTR __r, size_t __size));
+#ifndef __STRICT_ANSI__
+_PTR	_EXFUN(reallocf,(_PTR __r, size_t __size));
+#endif
+_VOID	_EXFUN(srand,(unsigned __seed));
+double	_EXFUN(strtod,(const char *__n, char **__end_PTR));
+double	_EXFUN(_strtod_r,(struct _reent *,const char *__n, char **__end_PTR));
+#if !defined(__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+float	_EXFUN(strtof,(const char *__n, char **__end_PTR));
+#endif
+#ifndef __STRICT_ANSI__
+/* the following strtodf interface is deprecated...use strtof instead */
+# ifndef strtodf 
+#  define strtodf strtof
+# endif
+#endif
+long	_EXFUN(strtol,(const char *__n, char **__end_PTR, int __base));
+long	_EXFUN(_strtol_r,(struct _reent *,const char *__n, char **__end_PTR, int __base));
+unsigned long _EXFUN(strtoul,(const char *__n, char **__end_PTR, int __base));
+unsigned long _EXFUN(_strtoul_r,(struct _reent *,const char *__n, char **__end_PTR, int __base));
+
+int	_EXFUN(system,(const char *__string));
+
+#ifndef __STRICT_ANSI__
+long    _EXFUN(a64l,(const char *__input));
+char *  _EXFUN(l64a,(long __input));
+char *  _EXFUN(_l64a_r,(struct _reent *,long __input));
+int	_EXFUN(on_exit,(_VOID (*__func)(int, _PTR),_PTR __arg));
+_VOID	_EXFUN(_Exit,(int __status) _ATTRIBUTE ((noreturn)));
+int	_EXFUN(putenv,(char *__string));
+int	_EXFUN(_putenv_r,(struct _reent *, char *__string));
+_PTR	_EXFUN(_reallocf_r,(struct _reent *, _PTR, size_t));
+int	_EXFUN(setenv,(const char *__string, const char *__value, int __overwrite));
+int	_EXFUN(_setenv_r,(struct _reent *, const char *__string, const char *__value, int __overwrite));
+
+char *	_EXFUN(gcvt,(double,int,char *));
+char *	_EXFUN(gcvtf,(float,int,char *));
+char *	_EXFUN(fcvt,(double,int,int *,int *));
+char *	_EXFUN(fcvtf,(float,int,int *,int *));
+char *	_EXFUN(ecvt,(double,int,int *,int *));
+char *	_EXFUN(ecvtbuf,(double, int, int*, int*, char *));
+char *	_EXFUN(fcvtbuf,(double, int, int*, int*, char *));
+char *	_EXFUN(ecvtf,(float,int,int *,int *));
+char *	_EXFUN(dtoa,(double, int, int, int *, int*, char**));
+int	_EXFUN(rand_r,(unsigned *__seed));
+
+double _EXFUN(drand48,(_VOID));
+double _EXFUN(_drand48_r,(struct _reent *));
+double _EXFUN(erand48,(unsigned short [3]));
+double _EXFUN(_erand48_r,(struct _reent *, unsigned short [3]));
+long   _EXFUN(jrand48,(unsigned short [3]));
+long   _EXFUN(_jrand48_r,(struct _reent *, unsigned short [3]));
+_VOID  _EXFUN(lcong48,(unsigned short [7]));
+_VOID  _EXFUN(_lcong48_r,(struct _reent *, unsigned short [7]));
+long   _EXFUN(lrand48,(_VOID));
+long   _EXFUN(_lrand48_r,(struct _reent *));
+long   _EXFUN(mrand48,(_VOID));
+long   _EXFUN(_mrand48_r,(struct _reent *));
+long   _EXFUN(nrand48,(unsigned short [3]));
+long   _EXFUN(_nrand48_r,(struct _reent *, unsigned short [3]));
+unsigned short *
+       _EXFUN(seed48,(unsigned short [3]));
+unsigned short *
+       _EXFUN(_seed48_r,(struct _reent *, unsigned short [3]));
+_VOID  _EXFUN(srand48,(long));
+_VOID  _EXFUN(_srand48_r,(struct _reent *, long));
+long long _EXFUN(atoll,(const char *__nptr));
+long long _EXFUN(_atoll_r,(struct _reent *, const char *__nptr));
+long long _EXFUN(llabs,(long long));
+lldiv_t	_EXFUN(lldiv,(long long __numer, long long __denom));
+#endif /* ! __STRICT_ANSI__ */
+#if !defined(__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+long long _EXFUN(strtoll,(const char *__n, char **__end_PTR, int __base));
+#endif
+#ifndef __STRICT_ANSI__
+long long _EXFUN(_strtoll_r,(struct _reent *, const char *__n, char **__end_PTR, int __base));
+#endif /* ! __STRICT_ANSI__ */
+#if !defined(__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+unsigned long long _EXFUN(strtoull,(const char *__n, char **__end_PTR, int __base));
+#endif
+#ifndef __STRICT_ANSI__
+unsigned long long _EXFUN(_strtoull_r,(struct _reent *, const char *__n, char **__end_PTR, int __base));
+
+#ifndef __CYGWIN__
+_VOID	_EXFUN(cfree,(_PTR));
+int	_EXFUN(unsetenv,(const char *__string));
+int	_EXFUN(_unsetenv_r,(struct _reent *, const char *__string));
+#endif
+
+#ifdef __rtems__
+int _EXFUN(posix_memalign,(void **, size_t, size_t));
+#endif
+
+#endif /* ! __STRICT_ANSI__ */
+
+char *	_EXFUN(_dtoa_r,(struct _reent *, double, int, int, int *, int*, char**));
+#ifndef __CYGWIN__
+_PTR	_EXFUN_NOTHROW(_malloc_r,(struct _reent *, size_t));
+_PTR	_EXFUN_NOTHROW(_calloc_r,(struct _reent *, size_t, size_t));
+_VOID	_EXFUN_NOTHROW(_free_r,(struct _reent *, _PTR));
+_PTR	_EXFUN_NOTHROW(_realloc_r,(struct _reent *, _PTR, size_t));
+_VOID	_EXFUN(_mstats_r,(struct _reent *, char *));
+#endif
+int	_EXFUN(_system_r,(struct _reent *, const char *));
+
+_VOID	_EXFUN(__eprintf,(const char *, const char *, unsigned int, const char *));
+
+/* On platforms where long double equals double.  */
+#ifdef _LDBL_EQ_DBL
+#if !defined(__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+extern long double strtold (const char *, char **);
+#endif
+extern long double wcstold (const wchar_t *, wchar_t **);
+#endif /* _LDBL_EQ_DBL */
+
+_END_STD_C
+
+#endif /* _STDLIB_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/string.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/string.h
new file mode 100644
index 00000000..f9217f5f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/string.h
@@ -0,0 +1,143 @@
+/*
+ * string.h
+ *
+ * Definitions for memory and string functions.
+ */
+
+#ifndef _STRING_H_
+#define	_STRING_H_
+
+#include "_ansi.h"
+#include <sys/reent.h>
+#include <sys/cdefs.h>
+#include <sys/features.h>
+
+#define __need_size_t
+#define __need_NULL
+#include <stddef.h>
+
+_BEGIN_STD_C
+
+_PTR 	 _EXFUN(memchr,(const _PTR, int, size_t));
+int 	 _EXFUN(memcmp,(const _PTR, const _PTR, size_t));
+_PTR 	 _EXFUN(memcpy,(_PTR, const _PTR, size_t));
+_PTR	 _EXFUN(memmove,(_PTR, const _PTR, size_t));
+_PTR	 _EXFUN(memset,(_PTR, int, size_t));
+char 	*_EXFUN(strcat,(char *, const char *));
+char 	*_EXFUN(strchr,(const char *, int));
+int	 _EXFUN(strcmp,(const char *, const char *));
+int	 _EXFUN(strcoll,(const char *, const char *));
+char 	*_EXFUN(strcpy,(char *, const char *));
+size_t	 _EXFUN(strcspn,(const char *, const char *));
+char 	*_EXFUN(strerror,(int));
+size_t	 _EXFUN(strlen,(const char *));
+char 	*_EXFUN(strncat,(char *, const char *, size_t));
+int	 _EXFUN(strncmp,(const char *, const char *, size_t));
+char 	*_EXFUN(strncpy,(char *, const char *, size_t));
+char 	*_EXFUN(strpbrk,(const char *, const char *));
+char 	*_EXFUN(strrchr,(const char *, int));
+size_t	 _EXFUN(strspn,(const char *, const char *));
+char 	*_EXFUN(strstr,(const char *, const char *));
+
+#ifndef _REENT_ONLY
+char 	*_EXFUN(strtok,(char *, const char *));
+#endif
+
+size_t	 _EXFUN(strxfrm,(char *, const char *, size_t));
+
+#ifndef __STRICT_ANSI__
+char 	*_EXFUN(strtok_r,(char *, const char *, char **));
+
+int	 _EXFUN(bcmp,(const void *, const void *, size_t));
+void	 _EXFUN(bcopy,(const void *, void *, size_t));
+void	 _EXFUN(bzero,(void *, size_t));
+int	 _EXFUN(ffs,(int));
+char 	*_EXFUN(index,(const char *, int));
+_PTR	 _EXFUN(memccpy,(_PTR, const _PTR, int, size_t));
+_PTR	 _EXFUN(mempcpy,(_PTR, const _PTR, size_t));
+_PTR	 _EXFUN(memmem, (const _PTR, size_t, const _PTR, size_t));
+_PTR 	 _EXFUN(memrchr,(const _PTR, int, size_t));
+char 	*_EXFUN(rindex,(const char *, int));
+char 	*_EXFUN(stpcpy,(char *, const char *));
+char 	*_EXFUN(stpncpy,(char *, const char *, size_t));
+int	 _EXFUN(strcasecmp,(const char *, const char *));
+char	*_EXFUN(strcasestr,(const char *, const char *));
+char 	*_EXFUN(strchrnul,(const char *, int));
+#endif
+#if !defined(__STRICT_ANSI__) || (_XOPEN_SOURCE >= 500)
+char 	*_EXFUN(strdup,(const char *));
+#endif
+#ifndef __STRICT_ANSI__
+char 	*_EXFUN(_strdup_r,(struct _reent *, const char *));
+#endif
+#if !defined(__STRICT_ANSI__) || (_XOPEN_SOURCE >= 700)
+char 	*_EXFUN(strndup,(const char *, size_t));
+#endif
+#ifndef __STRICT_ANSI__
+char 	*_EXFUN(_strndup_r,(struct _reent *, const char *, size_t));
+/* There are two common strerror_r variants.  If you request
+   _GNU_SOURCE, you get the GNU version; otherwise you get the POSIX
+   version.  POSIX requires that #undef strerror_r will still let you
+   invoke the underlying function, but that requires gcc support.  */
+#ifdef _GNU_SOURCE
+char    *_EXFUN(strerror_r,(int, char *, size_t));
+#else
+# ifdef __GNUC__
+int      _EXFUN(strerror_r,(int, char *, size_t)) __asm__ (__ASMNAME ("__xpg_strerror_r"));
+# else
+int      _EXFUN(__xpg_strerror_r,(int, char *, size_t));
+#  define strerror_r __xpg_strerror_r
+# endif
+#endif
+size_t	 _EXFUN(strlcat,(char *, const char *, size_t));
+size_t	 _EXFUN(strlcpy,(char *, const char *, size_t));
+int	 _EXFUN(strncasecmp,(const char *, const char *, size_t));
+size_t	 _EXFUN(strnlen,(const char *, size_t));
+char 	*_EXFUN(strsep,(char **, const char *));
+char	*_EXFUN(strlwr,(char *));
+char	*_EXFUN(strupr,(char *));
+#ifndef DEFS_H	/* Kludge to work around problem compiling in gdb */
+char  *_EXFUN(strsignal, (int __signo));
+#endif
+#ifdef __CYGWIN__
+int     _EXFUN(strtosigno, (const char *__name));
+#endif
+
+/* Recursive version of strerror.  */
+char *	_EXFUN(_strerror_r, (struct _reent *, int, int, int *));
+
+#if defined _GNU_SOURCE && defined __GNUC__
+#define strdupa(__s) \
+	(__extension__ ({const char *__in = (__s); \
+			 size_t __len = strlen (__in) + 1; \
+			 char * __out = (char *) __builtin_alloca (__len); \
+			 (char *) memcpy (__out, __in, __len);}))
+#define strndupa(__s, __n) \
+	(__extension__ ({const char *__in = (__s); \
+			 size_t __len = strnlen (__in, (__n)) + 1; \
+			 char *__out = (char *) __builtin_alloca (__len); \
+			 __out[__len-1] = '\0'; \
+			 (char *) memcpy (__out, __in, __len-1);}))
+#endif /* _GNU_SOURCE && __GNUC__ */
+
+/* These function names are used on Windows and perhaps other systems.  */
+#ifndef strcmpi
+#define strcmpi strcasecmp
+#endif
+#ifndef stricmp
+#define stricmp strcasecmp
+#endif
+#ifndef strncmpi
+#define strncmpi strncasecmp
+#endif
+#ifndef strnicmp
+#define strnicmp strncasecmp
+#endif
+
+#endif /* ! __STRICT_ANSI__ */
+
+#include <sys/string.h>
+
+_END_STD_C
+
+#endif /* _STRING_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/strings.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/strings.h
new file mode 100644
index 00000000..131d81d2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/strings.h
@@ -0,0 +1,35 @@
+/*
+ * strings.h
+ *
+ * Definitions for string operations.
+ */
+
+#ifndef _STRINGS_H_
+#define _STRINGS_H_
+
+#include "_ansi.h"
+#include <sys/reent.h>
+
+#include <sys/types.h> /* for size_t */
+
+_BEGIN_STD_C
+
+#if !defined __STRICT_ANSI__ && _POSIX_VERSION < 200809L
+/* 
+ * Marked LEGACY in Open Group Base Specifications Issue 6/IEEE Std 1003.1-2004
+ * Removed from Open Group Base Specifications Issue 7/IEEE Std 1003.1-2008
+ */
+int	 _EXFUN(bcmp,(const void *, const void *, size_t));
+void	 _EXFUN(bcopy,(const void *, void *, size_t));
+void	 _EXFUN(bzero,(void *, size_t));
+char 	*_EXFUN(index,(const char *, int));
+char 	*_EXFUN(rindex,(const char *, int));
+#endif /* ! __STRICT_ANSI__ */
+
+int	 _EXFUN(ffs,(int));
+int	 _EXFUN(strcasecmp,(const char *, const char *));
+int	 _EXFUN(strncasecmp,(const char *, const char *, size_t));
+
+_END_STD_C
+
+#endif /* _STRINGS_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_default_fcntl.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_default_fcntl.h
new file mode 100644
index 00000000..1884136c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_default_fcntl.h
@@ -0,0 +1,204 @@
+
+#ifndef	_SYS__DEFAULT_FCNTL_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define	_SYS__DEFAULT_FCNTL_H_
+#include <_ansi.h>
+#define	_FOPEN		(-1)	/* from sys/file.h, kernel use only */
+#define	_FREAD		0x0001	/* read enabled */
+#define	_FWRITE		0x0002	/* write enabled */
+#define	_FAPPEND	0x0008	/* append (writes guaranteed at the end) */
+#define	_FMARK		0x0010	/* internal; mark during gc() */
+#define	_FDEFER		0x0020	/* internal; defer for next gc pass */
+#define	_FASYNC		0x0040	/* signal pgrp when data ready */
+#define	_FSHLOCK	0x0080	/* BSD flock() shared lock present */
+#define	_FEXLOCK	0x0100	/* BSD flock() exclusive lock present */
+#define	_FCREAT		0x0200	/* open with file create */
+#define	_FTRUNC		0x0400	/* open with truncation */
+#define	_FEXCL		0x0800	/* error on open if file exists */
+#define	_FNBIO		0x1000	/* non blocking I/O (sys5 style) */
+#define	_FSYNC		0x2000	/* do all writes synchronously */
+#define	_FNONBLOCK	0x4000	/* non blocking I/O (POSIX style) */
+#define	_FNDELAY	_FNONBLOCK	/* non blocking I/O (4.2 style) */
+#define	_FNOCTTY	0x8000	/* don't assign a ctty on this open */
+
+#define	O_ACCMODE	(O_RDONLY|O_WRONLY|O_RDWR)
+
+/*
+ * Flag values for open(2) and fcntl(2)
+ * The kernel adds 1 to the open modes to turn it into some
+ * combination of FREAD and FWRITE.
+ */
+#define	O_RDONLY	0		/* +1 == FREAD */
+#define	O_WRONLY	1		/* +1 == FWRITE */
+#define	O_RDWR		2		/* +1 == FREAD|FWRITE */
+#define	O_APPEND	_FAPPEND
+#define	O_CREAT		_FCREAT
+#define	O_TRUNC		_FTRUNC
+#define	O_EXCL		_FEXCL
+#define O_SYNC		_FSYNC
+/*	O_NDELAY	_FNDELAY 	set in include/fcntl.h */
+/*	O_NDELAY	_FNBIO 		set in include/fcntl.h */
+#define	O_NONBLOCK	_FNONBLOCK
+#define	O_NOCTTY	_FNOCTTY
+/* For machines which care - */
+#if defined (_WIN32) || defined (__CYGWIN__)
+#define _FBINARY        0x10000
+#define _FTEXT          0x20000
+#define _FNOINHERIT	0x40000
+
+#define O_BINARY	_FBINARY
+#define O_TEXT		_FTEXT
+#define O_NOINHERIT	_FNOINHERIT
+/* O_CLOEXEC is the Linux equivalent to O_NOINHERIT */
+#define O_CLOEXEC	_FNOINHERIT
+
+/* The windows header files define versions with a leading underscore.  */
+#define _O_RDONLY	O_RDONLY
+#define _O_WRONLY	O_WRONLY
+#define _O_RDWR		O_RDWR
+#define _O_APPEND	O_APPEND
+#define _O_CREAT	O_CREAT
+#define _O_TRUNC	O_TRUNC
+#define _O_EXCL		O_EXCL
+#define _O_TEXT		O_TEXT
+#define _O_BINARY	O_BINARY
+#define _O_RAW		O_BINARY
+#define _O_NOINHERIT	O_NOINHERIT
+#endif
+
+#ifndef	_POSIX_SOURCE
+
+/*
+ * Flags that work for fcntl(fd, F_SETFL, FXXXX)
+ */
+#define	FAPPEND		_FAPPEND
+#define	FSYNC		_FSYNC
+#define	FASYNC		_FASYNC
+#define	FNBIO		_FNBIO
+#define	FNONBIO		_FNONBLOCK	/* XXX fix to be NONBLOCK everywhere */
+#define	FNDELAY		_FNDELAY
+
+/*
+ * Flags that are disallowed for fcntl's (FCNTLCANT);
+ * used for opens, internal state, or locking.
+ */
+#define	FREAD		_FREAD
+#define	FWRITE		_FWRITE
+#define	FMARK		_FMARK
+#define	FDEFER		_FDEFER
+#define	FSHLOCK		_FSHLOCK
+#define	FEXLOCK		_FEXLOCK
+
+/*
+ * The rest of the flags, used only for opens
+ */
+#define	FOPEN		_FOPEN
+#define	FCREAT		_FCREAT
+#define	FTRUNC		_FTRUNC
+#define	FEXCL		_FEXCL
+#define	FNOCTTY		_FNOCTTY
+
+#endif	/* !_POSIX_SOURCE */
+
+/* XXX close on exec request; must match UF_EXCLOSE in user.h */
+#define	FD_CLOEXEC	1	/* posix */
+
+/* fcntl(2) requests */
+#define	F_DUPFD		0	/* Duplicate fildes */
+#define	F_GETFD		1	/* Get fildes flags (close on exec) */
+#define	F_SETFD		2	/* Set fildes flags (close on exec) */
+#define	F_GETFL		3	/* Get file flags */
+#define	F_SETFL		4	/* Set file flags */
+#ifndef	_POSIX_SOURCE
+#define	F_GETOWN 	5	/* Get owner - for ASYNC */
+#define	F_SETOWN 	6	/* Set owner - for ASYNC */
+#endif	/* !_POSIX_SOURCE */
+#define	F_GETLK  	7	/* Get record-locking information */
+#define	F_SETLK  	8	/* Set or Clear a record-lock (Non-Blocking) */
+#define	F_SETLKW 	9	/* Set or Clear a record-lock (Blocking) */
+#ifndef	_POSIX_SOURCE
+#define	F_RGETLK 	10	/* Test a remote lock to see if it is blocked */
+#define	F_RSETLK 	11	/* Set or unlock a remote lock */
+#define	F_CNVT 		12	/* Convert a fhandle to an open fd */
+#define	F_RSETLKW 	13	/* Set or Clear remote record-lock(Blocking) */
+#endif	/* !_POSIX_SOURCE */
+#ifdef __CYGWIN__
+#define	F_DUPFD_CLOEXEC	14	/* As F_DUPFD, but set close-on-exec flag */
+#endif
+
+/* fcntl(2) flags (l_type field of flock structure) */
+#define	F_RDLCK		1	/* read lock */
+#define	F_WRLCK		2	/* write lock */
+#define	F_UNLCK		3	/* remove lock(s) */
+#ifndef	_POSIX_SOURCE
+#define	F_UNLKSYS	4	/* remove remote locks for a given system */
+#endif	/* !_POSIX_SOURCE */
+
+#ifdef __CYGWIN__
+/* Special descriptor value to denote the cwd in calls to openat(2) etc. */
+#define AT_FDCWD -2
+
+/* Flag values for faccessat2) et al. */
+#define AT_EACCESS              1
+#define AT_SYMLINK_NOFOLLOW     2
+#define AT_SYMLINK_FOLLOW       4
+#define AT_REMOVEDIR            8
+#endif
+
+/*#include <sys/stdtypes.h>*/
+
+#ifndef __CYGWIN__
+/* file segment locking set data type - information passed to system by user */
+struct flock {
+	short	l_type;		/* F_RDLCK, F_WRLCK, or F_UNLCK */
+	short	l_whence;	/* flag to choose starting offset */
+	long	l_start;	/* relative offset, in bytes */
+	long	l_len;		/* length, in bytes; 0 means lock to EOF */
+	short	l_pid;		/* returned with F_GETLK */
+	short	l_xxx;		/* reserved for future use */
+};
+#endif /* __CYGWIN__ */
+
+#ifndef	_POSIX_SOURCE
+/* extended file segment locking set data type */
+struct eflock {
+	short	l_type;		/* F_RDLCK, F_WRLCK, or F_UNLCK */
+	short	l_whence;	/* flag to choose starting offset */
+	long	l_start;	/* relative offset, in bytes */
+	long	l_len;		/* length, in bytes; 0 means lock to EOF */
+	short	l_pid;		/* returned with F_GETLK */
+	short	l_xxx;		/* reserved for future use */
+	long	l_rpid;		/* Remote process id wanting this lock */
+	long	l_rsys;		/* Remote system id wanting this lock */
+};
+#endif	/* !_POSIX_SOURCE */
+
+
+#include <sys/types.h>
+#include <sys/stat.h>		/* sigh. for the mode bits for open/creat */
+
+extern int open _PARAMS ((const char *, int, ...));
+extern int creat _PARAMS ((const char *, mode_t));
+extern int fcntl _PARAMS ((int, int, ...));
+#ifdef __CYGWIN__
+#include <sys/time.h>
+extern int futimesat _PARAMS ((int, const char *, const struct timeval *));
+extern int openat _PARAMS ((int, const char *, int, ...));
+#endif
+
+/* Provide _<systemcall> prototypes for functions provided by some versions
+   of newlib.  */
+#ifdef _COMPILING_NEWLIB
+extern int _open _PARAMS ((const char *, int, ...));
+extern int _fcntl _PARAMS ((int, int, ...));
+#ifdef __LARGE64_FILES
+extern int _open64 _PARAMS ((const char *, int, ...));
+#endif
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif	/* !_SYS__DEFAULT_FCNTL_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_types.h
new file mode 100644
index 00000000..25252ed8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/_types.h
@@ -0,0 +1,87 @@
+/* ANSI C namespace clean utility typedefs */
+
+/* This file defines various typedefs needed by the system calls that support
+   the C library.  Basically, they're just the POSIX versions with an '_'
+   prepended.  This file lives in the `sys' directory so targets can provide
+   their own if desired (or they can put target dependant conditionals here).
+*/
+
+#ifndef	_SYS__TYPES_H
+#define _SYS__TYPES_H
+
+#include <machine/_types.h>
+#include <sys/lock.h>
+
+#ifndef __off_t_defined
+typedef long _off_t;
+#endif
+
+#if defined(__rtems__)
+/* device numbers are 32-bit major and and 32-bit minor */
+typedef unsigned long long __dev_t;
+#else
+#ifndef __dev_t_defined
+typedef short __dev_t;
+#endif
+#endif
+
+#ifndef __uid_t_defined
+typedef unsigned short __uid_t;
+#endif
+#ifndef __gid_t_defined
+typedef unsigned short __gid_t;
+#endif
+
+#ifndef __off64_t_defined
+__extension__ typedef long long _off64_t;
+#endif
+
+/*
+ * We need fpos_t for the following, but it doesn't have a leading "_",
+ * so we use _fpos_t instead.
+ */
+#ifndef __fpos_t_defined
+typedef long _fpos_t;		/* XXX must match off_t in <sys/types.h> */
+				/* (and must be `long' for now) */
+#endif
+
+#ifdef __LARGE64_FILES
+#ifndef __fpos64_t_defined
+typedef _off64_t _fpos64_t;
+#endif
+#endif
+
+#ifndef __ssize_t_defined
+#if defined(__INT_MAX__) && __INT_MAX__ == 2147483647
+typedef int _ssize_t;
+#else
+typedef long _ssize_t;
+#endif
+#endif
+
+#define __need_wint_t
+#include <stddef.h>
+
+#ifndef __mbstate_t_defined
+/* Conversion state information.  */
+typedef struct
+{
+  int __count;
+  union
+  {
+    wint_t __wch;
+    unsigned char __wchb[4];
+  } __value;		/* Value so far.  */
+} _mbstate_t;
+#endif
+
+#ifndef __flock_t_defined
+typedef _LOCK_RECURSIVE_T _flock_t;
+#endif
+
+#ifndef __iconv_t_defined
+/* Iconv descriptor type */
+typedef void *_iconv_t;
+#endif
+
+#endif	/* _SYS__TYPES_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/cdefs.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/cdefs.h
new file mode 100644
index 00000000..e3298efa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/cdefs.h
@@ -0,0 +1,144 @@
+/* libc/sys/linux/sys/cdefs.h - Helper macros for K&R vs. ANSI C compat. */
+
+/* Written 2000 by Werner Almesberger */
+
+/*
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * This code is derived from software contributed to Berkeley by
+ * Berkeley Software Design, Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)cdefs.h	8.8 (Berkeley) 1/9/95
+ * $FreeBSD: src/sys/sys/cdefs.h,v 1.54 2002/05/11 03:58:24 alfred Exp $
+ */
+
+#ifndef _SYS_CDEFS_H
+#define _SYS_CDEFS_H
+
+#define __FBSDID(x) /* nothing */
+/*
+ * Note: the goal here is not compatibility to K&R C. Since we know that we
+ * have GCC which understands ANSI C perfectly well, we make use of this.
+ */
+
+#define __P(args)	args
+#define __PMT(args)	args
+#define __const		const
+#define __signed	signed
+#define __volatile	volatile
+#define __DOTS    	, ...
+#define __THROW
+
+/*
+ * The __CONCAT macro is used to concatenate parts of symbol names, e.g.
+ * with "#define OLD(foo) __CONCAT(old,foo)", OLD(foo) produces oldfoo.
+ * The __CONCAT macro is a bit tricky to use if it must work in non-ANSI
+ * mode -- there must be no spaces between its arguments, and for nested
+ * __CONCAT's, all the __CONCAT's must be at the left.  __CONCAT can also
+ * concatenate double-quoted strings produced by the __STRING macro, but
+ * this only works with ANSI C.
+ *
+ * __XSTRING is like __STRING, but it expands any macros in its argument
+ * first.  It is only available with ANSI C.
+ */
+#define __CONCAT1(x,y)  x ## y
+#define __CONCAT(x,y)   __CONCAT1(x,y)
+#define __STRING(x)     #x              /* stringify without expanding x */
+#define __XSTRING(x)    __STRING(x)     /* expand x, then stringify */
+
+#ifdef __GNUC__
+# define __ASMNAME(cname)  __XSTRING (__USER_LABEL_PREFIX__) cname
+#endif
+
+#define __ptr_t void *
+#define __long_double_t  long double
+
+#define __attribute_malloc__
+#define __attribute_pure__
+#define __attribute_format_strfmon__(a,b)
+#define __flexarr      [0]
+
+#ifdef  __cplusplus
+# define __BEGIN_DECLS  extern "C" {
+# define __END_DECLS    }
+#else
+# define __BEGIN_DECLS
+# define __END_DECLS
+#endif
+
+#ifndef __BOUNDED_POINTERS__
+# define __bounded      /* nothing */
+# define __unbounded    /* nothing */
+# define __ptrvalue     /* nothing */
+#endif
+
+#ifdef __GNUC__
+#define	__strong_reference(sym,aliassym)	\
+	extern __typeof (sym) aliassym __attribute__ ((__alias__ (#sym)));
+#ifdef __ELF__
+#ifdef __STDC__
+#define	__weak_reference(sym,alias)	\
+	__asm__(".weak " #alias);	\
+	__asm__(".equ "  #alias ", " #sym)
+#define	__warn_references(sym,msg)	\
+	__asm__(".section .gnu.warning." #sym);	\
+	__asm__(".asciz \"" msg "\"");	\
+	__asm__(".previous")
+#else
+#define	__weak_reference(sym,alias)	\
+	__asm__(".weak alias");		\
+	__asm__(".equ alias, sym")
+#define	__warn_references(sym,msg)	\
+	__asm__(".section .gnu.warning.sym"); \
+	__asm__(".asciz \"msg\"");	\
+	__asm__(".previous")
+#endif	/* __STDC__ */
+#else	/* !__ELF__ */
+#ifdef __STDC__
+#define	__weak_reference(sym,alias)	\
+	__asm__(".stabs \"_" #alias "\",11,0,0,0");	\
+	__asm__(".stabs \"_" #sym "\",1,0,0,0")
+#define	__warn_references(sym,msg)	\
+	__asm__(".stabs \"" msg "\",30,0,0,0");		\
+	__asm__(".stabs \"_" #sym "\",1,0,0,0")
+#else
+#define	__weak_reference(sym,alias)	\
+	__asm__(".stabs \"_/**/alias\",11,0,0,0");	\
+	__asm__(".stabs \"_/**/sym\",1,0,0,0")
+#define	__warn_references(sym,msg)	\
+	__asm__(".stabs msg,30,0,0,0");			\
+	__asm__(".stabs \"_/**/sym\",1,0,0,0")
+#endif	/* __STDC__ */
+#endif	/* __ELF__ */
+#endif	/* __GNUC__ */
+
+#endif /* _SYS_CDEFS_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/config.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/config.h
new file mode 100644
index 00000000..a6528b83
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/config.h
@@ -0,0 +1,259 @@
+#ifndef __SYS_CONFIG_H__
+#define __SYS_CONFIG_H__
+
+#include <machine/ieeefp.h>  /* floating point macros */
+#include <sys/features.h>	/* POSIX defs */
+
+#ifdef __aarch64__
+#define MALLOC_ALIGNMENT 16
+#endif
+
+/* exceptions first */
+#if defined(__H8500__) || defined(__W65__)
+#define __SMALL_BITFIELDS
+/* ???  This conditional is true for the h8500 and the w65, defining H8300
+   in those cases probably isn't the right thing to do.  */
+#define H8300 1
+#endif
+
+/* 16 bit integer machines */
+#if defined(__Z8001__) || defined(__Z8002__) || defined(__H8500__) || defined(__W65__) || defined (__mn10200__) || defined (__AVR__)
+
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX 32767
+#define UINT_MAX 65535
+#endif
+
+#if defined (__H8300__) || defined (__H8300H__) || defined(__H8300S__) || defined (__H8300SX__)
+#define __SMALL_BITFIELDS
+#define H8300 1
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#endif
+
+#if (defined(__CR16__) || defined(__CR16C__) ||defined(__CR16CP__))
+#ifndef __INT32__
+#define __SMALL_BITFIELDS      
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX 32767
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#else /* INT32 */
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX 2147483647
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#endif /* INT32 */
+
+#endif /* CR16C */
+
+#if defined (__xc16x__) || defined (__xc16xL__) || defined (__xc16xS__)
+#define __SMALL_BITFIELDS
+#endif
+
+#ifdef __W65__
+#define __SMALL_BITFIELDS
+#endif
+
+#if defined(__D10V__)
+#define __SMALL_BITFIELDS
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#define _POINTER_INT short
+#endif
+
+#if defined(__mc68hc11__) || defined(__mc68hc12__) || defined(__mc68hc1x__)
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#define _POINTER_INT short
+#endif
+
+#ifdef ___AM29K__
+#define _FLOAT_RET double
+#endif
+
+#ifdef __i386__
+#ifndef __unix__
+/* in other words, go32 */
+#define _FLOAT_RET double
+#endif
+#if defined(__linux__) || defined(__RDOS__)
+/* we want the reentrancy structure to be returned by a function */
+#define __DYNAMIC_REENT__
+#define HAVE_GETDATE
+#define _HAVE_SYSTYPES
+#define _READ_WRITE_RETURN_TYPE _ssize_t
+#define __LARGE64_FILES 1
+/* we use some glibc header files so turn on glibc large file feature */
+#define _LARGEFILE64_SOURCE 1
+#endif
+#endif
+
+#ifdef __mn10200__
+#define __SMALL_BITFIELDS
+#endif
+
+#ifdef __AVR__
+#define __SMALL_BITFIELDS
+#define _POINTER_INT short
+#endif
+
+#ifdef __v850
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__sda__))
+#endif
+
+/* For the PowerPC eabi, force the _impure_ptr to be in .sdata */
+#if defined(__PPC__)
+#if defined(_CALL_SYSV)
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__section__(".sdata")))
+#endif
+#ifdef __SPE__
+#define _LONG_DOUBLE double
+#endif
+#endif
+
+/* Configure small REENT structure for Xilinx MicroBlaze platforms */
+#if defined (__MICROBLAZE__)
+#ifndef _REENT_SMALL
+#define _REENT_SMALL
+#endif
+/* Xilinx XMK uses Unix98 mutex */
+#ifdef __XMK__
+#define _UNIX98_THREAD_MUTEX_ATTRIBUTES
+#endif
+#endif
+
+#if defined(__mips__) && !defined(__rtems__)
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__section__(".sdata")))
+#endif
+
+#ifdef __xstormy16__
+#define __SMALL_BITFIELDS
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#define MALLOC_ALIGNMENT 8
+#define _POINTER_INT short
+#define __BUFSIZ__ 16
+#define _REENT_SMALL
+#endif
+#ifdef __m32c__
+#define __SMALL_BITFIELDS
+#undef INT_MAX
+#undef UINT_MAX
+#define INT_MAX __INT_MAX__
+#define UINT_MAX (__INT_MAX__ * 2U + 1)
+#define MALLOC_ALIGNMENT 8
+#if defined(__r8c_cpu__) || defined(__m16c_cpu__)
+#define _POINTER_INT short
+#else
+#define _POINTER_INT long
+#endif
+#define __BUFSIZ__ 16
+#define _REENT_SMALL
+#endif /* __m32c__ */
+
+#ifdef __SPU__
+#define MALLOC_ALIGNMENT 16
+#define __CUSTOM_FILE_IO__
+#endif
+
+/* This block should be kept in sync with GCC's limits.h.  The point
+   of having these definitions here is to not include limits.h, which
+   would pollute the user namespace, while still using types of the
+   the correct widths when deciding how to define __int32_t and
+   __int64_t.  */
+#ifndef __INT_MAX__
+# ifdef INT_MAX
+#  define __INT_MAX__ INT_MAX
+# else
+#  define __INT_MAX__ 2147483647
+# endif
+#endif
+
+#ifndef __LONG_MAX__
+# ifdef LONG_MAX
+#  define __LONG_MAX__ LONG_MAX
+# else
+#  if defined (__alpha__) || (defined (__sparc__) && defined(__arch64__)) \
+      || defined (__sparcv9)
+#   define __LONG_MAX__ 9223372036854775807L
+#  else
+#   define __LONG_MAX__ 2147483647L
+#  endif /* __alpha__ || sparc64 */
+# endif
+#endif
+/* End of block that should be kept in sync with GCC's limits.h.  */
+
+#ifndef _POINTER_INT
+#define _POINTER_INT long
+#endif
+
+#ifdef __frv__
+#define __ATTRIBUTE_IMPURE_PTR__ __attribute__((__section__(".sdata")))
+#endif
+#undef __RAND_MAX
+#if __INT_MAX__ == 32767
+#define __RAND_MAX 32767
+#else
+#define __RAND_MAX 0x7fffffff
+#endif
+
+#if defined(__CYGWIN__)
+#include <cygwin/config.h>
+#if !defined (__STRICT_ANSI__) || (__STDC_VERSION__ >= 199901L)
+#define __USE_XOPEN2K 1
+#endif
+#endif
+
+#if defined(__rtems__)
+#define __FILENAME_MAX__ 255
+#define _READ_WRITE_RETURN_TYPE _ssize_t
+#endif
+
+#ifndef __EXPORT
+#define __EXPORT
+#endif
+
+#ifndef __IMPORT
+#define __IMPORT
+#endif
+
+/* Define return type of read/write routines.  In POSIX, the return type
+   for read()/write() is "ssize_t" but legacy newlib code has been using
+   "int" for some time.  If not specified, "int" is defaulted.  */
+#ifndef _READ_WRITE_RETURN_TYPE
+#define _READ_WRITE_RETURN_TYPE int
+#endif
+
+#ifndef __WCHAR_MAX__
+#if __INT_MAX__ == 32767 || defined (_WIN32)
+#define __WCHAR_MAX__ 0xffffu
+#endif
+#endif
+
+/* See if small reent asked for at configuration time and
+   is not chosen by the platform by default.  */
+#ifdef _WANT_REENT_SMALL
+#ifndef _REENT_SMALL
+#define _REENT_SMALL
+#endif
+#endif
+
+/* If _MB_EXTENDED_CHARSETS_ALL is set, we want all of the extended
+   charsets.  The extended charsets add a few functions and a couple
+   of tables of a few K each. */
+#ifdef _MB_EXTENDED_CHARSETS_ALL
+#define _MB_EXTENDED_CHARSETS_ISO 1
+#define _MB_EXTENDED_CHARSETS_WINDOWS 1
+#endif
+
+#endif /* __SYS_CONFIG_H__ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/custom_file.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/custom_file.h
new file mode 100644
index 00000000..96314fb9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/custom_file.h
@@ -0,0 +1,2 @@
+#error System-specific custom_file.h is missing.
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dir.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dir.h
new file mode 100644
index 00000000..220150dc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dir.h
@@ -0,0 +1,10 @@
+/* BSD predecessor of POSIX.1 <dirent.h> and struct dirent */
+
+#ifndef _SYS_DIR_H_
+#define _SYS_DIR_H_
+
+#include <dirent.h>
+
+#define direct dirent
+
+#endif /*_SYS_DIR_H_*/
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dirent.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dirent.h
new file mode 100644
index 00000000..a3fb5c02
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/dirent.h
@@ -0,0 +1,13 @@
+/* <dirent.h> includes <sys/dirent.h>, which is this file.  On a
+   system which supports <dirent.h>, this file is overridden by
+   dirent.h in the libc/sys/.../sys directory.  On a system which does
+   not support <dirent.h>, we will get this file which uses #error to force
+   an error.  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+#error "<dirent.h> not supported"
+#ifdef __cplusplus
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/errno.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/errno.h
new file mode 100644
index 00000000..c93b250c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/errno.h
@@ -0,0 +1,192 @@
+/* errno is not a global variable, because that would make using it
+   non-reentrant.  Instead, its address is returned by the function
+   __errno.  */
+
+#ifndef _SYS_ERRNO_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _SYS_ERRNO_H_
+
+#include <sys/reent.h>
+
+#ifndef _REENT_ONLY
+#define errno (*__errno())
+extern int *__errno _PARAMS ((void));
+#endif
+
+/* Please don't use these variables directly.
+   Use strerror instead. */
+extern __IMPORT _CONST char * _CONST _sys_errlist[];
+extern __IMPORT int _sys_nerr;
+#ifdef __CYGWIN__
+extern __IMPORT const char * const sys_errlist[];
+extern __IMPORT int sys_nerr;
+extern __IMPORT char *program_invocation_name;
+extern __IMPORT char *program_invocation_short_name;
+#endif
+
+#define __errno_r(ptr) ((ptr)->_errno)
+
+#define	EPERM 1		/* Not super-user */
+#define	ENOENT 2	/* No such file or directory */
+#define	ESRCH 3		/* No such process */
+#define	EINTR 4		/* Interrupted system call */
+#define	EIO 5		/* I/O error */
+#define	ENXIO 6		/* No such device or address */
+#define	E2BIG 7		/* Arg list too long */
+#define	ENOEXEC 8	/* Exec format error */
+#define	EBADF 9		/* Bad file number */
+#define	ECHILD 10	/* No children */
+#define	EAGAIN 11	/* No more processes */
+#define	ENOMEM 12	/* Not enough core */
+#define	EACCES 13	/* Permission denied */
+#define	EFAULT 14	/* Bad address */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define	ENOTBLK 15	/* Block device required */
+#endif
+#define	EBUSY 16	/* Mount device busy */
+#define	EEXIST 17	/* File exists */
+#define	EXDEV 18	/* Cross-device link */
+#define	ENODEV 19	/* No such device */
+#define	ENOTDIR 20	/* Not a directory */
+#define	EISDIR 21	/* Is a directory */
+#define	EINVAL 22	/* Invalid argument */
+#define	ENFILE 23	/* Too many open files in system */
+#define	EMFILE 24	/* Too many open files */
+#define	ENOTTY 25	/* Not a typewriter */
+#define	ETXTBSY 26	/* Text file busy */
+#define	EFBIG 27	/* File too large */
+#define	ENOSPC 28	/* No space left on device */
+#define	ESPIPE 29	/* Illegal seek */
+#define	EROFS 30	/* Read only file system */
+#define	EMLINK 31	/* Too many links */
+#define	EPIPE 32	/* Broken pipe */
+#define	EDOM 33		/* Math arg out of domain of func */
+#define	ERANGE 34	/* Math result not representable */
+#define	ENOMSG 35	/* No message of desired type */
+#define	EIDRM 36	/* Identifier removed */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define	ECHRNG 37	/* Channel number out of range */
+#define	EL2NSYNC 38	/* Level 2 not synchronized */
+#define	EL3HLT 39	/* Level 3 halted */
+#define	EL3RST 40	/* Level 3 reset */
+#define	ELNRNG 41	/* Link number out of range */
+#define	EUNATCH 42	/* Protocol driver not attached */
+#define	ENOCSI 43	/* No CSI structure available */
+#define	EL2HLT 44	/* Level 2 halted */
+#endif
+#define	EDEADLK 45	/* Deadlock condition */
+#define	ENOLCK 46	/* No record locks available */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define EBADE 50	/* Invalid exchange */
+#define EBADR 51	/* Invalid request descriptor */
+#define EXFULL 52	/* Exchange full */
+#define ENOANO 53	/* No anode */
+#define EBADRQC 54	/* Invalid request code */
+#define EBADSLT 55	/* Invalid slot */
+#define EDEADLOCK 56	/* File locking deadlock error */
+#define EBFONT 57	/* Bad font file fmt */
+#endif
+#define ENOSTR 60	/* Device not a stream */
+#define ENODATA 61	/* No data (for no delay io) */
+#define ETIME 62	/* Timer expired */
+#define ENOSR 63	/* Out of streams resources */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ENONET 64	/* Machine is not on the network */
+#define ENOPKG 65	/* Package not installed */
+#define EREMOTE 66	/* The object is remote */
+#endif
+#define ENOLINK 67	/* The link has been severed */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define EADV 68		/* Advertise error */
+#define ESRMNT 69	/* Srmount error */
+#define	ECOMM 70	/* Communication error on send */
+#endif
+#define EPROTO 71	/* Protocol error */
+#define	EMULTIHOP 74	/* Multihop attempted */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define	ELBIN 75	/* Inode is remote (not really error) */
+#define	EDOTDOT 76	/* Cross mount point (not really error) */
+#endif
+#define EBADMSG 77	/* Trying to read unreadable message */
+#define EFTYPE 79	/* Inappropriate file type or format */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ENOTUNIQ 80	/* Given log. name not unique */
+#define EBADFD 81	/* f.d. invalid for this operation */
+#define EREMCHG 82	/* Remote address changed */
+#define ELIBACC 83	/* Can't access a needed shared lib */
+#define ELIBBAD 84	/* Accessing a corrupted shared lib */
+#define ELIBSCN 85	/* .lib section in a.out corrupted */
+#define ELIBMAX 86	/* Attempting to link in too many libs */
+#define ELIBEXEC 87	/* Attempting to exec a shared library */
+#endif
+#define ENOSYS 88	/* Function not implemented */
+#ifdef __CYGWIN__
+#define ENMFILE 89      /* No more files */
+#endif
+#define ENOTEMPTY 90	/* Directory not empty */
+#define ENAMETOOLONG 91	/* File or path name too long */
+#define ELOOP 92	/* Too many symbolic links */
+#define EOPNOTSUPP 95	/* Operation not supported on transport endpoint */
+#define EPFNOSUPPORT 96 /* Protocol family not supported */
+#define ECONNRESET 104  /* Connection reset by peer */
+#define ENOBUFS 105	/* No buffer space available */
+#define EAFNOSUPPORT 106 /* Address family not supported by protocol family */
+#define EPROTOTYPE 107	/* Protocol wrong type for socket */
+#define ENOTSOCK 108	/* Socket operation on non-socket */
+#define ENOPROTOOPT 109	/* Protocol not available */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ESHUTDOWN 110	/* Can't send after socket shutdown */
+#endif
+#define ECONNREFUSED 111	/* Connection refused */
+#define EADDRINUSE 112		/* Address already in use */
+#define ECONNABORTED 113	/* Connection aborted */
+#define ENETUNREACH 114		/* Network is unreachable */
+#define ENETDOWN 115		/* Network interface is not configured */
+#define ETIMEDOUT 116		/* Connection timed out */
+#define EHOSTDOWN 117		/* Host is down */
+#define EHOSTUNREACH 118	/* Host is unreachable */
+#define EINPROGRESS 119		/* Connection already in progress */
+#define EALREADY 120		/* Socket already connected */
+#define EDESTADDRREQ 121	/* Destination address required */
+#define EMSGSIZE 122		/* Message too long */
+#define EPROTONOSUPPORT 123	/* Unknown protocol */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ESOCKTNOSUPPORT 124	/* Socket type not supported */
+#endif
+#define EADDRNOTAVAIL 125	/* Address not available */
+#define ENETRESET 126
+#define EISCONN 127		/* Socket is already connected */
+#define ENOTCONN 128		/* Socket is not connected */
+#define ETOOMANYREFS 129
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define EPROCLIM 130
+#define EUSERS 131
+#endif
+#define EDQUOT 132
+#define ESTALE 133
+#define ENOTSUP 134		/* Not supported */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ENOMEDIUM 135   /* No medium (in tape drive) */
+#endif
+#ifdef __CYGWIN__
+#define ENOSHARE 136    /* No such host or network path */
+#define ECASECLASH 137  /* Filename exists with different case */
+#endif
+#define EILSEQ 138
+#define EOVERFLOW 139	/* Value too large for defined data type */
+#define ECANCELED 140	/* Operation canceled */
+#define ENOTRECOVERABLE 141	/* State not recoverable */
+#define EOWNERDEAD 142	/* Previous owner died */
+#ifdef __LINUX_ERRNO_EXTENSIONS__
+#define ESTRPIPE 143	/* Streams pipe error */
+#endif
+#define EWOULDBLOCK EAGAIN	/* Operation would block */
+
+#define __ELASTERROR 2000	/* Users can add values starting here */
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_ERRNO_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/fcntl.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/fcntl.h
new file mode 100644
index 00000000..7da1d46d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/fcntl.h
@@ -0,0 +1,12 @@
+#ifndef _SYS_FCNTL_H_
+#define _SYS_FCNTL_H_
+
+#include <sys/_default_fcntl.h>
+
+/* We want to support O_BINARY for the open syscall.
+   For example, the Demon debug monitor has a separate
+   flag value for "rb" vs "r". */
+#define _FBINARY        0x10000
+#define O_BINARY        _FBINARY
+
+#endif /* _SYS_FCNTL_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/features.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/features.h
new file mode 100644
index 00000000..a8ada297
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/features.h
@@ -0,0 +1,221 @@
+/*
+ *  Written by Joel Sherrill <joel@OARcorp.com>.
+ *
+ *  COPYRIGHT (c) 1989-2000.
+ *
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Permission to use, copy, modify, and distribute this software for any
+ *  purpose without fee is hereby granted, provided that this entire notice
+ *  is included in all copies of any software which is or includes a copy
+ *  or modification of this software.
+ *
+ *  THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY.  IN PARTICULAR,  THE AUTHOR MAKES NO REPRESENTATION
+ *  OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS
+ *  SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ *  $Id: features.h,v 1.28 2012/10/16 18:45:23 corinna Exp $
+ */
+
+#ifndef _SYS_FEATURES_H
+#define _SYS_FEATURES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Macro to test version of GCC.  Returns 0 for non-GCC or too old GCC. */
+#ifndef __GNUC_PREREQ
+# if defined __GNUC__ && defined __GNUC_MINOR__
+#  define __GNUC_PREREQ(maj, min) \
+	((__GNUC__ << 16) + __GNUC_MINOR__ >= ((maj) << 16) + (min))
+# else
+#  define __GNUC_PREREQ(maj, min) 0
+# endif
+#endif /* __GNUC_PREREQ */
+
+/* RTEMS adheres to POSIX -- 1003.1b with some features from annexes.  */
+
+#ifdef __rtems__
+#define _POSIX_JOB_CONTROL     		1
+#define _POSIX_SAVED_IDS       		1
+#define _POSIX_VERSION			199309L
+#define _POSIX_ASYNCHRONOUS_IO		1
+#define _POSIX_FSYNC			1
+#define _POSIX_MAPPED_FILES		1
+#define _POSIX_MEMLOCK			1
+#define _POSIX_MEMLOCK_RANGE		1
+#define _POSIX_MEMORY_PROTECTION	1
+#define _POSIX_MESSAGE_PASSING		1
+#define _POSIX_MONOTONIC_CLOCK		200112L
+#define _POSIX_PRIORITIZED_IO		1
+#define _POSIX_PRIORITY_SCHEDULING	1
+#define _POSIX_REALTIME_SIGNALS		1
+#define _POSIX_SEMAPHORES		1
+/* #define _POSIX_SHARED_MEMORY_OBJECTS	1 */
+#define _POSIX_SYNCHRONIZED_IO		1
+#define _POSIX_TIMERS			1
+#define _POSIX_BARRIERS                 200112L
+#define _POSIX_READER_WRITER_LOCKS      200112L
+#define _POSIX_SPIN_LOCKS               200112L
+
+
+/* In P1003.1b but defined by drafts at least as early as P1003.1c/D10  */
+#define _POSIX_THREADS				1
+#define _POSIX_THREAD_ATTR_STACKADDR		1
+#define _POSIX_THREAD_ATTR_STACKSIZE		1
+#define _POSIX_THREAD_PRIORITY_SCHEDULING	1
+#define _POSIX_THREAD_PRIO_INHERIT		1
+#define _POSIX_THREAD_PRIO_PROTECT		1
+#define _POSIX_THREAD_PROCESS_SHARED		1
+#define _POSIX_THREAD_SAFE_FUNCTIONS		1
+
+/* P1003.4b/D8 defines the constants below this comment. */
+#define _POSIX_SPAWN				1
+#define _POSIX_TIMEOUTS				1
+#define _POSIX_CPUTIME				1
+#define _POSIX_THREAD_CPUTIME			1
+#define _POSIX_SPORADIC_SERVER			1
+#define _POSIX_THREAD_SPORADIC_SERVER		1
+#define _POSIX_DEVICE_CONTROL			1
+#define _POSIX_DEVCTL_DIRECTION			1
+#define _POSIX_INTERRUPT_CONTROL		1
+#define _POSIX_ADVISORY_INFO			1
+
+/* UNIX98 added some new pthread mutex attributes */
+#define _UNIX98_THREAD_MUTEX_ATTRIBUTES         1
+
+#endif
+
+/* XMK loosely adheres to POSIX -- 1003.1 */
+#ifdef __XMK__
+#define _POSIX_THREADS				1
+#define _POSIX_THREAD_PRIORITY_SCHEDULING	1
+#endif
+
+
+#ifdef __svr4__
+# define _POSIX_JOB_CONTROL     1
+# define _POSIX_SAVED_IDS       1
+# define _POSIX_VERSION 199009L
+#endif
+
+#ifdef __CYGWIN__
+
+#if !defined(__STRICT_ANSI__) || defined(__cplusplus) || __STDC_VERSION__ >= 199901L
+#define _POSIX_VERSION				200112L
+#define _POSIX2_VERSION				200112L
+#define _XOPEN_VERSION				   600
+
+#define _POSIX_ADVISORY_INFO			200112L
+/* #define _POSIX_ASYNCHRONOUS_IO		    -1 */
+/* #define _POSIX_BARRIERS			    -1 */
+#define _POSIX_CHOWN_RESTRICTED			     1
+#define _POSIX_CLOCK_SELECTION			200112L
+#define _POSIX_CPUTIME			    	200112L
+#define _POSIX_FSYNC				200112L
+#define _POSIX_IPV6				200112L
+#define _POSIX_JOB_CONTROL			     1
+#define _POSIX_MAPPED_FILES			200112L
+/* #define _POSIX_MEMLOCK			    -1 */
+#define _POSIX_MEMLOCK_RANGE			200112L
+#define _POSIX_MEMORY_PROTECTION		200112L
+#define _POSIX_MESSAGE_PASSING			200112L
+#define _POSIX_MONOTONIC_CLOCK			200112L
+#define _POSIX_NO_TRUNC				     1
+/* #define _POSIX_PRIORITIZED_IO		    -1 */
+#define _POSIX_PRIORITY_SCHEDULING		200112L
+#define _POSIX_RAW_SOCKETS			200112L
+#define _POSIX_READER_WRITER_LOCKS		200112L
+#define _POSIX_REALTIME_SIGNALS			200112L
+#define _POSIX_REGEXP				     1
+#define _POSIX_SAVED_IDS			     1
+#define _POSIX_SEMAPHORES			200112L
+#define _POSIX_SHARED_MEMORY_OBJECTS		200112L 
+#define _POSIX_SHELL				     1
+/* #define _POSIX_SPAWN				    -1 */
+#define _POSIX_SPIN_LOCKS			    200112L
+/* #define _POSIX_SPORADIC_SERVER		    -1 */
+#define _POSIX_SYNCHRONIZED_IO			200112L
+#define _POSIX_THREAD_ATTR_STACKADDR		200112L
+#define _POSIX_THREAD_ATTR_STACKSIZE		200112L
+#define _POSIX_THREAD_CPUTIME			200112L
+/* #define _POSIX_THREAD_PRIO_INHERIT		    -1 */
+/* #define _POSIX_THREAD_PRIO_PROTECT		    -1 */
+#define _POSIX_THREAD_PRIORITY_SCHEDULING	200112L
+#define _POSIX_THREAD_PROCESS_SHARED		200112L
+#define _POSIX_THREAD_SAFE_FUNCTIONS		200112L
+/* #define _POSIX_THREAD_SPORADIC_SERVER	    -1 */
+#define _POSIX_THREADS				200112L
+/* #define _POSIX_TIMEOUTS			    -1 */
+#define _POSIX_TIMERS				     1
+/* #define _POSIX_TRACE				    -1 */
+/* #define _POSIX_TRACE_EVENT_FILTER		    -1 */
+/* #define _POSIX_TRACE_INHERIT			    -1 */
+/* #define _POSIX_TRACE_LOG			    -1 */
+/* #define _POSIX_TYPED_MEMORY_OBJECTS		    -1 */
+#define _POSIX_VDISABLE				   '\0'
+#define _POSIX2_C_BIND				200112L
+#define _POSIX2_C_DEV				200112L
+#define _POSIX2_CHAR_TERM			200112L
+/* #define _POSIX2_FORT_DEV			    -1 */
+/* #define _POSIX2_FORT_RUN			    -1 */
+/* #define _POSIX2_LOCALEDEF			    -1 */
+/* #define _POSIX2_PBS				    -1 */
+/* #define _POSIX2_PBS_ACCOUNTING		    -1 */
+/* #define _POSIX2_PBS_CHECKPOINT		    -1 */
+/* #define _POSIX2_PBS_LOCATE			    -1 */
+/* #define _POSIX2_PBS_MESSAGE			    -1 */
+/* #define _POSIX2_PBS_TRACK			    -1 */
+#define _POSIX2_SW_DEV				200112L
+#define _POSIX2_UPE				200112L
+#define _POSIX_V6_ILP32_OFF32			    -1
+#define _XBS5_ILP32_OFF32			_POSIX_V6_ILP32_OFF32
+#define _POSIX_V6_ILP32_OFFBIG			     1
+#define _XBS5_ILP32_OFFBIG			_POSIX_V6_ILP32_OFFBIG
+#define _POSIX_V6_LP64_OFF64			    -1
+#define _XBS5_LP64_OFF64			_POSIX_V6_LP64_OFF64
+#define _POSIX_V6_LPBIG_OFFBIG			    -1
+#define _XBS5_LPBIG_OFFBIG			_POSIX_V6_LPBIG_OFFBIG
+#define _XOPEN_CRYPT				     1
+#define _XOPEN_ENH_I18N				     1
+/* #define _XOPEN_LEGACY			    -1 */
+/* #define _XOPEN_REALTIME			    -1 */
+/* #define _XOPEN_REALTIME_THREADS		    -1 */
+#define _XOPEN_SHM				     1
+/* #define _XOPEN_STREAMS			    -1 */
+/* #define _XOPEN_UNIX				    -1 */
+
+#endif /* !__STRICT_ANSI__ || __cplusplus || __STDC_VERSION__ >= 199901L */
+
+/* The value corresponds to UNICODE version 4.0, which is the version
+   supported by XP.  Newlib supports 5.2 (2011) but so far Cygwin needs
+   the MS conversions for double-byte charsets. */
+#define __STDC_ISO_10646__ 200305L
+
+#endif /* __CYGWIN__ */
+
+/* Per the permission given in POSIX.1-2008 section 2.2.1, define
+ * _POSIX_C_SOURCE if _XOPEN_SOURCE is defined and _POSIX_C_SOURCE is not.
+ * (_XOPEN_SOURCE indicates that XSI extensions are desired by an application.)
+ * This permission is first granted in 2008, but use it for older ones, also.
+ * Allow for _XOPEN_SOURCE to be empty (from the earliest form of it, before it
+ * was required to have specific values).
+ */
+#if !defined(_POSIX_C_SOURCE)  &&  defined(_XOPEN_SOURCE) 
+  #if (_XOPEN_SOURCE - 0) == 700	/* POSIX.1-2008 */
+    #define _POSIX_C_SOURCE       200809L
+   #elif (_XOPEN_SOURCE - 0) == 600	/* POSIX.1-2001 or 2004 */
+    #define _POSIX_C_SOURCE       200112L
+   #elif (_XOPEN_SOURCE - 0) == 500	/* POSIX.1-1995 */
+    #define _POSIX_C_SOURCE       199506L
+   #elif (_XOPEN_SOURCE - 0) < 500	/* really old */
+    #define _POSIX_C_SOURCE       2
+  #endif
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_FEATURES_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/file.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/file.h
new file mode 100644
index 00000000..58d4fac3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/file.h
@@ -0,0 +1,2 @@
+
+#include <sys/fcntl.h>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/iconvnls.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/iconvnls.h
new file mode 100644
index 00000000..09ea1831
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/iconvnls.h
@@ -0,0 +1,77 @@
+/*
+ * Copyright (c) 2003-2004, Artem B. Bityuckiy.
+ * Rights transferred to Franklin Electronic Publishers.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+/*
+ * Funtions, macros, etc implimented in iconv library but used by other
+ * NLS-related subsystems too.
+ */
+#ifndef __SYS_ICONVNLS_H__
+#define __SYS_ICONVNLS_H__
+
+#include <_ansi.h>
+#include <reent.h>
+#include <wchar.h>
+#include <iconv.h>
+
+/* Iconv data path environment variable name */
+#define NLS_ENVVAR_NAME  "NLSPATH"
+/* Default NLSPATH value */
+#define ICONV_DEFAULT_NLSPATH "/usr/locale"
+/* Direction markers */
+#define ICONV_NLS_FROM 0
+#define ICONV_NLS_TO   1
+
+_VOID
+_EXFUN(_iconv_nls_get_state, (iconv_t cd, mbstate_t *ps, int direction));
+
+int
+_EXFUN(_iconv_nls_set_state, (iconv_t cd, mbstate_t *ps, int direction));
+
+int
+_EXFUN(_iconv_nls_is_stateful, (iconv_t cd, int direction));
+
+int
+_EXFUN(_iconv_nls_get_mb_cur_max, (iconv_t cd, int direction));
+
+size_t
+_EXFUN(_iconv_nls_conv, (struct _reent *rptr, iconv_t cd,
+                        _CONST char **inbuf, size_t *inbytesleft,
+                        char **outbuf, size_t *outbytesleft));
+
+_CONST char *
+_EXFUN(_iconv_nls_construct_filename, (struct _reent *rptr, _CONST char *file,
+                                      _CONST char *dir, _CONST char *ext));
+
+
+int
+_EXFUN(_iconv_nls_open, (struct _reent *rptr, _CONST char *encoding,
+                        iconv_t *towc, iconv_t *fromwc, int flag));
+
+char *
+_EXFUN(_iconv_resolve_encoding_name, (struct _reent *rptr, _CONST char *ca));
+
+#endif /* __SYS_ICONVNLS_H__ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/lock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/lock.h
new file mode 100644
index 00000000..9075e35c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/lock.h
@@ -0,0 +1,24 @@
+#ifndef __SYS_LOCK_H__
+#define __SYS_LOCK_H__
+
+/* dummy lock routines for single-threaded aps */
+
+typedef int _LOCK_T;
+typedef int _LOCK_RECURSIVE_T;
+ 
+#include <_ansi.h>
+
+#define __LOCK_INIT(class,lock) static int lock = 0;
+#define __LOCK_INIT_RECURSIVE(class,lock) static int lock = 0;
+#define __lock_init(lock) (_CAST_VOID 0)
+#define __lock_init_recursive(lock) (_CAST_VOID 0)
+#define __lock_close(lock) (_CAST_VOID 0)
+#define __lock_close_recursive(lock) (_CAST_VOID 0)
+#define __lock_acquire(lock) (_CAST_VOID 0)
+#define __lock_acquire_recursive(lock) (_CAST_VOID 0)
+#define __lock_try_acquire(lock) (_CAST_VOID 0)
+#define __lock_try_acquire_recursive(lock) (_CAST_VOID 0)
+#define __lock_release(lock) (_CAST_VOID 0)
+#define __lock_release_recursive(lock) (_CAST_VOID 0)
+
+#endif /* __SYS_LOCK_H__ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/param.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/param.h
new file mode 100644
index 00000000..da5f5433
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/param.h
@@ -0,0 +1,15 @@
+/* ARM configuration file; HZ is 100 rather than the default 60 */
+
+#ifndef _SYS_PARAM_H
+# define _SYS_PARAM_H
+
+# define HZ (100)
+# define NOFILE	(60)
+# define PATHSIZE (1024)
+
+#define BIG_ENDIAN      4321
+#define LITTLE_ENDIAN   1234
+
+#define BYTE_ORDER LITTLE_ENDIAN
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/queue.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/queue.h
new file mode 100644
index 00000000..af637ca0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/queue.h
@@ -0,0 +1,471 @@
+/*
+ * Copyright (c) 1991, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)queue.h	8.5 (Berkeley) 8/20/94
+ * $FreeBSD: src/sys/sys/queue.h,v 1.48 2002/04/17 14:00:37 tmm Exp $
+ */
+
+#ifndef _SYS_QUEUE_H_
+#define	_SYS_QUEUE_H_
+
+#include <machine/ansi.h>	/* for __offsetof */
+
+/*
+ * This file defines four types of data structures: singly-linked lists,
+ * singly-linked tail queues, lists and tail queues.
+ *
+ * A singly-linked list is headed by a single forward pointer. The elements
+ * are singly linked for minimum space and pointer manipulation overhead at
+ * the expense of O(n) removal for arbitrary elements. New elements can be
+ * added to the list after an existing element or at the head of the list.
+ * Elements being removed from the head of the list should use the explicit
+ * macro for this purpose for optimum efficiency. A singly-linked list may
+ * only be traversed in the forward direction.  Singly-linked lists are ideal
+ * for applications with large datasets and few or no removals or for
+ * implementing a LIFO queue.
+ *
+ * A singly-linked tail queue is headed by a pair of pointers, one to the
+ * head of the list and the other to the tail of the list. The elements are
+ * singly linked for minimum space and pointer manipulation overhead at the
+ * expense of O(n) removal for arbitrary elements. New elements can be added
+ * to the list after an existing element, at the head of the list, or at the
+ * end of the list. Elements being removed from the head of the tail queue
+ * should use the explicit macro for this purpose for optimum efficiency.
+ * A singly-linked tail queue may only be traversed in the forward direction.
+ * Singly-linked tail queues are ideal for applications with large datasets
+ * and few or no removals or for implementing a FIFO queue.
+ *
+ * A list is headed by a single forward pointer (or an array of forward
+ * pointers for a hash table header). The elements are doubly linked
+ * so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before
+ * or after an existing element or at the head of the list. A list
+ * may only be traversed in the forward direction.
+ *
+ * A tail queue is headed by a pair of pointers, one to the head of the
+ * list and the other to the tail of the list. The elements are doubly
+ * linked so that an arbitrary element can be removed without a need to
+ * traverse the list. New elements can be added to the list before or
+ * after an existing element, at the head of the list, or at the end of
+ * the list. A tail queue may be traversed in either direction.
+ *
+ * For details on the use of these macros, see the queue(3) manual page.
+ *
+ *
+ *			SLIST	LIST	STAILQ	TAILQ
+ * _HEAD		+	+	+	+
+ * _HEAD_INITIALIZER	+	+	+	+
+ * _ENTRY		+	+	+	+
+ * _INIT		+	+	+	+
+ * _EMPTY		+	+	+	+
+ * _FIRST		+	+	+	+
+ * _NEXT		+	+	+	+
+ * _PREV		-	-	-	+
+ * _LAST		-	-	+	+
+ * _FOREACH		+	+	+	+
+ * _FOREACH_REVERSE	-	-	-	+
+ * _INSERT_HEAD		+	+	+	+
+ * _INSERT_BEFORE	-	+	-	+
+ * _INSERT_AFTER	+	+	+	+
+ * _INSERT_TAIL		-	-	+	+
+ * _CONCAT		-	-	+	+
+ * _REMOVE_HEAD		+	-	+	-
+ * _REMOVE		+	+	+	+
+ *
+ */
+
+/*
+ * Singly-linked List declarations.
+ */
+#define	SLIST_HEAD(name, type)						\
+struct name {								\
+	struct type *slh_first;	/* first element */			\
+}
+
+#define	SLIST_HEAD_INITIALIZER(head)					\
+	{ NULL }
+ 
+#define	SLIST_ENTRY(type)						\
+struct {								\
+	struct type *sle_next;	/* next element */			\
+}
+ 
+/*
+ * Singly-linked List functions.
+ */
+#define	SLIST_EMPTY(head)	((head)->slh_first == NULL)
+
+#define	SLIST_FIRST(head)	((head)->slh_first)
+
+#define	SLIST_FOREACH(var, head, field)					\
+	for ((var) = SLIST_FIRST((head));				\
+	    (var);							\
+	    (var) = SLIST_NEXT((var), field))
+
+#define	SLIST_INIT(head) do {						\
+	SLIST_FIRST((head)) = NULL;					\
+} while (0)
+
+#define	SLIST_INSERT_AFTER(slistelm, elm, field) do {			\
+	SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field);	\
+	SLIST_NEXT((slistelm), field) = (elm);				\
+} while (0)
+
+#define	SLIST_INSERT_HEAD(head, elm, field) do {			\
+	SLIST_NEXT((elm), field) = SLIST_FIRST((head));			\
+	SLIST_FIRST((head)) = (elm);					\
+} while (0)
+
+#define	SLIST_NEXT(elm, field)	((elm)->field.sle_next)
+
+#define	SLIST_REMOVE(head, elm, type, field) do {			\
+	if (SLIST_FIRST((head)) == (elm)) {				\
+		SLIST_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		struct type *curelm = SLIST_FIRST((head));		\
+		while (SLIST_NEXT(curelm, field) != (elm))		\
+			curelm = SLIST_NEXT(curelm, field);		\
+		SLIST_NEXT(curelm, field) =				\
+		    SLIST_NEXT(SLIST_NEXT(curelm, field), field);	\
+	}								\
+} while (0)
+
+#define	SLIST_REMOVE_HEAD(head, field) do {				\
+	SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field);	\
+} while (0)
+
+/*
+ * Singly-linked Tail queue declarations.
+ */
+#define	STAILQ_HEAD(name, type)						\
+struct name {								\
+	struct type *stqh_first;/* first element */			\
+	struct type **stqh_last;/* addr of last next element */		\
+}
+
+#define	STAILQ_HEAD_INITIALIZER(head)					\
+	{ NULL, &(head).stqh_first }
+
+#define	STAILQ_ENTRY(type)						\
+struct {								\
+	struct type *stqe_next;	/* next element */			\
+}
+
+/*
+ * Singly-linked Tail queue functions.
+ */
+#define	STAILQ_CONCAT(head1, head2) do {				\
+	if (!STAILQ_EMPTY((head2))) {					\
+		*(head1)->stqh_last = (head2)->stqh_first;		\
+		(head1)->stqh_last = (head2)->stqh_last;		\
+		STAILQ_INIT((head2));					\
+	}								\
+} while (0)
+
+#define	STAILQ_EMPTY(head)	((head)->stqh_first == NULL)
+
+#define	STAILQ_FIRST(head)	((head)->stqh_first)
+
+#define	STAILQ_FOREACH(var, head, field)				\
+	for((var) = STAILQ_FIRST((head));				\
+	   (var);							\
+	   (var) = STAILQ_NEXT((var), field))
+
+#define	STAILQ_INIT(head) do {						\
+	STAILQ_FIRST((head)) = NULL;					\
+	(head)->stqh_last = &STAILQ_FIRST((head));			\
+} while (0)
+
+#define	STAILQ_INSERT_AFTER(head, tqelm, elm, field) do {		\
+	if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\
+		(head)->stqh_last = &STAILQ_NEXT((elm), field);		\
+	STAILQ_NEXT((tqelm), field) = (elm);				\
+} while (0)
+
+#define	STAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL)	\
+		(head)->stqh_last = &STAILQ_NEXT((elm), field);		\
+	STAILQ_FIRST((head)) = (elm);					\
+} while (0)
+
+#define	STAILQ_INSERT_TAIL(head, elm, field) do {			\
+	STAILQ_NEXT((elm), field) = NULL;				\
+	*(head)->stqh_last = (elm);					\
+	(head)->stqh_last = &STAILQ_NEXT((elm), field);			\
+} while (0)
+
+#define	STAILQ_LAST(head, type, field)					\
+	(STAILQ_EMPTY((head)) ?						\
+		NULL :							\
+	        ((struct type *)					\
+		((char *)((head)->stqh_last) - __offsetof(struct type, field))))
+
+#define	STAILQ_NEXT(elm, field)	((elm)->field.stqe_next)
+
+#define	STAILQ_REMOVE(head, elm, type, field) do {			\
+	if (STAILQ_FIRST((head)) == (elm)) {				\
+		STAILQ_REMOVE_HEAD((head), field);			\
+	}								\
+	else {								\
+		struct type *curelm = STAILQ_FIRST((head));		\
+		while (STAILQ_NEXT(curelm, field) != (elm))		\
+			curelm = STAILQ_NEXT(curelm, field);		\
+		if ((STAILQ_NEXT(curelm, field) =			\
+		     STAILQ_NEXT(STAILQ_NEXT(curelm, field), field)) == NULL)\
+			(head)->stqh_last = &STAILQ_NEXT((curelm), field);\
+	}								\
+} while (0)
+
+#define	STAILQ_REMOVE_HEAD(head, field) do {				\
+	if ((STAILQ_FIRST((head)) =					\
+	     STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL)		\
+		(head)->stqh_last = &STAILQ_FIRST((head));		\
+} while (0)
+
+#define	STAILQ_REMOVE_HEAD_UNTIL(head, elm, field) do {			\
+	if ((STAILQ_FIRST((head)) = STAILQ_NEXT((elm), field)) == NULL)	\
+		(head)->stqh_last = &STAILQ_FIRST((head));		\
+} while (0)
+
+/*
+ * List declarations.
+ */
+#define	LIST_HEAD(name, type)						\
+struct name {								\
+	struct type *lh_first;	/* first element */			\
+}
+
+#define	LIST_HEAD_INITIALIZER(head)					\
+	{ NULL }
+
+#define	LIST_ENTRY(type)						\
+struct {								\
+	struct type *le_next;	/* next element */			\
+	struct type **le_prev;	/* address of previous next element */	\
+}
+
+/*
+ * List functions.
+ */
+
+#define	LIST_EMPTY(head)	((head)->lh_first == NULL)
+
+#define	LIST_FIRST(head)	((head)->lh_first)
+
+#define	LIST_FOREACH(var, head, field)					\
+	for ((var) = LIST_FIRST((head));				\
+	    (var);							\
+	    (var) = LIST_NEXT((var), field))
+
+#define	LIST_INIT(head) do {						\
+	LIST_FIRST((head)) = NULL;					\
+} while (0)
+
+#define	LIST_INSERT_AFTER(listelm, elm, field) do {			\
+	if ((LIST_NEXT((elm), field) = LIST_NEXT((listelm), field)) != NULL)\
+		LIST_NEXT((listelm), field)->field.le_prev =		\
+		    &LIST_NEXT((elm), field);				\
+	LIST_NEXT((listelm), field) = (elm);				\
+	(elm)->field.le_prev = &LIST_NEXT((listelm), field);		\
+} while (0)
+
+#define	LIST_INSERT_BEFORE(listelm, elm, field) do {			\
+	(elm)->field.le_prev = (listelm)->field.le_prev;		\
+	LIST_NEXT((elm), field) = (listelm);				\
+	*(listelm)->field.le_prev = (elm);				\
+	(listelm)->field.le_prev = &LIST_NEXT((elm), field);		\
+} while (0)
+
+#define	LIST_INSERT_HEAD(head, elm, field) do {				\
+	if ((LIST_NEXT((elm), field) = LIST_FIRST((head))) != NULL)	\
+		LIST_FIRST((head))->field.le_prev = &LIST_NEXT((elm), field);\
+	LIST_FIRST((head)) = (elm);					\
+	(elm)->field.le_prev = &LIST_FIRST((head));			\
+} while (0)
+
+#define	LIST_NEXT(elm, field)	((elm)->field.le_next)
+
+#define	LIST_REMOVE(elm, field) do {					\
+	if (LIST_NEXT((elm), field) != NULL)				\
+		LIST_NEXT((elm), field)->field.le_prev = 		\
+		    (elm)->field.le_prev;				\
+	*(elm)->field.le_prev = LIST_NEXT((elm), field);		\
+} while (0)
+
+/*
+ * Tail queue declarations.
+ */
+#define	TAILQ_HEAD(name, type)						\
+struct name {								\
+	struct type *tqh_first;	/* first element */			\
+	struct type **tqh_last;	/* addr of last next element */		\
+}
+
+#define	TAILQ_HEAD_INITIALIZER(head)					\
+	{ NULL, &(head).tqh_first }
+
+#define	TAILQ_ENTRY(type)						\
+struct {								\
+	struct type *tqe_next;	/* next element */			\
+	struct type **tqe_prev;	/* address of previous next element */	\
+}
+
+/*
+ * Tail queue functions.
+ */
+#define	TAILQ_CONCAT(head1, head2, field) do {				\
+	if (!TAILQ_EMPTY(head2)) {					\
+		*(head1)->tqh_last = (head2)->tqh_first;		\
+		(head2)->tqh_first->field.tqe_prev = (head1)->tqh_last;	\
+		(head1)->tqh_last = (head2)->tqh_last;			\
+		TAILQ_INIT((head2));					\
+	}								\
+} while (0)
+
+#define	TAILQ_EMPTY(head)	((head)->tqh_first == NULL)
+
+#define	TAILQ_FIRST(head)	((head)->tqh_first)
+
+#define	TAILQ_FOREACH(var, head, field)					\
+	for ((var) = TAILQ_FIRST((head));				\
+	    (var);							\
+	    (var) = TAILQ_NEXT((var), field))
+
+#define	TAILQ_FOREACH_REVERSE(var, head, headname, field)		\
+	for ((var) = TAILQ_LAST((head), headname);			\
+	    (var);							\
+	    (var) = TAILQ_PREV((var), headname, field))
+
+#define	TAILQ_INIT(head) do {						\
+	TAILQ_FIRST((head)) = NULL;					\
+	(head)->tqh_last = &TAILQ_FIRST((head));			\
+} while (0)
+
+#define	TAILQ_INSERT_AFTER(head, listelm, elm, field) do {		\
+	if ((TAILQ_NEXT((elm), field) = TAILQ_NEXT((listelm), field)) != NULL)\
+		TAILQ_NEXT((elm), field)->field.tqe_prev = 		\
+		    &TAILQ_NEXT((elm), field);				\
+	else								\
+		(head)->tqh_last = &TAILQ_NEXT((elm), field);		\
+	TAILQ_NEXT((listelm), field) = (elm);				\
+	(elm)->field.tqe_prev = &TAILQ_NEXT((listelm), field);		\
+} while (0)
+
+#define	TAILQ_INSERT_BEFORE(listelm, elm, field) do {			\
+	(elm)->field.tqe_prev = (listelm)->field.tqe_prev;		\
+	TAILQ_NEXT((elm), field) = (listelm);				\
+	*(listelm)->field.tqe_prev = (elm);				\
+	(listelm)->field.tqe_prev = &TAILQ_NEXT((elm), field);		\
+} while (0)
+
+#define	TAILQ_INSERT_HEAD(head, elm, field) do {			\
+	if ((TAILQ_NEXT((elm), field) = TAILQ_FIRST((head))) != NULL)	\
+		TAILQ_FIRST((head))->field.tqe_prev =			\
+		    &TAILQ_NEXT((elm), field);				\
+	else								\
+		(head)->tqh_last = &TAILQ_NEXT((elm), field);		\
+	TAILQ_FIRST((head)) = (elm);					\
+	(elm)->field.tqe_prev = &TAILQ_FIRST((head));			\
+} while (0)
+
+#define	TAILQ_INSERT_TAIL(head, elm, field) do {			\
+	TAILQ_NEXT((elm), field) = NULL;				\
+	(elm)->field.tqe_prev = (head)->tqh_last;			\
+	*(head)->tqh_last = (elm);					\
+	(head)->tqh_last = &TAILQ_NEXT((elm), field);			\
+} while (0)
+
+#define	TAILQ_LAST(head, headname)					\
+	(*(((struct headname *)((head)->tqh_last))->tqh_last))
+
+#define	TAILQ_NEXT(elm, field) ((elm)->field.tqe_next)
+
+#define	TAILQ_PREV(elm, headname, field)				\
+	(*(((struct headname *)((elm)->field.tqe_prev))->tqh_last))
+
+#define	TAILQ_REMOVE(head, elm, field) do {				\
+	if ((TAILQ_NEXT((elm), field)) != NULL)				\
+		TAILQ_NEXT((elm), field)->field.tqe_prev = 		\
+		    (elm)->field.tqe_prev;				\
+	else								\
+		(head)->tqh_last = (elm)->field.tqe_prev;		\
+	*(elm)->field.tqe_prev = TAILQ_NEXT((elm), field);		\
+} while (0)
+
+
+#ifdef _KERNEL
+
+/*
+ * XXX insque() and remque() are an old way of handling certain queues.
+ * They bogusly assumes that all queue heads look alike.
+ */
+
+struct quehead {
+	struct quehead *qh_link;
+	struct quehead *qh_rlink;
+};
+
+#ifdef	__GNUC__
+
+static __inline void
+insque(void *a, void *b)
+{
+	struct quehead *element = (struct quehead *)a,
+		 *head = (struct quehead *)b;
+
+	element->qh_link = head->qh_link;
+	element->qh_rlink = head;
+	head->qh_link = element;
+	element->qh_link->qh_rlink = element;
+}
+
+static __inline void
+remque(void *a)
+{
+	struct quehead *element = (struct quehead *)a;
+
+	element->qh_link->qh_rlink = element->qh_rlink;
+	element->qh_rlink->qh_link = element->qh_link;
+	element->qh_rlink = 0;
+}
+
+#else /* !__GNUC__ */
+
+void	insque(void *a, void *b);
+void	remque(void *a);
+
+#endif /* __GNUC__ */
+
+#endif /* _KERNEL */
+
+#endif /* !_SYS_QUEUE_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/reent.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/reent.h
new file mode 100644
index 00000000..7e321e05
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/reent.h
@@ -0,0 +1,843 @@
+/* This header file provides the reentrancy.  */
+
+/* WARNING: All identifiers here must begin with an underscore.  This file is
+   included by stdio.h and others and we therefore must only use identifiers
+   in the namespace allotted to us.  */
+
+#ifndef _SYS_REENT_H_
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define _SYS_REENT_H_
+
+#include <_ansi.h>
+#include <sys/_types.h>
+
+#define _NULL 0
+
+#ifndef __Long
+#if __LONG_MAX__ == 2147483647L
+#define __Long long
+typedef unsigned __Long __ULong;
+#elif __INT_MAX__ == 2147483647
+#define __Long int
+typedef unsigned __Long __ULong;
+#endif
+#endif
+
+#if !defined( __Long)
+#include <sys/types.h>
+#endif
+
+#ifndef __Long
+#define __Long __int32_t
+typedef __uint32_t __ULong;
+#endif
+
+struct _reent;
+
+/*
+ * If _REENT_SMALL is defined, we make struct _reent as small as possible,
+ * by having nearly everything possible allocated at first use.
+ */
+
+struct _Bigint
+{
+  struct _Bigint *_next;
+  int _k, _maxwds, _sign, _wds;
+  __ULong _x[1];
+};
+
+/* needed by reentrant structure */
+struct __tm
+{
+  int   __tm_sec;
+  int   __tm_min;
+  int   __tm_hour;
+  int   __tm_mday;
+  int   __tm_mon;
+  int   __tm_year;
+  int   __tm_wday;
+  int   __tm_yday;
+  int   __tm_isdst;
+};
+
+/*
+ * atexit() support.
+ */
+
+#define	_ATEXIT_SIZE 32	/* must be at least 32 to guarantee ANSI conformance */
+
+struct _on_exit_args {
+	void *  _fnargs[_ATEXIT_SIZE];	        /* user fn args */
+	void *	_dso_handle[_ATEXIT_SIZE];
+	/* Bitmask is set if user function takes arguments.  */
+	__ULong _fntypes;           	        /* type of exit routine -
+				   Must have at least _ATEXIT_SIZE bits */
+	/* Bitmask is set if function was registered via __cxa_atexit.  */
+	__ULong _is_cxa;
+};
+
+#ifdef _REENT_SMALL
+struct _atexit {
+	struct	_atexit *_next;			/* next in list */
+	int	_ind;				/* next index in this table */
+	void	(*_fns[_ATEXIT_SIZE])(void);	/* the table itself */
+        struct _on_exit_args * _on_exit_args_ptr;
+};
+#else
+struct _atexit {
+	struct	_atexit *_next;			/* next in list */
+	int	_ind;				/* next index in this table */
+	/* Some entries may already have been called, and will be NULL.  */
+	void	(*_fns[_ATEXIT_SIZE])(void);	/* the table itself */
+        struct _on_exit_args _on_exit_args;
+};
+#endif
+
+/*
+ * Stdio buffers.
+ *
+ * This and __FILE are defined here because we need them for struct _reent,
+ * but we don't want stdio.h included when stdlib.h is.
+ */
+
+struct __sbuf {
+	unsigned char *_base;
+	int	_size;
+};
+
+/*
+ * Stdio state variables.
+ *
+ * The following always hold:
+ *
+ *	if (_flags&(__SLBF|__SWR)) == (__SLBF|__SWR),
+ *		_lbfsize is -_bf._size, else _lbfsize is 0
+ *	if _flags&__SRD, _w is 0
+ *	if _flags&__SWR, _r is 0
+ *
+ * This ensures that the getc and putc macros (or inline functions) never
+ * try to write or read from a file that is in `read' or `write' mode.
+ * (Moreover, they can, and do, automatically switch from read mode to
+ * write mode, and back, on "r+" and "w+" files.)
+ *
+ * _lbfsize is used only to make the inline line-buffered output stream
+ * code as compact as possible.
+ *
+ * _ub, _up, and _ur are used when ungetc() pushes back more characters
+ * than fit in the current _bf, or when ungetc() pushes back a character
+ * that does not match the previous one in _bf.  When this happens,
+ * _ub._base becomes non-nil (i.e., a stream has ungetc() data iff
+ * _ub._base!=NULL) and _up and _ur save the current values of _p and _r.
+ */
+
+#ifdef _REENT_SMALL
+/*
+ * struct __sFILE_fake is the start of a struct __sFILE, with only the
+ * minimal fields allocated.  In __sinit() we really allocate the 3
+ * standard streams, etc., and point away from this fake.
+ */
+struct __sFILE_fake {
+  unsigned char *_p;	/* current position in (some) buffer */
+  int	_r;		/* read space left for getc() */
+  int	_w;		/* write space left for putc() */
+  short	_flags;		/* flags, below; this FILE is free if 0 */
+  short	_file;		/* fileno, if Unix descriptor, else -1 */
+  struct __sbuf _bf;	/* the buffer (at least 1 byte, if !NULL) */
+  int	_lbfsize;	/* 0 or -_bf._size, for inline putc */
+
+  struct _reent *_data;
+};
+
+/* Following is needed both in libc/stdio and libc/stdlib so we put it
+ * here instead of libc/stdio/local.h where it was previously. */
+
+extern _VOID   _EXFUN(__sinit,(struct _reent *));
+
+# define _REENT_SMALL_CHECK_INIT(ptr)		\
+  do						\
+    {						\
+      if ((ptr) && !(ptr)->__sdidinit)		\
+	__sinit (ptr);				\
+    }						\
+  while (0)
+#else
+# define _REENT_SMALL_CHECK_INIT(ptr) /* nothing */
+#endif
+
+struct __sFILE {
+  unsigned char *_p;	/* current position in (some) buffer */
+  int	_r;		/* read space left for getc() */
+  int	_w;		/* write space left for putc() */
+  short	_flags;		/* flags, below; this FILE is free if 0 */
+  short	_file;		/* fileno, if Unix descriptor, else -1 */
+  struct __sbuf _bf;	/* the buffer (at least 1 byte, if !NULL) */
+  int	_lbfsize;	/* 0 or -_bf._size, for inline putc */
+
+#ifdef _REENT_SMALL
+  struct _reent *_data;
+#endif
+
+  /* operations */
+  _PTR	_cookie;	/* cookie passed to io functions */
+
+  _READ_WRITE_RETURN_TYPE _EXFNPTR(_read, (struct _reent *, _PTR,
+					   char *, int));
+  _READ_WRITE_RETURN_TYPE _EXFNPTR(_write, (struct _reent *, _PTR,
+					    const char *, int));
+  _fpos_t _EXFNPTR(_seek, (struct _reent *, _PTR, _fpos_t, int));
+  int _EXFNPTR(_close, (struct _reent *, _PTR));
+
+  /* separate buffer for long sequences of ungetc() */
+  struct __sbuf _ub;	/* ungetc buffer */
+  unsigned char *_up;	/* saved _p when _p is doing ungetc data */
+  int	_ur;		/* saved _r when _r is counting ungetc data */
+
+  /* tricks to meet minimum requirements even when malloc() fails */
+  unsigned char _ubuf[3];	/* guarantee an ungetc() buffer */
+  unsigned char _nbuf[1];	/* guarantee a getc() buffer */
+
+  /* separate buffer for fgetline() when line crosses buffer boundary */
+  struct __sbuf _lb;	/* buffer for fgetline() */
+
+  /* Unix stdio files get aligned to block boundaries on fseek() */
+  int	_blksize;	/* stat.st_blksize (may be != _bf._size) */
+  _off_t _offset;	/* current lseek offset */
+
+#ifndef _REENT_SMALL
+  struct _reent *_data;	/* Here for binary compatibility? Remove? */
+#endif
+
+#ifndef __SINGLE_THREAD__
+  _flock_t _lock;	/* for thread-safety locking */
+#endif
+  _mbstate_t _mbstate;	/* for wide char stdio functions. */
+  int   _flags2;        /* for future use */
+};
+
+#ifdef __CUSTOM_FILE_IO__
+
+/* Get custom _FILE definition.  */
+#include <sys/custom_file.h>
+
+#else /* !__CUSTOM_FILE_IO__ */
+#ifdef __LARGE64_FILES
+struct __sFILE64 {
+  unsigned char *_p;	/* current position in (some) buffer */
+  int	_r;		/* read space left for getc() */
+  int	_w;		/* write space left for putc() */
+  short	_flags;		/* flags, below; this FILE is free if 0 */
+  short	_file;		/* fileno, if Unix descriptor, else -1 */
+  struct __sbuf _bf;	/* the buffer (at least 1 byte, if !NULL) */
+  int	_lbfsize;	/* 0 or -_bf._size, for inline putc */
+
+  struct _reent *_data;
+
+  /* operations */
+  _PTR	_cookie;	/* cookie passed to io functions */
+
+  _READ_WRITE_RETURN_TYPE _EXFNPTR(_read, (struct _reent *, _PTR,
+					   char *, int));
+  _READ_WRITE_RETURN_TYPE _EXFNPTR(_write, (struct _reent *, _PTR,
+					    const char *, int));
+  _fpos_t _EXFNPTR(_seek, (struct _reent *, _PTR, _fpos_t, int));
+  int _EXFNPTR(_close, (struct _reent *, _PTR));
+
+  /* separate buffer for long sequences of ungetc() */
+  struct __sbuf _ub;	/* ungetc buffer */
+  unsigned char *_up;	/* saved _p when _p is doing ungetc data */
+  int	_ur;		/* saved _r when _r is counting ungetc data */
+
+  /* tricks to meet minimum requirements even when malloc() fails */
+  unsigned char _ubuf[3];	/* guarantee an ungetc() buffer */
+  unsigned char _nbuf[1];	/* guarantee a getc() buffer */
+
+  /* separate buffer for fgetline() when line crosses buffer boundary */
+  struct __sbuf _lb;	/* buffer for fgetline() */
+
+  /* Unix stdio files get aligned to block boundaries on fseek() */
+  int	_blksize;	/* stat.st_blksize (may be != _bf._size) */
+  int   _flags2;        /* for future use */
+
+  _off64_t _offset;     /* current lseek offset */
+  _fpos64_t _EXFNPTR(_seek64, (struct _reent *, _PTR, _fpos64_t, int));
+
+#ifndef __SINGLE_THREAD__
+  _flock_t _lock;	/* for thread-safety locking */
+#endif
+  _mbstate_t _mbstate;	/* for wide char stdio functions. */
+};
+typedef struct __sFILE64 __FILE;
+#else
+typedef struct __sFILE   __FILE;
+#endif /* __LARGE64_FILES */
+#endif /* !__CUSTOM_FILE_IO__ */
+
+struct _glue
+{
+  struct _glue *_next;
+  int _niobs;
+  __FILE *_iobs;
+};
+
+/*
+ * rand48 family support
+ *
+ * Copyright (c) 1993 Martin Birgmeier
+ * All rights reserved.
+ *
+ * You may redistribute unmodified or modified versions of this source
+ * code provided that the above copyright notice and this and the
+ * following conditions are retained.
+ *
+ * This software is provided ``as is'', and comes with no warranties
+ * of any kind. I shall in no event be liable for anything that happens
+ * to anyone/anything when using this software.
+ */
+#define        _RAND48_SEED_0  (0x330e)
+#define        _RAND48_SEED_1  (0xabcd)
+#define        _RAND48_SEED_2  (0x1234)
+#define        _RAND48_MULT_0  (0xe66d)
+#define        _RAND48_MULT_1  (0xdeec)
+#define        _RAND48_MULT_2  (0x0005)
+#define        _RAND48_ADD     (0x000b)
+struct _rand48 {
+  unsigned short _seed[3];
+  unsigned short _mult[3];
+  unsigned short _add;
+#ifdef _REENT_SMALL
+  /* Put this in here as well, for good luck.  */
+  __extension__ unsigned long long _rand_next;
+#endif
+};
+
+/* How big the some arrays are.  */
+#define _REENT_EMERGENCY_SIZE 25
+#define _REENT_ASCTIME_SIZE 26
+#define _REENT_SIGNAL_SIZE 24
+
+/*
+ * struct _reent
+ *
+ * This structure contains *all* globals needed by the library.
+ * It's raison d'etre is to facilitate threads by making all library routines
+ * reentrant.  IE: All state information is contained here.
+ */
+
+#ifdef _REENT_SMALL
+
+struct _mprec
+{
+  /* used by mprec routines */
+  struct _Bigint *_result;
+  int _result_k;
+  struct _Bigint *_p5s;
+  struct _Bigint **_freelist;
+};
+
+
+struct _misc_reent
+{
+  /* miscellaneous reentrant data */
+  char *_strtok_last;
+  _mbstate_t _mblen_state;
+  _mbstate_t _wctomb_state;
+  _mbstate_t _mbtowc_state;
+  char _l64a_buf[8];
+  int _getdate_err;
+  _mbstate_t _mbrlen_state;
+  _mbstate_t _mbrtowc_state;
+  _mbstate_t _mbsrtowcs_state;
+  _mbstate_t _wcrtomb_state;
+  _mbstate_t _wcsrtombs_state;
+};
+
+/* This version of _reent is layed our with "int"s in pairs, to help
+ * ports with 16-bit int's but 32-bit pointers, align nicely.  */
+struct _reent
+{
+  /* As an exception to the above put _errno first for binary
+     compatibility with non _REENT_SMALL targets.  */
+  int _errno;			/* local copy of errno */
+
+  /* FILE is a big struct and may change over time.  To try to achieve binary
+     compatibility with future versions, put stdin,stdout,stderr here.
+     These are pointers into member __sf defined below.  */
+  __FILE *_stdin, *_stdout, *_stderr;	/* XXX */
+
+  int  _inc;			/* used by tmpnam */
+
+  char *_emergency;
+
+  int __sdidinit;		/* 1 means stdio has been init'd */
+
+  int _current_category;	/* unused */
+  _CONST char *_current_locale;	/* unused */
+
+  struct _mprec *_mp;
+
+  void _EXFNPTR(__cleanup, (struct _reent *));
+
+  int _gamma_signgam;
+
+  /* used by some fp conversion routines */
+  int _cvtlen;			/* should be size_t */
+  char *_cvtbuf;
+
+  struct _rand48 *_r48;
+  struct __tm *_localtime_buf;
+  char *_asctime_buf;
+
+  /* signal info */
+  void (**(_sig_func))(int);
+
+  /* atexit stuff */
+  struct _atexit *_atexit;
+  struct _atexit _atexit0;
+
+  struct _glue __sglue;			/* root of glue chain */
+  __FILE *__sf;			        /* file descriptors */
+  struct _misc_reent *_misc;            /* strtok, multibyte states */
+  char *_signal_buf;                    /* strsignal */
+};
+
+extern const struct __sFILE_fake __sf_fake_stdin;
+extern const struct __sFILE_fake __sf_fake_stdout;
+extern const struct __sFILE_fake __sf_fake_stderr;
+
+# define _REENT_INIT(var) \
+  { 0, \
+    (__FILE *)&__sf_fake_stdin, \
+    (__FILE *)&__sf_fake_stdout, \
+    (__FILE *)&__sf_fake_stderr, \
+    0, \
+    _NULL, \
+    0, \
+    0, \
+    "C", \
+    _NULL, \
+    _NULL, \
+    0, \
+    0, \
+    _NULL, \
+    _NULL, \
+    _NULL, \
+    _NULL, \
+    _NULL, \
+    _NULL, \
+    {_NULL, 0, {_NULL}, _NULL}, \
+    {_NULL, 0, _NULL}, \
+    _NULL, \
+    _NULL, \
+    _NULL \
+  }
+
+#define _REENT_INIT_PTR(var) \
+  { (var)->_stdin = (__FILE *)&__sf_fake_stdin; \
+    (var)->_stdout = (__FILE *)&__sf_fake_stdout; \
+    (var)->_stderr = (__FILE *)&__sf_fake_stderr; \
+    (var)->_errno = 0; \
+    (var)->_inc = 0; \
+    (var)->_emergency = _NULL; \
+    (var)->__sdidinit = 0; \
+    (var)->_current_category = 0; \
+    (var)->_current_locale = "C"; \
+    (var)->_mp = _NULL; \
+    (var)->__cleanup = _NULL; \
+    (var)->_gamma_signgam = 0; \
+    (var)->_cvtlen = 0; \
+    (var)->_cvtbuf = _NULL; \
+    (var)->_r48 = _NULL; \
+    (var)->_localtime_buf = _NULL; \
+    (var)->_asctime_buf = _NULL; \
+    (var)->_sig_func = _NULL; \
+    (var)->_atexit = _NULL; \
+    (var)->_atexit0._next = _NULL; \
+    (var)->_atexit0._ind = 0; \
+    (var)->_atexit0._fns[0] = _NULL; \
+    (var)->_atexit0._on_exit_args_ptr = _NULL; \
+    (var)->__sglue._next = _NULL; \
+    (var)->__sglue._niobs = 0; \
+    (var)->__sglue._iobs = _NULL; \
+    (var)->__sf = 0; \
+    (var)->_misc = _NULL; \
+    (var)->_signal_buf = _NULL; \
+  }
+
+/* Only built the assert() calls if we are built with debugging.  */
+#if DEBUG
+#include <assert.h>
+#define __reent_assert(x) assert(x)
+#else
+#define __reent_assert(x) ((void)0)
+#endif
+
+#ifdef __CUSTOM_FILE_IO__
+#error Custom FILE I/O and _REENT_SMALL not currently supported.
+#endif
+
+/* Generic _REENT check macro.  */
+#define _REENT_CHECK(var, what, type, size, init) do { \
+  struct _reent *_r = (var); \
+  if (_r->what == NULL) { \
+    _r->what = (type)malloc(size); \
+    __reent_assert(_r->what); \
+    init; \
+  } \
+} while (0)
+
+#define _REENT_CHECK_TM(var) \
+  _REENT_CHECK(var, _localtime_buf, struct __tm *, sizeof *((var)->_localtime_buf), \
+    /* nothing */)
+
+#define _REENT_CHECK_ASCTIME_BUF(var) \
+  _REENT_CHECK(var, _asctime_buf, char *, _REENT_ASCTIME_SIZE, \
+    memset((var)->_asctime_buf, 0, _REENT_ASCTIME_SIZE))
+
+/* Handle the dynamically allocated rand48 structure. */
+#define _REENT_INIT_RAND48(var) do { \
+  struct _reent *_r = (var); \
+  _r->_r48->_seed[0] = _RAND48_SEED_0; \
+  _r->_r48->_seed[1] = _RAND48_SEED_1; \
+  _r->_r48->_seed[2] = _RAND48_SEED_2; \
+  _r->_r48->_mult[0] = _RAND48_MULT_0; \
+  _r->_r48->_mult[1] = _RAND48_MULT_1; \
+  _r->_r48->_mult[2] = _RAND48_MULT_2; \
+  _r->_r48->_add = _RAND48_ADD; \
+  _r->_r48->_rand_next = 1; \
+} while (0)
+#define _REENT_CHECK_RAND48(var) \
+  _REENT_CHECK(var, _r48, struct _rand48 *, sizeof *((var)->_r48), _REENT_INIT_RAND48((var)))
+
+#define _REENT_INIT_MP(var) do { \
+  struct _reent *_r = (var); \
+  _r->_mp->_result_k = 0; \
+  _r->_mp->_result = _r->_mp->_p5s = _NULL; \
+  _r->_mp->_freelist = _NULL; \
+} while (0)
+#define _REENT_CHECK_MP(var) \
+  _REENT_CHECK(var, _mp, struct _mprec *, sizeof *((var)->_mp), _REENT_INIT_MP(var))
+
+#define _REENT_CHECK_EMERGENCY(var) \
+  _REENT_CHECK(var, _emergency, char *, _REENT_EMERGENCY_SIZE, /* nothing */)
+
+#define _REENT_INIT_MISC(var) do { \
+  struct _reent *_r = (var); \
+  _r->_misc->_strtok_last = _NULL; \
+  _r->_misc->_mblen_state.__count = 0; \
+  _r->_misc->_mblen_state.__value.__wch = 0; \
+  _r->_misc->_wctomb_state.__count = 0; \
+  _r->_misc->_wctomb_state.__value.__wch = 0; \
+  _r->_misc->_mbtowc_state.__count = 0; \
+  _r->_misc->_mbtowc_state.__value.__wch = 0; \
+  _r->_misc->_mbrlen_state.__count = 0; \
+  _r->_misc->_mbrlen_state.__value.__wch = 0; \
+  _r->_misc->_mbrtowc_state.__count = 0; \
+  _r->_misc->_mbrtowc_state.__value.__wch = 0; \
+  _r->_misc->_mbsrtowcs_state.__count = 0; \
+  _r->_misc->_mbsrtowcs_state.__value.__wch = 0; \
+  _r->_misc->_wcrtomb_state.__count = 0; \
+  _r->_misc->_wcrtomb_state.__value.__wch = 0; \
+  _r->_misc->_wcsrtombs_state.__count = 0; \
+  _r->_misc->_wcsrtombs_state.__value.__wch = 0; \
+  _r->_misc->_l64a_buf[0] = '\0'; \
+  _r->_misc->_getdate_err = 0; \
+} while (0)
+#define _REENT_CHECK_MISC(var) \
+  _REENT_CHECK(var, _misc, struct _misc_reent *, sizeof *((var)->_misc), _REENT_INIT_MISC(var))
+
+#define _REENT_CHECK_SIGNAL_BUF(var) \
+  _REENT_CHECK(var, _signal_buf, char *, _REENT_SIGNAL_SIZE, /* nothing */)
+
+#define _REENT_SIGNGAM(ptr)	((ptr)->_gamma_signgam)
+#define _REENT_RAND_NEXT(ptr)	((ptr)->_r48->_rand_next)
+#define _REENT_RAND48_SEED(ptr)	((ptr)->_r48->_seed)
+#define _REENT_RAND48_MULT(ptr)	((ptr)->_r48->_mult)
+#define _REENT_RAND48_ADD(ptr)	((ptr)->_r48->_add)
+#define _REENT_MP_RESULT(ptr)	((ptr)->_mp->_result)
+#define _REENT_MP_RESULT_K(ptr)	((ptr)->_mp->_result_k)
+#define _REENT_MP_P5S(ptr)	((ptr)->_mp->_p5s)
+#define _REENT_MP_FREELIST(ptr)	((ptr)->_mp->_freelist)
+#define _REENT_ASCTIME_BUF(ptr)	((ptr)->_asctime_buf)
+#define _REENT_TM(ptr)		((ptr)->_localtime_buf)
+#define _REENT_EMERGENCY(ptr)	((ptr)->_emergency)
+#define _REENT_STRTOK_LAST(ptr)	((ptr)->_misc->_strtok_last)
+#define _REENT_MBLEN_STATE(ptr)	((ptr)->_misc->_mblen_state)
+#define _REENT_MBTOWC_STATE(ptr)((ptr)->_misc->_mbtowc_state)
+#define _REENT_WCTOMB_STATE(ptr)((ptr)->_misc->_wctomb_state)
+#define _REENT_MBRLEN_STATE(ptr) ((ptr)->_misc->_mbrlen_state)
+#define _REENT_MBRTOWC_STATE(ptr) ((ptr)->_misc->_mbrtowc_state)
+#define _REENT_MBSRTOWCS_STATE(ptr) ((ptr)->_misc->_mbsrtowcs_state)
+#define _REENT_WCRTOMB_STATE(ptr) ((ptr)->_misc->_wcrtomb_state)
+#define _REENT_WCSRTOMBS_STATE(ptr) ((ptr)->_misc->_wcsrtombs_state)
+#define _REENT_L64A_BUF(ptr)    ((ptr)->_misc->_l64a_buf)
+#define _REENT_GETDATE_ERR_P(ptr) (&((ptr)->_misc->_getdate_err))
+#define _REENT_SIGNAL_BUF(ptr)  ((ptr)->_signal_buf)
+
+#else /* !_REENT_SMALL */
+
+struct _reent
+{
+  int _errno;			/* local copy of errno */
+
+  /* FILE is a big struct and may change over time.  To try to achieve binary
+     compatibility with future versions, put stdin,stdout,stderr here.
+     These are pointers into member __sf defined below.  */
+  __FILE *_stdin, *_stdout, *_stderr;
+
+  int  _inc;			/* used by tmpnam */
+  char _emergency[_REENT_EMERGENCY_SIZE];
+
+  int _current_category;	/* used by setlocale */
+  _CONST char *_current_locale;
+
+  int __sdidinit;		/* 1 means stdio has been init'd */
+
+  void _EXFNPTR(__cleanup, (struct _reent *));
+
+  /* used by mprec routines */
+  struct _Bigint *_result;
+  int _result_k;
+  struct _Bigint *_p5s;
+  struct _Bigint **_freelist;
+
+  /* used by some fp conversion routines */
+  int _cvtlen;			/* should be size_t */
+  char *_cvtbuf;
+
+  union
+    {
+      struct
+        {
+          unsigned int _unused_rand;
+          char * _strtok_last;
+          char _asctime_buf[_REENT_ASCTIME_SIZE];
+          struct __tm _localtime_buf;
+          int _gamma_signgam;
+          __extension__ unsigned long long _rand_next;
+          struct _rand48 _r48;
+          _mbstate_t _mblen_state;
+          _mbstate_t _mbtowc_state;
+          _mbstate_t _wctomb_state;
+          char _l64a_buf[8];
+          char _signal_buf[_REENT_SIGNAL_SIZE];
+          int _getdate_err;
+          _mbstate_t _mbrlen_state;
+          _mbstate_t _mbrtowc_state;
+          _mbstate_t _mbsrtowcs_state;
+          _mbstate_t _wcrtomb_state;
+          _mbstate_t _wcsrtombs_state;
+	  int _h_errno;
+        } _reent;
+  /* Two next two fields were once used by malloc.  They are no longer
+     used. They are used to preserve the space used before so as to
+     allow addition of new reent fields and keep binary compatibility.   */
+      struct
+        {
+#define _N_LISTS 30
+          unsigned char * _nextf[_N_LISTS];
+          unsigned int _nmalloc[_N_LISTS];
+        } _unused;
+    } _new;
+
+  /* atexit stuff */
+  struct _atexit *_atexit;	/* points to head of LIFO stack */
+  struct _atexit _atexit0;	/* one guaranteed table, required by ANSI */
+
+  /* signal info */
+  void (**(_sig_func))(int);
+
+  /* These are here last so that __FILE can grow without changing the offsets
+     of the above members (on the off chance that future binary compatibility
+     would be broken otherwise).  */
+  struct _glue __sglue;		/* root of glue chain */
+  __FILE __sf[3];  		/* first three file descriptors */
+};
+
+#define _REENT_INIT(var) \
+  { 0, \
+    &(var).__sf[0], \
+    &(var).__sf[1], \
+    &(var).__sf[2], \
+    0, \
+    "", \
+    0, \
+    "C", \
+    0, \
+    _NULL, \
+    _NULL, \
+    0, \
+    _NULL, \
+    _NULL, \
+    0, \
+    _NULL, \
+    { \
+      { \
+        0, \
+        _NULL, \
+        "", \
+        {0, 0, 0, 0, 0, 0, 0, 0, 0}, \
+        0, \
+        1, \
+        { \
+          {_RAND48_SEED_0, _RAND48_SEED_1, _RAND48_SEED_2}, \
+          {_RAND48_MULT_0, _RAND48_MULT_1, _RAND48_MULT_2}, \
+          _RAND48_ADD \
+        }, \
+        {0, {0}}, \
+        {0, {0}}, \
+        {0, {0}}, \
+        "", \
+        "", \
+        0, \
+        {0, {0}}, \
+        {0, {0}}, \
+        {0, {0}}, \
+        {0, {0}}, \
+        {0, {0}} \
+      } \
+    }, \
+    _NULL, \
+    {_NULL, 0, {_NULL}, {{_NULL}, {_NULL}, 0, 0}}, \
+    _NULL, \
+    {_NULL, 0, _NULL} \
+  }
+
+#define _REENT_INIT_PTR(var) \
+  { (var)->_errno = 0; \
+    (var)->_stdin = &(var)->__sf[0]; \
+    (var)->_stdout = &(var)->__sf[1]; \
+    (var)->_stderr = &(var)->__sf[2]; \
+    (var)->_inc = 0; \
+    memset(&(var)->_emergency, 0, sizeof((var)->_emergency)); \
+    (var)->_current_category = 0; \
+    (var)->_current_locale = "C"; \
+    (var)->__sdidinit = 0; \
+    (var)->__cleanup = _NULL; \
+    (var)->_result = _NULL; \
+    (var)->_result_k = 0; \
+    (var)->_p5s = _NULL; \
+    (var)->_freelist = _NULL; \
+    (var)->_cvtlen = 0; \
+    (var)->_cvtbuf = _NULL; \
+    (var)->_new._reent._unused_rand = 0; \
+    (var)->_new._reent._strtok_last = _NULL; \
+    (var)->_new._reent._asctime_buf[0] = 0; \
+    memset(&(var)->_new._reent._localtime_buf, 0, sizeof((var)->_new._reent._localtime_buf)); \
+    (var)->_new._reent._gamma_signgam = 0; \
+    (var)->_new._reent._rand_next = 1; \
+    (var)->_new._reent._r48._seed[0] = _RAND48_SEED_0; \
+    (var)->_new._reent._r48._seed[1] = _RAND48_SEED_1; \
+    (var)->_new._reent._r48._seed[2] = _RAND48_SEED_2; \
+    (var)->_new._reent._r48._mult[0] = _RAND48_MULT_0; \
+    (var)->_new._reent._r48._mult[1] = _RAND48_MULT_1; \
+    (var)->_new._reent._r48._mult[2] = _RAND48_MULT_2; \
+    (var)->_new._reent._r48._add = _RAND48_ADD; \
+    (var)->_new._reent._mblen_state.__count = 0; \
+    (var)->_new._reent._mblen_state.__value.__wch = 0; \
+    (var)->_new._reent._mbtowc_state.__count = 0; \
+    (var)->_new._reent._mbtowc_state.__value.__wch = 0; \
+    (var)->_new._reent._wctomb_state.__count = 0; \
+    (var)->_new._reent._wctomb_state.__value.__wch = 0; \
+    (var)->_new._reent._mbrlen_state.__count = 0; \
+    (var)->_new._reent._mbrlen_state.__value.__wch = 0; \
+    (var)->_new._reent._mbrtowc_state.__count = 0; \
+    (var)->_new._reent._mbrtowc_state.__value.__wch = 0; \
+    (var)->_new._reent._mbsrtowcs_state.__count = 0; \
+    (var)->_new._reent._mbsrtowcs_state.__value.__wch = 0; \
+    (var)->_new._reent._wcrtomb_state.__count = 0; \
+    (var)->_new._reent._wcrtomb_state.__value.__wch = 0; \
+    (var)->_new._reent._wcsrtombs_state.__count = 0; \
+    (var)->_new._reent._wcsrtombs_state.__value.__wch = 0; \
+    (var)->_new._reent._l64a_buf[0] = '\0'; \
+    (var)->_new._reent._signal_buf[0] = '\0'; \
+    (var)->_new._reent._getdate_err = 0; \
+    (var)->_atexit = _NULL; \
+    (var)->_atexit0._next = _NULL; \
+    (var)->_atexit0._ind = 0; \
+    (var)->_atexit0._fns[0] = _NULL; \
+    (var)->_atexit0._on_exit_args._fntypes = 0; \
+    (var)->_atexit0._on_exit_args._fnargs[0] = _NULL; \
+    (var)->_sig_func = _NULL; \
+    (var)->__sglue._next = _NULL; \
+    (var)->__sglue._niobs = 0; \
+    (var)->__sglue._iobs = _NULL; \
+    memset(&(var)->__sf, 0, sizeof((var)->__sf)); \
+  }
+
+#define _REENT_CHECK_RAND48(ptr)	/* nothing */
+#define _REENT_CHECK_MP(ptr)		/* nothing */
+#define _REENT_CHECK_TM(ptr)		/* nothing */
+#define _REENT_CHECK_ASCTIME_BUF(ptr)	/* nothing */
+#define _REENT_CHECK_EMERGENCY(ptr)	/* nothing */
+#define _REENT_CHECK_MISC(ptr)	        /* nothing */
+#define _REENT_CHECK_SIGNAL_BUF(ptr)	/* nothing */
+
+#define _REENT_SIGNGAM(ptr)	((ptr)->_new._reent._gamma_signgam)
+#define _REENT_RAND_NEXT(ptr)	((ptr)->_new._reent._rand_next)
+#define _REENT_RAND48_SEED(ptr)	((ptr)->_new._reent._r48._seed)
+#define _REENT_RAND48_MULT(ptr)	((ptr)->_new._reent._r48._mult)
+#define _REENT_RAND48_ADD(ptr)	((ptr)->_new._reent._r48._add)
+#define _REENT_MP_RESULT(ptr)	((ptr)->_result)
+#define _REENT_MP_RESULT_K(ptr)	((ptr)->_result_k)
+#define _REENT_MP_P5S(ptr)	((ptr)->_p5s)
+#define _REENT_MP_FREELIST(ptr)	((ptr)->_freelist)
+#define _REENT_ASCTIME_BUF(ptr)	((ptr)->_new._reent._asctime_buf)
+#define _REENT_TM(ptr)		(&(ptr)->_new._reent._localtime_buf)
+#define _REENT_EMERGENCY(ptr)	((ptr)->_emergency)
+#define _REENT_STRTOK_LAST(ptr)	((ptr)->_new._reent._strtok_last)
+#define _REENT_MBLEN_STATE(ptr)	((ptr)->_new._reent._mblen_state)
+#define _REENT_MBTOWC_STATE(ptr)((ptr)->_new._reent._mbtowc_state)
+#define _REENT_WCTOMB_STATE(ptr)((ptr)->_new._reent._wctomb_state)
+#define _REENT_MBRLEN_STATE(ptr)((ptr)->_new._reent._mbrlen_state)
+#define _REENT_MBRTOWC_STATE(ptr)((ptr)->_new._reent._mbrtowc_state)
+#define _REENT_MBSRTOWCS_STATE(ptr)((ptr)->_new._reent._mbsrtowcs_state)
+#define _REENT_WCRTOMB_STATE(ptr)((ptr)->_new._reent._wcrtomb_state)
+#define _REENT_WCSRTOMBS_STATE(ptr)((ptr)->_new._reent._wcsrtombs_state)
+#define _REENT_L64A_BUF(ptr)    ((ptr)->_new._reent._l64a_buf)
+#define _REENT_SIGNAL_BUF(ptr)  ((ptr)->_new._reent._signal_buf)
+#define _REENT_GETDATE_ERR_P(ptr) (&((ptr)->_new._reent._getdate_err))
+
+#endif /* !_REENT_SMALL */
+
+/* This value is used in stdlib/misc.c.  reent/reent.c has to know it
+   as well to make sure the freelist is correctly free'd.  Therefore
+   we define it here, rather than in stdlib/misc.c, as before. */
+#define _Kmax (sizeof (size_t) << 3)
+
+/*
+ * All references to struct _reent are via this pointer.
+ * Internally, newlib routines that need to reference it should use _REENT.
+ */
+
+#ifndef __ATTRIBUTE_IMPURE_PTR__
+#define __ATTRIBUTE_IMPURE_PTR__
+#endif
+
+extern struct _reent *_impure_ptr __ATTRIBUTE_IMPURE_PTR__;
+extern struct _reent *_CONST _global_impure_ptr __ATTRIBUTE_IMPURE_PTR__;
+
+void _reclaim_reent _PARAMS ((struct _reent *));
+
+/* #define _REENT_ONLY define this to get only reentrant routines */
+
+#ifndef _REENT_ONLY
+
+#if defined(__DYNAMIC_REENT__) && !defined(__SINGLE_THREAD__)
+#ifndef __getreent
+  struct _reent * _EXFUN(__getreent, (void));
+#endif
+# define _REENT (__getreent())
+#else /* __SINGLE_THREAD__ || !__DYNAMIC_REENT__ */
+# define _REENT _impure_ptr
+#endif /* __SINGLE_THREAD__ || !__DYNAMIC_REENT__ */
+
+#endif /* !_REENT_ONLY */
+
+#define _GLOBAL_REENT _global_impure_ptr
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_REENT_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/resource.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/resource.h
new file mode 100644
index 00000000..eb827552
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/resource.h
@@ -0,0 +1,15 @@
+#ifndef _SYS_RESOURCE_H_
+#define _SYS_RESOURCE_H_
+
+#include <sys/time.h>
+
+#define	RUSAGE_SELF	0		/* calling process */
+#define	RUSAGE_CHILDREN	-1		/* terminated child processes */
+
+struct rusage {
+  	struct timeval ru_utime;	/* user time used */
+	struct timeval ru_stime;	/* system time used */
+};
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/sched.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/sched.h
new file mode 100644
index 00000000..bed14bfc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/sched.h
@@ -0,0 +1,67 @@
+/*
+ *  Written by Joel Sherrill <joel@OARcorp.com>.
+ *
+ *  COPYRIGHT (c) 1989-2010.
+ *  On-Line Applications Research Corporation (OAR).
+ *
+ *  Permission to use, copy, modify, and distribute this software for any
+ *  purpose without fee is hereby granted, provided that this entire notice
+ *  is included in all copies of any software which is or includes a copy
+ *  or modification of this software.
+ *
+ *  THIS SOFTWARE IS BEING PROVIDED "AS IS", WITHOUT ANY EXPRESS OR IMPLIED
+ *  WARRANTY.  IN PARTICULAR,  THE AUTHOR MAKES NO REPRESENTATION
+ *  OR WARRANTY OF ANY KIND CONCERNING THE MERCHANTABILITY OF THIS
+ *  SOFTWARE OR ITS FITNESS FOR ANY PARTICULAR PURPOSE.
+ *
+ *  $Id: sched.h,v 1.3 2010/04/01 18:33:37 jjohnstn Exp $
+ */
+
+
+#ifndef _SYS_SCHED_H_
+#define _SYS_SCHED_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Scheduling Policies */
+/* Open Group Specifications Issue 6 */
+#if defined(__CYGWIN__)
+#define SCHED_OTHER    3
+#else
+#define SCHED_OTHER    0
+#endif
+
+#define SCHED_FIFO     1
+#define SCHED_RR       2
+
+#if defined(_POSIX_SPORADIC_SERVER)
+#define SCHED_SPORADIC 4
+#endif
+
+/* Scheduling Parameters */
+/* Open Group Specifications Issue 6 */
+
+struct sched_param {
+  int sched_priority;           /* Process execution scheduling priority */
+
+#if defined(_POSIX_SPORADIC_SERVER) || defined(_POSIX_THREAD_SPORADIC_SERVER)
+  int sched_ss_low_priority;    /* Low scheduling priority for sporadic */
+                                /*   server */
+  struct timespec sched_ss_repl_period;
+                                /* Replenishment period for sporadic server */
+  struct timespec sched_ss_init_budget;
+                               /* Initial budget for sporadic server */
+  int sched_ss_max_repl;       /* Maximum pending replenishments for */
+                               /* sporadic server */
+#endif
+};
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+/* end of include file */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/signal.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/signal.h
new file mode 100644
index 00000000..3d6ba083
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/signal.h
@@ -0,0 +1,317 @@
+/* sys/signal.h */
+
+#ifndef _SYS_SIGNAL_H
+#define _SYS_SIGNAL_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "_ansi.h"
+#include <sys/features.h>
+#include <sys/types.h>
+
+/* #ifndef __STRICT_ANSI__*/
+
+/* Cygwin defines it's own sigset_t in include/cygwin/signal.h */
+#ifndef __CYGWIN__
+typedef unsigned long sigset_t;
+#endif
+
+#if defined(__rtems__)
+
+#if defined(_POSIX_REALTIME_SIGNALS)
+
+/* sigev_notify values
+   NOTE: P1003.1c/D10, p. 34 adds SIGEV_THREAD.  */
+
+#define SIGEV_NONE   1  /* No asynchronous notification shall be delivered */
+                        /*   when the event of interest occurs. */
+#define SIGEV_SIGNAL 2  /* A queued signal, with an application defined */
+                        /*  value, shall be delivered when the event of */
+                        /*  interest occurs. */
+#define SIGEV_THREAD 3  /* A notification function shall be called to */
+                        /*   perform notification. */
+
+/*  Signal Generation and Delivery, P1003.1b-1993, p. 63
+    NOTE: P1003.1c/D10, p. 34 adds sigev_notify_function and
+          sigev_notify_attributes to the sigevent structure.  */
+
+union sigval {
+  int    sival_int;    /* Integer signal value */
+  void  *sival_ptr;    /* Pointer signal value */
+};
+
+struct sigevent {
+  int              sigev_notify;               /* Notification type */
+  int              sigev_signo;                /* Signal number */
+  union sigval     sigev_value;                /* Signal value */
+
+#if defined(_POSIX_THREADS)
+  void           (*sigev_notify_function)( union sigval );
+                                               /* Notification function */
+  pthread_attr_t  *sigev_notify_attributes;    /* Notification Attributes */
+#endif
+};
+
+/* Signal Actions, P1003.1b-1993, p. 64 */
+/* si_code values, p. 66 */
+
+#define SI_USER    1    /* Sent by a user. kill(), abort(), etc */
+#define SI_QUEUE   2    /* Sent by sigqueue() */
+#define SI_TIMER   3    /* Sent by expiration of a timer_settime() timer */
+#define SI_ASYNCIO 4    /* Indicates completion of asycnhronous IO */
+#define SI_MESGQ   5    /* Indicates arrival of a message at an empty queue */
+
+typedef struct {
+  int          si_signo;    /* Signal number */
+  int          si_code;     /* Cause of the signal */
+  union sigval si_value;    /* Signal value */
+} siginfo_t;
+#endif
+
+/*  3.3.8 Synchronously Accept a Signal, P1003.1b-1993, p. 76 */
+
+#define SA_NOCLDSTOP 1   /* Do not generate SIGCHLD when children stop */
+#define SA_SIGINFO   2   /* Invoke the signal catching function with */
+                         /*   three arguments instead of one. */
+
+/* struct sigaction notes from POSIX:
+ *
+ *  (1) Routines stored in sa_handler should take a single int as
+ *      their argument although the POSIX standard does not require this.
+ *      This is not longer true since at least POSIX.1-2008
+ *  (2) The fields sa_handler and sa_sigaction may overlap, and a conforming
+ *      application should not use both simultaneously.
+ */
+
+typedef void (*_sig_func_ptr)(int);
+
+struct sigaction {
+  int         sa_flags;       /* Special flags to affect behavior of signal */
+  sigset_t    sa_mask;        /* Additional set of signals to be blocked */
+                              /*   during execution of signal-catching */
+                              /*   function. */
+  union {
+    _sig_func_ptr _handler;  /* SIG_DFL, SIG_IGN, or pointer to a function */
+#if defined(_POSIX_REALTIME_SIGNALS)
+    void      (*_sigaction)( int, siginfo_t *, void * );
+#endif
+  } _signal_handlers;
+};
+
+#define sa_handler    _signal_handlers._handler
+#if defined(_POSIX_REALTIME_SIGNALS)
+#define sa_sigaction  _signal_handlers._sigaction
+#endif
+
+#elif defined(__CYGWIN__)
+#include <cygwin/signal.h>
+#else
+#define SA_NOCLDSTOP 1  /* only value supported now for sa_flags */
+
+typedef void (*_sig_func_ptr)(int);
+
+struct sigaction 
+{
+	_sig_func_ptr sa_handler;
+	sigset_t sa_mask;
+	int sa_flags;
+};
+#endif /* defined(__rtems__) */
+
+#define SIG_SETMASK 0	/* set mask with sigprocmask() */
+#define SIG_BLOCK 1	/* set of signals to block */
+#define SIG_UNBLOCK 2	/* set of signals to, well, unblock */
+
+/* These depend upon the type of sigset_t, which right now 
+   is always a long.. They're in the POSIX namespace, but
+   are not ANSI. */
+#define sigaddset(what,sig) (*(what) |= (1<<(sig)), 0)
+#define sigdelset(what,sig) (*(what) &= ~(1<<(sig)), 0)
+#define sigemptyset(what)   (*(what) = 0, 0)
+#define sigfillset(what)    (*(what) = ~(0), 0)
+#define sigismember(what,sig) (((*(what)) & (1<<(sig))) != 0)
+
+int _EXFUN(sigprocmask, (int how, const sigset_t *set, sigset_t *oset));
+
+#if defined(_POSIX_THREADS)
+int _EXFUN(pthread_sigmask, (int how, const sigset_t *set, sigset_t *oset));
+#endif
+
+/* protos for functions found in winsup sources for CYGWIN */
+#if defined(__CYGWIN__) || defined(__rtems__)
+#undef sigaddset
+#undef sigdelset
+#undef sigemptyset
+#undef sigfillset
+#undef sigismember
+
+#ifdef _COMPILING_NEWLIB
+int _EXFUN(_kill, (pid_t, int));
+#endif
+int _EXFUN(kill, (pid_t, int));
+int _EXFUN(killpg, (pid_t, int));
+int _EXFUN(sigaction, (int, const struct sigaction *, struct sigaction *));
+int _EXFUN(sigaddset, (sigset_t *, const int));
+int _EXFUN(sigdelset, (sigset_t *, const int));
+int _EXFUN(sigismember, (const sigset_t *, int));
+int _EXFUN(sigfillset, (sigset_t *));
+int _EXFUN(sigemptyset, (sigset_t *));
+int _EXFUN(sigpending, (sigset_t *));
+int _EXFUN(sigsuspend, (const sigset_t *));
+int _EXFUN(sigpause, (int));
+
+#if defined(_POSIX_THREADS)
+#ifdef __CYGWIN__
+#  ifndef _CYGWIN_TYPES_H
+#    error You need the winsup sources or a cygwin installation to compile the cygwin version of newlib.
+#  endif
+#endif
+int _EXFUN(pthread_kill, (pthread_t thread, int sig));
+#endif
+
+#if defined(_POSIX_REALTIME_SIGNALS)
+
+/*  3.3.8 Synchronously Accept a Signal, P1003.1b-1993, p. 76
+    NOTE: P1003.1c/D10, p. 39 adds sigwait().  */
+
+int _EXFUN(sigwaitinfo, (const sigset_t *set, siginfo_t *info));
+int _EXFUN(sigtimedwait,
+  (const sigset_t *set, siginfo_t *info, const struct timespec  *timeout)
+);
+int _EXFUN(sigwait, (const sigset_t *set, int *sig));
+
+/*  3.3.9 Queue a Signal to a Process, P1003.1b-1993, p. 78 */
+int _EXFUN(sigqueue, (pid_t pid, int signo, const union sigval value));
+
+#endif /* defined(_POSIX_REALTIME_SIGNALS) */
+
+#endif /* defined(__CYGWIN__) || defined(__rtems__) */
+
+/* #endif __STRICT_ANSI__ */
+
+#if defined(___AM29K__)
+/* These all need to be defined for ANSI C, but I don't think they are
+   meaningful.  */
+#define SIGABRT 1
+#define SIGFPE 1
+#define SIGILL 1
+#define SIGINT 1
+#define SIGSEGV 1
+#define SIGTERM 1
+/* These need to be defined for POSIX, and some others do too.  */
+#define SIGHUP 1
+#define SIGQUIT 1
+#define NSIG 2
+#elif defined(__GO32__)
+#define SIGINT  1
+#define SIGKILL 2
+#define SIGPIPE 3
+#define SIGFPE  4
+#define SIGHUP  5
+#define SIGTERM 6
+#define SIGSEGV 7
+#define SIGTSTP 8
+#define SIGQUIT 9
+#define SIGTRAP 10
+#define SIGILL  11
+#define SIGEMT  12
+#define SIGALRM 13
+#define SIGBUS  14
+#define SIGLOST 15
+#define SIGSTOP 16
+#define SIGABRT 17
+#define SIGUSR1	18
+#define SIGUSR2	19
+#define NSIG    20
+#elif !defined(SIGTRAP)
+#define	SIGHUP	1	/* hangup */
+#define	SIGINT	2	/* interrupt */
+#define	SIGQUIT	3	/* quit */
+#define	SIGILL	4	/* illegal instruction (not reset when caught) */
+#define	SIGTRAP	5	/* trace trap (not reset when caught) */
+#define	SIGIOT	6	/* IOT instruction */
+#define	SIGABRT 6	/* used by abort, replace SIGIOT in the future */
+#define	SIGEMT	7	/* EMT instruction */
+#define	SIGFPE	8	/* floating point exception */
+#define	SIGKILL	9	/* kill (cannot be caught or ignored) */
+#define	SIGBUS	10	/* bus error */
+#define	SIGSEGV	11	/* segmentation violation */
+#define	SIGSYS	12	/* bad argument to system call */
+#define	SIGPIPE	13	/* write on a pipe with no one to read it */
+#define	SIGALRM	14	/* alarm clock */
+#define	SIGTERM	15	/* software termination signal from kill */
+
+#if defined(__rtems__)
+#define	SIGURG	16	/* urgent condition on IO channel */
+#define	SIGSTOP	17	/* sendable stop signal not from tty */
+#define	SIGTSTP	18	/* stop signal from tty */
+#define	SIGCONT	19	/* continue a stopped process */
+#define	SIGCHLD	20	/* to parent on child stop or exit */
+#define	SIGCLD	20	/* System V name for SIGCHLD */
+#define	SIGTTIN	21	/* to readers pgrp upon background tty read */
+#define	SIGTTOU	22	/* like TTIN for output if (tp->t_local&LTOSTOP) */
+#define	SIGIO	23	/* input/output possible signal */
+#define	SIGPOLL	SIGIO	/* System V name for SIGIO */
+#define	SIGWINCH 24	/* window changed */
+#define	SIGUSR1 25	/* user defined signal 1 */
+#define	SIGUSR2 26	/* user defined signal 2 */
+
+/* Real-Time Signals Range, P1003.1b-1993, p. 61
+   NOTE: By P1003.1b-1993, this should be at least RTSIG_MAX
+         (which is a minimum of 8) signals.
+ */
+#define SIGRTMIN 27
+#define SIGRTMAX 31
+#define __SIGFIRSTNOTRT SIGHUP
+#define __SIGLASTNOTRT  SIGUSR2
+
+#define NSIG	32      /* signal 0 implied */
+
+#elif defined(__svr4__)
+/* svr4 specifics. different signals above 15, and sigaction. */
+#define	SIGUSR1	16
+#define SIGUSR2	17
+#define SIGCLD	18
+#define	SIGPWR	19
+#define SIGWINCH 20
+#define	SIGPOLL	22	/* 20 for x.out binaries!!!! */
+#define	SIGSTOP	23	/* sendable stop signal not from tty */
+#define	SIGTSTP	24	/* stop signal from tty */
+#define	SIGCONT	25	/* continue a stopped process */
+#define	SIGTTIN	26	/* to readers pgrp upon background tty read */
+#define	SIGTTOU	27	/* like TTIN for output if (tp->t_local&LTOSTOP) */
+#define NSIG	28	
+#else
+#define	SIGURG	16	/* urgent condition on IO channel */
+#define	SIGSTOP	17	/* sendable stop signal not from tty */
+#define	SIGTSTP	18	/* stop signal from tty */
+#define	SIGCONT	19	/* continue a stopped process */
+#define	SIGCHLD	20	/* to parent on child stop or exit */
+#define	SIGCLD	20	/* System V name for SIGCHLD */
+#define	SIGTTIN	21	/* to readers pgrp upon background tty read */
+#define	SIGTTOU	22	/* like TTIN for output if (tp->t_local&LTOSTOP) */
+#define	SIGIO	23	/* input/output possible signal */
+#define	SIGPOLL	SIGIO	/* System V name for SIGIO */
+#define	SIGXCPU	24	/* exceeded CPU time limit */
+#define	SIGXFSZ	25	/* exceeded file size limit */
+#define	SIGVTALRM 26	/* virtual time alarm */
+#define	SIGPROF	27	/* profiling time alarm */
+#define	SIGWINCH 28	/* window changed */
+#define	SIGLOST 29	/* resource lost (eg, record-lock lost) */
+#define	SIGUSR1 30	/* user defined signal 1 */
+#define	SIGUSR2 31	/* user defined signal 2 */
+#define NSIG	32      /* signal 0 implied */
+#endif
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+
+#ifndef _SIGNAL_H_
+/* Some applications take advantage of the fact that <sys/signal.h>
+ * and <signal.h> are equivalent in glibc.  Allow for that here.  */
+#include <signal.h>
+#endif
+#endif /* _SYS_SIGNAL_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stat.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stat.h
new file mode 100644
index 00000000..fa2036dd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stat.h
@@ -0,0 +1,185 @@
+#ifndef	_SYS_STAT_H
+#define	_SYS_STAT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <_ansi.h>
+#include <time.h>
+#include <sys/types.h>
+
+/* dj's stat defines _STAT_H_ */
+#ifndef _STAT_H_
+
+/* It is intended that the layout of this structure not change when the
+   sizes of any of the basic types change (short, int, long) [via a compile
+   time option].  */
+
+#ifdef __CYGWIN__
+#include <cygwin/stat.h>
+#ifdef _COMPILING_NEWLIB
+#define stat64 __stat64
+#endif
+#else
+struct	stat 
+{
+  dev_t		st_dev;
+  ino_t		st_ino;
+  mode_t	st_mode;
+  nlink_t	st_nlink;
+  uid_t		st_uid;
+  gid_t		st_gid;
+  dev_t		st_rdev;
+  off_t		st_size;
+#if defined(__rtems__)
+  struct timespec st_atim;
+  struct timespec st_mtim;
+  struct timespec st_ctim;
+  blksize_t     st_blksize;
+  blkcnt_t	st_blocks;
+#else
+  /* SysV/sco doesn't have the rest... But Solaris, eabi does.  */
+#if defined(__svr4__) && !defined(__PPC__) && !defined(__sun__)
+  time_t	st_atime;
+  time_t	st_mtime;
+  time_t	st_ctime;
+#else
+  time_t	st_atime;
+  long		st_spare1;
+  time_t	st_mtime;
+  long		st_spare2;
+  time_t	st_ctime;
+  long		st_spare3;
+  long		st_blksize;
+  long		st_blocks;
+  long	st_spare4[2];
+#endif
+#endif
+};
+
+#if defined(__rtems__)
+#define st_atime st_atim.tv_sec
+#define st_ctime st_ctim.tv_sec
+#define st_mtime st_mtim.tv_sec
+#endif
+
+#endif
+
+#define	_IFMT		0170000	/* type of file */
+#define		_IFDIR	0040000	/* directory */
+#define		_IFCHR	0020000	/* character special */
+#define		_IFBLK	0060000	/* block special */
+#define		_IFREG	0100000	/* regular */
+#define		_IFLNK	0120000	/* symbolic link */
+#define		_IFSOCK	0140000	/* socket */
+#define		_IFIFO	0010000	/* fifo */
+
+#define 	S_BLKSIZE  1024 /* size of a block */
+
+#define	S_ISUID		0004000	/* set user id on execution */
+#define	S_ISGID		0002000	/* set group id on execution */
+#define	S_ISVTX		0001000	/* save swapped text even after use */
+#ifndef	_POSIX_SOURCE
+#define	S_IREAD		0000400	/* read permission, owner */
+#define	S_IWRITE 	0000200	/* write permission, owner */
+#define	S_IEXEC		0000100	/* execute/search permission, owner */
+#define	S_ENFMT 	0002000	/* enforcement-mode locking */
+#endif	/* !_POSIX_SOURCE */
+
+#define	S_IFMT		_IFMT
+#define	S_IFDIR		_IFDIR
+#define	S_IFCHR		_IFCHR
+#define	S_IFBLK		_IFBLK
+#define	S_IFREG		_IFREG
+#define	S_IFLNK		_IFLNK
+#define	S_IFSOCK	_IFSOCK
+#define	S_IFIFO		_IFIFO
+
+#ifdef _WIN32
+/* The Windows header files define _S_ forms of these, so we do too
+   for easier portability.  */
+#define _S_IFMT		_IFMT
+#define _S_IFDIR	_IFDIR
+#define _S_IFCHR	_IFCHR
+#define _S_IFIFO	_IFIFO
+#define _S_IFREG	_IFREG
+#define _S_IREAD	0000400
+#define _S_IWRITE	0000200
+#define _S_IEXEC	0000100
+#endif
+
+#define	S_IRWXU 	(S_IRUSR | S_IWUSR | S_IXUSR)
+#define		S_IRUSR	0000400	/* read permission, owner */
+#define		S_IWUSR	0000200	/* write permission, owner */
+#define		S_IXUSR 0000100/* execute/search permission, owner */
+#define	S_IRWXG		(S_IRGRP | S_IWGRP | S_IXGRP)
+#define		S_IRGRP	0000040	/* read permission, group */
+#define		S_IWGRP	0000020	/* write permission, grougroup */
+#define		S_IXGRP 0000010/* execute/search permission, group */
+#define	S_IRWXO		(S_IROTH | S_IWOTH | S_IXOTH)
+#define		S_IROTH	0000004	/* read permission, other */
+#define		S_IWOTH	0000002	/* write permission, other */
+#define		S_IXOTH 0000001/* execute/search permission, other */
+
+#ifndef _POSIX_SOURCE
+#define ACCESSPERMS (S_IRWXU | S_IRWXG | S_IRWXO) /* 0777 */
+#define ALLPERMS (S_ISUID | S_ISGID | S_ISVTX | S_IRWXU | S_IRWXG | S_IRWXO) /* 07777 */
+#define DEFFILEMODE (S_IRUSR | S_IWUSR | S_IRGRP | S_IWGRP | S_IROTH | S_IWOTH) /* 0666 */
+#endif
+
+#define	S_ISBLK(m)	(((m)&_IFMT) == _IFBLK)
+#define	S_ISCHR(m)	(((m)&_IFMT) == _IFCHR)
+#define	S_ISDIR(m)	(((m)&_IFMT) == _IFDIR)
+#define	S_ISFIFO(m)	(((m)&_IFMT) == _IFIFO)
+#define	S_ISREG(m)	(((m)&_IFMT) == _IFREG)
+#define	S_ISLNK(m)	(((m)&_IFMT) == _IFLNK)
+#define	S_ISSOCK(m)	(((m)&_IFMT) == _IFSOCK)
+
+#if defined(__CYGWIN__)
+/* Special tv_nsec values for futimens(2) and utimensat(2). */
+#define UTIME_NOW	-2L
+#define UTIME_OMIT	-1L
+#endif
+
+int	_EXFUN(chmod,( const char *__path, mode_t __mode ));
+int     _EXFUN(fchmod,(int __fd, mode_t __mode));
+int	_EXFUN(fstat,( int __fd, struct stat *__sbuf ));
+int	_EXFUN(mkdir,( const char *_path, mode_t __mode ));
+int	_EXFUN(mkfifo,( const char *__path, mode_t __mode ));
+int	_EXFUN(stat,( const char *__path, struct stat *__sbuf ));
+mode_t	_EXFUN(umask,( mode_t __mask ));
+
+#if defined (__SPU__) || defined(__rtems__) || defined(__CYGWIN__) && !defined(__INSIDE_CYGWIN__)
+int	_EXFUN(lstat,( const char *__path, struct stat *__buf ));
+int	_EXFUN(mknod,( const char *__path, mode_t __mode, dev_t __dev ));
+#endif
+
+#if defined (__CYGWIN__) && !defined(__INSIDE_CYGWIN__)
+int	_EXFUN(fchmodat, (int, const char *, mode_t, int));
+int	_EXFUN(fstatat, (int, const char *, struct stat *, int));
+int	_EXFUN(mkdirat, (int, const char *, mode_t));
+int	_EXFUN(mkfifoat, (int, const char *, mode_t));
+int	_EXFUN(mknodat, (int, const char *, mode_t, dev_t));
+int	_EXFUN(utimensat, (int, const char *, const struct timespec *, int));
+int	_EXFUN(futimens, (int, const struct timespec *));
+#endif
+
+/* Provide prototypes for most of the _<systemcall> names that are
+   provided in newlib for some compilers.  */
+#ifdef _COMPILING_NEWLIB
+int	_EXFUN(_fstat,( int __fd, struct stat *__sbuf ));
+int	_EXFUN(_stat,( const char *__path, struct stat *__sbuf ));
+int	_EXFUN(_mkdir,( const char *_path, mode_t __mode ));
+#ifdef __LARGE64_FILES
+struct stat64;
+int	_EXFUN(_stat64,( const char *__path, struct stat64 *__sbuf ));
+int	_EXFUN(_fstat64,( int __fd, struct stat64 *__sbuf ));
+#endif
+#endif
+
+#endif /* !_STAT_H_ */
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_STAT_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stdio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stdio.h
new file mode 100644
index 00000000..0918fe15
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/stdio.h
@@ -0,0 +1,27 @@
+#ifndef _NEWLIB_STDIO_H
+#define _NEWLIB_STDIO_H
+
+#include <sys/lock.h>
+#include <sys/reent.h>
+
+/* Internal locking macros, used to protect stdio functions.  In the
+   general case, expand to nothing. Use __SSTR flag in FILE _flags to
+   detect if FILE is private to sprintf/sscanf class of functions; if
+   set then do nothing as lock is not initialised. */
+#if !defined(_flockfile)
+#ifndef __SINGLE_THREAD__
+#  define _flockfile(fp) (((fp)->_flags & __SSTR) ? 0 : __lock_acquire_recursive((fp)->_lock))
+#else
+#  define _flockfile(fp)	(_CAST_VOID 0)
+#endif
+#endif
+
+#if !defined(_funlockfile)
+#ifndef __SINGLE_THREAD__
+#  define _funlockfile(fp) (((fp)->_flags & __SSTR) ? 0 : __lock_release_recursive((fp)->_lock))
+#else
+#  define _funlockfile(fp)	(_CAST_VOID 0)
+#endif
+#endif
+
+#endif /* _NEWLIB_STDIO_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/string.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/string.h
new file mode 100644
index 00000000..ceedf4be
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/string.h
@@ -0,0 +1,2 @@
+/* This is a dummy <sys/string.h> used as a placeholder for
+   systems that need to have a special header file.  */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/syslimits.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/syslimits.h
new file mode 100644
index 00000000..ba9dbd66
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/syslimits.h
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 1988, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ *	@(#)syslimits.h	8.1 (Berkeley) 6/2/93
+ * $FreeBSD: src/sys/sys/syslimits.h,v 1.10 2001/06/18 20:24:54 wollman Exp $
+ */
+
+#ifndef _SYS_SYSLIMITS_H_
+#define _SYS_SYSLIMITS_H_
+
+#define	ARG_MAX			65536	/* max bytes for an exec function */
+#ifndef CHILD_MAX
+#define	CHILD_MAX		   40	/* max simultaneous processes */
+#endif
+#define	LINK_MAX		32767	/* max file link count */
+#define	MAX_CANON		  255	/* max bytes in term canon input line */
+#define	MAX_INPUT		  255	/* max bytes in terminal input */
+#define	NAME_MAX		  255	/* max bytes in a file name */
+#define	NGROUPS_MAX		   16	/* max supplemental group id's */
+#ifndef OPEN_MAX
+#define	OPEN_MAX		   64	/* max open files per process */
+#endif
+#define	PATH_MAX		 1024	/* max bytes in pathname */
+#define	PIPE_BUF		  512	/* max bytes for atomic pipe writes */
+#define	IOV_MAX			 1024	/* max elements in i/o vector */
+
+#define	BC_BASE_MAX		   99	/* max ibase/obase values in bc(1) */
+#define	BC_DIM_MAX		 2048	/* max array elements in bc(1) */
+#define	BC_SCALE_MAX		   99	/* max scale value in bc(1) */
+#define	BC_STRING_MAX		 1000	/* max const string length in bc(1) */
+#define	COLL_WEIGHTS_MAX	    0	/* max weights for order keyword */
+#define	EXPR_NEST_MAX		   32	/* max expressions nested in expr(1) */
+#define	LINE_MAX		 2048	/* max bytes in an input line */
+#define	RE_DUP_MAX		  255	/* max RE's in interval notation */
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/time.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/time.h
new file mode 100644
index 00000000..120ef553
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/time.h
@@ -0,0 +1,87 @@
+/* time.h -- An implementation of the standard Unix <sys/time.h> file.
+   Written by Geoffrey Noer <noer@cygnus.com>
+   Public domain; no rights reserved. */
+
+#ifndef _SYS_TIME_H_
+#define _SYS_TIME_H_
+
+#include <_ansi.h>
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef _TIMEVAL_DEFINED
+#define _TIMEVAL_DEFINED
+struct timeval {
+  time_t      tv_sec;
+  suseconds_t tv_usec;
+};
+
+/* BSD time macros used by RTEMS code */
+#if defined (__rtems__) || defined (__CYGWIN__)
+
+/* Convenience macros for operations on timevals.
+   NOTE: `timercmp' does not work for >= or <=.  */
+#define	timerisset(tvp)		((tvp)->tv_sec || (tvp)->tv_usec)
+#define	timerclear(tvp)		((tvp)->tv_sec = (tvp)->tv_usec = 0)
+#define	timercmp(a, b, CMP) 						      \
+  (((a)->tv_sec == (b)->tv_sec) ? 					      \
+   ((a)->tv_usec CMP (b)->tv_usec) : 					      \
+   ((a)->tv_sec CMP (b)->tv_sec))
+#define	timeradd(a, b, result)						      \
+  do {									      \
+    (result)->tv_sec = (a)->tv_sec + (b)->tv_sec;			      \
+    (result)->tv_usec = (a)->tv_usec + (b)->tv_usec;			      \
+    if ((result)->tv_usec >= 1000000)					      \
+      {									      \
+	++(result)->tv_sec;						      \
+	(result)->tv_usec -= 1000000;					      \
+      }									      \
+  } while (0)
+#define	timersub(a, b, result)						      \
+  do {									      \
+    (result)->tv_sec = (a)->tv_sec - (b)->tv_sec;			      \
+    (result)->tv_usec = (a)->tv_usec - (b)->tv_usec;			      \
+    if ((result)->tv_usec < 0) {					      \
+      --(result)->tv_sec;						      \
+      (result)->tv_usec += 1000000;					      \
+    }									      \
+  } while (0)
+#endif /* defined (__rtems__) || defined (__CYGWIN__) */
+#endif /* !_TIMEVAL_DEFINED */
+
+struct timezone {
+  int tz_minuteswest;
+  int tz_dsttime;
+};
+
+#ifdef __CYGWIN__
+#include <cygwin/sys_time.h>
+#endif /* __CYGWIN__ */
+
+#define ITIMER_REAL     0
+#define ITIMER_VIRTUAL  1
+#define ITIMER_PROF     2
+
+struct  itimerval {
+  struct  timeval it_interval;
+  struct  timeval it_value;
+};
+
+#ifdef _COMPILING_NEWLIB
+int _EXFUN(_gettimeofday, (struct timeval *__p, void *__tz));
+#endif
+
+int _EXFUN(gettimeofday, (struct timeval *__p, void *__tz));
+int _EXFUN(settimeofday, (const struct timeval *, const struct timezone *));
+int _EXFUN(utimes, (const char *__path, const struct timeval *__tvp));
+int _EXFUN(getitimer, (int __which, struct itimerval *__value));
+int _EXFUN(setitimer, (int __which, const struct itimerval *__value,
+					struct itimerval *__ovalue));
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_TIME_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/timeb.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/timeb.h
new file mode 100644
index 00000000..0a2c3de8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/timeb.h
@@ -0,0 +1,39 @@
+/* timeb.h -- An implementation of the standard Unix <sys/timeb.h> file.
+   Written by Ian Lance Taylor <ian@cygnus.com>
+   Public domain; no rights reserved.
+
+   <sys/timeb.h> declares the structure used by the ftime function, as
+   well as the ftime function itself.  Newlib does not provide an
+   implementation of ftime.  */
+
+#ifndef _SYS_TIMEB_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define _SYS_TIMEB_H
+
+#include <_ansi.h>
+#include <machine/types.h>
+
+#ifndef __time_t_defined
+typedef _TIME_T_ time_t;
+#define __time_t_defined
+#endif
+
+struct timeb
+{
+  time_t time;
+  unsigned short millitm;
+  short timezone;
+  short dstflag;
+};
+
+extern int ftime _PARAMS ((struct timeb *));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* ! defined (_SYS_TIMEB_H) */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/times.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/times.h
new file mode 100644
index 00000000..927812cb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/times.h
@@ -0,0 +1,31 @@
+#ifndef	_SYS_TIMES_H
+#ifdef __cplusplus
+extern "C" {
+#endif
+#define	_SYS_TIMES_H
+
+#include <_ansi.h>
+#include <machine/types.h>
+
+#ifndef __clock_t_defined
+typedef _CLOCK_T_ clock_t;
+#define __clock_t_defined
+#endif
+
+/*  Get Process Times, P1003.1b-1993, p. 92 */
+struct tms {
+	clock_t	tms_utime;		/* user time */
+	clock_t	tms_stime;		/* system time */
+	clock_t	tms_cutime;		/* user time, children */
+	clock_t	tms_cstime;		/* system time, children */
+};
+
+clock_t _EXFUN(times,(struct tms *));
+#ifdef _COMPILING_NEWLIB
+clock_t _EXFUN(_times,(struct tms *));
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif	/* !_SYS_TIMES_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/types.h
new file mode 100644
index 00000000..ba24929f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/types.h
@@ -0,0 +1,495 @@
+/* unified sys/types.h: 
+   start with sef's sysvi386 version.
+   merge go32 version -- a few ifdefs.
+   h8300hms, h8300xray, and sysvnecv70 disagree on the following types:
+
+   typedef int gid_t;
+   typedef int uid_t;
+   typedef int dev_t;
+   typedef int ino_t;
+   typedef int mode_t;
+   typedef int caddr_t;
+
+   however, these aren't "reasonable" values, the sysvi386 ones make far 
+   more sense, and should work sufficiently well (in particular, h8300 
+   doesn't have a stat, and the necv70 doesn't matter.) -- eichin
+ */
+
+#ifndef _SYS_TYPES_H
+
+#include <_ansi.h>
+
+#ifndef __INTTYPES_DEFINED__
+#define __INTTYPES_DEFINED__
+
+#include <machine/_types.h>
+
+#if defined(__rtems__) || defined(__XMK__)
+/*
+ *  The following section is RTEMS specific and is needed to more
+ *  closely match the types defined in the BSD sys/types.h.
+ *  This is needed to let the RTEMS/BSD TCP/IP stack compile.
+ */
+
+/* deprecated */
+#if ___int8_t_defined
+typedef __uint8_t	u_int8_t;
+#endif
+#if ___int16_t_defined
+typedef __uint16_t	u_int16_t;
+#endif 
+#if ___int32_t_defined
+typedef __uint32_t	u_int32_t;
+#endif
+
+#if ___int64_t_defined
+typedef __uint64_t	u_int64_t;
+
+/* deprecated */
+typedef	__uint64_t	u_quad_t;
+typedef	__int64_t	quad_t;
+typedef	quad_t *	qaddr_t;
+#endif
+
+#endif
+
+#endif /* ! __INTTYPES_DEFINED */
+
+#ifndef __need_inttypes
+
+#define _SYS_TYPES_H
+#include <sys/_types.h>
+
+#ifdef __i386__
+#if defined (GO32) || defined (__MSDOS__)
+#define __MS_types__
+#endif
+#endif
+
+# include <stddef.h>
+# include <machine/types.h>
+
+/* To ensure the stat struct's layout doesn't change when sizeof(int), etc.
+   changes, we assume sizeof short and long never change and have all types
+   used to define struct stat use them and not int where possible.
+   Where not possible, _ST_INTxx are used.  It would be preferable to not have
+   such assumptions, but until the extra fluff is necessary, it's avoided.
+   No 64 bit targets use stat yet.  What to do about them is postponed
+   until necessary.  */
+#ifdef __GNUC__
+#define _ST_INT32 __attribute__ ((__mode__ (__SI__)))
+#else
+#define _ST_INT32
+#endif
+
+# ifndef	_POSIX_SOURCE
+
+#  define	physadr		physadr_t
+#  define	quad		quad_t
+
+#ifndef _BSDTYPES_DEFINED
+/* also defined in mingw/gmon.h and in w32api/winsock[2].h */
+typedef	unsigned char	u_char;
+typedef	unsigned short	u_short;
+typedef	unsigned int	u_int;
+typedef	unsigned long	u_long;
+#define _BSDTYPES_DEFINED
+#endif
+
+typedef	unsigned short	ushort;		/* System V compatibility */
+typedef	unsigned int	uint;		/* System V compatibility */
+typedef	unsigned long	ulong;		/* System V compatibility */
+# endif	/*!_POSIX_SOURCE */
+
+#ifndef __clock_t_defined
+typedef _CLOCK_T_ clock_t;
+#define __clock_t_defined
+#endif
+
+#ifndef __time_t_defined
+typedef _TIME_T_ time_t;
+#define __time_t_defined
+#endif
+
+#ifndef __timespec_defined
+#define __timespec_defined
+/* Time Value Specification Structures, P1003.1b-1993, p. 261 */
+
+struct timespec {
+  time_t  tv_sec;   /* Seconds */
+  long    tv_nsec;  /* Nanoseconds */
+};
+#endif
+
+struct itimerspec {
+  struct timespec  it_interval;  /* Timer period */
+  struct timespec  it_value;     /* Timer expiration */
+};
+
+typedef	long	daddr_t;
+typedef	char *	caddr_t;
+
+#ifndef __CYGWIN__
+#if defined(__MS_types__) || defined(__rtems__) || \
+    defined(__sparc__) || defined(__SPU__)
+typedef	unsigned long	ino_t;
+#else
+typedef	unsigned short	ino_t;
+#endif
+#endif /*__CYGWIN__*/
+
+#ifdef __MS_types__
+typedef unsigned long vm_offset_t;
+typedef unsigned long vm_size_t;
+
+#define __BIT_TYPES_DEFINED__
+
+typedef signed char int8_t;
+typedef unsigned char u_int8_t;
+typedef short int16_t;
+typedef unsigned short u_int16_t;
+typedef int int32_t;
+typedef unsigned int u_int32_t;
+typedef long long int64_t;
+typedef unsigned long long u_int64_t;
+typedef int32_t register_t;
+#endif /* __MS_types__ */
+
+/*
+ * All these should be machine specific - right now they are all broken.
+ * However, for all of Cygnus' embedded targets, we want them to all be
+ * the same.  Otherwise things like sizeof (struct stat) might depend on
+ * how the file was compiled (e.g. -mint16 vs -mint32, etc.).
+ */
+
+#ifndef __CYGWIN__	/* which defines these types in it's own types.h. */
+typedef _off_t	off_t;
+typedef __dev_t dev_t;
+typedef __uid_t uid_t;
+typedef __gid_t gid_t;
+#endif
+
+#if defined(__XMK__)
+typedef signed char pid_t;
+#else
+typedef int pid_t;
+#endif
+
+#if defined(__rtems__)
+typedef _mode_t mode_t;
+#endif
+
+#ifndef __CYGWIN__
+typedef	long key_t;
+#endif
+typedef _ssize_t ssize_t;
+
+#if !defined(__CYGWIN__) && !defined(__rtems__)
+#ifdef __MS_types__
+typedef	char *	addr_t;
+typedef int mode_t;
+#else
+#if defined (__sparc__) && !defined (__sparc_v9__)
+#ifdef __svr4__
+typedef unsigned long mode_t;
+#else
+typedef unsigned short mode_t;
+#endif
+#else
+typedef unsigned int mode_t _ST_INT32;
+#endif
+#endif /* ! __MS_types__ */
+#endif /*__CYGWIN__*/
+
+typedef unsigned short nlink_t;
+
+/* We don't define fd_set and friends if we are compiling POSIX
+   source, or if we have included (or may include as indicated
+   by __USE_W32_SOCKETS) the W32api winsock[2].h header which
+   defines Windows versions of them.   Note that a program which
+   includes the W32api winsock[2].h header must know what it is doing;
+   it must not call the cygwin32 select function.
+*/
+# if !(defined (_POSIX_SOURCE) || defined (_WINSOCK_H) || defined (_WINSOCKAPI_) || defined (__USE_W32_SOCKETS)) 
+#  define _SYS_TYPES_FD_SET
+#  define	NBBY	8		/* number of bits in a byte */
+/*
+ * Select uses bit masks of file descriptors in longs.
+ * These macros manipulate such bit fields (the filesystem macros use chars).
+ * FD_SETSIZE may be defined by the user, but the default here
+ * should be >= NOFILE (param.h).
+ */
+#  ifndef	FD_SETSIZE
+#	define	FD_SETSIZE	64
+#  endif
+
+typedef	long	fd_mask;
+#  define	NFDBITS	(sizeof (fd_mask) * NBBY)	/* bits per mask */
+#  ifndef	howmany
+#	define	howmany(x,y)	(((x)+((y)-1))/(y))
+#  endif
+
+/* We use a macro for fd_set so that including Sockets.h afterwards
+   can work.  */
+typedef	struct _types_fd_set {
+	fd_mask	fds_bits[howmany(FD_SETSIZE, NFDBITS)];
+} _types_fd_set;
+
+#define fd_set _types_fd_set
+
+#  define	FD_SET(n, p)	((p)->fds_bits[(n)/NFDBITS] |= (1L << ((n) % NFDBITS)))
+#  define	FD_CLR(n, p)	((p)->fds_bits[(n)/NFDBITS] &= ~(1L << ((n) % NFDBITS)))
+#  define	FD_ISSET(n, p)	((p)->fds_bits[(n)/NFDBITS] & (1L << ((n) % NFDBITS)))
+#  define	FD_ZERO(p)	(__extension__ (void)({ \
+     size_t __i; \
+     char *__tmp = (char *)p; \
+     for (__i = 0; __i < sizeof (*(p)); ++__i) \
+       *__tmp++ = 0; \
+}))
+
+# endif	/* !(defined (_POSIX_SOURCE) || defined (_WINSOCK_H) || defined (_WINSOCKAPI_) || defined (__USE_W32_SOCKETS)) */
+
+#undef __MS_types__
+#undef _ST_INT32
+
+
+#ifndef __clockid_t_defined
+typedef _CLOCKID_T_ clockid_t;
+#define __clockid_t_defined
+#endif
+
+#ifndef __timer_t_defined
+typedef _TIMER_T_ timer_t;
+#define __timer_t_defined
+#endif
+
+typedef unsigned long useconds_t;
+typedef long suseconds_t;
+
+#include <sys/features.h>
+
+
+/* Cygwin will probably never have full posix compliance due to little things
+ * like an inability to set the stackaddress. Cygwin is also using void *  
+ * pointers rather than structs to ensure maximum binary compatability with
+ * previous releases.
+ * This means that we don't use the types defined here, but rather in
+ * <cygwin/types.h>
+ */
+#if defined(_POSIX_THREADS) && !defined(__CYGWIN__)
+
+#include <sys/sched.h>
+
+/*
+ *  2.5 Primitive System Data Types,  P1003.1c/D10, p. 19.
+ */
+
+#if defined(__XMK__)
+typedef unsigned int pthread_t;          /* identify a thread */
+#else
+typedef __uint32_t pthread_t;            /* identify a thread */
+#endif
+
+/* P1003.1c/D10, p. 118-119 */
+#define PTHREAD_SCOPE_PROCESS 0
+#define PTHREAD_SCOPE_SYSTEM  1
+
+/* P1003.1c/D10, p. 111 */
+#define PTHREAD_INHERIT_SCHED  1      /* scheduling policy and associated */
+                                      /*   attributes are inherited from */
+                                      /*   the calling thread. */
+#define PTHREAD_EXPLICIT_SCHED 2      /* set from provided attribute object */
+
+/* P1003.1c/D10, p. 141 */
+#define PTHREAD_CREATE_DETACHED 0
+#define PTHREAD_CREATE_JOINABLE  1
+
+#if defined(__XMK__)
+typedef struct pthread_attr_s {
+  int contentionscope;
+  struct sched_param schedparam;
+  int  detachstate;
+  void *stackaddr;
+  size_t stacksize;
+} pthread_attr_t;
+
+#define PTHREAD_STACK_MIN       200
+
+#else /* !defined(__XMK__) */
+typedef struct {
+  int is_initialized;
+  void *stackaddr;
+  int stacksize;
+  int contentionscope;
+  int inheritsched;
+  int schedpolicy;
+  struct sched_param schedparam;
+#if defined(__rtems__)
+  size_t guardsize;
+#endif
+
+  /* P1003.4b/D8, p. 54 adds cputime_clock_allowed attribute.  */
+#if defined(_POSIX_THREAD_CPUTIME)
+  int  cputime_clock_allowed;  /* see time.h */
+#endif
+  int  detachstate;
+
+} pthread_attr_t;
+
+#endif /* !defined(__XMK__) */
+
+#if defined(_POSIX_THREAD_PROCESS_SHARED)
+/* NOTE: P1003.1c/D10, p. 81 defines following values for process_shared.  */
+
+#define PTHREAD_PROCESS_PRIVATE 0 /* visible within only the creating process */
+#define PTHREAD_PROCESS_SHARED  1 /* visible too all processes with access to */
+                                  /*   the memory where the resource is */
+                                  /*   located */
+#endif
+
+#if defined(_POSIX_THREAD_PRIO_PROTECT)
+/* Mutexes */
+
+/* Values for blocking protocol. */
+
+#define PTHREAD_PRIO_NONE    0
+#define PTHREAD_PRIO_INHERIT 1
+#define PTHREAD_PRIO_PROTECT 2
+#endif
+
+#if defined(_UNIX98_THREAD_MUTEX_ATTRIBUTES)
+
+/* Values for mutex type */
+
+/* The following defines are part of the X/Open System Interface (XSI). */
+
+/*
+ * This type of mutex does not detect deadlock. A thread attempting to
+ * relock this mutex without first unlocking it shall deadlock. Attempting
+ * to unlock a mutex locked by a different thread results in undefined
+ * behavior.  Attempting to unlock an unlocked mutex results in undefined
+ * behavior.
+ */
+#define PTHREAD_MUTEX_NORMAL     0
+
+/*
+ * A thread attempting to relock this mutex without first unlocking
+ * it shall succeed in locking the mutex.  The relocking deadlock which
+ * can occur with mutexes of type PTHREAD_MUTEX_NORMAL cannot occur with
+ * this type of mutex.  Multiple locks of this mutex shall require the
+ * same number of unlocks to release the mutex before another thread can
+ * acquire the mutex. A thread attempting to unlock a mutex which another
+ * thread has locked shall return with an error.  A thread attempting to
+ * unlock an unlocked mutex shall return with an error.
+ */
+#define PTHREAD_MUTEX_RECURSIVE  1
+
+/* 
+ * This type of mutex provides error checking. A thread attempting
+ * to relock this mutex without first unlocking it shall return with an
+ * error. A thread attempting to unlock a mutex which another thread has
+ * locked shall return with an error. A thread attempting to unlock an
+ * unlocked mutex shall return with an error.
+ */
+#define PTHREAD_MUTEX_ERRORCHECK 2
+
+/*
+ * Attempting to recursively lock a mutex of this type results
+ * in undefined behavior. Attempting to unlock a mutex of this type
+ * which was not locked by the calling thread results in undefined
+ * behavior. Attempting to unlock a mutex of this type which is not locked
+ * results in undefined behavior. An implementation may map this mutex to
+ * one of the other mutex types.
+ */
+#define PTHREAD_MUTEX_DEFAULT    3
+
+#endif /* !defined(_UNIX98_THREAD_MUTEX_ATTRIBUTES) */
+
+#if defined(__XMK__)
+typedef unsigned int pthread_mutex_t;    /* identify a mutex */
+
+typedef struct {
+  int type;
+} pthread_mutexattr_t;
+
+#else /* !defined(__XMK__) */
+typedef __uint32_t pthread_mutex_t;      /* identify a mutex */
+
+typedef struct {
+  int   is_initialized;
+#if defined(_POSIX_THREAD_PROCESS_SHARED)
+  int   process_shared;  /* allow mutex to be shared amongst processes */
+#endif
+#if defined(_POSIX_THREAD_PRIO_PROTECT)
+  int   prio_ceiling;
+  int   protocol;
+#endif
+#if defined(_UNIX98_THREAD_MUTEX_ATTRIBUTES)
+  int type;
+#endif
+  int   recursive;
+} pthread_mutexattr_t;
+#endif /* !defined(__XMK__) */
+
+/* Condition Variables */
+
+typedef __uint32_t pthread_cond_t;       /* identify a condition variable */
+
+typedef struct {
+  int   is_initialized;
+#if defined(_POSIX_THREAD_PROCESS_SHARED)
+  int   process_shared;       /* allow this to be shared amongst processes */
+#endif
+} pthread_condattr_t;         /* a condition attribute object */
+
+/* Keys */
+
+typedef __uint32_t pthread_key_t;        /* thread-specific data keys */
+
+typedef struct {
+  int   is_initialized;  /* is this structure initialized? */
+  int   init_executed;   /* has the initialization routine been run? */
+} pthread_once_t;       /* dynamic package initialization */
+#else
+#if defined (__CYGWIN__)
+#include <cygwin/types.h>
+#endif
+#endif /* defined(_POSIX_THREADS) */
+
+/* POSIX Barrier Types */
+
+#if defined(_POSIX_BARRIERS)
+typedef __uint32_t pthread_barrier_t;        /* POSIX Barrier Object */
+typedef struct {
+  int   is_initialized;  /* is this structure initialized? */
+#if defined(_POSIX_THREAD_PROCESS_SHARED)
+  int   process_shared;       /* allow this to be shared amongst processes */
+#endif
+} pthread_barrierattr_t;
+#endif /* defined(_POSIX_BARRIERS) */
+
+/* POSIX Spin Lock Types */
+
+#if !defined (__CYGWIN__)
+#if defined(_POSIX_SPIN_LOCKS)
+typedef __uint32_t pthread_spinlock_t;        /* POSIX Spin Lock Object */
+#endif /* defined(_POSIX_SPIN_LOCKS) */
+
+/* POSIX Reader/Writer Lock Types */
+
+#if defined(_POSIX_READER_WRITER_LOCKS)
+typedef __uint32_t pthread_rwlock_t;         /* POSIX RWLock Object */
+typedef struct {
+  int   is_initialized;       /* is this structure initialized? */
+#if defined(_POSIX_THREAD_PROCESS_SHARED)
+  int   process_shared;       /* allow this to be shared amongst processes */
+#endif
+} pthread_rwlockattr_t;
+#endif /* defined(_POSIX_READER_WRITER_LOCKS) */
+#endif /* __CYGWIN__ */
+
+#endif  /* !__need_inttypes */
+
+#undef __need_inttypes
+
+#endif	/* _SYS_TYPES_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/unistd.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/unistd.h
new file mode 100644
index 00000000..a5f66c0b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/unistd.h
@@ -0,0 +1,510 @@
+#ifndef _SYS_UNISTD_H
+#define _SYS_UNISTD_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <_ansi.h>
+#include <sys/types.h>
+#include <sys/_types.h>
+#define __need_size_t
+#define __need_ptrdiff_t
+#include <stddef.h>
+
+extern char **environ;
+
+void	_EXFUN(_exit, (int __status ) _ATTRIBUTE ((noreturn)));
+
+int	_EXFUN(access,(const char *__path, int __amode ));
+unsigned  _EXFUN(alarm, (unsigned __secs ));
+int     _EXFUN(chdir, (const char *__path ));
+int     _EXFUN(chmod, (const char *__path, mode_t __mode ));
+#if !defined(__INSIDE_CYGWIN__)
+int     _EXFUN(chown, (const char *__path, uid_t __owner, gid_t __group ));
+#endif
+#if defined(__CYGWIN__) || defined(__rtems__)
+int     _EXFUN(chroot, (const char *__path ));
+#endif
+int     _EXFUN(close, (int __fildes ));
+#if defined(__CYGWIN__)
+size_t	_EXFUN(confstr, (int __name, char *__buf, size_t __len));
+#endif
+char *  _EXFUN(ctermid, (char *__s ));
+char *  _EXFUN(cuserid, (char *__s ));
+#if defined(__CYGWIN__)
+int	_EXFUN(daemon, (int nochdir, int noclose));
+#endif
+int     _EXFUN(dup, (int __fildes ));
+int     _EXFUN(dup2, (int __fildes, int __fildes2 ));
+#if defined(__CYGWIN__)
+int     _EXFUN(dup3, (int __fildes, int __fildes2, int flags));
+int	_EXFUN(eaccess, (const char *__path, int __mode));
+void	_EXFUN(endusershell, (void));
+int	_EXFUN(euidaccess, (const char *__path, int __mode));
+#endif
+int     _EXFUN(execl, (const char *__path, const char *, ... ));
+int     _EXFUN(execle, (const char *__path, const char *, ... ));
+int     _EXFUN(execlp, (const char *__file, const char *, ... ));
+#if defined(__CYGWIN__)
+int     _EXFUN(execlpe, (const char *__file, const char *, ... ));
+#endif
+int     _EXFUN(execv, (const char *__path, char * const __argv[] ));
+int     _EXFUN(execve, (const char *__path, char * const __argv[], char * const __envp[] ));
+int     _EXFUN(execvp, (const char *__file, char * const __argv[] ));
+#if defined(__CYGWIN__)
+int     _EXFUN(execvpe, (const char *__file, char * const __argv[], char * const __envp[] ));
+int	_EXFUN(faccessat, (int __dirfd, const char *__path, int __mode, int __flags));
+#endif
+#if defined(__CYGWIN__) || defined(__rtems__) || defined(__SPU__)
+int     _EXFUN(fchdir, (int __fildes));
+#endif
+int     _EXFUN(fchmod, (int __fildes, mode_t __mode ));
+#if !defined(__INSIDE_CYGWIN__)
+int     _EXFUN(fchown, (int __fildes, uid_t __owner, gid_t __group ));
+#endif
+#if defined(__CYGWIN__)
+int	_EXFUN(fchownat, (int __dirfd, const char *__path, uid_t __owner, gid_t __group, int __flags));
+int	_EXFUN(fexecve, (int __fd, char * const __argv[], char * const __envp[] ));
+#endif
+pid_t   _EXFUN(fork, (void ));
+long    _EXFUN(fpathconf, (int __fd, int __name ));
+int     _EXFUN(fsync, (int __fd));
+int     _EXFUN(fdatasync, (int __fd));
+#if defined(__CYGWIN__)
+char *  _EXFUN(get_current_dir_name, (void));
+#endif
+char *  _EXFUN(getcwd, (char *__buf, size_t __size ));
+#if defined(__CYGWIN__)
+int	_EXFUN(getdomainname ,(char *__name, size_t __len));
+#endif
+#if !defined(__INSIDE_CYGWIN__)
+gid_t   _EXFUN(getegid, (void ));
+uid_t   _EXFUN(geteuid, (void ));
+gid_t   _EXFUN(getgid, (void ));
+#endif
+int     _EXFUN(getgroups, (int __gidsetsize, gid_t __grouplist[] ));
+#if defined(__CYGWIN__)
+long    _EXFUN(gethostid, (void));
+#endif
+char *  _EXFUN(getlogin, (void ));
+#if defined(_POSIX_THREAD_SAFE_FUNCTIONS)
+int _EXFUN(getlogin_r, (char *name, size_t namesize) );
+#endif
+char *  _EXFUN(getpass, (const char *__prompt));
+int	_EXFUN(getpagesize, (void));
+#if defined(__CYGWIN__)
+int    _EXFUN(getpeereid, (int, uid_t *, gid_t *));
+#endif
+pid_t   _EXFUN(getpgid, (pid_t));
+pid_t   _EXFUN(getpgrp, (void ));
+pid_t   _EXFUN(getpid, (void ));
+pid_t   _EXFUN(getppid, (void ));
+#if defined(__CYGWIN__) || defined(__rtems__)
+pid_t   _EXFUN(getsid, (pid_t));
+#endif
+#if !defined(__INSIDE_CYGWIN__)
+uid_t   _EXFUN(getuid, (void ));
+#endif
+#ifdef __CYGWIN__
+char *	_EXFUN(getusershell, (void));
+char *  _EXFUN(getwd, (char *__buf ));
+int	_EXFUN(iruserok, (unsigned long raddr, int superuser, const char *ruser, const char *luser));
+#endif
+int     _EXFUN(isatty, (int __fildes ));
+#if !defined(__INSIDE_CYGWIN__)
+int     _EXFUN(lchown, (const char *__path, uid_t __owner, gid_t __group ));
+#endif
+int     _EXFUN(link, (const char *__path1, const char *__path2 ));
+#if defined(__CYGWIN__)
+int     _EXFUN(linkat, (int __dirfd1, const char *__path1, int __dirfd2, const char *__path2, int __flags ));
+#endif
+int	_EXFUN(nice, (int __nice_value ));
+#if !defined(__INSIDE_CYGWIN__)
+off_t   _EXFUN(lseek, (int __fildes, off_t __offset, int __whence ));
+#endif
+#if defined(__SPU__) || defined(__CYGWIN__)
+#define F_ULOCK	0
+#define F_LOCK	1
+#define F_TLOCK	2
+#define F_TEST	3
+int     _EXFUN(lockf, (int __fd, int __cmd, off_t __len));
+#endif
+long    _EXFUN(pathconf, (const char *__path, int __name ));
+int     _EXFUN(pause, (void ));
+#ifdef __CYGWIN__
+int	_EXFUN(pthread_atfork, (void (*)(void), void (*)(void), void (*)(void)));
+#endif
+int     _EXFUN(pipe, (int __fildes[2] ));
+#ifdef __CYGWIN__
+int     _EXFUN(pipe2, (int __fildes[2], int flags));
+#endif
+ssize_t _EXFUN(pread, (int __fd, void *__buf, size_t __nbytes, off_t __offset));
+ssize_t _EXFUN(pwrite, (int __fd, const void *__buf, size_t __nbytes, off_t __offset));
+_READ_WRITE_RETURN_TYPE _EXFUN(read, (int __fd, void *__buf, size_t __nbyte ));
+#if defined(__CYGWIN__)
+int	_EXFUN(rresvport, (int *__alport));
+int	_EXFUN(revoke, (char *__path));
+#endif
+int     _EXFUN(rmdir, (const char *__path ));
+#if defined(__CYGWIN__)
+int	_EXFUN(ruserok, (const char *rhost, int superuser, const char *ruser, const char *luser));
+#endif
+void *  _EXFUN(sbrk,  (ptrdiff_t __incr));
+#if !defined(__INSIDE_CYGWIN__)
+#if defined(__CYGWIN__) || defined(__rtems__)
+int     _EXFUN(setegid, (gid_t __gid ));
+int     _EXFUN(seteuid, (uid_t __uid ));
+#endif
+int     _EXFUN(setgid, (gid_t __gid ));
+#endif
+#if defined(__CYGWIN__)
+int	_EXFUN(setgroups, (int ngroups, const gid_t *grouplist ));
+#endif
+int     _EXFUN(setpgid, (pid_t __pid, pid_t __pgid ));
+int     _EXFUN(setpgrp, (void ));
+#if defined(__CYGWIN__) && !defined(__INSIDE_CYGWIN__)
+int	_EXFUN(setregid, (gid_t __rgid, gid_t __egid));
+int	_EXFUN(setreuid, (uid_t __ruid, uid_t __euid));
+#endif
+pid_t   _EXFUN(setsid, (void ));
+#if !defined(__INSIDE_CYGWIN__)
+int     _EXFUN(setuid, (uid_t __uid ));
+#endif
+#if defined(__CYGWIN__)
+void	_EXFUN(setusershell, (void));
+#endif
+unsigned _EXFUN(sleep, (unsigned int __seconds ));
+void    _EXFUN(swab, (const void *, void *, ssize_t));
+long    _EXFUN(sysconf, (int __name ));
+pid_t   _EXFUN(tcgetpgrp, (int __fildes ));
+int     _EXFUN(tcsetpgrp, (int __fildes, pid_t __pgrp_id ));
+char *  _EXFUN(ttyname, (int __fildes ));
+#if defined(__CYGWIN__) || defined(__rtems__)
+int     _EXFUN(ttyname_r, (int, char *, size_t)); 
+#endif
+int     _EXFUN(unlink, (const char *__path ));
+int 	_EXFUN(usleep, (useconds_t __useconds));
+int     _EXFUN(vhangup, (void ));
+_READ_WRITE_RETURN_TYPE _EXFUN(write, (int __fd, const void *__buf, size_t __nbyte ));
+
+#ifdef __CYGWIN__
+# define __UNISTD_GETOPT__
+# include <getopt.h>
+# undef __UNISTD_GETOPT__
+#else
+extern char *optarg;			/* getopt(3) external variables */
+extern int optind, opterr, optopt;
+int	 getopt(int, char * const [], const char *);
+extern int optreset;			/* getopt(3) external variable */
+#endif
+
+#ifndef        _POSIX_SOURCE
+pid_t   _EXFUN(vfork, (void ));
+#endif /* _POSIX_SOURCE */
+
+#ifdef _COMPILING_NEWLIB
+/* Provide prototypes for most of the _<systemcall> names that are
+   provided in newlib for some compilers.  */
+int     _EXFUN(_close, (int __fildes ));
+pid_t   _EXFUN(_fork, (void ));
+pid_t   _EXFUN(_getpid, (void ));
+int	_EXFUN(_isatty, (int __fildes ));
+int     _EXFUN(_link, (const char *__path1, const char *__path2 ));
+_off_t   _EXFUN(_lseek, (int __fildes, _off_t __offset, int __whence ));
+#ifdef __LARGE64_FILES
+_off64_t _EXFUN(_lseek64, (int __filedes, _off64_t __offset, int __whence ));
+#endif
+_READ_WRITE_RETURN_TYPE _EXFUN(_read, (int __fd, void *__buf, size_t __nbyte ));
+void *  _EXFUN(_sbrk,  (ptrdiff_t __incr));
+int     _EXFUN(_unlink, (const char *__path ));
+_READ_WRITE_RETURN_TYPE _EXFUN(_write, (int __fd, const void *__buf, size_t __nbyte ));
+int     _EXFUN(_execve, (const char *__path, char * const __argv[], char * const __envp[] ));
+#endif
+
+#if defined(__CYGWIN__) || defined(__rtems__) || defined(__sh__) || defined(__SPU__)
+#if !defined(__INSIDE_CYGWIN__)
+int     _EXFUN(ftruncate, (int __fd, off_t __length));
+int     _EXFUN(truncate, (const char *, off_t __length));
+#endif
+#endif
+
+#if defined(__CYGWIN__) || defined(__rtems__)
+int	_EXFUN(getdtablesize, (void));
+int	_EXFUN(setdtablesize, (int));
+useconds_t _EXFUN(ualarm, (useconds_t __useconds, useconds_t __interval));
+#if !(defined  (_WINSOCK_H) || defined (_WINSOCKAPI_) || defined (__USE_W32_SOCKETS))
+/* winsock[2].h defines as __stdcall, and with int as 2nd arg */
+ int	_EXFUN(gethostname, (char *__name, size_t __len));
+#endif
+char *	_EXFUN(mktemp, (char *));
+#endif
+
+#if defined(__CYGWIN__) || defined(__SPU__) || defined(__rtems__)
+void    _EXFUN(sync, (void));
+#endif
+
+ssize_t _EXFUN(readlink, (const char *__path, char *__buf, size_t __buflen));
+#if defined(__CYGWIN__)
+ssize_t	_EXFUN(readlinkat, (int __dirfd1, const char *__path, char *__buf, size_t __buflen));
+#endif
+int     _EXFUN(symlink, (const char *__name1, const char *__name2));
+#if defined(__CYGWIN__)
+int	_EXFUN(symlinkat, (const char *, int, const char *));
+int	_EXFUN(unlinkat, (int, const char *, int));
+#endif
+
+#define	F_OK	0
+#define	R_OK	4
+#define	W_OK	2
+#define	X_OK	1
+
+# define	SEEK_SET	0
+# define	SEEK_CUR	1
+# define	SEEK_END	2
+
+#include <sys/features.h>
+
+#define STDIN_FILENO    0       /* standard input file descriptor */
+#define STDOUT_FILENO   1       /* standard output file descriptor */
+#define STDERR_FILENO   2       /* standard error file descriptor */
+
+/*
+ *  sysconf values per IEEE Std 1003.1, 2008 Edition
+ */
+
+#define _SC_ARG_MAX                       0
+#define _SC_CHILD_MAX                     1
+#define _SC_CLK_TCK                       2
+#define _SC_NGROUPS_MAX                   3
+#define _SC_OPEN_MAX                      4
+#define _SC_JOB_CONTROL                   5
+#define _SC_SAVED_IDS                     6
+#define _SC_VERSION                       7
+#define _SC_PAGESIZE                      8
+#define _SC_PAGE_SIZE                     _SC_PAGESIZE
+/* These are non-POSIX values we accidentally introduced in 2000 without
+   guarding them.  Keeping them unguarded for backward compatibility. */
+#define _SC_NPROCESSORS_CONF              9
+#define _SC_NPROCESSORS_ONLN             10
+#define _SC_PHYS_PAGES                   11
+#define _SC_AVPHYS_PAGES                 12
+/* End of non-POSIX values. */
+#define _SC_MQ_OPEN_MAX                  13
+#define _SC_MQ_PRIO_MAX                  14
+#define _SC_RTSIG_MAX                    15
+#define _SC_SEM_NSEMS_MAX                16
+#define _SC_SEM_VALUE_MAX                17
+#define _SC_SIGQUEUE_MAX                 18
+#define _SC_TIMER_MAX                    19
+#define _SC_TZNAME_MAX                   20
+#define _SC_ASYNCHRONOUS_IO              21
+#define _SC_FSYNC                        22
+#define _SC_MAPPED_FILES                 23
+#define _SC_MEMLOCK                      24
+#define _SC_MEMLOCK_RANGE                25
+#define _SC_MEMORY_PROTECTION            26
+#define _SC_MESSAGE_PASSING              27
+#define _SC_PRIORITIZED_IO               28
+#define _SC_REALTIME_SIGNALS             29
+#define _SC_SEMAPHORES                   30
+#define _SC_SHARED_MEMORY_OBJECTS        31
+#define _SC_SYNCHRONIZED_IO              32
+#define _SC_TIMERS                       33
+#define _SC_AIO_LISTIO_MAX               34
+#define _SC_AIO_MAX                      35
+#define _SC_AIO_PRIO_DELTA_MAX           36
+#define _SC_DELAYTIMER_MAX               37
+#define _SC_THREAD_KEYS_MAX              38
+#define _SC_THREAD_STACK_MIN             39
+#define _SC_THREAD_THREADS_MAX           40
+#define _SC_TTY_NAME_MAX                 41
+#define _SC_THREADS                      42
+#define _SC_THREAD_ATTR_STACKADDR        43
+#define _SC_THREAD_ATTR_STACKSIZE        44
+#define _SC_THREAD_PRIORITY_SCHEDULING   45
+#define _SC_THREAD_PRIO_INHERIT          46
+/* _SC_THREAD_PRIO_PROTECT was _SC_THREAD_PRIO_CEILING in early drafts */
+#define _SC_THREAD_PRIO_PROTECT          47
+#define _SC_THREAD_PRIO_CEILING          _SC_THREAD_PRIO_PROTECT
+#define _SC_THREAD_PROCESS_SHARED        48
+#define _SC_THREAD_SAFE_FUNCTIONS        49
+#define _SC_GETGR_R_SIZE_MAX             50
+#define _SC_GETPW_R_SIZE_MAX             51
+#define _SC_LOGIN_NAME_MAX               52
+#define _SC_THREAD_DESTRUCTOR_ITERATIONS 53
+#define _SC_ADVISORY_INFO                54
+#define _SC_ATEXIT_MAX                   55
+#define _SC_BARRIERS                     56
+#define _SC_BC_BASE_MAX                  57
+#define _SC_BC_DIM_MAX                   58
+#define _SC_BC_SCALE_MAX                 59
+#define _SC_BC_STRING_MAX                60
+#define _SC_CLOCK_SELECTION              61
+#define _SC_COLL_WEIGHTS_MAX             62
+#define _SC_CPUTIME                      63
+#define _SC_EXPR_NEST_MAX                64
+#define _SC_HOST_NAME_MAX                65
+#define _SC_IOV_MAX                      66
+#define _SC_IPV6                         67
+#define _SC_LINE_MAX                     68
+#define _SC_MONOTONIC_CLOCK              69
+#define _SC_RAW_SOCKETS                  70
+#define _SC_READER_WRITER_LOCKS          71
+#define _SC_REGEXP                       72
+#define _SC_RE_DUP_MAX                   73
+#define _SC_SHELL                        74
+#define _SC_SPAWN                        75
+#define _SC_SPIN_LOCKS                   76
+#define _SC_SPORADIC_SERVER              77
+#define _SC_SS_REPL_MAX                  78
+#define _SC_SYMLOOP_MAX                  79
+#define _SC_THREAD_CPUTIME               80
+#define _SC_THREAD_SPORADIC_SERVER       81
+#define _SC_TIMEOUTS                     82
+#define _SC_TRACE                        83
+#define _SC_TRACE_EVENT_FILTER           84
+#define _SC_TRACE_EVENT_NAME_MAX         85
+#define _SC_TRACE_INHERIT                86
+#define _SC_TRACE_LOG                    87
+#define _SC_TRACE_NAME_MAX               88
+#define _SC_TRACE_SYS_MAX                89
+#define _SC_TRACE_USER_EVENT_MAX         90
+#define _SC_TYPED_MEMORY_OBJECTS         91
+#define _SC_V7_ILP32_OFF32               92
+#define _SC_V6_ILP32_OFF32               _SC_V7_ILP32_OFF32
+#define _SC_XBS5_ILP32_OFF32             _SC_V7_ILP32_OFF32
+#define _SC_V7_ILP32_OFFBIG              93
+#define _SC_V6_ILP32_OFFBIG              _SC_V7_ILP32_OFFBIG
+#define _SC_XBS5_ILP32_OFFBIG            _SC_V7_ILP32_OFFBIG
+#define _SC_V7_LP64_OFF64                94
+#define _SC_V6_LP64_OFF64                _SC_V7_LP64_OFF64
+#define _SC_XBS5_LP64_OFF64              _SC_V7_LP64_OFF64
+#define _SC_V7_LPBIG_OFFBIG              95
+#define _SC_V6_LPBIG_OFFBIG              _SC_V7_LPBIG_OFFBIG
+#define _SC_XBS5_LPBIG_OFFBIG            _SC_V7_LPBIG_OFFBIG
+#define _SC_XOPEN_CRYPT                  96
+#define _SC_XOPEN_ENH_I18N               97
+#define _SC_XOPEN_LEGACY                 98
+#define _SC_XOPEN_REALTIME               99
+#define _SC_STREAM_MAX                  100
+#define _SC_PRIORITY_SCHEDULING         101
+#define _SC_XOPEN_REALTIME_THREADS      102
+#define _SC_XOPEN_SHM                   103
+#define _SC_XOPEN_STREAMS               104
+#define _SC_XOPEN_UNIX                  105
+#define _SC_XOPEN_VERSION               106
+#define _SC_2_CHAR_TERM                 107
+#define _SC_2_C_BIND                    108
+#define _SC_2_C_DEV                     109
+#define _SC_2_FORT_DEV                  110
+#define _SC_2_FORT_RUN                  111
+#define _SC_2_LOCALEDEF                 112
+#define _SC_2_PBS                       113
+#define _SC_2_PBS_ACCOUNTING            114
+#define _SC_2_PBS_CHECKPOINT            115
+#define _SC_2_PBS_LOCATE                116
+#define _SC_2_PBS_MESSAGE               117
+#define _SC_2_PBS_TRACK                 118
+#define _SC_2_SW_DEV                    119
+#define _SC_2_UPE                       120
+#define _SC_2_VERSION                   121
+#define _SC_THREAD_ROBUST_PRIO_INHERIT  122
+#define _SC_THREAD_ROBUST_PRIO_PROTECT  123
+#define _SC_XOPEN_UUCP                  124
+
+/*
+ *  pathconf values per IEEE Std 1003.1, 2008 Edition
+ */
+
+#define _PC_LINK_MAX                      0
+#define _PC_MAX_CANON                     1
+#define _PC_MAX_INPUT                     2
+#define _PC_NAME_MAX                      3
+#define _PC_PATH_MAX                      4
+#define _PC_PIPE_BUF                      5
+#define _PC_CHOWN_RESTRICTED              6
+#define _PC_NO_TRUNC                      7
+#define _PC_VDISABLE                      8
+#define _PC_ASYNC_IO                      9
+#define _PC_PRIO_IO                      10
+#define _PC_SYNC_IO                      11
+#define _PC_FILESIZEBITS                 12
+#define _PC_2_SYMLINKS                   13
+#define _PC_SYMLINK_MAX                  14
+#define _PC_ALLOC_SIZE_MIN               15
+#define _PC_REC_INCR_XFER_SIZE           16
+#define _PC_REC_MAX_XFER_SIZE            17
+#define _PC_REC_MIN_XFER_SIZE            18
+#define _PC_REC_XFER_ALIGN               19
+#define _PC_TIMESTAMP_RESOLUTION         20
+#ifdef __CYGWIN__
+/* Ask for POSIX permission bits support. */
+#define _PC_POSIX_PERMISSIONS            90
+/* Ask for full POSIX permission support including uid/gid settings. */
+#define _PC_POSIX_SECURITY               91
+#endif
+
+/*
+ *  confstr values per IEEE Std 1003.1, 2004 Edition
+ */
+
+#ifdef __CYGWIN__	/* Only defined on Cygwin for now. */
+#define _CS_PATH                               0
+#define _CS_POSIX_V7_ILP32_OFF32_CFLAGS        1
+#define _CS_POSIX_V6_ILP32_OFF32_CFLAGS       _CS_POSIX_V7_ILP32_OFF32_CFLAGS
+#define _CS_XBS5_ILP32_OFF32_CFLAGS           _CS_POSIX_V7_ILP32_OFF32_CFLAGS
+#define _CS_POSIX_V7_ILP32_OFF32_LDFLAGS       2
+#define _CS_POSIX_V6_ILP32_OFF32_LDFLAGS      _CS_POSIX_V7_ILP32_OFF32_LDFLAGS
+#define _CS_XBS5_ILP32_OFF32_LDFLAGS          _CS_POSIX_V7_ILP32_OFF32_LDFLAGS
+#define _CS_POSIX_V7_ILP32_OFF32_LIBS          3
+#define _CS_POSIX_V6_ILP32_OFF32_LIBS         _CS_POSIX_V7_ILP32_OFF32_LIBS
+#define _CS_XBS5_ILP32_OFF32_LIBS             _CS_POSIX_V7_ILP32_OFF32_LIBS
+#define _CS_XBS5_ILP32_OFF32_LINTFLAGS         4
+#define _CS_POSIX_V7_ILP32_OFFBIG_CFLAGS       5
+#define _CS_POSIX_V6_ILP32_OFFBIG_CFLAGS      _CS_POSIX_V7_ILP32_OFFBIG_CFLAGS
+#define _CS_XBS5_ILP32_OFFBIG_CFLAGS          _CS_POSIX_V7_ILP32_OFFBIG_CFLAGS
+#define _CS_POSIX_V7_ILP32_OFFBIG_LDFLAGS      6
+#define _CS_POSIX_V6_ILP32_OFFBIG_LDFLAGS     _CS_POSIX_V7_ILP32_OFFBIG_LDFLAGS
+#define _CS_XBS5_ILP32_OFFBIG_LDFLAGS         _CS_POSIX_V7_ILP32_OFFBIG_LDFLAGS
+#define _CS_POSIX_V7_ILP32_OFFBIG_LIBS         7
+#define _CS_POSIX_V6_ILP32_OFFBIG_LIBS        _CS_POSIX_V7_ILP32_OFFBIG_LIBS
+#define _CS_XBS5_ILP32_OFFBIG_LIBS            _CS_POSIX_V7_ILP32_OFFBIG_LIBS
+#define _CS_XBS5_ILP32_OFFBIG_LINTFLAGS        8
+#define _CS_POSIX_V7_LP64_OFF64_CFLAGS         9
+#define _CS_POSIX_V6_LP64_OFF64_CFLAGS        _CS_POSIX_V7_LP64_OFF64_CFLAGS
+#define _CS_XBS5_LP64_OFF64_CFLAGS            _CS_POSIX_V7_LP64_OFF64_CFLAGS
+#define _CS_POSIX_V7_LP64_OFF64_LDFLAGS       10
+#define _CS_POSIX_V6_LP64_OFF64_LDFLAGS       _CS_POSIX_V7_LP64_OFF64_LDFLAGS
+#define _CS_XBS5_LP64_OFF64_LDFLAGS           _CS_POSIX_V7_LP64_OFF64_LDFLAGS
+#define _CS_POSIX_V7_LP64_OFF64_LIBS          11
+#define _CS_POSIX_V6_LP64_OFF64_LIBS          _CS_POSIX_V7_LP64_OFF64_LIBS
+#define _CS_XBS5_LP64_OFF64_LIBS              _CS_POSIX_V7_LP64_OFF64_LIBS
+#define _CS_XBS5_LP64_OFF64_LINTFLAGS         12
+#define _CS_POSIX_V7_LPBIG_OFFBIG_CFLAGS      13
+#define _CS_POSIX_V6_LPBIG_OFFBIG_CFLAGS      _CS_POSIX_V7_LPBIG_OFFBIG_CFLAGS
+#define _CS_XBS5_LPBIG_OFFBIG_CFLAGS          _CS_POSIX_V7_LPBIG_OFFBIG_CFLAGS
+#define _CS_POSIX_V7_LPBIG_OFFBIG_LDFLAGS     14
+#define _CS_POSIX_V6_LPBIG_OFFBIG_LDFLAGS     _CS_POSIX_V7_LPBIG_OFFBIG_LDFLAGS
+#define _CS_XBS5_LPBIG_OFFBIG_LDFLAGS         _CS_POSIX_V7_LPBIG_OFFBIG_LDFLAGS
+#define _CS_POSIX_V7_LPBIG_OFFBIG_LIBS        15
+#define _CS_POSIX_V6_LPBIG_OFFBIG_LIBS        _CS_POSIX_V7_LPBIG_OFFBIG_LIBS
+#define _CS_XBS5_LPBIG_OFFBIG_LIBS            _CS_POSIX_V7_LPBIG_OFFBIG_LIBS
+#define _CS_XBS5_LPBIG_OFFBIG_LINTFLAGS       16
+#define _CS_POSIX_V7_WIDTH_RESTRICTED_ENVS    17
+#define _CS_POSIX_V6_WIDTH_RESTRICTED_ENVS    _CS_POSIX_V7_WIDTH_RESTRICTED_ENVS
+#define _CS_XBS5_WIDTH_RESTRICTED_ENVS        _CS_POSIX_V7_WIDTH_RESTRICTED_ENVS
+#define _CS_POSIX_V7_THREADS_CFLAGS           18
+#define _CS_POSIX_V7_THREADS_LDFLAGS          19
+#define _CS_V7_ENV                            20
+#define _CS_V6_ENV                            _CS_V7_ENV
+#endif
+
+#ifndef __CYGWIN__
+# define	MAXPATHLEN	1024
+#endif
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _SYS_UNISTD_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/utime.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/utime.h
new file mode 100644
index 00000000..5e937f10
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/utime.h
@@ -0,0 +1,22 @@
+#ifndef _SYS_UTIME_H
+#define _SYS_UTIME_H
+
+/* This is a dummy <sys/utime.h> file, not customized for any
+   particular system.  If there is a utime.h in libc/sys/SYSDIR/sys,
+   it will override this one.  */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct utimbuf 
+{
+  time_t actime;
+  time_t modtime; 
+};
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif /* _SYS_UTIME_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/wait.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/wait.h
new file mode 100644
index 00000000..73fe3720
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/sys/wait.h
@@ -0,0 +1,44 @@
+#ifndef _SYS_WAIT_H
+#define _SYS_WAIT_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <sys/types.h>
+
+#define WNOHANG 1
+#define WUNTRACED 2
+
+/* A status looks like:
+      <2 bytes info> <2 bytes code>
+
+      <code> == 0, child has exited, info is the exit value
+      <code> == 1..7e, child has exited, info is the signal number.
+      <code> == 7f, child has stopped, info was the signal number.
+      <code> == 80, there was a core dump.
+*/
+   
+#define WIFEXITED(w)	(((w) & 0xff) == 0)
+#define WIFSIGNALED(w)	(((w) & 0x7f) > 0 && (((w) & 0x7f) < 0x7f))
+#define WIFSTOPPED(w)	(((w) & 0xff) == 0x7f)
+#define WEXITSTATUS(w)	(((w) >> 8) & 0xff)
+#define WTERMSIG(w)	((w) & 0x7f)
+#define WSTOPSIG	WEXITSTATUS
+
+pid_t wait (int *);
+pid_t waitpid (pid_t, int *, int);
+
+#ifdef _COMPILING_NEWLIB
+pid_t _wait (int *);
+#endif
+
+/* Provide prototypes for most of the _<systemcall> names that are
+   provided in newlib for some compilers.  */
+pid_t _wait (int *);
+
+#ifdef __cplusplus
+};
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tar.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tar.h
new file mode 100644
index 00000000..07b06dd7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tar.h
@@ -0,0 +1,39 @@
+/*
+ * tar.h
+ */
+
+#ifndef _TAR_H
+#define _TAR_H
+
+/* General definitions */
+#define TMAGIC 		"ustar" /* ustar plus null byte. */
+#define TMAGLEN 	6 	/* Length of the above. */
+#define TVERSION 	"00"	/* 00 without a null byte. */
+#define TVERSLEN	2	/* Length of the above. */
+
+/* Typeflag field definitions */
+#define REGTYPE 	'0'	/* Regular file. */
+#define AREGTYPE	'\0'	/* Regular file. */
+#define LNKTYPE		'1'	/* Link. */
+#define SYMTYPE		'2'	/* Symbolic link. */
+#define CHRTYPE		'3'	/* Character special. */
+#define BLKTYPE		'4'	/* Block special. */
+#define DIRTYPE		'5'	/* Directory. */
+#define FIFOTYPE	'6'	/* FIFO special. */
+#define CONTTYPE	'7'	/* Reserved. */
+
+/* Mode field bit definitions (octal) */
+#define	TSUID		04000	/* Set UID on execution. */
+#define	TSGID		02000	/* Set GID on execution. */
+#define	TSVTX		01000	/* On directories, restricted deletion flag. */
+#define	TUREAD		00400	/* Read by owner. */
+#define	TUWRITE		00200	/* Write by owner. */
+#define	TUEXEC		00100	/* Execute/search by owner. */
+#define	TGREAD		00040	/* Read by group. */
+#define	TGWRITE		00020	/* Write by group. */
+#define	TGEXEC		00010	/* Execute/search by group. */
+#define	TOREAD		00004	/* Read by other. */
+#define	TOWRITE		00002	/* Write by other. */
+#define	TOEXEC		00001	/* Execute/search by other. */
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/termios.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/termios.h
new file mode 100644
index 00000000..ee1820ce
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/termios.h
@@ -0,0 +1,7 @@
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <sys/termios.h>
+#ifdef __cplusplus
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tgmath.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tgmath.h
new file mode 100644
index 00000000..f9c8311c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/tgmath.h
@@ -0,0 +1,184 @@
+/* http://pubs.opengroup.org/onlinepubs/9699919799/basedefs/tgmath.h.html */
+/*-
+ * Copyright (c) 2004 Stefan Farfeleder.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef _TGMATH_H_
+#define	_TGMATH_H_
+
+#include <complex.h>
+#include <math.h>
+
+#ifdef log2
+#undef log2
+#endif
+
+/*
+ * This implementation of <tgmath.h> requires two implementation-dependent
+ * macros to be defined:
+ * __tg_impl_simple(x, y, z, fn, fnf, fnl, ...)
+ *	Invokes fnl() if the corresponding real type of x, y or z is long
+ *	double, fn() if it is double or any has an integer type, and fnf()
+ *	otherwise.
+ * __tg_impl_full(x, y, z, fn, fnf, fnl, cfn, cfnf, cfnl, ...)
+ *	Invokes [c]fnl() if the corresponding real type of x, y or z is long
+ *	double, [c]fn() if it is double or any has an integer type, and
+ *	[c]fnf() otherwise.  The function with the 'c' prefix is called if
+ *	any of x, y or z is a complex number.
+ * Both macros call the chosen function with all additional arguments passed
+ * to them, as given by __VA_ARGS__.
+ *
+ * Note that these macros cannot be implemented with C's ?: operator,
+ * because the return type of the whole expression would incorrectly be long
+ * double complex regardless of the argument types.
+ */
+
+/* requires GCC >= 3.1 */
+#if !__GNUC_PREREQ (3, 1)
+#error "<tgmath.h> not implemented for this compiler"
+#endif
+
+#define	__tg_type(__e, __t)						\
+	__builtin_types_compatible_p(__typeof__(__e), __t)
+#define	__tg_type3(__e1, __e2, __e3, __t)				\
+	(__tg_type(__e1, __t) || __tg_type(__e2, __t) || 		\
+	 __tg_type(__e3, __t))
+#define	__tg_type_corr(__e1, __e2, __e3, __t)				\
+	(__tg_type3(__e1, __e2, __e3, __t) || 				\
+	 __tg_type3(__e1, __e2, __e3, __t _Complex))
+#define	__tg_integer(__e1, __e2, __e3)					\
+	(((__typeof__(__e1))1.5 == 1) || ((__typeof__(__e2))1.5 == 1) ||	\
+	 ((__typeof__(__e3))1.5 == 1))
+#define	__tg_is_complex(__e1, __e2, __e3)				\
+	(__tg_type3(__e1, __e2, __e3, float _Complex) ||		\
+	 __tg_type3(__e1, __e2, __e3, double _Complex) ||		\
+	 __tg_type3(__e1, __e2, __e3, long double _Complex) ||		\
+	 __tg_type3(__e1, __e2, __e3, __typeof__(_Complex_I)))
+
+#ifdef _LDBL_EQ_DBL
+#define	__tg_impl_simple(x, y, z, fn, fnf, fnl, ...)			\
+	__builtin_choose_expr(__tg_type_corr(x, y, z, long double),	\
+	    fnl(__VA_ARGS__), __builtin_choose_expr(			\
+		__tg_type_corr(x, y, z, double) || __tg_integer(x, y, z),\
+		fn(__VA_ARGS__), fnf(__VA_ARGS__)))
+#else
+#define	__tg_impl_simple(__x, __y, __z, __fn, __fnf, __fnl, ...)	\
+	(__tg_type_corr(__x, __y, __z, double) || __tg_integer(__x, __y, __z)) \
+		? __fn(__VA_ARGS__) : __fnf(__VA_ARGS__)
+#endif
+
+#define	__tg_impl_full(__x, __y, __z, __fn, __fnf, __fnl, __cfn, __cfnf, __cfnl, ...)	\
+	__builtin_choose_expr(__tg_is_complex(__x, __y, __z),		\
+	    __tg_impl_simple(__x, __y, __z, __cfn, __cfnf, __cfnl, __VA_ARGS__),	\
+	    __tg_impl_simple(__x, __y, __z, __fn, __fnf, __fnl, __VA_ARGS__))
+
+/* Macros to save lots of repetition below */
+#define	__tg_simple(__x, __fn)						\
+	__tg_impl_simple(__x, __x, __x, __fn, __fn##f, __fn##l, __x)
+#define	__tg_simple2(__x, __y, __fn)					\
+	__tg_impl_simple(__x, __x, __y, __fn, __fn##f, __fn##l, __x, __y)
+#define	__tg_simplev(__x, __fn, ...)					\
+	__tg_impl_simple(__x, __x, __x, __fn, __fn##f, __fn##l, __VA_ARGS__)
+#define	__tg_full(__x, __fn)						\
+	__tg_impl_full(__x, __x, __x, __fn, __fn##f, __fn##l, c##__fn, c##__fn##f, c##__fn##l, __x)
+
+/* 7.22#4 -- These macros expand to real or complex functions, depending on
+ * the type of their arguments. */
+#define	acos(__x)		__tg_full(__x, acos)
+#define	asin(__x)		__tg_full(__x, asin)
+#define	atan(__x)		__tg_full(__x, atan)
+#define	acosh(__x)		__tg_full(__x, acosh)
+#define	asinh(__x)		__tg_full(__x, asinh)
+#define	atanh(__x)		__tg_full(__x, atanh)
+#define	cos(__x)		__tg_full(__x, cos)
+#define	sin(__x)		__tg_full(__x, sin)
+#define	tan(__x)		__tg_full(__x, tan)
+#define	cosh(__x)		__tg_full(__x, cosh)
+#define	sinh(__x)		__tg_full(__x, sinh)
+#define	tanh(__x)		__tg_full(__x, tanh)
+#define	exp(__x)		__tg_full(__x, exp)
+#define	log(__x)		__tg_full(__x, log)
+#define	pow(__x, __y)		__tg_impl_full(__x, __x, __y, pow, powf, powl,	\
+						cpow, cpowf, cpowl, __x, __y)
+#define	sqrt(__x)		__tg_full(__x, sqrt)
+
+/* "The corresponding type-generic macro for fabs and cabs is fabs." */
+#define	fabs(__x)		__tg_impl_full(__x, __x, __x, fabs, fabsf, fabsl,	\
+						cabs, cabsf, cabsl, __x)
+
+/* 7.22#5 -- These macros are only defined for arguments with real type. */
+#define	atan2(__x, __y)		__tg_simple2(__x, __y, atan2)
+#define	cbrt(__x)		__tg_simple(__x, cbrt)
+#define	ceil(__x)		__tg_simple(__x, ceil)
+#define	copysign(__x, __y)	__tg_simple2(__x, __y, copysign)
+#define	erf(__x)		__tg_simple(__x, erf)
+#define	erfc(__x)		__tg_simple(__x, erfc)
+#define	exp2(__x)		__tg_simple(__x, exp2)
+#define	expm1(__x)		__tg_simple(__x, expm1)
+#define	fdim(__x, __y)		__tg_simple2(__x, __y, fdim)
+#define	floor(__x)		__tg_simple(__x, floor)
+#define	fma(__x, __y, __z)	__tg_impl_simple(__x, __y, __z, fma, fmaf, fmal, \
+						 __x, __y, __z)
+#define	fmax(__x, __y)		__tg_simple2(__x, __y, fmax)
+#define	fmin(__x, __y)		__tg_simple2(__x, __y, fmin)
+#define	fmod(__x, __y)		__tg_simple2(__x, __y, fmod)
+#define	frexp(__x, __y)		__tg_simplev(__x, frexp, __x, __y)
+#define	hypot(__x, __y)		__tg_simple2(__x, __y, hypot)
+#define	ilogb(__x)		__tg_simple(__x, ilogb)
+#define	ldexp(__x, __y)		__tg_simplev(__x, ldexp, __x, __y)
+#define	lgamma(__x)		__tg_simple(__x, lgamma)
+#define	llrint(__x)		__tg_simple(__x, llrint)
+#define	llround(__x)		__tg_simple(__x, llround)
+#define	log10(__x)		__tg_simple(__x, log10)
+#define	log1p(__x)		__tg_simple(__x, log1p)
+#define	log2(__x)		__tg_simple(__x, log2)
+#define	logb(__x)		__tg_simple(__x, logb)
+#define	lrint(__x)		__tg_simple(__x, lrint)
+#define	lround(__x)		__tg_simple(__x, lround)
+#define	nearbyint(__x)		__tg_simple(__x, nearbyint)
+#define	nextafter(__x, __y)	__tg_simple2(__x, __y, nextafter)
+/* not yet implemented even for _LDBL_EQ_DBL platforms
+#define	nexttoward(__x, __y)	__tg_simplev(__x, nexttoward, __x, __y)
+*/
+#define	remainder(__x, __y)	__tg_simple2(__x, __y, remainder)
+#define	remquo(__x, __y, __z)	__tg_impl_simple(__x, __x, __y, remquo, remquof,	\
+						 remquol, __x, __y, __z)
+#define	rint(__x)		__tg_simple(__x, rint)
+#define	round(__x)		__tg_simple(__x, round)
+#define	scalbn(__x, __y)	__tg_simplev(__x, scalbn, __x, __y)
+#define	scalbln(__x, __y)	__tg_simplev(__x, scalbln, __x, __y)
+#define	tgamma(__x)		__tg_simple(__x, tgamma)
+#define	trunc(__x)		__tg_simple(__x, trunc)
+
+/* 7.22#6 -- These macros always expand to complex functions. */
+#define	carg(__x)		__tg_simple(__x, carg)
+#define	cimag(__x)		__tg_simple(__x, cimag)
+#define	conj(__x)		__tg_simple(__x, conj)
+#define	cproj(__x)		__tg_simple(__x, cproj)
+#define	creal(__x)		__tg_simple(__x, creal)
+
+#endif /* !_TGMATH_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/time.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/time.h
new file mode 100644
index 00000000..c760297f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/time.h
@@ -0,0 +1,275 @@
+/*
+ * time.h
+ * 
+ * Struct and function declarations for dealing with time.
+ */
+
+#ifndef _TIME_H_
+#define _TIME_H_
+
+#include "_ansi.h"
+#include <sys/reent.h>
+
+#define __need_size_t
+#define __need_NULL
+#include <stddef.h>
+
+/* Get _CLOCKS_PER_SEC_ */
+#include <machine/time.h>
+
+#ifndef _CLOCKS_PER_SEC_
+#define _CLOCKS_PER_SEC_ 1000
+#endif
+
+#define CLOCKS_PER_SEC _CLOCKS_PER_SEC_
+#define CLK_TCK CLOCKS_PER_SEC
+
+#include <sys/types.h>
+
+_BEGIN_STD_C
+
+struct tm
+{
+  int	tm_sec;
+  int	tm_min;
+  int	tm_hour;
+  int	tm_mday;
+  int	tm_mon;
+  int	tm_year;
+  int	tm_wday;
+  int	tm_yday;
+  int	tm_isdst;
+};
+
+clock_t	   _EXFUN(clock,    (void));
+double	   _EXFUN(difftime, (time_t _time2, time_t _time1));
+time_t	   _EXFUN(mktime,   (struct tm *_timeptr));
+time_t	   _EXFUN(time,     (time_t *_timer));
+#ifndef _REENT_ONLY
+char	  *_EXFUN(asctime,  (const struct tm *_tblock));
+char	  *_EXFUN(ctime,    (const time_t *_time));
+struct tm *_EXFUN(gmtime,   (const time_t *_timer));
+struct tm *_EXFUN(localtime,(const time_t *_timer));
+#endif
+size_t	   _EXFUN(strftime, (char *_s, size_t _maxsize, const char *_fmt, const struct tm *_t));
+
+char	  *_EXFUN(asctime_r,	(const struct tm *, char *));
+char	  *_EXFUN(ctime_r,	(const time_t *, char *));
+struct tm *_EXFUN(gmtime_r,	(const time_t *, struct tm *));
+struct tm *_EXFUN(localtime_r,	(const time_t *, struct tm *));
+
+_END_STD_C
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#ifndef __STRICT_ANSI__
+char      *_EXFUN(strptime,     (const char *, const char *, struct tm *));
+_VOID      _EXFUN(tzset,	(_VOID));
+_VOID      _EXFUN(_tzset_r,	(struct _reent *));
+
+typedef struct __tzrule_struct
+{
+  char ch;
+  int m;
+  int n;
+  int d;
+  int s;
+  time_t change;
+  long offset; /* Match type of _timezone. */
+} __tzrule_type;
+
+typedef struct __tzinfo_struct
+{
+  int __tznorth;
+  int __tzyear;
+  __tzrule_type __tzrule[2];
+} __tzinfo_type;
+
+__tzinfo_type *_EXFUN (__gettzinfo, (_VOID));
+
+/* getdate functions */
+
+#ifdef HAVE_GETDATE
+#ifndef _REENT_ONLY
+#define getdate_err (*__getdate_err())
+int *_EXFUN(__getdate_err,(_VOID));
+
+struct tm *	_EXFUN(getdate, (const char *));
+/* getdate_err is set to one of the following values to indicate the error.
+     1  the DATEMSK environment variable is null or undefined,
+     2  the template file cannot be opened for reading,
+     3  failed to get file status information,
+     4  the template file is not a regular file,
+     5  an error is encountered while reading the template file,
+     6  memory allication failed (not enough memory available),
+     7  there is no line in the template that matches the input,
+     8  invalid input specification  */
+#endif /* !_REENT_ONLY */
+
+/* getdate_r returns the error code as above */
+int		_EXFUN(getdate_r, (const char *, struct tm *));
+#endif /* HAVE_GETDATE */
+
+/* defines for the opengroup specifications Derived from Issue 1 of the SVID.  */
+extern __IMPORT long _timezone;
+extern __IMPORT int _daylight;
+extern __IMPORT char *_tzname[2];
+
+/* POSIX defines the external tzname being defined in time.h */
+#ifndef tzname
+#define tzname _tzname
+#endif
+#endif /* !__STRICT_ANSI__ */
+
+#ifdef __cplusplus
+}
+#endif
+
+#include <sys/features.h>
+
+#ifdef __CYGWIN__
+#include <cygwin/time.h>
+#endif /*__CYGWIN__*/
+
+#if defined(_POSIX_TIMERS)
+
+#include <signal.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Clocks, P1003.1b-1993, p. 263 */
+
+int _EXFUN(clock_settime, (clockid_t clock_id, const struct timespec *tp));
+int _EXFUN(clock_gettime, (clockid_t clock_id, struct timespec *tp));
+int _EXFUN(clock_getres,  (clockid_t clock_id, struct timespec *res));
+
+/* Create a Per-Process Timer, P1003.1b-1993, p. 264 */
+
+int _EXFUN(timer_create,
+  (clockid_t clock_id, struct sigevent *evp, timer_t *timerid));
+
+/* Delete a Per_process Timer, P1003.1b-1993, p. 266 */
+
+int _EXFUN(timer_delete, (timer_t timerid));
+
+/* Per-Process Timers, P1003.1b-1993, p. 267 */
+
+int _EXFUN(timer_settime,
+  (timer_t timerid, int flags, const struct itimerspec *value,
+   struct itimerspec *ovalue));
+int _EXFUN(timer_gettime, (timer_t timerid, struct itimerspec *value));
+int _EXFUN(timer_getoverrun, (timer_t timerid));
+
+/* High Resolution Sleep, P1003.1b-1993, p. 269 */
+
+int _EXFUN(nanosleep, (const struct timespec  *rqtp, struct timespec *rmtp));
+
+#ifdef __cplusplus
+}
+#endif
+#endif /* _POSIX_TIMERS */
+
+#if defined(_POSIX_CLOCK_SELECTION)
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+int _EXFUN(clock_nanosleep,
+  (clockid_t clock_id, int flags, const struct timespec *rqtp,
+   struct timespec *rmtp));
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _POSIX_CLOCK_SELECTION */
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* CPU-time Clock Attributes, P1003.4b/D8, p. 54 */
+
+/* values for the clock enable attribute */
+
+#define CLOCK_ENABLED  1  /* clock is enabled, i.e. counting execution time */
+#define CLOCK_DISABLED 0  /* clock is disabled */
+
+/* values for the pthread cputime_clock_allowed attribute */
+
+#define CLOCK_ALLOWED    1 /* If a thread is created with this value a */
+                           /*   CPU-time clock attached to that thread */
+                           /*   shall be accessible. */
+#define CLOCK_DISALLOWED 0 /* If a thread is created with this value, the */
+                           /*   thread shall not have a CPU-time clock */
+                           /*   accessible. */
+
+/* Manifest Constants, P1003.1b-1993, p. 262 */
+
+#define CLOCK_REALTIME (clockid_t)1
+
+/* Flag indicating time is "absolute" with respect to the clock
+   associated with a time.  */
+
+#define TIMER_ABSTIME	4
+
+/* Manifest Constants, P1003.4b/D8, p. 55 */
+
+#if defined(_POSIX_CPUTIME)
+
+/* When used in a clock or timer function call, this is interpreted as
+   the identifier of the CPU_time clock associated with the PROCESS
+   making the function call.  */
+
+#define CLOCK_PROCESS_CPUTIME_ID (clockid_t)2
+
+#endif
+
+#if defined(_POSIX_THREAD_CPUTIME)
+
+/*  When used in a clock or timer function call, this is interpreted as
+    the identifier of the CPU_time clock associated with the THREAD
+    making the function call.  */
+
+#define CLOCK_THREAD_CPUTIME_ID (clockid_t)3
+
+#endif
+
+#if defined(_POSIX_MONOTONIC_CLOCK)
+
+/*  The identifier for the system-wide monotonic clock, which is defined
+ *      as a clock whose value cannot be set via clock_settime() and which 
+ *          cannot have backward clock jumps. */
+
+#define CLOCK_MONOTONIC (clockid_t)4
+
+#endif
+
+#if defined(_POSIX_CPUTIME)
+
+/* Accessing a Process CPU-time CLock, P1003.4b/D8, p. 55 */
+
+int _EXFUN(clock_getcpuclockid, (pid_t pid, clockid_t *clock_id));
+
+#endif /* _POSIX_CPUTIME */
+
+#if defined(_POSIX_CPUTIME) || defined(_POSIX_THREAD_CPUTIME)
+
+/* CPU-time Clock Attribute Access, P1003.4b/D8, p. 56 */
+
+int _EXFUN(clock_setenable_attr, (clockid_t clock_id, int attr));
+int _EXFUN(clock_getenable_attr, (clockid_t clock_id, int *attr));
+
+#endif /* _POSIX_CPUTIME or _POSIX_THREAD_CPUTIME */
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _TIME_H_ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unctrl.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unctrl.h
new file mode 100644
index 00000000..00407523
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unctrl.h
@@ -0,0 +1,46 @@
+/* From curses.h.  */
+/*
+ * Copyright (c) 1981, 1993
+ *	The Regents of the University of California.  All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. All advertising materials mentioning features or use of this software
+ *    must display the following acknowledgement:
+ *	This product includes software developed by the University of
+ *	California, Berkeley and its contributors.
+ * 4. Neither the name of the University nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
+ * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
+ * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
+ * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#ifndef _UNCTRL_H_
+#define _UNCTRL_H_
+
+#include <_ansi.h>
+
+#define unctrl(c)		__unctrl[(c) & 0xff]
+#define unctrllen(ch)		__unctrllen[(ch) & 0xff]
+
+extern __IMPORT _CONST char * _CONST __unctrl[256];	/* Control strings. */
+extern __IMPORT _CONST char __unctrllen[256];	/* Control strings length. */
+
+#endif /* _UNCTRL_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unistd.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unistd.h
new file mode 100644
index 00000000..f9fca847
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/unistd.h
@@ -0,0 +1,6 @@
+#ifndef _UNISTD_H_
+#define _UNISTD_H_
+
+# include <sys/unistd.h>
+
+#endif /* _UNISTD_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utime.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utime.h
new file mode 100644
index 00000000..652891aa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utime.h
@@ -0,0 +1,12 @@
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <_ansi.h>
+
+/* The utime function is defined in libc/sys/<arch>/sys if it exists. */
+#include <sys/utime.h>
+
+#ifdef __cplusplus
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utmp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utmp.h
new file mode 100644
index 00000000..88cf6f85
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/utmp.h
@@ -0,0 +1,8 @@
+#ifdef __cplusplus
+extern "C" {
+#endif
+#include <sys/utmp.h>
+#ifdef __cplusplus
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wchar.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wchar.h
new file mode 100644
index 00000000..f9e62377
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wchar.h
@@ -0,0 +1,192 @@
+#ifndef _WCHAR_H_
+#define _WCHAR_H_
+
+#include <_ansi.h>
+
+#include <sys/reent.h>
+
+#define __need_size_t
+#define __need_wchar_t
+#define __need_wint_t
+#define __need_NULL
+#include <stddef.h>
+
+#define __need___va_list
+#include <stdarg.h>
+
+/* For _mbstate_t definition. */
+#include <sys/_types.h>
+
+/* For __STDC_ISO_10646__ */
+#include <sys/features.h>
+
+#ifndef WEOF
+# define WEOF ((wint_t)-1)
+#endif
+
+#ifndef WCHAR_MIN
+#define WCHAR_MIN 0
+#endif
+
+#ifndef WCHAR_MAX
+#ifdef __WCHAR_MAX__
+#define WCHAR_MAX __WCHAR_MAX__
+#else
+#define WCHAR_MAX 0x7fffffffu
+#endif
+#endif
+
+_BEGIN_STD_C
+
+/* As required by POSIX.1-2008, declare tm as incomplete type.
+   The actual definition is in time.h. */
+struct tm;
+
+#ifndef _MBSTATE_T
+#define _MBSTATE_T
+typedef _mbstate_t mbstate_t;
+#endif /* _MBSTATE_T */
+
+wint_t	_EXFUN(btowc, (int));
+int	_EXFUN(wctob, (wint_t));
+size_t	_EXFUN(mbrlen, (const char * , size_t, mbstate_t *));
+size_t	_EXFUN(mbrtowc, (wchar_t * , const char * , size_t, mbstate_t *));
+size_t	_EXFUN(_mbrtowc_r, (struct _reent *, wchar_t * , const char * , 
+			size_t, mbstate_t *));
+int	_EXFUN(mbsinit, (const mbstate_t *));
+size_t	_EXFUN(mbsnrtowcs, (wchar_t * , const char ** , size_t, size_t,
+			mbstate_t *));
+size_t	_EXFUN(_mbsnrtowcs_r, (struct _reent *, wchar_t * , const char ** ,
+			size_t, size_t, mbstate_t *));
+size_t	_EXFUN(mbsrtowcs, (wchar_t * , const char ** , size_t, mbstate_t *));
+size_t	_EXFUN(_mbsrtowcs_r, (struct _reent *, wchar_t * , const char ** , size_t, mbstate_t *));
+size_t	_EXFUN(wcrtomb, (char * , wchar_t, mbstate_t *));
+size_t	_EXFUN(_wcrtomb_r, (struct _reent *, char * , wchar_t, mbstate_t *));
+size_t	_EXFUN(wcsnrtombs, (char * , const wchar_t ** , size_t, size_t,
+			mbstate_t *));
+size_t	_EXFUN(_wcsnrtombs_r, (struct _reent *, char * , const wchar_t ** , 
+			size_t, size_t, mbstate_t *));
+size_t	_EXFUN(wcsrtombs, (char * , const wchar_t ** , size_t, mbstate_t *));
+size_t	_EXFUN(_wcsrtombs_r, (struct _reent *, char * , const wchar_t ** , 
+			size_t, mbstate_t *));
+int	_EXFUN(wcscasecmp, (const wchar_t *, const wchar_t *));
+wchar_t	*_EXFUN(wcscat, (wchar_t * , const wchar_t *));
+wchar_t	*_EXFUN(wcschr, (const wchar_t *, wchar_t));
+int	_EXFUN(wcscmp, (const wchar_t *, const wchar_t *));
+int	_EXFUN(wcscoll, (const wchar_t *, const wchar_t *));
+wchar_t	*_EXFUN(wcscpy, (wchar_t * , const wchar_t *));
+wchar_t	*_EXFUN(wcpcpy, (wchar_t * , const wchar_t *));
+wchar_t	*_EXFUN(wcsdup, (const wchar_t *));
+wchar_t	*_EXFUN(_wcsdup_r, (struct _reent *, const wchar_t * ));
+size_t	_EXFUN(wcscspn, (const wchar_t *, const wchar_t *));
+size_t  _EXFUN(wcsftime, (wchar_t *, size_t, const wchar_t *, const struct tm *));
+size_t	_EXFUN(wcslcat, (wchar_t *, const wchar_t *, size_t));
+size_t	_EXFUN(wcslcpy, (wchar_t *, const wchar_t *, size_t));
+size_t	_EXFUN(wcslen, (const wchar_t *));
+int	_EXFUN(wcsncasecmp, (const wchar_t *, const wchar_t *, size_t));
+wchar_t	*_EXFUN(wcsncat, (wchar_t * , const wchar_t * , size_t));
+int	_EXFUN(wcsncmp, (const wchar_t *, const wchar_t *, size_t));
+wchar_t	*_EXFUN(wcsncpy, (wchar_t *  , const wchar_t * , size_t));
+wchar_t	*_EXFUN(wcpncpy, (wchar_t *  , const wchar_t * , size_t));
+size_t	_EXFUN(wcsnlen, (const wchar_t *, size_t));
+wchar_t	*_EXFUN(wcspbrk, (const wchar_t *, const wchar_t *));
+wchar_t	*_EXFUN(wcsrchr, (const wchar_t *, wchar_t));
+size_t	_EXFUN(wcsspn, (const wchar_t *, const wchar_t *));
+wchar_t	*_EXFUN(wcsstr, (const wchar_t *, const wchar_t *));
+wchar_t	*_EXFUN(wcstok, (wchar_t *, const wchar_t *, wchar_t **));
+double _EXFUN(wcstod, (const wchar_t *, wchar_t **));
+double _EXFUN(_wcstod_r, (struct _reent *, const wchar_t *, wchar_t **));
+float _EXFUN(wcstof, (const wchar_t *, wchar_t **));
+float _EXFUN(_wcstof_r, (struct _reent *, const wchar_t *, wchar_t **));
+int	_EXFUN(wcswidth, (const wchar_t *, size_t));
+size_t	_EXFUN(wcsxfrm, (wchar_t *, const wchar_t *, size_t));
+int	_EXFUN(wcwidth, (const wchar_t));
+wchar_t	*_EXFUN(wmemchr, (const wchar_t *, wchar_t, size_t));
+int	_EXFUN(wmemcmp, (const wchar_t *, const wchar_t *, size_t));
+wchar_t	*_EXFUN(wmemcpy, (wchar_t * , const wchar_t * , size_t));
+wchar_t	*_EXFUN(wmemmove, (wchar_t *, const wchar_t *, size_t));
+wchar_t	*_EXFUN(wmemset, (wchar_t *, wchar_t, size_t));
+
+long    _EXFUN(wcstol, (const wchar_t *, wchar_t **, int));
+long long _EXFUN(wcstoll, (const wchar_t *, wchar_t **, int));
+unsigned long _EXFUN(wcstoul, (const wchar_t *, wchar_t **, int));
+unsigned long long _EXFUN(wcstoull, (const wchar_t *, wchar_t **, int));
+long    _EXFUN(_wcstol_r, (struct _reent *, const wchar_t *, wchar_t **, int));
+long long _EXFUN(_wcstoll_r, (struct _reent *, const wchar_t *, wchar_t **, int));
+unsigned long _EXFUN(_wcstoul_r, (struct _reent *, const wchar_t *, wchar_t **, int));
+unsigned long long _EXFUN(_wcstoull_r, (struct _reent *, const wchar_t *, wchar_t **, int));
+
+wint_t _EXFUN(fgetwc, (__FILE *));
+wchar_t *_EXFUN(fgetws, (wchar_t *, int, __FILE *));
+wint_t _EXFUN(fputwc, (wchar_t, __FILE *));
+int _EXFUN(fputws, (const wchar_t *, __FILE *));
+int _EXFUN (fwide, (__FILE *, int));
+wint_t _EXFUN (getwc, (__FILE *));
+wint_t _EXFUN (getwchar, (void));
+wint_t _EXFUN(putwc, (wchar_t, __FILE *));
+wint_t _EXFUN(putwchar, (wchar_t));
+wint_t _EXFUN (ungetwc, (wint_t wc, __FILE *));
+
+wint_t _EXFUN(_fgetwc_r, (struct _reent *, __FILE *));
+wchar_t *_EXFUN(_fgetws_r, (struct _reent *, wchar_t *, int, __FILE *));
+wint_t _EXFUN(_fputwc_r, (struct _reent *, wchar_t, __FILE *));
+int _EXFUN(_fputws_r, (struct _reent *, const wchar_t *, __FILE *));
+int _EXFUN (_fwide_r, (struct _reent *, __FILE *, int));
+wint_t _EXFUN (_getwc_r, (struct _reent *, __FILE *));
+wint_t _EXFUN (_getwchar_r, (struct _reent *ptr));
+wint_t _EXFUN(_putwc_r, (struct _reent *, wchar_t, __FILE *));
+wint_t _EXFUN(_putwchar_r, (struct _reent *, wchar_t));
+wint_t _EXFUN (_ungetwc_r, (struct _reent *, wint_t wc, __FILE *));
+
+__FILE *_EXFUN (open_wmemstream, (wchar_t **, size_t *));
+__FILE *_EXFUN (_open_wmemstream_r, (struct _reent *, wchar_t **, size_t *));
+
+#ifndef __VALIST
+#ifdef __GNUC__
+#define __VALIST __gnuc_va_list
+#else
+#define __VALIST char*
+#endif
+#endif
+
+int	_EXFUN(fwprintf, (__FILE *, const wchar_t *, ...));
+int	_EXFUN(swprintf, (wchar_t *, size_t, const wchar_t *, ...));
+int	_EXFUN(vfwprintf, (__FILE *, const wchar_t *, __VALIST));
+int	_EXFUN(vswprintf, (wchar_t *, size_t, const wchar_t *, __VALIST));
+int	_EXFUN(vwprintf, (const wchar_t *, __VALIST));
+int	_EXFUN(wprintf, (const wchar_t *, ...));
+
+int	_EXFUN(_fwprintf_r, (struct _reent *, __FILE *, const wchar_t *, ...));
+int	_EXFUN(_swprintf_r, (struct _reent *, wchar_t *, size_t, const wchar_t *, ...));
+int	_EXFUN(_vfwprintf_r, (struct _reent *, __FILE *, const wchar_t *, __VALIST));
+int	_EXFUN(_vswprintf_r, (struct _reent *, wchar_t *, size_t, const wchar_t *, __VALIST));
+int	_EXFUN(_vwprintf_r, (struct _reent *, const wchar_t *, __VALIST));
+int	_EXFUN(_wprintf_r, (struct _reent *, const wchar_t *, ...));
+
+int	_EXFUN(fwscanf, (__FILE *, const wchar_t *, ...));
+int	_EXFUN(swscanf, (const wchar_t *, const wchar_t *, ...));
+int	_EXFUN(vfwscanf, (__FILE *, const wchar_t *, __VALIST));
+int	_EXFUN(vswscanf, (const wchar_t *, const wchar_t *, __VALIST));
+int	_EXFUN(vwscanf, (const wchar_t *, __VALIST));
+int	_EXFUN(wscanf, (const wchar_t *, ...));
+
+int	_EXFUN(_fwscanf_r, (struct _reent *, __FILE *, const wchar_t *, ...));
+int	_EXFUN(_swscanf_r, (struct _reent *, const wchar_t *, const wchar_t *, ...));
+int	_EXFUN(_vfwscanf_r, (struct _reent *, __FILE *, const wchar_t *, __VALIST));
+int	_EXFUN(_vswscanf_r, (struct _reent *, const wchar_t *, const wchar_t *, __VALIST));
+int	_EXFUN(_vwscanf_r, (struct _reent *, const wchar_t *, __VALIST));
+int	_EXFUN(_wscanf_r, (struct _reent *, const wchar_t *, ...));
+
+#define getwc(fp)	fgetwc(fp)
+#define putwc(wc,fp)	fputwc((wc), (fp))
+#ifndef _REENT_ONLY
+#define getwchar()	fgetwc(_REENT->_stdin)
+#define putwchar(wc)	fputwc((wc), _REENT->_stdout)
+#else
+#define getwchar()	fgetwc(_impure_ptr->_stdin)
+#define putwchar(wc)	fputwc((wc), _impure_ptr->_stdout)
+#endif
+
+_END_STD_C
+
+#endif /* _WCHAR_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wctype.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wctype.h
new file mode 100644
index 00000000..c72c9dec
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wctype.h
@@ -0,0 +1,47 @@
+#ifndef _WCTYPE_H_
+#define _WCTYPE_H_
+
+#include <_ansi.h>
+#include <sys/_types.h>
+
+#define __need_wint_t
+#include <stddef.h>
+
+#ifndef WEOF
+# define WEOF ((wint_t)-1)
+#endif
+
+_BEGIN_STD_C
+
+#ifndef _WCTYPE_T
+#define _WCTYPE_T
+typedef int wctype_t;
+#endif
+
+#ifndef _WCTRANS_T
+#define _WCTRANS_T
+typedef int wctrans_t;
+#endif
+
+int	_EXFUN(iswalpha, (wint_t));
+int	_EXFUN(iswalnum, (wint_t));
+int	_EXFUN(iswblank, (wint_t));
+int	_EXFUN(iswcntrl, (wint_t));
+int	_EXFUN(iswctype, (wint_t, wctype_t));
+int	_EXFUN(iswdigit, (wint_t));
+int	_EXFUN(iswgraph, (wint_t));
+int	_EXFUN(iswlower, (wint_t));
+int	_EXFUN(iswprint, (wint_t));
+int	_EXFUN(iswpunct, (wint_t));
+int	_EXFUN(iswspace, (wint_t));
+int	_EXFUN(iswupper, (wint_t));
+int	_EXFUN(iswxdigit, (wint_t));
+wint_t	_EXFUN(towctrans, (wint_t, wctrans_t));
+wint_t	_EXFUN(towupper, (wint_t));
+wint_t	_EXFUN(towlower, (wint_t));
+wctrans_t _EXFUN(wctrans, (const char *));
+wctype_t _EXFUN(wctype, (const char *));
+
+_END_STD_C
+
+#endif /* _WCTYPE_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wordexp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wordexp.h
new file mode 100644
index 00000000..8f87681a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/include/wordexp.h
@@ -0,0 +1,53 @@
+/* Copyright (C) 2002, 2010 by  Red Hat, Incorporated. All rights reserved.
+ *
+ * Permission to use, copy, modify, and distribute this software
+ * is freely granted, provided that this notice is preserved.
+ */
+
+#ifndef _WORDEXP_H_
+#define _WORDEXP_H_
+
+#include <sys/types.h>
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+struct _wordexp_t
+{
+  size_t we_wordc;	/* Count of words matched by words. */
+  char **we_wordv;	/* Pointer to list of expanded words. */
+  size_t we_offs;	/* Slots to reserve at the beginning of we_wordv. */
+};
+
+typedef struct _wordexp_t wordexp_t;
+
+#define	WRDE_DOOFFS	0x0001	/* Use we_offs. */
+#define	WRDE_APPEND	0x0002	/* Append to output from previous call. */
+#define	WRDE_NOCMD	0x0004	/* Don't perform command substitution. */
+#define	WRDE_REUSE	0x0008	/* pwordexp points to a wordexp_t struct returned from
+                                   a previous successful call to wordexp. */
+#define	WRDE_SHOWERR	0x0010	/* Print error messages to stderr. */
+#define	WRDE_UNDEF	0x0020	/* Report attempt to expand undefined shell variable. */
+
+enum {
+  WRDE_SUCCESS,
+  WRDE_NOSPACE,
+  WRDE_BADCHAR,
+  WRDE_BADVAL,
+  WRDE_CMDSUB,
+  WRDE_SYNTAX,
+  WRDE_NOSYS
+};
+
+/* Note: This implementation of wordexp requires a version of bash
+   that supports the --wordexp and --protected arguments to be present
+   on the system.  It does not support the WRDE_UNDEF flag. */
+int wordexp(const char *, wordexp_t *, int);
+void wordfree(wordexp_t *);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _WORDEXP_H_  */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.x b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.x
new file mode 100644
index 00000000..daf5d5fa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.x
@@ -0,0 +1,227 @@
+/* Default linker script, for normal executables */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
+SECTIONS
+{
+  /* Read-only sections, merged into text segment: */
+  PROVIDE (__executable_start = SEGMENT_START("text-segment", 0x8000)); . = SEGMENT_START("text-segment", 0x8000);
+  .interp         : { *(.interp) }
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xbn b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xbn
new file mode 100644
index 00000000..3a8ba6a2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xbn
@@ -0,0 +1,227 @@
+/* Script for -N: mix text and data on same page; don't align data */
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+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
+SECTIONS
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xc b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xc
new file mode 100644
index 00000000..ab29785a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xc
@@ -0,0 +1,230 @@
+/* Script for -z combreloc: combine and sort reloc sections */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
+SECTIONS
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xn b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xn
new file mode 100644
index 00000000..151f1f89
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xn
@@ -0,0 +1,227 @@
+/* Script for -n: mix text and data on same page */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xr b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xr
new file mode 100644
index 00000000..a673a6a6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xr
@@ -0,0 +1,167 @@
+/* Script for ld -r: link without relocation */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ /* For some reason, the Solaris linker makes bad executables
+  if gld -r is used and the intermediate file has sections starting
+  at non-zero addresses.  Could be a Solaris ld bug, could be a GNU ld
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xs b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xs
new file mode 100644
index 00000000..80094fb6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xs
@@ -0,0 +1,216 @@
+/* Script for ld --shared: link shared library */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
+SECTIONS
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsc b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsc
new file mode 100644
index 00000000..6515dec1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsc
@@ -0,0 +1,215 @@
+/* Script for --shared -z combreloc: shared library, combine & sort relocs */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
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+ENTRY(_start)
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsw b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsw
new file mode 100644
index 00000000..9df04fb7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xsw
@@ -0,0 +1,215 @@
+/* Script for --shared -z combreloc -z now -z relro: shared library, combine & sort relocs */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xu b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xu
new file mode 100644
index 00000000..5b0a05f4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xu
@@ -0,0 +1,168 @@
+/* Script for ld -Ur: link w/out relocation, do create constructors */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ /* For some reason, the Solaris linker makes bad executables
+  if gld -r is used and the intermediate file has sections starting
+  at non-zero addresses.  Could be a Solaris ld bug, could be a GNU ld
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xw b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xw
new file mode 100644
index 00000000..6d9ba3d9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/ldscripts/tc32elf.xw
@@ -0,0 +1,230 @@
+/* Script for -z combreloc -z now -z relro: combine and sort reloc sections */
+OUTPUT_FORMAT("elf32-littletc32", "elf32-bigtc32",
+	      "elf32-littletc32")
+OUTPUT_ARCH(tc32)
+ENTRY(_start)
+SEARCH_DIR("/opt/tc32/tc32-elf/lib");
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+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libc.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libc.a
new file mode 100644
index 00000000..c4d58430
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libg.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libg.a
new file mode 100644
index 00000000..c4d58430
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libg.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libm.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libm.a
new file mode 100644
index 00000000..882bc735
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libm.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libnosys.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libnosys.a
new file mode 100644
index 00000000..ef2bcaa5
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tc32_windows/tc32-elf/lib/libnosys.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/LICENSE.txt b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/LICENSE.txt
new file mode 100644
index 00000000..261eeb9e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/LICENSE.txt
@@ -0,0 +1,201 @@
+                                 Apache License
+                           Version 2.0, January 2004
+                        http://www.apache.org/licenses/
+
+   TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
+
+   1. Definitions.
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.cproject b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.cproject
new file mode 100644
index 00000000..e1a96510
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.cproject
@@ -0,0 +1,571 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656" moduleId="org.eclipse.cdt.core.settings" name="sampleGW_B91">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.andestech.ide.cdt.managedbuilder.core.CROSS_GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ConfigName}" buildArtefactType="nds.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=nds.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Coordinator-B91" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656" name="sampleGW_B91" parent="config.nds32le-elf-mculib-v5f.exe.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} riscv" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/b91/boot_b91.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656." name="/" resourcePath="">
+						<toolChain id="nds.nds32le-elf-mculib-v5f.exe.debug.1270090205" name="nds32le-elf-mculib-v5f" superClass="nds.nds32le-elf-mculib-v5f.exe.debug">
+							<option id="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT.912023043" name="RSE_CONNECT" superClass="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT" value="ICE" valueType="string"/>
+							<targetPlatform id="target.nds32le-elf-mculib-v5f.platform.exe.debug.1111969795" name="Debug Platform" superClass="target.nds32le-elf-mculib-v5f.platform.exe.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk}/Debug" command="make" id="target.nds32le-elf-mculib-v5f.builder.exe.debug.591345580" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Andes Make Builder" superClass="target.nds32le-elf-mculib-v5f.builder.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.archiver.base.761163866" name="Andes Archiver" superClass="tool.nds32le-elf-mculib-v5f.archiver.base"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.118532926" name="Andes C++ Compiler" superClass="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level.515326349" name="Debug Level" superClass="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level" value="nds.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug.1153729612" name="Andes C++ Linker" superClass="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.cpp.link.option.optimization.level.1086826489" name="Optimization Level" superClass="nds.cpp.link.option.optimization.level" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base.1308078128" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.633437445" name="Andes C Compiler" superClass="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level.1929234811" name="Debug Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level" value="nds.c.debugging.level.none" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.preprocessor.def.symbols.2016841467" name="Defined symbols (-D)" superClass="nds.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_B91=1"/>
+									<listOptionValue builtIn="false" value="COORDINATOR=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_GW__=1"/>
+								</option>
+								<option id="nds.c.compiler.option.include.paths.946607393" name="Include paths (-I)" superClass="nds.c.compiler.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
+									<listOptionValue builtIn="false" value="../../../platform/chip_b91"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level.2067599733" name="Optimization Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level" value="nds.c.optimization.level.more" valueType="enumerated"/>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel.1453714703" name="Code Model" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel" value="nds.c.compiler.option.cmodel.small" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.optimization.flags.1250304633" name="Other optimization flags" superClass="nds.c.compiler.option.optimization.flags" value="-fpack-struct -fshort-enums" valueType="string"/>
+								<option id="nds.c.compiler.option.optimization.lto.382231732" name="Link Time Optimization (-flto)" superClass="nds.c.compiler.option.optimization.lto" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.function.1891961724" name="Remove unused function sections (-ffunction-sections)" superClass="nds.c.compiler.option.optimization.removesections.function" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.data.1288801387" name="Remove unused data sections (-fdata-sections)" superClass="nds.c.compiler.option.optimization.removesections.data" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.misc.other.2062108456" name="Other flags" superClass="nds.c.compiler.option.misc.other" value="-mext-dsp -mabi=ilp32f  -c -fmessage-length=0  -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd -Wno-nonnull-compare" valueType="string"/>
+								<inputType id="tool.nds.c.compiler.input.1079736600" superClass="tool.nds.c.compiler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug.546710837" name="Andes C Linker" superClass="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.c.link.option.optimization.level.1635531997" name="Optimization Level" superClass="nds.c.link.option.optimization.level" value="-O2" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.c.link.option.noshared.base.1658399565" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.c.link.option.noshared.base" valueType="boolean"/>
+								<option id="nds.c.link.option.LTO.757065500" name="Link Time Optimization (-flto)" superClass="nds.c.link.option.LTO" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.other.duplacitecompiler.537108630" name="DuplaciteComplierOption" superClass="nds.c.link.option.other.duplacitecompiler" value="-mcmodel=small -fpack-struct -fshort-enums -mcpu=d25f -ffunction-sections -fdata-sections -mext-dsp -mabi=ilp32f -fmessage-length=0 -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd " valueType="string"/>
+								<option id="nds.c.link.option.removesections.1326500183" name="Remove unused sections (-ffunction-sections or -fdata-sections)" superClass="nds.c.link.option.removesections" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.nostart.1264937083" name="Do not use standard start files (-nostartfiles)" superClass="nds.c.link.option.nostart" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.virtualhosting.80347739" name="Virtual Hosting (-mvh)" superClass="nds.c.link.option.virtualhosting" value="false" valueType="boolean"/>
+								<option id="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript.996307445" name="Linker Script (-T)" superClass="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript" value="../boot.link" valueType="string"/>
+								<option id="nds.c.link.option.libs.632974500" name="Libraries (-l)" superClass="nds.c.link.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_coordinator"/>
+									<listOptionValue builtIn="false" value="drivers_b91"/>
+									<listOptionValue builtIn="false" value="firmware_encrypt"/>
+								</option>
+								<option id="nds.c.link.option.paths.1871803579" name="Library search path (-L)" superClass="nds.c.link.option.paths" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+								</option>
+								<inputType id="tool.nds.c.linker.input.308015435" superClass="tool.nds.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.assembler.exe.debug.1035668633" name="Andes Assembler" superClass="tool.nds32le-elf-mculib-v5f.assembler.exe.debug">
+								<option defaultValue="-g" id="nds.both.asm.option.flags.1933261912" name="Assembler flags" superClass="nds.both.asm.option.flags" valueType="string"/>
+								<inputType id="tool.nds.assembler.input.2129982487" superClass="tool.nds.assembler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.nm.exe.debug.2112095836" name="NM (symbol listing)" superClass="tool.nds32le-elf-mculib-v5f.nm.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.readelf.exe.debug.1193076061" name="Readelf (ELF info listing)" superClass="tool.nds32le-elf-mculib-v5f.readelf.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.objdump.exe.debug.329655518" name="Objdump (disassembly)" superClass="tool.nds32le-elf-mculib-v5f.objdump.exe.debug">
+								<option id="nds.objdump.option.disable.807425574" name="Disable. (Do not auto-generate output file.)" superClass="nds.objdump.option.disable" value="false" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug.212459378" name="Objcopy (object content copy)" superClass="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug">
+								<option id="nds.objcopy.option.disable.1837417364" name="Disable. (Do not auto-generate output file.)" superClass="nds.objcopy.option.disable" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.size.exe.debug.1256240850" name="Size (section size listing)" superClass="tool.nds32le-elf-mculib-v5f.size.exe.debug"/>
+							<tool command="$(ANDESIGHT_ROOT)/utils/nds_ldsag --version=v5" id="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug.1895132418" name="LdSaG Tool" superClass="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug">
+								<option id="nds.ldsag.option.enablement.1205851783" name="Generate linker script" superClass="nds.ldsag.option.enablement" value="false" valueType="boolean"/>
+								<option defaultValue="$(ANDESIGHT_ROOT)/utils/nds32_template_v5.txt" id="nds.ldsag.option.sagtemplate.1263131164" name="Linker script template" superClass="nds.ldsag.option.sagtemplate" value="../boot.link" valueType="string"/>
+								<option id="nds.ldsag.option.sagscript.1269310708" name="SaG file" superClass="nds.ldsag.option.sagscript" value="../ae350-xip.sag" valueType="string"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleContactSensor|apps/sampleLight" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901" moduleId="org.eclipse.cdt.core.settings" name="sampleLight_B91">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.andestech.ide.cdt.managedbuilder.core.CROSS_GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ConfigName}" buildArtefactType="nds.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=nds.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Router-B91" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901" name="sampleLight_B91" parent="config.nds32le-elf-mculib-v5f.exe.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} riscv" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/b91/boot_b91.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901." name="/" resourcePath="">
+						<toolChain id="nds.nds32le-elf-mculib-v5f.exe.debug.86440310" name="nds32le-elf-mculib-v5f" superClass="nds.nds32le-elf-mculib-v5f.exe.debug">
+							<option id="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT.433032476" name="RSE_CONNECT" superClass="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT" value="ICE" valueType="string"/>
+							<targetPlatform id="target.nds32le-elf-mculib-v5f.platform.exe.debug.463770837" name="Debug Platform" superClass="target.nds32le-elf-mculib-v5f.platform.exe.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk}/Debug" command="make" id="target.nds32le-elf-mculib-v5f.builder.exe.debug.549602106" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Andes Make Builder" superClass="target.nds32le-elf-mculib-v5f.builder.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.archiver.base.2013326346" name="Andes Archiver" superClass="tool.nds32le-elf-mculib-v5f.archiver.base"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.1861374147" name="Andes C++ Compiler" superClass="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level.2082397276" name="Debug Level" superClass="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level" value="nds.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug.800548239" name="Andes C++ Linker" superClass="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.cpp.link.option.optimization.level.1222105098" name="Optimization Level" superClass="nds.cpp.link.option.optimization.level" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base.1064539252" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.1639347297" name="Andes C Compiler" superClass="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level.2106833000" name="Debug Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level" value="nds.c.debugging.level.none" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.preprocessor.def.symbols.1390557412" name="Defined symbols (-D)" superClass="nds.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_B91=1"/>
+									<listOptionValue builtIn="false" value="ROUTER=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_DIMMABLE_LIGHT__=1"/>
+								</option>
+								<option id="nds.c.compiler.option.include.paths.1700090136" name="Include paths (-I)" superClass="nds.c.compiler.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleLight"/>
+									<listOptionValue builtIn="false" value="../../../platform/chip_b91"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level.56788722" name="Optimization Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level" value="nds.c.optimization.level.more" valueType="enumerated"/>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel.1101992061" name="Code Model" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel" value="nds.c.compiler.option.cmodel.small" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.optimization.flags.302422649" name="Other optimization flags" superClass="nds.c.compiler.option.optimization.flags" value="-fpack-struct -fshort-enums" valueType="string"/>
+								<option id="nds.c.compiler.option.optimization.lto.128010122" name="Link Time Optimization (-flto)" superClass="nds.c.compiler.option.optimization.lto" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.function.1128918007" name="Remove unused function sections (-ffunction-sections)" superClass="nds.c.compiler.option.optimization.removesections.function" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.data.923078977" name="Remove unused data sections (-fdata-sections)" superClass="nds.c.compiler.option.optimization.removesections.data" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.misc.other.1706813832" name="Other flags" superClass="nds.c.compiler.option.misc.other" value="-mext-dsp -mabi=ilp32f  -c -fmessage-length=0  -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd -Wno-nonnull-compare" valueType="string"/>
+								<inputType id="tool.nds.c.compiler.input.2069706382" superClass="tool.nds.c.compiler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug.54369875" name="Andes C Linker" superClass="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.c.link.option.optimization.level.9682347" name="Optimization Level" superClass="nds.c.link.option.optimization.level" value="-O2" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.c.link.option.noshared.base.467998398" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.c.link.option.noshared.base" valueType="boolean"/>
+								<option id="nds.c.link.option.LTO.1273959859" name="Link Time Optimization (-flto)" superClass="nds.c.link.option.LTO" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.other.duplacitecompiler.800774057" name="DuplaciteComplierOption" superClass="nds.c.link.option.other.duplacitecompiler" value="-mcmodel=small -fpack-struct -fshort-enums -mcpu=d25f -ffunction-sections -fdata-sections -mext-dsp -mabi=ilp32f -fmessage-length=0 -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd " valueType="string"/>
+								<option id="nds.c.link.option.removesections.1647383254" name="Remove unused sections (-ffunction-sections or -fdata-sections)" superClass="nds.c.link.option.removesections" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.nostart.980865098" name="Do not use standard start files (-nostartfiles)" superClass="nds.c.link.option.nostart" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.virtualhosting.1600427358" name="Virtual Hosting (-mvh)" superClass="nds.c.link.option.virtualhosting" value="false" valueType="boolean"/>
+								<option id="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript.215948426" name="Linker Script (-T)" superClass="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript" value="../boot.link" valueType="string"/>
+								<option id="nds.c.link.option.libs.1642737752" name="Libraries (-l)" superClass="nds.c.link.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_router"/>
+									<listOptionValue builtIn="false" value="drivers_b91"/>
+								</option>
+								<option id="nds.c.link.option.paths.1789920002" name="Library search path (-L)" superClass="nds.c.link.option.paths" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="tool.nds.c.linker.input.240298268" superClass="tool.nds.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.assembler.exe.debug.2105802559" name="Andes Assembler" superClass="tool.nds32le-elf-mculib-v5f.assembler.exe.debug">
+								<option defaultValue="-g" id="nds.both.asm.option.flags.2095109534" name="Assembler flags" superClass="nds.both.asm.option.flags" valueType="string"/>
+								<inputType id="tool.nds.assembler.input.1426708779" superClass="tool.nds.assembler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.nm.exe.debug.981686520" name="NM (symbol listing)" superClass="tool.nds32le-elf-mculib-v5f.nm.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.readelf.exe.debug.1366524807" name="Readelf (ELF info listing)" superClass="tool.nds32le-elf-mculib-v5f.readelf.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.objdump.exe.debug.656695708" name="Objdump (disassembly)" superClass="tool.nds32le-elf-mculib-v5f.objdump.exe.debug">
+								<option id="nds.objdump.option.disable.1561634033" name="Disable. (Do not auto-generate output file.)" superClass="nds.objdump.option.disable" value="false" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug.1842488126" name="Objcopy (object content copy)" superClass="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug">
+								<option id="nds.objcopy.option.disable.1834402277" name="Disable. (Do not auto-generate output file.)" superClass="nds.objcopy.option.disable" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.size.exe.debug.895745213" name="Size (section size listing)" superClass="tool.nds32le-elf-mculib-v5f.size.exe.debug"/>
+							<tool command="$(ANDESIGHT_ROOT)/utils/nds_ldsag --version=v5" id="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug.1776584979" name="LdSaG Tool" superClass="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug">
+								<option id="nds.ldsag.option.enablement.1959354434" name="Generate linker script" superClass="nds.ldsag.option.enablement" value="false" valueType="boolean"/>
+								<option defaultValue="$(ANDESIGHT_ROOT)/utils/nds32_template_v5.txt" id="nds.ldsag.option.sagtemplate.2132339298" name="Linker script template" superClass="nds.ldsag.option.sagtemplate" value="../boot.link" valueType="string"/>
+								<option id="nds.ldsag.option.sagscript.478666733" name="SaG file" superClass="nds.ldsag.option.sagscript" value="../ae350-xip.sag" valueType="string"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleContactSensor|apps/sampleGW" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978" moduleId="org.eclipse.cdt.core.settings" name="sampleSwitch_B91">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.andestech.ide.cdt.managedbuilder.core.CROSS_GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ConfigName}" buildArtefactType="nds.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=nds.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-B91" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978" name="sampleSwitch_B91" parent="config.nds32le-elf-mculib-v5f.exe.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} riscv" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/b91/boot_b91.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978." name="/" resourcePath="">
+						<toolChain id="nds.nds32le-elf-mculib-v5f.exe.debug.1275043522" name="nds32le-elf-mculib-v5f" superClass="nds.nds32le-elf-mculib-v5f.exe.debug">
+							<option id="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT.1349540757" name="RSE_CONNECT" superClass="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT" value="ICE" valueType="string"/>
+							<targetPlatform id="target.nds32le-elf-mculib-v5f.platform.exe.debug.360742506" name="Debug Platform" superClass="target.nds32le-elf-mculib-v5f.platform.exe.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk}/Debug" command="make" id="target.nds32le-elf-mculib-v5f.builder.exe.debug.2108087167" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Andes Make Builder" superClass="target.nds32le-elf-mculib-v5f.builder.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.archiver.base.378279389" name="Andes Archiver" superClass="tool.nds32le-elf-mculib-v5f.archiver.base"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.639692575" name="Andes C++ Compiler" superClass="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level.902801098" name="Debug Level" superClass="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level" value="nds.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug.2108264063" name="Andes C++ Linker" superClass="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.cpp.link.option.optimization.level.307334122" name="Optimization Level" superClass="nds.cpp.link.option.optimization.level" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base.1188252618" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.1901389369" name="Andes C Compiler" superClass="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level.1373391010" name="Debug Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level" value="nds.c.debugging.level.none" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.preprocessor.def.symbols.1294361554" name="Defined symbols (-D)" superClass="nds.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_B91=1"/>
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_SWITCH__=1"/>
+								</option>
+								<option id="nds.c.compiler.option.include.paths.1722023727" name="Include paths (-I)" superClass="nds.c.compiler.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleSwitch"/>
+									<listOptionValue builtIn="false" value="../../../platform/chip_b91"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level.1112538373" name="Optimization Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level" value="nds.c.optimization.level.more" valueType="enumerated"/>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel.1742649364" name="Code Model" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel" value="nds.c.compiler.option.cmodel.small" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.optimization.flags.603341438" name="Other optimization flags" superClass="nds.c.compiler.option.optimization.flags" value="-fpack-struct -fshort-enums" valueType="string"/>
+								<option id="nds.c.compiler.option.optimization.lto.12803037" name="Link Time Optimization (-flto)" superClass="nds.c.compiler.option.optimization.lto" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.function.1110513994" name="Remove unused function sections (-ffunction-sections)" superClass="nds.c.compiler.option.optimization.removesections.function" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.data.801244866" name="Remove unused data sections (-fdata-sections)" superClass="nds.c.compiler.option.optimization.removesections.data" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.misc.other.1594263673" name="Other flags" superClass="nds.c.compiler.option.misc.other" value="-mext-dsp -mabi=ilp32f  -c -fmessage-length=0  -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd -Wno-nonnull-compare" valueType="string"/>
+								<inputType id="tool.nds.c.compiler.input.494877746" superClass="tool.nds.c.compiler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug.2067338415" name="Andes C Linker" superClass="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.c.link.option.optimization.level.833104941" name="Optimization Level" superClass="nds.c.link.option.optimization.level" value="-O2" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.c.link.option.noshared.base.1613348397" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.c.link.option.noshared.base" valueType="boolean"/>
+								<option id="nds.c.link.option.LTO.569302985" name="Link Time Optimization (-flto)" superClass="nds.c.link.option.LTO" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.other.duplacitecompiler.271100090" name="DuplaciteComplierOption" superClass="nds.c.link.option.other.duplacitecompiler" value="-mcmodel=small -fpack-struct -fshort-enums -mcpu=d25f -ffunction-sections -fdata-sections -mext-dsp -mabi=ilp32f -fmessage-length=0 -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd " valueType="string"/>
+								<option id="nds.c.link.option.removesections.2123546822" name="Remove unused sections (-ffunction-sections or -fdata-sections)" superClass="nds.c.link.option.removesections" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.nostart.30232504" name="Do not use standard start files (-nostartfiles)" superClass="nds.c.link.option.nostart" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.virtualhosting.1672042227" name="Virtual Hosting (-mvh)" superClass="nds.c.link.option.virtualhosting" value="false" valueType="boolean"/>
+								<option id="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript.2332669" name="Linker Script (-T)" superClass="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript" value="../boot.link" valueType="string"/>
+								<option id="nds.c.link.option.libs.723297466" name="Libraries (-l)" superClass="nds.c.link.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_b91"/>
+								</option>
+								<option id="nds.c.link.option.paths.1878535262" name="Library search path (-L)" superClass="nds.c.link.option.paths" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="tool.nds.c.linker.input.1911744766" superClass="tool.nds.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.assembler.exe.debug.2047632886" name="Andes Assembler" superClass="tool.nds32le-elf-mculib-v5f.assembler.exe.debug">
+								<option defaultValue="-g" id="nds.both.asm.option.flags.1752068676" name="Assembler flags" superClass="nds.both.asm.option.flags" valueType="string"/>
+								<inputType id="tool.nds.assembler.input.1106865061" superClass="tool.nds.assembler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.nm.exe.debug.1263736916" name="NM (symbol listing)" superClass="tool.nds32le-elf-mculib-v5f.nm.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.readelf.exe.debug.432008687" name="Readelf (ELF info listing)" superClass="tool.nds32le-elf-mculib-v5f.readelf.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.objdump.exe.debug.1879700784" name="Objdump (disassembly)" superClass="tool.nds32le-elf-mculib-v5f.objdump.exe.debug">
+								<option id="nds.objdump.option.disable.481326214" name="Disable. (Do not auto-generate output file.)" superClass="nds.objdump.option.disable" value="false" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug.1711311211" name="Objcopy (object content copy)" superClass="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug">
+								<option id="nds.objcopy.option.disable.1904611345" name="Disable. (Do not auto-generate output file.)" superClass="nds.objcopy.option.disable" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.size.exe.debug.1125944001" name="Size (section size listing)" superClass="tool.nds32le-elf-mculib-v5f.size.exe.debug"/>
+							<tool command="$(ANDESIGHT_ROOT)/utils/nds_ldsag --version=v5" id="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug.1879905554" name="LdSaG Tool" superClass="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug">
+								<option id="nds.ldsag.option.enablement.1715169670" name="Generate linker script" superClass="nds.ldsag.option.enablement" value="false" valueType="boolean"/>
+								<option defaultValue="$(ANDESIGHT_ROOT)/utils/nds32_template_v5.txt" id="nds.ldsag.option.sagtemplate.1023988526" name="Linker script template" superClass="nds.ldsag.option.sagtemplate" value="../boot.link" valueType="string"/>
+								<option id="nds.ldsag.option.sagscript.10378153" name="SaG file" superClass="nds.ldsag.option.sagscript" value="../ae350-xip.sag" valueType="string"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleContactSensor|apps/sampleGW|apps/sampleLight" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978.562516558">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978.562516558" moduleId="org.eclipse.cdt.core.settings" name="sampleContactSensor_B91">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.andestech.ide.cdt.managedbuilder.core.CROSS_GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ConfigName}" buildArtefactType="nds.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=nds.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-B91" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978.562516558" name="sampleContactSensor_B91" parent="config.nds32le-elf-mculib-v5f.exe.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} riscv" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/b91/boot_b91.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978.562516558." name="/" resourcePath="">
+						<toolChain id="nds.nds32le-elf-mculib-v5f.exe.debug.277959316" name="nds32le-elf-mculib-v5f" superClass="nds.nds32le-elf-mculib-v5f.exe.debug">
+							<option id="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT.1513755499" name="RSE_CONNECT" superClass="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT" value="ICE" valueType="string"/>
+							<targetPlatform id="target.nds32le-elf-mculib-v5f.platform.exe.debug.41842286" name="Debug Platform" superClass="target.nds32le-elf-mculib-v5f.platform.exe.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk}/Debug" command="make" id="target.nds32le-elf-mculib-v5f.builder.exe.debug.1981942419" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Andes Make Builder" superClass="target.nds32le-elf-mculib-v5f.builder.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.archiver.base.1920559929" name="Andes Archiver" superClass="tool.nds32le-elf-mculib-v5f.archiver.base"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.194708865" name="Andes C++ Compiler" superClass="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level.345539696" name="Debug Level" superClass="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level" value="nds.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug.1797037046" name="Andes C++ Linker" superClass="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.cpp.link.option.optimization.level.989575790" name="Optimization Level" superClass="nds.cpp.link.option.optimization.level" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base.335125107" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base" valueType="boolean"/>
+							</tool>
+							<tool command="$(CROSS_COMPILE)gcc" id="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.187462140" name="Andes C Compiler" superClass="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level.1572760519" name="Debug Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level" value="nds.c.debugging.level.none" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.preprocessor.def.symbols.949034737" name="Defined symbols (-D)" superClass="nds.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_B91=1"/>
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_CONTACT_SENSOR__=1"/>
+								</option>
+								<option id="nds.c.compiler.option.include.paths.114245977" name="Include paths (-I)" superClass="nds.c.compiler.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+									<listOptionValue builtIn="false" value="../../../platform/chip_b91"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level.946733912" name="Optimization Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level" value="nds.c.optimization.level.more" valueType="enumerated"/>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel.1880751559" name="Code Model" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel" value="nds.c.compiler.option.cmodel.small" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.optimization.flags.385524357" name="Other optimization flags" superClass="nds.c.compiler.option.optimization.flags" value="-fpack-struct -fshort-enums" valueType="string"/>
+								<option id="nds.c.compiler.option.optimization.lto.86468386" name="Link Time Optimization (-flto)" superClass="nds.c.compiler.option.optimization.lto" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.function.245241229" name="Remove unused function sections (-ffunction-sections)" superClass="nds.c.compiler.option.optimization.removesections.function" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.data.1621672676" name="Remove unused data sections (-fdata-sections)" superClass="nds.c.compiler.option.optimization.removesections.data" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.misc.other.256247542" name="Other flags" superClass="nds.c.compiler.option.misc.other" value="-mext-dsp -mabi=ilp32f  -c -fmessage-length=0  -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd -Wno-nonnull-compare" valueType="string"/>
+								<option id="nds.c.compiler.option.misc.use-cc.toolchain.1744027913" name="Compiler to use" superClass="nds.c.compiler.option.misc.use-cc.toolchain" value="nds.c.compiler.option.misc.use-cc.gcc" valueType="enumerated"/>
+								<inputType id="tool.nds.c.compiler.input.2084123555" superClass="tool.nds.c.compiler.input"/>
+							</tool>
+							<tool command="$(CROSS_COMPILE)gcc" id="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug.246380972" name="Andes C Linker" superClass="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.c.link.option.optimization.level.953075250" name="Optimization Level" superClass="nds.c.link.option.optimization.level" value="-O2" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.c.link.option.noshared.base.28969939" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.c.link.option.noshared.base" valueType="boolean"/>
+								<option id="nds.c.link.option.LTO.143684559" name="Link Time Optimization (-flto)" superClass="nds.c.link.option.LTO" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.other.duplacitecompiler.1613924391" name="DuplaciteComplierOption" superClass="nds.c.link.option.other.duplacitecompiler" value="-mcmodel=small -fpack-struct -fshort-enums -mcpu=d25f -ffunction-sections -fdata-sections -mext-dsp -mabi=ilp32f -fmessage-length=0 -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd " valueType="string"/>
+								<option id="nds.c.link.option.removesections.1570889217" name="Remove unused sections (-ffunction-sections or -fdata-sections)" superClass="nds.c.link.option.removesections" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.nostart.532354741" name="Do not use standard start files (-nostartfiles)" superClass="nds.c.link.option.nostart" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.virtualhosting.545397449" name="Virtual Hosting (-mvh)" superClass="nds.c.link.option.virtualhosting" value="false" valueType="boolean"/>
+								<option id="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript.1576912440" name="Linker Script (-T)" superClass="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript" value="../boot.link" valueType="string"/>
+								<option id="nds.c.link.option.libs.179298640" name="Libraries (-l)" superClass="nds.c.link.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_b91"/>
+								</option>
+								<option id="nds.c.link.option.paths.446384427" name="Library search path (-L)" superClass="nds.c.link.option.paths" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="tool.nds.c.linker.input.254701244" superClass="tool.nds.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.assembler.exe.debug.851964816" name="Andes Assembler" superClass="tool.nds32le-elf-mculib-v5f.assembler.exe.debug">
+								<option defaultValue="-g" id="nds.both.asm.option.flags.932500099" name="Assembler flags" superClass="nds.both.asm.option.flags" valueType="string"/>
+								<inputType id="tool.nds.assembler.input.1142579094" superClass="tool.nds.assembler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.nm.exe.debug.375706757" name="NM (symbol listing)" superClass="tool.nds32le-elf-mculib-v5f.nm.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.readelf.exe.debug.1856014591" name="Readelf (ELF info listing)" superClass="tool.nds32le-elf-mculib-v5f.readelf.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.objdump.exe.debug.1790928737" name="Objdump (disassembly)" superClass="tool.nds32le-elf-mculib-v5f.objdump.exe.debug">
+								<option id="nds.objdump.option.disable.2103243477" name="Disable. (Do not auto-generate output file.)" superClass="nds.objdump.option.disable" value="false" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug.1629941181" name="Objcopy (object content copy)" superClass="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug">
+								<option id="nds.objcopy.option.disable.1162815219" name="Disable. (Do not auto-generate output file.)" superClass="nds.objcopy.option.disable" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.size.exe.debug.1975904990" name="Size (section size listing)" superClass="tool.nds32le-elf-mculib-v5f.size.exe.debug"/>
+							<tool command="$(ANDESIGHT_ROOT)/utils/nds_ldsag --version=v5" id="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug.326908404" name="LdSaG Tool" superClass="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug">
+								<option id="nds.ldsag.option.enablement.1115384532" name="Generate linker script" superClass="nds.ldsag.option.enablement" value="false" valueType="boolean"/>
+								<option defaultValue="$(ANDESIGHT_ROOT)/utils/nds32_template_v5.txt" id="nds.ldsag.option.sagtemplate.1054766573" name="Linker script template" superClass="nds.ldsag.option.sagtemplate" value="../boot.link" valueType="string"/>
+								<option id="nds.ldsag.option.sagscript.50740870" name="SaG file" superClass="nds.ldsag.option.sagscript" value="../ae350-xip.sag" valueType="string"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleGW|apps/sampleLight" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+		<cconfiguration id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.797821267">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.797821267" moduleId="org.eclipse.cdt.core.settings" name="bootLoader_B91">
+				<externalSettings/>
+				<extensions>
+					<extension id="com.andestech.ide.cdt.managedbuilder.core.CROSS_GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactExtension="elf" artifactName="${ConfigName}" buildArtefactType="nds.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=nds.buildArtefactType.exe,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="boot loader for B91" id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.797821267" name="bootLoader_B91" parent="config.nds32le-elf-mculib-v5f.exe.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} riscv" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/b91/boot_b91.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.797821267." name="/" resourcePath="">
+						<toolChain id="nds.nds32le-elf-mculib-v5f.exe.debug.406733756" name="nds32le-elf-mculib-v5f" superClass="nds.nds32le-elf-mculib-v5f.exe.debug">
+							<option id="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT.1500740726" name="RSE_CONNECT" superClass="nds32le-elf-mculib-v5f.managedbuild.option.toolchain.RSE_CONNECT" value="ICE" valueType="string"/>
+							<targetPlatform id="target.nds32le-elf-mculib-v5f.platform.exe.debug.1271107347" name="Debug Platform" superClass="target.nds32le-elf-mculib-v5f.platform.exe.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk}/Debug" command="make" id="target.nds32le-elf-mculib-v5f.builder.exe.debug.1353072403" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Andes Make Builder" superClass="target.nds32le-elf-mculib-v5f.builder.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.archiver.base.1011831491" name="Andes Archiver" superClass="tool.nds32le-elf-mculib-v5f.archiver.base"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.1815041082" name="Andes C++ Compiler" superClass="tool.nds32le-elf-mculib-v5f.cpp.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level.143330320" name="Debug Level" superClass="nds32le-elf-mculib-v5f.cpp.compiler.exe.debug.option.debugging.level" value="nds.cpp.compiler.debugging.level.max" valueType="enumerated"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug.2028145124" name="Andes C++ Linker" superClass="tool.nds32le-elf-mculib-v5f.cpp.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.cpp.link.option.optimization.level.571130569" name="Optimization Level" superClass="nds.cpp.link.option.optimization.level" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base.1468286179" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.cpp.link.option.noshared.base" valueType="boolean"/>
+							</tool>
+							<tool command="$(CROSS_COMPILE)gcc" id="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.164607216" name="Andes C Compiler" superClass="tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug">
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level.1549227575" name="Debug Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.debugging.level" value="nds.c.debugging.level.none" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.preprocessor.def.symbols.984818872" name="Defined symbols (-D)" superClass="nds.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_B91=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_BOOT_LOADER__=1"/>
+								</option>
+								<option id="nds.c.compiler.option.include.paths.366106719" name="Include paths (-I)" superClass="nds.c.compiler.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/bootLoader"/>
+									<listOptionValue builtIn="false" value="../../../platform/chip_b91"/>
+									<listOptionValue builtIn="false" value="../../../platform/riscv"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+								</option>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level.561353649" name="Optimization Level" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.optimization.level" value="nds.c.optimization.level.more" valueType="enumerated"/>
+								<option id="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel.338050653" name="Code Model" superClass="nds32le-elf-mculib-v5f.c.compiler.exe.debug.option.cmodel" value="nds.c.compiler.option.cmodel.small" valueType="enumerated"/>
+								<option id="nds.c.compiler.option.optimization.flags.1198221326" name="Other optimization flags" superClass="nds.c.compiler.option.optimization.flags" value="-fpack-struct -fshort-enums" valueType="string"/>
+								<option id="nds.c.compiler.option.optimization.lto.2053315935" name="Link Time Optimization (-flto)" superClass="nds.c.compiler.option.optimization.lto" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.function.1400420354" name="Remove unused function sections (-ffunction-sections)" superClass="nds.c.compiler.option.optimization.removesections.function" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.optimization.removesections.data.1258019800" name="Remove unused data sections (-fdata-sections)" superClass="nds.c.compiler.option.optimization.removesections.data" value="true" valueType="boolean"/>
+								<option id="nds.c.compiler.option.misc.other.1939785910" name="Other flags" superClass="nds.c.compiler.option.misc.other" value="-mext-dsp -mabi=ilp32f  -c -fmessage-length=0  -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd -Wno-nonnull-compare" valueType="string"/>
+								<option id="nds.c.compiler.option.misc.use-cc.toolchain.806408228" name="Compiler to use" superClass="nds.c.compiler.option.misc.use-cc.toolchain" value="nds.c.compiler.option.misc.use-cc.gcc" valueType="enumerated"/>
+								<inputType id="tool.nds.c.compiler.input.73473053" superClass="tool.nds.c.compiler.input"/>
+							</tool>
+							<tool command="$(CROSS_COMPILE)gcc" id="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug.2083309271" name="Andes C Linker" superClass="tool.nds32le-elf-mculib-v5f.c.linker.exe.debug">
+								<option defaultValue="-O0" id="nds.c.link.option.optimization.level.1035340045" name="Optimization Level" superClass="nds.c.link.option.optimization.level" value="-O2" valueType="string"/>
+								<option defaultValue="true" id="nds32le-elf-mculib-v5f.c.link.option.noshared.base.1311625846" name="No shared libraries (-static)" superClass="nds32le-elf-mculib-v5f.c.link.option.noshared.base" valueType="boolean"/>
+								<option id="nds.c.link.option.LTO.1067974853" name="Link Time Optimization (-flto)" superClass="nds.c.link.option.LTO" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.other.duplacitecompiler.823893030" name="DuplaciteComplierOption" superClass="nds.c.link.option.other.duplacitecompiler" value="-mcmodel=small -fpack-struct -fshort-enums -mcpu=d25f -ffunction-sections -fdata-sections -mext-dsp -mabi=ilp32f -fmessage-length=0 -fomit-frame-pointer -fno-strict-aliasing -fshort-wchar -fuse-ld=bfd " valueType="string"/>
+								<option id="nds.c.link.option.removesections.279238930" name="Remove unused sections (-ffunction-sections or -fdata-sections)" superClass="nds.c.link.option.removesections" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.nostart.1217721749" name="Do not use standard start files (-nostartfiles)" superClass="nds.c.link.option.nostart" value="true" valueType="boolean"/>
+								<option id="nds.c.link.option.virtualhosting.637821882" name="Virtual Hosting (-mvh)" superClass="nds.c.link.option.virtualhosting" value="false" valueType="boolean"/>
+								<option id="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript.2001677317" name="Linker Script (-T)" superClass="nds32le-elf-mculib-v5f.c.link.exe.debug.option.ldscript" value="../boot.link" valueType="string"/>
+								<option id="nds.c.link.option.libs.1821143851" name="Libraries (-l)" superClass="nds.c.link.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="drivers_b91"/>
+								</option>
+								<option id="nds.c.link.option.paths.1644001185" name="Library search path (-L)" superClass="nds.c.link.option.paths" valueType="libPaths">
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="tool.nds.c.linker.input.754521176" superClass="tool.nds.c.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.assembler.exe.debug.1938581997" name="Andes Assembler" superClass="tool.nds32le-elf-mculib-v5f.assembler.exe.debug">
+								<option defaultValue="-g" id="nds.both.asm.option.flags.1281274137" name="Assembler flags" superClass="nds.both.asm.option.flags" valueType="string"/>
+								<inputType id="tool.nds.assembler.input.76935751" superClass="tool.nds.assembler.input"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.nm.exe.debug.1678997372" name="NM (symbol listing)" superClass="tool.nds32le-elf-mculib-v5f.nm.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.readelf.exe.debug.1994060880" name="Readelf (ELF info listing)" superClass="tool.nds32le-elf-mculib-v5f.readelf.exe.debug"/>
+							<tool id="tool.nds32le-elf-mculib-v5f.objdump.exe.debug.288012023" name="Objdump (disassembly)" superClass="tool.nds32le-elf-mculib-v5f.objdump.exe.debug">
+								<option id="nds.objdump.option.disable.1312026890" name="Disable. (Do not auto-generate output file.)" superClass="nds.objdump.option.disable" value="false" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug.860332726" name="Objcopy (object content copy)" superClass="tool.nds32le-elf-mculib-v5f.objcopy.exe.debug">
+								<option id="nds.objcopy.option.disable.2097124847" name="Disable. (Do not auto-generate output file.)" superClass="nds.objcopy.option.disable" value="true" valueType="boolean"/>
+							</tool>
+							<tool id="tool.nds32le-elf-mculib-v5f.size.exe.debug.1491738545" name="Size (section size listing)" superClass="tool.nds32le-elf-mculib-v5f.size.exe.debug"/>
+							<tool command="$(ANDESIGHT_ROOT)/utils/nds_ldsag --version=v5" id="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug.1026391759" name="LdSaG Tool" superClass="tool.nds32le-elf-mculib-v5f.ldsag.exe.debug">
+								<option id="nds.ldsag.option.enablement.724903046" name="Generate linker script" superClass="nds.ldsag.option.enablement" value="false" valueType="boolean"/>
+								<option defaultValue="$(ANDESIGHT_ROOT)/utils/nds32_template_v5.txt" id="nds.ldsag.option.sagtemplate.1032550673" name="Linker script template" superClass="nds.ldsag.option.sagtemplate" value="../boot.link" valueType="string"/>
+								<option id="nds.ldsag.option.sagscript.1073156311" name="SaG file" superClass="nds.ldsag.option.sagscript" value="../ae350-xip.sag" valueType="string"/>
+							</tool>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="platform/services/irq_handler.c|zigbee|zbhci|apps/sampleLight|apps/common/module_test.c|apps/common/main.c|apps/common/factory_reset.c|apps/sampleSwitch|apps/sampleContactSensor|apps/sampleGW" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="tl_zigbee_sdk.target.nds32le-elf-mculib-v5f.exe.1134075295" name="Andes Executable" projectType="target.nds32le-elf-mculib-v5f.exe"/>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
+	<storageModule moduleId="refreshScope" versionNumber="2">
+		<configuration configurationName="sampleGW_B91"/>
+		<configuration configurationName="sampleLight_B91"/>
+		<configuration configurationName="sampleContactSensor_B91"/>
+		<configuration configurationName="sampleSwitch_B91"/>
+		<configuration configurationName="Debug">
+			<resource resourceType="PROJECT" workspacePath="/tl_zigbee_sdk"/>
+		</configuration>
+		<configuration configurationName="Release">
+			<resource resourceType="PROJECT" workspacePath="/tl_zigbee_sdk"/>
+		</configuration>
+	</storageModule>
+	<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+	<storageModule moduleId="scannerConfiguration">
+		<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+		<scannerConfigBuildInfo instanceId="config.nds32le-elf-mculib-v5f.exe.debug.540229038;config.nds32le-elf-mculib-v5f.exe.debug.540229038.;tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.1698376078;tool.nds.c.compiler.input.778743349">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.andestech.ide.cdt.managedbuilder.core.ndsManagedMakePerProjectProfileC"/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656;config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.;tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.633437445;tool.nds.c.compiler.input.1079736600">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.andestech.ide.cdt.managedbuilder.core.ndsManagedMakePerProjectProfileC"/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978;config.nds32le-elf-mculib-v5f.exe.debug.540229038.578877656.401603901.2146331978.;tool.nds32le-elf-mculib-v5f.c.compiler.exe.debug.1901389369;tool.nds.c.compiler.input.494877746">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.andestech.ide.cdt.managedbuilder.core.ndsManagedMakePerProjectProfileC"/>
+		</scannerConfigBuildInfo>
+		<scannerConfigBuildInfo instanceId="config.nds32le-elf-mculib-v5f.exe.release.861117968;config.nds32le-elf-mculib-v5f.exe.release.861117968.;tool.nds32le-elf-mculib-v5f.c.compiler.exe.release.739228463;tool.nds.c.compiler.input.365910674">
+			<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.andestech.ide.cdt.managedbuilder.core.ndsManagedMakePerProjectProfileC"/>
+		</scannerConfigBuildInfo>
+	</storageModule>
+</cproject>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.project b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.project
new file mode 100644
index 00000000..370da76a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.project
@@ -0,0 +1,128 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>tl_zigbee_sdk</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
+		<link>
+			<name>apps</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>platform</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>proj</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/proj</locationURI>
+		</link>
+		<link>
+			<name>zbhci</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/zbhci</locationURI>
+		</link>
+		<link>
+			<name>zigbee</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/zigbee</locationURI>
+		</link>
+		<link>
+			<name>apps/bootLoader</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/bootLoader</locationURI>
+		</link>
+		<link>
+			<name>apps/common</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/common</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleContactSensor</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleContactSensor</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleGW</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleGW</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleLight</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleLight</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleSwitch</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleSwitch</locationURI>
+		</link>
+		<link>
+			<name>platform/boot</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>platform/chip_b91</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/chip_b91</locationURI>
+		</link>
+		<link>
+			<name>platform/firmware_encrypt.h</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/riscv/firmware_encrypt.h</locationURI>
+		</link>
+		<link>
+			<name>platform/platform.h</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/platform.h</locationURI>
+		</link>
+		<link>
+			<name>platform/services</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/b91</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/b91</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/link_cfg.S</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/link_cfg.S</locationURI>
+		</link>
+		<link>
+			<name>platform/services/irq_handler.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/services/b91m/irq_handler.c</locationURI>
+		</link>
+		<link>
+			<name>platform/services/plic_isr.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/services/b91m/plic_isr.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.settings/com.andestech.ide.cdt.managedbuilder.core.TargetModelUtils.prefs b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.settings/com.andestech.ide.cdt.managedbuilder.core.TargetModelUtils.prefs
new file mode 100644
index 00000000..545bf368
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_riscv/.settings/com.andestech.ide.cdt.managedbuilder.core.TargetModelUtils.prefs
@@ -0,0 +1,11 @@
+autoBuildEnable=false
+connectType=ICE
+connectTypeOptionData=2
+eclipse.preferences.version=1
+iceman.misc.args=
+iceman.misc.args.map={2\=}
+name=ADP-AE350-D25F-EAGLE-0106
+sid.misc.args=
+target.project.build.selection=false
+target.project.clean.selection=false
+targetURI=rse\://LOCALHOST/~target/ADP-AE350-D25F-EAGLE-0106
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.cproject b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.cproject
new file mode 100644
index 00000000..234dd107
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.cproject
@@ -0,0 +1,34967 @@
+<?xml version="1.0" encoding="UTF-8" standalone="no"?>
+<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
+	<storageModule moduleId="org.eclipse.cdt.core.settings">
+		<cconfiguration id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092" moduleId="org.eclipse.cdt.core.settings" name="sampleGW_8269">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Coordinator-8269" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092" name="sampleGW_8269" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/826x/boot_826x.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092." name="/" resourcePath="">
+						<toolChain id="com.telink.tc32eclipse.toolchain.TC32Win.app.debug.1151449331" name="TC32-GCC Toolchain" superClass="com.telink.tc32eclipse.toolchain.TC32Win.app.debug">
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.1288243094" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1640280192" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.816119237" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.1560601675" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.1329888539" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1863938502" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.1866617949" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.929686082" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_826x -DCHIP_8269" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.1322952109" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1654461620" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.1058098779" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1805094009" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.88642482" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.1931678433" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="COORDINATOR=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_826x=1"/>
+									<listOptionValue builtIn="false" value="CHIP_8269=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_GW__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.755780528" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.1806318868" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.2136700779" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.2025290905" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.1092336057" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.1698280767" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.770048291" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.923155099" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.1557971155" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_coordinator"/>
+									<listOptionValue builtIn="false" value="drivers_826x"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.835443956" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.1728806939" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.730987478" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.141835285" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.1333216466" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.262734593" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.1910138069" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
+								<option id="com.telink.tc32eclipse.objcopy.flash.option.output.1341543036" name="Output Filename" superClass="com.telink.tc32eclipse.objcopy.flash.option.output" value="" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.77790383" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleContactSensor|apps/sampleLight|platform/chip_8278|platform/chip_8258" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+			<storageModule moduleId="scannerConfiguration">
+				<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+				<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+					<buildOutputProvider>
+						<openAction enabled="true" filePath=""/>
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+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.305446279;com.telink.tc32eclipse.compiler.TC32Win.input.1686901350">
+					<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.telink.tc32eclipse.core.TC32GCCManagedMakePerProjectProfileC"/>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="makefileGenerator">
+							<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
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+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+				</scannerConfigBuildInfo>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+		</cconfiguration>
+		<cconfiguration id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993" moduleId="org.eclipse.cdt.core.settings" name="sampleSwitch_8269">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-8269" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993" name="sampleSwitch_8269" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/826x/boot_826x.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993." name="/" resourcePath="">
+						<toolChain id="com.telink.tc32eclipse.toolchain.TC32Win.app.debug.650083580" name="TC32-GCC Toolchain" superClass="com.telink.tc32eclipse.toolchain.TC32Win.app.debug">
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.862809186" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.609426670" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.2087010442" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.684146584" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.1236455028" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1842482973" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.131292273" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.259500921" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_826x -DCHIP_8269" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.2070399230" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleSwitch"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1076104622" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.2012005007" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.566967558" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.239750983" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.1189709264" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_826x=1"/>
+									<listOptionValue builtIn="false" value="CHIP_8269=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_SWITCH__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1874307414" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.766379157" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1039235930" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.1821311045" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.368075306" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.131049301" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleSwitch"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.1829200394" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.652609837" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.2037254965" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_826x"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.1501771532" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.457297101" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.1353434543" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.1068502188" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.1733232244" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.1216758395" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.427616150" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
+								<option id="com.telink.tc32eclipse.objcopy.flash.option.output.1138572483" name="Output Filename" superClass="com.telink.tc32eclipse.objcopy.flash.option.output" value="" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.6710502" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleContactSensor|apps/sampleGW|apps/sampleLight|platform/chip_8278|platform/chip_8258" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+			<storageModule moduleId="scannerConfiguration">
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+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
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+				<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+					<buildOutputProvider>
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+					<scannerInfoProvider id="makefileGenerator">
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
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+					<scannerInfoProvider id="specsFile">
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+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.73115629;com.telink.tc32eclipse.compiler.TC32Win.input.467166755">
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+						<scannerInfoProvider id="makefileGenerator">
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
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+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Coordinator-8258" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207" name="sampleGW_8258" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8258/boot_8258.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207." name="/" resourcePath="">
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+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.686638044" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
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+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.149443148" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.139701843" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8258 -DMCU_STARTUP_8258" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.1223855630" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
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+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1413696523" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
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+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1831646010" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.654360523" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.2090845933" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="COORDINATOR=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8258=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_GW__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1037250331" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.1862150941" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1162347593" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.98273433" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.357973839" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.65161049" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../platform/tc32"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
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+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.1686901350" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
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+								<option id="com.telink.tc32eclipse.linker.option.libs.975881386" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_coordinator"/>
+									<listOptionValue builtIn="false" value="drivers_8258"/>
+									<listOptionValue builtIn="false" value="firmware_encrypt"/>
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+								<option id="com.telink.tc32eclipse.linker.option.libpath.899979834" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
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+								<inputType id="com.telink.tc32eclipse.tool.linker.input.2006466062" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
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+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.302866168" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
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+								<option id="com.telink.tc32eclipse.objdump.option.output.412197372" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
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+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.2133098586" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.1590500246" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
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+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.1614955367" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleContactSensor|platform/chip_826x|apps/sampleLight|platform/chip_8278" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+				</scannerConfigBuildInfo>
+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.305446279;com.telink.tc32eclipse.compiler.TC32Win.input.1686901350">
+					<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.telink.tc32eclipse.core.TC32GCCManagedMakePerProjectProfileC"/>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="makefileGenerator">
+							<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+				</scannerConfigBuildInfo>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+		</cconfiguration>
+		<cconfiguration id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623" moduleId="org.eclipse.cdt.core.settings" name="sampleLight_8258">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Router-8258" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623" name="sampleLight_8258" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8258/boot_8258.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623." name="/" resourcePath="">
+						<toolChain id="com.telink.tc32eclipse.toolchain.TC32Win.app.debug.1408788262" name="TC32-GCC Toolchain" superClass="com.telink.tc32eclipse.toolchain.TC32Win.app.debug">
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.46337075" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1628849330" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.904710277" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.1900130264" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.342677293" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1852681210" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.33440941" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.1694292332" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8258 -DMCU_STARTUP_8258" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.838635269" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleLight"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.959012736" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.842632483" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.571200737" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.695167920" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.516753215" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="ROUTER=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8258=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_DIMMABLE_LIGHT__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1907185509" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.278833432" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1779560569" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.1923361552" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.978075901" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.536557329" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleLight"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/wwah"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.1755905662" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.1685895648" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.945258735" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_router"/>
+									<listOptionValue builtIn="false" value="drivers_8258"/>
+									<listOptionValue builtIn="false" value="soft-fp"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.724767690" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+									<listOptionValue builtIn="false" value="../../../platform/tc32"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.2122059168" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.389635330" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.955082504" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.2135495459" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.1173015150" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.1008392429" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
+								<option id="com.telink.tc32eclipse.objcopy.flash.option.output.984952262" name="Output Filename" superClass="com.telink.tc32eclipse.objcopy.flash.option.output" value="" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.1706814974" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleContactSensor|platform/chip_826x|apps/sampleGW|platform/chip_8278" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+			<storageModule moduleId="scannerConfiguration">
+				<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
+				<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+					<buildOutputProvider>
+						<openAction enabled="true" filePath=""/>
+						<parser enabled="true"/>
+					</buildOutputProvider>
+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+						<parser enabled="true"/>
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+				<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+					<buildOutputProvider>
+						<openAction enabled="true" filePath=""/>
+						<parser enabled="true"/>
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+					<scannerInfoProvider id="makefileGenerator">
+						<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+					<buildOutputProvider>
+						<openAction enabled="true" filePath=""/>
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+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+					<buildOutputProvider>
+						<openAction enabled="true" filePath=""/>
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+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+					<buildOutputProvider>
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+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+					<buildOutputProvider>
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+					<scannerInfoProvider id="specsFile">
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+					<buildOutputProvider>
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+					<scannerInfoProvider id="specsFile">
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+				<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
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+					<scannerInfoProvider id="specsFile">
+						<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
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+				</profile>
+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.73115629;com.telink.tc32eclipse.compiler.TC32Win.input.467166755">
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+						<scannerInfoProvider id="makefileGenerator">
+							<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
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+							<openAction enabled="true" filePath=""/>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+						<buildOutputProvider>
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+						<scannerInfoProvider id="specsFile">
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
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+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="Coordinator-8278" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588" name="sampleGW_8278" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8278/boot_8278.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
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+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1848356451" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
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+								<option id="com.telink.tc32eclipse.asm.option.flags.127438541" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8278 -DMCU_STARTUP_8278" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.1461898615" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
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+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1909176699" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
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+								<option id="com.telink.tc32eclipse.compiler.option.optimize.1683906248" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.1347593101" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="COORDINATOR=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8278=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_GW__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1929981899" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.65960" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1529082381" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
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+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.1960993356" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.1000905766" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleGW"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/gp"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
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+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.467166755" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
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+								<option id="com.telink.tc32eclipse.linker.option.libs.1060915221" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_coordinator"/>
+									<listOptionValue builtIn="false" value="drivers_8278"/>
+									<listOptionValue builtIn="false" value="firmware_encrypt"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.1610450600" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+									<listOptionValue builtIn="false" value="../../../platform/tc32"/>
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+								<inputType id="com.telink.tc32eclipse.tool.linker.input.1217652960" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.2129597997" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
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+								<option id="com.telink.tc32eclipse.objdump.option.output.1311807347" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
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+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.1107157419" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
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+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+				</scannerConfigBuildInfo>
+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.305446279;com.telink.tc32eclipse.compiler.TC32Win.input.1686901350">
+					<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId="com.telink.tc32eclipse.core.TC32GCCManagedMakePerProjectProfileC"/>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
+							<parser enabled="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerFileProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
+							<parser enabled="true"/>
+						</buildOutputProvider>
+						<scannerInfoProvider id="makefileGenerator">
+							<runAction arguments="-E -P -v -dD" command="" useDefault="true"/>
+							<parser enabled="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfile">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/${specs_file}" command="gcc" useDefault="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.cpp" command="g++" useDefault="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCManagedMakePerProjectProfileC">
+						<buildOutputProvider>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-E -P -v -dD ${plugin_state_location}/specs.c" command="gcc" useDefault="true"/>
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfile">
+						<buildOutputProvider>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileCPP">
+						<buildOutputProvider>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'g++ -E -P -v -dD &quot;${plugin_state_location}/specs.cpp&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
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+					</profile>
+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
+						<buildOutputProvider>
+							<openAction enabled="true" filePath=""/>
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+						<scannerInfoProvider id="specsFile">
+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/specs.c&quot;'" command="sh" useDefault="true"/>
+							<parser enabled="true"/>
+						</scannerInfoProvider>
+					</profile>
+				</scannerConfigBuildInfo>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+		</cconfiguration>
+		<cconfiguration id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055">
+			<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055" moduleId="org.eclipse.cdt.core.settings" name="sampleSwitch_8278">
+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+				</extensions>
+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-8278" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055" name="sampleSwitch_8278" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8278/boot_8278.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055." name="/" resourcePath="">
+						<toolChain id="com.telink.tc32eclipse.toolchain.TC32Win.app.debug.1304916070" name="TC32-GCC Toolchain" superClass="com.telink.tc32eclipse.toolchain.TC32Win.app.debug">
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.160314312" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.918206145" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.1835872903" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.1661818366" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.270853943" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1587882702" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.4537201" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.1186262555" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8278 -DMCU_STARTUP_8278" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.1306676805" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleSwitch"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.620176366" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.347295961" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1801276881" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.1342404429" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.1377060522" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8278=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_SWITCH__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1247695207" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.625406602" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.449010450" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.295516575" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.869455036" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.989413871" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleSwitch"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.1719344865" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.506514644" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.109440082" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_8278"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.392186206" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.144983315" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.1909752008" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.337524331" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.23434273" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.969734798" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.1272261239" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
+								<option id="com.telink.tc32eclipse.objcopy.flash.option.output.177184258" name="Output Filename" superClass="com.telink.tc32eclipse.objcopy.flash.option.output" value="" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.2076681612" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleContactSensor|apps/sampleGW|platform/chip_826x|apps/sampleLight|platform/chip_8258" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+			<storageModule moduleId="scannerConfiguration">
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+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+		</cconfiguration>
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+			</storageModule>
+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-8269" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993.2078814352" name="sampleContactSensor_8269" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/826x/boot_826x.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.87272993.2078814352." name="/" resourcePath="">
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+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.518471919" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1261858355" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.832562271" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.833199897" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.1541587335" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.2010520311" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.674905451" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.1788667246" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_826x -DCHIP_8269" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.1041247646" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.749037203" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.1215001551" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1802804224" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.949870962" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.325898912" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_826x=1"/>
+									<listOptionValue builtIn="false" value="CHIP_8269=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_CONTACT_SENSOR__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1641735948" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.557868288" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1615330007" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.924186627" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.1978746060" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.653348370" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.190301273" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.208474165" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.842352101" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_826x"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.1395287035" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.983653366" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.1411922353" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.1311737654" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.1405039844" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
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+						<toolChain id="com.telink.tc32eclipse.toolchain.TC32Win.app.debug.1194045441" name="TC32-GCC Toolchain" superClass="com.telink.tc32eclipse.toolchain.TC32Win.app.debug">
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.1294089879" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.2136918081" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.1274235265" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.588590310" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.2005765777" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1078612597" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.680757801" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.1432837419" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8258 -DMCU_STARTUP_8258" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.165587265" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.747114815" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
+							</tool>
+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.108344155" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1037899227" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.467653500" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.598914833" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8258=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_CONTACT_SENSOR__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.863770159" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.741305524" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1937033917" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.2075201923" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.1576720706" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.995569088" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.488233921" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.1210447809" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.1339051632" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_8258"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.574124191" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.196820661" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.2140941280" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.249758774" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objdump.option.output.709948779" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.215101118" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.1963070055" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
+								<option id="com.telink.tc32eclipse.objcopy.flash.option.output.573192724" name="Output Filename" superClass="com.telink.tc32eclipse.objcopy.flash.option.output" value="" valueType="string"/>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.888038022" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|platform/chip_826x|apps/sampleGW|apps/sampleLight|platform/chip_8278" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
+					</sourceEntries>
+				</configuration>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
+			<storageModule moduleId="scannerConfiguration">
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+							<runAction arguments="-c 'gcc -E -P -v -dD &quot;${plugin_state_location}/${specs_file}&quot;'" command="sh" useDefault="true"/>
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+					<profile id="org.eclipse.cdt.managedbuilder.core.GCCWinManagedMakePerProjectProfileC">
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+						<scannerInfoProvider id="specsFile">
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+					</profile>
+				</scannerConfigBuildInfo>
+				<scannerConfigBuildInfo instanceId="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207;com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.;com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.305446279;com.telink.tc32eclipse.compiler.TC32Win.input.1686901350">
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+					<profile id="org.eclipse.cdt.make.core.GCCStandardMakePerProjectProfile">
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+				</scannerConfigBuildInfo>
+			</storageModule>
+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
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+				<externalSettings/>
+				<extensions>
+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+					<extension id="org.eclipse.cdt.core.MakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+			<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="EndDevice-8278" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055.749242093" name="sampleContactSensor_8278" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8278/boot_8278.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.1286393588.1862539044.712782055.749242093." name="/" resourcePath="">
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+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1783783343" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.351785927" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
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+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.156827028" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.1200836733" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.1006112055" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.960064206" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8278 -DMCU_STARTUP_8278" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.747360757" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
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+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1688114530" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
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+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.1462003219" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.1832090586" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.2080058025" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.531750906" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="END_DEVICE=1"/>
+									<listOptionValue builtIn="false" value="MCU_CORE_8278=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_CONTACT_SENSOR__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1669619647" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.1250723174" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1914063316" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.805929163" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.406408109" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.1256140687" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/sampleContactSensor"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/common/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zbapi"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/bdb/includes"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/zcl"/>
+									<listOptionValue builtIn="false" value="../../../zigbee/ota"/>
+									<listOptionValue builtIn="false" value="../../../zbhci"/>
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+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.415321677" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
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+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.2139578774" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.2146025488" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="zb_ed"/>
+									<listOptionValue builtIn="false" value="drivers_8278"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.1811918563" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../zigbee/lib/tc32"/>
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
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+								<inputType id="com.telink.tc32eclipse.tool.linker.input.1230109364" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
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+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.934780578" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
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+								<option id="com.telink.tc32eclipse.objdump.option.output.1393857913" name="Output Filename" superClass="com.telink.tc32eclipse.objdump.option.output" value="${ConfigName}.lst" valueType="string"/>
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+							<tool id="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug.1547590371" name="TC32 Create Flash image" superClass="com.telink.tc32eclipse.tool.objcopy.flash.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.objcopy.option.flash.stdopts.934765450" name="Options to create flash image" superClass="com.telink.tc32eclipse.objcopy.option.flash.stdopts" value="" valueType="string"/>
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+							<tool id="com.telink.tc32eclipse.tool.size.TC32Win.app.debug.300719488" name="Print Size" superClass="com.telink.tc32eclipse.tool.size.TC32Win.app.debug"/>
+						</toolChain>
+					</folderInfo>
+					<sourceEntries>
+						<entry excluding="apps/bootLoader|apps/sampleSwitch|apps/sampleGW|platform/chip_826x|apps/sampleLight|platform/chip_8258" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
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+			<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
+			<storageModule moduleId="org.eclipse.cdt.internal.ui.text.commentOwnerProjectMappings"/>
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+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
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+				<externalSettings/>
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+					<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
+					<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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+				<configuration artifactName="${ConfigName}" buildArtefactType="com.telink.tc32eclipse.buildArtefactType.app" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=com.telink.tc32eclipse.buildArtefactType.app,org.eclipse.cdt.build.core.buildType=org.eclipse.cdt.build.core.buildType.debug" description="boot loader for 8258" id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623.580773024" name="bootLoader_8258" parent="com.telink.tc32eclipse.configuration.app.debug" postbuildStep="&quot;../../../tools/tl_check_fw.sh&quot; ${ConfigName} tc32" prebuildStep="&quot;../../../tools/tl_link_load.sh&quot; &quot;../../../platform/boot/8258/boot_8258.link&quot; &quot;${workspace_loc:/${ProjName}}/boot.link&quot;">
+					<folderInfo id="com.telink.tc32eclipse.configuration.app.debug.1775306817.1609575092.51908207.315250623.580773024." name="/" resourcePath="">
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+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug.642959961" name="Generate binary file for Flash memory" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objcopy.flash.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug.1380905689" name="Generate Extended Listing (Source + generated Assembler)" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.objdump.app.debug"/>
+							<option id="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug.1147372362" name="Print Size" superClass="com.telink.tc32eclipse.toolchain.options.toolchain.size.app.debug"/>
+							<targetPlatform id="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug.1366539676" name="TC32 Cross-Target" superClass="com.telink.tc32eclipse.targetplatform.TC32Win.app.debug"/>
+							<builder arguments="-j4" buildPath="${workspace_loc:/tl_zigbee_sdk/Debug}" command="make" id="com.telink.tc32eclipse.target.builder.TC32Win.app.debug.1932019545" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="GNU Make Builder" superClass="com.telink.tc32eclipse.target.builder.TC32Win.app.debug"/>
+							<tool id="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug.317222556" name="TC32 CC/Assembler" superClass="com.telink.tc32eclipse.tool.assembler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.assembler.option.debug.level.339297259" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.assembler.option.debug.level" value="com.telink.tc32eclipse.assembler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.asm.option.flags.579314030" name="Other GCC Flags" superClass="com.telink.tc32eclipse.asm.option.flags" value="-DMCU_CORE_8258 -DMCU_STARTUP_8258" valueType="string"/>
+								<option id="com.telink.tc32eclipse.asm.option.include.paths.424783480" name="#include paths for preprocessor(-I)" superClass="com.telink.tc32eclipse.asm.option.include.paths" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/bootLoader"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.assembler.input.1339709142" superClass="com.telink.tc32eclipse.tool.assembler.input"/>
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+							<tool command="tc32-elf-gcc -ffunction-sections -fdata-sections" id="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug.1092900078" name="TC32 Compiler" superClass="com.telink.tc32eclipse.tool.compiler.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.compiler.option.debug.level.2062006676" name="Generate Debugging Info" superClass="com.telink.tc32eclipse.compiler.option.debug.level" value="com.telink.tc32eclipse.compiler.option.debug.level.none" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.1592119704" name="Optimization Level" superClass="com.telink.tc32eclipse.compiler.option.optimize" value="com.telink.tc32eclipse.compiler.optimize.two" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.def.85030443" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
+									<listOptionValue builtIn="false" value="MCU_CORE_8258=1"/>
+									<listOptionValue builtIn="false" value="__PROJECT_TL_BOOT_LOADER__=1"/>
+								</option>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1532644433" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.shortenums.690784879" name="Short enums (-fshort-enums)" superClass="com.telink.tc32eclipse.compiler.option.optimize.shortenums" value="true" valueType="boolean"/>
+								<option id="com.telink.tc32eclipse.compiler.option.optimize.other.1672350115" name="Other Optimization Flags" superClass="com.telink.tc32eclipse.compiler.option.optimize.other" value="-finline-small-functions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.std.1428106543" name="Language Standard" superClass="com.telink.tc32eclipse.compiler.option.std" value="com.telink.tc32eclipse.compiler.option.std.gnu99" valueType="enumerated"/>
+								<option id="com.telink.tc32eclipse.compiler.option.otherflags.1400704319" name="Other flags" superClass="com.telink.tc32eclipse.compiler.option.otherflags" value="-fshort-wchar -fms-extensions" valueType="string"/>
+								<option id="com.telink.tc32eclipse.compiler.option.incpath.1987589084" name="Include Paths (-I)" superClass="com.telink.tc32eclipse.compiler.option.incpath" valueType="includePath">
+									<listOptionValue builtIn="false" value="../../../apps/common"/>
+									<listOptionValue builtIn="false" value="../../../apps/bootLoader"/>
+									<listOptionValue builtIn="false" value="../../../platform"/>
+									<listOptionValue builtIn="false" value="../../../proj/common"/>
+									<listOptionValue builtIn="false" value="../../../proj"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.compiler.TC32Win.input.802840807" name="C Source Files" superClass="com.telink.tc32eclipse.compiler.TC32Win.input"/>
+							</tool>
+							<tool command="tc32-elf-ld --gc-sections" id="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug.583786224" name="TC32 C Linker" superClass="com.telink.tc32eclipse.tool.linker.TC32Win.app.debug">
+								<option id="com.telink.tc32eclipse.linker.option.libs.787522156" name="Libraries (-l)" superClass="com.telink.tc32eclipse.linker.option.libs" valueType="libs">
+									<listOptionValue builtIn="false" value="drivers_8258"/>
+								</option>
+								<option id="com.telink.tc32eclipse.linker.option.libpath.1582461235" name="Libraries Path (-L)" superClass="com.telink.tc32eclipse.linker.option.libpath" valueType="stringList">
+									<listOptionValue builtIn="false" value="../../../platform/lib"/>
+								</option>
+								<inputType id="com.telink.tc32eclipse.tool.linker.input.244399147" name="OBJ Files" superClass="com.telink.tc32eclipse.tool.linker.input">
+									<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
+									<additionalInput kind="additionalinput" paths="$(LIBS)"/>
+								</inputType>
+							</tool>
+							<tool id="com.telink.tc32eclipse.tool.archiver.TC32Win.base.1017671045" name="TC32 Archiver" superClass="com.telink.tc32eclipse.tool.archiver.TC32Win.base"/>
+							<tool id="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug.688040407" name="TC32 Create Extended Listing" superClass="com.telink.tc32eclipse.tool.objdump.TC32Win.app.debug">
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+								<option id="com.telink.tc32eclipse.compiler.option.def.2073372101" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
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+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.447659151" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
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+								<option id="com.telink.tc32eclipse.compiler.option.def.2020731471" name="Define Syms (-D)" superClass="com.telink.tc32eclipse.compiler.option.def" valueType="definedSymbols">
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+								<option id="com.telink.tc32eclipse.compiler.option.optimize.packstruct.1512426742" name="Pack structs (-fpack-struct)" superClass="com.telink.tc32eclipse.compiler.option.optimize.packstruct" value="true" valueType="boolean"/>
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+			<storageModule moduleId="org.eclipse.cdt.core.language.mapping"/>
+		</cconfiguration>
+	</storageModule>
+	<storageModule moduleId="cdtBuildSystem" version="4.0.0">
+		<project id="tl_zigbee_sdk.com.telink.tc32eclipse.project.TC32Win.elf_0.1.0.968429853" name="TC32 Cross Target Application" projectType="com.telink.tc32eclipse.project.TC32Win.elf_0.1.0"/>
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.project b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.project
new file mode 100644
index 00000000..78bb2895
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/build/tlsr_tc32/.project
@@ -0,0 +1,209 @@
+<?xml version="1.0" encoding="UTF-8"?>
+<projectDescription>
+	<name>tl_zigbee_sdk</name>
+	<comment></comment>
+	<projects>
+	</projects>
+	<buildSpec>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
+			<triggers>clean,full,incremental,</triggers>
+			<arguments>
+				<dictionary>
+					<key>?name?</key>
+					<value></value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.append_environment</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.autoBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildArguments</key>
+					<value>-j4</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildCommand</key>
+					<value>make</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.buildLocation</key>
+					<value>${workspace_loc:/tl_zigbee_sdk/Debug}</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.cleanBuildTarget</key>
+					<value>clean</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.contents</key>
+					<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
+					<value>false</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.enableFullBuild</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.fullBuildTarget</key>
+					<value>all</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.stopOnError</key>
+					<value>true</value>
+				</dictionary>
+				<dictionary>
+					<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
+					<value>false</value>
+				</dictionary>
+			</arguments>
+		</buildCommand>
+		<buildCommand>
+			<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
+			<triggers>full,incremental,</triggers>
+			<arguments>
+			</arguments>
+		</buildCommand>
+	</buildSpec>
+	<natures>
+		<nature>org.eclipse.cdt.core.cnature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
+		<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
+	</natures>
+	<linkedResources>
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+			<name>apps</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>div_mod.S</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/tc32/div_mod.S</locationURI>
+		</link>
+		<link>
+			<name>platform</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>proj</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/proj</locationURI>
+		</link>
+		<link>
+			<name>zbhci</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/zbhci</locationURI>
+		</link>
+		<link>
+			<name>zigbee</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/zigbee</locationURI>
+		</link>
+		<link>
+			<name>apps/bootLoader</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/bootLoader</locationURI>
+		</link>
+		<link>
+			<name>apps/common</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/common</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleContactSensor</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleContactSensor</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleGW</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleGW</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleLight</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleLight</locationURI>
+		</link>
+		<link>
+			<name>apps/sampleSwitch</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/apps/sampleSwitch</locationURI>
+		</link>
+		<link>
+			<name>platform/boot</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>platform/chip_8258</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/chip_8258</locationURI>
+		</link>
+		<link>
+			<name>platform/chip_826x</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/chip_826x</locationURI>
+		</link>
+		<link>
+			<name>platform/chip_8278</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/chip_8278</locationURI>
+		</link>
+		<link>
+			<name>platform/firmware_encrypt.h</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/tc32/firmware_encrypt.h</locationURI>
+		</link>
+		<link>
+			<name>platform/libfirmware_encrypt.a</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/tc32/libfirmware_encrypt.a</locationURI>
+		</link>
+		<link>
+			<name>platform/platform.h</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/platform.h</locationURI>
+		</link>
+		<link>
+			<name>platform/services</name>
+			<type>2</type>
+			<locationURI>virtual:/virtual</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/8258</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/8258</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/826x</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/826x</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/8278</name>
+			<type>2</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/8278</locationURI>
+		</link>
+		<link>
+			<name>platform/boot/link_cfg.S</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/boot/link_cfg.S</locationURI>
+		</link>
+		<link>
+			<name>platform/services/irq_handler.c</name>
+			<type>1</type>
+			<locationURI>PARENT-2-PROJECT_LOC/platform/services/b85m/irq_handler.c</locationURI>
+		</link>
+	</linkedResources>
+</projectDescription>
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/boot_8258.link b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/boot_8258.link
new file mode 100644
index 00000000..fd89300e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/boot_8258.link
@@ -0,0 +1,133 @@
+/********************************************************************************************************
+ * @file    boot_8258.link
+ *
+ * @brief   This is the link file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+/* to tell the linker the program begin from __start label in cstartup.s, thus do not treat it as a unused symbol */
+ENTRY(__start)
+
+SECTIONS
+{
+    . = 0x0;
+    .vectors :
+    {
+    *(.vectors)
+    *(.vectors.*)	/* MUST as follows, when compile with -ffunction-sections -fdata-sections, session name may changed */
+    }
+    
+    . = (. * (1 - __BOOT_LOADER_IMAGE)) + (__FW_RAMCODE_SIZE_MAX * __BOOT_LOADER_IMAGE);
+    .ram_code :
+    {
+    *(.ram_code)
+    *(.ram_code.*)
+    }
+    
+    . = (((. + 15) / 16)*16);       /* must 16 byte align if use "AT" for ".text" */
+    PROVIDE(_rstored_ = . );
+    
+	PROVIDE(_ramcode_size_ = . );
+	PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
+	PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
+	PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) * 16);
+	PROVIDE(_ramcode_size_align_256_ = ( (. + 255) / 256) * 256);
+	
+	. = (_rstored_ + __FW_OFFSET);
+	.text :
+		AT(_rstored_)
+	    {
+	    *(.text)
+	    *(.text.*)
+	    }
+	.rodata :
+	    {
+	    *(.rodata)
+	    *(.rodata.*)
+	    }
+	
+	. = (((. + 3) / 4)*4);
+        PROVIDE(_dstored_ = .);						/*location in flash*/
+        PROVIDE(_dstored_bin_ = . - __FW_OFFSET);   /*location in bin*/
+        PROVIDE(_code_size_ = . - __FW_OFFSET); 
+          
+
+	
+	. = 0x840900 + _ramcode_size_align_256_;
+	    .data :
+	      AT ( _dstored_bin_ )
+	     {
+	. = (((. + 3) / 4)*4);
+	     PROVIDE(_start_data_ = . );
+	     *(.data);
+	     *(.data.*);
+	. = (((. + 3) / 4)*4);
+	     PROVIDE(_end_data_ = . );
+	     }
+	
+	    .bss :
+	    {
+	. = (((. + 3) / 4)*4);
+		PROVIDE(_start_bss_ = .);
+	    *(.sbss)
+	    *(.sbss.*)
+	    *(.bss)
+	    *(.bss.*)
+	    }
+		PROVIDE(_end_bss_ = .);
+    
+    /* ASSERT((_end_bss_ < 0x848000), "RETENTION OVERFOLWN!!!!!") */
+    
+     . = (((. + 3) / 4)*4);
+    PROVIDE(_custom_stored_ = _dstored_ + _end_data_ - _start_data_);
+    PROVIDE(_custom_stored_bin_ = _dstored_bin_ + _end_data_ - _start_data_);
+     
+    .custom_data :
+     AT ( _custom_stored_bin_ )
+    {
+		PROVIDE(_start_custom_data_ = .);
+		*(.custom_data);
+		*(.custom_data.*);
+		PROVIDE(_end_custom_data_ = .);
+    }
+    .custom_bss(NOLOAD) :
+    {
+		PROVIDE(_start_custom_bss_ = .);
+		*(.custom_bss);
+		*(.custom_bss.*);
+		PROVIDE(_end_custom_bss_ = .);
+    }
+    
+    .sdk_version :
+	 AT ( _custom_stored_bin_ + _end_custom_data_ - _start_custom_data_ )
+	{
+		KEEP(*(.sdk_version));
+	    KEEP(*(.sdk_version.*));
+	}
+    
+    PROVIDE(_bin_size_ = _code_size_ + _end_data_ - _start_data_ + _end_custom_data_ - _start_custom_data_ + SIZEOF(.sdk_version));
+    PROVIDE(_bin_size_div_16 = ( _bin_size_ + 15 ) / 16 );
+    PROVIDE(_ictag_start_ = 0x840000 + _ramcode_size_align_256_);
+    PROVIDE(_ictag_end_ = 0x840000 + _ramcode_size_align_256_ + 0x100);
+    PROVIDE(_stack_end_ = (((_end_custom_bss_ + SIZEOF(.sdk_version) + 0x800) + 255) / 256 ) * 256);
+    
+    ASSERT((_stack_end_ < 0x850000), "STACK OVERFOLWN!!!!!")
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/cstartup_8258.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/cstartup_8258.S
new file mode 100644
index 00000000..0dc41ed1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8258/cstartup_8258.S
@@ -0,0 +1,503 @@
+/********************************************************************************************************
+ * @file    cstartup_8258.S
+ *
+ * @brief   This is the boot file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifdef MCU_STARTUP_8258
+
+#include "version_cfg.h"
+
+#define MCU_RUN_SRAM_EN			  			0 /*caution: update the configuation in boot.link */
+
+#if MCU_RUN_SRAM_EN
+	#define  FLL_STK_EN           			0
+	#define  ZERO_IC_TAG_EN		  			0
+
+	#if MCU_8258_A0
+		#define  DCDC_POWER_ON        		1
+	#else
+		#define  DCDC_POWER_ON        		0
+	#endif
+
+	#define  IC_TAG_CACHE_ADDR_EQU_EN    	1
+	#define  FLASH_WAKEUP_EN                1
+	#define  COPY_DATA_EN					0
+	#define  MULTI_ADDRESS_START			1
+	#define  MOVE_BIN_CODE_EN				1
+#else
+
+	#define  FLL_STK_EN           			1
+	#define  ZERO_IC_TAG_EN		  			1
+
+	#if MCU_8258_A0
+		#define  DCDC_POWER_ON        		1
+	#else
+		#define  DCDC_POWER_ON        		0
+	#endif
+
+	#define  IC_TAG_CACEH_ADDR_EQU_EN    	0
+	#define  FLASH_WAKEUP_EN                1
+	#define  COPY_DATA_EN					1
+	#define  MULTI_ADDRESS_START			1
+	#define  MOVE_BIN_CODE_EN				0
+#endif
+
+#ifndef __LOAD_RAM_SIZE__
+#define	__LOAD_RAM_SIZE__		0xc
+#endif
+
+#ifndef __IRQ_STK_SIZE__
+#define	__IRQ_STK_SIZE__		0x200
+#endif
+	.code	16
+@********************************************************************************************************
+@                                           MACROS AND DEFINIITIONS
+@********************************************************************************************************
+
+					@ Mode, correspords to bits 0-5 in CPSR
+	.equ MODE_BITS,		0x1F	@ Bit mask for mode bits in CPSR
+	.equ IRQ_MODE, 		0x12	@ Interrupt Request mode
+	.equ SVC_MODE, 		0x13	@ Supervisor mode 
+	.equ IRQ_STK_SIZE,	__IRQ_STK_SIZE__
+	.equ __LOAD_RAM, 	__LOAD_RAM_SIZE__
+	
+@********************************************************************************************************
+@                                            TC32 EXCEPTION VECTORS
+@********************************************************************************************************
+
+	.section	.vectors,"ax"
+	.global		__reset
+	.global	 	__irq
+	.global 	__start
+	.global		__LOAD_RAM
+
+__start:					@ MUST,  referenced by boot.link
+
+	.extern irq_handler
+
+	.extern  _ramcode_size_div_16_
+	.extern  _ramcode_size_div_256_
+	.extern  _ramcode_size_div_16_align_256_
+	.extern  _ramcode_size_align_256_
+	.extern  _ictag_start_
+	.extern  _ictag_end_
+	.extern  tl_multi_addr
+
+	.extern FILE_VERSION
+	.extern MANUFACTURER_CODE_TELINK
+	.extern IMAGE_TYPE
+
+	.org 0x0
+	tj	__reset
+	.word	(FILE_VERSION)
+	.org 0x8
+	.word	(0x544c4e4b)
+#if MOVE_BIN_CODE_EN
+	.word	(0x00880000 + _bin_size_div_16)
+#else
+	.word	(0x00880000 + _ramcode_size_div_16_align_256_)
+#endif
+
+	.org 0x10
+	tj		__irq
+
+	.org 0x12
+	.short  (MANUFACTURER_CODE_TELINK)
+	.short  (IMAGE_TYPE)
+
+	.org 0x18
+	.word	(_bin_size_)
+	.extern  main
+
+	.org 0x20
+
+	.global	start_suspend
+	.thumb_func
+	.type	start_suspend, %function
+
+start_suspend:						@ instruction cache address + 0x58: 0x3c16 * 4 = 0xf058
+	tpush   {r2-r3}
+
+    tmovs	r2, #129				@0x81
+    tloadr	r3, __suspend_data      @0x80006f
+    tstorerb	r2, [r3, #0]		@*(volatile unsigned char *)0x80006f = 0x81
+
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+    tmov	r8, r8
+
+    tpop	{r2-r3}
+    tjex	lr
+	.align 4
+__suspend_data:
+	.word   (0x80006f)
+
+__reset:
+
+@********************************************************************************************************
+@                              		 FILL .STK WITH 0xFF
+@********************************************************************************************************
+#if FLL_STK_EN
+	tloadr	r0, FLL_D						@r0 = 0xffffffff
+	tloadr	r1, FLL_D+4						@r1 = _end_custom_bss_
+	tloadr	r2, FLL_D+8						@r2 = _stack_end_
+FLL_STK:
+	tcmp	r1, r2							@
+	tjge	FLL_STK_END						@r1>=r2 jump to FLL_STK_END
+	tstorer r0, [r1, #0]					@*(unsigned int*)(_start_data_)=0xffffffff
+	tadd    r1, #4							@r1 = r1+4
+	tj		FLL_STK							@jump to FLL_STK
+FLL_STK_END:
+#endif
+@********************************************************************************************************
+@                              		 UPDATE SP UNDER IRQ/SVC MODE
+@********************************************************************************************************
+	tloadr	r0, DAT0						@r0 = 0x12 IRQ
+	tmcsr	r0								@CPSR=r0
+	tloadr	r0, DAT0 + 8					@r0 = irq_stk + IRQ_STK_SIZE
+	tmov	r13, r0  						@r13/SP= r0    	update SP under IRQ mode
+
+	tloadr	r0, DAT0 + 4					@r0 = 0x13 SVC
+	tmcsr	r0								@CPSR=r0
+	tloadr	r0, DAT0 + 12					@r0 = _stack_end_
+	tmov	r13, r0  						@r13= r0		update SP under SVC mode
+@********************************************************************************************************
+@                                    IC TAG INITIALIZATION
+@********************************************************************************************************
+#if ZERO_IC_TAG_EN
+ZERO_TAG:
+	tmov    r0, #0
+	tloadr	r1, DAT0 + 28					@r1 = _ictag_start_
+	tloadr	r2, DAT0 + 32					@r2 = _ictag_end_
+ZERO_TAG_BEGIN:
+	tcmp	r1, r2
+	tjge	ZERO_TAG_END					@r1>=r2 jump to ZERO_TAG_END
+	tstorer	r0, [r1, #0]					@*(unsigned int*)(_ictag_start_)=r0=0
+	tadd    r1, #4							@r1 = r1 + 4
+	tj		ZERO_TAG_BEGIN					@jump to ZERO_TAG_BEGIN
+ZERO_TAG_END:
+#endif
+@********************************************************************************************************
+@                                    IC CACHE INITIALIZATION
+@********************************************************************************************************
+SET_IC:
+	tloadr     	r1, DAT0 + 24				@ r1 = 0x80060c
+	tloadr      r0, DAT0 + 36				@ r0 = _ramcode_size_align_256_
+	tshftr      r0,r0,#8                    @ r0 = _ramcode_size_align_256_/256
+	tstorerb	r0, [r1, #0]				@ *(unsigned int*)(0x80060c) = r0
+#if IC_TAG_CACHE_ADDR_EQU_EN
+
+#else
+	tadd    	r0, #1						@ r0 = r0 + 1
+#endif
+	tstorerb	r0, [r1, #1]				@ *(unsigned int*)(0x80060d) = r0
+SET_IC_END:
+@********************************************************************************************************
+@                                    DCDC INITIALIZATION FOR FLASH
+@********************************************************************************************************
+	/*system on*/
+	tloadr      r0,DATA_I+32                @0x00800060
+	tloadr      r1,DATA_I+36                @0xff000000
+	tstorer     r1,[r0,#0]                  @*(unsigned int*)0x800060=0xff000000
+	tshftr      r1,r1,#24					@0x000000ff
+	tstorerb    r1,[r0,#4]
+	tstorerb    r1,[r0,#5]
+
+#if DCDC_POWER_ON
+	tloadrb		r0,DATA_I+44				@ana_reg_adr:0x0c
+	tloadrb		r1,DATA_I+48				@ana_reg_dat:0xc4
+WANA_REG_BEGIN:
+	tloadr		r3,DATA_I+28				@0x008000b8
+	tmov		r4,r0						@ana_reg_adr:0x80=128
+	tstorerb	r4,[r3,#0]					@*(unsigned int*)0x8000b8=0x80;
+	tmov   	    r4,r1						@ana_reg_dat:0x22=34
+	tstorerb	r4,[r3,#1]					@*(unsigned int*)0x8000b9=0x22;
+	tmov        r4,#96						@ana_reg_dat:0x60=96
+	tstorerb	r4,[r3,#2]					@*(unsigned int*)0x8000ba=0x60;
+WWAIT_REG_FINISH:
+	tloadrb	    r4,[r3,#2]
+	tshftl		r4,r4,#31
+	tshftr		r4,r4,#31
+	tcmp		r4,#1
+	tjeq		WWAIT_REG_FINISH
+	tmov        r4,#0
+	tstorerb	r4,[r3,#2]
+WANA_REG_END:
+#endif
+
+#if FLASH_WAKEUP_EN
+FLASH_WAKEUP_BEGIN:
+	tloadr      r0,DATA_I+44
+	tmov		r1,#0
+	tstorerb    r1,[r0,#1]
+	tmov        r1,#171						@Flash deep cmd: 0xAB
+	tstorerb    r1,[r0,#0]
+	tmov		r2,#0
+	tmov        r3,#6
+TNOP:
+	tadd        r2,#1
+	tcmp        r2,r3
+	tjle        TNOP
+	tmov		r1,#1
+	tstorerb    r1,[r0,#1]
+FLASH_WAKEUP_END:
+#endif
+
+    /*check ana_reg_0x7e*/
+	tloadr		r0,DATA_I+24				@0x7e
+RANA_REG_BEGIN:
+	tloadr		r1,DATA_I+28			    @0x008000b8
+	tmov		r2,r0						@ana_reg_adr:0x7e
+	tstorerb	r2,[r1,#0]					@*(unsigned int*)0x8000b8=0x7e;
+	tmov   	    r2,#64						@ana_reg_dat:0x40=64
+	tstorerb	r2,[r1,#2]					@*(unsigned int*)0x8000ba=0x40;
+RWAIT_REG_FINISH:
+	tloadrb	    r2,[r1,#2]
+	tshftl		r2,r2,#31
+	tshftr		r2,r2,#31
+	tcmp		r2,#1
+	tjeq		RWAIT_REG_FINISH
+	tloadrb	    r2,[r1,#1]
+RANA_REG_END:
+
+#if 0
+    tloadrb     r0,DATA_I+40
+	tstorerb    r2,[r0,#0]
+#endif
+	tmov        r0,#0
+	tcmp        r2,r0
+	/*if ana_reg_0x7e==0x00 retention data initiate after waking up from deep*/
+#if MULTI_ADDRESS_START
+	tjeq		MULTI_ADDRESS_END
+MULTI_ADDRESS_BEGIN:
+	tloadr      r0, MULTI_ADDRESS_DATA
+	tloadr		r1, MULTI_ADDRESS_DATA+4
+	tloadrb		r2, [r1,#0]
+	tstorerb    r2, [r0,#0]
+	tj			ZERO_BSS_END				@ deep wakeup with retention
+MULTI_ADDRESS_END:
+#endif
+@********************************************************************************************************
+@                                    DATA INITIALIZATION
+@********************************************************************************************************
+COPY_DATA:
+	tloadr		r1, DATA_I+12				@ r1 = _dstored_
+	tloadr		r2, DATA_I+16				@ r2 = _start_data_
+	tloadr		r3, DATA_I+20				@ r3 = _end_data_
+COPY_DATA_BEGIN:
+	tcmp		r2, r3						@
+	tjge		COPY_DATA_END				@ r2>=r3 jump to COPY_DATA_END
+	tloadr		r0, [r1, #0]				@ r0 = *(unsigned int*)(_dstored_)
+	tstorer 	r0, [r2, #0]				@ *(unsigned int*)(_start_data_) = r0
+	tadd    	r1, #4						@ r1 = r1 + 4
+	tadd		r2, #4						@ r2 = r2 + 4
+	tj			COPY_DATA_BEGIN				@ jump to COPY_DATA_BEGIN
+COPY_DATA_END:
+@********************************************************************************************************
+@                                    BSS INITIALIZATION FOR 0
+@********************************************************************************************************
+BSS_CLEAR:
+	tmov		r0, #0						@r0 = 0
+	tloadr		r1, DAT0 + 16				@r1 = _start_bss_
+	tloadr		r2, DAT0 + 20				@r2 = _end_bss_
+ZERO_BSS_BEGIN:
+	tcmp		r1, r2
+	tjge		ZERO_BSS_END				@r1>=r2 jump to ZERO_BSS_END
+	tstorer		r0, [r1, #0]				@*(unsigned int*)(_start_bss_)=r0=0
+	tadd    	r1, #4						@r1 = r1 + 4
+	tj			ZERO_BSS_BEGIN				@jump to ZERO_BSS_BEGIN
+ZERO_BSS_END:
+@********************************************************************************************************
+@                                    CUSTOM DATA INITIALIZATION
+@********************************************************************************************************
+COPY_CUSTOM_DATA:
+	tloadr		r1, DATA_I+52				@ r1 = _custom_stored_
+	tloadr		r2, DATA_I+56				@ r2 = _start_custom_data_
+	tloadr		r3, DATA_I+60				@ r3 = _end_custom_data_
+COPY_DATA_CUSTOM_BEGIN:
+	tcmp		r2, r3						@
+	tjge		COPY_DATA_CUSTOM_END		@ r2>=r3 jump to COPY_DATA_END
+	tloadr		r0, [r1, #0]				@ r0 = *(unsigned int*)(_dstored_)
+	tstorer 	r0, [r2, #0]				@ *(unsigned int*)(_start_data_) = r0
+	tadd    	r1, #4						@ r1 = r1 + 4
+	tadd		r2, #4						@ r2 = r2 + 4
+	tj			COPY_DATA_CUSTOM_BEGIN		@ jump to COPY_DATA_BEGIN
+COPY_DATA_CUSTOM_END:
+@********************************************************************************************************
+@                                    CUSTOM BSS INITIALIZATION FOR 0
+@********************************************************************************************************
+ZERO_CUSTOM_BSS:
+	tmov    r0, #0
+	tloadr	r1, DAT0 + 40					@r1 = _start_custom_
+	tloadr	r2, DAT0 + 44					@r2 = _end_custom_
+ZERO_BSS_CUSTOM_BEGIN:
+	tcmp	r1, r2
+	tjge	ZERO_BSS_CUSTOM_END				@r1>=r2 jump to ZERO_BSS_END
+	tstorer	r0, [r1, #0]					@*(unsigned int*)(_start_bss_)=r0=0
+	tadd    r1, #4							@r1 = r1 + 4
+	tj		ZERO_BSS_CUSTOM_BEGIN			@jump to ZERO_BSS_BEGIN
+ZERO_BSS_CUSTOM_END:
+
+
+ENTER_MAIN:
+	tjl	main
+END:	tj	END
+
+	.balign	4
+DAT0:
+	.word	0x12			    		@0		IRQ
+	.word	0x13			    		@4		SVC
+	.word	(irq_stk + IRQ_STK_SIZE)	@8
+	.word	(_stack_end_)		    	@12  	stack end
+	.word	(_start_bss_)               @16
+	.word	(_end_bss_)                 @20
+	.word	(0x80060c)                  @24
+	.word	_ictag_start_               @28		IC tag start
+	.word	_ictag_end_	            	@32		IC tag end
+#if IC_TAG_CACHE_ADDR_EQU_EN
+	.word	(0x00f000)    				@36
+#endif
+	.word	_ramcode_size_align_256_    @36
+	.word	_start_custom_bss_          @40
+	.word	_end_custom_bss_	        @44
+
+DATA_I:	
+	.word   (_rstored_)                 @0
+	.word   (0x0000007e)    			@4
+    .word   (0x0000007e)      			@8
+	.word	_dstored_					@12
+	.word	_start_data_				@16
+	.word	_end_data_					@20
+    .word	(0x0000007e)                @24
+	.word	(0x008000b8)                @28
+	.word	(0x00800060)                @32
+    .word	(0xff000000)                @36
+    .word	(0x00800000)                @40
+	.word	(0x0080000c)                @44
+	.word	(0x000000c4)                @48
+	.word	_custom_stored_				@52
+	.word	_start_custom_data_			@56
+	.word	_end_custom_data_			@60
+FLL_D:
+	.word	0xffffffff                	@0
+	.word	(_end_custom_bss_)  		@4
+	.word	(_stack_end_)               @8
+	.word   _ramcode_size_div_256_      @12
+MULTI_ADDRESS_DATA:
+	.word	(0x0080063e)				@0
+	.word   tl_multi_addr				@4
+
+	.align 4
+__irq:
+	tpush    	{r14}					@push R14/LR register
+	tpush    	{r0-r7}					@push r0~r7 into stack
+	tmrss    	r0						@save cpsr to r0
+	
+	tmov		r1, r8					@r8~r12 cannot use the way like {r0~r7} to push into stack
+	tmov		r2, r9					@must move r8~r12 into r1~r5 to push
+	tmov		r3, r10
+	tmov		r4, r11
+	tmov		r5, r12
+	tpush		{r0-r5}
+	
+	tjl      	irq_handler				@jump to irq_handler
+
+	tpop		{r0-r5}					@pop r8~r12
+	tmov		r8, r1
+	tmov		r9, r2
+	tmov		r10,r3
+	tmov		r11,r4
+	tmov		r12,r5
+
+	tmssr    	r0						@return r0 to cpsr
+	tpop		{r0-r7}					@pop r0~r7
+	treti    	{r15}					@return to pc
+
+ASMEND:
+	.section .bss
+	.align 4
+	.lcomm irq_stk, IRQ_STK_SIZE
+	.end
+
+#endif	/* MCU_STARTUP_8258 */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/boot_826x.link b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/boot_826x.link
new file mode 100644
index 00000000..3c53393f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/boot_826x.link
@@ -0,0 +1,104 @@
+/********************************************************************************************************
+ * @file    boot_826x.link
+ *
+ * @brief   This is the link file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+/* to tell the linker the program begin from __start label in cstartup.s, thus do not treat it as a unused symbol */
+ENTRY(__start)
+
+SECTIONS
+{
+	. = 0x0;
+    .vectors :
+    {
+    *(.vectors)
+    *(.vectors.*)	/* MUST as follows, when compile with -ffunction-sections -fdata-sections, session name may changed */
+    }
+    
+    . = (. * (1 - __BOOT_LOADER_IMAGE)) + (__FW_RAMCODE_SIZE_MAX * __BOOT_LOADER_IMAGE);
+    .ram_code :
+    {
+    *(.ram_code)
+    *(.ram_code.*)
+    }
+    
+    . = (((. + 15) / 16)*16);       /* must 16 byte align if use "AT" for ".text" */
+    PROVIDE(_rstored_ = . );
+    
+   	PROVIDE(_ramcode_size_ = . );
+	PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
+	PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
+	PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) * 16);
+	
+    . = (_rstored_ + __FW_OFFSET);
+    .text :
+    	AT(_rstored_)
+        {
+        *(.text)
+        *(.text.*)
+        }
+    .rodata :
+        {
+        *(.rodata)
+        *(.rodata.*)
+        }
+
+   	. = (((. + 3) / 4)*4);
+        PROVIDE(_dstored_ = .);                     /*location in flash*/
+        PROVIDE(_dstored_bin_ = . - __FW_OFFSET);   /*location in bin*/
+        PROVIDE(_code_size_ = . - __FW_OFFSET);
+
+	. = 0x808900 + _ramcode_size_div_256_ * 0x100;	/* 0x100 alighned, must greater than or equal to:0x808000 + ram_code_size +  irq_vector(0x100) + IC_tag(0x100) + IC_cache(0x800) == 0x808a00 + ram_code_size */
+        .data :
+          AT ( _dstored_bin_ )
+         {
+    	. = (((. + 3) / 4)*4);
+         PROVIDE(_start_data_ = . );
+         *(.data);
+         *(.data.*);
+    	. = (((. + 3) / 4)*4);
+         PROVIDE(_end_data_ = . );
+         }
+
+        .bss :
+        {
+	. = (((. + 3) / 4)*4);
+		PROVIDE(_start_bss_ = .);
+        *(.sbss)
+        *(.sbss.*)
+        *(.bss)
+        *(.bss.*)
+        }
+    	PROVIDE(_end_bss_ = .);
+    	
+    .sdk_version :
+	 AT ( _dstored_bin_ + _end_data_ - _start_data_ )
+	{
+		KEEP(*(.sdk_version));
+	    KEEP(*(.sdk_version.*));
+	}
+    	
+    	PROVIDE(_bin_size_ = _code_size_ + _end_data_ - _start_data_ + SIZEOF(.sdk_version));
+    	PROVIDE(_ictag_start_ = 0x808000 + (_ramcode_size_div_256_) * 0x100);
+    	PROVIDE(_ictag_end_ = 0x808000 + (_ramcode_size_div_256_ + 1) * 0x100);
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/cstartup_826x.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/cstartup_826x.S
new file mode 100644
index 00000000..aa328bc0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/826x/cstartup_826x.S
@@ -0,0 +1,245 @@
+/********************************************************************************************************
+ * @file    cstartup_826x.S
+ *
+ * @brief   This is the boot file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifdef MCU_CORE_826x
+
+#include "version_cfg.h"
+
+#ifndef __LOAD_RAM_SIZE__
+#define	__LOAD_RAM_SIZE__		0xc
+#endif
+
+#ifndef __IRQ_STK_SIZE__
+#define	__IRQ_STK_SIZE__		0x200
+#endif
+	.code	16
+@********************************************************************************************************
+@                                           MACROS AND DEFINIITIONS
+@********************************************************************************************************
+					@ Mode, correspords to bits 0-5 in CPSR
+	.equ MODE_BITS,		0x1F	@ Bit mask for mode bits in CPSR
+	.equ IRQ_MODE, 		0x12	@ Interrupt Request mode
+	.equ SVC_MODE, 		0x13	@ Supervisor mode 
+
+	.equ IRQ_STK_SIZE,	__IRQ_STK_SIZE__
+	.equ __LOAD_RAM, 	__LOAD_RAM_SIZE__
+	
+#ifdef CHIP_8269
+	.equ RAM_ADDR_END,	0x810000 	@for 8269
+#else
+	.equ RAM_ADDR_END,	0x80c000  	@for 8267
+#endif
+@********************************************************************************************************
+@                                            TC32 EXCEPTION VECTORS
+@********************************************************************************************************
+
+	.section	.vectors,"ax"
+	.global		__reset
+	.global	 	__irq
+	.global 	__start
+	.global		__LOAD_RAM
+
+__start:					@ MUST,  referenced by boot.link
+
+	.extern irq_handler
+
+
+	.extern  _ramcode_size_div_16_
+	.extern  _ramcode_size_div_256_
+	.extern  _ramcode_size_div_16_align_256_
+	.extern  _ictag_start_
+	.extern  _ictag_end_
+
+	.extern FILE_VERSION
+	.extern MANUFACTURER_CODE_TELINK
+	.extern IMAGE_TYPE
+
+	.org 0x0
+	tj	__reset
+	.word	(FILE_VERSION)
+	.org 0x8
+	.word	(0x544c4e4b)
+	.word	(0x00880000 + _ramcode_size_div_16_align_256_)
+
+	.org 0x10
+	tj		__irq
+
+	.org 0x12
+	.short  (MANUFACTURER_CODE_TELINK)
+	.short  (IMAGE_TYPE)
+
+	.org 0x18
+	.word	(_bin_size_)//Firmware size
+
+@********************************************************************************************************
+@                                   LOW-LEVEL INITIALIZATION
+@********************************************************************************************************
+	.extern  main
+
+	.org 0x20
+__reset:
+
+	@add debug, PC4 output 1
+@	tloadr		r1, GPIO_PC4	@0x800592	PC4 open
+@	tmov		r0,	#139		@0b11101111 = 0xef = #139
+@	tstorerb	r0, [r1, #0]
+@	tmov		r0, #16			@0b00010000 = 0x10 = #16
+@	tstorerb	r0, [r1, #1]	@0x800593	PC4 output
+
+	tloadr	r0, FLL_D
+	tloadr	r1, FLL_D+4
+	tloadr	r2, FLL_D+8
+
+FLL_STK:
+	tcmp	r1, r2
+	tjge	FLL_STK_END
+	tstorer r0, [r1, #0]
+	tadd    r1, #4
+	tj		FLL_STK
+FLL_STK_END:
+
+	tloadr	r0, DAT0
+	tmcsr	r0			
+	tloadr	r0, DAT0 + 8
+	tmov	r13, r0  
+
+	tloadr	r0, DAT0 + 4
+	tmcsr	r0	
+	tloadr	r0, DAT0 + 12
+	tmov	r13, r0  
+
+	tmov	r0, #0
+	tloadr	r1, DAT0 + 16
+	tloadr	r2, DAT0 + 20
+
+ZERO:
+	tcmp	r1, r2
+	tjge	ZERO_END
+	tstorer	r0, [r1, #0]
+	tadd    r1, #4
+	tj		ZERO
+ZERO_END:
+
+	tloadr	r1, DAT0 + 28
+	tloadr	r2, DAT0 + 32
+
+ZERO_TAG:
+	tcmp	r1, r2
+	tjge	ZERO_TAG_END
+	tstorer	r0, [r1, #0]
+	tadd    r1, #4
+	tj		ZERO_TAG
+ZERO_TAG_END:
+
+SETIC:
+	tloadr     	r1, DAT0 + 24
+	tloadr      r0, DAT0 + 36					@ IC tag start
+	tstorerb	r0, [r1, #0]
+	tadd    	r0, #1							@ IC tag end
+	tstorerb	r0, [r1, #1]
+	@tmov		r0, #0;
+	@tstorerb	r0, [r1, #2]
+
+
+	tloadr		r1, DATA_I
+	tloadr		r2, DATA_I+4
+	tloadr		r3, DATA_I+8
+COPY_DATA:
+	tcmp		r2, r3
+	tjge		COPY_DATA_END
+	tloadr		r0, [r1, #0]
+	tstorer 	r0, [r2, #0]
+	tadd    	r1, #4
+	tadd		r2, #4
+	tj			COPY_DATA
+COPY_DATA_END:
+
+	tjl	main
+END:	tj	END
+
+	.balign	4
+DAT0:
+	.word	0x12			    @IRQ    @0
+	.word	0x13			    @SVC    @4
+	.word	(irq_stk + IRQ_STK_SIZE)
+	.word	(RAM_ADDR_END)		@12  stack end
+	.word	(_start_bss_)               @16
+	.word	(_end_bss_)                 @20
+	.word	(0x80060c)                  @24
+	.word	_ictag_start_               @28		@ IC tag start
+	.word	_ictag_end_	            	@32		@ IC tag end
+	.word	_ramcode_size_div_256_		@36
+
+@	.word	(0x80058c)                  @36		gpio
+@	.word	(0x800620)                  @40		watchdog
+@	.word	(0x802c01)                  @44		watchdog
+DATA_I:	
+	.word	_dstored_
+	.word	_start_data_
+	.word	_end_data_
+	.word	_rstored_
+
+@GPIO_PC4:
+@	.word	(0x800592)
+
+FLL_D:
+	.word	0xffffffff
+	.word	(_start_data_)
+	.word	(RAM_ADDR_END)
+
+	.align 4
+__irq:
+	tpush    	{r14}
+	tpush    	{r0-r7}
+	tmrss    	r0
+	
+	tmov		r1, r8
+	tmov		r2, r9
+	tmov		r3, r10
+	tmov		r4, r11
+	tmov		r5, r12
+	tpush		{r0-r5}
+	
+	tjl      	irq_handler
+
+	tpop		{r0-r5}
+	tmov		r8, r1
+	tmov		r9, r2
+	tmov		r10,r3
+	tmov		r11,r4
+	tmov		r12,r5
+
+	tmssr    	r0
+	tpop		{r0-r7}
+	treti    	{r15}
+
+ASMEND:
+
+	.section .bss
+	.align 4
+	.lcomm irq_stk, IRQ_STK_SIZE
+	.end
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/boot_8278.link b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/boot_8278.link
new file mode 100644
index 00000000..66415850
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/boot_8278.link
@@ -0,0 +1,133 @@
+/********************************************************************************************************
+ * @file    boot_8278.link
+ *
+ * @brief   This is the link file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+/* to tell the linker the program begin from __start label in cstartup.s, thus do not treat it as a unused symbol */
+ENTRY(__start)
+
+SECTIONS
+{
+    . = 0x0;
+    .vectors :
+    {
+    *(.vectors)
+    *(.vectors.*)	/* MUST as follows, when compile with -ffunction-sections -fdata-sections, session name may changed */
+    }
+    
+    . = (. * (1 - __BOOT_LOADER_IMAGE)) + (__FW_RAMCODE_SIZE_MAX * __BOOT_LOADER_IMAGE);
+    .ram_code :
+    {
+    *(.ram_code)
+    *(.ram_code.*)
+    }
+    
+    . = (((. + 15) / 16)*16);       /* must 16 byte align if use "AT" for ".text" */
+    PROVIDE(_rstored_ = . );
+    
+	PROVIDE(_ramcode_size_ = . );
+	PROVIDE(_ramcode_size_div_16_ = (. + 15 ) / 16);
+	PROVIDE(_ramcode_size_div_256_ = (. + 255) / 256);
+	PROVIDE(_ramcode_size_div_16_align_256_ = ( (. + 255) / 256) * 16);
+	PROVIDE(_ramcode_size_align_256_ = ( (. + 255) / 256) * 256);
+	
+	. = (_rstored_ + __FW_OFFSET);
+	.text :
+		AT(_rstored_)
+	    {
+	    *(.text)
+	    *(.text.*)
+	    }
+	.rodata :
+	    {
+	    *(.rodata)
+	    *(.rodata.*)
+	    }
+	
+	. = (((. + 3) / 4)*4);
+        PROVIDE(_dstored_ = .);						/*location in flash*/
+        PROVIDE(_dstored_bin_ = . - __FW_OFFSET);   /*location in bin*/
+        PROVIDE(_code_size_ = . - __FW_OFFSET);
+          
+
+	
+	. = 0x840900 + _ramcode_size_align_256_;
+	    .data :
+	      AT ( _dstored_bin_ )
+	     {
+	. = (((. + 3) / 4)*4);
+	     PROVIDE(_start_data_ = . );
+	     *(.data);
+	     *(.data.*);
+	. = (((. + 3) / 4)*4);
+	     PROVIDE(_end_data_ = . );
+	     }
+	
+	    .bss :
+	    {
+	. = (((. + 3) / 4)*4);
+		PROVIDE(_start_bss_ = .);
+	    *(.sbss)
+	    *(.sbss.*)
+	    *(.bss)
+	    *(.bss.*)
+	    }
+		PROVIDE(_end_bss_ = .);
+    
+    /* ASSERT((_end_bss_ < 0x848000), "RETENTION OVERFOLWN!!!!!") */
+    
+     . = (((. + 3) / 4)*4);
+    PROVIDE(_custom_stored_ = _dstored_ + _end_data_ - _start_data_);
+    PROVIDE(_custom_stored_bin_ = _dstored_bin_ + _end_data_ - _start_data_);
+     
+    .custom_data :
+     AT ( _custom_stored_bin_ )
+    {
+		PROVIDE(_start_custom_data_ = .);
+		*(.custom_data);
+		*(.custom_data.*);
+		PROVIDE(_end_custom_data_ = .);
+    }
+    .custom_bss(NOLOAD) :
+    {
+		PROVIDE(_start_custom_bss_ = .);
+		*(.custom_bss);
+		*(.custom_bss.*);
+		PROVIDE(_end_custom_bss_ = .);
+    }
+    
+    .sdk_version :
+	 AT ( _custom_stored_bin_ + _end_custom_data_ - _start_custom_data_ )
+	{
+		KEEP(*(.sdk_version));
+	    KEEP(*(.sdk_version.*));
+	}
+    
+    PROVIDE(_bin_size_ = _code_size_ + _end_data_ - _start_data_ + _end_custom_data_ - _start_custom_data_ + SIZEOF(.sdk_version));
+    PROVIDE(_bin_size_div_16 = ( _bin_size_ + 15 ) / 16 );
+    PROVIDE(_ictag_start_ = 0x840000 + _ramcode_size_align_256_);
+    PROVIDE(_ictag_end_ = 0x840000 + _ramcode_size_align_256_ + 0x100);
+    PROVIDE(_stack_end_ = (((_end_custom_bss_ + SIZEOF(.sdk_version) + 0x800) + 255) / 256 ) * 256);
+    
+    ASSERT((_stack_end_ < 0x850000), "STACK OVERFOLWN!!!!!")
+}
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/cstartup_8278.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/cstartup_8278.S
new file mode 100644
index 00000000..4eb5502f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/8278/cstartup_8278.S
@@ -0,0 +1,399 @@
+/********************************************************************************************************
+ * @file    cstartup_8278.S
+ *
+ * @brief   This is the boot file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifdef MCU_STARTUP_8278
+
+#include "version_cfg.h"
+
+#define MCU_RUN_SRAM_EN			  			0 /*caution: update the configuation in boot.link */
+
+#if MCU_RUN_SRAM_EN
+	#define  FLL_STK_EN           			0
+	#define  ZERO_IC_TAG_EN		  			0
+	#define  IC_TAG_CACHE_ADDR_EQU_EN    	1
+	#define  FLASH_WAKEUP_EN                1
+	#define  COPY_DATA_EN					0
+	#define  MULTI_ADDRESS_START			1
+	#define  MOVE_BIN_CODE_EN				1
+#else
+
+	#define  FLL_STK_EN           			1
+	#define  ZERO_IC_TAG_EN		  			1
+	#define  IC_TAG_CACEH_ADDR_EQU_EN    	0
+	#define  FLASH_WAKEUP_EN                1
+	#define  COPY_DATA_EN					1
+	#define  MULTI_ADDRESS_START			1
+	#define  MOVE_BIN_CODE_EN				0
+#endif
+
+#ifndef __LOAD_RAM_SIZE__
+#define	__LOAD_RAM_SIZE__		0xc
+#endif
+
+#ifndef __IRQ_STK_SIZE__
+#define	__IRQ_STK_SIZE__		0x200
+#endif
+	.code	16
+@********************************************************************************************************
+@                                           MACROS AND DEFINIITIONS
+@********************************************************************************************************
+
+					@ Mode, correspords to bits 0-5 in CPSR
+	.equ MODE_BITS,		0x1F	@ Bit mask for mode bits in CPSR
+	.equ IRQ_MODE, 		0x12	@ Interrupt Request mode
+	.equ SVC_MODE, 		0x13	@ Supervisor mode 
+	.equ IRQ_STK_SIZE,	__IRQ_STK_SIZE__
+	.equ __LOAD_RAM, 	__LOAD_RAM_SIZE__
+	
+@********************************************************************************************************
+@                                            TC32 EXCEPTION VECTORS
+@********************************************************************************************************
+
+	.section	.vectors,"ax"
+	.global		__reset
+	.global	 	__irq
+	.global 	__start
+	.global		__LOAD_RAM
+
+__start:					@ MUST,  referenced by boot.link
+
+	.extern irq_handler
+
+	.extern  _ramcode_size_div_16_
+	.extern  _ramcode_size_div_256_
+	.extern  _ramcode_size_div_16_align_256_
+	.extern  _ramcode_size_align_256_
+	.extern  _ictag_start_
+	.extern  _ictag_end_
+	.extern  tl_multi_addr_L
+	.extern  tl_multi_addr_H
+
+	.extern FILE_VERSION
+	.extern MANUFACTURER_CODE_TELINK
+	.extern IMAGE_TYPE
+
+	.org 0x0
+	tj	__reset
+	.word	(FILE_VERSION)
+	.org 0x8
+	.word	(0x544c4e4b)
+#if MOVE_BIN_CODE_EN
+	.word	(0x00880000 + _bin_size_div_16)
+#else
+	.word	(0x00880000 + _ramcode_size_div_16_align_256_)
+#endif
+
+	.org 0x10
+	tj		__irq
+
+	.org 0x12
+	.short  (MANUFACTURER_CODE_TELINK)
+	.short  (IMAGE_TYPE)
+
+	.org 0x18
+	.word	(_bin_size_)
+	.extern  main
+
+	.org 0x20
+
+__reset:
+
+#if FLASH_WAKEUP_EN
+
+FLASH_WAKEUP_BEGIN:
+	tloadr      r0,DATA_I+44
+	tmov		r1,#0
+	tstorerb    r1,[r0,#1]
+	tmov        r1,#171						@Flash deep cmd: 0xAB
+	tstorerb    r1,[r0,#0]
+	tmov		r2,#0
+	tmov        r3,#6
+TNOP:
+	tadd        r2,#1
+	tcmp        r2,r3
+	tjle        TNOP
+	tmov		r1,#1
+	tstorerb    r1,[r0,#1]
+FLASH_WAKEUP_END:
+
+#endif
+
+@ efuse load need delay about 18us
+	tmov 	r2,#0
+	tmov 	r3,#110
+EFUSE_DELAY:
+	tadd 	r2,#1
+	tcmp 	r2,r3
+	tjle 	EFUSE_DELAY
+EFUSE_DELAY_END:
+
+@********************************************************************************************************
+@                              		 FILL .STK WITH 0xFF
+@********************************************************************************************************
+#if FLL_STK_EN
+	tloadr	r0, FLL_D						@r0 = 0xffffffff
+	tloadr	r1, FLL_D+4						@r1 = _end_custom_bss_
+	tloadr	r2, FLL_D+8						@r2 = _stack_end_
+FLL_STK:
+	tcmp	r1, r2							@
+	tjge	FLL_STK_END						@r1>=r2 jump to FLL_STK_END
+	tstorer r0, [r1, #0]					@*(unsigned int*)(_start_data_)=0xffffffff
+	tadd    r1, #4							@r1 = r1+4
+	tj		FLL_STK							@jump to FLL_STK
+FLL_STK_END:
+#endif
+@********************************************************************************************************
+@                              		 UPDATE SP UNDER IRQ/SVC MODE
+@********************************************************************************************************
+	tloadr	r0, DAT0						@r0 = 0x12 IRQ
+	tmcsr	r0								@CPSR=r0
+	tloadr	r0, DAT0 + 8					@r0 = irq_stk + IRQ_STK_SIZE
+	tmov	r13, r0  						@r13/SP= r0    	update SP under IRQ mode
+
+	tloadr	r0, DAT0 + 4					@r0 = 0x13 SVC
+	tmcsr	r0								@CPSR=r0
+	tloadr	r0, DAT0 + 12					@r0 = _stack_end_
+	tmov	r13, r0  						@r13= r0		update SP under SVC mode
+@********************************************************************************************************
+@                                    IC TAG INITIALIZATION
+@********************************************************************************************************
+#if ZERO_IC_TAG_EN
+ZERO_TAG:
+	tmov    r0, #0
+	tloadr	r1, DAT0 + 28					@r1 = _ictag_start_
+	tloadr	r2, DAT0 + 32					@r2 = _ictag_end_
+ZERO_TAG_BEGIN:
+	tcmp	r1, r2
+	tjge	ZERO_TAG_END					@r1>=r2 jump to ZERO_TAG_END
+	tstorer	r0, [r1, #0]					@*(unsigned int*)(_ictag_start_)=r0=0
+	tadd    r1, #4							@r1 = r1 + 4
+	tj		ZERO_TAG_BEGIN					@jump to ZERO_TAG_BEGIN
+ZERO_TAG_END:
+#endif
+@********************************************************************************************************
+@                                    IC CACHE INITIALIZATION
+@********************************************************************************************************
+SET_IC:
+	tloadr     	r1, DAT0 + 24				@ r1 = 0x80060c
+	tloadr      r0, DAT0 + 36				@ r0 = _ramcode_size_align_256_
+	tshftr      r0,r0,#8                    @ r0 = _ramcode_size_align_256_/256
+	tstorerb	r0, [r1, #0]				@ *(unsigned int*)(0x80060c) = r0
+#if IC_TAG_CACHE_ADDR_EQU_EN
+
+#else
+	tadd    	r0, #1						@ r0 = r0 + 1
+#endif
+	tstorerb	r0, [r1, #1]				@ *(unsigned int*)(0x80060d) = r0
+SET_IC_END:
+@********************************************************************************************************
+@                                    DCDC INITIALIZATION FOR FLASH
+@********************************************************************************************************
+	/*system on*/
+	tloadr      r0,DATA_I+32                @0x00800060
+	tloadr      r1,DATA_I+36                @0xff080000
+	tstorer     r1,[r0,#0]                  @*(unsigned int*)0x800060=0xff000000
+	tshftr      r1,r1,#24					@0x000000ff
+	tstorerb    r1,[r0,#4]					@dig_0x64=0xff
+	tloadr      r1,DATA_I+40				@dig_0x65=0xf7
+	tstorerb    r1,[r0,#5]
+
+    /*check ana_reg_0x7e*/
+	tloadr		r0,DATA_I+24				@0x7e
+RANA_REG_BEGIN:
+	tloadr		r1,DATA_I+28			    @0x008000b8
+	tmov		r2,r0						@ana_reg_adr:0x7e
+	tstorerb	r2,[r1,#0]					@*(unsigned int*)0x8000b8=0x7e;
+	tmov   	    r2,#64						@ana_reg_dat:0x40=64
+	tstorerb	r2,[r1,#2]					@*(unsigned int*)0x8000ba=0x40;
+RWAIT_REG_FINISH:
+	tloadrb	    r2,[r1,#2]
+	tshftl		r2,r2,#31
+	tshftr		r2,r2,#31
+	tcmp		r2,#1
+	tjeq		RWAIT_REG_FINISH
+	tloadrb	    r2,[r1,#1]
+RANA_REG_END:
+
+	tshftl      r2,r2,#31
+	tshftr		r2,r2,#31
+	tcmp        r2,#0
+	/*if ana_reg_0x7e==0x00 retention data initiate after waking up from deep*/
+#if MULTI_ADDRESS_START
+	tjeq		MULTI_ADDRESS_END
+MULTI_ADDRESS_BEGIN:
+	tloadr      r0, MULTI_ADDRESS_DATA
+	tloadr		r1, MULTI_ADDRESS_DATA+4
+	tloadr		r3, MULTI_ADDRESS_DATA+8
+	tloadrb		r2, [r1,#0]
+	tstorerb    r2, [r0,#0]
+	tloadrb		r2, [r3,#0]
+	tstorerb    r2, [r0,#1]
+	tj			ZERO_BSS_END				@ deep wakeup with retention
+MULTI_ADDRESS_END:
+#endif
+@********************************************************************************************************
+@                                    DATA INITIALIZATION
+@********************************************************************************************************
+COPY_DATA:
+	tloadr		r1, DATA_I+12				@ r1 = _dstored_
+	tloadr		r2, DATA_I+16				@ r2 = _start_data_
+	tloadr		r3, DATA_I+20				@ r3 = _end_data_
+COPY_DATA_BEGIN:
+	tcmp		r2, r3						@
+	tjge		COPY_DATA_END				@ r2>=r3 jump to COPY_DATA_END
+	tloadr		r0, [r1, #0]				@ r0 = *(unsigned int*)(_dstored_)
+	tstorer 	r0, [r2, #0]				@ *(unsigned int*)(_start_data_) = r0
+	tadd    	r1, #4						@ r1 = r1 + 4
+	tadd		r2, #4						@ r2 = r2 + 4
+	tj			COPY_DATA_BEGIN				@ jump to COPY_DATA_BEGIN
+COPY_DATA_END:
+@********************************************************************************************************
+@                                    BSS INITIALIZATION FOR 0
+@********************************************************************************************************
+BSS_CLEAR:
+	tmov	r0, #0							@r0 = 0
+	tloadr	r1, DAT0 + 16					@r1 = _start_bss_
+	tloadr	r2, DAT0 + 20					@r2 = _end_bss_
+ZERO_BSS_BEGIN:
+	tcmp	r1, r2
+	tjge	ZERO_BSS_END					@r1>=r2 jump to ZERO_BSS_END
+	tstorer	r0, [r1, #0]					@*(unsigned int*)(_start_bss_)=r0=0
+	tadd    r1, #4							@r1 = r1 + 4
+	tj		ZERO_BSS_BEGIN					@jump to ZERO_BSS_BEGIN
+ZERO_BSS_END:
+@********************************************************************************************************
+@                                    CUSTOM DATA INITIALIZATION
+@********************************************************************************************************
+COPY_CUSTOM_DATA:
+	tloadr		r1, DATA_I+48				@ r1 = _custom_stored_
+	tloadr		r2, DATA_I+52				@ r2 = _start_custom_data_
+	tloadr		r3, DATA_I+56				@ r3 = _end_custom_data_
+COPY_DATA_CUSTOM_BEGIN:
+	tcmp		r2, r3						@
+	tjge		COPY_DATA_CUSTOM_END		@ r2>=r3 jump to COPY_DATA_END
+	tloadr		r0, [r1, #0]				@ r0 = *(unsigned int*)(_dstored_)
+	tstorer 	r0, [r2, #0]				@ *(unsigned int*)(_start_data_) = r0
+	tadd    	r1, #4						@ r1 = r1 + 4
+	tadd		r2, #4						@ r2 = r2 + 4
+	tj			COPY_DATA_CUSTOM_BEGIN		@ jump to COPY_DATA_BEGIN
+COPY_DATA_CUSTOM_END:
+@********************************************************************************************************
+@                                    CUSTOM BSS INITIALIZATION FOR 0
+@********************************************************************************************************
+ZERO_CUSTOM_BSS:
+	tmov    r0, #0
+	tloadr	r1, DAT0 + 40					@r1 = _start_custom_
+	tloadr	r2, DAT0 + 44					@r2 = _end_custom_
+ZERO_BSS_CUSTOM_BEGIN:
+	tcmp	r1, r2
+	tjge	ZERO_BSS_CUSTOM_END				@r1>=r2 jump to ZERO_BSS_END
+	tstorer	r0, [r1, #0]					@*(unsigned int*)(_start_bss_)=r0=0
+	tadd    r1, #4							@r1 = r1 + 4
+	tj		ZERO_BSS_CUSTOM_BEGIN			@jump to ZERO_BSS_BEGIN
+ZERO_BSS_CUSTOM_END:
+
+
+ENTER_MAIN:
+	tjl	main
+END:	tj	END
+
+	.balign	4
+DAT0:
+	.word	0x12			    		@0		IRQ
+	.word	0x13			    		@4		SVC
+	.word	(irq_stk + IRQ_STK_SIZE)	@8
+	.word	(_stack_end_)		    	@12  	stack end
+	.word	(_start_bss_)               @16
+	.word	(_end_bss_)                 @20
+	.word	(0x80060c)                  @24
+	.word	_ictag_start_               @28		IC tag start
+	.word	_ictag_end_	            	@32		IC tag end
+#if IC_TAG_CACHE_ADDR_EQU_EN
+	.word	(0x00f000)    				@36
+#endif
+	.word	_ramcode_size_align_256_    @36
+	.word	_start_custom_bss_          @40
+	.word	_end_custom_bss_	        @44
+
+DATA_I:	
+	.word   (_rstored_)                 @0
+	.word   (0x0000007e)    			@4
+    .word   (0x0000007e)      			@8
+	.word	_dstored_					@12
+	.word	_start_data_				@16
+	.word	_end_data_					@20
+    .word	(0x0000007e)                @24
+	.word	(0x008000b8)                @28
+	.word	(0x00800060)                @32
+    .word	(0xff080000)                @36
+    .word	(0x000000f7)                @40
+	.word	(0x0080000c)                @44
+	.word	_custom_stored_				@48
+	.word	_start_custom_data_			@52
+	.word	_end_custom_data_			@56
+
+FLL_D:
+	.word	0xffffffff                	@0
+	.word	(_end_custom_bss_)    		@4
+	.word	(_stack_end_)               @8
+	.word   _ramcode_size_div_256_      @12
+MULTI_ADDRESS_DATA:
+	.word	(0x0080063e)				@0
+	.word   tl_multi_addr_L				@4
+	.word   tl_multi_addr_H				@8
+
+	.align 4
+__irq:
+	tpush    	{r14}					@push R14/LR register
+	tpush    	{r0-r7}					@push r0~r7 into stack
+	tmrss    	r0						@save cpsr to r0
+	
+	tmov		r1, r8					@r8~r12 cannot use the way like {r0~r7} to push into stack
+	tmov		r2, r9					@must move r8~r12 into r1~r5 to push
+	tmov		r3, r10
+	tmov		r4, r11
+	tmov		r5, r12
+	tpush		{r0-r5}
+	
+	tjl      	irq_handler				@jump to irq_handler
+
+	tpop		{r0-r5}					@pop r8~r12
+	tmov		r8, r1
+	tmov		r9, r2
+	tmov		r10,r3
+	tmov		r11,r4
+	tmov		r12,r5
+
+	tmssr    	r0						@return r0 to cpsr
+	tpop		{r0-r7}					@pop r0~r7
+	treti    	{r15}					@return to pc
+
+ASMEND:
+	.section .bss
+	.align 4
+	.lcomm irq_stk, IRQ_STK_SIZE
+	.end
+
+#endif	/* MCU_STARTUP_8278 */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/boot_b91.link b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/boot_b91.link
new file mode 100644
index 00000000..d7b46fb0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/boot_b91.link
@@ -0,0 +1,106 @@
+/********************************************************************************************************
+ * @file    boot_b91.link
+ *
+ * @brief   This is the link file for B91
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+ 
+ENTRY(_RESET_ENTRY)
+SECTIONS
+{
+	NDS_SAG_LMA_FLASH = 0x20000000 ;
+	. = (0x20000000 + __FW_OFFSET);	
+	PROVIDE (BIN_BEGIN = .);
+	.vectors 		: { KEEP(*(.vectors )) }
+	. = 0x00000000;
+	.retention_reset	: AT( ALIGN(LOADADDR (.vectors) + SIZEOF (.vectors),8)) 
+	  	{ KEEP(*(.retention_reset )) }
+	PROVIDE (_RETENTION_RESET_VMA_START = ADDR(.retention_reset));
+	PROVIDE (_RETENTION_RESET_LMA_START = LOADADDR(.retention_reset));
+	PROVIDE (_RETENTION_RESET_VMA_END = .); 
+	/* By default,the aes_data section can only be used in the first 64K of IRAM, */
+	/* please do not change the position of this section,unless you know the correct way to use */ 
+	. = ALIGN(8);
+	PROVIDE (_AES_VMA_START = .);
+	.aes_data 	(NOLOAD)	: { KEEP(*(.aes_data )) }
+	PROVIDE (_AES_VMA_END = .);
+	/*. = ALIGN(8);*/
+	/*.retention_data : AT( ALIGN(LOADADDR (.retention_reset) + SIZEOF (.retention_reset),8)) */
+	/*	{ KEEP(*(.retention_data )) }*/
+	/*PROVIDE (_RETENTION_DATA_VMA_START = ADDR(.retention_data));*/
+	/*PROVIDE (_RETENTION_DATA_LMA_START = LOADADDR(.retention_data));*/
+	/*PROVIDE (_RETENTION_DATA_VMA_END = .); */
+	
+	. = ALIGN(8);
+	.ram_code	: AT( ALIGN(LOADADDR (.retention_reset) + SIZEOF (.retention_reset),8)) 
+	  	{ KEEP(*(.ram_code )) }
+	PROVIDE (_RAMCODE_VMA_END = .);
+	PROVIDE (_RAMCODE_VMA_START = ADDR(.ram_code));
+	PROVIDE (_RAMCODE_LMA_START = LOADADDR(.ram_code));
+	PROVIDE (_RAMCODE_SIZE = SIZEOF (.ram_code)); 
+	
+	. = ALIGN(LOADADDR (.ram_code) + SIZEOF (.ram_code), 8);
+	.text 			: AT(ALIGN(LOADADDR (.ram_code) + SIZEOF (.ram_code), 8)) 
+		{ *(.text .stub .text.* .gnu.linkonce.t.* ) KEEP(*(.text.*personality* )) *(.gnu.warning )  }
+	.rodata 		: AT(ALIGN(LOADADDR (.text) + SIZEOF (.text), ALIGNOF(.rodata))) 
+		{ *(.rodata .rodata.* .gnu.linkonce.r.* )}
+	.eh_frame_hdr 	: AT(ALIGN(LOADADDR (.rodata) + SIZEOF (.rodata), ALIGNOF(.eh_frame_hdr)))
+		{ *(.eh_frame_hdr ) }
+	. = ALIGN(0x20);
+	.eh_frame 	: AT(ALIGN(LOADADDR (.eh_frame_hdr) + SIZEOF (.eh_frame_hdr), 32))
+		{ KEEP(*(.eh_frame )) }
+		
+	.exec.itable 	: AT(ALIGN(LOADADDR (.eh_frame) + SIZEOF (.eh_frame), ALIGNOF(.exec.itable)))
+		{ KEEP(*(.exec.itable)) }
+				
+	/*. = 0x00080000;*/
+	. = ALIGN(ADDR (.ram_code) + SIZEOF (.ram_code), 8);
+	PROVIDE( __global_pointer$ = . + (4K / 2) );
+	.data	: AT(ALIGN(LOADADDR (.exec.itable) + SIZEOF (.exec.itable),  ALIGNOF(.data)))
+		{ *(.data .data.* .gnu.linkonce.d.* ) KEEP(*(.gnu.linkonce.d.*personality* )) SORT(CONSTRUCTORS) 
+		  *(.srodata.cst16 ) *(.srodata.cst8 ) *(.srodata.cst4 ) *(.srodata.cst2 ) *(.srodata .srodata.* ) *(.sdata .sdata.* .gnu.linkonce.s.* ) *(.sdata2 .sdata2.* .gnu.linkonce.s.* )
+		}
+    PROVIDE (_DATA_VMA_END = .);
+    PROVIDE (_DATA_VMA_START = ADDR(.data));
+	PROVIDE (_DATA_LMA_START = LOADADDR(.data));
+	
+	. = ALIGN(8);
+	PROVIDE (_BSS_VMA_START = .);
+	.sbss 	(NOLOAD)	: { *(.dynsbss ) *(.sbss .sbss.* .gnu.linkonce.sb.* ) *(.scommon .scommon.* ) }
+	.bss 	(NOLOAD)	: { *(.dynbss ) *(.bss .bss.* .gnu.linkonce.b.* ) *(COMMON ) . = ALIGN(8); }
+	PROVIDE (_BSS_VMA_END = .);
+	
+	.sdk_version  	: AT(LOADADDR (.data) + SIZEOF (.data))
+		{ KEEP(*(.sdk_version )) }
+	
+	PROVIDE (BIN_SIZE = LOADADDR(.sdk_version) + SIZEOF(.sdk_version) - BIN_BEGIN);
+	
+	. = ALIGN(8);
+	/* end is the starting address of the heap, the heap grows upward */
+	_end = .;
+	PROVIDE (end = .);		
+	/*PROVIDE (_STACK_TOP = 0x00a0000);*/
+	PROVIDE (_STACK_TOP = 0x0020000);
+	PROVIDE (FLASH_SIZE = 0x0100000);
+}
+
+ASSERT((BIN_SIZE)<= FLASH_SIZE, "BIN FILE OVERFLOW");
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/cstartup_b91.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/cstartup_b91.S
new file mode 100644
index 00000000..c0c811c8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/b91/cstartup_b91.S
@@ -0,0 +1,480 @@
+/********************************************************************************************************
+ * @file    cstartup_b91.S
+ *
+ * @brief   This is the boot file for B91
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifdef MCU_CORE_B91
+
+#include "version_cfg.h"
+
+    .section .vectors, "ax"
+
+    //.org  and linker's relaxation (-flto) cannot be used at the same time
+    //Pop corresponds to push. Before using .option norelax, use push to save the current .option configuration
+    //and then modify .option. After using norelax, use pop to restore
+	.option push
+	.option norelax
+    .org 0x0
+
+	.extern FILE_VERSION
+	.extern MANUFACTURER_CODE_TELINK
+	.extern IMAGE_TYPE
+
+    .global _RESET_ENTRY
+ 	.type _RESET_ENTRY,@function
+
+    .align 2
+_RESET_ENTRY:
+	j 		 _START
+
+	.word (FILE_VERSION)
+
+	//free the 6th ~ 7th byte to store the crc type of the bin file
+
+	.org 0x12
+	.short (MANUFACTURER_CODE_TELINK)
+	.short (IMAGE_TYPE)
+
+    .org 0x18
+    .word (BIN_SIZE)
+
+    .org 0x20
+    .word ('T'<<24 | 'L'<<16 | 'N'<<8 | 'K')
+
+    .org 0x26
+    //.short (0x0003)           //READ:    cmd:1x, addr:1x, data:1x, dummy cycle:0
+    //.short (0x070B)           //FREAD:   cmd:1x, addr:1x, data:1x, dummy cycle:8
+    .short (0x173B)           //DREAD:   cmd:1x, addr:1x, data:2x, dummy cycle:8
+    //.short (0x53BB)           //X2READ:  cmd:1x, addr:2x, data:2x, dummy cycle:4
+    //.short (0x276B)           //QREAD:   cmd:1x, addr:1x, data:4x, dummy cycle:8
+    //.short (0x65EB)             //X4READ:  cmd:1x, addr:4x, data:4x, dummy cycle:6
+    .option pop
+    .align 2
+
+_START:
+
+#if 0
+	// add debug, PB4 output 1
+	lui		t0,0x80140 			//0x8014030a
+	li		t1, 0xef
+	li		t2, 0x10
+	sb		t1 , 0x30a(t0)		 //0x8014030a  PB oen     =  0xef
+	sb		t2 , 0x30b(t0)		 //0x8014030b  PB output  =  0x10
+#endif
+	/* Initialize global pointer */
+    .option push
+    .option norelax
+    la     gp, __global_pointer$
+    .option pop
+
+/*
+* swire usb enable default.when dp and dm use as GPIO, it has a risk to trigger the swire through usb function
+* to do something unexcept when toggle dp pin
+*/
+_SWS_USB_DIS:
+	lui		t0, 0x80100
+	addi	t0 , t0 , 0x700
+	li		t1, 0x40
+	sb		t1, 0x501(t0)  //0x80100c01 -> 0x40  <7>: 0 swire_usb_dis
+
+	/* Initialize stack pointer */
+    la     t0, _STACK_TOP
+    mv     sp, t0
+
+#ifdef __nds_execit
+	/* Initialize EXEC.IT table */
+	la t0, _ITB_BASE_
+	csrw uitb, t0
+#endif
+
+#ifdef __riscv_flen
+	/* Enable FPU */
+	li t0, 0x00006000
+	csrrs t0, mstatus, t0
+	/* Initialize FCSR */
+	fscsr zero
+#endif
+
+    /* Initial machine trap-vector Base */
+    la     t0, __vectors
+    csrw   mtvec, t0
+
+    /* Enable vectored external plic interrupt */
+    csrsi  mmisc_ctl, 2
+
+	/*vector mode enable bit (VECTORED) of the Feature Enable Register */
+    lui		t0, 0xe4000
+	li		t1, 0x02
+	sw		t1, 0x0(t0)		 //(*(volatile unsigned long*)(0xe4000000))= 0x02
+
+    /* Enable I/D-Cache */
+    csrr   t0,  mcache_ctl
+    ori    t0,  t0,  1  #/I-Cache
+    ori    t0,  t0,  2  #/D-Cache
+    csrw   mcache_ctl,  t0
+    fence.i
+	/* Move retention reset from flash to sram */
+_RETENTION_RESET_INIT:
+
+    la     t1, _RETENTION_RESET_LMA_START
+    la     t2, _RETENTION_RESET_VMA_START
+    la     t3, _RETENTION_RESET_VMA_END
+_RETENTION_RESET_BEGIN:
+    bleu    t3, t2, _ZERO_AES
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _RETENTION_RESET_BEGIN
+
+	/* Zero .aes section in sram */
+_ZERO_AES:
+    lui    t0, 0
+    la     t2, _AES_VMA_START
+    la     t3, _AES_VMA_END
+_ZERO_AES_BEGIN:
+    bleu   t3, t2, _RAMCODE_INIT
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _ZERO_AES_BEGIN
+
+#if 0
+	/* Move retention from flash to sram */
+_RETENTION_DATA_INIT:
+
+    la     t1, _RETENTION_DATA_LMA_START
+    la     t2, _RETENTION_DATA_VMA_START
+    la     t3, _RETENTION_DATA_VMA_END
+_RETENTION_DATA_INIT_BEGIN:
+    bleu   t3, t2, _RAMCODE_INIT
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _RETENTION_DATA_INIT_BEGIN
+#endif
+
+	/* Move ramcode from flash to sram */
+_RAMCODE_INIT:
+
+    la     t1, _RAMCODE_LMA_START
+    la     t2, _RAMCODE_VMA_START
+    la     t3, _RAMCODE_VMA_END
+_RAMCODE_INIT_BEGIN:
+    bleu    t3, t2, _DATA_INIT
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _RAMCODE_INIT_BEGIN
+
+
+	/* Move Data from flash to sram */
+_DATA_INIT:
+    la     t1, _DATA_LMA_START
+    la     t2, _DATA_VMA_START
+    la     t3, _DATA_VMA_END
+_DATA_INIT_BEGIN:
+    bleu   t3, t2, _ZERO_BSS
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _DATA_INIT_BEGIN
+
+	/* Zero .bss section in sram */
+_ZERO_BSS:
+    lui    t0, 0
+    la     t2, _BSS_VMA_START
+    la     t3, _BSS_VMA_END
+_ZERO_BSS_BEGIN:
+    bleu   t3, t2, _FILL_STK
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _ZERO_BSS_BEGIN
+
+	/* Fill the remaining section in sram */
+_FILL_STK:
+#if 0
+    lui    t0, 0x55555
+    addi   t0, t0, 0x555
+    la     t2, _BSS_VMA_END
+    la     t3, _STACK_TOP
+_FILL_STK_BEGIN:
+    bleu   t3, t2, _MAIN_FUNC
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _FILL_STK_BEGIN
+#endif
+	/* Jump to the main function */
+_MAIN_FUNC:
+    nop
+
+    la     t0, main
+    jalr   t0
+
+    nop
+    nop
+    nop
+    nop
+    nop
+_END:
+    j    _END
+
+
+ .section .retention_reset, "ax"
+    .option push
+    .option norelax
+    .global _IRESET_ENTRY
+ 	.type _IRESET_ENTRY,@function
+
+    .align 2
+_IRESET_ENTRY:
+	/* Decide whether this is an NMI or cold reset */
+	j 		_ISTART
+
+	.org 0x22
+_ISTART:
+#if 0
+	// add debug, PB4 output 1
+	lui		t0,0x80140 			//0x8014030a
+	li		t1, 0xef
+	li		t2, 0x10
+	sb		t1 , 0x30a(t0)		 //0x8014030a  PB oen     =  0xef
+	sb		t2 , 0x30b(t0)		 //0x8014030b  PB output  =  0x10
+#endif
+	/* Initialize global pointer */
+
+    la     gp, __global_pointer$
+    .option pop
+
+/*
+* swire usb enable default.when dp and dm use as GPIO, it has a risk to trigger the swire through usb function
+* to do something unexcept when toggle dp pin
+*/
+_ISWS_USB_DIS:
+	lui		t0, 0x80100
+	addi	t0 , t0 , 0x700
+	li		t1, 0x40
+	sb		t1, 0x501(t0)  //0x80100c01 -> 0x40  <7>: 0 swire_usb_dis
+
+	/* Initialize stack pointer */
+    la     t0, _STACK_TOP
+    mv     sp, t0
+
+#ifdef __nds_execit
+	/* Initialize EXEC.IT table */
+	la t0, _ITB_BASE_
+	csrw uitb, t0
+#endif
+
+#ifdef __riscv_flen
+	/* Enable FPU */
+	li t0, 0x00006000
+	csrrs t0, mstatus, t0
+	/* Initialize FCSR */
+	fscsr zero
+#endif
+
+    /* Initial machine trap-vector Base */
+    la     t0, __vectors
+    csrw   mtvec, t0
+
+    /* Enable vectored external plic interrupt */
+    csrsi  mmisc_ctl, 2
+
+	/*vector mode enable bit (VECTORED) of the Feature Enable Register */
+    lui		t0, 0xe4000
+	li		t1, 0x02
+	sw		t1, 0x0(t0)		 //(*(volatile unsigned long*)(0xe4000000))= 0x02
+
+    /* Enable I/D-Cache */
+    csrr   t0,  mcache_ctl
+    ori    t0,  t0,  1  #/I-Cache
+    ori    t0,  t0,  2  #/D-Cache
+    csrw   mcache_ctl,  t0
+    fence.i
+
+
+/* flash wakeup */
+_WAKEUP_FLASH:
+	lui		t0 , 0x80140
+	li		t1 , 0xff
+	li		t2 , 0x0
+	li		t3 , 0xab
+	sb		t1 , 0x329(t0)			 //mspi ie enable	:0x140329:0x1f
+	sb		t2 , 0x101(t0)			 //cs_low			:0x140101:0x00
+	sb		t3 , 0x100(t0)			 //wakeup_cmd		:0x140100:0xab
+_MSPI_WAIT:
+	lui		t0 , 0x80140
+	lb		t2 , 0x102(t0)			//read reg_mspi_status FLD_MSPI_BUSY(bit0)
+	li		t3 , 0x1
+	li		t4 , 0x10
+	beq 	t3 , t2 ,_MSPI_WAIT
+	sb		t4 , 0x101(t0)			//cs_high			:0x140101:0x10
+#if 0
+	// add debug, PB4 output 1
+	lui		t0,0x80140 			//0x8014030a
+	li		t1, 0x00
+	sb		t1 , 0x30b(t0)		 //0x8014030b  PB output  =  0x00
+#endif
+/*efuse load need delay about 18us */
+	li		t0 , 0
+	li		t1 , 226
+_WAIT_EFUSE_LOAD_FINISH:
+	addi 	t0 , t0 , 1
+	bgeu 	t1 , t0 , _WAIT_EFUSE_LOAD_FINISH
+
+#if 0
+	// add debug, PB4 output 1
+	lui		t0,0x80140 			//0x8014030a
+	li		t1, 0x10
+	sb		t1 , 0x30b(t0)		 //0x8014030b  PB output  =  0x00
+#endif
+_MULTI_ADDRESS_BEGIN:
+	lui		t0 , 0x80140
+	la		t1 , g_pm_mspi_cfg
+	lw		t2 , 0(t1)
+	sw		t2 , 0x104(t0)			 //g_pm_mspi_cfg->0x80140104
+
+	/* Zero .aes section in sram */
+_IZERO_AES:
+    lui    t0, 0
+    la     t2, _AES_VMA_START
+    la     t3, _AES_VMA_END
+_IZERO_AES_BEGIN:
+    bleu   t3, t2, _IDATA_INIT
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _IZERO_AES_BEGIN
+
+#if 0
+	/* Move ramcode from flash to sram */
+_IRAMCODE_INIT:
+
+    la     t1, _RAMCODE_LMA_START
+    la     t2, _RAMCODE_VMA_START
+    la     t3, _RAMCODE_VMA_END
+_IRAMCODE_INIT_BEGIN:
+    bleu   t3, t2, _IDATA_INIT
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _IRAMCODE_INIT_BEGIN
+#endif
+
+	/* Move Data from flash to sram */
+_IDATA_INIT:
+#if 0
+    la     t1, _DATA_LMA_START
+    la     t2, _DATA_VMA_START
+    la     t3, _DATA_VMA_END
+_IDATA_INIT_BEGIN:
+    bleu   t3, t2, _IZERO_BSS
+    lw     t0, 0(t1)
+    sw     t0, 0(t2)
+    addi   t1, t1, 4
+    addi   t2, t2, 4
+    j      _IDATA_INIT_BEGIN
+
+	/* Zero .bss section in sram */
+_IZERO_BSS:
+    lui    t0, 0
+    la     t2, _BSS_VMA_START
+    la     t3, _BSS_VMA_END
+_IZERO_BSS_BEGIN:
+    bleu   t3, t2, _IFILL_STK
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _IZERO_BSS_BEGIN
+#endif
+
+	/* Fill the remaining section in sram */
+_IFILL_STK:
+#if 0
+    lui    t0, 0x55555
+    addi   t0, t0, 0x555
+    la     t2, _BSS_VMA_END
+    la     t3, _STACK_TOP
+_IFILL_STK_BEGIN:
+    bleu   t3, t2, _IMAIN_FUNC
+    sw     t0, 0(t2)
+    addi   t2, t2, 4
+    j      _IFILL_STK_BEGIN
+#endif
+	/* Jump to the main function */
+_IMAIN_FUNC:
+    nop
+
+    la     t0, main
+    jalr   t0
+
+    nop
+    nop
+    nop
+    nop
+    nop
+_IEND:
+    j    _IEND
+
+
+.text
+	.global default_irq_entry
+	.align 2
+
+default_irq_entry:
+1:	j 1b
+
+       .weak trap_handler
+
+ trap_handler:
+1:	j 1b
+
+	.macro INTERRUPT num
+	.weak entry_irq\num
+	.set entry_irq\num, default_irq_entry
+	.long entry_irq\num
+	.endm
+
+#define VECTOR_NUMINTRS         63
+
+   	.section .ram_code, "ax"
+
+	.global __vectors
+	.balign 256
+
+
+__vectors:
+	/* Trap vector */
+	.long trap_entry
+
+	/* PLIC interrupt vector */
+	.altmacro
+	.set irqno, 1
+	.rept VECTOR_NUMINTRS/*  .rept  .endr  */
+	INTERRUPT %irqno
+	.set irqno, irqno+1
+	.endr
+
+#endif /* MCU_CORE_B91 */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/link_cfg.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/link_cfg.S
new file mode 100644
index 00000000..ed78a9c1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/boot/link_cfg.S
@@ -0,0 +1,36 @@
+/********************************************************************************************************
+ * @file    link_cfg.S
+ *
+ * @brief   This is the boot file for link_cfg
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "version_cfg.h"
+
+LINK_CFG:
+	.equ __BOOT_LOADER_IMAGE,	 	IS_BOOT_LOADER_IMAGE
+	.equ __FW_RAMCODE_SIZE_MAX,		RESV_FOR_APP_RAM_CODE_SIZE
+	.equ __FW_OFFSET,			 	IMAGE_OFFSET
+
+	.global __BOOT_LOADER_IMAGE
+	.global __FW_OFFSET
+	.global __FW_RAMCODE_SIZE_MAX
+LINK_CFG_END:
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.c
new file mode 100644
index 00000000..558add70
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.c
@@ -0,0 +1,519 @@
+/********************************************************************************************************
+ * @file    adc.c
+ *
+ * @brief   This is the source file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "adc.h"
+#include "dfifo.h"
+#include "timer.h"
+#include "compiler.h"
+
+
+_attribute_data_retention_
+unsigned short adc_vref = 1175;//ADC gpio calibration value voltage (unit:mV)(used for gpio voltage sample).
+_attribute_data_retention_
+volatile signed char adc_vref_offset = 0;//ADC calibration value voltage offset (unit:mV).
+
+_attribute_data_retention_
+unsigned short adc_gpio_calib_vref = 1175;//ADC gpio calibration value voltage (unit:mV)(used for gpio voltage sample).
+_attribute_data_retention_
+signed char adc_gpio_calib_vref_offset = 0;//ADC gpio calibration value voltage offset (unit:mV)(used for gpio voltage sample).
+
+volatile unsigned short	adc_code;
+unsigned char  adc_pre_scale;
+unsigned short adc_ref_vol[2] = {600,900};
+
+const GPIO_PinTypeDef ADC_GPIO_tab[10] = {
+		GPIO_PB0,GPIO_PB1,
+		GPIO_PB2,GPIO_PB3,
+		GPIO_PB4,GPIO_PB5,
+		GPIO_PB6,GPIO_PB7,
+		GPIO_PC4,GPIO_PC5
+};
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ *        This interface can be used to switch sampling IO without reinitializing the ADC.
+ * @param[in]   pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_pin_init(GPIO_PinTypeDef pin)
+{
+	unsigned char i;
+	unsigned char gpio_num=0;
+	//ADC GPIO Init
+	gpio_set_func(pin, AS_GPIO);
+	gpio_set_input_en(pin,0);
+	gpio_set_output_en(pin,0);
+	gpio_write(pin,0);
+
+	for(i=0;i<10;i++)
+	{
+		if(pin == ADC_GPIO_tab[i])
+		{
+			gpio_num = i+1;
+			break;
+		}
+	}
+	adc_set_ain_channel_differential_mode(ADC_MISC_CHN, gpio_num, GND);
+}
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ *        This interface can be used to switch sampling IO without reinitializing the ADC.
+ * @param[in]  pin -  GPIO_PinTypeDef pin
+ * @return none
+ */
+void adc_vbat_pin_init(GPIO_PinTypeDef pin)
+{
+	unsigned char i;
+	unsigned char gpio_no=0;
+	gpio_set_func(pin, AS_GPIO);
+	gpio_set_input_en(pin,0);
+	gpio_set_output_en(pin,1);
+	gpio_write(pin,1);
+	//set channel mode and channel
+	for(i=0;i<10;i++)
+	{
+		if(pin == ADC_GPIO_tab[i])
+		{
+			gpio_no = i+1;
+			break;
+		}
+	}
+	adc_set_input_mode(ADC_MISC_CHN, DIFFERENTIAL_MODE);
+	adc_set_ain_channel_differential_mode(ADC_MISC_CHN, gpio_no, GND);
+}
+
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in]   ch_n - enum variable of ADC input channel.
+ * @param[in]   v_ref - enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_ref_voltage(ADC_ChTypeDef ch_n, ADC_RefVolTypeDef v_ref)
+{
+	//any two channel can not be used at the same time
+	adc_set_vref(v_ref, v_ref, v_ref);
+	if(v_ref == ADC_VREF_1P2V)
+	{
+		//Vref buffer bias current trimming: 		150%
+		//Comparator preamp bias current trimming:  100%
+		analog_write( areg_ain_scale  , (analog_read( areg_ain_scale  )&(0xC0)) | 0x3d );
+	}
+	else
+	{
+		//Vref buffer bias current trimming: 		100%
+		//Comparator preamp bias current trimming:  100%
+		analog_write( areg_ain_scale  , (analog_read( areg_ain_scale  )&(0xC0)) | 0x15 );
+		adc_gpio_calib_vref=adc_ref_vol[v_ref];
+	}
+}
+
+/**
+ * @brief This function serves to set resolution.
+ * @param[in]   ch_n - enum variable of ADC input channel.
+ * @param[in]   v_res - enum variable of ADC resolution.
+ * @return none
+ */
+void adc_set_resolution(ADC_ChTypeDef ch_n, ADC_ResTypeDef v_res)
+{
+	if(ch_n & ADC_LEFT_CHN)
+	{
+		adc_set_resolution_chn_left(v_res);
+	}
+	if(ch_n & ADC_RIGHT_CHN)
+	{
+		adc_set_resolution_chn_right(v_res);
+	}
+	if(ch_n & ADC_MISC_CHN)
+	{
+		adc_set_resolution_chn_misc(v_res);
+	}
+}
+
+/**
+ * @brief This function serves to set sample_cycle.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  adcST - enum variable of ADC Sampling cycles.
+ * @return none
+ */
+void adc_set_tsample_cycle(ADC_ChTypeDef ch_n, ADC_SampCycTypeDef adcST)
+{
+	if(ch_n & ADC_LEFT_CHN)
+	{
+		adc_set_tsample_cycle_chn_left(adcST);
+	}
+	if(ch_n & ADC_RIGHT_CHN)
+	{
+		adc_set_tsample_cycle_chn_right(adcST);
+	}
+	if(ch_n & ADC_MISC_CHN)
+	{
+		adc_set_tsample_cycle_chn_misc(adcST);
+	}
+}
+
+/**
+ * @brief This function serves to set input_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+void adc_set_input_mode(ADC_ChTypeDef ch_n,  ADC_InputModeTypeDef m_input)
+{
+	if(ch_n & ADC_LEFT_CHN)
+	{
+		adc_set_input_mode_chn_left(m_input);
+	}
+	if(ch_n & ADC_RIGHT_CHN)
+	{
+		adc_set_input_mode_chn_right(m_input);
+	}
+	if(ch_n & ADC_MISC_CHN)
+	{
+		adc_set_input_mode_chn_misc(m_input);
+	}
+}
+
+/**
+ * @brief This function serves to set input channel in single_ended_input_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  InPCH - enum variable of ADC analog positive input channel.
+ * @return none
+ */
+void adc_set_ain_channel_single_ended_input_mode(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH)
+{
+	if(ch_n & ADC_LEFT_CHN)
+	{
+		adc_set_ain_negative_chn_left(GND);
+		adc_set_ain_positive_chn_left(InPCH);
+		adc_set_input_mode_chn_left(SINGLE_ENDED_MODE);
+	}
+	if(ch_n & ADC_RIGHT_CHN)
+	{
+		adc_set_ain_negative_chn_right(GND);
+		adc_set_ain_positive_chn_right(InPCH);
+		adc_set_input_mode_chn_right(SINGLE_ENDED_MODE);
+	}
+	if(ch_n & ADC_MISC_CHN)
+	{
+		adc_set_ain_negative_chn_misc(GND);
+		adc_set_ain_positive_chn_misc(InPCH);
+		adc_set_input_mode_chn_misc(SINGLE_ENDED_MODE);
+	}
+}
+
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  InPCH - enum variable of ADC analog positive input channel.
+ * @param[in]  InNCH - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+void adc_set_ain_channel_differential_mode(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH,ADC_InputNchTypeDef InNCH)
+{
+
+	if(ch_n & ADC_LEFT_CHN)
+	{
+		adc_set_ain_chn_left(InPCH, InNCH);
+		adc_set_input_mode_chn_left(DIFFERENTIAL_MODE);
+	}
+	if(ch_n & ADC_RIGHT_CHN)
+	{
+		adc_set_ain_chn_right(InPCH, InNCH);
+		adc_set_input_mode_chn_right(DIFFERENTIAL_MODE);
+	}
+	if(ch_n & ADC_MISC_CHN)
+	{
+		adc_set_ain_chn_misc(InPCH, InNCH);
+		adc_set_input_mode_chn_misc(DIFFERENTIAL_MODE);
+	}
+}
+
+/**
+ * @brief This function serves to set pre_scaling.
+ * @param[in]  v_scl - enum variable of ADC pre_scaling factor.
+ * notice: when adc reference voltage is ADC_VREF_0P6V/ADC_VREF_0P9V, pre_scaling factor(v_scl ) must be ADC_PRESCALER_1.
+ * @return none
+ */
+void adc_set_ain_pre_scaler(ADC_PreScalingTypeDef v_scl)
+{
+	analog_write( areg_ain_scale  , (analog_read( areg_ain_scale  )&(~FLD_SEL_AIN_SCALE)) | (v_scl<<6) );
+	//setting adc_sel_atb ,if stat is 0,clear adc_sel_atb,else set adc_sel_atb[0]if(stat)
+	unsigned char tmp;
+	if(v_scl)
+	{
+		//ana_F9<4> must be 1
+		tmp = analog_read(0xF9);
+		tmp = tmp|0x10;                    //open tmp = tmp|0x10;
+		analog_write (0xF9, tmp);
+	}
+	else
+	{
+		//ana_F9 <4> <5> must be 0
+		tmp = analog_read(0xF9);
+		tmp = tmp&0xcf;
+		analog_write (0xF9, tmp);
+	}
+	adc_pre_scale = 1<<(unsigned char)v_scl;
+}
+
+/**
+ * @brief This function serves to ADC init.
+ * @param[in]   none
+ * @return none
+ */
+void adc_init(void){
+	/******power off sar adc********/
+	adc_power_on_sar_adc(0);
+	/****** sar adc Reset ********/
+	//reset whole digital adc module
+	adc_reset_adc_module();
+	/******enable signal of 24M clock to sar adc********/
+	adc_enable_clk_24m_to_sar_adc(1);
+	/******set adc clk as 4MHz******/
+	adc_set_sample_clk(5);
+
+	pga_left_chn_power_on(0);
+	pga_right_chn_power_on(0);
+
+	/******set adc L R channel Gain Stage bias current trimming******/
+	adc_set_left_gain_bias(GAIN_STAGE_BIAS_PER100);
+	adc_set_right_gain_bias(GAIN_STAGE_BIAS_PER100);
+	dfifo_disable_dfifo2();//disable misc channel data dfifo
+	//Add 192K sample rate by jiarong.ji at 20220621
+	if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_23K)
+	{
+		adc_set_state_length(1023, 0, 15);  	//set R_max_mc=1023,R_max_s=15
+	}
+	else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_96K)
+	{
+		adc_set_state_length(240, 0, 10);  	//set R_max_mc=240,R_max_s=10
+	}
+	else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_192K)
+	{
+		adc_set_state_length(115, 0, 10);  	//set R_max_mc=115,R_max_s=10
+	}
+}
+
+/**
+ * @brief This function is used to calib ADC 1.2V vref for GPIO.
+ * @param[in] data - GPIO sampling calibration value.
+ * @return none
+ */
+void adc_set_gpio_calib_vref(unsigned short data)
+{
+	adc_gpio_calib_vref = data;
+}
+
+/**
+ * @brief This function is used to calib ADC 1.2V vref offset for GPIO two-point.
+ * @param[in] offset - GPIO sampling two-point calibration value offset.
+ * @return none
+ */
+void adc_set_gpio_two_point_calib_offset(signed char offset)
+{
+	adc_gpio_calib_vref_offset = offset;
+}
+
+/**
+ * @brief This function is used for ADC configuration of ADC IO voltage sampling.
+ * @param[in]   pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_init(GPIO_PinTypeDef pin)
+{
+	adc_set_chn_enable_and_max_state_cnt(ADC_MISC_CHN, 2);//enable the mic channel and set max_state_cnt
+
+	/**
+	 * Add Vref calibrate operation.
+	 * add by jiarong.ji at 20201029.
+	*/
+	adc_vref = adc_gpio_calib_vref;//set adc_vref as adc_gpio_calib_vref
+	adc_vref_offset = adc_gpio_calib_vref_offset;//set adc_vref_offset as adc_gpio_calib_vref_offset
+
+	adc_set_ref_voltage(ADC_MISC_CHN, ADC_VREF_1P2V);//set channel Vref,
+    // ADC_Vref = (unsigned char)ADC_VREF_1P2V;
+	adc_set_vref_vbat_divider(ADC_VBAT_DIVIDER_OFF);//set Vbat divider select,
+	//ADC_VBAT_Scale = VBAT_Scale_tab[ADC_VBAT_DIVIDER_OFF];
+
+	adc_base_pin_init(pin);
+	adc_set_resolution(ADC_MISC_CHN, RES14);
+	adc_set_tsample_cycle(ADC_MISC_CHN, SAMPLING_CYCLES_6);
+	adc_set_ain_pre_scaler(ADC_PRESCALER_1F8);//adc scaling factor is 1/8
+	adc_set_mode(ADC_NORMAL_MODE);//set RORMAl mode
+}
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in]    pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_init(GPIO_PinTypeDef pin)
+{
+	adc_set_chn_enable_and_max_state_cnt(ADC_MISC_CHN, 2);
+
+	//set Vbat divider select,
+	adc_set_vref_vbat_divider(ADC_VBAT_DIVIDER_OFF);
+	//ADC_VBAT_Scale = VBAT_Scale_tab[ADC_VBAT_DIVIDER_OFF];
+
+	/**
+	 * Add Vref calibrate operation.
+	 * add by jiarong.ji at 20201029.
+	*/
+	adc_vref = adc_gpio_calib_vref;//set adc_vref as adc_gpio_calib_vref
+	adc_vref_offset = adc_gpio_calib_vref_offset;//set adc_vref_offset as adc_gpio_calib_vref_offset
+
+	adc_vbat_pin_init(pin);
+	adc_set_ref_voltage(ADC_MISC_CHN, ADC_VREF_1P2V);//set channel Vref ,must be ADC_VREF_1P2V
+	//ADC_Vref = (unsigned char)ADC_VREF_1P2V;
+	adc_set_resolution(ADC_MISC_CHN, RES14);//set resolution
+	//Number of ADC clock cycles in sampling phase
+	adc_set_tsample_cycle(ADC_MISC_CHN, SAMPLING_CYCLES_6);
+	//set Analog input pre-scaling and
+	adc_set_ain_pre_scaler(ADC_PRESCALER_1F8);//only support ADC_PRESCALER_1F4 or  ADC_PRESCALER_1F8.
+	//set NORMAL mode
+	adc_set_mode(ADC_NORMAL_MODE);
+}
+
+
+
+#define ADC_SAMPLE_NUM		8 //8 /4
+
+/**
+ * @brief This function serves to set adc sampling and get results.
+ * @param[in]  none.
+ * @return the result of sampling.
+ */
+_attribute_ram_code_ unsigned int adc_sample_and_get_result_op(char mode, unsigned int *d)
+{
+	unsigned short temp;
+	volatile signed int adc_data_buf[ADC_SAMPLE_NUM];  //size must 16 byte aligned(16/32/64...)
+
+	int i,j;
+	unsigned int  adc_vol_mv = 0;
+	unsigned short adc_sample[ADC_SAMPLE_NUM] = {0};
+	unsigned short  adc_result=0;
+
+	adc_reset_adc_module();
+	
+
+	for(i=0;i<ADC_SAMPLE_NUM;i++){   	//dfifo data clear
+		adc_data_buf[i] = 0;
+	}
+	//dfifo setting will lose in suspend/deep, so we need config it every time
+	adc_config_misc_channel_buf((unsigned short *)adc_data_buf, ADC_SAMPLE_NUM<<2);  //size: ADC_SAMPLE_NUM*4
+	dfifo_enable_dfifo2();
+	unsigned int t0 = clock_time();
+	if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_23K)
+	{
+		while(!clock_time_exceed(t0, 90));  //wait at least 2 sample cycle(f = 23K, T = 43.4us)
+	}
+	else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_96K)
+	{
+		while(!clock_time_exceed(t0, 25));  //wait at least 2 sample cycle(f = 96K, T = 10.4us)
+	}
+	else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_192K)
+	{
+		while(!clock_time_exceed(t0, 11));  //wait at least 2 sample cycle(f = 192K, T = 5.2us)
+	}
+//////////////// get adc sample data and sort these data ////////////////
+	for(i=0;i<ADC_SAMPLE_NUM;i++){
+		/*wait for new adc sample data, When the data is not zero and more than 1.5 sampling times (when the data is zero),
+	 The default data is already ready.*/
+
+
+		if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_23K)
+		{
+			while(!clock_time_exceed(t0, 90));  //wait at least 2 sample cycle(f = 23K, T = 43.4us)
+		}
+		else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_96K)
+		{
+			while(!clock_time_exceed(t0, 25));  //wait at least 2 sample cycle(f = 96K, T = 10.4us)
+		}
+		//Add 192K sample rate by jiarong.ji at 20220621
+		else if(ADC_SAMPLE_RATE_SELECT==ADC_SAMPLE_RATE_192K)
+		{
+			while(!clock_time_exceed(t0, 11));  //wait at least 2 sample cycle(f = 192K, T = 5.2us)
+		}
+		t0 = clock_time();
+		if(adc_data_buf[i] & BIT(13)){  //14 bit resolution, BIT(13) is sign bit, 1 means negative voltage in differential_mode
+			adc_sample[i] = 0;
+		}
+		else{
+			adc_sample[i] = ((unsigned short)adc_data_buf[i] & 0x1FFF);  //BIT(12..0) is valid adc result
+		}
+
+		//insert sort
+		if(i){
+			if(adc_sample[i] < adc_sample[i-1]){
+				temp = adc_sample[i];
+				adc_sample[i] = adc_sample[i-1];
+				for(j=i-1;j>=0 && adc_sample[j] > temp;j--){
+					adc_sample[j+1] = adc_sample[j];
+				}
+				adc_sample[j+1] = temp;
+			}
+		}
+	}
+
+
+//////////////////////////////////////////////////////////////////////////////
+	dfifo_disable_dfifo2();   //misc channel data dfifo disable
+///// get average value from raw data(abandon some small and big data ), then filter with history data //////
+#if (ADC_SAMPLE_NUM == 4)  	//use middle 2 data (index: 1,2)
+	unsigned int adc_average = (adc_sample[1] + adc_sample[2])/2;
+#elif(ADC_SAMPLE_NUM == 8) 	//use middle 4 data (index: 2,3,4,5)
+	unsigned int adc_average = (adc_sample[2] + adc_sample[3] + adc_sample[4] + adc_sample[5])/4;
+#endif
+	adc_code=adc_result = adc_average;
+
+
+	//When the code value is 0, the returned voltage value should be 0.
+	if(adc_result == 0){
+		return 0;
+	}
+	else{
+		//////////////// adc sample data convert to voltage(mv) ////////////////
+		//                          (Vref, adc_pre_scale)   (BIT<12~0> valid data)
+		//			 =  adc_result * Vref * adc_pre_scale / 0x2000 + offset
+		//           =  adc_result * Vref * adc_pre_scale >>13 + offset
+		adc_vol_mv  = ((adc_result * adc_pre_scale * adc_vref)>>13) + adc_vref_offset;
+		if(mode){
+			*d = (((adc_sample[ADC_SAMPLE_NUM - 1] - adc_sample[0]) * adc_pre_scale * adc_vref)>>13);
+		}
+	}
+
+
+	return adc_vol_mv;
+}
+
+unsigned int adc_sample_and_get_result(void){
+	unsigned int v;
+	return adc_sample_and_get_result_op(0, &v);
+}
+
+_attribute_ram_code_ unsigned int adc_get_result_with_fluct(unsigned int *v){
+	return adc_sample_and_get_result_op(1, v);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.h
new file mode 100644
index 00000000..e45aa816
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/adc.h
@@ -0,0 +1,1167 @@
+/********************************************************************************************************
+ * @file    adc.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "analog.h"
+#include "bit.h"
+#include "gpio.h"
+#include "compiler.h"
+/*
+//ADC IO PINS
+GPIO_PinTypeDef ADC_GPIO_tab[] = {
+		GPIO_PB0,GPIO_PB1,
+		GPIO_PB2,GPIO_PB3,
+		GPIO_PB4,GPIO_PB5,
+		GPIO_PB6,GPIO_PB7,
+		GPIO_PC4,GPIO_PC5
+};
+*/
+
+/**
+ *  ADC sample rate
+ */
+typedef enum{
+	ADC_SAMPLE_RATE_23K,
+	ADC_SAMPLE_RATE_96K,
+	ADC_SAMPLE_RATE_192K
+}ADC_SampleRateTypeDef;
+
+#define ADC_SAMPLE_RATE_SELECT        ADC_SAMPLE_RATE_23K
+
+
+
+
+/**
+ *  ADC reference voltage
+ */
+typedef enum{
+	ADC_VREF_0P6V,
+	ADC_VREF_0P9V,
+	ADC_VREF_1P2V,
+	ADC_VREF_VBAT_N,
+}ADC_RefVolTypeDef;
+
+/**
+ *  ADC Vbat divider
+ */
+typedef enum{
+	ADC_VBAT_DIVIDER_OFF = 0,
+	ADC_VBAT_DIVIDER_1F4,
+	ADC_VBAT_DIVIDER_1F3,
+	ADC_VBAT_DIVIDER_1F2
+}ADC_VbatDivTypeDef;
+
+/**
+ *	ADC analog input negative channel
+ */
+typedef enum {
+	NOINPUTN,
+	B0N,
+	B1N,
+	B2N,
+	B3N,
+	B4N,
+	B5N,
+	B6N,
+	B7N,
+	C4N,
+	C5N,
+	PGA0N,
+	PGA1N,
+	TEMSENSORN,
+	RSVD_N,
+	GND,
+}ADC_InputNchTypeDef;
+
+/**
+ *	ADC analog input positive channel
+ */
+typedef enum {
+	NOINPUTP,
+	B0P,
+	B1P,
+	B2P,
+	B3P,
+	B4P,
+	B5P,
+	B6P,
+	B7P,
+	C4P,
+	C5P,
+	PGA0P,
+	PGA1P,
+	TEMSENSORP,
+	RSVD_P,
+	VBAT,
+}ADC_InputPchTypeDef;
+
+/**
+ *	ADC resolution
+ */
+typedef enum{
+	RES8,
+	RES10,
+	RES12,
+	RES14
+}ADC_ResTypeDef;
+
+/**
+ *	ADC channel input mode
+ */
+typedef enum{
+	SINGLE_ENDED_MODE = 0,  //single-ended mode
+	DIFFERENTIAL_MODE = 1,  //differential mode
+}ADC_InputModeTypeDef;
+
+/**
+ *  ADC Sampling cycles
+ */
+typedef enum{
+	SAMPLING_CYCLES_3,
+	SAMPLING_CYCLES_6,
+	SAMPLING_CYCLES_9,
+	SAMPLING_CYCLES_12,
+	SAMPLING_CYCLES_15,
+	SAMPLING_CYCLES_18,
+	SAMPLING_CYCLES_21,
+	SAMPLING_CYCLES_24,
+	SAMPLING_CYCLES_27,
+	SAMPLING_CYCLES_30,
+	SAMPLING_CYCLES_33,
+	SAMPLING_CYCLES_36,
+	SAMPLING_CYCLES_39,
+	SAMPLING_CYCLES_42,
+	SAMPLING_CYCLES_45,
+	SAMPLING_CYCLES_48,
+}ADC_SampCycTypeDef;
+
+/**
+ * ADC input channel: Left/Right/MISC/RNS
+ */
+typedef enum{
+	ADC_LEFT_CHN 	= BIT(0),
+	ADC_RIGHT_CHN	= BIT(1),
+	ADC_MISC_CHN	= BIT(2),
+	ADC_RNS_CHN 	= BIT(3),
+}ADC_ChTypeDef;
+
+/**
+ *	ADC Prescaler
+ */
+typedef enum{
+	ADC_PRESCALER_1,
+	ADC_PRESCALER_1F2,
+	ADC_PRESCALER_1F4,
+	ADC_PRESCALER_1F8
+}ADC_PreScalingTypeDef;
+
+/**
+ *	ADC current trim
+ */
+typedef enum{
+	 ADC_CUR_TRIM_PER75,
+	 ADC_CUR_TRIM_PER100,
+	 ADC_CUR_TRIM_PER125,
+	 ADC_CUR_TRIM_PER150
+}ADC_Cur_TrimTypeDef;
+
+
+typedef enum{
+	GAIN_STAGE_BIAS_PER75 = 0,
+	GAIN_STAGE_BIAS_PER100,
+	GAIN_STAGE_BIAS_PER125,
+	GAIN_STAGE_BIAS_PER150,
+}ADC_Gain_BiasTypeDef;
+
+/**
+ *	ADC mode: Normal mode/RNS mode
+ */
+typedef enum{
+	ADC_NORMAL_MODE      = 0,
+	ADC_RNS_MODE         = BIT(4),
+}ADC_ModeTypeDef;
+
+/**
+ * ADC RNS channel source
+ */
+typedef enum {
+	SAR_ADC_RNG_MODE   = 0,
+	R_RNG_MODE_0       = 2,
+	R_RNG_MODE_1       = 3,
+	ADC_DAT12_RNG_MODE = 4,
+	ADC_DAT5_RNG_MODE  = 6,
+}RNG_SrcTypeDef;
+
+
+typedef enum {
+	READ_UPDATA        = BIT(3),
+	CLOCLK_UPDATA      = BIT(4),
+}RNG_UpdataTypeDef;
+
+/**
+ * @brief      This function reset adc module
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void adc_reset_adc_module(void)
+{
+	reg_rst1 = FLD_RST1_ADC;
+	reg_rst1 = 0;
+}
+
+/**
+ * @brief      This function enable adc source clock: external 24M
+ * @param[in]  en - variable of source clock state 1: enable;  0: disable.
+ * @return     none.
+ */
+static inline void adc_enable_clk_24m_to_sar_adc(unsigned int en)
+{
+	if(en)
+	{
+		analog_write(areg_clk_setting, analog_read(areg_clk_setting) | FLD_CLK_24M_TO_SAR_EN);
+	}
+	else
+	{
+		analog_write(areg_clk_setting, analog_read(areg_clk_setting) & ~FLD_CLK_24M_TO_SAR_EN);
+	}
+}
+
+/**************************************************************************************
+afe_0xF4
+    BIT<2:0>  adc_clk_div
+      	  	  ADC clock(derive from external 24M crystal)
+      	  	  ADC clk frequency = 24M/(adc_clk_div + 1)
+    BIT<7:3>  reserved
+ *************************************************************************************/
+#define areg_adc_sampling_clk_div	   0xf4
+enum{
+	FLD_ADC_SAMPLE_CLK_DIV  = 	       BIT_RNG(0,2),
+};
+
+/**
+ * @brief      This function sets adc sample clk. adc sample clk = 24M/(1+div)  div: 0~7.
+ * @param[in]  div - the divider of adc sample clock.
+ * @return     none
+ */
+static inline void adc_set_sample_clk(unsigned char div)
+{
+	//afe_0xF4<7:3> is reserved, so no need to care its value (confirmed by junwei & congqing 20190805)
+	analog_write(areg_adc_sampling_clk_div, div & 0x07 );
+}
+
+/**************************************************************************************
+afe_0xE7
+    BIT<1:0>  adc_vrefl, Select VREF for left channel
+    BIT<3:2>  adc_vrefr, Select VREF for right channel
+    BIT<5:4>  adc_vrefm, Select VREF for Misc channel
+			0x0: 0.6V
+			0x1: 0.9V
+ 	 	 	0x2: 1.2V
+ 	 	 	0x3: VBAT/N (N=2/3/4, when afe_0xF9<3:2> is set as 0x3/0x2/0x1).
+
+	notice that: when choose ADC_VREF_VBAT_N, must use adc_set_vref_vbat_divider to config N(1/2/3/4)
+
+afe_0xF9
+    BIT<3:2>  adc_vbat_div
+      	  	  Vbat divider select (see adc_vref)
+					0x0: OFF
+					0x1: VBAT/4
+					0x2: VBAT/3
+					0x3: VBAT/2
+ *************************************************************************************/
+#define areg_adc_vref				   0xe7
+enum{
+	FLD_ADC_VREF_CHN_L = 		       BIT_RNG(0,1),
+	FLD_ADC_VREF_CHN_R = 		       BIT_RNG(2,3),
+	FLD_ADC_VREF_CHN_M = 		       BIT_RNG(4,5),
+};
+
+/**
+ * @brief      This function sets ADC reference voltage for  L,R and Mic channel
+ * @param[in]  v_ref_L - enum variable of adc reference voltage for L channel.
+ * @param[in]  v_ref_R - enum variable of adc reference voltage for R channel.
+ * @param[in]  v_ref_M - enum variable of adc reference voltage for Mic channel.
+ * @return     none
+ */
+static inline void adc_set_vref(ADC_RefVolTypeDef vRef_L, ADC_RefVolTypeDef vRef_R, ADC_RefVolTypeDef vRef_M)
+{
+	analog_write(areg_adc_vref, vRef_L | vRef_R << 2 | vRef_M << 4);
+}
+
+/**
+ * @brief      This function sets ADC reference voltage for the L channel
+ * @param[in]  v_ref - enum variable of adc reference voltage.
+ * @return     none
+ */
+static inline void adc_set_vref_chn_left(ADC_RefVolTypeDef v_ref)
+{
+	analog_write(areg_adc_vref, ((analog_read(areg_adc_vref) & (~FLD_ADC_VREF_CHN_L)) | (v_ref)));
+}
+
+/**
+ * @brief      This function sets ADC reference voltage for the R channel
+ * @param[in]  v_ref - enum variable of adc reference voltage.
+ * @return     none
+ */
+static inline void adc_set_vref_chn_right(ADC_RefVolTypeDef v_ref)
+{
+	analog_write(areg_adc_vref, ((analog_read(areg_adc_vref) & (~FLD_ADC_VREF_CHN_R)) | (v_ref << 2)));
+}
+
+/**
+ * @brief      This function sets ADC reference voltage for the MISC channel
+ * @param[in]  v_ref - enum variable of adc reference voltage.
+ * @return     none
+ */
+static inline void adc_set_vref_chn_misc(ADC_RefVolTypeDef v_ref)
+{
+	analog_write(areg_adc_vref, ((analog_read(areg_adc_vref) & (~FLD_ADC_VREF_CHN_M)) | (v_ref << 4)));
+}
+
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  v_ref - enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_ref_voltage(ADC_ChTypeDef ch_n, ADC_RefVolTypeDef v_ref);
+
+
+
+#define areg_adc_vref_vbat_div			0xf9
+enum{
+	FLD_ADC_VREF_VBAT_DIV   = 	        BIT_RNG(2,3),
+};
+/**
+ * @brief      This function select Vbat voltage divider
+ * @param[in]  vbat_div - enum variable of Vbat voltage divider.
+ * @return     none
+ */
+static inline void adc_set_vref_vbat_divider(ADC_VbatDivTypeDef vbat_div)
+{
+	analog_write(areg_adc_vref_vbat_div, (analog_read(areg_adc_vref_vbat_div) & (~FLD_ADC_VREF_VBAT_DIV)) | (vbat_div << 2));
+}
+
+
+
+/**************************************************************************************
+afe_0xE8
+    BIT<3:0>  Select negative input for Misc channel
+    BIT<7:4>  Select positive input for Misc channel
+
+afe_0xE9
+    BIT<3:0>  Select negative input for left channel
+    BIT<7:4>  Select positive input for left channel
+
+afe_0xEA
+    BIT<3:0>  Select negative input for right channel
+    BIT<7:4>  Select positive input for right channel
+
+	negative input:
+		0x0: No input
+		0x1: B<0>
+		0x2: B<1>
+		...
+		0x8: B<7>
+		0x9: C<4>
+		0xa: C<5>
+		0xb: pga_n<0> (PGA left-channel negative output)
+		0xc: pga_n<1> (PGA right-channel negative output)
+		0xd: tempsensor_n (Temperature sensor negative output)
+		0xe: rsvd  //spec "GND" is wrong
+		0xf: Ground
+
+	positive input:
+		0x0: No input
+		0x1: B<0>
+		0x2: B<1>
+		...
+		0x8: B<7>
+		0x9: C<4>
+		0xa: C<5>
+		0xb: pga_p<0> (PGA left-channel positive output)
+		0xc: pga_p<1> (PGA right-channel positive output)
+		0xd: tempsensor_p (Temperature sensor positive output)
+		0xe: rsvd
+		0xf: Vbat (Battery voltage)
+ *************************************************************************************/
+#define areg_adc_ain_chn_misc			0xe8
+#define areg_adc_ain_chn_left			0xe9
+#define areg_adc_ain_chn_right			0xea
+enum{
+	FLD_ADC_AIN_NEGATIVE = 		        BIT_RNG(0,3),
+	FLD_ADC_AIN_POSITIVE = 		        BIT_RNG(4,7),
+};
+
+/**
+ * @brief This function serves to set input channel for the MISC channel.
+ * @param[in]   p_ain - enum variable of ADC analog positive input channel.
+ * @param[in]   n_ain - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+static inline void adc_set_ain_chn_misc(ADC_InputPchTypeDef p_ain, ADC_InputNchTypeDef n_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, n_ain | p_ain << 4);
+}
+
+/**
+ * @brief This function serves to set input channel for the left channel.
+ * @param[in] p_ain - enum variable of ADC analog positive input channel.
+ * @param[in] n_ain - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+static inline void adc_set_ain_chn_left(ADC_InputPchTypeDef p_ain, ADC_InputNchTypeDef n_ain)
+{
+	analog_write(areg_adc_ain_chn_left, n_ain | p_ain << 4);
+}
+
+/**
+ * @brief This function serves to set input channel for the right channel.
+ * @param[in]   p_ain - enum variable of ADC analog positive input channel.
+ * @param[in]   n_ain - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+static inline void adc_set_ain_chn_right(ADC_InputPchTypeDef p_ain, ADC_InputNchTypeDef n_ain)
+{
+	analog_write(areg_adc_ain_chn_right, n_ain | p_ain << 4);
+}
+
+/**
+ * @brief      This function sets ADC analog negative input channel for the MISC channel
+ * @param[in]  v_ain - enum variable of ADC analog negative input.
+ * @return     none
+ */
+static inline void adc_set_ain_negative_chn_misc(ADC_InputNchTypeDef v_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, (analog_read(areg_adc_ain_chn_misc) & (~FLD_ADC_AIN_NEGATIVE)) | (v_ain));
+}
+
+/**
+ * @brief      This function sets ADC analog positive input channel for the MISC channel
+ * @param[in]  v_ain - enum variable of ADC analog positive input.
+ * @return     none
+ */
+static inline void adc_set_ain_positive_chn_misc(ADC_InputPchTypeDef v_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, (analog_read(areg_adc_ain_chn_misc) & (~FLD_ADC_AIN_POSITIVE)) | (v_ain << 4));
+}
+
+/**
+ * @brief      This function sets ADC analog negative input channel for the L channel
+ * @param[in]  v_ain - enum variable of ADC analog negative input.
+ * @return     none
+ */
+static inline void adc_set_ain_negative_chn_left(ADC_InputNchTypeDef v_ain)
+{
+	analog_write (areg_adc_ain_chn_left, (analog_read(areg_adc_ain_chn_left) & (~FLD_ADC_AIN_NEGATIVE)) | (v_ain));
+}
+
+/**
+ * @brief      This function sets ADC analog positive input channel for the L channel
+ * @param[in]  v_ain - enum variable of ADC analog positive input.
+ * @return     none
+ */
+static inline void adc_set_ain_positive_chn_left(ADC_InputPchTypeDef v_ain)
+{
+	analog_write (areg_adc_ain_chn_left, (analog_read(areg_adc_ain_chn_left) & (~FLD_ADC_AIN_POSITIVE)) | (v_ain << 4));
+}
+
+/**
+ * @brief      This function sets ADC analog negative input channel for the R channel
+ * @param[in]  v_ain - enum variable of ADC analog negative input.
+ * @return     none
+ */
+static inline void adc_set_ain_negative_chn_right(ADC_InputNchTypeDef v_ain)
+{
+	analog_write (areg_adc_ain_chn_right, (analog_read(areg_adc_ain_chn_right) & (~FLD_ADC_AIN_NEGATIVE)) | (v_ain));
+}
+
+/**
+ * @brief      This function sets ADC analog positive input channel for the R channel
+ * @param[in]  v_ain - enum variable of ADC analog positive input.
+ * @return     none
+ */
+static inline void adc_set_ain_positive_chn_right(ADC_InputPchTypeDef v_ain)
+{
+	analog_write (areg_adc_ain_chn_right, (analog_read(areg_adc_ain_chn_right) & (~FLD_ADC_AIN_POSITIVE)) | (v_ain << 4));
+}
+
+/**************************************************************************************
+afe_0xEB
+    BIT<1:0>  adc_resl, Set resolution for left channel
+    BIT<5:4>  adc_resr, Set resolution for right channel
+
+afe_0xEC
+    BIT<1:0>  adc_resm, Set resolution for Misc channel
+
+			 If RNS mode is set, resolution is set to 1. Otherwise ADC mode setting is:
+				0x0: 8bits
+				0x1: 10bits
+				0x2: 12bits
+				0x3: 14bits
+
+	BIT<3:2>  Reserved
+	BIT<4>    adc_en_diffl,  Select single-end or differential input mode for left channel.
+	BIT<5>    adc_en_diffr,  Select single-end or differential input mode for right channel.
+	BIT<6>    adc_en_diffm,  Select single-end or differential input mode for Misc channel.
+	BIT<7>    Reserved
+ *************************************************************************************/
+#define areg_adc_res_l_r				0xeb
+enum{
+	FLD_ADC_RES_L = 			        BIT_RNG(0,1),
+	FLD_ADC_RES_R = 			        BIT_RNG(4,5),
+};
+
+/**
+ * @brief      This function sets ADC resolution for the L channel
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return     none
+ */
+static inline void adc_set_resolution_chn_left(ADC_ResTypeDef v_res)
+{
+	analog_write(areg_adc_res_l_r, (analog_read(areg_adc_res_l_r) & (~FLD_ADC_RES_L)) | (v_res));
+}
+
+/**
+ * @brief      This function sets ADC resolution for the R channel
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return     none
+ */
+static inline void adc_set_resolution_chn_right(ADC_ResTypeDef v_res)
+{
+	analog_write(areg_adc_res_l_r, (analog_read(areg_adc_res_l_r) & (~FLD_ADC_RES_R)) | (v_res << 4));
+}
+
+
+
+/**
+ * @brief This function serves to set resolution.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return none
+ */
+void adc_set_resolution(ADC_ChTypeDef ch_n, ADC_ResTypeDef v_res);
+
+
+
+#define anareg_adc_res_m					0xec
+enum{
+	FLD_ADC_RES_M         =             BIT_RNG(0,1),
+	FLD_ADC_EN_DIFF_CHN_L =  	        BIT(4),
+	FLD_ADC_EN_DIFF_CHN_R =  	        BIT(5),
+	FLD_ADC_EN_DIFF_CHN_M =          	BIT(6),
+};
+/**
+ * @brief      This function sets ADC resolution for the MISC channel
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return     none
+ */
+static inline void adc_set_resolution_chn_misc(ADC_ResTypeDef v_res)
+{
+	analog_write(anareg_adc_res_m, (analog_read(anareg_adc_res_m) & (~FLD_ADC_RES_M)) | (v_res));
+}
+
+/**
+ * @brief      This function sets ADC input mode for the L channel
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return     none
+ */
+static inline void adc_set_input_mode_chn_left(ADC_InputModeTypeDef m_input)
+{
+	if(m_input){  //differential mode
+		analog_write(anareg_adc_res_m, (analog_read(anareg_adc_res_m) | FLD_ADC_EN_DIFF_CHN_L ));
+	}
+	else{  //single-ended mode
+		analog_write(anareg_adc_res_m, (analog_read(anareg_adc_res_m) & (~FLD_ADC_EN_DIFF_CHN_L)));
+	}
+}
+
+/**
+ * @brief      This function sets ADC input mode for the R channel
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return     none
+ */
+static inline void adc_set_input_mode_chn_right(ADC_InputModeTypeDef m_input)
+{
+	if(m_input){  //differential mode
+		analog_write(anareg_adc_res_m, analog_read(anareg_adc_res_m) | FLD_ADC_EN_DIFF_CHN_R);
+	}
+	else{  //single-ended mode
+		analog_write(anareg_adc_res_m, analog_read(anareg_adc_res_m) & (~FLD_ADC_EN_DIFF_CHN_R));
+	}
+}
+
+/**
+ * @brief      This function sets ADC input mode for the MISC channel
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return     none
+ */
+static inline void adc_set_input_mode_chn_misc(ADC_InputModeTypeDef m_input)
+{
+	if(m_input){  //differential mode
+		analog_write(anareg_adc_res_m, analog_read(anareg_adc_res_m) | FLD_ADC_EN_DIFF_CHN_M);
+	}
+	else{  //single-ended mode
+		analog_write(anareg_adc_res_m, analog_read(anareg_adc_res_m) & (~FLD_ADC_EN_DIFF_CHN_M));
+	}
+}
+
+/**
+ * @brief This function serves to set input_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+void adc_set_input_mode(ADC_ChTypeDef ch_n, ADC_InputModeTypeDef m_input);
+
+
+#define areg_adc_tsmaple_m				0xee
+enum{
+	FLD_ADC_TSAMPLE_CYCLE_CHN_M = 		BIT_RNG(0,3),
+};
+
+/**
+ * @brief      This function sets ADC sample time(the number of adc clocks for sample cycles) for the MISC channel.
+ * @param[in]  adcST - enum variable of adc sample cycles.
+ * @return     none
+ */
+static inline void adc_set_tsample_cycle_chn_misc(ADC_SampCycTypeDef adcST)
+{
+	//ana_ee<7:4> is reserved, so no need care its value (confirmed by junwei & congqing 20190805)
+	//analog_write(areg_adc_tsmaple_m, (analog_read(areg_adc_tsmaple_m)&(~FLD_ADC_TSAMPLE_CYCLE_CHN_M)) | (adcST) );
+	analog_write(areg_adc_tsmaple_m, adcST);  //optimize, <7:4> not cared
+}
+
+/**************************************************************************************
+afe_0xED
+    BIT<3:0>  adc_tsampl, Number of ADC clock cycles in sampling phase for left channel to stabilize the input before sampling
+    BIT<7:4>  adc_tsampr, Number of ADC clock cycles in sampling phase for right channel to stabilize the input before sampling
+
+afe_0xEE
+    BIT<3:0>  adc_tsampm, Number of ADC clock cycles in sampling phase for Misc channel to stabilize the input before sampling
+
+			0x0: 3 cycles (RNS mode default)
+			0x1: 6 cycles
+			0x2: 9 cycles
+			0x3: 12 cycles
+			......
+			0xf: 48 cycles
+ *************************************************************************************/
+#define areg_adc_tsmaple_l_r			0xed
+enum{
+	FLD_ADC_TSAMPLE_CYCLE_CHN_L = 		BIT_RNG(0,3),
+	FLD_ADC_TSAMPLE_CYCLE_CHN_R = 		BIT_RNG(4,7),
+};
+
+/**
+ * @brief      This function sets ADC sample time(the number of adc clocks for sample cycles) for the L channel.
+ * @param[in]  adcST - enum variable of adc sample cycles.
+ * @return     none
+ */
+static inline void adc_set_tsample_cycle_chn_left(ADC_SampCycTypeDef adcST)
+{
+	analog_write(areg_adc_tsmaple_l_r, (analog_read(areg_adc_tsmaple_l_r) & (~FLD_ADC_TSAMPLE_CYCLE_CHN_L)) | (adcST));
+}
+
+/**
+ * @brief      This function sets ADC sample time(the number of adc clocks for sample cycles) for the R channel.
+ * @param[in]  adcST - enum variable of adc sample cycles.
+ * @return     none
+ */
+static inline void adc_set_tsample_cycle_chn_right(ADC_SampCycTypeDef adcST)
+{
+	analog_write(areg_adc_tsmaple_l_r, (analog_read(areg_adc_tsmaple_l_r) & (~FLD_ADC_TSAMPLE_CYCLE_CHN_R)) | (adcST << 4));
+}
+
+/**
+ * @brief This function serves to set sample_cycle.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  adcST - enum variable of ADC Sampling cycles.
+ * @return none
+ */
+void adc_set_tsample_cycle(ADC_ChTypeDef ch_n, ADC_SampCycTypeDef adcST);
+
+/**************************************************************************************
+afe_0xEF<7:0>  	r_max_mc[7:0]
+afe_0xF0<7:0>	r_max_c[7:0]
+afe_0xF1
+		<3:0>   r_max_s
+		<5:4>   r_max_c[9:8]
+		<7:6>   r_max_mc[9:8]
+
+	r_max_mc[9:0]: serves to set length of capture state for RNS and Misc channel.
+	r_max_c[9:0]:  serves to set length of capture state for left and right channel.
+	r_max_s:       serves to set length of set state for left, right and Misc channel.
+
+	Note: State length indicates number of 24M clock cycles occupied by the state.
+ *************************************************************************************/
+#define areg_r_max_mc	        0xef
+enum{
+	FLD_R_MAX_MC0	= 			BIT_RNG(0,7),//0xef<7:0>  r_max_mc[7:0]
+};
+#define areg_r_max_c	       	0xf0
+enum{
+	FLD_R_MAX_C0	= 			BIT_RNG(0,7),//0xf0<7:0>  r_max_c[7:0]
+};
+
+#define	areg_r_max_s			0xf1
+enum{
+	FLD_R_MAX_S		=			BIT_RNG(0,3),//0xf1<3:0>  r_max_s
+	FLD_R_MAX_C1	= 			BIT_RNG(4,5),//0xf1<5:4>  r_max_c[9:8]
+	FLD_R_MAX_MC1	= 			BIT_RNG(6,7),//0xf1<7:6>  r_max_mc[9:8]
+};
+
+/**
+ * @brief      This function sets length of each set state
+ * @param[in]  r_max_s - variable of length of "set" state
+ * @return     none
+ */
+static inline void adc_set_length_set_state(unsigned char r_max_s)
+{
+	analog_write(areg_r_max_s, (analog_read(areg_r_max_s) & (~FLD_R_MAX_S)) | (r_max_s));
+}
+
+/**
+ * @brief      This function sets length of each "capture" state for MISC channel.
+ * @param[in]  r_max_mc[9:0] - variable of length of "capture" state for MISC channel.
+ * @return     none
+ * note :  0xef<7:0>  r_max_mc[7:0]
+ *         0xf1<7:6>  r_max_mc[9:8]
+ */
+static inline void adc_set_length_capture_state_for_chn_misc_rns(unsigned short r_max_mc)
+{
+	analog_write(areg_r_max_mc, (r_max_mc & 0x0ff));
+	analog_write(areg_r_max_s, ((analog_read(areg_r_max_s) & (~FLD_R_MAX_MC1)) | ((r_max_mc&0x3ff) >> 8) << 6));
+}
+
+/**
+ * @brief      This function sets length of each "capture" state for R and L channel.
+ * @param[in]  r_max_c[9:0] - variable of length of "capture" state for R and L channel.
+ * @return     none
+ * note : 0xf0<7:0>  r_max_c[7:0]
+ *        0xf1<5:4>  r_max_c[9:8]
+ */
+static inline void adc_set_length_capture_state_for_chn_left_right(unsigned short r_max_c)
+{
+	analog_write(areg_r_max_c, r_max_c & 0xff);
+	analog_write(areg_r_max_s, (analog_read(areg_r_max_s) & (~FLD_R_MAX_C1)) | (((r_max_c&0x3ff) >> 8) << 4));
+}
+
+/**
+ * @brief This function serves to set state and capture_state length.
+ * @param[in]   r_max_mc - Value of length of "capture" state for RNS & MISC channel.
+ * @param[in]   r_max_c - Value of length of "capture" state for L & R channel.
+ * @param[in]   r_max_s - Value of length of "set" state for L & R & MISC channel.
+ * @return none
+ */
+static inline void adc_set_state_length(unsigned short R_max_mc, unsigned short R_max_c,unsigned char R_max_s)
+{
+	analog_write(areg_r_max_mc, R_max_mc);
+	analog_write(areg_r_max_c, R_max_c);
+	analog_write(areg_r_max_s, ((R_max_mc >> 8) << 6) | ((R_max_c >> 8) << 4) | (R_max_s & FLD_R_MAX_S));
+}
+
+/***************************************************************************************
+afe_0xF2
+    BIT<0>   r_en_left    Enable left  channel. 1: enable;  0: disable
+    BIT<1>   r_en_right   Enable right channel. 1: enable;  0: disable
+	BIT<2>   r_en_Misc    Enable Misc  channel. 1: enable;  0: disable
+	BIT<3>   r_en_rns	  Enable RNS sampling.  1: enable;  0: disable
+	BIT<6:4> r_max_scnt   Set total length for sampling state machine (i.e. max state index)
+ *************************************************************************************/
+#define areg_adc_chn_en			0xf2
+enum{
+	FLD_ADC_CHN_EN_L	= 		BIT(0),
+	FLD_ADC_CHN_EN_R	= 		BIT(1),
+	FLD_ADC_CHN_EN_M	= 		BIT(2),
+	FLD_ADC_CHN_EN_RNS	= 		BIT(3),
+	FLD_ADC_MAX_SCNT	=		BIT_RNG(4,6),
+};
+/**
+ * @brief      This function sets ADC input channel.
+ * @param[in]  ad_ch - enum variable of ADC input channel.
+ * @return     none
+ */
+static inline void adc_set_chn_enable(ADC_ChTypeDef ad_ch)
+{
+	analog_write(areg_adc_chn_en, (analog_read(areg_adc_chn_en) & 0xf0) | ad_ch);
+}
+
+/**
+ * @brief      This function sets total state index for the channel.
+ * @param[in]  ad_ch - enum variable of ADC input channel.
+ * @param[in]  s_cnt - sum of the channel state index start with 0x0.
+ * @return     none
+ */
+static inline void adc_set_chn_enable_and_max_state_cnt(ADC_ChTypeDef ad_ch, unsigned char s_cnt)
+{
+	analog_write(areg_adc_chn_en, ad_ch | ((s_cnt & 0x07) << 4));
+}
+
+/**
+ * @brief      This function sets total state index for sampling state.
+ * @param[in]  s_cnt - sum of state index start with 0x0.
+ * @return     none
+ */
+static inline void adc_set_max_state_cnt(unsigned char s_cnt)
+{
+	analog_write(areg_adc_chn_en, (analog_read(areg_adc_chn_en) & (~FLD_ADC_MAX_SCNT)) | ((s_cnt & 0x07) << 4));
+}
+
+/**************************************************************************************
+afe_0xFA
+		BIT<1:0>  adc_itrim_preamp, Comparator preamp bias current trimming
+		BIT<3:2>  adc_itrim_vrefbuf, Vref buffer bias current trimming
+		BIT<5:4>  adc_itrim_vcmbuf, Vref buffer bias current trimming
+
+		BIT<7:6>  Analog input pre-scaling select
+					sel_ai_scale[1:0]: scaling factor
+							0x0: 1
+							0x1: 1/2
+							0x2: 1/4
+							0x3: 1/8
+
+ *************************************************************************************/
+#define    areg_ain_scale        		0xfa
+enum{
+	FLD_ADC_ITRIM_PREAMP 	= 	BIT_RNG(0,1),
+	FLD_ADC_ITRIM_VREFBUF	= 	BIT_RNG(2,3),
+	FLD_ADC_ITRIM_VCMBUF	= 	BIT_RNG(4,5),
+	FLD_SEL_AIN_SCALE 		= 	BIT_RNG(6,7),
+};
+
+/**
+ * @brief      This function sets pre-scaling for comparator preamp bias current trimming.
+ * @param[in]  bias - enum variable of current trimming.
+ * @return     none
+ */
+static inline void adc_set_itrim_preamp(ADC_Cur_TrimTypeDef bias)
+{
+	analog_write(areg_ain_scale, (analog_read(areg_ain_scale) & (~FLD_ADC_ITRIM_PREAMP)) | (bias << 0));
+}
+
+/**
+ * @brief      This function sets pre-scaling for Vref buffer bias current trimming.
+ * @param[in]  bias - enum variable of current trimming.
+ * @return     none
+ */
+static inline void adc_set_itrim_vrefbuf(ADC_Cur_TrimTypeDef bias)
+{
+	analog_write(areg_ain_scale, (analog_read(areg_ain_scale) & (~FLD_ADC_ITRIM_VREFBUF)) | (bias << 2));
+}
+
+/**
+ * @brief      This function sets pre-scaling for Vref(Vcmbuf) buffer bias current trimming.
+ * @param[in]  bias - enum variable of current trimming.
+ * @return     none
+ */
+static inline void adc_set_itrim_vcmbuf(ADC_Cur_TrimTypeDef bias)
+{
+	analog_write(areg_ain_scale, (analog_read(areg_ain_scale) & (~FLD_ADC_ITRIM_VCMBUF)) | (bias << 4));
+}
+
+/**************************************************************************************
+afe_0xFB
+    BIT<5:4>  pga_itrim_boost_l
+    BIT<7:6>  pga_itrim_boost_r
+    			0x0 :   75%
+				0x1 :   100%
+				0x2 :   125%
+				0x3 :   150%
+
+afe_0xFC
+    BIT<1:0>  pga_itrim_gain_l
+    BIT<3:2>  pga_itrim_gain_r
+    			0x0 :   75%
+				0x1 :   100%
+				0x2 :   125%
+				0x3 :   150%
+
+    BIT<4>	  adc_mode
+    					0: normal mode
+						1: rsvd (RNS mode)
+	BIT<5>	  adc_pd, Power down ADC
+						1: Power down
+						0: Power up
+	BIT<6>    pga_pd_l, power down left channel pga
+						1: Power down
+						0: Power up
+	BIT<7>    pga_pd_r, power down right channel pga
+						1: Power down
+						0: Power up
+ *************************************************************************************/
+#define areg_adc_pga_boost				0xfb
+enum{
+	FLD_PGA_CAP_TRIM_EN_L	  = BIT(0),
+	FLD_PGA_CAP_TRIM_EN_R	  = BIT(1),
+	FLD_PGA_ITRIM_BOOST_L	  = BIT_RNG(4,5),
+	FLD_PGA_ITRIM_BOOST_R	  = BIT_RNG(6,7),
+};
+
+/**
+ * @brief      This function sets left boost bias with PGA enable.
+ * @param[in]  bias - Value of gain_stage.
+ * @return     none
+ */
+static inline void adc_set_left_boost_bias(ADC_Gain_BiasTypeDef bias)
+{
+	analog_write(areg_adc_pga_boost, (analog_read(areg_adc_pga_boost) & (~FLD_PGA_ITRIM_BOOST_L)) | (bias << 4) | FLD_PGA_CAP_TRIM_EN_L);
+}
+
+/**
+ * @brief      This function sets right boost bias with PGA enable.
+ * @param[in]  bias - Value of gain_stage.
+ * @return     none
+ */
+static inline void adc_set_right_boost_bias(ADC_Gain_BiasTypeDef bias)
+{
+	analog_write(areg_adc_pga_boost, (analog_read(areg_adc_pga_boost) & (~FLD_PGA_ITRIM_BOOST_R)) | (bias << 6) | FLD_PGA_CAP_TRIM_EN_R);
+}
+
+#define areg_adc_pga_ctrl		0xfc
+enum{
+	FLD_PGA_ITRIM_GAIN_L		= BIT_RNG(0,1),
+	FLD_PGA_ITRIM_GAIN_R		= BIT_RNG(2,3),
+	FLD_ADC_MODE				= BIT(4),
+	FLD_SAR_ADC_POWER_DOWN 		= BIT(5),
+	FLD_POWER_DOWN_PGA_CHN_L 	= BIT(6),
+	FLD_POWER_DOWN_PGA_CHN_R 	= BIT(7),
+};
+
+/**
+ * @brief      This function gets left gain bias with PGA enable.
+ * @param[in]  bias_L - gain bais of left channel.
+ * @param[in]  bias_R - gain bais of right channel.
+ * @return     none
+ */
+static inline void adc_set_left_right_gain_bias(ADC_Gain_BiasTypeDef bias_L, ADC_Gain_BiasTypeDef bias_R)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & 0xf0) | (bias_L | bias_R << 2) );
+}
+
+/**
+ * @brief      This function gets left gain bias with PGA enable.
+ * @param[in]  bias - Value of gain_stage.
+ * @return     none
+ */
+static inline void adc_set_left_gain_bias(ADC_Gain_BiasTypeDef bias)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_PGA_ITRIM_GAIN_L)) | (bias));
+}
+
+/**
+ * @brief      This function gets right_gain_bias with PGA enable.
+ * @param[in]  bias - Value of gain_stage.
+ * @return     none
+ */
+static inline void adc_set_right_gain_bias(ADC_Gain_BiasTypeDef bias)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_PGA_ITRIM_GAIN_R)) | (bias << 2));
+}
+
+/**
+ * @brief      This function serves to set mode for ADC.
+ * @param[in]  adc_m - 0: normal mode; 1: RNS mode.
+ * @return     none
+ */
+static inline void adc_set_mode(ADC_ModeTypeDef adc_m)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_ADC_MODE)) | adc_m);
+}
+
+/**
+ * @brief      This function sets sar_adc power.
+ * @param[in]  on - 1 : power on; off-0 : power off.
+ * @return     none
+ * caution power on cause  audio  creepage
+ */
+static inline void adc_power_on_sar_adc(unsigned char on_off)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_SAR_ADC_POWER_DOWN)) | (!on_off) << 5);
+}
+
+/**
+ * @brief      This function sets PGA-Left-channel power.
+ * @param[in]  on -  1 : power on; off-0 : power off.
+ * @return     none
+ */
+static inline void pga_left_chn_power_on(unsigned char on_off)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_POWER_DOWN_PGA_CHN_L)) | (!on_off) << 6);
+}
+
+/**
+ * @brief      This function sets PGA Right channel power.
+ * @param[in]  on -  1 : power on; off- 0 : power off.
+ * @return     none
+ */
+static inline void pga_right_chn_power_on(unsigned char on_off)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_POWER_DOWN_PGA_CHN_R)) | (!on_off) << 7);
+}
+
+#define areg_fe	 0xfe//0xfe default value is 0xe5,for output audio, mast clear 0xfe<7:5>
+
+/**
+ * @brief      This function sets  ADC RNS channel source and random update type.
+ * @param[in]  src - the type of ADC RNS channel source
+ * @param[in]  update_type - the type of random update
+ * @return     none
+ */
+static inline void RNG_Set(RNG_SrcTypeDef src,RNG_UpdataTypeDef update_type)
+{
+	WriteAnalogReg(0xfe, src | update_type);//Set
+}
+
+/**************************************************************************************
+afe_0xF5<7:0>  	rng[7:0]   		Read only, random number [7:0]
+afe_0xF6<7:0>	rng[15:8]  		Read only, random number [15:8]
+afe_0xF7<7:0>   adc_dat[7:0]  	Read only, Misc adc dat[7:0]
+afe_0xF8<7:0>   adc_dat[15:8]  	Read only
+								[7]: vld, ADC data valid status bit (This bit will be set as 1 at the end of capture state to indicate the ADC data is valid, and will be cleared when set state starts.)
+								[6:0]:  Misc adc_dat[14:8]
+
+ *************************************************************************************/
+#define    areg_adc_rng_l       0xf5
+#define    areg_adc_rng_h       0xf6
+#define    areg_adc_misc_l      0xf7
+#define    areg_adc_misc_h      0xf8
+enum{
+	FLD_ADC_MISC_DATA   	= 	BIT_RNG(0,6),
+	FLD_ADC_MISC_VLD    	= 	BIT(7),
+};
+
+/**
+ * @brief  This function serves to read random number.
+ * @param[in]  none
+ * @return the result of read random number
+ */
+static inline unsigned short RNG_Read(void)
+{
+#if 1
+	return (ReadAnalogReg(areg_adc_rng_h) << 8 | ReadAnalogReg(areg_adc_rng_l));
+#else
+	unsigned short tmp1,tmp2,RngValue;
+	tmp2 = ReadAnalogReg(0xf5);
+	tmp1 = ReadAnalogReg(0xf6);  //read
+	RngValue = (tmp1<<8) + tmp2;
+	return RngValue;
+#endif
+}
+
+/**
+ * @brief This function serves to set input channel in single_ended_input_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  InPCH - enum variable of ADC analog positive input channel.
+ * @return none
+ */
+void adc_set_ain_channel_single_ended_input_mode(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH);
+
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  InPCH - enum variable of ADC analog positive input channel.
+ * @param[in]  InNCH - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+void adc_set_ain_channel_differential_mode(ADC_ChTypeDef ch_n, ADC_InputPchTypeDef InPCH,ADC_InputNchTypeDef InNCH);
+
+/**
+ * @brief This function serves to set pre_scaling.
+ * @param[in]  v_scl - enum variable of ADC pre_scaling factor.
+ * @return none
+ */
+void adc_set_ain_pre_scaler(ADC_PreScalingTypeDef v_scl);
+
+
+/**
+ * @brief This function serves to ADC init.
+ * @param[in]   none
+ * @return none
+ */
+void adc_init(void);
+
+/**
+ * @brief This function is used to calib ADC 1.2V vref for GPIO.
+ * @param[in] data - GPIO sampling calibration value.
+ * @return none
+ */
+void adc_set_gpio_calib_vref(unsigned short data);
+
+/**
+ * @brief This function is used to calib ADC 1.2V vref offset for GPIO two-point.
+ * @param[in] offset - GPIO sampling two-point calibration value offset.
+ * @return none
+ */
+void adc_set_gpio_two_point_calib_offset(signed char offset);
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ *        This interface can be used to switch sampling IO without reinitializing the ADC.
+ * @param[in]  pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ *        This interface can be used to switch sampling IO without reinitializing the ADC.
+ * @param[in]  pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for ADC configuration of ADC IO voltage sampling.
+ * @param[in]   pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_init(GPIO_PinTypeDef pin);
+
+
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in]    pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_init(GPIO_PinTypeDef pin);
+
+
+/**
+ * @brief This function serves to set adc sampling and get results.
+ * @param[in]  none.
+ * @return the result of sampling.
+ */
+unsigned int adc_sample_and_get_result(void);
+
+/**
+ * @brief This function serves to set adc sampling, get results and the voltage fluctuation.
+ * @param[in]  none.
+ * @return the result of sampling.
+ */
+_attribute_ram_code_ unsigned int adc_get_result_with_fluct(unsigned int *v);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/aes.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/aes.h
new file mode 100644
index 00000000..e1df15cd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/aes.h
@@ -0,0 +1,52 @@
+/********************************************************************************************************
+ * @file    aes.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef AES_H_
+#define AES_H_
+
+/**
+ * @brief       This function servers to perform aes_128 encryption for 16-Byte input data
+ *              with specific 16-Byte key
+ * @param[in]   Key the pointer to the 16-Byte Key
+ * @param[in]   Data the pointer to the 16-Byte plain text
+ * @param[out]  Result the pointer to the encryption result cipher text
+ * @return      0: success;
+ *              not 0: failure
+ */
+extern int aes_encrypt(unsigned char *Key, unsigned char *Data, unsigned char *Result);
+
+/**
+ * @brief       This function servers to perform aes_128 decryption for 16-Byte input data
+ *              with specific 16-Byte key
+ * @param[in]   Key the pointer to the 16-Byte Key
+ * @param[in]   Data the pointer to the 16-Byte cipher text
+ * @param[out]  Result the pointer to the decryption result plain text
+ * @return      0: success;
+ *              not 0: failure
+ */
+extern int aes_decrypt(unsigned char *Key, unsigned char *Data, unsigned char *Result);
+
+
+#endif /* AES_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/analog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/analog.h
new file mode 100644
index 00000000..ad2823cc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/analog.h
@@ -0,0 +1,65 @@
+/********************************************************************************************************
+ * @file    analog.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+/**
+ * @brief      This function serves to analog register read.
+ * @param[in]  addr - address need to be read.
+ * @return     the result of read.
+ */
+unsigned char analog_read(unsigned char addr);
+
+/**
+ * @brief      This function serves to analog register write.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  v - the value need to be write.
+ * @return     none.
+ */
+void analog_write(unsigned char addr, unsigned char v);
+
+/**
+ * @brief      This function serves to analog register read.
+ * @param[in]  addr - address need to be read.
+ * @param[in]  *buff - the value need to be read.
+ * @param[in]  len - the length of read value.
+ * @return     none.
+ */
+void analog_read_buff(unsigned char addr, unsigned char *buff, int len);
+
+/**
+ * @brief      This function serves to analog register write.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  *buff - the value need to be write.
+ * @param[in]  len - the length of write value.
+ * @return     none.
+ */
+void analog_write_buff(unsigned char addr, unsigned char *buff, int len);
+
+
+#define WriteAnalogReg  analog_write
+#define ReadAnalogReg   analog_read
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/audio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/audio.h
new file mode 100644
index 00000000..161b4bf7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/audio.h
@@ -0,0 +1,244 @@
+/********************************************************************************************************
+ * @file    audio.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef AUDIO_H
+#define AUDIO_H
+
+
+#include "register.h"
+#include "i2c.h"
+
+#define DMIC_INPUT_MODE_STEREO    	0
+#define AUDIO_DBL_BUF_ENABLE	   	0
+
+/**
+ * define audio amic mode.
+ */
+typedef enum{
+	AUDIO_AMIC_MONO_MODE,
+	AUDIO_AMIC_STEREO_MODE,
+}Audio_Amic_mode;
+
+/**
+ * define audio sdm output mode.
+ */
+typedef enum{
+	AUDIO_SDM_SINGLE_OUTPUT,
+	AUDIO_SDM_DUAL_OUTPUT,
+}Audio_SDM_output_mode;
+
+/**
+ * define audio rate value.
+ */
+typedef enum{
+	AUDIO_8K,
+	AUDIO_16K,
+	AUDIO_32K,
+	AUDIO_48K,
+	RATE_SIZE
+}AudioRate_Typedef;
+
+/**
+ * define audio input type.
+ */
+typedef enum{
+	AMIC,
+	DMIC,
+	I2S_IN,
+	USB_IN,
+	BUF_IN,
+}AudioInput_Typedef;
+
+/**
+ * define codec mode.
+ */
+typedef enum{
+	CODEC_MODE_MICPHONE_TO_HEADPHONE_LINEOUT_I2S,
+	CODEC_MODE_LINE_TO_HEADPHONE_LINEOUT_I2S,
+	CODEC_MODE_I2S_TO_HEADPHONE_LINEOUT,
+	CODEC_MODE_LINE_IN_TO_LINEOUT_I2S
+}CodecMode_Typedef;
+
+/**
+ * @brief     shut down audio and ADC  Module
+ * @param[in] none.
+ * @return    none
+ */
+void audio_stop(void);
+
+/**
+ * @brief     This function serves to reset audio Module
+ * @param[in] none.
+ * @return    none
+ */
+static inline void audio_reset(void)
+{
+	reg_rst2 = FLD_RST2_AUD;
+	reg_rst2 = 0;
+}
+
+/**
+ * 	@brief      This function serves to set the clock of dmic
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ */
+static inline void audio_set_dmic_clk(unsigned char step,unsigned char mod)
+{
+	reg_dmic_step = step|FLD_DMIC_CLK_EN;
+	reg_dmic_mod = mod;
+}
+
+/**
+ * 	@brief      This function serves to set the clock of i2s
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ */
+static inline void audio_set_i2s_clk(unsigned char step,unsigned char mod)
+{
+	reg_i2s_step = step|FLD_I2S_CLK_EN;
+	reg_i2s_mod = mod;
+}
+/**
+ * @brief      This function performs to read pointer/write pointer location.
+ * @param[in]  none.
+ * @return     the address of read/write.
+ */
+static inline unsigned short get_mic_wr_ptr (void)
+{
+	return reg_audio_wptr >>1;
+}
+/**
+ * 	@brief     audio amic initial function. configure ADC corresponding parameters. set hpf,lpf and decimation ratio.
+ * 	@param[in] Audio_Rate - audio rate value
+ * 	@return    none
+ */
+void audio_amic_init(AudioRate_Typedef Audio_Rate);
+/**
+ * 	@brief     audio DMIC init function, config the speed of DMIC and downsample audio data to required speed.         actually audio data is dmic_speed/d_samp.
+ * 	@param[in] Audio_Rate - set the DMIC speed. such as 1 indicate 1M and 2 indicate 2M.
+ * 	@return    none.
+ */
+void audio_dmic_init(AudioRate_Typedef Audio_Rate);
+/**
+ * 	@brief     audio USB init function, config the speed of DMIC and downsample audio data to required speed.
+ *            actually audio data is dmic_speed/d_samp.
+ * 	@param[in] Audio_Rate - set the DMIC speed. such as 1 indicate 1M and 2 indicate 2M.
+ * 	@return    none.
+ */
+void audio_usb_init(AudioRate_Typedef Audio_Rate);
+
+/**
+ * @brief     audio buff init function, config the speed of DMIC and downsample audio data to required speed.
+ *            actually audio data is dmic_speed/d_samp.
+ * @param[in] Audio_Rate  - audio rate.
+ * @return    none.
+ */
+void audio_buff_init(AudioRate_Typedef Audio_Rate);
+
+/**
+ * 	@brief     audio I2S init in function, config the speed of i2s and MCLK to required speed.
+ * 	@param[in] none.
+ * 	@return    none.
+ */
+void audio_i2s_init(void);
+
+
+/**
+*	@brief	   sdm setting function, enable or disable the sdm output, configure SDM output paramaters.
+*	@param[in]	InType -	  SDM input type, such as AMIC,DMIC,I2S_IN,USB_IN.
+*	@param[in]	Audio_Rate - audio sampling rate, such as 16K,32k etc.
+*	@param[in]	audio_out_en - audio output enable or disable set, '1' enable audio output; '0' disable output.
+*	@return	none
+*/
+void audio_set_sdm_output(AudioInput_Typedef InType,AudioRate_Typedef Audio_Rate,unsigned char audio_out_en);
+
+/**
+ * @brief     This function servers to set USB input/output.
+ * @param[in] none.
+ * @return    none.
+ */
+void audio_set_usb_output(void);
+
+/**
+ * 	@brief	   	i2s setting function, enable or disable the i2s output, configure i2s output paramaters
+ * 	@param[in] 	InType		- select audio input type including amic ,dmic ,i2s and usb
+ * 	@param[in] 	Audio_Rate 	- select audio rate, which will decide on which adc sampling rate and relative decimation configuration will be chosen.
+ * 	@return	  	none
+ */
+void audio_set_i2s_output(AudioInput_Typedef InType,AudioRate_Typedef Audio_Rate);
+
+/**
+ * 	@brief     This function serves to set I2S input.
+ * 	@param[in] i2c_pin_group - select the pin for I2S.
+ * 	@param[in] CodecMode - select I2S mode.
+ * 	@param[in] sysclk - system clock.
+ * 	@return    none.
+ */
+void audio_set_codec(I2C_GPIO_GroupTypeDef i2c_pin_group, CodecMode_Typedef CodecMode, unsigned int sysclk);
+
+
+
+/**
+ * @brief     This function servers to receive data from buffer.
+ * @param[in] buf - the buffer in which the data need to write
+ * @param[in] len - the length of the buffer.
+ * @return    none.
+ */
+void audio_rx_data_from_buff(signed char* buf,unsigned int len);
+
+/**
+ * @brief     This function servers to receive data from sample buffer by 16 bits.
+ * @param[in] buf - the buffer in which the data need to write
+ * @param[in] len - the length of the buffer by short.
+ * @return    none.
+ */
+void audio_rx_data_from_sample_buff(const short *buf, unsigned int len);
+
+/**
+ * @brief     This function servers to receive data from sample buffer by 16 bits.
+ * @param[in] buf - the buffer in which the data need to write
+ * @param[in] len - the length of the buffer by short.
+ * @return    none.
+ */
+void audio_rx_data_from_sample_buff(const short *buf, unsigned int len);
+
+/**
+ * 	@brief      This function serves to set amic mode
+ * 	@param[in]  mode - the amic mode(mono mode or stereo mode)
+ * 	@return     none
+ */
+void audio_set_amic_mode(Audio_Amic_mode mode);
+
+/**
+ * 	@brief      This function serves to set sdm output mode
+ * 	@param[in]  mode - the amic mode(mono mode or stereo mode)
+ * 	@return     none
+ */
+void audio_set_sdm_output_mode(Audio_SDM_output_mode mode);
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/bsp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/bsp.h
new file mode 100644
index 00000000..fb456100
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/bsp.h
@@ -0,0 +1,118 @@
+/********************************************************************************************************
+ * @file    bsp.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef BSP_H_
+#define BSP_H_
+
+
+
+/**
+ *  Reg operations
+ */
+#define REG_BASE_ADDR			0x800000
+
+#define REG_ADDR8(a)			(*(volatile unsigned char*) (REG_BASE_ADDR + (a)))
+#define REG_ADDR16(a)			(*(volatile unsigned short*)(REG_BASE_ADDR + (a)))
+#define REG_ADDR32(a)			(*(volatile unsigned long*) (REG_BASE_ADDR + (a)))
+
+#define write_reg8(addr,v)		(*(volatile unsigned char*)  (REG_BASE_ADDR + (addr)) = (unsigned char)(v))
+#define write_reg16(addr,v)		(*(volatile unsigned short*) (REG_BASE_ADDR + (addr)) = (unsigned short)(v))
+#define write_reg32(addr,v)		(*(volatile unsigned long*)  (REG_BASE_ADDR + (addr)) = (v))
+
+#define read_reg8(addr)			(*(volatile unsigned char*) (REG_BASE_ADDR + (addr)))
+#define read_reg16(addr)		(*(volatile unsigned short*)(REG_BASE_ADDR + (addr)))
+#define read_reg32(addr)		(*(volatile unsigned long*) (REG_BASE_ADDR + (addr)))
+
+#define WRITE_REG8				write_reg8
+#define WRITE_REG16				write_reg16
+#define WRITE_REG32				write_reg32
+
+#define READ_REG8				read_reg8
+#define READ_REG16				read_reg16
+#define READ_REG32				read_reg32
+
+#define TCMD_UNDER_BOTH			0xc0
+#define TCMD_UNDER_RD			0x80
+#define TCMD_UNDER_WR			0x40
+
+#define TCMD_MASK				0x3f
+
+#define TCMD_WRITE				0x3
+#define TCMD_WAIT				0x7
+#define TCMD_WAREG				0x8
+
+/**
+ *  command table for special registers
+ */
+typedef struct TBLCMDSET {
+	unsigned short	adr;
+	unsigned char	dat;
+	unsigned char	cmd;
+} TBLCMDSET;
+
+/**
+ * @brief      This function performs a series of operations of writing digital or analog registers
+ *             according to a command table
+ * @param[in]  pt - pointer to a command table containing several writing commands
+ * @param[in]  size  - number of commands in the table
+ * @return     number of commands are carried out
+ */
+
+extern int LoadTblCmdSet(const TBLCMDSET * pt, int size);
+
+
+/**
+ * @brief      This function writes a byte data to analog register
+ * @param[in]  addr - the address of the analog register needs to write
+ * @param[in]  value  - the data will be written to the analog register
+ * @param[in]  e - the end address of value
+ * @param[in]  s - the start address of the value
+ * @return     none
+ */
+extern void sub_wr_ana(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+
+/**
+ * @brief      This function writes a byte data to a specified analog register
+ * @param[in]  addr - the address of the analog register needs to write
+ * @param[in]  value  - the data will be written to the analog register
+ * @param[in]  e - the end address of value
+ * @param[in]  s - the start address of the value
+ * @return     none
+ */
+extern void sub_wr(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+
+/**
+ * @brief      This function reboot mcu.
+ * @return     none
+ */
+static inline void mcu_reset(void)
+{
+	write_reg8(0x06f,0x20);
+}
+
+extern unsigned long normalSpGet(void);
+
+
+#endif /* BSP_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/clock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/clock.h
new file mode 100644
index 00000000..5144793c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/clock.h
@@ -0,0 +1,146 @@
+/********************************************************************************************************
+ * @file    clock.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#define 	_ASM_NOP_			asm("tnop")
+
+/**
+ * @brief  instruction delay.
+ */
+#define		CLOCK_DLY_1_CYC    _ASM_NOP_
+#define		CLOCK_DLY_2_CYC    _ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_3_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_4_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_5_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_6_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_7_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_8_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_9_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_10_CYC   _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+
+/**
+ * @brief select RC as system clock
+ */
+#ifndef SYSCLK_RC_CLOCK_EN
+#define SYSCLK_RC_CLOCK_EN			1
+#endif
+
+extern unsigned char system_clk_type;
+extern unsigned char system_clk_mHz;
+
+/**
+ * @brief system clock type.
+ */
+typedef enum{
+	SYS_CLK_12M_Crystal = 0x44,
+	SYS_CLK_16M_Crystal = 0x43,
+	SYS_CLK_24M_Crystal = 0x42,
+	SYS_CLK_32M_Crystal = 0x60,
+	SYS_CLK_48M_Crystal = 0x20,
+
+	SYS_CLK_RC_THRES = 0x10,
+
+	SYS_CLK_24M_RC 	 = 0x00,
+	SYS_CLK_32M_RC 	 = 0x01,
+	SYS_CLK_48M_RC 	 = 0x02,
+}SYS_CLK_TypeDef;
+
+/**
+ * @brief 32K clock type.
+ */
+
+typedef enum{
+	CLK_32K_RC   =0,
+	CLK_32K_XTAL =1,
+}CLK_32K_TypeDef;
+
+/**
+ * @brief       This function to select the system clock source.
+ * @param[in]   SYS_CLK - the clock source of the system clock.
+ * @return      none
+ */
+void clock_init(SYS_CLK_TypeDef SYS_CLK);
+
+/**
+ * @brief       This function to get the system clock source.
+ * @param[in]   none
+ * @return      system clock source
+ */
+
+static inline int clock_get_system_clk(void)
+{
+	return system_clk_type;
+}
+
+/**
+ * @brief   This function serves to set 32k clock source.
+ * @param   variable of 32k type.
+ * @return  none.
+ */
+void clock_32k_init(CLK_32K_TypeDef src);
+
+/**
+ * @brief     This function performs to select 24M as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_24m_cal(void);
+
+/**
+ * @brief     This function performs to select 48M RC as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_48m_cal(void);
+
+/**
+ * @brief     This function performs to select 32K as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_32k_cal(void);
+
+/**
+ * @brief     This function performs to calibration the source clock.
+ * @param[in] none.
+ * @return    none.
+ */
+void doubler_calibration(void);
+
+/**
+ * @brief     This function performs to select 24M/2 RC as source of DMIC.
+ * @param[in] source clock to provide DMIC.
+ * @return    none.
+ */
+void dmic_prob_24M_rc(void);
+
+/**
+ * @brief   	This function serves to kick external crystal.
+ * @param[in]   times - the frequency of being kicked by pwm.
+ * @return  	none.
+ */
+void pwm_kick_32k_pad_times(unsigned int times);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dfifo.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dfifo.h
new file mode 100644
index 00000000..7620290b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dfifo.h
@@ -0,0 +1,116 @@
+/********************************************************************************************************
+ * @file    dfifo.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef 	DFIFO_H
+#define 	DFIFO_H
+
+#include "register.h"
+
+
+/**
+ * @brief      This function performs to enable audio input of DFIFO2.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void dfifo_enable_dfifo2(void)
+{
+	reg_dfifo_mode |= FLD_AUD_DFIFO2_IN;
+}
+
+/**
+ * @brief      This function performs to disable audio input of DFIFO2.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void dfifo_disable_dfifo2(void)
+{
+	reg_dfifo_mode &= ~FLD_AUD_DFIFO2_IN;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO0.
+ * @param[in]  pbuff - address in DFIFO0.
+ * @param[in]  size_buff - depth of DFIFO0.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo0(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo0_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo0_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO1.
+ * @param[in]  pbuff - address in DFIFO1.
+ * @param[in]  size_buff - depth of DFIFO1.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo1(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo1_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo1_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO2.
+ * @param[in]  pbuff - address in DFIFO2.
+ * @param[in]  size_buff - depth of DFIFO2.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo2(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo2_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo2_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to set MISC channel.
+ * @param[in]  pbuff - address in FIFO2.
+ * @param[in]  size_buff - depth of FIFO2.
+ * @return     none.
+ */
+static inline void adc_config_misc_channel_buf(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo_misc_chn_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo_misc_chn_size = (size_buff>>4)-1;
+
+	reg_dfifo2_wptr = 0;  //clear dfifo2 write pointer
+}
+
+/**
+ * @brief     configure the mic buffer's address and size
+ * @param[in] pbuff - the first address of SRAM buffer to store MIC data.
+ * @param[in] size_buff - the size of pbuff.
+ * @return    none
+ */
+static inline void audio_config_mic_buf(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo_audio_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo_audio_size = (size_buff>>4)-1;
+}
+
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dma.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dma.h
new file mode 100644
index 00000000..aa8efdc6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/dma.h
@@ -0,0 +1,161 @@
+/********************************************************************************************************
+ * @file    dma.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef DMA_H_
+#define DMA_H_
+
+#include "register.h"
+
+
+#define DMA_RFRX_LEN_HW_INFO				0	// 826x: 8
+#define DMA_RFRX_OFFSET_HEADER				4	// 826x: 12
+#define DMA_RFRX_OFFSET_RFLEN				5   // 826x: 13
+#define DMA_RFRX_OFFSET_DATA				6	// 826x: 14
+
+
+#define DMA_RFRX_OFFSET_CRC24(p)			(p[DMA_RFRX_OFFSET_RFLEN]+6)  //data len:3
+#define DMA_RFRX_OFFSET_TIME_STAMP(p)		(p[DMA_RFRX_OFFSET_RFLEN]+9)  //data len:4
+#define DMA_RFRX_OFFSET_FREQ_OFFSET(p)		(p[DMA_RFRX_OFFSET_RFLEN]+13) //data len:2
+#define DMA_RFRX_OFFSET_RSSI(p)				(p[DMA_RFRX_OFFSET_RFLEN]+15) //data len:1, signed
+
+
+
+#define	RFDMA_RX_DISABLE		(reg_dma_chn_en &= (~FLD_DMA_CHN_RF_RX))
+#define	RFDMA_RX_ENABLE			(reg_dma_chn_en |= (FLD_DMA_CHN_RF_RX))
+
+#define	RFDMA_TX_DISABLE		(reg_dma_chn_en &= (~FLD_DMA_CHN_RF_TX))
+#define	RFDMA_TX_ENABLE			(reg_dma_chn_en |= (FLD_DMA_CHN_RF_TX))
+
+
+typedef enum{
+	DMA0_UART_RX,
+	DMA1_UART_TX,
+	DMA2_RF_RX,
+	DMA3_RF_TX,
+	DMA4_AES_DECO,
+	DMA5_AES_CODE,
+	DMA6,
+	DMA7_PWM,
+}DMA_chn_Typdef; 
+
+/**
+ * @brief     This function resets the DMA module.
+ * @param[in] none
+ * @return    none
+ */
+static inline void dma_reset(void)
+{
+	reg_rst1 |= FLD_RST1_DMA;
+	reg_rst1 &= (~FLD_RST1_DMA);
+}
+/**
+ * @brief     This function performs to enable DMA.
+ * @param[in] msk - variable to config.
+ * @return    none.
+ */
+static inline void dma_irq_enable(unsigned int msk)
+{
+	reg_dma_chn_irq_msk |= msk;
+}
+
+/**
+ * @brief     This function performs to enable DMA.
+ * @param[in] msk - variable to config.
+ * @return    none.
+ */
+static inline void dma_irq_disable(unsigned int msk)
+{
+	reg_dma_chn_irq_msk &= ~msk;
+}
+
+/**
+ * @brief     This function performs to enable DMA chnnel.
+ * @param[in] en - en: 1 enable. 0 disable.
+ * @return    none.
+ */
+
+static inline void dma_chn_enable(unsigned char chn, unsigned int en)
+{
+	if(en){
+		reg_dma_chn_en |= chn;
+	}
+	else{
+		reg_dma_chn_en &= ~chn;
+	}
+}
+
+/**
+ * @brief     This function performs to enable DMA interrupt.
+ * @param[in] chn - variable to config the DMA interrupt channel.
+ * @param[in] en - en: 1 enable. 0 disable.
+ * @return    none.
+ */
+
+static inline void dma_chn_irq_enable(unsigned char chn, unsigned int en)
+{
+	reg_dma_irq_status = chn;
+
+	if(en){
+		reg_dma_chn_en |= chn;
+		reg_dma_chn_irq_msk |= chn;
+	}
+	else{
+		reg_dma_chn_en &= ~chn;
+		reg_dma_chn_irq_msk &= ~chn;
+	}
+}
+
+/**
+ * @brief      Clear IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline void dma_chn_irq_status_clr(unsigned char irq_status)
+{
+	reg_dma_irq_status = irq_status;
+}
+
+
+/**
+ * @brief      Get IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline unsigned char dma_chn_irq_status_get(void)
+{
+    return reg_dma_irq_status;
+}
+
+/**
+ * @brief      This function serves to set the size of dma buffer
+ * @param[in]  size - select tx or rx irq. caution: max size = 2048
+ * @return     none
+ */
+static inline void dma_set_buff_size(DMA_chn_Typdef chn,unsigned int size)
+{
+	reg_dma_size(chn) = (unsigned char)(size/16);
+}
+
+#endif /* DMA_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/driver_8258.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/driver_8258.h
new file mode 100644
index 00000000..dcae84ce
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/driver_8258.h
@@ -0,0 +1,52 @@
+/********************************************************************************************************
+ * @file    driver_8258.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bsp.h"
+#include "register.h"
+#include "analog.h"
+#include "aes.h"
+#include "clock.h"
+#include "timer.h"
+#include "dfifo.h"
+#include "irq.h"
+#include "watchdog.h"
+#include "dma.h"
+#include "gpio.h"
+#include "adc.h"
+#include "random.h"
+#include "audio.h"
+#include "pwm.h"
+#include "i2c.h"
+#include "spi.h"
+#include "uart.h"
+#include "usbhw.h"
+#include "flash.h"
+#include "rf_drv.h"
+#include "emi.h"
+#include "pm.h"
+#include "flash/flash_type.h"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/emi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/emi.h
new file mode 100644
index 00000000..764c0d5f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/emi.h
@@ -0,0 +1,167 @@
+/********************************************************************************************************
+ * @file    emi.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef EMI_H_
+#define EMI_H_
+
+#include "rf_drv.h"
+
+
+/**
+ * @brief   This function serves to set singletone power.
+ * @param   level - the power level.
+ * @return  none.
+ */
+void rf_set_power_level_index_singletone (RF_PowerTypeDef level);
+
+/**
+ * @brief   This function serves to set singletone power and channel.
+ * @param   power_level - the power level.
+ * @param   rf_chn - the channel.
+ * @return  none.
+ */
+void rf_emi_single_tone(RF_PowerTypeDef power_level,signed char rf_chn);
+
+/**
+ * @brief   This function serves to close RF
+ * @param   none.
+ * @return  none.
+ */
+void rf_emi_stop(void);
+
+/**
+ * @brief   This function serves to set rx mode and channel.
+ * @param   mode - mode of RF
+ * @param   rf_chn - the rx channel.
+ * @return  none.
+ */
+void rf_emi_rx(RF_ModeTypeDef mode,signed char rf_chn);
+
+/**
+ * @brief   This function serves is receiving service program
+ * @param   none.
+ * @return  none.
+ */
+void rf_emi_rx_loop(void);
+
+/**
+ * @brief   This function serves to get the number of packets received
+ * @param   none.
+ * @return  the number of packets received.
+ */
+unsigned int rf_emi_get_rxpkt_cnt(void);
+
+/**
+ * @brief   This function serves to get the RSSI of packets received
+ * @param   none.
+ * @return  the RSSI of packets received.
+ */
+char rf_emi_get_rssi_avg(void);
+
+/**
+ * @brief   This function serves to get the address of the received packets
+ * @param   none.
+ * @return  the address of the received packets
+ */
+unsigned char *rf_emi_get_rxpkt(void);
+
+/**
+ * @brief   This function serves to continue to send CD mode.
+ * @param   none.
+ * @return  none.
+ */
+void rf_continue_mode_run(void);
+
+/**
+ * @brief   This function serves to init the CD mode.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_continue_setup(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to init the burst mode.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_setup(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to init the burst mode with PA ramp up/down.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_brust_setup_ramp(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to send packets in the burst mode with PA ramp up/down.
+ * @param   rf_mode - mode of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_loop_ramp(RF_ModeTypeDef rf_mode,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to send packets in the burst mode
+ * @param   rf_mode - mode of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_loop(RF_ModeTypeDef rf_mode,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to set the channel in singletone mode.
+ * @param   chn - channel of RF.
+ * @return  none.
+ */
+void rf_set_channel_singletone (signed char chn);
+
+
+
+#endif /* EMI_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.c
new file mode 100644
index 00000000..45ce5109
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.c
@@ -0,0 +1,573 @@
+/********************************************************************************************************
+ * @file    flash.c
+ *
+ * @brief   This is the source file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "flash.h"
+#include "spi_i.h"
+#include "irq.h"
+#include "timer.h"
+#include "string.h"
+#include "analog.h"
+#include "adc.h"
+
+#define FLASH_ZBIT_SAFE_VOL			2200  //mv
+#define FLASH_ZBIT_SAFE_VOLFLUCT    500   //mv
+static char g_flashIsZbit = 0;
+static unsigned short g_flashWorkVol = FLASH_ZBIT_SAFE_VOL;
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function to determine whether the flash is busy..
+ * @return		1:Indicates that the flash is busy. 0:Indicates that the flash is free
+ */
+_attribute_ram_code_sec_ static inline int flash_is_busy(void){
+	return mspi_read() & 0x01;		//the busy bit, pls check flash spec
+}
+
+/**
+ * @brief		This function serves to set flash write command.
+ * @param[in]	cmd	- set command.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_cmd(unsigned char cmd){
+	mspi_high();
+	sleep_us(1);
+	mspi_low();
+	mspi_write(cmd);
+	mspi_wait();
+}
+
+/**
+ * @brief		This function serves to send flash address.
+ * @param[in]	addr	- the flash address.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_addr(unsigned int addr){
+	mspi_write((unsigned char)(addr>>16));
+	mspi_wait();
+	mspi_write((unsigned char)(addr>>8));
+	mspi_wait();
+	mspi_write((unsigned char)(addr));
+	mspi_wait();
+}
+
+/**
+ * @brief     This function serves to wait flash done.(make this a asynchorous version).
+ * @return    none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_wait_done(void)
+{
+	sleep_us(100);
+	flash_send_cmd(FLASH_READ_STATUS_CMD_LOWBYTE);
+
+	int i;
+	for(i = 0; i < 10000000; ++i){
+		if(!flash_is_busy()){
+			break;
+		}
+	}
+	mspi_high();
+}
+
+/**
+ * @brief 		This function is used to read data from flash or read the status of flash.
+ * @param[in]   cmd			- the read command.
+ * @param[in]   addr		- starting address.
+ * @param[in]   addr_en		- whether need to send an address.
+ * @param[in]   dummy_cnt	- the length(in byte) of dummy.
+ * @param[out]  data		- the start address of the data buffer.
+ * @param[in]   data_len	- the length(in byte) of content needs to read out.
+ * @return 		none.
+ */
+_attribute_ram_code_sec_noinline_ void flash_mspi_read_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char dummy_cnt, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		flash_send_addr(addr);
+	}
+	for(int i = 0; i < dummy_cnt; ++i)
+	{
+		mspi_write(0x00);		/* dummy */
+		mspi_wait();
+	}
+	mspi_write(0x00);			/* to issue clock */
+	mspi_wait();
+	mspi_ctrl_write(0x0a);		/* auto mode */
+	mspi_wait();
+	for(int i = 0; i < data_len; ++i)
+	{
+		*data++ = mspi_get();
+		mspi_wait();
+	}
+	mspi_high();
+
+	irq_restore(r);
+}
+
+/**
+ * @brief 		This function is used to write data or status to flash.
+ * @param[in]   cmd			- the write command.
+ * @param[in]   addr		- starting address.
+ * @param[in]   addr_en		- whether need to send an address.
+ * @param[out]  data		- the start address of the data buffer.
+ * @param[in]   data_len	- the length(in byte) of content needs to read out.
+ * @return 		none.
+ * @note		important:  "data" must not reside at flash, such as constant string.If that case, pls copy to memory first before write.
+ */
+_attribute_ram_code_sec_noinline_ unsigned char flash_mspi_write_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+	unsigned char ret = 1;
+
+	flash_send_cmd(FLASH_WRITE_ENABLE_CMD);
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		if(g_flashIsZbit){
+			unsigned int volF;
+			unsigned int vol = adc_get_result_with_fluct(&volF);
+			if(vol > g_flashWorkVol && volF < FLASH_ZBIT_SAFE_VOLFLUCT){
+				flash_send_addr(addr);
+			}else{
+				data_len = 0;
+				ret = 0;
+			}
+		}else{
+			flash_send_addr(addr);
+		}
+	}
+	for(int i = 0; i < data_len; ++i)
+	{
+		mspi_write(data[i]);
+		mspi_wait();
+	}
+	mspi_high();
+	flash_wait_done();
+
+	irq_restore(r);
+
+	return ret;
+}
+
+/**
+ * @brief 		This function serves to erase a sector.
+ * @param[in]   addr	- the start address of the sector needs to erase.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr)
+{
+	flash_mspi_write_ram(FLASH_SECT_ERASE_CMD, addr, 1, NULL, 0);
+}
+
+/**
+ * @brief 		This function reads the content from a page to the buf.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_mspi_read_ram(FLASH_READ_CMD, addr, 1, 0, buf, len);
+}
+
+/**
+ * @brief 		This function writes the buffer's content to the flash.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	unsigned int ns = PAGE_SIZE - (addr&(PAGE_SIZE - 1));
+	int nw = 0;
+
+	do{
+		nw = len > ns ? ns :len;
+		if(flash_mspi_write_ram(FLASH_WRITE_CMD, addr, 1, buf, nw) == 0){
+			break;
+		}
+		ns = PAGE_SIZE;
+		addr += nw;
+		buf += nw;
+		len -= nw;
+	}while(len > 0);
+}
+
+/**
+ * @brief		This function reads the status of flash.
+ * @param[in] 	cmd	- the cmd of read status.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(unsigned char cmd)
+{
+	unsigned char status = 0;
+	flash_mspi_read_ram(cmd, 0, 0, 0, &status, 1);
+	return status;
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	type	- the type of status.8 bit or 16 bit.
+ * @param[in]  	data	- the value of status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data)
+{
+	unsigned char buf[2];
+
+	buf[0] = data;
+	buf[1] = data>>8;
+	if(type == FLASH_TYPE_8BIT_STATUS){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 1);
+	}else if(type == FLASH_TYPE_16BIT_STATUS_ONE_CMD){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 2);
+	}
+}
+
+#if 0
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_mspi_read_ram(FLASH_READ_SECURITY_REGISTERS_CMD, addr, 1, 1, buf, len);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	unsigned int ns = PAGE_SIZE_OTP - (addr & (PAGE_SIZE_OTP - 1));
+	int nw = 0;
+
+	do{
+		nw = len > ns ? ns :len;
+		flash_mspi_write_ram(FLASH_WRITE_SECURITY_REGISTERS_CMD, addr, 1, buf, nw);
+		ns = PAGE_SIZE_OTP;
+		addr += nw;
+		buf += nw;
+		len -= nw;
+	}while(len > 0);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * @param[in]   addr	- the address that you want to erase.
+ * @return 		none.
+ * @Attention	Even you choose the middle area of the Security Registers,it will erase the whole area.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp(unsigned long addr)
+{
+	flash_mspi_write_ram(FLASH_ERASE_SECURITY_REGISTERS_CMD, addr, 1, NULL, 0);
+}
+#endif
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id).
+ * @return    	MID of the flash(3 bytes).
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_raw_mid(void)
+{
+	unsigned int flash_mid = 0;
+	flash_mspi_read_ram(FLASH_GET_JEDEC_ID, 0, 0, 0, (unsigned char*)(&flash_mid), 3);
+	return flash_mid;
+}
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * 				you must read MID of flash. and then you can look up the related table to select
+ * 				the idcmd and read UID of flash.
+ * @return    	MID of the flash(4 bytes).
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void)
+{
+	unsigned int flash_mid = 0;
+	flash_mspi_read_ram(FLASH_GET_JEDEC_ID, 0, 0, 0, (unsigned char*)(&flash_mid), 3);
+
+	/*
+	 * The mids of GD25LD80C and GD25LE80C are both 0x1460c8, but the status register of GD25LD80C is 8 bits,
+	 * and the status register of GD25LE80C is 16 bits. The functions of the two chips are different.
+	 * The software detection method is to read SFDP Signature. If it is 50444653H, it is GD25LE80C,
+	 * if it is all zeros, it is GD25LD80C.
+	 */
+	if(flash_mid == 0x1460c8)
+	{
+		unsigned char buf[4]={0};
+		flash_mspi_read_ram(0x5a, 0x00, 1, 1, buf, 4);
+		if((buf[0] == 0x53)&&(buf[1] == 0x46)&&(buf[2] == 0x44)&&(buf[3] == 0x50))
+		{
+			flash_mid = 0x011460c8;
+		}
+	}
+	return flash_mid;
+}
+
+/**
+ * @brief	  	This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * 				and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] 	idcmd	- different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A.
+ * @param[in] 	buf		- store UID of flash.
+ * @return    	none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf)
+{
+	if(idcmd == FLASH_READ_UID_CMD_GD_PUYA_ZB_UT)	//< GD/PUYA/ZB/UT
+	{
+		flash_mspi_read_ram(idcmd, 0x00, 1, 1, buf, 16);
+	}
+	else if (idcmd == FLASH_XTX_READ_UID_CMD)		//< XTX
+	{
+		flash_mspi_read_ram(idcmd, 0x80, 1, 1, buf, 16);
+	}
+}
+
+/*******************************************************************************************************************
+ *												Secondary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out]	flash_mid	- Flash Manufacturer ID.
+ * @param[out]	flash_uid	- Flash Unique ID.
+ * @return		0: flash no uid or not a known flash model 	 1:the flash model is known and the uid is read.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid)
+{
+	unsigned char no_uid[16]={0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01};
+	int i,f_cnt=0;
+	*flash_mid  = flash_read_mid();
+
+	/*
+	 * If add flash type, need pay attention to the read uid cmd and the bir number of status register
+	   Flash Type	CMD			MID		Company
+	   ZB25WD40B	0x4b	0x13325E	ZB
+	   ZB25WD80B	0x4b	0x14325E	ZB
+	   GD25LD05C	0x4b(AN)0x1060C8	GD
+	   GD25LD40C	0x4b	0x1360C8	GD
+	   GD25LD80C	0x4b(AN)0x1460C8	GD
+	   GD25LE80C	0x4b	0x1460C8	GD
+	   GD25LQ80C	0x4b	0x1460C8	GD
+	   MD25D40D		0x4b(AN)0x134051	GD
+	   P25Q40L		0x4b	0x136085	PUYA
+	   TH25D40LA	0x4b	0x1360EB	UT
+	   TH25D40UA	0x4b	0x1360EB	UT
+
+	   The uid of the early ZB25WD40B (mid is 0x13325E) is 8 bytes. If you read 16 bytes of uid,
+	   the next 8 bytes will be read as 0xff. Later, the uid of ZB25WD40B has been switched to 16 bytes.
+	 */
+	if((*flash_mid == 0x1460C8)||(*flash_mid == 0x011460C8)||(*flash_mid == 0x1060C8)||(*flash_mid == 0x134051)||(*flash_mid == 0x136085)||(*flash_mid == 0x1360C8)||(*flash_mid == 0x1360EB)||(*flash_mid == 0x13325E)||(*flash_mid == 0x14325E)){
+		flash_read_uid(FLASH_READ_UID_CMD_GD_PUYA_ZB_UT, (unsigned char *)flash_uid);
+	}else{
+		return 0;
+	}
+
+	for(i=0;i<16;i++){
+		if(flash_uid[i] == no_uid[i]){
+			f_cnt++;
+		}
+	}
+
+	if(f_cnt == 16){	//no uid flash
+		return 0;
+	}else{
+		return 1;
+	}
+}
+
+/**
+ * @brief		This function serves to find whether it is zb flash.
+ * @param[in]	none.
+ * @return		1 - is zb flash;   0 - is not zb flash.
+ */
+unsigned char flash_is_zb(void)
+{
+	unsigned int flash_mid  = flash_read_mid();
+	if((flash_mid == 0x13325E)||(flash_mid == 0x14325E))
+	{
+		g_flashIsZbit = 1;
+		return 1;
+	}
+
+	g_flashIsZbit = 0;
+	return 0;
+}
+
+/**
+ * @brief		This function is to config the flash operation voltage threshold
+ * @param[in]	vol.
+ * @return		none.
+ */
+void flash_safe_voltage_set(unsigned short vol)
+{
+	g_flashWorkVol = vol;
+}
+
+/**
+ * @brief		This function serves to calibration the flash voltage(VDD_F),if the flash has the calib_value,we will use it,either will
+ * 				trim vdd_f to 1.95V(2b'111 the max) if the flash is zb.
+ * @param[in]	vol - the voltage which you want to set.
+ * @return		none.
+ */
+void flash_vdd_f_calib(void)
+{
+	unsigned char calib_value = flash_get_vdd_f_calib_value();
+	if((0xff == calib_value) || (0 != (calib_value & 0xf8)))
+	{
+		if(flash_is_zb())
+		{
+			analog_write(0x0c, ((analog_read(0x0c) & 0xf8) | FLASH_VOLTAGE_1V95));
+		}
+	}
+	else
+	{
+		analog_write(0x0c, ((analog_read(0x0c) & 0xf8)  | calib_value));
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.h
new file mode 100644
index 00000000..075982c8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash.h
@@ -0,0 +1,296 @@
+/********************************************************************************************************
+ * @file    flash.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "compiler.h"
+
+
+#define PAGE_SIZE		256
+#define PAGE_SIZE_OTP	256
+
+/**
+ * @brief     flash command definition
+ */
+enum{
+	//common cmd
+	FLASH_WRITE_CMD						=	0x02,
+	FLASH_READ_CMD						=	0x03,
+	FLASH_WRITE_SECURITY_REGISTERS_CMD	=	0x42,
+	FLASH_READ_SECURITY_REGISTERS_CMD	=	0x48,
+
+	FLASH_SECT_ERASE_CMD				=	0x20,
+	FLASH_ERASE_SECURITY_REGISTERS_CMD	=	0x44,
+
+	FLASH_READ_UID_CMD_GD_PUYA_ZB_UT	=	0x4B,	//Flash Type = GD/PUYA/ZB/UT
+	FLASH_READ_UID_CMD_XTX				=	0x5A,	//Flash Type = XTX
+
+	FLASH_GET_JEDEC_ID					=	0x9F,
+
+	//special cmd
+	FLASH_WRITE_STATUS_CMD_LOWBYTE		=	0x01,
+	FLASH_WRITE_STATUS_CMD_HIGHBYTE		=	0x31,
+
+	FLASH_READ_STATUS_CMD_LOWBYTE		=	0x05,
+	FLASH_READ_STATUS_CMD_HIGHBYTE		=	0x35,
+
+	FLASH_WRITE_DISABLE_CMD 			= 	0x04,
+	FLASH_WRITE_ENABLE_CMD 				= 	0x06,
+
+};
+
+/**
+ * @brief     flash status type definition
+ */
+typedef enum{
+	FLASH_TYPE_8BIT_STATUS   			= 0,
+	FLASH_TYPE_16BIT_STATUS_ONE_CMD  	= 1,
+	FLASH_TYPE_16BIT_STATUS_TWO_CMD  	= 2,
+}flash_status_typedef_e;
+
+/**
+ * @brief     flash uid cmd definition
+ */
+typedef enum{
+	FLASH_UID_CMD_GD_PUYA   = 0x4b,
+	FLASH_XTX_READ_UID_CMD	= 0x5A,
+}flash_uid_cmddef_e;
+
+/**
+ * @brief	flash capacity definition
+ *			Call flash_read_mid function to get the size of flash capacity.
+ *			Example is as follows:
+ *			unsigned int mid = flash_read_mid();
+ *			The value of (mid&0x00ff0000)>>16 reflects flash capacity.
+ */
+typedef enum {
+    FLASH_SIZE_64K     = 0x10,
+    FLASH_SIZE_128K    = 0x11,
+    FLASH_SIZE_256K    = 0x12,
+    FLASH_SIZE_512K    = 0x13,
+    FLASH_SIZE_1M      = 0x14,
+    FLASH_SIZE_2M      = 0x15,
+    FLASH_SIZE_4M      = 0x16,
+    FLASH_SIZE_8M      = 0x17,
+} Flash_CapacityDef;
+
+/**
+ * @brief	flash voltage definition
+ */
+typedef enum {
+    FLASH_VOLTAGE_1V95     = 0x07,
+    FLASH_VOLTAGE_1V9      = 0x06,
+    FLASH_VOLTAGE_1V85     = 0x05,
+    FLASH_VOLTAGE_1V8      = 0x04,
+    FLASH_VOLTAGE_1V75     = 0x03,
+    FLASH_VOLTAGE_1V7      = 0x02,
+    FLASH_VOLTAGE_1V65     = 0x01,
+    FLASH_VOLTAGE_1V6      = 0x00,
+} Flash_VoltageDef;
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief 		This function serves to erase a sector.
+ * @param[in]   addr	- the start address of the sector needs to erase.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr);
+
+/**
+ * @brief 		This function reads the content from a page to the buf.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function writes the buffer's content to the flash.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id).
+ * @return    	MID of the flash(3 bytes).
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_raw_mid(void);
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * 				you must read MID of flash. and then you can look up the related table to select
+ * 				the idcmd and read UID of flash
+ * @return    	MID of the flash.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void);
+
+/**
+ * @brief	  	This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * 				and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] 	idcmd	- different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A
+ * @param[in] 	buf		- store UID of flash.
+ * @return    	none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf);
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out]	flash_mid	- Flash Manufacturer ID.
+ * @param[out]	flash_uid	- Flash Unique ID.
+ * @return		0: flash no uid or not a known flash model 	 1:the flash model is known and the uid is read.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check( unsigned int *flash_mid, unsigned char *flash_uid);
+
+/**
+ * @brief		This function serves to find whether it is zb flash.
+ * @param[in]	none.
+ * @return		1 - is zb flash;   0 - is not zb flash.
+ */
+unsigned char flash_is_zb(void);
+
+/**
+ * @brief		This function is to config the flash operation voltage threshold, it's just for zbit flash
+ * @param[in]	vol.
+ * @return		none.
+ */
+void flash_safe_voltage_set(unsigned short vol);
+
+/**
+ * @brief		This function serves to calibration the flash voltage(VDD_F),if the flash has the calib_value,we will use it,either will
+ * 				trim vdd_f to 1.95V(2b'111 the max) if the flash is zb.
+ * @param[in]	vol - the voltage which you want to set.
+ * @return		none.
+ */
+void flash_vdd_f_calib(void);
+
+/**
+ * @brief		This function serves to get the vdd_f calibration value.
+ * @param[in]	none.
+ * @return		none.
+ */
+static inline unsigned char flash_get_vdd_f_calib_value(void)
+{
+	unsigned int mid = flash_read_mid();
+	unsigned char dcdc_flash_volatage = 0;
+	switch((mid & 0xff0000) >> 16)
+	{
+	case(FLASH_SIZE_64K):
+		flash_read_page(0xe1c0, 1, &dcdc_flash_volatage);
+		break;
+	case(FLASH_SIZE_128K):
+		flash_read_page(0x1e1c0, 1, &dcdc_flash_volatage);
+		break;
+	case(FLASH_SIZE_512K):
+		flash_read_page(0x771c0, 1, &dcdc_flash_volatage);
+		break;
+	case(FLASH_SIZE_1M):
+		flash_read_page(0xfe1c0, 1, &dcdc_flash_volatage);
+		break;
+	case(FLASH_SIZE_2M):
+		flash_read_page(0x1fe1c0, 1, &dcdc_flash_volatage);
+		break;
+	default:
+		dcdc_flash_volatage = 0xff;
+		break;
+	}
+	return dcdc_flash_volatage;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.c
new file mode 100644
index 00000000..34127c64
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.c
@@ -0,0 +1,205 @@
+/********************************************************************************************************
+ * @file	flash_mid011460c8.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid011460c8(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid011460c8(unsigned short data, mid011460c8_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid011460c8();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid011460c8(mid011460c8_lock_block_e data)
+{
+	flash_write_status_mid011460c8(data, FLASH_WRITE_STATUS_BP_MID011460C8);
+}
+
+void flash_lock_all_mid011460c8(void)
+{
+	flash_write_status_mid011460c8(FLASH_LOCK_ALL_1M_MID011460C8, FLASH_WRITE_STATUS_BP_MID011460C8);
+}
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid011460c8(void)
+{
+	flash_write_status_mid011460c8(FLASH_LOCK_NONE_MID011460C8, FLASH_WRITE_STATUS_BP_MID011460C8);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid011460c8(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid011460c8(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid011460c8(mid011460c8_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid011460c8(mid011460c8_lock_otp_e data)
+{
+	flash_write_status_mid011460c8(data, FLASH_WRITE_STATUS_OTP_MID011460C8);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.h
new file mode 100644
index 00000000..c99ffeba
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid011460c8.h
@@ -0,0 +1,247 @@
+/********************************************************************************************************
+ * @file	flash_mid011460c8.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID011460C8_H__
+#define __MID011460C8_H__
+
+/*
+ * @brief     MID = 0x1460c8 Flash include GD25LE80C and GD25LQ80C.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID011460C8			=	0x0000,	//000000h-000000h	//0x0020 0x407c...
+	FLASH_LOCK_UP_64K_MID011460C8		=	0x0004,	//0F0000h-0FFFFFh
+	FLASH_LOCK_UP_128K_MID011460C8		=	0x0008,	//0E0000h-0FFFFFh
+	FLASH_LOCK_UP_256K_MID011460C8		=	0x000c,	//0C0000h-0FFFFFh
+	FLASH_LOCK_UP_512K_MID011460C8		=	0x0010,	//080000h-0FFFFFh	//0x4030
+	FLASH_LOCK_LOW_64K_MID011460C8		=	0x0024,	//000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID011460C8		=	0x0028,	//000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID011460C8		=	0x002c,	//000000h-03FFFFh
+	FLASH_LOCK_LOW_512K_MID011460C8		=	0x0030,	//000000h-07FFFFh	//0x4010
+	FLASH_LOCK_UP_4K_MID011460C8		=	0x0044,	//0FF000h-0FFFFFh
+	FLASH_LOCK_UP_8K_MID011460C8		=	0x0048,	//0FE000h-0FFFFFh
+	FLASH_LOCK_UP_16K_MID011460C8		=	0x004c,	//0FC000h-0FFFFFh
+	FLASH_LOCK_UP_32K_MID011460C8		=	0x0050,	//0F8000h-0FFFFFh	//0x0054
+	FLASH_LOCK_LOW_4K_MID011460C8		=	0x0064,	//000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID011460C8		=	0x0068,	//000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID011460C8		=	0x006c,	//000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID011460C8		=	0x0070,	//000000h-007FFFh	//0x0074
+	FLASH_LOCK_LOW_960K_MID011460C8		=	0x4004,	//000000h-0EFFFFh
+	FLASH_LOCK_LOW_896K_MID011460C8		=	0x4008,	//000000h-0DFFFFh
+	FLASH_LOCK_LOW_768K_MID011460C8		=	0x400c,	//000000h-0BFFFFh
+	FLASH_LOCK_UP_960K_MID011460C8		=	0x4024,	//010000h-0FFFFFh
+	FLASH_LOCK_UP_896K_MID011460C8		=	0x4028,	//020000h-0FFFFFh
+	FLASH_LOCK_UP_768K_MID011460C8		=	0x402c,	//040000h-0FFFFFh
+	FLASH_LOCK_LOW_1020K_MID011460C8	=	0x4044,	//000000h-0FEFFFh
+	FLASH_LOCK_LOW_1016K_MID011460C8	=	0x4048,	//000000h-0FDFFFh
+	FLASH_LOCK_LOW_1008K_MID011460C8	=	0x404c,	//000000h-0FBFFFh
+	FLASH_LOCK_LOW_992K_MID011460C8		=	0x4050,	//000000h-0F7FFFh	//0x4054
+	FLASH_LOCK_UP_1020K_MID011460C8		=	0x4064,	//001000h-0FFFFFh
+	FLASH_LOCK_UP_1016K_MID011460C8		=	0x4068,	//002000h-0FFFFFh
+	FLASH_LOCK_UP_1008K_MID011460C8		=	0x406c,	//004000h-0FFFFFh
+	FLASH_LOCK_UP_992K_MID011460C8		=	0x4070,	//008000h-0FFFFFh	//0x4074
+	FLASH_LOCK_ALL_1M_MID011460C8		=	0x007c,	//000000h-0FFFFFh	//0x4000 0x4040 0x4020 0x4060...
+}mid011460c8_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_512B_MID011460C8	=	0x001000,	//001000h-0011FFh
+	FLASH_OTP_0x002000_512B_MID011460C8	=	0x002000,	//002000h-0021FFh
+	FLASH_OTP_0x003000_512B_MID011460C8	=	0x003000,	//003000h-0031FFh
+}mid011460c8_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_512B_MID011460C8	=	0x0800,	//001000h-0011FFh
+	FLASH_LOCK_OTP_0x002000_512B_MID011460C8	=	0x1000,	//002000h-0021FFh
+	FLASH_LOCK_OTP_0x003000_512B_MID011460C8	=	0x2000,	//003000h-0031FFh
+}mid011460c8_lock_otp_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID011460C8	=	0x407c,
+	FLASH_WRITE_STATUS_OTP_MID011460C8	=	0x3800,
+}mid011460c8_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid011460c8(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid011460c8(unsigned short data, mid011460c8_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid011460c8(mid011460c8_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid011460c8(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid011460c8(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid011460c8(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid011460c8(mid011460c8_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid011460c8(mid011460c8_lock_otp_e data);
+
+void flash_lock_all_mid011460c8(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.c
new file mode 100644
index 00000000..6d0be29d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.c
@@ -0,0 +1,107 @@
+/********************************************************************************************************
+ * @file	flash_mid1060c8.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1060c8(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1060c8(unsigned char data, mid1060c8_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1060c8(mid1060c8_lock_block_e data)
+{
+	flash_write_status_mid1060c8(data, FLASH_WRITE_STATUS_BP_MID1060C8);
+}
+
+void flash_lock_all_mid1060c8(void)
+{
+	flash_write_status_mid1060c8(FLASH_LOCK_ALL_64K_MID1060C8, FLASH_WRITE_STATUS_BP_MID1060C8);
+}
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1060c8(void)
+{
+	flash_write_status_mid1060c8(FLASH_LOCK_NONE_MID1060C8, FLASH_WRITE_STATUS_BP_MID1060C8);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.h
new file mode 100644
index 00000000..241a0d62
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1060c8.h
@@ -0,0 +1,118 @@
+/********************************************************************************************************
+ * @file	flash_mid1060c8.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1060C8_H__
+#define __MID1060C8_H__
+
+/*
+ * @brief     MID = 0x1060c8 Flash include GD25LD05C.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID1060C8		=	0x00,
+	FLASH_LOCK_LOW_56K_MID1060C8	=	0x04,	//000000h-00DFFFh
+	FLASH_LOCK_LOW_48K_MID1060C8	=	0x08,	//000000h-00BFFFh
+	FLASH_LOCK_LOW_32K_MID1060C8	=	0x0c,	//000000h-007FFFh
+	FLASH_LOCK_ALL_64K_MID1060C8	=	0x10,	//000000h-00FFFFh
+}mid1060c8_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID1060C8	=	0x1c,
+}mid1060c8_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1060c8(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1060c8(unsigned char data, mid1060c8_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1060c8(mid1060c8_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1060c8(void);
+
+void flash_lock_all_mid1060c8(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.c
new file mode 100644
index 00000000..1e4312eb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.c
@@ -0,0 +1,111 @@
+/********************************************************************************************************
+ * @file	flash_mid13325e.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid13325e(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid13325e(unsigned char data, mid13325e_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	if(data != (status & bit)){
+		data |= (status & ~(bit));
+		flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+	}
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid13325e(mid13325e_lock_block_e data)
+{
+	flash_write_status_mid13325e(data, FLASH_WRITE_STATUS_BP_MID13325E);
+}
+
+void flash_lock_all_mid13325e(void)
+{
+	flash_write_status_mid13325e(FLASH_LOCK_ALL_512K_MID13325E, FLASH_WRITE_STATUS_BP_MID13325E);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid13325e(void)
+{
+	flash_write_status_mid13325e(FLASH_LOCK_NONE_MID13325E, FLASH_WRITE_STATUS_BP_MID13325E);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.h
new file mode 100644
index 00000000..f1f6754a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid13325e.h
@@ -0,0 +1,121 @@
+/********************************************************************************************************
+ * @file	flash_mid13325e.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID13325E_H__
+#define __MID13325E_H__
+
+/*
+ * @brief     MID = 0x13325e Flash include ZB25WD40B.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID13325E		=	0x00,
+	FLASH_LOCK_LOW_504K_MID13325E	=	0x04,	//000000h-07DFFFh
+	FLASH_LOCK_LOW_496K_MID13325E	=	0x08,	//000000h-07BFFFh
+	FLASH_LOCK_LOW_480K_MID13325E	=	0x0c,	//000000h-077FFFh
+	FLASH_LOCK_LOW_448K_MID13325E	=	0x10,	//000000h-06FFFFh
+	FLASH_LOCK_LOW_384K_MID13325E	=	0x14,	//000000h-05FFFFh
+	FLASH_LOCK_LOW_256K_MID13325E	=	0x18,	//000000h-03FFFFh
+	FLASH_LOCK_ALL_512K_MID13325E	=	0x1c,	//000000h-07FFFFh
+}mid13325e_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID13325E	=	0x1c,
+}mid13325e_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid13325e(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid13325e(unsigned char data, mid13325e_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid13325e(mid13325e_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid13325e(void);
+
+void flash_lock_all_mid13325e(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.c
new file mode 100644
index 00000000..de6d8814
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.c
@@ -0,0 +1,111 @@
+/********************************************************************************************************
+ * @file	flash_mid134051.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid134051(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid134051(unsigned char data, mid134051_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid134051(mid134051_lock_block_e data)
+{
+	flash_write_status_mid134051(data, FLASH_WRITE_STATUS_BP_MID134051);
+}
+
+
+void flash_lock_all_mid134051(void)
+{
+	flash_write_status_mid134051(FLASH_LOCK_ALL_512K_MID134051, FLASH_WRITE_STATUS_BP_MID134051);
+}
+
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid134051(void)
+{
+	flash_write_status_mid134051(FLASH_LOCK_NONE_MID134051, FLASH_WRITE_STATUS_BP_MID134051);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.h
new file mode 100644
index 00000000..388be013
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid134051.h
@@ -0,0 +1,121 @@
+/********************************************************************************************************
+ * @file	flash_mid134051.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID134051_H__
+#define __MID134051_H__
+
+/*
+ * @brief     MID = 0x134051 Flash include MD25D40D.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID134051		=	0x00,
+	FLASH_LOCK_LOW_504K_MID134051	=	0x04,	//000000h-07DFFFh
+	FLASH_LOCK_LOW_496K_MID134051	=	0x08,	//000000h-07BFFFh
+	FLASH_LOCK_LOW_480K_MID134051	=	0x0c,	//000000h-077FFFh
+	FLASH_LOCK_LOW_448K_MID134051	=	0x10,	//000000h-06FFFFh
+	FLASH_LOCK_LOW_384K_MID134051	=	0x14,	//000000h-05FFFFh
+	FLASH_LOCK_LOW_256K_MID134051	=	0x18,	//000000h-03FFFFh
+	FLASH_LOCK_ALL_512K_MID134051	=	0x1c,	//000000h-07FFFFh
+}mid134051_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID134051	=	0x1c,
+}mid134051_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid134051(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid134051(unsigned char data, mid134051_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid134051(mid134051_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid134051(void);
+
+void flash_lock_all_mid134051(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.c
new file mode 100644
index 00000000..e1db231f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.c
@@ -0,0 +1,205 @@
+/********************************************************************************************************
+ * @file	flash_mid136085.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid136085(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid136085(unsigned short data, mid136085_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid136085();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid136085(mid136085_lock_block_e data)
+{
+	flash_write_status_mid136085(data, FLASH_WRITE_STATUS_BP_MID136085);
+}
+
+void flash_lock_all_mid136085(void)
+{
+	flash_write_status_mid136085(FLASH_LOCK_ALL_512K_MID136085, FLASH_WRITE_STATUS_BP_MID136085);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid136085(void)
+{
+	flash_write_status_mid136085(FLASH_LOCK_NONE_MID136085, FLASH_WRITE_STATUS_BP_MID136085);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid136085(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid136085(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid136085(mid136085_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid136085(mid136085_lock_otp_e data)
+{
+	flash_write_status_mid136085(data, FLASH_WRITE_STATUS_OTP_MID136085);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.h
new file mode 100644
index 00000000..8736a577
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid136085.h
@@ -0,0 +1,242 @@
+/********************************************************************************************************
+ * @file	flash_mid136085.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID136085_H__
+#define __MID136085_H__
+
+/*
+ * @brief	MID = 0x136085 Flash include P25Q40L.
+ */
+
+
+/**
+ * @brief	define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID136085		=	0x0000,	//000000h-000000h	//0x0020 0x407c 0x4030...
+	FLASH_LOCK_UP_64K_MID136085		=	0x0004,	//070000h-07FFFFh
+	FLASH_LOCK_UP_128K_MID136085	=	0x0008,	//060000h-07FFFFh
+	FLASH_LOCK_UP_256K_MID136085	=	0x000c,	//040000h-07FFFFh	//0x402c
+	FLASH_LOCK_LOW_64K_MID136085	=	0x0024,	//000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID136085	=	0x0028,	//000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID136085	=	0x002c,	//000000h-03FFFFh	//0x400c
+	FLASH_LOCK_UP_4K_MID136085		=	0x0044,	//07F000h-07FFFFh
+	FLASH_LOCK_UP_8K_MID136085		=	0x0048,	//07E000h-07FFFFh
+	FLASH_LOCK_UP_16K_MID136085		=	0x004c,	//07C000h-07FFFFh
+	FLASH_LOCK_UP_32K_MID136085		=	0x0050,	//078000h-07FFFFh	//0x0054 0x0058
+	FLASH_LOCK_LOW_4K_MID136085		=	0x0064,	//000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID136085		=	0x0068,	//000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID136085	=	0x006c,	//000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID136085	=	0x0070,	//000000h-007FFFh	//0x0074 0x0078
+	FLASH_LOCK_LOW_448K_MID136085	=	0x4004,	//000000h-06FFFFh
+	FLASH_LOCK_LOW_384K_MID136085	=	0x4008,	//000000h-05FFFFh
+	FLASH_LOCK_UP_448K_MID136085	=	0x4024,	//010000h-07FFFFh
+	FLASH_LOCK_UP_384K_MID136085	=	0x4028,	//020000h-07FFFFh
+	FLASH_LOCK_LOW_508K_MID136085	=	0x4044,	//000000h-07EFFFh
+	FLASH_LOCK_LOW_504K_MID136085	=	0x4048,	//000000h-07DFFFh
+	FLASH_LOCK_LOW_496K_MID136085	=	0x404c,	//000000h-07BFFFh
+	FLASH_LOCK_LOW_480K_MID136085	=	0x4050,	//000000h-077FFFh	//0x4054 0x4058
+	FLASH_LOCK_UP_508K_MID136085	=	0x4064,	//001000h-07FFFFh
+	FLASH_LOCK_UP_504K_MID136085	=	0x4068,	//002000h-07FFFFh
+	FLASH_LOCK_UP_496K_MID136085	=	0x406c,	//004000h-07FFFFh
+	FLASH_LOCK_UP_480K_MID136085	=	0x4070,	//008000h-07FFFFh	//0x4074 0x4078
+	FLASH_LOCK_ALL_512K_MID136085	=	0x007c,	//000000h-07FFFFh	//0x4000 0x4040 0x4020 0x4060...
+}mid136085_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_512B_MID136085	=	0x001000,	//001000h-0011FFh
+	FLASH_OTP_0x002000_512B_MID136085	=	0x002000,	//002000h-0021FFh
+	FLASH_OTP_0x003000_512B_MID136085	=	0x003000,	//003000h-0031FFh
+}mid136085_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_512B_MID136085	=	0x0800,	//001000h-0011FFh
+	FLASH_LOCK_OTP_0x002000_512B_MID136085	=	0x1000,	//002000h-0021FFh
+	FLASH_LOCK_OTP_0x003000_512B_MID136085	=	0x2000,	//003000h-0031FFh
+}mid136085_lock_otp_e;
+
+/**
+ * @brief	the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID136085		=	0x407c,
+	FLASH_WRITE_STATUS_OTP_MID136085	=	0x3800,
+}mid136085_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note		Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid136085(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return		none.
+ * @note		Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid136085(unsigned short data, mid136085_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid136085(mid136085_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid136085(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid136085(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid136085(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid136085(mid136085_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid136085(mid136085_lock_otp_e data);
+
+
+void flash_lock_all_mid136085(void);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.c
new file mode 100644
index 00000000..4bcbdfe2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.c
@@ -0,0 +1,110 @@
+/********************************************************************************************************
+ * @file	flash_mid1360c8.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1360c8(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360c8(unsigned char data, mid1360c8_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360c8(mid1360c8_lock_block_e data)
+{
+	flash_write_status_mid1360c8(data, FLASH_WRITE_STATUS_BP_MID1360C8);
+}
+
+void flash_lock_all_mid1360c8(void)
+{
+	flash_write_status_mid1360c8(FLASH_LOCK_ALL_512K_MID1360C8, FLASH_WRITE_STATUS_BP_MID1360C8);
+}
+
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360c8(void)
+{
+	flash_write_status_mid1360c8(FLASH_LOCK_NONE_MID1360C8, FLASH_WRITE_STATUS_BP_MID1360C8);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.h
new file mode 100644
index 00000000..18445066
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360c8.h
@@ -0,0 +1,121 @@
+/********************************************************************************************************
+ * @file	flash_mid1360c8.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1360C8_H__
+#define __MID1360C8_H__
+
+/*
+ * @brief     MID = 0x1360c8 Flash include GD25LD40C.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID1360C8		=	0x00,
+	FLASH_LOCK_LOW_504K_MID1360C8	=	0x04,	//000000h-07DFFFh
+	FLASH_LOCK_LOW_496K_MID1360C8	=	0x08,	//000000h-07BFFFh
+	FLASH_LOCK_LOW_480K_MID1360C8	=	0x0c,	//000000h-077FFFh
+	FLASH_LOCK_LOW_448K_MID1360C8	=	0x10,	//000000h-06FFFFh
+	FLASH_LOCK_LOW_384K_MID1360C8	=	0x14,	//000000h-05FFFFh
+	FLASH_LOCK_LOW_256K_MID1360C8	=	0x18,	//000000h-03FFFFh
+	FLASH_LOCK_ALL_512K_MID1360C8	=	0x1c,	//000000h-07FFFFh
+}mid1360c8_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID1360C8	=	0x1c,
+}mid1360c8_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1360c8(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360c8(unsigned char data, mid1360c8_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360c8(mid1360c8_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360c8(void);
+
+void flash_lock_all_mid1360c8(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.c
new file mode 100644
index 00000000..5ca0e325
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.c
@@ -0,0 +1,206 @@
+/********************************************************************************************************
+ * @file	flash_mid1360eb.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid1360eb(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note		Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360eb(unsigned short data, mid1360eb_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid1360eb();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360eb(mid1360eb_lock_block_e data)
+{
+	flash_write_status_mid1360eb(data, FLASH_WRITE_STATUS_BP_MID1360EB);
+}
+
+void flash_lock_all_mid1360eb(void)
+{
+	flash_write_status_mid1360eb(FLASH_LOCK_ALL_512K_MID1360EB, FLASH_WRITE_STATUS_BP_MID1360EB);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360eb(void)
+{
+	flash_write_status_mid1360eb(FLASH_LOCK_NONE_MID1360EB, FLASH_WRITE_STATUS_BP_MID1360EB);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid1360eb(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid1360eb(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid1360eb(mid1360eb_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid1360eb(mid1360eb_lock_otp_e data)
+{
+	flash_write_status_mid1360eb(data, FLASH_WRITE_STATUS_OTP_MID1360EB);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.h
new file mode 100644
index 00000000..ebad8ff5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1360eb.h
@@ -0,0 +1,243 @@
+/********************************************************************************************************
+ * @file	flash_mid1360eb.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1360EB_H__
+#define __MID1360EB_H__
+
+/*
+ * @brief     MID = 0x1360eb Flash include TH25D40UA / TH25D40LA.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID1360EB		=	0x0000,	//000000h-000000h	//0x0020 0x407c 0x4030...
+	FLASH_LOCK_UP_64K_MID1360EB		=	0x0004,	//070000h-07FFFFh
+	FLASH_LOCK_UP_128K_MID1360EB	=	0x0008,	//060000h-07FFFFh
+	FLASH_LOCK_UP_256K_MID1360EB	=	0x000c,	//040000h-07FFFFh	//0x402c
+	FLASH_LOCK_LOW_64K_MID1360EB	=	0x0024,	//000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID1360EB	=	0x0028,	//000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID1360EB	=	0x002c,	//000000h-03FFFFh	//0x400c
+	FLASH_LOCK_UP_4K_MID1360EB		=	0x0044,	//07F000h-07FFFFh
+	FLASH_LOCK_UP_8K_MID1360EB		=	0x0048,	//07E000h-07FFFFh
+	FLASH_LOCK_UP_16K_MID1360EB		=	0x004c,	//07C000h-07FFFFh
+	FLASH_LOCK_UP_32K_MID1360EB		=	0x0050,	//078000h-07FFFFh	//0x0054 0x0058
+	FLASH_LOCK_LOW_4K_MID1360EB		=	0x0064,	//000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID1360EB		=	0x0068,	//000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID1360EB	=	0x006c,	//000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID1360EB	=	0x0070,	//000000h-007FFFh	//0x0074 0x0078
+	FLASH_LOCK_LOW_448K_MID1360EB	=	0x4004,	//000000h-06FFFFh
+	FLASH_LOCK_LOW_384K_MID1360EB	=	0x4008,	//000000h-05FFFFh
+	FLASH_LOCK_UP_448K_MID1360EB	=	0x4024,	//010000h-07FFFFh
+	FLASH_LOCK_UP_384K_MID1360EB	=	0x4028,	//020000h-07FFFFh
+	FLASH_LOCK_LOW_508K_MID1360EB	=	0x4044,	//000000h-07EFFFh
+	FLASH_LOCK_LOW_504K_MID1360EB	=	0x4048,	//000000h-07DFFFh
+	FLASH_LOCK_LOW_496K_MID1360EB	=	0x404c,	//000000h-07BFFFh
+	FLASH_LOCK_LOW_480K_MID1360EB	=	0x4050,	//000000h-077FFFh	//0x4054 0x4058
+	FLASH_LOCK_UP_508K_MID1360EB	=	0x4064,	//001000h-07FFFFh
+	FLASH_LOCK_UP_504K_MID1360EB	=	0x4068,	//002000h-07FFFFh
+	FLASH_LOCK_UP_496K_MID1360EB	=	0x406c,	//004000h-07FFFFh
+	FLASH_LOCK_UP_480K_MID1360EB	=	0x4070,	//008000h-07FFFFh	//0x4074 0x4078
+	FLASH_LOCK_ALL_512K_MID1360EB	=	0x007c,	//000000h-07FFFFh	//0x4000 0x4040 0x4020 0x4060...
+}mid1360eb_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_512B_MID1360EB	=	0x001000,	//001000h-0011FFh
+	FLASH_OTP_0x002000_512B_MID1360EB	=	0x002000,	//002000h-0021FFh
+	FLASH_OTP_0x003000_512B_MID1360EB	=	0x003000,	//003000h-0031FFh
+}mid1360eb_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_512B_MID1360EB	=	0x0800,	//001000h-0011FFh
+	FLASH_LOCK_OTP_0x002000_512B_MID1360EB	=	0x1000,	//002000h-0021FFh
+	FLASH_LOCK_OTP_0x003000_512B_MID1360EB	=	0x2000,	//003000h-0031FFh
+}mid1360eb_lock_otp_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID1360EB		=	0x407c,
+	FLASH_WRITE_STATUS_OTP_MID1360EB	=	0x3800,
+}mid1360eb_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid1360eb(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note		Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1360eb(unsigned short data, mid1360eb_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1360eb(mid1360eb_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1360eb(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid1360eb(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid1360eb(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid1360eb(mid1360eb_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid1360eb(mid1360eb_lock_otp_e data);
+
+
+void flash_lock_all_mid1360eb(void);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.c
new file mode 100644
index 00000000..faff5be4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.c
@@ -0,0 +1,112 @@
+/********************************************************************************************************
+ * @file	flash_mid14325e.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid14325e(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid14325e(unsigned char data, mid14325e_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	if(data != (status & bit)){
+		data |= (status & ~(bit));
+		flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+	}
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid14325e(mid14325e_lock_block_e data)
+{
+	flash_write_status_mid14325e(data, FLASH_WRITE_STATUS_BP_MID14325E);
+}
+
+void flash_lock_all_mid14325e(void)
+{
+	flash_write_status_mid14325e(FLASH_LOCK_ALL_1M_MID14325E, FLASH_WRITE_STATUS_BP_MID14325E);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid14325e(void)
+{
+	flash_write_status_mid14325e(FLASH_LOCK_NONE_MID14325E, FLASH_WRITE_STATUS_BP_MID14325E);
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.h
new file mode 100644
index 00000000..f25e19e5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid14325e.h
@@ -0,0 +1,121 @@
+/********************************************************************************************************
+ * @file	flash_mid14325e.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID14325E_H__
+#define __MID14325E_H__
+
+/*
+ * @brief     MID = 0x1140c8 Flash include ZB25WD80B.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID14325E		=	0x00,
+	FLASH_LOCK_LOW_1016K_MID14325E	=	0x04,	//000000h-0FDFFFh
+	FLASH_LOCK_LOW_1008K_MID14325E	=	0x08,	//000000h-0FBFFFh
+	FLASH_LOCK_LOW_992K_MID14325E	=	0x0c,	//000000h-0F7FFFh
+	FLASH_LOCK_LOW_960K_MID14325E	=	0x10,	//000000h-0EFFFFh
+	FLASH_LOCK_LOW_896K_MID14325E	=	0x14,	//000000h-0DFFFFh
+	FLASH_LOCK_LOW_768K_MID14325E	=	0x18,	//000000h-0BFFFFh
+	FLASH_LOCK_ALL_1M_MID14325E		=	0x1c,	//000000h-0FFFFFh
+}mid14325e_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID14325E	=	0x1c,
+}mid14325e_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid14325e(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid14325e(unsigned char data, mid14325e_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid14325e(mid14325e_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid14325e(void);
+
+void flash_lock_all_mid14325e(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.c
new file mode 100644
index 00000000..e5b1afb6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.c
@@ -0,0 +1,110 @@
+/********************************************************************************************************
+ * @file	flash_mid1460c8.c
+ *
+ * @brief	This is the source file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1460c8(void)
+{
+	return flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1460c8(unsigned char data, mid1460c8_write_status_bit_e bit)
+{
+	unsigned char status = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_8BIT_STATUS, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1460c8(mid1460c8_lock_block_e data)
+{
+	flash_write_status_mid1460c8(data, FLASH_WRITE_STATUS_BP_MID1460C8);
+}
+
+
+void flash_lock_all_mid1460c8(void)
+{
+	flash_write_status_mid1460c8(FLASH_LOCK_ALL_1M_MID1460C8, FLASH_WRITE_STATUS_BP_MID1460C8);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1460c8(void)
+{
+	flash_write_status_mid1460c8(FLASH_LOCK_NONE_MID1460C8, FLASH_WRITE_STATUS_BP_MID1460C8);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.h
new file mode 100644
index 00000000..ab951ba6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_mid1460c8.h
@@ -0,0 +1,122 @@
+/********************************************************************************************************
+ * @file	flash_mid1460c8.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID1460C8_H__
+#define __MID1460C8_H__
+
+/*
+ * @brief     MID = 0x1460c8 Flash include GD25LD80C.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	FLASH_LOCK_NONE_MID1460C8		=	0x00,
+	FLASH_LOCK_LOW_1016K_MID1460C8	=	0x04,	//000000h-0FDFFFh
+	FLASH_LOCK_LOW_1008K_MID1460C8	=	0x08,	//000000h-0FBFFFh
+	FLASH_LOCK_LOW_992K_MID1460C8	=	0x0c,	//000000h-0F7FFFh
+	FLASH_LOCK_LOW_960K_MID1460C8	=	0x10,	//000000h-0EFFFFh
+	FLASH_LOCK_LOW_896K_MID1460C8	=	0x14,	//000000h-0DFFFFh
+	FLASH_LOCK_LOW_768K_MID1460C8	=	0x18,	//000000h-0BFFFFh
+	FLASH_LOCK_ALL_1M_MID1460C8		=	0x1c,	//000000h-0FFFFFh
+}mid1460c8_lock_block_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID1460C8	=	0x1c,
+}mid1460c8_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status_mid1460c8(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid1460c8(unsigned char data, mid1460c8_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid1460c8(mid1460c8_lock_block_e data);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid1460c8(void);
+
+void flash_lock_all_mid1460c8(void);
+
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_type.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_type.h
new file mode 100644
index 00000000..e69e0716
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/flash/flash_type.h
@@ -0,0 +1,128 @@
+/********************************************************************************************************
+ * @file	flash_type.h
+ *
+ * @brief	This is the header file for B85
+ *
+ * @author	Driver Group
+ * @date	2018
+ *
+ * @par     Copyright (c) 2018, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __FLASH_TYPE_H__
+#define __FLASH_TYPE_H__
+
+#include "../flash.h"
+#include "flash_mid13325e.h"	// ZB25WD40B
+#include "flash_mid14325e.h"	// ZB25WD80B
+#include "flash_mid1060c8.h"	// GD25LD05C
+#include "flash_mid1360c8.h"	// GD25LD40C
+#include "flash_mid1460c8.h"	// GD25LD80C
+#include "flash_mid011460c8.h"	// GD25LE80C / GD25LQ80C
+#include "flash_mid134051.h"	// MD25D40D
+#include "flash_mid136085.h"	// P25Q40L
+#include "flash_mid1360eb.h"	// TH25D40UA / TH25D40LA
+
+
+/**
+ * @brief		This function reads the status of flash.
+ * @param[in] 	cmd	- the cmd of read status.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(unsigned char cmd);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	type	- the type of status.8 bit or 16 bit.
+ * @param[in]  	data	- the value of status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * @param[in]   addr	- the address that you want to erase.
+ * @return 		none.
+ * @Attention	Even you choose the middle area of the Security Registers,it will erase the whole area.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp(unsigned long addr);
+
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio.h
new file mode 100644
index 00000000..da549e09
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio.h
@@ -0,0 +1,409 @@
+/********************************************************************************************************
+ * @file    gpio.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bit.h"
+#include "bsp.h"
+
+
+/**
+ *  @brief  Define GPIO types
+ */
+
+typedef enum{
+		GPIO_GROUPA    = 0x000,
+		GPIO_GROUPB    = 0x100,
+		GPIO_GROUPC    = 0x200,
+		GPIO_GROUPD    = 0x300,
+		GPIO_GROUPE    = 0x400,
+
+	    GPIO_PA0 = GPIO_GROUPA | BIT(0),
+		GPIO_PA1 = GPIO_GROUPA | BIT(1),
+		GPIO_PA2 = GPIO_GROUPA | BIT(2),
+		GPIO_PA3 = GPIO_GROUPA | BIT(3),
+		GPIO_PA4 = GPIO_GROUPA | BIT(4),
+		GPIO_PA5 = GPIO_GROUPA | BIT(5), 	GPIO_DM=GPIO_PA5,
+		GPIO_PA6 = GPIO_GROUPA | BIT(6),  GPIO_DP=GPIO_PA6,
+		GPIO_PA7 = GPIO_GROUPA | BIT(7), 	GPIO_SWS=GPIO_PA7,
+		GPIOA_ALL = GPIO_GROUPA | 0x00ff,
+
+		GPIO_PB0 = GPIO_GROUPB | BIT(0),
+		GPIO_PB1 = GPIO_GROUPB | BIT(1),
+		GPIO_PB2 = GPIO_GROUPB | BIT(2),
+		GPIO_PB3 = GPIO_GROUPB | BIT(3),
+		GPIO_PB4 = GPIO_GROUPB | BIT(4),
+		GPIO_PB5 = GPIO_GROUPB | BIT(5),
+		GPIO_PB6 = GPIO_GROUPB | BIT(6),
+		GPIO_PB7 = GPIO_GROUPB | BIT(7),
+
+		GPIO_PC0 = GPIO_GROUPC | BIT(0),
+		GPIO_PC1 = GPIO_GROUPC | BIT(1),
+		GPIO_PC2 = GPIO_GROUPC | BIT(2),
+		GPIO_PC3 = GPIO_GROUPC | BIT(3),
+		GPIO_PC4 = GPIO_GROUPC | BIT(4),
+		GPIO_PC5 = GPIO_GROUPC | BIT(5),
+		GPIO_PC6 = GPIO_GROUPC | BIT(6),
+		GPIO_PC7 = GPIO_GROUPC | BIT(7),
+
+		GPIO_PD0 = GPIO_GROUPD | BIT(0),
+		GPIO_PD1 = GPIO_GROUPD | BIT(1),
+		GPIO_PD2 = GPIO_GROUPD | BIT(2),
+		GPIO_PD3 = GPIO_GROUPD | BIT(3),
+		GPIO_PD4 = GPIO_GROUPD | BIT(4),
+		GPIO_PD5 = GPIO_GROUPD | BIT(5),
+		GPIO_PD6 = GPIO_GROUPD | BIT(6),
+		GPIO_PD7 = GPIO_GROUPD | BIT(7),
+
+		GPIO_PE0 = GPIO_GROUPE | BIT(0),  GPIO_MSDO=GPIO_PE0,
+		GPIO_PE1 = GPIO_GROUPE | BIT(1),  GPIO_MCLK=GPIO_PE1,
+		GPIO_PE2 = GPIO_GROUPE | BIT(2),  GPIO_MSCN=GPIO_PE2,
+		GPIO_PE3 = GPIO_GROUPE | BIT(3),  GPIO_MSDI=GPIO_PE3,
+
+		GPIO_ALL = 0x500,
+}GPIO_PinTypeDef;
+
+/**
+ *  @brief  Define GPIO Function types
+ */
+
+typedef enum{
+	AS_GPIO 	=  0,
+	AS_MSPI 	=  1,
+	AS_SWIRE	=  2,
+	AS_UART		=  3,
+	AS_I2C		=  4,
+	AS_SPI		=  5,
+	AS_I2S		=  6,
+	AS_AMIC		=  7,
+	AS_DMIC		=  8,
+	AS_SDM		=  9,
+	AS_USB		= 10,
+	AS_ADC		= 11,
+	AS_CMP		= 12,
+	AS_ATS		= 13,
+
+	AS_PWM0 	= 20,
+	AS_PWM1		= 21,
+	AS_PWM2 	= 22,
+	AS_PWM3		= 23,
+	AS_PWM4 	= 24,
+	AS_PWM5		= 25,
+	AS_PWM0_N	= 26,
+	AS_PWM1_N	= 27,
+	AS_PWM2_N	= 28,
+	AS_PWM3_N	= 29,
+	AS_PWM4_N	= 30,
+	AS_PWM5_N	= 31,
+}GPIO_FuncTypeDef;
+
+
+typedef enum{
+	Level_Low=0,
+	Level_High =1,
+}GPIO_LevelTypeDef;
+
+
+
+/**
+ *  @brief  Define rising/falling types
+ */
+typedef enum{
+	POL_RISING   = 0,  pol_rising = 0,
+	POL_FALLING  = 1,  pol_falling = 1,
+}GPIO_PolTypeDef;
+
+/**
+ *  @brief  Define pull up or down types
+ */
+typedef enum {
+	PM_PIN_UP_DOWN_FLOAT    = 0,
+	PM_PIN_PULLUP_1M     	= 1,
+	PM_PIN_PULLDOWN_100K  	= 2,
+	PM_PIN_PULLUP_10K 		= 3,
+}GPIO_PullTypeDef;
+
+
+/**
+ * @brief      This function servers to set the GPIO's function.
+ * @param[in]  pin - the special pin.
+ * @param[in]  func - the function of GPIO.
+ * @return     none.
+ */
+void gpio_set_func(GPIO_PinTypeDef pin, GPIO_FuncTypeDef func);
+
+/**
+ * @brief      This function set the output function of a pin.
+ * @param[in]  pin - the pin needs to set the output function
+ * @param[in]  value - enable or disable the pin's output function(0: disable, 1: enable)
+ * @return     none
+ */
+static inline void gpio_set_output_en(GPIO_PinTypeDef pin, unsigned int value)
+{
+	unsigned char	bit = pin & 0xff;
+	if(!value){
+		BM_SET(reg_gpio_oen(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_oen(pin), bit);
+	}
+}
+
+/**
+ * @brief      This function set the input function of a pin.
+ * @param[in]  pin - the pin needs to set the input function
+ * @param[in]  value - enable or disable the pin's input function(0: disable, 1: enable)
+ * @return     none
+ */
+void gpio_set_input_en(GPIO_PinTypeDef pin, unsigned int value);
+
+/**
+ * @brief      This function determines whether the output function of a pin is enabled.
+ * @param[in]  pin - the pin needs to determine whether its output function is enabled.
+ * @return     1: the pin's output function is enabled ;
+ *             0: the pin's output function is disabled
+ */
+static inline int gpio_is_output_en(GPIO_PinTypeDef pin)
+{
+	return !BM_IS_SET(reg_gpio_oen(pin), pin & 0xff);
+}
+
+/**
+ * @brief     This function determines whether the input function of a pin is enabled.
+ * @param[in] pin - the pin needs to determine whether its input function is enabled.
+ * @return    1: the pin's input function is enabled ;
+ *            0: the pin's input function is disabled
+ */
+static inline int gpio_is_input_en(GPIO_PinTypeDef pin)
+{
+	return BM_IS_SET(reg_gpio_ie(pin), pin & 0xff);
+}
+
+/**
+ * @brief     This function set the pin's output level.
+ * @param[in] pin - the pin needs to set its output level
+ * @param[in] value - value of the output level(1: high 0: low)
+ * @return    none
+ */
+static inline void gpio_write(GPIO_PinTypeDef pin, unsigned int value)
+{
+	unsigned char	bit = pin & 0xff;
+	if(value){
+		BM_SET(reg_gpio_out(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_out(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function read the pin's input/output level.
+ * @param[in] pin - the pin needs to read its level
+ * @return    the pin's level(1: high 0: low)
+ */
+static inline unsigned int gpio_read(GPIO_PinTypeDef pin)
+{
+	return BM_IS_SET(reg_gpio_in(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function read all the pins' input level.
+ * @param[out] p - the buffer used to store all the pins' input level
+ * @return     none
+ */
+static inline void gpio_read_all(unsigned char *p)
+{
+	p[0] = REG_ADDR8(0x580);
+	p[1] = REG_ADDR8(0x588);
+	p[2] = REG_ADDR8(0x590);
+	p[3] = REG_ADDR8(0x598);
+}
+
+/**
+ * @brief     This function set the pin toggle.
+ * @param[in] pin - the pin needs to toggle
+ * @return    none
+ */
+static inline void gpio_toggle(GPIO_PinTypeDef pin)
+{
+	reg_gpio_out(pin) ^= (pin & 0xFF);
+}
+
+/**
+ * @brief      This function set the pin's driving strength.
+ * @param[in]  pin - the pin needs to set the driving strength
+ * @param[in]  value - the level of driving strength(1: strong 0: poor)
+ * @return     none
+ */
+void gpio_set_data_strength(GPIO_PinTypeDef pin, unsigned int value);
+
+/**
+ * @brief     This function set a pin's pull-up/down resistor.
+ * @param[in] gpio - the pin needs to set its pull-up/down resistor
+ * @param[in] up_down - the type of the pull-up/down resistor
+ * @return    none
+ */
+void gpio_setup_up_down_resistor(GPIO_PinTypeDef gpio, GPIO_PullTypeDef up_down);
+
+/**
+ * @brief      This function servers to set the specified GPIO as high resistor.
+ * @param[in]  pin  - select the specified GPIO
+ * @return     none.
+ */
+void gpio_shutdown(GPIO_PinTypeDef pin);
+
+/**
+ * @brief     This function set a pin's polarity that trig its IRQ.
+ * @param[in] pin - the pin needs to set its edge polarity that trig its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_pol(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+	reg_gpio_wakeup_irq |= FLD_GPIO_CORE_INTERRUPT_EN;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+	reg_irq_src = FLD_IRQ_GPIO_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_EN;
+}
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1:enable 0:disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt(GPIO_PinTypeDef pin, int en)   // reg_irq_mask: FLD_IRQ_GPIO_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_wakeup_en(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_risc0(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling){
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+
+	reg_irq_src = FLD_IRQ_GPIO_RISC0_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC0_EN;
+}
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1 enable. 0 disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt_risc0(GPIO_PinTypeDef pin, int en)  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc0_en(pin), bit);
+	}
+}
+
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_risc1(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+	reg_irq_src = FLD_IRQ_GPIO_RISC1_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC1_EN;
+}
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1 enable. 0 disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt_risc1(GPIO_PinTypeDef pin, int en)  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc1_en(pin), bit);
+	}
+}
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio_default.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio_default.h
new file mode 100644
index 00000000..355007e1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/gpio_default.h
@@ -0,0 +1,829 @@
+/********************************************************************************************************
+ * @file    gpio_default.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "gpio.h"
+
+
+#ifndef PA0_INPUT_ENABLE
+#define PA0_INPUT_ENABLE	0
+#endif
+#ifndef PA1_INPUT_ENABLE
+#define PA1_INPUT_ENABLE	0
+#endif
+#ifndef PA2_INPUT_ENABLE
+#define PA2_INPUT_ENABLE	0
+#endif
+#ifndef PA3_INPUT_ENABLE
+#define PA3_INPUT_ENABLE	0
+#endif
+#ifndef PA4_INPUT_ENABLE
+#define PA4_INPUT_ENABLE	0
+#endif
+#ifndef PA5_INPUT_ENABLE
+#define PA5_INPUT_ENABLE	0	//USB
+#endif
+#ifndef PA6_INPUT_ENABLE
+#define PA6_INPUT_ENABLE	0   //USB
+#endif
+#ifndef PA7_INPUT_ENABLE
+#define PA7_INPUT_ENABLE	1	//SWS
+#endif
+#ifndef PA0_OUTPUT_ENABLE
+#define PA0_OUTPUT_ENABLE	0
+#endif
+#ifndef PA1_OUTPUT_ENABLE
+#define PA1_OUTPUT_ENABLE	0
+#endif
+#ifndef PA2_OUTPUT_ENABLE
+#define PA2_OUTPUT_ENABLE	0
+#endif
+#ifndef PA3_OUTPUT_ENABLE
+#define PA3_OUTPUT_ENABLE	0
+#endif
+#ifndef PA4_OUTPUT_ENABLE
+#define PA4_OUTPUT_ENABLE	0
+#endif
+#ifndef PA5_OUTPUT_ENABLE
+#define PA5_OUTPUT_ENABLE	0
+#endif
+#ifndef PA6_OUTPUT_ENABLE
+#define PA6_OUTPUT_ENABLE	0
+#endif
+#ifndef PA7_OUTPUT_ENABLE
+#define PA7_OUTPUT_ENABLE	0
+#endif
+#ifndef PA0_DATA_STRENGTH
+#define PA0_DATA_STRENGTH	1
+#endif
+#ifndef PA1_DATA_STRENGTH
+#define PA1_DATA_STRENGTH	1
+#endif
+#ifndef PA2_DATA_STRENGTH
+#define PA2_DATA_STRENGTH	1
+#endif
+#ifndef PA3_DATA_STRENGTH
+#define PA3_DATA_STRENGTH	1
+#endif
+#ifndef PA4_DATA_STRENGTH
+#define PA4_DATA_STRENGTH	1
+#endif
+#ifndef PA5_DATA_STRENGTH
+#define PA5_DATA_STRENGTH	1
+#endif
+#ifndef PA6_DATA_STRENGTH
+#define PA6_DATA_STRENGTH	1
+#endif
+#ifndef PA7_DATA_STRENGTH
+#define PA7_DATA_STRENGTH	1
+#endif
+#ifndef PA0_DATA_OUT
+#define PA0_DATA_OUT	0
+#endif
+#ifndef PA1_DATA_OUT
+#define PA1_DATA_OUT	0
+#endif
+#ifndef PA2_DATA_OUT
+#define PA2_DATA_OUT	0
+#endif
+#ifndef PA3_DATA_OUT
+#define PA3_DATA_OUT	0
+#endif
+#ifndef PA4_DATA_OUT
+#define PA4_DATA_OUT	0
+#endif
+#ifndef PA5_DATA_OUT
+#define PA5_DATA_OUT	0
+#endif
+#ifndef PA6_DATA_OUT
+#define PA6_DATA_OUT	0
+#endif
+#ifndef PA7_DATA_OUT
+#define PA7_DATA_OUT	0
+#endif
+#ifndef PA0_FUNC
+#define PA0_FUNC	AS_GPIO
+#endif
+#ifndef PA1_FUNC
+#define PA1_FUNC	AS_GPIO
+#endif
+#ifndef PA2_FUNC
+#define PA2_FUNC	AS_GPIO
+#endif
+#ifndef PA3_FUNC
+#define PA3_FUNC	AS_GPIO
+#endif
+#ifndef PA4_FUNC
+#define PA4_FUNC	AS_GPIO
+#endif
+#ifndef PA5_FUNC
+#define PA5_FUNC	AS_GPIO
+#endif
+#ifndef PA6_FUNC
+#define PA6_FUNC	AS_GPIO
+#endif
+#ifndef PA7_FUNC
+#define PA7_FUNC	AS_SWIRE
+#endif
+#ifndef PULL_WAKEUP_SRC_PA0
+#define PULL_WAKEUP_SRC_PA0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA1
+#define PULL_WAKEUP_SRC_PA1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA2
+#define PULL_WAKEUP_SRC_PA2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA3
+#define PULL_WAKEUP_SRC_PA3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA4
+#define PULL_WAKEUP_SRC_PA4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA5
+#define PULL_WAKEUP_SRC_PA5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA6
+#define PULL_WAKEUP_SRC_PA6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA7
+#define PULL_WAKEUP_SRC_PA7		PM_PIN_PULLUP_1M	//sws pullup
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PB0_INPUT_ENABLE
+#define PB0_INPUT_ENABLE	0
+#endif
+#ifndef PB1_INPUT_ENABLE
+#define PB1_INPUT_ENABLE	0
+#endif
+#ifndef PB2_INPUT_ENABLE
+#define PB2_INPUT_ENABLE	0
+#endif
+#ifndef PB3_INPUT_ENABLE
+#define PB3_INPUT_ENABLE	0
+#endif
+#ifndef PB4_INPUT_ENABLE
+#define PB4_INPUT_ENABLE	0
+#endif
+#ifndef PB5_INPUT_ENABLE
+#define PB5_INPUT_ENABLE	0
+#endif
+#ifndef PB6_INPUT_ENABLE
+#define PB6_INPUT_ENABLE	0
+#endif
+#ifndef PB7_INPUT_ENABLE
+#define PB7_INPUT_ENABLE	0
+#endif
+#ifndef PB0_OUTPUT_ENABLE
+#define PB0_OUTPUT_ENABLE	0
+#endif
+#ifndef PB1_OUTPUT_ENABLE
+#define PB1_OUTPUT_ENABLE	0
+#endif
+#ifndef PB2_OUTPUT_ENABLE
+#define PB2_OUTPUT_ENABLE	0
+#endif
+#ifndef PB3_OUTPUT_ENABLE
+#define PB3_OUTPUT_ENABLE	0
+#endif
+#ifndef PB4_OUTPUT_ENABLE
+#define PB4_OUTPUT_ENABLE	0
+#endif
+#ifndef PB5_OUTPUT_ENABLE
+#define PB5_OUTPUT_ENABLE	0
+#endif
+#ifndef PB6_OUTPUT_ENABLE
+#define PB6_OUTPUT_ENABLE	0
+#endif
+#ifndef PB7_OUTPUT_ENABLE
+#define PB7_OUTPUT_ENABLE	0
+#endif
+#ifndef PB0_DATA_STRENGTH
+#define PB0_DATA_STRENGTH	1
+#endif
+#ifndef PB1_DATA_STRENGTH
+#define PB1_DATA_STRENGTH	1
+#endif
+#ifndef PB2_DATA_STRENGTH
+#define PB2_DATA_STRENGTH	1
+#endif
+#ifndef PB3_DATA_STRENGTH
+#define PB3_DATA_STRENGTH	1
+#endif
+#ifndef PB4_DATA_STRENGTH
+#define PB4_DATA_STRENGTH	1
+#endif
+#ifndef PB5_DATA_STRENGTH
+#define PB5_DATA_STRENGTH	1
+#endif
+#ifndef PB6_DATA_STRENGTH
+#define PB6_DATA_STRENGTH	1
+#endif
+#ifndef PB7_DATA_STRENGTH
+#define PB7_DATA_STRENGTH	1
+#endif
+#ifndef PB0_DATA_OUT
+#define PB0_DATA_OUT	0
+#endif
+#ifndef PB1_DATA_OUT
+#define PB1_DATA_OUT	0
+#endif
+#ifndef PB2_DATA_OUT
+#define PB2_DATA_OUT	0
+#endif
+#ifndef PB3_DATA_OUT
+#define PB3_DATA_OUT	0
+#endif
+#ifndef PB4_DATA_OUT
+#define PB4_DATA_OUT	0
+#endif
+#ifndef PB5_DATA_OUT
+#define PB5_DATA_OUT	0
+#endif
+#ifndef PB6_DATA_OUT
+#define PB6_DATA_OUT	0
+#endif
+#ifndef PB7_DATA_OUT
+#define PB7_DATA_OUT	0
+#endif
+#ifndef PB0_FUNC
+#define PB0_FUNC	AS_GPIO
+#endif
+#ifndef PB1_FUNC
+#define PB1_FUNC	AS_GPIO
+#endif
+#ifndef PB2_FUNC
+#define PB2_FUNC	AS_GPIO
+#endif
+#ifndef PB3_FUNC
+#define PB3_FUNC	AS_GPIO
+#endif
+#ifndef PB4_FUNC
+#define PB4_FUNC	AS_GPIO
+#endif
+#ifndef PB5_FUNC
+#define PB5_FUNC	AS_GPIO
+#endif
+#ifndef PB6_FUNC
+#define PB6_FUNC	AS_GPIO
+#endif
+#ifndef PB7_FUNC
+#define PB7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PB0
+#define PULL_WAKEUP_SRC_PB0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB1
+#define PULL_WAKEUP_SRC_PB1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB2
+#define PULL_WAKEUP_SRC_PB2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB3
+#define PULL_WAKEUP_SRC_PB3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB4
+#define PULL_WAKEUP_SRC_PB4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB5
+#define PULL_WAKEUP_SRC_PB5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB6
+#define PULL_WAKEUP_SRC_PB6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB7
+#define PULL_WAKEUP_SRC_PB7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PC0_INPUT_ENABLE
+#define PC0_INPUT_ENABLE	0
+#endif
+#ifndef PC1_INPUT_ENABLE
+#define PC1_INPUT_ENABLE	0
+#endif
+#ifndef PC2_INPUT_ENABLE
+#define PC2_INPUT_ENABLE	0
+#endif
+#ifndef PC3_INPUT_ENABLE
+#define PC3_INPUT_ENABLE	0
+#endif
+#ifndef PC4_INPUT_ENABLE
+#define PC4_INPUT_ENABLE	0
+#endif
+#ifndef PC5_INPUT_ENABLE
+#define PC5_INPUT_ENABLE	0
+#endif
+#ifndef PC6_INPUT_ENABLE
+#define PC6_INPUT_ENABLE	0
+#endif
+#ifndef PC7_INPUT_ENABLE
+#define PC7_INPUT_ENABLE	0
+#endif
+#ifndef PC0_OUTPUT_ENABLE
+#define PC0_OUTPUT_ENABLE	0
+#endif
+#ifndef PC1_OUTPUT_ENABLE
+#define PC1_OUTPUT_ENABLE	0
+#endif
+#ifndef PC2_OUTPUT_ENABLE
+#define PC2_OUTPUT_ENABLE	0
+#endif
+#ifndef PC3_OUTPUT_ENABLE
+#define PC3_OUTPUT_ENABLE	0
+#endif
+#ifndef PC4_OUTPUT_ENABLE
+#define PC4_OUTPUT_ENABLE	0
+#endif
+#ifndef PC5_OUTPUT_ENABLE
+#define PC5_OUTPUT_ENABLE	0
+#endif
+#ifndef PC6_OUTPUT_ENABLE
+#define PC6_OUTPUT_ENABLE	0
+#endif
+#ifndef PC7_OUTPUT_ENABLE
+#define PC7_OUTPUT_ENABLE	0
+#endif
+#ifndef PC0_DATA_STRENGTH
+#define PC0_DATA_STRENGTH	1
+#endif
+#ifndef PC1_DATA_STRENGTH
+#define PC1_DATA_STRENGTH	1
+#endif
+#ifndef PC2_DATA_STRENGTH
+#define PC2_DATA_STRENGTH	1
+#endif
+#ifndef PC3_DATA_STRENGTH
+#define PC3_DATA_STRENGTH	1
+#endif
+#ifndef PC4_DATA_STRENGTH
+#define PC4_DATA_STRENGTH	1
+#endif
+#ifndef PC5_DATA_STRENGTH
+#define PC5_DATA_STRENGTH	1
+#endif
+#ifndef PC6_DATA_STRENGTH
+#define PC6_DATA_STRENGTH	1
+#endif
+#ifndef PC7_DATA_STRENGTH
+#define PC7_DATA_STRENGTH	1
+#endif
+#ifndef PC0_DATA_OUT
+#define PC0_DATA_OUT	0
+#endif
+#ifndef PC1_DATA_OUT
+#define PC1_DATA_OUT	0
+#endif
+#ifndef PC2_DATA_OUT
+#define PC2_DATA_OUT	0
+#endif
+#ifndef PC3_DATA_OUT
+#define PC3_DATA_OUT	0
+#endif
+#ifndef PC4_DATA_OUT
+#define PC4_DATA_OUT	0
+#endif
+#ifndef PC5_DATA_OUT
+#define PC5_DATA_OUT	0
+#endif
+#ifndef PC6_DATA_OUT
+#define PC6_DATA_OUT	0
+#endif
+#ifndef PC7_DATA_OUT
+#define PC7_DATA_OUT	0
+#endif
+#ifndef PC0_FUNC
+#define PC0_FUNC	AS_GPIO
+#endif
+#ifndef PC1_FUNC
+#define PC1_FUNC	AS_GPIO
+#endif
+#ifndef PC2_FUNC
+#define PC2_FUNC	AS_GPIO
+#endif
+#ifndef PC3_FUNC
+#define PC3_FUNC	AS_GPIO
+#endif
+#ifndef PC4_FUNC
+#define PC4_FUNC	AS_GPIO
+#endif
+#ifndef PC5_FUNC
+#define PC5_FUNC	AS_GPIO
+#endif
+#ifndef PC6_FUNC
+#define PC6_FUNC	AS_GPIO
+#endif
+#ifndef PC7_FUNC
+#define PC7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PC0
+#define PULL_WAKEUP_SRC_PC0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC1
+#define PULL_WAKEUP_SRC_PC1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC2
+#define PULL_WAKEUP_SRC_PC2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC3
+#define PULL_WAKEUP_SRC_PC3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC4
+#define PULL_WAKEUP_SRC_PC4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC5
+#define PULL_WAKEUP_SRC_PC5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC6
+#define PULL_WAKEUP_SRC_PC6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC7
+#define PULL_WAKEUP_SRC_PC7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PD0_INPUT_ENABLE
+#define PD0_INPUT_ENABLE	0
+#endif
+#ifndef PD1_INPUT_ENABLE
+#define PD1_INPUT_ENABLE	0
+#endif
+#ifndef PD2_INPUT_ENABLE
+#define PD2_INPUT_ENABLE	0
+#endif
+#ifndef PD3_INPUT_ENABLE
+#define PD3_INPUT_ENABLE	0
+#endif
+#ifndef PD4_INPUT_ENABLE
+#define PD4_INPUT_ENABLE	0
+#endif
+#ifndef PD5_INPUT_ENABLE
+#define PD5_INPUT_ENABLE	0
+#endif
+#ifndef PD6_INPUT_ENABLE
+#define PD6_INPUT_ENABLE	0
+#endif
+#ifndef PD7_INPUT_ENABLE
+#define PD7_INPUT_ENABLE	0
+#endif
+#ifndef PD0_OUTPUT_ENABLE
+#define PD0_OUTPUT_ENABLE	0
+#endif
+#ifndef PD1_OUTPUT_ENABLE
+#define PD1_OUTPUT_ENABLE	0
+#endif
+#ifndef PD2_OUTPUT_ENABLE
+#define PD2_OUTPUT_ENABLE	0
+#endif
+#ifndef PD3_OUTPUT_ENABLE
+#define PD3_OUTPUT_ENABLE	0
+#endif
+#ifndef PD4_OUTPUT_ENABLE
+#define PD4_OUTPUT_ENABLE	0
+#endif
+#ifndef PD5_OUTPUT_ENABLE
+#define PD5_OUTPUT_ENABLE	0
+#endif
+#ifndef PD6_OUTPUT_ENABLE
+#define PD6_OUTPUT_ENABLE	0
+#endif
+#ifndef PD7_OUTPUT_ENABLE
+#define PD7_OUTPUT_ENABLE	0
+#endif
+#ifndef PD0_DATA_STRENGTH
+#define PD0_DATA_STRENGTH	1
+#endif
+#ifndef PD1_DATA_STRENGTH
+#define PD1_DATA_STRENGTH	1
+#endif
+#ifndef PD2_DATA_STRENGTH
+#define PD2_DATA_STRENGTH	1
+#endif
+#ifndef PD3_DATA_STRENGTH
+#define PD3_DATA_STRENGTH	1
+#endif
+#ifndef PD4_DATA_STRENGTH
+#define PD4_DATA_STRENGTH	1
+#endif
+#ifndef PD5_DATA_STRENGTH
+#define PD5_DATA_STRENGTH	1
+#endif
+#ifndef PD6_DATA_STRENGTH
+#define PD6_DATA_STRENGTH	1
+#endif
+#ifndef PD7_DATA_STRENGTH
+#define PD7_DATA_STRENGTH	1
+#endif
+#ifndef PD0_DATA_OUT
+#define PD0_DATA_OUT	0
+#endif
+#ifndef PD1_DATA_OUT
+#define PD1_DATA_OUT	0
+#endif
+#ifndef PD2_DATA_OUT
+#define PD2_DATA_OUT	0
+#endif
+#ifndef PD3_DATA_OUT
+#define PD3_DATA_OUT	0
+#endif
+#ifndef PD4_DATA_OUT
+#define PD4_DATA_OUT	0
+#endif
+#ifndef PD5_DATA_OUT
+#define PD5_DATA_OUT	0
+#endif
+#ifndef PD6_DATA_OUT
+#define PD6_DATA_OUT	0
+#endif
+#ifndef PD7_DATA_OUT
+#define PD7_DATA_OUT	0
+#endif
+#ifndef PD0_FUNC
+#define PD0_FUNC	AS_GPIO
+#endif
+#ifndef PD1_FUNC
+#define PD1_FUNC	AS_GPIO
+#endif
+#ifndef PD2_FUNC
+#define PD2_FUNC	AS_GPIO
+#endif
+#ifndef PD3_FUNC
+#define PD3_FUNC	AS_GPIO
+#endif
+#ifndef PD4_FUNC
+#define PD4_FUNC	AS_GPIO
+#endif
+#ifndef PD5_FUNC
+#define PD5_FUNC	AS_GPIO
+#endif
+#ifndef PD6_FUNC
+#define PD6_FUNC	AS_GPIO
+#endif
+#ifndef PD7_FUNC
+#define PD7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PD0
+#define PULL_WAKEUP_SRC_PD0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD1
+#define PULL_WAKEUP_SRC_PD1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD2
+#define PULL_WAKEUP_SRC_PD2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD3
+#define PULL_WAKEUP_SRC_PD3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD4
+#define PULL_WAKEUP_SRC_PD4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD5
+#define PULL_WAKEUP_SRC_PD5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD6
+#define PULL_WAKEUP_SRC_PD6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD7
+#define PULL_WAKEUP_SRC_PD7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PE0_INPUT_ENABLE
+#define PE0_INPUT_ENABLE	1   //MSPI
+#endif
+#ifndef PE1_INPUT_ENABLE
+#define PE1_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE2_INPUT_ENABLE
+#define PE2_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE3_INPUT_ENABLE
+#define PE3_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE0_OUTPUT_ENABLE
+#define PE0_OUTPUT_ENABLE	0
+#endif
+#ifndef PE1_OUTPUT_ENABLE
+#define PE1_OUTPUT_ENABLE	0
+#endif
+#ifndef PE2_OUTPUT_ENABLE
+#define PE2_OUTPUT_ENABLE	0
+#endif
+#ifndef PE3_OUTPUT_ENABLE
+#define PE3_OUTPUT_ENABLE	0
+#endif
+
+#ifndef PE0_DATA_STRENGTH
+#define PE0_DATA_STRENGTH	1
+#endif
+#ifndef PE1_DATA_STRENGTH
+#define PE1_DATA_STRENGTH	1
+#endif
+#ifndef PE2_DATA_STRENGTH
+#define PE2_DATA_STRENGTH	1
+#endif
+#ifndef PE3_DATA_STRENGTH
+#define PE3_DATA_STRENGTH	1
+#endif
+
+#ifndef PE0_DATA_OUT
+#define PE0_DATA_OUT	0
+#endif
+#ifndef PE1_DATA_OUT
+#define PE1_DATA_OUT	0
+#endif
+#ifndef PE2_DATA_OUT
+#define PE2_DATA_OUT	0
+#endif
+#ifndef PE3_DATA_OUT
+#define PE3_DATA_OUT	0
+#endif
+
+#ifndef PE0_FUNC
+#define PE0_FUNC	AS_MSPI
+#endif
+#ifndef PE1_FUNC
+#define PE1_FUNC	AS_MSPI
+#endif
+#ifndef PE2_FUNC
+#define PE2_FUNC	AS_MSPI
+#endif
+#ifndef PE3_FUNC
+#define PE3_FUNC	AS_MSPI
+#endif
+
+/**
+ * @brief      This function servers to initiate pull up-down resistor of all gpio.
+ * @param[in]  none
+ * @return     none.
+ */
+static inline void gpio_analog_resistance_init(void)
+{
+	analog_write (0x0e,  PULL_WAKEUP_SRC_PA0 |
+						(PULL_WAKEUP_SRC_PA1<<2) |
+						(PULL_WAKEUP_SRC_PA2<<4) |
+						(PULL_WAKEUP_SRC_PA3<<6));
+
+	analog_write (0x0f,  PULL_WAKEUP_SRC_PA4 |
+						(PULL_WAKEUP_SRC_PA5<<2) |
+						(PULL_WAKEUP_SRC_PA6<<4) |
+						(PULL_WAKEUP_SRC_PA7<<6));
+
+
+	analog_write (0x10,  PULL_WAKEUP_SRC_PB0 |
+						(PULL_WAKEUP_SRC_PB1<<2) |
+						(PULL_WAKEUP_SRC_PB2<<4) |
+						(PULL_WAKEUP_SRC_PB3<<6));
+
+	analog_write (0x11,  PULL_WAKEUP_SRC_PB4 |
+						(PULL_WAKEUP_SRC_PB5<<2) |
+						(PULL_WAKEUP_SRC_PB6<<4) |
+						(PULL_WAKEUP_SRC_PB7<<6));
+
+
+	analog_write (0x12,  PULL_WAKEUP_SRC_PC0 |
+						(PULL_WAKEUP_SRC_PC1<<2) |
+						(PULL_WAKEUP_SRC_PC2<<4) |
+						(PULL_WAKEUP_SRC_PC3<<6));
+
+	analog_write (0x13,  PULL_WAKEUP_SRC_PC4 |
+						(PULL_WAKEUP_SRC_PC5<<2) |
+						(PULL_WAKEUP_SRC_PC6<<4) |
+						(PULL_WAKEUP_SRC_PC7<<6));
+
+
+	analog_write (0x14,  PULL_WAKEUP_SRC_PD0 |
+						(PULL_WAKEUP_SRC_PD1<<2) |
+						(PULL_WAKEUP_SRC_PD2<<4) |
+						(PULL_WAKEUP_SRC_PD3<<6));
+
+	analog_write (0x15,  PULL_WAKEUP_SRC_PD4 |
+						(PULL_WAKEUP_SRC_PD5<<2) |
+						(PULL_WAKEUP_SRC_PD6<<4) |
+						(PULL_WAKEUP_SRC_PD7<<6));
+}
+
+/**
+ * @brief      This function servers to initialization all gpio.
+ * @param[in]  en  -  if mcu wake up from deep retention mode, determine whether it is NOT necessary to reset analog register
+ *                    1: set analog register
+ *                    0: not set analog register
+ * @return     none.
+ */
+/**Processing methods of unused GPIO
+ * Set it to high resistance state and set it to open pull-up or pull-down resistance to
+ * let it be in the determined state.When GPIO uses internal pull-up or pull-down resistance,
+ * do not use pull-up or pull-down resistance on the board in the process of practical
+ * application because it may have the risk of electric leakage .
+ */
+static inline void gpio_init(int anaRes_init_en)
+{
+	reg_gpio_pa_setting1 =
+		(PA0_INPUT_ENABLE<<8) 	| (PA1_INPUT_ENABLE<<9)	| (PA2_INPUT_ENABLE<<10)	| (PA3_INPUT_ENABLE<<11) |
+		(PA4_INPUT_ENABLE<<12)	| (PA5_INPUT_ENABLE<<13)	| (PA6_INPUT_ENABLE<<14)	| (PA7_INPUT_ENABLE<<15) |
+		((PA0_OUTPUT_ENABLE?0:1)<<16)	| ((PA1_OUTPUT_ENABLE?0:1)<<17) | ((PA2_OUTPUT_ENABLE?0:1)<<18)	| ((PA3_OUTPUT_ENABLE?0:1)<<19) |
+		((PA4_OUTPUT_ENABLE?0:1)<<20)	| ((PA5_OUTPUT_ENABLE?0:1)<<21) | ((PA6_OUTPUT_ENABLE?0:1)<<22)	| ((PA7_OUTPUT_ENABLE?0:1)<<23) |
+		(PA0_DATA_OUT<<24)	| (PA1_DATA_OUT<<25)	| (PA2_DATA_OUT<<26)	| (PA3_DATA_OUT<<27) |
+		(PA4_DATA_OUT<<28)	| (PA5_DATA_OUT<<29)	| (PA6_DATA_OUT<<30)	| (PA7_DATA_OUT<<31) ;
+	reg_gpio_pa_setting2 =
+		(PA0_DATA_STRENGTH<<8)		| (PA1_DATA_STRENGTH<<9)| (PA2_DATA_STRENGTH<<10)	| (PA3_DATA_STRENGTH<<11) |
+		(PA4_DATA_STRENGTH<<12)	| (PA5_DATA_STRENGTH<<13)	| (PA6_DATA_STRENGTH<<14)	| (PA7_DATA_STRENGTH<<15) |
+		(PA0_FUNC==AS_GPIO ? BIT(16):0)	| (PA1_FUNC==AS_GPIO ? BIT(17):0)| (PA2_FUNC==AS_GPIO ? BIT(18):0)| (PA3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PA4_FUNC==AS_GPIO ? BIT(20):0)	| (PA5_FUNC==AS_GPIO ? BIT(21):0)| (PA6_FUNC==AS_GPIO ? BIT(22):0)| (PA7_FUNC==AS_GPIO ? BIT(23):0);
+
+	//PB group
+	//ie
+	analog_write(areg_gpio_pb_ie, 	(PB0_INPUT_ENABLE<<0) 	| (PB1_INPUT_ENABLE<<1)	| (PB2_INPUT_ENABLE<<2)	| (PB3_INPUT_ENABLE<<3) |
+									(PB4_INPUT_ENABLE<<4)	| (PB5_INPUT_ENABLE<<5) | (PB6_INPUT_ENABLE<<6)	| (PB7_INPUT_ENABLE<<7) );
+	//oen
+	reg_gpio_pb_oen =
+		((PB0_OUTPUT_ENABLE?0:1)<<0)	| ((PB1_OUTPUT_ENABLE?0:1)<<1) | ((PB2_OUTPUT_ENABLE?0:1)<<2)	| ((PB3_OUTPUT_ENABLE?0:1)<<3) |
+		((PB4_OUTPUT_ENABLE?0:1)<<4)	| ((PB5_OUTPUT_ENABLE?0:1)<<5) | ((PB6_OUTPUT_ENABLE?0:1)<<6)	| ((PB7_OUTPUT_ENABLE?0:1)<<7);
+	//dataO
+	reg_gpio_pb_out =
+		(PB0_DATA_OUT<<0)	| (PB1_DATA_OUT<<1)	| (PB2_DATA_OUT<<2)	| (PB3_DATA_OUT<<3) |
+		(PB4_DATA_OUT<<4)	| (PB5_DATA_OUT<<5)	| (PB6_DATA_OUT<<6)	| (PB7_DATA_OUT<<7) ;
+
+	//ds
+	analog_write(areg_gpio_pb_ds, 	(PB0_DATA_STRENGTH<<0) 	| (PB1_DATA_STRENGTH<<1)  | (PB2_DATA_STRENGTH<<2)	| (PB3_DATA_STRENGTH<<3) |
+									(PB4_DATA_STRENGTH<<4)	| (PB5_DATA_STRENGTH<<5)  | (PB6_DATA_STRENGTH<<6)	| (PB7_DATA_STRENGTH<<7) );
+	//func
+	reg_gpio_pb_gpio =
+		(PB0_FUNC==AS_GPIO ? BIT(0):0)	| (PB1_FUNC==AS_GPIO ? BIT(1):0)| (PB2_FUNC==AS_GPIO ? BIT(2):0)| (PB3_FUNC==AS_GPIO ? BIT(3):0) |
+		(PB4_FUNC==AS_GPIO ? BIT(4):0)	| (PB5_FUNC==AS_GPIO ? BIT(5):0)| (PB6_FUNC==AS_GPIO ? BIT(6):0)| (PB7_FUNC==AS_GPIO ? BIT(7):0);
+
+	//PC group
+	//ie
+	analog_write(areg_gpio_pc_ie, 	(PC0_INPUT_ENABLE<<0) 	| (PC1_INPUT_ENABLE<<1)	| (PC2_INPUT_ENABLE<<2)	| (PC3_INPUT_ENABLE<<3) |
+									(PC4_INPUT_ENABLE<<4)	| (PC5_INPUT_ENABLE<<5) | (PC6_INPUT_ENABLE<<6)	| (PC7_INPUT_ENABLE<<7) );
+
+	//oen
+	reg_gpio_pc_oen =
+		((PC0_OUTPUT_ENABLE?0:1)<<0)	| ((PC1_OUTPUT_ENABLE?0:1)<<1) | ((PC2_OUTPUT_ENABLE?0:1)<<2)	| ((PC3_OUTPUT_ENABLE?0:1)<<3) |
+		((PC4_OUTPUT_ENABLE?0:1)<<4)	| ((PC5_OUTPUT_ENABLE?0:1)<<5) | ((PC6_OUTPUT_ENABLE?0:1)<<6)	| ((PC7_OUTPUT_ENABLE?0:1)<<7);
+	//dataO
+	reg_gpio_pc_out =
+		(PC0_DATA_OUT<<0)	| (PC1_DATA_OUT<<1)	| (PC2_DATA_OUT<<2)	| (PC3_DATA_OUT<<3) |
+		(PC4_DATA_OUT<<4)	| (PC5_DATA_OUT<<5)	| (PC6_DATA_OUT<<6)	| (PC7_DATA_OUT<<7) ;
+
+	//ds
+	analog_write(areg_gpio_pc_ds, 	(PC0_DATA_STRENGTH<<0) 	| (PC1_DATA_STRENGTH<<1)  | (PC2_DATA_STRENGTH<<2)	| (PC3_DATA_STRENGTH<<3) |
+									(PC4_DATA_STRENGTH<<4)	| (PC5_DATA_STRENGTH<<5)  | (PC6_DATA_STRENGTH<<6)	| (PC7_DATA_STRENGTH<<7) );
+
+	reg_gpio_pc_gpio =
+		(PC0_FUNC==AS_GPIO ? BIT(0):0)	| (PC1_FUNC==AS_GPIO ? BIT(1):0)| (PC2_FUNC==AS_GPIO ? BIT(2):0)| (PC3_FUNC==AS_GPIO ? BIT(3):0) |
+		(PC4_FUNC==AS_GPIO ? BIT(4):0)	| (PC5_FUNC==AS_GPIO ? BIT(5):0)| (PC6_FUNC==AS_GPIO ? BIT(6):0)| (PC7_FUNC==AS_GPIO ? BIT(7):0);
+
+	//PD group
+	reg_gpio_pd_setting1 =
+		(PD0_INPUT_ENABLE<<8) 	| (PD1_INPUT_ENABLE<<9)	| (PD2_INPUT_ENABLE<<10)	| (PD3_INPUT_ENABLE<<11) |
+		(PD4_INPUT_ENABLE<<12)	| (PD5_INPUT_ENABLE<<13)| (PD6_INPUT_ENABLE<<14)	| (PD7_INPUT_ENABLE<<15) |
+		((PD0_OUTPUT_ENABLE?0:1)<<16)	| ((PD1_OUTPUT_ENABLE?0:1)<<17) | ((PD2_OUTPUT_ENABLE?0:1)<<18)	| ((PD3_OUTPUT_ENABLE?0:1)<<19) |
+		((PD4_OUTPUT_ENABLE?0:1)<<20)	| ((PD5_OUTPUT_ENABLE?0:1)<<21) | ((PD6_OUTPUT_ENABLE?0:1)<<22)	| ((PD7_OUTPUT_ENABLE?0:1)<<23) |
+		(PD0_DATA_OUT<<24)	| (PD1_DATA_OUT<<25)	| (PD2_DATA_OUT<<26)	| (PD3_DATA_OUT<<27) |
+		(PD4_DATA_OUT<<28)	| (PD5_DATA_OUT<<29)	| (PD6_DATA_OUT<<30)	| (PD7_DATA_OUT<<31) ;
+	reg_gpio_pd_setting2 =
+		(PD0_DATA_STRENGTH<<8)	| (PD1_DATA_STRENGTH<<9)	| (PD2_DATA_STRENGTH<<10)	| (PD3_DATA_STRENGTH<<11) |
+		(PD4_DATA_STRENGTH<<12)	| (PD5_DATA_STRENGTH<<13)	| (PD6_DATA_STRENGTH<<14)	| (PD7_DATA_STRENGTH<<15) |
+		(PD0_FUNC==AS_GPIO ? BIT(16):0)	| (PD1_FUNC==AS_GPIO ? BIT(17):0)| (PD2_FUNC==AS_GPIO ? BIT(18):0)| (PD3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PD4_FUNC==AS_GPIO ? BIT(20):0)	| (PD5_FUNC==AS_GPIO ? BIT(21):0)| (PD6_FUNC==AS_GPIO ? BIT(22):0)| (PD7_FUNC==AS_GPIO ? BIT(23):0);
+
+
+	//PE group
+	reg_gpio_pe_ie = (PE0_INPUT_ENABLE<<0)	| (PE1_INPUT_ENABLE<<1)| (PE2_INPUT_ENABLE<<2)	| (PE3_INPUT_ENABLE<<3);
+	reg_gpio_pe_oen = ((PE0_OUTPUT_ENABLE?0:1)<<0)	| ((PE1_OUTPUT_ENABLE?0:1)<<1) | ((PE2_OUTPUT_ENABLE?0:1)<<2)	| ((PE3_OUTPUT_ENABLE?0:1)<<3);
+	reg_gpio_pe_out = (PE0_DATA_OUT<<0)	| (PE1_DATA_OUT<<1)	| (PE2_DATA_OUT<<2)	| (PE3_DATA_OUT<<3);
+	reg_gpio_pe_ds = (PE0_DATA_STRENGTH<<0)	| (PE1_DATA_STRENGTH<<1)	| (PE2_DATA_STRENGTH<<2)	| (PE3_DATA_STRENGTH<<3);
+	reg_gpio_pe_gpio = (PE0_FUNC==AS_GPIO ? BIT(0):0)	| (PE1_FUNC==AS_GPIO ? BIT(1):0)| (PE2_FUNC==AS_GPIO ? BIT(2):0)| (PE3_FUNC==AS_GPIO ? BIT(3):0);
+
+	if(anaRes_init_en)
+	{
+		gpio_analog_resistance_init();
+	}
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/i2c.h
new file mode 100644
index 00000000..b04f2924
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/i2c.h
@@ -0,0 +1,193 @@
+/********************************************************************************************************
+ * @file    i2c.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef I2C_H
+#define I2C_H
+
+#include "register.h"
+
+
+/**
+ *  @brief  select pin as SDA and SCL of i2c
+ */
+typedef enum {
+	I2C_GPIO_GROUP_A3A4,
+	I2C_GPIO_GROUP_B6D7,
+	I2C_GPIO_GROUP_C0C1,
+	I2C_GPIO_GROUP_C2C3,
+}I2C_GPIO_GroupTypeDef;
+
+
+/**
+ *  @brief  select i2c slave mode: DMA and MAPPING
+ *
+ *   dma mode:
+ *   		   all sram(64k area form 0x40000~0x4ffff, address 3 byte) could be used for reading or writing data buffer,
+ *             i2c master just need send sram address(3 byte) on i2c bus in i2c reading or writing, reading/writing
+ *             sram address could be anywhere and could be different.
+ *			   i2c master timing is:
+ *              	1.master write:  start + device_id(W) + address2+ address1 + address0 + data(1,2...n byte)  +  stop
+ *                  2.master read:   start + device_id(W) + address2+ address1 + address0 + start + device_id(R) + data(1,2...n byte) + stop
+ *
+ *   mapping mode:
+ *  			i2c slave data buffer sram could be configured by function: void i2c_slave_mapping_mode_data_buffer_config(unsigned char * pMapBuf),
+ *              and it is also configured in function: void i2c_slave_init(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pMapBuf)
+ *   			reading/writing data buffer configured by pMapBuf addressed in core_e1/e2/e3,
+ *   		    for i2c master: writing data buffer is pMapBuf,and reading data buffer is (pMapBuf+64) (this offset 64 is managed by MCU hardware, user can not change it)
+ *
+ *              i2c master no need send any address when reading or writing data, which means i2c master timing is:
+ *              	1.master write:  start + device_id(W) + data(1,2...n byte)  +  stop
+ *                  2.master read:   start + device_id(W) + start + device_id(R) + data(1,2...n byte) + stop
+ *
+ *
+ */
+typedef enum {
+	I2C_SLAVE_DMA = 0,
+	I2C_SLAVE_MAP,
+}I2C_SlaveMode;
+
+typedef enum{
+	HOST_CMD_IRQ  = 	BIT(0),  SLAVE_SPI_IRQ = HOST_CMD_IRQ,  //both host write & read trigger this status
+	HOST_READ_IRQ = 	BIT(1),                                        //only host read trigger this status
+}i2c_irq_e;
+
+/**
+ * @brief This function reset I2C module.
+ * @param[in] none
+ * @return none
+ */
+static inline void reset_i2c_moudle(void)
+{
+	reg_rst0 |= FLD_RST0_I2C;
+	reg_rst0 &= (~FLD_RST0_I2C);
+}
+
+/**
+ * @brief This function serves to set id of I2C module.
+ * @param[in] SlaveID - this id is fixed id for slave device.For master device, this id is set to access different slave devices.
+ * @return none
+ */
+static inline void i2c_set_id(unsigned char SlaveID)
+{
+    reg_i2c_id = SlaveID; //slave address
+}
+
+/**
+ * @brief This function servers to config i2c data buffer in slave mode.
+ * @param[in] pMapBuf - to store the buffer data.
+ * @return none
+ */
+static inline void i2c_slave_mapping_mode_data_buffer_config(unsigned char * pMapBuf)
+{
+	 reg_i2c_slave_map_addrl  = (unsigned char)(((unsigned int)pMapBuf & 0xff)); //
+	 reg_i2c_slave_map_addrm = (unsigned char)(((unsigned int)pMapBuf>>8)&0xff);
+	 reg_i2c_slave_map_addrh = 0x04;
+}
+
+/**
+ * @brief      This function serves to select a pin port for I2C interface.
+ * @param[in]  i2c_pin_group - the pin port selected as I2C interface pin port.
+ * @return     none
+ */
+void i2c_gpio_set(I2C_GPIO_GroupTypeDef i2c_pin_group);
+
+/**
+ * @brief      This function set the id of slave device and the speed of I2C interface
+ * @param[in]  DivClock - the division factor of I2C clock,
+ *             I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return     none
+ */
+void i2c_master_init(unsigned char DivClock);
+
+/**
+ *  @brief      This function serves to set the ID and mode of slave device.
+ *  @param[in]  device_ID - it contains write or read bit,the lsb is write or read bit.
+ *              ID|0x01 indicate read. ID&0xfe indicate write.
+ *  @param[in]  mode - set slave mode. slave has two modes, one is DMA mode, the other is MAPPING mode.
+ *  @param[in]  pMapBuf - if slave mode is MAPPING, set the first address of buffer master write or read slave.
+ *  @return     none
+ */
+void i2c_slave_init(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pMapBuf);
+
+
+/**
+ * @brief      This function serves to write one byte to the slave device at the specified address
+ * @param[in]  Addr - i2c slave address where the one byte data will be written
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @param[in]  Data - the one byte data will be written via I2C interface
+ * @return     none
+ */
+void i2c_write_byte(unsigned int Addr, unsigned int AddrLen, unsigned char Data);
+
+/**
+ * @brief      This function serves to read one byte from the slave device at the specified address
+ * @param[in]  Addr - i2c slave address where the one byte data will be read
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @return     the one byte data read from the slave device via I2C interface
+ */
+unsigned char i2c_read_byte(unsigned int Addr, unsigned int AddrLen);
+
+/**
+ *  @brief      This function serves to write a packet of data to the specified address of slave device
+ *  @param[in]  Addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ *  @param[in]  AddrLen - the length of register. enum 0 or 1 or 2 or 3. based on the spec of i2c slave.
+ *  @param[in]  dataBuf - the first SRAM buffer address to write data to slave in.
+ *  @param[in]  dataLen - the length of data master write to slave.
+ *  @return     none
+ */
+void i2c_write_series(unsigned int Addr, unsigned int AddrLen, unsigned char * dataBuf, int dataLen);
+
+/**
+ * @brief      This function serves to read a packet of data from the specified address of slave device
+ * @param[in]  Addr - the register master read data from slave in. support one byte and two bytes.
+ * @param[in]  AddrLen - the length of register. enum 0 or 1 or 2 or 3 based on the spec of i2c slave.
+ * @param[in]  dataBuf - the first address of SRAM buffer master store data in.
+ * @param[in]  dataLen - the length of data master read from slave.
+ * @return     none.
+ */
+void i2c_read_series(unsigned int Addr, unsigned int AddrLen, unsigned char * dataBuf, int dataLen);
+
+/**
+ * @brief     This fuction servers to clear the i2c slave interrupt status.
+ * @param[in] irq_status  - i2c slave all interrupt status.
+ * @return	  none.
+ */
+static inline void i2c_clear_interrupt_status(i2c_irq_e irq_status)
+{
+	reg_i2c_slave_irq_status = irq_status;
+}
+
+
+/**
+ * @brief     This fuction servers to get the i2c slave interrupt status.
+ * @param[in] irq_status  - i2c slave all interrupt status.
+ * @return	  i2c slave interrupt status.
+ */
+static inline unsigned char i2c_get_interrupt_status(i2c_irq_e irq_status){
+	 return reg_i2c_slave_irq_status & irq_status;
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/irq.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/irq.h
new file mode 100644
index 00000000..e373095f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/irq.h
@@ -0,0 +1,173 @@
+/********************************************************************************************************
+ * @file    irq.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bit.h"
+
+/**
+ * @brief      This function servers to enable IRQ.
+ * @param[in]  none
+ * @return     if return 1 is enable.else disable.
+ */
+static inline unsigned char irq_enable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 1;
+	return r;
+}
+
+/**
+ * @brief      This function servers to disable IRQ.
+ * @param[in]  none
+ * @return     if return 0 is disable.else enable.
+ */
+static inline unsigned char irq_disable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 0;
+	return r;
+}
+
+/**
+ * @brief      This function servers to restore IRQ.
+ * @param[in]  none
+ * @return     if return 1 is irg restore.
+ */
+static inline void irq_restore(unsigned char en){
+	reg_irq_en = en;
+}
+
+/**
+ * @brief      This function servers to set IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_enable_type(unsigned long msk){
+	BM_SET(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to clear IRQ mask.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void irq_disable_type(unsigned long msk){
+	BM_CLR(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to set IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_set_mask(unsigned long msk){
+	BM_SET(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to clear IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_clr_mask(unsigned long msk){
+	BM_CLR(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to enable one interrupt
+ * @param[in]  none
+ * @return     the value of IRQ register.
+ */
+static inline unsigned long irq_get_mask(void){
+	return reg_irq_mask;
+}
+
+/**
+ * @brief      This function servers to get an IRQ source.
+ * @param[in]  none.
+ * @return     IRQ source.
+ */
+static inline unsigned long irq_get_src(void){
+	return reg_irq_src;
+}
+
+/**
+ * @brief      This function servers to clear all IRQ source.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void irq_clr_all_src(void){
+	reg_irq_src = 0xffffffff;	// set to clear
+}
+
+/**
+ * @brief      This function servers to clear the specified IRQ source.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void irq_clr_src(unsigned long msk){
+    reg_irq_src = msk;   // set to clear
+}
+
+/**
+ * @brief      This function servers to set the mask of RF IRQ.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_enable(unsigned int msk)
+{
+    reg_rf_irq_mask |= msk;
+}
+
+/**
+ * @brief      This function servers to clear the mask of RF IRQ.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_disable(unsigned int msk)
+{
+    reg_rf_irq_mask &= (~msk);
+}
+
+/**
+ * @brief      This function servers to get the RF IRQ source.
+ * @param[in]  none.
+ * @return     the state of RF IRQ register.
+ */
+static inline unsigned short rf_irq_src_get(void)
+{
+    return reg_rf_irq_status;
+}
+
+/**
+ * @brief      This function servers to clear the RF IRQ source.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_clr_src(unsigned short msk)
+{
+    reg_rf_irq_status = msk;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pga.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pga.h
new file mode 100644
index 00000000..39d16b88
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pga.h
@@ -0,0 +1,142 @@
+/********************************************************************************************************
+ * @file    pga.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef		pga_H
+#define		pga_H
+
+#include "bsp.h"
+#include "analog.h"
+
+enum{
+	PGA_AIN_C0,
+	PGA_AIN_C1,
+	PGA_AIN_C2,
+	PGA_AIN_C3,
+};
+
+
+//set FLD_PGA_PRE_AMPLIFIER_GAIN of reg_pga_fix_value (0xb63<6>) 26dB OR 46dB
+
+typedef enum{
+	PGA_PRE_GAIN_18DB = 0,		//26dB  18dB
+	PGA_PRE_GAIN_38DB = 1,		//46dB   38dB
+}PGA_PreAmplifierTypeDef;
+
+
+///set FLD_PGA_POST_AMPLIFIER_GAIN of reg_pga_fix_value (0xb63<0:5>) range -10~14dB
+typedef enum{
+	PGA_POST_GAIN_m10DB = 0,		//-10dB
+	PGA_POST_GAIN_m9P5DB,
+	PGA_POST_GAIN_m9DB,
+	PGA_POST_GAIN_m8P5DB,
+	PGA_POST_GAIN_m8DB,
+	PGA_POST_GAIN_m7P5DB,
+	PGA_POST_GAIN_m7DB,
+	PGA_POST_GAIN_m6P5DB,
+	PGA_POST_GAIN_m6DB,
+	PGA_POST_GAIN_m5P5DB,
+	PGA_POST_GAIN_m5DB,
+	PGA_POST_GAIN_m4P5DB,
+	PGA_POST_GAIN_m4DB,
+	PGA_POST_GAIN_m3P5DB,
+	PGA_POST_GAIN_m3DB,
+	PGA_POST_GAIN_m2P5DB,
+	PGA_POST_GAIN_m2DB,
+	PGA_POST_GAIN_m1P5DB,
+	PGA_POST_GAIN_m1DB,
+	PGA_POST_GAIN_m0P5DB,
+	PGA_POST_GAIN_0DB,				//0dB
+	PGA_POST_GAIN_0P5DB,
+	PGA_POST_GAIN_1DB,
+	PGA_POST_GAIN_1P5DB,
+	PGA_POST_GAIN_2DB,
+	PGA_POST_GAIN_2P5DB,
+	PGA_POST_GAIN_3DB,
+	PGA_POST_GAIN_3P5DB,
+	PGA_POST_GAIN_4DB,
+	PGA_POST_GAIN_4P5DB,
+	PGA_POST_GAIN_5DB,
+	PGA_POST_GAIN_5P5DB,
+	PGA_POST_GAIN_6DB,
+	PGA_POST_GAIN_6P5DB,
+	PGA_POST_GAIN_7DB,
+	PGA_POST_GAIN_7P5DB,
+	PGA_POST_GAIN_8DB,
+	PGA_POST_GAIN_8P5DB,
+	PGA_POST_GAIN_9DB,
+	PGA_POST_GAIN_9P5DB,
+	PGA_POST_GAIN_10DB,				//10dB
+	PGA_POST_GAIN_10P5DB,
+	PGA_POST_GAIN_11DB,
+	PGA_POST_GAIN_11P5DB,
+	PGA_POST_GAIN_12DB,
+	PGA_POST_GAIN_12P5DB,
+	PGA_POST_GAIN_13DB,
+	PGA_POST_GAIN_13P5DB,
+	PGA_POST_GAIN_14DB,				//14dB
+}PGA_PostAmplifierTypeDef;
+
+
+#define		SET_PGA_CHN_ON(v)				do{\
+												unsigned char val=analog_read(0x80+124);\
+												val &= (~(v));\
+												analog_write(0x80+124,val);\
+											}while(0)
+#define		SET_PGA_LEFT_P_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xfc;\
+												val |= (((unsigned char)(v))&0x03);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_LEFT_N_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xf3;\
+												val |= (((unsigned char)(v)<<2)&0x0c);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_RIGHT_P_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xcf;\
+												val |= (((unsigned char)(v)<<4)&0x30);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_RIGHT_N_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0x3f;\
+												val |= (((unsigned char)(v)<<6)&0xc0);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_GAIN_FIX_VALUE(v)		do{\
+												unsigned char val=0;\
+												val |= (((unsigned char)(v))&0x7f);\
+												write_reg8(0xb63,val|0x80);\
+											}while(0)
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pm.h
new file mode 100644
index 00000000..454abc53
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pm.h
@@ -0,0 +1,324 @@
+/********************************************************************************************************
+ * @file    pm.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "gpio.h"
+
+
+
+#define PM_XTAL_DELAY_DURATION      		500
+#define EARLYWAKEUP_TIME_US_DEEP    		1100
+#define EARLYWAKEUP_TIME_US_SUSPEND 		1250
+#define EMPTYRUN_TIME_US       	    		1500
+
+#define PM_DCDC_DELAY_DURATION      		1000
+
+#define EARLYWAKEUP_TIME_MS_DEEP	2
+#define	tick_32k_tick_per_ms		32
+#define PM_EMPTYRUN_TIME_US			2
+
+
+
+/**
+ * @brief analog register below can store information when MCU in deepsleep mode
+ * 	      store your information in these ana_regs before deepsleep by calling analog_write function
+ * 	      when MCU wakeup from deepsleep, read the information by by calling analog_read function
+ * 	      Reset these analog registers only by power cycle
+ */
+#define DEEP_ANA_REG0                       0x3a //initial value =0x00
+#define DEEP_ANA_REG1                       0x3b //initial value =0x00
+#define DEEP_ANA_REG2                       0x3c //initial value =0x00
+
+/**
+ * @brief these analog register can store data in deepsleep mode or deepsleep with SRAM retention mode.
+ * 	      Reset these analog registers by watchdog, chip reset, RESET Pin, power cycle
+ */
+#define DEEP_ANA_REG6                       0x35 //initial value =0x20
+#define DEEP_ANA_REG7                       0x36 //initial value =0x00
+#define DEEP_ANA_REG8                       0x37 //initial value =0x00
+#define DEEP_ANA_REG9                       0x38 //initial value =0x00
+#define DEEP_ANA_REG10                      0x39 //initial value =0xff
+
+
+#define SYS_NEED_REINIT_EXT32K			    BIT(0)
+#define SYS_DEEP_SLEEP_FLAG					BIT(1)
+
+
+//ana3c system used, user can not use
+#define SYS_DEEP_ANA_REG 					DEEP_ANA_REG2
+
+#define WAKEUP_STATUS_TIMER_CORE     	    (WAKEUP_STATUS_TIMER | WAKEUP_STATUS_CORE)
+#define WAKEUP_STATUS_TIMER_PAD		        (WAKEUP_STATUS_TIMER | WAKEUP_STATUS_PAD)
+
+/**
+ * @brief sleep mode.
+ */
+typedef enum {
+	//available mode for customer
+	SUSPEND_MODE						= 0,
+
+	DEEPSLEEP_MODE						= 0x80,
+	DEEPSLEEP_MODE_RET_SRAM_LOW8K		= 0x61,  //for boot from sram
+	DEEPSLEEP_MODE_RET_SRAM_LOW16K  	= 0x43,  //for boot from sram
+	DEEPSLEEP_MODE_RET_SRAM_LOW32K  	= 0x07,  //for boot from sram
+
+	SHUTDOWN_MODE						= 0xFF,
+
+	//not available mode
+	DEEPSLEEP_RETENTION_FLAG			= 0x7F,
+}SleepMode_TypeDef;
+
+
+/**
+ * @brief   wakeup source
+ */
+typedef enum {
+	 //available wake-up source for customer
+	 PM_WAKEUP_PAD   		= BIT(4),
+	 PM_WAKEUP_CORE  		= BIT(5),
+	 PM_WAKEUP_TIMER 		= BIT(6),
+	 PM_WAKEUP_COMPARATOR 	= BIT(7),
+}SleepWakeupSrc_TypeDef;
+
+/**
+ * @brief   wakeup status
+ */
+enum {
+	 WAKEUP_STATUS_COMPARATOR  		= BIT(0),
+	 WAKEUP_STATUS_TIMER  			= BIT(1),
+	 WAKEUP_STATUS_CORE 			= BIT(2),
+	 WAKEUP_STATUS_PAD    			= BIT(3),
+
+	 WAKEUP_STATUS_WD    			= BIT(6),
+	 STATUS_GPIO_ERR_NO_ENTER_PM  	= BIT(7),
+
+	 STATUS_ENTER_SUSPEND  			= BIT(30),
+};
+
+/**
+ * @brief   mcu status
+ */
+typedef enum{
+	MCU_STATUS_BOOT,
+	MCU_STATUS_DEEPRET_BACK,
+	MCU_STATUS_DEEP_BACK,
+}pm_mcu_status;
+
+/**
+ * @brief   deepsleep wakeup status
+ */
+typedef struct{
+	unsigned char is_pad_wakeup;
+	unsigned char wakeup_src;
+	unsigned char mcu_status;
+}pm_para_t;
+
+
+typedef int (*suspend_handler_t)(void);
+typedef unsigned int (*pm_tim_recover_handler_t)(unsigned int);
+typedef int (*cpu_pm_handler_t)(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+extern suspend_handler_t func_before_suspend;
+extern pm_tim_recover_handler_t pm_tim_recover;
+extern cpu_pm_handler_t cpu_sleep_wakeup;
+extern pm_para_t pmParam;
+
+
+void bls_pm_registerFuncBeforeSuspend(suspend_handler_t func);
+
+
+
+
+
+/**
+ * @brief      This function serves to get mcu status.
+ * @param[in]  none.
+ * @return     pm_mcu_status
+ */
+static inline unsigned char pm_get_mcu_status(void)
+{
+	return pmParam.mcu_status;
+}
+
+/**
+ * @brief      This function serves to determine whether mcu is waked up by pad.
+ * @param[in]  none.
+ * @return     1- yes , 0- no.
+ */
+static inline unsigned char pm_is_padWakeup(void)
+{
+	return pmParam.is_pad_wakeup;
+}
+
+/**
+ * @brief      This function serves to get the source of wake-up.
+ * @param[in]  none.
+ * @return     wakeup source.
+ */
+static inline unsigned char pm_get_wakeup_src(void)
+{
+	return pmParam.wakeup_src;
+}
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer0.
+ * @param   tick - capture value of timer0.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer0(unsigned int tick);
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer1.
+ * @param   tick - capture value of timer1.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer1(unsigned int tick);
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer2.
+ * @param   tick - capture value of timer2.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer2(unsigned int tick);
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer1 or RF TX done irq.
+ * @param   WakeupSrc  - timer1.
+ * @param   IntervalUs - capture value of timer1.
+ * @param   sysclktick - tick value of per us based on system clock.
+ * @return  none.
+ */
+unsigned int cpu_stall(int WakeupSrc, unsigned int IntervalUs,unsigned int sysclktick);
+
+/**
+ * @brief      This function configures a GPIO pin as the wakeup pin.
+ * @param[in]  pin - the pin needs to be configured as wakeup pin
+ * @param[in]  pol - the wakeup polarity of the pad pin(0: low-level wakeup, 1: high-level wakeup)
+ * @param[in]  en  - enable or disable the wakeup function for the pan pin(1: Enable, 0: Disable)
+ * @return     none
+ */
+void cpu_set_gpio_wakeup(GPIO_PinTypeDef pin, GPIO_LevelTypeDef pol, int en);
+
+
+/**
+ * @brief   This function serves to get the 32k tick.
+ * @param   none
+ * @return  tick of 32k .
+ */
+extern unsigned int pm_get_32k_tick(void);
+
+/**
+ * @brief   This function serves to initialize MCU
+ * @param   none
+ * @return  none
+ */
+void cpu_wakeup_init(void);
+
+/**
+ * @brief   This function serves to recover system timer from tick of internal 32k RC.
+ * @param   none.
+ * @return  none.
+ */
+unsigned int pm_tim_recover_32k_rc(unsigned int now_tick_32k);
+
+/**
+ * @brief   This function serves to recover system timer from tick of external 32k crystal.
+ * @param   none.
+ * @return  none.
+ */
+unsigned int pm_tim_recover_32k_xtal(unsigned int now_tick_32k);
+
+/**
+ * @brief      This function serves to set the working mode of MCU based on 32k crystal,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of short sleep, which means MCU can sleep for less than 5 minutes.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int cpu_sleep_wakeup_32k_rc(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function serves to set the working mode of MCU based on 32k crystal,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of short sleep, which means MCU can sleep for less than 5 minutes.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int cpu_sleep_wakeup_32k_xtal(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function servers to wake up the cpu from sleep mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of sleep.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int pm_long_sleep_wakeup(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function serves to determine whether wake up source is internal 32k RC.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pm_select_internal_32k_rc(void)
+{
+	cpu_sleep_wakeup 	 	= cpu_sleep_wakeup_32k_rc;
+	pm_tim_recover  	 	= pm_tim_recover_32k_rc;
+}
+
+/**
+ * @brief      This function serves to determine whether wake up source is external 32k RC.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pm_select_external_32k_crystal(void)
+{
+	cpu_sleep_wakeup 	 	= cpu_sleep_wakeup_32k_xtal;
+	pm_tim_recover		 	= pm_tim_recover_32k_xtal;
+}
+
+/**********************************  Internal APIs (not for user)***************************************************/
+extern  unsigned char 		    tl_multi_addr;
+extern  unsigned char 		    tl_24mrc_cal;
+extern 	unsigned short 			tick_32k_calib;
+extern  unsigned int 			tick_cur;
+extern  unsigned int 			tick_32k_cur;
+extern  unsigned char       	pm_long_suspend;
+
+void sleep_start(void);
+
+unsigned int  pm_get_info0(void);
+
+unsigned int  pm_get_info1(void);
+
+unsigned int cpu_get_32k_tick(void);
+
+void soft_reboot_dly13ms_use24mRC(void);
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pwm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pwm.h
new file mode 100644
index 00000000..e0ee9903
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/pwm.h
@@ -0,0 +1,419 @@
+/********************************************************************************************************
+ * @file    pwm.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef PWM_H_
+#define PWM_H_
+
+#include "register.h"
+#include "bit.h"
+#include "timer.h"
+
+/**
+ * @brief  enum variable, the number of PWM channels supported
+ */
+
+typedef enum {
+	PWM0_ID = 0,
+	PWM1_ID,
+	PWM2_ID,
+	PWM3_ID,
+	PWM4_ID,
+	PWM5_ID,
+}pwm_id;
+
+/**
+ * @brief  enum variable used for PWM work mode setting
+ */
+typedef enum{
+	PWM_NORMAL_MODE   = 0x00,
+	PWM_COUNT_MODE    = 0x01,
+	PWM_IR_MODE       = 0x03,
+	PWM_IR_FIFO_MODE  = 0x07,
+	PWM_IR_DMA_FIFO_MODE  = 0x0F,
+}pwm_mode;
+
+/**
+ * pwm interrupt source
+ */
+typedef enum{
+	PWM_IRQ_PWM0_PNUM =					BIT(0),
+	PWM_IRQ_PWM0_IR_DMA_FIFO_DONE =		BIT(1),
+	PWM_IRQ_PWM0_FRAME =				BIT(2),
+	PWM_IRQ_PWM1_FRAME =				BIT(3),
+	PWM_IRQ_PWM2_FRAME =				BIT(4),
+	PWM_IRQ_PWM3_FRAME =				BIT(5),
+	PWM_IRQ_PWM4_FRAME =				BIT(6),
+	PWM_IRQ_PWM5_FRAME =				BIT(7),
+
+	PWM_IRQ_PWM0_IR_FIFO =              BIT(16)
+}PWM_IRQ;
+
+typedef enum{
+	PWM0_PULSE_NORMAL =		0,       // duty cycle and period from TCMP0/TMAX0 					 0x794~0x797
+	PWM0_PULSE_SHADOW =		BIT(14), // duty cycle and period from TCMP0_SHADOW / TMAX0_SHADOW   0x7c4~0x7c7
+}Pwm0Pulse_SelectDef;
+
+
+/**
+ * @brief     This fuction servers to set pwm mode.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] mode - variable of enum to indicates the pwm mode.
+ * @return	  none.
+ */
+static inline void pwm_set_mode(pwm_id id, pwm_mode mode){
+	if(PWM0_ID == id){
+		reg_pwm0_mode = mode;  //only PWM0 has count/IR/fifo IR mode
+	}
+}
+
+
+/**
+ * @brief     This fuction servers to set pwm clock frequency
+ * @param[in] system_clock_hz - variable to set system clock hz.
+ * @param[in] pwm_clk - variable of the pwm clock.
+ * @return	  none.
+ */
+static inline void pwm_set_clk(int system_clock_hz, int pwm_clk){
+	reg_pwm_clk = (int)system_clock_hz /pwm_clk - 1;
+}
+
+/**
+ * @brief     This fuction servers to set pwm count status(CMP) time.
+ * @param[in] pwm_id  - variable of enum to select the pwm number.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_cmp(pwm_id id, unsigned short cmp_tick)
+{
+	reg_pwm_cmp(id) = cmp_tick;
+}
+
+/**
+ * @brief     This fuction servers to set pwm cycle time.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @return	  none.
+ */
+static inline void pwm_set_cycle(pwm_id id, unsigned short cycle_tick){
+	reg_pwm_max(id) = cycle_tick;
+}
+
+/**
+ * @brief     This fuction servers to set pwm cycle time & count status.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_cycle_and_duty(pwm_id id, unsigned short cycle_tick, unsigned short cmp_tick){
+	reg_pwm_cycle(id) = MASK_VAL(FLD_PWM_CMP, cmp_tick, FLD_PWM_MAX, cycle_tick);
+}
+
+
+/**
+ * @brief     This fuction servers to set pwm cycle time & count status.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_pwm0_shadow_cycle_and_duty(unsigned short cycle_tick, unsigned short cmp_tick)
+{
+	reg_pwm_tcmp0_shadow = cmp_tick;
+	reg_pwm_tmax0_shadow = cycle_tick;
+}
+
+
+/**
+ * @brief     This fuction servers to set the pwm phase.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] phase - variable of the pwm phase.
+ * @return	  none.
+ */
+static inline void pwm_set_phase(pwm_id id, unsigned short phase){
+	//PWM phase can not set in 825x now,  do nothing here
+}
+
+/**
+ * @brief     This fuction servers to set the pwm pulse number.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] pulse_num - variable of the pwm pulse number.
+ * @return	  none.
+ */
+static inline void pwm_set_pulse_num(pwm_id id, unsigned short pulse_num){
+	if(PWM0_ID == id){
+		reg_pwm0_pulse_num = pulse_num;
+	}
+
+}
+
+/**
+ * @brief     This fuction servers to start the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_start(pwm_id id)
+{
+
+	if(PWM0_ID == id)
+	{
+		BM_SET(reg_pwm0_enable, BIT(0));
+	}
+	else{
+		BM_SET(reg_pwm_enable, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to stop the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_stop(pwm_id id)
+{
+	if(PWM0_ID == id)
+	{
+		BM_CLR(reg_pwm0_enable, BIT(0));
+	}
+	else{
+		BM_CLR(reg_pwm_enable, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to revert the PWMx.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_revert(pwm_id id)
+{
+	reg_pwm_invert |= BIT(id);
+}
+
+/**
+ * @brief     This fuction servers to revert the PWMx_N.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_n_revert(pwm_id id)
+{
+	reg_pwm_n_invert |= BIT(id);
+}
+
+/**
+ * @brief     This fuction servers to enable the pwm polarity.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] en: 1 enable. 0 disable.
+ * @return	  none.
+ */
+static inline void pwm_polo_enable(pwm_id id, int en)
+{
+	if(en){
+		BM_SET(reg_pwm_pol, BIT(id));
+	}else{
+		BM_CLR(reg_pwm_pol, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to mask the pwm interrupt.
+ * @param[in] irq - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_set_interrupt_enable(PWM_IRQ irq){
+	if(irq == PWM_IRQ_PWM0_IR_FIFO){
+		BM_SET(reg_pwm0_fifo_mode_irq_mask,BIT(0));
+	}else{
+	    BM_SET(reg_pwm_irq_mask, irq);
+	}
+}
+
+/**
+ * @brief     This fuction servers to clear the pwm mask.
+ * @param[in] irq  - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_set_interrupt_disable(PWM_IRQ irq){
+    if(irq == PWM_IRQ_PWM0_IR_FIFO){
+		BM_CLR(reg_pwm0_fifo_mode_irq_mask,BIT(0));
+	}else{
+		BM_CLR(reg_pwm_irq_mask, irq);
+	}
+ }
+
+
+/**
+ * @brief     This fuction servers to clear the pwm interrupt status.
+ * @param[in] irq  - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_clear_interrupt_status(PWM_IRQ status)
+{
+	if(status == PWM_IRQ_PWM0_IR_FIFO){
+		reg_pwm0_fifo_mode_irq_sta = BIT(0);
+	}else{
+		reg_pwm_irq_sta = status;
+	}
+}
+
+/**
+ * @brief     This fuction serves to set trigger level of interrupt for IR FiFo mode
+ * @param[in] trig_level - FIFO  num int trigger level
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_set_irq_trig_level(unsigned char trig_level)
+{
+	reg_pwm_ir_fifo_irq_trig_level = trig_level;
+}
+
+/**
+ * @brief     This fuction serves to clear data in fifo. Only when pwm is in not active mode,
+ * 			  it is possible to clear data in fifo.
+ * @param[in] none
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_clr_data(void)
+{
+	reg_pwm_ir_clr_fifo_data |= FLD_PWM0_IR_FIFO_CLR_DATA;
+}
+
+/**
+ * @brief     This fuction serves to get the number of data in fifo.
+ * @param[in] none
+ * @return	  the number of data in fifo
+ */
+static inline unsigned char pwm_ir_fifo_get_data_num(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_DATA_NUM);
+}
+
+/**
+ * @brief     This fuction serves to determine whether data in fifo is empty.
+ * @param[in] none
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_empty(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_EMPTY);
+}
+
+/**
+ * @brief     This fuction serves to determine whether data in fifo is full.
+ * @param[in] none
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_full(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_FULL);
+}
+
+/**
+ * @brief     This fuction serves to write data into FiFo
+ * @param[in] pulse_num  - the number of pulse
+ * @param[in] use_shadow - determine whether the configuration of shadow cmp and shadow max is used
+ * 						   1: use shadow, 0: not use
+ * @param[in] carrier_en - enable sending carrier, 1: enable, 0: disable
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_set_data_entry(unsigned short pulse_num, unsigned char use_shadow, unsigned char carrier_en)
+{
+	static unsigned char index=0;
+	unsigned short cfg_data = pulse_num + ((use_shadow&BIT(0))<<14) + ((carrier_en&BIT(0))<<15);
+	while(pwm_ir_fifo_is_full());
+	reg_pwm_ir_fifo_dat(index) = cfg_data;
+	index++;
+	index&=0x01;
+}
+
+/**
+ * @brief     This fuction serves to config the pwm's dma wave form.
+ * @param[in] carrier_en - must 1 or 0.
+ * @param[in] pulse_type - type of pwm0's pulse.
+ * @param[in] pulse_num - the number of pulse.
+ * @return	  none.
+ */
+static inline unsigned short pwm_config_dma_fifo_waveform(int carrier_en, Pwm0Pulse_SelectDef pulse_type,  unsigned short pulse_num)
+{
+	return  ( carrier_en<<15 | pulse_type | (pulse_num & 0x3fff) );
+}
+
+/**
+ * @brief     This fuction servers to set the pwm's dma address.
+ * @param[in] pdat - variable of pointer to indicate the address.
+ * @return	  none.
+ * @note	  The maximum length that the PWM can send is 511bytes
+ */
+static inline void pwm_set_dma_address(void * pdat)
+{
+	reg_dma_pwm_addr = (unsigned short)((unsigned int)pdat);
+	reg_dma7_addrHi = 0x04;
+	reg_dma_pwm_mode  &= ~FLD_DMA_WR_MEM;
+	//In the PWM ir_dma_fifo model, the reg_dma7_size default is 0x14(20*16 = 320 bytes) (160 group configuration),
+	//when the pwm_dma send byte length is greater than 320 bytes, can appear abnormal,
+    //abnormal phenomenon: when after sending the first 160 group configuration waveform,
+	//waveform will send 160th group configuration, and not interrupt,
+	//so set reg_dma7_size to the maximum, it has been guaranteed that the maximum length supported by the hardware (511bytes) can be sent.
+	//The maximum length that dma hardware can send is limited to the setting range of the first four bytes in ram (the actual length of dma sent)
+	reg_dma7_size = 0xff;    
+}
+
+/**
+ * @brief     This fuction servers to start the pwm's IRQ sending.
+ * @param[in] none.
+ * @return	  none.
+ */
+static inline void pwm_start_dma_ir_sending(void)
+{
+	reg_dma_chn_en |= FLD_DMA_CHN_PWM;
+	reg_dma_tx_rdy0 |= FLD_DMA_CHN_PWM;
+}
+
+/**
+ * @brief     This fuction servers to stop the pwm's IRQ sending.
+ * @param[in] none.
+ * @return	  none.
+ */
+static inline void pwm_stop_dma_ir_sending(void)
+{
+	reg_rst0 = FLD_RST0_PWM;
+	sleep_us(20);  //1us <-> 4 byte
+	reg_rst0 = 0;
+}
+
+/**
+ * @brief     This fuction servers to get the pwm interrupt status.
+ * @param[in] status - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline unsigned char pwm_get_interrupt_status(PWM_IRQ status){
+
+	if(status == PWM_IRQ_PWM0_IR_FIFO){
+		return (reg_pwm0_fifo_mode_irq_sta & BIT(0));
+	}else{
+		return (reg_pwm_irq_sta & status);
+	}
+
+}
+
+#endif /* PWM_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/random.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/random.h
new file mode 100644
index 00000000..5c7c9021
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/random.h
@@ -0,0 +1,44 @@
+/********************************************************************************************************
+ * @file    random.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+/**
+ * @brief     This function performs to initials random generator post.
+ * @param[in] none.
+ * @return    none.
+ */
+void random_generator_init(void);
+
+/**
+ * @brief     This function performs to get one random number
+ * @param[in] none.
+ * @return    the value of one random number.
+ */
+unsigned int rand(void);
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/register.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/register.h
new file mode 100644
index 00000000..6455c29a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/register.h
@@ -0,0 +1,1335 @@
+/********************************************************************************************************
+ * @file    register.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "bsp.h"
+
+/********************************************************************************************
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ *****|								Digital  Register Table  						   |*****
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ ********************************************************************************************/
+
+/*******************************      i2c registers: 0x00      ******************************/
+#define reg_i2c_set				REG_ADDR32(0x00)
+#define reg_i2c_speed			REG_ADDR8(0x00)
+#define reg_i2c_id				REG_ADDR8(0x01)
+enum{
+	FLD_I2C_WRITE_READ_BIT  =  BIT(0),
+	FLD_I2C_ID              =  BIT_RNG(1,7),
+};
+
+#define reg_i2c_status			REG_ADDR8(0x02)
+enum{
+	FLD_I2C_CMD_BUSY		= 	BIT(0),
+	FLD_I2C_BUS_BUSY		= 	BIT(1),
+	FLD_I2C_NAK				= 	BIT(2),
+};
+
+#define reg_i2c_mode			REG_ADDR8(0x03)
+enum{
+	FLD_I2C_ADDR_AUTO_ADD 		=	BIT(0),
+	FLD_I2C_MASTER_EN			= 	BIT(1),      // 1: master, 0: slave
+	FLD_I2C_SLAVE_MAPPING 		=	BIT(2),      // write i2c data to predefined memory address which set by other register
+	FLD_I2C_HOLD_MASTER     	=   BIT(3),
+};
+
+#define reg_i2c_adr_dat			REG_ADDR16(0x04)
+#define reg_i2c_dat_ctrl		REG_ADDR32(0x04)
+#define reg_i2c_di_ctrl			REG_ADDR16(0x06)
+#define reg_i2c_adr				REG_ADDR8(0x04)
+#define reg_i2c_do				REG_ADDR8(0x05)
+#define reg_i2c_di				REG_ADDR8(0x06)
+#define reg_i2c_ctrl			REG_ADDR8(0x07)
+enum{
+	FLD_I2C_CMD_ID			= 		BIT(0),
+	FLD_I2C_CMD_ADDR		= 		BIT(1),
+	FLD_I2C_CMD_DO			= 		BIT(2),
+	FLD_I2C_CMD_DI			= 		BIT(3),
+	FLD_I2C_CMD_START		= 		BIT(4),
+	FLD_I2C_CMD_STOP		= 		BIT(5),
+	FLD_I2C_CMD_READ_ID		= 		BIT(6),
+	FLD_I2C_CMD_ACK			= 		BIT(7),
+};
+/*******************************  i2c address map registers: 0xe0      ******************************/
+#define reg_i2c_map_hadr		 	 REG_ADDR8(0xe0)
+
+#define reg_i2c_slave_map_addrl      REG_ADDR8(0xe1)
+#define reg_i2c_slave_map_addrm      REG_ADDR8(0xe2)
+#define reg_i2c_slave_map_addrh      REG_ADDR8(0xe3)
+
+#define reg_i2c_slave_irq_status 	 REG_ADDR8(0xe4)
+#define reg_spi_slave_irq_status 	 REG_ADDR8(0xe4)
+#define reg_i2c_map_host_status      REG_ADDR8(0xe4)
+enum{
+	FLD_HOST_CMD_IRQ  = 	BIT(0),  FLD_SLAVE_SPI_IRQ = FLD_HOST_CMD_IRQ,  //both host write & read trigger this status
+	FLD_HOST_READ_IRQ = 	BIT(1),                                        //only host read trigger this status
+};
+
+#define reg_i2c_map_read0		     REG_ADDR8(0xe5)
+#define reg_i2c_map_read1		     REG_ADDR8(0xe6)
+#define reg_i2c_map_read2		     REG_ADDR8(0xe7)
+
+/*******************************      spi registers: 0x08      ******************************/
+
+#define reg_spi_data			REG_ADDR8(0x08)
+#define reg_spi_ctrl			REG_ADDR8(0x09)
+enum{
+	FLD_SPI_CS 					= BIT(0),
+	FLD_SPI_MASTER_MODE_EN 		= BIT(1),
+	FLD_SPI_DATA_OUT_DIS 		= BIT(2),
+	FLD_SPI_RD			    	= BIT(3),
+	FLD_SPI_ADDR_AUTO_ADD  	 	= BIT(4),
+	FLD_SPI_SHARE_MODE      	= BIT(5),
+	FLD_SPI_BUSY         		= BIT(6),    // diff from doc,  bit 6 working
+};
+#define reg_spi_sp				REG_ADDR8(0x0a)
+enum{
+	FLD_MSPI_CLK = 		BIT_RNG(0,6),
+	FLD_SPI_ENABLE =			BIT(7),
+};
+
+#define reg_spi_inv_clk			REG_ADDR8(0x0b)   //spi supports four modes
+enum {
+    FLD_SPI_MODE_WORK_MODE = BIT_RNG(0,1),
+};
+
+/*******************************      mspi registers: 0x0c      ******************************/
+
+#define reg_mspi_data		REG_ADDR8(0x0c)
+#define reg_mspi_ctrl		REG_ADDR8(0x0d)
+
+enum{
+	FLD_MSPI_CS 	= 		BIT(0),
+	FLD_MSPI_SDO 	= 		BIT(1),
+	FLD_MSPI_CONT 	= 		BIT(2),
+	FLD_MSPI_RD 	= 		BIT(3),
+	FLD_MSPI_BUSY 	= 		BIT(4),
+};
+
+#define reg_mspi_mode      		REG_ADDR8(0x0f)
+enum
+{
+	FLD_MSPI_DUAL_DATA_MODE_EN  = BIT(0),
+	FLD_MSPI_DUAL_ADDR_MODE_EN  = BIT(1),
+	FLD_MSPI_CLK_DIV     	 	= BIT_RNG(2,7),
+};
+
+/*******************************      reset registers: 0x60      ******************************/
+
+#define reg_rst0				REG_ADDR8(0x60)
+enum{
+	FLD_RST0_SPI = 				BIT(0),
+	FLD_RST0_I2C = 				BIT(1),
+	FLD_RST0_UART = 			BIT(2),
+	FLD_RST0_USB = 				BIT(3),
+	FLD_RST0_PWM = 				BIT(4),
+	FLD_RST0_QDEC =				BIT(5),
+	FLD_RST0_SWIRE = 			BIT(7),
+};
+
+#define reg_rst1				REG_ADDR8(0x61)
+enum{
+	FLD_RST1_ZB = 				BIT(0),
+	FLD_RST1_SYS_TIMER = 		BIT(1),
+	FLD_RST1_DMA =				BIT(2),
+	FLD_RST1_ALGM = 			BIT(3),
+	FLD_RST1_AES = 				BIT(4),
+	FLD_RST1_ADC = 				BIT(5),
+	FLD_RST1_ALG =				BIT(6),
+};
+
+#define reg_rst2				REG_ADDR8(0x62)
+enum{
+	FLD_RST2_AIF =				BIT(0),
+	FLD_RST2_AUD =				BIT(1),
+	FLD_RST2_DFIFO =			BIT(2),
+	FLD_RST2_RISC =				BIT(4),
+	FLD_RST2_MCIC = 			BIT(5),
+	FLD_RST2_RISC1 =			BIT(6),
+	FLD_RST2_MCIC1 = 			BIT(7),
+};
+
+
+#define reg_clk_en0				REG_ADDR8(0x63)
+enum{
+	FLD_CLK0_SPI_EN = 			BIT(0),
+	FLD_CLK0_I2C_EN = 			BIT(1),
+	FLD_CLK0_UART_EN = 		BIT(2),
+	FLD_CLK0_USB_EN = 			BIT(3),
+	FLD_CLK0_PWM_EN = 			BIT(4),
+	FLD_CLK0_QDEC_EN = 			BIT(5),
+	FLD_CLK0_SWIRE_EN = 		BIT(7),
+};
+
+#define reg_clk_en1				REG_ADDR8(0x64)
+enum{
+	FLD_CLK1_ZB_EN = 			BIT(0),
+	FLD_CLK1_SYS_TIMER_EN = 	BIT(1),
+	FLD_CLK1_DMA_EN = 			BIT(2),
+	FLD_CLK1_ALGM_EN = 			BIT(3),
+	FLD_CLK1_AES_EN = 			BIT(4),
+
+};
+
+
+#define reg_clk_en2				REG_ADDR8(0x65)
+enum{
+	FLD_CLK2_AIF_EN = 			BIT(0),
+	FLD_CLK2_AUD_EN = 			BIT(1),
+	FLD_CLK2_DFIFO_EN = 		BIT(2),
+	FLD_CLK2_MC_EN = 			BIT(4),
+	FLD_CLK2_MCIC_EN = 			BIT(5),
+};
+
+
+#define reg_clk_sel				REG_ADDR8(0x66)
+enum{
+	FLD_SCLK_DIV = 				BIT_RNG(0,4),
+	FLD_SCLK_SEL =				BIT_RNG(5,6),
+	FLD_SCLK_HS_SEL =			BIT(7),
+};
+
+#define reg_i2s_step			REG_ADDR8(0x67)
+enum{
+	FLD_I2S_STEP = 				BIT_RNG(0,6),
+	FLD_I2S_CLK_EN =			BIT(7),
+};
+
+#define reg_i2s_mod				REG_ADDR8(0x68)
+
+
+#define reg_dmic_step			REG_ADDR8(0x6c)
+enum{
+	FLD_DMIC_STEP = 			BIT_RNG(0,6),
+	FLD_DMIC_CLK_EN =			BIT(7),
+};
+
+#define reg_dmic_mod			REG_ADDR8(0x6d)
+
+
+#define reg_wakeup_en			REG_ADDR8(0x6e)
+enum{
+	FLD_WAKEUP_SRC_I2C = 		BIT(0),
+	FLD_WAKEUP_SRC_SPI =		BIT(1),
+	FLD_WAKEUP_SRC_USB =		BIT(2),
+	FLD_WAKEUP_SRC_GPIO =		BIT(3),
+	FLD_WAKEUP_SRC_I2C_SYN =	BIT(4),
+	FLD_WAKEUP_SRC_GPIO_RM =	BIT(5),
+	FLD_WAKEUP_SRC_USB_RESM =	BIT(6),
+	FLD_WAKEUP_SRC_RST_SYS =	BIT(7),
+};
+
+#define reg_pwdn_ctrl			REG_ADDR8(0x6f)
+enum
+{
+	FLD_PWDN_CTRL_REBOOT = BIT(5),
+	FLD_PWDN_CTRL_SLEEP  = BIT(7),
+};
+
+
+#define reg_mcu_wakeup_mask		REG_ADDR32(0x78)
+
+/*******************************      7816 registers: 0x7b      ******************************/
+
+#define reg_7816_clk_div		REG_ADDR8(0x7b)
+
+/*******************************      uart registers: 0x90      ******************************/
+
+#define reg_uart_data_buf0		REG_ADDR8(0x90)
+#define reg_uart_data_buf1		REG_ADDR8(0x91)
+#define reg_uart_data_buf2		REG_ADDR8(0x92)
+#define reg_uart_data_buf3		REG_ADDR8(0x93)
+
+#define reg_uart_data_buf(i)    REG_ADDR8(0x90 + (i))  //i = 0~3
+#define reg_uart_clk_div		REG_ADDR16(0x94)
+enum{
+	FLD_UART_CLK_DIV = 			BIT_RNG(0,14),
+	FLD_UART_CLK_DIV_EN = 		BIT(15)
+};
+
+#define reg_uart_ctrl0			REG_ADDR8(0x96)
+enum{
+	FLD_UART_BPWC = 			BIT_RNG(0,3),
+	FLD_UART_RX_DMA_EN = 		BIT(4),
+	FLD_UART_TX_DMA_EN =		BIT(5),
+	FLD_UART_RX_IRQ_EN = 		BIT(6),
+	FLD_UART_TX_IRQ_EN =		BIT(7),
+};
+
+#define reg_uart_ctrl1         		REG_ADDR8(0x97)
+enum {
+    FLD_UART_CTRL1_CTS_SELECT	   = BIT(0),
+    FLD_UART_CTRL1_CTS_EN 		   = BIT(1),
+    FLD_UART_CTRL1_PARITY_EN 	   = BIT(2),
+    FLD_UART_CTRL1_PARITY_POLARITY = BIT(3),       //1:odd parity   0:even parity
+    FLD_UART_CTRL1_STOP_BIT 	   = BIT_RNG(4,5),
+    FLD_UART_CTRL1_TTL 			   = BIT(6),
+    FLD_UART_CTRL1_LOOPBACK 	   = BIT(7),
+};
+
+#define reg_uart_ctrl2			REG_ADDR16(0x98)
+enum {
+    FLD_UART_CTRL2_RTS_TRIG_LVL   	 = BIT_RNG(0,3),
+    FLD_UART_CTRL2_RTS_PARITY 		 = BIT(4),
+    FLD_UART_CTRL2_RTS_MANUAL_VAL 	 = BIT(5),
+    FLD_UART_CTRL2_RTS_MANUAL_EN 	 = BIT(6),
+    FLD_UART_CTRL2_RTS_EN 			 = BIT(7),
+	FLD_UART_CTRL3_RX_IRQ_TRIG_LEVEL = BIT_RNG(8,11),
+	FLD_UART_CTRL3_TX_IRQ_TRIG_LEVEL = BIT_RNG(12,15),
+};
+
+
+#define reg_uart_ctrl3        	REG_ADDR8(0x99)
+enum {
+	FLD_UART_RX_IRQ_TRIG_LEV = BIT_RNG(0,3),
+	FLD_UART_TX_IRQ_TRIG_LEV = BIT_RNG(4,7),
+};
+
+#define reg_uart_rx_timeout0	REG_ADDR8(0x9a)
+enum{
+	FLD_UART_TIMEOUT_BW		 = 	BIT_RNG(0,7),
+};
+
+#define reg_uart_rx_timeout1    REG_ADDR8(0x9b)
+enum{
+	FLD_UART_TIMEOUT_MUL	 = 	BIT_RNG(0,1),
+	FLD_UART_P7816_EN	 	 =  BIT(5),
+	FLD_UART_MASK_TXDONE_IRQ =  BIT(6),
+	FLD_UART_MASK_ERR_IRQ 	 =  BIT(7),
+};
+
+
+#define reg_uart_buf_cnt       REG_ADDR8(0x9c)
+
+enum{
+	FLD_UART_RX_BUF_CNT		=  BIT_RNG(0,3),
+	FLD_UART_TX_BUF_CNT		=  BIT_RNG(4,7),
+};
+
+#define reg_uart_status0       REG_ADDR8(0x9d)
+enum{
+	FLD_UART_RBCNT 	     	=  BIT_RNG(0,2),
+	FLD_UART_IRQ_FLAG    	=  BIT(3),
+	FLD_UART_WBCNT 	     	=  BIT_RNG(4,6),
+	FLD_UART_CLEAR_RX_FLAG 	=  BIT(6),
+	FLD_UART_RX_ERR_FLAG 	=  BIT(7),
+};
+
+#define reg_uart_status1       REG_ADDR8(0x9e)
+enum{
+	FLD_UART_TX_DONE   	  =  BIT(0),
+	FLD_UART_TX_BUF_IRQ   =  BIT(1),
+	FLD_UART_RX_DONE   	  =  BIT(2),
+	FLD_UART_RX_BUF_IRQ   =  BIT(3),
+};
+
+
+#define reg_uart_state       REG_ADDR8(0x9f)
+enum{
+	FLD_UART_TSTATE_I 	     =  BIT_RNG(0,2),
+	FLD_UART_RSTATE_I	     =  BIT_RNG(4,7),
+};
+
+
+/*******************************      swire registers: 0xb0      ******************************/
+
+#define reg_swire_data			REG_ADDR8(0xb0)
+#define reg_swire_ctrl1			REG_ADDR8(0xb1)
+enum{
+	FLD_SWIRE_WR  = 			BIT(0),
+	FLD_SWIRE_RD  = 			BIT(1),
+	FLD_SWIRE_CMD =				BIT(2),
+	FLD_SWIRE_USB_DET =			BIT(6),
+	FLD_SWIRE_USB_EN =			BIT(7),
+};
+
+#define reg_swire_clk_div		REG_ADDR8(0xb2)
+
+enum
+{
+	FLD_SWIRE_CLK_DIV = BIT_RNG(0,6),
+};
+
+#define reg_swire_id      		REG_ADDR8(0xb3)
+
+enum
+{
+	FLD_SWIRE_ID_SLAVE_ID      = BIT_RNG(0,6),
+	FLD_SWIRE_ID_SLAVE_FIFO_EN = BIT(7),
+};
+
+/*******************************      analog control registers: 0xb8      ******************************/
+
+#define reg_ana_ctrl32			REG_ADDR32(0xb8)
+#define reg_ana_addr_data		REG_ADDR16(0xb8)
+#define reg_ana_addr			REG_ADDR8(0xb8)
+#define reg_ana_data			REG_ADDR8(0xb9)
+#define reg_ana_ctrl			REG_ADDR8(0xba)
+
+enum{
+	FLD_ANA_BUSY  = 				BIT(0),
+	FLD_ANA_LS_CON	=				BIT(4),
+	FLD_ANA_RW  = 					BIT(5),
+	FLD_ANA_CYC0  = 				BIT(6),
+};
+
+
+/*******************************      usb registers: 0x100      ******************************/
+
+#define reg_ctrl_ep_ptr			REG_ADDR8(0x100)
+#define reg_ctrl_ep_dat			REG_ADDR8(0x101)
+#define reg_ctrl_ep_ctrl		REG_ADDR8(0x102)
+
+enum{
+	FLD_EP_DAT_ACK  = 			BIT(0),
+	FLD_EP_DAT_STALL =			BIT(1),
+	FLD_EP_STA_ACK = 			BIT(2),
+	FLD_EP_STA_STALL = 			BIT(3),
+};
+
+#define reg_ctrl_ep_irq_sta		REG_ADDR8(0x103)
+enum{
+	FLD_CTRL_EP_IRQ_TRANS  = 	BIT_RNG(0,3),
+	FLD_CTRL_EP_IRQ_SETUP  =	BIT(4),
+	FLD_CTRL_EP_IRQ_DATA  =		BIT(5),
+	FLD_CTRL_EP_IRQ_STA  = 		BIT(6),
+	FLD_CTRL_EP_IRQ_INTF  = 	BIT(7),
+};
+
+#define reg_ctrl_ep_irq_mode	REG_ADDR8(0x104)
+enum{
+	FLD_CTRL_EP_AUTO_ADDR = 	BIT(0),
+	FLD_CTRL_EP_AUTO_CFG =		BIT(1),
+	FLD_CTRL_EP_AUTO_INTF =		BIT(2),
+	FLD_CTRL_EP_AUTO_STA =		BIT(3),
+	FLD_CTRL_EP_AUTO_SYN =		BIT(4),
+	FLD_CTRL_EP_AUTO_DESC =		BIT(5),
+	FLD_CTRL_EP_AUTO_FEAT =		BIT(6),
+	FLD_CTRL_EP_AUTO_STD =		BIT(7),
+};
+
+#define reg_usb_ctrl			REG_ADDR8(0x105)
+enum{
+	FLD_USB_CTRL_AUTO_CLK = 	BIT(0),
+	FLD_USB_CTRL_LOW_SPD = 		BIT(1),
+	FLD_USB_CTRL_LOW_JITT =		BIT(2),
+	FLD_USB_CTRL_TST_MODE = 	BIT(3),
+};
+
+#define reg_usb_cyc_cali		REG_ADDR16(0x106)
+#define reg_usb_mdev			REG_ADDR8(0x10a)
+#define reg_usb_host_conn		REG_ADDR8(0x10b)
+enum{
+	FLD_USB_MDEV_SELF_PWR = 	BIT(0),
+	FLD_USB_MDEV_SUSP_STA = 	BIT(1),
+};
+
+#define reg_usb_sups_cyc_cali	REG_ADDR8(0x10c)
+#define reg_usb_intf_alt		REG_ADDR8(0x10d)
+
+#define reg_usb_ep8123_ptr		REG_ADDR32(0x110)
+#define reg_usb_ep8_ptr			REG_ADDR8(0x110)
+#define reg_usb_ep1_ptr			REG_ADDR8(0x111)
+#define reg_usb_ep2_ptr			REG_ADDR8(0x112)
+#define reg_usb_ep3_ptr			REG_ADDR8(0x113)
+#define reg_usb_ep4567_ptr		REG_ADDR32(0x114)
+#define reg_usb_ep4_ptr			REG_ADDR8(0x114)
+#define reg_usb_ep5_ptr			REG_ADDR8(0x115)
+#define reg_usb_ep6_ptr			REG_ADDR8(0x116)
+#define reg_usb_ep7_ptr			REG_ADDR8(0x117)
+#define reg_usb_ep_ptr(i)		REG_ADDR8(0x110+((i) & 0x07))
+
+#define reg_usb_ep8123_dat		REG_ADDR32(0x118)
+#define reg_usb_ep8_dat			REG_ADDR8(0x118)
+#define reg_usb_ep1_dat			REG_ADDR8(0x119)
+#define reg_usb_ep2_dat			REG_ADDR8(0x11a)
+#define reg_usb_ep3_dat			REG_ADDR8(0x11b)
+#define reg_usb_ep4567_dat		REG_ADDR32(0x11c)
+#define reg_usb_ep4_dat			REG_ADDR8(0x11c)
+#define reg_usb_ep5_dat			REG_ADDR8(0x11d)
+#define reg_usb_ep6_dat			REG_ADDR8(0x11e)
+#define reg_usb_ep7_dat			REG_ADDR8(0x11f)
+#define reg_usb_ep_dat(i)		REG_ADDR8(0x118+((i) & 0x07))
+#define reg_usb_mic_dat0		REG_ADDR16(0x1800)
+#define reg_usb_mic_dat1		REG_ADDR16(0x1802)
+
+#define reg_usb_ep8_ctrl		REG_ADDR8(0x120)
+#define reg_usb_ep1_ctrl		REG_ADDR8(0x121)
+#define reg_usb_ep2_ctrl		REG_ADDR8(0x122)
+#define reg_usb_ep3_ctrl		REG_ADDR8(0x123)
+#define reg_usb_ep4_ctrl		REG_ADDR8(0x124)
+#define reg_usb_ep5_ctrl		REG_ADDR8(0x125)
+#define reg_usb_ep6_ctrl		REG_ADDR8(0x126)
+#define reg_usb_ep7_ctrl		REG_ADDR8(0x127)
+#define reg_usb_ep_ctrl(i)		REG_ADDR8(0x120+((i) & 0x07))
+
+enum{
+	FLD_USB_EP_BUSY = 			BIT(0),
+	FLD_USB_EP_STALL =			BIT(1),
+	FLD_USB_EP_DAT0 =			BIT(2),
+	FLD_USB_EP_DAT1 =			BIT(3),
+	FLD_USB_EP_MONO =			BIT(6),
+	FLD_USB_EP_EOF_ISO =		BIT(7),
+};
+
+#define reg_usb_ep8123_buf_addr	REG_ADDR32(0x128)
+#define reg_usb_ep8_buf_addr	REG_ADDR8(0x128)
+#define reg_usb_ep1_buf_addr	REG_ADDR8(0x129)
+#define reg_usb_ep2_buf_addr	REG_ADDR8(0x12a)
+#define reg_usb_ep3_buf_addr	REG_ADDR8(0x12b)
+#define reg_usb_ep4567_buf_addr	REG_ADDR32(0x12c)
+#define reg_usb_ep4_buf_addr	REG_ADDR8(0x12c)
+#define reg_usb_ep5_buf_addr	REG_ADDR8(0x12d)
+#define reg_usb_ep6_buf_addr	REG_ADDR8(0x12e)
+#define reg_usb_ep7_buf_addr	REG_ADDR8(0x12f)
+#define reg_usb_ep_buf_addr(i)	REG_ADDR8(0x128+((i) & 0x07))
+
+#define reg_usb_ram_ctrl		REG_ADDR8(0x130)
+enum{
+	FLD_USB_CEN_PWR_DN =		BIT(0),
+	FLD_USB_CLK_PWR_DN =		BIT(1),
+	FLD_USB_WEN_PWR_DN =		BIT(3),
+	FLD_USB_CEN_FUNC =			BIT(4),
+};
+
+#define reg_usb_iso_mode		REG_ADDR8(0x138)
+#define reg_usb_irq				REG_ADDR8(0x139)
+#define reg_usb_mask			REG_ADDR8(0x13a)
+enum{
+	FLD_USB_EDP8_IRQ 		= 	BIT(0),
+	FLD_USB_EDP1_IRQ 		= 	BIT(1),
+	FLD_USB_EDP2_IRQ 		= 	BIT(2),
+	FLD_USB_EDP3_IRQ 		= 	BIT(3),
+	FLD_USB_EDP4_IRQ 		= 	BIT(4),
+	FLD_USB_EDP5_IRQ 		= 	BIT(5),
+	FLD_USB_EDP6_IRQ 		= 	BIT(6),
+	FLD_USB_EDP7_IRQ 		= 	BIT(7),
+};
+#define reg_usb_ep8_send_max	REG_ADDR8(0x13b)
+#define reg_usb_ep8_send_thre	REG_ADDR8(0x13c)
+#define reg_usb_ep8_fifo_mode	REG_ADDR8(0x13d)
+#define reg_usb_ep_max_size		REG_ADDR8(0x13e)
+
+enum{
+	FLD_USB_ENP8_FIFO_MODE =	BIT(0),
+	FLD_USB_ENP8_FULL_FLAG =	BIT(1),
+};
+
+#define reg_rf_acc_len			REG_ADDR8(0x405)
+enum{
+	FLD_RF_ACC_LEN	    = 		BIT_RNG(0,2),
+	FLD_RF_LR_MAN_EN	=       BIT(3),   //long range manual enable
+	FLD_RF_LR_TX_SEL	=   	BIT(4),
+	FLD_RF_BLE_LR		=   	BIT(5),
+	FLD_RF_LR_ACC_TRIG	=   	BIT(7),
+};
+
+
+#define reg_rf_timestamp		REG_ADDR32(0x450)
+
+
+/*******************************      aes registers: 0x540      ******************************/
+
+#define reg_aes_ctrl            REG_ADDR8(0x540)
+
+enum {
+    FLD_AES_CTRL_CODEC_TRIG = BIT(0),
+    FLD_AES_CTRL_DATA_FEED = BIT(1),
+    FLD_AES_CTRL_CODEC_FINISHED = BIT(2),
+};
+
+#define reg_aes_data            REG_ADDR32(0x548)
+#define reg_aes_key(v)     		REG_ADDR8(0x550+v)
+
+
+/*******************************      audio registers: 0x560      ******************************/
+
+#define reg_audio_ctrl     REG_ADDR8(0x560)
+enum{
+	AUDIO_OUTPUT_OFF		   = 0,
+	FLD_AUDIO_MONO_MODE        = BIT(0),
+	FLD_AUDIO_I2S_PLAYER_EN    = BIT(1),
+	FLD_AUDIO_SDM_PLAYER_EN    = BIT(2),
+	FLD_AUDIO_ISO_PLAYER_EN	   = BIT(3),
+	FLD_AUDIO_I2S_RECORDER_EN  = BIT(4),
+	FLD_AUDIO_I2S_INTERFACE_EN = BIT(5),
+	FLD_AUDIO_GRP_EN           = BIT(6),
+	FLD_AUDIO_HPF_EN           = BIT(7),
+};
+
+#define	reg_pwm_ctrl	  REG_ADDR8(0x563)
+enum{
+	FLD_PWM_MULTIPLY2			= BIT(0),
+	FLD_PWM_ENABLE				= BIT(1),
+	FLD_LINER_INTERPOLATE_EN	= BIT(2),
+	FLD_LEFT_SHAPING_EN 		= BIT(5),
+	FLD_RIGTH_SHAPING_EN 		= BIT(6)
+};
+
+#define reg_ascl_tune     REG_ADDR32(0x564)
+
+#define reg_pn1_left      REG_ADDR8(0x568)
+enum{
+	PN1_LEFT_CHN_BITS 	= BIT_RNG(0,4),
+	PN2_LEFT_CHN_EN	  	= BIT(5),
+	PN1_LEFT_CHN_EN   	= BIT(6),
+};
+
+#define reg_pn2_left      REG_ADDR8(0x569)
+enum{
+	PN2_LEFT_CHN_BITS 	= BIT_RNG(0,4),
+	PN2_RIGHT_CHN_EN	= BIT(5),
+	PN1_RIGHT_CHN_EN	= BIT(6),
+};
+
+#define reg_pn1_right      REG_ADDR8(0x56a)
+enum{
+	PN1_RIGHT_CHN_BITS 	= BIT_RNG(0,4),
+	CLK2A_AUDIO_CLK_EN	= BIT(5),
+	EXCHANGE_SDM_DATA_EN= BIT(6),
+};
+
+#define reg_pn2_right      REG_ADDR8(0x56b)
+enum{
+	PN2_RIGHT_CHN_BITS 		= BIT_RNG(0,4),
+	SDM_LEFT_CHN_CONST_EN	= BIT(5),
+	SDM_RIGHT_CHN_CONST_EN	= BIT(6),
+};
+
+/*******************************      gpio registers: 0x580      ******************************/
+
+#define reg_gpio_pa_in			REG_ADDR8(0x580)
+#define reg_gpio_pa_ie			REG_ADDR8(0x581)
+#define reg_gpio_pa_oen			REG_ADDR8(0x582)
+#define reg_gpio_pa_out			REG_ADDR8(0x583)
+#define reg_gpio_pa_pol			REG_ADDR8(0x584)
+#define reg_gpio_pa_ds			REG_ADDR8(0x585)
+#define reg_gpio_pa_gpio		REG_ADDR8(0x586)
+#define reg_gpio_pa_irq_en		REG_ADDR8(0x587)
+
+#define reg_gpio_pb_in			REG_ADDR8(0x588)
+#define areg_gpio_pb_ie			0xbd
+#define reg_gpio_pb_oen			REG_ADDR8(0x58a)
+#define reg_gpio_pb_out			REG_ADDR8(0x58b)
+#define reg_gpio_pb_pol			REG_ADDR8(0x58c)
+#define areg_gpio_pb_ds			0xbf
+#define reg_gpio_pb_gpio		REG_ADDR8(0x58e)
+#define reg_gpio_pb_irq_en		REG_ADDR8(0x58f)
+
+#define reg_gpio_pc_in			REG_ADDR8(0x590)
+#define areg_gpio_pc_ie			0xc0
+#define reg_gpio_pc_oen			REG_ADDR8(0x592)
+#define reg_gpio_pc_out			REG_ADDR8(0x593)
+#define reg_gpio_pc_pol			REG_ADDR8(0x594)
+#define areg_gpio_pc_ds			0xc2
+#define reg_gpio_pc_gpio		REG_ADDR8(0x596)
+#define reg_gpio_pc_irq_en		REG_ADDR8(0x597)
+
+#define reg_gpio_pd_in			REG_ADDR8(0x598)
+#define reg_gpio_pd_ie			REG_ADDR8(0x599)
+#define reg_gpio_pd_oen			REG_ADDR8(0x59a)
+#define reg_gpio_pd_out			REG_ADDR8(0x59b)
+#define reg_gpio_pd_pol			REG_ADDR8(0x59c)
+#define reg_gpio_pd_ds			REG_ADDR8(0x59d)
+#define reg_gpio_pd_gpio		REG_ADDR8(0x59e)
+#define reg_gpio_pd_irq_en		REG_ADDR8(0x59f)
+
+#define reg_gpio_pe_in			REG_ADDR8(0x5a0)
+#define reg_gpio_pe_ie			REG_ADDR8(0x5a1)
+#define reg_gpio_pe_oen			REG_ADDR8(0x5a2)
+#define reg_gpio_pe_out			REG_ADDR8(0x5a3)
+#define reg_gpio_pe_pol			REG_ADDR8(0x5a4)
+#define reg_gpio_pe_ds			REG_ADDR8(0x5a5)
+#define reg_gpio_pe_gpio		REG_ADDR8(0x5a6)
+#define reg_gpio_pe_irq_en		REG_ADDR8(0x5a7)
+
+#define reg_gpio_pa_setting1	REG_ADDR32(0x580)
+#define reg_gpio_pa_setting2	REG_ADDR32(0x584)
+#define reg_gpio_pd_setting1	REG_ADDR32(0x598)
+#define reg_gpio_pd_setting2	REG_ADDR32(0x59c)
+
+#define reg_gpio_in(i)				REG_ADDR8(0x580+((i>>8)<<3))
+#define reg_gpio_ie(i)				REG_ADDR8(0x581+((i>>8)<<3))
+#define reg_gpio_oen(i)				REG_ADDR8(0x582+((i>>8)<<3))
+#define reg_gpio_out(i)				REG_ADDR8(0x583+((i>>8)<<3))
+#define reg_gpio_pol(i)				REG_ADDR8(0x584+((i>>8)<<3))
+#define reg_gpio_ds(i)				REG_ADDR8(0x585+((i>>8)<<3))
+
+
+#define reg_gpio_func(i)			REG_ADDR8(0x586+((i>>8)<<3))
+
+#define reg_gpio_irq_wakeup_en(i)	REG_ADDR8(0x587+((i>>8)<<3))  // reg_irq_mask: FLD_IRQ_GPIO_EN
+
+#define reg_gpio_irq_risc0_en(i)  	REG_ADDR8(0x5b8 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+#define reg_gpio_irq_risc1_en(i)  	REG_ADDR8(0x5c0 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+#define reg_gpio_irq_risc2_en(i)  	REG_ADDR8(0x5c8 + (i >> 8))
+
+#define reg_mux_func_a1      		REG_ADDR8(0x5a8)
+#define reg_mux_func_a2      		REG_ADDR8(0x5a9)
+#define reg_mux_func_b1     		REG_ADDR8(0x5aa)
+#define reg_mux_func_b2     		REG_ADDR8(0x5ab)
+#define reg_mux_func_c1     		REG_ADDR8(0x5ac)
+#define reg_mux_func_c2     		REG_ADDR8(0x5ad)
+#define reg_mux_func_d1     		REG_ADDR8(0x5ae)
+#define reg_mux_func_d2     		REG_ADDR8(0x5af)
+
+#define reg_gpio_wakeup_irq  		REG_ADDR8(0x5b5)
+enum{
+    FLD_GPIO_CORE_WAKEUP_EN  	= BIT(2),
+    FLD_GPIO_CORE_INTERRUPT_EN 	= BIT(3),
+};
+
+#define reg_pin_i2c_spi_out_en	    REG_ADDR8(0x5b6)
+enum{
+	FLD_PIN_PAGROUP_SPI_EN =	BIT_RNG(4,5),
+	FLD_PIN_PBGROUP_SPI_EN =	BIT(6),
+	FLD_PIN_PDGROUP_SPI_EN =	BIT(7),
+};
+
+
+#define reg_pin_i2c_spi_en			REG_ADDR8(0x5b7)  //poweron default  0xff
+enum{
+	FLD_PIN_PA3_SPI_EN =	BIT(0),
+	FLD_PIN_PA4_SPI_EN =	BIT(1),
+	FLD_PIN_PB6_SPI_EN =	BIT(2),
+	FLD_PIN_PD7_SPI_EN =	BIT(3),
+	FLD_PIN_PA3_I2C_EN =	BIT(4),
+	FLD_PIN_PA4_I2C_EN =	BIT(5),
+	FLD_PIN_PB6_I2C_EN =	BIT(6),
+	FLD_PIN_PD7_I2C_EN =	BIT(7),
+};
+
+
+/*******************************      timer registers: 0x620      ******************************/
+
+#define reg_tmr_ctrl			REG_ADDR32(0x620)
+#define reg_tmr_ctrl16			REG_ADDR16(0x620)
+#define reg_tmr_ctrl8			REG_ADDR8(0x620)
+enum{
+	FLD_TMR0_EN =				BIT(0),
+	FLD_TMR0_MODE =				BIT_RNG(1,2),
+	FLD_TMR1_EN = 				BIT(3),
+	FLD_TMR1_MODE =				BIT_RNG(4,5),
+	FLD_TMR2_EN =				BIT(6),
+	FLD_TMR2_MODE = 			BIT_RNG(7,8),
+	FLD_TMR_WD_CAPT = 			BIT_RNG(9,22),
+	FLD_TMR_WD_EN =				BIT(23),
+	FLD_TMR0_STA =				BIT(24),
+	FLD_TMR1_STA =				BIT(25),
+	FLD_TMR2_STA =				BIT(26),
+	FLD_CLR_WD =				BIT(27),
+};
+
+#define reg_tmr_sta				REG_ADDR8(0x623)
+enum{
+	FLD_TMR_STA_TMR0 =			BIT(0),
+	FLD_TMR_STA_TMR1 =			BIT(1),
+	FLD_TMR_STA_TMR2 =			BIT(2),
+	FLD_TMR_STA_WD =			BIT(3),
+};
+
+#define reg_tmr0_capt			REG_ADDR32(0x624)
+#define reg_tmr1_capt			REG_ADDR32(0x628)
+#define reg_tmr2_capt			REG_ADDR32(0x62c)
+#define reg_tmr_capt(i)			REG_ADDR32(0x624 + ((i) << 2))
+#define reg_tmr0_tick			REG_ADDR32(0x630)
+#define reg_tmr1_tick			REG_ADDR32(0x634)
+#define reg_tmr2_tick			REG_ADDR32(0x638)
+#define reg_tmr_tick(i)			REG_ADDR32(0x630 + ((i) << 2))
+
+/*******************************      irq registers: 0x640      ******************************/
+
+#define reg_irq_mask			REG_ADDR32(0x640)
+#define reg_irq_pri				REG_ADDR32(0x644)
+#define reg_irq_src				REG_ADDR32(0x648)
+#define reg_irq_src3			REG_ADDR8(0x64a)
+enum{
+	FLD_IRQ_TMR0_EN =			BIT(0),
+	FLD_IRQ_TMR1_EN =			BIT(1),
+	FLD_IRQ_TMR2_EN =			BIT(2),
+	FLD_IRQ_USB_PWDN_EN =		BIT(3),
+	FLD_IRQ_DMA_EN =			BIT(4),
+	FLD_IRQ_DAM_FIFO_EN =		BIT(5),
+	FLD_IRQ_UART_EN 	=		BIT(6),
+	FLD_IRQ_MIX_CMD_EN =		BIT(7), FLD_IRQ_HOST_CMD_EN  =	BIT(7),//< MIX = I2C/QDEC/SPI
+
+	FLD_IRQ_EP0_SETUP_EN =		BIT(8),
+	FLD_IRQ_EP0_DAT_EN =		BIT(9),
+	FLD_IRQ_EP0_STA_EN =		BIT(10),
+	FLD_IRQ_SET_INTF_EN =		BIT(11),
+	FLD_IRQ_EP_DATA_EN =		BIT(12),  FLD_IRQ_IRQ4_EN = BIT(12),
+	FLD_IRQ_ZB_RT_EN =			BIT(13),
+	FLD_IRQ_SW_PWM_EN =			BIT(14),  //irq_software | irq_pwm
+    //	RSVD 		=			BIT(15),
+
+	FLD_IRQ_USB_250US_EN =		BIT(16),
+	FLD_IRQ_USB_RST_EN =		BIT(17),
+	FLD_IRQ_GPIO_EN =			BIT(18),
+	FLD_IRQ_PM_EN =				BIT(19),
+	FLD_IRQ_SYSTEM_TIMER =		BIT(20),
+	FLD_IRQ_GPIO_RISC0_EN =		BIT(21),
+	FLD_IRQ_GPIO_RISC1_EN =		BIT(22),
+	//	RSVD		  	  = 	BIT(23),
+
+	FLD_IRQ_EN =				BIT_RNG(24,31),
+	FLD_IRQ_ALL           =     0XFFFFFFFF,
+};
+#define reg_irq_en				REG_ADDR8(0x643)
+
+
+
+
+/*******************************      system timer registers: 0x740      ******************************/
+
+#define reg_system_tick			REG_ADDR32(0x740)
+#define reg_system_tick_irq		REG_ADDR32(0x744)
+#define reg_system_wakeup_tick	REG_ADDR32(0x748)
+#define reg_system_tick_mode	REG_ADDR8(0x74c)
+#define reg_system_tick_ctrl	REG_ADDR8(0x74f)
+
+enum {
+	FLD_SYSTEM_TICK_START	=		BIT(0),
+	FLD_SYSTEM_TICK_STOP	=		BIT(1),
+	FLD_SYSTEM_TICK_RUNNING	=		BIT(1),
+
+	FLD_SYSTEM_TICK_IRQ_EN  = 		BIT(1),
+};
+
+
+
+/*******************************      pwm registers: 0x780      ******************************/
+
+#define reg_pwm_enable			REG_ADDR8(0x780)
+#define reg_pwm0_enable			REG_ADDR8(0x781)
+#define reg_pwm_clk				REG_ADDR8(0x782)
+
+#define reg_pwm0_mode			REG_ADDR8(0x783)
+
+
+#define reg_pwm_invert			REG_ADDR8(0x784)
+#define reg_pwm_n_invert		REG_ADDR8(0x785)
+#define reg_pwm_pol				REG_ADDR8(0x786)
+
+#define reg_pwm_cycle(i)		REG_ADDR32(0x794 + (i << 2))   //<15:0>: TCMP 0~5  <31:16>: TMAX 0~5
+#define reg_pwm_cmp(i)			REG_ADDR16(0x794 + (i << 2))   //TCMP 0~5
+#define reg_pwm_max(i)			REG_ADDR16(0x796 + (i << 2))   //TMAX 0~5
+enum{
+	FLD_PWM_CMP  = 				BIT_RNG(0,15),
+	FLD_PWM_MAX  = 				BIT_RNG(16,31),
+};
+
+#define reg_pwm0_pulse_num		REG_ADDR16(0x7ac)
+
+#define reg_pwm_irq_mask		REG_ADDR8(0x7b0)
+#define reg_pwm_irq_sta			REG_ADDR8(0x7b1)
+enum{
+	FLD_IRQ_PWM0_PNUM =					BIT(0),
+	FLD_IRQ_PWM0_IR_DMA_FIFO_DONE  =	BIT(1),
+	FLD_IRQ_PWM0_FRAME =				BIT(2),
+	FLD_IRQ_PWM1_FRAME =				BIT(3),
+	FLD_IRQ_PWM2_FRAME =				BIT(4),
+	FLD_IRQ_PWM3_FRAME =				BIT(5),
+	FLD_IRQ_PWM4_FRAME 	=				BIT(6),
+	FLD_IRQ_PWM5_FRAME =				BIT(7),
+};
+
+
+
+#define reg_pwm0_fifo_mode_irq_mask		REG_ADDR8(0x7b2)
+
+enum{
+	FLD_PWM0_IRQ_IR_FIFO_EN  	 = BIT(0),
+};
+
+#define reg_pwm0_fifo_mode_irq_sta		REG_ADDR8(0x7b3)
+
+enum{
+	FLD_PWM0_IRQ_IR_FIFO_CNT 	 = BIT(0),
+};
+
+
+
+#define reg_pwm_tcmp0_shadow		REG_ADDR16(0x7c4)   //<15:0>: TCMP 0~5  <31:16>: TMAX 0~5
+#define reg_pwm_tmax0_shadow		REG_ADDR16(0x7c6)   //TCMP 0~5
+
+#define reg_pwm_ir_fifo_dat(i)			REG_ADDR16(0x7c8+i*2)
+#define reg_pwm_ir_fifo_irq_trig_level	REG_ADDR8(0x7cc)
+
+#define reg_pwm_ir_fifo_data_status		REG_ADDR8(0x7cd)
+enum{
+	FLD_PWM0_IR_FIFO_DATA_NUM 	=		BIT_RNG(0,3),
+	FLD_PWM0_IR_FIFO_EMPTY 		=		BIT(4),
+	FLD_PWM0_IR_FIFO_FULL 		=		BIT(5),
+};
+
+#define reg_pwm_ir_clr_fifo_data		REG_ADDR8(0x7ce)
+
+enum{
+	FLD_PWM0_IR_FIFO_CLR_DATA 	=		BIT(0),
+};
+
+/*******************************      fifo registers: 0x800      ******************************/
+
+#define reg_fifo0_data			REG_ADDR32(0x800)
+#define reg_fifo1_data			REG_ADDR32(0x900)
+#define reg_fifo2_data			REG_ADDR32(0xa00)
+
+/*******************************      dfifo registers: 0xb00      ******************************/
+
+#define reg_dfifo0_addr			REG_ADDR16(0xb00)
+#define reg_dfifo0_size			REG_ADDR8(0xb02)
+#define reg_dfifo0_addHi		REG_ADDR8(0xb03)  //default 0x04, no need set
+
+#define reg_dfifo1_addr			REG_ADDR16(0xb04)
+#define reg_dfifo1_size			REG_ADDR8(0xb06)
+#define reg_dfifo1_addHi		REG_ADDR8(0xb07)  //default 0x04, no need set
+
+//misc channel only use dfifo2
+#define reg_dfifo2_addr			REG_ADDR16(0xb08)
+#define reg_dfifo2_size			REG_ADDR8(0xb0a)
+#define reg_dfifo2_addHi		REG_ADDR8(0xb0b)  //default 0x04, no need set
+
+#define reg_dfifo_audio_addr		reg_dfifo0_addr
+#define reg_dfifo_audio_size		reg_dfifo0_size
+
+#define reg_dfifo_misc_chn_addr		reg_dfifo2_addr
+#define reg_dfifo_misc_chn_size		reg_dfifo2_size
+
+
+#define reg_dfifo0_l_level		REG_ADDR8(0xb0c)  //dfifo0  low int threshold(wptr - rptr)
+#define reg_dfifo0_h_level		REG_ADDR8(0xb0d)  //dfifo0 high int threshold(wptr - rptr)
+#define reg_dfifo1_h_level		REG_ADDR8(0xb0e)  //dfifo1 high int threshold(wptr - rptr)
+#define reg_dfifo2_h_level		REG_ADDR8(0xb0f)  //dfifo2 high int threshold(wptr - rptr)
+
+
+#define	reg_dfifo_mode			REG_ADDR8(0xb10)
+enum{
+	FLD_AUD_DFIFO0_IN 		= BIT(0),
+	FLD_AUD_DFIFO1_IN 		= BIT(1),
+	FLD_AUD_DFIFO2_IN 		= BIT(2),
+	FLD_AUD_DFIFO0_OUT 		= BIT(3),
+	FLD_AUD_DFIFO0_L_INT	= BIT(4),
+	FLD_AUD_DFIFO0_H_INT	= BIT(5),
+	FLD_AUD_DFIFO1_H_INT	= BIT(6),
+	FLD_AUD_DFIFO2_H_INT	= BIT(7),
+};
+
+#define	reg_dfifo_ain			REG_ADDR8(0xb11)
+enum{
+	FLD_AUD_DMIC0_DATA_IN_RISING_EDGE = BIT(0),
+	FLD_AUD_DMIC1_DATA_IN_RISING_EDGE = BIT(1),
+	FLD_AUD_INPUT_SELECT     		  = BIT_RNG(2,3),
+	FLD_AUD_INPUT_MONO_MODE	   		  = BIT(4),
+	FLD_AUD_DECIMATION_FILTER_BYPASS  = BIT(5),
+	FLD_AUD_DMIC_RISING_EDGE_BYPASS   = BIT(6),
+	FLD_AUD_DMIC_FALLING_EDGE_BYPASS  = BIT(7),
+
+};
+
+enum{  //core_b11<0> <1>  audio dmic_n  rising/falling edge
+	AUDIO_DMIC_DATA_IN_RISING_EDGE 		= 1,
+	AUDIO_DMIC_DATA_IN_FALLING_EDGE 	= 0,
+};
+
+enum{  //core_b11<3:2>  audio input select
+	AUDIO_INPUT_USB  = 0x00,
+	AUDIO_INPUT_I2S  = 0x01,
+	AUDIO_INPUT_AMIC = 0x02,
+	AUDIO_INPUT_DMIC = 0x03,
+};
+
+
+
+#define reg_dfifo_dec_ratio		REG_ADDR8(0xb12)
+
+#define reg_dfifo_irq_status	REG_ADDR8(0xb13)
+enum{
+	FLD_AUD_DFIFO0_L_IRQ	= BIT(4),
+	FLD_AUD_DFIFO0_H_IRQ	= BIT(5),
+	FLD_AUD_DFIFO1_L_IRQ	= BIT(6),
+	FLD_AUD_DFIFO1_H_IRQ	= BIT(7),
+};
+#define reg_dfifo0_rptr			REG_ADDR16(0xb14)
+#define reg_dfifo0_wptr			REG_ADDR16(0xb16)
+
+#define reg_dfifo1_rptr			REG_ADDR16(0xb18)
+#define reg_dfifo1_wptr			REG_ADDR16(0xb1a)
+
+#define reg_dfifo2_rptr			REG_ADDR16(0xb1c)
+#define reg_dfifo2_wptr			REG_ADDR16(0xb1e)
+
+
+#define reg_audio_wptr			reg_dfifo0_wptr
+
+#define reg_dfifo0_num			REG_ADDR16(0xb20)
+#define reg_dfifo1_num			REG_ADDR16(0xb24)
+#define reg_dfifo2_num			REG_ADDR16(0xb28)
+
+#define reg_dfifo0_manual		REG_ADDR8(0xb2c)
+enum{
+	FLD_DFIFO_MANUAL_MODE_EN	= BIT(0),
+};
+
+#define reg_dfifo0_man_dat		REG_ADDR32(0xb30)
+
+#define	reg_alc_sft				REG_ADDR8(0xb34)
+
+#define	reg_audio_dec_mode		REG_ADDR8(0xb35)
+enum{
+	FLD_AUD_LNR_VALID_SEL	= BIT(0),
+	FLD_AUD_CIC_MODE  		= BIT(3)
+};
+
+
+#define	reg_adc_mul				REG_ADDR8(0xb36)
+#define	reg_adc_bias			REG_ADDR8(0xb37)
+
+#define	reg_aud_alc_hpf_lpf_ctrl	 REG_ADDR8(0xb40)
+enum {
+	FLD_AUD_IN_HPF_SFT		=	BIT_RNG(0,3),
+	FLD_AUD_IN_HPF_BYPASS	=	BIT(4),
+	FLD_AUD_IN_ALC_BYPASS	=	BIT(5),
+	FLD_AUD_IN_LPF_BYPASS   =   BIT(6),
+	FLD_DOUBLE_DOWN_SAMPLING_ON =   BIT(7)
+};
+
+
+
+#define reg_aud_alc_vol_l_chn		REG_ADDR8(0xb41)  //default 0x00, will be 0x20 after ana_34 set to 0x80
+#define reg_aud_alc_vol_r_chn		REG_ADDR8(0xb42)  //default 0x00, will be 0x20 after ana_34 set to 0x80
+enum{
+	FLD_AUD_ALC_MIN_VOLUME_IN_DIGITAL_MODE 	= BIT_RNG(0,5),
+	FLD_AUD_ALC_MIN_PGA_IN_ANALOG_MODE	    = BIT_RNG(0,6),
+	//alc digital mode left/right channel regulate mode select: 1 for auto regulate; 0 for manual regulate
+	FLD_AUD_ALC_DIGITAL_MODE_AUTO_REGULATE_EN	= BIT(7),
+};
+
+
+#define reg_alc_vol_h				REG_ADDR8(0xb43)
+enum{
+	FLD_AUD_ALC_MAX_VOLUME_IN_DIGITAL_MODE 	= BIT_RNG(0,5),
+	FLD_AUD_ALC_MAX_PGA_IN_ANALOG_MODE	    = BIT_RNG(0,6),
+};
+
+
+#define reg_alc_vol_th_h			REG_ADDR16(0xb44)
+#define reg_alc_vol_th_l			REG_ADDR16(0xb46)
+#define reg_alc_vol_thn				REG_ADDR16(0xb48)
+#define reg_alc_vad_thn				REG_ADDR16(0xb4a)
+
+#define reg_alc_vol_step			REG_ADDR8(0xb4c)
+
+#define reg_alc_vol_l				REG_ADDR8(0xb4d)
+#define reg_alc_vol_r				REG_ADDR8(0xb4e)
+
+#define reg_alc_peak_tick			REG_ADDR16(0xb50)
+
+#define reg_alc_dec_tick			REG_ADDR8(0xb52)
+#define reg_alc_noi_tick			REG_ADDR8(0xb53)
+
+
+#define reg_aud_alc_cfg				REG_ADDR8(0xb54)   //default 0x00, will be 0x02 after ana_34 set to 0x80
+enum{
+	FLD_AUD_ALC_ANALOG_MODE_EN 		= BIT(0),    //alc mode select:   1 for analog mode;  0 for digital mode
+	FLD_AUD_ALC_NOISE_EN 			= BIT(1),
+};
+
+#define reg_alc_coef_iir			REG_ADDR8(0xb55)
+#define reg_alc_dat_mask			REG_ADDR8(0xb56)
+#define reg_alc_inc_spd				REG_ADDR8(0xb57)
+#define reg_alc_inc_max				REG_ADDR8(0xb58)
+#define reg_alc_dec_spd				REG_ADDR8(0xb59)
+#define reg_alc_dec_max				REG_ADDR8(0xb5a)
+#define reg_alc_noi_spd				REG_ADDR8(0xb5b)
+#define reg_alc_noi_max				REG_ADDR8(0xb5c)
+
+#define reg_pga_gain_init			REG_ADDR8(0xb5d)
+#define reg_pga_gain_l				REG_ADDR8(0xb5e)   //used to check current left  channel gain in analog mode auto regulate
+#define reg_pga_gain_r				REG_ADDR8(0xb5f)   //used to check current right channel gain in analog mode auto regulate
+#define reg_pga_man_speed			REG_ADDR8(0xb60)
+
+#define reg_pga_man_target_l		REG_ADDR8(0xb61)
+#define reg_pga_value_l				REG_ADDR8(0xb62)
+#define reg_pga_fix_value			REG_ADDR8(0xb63)
+
+enum {
+	FLD_PGA_POST_AMPLIFIER_GAIN		=	BIT_RNG(0,5),
+	FLD_PGA_PRE_AMPLIFIER_GAIN   =   BIT(6),
+	FLD_PGA_GAIN_FIX_EN =   BIT(7)
+};
+
+#define reg_pga_r_l					REG_ADDR8(0xb64)
+#define reg_pga_man_target_r		REG_ADDR8(0xb65)
+#define reg_pga_value_r				REG_ADDR8(0xb66)
+
+/*******************************      dma registers: 0xc00      ******************************/
+
+//uart rx
+#define reg_dma0_addr			REG_ADDR16(0xc00)
+#define reg_dma0_size			REG_ADDR8(0xc02)
+#define reg_dma0_mode			REG_ADDR8(0xc03)
+enum{
+	FLD_DMA_WR_MEM =			BIT(0),
+	FLD_DMA_PINGPONG_EN =		BIT(1),
+	FLD_DMA_FIFO_EN =			BIT(2),
+	FLD_DMA_AUTO_MODE =			BIT(3),
+	FLD_DMA_READ_MODE =			BIT(4),
+	FLD_DMA_BYTE_MODE =			BIT(5)
+};
+
+
+//uart tx
+#define reg_dma1_addr			REG_ADDR16(0xc04)
+#define reg_dma1_size			REG_ADDR8(0xc06)
+#define reg_dma1_mode			REG_ADDR8(0xc07)
+
+//rf rx dma
+#define reg_dma2_addr			REG_ADDR16(0xc08)
+#define reg_dma2_size			REG_ADDR8(0xc0a)
+#define reg_dma2_mode			REG_ADDR8(0xc0b)
+
+//rf tx dma
+#define reg_dma3_addr			REG_ADDR16(0xc0c)
+#define reg_dma3_size			REG_ADDR8(0xc0e)
+#define reg_dma3_mode			REG_ADDR8(0xc0f)
+
+#define reg_dma4_addr			REG_ADDR16(0xc10)
+#define reg_dma4_size			REG_ADDR8(0xc12)
+#define reg_dma4_mode			REG_ADDR8(0xc13)
+
+#define reg_dma5_addr			REG_ADDR16(0xc14)
+#define reg_dma5_size			REG_ADDR8(0xc16)
+#define reg_dma5_mode			REG_ADDR8(0xc17)
+
+//pwm tx dma
+#define reg_dma7_addr			REG_ADDR16(0xc18)
+#define reg_dma7_size			REG_ADDR8(0xc1a)
+#define reg_dma7_mode			REG_ADDR8(0xc1b)
+
+
+#define reg_dma_t_addr			REG_ADDR16(0xc1c)
+#define reg_dma_t_size			REG_ADDR8(0xc1e)
+
+#define reg_dma_size(v)			REG_ADDR8(0xc02+4*v)
+
+//  The default channel assignment
+#define reg_dma_uart_rx_addr	reg_dma0_addr
+#define reg_dma_uart_rx_size	reg_dma0_size
+#define reg_dma_uart_rx_mode	reg_dma0_mode
+
+#define reg_dma_uart_tx_addr	reg_dma1_addr
+#define reg_dma_uart_tx_size	reg_dma1_size
+#define reg_dma_uart_tx_mode	reg_dma1_mode
+
+#define reg_dma_rf_rx_addr		reg_dma2_addr
+#define reg_dma_rf_rx_size		reg_dma2_size
+#define reg_dma_rf_rx_mode		reg_dma2_mode
+
+#define reg_dma_rf_tx_addr		reg_dma3_addr
+#define reg_dma_rf_tx_size		reg_dma3_size
+#define reg_dma_rf_tx_mode		reg_dma3_mode
+
+#define reg_dma_pwm_addr		reg_dma7_addr
+#define reg_dma_pwm_size		reg_dma7_size
+#define reg_dma_pwm_mode		reg_dma7_mode
+
+
+
+#define reg_dma_chn_en			REG_ADDR8(0xc20)
+#define reg_dma_chn_irq_msk		REG_ADDR8(0xc21)
+#define reg_dma_tx_rdy0			REG_ADDR8(0xc24)
+#define reg_dma_tx_rdy1			REG_ADDR8(0xc25)
+#define reg_dma_rx_rdy0			REG_ADDR8(0xc26)
+#define reg_dma_rx_rdy1			REG_ADDR8(0xc27)
+
+#define reg_dma_irq_status		reg_dma_rx_rdy0
+
+enum{
+	FLD_DMA_CHN0 =	BIT(0),		FLD_DMA_CHN_UART_RX =	BIT(0),
+	FLD_DMA_CHN1 =	BIT(1),		FLD_DMA_CHN_UART_TX =	BIT(1),
+	FLD_DMA_CHN2 =	BIT(2),		FLD_DMA_CHN_RF_RX =		BIT(2),
+	FLD_DMA_CHN3 =	BIT(3),		FLD_DMA_CHN_RF_TX =		BIT(3),
+	FLD_DMA_CHN4 =	BIT(4),		FLD_DMA_CHN_AES_OUT =    BIT(4),
+	FLD_DMA_CHN5 =	BIT(5),     FLD_DMA_CHN_AES_IN =   BIT(5),
+	FLD_DMA_CHN7 =	BIT(7),		FLD_DMA_CHN_PWM  	 =	BIT(7),
+};
+
+typedef enum {
+    FLD_DMA_IRQ_UART_RX  = BIT(0),
+    FLD_DMA_IRQ_UART_TX  = BIT(1),
+    FLD_DMA_IRQ_RF_RX    = BIT(2),
+    FLD_DMA_IRQ_RF_TX    = BIT(3),
+    FLD_DMA_IRQ_AES_DECO = BIT(4),
+    FLD_DMA_IRQ_AES_CODE = BIT(5),
+    FLD_DMA_IRQ_PWM		 = BIT(7),
+    FLD_DMA_IRQ_ALL      = 0xff,
+} IRQ_DMAIrqTypeDef;
+
+
+#define reg_dma_rx_rptr			REG_ADDR8(0xc28)
+#define reg_dma_rx_wptr			REG_ADDR8(0xc29)
+
+#define reg_dma_tx_rptr			REG_ADDR8(0xc2a)
+#define reg_dma_tx_wptr			REG_ADDR8(0xc2b)
+#define reg_dma_tx_fifo			REG_ADDR16(0xc2c)
+enum{
+	FLD_DMA_RPTR_CLR =			BIT(4),
+	FLD_DMA_RPTR_NEXT =			BIT(5),
+	FLD_DMA_RPTR_SET =			BIT(6),
+};
+
+#define reg_dma0_addrHi			REG_ADDR8(0xc40)
+#define reg_dma1_addrHi			REG_ADDR8(0xc41)
+#define reg_dma2_addrHi			REG_ADDR8(0xc42)
+#define reg_dma3_addrHi			REG_ADDR8(0xc43)
+#define reg_dma4_addrHi			REG_ADDR8(0xc44)
+#define reg_dma5_addrHi			REG_ADDR8(0xc45)
+#define reg_dma_ta_addrHi		REG_ADDR8(0xc46)
+#define reg_dma_a3_addrHi		REG_ADDR8(0xc47)
+#define reg_dma7_addrHi			REG_ADDR8(0xc48)
+
+/*******************************      linklayer registers: 0xf00      ******************************/
+
+#define reg_rf_ll_ctrl_0		REG_ADDR8(0xf02)
+
+#define reg_rf_ll_ctrl_1		REG_ADDR8(0xf03)
+enum{
+	FLD_RF_FSM_TIMEOUT_EN 		=   BIT(0),
+	FLD_RF_RX_FIRST_TIMEOUT_EN	=   BIT(1),
+	FLD_RF_RX_TIMEOUT_EN		=   BIT(2),
+	FLD_RF_CRC_2_EN 			=   BIT(3),
+
+	//BLE mode
+	FLD_RF_BRX_SN_INIT	 		=   BIT(4),
+	FLD_RF_BRX_NESN_INIT	 	=   BIT(5),
+	FLD_RF_BTX_SN_INIT	 		=   BIT(6),
+	FLD_RF_BTX_NESN_INIT	 	=   BIT(7),
+};
+
+#define  	FSM_TIMEOUT_ENABLE 	 			( reg_rf_ll_ctrl_1 |= FLD_RF_FSM_TIMEOUT_EN )
+#define  	FSM_TIMEOUT_DISABLE				( reg_rf_ll_ctrl_1 &= (~FLD_RF_FSM_TIMEOUT_EN) )
+#define		FSM_RX_FIRST_TIMEOUT_ENABLE		( reg_rf_ll_ctrl_1 |= FLD_RF_RX_FIRST_TIMEOUT_EN )
+#define 	FSM_RX_FIRST_TIMEOUT_DISABLE	( reg_rf_ll_ctrl_1 &= (~FLD_RF_RX_FIRST_TIMEOUT_EN) )
+
+#define reg_rf_rx_timeout		REG_ADDR16(0xf0a)
+
+#define reg_rf_ll_ctrl_2		REG_ADDR8(0xf15)
+
+#define reg_rf_ll_ctrl_3		REG_ADDR8(0xf16)
+enum{
+	FLD_RF_TX_EN_DLY_EN = 		BIT(0),
+	FLD_RF_PLL_RST_EN	=       BIT(1),
+	FLD_RF_CMD_SCHEDULE_EN	=   BIT(2),
+	FLD_RF_R_TX_EN_DLY =		BIT_RNG(4,7),
+};
+
+
+#define reg_rf_irq_mask			REG_ADDR16(0xf1c)
+#define reg_rf_irq_status		REG_ADDR16(0xf20)
+#define reg_rf_fsm_timeout		REG_ADDR32(0xf2c)
+
+#define		CLEAR_ALL_RFIRQ_STATUS   ( reg_rf_irq_status = 0xffff )
+
+enum{
+	FLD_RF_IRQ_RX = 			BIT(0),
+	FLD_RF_IRQ_TX =				BIT(1),
+	FLD_RF_IRQ_RX_TIMEOUT =		BIT(2),
+	FLD_RF_IRQ_RX_CRC_2 =		BIT(4),
+	FLD_RF_IRQ_CMD_DONE  =		BIT(5),
+	FLD_RF_IRQ_FSM_TIMEOUT  =	BIT(6),
+	FLD_RF_IRQ_RETRY_HIT =		BIT(7),
+	FLD_RF_IRQ_TX_DS =          BIT(8),
+    FLD_RF_IRQ_RX_DR =          BIT(9),
+	FLD_RF_IRQ_FIRST_TIMEOUT =	BIT(10),
+	FLD_RF_IRQ_INVALID_PID =    BIT(11),
+	FLD_RF_IRQ_STX_TIMEOUT =    BIT(12),
+	FLD_RF_IRQ_ALL =            0X1FFF,
+};
+/*******************************      aura registers: 0x1200      ******************************/
+
+#define REG_AURA_BASE            0x1200
+
+#define reg_mode_cfg_txrx_1        REG_ADDR8(REG_AURA_BASE+0x27)
+
+enum
+{
+	FLD_TX_PA_PWR_H     = BIT_RNG(0,4),
+	FLD_TX_MI_SEL       = BIT(5),
+	FLD_RX_MI_SEL       = BIT(6),
+};
+
+
+
+
+
+/********************************************************************************************
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ *****|								Aanlog  Register Table  						   |*****
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ ********************************************************************************************/
+
+/*******************************      analog registers(3v3): 0x00      ***************************/
+
+#define areg_06_pll_bg			        0x06
+enum{
+	FLD_PLL_BG_POWER_DOWN = BIT(4),      //    	1: Power down;     0: Power up
+};
+
+#define areg_0e_pa0_pa3_pull			0x0E
+#define areg_0f_pa4_pa7_pull			0x0F
+#define areg_10_pb0_pb3_pull			0x10
+#define areg_11_pb4_pb7_pull			0x11
+#define areg_12_pc0_pc3_pull			0x12
+#define areg_13_pc4_pc7_pull			0x13
+#define areg_14_pd0_pd3_pull			0x14
+#define areg_15_pd4_pd7_pull			0x15
+
+/*******************************      analog registers(1v8): 0x80      ***************************/
+#define areg_clk_setting				0x82
+enum{
+	FLD_DCCC_DOUBLER_POWER_DOWN	  = BIT(3),
+	FLD_CLK_48M_TO_RX_EN 		  = BIT(4),
+	FLD_CLK_48M_TO_DIG_EN 		  = BIT(5),
+	FLD_CLK_24M_TO_SAR_EN 		  = BIT(6),
+	FLD_CLK_48M_TO_CAL_DIG_MAN_EN = BIT(7),
+};
+
+#define areg_xo_setting				0x8a
+enum{
+	FLD_XO_CDAC_ANA	  	= BIT_RNG(0,5),
+	FLD_XO_MODE_ANA 	= BIT(6),
+	FLD_XO_CAP_OFF_ANA  = BIT(7),
+};
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/rf_drv.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/rf_drv.h
new file mode 100644
index 00000000..f6ebdef9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/rf_drv.h
@@ -0,0 +1,510 @@
+/********************************************************************************************************
+ * @file    rf_drv.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef _RF_DRV_H_
+#define _RF_DRV_H_
+
+#include "bit.h"
+#include "bsp.h"
+#include "register.h"
+#include "flash.h"
+#include "analog.h"
+
+
+#define RF_CHN_TABLE 		0x8000
+
+
+/**
+ *  @brief  Define RF mode
+ */
+typedef enum {
+	RF_MODE_BLE_2M =    		BIT(0),
+	RF_MODE_BLE_1M = 			BIT(1),
+    RF_MODE_BLE_1M_NO_PN   =    BIT(2),
+	RF_MODE_ZIGBEE_250K    =    BIT(3),
+    RF_MODE_LR_S2_500K     =    BIT(4),
+    RF_MODE_LR_S8_125K     =    BIT(5),
+    RF_MODE_PRIVATE_250K   =    BIT(6),
+    RF_MODE_PRIVATE_500K   =    BIT(7),
+    RF_MODE_PRIVATE_1M     =    BIT(8),
+    RF_MODE_PRIVATE_2M     =    BIT(9),
+    RF_MODE_ANT     	   =    BIT(10),
+    RF_MODE_BLE_2M_NO_PN   =    BIT(11),
+} RF_ModeTypeDef;
+
+
+/**
+ *  @brief  Define RF Tx/Rx/Auto mode
+ */
+typedef enum {
+	RF_MODE_TX 		= 0,
+	RF_MODE_RX 		= 1,
+	RF_MODE_AUTO	= 2,
+	RF_MODE_OFF 	= 3
+} RF_StatusTypeDef;
+
+/**
+ *  @brief  Define power list of RF
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_P10p46dBm = 63, //  10.46 dbm
+	 RF_POWER_P10p29dBm = 61, //  10.29 dbm
+	 RF_POWER_P10p01dBm = 58, //  10.01 dbm
+	 RF_POWER_P9p81dBm  = 56, //   9.81 dbm
+	 RF_POWER_P9p48dBm  = 53, //   9.48 dbm
+	 RF_POWER_P9p24dBm  = 51, //   9.24 dbm
+	 RF_POWER_P8p97dBm  = 49, //   8.97 dbm
+	 RF_POWER_P8p73dBm  = 47, //   8.73 dbm
+	 RF_POWER_P8p44dBm  = 45, //   8.44 dbm
+	 RF_POWER_P8p13dBm  = 43, //   8.13 dbm
+	 RF_POWER_P7p79dBm  = 41, //   7.79 dbm
+	 RF_POWER_P7p41dBm  = 39, //   7.41 dbm
+	 RF_POWER_P7p02dBm  = 37, //   7.02 dbm
+	 RF_POWER_P6p60dBm  = 35, //   6.60 dbm
+	 RF_POWER_P6p14dBm  = 33, //   6.14 dbm
+	 RF_POWER_P5p65dBm  = 31, //   5.65 dbm
+	 RF_POWER_P5p13dBm  = 29, //   5.13 dbm
+	 RF_POWER_P4p57dBm  = 27, //   4.57 dbm
+	 RF_POWER_P3p94dBm  = 25, //   3.94 dbm
+	 RF_POWER_P3p23dBm  = 23, //   3.23 dbm
+	 /*VANT*/
+	 RF_POWER_P3p01dBm  = BIT(7) | 63,   //   3.01 dbm
+	 RF_POWER_P2p81dBm  = BIT(7) | 61,   //   2.81 dbm
+	 RF_POWER_P2p61dBm  = BIT(7) | 59,   //   2.61 dbm
+	 RF_POWER_P2p39dBm  = BIT(7) | 57,   //   2.39 dbm
+	 RF_POWER_P1p99dBm  = BIT(7) | 54,   //   1.99 dbm
+	 RF_POWER_P1p73dBm  = BIT(7) | 52,   //   1.73 dbm
+	 RF_POWER_P1p45dBm  = BIT(7) | 50,   //   1.45 dbm
+	 RF_POWER_P1p17dBm  = BIT(7) | 48,   //   1.17 dbm
+	 RF_POWER_P0p90dBm  = BIT(7) | 46,   //   0.90 dbm
+	 RF_POWER_P0p58dBm  = BIT(7) | 44,   //   0.58 dbm
+	 RF_POWER_P0p04dBm  = BIT(7) | 41,   //   0.04 dbm
+	 RF_POWER_N0p14dBm  = BIT(7) | 40,   //  -0.14 dbm
+	 RF_POWER_N0p97dBm  = BIT(7) | 36,   //  -0.97 dbm
+	 RF_POWER_N1p42dBm  = BIT(7) | 34,   //  -1.42 dbm
+	 RF_POWER_N1p89dBm  = BIT(7) | 32,   //  -1.89 dbm
+	 RF_POWER_N2p48dBm  = BIT(7) | 30,   //  -2.48 dbm
+	 RF_POWER_N3p03dBm  = BIT(7) | 28,   //  -3.03 dbm
+	 RF_POWER_N3p61dBm  = BIT(7) | 26,   //  -3.61 dbm
+	 RF_POWER_N4p26dBm  = BIT(7) | 24,   //  -4.26 dbm
+	 RF_POWER_N5p03dBm  = BIT(7) | 22,   //  -5.03 dbm
+	 RF_POWER_N5p81dBm  = BIT(7) | 20,   //  -5.81 dbm
+	 RF_POWER_N6p67dBm  = BIT(7) | 18,   //  -6.67 dbm
+	 RF_POWER_N7p65dBm  = BIT(7) | 16,   //  -7.65 dbm
+	 RF_POWER_N8p65dBm  = BIT(7) | 14,   //  -8.65 dbm
+	 RF_POWER_N9p89dBm  = BIT(7) | 12,   //  -9.89 dbm
+	 RF_POWER_N11p4dBm  = BIT(7) | 10,   //  -11.4 dbm
+	 RF_POWER_N13p29dBm = BIT(7) | 8,   //  -13.29 dbm
+	 RF_POWER_N15p88dBm = BIT(7) | 6,   //  -15.88 dbm
+	 RF_POWER_N19p27dBm = BIT(7) | 4,   //  -19.27 dbm
+	 RF_POWER_N25p18dBm = BIT(7) | 2,   //  -25.18 dbm
+
+	 RF_POWER_N30dBm    = 0xff,         //  -30 dbm
+	 RF_POWER_N50dBm    = BIT(7) | 0,   //  -50 dbm
+
+} RF_PowerTypeDef;
+
+extern const RF_PowerTypeDef rf_power_Level_list[60];
+/**
+ *  @brief  Define power index list of RF
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_INDEX_P10p46dBm,
+	 RF_POWER_INDEX_P10p29dBm,
+	 RF_POWER_INDEX_P10p01dBm,
+	 RF_POWER_INDEX_P9p81dBm,
+	 RF_POWER_INDEX_P9p48dBm,
+	 RF_POWER_INDEX_P9p24dBm,
+	 RF_POWER_INDEX_P8p97dBm,
+	 RF_POWER_INDEX_P8p73dBm,
+	 RF_POWER_INDEX_P8p44dBm,
+	 RF_POWER_INDEX_P8p13dBm,
+	 RF_POWER_INDEX_P7p79dBm,
+	 RF_POWER_INDEX_P7p41dBm,
+	 RF_POWER_INDEX_P7p02dBm,
+	 RF_POWER_INDEX_P6p60dBm,
+	 RF_POWER_INDEX_P6p14dBm,
+	 RF_POWER_INDEX_P5p65dBm,
+	 RF_POWER_INDEX_P5p13dBm,
+	 RF_POWER_INDEX_P4p57dBm,
+	 RF_POWER_INDEX_P3p94dBm,
+	 RF_POWER_INDEX_P3p23dBm,
+	 /*VANT*/
+	 RF_POWER_INDEX_P3p01dBm,
+	 RF_POWER_INDEX_P2p81dBm,
+	 RF_POWER_INDEX_P2p61dBm,
+	 RF_POWER_INDEX_P2p39dBm,
+	 RF_POWER_INDEX_P1p99dBm,
+	 RF_POWER_INDEX_P1p73dBm,
+	 RF_POWER_INDEX_P1p45dBm,
+	 RF_POWER_INDEX_P1p17dBm,
+	 RF_POWER_INDEX_P0p90dBm,
+	 RF_POWER_INDEX_P0p58dBm,
+	 RF_POWER_INDEX_P0p04dBm,
+	 RF_POWER_INDEX_N0p14dBm,
+	 RF_POWER_INDEX_N0p97dBm,
+	 RF_POWER_INDEX_N1p42dBm,
+	 RF_POWER_INDEX_N1p89dBm,
+	 RF_POWER_INDEX_N2p48dBm,
+	 RF_POWER_INDEX_N3p03dBm,
+	 RF_POWER_INDEX_N3p61dBm,
+	 RF_POWER_INDEX_N4p26dBm,
+	 RF_POWER_INDEX_N5p03dBm,
+	 RF_POWER_INDEX_N5p81dBm,
+	 RF_POWER_INDEX_N6p67dBm,
+	 RF_POWER_INDEX_N7p65dBm,
+	 RF_POWER_INDEX_N8p65dBm,
+	 RF_POWER_INDEX_N9p89dBm,
+	 RF_POWER_INDEX_N11p4dBm,
+	 RF_POWER_INDEX_N13p29dBm,
+	 RF_POWER_INDEX_N15p88dBm,
+	 RF_POWER_INDEX_N19p27dBm,
+	 RF_POWER_INDEX_N25p18dBm,
+} RF_PowerIndexTypeDef;
+
+
+#define	RF_TRX_MODE									0xe0
+#define	RF_TRX_OFF									0x45
+
+#define	RF_PACKET_LENGTH_OK(p)						(p[0] == p[12]+13)
+#define	RF_PACKET_CRC_OK(p)							((p[p[0]+3] & 0x51) == 0x10)
+
+#define	RF_BLE_PACKET_LENGTH_OK(p)					(p[0] == (p[5]&0x3f)+13)
+#define	RF_BLE_PACKET_CRC_OK(p)						((p[p[0]+3] & 0x01) == 0)
+
+#define RF_ZIGBEE_PACKET_LENGTH_OK(p)    			(p[0] == p[4]+9)
+#define RF_ZIGBEE_PACKET_CRC_OK(p)       			((p[p[0]+3] & 0x51) == 0x10)
+#define RF_ZIGBEE_PACKET_RSSI_GET(p)     			(p[p[0]+2])
+#define RF_ZIGBEE_PACKET_TIMESTAMP_GET(p)           (p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+#define RF_ZIGBEE_PACKET_PAYLOAD_LENGTH_GET(p)      (p[4])
+
+#define RF_TPLL_PACKET_LENGTH_OK(p)              	(p[0] == (p[4] & 0x3f) + 11)
+#define RF_TPLL_PACKET_CRC_OK(p)                 	((p[p[0]+3] & 0x01) == 0x00)
+#define RF_TPLL_PACKET_RSSI_GET(p)               	(p[p[0]+2])
+#define RF_SB_PACKET_PAYLOAD_LENGTH_GET(p)      	(p[0] - 10)
+#define RF_SB_PACKET_CRC_OK(p)                  	((p[p[0]+3] & 0x01) == 0x00)
+#define RF_SB_PACKET_CRC_GET(p)                 	((p[p[0]-8]<<8) + p[p[0]-7]) //Note: here assume that the MSByte of CRC is received first
+#define RF_SB_PACKET_RSSI_GET(p)                	(p[p[0]+2])
+#define RF_TPLL_PACKET_TIMESTAMP_GET(p)          	(p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+#define RF_SB_PACKET_TIMESTAMP_GET(p)           	(p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+
+
+
+/*******************************            General APIs            **************************/
+
+/**
+ *	@brief     This function serves to reset RF BaseBand
+ *	@param[in] none.
+ *	@return	   none.
+ */
+static inline void reset_baseband(void)
+{
+	REG_ADDR8(0x61) = BIT(0);		//reset_baseband
+	REG_ADDR8(0x61) = 0;			//release reset signal
+}
+
+/**
+ * @brief   This function serves to reset function for RF.
+ * @param   none
+ * @return  none
+ */
+static inline void reset_sn_nesn(void)
+{
+	REG_ADDR8(0xf01) =  0x01;
+}
+
+/**
+ * @brief   This function serves to reset the RF sn.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_reset_sn(void)
+{
+	write_reg8(0xf01, 0x3f);
+	write_reg8(0xf01, 0x00);
+}
+
+/**
+ * @brief   This function serves to reset RF Tx/Rx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_tx_rx_off(void)
+{
+	write_reg8(0xf16, 0x29);
+	write_reg8(0x428, RF_TRX_MODE);	// rx disable
+	write_reg8(0xf02, RF_TRX_OFF);	// reset tx/rx state machine
+}
+
+/**
+ * @brief   This function serves to turn off RF auto mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_tx_rx_off_auto_mode(void)
+{
+	write_reg8(0xf00, 0x80);
+}
+
+/**
+ * @brief   This function serves to set RF Tx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_txmode(void)
+{
+	write_reg8(0xf02, RF_TRX_OFF | BIT(4));// TX enable
+}
+
+/**
+ * @brief   This function serves to set RF Tx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_rxmode(void)
+{
+    write_reg8(0x428, RF_TRX_MODE | BIT(0));// rx enable
+    write_reg8(0xf02, RF_TRX_OFF | BIT(5));// RX enable
+}
+
+/**
+ *	@brief	  	This function serves to  reconfigure the buffer
+ *	@param[out]	RF_RxAddr  	Pointer for Rx buffer in RAM(Generally it is starting
+ *							address of an array.Should be 4-byte aligned)
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline void rf_rx_buffer_reconfig(unsigned char *RF_RxAddr)
+{
+	reg_dma2_addr = (unsigned short)((unsigned int)RF_RxAddr);
+}
+
+/**
+ *	@brief	  	This function serves to get rssi
+ *   @param[in]      none
+ *	@return	 	none
+ */
+static inline signed char rf_rssi_get_154(void)
+{
+	return (((signed char)(read_reg8(0x441))) - 110);
+}
+
+/**
+ *	@brief	  	This function serves to determine whether sending a packet of data is finished
+ *	@param[in]	none.
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline unsigned char rf_tx_finish(void)
+{
+    return ((read_reg8(0xf20) & BIT(1)) == 0x02);
+}
+
+/**
+ *	@brief	  	This function serves to clear the Tx finish flag bit.
+ *				After all packet data are sent, corresponding Tx finish flag bit
+ *				will be set as 1.By reading this flag bit, it can check whether
+ *				packet transmission is finished. After the check, it's needed to
+ *				manually clear this flag bit so as to avoid misjudgment.
+ *   @param      none
+ *	@return	 	none
+ */
+static inline void rf_tx_finish_clear_flag(void)
+{
+    write_reg8(0xf20, 0x02);
+}
+
+/**
+ *	@brief	  	This function serves to determine whether sending a packet of rf_tx_acc_code_select is finished
+ *	@param[in]	none.
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline unsigned char rf_rx_finish(void)
+{
+    return ((read_reg8(0xf20) & BIT(0)) == 0x01);
+}
+
+/**
+ *	@brief	  	This function serves to clear the Rx finish flag bit.
+ *				After all packet data are resive, corresponding Rx finish flag bit
+ *				will be set as 1.By reading this flag bit, it can check whether
+ *				packet transmission is finished. After the check, it's needed to
+ *				manually clear this flag bit so as to avoid misjudgment.
+ *  @param      none
+ *	@return	 	none
+ */
+static inline void rf_rx_finish_clear_flag(void)
+{
+    write_reg8(0xf20, 0x01);
+}
+
+/**
+ * @brief      This function to correct cap value
+ * @param[in]  addr - flash address, where is the correct cap value
+ * @return     none
+ */
+static inline void rf_drv_cap(unsigned long addr)
+{
+	unsigned char cap = 0xff;
+	flash_read_page(addr, 1, &cap);
+	if(cap != 0xff){
+		cap &= 0x3f;
+		analog_write(0x8a, (analog_read(0x8a) & 0xc0) | cap);
+	}
+}
+
+/**
+ * @brief   This function serves to settle adjust for RF Tx.
+ * @param   txstl_us - adjust TX settle time.
+ * @return  none
+ */
+static inline void tx_settle_adjust(unsigned short txstl_us)
+{
+	REG_ADDR16(0xf04) = txstl_us;
+}
+
+/**
+ * @brief   This function serves to set pipe for RF Tx.
+ * @param   pipe - RF Optional range .
+ * @return  none
+ */
+static inline void rf_set_tx_pipe(unsigned char pipe)
+{
+	write_reg8(0xf15, 0xf0 | pipe);
+}
+
+
+/**
+ * @brief   This function serves to judge the statue of  RF receive.
+ * @param   none.
+ * @return  none.
+ */
+static inline unsigned char is_rf_receiving_pkt(void)
+{
+	//if the value of [5:4] of the reg_0x448 is 0b10 or 0b11, it means that the RF is in the receiving packet phase.(confirmed by junwen)
+	return (((read_reg8(0x448)>>5)& 1) == 1);
+}
+
+
+/**
+ *	@brief     This function serves to initiate the mode of RF
+ *	@param[in] rf_mode  -  mode of RF
+ *	@return	   none.
+ */
+void rf_drv_init(RF_ModeTypeDef rf_mode);
+
+/**
+ * @brief   	This function serves to set RF power.
+ * @param[in]   RF_PowerTypeDef - the RF power types.
+ * @return  	none.
+ */
+void rf_set_power_level(RF_PowerTypeDef level);
+
+/**
+ * @brief   	This function serves to set RF power level index.
+ * @param[in]   RF_PowerIndexTypeDef - the RF power level index types.
+ * @return  	none.
+ */
+void rf_set_power_level_index(RF_PowerIndexTypeDef level);
+
+/**
+ * @brief   	This function serves to set RF's channel.
+ * @param[in]   chn - RF channel.
+ * @param[in]   set - the value to set.
+ * @return  	none.
+ */
+void rf_set_channel(signed char chn, unsigned short set);
+
+/**
+ *	@brief	  	This function serves to judge RF Tx/Rx state.
+ *	@param[in]	rf_status - Tx/Rx status.
+ *	@param[in]	rf_channel - RF channel.
+ *	@return	 	failed -1,else success.
+ */
+int rf_trx_state_set(RF_StatusTypeDef rf_status, signed char rf_channel);
+
+/**
+ *	@brief	  	This function serves to get RF status.
+ *	@param[in]	none.
+ *	@return	 	RF Rx/Tx status.
+ */
+RF_StatusTypeDef rf_trx_state_get(void);
+
+/**
+ *	@brief	  	This function serves to start Tx.
+ *	@param[in]	addr   Tx packet address in RAM. Should be 4-byte aligned.
+ *	@param[in]	tick  Tick value of system timer.
+ *	@return	 	none
+ */
+void rf_start_stx(void *addr, unsigned int tick);
+
+/**
+ *	@brief	  	This function serves to start Rx.
+ *	@param[in]	tick  Tick value of system timer.
+ *	@return	 	none
+ */
+void rf_start_srx(unsigned int tick);
+
+/**
+ *	@brief	  	This function serves to set RF Tx packet.
+ *	@param[in]	rf_txaddr - the address RF to send packet.
+ *	@return	 	none.
+ */
+void rf_tx_pkt(unsigned char *rf_txaddr);
+
+/**
+ *	@brief	  	This function is to set rx buffer
+ *
+ *	@param[out]	RF_RxAddr  	Pointer for Rx buffer in RAM(Generally it is starting
+ *							address of an array.Should be 4-byte aligned)
+ *	@param[in]	size   		Rx buffer size (It is an integral multiple of 16)
+ *	@param[in]	PingpongEn 	Enable/Disable Ping-Pong buffer Enable or Disable
+ *							Note:
+ *							When PingpongEn is set as 0, received RF data will
+ *							be stored in RAM pointed by RF_RxAddr.
+ *							When PingpongEn is set as 1, received RF data will
+ *							be stored in buffer0 and buffer1 successively.
+ *							The RAM size reserved for received RF data should be
+ *							double of Size.
+ *
+ *	@return	 	none
+ */
+void rf_rx_buffer_set(unsigned char *RF_RxAddr, int size, unsigned char PingpongEn);
+
+/**
+ * @brief      This function
+ * @param[in]  size - the expected size of dma2
+ * @param[in]  PingpongEn - the flag of g_RFRxPingpongEn
+ * @return     none
+ */
+void rf_rx_cfg(int size, unsigned char PingpongEn);
+
+/**
+ * @brief      This function is to disable PN
+ * @return     none
+ */
+void rf_pn_disable(void);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi.h
new file mode 100644
index 00000000..757f9050
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi.h
@@ -0,0 +1,182 @@
+/********************************************************************************************************
+ * @file    spi.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef SPI_H
+#define SPI_H
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ *  @brief  Define pin for SPI interface
+ *  		SDO  SDI  SCK  CN
+ *  		A2   A3   A4   D6
+ *  		B7   B6   D7   D2
+ */
+
+typedef enum {
+	SPI_GPIO_GROUP_A2A3A4D6=0,
+	SPI_GPIO_GROUP_B6B7D2D7,
+}SPI_GPIO_GroupTypeDef;
+
+
+/**
+ *  @brief  Define the mode for SPI interface
+ */
+typedef enum {
+    SPI_MODE0 = 0,
+    SPI_MODE2,
+    SPI_MODE1,
+    SPI_MODE3,
+} SPI_ModeTypeDef;
+
+/**
+ *  @brief  Define the clk for SPI interface(system clock = 24M)
+ */
+typedef enum {
+    SPI_CLK_200K = 0x3c,
+    SPI_CLK_250K = 0x2e,
+    SPI_CLK_500K = 0x17,
+    SPI_CLK_1M   = 0x0b,
+    SPI_CLK_2M   = 0x05,
+    SPI_CLK_4M   = 0x02,
+} SPI_24M_ClkTypeDef;
+
+
+/**
+ * @brief This function reset SPI module.
+ * @param[in] none
+ * @return none
+ */
+static inline void reset_spi_moudle(void)
+{
+	reg_rst0 |= FLD_RST0_SPI;
+	reg_rst0 &= (~FLD_RST0_SPI);
+}
+/**
+ * @brief     This function selects a pin port for the SPI interface (master mode)
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ *  A3:5b7[0] set 1 as spi input,set 0 not as spi input ;5b7[4] set 1 as i2c input ,set 0 not as i2c input
+ *	A4:5b7[1] set 1 as spi input,set 0 not as spi input ;5b7[5] set 1 as i2c input ,set 0 not as i3c input
+ *	B6:5b7[2] set 1 as spi input,set 0 not as spi input ;5b7[6] set 1 as i2c input ,set 0 not as i4c input
+ *	D7:5b7[3] set 1 as spi input,set 0 not as spi input ;5b7[7] set 1 as i2c input ,set 0 not as i5c input
+ *	5b6[7:4]  set spi or i2c output,5b6[5:4] PA spi sel, 5b6[6] PB spi sel,5b6[7] PD spi_sel
+ *	spi i2c mux sel:
+ *	step1:close gpio func;
+ *	step2:set 0x5a8-0x5af sel spii2c func;
+ *	step3:set 5b6[7:4] to sel spi or i2c output;
+ *	step4:set 5b7[7:0] to sel spi or i2c input;
+ *	step5 if use pd[6]as spi slave csn,need to open pd[2] gpio func,because pd[2]have high priority than pd[6]
+ */
+extern void spi_master_gpio_set(SPI_GPIO_GroupTypeDef PinGrp);
+
+/**
+ * @brief     This function selects a pin port for the SPI interface (slave mode)
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ *  A3:5b7[0] set 1 as spi input,set 0 not as spi input ;5b7[4] set 1 as i2c input ,set 0 not as i2c input
+ *	A4:5b7[1] set 1 as spi input,set 0 not as spi input ;5b7[5] set 1 as i2c input ,set 0 not as i3c input
+ *	B6:5b7[2] set 1 as spi input,set 0 not as spi input ;5b7[6] set 1 as i2c input ,set 0 not as i4c input
+ *	D7:5b7[3] set 1 as spi input,set 0 not as spi input ;5b7[7] set 1 as i2c input ,set 0 not as i5c input
+ *	5b6[7:4]  set spi or i2c output,5b6[5:4] PA spi sel, 5b6[6] PB spi sel,5b6[7] PD spi_sel
+ *	spi i2c mux sel:
+ *	step1:close gpio func;
+ *	step2:set 0x5a8-0x5af sel spii2c func;
+ *	step3:set 5b6[7:4] to sel spi or i2c output;
+ *	step4:set 5b7[7:0] to sel spi or i2c input;
+ *	step5 if use pd[6]as spi slave csn,need to open pd[2] gpio func,because pd[2]have high priority than pd[6]
+ */
+
+extern void spi_slave_gpio_set(SPI_GPIO_GroupTypeDef PinGrp);
+
+/**
+ * @brief     This function selects a GPIO pin as CS of SPI function.
+ * @param[in] CSPin - the selected CS pin
+ * @return    none
+ */
+
+extern void spi_masterCSpin_select(GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ *            Telink spi supports four standard working modes
+ *            register  0x0b set working mode
+ *            bit0:CPOL-Clock Polarity  ; bit1:CPHA-Clock Phase
+ *            MODE0: CPOL = 0 , CPHA =0;
+ *            MODE1: CPOL = 0 , CPHA =1;
+ *            MODE2: CPOL = 1 , CPHA =0;
+ *            MODE3: CPOL = 1 , CPHA =1;
+ * @return    none
+ */
+extern void spi_master_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module (slave mode)
+ * @return    none
+ */
+extern void spi_slave_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+/**
+ * @brief      This function serves to write a bulk of data to the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the
+ *             slave device first before the writing operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes
+ * @param[in]  Data - pointer to the data need to write
+ * @param[in]  DataLen - length in byte of the data need to write
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void spi_write(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief      This function serves to read a bulk of data from the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the
+ *             slave device first before the reading operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes
+ * @param[out] Data - pointer to the buffer that will cache the reading out data
+ * @param[in]  DataLen - length in byte of the data need to read
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void spi_read(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief 		This function use to set the share mode of SPI.
+ * @param[in] 	none
+ * @return 		none
+ */
+extern void spi_set_share_mode_en(void);
+
+#endif
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi_i.h
new file mode 100644
index 00000000..42889feb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/spi_i.h
@@ -0,0 +1,101 @@
+/********************************************************************************************************
+ * @file    spi_i.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "compiler.h"
+
+/**
+ * @brief     This function servers to set the spi wait.
+ * @param[in] none
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_wait(void){
+	while(reg_mspi_ctrl & FLD_MSPI_BUSY)
+		;
+}
+
+/**
+ * @brief     This function servers to set the spi high level.
+ * @param[in] none
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_high(void){
+	reg_mspi_ctrl = FLD_MSPI_CS;
+}
+
+/**
+ * @brief     This function servers to set the spi low level.
+ * @param[in] none
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_low(void){
+	reg_mspi_ctrl = 0;
+}
+
+/**
+ * @brief     This function servers to gets the spi data.
+ * @param[in] none.
+ * @return    the spi data.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_get(void){
+	return reg_mspi_data;
+}
+
+/**
+ * @brief     This function servers to write the spi.
+ * @param[in] c - the char need to be write.
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_write(unsigned char c){
+	reg_mspi_data = c;
+}
+
+/**
+ * @brief     This function servers to control the write.
+ * @param[in] c - need to be write.
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_ctrl_write(unsigned char c){
+	reg_mspi_ctrl = c;
+}
+
+/**
+ * @brief     This function servers to spi read.
+ * @param[in] none.
+ * @return    read reault.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_read(void){
+	mspi_write(0);		// dummy, issue clock
+	mspi_wait();
+	return mspi_get();
+}
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/timer.h
new file mode 100644
index 00000000..2650c199
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/timer.h
@@ -0,0 +1,198 @@
+/********************************************************************************************************
+ * @file    timer.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef TIMER_H_
+#define TIMER_H_
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ * @brief   Type of Timer
+ */
+typedef enum{
+	TIMER0		=0,
+	TIMER1		=1,
+	TIMER2		=2,
+}TIMER_TypeDef;
+
+/**
+ * @brief   Mode of Timer
+ */
+typedef enum{
+	TIMER_MODE_SYSCLK		=0,
+	TIMER_MODE_GPIO_TRIGGER	=1,
+	TIMER_MODE_GPIO_WIDTH	=2,
+	TIMER_MODE_TICK			=3,
+}TIMER_ModeTypeDef;
+
+#define	    sys_tick_per_us   				16
+#define		CLOCK_SYS_CLOCK_1250US			(1250 * sys_tick_per_us)
+
+/**
+ * @brief   system Timer : 16Mhz, Constant
+ */
+enum{
+	CLOCK_16M_SYS_TIMER_CLK_1S  = 16*1000*1000,
+	CLOCK_16M_SYS_TIMER_CLK_1MS = 16*1000,
+	CLOCK_16M_SYS_TIMER_CLK_1US = 16,
+};
+
+/**
+ * @brief     This function performs to gets system timer0 address.
+ * @param[in] none.
+ * @return    timer0 address.
+ */
+static inline unsigned long clock_time(void)
+{
+	return reg_system_tick;
+}
+
+/**
+ * @brief     This function performs to calculation exceed us of the timer.
+ * @param[in] ref - Variable of reference timer address.
+ * @param[in] span_us - Variable of span us.
+ * @return    the exceed.
+ */
+static inline unsigned int clock_time_exceed(unsigned int ref, unsigned int us)
+{
+	return ((unsigned int)(clock_time() - ref) > us * 16);
+}
+
+/*
+ * @brief     This function set to initial tick for timer.
+ * @param[in] type - the specified timer.
+ * @param[in] init_tick - initial tick value.
+ * @return    none
+ */
+static inline void timer_set_init_tick(TIMER_TypeDef type, unsigned int init_tick)
+{
+	reg_tmr_tick(type) = init_tick;
+}
+
+/*
+ * @brief     This function set to capture tick for timer.
+ * @param[in] type - the specified timer.
+ * @param[in] cap_tick - cap tick value.
+ * @return    none
+ */
+static inline void timer_set_cap_tick(TIMER_TypeDef type, unsigned int cap_tick)
+{
+	reg_tmr_capt(type) = cap_tick;
+}
+
+/*
+ * @brief     This function to enable the timer interrupt.
+ * @param[in] type - the specified timer.
+ * @return    none
+ */
+static inline void timer_irq_enable(TIMER_TypeDef type)
+{
+	reg_irq_mask |= (1 << type);
+}
+
+/*
+ * @brief     This function to enable the system timer interrupt.
+ * @param[in] type - the specified timer.
+ * @return    none
+ */
+static inline void stimer_irq_enable(void)
+{
+	reg_system_tick_mode |= FLD_SYSTEM_TICK_IRQ_EN;
+}
+
+/*
+ * @brief     This function set capture tick for system timer.
+ * @param[in] cap_tick - cap tick value.
+ * @return    none
+ */
+static inline void stimer_set_irq_capture(unsigned long cap_tick)
+{
+	reg_system_tick_irq = cap_tick;
+}
+
+/**
+ * @brief This function servers to set system timer irq mask.
+ * @param[in]	none.
+ * @return  	none.
+ */
+static inline void stimer_set_irq_mask(void)
+{
+	reg_irq_mask |= FLD_IRQ_SYSTEM_TIMER;
+}
+
+/**
+ * @brief This function servers to clear system timer irq mask.
+ * @param[in] 	none.
+ * @return  	none.
+ */
+static inline void stimer_clr_irq_mask(void)
+{
+	reg_irq_mask &= ~(unsigned long)FLD_IRQ_SYSTEM_TIMER;
+}
+
+/**
+ * @brief     set timer mode.
+ * @param[in] type - the specified timer.
+ * @param[in] mode - select mode for timer.
+ * @return    none
+ */
+void timer_set_mode(TIMER_TypeDef type, TIMER_ModeTypeDef mode);
+
+/**
+ * @brief     initiate GPIO for gpio trigger and gpio width mode of timer.
+ * @param[in] type - the specified timer.
+ * @param[in] pin - select pin for timer.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return    none
+ */
+void timer_gpio_init(TIMER_TypeDef type, GPIO_PinTypeDef pin, GPIO_PolTypeDef pol);
+
+/**
+ * @brief     the specifed timer start working.
+ * @param[in] type - select the timer to start.
+ * @return    none
+ */
+void timer_start(TIMER_TypeDef type);
+
+/**
+ * @brief     the specifed timer stop working.
+ * @param[in] type - select the timer to stop.
+ * @return    none
+ */
+void timer_stop(TIMER_TypeDef type);
+
+/**
+ * @brief     This function performs to set sleep us.
+ * @param[in] us - microseconds need to delay.
+ * @return    none
+ */
+void sleep_us(unsigned long us);
+
+#define ClockTime			clock_time
+#define WaitUs				sleep_us
+#define WaitMs(t)			sleep_us((t)*1000)
+#define sleep_ms(t)			sleep_us((t)*1000)
+#endif /* TIMER_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/uart.h
new file mode 100644
index 00000000..d835e9a2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/uart.h
@@ -0,0 +1,326 @@
+/********************************************************************************************************
+ * @file    uart.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef UART_H
+#define UART_H
+
+#include "register.h"
+#include "bit.h"
+#include "gpio.h"
+
+
+/**
+ *  @brief  Define mul bits
+ */
+enum{
+	UART_BW_MUL1  = 0,
+	UART_BW_MUL2  = 1,
+	UART_BW_MUL3  = 2,
+	UART_BW_MUL4  = 3,
+};
+
+/**
+ *  @brief  Define parity type
+ */
+typedef enum {
+    PARITY_NONE = 0,
+    PARITY_EVEN,
+    PARITY_ODD,
+} UART_ParityTypeDef;
+
+/**
+ *  @brief  Define the length of stop bit
+ */
+typedef enum {
+    STOP_BIT_ONE          = 0,
+    STOP_BIT_ONE_DOT_FIVE = BIT(4),
+    STOP_BIT_TWO          = BIT(5),
+} UART_StopBitTypeDef;
+
+/**
+ *  @brief  Define UART RTS mode
+ */
+typedef enum {
+    UART_RTS_MODE_AUTO = 0,
+    UART_RTS_MODE_MANUAL,
+} UART_RTSModeTypeDef;
+
+/**
+ *  @brief  Define UART TX pin:A2 B1 C2 D0 D3 D7
+ */
+
+typedef enum{
+	UART_TX_PA2 = GPIO_PA2,
+	UART_TX_PB1 = GPIO_PB1,
+	UART_TX_PC2 = GPIO_PC2,
+	UART_TX_PD0 = GPIO_PD0,
+	UART_TX_PD3 = GPIO_PD3,
+	UART_TX_PD7 = GPIO_PD7,
+}UART_TxPinDef;
+
+/**
+ *  @brief  Define UART RX pin: A0 B0 B7 C3 C5 D6
+ */
+typedef enum{
+	UART_RX_PA0 = GPIO_PA0,
+	UART_RX_PB0 = GPIO_PB0,
+	UART_RX_PB7 = GPIO_PB7,
+	UART_RX_PC3 = GPIO_PC3,
+	UART_RX_PC5 = GPIO_PC5,
+	UART_RX_PD6 = GPIO_PD6,
+}UART_RxPinDef;
+
+/**
+ *  @brief  Define UART CTS pin : A3 B2 C4 D1
+ */
+typedef enum{
+	UART_CTS_PA3 = GPIO_PA3,
+	UART_CTS_PB2 = GPIO_PB2,
+	UART_CTS_PC4 = GPIO_PC4,
+	UART_CTS_PD1 = GPIO_PD1,
+}UART_CtsPinDef;
+
+/**
+ *  @brief  Define UART RTS pin : A4  B3 B6 C0
+ */
+typedef enum{
+	UART_RTS_PA4 = GPIO_PA4,
+	UART_RTS_PB3 = GPIO_PB3,
+	UART_RTS_PB6 = GPIO_PB6,
+	UART_RTS_PC0 = GPIO_PC0,
+}UART_RtsPinDef;
+
+//use this index to cycle the four register of uart. this index should be reset to 0,when send data after system wakeup.
+extern unsigned char uart_TxIndex;
+
+/**
+ * @brief     This function serves to indicate Tx state. 
+ * 			  Before entering power-saving mode,you need to call this function in order to ensure that the data sent is completed
+ * @param[in] none.
+ * @return    the state of Tx 0:Tx done 1:not.
+ */
+static inline unsigned char uart_tx_is_busy(void)
+{
+    return ( (reg_uart_status1 & FLD_UART_TX_DONE) ? 0 : 1) ;
+}
+
+/**
+ * @brief     This function is used to set the 'uart_TxIndex' to 0.
+ *			  After wakeup from power-saving mode, you must call this function before sending the data.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline void uart_ndma_clear_tx_index(void)
+{
+    uart_TxIndex=0;
+}
+
+/**
+ * @brief     This function resets the UART module.
+ * @param[in] none
+ * @return    none
+ */
+static inline void uart_reset(void)
+{
+	reg_rst0 |= FLD_RST0_UART;
+	reg_rst0 &= (~FLD_RST0_UART);
+}
+
+
+/**
+ * @brief      	This function initializes the UART module.
+ * @param[in]  	g_uart_div  -  uart clock divider
+ * @param[in]  	g_bwpc      -  bitwidth, should be set to larger than
+ *
+ *  			sys_clk      baud rate   g_uart_div         g_bwpc
+ *
+ *	  	  	  	16Mhz        9600          118   			 13
+ *           	 	 	 	 19200         118     			 6
+ *          	 	 	 	 115200         9       		 13
+ *
+ *	  	  	  	24Mhz        9600          249       		 9
+ *           	 	 	 	 19200		   124               9
+ *           	 	 	 	 115200         12    			 15
+ *
+ *	  	  	  	32Mhz        9600          235       		 13
+ *           	 	 	 	 19200		   235               6
+ *           	 	 	 	 115200         18    			 13
+ *
+ *	  	  	  	48Mhz        9600          499       		 9
+ *           	 	 	 	 19200		   249               9
+ *           	 	 	 	 115200         25    			 15
+ *
+ * @param[in]  Parity      - selected parity type for UART interface
+ * @param[in]  StopBit     - selected length of stop bit for UART interface
+ * @return     none
+ */
+extern void uart_init(unsigned short g_uart_div, unsigned char g_bwpc, UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit);
+
+/**
+ * @brief      This function initializes the UART module.
+ * @param[in]  Baudrate  	- uart baud rate
+ * @param[in]  System_clock - clock of system
+ * @param[in]  Parity      	- selected parity type for UART interface
+ * @param[in]  StopBit     	- selected length of stop bit for UART interface
+ * @return     none
+ */
+extern void uart_init_baudrate(unsigned int Baudrate,unsigned int System_clock , UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit);
+
+/**
+ * @brief     enable uart DMA mode
+ * @param[in] none
+ * @return    none
+ */
+extern void uart_dma_enable(unsigned char rx_dma_en, unsigned char tx_dma_en);
+
+/**
+ * @brief     config the irq of uart tx and rx
+ * @param[in] rx_irq_en - 1:enable rx irq. 0:disable rx irq
+ * @param[in] tx_irq_en - 1:enable tx irq. 0:disable tx irq
+ * @return    none
+ */
+extern void uart_irq_enable(unsigned char rx_irq_en, unsigned char tx_irq_en);
+/**
+ * @brief     uart send data function with not DMA method.
+ *            variable uart_TxIndex,it must cycle the four registers 0x90 0x91 0x92 0x93 for the design of SOC.
+ *            so we need variable to remember the index.
+ * @param[in] uartData - the data to be send.
+ * @return    none
+ */
+extern void uart_ndma_send_byte(unsigned char uartData);
+
+/**
+ * @brief     config the number level setting the irq bit of status register 0x9d
+ *            ie 0x9d[3].
+ *            If the cnt register value(0x9c[0,3]) larger or equal than the value of 0x99[0,3]
+ *            or the cnt register value(0x9c[4,7]) less or equal than the value of 0x99[4,7],
+ *            it will set the irq bit of status register 0x9d, ie 0x9d[3]
+ * @param[in] rx_level - receive level value. ie 0x99[0,3]
+ * @param[in] tx_level - transmit level value.ie 0x99[4,7]
+ * @return    none
+ */
+extern void uart_ndma_irq_triglevel(unsigned char rx_level, unsigned char tx_level);
+
+/**
+ * @brief     get the status of uart irq.
+ * @param[in] none
+ * @return    0: not uart irq ;
+ *            not 0: indicate tx or rx irq
+ */
+extern unsigned char uart_ndmairq_get(void);
+
+/**
+ * @brief     uart send data function, this  function tell the DMA to get data from the RAM and start
+ *            the DMA transmission
+ * @param[in] Addr - pointer to the buffer containing data need to send
+ * @return    1: send success ;
+ *            0: DMA busy
+ */
+extern unsigned char uart_dma_send(unsigned char* Addr);
+
+/**
+ * @brief     uart send data function, this  function tell the DMA to get data from the RAM and start
+ *            the DMA transmission
+ * @param[in] byte - single byte data need to send
+ * @return    1: send success ;
+ *            0: DMA busy
+ */
+extern unsigned char uart_send_byte(unsigned char byte);
+/**
+ * @brief     data receive buffer initiate function. DMA would move received uart data to the address space,
+ *            uart packet length needs to be no larger than (recBuffLen - 4).
+ * @param[in] RecvAddr - pointer to the receiving buffer
+ * @param[in] RecvBufLen - length in byte of the receiving buffer
+ * @return    none
+ */
+extern void uart_recbuff_init(unsigned char *RecvAddr, unsigned short RecvBufLen);
+
+/**
+ * @brief     This function determines whether parity error occurs once a packet arrives.
+ * @param[in] none
+ * @return    1: parity error ;
+ *            0: no parity error
+ */
+extern unsigned char uart_is_parity_error(void);
+
+/**
+ * @brief     This function clears parity error status once when it occurs.
+ * @param[in] none
+ * @return    none
+ *
+ * Note:
+ *(1)DMA mode
+ * RX FIFO will also be cleared when parity error flag is cleared .
+ *(2)NON-DMA mode
+ * When parity error occurs, clear parity error flag after UART receives the data.
+ * Cycle the four registers (0x90 0x91 0x92 0x93) from register "0x90" to get data when UART receives the data next time.
+ */
+extern void uart_clear_parity_error(void);
+
+/**
+ * @brief     UART hardware flow control configuration. Configure RTS pin.
+ * @param[in] Enable - enable or disable RTS function.
+ * @param[in] Mode - set the mode of RTS(auto or manual).
+ * @param[in] Thresh - threshold of trig RTS pin's level toggle(only for auto mode),
+ *                     it means the number of bytes that has arrived in Rx buf.
+ * @param[in] Invert - whether invert the output of RTS pin(only for auto mode)
+ * @param[in] pin   - RTS pin select,it can be GPIO_PA4/GPIO_PB3/GPIO_PB6/GPIO_PC0.
+ * @return    none
+ */
+extern void uart_set_rts(unsigned char Enable, UART_RTSModeTypeDef Mode, unsigned char Thresh, unsigned char Invert, UART_RtsPinDef pin);
+
+/**
+ * @brief     This function sets the RTS pin's level manually
+ * @param[in] Polarity - set the output of RTS pin(only for manual mode)
+ * @return    none
+ */
+extern void uart_set_rts_level(unsigned char Polarity);
+
+/**
+ * @brief      UART hardware flow control configuration. Configure CTS pin.
+ * @param[in]  Enable - enable or disable CTS function.
+ * @param[in]  Select - when CTS's input equals to select, tx will be stopped
+ * @param[in]  pin   - CTS pin select,it can be GPIO_PA3/GPIO_PB2/GPIO_PC4/GPIO_PD1.
+ * @return     none
+ */
+extern void uart_set_cts(unsigned char Enable, unsigned char Select, UART_CtsPinDef pin);
+
+/**
+* @brief      This function serves to select pin for UART module.
+* @param[in]  tx_pin   - the pin to send data.
+* @param[in]  rx_pin   - the pin to receive data.
+* @return     none
+*/
+extern void uart_gpio_set(UART_TxPinDef tx_pin, UART_RxPinDef rx_pin);
+
+/**
+ * @brief   This function enables error data irq of UART module
+ * @param[in] none
+ * @return    none
+ */
+extern void uart_mask_error_irq_enable(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw.h
new file mode 100644
index 00000000..ff631aa0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw.h
@@ -0,0 +1,153 @@
+/********************************************************************************************************
+ * @file    usbhw.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "analog.h"
+#include "usbhw_i.h"
+#include "gpio.h"
+
+enum {
+	USB_EDP_PRINTER_IN 		= 8, 	// endpoint 8 is alias of enpoint 0,  becareful.  // default hw buf len = 64
+	USB_EDP_MOUSE 			= 2,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_IN 	= 1,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_OUT 	= 3,	// default hw buf len = 16
+	USB_EDP_AUDIO_IN 		= 4,	// default hw buf len = 64
+	USB_EDP_PRINTER_OUT 	= 5,	// default hw buf len = 64
+	USB_EDP_SPEAKER 		= 6,	// default hw buf len = 16
+	USB_EDP_MIC 			= 7,	// default hw buf len = 16
+#if(USB_GAMEPAD_ENABLE)
+	USB_EDP_GAMEPAD_IN 		= 3,	// default hw buf len = 64
+	USB_EDP_GAMEPAD_OUT 	= 5,	// default hw buf len = 64
+#endif
+	USB_EDP_MS_IN 			= USB_EDP_PRINTER_IN,	// mass storage
+	USB_EDP_MS_OUT 			= USB_EDP_PRINTER_OUT,
+	USB_EDP_SOMATIC_IN 		= USB_EDP_AUDIO_IN,		//  when USB_SOMATIC_ENABLE, USB_EDP_PRINTER_OUT disable
+	USB_EDP_SOMATIC_OUT 	= USB_EDP_PRINTER_OUT,
+    USB_EDP_CDC_IN 			= 4,
+    USB_EDP_CDC_OUT 		= 5,
+};
+
+// #defined in the standard spec
+enum {
+	USB_HID_AUDIO       	= 2,
+	USB_HID_MOUSE       	= 1,
+	USB_HID_KB_MEDIA    	= 3,// media
+	USB_HID_KB_SYS      	= 4,// system : power,sleep,wakeup
+#if(USB_GAMEPAD_ENABLE)
+	USB_HID_GAMEPAD			= 5,// somatic sensor,  may have many report ids
+#endif
+	USB_HID_SOMATIC			= 5,// somatic sensor,  may have many report ids
+};
+
+/**
+ * @brief      This function enables or disables the internal pull-up resistor
+ *             of DP pin of USB interface
+ * @param[in]  En - enables or disables the internal pull-up resistor(1: enable 0: disable)
+ * @return     none
+ */
+static inline void usb_dp_pullup_en(int en)
+{
+	unsigned char dat = analog_read(0x0b);
+	if(en){
+		dat = dat | BIT(7);
+	}else{
+		dat = dat & 0x7f ;
+	}
+
+	analog_write(0x0b, dat);
+}
+
+/**
+ * @brief      This function serves to power on or down USB module
+ * @param[in]  En - 1: power on 0: power down
+ * @return     none
+ */
+static inline void usb_power_on(unsigned char en)
+{
+	if(en){
+		analog_write(0x34, analog_read(0x34) & 0xfd);
+	}else{
+		analog_write(0x34, analog_read(0x34) | 0x02);
+	}
+}
+
+/**
+ * @brief      This function serves to set GPIO MUX function as DP and DM pin of USB
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void usb_set_pin_en(void)
+{
+	//clear DP first
+	gpio_set_func(GPIO_PA6, AS_GPIO);
+	gpio_set_output_en(GPIO_PA6, 1);
+	gpio_write(GPIO_PA6, 0);
+
+	gpio_set_func(GPIO_PA5, AS_USB);
+	gpio_set_func(GPIO_PA6, AS_USB);
+	usb_dp_pullup_en(1);
+}
+
+/**
+ * @brief      This function disables the manual interrupt
+ *             (Endpont8 is the alias of endpoint0)
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_disable_manual_interrupt(int m);
+
+/**
+ * @brief      This function enable the manual interrupt
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_enable_manual_interrupt(int m);
+
+/**
+ * @brief      This function sends a bulk of data to host via the specified endpoint
+ * @param[in]  ep - the number of the endpoint
+ * @param[in]  data - pointer to the data need to send
+ * @param[in]  len - length in byte of the data need to send
+ * @return     none
+ */
+void usbhw_write_ep(unsigned int ep, unsigned char * data, int len);
+
+/**
+ * @brief      This function sends two bytes data to host via the control endpoint
+ *             (handy help function)
+ * @param[in]  v - the two bytes data need to send
+ * @return     none
+ */
+void usbhw_write_ctrl_ep_u16(unsigned short v);
+
+/**
+ * @brief   This function reads two bytes data from host via the control endpoint
+ * @param   none
+ * @return  the two bytes data read from the control endpoint
+ */
+unsigned short usbhw_read_ctrl_ep_u16(void);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw_i.h
new file mode 100644
index 00000000..8aac6fc1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/usbhw_i.h
@@ -0,0 +1,196 @@
+/********************************************************************************************************
+ * @file    usbhw_i.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+/**
+ * @brief     This function servers to reset the pointer of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ctrl_ep_ptr(void) {
+	reg_ctrl_ep_ptr = 0;
+}
+
+/**
+ * @brief     This function servers to get the irq status of control Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_ctrl_ep_irq(void) {
+	return reg_ctrl_ep_irq_sta;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of control Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_ctrl_ep_irq(int ep) {
+	reg_ctrl_ep_irq_sta = ep;
+}
+
+/**
+ * @brief     This function servers to set the value of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_write_ctrl_ep_ctrl(unsigned char data) {
+	reg_ctrl_ep_ctrl = data;
+}
+
+/**
+ * @brief     This function servers to read the data of control Endpoint.
+ * @param[in] none.
+ * @return    the value of control Endpoint
+ */
+static inline unsigned char usbhw_read_ctrl_ep_data(void) {
+	return reg_ctrl_ep_dat;
+}
+
+/**
+ * @brief     This function servers to write the data of control Endpoint.
+ * @param[in] data -  the value of control Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ctrl_ep_data(unsigned char data) {
+	reg_ctrl_ep_dat = data;
+}
+
+/**
+ * @brief     This function servers to determine whether control Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline int usbhw_is_ctrl_ep_busy(void) {
+	return reg_ctrl_ep_irq_sta & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to reset the pointer of Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ep_ptr(unsigned int ep) {
+	reg_usb_ep_ptr(ep & 0x07) = 0;
+}
+
+/**
+ * @brief     This function servers to set the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_set_eps_irq_mask(unsigned char mask){
+	reg_usb_mask|=mask;
+}
+
+/**
+ * @brief     This function servers to clr the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq_mask(unsigned char mask){
+	reg_usb_mask &=(~mask);
+}
+
+/**
+ * @brief     This function servers to get the irq status of Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_eps_irq(void) {
+	return reg_usb_irq;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq(int ep) {
+	reg_usb_irq = ep;
+}
+
+/**
+ * @brief     This function servers to read the data of Endpoint.
+ * @param[in] none.
+ * @return    the value of Endpoint
+ */
+static inline unsigned char usbhw_read_ep_data(unsigned int ep) {
+	return reg_usb_ep_dat(ep & 0x07);
+}
+
+/**
+ * @brief     This function servers to write the data of Endpoint.
+ * @param[in] data -  the value of Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ep_data(unsigned int ep, unsigned char data) {
+	reg_usb_ep_dat(ep & 0x07) = data;
+}
+
+/**
+ * @brief     This function servers to determine whether Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline unsigned int usbhw_is_ep_busy(unsigned int ep) {
+	return reg_usb_ep_ctrl(ep & 0x07) & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to ack.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_ack(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to stall.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_stall(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_STALL;
+}
+
+/**
+ * @brief     This function servers to set the threshold of printer.
+ * @param[in] th - set the threshold for printer
+ * @return    none.
+ */
+static inline void usbhw_set_printer_threshold(unsigned char th) {
+	reg_usb_ep8_send_thre = th;
+}
+
+/**
+ * @brief     This function servers to set ed8 to fifo mode.
+ * @return    none.
+ */
+static inline void usbhw_set_ep8_fifo_mode(void) {
+	reg_usb_ep8_fifo_mode |= FLD_USB_ENP8_FIFO_MODE;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/watchdog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/watchdog.h
new file mode 100644
index 00000000..a24ecbe7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8258/watchdog.h
@@ -0,0 +1,74 @@
+/********************************************************************************************************
+ * @file    watchdog.h
+ *
+ * @brief   This is the header file for B85
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "register.h"
+#include "bit.h"
+
+/**
+ * @brief     This function set the seconds period.It is likely with WD_SetInterval.
+ *            Just this function calculate the value to set the register automatically .
+ * @param[in] period_s - The seconds to set. unit is second
+ * @return    none
+ */
+static inline void wd_set_interval_ms(unsigned int period_ms)
+{
+	static unsigned short tmp_period_ms = 0;
+	tmp_period_ms = (period_ms*1000*system_clk_mHz>>18);
+	reg_tmr2_tick = 0x00000000;    //reset tick register
+	reg_tmr_ctrl &= (~FLD_TMR_WD_CAPT);
+	reg_tmr_ctrl |= (tmp_period_ms<<9); //set the capture register
+}
+
+/**
+ * @brief     start watchdog. ie enable watchdog
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_start(void){
+	BM_SET(reg_tmr_ctrl, FLD_TMR2_EN);
+	BM_SET(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+/**
+ * @brief     stop watchdog. ie disable watchdog
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_stop(void){
+	BM_CLR(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+
+/**
+ * @brief     clear watchdog.
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_clear(void)
+{
+	reg_tmr_sta = FLD_TMR_STA_WD;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/adc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/adc.h
new file mode 100644
index 00000000..185c35f5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/adc.h
@@ -0,0 +1,392 @@
+/********************************************************************************************************
+ * @file    adc.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include "bit.h"
+#include "bsp.h"
+
+
+#define INTER_RESIS_ONE_THIRD_EN  1
+
+typedef enum {
+	Battery_Chn_VCC,
+	Battery_Chn_B7,
+}BATT_ChnTypeDef;
+
+/**
+ *  ADC reference voltage
+ */
+typedef enum {
+	RV_1P428,
+	RV_AVDD,
+	RV_1P224,
+}ADC_RefVolTypeDef;
+
+/**
+ *ADC resolution
+ */
+typedef enum {
+	RES7,
+	RES9,
+	RES10,
+	RES11,
+	RES12,
+	RES13,
+	RES14,
+}ADC_ResTypeDef;
+
+/**
+ *ADC Sampling time
+ */
+typedef enum {
+	S_3,
+	S_6,
+	S_9,
+	S_12,
+	S_18,
+	S_24,
+	S_48,
+	S_144,
+}ADC_SampCycTypeDef;
+
+/**
+ *ADC analog input channel selection enum
+ */
+typedef enum {
+	NOINPUT,
+	C0,
+	C1,
+	C6,
+	C7,
+	B0,
+	B1,
+	B2,
+	B3,
+	B4,
+	B5,
+	B6,
+	B7,
+	PGAVOM,
+	PGAVOP,
+	TEMSENSORN,
+	TEMSENSORP,
+	AVSS,
+	OTVDD,//1/3 voltage division detection
+}ADC_InputPTypeDef;
+/**
+ *ADC channel input mode
+ */
+typedef enum {
+	SINGLEEND,
+	INVERTB_1,
+	INVERTB_3,
+	PGAVOPM,
+}ADC_InputMTypeDef;
+
+/**
+ *
+ */
+ #define    REG_ADC_CLK_STEP        READ_REG8(0x69)
+ enum{
+ 	ADC_STEP_L    = BIT_RNG(0,7),
+ 	ADC_CLK_STEP  = BIT_RNG(0,7),
+ };
+ #define    REG_ADC_CLK_MODE        READ_REG8(0x6a)
+ enum{
+ 	ADC_MODE_L    = BIT_RNG(0,7),
+ 	ADC_CLK_MODE  = BIT_RNG(0,7),
+ };
+/**
+ *
+ */
+#define    ADC_STEP_MODE            READ_REG8(0x6b)
+enum{
+	ADC_CLK_EN = BIT(7),
+	ADC_STEP_H = BIT_RNG(4,6),
+	ADC_MODE_H = BIT_RNG(0,3),
+};
+#define    EN_ADCCLK                ADC_STEP_MODE |= (ADC_CLK_EN)
+#define    DIS_ADCCLK               ADC_STEP_MODE &= (~ADC_CLK_EN)
+
+#define    SET_ADC_STEP(v)  do{\
+								REG_ADC_CLK_STEP = (unsigned char)(v);\
+								ADC_STEP_MODE &= (~ADC_STEP_H);\
+								ADC_STEP_MODE |= ((((unsigned char)((v)>>8))&0x07)<<4);\
+							}while(0)
+
+#define    SET_ADC_MODE(v)  do{\
+								REG_ADC_CLK_MODE = (unsigned char)(v);\
+								ADC_STEP_MODE &= (~ADC_MODE_H);\
+								ADC_STEP_MODE |= (((unsigned char)((v)>>8))&0x0F);\
+							}while(0)
+
+ /**
+ *
+ */
+#define    ADC_REF_VOL              READ_REG8(0x2b)
+enum{
+	ADC_MISC_REF_V  = BIT_RNG(0,1),
+	ADC_LEFT_REF_V  = BIT_RNG(2,3),
+};
+#define    SET_MISC_REF_VOL(v)	do{\
+									ADC_REF_VOL &= (~ADC_MISC_REF_V);\
+									ADC_REF_VOL |= (unsigned char)((v)&0x03);\
+								}while(0)
+
+#define    SET_LEFT_REF_VOL(v)  do{\
+									ADC_REF_VOL &= (~ADC_LEFT_REF_V);\
+									ADC_REF_VOL |= (((unsigned char)((v)&0x03))<<2);\
+								}while(0)
+ /**
+ *
+ */
+ #define    REG_ADC_MISC_INPUT      READ_REG8(0x2c)
+ enum{
+ 	MISC_INPUT_P   = BIT_RNG(0,4),
+ 	MISC_INPUT_M   = BIT_RNG(5,6),
+	MISC_DATA_FORMAT= BIT(7),
+ };
+
+ /**
+  *
+  */
+#define    REG_ADC_LEFT_INPUT       READ_REG8(0x2d)
+enum{
+	ADC_LEFT_INPUT_P = BIT_RNG(0,4),
+	ADC_LEFT_INPUT_M = BIT_RNG(5,6),
+	ADC_LEFT_DATA_FORMAT = BIT(7),
+};
+#define    SET_LEFT_DATA_FORMAT(v)  do{\
+									   REG_ADC_LEFT_INPUT &= (~ADC_LEFT_DATA_FORMAT);\
+									   REG_ADC_LEFT_INPUT |= ((v)<<7);\
+								    }while(0)
+
+#define    SET_LEFT_INPUT_P(v)      do{\
+										REG_ADC_LEFT_INPUT &= (~ADC_LEFT_INPUT_P);\
+										REG_ADC_LEFT_INPUT |= ((v)&0x1F);\
+									}while(0)
+
+#define    SET_LEFT_INPUT_M(v)      do{\
+										REG_ADC_LEFT_INPUT &= (~ADC_LEFT_INPUT_M);\
+										REG_ADC_LEFT_INPUT |= (((v)&0x03)<<5);\
+								    }while(0)
+ /**
+  *
+  */
+#define     ADC_RESOLUTION_LEFT        READ_REG8(0x2f)
+enum{
+	ADC_MISC_RESOLUTION = BIT_RNG(0,2),
+};
+#define     SET_LEFT_RES(v)             do{\
+											ADC_RESOLUTION_LEFT &= (~ADC_MISC_RESOLUTION);\
+											ADC_RESOLUTION_LEFT |= ((v)&0x07);\
+									    }while(0)
+ /**
+  *
+  */
+ #define    REG_ADC_MISC_PERIOD        READ_REG16(0x30)
+ enum{
+ 	MISC_PERIOD_LOW   = BIT_RNG(0,7),
+ 	MISC_PERIOD_HIG   = BIT_RNG(8,15),
+ };
+
+#define    SET_PFM(v)			       REG_ADC_MISC_PERIOD = ((v<<2)&0x0FFF)      //WRITE_REG16(0x30,(v<<2)&0x0FFF)
+
+/**
+ *  set period for L
+ */
+#define    REG_ADC_LEFT_PERIOD         READ_REG16(0x32)
+#define    SET_PFL(v)			       REG_ADC_LEFT_PERIOD = v        //WRITE_REG8(0x32,v)
+ /**
+  *
+  */
+#define    ADC_CTRL_REG                READ_REG8(0x33)
+enum{
+	AUTO_MODE_LEFT_EN      = BIT(0),
+	AUTO_MODE_RIGHT_EN     = BIT(1),
+	AUDIO_OUTPUT_EN        = BIT(2),
+	AUTO_MODE_MISC_EN      = BIT(3),
+	AUDIO_MONO_STEREO_SEL  = BIT_RNG(4,5),
+	ADC_DONE_EDGE_FLAG     = BIT_RNG(6,7),
+};
+enum{
+	NO_AUDIO = 0,
+	MONO_AUDIO = BIT(4),
+	STEREO_AUDIO,
+};
+enum{
+	ADC_DONE_RISING = BIT(6),
+	ADC_DONE_FALLING = BIT(7),
+};
+/**
+ *
+ */
+#define    AREG_BATT_DET_CTRL         0x02
+ enum{
+ 	BATT_DET_INPUT  = BIT_RNG(4,5),
+ };
+/**
+ *
+ */
+#define    REG_ADC_MISC_RES_SAMPLE       READ_REG8(0x3c)
+ enum{
+ 	MISC_SAMPLE     = BIT_RNG(0,2),
+ 	MISC_RESOLUTION = BIT_RNG(3,5),
+
+ };
+/**
+ *
+ */
+#define    ADC_SAMPLE_CYCLE_LEFT        READ_REG8(0x3d)
+enum{
+	ADC_LEFT_SMPLE_CYCLE = BIT_RNG(0,2),
+};
+#define     SET_SAMPLE_CYCLE_LEFT(v)    do{\
+										    ADC_SAMPLE_CYCLE_LEFT &= (~ADC_LEFT_SMPLE_CYCLE);\
+										    ADC_SAMPLE_CYCLE_LEFT |= ((v)&0x07);\
+									    }while(0)
+
+/**
+ *  set period for Misc
+ */
+#define		SET_P(v)			write_reg16(0x30,(v<<2)&0x0FFF)
+
+ /**
+  *  Check adc status, busy return 1
+  */
+#define     REG_ADC_BUSY_FLAG    READ_REG8(0x3a)
+enum{
+	ADC_BUSY_FLAG = BIT(0),
+};
+#define		CHECKADCSTATUS		((REG_ADC_BUSY_FLAG & ADC_BUSY_FLAG)?1:0)
+
+
+
+#define  	ADC2AUDIO()			do{\
+									ADC_CTRL_REG &= 0x00;\
+									ADC_CTRL_REG |= (AUTO_MODE_LEFT_EN|AUDIO_OUTPUT_EN|MONO_AUDIO|ADC_DONE_FALLING);\
+								}while(0)
+
+#define  	AUDIO2ADC()			do{\
+									ADC_CTRL_REG &= 0x00;\
+									ADC_CTRL_REG |= (ADC_DONE_FALLING|AUTO_MODE_MISC_EN);\
+								}while(0)
+/**
+ * @brief      This function sets ADC resolution for channel Misc
+ * @param[in]  adcRes - enum variable adc resolution.
+ * @return     none
+ */
+extern void ADC_ResSet(ADC_ResTypeDef adcRes);
+
+/**
+ * @brief      This function sets ADC input channel
+ * @param[in]  adcInCha - enum variable of adc input channel.
+ * @return     none
+ */
+extern void ADC_AnaChSet( ADC_InputPTypeDef adcInCha);
+
+/**
+ * @brief      This function sets ADC input channel mode - signle-end or differential mode
+ * @param[in]  inM - enum variable of ADCINPUTMODE.
+ * @return     none
+ */
+extern void ADC_AnaModeSet( ADC_InputMTypeDef inM);
+
+/**
+ * @brief      This function sets ADC sample time(the number of adc clocks for each sample)
+ * @param[in]  adcST - enum variable of adc sample time.
+ * @return     none
+ */
+extern void ADC_SampleTimeSet(ADC_SampCycTypeDef adcST);
+
+/**
+ * @brief      This function sets ADC reference voltage for the Misc and L channel
+ * @param[in]  adcRF - enum variable of adc reference voltage.
+ * @return     none
+ */
+extern void ADC_RefVoltageSet(ADC_RefVolTypeDef adcRF);
+
+/**
+ * @brief	   ADC initiate function, set the ADC clock details (4MHz) and start the ADC clock.
+ *			   ADC clock relys on PLL.
+ * @param[in]  none
+ * @return	   1: set success ;
+ *             0: set error
+ */
+extern unsigned char ADC_Init(void);
+
+/**
+ * @brief     set input channel,set reference voltage, set resolution bits, set sample cycle
+ * @param[in] chl          - enum variable ADCINPUTCH ,acd channel
+ * @param[in] ref_vol      - enum variable ADCRFV
+ * @param[in] resolution   - enum variable ADCRESOLUTION
+ * @param[in] sample_cycle - enum variable ADCST
+ * @return    none
+ */
+extern void ADC_ParamSetting(ADC_InputPTypeDef chn,ADC_InputMTypeDef mode,ADC_RefVolTypeDef ref_vol,ADC_ResTypeDef resolution,ADC_SampCycTypeDef sample_cycle);
+
+/**
+ * @brief       Initiate function for the battery check function
+ * @param[in]   checkM - Battery check mode,
+ *              0: for battery dircetly connected to chip,
+ *              1: for battery connected to chip via boost DCDC
+ * @return      none
+ */
+extern void ADC_BatteryCheckInit(BATT_ChnTypeDef checkM);
+
+/**
+ * @brief  get the battery value
+ * @param  none
+ * @return the sampling value
+ */
+extern unsigned short ADC_BatteryValueGet(void);
+
+/**
+ * @brief  Initiate function for the temparture sensor
+ * @param  ADC_InputPTypeDef
+ * @return none
+ */
+extern void ADC_TemSensorInit(ADC_InputPTypeDef chn);
+
+/**
+ * @brief  get adc sampled value
+ * @param  none
+ * @return sampled_value, raw data
+ */
+extern unsigned short ADC_SampleValueGet(void);
+
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/aes.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/aes.h
new file mode 100644
index 00000000..72240f3e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/aes.h
@@ -0,0 +1,29 @@
+/********************************************************************************************************
+ * @file    aes.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma  once
+
+int aes_encrypt(unsigned char *key, unsigned char *data, unsigned char *result);
+int aes_decrypt(unsigned char *key, unsigned char *data, unsigned char *result);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/bsp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/bsp.h
new file mode 100644
index 00000000..d19df7af
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/bsp.h
@@ -0,0 +1,108 @@
+/********************************************************************************************************
+ * @file    bsp.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef BSP_H
+#define BSP_H
+
+
+/****************************************************
+ 	 	 	 	 Reg operations
+ *****************************************************/
+#define REG_BASE_ADDR				0x800000
+
+#define REG_ADDR8(a)				(*(volatile unsigned char  *)(REG_BASE_ADDR + (a)))
+#define REG_ADDR16(a)				(*(volatile unsigned short *)(REG_BASE_ADDR + (a)))
+#define REG_ADDR32(a)				(*(volatile unsigned long  *)(REG_BASE_ADDR + (a)))
+
+#define WRITE_REG8(addr,v)          (*(volatile unsigned char  *)(REG_BASE_ADDR + (addr)) = (unsigned char)(v))
+#define WRITE_REG16(addr,v)         (*(volatile unsigned short *)(REG_BASE_ADDR + (addr)) = (unsigned short)(v))
+#define WRITE_REG32(addr,v)         (*(volatile unsigned long  *)(REG_BASE_ADDR + (addr)) = (v))
+
+#define READ_REG8(addr)             (*(volatile unsigned char  *)(REG_BASE_ADDR + (addr)))
+#define READ_REG16(addr)            (*(volatile unsigned short *)(REG_BASE_ADDR + (addr)))
+#define READ_REG32(addr)            (*(volatile unsigned long  *)(REG_BASE_ADDR + (addr)))
+
+#define write_reg8					WRITE_REG8
+#define write_reg16					WRITE_REG16
+#define write_reg32					WRITE_REG32
+
+#define read_reg8					READ_REG8
+#define read_reg16					READ_REG16
+#define read_reg32					READ_REG32
+
+
+#define TCMD_UNDER_RD				0x80
+#define TCMD_UNDER_WR				0x40
+#define TCMD_UNDER_BOTH				0xc0
+
+#define TCMD_MASK					0x3f
+
+#define TCMD_WRITE					0x3
+#define TCMD_WAIT					0x7
+#define TCMD_WAREG					0x8
+
+
+typedef struct {
+	unsigned char 	 rst0;
+	unsigned char    rst1;
+	unsigned char    rst2;
+	unsigned char    clk0;
+	unsigned char 	 clk1;
+	unsigned char    clk2;
+	unsigned char    clkctl;
+} BSP_SysCtlTypeDef;
+
+
+typedef enum {
+    SYS_CLK_RC = 0,
+    SYS_CLK_HS_DIV = 1,
+} BSP_SysClkSelTypeDef;
+
+
+typedef struct TBLCMDSET {
+	unsigned short	adr;
+	unsigned char	dat;
+	unsigned char	cmd;
+} TBLCMDSET;
+
+
+
+static inline void mcu_reset(void){
+	write_reg8(0x06f, 0x20);
+}
+
+int LoadTblCmdSet(const TBLCMDSET *pt, int size);
+
+unsigned int rand(void);
+
+unsigned char analog_read(unsigned char addr);
+void analog_write(unsigned char addr, unsigned char v);
+void analog_read_multi(unsigned char addr, unsigned char *v, int len);
+void analog_write_multi(unsigned char addr, unsigned char *v, int len);
+
+#define WriteAnalogReg(addr,v)	analog_write(addr,v)
+#define ReadAnalogReg(addr)		analog_read(addr)
+
+#endif /* BSP_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/clock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/clock.h
new file mode 100644
index 00000000..f57d4250
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/clock.h
@@ -0,0 +1,79 @@
+/********************************************************************************************************
+ * @file    clock.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+
+#ifdef __GNUC__
+#define _ASM_NOP_				asm("tnop")
+#else
+#define _ASM_NOP_
+#endif
+
+
+
+enum{
+	CLOCK_SEL_32M_RC 		= 0,
+	CLOCK_SEL_HS_DIV 		= 1,
+	CLOCK_SEL_16M_PAD 		= 2,
+	CLOCK_SEL_32M_PAD 		= 3,
+	CLOCK_SEL_SPI  	  		= 4,
+	CLOCK_SEL_40M_INTERNAL 	= 5,
+	CLOCK_SEL_32K_RC  		= 6,
+};
+
+typedef enum{
+	SYS_CLK_16M_PLL,
+	SYS_CLK_32M_PLL,
+	SYS_CLK_32M_RC,
+	SYS_CLK_16M_RC,
+	SYS_CLK_8M_RC,
+}SYS_CLK_TYPEDEF;
+
+
+extern unsigned long CLOCK_SYS_CLOCK_1US;
+extern unsigned long tickPerUs;
+
+
+
+static inline unsigned long clock_time(void){
+	return reg_system_tick;
+}
+
+// check if the current time is exceed span_us from ref time
+static inline unsigned int clock_time_exceed(unsigned int ref, unsigned int span_us){
+	return ((unsigned int)(clock_time() - ref) > span_us * CLOCK_SYS_CLOCK_1US);
+}
+
+
+void clock_init(SYS_CLK_TYPEDEF SYS_CLK);
+void rc_32k_cal(void);
+void sleep_us(unsigned int us);
+
+#define WaitUs(t)			sleep_us(t)
+#define WaitMs(t)			sleep_us((t)*1000)
+#define sleep_ms(t)			sleep_us((t)*1000)
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/driver_826x.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/driver_826x.h
new file mode 100644
index 00000000..aa486a4f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/driver_826x.h
@@ -0,0 +1,46 @@
+/********************************************************************************************************
+ * @file    driver_826x.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bsp.h"
+#include "clock.h"
+#include "timer.h"
+#include "irq.h"
+#include "watchdog.h"
+#include "pm.h"
+#include "rf_drv.h"
+#include "adc.h"
+#include "gpio.h"
+#include "pwm.h"
+#include "aes.h"
+#include "uart.h"
+#include "usbhw.h"
+#include "flash.h"
+#include "i2c.h"
+#include "spi.h"
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.c
new file mode 100644
index 00000000..0fd3bd8b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.c
@@ -0,0 +1,247 @@
+/********************************************************************************************************
+ * @file    flash.c
+ *
+ * @brief   This is the source file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "flash.h"
+#include "register.h"
+#include "clock.h"
+#include "irq.h"
+#include "string.h"
+
+static inline void mspi_wait(void){
+	while(reg_master_spi_ctrl & FLD_MASTER_SPI_BUSY);
+}
+
+static inline void mspi_high(void){
+	reg_master_spi_ctrl = FLD_MASTER_SPI_CS;
+}
+
+static inline void mspi_low(void){
+	reg_master_spi_ctrl = 0;
+}
+
+static inline unsigned char mspi_get(void){
+	return reg_master_spi_data;
+}
+
+static inline void mspi_write(unsigned char c){
+	reg_master_spi_data = c;
+}
+
+static inline void mspi_ctrl_write(unsigned char c){
+	reg_master_spi_ctrl = c;
+}
+
+static inline unsigned char mspi_read(void){
+	mspi_write(0);		// dummy, issue clock
+	mspi_wait();
+	return mspi_get();
+}
+
+_attribute_ram_code_sec_ static inline int flash_is_busy(void)
+{
+	return mspi_read() & 0x01;				//  the busy bit, pls check flash spec
+}
+
+_attribute_ram_code_sec_noinline_ static void flash_send_cmd(unsigned char cmd)
+{
+	mspi_high();
+	sleep_us(1);
+	mspi_low();
+	mspi_write(cmd);
+	mspi_wait();
+}
+
+_attribute_ram_code_sec_noinline_ static void flash_send_addr(unsigned long addr)
+{
+	mspi_write((unsigned char)(addr>>16));
+	mspi_wait();
+	mspi_write((unsigned char)(addr>>8));
+	mspi_wait();
+	mspi_write((unsigned char)(addr));
+	mspi_wait();
+}
+
+//  make this a asynchorous version
+_attribute_ram_code_sec_noinline_ static void flash_wait_done(void)
+{
+	sleep_us(100);
+	flash_send_cmd(FLASH_READ_STATUS_CMD_LOWBYTE);
+
+	int i;
+	for(i = 0; i < 10000000; ++i){
+		if(!flash_is_busy()){
+			break;
+		}
+	}
+	mspi_high();
+}
+
+_attribute_ram_code_sec_noinline_ void flash_mspi_read_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char dummy_cnt, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		flash_send_addr(addr);
+	}
+	for(int i = 0; i < dummy_cnt; ++i)
+	{
+		mspi_write(0x00);		/* dummy */
+		mspi_wait();
+	}
+	mspi_write(0x00);			/* to issue clock */
+	mspi_wait();
+	mspi_ctrl_write(0x0a);		/* auto mode */
+	mspi_wait();
+	for(int i = 0; i < data_len; ++i)
+	{
+		*data++ = mspi_get();
+		mspi_wait();
+	}
+	mspi_high();
+
+	irq_restore(r);
+}
+
+_attribute_ram_code_sec_noinline_ void flash_mspi_write_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+
+	flash_send_cmd(FLASH_WRITE_ENABLE_CMD);
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		flash_send_addr(addr);
+	}
+	for(int i = 0; i < data_len; ++i)
+	{
+		mspi_write(data[i]);
+		mspi_wait();
+	}
+	mspi_high();
+	flash_wait_done();
+
+	irq_restore(r);
+}
+
+void flash_erase_sector(unsigned long addr)
+{
+	flash_mspi_write_ram(FLASH_SECT_ERASE_CMD, addr, 1, NULL, 0);
+}
+
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_mspi_read_ram(FLASH_READ_CMD, addr, 1, 0, buf, len);
+}
+
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	unsigned int ns = PAGE_SIZE - (addr&(PAGE_SIZE - 1));
+	int nw = 0;
+
+	do{
+		nw = len > ns ? ns :len;
+		flash_mspi_write_ram(FLASH_WRITE_CMD, addr, 1, buf, nw);
+		ns = PAGE_SIZE;
+		addr += nw;
+		buf += nw;
+		len -= nw;
+	}while(len > 0);
+}
+
+unsigned char flash_read_status(unsigned char cmd)
+{
+	unsigned char status = 0;
+	flash_mspi_read_ram(cmd, 0, 0, 0, &status, 1);
+	return status;
+}
+
+void flash_write_status(flash_status_typedef_e type, unsigned short data)
+{
+	unsigned char buf[2];
+
+	buf[0] = data;
+	buf[1] = data>>8;
+	if(type == FLASH_TYPE_8BIT_STATUS){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 1);
+	}else if(type == FLASH_TYPE_16BIT_STATUS_ONE_CMD){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 2);
+	}
+}
+
+unsigned int flash_read_mid(void)
+{
+	unsigned int flash_mid = 0;
+	flash_mspi_read_ram(FLASH_GET_JEDEC_ID, 0, 0, 0, (unsigned char*)(&flash_mid), 3);
+	return flash_mid;
+}
+
+void flash_read_uid(unsigned char idcmd, unsigned char *buf)
+{
+	if(idcmd == FLASH_READ_UID_CMD_GD_PUYA_ZB_UT)	//< GD/PUYA/ZB/UT
+	{
+		flash_mspi_read_ram(idcmd, 0x00, 1, 1, buf, 16);
+	}
+	else if (idcmd == FLASH_READ_UID_CMD_XTX)		//< XTX
+	{
+		flash_mspi_read_ram(idcmd, 0x80, 1, 1, buf, 16);
+	}
+}
+
+int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid)
+{
+	unsigned char no_uid[16]={0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01};
+	int i,f_cnt=0;
+	*flash_mid = flash_read_mid();
+
+	/*
+	 * If add flash type, need pay attention to the read uid cmd and the bir number of status register
+	   Flash Type	CMD			MID		Company
+	   MD25D40C		0x4b	0x134051	GD
+	   MD25D40D		0x4b	0x134051	GD
+	   GD25D10B		0x4b	0x1140C8	GD
+	   GD25D10C		0x4b	0x1140C8	GD
+	   ZB25WD40B	0x4b	0x13325E	ZB
+	 */
+
+	if((*flash_mid == 0x134051)||(*flash_mid == 0x1140C8)||(*flash_mid == 0x13325E)){
+		flash_read_uid(FLASH_READ_UID_CMD_GD_PUYA_ZB_UT, (unsigned char *)flash_uid);
+	}else{
+		return 0;
+	}
+
+	for(i = 0; i < 16; i++){
+		if(flash_uid[i] == no_uid[i]){
+			f_cnt++;
+		}
+	}
+
+	if(f_cnt == 16){ //no uid flash
+		return 0;
+	}else{
+		return 1;
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.h
new file mode 100644
index 00000000..79157893
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/flash.h
@@ -0,0 +1,66 @@
+/********************************************************************************************************
+ * @file    flash.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "compiler.h"
+
+
+#define PAGE_SIZE		256
+
+
+enum{
+	FLASH_WRITE_CMD						=	0x02,
+	FLASH_READ_CMD						=	0x03,
+
+	FLASH_SECT_ERASE_CMD				=	0x20,
+
+	FLASH_READ_UID_CMD_GD_PUYA_ZB_UT	=	0x4B,
+	FLASH_READ_UID_CMD_XTX				=	0x5A,
+
+	FLASH_GET_JEDEC_ID					=	0x9F,
+
+	FLASH_WRITE_STATUS_CMD_LOWBYTE		=	0x01,
+	FLASH_WRITE_STATUS_CMD_HIGHBYTE		=	0x31,
+
+	FLASH_READ_STATUS_CMD_LOWBYTE		=	0x05,
+	FLASH_READ_STATUS_CMD_HIGHBYTE		=	0x35,
+
+	FLASH_WRITE_DISABLE_CMD 			= 	0x04,
+	FLASH_WRITE_ENABLE_CMD 				= 	0x06,
+};
+
+typedef enum{
+	FLASH_TYPE_8BIT_STATUS   			= 0,
+	FLASH_TYPE_16BIT_STATUS_ONE_CMD  	= 1,
+	FLASH_TYPE_16BIT_STATUS_TWO_CMD  	= 2,
+}flash_status_typedef_e;
+
+void flash_erase_sector(unsigned long addr);
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf);
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf);
+unsigned int flash_read_mid(void);
+void flash_read_uid(unsigned char idcmd, unsigned char *buf);
+int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio.h
new file mode 100644
index 00000000..75d8ae79
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio.h
@@ -0,0 +1,318 @@
+/********************************************************************************************************
+ * @file    gpio.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bit.h"
+
+
+
+#define AS_GPIO		0
+#define AS_MSPI		1
+#define AS_SWIRE	2
+#define AS_UART		3
+#define AS_PWM		4
+#define AS_I2C		5
+#define AS_SPI		6
+#define AS_ETH_MAC	7
+#define AS_I2S		8
+#define AS_SDM		9
+#define AS_DMIC		10
+#define AS_USB		11
+#define AS_SWS		12
+#define AS_SWM		13
+#define AS_TEST		14
+
+typedef enum{
+	    GPIO_PA0 = 0x000 | BIT(0),	GPIO_PWM0A0=GPIO_PA0,	GPIO_DMIC_DI=GPIO_PA0,
+		GPIO_PA1 = 0x000 | BIT(1), 							GPIO_DMIC_CK=GPIO_PA1,
+		GPIO_PA2 = 0x000 | BIT(2),	GPIO_PWM0NA2=GPIO_PA2,	GPIO_DO=GPIO_PA2,
+		GPIO_PA3 = 0x000 | BIT(3),	GPIO_PWM1A3=GPIO_PA3,	GPIO_DI=GPIO_PA3,
+		GPIO_PA4 = 0x000 | BIT(4), 	GPIO_PWM1NA4=GPIO_PA4,	GPIO_CK=GPIO_PA4,
+		GPIO_PA5 = 0x000 | BIT(5), 	GPIO_PWM2NA5=GPIO_PA5,	GPIO_CN=GPIO_PA5,
+		GPIO_PA6 = 0x000 | BIT(6), 							GPIO_UTXA6=GPIO_PA6,
+		GPIO_PA7 = 0x000 | BIT(7), 							GPIO_URXA7=GPIO_PA7, GPIO_SWM=GPIO_PA7,
+
+		GPIO_PB0 = 0x100 | BIT(0),	GPIO_PWM2B0=GPIO_PB0,	GPIO_SWS=GPIO_PB0,
+		GPIO_PB1 = 0x100 | BIT(1),	GPIO_PWM2NB0=GPIO_PB1,
+		GPIO_PB2 = 0x100 | BIT(2), 	GPIO_PWM3B2=GPIO_PB2,	GPIO_UTXB2=GPIO_PB2,
+		GPIO_PB3 = 0x100 | BIT(3),	GPIO_PWM3NB3=GPIO_PB3,	GPIO_URXB3=GPIO_PB3,
+		GPIO_PB4 = 0x100 | BIT(4),	GPIO_PWM4B4=GPIO_PB4,
+		GPIO_PB5 = 0x100 | BIT(5),	GPIO_PWM4NB5=GPIO_PB5,
+		GPIO_PB6 = 0x100 | BIT(6),	GPIO_PWM5B6=GPIO_PB6,
+		GPIO_PB7 = 0x100 | BIT(7),	GPIO_PWM5NB7=GPIO_PB7,
+
+		GPIO_PC0 = 0x200 | BIT(0), GPIO_PWM0C0=GPIO_PC0,
+		GPIO_PC1 = 0x200 | BIT(1), GPIO_PWM1C1=GPIO_PC1,
+		GPIO_PC2 = 0x200 | BIT(2), GPIO_PWM2C2=GPIO_PC2,	GPIO_UTXC2=GPIO_PC2,
+		GPIO_PC3 = 0x200 | BIT(3), GPIO_PWM3C3=GPIO_PC3, 	GPIO_URXC3=GPIO_PC3,
+		GPIO_PC4 = 0x200 | BIT(4), GPIO_PWM4C4=GPIO_PC4,	GPIO_URTSC4=GPIO_PC4,
+		GPIO_PC5 = 0x200 | BIT(5), GPIO_PWM4C5=GPIO_PC5,	GPIO_UCTSC5=GPIO_PC5,
+		GPIO_PC6 = 0x200 | BIT(6),
+		GPIO_PC7 = 0x200 | BIT(7),
+
+		GPIO_PD0 = 0x300 | BIT(0),
+		GPIO_PD1 = 0x300 | BIT(1),
+		GPIO_PD2 = 0x300 | BIT(2),
+		GPIO_PD3 = 0x300 | BIT(3),
+		GPIO_PD4 = 0x300 | BIT(4),
+		GPIO_PD5 = 0x300 | BIT(5), GPIO_PWM0D5=GPIO_PD5,
+		GPIO_PD6 = 0x300 | BIT(6), GPIO_PWM1D6=GPIO_PD6,
+		GPIO_PD7 = 0x300 | BIT(7), GPIO_PWM2D7=GPIO_PD7,
+
+		GPIO_PE0 = 0x400 | BIT(0), GPIO_PWM0E0=GPIO_PE0,	GPIO_SDMP=GPIO_PE0,
+		GPIO_PE1 = 0x400 | BIT(1), GPIO_PWM1E1=GPIO_PE1,	GPIO_SDMN=GPIO_PE1,
+		GPIO_PE2 = 0x400 | BIT(2), 							GPIO_DM=GPIO_PE2,
+		GPIO_PE3 = 0x400 | BIT(3), 							GPIO_DP=GPIO_PE3,
+		GPIO_PE4 = 0x400 | BIT(4), 							GPIO_MSDO=GPIO_PE4,
+		GPIO_PE5 = 0x400 | BIT(5), 							GPIO_MCLK=GPIO_PE5,
+		GPIO_PE6 = 0x400 | BIT(6), 							GPIO_MSCN=GPIO_PE6,
+		GPIO_PE7 = 0x400 | BIT(7), 							GPIO_MSDI=GPIO_PE7,
+
+		GPIO_PF0 = 0x500 | BIT(0),
+		GPIO_PF1 = 0x500 | BIT(1),
+
+		GPIO_MAX_COUNT = 56,
+}GPIO_PinTypeDef;
+
+/**
+ *  @brief  Define pull up or down types
+ */
+typedef enum {
+	PM_PIN_UP_DOWN_FLOAT    = 0,
+	PM_PIN_PULLUP_1M     	= 1,
+	PM_PIN_PULLUP_10K		= 2,
+	PM_PIN_PULLDOWN_100K  	= 3,
+}GPIO_PullTypeDef;
+
+#define reg_gpio_in(i)				REG_ADDR8(0x580+((i>>8)<<3))
+#define reg_gpio_ie(i)				REG_ADDR8(0x581+((i>>8)<<3))
+#define reg_gpio_oen(i)				REG_ADDR8(0x582+((i>>8)<<3))
+#define reg_gpio_out(i)				REG_ADDR8(0x583+((i>>8)<<3))
+#define reg_gpio_pol(i)				REG_ADDR8(0x584+((i>>8)<<3))
+#define reg_gpio_ds(i)				REG_ADDR8(0x585+((i>>8)<<3))
+#define reg_gpio_gpio_func(i)		REG_ADDR8(0x586+((i>>8)<<3))
+#define reg_gpio_irq_en0(i)			REG_ADDR8(0x587+((i>>8)<<3))	//Corresponding to reg_irq_mask, FLD_IRQ_GPIO_EN in reg_irq_src
+#define reg_gpio_irq_en(i)			REG_ADDR8(0x5c8+(i>>8))			//Correspond to FLD_IRQ_GPIO_RISC2_EN in reg_irq_mask, reg_irq_src, in order to be consistent with 5320 and 5328, use FLD_IRQ_GPIO_RISC2_EN
+
+#define reg_gpio_irq_src(i)			REG_ADDR8(0x5e0+(i>>8))
+
+#define reg_gpio_irq_risc0_en(i)    REG_ADDR8(0x5b8 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+#define reg_gpio_irq_risc1_en(i)    REG_ADDR8(0x5c0 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+#define reg_gpio_irq_risc2_en(i)    REG_ADDR8(0x5c8 + (i >> 8))   // reg_irq_mask: FLD_IRQ_GPIO_RISC2_EN
+
+#define reg_gpio_wakeup_irq  REG_ADDR8(0x5b5)
+enum{
+    FLD_GPIO_CORE_WAKEUP_EN  = BIT(2),
+    FLD_GPIO_CORE_INTERRUPT_EN = BIT(3),
+};
+
+static inline void gpio_core_wakeup_enable_all(int en)
+{
+    if (en) {
+        BM_SET(reg_gpio_wakeup_irq, FLD_GPIO_CORE_WAKEUP_EN);
+    }
+    else {
+        BM_CLR(reg_gpio_wakeup_irq, FLD_GPIO_CORE_WAKEUP_EN);
+    }
+}
+
+
+static inline int gpio_is_pe_pin(GPIO_PinTypeDef pin){
+	return (pin >> 8) == 0x04;			// PE
+}
+
+static inline int gpio_is_output_en(GPIO_PinTypeDef pin){
+	return !BM_IS_SET(reg_gpio_oen(pin), pin & 0xff);
+}
+
+static inline int gpio_is_input_en(GPIO_PinTypeDef pin){
+	return BM_IS_SET(reg_gpio_ie(pin), pin & 0xff);
+}
+
+static inline void gpio_set_output_en(GPIO_PinTypeDef pin, unsigned int value){
+	unsigned char	bit = pin & 0xff;
+	if(!value){
+		BM_SET(reg_gpio_oen(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_oen(pin), bit);
+	}
+}
+
+static inline void gpio_set_input_en(GPIO_PinTypeDef pin, unsigned int value){
+	unsigned char	bit = pin & 0xff;
+	if(value){
+		BM_SET(reg_gpio_ie(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_ie(pin), bit);
+	}
+}
+
+static inline void gpio_set_data_strength(GPIO_PinTypeDef pin, unsigned int value){
+	unsigned char	bit = pin & 0xff;
+	if(value){
+		BM_SET(reg_gpio_ds(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_ds(pin), bit);
+	}
+}
+
+static inline void gpio_en_interrupt(GPIO_PinTypeDef pin, unsigned int en){  // reg_irq_mask: FLD_IRQ_GPIO_EN
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_en0(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_en0(pin), bit);
+	}
+}
+
+static inline void gpio_set_interrupt(GPIO_PinTypeDef pin, unsigned int falling){  //pol_rising = 0,pol_falling = 1
+	unsigned char	bit = pin & 0xff;
+	reg_gpio_wakeup_irq |= FLD_GPIO_CORE_INTERRUPT_EN;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	reg_irq_src = FLD_IRQ_GPIO_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_EN;
+}
+
+static inline void gpio_en_interrupt_risc0(GPIO_PinTypeDef pin, unsigned int en){  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc0_en(pin), bit);
+	}
+}
+
+static inline void gpio_set_interrupt_risc0(GPIO_PinTypeDef pin, unsigned int falling){
+	unsigned char	bit = pin & 0xff;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	reg_irq_src = FLD_IRQ_GPIO_RISC0_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC0_EN;
+}
+
+static inline void gpio_en_interrupt_risc1(GPIO_PinTypeDef pin, unsigned int en){  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc1_en(pin), bit);
+	}
+}
+
+static inline void gpio_set_interrupt_risc1(GPIO_PinTypeDef pin, unsigned int falling){
+	unsigned char	bit = pin & 0xff;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	reg_irq_src = FLD_IRQ_GPIO_RISC1_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC1_EN;
+}
+
+static inline void gpio_set_interrupt_pol(GPIO_PinTypeDef pin, unsigned int falling){
+	unsigned char	bit = pin & 0xff;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+}
+
+static inline void gpio_clr_interrupt(GPIO_PinTypeDef pin){
+	unsigned char	bit = pin & 0xff;
+	BM_CLR(reg_gpio_irq_en0(pin), bit);
+}
+
+static inline void gpio_write(GPIO_PinTypeDef pin, unsigned int value){
+	unsigned char	bit = pin & 0xff;
+	if(value){
+		BM_SET(reg_gpio_out(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_out(pin), bit);
+	}
+}
+
+static inline void gpio_toggle(GPIO_PinTypeDef pin) {
+	reg_gpio_out(pin) ^= (pin & 0xFF);
+}
+
+static inline unsigned int gpio_irq_src_read(GPIO_PinTypeDef pin){
+	return BM_IS_SET(reg_gpio_irq_src(pin), pin & 0xff);
+}
+
+static inline unsigned int gpio_read(GPIO_PinTypeDef pin){
+	return BM_IS_SET(reg_gpio_in(pin), pin & 0xff);
+}
+
+
+static inline void gpio_read_all(unsigned char *p){
+	p[0] = REG_ADDR8(0x580);
+	p[1] = REG_ADDR8(0x588);
+	p[2] = REG_ADDR8(0x590);
+	p[3] = REG_ADDR8(0x598);
+	p[4] = REG_ADDR8(0x5a0);
+}
+
+static inline void gpio_enable_wakeup_pin(GPIO_PinTypeDef pin, int en){
+	//return;
+	unsigned char bit = pin & 0xff;
+    if (en) {
+        BM_SET(reg_gpio_irq_en0(pin), bit);
+    }
+    else {
+        BM_CLR(reg_gpio_irq_en0(pin), bit);
+    }
+}
+
+
+static inline void gpio_set_func(GPIO_PinTypeDef pin, unsigned int func){
+	unsigned char	bit = pin & 0xff;
+	if(func == AS_GPIO){
+		BM_SET(reg_gpio_gpio_func(pin), bit);
+		return;
+	}else{
+		BM_CLR(reg_gpio_gpio_func(pin), bit);
+	}
+}
+
+
+
+extern void gpio_setup_up_down_resistor(GPIO_PinTypeDef gpio, GPIO_PullTypeDef up_down);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio_default.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio_default.h
new file mode 100644
index 00000000..2ef4eb4f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/gpio_default.h
@@ -0,0 +1,886 @@
+/********************************************************************************************************
+ * @file    gpio_default.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "gpio.h"
+
+
+#ifndef PA0_INPUT_ENABLE
+#define PA0_INPUT_ENABLE	0
+#endif
+#ifndef PA1_INPUT_ENABLE
+#define PA1_INPUT_ENABLE	0
+#endif
+#ifndef PA2_INPUT_ENABLE
+#define PA2_INPUT_ENABLE	0
+#endif
+#ifndef PA3_INPUT_ENABLE
+#define PA3_INPUT_ENABLE	0
+#endif
+#ifndef PA4_INPUT_ENABLE
+#define PA4_INPUT_ENABLE	0
+#endif
+#ifndef PA5_INPUT_ENABLE
+#define PA5_INPUT_ENABLE	0
+#endif
+#ifndef PA6_INPUT_ENABLE
+#define PA6_INPUT_ENABLE	0
+#endif
+#ifndef PA7_INPUT_ENABLE
+#define PA7_INPUT_ENABLE	0
+#endif
+#ifndef PA0_OUTPUT_ENABLE
+#define PA0_OUTPUT_ENABLE	0
+#endif
+#ifndef PA1_OUTPUT_ENABLE
+#define PA1_OUTPUT_ENABLE	0
+#endif
+#ifndef PA2_OUTPUT_ENABLE
+#define PA2_OUTPUT_ENABLE	0
+#endif
+#ifndef PA3_OUTPUT_ENABLE
+#define PA3_OUTPUT_ENABLE	0
+#endif
+#ifndef PA4_OUTPUT_ENABLE
+#define PA4_OUTPUT_ENABLE	0
+#endif
+#ifndef PA5_OUTPUT_ENABLE
+#define PA5_OUTPUT_ENABLE	0
+#endif
+#ifndef PA6_OUTPUT_ENABLE
+#define PA6_OUTPUT_ENABLE	0
+#endif
+#ifndef PA7_OUTPUT_ENABLE
+#define PA7_OUTPUT_ENABLE	0
+#endif
+#ifndef PA0_DATA_STRENGTH
+#define PA0_DATA_STRENGTH	1
+#endif
+#ifndef PA1_DATA_STRENGTH
+#define PA1_DATA_STRENGTH	1
+#endif
+#ifndef PA2_DATA_STRENGTH
+#define PA2_DATA_STRENGTH	1
+#endif
+#ifndef PA3_DATA_STRENGTH
+#define PA3_DATA_STRENGTH	1
+#endif
+#ifndef PA4_DATA_STRENGTH
+#define PA4_DATA_STRENGTH	1
+#endif
+#ifndef PA5_DATA_STRENGTH
+#define PA5_DATA_STRENGTH	1
+#endif
+#ifndef PA6_DATA_STRENGTH
+#define PA6_DATA_STRENGTH	1
+#endif
+#ifndef PA7_DATA_STRENGTH
+#define PA7_DATA_STRENGTH	1
+#endif
+#ifndef PA0_DATA_OUT
+#define PA0_DATA_OUT	0
+#endif
+#ifndef PA1_DATA_OUT
+#define PA1_DATA_OUT	0
+#endif
+#ifndef PA2_DATA_OUT
+#define PA2_DATA_OUT	0
+#endif
+#ifndef PA3_DATA_OUT
+#define PA3_DATA_OUT	0
+#endif
+#ifndef PA4_DATA_OUT
+#define PA4_DATA_OUT	0
+#endif
+#ifndef PA5_DATA_OUT
+#define PA5_DATA_OUT	0
+#endif
+#ifndef PA6_DATA_OUT
+#define PA6_DATA_OUT	0
+#endif
+#ifndef PA7_DATA_OUT
+#define PA7_DATA_OUT	0
+#endif
+#ifndef PA0_FUNC
+#define PA0_FUNC	AS_GPIO
+#endif
+#ifndef PA1_FUNC
+#define PA1_FUNC	AS_GPIO
+#endif
+#ifndef PA2_FUNC
+#define PA2_FUNC	AS_GPIO
+#endif
+#ifndef PA3_FUNC
+#define PA3_FUNC	AS_GPIO
+#endif
+#ifndef PA4_FUNC
+#define PA4_FUNC	AS_GPIO
+#endif
+#ifndef PA5_FUNC
+#define PA5_FUNC	AS_GPIO
+#endif
+#ifndef PA6_FUNC
+#define PA6_FUNC	AS_GPIO
+#endif
+#ifndef PA7_FUNC
+#define PA7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PA0
+#define PULL_WAKEUP_SRC_PA0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA1
+#define PULL_WAKEUP_SRC_PA1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA2
+#define PULL_WAKEUP_SRC_PA2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA3
+#define PULL_WAKEUP_SRC_PA3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA4
+#define PULL_WAKEUP_SRC_PA4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA5
+#define PULL_WAKEUP_SRC_PA5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA6
+#define PULL_WAKEUP_SRC_PA6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA7
+#define PULL_WAKEUP_SRC_PA7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PB0_INPUT_ENABLE
+#define PB0_INPUT_ENABLE	1 //SWS
+#endif
+#ifndef PB1_INPUT_ENABLE
+#define PB1_INPUT_ENABLE	0
+#endif
+#ifndef PB2_INPUT_ENABLE
+#define PB2_INPUT_ENABLE	0
+#endif
+#ifndef PB3_INPUT_ENABLE
+#define PB3_INPUT_ENABLE	0
+#endif
+#ifndef PB4_INPUT_ENABLE
+#define PB4_INPUT_ENABLE	0
+#endif
+#ifndef PB5_INPUT_ENABLE
+#define PB5_INPUT_ENABLE	0
+#endif
+#ifndef PB6_INPUT_ENABLE
+#define PB6_INPUT_ENABLE	0
+#endif
+#ifndef PB7_INPUT_ENABLE
+#define PB7_INPUT_ENABLE	0
+#endif
+#ifndef PB0_OUTPUT_ENABLE
+#define PB0_OUTPUT_ENABLE	0
+#endif
+#ifndef PB1_OUTPUT_ENABLE
+#define PB1_OUTPUT_ENABLE	0
+#endif
+#ifndef PB2_OUTPUT_ENABLE
+#define PB2_OUTPUT_ENABLE	0
+#endif
+#ifndef PB3_OUTPUT_ENABLE
+#define PB3_OUTPUT_ENABLE	0
+#endif
+#ifndef PB4_OUTPUT_ENABLE
+#define PB4_OUTPUT_ENABLE	0
+#endif
+#ifndef PB5_OUTPUT_ENABLE
+#define PB5_OUTPUT_ENABLE	0
+#endif
+#ifndef PB6_OUTPUT_ENABLE
+#define PB6_OUTPUT_ENABLE	0
+#endif
+#ifndef PB7_OUTPUT_ENABLE
+#define PB7_OUTPUT_ENABLE	0
+#endif
+#ifndef PB0_DATA_STRENGTH
+#define PB0_DATA_STRENGTH	1
+#endif
+#ifndef PB1_DATA_STRENGTH
+#define PB1_DATA_STRENGTH	1
+#endif
+#ifndef PB2_DATA_STRENGTH
+#define PB2_DATA_STRENGTH	1
+#endif
+#ifndef PB3_DATA_STRENGTH
+#define PB3_DATA_STRENGTH	1
+#endif
+#ifndef PB4_DATA_STRENGTH
+#define PB4_DATA_STRENGTH	1
+#endif
+#ifndef PB5_DATA_STRENGTH
+#define PB5_DATA_STRENGTH	1
+#endif
+#ifndef PB6_DATA_STRENGTH
+#define PB6_DATA_STRENGTH	1
+#endif
+#ifndef PB7_DATA_STRENGTH
+#define PB7_DATA_STRENGTH	1
+#endif
+#ifndef PB0_DATA_OUT
+#define PB0_DATA_OUT	0
+#endif
+#ifndef PB1_DATA_OUT
+#define PB1_DATA_OUT	0
+#endif
+#ifndef PB2_DATA_OUT
+#define PB2_DATA_OUT	0
+#endif
+#ifndef PB3_DATA_OUT
+#define PB3_DATA_OUT	0
+#endif
+#ifndef PB4_DATA_OUT
+#define PB4_DATA_OUT	0
+#endif
+#ifndef PB5_DATA_OUT
+#define PB5_DATA_OUT	0
+#endif
+#ifndef PB6_DATA_OUT
+#define PB6_DATA_OUT	0
+#endif
+#ifndef PB7_DATA_OUT
+#define PB7_DATA_OUT	0
+#endif
+#ifndef PB0_FUNC
+#define PB0_FUNC	AS_SWIRE
+#endif
+#ifndef PB1_FUNC
+#define PB1_FUNC	AS_GPIO
+#endif
+#ifndef PB2_FUNC
+#define PB2_FUNC	AS_GPIO
+#endif
+#ifndef PB3_FUNC
+#define PB3_FUNC	AS_GPIO
+#endif
+#ifndef PB4_FUNC
+#define PB4_FUNC	AS_GPIO
+#endif
+#ifndef PB5_FUNC
+#define PB5_FUNC	AS_GPIO
+#endif
+#ifndef PB6_FUNC
+#define PB6_FUNC	AS_GPIO
+#endif
+#ifndef PB7_FUNC
+#define PB7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PB0
+#define PULL_WAKEUP_SRC_PB0		PM_PIN_PULLUP_1M //sws pullup
+#endif
+#ifndef PULL_WAKEUP_SRC_PB1
+#define PULL_WAKEUP_SRC_PB1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB2
+#define PULL_WAKEUP_SRC_PB2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB3
+#define PULL_WAKEUP_SRC_PB3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB4
+#define PULL_WAKEUP_SRC_PB4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB5
+#define PULL_WAKEUP_SRC_PB5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB6
+#define PULL_WAKEUP_SRC_PB6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB7
+#define PULL_WAKEUP_SRC_PB7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PC0_INPUT_ENABLE
+#define PC0_INPUT_ENABLE	0
+#endif
+#ifndef PC1_INPUT_ENABLE
+#define PC1_INPUT_ENABLE	0
+#endif
+#ifndef PC2_INPUT_ENABLE
+#define PC2_INPUT_ENABLE	0
+#endif
+#ifndef PC3_INPUT_ENABLE
+#define PC3_INPUT_ENABLE	0
+#endif
+#ifndef PC4_INPUT_ENABLE
+#define PC4_INPUT_ENABLE	0
+#endif
+#ifndef PC5_INPUT_ENABLE
+#define PC5_INPUT_ENABLE	0
+#endif
+#ifndef PC6_INPUT_ENABLE
+#define PC6_INPUT_ENABLE	0
+#endif
+#ifndef PC7_INPUT_ENABLE
+#define PC7_INPUT_ENABLE	0
+#endif
+#ifndef PC0_OUTPUT_ENABLE
+#define PC0_OUTPUT_ENABLE	0
+#endif
+#ifndef PC1_OUTPUT_ENABLE
+#define PC1_OUTPUT_ENABLE	0
+#endif
+#ifndef PC2_OUTPUT_ENABLE
+#define PC2_OUTPUT_ENABLE	0
+#endif
+#ifndef PC3_OUTPUT_ENABLE
+#define PC3_OUTPUT_ENABLE	0
+#endif
+#ifndef PC4_OUTPUT_ENABLE
+#define PC4_OUTPUT_ENABLE	0
+#endif
+#ifndef PC5_OUTPUT_ENABLE
+#define PC5_OUTPUT_ENABLE	0
+#endif
+#ifndef PC6_OUTPUT_ENABLE
+#define PC6_OUTPUT_ENABLE	0
+#endif
+#ifndef PC7_OUTPUT_ENABLE
+#define PC7_OUTPUT_ENABLE	0
+#endif
+#ifndef PC0_DATA_STRENGTH
+#define PC0_DATA_STRENGTH	1
+#endif
+#ifndef PC1_DATA_STRENGTH
+#define PC1_DATA_STRENGTH	1
+#endif
+#ifndef PC2_DATA_STRENGTH
+#define PC2_DATA_STRENGTH	1
+#endif
+#ifndef PC3_DATA_STRENGTH
+#define PC3_DATA_STRENGTH	1
+#endif
+#ifndef PC4_DATA_STRENGTH
+#define PC4_DATA_STRENGTH	1
+#endif
+#ifndef PC5_DATA_STRENGTH
+#define PC5_DATA_STRENGTH	1
+#endif
+#ifndef PC6_DATA_STRENGTH
+#define PC6_DATA_STRENGTH	1
+#endif
+#ifndef PC7_DATA_STRENGTH
+#define PC7_DATA_STRENGTH	1
+#endif
+#ifndef PC0_DATA_OUT
+#define PC0_DATA_OUT	0
+#endif
+#ifndef PC1_DATA_OUT
+#define PC1_DATA_OUT	0
+#endif
+#ifndef PC2_DATA_OUT
+#define PC2_DATA_OUT	0
+#endif
+#ifndef PC3_DATA_OUT
+#define PC3_DATA_OUT	0
+#endif
+#ifndef PC4_DATA_OUT
+#define PC4_DATA_OUT	0
+#endif
+#ifndef PC5_DATA_OUT
+#define PC5_DATA_OUT	0
+#endif
+#ifndef PC6_DATA_OUT
+#define PC6_DATA_OUT	0
+#endif
+#ifndef PC7_DATA_OUT
+#define PC7_DATA_OUT	0
+#endif
+#ifndef PC0_FUNC
+#define PC0_FUNC	AS_GPIO
+#endif
+#ifndef PC1_FUNC
+#define PC1_FUNC	AS_GPIO
+#endif
+#ifndef PC2_FUNC
+#define PC2_FUNC	AS_GPIO
+#endif
+#ifndef PC3_FUNC
+#define PC3_FUNC	AS_GPIO
+#endif
+#ifndef PC4_FUNC
+#define PC4_FUNC	AS_GPIO
+#endif
+#ifndef PC5_FUNC
+#define PC5_FUNC	AS_GPIO
+#endif
+#ifndef PC6_FUNC
+#define PC6_FUNC	AS_GPIO
+#endif
+#ifndef PC7_FUNC
+#define PC7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PC0
+#define PULL_WAKEUP_SRC_PC0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC1
+#define PULL_WAKEUP_SRC_PC1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC2
+#define PULL_WAKEUP_SRC_PC2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC3
+#define PULL_WAKEUP_SRC_PC3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC4
+#define PULL_WAKEUP_SRC_PC4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC5
+#define PULL_WAKEUP_SRC_PC5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC6
+#define PULL_WAKEUP_SRC_PC6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC7
+#define PULL_WAKEUP_SRC_PC7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PD0_INPUT_ENABLE
+#define PD0_INPUT_ENABLE	0
+#endif
+#ifndef PD1_INPUT_ENABLE
+#define PD1_INPUT_ENABLE	0
+#endif
+#ifndef PD2_INPUT_ENABLE
+#define PD2_INPUT_ENABLE	0
+#endif
+#ifndef PD3_INPUT_ENABLE
+#define PD3_INPUT_ENABLE	0
+#endif
+#ifndef PD4_INPUT_ENABLE
+#define PD4_INPUT_ENABLE	0
+#endif
+#ifndef PD5_INPUT_ENABLE
+#define PD5_INPUT_ENABLE	0
+#endif
+#ifndef PD6_INPUT_ENABLE
+#define PD6_INPUT_ENABLE	0
+#endif
+#ifndef PD7_INPUT_ENABLE
+#define PD7_INPUT_ENABLE	0
+#endif
+#ifndef PD0_OUTPUT_ENABLE
+#define PD0_OUTPUT_ENABLE	0
+#endif
+#ifndef PD1_OUTPUT_ENABLE
+#define PD1_OUTPUT_ENABLE	0
+#endif
+#ifndef PD2_OUTPUT_ENABLE
+#define PD2_OUTPUT_ENABLE	0
+#endif
+#ifndef PD3_OUTPUT_ENABLE
+#define PD3_OUTPUT_ENABLE	0
+#endif
+#ifndef PD4_OUTPUT_ENABLE
+#define PD4_OUTPUT_ENABLE	0
+#endif
+#ifndef PD5_OUTPUT_ENABLE
+#define PD5_OUTPUT_ENABLE	0
+#endif
+#ifndef PD6_OUTPUT_ENABLE
+#define PD6_OUTPUT_ENABLE	0
+#endif
+#ifndef PD7_OUTPUT_ENABLE
+#define PD7_OUTPUT_ENABLE	0
+#endif
+#ifndef PD0_DATA_STRENGTH
+#define PD0_DATA_STRENGTH	1
+#endif
+#ifndef PD1_DATA_STRENGTH
+#define PD1_DATA_STRENGTH	1
+#endif
+#ifndef PD2_DATA_STRENGTH
+#define PD2_DATA_STRENGTH	1
+#endif
+#ifndef PD3_DATA_STRENGTH
+#define PD3_DATA_STRENGTH	1
+#endif
+#ifndef PD4_DATA_STRENGTH
+#define PD4_DATA_STRENGTH	1
+#endif
+#ifndef PD5_DATA_STRENGTH
+#define PD5_DATA_STRENGTH	1
+#endif
+#ifndef PD6_DATA_STRENGTH
+#define PD6_DATA_STRENGTH	1
+#endif
+#ifndef PD7_DATA_STRENGTH
+#define PD7_DATA_STRENGTH	1
+#endif
+#ifndef PD0_DATA_OUT
+#define PD0_DATA_OUT	0
+#endif
+#ifndef PD1_DATA_OUT
+#define PD1_DATA_OUT	0
+#endif
+#ifndef PD2_DATA_OUT
+#define PD2_DATA_OUT	0
+#endif
+#ifndef PD3_DATA_OUT
+#define PD3_DATA_OUT	0
+#endif
+#ifndef PD4_DATA_OUT
+#define PD4_DATA_OUT	0
+#endif
+#ifndef PD5_DATA_OUT
+#define PD5_DATA_OUT	0
+#endif
+#ifndef PD6_DATA_OUT
+#define PD6_DATA_OUT	0
+#endif
+#ifndef PD7_DATA_OUT
+#define PD7_DATA_OUT	0
+#endif
+#ifndef PD0_FUNC
+#define PD0_FUNC	AS_GPIO
+#endif
+#ifndef PD1_FUNC
+#define PD1_FUNC	AS_GPIO
+#endif
+#ifndef PD2_FUNC
+#define PD2_FUNC	AS_GPIO
+#endif
+#ifndef PD3_FUNC
+#define PD3_FUNC	AS_GPIO
+#endif
+#ifndef PD4_FUNC
+#define PD4_FUNC	AS_GPIO
+#endif
+#ifndef PD5_FUNC
+#define PD5_FUNC	AS_GPIO
+#endif
+#ifndef PD6_FUNC
+#define PD6_FUNC	AS_GPIO
+#endif
+#ifndef PD7_FUNC
+#define PD7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PD0
+#define PULL_WAKEUP_SRC_PD0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD1
+#define PULL_WAKEUP_SRC_PD1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD2
+#define PULL_WAKEUP_SRC_PD2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD3
+#define PULL_WAKEUP_SRC_PD3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD4
+#define PULL_WAKEUP_SRC_PD4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD5
+#define PULL_WAKEUP_SRC_PD5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD6
+#define PULL_WAKEUP_SRC_PD6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD7
+#define PULL_WAKEUP_SRC_PD7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PE0_INPUT_ENABLE
+#define PE0_INPUT_ENABLE	0
+#endif
+#ifndef PE1_INPUT_ENABLE
+#define PE1_INPUT_ENABLE	0
+#endif
+#ifndef PE2_INPUT_ENABLE
+#define PE2_INPUT_ENABLE	0 //USB DM
+#endif
+#ifndef PE3_INPUT_ENABLE
+#define PE3_INPUT_ENABLE	0 //USB DP
+#endif
+#ifndef PE4_INPUT_ENABLE
+#define PE4_INPUT_ENABLE	1 //MSPI
+#endif
+#ifndef PE5_INPUT_ENABLE
+#define PE5_INPUT_ENABLE	1 //MSPI
+#endif
+#ifndef PE6_INPUT_ENABLE
+#define PE6_INPUT_ENABLE	1 //MSPI
+#endif
+#ifndef PE7_INPUT_ENABLE
+#define PE7_INPUT_ENABLE	1 //MSPI
+#endif
+#ifndef PE0_OUTPUT_ENABLE
+#define PE0_OUTPUT_ENABLE	0
+#endif
+#ifndef PE1_OUTPUT_ENABLE
+#define PE1_OUTPUT_ENABLE	0
+#endif
+#ifndef PE2_OUTPUT_ENABLE
+#define PE2_OUTPUT_ENABLE	0
+#endif
+#ifndef PE3_OUTPUT_ENABLE
+#define PE3_OUTPUT_ENABLE	0
+#endif
+#ifndef PE4_OUTPUT_ENABLE
+#define PE4_OUTPUT_ENABLE	0
+#endif
+#ifndef PE5_OUTPUT_ENABLE
+#define PE5_OUTPUT_ENABLE	0
+#endif
+#ifndef PE6_OUTPUT_ENABLE
+#define PE6_OUTPUT_ENABLE	0
+#endif
+#ifndef PE7_OUTPUT_ENABLE
+#define PE7_OUTPUT_ENABLE	0
+#endif
+#ifndef PE0_DATA_STRENGTH
+#define PE0_DATA_STRENGTH	1
+#endif
+#ifndef PE1_DATA_STRENGTH
+#define PE1_DATA_STRENGTH	1
+#endif
+#ifndef PE2_DATA_STRENGTH
+#define PE2_DATA_STRENGTH	1
+#endif
+#ifndef PE3_DATA_STRENGTH
+#define PE3_DATA_STRENGTH	1
+#endif
+#ifndef PE4_DATA_STRENGTH
+#define PE4_DATA_STRENGTH	1
+#endif
+#ifndef PE5_DATA_STRENGTH
+#define PE5_DATA_STRENGTH	1
+#endif
+#ifndef PE6_DATA_STRENGTH
+#define PE6_DATA_STRENGTH	1
+#endif
+#ifndef PE7_DATA_STRENGTH
+#define PE7_DATA_STRENGTH	1
+#endif
+#ifndef PE0_DATA_OUT
+#define PE0_DATA_OUT	0
+#endif
+#ifndef PE1_DATA_OUT
+#define PE1_DATA_OUT	0
+#endif
+#ifndef PE2_DATA_OUT
+#define PE2_DATA_OUT	0
+#endif
+#ifndef PE3_DATA_OUT
+#define PE3_DATA_OUT	0
+#endif
+#ifndef PE4_DATA_OUT
+#define PE4_DATA_OUT	0
+#endif
+#ifndef PE5_DATA_OUT
+#define PE5_DATA_OUT	0
+#endif
+#ifndef PE6_DATA_OUT
+#define PE6_DATA_OUT	0
+#endif
+#ifndef PE7_DATA_OUT
+#define PE7_DATA_OUT	0
+#endif
+#ifndef PE0_FUNC
+#define PE0_FUNC	AS_GPIO
+#endif
+#ifndef PE1_FUNC
+#define PE1_FUNC	AS_GPIO
+#endif
+#ifndef PE2_FUNC
+#define PE2_FUNC	AS_USB
+#endif
+#ifndef PE3_FUNC
+#define PE3_FUNC	AS_USB
+#endif
+#ifndef PE4_FUNC
+#define PE4_FUNC	AS_MSPI	//MSPI
+#endif
+#ifndef PE5_FUNC
+#define PE5_FUNC	AS_MSPI	//MSPI
+#endif
+#ifndef PE6_FUNC
+#define PE6_FUNC	AS_MSPI	//MSPI
+#endif
+#ifndef PE7_FUNC
+#define PE7_FUNC	AS_MSPI	//MSPI
+#endif
+#ifndef PULL_WAKEUP_SRC_PE0
+#define PULL_WAKEUP_SRC_PE0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE1
+#define PULL_WAKEUP_SRC_PE1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE2
+#define PULL_WAKEUP_SRC_PE2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE3
+#define PULL_WAKEUP_SRC_PE3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE4
+#define PULL_WAKEUP_SRC_PE4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE5
+#define PULL_WAKEUP_SRC_PE5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE6
+#define PULL_WAKEUP_SRC_PE6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE7
+#define PULL_WAKEUP_SRC_PE7	0
+#endif
+
+
+static inline void gpio_analog_resistance_init(void)
+{
+	unsigned char areg = analog_read (0x0a) & 0x0f;
+
+	analog_write (0x0a, areg | (PULL_WAKEUP_SRC_PA0<<4) |
+						(PULL_WAKEUP_SRC_PA1<<6));
+
+	analog_write (0x0b,  PULL_WAKEUP_SRC_PA2 |
+						(PULL_WAKEUP_SRC_PA3<<2) |
+						(PULL_WAKEUP_SRC_PA4<<4) |
+						(PULL_WAKEUP_SRC_PA5<<6));
+
+	analog_write (0x0c,  PULL_WAKEUP_SRC_PA6 |
+						(PULL_WAKEUP_SRC_PA7<<2) |
+						(PULL_WAKEUP_SRC_PB0<<4) |
+						(PULL_WAKEUP_SRC_PB1<<6));
+
+	analog_write (0x0d,  PULL_WAKEUP_SRC_PB2 |
+						(PULL_WAKEUP_SRC_PB3<<2) |
+						(PULL_WAKEUP_SRC_PB4<<4) |
+						(PULL_WAKEUP_SRC_PB5<<6));
+
+	analog_write (0x0e,  PULL_WAKEUP_SRC_PB6 |
+						(PULL_WAKEUP_SRC_PB7<<2) |
+						(PULL_WAKEUP_SRC_PC0<<4) |
+						(PULL_WAKEUP_SRC_PC1<<6));
+
+	analog_write (0x0f,  PULL_WAKEUP_SRC_PC2 |
+						(PULL_WAKEUP_SRC_PC3<<2) |
+						(PULL_WAKEUP_SRC_PC4<<4) |
+						(PULL_WAKEUP_SRC_PC5<<6));
+
+	analog_write (0x10,  PULL_WAKEUP_SRC_PC6 |
+						(PULL_WAKEUP_SRC_PC7<<2) |
+						(PULL_WAKEUP_SRC_PD0<<4) |
+						(PULL_WAKEUP_SRC_PD1<<6));
+
+	analog_write (0x11,  PULL_WAKEUP_SRC_PD2 |
+						(PULL_WAKEUP_SRC_PD3<<2) |
+						(PULL_WAKEUP_SRC_PD4<<4) |
+						(PULL_WAKEUP_SRC_PD5<<6));
+
+	analog_write (0x12,  PULL_WAKEUP_SRC_PD6 |
+						(PULL_WAKEUP_SRC_PD7<<2) |
+						(PULL_WAKEUP_SRC_PE0<<4) |
+						(PULL_WAKEUP_SRC_PE1<<6));
+
+	areg = analog_read (0x08) & 0x0f;
+	analog_write (0x08,  areg | PULL_WAKEUP_SRC_PE2<<4 |
+						(PULL_WAKEUP_SRC_PE3<<6) );
+}
+
+static inline void gpio_init(int anaRes_init_en)
+{
+	//return;
+	reg_gpio_pa_setting1 =
+		(PA0_INPUT_ENABLE<<8) 	| (PA1_INPUT_ENABLE<<9)	| (PA2_INPUT_ENABLE<<10)	| (PA3_INPUT_ENABLE<<11) |
+		(PA4_INPUT_ENABLE<<12)	| (PA5_INPUT_ENABLE<<13)	| (PA6_INPUT_ENABLE<<14)	| (PA7_INPUT_ENABLE<<15) |
+		((PA0_OUTPUT_ENABLE?0:1)<<16)	| ((PA1_OUTPUT_ENABLE?0:1)<<17) | ((PA2_OUTPUT_ENABLE?0:1)<<18)	| ((PA3_OUTPUT_ENABLE?0:1)<<19) |
+		((PA4_OUTPUT_ENABLE?0:1)<<20)	| ((PA5_OUTPUT_ENABLE?0:1)<<21) | ((PA6_OUTPUT_ENABLE?0:1)<<22)	| ((PA7_OUTPUT_ENABLE?0:1)<<23) |
+		(PA0_DATA_OUT<<24)	| (PA1_DATA_OUT<<25)	| (PA2_DATA_OUT<<26)	| (PA3_DATA_OUT<<27) |
+		(PA4_DATA_OUT<<28)	| (PA5_DATA_OUT<<29)	| (PA6_DATA_OUT<<30)	| (PA7_DATA_OUT<<31) ;
+	reg_gpio_pa_setting2 =
+		(PA0_DATA_STRENGTH<<8)		| (PA1_DATA_STRENGTH<<9)| (PA2_DATA_STRENGTH<<10)	| (PA3_DATA_STRENGTH<<11) |
+		(PA4_DATA_STRENGTH<<12)	| (PA5_DATA_STRENGTH<<13)	| (PA6_DATA_STRENGTH<<14)	| (PA7_DATA_STRENGTH<<15) |
+		(PA0_FUNC==AS_GPIO ? BIT(16):0)	| (PA1_FUNC==AS_GPIO ? BIT(17):0)| (PA2_FUNC==AS_GPIO ? BIT(18):0)| (PA3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PA4_FUNC==AS_GPIO ? BIT(20):0)	| (PA5_FUNC==AS_GPIO ? BIT(21):0)| (PA6_FUNC==AS_GPIO ? BIT(22):0)| (PA7_FUNC==AS_GPIO ? BIT(23):0);
+
+	reg_gpio_pb_setting1 =
+		(PB0_INPUT_ENABLE<<8) 	| (PB1_INPUT_ENABLE<<9)	| (PB2_INPUT_ENABLE<<10)	| (PB3_INPUT_ENABLE<<11) |
+		(PB4_INPUT_ENABLE<<12)	| (PB5_INPUT_ENABLE<<13)| (PB6_INPUT_ENABLE<<14)	| (PB7_INPUT_ENABLE<<15) |
+		((PB0_OUTPUT_ENABLE?0:1)<<16)	| ((PB1_OUTPUT_ENABLE?0:1)<<17) | ((PB2_OUTPUT_ENABLE?0:1)<<18)	| ((PB3_OUTPUT_ENABLE?0:1)<<19) |
+		((PB4_OUTPUT_ENABLE?0:1)<<20)	| ((PB5_OUTPUT_ENABLE?0:1)<<21) | ((PB6_OUTPUT_ENABLE?0:1)<<22)	| ((PB7_OUTPUT_ENABLE?0:1)<<23) |
+		(PB0_DATA_OUT<<24)	| (PB1_DATA_OUT<<25)	| (PB2_DATA_OUT<<26)	| (PB3_DATA_OUT<<27) |
+		(PB4_DATA_OUT<<28)	| (PB5_DATA_OUT<<29)	| (PB6_DATA_OUT<<30)	| (PB7_DATA_OUT<<31) ;
+	reg_gpio_pb_setting2 =
+		(PB0_DATA_STRENGTH<<8)	| (PB1_DATA_STRENGTH<<9)	| (PB2_DATA_STRENGTH<<10)	| (PB3_DATA_STRENGTH<<11) |
+		(PB4_DATA_STRENGTH<<12)	| (PB5_DATA_STRENGTH<<13)	| (PB6_DATA_STRENGTH<<14)	| (PB7_DATA_STRENGTH<<15) |
+		(PB0_FUNC==AS_GPIO ? BIT(16):0)	| (PB1_FUNC==AS_GPIO ? BIT(17):0)| (PB2_FUNC==AS_GPIO ? BIT(18):0)| (PB3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PB4_FUNC==AS_GPIO ? BIT(20):0)	| (PB5_FUNC==AS_GPIO ? BIT(21):0)| (PB6_FUNC==AS_GPIO ? BIT(22):0)| (PB7_FUNC==AS_GPIO ? BIT(23):0);
+
+	reg_gpio_pc_setting1 =
+		(PC0_INPUT_ENABLE<<8) 	| (PC1_INPUT_ENABLE<<9)	| (PC2_INPUT_ENABLE<<10)	| (PC3_INPUT_ENABLE<<11) |
+		(PC4_INPUT_ENABLE<<12)	| (PC5_INPUT_ENABLE<<13)| (PC6_INPUT_ENABLE<<14)	| (PC7_INPUT_ENABLE<<15) |
+		((PC0_OUTPUT_ENABLE?0:1)<<16)	| ((PC1_OUTPUT_ENABLE?0:1)<<17) | ((PC2_OUTPUT_ENABLE?0:1)<<18)	| ((PC3_OUTPUT_ENABLE?0:1)<<19) |
+		((PC4_OUTPUT_ENABLE?0:1)<<20)	| ((PC5_OUTPUT_ENABLE?0:1)<<21) | ((PC6_OUTPUT_ENABLE?0:1)<<22)	| ((PC7_OUTPUT_ENABLE?0:1)<<23) |
+		(PC0_DATA_OUT<<24)	| (PC1_DATA_OUT<<25)	| (PC2_DATA_OUT<<26)	| (PC3_DATA_OUT<<27) |
+		(PC4_DATA_OUT<<28)	| (PC5_DATA_OUT<<29)	| (PC6_DATA_OUT<<30)	| (PC7_DATA_OUT<<31) ;
+	reg_gpio_pc_setting2 =
+		(PC0_DATA_STRENGTH<<8)	| (PC1_DATA_STRENGTH<<9)	| (PC2_DATA_STRENGTH<<10)	| (PC3_DATA_STRENGTH<<11) |
+		(PC4_DATA_STRENGTH<<12)	| (PC5_DATA_STRENGTH<<13)	| (PC6_DATA_STRENGTH<<14)	| (PC7_DATA_STRENGTH<<15) |
+		(PC0_FUNC==AS_GPIO ? BIT(16):0)	| (PC1_FUNC==AS_GPIO ? BIT(17):0)| (PC2_FUNC==AS_GPIO ? BIT(18):0)| (PC3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PC4_FUNC==AS_GPIO ? BIT(20):0)	| (PC5_FUNC==AS_GPIO ? BIT(21):0)| (PC6_FUNC==AS_GPIO ? BIT(22):0)| (PC7_FUNC==AS_GPIO ? BIT(23):0);
+
+	reg_gpio_pd_setting1 =
+		(PD0_INPUT_ENABLE<<8) 	| (PD1_INPUT_ENABLE<<9)	| (PD2_INPUT_ENABLE<<10)	| (PD3_INPUT_ENABLE<<11) |
+		(PD4_INPUT_ENABLE<<12)	| (PD5_INPUT_ENABLE<<13)| (PD6_INPUT_ENABLE<<14)	| (PD7_INPUT_ENABLE<<15) |
+		((PD0_OUTPUT_ENABLE?0:1)<<16)	| ((PD1_OUTPUT_ENABLE?0:1)<<17) | ((PD2_OUTPUT_ENABLE?0:1)<<18)	| ((PD3_OUTPUT_ENABLE?0:1)<<19) |
+		((PD4_OUTPUT_ENABLE?0:1)<<20)	| ((PD5_OUTPUT_ENABLE?0:1)<<21) | ((PD6_OUTPUT_ENABLE?0:1)<<22)	| ((PD7_OUTPUT_ENABLE?0:1)<<23) |
+		(PD0_DATA_OUT<<24)	| (PD1_DATA_OUT<<25)	| (PD2_DATA_OUT<<26)	| (PD3_DATA_OUT<<27) |
+		(PD4_DATA_OUT<<28)	| (PD5_DATA_OUT<<29)	| (PD6_DATA_OUT<<30)	| (PD7_DATA_OUT<<31) ;
+	reg_gpio_pd_setting2 =
+		(PD0_DATA_STRENGTH<<8)	| (PD1_DATA_STRENGTH<<9)	| (PD2_DATA_STRENGTH<<10)	| (PD3_DATA_STRENGTH<<11) |
+		(PD4_DATA_STRENGTH<<12)	| (PD5_DATA_STRENGTH<<13)	| (PD6_DATA_STRENGTH<<14)	| (PD7_DATA_STRENGTH<<15) |
+		(PD0_FUNC==AS_GPIO ? BIT(16):0)	| (PD1_FUNC==AS_GPIO ? BIT(17):0)| (PD2_FUNC==AS_GPIO ? BIT(18):0)| (PD3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PD4_FUNC==AS_GPIO ? BIT(20):0)	| (PD5_FUNC==AS_GPIO ? BIT(21):0)| (PD6_FUNC==AS_GPIO ? BIT(22):0)| (PD7_FUNC==AS_GPIO ? BIT(23):0);
+
+	reg_gpio_pe_setting1 =
+		(PE0_INPUT_ENABLE<<8) 	| (PE1_INPUT_ENABLE<<9)	| (PE2_INPUT_ENABLE<<10)	| (PE3_INPUT_ENABLE<<11) |
+		(PE4_INPUT_ENABLE<<12)	| (PE5_INPUT_ENABLE<<13)| (PE6_INPUT_ENABLE<<14)	| (PE7_INPUT_ENABLE<<15) |
+		((PE0_OUTPUT_ENABLE?0:1)<<16)	| ((PE1_OUTPUT_ENABLE?0:1)<<17) | ((PE2_OUTPUT_ENABLE?0:1)<<18)	| ((PE3_OUTPUT_ENABLE?0:1)<<19) |
+		((PE4_OUTPUT_ENABLE?0:1)<<20)	| ((PE5_OUTPUT_ENABLE?0:1)<<21) | ((PE6_OUTPUT_ENABLE?0:1)<<22)	| ((PE7_OUTPUT_ENABLE?0:1)<<23) |
+		(PE0_DATA_OUT<<24)	| (PE1_DATA_OUT<<25)	| (PE2_DATA_OUT<<26)	| (PE3_DATA_OUT<<27) |
+		(PE4_DATA_OUT<<28)	| (PE5_DATA_OUT<<29)	| (PE6_DATA_OUT<<30)	| (PE7_DATA_OUT<<31);
+	reg_gpio_pe_setting2 =
+		(PE0_DATA_STRENGTH<<8)	| (PE1_DATA_STRENGTH<<9)	| (PE2_DATA_STRENGTH<<10)	| (PE3_DATA_STRENGTH<<11) |
+		(PE4_DATA_STRENGTH<<12)	| (PE5_DATA_STRENGTH<<13)	| (PE6_DATA_STRENGTH<<14)	| (PE7_DATA_STRENGTH<<15) |
+		(PE0_FUNC==AS_GPIO ? BIT(16):0)	| (PE1_FUNC==AS_GPIO ? BIT(17):0)| (PE2_FUNC==AS_GPIO ? BIT(18):0)| (PE3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PE4_FUNC==AS_GPIO ? BIT(20):0)	| (PE5_FUNC==AS_GPIO ? BIT(21):0)| (PE6_FUNC==AS_GPIO ? BIT(22):0)| (PE7_FUNC==AS_GPIO ? BIT(23):0);
+
+
+	if(anaRes_init_en){
+		gpio_analog_resistance_init();
+	}
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/i2c.h
new file mode 100644
index 00000000..643ef83d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/i2c.h
@@ -0,0 +1,139 @@
+/********************************************************************************************************
+ * @file    i2c.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef I2C_H
+#define I2C_H
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ *  @brief  Define I2C pin port
+ */
+typedef enum {
+    I2C_PIN_GPIOA = 0,
+    I2C_PIN_GPIOB,
+    I2C_PIN_GPIOC,
+} I2C_GPIO_GroupTypeDef;
+
+/**
+ *  @brief when device as I2C slave
+ *         select slave mode:1.DMA;2.MAPPING
+ */
+typedef enum {
+	I2C_SLAVE_DMA = 0,
+	I2C_SLAVE_MAP,
+}I2C_SlaveMode;
+
+
+
+/**
+ * @brief      This function selects a pin port for I2C interface.
+ * @param[in]  PinGrp - the pin port selected as I2C interface pin port.
+ * @return     none
+ */
+extern void I2C_PinSelect(I2C_GPIO_GroupTypeDef PinGrp);
+
+/**
+ * @brief This function serves to set id of I2C module.
+ * @param[in] SlaveID - this id is fixed id for slave device.For master device, this id is set to access different slave devices.
+ * @return none
+ */
+extern void I2C_SetId(unsigned char SlaveID);
+
+/**
+ * @brief      This function set the id of slave device and the speed of I2C interface
+ * @param[in]  DivClock - the division factor of I2C clock, 
+ *             I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return     none
+ */
+extern void I2C_MasterInit(unsigned char DivClock);
+
+/**
+ *	@brief      the function config the ID of slave and mode of slave.
+ *	@param[in]  device_ID - it contains write or read bit,the lsb is write or read bit.
+ *			    ID|0x01 indicate read. ID&0xfe indicate write.
+ *	@param[in]  mode - set slave mode. slave has two modes, one is DMA mode, the other is MAPPING mode.
+ *	@param[in]  pBuf - if slave mode is MAPPING, set the first address of buffer master write or read slave.
+ *	@return     none
+ */
+extern void I2C_SlaveInit(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pBuf);
+
+/**
+ * @brief      This function writes one byte to the slave device at the specified address
+ * @param[in]  Addr - pointer to the address where the one byte data will be written
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is  
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @param[in]  Data - the one byte data will be written via I2C interface
+ * @return     none
+ */
+extern void I2C_WriteByte(unsigned int Addr, unsigned int AddrLen, unsigned char Data);
+
+/**
+ * @brief      This function reads one byte from the slave device at the specified address
+ * @param[in]  Addr - pointer to the address where the one byte data will be read
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is  
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @return     the one byte data read from the slave device via I2C interface
+ */
+extern unsigned char I2C_ReadByte(unsigned int Addr, unsigned int AddrLen);
+
+/**
+ *  @brief      This function writes a bulk of data to the slave device at the specified address
+ *  @param[in]  Addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ *  @param[in]  AddrLen - the length of register. enum 1 or 2. based on the spec of i2c slave.
+ *  @param[in]  dataBuf - the first SRAM buffer address to write data to slave in.
+ *  @param[in]  dataLen - the length of data master write to slave.
+ *  @return     none
+ */
+extern void I2C_WriteSeries(unsigned short Addr, int AddrLen, unsigned char * dataBuf, int dataLen);
+
+/**
+ * @brief      This function reads a bulk of data from the slave device at the specified address
+ * @param[in]  Addr - the register master read data from slave in. support one byte and two bytes.
+ * @param[in]  AddrLen - the length of register. two data: 1 or 2.
+ * @param[in]  dataBuf - the first address of SRAM buffer master store data in.
+ * @param[in]  dataLen - the length of data master read from slave.
+ * @return     none.
+ */
+extern void I2C_ReadSeries(unsigned short Addr, int AddrLen, unsigned char * dataBuf, int dataLen);
+
+/**
+ *   @brief      master write data to slave that is mapping mode.
+ *   @param[in]  pbuf - the first address of data master write to slave.
+ *   @param[in]  bufLen - the length of data to write.
+ *   @return     none
+ */
+extern void I2C_WriteDataSlaveMapping(unsigned char * pbuf,unsigned int bufLen);
+/**
+ *  @brief      read data from slave that is mapping mode.
+ *  @param[in]  pbuf - the first address of SRAM buffer to store data.
+ *  @param[in]  bufLen - the length of data read from slave(byte).
+ *  @return     none
+ */
+extern void I2C_ReadDataSlaveMapping(unsigned char * pbuf,unsigned int bufLen);
+
+
+#endif 
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/irq.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/irq.h
new file mode 100644
index 00000000..c17710dc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/irq.h
@@ -0,0 +1,138 @@
+/********************************************************************************************************
+ * @file    irq.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bit.h"
+
+
+// enalbe interrupt
+static inline unsigned char irq_enable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 1;
+	return r;
+}
+
+static inline unsigned char irq_disable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 0;
+	return r;
+}
+
+static inline void irq_restore(unsigned char en){
+	reg_irq_en = en;
+}
+
+static inline unsigned int irq_get_mask(void){
+	return reg_irq_mask;
+}
+
+static inline void irq_set_mask(unsigned long msk){
+    SET_FLD(reg_irq_mask, msk);
+}
+
+static inline void irq_clr_mask(unsigned long msk){
+    CLR_FLD(reg_irq_mask, msk);
+}
+
+static inline unsigned long irq_get_src(void){
+	return reg_irq_src;
+}
+
+static inline void irq_clr_all_src(void){
+	reg_irq_src = ONES_32;	// set to clear
+}
+
+static inline void irq_enable_type(unsigned long msk){
+	irq_set_mask(msk);
+}
+
+static inline void irq_disable_type(unsigned long msk){
+	irq_clr_mask(msk);
+}
+
+static inline void irq_init(unsigned long irq_mask){
+	reg_irq_mask = irq_mask;
+}
+
+static inline void dma_init(unsigned char dma_mask){
+	reg_dma_chn_irq_msk = dma_mask;
+}
+
+static inline void dma_irq_clear(void){
+	reg_dma_chn_irq_msk = 0;
+}
+
+static inline void dma_irq_enable(unsigned char msk)
+{
+	reg_dma_chn_irq_msk |= msk;
+}
+
+static inline void dma_irq_disable(unsigned char msk)
+{
+	reg_dma_chn_irq_msk &= ~msk;
+}
+
+static inline void dma_channel_enable_all(void){
+	reg_dma_chn_en = 0xff;
+}
+
+static inline void dma_channel_disable_all(void){
+	reg_dma_chn_en = 0;
+}
+
+/**
+ * @brief      Get IRQ status of RF.
+ * @param[in]  none
+ * @return     none
+ */
+static inline unsigned short rf_irq_src_get(void){
+    return reg_rf_irq_status;
+}
+
+static inline void rf_irq_clr_src(unsigned short msk)
+{
+    reg_rf_irq_status = msk;
+}
+
+/**
+ * @brief      Get IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline unsigned char dma_chn_irq_status_get(void){
+    return reg_dma_irq_src;
+}
+
+/**
+ * @brief      Clear IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline void dma_chn_irq_status_clr(unsigned char irq_status){
+	reg_dma_irq_src = irq_status;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pm.h
new file mode 100644
index 00000000..77f9ca34
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pm.h
@@ -0,0 +1,141 @@
+/********************************************************************************************************
+ * @file    pm.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "gpio.h"
+
+
+//power on reset
+#define DEEP_ANA_REG0				0x3A//initial value =0x00
+#define DEEP_ANA_REG1				0x3B//initial value =0x00
+
+//watch dog reset
+#define DEEP_ANA_REG4				0x34//initial value =0x00
+#define DEEP_ANA_REG5				0x35//initial value =0x00
+#define DEEP_ANA_REG6				0x36//initial value =0x00
+#define DEEP_ANA_REG7				0x37//initial value =0x00
+#define DEEP_ANA_REG8				0x38//initial value =0x00
+#define DEEP_ANA_REG9				0x39//initial value =0xff
+
+
+#define SYS_NEED_REINIT_EXT32K		BIT(0)
+#define SYS_DEEP_SLEEP_FLAG			BIT(1)
+
+//ana3b system used, user can not use
+#define SYS_DEEP_ANA_REG 			DEEP_ANA_REG1
+
+
+enum {
+	// WAKEUP_SRC_ANA 0 -- 2  not supported
+	 PM_WAKEUP_CORE  = BIT(5),
+	 PM_WAKEUP_TIMER = BIT(6),
+	 PM_WAKEUP_COMP  = BIT(7),
+	 PM_WAKEUP_PAD   = BIT(8),
+};
+
+enum{
+	// WAKEUP_SRC_ANA 0 -- 2  not supported
+	 WAKEUP_PC3_GRP0 = BIT(0),
+	 WAKEUP_PC4_GRP0 = BIT(1),
+	 WAKEUP_PC5_GRP0 = BIT(2),
+	 WAKEUP_PD0_GRP0 = BIT(3),
+	 WAKEUP_PD1_GRP1 = BIT(4),
+	 WAKEUP_PD2_GRP1 = BIT(5),
+	 WAKEUP_PD3_GRP1 = BIT(6),
+	 WAKEUP_PD4_GRP1 = BIT(7),
+	 WAKEUP_PD5_GRP2 = BIT(8),
+	 WAKEUP_PD6_GRP2 = BIT(9),
+	 WAKEUP_PD7_GRP2 = BIT(10),
+	 WAKEUP_PA0_GRP2 = BIT(11),
+	 WAKEUP_PA1_GRP3 = BIT(12),
+	 WAKEUP_PA2_GRP3 = BIT(13),
+	 WAKEUP_PA3_GRP3 = BIT(14),
+	 WAKEUP_PA4_GRP3 = BIT(15),
+	 WAKEUP_PA7_GRP4 = BIT(16),
+	 WAKEUP_PC6_GRP4 = BIT(17),
+	 WAKEUP_PC7_GRP4 = BIT(18),
+	 WAKEUP_PE0_GRP4 = BIT(19),
+	 WAKEUP_PE1_GRP5 = BIT(20),
+	 WAKEUP_PE2_GRP5 = BIT(21),
+	 WAKEUP_PA5_GRP5 = BIT(22),
+	 WAKEUP_PA6_GRP5 = BIT(23),
+};
+/*wakeup-level*/
+enum{
+	WAKEUP_GRP0_POS_EDG = 0,
+	WAKEUP_GRP1_POS_EDG = 0,
+	WAKEUP_GRP2_POS_EDG = 0,
+	WAKEUP_GRP3_POS_EDG = 0,
+	WAKEUP_GRP4_POS_EDG = 0,
+	WAKEUP_GRP5_POS_EDG = 0,
+
+	WAKEUP_GRP0_NEG_EDG = BIT(0),
+	WAKEUP_GRP1_NEG_EDG = BIT(1),
+	WAKEUP_GRP2_NEG_EDG = BIT(2),
+	WAKEUP_GRP3_NEG_EDG = BIT(3),
+	WAKEUP_GRP4_NEG_EDG = BIT(4),
+	WAKEUP_GRP5_NEG_EDG = BIT(5),
+};
+
+typedef enum {
+	 WAKEUP_SRC_PAD        = BIT(4),
+	 WAKEUP_SRC_DIG_GPIO   = BIT(5) | 0x0800,
+     WAKEUP_SRC_DIG_USB    = BIT(5) | 0x0400,
+	 WAKEUP_SRC_TIMER      = BIT(6),
+	 WAKEUP_SRC_COMP       = BIT(7),
+}WakeupSrc_TypeDef;
+
+enum {
+	LOWPWR_SUSPEND		= 0,
+	LOWPWR_DEEPSLEEP  	= 1,
+};
+
+enum {
+	SUSPEND_MODE	 	= 0,
+	DEEPSLEEP_MODE  	= 1,
+};
+
+enum {
+	MCU_STATUS_BOOT	 		= 0,
+	MCU_STATUS_DEEP_BACK  	= 1,
+};
+
+extern unsigned char pm_mcu_status;
+
+static inline unsigned char pm_get_mcu_status(void)
+{
+	return pm_mcu_status;
+}
+
+extern void PM_PadSet(GPIO_PinTypeDef pin, int pol, int en);
+extern void PM_GPIOSet(GPIO_PinTypeDef pin, int pol, int en);
+extern int pm_sleep_wakeup(int DeepSleep, int WakeupSrc, unsigned long WakeupTick);
+extern int pm_long_sleep_wakeup(int DeepSleep, int WakeupSrc, unsigned long WakeupTick);
+extern void cpu_wakeup_init(void);
+extern void sleep_start(void);
+extern void suspend_start(void);
+extern unsigned int pm_get_32k_tick(void);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pwm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pwm.h
new file mode 100644
index 00000000..27ea4b9f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/pwm.h
@@ -0,0 +1,334 @@
+/********************************************************************************************************
+ * @file    pwm.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef PWM_H
+#define PWM_H
+
+//pwm0 gpio config
+#define    PWM0_CFG_GPIO_A0()    do{\
+									*(volatile unsigned char  *)0x800586 &= 0xfe;\
+									*(volatile unsigned char  *)0x8005b0 &= 0xfe;\
+								 }while(0) 
+#define    PWM0_CFG_GPIO_C0()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xfe;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xfe;\
+								 }while(0) 
+#define    PWM0_CFG_GPIO_D5()    do{\
+									*(volatile unsigned char  *)0x80059e &= 0xdf;\
+								 }while(0) 
+#define    PWM0_CFG_GPIO_E0()    do{\
+									*(volatile unsigned char  *)0x8005a6 &= 0xfe;\
+									*(volatile unsigned char  *)0x8005b4 |= 0x01;\
+								 }while(0) 
+
+//pwm1 gpio config
+#define    PWM1_CFG_GPIO_A3()    do{\
+									*(volatile unsigned char  *)0x800586 &= 0xf7;\
+									*(volatile unsigned char  *)0x8005b0 &= 0xfb;\
+								 }while(0) 
+#define    PWM1_CFG_GPIO_C1()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xfd;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xfd;\
+								 }while(0) 
+#define    PWM1_CFG_GPIO_D6()    do{\
+									*(volatile unsigned char  *)0x80059e &= 0xbf;\
+								 }while(0) 
+#define    PWM1_CFG_GPIO_E1()    do{\
+									*(volatile unsigned char  *)0x8005a6 &= 0xfd;\
+									*(volatile unsigned char  *)0x8005b4 |= 0x02;\
+								 }while(0) 
+
+//pwm2 gpio config
+#define    PWM2_CFG_GPIO_B0()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xfe;\
+									*(volatile unsigned char  *)0x8005b1 |= 0x01;\
+								 }while(0) 
+#define    PWM2_CFG_GPIO_C2()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xfb;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xfb;\
+								 }while(0) 
+#define    PWM2_CFG_GPIO_D7()    do{\
+									*(volatile unsigned char  *)0x80059e &= 0x7f;\
+								 }while(0) 
+
+//pwm3 gpio config
+#define    PWM3_CFG_GPIO_B2()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xfb;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xfb;\
+								 }while(0) 
+#define    PWM3_CFG_GPIO_C3()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xf7;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xf7;\
+								 }while(0) 
+
+//pwm4 gpio config
+#define    PWM4_CFG_GPIO_B4()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xef;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xef;\
+								 }while(0) 
+#define    PWM4_CFG_GPIO_C4()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xef;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xef;\
+								 }while(0)
+
+//pwm5 gpio config
+#define    PWM5_CFG_GPIO_B6()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xbf;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xbf;\
+								 }while(0) 
+#define    PWM5_CFG_GPIO_C5()    do{\
+									*(volatile unsigned char  *)0x800596 &= 0xdf;\
+									*(volatile unsigned char  *)0x8005b2 &= 0xdf;\
+								 }while(0) 
+
+//pwm0_n gpio config
+#define    PWM0N_CFG_GPIO_A2()   do{\
+									*(volatile unsigned char  *)0x800586 &= 0xfb;\
+									*(volatile unsigned char  *)0x8005b0 &= 0xfd;\
+								 }while(0) 
+
+//pwm1_n gpio config
+#define    PWM1N_CFG_GPIO_A4()   do{\
+									*(volatile unsigned char  *)0x800586 &= 0xef;\
+									*(volatile unsigned char  *)0x8005b0 &= 0xef;\
+								 }while(0) 
+
+//pwm2_n gpio config
+#define    PWM2N_CFG_GPIO_A5()   do{\
+									*(volatile unsigned char  *)0x800586 &= 0xdf;\
+									*(volatile unsigned char  *)0x8005b0 &= 0xdf;\
+								 }while(0) 
+#define    PWM2N_CFG_GPIO_B1()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xfd;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xfd;\
+								 }while(0)
+
+//pwm3_n gpio config
+#define    PWM3N_CFG_GPIO_B3()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xf7;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xf7;\
+								 }while(0)
+
+//pwm4_n gpio config
+#define    PWM4N_CFG_GPIO_B5()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0xdf;\
+									*(volatile unsigned char  *)0x8005b1 &= 0xdf;\
+								 }while(0)
+
+//pwm5_n gpio config
+#define    PWM5N_CFG_GPIO_B7()    do{\
+									*(volatile unsigned char  *)0x80058e &= 0x7f;\
+									*(volatile unsigned char  *)0x8005b1 &= 0x7f;\
+								 }while(0)
+
+
+//Enable the specified pwm, v is the PWMN
+#define		EN_PWM(v)			(*(volatile unsigned char  *)0x800780 |= (1<<v))
+
+//Disable the specified pwm, v is the PWMN
+#define 	DIS_PWM(v)			(*(volatile unsigned char  *)0x800780 &= ~(1<<v))
+
+/*************************************************************
+*	@brief		enum variable, the number of PWM channels supported
+*
+*/
+enum PWMN{
+	PWM0 = 0,
+	PWM1,
+	PWM2,
+	PWM3,
+	PWM4,
+	PWM5,
+};
+
+
+/*************************************************************
+*	@brief		enum variable used for PWM work mode setting
+*
+*/
+enum PWMWM{
+	NORMAL,
+	COUNT,
+	IR = 0x03,
+};
+
+/*************************************************************
+*	@brief		enum variable of interrupt source
+*
+
+enum INTSOURCE{
+	SFNIRQ,//completed a pulse group IRQ, only counting mode and IR mode
+	FDIRQ,//Frame done IRQ
+};
+*/
+/********************************************************
+*
+*	pwm interrupt source 
+*/
+enum PWMIRQSOURCE{
+	NOIRQ = 0xff,
+	PWM0PNUM = 0,
+	PWM1PNUM,
+	PWM0CYCLEDONE,
+	PWM1CYCLEDONE,
+	PWM2CYCLEDONE,
+	PWM3CYCLEDONE,
+	PWM4CYCLEDONE,
+	PWM5CYCLEDONE,
+	PWMIRQSOURCENUM,
+};
+
+
+/************************************************************
+*	@brief	Initiate the PWM function include seting and enabling the PWM clock. 
+*			For test pin number 22 - 27 is the PWM output pin.
+*
+*	@param	None
+*
+*	@return	None
+*/
+extern void pwm_Init(unsigned char pwmCLKdiv);
+
+/********************************************************************************
+*	@brief	open a pwm channel and setting the parameters
+*
+*	@param	pwmNumber - enum variable of pwm channel number
+*			pwmWorkM - enum variable of pwm work mode
+*			phaseTime - delay time of the pwm channel before enter into the count status
+*			cscValue - count status value
+*			cycVlaue - cycle value
+*			sfValue - signal frame value for the COUNT and IR mode
+*	
+*	@return	'1' set success; '0' set error, if you set pwm2 - pwm5 to work on the other not normal mode, the function will return error.
+*
+*/
+extern unsigned char pwm_Open(enum PWMN pwmNumber, enum PWMWM pwmWorkM, unsigned short phaseTime, unsigned short cscValue, unsigned short cycValue, unsigned short sfValue );
+
+/*******************************************************************************
+*
+*	@brief	close a pwm channel and reset the settings to default
+*	
+*	@param	pwmNumber - enum variable of pwm channel number
+
+*
+*	@return	None
+*/
+extern void pwm_Close(enum PWMN pwmNumber);
+
+/*******************************************************************************
+*
+*	@brief	start a pwm channel and enable the output
+*	
+*	@param	pwmNumber - enum variable of pwm channel number
+
+*
+*	@return	None
+*/
+extern void pwm_Start(enum PWMN pwmNumber);
+
+/*******************************************************************************
+*
+*	@brief	stop a pwm channel and disable the output
+*	
+*	@param	pwmNumber - enum variable of pwm channel number
+
+*
+*	@return	None
+*/
+extern void pwm_Stop(enum PWMN pwmNumber);
+
+/*******************************************************************************
+*
+*	@brief	set the duty cycle of a pwm channel
+*	
+*	@param	pwmNumber - enum variable of pwm channel number
+*			cscValue - count status value
+*			cycVlaue - cycle value
+
+*
+*	@return	'1' set success; '0' set error, if csValue>cycValue
+*/
+extern unsigned char pwm_DutyCycleSet(enum PWMN pwmNumber, unsigned short csValue,unsigned short cycValue);
+
+/********************************************************
+*	@brief	enable pwm interrupt
+*
+*	@param	pwmNumber - enum variable of pwm channel number
+*			pwmINTM - enum variable of pwm channel's interrupt mode
+*
+*	@return	None
+*/
+extern unsigned char pwm_InterruptEnable(enum PWMIRQSOURCE pwmIrqSrc);
+
+/********************************************************
+*	@brief	disable pwm interrupt
+*
+*	@param	pwmNumber - enum variable of pwm channel number
+*			pwmM - enum variable of pwm work mode
+*
+*	@return	None
+*/
+extern unsigned char pwm_InterruptDisable(enum PWMIRQSOURCE pwmIrqSrc);
+/**********************************************************************
+*
+*	@brief	get interrupt source
+*
+*	@param	none
+*	
+*	@return	irq_source - interrupt source, enum variable
+*/
+extern enum PWMIRQSOURCE pwm_InterruptSourceGet(void );
+
+/********************************************************
+*	@brief	clear interrupt status
+*
+*	@param	pwmNumber - enum variable of pwm channel number
+*			pwmINTM - enum variable of pwm channel's interrupt mode
+*
+*	@return	None
+*/
+extern void pwm_InterruptStatusClr(enum PWMIRQSOURCE irq_src);
+
+/********************************************************************
+*
+*	@brief	Invert PWM-INV output (would generate the same output waveform as PWMN)
+*
+*	@param	pwmNumber - enum variable of pwm number
+*
+*	@return	None
+*/
+extern void pwm_INVInvert(enum PWMN pwmNumber);
+
+/********************************************************************
+*
+*	@brief	Invert PWM output (would generate the same output waveform as PWMN)
+*
+*	@param	pwmNumber - enum variable of pwm number
+*
+*	@return	None
+*/
+extern void pwm_Invert(enum PWMN pwmNumber);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/register.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/register.h
new file mode 100644
index 00000000..e5572a00
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/register.h
@@ -0,0 +1,1670 @@
+/********************************************************************************************************
+ * @file    register.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#include "bit.h"
+#include "bsp.h"
+
+/****************************************************
+  secondary i2c regs struct: begin  addr : 0x00
+ *****************************************************/
+#define reg_i2c_set				REG_ADDR32(0x00)
+#define reg_i2c_speed			REG_ADDR8(0x00)
+#define reg_i2c_id				REG_ADDR8(0x01)
+#define reg_i2c_status			REG_ADDR8(0x02)
+enum{
+	FLD_I2C_CMD_BUSY		= 	BIT(0),
+	FLD_I2C_BUS_BUSY		= 	BIT(1),
+	FLD_I2C_NAK				= 	BIT(2),
+};
+
+#define reg_i2c_mode			REG_ADDR8(0x03)
+enum{
+	FLD_I2C_ADDR_AUTO 		=	BIT(0),
+	FLD_I2C_MODE_MASTER		= 	BIT(1),		// 1: master, 0: slave
+	FLD_I2C_MEM_MAP 		=	BIT(2), 	// write i2c data to predefined memory address which set by other register
+};
+
+#define reg_i2c_adr_dat			REG_ADDR16(0x04)
+#define reg_i2c_dat_ctrl		REG_ADDR32(0x04)
+#define reg_i2c_di_ctrl			REG_ADDR16(0x06)
+#define reg_i2c_adr				REG_ADDR8(0x04)
+#define reg_i2c_do				REG_ADDR8(0x05)
+#define reg_i2c_di				REG_ADDR8(0x06)
+#define reg_i2c_ctrl			REG_ADDR8(0x07)
+enum{
+	FLD_I2C_CMD_ID		= 		BIT(0),
+	FLD_I2C_CMD_ADR		= 		BIT(1),
+	FLD_I2C_CMD_DO		= 		BIT(2),
+	FLD_I2C_CMD_DI		= 		BIT(3),
+	FLD_I2C_CMD_START	= 		BIT(4),
+	FLD_I2C_CMD_STOP	= 		BIT(5),
+	FLD_I2C_CMD_READ_ID	= 		BIT(6),
+	FLD_I2C_CMD_NAK		= 		BIT(7),
+};
+
+/****************************************************
+  secondary spi regs struct: begin  addr : 0x08
+ *****************************************************/
+#define reg_spi_data			REG_ADDR8(0x08)
+#define reg_spi_ctrl			REG_ADDR8(0x09)
+enum{
+	FLD_SPI_CS = 				BIT(0),
+	FLD_SPI_MASTER_MODE_EN = 	BIT(1),
+	FLD_SPI_DATA_OUT_DIS = 		BIT(2),
+	FLD_SPI_RD = 				BIT(3),
+	FLD_SPI_ADDR_AUTO =			BIT(4),
+	FLD_SPI_BUSY = 				BIT(6),		// diff from doc,  bit 6 working
+};
+#define reg_spi_sp				REG_ADDR8(0x0a)
+enum{
+	FLD_MASTER_SPI_CLK = 		BIT_RNG(0,6),
+	FLD_SPI_ENABLE =			BIT(7),
+	FLD_SPI_PAD_SEL = 			BIT(7),
+};
+
+#define reg_spi_inv_clk			REG_ADDR8(0x0b)
+
+/****************************************************
+ master spi regs struct: begin  addr : 0x0c
+ *****************************************************/
+#define reg_master_spi_data		REG_ADDR8(0x0c)
+#define reg_master_spi_ctrl		REG_ADDR8(0x0d)
+
+enum{
+	FLD_MASTER_SPI_CS = 		BIT(0),
+	FLD_MASTER_SPI_SDO = 		BIT(1),
+	FLD_MASTER_SPI_CONT = 		BIT(2),
+	FLD_MASTER_SPI_RD = 		BIT(3),
+	FLD_MASTER_SPI_BUSY = 		BIT(4),
+};
+
+/****************************************************
+ otp regs struct: begin  addr : 0x10
+ *****************************************************/
+
+#define reg_otp_addr_para		REG_ADDR16(0x10)
+enum{
+	FLD_OTP_PARA_ADDR = 		BIT_RNG(0,12),
+	FLD_OTP_PARA_PTM = 			BIT_RNG(13,15),
+};
+
+#define reg_otp_ctrl			REG_ADDR8(0x12)
+enum{
+	FLD_OTP_CTRL_PCEN = 		BIT(0),
+	FLD_OTP_FAST_CLK = 			BIT(1),
+	FLD_OTP_OEN = 				BIT(2),
+	FLD_OTP_CLK = 				BIT(3),
+	FLD_OTP_PCEN_PWDN = 		BIT(4),
+	FLD_OTP_WEN_PWDN = 			BIT(5),
+	FLD_OTP_OEN_PWDN = 			BIT(6),
+	FLD_OTP_CLK_PWDN = 			BIT(7),
+};
+
+#define reg_otp_byte_dat		REG_ADDR8(0x13)
+#define reg_otp_dat				REG_ADDR32(0x14)
+#define reg_otp_blk_code		REG_ADDR8(0x18)
+
+#define reg_i2c_irq_status		REG_ADDR8(0x21)
+#define reg_i2c_clr_status		REG_ADDR8(0x22)
+enum{
+	FLD_I2C_STATUS_WR = 		BIT(1),
+	FLD_I2C_STATUS_RD = 		BIT(2),
+};
+
+/****************************************************
+ adc regs struct: begin  addr : 0x28
+ *****************************************************/
+
+/////////// pga select, [3:0] L; [7:4] R ////////////////////
+#define reg_adc_pga_sel_m		REG_ADDR8(0x28)
+#define reg_adc_pga_sel_l		REG_ADDR8(0x29)
+#define reg_adc_pga_sel_r		REG_ADDR8(0x2a)
+
+#define reg_adc_ref				REG_ADDR8(0x2b)
+enum{
+	FLD_ADC_REF_M = 			BIT_RNG(0,1),
+	FLD_ADC_REF_L = 			BIT_RNG(2,3),
+	FLD_ADC_REF_R = 			BIT_RNG(4,5),
+};
+
+/////////// adc select [4:0] channel; [6:5] mode; [7] signed
+#define reg_adc_chn_m_sel		REG_ADDR8(0x2c)
+#define reg_adc_chn_l_sel		REG_ADDR8(0x2d)
+#define reg_adc_chn_r_sel		REG_ADDR8(0x2e)
+enum{
+	FLD_ADC_CHN_SEL = 			BIT_RNG(0,4),
+	FLD_ADC_DIFF_CHN_SEL = 		BIT_RNG(5,7),	// datasheet  12.1
+};
+
+enum{
+	FLD_ADC_CHN_D0				= 0x01,
+	FLD_ADC_CHN_D1				= 0x02,
+	FLD_ADC_CHN_D2				= 0x03,
+	FLD_ADC_CHN_D3				= 0x04,
+	FLD_ADC_CHN_D4				= 0x05,
+	FLD_ADC_CHN_D5				= 0x06,
+	FLD_ADC_CHN_C2				= 0x07,
+	FLD_ADC_CHN_C3				= 0x08,
+	FLD_ADC_CHN_C4				= 0x09,
+	FLD_ADC_CHN_C5				= 0x0a,
+	FLD_ADC_CHN_C6				= 0x0b,
+	FLD_ADC_CHN_C7				= 0x0c,
+
+	FLD_ADC_CHN_PGA_R			= 0x0d,
+	FLD_ADC_CHN_PGA_L			= 0x0e,
+
+	FLD_ADC_CHN_TEMP_POS		= 0x0f,
+	FLD_ADC_CHN_TEMP_NEG		= 0x10,
+	FLD_ADC_CHN_VBUS			= 0x11,
+	FLD_ADC_CHN_GND				= 0x12,
+
+	FLD_ADC_SINGLE_IN			= 0x00,
+	FLD_ADC_D5_REF				= 0x20,
+	FLD_ADC_D7_REF				= 0x40,
+	FLD_ADC_PGA_L_REF			= 0x60,
+	FLD_ADC_DATA_SIGNED			= 0x80,
+
+	FLD_ADC_PGA_C01				= 0x226d,
+	FLD_ADC_PGA_C23				= 0x116d,
+	FLD_ADC_PGA_C45				= 0x016d,
+
+	FLD_ADC_PGA_R_C2			= 0x110d,
+	FLD_ADC_PGA_R_C0			= 0x220d,
+	FLD_ADC_PGA_L_C3			= 0x110e,
+	FLD_ADC_PGA_L_C1			= 0x220e,
+
+	FLD_ADC_PGA_OFF				= 0x0000,
+
+};
+
+#define reg_adc_ref				REG_ADDR8(0x2b)
+
+#define reg_adc_res_lr			REG_ADDR8(0x2f)
+#define reg_adc_res_m			REG_ADDR8(0x3c)
+#define reg_adc_tsamp_lr		REG_ADDR8(0x3d)
+
+enum{
+	FLD_ADC_VREF_1P3V			= 0x15,
+	FLD_ADC_12BITS				= 0x07,
+	FLD_ADC_TSAMP_3CLOCK		= 0x00,
+};
+
+
+#define reg_adc_period_chn0		REG_ADDR16(0x30)
+#define reg_adc_period_chn12	REG_ADDR8(0x32)
+
+#define reg_adc_ctrl			REG_ADDR8(0x33)
+enum{
+	FLD_ADC_CHNL_AUTO_EN = 		BIT(0),
+	FLD_ADC_CHNR_AUTO_EN =		BIT(1),
+	FLD_ADC_AUD_DATAPATH_EN =	BIT(2),
+	FLD_ADC_CHNM_AUTO_EN =		BIT(3),
+	FLD_ADC_AUD_MODE =			BITS(4,5),		// 0: no audio; 1: mono; 2: stereo; 3: reserved
+	FLD_ADC_DONE_SIGNAL =		BITS(6,7),		// 1: rising; 2: falling; else: counter
+};
+
+#define reg_adc_chn1_outp		REG_ADDR16(0x34)
+enum{
+	FLD_ADC_OUTPUT_CHN_VAL = 	BIT_RNG(0,14),
+	FLD_ADC_CHN_MANU_START = 	BIT(15),
+};
+#define reg_adc_chn2_outp		REG_ADDR16(0x36)
+#define reg_adc_dat_byp_outp	REG_ADDR16(0x38)
+
+#define reg_adc_chn0_input		REG_ADDR16(0x3a)
+
+#define reg_adc_samp_res		REG_ADDR16(0x3c)
+enum{
+	FLD_ADC_CHNM_SAMP_CYCLE = 	BIT_RNG(0,2),
+	FLD_ADC_CHNM_SAMP_RESOL = 	BIT_RNG(3,5),
+	FLD_ADC_CHNLR_SAMP_CYCLE =	BIT_RNG(8,10),	// reg: 0x3d
+};
+
+#define reg_i2c_mem_map			REG_ADDR16(0x3e)	// check with spec again // refer to FLD_I2C_MEM_MAP
+
+/****************************************************
+ sys regs struct: begin  addr : 0x60
+ *****************************************************/
+#define reg_rst0				REG_ADDR8(0x60)
+#define reg_rst0_16				REG_ADDR16(0x60)
+#define reg_rst1				REG_ADDR8(0x61)
+#define reg_rst2				REG_ADDR8(0x62)
+#define reg_rst_clk0			REG_ADDR32(0x60)
+enum{
+	FLD_RST_SPI = 				BIT(0),
+	FLD_RST_I2C = 				BIT(1),
+	FLD_RST_USB = 				BIT(2),
+	FLD_RST_USB_PHY = 			BIT(3),
+	FLD_RST_MCU = 				BIT(4),
+	FLD_RST_MAC =				BIT(5),
+	FLD_RST_AIF = 				BIT(6),
+	FLD_RST_BB = 				BIT(7),
+	FLD_RST_ZB =				BIT(7),
+	FLD_RST_GPIO = 				BIT(8),
+	FLD_RST_ALGM = 				BIT(9),
+	FLD_RST_DMA =				BIT(10),
+	FLD_RST_UART = 				BIT(11),
+	FLD_RST_PWM = 				BIT(12),
+	FLD_RST_AES = 				BIT(13),
+	FLD_RST_SWR_M =				BIT(14),
+	FLD_RST_SWR_S =				BIT(15),
+	FLD_RST_SBC =				BIT(16),
+	FLD_RST_AUD =				BIT(17),
+	FLD_RST_DFIFO =				BIT(18),
+	FLD_RST_ADC =				BIT(19),
+	FLD_RST_SOFT_MCU =			BIT(20),
+	FLD_RST_MCIC = 				BIT(21),
+	FLD_RST_SOFT_MCIC =			BIT(22),
+	FLD_RST_RSV =				BIT(23),
+	FLD_CLK_SPI_EN =			BIT(24),
+	FLD_CLK_I2C_EN =			BIT(25),
+	FLD_CLK_USB_EN =			BIT(26),
+	FLD_CLK_USB_PHY_EN =		BIT(27),
+	FLD_CLK_MCU_EN =			BIT(28),
+	FLD_CLK_MAC_EN =			BIT(29),
+	FLD_CLK_ADC_EN =			BIT(30),	// ADC interface
+	FLD_CLK_ZB_EN =				BIT(31),
+};
+
+#define reg_clk_en				REG_ADDR16(0x64)
+#define reg_clk_en1				REG_ADDR8(0x64)
+enum{
+	FLD_CLK_GPIO_EN = 			BIT(0),
+	FLD_CLK_ALGM_EN = 			BIT(1),
+	FLD_CLK_DMA_EN = 			BIT(2),
+	FLD_CLK_UART_EN = 			BIT(3),
+	FLD_CLK_PWM_EN = 			BIT(4),
+	FLD_CLK_AES_EN = 			BIT(5),
+	FLD_CLK_32K_TIMER_EN =		BIT(6),
+	FLD_CLK_SWIRE_EN = 			BIT(7),
+	FLD_CLK_32K_QDEC_EN =		BIT(8),
+	FLD_CLK_AUD_EN =			BIT(9),
+	FLD_CLK_DIFIO_EN = 			BIT(10),
+	FLD_CLK_KEYSCAN_EN =		BIT(11),
+	FLD_CLK_MCIC_EN =			BIT(12),
+	FLD_CLK_QDEC_EN =			BIT(13),
+};
+#define reg_clk_en2				REG_ADDR8(0x65)
+enum{
+	FLD_CLK2_SBC_EN =			BIT(0),
+	FLD_CLK2_AUD_EN =			BIT(1),
+	FLD_CLK2_DIFIO_EN = 		BIT(2),
+	FLD_CLK2_I2S =				BIT_RNG(3,4),
+	FLD_CLK2_C32K =				BIT_RNG(5,7),
+};
+
+#define reg_clk_sel				REG_ADDR8(0x66)
+enum{
+	FLD_CLK_SEL_DIV = 			BIT_RNG(0,4),
+	FLD_CLK_SEL_SRC =			BIT_RNG(5,7),
+};
+
+#define reg_i2s_step			REG_ADDR8(0x67)
+enum{
+	FLD_I2S_STEP = 				BIT_RNG(0,6),
+	FLD_I2S_CLK_EN =			BIT(7),
+};
+
+#define reg_i2s_mod				REG_ADDR8(0x68)
+
+static inline void SET_SDM_CLOCK_MHZ(int f_mhz)	{
+	reg_i2s_step = FLD_I2S_CLK_EN | f_mhz;
+	reg_i2s_mod = 0xc0;
+}
+
+/****************************************************
+	 ADC: 0x69
+ *****************************************************/
+#define reg_adc_step_l			REG_ADDR8(0x69)
+#define reg_adc_mod_l			REG_ADDR8(0x6a)
+#define reg_adc_mod				REG_ADDR16(0x6a)
+enum{
+	FLD_ADC_MOD = 				BIT_RNG(0,11),
+	FLD_ADC_STEP_H = 			BIT_RNG(12,14),
+	FLD_ADC_CLK_EN =			BIT(15),
+};
+#define reg_adc_clk_en			REG_ADDR8(0x6b)
+#define reg_adc_mod_h			REG_ADDR8(0x6b)
+enum{
+	FLD_ADC_MOD_H = 			BIT_RNG(0,3),
+	FLD_ADC_MOD_H_STEP =		BIT_RNG(4,6),
+	FLD_ADC_MOD_H_CLK =			BIT(7),
+};
+
+#define reg_dmic_step			REG_ADDR8(0x6c)
+enum{
+	FLD_DMIC_STEP = 			BIT_RNG(0,6),
+	FLD_DMIC_CLK_EN =			BIT(7),
+};
+#define reg_dmic_mod			REG_ADDR8(0x6d)
+
+
+#define reg_wakeup_en			REG_ADDR8(0x6e)
+enum{
+	FLD_WAKEUP_SRC_I2C = 		BIT(0),
+	FLD_WAKEUP_SRC_SPI =		BIT(1),
+	FLD_WAKEUP_SRC_USB =		BIT(2),
+	FLD_WAKEUP_SRC_GPIO =		BIT(3),
+	FLD_WAKEUP_SRC_I2C_SYN =	BIT(4),
+	FLD_WAKEUP_SRC_GPIO_RM =	BIT(5),
+	FLD_WAKEUP_SRC_USB_RESM =	BIT(6),
+	FLD_WAKEUP_SRC_RST_SYS =	BIT(7),
+};
+
+#define reg_pwdn_ctrl			REG_ADDR8(0x6f)
+enum{
+	FLD_PWDN_CTRL_REBOOT = 		BIT(5),
+	FLD_PWDN_CTRL_SLEEP =		BIT(7),
+};
+
+#define reg_fhs_sel				REG_ADDR8(0x70)
+enum{
+	FLD_FHS_SELECT = 			BIT_RNG(0,1),
+};
+enum{
+	FHS_SEL_192M_PLL = 0,
+//	FHS_SEL_48M_PLL = 1,
+	FHS_SEL_32M_OSC = 1,
+//	FHS_SEL_16M_OSC = 3,
+};
+
+/****************************************************
+  OTP  addr : 0x71
+ *****************************************************/
+#define reg_dcdc_clk			REG_ADDR8(0x71)
+
+/****************************************************
+ dev_id regs struct: begin  addr : 0x74
+ *****************************************************/
+#define reg_id_wr_en			REG_ADDR8(0x74)
+#define reg_product_id			REG_ADDR32(0x7c)
+#define reg_func_id				REG_ADDR8(0x7c)
+enum{
+	FLD_ID_USB_SYS_CLOCK = 		BIT(0),
+	FLD_ID_MAC_CLOCK = 			BIT(1),
+	FLD_ID_SBC_CLOCK = 			BIT(2),
+	FLD_ID_RISC32_ENABLE = 		BIT(3),
+	FLD_ID_I2S_ENABLE = 		BIT(4),
+	FLD_ID_SDM_ENABLE = 		BIT(5),
+	FLD_ID_RF_ENABLE = 			BIT(6),
+	FLD_ID_ZB_ENABLE = 			BIT(7),
+};
+
+#define reg_ver_id				REG_ADDR8(0x7d)
+#define reg_prod_id				REG_ADDR16(0x7e)
+
+#define reg_mcu_wakeup_mask		REG_ADDR32(0x78)
+
+/****************************************************
+ mac regs struct: begin  addr : 0xa0
+ *****************************************************/
+#define reg_mac_ctrl			REG_ADDR8(0x80)
+enum{
+	FLD_MAC_CTRL_TX_EN = 		BIT(0),
+	FLD_MAC_CTRL_RX_EN =		BIT(1),
+	FLD_MAC_CTRL_SPD_100M =		BIT(6),
+	FLD_MAC_CTRL_PHY_RST =		BIT(7),
+};
+
+#define reg_mac_irq_sta			REG_ADDR8(0x81)
+enum{
+	FLD_MAC_STA_TX_DONE = 		BIT(0),
+	FLD_MAC_STA_RX_DONE =		BIT(1),
+	FLD_MAC_STA_TX_ERR =		BIT(2),
+	FLD_MAC_STA_RX_ERR =		BIT(3),
+	FLD_MAC_STA_RX_CRC =		BIT(4),
+};
+
+#define reg_mii_tx_data			REG_ADDR16(0x82)
+#define reg_mii_rx_data			REG_ADDR16(0x84)
+#define reg_mii_clk				REG_ADDR8(0x86)
+enum{
+	FLD_MII_PHY_ID  = 			BIT_RNG(0,4),
+	FLD_MII_CLK_DIV =			BIT_RNG(5,7),
+};
+#define reg_mii_ctrl			REG_ADDR8(0x87)
+enum{
+	FLD_MII_INTERNAL_REG  = 	BIT_RNG(0,4),
+	FLD_MII_BUSY =				BIT(5),
+	FLD_MII_WR =				BIT(6),
+	FLD_MII_PREAM_EN =			BIT(7),
+};
+
+/////////////  Uart  //////////////////////////////////
+#define reg_uart_clk_div		REG_ADDR16(0x94)
+enum{
+	FLD_UART_CLK_DIV = 			BIT_RNG(0,14),
+	FLD_UART_CLK_DIV_EN = 		BIT(15)
+};
+
+#define reg_uart_ctrl0			REG_ADDR16(0x96)
+enum{
+	FLD_UART_BPWC = 			BIT_RNG(0,3),
+	FLD_UART_RX_DMA_EN = 		BIT(4),
+	FLD_UART_TX_DMA_EN =		BIT(5),
+	FLD_UART_RX_IRQ_EN = 		BIT(6),
+	FLD_UART_TX_IRQ_EN =		BIT(7),
+	FLD_UART_CTS_I_SELECT =		BIT(8),
+	FLD_UART_CTS_EN = 			BIT(9),
+	FLD_UART_PARITY_EN =		BIT(10),
+};
+#define reg_uart_ctrl1			REG_ADDR16(0x98)
+
+#define reg_uart_rx_timeout		REG_ADDR16(0x9a)
+enum{
+	FLD_UART_TIMEOUT_BW = 		BIT_RNG(0,7),		//  timeout bit width
+	FLD_UART_TIMEOUT_MUL = 		BIT_RNG(8,15),
+};
+
+/****************************************************
+ swire regs struct: begin  addr : 0xb0
+ *****************************************************/
+#define reg_swire_data			REG_ADDR8(0xb0)
+#define reg_swire_ctrl1			REG_ADDR8(0xb1)
+enum{
+	FLD_SWIRE_WR  = 			BIT(0),
+	FLD_SWIRE_RD  = 			BIT(1),
+	FLD_SWIRE_CMD =				BIT(2),
+	FLD_SWIRE_USB_DET =			BIT(6),
+	FLD_SWIRE_USB_EN =			BIT(7),
+};
+
+#define reg_swire_clk_div		REG_ADDR8(0xb2)
+
+//////  analog controls 0xb8 ///////
+#define reg_ana_ctrl32			REG_ADDR32(0xb8)	// for performance, set addr and data at a time
+#define reg_ana_addr_data		REG_ADDR16(0xb8)	// for performance, set addr and data at a time
+#define reg_ana_addr			REG_ADDR8(0xb8)
+#define reg_ana_data			REG_ADDR8(0xb9)
+#define reg_ana_ctrl			REG_ADDR8(0xba)
+
+enum{
+	FLD_ANA_BUSY  = 			BIT(0),
+	FLD_ANA_RSV	=				BIT(4),
+	FLD_ANA_RW  = 				BIT(5),
+	FLD_ANA_START  = 			BIT(6),
+	FLD_ANA_CYC  = 				BIT(7),
+};
+/****************************************************
+ audio regs struct: begin  addr : 0x100
+ *****************************************************/
+#define reg_ctrl_ep_ptr			REG_ADDR8(0x100)
+#define reg_ctrl_ep_dat			REG_ADDR8(0x101)
+#define reg_ctrl_ep_ctrl		REG_ADDR8(0x102)
+
+// same for all endpoints
+enum{
+	FLD_EP_DAT_ACK  = 			BIT(0),
+	FLD_EP_DAT_STALL =			BIT(1),
+	FLD_EP_STA_ACK = 			BIT(2),
+	FLD_EP_STA_STALL = 			BIT(3),
+};
+
+#define reg_ctrl_ep_irq_sta		REG_ADDR8(0x103)
+enum{
+	FLD_CTRL_EP_IRQ_TRANS  = 	BIT_RNG(0,3),
+	FLD_CTRL_EP_IRQ_SETUP  =	BIT(4),
+	FLD_CTRL_EP_IRQ_DATA  =		BIT(5),
+	FLD_CTRL_EP_IRQ_STA  = 		BIT(6),
+	FLD_CTRL_EP_IRQ_INTF  = 	BIT(7),
+};
+
+#define reg_ctrl_ep_irq_mode	REG_ADDR8(0x104)
+enum{
+	FLD_CTRL_EP_AUTO_ADDR = 	BIT(0),
+	FLD_CTRL_EP_AUTO_CFG =		BIT(1),
+	FLD_CTRL_EP_AUTO_INTF =		BIT(2),
+	FLD_CTRL_EP_AUTO_STA =		BIT(3),
+	FLD_CTRL_EP_AUTO_SYN =		BIT(4),
+	FLD_CTRL_EP_AUTO_DESC =		BIT(5),
+	FLD_CTRL_EP_AUTO_FEAT =		BIT(6),
+	FLD_CTRL_EP_AUTO_STD =		BIT(7),
+};
+
+#define reg_usb_ctrl			REG_ADDR8(0x105)
+enum{
+	FLD_USB_CTRL_AUTO_CLK = 	BIT(0),
+	FLD_USB_CTRL_LOW_SPD = 		BIT(1),
+	FLD_USB_CTRL_LOW_JITT =		BIT(2),
+	FLD_USB_CTRL_TST_MODE = 	BIT(3),
+};
+
+#define reg_usb_cyc_cali		REG_ADDR16(0x106)
+#define reg_usb_mdev			REG_ADDR8(0x10a)
+#define reg_usb_host_conn		REG_ADDR8(0x10b)
+enum{
+	FLD_USB_MDEV_SELF_PWR = 	BIT(0),
+	FLD_USB_MDEV_SUSP_STA = 	BIT(1),
+};
+
+#define reg_usb_sups_cyc_cali	REG_ADDR8(0x10c)
+#define reg_usb_intf_alt		REG_ADDR8(0x10d)
+
+#define reg_usb_ep8123_ptr		REG_ADDR32(0x110)
+#define reg_usb_ep8_ptr			REG_ADDR8(0x110)
+#define reg_usb_ep1_ptr			REG_ADDR8(0x111)
+#define reg_usb_ep2_ptr			REG_ADDR8(0x112)
+#define reg_usb_ep3_ptr			REG_ADDR8(0x113)
+#define reg_usb_ep4567_ptr		REG_ADDR32(0x114)
+#define reg_usb_ep4_ptr			REG_ADDR8(0x114)
+#define reg_usb_ep5_ptr			REG_ADDR8(0x115)
+#define reg_usb_ep6_ptr			REG_ADDR8(0x116)
+#define reg_usb_ep7_ptr			REG_ADDR8(0x117)
+#define reg_usb_ep_ptr(i)		REG_ADDR8(0x110+((i) & 0x07))
+
+#define reg_usb_ep8123_dat		REG_ADDR32(0x118)
+#define reg_usb_ep8_dat			REG_ADDR8(0x118)
+#define reg_usb_ep1_dat			REG_ADDR8(0x119)
+#define reg_usb_ep2_dat			REG_ADDR8(0x11a)
+#define reg_usb_ep3_dat			REG_ADDR8(0x11b)
+#define reg_usb_ep4567_dat		REG_ADDR32(0x11c)
+#define reg_usb_ep4_dat			REG_ADDR8(0x11c)
+#define reg_usb_ep5_dat			REG_ADDR8(0x11d)
+#define reg_usb_ep6_dat			REG_ADDR8(0x11e)
+#define reg_usb_ep7_dat			REG_ADDR8(0x11f)
+#define reg_usb_ep_dat(i)		REG_ADDR8(0x118+((i) & 0x07))
+
+#define reg_usb_ep8_ctrl		REG_ADDR8(0x120)
+#define reg_usb_ep1_ctrl		REG_ADDR8(0x121)
+#define reg_usb_ep2_ctrl		REG_ADDR8(0x122)
+#define reg_usb_ep3_ctrl		REG_ADDR8(0x123)
+#define reg_usb_ep4_ctrl		REG_ADDR8(0x124)
+#define reg_usb_ep5_ctrl		REG_ADDR8(0x125)
+#define reg_usb_ep6_ctrl		REG_ADDR8(0x126)
+#define reg_usb_ep7_ctrl		REG_ADDR8(0x127)
+#define reg_usb_ep_ctrl(i)		REG_ADDR8(0x120+((i) & 0x07))
+
+enum{
+	FLD_USB_EP_BUSY = 			BIT(0),
+	FLD_USB_EP_STALL =			BIT(1),
+	FLD_USB_EP_DAT0 =			BIT(2),
+	FLD_USB_EP_DAT1 =			BIT(3),
+	FLD_USB_EP_MONO =			BIT(6),
+	FLD_USB_EP_EOF_ISO =		BIT(7),
+};
+
+#define reg_usb_ep8123_buf_addr	REG_ADDR32(0x128)
+#define reg_usb_ep8_buf_addr	REG_ADDR8(0x128)
+#define reg_usb_ep1_buf_addr	REG_ADDR8(0x129)
+#define reg_usb_ep2_buf_addr	REG_ADDR8(0x12a)
+#define reg_usb_ep3_buf_addr	REG_ADDR8(0x12b)
+#define reg_usb_ep4567_buf_addr	REG_ADDR32(0x12c)
+#define reg_usb_ep4_buf_addr	REG_ADDR8(0x12c)
+#define reg_usb_ep5_buf_addr	REG_ADDR8(0x12d)
+#define reg_usb_ep6_buf_addr	REG_ADDR8(0x12e)
+#define reg_usb_ep7_buf_addr	REG_ADDR8(0x12f)
+#define reg_usb_ep_buf_addr(i)	REG_ADDR8(0x128+((i) & 0x07))
+
+#define reg_usb_ram_ctrl		REG_ADDR8(0x130)
+enum{
+	FLD_USB_CEN_PWR_DN =		BIT(0),
+	FLD_USB_CLK_PWR_DN =		BIT(1),
+	FLD_USB_WEN_PWR_DN =		BIT(3),
+	FLD_USB_CEN_FUNC =			BIT(4),
+};
+
+#define reg_usb_iso_mode		REG_ADDR8(0x138)
+#define reg_usb_irq				REG_ADDR8(0x139)
+#define reg_usb_mask			REG_ADDR8(0x13a)
+#define reg_usb_ep8_send_max	REG_ADDR8(0x13b)
+#define reg_usb_ep8_send_thre	REG_ADDR8(0x13c)
+#define reg_usb_ep8_fifo_mode	REG_ADDR8(0x13d)
+#define reg_usb_ep_max_size		REG_ADDR8(0x13e)
+
+enum{
+	FLD_USB_ENP8_FIFO_MODE =	BIT(0),
+	FLD_USB_ENP8_FULL_FLAG =	BIT(1),
+};
+/****************************************************
+	RF : begin  addr : 0x4e8
+ *****************************************************/
+#define reg_rf_tx_mode1			REG_ADDR8(0x400)
+#define reg_rf_tx_mode			REG_ADDR16(0x400)
+enum{
+	FLD_RF_TX_DMA_EN =			BIT(0),
+	FLD_RF_TX_CRC_EN =			BIT(1),
+	FLD_RF_TX_BANDWIDTH =		BIT_RNG(2,3),
+	FLD_RF_TX_OUTPUT = 			BIT(4),
+	FLD_RF_TX_TST_OUT =			BIT(5),
+	FLD_RF_TX_TST_EN =			BIT(6),
+	FLD_RF_TX_TST_MODE =		BIT(7),
+	FLD_RF_TX_ZB_PN_EN =		BIT(8),
+	FLD_RF_TX_ZB_FEC_EN =		BIT(9),
+	FLD_RF_TX_ZB_INTL_EN =		BIT(10),	// interleaving
+	FLD_RF_TX_1M2M_PN_EN =		BIT(11),
+	FLD_RF_TX_1M2M_FEC_EN =		BIT(12),
+	FLD_RF_TX_1M2M_INTL_EN =	BIT(13), 	// interleaving
+};
+#define reg_rf_tx_buf_sta		REG_ADDR32(0x41c)
+
+#define reg_rf_rx_sense_thr		REG_ADDR8(0x422)
+#define reg_rf_rx_auto			REG_ADDR8(0x426)
+enum{
+	FLD_RF_RX_IRR_GAIN =		BIT(0),
+	FLD_RF_RX_IRR_PHASE =		BIT(1),
+	FLD_RF_RX_DAC_I =			BIT(2),
+	FLD_RF_RX_DAC_Q =			BIT(3),
+	FLD_RF_RX_LNA_GAIN =		BIT(4),
+	FLD_RF_RX_MIX2_GAIN =		BIT(5),
+	FLD_RF_RX_PGA_GAIN =		BIT(6),
+	FLD_RF_RX_CAL_EN =			BIT(7),
+};
+#define reg_rf_rx_sync			REG_ADDR8(0x427)
+enum{
+	FLD_RF_FREQ_COMP_EN =		BIT(0),
+	FLD_RF_ADC_SYNC =			BIT(1),
+	FLD_RF_ADC_INP_SIGNED =		BIT(2),
+	FLD_RF_SWAP_ADC_IQ =		BIT(3),
+	FLD_RF_NOTCH_FREQ_SEL =		BIT(4),
+	FLD_RF_NOTCH_BAND_SEL = 	BIT(5),
+	FLD_RF_NOTCH_EN = 			BIT(6),
+	FLD_RF_DN_CONV_FREQ_SEL =	BIT(7),
+};
+
+#define reg_rf_rx_mode			REG_ADDR8(0x428)
+enum{
+	FLD_RF_RX_EN =				BIT(0),
+	FLD_RF_RX_MODE_1M =			BIT(1),
+	FLD_RF_RX_MODE_2M =			BIT(2),
+	FLD_RF_RX_LOW_IF =			BIT(3),
+	FLD_RF_RX_BYPASS_DCOC =		BIT(4),
+	FLD_RF_RX_MAN_FINE_TUNE = 	BIT(5),
+	FLD_RF_RX_SINGLE_CAL =		BIT(6),
+	FLD_RF_RX_LOW_PASS_FILTER =	BIT(7),
+};
+
+#define reg_rf_rx_pilot			REG_ADDR8(0x42b)
+enum{
+	FLD_RF_PILOT_LEN =			BIT_RNG(0,3),
+	FLD_RF_ZB_SFD_CHK =			BIT(4),
+	FLD_RF_1M_SFD_CHK =			BIT(5),
+	FLD_RF_2M_SFD_CHK = 		BIT(6),
+	FLD_RF_ZB_OR_AUTO = 		BIT(7),
+};
+
+#define reg_rf_rx_chn_dc		REG_ADDR32(0x42c)
+#define reg_rf_rx_q_chn_cal		REG_ADDR8(0x42f)
+enum{
+	FLD_RF_RX_DCQ_HIGH =		BIT_RNG(0,6),
+	FLD_RF_RX_DCQ_CAL_START =	BIT(7),
+};
+#define reg_rf_rx_pel			REG_ADDR16(0x434)
+#define reg_rf_rx_pel_gain		REG_ADDR32(0x434)
+#define reg_rf_rx_rssi_offset	REG_ADDR8(0x439)
+
+#define reg_rf_rx_hdx			REG_ADDR8(0x43b)
+enum{
+	FLD_RX_HEADER_LEN =			BIT_RNG(0,3),
+	FLD_RT_TICK_LO_SEL = 		BIT(4),
+	FLD_RT_TICK_HI_SEL = 		BIT(5),
+	FLD_RT_TICK_FRAME = 		BIT(6),
+	FLD_PKT_LEN_OUTP_EN = 		BIT(7),
+};
+
+#define reg_rf_rx_gctl			REG_ADDR8(0x43c)
+enum{
+	FLD_RX_GCTL_CIC_SAT_LO_EN =	BIT(0),
+	FLD_RX_GCTL_CIC_SAT_HI_EN = BIT(1),
+	FLD_RX_GCTL_AUTO_PWR =		BIT(2),
+	FLD_RX_GCTL_ADC_RST_VAL =	BIT(4),
+	FLD_RX_GCTL_ADC_RST_EN =	BIT(5),
+	FLD_RX_GCTL_PWR_CHG_DET_S =	BIT(6),
+	FLD_RX_GCTL_PWR_CHG_DET_N = BIT(7),
+};
+#define reg_rf_rx_peak			REG_ADDR8(0x43d)
+enum{
+	FLD_RX_PEAK_DET_SRC_EN =	BIT_RNG(0,2),
+	FLD_TX_PEAK_DET_EN =		BIT(3),
+	FLD_PEAK_DET_NUM =			BIT_RNG(4,5),
+	FLD_PEAK_MAX_CNT_PRD =		BIT_RNG(6,7),
+};
+
+#define reg_rf_rx_status		REG_ADDR8(0x443)
+enum{
+	FLD_RF_RX_STATE =			BIT_RNG(0,3),
+	FLD_RF_RX_STA_RSV = 		BIT_RNG(4,5),
+	FLD_RF_RX_INTR = 			BIT(6),
+	FLD_RF_TX_INTR =			BIT(7),
+};
+
+#define reg_rf_irq_mask			REG_ADDR16(0xf1c)
+#define reg_rf_irq_status		REG_ADDR16(0xf20)
+
+enum{
+	FLD_RF_IRQ_RX = 			BIT(0),
+	FLD_RF_IRQ_TX =				BIT(1),
+	FLD_RF_IRQ_RX_TIMEOUT =		BIT(2),
+	FLD_RF_IRQ_CRC =			BIT(4),
+	FLD_RF_IRQ_CMD_DONE  =		BIT(5),
+	FLD_RF_IRQ_FSM_TIMEOUT  =	BIT(6),
+	FLD_RF_IRQ_RETRY_HIT =		BIT(7),
+	FLD_RF_IRQ_FIRST_TIMEOUT =	BIT(10),
+	FLD_RF_IRQ_ALL =            0X1FFF,
+};
+
+// The value for FLD_RF_RX_STATE
+enum{
+	RF_RX_STA_IDLE = 0,
+	RF_RX_STA_SET_GAIN = 1,
+	RF_RX_STA_CIC_SETTLE = 2,
+	RF_RX_STA_LPF_SETTLE = 3,
+	RF_RX_STA_PE = 4,
+	RF_RX_STA_SYN_START = 5,
+	RF_RX_STA_GLOB_SYN = 6,
+	RF_RX_STA_GLOB_LOCK = 7,
+	RF_RX_STA_LOCAL_SYN = 8,
+	RF_RX_STA_LOCAL_LOCK = 9,
+	RF_RX_STA_ALIGN = 10,
+	RF_RX_STA_ADJUST = 11,
+	RF_RX_STA_DEMOD = 12,		// de modulation
+	RF_RX_STA_FOOTER = 13,
+};
+
+#define reg_rx_rnd_mode			REG_ADDR8(0x447)
+enum{
+	FLD_RX_RND_SRC =			BIT(0),
+	FLD_RX_RND_MANU_MODE =		BIT(1),
+	FLD_RX_RND_AUTO_RD =		BIT(2),
+	FLD_RX_RND_FREE_MODE =		BIT(3),
+	FLD_RX_RND_CLK_DIV =		BIT_RNG(4,7),
+};
+#define reg_rnd_number			REG_ADDR16(0x448)
+
+#define reg_bb_max_tick			REG_ADDR16(0x44c)
+#define reg_rf_rtt				REG_ADDR32(0x454)
+enum{
+	FLD_RTT_CAL =				BIT_RNG(0,7),
+	FLD_RTT_CYC1 =				BIT_RNG(8,15),
+	FLD_RTT_LOCK =				BIT_RNG(16,23),
+	FLD_RT_SD_DLY_40M =			BIT_RNG(24,27),
+	FLD_RT_SD_DLY_BYPASS = 		BIT(28),
+};
+
+#define reg_rf_chn_rssi			REG_ADDR8(0x458)
+
+#define reg_rf_rx_gain_agc(i)	REG_ADDR32(0x480+((i)<<2))
+
+#define reg_rf_rx_dci			REG_ADDR8(0x4cb)	//  different from the document, why
+#define reg_rf_rx_dcq			REG_ADDR8(0x4cf)	//  different from the document, why
+
+#define reg_pll_rx_coarse_tune	REG_ADDR16(0x4d0)
+#define reg_pll_rx_coarse_div	REG_ADDR8(0x4d2)
+#define reg_pll_rx_fine_tune	REG_ADDR16(0x4d4)
+#define reg_pll_rx_fine_div		REG_ADDR8(0x4d6)
+#define reg_pll_tx_coarse_tune	REG_ADDR16(0x4d8)
+#define reg_pll_tx_coarse_div	REG_ADDR8(0x4da)
+#define reg_pll_tx_fine_tune	REG_ADDR16(0x4dc)
+#define reg_pll_tx_fine_div		REG_ADDR8(0x4de)
+
+#define reg_pll_rx_frac			REG_ADDR32(0x4e0)
+#define reg_pll_tx_frac			REG_ADDR32(0x4e4)
+
+#define reg_pll_tx_ctrl			REG_ADDR8(0x4e8)
+#define reg_pll_ctrl16			REG_ADDR16(0x4e8)
+#define reg_pll_ctrl			REG_ADDR32(0x4e8)
+enum{
+	FLD_PLL_TX_CYC0 =			BIT(0),
+	FLD_PLL_TX_SOF =			BIT(1),
+	FLD_PLL_TX_CYC1 =			BIT(2),
+	FLD_PLL_TX_PRE_EN =			BIT(3),
+	FLD_PLL_TX_VCO_EN =			BIT(4),
+	FLD_PLL_TX_PWDN_DIV =		BIT(5),
+	FLD_PLL_TX_MOD_EN =			BIT(6),
+	FLD_PLL_TX_MOD_TRAN_EN =	BIT(7),
+	FLD_PLL_RX_CYC0 =			BIT(8),
+	FLD_PLL_RX_SOF = 			BIT(9),
+	FLD_PLL_RX_CYC1 =			BIT(10),
+	FLD_PLL_RX_PRES_EN = 		BIT(11),
+	FLD_PLL_RX_VCO_EN =			BIT(12),
+	FLD_PLL_RX_PWDN_DIV =		BIT(13),
+	FLD_PLL_RX_PEAK_EN =		BIT(14),
+	FLD_PLL_RX_TP_CYC = 		BIT(15),
+	FLD_PLL_SD_RSTB =			BIT(16),
+	FLD_PLL_SD_INTG_EN =		BIT(17),
+	FLD_PLL_CP_TRI = 			BIT(18),
+	FLD_PLL_PWDN_INTG1 = 		BIT(19),
+	FLD_PLL_PWDN_INTG2 =		BIT(20),
+	FLD_PLL_PWDN_INTG_DIV =		BIT(21),
+	FLD_PLL_PEAK_DET_EN =		BIT(22),
+	FLD_PLL_OPEN_LOOP_EN =		BIT(23),
+	FLD_PLL_RX_TICK_EN =		BIT(24),
+	FLD_PLL_TX_TICK_EN =		BIT(25),
+	FLD_PLL_RX_ALWAYS_ON =		BIT(26),
+	FLD_PLL_TX_ALWAYS_ON =		BIT(27),
+	FLD_PLL_MANUAL_MODE_EN =	BIT(28),
+	FLD_PLL_CAL_DONE_EN =		BIT(29),
+	FLD_PLL_LOCK_EN =			BIT(30),
+};
+#define reg_pll_rx_ctrl			REG_ADDR8(0x4e9)
+enum{
+	FLD_PLL_RX2_CYC0 =			BIT(0),
+	FLD_PLL_RX2_SOF = 			BIT(1),
+	FLD_PLL_RX2_CYC1 =			BIT(2),
+	FLD_PLL_RX2_PRES_EN = 		BIT(3),
+	FLD_PLL_RX2_VCO_EN =		BIT(4),
+	FLD_PLL_RX2_PD_DIV =		BIT(5),
+	FLD_PLL_RX2_PEAK_EN =		BIT(6),
+	FLD_PLL_RX2_TP_CYC = 		BIT(7),
+};
+
+#define reg_pll_ctrl_a			REG_ADDR8(0x4eb)
+enum{
+	FLD_PLL_A_RX_TICK_EN =		BIT(0),
+	FLD_PLL_A_TX_TICK_EN =		BIT(1),
+	FLD_PLL_A_RX_ALWAYS_ON =	BIT(2),
+	FLD_PLL_A_TX_ALWAYS_ON =	BIT(3),
+	FLD_PLL_A_MANUAL_MODE_EN =	BIT(4),
+	FLD_PLL_A_CAL_DONE_EN =		BIT(5),
+	FLD_PLL_A_LOCK_EN =			BIT(6),
+};
+// pll polarity
+#define reg_pll_pol_ctrl		REG_ADDR16(0x4ec)
+enum{
+	FLD_PLL_POL_TX_PRE_EN =		BIT(0),
+	FLD_PLL_POL_TX_VCO_EN =		BIT(1),
+	FLD_PLL_POL_TX_PD_DIV =		BIT(2),
+	FLD_PLL_POL_MOD_EN =		BIT(3),
+	FLD_PLL_POL_MOD_TRAN_EN =	BIT(4),
+	FLD_PLL_POL_RX_PRE_EN =		BIT(5),
+	FLD_PLL_POL_RX_VCO_EN =		BIT(6),
+	FLD_PLL_POL_RX_PD_DIV =		BIT(7),
+	FLD_PLL_POL_SD_RSTB =		BIT(8),
+	FLD_PLL_POL_SD_INTG_EN =	BIT(9),
+	FLD_PLL_POL_CP_TRI =		BIT(10),
+	FLD_PLL_POL_TX_SOF =		BIT(11),
+	FLD_PLL_POL_RX_SOF =		BIT(12),
+};
+
+#define reg_rf_rx_cap			REG_ADDR16(0x4f0)
+#define reg_rf_tx_cap			REG_ADDR16(0x4f0)
+
+/****************************************************
+ dma mac regs struct: begin  addr : 0x500
+ *****************************************************/
+#define reg_dma0_addr			REG_ADDR16(0x500)
+#define reg_dma0_ctrl			REG_ADDR16(0x502)
+#define reg_dma1_addr			REG_ADDR16(0x504)
+#define reg_dma1_ctrl			REG_ADDR16(0x506)
+#define reg_dma2_addr			REG_ADDR16(0x508)
+#define reg_dma2_ctrl			REG_ADDR16(0x50a)
+#define reg_dma3_addr			REG_ADDR16(0x50c)
+#define reg_dma3_ctrl			REG_ADDR16(0x50e)
+#define reg_dma4_addr			REG_ADDR16(0x510)
+#define reg_dma4_ctrl			REG_ADDR16(0x512)
+#define reg_dma5_addr			REG_ADDR16(0x514)
+#define reg_dma5_ctrl			REG_ADDR16(0x516)
+
+#define reg_dma_rx_rptr			REG_ADDR8(0x528)
+#define reg_dma_rx_wptr			REG_ADDR8(0x529)
+
+#define reg_dma_tx_rptr			REG_ADDR8(0x52a)
+#define reg_dma_tx_wptr			REG_ADDR8(0x52b)
+#define reg_dma_tx_fifo			REG_ADDR16(0x52c)
+enum{
+	FLD_DMA_BUF_SIZE =			BIT_RNG(0,7),
+	FLD_DMA_WR_MEM =			BIT(8),
+	FLD_DMA_PINGPONG_EN =		BIT(9),
+	FLD_DMA_FIFO_EN =			BIT(10),
+	FLD_DMA_AUTO_MODE =			BIT(11),
+	FLD_DMA_BYTE_MODE =			BIT(12),
+	FLD_DMA_FIFO8 	=			(BIT(15) | BIT(14) | FLD_DMA_WR_MEM | FLD_DMA_PINGPONG_EN),
+
+	FLD_DMA_RPTR_CLR =			BIT(4),
+	FLD_DMA_RPTR_NEXT =			BIT(5),
+	FLD_DMA_RPTR_SET =			BIT(6),
+};
+
+#define reg_dma_chn_en			REG_ADDR8(0x520)
+#define reg_dma_chn_irq_msk		REG_ADDR8(0x521)
+#define reg_dma_tx_rdy0			REG_ADDR8(0x524)
+#define reg_dma_tx_rdy1			REG_ADDR8(0x525)
+#define reg_dma_rx_rdy0			REG_ADDR8(0x526)
+#define reg_dma_irq_src			reg_dma_rx_rdy0
+#define reg_dma_rx_rdy1			REG_ADDR8(0x527)
+enum{
+	FLD_DMA_UART_RX =			BIT(0),		//  not sure ???
+	FLD_DMA_UART_TX =			BIT(1),
+	FLD_DMA_RF_RX =				BIT(2),		//  not sure ???
+	FLD_DMA_RF_TX =				BIT(3),
+	FLD_DMA_CHN_UART_RX =		BIT(0),
+	FLD_DMA_CHN_UART_TX =		BIT(1),
+	FLD_DMA_CHN_RF_RX =			BIT(2),
+	FLD_DMA_CHN_RF_TX =			BIT(3),
+};
+
+
+//  The default channel assignment
+#define reg_dma_uart_rx_addr	reg_dma0_addr
+#define reg_dma_uart_rx_ctrl	reg_dma0_ctrl
+#define reg_dma_uart_tx_addr	reg_dma1_addr
+#define reg_dma_uart_tx_ctrl	reg_dma1_ctrl
+
+#define reg_dma_rf_rx_addr		reg_dma2_addr
+#define reg_dma_rf_rx_ctrl		reg_dma2_ctrl
+#define reg_dma_rf_tx_addr		reg_dma3_addr
+#define reg_dma_rf_tx_ctrl		reg_dma3_ctrl
+
+#define reg_aes_ctrl            REG_ADDR8(0x540)
+#define reg_aes_data            REG_ADDR32(0x548)
+#define reg_aes_key(key_id)     reg_aes_key##key_id
+#define reg_aes_key0            REG_ADDR8(0x550)
+#define reg_aes_key1            REG_ADDR8(0x551)
+#define reg_aes_key2            REG_ADDR8(0x552)
+#define reg_aes_key3            REG_ADDR8(0x553)
+#define reg_aes_key4            REG_ADDR8(0x554)
+#define reg_aes_key5            REG_ADDR8(0x555)
+#define reg_aes_key6            REG_ADDR8(0x556)
+#define reg_aes_key7            REG_ADDR8(0x557)
+#define reg_aes_key8            REG_ADDR8(0x558)
+#define reg_aes_key9            REG_ADDR8(0x559)
+#define reg_aes_key10            REG_ADDR8(0x55a)
+#define reg_aes_key11            REG_ADDR8(0x55b)
+#define reg_aes_key12            REG_ADDR8(0x55c)
+#define reg_aes_key13            REG_ADDR8(0x55d)
+#define reg_aes_key14            REG_ADDR8(0x55e)
+#define reg_aes_key15            REG_ADDR8(0x55f)
+/****************************************************
+ audio regs struct: begin  addr : 0x560
+ *****************************************************/
+#define reg_aud_ctrl			REG_ADDR8(0x560)
+enum{
+	FLD_AUD_ENABLE	 =			BIT(0),
+	FLD_AUD_SDM_PLAY_EN = 		BIT(1),
+	FLD_AUD_SHAPPING_EN =		BIT(2),
+};
+
+#define reg_aud_vol_ctrl		REG_ADDR8(0x561)
+#define reg_aud_pn1				REG_ADDR8(0x562)
+#define reg_aud_pn2				REG_ADDR8(0x563)
+
+#define reg_ascl_step			REG_ADDR16(0x564)
+#define reg_aud_base_adr		REG_ADDR16(0x568)
+#define reg_aud_buff_size		REG_ADDR8(0x56a)
+#define reg_aud_rptr			REG_ADDR16(0x56c)
+#define reg_sdm_ptr				reg_aud_rptr
+
+#define	AUD_SDM_STEP(i,o)		(0x8000*(i/100)/(o/100))
+
+static inline unsigned short get_sdm_rd_ptr (void) {
+	return reg_aud_rptr << 0;
+}
+
+enum {
+	FLD_AUD_PN_1BIT		= 0x104050,
+	FLD_AUD_PN_4BITS	= 0x0c404c,
+};
+
+#define reg_aud_const			REG_ADDR32(0x56)
+
+
+#define reg_aud_filter			REG_ADDR16(0xb80)
+enum {
+	FLD_AUD_FLT_IBFT	=	BIT(0),
+	FLD_AUD_FLT_AUTO	=	BIT(1),
+	FLD_AUD_FLT_FIFO0	=	BIT(2),
+	FLD_AUD_FLT_FIFO1	=	BIT(3),
+	FLD_AUD_FLT_BYPASS0	=	BIT(5),
+	FLD_AUD_FLT_BYPASS1	=	BIT(6),
+	FLD_AUD_FLT_BYPASS		=   0x60,
+	FLD_AUD_FLT_I0			=   0x47,
+	FLD_AUD_FLT_I1			=   0x2b,
+	FLD_AUD_FLT_I0I1		=   0x0f,
+	FLD_AUD_FLT_CFGHIGH		= 	0x1000,
+};
+#define reg_aud_sram			REG_ADDR8(0xb81)
+
+
+
+/****************************************************
+ gpio regs struct: begin  0x580
+ *****************************************************/
+
+#define reg_gpio_pa_in			REG_ADDR8(0x580)
+#define reg_gpio_pa_ie			REG_ADDR8(0x581)
+#define reg_gpio_pa_oen			REG_ADDR8(0x582)
+#define reg_gpio_pa_out			REG_ADDR8(0x583)
+#define reg_gpio_pa_pol			REG_ADDR8(0x584)
+#define reg_gpio_pa_ds			REG_ADDR8(0x585)
+#define reg_gpio_pa_gpio		REG_ADDR8(0x586)
+#define reg_gpio_pa_irq_en		REG_ADDR8(0x587)
+
+#define reg_gpio_pb_in			REG_ADDR8(0x588)
+#define reg_gpio_pb_ie			REG_ADDR8(0x589)
+#define reg_gpio_pb_oen			REG_ADDR8(0x58a)
+#define reg_gpio_pb_out			REG_ADDR8(0x58b)
+#define reg_gpio_pb_pol			REG_ADDR8(0x58c)
+#define reg_gpio_pb_ds			REG_ADDR8(0x58d)
+#define reg_gpio_pb_gpio		REG_ADDR8(0x58e)
+#define reg_gpio_pb_irq_en		REG_ADDR8(0x58f)
+
+#define reg_gpio_pc_in			REG_ADDR8(0x590)
+#define reg_gpio_pc_ie			REG_ADDR8(0x591)
+#define reg_gpio_pc_oen			REG_ADDR8(0x592)
+#define reg_gpio_pc_out			REG_ADDR8(0x593)
+#define reg_gpio_pc_pol			REG_ADDR8(0x594)
+#define reg_gpio_pc_ds			REG_ADDR8(0x595)
+#define reg_gpio_pc_gpio		REG_ADDR8(0x596)
+#define reg_gpio_pc_irq_en		REG_ADDR8(0x597)
+
+#define reg_gpio_pd_in			REG_ADDR8(0x598)
+#define reg_gpio_pd_ie			REG_ADDR8(0x599)
+#define reg_gpio_pd_oen			REG_ADDR8(0x59a)
+#define reg_gpio_pd_out			REG_ADDR8(0x59b)
+#define reg_gpio_pd_pol			REG_ADDR8(0x59c)
+#define reg_gpio_pd_ds			REG_ADDR8(0x59d)
+#define reg_gpio_pd_gpio		REG_ADDR8(0x59e)
+#define reg_gpio_pd_irq_en		REG_ADDR8(0x59f)
+
+#define reg_gpio_pe_in			REG_ADDR8(0x5a0)
+#define reg_gpio_pe_ie			REG_ADDR8(0x5a1)
+#define reg_gpio_pe_oen			REG_ADDR8(0x5a2)
+#define reg_gpio_pe_out			REG_ADDR8(0x5a3)
+#define reg_gpio_pe_pol			REG_ADDR8(0x5a4)
+#define reg_gpio_pe_ds			REG_ADDR8(0x5a5)
+#define reg_gpio_pe_gpio		REG_ADDR8(0x5a6)
+#define reg_gpio_pe_irq_en		REG_ADDR8(0x5a7)
+
+#define reg_gpio_pf_in			REG_ADDR8(0x5a8)
+#define reg_gpio_pf_ie			REG_ADDR8(0x5a9)
+#define reg_gpio_pf_oen			REG_ADDR8(0x5aa)
+#define reg_gpio_pf_out			REG_ADDR8(0x5ab)
+#define reg_gpio_pf_pol			REG_ADDR8(0x5ac)
+#define reg_gpio_pf_ds			REG_ADDR8(0x5ad)
+#define reg_gpio_pf_gpio		REG_ADDR8(0x5ae)
+#define reg_gpio_pf_irq_en		REG_ADDR8(0x5af)
+
+#define reg_gpio_pa_setting1	REG_ADDR32(0x580)
+#define reg_gpio_pa_setting2	REG_ADDR32(0x584)
+#define reg_gpio_pb_setting1	REG_ADDR32(0x588)
+#define reg_gpio_pb_setting2	REG_ADDR32(0x58c)
+#define reg_gpio_pc_setting1	REG_ADDR32(0x590)
+#define reg_gpio_pc_setting2	REG_ADDR32(0x594)
+#define reg_gpio_pd_setting1	REG_ADDR32(0x598)
+#define reg_gpio_pd_setting2	REG_ADDR32(0x59c)
+#define reg_gpio_pe_setting1	REG_ADDR32(0x5a0)
+#define reg_gpio_pe_setting2	REG_ADDR32(0x5a4)
+#define reg_gpio_pf_setting1	REG_ADDR32(0x5a8)
+#define reg_gpio_pf_setting2	REG_ADDR32(0x5ac)
+
+#define reg_gpio_ctrl			REG_ADDR32(0x5a4)
+enum{
+	GPIO_WAKEUP_EN = BIT(0),
+	GPIO_IRQ_EN	   = BIT(1),
+	I2S_SLAVE_EN   = BIT(2),
+	RMII_REFCLK_OUTPUT_EN = BIT(3),
+};
+
+#define reg_gpio_config_func REG_ADDR32(0x5b0)
+#define reg_gpio_config_func0 REG_ADDR8(0x5b0)
+enum{
+	FLD_I2S_REFCLK_DMIC	=	BIT(0),
+	FLD_I2S_BCK_BB_PEAK	=	BIT(1),
+	FLD_I2S_BCK_PWM1	=	BIT(2),
+	FLD_I2S_LCK_UART_RX	=	BIT(3),
+	FLD_I2S_LCK_PWM2	=	BIT(4),
+	FLD_I2S_DO_UART_TX	=	BIT(5),
+	FLD_I2S_DO_PWM3		=	BIT(6),
+	FLD_I2S_DI_DMIC		=	BIT(7),
+};
+#define reg_gpio_config_func1 REG_ADDR8(0x5b1)
+enum{
+	FLD_RP_TX_CYC1		=	BIT(0),
+	FLD_RN_BB_RSSI		=	BIT(1),
+	FLD_GP6_BB_SS2		=	BIT(2),
+	FLD_GP7_RXADC_CLK	=	BIT(3),
+	FLD_RP_T0			=	BIT(4),
+	FLD_RN_T1			=	BIT(5),
+	FLD_GP6_TE			=	BIT(6),
+	FLD_GP7_MDC			=	BIT(7),
+};
+#define reg_gpio_config_func2 REG_ADDR8(0x5b2)
+enum{
+	FLD_GP8_RXADC_DAT	=	BIT(0),
+	FLD_GP9_BB_SS1		=	BIT(1),
+	FLD_GP10_BBSS0		=	BIT(2),
+	FLD_SWS_BB_GAIN4	=	BIT(3),
+	FLD_DMIC_CK_BBCLK_BB	=	BIT(4),
+	FLD_DMIC_CK_REFCLK	=	BIT(5),
+	FLD_UART_TX			=	BIT(6),
+	FLD_UART_RX			=	BIT(7),
+};
+#define reg_gpio_config_func3 REG_ADDR8(0x5b3)
+enum{
+	FLD_CN_BB_GAIN3		=	BIT(0),
+	FLD_CK_BB_GAIN2		=	BIT(1),
+	FLD_DO_BB_GAIN1		=	BIT(2),
+	FLD_DI_BB_GAIN0		=	BIT(3),
+//	FLD_I2S_LCK_PWM2	=	BIT(4),//NOT SURE
+	FLD_I2S_DO_RXDV		=	BIT(5),
+	FLD_I2S_DI_RXER		=	BIT(6),
+	FLD_I2S_DI_TXSD		=	BIT(7),
+};
+#define reg_gpio_config_func4 REG_ADDR8(0x5b4)
+enum{
+	FLD_DMIC_CK_RX_CLK	=	BIT(0),
+	FLD_I2S_DI_RX_DAT	=	BIT(1),
+};
+
+#define reg_gpio_wakeup_irq		REG_ADDR8(0x5b5)
+enum{
+	FLD_GPIO_WAKEUP_EN		=	BIT(2),
+	FLD_GPIO_INTERRUPT_EN	=	BIT(3),
+};
+/****************************************************
+ timer regs struct: begin  0x620
+ *****************************************************/
+#define reg_tmr_ctrl			REG_ADDR32(0x620)
+#define reg_tmr_ctrl16			REG_ADDR16(0x620)
+#define reg_tmr_ctrl8			REG_ADDR8(0x620)
+enum{
+	FLD_TMR0_EN =				BIT(0),
+	FLD_TMR0_MODE =				BIT_RNG(1,2),
+	FLD_TMR1_EN = 				BIT(3),
+	FLD_TMR1_MODE =				BIT_RNG(4,5),
+	FLD_TMR2_EN =				BIT(6),
+	FLD_TMR2_MODE = 			BIT_RNG(7,8),
+	FLD_TMR_WD_CAPT = 			BIT_RNG(9,22),
+	FLD_TMR_WD_EN =				BIT(23),
+	FLD_TMR0_STA =				BIT(24),
+	FLD_TMR1_STA =				BIT(25),
+	FLD_TMR2_STA =				BIT(26),
+	FLD_CLR_WD =				BIT(27),
+};
+#define WATCHDOG_TIMEOUT_COEFF	18		//  check register definition, 0x622
+
+#define reg_tmr_sta				REG_ADDR8(0x623)
+enum{
+	FLD_TMR_STA_TMR0 =			BIT(0),
+	FLD_TMR_STA_TMR1 =			BIT(1),
+	FLD_TMR_STA_TMR2 =			BIT(2),
+	FLD_TMR_STA_WD =			BIT(3),
+};
+
+#define reg_tmr0_capt			REG_ADDR32(0x624)
+#define reg_tmr1_capt			REG_ADDR32(0x628)
+#define reg_tmr2_capt			REG_ADDR32(0x62c)
+#define reg_tmr_capt(i)			REG_ADDR32(0x624 + ((i) << 2))
+#define reg_tmr0_tick			REG_ADDR32(0x630)
+#define reg_tmr1_tick			REG_ADDR32(0x634)
+#define reg_tmr2_tick			REG_ADDR32(0x638)
+#define reg_tmr_tick(i)			REG_ADDR32(0x630 + ((i) << 2))
+
+/****************************************************
+ interrupt regs struct: begin  0x640
+ *****************************************************/
+#define reg_irq_mask			REG_ADDR32(0x640)
+#define reg_irq_pri				REG_ADDR32(0x644)
+#define reg_irq_src				REG_ADDR32(0x648)
+#define reg_irq_src3			REG_ADDR8(0x64a)
+enum{
+	FLD_IRQ_TMR0_EN =			BIT(0),
+	FLD_IRQ_TMR1_EN =			BIT(1),
+	FLD_IRQ_TMR2_EN =			BIT(2),
+	FLD_IRQ_USB_PWDN_EN =		BIT(3),
+	FLD_IRQ_DMA_EN =			BIT(4),
+	FLD_IRQ_DAM_FIFO_EN =		BIT(5),
+	FLD_IRQ_UART_EN 	=		BIT(6),
+	FLD_IRQ_HOST_CMD_EN =		BIT(7),
+
+	FLD_IRQ_EP0_SETUP_EN =		BIT(8),
+	FLD_IRQ_EP0_DAT_EN =		BIT(9),
+	FLD_IRQ_EP0_STA_EN =		BIT(10),
+	FLD_IRQ_SET_INTF_EN =		BIT(11),
+	FLD_IRQ_EP_DATA_EN =		BIT(12),
+	FLD_IRQ_IRQ4_EN =			BIT(12),
+	FLD_IRQ_ZB_RT_EN =			BIT(13),
+	FLD_IRQ_SW_EN =				BIT(14),
+	FLD_IRQ_AN_EN =				BIT(15),
+
+	FLD_IRQ_USB_250US_EN =		BIT(16),
+	FLD_IRQ_USB_RST_EN =		BIT(17),
+	FLD_IRQ_GPIO_EN =			BIT(18),
+	FLD_IRQ_PM_EN =				BIT(19),
+	FLD_IRQ_SYSTEM_TIMER =		BIT(20),
+	FLD_IRQ_GPIO_RISC0_EN =		BIT(21),
+	FLD_IRQ_GPIO_RISC1_EN =		BIT(22),
+	FLD_IRQ_GPIO_RISC2_EN = 	BIT(23),
+
+	FLD_IRQ_EN =				BIT_RNG(24,31),
+};
+#define reg_irq_en				REG_ADDR8(0x643)
+
+#define reg_system_tick			REG_ADDR32(0x740)
+#define reg_system_tick_irq		REG_ADDR32(0x744)
+#define reg_system_wakeup_tick	REG_ADDR32(0x748)
+#define reg_system_tick_mode	REG_ADDR8(0x74c)
+#define reg_system_tick_ctrl	REG_ADDR8(0x74f)
+
+enum {
+	FLD_SYSTEM_TICK_START	=		BIT(0),
+	FLD_SYSTEM_TICK_STOP	=		BIT(1),
+	FLD_SYSTEM_TICK_RUNNING	=		BIT(1),
+
+	FLD_SYSTEM_TICK_IRQ_EN  = 		BIT(1),
+};
+
+/****************************************************
+ PWM regs define:  begin  0x780
+ *****************************************************/
+#define reg_pwm_enable			REG_ADDR8(0x780)
+#define reg_pwm_clk				REG_ADDR8(0x781)
+#define reg_pwm_mode			REG_ADDR8(0x782)
+#define reg_pwm_invert			REG_ADDR8(0x783)
+#define reg_pwm_n_invert		REG_ADDR8(0x784)
+#define reg_pwm_pol				REG_ADDR8(0x785)
+
+#define reg_pwm_phase(i)		REG_ADDR16(0x788 + (i << 1))
+#define reg_pwm_cycle(i)		REG_ADDR32(0x794 + (i << 2))
+#define reg_pwm_cmp(i)			REG_ADDR16(0x794 + (i << 2))
+enum{
+	FLD_PWM_CMP  = 				BIT_RNG(0,15),
+	FLD_PWM_MAX  = 				BIT_RNG(16,31),
+};
+
+#define reg_pwm_pulse_num(i)	REG_ADDR16(0x7ac + (i << 1))	// i == 0, 1
+#define reg_pwm_irq_mask		REG_ADDR8(0x7b0)
+#define reg_pwm_irq_sta			REG_ADDR8(0x7b1)
+
+#define reg_pwm_pnum0			REG_ADDR16(0x80c)
+#define reg_pwm_pnum1			REG_ADDR16(0x80e)
+
+//////////////////////////////////////////////////////////////
+// DFIFO
+//////////////////////////////////////////////////////////////
+
+#define reg_fifo0_data			REG_ADDR32(0x800)
+#define reg_fifo1_data			REG_ADDR32(0x900)
+#define reg_fifo2_data			REG_ADDR32(0xa00)
+
+/****************************************************
+ dfifo regs define:  begin  0xb00
+ *****************************************************/
+#define reg_dfifo0_buf			REG_ADDR32(0xb00)
+#define reg_dfifo1_buf			REG_ADDR32(0xb04)
+#define reg_dfifo2_buf			REG_ADDR32(0xb08)
+enum{
+	FLD_DFIFO_BUF_ADDR =		BIT_RNG(0,15),
+	FLD_DFIFO_BUF_SIZE =		BIT_RNG(16,23),
+};
+
+#define reg_dfifo0_addr			REG_ADDR16(0xb00)
+#define reg_dfifo0_size			REG_ADDR8(0xb02)
+
+#define reg_dfifo_ana_in		REG_ADDR8(0xb03)
+enum{
+	FLD_DFIFO_MIC0_RISING_EDGE = BIT(0),
+	FLD_DFIFO_MIC_ADC_IN 	= BIT(1),
+
+	FLD_DFIFO_AUD_INPUT_MONO =	BIT(4) | BIT(5),
+//	FLD_DFIFO_AUD_INPUT_BYPASS = BIT(5),
+};
+enum{
+	REG_AUD_INPUT_SEL_USB = 0,
+	REG_AUD_INPUT_SEL_I2S = 1,
+	REG_AUD_INPUT_SEL_ADC = 2,
+	REG_AUD_INPUT_SEL_DMIC = 3,
+};
+
+#define reg_dfifo_scale			REG_ADDR8(0xb04)
+enum{
+	FLD_DFIFO2_DEC_CIC =		BIT_RNG(0,3),
+	FLD_DFIFO0_DEC_SCALE =		BIT_RNG(4,7),
+};
+
+#define reg_aud_hpf_alc			REG_ADDR8(0xb05)
+enum {
+	FLD_AUD_IN_HPF_SFT	=	BIT_RNG(0,3),
+	FLD_AUD_IN_HPF_BYPASS	=	BIT(4),
+	FLD_AUD_IN_ALC_BYPASS	=	BIT(5),
+	FLD_AUD_IN_USB_SET		=  0x3b,
+};
+
+#define reg_aud_alc_vol			REG_ADDR8(0xb06)
+
+#define reg_audio_wr_ptr		REG_ADDR16(0xb10)
+//#define reg_mic_ptr				reg_audio_wr_ptr
+
+static inline unsigned short get_mic_wr_ptr (void) {
+	return reg_audio_wr_ptr << 0;
+}
+
+
+/////////////////////////////////////////////////////////////////////////////
+#define rega_xtal_ctrl			0x01
+enum {
+	FLDA_XTAL_CS =				BIT_RNG(0,4),
+	FLDA_LDO_TRIM_3V = 			BIT_RNG(5,6),
+	FLDA_XTAL_COM_REF = 		BIT(7),
+};
+
+enum{
+	ANALOG_LDO_VOL_1P6 = 0, 	// 1.6v
+	ANALOG_LDO_VOL_1P8 = 2,		// 1.8v
+};
+
+#define rega_vol_ldo_ctrl		0x02
+enum {
+	FLDA_VOL_LDO_RESV = 		BIT_RNG(0,2),
+	FLDA_VOL_LDO_OUTPUT = 		BIT_RNG(3,4),
+	FLDA_VOL_BAND_GAP = 		BIT_RNG(5,7),
+};
+
+#define rega_pwdn_setting1		0x05
+enum {
+	FLDA_32K_RC_PWDN = 			BIT(0),
+	FLDA_32K_XTAL_PWDN =		BIT(1),
+	FLDA_32M_RC_PWDN = 			BIT(2),
+	FLDA_32M_XTAL_PWDN = 		BIT(3),
+	FLDA_LDO_PWDN = 			BIT(4),
+	FLDA_BGIREF_3V_PWDN = 		BIT(5),
+	FLDA_COMP_PWDN = 			BIT(6),
+	FLDA_TEMPSEN_PWDN = 		BIT(7),
+};
+
+#define rega_pwdn_ldo			0x06
+enum {
+	FLDA_RX_LO_LDO_PWDN = 		BIT(0),
+	FLDA_BG_I_EXT_PWDN =		BIT(1),
+	FLDA_RX_ANA_LDO_PWDN = 		BIT(2),
+	FLDA_RX_RF_LDO_PWDN = 		BIT(3),
+	FLDA_PLL_BG_PWDN = 			BIT(4),
+	FLDA_PLL_DS_LDO_PWDN = 		BIT(5),
+	FLDA_PLL_LDO_PWDN = 		BIT(6),
+	FLDA_PLL_LDO2_PWDN = 		BIT(7),
+};
+
+#define rega_ldo_setting1		0x07
+enum {
+	FLDA_RX_ANA_LDO_O_CTRL = 	BIT_RNG(0,1),
+	FLDA_RX_RF_LDO_O_CTRL = 	BIT_RNG(2,3),
+	FLDA_PLL_LDO_B2 = 			BIT_RNG(4,5),
+	FLDA_PLL_LDO_DS = 			BIT_RNG(6,7),
+};
+
+#define rega_ldo_setting2		0x0c
+enum {
+	FLDA_RX_LOLDO_OUTCTRL = 	BIT_RNG(0,1),
+	FLDA_LDO_ANA_LDOTRIM = 		BIT(2),
+	FLDA_XTAL_LDO_TRIM = 		BIT(3),
+	FLDA_PULLDN_LOLDO =			BIT(4),
+	FLDA_PULLDN_DIGLDO = 		BIT(5),	// digit  LDO
+	FLDA_LDO_SETTING2_RSV =		BIT_RNG(6,7),
+};
+
+#define rega_32k_tm_thre0		0x10
+#define rega_32k_tm_thre1		0x11
+#define rega_32k_tm_thre2		0x12
+#define rega_32k_tm_thre3		0x13
+enum {
+	FLDA_32K_THR3_H = 			BIT_RNG(0,1),		// conflict with rega_32k_tm_val3 in document !!!
+	FLDA_32K_CONTINUE_MODE =	BIT(2),				// 0: one shot,  1: continuing
+	FLDA_32K_TIMER_EN =			BIT(3),
+	FLDA_DELAY_AFTER_WAKEUP =	BIT_RNG(4,7),
+};
+#define rega_delay_after_wakeup	0x14
+
+#define rega_wakeup_pin_l		0x15
+#define rega_wakeup_pin_h		0x16
+#define rega_pm_ctrl			0x17
+enum {
+	FLDA_PM_WAKEUP_FROM_DIG = 	BIT(0),				// voltage
+	FLDA_PM_WAKEUP_32K_SEL = 	BIT(1),				// conflict with the document !!!
+	FLDA_PM_RESV0 = 			BIT_RNG(2,3),
+	FLDA_PM_WAKEUP_POL = 		BIT(4),
+	FLDA_PM_RESV1 =				BIT(5),
+	FLDA_PM_PWDN_LDO = 			BIT(6),
+	FLDA_PM_PWDN_EN = 			BIT(7),
+};
+
+#define rega_pwdn_setting2		0x18
+enum {
+	FLDA_PWDN_OSC_32K_EN = 		BIT(0),
+#if(MCU_CORE_TYPE == MCU_CORE_5320)
+	FLDA_PWDN_PAD_32K_EN =		BIT(1),
+#else
+	FLDA_RESET_32K_TIMER =		BIT(1),
+#endif
+	FLDA_PWDN_TX = 				BIT(2),
+	FLDA_PWDN_RX = 				BIT(3),
+	FLDA_PWDN_SAR_ADC = 		BIT(4),
+	FLDA_PWDN_LOW_LEAK_LDO = 	BIT(5),
+	FLDA_PWDN_REG456_EN = 		BIT(6),
+	FLDA_PWDN_ISO_EN = 			BIT(7),
+};
+
+#define rega_32k_tm_val0		0x20
+#define rega_32k_tm_val1		0x21
+#define rega_32k_tm_val2		0x22
+#define rega_32k_tm_val3		0x23
+enum{
+	FLDA_32K_CNT_CONTINUOUS = BIT(3),
+	FLDA_32K_RST_TIMER = BIT(4),
+	FLDA_32K_TRIGGER_TIMER = BIT(7),
+};
+
+enum{
+	FLDA_WKUP_POL_PAD0 = BIT(0),
+	FLDA_WKUP_POL_PAD1 = BIT(1),
+	FLDA_WKUP_POL_PAD2 = BIT(2),
+	FLDA_WKUP_POL_PAD3 = BIT(3),
+	FLDA_WKUP_POL_PAD4 = BIT(4),
+	FLDA_WKUP_POL_PAD5 = BIT(5),
+};
+
+// from 0x2c, 0x2d, 0x2e, 0x2f, 0x30, fro customer use
+#define rega_pkt_seq_no			0x2d
+#define rega_deepsleep_rf_chn	0x2e
+//#define rega_deepsleep_flag		0x2f
+
+#define rega_xtal_csel			0x81
+enum {
+	FLDA_XTAL_FREQ_OFF = 		BIT_RNG(0, 4),
+	FLDA_XTAL_PWDN = 			BIT(5),
+	FLDA_XTAL_VOLT = 			BIT_RNG(6,7),
+};
+
+#define rega_bp_pll				0x84
+enum {
+	FLDA_BP_PLL_CP_PWDN = 		BIT(0),
+	FLDA_BP_PLL_3ST_VCO_PWDN = 	BIT(1),
+	FLDA_BP_PLL_4ST_VCO_PWDN = 	BIT(2),
+	FLDA_BP_PLL_VCO_SEL = 		BIT(3),
+	FLDA_BP_PLL_R_DIV = 		BIT_RNG(6,7),
+};
+
+#define rega_aud_ctrl			0x86
+enum {
+	FLDA_AUD_PWDN_LEFT = 		BIT(0),
+	FLDA_AUD_PWDN_RIGHT = 		BIT(1),
+	FLDA_AUD_MUTE_RIGHT = 		BIT(2),
+	FLDA_AUD_MUTE_LEFT = 		BIT(3),
+	FLDA_AUD_PRE_GAIN_RIGHT = 	BIT_RNG(4,5),
+	FLDA_AUD_PRE_GAIN_LEFT = 	BIT_RNG(6,7),
+};
+
+#define rega_aud_ctrl2			0x87
+enum {
+	FLDA_AUD_PST_GAIN_RIGHT = 	BIT_RNG(0,3),
+	FLDA_AUD_PST_GAIN_LEFT = 	BIT_RNG(4,7),
+};
+
+#define rega_dcdc_ctrl			0x88
+enum {
+	FLDA_DCDC_RESV = 			BIT(0),
+	FLDA_RNS_PWDN = 			BIT(1),
+	FLDA_DCDC_RESETB = 			BIT(2),
+	FLDA_DCDC_6P75_PWDN = 		BIT(3),
+	FLDA_DCDC_IN_2P8_PS = 		BIT(4),
+	FLDA_DCDC_OUT_2P8_SEL = 	BIT(5),
+	FLDA_DCDC_OUT_6P6_SEL = 	BIT(6),
+	FLDA_DCDC_2P8_PWDN = 		BIT(7),
+};
+
+#define rega_dig_ldo_sel_atb	0x89
+enum {
+	FLDA_LDO_SEL_ATB = 			BIT_RNG(0,2),
+	FLDA_PWDN_CLK_BB = 			BIT(3),
+	FLDA_PWDN_CLK_RF = 			BIT(4),
+	FLDA_PWDN_BUF_RCCAL = 		BIT(5),
+	FLDA_PWDN_BUF_DIG = 		BIT(6),
+};
+#define rega_adc_setting1		0x8a
+#define rega_adc_setting2		0x8b
+enum{
+	FLDA_RX_ADC_COMPLEX_EN = 	BIT(0),
+	FLDA_RX_ADC_CTUNE = 		BIT_RNG(1,4),
+	FLDA_RX_ADC_DLY_CTRL =		BIT_RNG(5,6),
+	FLDA_RX_ADC_PWDN = 			BIT(7),
+};
+
+#define rega_rx_lna				0x91
+enum{
+	FLDA_RX_LNA_OUT_TUNE = 		BIT_RNG(0,2),
+	FLDA_RX_LNA_BIAS =			BIT_RNG(3,5),
+	FLDA_RX_LNA_ON = 			BIT(6),
+	FLDA_PA_TX_EXT_C1_EN = 		BIT(7),
+};
+
+#define rega_rx_pga				0x94
+enum{
+	FLDA_RX_PGA_IQ_SWAP_EN = 	BIT(0),
+	FLDA_RX_PGA_BW_TUNE = 		BIT(1),
+	FLDA_RX_PGA_CAP_CTRL = 		BIT_RNG(2,5),
+	FLDA_RX_PGA_COMP_EN = 		BIT(6),
+	FLDA_RX_PGA_PWDN = 			BIT(7),
+};
+#define rega_rx_test			0x99
+enum{
+	FLDA_RF_PEAK_DET_DLY1_EN = 	BIT(0),
+	FLDA_RF_PEAK_DET_DLY2_EN =	BIT(1),
+	FLDA_RF_PEAK_DET_DLY3_EN = 	BIT(2),
+	FLDA_TEST_PGA_OUT_EN = 		BIT(3),
+	FLDA_TEST_PGA_IN_EN = 		BIT(4),
+	FLDA_TEST_IQ_MIXER_EN = 	BIT(5),
+	FLDA_RF_PEAK_DET1_EN = 		BIT(6),
+	FLDA_RF_PEAK_DET2_EN = 		BIT(7),
+};
+
+#define rega_tx_pa_ctrl			0x9e
+enum{
+	FLDA_PA_TX_BIAS = 			BIT_RNG(0,4),
+	FLDA_PA_TX_UNIT = 			BIT_RNG(3,5),
+};
+#define rega_tx_pa_ctrl2		0x9f
+
+#define rega_pfd				0xa5
+enum{
+	FLDA_PFD_MUX_L = 			BIT_RNG(0,2),
+	FLDA_PFD_NP_INTG = 			BIT(3),
+	FLDA_INTG_PFD_S0 = 			BIT(4),
+	FLDA_INTG_PFD_S1 = 			BIT(5),
+	FLDA_REFBUF_PWDN = 			BIT(6),
+	FLDA_REG_DC_MOD0 = 			BIT(7),
+};
+
+#define rega_intg_n0			0xa0
+enum{
+	FLDA_DPLL_EN = 				BIT(0),
+	FLDA_IDIV2_UP_RX = 			BIT(1),
+	FLDA_IDIV2_UP_TX =			BIT(2),
+	FLDA_RX_INTG_N0 = 			BIT_RNG(3,7),
+};
+
+#define rega_intg_n1			0xa1
+enum{
+	FLDA_RX_INTG_N1 = 			BIT_RNG(0,4),
+	FLDA_RX_IB1 = 				BIT_RNG(5,6),
+	FLDA_LPF_PWDN = 			BIT(7),
+};
+
+#define rega_intg_rdiv			0xa2
+enum{
+	FLDA_INTG_RDIV = 			BIT_RNG(0,5),
+	FLDA_MASH2_EN = 			BIT(6),
+	FLDA_NDIV_EN = 				BIT(7),
+};
+
+#define rega_reg_dc_mod1		0xa6
+#define rega_reg_dc_mod2		0xa7
+#define rega_vco_cal_comp		0xa8
+enum{
+	FLDA_RF_TEST_PWDN = 		BIT(0),
+	FLDA_RX_IB = 				BIT_RNG(1,2),
+	FLDA_VCO_CAL_COMP = 		BIT_RNG(3,7),
+};
+
+#define rega_vco_setting		0xa9
+enum{
+	FLDA_TX_IB = 				BIT_RNG(0,1),
+	FLDA_VCO_RXI = 				BIT_RNG(2,4),
+	FLDA_VCO_TXI = 				BIT_RNG(5,7),
+};
+
+#define rega_intg_rxcap			0xaa
+enum{
+	FLDA_PWDN_INTG_PLL = 		BIT(0),
+	FLDA_INTG_RXCAP = 			BIT_RNG(1,7),
+};
+
+#define rega_intg_txcap			0xab
+#define rega_pll_dpll			0xac
+#define rega_pll_dpll_setting	0xad
+enum{
+	FLDA_PLL_DPLL = 			BIT_RNG(0,1),
+	FLDA_PLL_DPLL_ADJ = 		BIT_RNG(2,4),
+	FLDA_PLL_DPLL_REF = 		BIT_RNG(5,6),
+	FLDA_TXCALDIV2BUF_PWDN = 	BIT(7),
+
+};
+
+#define rega_pll_dpll_wait		0xae
+enum{
+	FLDA_PLL_DPLL_WAIT = 		BIT_RNG(0,5),
+	FLDA_RX_MAN_EN =			BIT(6),
+	FLDA_TX_MAN_EN =			BIT(7),
+};
+
+///////////////////// PM register /////////////////////////
+#define		rega_wakeup_en_val0		0x41
+#define		rega_wakeup_en_val1		0x42
+#define		rega_wakeup_en_val2		0x43
+#define		raga_gpio_wkup_pol		0x44
+
+#define		raga_pga_gain0			0x86
+#define		raga_pga_gain1			0x87
+
+
+
+
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/rf_drv.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/rf_drv.h
new file mode 100644
index 00000000..ea7edd7e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/rf_drv.h
@@ -0,0 +1,397 @@
+/********************************************************************************************************
+ * @file    rf_drv.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef	RF_H
+#define RF_H
+
+#include "register.h"
+
+/**
+ *  @brief  Define crystal,Currently only supports RF_OSC_12M
+ */
+typedef enum {
+	RF_OSC_16M = 0,
+	RF_OSC_12M = 1
+} RF_OscSelTypeDef;
+
+/**
+ *  @brief  Define RF mode
+ */
+typedef enum {
+	RF_MODE_BLE_2M 			= 0,
+	RF_MODE_BLE_1M 			= 1,
+	RF_MODE_ZIGBEE_250K 	= 2,
+	RF_MODE_PRIVATE_2M 		= 3,
+	RF_MODE_STANDARD_BLE_1M = 4
+} RF_ModeTypeDef;
+
+/**
+ *  @brief  Define RF state
+ */
+typedef enum {
+  RF_MODE_TX 	= 0,
+  RF_MODE_RX 	= 1,
+  RF_MODE_AUTO 	= 2,
+  RF_MODE_OFF 	= 3
+} RF_StatusTypeDef;
+
+/**
+ *  @brief  Define RF Tx power level
+ */
+typedef enum {
+	RF_POWER_7dBm		= 0,
+	RF_POWER_5dBm		= 1,
+	RF_POWER_m0P6dBm	= 2,
+	RF_POWER_m4P3dBm	= 3,
+	RF_POWER_m9P5dBm	= 4,
+	RF_POWER_m13P6dBm	= 5,
+	RF_POWER_m18P8dBm	= 6,
+	RF_POWER_m23P3dBm	= 7,
+	RF_POWER_m27P5dBm	= 8,
+	RF_POWER_m30dBm		= 9,
+	RF_POWER_m37dBm		= 10,
+	RF_POWER_OFF		= 11,
+} RF_PowerTypeDef;
+
+extern RF_ModeTypeDef g_RFMode;
+
+#define	TP0_THRESHOLD_H					0x4a
+#define	TP0_THRESHOLD_L					0x36
+#define	TP0_DEFAULT_VALUE				0x40
+
+#define	TP1_THRESHOLD_H					0x43
+#define	TP1_THRESHOLD_L					0x2f
+#define	TP1_DEFAULT_VALUE				0x39
+
+//ble
+#define	RF_BLE_PACKET_LENGTH_OK(p)		(p[0] == (p[13]&0x3f)+17)
+#define	RF_BLE_PACKET_CRC_OK(p)			((p[p[0]+3] & 0x51) == 0x40)
+//zigbee
+#define	ZIGBEE_MAX_PACKET_SIZE			127
+#define	RF_PACKET_LENGTH_OK(p)			((p[0] == p[12]+13) && p[0] <= (ZIGBEE_MAX_PACKET_SIZE+13))
+#define	RF_PACKET_CRC_OK(p)				((p[p[0]+3] & 0x51) == 0x10)
+#define RF_GET_TIMESTAMP(p)    			(p[8] | (p[9]<<8) | (p[10]<<16) | (p[11]<<24))
+#define RF_GET_PKT_RSSI(p)    			(p[4])
+#define RF_GET_PKT_PAYLOAD_LEN(p)		(p[12])
+
+
+#define	RFDMA_RX_DISABLE				(reg_dma_chn_en &= (~FLD_DMA_RF_RX))
+#define	RFDMA_RX_ENABLE					(reg_dma_chn_en |= (FLD_DMA_RF_RX))
+
+#define	RFDMA_TX_DISABLE				(reg_dma_chn_en &= (~FLD_DMA_RF_TX))
+#define	RFDMA_TX_ENABLE					(reg_dma_chn_en |= (FLD_DMA_RF_TX))
+
+#define RF_TxFinishClearFlag()		 	(reg_rf_irq_status = FLD_RF_IRQ_TX)
+#define RF_RxFinishClearFlag()		 	(reg_rf_irq_status = FLD_RF_IRQ_RX)
+#define RF_TxFinish()				 	(reg_rf_irq_status & FLD_RF_IRQ_TX)
+
+static inline void rf_irq_enable(unsigned int msk)
+{
+    reg_rf_irq_mask |= msk;
+}
+
+static inline void rf_irq_disable(unsigned int msk)
+{
+    reg_rf_irq_mask &= (~msk);
+}
+
+static inline void RF_rx_buffer_reconfig(unsigned char *RF_RxAddr)
+{
+	reg_dma2_addr = (unsigned short)((unsigned int)RF_RxAddr);
+}
+
+/********************************************************************************
+*	@brief	 This function is used during RF mode switch to reset Baseband.
+*	@return	 	none
+*/
+extern void RF_BaseBandReset(void);
+
+/********************************************************************************
+*	@brief		This function should be invoked first,before the RF_TrxStateSet
+*				is invoked
+*
+*	@param[in]	OscSel   enum variable of external crystal RF_OSC_16M/RF_OSC_12M
+*	@param[in]	RF_Mode      enum variable of RF mode
+*	@return		'1' :set success; '0':parameters set error
+*/
+extern int RF_Init(RF_OscSelTypeDef OscSel, RF_ModeTypeDef RF_Mode);
+
+extern void RF_cal(unsigned long tpAddr, unsigned long capAddr);
+
+/********************************************************************************
+*	@brief	  	This function serves to switch to maxgain mode with better
+*				Rx performance,	and will only take effect if its invoked after
+*				the RF_Init.The RF_Init sets the mode as AGC mode by default.
+*
+*	@param[in]	length  	Optional range: 3~5
+*							Note: The effect for 3-byte access_code is not good.
+*
+*	@return	 	none
+*/
+extern void RF_SetGainManualMax(void);
+/********************************************************************************
+*	@brief	  	This function serves to switch to AGC mode from maxgain mode,
+*				and will only take effect if its invoked after the RF_Init.
+*
+*	@param[in]	length  	Optional range: 3~5
+*							Note: The effect for 3-byte access_code is not good.
+*
+*	@return	 	none
+*/
+extern void RF_SetAgc(void);
+
+/********************************************************************************
+*	@brief		This function serves to switch RF mode. After this function is
+*				invoked, the RF_TrxStateSet and RF_BaseBandReset should be
+*				invoked, as shown below:
+*				RF_ModeSet(RF_MODE_BLE_1M);
+*		   		RF_TrxStateSet(RF_MODE_TX,20);
+*		   		WaitUs(150);//wait pllclock
+*		 		RF_BaseBandReset();
+*
+*	@param[in]	RF_Mode   Set working mode for RF module
+*	@return	 	'0' :set success; '-1':parameters set error
+*/
+extern int RF_ModeSet(RF_ModeTypeDef RF_Mode);
+
+/********************************************************************************
+*	@brief	 This function is to update TP(two point),this value will affect
+*			 RF performance
+*			 it needs to use  before the function  "RF_TrxStateSet"
+*
+*	@param[in]	RF_Mode  	Set working mode for RF module.
+*	@param[in]	RF_TPLow  	Tp value for lower frequency (2400Mhz)
+*							range: 2M/250K : 0x40(+/-)10   1M :0x1d(+/-)10
+*							If you set a value outside the range, you will be set to fail.
+*	@param[in]	RF_TPHigh  	Tp value for higher frequency (2480Mhz)
+*							range: 2M/250K : 0x39(+/-)10   1M :0x19(+/-)10
+*							If you set a value outside the range, you will be set to fail.
+*
+*	@return	 	'0' :set success; '-1':set failed
+*/
+extern int RF_UpdateTpValue(RF_ModeTypeDef RF_Mode ,unsigned char RF_TPLow, unsigned char RF_TPHigh);
+
+/********************************************************************************
+*	@brief	 This function is to update cap value to affect RF performance
+*			 it needs to use after the function  "RF_Init"
+*
+*	@param[in]	RF_Cap  	cap value : <4:0> is cap value(0x00 - 0x1f)
+*
+*	@return	 	none
+*/
+extern void RF_UpdateCapValue(unsigned char RF_Cap);
+
+/********************************************************************************
+*	@brief	  	This function is to select Tx power level. Parameter type is enum.
+*
+*	@param[in]	RF_TxPowerLevel   select Tx power level
+*
+*	@return	 	none
+*/
+extern void RF_PowerLevelSet(RF_PowerTypeDef RF_TxPowerLevel);
+
+/********************************************************************************
+*	@brief	  	This function is to set Rf channel and state(rx/tx/auto),After
+*				this function is invoked and state is rx or tx,a 100us~150us
+*				delay is needed to lock PLL. Then its ready to carry out packet
+*				Rx/Tx operations.
+*
+*	@param[in]	RF_Status   set current status for RF module(tx/rx/auto),
+*						Note: When the RF_Status is set as auto mode, the functions
+*						RF_StartStx, RF_StartStxToRx and RF_StartSrxToTx
+*						can be used.
+*	@param[in]	RF_Status Unit is MHz.
+*						The frequency is set as (2400+ channel) MHz.(0~100)
+*						Note: It should be set as the same value for Rx and Tx
+*						terminal.
+*	@return	 	'0' :set success; '-1':parameters set error
+*/
+extern int RF_TrxStateSet(RF_StatusTypeDef RF_Status, signed char RF_Channel);
+
+/********************************************************************************
+*   @brief      This function is to get the current state of the RF transceiver
+*
+*   @param[in]  None
+*   @return     RF_StatusTypeDef
+*/
+extern RF_StatusTypeDef RF_TrxStateGet(void);
+
+/********************************************************************************
+*	@brief	  	This function is to send packet
+*
+*	@param[in]	RF_TxAddr   Tx packet address in RAM. Should be 4-byte aligned.
+*					  		 The format for Tx packet in RAM is shown as below:
+*					 		(length indicates data length, data indicates data
+*					 		 to be transmitted.)
+*	BLE (1M, 2M) mode					Zigbee (250K) mode, Private (2M) mode
+*	addr			length+2				addr				Length+1
+*	addr+1				0					addr+1					0
+*	addr+2				0					addr+2					0
+*	addr+3				0					addr+3					0
+*	addr+4				0					addr+4				Length+2
+*	addr+5			length					addr+5				data(0)
+*	addr+6			data(0)					addr+6				data(1)
+*	addr+7			data(1)					addr+7				data(2)
+*												
+*	addr+5+(length)	data(length-1)			addr+4+(length)		data(length-1)
+*
+*	@return	 	none
+*/
+extern void RF_TxPkt(unsigned char *RF_TxAddr);
+
+/********************************************************************************
+*	@brief	  	This function is to set rx buffer
+*
+*	@param[out]	RF_RxAddr  	Pointer for Rx buffer in RAM(Generally its starting
+*							address of an array.Should be 4-byte aligned)
+*	@param[in]	Size   		Rx buffer size (Its an integral multiple of 16)
+*	@param[in]	PingpongEn 	Enable/Disable Ping-Pong buffer 1Enable 0Disable
+*							Note:
+*							When PingpongEn is set as 0, received RF data will
+*							be stored in RAM pointed by  RF_RxAddr.
+*							When PingpongEn is set as 1, received RF data will
+*							be stored in buffer0 and buffer1 successively.
+*							The RAM size reserved for received RF data should be
+*							double of Size.
+*
+*	@return	 	none
+*/
+extern void RF_RxBufferSet(unsigned char *RF_RxAddr, int Size, unsigned char PingpongEn);
+
+extern void RF_rx_cfg(int Size, unsigned char PingpongEn);
+
+/********************************************************************************
+*	@brief	  	This function serves to start STX mode of auto_mode.
+*				This mode will end after a packet is transmitted.
+*
+*	@param[in]	RF_TxAddr   Tx packet address in RAM. Should be 4-byte aligned.
+*	@param[in]	RF_StartTick  Tick value of system timer. It determines when to
+*						  	  start STX mode and send packet.
+*	@return	 	none
+*/
+extern void RF_StartStx(unsigned char *RF_TxAddr, unsigned int RF_StartTick);
+
+/********************************************************************************
+*	@brief	  	This function serves to start Srx mode of auto_mode. In this mode,
+*				RF module stays in Rx status until a packet is received or it fails to receive packet when timeout expires.
+*				Timeout duration is set by the parameter "RF_RxTimeoutUs".
+*				The address to store received data is set by the function RF_RxBufferSet.
+*
+*	@param[in]	tick   		  	 Tick value of system timer. It determines when to start Srx mode.
+*	@param[in]	timeout_us   	 Unit is us. It indicates timeout duration in Rx status.Max value: 0xffffff (16777215)
+*
+*	@return	 	none
+*/
+extern void RF_StartSrx(unsigned int RF_StartTick, unsigned int RF_RxTimeoutUs);
+
+/********************************************************************************
+*	@brief	  	This function serves to start StxToRx mode of auto_mode.
+*				In this mode, a packet is sent first,RF module waits for 10us,
+*				stays in Rx status until data is received or timeout expires,
+*				then exits this mode.Timeout duration is set by the parameter
+*				RF_RxTimeoutUs.The address to store received data is set by the
+*				function RF_RxBufferSet.
+*
+*	@param[in]	RF_TxAddr  Tx packet address in RAM. Should be 4-byte aligned.
+*	@param[in]	RF_StartTick   	Tick value of system timer. It determines when
+*								to start StxToRx mode and send packet.
+*	@param[in]	RF_RxTimeoutUs  Unit is us. It indicates timeout duration in
+*							 	Rx status.Max value: 0xfff (4095)
+*
+*	@return	 	none
+*/
+extern void RF_StartStxToRx(unsigned char *RF_TxAddr, unsigned int RF_StartTick, unsigned short RF_RxTimeoutUs);
+
+/********************************************************************************
+*	@brief	  	This function serves to start SrxToTx mode of auto_mode.
+*				In this mode,RF module stays in Rx status until a packet is
+*				received or it fails to receive packetwhen timeout expires.
+*				If a packet is received within the timeout duration, RF module
+*				will wait for 10us,send a packet, and then exit this mode.
+*				If it fails to receive packet when timeout expires, RF module
+*				will directly exit this mode.Timeout duration is set by the
+*				parameter "RF_RxTimeoutUs".	The address to store received data is set
+*				by the function RF_RxBufferSet.
+*
+*	@param[in]	RF_TxAddr 	Tx packet address in RAM. Should be 4-byte aligned.
+*	@param[in]	RF_StartTick   Tick value of system timer. It determines when to
+*								start SrxToTx mode.
+*	@param[in]	RF_RxTimeoutUs  Unit is us. It indicates timeout duration in Rx status.
+*								Max value: 0xffffff (16777215)
+*
+*	@return	 	none
+*/
+extern void RF_StartSrxToTx(unsigned char* RF_TxAddr  ,unsigned int RF_StartTick,unsigned int RF_RxTimeoutUs);
+
+/********************************************************************************
+*	@brief	  	This function is turn off tx and rx auto mode
+*
+*	@return	 	none
+*/
+extern void RF_SetTxRxOffAutoMode(void);
+
+/********************************************************************************
+*	@brief	  	This function is turn off tx and rx
+*
+*	@return	 	none
+*/
+extern void RF_SetTxRxOff(void);
+
+/********************************************************************************
+*	@brief	  	This function is to obtain the RSSI value of the current channel
+*				Before using it, it is necessary to set the "RF_MODE_RX" by "RF_TrxStateSet"
+*
+*
+*	@return	 	RSSI value :  unit is dbm
+*/
+extern signed char RF_GetRssi(void);
+
+extern void RF_reset(void);
+
+/********************************************************************************
+*	@brief	  	This function is to get rx buffer result
+*
+*	@return	 	0:There are received RF data in buffer 0.
+*				1:There are received RF data in buffer 1.
+*				2:No RF data is received.
+*/
+extern unsigned char RF_RxBufferRequest(void);
+
+/********************************************************************************
+*	@brief	  	This function serves to clear the flag bit for Rx buffer.
+*				After RF data are received, flag bits will be generated for
+*				buffer 0 and buffer 1.By reading corresponding flag bit, it can
+*				check whether RF Rx event occurs.After the received data
+*				are processed, its needed to clear flag bits for buffer 0
+*				and buffer 1,so as to avoid regarding the old data as new by mistake.
+
+*	@param[in]	RF_RxBufferIdx   0:buffer0  1:buffer1
+*
+*	@return	 	none
+*/
+extern void RF_RxBufferClearFlag(unsigned char RF_RxBufferIdx);
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/spi.h
new file mode 100644
index 00000000..57f3513a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/spi.h
@@ -0,0 +1,115 @@
+/********************************************************************************************************
+ * @file    spi.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef SPI_H
+#define SPI_H
+
+#include "gpio.h"
+
+/**
+ *  @brief  Define the mode for SPI interface
+ */
+typedef enum {
+    SPI_MODE0 = 0,
+    SPI_MODE2,
+    SPI_MODE1,
+    SPI_MODE3,
+} SPI_ModeTypeDef;
+
+/**
+ *  @brief  Define the pin port for SPI interface 
+ */
+typedef enum {
+    SPI_PIN_GPIOA = 0,
+    SPI_PIN_GPIOB,
+} SPI_PinTypeDef;
+
+/**
+ * @brief     This function selects a pin port for the SPI interface
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ */
+extern void SPI_MasterPinSelect(SPI_PinTypeDef PinGrp);
+
+/**
+ * @brief     This function selects a GPIO pin as CS of SPI function.
+ * @param[in] CSPin - the selected CS pin
+ * @return    none
+ */
+extern void SPI_MasterCSPinSelect(GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * @return    none
+ */
+extern void SPI_MasterInit(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief      This function serves to write a bulk of data to the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the 
+ *             slave device first before the writing operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes 
+ * @param[in]  Data - pointer to the data need to write 
+ * @param[in]  DataLen - length in byte of the data need to write
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void SPI_Write(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief      This function serves to read a bulk of data from the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the 
+ *             slave device first before the reading operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes 
+ * @param[out] Data - pointer to the buffer that will cache the reading out data 
+ * @param[in]  DataLen - length in byte of the data need to read
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void SPI_Read(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ * @return    none
+ */
+extern void SPI_SlaveInit(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief     This function selects a pin port for the SPI interface
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ */
+extern void SPI_SlavePinSelect(SPI_PinTypeDef PinGrp);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/timer.h
new file mode 100644
index 00000000..87ca63fa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/timer.h
@@ -0,0 +1,83 @@
+/********************************************************************************************************
+ * @file    timer.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+typedef enum{
+	TIMER0		=0,
+	TIMER1		=1,
+	TIMER2		=2,
+}TIMER_TypeDef;
+
+typedef enum{
+	TIMER_MODE_SYSCLK		=0,
+	TIMER_MODE_GPIO_TRIGGER	=1,//not used
+	TIMER_MODE_GPIO_WIDTH	=2,//not used
+	TIMER_MODE_TICK			=3,//not used
+}TIMER_ModeTypeDef;
+
+static inline void timer_set_init_tick(TIMER_TypeDef type, unsigned int init_tick)
+{
+	reg_tmr_tick(type) = init_tick;
+}
+
+static inline void timer_set_cap_tick(TIMER_TypeDef type, unsigned int cap_tick)
+{
+	reg_tmr_capt(type) = cap_tick;
+}
+
+static inline void timer_irq_enable(TIMER_TypeDef type)
+{
+	reg_irq_mask |= (1 << type);
+}
+
+static inline void stimer_set_irq_capture(unsigned long cap_tick)
+{
+	reg_system_tick_irq = cap_tick;
+}
+
+static inline void stimer_irq_enable(void)
+{
+	reg_system_tick_mode |= FLD_SYSTEM_TICK_IRQ_EN;
+}
+
+static inline void stimer_set_irq_mask(void)
+{
+	reg_irq_mask |= FLD_IRQ_SYSTEM_TIMER;
+}
+
+static inline void stimer_clr_irq_mask(void)
+{
+	reg_irq_mask &= ~(unsigned long)FLD_IRQ_SYSTEM_TIMER;
+}
+
+void timer_set_mode(TIMER_TypeDef type, TIMER_ModeTypeDef mode);
+
+void timer_start(TIMER_TypeDef type);
+
+void timer_stop(TIMER_TypeDef type);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/uart.h
new file mode 100644
index 00000000..fc493bef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/uart.h
@@ -0,0 +1,151 @@
+/********************************************************************************************************
+ * @file    uart.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef UART_H
+#define UART_H
+
+
+enum HARDWARECONTROL{
+	CTSWODDPARITY = 0x0e,
+	CTSWEVENPARITY = 0x06,
+	CTSONLY = 0x02,
+	ODDPARITY = 0x0C,
+	EVENPARITY = 0x04,
+	NOCONTROL = 0x00,
+};
+
+enum UARTIRQSOURCE{
+	NONE_DMA_IRQ,
+	UART_RX_DMA0=1,
+	UART_TX_DMA1,
+	RF_RX_DMA2,
+	RF_TX_DMA3=4,
+};
+
+
+
+//UART_TX/UART_RX gpio pin config
+#define	   UART_GPIO_CFG_PA6_PA7()  do{\
+										*(volatile unsigned char  *)0x800586 &= 0x3f;\
+										*(volatile unsigned char  *)0x8005b0 |= 0x80;\
+								    }while(0) 
+#define	   UART_GPIO_CFG_PB2_PB3()  do{\
+										*(volatile unsigned char  *)0x80058e &= 0xf3;\
+										*(volatile unsigned char  *)0x8005b1 |= 0x0c;\
+								    }while(0)  
+#define	   UART_GPIO_CFG_PC2_PC3()  do{\
+										*(volatile unsigned char  *)0x800596 &= 0xf3;\
+										*(volatile unsigned char  *)0x8005b2 |= 0x0c;\
+								    }while(0)  
+
+/**********************************************************
+*
+*	@brief	reset uart module
+*	
+*	@param	none
+*
+*	@return	none
+*/
+extern void uart_Reset(void);
+
+extern volatile unsigned char uart_status;
+/**********************************************************
+*	
+*	@brief	clear error state of uart rx, maybe used when application detected UART not work
+*
+*	@parm	none
+*
+*	@return	'1' RX error flag rise and cleared success; '0' RX error flag not rise
+*
+*/
+unsigned char uart_ErrorCLR(void);
+
+
+/*******************************************************
+*
+*	@brief	uart initiate, set uart clock divider, bitwidth and the uart work mode
+*
+*	@param	baud_rate - the selected baudrate for UART interface
+*			en_rx_irq - '1' enable rx irq; '0' disable.
+*			en_tx_irq - enable tx irq; '0' disable.
+*			hdwC - enum variable of hardware control functions
+*
+*	@return	'1' set success; '0' set error probably bwpc smaller than 3.
+*/
+extern unsigned char uart_Init(unsigned int baud_rate,unsigned char en_rx_irq,unsigned char en_tx_irq,enum HARDWARECONTROL hdwC);
+
+/********************************************************************************
+*	@brief	uart send data function, this  function tell the DMA to get data from the RAM and start 
+*			the DMA send function
+*
+*	@param	sendBuff - send data buffer
+*
+*	@return	'1' send success; '0' DMA busy
+*/
+extern unsigned char uart_Send(unsigned char *addr);
+
+/********************************************************************************
+*	@brief	uart send data function,
+*
+*	@param	data - send data buffer
+*
+*	@return	'1' send success; '0' fail
+*/
+unsigned char uart_pktSend(unsigned char *data);
+
+/********************************************************************
+*	
+*	@brief	uart receive function, call this function to get the UART data
+*
+*	@param	userDataBuff - data buffer to store the uart data
+*
+*	@return	'0' rx error; 'rxLen' received data length
+*/
+//extern unsigned short uart_Rec(unsigned char* addr);
+
+/******************************************************************************
+*
+*	@brief		get the uart IRQ source and clear the IRQ status, need to be called in the irq process function
+*
+*	@return		uart_irq_src- enum variable of uart IRQ source, 'UARTRXIRQ' or 'UARTTXIRQ'
+*
+*/
+extern enum UARTIRQSOURCE DMA_IRQSourceGet(void);
+
+/****************************************************************************************
+*
+*	@brief	data receive buffer initiate function. DMA would move received uart data to the address space, uart packet length
+*			needs to be no larger than (recBuffLen - 4).
+*
+*	@param	*recAddr:	receive buffer's address info.
+*			recBuffLen:	receive buffer's length, the maximum uart packet length should be smaller than (recBuffLen - 4)
+*
+*	@return	none
+*/
+
+extern void uart_RecBuffInit(unsigned char *recAddr, unsigned short recBuffLen);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw.h
new file mode 100644
index 00000000..36ee2b67
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw.h
@@ -0,0 +1,143 @@
+/********************************************************************************************************
+ * @file    usbhw.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef USBHW_H
+#define USBHW_H
+
+#include "bit.h"
+#include "usbhw_i.h"
+#include "gpio.h"
+
+
+enum {
+	USB_EDP_PRINTER_IN 		= 8, 	// endpoint 8 is alias of enpoint 0,  becareful.  // default hw buf len = 64
+	USB_EDP_MOUSE 			= 2,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_IN 	= 1,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_OUT 	= 3,	// default hw buf len = 16
+	USB_EDP_AUDIO_IN 		= 4,	// default hw buf len = 64
+	USB_EDP_PRINTER_OUT 	= 5,	// default hw buf len = 64
+	USB_EDP_SPEAKER 		= 6,	// default hw buf len = 16
+	USB_EDP_MIC 			= 7,	// default hw buf len = 16
+#if(USB_GAMEPAD_ENABLE)
+	USB_EDP_GAMEPAD_IN 		= 3,	// default hw buf len = 64
+	USB_EDP_GAMEPAD_OUT 	= 5,	// default hw buf len = 64
+#endif
+	USB_EDP_MS_IN 			= USB_EDP_PRINTER_IN,	// mass storage
+	USB_EDP_MS_OUT 			= USB_EDP_PRINTER_OUT,
+	USB_EDP_SOMATIC_IN 		= USB_EDP_AUDIO_IN,		//  when USB_SOMATIC_ENABLE, USB_EDP_PRINTER_OUT disable
+	USB_EDP_SOMATIC_OUT 	= USB_EDP_PRINTER_OUT,
+    USB_EDP_CDC_IN 			= 4,
+    USB_EDP_CDC_OUT 		= 5,
+};
+
+// #defined in the standard spec
+enum {
+	USB_HID_AUDIO       	= 2,
+	USB_HID_MOUSE       	= 1,
+	USB_HID_KB_MEDIA    	= 3,// media
+	USB_HID_KB_SYS      	= 4,// system : power,sleep,wakeup
+#if(USB_GAMEPAD_ENABLE)
+	USB_HID_GAMEPAD			= 5,// somatic sensor,  may have many report ids
+#endif
+	USB_HID_SOMATIC			= 5,// somatic sensor,  may have many report ids
+};
+
+/**
+ * @brief      This function enables or disables the internal pull-up resistor
+ *             of DP pin of USB interface
+ * @param[in]  En - enables or disables the internal pull-up resistor(1: enable 0: disable)
+ * @return     none
+ */
+static inline void usb_dp_pullup_en(int en)
+{
+	unsigned char dat = analog_read(0x00);
+	if (en) {
+		dat &= ~BIT(4);
+	}else {
+		dat |= BIT(4);
+	}
+
+	analog_write(0x00, dat);
+}
+
+/**
+ * @brief      This function serves to set GPIO MUX function as DP and DM pin of USB
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void usb_set_pin_en(void)
+{
+	//clear DP first
+	gpio_set_func(GPIO_PE3, AS_GPIO);
+	gpio_set_output_en(GPIO_PE3, 1);
+	gpio_write(GPIO_PE3, 0);
+
+	gpio_set_func(GPIO_PE2, AS_USB);
+	gpio_set_func(GPIO_PE3, AS_USB);
+	gpio_set_input_en(GPIO_PE2, 1);
+	gpio_set_input_en(GPIO_PE3, 1);
+	usb_dp_pullup_en(1);
+}
+
+/**
+ * @brief      This function disables the manual interrupt
+ *             (Endpont8 is the alias of endpoint0)
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_disable_manual_interrupt(int m);
+
+/**
+ * @brief      This function enable the manual interrupt
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_enable_manual_interrupt(int m);
+
+/**
+ * @brief      This function sends a bulk of data to host via the specified endpoint
+ * @param[in]  ep - the number of the endpoint
+ * @param[in]  data - pointer to the data need to send
+ * @param[in]  len - length in byte of the data need to send
+ * @return     none
+ */
+void usbhw_write_ep(unsigned int ep, unsigned char* data, int len);
+
+/**
+ * @brief      This function sends two bytes data to host via the control endpoint
+ *             (handy help function)
+ * @param[in]  v - the two bytes data need to send
+ * @return     none
+ */
+void usbhw_write_ctrl_ep_u16(unsigned short v);
+
+/**
+ * @brief   This function reads two bytes data from host via the control endpoint
+ * @param   none
+ * @return  the two bytes data read from the control endpoint
+ */
+unsigned short usbhw_read_ctrl_ep_u16(void);
+
+#endif	/* USBHW_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw_i.h
new file mode 100644
index 00000000..e1b06990
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/usbhw_i.h
@@ -0,0 +1,191 @@
+/********************************************************************************************************
+ * @file    usbhw_i.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef USBHW_I_H
+#define USBHW_I_H
+
+#include "register.h"
+
+/**
+ * @brief     This function servers to reset the pointer of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ctrl_ep_ptr(void) {
+	reg_ctrl_ep_ptr = 0;
+}
+
+/**
+ * @brief     This function servers to get the irq status of control Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_ctrl_ep_irq(void) {
+	return reg_ctrl_ep_irq_sta;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of control Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_ctrl_ep_irq(int ep) {
+	reg_ctrl_ep_irq_sta = ep;
+}
+
+/**
+ * @brief     This function servers to set the value of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_write_ctrl_ep_ctrl(unsigned char data) {
+	reg_ctrl_ep_ctrl = data;
+}
+
+/**
+ * @brief     This function servers to read the data of control Endpoint.
+ * @param[in] none.
+ * @return    the value of control Endpoint
+ */
+static inline unsigned char usbhw_read_ctrl_ep_data(void) {
+	return reg_ctrl_ep_dat;
+}
+
+/**
+ * @brief     This function servers to write the data of control Endpoint.
+ * @param[in] data -  the value of control Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ctrl_ep_data(unsigned char data) {
+	reg_ctrl_ep_dat = data;
+}
+
+/**
+ * @brief     This function servers to determine whether control Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline int usbhw_is_ctrl_ep_busy(void) {
+	return reg_ctrl_ep_irq_sta & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to reset the pointer of Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ep_ptr(unsigned int ep) {
+	reg_usb_ep_ptr(ep & 0x07) = 0;
+}
+
+/**
+ * @brief     This function servers to set the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_set_eps_irq_mask(unsigned char mask){
+	reg_usb_mask|=mask;
+}
+
+/**
+ * @brief     This function servers to clr the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq_mask(unsigned char mask){
+	reg_usb_mask &=(~mask);
+}
+
+/**
+ * @brief     This function servers to get the irq status of Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_eps_irq(void) {
+	return reg_usb_irq;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq(int ep) {
+	reg_usb_irq = ep;
+}
+
+/**
+ * @brief     This function servers to read the data of Endpoint.
+ * @param[in] none.
+ * @return    the value of Endpoint
+ */
+static inline unsigned char usbhw_read_ep_data(unsigned int ep) {
+	return reg_usb_ep_dat(ep & 0x07);
+}
+
+/**
+ * @brief     This function servers to write the data of Endpoint.
+ * @param[in] data -  the value of Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ep_data(unsigned int ep, unsigned char data) {
+	reg_usb_ep_dat(ep & 0x07) = data;
+}
+
+/**
+ * @brief     This function servers to determine whether Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline unsigned int usbhw_is_ep_busy(unsigned int ep) {
+	return reg_usb_ep_ctrl(ep & 0x07) & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to ack.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_ack(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to stall.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_stall(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_STALL;
+}
+
+/**
+ * @brief     This function servers to set the threshold of printer.
+ * @param[in] th - set the threshold for printer
+ * @return    none.
+ */
+static inline void usbhw_set_printer_threshold(unsigned char th) {
+	reg_usb_ep8_send_thre = th;
+}
+
+#endif	/* USBHW_I_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/watchdog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/watchdog.h
new file mode 100644
index 00000000..f69b65aa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_826x/watchdog.h
@@ -0,0 +1,50 @@
+/********************************************************************************************************
+ * @file    watchdog.h
+ *
+ * @brief   This is the header file for B86
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+//  watchdog use timer 2
+static inline void wd_set_interval_ms(unsigned int interval_ms)
+{
+	reg_tmr2_tick = 0;    //reset tick register
+	reg_tmr_ctrl |= MASK_VAL(FLD_TMR_WD_CAPT, (interval_ms * tickPerUs * 1000 >> WATCHDOG_TIMEOUT_COEFF));
+}
+
+static inline void wd_start(void)
+{
+	SET_FLD(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+
+static inline void wd_stop(void)
+{
+	CLR_FLD(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+
+static inline void wd_clear(void)
+{
+	SET_FLD(reg_tmr_ctrl, FLD_CLR_WD);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/adc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/adc.h
new file mode 100644
index 00000000..90b9b589
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/adc.h
@@ -0,0 +1,694 @@
+/********************************************************************************************************
+ * @file    adc.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "analog.h"
+#include "register.h"
+#include "gpio.h"
+
+/*
+//ADC IO PINS
+GPIO_PinTypeDef ADC_GPIO_tab[] = {
+		GPIO_PB0,GPIO_PB1,
+		GPIO_PB2,GPIO_PB3,
+		GPIO_PB4,GPIO_PB5,
+		GPIO_PB6,GPIO_PB7,
+		GPIO_PC4,GPIO_PC5
+};
+*/
+
+/**
+ *  Some notice for ADC
+ *  1:Just has MISC channel
+ *  2:Just has 0.9V/1.2V reference voltage.
+ *  3:Resolution:8/10/12/14.
+ *  4:input mode,just has differential
+ */
+
+extern unsigned char adc_vbat_divider;
+
+/**
+ *  ADC reference voltage
+ */
+typedef enum{
+	ADC_VREF_0P9V = 0x01,
+	ADC_VREF_1P2V = 0x02,
+}ADC_RefVolTypeDef;
+
+/**
+ *  ADC Vbat divider
+ */
+typedef enum{
+	ADC_VBAT_DIVIDER_OFF = 0,
+	ADC_VBAT_DIVIDER_1F3=2,
+	/**
+	 * Delete the ADC_VBAT_DIVIDER_1F2 enum due to it can't make sense.
+	 * changed by chaofan. confirmed by lingyu.20201029.
+	 */
+}ADC_VbatDivTypeDef;
+
+/**
+ *	ADC analog input negative channel
+ */
+typedef enum {
+	NOINPUTN,
+	B0N,
+	B1N,
+	B2N,
+	B3N,
+	B4N,
+	B5N,
+	B6N,
+	B7N,
+	C4N,
+	C5N,
+	PGA0N,
+	PGA1N,
+	TEMSENSORN,
+	TEMSENSORN_EE,
+	GND,
+}ADC_InputNchTypeDef;
+
+/**
+ *	ADC analog input positive channel
+ */
+typedef enum {
+	NOINPUTP,
+	B0P,
+	B1P,
+	B2P,
+	B3P,
+	B4P,
+	B5P,
+	B6P,
+	B7P,
+	C4P,
+	C5P,
+	PGA0P,
+	PGA1P,
+	TEMSENSORP,
+	TEMSENSORP_EE,
+	VBAT,
+}ADC_InputPchTypeDef;
+
+/**
+ *	ADC resolution
+ */
+typedef enum{
+	RES8,
+	RES10,
+	RES12,
+	RES14
+}ADC_ResTypeDef;
+
+/**
+ *	ADC channel input mode
+ */
+typedef enum{
+	DIFFERENTIAL_MODE = 1,  //differential mode
+}ADC_InputModeTypeDef;
+
+/**
+ *  ADC Sampling cycles
+ */
+typedef enum{
+	SAMPLING_CYCLES_3,
+	SAMPLING_CYCLES_6,
+	SAMPLING_CYCLES_9,
+	SAMPLING_CYCLES_12,
+	SAMPLING_CYCLES_15,
+	SAMPLING_CYCLES_18,
+	SAMPLING_CYCLES_21,
+	SAMPLING_CYCLES_24,
+	SAMPLING_CYCLES_27,
+	SAMPLING_CYCLES_30,
+	SAMPLING_CYCLES_33,
+	SAMPLING_CYCLES_36,
+	SAMPLING_CYCLES_39,
+	SAMPLING_CYCLES_42,
+	SAMPLING_CYCLES_45,
+	SAMPLING_CYCLES_48,
+}ADC_SampCycTypeDef;
+
+/**
+ * ADC input channel: MISC
+ */
+typedef enum{
+	ADC_MISC_CHN	= BIT(2),
+}ADC_ChTypeDef;
+
+/**
+ *	ADC Prescaler Just for 1 or 1/8
+ */
+typedef enum{
+	ADC_PRESCALER_1   = 0x00,
+	ADC_PRESCALER_1F8 = 0x03,
+}ADC_PreScalingTypeDef;
+
+
+/**
+ *	ADC mode: Normal mode mode
+ */
+typedef enum{
+	ADC_NORMAL_MODE      = 0,
+}ADC_ModeTypeDef;
+
+
+
+/**
+ * @brief      This function reset adc module
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void adc_reset_adc_module(void)
+{
+	reg_rst1 = FLD_RST1_ADC;
+	reg_rst1 = 0;
+}
+
+/**
+ * @brief      This function enable adc source clock: external 24M
+ * @param[in]  en - variable of source clock state 1: enable;  0: disable.
+ * @return     none.
+ */
+static inline void adc_enable_clk_24m_to_sar_adc(unsigned int en)
+{
+	if(en)
+	{
+		analog_write(areg_clk_setting, analog_read(areg_clk_setting) | FLD_CLK_24M_TO_SAR_EN);
+	}
+	else
+	{
+		analog_write(areg_clk_setting, analog_read(areg_clk_setting) & ~FLD_CLK_24M_TO_SAR_EN);
+	}
+}
+
+/**************************************************************************************
+afe_0xF4
+    BIT<2:0>  adc_clk_div
+      	  	  ADC clock(derive from external 24M crystal)
+      	  	  ADC clk frequency = 24M/(adc_clk_div + 1)
+    BIT<7:3>  reserved
+ *************************************************************************************/
+#define areg_adc_sampling_clk_div	   0xf4
+enum{
+	FLD_ADC_SAMPLE_CLK_DIV  = 	       BIT_RNG(0,2),
+};
+
+/**
+ * @brief      This function sets adc sample clk. adc sample clk = 24M/(1+div)  div: 0~7.
+ * @param[in]  div - the divider of adc sample clock.
+ * @return     none
+ */
+static inline void adc_set_sample_clk(unsigned char div)
+{
+	//afe_0xF4<7:3> is reserved, so no need to care its value
+	analog_write(areg_adc_sampling_clk_div, div & 0x07 );
+}
+
+/**************************************************************************************
+afe_0xEA
+    BIT<1:0>  adc_vrefm, Select VREF for Misc channel
+			0x1: 0.9V
+ 	 	 	0x2: 1.2V
+ 	 	 	0x3: VBAT/N (N=2/3/4, when afe_0xF9<3:2> is set as 0x3/0x2/0x1).
+
+	notice that: when choose ADC_VREF_VBAT_N, must use adc_set_vref_vbat_divider to config N(1/2/3/4)
+ *************************************************************************************/
+#define areg_adc_vref				   0xea
+enum{
+	FLD_ADC_VREF_CHN_M = 		       BIT_RNG(0,1),
+};
+
+/**
+ * @brief      This function sets ADC reference voltage for Misc channel
+ * @param[in]  v_ref_M - enum variable of adc reference voltage for Misc channel.
+ * @return     none
+ */
+static inline void adc_set_vref(ADC_RefVolTypeDef vRef_M)
+{
+	analog_write(areg_adc_vref, vRef_M);
+}
+
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  v_ref - enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_ref_voltage(ADC_RefVolTypeDef v_ref);
+
+
+#define areg_adc_vref_vbat_div			0xf9
+enum{
+	FLD_ADC_VREF_VBAT_DIV   = 	        BIT_RNG(2,3),
+};
+/**
+ * @brief      This function select Vbat voltage divider
+ * @param[in]  vbat_div - enum variable of Vbat voltage divider.
+ * @return     none
+ */
+static inline void adc_set_vref_vbat_divider(ADC_VbatDivTypeDef vbat_div)
+{
+	analog_write(areg_adc_vref_vbat_div, (analog_read(areg_adc_vref_vbat_div) & (~FLD_ADC_VREF_VBAT_DIV)) | (vbat_div << 2));
+	if(vbat_div){
+		adc_vbat_divider = 5 - vbat_div;
+	}else{
+		adc_vbat_divider = 1;
+	}
+}
+
+
+
+/**************************************************************************************
+afe_0xEB
+    BIT<3:0>  Select negative input for MISC channel
+    BIT<7:4>  Select positive input for MISC channel
+
+	negative input:
+		0x0: No input
+		0x1: B<0>
+		0x2: B<1>
+		...
+		0x8: B<7>
+		0x9: C<4>
+		0xa: C<5>
+		0xb: rsvd
+		0xc: rsvd
+		0xd: old tempsensor_n (Temperature sensor negative output)
+		0xe: new tempsensor_n (Temperature sensor negative output)
+		0xf: Ground
+
+	positive input:
+		0x0: No input
+		0x1: B<0>
+		0x2: B<1>
+		...
+		0x8: B<7>
+		0x9: C<4>
+		0xa: C<5>
+		0xb: rsvd
+		0xc: rsvd
+		0xd: old tempsensor_p (Temperature sensor negative output)
+		0xe: new tempsensor_p (Temperature sensor negative output)
+		0xf: Vbat (Battery voltage)
+ *************************************************************************************/
+#define areg_adc_ain_chn_misc			0xeb
+enum{
+	FLD_ADC_AIN_NEGATIVE = 		        BIT_RNG(0,3),
+	FLD_ADC_AIN_POSITIVE = 		        BIT_RNG(4,7),
+};
+
+/**
+ * @brief This function serves to set input channel for the MISC channel.
+ * @param[in]   p_ain - enum variable of ADC analog positive input channel.
+ * @param[in]   n_ain - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+static inline void adc_set_ain_chn_misc(ADC_InputPchTypeDef p_ain, ADC_InputNchTypeDef n_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, n_ain | p_ain << 4);
+}
+
+/**
+ * @brief      This function sets ADC analog negative input channel for the MISC channel
+ * @param[in]  v_ain - enum variable of ADC analog negative input.
+ * @return     none
+ */
+static inline void adc_set_ain_negative_chn_misc(ADC_InputNchTypeDef v_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, (analog_read(areg_adc_ain_chn_misc) & (~FLD_ADC_AIN_NEGATIVE)) | (v_ain));
+}
+/**
+ * @brief      This function sets ADC analog positive input channel for the MISC channel
+ * @param[in]  v_ain - enum variable of ADC analog positive input.
+ * @return     none
+ */
+static inline void adc_set_ain_positive_chn_misc(ADC_InputPchTypeDef v_ain)
+{
+	analog_write(areg_adc_ain_chn_misc, (analog_read(areg_adc_ain_chn_misc) & (~FLD_ADC_AIN_POSITIVE)) | (v_ain << 4));
+}
+
+/**
+ * @brief This function serves to set resolution.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return none
+ */
+void adc_set_resolution(ADC_ResTypeDef v_res);
+
+
+
+#define anareg_adc_res_m					0xec
+enum{
+	FLD_ADC_RES_M         =             BIT_RNG(0,1),
+	FLD_ADC_EN_DIFF_CHN_M =          	BIT(6),
+};
+/**
+ * @brief      This function sets ADC resolution for the MISC channel
+ * @param[in]  v_res - enum variable of ADC resolution.
+ * @return     none
+ */
+static inline void adc_set_resolution_chn_misc(ADC_ResTypeDef v_res)
+{
+	analog_write(anareg_adc_res_m, (analog_read(anareg_adc_res_m) & (~FLD_ADC_RES_M)) | (v_res));
+}
+
+/**
+ * @brief      This function sets ADC input mode for the MISC channel
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return     none
+ */
+static inline void adc_set_input_mode_chn_misc(ADC_InputModeTypeDef m_input)
+{
+	 //differential mode
+	analog_write(anareg_adc_res_m, analog_read(anareg_adc_res_m) | FLD_ADC_EN_DIFF_CHN_M);
+}
+
+/**
+ * @brief This function serves to set input_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  m_input - enum variable of ADC channel input mode.
+ * @return none
+ */
+void adc_set_input_mode(ADC_InputModeTypeDef m_input);
+
+
+#define areg_adc_tsmaple_m				0xee
+enum{
+	FLD_ADC_TSAMPLE_CYCLE_CHN_M = 		BIT_RNG(0,3),
+};
+
+/**
+ * @brief      This function sets ADC sample time(the number of adc clocks for sample cycles) for the MISC channel.
+ * @param[in]  adcST - enum variable of adc sample cycles.
+ * @return     none
+ */
+static inline void adc_set_tsample_cycle_chn_misc(ADC_SampCycTypeDef adcST)
+{
+	//ana_ee<7:4> is reserved, so no need care its value
+	analog_write(areg_adc_tsmaple_m, adcST);  //optimize, <7:4> not cared
+}
+
+/**
+ * @brief This function serves to set sample_cycle.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  adcST - enum variable of ADC Sampling cycles.
+ * @return none
+ */
+void adc_set_tsample_cycle(ADC_SampCycTypeDef adcST);
+
+/**************************************************************************************
+afe_0xEF<7:0>  	r_max_mc[7:0]
+afe_0xF0<7:0>	rsvd
+afe_0xF1
+		<3:0>   r_max_s
+		<5:4>   rsvd
+		<7:6>   r_max_mc[9:8]
+
+	r_max_mc[9:0]: serves to set length of capture state for Misc channel.
+	r_max_s:       serves to set length of set state for Misc channel.
+
+	Note: State length indicates number of 24M clock cycles occupied by the state.
+ *************************************************************************************/
+#define areg_r_max_mc	        0xef
+enum{
+	FLD_R_MAX_MC0	= 			BIT_RNG(0,7),//0xef<7:0>  r_max_mc[7:0]
+};
+
+#define	areg_r_max_s			0xf1
+enum{
+	FLD_R_MAX_S		=			BIT_RNG(0,3),//0xf1<3:0>  r_max_s
+	FLD_R_MAX_MC1	= 			BIT_RNG(6,7),//0xf1<7:6>  r_max_mc[9:8]
+};
+
+/**
+ * @brief      This function sets length of each set state
+ * @param[in]  r_max_s - variable of length of "set" state
+ * @return     none
+ */
+static inline void adc_set_length_set_state(unsigned char r_max_s)
+{
+	analog_write(areg_r_max_s, (analog_read(areg_r_max_s) & (~FLD_R_MAX_S)) | (r_max_s));
+}
+
+/**
+ * @brief      This function sets length of each "capture" state for MISC channel.
+ * @param[in]  r_max_mc[9:0] - variable of length of "capture" state for MISC channel.
+ * @return     none
+ * note :  0xef<7:0>  r_max_mc[7:0]
+ *         0xf1<7:6>  r_max_mc[9:8]
+ */
+static inline void adc_set_length_capture_state_for_chn_misc_rns (unsigned short r_max_mc)
+{
+	analog_write(areg_r_max_mc, (r_max_mc & 0x0ff));
+	analog_write(areg_r_max_s, ((analog_read(areg_r_max_s) & (~FLD_R_MAX_MC1)) | ((r_max_mc & 0x3ff) >> 8) << 6));
+}
+
+/**
+ * @brief This function serves to set state and capture_state length.
+ * @param[in]   r_max_mc - Value of length of "capture" state for MISC channel.
+ * @param[in]   r_max_s - Value of length of "set" state for MISC channel.
+ * @return none
+ */
+static inline void adc_set_state_length(unsigned short R_max_mc,unsigned char R_max_s)
+{
+	analog_write(areg_r_max_mc, R_max_mc);
+	analog_write(areg_r_max_s, ((R_max_mc >> 8) << 6)| (R_max_s & FLD_R_MAX_S));
+}
+
+/***************************************************************************************
+afe_0xF2
+    BIT<0>   rsvd
+    BIT<1>   rsvd
+	BIT<2>   r_en_Misc    Enable Misc  channel. 1: enable;  0: disable
+	BIT<3>   writetocore_enable/disable 0:enable;  1:disable
+	BIT<5:4> r_max_scnt   Set total length for sampling state machine (i.e. max state index)
+	BIT<6>   rsvd
+    BIT<7>   rsvd
+ *************************************************************************************/
+#define areg_adc_chn_en			0xf2
+enum{
+	FLD_ADC_CHN_EN_M	= 		BIT(2),
+	FLD_ADC_CHN_EN_RNS	= 		BIT(3),
+	FLD_ADC_MAX_SCNT	=		BIT_RNG(4,5),
+};
+/**
+ * @brief      This function sets ADC input channel.
+ * @param[in]  ad_ch - enum variable of ADC input channel.
+ * @return     none
+ */
+static inline void adc_set_chn_enable(ADC_ChTypeDef ad_ch)
+{
+	analog_write(areg_adc_chn_en, (analog_read(areg_adc_chn_en) & 0xf0) | ad_ch);
+}
+
+/**
+ * @brief      This function sets total state index for the channel.
+ * @param[in]  ad_ch - enum variable of ADC input channel.
+ * @param[in]  s_cnt - sum of the channel state index start with 0x0.
+ * @return     none
+ */
+static inline void adc_set_chn_enable_and_max_state_cnt(ADC_ChTypeDef ad_ch, unsigned char s_cnt)
+{
+	analog_write(areg_adc_chn_en, ad_ch | ((s_cnt & 0x07) << 4));
+}
+
+/**
+ * @brief      This function sets total state index for sampling state.
+ * @param[in]  s_cnt - sum of state index start with 0x0.
+ * @return     none
+ */
+static inline void adc_set_max_state_cnt(unsigned char s_cnt)
+{
+	analog_write(areg_adc_chn_en, (analog_read(areg_adc_chn_en) & (~FLD_ADC_MAX_SCNT)) | ((s_cnt & 0x07) << 4));
+}
+
+/**************************************************************************************
+afe_0xFA
+		BIT<1:0>  adc_itrim_preamp, Comparator preamp bias current trimming
+		BIT<3:2>  adc_itrim_vrefbuf, Vref buffer bias current trimming
+		BIT<5:4>  adc_itrim_vcmbuf, Vref buffer bias current trimming
+
+		BIT<7:6>  Analog input pre-scaling select
+					sel_ai_scale[1:0]: scaling factor
+							0x0: 1
+							0x3: 1/8
+
+ *************************************************************************************/
+#define    areg_ain_scale        		0xfa
+enum{
+	FLD_ADC_ITRIM_PREAMP 	= 	BIT_RNG(0,1),
+	FLD_ADC_ITRIM_VREFBUF	= 	BIT_RNG(2,3),
+	FLD_ADC_ITRIM_VCMBUF	= 	BIT_RNG(4,5),
+	FLD_SEL_AIN_SCALE 		= 	BIT_RNG(6,7),
+};
+
+
+/**************************************************************************************
+afe_0xFC
+	BIT<5>	  adc_pd, Power down ADC
+						1: Power down
+						0: Power up
+ *************************************************************************************/
+#define areg_adc_pga_ctrl		0xfc
+enum{
+	FLD_SAR_ADC_POWER_DOWN 		= BIT(5),
+};
+
+/**
+ * @brief      This function sets sar_adc power.
+ * @param[in]  on - 1 : power on; off-0 : power off.
+ * @return     none
+ * caution power on cause  audio  creepage
+ */
+static inline void adc_power_on_sar_adc(unsigned char on_off)
+{
+	analog_write(areg_adc_pga_ctrl, (analog_read(areg_adc_pga_ctrl) & (~FLD_SAR_ADC_POWER_DOWN)) | (!on_off) << 5);
+}
+
+/*************************************************************************************
+afe_0xF7<7:0>   adc_dat[7:0]  	Read only, Misc adc dat[7:0]
+afe_0xF8<7:0>   adc_dat[15:8]  	Read only
+ *************************************************************************************/
+#define    areg_adc_misc_l      0xf7
+#define    areg_adc_misc_h      0xf8
+
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in]  ch_n - enum variable of ADC input channel.
+ * @param[in]  InPCH - enum variable of ADC analog positive input channel.
+ * @param[in]  InNCH - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+void adc_set_ain_channel_differential_mode(ADC_InputPchTypeDef InPCH, ADC_InputNchTypeDef InNCH);
+
+/**
+ * @brief This function serves to set pre_scaling.
+ * @param[in]  v_scl - enum variable of ADC pre_scaling factor.
+ * @return none
+ */
+void adc_set_ain_pre_scaler(ADC_PreScalingTypeDef v_scl);
+
+
+/**
+ * @brief This function serves to ADC init.
+ * @param[in]   none
+ * @return none
+ */
+void adc_init(void);
+
+/**
+ * @brief This function is used to calib ADC 1.2V vref for GPIO.
+ * @param[in] data - GPIO sampling calibration value.
+ * @return none
+ */
+void adc_set_gpio_calib_vref(unsigned short data);
+/**
+ * @brief This function is used to calib ADC 1.2V vref offset for GPIO two-point.
+ * @param[in] offset - GPIO sampling two-point calibration value offset.
+ * @return none
+ */
+void adc_set_gpio_two_point_calib_offset(signed char offset);
+/**
+ * @brief This function is used to calib ADC 1.2V vref for VBAT.
+ * @param[in] data - VBAT sampling calibration value
+ * @return none
+ */
+void adc_set_vbat_calib_vref(unsigned short data);
+
+/**
+ * @brief This function is used for IO port configuration of ADC IO port voltage sampling.
+ * @param[in]  pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for IO port configuration of ADC supply voltage sampling.
+ * @param[in]  pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_pin_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function is used for ADC configuration of ADC IO voltage sampling.
+ * @param[in]   pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_base_init(GPIO_PinTypeDef pin);
+
+/**
+ * @brief This function servers to test ADC temp.
+ * @param[in]  none.
+ * @return     none.
+ */
+void adc_temp_init(void);
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in]    pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_init(GPIO_PinTypeDef pin);
+
+
+/**
+ * @brief This function is used for ADC configuration of ADC supply voltage sampling.
+ * @param[in]    pin - GPIO_PinTypeDef
+ * @return none
+ */
+void adc_vbat_channel_init(void);
+
+/**
+ * @brief This function serves to set adc sampling and get results.
+ * @param[in]  none.
+ * @return the result of sampling.
+ */
+unsigned int adc_sample_and_get_result(void);
+
+
+#define adc_data_sample_control		0xf3
+enum{
+	NOT_SAMPLE_ADC_DATA 		= BIT(0),
+};
+
+/**
+ * @brief      This function serves to set adc sampling and get results in manual mode for Base and Vbat mode.
+ *             In base mode just PB2 PB3 PB4 PC4 can get the right value!
+ * @param[in]  none.
+ * @return the result of sampling.
+ */
+unsigned short adc_sample_and_get_result_manual_mode(void);
+
+/**
+ * @brief This function serves to get adc sampling temperature results.
+ * @param[in]  none.
+ * @return the result of temperature.
+ */
+signed short adc_temp_result(void);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/aes.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/aes.h
new file mode 100644
index 00000000..93243784
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/aes.h
@@ -0,0 +1,52 @@
+/********************************************************************************************************
+ * @file    aes.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef AES_H_
+#define AES_H_
+
+/**
+ * @brief       This function servers to perform aes_128 encryption for 16-Byte input data
+ *              with specific 16-Byte key
+ * @param[in]   Key the pointer to the 16-Byte Key
+ * @param[in]   Data the pointer to the 16-Byte plain text
+ * @param[out]  Result the pointer to the encryption result cipher text
+ * @return      0: success;
+ *              not 0: failure
+ */
+extern int aes_encrypt(unsigned char *Key, unsigned char *Data, unsigned char *Result);
+
+
+/**
+ * @brief       This function servers to perform aes_128 decryption for 16-Byte input data
+ *              with specific 16-Byte key
+ * @param[in]   Key the pointer to the 16-Byte Key
+ * @param[in]   Data the pointer to the 16-Byte cipher text
+ * @param[out]  Result the pointer to the decryption result plain text
+ * @return      0: success;
+ *              not 0: failure
+ */
+extern int aes_decrypt(unsigned char *Key, unsigned char *Data, unsigned char *Result);
+
+#endif /* AES_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/analog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/analog.h
new file mode 100644
index 00000000..0a0d2057
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/analog.h
@@ -0,0 +1,66 @@
+/********************************************************************************************************
+ * @file    analog.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+/**
+ * @brief      This function serves to analog register read.
+ * @param[in]  addr - address need to be read.
+ * @return     the result of read.
+ */
+unsigned char analog_read(unsigned char addr);
+
+/**
+ * @brief      This function serves to analog register write.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  v - the value need to be write.
+ * @return     none.
+ */
+void analog_write(unsigned char addr, unsigned char v);
+
+/**
+ * @brief      This function serves to analog register read.
+ * @param[in]  addr - address need to be read.
+ * @param[in]  *buff - the value need to be read.
+ * @param[in]  len - the length of read value.
+ * @return     none.
+ */
+void analog_read_buff(unsigned char addr, unsigned char *buff, int len);
+
+/**
+ * @brief      This function serves to analog register write.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  *buff - the value need to be write.
+ * @param[in]  len - the length of write value.
+ * @return     none.
+ */
+void analog_write_buff(unsigned char addr, unsigned char *buff, int len);
+
+
+#define  WriteAnalogReg  analog_write
+#define  ReadAnalogReg   analog_read
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/audio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/audio.h
new file mode 100644
index 00000000..22af6874
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/audio.h
@@ -0,0 +1,236 @@
+/********************************************************************************************************
+ * @file    audio.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef audio_H
+#define audio_H
+
+
+#include "register.h"
+#include "i2c.h"
+#include "analog.h"
+
+
+#define AUDIO_DBL_BUF_ENABLE	0
+
+/**
+ * define audio rate value.
+ */
+typedef enum{
+	AUDIO_8K,
+	AUDIO_16K,
+	AUDIO_32K,
+	AUDIO_48K,
+	RATE_SIZE
+}AudioRate_Typedef;
+
+
+/**
+ * define audio output type.
+ */
+typedef enum{
+	GPIO_PB4_PB5,
+	GPIO_PB6_PB7,
+}Audio_SDM_OutPut_Pin;
+
+
+/**
+ * define audio input type.
+ */
+typedef enum{
+	AMIC,
+	DMIC,
+	I2S_IN,
+	USB_IN,
+	BUF_IN,
+}AudioInput_Typedef;
+
+/**
+ * define codec mode.
+ */
+typedef enum{
+	CODEC_MODE_MICPHONE_TO_HEADPHONE_LINEOUT_I2S,
+	CODEC_MODE_LINE_TO_HEADPHONE_LINEOUT_I2S,
+	CODEC_MODE_I2S_TO_HEADPHONE_LINEOUT,
+}CodecMode_Typedef;
+
+
+/**
+ * @brief     This function serves to reset audio Module
+ * @param[in] none.
+ * @return    none
+ */
+static inline void audio_reset(void)
+{
+	reg_rst2 = FLD_RST2_AUD;
+	reg_rst2 = 0;
+}
+
+/**
+ * 	@brief      This function serves to set the clock of codec,
+ * 	            codec clk is fixd as 24MHz, codec_clk=48M*codec_step[6:0]/codec_mod[7:0]
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ */
+static inline void audio_set_codec_clk(unsigned char step,unsigned char mod)
+{
+	reg_codec_clk_step = step;
+	reg_codec_clk_mod = mod;
+}
+
+/**
+ * 	@brief      This function serves to set the clock of i2s
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ */
+static inline void audio_set_i2s_clk(unsigned char step,unsigned char mod)
+{
+	reg_i2s_step = step|FLD_I2S_CLK_EN;
+	reg_i2s_mod = mod;
+}
+/**
+ * @brief      This function performs to read pointer/write pointer location.
+ * @param[in]  none.
+ * @return     the address of read/write.
+ */
+static inline unsigned short get_mic_wr_ptr (void)
+{
+	return reg_audio_wptr >>1;
+}
+/**
+ * 	@brief     audio amic initial function. configure ADC corresponding parameters. set hpf,lpf and decimation ratio.
+ * 	@param[in] Audio_Rate - audio rate value
+ * 	@return    none
+ */
+void audio_amic_init(AudioRate_Typedef Audio_Rate);
+
+/**
+ * @brief     This function servers to close PGA input and CODEC clock.After calling the Audio module,
+ *            you need to call this API to close Audio,to get the current back to the call.
+ * @param[in] none.
+ * @return    none.
+ */
+void audio_codec_and_pga_disable(void);
+
+/**
+ * @brief     This function servers to receive data from buffer.
+ * @param[in] buf - the buffer in which the data need to write
+ * @param[in] len - the length of the buffer.
+ * @return    none.
+ */
+void audio_rx_data_from_buff(signed char* buf,unsigned int len);
+
+/**
+ * @brief     This function servers to receive data from sample buffer by 16 bits.
+ * @param[in] buf - the buffer in which the data need to write
+ * @param[in] len - the length of the buffer by short.
+ * @return    none.
+ */
+void audio_rx_data_from_sample_buff(const short *buf, unsigned int len);
+
+/**
+ * 	@brief     audio DMIC init function, config the speed of DMIC and downsample audio data to required speed.         actually audio data is dmic_speed/d_samp.
+ * 	@param[in] Audio_Rate - set the DMIC speed. such as 1 indicate 1M and 2 indicate 2M.
+ * 	@return    none.
+ */
+void audio_dmic_init(AudioRate_Typedef Audio_Rate);
+/**
+ * 	@brief     audio USB init function, config the speed of DMIC and downsample audio data to required speed.
+ *            actually audio data is dmic_speed/d_samp.
+ * 	@param[in] Audio_Rate - set the DMIC speed. such as 1 indicate 1M and 2 indicate 2M.
+ * 	@return    none.
+ */
+void audio_usb_init(AudioRate_Typedef Audio_Rate);
+
+/**
+ * @brief     audio buff init function, config the speed of DMIC and downsample audio data to required speed.
+ *            actually audio data is dmic_speed/d_samp.
+ * @param[in] Audio_Rate  - audio rate.
+ * @return    none.
+ */
+void audio_buff_init(AudioRate_Typedef Audio_Rate);
+
+/**
+ * 	@brief     audio I2S init in function, config the speed of i2s and MCLK to required speed.
+ * 	@param[in] none.
+ * 	@return    none.
+ */
+void audio_i2s_init(void);
+
+
+/**
+*	@brief	   sdm setting function, enable or disable the sdm output, configure SDM output paramaters.
+*	@param[in]  OutPin - SDM Output pin.
+*	@param[in]	InType -	  SDM input type, such as AMIC,DMIC,I2S_IN,USB_IN.
+*	@param[in]	Audio_Rate - audio sampling rate, such as 16K,32k etc.
+*	@param[in]	audio_out_en - audio output enable or disable set, '1' enable audio output; '0' disable output.
+*	@return	none
+*/
+void audio_set_sdm_output(Audio_SDM_OutPut_Pin OutPin,AudioInput_Typedef InType,AudioRate_Typedef Audio_Rate,unsigned char audio_out_en);
+
+/**
+ * @brief     This function servers to set USB input/output.
+ * @param[in] none.
+ * @return    none.
+ */
+void audio_set_usb_output(void);
+
+/**
+ * 	@brief	   	i2s setting function, enable or disable the i2s output, configure i2s output paramaters
+ * 	@param[in] 	InType		- select audio input type including amic ,dmic ,i2s and usb
+ * 	@param[in] 	Audio_Rate 	- select audio rate, which will decide on which adc sampling rate and relative decimation configuration will be chosen.
+ * 	@return	  	none
+ */
+void audio_set_i2s_output(AudioInput_Typedef InType,AudioRate_Typedef Audio_Rate);
+
+/**
+ * 	@brief     This function serves to set I2S input.
+ * 	@param[in] i2c_pin_group - select the pin for I2S.
+ * 	@param[in] CodecMode - select I2S mode.
+ * 	@param[in] sysclk - system clock.
+ * 	@return    none.
+ */
+
+void audio_set_codec(I2C_GPIO_SdaTypeDef sda_pin,I2C_GPIO_SclTypeDef scl_pin, CodecMode_Typedef CodecMode, unsigned int sysclk);
+
+/**
+ * 	@brief     This function serves to set MUTE PGA.
+ * 	@param[in] ebable - enable or disable MUTE PGA
+ * 	@return    none.
+ */
+static inline void audio_set_mute_pga(unsigned char enable)
+{
+	if(!enable)
+	{
+		analog_write(codec_ana_cfg2,analog_read(codec_ana_cfg2) | BIT(5));
+	}
+	else
+	{
+		analog_write(codec_ana_cfg2,analog_read(codec_ana_cfg2) & ~BIT(5));//0a//2a
+	}
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/bsp.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/bsp.h
new file mode 100644
index 00000000..49eb71ef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/bsp.h
@@ -0,0 +1,117 @@
+/********************************************************************************************************
+ * @file    bsp.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef BSP_H_
+#define BSP_H_
+
+
+
+/**
+ *  Reg operations
+ */
+#define REG_BASE_ADDR			0x800000
+
+#define REG_ADDR8(a)			(*(volatile unsigned char*) (REG_BASE_ADDR + (a)))
+#define REG_ADDR16(a)			(*(volatile unsigned short*)(REG_BASE_ADDR + (a)))
+#define REG_ADDR32(a)			(*(volatile unsigned long*) (REG_BASE_ADDR + (a)))
+
+#define write_reg8(addr,v)		(*(volatile unsigned char*)  (REG_BASE_ADDR + (addr)) = (unsigned char)(v))
+#define write_reg16(addr,v)		(*(volatile unsigned short*) (REG_BASE_ADDR + (addr)) = (unsigned short)(v))
+#define write_reg32(addr,v)		(*(volatile unsigned long*)  (REG_BASE_ADDR + (addr)) = (v))
+
+#define read_reg8(addr)			(*(volatile unsigned char*) (REG_BASE_ADDR + (addr)))
+#define read_reg16(addr)		(*(volatile unsigned short*)(REG_BASE_ADDR + (addr)))
+#define read_reg32(addr)		(*(volatile unsigned long*) (REG_BASE_ADDR + (addr)))
+
+#define WRITE_REG8				write_reg8
+#define WRITE_REG16				write_reg16
+#define WRITE_REG32				write_reg32
+
+#define READ_REG8				read_reg8
+#define READ_REG16				read_reg16
+#define READ_REG32				read_reg32
+
+#define TCMD_UNDER_BOTH			0xc0
+#define TCMD_UNDER_RD			0x80
+#define TCMD_UNDER_WR			0x40
+
+#define TCMD_MASK				0x3f
+
+#define TCMD_WRITE				0x3
+#define TCMD_WAIT				0x7
+#define TCMD_WAREG				0x8
+
+
+/**
+ *  command table for special registers
+ */
+typedef struct TBLCMDSET {
+	unsigned short	adr;
+	unsigned char	dat;
+	unsigned char	cmd;
+} TBLCMDSET;
+
+/**
+ * @brief      This function performs a series of operations of writing digital or analog registers
+ *             according to a command table
+ * @param[in]  pt - pointer to a command table containing several writing commands
+ * @param[in]  size  - number of commands in the table
+ * @return     number of commands are carried out
+ */
+
+extern int LoadTblCmdSet(const TBLCMDSET * pt, int size);
+
+
+/**
+ * @brief      This function writes a byte data to analog register
+ * @param[in]  addr - the address of the analog register needs to write
+ * @param[in]  value  - the data will be written to the analog register
+ * @param[in]  e - the end address of value
+ * @param[in]  s - the start address of the value
+ * @return     none
+ */
+extern void sub_wr_ana(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+
+/**
+ * @brief      This function writes a byte data to a specified analog register
+ * @param[in]  addr - the address of the analog register needs to write
+ * @param[in]  value  - the data will be written to the analog register
+ * @param[in]  e - the end address of value
+ * @param[in]  s - the start address of the value
+ * @return     none
+ */
+extern void sub_wr(unsigned int addr, unsigned char value, unsigned char e, unsigned char s);
+
+/**
+ * @brief      This function reboot mcu.
+ * @return     none
+ */
+static inline void mcu_reset(void)
+{
+	write_reg8(0x06f,0x20);
+}
+
+
+#endif /* BSP_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/clock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/clock.h
new file mode 100644
index 00000000..d19b2942
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/clock.h
@@ -0,0 +1,163 @@
+/********************************************************************************************************
+ * @file    clock.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+#define 	_ASM_NOP_			asm("tnop")
+
+/**
+ * @brief  instruction delay.
+ */
+#define		CLOCK_DLY_1_CYC    _ASM_NOP_
+#define		CLOCK_DLY_2_CYC    _ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_3_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_4_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_5_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_6_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_7_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_8_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_9_CYC    _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define		CLOCK_DLY_10_CYC   _ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+
+/**
+ * @brief select RC as system clock
+ */
+#ifndef SYSCLK_RC_CLOCK_EN
+#define SYSCLK_RC_CLOCK_EN			0
+#endif
+
+extern unsigned char system_clk_type;
+extern unsigned char system_clk_mHz;
+
+/**
+ * @brief 	external XTAL type,
+ * 			0- 24M , 1-48M
+ */
+#define  CLK_48M_XTAL_EN   			0
+
+#define  VULTURE_A0   				0
+/**
+ * @brief 	Power type for different application
+ */
+typedef enum{
+	LDO_MODE 		=0x40,	//LDO mode
+	DCDC_LDO_MODE	=0x41,	//DCDC_LDO mode
+	DCDC_MODE		=0x43,	//DCDC mode (16pin is not suported this mode.)
+}POWER_MODE_TypeDef;
+/**
+ * @brief 	crystal for different application
+ */
+typedef enum{
+	EXTERNAL_XTAL_24M	= 0,
+	EXTERNAL_XTAL_48M	= 1,
+}XTAL_TypeDef;
+
+/**
+ * @brief system clock type.
+ */
+typedef enum{
+	SYS_CLK_12M_Crystal = 0x44,
+	SYS_CLK_16M_Crystal = 0x43,
+	SYS_CLK_24M_Crystal = 0x42,
+	SYS_CLK_32M_Crystal = 0x60,
+	SYS_CLK_48M_Crystal = 0x20,
+
+	SYS_CLK_RC_THRES = 0x10,
+
+//	SYS_CLK_24M_RC 	 = 0x00,
+//	SYS_CLK_32M_RC 	 = 0x01,
+//	SYS_CLK_48M_RC 	 = 0x02,
+}SYS_CLK_TypeDef;
+
+/**
+ * @brief 32K clock type.
+ */
+
+typedef enum{
+	CLK_32K_RC   =0,
+	CLK_32K_XTAL =1,
+}CLK_32K_TypeDef;
+
+/**
+ * @brief       This function to select the system clock source.
+ * @param[in]   SYS_CLK - the clock source of the system clock.
+ * @return      none
+ */
+void clock_init(SYS_CLK_TypeDef SYS_CLK);
+
+/**
+ * @brief       This function to get the system clock source.
+ * @param[in]   none
+ * @return      system clock source
+ */
+
+static inline int clock_get_system_clk(void)
+{
+	return system_clk_type;
+}
+
+/**
+ * @brief   This function serves to set 32k clock source.
+ * @param   variable of 32k type.
+ * @return  none.
+ */
+void clock_32k_init(CLK_32K_TypeDef src);
+
+/**
+ * @brief     This function performs to select 24M as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_24m_cal(void);
+
+/**
+ * @brief     This function performs to select 48M RC as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_48m_cal(void);
+
+/**
+ * @brief     This function performs to select 32K as the system clock source.
+ * @param[in] none.
+ * @return    none.
+ */
+void rc_32k_cal(void);
+
+/**
+ * @brief     This function performs to select 24M/2 RC as source of DMIC.
+ * @param[in] source clock to provide DMIC.
+ * @return    none.
+ */
+void dmic_prob_48M_rc(void);
+
+/**
+ * @brief   	This function serves to kick external crystal.
+ * @param[in]   times - the frequency of being kicked by pwm.
+ * @return  	0-kick success; 1-kick fail.
+ */
+unsigned char pwm_kick_32k_pad_times(unsigned int times);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dfifo.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dfifo.h
new file mode 100644
index 00000000..f467b0b3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dfifo.h
@@ -0,0 +1,118 @@
+/********************************************************************************************************
+ * @file    dfifo.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef 	DFIFO_H
+#define 	DFIFO_H
+
+#include "register.h"
+
+
+/**
+ * @brief      This function performs to enable audio input of DFIFO2.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void dfifo_enable_dfifo2(void)
+{
+	reg_dfifo_mode |= FLD_AUD_DFIFO2_IN;
+}
+
+/**
+ * @brief      This function performs to disable audio input of DFIFO2.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void dfifo_disable_dfifo2(void)
+{
+	reg_dfifo_mode &= ~FLD_AUD_DFIFO2_IN;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO0.
+ * @param[in]  pbuff - address in DFIFO0.
+ * @param[in]  size_buff - depth of DFIFO0.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo0(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo0_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo0_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO1.
+ * @param[in]  pbuff - address in DFIFO1.
+ * @param[in]  size_buff - depth of DFIFO1.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo1(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo1_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo1_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to start w/r data into/from DFIFO2.
+ * @param[in]  pbuff - address in DFIFO2.
+ * @param[in]  size_buff - depth of DFIFO2.
+ * @return     none.
+ */
+static inline void dfifo_set_dfifo2(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo2_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo2_size = (size_buff>>4)-1;
+}
+
+/**
+ * @brief      This function performs to set MISC channel.
+ * @param[in]  pbuff - address in FIFO2.
+ * @param[in]  size_buff - depth of FIFO2.
+ * @return     none.
+ */
+static inline void adc_config_misc_channel_buf(unsigned short* pbuff,unsigned int size_buff)
+
+{
+	reg_dfifo_misc_chn_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo_misc_chn_size = (size_buff>>4)-1;
+
+	reg_dfifo2_wptr = 0;  //clear dfifo2 write pointer
+}
+
+/**
+ * @brief     configure the mic buffer's address and size
+ * @param[in] pbuff - the first address of SRAM buffer to store MIC data.
+ * @param[in] size_buff - the size of pbuff.
+ * @return    none
+ */
+
+static inline void audio_config_mic_buf(unsigned short* pbuff,unsigned int size_buff)
+{
+	reg_dfifo_audio_addr = (unsigned short)((unsigned int)pbuff);
+	reg_dfifo_audio_size = (size_buff>>4)-1;
+}
+
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dma.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dma.h
new file mode 100644
index 00000000..66276ff7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/dma.h
@@ -0,0 +1,161 @@
+/********************************************************************************************************
+ * @file    dma.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef DMA_H_
+#define DMA_H_
+
+#include "register.h"
+
+
+#define DMA_RFRX_LEN_HW_INFO				0	// 826x: 8
+#define DMA_RFRX_OFFSET_HEADER				4	// 826x: 12
+#define DMA_RFRX_OFFSET_RFLEN				5   // 826x: 13
+#define DMA_RFRX_OFFSET_DATA				6	// 826x: 14
+
+
+#define DMA_RFRX_OFFSET_CRC24(p)			(p[DMA_RFRX_OFFSET_RFLEN]+6)  //data len:3
+#define DMA_RFRX_OFFSET_TIME_STAMP(p)		(p[DMA_RFRX_OFFSET_RFLEN]+9)  //data len:4
+#define DMA_RFRX_OFFSET_FREQ_OFFSET(p)		(p[DMA_RFRX_OFFSET_RFLEN]+13) //data len:2
+#define DMA_RFRX_OFFSET_RSSI(p)				(p[DMA_RFRX_OFFSET_RFLEN]+15) //data len:1, signed
+
+
+
+#define	RFDMA_RX_DISABLE		(reg_dma_chn_en &= (~FLD_DMA_CHN_RF_RX))
+#define	RFDMA_RX_ENABLE			(reg_dma_chn_en |= (FLD_DMA_CHN_RF_RX))
+
+#define	RFDMA_TX_DISABLE		(reg_dma_chn_en &= (~FLD_DMA_CHN_RF_TX))
+#define	RFDMA_TX_ENABLE			(reg_dma_chn_en |= (FLD_DMA_CHN_RF_TX))
+
+
+typedef enum{
+	DMA0_UART_RX,
+	DMA1_UART_TX,
+	DMA2_RF_RX,
+	DMA3_RF_TX,
+	DMA4_AES_DECO,
+	DMA5_AES_CODE,
+	DMA6,
+	DMA7_PWM,
+}DMA_chn_Typdef; 
+
+/**
+ * @brief     This function resets the DMA module.
+ * @param[in] none
+ * @return    none
+ */
+static inline void dma_reset(void)
+{
+	reg_rst1 |= FLD_RST1_DMA;
+	reg_rst1 &= (~FLD_RST1_DMA);
+}
+/**
+ * @brief     This function performs to enable DMA.
+ * @param[in] msk - variable to config.
+ * @return    none.
+ */
+static inline void dma_irq_enable(unsigned int msk)
+{
+	reg_dma_chn_irq_msk |= msk;
+}
+
+/**
+ * @brief     This function performs to enable DMA.
+ * @param[in] msk - variable to config.
+ * @return    none.
+ */
+static inline void dma_irq_disable(unsigned int msk)
+{
+	reg_dma_chn_irq_msk &= ~msk;
+}
+
+/**
+ * @brief     This function performs to enable DMA chnnel.
+ * @param[in] en - en: 1 enable. 0 disable.
+ * @return    none.
+ */
+
+static inline void dma_chn_enable(unsigned char chn, unsigned int en)
+{
+	if(en){
+		reg_dma_chn_en |= chn;
+	}
+	else{
+		reg_dma_chn_en &= ~chn;
+	}
+}
+
+/**
+ * @brief     This function performs to enable DMA interrupt.
+ * @param[in] chn - variable to config the DMA interrupt channel.
+ * @param[in] en - en: 1 enable. 0 disable.
+ * @return    none.
+ */
+
+static inline void dma_chn_irq_enable(unsigned char chn, unsigned int en)
+{
+	reg_dma_irq_status = chn;
+
+	if(en){
+		reg_dma_chn_en |= chn;
+		reg_dma_chn_irq_msk |= chn;
+	}
+	else{
+		reg_dma_chn_en &= ~chn;
+		reg_dma_chn_irq_msk &= ~chn;
+	}
+}
+
+/**
+ * @brief      Clear IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline void dma_chn_irq_status_clr(unsigned char irq_status)
+{
+	reg_dma_irq_status = irq_status;
+}
+
+
+/**
+ * @brief      Get IRQ status of uart.
+ * @param[in]  irq_src - select tx or rx irq.
+ * @return     none
+ */
+static inline unsigned char dma_chn_irq_status_get(void)
+{
+    return reg_dma_irq_status;
+}
+
+/**
+ * @brief      This function serves to set the size of dma buffer
+ * @param[in]  size - select tx or rx irq. caution: max size = 2048
+ * @return     none
+ */
+static inline void dma_set_buff_size(DMA_chn_Typdef chn,unsigned int size)
+{
+	reg_dma_size(chn) = (unsigned char)(size/16);
+}
+
+#endif /* DMA_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/driver_8278.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/driver_8278.h
new file mode 100644
index 00000000..1c3c4df6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/driver_8278.h
@@ -0,0 +1,53 @@
+/********************************************************************************************************
+ * @file    driver_8278.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "bsp.h"
+#include "register.h"
+#include "analog.h"
+#include "clock.h"
+#include "timer.h"
+#include "irq.h"
+#include "dfifo.h"
+#include "watchdog.h"
+#include "dma.h"
+#include "aes.h"
+#include "gpio.h"
+#include "adc.h"
+#include "random.h"
+#include "pwm.h"
+#include "audio.h"
+#include "flash.h"
+#include "i2c.h"
+#include "spi.h"
+#include "uart.h"
+#include "usbhw.h"
+#include "rf_drv.h"
+#include "emi.h"
+#include "pm.h"
+#include "pke.h"
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/emi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/emi.h
new file mode 100644
index 00000000..a42a726f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/emi.h
@@ -0,0 +1,180 @@
+/********************************************************************************************************
+ * @file    emi.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef EMI_H_
+#define EMI_H_
+
+#include "rf_drv.h"
+
+
+/**
+ * @brief   This function serves to set singletone power.
+ * @param   level - the power level.
+ * @return  none.
+ */
+void rf_set_power_level_index_singletone (RF_PowerTypeDef level);
+
+/**
+ * @brief   This function serves to set singletone power and channel.
+ * @param   power_level - the power level.
+ * @param   rf_chn - the channel.
+ * @return  none.
+ */
+void rf_emi_single_tone(RF_PowerTypeDef power_level,signed char rf_chn);
+
+
+/**
+ * @brief   This function serves to close RF
+ * @param   none.
+ * @return  none.
+ */
+void rf_emi_stop(void);
+
+/**
+ * @brief   This function serves to set rx mode and channel.
+ * @param   mode - mode of RF
+ * @param   rf_chn - the rx channel.
+ * @return  none.
+ */
+void rf_emi_rx(RF_ModeTypeDef mode,signed char rf_chn);
+/**
+ * @brief   This function serves is receiving service program
+ * @param   none.
+ * @return  none.
+ */
+void rf_emi_rx_loop(void);
+
+/**
+ * @brief   This function serves to get the number of packets received
+ * @param   none.
+ * @return  the number of packets received.
+ */
+unsigned int rf_emi_get_rxpkt_cnt(void);
+
+/**
+ * @brief   This function serves to get the RSSI of packets received
+ * @param   none.
+ * @return  the RSSI of packets received.
+ */
+char rf_emi_get_rssi_avg(void);
+
+/**
+ * @brief   This function serves to get the address of the received packets
+ * @param   none.
+ * @return  the address of the received packets
+ */
+unsigned char *rf_emi_get_rxpkt(void);
+
+/**
+ * @brief   This function serves to continue to send CD mode.
+ * @param   none.
+ * @return  none.
+ */
+void rf_continue_mode_run(void);
+
+
+
+
+/**
+ * @brief   This function serves to init the CD mode.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_continue_setup(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+
+
+
+/**
+ * @brief   This function serves to init the burst mode.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_setup(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to init the burst mode with PA ramp up/down.
+ * @param   rf_mode - mode of RF.
+ * @param   power_level - power level of RF.
+ * @param   rf_chn - channel of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_brust_setup_ramp(RF_ModeTypeDef rf_mode,RF_PowerTypeDef power_level,signed char rf_chn,unsigned char pkt_type);
+
+
+
+
+/**
+ * @brief   This function serves to send packets in the burst mode with PA ramp up/down.
+ * @param   rf_mode - mode of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_loop_ramp(RF_ModeTypeDef rf_mode,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to send packets in the burst mode
+ * @param   rf_mode - mode of RF.
+ * @param 	pkt_type - The type of data sent
+ * 					   0:random data
+ * 					   1:0xf0
+ * 					   2:0x55
+ * @return  none.
+ */
+void rf_emi_tx_burst_loop(RF_ModeTypeDef rf_mode,unsigned char pkt_type);
+
+/**
+ * @brief   This function serves to set the channel in singletone mode.
+ * @param   chn - channel of RF.
+ * @return  none.
+ */
+void rf_set_channel_singletone (signed char chn);
+
+/**
+ * @brief   This function serves to generate random number.
+ * @param   the old random number.
+ * @return  the new random number.
+ */
+unsigned int pnGen(unsigned int state);
+#endif /* EMI_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.c
new file mode 100644
index 00000000..856ff7d5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.c
@@ -0,0 +1,428 @@
+/********************************************************************************************************
+ * @file    flash.c
+ *
+ * @brief   This is the source file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "flash.h"
+#include "spi_i.h"
+#include "irq.h"
+#include "timer.h"
+#include "string.h"
+#include "analog.h"
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function to determine whether the flash is busy..
+ * @return		1:Indicates that the flash is busy. 0:Indicates that the flash is free
+ */
+_attribute_ram_code_sec_ static inline int flash_is_busy(void){
+	return mspi_read() & 0x01;				//  the busy bit, pls check flash spec
+}
+
+/**
+ * @brief		This function serves to set flash write command.
+ * @param[in]	cmd	- set command.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_cmd(unsigned char cmd){
+	mspi_high();
+	sleep_us(1);
+	mspi_low();
+	mspi_write(cmd);
+	mspi_wait();
+}
+
+/**
+ * @brief		This function serves to send flash address.
+ * @param[in]	addr	- the flash address.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_send_addr(unsigned int addr){
+	mspi_write((unsigned char)(addr>>16));
+	mspi_wait();
+	mspi_write((unsigned char)(addr>>8));
+	mspi_wait();
+	mspi_write((unsigned char)(addr));
+	mspi_wait();
+}
+
+/**
+ * @brief     This function serves to wait flash done.(make this a asynchorous version).
+ * @return    none.
+ */
+_attribute_ram_code_sec_noinline_ static void flash_wait_done(void)
+{
+	sleep_us(100);
+	flash_send_cmd(FLASH_READ_STATUS_CMD_LOWBYTE);
+
+	int i;
+	for(i = 0; i < 10000000; ++i){
+		if(!flash_is_busy()){
+			break;
+		}
+	}
+	mspi_high();
+}
+
+/**
+ * @brief 		This function is used to read data from flash or read the status of flash.
+ * @param[in]   cmd			- the read command.
+ * @param[in]   addr		- starting address.
+ * @param[in]   addr_en		- whether need to send an address.
+ * @param[in]   dummy_cnt	- the length(in byte) of dummy.
+ * @param[out]  data		- the start address of the data buffer.
+ * @param[in]   data_len	- the length(in byte) of content needs to read out.
+ * @return 		none.
+ */
+_attribute_ram_code_sec_noinline_ void flash_mspi_read_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char dummy_cnt, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		flash_send_addr(addr);
+	}
+	for(int i = 0; i < dummy_cnt; ++i)
+	{
+		mspi_write(0x00);		/* dummy */
+		mspi_wait();
+	}
+	mspi_write(0x00);			/* to issue clock */
+	mspi_wait();
+	mspi_ctrl_write(0x0a);		/* auto mode */
+	mspi_wait();
+	for(int i = 0; i < data_len; ++i)
+	{
+		*data++ = mspi_get();
+		mspi_wait();
+	}
+	mspi_high();
+
+	irq_restore(r);
+}
+
+/**
+ * @brief 		This function is used to write data or status to flash.
+ * @param[in]   cmd			- the write command.
+ * @param[in]   addr		- starting address.
+ * @param[in]   addr_en		- whether need to send an address.
+ * @param[out]  data		- the start address of the data buffer.
+ * @param[in]   data_len	- the length(in byte) of content needs to read out.
+ * @return 		none.
+ * @note		important:  "data" must not reside at flash, such as constant string.If that case, pls copy to memory first before write.
+ */
+_attribute_ram_code_sec_noinline_ void flash_mspi_write_ram(unsigned char cmd, unsigned long addr, unsigned char addr_en, unsigned char *data, unsigned long data_len)
+{
+	unsigned char r = irq_disable();
+
+	flash_send_cmd(FLASH_WRITE_ENABLE_CMD);
+	flash_send_cmd(cmd);
+	if(addr_en)
+	{
+		flash_send_addr(addr);
+	}
+	for(int i = 0; i < data_len; ++i)
+	{
+		mspi_write(data[i]);
+		mspi_wait();
+	}
+	mspi_high();
+	flash_wait_done();
+
+	irq_restore(r);
+}
+
+/**
+ * @brief 		This function serves to erase a sector.
+ * @param[in]   addr	- the start address of the sector needs to erase.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr)
+{
+	flash_mspi_write_ram(FLASH_SECT_ERASE_CMD, addr, 1, NULL, 0);
+}
+
+/**
+ * @brief 		This function reads the content from a page to the buf.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_mspi_read_ram(FLASH_READ_CMD, addr, 1, 0, buf, len);
+}
+
+/**
+ * @brief 		This function writes the buffer's content to the flash.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	unsigned int ns = PAGE_SIZE - (addr&(PAGE_SIZE - 1));
+	int nw = 0;
+
+	do{
+		nw = len > ns ? ns :len;
+		flash_mspi_write_ram(FLASH_WRITE_CMD, addr, 1, buf, nw);
+		ns = PAGE_SIZE;
+		addr += nw;
+		buf += nw;
+		len -= nw;
+	}while(len > 0);
+}
+
+/**
+ * @brief		This function reads the status of flash.
+ * @param[in] 	cmd	- the cmd of read status.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(unsigned char cmd)
+{
+	unsigned char status = 0;
+	flash_mspi_read_ram(cmd, 0, 0, 0, &status, 1);
+	return status;
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	type	- the type of status.8 bit or 16 bit.
+ * @param[in]  	data	- the value of status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data)
+{
+	unsigned char buf[2];
+
+	buf[0] = data;
+	buf[1] = data>>8;
+	if(type == FLASH_TYPE_8BIT_STATUS){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 1);
+	}else if(type == FLASH_TYPE_16BIT_STATUS_ONE_CMD){
+		flash_mspi_write_ram(FLASH_WRITE_STATUS_CMD_LOWBYTE, 0, 0, buf, 2);
+	}
+}
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * 				you must read MID of flash. and then you can look up the related table to select
+ * 				the idcmd and read UID of flash.
+ * @return    	MID of the flash(4 bytes).
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void)
+{
+	unsigned int flash_mid = 0;
+	flash_mspi_read_ram(FLASH_GET_JEDEC_ID, 0, 0, 0, (unsigned char*)(&flash_mid), 3);
+	return flash_mid;
+}
+
+/**
+ * @brief	  	This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * 				and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] 	idcmd	- different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A.
+ * @param[in] 	buf		- store UID of flash.
+ * @return    	none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf)
+{
+	if(idcmd == FLASH_READ_UID_CMD_GD_PUYA_ZB_UT)	//< GD/PUYA/ZB/UT
+	{
+		flash_mspi_read_ram(idcmd, 0x00, 1, 1, buf, 16);
+	}
+	else if (idcmd == FLASH_XTX_READ_UID_CMD)		//< XTX
+	{
+		flash_mspi_read_ram(idcmd, 0x80, 1, 1, buf, 16);
+	}
+}
+
+/*******************************************************************************************************************
+ *												Secondary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out]	flash_mid	- Flash Manufacturer ID.
+ * @param[out]	flash_uid	- Flash Unique ID.
+ * @return		0: flash no uid or not a known flash model 	 1:the flash model is known and the uid is read.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid)
+{
+	unsigned char no_uid[16]={0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01,0x51,0x01};
+	int i,f_cnt=0;
+	*flash_mid  = flash_read_mid();
+
+	/*
+	 * If add flash type, need pay attention to the read uid cmd and the bir number of status register
+	   Flash Type	CMD			MID		Company
+	   GD25LD10C	0x4b(AN)0x1160C8	GD
+	   GD25LD40C	0x4b	0x1360C8	GD
+	   GD25LD80C	0x4b(AN)0x1460C8	GD
+	   ZB25WD10A	0x4b	0x11325E	ZB
+	   ZB25WD40B	0x4b	0x13325E	ZB
+	   ZB25WD80B	0x4b	0x14325E	ZB
+	   ZB25WD20A	0x4b	0x12325E	ZB	The actual capacity is 256K, but the nominal value is 128KB.
+											The software cannot do capacity adaptation and requires special customer special processing.
+
+	   The uid of the early ZB25WD40B (mid is 0x13325E) is 8 bytes. If you read 16 bytes of uid,
+	   the next 8 bytes will be read as 0xff. Later, the uid of ZB25WD40B has been switched to 16 bytes.
+	 */
+	if((*flash_mid == 0x1160C8)||(*flash_mid == 0x1360C8)||(*flash_mid == 0x1460C8)||(*flash_mid == 0x11325E)||(*flash_mid == 0x12325E)||(*flash_mid == 0x13325E)||(*flash_mid == 0x14325E)){
+		flash_read_uid(FLASH_READ_UID_CMD_GD_PUYA_ZB_UT, (unsigned char *)flash_uid);
+	}else{
+		return 0;
+	}
+
+	for(i=0;i<16;i++){
+		if(flash_uid[i] == no_uid[i]){
+			f_cnt++;
+		}
+	}
+
+	if(f_cnt == 16){	//no uid flash
+		return 0;
+	}else{
+		return 1;
+	}
+}
+
+/**
+ * @brief		This function serves to find whether it is zb flash.
+ * @param[in]	none.
+ * @return		1 - is zb flash;   0 - is not zb flash.
+ */
+unsigned char flash_is_zb(void)
+{
+	unsigned int flash_mid  = flash_read_mid();
+	if((flash_mid == 0x13325E)||(flash_mid == 0x14325E)||(flash_mid == 0x11325E)||(flash_mid == 0x12325E))
+	{
+		return 1;
+	}
+	return 0;
+}
+
+/**
+ * @brief		This function serves to calibration the flash voltage(VDD_F),if the flash has the calib_value,we will use it,either will
+ * 				trim vdd_f to 1.95V(2b'111 the max) if the flash is zb.
+ * @param[in]	vol - the voltage which you want to set.
+ * @return		none.
+ */
+void flash_vdd_f_calib(void)
+{
+	unsigned short calib_value = flash_get_vdd_f_calib_value();
+	if((0xffff == calib_value) || (0 != (calib_value & 0xf8f8)))
+	{
+		if(flash_is_zb())
+		{
+			analog_write(0x09, ((analog_read(0x09) & 0x8f) | (FLASH_VOLTAGE_1V95 << 4)));    //ldo mode flash ldo trim 1.95V
+			analog_write(0x0c, ((analog_read(0x0c) & 0xf8) | FLASH_VOLTAGE_1V9));			 //dcdc mode flash ldo trim 1.90V
+		}
+	}
+	else
+	{
+		analog_write(0x09, ((analog_read(0x09) & 0x8f)  | ((calib_value & 0xff00) >> 4) ));
+		analog_write(0x0c, ((analog_read(0x0c) & 0xf8)  | (calib_value & 0xff)));
+	}
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.h
new file mode 100644
index 00000000..e859a502
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/flash.h
@@ -0,0 +1,271 @@
+/********************************************************************************************************
+ * @file    flash.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "compiler.h"
+
+
+#define PAGE_SIZE		256
+
+/**
+ * @brief     flash command definition
+ */
+enum{
+	//common cmd
+	FLASH_WRITE_CMD						=	0x02,
+	FLASH_READ_CMD						=	0x03,
+
+	FLASH_SECT_ERASE_CMD				=	0x20,
+
+	FLASH_READ_UID_CMD_GD_PUYA_ZB_UT	=	0x4B,	//Flash Type = GD/PUYA/ZB/UT
+	FLASH_READ_UID_CMD_XTX				=	0x5A,	//Flash Type = XTX
+
+	FLASH_GET_JEDEC_ID					=	0x9F,
+
+	//special cmd
+	FLASH_WRITE_STATUS_CMD_LOWBYTE		=	0x01,
+	FLASH_WRITE_STATUS_CMD_HIGHBYTE		=	0x31,
+
+	FLASH_READ_STATUS_CMD_LOWBYTE		=	0x05,
+	FLASH_READ_STATUS_CMD_HIGHBYTE		=	0x35,
+
+	FLASH_WRITE_DISABLE_CMD 			= 	0x04,
+	FLASH_WRITE_ENABLE_CMD 				= 	0x06,
+
+};
+
+/**
+ * @brief     flash status type definition
+ */
+typedef enum{
+	FLASH_TYPE_8BIT_STATUS   			= 0,
+	FLASH_TYPE_16BIT_STATUS_ONE_CMD  	= 1,
+	FLASH_TYPE_16BIT_STATUS_TWO_CMD  	= 2,
+}flash_status_typedef_e;
+
+/**
+ * @brief     flash uid cmd definition
+ */
+typedef enum{
+	FLASH_UID_CMD_GD_PUYA   = 0x4b,
+	FLASH_XTX_READ_UID_CMD	= 0x5A,
+}flash_uid_cmddef_e;
+
+/**
+ * @brief	flash capacity definition
+ *			Call flash_read_mid function to get the size of flash capacity.
+ *			Example is as follows:
+ *			unsigned int mid = flash_read_mid();
+ *			The value of (mid&0x00ff0000)>>16 reflects flash capacity.
+ */
+typedef enum {
+    FLASH_SIZE_64K     = 0x10,
+    FLASH_SIZE_128K    = 0x11,
+    FLASH_SIZE_256K    = 0x12,
+    FLASH_SIZE_512K    = 0x13,
+    FLASH_SIZE_1M      = 0x14,
+    FLASH_SIZE_2M      = 0x15,
+    FLASH_SIZE_4M      = 0x16,
+    FLASH_SIZE_8M      = 0x17,
+} Flash_CapacityDef;
+
+/**
+ * @brief	flash voltage definition
+ */
+typedef enum {
+    FLASH_VOLTAGE_1V95     = 0x07,
+    FLASH_VOLTAGE_1V9      = 0x06,
+    FLASH_VOLTAGE_1V85     = 0x05,
+    FLASH_VOLTAGE_1V8      = 0x04,
+    FLASH_VOLTAGE_1V75     = 0x03,
+    FLASH_VOLTAGE_1V7      = 0x02,
+    FLASH_VOLTAGE_1V65     = 0x01,
+    FLASH_VOLTAGE_1V6      = 0x00,
+} Flash_VoltageDef;
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief 		This function serves to erase a sector.
+ * @param[in]   addr	- the start address of the sector needs to erase.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_sector(unsigned long addr);
+
+/**
+ * @brief 		This function reads the content from a page to the buf.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_page(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function writes the buffer's content to the flash.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_page(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * 				you must read MID of flash. and then you can look up the related table to select
+ * 				the idcmd and read UID of flash
+ * @return    	MID of the flash.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned int flash_read_mid(void);
+
+/**
+ * @brief	  	This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * 				and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] 	idcmd	- different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A
+ * @param[in] 	buf		- store UID of flash.
+ * @return    	none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_uid(unsigned char idcmd, unsigned char *buf);
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out]	flash_mid	- Flash Manufacturer ID.
+ * @param[out]	flash_uid	- Flash Unique ID.
+ * @return		0: flash no uid or not a known flash model 	 1:the flash model is known and the uid is read.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+int flash_read_mid_uid_with_check( unsigned int *flash_mid, unsigned char *flash_uid);
+
+/**
+ * @brief		This function serves to find whether it is zb flash.
+ * @param[in]	none.
+ * @return		1 - is zb flash;   0 - is not zb flash.
+ */
+unsigned char flash_is_zb(void);
+
+/**
+ * @brief		This function serves to calibration the flash voltage(VDD_F),if the flash has the calib_value,we will use it,either will
+ * 				trim vdd_f to 1.95V(2b'111 the max) if the flash is zb.
+ * @param[in]	vol - the voltage which you want to set.
+ * @return		none.
+ */
+void flash_vdd_f_calib(void);
+
+
+/**
+ * @brief		This function serves to get the vdd_f calibration value.
+ * @param[in]	none.
+ * @return		none.
+ */
+static inline unsigned short flash_get_vdd_f_calib_value(void)
+{
+	unsigned int mid = flash_read_mid();
+	unsigned short flash_volatage = 0;
+	switch((mid & 0xff0000) >> 16)
+	{
+	case(FLASH_SIZE_64K):
+		flash_read_page(0xe1c0, 2, (unsigned char*)&flash_volatage);
+		break;
+	case(FLASH_SIZE_128K):
+		flash_read_page(0x1e1c0, 2, (unsigned char*)&flash_volatage);
+		break;
+	case(FLASH_SIZE_512K):
+		flash_read_page(0x771c0, 2, (unsigned char*)&flash_volatage);
+		break;
+	case(FLASH_SIZE_1M):
+		flash_read_page(0xfe1c0, 2, (unsigned char*)&flash_volatage);
+		break;
+	case(FLASH_SIZE_2M):
+		flash_read_page(0x1fe1c0, 2, (unsigned char*)&flash_volatage);
+		break;
+	default:
+		flash_volatage = 0xff;
+		break;
+	}
+	return flash_volatage;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio.h
new file mode 100644
index 00000000..4a484622
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio.h
@@ -0,0 +1,407 @@
+/********************************************************************************************************
+ * @file    gpio.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "register.h"
+#include "bsp.h"
+
+
+/**
+ *  @brief  Define GPIO types. 
+ */
+
+typedef enum{
+		GPIO_GROUPA    = 0x000,
+		GPIO_GROUPB    = 0x100,
+		GPIO_GROUPC    = 0x200,
+		GPIO_GROUPD    = 0x300,
+		GPIO_GROUPE    = 0x400,
+
+	    GPIO_PA0 = GPIO_GROUPA | BIT(0),//Because the IO of A0 has internal up, so its can't use for pull_down/pull_up function.This BUG will be fixed in next chip version. 
+		GPIO_PA1 = GPIO_GROUPA | BIT(1),
+		GPIO_PA2 = GPIO_GROUPA | BIT(2),
+		GPIO_PA3 = GPIO_GROUPA | BIT(3),
+		GPIO_PA4 = GPIO_GROUPA | BIT(4),
+		GPIO_PA5 = GPIO_GROUPA | BIT(5), 	GPIO_DM=GPIO_PA5,
+		GPIO_PA6 = GPIO_GROUPA | BIT(6),  GPIO_DP=GPIO_PA6,
+		GPIO_PA7 = GPIO_GROUPA | BIT(7), 	GPIO_SWS=GPIO_PA7,
+		GPIOA_ALL = GPIO_GROUPA | 0x00ff,
+
+		GPIO_PB0 = GPIO_GROUPB | BIT(0),
+		GPIO_PB1 = GPIO_GROUPB | BIT(1),
+		GPIO_PB2 = GPIO_GROUPB | BIT(2),
+		GPIO_PB3 = GPIO_GROUPB | BIT(3),
+		GPIO_PB4 = GPIO_GROUPB | BIT(4),
+		GPIO_PB5 = GPIO_GROUPB | BIT(5),
+		GPIO_PB6 = GPIO_GROUPB | BIT(6),
+		GPIO_PB7 = GPIO_GROUPB | BIT(7),
+
+		GPIO_PC0 = GPIO_GROUPC | BIT(0),
+		GPIO_PC1 = GPIO_GROUPC | BIT(1),
+		GPIO_PC2 = GPIO_GROUPC | BIT(2),
+		GPIO_PC3 = GPIO_GROUPC | BIT(3),
+		GPIO_PC4 = GPIO_GROUPC | BIT(4),
+		GPIO_PC5 = GPIO_GROUPC | BIT(5),
+		GPIO_PC6 = GPIO_GROUPC | BIT(6),
+		GPIO_PC7 = GPIO_GROUPC | BIT(7),
+
+		GPIO_PD0 = GPIO_GROUPD | BIT(0),//Because the IO of D0 has internal up, so its can't use for pull_down/pull_up function.This BUG will be fixed in next chip version. 
+		GPIO_PD1 = GPIO_GROUPD | BIT(1),//Because the IO of D1 has internal up, so its can't use for pull_down/pull_up function.This BUG will be fixed in next chip version. 
+		GPIO_PD2 = GPIO_GROUPD | BIT(2),
+		GPIO_PD3 = GPIO_GROUPD | BIT(3),
+		GPIO_PD4 = GPIO_GROUPD | BIT(4),
+		GPIO_PD5 = GPIO_GROUPD | BIT(5),
+		GPIO_PD6 = GPIO_GROUPD | BIT(6),
+		GPIO_PD7 = GPIO_GROUPD | BIT(7),//Because the IO of D7 has internal up, so its can't use for pull_down/pull_up function.This BUG will be fixed in next chip version. 
+
+		GPIO_PE0 = GPIO_GROUPE | BIT(0),  GPIO_MSDO=GPIO_PE0,
+		GPIO_PE1 = GPIO_GROUPE | BIT(1),  GPIO_MCLK=GPIO_PE1,
+		GPIO_PE2 = GPIO_GROUPE | BIT(2),  GPIO_MSCN=GPIO_PE2,
+		GPIO_PE3 = GPIO_GROUPE | BIT(3),  GPIO_MSDI=GPIO_PE3,
+
+		GPIO_ALL = 0x500,
+}GPIO_PinTypeDef;
+
+/**
+ *  @brief  Define GPIO Function types
+ */
+
+typedef enum{
+	AS_GPIO 	=  0,
+	AS_MSPI 	=  1,
+	AS_SWIRE	=  2,
+	AS_UART		=  3,
+	AS_I2C		=  4,
+	AS_SPI		=  5,
+	AS_I2S		=  6,
+	AS_AMIC		=  7,
+	AS_DMIC		=  8,
+	AS_SDM		=  9,
+	AS_USB		= 10,
+	AS_ADC		= 11,
+	AS_CMP		= 12,
+	AS_ATS		= 13,
+
+	AS_PWM0 	= 20,
+	AS_PWM1		= 21,
+	AS_PWM2 	= 22,
+	AS_PWM3		= 23,
+	AS_PWM4 	= 24,
+	AS_PWM5		= 25,
+	AS_PWM0_N	= 26,
+	AS_PWM1_N	= 27,
+	AS_PWM2_N	= 28,
+	AS_PWM3_N	= 29,
+	AS_PWM4_N	= 30,
+	AS_PWM5_N	= 31,
+}GPIO_FuncTypeDef;
+
+
+typedef enum{
+	Level_Low=0,
+	Level_High =1,
+}GPIO_LevelTypeDef;
+
+
+
+/**
+ *  @brief  Define rising/falling types
+ */
+typedef enum{
+	POL_RISING   = 0,  pol_rising = 0,
+	POL_FALLING  = 1,  pol_falling = 1,
+}GPIO_PolTypeDef;
+
+/**
+ *  @brief  Define pull up or down types
+ */
+typedef enum {
+	PM_PIN_UP_DOWN_FLOAT    = 0,
+	PM_PIN_PULLUP_1M     	= 1,
+	PM_PIN_PULLDOWN_100K  	= 2,
+	PM_PIN_PULLUP_10K 		= 3,
+}GPIO_PullTypeDef;
+
+
+/**
+ * @brief      This function servers to set the GPIO's function.
+ * @param[in]  pin - the special pin.
+ * @param[in]  func - the function of GPIO.
+ * @return     none.
+ */
+void gpio_set_func(GPIO_PinTypeDef pin, GPIO_FuncTypeDef func);
+
+/**
+ * @brief      This function set the output function of a pin.
+ * @param[in]  pin - the pin needs to set the output function
+ * @param[in]  value - enable or disable the pin's output function(0: disable, 1: enable)
+ * @return     none
+ */
+static inline void gpio_set_output_en(GPIO_PinTypeDef pin, unsigned int value)
+{
+	unsigned char	bit = pin & 0xff;
+	if(!value){
+		BM_SET(reg_gpio_oen(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_oen(pin), bit);
+	}
+}
+
+/**
+ * @brief      This function set the input function of a pin.
+ * @param[in]  pin - the pin needs to set the input function
+ * @param[in]  value - enable or disable the pin's input function(0: disable, 1: enable)
+ * @return     none
+ */
+void gpio_set_input_en(GPIO_PinTypeDef pin, unsigned int value);
+
+/**
+ * @brief      This function determines whether the output function of a pin is enabled.
+ * @param[in]  pin - the pin needs to determine whether its output function is enabled.
+ * @return     1: the pin's output function is enabled ;
+ *             0: the pin's output function is disabled
+ */
+static inline int gpio_is_output_en(GPIO_PinTypeDef pin)
+{
+	return !BM_IS_SET(reg_gpio_oen(pin), pin & 0xff);
+}
+
+/**
+ * @brief     This function determines whether the input function of a pin is enabled.
+ * @param[in] pin - the pin needs to determine whether its input function is enabled.
+ * @return    1: the pin's input function is enabled ;
+ *            0: the pin's input function is disabled
+ */
+static inline int gpio_is_input_en(GPIO_PinTypeDef pin)
+{
+	return BM_IS_SET(reg_gpio_ie(pin), pin & 0xff);
+}
+
+/**
+ * @brief     This function set the pin's output level.
+ * @param[in] pin - the pin needs to set its output level
+ * @param[in] value - value of the output level(1: high 0: low)
+ * @return    none
+ */
+static inline void gpio_write(GPIO_PinTypeDef pin, unsigned int value)
+{
+	unsigned char	bit = pin & 0xff;
+	if(value){
+		BM_SET(reg_gpio_out(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_out(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function read the pin's input/output level.
+ * @param[in] pin - the pin needs to read its level
+ * @return    the pin's level(1: high 0: low)
+ */
+static inline unsigned int gpio_read(GPIO_PinTypeDef pin)
+{
+	return BM_IS_SET(reg_gpio_in(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function read all the pins' input level.
+ * @param[out] p - the buffer used to store all the pins' input level
+ * @return     none
+ */
+static inline void gpio_read_all(unsigned char *p)
+{
+	p[0] = REG_ADDR8(0x580);
+	p[1] = REG_ADDR8(0x588);
+	p[2] = REG_ADDR8(0x590);
+	p[3] = REG_ADDR8(0x598);
+}
+
+/**
+ * @brief     This function set the pin toggle.
+ * @param[in] pin - the pin needs to toggle
+ * @return    none
+ */
+static inline void gpio_toggle(GPIO_PinTypeDef pin)
+{
+	reg_gpio_out(pin) ^= (pin & 0xFF);
+}
+
+/**
+ * @brief      This function set the pin's driving strength.
+ * @param[in]  pin - the pin needs to set the driving strength
+ * @param[in]  value - the level of driving strength(1: strong 0: poor)
+ * @return     none
+ */
+void gpio_set_data_strength(GPIO_PinTypeDef pin, unsigned int value);
+
+/**
+ * @brief     This function set a pin's pull-up/down resistor.
+ * @param[in] gpio - the pin needs to set its pull-up/down resistor
+ * @param[in] up_down - the type of the pull-up/down resistor
+ * @return    none
+ */
+void gpio_setup_up_down_resistor(GPIO_PinTypeDef gpio, GPIO_PullTypeDef up_down);
+
+/**
+ * @brief      This function servers to set the specified GPIO as high resistor.
+ * @param[in]  pin  - select the specified GPIO
+ * @return     none.
+ */
+void gpio_shutdown(GPIO_PinTypeDef pin);
+
+/**
+ * @brief     This function set a pin's polarity that trig its IRQ.
+ * @param[in] pin - the pin needs to set its edge polarity that trig its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_pol(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+
+	reg_gpio_wakeup_irq |= FLD_GPIO_CORE_INTERRUPT_EN;
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+	reg_irq_src = FLD_IRQ_GPIO_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_EN;
+}
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1:enable 0:disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt(GPIO_PinTypeDef pin, int en)   // reg_irq_mask: FLD_IRQ_GPIO_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_wakeup_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_wakeup_en(pin), bit);
+	}
+}
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_risc0(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling){
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+	reg_irq_src = FLD_IRQ_GPIO_RISC0_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC0_EN;
+}
+
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1 enable. 0 disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt_risc0(GPIO_PinTypeDef pin, int en)  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc0_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc0_en(pin), bit);
+	}
+}
+
+
+/**
+ * @brief     This function set a pin's IRQ.
+ * @param[in] pin - the pin needs to enable its IRQ
+ * @param[in] falling - value of the edge polarity(1: falling edge 0: rising edge)
+ * @return    none
+ */
+static inline void gpio_set_interrupt_risc1(GPIO_PinTypeDef pin, GPIO_PolTypeDef falling)
+{
+	unsigned char	bit = pin & 0xff;
+	//BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+
+	if(falling){
+		BM_SET(reg_gpio_pol(pin), bit);
+	}else{
+		BM_CLR(reg_gpio_pol(pin), bit);
+	}
+	/*clear gpio interrupt sorce (after setting gpio polarity,before enable interrupt)to avoid unexpected interrupt. confirm by minghai*/
+	reg_irq_src = FLD_IRQ_GPIO_RISC1_EN;
+	reg_irq_mask |= FLD_IRQ_GPIO_RISC1_EN;
+}
+
+/**
+ * @brief     This function enables a pin's IRQ function.
+ * @param[in] pin - the pin needs to enables its IRQ function.
+ * @param[in] en - 1 enable. 0 disable.
+ * @return    none
+ */
+static inline void gpio_en_interrupt_risc1(GPIO_PinTypeDef pin, int en)  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+{
+	unsigned char	bit = pin & 0xff;
+	if(en){
+		BM_SET(reg_gpio_irq_risc1_en(pin), bit);
+	}
+	else{
+		BM_CLR(reg_gpio_irq_risc1_en(pin), bit);
+	}
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio_default.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio_default.h
new file mode 100644
index 00000000..8201c51c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/gpio_default.h
@@ -0,0 +1,820 @@
+/********************************************************************************************************
+ * @file    gpio_default.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "gpio.h"
+
+
+#ifndef PA0_INPUT_ENABLE
+#define PA0_INPUT_ENABLE	0
+#endif
+#ifndef PA1_INPUT_ENABLE
+#define PA1_INPUT_ENABLE	0
+#endif
+#ifndef PA2_INPUT_ENABLE
+#define PA2_INPUT_ENABLE	0
+#endif
+#ifndef PA3_INPUT_ENABLE
+#define PA3_INPUT_ENABLE	0
+#endif
+#ifndef PA4_INPUT_ENABLE
+#define PA4_INPUT_ENABLE	0
+#endif
+#ifndef PA5_INPUT_ENABLE
+#define PA5_INPUT_ENABLE	0	//USB
+#endif
+#ifndef PA6_INPUT_ENABLE
+#define PA6_INPUT_ENABLE	0   //USB
+#endif
+#ifndef PA7_INPUT_ENABLE
+#define PA7_INPUT_ENABLE	1	//SWS
+#endif
+#ifndef PA0_OUTPUT_ENABLE
+#define PA0_OUTPUT_ENABLE	0
+#endif
+#ifndef PA1_OUTPUT_ENABLE
+#define PA1_OUTPUT_ENABLE	0
+#endif
+#ifndef PA2_OUTPUT_ENABLE
+#define PA2_OUTPUT_ENABLE	0
+#endif
+#ifndef PA3_OUTPUT_ENABLE
+#define PA3_OUTPUT_ENABLE	0
+#endif
+#ifndef PA4_OUTPUT_ENABLE
+#define PA4_OUTPUT_ENABLE	0
+#endif
+#ifndef PA5_OUTPUT_ENABLE
+#define PA5_OUTPUT_ENABLE	0
+#endif
+#ifndef PA6_OUTPUT_ENABLE
+#define PA6_OUTPUT_ENABLE	0
+#endif
+#ifndef PA7_OUTPUT_ENABLE
+#define PA7_OUTPUT_ENABLE	0
+#endif
+#ifndef PA0_DATA_STRENGTH
+#define PA0_DATA_STRENGTH	1
+#endif
+#ifndef PA1_DATA_STRENGTH
+#define PA1_DATA_STRENGTH	1
+#endif
+#ifndef PA2_DATA_STRENGTH
+#define PA2_DATA_STRENGTH	1
+#endif
+#ifndef PA3_DATA_STRENGTH
+#define PA3_DATA_STRENGTH	1
+#endif
+#ifndef PA4_DATA_STRENGTH
+#define PA4_DATA_STRENGTH	1
+#endif
+#ifndef PA5_DATA_STRENGTH
+#define PA5_DATA_STRENGTH	1
+#endif
+#ifndef PA6_DATA_STRENGTH
+#define PA6_DATA_STRENGTH	1
+#endif
+#ifndef PA7_DATA_STRENGTH
+#define PA7_DATA_STRENGTH	1
+#endif
+#ifndef PA0_DATA_OUT
+#define PA0_DATA_OUT	0
+#endif
+#ifndef PA1_DATA_OUT
+#define PA1_DATA_OUT	0
+#endif
+#ifndef PA2_DATA_OUT
+#define PA2_DATA_OUT	0
+#endif
+#ifndef PA3_DATA_OUT
+#define PA3_DATA_OUT	0
+#endif
+#ifndef PA4_DATA_OUT
+#define PA4_DATA_OUT	0
+#endif
+#ifndef PA5_DATA_OUT
+#define PA5_DATA_OUT	0
+#endif
+#ifndef PA6_DATA_OUT
+#define PA6_DATA_OUT	0
+#endif
+#ifndef PA7_DATA_OUT
+#define PA7_DATA_OUT	0
+#endif
+#ifndef PA0_FUNC
+#define PA0_FUNC	AS_GPIO
+#endif
+#ifndef PA1_FUNC
+#define PA1_FUNC	AS_GPIO
+#endif
+#ifndef PA2_FUNC
+#define PA2_FUNC	AS_GPIO
+#endif
+#ifndef PA3_FUNC
+#define PA3_FUNC	AS_GPIO
+#endif
+#ifndef PA4_FUNC
+#define PA4_FUNC	AS_GPIO
+#endif
+#ifndef PA5_FUNC
+#define PA5_FUNC	AS_GPIO
+#endif
+#ifndef PA6_FUNC
+#define PA6_FUNC	AS_GPIO
+#endif
+#ifndef PA7_FUNC
+#define PA7_FUNC	AS_SWIRE
+#endif
+#ifndef PULL_WAKEUP_SRC_PA0
+#define PULL_WAKEUP_SRC_PA0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA1
+#define PULL_WAKEUP_SRC_PA1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA2
+#define PULL_WAKEUP_SRC_PA2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA3
+#define PULL_WAKEUP_SRC_PA3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA4
+#define PULL_WAKEUP_SRC_PA4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA5
+#define PULL_WAKEUP_SRC_PA5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA6
+#define PULL_WAKEUP_SRC_PA6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA7
+#define PULL_WAKEUP_SRC_PA7		PM_PIN_PULLUP_1M	//sws pullup
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PB0_INPUT_ENABLE
+#define PB0_INPUT_ENABLE	0
+#endif
+#ifndef PB1_INPUT_ENABLE
+#define PB1_INPUT_ENABLE	0
+#endif
+#ifndef PB2_INPUT_ENABLE
+#define PB2_INPUT_ENABLE	0
+#endif
+#ifndef PB3_INPUT_ENABLE
+#define PB3_INPUT_ENABLE	0
+#endif
+#ifndef PB4_INPUT_ENABLE
+#define PB4_INPUT_ENABLE	0
+#endif
+#ifndef PB5_INPUT_ENABLE
+#define PB5_INPUT_ENABLE	0
+#endif
+#ifndef PB6_INPUT_ENABLE
+#define PB6_INPUT_ENABLE	0
+#endif
+#ifndef PB7_INPUT_ENABLE
+#define PB7_INPUT_ENABLE	0
+#endif
+#ifndef PB0_OUTPUT_ENABLE
+#define PB0_OUTPUT_ENABLE	0
+#endif
+#ifndef PB1_OUTPUT_ENABLE
+#define PB1_OUTPUT_ENABLE	0
+#endif
+#ifndef PB2_OUTPUT_ENABLE
+#define PB2_OUTPUT_ENABLE	0
+#endif
+#ifndef PB3_OUTPUT_ENABLE
+#define PB3_OUTPUT_ENABLE	0
+#endif
+#ifndef PB4_OUTPUT_ENABLE
+#define PB4_OUTPUT_ENABLE	0
+#endif
+#ifndef PB5_OUTPUT_ENABLE
+#define PB5_OUTPUT_ENABLE	0
+#endif
+#ifndef PB6_OUTPUT_ENABLE
+#define PB6_OUTPUT_ENABLE	0
+#endif
+#ifndef PB7_OUTPUT_ENABLE
+#define PB7_OUTPUT_ENABLE	0
+#endif
+#ifndef PB0_DATA_STRENGTH
+#define PB0_DATA_STRENGTH	1
+#endif
+#ifndef PB1_DATA_STRENGTH
+#define PB1_DATA_STRENGTH	1
+#endif
+#ifndef PB2_DATA_STRENGTH
+#define PB2_DATA_STRENGTH	1
+#endif
+#ifndef PB3_DATA_STRENGTH
+#define PB3_DATA_STRENGTH	1
+#endif
+#ifndef PB4_DATA_STRENGTH
+#define PB4_DATA_STRENGTH	1
+#endif
+#ifndef PB5_DATA_STRENGTH
+#define PB5_DATA_STRENGTH	1
+#endif
+#ifndef PB6_DATA_STRENGTH
+#define PB6_DATA_STRENGTH	1
+#endif
+#ifndef PB7_DATA_STRENGTH
+#define PB7_DATA_STRENGTH	1
+#endif
+#ifndef PB0_DATA_OUT
+#define PB0_DATA_OUT	0
+#endif
+#ifndef PB1_DATA_OUT
+#define PB1_DATA_OUT	0
+#endif
+#ifndef PB2_DATA_OUT
+#define PB2_DATA_OUT	0
+#endif
+#ifndef PB3_DATA_OUT
+#define PB3_DATA_OUT	0
+#endif
+#ifndef PB4_DATA_OUT
+#define PB4_DATA_OUT	0
+#endif
+#ifndef PB5_DATA_OUT
+#define PB5_DATA_OUT	0
+#endif
+#ifndef PB6_DATA_OUT
+#define PB6_DATA_OUT	0
+#endif
+#ifndef PB7_DATA_OUT
+#define PB7_DATA_OUT	0
+#endif
+#ifndef PB0_FUNC
+#define PB0_FUNC	AS_GPIO
+#endif
+#ifndef PB1_FUNC
+#define PB1_FUNC	AS_GPIO
+#endif
+#ifndef PB2_FUNC
+#define PB2_FUNC	AS_GPIO
+#endif
+#ifndef PB3_FUNC
+#define PB3_FUNC	AS_GPIO
+#endif
+#ifndef PB4_FUNC
+#define PB4_FUNC	AS_GPIO
+#endif
+#ifndef PB5_FUNC
+#define PB5_FUNC	AS_GPIO
+#endif
+#ifndef PB6_FUNC
+#define PB6_FUNC	AS_GPIO
+#endif
+#ifndef PB7_FUNC
+#define PB7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PB0
+#define PULL_WAKEUP_SRC_PB0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB1
+#define PULL_WAKEUP_SRC_PB1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB2
+#define PULL_WAKEUP_SRC_PB2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB3
+#define PULL_WAKEUP_SRC_PB3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB4
+#define PULL_WAKEUP_SRC_PB4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB5
+#define PULL_WAKEUP_SRC_PB5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB6
+#define PULL_WAKEUP_SRC_PB6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB7
+#define PULL_WAKEUP_SRC_PB7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PC0_INPUT_ENABLE
+#define PC0_INPUT_ENABLE	0
+#endif
+#ifndef PC1_INPUT_ENABLE
+#define PC1_INPUT_ENABLE	0
+#endif
+#ifndef PC2_INPUT_ENABLE
+#define PC2_INPUT_ENABLE	0
+#endif
+#ifndef PC3_INPUT_ENABLE
+#define PC3_INPUT_ENABLE	0
+#endif
+#ifndef PC4_INPUT_ENABLE
+#define PC4_INPUT_ENABLE	0
+#endif
+#ifndef PC5_INPUT_ENABLE
+#define PC5_INPUT_ENABLE	0
+#endif
+#ifndef PC6_INPUT_ENABLE
+#define PC6_INPUT_ENABLE	0
+#endif
+#ifndef PC7_INPUT_ENABLE
+#define PC7_INPUT_ENABLE	0
+#endif
+#ifndef PC0_OUTPUT_ENABLE
+#define PC0_OUTPUT_ENABLE	0
+#endif
+#ifndef PC1_OUTPUT_ENABLE
+#define PC1_OUTPUT_ENABLE	0
+#endif
+#ifndef PC2_OUTPUT_ENABLE
+#define PC2_OUTPUT_ENABLE	0
+#endif
+#ifndef PC3_OUTPUT_ENABLE
+#define PC3_OUTPUT_ENABLE	0
+#endif
+#ifndef PC4_OUTPUT_ENABLE
+#define PC4_OUTPUT_ENABLE	0
+#endif
+#ifndef PC5_OUTPUT_ENABLE
+#define PC5_OUTPUT_ENABLE	0
+#endif
+#ifndef PC6_OUTPUT_ENABLE
+#define PC6_OUTPUT_ENABLE	0
+#endif
+#ifndef PC7_OUTPUT_ENABLE
+#define PC7_OUTPUT_ENABLE	0
+#endif
+#ifndef PC0_DATA_STRENGTH
+#define PC0_DATA_STRENGTH	1
+#endif
+#ifndef PC1_DATA_STRENGTH
+#define PC1_DATA_STRENGTH	1
+#endif
+#ifndef PC2_DATA_STRENGTH
+#define PC2_DATA_STRENGTH	1
+#endif
+#ifndef PC3_DATA_STRENGTH
+#define PC3_DATA_STRENGTH	1
+#endif
+#ifndef PC4_DATA_STRENGTH
+#define PC4_DATA_STRENGTH	1
+#endif
+#ifndef PC5_DATA_STRENGTH
+#define PC5_DATA_STRENGTH	1
+#endif
+#ifndef PC6_DATA_STRENGTH
+#define PC6_DATA_STRENGTH	1
+#endif
+#ifndef PC7_DATA_STRENGTH
+#define PC7_DATA_STRENGTH	1
+#endif
+#ifndef PC0_DATA_OUT
+#define PC0_DATA_OUT	0
+#endif
+#ifndef PC1_DATA_OUT
+#define PC1_DATA_OUT	0
+#endif
+#ifndef PC2_DATA_OUT
+#define PC2_DATA_OUT	0
+#endif
+#ifndef PC3_DATA_OUT
+#define PC3_DATA_OUT	0
+#endif
+#ifndef PC4_DATA_OUT
+#define PC4_DATA_OUT	0
+#endif
+#ifndef PC5_DATA_OUT
+#define PC5_DATA_OUT	0
+#endif
+#ifndef PC6_DATA_OUT
+#define PC6_DATA_OUT	0
+#endif
+#ifndef PC7_DATA_OUT
+#define PC7_DATA_OUT	0
+#endif
+#ifndef PC0_FUNC
+#define PC0_FUNC	AS_GPIO
+#endif
+#ifndef PC1_FUNC
+#define PC1_FUNC	AS_GPIO
+#endif
+#ifndef PC2_FUNC
+#define PC2_FUNC	AS_GPIO
+#endif
+#ifndef PC3_FUNC
+#define PC3_FUNC	AS_GPIO
+#endif
+#ifndef PC4_FUNC
+#define PC4_FUNC	AS_GPIO
+#endif
+#ifndef PC5_FUNC
+#define PC5_FUNC	AS_GPIO
+#endif
+#ifndef PC6_FUNC
+#define PC6_FUNC	AS_GPIO
+#endif
+#ifndef PC7_FUNC
+#define PC7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PC0
+#define PULL_WAKEUP_SRC_PC0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC1
+#define PULL_WAKEUP_SRC_PC1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC2
+#define PULL_WAKEUP_SRC_PC2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC3
+#define PULL_WAKEUP_SRC_PC3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC4
+#define PULL_WAKEUP_SRC_PC4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC5
+#define PULL_WAKEUP_SRC_PC5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC6
+#define PULL_WAKEUP_SRC_PC6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC7
+#define PULL_WAKEUP_SRC_PC7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PD0_INPUT_ENABLE
+#define PD0_INPUT_ENABLE	0
+#endif
+#ifndef PD1_INPUT_ENABLE
+#define PD1_INPUT_ENABLE	0
+#endif
+#ifndef PD2_INPUT_ENABLE
+#define PD2_INPUT_ENABLE	0
+#endif
+#ifndef PD3_INPUT_ENABLE
+#define PD3_INPUT_ENABLE	0
+#endif
+#ifndef PD4_INPUT_ENABLE
+#define PD4_INPUT_ENABLE	0
+#endif
+#ifndef PD5_INPUT_ENABLE
+#define PD5_INPUT_ENABLE	0
+#endif
+#ifndef PD6_INPUT_ENABLE
+#define PD6_INPUT_ENABLE	0
+#endif
+#ifndef PD7_INPUT_ENABLE
+#define PD7_INPUT_ENABLE	0
+#endif
+#ifndef PD0_OUTPUT_ENABLE
+#define PD0_OUTPUT_ENABLE	0
+#endif
+#ifndef PD1_OUTPUT_ENABLE
+#define PD1_OUTPUT_ENABLE	0
+#endif
+#ifndef PD2_OUTPUT_ENABLE
+#define PD2_OUTPUT_ENABLE	0
+#endif
+#ifndef PD3_OUTPUT_ENABLE
+#define PD3_OUTPUT_ENABLE	0
+#endif
+#ifndef PD4_OUTPUT_ENABLE
+#define PD4_OUTPUT_ENABLE	0
+#endif
+#ifndef PD5_OUTPUT_ENABLE
+#define PD5_OUTPUT_ENABLE	0
+#endif
+#ifndef PD6_OUTPUT_ENABLE
+#define PD6_OUTPUT_ENABLE	0
+#endif
+#ifndef PD7_OUTPUT_ENABLE
+#define PD7_OUTPUT_ENABLE	0
+#endif
+#ifndef PD0_DATA_STRENGTH
+#define PD0_DATA_STRENGTH	1
+#endif
+#ifndef PD1_DATA_STRENGTH
+#define PD1_DATA_STRENGTH	1
+#endif
+#ifndef PD2_DATA_STRENGTH
+#define PD2_DATA_STRENGTH	1
+#endif
+#ifndef PD3_DATA_STRENGTH
+#define PD3_DATA_STRENGTH	1
+#endif
+#ifndef PD4_DATA_STRENGTH
+#define PD4_DATA_STRENGTH	1
+#endif
+#ifndef PD5_DATA_STRENGTH
+#define PD5_DATA_STRENGTH	1
+#endif
+#ifndef PD6_DATA_STRENGTH
+#define PD6_DATA_STRENGTH	1
+#endif
+#ifndef PD7_DATA_STRENGTH
+#define PD7_DATA_STRENGTH	1
+#endif
+#ifndef PD0_DATA_OUT
+#define PD0_DATA_OUT	0
+#endif
+#ifndef PD1_DATA_OUT
+#define PD1_DATA_OUT	0
+#endif
+#ifndef PD2_DATA_OUT
+#define PD2_DATA_OUT	0
+#endif
+#ifndef PD3_DATA_OUT
+#define PD3_DATA_OUT	0
+#endif
+#ifndef PD4_DATA_OUT
+#define PD4_DATA_OUT	0
+#endif
+#ifndef PD5_DATA_OUT
+#define PD5_DATA_OUT	0
+#endif
+#ifndef PD6_DATA_OUT
+#define PD6_DATA_OUT	0
+#endif
+#ifndef PD7_DATA_OUT
+#define PD7_DATA_OUT	0
+#endif
+#ifndef PD0_FUNC
+#define PD0_FUNC	AS_GPIO
+#endif
+#ifndef PD1_FUNC
+#define PD1_FUNC	AS_GPIO
+#endif
+#ifndef PD2_FUNC
+#define PD2_FUNC	AS_GPIO
+#endif
+#ifndef PD3_FUNC
+#define PD3_FUNC	AS_GPIO
+#endif
+#ifndef PD4_FUNC
+#define PD4_FUNC	AS_GPIO
+#endif
+#ifndef PD5_FUNC
+#define PD5_FUNC	AS_GPIO
+#endif
+#ifndef PD6_FUNC
+#define PD6_FUNC	AS_GPIO
+#endif
+#ifndef PD7_FUNC
+#define PD7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PD0
+#define PULL_WAKEUP_SRC_PD0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD1
+#define PULL_WAKEUP_SRC_PD1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD2
+#define PULL_WAKEUP_SRC_PD2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD3
+#define PULL_WAKEUP_SRC_PD3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD4
+#define PULL_WAKEUP_SRC_PD4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD5
+#define PULL_WAKEUP_SRC_PD5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD6
+#define PULL_WAKEUP_SRC_PD6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD7
+#define PULL_WAKEUP_SRC_PD7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PE0_INPUT_ENABLE
+#define PE0_INPUT_ENABLE	1   //MSPI
+#endif
+#ifndef PE1_INPUT_ENABLE
+#define PE1_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE2_INPUT_ENABLE
+#define PE2_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE3_INPUT_ENABLE
+#define PE3_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PE0_OUTPUT_ENABLE
+#define PE0_OUTPUT_ENABLE	0
+#endif
+#ifndef PE1_OUTPUT_ENABLE
+#define PE1_OUTPUT_ENABLE	0
+#endif
+#ifndef PE2_OUTPUT_ENABLE
+#define PE2_OUTPUT_ENABLE	0
+#endif
+#ifndef PE3_OUTPUT_ENABLE
+#define PE3_OUTPUT_ENABLE	0
+#endif
+
+#ifndef PE0_DATA_STRENGTH
+#define PE0_DATA_STRENGTH	1
+#endif
+#ifndef PE1_DATA_STRENGTH
+#define PE1_DATA_STRENGTH	1
+#endif
+#ifndef PE2_DATA_STRENGTH
+#define PE2_DATA_STRENGTH	1
+#endif
+#ifndef PE3_DATA_STRENGTH
+#define PE3_DATA_STRENGTH	1
+#endif
+
+#ifndef PE0_DATA_OUT
+#define PE0_DATA_OUT	0
+#endif
+#ifndef PE1_DATA_OUT
+#define PE1_DATA_OUT	0
+#endif
+#ifndef PE2_DATA_OUT
+#define PE2_DATA_OUT	0
+#endif
+#ifndef PE3_DATA_OUT
+#define PE3_DATA_OUT	0
+#endif
+
+#ifndef PE0_FUNC
+#define PE0_FUNC	AS_MSPI
+#endif
+#ifndef PE1_FUNC
+#define PE1_FUNC	AS_MSPI
+#endif
+#ifndef PE2_FUNC
+#define PE2_FUNC	AS_MSPI
+#endif
+#ifndef PE3_FUNC
+#define PE3_FUNC	AS_MSPI
+#endif
+
+
+/**
+ * @brief      This function servers to initiate pull up-down resistor of all gpio.
+ * @param[in]  none
+ * @return     none.
+ */
+static inline void gpio_analog_resistance_init(void)
+{
+	analog_write (0x0e,  PULL_WAKEUP_SRC_PA0 |
+						(PULL_WAKEUP_SRC_PA1<<2) |
+						(PULL_WAKEUP_SRC_PA2<<4) |
+						(PULL_WAKEUP_SRC_PA3<<6));
+
+	analog_write (0x0f,  PULL_WAKEUP_SRC_PA4 |
+						(PULL_WAKEUP_SRC_PA5<<2) |
+						(PULL_WAKEUP_SRC_PA6<<4) |
+						(PULL_WAKEUP_SRC_PA7<<6));
+
+
+	analog_write (0x10,  PULL_WAKEUP_SRC_PB0 |
+						(PULL_WAKEUP_SRC_PB1<<2) |
+						(PULL_WAKEUP_SRC_PB2<<4) |
+						(PULL_WAKEUP_SRC_PB3<<6));
+
+	analog_write (0x11,  PULL_WAKEUP_SRC_PB4 |
+						(PULL_WAKEUP_SRC_PB5<<2) |
+						(PULL_WAKEUP_SRC_PB6<<4) |
+						(PULL_WAKEUP_SRC_PB7<<6));
+
+
+	analog_write (0x12,  PULL_WAKEUP_SRC_PC0 |
+						(PULL_WAKEUP_SRC_PC1<<2) |
+						(PULL_WAKEUP_SRC_PC2<<4) |
+						(PULL_WAKEUP_SRC_PC3<<6));
+
+	analog_write (0x13,  PULL_WAKEUP_SRC_PC4 |
+						(PULL_WAKEUP_SRC_PC5<<2) |
+						(PULL_WAKEUP_SRC_PC6<<4) |
+						(PULL_WAKEUP_SRC_PC7<<6));
+
+
+	analog_write (0x14,  PULL_WAKEUP_SRC_PD0 |
+						(PULL_WAKEUP_SRC_PD1<<2) |
+						(PULL_WAKEUP_SRC_PD2<<4) |
+						(PULL_WAKEUP_SRC_PD3<<6));
+
+	analog_write (0x15,  PULL_WAKEUP_SRC_PD4 |
+						(PULL_WAKEUP_SRC_PD5<<2) |
+						(PULL_WAKEUP_SRC_PD6<<4) |
+						(PULL_WAKEUP_SRC_PD7<<6));
+}
+
+/**
+ * @brief      This function servers to initialization all gpio.
+
+ * @return     none.
+ */
+/**Processing methods of unused GPIO
+ * Set it to high resistance state and set it to open pull-up or pull-down resistance to
+ * let it be in the determined state.When GPIO uses internal pull-up or pull-down resistance,
+ * do not use pull-up or pull-down resistance on the board in the process of practical
+ * application because it may have the risk of electric leakage .
+ */
+static inline void gpio_init(int anaRes_init_en)
+{
+	reg_gpio_pa_setting1 =
+		(PA0_INPUT_ENABLE<<8) 	| (PA1_INPUT_ENABLE<<9)	| (PA2_INPUT_ENABLE<<10)	| (PA3_INPUT_ENABLE<<11) |
+		(PA4_INPUT_ENABLE<<12)	| (PA5_INPUT_ENABLE<<13)	| (PA6_INPUT_ENABLE<<14)	| (PA7_INPUT_ENABLE<<15) |
+		((PA0_OUTPUT_ENABLE?0:1)<<16)	| ((PA1_OUTPUT_ENABLE?0:1)<<17) | ((PA2_OUTPUT_ENABLE?0:1)<<18)	| ((PA3_OUTPUT_ENABLE?0:1)<<19) |
+		((PA4_OUTPUT_ENABLE?0:1)<<20)	| ((PA5_OUTPUT_ENABLE?0:1)<<21) | ((PA6_OUTPUT_ENABLE?0:1)<<22)	| ((PA7_OUTPUT_ENABLE?0:1)<<23) |
+		(PA0_DATA_OUT<<24)	| (PA1_DATA_OUT<<25)	| (PA2_DATA_OUT<<26)	| (PA3_DATA_OUT<<27) |
+		(PA4_DATA_OUT<<28)	| (PA5_DATA_OUT<<29)	| (PA6_DATA_OUT<<30)	| (PA7_DATA_OUT<<31) ;
+	reg_gpio_pa_setting2 =
+		(PA0_DATA_STRENGTH<<8)		| (PA1_DATA_STRENGTH<<9)| (PA2_DATA_STRENGTH<<10)	| (PA3_DATA_STRENGTH<<11) |
+		(PA4_DATA_STRENGTH<<12)	| (PA5_DATA_STRENGTH<<13)	| (PA6_DATA_STRENGTH<<14)	| (PA7_DATA_STRENGTH<<15) |
+		(PA0_FUNC==AS_GPIO ? BIT(16):0)	| (PA1_FUNC==AS_GPIO ? BIT(17):0)| (PA2_FUNC==AS_GPIO ? BIT(18):0)| (PA3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PA4_FUNC==AS_GPIO ? BIT(20):0)	| (PA5_FUNC==AS_GPIO ? BIT(21):0)| (PA6_FUNC==AS_GPIO ? BIT(22):0)| (PA7_FUNC==AS_GPIO ? BIT(23):0);
+
+
+	//PB group
+	reg_gpio_pb_setting1 =
+		(PB0_INPUT_ENABLE<<8) 	| (PB1_INPUT_ENABLE<<9)	| (PB2_INPUT_ENABLE<<10)	| (PB3_INPUT_ENABLE<<11) |
+		(PB4_INPUT_ENABLE<<12)	| (PB5_INPUT_ENABLE<<13)	| (PB6_INPUT_ENABLE<<14)	| (PB7_INPUT_ENABLE<<15) |
+		((PB0_OUTPUT_ENABLE?0:1)<<16)	| ((PB1_OUTPUT_ENABLE?0:1)<<17) | ((PB2_OUTPUT_ENABLE?0:1)<<18)	| ((PB3_OUTPUT_ENABLE?0:1)<<19) |
+		((PB4_OUTPUT_ENABLE?0:1)<<20)	| ((PB5_OUTPUT_ENABLE?0:1)<<21) | ((PB6_OUTPUT_ENABLE?0:1)<<22)	| ((PB7_OUTPUT_ENABLE?0:1)<<23) |
+		(PB0_DATA_OUT<<24)	| (PB1_DATA_OUT<<25)	| (PB2_DATA_OUT<<26)	| (PB3_DATA_OUT<<27) |
+		(PB4_DATA_OUT<<28)	| (PB5_DATA_OUT<<29)	| (PB6_DATA_OUT<<30)	| (PB7_DATA_OUT<<31) ;
+	reg_gpio_pb_setting2 =
+		(PB0_DATA_STRENGTH<<8)		| (PB1_DATA_STRENGTH<<9)| (PB2_DATA_STRENGTH<<10)	| (PB3_DATA_STRENGTH<<11) |
+		(PB4_DATA_STRENGTH<<12)	| (PB5_DATA_STRENGTH<<13)	| (PB6_DATA_STRENGTH<<14)	| (PB7_DATA_STRENGTH<<15) |
+		(PB0_FUNC==AS_GPIO ? BIT(16):0)	| (PB1_FUNC==AS_GPIO ? BIT(17):0)| (PB2_FUNC==AS_GPIO ? BIT(18):0)| (PB3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PB4_FUNC==AS_GPIO ? BIT(20):0)	| (PB5_FUNC==AS_GPIO ? BIT(21):0)| (PB6_FUNC==AS_GPIO ? BIT(22):0)| (PB7_FUNC==AS_GPIO ? BIT(23):0);
+
+	//PC group
+	//ie
+	analog_write(areg_gpio_pc_ie, 	(PC0_INPUT_ENABLE<<0) 	| (PC1_INPUT_ENABLE<<1)	| (PC2_INPUT_ENABLE<<2)	| (PC3_INPUT_ENABLE<<3) |
+									(PC4_INPUT_ENABLE<<4)	| (PC5_INPUT_ENABLE<<5) | (PC6_INPUT_ENABLE<<6)	| (PC7_INPUT_ENABLE<<7) );
+
+	//oen
+	reg_gpio_pc_oen =
+		((PC0_OUTPUT_ENABLE?0:1)<<0)	| ((PC1_OUTPUT_ENABLE?0:1)<<1) | ((PC2_OUTPUT_ENABLE?0:1)<<2)	| ((PC3_OUTPUT_ENABLE?0:1)<<3) |
+		((PC4_OUTPUT_ENABLE?0:1)<<4)	| ((PC5_OUTPUT_ENABLE?0:1)<<5) | ((PC6_OUTPUT_ENABLE?0:1)<<6)	| ((PC7_OUTPUT_ENABLE?0:1)<<7);
+	//dataO
+	reg_gpio_pc_out =
+		(PC0_DATA_OUT<<0)	| (PC1_DATA_OUT<<1)	| (PC2_DATA_OUT<<2)	| (PC3_DATA_OUT<<3) |
+		(PC4_DATA_OUT<<4)	| (PC5_DATA_OUT<<5)	| (PC6_DATA_OUT<<6)	| (PC7_DATA_OUT<<7) ;
+
+	//ds
+	analog_write(areg_gpio_pc_ds, 	(PC0_DATA_STRENGTH<<0) 	| (PC1_DATA_STRENGTH<<1)  | (PC2_DATA_STRENGTH<<2)	| (PC3_DATA_STRENGTH<<3) |
+									(PC4_DATA_STRENGTH<<4)	| (PC5_DATA_STRENGTH<<5)  | (PC6_DATA_STRENGTH<<6)	| (PC7_DATA_STRENGTH<<7) );
+
+	reg_gpio_pc_gpio =
+		(PC0_FUNC==AS_GPIO ? BIT(0):0)	| (PC1_FUNC==AS_GPIO ? BIT(1):0)| (PC2_FUNC==AS_GPIO ? BIT(2):0)| (PC3_FUNC==AS_GPIO ? BIT(3):0) |
+		(PC4_FUNC==AS_GPIO ? BIT(4):0)	| (PC5_FUNC==AS_GPIO ? BIT(5):0)| (PC6_FUNC==AS_GPIO ? BIT(6):0)| (PC7_FUNC==AS_GPIO ? BIT(7):0);
+
+
+	//PD group
+	reg_gpio_pd_setting1 =
+		(PD0_INPUT_ENABLE<<8) 	| (PD1_INPUT_ENABLE<<9)	| (PD2_INPUT_ENABLE<<10)	| (PD3_INPUT_ENABLE<<11) |
+		(PD4_INPUT_ENABLE<<12)	| (PD5_INPUT_ENABLE<<13)| (PD6_INPUT_ENABLE<<14)	| (PD7_INPUT_ENABLE<<15) |
+		((PD0_OUTPUT_ENABLE?0:1)<<16)	| ((PD1_OUTPUT_ENABLE?0:1)<<17) | ((PD2_OUTPUT_ENABLE?0:1)<<18)	| ((PD3_OUTPUT_ENABLE?0:1)<<19) |
+		((PD4_OUTPUT_ENABLE?0:1)<<20)	| ((PD5_OUTPUT_ENABLE?0:1)<<21) | ((PD6_OUTPUT_ENABLE?0:1)<<22)	| ((PD7_OUTPUT_ENABLE?0:1)<<23) |
+		(PD0_DATA_OUT<<24)	| (PD1_DATA_OUT<<25)	| (PD2_DATA_OUT<<26)	| (PD3_DATA_OUT<<27) |
+		(PD4_DATA_OUT<<28)	| (PD5_DATA_OUT<<29)	| (PD6_DATA_OUT<<30)	| (PD7_DATA_OUT<<31) ;
+	reg_gpio_pd_setting2 =
+		(PD0_DATA_STRENGTH<<8)	| (PD1_DATA_STRENGTH<<9)	| (PD2_DATA_STRENGTH<<10)	| (PD3_DATA_STRENGTH<<11) |
+		(PD4_DATA_STRENGTH<<12)	| (PD5_DATA_STRENGTH<<13)	| (PD6_DATA_STRENGTH<<14)	| (PD7_DATA_STRENGTH<<15) |
+		(PD0_FUNC==AS_GPIO ? BIT(16):0)	| (PD1_FUNC==AS_GPIO ? BIT(17):0)| (PD2_FUNC==AS_GPIO ? BIT(18):0)| (PD3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PD4_FUNC==AS_GPIO ? BIT(20):0)	| (PD5_FUNC==AS_GPIO ? BIT(21):0)| (PD6_FUNC==AS_GPIO ? BIT(22):0)| (PD7_FUNC==AS_GPIO ? BIT(23):0);
+
+
+	//PE group
+	reg_gpio_pe_ie = (PE0_INPUT_ENABLE<<0)	| (PE1_INPUT_ENABLE<<1)| (PE2_INPUT_ENABLE<<2)	| (PE3_INPUT_ENABLE<<3);
+	reg_gpio_pe_oen = ((PE0_OUTPUT_ENABLE?0:1)<<0)	| ((PE1_OUTPUT_ENABLE?0:1)<<1) | ((PE2_OUTPUT_ENABLE?0:1)<<2)	| ((PE3_OUTPUT_ENABLE?0:1)<<3);
+	reg_gpio_pe_out = (PE0_DATA_OUT<<0)	| (PE1_DATA_OUT<<1)	| (PE2_DATA_OUT<<2)	| (PE3_DATA_OUT<<3);
+	reg_gpio_pe_ds = (PE0_DATA_STRENGTH<<0)	| (PE1_DATA_STRENGTH<<1)	| (PE2_DATA_STRENGTH<<2)	| (PE3_DATA_STRENGTH<<3);
+	reg_gpio_pe_gpio = (PE0_FUNC==AS_GPIO ? BIT(0):0)	| (PE1_FUNC==AS_GPIO ? BIT(1):0)| (PE2_FUNC==AS_GPIO ? BIT(2):0)| (PE3_FUNC==AS_GPIO ? BIT(3):0);
+
+	if(anaRes_init_en){
+		gpio_analog_resistance_init();
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/i2c.h
new file mode 100644
index 00000000..e1f49b4e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/i2c.h
@@ -0,0 +1,202 @@
+/********************************************************************************************************
+ * @file    i2c.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef I2C_H
+#define I2C_H
+
+#include "register.h"
+#include "gpio.h"
+
+
+/**
+ *  @brief  select pin as SDA and SCL of i2c
+ */
+typedef enum{
+	I2C_GPIO_SDA_A3		= GPIO_PA3,
+	I2C_GPIO_SDA_B6		= GPIO_PB6,
+	I2C_GPIO_SDA_C0		= GPIO_PC0,
+	I2C_GPIO_SDA_C2		= GPIO_PC2,
+}I2C_GPIO_SdaTypeDef;
+
+typedef enum{
+	I2C_GPIO_SCL_A4		= GPIO_PA4,
+	I2C_GPIO_SCL_D7		= GPIO_PD7,
+	I2C_GPIO_SCL_C1	 	= GPIO_PC1,
+	I2C_GPIO_SCL_C3		= GPIO_PC3,
+}I2C_GPIO_SclTypeDef;
+
+
+/**
+ *  @brief  select i2c slave mode: DMA and MAPPING
+ *
+ *   dma mode:
+ *   		   all sram(64k area form 0x40000~0x4ffff, address 3 byte) could be used for reading or writing data buffer,
+ *             i2c master just need send sram address(3 byte) on i2c bus in i2c reading or writing, reading/writing
+ *             sram address could be anywhere and could be different.
+ *			   i2c master timing is:
+ *              	1.master write:  start + device_id(W) + address2+ address1 + address0 + data(1,2...n byte)  +  stop
+ *                  2.master read:   start + device_id(W) + address2+ address1 + address0 + start + device_id(R) + data(1,2...n byte) + stop
+ *
+ *   mapping mode:
+ *  			i2c slave data buffer sram could be configured by function: void i2c_slave_mapping_mode_data_buffer_config(unsigned char * pMapBuf),
+ *              and it is also configured in function: void i2c_slave_init(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pMapBuf)
+ *   			reading/writing data buffer configured by pMapBuf addressed in core_e1/e2/e3,
+ *   		    for i2c master: writing data buffer is pMapBuf,and reading data buffer is (pMapBuf+64) (this offset 64 is managed by MCU hardware, user can not change it)
+ *
+ *              i2c master no need send any address when reading or writing data, which means i2c master timing is:
+ *              	1.master write:  start + device_id(W) + data(1,2...n byte)  +  stop
+ *                  2.master read:   start + device_id(W) + start + device_id(R) + data(1,2...n byte) + stop
+ *
+ *
+ */
+typedef enum {
+	I2C_SLAVE_DMA = 0,
+	I2C_SLAVE_MAP,
+}I2C_SlaveMode;
+
+typedef enum{
+	HOST_CMD_IRQ  = 	BIT(0),  SLAVE_SPI_IRQ = HOST_CMD_IRQ,  //both host write & read trigger this status
+	HOST_READ_IRQ = 	BIT(1),                                        //only host read trigger this status
+}i2c_irq_e;
+
+/**
+ * @brief This function reset I2C module.
+ * @param[in] none
+ * @return none
+ */
+static inline void reset_i2c_moudle(void)
+{
+	reg_rst0 |= FLD_RST0_I2C;
+	reg_rst0 &= (~FLD_RST0_I2C);
+}
+
+/**
+ * @brief This function serves to set id of I2C module.
+ * @param[in] SlaveID - this id is fixed id for slave device.For master device, this id is set to access different slave devices.
+ * @return none
+ */
+static inline void i2c_set_id(unsigned char SlaveID)
+{
+    reg_i2c_id = SlaveID; //slave address
+}
+
+/**
+ * @brief This function servers to config i2c data buffer in slave mode.
+ * @param[in] pMapBuf - to store the buffer data.
+ * @return none
+ */
+static inline void i2c_slave_mapping_mode_data_buffer_config(unsigned char * pMapBuf)
+{
+	 reg_i2c_slave_map_addrl  = (unsigned char)(((unsigned int)pMapBuf & 0xff)); //
+	 reg_i2c_slave_map_addrm = (unsigned char)(((unsigned int)pMapBuf>>8)&0xff);
+	 reg_i2c_slave_map_addrh = 0x04;
+}
+
+/**
+ * @brief      This function serves to select a pin port for I2C interface.
+ * @param[in]  i2c_pin_group - the pin port selected as I2C interface pin port.
+ * @return     none
+ */
+void i2c_gpio_set(I2C_GPIO_SdaTypeDef sda_pin,I2C_GPIO_SclTypeDef scl_pin);
+
+/**
+ * @brief      This function serves to set the id of slave device and the speed of I2C interface
+ * @param[in]  DivClock - the division factor of I2C clock,
+ *             I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return     none
+ */
+void i2c_master_init(unsigned char DivClock);
+
+/**
+ *  @brief      This function serves to set the ID and mode of slave device.
+ *  @param[in]  device_ID - it contains write or read bit,the lsb is write or read bit.
+ *              ID|0x01 indicate read. ID&0xfe indicate write.
+ *  @param[in]  mode - set slave mode. slave has two modes, one is DMA mode, the other is MAPPING mode.
+ *  @param[in]  pMapBuf - if slave mode is MAPPING, set the first address of buffer master write or read slave.
+ *  @return     none
+ */
+void i2c_slave_init(unsigned char device_ID,I2C_SlaveMode mode,unsigned char * pMapBuf);
+
+
+/**
+ * @brief      This function serves to write one byte to the slave device at the specified address
+ * @param[in]  Addr - i2c slave address where the one byte data will be written
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @param[in]  Data - the one byte data will be written via I2C interface
+ * @return     none
+ */
+void i2c_write_byte(unsigned int Addr, unsigned int AddrLen, unsigned char Data);
+
+/**
+ * @brief      This function serves to read one byte from the slave device at the specified address
+ * @param[in]  Addr - i2c slave address where the one byte data will be read
+ * @param[in]  AddrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @return     the one byte data read from the slave device via I2C interface
+ */
+unsigned char i2c_read_byte(unsigned int Addr, unsigned int AddrLen);
+
+/**
+ *  @brief      This function serves to write a packet of data to the specified address of slave device
+ *  @param[in]  Addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ *  @param[in]  AddrLen - the length of register. enum 0 or 1 or 2 or 3. based on the spec of i2c slave.
+ *  @param[in]  dataBuf - the first SRAM buffer address to write data to slave in.
+ *  @param[in]  dataLen - the length of data master write to slave.
+ *  @return     none
+ */
+void i2c_write_series(unsigned int Addr, unsigned int AddrLen, unsigned char * dataBuf, int dataLen);
+
+/**
+ * @brief      This function serves to read a packet of data from the specified address of slave device
+ * @param[in]  Addr - the register master read data from slave in. support one byte and two bytes.
+ * @param[in]  AddrLen - the length of register. enum 0 or 1 or 2 or 3 based on the spec of i2c slave.
+ * @param[in]  dataBuf - the first address of SRAM buffer master store data in.
+ * @param[in]  dataLen - the length of data master read from slave.
+ * @return     none.
+ */
+void i2c_read_series(unsigned int Addr, unsigned int AddrLen, unsigned char * dataBuf, int dataLen);
+
+
+/**
+ * @brief     This fuction servers to clear the i2c slave interrupt status.
+ * @param[in] irq_status  - i2c slave all interrupt status.
+ * @return	  none.
+ */
+static inline void i2c_clear_interrupt_status(i2c_irq_e irq_status)
+{
+	reg_i2c_slave_irq_status= irq_status;
+}
+
+
+/**
+ * @brief     This fuction servers to get the i2c slave interrupt status.
+ * @param[in] irq_status  - i2c slave all interrupt status.
+ * @return	  i2c slave interrupt status.
+ */
+static inline unsigned char i2c_get_interrupt_status(i2c_irq_e irq_status){
+	 return reg_i2c_slave_irq_status & irq_status;
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/irq.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/irq.h
new file mode 100644
index 00000000..03e5670e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/irq.h
@@ -0,0 +1,175 @@
+/********************************************************************************************************
+ * @file    irq.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "bit.h"
+
+/**
+ * @brief      This function servers to enable IRQ.
+ * @param[in]  none
+ * @return     if return 1 is enable.else disable.
+ */
+static inline unsigned char irq_enable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 1;
+	return r;
+}
+
+/**
+ * @brief      This function servers to disable IRQ.
+ * @param[in]  none
+ * @return     if return 0 is disable.else enable.
+ */
+static inline unsigned char irq_disable(void){
+	unsigned char r = reg_irq_en;		// don't worry,  the compiler will optimize the return value if not used
+	reg_irq_en = 0;
+	return r;
+}
+
+/**
+ * @brief      This function servers to restore IRQ.
+ * @param[in]  none
+ * @return     if return 1 is irg restore.
+ */
+static inline void irq_restore(unsigned char en){
+	reg_irq_en = en;
+}
+
+/**
+ * @brief      This function servers to set IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_enable_type(unsigned long msk){
+	BM_SET(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to clear IRQ mask.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void irq_disable_type(unsigned long msk){
+	BM_CLR(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to set IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_set_mask(unsigned long msk){
+	BM_SET(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to clear IRQ mask.
+ * @param[in]  variable of msk.
+ * @return     none.
+ */
+static inline void irq_clr_mask(unsigned long msk){
+	BM_CLR(reg_irq_mask, msk);
+}
+
+/**
+ * @brief      This function servers to enable one interrupt
+ * @param[in]  none
+ * @return     the value of IRQ register.
+ */
+static inline unsigned long irq_get_mask(void){
+	return reg_irq_mask;
+}
+
+/**
+ * @brief      This function servers to get an IRQ source.
+ * @param[in]  none.
+ * @return     IRQ source.
+ */
+static inline unsigned long irq_get_src(void){
+	return reg_irq_src;
+}
+
+/**
+ * @brief      This function servers to clear all IRQ source.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void irq_clr_all_src(void)
+{
+	reg_irq_src = 0xffffffff;
+}
+
+/**
+ * @brief      This function servers to clear the specified IRQ source.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void irq_clr_src(unsigned long msk)
+{
+    reg_irq_src = msk;
+}
+
+/**
+ * @brief      This function servers to set the mask of RF IRQ.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_enable(unsigned int msk)
+{
+    reg_rf_irq_mask |= msk;
+}
+
+/**
+ * @brief      This function servers to clear the mask of RF IRQ.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_disable(unsigned int msk)
+{
+    reg_rf_irq_mask &= (~msk);
+}
+
+/**
+ * @brief      This function servers to get the RF IRQ source.
+ * @param[in]  none.
+ * @return     the state of RF IRQ register.
+ */
+static inline unsigned short rf_irq_src_get(void)
+{
+    return reg_rf_irq_status;
+}
+
+/**
+ * @brief      This function servers to clear the RF IRQ source.
+ * @param[in]  msk - variable of msk.
+ * @return     none.
+ */
+static inline void rf_irq_clr_src(unsigned short msk)
+{
+    reg_rf_irq_status = msk;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pga.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pga.h
new file mode 100644
index 00000000..285c5efa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pga.h
@@ -0,0 +1,100 @@
+/********************************************************************************************************
+ * @file    pga.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef		pga_H
+#define		pga_H
+
+#include "bsp.h"
+#include "analog.h"
+
+enum{
+	PGA_AIN_C0,
+	PGA_AIN_C1,
+	PGA_AIN_C2,
+	PGA_AIN_C3,
+};
+
+//this config for PGA value.
+enum{
+	PGA_GAIN_VOL_45_2DB   = 	    0x00,//45.2dB
+	PGA_GAIN_VOL_43_5DB   =  		0x01,
+	PGA_GAIN_VOL_42_1DB   = 	    0x02,
+    PGA_GAIN_VOL_40_5DB   =  		0x03,
+    PGA_GAIN_VOL_39_1DB   = 	    0x04,
+    PGA_GAIN_VOL_37_4DB   =  		0x05,
+    PGA_GAIN_VOL_36_0DB   = 	    0x06,
+    PGA_GAIN_VOL_34_6DB   =  		0x07,
+    PGA_GAIN_VOL_33_0DB   = 	    0x08,//33.0dB
+    PGA_GAIN_VOL_30_1DB   =  		0x09,
+    PGA_GAIN_VOL_27_0DB   = 	    0x0a,
+    PGA_GAIN_VOL_24_0DB   =  		0x0b,
+    PGA_GAIN_VOL_21_0DB   = 	    0x0c,
+    PGA_GAIN_VOL_15_0DB   =  		0x0d,
+    PGA_GAIN_VOL_9_0DB    = 	    0x0e,
+    PGA_GAIN_VOL_0_0DB    =  		0x0f,
+};
+
+#define		SET_PGA_CHN_ON(v)				do{\
+												unsigned char val=analog_read(0x80+124);\
+												val &= (~(v));\
+												analog_write(0x80+124,val);\
+											}while(0)
+#define		SET_PGA_LEFT_P_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xfc;\
+												val |= (((unsigned char)(v))&0x03);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_LEFT_N_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xf3;\
+												val |= (((unsigned char)(v)<<2)&0x0c);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_RIGHT_P_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0xcf;\
+												val |= (((unsigned char)(v)<<4)&0x30);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_RIGHT_N_AIN(v)			do{\
+												unsigned char val=ReadAnalogReg(0x80+125);\
+												val &= 0x3f;\
+												val |= (((unsigned char)(v)<<6)&0xc0);\
+												WriteAnalogReg(0x80+125,val);\
+											}while(0)
+
+#define		SET_PGA_GAIN_FIX_VALUE(v)		do{\
+												unsigned char val=0;\
+												val |= (((unsigned char)(v))&0x7f);\
+												write_reg8(0xb63,val|0x80);\
+											}while(0)
+
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pke.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pke.h
new file mode 100644
index 00000000..a1092d02
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pke.h
@@ -0,0 +1,408 @@
+/********************************************************************************************************
+ * @file    pke.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+
+
+
+
+#define GET_WORD_LEN(bitLen)     ((bitLen+31)/32)
+#define GET_BYTE_LEN(bitLen)     ((bitLen+7)/8)
+
+#define PKE_BASE             	 (0X802000)
+#define reg_pke_a_ram(a)		 ((volatile unsigned long *)(PKE_BASE+0x0400+(a)*(0x24)))
+#define reg_pke_b_ram(b)		 ((volatile unsigned long *)(PKE_BASE+0x1000+(b)*(0x24)))
+
+/********* oprand length *********/
+#define PKE_OPERAND_MAX_WORD_LEN      (0x08)
+#define PKE_OPERAND_MAX_BIT_LEN       (0x100)
+#define ECC_MAX_WORD_LEN              PKE_OPERAND_MAX_WORD_LEN
+#define ECC_MAX_BIT_LEN               PKE_OPERAND_MAX_BIT_LEN
+
+#ifndef NULL
+#define NULL  0
+#endif
+
+
+/********* eccp curve struct *********/
+typedef struct
+{
+    unsigned int eccp_p_bitLen;        //bit length of prime p
+    unsigned int eccp_n_bitLen;        //bit length of order n
+    unsigned int *eccp_p;
+    unsigned int *eccp_p_h;
+    unsigned int *eccp_p_n1;
+    unsigned int *eccp_a;
+    unsigned int *eccp_b;
+    unsigned int *eccp_Gx;
+    unsigned int *eccp_Gy;
+    unsigned int *eccp_n;
+    unsigned int *eccp_n_h;
+    unsigned int *eccp_n_n1;
+} eccp_curve_t;
+
+typedef struct
+{
+	unsigned int mont_p_bitLen;        //bit length of prime p
+	unsigned int *mont_p;
+	unsigned int *mont_p_h;
+	unsigned int *mont_p_n1;
+	unsigned int *mont_a24;
+	unsigned int *mont_u;
+	unsigned int *mont_v;
+	unsigned int *mont_n;
+	unsigned int *mont_n_h;
+	unsigned int *mont_n_n1;
+	unsigned int *mont_h;
+} mont_curve_t;
+
+typedef struct
+{
+    unsigned int edward_p_bitLen;        //bit length of prime p
+    unsigned int *edward_p;
+    unsigned int *edward_p_h;
+    unsigned int *edward_p_n1;
+    unsigned int *edward_d;
+    unsigned int *edward_Gx;
+    unsigned int *edward_Gy;
+    unsigned int *edward_n;
+    unsigned int *edward_n_h;
+    unsigned int *edward_n_n1;
+    unsigned int *edward_h;
+
+} edward_curve_t;
+
+
+//PKE return code
+typedef enum
+{
+    PKE_SUCCESS = 0,
+	PKE_ACTIVE_STOP,
+    PKE_MOD_INV_NOT_EXIST,
+    PKE_POINT_NOT_ON_CURVE,
+    PKE_INVALID_MICRO_CODE,
+	PKE_POINTOR_NULL,
+	PKE_INVALID_INPUT,
+}pke_ret_code_e;
+
+typedef enum{
+	PKE_EXE_CFG_ALL_NON_MONT = 0x15,
+	PKE_EXE_CFG_ALL_MONT	 = 0x2A,
+}pke_exe_cfg_e;
+
+typedef enum{
+	PKE_MICROCODE_PDBL = 0x04,
+	PKE_MICROCODE_PADD = 0x08,
+	PKE_MICROCODE_PVER = 0x0C,
+	PKE_MICROCODE_PMUL = 0x10,
+	PKE_MICROCODE_MODMUL = 0x18,
+	PKE_MICROCODE_MODINV = 0x1C,
+	PKE_MICROCODE_MODADD = 0x20,
+	PKE_MICROCODE_MODSUB = 0x24,
+	PKE_MICROCODE_CAL_PRE_MON = 0x28,
+	PKE_MICROCODE_C25519_PMUL = 0x34,
+	PKE_MICROCODE_Ed25519_PMUL = 0x38,
+	PKE_MICROCODE_Ed25519_PADD = 0x3C,
+
+}pke_microcode_e;
+
+/**
+ * @brief		compare big integer a and b
+ * @param[in] 	a 			- value
+ * @param[in] 	aWordLen  	- the length of a
+ * @param[in] 	b			- value
+ * @param[in] 	bWordLen	- the length of b
+ * @return		0:a=b,   1:a>b,   -1: a<b
+ */
+//signed int uint32_big_num_cmp(unsigned int *a, unsigned int aWordLen, unsigned int *b, unsigned int bWordLen);
+signed int big_integer_compare(unsigned int *a, unsigned int aWordLen, unsigned int *b, unsigned int bWordLen);
+/**
+ * @brief		c = a - b
+ * @param[in]   a -  integer a
+ * @param[in]   b -  integer b
+ * @param[out]  c -  integer c = a - b
+ * @return		none
+ */
+//void uint32_big_sub(unsigned int *a, unsigned int *b, unsigned int *c, unsigned int wordLen);
+void sub_u32(unsigned int *a, unsigned int *b, unsigned int *c, unsigned int wordLen);
+/**
+ * @brief		a = a/(2^n)
+ * @param[in]   a - big integer a
+ * @param[in]   aWordLen - word length of a
+ * @param[in]   n - exponent of 2^n
+ * @return		word length of a = a/(2^n)
+ * @caution:	1. make sure aWordLen is real word length of a
+ *     			2. a may be 0, then aWordLen is 0, to make sure aWordLen-1 is available, so data
+ *        		   type of aWordLen is int32_t, not uint32_t
+ */
+//unsigned int uint32_big_div2n(unsigned int a[], signed int aWordLen, unsigned int n);
+unsigned int div2n_u32(unsigned int a[], signed int aWordLen, unsigned int n);
+/**
+ * @brief      This function serves to get pke status.
+ * @param[in]  none.
+ * @return     pke status.
+ */
+static inline unsigned int pke_get_irq_status(void)
+{
+    return reg_pke_stat & FLD_PKE_STAT_DONE;
+}
+/**
+ * @brief      This function serves to clear pke status.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_clr_irq_status(void)
+{
+	BM_CLR(reg_pke_stat, FLD_PKE_STAT_DONE);
+}
+/**
+ * @brief      This function serves to enable pke interrupt function.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_set_irq_mask(void)
+{
+	BM_SET(reg_pke_conf, FLD_PKE_CONF_IRQ_EN);
+}
+/**
+ * @brief      This function serves to disable PKE interrupt function.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_clr_irq_mask(void)
+{
+	BM_CLR(reg_pke_conf, FLD_PKE_CONF_IRQ_EN);
+}
+/**
+ * @brief      set operation micro code.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_set_microcode(pke_microcode_e addr)
+{
+	reg_pke_mc_ptr = addr;
+}
+/**
+ * @brief      set exe config.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_set_exe_cfg(pke_exe_cfg_e cfg)
+{
+	reg_pke_exe_conf = cfg;
+}
+/**
+ * @brief      start pke calculate.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_opr_start(void)
+{
+	BM_SET(reg_pke_ctrl, FLD_PKE_CTRL_START);
+}
+/**
+ * @brief      	This is used to indicate the reason when the pke stopped.
+ * @param[in]  	none
+ * @return     	0 - normal stop.
+ * 				1 - received a termination request(CTRL.STOP is high)
+ * 				2 - no valid modulo inverse
+ * 				3 - point is not on the curve(CTRL.CMD:PVER)
+ * 				4 - invalid microcode
+ */
+static inline unsigned char pke_check_rt_code(void)
+{
+    return (unsigned char)(reg_pke_rt_code & FLD_PKE_RT_CODE_STOP_LOG);
+}
+/**
+ * @brief      set operand width please make sure 0 < bitLen <= 256.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pke_set_operand_width(unsigned int bitLen)
+{
+	BM_CLR(reg_pke_conf, FLD_PKE_CONF_PARTIAL_RADIX);
+	BM_SET(reg_pke_conf, GET_WORD_LEN(bitLen)<<16);
+	BM_CLR(reg_pke_conf, FLD_PKE_CONF_BASE_RADIX);
+	BM_SET(reg_pke_conf, 2<<24);
+}
+/**
+ * @brief		load the pre-calculated mont parameters H(R^2 mod modulus) and
+ * 				n1( - modulus ^(-1) mod 2^w )
+ * @param[in] 	H 	  	- R^2 mod modulus
+ * @param[in] 	n1 	  	-  modulus ^(-1) mod 2^w, here w is 32 acutally
+ * @param[in] 	wordLen - word length of modulus or H
+ * @return: 	none
+ */
+void pke_load_pre_calc_mont(unsigned int *H, unsigned int *n1, unsigned int wordLen);
+/**
+ * @brief       calc h(R^2 mod modulus) and n1( - modulus ^(-1) mod 2^w ) for modmul, pointMul. etc.
+ * 				here w is bit width of word, i,e. 32.
+ * @param[in]   modulus - input, modulus
+ * @param[in]   wordLen - input, word length of modulus or H
+ * @param[out]  PKE_A3 	-  R^2 mod modulus
+ * @param[out]  PKE_B4	-  modulus ^(-1) mod 2^w, here w is 32 acutally
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_calc_pre_mont(const unsigned int *modulus, unsigned int wordLen);
+/**
+ * @brief       ECCP curve point del point, Q=2P
+ * @param[in]   curve	- ECCP_CURVE struct pointer
+ * @param[in]   Px 		- x coordinate of point P
+ * @param[in]   Py 		- y coordinate of point P
+ * @param[out]  Qx 		- x coordinate of point Q
+ * @param[out]  Qy 		- y coordinate of point Q
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_eccp_point_del(eccp_curve_t *curve, unsigned int *k, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+/**
+ * @brief       ECCP curve point add, Q=P1+P2
+ * @param[in]   eccp_curve 	- ECCP_CURVE struct pointer
+ * @param[in]   P1x 		- x coordinate of point P1
+ * @param[in]   P1y 		- y coordinate of point P1
+ * @param[in]   P2x 		- x coordinate of point P2
+ * @param[in]   P2y 		- y coordinate of point P2
+ * @param[out]  Qx 			- x coordinate of point Q=P1+P2
+ * @param[out]  Qy 			- y coordinate of point Q=P1+P2
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_eccp_point_add(eccp_curve_t *curve, unsigned int *P1x, unsigned int *P1y, unsigned int *P2x, unsigned int *P2y,
+					  unsigned int *Qx, unsigned int *Qy);
+/**
+ * @brief       check whether the input point P is on ECCP curve or not
+ * @param[in]   curve	- ECCP_CURVE struct pointer
+ * @param[in]   Px		- x coordinate of point P
+ * @param[in]   Py		- y coordinate of point P
+ * @return      PKE_SUCCESS(success, on the curve), other(error or not on the curve)
+ */
+unsigned char pke_eccp_point_verify(eccp_curve_t *curve, unsigned int *Px, unsigned int *Py);
+/**
+ * @brief       ECCP curve point mul(random point), Q=[k]P
+ * @param[in]   curve	- ECCP_CURVE struct pointer
+ * @param[in]   k	 	- scalar
+ * @param[in]   Px 		- x coordinate of point P
+ * @param[in]   Py 		- y coordinate of point P
+ * @param[out]  Qx 		- x coordinate of point Q
+ * @param[out]  Qy 		- y coordinate of point Q
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_eccp_point_mul(eccp_curve_t *curve, unsigned int *k, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+/**
+ * @brief       out = a*b mod modulus
+ * @param[in]   modulus	- modulus
+ * @param[in]   a 		- integer a
+ * @param[in]   b 		- integer b
+ * @param[in]   wordLen	- word length of modulus, a, b
+ * @param[out]  out		- out = a*b mod modulus
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_mod_mul(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+ 							unsigned int *out, unsigned int wordLen);
+/**
+ * @brief       ainv = a^(-1) mod modulus
+ * @param[in]   modulus		- modulus
+ * @param[in]   a 			- integer a
+ * @param[in]   ainv 		- ainv = a^(-1) mod modulus
+ * @param[in]   modWordLen	- word length of modulus, ainv
+ * @param[in]   aWordLen 	- word length of integer a
+ * @return: 	PKE_SUCCESS(success), other(inverse not exists or error)
+ */
+ unsigned char pke_mod_inv(const unsigned int *modulus, const unsigned int *a, unsigned int *ainv, unsigned int modWordLen,
+ 				   unsigned int aWordLen);
+/**
+ * @brief       out = (a+b) mod modulus
+ * @param[in]   modulus - modulus
+ * @param[in]   a 		- integer a
+ * @param[in]   b 		- integer b
+ * @param[in]   wordLen - word length of modulus, a, b
+ * @param[out]  out 	- out = a+b mod modulus
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_mod_add(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+				   unsigned int *out, unsigned int wordLen);
+/**
+ * @brief       out = (a-b) mod modulus
+ * @param[in]   modulus	- input, modulus
+ * @param[in]  	a		- input, integer a
+ * @param[in]   b		- input, integer b
+ * @param[in]   wordLen - input, word length of modulus, a, b
+ * @param[out]  out		- output, out = a-b mod modulus
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_mod_sub(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+ 				   unsigned int *out, unsigned int wordLen);
+/**
+ * @brief       c25519 point mul(random point), Q=[k]P
+ * @param[in]   curve	- c25519 curve struct pointer
+ * @param[in]  	k		- scalar
+ * @param[in]   Pu		- u coordinate of point P
+ * @param[out]  Qu		- u coordinate of point Q
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_x25519_point_mul(mont_curve_t *curve, unsigned int *k, unsigned int *Pu, unsigned int *Qu);
+/**
+ * @brief       edwards25519 curve point mul(random point), Q=[k]P
+ * @param[in]   curve	- edwards25519 curve struct pointer
+ * @param[in]  	k		- scalar
+ * @param[in]   Px 		- x coordinate of point P
+ * @param[in]   Py 		- y coordinate of point P
+ * @param[out]  Qx 		- x coordinate of point Q
+ * @param[out]  Qy 		- y coordinate of point Q
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_ed25519_point_mul(edward_curve_t *curve, unsigned int *k, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+/**
+ * @brief       edwards25519 point add, Q=P1+P2
+ * @param[in]   curve	- edwards25519 curve struct pointer
+ * @param[in]  	k		- scalar
+ * @param[in]   P1x 		- x coordinate of point P1
+ * @param[in]   P1y 		- y coordinate of point P1
+ * @param[in]   P2x 		- x coordinate of point P2
+ * @param[in]   P2y 		- y coordinate of point P2
+ * @param[out]  Qx 			- x coordinate of point Q=P1+P2
+ * @param[out]  Qy 			- y coordinate of point Q=P1+P2
+ * @return      PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_ed25519_point_add(edward_curve_t *curve, unsigned int *P1x, unsigned int *P1y, unsigned int *P2x, unsigned int *P2y,
+					  unsigned int *Qx, unsigned int *Qy);
+/**
+ * @brief		c = a mod b
+ * @param[in]   modulus  - modulus
+ * @param[in]   a 		 - integer a
+ * @param[in]   b 		 - integer b
+ * @param[in]   aWordLen - word length of a
+ * @param[in]   bWordLen - word length of b
+ * @return		PKE_SUCCESS(success), other(error)
+ */
+unsigned char pke_mod(unsigned int *a, unsigned int aWordLen, unsigned int *b, unsigned int *b_h, unsigned int *b_n1,
+				unsigned int bWordLen, unsigned int *c);
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pm.h
new file mode 100644
index 00000000..466120e0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pm.h
@@ -0,0 +1,383 @@
+/********************************************************************************************************
+ * @file    pm.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "gpio.h"
+#include "clock.h"
+
+
+#define XTAL_READY_CHECK_TIMING_OPTIMIZE	1
+
+#define RAM_CRC_EN							1	//if use RAM_CRC func, retention ldo will turn down to 0.6V in A1, A0 is 0.8V.
+
+//when timer wakeup,the DCDC delay time is accurate,but other wake-up sources wake up,
+//this time is ((PM_DCDC_DELAY_CYCLE+1)*2-1)*32us ~ (PM_DCDC_DELAY_CYCLE+1)*2*32us
+#define PM_DCDC_DELAY_DURATION     			187  // delay_time_us = (PM_DCDC_DELAY_CYCLE+1)*2*32us
+												 // 2 * 1/16k = 125 uS, 3 * 1/16k = 187.5 uS  4*1/16k = 250 uS
+
+#define PM_XTAL_MANUAL_MODE_DELAY		    200  //150  200
+
+#if(PM_DCDC_DELAY_DURATION == 62)
+#define PM_DCDC_DELAY_CYCLE		0
+#elif(PM_DCDC_DELAY_DURATION == 125)
+#define PM_DCDC_DELAY_CYCLE		1
+#elif(PM_DCDC_DELAY_DURATION == 187)
+#define PM_DCDC_DELAY_CYCLE		2
+#elif(PM_DCDC_DELAY_DURATION == 250)
+#define PM_DCDC_DELAY_CYCLE		3
+#endif
+
+#define EARLYWAKEUP_TIME_US_SUSPEND 		(PM_DCDC_DELAY_DURATION + PM_XTAL_MANUAL_MODE_DELAY + 200)  //100: code running time margin//154  //175
+#define EARLYWAKEUP_TIME_US_DEEP_RET    	(PM_DCDC_DELAY_DURATION + 64)//(PM_DCDC_DELAY_DURATION + 32)
+#define EMPTYRUN_TIME_US       	    		(EARLYWAKEUP_TIME_US_SUSPEND + 200)
+
+#define EARLYWAKEUP_TIME					19
+#define	tick_32k_tick_per_ms				32
+#define PM_EMPTYRUN_TIME_US					25
+
+
+/**
+ * @brief analog register below can store information when MCU in deepsleep mode
+ * 	      store your information in these ana_regs before deepsleep by calling analog_write function
+ * 	      when MCU wakeup from deepsleep, read the information by by calling analog_read function
+ * 	      Reset these analog registers only by power cycle
+ */
+#define DEEP_ANA_REG0                       0x3a //initial value =0x00
+#define DEEP_ANA_REG1                       0x3b //initial value =0x00
+#define DEEP_ANA_REG2                       0x3c //initial value =0x0f
+
+/**
+ * @brief these analog register can store data in deepsleep mode or deepsleep with SRAM retention mode.
+ * 	      Reset these analog registers by watchdog, chip reset, RESET Pin, power cycle
+ */
+#define DEEP_ANA_REG6                       0x35 //initial value =0x20
+#define DEEP_ANA_REG7                       0x36 //initial value =0x00
+#define DEEP_ANA_REG8                       0x37 //initial value =0x00
+#define DEEP_ANA_REG9                       0x38 //initial value =0x00
+#define DEEP_ANA_REG10                      0x39 //initial value =0xff
+
+
+#define SYS_NEED_REINIT_EXT32K			    BIT(0)
+#define SYS_DEEP_SLEEP_FLAG					BIT(1)
+
+
+//ana3b system used, user can not use
+#define SYS_DEEP_ANA_REG 					DEEP_ANA_REG1
+#define WAKEUP_STATUS_TIMER_CORE     	    ( WAKEUP_STATUS_TIMER | WAKEUP_STATUS_CORE)
+#define WAKEUP_STATUS_TIMER_PAD		        ( WAKEUP_STATUS_TIMER | WAKEUP_STATUS_PAD)
+
+#define	ZB_POWER_DOWN						1 //weather to power down the RF before suspend
+#define	AUDIO_POWER_DOWN					1 //weather to power down the AUDIO before suspend
+#define	USB_POWER_DOWN						1 //weather to power down the USB before suspend  //PA5/PA6 pad low wakeup need USB power on
+
+/**
+ * @brief sleep mode.
+ */
+typedef enum {
+	//available mode for customer
+	SUSPEND_MODE						= 0x00,
+
+	DEEPSLEEP_MODE						= 0x30,		//when use deep mode pad wakeup(low or high level), if the high(low) level always in
+													//the pad, system will not enter sleep and go to below of pm API, will reboot by core_6f = 0x20
+													//deep retention also had this issue, but not to reboot.
+	DEEPSLEEP_MODE_RET_SRAM_LOW16K  	= 0x21,  //for boot from sram
+	DEEPSLEEP_MODE_RET_SRAM_LOW32K  	= 0x03,  //for boot from sram
+
+	//not available mode
+	DEEPSLEEP_RETENTION_FLAG			= 0x0F,
+}SleepMode_TypeDef;
+
+
+/**
+ * @brief   wakeup source
+ */
+typedef enum {
+	 //available wake-up source for customer
+	 PM_WAKEUP_PAD   		= BIT(3),
+	 PM_WAKEUP_CORE  		= BIT(4),
+	 PM_WAKEUP_TIMER 		= BIT(5),
+	 PM_WAKEUP_COMPARATOR 	= BIT(6),
+	 PM_WAKEUP_MDEC		 	= BIT(7),
+}SleepWakeupSrc_TypeDef;
+
+/**
+ * @brief   wakeup status
+ */
+enum {
+	 WAKEUP_STATUS_COMPARATOR  		= BIT(0),
+	 WAKEUP_STATUS_TIMER  			= BIT(1),
+	 WAKEUP_STATUS_CORE 			= BIT(2),
+	 WAKEUP_STATUS_PAD    			= BIT(3),
+	 WAKEUP_STATUS_MDEC    			= BIT(4),
+
+	 STATUS_GPIO_ERR_NO_ENTER_PM  	= BIT(7),
+	 STATUS_ENTER_SUSPEND  			= BIT(30),
+};
+
+/**
+ * @brief   mcu status
+ */
+typedef enum{
+	MCU_STATUS_BOOT,
+	MCU_STATUS_DEEPRET_BACK,
+	MCU_STATUS_DEEP_BACK,
+}pm_mcu_status;
+
+/**
+ * @brief   deepsleep wakeup status
+ */
+typedef struct{
+	unsigned char is_pad_wakeup;
+	unsigned char wakeup_src;
+	unsigned char mcu_status;
+}pm_para_t;
+
+
+typedef int (*suspend_handler_t)(void);
+typedef unsigned int (*pm_tim_recover_handler_t)(unsigned int);
+typedef int (*cpu_pm_handler_t)(SleepMode_TypeDef sleep_mode,  SleepWakeupSrc_TypeDef wakeup_src, unsigned int  wakeup_tick);
+
+extern suspend_handler_t func_before_suspend;
+extern pm_tim_recover_handler_t pm_tim_recover;
+extern cpu_pm_handler_t cpu_sleep_wakeup;
+extern pm_para_t pmParam;
+
+extern unsigned char PA5_PA6_DEEPSLEEP_LOW_LEVEL_WAKEUP_EN;
+extern unsigned int RAM_CRC_EN_16KRAM_TIME;
+extern unsigned int RAM_CRC_EN_32KRAM_TIME;
+extern unsigned char SOFT_START_DLY;
+extern unsigned int EARLYWAKEUP_TIME_US_DEEP;
+
+void bls_pm_registerFuncBeforeSuspend(suspend_handler_t func);
+
+/**
+ * @brief      This function serves to enable dp and dm deep gpio low level wakeup. if enable, current will
+ * 						add about 0.1uA
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void deepsleep_dp_dm_gpio_low_wake_enable(void)
+{
+	PA5_PA6_DEEPSLEEP_LOW_LEVEL_WAKEUP_EN = 0;
+}
+/**
+ * @brief      This function serves to disable dp and dm deep gpio low level wakeup.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void deepsleep_dp_dm_gpio_low_wake_disable(void)
+{
+	PA5_PA6_DEEPSLEEP_LOW_LEVEL_WAKEUP_EN = 1;
+}
+
+/**
+ * @brief      This function serves to change the timing of enable ram crc.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void ram_crc_en_timing(unsigned int RAM_CRC_16K_Timing, unsigned int RAM_CRC_32K_Timing)
+{
+	RAM_CRC_EN_16KRAM_TIME = RAM_CRC_16K_Timing;
+	RAM_CRC_EN_32KRAM_TIME = RAM_CRC_32K_Timing;
+}
+
+/**
+ * @brief      This function serves to change the timing of soft start delay.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void soft_start_dly_time(unsigned char soft_start_time)
+{
+	SOFT_START_DLY = soft_start_time;
+	EARLYWAKEUP_TIME_US_DEEP = PM_DCDC_DELAY_DURATION + 32 + ((SOFT_START_DLY)*62);
+}
+
+/**
+ * @brief      This function serves to get mcu status.
+ * @param[in]  none.
+ * @return     pm_mcu_status
+ */
+static inline unsigned char pm_get_mcu_status(void)
+{
+	return pmParam.mcu_status;
+}
+
+/**
+ * @brief      This function serves to determine whether mcu is waked up by pad.
+ * @param[in]  none.
+ * @return     1- yes , 0- no.
+ */
+static inline unsigned char pm_is_padWakeup(void)
+{
+	return pmParam.is_pad_wakeup;
+}
+
+/**
+ * @brief      This function serves to get the source of wake-up.
+ * @param[in]  none.
+ * @return     wakeup source.
+ */
+static inline unsigned char pm_get_wakeup_src(void)
+{
+	return pmParam.wakeup_src;
+}
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer0.
+ * @param   tick - capture value of timer0.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer0(unsigned int tick);
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer1.
+ * @param   tick - capture value of timer1.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer1(unsigned int tick);
+
+/**
+ * @brief   This function serves to wake up cpu from stall mode by timer2.
+ * @param   tick - capture value of timer2.
+ * @return  none.
+ */
+void cpu_stall_wakeup_by_timer2(unsigned int tick);
+
+/**
+ * @brief      This function configures a GPIO pin as the wakeup pin.
+ * @param[in]  pin - the pin needs to be configured as wakeup pin
+ * @param[in]  pol - the wakeup polarity of the pad pin(0: low-level wakeup, 1: high-level wakeup)
+ * @param[in]  en  - enable or disable the wakeup function for the pan pin(1: Enable, 0: Disable)
+ * @return     none
+ */
+void cpu_set_gpio_wakeup(GPIO_PinTypeDef pin, GPIO_LevelTypeDef pol, int en);
+
+/**
+ * @brief     This function servers to set the match value for MDEC wakeup.
+ * @param[in] value - the MDEC match value for wakeup.
+ * @return    none
+ */
+void cpu_set_mdec_value_wakeup(unsigned char value);
+
+/**
+ * @brief   This function serves to get the 32k tick.
+ * @param   none
+ * @return  tick of 32k .
+ */
+extern unsigned int pm_get_32k_tick(void);
+
+/**
+ * @brief   This function serves to initialize MCU
+ * @param   power mode- set the power mode(LOD mode, DCDC mode, DCDC_LDO mode)
+ * @param   xtal- set this parameter based on external crystal
+ * @return  none
+ */
+void cpu_wakeup_init(POWER_MODE_TypeDef power_mode, XTAL_TypeDef xtal);
+
+/**
+ * @brief   This function serves to recover system timer from tick of internal 32k RC.
+ * @param   none.
+ * @return  none.
+ */
+unsigned int pm_tim_recover_32k_rc(unsigned int now_tick_32k);
+
+/**
+ * @brief   This function serves to recover system timer from tick of external 32k crystal.
+ * @param   none.
+ * @return  none.
+ */
+unsigned int pm_tim_recover_32k_xtal(unsigned int now_tick_32k);
+
+/**
+ * @brief      This function serves to set the working mode of MCU based on 32k crystal,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of short sleep, which means MCU can sleep for less than 5 minutes.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int cpu_sleep_wakeup_32k_rc(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function serves to set the working mode of MCU based on 32k crystal,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of short sleep, which means MCU can sleep for less than 5 minutes.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int cpu_sleep_wakeup_32k_xtal(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function serves to set the working mode of MCU,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]  sleep_mode - sleep mode type select.
+ * @param[in]  wakeup_src - wake up source select.
+ * @param[in]  wakeup_tick - the time of short sleep, which means MCU can sleep for more than 1 day.
+ * @return     indicate whether the cpu is wake up successful.
+ */
+int pm_long_sleep_wakeup(SleepMode_TypeDef sleep_mode, SleepWakeupSrc_TypeDef wakeup_src, unsigned int wakeup_tick);
+
+/**
+ * @brief      This function serves to determine whether wake up source is internal 32k RC.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pm_select_internal_32k_rc(void)
+{
+	cpu_sleep_wakeup 	 	= cpu_sleep_wakeup_32k_rc;
+	pm_tim_recover  	 	= pm_tim_recover_32k_rc;
+}
+
+/**
+ * @brief      This function serves to determine whether wake up source is external 32k RC.
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void pm_select_external_32k_crystal(void)
+{
+	cpu_sleep_wakeup 	 	= cpu_sleep_wakeup_32k_xtal;
+	pm_tim_recover		 	= pm_tim_recover_32k_xtal;
+}
+
+
+/**********************************  Internal APIs (not for user)***************************************************/
+extern  unsigned char 		    tl_multi_addr_L;
+extern  unsigned char 		    tl_multi_addr_H;
+extern  unsigned char 		    tl_24mrc_cal;
+extern 	unsigned int 			tick_32k_calib;
+extern  unsigned int 			tick_cur;
+extern  unsigned int 			tick_32k_cur;
+extern  unsigned char       	pm_long_suspend;
+
+void sleep_start(void);
+
+unsigned int pm_get_info0(void);
+
+unsigned int pm_get_info1(void);
+
+unsigned int cpu_get_32k_tick(void);
+
+void cpu_set_32k_tick(unsigned int tick);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pwm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pwm.h
new file mode 100644
index 00000000..b960614b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/pwm.h
@@ -0,0 +1,413 @@
+/********************************************************************************************************
+ * @file    pwm.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef PWM_H_
+#define PWM_H_
+
+#include "register.h"
+#include "bit.h"
+#include "timer.h"
+
+
+/**
+ * @brief  enum variable, the number of PWM channels supported
+ */
+typedef enum {
+	PWM0_ID = 0,
+	PWM1_ID,
+	PWM2_ID,
+	PWM3_ID,
+	PWM4_ID,
+	PWM5_ID,
+}pwm_id;
+
+/**
+ * @brief  enum variable used for PWM work mode setting
+ */
+typedef enum{
+	PWM_NORMAL_MODE   = 0x00,
+	PWM_COUNT_MODE    = 0x01,
+	PWM_IR_MODE       = 0x03,
+	PWM_IR_FIFO_MODE  = 0x07,
+	PWM_IR_DMA_FIFO_MODE  = 0x0F,
+}pwm_mode;
+
+/**
+ * pwm interrupt source
+ */
+typedef enum{
+	PWM_IRQ_PWM0_PNUM =					BIT(0),
+	PWM_IRQ_PWM0_IR_DMA_FIFO_DONE =		BIT(1),
+	PWM_IRQ_PWM0_FRAME =				BIT(2),
+	PWM_IRQ_PWM1_FRAME =				BIT(3),
+	PWM_IRQ_PWM2_FRAME =				BIT(4),
+	PWM_IRQ_PWM3_FRAME =				BIT(5),
+	PWM_IRQ_PWM4_FRAME =				BIT(6),
+	PWM_IRQ_PWM5_FRAME =				BIT(7),
+	PWM_IRQ_PWM0_IR_FIFO =              BIT(16)
+}PWM_IRQ;
+
+typedef enum{
+	PWM0_PULSE_NORMAL =		0,       // duty cycle and period from TCMP0/TMAX0 					 0x794~0x797
+	PWM0_PULSE_SHADOW =		BIT(14), // duty cycle and period from TCMP0_SHADOW / TMAX0_SHADOW   0x7c4~0x7c7
+}Pwm0Pulse_SelectDef;
+
+
+/**
+ * @brief     This fuction servers to set pwm mode.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] mode - variable of enum to indicates the pwm mode.
+ * @return	  none.
+ */
+static inline void pwm_set_mode(pwm_id id, pwm_mode mode){
+	if(PWM0_ID == id){
+		reg_pwm0_mode = mode;  //only PWM0 has count/IR/fifo IR mode
+	}
+}
+
+
+/**
+ * @brief     This fuction servers to set pwm clock frequency
+ * @param[in] system_clock_hz - variable to set system clock hz.
+ * @param[in] pwm_clk - variable of the pwm clock.
+ * @return	  none.
+ */
+static inline void pwm_set_clk(int system_clock_hz, int pwm_clk){
+	reg_pwm_clk = (int)system_clock_hz /pwm_clk - 1;
+}
+
+/**
+ * @brief     This fuction servers to set pwm count status(CMP) time.
+ * @param[in] pwm_id  - variable of enum to select the pwm number.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_cmp(pwm_id id, unsigned short cmp_tick)
+{
+	reg_pwm_cmp(id) = cmp_tick;
+}
+
+/**
+ * @brief     This fuction servers to set pwm cycle time.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @return	  none.
+ */
+static inline void pwm_set_cycle(pwm_id id, unsigned short cycle_tick){
+	reg_pwm_max(id) = cycle_tick;
+}
+
+/**
+ * @brief     This fuction servers to set pwm cycle time & count status.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_cycle_and_duty(pwm_id id, unsigned short cycle_tick, unsigned short cmp_tick){
+	reg_pwm_cycle(id) = MASK_VAL(FLD_PWM_CMP, cmp_tick, FLD_PWM_MAX, cycle_tick);
+}
+
+/**
+ * @brief     This fuction servers to set pwm cycle time & count status.
+ * @param[in] cycle_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_pwm0_shadow_cycle_and_duty(unsigned short cycle_tick, unsigned short cmp_tick)
+{
+	reg_pwm_tcmp0_shadow = cmp_tick;
+	reg_pwm_tmax0_shadow = cycle_tick;
+}
+
+/**
+ * @brief     This fuction servers to set the pwm phase.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] phase - variable of the pwm phase.
+ * @return	  none.
+ */
+static inline void pwm_set_phase(pwm_id id, unsigned short phase){
+	//PWM phase can not set in 825x now,  do nothing here
+}
+
+/**
+ * @brief     This fuction servers to set the pwm pulse number.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] pulse_num - variable of the pwm pulse number.
+ * @return	  none.
+ */
+static inline void pwm_set_pulse_num(pwm_id id, unsigned short pulse_num){
+	if(PWM0_ID == id){
+		reg_pwm0_pulse_num = pulse_num;
+	}
+}
+
+/**
+ * @brief     This fuction servers to start the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_start(pwm_id id)
+{
+	if(PWM0_ID == id)
+	{
+		BM_SET(reg_pwm0_enable, BIT(0));
+	}
+	else{
+		BM_SET(reg_pwm_enable, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to stop the pwm.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_stop(pwm_id id)
+{
+	if(PWM0_ID == id)
+	{
+		BM_CLR(reg_pwm0_enable, BIT(0));
+	}
+	else{
+		BM_CLR(reg_pwm_enable, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to revert the PWMx.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_revert(pwm_id id)
+{
+	reg_pwm_invert |= BIT(id);
+}
+
+/**
+ * @brief     This fuction servers to revert the PWMx_N.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_n_revert(pwm_id id)
+{
+	reg_pwm_n_invert |= BIT(id);
+}
+
+/**
+ * @brief     This fuction servers to enable the pwm polarity.
+ * @param[in] pwm_id - variable of enum to select the pwm number.
+ * @param[in] en: 1 enable. 0 disable.
+ * @return	  none.
+ */
+static inline void pwm_polo_enable(pwm_id id, int en)
+{
+	if(en){
+		BM_SET(reg_pwm_pol, BIT(id));
+	}else{
+		BM_CLR(reg_pwm_pol, BIT(id));
+	}
+}
+
+/**
+ * @brief     This fuction servers to mask the pwm interrupt.
+ * @param[in] irq - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_set_interrupt_enable(PWM_IRQ irq){
+	if(irq == PWM_IRQ_PWM0_IR_FIFO){
+		BM_SET(reg_pwm0_fifo_mode_irq_mask,BIT(0));
+	}else{
+	    BM_SET(reg_pwm_irq_mask, irq);
+	}
+}
+
+/**
+ * @brief     This fuction servers to clear the pwm mask.
+ * @param[in] irq  - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_set_interrupt_disable(PWM_IRQ irq){
+    if(irq == PWM_IRQ_PWM0_IR_FIFO){
+		BM_CLR(reg_pwm0_fifo_mode_irq_mask,BIT(0));
+	}else{
+		BM_CLR(reg_pwm_irq_mask, irq);
+	}
+ }
+
+/**
+ * @brief     This fuction servers to clear the pwm interrupt status.
+ * @param[in] irq  - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_clear_interrupt_status(PWM_IRQ status)
+{
+	if(status == PWM_IRQ_PWM0_IR_FIFO){
+		reg_pwm0_fifo_mode_irq_sta = BIT(0);
+	}else{
+		reg_pwm_irq_sta = status;
+	}
+}
+
+/**
+ * @brief     This fuction serves to set trigger level of interrupt for IR FiFo mode
+ * @param[in] trig_level - FIFO  num int trigger level
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_set_irq_trig_level(unsigned char trig_level)
+{
+	reg_pwm_ir_fifo_irq_trig_level = trig_level;
+}
+
+/**
+ * @brief     This fuction serves to clear data in fifo. Only when pwm is in not active mode,
+ * 			  it is possible to clear data in fifo.
+ * @param[in] none
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_clr_data(void)
+{
+	reg_pwm_ir_clr_fifo_data |= FLD_PWM0_IR_FIFO_CLR_DATA;
+}
+
+/**
+ * @brief     This fuction serves to get the number of data in fifo.
+ * @param[in] none
+ * @return	  the number of data in fifo
+ */
+static inline unsigned char pwm_ir_fifo_get_data_num(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_DATA_NUM);
+}
+
+/**
+ * @brief     This fuction serves to determine whether data in fifo is empty.
+ * @param[in] none
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_empty(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_EMPTY);
+}
+
+/**
+ * @brief     This fuction serves to determine whether data in fifo is full.
+ * @param[in] none
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_ir_fifo_is_full(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_FULL);
+}
+
+/**
+ * @brief     This fuction serves to write data into FiFo
+ * @param[in] pulse_num  - the number of pulse
+ * @param[in] use_shadow - determine whether the configuration of shadow cmp and shadow max is used
+ * 						   1: use shadow, 0: not use
+ * @param[in] carrier_en - enable sending carrier, 1: enable, 0: disable
+ * @return	  none
+ */
+static inline void pwm_ir_fifo_set_data_entry(unsigned short pulse_num, unsigned char use_shadow, unsigned char carrier_en)
+{
+	static unsigned char index=0;
+	unsigned short cfg_data = pulse_num + ((use_shadow&BIT(0))<<14) + ((carrier_en&BIT(0))<<15);
+	while(pwm_ir_fifo_is_full());
+	reg_pwm_ir_fifo_dat(index) = cfg_data;
+	index++;
+	index&=0x01;
+}
+
+/**
+ * @brief     This fuction serves to config the pwm's dma wave form.
+ * @param[in] carrier_en - must 1 or 0.
+ * @param[in] pulse_type - type of pwm0's pulse.
+ * @param[in] pulse_num - the number of pulse.
+ * @return	  none.
+ */
+static inline unsigned short pwm_config_dma_fifo_waveform(int carrier_en, Pwm0Pulse_SelectDef pulse_type, unsigned short pulse_num)
+{
+	return  ( carrier_en<<15 | pulse_type | (pulse_num & 0x3fff) );
+}
+
+/**
+ * @brief     This fuction servers to set the pwm's dma address.
+ * @param[in] pdat - variable of pointer to indicate the address.
+ * @return	  none.
+ * @note	  The maximum length that the PWM can send is 511bytes
+ */
+static inline void pwm_set_dma_address(void * pdat)
+{
+	reg_dma_pwm_addr = (unsigned short)((unsigned int)pdat);
+	reg_dma7_addrHi = 0x04;
+	reg_dma_pwm_mode  &= ~FLD_DMA_WR_MEM;
+	//In the PWM ir_dma_fifo model, the reg_dma7_size default is 0x14(20*16 = 320 bytes) (160 group configuration),
+	//when the pwm_dma send byte length is greater than 320 bytes, can appear abnormal,
+	//abnormal phenomenon: when after sending the first 160 group configuration waveform,
+	//waveform will send 160th group configuration, and not interrupt,
+	//so set reg_dma7_size to the maximum, it has been guaranteed that the maximum length supported by the hardware (511bytes) can be sent.
+	//The maximum length that dma hardware can send is limited to the setting range of the first four bytes in ram (the actual length of dma sent)
+	reg_dma7_size = 0xff;  
+}
+
+/**
+ * @brief     This fuction servers to start the pwm's IRQ sending.
+ * @param[in] none.
+ * @return	  none.
+ */
+static inline void pwm_start_dma_ir_sending(void)
+{
+	reg_dma_chn_en |= FLD_DMA_CHN_PWM;
+	reg_dma_tx_rdy0 |= FLD_DMA_CHN_PWM;
+}
+
+/**
+ * @brief     This fuction servers to stop the pwm's IRQ sending.
+ * @param[in] none.
+ * @return	  none.
+ */
+static inline void pwm_stop_dma_ir_sending(void)
+{
+	reg_rst0 = FLD_RST0_PWM;
+	sleep_us(20);  //1us <-> 4 byte
+	reg_rst0 = 0;
+}
+
+/**
+ * @brief     This fuction servers to get the pwm interrupt status.
+ * @param[in] status - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline unsigned char pwm_get_interrupt_status(PWM_IRQ status){
+
+	if(status == PWM_IRQ_PWM0_IR_FIFO){
+		return (reg_pwm0_fifo_mode_irq_sta & BIT(0));
+	}else{
+		return (reg_pwm_irq_sta & status);
+	}
+
+}
+
+#endif /* PWM_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/random.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/random.h
new file mode 100644
index 00000000..e0da21fb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/random.h
@@ -0,0 +1,51 @@
+/********************************************************************************************************
+ * @file    random.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+/**
+ * @brief     This function performs to get one random number.
+ *            TRNG Base address is 0x4400,read 4bytes one time to judge whether generator success.
+ *            and get 8bytes later to return the random value in order to sure the value is right.
+ * @param[in] none.
+ * @return    the value of one random number.
+ */
+void random_generator_init(void);
+
+/**
+ * @brief     This function performs to get one random number
+ * @param[in] none.
+ * @return    the value of one random number.
+ */
+unsigned int rand(void);
+
+
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/register.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/register.h
new file mode 100644
index 00000000..f571a253
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/register.h
@@ -0,0 +1,1398 @@
+/********************************************************************************************************
+ * @file    register.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "bit.h"
+#include "bsp.h"
+
+/********************************************************************************************
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ *****|								Digital  Register Table  						   |*****
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ ********************************************************************************************/
+
+/*******************************      i2c registers: 0x00      ******************************/
+#define reg_i2c_set				REG_ADDR32(0x00)
+#define reg_i2c_speed			REG_ADDR8(0x00)
+#define reg_i2c_id				REG_ADDR8(0x01)
+enum{
+	FLD_I2C_WRITE_READ_BIT  =  BIT(0),
+	FLD_I2C_ID              =  BIT_RNG(1,7),
+};
+
+#define reg_i2c_status			REG_ADDR8(0x02)
+enum{
+	FLD_I2C_CMD_BUSY		= 	BIT(0),
+	FLD_I2C_BUS_BUSY		= 	BIT(1),
+	FLD_I2C_NAK				= 	BIT(2),
+};
+
+#define reg_i2c_mode			REG_ADDR8(0x03)
+enum{
+	FLD_I2C_ADDR_AUTO_ADD 		=	BIT(0),
+	FLD_I2C_MASTER_EN			= 	BIT(1),      // 1: master, 0: slave
+	FLD_I2C_SLAVE_MAPPING 		=	BIT(2),      // write i2c data to predefined memory address which set by other register
+	FLD_I2C_HOLD_MASTER     	=   BIT(3),
+};
+
+#define reg_i2c_adr_dat			REG_ADDR16(0x04)
+#define reg_i2c_dat_ctrl		REG_ADDR32(0x04)
+#define reg_i2c_di_ctrl			REG_ADDR16(0x06)
+#define reg_i2c_adr				REG_ADDR8(0x04)
+#define reg_i2c_do				REG_ADDR8(0x05)
+#define reg_i2c_di				REG_ADDR8(0x06)
+#define reg_i2c_ctrl			REG_ADDR8(0x07)
+enum{
+	FLD_I2C_CMD_ID			= 		BIT(0),
+	FLD_I2C_CMD_ADDR		= 		BIT(1),
+	FLD_I2C_CMD_DO			= 		BIT(2),
+	FLD_I2C_CMD_DI			= 		BIT(3),
+	FLD_I2C_CMD_START		= 		BIT(4),
+	FLD_I2C_CMD_STOP		= 		BIT(5),
+	FLD_I2C_CMD_READ_ID		= 		BIT(6),
+	FLD_I2C_CMD_ACK			= 		BIT(7),
+};
+/*******************************  i2c address map registers: 0xe0      ******************************/
+#define reg_i2c_map_hadr		 	 REG_ADDR8(0xe0)
+
+#define reg_i2c_slave_map_addrl      REG_ADDR8(0xe1)
+#define reg_i2c_slave_map_addrm      REG_ADDR8(0xe2)
+#define reg_i2c_slave_map_addrh      REG_ADDR8(0xe3)
+
+#define reg_i2c_slave_irq_status 	 REG_ADDR8(0xe4)
+#define reg_spi_slave_irq_status 	 REG_ADDR8(0xe4)
+#define reg_i2c_map_host_status      REG_ADDR8(0xe4)
+enum{
+	FLD_HOST_CMD_IRQ  = 	BIT(0),  FLD_SLAVE_SPI_IRQ = FLD_HOST_CMD_IRQ,  //both host write & read trigger this status
+	FLD_HOST_READ_IRQ = 	BIT(1),                                        //only host read trigger this status
+};
+
+#define reg_i2c_map_read0		     REG_ADDR8(0xe5)
+#define reg_i2c_map_read1		     REG_ADDR8(0xe6)
+#define reg_i2c_map_read2		     REG_ADDR8(0xe7)
+
+/*******************************      spi registers: 0x08      ******************************/
+
+#define reg_spi_data			REG_ADDR8(0x08)
+#define reg_spi_ctrl			REG_ADDR8(0x09)
+enum{
+	FLD_SPI_CS 					= BIT(0),
+	FLD_SPI_MASTER_MODE_EN 		= BIT(1),
+	FLD_SPI_DATA_OUT_DIS 		= BIT(2),
+	FLD_SPI_RD			    	= BIT(3),
+	FLD_SPI_ADDR_AUTO_ADD  	 	= BIT(4),
+	FLD_SPI_SHARE_MODE      	= BIT(5),
+	FLD_SPI_BUSY         		= BIT(6),    // diff from doc,  bit 6 working
+};
+#define reg_spi_sp				REG_ADDR8(0x0a)
+enum{
+	FLD_MSPI_CLK = 		BIT_RNG(0,6),
+	FLD_SPI_ENABLE =			BIT(7),
+};
+
+#define reg_spi_inv_clk			REG_ADDR8(0x0b)   //spi supports four modes
+enum {
+    FLD_SPI_MODE_WORK_MODE = BIT_RNG(0,1),
+};
+
+/*******************************      mspi registers: 0x0c      ******************************/
+
+#define reg_mspi_data		REG_ADDR8(0x0c)
+#define reg_mspi_ctrl		REG_ADDR8(0x0d)
+
+enum{
+	FLD_MSPI_CS 	= 		BIT(0),
+	FLD_MSPI_SDO 	= 		BIT(1),
+	FLD_MSPI_CONT 	= 		BIT(2),
+	FLD_MSPI_RD 	= 		BIT(3),
+	FLD_MSPI_BUSY 	= 		BIT(4),
+};
+
+#define reg_mspi_mode      		REG_ADDR8(0x0f)
+enum
+{
+	FLD_MSPI_DUAL_DATA_MODE_EN  = BIT(0),
+	FLD_MSPI_DUAL_ADDR_MODE_EN  = BIT(1),
+	FLD_MSPI_CLK_DIV     	 	= BIT_RNG(2,7),
+};
+
+/*******************************      reset registers: 0x60      ******************************/
+
+#define reg_rst0				REG_ADDR8(0x60)
+enum{
+	FLD_RST0_SPI = 				BIT(0),
+	FLD_RST0_I2C = 				BIT(1),
+	FLD_RST0_UART = 			BIT(2),
+	FLD_RST0_USB = 				BIT(3),
+	FLD_RST0_PWM = 				BIT(4),
+	FLD_RST0_QDEC =				BIT(5),
+	FLD_RST0_SWIRE = 			BIT(7),
+};
+
+#define reg_rst1				REG_ADDR8(0x61)
+enum{
+	FLD_RST1_ZB = 				BIT(0),
+	FLD_RST1_SYS_TIMER = 		BIT(1),
+	FLD_RST1_DMA =				BIT(2),
+	FLD_RST1_ALGM = 			BIT(3),
+	FLD_RST1_AES = 				BIT(4),
+	FLD_RST1_ADC = 				BIT(5),
+	FLD_RST1_ALG =				BIT(6),
+};
+
+#define reg_rst2				REG_ADDR8(0x62)
+enum{
+	FLD_RST2_AIF =				BIT(0),
+	FLD_RST2_AUD =				BIT(1),
+	FLD_RST2_DFIFO =			BIT(2),
+	FLD_RST2_RISC =				BIT(4),
+	FLD_RST2_MCIC = 			BIT(5),
+	FLD_RST2_RISC1 =			BIT(6),
+	FLD_RST2_MCIC1 = 			BIT(7),
+};
+
+
+#define reg_clk_en0				REG_ADDR8(0x63)
+enum{
+	FLD_CLK0_SPI_EN = 			BIT(0),
+	FLD_CLK0_I2C_EN = 			BIT(1),
+	FLD_CLK0_UART_EN = 		BIT(2),
+	FLD_CLK0_USB_EN = 			BIT(3),
+	FLD_CLK0_PWM_EN = 			BIT(4),
+	FLD_CLK0_QDEC_EN = 			BIT(5),
+	FLD_CLK0_SWIRE_EN = 		BIT(7),
+};
+
+#define reg_clk_en1				REG_ADDR8(0x64)
+enum{
+	FLD_CLK1_ZB_EN = 			BIT(0),
+	FLD_CLK1_SYS_TIMER_EN = 	BIT(1),
+	FLD_CLK1_DMA_EN = 			BIT(2),
+	FLD_CLK1_ALGM_EN = 			BIT(3),
+	FLD_CLK1_AES_EN = 			BIT(4),
+
+};
+
+
+#define reg_clk_en2				REG_ADDR8(0x65)
+enum{
+	FLD_CLK2_AIF_EN = 			BIT(0),
+	FLD_CLK2_AUD_EN = 			BIT(1),
+	FLD_CLK2_DFIFO_EN = 		BIT(2),
+	FLD_CLK2_MC_EN = 			BIT(4),
+	FLD_CLK2_MCIC_EN = 			BIT(5),
+};
+
+
+#define reg_clk_sel				REG_ADDR8(0x66)
+enum{
+	FLD_SCLK_DIV = 				BIT_RNG(0,4),
+	FLD_SCLK_SEL =				BIT_RNG(5,6),
+	FLD_SCLK_HS_SEL =			BIT(7),
+};
+
+#define reg_i2s_step			REG_ADDR8(0x67)
+enum{
+	FLD_I2S_STEP = 				BIT_RNG(0,6),
+	FLD_I2S_CLK_EN =			BIT(7),
+};
+
+#define reg_i2s_mod				REG_ADDR8(0x68)
+
+#define reg_codec_clk_step			REG_ADDR8(0x6c)
+
+#define reg_codec_clk_mod 			REG_ADDR8(0x6d)
+
+#define reg_wakeup_en			REG_ADDR8(0x6e)
+enum{
+	FLD_WAKEUP_SRC_I2C = 		BIT(0),
+	FLD_WAKEUP_SRC_SPI =		BIT(1),
+	FLD_WAKEUP_SRC_USB =		BIT(2),
+	FLD_WAKEUP_SRC_GPIO =		BIT(3),
+	FLD_WAKEUP_SRC_I2C_SYN =	BIT(4),
+	FLD_WAKEUP_SRC_GPIO_RM =	BIT(5),
+	FLD_WAKEUP_SRC_USB_RESM =	BIT(6),
+	FLD_WAKEUP_SRC_RST_SYS =	BIT(7),
+};
+
+#define reg_pwdn_ctrl			REG_ADDR8(0x6f)
+enum
+{
+	FLD_PWDN_CTRL_REBOOT = BIT(5),
+	FLD_PWDN_CTRL_SLEEP  = BIT(7),
+};
+
+
+#define reg_mcu_wakeup_mask		REG_ADDR32(0x78)
+
+/*******************************      7816 registers: 0x7b      ******************************/
+
+#define reg_7816_clk_div		REG_ADDR8(0x7b)
+
+/*******************************      uart registers: 0x90      ******************************/
+
+#define reg_uart_data_buf0		REG_ADDR8(0x90)
+#define reg_uart_data_buf1		REG_ADDR8(0x91)
+#define reg_uart_data_buf2		REG_ADDR8(0x92)
+#define reg_uart_data_buf3		REG_ADDR8(0x93)
+
+#define reg_uart_data_buf(i)    REG_ADDR8(0x90 + (i))  //i = 0~3
+#define reg_uart_clk_div		REG_ADDR16(0x94)
+enum{
+	FLD_UART_CLK_DIV = 			BIT_RNG(0,14),
+	FLD_UART_CLK_DIV_EN = 		BIT(15)
+};
+
+#define reg_uart_ctrl0			REG_ADDR8(0x96)
+enum{
+	FLD_UART_BPWC = 			BIT_RNG(0,3),
+	FLD_UART_RX_DMA_EN = 		BIT(4),
+	FLD_UART_TX_DMA_EN =		BIT(5),
+	FLD_UART_RX_IRQ_EN = 		BIT(6),
+	FLD_UART_TX_IRQ_EN =		BIT(7),
+};
+
+#define reg_uart_ctrl1         		REG_ADDR8(0x97)
+enum {
+    FLD_UART_CTRL1_CTS_SELECT	   = BIT(0),
+    FLD_UART_CTRL1_CTS_EN 		   = BIT(1),
+    FLD_UART_CTRL1_PARITY_EN 	   = BIT(2),
+    FLD_UART_CTRL1_PARITY_POLARITY = BIT(3),       //1:odd parity   0:even parity
+    FLD_UART_CTRL1_STOP_BIT 	   = BIT_RNG(4,5),
+    FLD_UART_CTRL1_TTL 			   = BIT(6),
+    FLD_UART_CTRL1_LOOPBACK 	   = BIT(7),
+};
+
+#define reg_uart_ctrl2			REG_ADDR16(0x98)
+enum {
+    FLD_UART_CTRL2_RTS_TRIG_LVL   	 = BIT_RNG(0,3),
+    FLD_UART_CTRL2_RTS_PARITY 		 = BIT(4),
+    FLD_UART_CTRL2_RTS_MANUAL_VAL 	 = BIT(5),
+    FLD_UART_CTRL2_RTS_MANUAL_EN 	 = BIT(6),
+    FLD_UART_CTRL2_RTS_EN 			 = BIT(7),
+	FLD_UART_CTRL3_RX_IRQ_TRIG_LEVEL = BIT_RNG(8,11),
+	FLD_UART_CTRL3_TX_IRQ_TRIG_LEVEL = BIT_RNG(12,15),
+};
+
+
+#define reg_uart_ctrl3        	REG_ADDR8(0x99)
+enum {
+	FLD_UART_RX_IRQ_TRIG_LEV = BIT_RNG(0,3),
+	FLD_UART_TX_IRQ_TRIG_LEV = BIT_RNG(4,7),
+};
+
+#define reg_uart_rx_timeout0	REG_ADDR8(0x9a)
+enum{
+	FLD_UART_TIMEOUT_BW		 = 	BIT_RNG(0,7),
+};
+
+#define reg_uart_rx_timeout1    REG_ADDR8(0x9b)
+enum{
+	FLD_UART_TIMEOUT_MUL	 = 	BIT_RNG(0,1),
+	FLD_UART_P7816_EN	 	 =  BIT(5),
+	FLD_UART_MASK_TXDONE_IRQ =  BIT(6),
+	FLD_UART_MASK_ERR_IRQ 	 =  BIT(7),
+};
+
+
+#define reg_uart_buf_cnt       REG_ADDR8(0x9c)
+
+enum{
+	FLD_UART_RX_BUF_CNT		=  BIT_RNG(0,3),
+	FLD_UART_TX_BUF_CNT		=  BIT_RNG(4,7),
+};
+
+#define reg_uart_status0       REG_ADDR8(0x9d)
+enum{
+	FLD_UART_RBCNT 	     	=  BIT_RNG(0,2),
+	FLD_UART_IRQ_FLAG    	=  BIT(3),
+	FLD_UART_WBCNT 	     	=  BIT_RNG(4,6),
+	FLD_UART_CLEAR_RX_FLAG 	=  BIT(6),
+	FLD_UART_RX_ERR_FLAG 	=  BIT(7),
+};
+
+#define reg_uart_status1       REG_ADDR8(0x9e)
+enum{
+	FLD_UART_TX_DONE   	  =  BIT(0),
+	FLD_UART_TX_BUF_IRQ   =  BIT(1),
+	FLD_UART_RX_DONE   	  =  BIT(2),
+	FLD_UART_RX_BUF_IRQ   =  BIT(3),
+};
+
+
+#define reg_uart_state       REG_ADDR8(0x9f)
+enum{
+	FLD_UART_TSTATE_I 	     =  BIT_RNG(0,2),
+	FLD_UART_RSTATE_I	     =  BIT_RNG(4,7),
+};
+
+
+/*******************************      swire registers: 0xb0      ******************************/
+
+#define reg_swire_data			REG_ADDR8(0xb0)
+#define reg_swire_ctrl1			REG_ADDR8(0xb1)
+enum{
+	FLD_SWIRE_WR  = 			BIT(0),
+	FLD_SWIRE_RD  = 			BIT(1),
+	FLD_SWIRE_CMD =				BIT(2),
+	FLD_SWIRE_USB_DET =			BIT(6),
+	FLD_SWIRE_USB_EN =			BIT(7),
+};
+
+#define reg_swire_clk_div		REG_ADDR8(0xb2)
+
+enum
+{
+	FLD_SWIRE_CLK_DIV = BIT_RNG(0,6),
+};
+
+#define reg_swire_id      		REG_ADDR8(0xb3)
+
+enum
+{
+	FLD_SWIRE_ID_SLAVE_ID      = BIT_RNG(0,6),
+	FLD_SWIRE_ID_SLAVE_FIFO_EN = BIT(7),
+};
+
+/*******************************      analog control registers: 0xb8      ******************************/
+
+#define reg_ana_ctrl32			REG_ADDR32(0xb8)
+#define reg_ana_addr_data		REG_ADDR16(0xb8)
+#define reg_ana_addr			REG_ADDR8(0xb8)
+#define reg_ana_data			REG_ADDR8(0xb9)
+#define reg_ana_ctrl			REG_ADDR8(0xba)
+
+enum{
+	FLD_ANA_BUSY  = 			BIT(0),
+	FLD_ANA_RSV	=				BIT(4),
+	FLD_ANA_RW  = 				BIT(5),
+	FLD_ANA_START  = 			BIT(6),
+	FLD_ANA_CYC  = 				BIT(7),
+};
+
+
+/*******************************      usb registers: 0x100      ******************************/
+
+#define reg_ctrl_ep_ptr			REG_ADDR8(0x100)
+#define reg_ctrl_ep_dat			REG_ADDR8(0x101)
+#define reg_ctrl_ep_ctrl		REG_ADDR8(0x102)
+
+enum{
+	FLD_EP_DAT_ACK  = 			BIT(0),
+	FLD_EP_DAT_STALL =			BIT(1),
+	FLD_EP_STA_ACK = 			BIT(2),
+	FLD_EP_STA_STALL = 			BIT(3),
+};
+
+#define reg_ctrl_ep_irq_sta		REG_ADDR8(0x103)
+enum{
+	FLD_CTRL_EP_IRQ_TRANS  = 	BIT_RNG(0,3),
+	FLD_CTRL_EP_IRQ_SETUP  =	BIT(4),
+	FLD_CTRL_EP_IRQ_DATA  =		BIT(5),
+	FLD_CTRL_EP_IRQ_STA  = 		BIT(6),
+	FLD_CTRL_EP_IRQ_INTF  = 	BIT(7),
+};
+
+#define reg_ctrl_ep_irq_mode	REG_ADDR8(0x104)
+enum{
+	FLD_CTRL_EP_AUTO_ADDR = 	BIT(0),
+	FLD_CTRL_EP_AUTO_CFG =		BIT(1),
+	FLD_CTRL_EP_AUTO_INTF =		BIT(2),
+	FLD_CTRL_EP_AUTO_STA =		BIT(3),
+	FLD_CTRL_EP_AUTO_SYN =		BIT(4),
+	FLD_CTRL_EP_AUTO_DESC =		BIT(5),
+	FLD_CTRL_EP_AUTO_FEAT =		BIT(6),
+	FLD_CTRL_EP_AUTO_STD =		BIT(7),
+};
+
+#define reg_usb_ctrl			REG_ADDR8(0x105)
+enum{
+	FLD_USB_CTRL_AUTO_CLK = 	BIT(0),
+	FLD_USB_CTRL_LOW_SPD = 		BIT(1),
+	FLD_USB_CTRL_LOW_JITT =		BIT(2),
+	FLD_USB_CTRL_TST_MODE = 	BIT(3),
+};
+
+#define reg_usb_cyc_cali		REG_ADDR16(0x106)
+#define reg_usb_mdev			REG_ADDR8(0x10a)
+#define reg_usb_host_conn		REG_ADDR8(0x10b)
+enum{
+	FLD_USB_MDEV_SELF_PWR = 	BIT(0),
+	FLD_USB_MDEV_SUSP_STA = 	BIT(1),
+};
+
+#define reg_usb_sups_cyc_cali	REG_ADDR8(0x10c)
+#define reg_usb_intf_alt		REG_ADDR8(0x10d)
+#define reg_usb_ep_en			REG_ADDR8(0x10e)
+typedef enum{
+	FLD_USB_EDP8_EN 		= 	BIT(0),	// printer
+	FLD_USB_EDP1_EN 		= 	BIT(1),	// keyboard
+	FLD_USB_EDP2_EN 		= 	BIT(2),	// mouse
+	FLD_USB_EDP3_EN 		= 	BIT(3),
+	FLD_USB_EDP4_EN 		= 	BIT(4),
+	FLD_USB_EDP5_EN 		= 	BIT(5),	// printer
+	FLD_USB_EDP6_EN 		= 	BIT(6),	// audio
+	FLD_USB_EDP7_EN 		= 	BIT(7),	// audio
+}usb_ep_en_e;
+#define reg_usb_ep8123_ptr		REG_ADDR32(0x110)
+#define reg_usb_ep8_ptr			REG_ADDR8(0x110)
+#define reg_usb_ep1_ptr			REG_ADDR8(0x111)
+#define reg_usb_ep2_ptr			REG_ADDR8(0x112)
+#define reg_usb_ep3_ptr			REG_ADDR8(0x113)
+#define reg_usb_ep4567_ptr		REG_ADDR32(0x114)
+#define reg_usb_ep4_ptr			REG_ADDR8(0x114)
+#define reg_usb_ep5_ptr			REG_ADDR8(0x115)
+#define reg_usb_ep6_ptr			REG_ADDR8(0x116)
+#define reg_usb_ep7_ptr			REG_ADDR8(0x117)
+#define reg_usb_ep_ptr(i)		REG_ADDR8(0x110+((i) & 0x07))
+
+#define reg_usb_ep8123_dat		REG_ADDR32(0x118)
+#define reg_usb_ep8_dat			REG_ADDR8(0x118)
+#define reg_usb_ep1_dat			REG_ADDR8(0x119)
+#define reg_usb_ep2_dat			REG_ADDR8(0x11a)
+#define reg_usb_ep3_dat			REG_ADDR8(0x11b)
+#define reg_usb_ep4567_dat		REG_ADDR32(0x11c)
+#define reg_usb_ep4_dat			REG_ADDR8(0x11c)
+#define reg_usb_ep5_dat			REG_ADDR8(0x11d)
+#define reg_usb_ep6_dat			REG_ADDR8(0x11e)
+#define reg_usb_ep7_dat			REG_ADDR8(0x11f)
+#define reg_usb_ep_dat(i)		REG_ADDR8(0x118+((i) & 0x07))
+#define reg_usb_mic_dat0		REG_ADDR16(0x1800)
+#define reg_usb_mic_dat1		REG_ADDR16(0x1802)
+
+#define reg_usb_ep8_ctrl		REG_ADDR8(0x120)
+#define reg_usb_ep1_ctrl		REG_ADDR8(0x121)
+#define reg_usb_ep2_ctrl		REG_ADDR8(0x122)
+#define reg_usb_ep3_ctrl		REG_ADDR8(0x123)
+#define reg_usb_ep4_ctrl		REG_ADDR8(0x124)
+#define reg_usb_ep5_ctrl		REG_ADDR8(0x125)
+#define reg_usb_ep6_ctrl		REG_ADDR8(0x126)
+#define reg_usb_ep7_ctrl		REG_ADDR8(0x127)
+#define reg_usb_ep_ctrl(i)		REG_ADDR8(0x120+((i) & 0x07))
+
+enum{
+	FLD_USB_EP_BUSY = 			BIT(0),
+	FLD_USB_EP_STALL =			BIT(1),
+	FLD_USB_EP_DAT0 =			BIT(2),
+	FLD_USB_EP_DAT1 =			BIT(3),
+	FLD_USB_EP_MONO =			BIT(6),
+	FLD_USB_EP_EOF_ISO =		BIT(7),
+};
+
+#define reg_usb_ep8123_buf_addr	REG_ADDR32(0x128)
+#define reg_usb_ep8_buf_addr	REG_ADDR8(0x128)
+#define reg_usb_ep1_buf_addr	REG_ADDR8(0x129)
+#define reg_usb_ep2_buf_addr	REG_ADDR8(0x12a)
+#define reg_usb_ep3_buf_addr	REG_ADDR8(0x12b)
+#define reg_usb_ep4567_buf_addr	REG_ADDR32(0x12c)
+#define reg_usb_ep4_buf_addr	REG_ADDR8(0x12c)
+#define reg_usb_ep5_buf_addr	REG_ADDR8(0x12d)
+#define reg_usb_ep6_buf_addr	REG_ADDR8(0x12e)
+#define reg_usb_ep7_buf_addr	REG_ADDR8(0x12f)
+#define reg_usb_ep_buf_addr(i)	REG_ADDR8(0x128+((i) & 0x07))
+
+#define reg_usb_ram_ctrl		REG_ADDR8(0x130)
+enum{
+	FLD_USB_CEN_PWR_DN =		BIT(0),
+	FLD_USB_CLK_PWR_DN =		BIT(1),
+	FLD_USB_WEN_PWR_DN =		BIT(3),
+	FLD_USB_CEN_FUNC =			BIT(4),
+};
+
+#define reg_usb_iso_mode		REG_ADDR8(0x138)
+#define reg_usb_irq				REG_ADDR8(0x139)
+#define reg_usb_mask			REG_ADDR8(0x13a)
+enum{
+	FLD_USB_EDP8_IRQ 		= 	BIT(0),
+	FLD_USB_EDP1_IRQ 		= 	BIT(1),
+	FLD_USB_EDP2_IRQ 		= 	BIT(2),
+	FLD_USB_EDP3_IRQ 		= 	BIT(3),
+	FLD_USB_EDP4_IRQ 		= 	BIT(4),
+	FLD_USB_EDP5_IRQ 		= 	BIT(5),
+	FLD_USB_EDP6_IRQ 		= 	BIT(6),
+	FLD_USB_EDP7_IRQ 		= 	BIT(7),
+};
+#define reg_usb_ep8_send_max	REG_ADDR8(0x13b)
+#define reg_usb_ep8_send_thre	REG_ADDR8(0x13c)
+#define reg_usb_ep8_fifo_mode	REG_ADDR8(0x13d)
+#define reg_usb_ep_max_size		REG_ADDR8(0x13e)
+
+enum{
+	FLD_USB_ENP8_FIFO_MODE =	BIT(0),
+	FLD_USB_ENP8_FULL_FLAG =	BIT(1),
+};
+
+#define reg_rf_acc_len			REG_ADDR8(0x405)
+enum{
+	FLD_RF_ACC_LEN	    = 		BIT_RNG(0,2),
+	FLD_RF_LR_MAN_EN	=       BIT(3),   //long range manual enable
+	FLD_RF_LR_TX_SEL	=   	BIT(4),
+	FLD_RF_BLE_LR		=   	BIT(5),
+	FLD_RF_LR_ACC_TRIG	=   	BIT(7),
+};
+
+
+#define reg_rf_timestamp		REG_ADDR32(0x450)
+
+
+/*******************************      aes registers: 0x540      ******************************/
+
+#define reg_aes_ctrl            REG_ADDR8(0x540)
+
+enum {
+    FLD_AES_CTRL_CODEC_TRIG = BIT(0),
+    FLD_AES_CTRL_DATA_FEED = BIT(1),
+    FLD_AES_CTRL_CODEC_FINISHED = BIT(2),
+};
+
+#define reg_aes_data            REG_ADDR32(0x548)
+#define reg_aes_key(v)     		REG_ADDR8(0x550+v)
+
+
+/*******************************      audio registers: 0x560      ******************************/
+
+#define reg_audio_ctrl     REG_ADDR8(0x560)
+enum{
+	AUDIO_OUTPUT_OFF		   = 0,
+	FLD_AUDIO_MONO_MODE        = BIT(0),
+	FLD_AUDIO_I2S_PLAYER_EN    = BIT(1),
+	FLD_AUDIO_SDM_PLAYER_EN    = BIT(2),
+	FLD_AUDIO_ISO_PLAYER_EN	   = BIT(3),
+	FLD_AUDIO_I2S_RECORDER_EN  = BIT(4),
+	FLD_AUDIO_I2S_INTERFACE_EN = BIT(5),
+	FLD_AUDIO_GRP_EN           = BIT(6),
+	FLD_AUDIO_HPF_EN           = BIT(7),
+};
+
+#define	reg_pwm_ctrl	  REG_ADDR8(0x563)
+enum{
+	FLD_PWM_MULTIPLY2			= BIT(0),
+	FLD_PWM_ENABLE				= BIT(1),
+	FLD_LINER_INTERPOLATE_EN	= BIT(2),
+	FLD_LEFT_SHAPING_EN 		= BIT(5),
+	FLD_RIGTH_SHAPING_EN 		= BIT(6)
+};
+
+#define reg_ascl_tune     REG_ADDR32(0x564)
+
+#define reg_pn1_left      REG_ADDR8(0x568)
+enum{
+	PN1_LEFT_CHN_BITS 	= BIT_RNG(0,4),
+	PN2_LEFT_CHN_EN	  	= BIT(5),
+	PN1_LEFT_CHN_EN   	= BIT(6),
+};
+
+#define reg_pn2_left      REG_ADDR8(0x569)
+enum{
+	PN2_LEFT_CHN_BITS 	= BIT_RNG(0,4),
+	PN2_RIGHT_CHN_EN	= BIT(5),
+	PN1_RIGHT_CHN_EN	= BIT(6),
+};
+
+#define reg_pn1_right      REG_ADDR8(0x56a)
+enum{
+	PN1_RIGHT_CHN_BITS 	= BIT_RNG(0,4),
+	CLK2A_AUDIO_CLK_EN	= BIT(5),
+	EXCHANGE_SDM_DATA_EN= BIT(6),
+};
+
+#define reg_pn2_right      REG_ADDR8(0x56b)
+enum{
+	PN2_RIGHT_CHN_BITS 		= BIT_RNG(0,4),
+	SDM_LEFT_CHN_CONST_EN	= BIT(5),
+	SDM_RIGHT_CHN_CONST_EN	= BIT(6),
+};
+
+/*******************************      gpio registers: 0x580      ******************************/
+
+#define reg_gpio_pa_in			REG_ADDR8(0x580)
+#define reg_gpio_pa_ie			REG_ADDR8(0x581)
+#define reg_gpio_pa_oen			REG_ADDR8(0x582)
+#define reg_gpio_pa_out			REG_ADDR8(0x583)
+#define reg_gpio_pa_pol			REG_ADDR8(0x584)
+#define reg_gpio_pa_ds			REG_ADDR8(0x585)
+#define reg_gpio_pa_gpio		REG_ADDR8(0x586)
+#define reg_gpio_pa_irq_en		REG_ADDR8(0x587)
+
+#define reg_gpio_pb_in			REG_ADDR8(0x588)
+#define reg_gpio_pb_ie			REG_ADDR8(0x589)
+#define reg_gpio_pb_oen			REG_ADDR8(0x58a)
+#define reg_gpio_pb_out			REG_ADDR8(0x58b)
+#define reg_gpio_pb_pol			REG_ADDR8(0x58c)
+#define reg_gpio_pb_ds			REG_ADDR8(0x58d)
+#define reg_gpio_pb_gpio		REG_ADDR8(0x58e)
+#define reg_gpio_pb_irq_en		REG_ADDR8(0x58f)
+
+#define reg_gpio_pc_in			REG_ADDR8(0x590)
+#define areg_gpio_pc_ie			0xc0
+#define reg_gpio_pc_oen			REG_ADDR8(0x592)
+#define reg_gpio_pc_out			REG_ADDR8(0x593)
+#define reg_gpio_pc_pol			REG_ADDR8(0x594)
+#define areg_gpio_pc_ds			0xc2
+#define reg_gpio_pc_gpio		REG_ADDR8(0x596)
+#define reg_gpio_pc_irq_en		REG_ADDR8(0x597)
+
+#define reg_gpio_pd_in			REG_ADDR8(0x598)
+#define reg_gpio_pd_ie			REG_ADDR8(0x599)
+#define reg_gpio_pd_oen			REG_ADDR8(0x59a)
+#define reg_gpio_pd_out			REG_ADDR8(0x59b)
+#define reg_gpio_pd_pol			REG_ADDR8(0x59c)
+#define reg_gpio_pd_ds			REG_ADDR8(0x59d)
+#define reg_gpio_pd_gpio		REG_ADDR8(0x59e)
+#define reg_gpio_pd_irq_en		REG_ADDR8(0x59f)
+
+#define reg_gpio_pe_in			REG_ADDR8(0x5a0)
+#define reg_gpio_pe_ie			REG_ADDR8(0x5a1)
+#define reg_gpio_pe_oen			REG_ADDR8(0x5a2)
+#define reg_gpio_pe_out			REG_ADDR8(0x5a3)
+#define reg_gpio_pe_pol			REG_ADDR8(0x5a4)
+#define reg_gpio_pe_ds			REG_ADDR8(0x5a5)
+#define reg_gpio_pe_gpio		REG_ADDR8(0x5a6)
+#define reg_gpio_pe_irq_en		REG_ADDR8(0x5a7)
+
+#define reg_gpio_pa_setting1	REG_ADDR32(0x580)
+#define reg_gpio_pa_setting2	REG_ADDR32(0x584)
+#define reg_gpio_pb_setting1	REG_ADDR32(0x588)
+#define reg_gpio_pb_setting2	REG_ADDR32(0x58c)
+#define reg_gpio_pd_setting1	REG_ADDR32(0x598)
+#define reg_gpio_pd_setting2	REG_ADDR32(0x59c)
+
+#define reg_gpio_in(i)				REG_ADDR8(0x580+((i>>8)<<3))
+#define reg_gpio_ie(i)				REG_ADDR8(0x581+((i>>8)<<3))
+#define reg_gpio_oen(i)				REG_ADDR8(0x582+((i>>8)<<3))
+#define reg_gpio_out(i)				REG_ADDR8(0x583+((i>>8)<<3))
+#define reg_gpio_pol(i)				REG_ADDR8(0x584+((i>>8)<<3))
+#define reg_gpio_ds(i)				REG_ADDR8(0x585+((i>>8)<<3))
+
+
+#define reg_gpio_func(i)			REG_ADDR8(0x586+((i>>8)<<3))
+
+#define reg_gpio_irq_wakeup_en(i)	REG_ADDR8(0x587+((i>>8)<<3))  // reg_irq_mask: FLD_IRQ_GPIO_EN
+
+#define reg_gpio_irq_risc0_en(i)  	REG_ADDR8(0x5b8 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+#define reg_gpio_irq_risc1_en(i)  	REG_ADDR8(0x5c0 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+#define reg_gpio_irq_risc2_en(i)  	REG_ADDR8(0x5c8 + (i >> 8))
+
+#define reg_mux_func_a1      		REG_ADDR8(0x5a8)
+#define reg_mux_func_a2      		REG_ADDR8(0x5a9)
+#define reg_mux_func_b1     		REG_ADDR8(0x5aa)
+#define reg_mux_func_b2     		REG_ADDR8(0x5ab)
+#define reg_mux_func_c1     		REG_ADDR8(0x5ac)
+#define reg_mux_func_c2     		REG_ADDR8(0x5ad)
+#define reg_mux_func_d1     		REG_ADDR8(0x5ae)
+#define reg_mux_func_d2     		REG_ADDR8(0x5af)
+
+#define reg_gpio_wakeup_irq  		REG_ADDR8(0x5b5)
+enum{
+    FLD_GPIO_CORE_WAKEUP_EN  	= BIT(2),
+    FLD_GPIO_CORE_INTERRUPT_EN 	= BIT(3),
+};
+
+#define reg_pin_i2c_spi_out_en	    REG_ADDR8(0x5b6)
+enum{
+	FLD_PIN_PAGROUP_SPI_EN =	BIT_RNG(4,5),
+	FLD_PIN_PBGROUP_SPI_EN =	BIT(6),
+	FLD_PIN_PDGROUP_SPI_EN =	BIT(7),
+};
+
+
+#define reg_pin_i2c_spi_en			REG_ADDR8(0x5b7)  //poweron default  0xff
+enum{
+	FLD_PIN_PA3_SPI_EN =	BIT(0),
+	FLD_PIN_PA4_SPI_EN =	BIT(1),
+	FLD_PIN_PB6_SPI_EN =	BIT(2),
+	FLD_PIN_PD7_SPI_EN =	BIT(3),
+	FLD_PIN_PA3_I2C_EN =	BIT(4),
+	FLD_PIN_PA4_I2C_EN =	BIT(5),
+	FLD_PIN_PB6_I2C_EN =	BIT(6),
+	FLD_PIN_PD7_I2C_EN =	BIT(7),
+};
+
+
+/*******************************      timer registers: 0x620      ******************************/
+
+#define reg_tmr_ctrl			REG_ADDR32(0x620)
+#define reg_tmr_ctrl16			REG_ADDR16(0x620)
+#define reg_tmr_ctrl8			REG_ADDR8(0x620)
+enum{
+	FLD_TMR0_EN =				BIT(0),
+	FLD_TMR0_MODE =				BIT_RNG(1,2),
+	FLD_TMR1_EN = 				BIT(3),
+	FLD_TMR1_MODE =				BIT_RNG(4,5),
+	FLD_TMR2_EN =				BIT(6),
+	FLD_TMR2_MODE = 			BIT_RNG(7,8),
+	FLD_TMR_WD_CAPT = 			BIT_RNG(9,22),
+	FLD_TMR_WD_EN =				BIT(23),
+	FLD_TMR0_STA =				BIT(24),
+	FLD_TMR1_STA =				BIT(25),
+	FLD_TMR2_STA =				BIT(26),
+	FLD_CLR_WD =				BIT(27),
+};
+
+#define reg_tmr_sta				REG_ADDR8(0x623)
+enum{
+	FLD_TMR_STA_TMR0 =			BIT(0),
+	FLD_TMR_STA_TMR1 =			BIT(1),
+	FLD_TMR_STA_TMR2 =			BIT(2),
+	FLD_TMR_STA_WD =			BIT(3),
+};
+
+#define reg_tmr0_capt			REG_ADDR32(0x624)
+#define reg_tmr1_capt			REG_ADDR32(0x628)
+#define reg_tmr2_capt			REG_ADDR32(0x62c)
+#define reg_tmr_capt(i)			REG_ADDR32(0x624 + ((i) << 2))
+#define reg_tmr0_tick			REG_ADDR32(0x630)
+#define reg_tmr1_tick			REG_ADDR32(0x634)
+#define reg_tmr2_tick			REG_ADDR32(0x638)
+#define reg_tmr_tick(i)			REG_ADDR32(0x630 + ((i) << 2))
+
+/*******************************      irq registers: 0x640      ******************************/
+
+#define reg_irq_mask			REG_ADDR32(0x640)
+#define reg_irq_pri				REG_ADDR32(0x644)
+#define reg_irq_src				REG_ADDR32(0x648)
+#define reg_irq_src3			REG_ADDR8(0x64a)
+enum{
+	FLD_IRQ_TMR0_EN =			BIT(0),
+	FLD_IRQ_TMR1_EN =			BIT(1),
+	FLD_IRQ_TMR2_EN =			BIT(2),
+	FLD_IRQ_USB_PWDN_EN =		BIT(3),
+	FLD_IRQ_DMA_EN =			BIT(4),
+	FLD_IRQ_DAM_FIFO_EN =		BIT(5),
+	FLD_IRQ_UART_EN 	=		BIT(6),
+	FLD_IRQ_MIX_CMD_EN =		BIT(7), FLD_IRQ_HOST_CMD_EN  =	BIT(7),//< MIX = I2C/QDEC/SPI
+
+	FLD_IRQ_EP0_SETUP_EN =		BIT(8),
+	FLD_IRQ_EP0_DAT_EN =		BIT(9),
+	FLD_IRQ_EP0_STA_EN =		BIT(10),
+	FLD_IRQ_SET_INTF_EN =		BIT(11),
+	FLD_IRQ_EP_DATA_EN =		BIT(12),  FLD_IRQ_IRQ4_EN = BIT(12),
+	FLD_IRQ_ZB_RT_EN =			BIT(13),
+	FLD_IRQ_SW_PWM_EN =			BIT(14),  //irq_software | irq_pwm
+	FLD_IRQ_PKE_EN =			BIT(15),//	RSVD 		=			BIT(15),
+
+	FLD_IRQ_USB_250US_EN =		BIT(16),
+	FLD_IRQ_USB_RST_EN =		BIT(17),
+	FLD_IRQ_GPIO_EN =			BIT(18),
+	FLD_IRQ_PM_EN =				BIT(19),
+	FLD_IRQ_SYSTEM_TIMER =		BIT(20),
+	FLD_IRQ_GPIO_RISC0_EN =		BIT(21),
+	FLD_IRQ_GPIO_RISC1_EN =		BIT(22),
+	//	RSVD		  	  = 	BIT(23),
+
+	FLD_IRQ_EN =				BIT_RNG(24,31),
+	FLD_IRQ_ALL           =     0XFFFFFFFF,
+};
+#define reg_irq_en				REG_ADDR8(0x643)
+
+
+
+
+/*******************************      system timer registers: 0x740      ******************************/
+
+#define reg_system_tick				REG_ADDR32(0x740)
+#define reg_system_tick_irq_level	REG_ADDR32(0x744)
+#define reg_system_irq_mask			REG_ADDR8(0x748)
+#define reg_system_cal_irq			REG_ADDR8(0x749)
+#define reg_system_ctrl				REG_ADDR8(0x74a)
+enum{
+	FLD_SYSTEM_32K_CAL_MODE 	= 	BIT_RNG(4,7),
+	FLD_SYSTEM_32K_CAL_EN 		= 	BIT(3),
+	FLD_SYSTEM_TIMER_AUTO_EN 	= 	BIT(2),
+	FLD_SYSTEM_TIMER_MANUAL_EN 	= 	BIT(1),
+	FLD_SYSTEM_32K_WR_EN 		= 	BIT(0),
+};
+
+#define reg_system_status			REG_ADDR8(0x74b)
+enum{
+	FLD_SYSTEM_32K_TIMER_BUSY 			=   BIT(6),
+	FLD_SYSTEM_32K_TIMER_UPDATE_RD 		=   BIT(5),			FLD_SYSTEM_32K_TIMER_CLEAR_RD		=   BIT(5),
+	FLD_SYSTEM_STATE_MACHINE_STATUS		=   BIT_RNG(3,4),  	FLD_SYSTEM_32K_TIMER_SYCN_TRIG		=   BIT(3),
+	FLD_SYSTEM_CMD_SET_TRIG 			=   BIT(2),
+	FLD_SYSTEM_CMD_SYCN_TRIG 			=   BIT(1),
+	FLD_SYSTEM_TIMER_STATUS 			=   BIT(0),
+};
+
+#define reg_system_32k_tick_wt  	REG_ADDR32(0x74c)
+#define reg_system_32k_tick_rd  	REG_ADDR32(0x750)
+#define reg_system_32k_tick_cal  	REG_ADDR32(0x754)
+
+/*******************************      pwm registers: 0x780      ******************************/
+
+#define reg_pwm_enable			REG_ADDR8(0x780)
+#define reg_pwm0_enable			REG_ADDR8(0x781)
+#define reg_pwm_clk				REG_ADDR8(0x782)
+
+#define reg_pwm0_mode			REG_ADDR8(0x783)
+
+
+#define reg_pwm_invert			REG_ADDR8(0x784)
+#define reg_pwm_n_invert		REG_ADDR8(0x785)
+#define reg_pwm_pol				REG_ADDR8(0x786)
+
+#define reg_pwm_cycle(i)		REG_ADDR32(0x794 + (i << 2))   //<15:0>: TCMP 0~5  <31:16>: TMAX 0~5
+#define reg_pwm_cmp(i)			REG_ADDR16(0x794 + (i << 2))   //TCMP 0~5
+#define reg_pwm_max(i)			REG_ADDR16(0x796 + (i << 2))   //TMAX 0~5
+enum{
+	FLD_PWM_CMP  = 				BIT_RNG(0,15),
+	FLD_PWM_MAX  = 				BIT_RNG(16,31),
+};
+
+#define reg_pwm0_pulse_num		REG_ADDR16(0x7ac)
+
+#define reg_pwm_irq_mask		REG_ADDR8(0x7b0)
+#define reg_pwm_irq_sta			REG_ADDR8(0x7b1)
+enum{
+	FLD_IRQ_PWM0_PNUM =					BIT(0),
+	FLD_IRQ_PWM0_IR_DMA_FIFO_DONE  =	BIT(1),
+	FLD_IRQ_PWM0_FRAME =				BIT(2),
+	FLD_IRQ_PWM1_FRAME =				BIT(3),
+	FLD_IRQ_PWM2_FRAME =				BIT(4),
+	FLD_IRQ_PWM3_FRAME =				BIT(5),
+	FLD_IRQ_PWM4_FRAME 	=				BIT(6),
+	FLD_IRQ_PWM5_FRAME =				BIT(7),
+};
+
+
+
+#define reg_pwm0_fifo_mode_irq_mask		REG_ADDR8(0x7b2)
+
+enum{
+	FLD_PWM0_IRQ_IR_FIFO_EN  	 = BIT(0),
+};
+
+#define reg_pwm0_fifo_mode_irq_sta		REG_ADDR8(0x7b3)
+
+enum{
+	FLD_PWM0_IRQ_IR_FIFO_CNT 	 = BIT(0),
+};
+
+
+
+#define reg_pwm_tcmp0_shadow		REG_ADDR16(0x7c4)   //<15:0>: TCMP 0~5  <31:16>: TMAX 0~5
+#define reg_pwm_tmax0_shadow		REG_ADDR16(0x7c6)   //TCMP 0~5
+
+#define reg_pwm_ir_fifo_dat(i)			REG_ADDR16(0x7c8+i*2)
+#define reg_pwm_ir_fifo_irq_trig_level	REG_ADDR8(0x7cc)
+
+#define reg_pwm_ir_fifo_data_status		REG_ADDR8(0x7cd)
+enum{
+	FLD_PWM0_IR_FIFO_DATA_NUM 	=		BIT_RNG(0,3),
+	FLD_PWM0_IR_FIFO_EMPTY 		=		BIT(4),
+	FLD_PWM0_IR_FIFO_FULL 		=		BIT(5),
+};
+
+#define reg_pwm_ir_clr_fifo_data		REG_ADDR8(0x7ce)
+
+enum{
+	FLD_PWM0_IR_FIFO_CLR_DATA 	=		BIT(0),
+};
+
+/*******************************      fifo registers: 0x800      ******************************/
+
+#define reg_fifo0_data			REG_ADDR32(0x800)
+#define reg_fifo1_data			REG_ADDR32(0x900)
+#define reg_fifo2_data			REG_ADDR32(0xa00)
+
+/*******************************      dfifo registers: 0xb00      ******************************/
+
+#define reg_dfifo0_addr			REG_ADDR16(0xb00)
+#define reg_dfifo0_size			REG_ADDR8(0xb02)
+#define reg_dfifo0_addHi		REG_ADDR8(0xb03)  //default 0x04, no need set
+
+#define reg_dfifo1_addr			REG_ADDR16(0xb04)
+#define reg_dfifo1_size			REG_ADDR8(0xb06)
+#define reg_dfifo1_addHi		REG_ADDR8(0xb07)  //default 0x04, no need set
+
+//misc channel only use dfifo2
+#define reg_dfifo2_addr			REG_ADDR16(0xb08)
+#define reg_dfifo2_size			REG_ADDR8(0xb0a)
+#define reg_dfifo2_addHi		REG_ADDR8(0xb0b)  //default 0x04, no need set
+
+#define reg_dfifo_audio_addr		reg_dfifo0_addr
+#define reg_dfifo_audio_size		reg_dfifo0_size
+
+#define reg_dfifo_misc_chn_addr		reg_dfifo2_addr
+#define reg_dfifo_misc_chn_size		reg_dfifo2_size
+
+
+#define reg_dfifo0_l_level		REG_ADDR8(0xb0c)  //dfifo0  low int threshold(wptr - rptr)
+#define reg_dfifo0_h_level		REG_ADDR8(0xb0d)  //dfifo0 high int threshold(wptr - rptr)
+#define reg_dfifo1_h_level		REG_ADDR8(0xb0e)  //dfifo1 high int threshold(wptr - rptr)
+#define reg_dfifo2_h_level		REG_ADDR8(0xb0f)  //dfifo2 high int threshold(wptr - rptr)
+
+
+#define	reg_dfifo_mode	REG_ADDR8(0xb10)
+enum{
+	FLD_AUD_DFIFO0_IN 		= BIT(0),
+	FLD_AUD_DFIFO1_IN 		= BIT(1),
+	FLD_AUD_DFIFO2_IN 		= BIT(2),
+	FLD_AUD_DFIFO0_OUT 		= BIT(3),
+	FLD_AUD_DFIFO0_L_INT	= BIT(4),
+	FLD_AUD_DFIFO0_H_INT	= BIT(5),
+	FLD_AUD_DFIFO1_H_INT	= BIT(6),
+	FLD_AUD_DFIFO2_H_INT	= BIT(7),
+};
+
+#define	reg_dfifo_ain			REG_ADDR8(0xb11)
+enum{
+	FLD_AUD_SAMPLE_TIME_CONFIG        = BIT_RNG(0,1),
+	FLD_AUD_FIFO0_INPUT_SELECT     	  = BIT_RNG(2,3),
+	FLD_AUD_FIFO1_INPUT_SELECT     	  = BIT_RNG(4,5),
+	FLD_AUD_MIC_LEFT_CHN_SELECT       = BIT(6),
+	FLD_AUD_MIC_RIGHT_CHN_SELECT      = BIT(7),
+};
+
+enum{  //core_b11<3:2>  audio input select
+	AUDIO_FIFO0_INPUT_SELECT_USB 	        = 0x00,
+	AUDIO_FIFO0_INPUT_SELECT_I2S 	        = 0x01,
+	AUDIO_FIFO0_INPUT_SELECT_16BIT 	        = 0x02,
+	AUDIO_FIFO0_INPUT_SELECT_20BIT 	        = 0x03,
+};
+
+enum{  //core_b11<5:4>  audio input select
+	AUDIO_FIFO1_INPUT_SELECT_USB 	        = 0x00,
+	AUDIO_FIFO1_INPUT_SELECT_I2S 	        = 0x01,
+	AUDIO_FIFO1_INPUT_SELECT_16BIT 	        = 0x02,
+	AUDIO_FIFO1_INPUT_SELECT_20BIT 	        = 0x03,
+};
+
+
+#define	reg_mic_ctrl			REG_ADDR8(0xb12)
+enum{
+	FLD_AUD_MIC_VOL_CONTROL           = BIT_RNG(0,5),
+	FLD_AUD_MIC_MONO_EN               = BIT(6),
+	FLD_AUD_AMIC_DMIC_SELECT          = BIT(7),
+};
+
+enum{
+	MIC_VOL_CONTROL_m48DB = 		0x00,
+	MIC_VOL_CONTROL_m42DB = 		0x04,
+	MIC_VOL_CONTROL_m36DB = 		0x08,
+	MIC_VOL_CONTROL_m30DB = 		0x0c,
+	MIC_VOL_CONTROL_m24DB = 		0x10,
+	MIC_VOL_CONTROL_m18DB = 		0x14,
+	MIC_VOL_CONTROL_m16DB = 		0x15,
+	MIC_VOL_CONTROL_m12DB = 		0x18,
+	MIC_VOL_CONTROL_m6DB  = 	   	0x1c,
+	MIC_VOL_CONTROL_0DB   = 	    0x20,
+	MIC_VOL_CONTROL_6DB   =  		0x24,
+	MIC_VOL_CONTROL_12DB  = 		0x28,
+	MIC_VOL_CONTROL_18DB  = 		0x2c,
+	MIC_VOL_CONTROL_24DB  = 		0x30,
+	MIC_VOL_CONTROL_30DB  = 		0x34,
+	MIC_VOL_CONTROL_36DB  = 		0x38,
+	MIC_VOL_CONTROL_42DB  =     	0x3c,
+};
+
+
+#define reg_set_filter_para     REG_ADDR8(0xb80)
+
+#define reg_dfifo_dec_ratio	    REG_ADDR8(0xb8a)
+
+#define reg_codec_dec_en	    REG_ADDR8(0xb8b)
+enum{
+	FLD_AUD_CODEC_DEC_EN	=   BIT(0),
+};
+
+#define reg_dfifo_irq_status	REG_ADDR8(0xb13)
+enum{
+	FLD_AUD_DFIFO0_L_IRQ	= BIT(4),
+	FLD_AUD_DFIFO0_H_IRQ	= BIT(5),
+	FLD_AUD_DFIFO1_L_IRQ	= BIT(6),
+	FLD_AUD_DFIFO1_H_IRQ	= BIT(7),
+};
+#define reg_dfifo0_rptr			REG_ADDR16(0xb14)
+#define reg_dfifo0_wptr			REG_ADDR16(0xb16)
+
+#define reg_dfifo1_rptr			REG_ADDR16(0xb18)
+#define reg_dfifo1_wptr			REG_ADDR16(0xb1a)
+
+#define reg_dfifo2_rptr			REG_ADDR16(0xb1c)
+#define reg_dfifo2_wptr			REG_ADDR16(0xb1e)
+
+
+#define reg_audio_wptr			reg_dfifo0_wptr
+
+#define reg_dfifo0_num			REG_ADDR16(0xb20)
+#define reg_dfifo1_num			REG_ADDR16(0xb24)
+#define reg_dfifo2_num			REG_ADDR16(0xb28)
+
+#define reg_dfifo_manual_mode		REG_ADDR8(0xb2c)
+enum{
+	FLD_DFIFO_MANUAL_MODE_EN	= BIT(0),
+};
+
+#define reg_dfifo0_man_dat		REG_ADDR32(0xb30)
+
+
+/*******************************      dma registers: 0xc00      ******************************/
+
+//uart rx
+#define reg_dma0_addr			REG_ADDR16(0xc00)
+#define reg_dma0_size			REG_ADDR8(0xc02)
+#define reg_dma0_mode			REG_ADDR8(0xc03)
+enum{
+	FLD_DMA_WR_MEM =			BIT(0),
+	FLD_DMA_PINGPONG_EN =		BIT(1),
+	FLD_DMA_FIFO_EN =			BIT(2),
+	FLD_DMA_AUTO_MODE =			BIT(3),
+	FLD_DMA_READ_MODE =			BIT(4),
+	FLD_DMA_BYTE_MODE =			BIT(5)
+};
+
+
+//uart tx
+#define reg_dma1_addr			REG_ADDR16(0xc04)
+#define reg_dma1_size			REG_ADDR8(0xc06)
+#define reg_dma1_mode			REG_ADDR8(0xc07)
+
+//rf rx dma
+#define reg_dma2_addr			REG_ADDR16(0xc08)
+#define reg_dma2_size			REG_ADDR8(0xc0a)
+#define reg_dma2_mode			REG_ADDR8(0xc0b)
+
+//rf tx dma
+#define reg_dma3_addr			REG_ADDR16(0xc0c)
+#define reg_dma3_size			REG_ADDR8(0xc0e)
+#define reg_dma3_mode			REG_ADDR8(0xc0f)
+
+#define reg_dma4_addr			REG_ADDR16(0xc10)
+#define reg_dma4_size			REG_ADDR8(0xc12)
+#define reg_dma4_mode			REG_ADDR8(0xc13)
+
+#define reg_dma5_addr			REG_ADDR16(0xc14)
+#define reg_dma5_size			REG_ADDR8(0xc16)
+#define reg_dma5_mode			REG_ADDR8(0xc17)
+
+//pwm tx dma
+#define reg_dma7_addr			REG_ADDR16(0xc18)
+#define reg_dma7_size			REG_ADDR8(0xc1a)
+#define reg_dma7_mode			REG_ADDR8(0xc1b)
+
+
+#define reg_dma_t_addr			REG_ADDR16(0xc1c)
+#define reg_dma_t_size			REG_ADDR8(0xc1e)
+
+#define reg_dma_size(v)			REG_ADDR8(0xc02+4*v)
+
+//  The default channel assignment
+#define reg_dma_uart_rx_addr	reg_dma0_addr
+#define reg_dma_uart_rx_size	reg_dma0_size
+#define reg_dma_uart_rx_mode	reg_dma0_mode
+
+#define reg_dma_uart_tx_addr	reg_dma1_addr
+#define reg_dma_uart_tx_size	reg_dma1_size
+#define reg_dma_uart_tx_mode	reg_dma1_mode
+
+#define reg_dma_rf_rx_addr		reg_dma2_addr
+#define reg_dma_rf_rx_size		reg_dma2_size
+#define reg_dma_rf_rx_mode		reg_dma2_mode
+
+#define reg_dma_rf_tx_addr		reg_dma3_addr
+#define reg_dma_rf_tx_size		reg_dma3_size
+#define reg_dma_rf_tx_mode		reg_dma3_mode
+
+#define reg_dma_pwm_addr		reg_dma7_addr
+#define reg_dma_pwm_size		reg_dma7_size
+#define reg_dma_pwm_mode		reg_dma7_mode
+
+
+
+#define reg_dma_chn_en			REG_ADDR8(0xc20)
+#define reg_dma_chn_irq_msk		REG_ADDR8(0xc21)
+#define reg_dma_tx_rdy0			REG_ADDR8(0xc24)
+#define reg_dma_tx_rdy1			REG_ADDR8(0xc25)
+#define reg_dma_rx_rdy0			REG_ADDR8(0xc26)
+#define reg_dma_rx_rdy1			REG_ADDR8(0xc27)
+
+#define reg_dma_irq_status		reg_dma_rx_rdy0
+
+enum{
+	FLD_DMA_CHN0 =	BIT(0),		FLD_DMA_CHN_UART_RX =	BIT(0),
+	FLD_DMA_CHN1 =	BIT(1),		FLD_DMA_CHN_UART_TX =	BIT(1),
+	FLD_DMA_CHN2 =	BIT(2),		FLD_DMA_CHN_RF_RX =		BIT(2),
+	FLD_DMA_CHN3 =	BIT(3),		FLD_DMA_CHN_RF_TX =		BIT(3),
+	FLD_DMA_CHN4 =	BIT(4),		FLD_DMA_CHN_AES_OUT =  BIT(4),
+	FLD_DMA_CHN5 =	BIT(5),     FLD_DMA_CHN_AES_IN =  BIT(5),
+	FLD_DMA_CHN7 =	BIT(7),		FLD_DMA_CHN_PWM  	 =	BIT(7),
+};
+
+typedef enum {
+    FLD_DMA_IRQ_UART_RX  = BIT(0),
+    FLD_DMA_IRQ_UART_TX  = BIT(1),
+    FLD_DMA_IRQ_RF_RX    = BIT(2),
+    FLD_DMA_IRQ_RF_TX    = BIT(3),
+    FLD_DMA_IRQ_AES_DECO = BIT(4),
+    FLD_DMA_IRQ_AES_CODE = BIT(5),
+    FLD_DMA_IRQ_PWM		 = BIT(7),
+    FLD_DMA_IRQ_ALL      = 0xff,
+} IRQ_DMAIrqTypeDef;
+
+
+#define reg_dma_rx_rptr			REG_ADDR8(0xc28)
+#define reg_dma_rx_wptr			REG_ADDR8(0xc29)
+
+#define reg_dma_tx_rptr			REG_ADDR8(0xc2a)
+#define reg_dma_tx_wptr			REG_ADDR8(0xc2b)
+#define reg_dma_tx_fifo			REG_ADDR16(0xc2c)
+enum{
+	FLD_DMA_RPTR_CLR =			BIT(4),
+	FLD_DMA_RPTR_NEXT =			BIT(5),
+	FLD_DMA_RPTR_SET =			BIT(6),
+};
+
+#define reg_dma0_addrHi			REG_ADDR8(0xc40)
+#define reg_dma1_addrHi			REG_ADDR8(0xc41)
+#define reg_dma2_addrHi			REG_ADDR8(0xc42)
+#define reg_dma3_addrHi			REG_ADDR8(0xc43)
+#define reg_dma4_addrHi			REG_ADDR8(0xc44)
+#define reg_dma5_addrHi			REG_ADDR8(0xc45)
+#define reg_dma_ta_addrHi		REG_ADDR8(0xc46)
+#define reg_dma_a3_addrHi		REG_ADDR8(0xc47)
+#define reg_dma7_addrHi			REG_ADDR8(0xc48)
+
+/*******************************      linklayer registers: 0xf00      ******************************/
+
+#define reg_rf_ll_ctrl_0		REG_ADDR8(0xf02)
+
+#define reg_rf_ll_ctrl_1		REG_ADDR8(0xf03)
+enum{
+	FLD_RF_FSM_TIMEOUT_EN 		=   BIT(0),
+	FLD_RF_RX_FIRST_TIMEOUT_EN	=   BIT(1),
+	FLD_RF_RX_TIMEOUT_EN		=   BIT(2),
+	FLD_RF_CRC_2_EN 			=   BIT(3),
+
+	//BLE mode
+	FLD_RF_BRX_SN_INIT	 		=   BIT(4),
+	FLD_RF_BRX_NESN_INIT	 	=   BIT(5),
+	FLD_RF_BTX_SN_INIT	 		=   BIT(6),
+	FLD_RF_BTX_NESN_INIT	 	=   BIT(7),
+};
+
+#define  	FSM_TIMEOUT_ENABLE 	 			( reg_rf_ll_ctrl_1 |= FLD_RF_FSM_TIMEOUT_EN )
+#define  	FSM_TIMEOUT_DISABLE				( reg_rf_ll_ctrl_1 &= (~FLD_RF_FSM_TIMEOUT_EN) )
+#define		FSM_RX_FIRST_TIMEOUT_ENABLE		( reg_rf_ll_ctrl_1 |= FLD_RF_RX_FIRST_TIMEOUT_EN )
+#define 	FSM_RX_FIRST_TIMEOUT_DISABLE	( reg_rf_ll_ctrl_1 &= (~FLD_RF_RX_FIRST_TIMEOUT_EN) )
+
+#define reg_rf_rx_timeout		REG_ADDR16(0xf0a)
+
+#define reg_rf_ll_ctrl_2		REG_ADDR8(0xf15)
+
+#define reg_rf_ll_ctrl_3		REG_ADDR8(0xf16)
+enum{
+	FLD_RF_TX_EN_DLY_EN = 		BIT(0),
+	FLD_RF_PLL_RST_EN	=       BIT(1),
+	FLD_RF_CMD_SCHEDULE_EN	=   BIT(2),
+	FLD_RF_R_TX_EN_DLY =		BIT_RNG(4,7),
+};
+
+
+#define reg_rf_irq_mask			REG_ADDR16(0xf1c)
+#define reg_rf_irq_status		REG_ADDR16(0xf20)
+#define reg_rf_fsm_timeout		REG_ADDR32(0xf2c)
+
+#define		CLEAR_ALL_RFIRQ_STATUS   ( reg_rf_irq_status = 0xffff )
+
+enum{
+	FLD_RF_IRQ_RX = 			BIT(0),
+	FLD_RF_IRQ_TX =				BIT(1),
+	FLD_RF_IRQ_RX_TIMEOUT =		BIT(2),
+	FLD_RF_IRQ_RX_CRC_2 =		BIT(4),
+	FLD_RF_IRQ_CMD_DONE  =		BIT(5),
+	FLD_RF_IRQ_FSM_TIMEOUT  =	BIT(6),
+	FLD_RF_IRQ_RETRY_HIT =		BIT(7),
+	FLD_RF_IRQ_TX_DS =          BIT(8),
+    FLD_RF_IRQ_RX_DR =          BIT(9),
+	FLD_RF_IRQ_FIRST_TIMEOUT =	BIT(10),
+	FLD_RF_IRQ_INVALID_PID =    BIT(11),
+	FLD_RF_IRQ_STX_TIMEOUT =    BIT(12),
+	FLD_RF_IRQ_ALL =            0X1FFF,
+};
+/*******************************      aura registers: 0x1200      ******************************/
+#define REG_AURA_BASE            0x1200
+#define reg_rf_tx_flex_mi_0      REG_ADDR8(REG_AURA_BASE+0x1c)
+enum
+{
+	FLD_RF_TX_MI_FRACTION     = BIT_RNG(0,5),
+	FLD_RF_TX_MI_INTEGER_1    = BIT_RNG(6,7),
+};
+#define reg_rf_tx_flex_mi_1     REG_ADDR8(REG_AURA_BASE+0x1d)
+enum
+{
+	FLD_RF_TX_MI_INTEGER_2   = BIT(0),
+};
+
+#define reg_rf_rx_flex_mi_0      REG_ADDR8(REG_AURA_BASE+0x1e)
+enum
+{
+	FLD_RF_RX_MI_FRACTION     = BIT_RNG(0,5),
+	FLD_RF_RX_MI_INTEGER_1    = BIT_RNG(6,7),
+};
+#define reg_rf_rx_flex_mi_1     REG_ADDR8(REG_AURA_BASE+0x1f)
+enum
+{
+	FLD_RF_RX_MI_INTEGER_2   = BIT(0),
+};
+
+#define		reg_rf_mode_cfg_tx1_0		REG_ADDR8(REG_AURA_BASE+0x22)
+enum
+{
+	FLD_RF_BLE_MODE_TX			      =	BIT(0),
+	FLD_RF_VCO_TRIM_KVM			      = BIT_RNG(1,3),
+	FLD_RF_HPMC_EXP_DIFF_COUNT_L	  = BIT_RNG(4,7),
+};
+/*******************************      pke registers: 0x2000      ******************************/
+#define reg_pke_ctrl             REG_ADDR32(0x2000)
+enum{
+	FLD_PKE_CTRL_START = 		 BIT(0),
+	FLD_PKE_CTRL_STOP = 		 BIT(16),
+};
+
+#define reg_pke_conf             REG_ADDR32(0x2004)
+enum{
+	FLD_PKE_CONF_IRQ_EN = 		 BIT(8),
+	FLD_PKE_CONF_PARTIAL_RADIX = BIT_RNG(16,23),
+	FLD_PKE_CONF_BASE_RADIX	=    BIT_RNG(24,26),
+};
+
+#define reg_pke_mc_ptr           REG_ADDR32(0x2010)
+
+#define reg_pke_stat             REG_ADDR32(0x2020)
+enum{
+	FLD_PKE_STAT_DONE = 		 BIT(0),
+};
+
+#define reg_pke_rt_code          REG_ADDR32(0x2024)
+enum{
+	FLD_PKE_RT_CODE_STOP_LOG =	 BIT_RNG(0,3),
+};
+
+#define reg_pke_exe_conf         REG_ADDR32(0x2050)
+enum{
+	FLD_PKE_EXE_CONF_IAFF_R0 = 	 BIT(0),
+	FLD_PKE_EXE_CONF_IMON_R0 = 	 BIT(1),
+	FLD_PKE_EXE_CONF_IAFF_R1 = 	 BIT(2),
+	FLD_PKE_EXE_CONF_IMON_R1 = 	 BIT(3),
+	FLD_PKE_EXE_CONF_OAFF = 	 BIT(4),
+	FLD_PKE_EXE_CONF_OMON = 	 BIT(5),
+	FLD_PKE_EXE_CONF_ME_SCA_EN = BIT_RNG(8,9),
+};
+
+/********************************************************************************************
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ *****|								Aanlog  Register Table  						   |*****
+ *****|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~|*****
+ ********************************************************************************************/
+
+/*******************************      analog registers(3v3): 0x00      ***************************/
+
+#define areg_06_pll_bg			        0x06
+enum{
+	FLD_PLL_BG_POWER_DOWN = BIT(4),      //    	1: Power down;     0: Power up
+};
+
+#define areg_0e_pa0_pa3_pull			0x0E
+#define areg_0f_pa4_pa7_pull			0x0F
+#define areg_10_pb0_pb3_pull			0x10
+#define areg_11_pb4_pb7_pull			0x11
+#define areg_12_pc0_pc3_pull			0x12
+#define areg_13_pc4_pc7_pull			0x13
+#define areg_14_pd0_pd3_pull			0x14
+#define areg_15_pd4_pd7_pull			0x15
+
+
+/*******************************      mdec register      ***************************/
+
+#define mdec_rst_addr                   0x16
+enum{
+	FLD_SELE_PA0 = 				BIT(0),
+	FLD_SELE_PB7 = 				BIT(1),
+	FLD_SELE_PC4 = 			    BIT(2),
+	FLD_SELE_PD0 = 				BIT(3),
+	FLD_RST_MDEC =              BIT(4),
+	FLD_CLS_MDEC = 				BIT_RNG(0,4),
+};
+
+#define mdec_match_addr                 0x17
+enum{
+	FLD_CLS_MATCH_ADDR = 		BIT_RNG(0,3),
+};
+
+
+/*******************************      analog registers(1v8): 0x80      ***************************/
+#define areg_auto_pd_ctrl_0				0x2B
+enum{
+	FLD_AUTO_PD_PL_ALL			  = BIT(0),
+	FLD_AUTO_PD_PL_DCDC 		  = BIT(1),
+
+};
+
+#define areg_auto_pd_ctrl_1				0x2C
+enum{
+	FLD_AUTO_PD_RC_32K			  = BIT(0),
+	FLD_AUTO_PD_XTAL_32K 		  = BIT(1),
+	FLD_AUTO_PD_XTAL_24M		  = BIT(2),
+	FLD_AUTO_PD_LC_COMP		  	  = BIT(3),
+	FLD_AUTO_PD_MISC			  = BIT(4),
+	FLD_AUTO_PD_XTAL_QUICK_RST 	  = BIT(5),
+	FLD_AUTO_PD_OTP			      = BIT(6),
+    // <7> rsvd
+};
+
+
+
+#define areg_clk_setting				0x82
+enum{
+	FLD_DCCC_DOUBLER_POWER_DOWN	  = BIT(3),
+	FLD_CLK_48M_TO_RX_EN 		  = BIT(4),
+	FLD_CLK_48M_TO_DIG_EN 		  = BIT(5),
+	FLD_CLK_24M_TO_SAR_EN 		  = BIT(6),
+	FLD_CLK_48M_TO_CAL_DIG_MAN_EN = BIT(7),
+};
+
+#define areg_xo_setting				0x8a
+enum{
+	FLD_XO_CDAC_ANA	  	= BIT_RNG(0,5),
+	FLD_XO_MODE_ANA 	= BIT(6),
+	FLD_XO_CAP_OFF_ANA  = BIT(7),
+};
+
+/*******************************        analog registers(PGA)        ***************************/
+#define codec_ana_cfg2				   0xe6
+#define codec_ana_cfg3                 0xe7
+#define codec_ana_cfg4                 0xe8
+
+#define pga_audio_enable               0x34
+
+
+#if defined(__cplusplus)
+}
+#endif
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/rf_drv.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/rf_drv.h
new file mode 100644
index 00000000..a10e62a0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/rf_drv.h
@@ -0,0 +1,517 @@
+/********************************************************************************************************
+ * @file    rf_drv.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef _RF_DRV_H_
+#define _RF_DRV_H_
+
+#include "bit.h"
+#include "bsp.h"
+#include "register.h"
+#include "flash.h"
+#include "analog.h"
+
+
+#define RF_CHN_TABLE 		0x8000
+
+
+/**
+ *  @brief  Define RF mode
+ */
+typedef enum {
+	RF_MODE_BLE_2M =    		BIT(0),
+	RF_MODE_BLE_1M = 			BIT(1),
+    RF_MODE_BLE_1M_NO_PN   =    BIT(2),
+	RF_MODE_ZIGBEE_250K    =    BIT(3),
+    RF_MODE_LR_S2_500K     =    BIT(4),
+    RF_MODE_LR_S8_125K     =    BIT(5),
+    RF_MODE_PRIVATE_250K   =    BIT(6),
+    RF_MODE_PRIVATE_500K   =    BIT(7),
+    RF_MODE_PRIVATE_1M     =    BIT(8),
+    RF_MODE_PRIVATE_2M     =    BIT(9),
+    RF_MODE_ANT     	   =    BIT(10),
+    RF_MODE_BLE_2M_NO_PN   =    BIT(11),
+    RF_MODE_HYBEE_1M   	   =    BIT(12),
+    RF_MODE_HYBEE_2M   	   =    BIT(13),
+    RF_MODE_HYBEE_500K     =    BIT(14),
+} RF_ModeTypeDef;
+
+
+/**
+ *  @brief  Define RF Tx/Rx/Auto mode
+ */
+typedef enum {
+    RF_MODE_TX 		= 0,
+    RF_MODE_RX 		= 1,
+    RF_MODE_AUTO	= 2,
+    RF_MODE_OFF 	= 3
+} RF_StatusTypeDef;
+
+/**
+ *  @brief  Define power list of RF
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_P11p26dBm = 63, //  11.3 dbm
+	 RF_POWER_P11p09dBm = 61, //  11.1 dbm
+	 RF_POWER_P10p83dBm = 58, //  10.8 dbm
+	 RF_POWER_P10p62dBm  = 56, //  10.6 dbm
+	 RF_POWER_P10p30dBm  = 53, //  10.3 dbm
+	 RF_POWER_P10p05dBm  = 51, // 10.1 dbm
+	 RF_POWER_P9p79dBm  = 49, //   9.8 dbm
+	 RF_POWER_P9p54dBm  = 47, //   9.5 dbm
+	 RF_POWER_P9p23dBm  = 45, //   9.2 dbm
+	 RF_POWER_P8p92dBm  = 43, //   8.9 dbm
+	 RF_POWER_P8p57dBm  = 41, //   8.6 dbm
+	 RF_POWER_P8p20dBm  = 39, //   8.2 dbm
+	 RF_POWER_P7p80dBm  = 37, //   7.8 dbm
+	 RF_POWER_P7p37dBm  = 35, //   7.4 dbm
+	 RF_POWER_P6p91dBm  = 33, //   6.9 dbm
+	 RF_POWER_P6p45dBm  = 31, //   6.5 dbm
+	 RF_POWER_P5p92dBm  = 29, //   5.9 dbm
+	 RF_POWER_P5p33dBm  = 27, //   5.3 dbm
+	 RF_POWER_P4p69dBm  = 25, //   4.7 dbm
+	 RF_POWER_P3p99dBm  = 23, //   4.0 dbm
+	 /*VANT*/
+	 RF_POWER_P3p50dBm  = BIT(7) | 63,   //   3.5 dbm
+	 RF_POWER_P3p33dBm  = BIT(7) | 61,   //   3.3 dbm
+	 RF_POWER_P3p13dBm  = BIT(7) | 59,   //   3.1 dbm
+	 RF_POWER_P2p93dBm  = BIT(7) | 57,   //   2.9 dbm
+	 RF_POWER_P2p60dBm  = BIT(7) | 54,   //   2.6 dbm
+	 RF_POWER_P2p36dBm  = BIT(7) | 52,   //   2.4 dbm
+	 RF_POWER_P2p10dBm  = BIT(7) | 50,   //   2.1 dbm
+	 RF_POWER_P1p83dBm  = BIT(7) | 48,   //   1.8 dbm
+	 RF_POWER_P1p56dBm  = BIT(7) | 46,   //   1.6 dbm
+	 RF_POWER_P1p25dBm  = BIT(7) | 44,   //   1.3 dbm
+	 RF_POWER_P0p71dBm  = BIT(7) | 41,   //   0.7 dbm
+	 RF_POWER_P0p52dBm  = BIT(7) | 40,   //   0.5 dbm
+	 RF_POWER_N0p28dBm  = BIT(7) | 36,   //  -0.3 dbm
+	 RF_POWER_N0p51dBm  = BIT(7) | 35,   //  -0.5 dbm
+	 RF_POWER_N0p74dBm  = BIT(7) | 34,   //  -0.7 dbm
+	 RF_POWER_N1p21dBm  = BIT(7) | 32,   //  -1.2 dbm
+	 RF_POWER_N1p69dBm  = BIT(7) | 30,   //  -1.7 dbm
+	 RF_POWER_N2p23dBm  = BIT(7) | 28,   //  -2.2 dbm
+	 RF_POWER_N2p84dBm  = BIT(7) | 26,   //  -2.8 dbm
+	 RF_POWER_N3p48dBm  = BIT(7) | 24,   //  -3.5 dbm
+	 RF_POWER_N4p18dBm  = BIT(7) | 22,   //  -4.3 dbm
+	 RF_POWER_N4p97dBm  = BIT(7) | 20,   //  -5.0 dbm
+	 RF_POWER_N5p85dBm  = BIT(7) | 18,   //  -5.9 dbm
+	 RF_POWER_N6p83dBm  = BIT(7) | 16,   //  -6.8 dbm
+	 RF_POWER_N7p88dBm  = BIT(7) | 14,   //  -7.9 dbm
+	 RF_POWER_N9p14dBm  = BIT(7) | 12,   //  -9.1 dbm
+	 RF_POWER_N10p70dBm  = BIT(7) | 10,   //-10.7 dbm
+	 RF_POWER_N12p57dBm = BIT(7) | 8,   //  -12.6 dbm
+	 RF_POWER_N15p01dBm = BIT(7) | 6,   //  -15.0 dbm
+	 RF_POWER_N18p40dBm = BIT(7) | 4,   //  -18.4 dbm
+	 RF_POWER_N24p28dBm = BIT(7) | 2,   //  -24.3 dbm
+
+	 RF_POWER_N30dBm    = 0xff,         //  -30 dbm
+	 RF_POWER_N50dBm    = BIT(7) | 0,   //  -50 dbm
+} RF_PowerTypeDef;
+
+extern const RF_PowerTypeDef rf_power_Level_list[60];
+/**
+ *  @brief  Define power index list of RF
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_INDEX_P11p26dBm,
+	 RF_POWER_INDEX_P11p09dBm,
+	 RF_POWER_INDEX_P10p83dBm,
+	 RF_POWER_INDEX_P10p62dBm,
+	 RF_POWER_INDEX_P10p30dBm,
+	 RF_POWER_INDEX_P10p05dBm,
+	 RF_POWER_INDEX_P9p79dBm,
+	 RF_POWER_INDEX_P9p54dBm,
+	 RF_POWER_INDEX_P9p23dBm,
+	 RF_POWER_INDEX_P8p92dBm,
+	 RF_POWER_INDEX_P8p57dBm,
+	 RF_POWER_INDEX_P8p20dBm,
+	 RF_POWER_INDEX_P7p80dBm,
+	 RF_POWER_INDEX_P7p37dBm,
+	 RF_POWER_INDEX_P6p91dBm,
+	 RF_POWER_INDEX_P6p45dBm,
+	 RF_POWER_INDEX_P5p92dBm,
+	 RF_POWER_INDEX_P5p33dBm,
+	 RF_POWER_INDEX_P4p69dBm,
+	 RF_POWER_INDEX_P3p99dBm,
+	 /*VANT*/
+	 RF_POWER_INDEX_P3p50dBm,
+	 RF_POWER_INDEX_P3p33dBm,
+	 RF_POWER_INDEX_P3p13dBm,
+	 RF_POWER_INDEX_P2p93dBm,
+	 RF_POWER_INDEX_P2p60dBm,
+	 RF_POWER_INDEX_P2p36dBm,
+	 RF_POWER_INDEX_P2p10dBm,
+	 RF_POWER_INDEX_P1p83dBm,
+	 RF_POWER_INDEX_P1p56dBm,
+	 RF_POWER_INDEX_P1p25dBm,
+	 RF_POWER_INDEX_P0p71dBm,
+	 RF_POWER_INDEX_P0p52dBm,
+	 RF_POWER_INDEX_N0p28dBm,
+	 RF_POWER_INDEX_N0p51dBm,
+	 RF_POWER_INDEX_N0p74dBm,
+	 RF_POWER_INDEX_N1p21dBm,
+	 RF_POWER_INDEX_N1p69dBm,
+	 RF_POWER_INDEX_N2p23dBm,
+	 RF_POWER_INDEX_N2p84dBm,
+	 RF_POWER_INDEX_N3p48dBm,
+	 RF_POWER_INDEX_N4p18dBm,
+	 RF_POWER_INDEX_N4p97dBm,
+	 RF_POWER_INDEX_N5p85dBm,
+	 RF_POWER_INDEX_N6p83dBm,
+	 RF_POWER_INDEX_N7p88dBm,
+	 RF_POWER_INDEX_N9p14dBm,
+	 RF_POWER_INDEX_N10p70dBm,
+	 RF_POWER_INDEX_N12p57dBm,
+	 RF_POWER_INDEX_N15p01dBm,
+	 RF_POWER_INDEX_N18p40dBm,
+	 RF_POWER_INDEX_N24p28dBm,
+} RF_PowerIndexTypeDef;
+
+
+
+#define	RF_TRX_MODE									0xe0
+#define	RF_TRX_OFF									0x45
+
+#define	RF_PACKET_LENGTH_OK(p)						(p[0] == p[12]+13)
+#define	RF_PACKET_CRC_OK(p)							((p[p[0]+3] & 0x51) == 0x10)
+
+#define	RF_PACKET_1M_LENGTH_OK(p)					(p[0] == p[5]+13)
+#define	RF_PACKET_2M_LENGTH_OK(p)					(p[0] == (p[12]&0x3f)+15)
+
+#define RF_ZIGBEE_PACKET_LENGTH_OK(p)    			(p[0] == p[4]+9)
+#define RF_ZIGBEE_PACKET_CRC_OK(p)       			((p[p[0]+3] & 0x51) == 0x10)
+#define RF_ZIGBEE_PACKET_RSSI_GET(p)     			(p[p[0]+2])
+#define RF_ZIGBEE_PACKET_TIMESTAMP_GET(p)           (p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+#define RF_ZIGBEE_PACKET_PAYLOAD_LENGTH_GET(p)      (p[4])
+
+#define RF_TPLL_PACKET_LENGTH_OK(p)              	(p[0] == (p[4] & 0x3f) + 11)
+#define RF_TPLL_PACKET_CRC_OK(p)                 	((p[p[0]+3] & 0x01) == 0x00)
+#define RF_TPLL_PACKET_RSSI_GET(p)               	(p[p[0]+2])
+#define RF_SB_PACKET_PAYLOAD_LENGTH_GET(p)      	(p[0] - 10)
+#define RF_SB_PACKET_CRC_OK(p)                  	((p[p[0]+3] & 0x01) == 0x00)
+#define RF_SB_PACKET_CRC_GET(p)                 	((p[p[0]-8]<<8) + p[p[0]-7]) //Note: here assume that the MSByte of CRC is received first
+#define RF_SB_PACKET_RSSI_GET(p)                	(p[p[0]+2])
+#define RF_TPLL_PACKET_TIMESTAMP_GET(p)          	(p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+#define RF_SB_PACKET_TIMESTAMP_GET(p)           	(p[p[0]-4] | (p[p[0]-3]<<8) | (p[p[0]-2]<<16) | (p[p[0]-1]<<24))
+
+
+
+
+/*******************************            General APIs            **************************/
+
+/**
+ *	@brief     This function serves to reset RF BaseBand
+ *	@param[in] none.
+ *	@return	   none.
+ */
+static inline void reset_baseband(void)
+{
+	REG_ADDR8(0x61) = BIT(0);		//reset_baseband
+	REG_ADDR8(0x61) = 0;			//release reset signal
+}
+
+/**
+ * @brief   This function serves to reset function for RF.
+ * @param   none
+ * @return  none
+ */
+static inline void reset_sn_nesn(void)
+{
+	REG_ADDR8(0xf01) =  0x01;
+}
+
+/**
+ * @brief   This function serves to reset the RF sn.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_reset_sn(void)
+{
+	write_reg8(0xf01, 0x3f);
+	write_reg8(0xf01, 0x00);
+}
+
+/**
+ * @brief   This function serves to reset RF Tx/Rx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_tx_rx_off(void)
+{
+	write_reg8(0xf16, 0x29);
+	write_reg8(0x428, RF_TRX_MODE);	// rx disable
+	write_reg8(0xf02, RF_TRX_OFF);	// reset tx/rx state machine
+}
+
+/**
+ * @brief   This function serves to turn off RF auto mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_tx_rx_off_auto_mode(void)
+{
+	write_reg8(0xf00, 0x80);
+}
+
+/**
+ * @brief   This function serves to set RF Tx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_txmode(void)
+{
+	write_reg8(0xf02, RF_TRX_OFF | BIT(4));	//TX enable
+}
+
+/**
+ * @brief   This function serves to set RF Tx mode.
+ * @param   none.
+ * @return  none.
+ */
+static inline void rf_set_rxmode(void)
+{
+	write_reg8(0xf02, RF_TRX_OFF);
+    write_reg8(0x428, RF_TRX_MODE | BIT(0));	//rx enable
+    write_reg8(0xf02, RF_TRX_OFF | BIT(5));	// RX enable
+}
+
+/**
+ *	@brief	  	This function serves to  reconfigure the buffer
+ *	@param[out]	RF_RxAddr  	Pointer for Rx buffer in RAM(Generally its starting
+ *							address of an array.Should be 4-byte aligned)
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline void rf_rx_buffer_reconfig(unsigned char *RF_RxAddr)
+{
+	reg_dma2_addr = (unsigned short)((unsigned int)RF_RxAddr);
+}
+
+/**
+ *	@brief	  	This function serves to get rssi
+ *  @param[in]      none
+ *	@return	 	none
+ */
+static inline signed char rf_rssi_get_154(void)
+{
+	return (((signed char)(read_reg8(0x441))) - 110);
+}
+
+/**
+ *	@brief	  	This function serves to determine whether sending a packet of data is finished
+ *	@param[in]	none.
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline unsigned char rf_tx_finish(void)
+{
+    return ((read_reg8(0xf20) & BIT(1)) == 0x02);
+}
+
+/**
+ *	@brief	  	This function serves to clear the Tx finish flag bit.
+ *				After all packet data are sent, corresponding Tx finish flag bit
+ *				will be set as 1.By reading this flag bit, it can check whether
+ *				packet transmission is finished. After the check, its needed to
+ *				manually clear this flag bit so as to avoid misjudgment.
+ *   @param      none
+ *	@return	 	none
+ */
+static inline void rf_tx_finish_clear_flag(void)
+{
+    write_reg8(0xf20, 0x02);
+}
+
+/**
+ *	@brief	  	This function serves to determine whether sending a packet of rf_tx_acc_code_select is finished
+ *	@param[in]	none.
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline unsigned char rf_rx_finish(void)
+{
+    return ((read_reg8(0xf20) & BIT(0)) == 0x01);
+}
+
+/**
+ *	@brief	  	This function serves to clear the Rx finish flag bit.
+ *				After all packet data are resive, corresponding Rx finish flag bit
+ *				will be set as 1.By reading this flag bit, it can check whether
+ *				packet transmission is finished. After the check, its needed to
+ *				manually clear this flag bit so as to avoid misjudgment.
+ *   @param      none
+ *	@return	 	none
+ */
+static inline void rf_rx_finish_clear_flag(void)
+{
+    write_reg8(0xf20, 0x01);
+}
+
+/**
+ * @brief   This function serves to calibration the radio frequency .
+ * @param   addr - the flash address of calibration value.
+ * @return  none.
+ */
+static inline void rf_drv_cap(unsigned long addr)
+{
+	unsigned char cap = 0xff;
+	flash_read_page(addr, 1, &cap);
+	if(cap != 0xff){
+		cap &= 0x3f;
+		analog_write(0x8a, (analog_read(0x8a) & 0xc0) | cap);
+	}
+}
+
+/**
+ * @brief   This function serves to settle adjust for RF Tx.
+ * @param   txstl_us - adjust TX settle time.
+ * @return  none
+ */
+static inline void tx_settle_adjust(unsigned short txstl_us)
+{
+	REG_ADDR16(0xf04) = txstl_us;
+}
+
+/**
+ * @brief   This function serves to set pipe for RF Tx.
+ * @param   pipe - RF Optional range .
+ * @return  none
+ */
+static inline void rf_set_tx_pipe(unsigned char pipe)
+{
+	write_reg8(0xf15, 0xf0 | pipe);
+}
+
+
+/**
+ * @brief   This function serves to judge the statue of  RF receive.
+ * @param   none.
+ * @return  none.
+ */
+static inline unsigned char is_rf_receiving_pkt(void)
+{
+	//if the value of [5:4] of the reg_0x448 is 0b10 or 0b11, it means that the RF is in the receiving packet phase.(confirmed by junwen)
+	return (((read_reg8(0x448)>>5)& 1) == 1);
+}
+
+
+/**
+*	@brief     This function serves to initiate the mode of RF
+*	@param[in] rf_mode  -  mode of RF
+*	@return	   none.
+*/
+extern void rf_drv_init(RF_ModeTypeDef rf_mode);
+
+/**
+ * @brief   	This function serves to set RF power.
+ * @param[in]   RF_PowerTypeDef - the RF power types.
+ * @return  	none.
+ */
+extern void rf_set_power_level(RF_PowerTypeDef level);
+
+/**
+ * @brief   	This function serves to set RF power level index.
+ * @param[in]   RF_PowerIndexTypeDef - the RF power level index types.
+ * @return  	none.
+ */
+extern void rf_set_power_level_index(RF_PowerIndexTypeDef level_idx);
+
+/**
+ * @brief   	This function serves to set RF's channel.
+ * @param[in]   chn - RF channel.
+ * @param[in]   set - the value to set.
+ * @return  	none.
+ */
+extern void rf_set_channel(signed char chn, unsigned short set);//general
+
+/**
+ *	@brief	  	This function serves to judge RF Tx/Rx state.
+ *	@param[in]	rf_status - Tx/Rx status.
+ *	@param[in]	rf_channel - RF channel.
+ *	@return	 	failed -1,else success.
+ */
+extern int rf_trx_state_set(RF_StatusTypeDef rf_status, signed char rf_channel);
+
+/**
+ *	@brief	  	This function serves to get RF status.
+ *	@param[in]	none.
+ *	@return	 	RF Rx/Tx status.
+ */
+extern RF_StatusTypeDef rf_trx_state_get(void);
+
+/**
+ *	@brief	  	This function serves to start Tx.
+ *	@param[in]	addr   Tx packet address in RAM. Should be 4-byte aligned.
+ *	@param[in]	tick  Tick value of system timer.
+ *	@return	 	none
+ */
+extern void rf_start_stx(void *addr, unsigned int tick);
+
+/**
+ *	@brief	  	This function serves to start Rx.
+ *	@param[in]	tick  Tick value of system timer.
+ *	@return	 	none
+ */
+extern void rf_start_srx(unsigned int tick);
+
+/**
+*	@brief	  	This function serves to set RF Tx packet.
+*	@param[in]	rf_txaddr - the address RF to send packet.
+*	@return	 	none.
+*/
+extern void rf_tx_pkt(unsigned char *rf_txaddr);
+
+/**
+ *	@brief	  	This function is to set rx buffer
+ *
+ *	@param[out]	RF_RxAddr  	Pointer for Rx buffer in RAM(Generally its starting
+ *							address of an array.Should be 4-byte aligned)
+ *	@param[in]	size   		Rx buffer size (Its an integral multiple of 16)
+ *	@param[in]	PingpongEn 	Enable/Disable Ping-Pong buffer 1Enable 0Disable
+ *							Note:
+ *							When PingpongEn is set as 0, received RF data will
+ *							be stored in RAM pointed by  RF_RxAddr.
+ *							When PingpongEn is set as 1, received RF data will
+ *							be stored in buffer0 and buffer1 successively.
+ *							The RAM size reserved for received RF data should be
+ *							double of Size.
+ *
+ *	@return	 	none
+ */
+extern void rf_rx_buffer_set(unsigned char *RF_RxAddr, int size, unsigned char PingpongEn);
+
+/**
+ * @brief      This function
+ * @param[in]  size - the expected size of dma2
+ * @param[in]  PingpongEn - the flag of g_RFRxPingpongEn
+ * @return     none
+ */
+extern void rf_rx_cfg(int size, unsigned char PingpongEn);
+
+/**
+ * @brief      This function is to disable PN
+ * @return     none
+ */
+void rf_pn_disable(void);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi.h
new file mode 100644
index 00000000..8ee996cf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi.h
@@ -0,0 +1,196 @@
+/********************************************************************************************************
+ * @file    spi.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef SPI_H
+#define SPI_H
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ *  @brief  Define pin for SPI interface
+ *  		SDO  SDI  SCK  CN
+ *  		A2   A3   A4   D6
+ *  		B7   B6   D7   D2
+ */
+
+typedef enum {
+	SPI_GPIO_SCL_A4=GPIO_PA4,
+	SPI_GPIO_SCL_D7=GPIO_PD7,
+}SPI_GPIO_SclkTypeDef;
+
+typedef enum {
+	SPI_GPIO_SDO_A2=GPIO_PA2,
+	SPI_GPIO_SDO_B7=GPIO_PB7,
+}SPI_GPIO_SdoTypeDef;
+
+typedef enum {
+	SPI_GPIO_SDI_A3=GPIO_PA3,
+	SPI_GPIO_SDI_B6=GPIO_PB6,
+}SPI_GPIO_SdiTypeDef;
+
+typedef enum {
+	SPI_GPIO_CS_D2=GPIO_PD2,
+	SPI_GPIO_CS_D6=GPIO_PD6,
+}SPI_GPIO_CsTypeDef;
+
+
+/**
+ *  @brief  Define the mode for SPI interface
+ */
+typedef enum {
+    SPI_MODE0 = 0,
+    SPI_MODE2,
+    SPI_MODE1,
+    SPI_MODE3,
+} SPI_ModeTypeDef;
+
+/**
+ *  @brief  Define the clk for SPI interface(system clock = 24M)
+ */
+typedef enum {
+    SPI_CLK_200K = 0x3c,
+    SPI_CLK_250K = 0x2e,
+    SPI_CLK_500K = 0x17,
+    SPI_CLK_1M   = 0x0b,
+    SPI_CLK_2M   = 0x05,
+    SPI_CLK_4M   = 0x02,
+} SPI_24M_ClkTypeDef;
+
+
+/**
+ * @brief This function reset SPI module.
+ * @param[in] none
+ * @return none
+ */
+static inline void reset_spi_moudle(void)
+{
+	reg_rst0 |= FLD_RST0_SPI;
+	reg_rst0 &= (~FLD_RST0_SPI);
+}
+
+/**
+ * @brief     This function selects a pin port for the SPI interface (master mode)
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ *  A3:5b7[0] set 1 as spi input,set 0 not as spi input ;5b7[4] set 1 as i2c input ,set 0 not as i2c input
+ *	A4:5b7[1] set 1 as spi input,set 0 not as spi input ;5b7[5] set 1 as i2c input ,set 0 not as i3c input
+ *	B6:5b7[2] set 1 as spi input,set 0 not as spi input ;5b7[6] set 1 as i2c input ,set 0 not as i4c input
+ *	D7:5b7[3] set 1 as spi input,set 0 not as spi input ;5b7[7] set 1 as i2c input ,set 0 not as i5c input
+ *	5b6[7:4]  set spi or i2c output,5b6[5:4] PA spi sel, 5b6[6] PB spi sel,5b6[7] PD spi_sel
+ *	spi i2c mux sel:
+ *	step1:close gpio func;
+ *	step2:set 0x5a8-0x5af sel spii2c func;
+ *	step3:set 5b6[7:4] to sel spi or i2c output;
+ *	step4:set 5b7[7:0] to sel spi or i2c input;
+ *	step5 if use pd[6]as spi slave csn,need to open pd[2] gpio func,because pd[2]have high priority than pd[6]
+ */
+extern void spi_master_gpio_set(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin);
+
+/**
+ * @brief     This function selects a pin port for the SPI interface (slave mode)
+ * @param[in] PinGrp - the selected pin port
+ * @return    none
+ *  A3:5b7[0] set 1 as spi input,set 0 not as spi input ;5b7[4] set 1 as i2c input ,set 0 not as i2c input
+ *	A4:5b7[1] set 1 as spi input,set 0 not as spi input ;5b7[5] set 1 as i2c input ,set 0 not as i3c input
+ *	B6:5b7[2] set 1 as spi input,set 0 not as spi input ;5b7[6] set 1 as i2c input ,set 0 not as i4c input
+ *	D7:5b7[3] set 1 as spi input,set 0 not as spi input ;5b7[7] set 1 as i2c input ,set 0 not as i5c input
+ *	5b6[7:4]  set spi or i2c output,5b6[5:4] PA spi sel, 5b6[6] PB spi sel,5b6[7] PD spi_sel
+ *	spi i2c mux sel:
+ *	step1:close gpio func;
+ *	step2:set 0x5a8-0x5af sel spii2c func;
+ *	step3:set 5b6[7:4] to sel spi or i2c output;
+ *	step4:set 5b7[7:0] to sel spi or i2c input;
+ *	step5 if use pd[6]as spi slave csn,need to open pd[2] gpio func,because pd[2]have high priority than pd[6]
+ */
+extern void spi_slave_gpio_set(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin);
+
+/**
+ * @brief     This function selects a GPIO pin as CS of SPI function.
+ * @param[in] CSPin - the selected CS pin
+ * @return    none
+ */
+extern void spi_masterCSpin_select(GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module
+ *            Telink spi supports four standard working modes
+ *            register  0x0b set working mode
+ *            bit0:CPOL-Clock Polarity  ; bit1:CPHA-Clock Phase
+ *            MODE0: CPOL = 0 , CPHA =0;
+ *            MODE1: CPOL = 0 , CPHA =1;
+ *            MODE2: CPOL = 1 , CPHA =0;
+ *            MODE3: CPOL = 1 , CPHA =1;
+ * @return    none
+ */
+extern void spi_master_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] DivClock - the division factor for SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] Mode - the selected working mode of SPI module (slave mode)
+ * @return    none
+ */
+extern void spi_slave_init(unsigned char DivClock, SPI_ModeTypeDef Mode);
+
+/**
+ * @brief      This function serves to write a bulk of data to the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the
+ *             slave device first before the writing operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes
+ * @param[in]  Data - pointer to the data need to write
+ * @param[in]  DataLen - length in byte of the data need to write
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void spi_write(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief      This function serves to read a bulk of data from the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  Cmd - pointer to the command bytes needed written into the
+ *             slave device first before the reading operation of actual data
+ * @param[in]  CmdLen - length in byte of the command bytes
+ * @param[out] Data - pointer to the buffer that will cache the reading out data
+ * @param[in]  DataLen - length in byte of the data need to read
+ * @param[in]  CSPin - the CS pin specifing the slave device
+ * @return     none
+ */
+extern void spi_read(unsigned char *Cmd, int CmdLen, unsigned char *Data, int DataLen, GPIO_PinTypeDef CSPin);
+
+/**
+ * @brief 		This function use to set the share mode of SPI.
+ * @param[in] 	none
+ * @return 		none
+ */
+extern void spi_set_share_mode_en(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi_i.h
new file mode 100644
index 00000000..c0c3e3d3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/spi_i.h
@@ -0,0 +1,101 @@
+/********************************************************************************************************
+ * @file    spi_i.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "register.h"
+#include "compiler.h"
+
+ /**
+  * @brief     This function servers to set the spi wait.
+  * @param[in] none
+  * @return    none
+  */
+_attribute_ram_code_sec_ static inline void mspi_wait(void){
+	while(reg_mspi_ctrl & FLD_MSPI_BUSY)
+		;
+}
+
+/**
+ * @brief     This function servers to set the spi high level.
+ * @param[in] none
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_high(void){
+	reg_mspi_ctrl = FLD_MSPI_CS;
+}
+
+/**
+ * @brief     This function servers to set the spi low level.
+ * @param[in] none
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_low(void){
+	reg_mspi_ctrl = 0;
+}
+
+/**
+ * @brief     This function servers to gets the spi data.
+ * @param[in] none.
+ * @return    the spi data.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_get(void){
+	return reg_mspi_data;
+}
+
+/**
+ * @brief     This function servers to write the spi.
+ * @param[in] c - the char need to be write.
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_write(unsigned char c){
+	reg_mspi_data = c;
+}
+
+/**
+ * @brief     This function servers to control the write.
+ * @param[in] c - need to be write.
+ * @return    none
+ */
+_attribute_ram_code_sec_ static inline void mspi_ctrl_write(unsigned char c){
+	reg_mspi_ctrl = c;
+}
+
+/**
+ * @brief     This function servers to spi read.
+ * @param[in] none.
+ * @return    read reault.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_read(void){
+	mspi_write(0);		// dummy, issue clock
+	mspi_wait();
+	return mspi_get();
+}
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/timer.h
new file mode 100644
index 00000000..ae9ebcfc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/timer.h
@@ -0,0 +1,201 @@
+/********************************************************************************************************
+ * @file    timer.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef TIMER_H_
+#define TIMER_H_
+
+#include "register.h"
+#include "gpio.h"
+
+/**
+ * @brief   Type of Timer
+ */
+typedef enum{
+	TIMER0		=0,
+	TIMER1		=1,
+	TIMER2		=2,
+}TIMER_TypeDef;
+
+/**
+ * @brief   Mode of Timer
+ */
+typedef enum{
+	TIMER_MODE_SYSCLK		=0,
+	TIMER_MODE_GPIO_TRIGGER	=1,
+	TIMER_MODE_GPIO_WIDTH	=2,
+	TIMER_MODE_TICK			=3,
+}TIMER_ModeTypeDef;
+
+#define	    sys_tick_per_us   				16
+#define		CLOCK_SYS_CLOCK_1250US			(1250 * sys_tick_per_us)
+
+/**
+ * @brief   system Timer : 16Mhz, Constant
+ */
+enum{
+	CLOCK_16M_SYS_TIMER_CLK_1S  = 16*1000*1000,
+	CLOCK_16M_SYS_TIMER_CLK_1MS = 16*1000,
+	CLOCK_16M_SYS_TIMER_CLK_1US = 16,
+};
+
+/**
+ * @brief     This function performs to gets system timer0 address.
+ * @param[in] none.
+ * @return    timer0 address.
+ */
+static inline unsigned long clock_time(void)
+{
+	return reg_system_tick;
+}
+
+/**
+ * @brief     This function performs to calculation exceed us of the timer.
+ * @param[in] ref - Variable of reference timer address.
+ * @param[in] span_us - Variable of span us.
+ * @return    the exceed.
+ */
+static inline unsigned int clock_time_exceed(unsigned int ref, unsigned int us)
+{
+	return ((unsigned int)(clock_time() - ref) > us * 16);
+}
+
+/*
+ * @brief     This function set to initial tick for timer.
+ * @param[in] type - the specified timer.
+ * @param[in] init_tick - initial tick value.
+ * @return    none
+ */
+static inline void timer_set_init_tick(TIMER_TypeDef type, unsigned int init_tick)
+{
+	reg_tmr_tick(type) = init_tick;
+}
+
+/*
+ * @brief     This function set to capture tick for timer.
+ * @param[in] type - the specified timer.
+ * @param[in] cap_tick - cap tick value.
+ * @return    none
+ */
+static inline void timer_set_cap_tick(TIMER_TypeDef type, unsigned int cap_tick)
+{
+	reg_tmr_capt(type) = cap_tick;
+}
+
+/*
+ * @brief     This function to enable the timer interrupt.
+ * @param[in] type - the specified timer.
+ * @return    none
+ */
+static inline void timer_irq_enable(TIMER_TypeDef type)
+{
+	reg_irq_mask |= (1 << type);
+}
+
+/*
+ * @brief     This function to enable the system timer interrupt.
+ * @param[in] type - the specified timer.
+ * @return    none
+ */
+static inline void stimer_irq_enable(void)
+{
+	reg_system_irq_mask |= FLD_SYSTEM_TIMER_AUTO_EN;
+}
+
+/**
+ * @brief     This function performs to set the system timer irq capture tick.
+ * @param[in] none.
+ * @return    timer0 address.
+ */
+static inline void stimer_set_irq_capture(unsigned long tick)
+{
+	//0x744 bit[2:0] is always 0, to ensure system timer can be trigger correctly, bit[2:0] of the setting tick should 
+	//set to 0 to match the value of 0x744
+	reg_system_tick_irq_level = (tick & (~((unsigned long)0x07)));
+}
+
+/**
+ * @brief This function servers to set system timer irq mask.
+ * @param[in]	none.
+ * @return  	none.
+ */
+static inline void stimer_set_irq_mask(void)
+{
+	reg_irq_mask |= FLD_IRQ_SYSTEM_TIMER;
+}
+
+/**
+ * @brief This function servers to clear system timer irq mask.
+ * @param[in] 	none.
+ * @return  	none.
+ */
+static inline void stimer_clr_irq_mask(void)
+{
+	reg_irq_mask &= ~(unsigned long)FLD_IRQ_SYSTEM_TIMER;
+}
+
+/**
+ * @brief     set timer mode.
+ * @param[in] type - the specified timer.
+ * @param[in] mode - select mode for timer.
+ * @return    none
+ */
+void timer_set_mode(TIMER_TypeDef type, TIMER_ModeTypeDef mode);
+
+/**
+ * @brief     initiate GPIO for gpio trigger and gpio width mode of timer.
+ * @param[in] type - the specified timer.
+ * @param[in] pin - select pin for timer.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return    none
+ */
+void timer_gpio_init(TIMER_TypeDef type, GPIO_PinTypeDef pin, GPIO_PolTypeDef pol);
+
+/**
+ * @brief     the specifed timer start working.
+ * @param[in] type - select the timer to start.
+ * @return    none
+ */
+void timer_start(TIMER_TypeDef type);
+
+/**
+ * @brief     the specifed timer stop working.
+ * @param[in] type - select the timer to stop.
+ * @return    none
+ */
+void timer_stop(TIMER_TypeDef type);
+
+/**
+ * @brief     This function performs to set sleep us.
+ * @param[in] us - microseconds need to delay.
+ * @return    none
+ */
+void sleep_us(unsigned long us);
+
+#define ClockTime			clock_time
+#define WaitUs				sleep_us
+#define WaitMs(t)			sleep_us((t)*1000)
+#define sleep_ms(t)			sleep_us((t)*1000)
+
+#endif /* TIMER_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/uart.h
new file mode 100644
index 00000000..c527b4f6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/uart.h
@@ -0,0 +1,332 @@
+/********************************************************************************************************
+ * @file    uart.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef UART_H
+#define UART_H
+
+#include "register.h"
+#include "bit.h"
+#include "gpio.h"
+
+
+
+/**
+ *  @brief  Define mul bits
+ */
+enum{
+	UART_BW_MUL1  = 0,
+	UART_BW_MUL2  = 1,
+	UART_BW_MUL3  = 2,
+	UART_BW_MUL4  = 3,
+};
+
+/**
+ *  @brief  Define parity type
+ */
+typedef enum {
+    PARITY_NONE = 0,
+    PARITY_EVEN,
+    PARITY_ODD,
+} UART_ParityTypeDef;
+
+/**
+ *  @brief  Define the length of stop bit
+ */
+typedef enum {
+    STOP_BIT_ONE          = 0,
+    STOP_BIT_ONE_DOT_FIVE = BIT(4),
+    STOP_BIT_TWO          = BIT(5),
+} UART_StopBitTypeDef;
+
+/**
+ *  @brief  Define UART RTS mode
+ */
+typedef enum {
+    UART_RTS_MODE_AUTO = 0,
+    UART_RTS_MODE_MANUAL,
+} UART_RTSModeTypeDef;
+
+/**
+ *  @brief  Define UART TX pin:A2 B1 D0 D3 D7
+ */
+typedef enum{
+	UART_TX_PA2 = GPIO_PA2,
+	UART_TX_PB1 = GPIO_PB1,
+	UART_TX_PC2 = GPIO_PC2,
+	UART_TX_PD0 = GPIO_PD0,
+	UART_TX_PD3 = GPIO_PD3,
+	UART_TX_PD7 = GPIO_PD7,
+}UART_TxPinDef;
+
+/**
+ *  @brief  Define UART RX pin: A0 B0 B7 C3 C5 D6
+ */
+typedef enum{
+	UART_RX_PA0 = GPIO_PA0,
+	UART_RX_PB0 = GPIO_PB0,
+	UART_RX_PB7 = GPIO_PB7,
+	UART_RX_PC3 = GPIO_PC3,
+	UART_RX_PC5 = GPIO_PC5,
+	UART_RX_PD6 = GPIO_PD6,
+}UART_RxPinDef;
+
+/**
+ *  @brief  Define UART CTS pin : A3 B2 C4 D1
+ */
+typedef enum{
+	UART_CTS_PA3 = GPIO_PA3,
+	UART_CTS_PB2 = GPIO_PB2,
+	UART_CTS_PC4 = GPIO_PC4,
+	UART_CTS_PD1 = GPIO_PD1,
+}UART_CtsPinDef;
+
+/**
+ *  @brief  Define UART RTS pin : A4  B3 B6 C0
+ */
+typedef enum{
+	UART_RTS_PA4 = GPIO_PA4,
+	UART_RTS_PB3 = GPIO_PB3,
+	UART_RTS_PB6 = GPIO_PB6,
+	UART_RTS_PC0 = GPIO_PC0,
+}UART_RtsPinDef;
+
+
+
+/**
+ * @brief     This function servers to indicate Tx state.
+ * @param[in] none.
+ * @return    the state of Tx 0:Tx done 1:not.
+ */
+static inline unsigned char uart_tx_is_busy(void)
+{
+    return ( (reg_uart_status1 & FLD_UART_TX_DONE) ? 0 : 1) ;
+}
+
+/**
+ * @brief     This function resets the UART module.
+ * @param[in] none
+ * @return    none
+ */
+static inline void uart_reset(void)
+{
+	reg_rst0 |= FLD_RST0_UART;
+	reg_rst0 &= (~FLD_RST0_UART);
+}
+
+
+/**
+ * @brief      	This function initializes the UART module.
+ * @param[in]  	g_uart_div  -  uart clock divider
+ * @param[in]  	g_bwpc      -  bitwidth, should be set to larger than
+ *
+ *  			sys_clk      baud rate   g_uart_div         g_bwpc
+ *
+ *	  	  	  	16Mhz        9600          118   			 13
+ *           	 	 	 	 19200         118     			 6
+ *          	 	 	 	 115200         9       		 13
+ *
+ *	  	  	  	24Mhz        9600          249       		 9
+ *           	 	 	 	 19200		   124               9
+ *           	 	 	 	 115200         12    			 15
+ *
+ *	  	  	  	32Mhz        9600          235       		 13
+ *           	 	 	 	 19200		   235               6
+ *           	 	 	 	 115200         17    			 13
+ *
+ *	  	  	  	48Mhz        9600          499       		 9
+ *           	 	 	 	 19200		   249               9
+ *           	 	 	 	 115200         25    			 15
+ *
+ * @param[in]  Parity      - selected parity type for UART interface
+ * @param[in]  StopBit     - selected length of stop bit for UART interface
+ * @return     none
+ */
+extern void uart_init(unsigned short g_uart_div, unsigned char g_bwpc, UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit);
+
+/**
+ * @brief      This function initializes the UART module.
+ * @param[in]  Baudrate  	- uart baud rate
+ * @param[in]  System_clock - clock of system
+ * @param[in]  Parity      	- selected parity type for UART interface
+ * @param[in]  StopBit     	- selected length of stop bit for UART interface
+ * @return     none
+ */
+extern void uart_init_baudrate(unsigned int Baudrate, unsigned int System_clock , UART_ParityTypeDef Parity, UART_StopBitTypeDef StopBit);
+
+/**
+ * @brief     enable uart DMA mode
+ * @param[in] none
+ * @return    none
+ */
+
+extern void uart_dma_enable(unsigned char rx_dma_en, unsigned char tx_dma_en);
+
+/**
+ * @brief     config the irq of uart tx and rx
+ * @param[in] rx_irq_en - 1:enable rx irq. 0:disable rx irq
+ * @param[in] tx_irq_en - 1:enable tx irq. 0:disable tx irq
+ * @return    none
+ */
+extern void uart_irq_enable(unsigned char rx_irq_en, unsigned char tx_irq_en);
+
+//use this index to cycle the four register of uart. this index should be reset to 0,when send data after system wakeup.
+extern unsigned char uart_TxIndex;
+
+/**
+ * @brief     uart send data function with not DMA method.
+ *            variable uart_TxIndex,it must cycle the four registers 0x90 0x91 0x92 0x93 for the design of SOC.
+ *            so we need variable to remember the index.
+ *			  Before entering power-saving mode,you need to call this function in order to ensure that the data sent is completed
+ * @param[in] uartData - the data to be send.
+ * @return    none
+ */
+extern void uart_ndma_send_byte(unsigned char uartData);
+
+/**
+ * @brief     This function is used to set the 'uart_TxIndex' to 0.
+ *			  After wakeup from power-saving mode, you must call this function before sending the data.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline void uart_ndma_clear_tx_index(void)
+{
+    uart_TxIndex=0;
+}
+
+/**
+ * @brief     config the number level setting the irq bit of status register 0x9d
+ *            ie 0x9d[3].
+ *          uart_ndma_get_irq  If the cnt register value(0x9c[0,3]) larger or equal than the value of 0x99[0,3]
+ *            or the cnt register value(0x9c[4,7]) less or equal than the value of 0x99[4,7],
+ *            it will set the irq bit of status register 0x9d, ie 0x9d[3]
+ * @param[in] rx_level - receive level value. ie 0x99[0,3]
+ * @param[in] tx_level - transmit level value.ie 0x99[4,7]
+ * @return    none
+ */
+extern void uart_ndma_irq_triglevel(unsigned char rx_level, unsigned char tx_level);
+
+/**
+ * @brief     get the status of uart irq.
+ * @param[in] none
+ * @return    0: not uart irq ;
+ *            not 0: indicate tx or rx irq
+ */
+
+extern unsigned char uart_ndmairq_get(void);
+
+/**
+ * @brief     uart send data function, this  function tell the DMA to get data from the RAM and start
+ *            the DMA transmission
+ * @param[in] Addr - pointer to the buffer containing data need to send
+ * @return    1: send success ;
+ *            0: DMA busy
+ */
+extern unsigned char uart_dma_send(unsigned char* Addr);
+
+/**
+ * @brief     uart send data function, this  function tell the DMA to get data from the RAM and start
+ *            the DMA transmission
+ * @param[in] byte - single byte data need to send
+ * @return    1: send success ;
+ *            0: DMA busy
+ */
+extern unsigned char uart_send_byte(unsigned char byte);
+
+/**
+ * @brief     data receive buffer initiate function. DMA would move received uart data to the address space,
+ *            uart packet length needs to be no larger than (recBuffLen - 4).
+ * @param[in] RecvAddr - pointer to the receiving buffer
+ * @param[in] RecvBufLen - length in byte of the receiving buffer
+ * @return    none
+ */
+extern void uart_recbuff_init(unsigned char *RecvAddr, unsigned short RecvBufLen);
+
+/**
+ * @brief     This function determines whether parity error occurs once a packet arrives.
+ * @param[in] none
+ * @return    1: parity error ;
+ *            0: no parity error
+ */
+extern unsigned char uart_is_parity_error(void);
+
+/**
+ * @brief     This function clears parity error status once when it occurs.
+ * @param[in] none
+ * @return    none
+ *
+ * Note:
+ *(1)DMA mode
+ * RX FIFO will also be cleared when parity error flag is cleared .
+ *(2)NON-DMA mode
+ * When parity error occurs, clear parity error flag after UART receives the data.
+ * Cycle the four registers (0x90 0x91 0x92 0x93) from register "0x90" to get data when UART receives the data next time.
+ */
+extern void uart_clear_parity_error(void);
+
+/**
+ * @brief     UART hardware flow control configuration. Configure RTS pin.
+ * @param[in] Enable - enable or disable RTS function.
+ * @param[in] Mode - set the mode of RTS(auto or manual).
+ * @param[in] Thresh - threshold of trig RTS pin's level toggle(only for auto mode),
+ *                     it means the number of bytes that has arrived in Rx buf.
+ * @param[in] Invert - whether invert the output of RTS pin(only for auto mode)
+ * @param[in] pin   - RTS pin select,it can be GPIO_PA4/GPIO_PB3/GPIO_PB6/GPIO_PC0.
+ * @return    none
+ */
+extern void uart_set_rts(unsigned char Enable, UART_RTSModeTypeDef Mode, unsigned char Thresh, unsigned char Invert, UART_RtsPinDef pin);
+
+/**
+ * @brief     This function sets the RTS pin's level manually
+ * @param[in] Polarity - set the output of RTS pin(only for manual mode)
+ * @return    none
+ */
+extern void uart_set_rts_level(unsigned char Polarity);
+
+/**
+ * @brief      UART hardware flow control configuration. Configure CTS pin.
+ * @param[in]  Enable - enable or disable CTS function.
+ * @param[in]  Select - when CTS's input equals to select, tx will be stopped
+ * @param[in]  pin   - CTS pin select,it can be GPIO_PA3/GPIO_PB2/GPIO_PC4/GPIO_PD1.
+ * @return     none
+ */
+extern void uart_set_cts(unsigned char Enable, unsigned char Select, UART_CtsPinDef pin);
+
+/**
+* @brief      This function serves to select pin for UART module.
+* @param[in]  tx_pin   - the pin to send data.
+* @param[in]  rx_pin   - the pin to receive data.
+* @return     none
+*/
+extern void uart_gpio_set(UART_TxPinDef tx_pin, UART_RxPinDef rx_pin);
+
+/**
+ * @brief   This function enables the irq when UART module receives error data.
+ * @param[in] none
+ * @return    none
+ */
+extern void uart_mask_error_irq_enable(void);
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw.h
new file mode 100644
index 00000000..8fd1752e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw.h
@@ -0,0 +1,154 @@
+/********************************************************************************************************
+ * @file    usbhw.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef USBHW_H
+#define USBHW_H
+
+#include "bit.h"
+#include "analog.h"
+#include "usbhw_i.h"
+#include "gpio.h"
+
+enum {
+	USB_EDP_PRINTER_IN 		= 8, 	// endpoint 8 is alias of enpoint 0,  becareful.  // default hw buf len = 64
+	USB_EDP_MOUSE 			= 2,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_IN 	= 1,	// default hw buf len = 8
+	USB_EDP_KEYBOARD_OUT 	= 3,	// default hw buf len = 16
+	USB_EDP_AUDIO_IN 		= 4,	// default hw buf len = 64
+	USB_EDP_PRINTER_OUT 	= 5,	// default hw buf len = 64
+	USB_EDP_SPEAKER 		= 6,	// default hw buf len = 16
+	USB_EDP_MIC 			= 7,	// default hw buf len = 16
+#if(USB_GAMEPAD_ENABLE)
+	USB_EDP_GAMEPAD_IN 		= 3,	// default hw buf len = 64
+	USB_EDP_GAMEPAD_OUT 	= 5,	// default hw buf len = 64
+#endif
+	USB_EDP_MS_IN 			= USB_EDP_PRINTER_IN,	// mass storage
+	USB_EDP_MS_OUT 			= USB_EDP_PRINTER_OUT,
+	USB_EDP_SOMATIC_IN 		= USB_EDP_AUDIO_IN,		//  when USB_SOMATIC_ENABLE, USB_EDP_PRINTER_OUT disable
+	USB_EDP_SOMATIC_OUT 	= USB_EDP_PRINTER_OUT,
+    USB_EDP_CDC_IN 			= 4,
+    USB_EDP_CDC_OUT 		= 5,
+};
+
+// #defined in the standard spec
+enum {
+	USB_HID_AUDIO       	= 2,
+	USB_HID_MOUSE       	= 1,
+	USB_HID_KB_MEDIA    	= 3,// media
+	USB_HID_KB_SYS      	= 4,// system : power,sleep,wakeup
+#if(USB_GAMEPAD_ENABLE)
+	USB_HID_GAMEPAD			= 5,// somatic sensor,  may have many report ids
+#endif
+	USB_HID_SOMATIC			= 5,// somatic sensor,  may have many report ids
+};
+
+/**
+ * @brief      This function enables or disables the internal pull-up resistor
+ *             of DP pin of USB interface
+ * @param[in]  En - enables or disables the internal pull-up resistor(1: enable 0: disable)
+ * @return     none
+ */
+static inline void usb_dp_pullup_en(int en)
+{
+	unsigned char dat = analog_read(0x0b);
+	if(en){
+		dat = dat | BIT(7);
+	}else{
+		dat = dat & 0x7f ;
+	}
+
+	analog_write(0x0b, dat);
+}
+
+/**
+ * @brief      This function serves to power on or down USB module
+ * @param[in]  En - 1: power on 0: power down
+ * @return     none
+ */
+static inline void usb_power_on(unsigned char en){
+	if(en){
+		analog_write(0x34, analog_read(0x34) & 0xfd);
+	}else{
+		analog_write(0x34, analog_read(0x34) | 0x02);
+	}
+}
+
+/**
+ * @brief      This function serves to set GPIO MUX function as DP and DM pin of USB
+ * @param[in]  none.
+ * @return     none.
+ */
+static inline void usb_set_pin_en(void)
+{
+	//clear DP first
+	gpio_set_func(GPIO_PA6, AS_GPIO);
+	gpio_set_output_en(GPIO_PA6, 1);
+	gpio_write(GPIO_PA6, 0);
+
+	gpio_set_func(GPIO_PA5, AS_USB);
+	gpio_set_func(GPIO_PA6, AS_USB);
+	usb_dp_pullup_en(1);
+}
+
+/**
+ * @brief      This function disables the manual interrupt
+ *             (Endpont8 is the alias of endpoint0)
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_disable_manual_interrupt(int m);
+
+/**
+ * @brief      This function enable the manual interrupt
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_enable_manual_interrupt(int m);
+
+/**
+ * @brief      This function sends a bulk of data to host via the specified endpoint
+ * @param[in]  ep - the number of the endpoint
+ * @param[in]  data - pointer to the data need to send
+ * @param[in]  len - length in byte of the data need to send
+ * @return     none
+ */
+void usbhw_write_ep(unsigned int ep, unsigned char* data, int len);
+
+/**
+ * @brief      This function sends two bytes data to host via the control endpoint
+ *             (handy help function)
+ * @param[in]  v - the two bytes data need to send
+ * @return     none
+ */
+void usbhw_write_ctrl_ep_u16(unsigned short v);
+
+/**
+ * @brief   This function reads two bytes data from host via the control endpoint
+ * @param   none
+ * @return  the two bytes data read from the control endpoint
+ */
+unsigned short usbhw_read_ctrl_ep_u16(void);
+
+#endif	/* USBHW_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw_i.h
new file mode 100644
index 00000000..1f89daea
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/usbhw_i.h
@@ -0,0 +1,199 @@
+/********************************************************************************************************
+ * @file    usbhw_i.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef USBHW_I_H
+#define USBHW_I_H
+
+#include "register.h"
+
+/**
+ * @brief     This function servers to reset the pointer of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ctrl_ep_ptr(void) {
+	reg_ctrl_ep_ptr = 0;
+}
+
+/**
+ * @brief     This function servers to get the irq status of control Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_ctrl_ep_irq(void) {
+	return reg_ctrl_ep_irq_sta;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of control Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_ctrl_ep_irq(int ep) {
+	reg_ctrl_ep_irq_sta = ep;
+}
+
+/**
+ * @brief     This function servers to set the value of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_write_ctrl_ep_ctrl(unsigned char data) {
+	reg_ctrl_ep_ctrl = data;
+}
+
+/**
+ * @brief     This function servers to read the data of control Endpoint.
+ * @param[in] none.
+ * @return    the value of control Endpoint
+ */
+static inline unsigned char usbhw_read_ctrl_ep_data(void) {
+	return reg_ctrl_ep_dat;
+}
+
+/**
+ * @brief     This function servers to write the data of control Endpoint.
+ * @param[in] data -  the value of control Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ctrl_ep_data(unsigned char data) {
+	reg_ctrl_ep_dat = data;
+}
+
+/**
+ * @brief     This function servers to determine whether control Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline int usbhw_is_ctrl_ep_busy(void) {
+	return reg_ctrl_ep_irq_sta & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to reset the pointer of Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ep_ptr(unsigned int ep) {
+	reg_usb_ep_ptr(ep & 0x07) = 0;
+}
+
+/**
+ * @brief     This function servers to set the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_set_eps_irq_mask(unsigned char mask){
+	reg_usb_mask|=mask;
+}
+
+/**
+ * @brief     This function servers to clr the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq_mask(unsigned char mask){
+	reg_usb_mask &=(~mask);
+}
+
+/**
+ * @brief     This function servers to get the irq status of Endpoint.
+ * @param[in] none.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_eps_irq(void) {
+	return reg_usb_irq;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq(int ep) {
+	reg_usb_irq = ep;
+}
+
+/**
+ * @brief     This function servers to read the data of Endpoint.
+ * @param[in] none.
+ * @return    the value of Endpoint
+ */
+static inline unsigned char usbhw_read_ep_data(unsigned int ep) {
+	return reg_usb_ep_dat(ep & 0x07);
+}
+
+/**
+ * @brief     This function servers to write the data of Endpoint.
+ * @param[in] data -  the value of Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ep_data(unsigned int ep, unsigned char data) {
+	reg_usb_ep_dat(ep & 0x07) = data;
+}
+
+/**
+ * @brief     This function servers to determine whether Endpoint is busy.
+ * @param[in] none.
+ * @return    1: busy; 0: not busy.
+ */
+static inline unsigned int usbhw_is_ep_busy(unsigned int ep) {
+	return reg_usb_ep_ctrl(ep & 0x07) & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to ack.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_ack(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to stall.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_stall(unsigned int ep) {
+	reg_usb_ep_ctrl(ep & 0x07) = FLD_USB_EP_STALL;
+}
+
+/**
+ * @brief     This function servers to set the threshold of printer.
+ * @param[in] th - set the threshold for printer
+ * @return    none.
+ */
+static inline void usbhw_set_printer_threshold(unsigned char th) {
+	reg_usb_ep8_send_thre = th;
+}
+
+/**
+ * @brief     This function servers to set ed8 to fifo mode.
+ * @return    none.
+ */
+static inline void usbhw_set_ep8_fifo_mode(void) {
+	reg_usb_ep8_fifo_mode |= FLD_USB_ENP8_FIFO_MODE;
+}
+
+#endif	/* USBHW_I_H */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/watchdog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/watchdog.h
new file mode 100644
index 00000000..95184768
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_8278/watchdog.h
@@ -0,0 +1,75 @@
+/********************************************************************************************************
+ * @file    watchdog.h
+ *
+ * @brief   This is the header file for B87
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *			All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "register.h"
+#include "bit.h"
+
+/**
+ * @brief     This function set the seconds period.It is likely with WD_SetInterval.
+ *            Just this function calculate the value to set the register automatically .
+ * @param[in] period_s - The seconds to set. unit is second
+ * @return    none
+ */
+static inline void wd_set_interval_ms(unsigned int period_ms)
+{
+	static unsigned short tmp_period_ms = 0;
+	tmp_period_ms = (period_ms*1000*system_clk_mHz>>18);
+	reg_tmr2_tick = 0x00000000;    //reset tick register
+	reg_tmr_ctrl &= (~FLD_TMR_WD_CAPT);
+	reg_tmr_ctrl |= (tmp_period_ms<<9); //set the capture register
+}
+
+/**
+ * @brief     start watchdog. ie enable watchdog
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_start(void){
+	BM_SET(reg_tmr_ctrl, FLD_TMR2_EN);
+	BM_SET(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+
+/**
+ * @brief     stop watchdog. ie disable watchdog
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_stop(void){
+	BM_CLR(reg_tmr_ctrl, FLD_TMR_WD_EN);
+}
+
+/**
+ * @brief     clear watchdog.
+ * @param[in] none
+ * @return    none
+ */
+static inline void wd_clear(void)
+{
+	reg_tmr_sta = FLD_TMR_STA_WD;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/adc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/adc.h
new file mode 100644
index 00000000..40616b03
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/adc.h
@@ -0,0 +1,425 @@
+/********************************************************************************************************
+ * @file	adc.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page ADC
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 supports hardware ADC function.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: adc.h
+ */
+#pragma once
+
+
+
+#include "dma.h"
+#include "compiler.h"
+#include "gpio.h"
+#include <reg_include/register.h>
+
+typedef enum{
+	ADC_VREF_0P9V = 0x01,//Only for internal testing,not recommended.
+	ADC_VREF_1P2V = 0x02,
+}adc_ref_vol_e;
+typedef enum{
+	ADC_VBAT_DIV_OFF = 0,
+	ADC_VBAT_DIV_1F3 = 0x02,
+}adc_vbat_div_e;
+
+typedef enum {
+	NOINPUTN = 0,
+	ADC_GPIO_PB0N = 0x01,
+	ADC_GPIO_PB1N = 0x02,
+	ADC_GPIO_PB2N = 0x03,
+	ADC_GPIO_PB3N = 0x04,
+	ADC_GPIO_PB4N = 0x05,
+	ADC_GPIO_PB5N = 0x06,
+	ADC_GPIO_PB6N = 0x07,
+	ADC_GPIO_PB7N = 0x08,
+	ADC_GPIO_PD0N = 0x09,
+	ADC_GPIO_PD1N = 0x0a,
+	ADC_TEMSENSORN_EE = 0x0e,
+	GND = 0x0f,
+}adc_input_nch_e;
+typedef enum {
+	NOINPUTP = 0,
+	ADC_GPIO_PB0P = 0x01,
+	ADC_GPIO_PB1P = 0x02,
+	ADC_GPIO_PB2P = 0x03,
+	ADC_GPIO_PB3P = 0x04,
+	ADC_GPIO_PB4P = 0x05,
+	ADC_GPIO_PB5P = 0x06,
+	ADC_GPIO_PB6P = 0x07,
+	ADC_GPIO_PB7P = 0x08,
+	ADC_GPIO_PD0P = 0x09,
+	ADC_GPIO_PD1P = 0x0a,
+	ADC_TEMSENSORP_EE = 0x0e,
+	ADC_VBAT = 0x0f,
+}adc_input_pch_e;
+/**
+ * @brief adc input pin type
+ * |           |              |
+ * | :-------- | :----------- |
+ * |   <15:12> |    <11:0>    |
+ * |adc channel|    gpio pin  |
+ */
+typedef enum{
+	ADC_GPIO_PB0 = GPIO_PB0 | (0x1<<12),
+	ADC_GPIO_PB1 = GPIO_PB1 | (0x2<<12),
+	ADC_GPIO_PB2 = GPIO_PB2 | (0x3<<12),
+	ADC_GPIO_PB3 = GPIO_PB3 | (0x4<<12),
+	ADC_GPIO_PB4 = GPIO_PB4 | (0x5<<12),
+	ADC_GPIO_PB5 = GPIO_PB5 | (0x6<<12),
+	ADC_GPIO_PB6 = GPIO_PB6 | (0x7<<12),
+	ADC_GPIO_PB7 = GPIO_PB7 | (0x8<<12),
+	ADC_GPIO_PD0 = GPIO_PD0 | (0x9<<12),
+	ADC_GPIO_PD1 = GPIO_PD1 | (0xa<<12),
+}adc_input_pin_def_e;
+typedef enum{
+	ADC_GPIO_MODE,
+	ADC_VBAT_MODE,
+}adc_input_pin_mode_e;
+
+typedef enum{
+	ADC_RES8 = 0,
+	ADC_RES10 = 0x01,
+	ADC_RES12 = 0x02,
+	ADC_RES14 = 0x03,
+}adc_res_e;
+
+typedef enum{
+	ADC_SAMPLE_CYC_3,
+	ADC_SAMPLE_CYC_6,
+	ADC_SAMPLE_CYC_9,
+	ADC_SAMPLE_CYC_12,
+	ADC_SAMPLE_CYC_15,
+	ADC_SAMPLE_CYC_18,
+	ADC_SAMPLE_CYC_21,
+	ADC_SAMPLE_CYC_24,
+	ADC_SAMPLE_CYC_27,
+	ADC_SAMPLE_CYC_30,
+	ADC_SAMPLE_CYC_33,
+	ADC_SAMPLE_CYC_36,
+	ADC_SAMPLE_CYC_39,
+	ADC_SAMPLE_CYC_42,
+	ADC_SAMPLE_CYC_45,
+	ADC_SAMPLE_CYC_48,
+}adc_sample_cycle_e;
+
+typedef enum{
+	ADC_SAMPLE_FREQ_23K,
+	ADC_SAMPLE_FREQ_48K,
+	ADC_SAMPLE_FREQ_96K,
+	ADC_SAMPLE_FREQ_192K,
+}adc_sample_freq_e;
+
+typedef enum{
+	ADC_MISC_CHN	= BIT(2),
+}adc_chn_e;
+
+typedef enum{
+	ADC_PRESCALE_1   = 0x00,//Only for internal testing and temperature sensor sampling
+//	ADC_PRESCALE_1F2 = 0x01,//Only for internal testing
+	ADC_PRESCALE_1F4 = 0x02,
+//	ADC_PRESCALE_1F8 = 0x03,//Only for internal testing
+}adc_pre_scale_e;
+enum{
+	ADC_MAX_STATE_NUM  = 0x02,
+};
+
+/**
+ * @brief      This function open sar_adc power.
+ * @return   none.
+ */
+static inline void adc_power_on(void)
+{
+	analog_write_reg8 (areg_adc_pga_ctrl, (analog_read_reg8(areg_adc_pga_ctrl)&(~FLD_SAR_ADC_POWER_DOWN)));
+}
+/**
+ * @brief      This function close sar_adc power.
+ * @return     none
+ */
+static inline void adc_power_off(void)
+{
+	analog_write_reg8 (areg_adc_pga_ctrl, (analog_read_reg8(areg_adc_pga_ctrl)|FLD_SAR_ADC_POWER_DOWN));
+}
+/**
+ * @brief      This function reset adc module
+ * @return     none
+ */
+static inline void adc_reset(void)
+{
+	reg_rst3 &= (~FLD_RST3_SARADC );
+	reg_rst3 |=FLD_RST3_SARADC;
+}
+/**
+ * @brief     This function serves to enable adc sample fifo.
+ * @return    none
+ */
+static inline void adc_fifo_enable(void)
+{
+	reg_i2s_cfg2 &= (~FLD_AUDIO_FIFO1_RST);
+}
+/**
+ * @brief     This function serves to disable adc sample fifo.
+ * @return    none
+ */
+static inline void adc_fifo_disable(void)
+{
+	reg_i2s_cfg2 |= FLD_AUDIO_FIFO1_RST;
+}
+/**
+ * @brief      This function enable adc source clock: Pad_24M
+ * @return     none
+ */
+static inline void adc_clk_en(void)
+{
+	analog_write_reg8(areg_adc_clk_setting	, analog_read_reg8(areg_adc_clk_setting	) | FLD_CLK_24M_TO_SAR_EN);
+}
+/**
+ * @brief      This function disable adc source clock: Pad_24M
+ * @return     none
+ */
+static inline void adc_clk_dis(void)
+{
+	analog_write_reg8(areg_adc_clk_setting	, analog_read_reg8(areg_adc_clk_setting	) & (~FLD_CLK_24M_TO_SAR_EN));
+}
+/**
+ * @brief      This function sets adc sample clk. adc sample clk = 24M/(1+div)  div: 0~7.
+ * @param[in]  div - the divider of adc sample clock.
+ * @return     none
+ */
+static inline void adc_set_clk(unsigned char div)
+{
+	analog_write_reg8(areg_adc_sample_clk_div, div);
+}
+/**
+ * @brief      This function sets ADC input channel as misc channel.
+ * @return     none
+ */
+static inline void adc_set_m_chn_en(void)
+{
+	analog_write_reg8(areg_adc_chn_en, FLD_ADC_CHN_EN_M | (ADC_MAX_STATE_NUM<<4) );
+}
+/**
+ * @brief This function serves to set resolution.
+ * @param[in]  res - enum variable of ADC resolution.
+ * @return none
+ */
+static inline void adc_set_resolution(adc_res_e res)
+{
+	analog_write_reg8(areg_adc_res_m, (analog_read_reg8(areg_adc_res_m)&(~FLD_ADC_RES_M)) | res);
+}
+
+/**
+ * @brief      This function serves to set ADC sample time(the number of adc clocks for sample cycles) for the misc channel.
+ * @param[in]  sample_cycle - enum variable of adc sample cycles.
+ * @return     none
+ */
+static inline void adc_set_tsample_cycle(adc_sample_cycle_e sample_cycle)
+{
+	//ana_ee<7:4> is reserved, so no need care its value
+	analog_write_reg8(areg_adc_tsmaple_m, sample_cycle);  //optimize, <7:4> not cared
+}
+/**
+ * @brief      This function open temperature sensor power.
+ * @return     none
+ */
+static inline void adc_temp_sensor_power_on(void)
+{
+	analog_write_reg8(areg_temp_sensor_ctrl, (analog_read_reg8(areg_temp_sensor_ctrl)&(~FLD_TEMP_SENSOR_POWER_DOWN)));
+}
+/**
+ * @brief      This function close temperature sensor power.
+ * @return     none
+ */
+static inline void adc_temp_sensor_power_off(void)
+{
+	analog_write_reg8(areg_temp_sensor_ctrl, (analog_read_reg8(areg_temp_sensor_ctrl)|FLD_TEMP_SENSOR_POWER_DOWN));
+}
+/**
+ * @brief This function serves to set input channel in differential_mode.
+ * @param[in]  p_ain - enum variable of ADC analog positive input channel.
+ * @param[in]  n_ain - enum variable of ADC analog negative input channel.
+ * @return none
+ */
+static inline void adc_set_diff_input(adc_input_pch_e p_ain, adc_input_nch_e n_ain)
+{
+	analog_write_reg8(areg_adc_res_m, analog_read_reg8(areg_adc_res_m) | FLD_ADC_EN_DIFF_CHN_M);
+	analog_write_reg8(areg_adc_ain_chn_misc, n_ain | p_ain<<4 );
+}
+/**
+ * @brief This function serves to set state and capture_state length.
+ * @param[in]   r_max_mc - Value of length of "capture" state for MISC channel.
+ * @param[in]   r_max_s - Value of length of "set" state for MISC channel.
+ * @return none
+ */
+static inline void adc_set_state_length(unsigned short r_max_mc,unsigned char r_max_s)
+{
+	analog_write_reg8(areg_r_max_mc, r_max_mc);
+	analog_write_reg8(areg_r_max_s, ((r_max_mc>>8)<<6)| (r_max_s & FLD_R_MAX_S));
+}
+/**
+ * @brief     This function serves to config adc_dma_chn channel.
+ * @param[in]  chn - the DMA channel
+ * @return    none
+ */
+void adc_set_dma_config(dma_chn_e chn);
+/**
+ * @brief     This function serves to start sample with adc DMA channel.
+ * @param[out] adc_data_buf 	- the address of data buffer
+ * @param[in] data_byte_len - the length of data size by byte
+ * @return    none
+ */
+void adc_start_sample_dma(unsigned short *adc_data_buf,unsigned int data_byte_len);
+/**
+ * @brief This function is used to set IO port for ADC supply or ADC IO port voltage sampling.
+ * @param[in]  mode - ADC gpio pin sample mode
+ * @param[in]  pin - adc_input_pin_def_e ADC input gpio pin
+ * @return none
+ */
+void adc_pin_config(adc_input_pin_mode_e mode ,adc_input_pin_def_e pin);
+/**
+ * @brief This function is used to set two IO port configuration and set it as input channel of ADC difference IO port voltage sampling.
+ * @param[in]  p_pin - enum variable of ADC analog positive input IO.
+ * @param[in]  n_pin - enum variable of ADC analog negative input IO.
+ * @return none
+ */
+void adc_set_diff_pin(adc_input_pin_def_e p_pin, adc_input_pin_def_e n_pin);
+/**
+ * @brief     This function is serves to set the reference voltage for one-point calibration.
+ *            ADC calibration environment: GPIO sampling, the pre_scale is 1/4, and the sampling frequency is 48K.
+ * 		      Therefore, the voltage value measured using the calibration interface in this environment is the most accurate.
+ * @param[in] data - GPIO sampling one-point calibration value.
+ * @return none
+ */
+void adc_set_gpio_calib_vref(unsigned short data);
+/**
+ * @brief This function serves to set the channel reference voltage.
+ * @param[in]  v_ref - enum variable of ADC reference voltage.
+ * @return none
+ */
+void adc_set_ref_voltage(adc_ref_vol_e v_ref);
+/**
+ * @brief This function serves to set the sample frequency.
+ * @param[in]  sample_freq - enum variable of ADC sample frequency.
+ * @return none
+ */
+void adc_set_sample_rate(adc_sample_freq_e sample_freq);
+/**
+ * @brief This function serves to set pre_scaling factor.
+ * @param[in]  pre_scale - enum variable of ADC pre_scaling factor.
+ * @return none
+ */
+void adc_set_scale_factor(adc_pre_scale_e pre_scale);
+/**
+ * @brief This function servers to initialized ADC temperature sensor.When the reference voltage is set to 1.2V, and
+ * at the same time, the division factor is set to 1 the most accurate.
+ * @return     none.
+ * @attention  Temperature sensor suggested initial setting are Vref = 1.2V, pre_scale = 1.
+ * 			The user don't need to change it.
+ */
+void adc_temperature_sample_init(void);
+/**
+ * @brief This function serves to ADC gpio sample init.
+ * @param[in]  pin - adc_input_pin_def_e ADC input gpio pin
+ * @param[in]  v_ref - enum variable of ADC reference voltage.
+ * @param[in]  pre_scale - enum variable of ADC pre_scaling factor.
+ * @param[in]  sample_freq - enum variable of ADC sample frequency.
+ * @return none
+ * @attention  gpio voltage sample suggested initial setting are Vref = 1.2V, pre_scale = 1/4. 
+ *			changed by chaofan.20201230.
+ *			   In order to switch the pin of the ADC, it can be done by calling the interface 'adc_pin_config' and 'adc_set_diff_input'.
+ */
+void adc_gpio_sample_init(adc_input_pin_def_e pin,adc_ref_vol_e v_ref,adc_pre_scale_e pre_scale,adc_sample_freq_e sample_freq);
+
+/**
+ * @brief This function servers to set ADC configuration with internal Vbat channel for ADC supply voltage sampling.
+ * @return none
+ * @attention Vbat channel battery voltage sample suggested initial setting are Vref = 1.2V, pre_scale = 1/4, vbat_div = off.
+ * 			The Vbat channel battery voltage sample range is 1.8~3.5V and is low accuracy,
+ * 			and must set sys_init with the mode for battery voltage less than 3.6V.
+ * 			For accurate battery voltage sampling or battery voltage > 3.6V, should use gpio sampling with some external voltage divider.
+ *			Recommended configuration parameters:
+ *			--3/4 external resistor voltage divider(total resistance 400k, without any capacitance),
+ *			--1.2V Vref,
+ *			--1/4 Scale
+ *			--Sampling frequence below 48K.
+ *			changed by chaofan.20201230.
+ */
+void adc_battery_voltage_sample_init(void);
+/**
+ * @brief      This function serves to select Vbat voltage division factor
+ * @param[in]  vbat_div - enum variable of Vbat division factor.
+ * @return     none
+ */
+void adc_set_vbat_divider(adc_vbat_div_e vbat_div);
+/**
+ * @brief This function serves to ADC init.
+ * @param[in]  v_ref - enum variable of ADC reference voltage.
+ * @param[in]  pre_scale - enum variable of ADC pre_scaling factor.
+ * @param[in]  sample_freq - enum variable of ADC sample frequency.
+ * @return     none
+ * @attention  Many features are configured in adc_init function. But some features
+ * 		such as adc_clk, resolution, tsample_cycle, we think better to set as default value,
+ * 		and user don't need to change them in most use cases.
+ */
+void adc_init(adc_ref_vol_e v_ref,adc_pre_scale_e pre_scale,adc_sample_freq_e sample_freq);
+/**
+ * @brief This function serves to start adc sample and get raw adc sample code.
+ * @param[out]   sample_buffer 		- pointer to the buffer adc sample code need to store.
+ * @param[in]   sample_num 			- the number of adc sample code.
+ * @return 		none
+ */
+void adc_get_code_dma(unsigned short *sample_buffer, unsigned short sample_num);
+/**
+ * @brief This function serves to directly get an adc sample code from analog registers.
+ * @return 		adc_code 	- the adc sample code.
+ */
+unsigned short adc_get_code(void);
+/**
+ * @brief This function is used to calib ADC 1.2V vref offset for GPIO two-point.
+ * @param[in] offset - GPIO sampling two-point calibration value offset.
+ * @return none
+ */
+void adc_set_gpio_two_point_calib_offset(signed char offset);
+/**
+ * @brief This function serves to calculate voltage from adc sample code.
+ * 		  ADC calibration environment: GPIO sampling, the pre_scale is 1/4, and the sampling frequency is 48K.
+ * 		  Therefore, the voltage value measured using the calibration interface in this environment is the most accurate.
+ * @param[in]   adc_code	- the adc sample code.
+ * @return 		adc_vol_mv 	- the average value of adc voltage value.
+ */
+unsigned short adc_calculate_voltage(unsigned short adc_code);
+/**
+ * @brief This function serves to calculate temperature from temperature sensor adc sample code.
+ * @param[in]   adc_code	 		- the temperature sensor adc sample code.
+ * @return 		adc_temp_value	 	- the of temperature value.
+ * attention   Temperature and adc_code are linearly related. We test four chips between -40~130 (Celsius) and got an average relationship:
+ * 			Temp =  564 - ((adc_code * 819)>>13),when Vref = 1.2V, pre_scale = 1.
+ */
+unsigned short adc_calculate_temperature(unsigned short adc_code);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/aes.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/aes.h
new file mode 100644
index 00000000..95aeeb34
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/aes.h
@@ -0,0 +1,156 @@
+/********************************************************************************************************
+ * @file	aes.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page AES
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 supports hardware AES function.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: aes.h
+ */
+#ifndef _AES_H_
+#define _AES_H_
+
+#include "compiler.h"
+#include "./reg_include/aes_reg.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**
+ * @brief AES mode.
+ */
+typedef enum{
+	AES_ENCRYPT_MODE	=  0,
+	AES_DECRYPT_MODE	=  2,
+}aes_mode_e;
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+ /* @brief     This function refer to encrypt. AES module register must be used by word. , all data need big endian.
+ * @param[in] key       - the key of encrypt.
+ * @param[in] plaintext - the plaintext of encrypt.
+ * @param[in] result    - the result of encrypt.
+ * @return    none
+ */
+int aes_encrypt(unsigned char *key, unsigned char* plaintext, unsigned char *result);
+
+/**
+ * @brief     This function refer to decrypt. AES module register must be used by word., all data need big endian.
+ * @param[in] key         - the key of decrypt.
+ * @param[in] decrypttext - the decrypttext of decrypt.
+ * @param[in] result      - the result of decrypt.
+ * @return    none.
+ */
+int aes_decrypt(unsigned char *key, unsigned char* decrypttext, unsigned char *result);
+
+/**
+ * @brief     This function refer to set the base addr of data which use in CEVA module
+ * @param[in] addr - the base addr of CEVA data.
+ * @return    none.
+ */
+void aes_set_em_base_addr(unsigned int addr);
+
+/**
+ * @brief     This function refer to encrypt/decrypt to set key and data. AES module register must be used by word.
+ * 				All data need Little endian.
+ * @param[in] key  - the key of encrypt/decrypt.
+ * @param[in] data - the data which to do encrypt/decrypt.
+ * @return    none
+ */
+void aes_set_key_data(unsigned char *key, unsigned char* data);
+
+/**
+ * @brief     This function refer to encrypt/decrypt to get result. AES module register must be used by word.
+ * @param[in] result - the result of encrypt/decrypt. Little endian
+ * @return    none.
+ */
+void aes_get_result(unsigned char *result);
+
+/**
+ * @brief     This function refer to set aes mode.
+ * @param[in] mode - the irq mask.
+ * @return    none.
+ */
+static inline void aes_set_mode(aes_mode_e mode)
+{
+	reg_aes_mode = (FLD_AES_START | mode);
+}
+
+/**
+ * @brief     This function refer to set aes irq mask.
+ * @param[in] mask - the irq mask.
+ * @return    none.
+ */
+static inline void aes_set_irq_mask(aes_irq_e mask)
+{
+	reg_aes_irq_mask |= mask;
+}
+
+/**
+ * @brief     This function refer to clr aes irq mask.
+ * @param[in] mask - the irq mask.
+ * @return    none.
+ */
+static inline void aes_clr_irq_mask(aes_irq_e mask)
+{
+	reg_aes_irq_mask &= (~mask);
+}
+
+/**
+ * @brief     This function refer to get aes irq status.
+ * @param[in] status - the irq status to get.
+ * @return    none.
+ */
+static inline int aes_get_irq_status(aes_irq_e status)
+{
+	return (reg_aes_irq_status & status);
+}
+
+/**
+ * @brief     This function refer to clr aes irq status.
+ * @param[in] status - the irq status to clear.
+ * @return    none.
+ */
+static inline void aes_clr_irq_status(aes_irq_e status)
+{
+	reg_aes_clr_irq_status = (status);
+}
+
+#endif /* _AES_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/analog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/analog.h
new file mode 100644
index 00000000..e99ea18f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/analog.h
@@ -0,0 +1,186 @@
+/********************************************************************************************************
+ * @file	analog.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/*******************************      analog control registers: 0xb8      ******************************/
+/**	@page ANALOG
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 analog support dma and normal mode, in each mode, support byte/halfword/word/buffer write and read.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: analog.h
+ */
+#pragma once
+
+
+#include <reg_include/register.h>
+#include "dma.h"
+#include "compiler.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+
+/**
+ * @brief      This function serves to analog register read by byte.
+ * @param[in]  addr - address need to be read.
+ * @return     the result of read.
+ */
+_attribute_ram_code_sec_noinline_ unsigned char analog_read_reg8(unsigned char addr);
+
+/**
+ * @brief      This function serves to analog register write by byte.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  data - the value need to be write.
+ * @return     none.
+ */
+_attribute_ram_code_sec_noinline_ void analog_write_reg8(unsigned char addr, unsigned char data);
+
+/**
+ * @brief      This function serves to analog register read by halfword.
+ * @param[in]  addr - address need to be read.
+ * @return     the result of read.
+ */
+unsigned short analog_read_reg16(unsigned char addr);
+
+/**
+ * @brief      This function serves to analog register write by halfword.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  data - the value need to be write.
+ * @return     none.
+ */
+void analog_write_reg16(unsigned char addr, unsigned short data);
+
+/**
+ * @brief      This function serves to analog register read by word.
+ * @param[in]  addr - address need to be read.
+ * @return     the result of read.
+ */
+ unsigned int analog_read_reg32(unsigned char addr);
+
+ /**
+  * @brief      This function serves to analog register write by word.
+  * @param[in]  addr - address need to be write.
+  * @param[in]  data - the value need to be write.
+  * @return     none.
+  */
+void analog_write_reg32(unsigned char addr, unsigned int data);
+/**
+ * @brief      This function serves to analog register read.
+ * @param[in]  addr  - address need to be read.
+ * @param[out] buff  - the ptr of buffer to store the read data.
+ * @param[in]  len   - the length of read value.
+ * @return     none.
+ */
+_attribute_ram_code_sec_noinline_ void analog_read_buff(unsigned char addr, unsigned char *buff, int len);
+
+/**
+ * @brief      This function serves to analog register write.
+ * @param[in]  addr  - address need to be write.
+ * @param[in]  buff  - the ptr of value need to be write.
+ * @param[in]  len   - the length of write value.
+ * @return     none.
+ */
+_attribute_ram_code_sec_noinline_ void analog_write_buff(unsigned char addr, unsigned char *buff, int len);
+
+
+/**
+ * @brief      This function serves to analog register write by word using dma.
+ * @param[in]  chn  - the dma channel.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  pdat - the ptr of data need to be write.
+ * @return     none.
+ */
+void analog_write_reg32_dma(dma_chn_e chn, unsigned char addr, void *pdat);
+
+/**
+ * @brief      This function serves to analog register write by word using dma.
+ * @param[in]  chn  - the dma channel.
+ * @param[in]  addr - address need to be read.
+ * @param[out] pdat - the buffer ptr to store read data.
+ * @return     none.
+ */
+void analog_read_reg32_dma(dma_chn_e chn, unsigned char addr,void *pdat);
+
+/**
+ * @brief      This function write buffer to analog register by dma channel.
+ * @param[in]  chn  - the dma channel.
+ * @param[in]  addr - address need to be write.
+ * @param[in]  pdat - the buffer ptr need to be write.
+ * @param[in]  len  - the length of buffer.
+ * @return     none.
+ */
+void analog_write_buff_dma(dma_chn_e chn, unsigned char addr, unsigned char *pdat, unsigned int len);
+
+/**
+ * @brief      This function write buffer to analog register by dma channel.
+ * @param[in]  chn  - the dma channel.
+ * @param[in]  addr - address need to be read from.
+ * @param[out] pdat - the buffer ptr to store read data.
+ * 			   note: The size of array pdat must be a multiple of 4.
+ * 			  	 	For example, if you just need read 5 byte by dma, you should
+ * 			  	 	define the size of array pdat to be greater than 8 other than 5.
+ * 			  	 	Because the dma would return 4 byte data every time, 5 byte is
+ * 			  	 	not enough to store them.
+ * @param[in]  len  - the length of read data.
+ * @return     none.
+ */
+void analog_read_buff_dma(dma_chn_e chn, unsigned char addr, unsigned char *pdat, unsigned int len);
+
+/**
+ * @brief      This function write buffer to analog register by dma channel.
+ * @param[in]  chn  - the dma channel.
+ * @param[in]  pdat - the buffer(addr & data) ptr need to be write,
+ * 			   note: The array pdat should look like this,
+ * 			   |  pdat     |            |        |
+ * 			   |  :------  | :----------|  :---- |
+ * 			   |  pdat[0]  |   address  |  0x3a  |
+ * 			   |  pdat[1]  |    data    |  0x11  |
+ * 			   |  pdat[2]  |   address  |  0x3b  |
+ *			   |  pdat[3]  |    data    |  0x22  |
+ *			   |  ......   |            |        |
+ * 				It means write data 0x11 to address 0x3a,
+ * 						 write data 0x22 to address 0x3b,
+ * 						 ......
+ * @param[in]  len - the length of read data.
+ * @return     none.
+ */
+void analog_write_addr_data_dma(dma_chn_e chn, void *pdat, int len);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/audio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/audio.h
new file mode 100644
index 00000000..a3bd36c5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/audio.h
@@ -0,0 +1,1104 @@
+/********************************************************************************************************
+ * @file	audio.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page AUDIO
+ *
+ *	Introduction
+ *	===============
+ *	audio module consists of 3 parts: audio code, audio in path , and audio out path.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: audio.h
+ */
+#ifndef audio_H
+#define audio_H
+
+#include "reg_include/register.h"
+#include "i2c.h"
+#include "pwm.h"
+#include "compiler.h"
+
+typedef enum{
+	I2S_BCK_PC3      = GPIO_PC3,
+	I2S_ADC_LR_PC4   = GPIO_PC4,
+	I2S_ADC_DAT_PC5  = GPIO_PC5,
+	I2S_DAC_LR_PC6   = GPIO_PC6,
+	I2S_DAC_DAT_PC7  = GPIO_PC7,
+}i2s_pin_e;
+
+
+typedef enum{
+	DMIC_B2_DAT_B3_CLK,//mono B3 clk1
+	DMIC_C1_DAT_C2_CLK,//mono C2 clk1
+	DMIC_D4_DAT_D5_CLK,//mono D5 clk1
+	DMIC_GROUPB_B2_DAT_B3_B4_CLK,
+	DMIC_GROUPC_C1_DAT_C2_C3_CLK,
+	DMIC_GROUPD_D4_DAT_D5_D6_CLK,
+}dmic_pin_group_e;
+
+
+typedef enum{
+	MIC_MODE,
+	SPK_MODE,
+	LOOP_MODE,
+}audio_loop_mode_e;
+
+
+typedef enum{
+	CODEC_I2S ,
+	IO_CODEC ,
+	IO_I2S,
+}audio_flow_e;
+
+
+typedef enum{
+	I2S_RJ_MODE ,
+	I2S_LJ_MODE ,
+	I2S_I2S_MODE,
+	I2S_DSP_MODE,
+}i2s_mode_select_e;
+
+typedef enum{
+	CODEC_PARALLEL_MODE ,
+	CODEC_LJ_MODE ,
+	CODEC_DSP_MODE,
+	CODEC_I2S_MODE,
+}codec_mode_select_e;
+
+
+typedef enum{
+	CODEC_ITF_AC,
+	CODEC_ITF_PD,
+}codec_interface_select_e;
+
+typedef enum{
+   	BIT_16_MONO,
+	BIT_20_OR_24_MONO ,
+	BIT_16_STEREO,
+	BIT_20_OR_24_STEREO ,
+}audio_in_mode_e;
+
+typedef enum{
+   	BIT_16_MONO_FIFO0 ,
+	BIT_20_OR_24_MONO_FIFO0 ,
+	BIT_16_STEREO_FIFO0 ,
+	BIT_20_OR_24_STEREO_FIFO0 ,
+	BIT_16_MONO_FIFO1 ,
+	BIT_20_OR_24_MONO_FIFO1 ,
+	BIT_16_STEREO_FIFO0_AND_FIFO1 ,
+	BIT_20_OR_24STEREO_FIFO0_AND_FIFO1 ,
+
+}audio_out_mode_e;
+
+typedef enum{
+	I2S_BIT_16_DATA,
+	I2S_BIT_20_DATA ,
+	I2S_BIT_24_DATA,
+}i2s_data_select_e;
+
+typedef enum{
+	CODEC_BIT_16_DATA,
+	CODEC_BIT_20_DATA=2,
+	CODEC_BIT_24_DATA,
+}codec_data_select_e;
+
+
+typedef enum{
+    MONO_BIT_16,
+	MONO_BIT_20,
+	MONO_BIT_24,
+	STEREO_BIT_16,
+	STEREO_BIT_20,
+	STEREO_BIT_24,
+}audio_channel_wl_mode_e;
+
+
+typedef enum{
+	AUDIO_BIT_16_DATA,
+	AUDIO_BIT_20_DATA,
+	AUDIO_BIT_24_DATA,
+}audio_wl_select_e;
+
+typedef enum{
+	AUDIO_MONO,
+	AUDIO_STEREO,
+}audio_channel_select_e;
+
+
+typedef enum{
+	I2S_S_CODEC_M,
+	I2S_M_CODEC_S,
+}i2s_codec_m_s_mode_e;
+
+typedef enum{
+	MCU_WREG,
+	I2C_WREG ,
+}codec_wreg_mode_e;
+
+typedef enum{
+	I2S_DATA_INVERT_DIS,
+	I2S_DATA_INVERT_EN ,
+}audio_data_invert_e;
+
+typedef enum{
+	I2S_LR_CLK_INVERT_DIS,
+	I2S_LR_CLK_INVERT_EN,
+}audio_i2s_lr_clk_invert_e;
+
+typedef enum
+{
+	DAC_OUTPUT_L_R_CHN,
+	DAC_OUTPUT_L_CHN,
+}audio_output_chn_e;
+
+typedef enum
+{
+	SINGLE_ENDED_INPUT,
+	DIFF_ENDED_INPUT,
+}audio_input_mode_select_e;
+
+typedef struct {
+	unsigned char  audio_in_mode;
+	unsigned char  audio_out_mode;
+	unsigned char 	i2s_data_select;
+	unsigned char  codec_data_select;
+	unsigned char  i2s_codec_m_s_mode;
+	unsigned char  in_digital_gain;
+	unsigned char  in_analog_gain;
+	unsigned char  out_digital_gain;
+	unsigned char  out_analog_gain;
+	unsigned char  mic_input_mode_select;
+	unsigned char  dac_output_chn_select;
+}aduio_i2s_codec_config_t;
+
+
+typedef struct {
+	unsigned char  i2s_lr_clk_invert_select;
+	unsigned char  i2s_data_invert_select;
+}audio_i2s_invert_config_t;
+
+
+
+typedef enum{
+	I2S_DATA_IN_FIFO ,
+	USB_DATA_IN_FIFO ,
+	SAR_ADC_DATA_IN_FIFO,
+	IN_NO_USE,
+}audio_mux_ain_e;
+
+typedef enum{
+	I2S_OUT ,
+	USB_IOS_OUT ,
+	OUT_NO_USE=3,
+}audio_mux_aout_e;
+
+/**
+ * define audio rate value.
+ */
+typedef enum{
+	AUDIO_8K,
+	AUDIO_16K=3,
+	AUDIO_32K=6,
+	AUDIO_44EP1K,
+	AUDIO_48K,
+	AUDIO_192K=12,
+	AUDIO_ADC_16K_DAC_48K,
+}audio_sample_rate_e;
+
+typedef enum{
+	AMIC_INPUT,
+	DMIC_INPUT,
+	LINE_INPUT,
+}audio_input_mode_e;
+
+typedef enum{
+	AMIC_IN_TO_BUF,
+	DMIC_IN_TO_BUF,
+	LINE_IN_TO_BUF,
+	AMIC_IN_TO_BUF_TO_LINE_OUT,
+	DMIC_IN_TO_BUF_TO_LINE_OUT,
+	LINE_IN_TO_BUF_TO_LINE_OUT,
+	BUF_TO_LINE_OUT,
+}audio_flow_mode_e;
+
+
+
+typedef enum{
+	AUDIO_RATE_EQUAL,
+	AUDIO_RATE_GT_L0,
+	AUDIO_RATE_GT_L1,
+	AUDIO_RATE_LT_L0,
+	AUDIO_RATE_LT_L1,
+	AUDIO_MATCH_SIZE,
+}audio_rate_match_e;
+
+
+/*[0,+43], 1 dB steps*/
+typedef enum{
+	CODEC_IN_D_GAIN_0_DB=0,
+	CODEC_IN_D_GAIN_4_DB=4,
+	CODEC_IN_D_GAIN_8_DB=8,
+	CODEC_IN_D_GAIN_12_DB=12,
+	CODEC_IN_D_GAIN_16_DB=16,
+	CODEC_IN_D_GAIN_20_DB=20,
+	CODEC_IN_D_GAIN_43_DB=43,
+}codec_in_path_digital_gain_e;
+
+
+typedef enum{
+	CODEC_IN_A_GAIN_0_DB,
+	CODEC_IN_A_GAIN_4_DB,
+	CODEC_IN_A_GAIN_8_DB,
+	CODEC_IN_A_GAIN_12_DB,
+	CODEC_IN_A_GAIN_16_DB,
+	CODEC_IN_A_GAIN_20_DB,
+}codec_in_path_analog_gain_e;
+
+
+
+typedef enum{
+	CODEC_OUT_D_GAIN_0_DB=0,
+	CODEC_OUT_D_GAIN_m1_DB,
+	CODEC_OUT_D_GAIN_m2_DB,
+	CODEC_OUT_D_GAIN_m3_DB,
+	CODEC_OUT_D_GAIN_m4_DB,
+	CODEC_OUT_D_GAIN_m5_DB,
+	CODEC_OUT_D_GAIN_m6_DB,
+	CODEC_OUT_D_GAIN_m7_DB,
+	CODEC_OUT_D_GAIN_m8_DB,
+	CODEC_OUT_D_GAIN_m9_DB,
+	CODEC_OUT_D_GAIN_m10_DB,
+	CODEC_OUT_D_GAIN_m11_DB,
+	CODEC_OUT_D_GAIN_m12_DB,
+	CODEC_OUT_D_GAIN_m13_DB,
+	CODEC_OUT_D_GAIN_m14_DB,
+	CODEC_OUT_D_GAIN_m15_DB,
+	CODEC_OUT_D_GAIN_m16_DB,
+	CODEC_OUT_D_GAIN_m17_DB,
+	CODEC_OUT_D_GAIN_m18_DB,
+	CODEC_OUT_D_GAIN_m19_DB,
+	CODEC_OUT_D_GAIN_m20_DB,
+	CODEC_OUT_D_GAIN_m21_DB,
+	CODEC_OUT_D_GAIN_m22_DB,
+	CODEC_OUT_D_GAIN_m23_DB,
+	CODEC_OUT_D_GAIN_m24_DB,
+	CODEC_OUT_D_GAIN_m25_DB,
+	CODEC_OUT_D_GAIN_m26_DB,
+	CODEC_OUT_D_GAIN_m27_DB,
+	CODEC_OUT_D_GAIN_m28_DB,
+	CODEC_OUT_D_GAIN_m29_DB,
+	CODEC_OUT_D_GAIN_m30_DB,
+	CODEC_OUT_D_GAIN_m31_DB=31,
+
+	CODEC_OUT_D_GAIN_32_DB,
+	CODEC_OUT_D_GAIN_31_DB,
+	CODEC_OUT_D_GAIN_30_DB,
+	CODEC_OUT_D_GAIN_29_DB,
+	CODEC_OUT_D_GAIN_28_DB,
+	CODEC_OUT_D_GAIN_27_DB,
+	CODEC_OUT_D_GAIN_26_DB,
+	CODEC_OUT_D_GAIN_25_DB,
+	CODEC_OUT_D_GAIN_24_DB,
+	CODEC_OUT_D_GAIN_23_DB,
+	CODEC_OUT_D_GAIN_22_DB,
+	CODEC_OUT_D_GAIN_21_DB,
+	CODEC_OUT_D_GAIN_20_DB,
+	CODEC_OUT_D_GAIN_19_DB,
+	CODEC_OUT_D_GAIN_18_DB,
+	CODEC_OUT_D_GAIN_17_DB,
+	CODEC_OUT_D_GAIN_16_DB,
+	CODEC_OUT_D_GAIN_15_DB,
+	CODEC_OUT_D_GAIN_14_DB,
+	CODEC_OUT_D_GAIN_13_DB,
+	CODEC_OUT_D_GAIN_12_DB,
+	CODEC_OUT_D_GAIN_11_DB,
+	CODEC_OUT_D_GAIN_10_DB,
+	CODEC_OUT_D_GAIN_9_DB,
+	CODEC_OUT_D_GAIN_8_DB,
+	CODEC_OUT_D_GAIN_7_DB,
+	CODEC_OUT_D_GAIN_6_DB,
+	CODEC_OUT_D_GAIN_5_DB,
+	CODEC_OUT_D_GAIN_4_DB,
+	CODEC_OUT_D_GAIN_3_DB,
+	CODEC_OUT_D_GAIN_2_DB,
+	CODEC_OUT_D_GAIN_1_DB,
+}codec_out_path_digital_gain_e;
+
+
+
+typedef enum{
+
+	CODEC_OUT_A_GAIN_12_DB,
+	CODEC_OUT_A_GAIN_11_DB,
+	CODEC_OUT_A_GAIN_10_DB,
+	CODEC_OUT_A_GAIN_9_DB,
+	CODEC_OUT_A_GAIN_8_DB,
+	CODEC_OUT_A_GAIN_7_DB,
+	CODEC_OUT_A_GAIN_6_DB,
+	CODEC_OUT_A_GAIN_5_DB,
+	CODEC_OUT_A_GAIN_4_DB,
+	CODEC_OUT_A_GAIN_3_DB,
+	CODEC_OUT_A_GAIN_2_DB,
+	CODEC_OUT_A_GAIN_1_DB,
+	CODEC_OUT_A_GAIN_0_DB,
+	CODEC_OUT_A_GAIN_m1_DB,
+	CODEC_OUT_A_GAIN_m2_DB,
+	CODEC_OUT_A_GAIN_m3_DB,
+	CODEC_OUT_A_GAIN_m4_DB,
+	CODEC_OUT_A_GAIN_m5_DB,
+	CODEC_OUT_A_GAIN_m6_DB,
+	CODEC_OUT_A_GAIN_m7_DB,
+	CODEC_OUT_A_GAIN_m8_DB,
+	CODEC_OUT_A_GAIN_m9_DB,
+	CODEC_OUT_A_GAIN_m10_DB,
+	CODEC_OUT_A_GAIN_m11_DB,
+	CODEC_OUT_A_GAIN_m12_DB,
+	CODEC_OUT_A_GAIN_m13_DB,
+	CODEC_OUT_A_GAIN_m14_DB,
+	CODEC_OUT_A_GAIN_m15_DB,
+	CODEC_OUT_A_GAIN_m16_DB,
+	CODEC_OUT_A_GAIN_m17_DB,
+	CODEC_OUT_A_GAIN_m18_DB,
+	CODEC_OUT_A_GAIN_m19_DB,
+}codec_out_path_analog_gain_e;
+
+
+/*The Wind Noise filter (WNF) is a programmable high pass filter feature enabling to reduce wind noise .
+The wind noise filter is a 1st order filter.
+                   Mode1  -3dB   59Hz
+corner frequency   Mode2  -3dB   117Hz
+ 	 	 	 	   Mode3  -3dB   235Hz
+*/
+typedef enum{
+CODEC_ADC_WNF_INACTIVE,
+CODEC_ADC_WNF_MODE1,
+CODEC_ADC_WNF_MODE2,
+CODEC_ADC_WNF_MODE3,
+}adc_wnf_mode_sel_e;
+
+
+
+typedef enum
+{
+	INNER_CODEC,
+	EXT_CODEC,//wm8731
+}codec_type_e;
+
+
+
+
+typedef enum
+{
+	CODEC_1P8V,
+	CODEC_2P8V,
+}codec_volt_supply_e;
+
+typedef struct {
+	unsigned char    i2s_clk_step;
+	unsigned char    i2s_clk_mode;
+	unsigned char 	 i2s_bclk_div;
+	unsigned short   i2s_lrclk_adc_div;
+	unsigned short   i2s_lrclk_dac_div;
+}aduio_i2s_clk_config_t;
+/**
+ * 	@brief      This function serves to set the clock of i2s
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ */
+static inline void audio_set_i2s_clk(unsigned char step,unsigned char  mod)
+{
+	reg_i2s_step = (step&FLD_I2S_STEP)|FLD_I2S_CLK_EN;
+	reg_i2s_mod = mod;
+}
+
+/**
+ * 	@brief      This function serves to set the clock of codec
+ * 	@param[in]  step - the dividing factor of step.
+ * 	@param[in]  mod - the dividing factor of mod.
+ * 	@return     none
+ * 	@attention  codec clock  divider from pll,so pll must be 192M
+ */
+static inline void audio_set_codec_clk(unsigned char step,unsigned char  mod)
+{
+	BM_CLR(reg_dmic_clk_set,BIT(0));//set dmic_div
+	reg_dmic_step = (step&FLD_DMIC_STEP)|FLD_DMIC_SEL;
+	reg_dmic_mod = mod;
+}
+
+
+/**
+ * 	@brief      This function serves to set enable i2s clk
+ * 	@return     none
+ */
+static inline void audio_i2s_clk_en(void)
+{
+	BM_SET(reg_i2s_step,FLD_I2S_CLK_EN);
+}
+
+/**
+ * 	@brief      This function serves to set disable i2s clk.
+ * 	@return     none
+ */
+static inline void audio_i2s_clk_dis(void)
+{
+	BM_CLR(reg_i2s_step,FLD_I2S_CLK_EN);
+}
+
+
+/**
+ * 	@brief      This function serves to set disable codec clk
+ * 	@return     none
+ */
+static inline void audio_codec_clk_en(void)
+{
+	BM_SET(reg_dmic_step,FLD_DMIC_SEL);
+}
+
+
+/**
+ * 	@brief      This function serves to set disable codec clk
+ * 	@return     none
+ */
+static inline void audio_codec_clk_dis(void)
+{
+	BM_CLR(reg_dmic_step,FLD_DMIC_SEL);
+}
+
+
+/**
+ * 	@brief      This function serves to set the bclk
+ * 	@param[in]  div  - bclk=i2s_clk/(div*2),if div=0,i2s_clk=bclk.
+ * 	@return     none
+ */
+static inline void audio_set_i2s_bclk(unsigned char div)
+{
+	reg_pcm_clk_num=div&0x0f;
+}
+
+/**
+ * 	@brief      This function serves to set the lrclk divider.
+ * 	@param[in]  adc_div - adc_lrclk=bclk/(adc_div)
+ * 	@param[in]  dac_div - dac_lrclk=bclk/(dac_div)
+ * 	@return     none
+ */
+static inline void audio_set_lrclk(unsigned short adc_div,unsigned short dac_div)
+{
+	reg_int_pcm_num=(adc_div-1);
+	reg_dec_pcm_num=(dac_div-1);
+}
+
+
+
+/**
+ * 	@brief      This function serves to set  tx buff length,
+ * 	@param[in]  len - the length of tx buff
+ * 	@return     none
+ */
+static inline void audio_set_tx_buff_len(unsigned short len)
+{
+	reg_tx_max=((len)>>2)-1;
+}
+
+/**
+ * 	@brief      This function serves to set rx buff length,
+ * 	@param[in]  len - the length of rx buff
+ * 	@return     none
+ */
+static inline void audio_set_rx_buff_len(unsigned short len)
+{
+   reg_rx_max=((len)>>2)-1;
+}
+
+
+/**
+ * 	@brief      This function serves to write codec register by mc.
+ * 	@param[in]  addr - the address of codec register
+ * 	@param[in]  data - Data to be written
+ * 	@return     none
+ */
+static inline void audio_write_codec_reg(unsigned char addr,unsigned char  data)
+{
+
+	reg_audio_codec_reg(addr)=data;
+
+}
+
+/**
+ * 	@brief      This function serves to read codec register by mc.
+ * 	@param[in]  addr - the address of codec register
+ * 	@return     data
+ */
+static inline unsigned char audio_read_codec_reg(unsigned char addr)
+{
+	return reg_audio_codec_reg(addr);
+
+}
+
+/**
+ * 	@brief      This function serves to tx fifo trigger number.
+ * 	@param[in]  number - the number of dma trigger
+ * 	@return     none
+ */
+static inline void audio_set_fifo_tx_trig_num(unsigned char number)
+{
+	reg_fifo_trig0 &=~FLD_AUDIO_FIFO_AOUT0_TRIG_NUM;
+	reg_fifo_trig0 |=(number&FLD_AUDIO_FIFO_AOUT0_TRIG_NUM);
+}
+
+/**
+ * 	@brief      This function serves to rx fifo trigger number.
+ * 	@param[in]  number - the number of dma trigger
+ * 	@return     none
+ */
+static inline void  audio_set_fifo_rx_trig_num(unsigned char number)
+{
+	 reg_fifo_trig0 &= ~FLD_AUDIO_FIFO_AIN0_TRIG_NUM;
+	 reg_fifo_trig0 |=((number&0x0f)<<4);
+}
+
+/**
+ * 	@brief      This function serves to enable or disable i2s clk and codec mc clk .
+ * 	@param[in]  i2s_clk_en - 1 enable  : 0 disable
+ * 	@param[in]  mc_clk_en  - 1 enable  : 0 disable
+ * 	@return     none
+ */
+static inline void  audio_clk_en(unsigned char i2s_clk_en,unsigned char mc_clk_en)
+{
+	reg_audio_en=MASK_VAL( FLD_AUDIO_I2S_CLK_EN, i2s_clk_en,\
+			      FLD_AUDIO_MC_CLK_EN, mc_clk_en);
+}
+
+
+/**
+ * 	@brief      This function serves to get dma rx buff pointer.
+ * 	@param[in]  chn - dma channel
+ * 	@return     none
+ */
+static inline unsigned int audio_get_rx_dma_wptr (dma_chn_e chn)
+{
+	return   convert_ram_addr_bus2cpu(reg_dma_dst_addr(chn));
+}
+
+/**
+ * 	@brief      This function serves to get dma tx buff pointer.
+ * 	@param[in]  chn - dma channel
+ * 	@return     none
+ */
+static inline unsigned int audio_get_tx_dma_rptr (dma_chn_e chn)
+{
+	return convert_ram_addr_bus2cpu(reg_dma_src_addr(chn));
+}
+
+
+/**
+ * @brief      This function serves to invert data between R channel and L channel.
+ * @return     none
+ */
+static inline void audio_invert_data_en(void)
+{
+	BM_SET(reg_i2s_cfg,FLD_AUDIO_I2S_LRSWAP);
+}
+
+/**
+ * @brief     This function serves to set fifo0 data path .
+ * @param[in] ain0_sel :fifo0 input source select
+ * @param[in] aout0_sel:fifo0 output source select
+ * @return    none
+ */
+static inline void audio_data_fifo0_path_sel (audio_mux_ain_e ain0_sel, audio_mux_aout_e aout0_sel)
+{
+	reg_audio_sel = MASK_VAL( FLD_AUDIO_AIN0_SEL, ain0_sel,FLD_AUDIO_AOUT0_SEL, aout0_sel);
+}
+
+
+/**
+ * @brief  This function serves to set fifo1 data path .
+ * @param[in] ain1_sel :fifo1 input source select
+ * @param[in] aout1_sel:fifo1 output source select
+ * @return    none
+ */
+static inline void audio_data_fifo1_path_sel ( audio_mux_ain_e ain1_sel, audio_mux_aout_e aout1_sel)
+{
+	reg_audio_sel = MASK_VAL( FLD_AUDIO_AIN1_SEL, ain1_sel, FLD_AUDIO_AOUT1_SEL, aout1_sel);
+}
+
+
+/**
+ *  @brief      This function serves to write codec indirect register .
+ *  @param[in]  reg -  the address of codec  direct register  corresponding indirect access
+ *  @param[in]  addr - the indirect access register address
+ *  @param[in]  data - the data of indirect access register
+ *  @return     none
+ */
+static inline void audio_write_codec_ind_reg(unsigned char reg ,unsigned char addr,unsigned char data )
+{
+	reg_audio_codec_reg(reg) = addr&0x3f;
+	reg_audio_codec_reg(reg+1) = data;
+	reg_audio_codec_reg(reg) = (addr&0x3f)|0x40;
+}
+
+
+/**
+ *  @brief      This function serves to read codec indirect register.
+ *  @param[in]  reg -  the address of codec  direct register  corresponding indirect access
+ *  @param[in]  addr - the indirect access register address
+ *  @return     data - the data of indirect access register
+ */
+static inline unsigned char audio_read_codec_ind_reg(unsigned char reg ,unsigned char addr )
+{
+	reg_audio_codec_reg(reg) = (addr&0x3f);
+	return  reg_audio_codec_reg(reg+1);
+}
+
+
+/**
+ * @brief      This function serves to invert data between R channel and L channel.
+ * @return     none
+ */
+static inline void audio_invert_data_dis(void)
+{
+	BM_CLR(reg_i2s_cfg,FLD_AUDIO_I2S_LRSWAP);
+}
+
+/**
+ * @brief      This function reset AUDIO module.
+ * @return     none
+ */
+static inline void audio_reset(void)
+{
+	reg_rst2&=(~FLD_RST2_AUD);
+	reg_rst2 |=FLD_RST2_AUD;
+}
+
+/**
+ * @brief      This function reset CODEC module.
+ * @return     none
+ */
+static inline void codec_reset(void)
+{
+	reg_rst3&=(~FLD_RST3_CODEC);
+	reg_rst3 |=FLD_RST3_CODEC;
+}
+
+/**
+ * @brief  This function serves to set wind noise filter(WNF),it is a programmable high pass filter feature enabling to reduce wind noise.
+ * @param[in] mode - the wind noise filter mode,the wind noise filter is a 1st order filter.
+ *                                             CODEC_ADC_WNF_INACTIVE  disable
+ *
+ *                                             CODEC_ADC_WNF_MODE1  -3dB   59Hz
+ *  Wind Noise Filter corner frequency         CODEC_ADC_WNF_MODE2  -3dB   117Hz
+ *			                                   CODEC_ADC_WNF_MODE3  -3dB   235Hz
+ * @return    none
+ */
+static inline void audio_set_codec_adc_wnf(adc_wnf_mode_sel_e mode)
+{
+	reg_audio_codec_adc_wnf_ctr = mode;
+}
+
+/**
+ * @brief      This function serves to mute adc.
+ * @return     none
+ */
+static inline void audio_set_codec_adc_mute(void)
+{
+	BM_SET(reg_audio_codec_adc12_ctr,FLD_AUDIO_CODEC_ADC12_SOFT_MUTE); //adc mute
+	while(reg_audio_codec_stat2_ctr&FLD_AUDIO_CODEC_ADC12_SMUTE_IN_PROG);//wait codec adc mute is completed
+}
+
+/**
+ * @brief      This function serves to unmute adc.
+ * @return     none
+ */
+static inline void audio_set_codec_adc_unmute(void)
+{
+	 BM_CLR(reg_audio_codec_adc12_ctr,FLD_AUDIO_CODEC_ADC12_SOFT_MUTE);//adc unmute
+	 while(reg_audio_codec_stat2_ctr&FLD_AUDIO_CODEC_ADC12_SMUTE_IN_PROG);//wait codec adc unmute is completed
+}
+
+/**
+ * @brief      This function serves to mute dac.
+ * @return     none
+ */
+static inline void audio_set_codec_dac_mute(void)
+{
+	BM_SET(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SOFT_MUTE); //dac mute
+	while(reg_audio_codec_stat2_ctr&FLD_AUDIO_CODEC_DAC_SMUTE_IN_PROG);//wait codec dac mute is completed
+}
+
+/**
+ * @brief      This function serves to unmute dac.
+ * @return     none
+ */
+static inline void audio_set_codec_dac_unmute(void)
+{
+	BM_CLR(reg_audio_codec_dac_ctr,FLD_AUDIO_CODEC_DAC_SOFT_MUTE);//dac unmute
+	while(reg_audio_codec_stat2_ctr&FLD_AUDIO_CODEC_DAC_SMUTE_IN_PROG);//wait codec dac unmute is completed
+}
+
+/**
+ * 	@brief      This function serves to set adc analog gain.
+ * 	@param[in]  a_gain - analog  gain value
+ * 	@return     none
+ */
+static inline void audio_set_codec_adc_a_gain (codec_in_path_analog_gain_e a_gain )
+{
+	/*analog 0/4/8/12/16/20 dB boost gain*/
+	 reg_audio_codec_mic_l_R_gain= MASK_VAL( FLD_AUDIO_CODEC_AMIC_L_GAIN, a_gain,\
+	           FLD_AUDIO_CODEC_AMIC_R_GAIN, a_gain);
+}
+
+/**
+ * @brief      This function serves to set adc digital gain.
+ * @param[in]  d_gain - digital gain value
+ * @return     none
+ */
+static inline void audio_set_codec_adc_d_gain(codec_in_path_digital_gain_e d_gain)
+{
+	 /*0db~43db  1db step ,digital programmable gain*/
+	 reg_audio_adc1_gain=MASK_VAL(  FLD_AUDIO_CODEC_ADC_LRGID,1,\
+	       FLD_AUDIO_CODEC_ADC_GID1,d_gain);
+}
+
+/**
+ * @brief      This function serves to set dac analog gain.
+ * @param[in]  d_gain - digital gain value
+ * @return     none
+ */
+static inline void audio_set_codec_dac_a_gain(codec_out_path_analog_gain_e a_gain)
+{
+	 /*disable Headphone gain coupling, set Left channel HP amplifier gain*/
+			reg_audio_codec_hpl_gain=MASK_VAL(FLD_AUDIO_CODEC_HPL_LRGO,0,\
+												FLD_AUDIO_CODEC_HPL_GOL,a_gain);
+			reg_audio_codec_hpr_gain=MASK_VAL(FLD_AUDIO_CODEC_HPR_GOR, a_gain); /* Right channel HP amplifier gain programming*/
+}
+
+
+/**
+ * @brief      This function serves to set dac analog gain.
+ * @param[in]  d_gain - digital gain value
+ * @return     none
+ */
+static inline void audio_set_codec_dac_d_gain(codec_out_path_digital_gain_e d_gain)
+{
+	/*disable DAC digital gain coupling, Left channel DAC digital gain*/
+	reg_audio_codec_dacl_gain=MASK_VAL(FLD_AUDIO_CODEC_DAC_LRGOD,0,\
+											FLD_AUDIO_CODEC_DAC_GODL,d_gain);
+	reg_audio_codec_dacr_gain=MASK_VAL(FLD_AUDIO_CODEC_DAC_GODR,d_gain); /*Right channel DAC digital gain*/
+}
+
+/**
+ * 	@brief      This function serves to set codec supply voltage
+ * 	@param[in]  volt - the voltage of codec supply.A1 2.8V default,A0 1.8V default.
+ * 	@return     none
+ *
+ */
+void audio_set_codec_supply (codec_volt_supply_e volt);
+
+/**
+ * @brief     This function configures dmic pin.
+ * @param[in] pin_gp - the group of dmic pin
+ * @return    none
+ */
+void audio_set_dmic_pin(dmic_pin_group_e pin_gp);
+
+/**
+ * @brief     This function serves to set data path.
+ * @param[in] audio_flow    - audio flow  select
+ * @param[in] ain0_mode     - fifo0 input mode select
+ * @param[in] ain1_mode     - fifo1 input mode select
+ * @param[in] i2s_aout_mode - fifo output source select
+ * @return    none
+ */
+void audio_mux_config(audio_flow_e audio_flow, audio_in_mode_e ain0_mode , audio_in_mode_e ain1_mode,audio_out_mode_e i2s_aout_mode);
+
+
+/**
+ * @brief     This function serves to config codec for dac.
+ * @param[in] mode        - select i2s as master or slave
+ * @param[in] rate		  - audio sampling rate
+ * @param[in] data_select - codec dac word length
+ * @param[in] wreg_mode   - mcu or i2c config codec
+ * @return    none
+ */
+void audio_codec_dac_config(i2s_codec_m_s_mode_e mode,audio_sample_rate_e rate,codec_data_select_e data_select,codec_wreg_mode_e  wreg_mode);
+
+/**
+ * @brief     This function serves to config codec for adc.
+ * @param[in] mode        - select i2s as master or slave
+ * @param[in] in_mode     - line_in/amic/dmic input mode select
+ * @param[in] rate        - audio sampling rate
+ * @param[in] data_select - codec adc word length
+ * @param[in] wreg_mode   - mcu or i2c config codec
+ * @return    none
+ */
+void audio_codec_adc_config(i2s_codec_m_s_mode_e mode,audio_input_mode_e in_mode,audio_sample_rate_e rate,codec_data_select_e data_select,codec_wreg_mode_e  wreg_mode);
+
+
+
+/**
+ * @brief     This function serves to config interface, word length, and m/s .
+ * @param[in] i2s_format - interface protocol
+ * @param[in] wl   		 - audio data word length
+ * @param[in] m_s        - select i2s as master or slave
+ * @param[in] i2s_config_t - the prt of i2s_config_t that configure i2s lr_clk phase and lr_clk swap.
+ *  i2s_config_t->i2s_lr_clk_invert_select-lr_clk phase control(in RJ,LJ or i2s modes),in i2s mode(opposite phasing in  RJ,LJ mode), 0=right channel data when lr_clk high ,1=right channel data when lr_clk low.
+ *                                                                                     in DSP mode(in DSP mode only), DSP mode A/B select,0=DSP mode A ,1=DSP mode B.
+ *            i2s_config_t->i2s_data_invert_select - 0=left channel data left,1=right channel data left.
+ * @attention:If the left and right channels are both active in i2s mode,there will be a phase difference(about 1 sample) between the left and right channels,you can set i2s_lr_clk_invert_select=1 to eliminate the phase difference,
+ * but data output channel will be inverted,you can also set i2s_config_t->i2s_data_invert_select=1 to recovery it.
+ * @return    none
+ */
+void audio_i2s_config(i2s_mode_select_e i2s_format,i2s_data_select_e wl,  i2s_codec_m_s_mode_e m_s , audio_i2s_invert_config_t * i2s_config_t);
+
+/**
+ * @brief     This function serves to set i2s clock and audio sampling rate when i2s as master.
+ * @param[in] audio_rate - audio sampling rate
+ * @param[in] match		 - the match of audio rate.
+ * @param[in] match_en   - initial must 0, then change rate must 1
+ * @return    none
+ * @attention i2s clock  divider from pll,sampling rate calculation is based on pll=192M,so pll must be 192M
+ */
+_attribute_ram_code_sec_noinline_ void  audio_set_i2s_clock (audio_sample_rate_e audio_rate,audio_rate_match_e match, unsigned char match_en);
+
+/**
+ * @brief     This function serves to config  rx_dma channel.
+ * @param[in] chn          - dma channel
+ * @param[in] dst_addr     - the dma address of destination
+ * @param[in] data_len     - the length of dma rx size by byte
+ * @param[in] head_of_list - the head address of dma llp.
+ * @return    none
+ */
+void audio_rx_dma_config(dma_chn_e chn,unsigned short * dst_addr,unsigned int data_len,dma_chain_config_t *head_of_list);
+
+/**
+ * @brief     This function serves to set rx dma chain transfer
+ * @param[in] rx_config - the head of list of llp_pointer.
+ * @param[in] llpointer - the next element of llp_pointer.
+ * @param[in] dst_addr  -the dma address of destination.
+ * @param[in] data_len  -the length of dma size by byte.
+ * @return    none
+ */
+void audio_rx_dma_add_list_element(dma_chain_config_t * rx_config,dma_chain_config_t *llpointer ,unsigned short * dst_addr,unsigned int data_len);
+
+/**
+ * @brief     This function serves to config  tx_dma channel.
+ * @param[in] chn          - dma channel
+ * @param[in] src_addr     - the address of source
+ * @param[in] data_len     - the length of dma rx size by byte
+ * @param[in] head_of_list - the head address of dma llp.
+ * @return    none
+ */
+void audio_tx_dma_config(dma_chn_e chn,unsigned short * src_addr, unsigned int data_len,dma_chain_config_t * head_of_list);
+
+/**
+ * @brief     This function serves to set tx dma chain transfer
+ * @param[in] config_addr - the head of list of llp_pointer.
+ * @param[in] llpointer   - the next element of llp_pointer.
+ * @param[in] src_addr    - the address of source
+ * @param[in] data_len    - the length of dma size by byte.
+ * @return    none
+ */
+void audio_tx_dma_add_list_element(dma_chain_config_t *config_addr,dma_chain_config_t *llpointer ,unsigned short * src_addr,unsigned int data_len);
+
+/**
+ * @brief     This function serves to enable rx_dma channel.
+ * @return    none
+ */
+void audio_rx_dma_en(void);
+
+/**
+ * @brief     This function serves to disable rx_dma channel.
+ * @return    none
+ */
+ void audio_rx_dma_dis(void);
+
+/**
+ * @brief     This function serves to enable tx_dma channel.
+ * @return    none
+ */
+void audio_tx_dma_en(void);
+
+
+/**
+ * @brief     This function serves to disable tx_dma channel.
+ * @return    none
+ */
+void audio_tx_dma_dis(void);
+
+
+/**
+ * @brief     This function serves to  initialize audio by mc
+ * @param[in] flow_mode  - select input out flow mode
+ * @param[in] rate       - audio sampling rate.
+ * @param[in] channel_wl - word length and channel number.
+ * @return    none
+ */
+void audio_init(audio_flow_mode_e flow_mode,audio_sample_rate_e rate,audio_channel_wl_mode_e channel_wl);
+
+
+/**
+ * @brief     This function serves to  initialize audio by i2c
+ * @param[in] flow_mode  - select input out flow mode
+ * @param[in] rate       - audio sampling rate.
+ * @param[in] channel_wl - word length and channel number.
+ * @return    none
+ */
+void audio_init_i2c(audio_flow_mode_e flow_mode,audio_sample_rate_e rate,audio_channel_wl_mode_e channel_wl);
+
+
+/**
+ * @brief This function serves to initialize audio(external codec WM8731) by i2c.
+ * @param[in]  pwm0_pin - the pin of pwm0
+ * @param[in]  sda_pin  - the pin port selected as I2C sda pin port.
+ * @param[in]  scl_pin  - the pin port selected as I2C scl pin port.
+ * @return    none
+ */
+void audio_i2s_init(pwm_pin_e pwm0_pin, i2c_sda_pin_e sda_pin,i2c_scl_pin_e scl_pin);
+
+/**
+ * @brief  This function serves to set audio rx dma chain transfer.
+ * @param[in] chn       -  dma channel
+ * @param[in] in_buff   - the pointer of rx_buff.
+ * @param[in] buff_size - the size of rx_buff.
+ * @return    none
+ */
+void audio_rx_dma_chain_init (dma_chn_e chn,unsigned short * in_buff,unsigned int buff_size );
+
+/**
+ * @brief  This function serves to initialize audio tx dma chain transfer.
+ * @param[in] chn       - dma channel
+ * @param[in] out_buff  - the pointer of tx_buff.
+ * @param[in] buff_size - the size of tx_buff.
+ * @return    none
+ */
+void audio_tx_dma_chain_init (dma_chn_e chn,unsigned short * out_buff,unsigned int buff_size);
+
+/**
+ * @brief      This function serves to invert data between R channel and L channel.
+ * @param[in]  en - I2S_DATA_INVERT_DIS: L channel ( left channel data left);  I2S_DATA_INVERT_EN(right channel data left)
+ * @attention must be set before audio_init().
+ * @return     none
+ */
+void audio_set_mono_chn(audio_data_invert_e en);
+
+/**
+ * @brief      This function serves to invert LR-clk.
+ * @param[in]  en -lr_clk phase control(in RJ,LJ or i2s modes),in i2s mode(opposite phasing in  RJ,LJ mode), 0=right channel data when lr_clk high ,1=right channel data when lr_clk low.
+ *                                                             in DSP mode(in DSP mode only), DSP mode A/B select,0=DSP mode A ,1=DSP mode B
+ * @attention  If the left and right channels are both active,there will be a phase difference(about 1 sample) between the left and right channels,invert lr_clk can eliminate the phase difference,but data output channel will invert.
+ * @attention must be set before audio_init().
+ * @return     none
+ */
+void audio_invert_i2s_lr_clk(audio_i2s_lr_clk_invert_e en);
+
+
+/**
+ * @brief      This function serves to set mic input mode.
+ * @param[in]  input_mode - 0 single-ended input, 1 differential input.
+ * @attention must be set before audio_init().
+ * @return     none
+ */
+void audio_set_codec_mic_input_mode (audio_input_mode_select_e input_mode);
+
+/**
+ * 	@brief      This function serves to set in path digital and analog gain  .
+ * 	@param[in]  d_gain - digital gain value
+ * 	@param[in]  a_gain - analog  gain value
+ * 	@return     none
+ */
+void audio_set_codec_in_path_a_d_gain (codec_in_path_digital_gain_e d_gain,codec_in_path_analog_gain_e a_gain );
+
+/**
+ * 	@brief      This function serves to set out path digital and analog gain  .
+ * 	@param[in]  d_gain - digital gain value
+ * 	@param[in]  a_gain - analog  gain value
+ * 	@return     none
+ */
+ void audio_set_codec_out_path_a_d_gain (codec_out_path_digital_gain_e d_gain,codec_out_path_analog_gain_e a_gain);
+
+ /**
+  * @brief      This function serves to choose which is master to provide clock.
+  * @param[in]  m_s - I2S_S_CODEC_M: i2s as slave ,codec as master; I2S_M_CODEC_S: i2s as  master, codec  as slave.
+  * @attention must be set before audio_init().
+  * @return     none
+  */
+ void audio_set_i2s_codec_m_s (i2s_codec_m_s_mode_e m_s);
+
+
+
+ /**
+  * @brief  This function serves to set dac output channel.
+  * @param[in] chn -DAC_OUTPUT_L_R_CHN - right and left channel both active ; DAC_OUTPUT_L_CHN, only left channel active.
+  * @return    none
+  * @attention must be set before audio_init().
+  */
+ void audio_set_output_chn(audio_output_chn_e chn);
+
+ /**
+  * @brief    This function serves to active soft mute dac and disable dma.
+  * @return    none
+  */
+  void audio_pause_out_path(void);
+
+
+  /**
+   * @brief    This function serves to inactive soft mute dac and enable dma .
+   * @return    none
+   */
+  void audio_resume_out_path(void);
+
+ /**
+  * @brief     This function serves to change sample rate for dac.
+  * @param[in] rate     -  the sample rate of dac
+  * @return    none
+  */
+ _attribute_ram_code_sec_noinline_ void audio_change_sample_rate (audio_sample_rate_e  rate);
+
+
+ /**
+  * @brief     This function serves to power down codec_dac.
+  * @return    none
+  */
+void audio_codec_dac_power_down(void);
+
+ /**
+  * @brief     This function serves to power on codec_dac.
+  * @return    none
+  */
+void audio_codec_dac_power_on(void);
+
+/**
+ * @brief     This function serves to power down codec_adc.
+ * @return    none
+ */
+void audio_codec_adc_power_down(void);
+
+/**
+ * @brief     This function serves to power on codec_adc.
+ * @return    none
+ */
+void audio_codec_adc_power_on(void);
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/clock.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/clock.h
new file mode 100644
index 00000000..101818d2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/clock.h
@@ -0,0 +1,244 @@
+/********************************************************************************************************
+ * @file	clock.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page CLOCK
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 clock setting.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: clock.h
+ */
+
+#ifndef CLOCK_H_
+#define CLOCK_H_
+
+#include <reg_include/register.h>
+#include "compiler.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+#define  	CCLK_16M_HCLK_16M_PCLK_16M		clock_init(PLL_CLK_192M, PAD_PLL_DIV, PLL_DIV12_TO_CCLK, CCLK_DIV1_TO_HCLK, HCLK_DIV1_TO_PCLK, PLL_DIV4_TO_MSPI_CLK)
+#define		CCLK_24M_HCLK_24M_PCLK_24M		clock_init(PLL_CLK_192M, PAD_PLL_DIV, PLL_DIV8_TO_CCLK, CCLK_DIV1_TO_HCLK, HCLK_DIV1_TO_PCLK, PLL_DIV4_TO_MSPI_CLK)
+#define		CCLK_32M_HCLK_32M_PCLK_16M		clock_init(PLL_CLK_192M, PAD_PLL_DIV, PLL_DIV6_TO_CCLK, CCLK_DIV1_TO_HCLK, HCLK_DIV2_TO_PCLK, PLL_DIV4_TO_MSPI_CLK)
+#define		CCLK_48M_HCLK_48M_PCLK_24M		clock_init(PLL_CLK_192M, PAD_PLL_DIV, PLL_DIV4_TO_CCLK, CCLK_DIV1_TO_HCLK, HCLK_DIV2_TO_PCLK, PLL_DIV4_TO_MSPI_CLK)
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+
+/**
+ *  @brief  Define sys_clk struct.
+ */
+typedef struct {
+	unsigned short pll_clk;		/**< pll clk */
+	unsigned char cclk;			/**< cpu clk */
+	unsigned char hclk;			/**< hclk */
+	unsigned char pclk;			/**< pclk */
+	unsigned char mspi_clk;		/**< mspi_clk */
+}sys_clk_t;
+
+
+/**
+ * @brief system clock type
+ * |           |              |               |
+ * | :-------- | :----------- | :------------ |
+ * |   <1:0>   |     <6:2>    |    <15:8>     |
+ * |ana_09<3:2>|analog_80<4:0>|      clk      |
+ */
+typedef enum{
+	PLL_CLK_48M 	= (0 | (16 << 2) | (48 << 8)),
+	PLL_CLK_54M 	= (0 | (17 << 2) | (54 << 8)),
+	PLL_CLK_60M 	= (0 | (18 << 2) | (60 << 8)),
+	PLL_CLK_66M 	= (0 | (19 << 2) | (66 << 8)),
+	PLL_CLK_96M 	= (1 | (16 << 2) | (96 << 8)),
+	PLL_CLK_108M 	= (1 | (17 << 2) | (108 << 8)),
+	PLL_CLK_120M 	= (1 | (18 << 2) | (120 << 8)),
+	PLL_CLK_132M 	= (1 | (19 << 2) | (132 << 8)),
+	PLL_CLK_192M 	= (2 | (16 << 2) | (192 << 8)),
+	PLL_CLK_216M 	= (2 | (17 << 2) | (216 << 8)),
+	PLL_CLK_240M 	= (2 | (18 << 2) | (240 << 8)),
+	PLL_CLK_264M 	= (2 | (19 << 2) | (264 << 8)),
+}sys_pll_clk_e;
+
+/**
+ * @brief system clock type.
+ */
+typedef enum{
+	RC24M,
+	PAD24M,
+	PAD_PLL_DIV,
+	PAD_PLL,
+}sys_clock_src_e;
+
+/**
+ * @brief 32K clock type.
+ */
+typedef enum{
+	CLK_32K_RC   =0,
+	CLK_32K_XTAL =1,
+}clk_32k_type_e;
+
+/**
+ * @brief pll div to cclk.
+ */
+typedef enum{
+	PLL_DIV2_TO_CCLK    =    2,
+	PLL_DIV3_TO_CCLK    =    3,
+	PLL_DIV4_TO_CCLK    =    4,
+	PLL_DIV5_TO_CCLK    =    5,
+	PLL_DIV6_TO_CCLK    =    6,
+	PLL_DIV7_TO_CCLK    =    7,
+	PLL_DIV8_TO_CCLK    =    8,
+	PLL_DIV9_TO_CCLK    =    9,
+	PLL_DIV10_TO_CCLK   =    10,
+	PLL_DIV11_TO_CCLK   =    11,
+	PLL_DIV12_TO_CCLK   =    12,
+	PLL_DIV13_TO_CCLK   =    13,
+	PLL_DIV14_TO_CCLK   =    14,
+	PLL_DIV15_TO_CCLK   =    15,
+}sys_pll_div_to_cclk_e;
+
+/**
+ * @brief cclk/pll_div to mspi clk.
+ */
+typedef enum{
+	CCLK_TO_MSPI_CLK       	=    1,
+	PLL_DIV2_TO_MSPI_CLK    =    2,
+	PLL_DIV3_TO_MSPI_CLK    =    3,
+	PLL_DIV4_TO_MSPI_CLK    =    4,
+	PLL_DIV5_TO_MSPI_CLK    =    5,
+	PLL_DIV6_TO_MSPI_CLK    =    6,
+	PLL_DIV7_TO_MSPI_CLK    =    7,
+	PLL_DIV8_TO_MSPI_CLK    =    8,
+	PLL_DIV9_TO_MSPI_CLK    =    9,
+	PLL_DIV10_TO_MSPI_CLK   =    10,
+	PLL_DIV11_TO_MSPI_CLK   =    11,
+	PLL_DIV12_TO_MSPI_CLK   =    12,
+	PLL_DIV13_TO_MSPI_CLK   =    13,
+	PLL_DIV14_TO_MSPI_CLK   =    14,
+	PLL_DIV15_TO_MSPI_CLK   =    15,
+}sys_pll_div_to_mspi_clk_e;
+
+/**
+ * @brief hclk div to pclk.
+ */
+typedef enum{
+	HCLK_DIV1_TO_PCLK    =    1,
+	HCLK_DIV2_TO_PCLK    =    2,
+	HCLK_DIV4_TO_PCLK    =    4,
+}sys_hclk_div_to_pclk_e;
+
+/**
+ * @brief cclk div to hclk.
+ */
+typedef enum{
+	CCLK_DIV1_TO_HCLK    =    1,
+	CCLK_DIV2_TO_HCLK    =    2,  /*< can not use in A0. if use reboot when hclk = 1/2cclk will cause problem */
+}sys_cclk_div_to_hclk_e;
+
+/**
+ *  @brief  Define rc_24M_cal enable/disable.
+ */
+typedef enum {
+	RC_24M_CAL_DISABLE=0,
+	RC_24M_CAL_ENABLE,
+
+}rc_24M_cal_e;
+
+
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+extern sys_clk_t sys_clk;
+extern clk_32k_type_e g_clk_32k_src;
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+
+/**
+ * @brief       This function use to select the system clock source.
+ * @param[in]   pll - pll clock.
+ * @param[in]	src - cclk source.
+ * @param[in]	cclk_div - the cclk divide from pll.it is useless if src is not PAD_PLL_DIV. cclk max is 96M
+ * @param[in]	hclk_div - the hclk divide from cclk.hclk max is 48M.
+ * @param[in]	pclk_div - the pclk divide from hclk.pclk max is 24M.
+ * @param[in]	mspi_clk_div - mspi_clk has two source. pll div and hclk.mspi max is 64M.
+ * @return      none
+ */
+_attribute_ram_code_sec_noinline_ void clock_init(sys_pll_clk_e pll,
+		sys_clock_src_e src,
+		sys_pll_div_to_cclk_e cclk_div,
+		sys_cclk_div_to_hclk_e hclk_div,
+		sys_hclk_div_to_pclk_e pclk_div,
+		sys_pll_div_to_mspi_clk_e mspi_clk_div);
+
+/**
+ * @brief   	This function serves to set 32k clock source.
+ * @param[in]   src - variable of 32k type.
+ * @return  	none.
+ */
+void clock_32k_init(clk_32k_type_e src);
+
+/**
+ * @brief   	This function serves to kick 32k xtal.
+ * @param[in]   xtal_times - kick times.
+ * @return  	1 success, 0 error.
+ */
+unsigned char clock_kick_32k_xtal(unsigned char xtal_times);
+
+/**
+ * @brief     	This function performs to select 24M as the system clock source.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void clock_cal_24m_rc (void);
+
+/**
+ * @brief     This function performs to select 32K as the system clock source.
+ * @return    none.
+ */
+void clock_cal_32k_rc (void);
+
+/**
+ * @brief  This function serves to get the 32k tick.
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_  unsigned int clock_get_32k_tick (void);
+
+/**
+ * @brief  This function serves to set the 32k tick.
+ * @param  tick - the value of to be set to 32k.
+ * @return none.
+ */
+_attribute_ram_code_sec_noinline_ void clock_set_32k_tick(unsigned int tick);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/core.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/core.h
new file mode 100644
index 00000000..981fff8b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/core.h
@@ -0,0 +1,256 @@
+/********************************************************************************************************
+ * @file	core.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef CORE_H
+#define CORE_H
+#include "lib/include/sys.h"
+#include "nds_intrinsic.h"
+	/* Machine mode MHSP_CTL */
+typedef enum{
+
+	MHSP_CTL_OVF_EN     = BIT(0),//Enable bit for the stack overflow protection and recording mechanism.
+	MHSP_CTL_UDF_EN     = BIT(1),//Enable bit for the stack underflow protection mechanism
+	MHSP_CTL_SCHM_SEL   = BIT(2),//0-Stack overflow/underflow,1-Top-of-stack recording
+	MHSP_CTL_U_EN       = BIT(3),//Enables the SP protection and recording mechanism in User mode
+	MHSP_CTL_S_EN       = BIT(4),//Enables the SP protection and recording mechanism in Supervisor  mode
+	MHSP_CTL_M_EN       = BIT(5),//Enables the SP protection and recording mechanism in Machine mode
+} mhsp_ctl_e;
+
+typedef enum
+{
+	FLD_MSTATUS_MIE = BIT(3),//M-mode interrupt enable bit
+}mstatus_e;
+
+typedef enum
+{
+	FLD_MIE_MSIE     = BIT(3),//M-mode software interrupt enable bit.
+	FLD_MIE_MTIE     = BIT(7),//M-mode timer interrupt enable bit
+	FLD_MIE_MEIE     = BIT(11),//M-mode external interrupt enable bit
+}mie_e;
+
+
+
+#define  read_csr(reg)		         __nds__csrr(reg)
+#define  write_csr(reg, val)	      __nds__csrw(val, reg)
+#define  swap_csr(reg, val)	          __nds__csrrw(val, reg)
+#define set_csr(reg, bit)	         __nds__csrrs(bit, reg)
+#define clear_csr(reg, bit)	         __nds__csrrc(bit, reg)
+
+/*
+ * Inline nested interrupt entry/exit macros
+ */
+/* Svae/Restore macro */
+#define save_csr(r)             long __##r = read_csr(r);
+#define restore_csr(r)           write_csr(r, __##r);
+/* Support PowerBrake (Performance Throttling) feature */
+
+
+#define save_mxstatus()         save_csr(NDS_MXSTATUS)
+#define restore_mxstatus()      restore_csr(NDS_MXSTATUS)
+
+ /* Nested IRQ entry macro : Save CSRs and enable global interrupt. */
+#define core_save_nested_context()                              \
+	 save_csr(NDS_MEPC)                              \
+	 save_csr(NDS_MSTATUS)                           \
+	 save_mxstatus()                                 \
+	 set_csr(NDS_MSTATUS, FLD_MSTATUS_MIE);
+
+/* Nested IRQ exit macro : Restore CSRs */
+#define core_restore_nested_context()                               \
+	 clear_csr(NDS_MSTATUS, FLD_MSTATUS_MIE);            \
+	 restore_csr(NDS_MSTATUS)                        \
+	 restore_csr(NDS_MEPC)                           \
+	 restore_mxstatus()
+
+#define fence_iorw	      	__nds__fence(FENCE_IORW,FENCE_IORW)
+
+typedef enum{
+	FLD_FEATURE_PREEMPT_PRIORITY_INT_EN = BIT(0),
+	FLD_FEATURE_VECTOR_MODE_EN 			= BIT(1),
+}
+feature_e;
+
+
+/**
+ * @brief Disable interrupts globally in the system.
+ * @return  r - the MIE bit value of machine status register(MSTATUS).
+ * @note  this function must be used when the system wants to disable all the interrupt.
+ * @return     none
+ */
+static inline unsigned int core_interrupt_disable(void){
+	unsigned int r = read_csr (NDS_MSTATUS)&FLD_MSTATUS_MIE;
+	if(r)
+	{
+		clear_csr(NDS_MSTATUS,FLD_MSTATUS_MIE);//global interrupts disable
+	}
+	return r;
+}
+
+/**
+ * @brief restore interrupts globally in the system.
+ * @param[in]  en - the MIE bit value of machine status register(MSTATUS).
+ * this  parameter must be the return value of the core_interrupt_disable function.
+ * @return     0
+ * @note this function must be used when the system wants to restore all the interrupt.
+ */
+static inline unsigned int core_restore_interrupt(unsigned int en){
+	if(en)
+	{
+		set_csr(NDS_MSTATUS,en);//global interrupts enable
+	}
+	return 0;
+}
+
+/**
+ * @brief enable interrupts globally in the system.
+ * @return  none
+ */
+static inline void core_interrupt_enable(void)
+{
+	set_csr(NDS_MSTATUS,FLD_MSTATUS_MIE);//global interrupts enable
+	set_csr(NDS_MIE,FLD_MIE_MSIE |FLD_MIE_MTIE|FLD_MIE_MEIE);//machine Interrupt enable selectively
+}
+
+/**
+ * @brief This function serves to set mhsp control registers.
+ * @param[in]  ctl - the value of mhsp_ctl, refer to mhsp_ctl_e for the definition of MHSP_CTL
+ * @return     none
+ */
+static inline void core_set_mhsp_ctr(mhsp_ctl_e ctl)
+{
+	write_csr(NDS_MHSP_CTL,(unsigned int)ctl);
+}
+
+/**
+ * @brief This function serves to set hsp bound registers.
+ *  ---Stack overflow---
+ When the SP overflow detection mechanism is properly selected and enabled, any updated value to
+ the SP register (via any instruction) is compared with the msp_bound register If the updated value
+ to the SP register is smaller than the msp_bound register, a stack overflow exception is generated
+ a stack overflow exception is generated.
+ The stack overflow exception has an exception code of 32 in the mcause register
+ ---Top-of-stack recording---
+ When the top of stack recording mechanism is properly selected and enabled, any updated value to
+ the SP register on any instruction is compared with the msp_bound register. If the updated value
+ to the SP register is smaller than the msp_bound register, the msp_bound register is updated with this updated value
+ * @param[in]  bound - the value of  hsp_bound .
+ * @return     none
+ */
+static inline void core_set_msp_bound(unsigned int bound)
+{
+	write_csr(NDS_MSP_BOUND, bound);
+}
+
+/**
+ * @brief This function serves to set hsp base registers.
+ When the SP underflow detection mechanism is properly selected and enabled, any updated value to
+ the SP register (via any instruction) is compared with the msp_base register. If the updated value to
+ the SP register is greater than the msp_base register, a stack underflow exception is generated. The
+ stack underflow exception has an exception code of 33 in the mcause register.
+ * @param[in]  base - the value of hsp_base .
+ * @return     none
+ */
+static inline void core_set_msp_base(unsigned int base)
+{
+	write_csr(NDS_MSP_BASE, base);
+}
+
+/**
+ * @brief This function serves to get hsp bound registers.
+ * ---Top-of-stack recording---
+ When the top of stack recording mechanism is properly selected and enabled, any updated value to
+ the SP register on any instruction is compared with the msp_bound register. If the updated value
+ to the SP register is smaller than the msp_bound register, the msp_bound register is updated with this updated value,you can read this value.
+ * @return     none
+ */
+static inline unsigned int core_get_msp_bound(void)
+{
+	return read_csr(NDS_MSP_BOUND);
+}
+
+/**
+ * @brief This function serves to get hsp base registers.there is no recording.
+ * @return     none
+ */
+static inline unsigned int core_get_msp_base(void)
+{
+	return read_csr(NDS_MSP_BASE);
+}
+
+/**
+ * @brief This function serves to get current sp(Stack pointer).
+ * @return     none
+ */
+static inline unsigned int core_get_current_sp(void)
+{
+	return __nds__get_current_sp();
+}
+
+/**
+ * @brief This function serves to get mcause(Machine Cause) value.
+ * This register indicates the cause of trap, reset, NMI or the interrupt source ID of a vector interrupt.
+   This register is updated when a trap, reset, NMI or vector interrupt occurs
+ * @return     none
+ */
+static inline unsigned int core_get_mcause(void)
+{
+	return read_csr(NDS_MCAUSE);
+}
+
+/**
+ * @brief This function serves to get mepc(Machine Exception Program Counter) value.
+ * When entering an exception, the hardware will automatically update the value of the mepc register
+ * to the value of the instruction pc currently encountered with the exception
+ * @return     none
+ */
+static inline unsigned int core_get_mepc(void)
+{
+	return read_csr(NDS_MEPC);
+}
+/**
+ * @brief 	 This function serves to mcu entry wfi(Wait-For-Interrupt) mode similar to stall mcu.
+ * @return	 none
+ * @Note:	 there are two awoke modes by interrupt:
+ *           1).When the processor is awoken by a pending interrupt and global interrupts enable(mstatus.MIE is enabled),it will resume and start to execute from the corresponding interrupt service routine.
+ *           2).When the core is awoken by a pending interrupt and global interrupts enable (mstatus.MIE is disabled),it will resume and start to execute from the instruction after the WFI instruction.
+ */
+static inline void  core_entry_wfi_mode(void)
+{
+ /* Interrupts disabled by the mie CSR will not be able to wake up the processor.
+   However,the processor can be awoken by these interrupts regardless the value of the global interrupt enable bit (mstatus.MIE)*/
+   __asm__ __volatile__("wfi");
+
+}
+
+/**
+ * @brief     This function serves to get current pc.
+ * @return    current pc
+ */
+static inline  unsigned int core_get_current_pc(void)
+{
+	unsigned int current_pc=0;
+	__asm__ ("auipc %0, 0":"=r"(current_pc)::"a0");
+	return current_pc;
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/dma.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/dma.h
new file mode 100644
index 00000000..ca847c90
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/dma.h
@@ -0,0 +1,343 @@
+/********************************************************************************************************
+ * @file	dma.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page DMA
+ *
+ *	Introduction
+ *	===============
+ *
+ *
+ *	API Reference
+ *	===============
+ *	Header File: dma.h
+ */
+#ifndef DMA_H_
+#define DMA_H_
+#include <reg_include/register.h>
+ typedef enum{
+	DMA0=0,
+	DMA1,
+	DMA2,
+	DMA3,
+	DMA4,
+	DMA5,
+	DMA6,
+	DMA7,
+}dma_chn_e;
+
+typedef enum{
+	DMA_CHN0_IRQ		= BIT(0),
+	DMA_CHN1_IRQ		= BIT(1),
+	DMA_CHN2_IRQ		= BIT(2),
+	DMA_CHN3_IRQ		= BIT(3),
+	DMA_CHN4_IRQ		= BIT(4),
+	DMA_CHN5_IRQ		= BIT(5),
+	DMA_CHN6_IRQ		= BIT(6),
+	DMA_CHN7_IRQ		= BIT(7),
+}dma_irq_chn_e;
+
+typedef enum{
+	DMA_REQ_SPI_AHB_TX=0,
+	DMA_REQ_SPI_AHB_RX,
+	DMA_REQ_UART0_TX,
+	DMA_REQ_UART0_RX,
+	DMA_REQ_SPI_APB_TX,
+	DMA_REQ_SPI_APB_RX,
+	DMA_REQ_I2C_TX,
+	DMA_REQ_I2C_RX,
+	DMA_REQ_ZB_TX,
+	DMA_REQ_ZB_RX,
+	DMA_REQ_PWM_TX,
+	DMA_REQ_RESERVED,
+	DMA_REQ_ALGM_TX,
+	DMA_REQ_ALGM_RX,
+	DMA_REQ_UART1_TX,
+	DMA_REQ_UART1_RX,
+	DMA_REQ_AUDIO0_TX,
+	DMA_REQ_AUDIO0_RX,
+	DMA_REQ_AUDIO1_TX,
+	DMA_REQ_AUDIO1_RX,
+
+}dma_req_sel_e;
+
+typedef enum{
+	DMA_ADDR_INCREMENT=0,
+	DMA_ADDR_DECREMENT,
+	DMA_ADDR_FIX,
+}
+dma_addr_ctrl_e;
+
+
+typedef enum{
+	DMA_NORMAL_MODE=0,
+	DMA_HANDSHAKE_MODE,
+}
+dma_mode_e;
+
+typedef enum{
+	DMA_CTR_BYTE_WIDTH=0,
+	DMA_CTR_HWORD_WIDTH,
+	DMA_CTR_WORD_WIDTH,
+}
+dma_ctr_width_e;
+
+typedef enum{
+	DMA_BYTE_WIDTH=1,
+	DMA_HWORD_WIDTH=2,
+	DMA_WORD_WIDTH=4,
+}
+dma_transfer_width_e;
+
+typedef enum{
+	TC_MASK   =   	BIT(1),
+	ERR_MASK  =		BIT(2),
+	ABT_MASK  =		BIT(3),
+}dma_irq_mask_e;
+
+typedef struct {
+	unsigned int dst_req_sel:5;  /*DstReqSel   :8:4   */
+	unsigned int src_req_sel:5;  /*SrcReqSel   :13:9 */
+	unsigned int dst_addr_ctrl:2;/*DstAddrCtrl :15:14  0:increment address 1: decrement address 2: fixed address */
+	unsigned int src_addr_ctrl:2;/*SrcAddrCtrl :17:16  0:increment address 1: decrement address 2: fixed address */
+	unsigned int dstmode:1;      /*DstMode:18   0 normal mode  1 handshake*/
+	unsigned int srcmode:1;     /*SrcMode :19   0 normal mode  1 handshake*/
+	unsigned int dstwidth:2;  /*DstWidth :21:20 00:byte 01:hword 02:word*/
+	unsigned int srcwidth:2;  /*SrcWidth :23:22  00:byte 01:hword 02:word*/
+	unsigned int src_burst_size:3;  /*SrcBurstSize: 26:24*/
+	unsigned int vacant_bit  :1;/*vacant:27*/
+	unsigned int read_num_en:1;/*Rnum_en :28*/
+	unsigned int priority:1; /*Pri :29*/
+	unsigned int write_num_en:1;/*wnum_en : 30*/
+	unsigned int auto_en:1;/*/*auto_en : 31*/
+}dma_config_t;
+
+/*
+ * If volatile is not added, the compiler optimization will affect the configuration of the chain, which will lead to the abnormal work of pwm/audio(when using the chain function).
+ */
+typedef struct {
+	volatile unsigned int dma_chain_ctl;
+	volatile unsigned int dma_chain_src_addr;
+	volatile unsigned int dma_chain_dst_addr;
+	volatile unsigned int dma_chain_data_len;
+	volatile unsigned int dma_chain_llp_ptr;
+}dma_chain_config_t ;
+
+
+/**
+ * @brief     This function configures DMA control register.
+ * @param[in] chn    - dma channel
+ * @param[in] config - the prt of dma_config that configured control register
+ * @return    none
+ * @note      When a certain dma channel has not finished the transmission (bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed),need to disable dma before writing to the dma register.
+ */
+static inline void dma_config(dma_chn_e chn ,dma_config_t *config)
+{
+	reg_dma_ctrl(chn) = (reg_dma_ctrl(chn)&(~BIT_RNG(4,31)))|((*(unsigned int*)config)<<4);
+}
+
+
+/**
+ * @brief      This function servers to enable dma that selected channel.
+ * @param[in] chn - dma channel.
+ * @return    none
+ */
+static inline void dma_chn_en(dma_chn_e chn)
+{
+	BM_SET(reg_dma_ctr0(chn),BIT(0));
+}
+
+/**
+ * @brief      This function servers to disable dma that selected channel.
+ * @param[in] chn - dma channel.
+ * @return    none
+ */
+static inline void dma_chn_dis(dma_chn_e chn)
+{
+	BM_CLR(reg_dma_ctr0(chn),BIT(0));
+}
+
+/**
+ * @brief      This function servers to set dma irq mask.
+ * @param[in] chn  - dma channel.
+ * @param[in] mask - dma irq mask.
+ * @return    none
+ */
+static inline void dma_set_irq_mask(dma_chn_e chn,dma_irq_mask_e mask)
+{
+	reg_dma_ctr0(chn) = (reg_dma_ctr0(chn) | BIT_RNG(1,3)) & (~(mask));
+}
+
+/**
+ * @brief      This function servers to clr dma irq mask.
+ * @param[in] chn  - dma channel.
+ * @param[in] mask - dma irq mask.
+ * @return    none
+ * attention the mask of dma tc/err/abt is enable default.we must disable when don'n use it.
+ */
+static inline void dma_clr_irq_mask(dma_chn_e chn,dma_irq_mask_e mask)
+{
+	reg_dma_ctr0(chn) |= (mask);
+}
+
+/**
+ * @brief     This function servers to get the terminal count irq status channel.
+ * @return   the dma terminal count irq status channel.
+ */
+static inline unsigned char dma_get_tc_irq_status(dma_irq_chn_e tc_chn)
+{
+	return reg_dma_tc_isr&tc_chn;
+}
+
+
+/**
+ * @brief    This function servers to clear the irq of terminal count status.
+ * @param[in] tc_chn -terminal count irq status channel.
+ * @return    none
+ */
+static inline void dma_clr_tc_irq_status(dma_irq_chn_e tc_chn)
+{
+	reg_dma_tc_isr = tc_chn;
+}
+
+
+/**
+ * @brief     This function servers to get the error  irq status channel.
+ * @return   the dma error irq status channel.
+ */
+static inline unsigned char dma_get_err_irq_status(dma_irq_chn_e err_chn)
+{
+	return reg_dma_err_isr&err_chn;
+}
+
+
+/**
+ * @brief    This function servers to clear the abort status of channel.
+ * @param[in] err_chn -error status channel.
+ * @return    none
+ */
+static inline void dma_clr_err_irq_status(dma_irq_chn_e err_chn)
+{
+	reg_dma_err_isr = err_chn;
+}
+
+
+/**
+ * @brief    This function servers to get the abort status of channel.
+ * @return   the dma abort irq status channel.
+ */
+static inline unsigned char dma_get_abt_irq_status(dma_irq_chn_e abt_chn)
+{
+	return reg_dma_abt_isr&abt_chn;
+}
+
+
+/**
+ * @brief    This function servers to clear the abort status of channel.
+ * @param[in] abt_chn -abort irq status channel.
+ * @return    none
+ */
+static inline void dma_clr_abt_irq_status(dma_irq_chn_e abt_chn)
+{
+	reg_dma_abt_isr = abt_chn;
+}
+
+/**
+ * @brief   this  function set  the DMA to tx/rx size byte.
+ * @param[in] chn - DMA channel
+ * @param[in] size_byte  - the address of dma tx/rx size .The maximum transmission length of DMA is 0xFFFFFC bytes  and cannot exceed this length.
+ * @param[in] byte_width -  dma   tx/rx  width
+ * @return    none 
+ * @note      When a certain dma channel has not finished the transmission (bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed),need to disable dma before writing to the dma register.
+ */
+static inline void dma_set_size(dma_chn_e chn,unsigned int size_byte,dma_transfer_width_e byte_width)
+{
+	reg_dma_size(chn) =((size_byte+byte_width-1)/byte_width)|( (size_byte % byte_width)<<22);
+}
+
+
+/**
+ * @brief   this  function calculate the DMA to tx/rx size byte.
+ * @param[in] size_byte  - the address of dma   tx/rx size
+ * @param[in] byte_width -  dma   tx/rx  width
+ * @return    none
+ */
+static inline unsigned int dma_cal_size(unsigned int size_byte,dma_transfer_width_e byte_width)
+{
+	 return (((size_byte+byte_width-1)/byte_width)|( (size_byte % byte_width)<<22));
+}
+
+
+/**
+ * @brief   this function set source and destination address for DMA,
+ *        src_address          dst_address
+ * tx      sram               interface fifo.
+ * rx      interface fifo      sram
+ * @param[in]  chn      - DMA channel
+ * @param[in]  src_addr - the address of source.
+ * @param[in]  dst_addr - the address of destination.
+ * @return     none
+ * @note       When a certain dma channel has not finished the transmission (bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed),need to disable dma before writing to the dma register.
+ */
+static inline void dma_set_address(dma_chn_e chn,unsigned int src_addr,unsigned int dst_addr)
+{
+	reg_dma_src_addr(chn)= (unsigned int)convert_ram_addr_cpu2bus(src_addr);
+	reg_dma_dst_addr(chn)= (unsigned int)convert_ram_addr_cpu2bus(dst_addr);
+}
+
+
+/**
+ * @brief   this function set source address for DMA,
+ * @param[in]  chn - DMA channel
+ * @param[in]  src_addr - the address of source.
+ * @note When a certain dma channel has not finished the transmission (bit 0 of reg_dma_ctr0(chn) is 1),need to disable dma before writing to the dma register
+ */
+static inline void dma_set_src_address(dma_chn_e chn,unsigned int src_addr)
+{
+	reg_dma_src_addr(chn)= (unsigned int)convert_ram_addr_cpu2bus(src_addr);
+}
+
+/**
+ * @brief   this function set destination address for DMA,
+ * @param[in]  chn - DMA channel
+ * @param[in]  dst_addr - the address of destination.
+ * @note       When a certain dma channel has not finished the transmission (bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed),need to disable dma before writing to the dma register.
+ */
+static inline void dma_set_dst_address(dma_chn_e chn,unsigned int dst_addr)
+{
+	reg_dma_dst_addr(chn)= (unsigned int)convert_ram_addr_cpu2bus(dst_addr);
+}
+
+
+/**
+ * @brief   this function set reset DMA,DMA logic and registers will be reset.
+ * @return    none
+ */
+static inline void dma_reset(void)
+{
+	reg_rst1 &= ~(FLD_RST1_DMA);
+	reg_rst1 |= FLD_RST1_DMA;
+}
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/driver.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/driver.h
new file mode 100644
index 00000000..126abf5d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/driver.h
@@ -0,0 +1,64 @@
+/********************************************************************************************************
+ * @file	driver.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "lib/include/axon/axon_api.h"
+#include "lib/include/axon/axon_dep.h"
+#include "lib/include/pke/pke.h"
+#include "lib/include/emi.h"
+#include "lib/include/plic.h"
+#include "lib/include/pm.h"
+#include "lib/include/rf.h"
+#include "lib/include/swire.h"
+#include "lib/include/sys.h"
+#include "lib/include/trng.h"
+
+#include "lib/include/pke/pke_algorithm.h"
+
+#include "audio.h"
+#include "analog.h"
+#include "dma.h"
+#include "gpio.h"
+#include "i2c.h"
+#include "spi.h"
+#include "pwm.h"
+#include "timer.h"
+#include "flash.h"
+#include "usbhw.h"
+#include "watchdog.h"
+#include "s7816.h"
+#include "nds_intrinsic.h"
+#include "mdec.h"
+
+#include "npe.h"
+#include "uart.h"
+#include "stimer.h"
+#include "aes.h"
+
+#include "lpc.h"
+#include "clock.h"
+#include "mspi.h"
+#include "adc.h"
+#include "flash/flash_type.h"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash.h
new file mode 100644
index 00000000..dea58448
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash.h
@@ -0,0 +1,339 @@
+/********************************************************************************************************
+ * @file	flash.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "compiler.h"
+
+
+#define PAGE_SIZE		256
+#define PAGE_SIZE_OTP	256
+
+/**
+ * @brief     flash command definition
+ */
+typedef enum{
+	//The command called by the flash_mspi_read_ram() function.
+	FLASH_READ_CMD						=	0x03,
+	FLASH_DREAD_CMD						=	0x3B,
+	FLASH_X4READ_CMD					=	0xEB,
+	FLASH_READ_SECURITY_REGISTERS_CMD	=	0x48,
+	FLASH_READ_UID_CMD_GD_PUYA_ZB_TH	=	0x4B,	//Flash Type = GD/PUYA/ZB/TH
+	FLASH_GET_JEDEC_ID					=	0x9F,
+	FLASH_READ_STATUS_CMD_LOWBYTE		=	0x05,
+	FLASH_READ_STATUS_CMD_HIGHBYTE		=	0x35,
+	FLASH_READ_CONFIGURE_CMD            =   0x15,
+	//The command called by the flash_mspi_write_ram() function.
+	FLASH_WRITE_CMD						=	0x02,
+	FLASH_QUAD_PAGE_PROGRAM_CMD			=	0x32,	//may different for different flash
+	FLASH_SECT_ERASE_CMD				=	0x20,
+	FLASH_WRITE_SECURITY_REGISTERS_CMD	=	0x42,
+	FLASH_ERASE_SECURITY_REGISTERS_CMD	=	0x44,
+	FLASH_WRITE_STATUS_CMD_LOWBYTE		=	0x01,
+	FLASH_WRITE_STATUS_CMD_HIGHBYTE		=	0x31,    // Flash Type = P25Q16SU/P25Q32SH for write status register-1;
+	FLASH_WRITE_CONFIGURE_CMD_1         =   0x31,    // Flash Type = P25Q80U  for write configure register;
+	FLASH_WRITE_CONFIGURE_CMD_2         =   0x11,    // Flash Type = P25Q16SU/P25Q32SH  for write configure register;
+	//other command
+	FLASH_WRITE_DISABLE_CMD 			= 	0x04,
+	FLASH_WRITE_ENABLE_CMD 				= 	0x06,
+}flash_command_e;
+
+/**
+ * @brief     flash status type definition
+ */
+typedef enum{
+	FLASH_TYPE_8BIT_STATUS   			= 0,
+	FLASH_TYPE_16BIT_STATUS_ONE_CMD  	= 1,
+	FLASH_TYPE_16BIT_STATUS_TWO_CMD  	= 2,
+}flash_status_typedef_e;
+
+/**
+ * @brief     flash vendor and technology definition
+ */
+typedef enum{
+	FLASH_ETOX_ZB  		= 0x0100325E,	// 325E		bit[24]:ETOX: Byte Program Time != Page Programming Time
+	FLASH_ETOX_GD   	= 0x010060C8,	// 60C8/4051
+	FLASH_SONOS_PUYA  	= 0x02006085,	// 6085		bit[25]:SONOS:Byte Program Time == Page Programming Time
+	FLASH_SONOS_TH  	= 0x020060EB,	// 60EB
+	FLASH_SST_TH  		= 0x040060CD,	// 60CD		bit[26]:SST:  Byte Program Time != Page Programming Time
+}flash_vendor_e;
+
+/**
+ * @brief	flash capacity definition
+ *			Call flash_read_mid function to get the size of flash capacity.
+ *			Example is as follows:
+ *			unsigned int mid = flash_read_mid();
+ *			The value of (mid&0x00ff0000)>>16 reflects flash capacity.
+ */
+typedef enum {
+    FLASH_SIZE_64K     = 0x10,
+    FLASH_SIZE_128K    = 0x11,
+    FLASH_SIZE_256K    = 0x12,
+    FLASH_SIZE_512K    = 0x13,
+    FLASH_SIZE_1M      = 0x14,
+    FLASH_SIZE_2M      = 0x15,
+    FLASH_SIZE_4M      = 0x16,
+    FLASH_SIZE_8M      = 0x17,
+}flash_capacity_e;
+
+typedef struct{
+	unsigned char  flash_read_cmd;			/**< xip read command */
+	unsigned char  flash_read_dummy:4;		/**< dummy cycle = flash_read_dummy + 1 */
+	unsigned char  flash_read_data_line:2;	/**< 0:single line;  1: dual line;  2:quad line; 3:quad line */
+	unsigned char  flash_read_addr_line:1;	/**< 0:single line;  1:the same to dat_line_h */
+	unsigned char  flash_read_cmd_line:1; 	/**< 0:single line;  1:the same to dat_line_h */
+}flash_xip_config_t;
+
+typedef void (*flash_hander_t)(unsigned long, unsigned long, unsigned char*);
+extern _attribute_data_retention_sec_ flash_hander_t flash_read_page;
+extern _attribute_data_retention_sec_ flash_hander_t flash_write_page;
+
+/*******************************************************************************************************************
+ *												Primary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief 		This function serve to change the read function and write function.
+ * @param[in]   read	- the read function.
+ * @param[in]   write	- the write function.
+ * @none
+ */
+static inline void flash_change_rw_func(flash_hander_t read, flash_hander_t write)
+{
+	flash_read_page = read;
+	flash_write_page = write;
+}
+
+/**
+ * @brief 		This function serves to erase a sector.
+ * @param[in]   addr	- the start address of the sector needs to erase.
+ * @return 		none.
+ * @note        Attention: The block erase takes a long time, please pay attention to feeding the dog in advance.
+ * 				The maximum block erase time is listed at the beginning of this document and is available for viewing.
+ *
+ * 				Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_erase_sector(unsigned long addr);
+
+/**
+ * @brief 		This function reads the content from a page to the buf with single mode.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        cmd:1x, addr:1x, data:1x, dummy:0
+ * 				Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_read_data(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function reads the content from a page to the buf with dual read mode.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        cmd:1x, addr:1x, data:2x, dummy:8
+ * 				Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_dread(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function reads the content from a page to the buf with 4*IO read mode.
+ * @param[in]   addr	- the start address of the page.
+ * @param[in]   len		- the length(in byte) of content needs to read out from the page.
+ * @param[out]  buf		- the start address of the buffer.
+ * @return 		none.
+ * @note        cmd:1x, addr:4x, data:4x, dummy:6
+ * 				Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_4read(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function writes the buffer's content to the flash with single mode.It is necessary to confirm whether this area
+ * 				has been erased before writing. If not, you need to erase and then write, otherwise the write may be unsuccessful
+ * 				and the data will become the wrong value. Note that when erasing, the minimum is erased by sector (4k bytes).
+ * 				Do not erase the useful information in other locations of the sector during erasing.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        cmd:1x, addr:1x, data:1x
+ * 				the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_page_program(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function writes the buffer's content to the flash with quad page program mode.It is necessary to confirm whether this area
+ * 				has been erased before writing. If not, you need to erase and then write, otherwise the write may be unsuccessful
+ * 				and the data will become the wrong value. Note that when erasing, the minimum is erased by sector (4k bytes).
+ * 				Do not erase the useful information in other locations of the sector during erasing.
+ * @param[in]   addr	- the start address of the area.
+ * @param[in]   len		- the length(in byte) of content needs to write into the flash.
+ * @param[in]   buf		- the start address of the content needs to write into.
+ * @return 		none.
+ * @note        cmd:1x, addr:1x, data:4x
+ * 				the funciton support cross-page writing,which means the len of buf can bigger than 256.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_quad_page_program(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief	  	This function serves to read MID of flash(MAC id). Before reading UID of flash,
+ * 				you must read MID of flash. and then you can look up the related table to select
+ * 				the idcmd and read UID of flash
+ * @return    	MID of the flash.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ unsigned int flash_read_mid(void);
+
+/**
+ * @brief	  	This function serves to read UID of flash.Before reading UID of flash, you must read MID of flash.
+ * 				and then you can look up the related table to select the idcmd and read UID of flash.
+ * @param[in] 	idcmd	- different flash vendor have different read-uid command. E.g: GD/PUYA:0x4B; XTX: 0x5A
+ * @param[in] 	buf		- store UID of flash.
+ * @return    	none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_read_uid(unsigned char idcmd, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to set priority threshold. when the interrupt priority > Threshold flash process will disturb by interrupt.
+ * @param[in]   preempt_en	- 1 can disturb by interrupt, 0 can disturb by interrupt.
+ * @param[in]	threshold	- priority Threshold.
+ * @return    	none.
+ */
+_attribute_text_sec_ void flash_plic_preempt_config(unsigned char preempt_en, unsigned char threshold);
+/**
+ * @brief 		This function is used to update the configuration parameters of xip(eXecute In Place),
+ * 				this configuration will affect the speed of MCU fetching,
+ * 				this parameter needs to be consistent with the corresponding parameters in the flash datasheet.
+ * @param[in]	config	- xip configuration,reference structure flash_xip_config_t
+ * @return none
+ */
+_attribute_text_sec_ void flash_set_xip_config(flash_xip_config_t config);
+/**
+ * @brief		This function serves to set flash write command.This function interface is only used internally by flash,
+ * 				and is currently included in the H file for compatibility with other SDKs. When using this interface,
+ * 				please ensure that you understand the precautions of flash before using it.
+ * @param[in]	cmd	- set command.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void flash_send_cmd(flash_command_e cmd);
+
+/*******************************************************************************************************************
+ *												Secondary interface
+ ******************************************************************************************************************/
+
+/**
+ * @brief		This function serves to read flash mid and uid,and check the correctness of mid and uid.
+ * @param[out]	flash_mid	- Flash Manufacturer ID.
+ * @param[out]	flash_uid	- Flash Unique ID.
+ * @return		0: flash no uid or not a known flash model 	 1:the flash model is known and the uid is read.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ int flash_read_mid_uid_with_check(unsigned int *flash_mid, unsigned char *flash_uid);
+
+/**
+ * @brief		This function serves to get flash vendor.
+ * @param[in]	none.
+ * @return		0 - err, other - flash vendor.
+ */
+unsigned int flash_get_vendor(unsigned int flash_mid);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.c
new file mode 100644
index 00000000..721b2ffa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.c
@@ -0,0 +1,206 @@
+/********************************************************************************************************
+ * @file	flash_mid146085.c
+ *
+ * @brief	This is the source file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid146085(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid146085(unsigned short data, mid146085_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid146085();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid146085(mid146085_lock_block_e data)
+{
+	flash_write_status_mid146085(data, FLASH_WRITE_STATUS_BP_MID146085);
+}
+
+void flash_lock_all_mid146085(void)
+{
+	flash_write_status_mid146085(FLASH_LOCK_ALL_1M_MID146085, FLASH_WRITE_STATUS_BP_MID146085);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid146085(void)
+{
+	flash_write_status_mid146085(FLASH_LOCK_NONE_MID146085, FLASH_WRITE_STATUS_BP_MID146085);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid146085(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid146085(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid146085(mid146085_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid146085(mid146085_lock_otp_e data)
+{
+	flash_write_status_mid146085(data, FLASH_WRITE_STATUS_OTP_MID146085);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.h
new file mode 100644
index 00000000..85e09a2d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid146085.h
@@ -0,0 +1,256 @@
+/********************************************************************************************************
+ * @file	flash_mid146085.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID146085_H__
+#define __MID146085_H__
+
+/*
+ * @brief     MID = 0x1460c8 Flash include P25Q80U.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	//---------------- CMP bit = 0---------------//
+	FLASH_LOCK_NONE_MID146085			=	0x0000,	//000000h-000000h	//0x0020 0x407c...
+	FLASH_LOCK_UP_64K_MID146085			=	0x0004,	//0F0000h-0FFFFFh
+	FLASH_LOCK_UP_128K_MID146085		=	0x0008,	//0E0000h-0FFFFFh
+	FLASH_LOCK_UP_256K_MID146085		=	0x000c,	//0C0000h-0FFFFFh
+	FLASH_LOCK_UP_512K_MID146085		=	0x0010,	//080000h-0FFFFFh	//0x4030
+	FLASH_LOCK_LOW_64K_MID146085		=	0x0024,	//000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID146085		=	0x0028,	//000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID146085		=	0x002c,	//000000h-03FFFFh
+	FLASH_LOCK_LOW_512K_MID146085		=	0x0030,	//000000h-07FFFFh	//0x4010
+	FLASH_LOCK_UP_4K_MID146085			=	0x0044,	//0FF000h-0FFFFFh
+	FLASH_LOCK_UP_8K_MID146085			=	0x0048,	//0FE000h-0FFFFFh
+	FLASH_LOCK_UP_16K_MID146085			=	0x004c,	//0FC000h-0FFFFFh
+	FLASH_LOCK_UP_32K_MID146085			=	0x0050,	//0F8000h-0FFFFFh	//0x0054
+	FLASH_LOCK_LOW_4K_MID146085			=	0x0064,	//000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID146085			=	0x0068,	//000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID146085		=	0x006c,	//000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID146085		=	0x0070,	//000000h-007FFFh	//0x0074
+	//---------------- CMP bit = 1---------------//
+	FLASH_LOCK_LOW_960K_MID146085		=	0x4004,	//000000h-0EFFFFh
+	FLASH_LOCK_LOW_896K_MID146085		=	0x4008,	//000000h-0DFFFFh
+	FLASH_LOCK_LOW_768K_MID146085		=	0x400c,	//000000h-0BFFFFh
+	FLASH_LOCK_UP_960K_MID146085		=	0x4024,	//010000h-0FFFFFh
+	FLASH_LOCK_UP_896K_MID146085		=	0x4028,	//020000h-0FFFFFh
+	FLASH_LOCK_UP_768K_MID146085		=	0x402c,	//040000h-0FFFFFh
+	FLASH_LOCK_LOW_1020K_MID146085		=	0x4044,	//000000h-0FEFFFh
+	FLASH_LOCK_LOW_1016K_MID146085		=	0x4048,	//000000h-0FDFFFh
+	FLASH_LOCK_LOW_1008K_MID146085		=	0x404c,	//000000h-0FBFFFh
+	FLASH_LOCK_LOW_992K_MID146085		=	0x4050,	//000000h-0F7FFFh	//0x4054
+	FLASH_LOCK_UP_1020K_MID146085		=	0x4064,	//001000h-0FFFFFh
+	FLASH_LOCK_UP_1016K_MID146085		=	0x4068,	//002000h-0FFFFFh
+	FLASH_LOCK_UP_1008K_MID146085		=	0x406c,	//004000h-0FFFFFh
+	FLASH_LOCK_UP_992K_MID146085		=	0x4070,	//008000h-0FFFFFh	//0x4074
+	FLASH_LOCK_ALL_1M_MID146085			=	0x007c,	//000000h-0FFFFFh	//0x4000 0x4040 0x4020 0x4060...
+}mid146085_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_512B_MID146085	=	0x001000,	//001000h-0011FFh
+	FLASH_OTP_0x002000_512B_MID146085	=	0x002000,	//002000h-0021FFh
+	FLASH_OTP_0x003000_512B_MID146085	=	0x003000,	//003000h-0031FFh
+}mid146085_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_512B_MID146085	=	0x0800,	//001000h-0011FFh
+	FLASH_LOCK_OTP_0x002000_512B_MID146085	=	0x1000,	//002000h-0021FFh
+	FLASH_LOCK_OTP_0x003000_512B_MID146085	=	0x2000,	//003000h-0031FFh
+}mid146085_lock_otp_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID146085		=	0x407c,
+	FLASH_WRITE_STATUS_QE_MID146085		=	0x0200,
+	FLASH_WRITE_STATUS_OTP_MID146085	=	0x3800,
+	
+	/*Related to flash hardware protection.When using this function, you need to pay attention. 
+	 *If the #WP pin of the flash is grounded and the hardware protection is set at this time, 
+	 *the status register of the flash will be locked and irreversible.*/
+	FLASH_WRITE_STATUS_SRP_MID146085	= 	0x0180, 
+}mid146085_write_status_bit_e;
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid146085(void);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid146085(unsigned short data, mid146085_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid146085(mid146085_lock_block_e data);
+
+void flash_lock_all_mid146085(void);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid146085(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid146085(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid146085(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 512-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0011ff
+ *						the address of the  Security Registers #2 0x002000-0x0021ff
+ *						the address of the  Security Registers #3 0x003000-0x0031ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid146085(mid146085_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid146085(mid146085_lock_otp_e data);
+
+
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.c
new file mode 100644
index 00000000..be41c9b7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.c
@@ -0,0 +1,231 @@
+/********************************************************************************************************
+ * @file	flash_mid156085.c
+ *
+ * @brief	This is the source file for B91
+ *
+ * @author	Driver Group
+ * @date	2022
+ *
+ * @par     Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid156085(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid156085(unsigned short data, mid156085_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid156085();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_ONE_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid156085(mid156085_lock_block_e data)
+{
+	flash_write_config_mid156085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID156085);
+	flash_write_status_mid156085(data, FLASH_WRITE_STATUS_BP_MID156085);
+}
+
+void flash_lock_all_mid156085(void)
+{
+	flash_write_config_mid156085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID156085);
+	flash_write_status_mid156085(FLASH_LOCK_ALL_2M_MID156085, FLASH_WRITE_STATUS_BP_MID156085);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid156085(void)
+{
+	flash_write_config_mid156085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID156085);
+	flash_write_status_mid156085(FLASH_LOCK_NONE_MID156085, FLASH_WRITE_STATUS_BP_MID156085);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid156085(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid156085(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 1024-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid156085(mid156085_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid156085(mid156085_lock_otp_e data)
+{
+	flash_write_status_mid156085(data, FLASH_WRITE_STATUS_OTP_MID156085);
+}
+
+/**
+ * @brief 		This function write the configure of flash.
+ * @param[in]  	data	- the value of configure.
+ * @param[in]  	bit		- the range of bits to be modified when writing configure.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_config_mid156085(unsigned char data, mid156085_write_config_bit_e bit)
+{
+	unsigned char config = 0;
+	config=flash_read_config();
+	data |= (config & ~(bit));
+	flash_write_config(FLASH_WRITE_CONFIGURE_CMD_2, data);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.h
new file mode 100644
index 00000000..86df83b9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid156085.h
@@ -0,0 +1,279 @@
+/********************************************************************************************************
+ * @file	flash_mid156085.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2022
+ *
+ * @par     Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID156085_H__
+#define __MID156085_H__
+
+/*
+ * @brief     MID = 0x1560c8 Flash include P25Q16SU.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	//---------WPS=0, CMP bit = 0-----------------//
+	FLASH_LOCK_NONE_MID156085			=	0x0000,	//000000h-000000h	//0x0020 0x407c...
+	FLASH_LOCK_UP_64K_MID156085			=	0x0004,	//1F0000h-1FFFFFh
+	FLASH_LOCK_UP_128K_MID156085		=	0x0008,	//1E0000h-1FFFFFh
+	FLASH_LOCK_UP_256K_MID156085		=	0x000c,	//1C0000h-1FFFFFh
+	FLASH_LOCK_UP_512K_MID156085		=	0x0010,	//180000h-1FFFFFh
+	FLASH_LOCK_UP_1M_MID156085          =   0x0014, //100000h-1FFFFFh  //0x4034
+	FLASH_LOCK_LOW_64K_MID156085		=	0x0024,	//000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID156085		=	0x0028,	//000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID156085		=	0x002c,	//000000h-03FFFFh
+	FLASH_LOCK_LOW_512K_MID156085		=	0x0030,	//000000h-07FFFFh
+	FLASH_LOCK_LOW_1M_MID156085         =   0x0034, //000000h-0FFFFFh  //0x4014
+	FLASH_LOCK_UP_4K_MID156085			=	0x0044,	//1FF000h-1FFFFFh
+	FLASH_LOCK_UP_8K_MID156085			=	0x0048,	//1FE000h-1FFFFFh
+	FLASH_LOCK_UP_16K_MID156085			=	0x004c,	//1FC000h-1FFFFFh
+	FLASH_LOCK_UP_32K_MID156085			=	0x0050,	//1F8000h-1FFFFFh	//0x0054
+	FLASH_LOCK_LOW_4K_MID156085			=	0x0064,	//000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID156085			=	0x0068,	//000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID156085		=	0x006c,	//000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID156085		=	0x0070,	//000000h-007FFFh	//0x0074
+	//----------------WPS=0, CMP bit = 1---------------//
+	FLASH_LOCK_LOW_1984K_MID156085		=	0x4004,	//000000h-1EFFFFh
+	FLASH_LOCK_LOW_1920K_MID156085		=	0x4008,	//000000h-1DFFFFh
+	FLASH_LOCK_LOW_1792K_MID156085		=	0x400c,	//000000h-1BFFFFh
+	FLASH_LOCK_LOW_1536K_MID156085		=	0x4010,	//000000h-17FFFFh
+	FLASH_LOCK_UP_1984K_MID156085		=	0x4024,	//010000h-1FFFFFh
+	FLASH_LOCK_UP_1920K_MID156085		=	0x4028,	//020000h-1FFFFFh
+	FLASH_LOCK_UP_1792K_MID156085		=	0x402c,	//040000h-1FFFFFh
+	FLASH_LOCK_UP_1536K_MID156085		=	0x4030,	//080000h-1FFFFFh
+	FLASH_LOCK_LOW_2044K_MID156085		=	0x4044,	//000000h-1FEFFFh
+	FLASH_LOCK_LOW_2040K_MID156085		=	0x4048,	//000000h-1FDFFFh
+	FLASH_LOCK_LOW_2032K_MID156085		=	0x404c,	//000000h-1FBFFFh
+	FLASH_LOCK_LOW_2016K_MID156085		=	0x4050,	//000000h-1F7FFFh	//0x4054
+	FLASH_LOCK_UP_2044K_MID156085		=	0x4064,	//001000h-1FFFFFh
+	FLASH_LOCK_UP_2040K_MID156085		=	0x4068,	//002000h-1FFFFFh
+	FLASH_LOCK_UP_2032K_MID156085		=	0x406c,	//004000h-1FFFFFh
+	FLASH_LOCK_UP_2016K_MID156085		=	0x4070,	//008000h-1FFFFFh	//0x4074
+	FLASH_LOCK_ALL_2M_MID156085			=	0x007c,	//000000h-1FFFFFh	//0x4000 0x4040 0x4020 0x4060...
+}mid156085_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_1024B_MID156085	=	0x001000,	//001000h-0013FFh
+	FLASH_OTP_0x002000_1024B_MID156085	=	0x002000,	//002000h-0023FFh
+	FLASH_OTP_0x003000_1024B_MID156085	=	0x003000,	//003000h-0033FFh
+}mid156085_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_1024B_MID156085	=	0x0800,	//001000h-0013FFh
+	FLASH_LOCK_OTP_0x002000_1024B_MID156085	=	0x1000,	//002000h-0023FFh
+	FLASH_LOCK_OTP_0x003000_1024B_MID156085	=	0x2000,	//003000h-0033FFh
+}mid156085_lock_otp_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID156085		=	0x407c,
+	FLASH_WRITE_STATUS_QE_MID156085		=	0x0200,
+	FLASH_WRITE_STATUS_OTP_MID156085	=	0x3800,
+	
+	/*Related to flash hardware protection.When using this function, you need to pay attention. 
+	 *If the #WP pin of the flash is grounded and the hardware protection is set at this time, 
+	 *the status register of the flash will be locked and irreversible.*/
+	FLASH_WRITE_STATUS_SRP_MID156085	= 	0x0180,
+}mid156085_write_status_bit_e;
+
+/**
+ * @brief     the range of bits to be modified when writing configure.
+ */
+typedef enum{
+	FLASH_WRITE_CONFIGURE_WPS_MID156085		=	0x04,
+}mid156085_write_config_bit_e;
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid156085(void);
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid156085(unsigned short data, mid156085_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid156085(mid156085_lock_block_e data);
+
+void flash_lock_all_mid156085(void);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid156085(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid156085(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid156085(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 1024-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid156085(mid156085_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid156085(mid156085_lock_otp_e data);
+
+/**
+ * @brief 		This function write the configure of flash.
+ * @param[in]  	data	- the value of configure.
+ * @param[in]  	bit		- the range of bits to be modified when writing configure.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_config_mid156085(unsigned char data, mid156085_write_config_bit_e bit);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.c
new file mode 100644
index 00000000..552170e2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.c
@@ -0,0 +1,231 @@
+/********************************************************************************************************
+ * @file	flash_mid166085.c
+ *
+ * @brief	This is the source file for B91
+ *
+ * @author	Driver Group
+ * @date	2022
+ *
+ * @par     Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include "flash_type.h"
+
+
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid166085(void)
+{
+	unsigned char status_low = flash_read_status(FLASH_READ_STATUS_CMD_LOWBYTE);
+	unsigned char status_high = flash_read_status(FLASH_READ_STATUS_CMD_HIGHBYTE);
+	return (status_low | (status_high << 8));
+}
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid166085(unsigned short data, mid166085_write_status_bit_e bit)
+{
+	unsigned short status = flash_read_status_mid166085();
+	data |= (status & ~(bit));
+	flash_write_status(FLASH_TYPE_16BIT_STATUS_TWO_CMD, data);
+}
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid166085(mid166085_lock_block_e data)
+{
+	flash_write_config_mid166085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID166085);
+	flash_write_status_mid166085(data, FLASH_WRITE_STATUS_BP_MID166085);
+}
+
+void flash_lock_all_mid166085(void)
+{
+	flash_write_config_mid166085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID166085);
+	flash_write_status_mid166085(FLASH_LOCK_ALL_4M_MID166085, FLASH_WRITE_STATUS_BP_MID166085);
+}
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid166085(void)
+{
+	flash_write_config_mid166085(0x00,FLASH_WRITE_CONFIGURE_WPS_MID166085);
+	flash_write_status_mid166085(FLASH_LOCK_NONE_MID166085, FLASH_WRITE_STATUS_BP_MID166085);
+}
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid166085(unsigned long addr, unsigned long len, unsigned char* buf)
+{
+	flash_read_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid166085(unsigned long addr, unsigned long len, unsigned char *buf)
+{
+	flash_write_otp(addr, len, buf);
+}
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 1024-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid166085(mid166085_otp_block_e addr)
+{
+	flash_erase_otp(addr);
+}
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid166085(mid166085_lock_otp_e data)
+{
+	flash_write_status_mid166085(data, FLASH_WRITE_STATUS_OTP_MID166085);
+}
+
+/**
+ * @brief 		This function write the configure of flash.
+ * @param[in]  	data	- the value of configure.
+ * @param[in]  	bit		- the range of bits to be modified when writing configure.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_config_mid166085(unsigned char data, mid166085_write_config_bit_e bit)
+{
+	unsigned char config = 0;
+	config=flash_read_config();
+	data |= (config & ~(bit));
+	flash_write_config(FLASH_WRITE_CONFIGURE_CMD_2, data);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.h
new file mode 100644
index 00000000..b46bedf4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_mid166085.h
@@ -0,0 +1,283 @@
+/********************************************************************************************************
+ * @file	flash_mid166085.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2022
+ *
+ * @par     Copyright (c) 2022, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __MID166085_H__
+#define __MID166085_H__
+
+/*
+ * @brief     MID = 0x1660c8 Flash include P25Q32SH.
+ */
+
+
+/**
+ * @brief     define the section of the protected memory area which is read-only and unalterable.
+ */
+typedef enum{
+	//---------WPS=0, CMP bit = 0-----------------//
+	FLASH_LOCK_NONE_MID166085			=	0x0000,  //000000h-000000h  //0x0020 0x407c...
+	FLASH_LOCK_UP_64K_MID166085	        =   0x0004,  //3F0000h-3FFFFFh
+	FLASH_LOCK_UP_128K_MID166085        =   0x0008,  //3E0000h-3FFFFFh
+	FLASH_LOCK_UP_256K_MID166085        =   0x000c,  //3C0000h-3FFFFFh
+	FLASH_LOCK_UP_512K_MID166085        =   0x0010,  //380000h-3FFFFFh
+	FLASH_LOCK_UP_1M_MID166085          =   0x0014,  //300000h-3FFFFFh
+	FLASH_LOCK_UP_2M_MID166085          =   0x0018,  //200000h-3FFFFFh  //0x4038
+	FLASH_LOCK_LOW_64K_MID166085        =   0x0024,  //000000h-00FFFFh
+	FLASH_LOCK_LOW_128K_MID166085       =   0x0028,  //000000h-01FFFFh
+	FLASH_LOCK_LOW_256K_MID166085       =   0x002c,  //000000h-03FFFFh
+	FLASH_LOCK_LOW_512K_MID166085       =   0x0030,  //000000h-07FFFFh
+	FLASH_LOCK_LOW_1M_MID166085         =   0x0034,  //000000h-0FFFFFh
+	FLASH_LOCK_LOW_2M_MID166085         =   0x0038,  //000000h-1FFFFFh  //0x007c 0x4018...
+	FLASH_LOCK_UP_4K_MID166085          =   0x0044,  //3FF000h-3FFFFFh
+	FLASH_LOCK_UP_8K_MID166085          =   0x0048,  //3FE000h-3FFFFFh
+	FLASH_LOCK_UP_16K_MID166085         =   0x004c,  //2FC000h-3FFFFFh
+	FLASH_LOCK_UP_32K_MID166085         =   0x0058,  //3F8000h-3FFFFFh  //0x0050 0x0054
+	FLASH_LOCK_LOW_4K_MID166085         =   0x0064,  //000000h-000FFFh
+	FLASH_LOCK_LOW_8K_MID166085         =   0x0068,  //000000h-001FFFh
+	FLASH_LOCK_LOW_16K_MID166085        =   0x006c,  //000000h-003FFFh
+	FLASH_LOCK_LOW_32K_MID166085        =   0x0078,  //000000h-007FFFh  //0x0070 0x0074
+	//----------------WPS=0, CMP bit = 1---------------//
+	FLASH_LOCK_LOW_4032K_MID166085      =   0x4004,  //000000h-3EFFFFh
+	FLASH_LOCK_LOW_3968K_MID166085      =   0x4008,  //000000h-3DFFFFh
+	FLASH_LOCK_LOW_3840K_MID166085      =   0x400c,  //000000h-3BFFFFh
+	FLASH_LOCK_LOW_3584K_MID166085      =   0x4010,  //000000h-37FFFFh
+	FLASH_LOCK_LOW_3M_MID166085         =   0x4014,  //000000h-2FFFFFh
+	FLASH_LOCK_UP_4032K_MID166085       =   0x4024,  //010000h-3FFFFFh
+	FLASH_LOCK_UP_3968K_MID166085       =   0x4028,  //020000h-3FFFFFh
+	FLASH_LOCK_UP_3840K_MID166085       =   0x402c,  //040000h-3FFFFFh
+	FLASH_LOCK_UP_3584K_MID166085       =   0x4030,  //080000h-3FFFFFh
+	FLASH_LOCK_UP_3M_MID166085          =   0x4034,  //100000h-3FFFFFh
+	FLASH_LOCK_LOW_4092K_MID166085      =   0x4044,  //000000h-3FEFFFh
+	FLASH_LOCK_LOW_4088K_MID166085      =   0x4048,  //000000h-3FDFFFh
+	FLASH_LOCK_LOW_4080K_MID166085      =   0x404c,  //000000h-3FBFFFh
+	FLASH_LOCK_LOW_4064K_MID166085      =   0x4058,  //000000h-3F7FFFh  //0x4050 0x4054
+	FLASH_LOCK_UP_4092K_MID166085       =   0x4064,  //001000h-3FFFFFh
+	FLASH_LOCK_UP_4088K_MID166085       =   0x4068,  //002000h-3FFFFFh
+	FLASH_LOCK_UP_4080K_MID166085       =   0x406c,  //004000h-3FFFFFh
+	FLASH_LOCK_UP_4064K_MID166085       =   0x4078,  //008000h-3FFFFFh  //0x4070 0x4074
+	FLASH_LOCK_ALL_4M_MID166085         =   0x4000,  //000000h-3FFFFFh  //0x4000 0x4040 0x4020 0x4060...
+}mid166085_lock_block_e;
+
+/**
+ * @brief     The starting address of the Security Registers.
+ */
+typedef enum{
+	FLASH_OTP_0x001000_1024B_MID166085	=	0x001000,	//001000h-0013FFh
+	FLASH_OTP_0x002000_1024B_MID166085	=	0x002000,	//002000h-0023FFh
+	FLASH_OTP_0x003000_1024B_MID166085	=	0x003000,	//003000h-0033FFh
+}mid166085_otp_block_e;
+
+/**
+ * @brief     the lock area of the Security Registers.
+ */
+typedef enum{
+	FLASH_LOCK_OTP_0x001000_1024B_MID166085	=	0x0800,	//001000h-0013FFh
+	FLASH_LOCK_OTP_0x002000_1024B_MID166085	=	0x1000,	//002000h-0023FFh
+	FLASH_LOCK_OTP_0x003000_1024B_MID166085	=	0x2000,	//003000h-0033FFh
+}mid166085_lock_otp_e;
+
+/**
+ * @brief     the range of bits to be modified when writing status.
+ */
+typedef enum{
+	FLASH_WRITE_STATUS_BP_MID166085		=	0x407c,
+	FLASH_WRITE_STATUS_QE_MID166085		=	0x0200,
+	FLASH_WRITE_STATUS_OTP_MID166085	=	0x3800,
+	
+	/*Related to flash hardware protection.When using this function, you need to pay attention. 
+	 *If the #WP pin of the flash is grounded and the hardware protection is set at this time, 
+	 *the status register of the flash will be locked and irreversible.*/
+	FLASH_WRITE_STATUS_SRP_MID166085	= 	0x0180,
+}mid166085_write_status_bit_e;
+
+/**
+ * @brief     the range of bits to be modified when writing configure.
+ */
+typedef enum{
+	FLASH_WRITE_CONFIGURE_WPS_MID166085		=	0x04,
+}mid166085_write_config_bit_e;
+/**
+ * @brief 		This function reads the status of flash.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned short flash_read_status_mid166085(void);
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	data	- the value of status.
+ * @param[in]  	bit		- the range of bits to be modified when writing status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status_mid166085(unsigned short data, mid166085_write_status_bit_e bit);
+
+/**
+ * @brief 		This function serves to set the protection area of the flash.
+ * @param[in]   data	- refer to the protection area definition in the .h file.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_mid166085(mid166085_lock_block_e data);
+
+void flash_lock_all_mid166085(void);
+
+/**
+ * @brief 		This function serves to flash release protection.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_unlock_mid166085(void);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp_mid166085(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp_mid166085(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * 				You can erase 1024-byte one time.
+ * @param[in]   addr	- the address that you want to erase.
+ *						the address of the  Security Registers #1 0x001000-0x0013ff
+ *						the address of the  Security Registers #2 0x002000-0x0023ff
+ *						the address of the  Security Registers #3 0x003000-0x0033ff
+ * @return 		none.
+ * @note		Even you choose the middle area of the Security Registers,it will erase the whole area.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp_mid166085(mid166085_otp_block_e addr);
+
+/**
+ * @brief 		This function serves to provide the write protect control to the Security Registers.
+ * @param[in]   data	- the lock area of the Security Registers.
+ * @return 		none.
+ * @note		once they are set to 1, the Security Registers will become read-only permanently,
+ * 				you can't write or erase the area anymore.
+ *
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_lock_otp_mid166085(mid166085_lock_otp_e data);
+
+/**
+ * @brief 		This function write the configure of flash.
+ * @param[in]  	data	- the value of configure.
+ * @param[in]  	bit		- the range of bits to be modified when writing configure.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_config_mid166085(unsigned char data, mid166085_write_config_bit_e bit);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_type.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_type.h
new file mode 100644
index 00000000..75498067
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/flash/flash_type.h
@@ -0,0 +1,153 @@
+/********************************************************************************************************
+ * @file	flash_type.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef __FLASH_TYPE_H__
+#define __FLASH_TYPE_H__
+
+#include "flash.h"
+#include "flash_mid146085.h"	// P25Q80U
+#include "flash_mid156085.h"    // P25Q16SU
+#include "flash_mid166085.h"    // P25Q32SH
+
+
+/**
+ * @brief		This function reads the status of flash.
+ * @param[in] 	cmd	- the cmd of read status.
+ * @return 		the value of status.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+unsigned char flash_read_status(flash_command_e cmd);
+
+/**
+ * @brief 		This function write the status of flash.
+ * @param[in]  	type	- the type of status.8 bit or 16 bit.
+ * @param[in]  	data	- the value of status.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_status(flash_status_typedef_e type , unsigned short data);
+
+/**
+ * @brief 		This function serves to read data from the Security Registers of the flash.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of the content to be read.
+ * @param[out]  buf		- the starting address of the content to be read.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_read_otp(unsigned long addr, unsigned long len, unsigned char* buf);
+
+/**
+ * @brief 		This function serves to write data to the Security Registers of the flash you choose.
+ * @param[in]   addr	- the start address of the Security Registers.
+ * @param[in]   len		- the length of content to be written.
+ * @param[in]   buf		- the starting address of the content to be written.
+ * @return 		none.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_write_otp(unsigned long addr, unsigned long len, unsigned char *buf);
+
+/**
+ * @brief 		This function serves to erase the data of the Security Registers that you choose.
+ * @param[in]   addr	- the address that you want to erase.
+ * @return 		none.
+ * @Attention	Even you choose the middle area of the Security Registers,it will erase the whole area.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+void flash_erase_otp(unsigned long addr);
+
+/**
+ * @brief 		This function is used to write the configure of the flash,P25Q16SU/P25Q32SH uses this function.
+ * @param[in]   cmd			- the write command.
+ * @param[out]  data		- the start address of the data buffer.
+ * @return 		none.
+ * @note		important:  "data" must not reside at flash, such as constant string.If that case, pls copy to memory first before write.
+ *              Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ void flash_write_config(flash_command_e cmd,unsigned char data);
+
+/**
+ * @brief 		This function is used to read the configure of the flash,P25Q16SU/P25Q32SH uses this function.
+ * @return 		the value of configure.
+ * @note        Attention: Before calling the FLASH function, please check the power supply voltage of the chip.
+ *              Only if the detected voltage is greater than the safe voltage value, the FLASH function can be called.
+ *              Taking into account the factors such as power supply fluctuations, the safe voltage value needs to be greater
+ *              than the minimum chip operating voltage. For the specific value, please make a reasonable setting according
+ *              to the specific application and hardware circuit.
+ *
+ *              Risk description: When the chip power supply voltage is relatively low, due to the unstable power supply,
+ *              there may be a risk of error in the operation of the flash (especially for the write and erase operations.
+ *              If an abnormality occurs, the firmware and user data may be rewritten, resulting in the final Product failure)
+ */
+_attribute_text_sec_ unsigned char  flash_read_config(void);
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio.h
new file mode 100644
index 00000000..ce430905
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio.h
@@ -0,0 +1,523 @@
+/********************************************************************************************************
+ * @file	gpio.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page GPIO
+ *
+ *	Introduction
+ *	===============
+ *	B91 contain two six group gpio(A~F), total 44 gpio pin.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: gpio.h
+ */
+#ifndef DRIVERS_GPIO_H_
+#define DRIVERS_GPIO_H_
+
+
+#include "lib/include/plic.h"
+#include "analog.h"
+#include "reg_include/gpio_reg.h"
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**
+ *  @brief  Define GPIO types
+ */
+typedef enum{
+		GPIO_GROUPA    = 0x000,
+		GPIO_GROUPB    = 0x100,
+		GPIO_GROUPC    = 0x200,
+		GPIO_GROUPD    = 0x300,
+		GPIO_GROUPE    = 0x400,
+		GPIO_GROUPF    = 0x500,
+		GPIO_ALL       = 0x600,
+	    GPIO_PA0 = GPIO_GROUPA | BIT(0),
+		GPIO_PA1 = GPIO_GROUPA | BIT(1),
+		GPIO_PA2 = GPIO_GROUPA | BIT(2),
+		GPIO_PA3 = GPIO_GROUPA | BIT(3),
+		GPIO_PA4 = GPIO_GROUPA | BIT(4),
+		GPIO_PA5 = GPIO_GROUPA | BIT(5),GPIO_DM=GPIO_PA5,
+		GPIO_PA6 = GPIO_GROUPA | BIT(6),GPIO_DP=GPIO_PA6,
+		GPIO_PA7 = GPIO_GROUPA | BIT(7),GPIO_SWS=GPIO_PA7,
+		GPIOA_ALL = GPIO_GROUPA | 0x00ff,
+
+		GPIO_PB0 = GPIO_GROUPB | BIT(0),
+		GPIO_PB1 = GPIO_GROUPB | BIT(1),
+		GPIO_PB2 = GPIO_GROUPB | BIT(2),
+		GPIO_PB3 = GPIO_GROUPB | BIT(3),
+		GPIO_PB4 = GPIO_GROUPB | BIT(4),
+		GPIO_PB5 = GPIO_GROUPB | BIT(5),
+		GPIO_PB6 = GPIO_GROUPB | BIT(6),
+		GPIO_PB7 = GPIO_GROUPB | BIT(7),
+
+		GPIO_PC0 = GPIO_GROUPC | BIT(0),GPIO_SWM=GPIO_PC0,
+		GPIO_PC1 = GPIO_GROUPC | BIT(1),
+		GPIO_PC2 = GPIO_GROUPC | BIT(2),
+		GPIO_PC3 = GPIO_GROUPC | BIT(3),
+		GPIO_PC4 = GPIO_GROUPC | BIT(4),
+		GPIO_PC5 = GPIO_GROUPC | BIT(5),
+		GPIO_PC6 = GPIO_GROUPC | BIT(6),
+		GPIO_PC7 = GPIO_GROUPC | BIT(7),
+		GPIOC_ALL = GPIO_GROUPC | 0x00ff,
+
+		GPIO_PD0 = GPIO_GROUPD | BIT(0),
+		GPIO_PD1 = GPIO_GROUPD | BIT(1),
+		GPIO_PD2 = GPIO_GROUPD | BIT(2),
+		GPIO_PD3 = GPIO_GROUPD | BIT(3),
+		GPIO_PD4 = GPIO_GROUPD | BIT(4),
+		GPIO_PD5 = GPIO_GROUPD | BIT(5),
+		GPIO_PD6 = GPIO_GROUPD | BIT(6),
+		GPIO_PD7 = GPIO_GROUPD | BIT(7),
+
+		GPIO_PE0 = GPIO_GROUPE | BIT(0),
+		GPIO_PE1 = GPIO_GROUPE | BIT(1),
+		GPIO_PE2 = GPIO_GROUPE | BIT(2),
+		GPIO_PE3 = GPIO_GROUPE | BIT(3),
+		GPIO_PE4 = GPIO_GROUPE | BIT(4),
+		GPIO_PE5 = GPIO_GROUPE | BIT(5),
+		GPIO_PE6 = GPIO_GROUPE | BIT(6),
+		GPIO_PE7 = GPIO_GROUPE | BIT(7),
+		GPIOE_ALL = GPIO_GROUPE | 0x00ff,
+
+		GPIO_PF0 = GPIO_GROUPF | BIT(0),
+		GPIO_PF1 = GPIO_GROUPF | BIT(1),
+		GPIO_PF2 = GPIO_GROUPF | BIT(2),
+		GPIO_PF3 = GPIO_GROUPF | BIT(3),
+		GPIO_PF4 = GPIO_GROUPF | BIT(4),
+		GPIO_PF5 = GPIO_GROUPF | BIT(5),
+}gpio_pin_e;
+
+/**
+ *  @brief  Define GPIO mux func
+ */
+typedef enum{
+	    AS_GPIO,
+		AS_MSPI,
+
+		AS_SWS,
+		AS_SWM,
+
+		AS_USB_DP,
+		AS_USB_DM,
+
+		AS_TDI,
+		AS_TDO,
+		AS_TMS,
+		AS_TCK,
+
+
+
+}gpio_fuc_e;
+
+
+
+/**
+ *  @brief  Define rising/falling types
+ */
+typedef enum{
+	POL_RISING   = 0,
+	POL_FALLING  = 1,
+}gpio_pol_e;
+
+
+/**
+ *  @brief  Define interrupt types
+ */
+typedef enum{
+	 INTR_RISING_EDGE=0,
+	 INTR_FALLING_EDGE ,
+	 INTR_HIGH_LEVEL,
+	 INTR_LOW_LEVEL,
+} gpio_irq_trigger_type_e;
+
+/**
+ *  @brief  Define pull up or down types
+ */
+typedef enum {
+	GPIO_PIN_UP_DOWN_FLOAT    = 0,
+	GPIO_PIN_PULLUP_1M     	= 1,
+	GPIO_PIN_PULLDOWN_100K  	= 2,
+	GPIO_PIN_PULLUP_10K 		= 3,
+}gpio_pull_type_e;
+
+
+typedef enum{
+	GPIO_IRQ_MASK_GPIO       =          BIT(0),
+	GPIO_IRQ_MASK_GPIO2RISC0 = 			BIT(1),
+	GPIO_IRQ_MASK_GPIO2RISC1 = 			BIT(2),
+}gpio_irq_mask_e;
+
+/**
+ * @brief      This function servers to enable gpio function.
+ * @param[in]  pin - the selected pin.
+ * @return     none.
+ */
+static inline void gpio_function_en(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_SET(reg_gpio_func(pin), bit);
+}
+
+
+/**
+ * @brief      This function servers to disable gpio function.
+ * @param[in]  pin - the selected pin.
+ * @return     none.
+ */
+static inline void gpio_function_dis(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_CLR(reg_gpio_func(pin), bit);
+}
+
+
+
+/**
+ * @brief     This function set the pin's output high level.
+ * @param[in] pin - the pin needs to set its output level.
+ * @return    none.
+ */
+static inline void gpio_set_high_level(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_SET(reg_gpio_out(pin), bit);
+
+}
+
+
+/**
+ * @brief     This function set the pin's output low level.
+ * @param[in] pin - the pin needs to set its output level.
+ * @return    none.
+ */
+static inline void gpio_set_low_level(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_CLR(reg_gpio_out(pin), bit);
+
+}
+
+/**
+ * @brief     This function set the pin's output level.
+ * @param[in] pin - the pin needs to set its output level
+ * @param[in] value - value of the output level(1: high 0: low)
+ * @return    none
+ */
+static inline void gpio_set_level(gpio_pin_e pin, unsigned char value)
+{
+	if(value)
+	{
+		gpio_set_high_level(pin);
+	}
+	else
+	{
+		gpio_set_low_level(pin);
+	}
+}
+
+/**
+ * @brief     This function read the pin's input/output level.
+ * @param[in] pin - the pin needs to read its level.
+ * @return    1: the pin's level is high.
+ * 			  0: the pin's level is low.
+ */
+static inline _Bool gpio_get_level(gpio_pin_e pin)
+{
+	return BM_IS_SET(reg_gpio_in(pin), pin & 0xff);
+}
+
+
+/**
+ * @brief      This function read all the pins' input level.
+ * @param[out] p - the buffer used to store all the pins' input level
+ * @return     none
+ */
+static inline void gpio_get_level_all(unsigned char *p)
+{
+	p[0] = reg_gpio_pa_in;
+	p[1] = reg_gpio_pb_in;
+	p[2] = reg_gpio_pc_in;
+	p[3] = reg_gpio_pd_in;
+	p[4] = reg_gpio_pe_in;
+}
+
+
+
+/**
+ * @brief     This function set the pin toggle.
+ * @param[in] pin - the pin needs to toggle.
+ * @return    none.
+ */
+static inline void gpio_toggle(gpio_pin_e pin)
+{
+	reg_gpio_out(pin) ^= (pin & 0xFF);
+}
+
+
+
+/**
+ * @brief      This function enable the output function of a pin.
+ * @param[in]  pin - the pin needs to set the output function.
+ * @return     none.
+ */
+static inline void gpio_output_en(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_CLR(reg_gpio_oen(pin), bit);
+}
+
+/**
+ * @brief      This function disable the output function of a pin.
+ * @param[in]  pin - the pin needs to set the output function.
+ * @return     none.
+ */
+static inline void gpio_output_dis(gpio_pin_e pin)
+{
+	unsigned char	bit = pin & 0xff;
+	BM_SET(reg_gpio_oen(pin), bit);
+}
+
+/**
+ * @brief      This function enable set output function of a pin.
+ * @param[in]  pin - the pin needs to set the output function (1: enable,0: disable)
+ * @return     none
+ */
+static inline void gpio_set_output(gpio_pin_e pin, unsigned char value)
+{
+	if(value)
+	{
+		gpio_output_en(pin);
+	}
+	else
+	{
+		gpio_output_dis(pin);
+	}
+
+}
+/**
+ * @brief      This function determines whether the output function of a pin is enabled.
+ * @param[in]  pin - the pin needs to determine whether its output function is enabled.
+ * @return     1: the pin's output function is enabled.
+ *             0: the pin's output function is disabled.
+ */
+static inline _Bool  gpio_is_output_en(gpio_pin_e pin)
+{
+	return !BM_IS_SET(reg_gpio_oen(pin), pin & 0xff);
+}
+
+
+/**
+ * @brief     This function determines whether the input function of a pin is enabled.
+ * @param[in] pin - the pin needs to determine whether its input function is enabled(not include group_pc).
+ * @return    1: the pin's input function is enabled.
+ *            0: the pin's input function is disabled.
+ */
+static inline _Bool gpio_is_input_en(gpio_pin_e pin)
+{
+	return BM_IS_SET(reg_gpio_ie(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function serves to enable gpio irq function.
+ * @param[in]  pin  - the pin needs to enable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_irq_en(gpio_pin_e pin)
+{
+	BM_SET(reg_gpio_irq_en(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function serves to disable gpio irq function.
+ * @param[in]  pin  - the pin needs to disable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_irq_dis(gpio_pin_e pin)
+{
+	BM_CLR(reg_gpio_irq_en(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function serves to enable gpio risc0 irq function.
+ * @param[in]  pin  - the pin needs to enable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_gpio2risc0_irq_en(gpio_pin_e pin)
+{
+	BM_SET(reg_gpio_irq_risc0_en(pin), pin & 0xff);
+}
+/**
+ * @brief      This function serves to disable gpio risc0 irq function.
+ * @param[in]  pin  - the pin needs to disable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_gpio2risc0_irq_dis(gpio_pin_e pin)
+{
+	BM_CLR(reg_gpio_irq_risc0_en(pin), pin & 0xff);
+}
+/**
+ * @brief      This function serves to enable gpio risc1 irq function.
+ * @param[in]  pin  - the pin needs to enable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_gpio2risc1_irq_en(gpio_pin_e pin)
+{
+	BM_SET(reg_gpio_irq_risc1_en(pin), pin & 0xff);
+}
+
+/**
+ * @brief      This function serves to disable gpio risc1 irq function.
+ * @param[in]  pin  - the pin needs to disable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_gpio2risc1_irq_dis(gpio_pin_e pin)
+{
+	BM_CLR(reg_gpio_irq_risc1_en(pin), pin & 0xff);
+}
+/**
+ * @brief      This function serves to clr gpio irq status.
+ * @param[in]  status  - the pin needs to disable its IRQ.
+ * @return     none.
+ */
+static inline void gpio_clr_irq_status(gpio_irq_status_e status)
+{
+	reg_gpio_irq_clr=status;
+}
+
+/**
+ * @brief      This function serves to enable gpio_irq/gpio_risc0_irq/gpio_risc1_irq mask function.
+ * @param[in]  mask  - to select interrupt type.
+ * @return     none.
+ */
+static inline void gpio_set_irq_mask(gpio_irq_mask_e mask)
+{
+	BM_SET(reg_gpio_irq_risc_mask, mask);
+}
+
+/**
+ * @brief      This function serves to disable gpio_irq/gpio_risc0_irq/gpio_risc1_irq mask function.
+ *             if disable gpio interrupt,choose disable gpio mask , use interface gpio_clr_irq_mask instead of gpio_irq_dis/gpio_gpio2risc0_irq_dis/gpio_gpio2risc1_irq_dis.
+ * @return     none.
+ */
+static inline void gpio_clr_irq_mask(gpio_irq_mask_e mask)
+{
+	BM_CLR(reg_gpio_irq_risc_mask, mask);
+}
+
+/**
+ * @brief      This function set the pin's driving strength at strong.
+ * @param[in]  pin - the pin needs to set the driving strength.
+ * @return     none.
+ */
+void gpio_ds_en(gpio_pin_e pin);
+
+
+/**
+ * @brief      This function set the pin's driving strength.
+ * @param[in]  pin - the pin needs to set the driving strength at poor.
+ * @return     none.
+ */
+ void gpio_ds_dis(gpio_pin_e pin);
+
+
+
+
+void gpio_set_irq(gpio_pin_e pin, gpio_irq_trigger_type_e trigger_type);
+
+/**
+ * @brief     This function set a pin's IRQ_RISC0.
+ * @param[in] pin 			- the pin needs to enable its IRQ.
+ * @param[in] trigger_type  - gpio interrupt type 0  rising edge 1 falling edge 2 high level 3 low level
+ * @return    none.
+ */
+void gpio_set_gpio2risc0_irq(gpio_pin_e pin, gpio_irq_trigger_type_e trigger_type);
+
+/**
+ * @brief     This function set a pin's IRQ_RISC1.
+ * @param[in] pin 			- the pin needs to enable its IRQ.
+ * @param[in] trigger_type  - gpio interrupt type 0  rising edge 1 falling edge 2 high level 3 low level
+ * @return    none.
+ */
+void gpio_set_gpio2risc1_irq(gpio_pin_e pin, gpio_irq_trigger_type_e trigger_type);
+
+
+/**
+ * @brief      This function set the input function of a pin.
+ * @param[in]  pin - the pin needs to set the input function.
+ * @return     none.
+ */
+void gpio_input_en(gpio_pin_e pin);
+
+/**
+ * @brief      This function disable the input function of a pin.
+ * @param[in]  pin - the pin needs to set the input function.
+ * @return     none.
+ */
+void gpio_input_dis(gpio_pin_e pin);
+
+/**
+ * @brief      This function set the input function of a pin.
+ * @param[in]  pin - the pin needs to set the input function
+ * @param[in]  value - enable or disable the pin's input function(1: enable,0: disable )
+ * @return     none
+ */
+void gpio_set_input(gpio_pin_e pin, unsigned char value);
+/**
+ * @brief      This function servers to set the specified GPIO as high resistor.
+ * @param[in]  pin  - select the specified GPIO.
+ * @return     none.
+ */
+void gpio_shutdown(gpio_pin_e pin);
+
+/**
+ * @brief     This function set a pin's pull-up/down resistor.
+ * @param[in] pin - the pin needs to set its pull-up/down resistor.
+ * @param[in] up_down_res - the type of the pull-up/down resistor.
+ * @return    none.
+ */
+void gpio_set_up_down_res(gpio_pin_e pin, gpio_pull_type_e up_down_res);
+
+/**
+ * @brief     This function set pin's 30k pull-up registor.
+ * @param[in] pin - the pin needs to set its pull-up registor.
+ * @return    none.
+ */
+void gpio_set_pullup_res_30k(gpio_pin_e pin);
+
+
+#endif
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio_default.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio_default.h
new file mode 100644
index 00000000..1ef4afb6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/gpio_default.h
@@ -0,0 +1,1023 @@
+/********************************************************************************************************
+ * @file	gpio_default.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef DRIVERS_GPIO_DEFAULT_H_
+#define DRIVERS_GPIO_DEFAULT_H_
+
+#include "compiler.h"
+#include "gpio.h"
+/**********************************************************************************************************************
+ *                                           GPIO   setting                                                            *
+ *********************************************************************************************************************/
+#ifndef PA0_INPUT_ENABLE
+#define PA0_INPUT_ENABLE	0
+#endif
+#ifndef PA1_INPUT_ENABLE
+#define PA1_INPUT_ENABLE	0
+#endif
+#ifndef PA2_INPUT_ENABLE
+#define PA2_INPUT_ENABLE	0
+#endif
+#ifndef PA3_INPUT_ENABLE
+#define PA3_INPUT_ENABLE	0
+#endif
+#ifndef PA4_INPUT_ENABLE
+#define PA4_INPUT_ENABLE	0
+#endif
+#ifndef PA5_INPUT_ENABLE
+#define PA5_INPUT_ENABLE	0	//USB
+#endif
+#ifndef PA6_INPUT_ENABLE
+#define PA6_INPUT_ENABLE	0   //USB
+#endif
+#ifndef PA7_INPUT_ENABLE
+#define PA7_INPUT_ENABLE	1	//SWS
+#endif
+#ifndef PA0_OUTPUT_ENABLE
+#define PA0_OUTPUT_ENABLE	0
+#endif
+#ifndef PA1_OUTPUT_ENABLE
+#define PA1_OUTPUT_ENABLE	0
+#endif
+#ifndef PA2_OUTPUT_ENABLE
+#define PA2_OUTPUT_ENABLE	0
+#endif
+#ifndef PA3_OUTPUT_ENABLE
+#define PA3_OUTPUT_ENABLE	0
+#endif
+#ifndef PA4_OUTPUT_ENABLE
+#define PA4_OUTPUT_ENABLE	0
+#endif
+#ifndef PA5_OUTPUT_ENABLE
+#define PA5_OUTPUT_ENABLE	0
+#endif
+#ifndef PA6_OUTPUT_ENABLE
+#define PA6_OUTPUT_ENABLE	0
+#endif
+#ifndef PA7_OUTPUT_ENABLE
+#define PA7_OUTPUT_ENABLE	0
+#endif
+#ifndef PA0_DATA_STRENGTH
+#define PA0_DATA_STRENGTH	1
+#endif
+#ifndef PA1_DATA_STRENGTH
+#define PA1_DATA_STRENGTH	1
+#endif
+#ifndef PA2_DATA_STRENGTH
+#define PA2_DATA_STRENGTH	1
+#endif
+#ifndef PA3_DATA_STRENGTH
+#define PA3_DATA_STRENGTH	1
+#endif
+#ifndef PA4_DATA_STRENGTH
+#define PA4_DATA_STRENGTH	1
+#endif
+#ifndef PA5_DATA_STRENGTH
+#define PA5_DATA_STRENGTH	1
+#endif
+#ifndef PA6_DATA_STRENGTH
+#define PA6_DATA_STRENGTH	1
+#endif
+#ifndef PA7_DATA_STRENGTH
+#define PA7_DATA_STRENGTH	1
+#endif
+#ifndef PA0_DATA_OUT
+#define PA0_DATA_OUT	0
+#endif
+#ifndef PA1_DATA_OUT
+#define PA1_DATA_OUT	0
+#endif
+#ifndef PA2_DATA_OUT
+#define PA2_DATA_OUT	0
+#endif
+#ifndef PA3_DATA_OUT
+#define PA3_DATA_OUT	0
+#endif
+#ifndef PA4_DATA_OUT
+#define PA4_DATA_OUT	0
+#endif
+#ifndef PA5_DATA_OUT
+#define PA5_DATA_OUT	0
+#endif
+#ifndef PA6_DATA_OUT
+#define PA6_DATA_OUT	0
+#endif
+#ifndef PA7_DATA_OUT
+#define PA7_DATA_OUT	0
+#endif
+#ifndef PA0_FUNC
+#define PA0_FUNC	AS_GPIO
+#endif
+#ifndef PA1_FUNC
+#define PA1_FUNC	AS_GPIO
+#endif
+#ifndef PA2_FUNC
+#define PA2_FUNC	AS_GPIO
+#endif
+#ifndef PA3_FUNC
+#define PA3_FUNC	AS_GPIO
+#endif
+#ifndef PA4_FUNC
+#define PA4_FUNC	AS_GPIO
+#endif
+#ifndef PA5_FUNC
+#define PA5_FUNC	AS_GPIO
+#endif
+#ifndef PA6_FUNC
+#define PA6_FUNC	AS_GPIO
+#endif
+#ifndef PA7_FUNC
+#define PA7_FUNC	AS_SWS
+#endif
+#ifndef PULL_WAKEUP_SRC_PA0
+#define PULL_WAKEUP_SRC_PA0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA1
+#define PULL_WAKEUP_SRC_PA1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA2
+#define PULL_WAKEUP_SRC_PA2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA3
+#define PULL_WAKEUP_SRC_PA3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA4
+#define PULL_WAKEUP_SRC_PA4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA5
+#define PULL_WAKEUP_SRC_PA5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA6
+#define PULL_WAKEUP_SRC_PA6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PA7
+#define PULL_WAKEUP_SRC_PA7		GPIO_PIN_PULLUP_1M	//sws pullup
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PB0_INPUT_ENABLE
+#define PB0_INPUT_ENABLE	0
+#endif
+#ifndef PB1_INPUT_ENABLE
+#define PB1_INPUT_ENABLE	0
+#endif
+#ifndef PB2_INPUT_ENABLE
+#define PB2_INPUT_ENABLE	0
+#endif
+#ifndef PB3_INPUT_ENABLE
+#define PB3_INPUT_ENABLE	0
+#endif
+#ifndef PB4_INPUT_ENABLE
+#define PB4_INPUT_ENABLE	0
+#endif
+#ifndef PB5_INPUT_ENABLE
+#define PB5_INPUT_ENABLE	0
+#endif
+#ifndef PB6_INPUT_ENABLE
+#define PB6_INPUT_ENABLE	0
+#endif
+#ifndef PB7_INPUT_ENABLE
+#define PB7_INPUT_ENABLE	0
+#endif
+#ifndef PB0_OUTPUT_ENABLE
+#define PB0_OUTPUT_ENABLE	0
+#endif
+#ifndef PB1_OUTPUT_ENABLE
+#define PB1_OUTPUT_ENABLE	0
+#endif
+#ifndef PB2_OUTPUT_ENABLE
+#define PB2_OUTPUT_ENABLE	0
+#endif
+#ifndef PB3_OUTPUT_ENABLE
+#define PB3_OUTPUT_ENABLE	0
+#endif
+#ifndef PB4_OUTPUT_ENABLE
+#define PB4_OUTPUT_ENABLE	0
+#endif
+#ifndef PB5_OUTPUT_ENABLE
+#define PB5_OUTPUT_ENABLE	0
+#endif
+#ifndef PB6_OUTPUT_ENABLE
+#define PB6_OUTPUT_ENABLE	0
+#endif
+#ifndef PB7_OUTPUT_ENABLE
+#define PB7_OUTPUT_ENABLE	0
+#endif
+#ifndef PB0_DATA_STRENGTH
+#define PB0_DATA_STRENGTH	1
+#endif
+#ifndef PB1_DATA_STRENGTH
+#define PB1_DATA_STRENGTH	1
+#endif
+#ifndef PB2_DATA_STRENGTH
+#define PB2_DATA_STRENGTH	1
+#endif
+#ifndef PB3_DATA_STRENGTH
+#define PB3_DATA_STRENGTH	1
+#endif
+#ifndef PB4_DATA_STRENGTH
+#define PB4_DATA_STRENGTH	1
+#endif
+#ifndef PB5_DATA_STRENGTH
+#define PB5_DATA_STRENGTH	1
+#endif
+#ifndef PB6_DATA_STRENGTH
+#define PB6_DATA_STRENGTH	1
+#endif
+#ifndef PB7_DATA_STRENGTH
+#define PB7_DATA_STRENGTH	1
+#endif
+#ifndef PB0_DATA_OUT
+#define PB0_DATA_OUT	0
+#endif
+#ifndef PB1_DATA_OUT
+#define PB1_DATA_OUT	0
+#endif
+#ifndef PB2_DATA_OUT
+#define PB2_DATA_OUT	0
+#endif
+#ifndef PB3_DATA_OUT
+#define PB3_DATA_OUT	0
+#endif
+#ifndef PB4_DATA_OUT
+#define PB4_DATA_OUT	0
+#endif
+#ifndef PB5_DATA_OUT
+#define PB5_DATA_OUT	0
+#endif
+#ifndef PB6_DATA_OUT
+#define PB6_DATA_OUT	0
+#endif
+#ifndef PB7_DATA_OUT
+#define PB7_DATA_OUT	0
+#endif
+#ifndef PB0_FUNC
+#define PB0_FUNC	AS_GPIO
+#endif
+#ifndef PB1_FUNC
+#define PB1_FUNC	AS_GPIO
+#endif
+#ifndef PB2_FUNC
+#define PB2_FUNC	AS_GPIO
+#endif
+#ifndef PB3_FUNC
+#define PB3_FUNC	AS_GPIO
+#endif
+#ifndef PB4_FUNC
+#define PB4_FUNC	AS_GPIO
+#endif
+#ifndef PB5_FUNC
+#define PB5_FUNC	AS_GPIO
+#endif
+#ifndef PB6_FUNC
+#define PB6_FUNC	AS_GPIO
+#endif
+#ifndef PB7_FUNC
+#define PB7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PB0
+#define PULL_WAKEUP_SRC_PB0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB1
+#define PULL_WAKEUP_SRC_PB1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB2
+#define PULL_WAKEUP_SRC_PB2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB3
+#define PULL_WAKEUP_SRC_PB3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB4
+#define PULL_WAKEUP_SRC_PB4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB5
+#define PULL_WAKEUP_SRC_PB5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB6
+#define PULL_WAKEUP_SRC_PB6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PB7
+#define PULL_WAKEUP_SRC_PB7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PC0_INPUT_ENABLE
+#define PC0_INPUT_ENABLE	0
+#endif
+#ifndef PC1_INPUT_ENABLE
+#define PC1_INPUT_ENABLE	0
+#endif
+#ifndef PC2_INPUT_ENABLE
+#define PC2_INPUT_ENABLE	0
+#endif
+#ifndef PC3_INPUT_ENABLE
+#define PC3_INPUT_ENABLE	0
+#endif
+#ifndef PC4_INPUT_ENABLE
+#define PC4_INPUT_ENABLE	0
+#endif
+#ifndef PC5_INPUT_ENABLE
+#define PC5_INPUT_ENABLE	0
+#endif
+#ifndef PC6_INPUT_ENABLE
+#define PC6_INPUT_ENABLE	0
+#endif
+#ifndef PC7_INPUT_ENABLE
+#define PC7_INPUT_ENABLE	0
+#endif
+#ifndef PC0_OUTPUT_ENABLE
+#define PC0_OUTPUT_ENABLE	0
+#endif
+#ifndef PC1_OUTPUT_ENABLE
+#define PC1_OUTPUT_ENABLE	0
+#endif
+#ifndef PC2_OUTPUT_ENABLE
+#define PC2_OUTPUT_ENABLE	0
+#endif
+#ifndef PC3_OUTPUT_ENABLE
+#define PC3_OUTPUT_ENABLE	0
+#endif
+#ifndef PC4_OUTPUT_ENABLE
+#define PC4_OUTPUT_ENABLE	0
+#endif
+#ifndef PC5_OUTPUT_ENABLE
+#define PC5_OUTPUT_ENABLE	0
+#endif
+#ifndef PC6_OUTPUT_ENABLE
+#define PC6_OUTPUT_ENABLE	0
+#endif
+#ifndef PC7_OUTPUT_ENABLE
+#define PC7_OUTPUT_ENABLE	0
+#endif
+#ifndef PC0_DATA_STRENGTH
+#define PC0_DATA_STRENGTH	1
+#endif
+#ifndef PC1_DATA_STRENGTH
+#define PC1_DATA_STRENGTH	1
+#endif
+#ifndef PC2_DATA_STRENGTH
+#define PC2_DATA_STRENGTH	1
+#endif
+#ifndef PC3_DATA_STRENGTH
+#define PC3_DATA_STRENGTH	1
+#endif
+#ifndef PC4_DATA_STRENGTH
+#define PC4_DATA_STRENGTH	1
+#endif
+#ifndef PC5_DATA_STRENGTH
+#define PC5_DATA_STRENGTH	1
+#endif
+#ifndef PC6_DATA_STRENGTH
+#define PC6_DATA_STRENGTH	1
+#endif
+#ifndef PC7_DATA_STRENGTH
+#define PC7_DATA_STRENGTH	1
+#endif
+#ifndef PC0_DATA_OUT
+#define PC0_DATA_OUT	0
+#endif
+#ifndef PC1_DATA_OUT
+#define PC1_DATA_OUT	0
+#endif
+#ifndef PC2_DATA_OUT
+#define PC2_DATA_OUT	0
+#endif
+#ifndef PC3_DATA_OUT
+#define PC3_DATA_OUT	0
+#endif
+#ifndef PC4_DATA_OUT
+#define PC4_DATA_OUT	0
+#endif
+#ifndef PC5_DATA_OUT
+#define PC5_DATA_OUT	0
+#endif
+#ifndef PC6_DATA_OUT
+#define PC6_DATA_OUT	0
+#endif
+#ifndef PC7_DATA_OUT
+#define PC7_DATA_OUT	0
+#endif
+#ifndef PC0_FUNC
+#define PC0_FUNC	AS_GPIO
+#endif
+#ifndef PC1_FUNC
+#define PC1_FUNC	AS_GPIO
+#endif
+#ifndef PC2_FUNC
+#define PC2_FUNC	AS_GPIO
+#endif
+#ifndef PC3_FUNC
+#define PC3_FUNC	AS_GPIO
+#endif
+#ifndef PC4_FUNC
+#define PC4_FUNC	AS_GPIO
+#endif
+#ifndef PC5_FUNC
+#define PC5_FUNC	AS_GPIO
+#endif
+#ifndef PC6_FUNC
+#define PC6_FUNC	AS_GPIO
+#endif
+#ifndef PC7_FUNC
+#define PC7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PC0
+#define PULL_WAKEUP_SRC_PC0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC1
+#define PULL_WAKEUP_SRC_PC1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC2
+#define PULL_WAKEUP_SRC_PC2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC3
+#define PULL_WAKEUP_SRC_PC3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC4
+#define PULL_WAKEUP_SRC_PC4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC5
+#define PULL_WAKEUP_SRC_PC5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC6
+#define PULL_WAKEUP_SRC_PC6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PC7
+#define PULL_WAKEUP_SRC_PC7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PD0_INPUT_ENABLE
+#define PD0_INPUT_ENABLE	0
+#endif
+#ifndef PD1_INPUT_ENABLE
+#define PD1_INPUT_ENABLE	0
+#endif
+#ifndef PD2_INPUT_ENABLE
+#define PD2_INPUT_ENABLE	0
+#endif
+#ifndef PD3_INPUT_ENABLE
+#define PD3_INPUT_ENABLE	0
+#endif
+#ifndef PD4_INPUT_ENABLE
+#define PD4_INPUT_ENABLE	0
+#endif
+#ifndef PD5_INPUT_ENABLE
+#define PD5_INPUT_ENABLE	0
+#endif
+#ifndef PD6_INPUT_ENABLE
+#define PD6_INPUT_ENABLE	0
+#endif
+#ifndef PD7_INPUT_ENABLE
+#define PD7_INPUT_ENABLE	0
+#endif
+#ifndef PD0_OUTPUT_ENABLE
+#define PD0_OUTPUT_ENABLE	0
+#endif
+#ifndef PD1_OUTPUT_ENABLE
+#define PD1_OUTPUT_ENABLE	0
+#endif
+#ifndef PD2_OUTPUT_ENABLE
+#define PD2_OUTPUT_ENABLE	0
+#endif
+#ifndef PD3_OUTPUT_ENABLE
+#define PD3_OUTPUT_ENABLE	0
+#endif
+#ifndef PD4_OUTPUT_ENABLE
+#define PD4_OUTPUT_ENABLE	0
+#endif
+#ifndef PD5_OUTPUT_ENABLE
+#define PD5_OUTPUT_ENABLE	0
+#endif
+#ifndef PD6_OUTPUT_ENABLE
+#define PD6_OUTPUT_ENABLE	0
+#endif
+#ifndef PD7_OUTPUT_ENABLE
+#define PD7_OUTPUT_ENABLE	0
+#endif
+#ifndef PD0_DATA_STRENGTH
+#define PD0_DATA_STRENGTH	1
+#endif
+#ifndef PD1_DATA_STRENGTH
+#define PD1_DATA_STRENGTH	1
+#endif
+#ifndef PD2_DATA_STRENGTH
+#define PD2_DATA_STRENGTH	1
+#endif
+#ifndef PD3_DATA_STRENGTH
+#define PD3_DATA_STRENGTH	1
+#endif
+#ifndef PD4_DATA_STRENGTH
+#define PD4_DATA_STRENGTH	1
+#endif
+#ifndef PD5_DATA_STRENGTH
+#define PD5_DATA_STRENGTH	1
+#endif
+#ifndef PD6_DATA_STRENGTH
+#define PD6_DATA_STRENGTH	1
+#endif
+#ifndef PD7_DATA_STRENGTH
+#define PD7_DATA_STRENGTH	1
+#endif
+#ifndef PD0_DATA_OUT
+#define PD0_DATA_OUT	0
+#endif
+#ifndef PD1_DATA_OUT
+#define PD1_DATA_OUT	0
+#endif
+#ifndef PD2_DATA_OUT
+#define PD2_DATA_OUT	0
+#endif
+#ifndef PD3_DATA_OUT
+#define PD3_DATA_OUT	0
+#endif
+#ifndef PD4_DATA_OUT
+#define PD4_DATA_OUT	0
+#endif
+#ifndef PD5_DATA_OUT
+#define PD5_DATA_OUT	0
+#endif
+#ifndef PD6_DATA_OUT
+#define PD6_DATA_OUT	0
+#endif
+#ifndef PD7_DATA_OUT
+#define PD7_DATA_OUT	0
+#endif
+#ifndef PD0_FUNC
+#define PD0_FUNC	AS_GPIO
+#endif
+#ifndef PD1_FUNC
+#define PD1_FUNC	AS_GPIO
+#endif
+#ifndef PD2_FUNC
+#define PD2_FUNC	AS_GPIO
+#endif
+#ifndef PD3_FUNC
+#define PD3_FUNC	AS_GPIO
+#endif
+#ifndef PD4_FUNC
+#define PD4_FUNC	AS_GPIO
+#endif
+#ifndef PD5_FUNC
+#define PD5_FUNC	AS_GPIO
+#endif
+#ifndef PD6_FUNC
+#define PD6_FUNC	AS_GPIO
+#endif
+#ifndef PD7_FUNC
+#define PD7_FUNC	AS_GPIO
+#endif
+#ifndef PULL_WAKEUP_SRC_PD0
+#define PULL_WAKEUP_SRC_PD0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD1
+#define PULL_WAKEUP_SRC_PD1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD2
+#define PULL_WAKEUP_SRC_PD2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD3
+#define PULL_WAKEUP_SRC_PD3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD4
+#define PULL_WAKEUP_SRC_PD4	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD5
+#define PULL_WAKEUP_SRC_PD5	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD6
+#define PULL_WAKEUP_SRC_PD6	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PD7
+#define PULL_WAKEUP_SRC_PD7	0
+#endif
+
+//////////////////////////////////////////////////
+#ifndef PE0_INPUT_ENABLE
+#define PE0_INPUT_ENABLE	0
+#endif
+#ifndef PE1_INPUT_ENABLE
+#define PE1_INPUT_ENABLE	0
+#endif
+#ifndef PE2_INPUT_ENABLE
+#define PE2_INPUT_ENABLE	0
+#endif
+#ifndef PE3_INPUT_ENABLE
+#define PE3_INPUT_ENABLE	0
+#endif
+#ifndef PE4_INPUT_ENABLE
+#define PE4_INPUT_ENABLE	1 //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE5_INPUT_ENABLE
+#define PE5_INPUT_ENABLE	1 //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE6_INPUT_ENABLE
+#define PE6_INPUT_ENABLE	1 //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE7_INPUT_ENABLE
+#define PE7_INPUT_ENABLE	1 //JTAG 4-WIRE FUNCTION
+#endif
+
+#ifndef PE0_OUTPUT_ENABLE
+#define PE0_OUTPUT_ENABLE	0
+#endif
+#ifndef PE1_OUTPUT_ENABLE
+#define PE1_OUTPUT_ENABLE	0
+#endif
+#ifndef PE2_OUTPUT_ENABLE
+#define PE2_OUTPUT_ENABLE	0
+#endif
+#ifndef PE3_OUTPUT_ENABLE
+#define PE3_OUTPUT_ENABLE	0
+#endif
+#ifndef PE4_OUTPUT_ENABLE
+#define PE4_OUTPUT_ENABLE	0
+#endif
+#ifndef PE5_OUTPUT_ENABLE
+#define PE5_OUTPUT_ENABLE	0
+#endif
+#ifndef PE6_OUTPUT_ENABLE
+#define PE6_OUTPUT_ENABLE	0
+#endif
+#ifndef PE7_OUTPUT_ENABLE
+#define PE7_OUTPUT_ENABLE	0
+#endif
+
+#ifndef PE0_DATA_STRENGTH
+#define PE0_DATA_STRENGTH	1
+#endif
+#ifndef PE1_DATA_STRENGTH
+#define PE1_DATA_STRENGTH	1
+#endif
+#ifndef PE2_DATA_STRENGTH
+#define PE2_DATA_STRENGTH	1
+#endif
+#ifndef PE3_DATA_STRENGTH
+#define PE3_DATA_STRENGTH	1
+#endif
+#ifndef PE4_DATA_STRENGTH
+#define PE4_DATA_STRENGTH	1
+#endif
+#ifndef PE5_DATA_STRENGTH
+#define PE5_DATA_STRENGTH	1
+#endif
+#ifndef PE6_DATA_STRENGTH
+#define PE6_DATA_STRENGTH	1
+#endif
+#ifndef PE7_DATA_STRENGTH
+#define PE7_DATA_STRENGTH	1
+#endif
+
+#ifndef PE0_DATA_OUT
+#define PE0_DATA_OUT	0
+#endif
+#ifndef PE1_DATA_OUT
+#define PE1_DATA_OUT	0
+#endif
+#ifndef PE2_DATA_OUT
+#define PE2_DATA_OUT	0
+#endif
+#ifndef PE3_DATA_OUT
+#define PE3_DATA_OUT	0
+#endif
+#ifndef PE4_DATA_OUT
+#define PE4_DATA_OUT	0
+#endif
+#ifndef PE5_DATA_OUT
+#define PE5_DATA_OUT	0
+#endif
+#ifndef PE6_DATA_OUT
+#define PE6_DATA_OUT	0
+#endif
+#ifndef PE7_DATA_OUT
+#define PE7_DATA_OUT	0
+#endif
+
+#ifndef PE0_FUNC
+#define PE0_FUNC	AS_GPIO
+#endif
+#ifndef PE1_FUNC
+#define PE1_FUNC	AS_GPIO
+#endif
+#ifndef PE2_FUNC
+#define PE2_FUNC	AS_GPIO
+#endif
+#ifndef PE3_FUNC
+#define PE3_FUNC	AS_GPIO
+#endif
+#ifndef PE4_FUNC
+#define PE4_FUNC	AS_TDI  //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE5_FUNC
+#define PE5_FUNC	AS_TDO  //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE6_FUNC
+#define PE6_FUNC	AS_TMS  //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PE7_FUNC
+#define PE7_FUNC	AS_TCK  //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PULL_WAKEUP_SRC_PE0
+#define PULL_WAKEUP_SRC_PE0	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE1
+#define PULL_WAKEUP_SRC_PE1	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE2
+#define PULL_WAKEUP_SRC_PE2	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE3
+#define PULL_WAKEUP_SRC_PE3	0
+#endif
+#ifndef PULL_WAKEUP_SRC_PE4
+#define PULL_WAKEUP_SRC_PE4	GPIO_PIN_PULLUP_10K //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PULL_WAKEUP_SRC_PE5
+#define PULL_WAKEUP_SRC_PE5	GPIO_PIN_PULLUP_10K //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PULL_WAKEUP_SRC_PE6
+#define PULL_WAKEUP_SRC_PE6	GPIO_PIN_PULLUP_10K //JTAG 4-WIRE FUNCTION
+#endif
+#ifndef PULL_WAKEUP_SRC_PE7
+#define PULL_WAKEUP_SRC_PE7	GPIO_PIN_PULLDOWN_100K //JTAG 4-WIRE FUNCTION
+#endif
+//////////////////////////////////////////////////
+#ifndef PF0_INPUT_ENABLE
+#define PF0_INPUT_ENABLE	1   //MSPI
+#endif
+#ifndef PF1_INPUT_ENABLE
+#define PF1_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PF2_INPUT_ENABLE
+#define PF2_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PF3_INPUT_ENABLE
+#define PF3_INPUT_ENABLE	1	//MSPI
+#endif
+#ifndef PF4_INPUT_ENABLE
+#define PF4_INPUT_ENABLE	1  //MSPI
+#endif
+#ifndef PF5_INPUT_ENABLE
+#define PF5_INPUT_ENABLE	1   //MSPI
+#endif
+#ifndef PF0_OUTPUT_ENABLE
+#define PF0_OUTPUT_ENABLE	0
+#endif
+#ifndef PF1_OUTPUT_ENABLE
+#define PF1_OUTPUT_ENABLE	0
+#endif
+#ifndef PF2_OUTPUT_ENABLE
+#define PF2_OUTPUT_ENABLE	0
+#endif
+#ifndef PF3_OUTPUT_ENABLE
+#define PF3_OUTPUT_ENABLE	0
+#endif
+#ifndef PF4_OUTPUT_ENABLE
+#define PF4_OUTPUT_ENABLE	0
+#endif
+#ifndef PF5_OUTPUT_ENABLE
+#define PF5_OUTPUT_ENABLE	0
+#endif
+
+#ifndef PF0_DATA_STRENGTH
+#define PF0_DATA_STRENGTH	1
+#endif
+#ifndef PF1_DATA_STRENGTH
+#define PF1_DATA_STRENGTH	1
+#endif
+#ifndef PF2_DATA_STRENGTH
+#define PF2_DATA_STRENGTH	1
+#endif
+#ifndef PF3_DATA_STRENGTH
+#define PF3_DATA_STRENGTH	1
+#endif
+#ifndef PF4_DATA_STRENGTH
+#define PF4_DATA_STRENGTH	1
+#endif
+#ifndef PF5_DATA_STRENGTH
+#define PF5_DATA_STRENGTH	1
+#endif
+
+#ifndef PF0_DATA_OUT
+#define PF0_DATA_OUT	0
+#endif
+#ifndef PF1_DATA_OUT
+#define PF1_DATA_OUT	0
+#endif
+#ifndef PF2_DATA_OUT
+#define PF2_DATA_OUT	0
+#endif
+#ifndef PF3_DATA_OUT
+#define PF3_DATA_OUT	0
+#endif
+#ifndef PF4_DATA_OUT
+#define PF4_DATA_OUT	0
+#endif
+#ifndef PF5_DATA_OUT
+#define PF5_DATA_OUT	0
+#endif
+
+#ifndef PF0_FUNC
+#define PF0_FUNC	AS_MSPI
+#endif
+#ifndef PF1_FUNC
+#define PF1_FUNC	AS_MSPI
+#endif
+#ifndef PF2_FUNC
+#define PF2_FUNC	AS_MSPI
+#endif
+#ifndef PF3_FUNC
+#define PF3_FUNC	AS_MSPI
+#endif
+#ifndef PF4_FUNC
+#define PF4_FUNC	AS_MSPI
+#endif
+#ifndef PF5_FUNC
+#define PF5_FUNC	AS_MSPI
+#endif
+
+/**
+ * @brief      This function servers to initiate pull up-down resistor of all gpio.
+ * @param[in]  none
+ * @return     none.
+ * @attention  Processing methods of unused GPIO
+ * 			   Set it to high resistance state and set it to open pull-up or pull-down resistance to
+ *             let it be in the determined state.When GPIO uses internal pull-up or pull-down resistance,
+ *             do not use pull-up or pull-down resistance on the board in the process of practical
+ *             application because it may have the risk of electric leakage .
+ */
+static inline void gpio_analog_resistance_init(void)
+{
+	//A<3:0>
+	analog_write_reg8 (0x0e,  PULL_WAKEUP_SRC_PA0 |
+						(PULL_WAKEUP_SRC_PA1<<2) |
+						(PULL_WAKEUP_SRC_PA2<<4) |
+						(PULL_WAKEUP_SRC_PA3<<6));
+	//A<7:4>
+	analog_write_reg8 (0x0f,  PULL_WAKEUP_SRC_PA4 |
+						(PULL_WAKEUP_SRC_PA5<<2) |
+						(PULL_WAKEUP_SRC_PA6<<4) |
+						(PULL_WAKEUP_SRC_PA7<<6));
+	//B<3:0>
+	analog_write_reg8 (0x10,  PULL_WAKEUP_SRC_PB0 |
+						(PULL_WAKEUP_SRC_PB1<<2) |
+						(PULL_WAKEUP_SRC_PB2<<4) |
+						(PULL_WAKEUP_SRC_PB3<<6));
+	//B<7:4>
+	analog_write_reg8 (0x11,  PULL_WAKEUP_SRC_PB4 |
+						(PULL_WAKEUP_SRC_PB5<<2) |
+						(PULL_WAKEUP_SRC_PB6<<4) |
+						(PULL_WAKEUP_SRC_PB7<<6));
+
+    //C<3:0>
+	analog_write_reg8 (0x12,  PULL_WAKEUP_SRC_PC0 |
+						(PULL_WAKEUP_SRC_PC1<<2) |
+						(PULL_WAKEUP_SRC_PC2<<4) |
+						(PULL_WAKEUP_SRC_PC3<<6));
+    //C<7:4>
+	analog_write_reg8 (0x13,  PULL_WAKEUP_SRC_PC4 |
+						(PULL_WAKEUP_SRC_PC5<<2) |
+						(PULL_WAKEUP_SRC_PC6<<4) |
+						(PULL_WAKEUP_SRC_PC7<<6));
+
+    //D<3:0>
+	analog_write_reg8 (0x14,  PULL_WAKEUP_SRC_PD0 |
+						(PULL_WAKEUP_SRC_PD1<<2) |
+						(PULL_WAKEUP_SRC_PD2<<4) |
+						(PULL_WAKEUP_SRC_PD3<<6));
+	//D<7:4>
+	analog_write_reg8 (0x15,  PULL_WAKEUP_SRC_PD4 |
+						(PULL_WAKEUP_SRC_PD5<<2) |
+						(PULL_WAKEUP_SRC_PD6<<4) |
+						(PULL_WAKEUP_SRC_PD7<<6));
+	//E<3:0>
+	analog_write_reg8 (0x16,  PULL_WAKEUP_SRC_PE0 |
+						(PULL_WAKEUP_SRC_PE1<<2) |
+						(PULL_WAKEUP_SRC_PE2<<4) |
+						(PULL_WAKEUP_SRC_PE3<<6));
+	//E<7:4>
+	analog_write_reg8 (0x17,  PULL_WAKEUP_SRC_PE4 |
+						(PULL_WAKEUP_SRC_PE5<<2) |
+						(PULL_WAKEUP_SRC_PE6<<4) |
+						(PULL_WAKEUP_SRC_PE7<<6));
+}
+
+
+_attribute_ram_code_sec_
+static inline void gpio_init(int anaRes_init_en)
+{
+	//PA group
+	reg_gpio_pa_setting1 =
+		(PA0_INPUT_ENABLE<<8) 	| (PA1_INPUT_ENABLE<<9)	| (PA2_INPUT_ENABLE<<10)	| (PA3_INPUT_ENABLE<<11) |
+		(PA4_INPUT_ENABLE<<12)	| (PA5_INPUT_ENABLE<<13)	| (PA6_INPUT_ENABLE<<14)	| (PA7_INPUT_ENABLE<<15) |
+		((PA0_OUTPUT_ENABLE?0:1)<<16)	| ((PA1_OUTPUT_ENABLE?0:1)<<17) | ((PA2_OUTPUT_ENABLE?0:1)<<18)	| ((PA3_OUTPUT_ENABLE?0:1)<<19) |
+		((PA4_OUTPUT_ENABLE?0:1)<<20)	| ((PA5_OUTPUT_ENABLE?0:1)<<21) | ((PA6_OUTPUT_ENABLE?0:1)<<22)	| ((PA7_OUTPUT_ENABLE?0:1)<<23) |
+		(PA0_DATA_OUT<<24)	| (PA1_DATA_OUT<<25)	| (PA2_DATA_OUT<<26)	| (PA3_DATA_OUT<<27) |
+		(PA4_DATA_OUT<<28)	| (PA5_DATA_OUT<<29)	| (PA6_DATA_OUT<<30)	| (PA7_DATA_OUT<<31) ;
+	reg_gpio_pa_setting2 =
+		(PA0_DATA_STRENGTH<<8)		| (PA1_DATA_STRENGTH<<9)| (PA2_DATA_STRENGTH<<10)	| (PA3_DATA_STRENGTH<<11) |
+		(PA4_DATA_STRENGTH<<12)	| (PA5_DATA_STRENGTH<<13)	| (PA6_DATA_STRENGTH<<14)	| (PA7_DATA_STRENGTH<<15) |
+		(PA0_FUNC==AS_GPIO ? BIT(16):0)	| (PA1_FUNC==AS_GPIO ? BIT(17):0)| (PA2_FUNC==AS_GPIO ? BIT(18):0)| (PA3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PA4_FUNC==AS_GPIO ? BIT(20):0)	| (PA5_FUNC==AS_GPIO ? BIT(21):0)| (PA6_FUNC==AS_GPIO ? BIT(22):0)| (PA7_FUNC==AS_GPIO ? BIT(23):0);
+
+	//PB group
+	reg_gpio_pb_setting1 =
+		(PB0_INPUT_ENABLE<<8) 	| (PB1_INPUT_ENABLE<<9)	| (PB2_INPUT_ENABLE<<10)	| (PB3_INPUT_ENABLE<<11) |
+		(PB4_INPUT_ENABLE<<12)	| (PB5_INPUT_ENABLE<<13)	| (PB6_INPUT_ENABLE<<14)	| (PB7_INPUT_ENABLE<<15) |
+		((PB0_OUTPUT_ENABLE?0:1)<<16)	| ((PB1_OUTPUT_ENABLE?0:1)<<17) | ((PB2_OUTPUT_ENABLE?0:1)<<18)	| ((PB3_OUTPUT_ENABLE?0:1)<<19) |
+		((PB4_OUTPUT_ENABLE?0:1)<<20)	| ((PB5_OUTPUT_ENABLE?0:1)<<21) | ((PB6_OUTPUT_ENABLE?0:1)<<22)	| ((PB7_OUTPUT_ENABLE?0:1)<<23) |
+		(PB0_DATA_OUT<<24)	| (PB1_DATA_OUT<<25)	| (PB2_DATA_OUT<<26)	| (PB3_DATA_OUT<<27) |
+		(PB4_DATA_OUT<<28)	| (PB5_DATA_OUT<<29)	| (PB6_DATA_OUT<<30)	| (PB7_DATA_OUT<<31) ;
+	reg_gpio_pb_setting2 =
+		(PB0_DATA_STRENGTH<<8)		| (PB1_DATA_STRENGTH<<9)| (PB2_DATA_STRENGTH<<10)	| (PB3_DATA_STRENGTH<<11) |
+		(PB4_DATA_STRENGTH<<12)	| (PB5_DATA_STRENGTH<<13)	| (PB6_DATA_STRENGTH<<14)	| (PB7_DATA_STRENGTH<<15) |
+		(PB0_FUNC==AS_GPIO ? BIT(16):0)	| (PB1_FUNC==AS_GPIO ? BIT(17):0)| (PB2_FUNC==AS_GPIO ? BIT(18):0)| (PB3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PB4_FUNC==AS_GPIO ? BIT(20):0)	| (PB5_FUNC==AS_GPIO ? BIT(21):0)| (PB6_FUNC==AS_GPIO ? BIT(22):0)| (PB7_FUNC==AS_GPIO ? BIT(23):0);
+
+	//PC group
+	//ie
+	analog_write_reg8(areg_gpio_pc_ie, 	(PC0_INPUT_ENABLE<<0) 	| (PC1_INPUT_ENABLE<<1)	| (PC2_INPUT_ENABLE<<2)	| (PC3_INPUT_ENABLE<<3) |
+									(PC4_INPUT_ENABLE<<4)	| (PC5_INPUT_ENABLE<<5) | (PC6_INPUT_ENABLE<<6)	| (PC7_INPUT_ENABLE<<7) );
+
+	//oen
+	reg_gpio_pc_oen =
+		((PC0_OUTPUT_ENABLE?0:1)<<0)	| ((PC1_OUTPUT_ENABLE?0:1)<<1) | ((PC2_OUTPUT_ENABLE?0:1)<<2)	| ((PC3_OUTPUT_ENABLE?0:1)<<3) |
+		((PC4_OUTPUT_ENABLE?0:1)<<4)	| ((PC5_OUTPUT_ENABLE?0:1)<<5) | ((PC6_OUTPUT_ENABLE?0:1)<<6)	| ((PC7_OUTPUT_ENABLE?0:1)<<7);
+	//dataO
+	reg_gpio_pc_out =
+		(PC0_DATA_OUT<<0)	| (PC1_DATA_OUT<<1)	| (PC2_DATA_OUT<<2)	| (PC3_DATA_OUT<<3) |
+		(PC4_DATA_OUT<<4)	| (PC5_DATA_OUT<<5)	| (PC6_DATA_OUT<<6)	| (PC7_DATA_OUT<<7) ;
+
+	//ds
+	analog_write_reg8(areg_gpio_pc_ds, 	(PC0_DATA_STRENGTH<<0) 	| (PC1_DATA_STRENGTH<<1)  | (PC2_DATA_STRENGTH<<2)	| (PC3_DATA_STRENGTH<<3) |
+									(PC4_DATA_STRENGTH<<4)	| (PC5_DATA_STRENGTH<<5)  | (PC6_DATA_STRENGTH<<6)	| (PC7_DATA_STRENGTH<<7) );
+
+	reg_gpio_pc_gpio =
+		(PC0_FUNC==AS_GPIO ? BIT(0):0)	| (PC1_FUNC==AS_GPIO ? BIT(1):0)| (PC2_FUNC==AS_GPIO ? BIT(2):0)| (PC3_FUNC==AS_GPIO ? BIT(3):0) |
+		(PC4_FUNC==AS_GPIO ? BIT(4):0)	| (PC5_FUNC==AS_GPIO ? BIT(5):0)| (PC6_FUNC==AS_GPIO ? BIT(6):0)| (PC7_FUNC==AS_GPIO ? BIT(7):0);
+
+	//PD group
+	//ie
+	analog_write_reg8(areg_gpio_pd_ie, 	(PD0_INPUT_ENABLE<<0) 	| (PD1_INPUT_ENABLE<<1)	| (PD2_INPUT_ENABLE<<2)	| (PD3_INPUT_ENABLE<<3) |
+									(PD4_INPUT_ENABLE<<4)	| (PD5_INPUT_ENABLE<<5) | (PD6_INPUT_ENABLE<<6)	| (PD7_INPUT_ENABLE<<7) );
+
+	//oen
+	reg_gpio_pd_oen =
+		((PD0_OUTPUT_ENABLE?0:1)<<0)	| ((PD1_OUTPUT_ENABLE?0:1)<<1) | ((PD2_OUTPUT_ENABLE?0:1)<<2)	| ((PD3_OUTPUT_ENABLE?0:1)<<3) |
+		((PD4_OUTPUT_ENABLE?0:1)<<4)	| ((PD5_OUTPUT_ENABLE?0:1)<<5) | ((PD6_OUTPUT_ENABLE?0:1)<<6)	| ((PD7_OUTPUT_ENABLE?0:1)<<7);
+	//dataO
+	reg_gpio_pd_out =
+		(PD0_DATA_OUT<<0)	| (PD1_DATA_OUT<<1)	| (PD2_DATA_OUT<<2)	| (PD3_DATA_OUT<<3) |
+		(PD4_DATA_OUT<<4)	| (PD5_DATA_OUT<<5)	| (PD6_DATA_OUT<<6)	| (PD7_DATA_OUT<<7) ;
+
+	//ds
+	analog_write_reg8(areg_gpio_pd_ds, 	(PD0_DATA_STRENGTH<<0) 	| (PD1_DATA_STRENGTH<<1)  | (PD2_DATA_STRENGTH<<2)	| (PD3_DATA_STRENGTH<<3) |
+									(PD4_DATA_STRENGTH<<4)	| (PD5_DATA_STRENGTH<<5)  | (PD6_DATA_STRENGTH<<6)	| (PD7_DATA_STRENGTH<<7) );
+
+	reg_gpio_pd_gpio =
+		(PD0_FUNC==AS_GPIO ? BIT(0):0)	| (PD1_FUNC==AS_GPIO ? BIT(1):0)| (PD2_FUNC==AS_GPIO ? BIT(2):0)| (PD3_FUNC==AS_GPIO ? BIT(3):0) |
+		(PD4_FUNC==AS_GPIO ? BIT(4):0)	| (PD5_FUNC==AS_GPIO ? BIT(5):0)| (PD6_FUNC==AS_GPIO ? BIT(6):0)| (PD7_FUNC==AS_GPIO ? BIT(7):0);
+
+	//PE group
+	reg_gpio_pe_setting1 =
+		(PE0_INPUT_ENABLE<<8) 	| (PE1_INPUT_ENABLE<<9)	| (PE2_INPUT_ENABLE<<10)	| (PE3_INPUT_ENABLE<<11) |
+		(PE4_INPUT_ENABLE<<12)	| (PE5_INPUT_ENABLE<<13)| (PE6_INPUT_ENABLE<<14)	| (PE7_INPUT_ENABLE<<15) |
+		((PE0_OUTPUT_ENABLE?0:1)<<16)	| ((PE1_OUTPUT_ENABLE?0:1)<<17) | ((PE2_OUTPUT_ENABLE?0:1)<<18)	| ((PE3_OUTPUT_ENABLE?0:1)<<19) |
+		((PE4_OUTPUT_ENABLE?0:1)<<20)	| ((PE5_OUTPUT_ENABLE?0:1)<<21) | ((PE6_OUTPUT_ENABLE?0:1)<<22)	| ((PE7_OUTPUT_ENABLE?0:1)<<23) |
+		(PE0_DATA_OUT<<24)	| (PE1_DATA_OUT<<25)	| (PE2_DATA_OUT<<26)	| (PE3_DATA_OUT<<27) |
+		(PE4_DATA_OUT<<28)	| (PE5_DATA_OUT<<29)	| (PE6_DATA_OUT<<30)	| (PE7_DATA_OUT<<31) ;
+	reg_gpio_pe_setting2 =
+		(PE0_DATA_STRENGTH<<8)	| (PE1_DATA_STRENGTH<<9)	| (PE2_DATA_STRENGTH<<10)	| (PE3_DATA_STRENGTH<<11) |
+		(PE4_DATA_STRENGTH<<12)	| (PE5_DATA_STRENGTH<<13)	| (PE6_DATA_STRENGTH<<14)	| (PE7_DATA_STRENGTH<<15) |
+		(PE0_FUNC==AS_GPIO ? BIT(16):0)	| (PE1_FUNC==AS_GPIO ? BIT(17):0)| (PE2_FUNC==AS_GPIO ? BIT(18):0)| (PE3_FUNC==AS_GPIO ? BIT(19):0) |
+		(PE4_FUNC==AS_GPIO ? BIT(20):0)	| (PE5_FUNC==AS_GPIO ? BIT(21):0)| (PE6_FUNC==AS_GPIO ? BIT(22):0)| (PE7_FUNC==AS_GPIO ? BIT(23):0);
+
+	if(anaRes_init_en)
+	{
+		gpio_analog_resistance_init();
+	}
+}
+
+#endif /* DRIVERS_GPIO_SETTING_H_ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/i2c.h
new file mode 100644
index 00000000..fe1acd74
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/i2c.h
@@ -0,0 +1,384 @@
+/********************************************************************************************************
+ * @file	i2c.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page I2C
+ *
+ *	Introduction
+ *	===============
+ *	i2c support master mode or slave mode.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: i2c.h
+ */
+
+#ifndef I2C_H
+#define I2C_H
+#include "gpio.h"
+
+#include "analog.h"
+#include "reg_include/i2c_reg.h"
+#include "dma.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+extern unsigned char i2c_slave_rx_index;
+
+/**
+ *  @brief  select pin as SDA and SCL of i2c
+ */
+typedef enum{
+	I2C_GPIO_SDA_B3		= GPIO_PB3,
+	I2C_GPIO_SDA_C2		= GPIO_PC2,
+	I2C_GPIO_SDA_E2		= GPIO_PE2,
+	I2C_GPIO_SDA_E3		= GPIO_PE3,
+}i2c_sda_pin_e;
+
+
+typedef enum{
+	I2C_GPIO_SCL_B2		= GPIO_PB2,
+	I2C_GPIO_SCL_C1		= GPIO_PC1,
+	I2C_GPIO_SCL_E0		= GPIO_PE0,
+	I2C_GPIO_SCL_E1		= GPIO_PE1,
+}i2c_scl_pin_e;
+
+
+
+typedef enum{
+	I2C_RX_BUF_MASK         =  BIT(2),
+	I2C_TX_BUF_MASK         =  BIT(3),
+	I2C_TX_DONE_MASK		=  BIT(4),
+	I2C_RX_DONE_MASK        =  BIT(5),
+}i2c_irq_mask_e;
+
+
+
+typedef enum{
+	I2C_RX_BUFF_CLR  		= BIT(6),
+	I2C_TX_BUFF_CLR         = BIT(7),
+}i2c_buff_clr_e;
+
+typedef enum{
+
+	I2C_TXDONE_STATUS          = BIT(0),
+	I2C_TX_BUF_STATUS          = BIT(1),
+	I2C_RXDONE_STATUS          = BIT(2),
+	I2C_RX_BUF_STATUS          = BIT(3),
+
+}i2c_irq_status_e;
+
+
+typedef enum{
+I2C_TX_DONE_CLR  		= BIT(4),
+}i2c_irq_clr_e;
+
+/**
+ * @brief      The function of this API is to determine whether the bus is busy.
+ * @return     1:Indicates that the bus is busy. 0:Indicates that the bus is free
+ */
+static inline _Bool i2c_master_busy(void)
+{
+    return reg_i2c_mst & FLD_I2C_MST_BUSY;
+}
+
+/**
+ * @brief      The function of this API is to Get the number of bytes in tx_buffer.
+ * @return     The actual number of bytes in tx_buffer.
+ */
+static inline unsigned char i2c_get_tx_buf_cnt(void)
+{
+   return (reg_i2c_buf_cnt & FLD_I2C_TX_BUFCNT)>>4;
+}
+
+
+/**
+ * @brief      The function of this API is to Get the number of bytes in rx_buffer.
+ * @return     The actual number of bytes in rx_buffer.
+ */
+static inline unsigned char i2c_get_rx_buf_cnt(void)
+{
+   return (reg_i2c_buf_cnt & FLD_I2C_RX_BUFCNT);
+}
+
+
+/**
+ * @brief      The function of this API is to set the number of bytes to triggered the receive interrupt.
+ *             Its default value is 4. We recommend setting it to 1 or 4.
+ * @param[in]  cnt - the interrupt trigger level.
+ * @return     none
+ */
+static inline void i2c_rx_irq_trig_cnt(unsigned char cnt)
+{
+   /*
+	  in the i2c_rx_irq_trig_cnt interface,originally first set i2c_rc_irq_trig_cnt to 0 and then assign,
+      if the rx_buff mask is opened first, when set i2c_rc_irq_trig_cnt to 0,rx_fifo is empty, an interrupt will be triggered by mistake.
+   */
+	reg_i2c_trig=(((reg_i2c_trig)&(~FLD_I2C_RX_IRQ_TRIG_LEV))|(cnt& 0x0f));
+}
+
+/**
+ * @brief      The function of this interface is equivalent to that after the user finishes calling the write or read interface, the stop signal is not sent,
+ * 			   and then the write or read command is executed again. The driver defaults that every write or read API will send a stop command at the end
+ * @param[in]  en - Input parameters.Decide whether to disable the stop function after each write or read interface
+ * @return     none
+ */
+void i2c_master_send_stop(unsigned char en);
+
+/**
+ * @brief      This function selects a pin port for I2C interface.
+ * @param[in]  sda_pin - the pin port selected as I2C sda pin port.
+ * @param[in]  scl_pin - the pin port selected as I2C scl pin port.
+ * @return     none
+ */
+void i2c_set_pin(i2c_sda_pin_e sda_pin,i2c_scl_pin_e scl_pin);
+
+
+/**
+ * @brief      This function serves to enable i2c master function.
+ * @return     none.
+ */
+void i2c_master_init(void);
+
+
+/**
+ * @brief      This function serves to enable i2c RX/TX/MASK_RX/MASK_TX  interrupt function.
+ * @param[in]  mask - to select Interrupt type.
+ * @return     none
+ */
+static inline void i2c_set_irq_mask(i2c_irq_mask_e mask)
+{
+	reg_i2c_sct0  |=  mask;
+}
+
+/**
+ * @brief      This function serves to disable i2c RX/TX/MASK_RX/MASK_TX  interrupt function.
+ * @param[in]  mask - to select Interrupt type.
+ * @return     none
+ */
+static inline void i2c_clr_irq_mask(i2c_irq_mask_e mask)
+{
+	reg_i2c_sct0  &=  (~mask);
+}
+
+
+/**
+ * @brief      This function serves to get i2c interrupt status.
+ * @return     i2c interrupt status.
+ *
+ */
+static inline unsigned char i2c_get_irq_status(i2c_irq_status_e status)
+{
+	return reg_i2c_irq_status&status;
+}
+
+/**
+ * @brief     This function is used to set the 'i2c_slave_rx_index' to 0.
+ *			  after wakeup from power-saving mode or reset i2c or clear rx_buff, you must call this function before receiving the data.
+ * @return    none.
+ */
+static inline void i2c_slave_clr_rx_index()
+{
+	i2c_slave_rx_index=0;
+}
+
+/**
+ * @brief      This function serves to clear i2c rx/tx fifo.
+ * @param[in]  clr - to select Interrupt type.
+ * @return     none
+ */
+static inline void i2c_clr_fifo(i2c_buff_clr_e clr)
+{
+	 reg_i2c_status = clr;
+	 if(I2C_RX_BUFF_CLR == clr)
+	{
+		i2c_slave_clr_rx_index();
+	}
+}
+
+/**
+ * @brief      This function serves to clear i2c irq status.
+ * @return     none
+ */
+static inline void  i2c_clr_irq_status(i2c_irq_clr_e status)
+{
+	    reg_i2c_irq_status=status;
+}
+
+/**
+ * @brief   this function set reset i2c,i2c logic  will be reset.
+ * @return    none
+ */
+static inline void i2c_reset(void)
+{
+	reg_rst0 &= ~(FLD_RST0_I2C);
+	reg_rst0 |= FLD_RST0_I2C;
+}
+
+
+/**
+ * @brief      This function serves to enable slave mode.
+ * @param[in]  id - the id of slave device.it contains write or read bit,the laster bit is write or read bit.
+ *                       ID|0x01 indicate read. ID&0xfe indicate write.
+ * @return     none
+ */
+void i2c_slave_init(unsigned char id);
+
+
+/**
+ *  @brief      The function of this API is to ensure that the data can be successfully sent out.
+ *  @param[in]  id - to set the slave ID.for kite slave ID=0x5c,for eagle slave ID=0x5a.
+ *  @param[in]  data - The data to be sent, The first three bytes can be set as the RAM address of the slave.
+ *  @param[in]  len - This length is the total length, including both the length of the slave RAM address and the length of the data to be sent.
+ *  @return     0 : the master receive NACK after sending out the id and then send stop.  1: the master sent the data successfully,(master does not detect NACK in data phase)
+ */
+unsigned char i2c_master_write(unsigned char id, unsigned char *data, unsigned char len);
+
+
+/**
+ * @brief      This function serves to read a packet of data from the specified address of slave device
+ * @param[in]  id - to set the slave ID.for kite slave ID=0x5c,for eagle slave ID=0x5a.
+ * @param[in]  data - Store the read data
+ * @param[in]  len - The total length of the data read back.
+ * @return     0 : the master receive NACK after sending out the id and then send stop.  1: the master receive the data successfully.
+ */
+unsigned char i2c_master_read(unsigned char id, unsigned char *data, unsigned char len);
+
+
+/**
+ * @brief      This function serves to write data and restart read data.
+ * @param[in]  id - to set the slave ID.for kite slave ID=0x5c,for eagle slave ID=0x5a.
+ * @param[in]  wr_data - The data to be sent, The first three bytes can be set as the RAM address of the slave.
+ * @param[in]  wr_len -  This length is the total length, including both the length of the slave RAM address and the length of the data to be sent.
+ * @param[in]  rd_data - Store the read data
+ * @param[in]  rd_len -  The total length of the data read back.
+ * @return     0 : the master receive NACK after sending out the id and then send stop.  1: the master receive the data successfully.
+ */
+unsigned char i2c_master_write_read(unsigned char id, unsigned char *wr_data, unsigned char wr_len, unsigned char *rd_data, unsigned char rd_len);
+
+/**
+ * @brief      The function of this API is just to write data to the i2c tx_fifo by DMA.
+ * @param[in]  id - to set the slave ID.for kite slave ID=0x5c,for eagle slave ID=0x5a.
+ * @param[in]  data - The data to be sent, The first three bytes represent the RAM address of the slave.
+ * @param[in]  len - This length is the total length, including both the length of the slave RAM address and the length of the data to be sent.
+ * @return     none.
+ */
+void i2c_master_write_dma(unsigned char id, unsigned char *data, unsigned char len);
+
+
+
+/**
+ * @brief      This function serves to read a packet of data from the specified address of slave device.
+ * @param[in]  id - to set the slave ID.for kite slave ID=0x5c,for eagle slave ID=0x5a.
+ * @param[in]  data - Store the read data
+ * @param[in]  len - The total length of the data read back.
+ * @return     none.
+ */
+void i2c_master_read_dma(unsigned char id, unsigned char *data, unsigned char len);
+
+
+
+
+/**
+ * @brief      This function serves to send a packet of data to master device.It will trigger after the master sends the read sequence.
+ * @param[in]  data - the pointer of tx_buff.
+ * @param[in]  len - The total length of the data .
+ * @return     none.
+ */
+void i2c_slave_set_tx_dma( unsigned char *data, unsigned char len);
+
+
+
+/**
+ * @brief      This function serves to receive a packet of data from master device,It will trigger after the master sends the write sequence.
+ * @param[in]  data - the pointer of rx_buff.
+ * @param[in]  len  - The total length of the data.
+ * @return     none.
+ */
+void i2c_slave_set_rx_dma(unsigned char *data, unsigned char len);
+
+
+/**
+ * @brief     This function serves to receive data .
+ * @param[in]  data - the data need read.
+ * @param[in]  len - The total length of the data
+ * @return    none
+ */
+void i2c_slave_read(unsigned char* data , unsigned char len );
+
+
+/**
+ * @brief     This function serves to receive uart data by byte with not DMA method.
+ * @param[in]  data - the data need send.
+ * @param[in]  len - The total length of the data.
+ * @return    none
+ */
+void i2c_slave_write(unsigned char* data , unsigned char len);
+
+
+/**
+ * @brief      This function serves to set the i2c clock frequency.The i2c clock is consistent with the system clock.
+ *             Currently, the default system clock is 48M, and the i2c clock is also 48M.
+ * @param[in]  clock - the division factor of I2C clock,
+ *             I2C frequency = System_clock / (4*DivClock).
+ * @return     none
+ */
+void i2c_set_master_clk(unsigned char clock);
+
+/**
+ * @brief     This function serves to set i2c tx_dam channel and config dma tx default.
+ * @param[in] chn: dma channel.
+ * @return    none
+ * @note      In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *            If you must do this, you must perform the following sequence:
+ *            1. dma_chn_dis(i2c_dma_tx_chn) 2.i2c_reset() 3.i2c_master_write_dma()/i2c_slave_set_tx_dma()
+ */
+void i2c_set_tx_dma_config(dma_chn_e chn);
+
+/**
+ * @brief     This function serves to set i2c rx_dam channel and config dma rx default.
+ * @param[in] chn: dma channel.
+ * @return    none
+ * @note      In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *            If you must do this, you must perform the following sequence:
+ *            1. dma_chn_dis(i2c_dma_tx_chn) 2.i2c_reset() 3.i2c_master_read_dma()/i2c_slave_set_rx_dma()
+ */
+void i2c_set_rx_dma_config(dma_chn_e chn);
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_api.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_api.h
new file mode 100644
index 00000000..e871b41e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_api.h
@@ -0,0 +1,1207 @@
+/********************************************************************************************************
+ * @file	axon_api.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+#include <stdint.h>
+#include <stdbool.h>
+
+/**
+ * axon driver functions return either a positive success value
+ * or a negative error code.
+ */
+typedef enum {
+  kAxonResultFailureInvalidAsyncMode = -16,/**< returned by AxonApiExecuteOps and AxonApiQueueOpsList if the other is busy (these are mutually exclusive) */
+  kAxonResultFailureInputOutOfRange = -15, /**< Input parameter value out of allowed range */
+  kAxonResultFailureMissingNullCoef = -14, /**< FIR requires last filter coefficient to be 0. */
+  kAxonResultFailureNullBuffer = -13,      /**< one or more required buffers is NULL */
+  kAxonResultFailureInvalidRounding = -12, /**< Rounding value specified is out of range */
+  kAxonResultFailureIBadOpHandle = -10,    /**< All internal buffers are in use. Free some operations or allocate more buffers. */
+  kAxonResultFailureNoMoreBuffers = -9,    /**< All internal buffers are in use. Free some operations or allocate more buffers. */
+  kAxonResultFailureInvalidDataWidth = -8, /**< requested data_width is not supported by the function */
+  kAxonResultFailureUnalignedBuffer = -7,  /**< One or more buffers do not meet alignment requirements for the requested data_width  */
+  kAxonResultFailureUnsupportedHw = -6,    /**< axon driverhardware version is unsupported */
+  kAxonResultFailureHwError = -5,          /**< error within axon hardware */
+  kAxonResultFailureBadHandle = -4,        /**< Unable to acquire the mutex to access the Axon */
+  kAxonResultFailureMutexFailed = -3,      /**< Unable to acquire the mutex to access the Axon */
+  kAxonResultFailureInvalidLength = -2,    /**< length provided in the input struct was invalid */
+  kAxonResultFailure = -1,                 /**< generic failure code */
+  kAxonResultSuccess = 0,                  /**< success */
+  kAxonResultNotFinished = 1,              /**< An async operation hasn't completed */
+  kAxonResultFailureOverflow = 2,          /**< HW overflow occurs, give a warning */
+} AxonResultEnum;
+
+typedef enum {
+  kAxonBoolFalse,
+  kAxonBoolTrue
+} AxonBoolEnum;
+
+/*
+ * Enum for asynchronous modes of operation that is supplied to the discrete and
+ * batch operation APIs.
+ * The two synchronous modes are kAxonAsyncModeSynchronous and kAxonAsyncModeSyncWithWfi. In either of these
+ * two modes the function will return after the operation has completed (ie, blocking mode).
+ * kAxonAsyncModeSynchronous:
+ * use the CPU to poll status bits
+ */
+typedef enum {
+  kAxonAsyncModeSynchronous, /**< Synchronous mode w/ software polling of hardware status without sleeping. Axon interrupts are disabled. */
+  kAxonAsyncModeAsynchronous, /**< Asynchronous mode. Axon interrupts are enabled. */
+  kAxonAsyncModeSyncWithWfi, /**< Synchronous mode, but driver invokes AxonHostWfi() to allow processor to sleep. Axon interrupts are enabled.*/
+} AxonAsyncModeEnum;
+
+
+
+/*
+ * Data width enum and packing
+ * Packing results in data elements being stored in less memory, but also impacts buffer alignment.
+ * See comments for each value.
+ */
+typedef enum {
+  kAxonDataWidth24 = 0, /**< data elements are 24bits wide, aligned to 32bits regardless of packing */
+  kAxonDataWidth16,     /**< data elements are 16bits wide, buffer must be aligned to 8 bytes and data elements aligned to 16bits with packing enabled */
+  kAxonDataWidth12,     /**< data elements are 12bits wide,  buffer must be aligned to 8 bytes and data elements aligned to 16bits with packing enabled */
+  kAxonDataWidth8,      /**< data elements are 8bits wide,  buffer must be aligned to 16 bytes and data elements aligned to 16bits with packing enabled */
+  kAxonDataWidthCount = 0x3,
+  kAxonDataWidthMask = 0x3,
+  kAxonDataWidth16to24 = kAxonDataWidth24 | (kAxonDataWidth16<<2),
+  kAxonDataWidth12to24 = kAxonDataWidth24 | (kAxonDataWidth12<<2),
+  kAxonDataWidth8to24 = kAxonDataWidth24 | (kAxonDataWidth8<<2),
+  kAxonDataWidth8to16 = kAxonDataWidth16 | (kAxonDataWidth8<<2),
+  kAxonDataWidth8to12 = kAxonDataWidth12 | (kAxonDataWidth8<<2),
+  kAxonDataWidthNoExt = 0,
+}AxonDataWidthEnum;
+
+typedef enum {
+  kAxonDataPackingDisabled, /**< data elements aligned to 32bits regardless of data width. buffers also aligned to 4bytes */
+  kAxonDataPackingEnabled /**< data element alignment and buffer alignment requirements are specific to the data width */
+} AxonDataPackEnum;
+
+/**
+ * Axon activation functions. These non-linearities are
+ * applied to the output of an operation.
+ * They can also be applied as an explicit operation.
+ */
+typedef enum {
+  kAxonAfDisabled, /**< No activation function is run on the output */
+  kAxonAfRelu,     /**< Relu function is run on the output */
+  kAxonAfSigmoid,  /**< Sigmoid is run on the output */
+  kAxonAfTanh,     /**< Tanh is run on the output */
+  kAxonAfQuantSigmoid, /**< adds .5 to the number then clamps between 0 & 1 */
+} AxonAfEnum;
+/**
+ * Output Rounding
+ * Rounding will shift the output values by the number of bits
+ * specified, then add 1 if the shifted MSB is a 1.
+ */
+typedef enum {
+  kAxonRoundingNone = 0,  /**< numbers are not rounded   */
+  kAxonRoundingMax = 32 /**< Maximum supported rounding value */
+} AxonRoundingEnum;
+
+/*
+ * Buffer stepping
+ * Axon can be configured to step over elements in a vector. This is useful
+ * in cases where vectors are interleaved in the same array (stereo audio for example).
+ */
+typedef enum {
+  kAxonStride0 = 0, /**< iterate over the same data element (effectively a scalar) */
+  kAxonStride1 = 1, /**< data elements are in adjacent indexes in vector */
+  kAxonStride2 = 2, /**< data elements are in every other index in vector */
+  kAxonStrideEnumCount /**< number of items in enum, used for range checking of input */
+} AxonStrideEnum;
+/**
+ * Generic input structure for Axon functions.
+ * Not all fields are used by all functions; see function comments
+ * for usage.
+ */
+typedef struct {
+  AxonDataWidthEnum data_width; /**< width (in bits) of all data used/produced by the function */
+  AxonDataPackEnum  data_packing;    /**< indicates if data is packed or not */
+  AxonRoundingEnum  output_rounding; /**< level of rounding applied to the output */
+  AxonAfEnum        output_af;       /**< Specifies which (if any) activation function to apply to the output. */
+  AxonStrideEnum x_stride;           /**< spacing of input elements in vector. */
+  AxonStrideEnum y_stride;           /**< spacing of input elements in vector. */
+  AxonStrideEnum q_stride;           /**< spacing of output elements in vector. */
+  uint16_t length;        /**< number of elements in the x vector. Other vectors may be of this size depending on the function being called */
+  uint16_t y_length;      /**< number of elements in the y vector. Only used on functions were y vector length is allowed to be different from the x vector. */
+  const int32_t *x_in;         /**< X input vector address */
+  const int32_t *y_in;         /**< Y input vector address */
+  int32_t a_in;         /**< A input scalar value */
+  int32_t b_in;         /**< B input scalar value */
+  int32_t *q_out;        /**< Q output vector address */
+} AxonInputStruct;
+
+/**
+ * AxonOpHandles are used to track pre-defined axon operations. The user has the choice of defining and
+ * executing an axon operation immediately, or defining the operation one time and referencing it multiple times
+ * in the future.
+ *
+ * Defining the operation and referencing it in future execution sequences has the advantages of being more
+ * efficient and allowing multiple operations to execute sequentially with little to no software intervention.
+ */
+typedef void *AxonOpHandle;
+
+/**
+ * Used for queued operations mode. In this mode,
+ * Multiple operation lists can be queued up, each with a distinct
+ * callback function. The callback function will only be invoked when the
+ * command list is completed.
+ * Axon interrupts will be processed in the interrupt context; AxonHostInterruptNotification() will not be invoked.
+ */
+typedef struct AxonMgrQueuedOpsStruct{
+  AxonOpHandle *op_handle_list;        /**< pointer to the list of op handles to execute */
+  uint8_t op_handle_count;             /**< number of op handles in op_handle_list */
+  uint8_t resvd[3];                    /**< preserve 32bit alignment even if packed structures are enabled */
+  void *callback_context;              /**< caller-provided pointer that is provided in the callback function. */
+  void (*callback_function)(AxonResultEnum result, void *callback_context);  /**< caller-provided function to be invoked when the operation list is completed */
+  struct AxonMgrQueuedOpsStruct *next;
+}AxonMgrQueuedOpsStruct;
+
+
+/**
+ * Calculates an FFT, q_out=FFT(x_in)
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ * @param axon_input populated by the caller with the input and output vector size and locations.
+ *   axon_input->data_width Must be kAxonDataWidth24
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the vector. Must be 2^n, where n is in [5..9] (ie, 32, 64,...256,512)
+ *   axon_input->x_in   Complex, 24bit input vector aligned on 32bit boundaries.
+ *                     The real component "r" of element number "n" Xrn is followed by the imaginary component Xin.
+ *                     followed by the imaginary component such that the indices of the real component (r)
+ *                     Xrn = x_in[n*2].
+ *                     Xin = x_in[n*2+1].
+ *   axon_input->q_out  Complex, 24bit output vector of the same format and size as x_in
+ *   axon_input->x_stride  spacing of input elements in vector.
+ *   axon_input->q_stride  spacing of output elements in vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *  The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ *  @param async_mode
+ *  See AxonAsyncModeEnum for options.
+ */
+AxonResultEnum AxonApiFft(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiFft.
+
+ * @param axon_handle
+ *   see @AxonApiFft
+ *
+ * @param axon_input
+ *   see @AxonApiFft
+
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpFft(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+
+/**
+ * "FIR"=>"Finite Impulse Response" filter, Calculates an FIR, q_out=FIR(x_in, y_in)
+ * @param axon_input populated by the caller with the input and output vector size and locations.
+ *   axon_input->data_width Can be any value in AxonDataWidthEnum. Note that any width other than kAxonDataWidth24 requires
+ *                         that x_in, y_in, and q_out all be 16byte aligned.
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 4, and be at least 4 greater than y_length
+ *   axon_input->y_length  Number of elements in the y vector (filter coefficients). Must be a at least 12, a multiple of 4 and the last coefficient must be 0.
+ *                         0 pad to 12 if less than 12 coefficients are needed.
+ *   axon_input->x_in   Samples input to the filter. 24bit values aligned on 32bit boundaries.
+ *   axon_input->y_in   Filter coefficients, 24bit aligned on 32bit boundaries.
+ *   axon_input->q_out  24bit output vector sized to length-y_length
+ *   axon_input->x_stride  spacing of input elements in input vector.
+ *   axon_input->y_stride  spacing of input elements in filter tap vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ *   Remaining axon_input fields are unused.
+ */
+AxonResultEnum AxonApiFir(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiFir.
+
+ * @param axon_handle
+ *   see @AxonApiFir
+ *
+ * @param axon_input
+ *   see @AxonApiFir
+
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpFir(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+
+/**
+ * "Sqrt"=> "Square Root" Calculates a the square root of vector X, q_out=SQRT(x_in)
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vector size and locations.
+ *   axon_input->data_width must be kAxonDataWidth24.
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector. 24bit integer values aligned on 32bit boundaries
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ *   Remaining axon_input fields are unused.
+ */
+AxonResultEnum AxonApiSqrt(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiSqrt.
+
+ * @param axon_handle
+ *   see @AxonApiSqrt
+ *
+ * @param axon_input
+ *   see @AxonApiSqrt
+
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpSqrt(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+
+/**
+ * Calculates the natural log of a vector, q_out=logn(x_in)
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vector size and locations.
+ *   axon_input->data_width must be kAxonDataWidth24.
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector. 24bit values aligned on 32bit boundaries in Q11.12 format (ie, fixed point)
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ *   Remaining axon_input fields are unused.
+ */
+AxonResultEnum AxonApiLogn(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiLogn.
+ *
+ * @param axon_handle
+ *   see @AxonApiLogn
+ *
+ * @param axon_input
+ *   see @AxonApiLogn
+ *
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpLogn(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * Raises "e" to the power of vector X, q_out=e^(x_in). Values must be positive. Negative values will have unpredicatable results.
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vector size and locations.
+ *   axon_input->data_width must be kAxonDataWidth24.
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector. 24bit values aligned on 32bit boundaries in Q11.12 format (ie, fixed point)
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ *   Remaining axon_input fields are unused.
+ */
+AxonResultEnum AxonApiExp(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiExp.
+ * @param axon_input
+ *   see @AxonApiExp
+ * @param axon_handle
+ *   see @AxonApiExp
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpExp(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+
+/**
+ * "Xpy"=>"X plus Y" Adds vectors X and Y.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXpy(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXpy.
+ * @param axon_input
+ *   see @AxonApiXpy
+ * @param axon_handle
+ *   see @AxonApiXpy
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXpy(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Xmy"=>"X minus Y" Subtracts vector Y from vector X.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXmy(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXmy.
+ * @param axon_input
+ *   see @AxonApiXmy
+ * @param axon_handle
+ *   see @AxonApiXmy
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXmy(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Xspys"=>"X Squared Plus Y Squared" adds the square of vector Y to the square of vector X.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXspys(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXspys.
+ * @param axon_input
+ *   see @AxonApiXspys
+ * @param axon_handle
+ *   see @AxonApiXspys
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXspys(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Xsmys"=>"X Squared Minus Y Squared" subtracts the square of vector Y to the square of vector X.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXsmys(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXsmys.
+ * @param axon_input
+ *   see @AxonApiXsmys
+ * @param axon_handle
+ *   see @AxonApiXsmys
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXsmys(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Xty"=>"X Times Y" multiplies vector Y with vector X.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXty(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXty.
+ * @param axon_input
+ *   see @AxonApiXty
+ * @param axon_handle
+ *   see @AxonApiXty
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXty(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Axpby"=>"aX+bY" Sum product of scalar "a" and X with product of scalar "b" and Y.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->a_in   a scalar value
+ *   axon_input->b_in   b scalar value
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpby(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * "AxpbyPointer"=>"aX+bY" Sum product of scalar "a" and X with product of scalar "b" and Y.
+ * @param axon_handle
+ *   see @AxonApiAxpby
+ * @param axon_input
+ *    see @AxonApiAxpby with only the following changes:
+ *   axon_input->a_in   pointer to "a" scalar value
+ *   axon_input->b_in   pointer to "b" scalar value
+ * @param async
+ *    see @AxonApiAxpby
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpbyPointer(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAxpby.
+ * @param axon_input
+ *   see @AxonApiAxpby
+ * @param axon_handle
+ *   see @AxonApiAxpby
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAxpby(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * Defines an operation for AxonApiAxpbyPointer.
+ * @param axon_input
+ *   see @AxonApiAxpby with only the following changes:
+ *   axon_input->a_in   pointer to "a" scalar value
+ *   axon_input->b_in   pointer to "b" scalar value
+ * @param axon_handle
+ *   see @AxonApiAxpby
+ * @param axon_op_handle
+ *   see @AxonApiDefineOpAxpby
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAxpbyPointer(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Axpb"=>"aX+b" Sum product of scalar "a" and X with scalar "b".
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->a_in   a scalar value
+ *   axon_input->b_in   b scalar value
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpb(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * "AxpbPointer"=>"aX+b" Sum product of scalar "a" and X with scalar "b".
+ * @param axon_handle
+ *   see @AxonApiAxpb
+ * @param axon_input
+ *   see @AxonApiAxpb with only the following changes:
+ *   axon_input->a_in   pointer to "a" scalar value
+ *   axon_input->b_in   pointer to "b" scalar value
+ * @param async
+ *   see @AxonApiAxpb
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpbPointer(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAxpb.
+ * @param axon_input
+ *   see @AxonApiAxpb
+ * @param axon_handle
+ *   see @AxonApiAxpb
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAxpb(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+/**
+ * Defines an operation for AxonApiAxpbPointer.
+ * @param axon_input
+ *   see @AxonApiAxpb with only the following changes:
+ *   axon_input->a_in   pointer to "a" scalar value
+ *   axon_input->b_in   pointer to "b" scalar value
+ * @param axon_handle
+ *   see @AxonApiAxpb
+ * @param axon_op_handle
+ *   see @AxonApiDefineOpAxpb
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)*/
+AxonResultEnum AxonApiDefineOpAxpbPointer(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+
+/**
+ * "Axpby"=>"aX+bY" Sum product of scalar "a" and X with product of scalar "b" and Y.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, same format as x_in.
+ *   axon_input->a_in   a scalar value
+ *   axon_input->b_in   b scalar value
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpby(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAxpby.
+ * @param axon_input
+ *   see @AxonApiAxpby
+ * @param axon_handle
+ *   see @AxonApiAxpby
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAxpby(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Axpb"=>"aX+b" Sum product of scalar "a" and X with scalar "b".
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->a_in   a scalar value
+ *   axon_input->b_in   b scalar value
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->y_stride  spacing of input elements in input Y vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAxpb(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAxpb.
+ * @param axon_input
+ *   see @AxonApiAxpb
+ * @param axon_handle
+ *   see @AxonApiAxpb
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAxpb(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Xs"=>"X Squared" Square the elements of vector X
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiXs(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiXs.
+ * @param axon_input
+ *   see @AxonApiXs
+ * @param axon_handle
+ *   see @AxonApiXs
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpXs(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Acorr"=>"Autocorrelation" calculate the autocorrelation to the delay specified in a_in
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->output_relu If true all negative values in output will be replaced with 0.
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 4, and no greater than 1024
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->a_in   Time delay scalar to calculate Autocorrelation to.
+ *   axon_input->q_out  Buffer for generated output, same format as x_in, but only a_in elements long.
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAcorr(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAcorr.
+ * @param axon_input
+ *   see @AxonApiAcorr
+ * @param axon_handle
+ *   see @AxonApiAcorr
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ *   Note: only one autocorrelation operation can be defined at a time.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAcorr(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "L2Norm"=>"2nd norm" calculate the 2nd Norm of a vector (sum of elements squared)
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 4, and no greater than 1024
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer to int32 for generated output
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *   axon_input->q_stride  spacing of output elements in output vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiL2norm(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiL2norm.
+ * @param axon_input
+ *   see @AxonApiL2norm
+ * @param axon_handle
+ *   see @AxonApiL2norm
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpL2norm(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Acc" => "Accumulate" sums the input vector X
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 4, and no greater than 1024
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer to int32 for generated output
+ *   axon_input->x_stride  spacing of input elements in input X vector.
+ *
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiAcc(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAcc.
+ * @param axon_input
+ *   see @AxonApiAcc
+ * @param axon_handle
+ *   see @AxonApiAcc
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpAcc(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Mar" => "Multiply, Accumulate, recursive" sums the products of elements in input vector X and input vector Y
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 4, and no greater than 1024
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_in   Y input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer to int32 for generated output
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiMar(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiAcc.
+ * @param axon_input
+ *   see @AxonApiAcc
+ * @param axon_handle
+ *   see @AxonApiAcc
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpMar(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Relu" function performs max(0,X) on input vector X
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  Number of elements in the x vector (data samples). Must be a multiple of 2, at least 2, and no greater than 512
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer for generated output, same format and size as x_in. Note: can be same location as x_in (output overwrites input)
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiRelu(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+/**
+ * Defines an operation for AxonApiRelu.
+ * @param axon_input
+ *   see @AxonApiRelu
+ * @param axon_handle
+ *   see @AxonApiRelu
+ * @param axon_op_handle
+ *   User provides a pointer to an AxonOpHandle instance and this gets populated with the
+ *   operation handle that can later be supplied to AxonApiExecuteOps()
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpRelu(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * "Matrix Multiply"  Multiplies input vector X of dimensions [1, length] with an input matrix Y[length, y_length] to
+ * produce an output vector[1, y_length]
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  height(length) of x vector and width of the Y matrix.
+ *                       Must be a <= 1024
+ *                       multiple of 4 for 32 or unpacked data,
+ *                       multiple of 8 for 16/12 packed data,
+ *                       multiple of 16 for 8bit packed data
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->y_length  Number of rows in the y matrix (and length of q_out). Must be a multiple of 4, and no greater than 1024
+ *   axon_input->y_in   y input matrix, organized by rows (adjacent values in a row are located in adjacent memory locations),
+ *                      formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer for generated output, same format as x_in, sized for y_length elements. Note: can be same location as x_in (output overwrites input)
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiMatrixMult(void *axon_handle, const AxonInputStruct *axon_input, AxonAsyncModeEnum async_mode);
+
+AxonResultEnum AxonApiDefineOpMatrixMult(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/*
+ * Identical to AxonApiDefineOpMatrixMult except output is always 32 bit, regardless of input data width.
+ */
+AxonResultEnum AxonApiDefineOpMatrixMult32BitOutput(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * MemCpy  Takes axon_input x_in vector and copies to q_out. This function is a simple memcpy(), but allowing the user to define
+ * an op specifically for copying vectors allows the user to copy vectors from FLASH to RAM only when needed. This helps with memory management.
+ * The user can optionally 0 pad the output by setting y_length to the number of elements to pad w/ 0.
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance().
+ *
+ * @param axon_input populated by the caller with the input and output vectors size and locations.
+ *   axon_input->data_width must be <= kAxonDataWidth24 (all widths supported)
+ *   axon_input->data_packing Can be True or False
+ *   axon_input->output_rounding Must be <= kAxonRoundingMax
+ *   axon_input->length  height(length) of x vector and width of the Y matrix.
+ *                       Must be a <= 1024
+ *                       multiple of 4 for 32 or unpacked data,
+ *                       multiple of 8 for 16/12 packed data,
+ *                       multiple of 16 for 8bit packed data
+ *   axon_input->y_length number of elements to 0 pad the copy with.
+ *   axon_input->x_in   X input vector, formatted according data_packing & data_width.
+ *   axon_input->q_out  Buffer for generated output, same format as x_in, sized for y_length elements. Note: can be same location as x_in (output overwrites input)
+ *   Remaining axon_input fields are unused.
+ *
+ * @param async
+ *  If false, function returns after operation has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ *
+ * @return kAxonResultSuccess on success or a negative error code (see AxonResultEnum)
+ */
+AxonResultEnum AxonApiDefineOpMemCpy(void *axon_handle, const AxonInputStruct *axon_input, AxonOpHandle *axon_op_handle);
+
+/**
+ * Executes a sequence of pre-defined axon operations in the order they appear in ops[].
+ * Operations are defined by invoking AxonApiDefineOp<op_name>, which returns a handle to the operation.
+ * Those handles are then inserted into an array to be executed.
+ *
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance(). Note: this handle must
+ *   be the same handle that was used to define the operation.
+ * @param op_count Number of operations populated in ops[] to be executed.
+ * @param ops[]    List of operation handles to execute.
+ *
+ * @param async
+ *  If false, function returns after operation(s) has completed.
+ *  If true, function returns immediately and AxonHostInterruptNotification will be invoked when the operation has completed.
+ *   The user then invokes AxonApiGetAsyncResult to determine the outcome of the operation.
+ */
+AxonResultEnum AxonApiExecuteOps(void *axon_handle, uint32_t op_count, AxonOpHandle ops[], AxonAsyncModeEnum async_mode);
+
+
+/**
+ * Queries the outcome of the most recently completed asynchronous operation.
+ * @param axon_handle
+ *   Handle to a physical axon instance instantiated via AxonInitInstance(). Note: this handle must
+ *   be the same handle that was used to define the operation.
+ */
+AxonResultEnum AxonApiGetAsyncResult(void *axon_handle);
+
+/**
+ * Frees up one or more op handles so they can be assigned to new operations.
+ */
+AxonResultEnum AxonApiFreeOpHandles(void *axon_handle, uint32_t op_count, AxonOpHandle ops[]);
+
+/**
+ * Adds a list of operations to the queue to be executed at the next opportunity.
+ * Operates exclusively in async mode. Using the function allows new operation lists to be
+ * added to the queue while others are still active.
+ * In comparison, AxonApiExecuteOps() must be fully completed before it can be invoked again.
+ */
+AxonResultEnum AxonApiQueueOpsList(void *axon_handle, AxonMgrQueuedOpsStruct *ops_info);
+
+
+/**
+ * Does nothing except force the library to be included in the final elf in case the there
+ * are no direct dependencies on the driver by the application (ie, dependendencies are indirect 
+ * via librarries).
+ * Invoking this function will simply return true.
+ */
+AxonResultEnum AxonNop();
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_dep.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_dep.h
new file mode 100644
index 00000000..3bd7083a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/axon/axon_dep.h
@@ -0,0 +1,185 @@
+/********************************************************************************************************
+ * @file	axon_dep.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#include <stdint.h>
+#include <stdbool.h>
+#include "axon_api.h"
+
+#pragma once
+
+/**
+ * Internal buffer required by axon driver, 1 for each defined operation.
+ * Minimum size to support discrete operations is 1. Each additional buffer supports a single predefined
+ * operation (for batch mode).
+ * - Must be 16 byte aligned.
+ * - Must be allocated from retained memory.
+ */
+typedef uint32_t AxonInternalBuffer[24];
+
+/**
+ * Internal buffer required by the axon driver to support matrix multiplication.
+ * A minimum of 1 is required to support matrix multiplication, discrete or batch.
+ * - Must be 4 byte aligned.
+ * - Does NOT need to be in retained memory.
+ */
+typedef uint32_t AxonMatrixMultBuffer[32];
+
+/**
+ * Buffer required to support ACOR operations. Not needed if ACOR is not used.
+ * - Must be 16 byte aligned if 8 bit ACOR operations occur.
+ * - Must be 8 byte aligned if 16 bit ACOR operations occur.
+ */
+#define ACOR_BUFFER_LEN (1024)
+typedef union {
+  int32_t as32[ACOR_BUFFER_LEN];
+  int16_t as16[ACOR_BUFFER_LEN*2];
+  int8_t as8[ACOR_BUFFER_LEN*4];
+} AxonAcorrBuffer;
+
+/*
+ * Structure populated by the host before initializing the driver.
+ */
+typedef struct {
+  char * log_buffer;           /**< buffer for storing formatted log messages. If NULL, some log messages will not be formatted */
+  uint16_t log_buffer_size;    /**< size (in chars) of log_buffer. Should be 0 if log_buffer is NULL */
+  uint16_t internal_buffer_size; /**< size in AxonInternalBuffer's of internal_buffers. Must be at least 1 */
+  uint16_t matrix_mult_buffer_size; /**< size of matrix_mult_buffers. Must be at least 1 to support matrix multiply. No more than 16 are needed. */
+  uint16_t mm_line_buffer_size;          /**< size of mm_line_buffer measured in words (32-bit values)  */
+  uint32_t *base_address;      /**< base address of the axon instance's registers space */
+  AxonInternalBuffer *internal_buffers; /**< 1 or more internal buffers for axon to use. This memory must be available while axon is executing */
+  AxonAcorrBuffer *acorr_buffer; /**< needed to support acorr operation */
+  AxonMatrixMultBuffer *matrix_mult_buffer; /**< needed to support matrix multiply operation */
+  uint32_t *mm_line_buffer;       /**< buffer for holding filter rows during within matrix multiply op. Must be sized to hold at least 2 rows of the largest matrix, with each row padded out to the next aligned index */
+}AxonInstanceHostProvidedStruct;
+
+/**
+ * Other memory used internally by the driver.
+ */
+typedef uint32_t AxonDriverUseBuffer[16];
+
+
+/**
+ * Axon driver instance structure. This structure is provided to the driver and maintained by the driver.
+ * - Must be "permanent" (not a stack variable).
+ * - Must be allocated from retained memory.
+ */
+typedef struct {
+  AxonInstanceHostProvidedStruct host_provided; /**< host populates this before calling AxonInitInstance() */
+  AxonDriverUseBuffer driver_use;         /**< for internal use by the driver */
+} AxonInstanceStruct;
+
+
+
+/**
+ * Console logging function implemented by host.
+ */
+void AxonHostLog(AxonInstanceStruct *axon, char *msg);
+
+/**
+ * Function is called once per axon hardware instance on the device.
+ * axon_instance is then passed as an opaque "handle" to axon operation
+ * APIs.
+ * @param axon_instance -> populated with all the instance details.
+ */
+AxonResultEnum AxonInitInstance(AxonInstanceStruct *axon_instance);
+
+
+/**
+ * Called after power has been removed from Axon
+ */
+AxonResultEnum AxonReInitInstance(AxonInstanceStruct *axon_instance);
+
+
+/**
+ * This function is called by the host's interrupt handler to check for and handle
+ * an interrupt on one or more axon instances.
+ *
+ * This function will clear the interrupt source in Axon so it is no longer
+ * asserted to the host, and calls AxonHostInterruptNotification() if there truly is
+ * a pending interrupt on Axon.
+ *
+ * @param axon_instances -> array of axon instances to check.
+ * @param axon_instance_count -> number of elements in axon_instances[]
+ */
+AxonResultEnum AxonHandleInterrupt(AxonInstanceStruct axon_instances[], uint8_t axon_instance_count);
+
+/**
+ * This function is invoked by the axon driver's IRQ handler.
+ * The host may use this function to signal another execution context to
+ * call
+ * The host uses this function to post a message/signal to the axon driver thread
+ * for the interrupt to be handled in the kernel context.
+ */
+void AxonHostInterruptNotification(AxonInstanceStruct *axon);
+
+
+/**
+ * Host provides this function to map addresses from "cpu" space to "axon" space. In other words,
+ * a buffer address that the host provides to axon might need to be transformed so that axon
+ * can access the same memory location.
+ */
+uint32_t AxonHostTransformAddress(uint32_t from_addr);
+
+/**
+ * Host implements this function to support performance profiling.
+ */
+uint32_t AxonHostGetTime();
+
+
+/**
+ * Host implements these functions to support low-power synchronous mode.
+ * Axon driver will call this function when waiting for Axon hardware to
+ * complete an operation when performing operations in mode kAxonAsyncModeSyncWithWfi.
+ *
+ * Axon driver will invoke AxonHostDisableInterrupts() prior to AxonHostWfi(). An axon interrupt
+ * will need to wake the system from WFI(). The driver will invoke AxonHostEnableInterrupts()
+ * upon return from AxonHostWfi().  Interrupt should not be processed until AxonHostEnableInterrupts()
+ * is called.
+ *
+ * AxonHostWfi() should cause the host to enter a low power state. Note that if another event causes the
+ * host to wake from WFI, the axon driver will simply invoke it again.
+ *
+ * It is possible for AxonHostWfi() to do nothing and simply return, but this behavior is essentially the
+ * same as Synchronous mode.
+ *
+ * Axon driver will occasionally invoke AxonHostDisableInterrupts() in order to inspect a state variable
+ * that is set in the ISR, but the duration will be very short before calling AxonHostEnableInterrupts().
+ *
+ * Axon driver will not nest calls to AxonHostDisableInterrutps (ie, call it multiple times before calling
+ * AxonHostEnableInterrupts), so the host need not worry if the state upon entry was with interrupts already
+ * disabled.
+ */
+void AxonHostWfi();
+uint32_t AxonHostDisableInterrupts();
+void AxonHostRestoreInterrupts(uint32_t restore_value);
+// void AxonHostEnableInterrupts();
+/**
+ * host function for enabling axon by powering it up and providing a clock.
+ */
+void AxonHostAxonEnable(uint8_t power_on_reset);
+
+/**
+ * host function for disabling axon by powering it down and removing the clock.
+ */
+void AxonHostAxonDisable();
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/emi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/emi.h
new file mode 100644
index 00000000..0f438cd2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/emi.h
@@ -0,0 +1,150 @@
+/********************************************************************************************************
+ * @file	emi.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef  EMI_H_
+#define  EMI_H_
+
+#include "lib/include/rf.h"
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+#define EMI_ACCESS_ADDR                      0x140808
+#define EMI_ACCESS_CODE                      0x29417671
+
+/**********************************************************************************************************************
+ *                                         function declaration                                                    *
+ *********************************************************************************************************************/
+
+/**
+ * @brief      This function serves to set singletone power and channel
+ * @param[in]  power_level - the power level.
+ * @param[in]  rf_chn      - the channel.
+ * @return     none
+ */
+void rf_emi_tx_single_tone(rf_power_level_e power_level,signed char rf_chn);
+
+/**
+ * @brief      This function serves to set rx mode and channel
+ * @param[in]  mode   - mode of RF.
+ * @param[in]  rf_chn - the rx channel.
+ * @return     none
+ */
+void rf_emi_rx_setup(rf_mode_e mode,signed char rf_chn);
+
+/**
+ * @brief    This function serves to update the number of receiving packet and the RSSI
+ * @return   none
+ */
+void rf_emi_rx_loop(void);
+
+/**
+ * @brief    This function serves to stop emi/(close RF)
+ * @return   none
+ */
+void rf_emi_stop(void);
+
+/**
+ * @brief    This function serves to get the number of packets received.
+ * @return   the number of packets received.
+ */
+unsigned int rf_emi_get_rxpkt_cnt(void);
+
+/**
+ * @brief    This function serves to get the RSSI of packets received
+ * @return   the RSSI of packets received
+ */
+char rf_emi_get_rssi_avg(void);
+
+
+/**
+ * @brief      This function serves to set the CD mode correlation register
+ * @return     none
+ */
+void rf_emi_tx_continue_setup(void);
+
+/**
+ * @brief      This function serves to update the CD mode data.
+ * @param[in]  rf_mode     - mode of RF.
+ * @param[in]  power_level - power level of RF.
+ * @param[in]  rf_chn      - channel of RF.
+ * @param[in]  pkt_type    - The type of data sent.
+ * -#0:random
+ * -#1:0xf0
+ * -#2:0x55
+ * @return     none
+ */
+void rf_emi_tx_continue_update_data(rf_mode_e rf_mode,rf_power_level_e power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief      This function serves to continue to run the CD mode
+ * @return     none
+ */
+void rf_continue_mode_run(void);
+
+/**
+ * @brief      This function serves to send packets in the burst mode
+ * @param[in]  rf_mode  - mode of RF.
+ * @param[in]  pkt_type - The type of data sent.
+ * -#0:random
+ * -#1:0xf0
+ * -#2:0x55
+ * @return     none
+ */
+void rf_emi_tx_burst_loop(rf_mode_e rf_mode,unsigned char pkt_type);
+
+/**
+ * @brief      This function serves to set the burst mode
+ * @param[in]  rf_mode     - mode of RF.
+ * @param[in]  power_level - power level of RF.
+ * @param[in]  rf_chn      - channel of RF.
+ * @param[in]  pkt_type    - The type of data sent.
+ * -#0:random
+ * -#1:0xf0
+ * -#2:0x55
+ * @return     none
+ */
+void rf_emi_tx_burst_setup(rf_mode_e rf_mode,rf_power_level_e power_level,signed char rf_chn,unsigned char pkt_type);
+
+/**
+ * @brief      This function serves to generate random packets that need to be sent in burst mode
+ * @param[in] *p - the address of random packets.
+ * @param[in]  n - the number of random packets.
+ * @return     none
+ */
+void rf_phy_test_prbs9 (unsigned char *p, int n);
+
+/**
+ * @brief      This function serves to reset baseband.
+ * @return     none
+ */
+void rf_emi_reset_baseband(void);
+
+/**
+ * @brief      This function serves to generate random number.
+ * @param[in]  state - the old random number.
+ * @return     the new random number
+ */
+unsigned int emi_pn_gen(unsigned int state);
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/eccp_curve.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/eccp_curve.h
new file mode 100644
index 00000000..eac4e296
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/eccp_curve.h
@@ -0,0 +1,156 @@
+/********************************************************************************************************
+ * @file	eccp_curve.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.1 *********/
+#ifndef ECCP_CURVE_H
+#define ECCP_CURVE_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "string.h"
+
+//sample ecc curve
+#define SUPPORT_BRAINPOOLP160R1
+#define SUPPORT_SECP192R1
+#define SUPPORT_SECP224R1
+#define SUPPORT_SECP256R1
+//#define SUPPORT_SECP384R1
+//#define SUPPORT_BRAINPOOLP512R1
+//#define SUPPORT_SECP521R1
+
+
+//#define PKE_HP
+
+
+#define POINT_NOT_COMPRESSED      (0x04)
+
+
+// eccp curve struct
+#ifdef PKE_HP
+typedef struct
+{
+    unsigned int eccp_p_bitLen;        //bit length of prime p
+    unsigned int eccp_n_bitLen;        //bit length of order n
+    unsigned int *eccp_p;
+    unsigned int *eccp_p_h;
+    unsigned int *eccp_a;
+    unsigned int *eccp_b;
+    unsigned int *eccp_Gx;
+    unsigned int *eccp_Gy;
+    unsigned int *eccp_n;
+    unsigned int *eccp_n_h;
+    unsigned int *eccp_half_Gx;
+    unsigned int *eccp_half_Gy;
+} eccp_curve_t;
+#else
+typedef struct
+{
+    unsigned int eccp_p_bitLen;        //bit length of prime p
+    unsigned int eccp_n_bitLen;        //bit length of order n
+    unsigned int *eccp_p;              //prime p
+    unsigned int *eccp_p_h;
+    unsigned int *eccp_p_n1;
+    unsigned int *eccp_a;
+    unsigned int *eccp_b;
+    unsigned int *eccp_Gx;
+    unsigned int *eccp_Gy;
+    unsigned int *eccp_n;              //order of curve or point(Gx,Gy)
+    unsigned int *eccp_n_h;
+    unsigned int *eccp_n_n1;
+} eccp_curve_t;
+#endif
+
+
+
+#ifdef SUPPORT_BRAINPOOLP160R1
+extern eccp_curve_t brainpoolp160r1[1];
+#endif
+
+#ifdef SUPPORT_SECP192R1
+extern eccp_curve_t secp192r1[1];
+#endif
+
+#ifdef SUPPORT_SECP224R1
+extern eccp_curve_t secp224r1[1];
+#endif
+
+#ifdef SUPPORT_SECP256R1
+extern eccp_curve_t secp256r1[1];
+#endif
+
+#ifdef SUPPORT_SECP384R1
+extern eccp_curve_t secp384r1[1];
+#endif
+
+#ifdef SUPPORT_BRAINPOOLP512R1
+extern eccp_curve_t brainpoolp512r1[1];
+#endif
+
+#ifdef SUPPORT_SECP521R1
+extern eccp_curve_t secp521r1[1];
+#endif
+
+
+
+/********* Curve25519 struct *********/
+typedef struct
+{
+    unsigned int p_bitLen;        //bit length of prime p
+    unsigned int *p;
+    unsigned int *p_h;
+    unsigned int *p_n1;
+    unsigned int *a24;            //(A-2)/4
+    unsigned int *u;
+    unsigned int *v;
+    unsigned int *n;              //order of curve or point(Gx,Gy)
+    unsigned int *n_h;
+    unsigned int *n_n1;
+    unsigned int *h;
+} mont_curve_t;
+
+
+/********* Edward Curve 25519 struct *********/
+typedef struct
+{
+    unsigned int p_bitLen;        //bit length of prime p
+    unsigned int *p;
+    unsigned int *p_h;
+    unsigned int *p_n1;
+    unsigned int *d;
+    unsigned int *Gx;
+    unsigned int *Gy;
+    unsigned int *n;              //order of curve or point(Gx,Gy)
+    unsigned int *n_h;
+    unsigned int *n_n1;
+    unsigned int *h;
+} edward_curve_t;
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdh.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdh.h
new file mode 100644
index 00000000..5a0c7007
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdh.h
@@ -0,0 +1,66 @@
+/********************************************************************************************************
+ * @file	ecdh.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.0 *********/
+#ifndef _ECDH_H_
+#define _ECDH_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "pke.h"
+
+
+//ECDH return code
+enum ECDH_RET_CODE
+{
+	ECDH_SUCCESS = PKE_SUCCESS,
+	ECDH_POINTOR_NULL = PKE_SUCCESS+0x60,
+	ECDH_INVALID_INPUT,
+};
+
+
+//APIs
+
+/**
+ * @brief		ECDH compute key.
+ * @param[in]	curve			- ecc curve struct pointer, please make sure it is valid.
+ * @param[in]	local_prikey	- local private key, big-endian.
+ * @param[in]	peer_pubkey		- peer public key, big-endian.
+ * @param[out]	key				- output key.
+ * @param[in]	keyByteLen		- byte length of output key.
+ * @param[in]	KDF				- KDF function to get key.
+ * @Return		0(success), other(error)
+ */
+unsigned char ecdh_compute_key(eccp_curve_t *curve, unsigned char *local_prikey, unsigned char *peer_pubkey, unsigned char *key,
+		unsigned int keyByteLen, KDF_FUNC kdf);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdsa.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdsa.h
new file mode 100644
index 00000000..6bceb52e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/ecdsa.h
@@ -0,0 +1,82 @@
+/********************************************************************************************************
+ * @file	ecdsa.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.0 *********/
+#ifndef _ECDSA_H_
+#define _ECDSA_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+
+#include "pke.h"
+
+
+
+//ECDSA return code
+enum ECDSA_RET_CODE
+{
+	ECDSA_SUCCESS = PKE_SUCCESS,
+	ECDSA_POINTOR_NULL = PKE_SUCCESS+0x50,
+	ECDSA_INVALID_INPUT,
+	ECDSA_ZERO_ALL,
+	ECDSA_INTEGER_TOO_BIG,
+	ECDSA_VERIFY_FAILED,
+};
+
+
+//APIs
+
+/**
+ * @brief		Generate ECDSA Signature in octet string style.
+ * @param[in]	curve		- ecc curve struct pointer, please make sure it is valid.
+ * @param[in]	E			- hash value, big-endian.
+ * @param[in]	EByteLen	- byte length of E.
+ * @param[in]	priKey		- private key, big-endian.
+ * @param[out]	signature	- signature r and s, big-endian.
+ * @return		ECDSA_SUCCESS(success), other(error).
+ */
+unsigned char ecdsa_sign(eccp_curve_t *curve, unsigned char *E, unsigned int EByteLen, unsigned char *rand_k, unsigned char *priKey,
+				   unsigned char *signature);
+
+/**
+ * @brief		Verify ECDSA Signature in octet string style.
+ * @param[in]	curve		- ecc curve struct pointer, please make sure it is valid.
+ * @param[in]	E			- hash value, big-endian.
+ * @param[in]	EByteLen	- byte length of E.
+ * @param[in]	pubKey		- public key, big-endian.
+ * @param[in]	signature	- signature r and s, big-endian.
+ * @return		ECDSA_SUCCESS(success), other(error).
+ */
+unsigned char ecdsa_verify(eccp_curve_t *curve, unsigned char *E, unsigned int EByteLen, unsigned char *pubKey, unsigned char *signature);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke.h
new file mode 100644
index 00000000..cd3811ed
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke.h
@@ -0,0 +1,367 @@
+/********************************************************************************************************
+ * @file	pke.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.0 *********/
+#ifndef _PKE_H_
+#define _PKE_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include "reg_include/register.h"
+#include "pke_common.h"
+#include "eccp_curve.h"
+
+
+
+#ifndef NULL
+#define NULL  0
+#endif
+
+#define GET_MAX_LEN(a,b)         (((a)>(b))?(a):(b))
+#define GET_WORD_LEN(bitLen)     ((bitLen+31)/32)
+#define GET_BYTE_LEN(bitLen)     ((bitLen+7)/8)
+
+
+/********* pke microcode *********/
+#define MICROCODE_PDBL                (0x04)
+#define MICROCODE_PADD                (0x08)
+#define MICROCODE_PVER                (0x0C)
+#define MICROCODE_PMUL                (0x10)
+#define MICROCODE_MODMUL              (0x18)
+#define MICROCODE_MODINV              (0x1C)
+#define MICROCODE_MODADD              (0x20)
+#define MICROCODE_MODSUB              (0x24)
+#define MICROCODE_CAL_PRE_MON         (0x28)
+#define MICROCODE_C25519_PMUL         (0x34)
+#define MICROCODE_Ed25519_PMUL        (0x38)
+#define MICROCODE_Ed25519_PADD        (0x3C)
+
+
+/********* pke action *********/
+#define PKE_START_CALC                (0x01)
+#define PKE_EXE_CFG_DEFAULT           (0x2A)
+#define PKE_EXE_CFG_ALL_NON_MONT      (0x15)
+#define PKE_EXE_CFG_ALL_MONT          PKE_EXE_CFG_DEFAULT
+
+
+/********* oprand length *********/
+#define PKE_OPERAND_MAX_WORD_LEN      (0x08)
+#define PKE_OPERAND_MAX_BIT_LEN       (0x100)
+#define ECC_MAX_WORD_LEN              PKE_OPERAND_MAX_WORD_LEN
+#define ECC_MAX_BIT_LEN               PKE_OPERAND_MAX_BIT_LEN
+#define C25519_WORD_LEN               ECC_MAX_WORD_LEN
+#define C25519_BYTE_LEN               (C25519_WORD_LEN<<2)
+#define Ed25519_WORD_LEN              C25519_WORD_LEN
+#define Ed25519_BYTE_LEN              C25519_BYTE_LEN
+
+/*********** some PKE algorithm operand length ************/
+#define ECCP_MAX_BIT_LEN                      (256)  //ECC256
+#define ECCP_MAX_BYTE_LEN                     (GET_BYTE_LEN(ECCP_MAX_BIT_LEN))
+#define ECCP_MAX_WORD_LEN                     (GET_WORD_LEN(ECCP_MAX_BIT_LEN))
+
+
+//PKE return code
+enum PKE_RET_CODE
+{
+    PKE_SUCCESS = 0,
+	PKE_ACTIVE_STOP,
+    PKE_MOD_INV_NOT_EXIST,
+    PKE_NOT_ON_CURVE,
+    PKE_INVALID_MICRO_CODE,
+	PKE_POINTOR_NULL,
+	PKE_INVALID_INPUT,
+};
+
+
+//KDF define
+typedef void *(*KDF_FUNC)(const void *input, unsigned int byteLen, unsigned char *key, unsigned int keyByteLen);
+
+
+//API
+
+/**
+ * @brief		get rand.
+ * @param[in] 	rand	- the buffer rand.
+ * @param[in] 	byteLen	- the length of rand.
+ * @return		0:TRNG_SUCCESS,   1:TRNG_ERROR.
+ */
+unsigned char rand_get(unsigned char *rand, unsigned int byteLen);
+
+/**
+ * @brief       get real bit length of big number a of wordLen words.
+ * @param[in]   a			- the buffer a.
+ * @param[in]   wordLen		- the length of a.
+ * @return      the real bit length of big number a of wordLen words.
+ */
+unsigned int valid_bits_get(const unsigned int *a, unsigned int wordLen);
+
+/**
+ * @brief		get real word lenth of big number a of max_words words.
+ * @param[in]   a			- the buffer a.
+ * @param[in]   max_words	- the length of a.
+ * @return		get real word lenth of big number a.
+ */
+unsigned int valid_words_get(unsigned int *a, unsigned int max_words);
+
+/**
+ * @brief		reverse byte array.
+ * @param[in]   in			- need to reverse the array.
+ * @param[in]   out			- inverted array.
+ * @param[in]   byteLen		- the length of array.
+ * @return		none.
+ */
+void reverse_byte_array(unsigned char *in, unsigned char *out, unsigned int byteLen);
+
+/**
+ * @brief		compare big integer a and b.
+ * @param[in] 	a 			- value.
+ * @param[in] 	aWordLen  	- the length of a.
+ * @param[in] 	b			- value.
+ * @param[in] 	bWordLen	- the length of b.
+ * @return		0:a=b,   1:a>b,   -1: a<b.
+ */
+int big_integer_compare(unsigned int *a, unsigned int aWordLen, unsigned int *b, unsigned int bWordLen);
+
+/**
+ * @brief		This function is used to determine whether the array is all 0s.
+ * @param[in]	data	- the buffer data.
+ * @param[in]	len		- the length of data.
+ * @return		1: all 0, 0: not all 0.
+ */
+int is_mem_zero4(unsigned int a[], unsigned int wordLen);
+
+/**
+ * @brief       out = (a+b) mod modulus.
+ * @param[in]   modulus - modulus.
+ * @param[in]   a 		- integer a.
+ * @param[in]   b 		- integer b.
+ * @param[in]   wordLen - word length of modulus, a, b.
+ * @param[out]  out 	- out = a+b mod modulus.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_mod_add(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+				   unsigned int *out, unsigned int wordLen);
+
+/**
+ * @brief       out = (a-b) mod modulus.
+ * @param[in]   modulus	- input, modulus.
+ * @param[in]  	a		- input, integer a.
+ * @param[in]   b		- input, integer b.
+ * @param[in]   wordLen - input, word length of modulus, a, b.
+ * @param[out]  out		- output, out = a-b mod modulus.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_mod_sub(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+				   unsigned int *out, unsigned int wordLen);
+
+/**
+ * @brief		load the pre-calculated mont parameters H(R^2 mod modulus) and
+ * 				n1( - modulus ^(-1) mod 2^w ).
+ * @param[in] 	H 	  	- R^2 mod modulus.
+ * @param[in] 	n1 	  	- modulus ^(-1) mod 2^w, here w is 32 acutally.
+ * @param[in] 	wordLen - word length of modulus or H.
+ * @return: 	none.
+ */
+void pke_load_pre_calc_mont(unsigned int *H, unsigned int *n1, unsigned int wordLen);
+
+/**
+ * @brief		out = a*b mod modulus.
+ * @param[in] 	modulus - input, modulus.
+ * @param[in] 	a 	  	- input, integer a.
+ * @param[in] 	b 	  	- input, integer b.
+ * @param[in] 	wordLen - input, word length of modulus, a, b.
+ * @param[out] 	out 	- output, out = a*b mod modulus.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_modmul_internal(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+							unsigned int *out, unsigned int wordLen);
+
+/**
+ * @brief       out = a*b mod modulus.
+ * @param[in]   modulus	- modulus.
+ * @param[in]   a 		- integer a.
+ * @param[in]   b 		- integer b.
+ * @param[in]   wordLen	- word length of modulus, a, b.
+ * @param[out]  out		- out = a*b mod modulus.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_mod_mul(const unsigned int *modulus, const unsigned int *a, const unsigned int *b,
+				   unsigned int *out, unsigned int wordLen);
+
+/**
+ * @brief       ainv = a^(-1) mod modulus.
+ * @param[in]   modulus		- modulus.
+ * @param[in]   a 			- integer a.
+ * @param[in]   modWordLen	- word length of modulus, ainv.
+ * @param[in]   aWordLen 	- word length of integer a.
+ * @param[out]	ainv 		- ainv = a^(-1) mod modulus.
+ * @return: 	PKE_SUCCESS(success), other(inverse not exists or error).
+ */
+unsigned char pke_mod_inv(const unsigned int *modulus, const unsigned int *a, unsigned int *ainv, unsigned int modWordLen,
+				   unsigned int aWordLen);
+
+/**
+ * @brief		a = a/(2^n).
+ * @param[in]   a			- big integer a.
+ * @param[in]   aWordLen	- word length of a.
+ * @param[in]   n			- exponent of 2^n.
+ * @return		word length of a = a/(2^n).
+ * @attention:	1. make sure aWordLen is real word length of a.
+ *     			2. a may be 0, then aWordLen is 0, to make sure aWordLen-1 is available, so data
+ *        		   type of aWordLen is int32_t, not uint32_t.
+ */
+unsigned int div2n_u32(unsigned int a[], int aWordLen, unsigned int n);
+
+/**
+ * @brief		c = a - b.
+ * @param[in]   a 		- integer a.
+ * @param[in]   b 		- integer b.
+ * @param[in]   wordLen	- the length of a and b.
+ * @param[out]  c 		- integer c = a - b.
+ * @return		none.
+ */
+void sub_u32(unsigned int *a, unsigned int *b, unsigned int *c, unsigned int wordLen);
+
+/**
+ * @brief		c = a mod b.
+ * @param[in]   a 		 	- integer a.
+ * @param[in]   b 		 	- integer b.
+ * @param[in]   aWordLen	- word length of a.
+ * @param[in]   bWordLen	- word length of b.
+ * @param[in]   b_h			- parameter b_h.
+ * @param[in]   b_n1		- parameter b_n1.
+ * @param[out]  c			- c = a mod b.
+ * @return		PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_mod(unsigned int *a, unsigned int aWordLen, unsigned int *b, unsigned int *b_h, unsigned int *b_n1,
+				unsigned int bWordLen, unsigned int *c);
+
+/**
+ * @brief       ECCP curve point mul(random point), Q=[k]P.
+ * @param[in]   curve	- ECCP_CURVE struct pointer.
+ * @param[in]   k	 	- scalar.
+ * @param[in]   Px 		- x coordinate of point P.
+ * @param[in]   Py 		- y coordinate of point P.
+ * @param[out]  Qx 		- x coordinate of point Q=[k]P.
+ * @param[out]  Qy 		- y coordinate of point Q=[k]P.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_eccp_point_mul(eccp_curve_t *curve, unsigned int *k, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+
+/**
+ * @brief       ECCP curve point del point, Q=2P.
+ * @param[in]   curve	- ECCP_CURVE struct pointer.
+ * @param[in]   Px 		- x coordinate of point P.
+ * @param[in]   Py 		- y coordinate of point P.
+ * @param[out]  Qx 		- x coordinate of point Q=2P.
+ * @param[out]  Qy 		- y coordinate of point Q=2P.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_eccp_point_del(eccp_curve_t *curve, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+
+/**
+ * @brief       ECCP curve point add, Q=P1+P2.
+ * @param[in]   curve	- eccp curve struct pointer.
+ * @param[in]   P1x 	- x coordinate of point P1.
+ * @param[in]   P1y 	- y coordinate of point P1.
+ * @param[in]   P2x 	- x coordinate of point P2.
+ * @param[in]   P2y 	- y coordinate of point P2.
+ * @param[out]  Qx 		- x coordinate of point Q=P1+P2.
+ * @param[out]  Qy 		- y coordinate of point Q=P1+P2.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_eccp_point_add(eccp_curve_t *curve, unsigned int *P1x, unsigned int *P1y, unsigned int *P2x, unsigned int *P2y,
+					  unsigned int *Qx, unsigned int *Qy);
+
+//#define ECCP_POINT_DOUBLE
+#ifdef ECCP_POINT_DOUBLE
+unsigned char eccp_pointDouble(eccp_curve_t *curve, unsigned int *Px, unsigned int *Py, unsigned int *Qx, unsigned int *Qy);
+#endif
+
+/**
+ * @brief       check whether the input point P is on ECCP curve or not.
+ * @param[in]   curve	- ECCP_CURVE struct pointer.
+ * @param[in]   Px		- x coordinate of point P.
+ * @param[in]   Py		- y coordinate of point P.
+ * @return      PKE_SUCCESS(success, on the curve), other(error or not on the curve).
+ */
+unsigned char pke_eccp_point_verify(eccp_curve_t *curve, unsigned int *Px, unsigned int *Py);
+
+/**
+ * @brief		get ECCP key pair(the key pair could be used in ECDSA/ECDH).
+ * @param[in]	curve	- eccp curve struct pointer.
+ * @param[out]	priKey	- private key, big-endian.
+ * @param[out]	pubKey	- public key, big-endian.
+ * @return		PKE_SUCCESS(success), other(error).
+ */
+unsigned char eccp_getkey(eccp_curve_t *curve, unsigned char *priKey, unsigned char *pubKey);
+
+/**
+ * @brief       c25519 point mul(random point), Q=[k]P.
+ * @param[in]   curve	- c25519 curve struct pointer.
+ * @param[in]  	k		- scalar.
+ * @param[in]   Pu		- u coordinate of point P.
+ * @param[out]  Qu		- u coordinate of point Q=[k]P.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_x25519_point_mul(mont_curve_t *curve, unsigned int *k, unsigned int *Pu, unsigned int *Qu);
+
+/**
+ * @brief       edwards25519 curve point mul(random point), Q=[k]P.
+ * @param[in]   curve	- edwards25519 curve struct pointer.
+ * @param[in]  	k		- scalar.
+ * @param[in]   Px 		- x coordinate of point P.
+ * @param[in]   Py 		- y coordinate of point P.
+ * @param[out]  Qx 		- x coordinate of point Q=[k]P.
+ * @param[out]  Qy 		- y coordinate of point Q=[k]P.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_ed25519_point_mul(edward_curve_t *curve, unsigned int *k, unsigned int *Px, unsigned int *Py,
+					  unsigned int *Qx, unsigned int *Qy);
+
+/**
+ * @brief       edwards25519 point add, Q=P1+P2.
+ * @param[in]   curve	- edwards25519 curve struct pointer.
+ * @param[in]   P1x 	- x coordinate of point P1.
+ * @param[in]   P1y 	- y coordinate of point P1.
+ * @param[in]   P2x 	- x coordinate of point P2.
+ * @param[in]   P2y 	- y coordinate of point P2.
+ * @param[out]  Qx 		- x coordinate of point Qx=P1x+P2x.
+ * @param[out]  Qy 		- y coordinate of point Qy=P1y+P2y.
+ * @return      PKE_SUCCESS(success), other(error).
+ */
+unsigned char pke_ed25519_point_add(edward_curve_t *curve, unsigned int *P1x, unsigned int *P1y, unsigned int *P2x, unsigned int *P2y,
+					  unsigned int *Qx, unsigned int *Qy);
+
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_algorithm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_algorithm.h
new file mode 100644
index 00000000..c1cca1aa
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_algorithm.h
@@ -0,0 +1,33 @@
+/********************************************************************************************************
+ * @file	pke_algorithm.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "pke_common.h"
+#include "eccp_curve.h"
+#include "ecdh.h"
+#include "ecdsa.h"
+#include "x25519.h"
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_common.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_common.h
new file mode 100644
index 00000000..da87cb07
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/pke_common.h
@@ -0,0 +1,72 @@
+/********************************************************************************************************
+ * @file	pke_common.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.0 *********/
+#ifndef PKE_COMMON_H
+#define PKE_COMMON_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+//TRNG return code
+enum TRNG_RET_CODE
+{
+	TRNG_SUCCESS = 0,
+	TRNG_ERROR,
+};
+
+/**
+ * @brief       copy uint32 buffer.
+ * @param[out]	dst     - output word buffer.
+ * @param[in]   src   	- input word value.
+ * @param[in]   wordLen - word length of buffer dst or src.
+ * @return   	none.
+ */
+void uint32_copy(unsigned int *dst, unsigned int *src, unsigned int wordLen);
+
+/**
+ * @brief       	clear uint32 buffer.
+ * @param[in&out]   a   	 - word buffer a.
+ * @param[in]   	aWordLen - word length of buffer a.
+ * @return   		none.
+ */
+void uint32_clear(unsigned int *a, unsigned int wordLen);
+
+/**
+ * @brief       reverse byte order in every unsigned int word.
+ * @param[in]	in     	- input byte buffer.
+ * @param[out]  out   	- output word buffer.
+ * @param[in]   byteLen - byte length of buffer in or out.
+ * @return   	none.
+ * @caution		byteLen must be multiple of 4.
+ */
+void reverse_word(unsigned char *in, unsigned char *out, unsigned int bytelen);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/x25519.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/x25519.h
new file mode 100644
index 00000000..30542899
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pke/x25519.h
@@ -0,0 +1,87 @@
+/********************************************************************************************************
+ * @file	x25519.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/********* pke version:1.0 *********/
+#ifndef _X25519_H_
+#define _X25519_H_
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+#include "pke.h"
+
+
+
+extern mont_curve_t c25519[1];
+
+
+
+//X25519 return code
+enum {
+	X25519_SUCCESS = PKE_SUCCESS,
+	X25519_POINTOR_NULL = PKE_SUCCESS+0x70,
+	X25519_INVALID_INPUT,
+	X25519_INVALID_OUTPUT,
+};
+
+
+//APIs
+
+/**
+ * @brief		get X25519 public key from private key.
+ * @param[in]	priKey		- private key, 32 bytes, little-endian.
+ * @param[out]	pubKey		- public key, 32 bytes, little-endian.
+ * @return		X25519_SUCCESS(success), other(error).
+ */
+unsigned char x25519_get_pubkey_from_prikey(unsigned char prikey[32], unsigned char pubkey[32]);
+
+/**
+ * @brief		get x25519 random key pair.
+ * @param[out]	priKey		- private key, 32 bytes, little-endian.
+ * @param[out]	pubKey		- public key, 32 bytes, little-endian.
+ * @return		X25519_SUCCESS(success), other(error).
+ */
+unsigned char x25519_getkey(unsigned char prikey[32], unsigned char pubkey[32]);
+
+/**
+ * @brief		X25519 key agreement.
+ * @param[in]	local_prikey	- local private key, 32 bytes, little-endian.
+ * @param[in]	peer_pubkey		- peer Public key, 32 bytes, little-endian.
+ * @param[in]	keyByteLen		- byte length of output key.
+ * @param[in]	kdf				- KDF function.
+ * @param[out]	key				- derived key.
+ * @return		X25519_SUCCESS(success), other(error).
+ * @Caution		if no KDF function, please set kdf to be NULL.
+ */
+unsigned char x25519_compute_key(unsigned char local_prikey[32], unsigned char peer_pubkey[32], unsigned char *key, unsigned int keyByteLen,
+						   KDF_FUNC kdf);
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/plic.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/plic.h
new file mode 100644
index 00000000..f6867a71
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/plic.h
@@ -0,0 +1,264 @@
+/********************************************************************************************************
+ * @file	plic.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page PLIC
+ *
+ *	Introduction
+ *	===============
+ *   platform-level interrupt controller (PLIC)
+ *
+ *	API Reference
+ *	===============
+ *	Header File: plic.h
+ */
+
+#ifndef  INTERRUPT_H
+#define  INTERRUPT_H
+#include <reg_include/register.h>
+#include "core.h"
+
+#include "compiler.h"
+
+typedef struct
+{
+	unsigned char preempt_en;
+	unsigned char threshold;
+}preempt_config_t ;
+
+typedef void (*func_isr_t) (void);
+extern _attribute_data_retention_sec_ volatile unsigned char g_plic_preempt_en;
+
+typedef enum{
+	IRQ0_EXCEPTION ,
+	IRQ1_SYSTIMER,
+	IRQ2_ALG,
+	IRQ3_TIMER1,
+	IRQ4_TIMER0,
+	IRQ5_DMA,
+	IRQ6_BMC,
+	IRQ7_USB_CTRL_EP_SETUP,
+	IRQ8_USB_CTRL_EP_DATA,
+	IRQ9_USB_CTRL_EP_STATUS,
+	IRQ10_USB_CTRL_EP_SETINF,
+	IRQ11_USB_ENDPOINT,
+	IRQ12_ZB_DM,
+	IRQ13_ZB_BLE,
+	IRQ14_ZB_BT,
+	IRQ15_ZB_RT,
+	IRQ16_PWM,
+	IRQ17_PKE,
+	IRQ18_UART1,
+	IRQ19_UART0,
+	IRQ20_DFIFO,
+	IRQ21_I2C,
+	IRQ22_SPI_AHB,
+	IRQ23_SPI_APB,
+	IRQ24_USB_PWDN,
+	IRQ25_GPIO,
+	IRQ26_GPIO2RISC0,
+	IRQ27_GPIO2RISC1,
+	IRQ28_SOFT,
+
+	IRQ29_NPE_BUS0,
+	IRQ30_NPE_BUS1,
+	IRQ31_NPE_BUS2,
+	IRQ32_NPE_BUS3,
+	IRQ33_NPE_BUS4,
+
+	IRQ34_USB_250US,
+	IRQ35_USB_RESET,
+	IRQ36_NPE_BUS7,
+	IRQ37_NPE_BUS8,
+
+	IRQ42_NPE_BUS13=42,
+	IRQ43_NPE_BUS14,
+	IRQ44_NPE_BUS15,
+
+	IRQ46_NPE_BUS17=46,
+
+	IRQ50_NPE_BUS21=50,
+	IRQ51_NPE_BUS22,
+	IRQ52_NPE_BUS23,
+	IRQ53_NPE_BUS24,
+	IRQ54_NPE_BUS25,
+	IRQ55_NPE_BUS26,
+	IRQ56_NPE_BUS27,
+	IRQ57_NPE_BUS28,
+	IRQ58_NPE_BUS29,
+	IRQ59_NPE_BUS30,
+	IRQ60_NPE_BUS31,
+
+	IRQ61_NPE_COMB,
+	IRQ62_PM_TM,
+	IRQ63_EOC,
+
+} irq_source_e;
+
+typedef enum{
+	IRQ_PRI_LEV0,//Never interrupt
+	IRQ_PRI_LEV1,
+	IRQ_PRI_LEV2,
+	IRQ_PRI_LEV3,
+}irq_priority_e;
+
+
+typedef enum{
+	IRQ_PRI_NUM0,
+	IRQ_PRI_NUM1,
+	IRQ_PRI_NUM2,
+	IRQ_PRI_NUM3,
+}irq_threshold_e;
+
+/**
+ * @brief    This function serves to set plic feature.
+ * @param[in]   feature - preemptive priority interrupt feature and the vector mode.
+ * @return  none
+ */
+static inline void plic_set_feature (feature_e feature)
+{
+	reg_irq_feature = feature;//enable vectored in PLIC
+}
+
+/**
+ * @brief    This function serves to enable preemptive priority interrupt feature.
+ * @return  none
+ */
+static inline void plic_preempt_feature_en (void)
+{
+	reg_irq_feature |= FLD_FEATURE_PREEMPT_PRIORITY_INT_EN;
+	g_plic_preempt_en=1;
+}
+
+/**
+ * @brief    This function serves to enable preemptive priority interrupt feature.
+ * @return  none
+ */
+static inline void plic_preempt_feature_dis (void)
+{
+	reg_irq_feature &=(~ FLD_FEATURE_PREEMPT_PRIORITY_INT_EN);
+	g_plic_preempt_en=0;
+}
+
+
+/**
+ * @brief    This function serves to set plic pending.
+ * @param[in]  src - interrupt source.
+ * @return  none
+ */
+static inline void plic_set_pending (irq_source_e src)
+{
+	reg_irq_pending(src)=BIT(src%32);
+}
+
+/**
+ * @brief    This function serves to set Priority Threshold,Only active interrupts with priorities strictly greater than the threshold will cause interrupt.
+ * @param[in]   threshold -  threshold level.
+ * @return  none
+ */
+static inline void plic_set_threshold (irq_threshold_e threshold)
+{
+/*the priority number in the threshold Register will be saved to a preempted priority stack and the new priority number of the claimed interrupt will be written to the threshold Register.
+When the mcu sends an interrupt completion message to the PLIC (plic_interrupt_complete()), the PLIC will restore(Hardware automatic operation) the highest priority number in the preempted priority stack back to the Priority Threshold Register.
+It is possible that when hardware and software write threshold registers at the same time, there is a risk of software write failure, so turn off the global interrupt before software writes, and resume after writing*/
+	unsigned int r = core_interrupt_disable();
+	reg_irq_threshold=threshold;
+	core_restore_interrupt(r);
+}
+
+/**
+ * @brief    This function serves to set preemptive priority level,The priority value 0 is reserved to mean "never interrupt".
+ * the larger the priority value, the higher the interrupt priority.
+ * @param[in]   src- interrupt source.
+ * @param[in]   priority-  priority level.
+ * @return  none
+ */
+static inline void plic_set_priority (irq_source_e src, irq_priority_e priority)
+{
+	reg_irq_src_priority(src)=priority;
+}
+
+
+/**
+ * @brief    This function serves to enable plic interrupt source.
+ * @param[in]   src - interrupt source.
+ * @return  none
+ */
+static inline void plic_interrupt_enable(irq_source_e  src)
+{
+	reg_irq_src(src) |= BIT(src%32);
+
+}
+
+/**
+ * @brief    This function serves to disable plic interrupt source.
+ * @param[in]   src - interrupt source.
+ * @return  none
+ */
+static inline void plic_interrupt_disable(irq_source_e  src)
+{
+	reg_irq_src(src) &= (~ BIT(src%32));
+}
+
+/**
+ * @brief    This function serves to clear interrupt source has completed.
+ * @param[in] src - interrupt source.
+ * @return  none
+ */
+static inline void plic_interrupt_complete(irq_source_e  src)
+{
+	reg_irq_done = src;
+}
+
+/**
+ * @brief    This function serves to claim  interrupt.
+ * @return   it return the source id which interrupted in irq_source_e enum .
+ */
+static inline  unsigned int plic_interrupt_claim(void)
+{
+	return reg_irq_done;
+}
+
+
+
+/**
+ * @brief    This function serves to config plic when enter some function process such as flash.
+ * @param[in]   preempt_en - 1 can disturb by interrupt, 0 can't disturb by interrupt.
+ * @param[in]   threshold  - interrupt threshold.when the interrupt priority> interrupt threshold,the function process will be disturb by interrupt.
+ * @return  none
+*/
+_attribute_ram_code_sec_noinline_ unsigned int plic_enter_critical_sec(unsigned char preempt_en ,unsigned char threshold);
+
+
+
+/**
+ * @brief    This function serves to config plic when exit some function process such as flash.
+ * @param[in]   preempt_en - 1 can disturb by interrupt, 0 can disturb by interrupt.
+ * @param[in]    r         - the value of mie register to restore.
+ * @return  none
+*/
+_attribute_ram_code_sec_noinline_   void  plic_exit_critical_sec(unsigned char preempt_en ,unsigned int r);
+
+
+_attribute_ram_code_sec_ void plic_isr(func_isr_t func, irq_source_e src);
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pm.h
new file mode 100644
index 00000000..31a92dcf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/pm.h
@@ -0,0 +1,296 @@
+/********************************************************************************************************
+ * @file	pm.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include <reg_include/register.h>
+#include "compiler.h"
+#include "gpio.h"
+#include "clock.h"
+
+/********************************************************************************************************
+ *											internal
+ *******************************************************************************************************/
+
+/********************************************************************************************************
+ * 				This is currently included in the H file for compatibility with other SDKs.
+ *******************************************************************************************************/
+
+//When the watchdog comes back, the Eagle chip does not clear 0x7f[0]. To avoid this problem, this macro definition is added.
+#ifndef WDT_REBOOT_RESET_ANA7F_WORK_AROUND
+#define WDT_REBOOT_RESET_ANA7F_WORK_AROUND	1
+#endif
+
+/********************************************************************************************************
+ *											external
+ *******************************************************************************************************/
+
+
+/**
+ * @brief these analog register can store data in deepsleep mode or deepsleep with SRAM retention mode.
+ * 	      Reset these analog registers by watchdog, chip reset, RESET Pin, power cycle
+ */
+#define PM_ANA_REG_WD_CLR_BUF0 			0x38 // initial value 0xff. [Bit0] is already occupied. The customer cannot change!
+
+/**
+ * @brief analog register below can store information when MCU in deepsleep mode or deepsleep with SRAM retention mode.
+ * 	      Reset these analog registers only by power cycle
+ */
+#define PM_ANA_REG_POWER_ON_CLR_BUF0 	0x39 // initial value 0x00. [Bit0][Bit1] is already occupied. The customer cannot change!
+#define PM_ANA_REG_POWER_ON_CLR_BUF1 	0x3a // initial value 0x00
+#define PM_ANA_REG_POWER_ON_CLR_BUF2 	0x3b // initial value 0x00
+#define PM_ANA_REG_POWER_ON_CLR_BUF3 	0x3c // initial value 0x00
+#define PM_ANA_REG_POWER_ON_CLR_BUF4 	0x3d // initial value 0x00
+#define PM_ANA_REG_POWER_ON_CLR_BUF5 	0x3e // initial value 0x00
+#define PM_ANA_REG_POWER_ON_CLR_BUF6	0x3f // initial value 0x0f
+
+/**
+ * @brief	gpio wakeup level definition
+ */
+typedef enum{
+	WAKEUP_LEVEL_LOW		= 0,
+	WAKEUP_LEVEL_HIGH		= 1,
+}pm_gpio_wakeup_level_e;
+
+/**
+ * @brief	wakeup tick type definition
+ */
+typedef enum {
+	 PM_TICK_STIMER_16M		= 0,
+	 PM_TICK_32K			= 1,
+}pm_wakeup_tick_type_e;
+
+/**
+ * @brief	suspend power weather to power down definition
+ */
+typedef enum {
+	 PM_POWER_BASEBAND  	= BIT(0),	//weather to power on the BASEBAND before suspend.
+	 PM_POWER_USB  		= BIT(1),	//weather to power on the USB before suspend.
+	 PM_POWER_NPE 		= BIT(2),	//weather to power on the NPE before suspend.
+}pm_suspend_power_cfg_e;
+
+/**
+ * @brief	sleep mode.
+ */
+typedef enum {
+	//available mode for customer
+	SUSPEND_MODE						= 0x00, //The A0 version of the suspend execution process is abnormal and the program restarts.
+	DEEPSLEEP_MODE						= 0x30,	//when use deep mode pad wakeup(low or high level), if the high(low) level always in
+												//the pad, system will not enter sleep and go to below of pm API, will reboot by core_6f = 0x20
+												//deep retention also had this issue, but not to reboot.
+	DEEPSLEEP_MODE_RET_SRAM_LOW32K  	= 0x21, //for boot from sram
+	DEEPSLEEP_MODE_RET_SRAM_LOW64K  	= 0x03, //for boot from sram
+	//not available mode
+	DEEPSLEEP_RETENTION_FLAG			= 0x0F,
+}pm_sleep_mode_e;
+
+/**
+ * @brief	available wake-up source for customer
+ */
+typedef enum {
+	 PM_WAKEUP_PAD   		= BIT(3),
+	 PM_WAKEUP_CORE  		= BIT(4),
+	 PM_WAKEUP_TIMER 		= BIT(5),
+	 PM_WAKEUP_COMPARATOR 	= BIT(6),
+	 PM_WAKEUP_MDEC		 	= BIT(7),
+}pm_sleep_wakeup_src_e;
+
+/**
+ * @brief	wakeup status
+ */
+typedef enum {
+	 WAKEUP_STATUS_COMPARATOR  		= BIT(0),
+	 WAKEUP_STATUS_TIMER  			= BIT(1),
+	 WAKEUP_STATUS_CORE 			= BIT(2),
+	 WAKEUP_STATUS_PAD    			= BIT(3),
+	 WAKEUP_STATUS_MDEC    			= BIT(4),
+
+	 STATUS_GPIO_ERR_NO_ENTER_PM	= BIT(7),
+	 STATUS_ENTER_SUSPEND  			= BIT(30),
+}pm_wakeup_status_e;
+
+/**
+ * @brief	mcu status
+ * 			In order to fix the problem that reboot returns to occasional crash when hclk = 1/2cclk, after each reboot,
+ * 			it will immediately enter deep. Therefore, the user will not see the reboot status. Increase the REBOOT_DEEP
+ * 			state to indicate this process.(add by weihua.zhang, confirmed by libiao and yangbin 20201211)
+ */
+typedef enum{
+	MCU_STATUS_POWER_ON  		= BIT(0),
+	MCU_STATUS_REBOOT_BACK    	= BIT(2),	//the user will not see the reboot status.
+	MCU_STATUS_DEEPRET_BACK  	= BIT(3),
+	MCU_STATUS_DEEP_BACK		= BIT(4),
+	MCU_STATUS_REBOOT_DEEP_BACK	= BIT(5),	//reboot + deep
+}pm_mcu_status;
+
+/**
+ * @brief	early wakeup time
+ */
+typedef struct {
+	unsigned short  suspend_early_wakeup_time_us;	/**< suspend_early_wakeup_time_us = deep_ret_r_delay_us + xtal_stable_time + early_time*/
+	unsigned short  deep_ret_early_wakeup_time_us;  /**< deep_ret_early_wakeup_time_us = deep_ret_r_delay_us + early_time*/
+	unsigned short  deep_early_wakeup_time_us;		/**< deep_early_wakeup_time_us = suspend_ret_r_delay_us*/
+	unsigned short  sleep_min_time_us;				/**< sleep_min_time_us = suspend_early_wakeup_time_us + 200*/
+}pm_early_wakeup_time_us_s;
+
+/**
+ * @brief	hardware delay time
+ */
+typedef struct {
+	unsigned short  deep_r_delay_cycle ;			/**< hardware delay time ,deep_ret_r_delay_us = deep_r_delay_cycle * 1/16k */
+	unsigned short  suspend_ret_r_delay_cycle ;		/**< hardware delay time ,suspend_ret_r_delay_us = suspend_ret_r_delay_cycle * 1/16k */
+
+}pm_r_delay_cycle_s;
+
+/**
+ * @brief   deepsleep wakeup status
+ */
+typedef struct{
+	unsigned char is_pad_wakeup;
+	unsigned char wakeup_src;	//The pad pin occasionally wakes up abnormally in A0. The core wakeup flag will be incorrectly set in A0.
+	unsigned char mcu_status;
+	unsigned char rsvd;
+}pm_status_info_s;
+
+/**
+ * @brief   pm 32k rc calibration algorithm.
+ */
+typedef struct  pm_clock_drift
+{
+	unsigned int	ref_tick;
+	unsigned int	ref_tick_32k;
+	int				offset;
+	int				offset_dc;
+	int				offset_cur;
+	int				tc;
+	int				rc32;
+	int				rc32_wakeup;
+	int				rc32_rt;
+	int				s0;
+	unsigned char	calib;
+
+} pm_clock_drift_t;
+
+
+extern pm_clock_drift_t	pmcd;
+extern _attribute_aligned_(4) pm_status_info_s g_pm_status_info;
+extern _attribute_data_retention_sec_ unsigned char g_pm_vbat_v;
+
+/**
+ * @brief		This function servers to set the match value for MDEC wakeup.
+ * @param[in]	value - the MDEC match value for wakeup.
+ * @return		none.
+ */
+static inline void pm_set_mdec_value_wakeup(unsigned char value)
+{
+	analog_write_reg8(mdec_ctrl,((analog_read_reg8(mdec_ctrl) & (~0x0f)) | value));
+}
+
+/**
+ * @brief		This function serves to get deep retention flag.
+ * @return		1 deep retention, 0 deep.
+ */
+static inline unsigned char pm_get_deep_retention_flag(void)
+{
+	return !(analog_read_reg8(0x7f) & BIT(0));
+}
+
+/**
+ * @brief		This function serves to get wakeup source.
+ * @return		wakeup source.
+ */
+static inline pm_wakeup_status_e pm_get_wakeup_src(void)
+{
+	return analog_read_reg8(0x64);
+}
+
+/**
+ * @brief		This function configures a GPIO pin as the wakeup pin.
+ * @param[in]	pin	- the pin needs to be configured as wakeup pin.
+ * @param[in]	pol - the wakeup polarity of the pad pin(0: low-level wakeup, 1: high-level wakeup).
+ * @param[in]	en  - enable or disable the wakeup function for the pan pin(1: enable, 0: disable).
+ * @return		none.
+ */
+void pm_set_gpio_wakeup (gpio_pin_e pin, pm_gpio_wakeup_level_e pol, int en);
+
+/**
+ * @brief		This function configures pm wakeup time parameter.
+ * @param[in]	param - pm wakeup time parameter.
+ * @return		none.
+ */
+void pm_set_wakeup_time_param(pm_r_delay_cycle_s param);
+
+/**
+ * @brief		this function servers to wait bbpll clock lock.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void pm_wait_bbpll_done(void);
+
+/**
+ * @brief		This function serves to recover system timer.
+ * 				The code is placed in the ram code section, in order to shorten the time.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void pm_stimer_recover(void);
+
+/**
+ * @brief		This function serves to set the working mode of MCU based on 32k crystal,e.g. suspend mode, deepsleep mode, deepsleep with SRAM retention mode and shutdown mode.
+ * @param[in]	sleep_mode 			- sleep mode type select.
+ * @param[in]	wakeup_src 			- wake up source select.
+ * 		A0	   	note: The reference current values under different configurations are as followsUnit (uA):
+ * 					|	pad		|	32k rc	|	32k xtal	|	mdec	|	lpc	 	|
+ * 	deep			|	0.7		|	1.3		|	1.7			|	1.4		|	1.6		|
+ * 	deep ret 32k	|	1.8		|	2.4		|	2.8			|	2.6		|	2.8		|
+ * 	deep ret 64k	|	2.7		|	3.2		|	3.7			|	3.4		|	3.7		|
+ * 				A0 chip, the retention current will float up.
+ * @param[in]	wakeup_tick_type	- tick type select. For long timer sleep.currently only 16M is supported(PM_TICK_STIMER_16M).
+ * @param[in]	wakeup_tick			- the time of short sleep, which means MCU can sleep for less than 5 minutes.
+ * @return		indicate whether the cpu is wake up successful.
+ */
+_attribute_text_sec_ int pm_sleep_wakeup(pm_sleep_mode_e sleep_mode,  pm_sleep_wakeup_src_e wakeup_src, pm_wakeup_tick_type_e wakeup_tick_type, unsigned int  wakeup_tick);
+
+/**
+ * @brief		Calculate the offset value based on the difference of 16M tick.
+ * @param[in]	offset_tick	- the 16M tick difference between the standard clock and the expected clock.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void pm_cal_32k_rc_offset (int offset_tick);
+
+/**
+ * @brief		When 32k rc sleeps, the calibration function is initialized.
+ * @return		none.
+ */
+_attribute_ram_code_sec_noinline_ void pm_32k_rc_offset_init(void);
+
+/**
+ * @brief		This function serves to set baseband/usb/npe power on/off before suspend sleep,If power
+ * 				on this module,the suspend curent will increase;power down this module will save current,
+ * 				but you need to re-init this module after suspend wakeup.All module is power down default
+ * 				to save current.
+ * @param[in]	value - weather to power on/off the baseband/usb/npe.
+ * @param[in]	on_off - select power on or off, 0 - power off; other value - power on.
+ * @return		none.
+ */
+void pm_set_suspend_power_cfg(pm_suspend_power_cfg_e value, unsigned char on_off);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/rf.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/rf.h
new file mode 100644
index 00000000..2d3afd26
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/rf.h
@@ -0,0 +1,1157 @@
+/********************************************************************************************************
+ * @file	rf.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef     RF_H
+#define     RF_H
+
+#include "lib/include/sys.h"
+#include "gpio.h"
+
+/**********************************************************************************************************************
+ *                                         RF  global macro                                                           *
+ *********************************************************************************************************************/
+/**
+ *  @brief This define serve to calculate the DMA length of packet.
+ */
+#define 	rf_tx_packet_dma_len(rf_data_len)			(((rf_data_len)+3)/4)|(((rf_data_len) % 4)<<22)
+
+/***********************************************************FOR BLE******************************************************/
+/**
+ *  @brief Those setting of offset according to ble packet format, so this setting for ble only.
+ */
+#define 	RF_BLE_DMA_RFRX_LEN_HW_INFO					0
+#define 	RF_BLE_DMA_RFRX_OFFSET_HEADER				4
+#define 	RF_BLE_DMA_RFRX_OFFSET_RFLEN				5
+#define 	RF_BLE_DMA_RFRX_OFFSET_DATA					6
+
+/**
+ *  @brief According to the packet format find the information of packet through offset.
+ */
+#define 	rf_ble_dma_rx_offset_crc24(p)				(p[RF_BLE_DMA_RFRX_OFFSET_RFLEN]+6)  //data len:3
+#define 	rf_ble_dma_rx_offset_time_stamp(p)			(p[RF_BLE_DMA_RFRX_OFFSET_RFLEN]+9)  //data len:4
+#define 	rf_ble_dma_rx_offset_freq_offset(p)			(p[RF_BLE_DMA_RFRX_OFFSET_RFLEN]+13) //data len:2
+#define 	rf_ble_dma_rx_offset_rssi(p)				(p[RF_BLE_DMA_RFRX_OFFSET_RFLEN]+15) //data len:1, signed
+#define		rf_ble_packet_length_ok(p)					(p[5] <= reg_rf_rxtmaxlen)    			//dma_len must 4 byte aligned
+#define		rf_ble_packet_crc_ok(p)						((p[(p[5]+5 + 11)] & 0x01) == 0x0)
+
+/**
+ * @brief		This define for ble debug the effect of rx_dly.
+ * 				when this function turn on the time of rx_dly will shorten 6.3us,
+ */
+#define 	RF_RX_SHORT_MODE_EN			1//In order to debug whether the problem is caused by rx_dly.
+
+/******************************************************FOR TPLL************************************************************/
+
+/**
+ *  @brief Those setting of offset according to private tpll packet format, so this setting for ble only.
+ */
+#define 	RF_PRI_TPLL_DMA_RFRX_OFFSET_RFLEN				4
+
+/**
+ *  @brief According to the packet format find the information of packet through offset.
+ */
+
+#define 	rf_pri_tpll_dma_rx_offset_crc(p)				(p[RF_PRI_TPLL_DMA_RFRX_OFFSET_RFLEN]+5)  //data len:2
+#define 	rf_pri_tpll_dma_rx_offset_time_stamp(p)			(p[RF_PRI_TPLL_DMA_RFRX_OFFSET_RFLEN]+7)  //data len:4
+#define 	rf_pri_tpll_dma_rx_offset_freq_offset(p)		(p[RF_PRI_TPLL_DMA_RFRX_OFFSET_RFLEN]+11) //data len:2
+#define 	rf_pri_tpll_dma_rx_offset_rssi(p)				(p[RF_PRI_TPLL_DMA_RFRX_OFFSET_RFLEN]+13) //data len:1, signed
+#define     rf_pri_tpll_packet_crc_ok(p)            		((p[((p[4] & 0x3f) + 11+3)] & 0x01) == 0x00)
+
+
+/******************************************************FOR ZIGBEE************************************************************/
+
+/**
+ *  @brief Those setting of offset according to zigbee packet format, so this setting for zigbee only.
+ */
+
+#define 	RF_ZIGBEE_DMA_RFRX_OFFSET_RFLEN				4
+
+/**
+ *  @brief According to the packet format find the information of packet through offset.
+ */
+
+
+#define 	rf_zigbee_dma_rx_offset_crc(p)					(p[RF_ZIGBEE_DMA_RFRX_OFFSET_RFLEN]+3)  //data len:2
+#define 	rf_zigbee_dma_rx_offset_time_stamp(p)			(p[RF_ZIGBEE_DMA_RFRX_OFFSET_RFLEN]+5)  //data len:4
+#define 	rf_zigbee_dma_rx_offset_freq_offset(p)			(p[RF_ZIGBEE_DMA_RFRX_OFFSET_RFLEN]+9) //data len:2
+#define 	rf_zigbee_dma_rx_offset_rssi(p)				(p[RF_ZIGBEE_DMA_RFRX_OFFSET_RFLEN]+11) //data len:1, signed
+#define     rf_zigbee_packet_crc_ok(p)       			((p[(p[4]+9+3)] & 0x51) == 0x0)
+#define		rf_zigbee_get_payload_len(p)				(p[4])
+#define		rf_zigbee_packet_length_ok(p)				(1)
+/**
+ *  @brief According to different packet format find the crc check digit.
+ */
+#define     rf_pri_sb_packet_crc_ok(p)              	((p[(reg_rf_sblen & 0x3f)+4+9] & 0x01) == 0x00)
+#define     rf_hybee_packet_crc_ok(p)       			((p[(p[4]+9+3)] & 0x51) == 0x0)
+
+#define     rf_ant_packet_crc_ok(p)              	((p[(reg_rf_sblen & 0x3f)+4+9] & 0x01) == 0x00)
+
+/**********************************************************************************************************************
+ *                                       RF global data type                                                          *
+ *********************************************************************************************************************/
+
+/**
+ *  @brief  Define the mode of 3-wire PTA.
+ */
+typedef enum {
+    PTA_BLE_STATUS_TX = 0,
+	PTA_BLE_STATUS_RX = 1,
+} pta_3wire_mode_e;
+
+/**
+ *  @brief  Define the mode of 2-wire PTA.
+ */
+typedef enum {
+    PTA_BLE_PRIORITY_TX = 0,
+	PTA_BLE_PRIORITY_RX = 1,
+	PTA_BLE_PRIORITY_TRX = 2,
+} pta_2wire_mode_e;
+
+/**
+ *  @brief  Define the pin of PTA-BLE_Priority .
+ */
+typedef enum {
+	PTA_BLE_PRIORITY_PE3 = GPIO_PE3
+} pta_bleprio_pin_e;
+
+/**
+ *  @brief  Define the pin of PTA-BLE_Active .
+ */
+typedef enum {
+	PTA_BLE_ACTIVE_PE3 = GPIO_PE3
+} pta_bleactive_pin_e;
+
+/**
+ *  @brief  Define the pin of PTA-BLE_Status .
+ */
+typedef enum {
+	PTA_BLE_STATUS_PE4 = GPIO_PE4
+}  pta_blestatus_pin_e;
+
+/**
+ *  @brief  Define the pin of PTA-WIFI_Deny .
+ */
+typedef enum {
+	PTA_WLAN_DENY_PE5 = GPIO_PE5
+} pta_wlandeny_pin_e;
+
+/**
+ *  @brief  select status of rf.
+ */
+typedef enum {
+    RF_MODE_TX = 0,		/**<  Tx mode */
+    RF_MODE_RX = 1,		/**<  Rx mode */
+    RF_MODE_AUTO=2,		/**<  Auto mode */
+	RF_MODE_OFF =3		/**<  TXRX OFF mode */
+} rf_status_e;
+
+/**
+ *  @brief  select RX_CYC2LNA and TX_CYC2PA pin;
+ */
+
+typedef enum {
+	RF_RFFE_RX_PB1 = GPIO_PB1,	/**<  pb1 as rffe rx pin */
+    RF_RFFE_RX_PD6 = GPIO_PD6,	/**<  pd6 as rffe rx pin */
+    RF_RFFE_RX_PE4 = GPIO_PE4	/**<  pe4 as rffe rx pin */
+} rf_lna_rx_pin_e;
+
+
+typedef enum {
+	RF_RFFE_TX_PB0 = GPIO_PB0,	/**<  pb0 as rffe tx pin */
+	RF_RFFE_TX_PB6 = GPIO_PB6,	/**<  pb6 as rffe tx pin */
+    RF_RFFE_TX_PD7 = GPIO_PD7,	/**<  pd7 as rffe tx pin */
+    RF_RFFE_TX_PE5 = GPIO_PE5	/**<  pe5 as rffe tx pin */
+} rf_pa_tx_pin_e;
+
+/**
+ *  @brief  Define power list of RF.
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_P9p11dBm = 63,  /**<  9.1 dbm */
+	 RF_POWER_P8p57dBm  = 45, /**<  8.6 dbm */
+	 RF_POWER_P8p05dBm  = 35, /**<  8.1 dbm */
+	 RF_POWER_P7p45dBm  = 27, /**<  7.5 dbm */
+	 RF_POWER_P6p98dBm  = 23, /**<  7.0 dbm */
+	 RF_POWER_P5p68dBm  = 18, /**<  6.0 dbm */
+	 /*VANT*/
+	 RF_POWER_P4p35dBm  = BIT(7) | 63,   /**<   4.4 dbm */
+	 RF_POWER_P3p83dBm  = BIT(7) | 50,   /**<   3.8 dbm */
+	 RF_POWER_P3p25dBm  = BIT(7) | 41,   /**<   3.3 dbm */
+	 RF_POWER_P2p79dBm  = BIT(7) | 36,   /**<   2.8 dbm */
+	 RF_POWER_P2p32dBm  = BIT(7) | 32,   /**<   2.3 dbm */
+	 RF_POWER_P1p72dBm  = BIT(7) | 26,   /**<   1.7 dbm */
+	 RF_POWER_P0p80dBm  = BIT(7) | 22,   /**<   0.8 dbm */
+	 RF_POWER_P0p01dBm  = BIT(7) | 20,   /**<   0.0 dbm */
+	 RF_POWER_N0p53dBm  = BIT(7) | 18,   /**<  -0.5 dbm */
+	 RF_POWER_N1p37dBm  = BIT(7) | 16,   /**<  -1.4 dbm */
+	 RF_POWER_N2p01dBm  = BIT(7) | 14,   /**<  -2.0 dbm */
+	 RF_POWER_N3p37dBm  = BIT(7) | 12,   /**<  -3.4 dbm */
+	 RF_POWER_N4p77dBm  = BIT(7) | 10,   /**<  -4.8 dbm */
+	 RF_POWER_N6p54dBm = BIT(7) | 8,     /**<  -6.5 dbm */
+	 RF_POWER_N8p78dBm = BIT(7) | 6,     /**<  -8.8 dbm */
+	 RF_POWER_N12p06dBm = BIT(7) | 4,    /**<  -12.1 dbm */
+	 RF_POWER_N17p83dBm = BIT(7) | 2,    /**<  -17.8 dbm */
+	 RF_POWER_N23p54dBm = BIT(7) | 1,    /**<  -23.5 dbm */
+
+	 RF_POWER_N30dBm    = 0xff,          /**<  -30 dbm */
+	 RF_POWER_N50dBm    = BIT(7) | 0,    /**<  -50 dbm */
+
+} rf_power_level_e;
+
+/**
+ *  @brief  Define power index list of RF.
+ */
+typedef enum {
+	 /*VBAT*/
+	 RF_POWER_INDEX_P9p11dBm,	/**< power index of 9.1 dbm */
+	 RF_POWER_INDEX_P8p57dBm,	/**< power index of 8.6 dbm */
+	 RF_POWER_INDEX_P8p05dBm,	/**< power index of 8.1 dbm */
+	 RF_POWER_INDEX_P7p45dBm,	/**< power index of 7.5 dbm */
+	 RF_POWER_INDEX_P6p98dBm,	/**< power index of 7.0 dbm */
+	 RF_POWER_INDEX_P5p68dBm,	/**< power index of 6.0 dbm */
+	 /*VANT*/
+	 RF_POWER_INDEX_P4p35dBm,	/**< power index of 4.4 dbm */
+	 RF_POWER_INDEX_P3p83dBm,	/**< power index of 3.8 dbm */
+	 RF_POWER_INDEX_P3p25dBm,	/**< power index of 3.3 dbm */
+	 RF_POWER_INDEX_P2p79dBm,	/**< power index of 2.8 dbm */
+	 RF_POWER_INDEX_P2p32dBm,	/**< power index of 2.3 dbm */
+	 RF_POWER_INDEX_P1p72dBm,	/**< power index of 1.7 dbm */
+	 RF_POWER_INDEX_P0p80dBm,	/**< power index of 0.8 dbm */
+	 RF_POWER_INDEX_P0p01dBm,	/**< power index of 0.0 dbm */
+	 RF_POWER_INDEX_N0p53dBm,	/**< power index of -0.5 dbm */
+	 RF_POWER_INDEX_N1p37dBm,	/**< power index of -1.4 dbm */
+	 RF_POWER_INDEX_N2p01dBm,	/**< power index of -2.0 dbm */
+	 RF_POWER_INDEX_N3p37dBm,	/**< power index of -3.4 dbm */
+	 RF_POWER_INDEX_N4p77dBm,	/**< power index of -4.8 dbm */
+	 RF_POWER_INDEX_N6p54dBm,	/**< power index of -6.5 dbm */
+	 RF_POWER_INDEX_N8p78dBm,	/**< power index of -8.8 dbm */
+	 RF_POWER_INDEX_N12p06dBm,	/**< power index of -12.1 dbm */
+	 RF_POWER_INDEX_N17p83dBm,	/**< power index of -17.8 dbm */
+	 RF_POWER_INDEX_N23p54dBm,	/**< power index of -23.5 dbm */
+} rf_power_level_index_e;
+
+
+
+/**
+ *  @brief  Define RF mode.
+ */
+typedef enum {
+	RF_MODE_BLE_2M 		   =    BIT(0),		/**< ble 2m mode */
+	RF_MODE_BLE_1M 		   = 	BIT(1),		/**< ble 1M mode */
+    RF_MODE_BLE_1M_NO_PN   =    BIT(2),		/**< ble 1M close pn mode */
+	RF_MODE_ZIGBEE_250K    =    BIT(3),		/**< zigbee 250K mode */
+    RF_MODE_LR_S2_500K     =    BIT(4),		/**< ble 500K mode */
+    RF_MODE_LR_S8_125K     =    BIT(5),		/**< ble 125K mode */
+    RF_MODE_PRIVATE_250K   =    BIT(6),		/**< private 250K mode */
+    RF_MODE_PRIVATE_500K   =    BIT(7),		/**< private 500K mode */
+    RF_MODE_PRIVATE_1M     =    BIT(8),		/**< private 1M mode */
+    RF_MODE_PRIVATE_2M     =    BIT(9),		/**< private 2M mode */
+    RF_MODE_ANT     	   =    BIT(10),	/**< ant mode */
+    RF_MODE_BLE_2M_NO_PN   =    BIT(11),	/**< ble 2M close pn mode */
+    RF_MODE_HYBEE_1M   	   =    BIT(12),	/**< hybee 1M mode */
+    RF_MODE_HYBEE_2M   	   =    BIT(13),	/**< hybee 2M mode */
+    RF_MODE_HYBEE_500K     =    BIT(14),	/**< hybee 500K mode */
+} rf_mode_e;
+
+
+
+/**
+ *  @brief  Define RF channel.
+ */
+typedef enum {
+	 RF_CHANNEL_0   =    BIT(0),	/**< RF channel 0 */
+	 RF_CHANNEL_1   =    BIT(1),	/**< RF channel 1 */
+	 RF_CHANNEL_2   =    BIT(2),	/**< RF channel 2 */
+	 RF_CHANNEL_3   =    BIT(3),	/**< RF channel 3 */
+	 RF_CHANNEL_4   =    BIT(4),	/**< RF channel 4 */
+	 RF_CHANNEL_5   =    BIT(5),	/**< RF channel 5 */
+	 RF_CHANNEL_NONE =   0x00,		/**< none RF channel*/
+	 RF_CHANNEL_ALL =    0x0f,		/**< all RF channel */
+} rf_channel_e;
+
+/**
+ *  @brief  set the modulation index.
+ */
+typedef enum {
+	RF_MI_P0p00 = 0,            /**< MI = 0 */
+	RF_MI_P0p32 = 32,		 	/**< MI = 0.32 */
+	RF_MI_P0p50 = 50,		  	/**< MI = 0.5 */
+	RF_MI_P0p60 = 60,		  	/**< MI = 0.6 */
+	RF_MI_P0p70 = 70,		  	/**< MI = 0.7 */
+	RF_MI_P0p80 = 80,		  	/**< MI = 0.8 */
+	RF_MI_P0p90 = 90,		  	/**< MI = 0.9 */
+	RF_MI_P1p20 = 120,		    /**< MI = 1.2 */
+	RF_MI_P1p30 = 130,		    /**< MI = 1.3 */
+	RF_MI_P1p40 = 140,		    /**< MI = 1.4 */
+}rf_mi_value_e;
+
+/**********************************************************************************************************************
+ *                                         RF global constants                                                        *
+ *********************************************************************************************************************/
+extern const rf_power_level_e rf_power_Level_list[30];
+
+
+/**********************************************************************************************************************
+ *                                         RF function declaration                                                    *
+ *********************************************************************************************************************/
+
+
+/**
+ * @brief   	This function serves to judge the statue of  RF receive.
+ * @return  	-#0:idle
+ * 				-#1:rx_busy
+ */
+static inline unsigned char rf_receiving_flag(void)
+{
+	//if the value of [2:0] of the reg_0x140840 isn't 0 , it means that the RF is in the receiving packet phase.(confirmed by junwen).
+	return ((read_reg8(0x140840)&0x07) > 1);
+}
+
+/**
+ * @brief	This function serve to judge whether it is in a certain state.
+ * @param[in]	status	- Option of rf state machine status.
+ * @return		-#0:Not in parameter setting state
+ * 				-#1:In parameter setting state
+ */
+static inline unsigned short rf_get_state_machine_status(state_machine_status_e status)
+{
+	return	status == read_reg8(0x140a24);
+}
+/**
+ * @brief	  	This function serves to set the which irq enable.
+ * @param[in]	mask 	- Options that need to be enabled.
+ * @return	 	Yes: 1, NO: 0.
+ */
+static inline void rf_set_irq_mask(rf_irq_e mask)
+{
+	BM_SET(reg_rf_irq_mask,mask);
+}
+
+
+/**
+ * @brief	  	This function serves to clear the TX/RX irq mask.
+ * @param[in]   mask 	- RX/TX irq value.
+ * @return	 	none.
+ */
+static inline void rf_clr_irq_mask(rf_irq_e mask)
+{
+	BM_CLR (reg_rf_irq_mask , mask);
+}
+
+
+/**
+ *	@brief	  	This function serves to judge whether it is in a certain state.
+ *	@param[in]	mask 	- RX/TX irq status.
+ *	@return	 	Yes: 1, NO: 0.
+ */
+static inline unsigned short rf_get_irq_status(rf_irq_e status)
+{
+	return ((unsigned short )BM_IS_SET(reg_rf_irq_status,status));
+}
+
+
+/**
+ *@brief	This function serves to clear the Tx/Rx finish flag bit.
+ *			After all packet data are sent, corresponding Tx finish flag bit
+ *			will be set as 1.By reading this flag bit, it can check whether
+ *			packet transmission is finished. After the check, it is needed to
+ *			manually clear this flag bit so as to avoid misjudgment.
+ *@return	none.
+ */
+static inline void rf_clr_irq_status(rf_irq_e status)
+{
+	reg_rf_irq_status = status;
+}
+
+
+/**
+ * @brief   	This function serves to settle adjust for RF Tx.This function for adjust the differ time
+ * 				when rx_dly enable.
+ * @param[in]   txstl_us   - adjust TX settle time.
+ * @return  	none.
+ */
+static inline void 	rf_tx_settle_us(unsigned short txstl_us)
+{
+	REG_ADDR16(0x80140a04) = txstl_us;
+}
+
+
+/**
+ * @brief   	This function serves to set RF access code.
+ * @param[in]   acc   - the value of access code.
+ * @return  	none.
+ */
+static inline void rf_access_code_comm (unsigned int acc)
+{
+	reg_rf_access_code = acc;
+	//The following two lines of code are for trigger access code in S2,S8 mode.It has no effect on other modes.
+	write_reg8(0x140c25,read_reg8(0x140c25)|0x01);
+}
+
+
+/**
+ * @brief		this function is to enable/disable each access_code channel for
+ *				RF Rx terminal.
+ * @param[in]	pipe  	- Bit0~bit5 correspond to channel 0~5, respectively.
+ *					  	- #0:Disable.
+ *					  	- #1:Enable.
+ *						  If "enable" is set as 0x3f (i.e. 00111111),
+ *						  all access_code channels (0~5) are enabled.
+ * @return	 	none
+ */
+static inline void rf_rx_acc_code_pipe_en(rf_channel_e pipe)
+{
+    write_reg8(0x140c4d, (read_reg8(0x140c4d)&0xc0) | pipe); //rx_access_code_chn_en
+}
+
+
+/**
+ * @brief		this function is to select access_code channel for RF tx terminal.
+ * @param[in]	pipe  	- Bit0~bit2 the value correspond to channel 0~5, respectively.
+ *						  if value > 5 enable channel 5.And only 1 channel can be selected every time.
+ *						- #0:Disable.
+ *						- #1:Enable.
+ *						  If "enable" is set as 0x7 (i.e. 0111),
+ *						  the access_code channel (5) is enabled.
+ * @return	 	none
+ */
+static inline void rf_tx_acc_code_pipe_en(rf_channel_e pipe)
+{
+    write_reg8(0x140a15, (read_reg8(0x140a15)&0xf8) | pipe); //Tx_Channel_man[2:0]
+}
+
+
+/**
+ * @brief 	  This function serves to reset RF Tx/Rx mode.
+ * @return 	  none.
+ */
+static inline void rf_set_tx_rx_off(void)
+{
+	write_reg8 (0x80140a16, 0x29);
+	write_reg8 (0x80140828, 0x80);	// rx disable
+	write_reg8 (0x80140a02, 0x45);	// reset tx/rx state machine
+}
+
+
+/**
+ * @brief    This function serves to turn off RF auto mode.
+ * @return   none.
+ * @note	 Attention: When forcibly stopping the state machine through this interface, it must be ensured
+ * 			 that rx is not in the process of receiving packets.Otherwise, an error may be caused.To determine
+ * 			 whether the packet is being received, you can use the function rf_receiving_flag.
+ */
+static inline void rf_set_tx_rx_off_auto_mode(void)
+{
+	write_reg8 (0x80140a00, 0x80);
+}
+
+
+/**
+ * @brief    This function serves to set CRC advantage.
+ * @return   none.
+ */
+static inline void rf_set_ble_crc_adv (void)
+{
+	write_reg32 (0x80140824, 0x555555);
+}
+
+
+/**
+ * @brief  	  	This function serves to set CRC value for RF.
+ * @param[in]  	crc  - CRC value.
+ * @return 		none.
+ */
+static inline void rf_set_ble_crc_value (unsigned int crc)
+{
+	write_reg32 (0x80140824, crc);
+}
+
+
+/**
+ * @brief  	   This function serves to set the max length of rx packet.Use byte_len to limit what DMA
+ * 			   moves out will not exceed the buffer size we define.And old chip do this through dma size.
+ * @param[in]  byte_len  - The longest of rx packet.
+ * @return     none.
+ */
+static inline void rf_set_rx_maxlen(unsigned int byte_len)
+{
+	reg_rf_rxtmaxlen = byte_len;
+}
+
+
+/**
+ * @brief		This function serve to rx dma fifo size.
+ * @param[in]	fifo_byte_size - the size of each fifo.
+ * @return		none
+ */
+static inline void rf_set_rx_dma_fifo_size(unsigned short fifo_byte_size)
+{
+	reg_rf_bb_rx_size = fifo_byte_size>>4;
+}
+/**
+ * @brief		This function serve to set rx dma wptr.
+ * @param[in]	wptr	-rx_wptr_real=rx_wptr & mask:After receiving 4 packets,the address returns to original address.mask value must in (0x01,0x03,0x07,0x0f).
+ * @return 		none
+ */
+static inline void rf_set_rx_dma_fifo_num(unsigned char fifo_num)
+{
+	reg_rf_rx_wptr_mask = fifo_num; //rx_wptr_real=rx_wptr & mask:After receiving 4 packets,the address returns to original address.mask value must in (0x01,0x03,0x07,0x0f).
+}
+
+
+/**
+ * @brief	  	This function serves to DMA rxFIFO address
+ *	            The function apply to the configuration of one rxFiFO when receiving packets,
+ *	            In this case,the rxFiFo address can be changed every time a packet is received
+ *	            Before setting, call the function "rf_set_rx_dma" to clear DMA fifo mask value(set 0)
+ * @param[in]	rx_addr   - The address store receive packet.
+ * @return	 	none
+ */
+static inline void rf_set_rx_buffer(unsigned char *rx_addr)
+{
+	rx_addr += 4;
+	dma_set_dst_address(DMA1,(unsigned int)rx_addr);
+}
+/**
+ * @brief		This function serve to set the number of tx dma fifo.
+ * @param[in]	fifo_dep - the number of dma fifo is 2 to the power of fifo_dep.
+ * @return		none
+ */
+static inline void rf_set_tx_dma_fifo_num(unsigned char fifo_num)
+{
+	reg_rf_bb_tx_chn_dep = fifo_num;//tx_chn_dep = 2^2 =4 (have 4 fifo)
+}
+
+/**
+ * @brief		This function serve to set the number of tx dma fifo.
+ * @param[in]	fifo_byte_size - the size of each dma fifo.
+ * @return		none
+ */
+static inline void rf_set_tx_dma_fifo_size(unsigned short fifo_byte_size)
+{
+	reg_rf_bb_tx_size	= fifo_byte_size>>4;//tx_idx_addr = {tx_chn_adr*bb_tx_size,4'b0}// in this setting the max data in one dma buffer is 0x20<<4.And the The product of fifo_dep and bytesize cannot exceed 0xfff.
+}
+/**
+ * @brief   This function serves to set RF tx settle time.
+ * @tx_stl_us  tx settle time,the unit is us.The max value of this param is 0xfff;The default settling time value is 150us.
+ * 			   The typical value is 113us (tx_settle time should not be less than this value).
+ * @return  none.
+ * @note		Attention:It is not necessary to call this function to adjust the settling time in the normal sending state.
+ */
+static inline void rf_set_tx_settle_time(unsigned short tx_stl_us )
+{
+	tx_stl_us &= 0x0fff;
+	write_reg16(0x140a04, (read_reg8(0x140a04)& 0xf000) |(tx_stl_us - 1));
+}
+/**
+ * @brief   This function serves to set RF tx settle time and rx settle time.
+ * @rx_stl_us  rx settle time,the unit is us.The max value of this param is 0xfff;The default settling time value is 150us.
+ * 			   The typical value is 85us (rx_settle time should not be less than this value).
+ * @return  none.
+ * @note	   Attention:It is not necessary to call this function to adjust the settling time in the normal packet receiving state.
+ */
+static inline void rf_set_rx_settle_time( unsigned short rx_stl_us )
+{
+	 rx_stl_us &= 0x0fff;
+	 write_reg16(0x140a0c, (read_reg8(0x140a0c)& 0xf000) |(rx_stl_us - 1));
+}
+
+/**
+ * @brief	This function serve to get ptx wptr.
+ * @param[in]	pipe_id	-	The number of tx fifo.0<= pipe_id <=5.
+ * @return		The write pointer of the tx.
+ */
+static inline unsigned char rf_get_tx_wptr(unsigned char pipe_id)
+{
+	return reg_rf_dma_tx_wptr(pipe_id);
+}
+
+/**
+ * @brief	This function serve to update the wptr of tx terminal.
+ * @param[in]	pipe_id	-	The number of pipe which need to update wptr.
+ * @param[in]	wptr	-	The pointer of write in tx terminal.
+ * @return		none
+ */
+static inline void rf_set_tx_wptr(unsigned char pipe_id,unsigned char wptr)
+{
+	reg_rf_dma_tx_wptr(pipe_id) = wptr;
+}
+
+
+/**
+ * @brief	This function serve to clear the writer pointer of tx terminal.
+ * @param[in]	pipe_id	-	The number of tx DMA.0<= pipe_id <=5.
+ * @return	none.
+ */
+static inline void rf_clr_tx_wptr(unsigned char pipe_id)
+{
+	reg_rf_dma_tx_wptr(pipe_id) = 0;
+}
+
+/**
+ * @brief	This function serve to get ptx rptr.
+ * @param[in]	pipe_id	-The number of tx pipe.0<= pipe_id <=5.
+ * @return		The read pointer of the tx.
+ */
+static inline unsigned char rf_get_tx_rptr(unsigned char pipe_id)
+{
+	return reg_rf_dma_tx_rptr(pipe_id);
+}
+
+
+/**
+ * @brief	This function serve to clear read pointer of tx terminal.
+ * @param[in]	pipe_id	-	The number of tx DMA.0<= pipe_id <=5.
+ * @return	none.
+ */
+static inline void rf_clr_tx_rptr(unsigned char pipe_id)
+{
+	reg_rf_dma_tx_rptr(pipe_id) = 0x80;
+}
+
+/**
+ * @brief 	This function serve to get the pointer of read in rx terminal.
+ * @return	wptr	-	The pointer of rx_rptr.
+ */
+static inline unsigned char rf_get_rx_rptr(void)
+{
+	return reg_rf_dma_rx_rptr;
+}
+
+/**
+ * @brief	This function serve to clear read pointer of rx terminal.
+ * @return	none.
+ */
+static inline void rf_clr_rx_rptr(void)
+{
+	write_reg8(0x1004f5, 0x80); //clear rptr
+}
+
+
+/**
+ * @brief 	This function serve to get the pointer of write in rx terminal.
+ * @return	wptr	-	The pointer of rx_wptr.
+ */
+static inline unsigned char rf_get_rx_wptr(void)
+{
+	return reg_rf_dma_rx_wptr;
+}
+
+
+/**
+ * @brief	This function serve to get ptx initial pid value.
+ * @return	The  value of ptx pid before update.
+ */
+static inline unsigned char rf_get_ptx_pid(void)
+{
+	return ((reg_rf_ll_ctrl_1 & 0xc0)>>6);
+}
+
+
+/**
+ * @brief	This function serve to set the new ptx pid value.
+ * @param[in]	pipe_id	-The number of pipe.0<= pipe_id <=5.
+ * @return	none
+ */
+static inline void rf_set_ptx_pid(unsigned char pipe_pid)
+{
+	reg_rf_ll_ctrl_1 |= (pipe_pid << 6);
+}
+
+
+/**
+ * @brief      This function serves to initiate information of RF.
+ * @return	   none.
+ */
+void rf_mode_init(void);
+
+
+/**
+ * @brief     This function serves to set ble_1M  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_1M_mode(void);
+
+
+/**
+ * @brief     This function serves to  set ble_1M_NO_PN  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_1M_NO_PN_mode(void);
+
+
+/**
+ * @brief     This function serves to set ble_2M  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_2M_mode(void);
+
+
+/**
+ * @brief     This function serves to set ble_2M_NO_PN  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_2M_NO_PN_mode(void);
+
+
+/**
+ * @brief     This function serves to set ble_500K  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_500K_mode(void);
+
+
+/**
+ * @brief     This function serves to  set zigbee_125K  mode of RF.
+ * @return	  none.
+ */
+void rf_set_ble_125K_mode(void);
+
+
+/**
+ * @brief     This function serves to set zigbee_250K  mode of RF.
+ * @return	  none.
+ */
+void rf_set_zigbee_250K_mode(void);
+
+
+/**
+ * @brief     This function serves to set pri_250K  mode of RF.
+ * @return	  none.
+ */
+void rf_set_pri_250K_mode(void);
+
+
+/**
+ * @brief     This function serves to  set pri_500K  mode of RF.
+ * @return	  none.
+ */
+void rf_set_pri_500K_mode(void);
+
+
+/**
+ * @brief     This function serves to set pri_1M  mode of RF.
+ * @return	  none.
+ */
+void rf_set_pri_1M_mode(void);
+
+
+/**
+ * @brief     This function serves to set pri_2M  mode of RF.
+ * @return	  none.
+ */
+void rf_set_pri_2M_mode(void);
+
+
+/**
+ * @brief     This function serves to set hybee_500K  mode of RF.
+ * @return	   none.
+ */
+void rf_set_hybee_500K_mode(void);
+
+
+/**
+ * @brief     This function serves to set hybee_2M  mode of RF.
+ * @return	  none.
+ */
+void rf_set_hybee_2M_mode(void);
+
+
+/**
+ * @brief     This function serves to set hybee_1M  mode of RF.
+ * @return	   none.
+ */
+void rf_set_hybee_1M_mode(void);
+
+
+
+
+
+/**
+ * @brief     This function serves to set ant  mode of RF.
+ * @return	   none.
+ */
+void rf_set_ant_mode(void);
+
+/**
+ * @brief     This function serves to set RF tx DMA setting.
+ * @param[in] none
+ * @return	  none.
+ */
+void rf_set_tx_dma_config(void);
+/**
+ * @brief     This function serves to set RF tx DMA setting.
+ * @param[in] fifo_depth  		- tx chn deep.
+ * @param[in] fifo_byte_size    - tx_idx_addr = {tx_chn_adr*bb_tx_size,4'b0}.
+ * @return	  none.
+ */
+void rf_set_tx_dma(unsigned char fifo_depth,unsigned short fifo_byte_size);
+
+
+/**
+ * @brief     This function serves to rx dma setting.
+ * @param[in] buff 		 	  - The buffer that store received packet.
+ * @param[in] wptr_mask  	  - DMA fifo mask value (0~fif0_num-1).
+ * @param[in] fifo_byte_size  - The length of one dma fifo.
+ * @return	  none.
+ */
+void rf_set_rx_dma(unsigned char *buff,unsigned char wptr_mask,unsigned short fifo_byte_size);
+
+/**
+ * @brief		This function serve to rx dma config
+ * @param[in]	none
+ * @return		none
+ */
+void rf_set_rx_dma_config(void);
+
+/**
+ * @brief     This function serves to trigger srx on.
+ * @param[in] tick  - Trigger rx receive packet after tick delay.
+ * @return	  none.
+ */
+void rf_start_srx(unsigned int tick);
+
+
+/**
+ * @brief	  	This function serves to get rssi.
+ * @return	 	rssi value.
+ */
+signed char rf_get_rssi(void);
+
+
+/**
+ * @brief	  	This function serves to set pin for RFFE of RF.
+ * @param[in]   tx_pin   - select pin as rffe to send.
+ * @param[in]   rx_pin   - select pin as rffe to receive.
+ * @return	 	none.
+ */
+void rf_set_rffe_pin(rf_pa_tx_pin_e tx_pin, rf_lna_rx_pin_e rx_pin);
+
+
+
+/**
+ * @brief  	 	This function serves to set RF Tx mode.
+ * @return  	none.
+ */
+void rf_set_txmode(void);
+
+
+/**
+ * @brief	  	This function serves to set RF Tx packet address to DMA src_addr.
+ * @param[in]	addr   - The packet address which to send.
+ * @return	 	none.
+ */
+_attribute_ram_code_sec_ void rf_tx_pkt(void* addr);
+
+
+/**
+ * @brief	  	This function serves to judge RF Tx/Rx state.
+ * @param[in]	rf_status   - Tx/Rx status.
+ * @param[in]	rf_channel  - This param serve to set frequency channel(2400+rf_channel) .
+ * @return	 	Whether the setting is successful(-1:failed;else success).
+ */
+int rf_set_trx_state(rf_status_e rf_status, signed char rf_channel);
+
+
+/**
+ * @brief   	This function serves to set rf channel for all mode.The actual channel set by this function is 2400+chn.
+ * @param[in]   chn   - That you want to set the channel as 2400+chn.
+ * @return  	none.
+ */
+void rf_set_chn(signed char chn);
+
+
+/**
+ * @brief   	This function serves to set pri sb mode enable.
+ * @return  	none.
+ */
+void rf_private_sb_en(void);
+
+
+/**
+ * @brief   	This function serves to set pri sb mode payload length.
+ * @param[in]   pay_len  - In private sb mode packet payload length.
+ * @return  	none.
+ */
+void rf_set_private_sb_len(int pay_len);
+
+
+/**
+ * @brief   	This function serves to disable pn of ble mode.
+ * @return  	none.
+ */
+void rf_pn_disable(void);
+
+
+/**
+ * @brief   	This function serves to get the right fifo packet.
+ * @param[in]   fifo_num   - The number of fifo set in dma.
+ * @param[in]   fifo_dep   - deepth of each fifo set in dma.
+ * @param[in]   addr       - address of rx packet.
+ * @return  	the next rx_packet address.
+ */
+unsigned char* rf_get_rx_packet_addr(int fifo_num,int fifo_dep,void* addr);
+
+
+/**
+ * @brief   	This function serves to set RF power level.
+ * @param[in]   level 	 - The power level to set.
+ * @return 		none.
+ */
+void rf_set_power_level (rf_power_level_e level);
+
+
+/**
+ * @brief   	This function serves to set RF power through select the level index.
+ * @param[in]   idx 	 - The index of power level which you want to set.
+ * @return  	none.
+ */
+void rf_set_power_level_index(rf_power_level_index_e idx);
+
+
+/**
+ * @brief	  	This function serves to close internal cap.
+ * @return	 	none.
+ */
+void rf_turn_off_internal_cap(void);
+
+
+/**
+ * @brief	  	This function serves to update the value of internal cap.
+ * @param[in]  	value   - The value of internal cap which you want to set.
+ * @return	 	none.
+ */
+void rf_update_internal_cap(unsigned char value);
+
+
+/**
+ * @brief	  	This function serves to get RF status.
+ * @return	 	RF Rx/Tx status.
+ */
+rf_status_e rf_get_trx_state(void);
+
+
+/**
+ * @brief	This function serve to change the length of preamble.
+ * @param[in]	len		-The value of preamble length.Set the register bit<0>~bit<4>.
+ * @return		none
+ */
+void rf_set_preamble_len(unsigned char len);
+
+/**
+ * @brief	This function serve to set the private ack enable,mainly used in prx/ptx.
+ * @param[in]	rf_mode		-	Must be one of the private mode.
+ * @return		none
+ */
+void rf_set_pri_tx_ack_en(rf_mode_e rf_mode);
+
+
+/**
+ * @brief	This function serve to set the length of access code.
+ * @param[in]	byte_len	-	The value of access code length.
+ * @return		none
+ */
+void rf_set_access_code_len(unsigned char byte_len);
+
+/**
+ * @brief 	This function serve to set access code.This function will first get the length of access code from register 0x140805
+ * 			and then set access code in addr.
+ * @param[in]	pipe_id	-The number of pipe.0<= pipe_id <=5.
+ * @param[in]	acc	-The value access code
+ * @note		For compatibility with previous versions the access code should be bit transformed by bit_swap();
+ */
+void rf_set_pipe_access_code (unsigned int pipe_id, unsigned char *addr);
+
+/**
+ * @brief   This function serves to set RF rx timeout.
+ * @param[in]	timeout_us	-	rx_timeout after timeout_us us,The maximum of this param is 0xfff.
+ * @return  none.
+ */
+static inline void rf_set_rx_timeout(unsigned short timeout_us)
+{
+	reg_rf_rx_timeout = timeout_us - 1;
+}
+
+
+/**
+ * @brief	This function serve to initial the ptx seeting.
+ * @return	none.
+ */
+void rf_ptx_config(void);
+
+/**
+ * @brief	This function serve to initial the prx seeting.
+ * @return	none.
+ */
+void rf_prx_config(void);
+
+/**
+ * @brief   This function serves to set RF ptx trigger.
+ * @param[in]	addr	-	The address of tx_packet.
+ * @param[in]	tick	-	Trigger ptx after (tick-current tick),If the difference is less than 0, trigger immediately.
+ * @return  none.
+ */
+void rf_start_ptx  (void* addr,  unsigned int tick);
+
+/**
+ * @brief   This function serves to set RF prx trigger.
+ * @param[in]	tick	-	Trigger prx after (tick-current tick),If the difference is less than 0, trigger immediately.
+ * @return  none.
+ */
+void rf_start_prx(unsigned int tick);
+
+
+/**
+ * @brief	This function to set retransmit and retransmit delay.
+ * @param[in] 	retry_times	- Number of retransmit, 0: retransmit OFF
+ * @param[in] 	retry_delay	- Retransmit delay time.
+ * @return		none.
+ */
+void rf_set_ptx_retry(unsigned char retry_times, unsigned short retry_delay);
+
+
+/**
+ * @brief   This function serves to judge whether the FIFO is empty.
+ * @param pipe_id specify the pipe.
+ * @return TX FIFO empty bit.
+ * 			-#0 TX FIFO NOT empty.
+ * 			-#1 TX FIFO empty.
+ */
+unsigned char rf_is_rx_fifo_empty(unsigned char pipe_id);
+
+
+/**
+ * @brief     	This function serves to RF trigger stx
+ * @param[in] 	addr  	- DMA tx buffer.
+ * @param[in] 	tick  	- Send after tick delay.
+ * @return	   	none.
+ */
+_attribute_ram_code_sec_noinline_ void rf_start_stx(void* addr, unsigned int tick);
+
+
+/**
+ * @brief     	This function serves to RF trigger stx2rx
+ * @param[in] 	addr  	- DMA tx buffer.
+ * @param[in] 	tick  	- Send after tick delay.
+ * @return	    none.
+ */
+_attribute_ram_code_sec_noinline_ void rf_start_stx2rx  (void* addr, unsigned int tick);
+
+
+/**
+ * @brief   	This function serves to set RF baseband channel.This function is suitable for ble open PN mode.
+ * @param[in]   chn_num  - Bluetooth channel set according to Bluetooth protocol standard.
+ * @return  	none.
+ */
+_attribute_ram_code_sec_noinline_ void rf_set_ble_chn(signed char chn_num);
+
+
+
+/**
+ * @brief   	This function serves to set RF Rx manual on.
+ * @return  	none.
+ */
+_attribute_ram_code_sec_noinline_ void rf_set_rxmode(void);
+
+
+/**
+ * @brief	  	This function serves to start Rx of auto mode. In this mode,
+ *				RF module stays in Rx status until a packet is received or it fails to receive packet when timeout expires.
+ *				Timeout duration is set by the parameter "tick".
+ *				The address to store received data is set by the function "addr".
+ * @param[in]	addr   - The address to store received data.
+ * @param[in]	tick   - It indicates timeout duration in Rx status.Max value: 0xffffff (16777215)
+ * @return	 	none
+ */
+_attribute_ram_code_sec_noinline_ void rf_start_brx  (void* addr, unsigned int tick);
+
+
+/**
+ * @brief	  	This function serves to start tx of auto mode. In this mode,
+ *				RF module stays in tx status until a packet is sent or it fails to sent packet when timeout expires.
+ *				Timeout duration is set by the parameter "tick".
+ *				The address to store send data is set by the function "addr".
+ * @param[in]	addr   - The address to store send data.
+ * @param[in]	tick   - It indicates timeout duration in Rx status.Max value: 0xffffff (16777215)
+ * @return	 	none
+ */
+_attribute_ram_code_sec_noinline_ void rf_start_btx (void* addr, unsigned int tick);
+
+/**
+ * @brief     	This function serves to RF trigger srx2rx.
+ * @param[in] 	addr  - DMA tx buffer.
+ * @param[in] 	tick  - Trigger rx receive packet after tick delay.
+ * @return	    none.
+ */
+_attribute_ram_code_sec_noinline_ void rf_start_srx2tx  (void* addr, unsigned int tick);
+
+/**
+ * @brief	  	This function is used to  set the modulation index of the receiver.
+ *              This function is common to all modes,the order of use requirement:configure mode first,then set the the modulation index,default is 0.5 in drive,
+ *              both sides need to be consistent otherwise performance will suffer,if don't specifically request,don't need to call this function.
+ * @param[in]	mi	- the value of modulation_index*100.
+ * @return	 	none.
+ */
+void rf_set_rx_modulation_index(rf_mi_value_e mi_value);
+
+/**
+ * @brief	  	This function is used to set the modulation index of the sender.
+ *              This function is common to all modes,the order of use requirement:configure mode first,then set the the modulation index,default is 0.5 in drive,
+ *              both sides need to be consistent otherwise performance will suffer,if don't specifically request,don't need to call this function.
+ * @param[in]	mi	- the value of modulation_index*100.
+ * @return	 	none.
+ */
+void rf_set_tx_modulation_index(rf_mi_value_e mi_value);
+
+/**
+ * @brief      This function serves to init the 2-wire-PTA.
+ * @param[in]  ble_priority_pin - the pin of ble_priority.
+ * @param[in]  wlan_active_pin  - the pin of wlan_active.
+ * @param[in]  ble_priority_mode- the mode of ble_priority pin.
+ *             when the mode is PTA_BLE_PRIORITY_TX,the pin of ble_priority will be high if tx.
+ *             when the mode is PTA_BLE_PRIORITY_RX,the pin of ble_priority will be high if rx.
+ *             when the mode is PTA_BLE_PRIORITY_TRX,the pin of ble_priority will be high if tx and rx.
+ * @return     none
+ */
+void  rf_2wire_pta_init(pta_bleprio_pin_e ble_priority_pin,gpio_pin_e wlan_active_pin,pta_2wire_mode_e ble_priority_mode);
+
+/**
+ * @brief      This function serves to init the 3-wire-PTA.
+ * @param[in]  ble_active_pin - the pin of ble_active.
+ * @param[in]  ble_status_pin - the pin of ble_status.
+ * @param[in]  wlan_deny_pin  - the pin of wlan_deny.
+ * @param[in]  ble_status_mode  - the mode of ble_status.
+               when the mode is PTA_BLE_STATUS_TX,the ble_status pin will be high if stx.
+			   when the mode is PTA_BLE_STATUS_RX,the ble_status pin will be high if srx.
+ * @return     none
+ * @note	   Attention:In the three-wire PTA mode, there will be a period of time t1 to
+ * 			   detect wlan_active and a time t2 to switch the ble_status state before the
+ * 			   action is triggered.The actual start time of the corresponding RF action will
+ * 			   shift backward by the larger of the two.These two periods of time can be set
+ * 			   by function rf_set_pta_t1_time and function rf_set_pta_t2_time respectively.
+ */
+void  rf_3wire_pta_init(pta_bleactive_pin_e ble_active_pin,pta_blestatus_pin_e ble_status_pin,pta_wlandeny_pin_e wlan_deny_pin,pta_3wire_mode_e ble_status_mode);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/swire.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/swire.h
new file mode 100644
index 00000000..7eee695d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/swire.h
@@ -0,0 +1,170 @@
+/********************************************************************************************************
+ * @file	swire.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef _SWIRE_H_
+#define _SWIRE_H_
+#include <reg_include/register.h>
+#include "compiler.h"
+#include "gpio.h"
+typedef enum{
+	SWM_PC0 = GPIO_PC0,
+}swm_pin_e;
+
+/**
+ * @brief     This function resets the SWIRE module.
+ * @return    none
+ */
+static inline void swire_reset(void)
+{
+	 reg_rst0 &= (~FLD_RST0_SWIRE);
+	 reg_rst0 |= (FLD_RST0_SWIRE);
+}
+/**
+ * @brief     This function is used to wait for the completion of writing.
+ * @return    none
+ */
+static inline void swire_wait_wr_done(void)
+{
+	while (reg_swire_ctl & FLD_SWIRE_WR);
+}
+/**
+ * @brief     This function is used to write cmd.
+ * @param[in] cmd 	- cmd value.
+ * @return    none
+ */
+static inline void swire_master_write_cmd(unsigned char cmd)
+{
+	reg_swire_data = cmd;
+	reg_swire_ctl = (FLD_SWIRE_CMD | FLD_SWIRE_WR );
+	swire_wait_wr_done();
+}
+/**
+ * @brief     This function is used to write data.
+ * @param[in] data 	- data value.
+ * @return    none
+ */
+static inline void swire_master_write_data(unsigned char data)
+{
+	reg_swire_data = data;
+	reg_swire_ctl =  FLD_SWIRE_WR ;
+	swire_wait_wr_done();
+}
+/**
+ * @brief     This function is to disable fifo mode.
+ *			  The default is this mode. When multi-byte reads and writes, the address will automatically increase by 1.
+ *			  For example, for write instructions, the address is 1, and the data is 0x11, 0x22,
+ *			  then 0x11 will be written to address 1, and 0x22 will be written to address 2.
+ * @return    none
+ */
+static inline void swire_fifo_mode_dis(void)
+{
+	BM_CLR(reg_swire_id, FLD_SWIRE_FIFO_MODE);
+
+}
+/**
+ * @brief     This function is to enable fifo mode.
+ *			  When multi-byte read and write, the address will not be automatically incremented by 1,
+ *			  but the value is written to the same address.
+ *			  For example, if you want to operate the fifo register on the slave side, you will use this function.
+ * @return    none
+ */
+static inline void swire_fifo_mode_en(void)
+{
+	BM_SET(reg_swire_id, FLD_SWIRE_FIFO_MODE);
+
+}
+/**
+ * @brief     This function is to send a specific timing to reset the status of the slave device.
+ * 			  When the master device connects the DP pin of the slave device, this function must be called first,
+ * 			  because the DP pin of the slave device is USB function by default. Only after calling this function to send a specific timing,
+ * 			  the slave device will be enabled as the swire function.
+ * 			  When communication fails, you can also try to call this function to resume communication.
+ * @param[in] gpio_swm - the swm pin.
+ * @param[in] dp_through_swire_en - If the master is connected to the DP pin of the slave device, this parameter needs to be set to 1.
+ * @return	  none.
+ */
+void swire_sync (swm_pin_e gpio_swm,unsigned char dp_through_swire_en);
+/**
+ * @brief     This function is to set GPIO_PC0 as the swm function.
+ * @param[in] gpio_swm - the swm pin needs to enable.
+ * @return	  none.
+ */
+void swire_set_swm_en(swm_pin_e gpio_swm);
+/**
+ * @brief     This function is to set GPIO_PA7 as the sws function.
+ * @return	  none.
+ */
+void swire_set_sws_en(void);
+
+/**
+ * @brief     This function is to set the clock of the swire module,
+ * 			  the clock source of the swire module is HCLK, the clock of the actual swire module:  swire_clock = HCLK/div.
+ * 			  swire_clock cannot be greater than HCLK.(div cannot be 0).
+ * 			  Whether the chip as a master or slave, clock source are the following principles:
+ * 			  the clock for sending data is swire_clock, and the clock for detecting received data is HCLK.
+ * @param     swire_clock - swire clock
+ * @return	  none.
+ */
+void swire_set_clk(unsigned int swire_clock);
+
+/**
+ * @brief     This function is used to set the ID of the slave.
+ *			  When the host accesses multiple slaves, the device can be distinguished by the ID of the slave.
+ * @param[in] id	- slave id.The setting range is 0~0x1f.
+ * @return	  none.
+ */
+void swire_set_slave_id(unsigned char id);
+/**
+ * @brief     This function is used by the master device to write data to the slave device.
+ *			  The swire protocol is to send the address first and then send the data.
+ * @param[in] slave_id	- slave id.The setting range is 0~0x1f.
+ * 						  [6:5]: this function tells the slave to operate in byte/half-word/word.
+ * 						  		 the reason is that some addresses on the slave side can only be operated with 4 bytes.
+ * 						  		 10--32bit; 01--16bit ; 00--8bit
+ * 						  [4:0]: ID
+ * @param[in] addr 		- slave address(little endian format).
+ * @param[in] addr_len 	- slave address byte length,It is determined by the slave device, for example: B91s is four bytes, B85s is three bytes.
+ * @param[in] data 		- The data that needs to be written to the slave.
+ * @param[in] data_len	- data length.
+ * @return	  none.
+ */
+
+void swire_master_write(unsigned char slave_id,unsigned char *addr, unsigned char addr_len,unsigned char *data,unsigned int data_len);
+/**
+ * @brief      This function is used by the master device to read data to the slave device.
+ *			   The swire protocol is to send the address first and then wait to read the data returned by the slave.
+ * @param[in] slave_id	 - slave id.The setting range is 0~0x1f.
+ * 						 	 [6:5]: this function tells the slave to operate in byte/half-word/word.
+ * 						  			the reason is that some addresses on the slave side can only be operated with 4 bytes.
+ * 						  			10--32bit; 01--16bit ; 00--8bit
+ * 						  	 [4:0]: ID
+ * @param[in]  addr 	 - slave address(little endian format).
+ * @param[in]  addr_len  - slave address byte length,It is determined by the slave device, for example: B91s is four bytes, B85s is three bytes.
+ * @param[out] data 	 - this is the data read from the slave.
+ * @param[in]  data_len	 - data length.
+ * @return	   0:read timeout  1:read success.
+ */
+unsigned char  swire_master_read (unsigned char slave_id,unsigned char *addr, unsigned char addr_len,unsigned char *data,unsigned int data_len);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/sys.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/sys.h
new file mode 100644
index 00000000..2ecfea82
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/sys.h
@@ -0,0 +1,148 @@
+/********************************************************************************************************
+ * @file	sys.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page SYS
+ *
+ *	Introduction
+ *	===============
+ *	Clock init and system timer delay.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: sys.h
+ */
+
+#ifndef SYS_H_
+#define SYS_H_
+#include "reg_include/stimer_reg.h"
+
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+/*
+ * brief instruction delay
+ */
+
+#define	_ASM_NOP_					__asm__("nop")
+
+#define	CLOCK_DLY_1_CYC				_ASM_NOP_
+#define	CLOCK_DLY_2_CYC				_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_3_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_4_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_5_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_6_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_7_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_8_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_9_CYC				_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+#define	CLOCK_DLY_10_CYC			_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_;_ASM_NOP_
+
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+
+/**
+ * @brief 	Power type for different application
+ */
+typedef enum{
+	LDO_1P4_LDO_1P8 	= 0x00,	/**< 1.4V-LDO & 1.8V-LDO mode */
+	DCDC_1P4_LDO_1P8	= 0x01,	/**< 1.4V-DCDC & 1.8V-LDO mode */
+	DCDC_1P4_DCDC_1P8	= 0x03,	/**< 1.4V-DCDC & 1.8V-DCDC mode */
+}power_mode_e;
+
+/**
+ * @brief 	The maximum voltage that the chip can withstand is 3.6V.
+ * 			When the vbat power supply voltage is lower than 3.6V, it is configured as VBAT_MAX_VALUE_LESS_THAN_3V6 mode,
+ * 			bypass is turned on, and the vbat voltage directly supplies power to the chip.
+ * 			The voltage of the GPIO pin is the voltage of vbat.
+ * 			When the vbat power supply voltage may be higher than 3.6V, it is configured as VBAT_MAX_VALUE_GREATER_THAN_3V6 mode,
+ * 			the bypass is closed, and the vbat voltage passes through an LDO to supply power to the chip.
+ * 			The voltage of the GPIO pin (V_ioh) is the voltage after Vbat passes through the LDO (V_ldo),
+ * 			and the maximum value is about 3.3V floating 10% (V_ldoh).
+ * 			When Vbat > V_ldoh, V_ioh = V_ldo = V_ldoh. When Vbat < V_ldoh, V_ioh = V_ldo = Vbat.
+ */
+typedef enum{
+	VBAT_MAX_VALUE_GREATER_THAN_3V6	= 0x00,		/*VBAT may be greater than 3.6V. */
+	VBAT_MAX_VALUE_LESS_THAN_3V6	= BIT(3),	/*VBAT must be below 3.6V. */
+}vbat_type_e;
+
+/**
+ * @brief command table for special registers
+ */
+typedef struct tbl_cmd_set_t {
+	unsigned int  	adr;
+	unsigned char	dat;
+	unsigned char	cmd;
+} tbl_cmd_set_t;
+
+
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+extern unsigned int g_chip_version;
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+/**
+ * @brief      This function reboot mcu.
+ * @return     none
+ */
+static inline void sys_reboot(void)
+{
+	reg_pwdn_en = 0x20;
+}
+/**
+ * @brief   	This function serves to initialize system.
+ * @param[in]	power_mode - power mode(LDO/DCDC/LDO_DCDC)
+ * @param[in]	vbat_v		- vbat voltage type: 0 vbat may be greater than 3.6V,  1 vbat must be below 3.6V.
+ * @return  	none
+ */
+void sys_init(power_mode_e power_mode, vbat_type_e vbat_v);
+
+/**
+ * @brief      This function performs a series of operations of writing digital or analog registers
+ *             according to a command table
+ * @param[in]  pt    - pointer to a command table containing several writing commands
+ * @param[in]  size  - number of commands in the table
+ * @return     number of commands are carried out
+ */
+
+int write_reg_table(const tbl_cmd_set_t * pt, int size);
+/**
+ * @brief     this function servers to get calibration value from EFUSE.
+ * 			  Only the two-point calibration gain and offset of GPIO sampling are saved in the efuse of B91.
+ * @param[out]gain - gpio_calib_value.
+ * @param[out]offset - gpio_calib_value_offset.
+ * @return    1 means there is a calibration value in efuse, and 0 means there is no calibration value in efuse.
+ */
+unsigned char efuse_get_adc_calib_value(unsigned short* gain, signed char* offset);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/trng.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/trng.h
new file mode 100644
index 00000000..90a2a9ad
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/include/trng.h
@@ -0,0 +1,75 @@
+/********************************************************************************************************
+ * @file	trng.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page TRNG
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 supports hardware trng.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: trng.h
+ */
+#ifndef TRNG_H_
+#define TRNG_H_
+
+#include "lib/include/sys.h"
+#include <reg_include/register.h>
+#include "stimer.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+
+/**
+ * @brief     This function performs to get one random number.If chip in suspend TRNG module should be close.
+ *            else its current will be larger.
+ * @return    none
+ **/
+void trng_init(void);
+
+/**
+ * @brief     This function performs to get one random number.
+ * @return    the value of one random number
+ **/
+unsigned int trng_rand(void);
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/libaxon_driver_lib.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/libaxon_driver_lib.a
new file mode 100644
index 00000000..f7bcb7a4
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lib/libaxon_driver_lib.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lpc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lpc.h
new file mode 100644
index 00000000..7439b596
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/lpc.h
@@ -0,0 +1,127 @@
+/********************************************************************************************************
+ * @file	lpc.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "analog.h"
+
+/**
+ * define input IO.
+ */
+typedef enum{
+	LPC_INPUT_PB1 = 1,
+	LPC_INPUT_PB2 = 2,
+	LPC_INPUT_PB3 = 3,
+	LPC_INPUT_PB4 = 4,
+	LPC_INPUT_PB5 = 5,
+	LPC_INPUT_PB6 = 6,
+	LPC_INPUT_PB7 = 7,
+}lpc_input_channel_e;
+
+/**
+ * define work mode.
+ */
+typedef enum{
+	LPC_NORMAL = 0,
+	LPC_LOWPOWER,
+}lpc_mode_e;
+
+/**
+ * define Reference voltage.
+ */
+typedef enum{
+	LPC_REF_974MV  = 1,
+	LPC_REF_923MV  = 2,
+	LPC_REF_872MV  = 3,
+	LPC_REF_820MV  = 4,
+	LPC_REF_PB0    = 5,
+	LPC_REF_PB3    = 6,
+}lpc_reference_e;
+
+/**
+ * define scale.
+ */
+typedef enum{
+	LPC_SCALING_PER25  = 0,
+	LPC_SCALING_PER50  = 1,
+	LPC_SCALING_PER75  = 2,
+	LPC_SCALING_PER100 = 3,
+}lpc_scaling_e;
+
+/**
+ * @brief		This function servers to powers down low power comparator.
+ * @return		none.
+ */
+static inline void lpc_power_down(void)
+{
+	analog_write_reg8(0x07,(analog_read_reg8(0x07))|0x08);
+}
+
+/**
+ * @brief		This function servers to power on low power comparator.
+ * @return		none.
+ */
+static inline void lpc_power_on(void)
+{
+	analog_write_reg8(0x06,analog_read_reg8(0x06) & 0xfd);
+}
+
+/**
+ * @brief		This function selects input channel for low power comparator.
+ * @param[in]	pin		- selected input channel.Input derived from external PortB(PB<1>~PB<7>).
+ * @return		none.
+ */
+static inline void lpc_set_input_chn(lpc_input_channel_e pin)
+{
+	analog_write_reg8(0x0d,(analog_read_reg8(0x0d) & 0xf8) | pin);
+}
+
+/**
+ * @brief		This function serves to set scaling_coefficient for low power comparator.
+ * @param[in]	divider	- selected scaling coefficient.(%25,%50,%75,%100)
+ * @return		none.
+ */
+static inline void lpc_set_scaling_coeff(lpc_scaling_e divider)
+{
+	analog_write_reg8(0x0b,(analog_read_reg8(0x0b)&0xcf)|(divider<<4));
+}
+
+/**
+ * @brief		This function serves to get the comparison results.if Vin>Vref 0x88[6]=0,else 0x88[6]=1.
+ * @return		comparison results.
+ */
+static inline unsigned char lpc_get_result(void)
+{
+	return ((analog_read_reg8(0x88)&0x40)>>6);
+}
+
+/**
+ * @brief		This function selects input reference voltage for low power comparator.
+ * @param[in]	mode	- lower power comparator working mode includes normal mode and low power mode.
+ * @param[in]	ref		- selected input reference voltage.
+ * @return		none.
+ */
+void lpc_set_input_ref(lpc_mode_e mode, lpc_reference_e ref);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mdec.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mdec.h
new file mode 100644
index 00000000..51448fc5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mdec.h
@@ -0,0 +1,79 @@
+/********************************************************************************************************
+ * @file	mdec.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "analog.h"
+#include "reg_include/mdec_reg.h"
+
+/**
+ * @brief		This function servers to reset the MDEC module.When the system is wakeup by MDEC, you should
+ * 			  	to reset the MDEC module to clear the flag bit of MDEC wakeup.
+ * @return		none.
+ */
+static inline void mdec_reset(void)
+{
+	analog_write_reg8(mdec_rst_addr,analog_read_reg8(mdec_rst_addr) | FLD_MDEC_RST);
+	analog_write_reg8(mdec_rst_addr,analog_read_reg8(mdec_rst_addr) & (~FLD_MDEC_RST));
+}
+
+/**
+ * @brief		After all packet data are received, it can check whether packet transmission is finished.
+ * @param[in]	status	- the interrupt status to be obtained.
+ * @return		irq status.
+ */
+static inline unsigned char mdec_get_irq_status(wakeup_status_e status)
+{
+	return (analog_read_reg8(reg_wakeup_status) & status);
+}
+
+/**
+ * @brief		This function serves to clear the wake mdec bit.After all packet
+ *				data are received, corresponding flag bit will be set as 1.
+ *				needed to manually clear this flag bit so as to avoid misjudgment.
+ * @param[in]	status	- the interrupt status that needs to be cleared.
+ * @return		none.
+ */
+static inline void mdec_clr_irq_status(wakeup_status_e status)
+{
+	analog_write_reg8(reg_wakeup_status, (analog_read_reg8(reg_wakeup_status) | status));
+}
+
+/**
+ * @brief		This function is used to initialize the MDEC module,include clock setting and input IO select.
+ * @param[in]	pin	- mdec pin.
+ * 					  In order to distinguish which pin the data is input from,only one input pin can be selected one time.
+ * @return		none.
+ */
+void mdec_init(mdec_pin_e pin);
+
+/**
+ * @brief		This function is used to read the receive data of MDEC module's IO.
+ * @param[out]	dat		- The array to store date.
+ * @return		1 decode success,  0 decode failure.
+ */
+unsigned char mdec_read_dat(unsigned char *dat);
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mspi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mspi.h
new file mode 100644
index 00000000..379c5e0d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/mspi.h
@@ -0,0 +1,155 @@
+/********************************************************************************************************
+ * @file	mspi.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "compiler.h"
+#include "gpio.h"
+#include "reg_include/mspi_reg.h"
+
+
+/**
+ * @brief 	Data line mode of mspi
+ */
+typedef enum{
+	MSPI_SINGLE_LINE	= 0x00,
+	MSPI_DUAL_LINE		= 0x04,
+	MSPI_QUAD_LINE		= 0x0c,
+}mspi_data_line_e;
+
+
+/**
+  * @brief     This function servers to set the spi wait.
+  * @return    none.
+  */
+_attribute_ram_code_sec_ static inline void mspi_wait(void){
+	while(reg_mspi_status & FLD_MSPI_BUSY);
+}
+
+/**
+ * @brief     This function servers to enable read triggle spi.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_rd_trig_en(void){
+	reg_mspi_fm |= FLD_MSPI_RD_TRIG_EN;
+}
+
+/**
+ * @brief     This function servers to disable read triggle spi.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_rd_trig_dis(void){
+	reg_mspi_fm &= ~FLD_MSPI_RD_TRIG_EN;
+}
+
+/**
+ * @brief     This function is used to configure mspi to read mode.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_read_en(void){
+	reg_mspi_fm |= FLD_MSPI_RD_MODE;
+}
+
+/**
+ * @brief     This function is used to configure mspi to write mode.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_write_en(void){
+	reg_mspi_fm &= ~FLD_MSPI_RD_MODE;
+}
+
+/**
+ * @brief     This function is used to configure mspi for several-line communication mode.
+ * @param[in] line	- several-line communication mode.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_data_line(mspi_data_line_e line){
+	reg_mspi_fm = (reg_mspi_fm & (~FLD_MSPI_DATA_LINE)) | line;
+}
+
+/**
+ * @brief     This function servers to set spi interface csn signal.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_high(void){
+	reg_mspi_fm |= FLD_MSPI_CSN;
+}
+
+/**
+ * @brief     This function servers to clear spi interface csn signal.
+ * @return    none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_low(void){
+	reg_mspi_fm &= ~FLD_MSPI_CSN;
+}
+
+/**
+ * @brief		This function servers to gets the spi data.
+ * @return		the spi data.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_get(void){
+	return reg_mspi_data;
+}
+
+/**
+ * @brief		This function servers to write the spi.
+ * @param[in]	c	- the char need to be write.
+ * @return		none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_write(unsigned char c){
+	reg_mspi_data = c;
+}
+
+/**
+ * @brief		This function servers to control the write.
+ * @param[in]	c	- need to be write.
+ * @return		none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_fm_write(unsigned char c){
+	reg_mspi_fm = c;
+}
+
+/**
+ * @brief		This function servers to spi read.
+ * @return		read result.
+ */
+_attribute_ram_code_sec_ static inline unsigned char mspi_read(void){
+	mspi_write(0);		// dummy, issue clock
+	mspi_wait();
+	return mspi_get();
+}
+
+/**
+ * @brief		This function serves to Stop XIP operation before flash.
+ * @return		none.
+ */
+_attribute_ram_code_sec_ static inline void mspi_stop_xip(void)
+{
+	mspi_wait();	//wait xip busy=0
+	mspi_high();	//mspi_cn=1, stop xip read
+	while(gpio_get_level(GPIO_PF3) == 0);	//wait cn=1
+}
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/npe.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/npe.h
new file mode 100644
index 00000000..c110cd34
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/npe.h
@@ -0,0 +1,32 @@
+/********************************************************************************************************
+ * @file	npe.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef  NPE_H_
+#define  NPE_H_
+#include "reg_include/npe_reg.h"
+
+void npe_set_reg(void);
+void npe_set_config(unsigned int desc_pointer );
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/pwm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/pwm.h
new file mode 100644
index 00000000..32d191bb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/pwm.h
@@ -0,0 +1,569 @@
+/********************************************************************************************************
+ * @file	pwm.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef PWM_H_
+#define PWM_H_
+#include <reg_include/register.h>
+#include "gpio.h"
+#include "dma.h"
+
+#define get_pwmid(gpio)     ((gpio==PWM_PWM0_PB4) ? 0 : (  \
+                     (gpio==PWM_PWM0_PC0) 	? 0 : (  \
+                     (gpio==PWM_PWM0_PE3) 	? 0 : (  \
+                     (gpio==PWM_PWM0_N_PD0) ? 0 : (  \
+                     (gpio==PWM_PWM1_PB5) 	? 1 : (  \
+                     (gpio==PWM_PWM1_PE1) 	? 1 : (  \
+                     (gpio==PWM_PWM1_N_PD1) ? 1 : (  \
+                     (gpio==PWM_PWM2_PB7) 	? 2 : (  \
+                     (gpio==PWM_PWM2_PE2) 	? 2 : (  \
+                     (gpio==PWM_PWM2_N_PD2) ? 2 : (  \
+                     (gpio==PWM_PWM2_N_PE6) ? 2 : (  \
+                     (gpio==PWM_PWM3_PB1) 	? 3 : (  \
+                     (gpio==PWM_PWM3_PE0) 	? 3 : (  \
+                     (gpio==PWM_PWM3_N_PD3) ? 3 : (  \
+                     (gpio==PWM_PWM3_N_PE7) ? 3 : (  \
+                     (gpio==PWM_PWM4_PD7) 	? 4 : (  \
+                     (gpio==PWM_PWM4_PE4) 	? 4 : (  \
+                     (gpio==PWM_PWM4_N_PD4) ? 4 : (  \
+                     (gpio==PWM_PWM5_PB0) 	? 5 : (  \
+                     (gpio==PWM_PWM5_PE5) 	? 5 : (  \
+                     (gpio==PWM_PWM5_N_PD5) ? 5 : 0  \
+                    		 )))))))))))))))))))))
+
+#define get_pwm_invert_val(gpio)     ((gpio==PWM_PWM0_N_PD0) ||    \
+                     (gpio==PWM_PWM1_N_PD1) ||        \
+                     (gpio==PWM_PWM2_N_PD2) ||        \
+                     (gpio==PWM_PWM2_N_PE6) ||        \
+                     (gpio==PWM_PWM3_N_PD3) ||        \
+                     (gpio==PWM_PWM3_N_PE7) ||        \
+                     (gpio==PWM_PWM4_N_PD4) ||        \
+                     (gpio==PWM_PWM5_N_PD5))
+
+/**
+ * @brief  enum variable, the number of PWM channels supported
+ */
+typedef enum {
+	PWM0_ID = 0,
+	PWM1_ID,
+	PWM2_ID,
+	PWM3_ID,
+	PWM4_ID,
+	PWM5_ID,
+}pwm_id_e;
+
+
+/**
+ * @brief  enum variable, represents the PWM mode.
+ */
+typedef enum{
+	PWM_NORMAL_MODE   		= 0x00,
+	PWM_COUNT_MODE    		= 0x01,
+	PWM_IR_MODE       		= 0x03,
+	PWM_IR_FIFO_MODE  		= 0x07,
+	PWM_IR_DMA_FIFO_MODE  	= 0x0F,
+}pwm_mode_e;
+
+
+/**
+ * @brief  enum variable, represents Selection of PWM pin.
+ */
+typedef enum{
+	PWM_PWM0_PB4 = GPIO_PB4,
+	PWM_PWM0_PC0 = GPIO_PC0,
+	PWM_PWM0_PE3 = GPIO_PE3,
+	PWM_PWM0_N_PD0 = GPIO_PD0,
+
+	PWM_PWM1_PB5 = GPIO_PB5,
+	PWM_PWM1_PE1 = GPIO_PE1,
+	PWM_PWM1_N_PD1 = GPIO_PD1,
+
+	PWM_PWM2_PB7 = GPIO_PB7,
+	PWM_PWM2_PE2 = GPIO_PE2,
+	PWM_PWM2_N_PD2 = GPIO_PD2,
+	PWM_PWM2_N_PE6 = GPIO_PE6,
+
+	PWM_PWM3_PB1 = GPIO_PB1,
+	PWM_PWM3_PE0 = GPIO_PE0,
+	PWM_PWM3_N_PD3 = GPIO_PD3,
+	PWM_PWM3_N_PE7 = GPIO_PE7,
+
+	PWM_PWM4_PD7 = GPIO_PD7,
+	PWM_PWM4_PE4 = GPIO_PE4,
+	PWM_PWM4_N_PD4 = GPIO_PD4,
+
+	PWM_PWM5_PB0 = GPIO_PB0,
+	PWM_PWM5_PE5 = GPIO_PE5,
+	PWM_PWM5_N_PD5 = GPIO_PD5,
+}pwm_pin_e;
+
+
+
+
+/**
+ * @brief  Select the 32K clock source of pwm.
+ */
+typedef enum {
+
+	PWM_CLOCK_32K_CHN_PWM0 = 0x01,
+	PWM_CLOCK_32K_CHN_PWM1 = 0x02,
+	PWM_CLOCK_32K_CHN_PWM2 = 0x04,
+	PWM_CLOCK_32K_CHN_PWM3 = 0x08,
+	PWM_CLOCK_32K_CHN_PWM4 = 0x10,
+	PWM_CLOCK_32K_CHN_PWM5 = 0x20
+
+}pwm_clk_32k_en_chn_e;
+
+
+
+
+
+
+/**
+ * @brief     This function servers to set pwm clock frequency, when pwm clock source is pclk.
+ * @param[in] pwm_clk_div - variable of the pwm clock.
+ *            PWM frequency = System_clock / (pwm_clk_div+1).
+ * @return	  none.
+ */
+static inline void pwm_set_clk(unsigned char pwm_clk_div){
+
+    reg_pwm_clkdiv = pwm_clk_div;
+}
+
+/**
+ * @brief     This function servers to set pwm clock source is 32K.
+ *    	      If you use 32K as the PWM clock source, you can work in suspend mode.
+ *    	      but the 32K clock source cannot be divided and can only work in continuous mode and counting mode
+ * @param[in] pwm_32K_en_chn - This variable is used to select the specific PWM channel.
+ * @return	  none.
+ */
+
+static inline void pwm_32k_chn_en(pwm_clk_32k_en_chn_e pwm_32K_en_chn){
+
+	reg_pwm_mode32k |= pwm_32K_en_chn;
+
+}
+
+
+/**
+ * @brief     This fuction servers to set pin as pwm0
+ * @param[in] pin - selected pin
+ * @return	  none.
+ */
+void pwm_set_pin(pwm_pin_e pin);
+
+
+
+
+/**
+ * @brief     This function servers to set pwm count status(CMP) time.
+ * @param[in] id   - variable of enum to select the pwm number.
+ * @param[in] tcmp - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_tcmp(pwm_id_e id, unsigned short tcmp)
+{
+	reg_pwm_cmp(id) = tcmp;
+}
+
+
+/**
+ * @brief     This function servers to set pwm cycle time.
+ * @param[in] id   - variable of enum to select the pwm number.
+ * @param[in] tmax - variable of the cycle time.
+ * @return	  none.
+ */
+static inline void pwm_set_tmax(pwm_id_e id, unsigned short tmax){
+	reg_pwm_max(id) = tmax;
+}
+
+/*
+ *@brief    This function servers to update the duty cycle in 32K
+ *@return	  none.
+ */
+static inline void pwm_32k_chn_update_duty_cycle(void){
+	reg_pwm_cnt5_l |= FLD_PWM_32K_DUTY_CYCLE_UPDATE;
+}
+
+/**
+ * @brief     This function servers to start the pwm,can have more than one PWM open at the same time.
+ * @param[in] en - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_start(pwm_en_e en){
+
+		BM_SET(reg_pwm_enable, en);
+
+}
+
+
+/**
+ * @brief     This function servers to stop the pwm,can have more than one PWM stop at the same time.
+ * @param[in] en - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_stop(pwm_en_e en){
+
+		BM_CLR(reg_pwm_enable, en);
+
+}
+
+
+/**
+ * @brief     This function servers to revert the PWMx.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_invert_en(pwm_id_e id){
+	reg_pwm_invert |= BIT(id);
+}
+
+
+/**
+ * @brief     This function servers to disable the PWM revert function.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_invert_dis(pwm_id_e id){
+	BM_CLR(reg_pwm_invert, BIT(id));
+}
+
+
+/**
+ * @brief     This function servers to revert the PWMx_N.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_n_invert_en(pwm_id_e id){
+	reg_pwm_n_invert |= BIT(id);
+}
+
+
+/**
+ * @brief     This function servers to disable the PWM revert function.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_n_invert_dis(pwm_id_e id){
+	BM_CLR(reg_pwm_n_invert, BIT(id));
+}
+
+
+/**
+ * @brief     This function servers to enable the pwm polarity.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_set_polarity_en(pwm_id_e id){
+		BM_SET(reg_pwm_pol, BIT(id));
+}
+
+
+/**
+ * @brief     This function servers to disable the pwm polarity.
+ * @param[in] id - variable of enum to select the pwm number.
+ * @return	  none.
+ */
+static inline void pwm_set_polarity_dis(pwm_id_e id){
+		BM_CLR(reg_pwm_pol, BIT(id));
+}
+
+
+/**
+ * @brief     This function servers to enable the pwm interrupt.
+ * @param[in] mask - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_set_irq_mask(pwm_irq_e mask){
+
+	if(mask==FLD_PWM0_IR_FIFO_IRQ)
+	{
+		BM_SET(reg_pwm_irq_mask(1), BIT(0));
+	}
+	else
+	{
+		BM_SET(reg_pwm_irq_mask(0), mask);
+	}
+
+}
+
+
+/**
+ * @brief     This function servers to disable the pwm interrupt function.
+ * @param[in] mask - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_clr_irq_mask(pwm_irq_e mask){
+
+	if(mask==FLD_PWM0_IR_FIFO_IRQ)
+	{
+		BM_CLR(reg_pwm_irq_mask(1), BIT(0));
+	}
+	else
+	{
+		BM_CLR(reg_pwm_irq_mask(0), mask);
+	}
+
+}
+
+
+/**
+ * @brief     This function servers to get the pwm interrupt status.
+ * @param[in] status - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline unsigned char pwm_get_irq_status(pwm_irq_e status){
+
+	if(status==FLD_PWM0_IR_FIFO_IRQ)
+	{
+		return (reg_pwm_irq_sta(1) & BIT(0));
+	}
+	else
+	{
+		return (reg_pwm_irq_sta(0) & status);
+	}
+
+}
+
+
+/**
+ * @brief     This function servers to clear the pwm interrupt.When a PWM interrupt occurs, the corresponding interrupt flag bit needs to be cleared manually.
+ * @param[in] status  - variable of enum to select the pwm interrupt source.
+ * @return	  none.
+ */
+static inline void pwm_clr_irq_status(pwm_irq_e status){
+
+	if(status==FLD_PWM0_IR_FIFO_IRQ)
+	{
+		reg_pwm_irq_sta(1) = status;
+	}
+	else
+	{
+		reg_pwm_irq_sta(0) = status;
+	}
+
+}
+
+
+/**
+ * @brief     This function servers to set pwm0 mode.
+ * @param[in] mode - variable of enum to indicates the pwm mode.
+ * @return	  none.
+ */
+static inline void pwm_set_pwm0_mode(pwm_mode_e  mode){
+		reg_pwm0_mode = mode;  //only PWM0 has count/IR/fifo IR mode
+}
+
+
+/**
+ * @brief     This function servers to set pwm cycle time & count status.
+ * @param[in] max_tick - variable of the cycle time.
+ * @param[in] cmp_tick - variable of the CMP.
+ * @return	  none.
+ */
+static inline void pwm_set_pwm0_tcmp_and_tmax_shadow(unsigned short max_tick, unsigned short cmp_tick)
+{
+	reg_pwm_tcmp0_shadow = cmp_tick;
+	reg_pwm_tmax0_shadow = max_tick;
+}
+
+
+/**
+ * @brief     This function servers to set the pwm0 pulse number.
+ * @param[in] pulse_num - variable of the pwm pulse number.The maximum bits is 14bits.
+ * @return	  none.
+ */
+static inline void pwm_set_pwm0_pulse_num(unsigned short pulse_num){
+		reg_pwm0_pulse_num = pulse_num;
+
+}
+
+
+/**
+ * @brief     This function serves to set trigger level of interrupt for IR FiFo mode
+ * @param[in] trig_level - FIFO  num int trigger level.When fifo numbers is less than this value.It's will take effect.
+ * @return	  none
+ */
+static inline void pwm_set_pwm0_ir_fifo_irq_trig_level(unsigned char trig_level)
+{
+	reg_pwm_ir_fifo_irq_trig_level = trig_level;
+}
+
+
+/**
+ * @brief     This function serves to clear data in fifo. Only when pwm is in not active mode,
+ * 			  it is possible to clear data in fifo.
+ * @return	  none
+ */
+static inline void pwm_clr_pwm0_ir_fifo(void)
+{
+	reg_pwm_ir_clr_fifo_data |= FLD_PWM0_IR_FIFO_CLR_DATA;
+}
+
+
+/**
+ * @brief     This function serves to get the number of data in fifo.
+ * @return	  the number of data in fifo
+ */
+static inline unsigned char pwm_get_pwm0_ir_fifo_data_num(void)//????TODO
+{
+	return (reg_pwm_ir_fifo_data_status & FLD_PWM0_IR_FIFO_DATA_NUM);
+}
+
+
+/**
+ * @brief     This function serves to determine whether data in fifo is empty.
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_get_pwm0_ir_fifo_is_empty(void)
+{
+	return (reg_pwm_ir_fifo_data_status & FLD_PWM0_IR_FIFO_EMPTY);
+}
+
+
+/**
+ * @brief     This function serves to determine whether data in fifo is full.
+ * @return	  yes: 1 ,no: 0;
+ */
+static inline unsigned char pwm_get_pwm0_ir_fifo_is_full(void)
+{
+	return (reg_pwm_ir_fifo_data_status&FLD_PWM0_IR_FIFO_FULL);
+}
+
+
+/**
+ * @brief     This function serves to configure the pwm's dma wave form.
+ * @param[in] pulse_num - the number of pulse.
+ * @param[in] shadow_en - whether enable shadow mode.
+ * @param[in] carrier_en - must 1 or 0.
+ * @return	  none.
+ */
+static inline unsigned short pwm_cal_pwm0_ir_fifo_cfg_data(unsigned short pulse_num, unsigned char shadow_en, unsigned char carrier_en)
+{
+	return  ( carrier_en<<15 | (shadow_en<<14) | (pulse_num & 0x3fff) );
+}
+
+
+/**
+ * @brief     This function serves to write data into FiFo
+ * @param[in] pulse_num  - the number of pulse
+ * @param[in] use_shadow - determine whether the configuration of shadow cmp and shadow max is used
+ * 						   1: use shadow, 0: not use
+ * @param[in] carrier_en - enable sending carrier, 1: enable, 0: disable
+ * @return	  none
+ */
+static inline void pwm_set_pwm0_ir_fifo_cfg_data(unsigned short pulse_num, unsigned char use_shadow, unsigned char carrier_en)
+{
+	static unsigned char index=0;
+	unsigned short cfg_data = pwm_cal_pwm0_ir_fifo_cfg_data(pulse_num,use_shadow,carrier_en);
+	while(pwm_get_pwm0_ir_fifo_is_full());
+	reg_pwm_ir_fifo_dat(index) = cfg_data;
+	index++;
+	index&=0x01;
+}
+
+
+/**
+ * @brief     This function servers to configure DMA channel and some configures.
+ * @param[in] chn - to select the DMA channel.
+ * @return    none
+ * @note      In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *            If you must do this, you must perform the following sequence:
+ *            1. dma_chn_dis(chn) 2.pwm_reset()3.pwm_set_dma_buf()/pwm_ir_dma_mode_start()
+ */
+void pwm_set_dma_config(dma_chn_e chn);
+
+
+/**
+ * @brief     This function servers to configure DMA channel address and length.
+ * @param[in] chn - to select the DMA channel.
+ * @param[in] buf_addr - the address where DMA need to get data from SRAM.
+ * @param[in] len - the length of data in SRAM.
+ * @return    none
+ */
+void pwm_set_dma_buf(dma_chn_e chn,unsigned int buf_addr,unsigned int len);
+
+
+/**
+ * @brief     This function servers to enable DMA channel.
+ * @param[in] chn - to select the DMA channel.
+ * @return    none
+ */
+void pwm_ir_dma_mode_start(dma_chn_e chn);
+
+
+
+/**
+ * @brief     This function servers to configure DMA head node.
+ * @param[in] chn - to select the DMA channel.
+ * @param[in] src_addr - to configure DMA source address.
+ * @param[in] data_len - to configure DMA length.
+ * @param[in] head_of_list - to configure the address of the next node configure.
+ * @return    none
+ */
+void pwm_set_dma_chain_llp(dma_chn_e chn,unsigned short * src_addr, unsigned int data_len,dma_chain_config_t * head_of_list);
+
+
+
+
+/**
+ * @brief     This function servers to configure DMA cycle chain node.
+ * @param[in] chn - to select the DMA channel.
+ * @param[in] config_addr  - to servers to configure the address of the current node.
+ * @param[in] llponit - to configure the address of the next node configure.
+ * @param[in] src_addr - to configure DMA source address.
+ * @param[in] data_len - to configure DMA length.
+ * @return    none
+ */
+void pwm_set_tx_dma_add_list_element(dma_chn_e chn,dma_chain_config_t *config_addr,dma_chain_config_t *llponit ,unsigned short * src_addr,unsigned int data_len);
+
+
+/**
+ * @brief     This function servers to disable pwm clock source 32K.
+ *    	      If you use 32K as the PWM clock source, you can work in suspend mode.
+ *    	      but the 32K clock source cannot be divided and can only work in continuous mode and counting mode
+ * @param[in] pwm_32K_en_chn - This variable is used to select the specific PWM channel.
+ * @return	  none.
+ */
+
+static inline void pwm_32k_chn_dis(pwm_clk_32k_en_chn_e pwm_32K_en_chn)
+{
+    BM_CLR(reg_pwm_mode32k, pwm_32K_en_chn);
+}
+
+/**
+ * @brief      This function reset pwm module,all pwm logic will be reset.
+ * @return     none
+ */
+static inline void pwm_reset(void)
+{
+	reg_rst0 &= (~FLD_RST0_PWM );
+	reg_rst0 |=FLD_RST0_PWM;
+}
+
+#endif
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/adc_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/adc_reg.h
new file mode 100644
index 00000000..91fcd00b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/adc_reg.h
@@ -0,0 +1,96 @@
+/********************************************************************************************************
+ * @file	adc_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef ADC_REG_H
+#define ADC_REG_H
+#include "soc.h"
+
+#define areg_adc_clk_setting 0x82
+enum
+{
+	FLD_CLK_24M_TO_SAR_EN = BIT(6),
+};
+
+#define areg_adc_vref					0xea
+enum{
+	FLD_ADC_VREF_CHN_M = 		       BIT_RNG(0,1),
+};
+#define areg_adc_ain_chn_misc			0xeb
+enum{
+	FLD_ADC_AIN_NEGATIVE = 		        BIT_RNG(0,3),
+	FLD_ADC_AIN_POSITIVE = 		        BIT_RNG(4,7),
+};
+#define areg_adc_res_m					0xec
+enum{
+	FLD_ADC_RES_M         =             BIT_RNG(0,1),
+	FLD_ADC_EN_DIFF_CHN_M =          	BIT(6),
+};
+#define areg_adc_tsmaple_m				0xee
+enum{
+	FLD_ADC_TSAMPLE_CYCLE_CHN_M = 		BIT_RNG(0,3),
+};
+#define areg_r_max_mc					0xef
+enum{
+	FLD_R_MAX_MC0	= 			BIT_RNG(0,7),//0xef<7:0>  r_max_mc[7:0]
+};
+#define	areg_r_max_s					0xf1
+enum{
+	FLD_R_MAX_S		=			BIT_RNG(0,3),//0xf1<3:0>  r_max_s
+	FLD_R_MAX_MC1	= 			BIT_RNG(6,7),//0xf1<7:6>  r_max_mc[9:8]
+};
+#define areg_adc_chn_en					0xf2
+enum{
+	FLD_ADC_CHN_EN_M	= 		BIT(2),
+	FLD_ADC_MAX_SCNT	=		BIT_RNG(4,5),
+};
+#define areg_adc_data_sample_control	0xf3
+enum{
+	FLD_NOT_SAMPLE_ADC_DATA 		= BIT(0),
+};
+#define areg_adc_sample_clk_div		0xf4
+enum{
+	FLD_ADC_SAMPLE_CLK_DIV  = 	       BIT_RNG(0,2),
+};
+#define areg_adc_misc_l					0xf7
+#define areg_adc_misc_h					0xf8
+#define areg_adc_vref_vbat_div			0xf9
+enum{
+	FLD_ADC_VREF_VBAT_DIV   = 	        BIT_RNG(2,3),
+};
+#define areg_ain_scale					0xfa
+enum{
+	FLD_ADC_ITRIM_PREAMP 	= 	BIT_RNG(0,1),
+	FLD_ADC_ITRIM_VREFBUF	= 	BIT_RNG(2,3),
+	FLD_ADC_ITRIM_VCMBUF	= 	BIT_RNG(4,5),
+	FLD_SEL_AIN_SCALE 		= 	BIT_RNG(6,7),
+};
+#define areg_adc_pga_ctrl				0xfc
+enum{
+	FLD_SAR_ADC_POWER_DOWN 		= BIT(5),
+};
+#define areg_temp_sensor_ctrl 0x00
+enum{
+	FLD_TEMP_SENSOR_POWER_DOWN = BIT(4),
+};
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/aes_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/aes_reg.h
new file mode 100644
index 00000000..4374d89e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/aes_reg.h
@@ -0,0 +1,56 @@
+/********************************************************************************************************
+ * @file	aes_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef _AES_REG_H_
+#define _AES_REG_H_
+
+#include "soc.h"
+
+
+#define reg_aes_mode     			REG_ADDR32(0x1600b0)
+enum{
+	FLD_AES_START	=	BIT(0),
+	FLD_AES_MODE	=	BIT(1),   /**< 0-ciher  1-deciher */
+};
+
+#define reg_embase_addr     		REG_ADDR32(0x140b04)
+
+#define	reg_aes_irq_mask			REG_ADDR32(0x16000c)
+
+#define reg_aes_irq_status			REG_ADDR32(0x160010)
+
+#define reg_aes_clr_irq_status		REG_ADDR32(0x160018)
+/**
+ *  @brief  Define AES IRQ
+ */
+typedef enum{
+	FLD_CRYPT_IRQ		= BIT(7),
+}aes_irq_e;
+
+
+#define reg_aes_key(v)     			REG_ADDR32(0x1600b4+(v*4))
+
+#define reg_aes_ptr     			REG_ADDR32(0x1600c4)
+
+#endif /* _AES_REG_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/analog_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/analog_reg.h
new file mode 100644
index 00000000..a158435f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/analog_reg.h
@@ -0,0 +1,67 @@
+/********************************************************************************************************
+ * @file	analog_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef ANALOG_REG_H
+#define ANALOG_REG_H
+#include "soc.h"
+/*******************************      alg  registers: 140180      ******************************/
+#define ALG_BASE_ADDR			   0x140180
+#define reg_ana_addr			REG_ADDR8(ALG_BASE_ADDR)
+#define reg_ana_ctrl			REG_ADDR8(ALG_BASE_ADDR+0x02)
+enum
+{
+	//FLD_ANA_TX_EN         = BIT(0),
+	FLD_ANA_RX_EN         = BIT(1),
+	FLD_ANA_MASKX_TX_DONE = BIT(2),
+	FLD_ANA_MASKX_RX_DONE = BIT(3),
+	FLD_ANA_CONTIU_ACC    = BIT(4),
+	FLD_ANA_RW            = BIT(5),   /**< 1:write,0:read */
+	FLD_ANA_CYC           = BIT(6),
+	FLD_ANA_BUSY          = BIT(7),
+};
+#define reg_ana_len             REG_ADDR8(ALG_BASE_ADDR+0x03)
+#define reg_ana_data(n)			REG_ADDR8(ALG_BASE_ADDR+0x04+(n))
+#define reg_ana_addr_data16		REG_ADDR16(ALG_BASE_ADDR+0x04)
+#define reg_ana_addr_data32		REG_ADDR32(ALG_BASE_ADDR+0x04)
+
+#define reg_ana_sta             REG_ADDR8(ALG_BASE_ADDR+0x09)
+enum
+{
+	FLD_ANA_RX_DONE    = BIT(7),
+};
+#define reg_ana_irq_sta         REG_ADDR8(ALG_BASE_ADDR+0x0a)
+enum
+{
+	FLD_ANA_TXBUFF_IRQ    = BIT(0),
+	FLD_ANA_RXBUFF_IRQ    = BIT(1),
+};
+#define reg_ana_dma_ctl         REG_ADDR8(ALG_BASE_ADDR+0x0b)
+enum
+{
+	FLD_ANA_CYC1           = BIT(0),
+	FLD_ANA_DMA_EN         = BIT(1),
+
+};
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/audio_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/audio_reg.h
new file mode 100644
index 00000000..b264c5e3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/audio_reg.h
@@ -0,0 +1,524 @@
+/********************************************************************************************************
+ * @file	audio_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef AUDIO_REG_H
+#define AUDIO_REG_H
+#include "soc.h"
+
+#define 	REG_AUDIO_AHB_BASE		    0x80120000
+#define 	REG_CODEC_BASE_ADDR		    0x120200
+#define 	REG_AUDIO_APB_BASE		    0x140500
+#define 	reg_fifo_buf_adr(i) 		REG_AUDIO_AHB_BASE+(i)*0x40
+#define     reg_audio_en				    REG_ADDR8(REG_AUDIO_APB_BASE+0x00)
+
+#define reg_audio_codec_reg(x)			REG_ADDR8(REG_CODEC_BASE_ADDR+((x)<<2))
+
+
+enum
+{
+	FLD_AUDIO_I2S_CLK_EN               =  BIT(0),
+	FLD_AUDIO_CLK_DIV2                 =  BIT(1),
+	FLD_AUDIO_MC_CLK_EN                =  BIT(2),
+	FLD_AUDIO_MC_CLK_INV_O             =  BIT(3),
+};
+
+#define   reg_i2s_cfg		         REG_ADDR8(REG_AUDIO_APB_BASE+0x01)
+enum
+{
+	FLD_AUDIO_I2S_FORMAT                  =  BIT_RNG(0,1),
+	FLD_AUDIO_I2S_WL                      =  BIT_RNG(2,3),
+	FLD_AUDIO_I2S_LRP                     =  BIT(4),
+	FLD_AUDIO_I2S_LRSWAP                  =  BIT(5),
+	FLD_AUDIO_I2S_ADC_DCI_MS              =  BIT(6),
+	FLD_AUDIO_I2S_DAC_DCI_MS              =  BIT(7),
+};
+
+#define   reg_i2s_cfg2		         REG_ADDR8(REG_AUDIO_APB_BASE+0x02)
+
+enum
+{
+	FLD_AUDIO_FIFO1_RST                     =  BIT(3),
+};
+#define   reg_audio_ctrl				    REG_ADDR8(REG_AUDIO_APB_BASE+0x03)
+enum
+{
+	FLD_AUDIO_I2S_CMODE                  =  BIT_RNG(0,1),
+	FLD_AUDIO_CODEC_I2S_SEL              =  BIT(2),
+	FLD_AUDIO_I2S_OUT_BIT_SEL            =  BIT(3),
+};
+
+#define   reg_audio_tune				    REG_ADDR8(REG_AUDIO_APB_BASE+0x04)
+enum
+{
+	FLD_AUDIO_I2S_I2S_AIN0_COME            =  BIT_RNG(0,1),
+	FLD_AUDIO_I2S_I2S_AIN1_COME            =  BIT_RNG(2,3),
+	FLD_AUDIO_I2S_I2S_AOUT_COME            =  BIT_RNG(4,6),
+};
+
+
+#define   reg_audio_sel				    REG_ADDR8(REG_AUDIO_APB_BASE+0x05)
+enum
+{
+	FLD_AUDIO_AIN0_SEL             =  BIT_RNG(0,1),
+	FLD_AUDIO_AOUT0_SEL            =  BIT_RNG(2,3),
+	FLD_AUDIO_AIN1_SEL             =  BIT_RNG(4,5),
+	FLD_AUDIO_AOUT1_SEL            =  BIT_RNG(6,7),
+};
+
+#define   reg_audio_i2c_addr			    REG_ADDR8(REG_AUDIO_APB_BASE+0x08)
+#define   reg_audio_i2c_mode			    REG_ADDR8(REG_AUDIO_APB_BASE+0x09)
+
+#define   reg_fifo_trig0				    REG_ADDR8(REG_AUDIO_APB_BASE+0x0a)
+
+#define   reg_audio_ptr_set			   	    REG_ADDR8(REG_AUDIO_APB_BASE+0x10)
+enum
+{
+	FLD_AUDIO_TX_PTR_SEL                 =  BIT(0),
+	FLD_AUDIO_RX_PTR_SEL                 =  BIT(4),
+};
+
+#define   reg_audio_ptr_en			    REG_ADDR8(REG_AUDIO_APB_BASE+0x11)
+enum
+{
+	FLD_AUDIO_TX_WPTR_PTR_EN                 =  BIT(0),
+	FLD_AUDIO_TX_RPTR_PTR_EN                 =  BIT(1),
+	FLD_AUDIO_RX_WPTR_PTR_EN                 =  BIT(2),
+	FLD_AUDIO_RX_RPTR_PTR_EN                 =  BIT(3),
+
+};
+
+enum
+{
+	FLD_AUDIO_FIFO_AOUT0_TRIG_NUM        =  BIT_RNG(0,3),
+	FLD_AUDIO_FIFO_AIN0_TRIG_NUM         =  BIT_RNG(4,7),
+};
+
+#define   fifo_trig1				    REG_ADDR8(REG_AUDIO_APB_BASE+0x0b)
+
+enum
+{
+	FLD_AUDIO_FIFO_AOUT1_TRIG_NUM        =  BIT_RNG(0,3),
+	FLD_AUDIO_FIFO_AIN1_TRIG_NUM         =  BIT_RNG(4,7),
+};
+
+#define   reg_tx_wptr			    REG_ADDR16(REG_AUDIO_APB_BASE+0x20)
+#define   reg_tx_rptr			    REG_ADDR16(REG_AUDIO_APB_BASE+0x22)
+
+#define   reg_tx_max			    REG_ADDR16(REG_AUDIO_APB_BASE+0x26)
+
+#define   reg_rx_rptr			    REG_ADDR16(REG_AUDIO_APB_BASE+0x2a)
+#define   reg_rx_wptr			    REG_ADDR16(REG_AUDIO_APB_BASE+0x28)
+
+#define   reg_rx_max			    REG_ADDR16(REG_AUDIO_APB_BASE+0x2e)
+
+#define   reg_th0_h1			    REG_ADDR16(REG_AUDIO_APB_BASE+0x30)//tx
+#define   reg_th0_l1			    REG_ADDR16(REG_AUDIO_APB_BASE+0x32)//tx
+
+#define   reg_th0_h2			    REG_ADDR16(REG_AUDIO_APB_BASE+0x38)//tx
+#define   reg_th0_l2			    REG_ADDR16(REG_AUDIO_APB_BASE+0x3a)//tx
+
+
+#define   reg_th1_h1			    REG_ADDR16(REG_AUDIO_APB_BASE+0x40)//rx
+#define   reg_th1_l1			    REG_ADDR16(REG_AUDIO_APB_BASE+0x42)//rx
+
+#define   reg_th1_h2			    REG_ADDR16(REG_AUDIO_APB_BASE+0x48)//rx
+#define   reg_th1_l2			    REG_ADDR16(REG_AUDIO_APB_BASE+0x4a)//rx
+
+
+
+#define   reg_irq_fifo_state        REG_ADDR8(REG_AUDIO_APB_BASE+0x5c)
+typedef enum
+{
+	FLD_AUDIO_IRQ_TXFIFO_L_L1           =  BIT(0),
+	FLD_AUDIO_IRQ_TXFIFO_H_L1           =  BIT(1),
+	FLD_AUDIO_IRQ_TXFIFO_L_L2           =  BIT(2),
+	FLD_AUDIO_IRQ_TXFIFO_H_L2           =  BIT(3),
+
+	FLD_AUDIO_IRQ_RXFIFO_L_L1           =  BIT(4),
+	FLD_AUDIO_IRQ_RXFIFO_H_L1           =  BIT(5),
+	FLD_AUDIO_IRQ_RXFIFO_L_L2           =  BIT(6),
+	FLD_AUDIO_IRQ_RXFIFO_H_L2           =  BIT(7),
+
+}audio_fifo_irq_status_type_e;
+
+#define   reg_irq_fifo_mask        REG_ADDR8(REG_AUDIO_APB_BASE+0x5d)
+
+typedef enum
+{
+	FLD_AUDIO_IRQ_TXFIFO_L_L1_EN           =  BIT(0),
+	FLD_AUDIO_IRQ_TXFIFO_H_L1_EN           =  BIT(1),
+	FLD_AUDIO_IRQ_TXFIFO_L_L2_EN           =  BIT(2),
+	FLD_AUDIO_IRQ_TXFIFO_H_L2_EN           =  BIT(3),
+
+	FLD_AUDIO_IRQ_RXFIFO_L_L1_EN           =  BIT(4),
+	FLD_AUDIO_IRQ_RXFIFO_H_L1_EN           =  BIT(5),
+	FLD_AUDIO_IRQ_RXFIFO_L_L2_EN           =  BIT(6),
+	FLD_AUDIO_IRQ_RXFIFO_H_L2_EN           =  BIT(7),
+
+}audio_fifo_irq_mask_type_e;
+
+
+
+#define   reg_irq_manual_en		   REG_ADDR8(REG_AUDIO_APB_BASE+0x5e)
+enum
+{
+	FLD_AUDIO_IRQ_TXFIFO_L_L1_MAN_EN           =  BIT(0),
+	FLD_AUDIO_IRQ_TXFIFO_H_L1_MAN_EN           =  BIT(1),
+	FLD_AUDIO_IRQ_TXFIFO_L_L2_MAN_EN           =  BIT(2),
+	FLD_AUDIO_IRQ_TXFIFO_H_L2_MAN_EN           =  BIT(3),
+
+	FLD_AUDIO_IRQ_RXFIFO_L_L1_MAN_EN           =  BIT(4),
+	FLD_AUDIO_IRQ_RXFIFO_H_L1_MAN_EN           =  BIT(5),
+	FLD_AUDIO_IRQ_RXFIFO_L_L2_MAN_EN           =  BIT(6),
+	FLD_AUDIO_IRQ_RXFIFO_H_L2_MAN_EN           =  BIT(7)
+
+};
+
+#define   reg_int_pcm_num           REG_ADDR16(REG_AUDIO_APB_BASE+0x50)
+#define   reg_dec_pcm_num           REG_ADDR16(REG_AUDIO_APB_BASE+0x52)
+
+#define   reg_pcm_clk_num			REG_ADDR8(REG_AUDIO_APB_BASE+0x54)
+
+
+
+#define   reg_audio_codec_stat_ctr          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x00<<2))
+#define   addr_audio_codec_stat_ctr         0x00
+enum
+{
+	FLD_AUDIO_CODEC_ADC12_LOCKED        =  BIT(3),
+	FLD_AUDIO_CODEC_DAC_LOCKED        	=  BIT(4),
+	FLD_AUDIO_CODEC_PON_ACK      	    =  BIT(7),
+};
+
+
+#define   reg_audio_codec_stat2_ctr          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x01<<2))
+#define   addr_audio_codec_stat2_ctr         0x01
+enum
+{
+	FLD_AUDIO_CODEC_ADC12_SMUTE_IN_PROG =  BIT(6),
+	FLD_AUDIO_CODEC_DAC_SMUTE_IN_PROG  	=  BIT(7),
+};
+
+
+#define   reg_audio_codec_vic_ctr          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x06<<2))
+#define   addr_audio_codec_vic_ctr          0x06
+enum
+{
+	FLD_AUDIO_CODEC_SB           	    =  BIT(0),
+	FLD_AUDIO_CODEC_SB_ANALOG        	=  BIT(1),
+	FLD_AUDIO_CODEC_SLEEP_ANALOG        =  BIT(2),
+};
+
+
+
+#define   reg_audio_codec_dac_itf_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x08<<2))
+#define   addr_audio_codec_dac_itf_ctr           0x08
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AUDIOIF         =  BIT_RNG(0,1),
+	FLD_AUDIO_CODEC_SB_AICR_DAC        	=  BIT(4),
+	FLD_AUDIO_CODEC_DAC_SLAVE        	=  BIT(5),
+	FLD_AUDIO_CODEC_DAC_ADWL            =  BIT_RNG(6,7),
+};
+
+#define   reg_audio_codec_adc_itf_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x09<<2))
+#define   addr_audio_codec_adc_itf_ctr           0x09
+enum
+{
+	FLD_AUDIO_CODEC_FORMAT              =  BIT_RNG(0,1),
+	FLD_AUDIO_CODEC_DAC_ITF_SB          =  BIT(4),
+	FLD_AUDIO_CODEC_SLAVE        	    =  BIT(5),
+	FLD_AUDIO_CODEC_WL           	    =  BIT_RNG(6,7),
+};
+
+#define   reg_audio_codec_adc2_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x0a<<2))
+#define   addr_audio_codec_adc2_ctr          0x0a
+enum
+{
+	FLD_AUDIO_CODEC_ADC12_SB              =  BIT(0),
+};
+
+#define   reg_audio_codec_dac_freq_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x0b<<2))
+#define   addr_audio_codec_dac_freq_ctr           0x0b
+enum
+{
+	FLD_AUDIO_CODEC_DAC_FREQ                   =   BIT_RNG(0,3),
+};
+
+#define   reg_audio_codec_adc_wnf_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x0e<<2))
+#define   addr_audio_codec_adc_wnf_ctr           0x0e
+enum
+{
+	FLD_AUDIO_CODEC_ADC12_WNF                   =   BIT_RNG(0,1),
+};
+
+
+
+#define   reg_audio_codec_adc_freq_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x0f<<2))
+#define   addr_audio_codec_adc_freq_ctr          0x0f
+enum
+{
+	FLD_AUDIO_CODEC_ADC_FREQ       	    =  BIT_RNG(0,3),
+	FLD_AUDIO_CODEC_ADC12_HPF_EN        =  BIT(4),
+};
+
+
+
+#define   reg_audio_dmic_12           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x10<<2))
+#define   addr_audio_dmic_12          0x10
+enum
+{
+	FLD_AUDIO_CODEC_ADC_DMIC_SEL2      =  BIT_RNG(0,1),
+	FLD_AUDIO_CODEC_ADC_DMIC_SEL1      =  BIT_RNG(2,3),
+	FLD_AUDIO_CODEC_DMIC2_SB           =  BIT(6),
+	FLD_AUDIO_CODEC_DMIC1_SB           =  BIT(7),
+};
+
+
+#define   reg_audio_codec_hpl_gain          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x15<<2))
+#define   addr_audio_codec_hpl_gain          0x15
+
+enum
+{
+	FLD_AUDIO_CODEC_HPL_GOL       =  BIT_RNG(0,4),
+	FLD_AUDIO_CODEC_HPL_LRGO      =  BIT(7),
+};
+
+#define   reg_audio_codec_hpr_gain           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x16<<2))
+#define   addr_audio_codec_hpr_gain           0x16
+enum
+{
+	FLD_AUDIO_CODEC_HPR_GOR        =  BIT_RNG(0,4),
+};
+
+
+#define   reg_audio_codec_mic1_ctr          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x17<<2))
+#define   addr_audio_codec_mic1_ctr          0x17
+
+enum
+{
+	FLD_AUDIO_CODEC_MIC1_SEL          =  BIT(0),
+	FLD_AUDIO_CODEC_MICBIAS1_SB       =  BIT(5),
+	FLD_AUDIO_CODEC_MIC_DIFF1         =  BIT(6),
+	FLD_AUDIO_CODEC_MICBIAS1_V        =  BIT(7),
+};
+
+#define   reg_audio_codec_mic2_ctr          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x18<<2))
+#define   addr_audio_codec_mic2_ctr          0x18
+enum
+{
+	FLD_AUDIO_CODEC_MIC2_SEL          =  BIT(0),
+	FLD_AUDIO_CODEC_MIC_DIFF2         =  BIT(6),
+};
+
+
+
+#define   reg_audio_codec_dacl_gain          REG_ADDR8(REG_CODEC_BASE_ADDR+(0x2a<<2))
+#define   addr_audio_codec_dacl_gain         0x2a
+enum
+{
+	FLD_AUDIO_CODEC_DAC_GODL        =  BIT_RNG(0,5),
+	FLD_AUDIO_CODEC_DAC_LRGOD      =  BIT(7),
+};
+
+#define   reg_audio_codec_dacr_gain           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x2b<<2))
+#define   addr_audio_codec_dacr_gain           0x2b
+enum
+{
+	FLD_AUDIO_CODEC_DAC_GODR        =  BIT_RNG(0,5),
+};
+
+#define   reg_audio_codec_mic_l_R_gain           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x1f<<2))
+#define   addr_audio_codec_mic_l_R_gain          0x1f
+enum
+{
+	FLD_AUDIO_CODEC_AMIC_L_GAIN        =  BIT_RNG(0,2),
+	FLD_AUDIO_CODEC_AMIC_R_GAIN        =  BIT_RNG(3,5),
+};
+
+
+#define   reg_audio_codec_dac_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x23<<2))
+#define   addr_audio_codec_dac_ctr           0x23
+enum
+{
+	FLD_AUDIO_CODEC_DAC_SB               =  BIT(4),
+	FLD_AUDIO_CODEC_DAC_LEFT_ONLY        =  BIT(5),
+	FLD_AUDIO_CODEC_DAC_SOFT_MUTE        =  BIT(7),
+};
+
+
+
+#define   reg_audio_codec_adc12_ctr           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x24<<2))
+#define   addr_audio_codec_adc12_ctr           0x24
+enum
+{
+	FLD_AUDIO_CODEC_ADC1_SB              =  BIT(4),
+	FLD_AUDIO_CODEC_ADC2_SB              =  BIT(5),
+	FLD_AUDIO_CODEC_ADC12_SOFT_MUTE      =  BIT(7),
+};
+
+
+#define   reg_audio_adc1_gain           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x2c<<2))
+#define   addr_audio_adc1_gain           0x2c
+enum
+{
+	FLD_AUDIO_CODEC_ADC_GID1       =  BIT_RNG(0,5),
+	FLD_AUDIO_CODEC_ADC_LRGID      =  BIT(7),
+};
+
+#define   reg_audio_adc2_gain           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x2d<<2))
+#define   addr_audio_adc2_gain           0x2d
+enum
+{
+	FLD_AUDIO_CODEC_ADC_GID2    =  BIT_RNG(0,5),
+
+};
+
+
+#define   reg_audio_mix_dac_l           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x34<<2))
+#define   addr_reg_audio_mix_dac_l          0x34
+enum
+{
+	FLD_AUDIO_CODEC_DAC_MIXER_GAIN_L        =  BIT_RNG(0,4),
+	FLD_AUDIO_CODEC_DAC_MIXER_GAIN_SEL      =  BIT(7),
+};
+
+#define   reg_audio_mix_dac_r           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x35<<2))
+#define   addr_reg_audio_mix_dac_r          0x35
+enum
+{
+	FLD_AUDIO_CODEC_DAC_MIXER_GAIN_R        =  BIT_RNG(0,4),
+};
+
+
+#define   reg_audio_mix_adc_l           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x36<<2))
+#define   addr_reg_audio_mix_adc_l          0x36
+enum
+{
+	FLD_AUDIO_CODEC_ADC_MIXER_GAIN_L        =  BIT_RNG(0,4),
+	FLD_AUDIO_CODEC_ADC_MIXER_GAIN_SEL      =  BIT(7),
+};
+
+#define   reg_audio_mix_adc_r           REG_ADDR8(REG_CODEC_BASE_ADDR+(0x37<<2))
+#define   addr_reg_audio_adc_dac_r          0x37
+enum
+{
+	FLD_AUDIO_CODEC_ADC_MIXER_GAIN_R        =  BIT_RNG(0,4),
+};
+//Indirect Register
+//AGC control Register
+#define reg_audio_dac_agc_cmd				REG_ADDR8(REG_CODEC_BASE_ADDR+(0x38<<2))
+#define	addr_audio_dac_agc_cmd				0x38
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AGC_ADD     =  BIT_RNG(0,5),
+	FLD_AUDIO_CODEC_DAC_AGC_LOAD    =  BIT(6),
+	FLD_AUDIO_CODEC_DAC_AGC_EN      =  BIT(7),
+};
+
+#define reg_audio_dac_agc_data				REG_ADDR8(REG_CODEC_BASE_ADDR+(0x39<<2))
+#define	addr_audio_dac_agc_data				0x39
+
+#define	ind_reg_audio_dac_agc_0					0x00
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AGC_LTHRES    	=  BIT_RNG(0,4),
+	FLD_AUDIO_CODEC_DAC_AGC_LR_DRC      =  BIT(7),
+};
+
+#define	ind_reg_audio_dac_agc_1					0x01
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AGC_LCOMP    	=  BIT_RNG(0,2),
+};
+
+#define	ind_reg_audio_dac_agc_2					0x02
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AGC_RTHRES    	=  BIT_RNG(0,4),
+};
+#define	ind_reg_audio_dac_agc_3					0x03
+enum
+{
+	FLD_AUDIO_CODEC_DAC_AGC_RCOMP    	=  BIT_RNG(0,2),
+};
+
+
+#define reg_audio_adc_agc_cmd				REG_ADDR8(REG_CODEC_BASE_ADDR+(0x3a<<2))
+#define	addr_audio_adc_agc_cmd				0x3a
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_ADD    =  BIT_RNG(0,5),
+	FLD_AUDIO_CODEC_ADC_AGC_LOAD      =  BIT(6),
+
+};
+
+#define reg_audio_adc_agc_data				REG_ADDR8(REG_CODEC_BASE_ADDR+(0x3b<<2))
+#define	addr_audio_adc_agc_data				0x3b
+
+
+
+
+
+#define	ind_reg_audio_agc_0					0x00
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_TARGET    	=  BIT_RNG(2,5),
+	FLD_AUDIO_CODEC_ADC_AGC_STEREO      =  BIT(6),
+};
+
+#define	ind_reg_audio_agc_1					0x01
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_HOLD    	=  BIT_RNG(0,3),
+	FLD_AUDIO_CODEC_ADC_AGC_NG_THR    	=  BIT_RNG(4,6),
+	FLD_AUDIO_CODEC_ADC_AGC_NG_EN      	=  BIT(7),
+};
+
+#define	ind_reg_audio_agc_2					0x02
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_DCY    	=  BIT_RNG(0,3),
+	FLD_AUDIO_CODEC_ADC_AGC_ATK    	=  BIT_RNG(4,7),
+};
+
+#define	ind_reg_audio_agc_3					0x03
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_MAX    	=  BIT_RNG(0,4),
+};
+
+#define	ind_reg_audio_agc_4					0x04
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_MIN    	=  BIT_RNG(0,4),
+};
+
+#define	ind_reg_audio_agc_5					0x05
+enum
+{
+	FLD_AUDIO_CODEC_ADC_AGC_EN      	=  BIT(1),
+};
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/dma_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/dma_reg.h
new file mode 100644
index 00000000..b537e55d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/dma_reg.h
@@ -0,0 +1,134 @@
+/********************************************************************************************************
+ * @file	dma_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef DMA_REG_H
+#define DMA_REG_H
+#include "soc.h"
+/*******************************    dma registers:  0x100400     ******************************/
+#define reg_dma_id					REG_ADDR32(0x100400)
+#define reg_dma_cfg					REG_ADDR32(0x100410)
+//enum{
+//	FLD_DMA_CHANNEL_NUM		= BIT_RNG(0,3),
+//	FLD_DMA_FIFO_DEPTH		= BIT_RNG(4,9),
+//	FLD_DMA_REQ_NUM			= BIT_RNG(10,14),
+//	FLD_DMA_REQ_SYNC		= BIT(30),
+//	FLD_DMA_CHANINXFR		= BIT(31),
+//};
+//in C99, FLD_DMA_CHANINXFR = BIT(31) is error
+#define	FLD_DMA_CHANNEL_NUM		= BIT_RNG(0,3),
+#define	FLD_DMA_FIFO_DEPTH		= BIT_RNG(4,9),
+#define	FLD_DMA_REQ_NUM			= BIT_RNG(10,14),
+#define	FLD_DMA_REQ_SYNC		= BIT(30),
+#define	FLD_DMA_CHANINXFR		= BIT(31),
+
+#define reg_dma_ctrl(i)				REG_ADDR32(( 0x00100444 +(i)*0x14))
+
+enum{
+	FLD_DMA_CHANNEL_ENABLE			= BIT(0),
+	FLD_DMA_CHANNEL_TC_MASK			= BIT(1),
+	FLD_DMA_CHANNEL_ERR_MASK		= BIT(2),
+	FLD_DMA_CHANNEL_ABT_MASK		= BIT(3),
+	FLD_DMA_CHANNEL_DST_REQ_SEL		= BIT_RNG(4,8),
+	FLD_DMA_CHANNEL_SRC_REQ_SEL		= BIT_RNG(9,13),
+	FLD_DMA_CHANNEL_DST_ADDR_CTRL	= BIT_RNG(14,15),
+	FLD_DMA_CHANNEL_SRC_ADDR_CTRL	= BIT_RNG(16,17),
+	FLD_DMA_CHANNEL_DST_MODE		= BIT(18),
+	FLD_DMA_CHANNEL_SRC_MODE		= BIT(19),
+	FLD_DMA_CHANNEL_DST_WIDTH		= BIT_RNG(20,21),
+	FLD_DMA_CHANNEL_SRC_WIDTH		= BIT_RNG(22,23),
+};
+
+#define reg_dma_ctr0(i)			    REG_ADDR8(( 0x00100444 +(i)*0x14))
+
+
+#define reg_dma_err_isr					REG_ADDR8(0x100430)
+#define reg_dma_abt_isr					REG_ADDR8(0x100431)
+#define reg_dma_tc_isr					REG_ADDR8(0x100432)
+
+enum{
+	FLD_DMA_CHANNEL0_IRQ		= BIT(0),
+	FLD_DMA_CHANNEL1_IRQ		= BIT(1),
+	FLD_DMA_CHANNEL2_IRQ		= BIT(2),
+	FLD_DMA_CHANNEL3_IRQ		= BIT(3),
+	FLD_DMA_CHANNEL4_IRQ		= BIT(4),
+	FLD_DMA_CHANNEL5_IRQ		= BIT(5),
+	FLD_DMA_CHANNEL6_IRQ		= BIT(6),
+	FLD_DMA_CHANNEL7_IRQ		= BIT(7),
+};
+
+
+
+
+
+#define reg_dma_ctr3(i)			    REG_ADDR8((0x00100447 +(i)*0x14))
+
+enum{
+	FLD_DMA_SRC_BURST_SIZE    		=	BIT_RNG(0,2),
+	FLD_DMA_R_NUM_EN    	        =	BIT(4),
+	FLD_DMA_PRIORITY    	        =	BIT(5),
+	FLD_DMA_W_NUM_EN   	            =	BIT(6),
+	FLD_DMA_AUTO_ENABLE_EN           =	BIT(7),
+};
+
+
+
+#define reg_dma_src_addr(i)			REG_ADDR32 (( 0x00100448 +(i)*0x14))
+#define reg_dma_dst_addr(i)			REG_ADDR32 (( 0x0010044c +(i)*0x14))
+#define reg_dma_size(i)			    REG_ADDR32 (( 0x00100450 +(i)*0x14))
+
+enum{
+	FLD_DMA_TX_SIZE    		=	BIT_RNG(0,21),
+	FLD_DMA_TX_SIZE_IDX    	=	BIT_RNG(22,23),
+};
+
+
+
+
+#define reg_dma_cr3_size(i)			(*(volatile unsigned long*) ( 0x00100452 +(i)*0x14))
+
+enum{
+	FLD_DMA_TSR2_SIZE_IDX    	=	BIT_RNG(6,7),
+};
+
+#define reg_dma_llp(i)			    REG_ADDR32 (( 0x00100454 +(i)*0x14))
+
+
+#define reg_dma_rx_wptr			REG_ADDR8(0x801004f4)
+#define reg_dma_tx_wptr			REG_ADDR8(0x80100500)
+
+enum{
+	FLD_DMA_WPTR_MASK =			BIT_RNG(0,4),
+};
+
+
+#define reg_dma_rx_rptr			REG_ADDR8(0x801004f5)
+#define reg_dma_tx_rptr			REG_ADDR8(0x80100501)
+enum{
+	FLD_DMA_RPTR_MASK =			BIT_RNG(0,4),
+	FLD_DMA_RPTR_SET =			BIT(5),
+	FLD_DMA_RPTR_NEXT =			BIT(6),
+	FLD_DMA_RPTR_CLR =			BIT(7),
+};
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/gpio_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/gpio_reg.h
new file mode 100644
index 00000000..c98f6b06
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/gpio_reg.h
@@ -0,0 +1,186 @@
+/********************************************************************************************************
+ * @file	gpio_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef GPIO_REG_H_
+#define GPIO_REG_H_
+#include "soc.h"
+/*******************************      gpio registers: 0x140300      ******************************/
+//PA
+#define reg_gpio_pa_setting1	REG_ADDR32(0x140300)
+#define reg_gpio_pa_in			REG_ADDR8(0x140300)
+#define reg_gpio_pa_ie			REG_ADDR8(0x140301)
+#define reg_gpio_pa_oen			REG_ADDR8(0x140302)
+#define reg_gpio_pa_out			REG_ADDR8(0x140303)
+
+#define reg_gpio_pa_setting2	REG_ADDR32(0x140304)
+#define reg_gpio_pa_pol			REG_ADDR8(0x140304)
+#define reg_gpio_pa_ds			REG_ADDR8(0x140305)
+#define reg_gpio_pa_gpio		REG_ADDR8(0x140306)
+#define reg_gpio_pa_irq_en		REG_ADDR8(0x140307)
+
+#define reg_gpio_pa_fs			REG_ADDR16(0x140330)
+#define reg_gpio_pa_fuc_l		REG_ADDR8(0x140330)
+#define reg_gpio_pa_fuc_h		REG_ADDR8(0x140331)
+
+//PB
+#define reg_gpio_pb_setting1	REG_ADDR32(0x140308)
+#define reg_gpio_pb_in			REG_ADDR8(0x140308)
+#define reg_gpio_pb_ie			REG_ADDR8(0x140309)
+#define reg_gpio_pb_oen			REG_ADDR8(0x14030a)
+#define reg_gpio_pb_out			REG_ADDR8(0x14030b)
+
+#define reg_gpio_pb_setting2	REG_ADDR32(0x14030c)
+#define reg_gpio_pb_pol			REG_ADDR8(0x14030c)
+#define reg_gpio_pb_ds			REG_ADDR8(0x14030d)
+#define reg_gpio_pb_gpio		REG_ADDR8(0x14030e)
+#define reg_gpio_pb_irq_en		REG_ADDR8(0x14030f)
+
+#define reg_gpio_pb_fs			REG_ADDR16(0x140332)
+#define reg_gpio_pb_fuc_l		REG_ADDR8(0x140332)
+#define reg_gpio_pb_fuc_h		REG_ADDR8(0x140333)
+
+//PC
+#define reg_gpio_pc_setting1	REG_ADDR32(0x140310)
+#define reg_gpio_pc_in			REG_ADDR8(0x140310)
+#define areg_gpio_pc_ie			0xbd
+#define areg_gpio_pc_pe			0xbe
+#define reg_gpio_pc_oen			REG_ADDR8(0x140312)
+#define reg_gpio_pc_out			REG_ADDR8(0x140313)
+
+#define reg_gpio_pc_setting2	REG_ADDR32(0x140314)
+#define reg_gpio_pc_pol			REG_ADDR8(0x140314)
+#define areg_gpio_pc_ds			0xbf
+#define reg_gpio_pc_gpio		REG_ADDR8(0x140316)
+#define reg_gpio_pc_irq_en		REG_ADDR8(0x140317)
+
+#define reg_gpio_pc_fs			REG_ADDR16(0x140334)
+#define reg_gpio_pc_fuc_l		REG_ADDR8(0x140334)
+#define reg_gpio_pc_fuc_h		REG_ADDR8(0x140335)
+
+//PD
+#define reg_gpio_pd_setting1	REG_ADDR32(0x140318)
+#define reg_gpio_pd_in			REG_ADDR8(0x140318)
+#define areg_gpio_pd_ie			0xc0
+#define areg_gpio_pd_pe			0xc1
+#define reg_gpio_pd_oen			REG_ADDR8(0x14031a)
+#define reg_gpio_pd_out			REG_ADDR8(0x14031b)
+
+#define reg_gpio_pd_setting2	REG_ADDR32(0x14031c)
+#define reg_gpio_pd_pol			REG_ADDR8(0x14031c)
+#define areg_gpio_pd_ds			0xc2
+#define reg_gpio_pd_gpio		REG_ADDR8(0x14031e)
+#define reg_gpio_pd_irq_en		REG_ADDR8(0x14031f)
+
+#define reg_gpio_pd_fs			REG_ADDR16(0x140336)
+#define reg_gpio_pd_fuc_l		REG_ADDR8(0x140336)//default 0xf0
+#define reg_gpio_pd_fuc_h		REG_ADDR8(0x140337)
+
+//PE
+#define reg_gpio_pe_setting1	REG_ADDR32(0x140320)
+#define reg_gpio_pe_in			REG_ADDR8(0x140320)
+#define reg_gpio_pe_ie			REG_ADDR8(0x140321)
+#define reg_gpio_pe_oen			REG_ADDR8(0x140322)
+#define reg_gpio_pe_out			REG_ADDR8(0x140323)
+
+#define reg_gpio_pe_setting2	REG_ADDR32(0x140324)
+#define reg_gpio_pe_pol			REG_ADDR8(0x140324)
+#define reg_gpio_pe_ds			REG_ADDR8(0x140325)
+#define reg_gpio_pe_gpio		REG_ADDR8(0x140326)
+#define reg_gpio_pe_irq_en		REG_ADDR8(0x140327)
+
+#define reg_gpio_pe_fs			REG_ADDR16(0x140350)
+#define reg_gpio_pe_fuc_l		REG_ADDR8(0x140350)
+#define reg_gpio_pe_fuc_h		REG_ADDR8(0x140351)
+
+//PF
+#define reg_gpio_pf_setting1	REG_ADDR32(0x140328)
+#define reg_gpio_pf_in			REG_ADDR8(0x140328)
+#define reg_gpio_pf_ie			REG_ADDR8(0x140329)
+#define reg_gpio_pf_oen			REG_ADDR8(0x14032a)
+#define reg_gpio_pf_out			REG_ADDR8(0x14032b)
+
+#define reg_gpio_pf_setting2	REG_ADDR32(0x14032c)
+#define reg_gpio_pf_ds			REG_ADDR8(0x14032d)
+#define reg_gpio_pf_gpio		REG_ADDR8(0x14032e)
+
+#define reg_gpio_pf_fs			REG_ADDR16(0x140356)
+#define reg_gpio_pf_fuc_l		REG_ADDR8(0x140356)
+#define reg_gpio_pf_fuc_h		REG_ADDR8(0x140357)
+
+#define reg_gpio_in(i)			REG_ADDR8(0x140300+((i>>8)<<3))
+#define reg_gpio_ie(i)			REG_ADDR8(0x140301+((i>>8)<<3))
+#define reg_gpio_oen(i)			REG_ADDR8(0x140302+((i>>8)<<3))
+#define reg_gpio_out(i)			REG_ADDR8(0x140303+((i>>8)<<3))
+#define reg_gpio_pol(i)			REG_ADDR8(0x140304+((i>>8)<<3))
+#define reg_gpio_ds(i)			REG_ADDR8(0x140305+((i>>8)<<3))
+
+
+#define reg_gpio_func(i)			REG_ADDR8(0x140306+((i>>8)<<3))
+#define reg_gpio_irq_en(i)	        REG_ADDR8(0x140307+((i>>8)<<3))  // reg_irq_mask: FLD_IRQ_GPIO_EN
+#define reg_gpio_irq_risc0_en(i)  	REG_ADDR8(0x140338 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC0_EN
+#define reg_gpio_irq_risc1_en(i)  	REG_ADDR8(0x140340 + (i >> 8))	  // reg_irq_mask: FLD_IRQ_GPIO_RISC1_EN
+
+#define reg_gpio_func_mux(i)        REG_ADDR8(0x140330 + (((i>>8)>3) ? 0x20 : ((i>>8)<<1) ) + ((i&0x0f0) ? 1 : 0 ))
+
+
+#define reg_gpio_irq_risc_mask  	REG_ADDR8(0x140352)
+enum{
+	FLD_GPIO_IRQ_MASK_GPIO       = 			BIT(0),
+	FLD_GPIO_IRQ_MASK_GPIO2RISC0 = 			BIT(1),
+	FLD_GPIO_IRQ_MASK_GPIO2RISC1 = 			BIT(2),
+
+	FLD_GPIO_IRQ_LVL_GPIO        = 			BIT(4),
+	FLD_GPIO_IRQ_LVL_GPIO2RISC0  = 			BIT(5),
+	FLD_GPIO_IRQ_LVL_GPIO2RISC1  = 			BIT(6),
+
+};
+#define reg_gpio_irq_ctrl  		REG_ADDR8(0x140353)
+enum{
+    FLD_GPIO_CORE_WAKEUP_EN  	= BIT(2),
+    FLD_GPIO_CORE_INTERRUPT_EN 	= BIT(3),
+};
+
+#define reg_gpio_bb_mux_dbug0		REG_ADDR8(0x140354)
+enum
+{
+	FLD_GPIO_DBG_IN				=			BIT(0),
+	FLD_GPIO_SEL_BB_L			=			BIT(1),
+	FLD_GPIO_SEL_BB_H			=			BIT(2),
+	FLD_GPIO_DBG_SEL_BT			=			BIT(3),
+	FLD_GPIO_WIFI_SEL2W			=			BIT(4),
+	FLD_GPIO_DBG_AXON_BB_SEL	=			BIT(5),
+	FLD_GPIO_WIFI_CO_SEL		=			BIT(6),
+	FLD_GPIO_WIFI_CO_ACT_INV	=			BIT(7),
+};
+
+#define reg_gpio_pad_mul_sel		REG_ADDR8(0x140355)
+
+#define reg_gpio_irq_clr  	       REG_ADDR8(0x140358)
+typedef enum{
+	FLD_GPIO_IRQ_CLR                      = BIT(0),
+	FLD_GPIO_IRQ_GPIO2RISC0_CLR           = BIT(1),
+	FLD_GPIO_IRQ_GPIO2RISC1_CLR = 			BIT(2),
+}gpio_irq_status_e;
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/i2c_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/i2c_reg.h
new file mode 100644
index 00000000..ea11fcfe
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/i2c_reg.h
@@ -0,0 +1,272 @@
+/********************************************************************************************************
+ * @file	i2c_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef I2C_REG_H_
+#define I2C_REG_H_
+#include "soc.h"
+/*******************************      i2c registers: 0x140280      ******************************/
+
+
+#define 	REG_I2C_BASE		    0x140280
+
+
+#define reg_i2c_data_buf0_addr      0x80140288
+
+
+/**
+ * this register to configure I2C master clock speed,eagle i2c has default clock speed.
+ * for eagle i2c,its default clock resource is 24M, its default speed is 200K.
+ * user can configure this register to get other speed: i2c clock = i2c_system_clock/(4*DivClock)
+ * DivClock=0x80140280[7:0].max_value=0xff.
+ */
+#define reg_i2c_sp				    REG_ADDR8(REG_I2C_BASE)
+
+
+/**
+ * this register to configure I2C ID.
+ * BIT[0] to set  write or read bit:0=0 for write, bit:0=1 for read.
+ * BIT[7:1] for ID.
+ */
+#define reg_i2c_id				    REG_ADDR8(REG_I2C_BASE+0x01)
+enum{
+	FLD_I2C_WRITE_READ_BIT  =  BIT(0),
+	FLD_I2C_ID              =  BIT_RNG(1,7),
+};
+
+
+/**
+ * this register is to configure i2c master
+ * BIT[0] means i2c bus whether busy.
+ * BIT[1] means that a start signal is coming, it is 1, and an end signal is coming it will be 0.
+ * BIT[2] Indicates the status of master send and receive,bit[2]=1,means have not ability to send or receivebit[2]=0,means have ability to send or receive.
+ * BIT_RNG[3:5] Indicate what state the i2c is in when it acts as master, BIT_RNG[3:5] defaule value is 0x06 it means master's state is IDLE.
+ * BIT_RNG[6:7] Indicate what state the i2c is in when it acts as slave.
+ */
+#define reg_i2c_mst				    REG_ADDR8(REG_I2C_BASE+0x02)
+enum{
+	FLD_I2C_MST_BUSY        =  BIT(0),
+	FLD_I2C_SCS_N           =  BIT(1),
+	FLD_I2C_ACK_IN          =  BIT(2),
+	FLD_I2C_MST_P           =  BIT_RNG(3,5),
+	FLD_I2C_SS              =  BIT_RNG(6,7),
+};
+
+
+/**
+ * This shows the status control register of i2c
+ * BIT[0] i2c master enable.
+ * BIT[1] clk stretch enable: suspend transimission by pulling SCL down to low level,and continue transmission after SCL is pelesed to hign level.
+ * BIT[2] rx interrupt enable.RX is related to rx_irq_trig_lev function (this function is always present and does not need any setting to enable).
+ *        fifo_data_cnt> = rx_irq_trig_lev generates an interrupt.
+ * BIT[3] tx interrupt enable.Related to tx_irq_trig_lev function,(This function is always present and does not require any setting to enable).
+ *        fifo_data_cnt <= tx_irq_trig_lev, generate interrupt.
+ * BIT[4] tx_done.An interrupt is generated when one frame of data is sent.
+ * BIT[5] rx_done.An interrupt is generated when one frame of data is received.
+ * BIT[6] If the bit is set to 1, when the master reads, the hardware will automatically return ack / nak, no software processing is required.
+ *        It is a new feature of eagle.Previously, software processed it through FLD_I2C_LS_ACK. Setting this bit to 0 will ack, and setting it to 1 will NAK.
+ * BIT[7] means,before master ack, delay sda data bus.
+ */
+#define reg_i2c_sct0			    REG_ADDR8(REG_I2C_BASE+0x03)
+typedef enum{
+	FLD_I2C_MASTER               =  BIT(0),
+	FLD_I2C_R_CLK_STRETCH_EN     =  BIT(1),
+	FLD_I2C_RX_BUF_MASK          =  BIT(2),
+	FLD_I2C_TX_BUF_MASK          =  BIT(3),
+	FLD_I2C_TX_DONE_MASK         =  BIT(4),
+	FLD_I2C_RX_DONE_MASK         =  BIT(5),
+	FLD_I2C_RNCK_EN              =  BIT(6),
+	FLD_I2C_MANUAL_SDA_DELAY     =  BIT(7),
+}i2c_mask_irq_type_e;
+
+
+
+/**
+ * This shows the status control register of i2c
+ * BIT[0] launch i2c ID cycle.
+ * BIT[1] launch i2c address cycle.
+ * BIT[2] launch data write cycle.
+ * BIT[3] launch data read cycle.
+ * BIT[4] launch start cycle.
+ * BIT[5] launch stop cycle.
+ * BIT[6] enable if BIT[6]=1,Its role is to convert the SDA from output to input, so that the master can accept the data sent by the slave when it reads.
+ * BIT[7] enable ACK in read command.When the master is reading, it needs to return to ack or nak.
+ *        If it is in manual mode,when the master is reading, you need to configure this bit to determine whether it will ack.
+ *        BIT[7] = 0,return ack. BIT[7] = 1,return nak.
+ */
+#define reg_i2c_sct1				REG_ADDR8(REG_I2C_BASE+0x04)
+enum{
+	FLD_I2C_LS_ID                   =  BIT(0),
+	FLD_I2C_LS_ADDR                 =  BIT(1),
+	FLD_I2C_LS_DATAW                =  BIT(2),
+	FLD_I2C_LS_DATAR                =  BIT(3),
+    FLD_I2C_LS_START                =  BIT(4),
+	FLD_I2C_LS_STOP                 =  BIT(5),
+	FLD_I2C_LS_ID_R                 =  BIT(6),
+	FLD_I2C_LS_ACK                  =  BIT(7),
+};
+
+
+/**
+ * This is the register that configures the i2c trigger interrupt
+ * BIT_RNG[0,3] to configure the interrupt trigger level of rx_status, for example BIT_RNG[0:3]=0x04,when rx 4bytes,will trigger interrupt.
+ * BIT_RNG[4,7] to configure the interrupt trigger level of tx_status, for example BIT_RNG[0:3]=0x04,when tx 4bytes,will trigger interrupt.
+ */
+#define reg_i2c_trig				REG_ADDR8(REG_I2C_BASE+0x05)
+enum{
+	FLD_I2C_RX_IRQ_TRIG_LEV         =  BIT_RNG(0,3),
+	FLD_I2C_TX_IRQ_TRIG_LEV         =  BIT_RNG(4,7),
+};
+
+
+//As a master, you need to configure this length for both sending and receiving, and the hardware needs to know what the length is.
+#define reg_i2c_len			        REG_ADDR8(REG_I2C_BASE+0x06)
+
+
+/**
+ * This register is to configure the slave stretch function.
+ * BIT[0] slave auto stretch clk eanble,open this function, use slave to receive data,when data buffer is full, scl bus will be low to stop receive data.
+ * BIT[1] slave manul stretch clk enable,open this function, use slave to receive data,when data buffer is full, scl bus will be low to stop receive data.
+ * BIT[2] clear slave stretch.
+ * BIT[6] in high speed mode,when open slave auto stretch clk function,Suddenly data came over, to meet the requirements of time setting.
+ * BIT[7] in fast speed mode,when open slave auto stretch clk function,Suddenly data came over, to meet the requirements of time setting.
+ */
+#define reg_i2c_slave_strech_en	    REG_ADDR8(REG_I2C_BASE+0x07)
+enum{
+	FLD_I2C_R_CLK_STRETCH_SEN       = BIT(0),
+	FLD_I2C_R_MANUAL_STRETCH        = BIT(1),
+	FLD_I2C_MANUAL_STRETCH_CLR      = BIT(2),
+	FLD_I2C_R_HS_MODE               = BIT(6),
+	FLD_I2C_R_FAST_MODE             = BIT(7),
+};
+
+#define reg_i2c_data_buf(i)				REG_ADDR8(( REG_I2C_BASE+0x08 +(i) ))
+/**
+ * This register represents the data buffer of i2c.
+ * BIT_RNG[0,7]  Buffer that stores one byte of data
+ */
+#define reg_i2c_data_buf0		    REG_ADDR8(REG_I2C_BASE+0x08)
+enum{
+	FLD_I2C_BUF0                    = BIT_RNG(0,7),
+};
+
+
+/**
+ * This register represents the data buffer of i2c.
+ * BIT_RNG[0,7]  Buffer that stores one byte of data
+ */
+#define reg_i2c_data_buf1		    REG_ADDR8(REG_I2C_BASE+0x09)
+enum{
+	FLD_I2C_BUF1                    = BIT_RNG(0,7),
+};
+
+
+/**
+ * This register represents the data buffer of i2c.
+ * BIT_RNG[0,7]  Buffer that stores one byte of data
+ */
+#define reg_i2c_data_buf2		    REG_ADDR8(REG_I2C_BASE+0x0a)
+enum{
+	FLD_I2C_BUF2                    = BIT_RNG(0,7),
+};
+
+
+/**
+ * This register represents the data buffer of i2c.
+ * BIT_RNG[0,7]  Buffer that stores one byte of data
+ */
+#define reg_i2c_data_buf3		    REG_ADDR8(REG_I2C_BASE+0x0b)
+enum{
+	FLD_I2C_BUF3                    = BIT_RNG(0,7),
+};
+
+
+/**
+ * This register is used to configure the number of bytes in the i2c buffer
+ * BIT_RNG[0,3]  rx_bufcnt is equivalent to a pointer to fifo, one in data plus one, one out data minus one.
+ * BIT_RNG[4,7]  tx_bufcnt is equivalent to a pointer to fifo, one in data plus one, one out data minus one.
+ */
+#define reg_i2c_buf_cnt			    REG_ADDR8(REG_I2C_BASE+0x0c)
+enum{
+	FLD_I2C_RX_BUFCNT               = BIT_RNG(0,3),
+	FLD_I2C_TX_BUFCNT               = BIT_RNG(4,7),
+};
+
+
+/**
+ * This register used to configure the status of i2c.
+ * BIT_RNG[0,2] rbcnt is the accumulation of this action read, fifo clear will clear.
+ * BIT[3]       Indicates whether i2c is in an interrupted state.
+ * BIT_RNG[4,6] if configure BIT[6]=1,will manual clean rx_fifo. BIT[5,4] Indicates the number of bytes of tx_buffer.
+ * BIT[7]       if configure BIT[7]=1,will manual clean tx_fifo.
+ */
+#define reg_i2c_status			    REG_ADDR8(REG_I2C_BASE+0x0d)
+enum{
+	FLD_I2C_RBCNT                   = BIT_RNG(0,2),
+	FLD_I2C_IRQ_O                   = BIT(3),
+	FLD_I2C_WBCNT                   = BIT_RNG(4,6),
+	FLD_I2C_RX_CLR  				= BIT(6),
+	FLD_I2C_TX_CLR                  = BIT(7),
+};
+
+
+
+/**
+ * This register is used to indicate the interrupt status of i2c.
+ * BIT[0] means Generate an interrupt after the transmission is completed.
+ * BIT[1] If there is data in tx_buffer, an interrupt will be generated.
+ * BIT[2] means Generate an interrupt after the receive is completed.
+ * BIT[3] If there is data in rx_buffer, an interrupt will be generated.
+ * BIT[4] Enable transmission function.
+ */
+#define reg_i2c_irq_status		    REG_ADDR8(REG_I2C_BASE+0x0e)
+enum{
+	FLD_I2C_TXDONE                  = BIT(0),
+	FLD_I2C_TX_BUF_IRQ              = BIT(1),
+	FLD_I2C_RXDONE                  = BIT(2),
+	FLD_I2C_RX_BUF_IRQ              = BIT(3),
+	FLD_I2C_TX_EN                   = BIT(4),
+};
+
+
+//reg_i2c_rx_fifo_len is the number actually entered in the hardware fifo, it is an accumulated value, and fifo clear will clear.
+#define reg_i2c_rx_fifo_len		    REG_ADDR8(REG_I2C_BASE+0x0f)
+enum{
+	FLD_I2C_RX_FIFO_LEN             = BIT_RNG(0,7),
+};
+
+
+
+
+
+#endif
+
+
+
+
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mdec_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mdec_reg.h
new file mode 100644
index 00000000..5c2aa758
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mdec_reg.h
@@ -0,0 +1,48 @@
+/********************************************************************************************************
+ * @file	mdec_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "soc.h"
+
+#define mdec_rst_addr                   0x53
+typedef enum{
+	FLD_SELE_PA0		= BIT(0),
+	FLD_SELE_PB7		= BIT(1),
+	FLD_SELE_PC4		= BIT(2),
+	FLD_SELE_PD0		= BIT(3),
+	FLD_SELE_PE0		= BIT(4),
+}mdec_pin_e;
+typedef enum{
+	FLD_CLS_MDEC	    = BIT_RNG(0,4),
+	FLD_RSVD			= BIT_RNG(5,6),
+	FLD_MDEC_RST		= BIT(7),
+}mdec_set_e;
+
+#define	mdec_ctrl						0x54
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mspi_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mspi_reg.h
new file mode 100644
index 00000000..15213dd6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/mspi_reg.h
@@ -0,0 +1,76 @@
+/********************************************************************************************************
+ * @file	mspi_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "soc.h"
+
+/*******************************      MSPI registers: 0x140100      ******************************/
+#define reg_mspi_data       REG_ADDR8(0x140100)
+
+#define reg_mspi_fm       	REG_ADDR8(0x140101)
+enum{
+	FLD_MSPI_RD_TRIG_EN		=  BIT(0),
+	FLD_MSPI_RD_MODE		=  BIT(1),
+	FLD_MSPI_DATA_LINE		=  BIT_RNG(2,3),
+	FLD_MSPI_CSN			=  BIT(4),
+};
+
+#define reg_mspi_status     REG_ADDR8(0x140102)
+enum{
+	FLD_MSPI_BUSY			=  BIT(0),
+};
+
+#define reg_mspi_fm1		REG_ADDR8(0x140103)
+enum{
+	FLD_MSPI_TIMEOUT_CNT	=  BIT_RNG(0,2),
+	FLD_MSPI_CS2SCL_CNT		=  BIT_RNG(3,4),
+	FLD_MSPI_CS2CS_CNT		=  BIT_RNG(5,7),
+};
+
+#define reg_mspi_config	    REG_ADDR32(0x140104)
+#define reg_mspi_set_l		REG_ADDR8(0x140104)
+enum{
+	FLD_MSPI_MULTIBOOT_ADDR_OFFSET	=  BIT_RNG(0,2),/**<mutiboot address offset option, 0:0k;  1:128k;  2:256k;  4:256k*/
+};
+
+#define reg_mspi_set_h   	REG_ADDR8(0x140105)
+enum{
+	FLD_MSPI_PROGRAM_SPACE_SIZE		=  BIT_RNG(0,6),/**< program space size = mspi_set_h*4k*/
+};
+#define reg_mspi_xip_config	REG_ADDR16(0x140106)
+#define reg_mspi_cmd_ahb   	REG_ADDR8(0x140106)
+enum{
+	FLD_MSPI_RD_CMD			=  BIT_RNG(0,7), /**< xip read command */
+};
+
+#define reg_mspi_fm_ahb   	REG_ADDR8(0x140107)
+enum{
+	FLD_MSPI_DUMMY			=  BIT_RNG(0,3),/**< dummy cycle = FLD_MSPI_DUMMY + 1 */
+	FLD_MSPI_DAT_LINE		=  BIT_RNG(4,5),/**< 0:single line;  1: dual line;  2:quad line; 3:quad line */
+	FLD_MSPI_ADDR_LINE		=  BIT(6),      /**< 0:single line;   1:the same to dat_line_h */
+	FLD_MSPI_CMD_LINE		=  BIT(7),      /**< 0:single line;   1:the same to dat_line_h */
+};
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/npe_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/npe_reg.h
new file mode 100644
index 00000000..2b573f61
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/npe_reg.h
@@ -0,0 +1,80 @@
+/********************************************************************************************************
+ * @file	npe_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef NPE_REG_H
+#define NPE_REG_H
+#include "soc.h"
+#define  NPE_BASE_ADDR			         0x112000
+#define reg_npe_addr(addr)		((addr)-CPU_DLM_BASE+DLM_BASE)
+#define reg_npe_0x40			REG_ADDR32(NPE_BASE_ADDR+0x40)
+#define reg_npe_0x6c			REG_ADDR32(NPE_BASE_ADDR+0x6c)
+#define reg_npe_0x84			REG_ADDR32(NPE_BASE_ADDR+0x84)
+#define reg_npe_0x74			REG_ADDR32(NPE_BASE_ADDR+0x74)
+#define reg_npe_0x80			REG_ADDR32(NPE_BASE_ADDR+0x80)
+#define reg_npe_0x84			REG_ADDR32(NPE_BASE_ADDR+0x84)
+
+
+#define reg_npe_irq_0		    REG_ADDR8(STIMER_BASE_ADDR+0x20)
+enum{
+
+	FLD_IRQ_NPE_BUS0 			    =   BIT(0),
+	FLD_IRQ_NPE_BUS1 			    =   BIT(1),
+	FLD_IRQ_NPE_BUS2 			    =   BIT(2),
+	FLD_IRQ_NPE_BUS3 			    =   BIT(3),
+	FLD_IRQ_NPE_BUS4 			    =   BIT(4),
+	FLD_IRQ_NPE_BUS7 			    =   BIT(7),
+
+};
+
+#define reg_npe_irq_1		    REG_ADDR8(STIMER_BASE_ADDR+0x21)
+enum{
+
+	FLD_IRQ_NPE_BUS8 			    =   BIT(0),
+	FLD_IRQ_NPE_BUS13 			    =   BIT(5),
+	FLD_IRQ_NPE_BUS14 			    =   BIT(6),
+	FLD_IRQ_NPE_BUS15 			    =   BIT(7),
+};
+
+#define reg_npe_irq_2		    REG_ADDR8(STIMER_BASE_ADDR+0x22)
+enum{
+
+	FLD_IRQ_NPE_BUS17 			    =   BIT(1),
+	FLD_IRQ_NPE_BUS21 			    =   BIT(5),
+	FLD_IRQ_NPE_BUS22 			    =   BIT(6),
+	FLD_IRQ_NPE_BUS23			    =   BIT(7),
+};
+
+#define reg_npe_irq_3		    REG_ADDR8(STIMER_BASE_ADDR+0x23)
+enum{
+
+	FLD_IRQ_NPE_BUS24 			    =   BIT(0),
+	FLD_IRQ_NPE_BUS25 			    =   BIT(1),
+	FLD_IRQ_NPE_BUS26 			    =   BIT(2),
+	FLD_IRQ_NPE_BUS27			    =   BIT(3),
+	FLD_IRQ_NPE_BUS28 			    =   BIT(4),
+	FLD_IRQ_NPE_BUS29 			    =   BIT(5),
+	FLD_IRQ_NPE_BUS30 			    =   BIT(6),
+	FLD_IRQ_NPE_BUS31			    =   BIT(7),
+};
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pke_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pke_reg.h
new file mode 100644
index 00000000..05a03046
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pke_reg.h
@@ -0,0 +1,51 @@
+/********************************************************************************************************
+ * @file	pke_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+
+#include "soc.h"
+
+
+
+/*******************************      pke registers: 0x110000      ******************************/
+
+#define PKE_BASE             (0x80110000)
+#define PKE_CTRL             (*((volatile unsigned int *)(PKE_BASE)))
+#define PKE_CONF             (*((volatile unsigned int *)(PKE_BASE+0x04)))
+typedef enum{
+	FLD_PKE_CONF_IRQ_EN			= BIT(8),
+	FLD_PKE_CONF_PARTIAL_RADIX	= BIT_RNG(16,23),
+	FLD_PKE_CONF_BASE_RADIX		= BIT_RNG(24,26),
+}pke_conf_e;
+#define PKE_MC_PTR           (*((volatile unsigned int *)(PKE_BASE+0x10)))
+#define PKE_STAT             (*((volatile unsigned int *)(PKE_BASE+0x20)))
+#define PKE_RT_CODE          (*((volatile unsigned int *)(PKE_BASE+0x24)))
+#define PKE_EXE_CONF         (*((volatile unsigned int *)(PKE_BASE+0x50)))
+#define PKE_VERSION          (*((volatile unsigned int *)(PKE_BASE+0x80)))
+#define PKE_A(a, step)       ((volatile unsigned int *)(PKE_BASE+0x0400+(a)*(step)))
+#define PKE_B(a, step)       ((volatile unsigned int *)(PKE_BASE+0x1000+(a)*(step)))
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/plic_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/plic_reg.h
new file mode 100644
index 00000000..4acc221b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/plic_reg.h
@@ -0,0 +1,45 @@
+/********************************************************************************************************
+ * @file	plic_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef INTERRUPT_REG_H
+#define INTERRUPT_REG_H
+#include "soc.h"
+
+
+/*******************************     interrupt registers:     ******************************/
+#define reg_irq_feature		         (*(volatile unsigned long*)(0 + (0xe4000000)))
+
+#define reg_irq_pending(i)           (*(volatile unsigned long*)(0 + (0xe4001000+((i>31) ? 4 : 0))))
+
+#define reg_irq_src0             	 (*(volatile unsigned long*)(0 + (0xe4002000)))
+#define reg_irq_src1             	 (*(volatile unsigned long*)(0 + (0xe4002004)))
+
+#define reg_irq_src(i)             	 (*(volatile unsigned long*)(0 + (0xe4002000+((i>31) ? 4 : 0) )))
+
+#define reg_irq_threshold            (*(volatile unsigned long*)(0 + (0xe4200000)))
+#define reg_irq_done          	  	 (*(volatile unsigned long*)(0 + (0xe4200004)))
+
+#define reg_irq_src_priority(i)      (*(volatile unsigned long*)(0 + 0xe4000000+((i)<<2)))
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pwm_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pwm_reg.h
new file mode 100644
index 00000000..5ab8a8ef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/pwm_reg.h
@@ -0,0 +1,303 @@
+/********************************************************************************************************
+ * @file	pwm_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef PWM_REG_H
+#define PWM_REG_H
+
+#include "soc.h"
+
+
+
+/*******************************      pwm registers: 0x140400      ******************************/
+#define reg_pwm_data_buf_adr        0x80140448
+
+
+/**
+ * Represents the base address register of the PWM
+ */
+#define 	REG_PWM_BASE		    0x140400
+
+
+/**
+ * This register is used to enable PWM0~PWM5.
+ */
+#define reg_pwm_enable			REG_ADDR16(REG_PWM_BASE)
+typedef enum{
+	FLD_PWM1_EN = BIT(1),
+	FLD_PWM2_EN = BIT(2),
+	FLD_PWM3_EN = BIT(3),
+	FLD_PWM4_EN = BIT(4),
+	FLD_PWM5_EN = BIT(5),
+	FLD_PWM0_EN = BIT(8),
+}pwm_en_e;
+
+
+
+/**
+ * This register is used to set the division factor of the PWM clock.
+ */
+#define reg_pwm_clkdiv			REG_ADDR8(REG_PWM_BASE+0x02)
+
+
+/**
+ * BIT[3:0] of this register is used to set the working mode of PWM0.Only PWM0 supports 5 modes.
+ */
+#define reg_pwm0_mode           REG_ADDR8(REG_PWM_BASE+0x03)
+
+
+/**
+ * This register is used to set the inversion of the output state of PWM5 ~ PWM0.
+ * PWM and PWM_N can be inverted independently
+ */
+#define reg_pwm_invert          REG_ADDR8(REG_PWM_BASE+0x04)
+enum{
+	FLD_PWM0_OUT_INVERT  = 		BIT(0),
+	FLD_PWM1_OUT_INVERT  = 		BIT(1),
+	FLD_PWM2_OUT_INVERT  = 		BIT(2),
+	FLD_PWM3_OUT_INVERT  = 		BIT(3),
+	FLD_PWM4_OUT_INVERT  = 		BIT(4),
+	FLD_PWM5_OUT_INVERT  = 		BIT(5),
+};
+
+
+/**
+ * This register is used to set the inversion of the output state of PWM5_N ~ PWM0_N.
+ * PWM and PWM_N can be inverted independently
+ */
+#define reg_pwm_n_invert        REG_ADDR8(REG_PWM_BASE+0x05)
+enum{
+	FLD_PWM0_INV_OUT_INVERT  = 		BIT(0),
+	FLD_PWM1_INV_OUT_INVERT  = 		BIT(1),
+	FLD_PWM2_INV_OUT_INVERT  = 		BIT(2),
+	FLD_PWM3_INV_OUT_INVERT  = 		BIT(3),
+	FLD_PWM4_INV_OUT_INVERT  = 		BIT(4),
+	FLD_PWM5_INV_OUT_INVERT  = 		BIT(5),
+};
+
+
+/*
+ * This register represents Signal frame polarity of PWM5~PWM0.By default, PWM outputs high level under Count status and low level under Remaining status.
+ * If the corresponding bit is set to 1, the high and low levels in different states will be reversed.
+ * BIT(0):pwm0 out low level first. ~BIT(0):pwm0 out high level first.
+ * BIT(1):pwm1 out low level first. ~BIT(1):pwm1 out high level first.
+ * BIT(2):pwm2 out low level first. ~BIT(2):pwm2 out high level first.
+ * BIT(3):pwm3 out low level first. ~BIT(3):pwm3 out high level first.
+ * BIT(4):pwm4 out low level first. ~BIT(4):pwm4 out high level first.
+ * BIT(5):pwm5 out low level first. ~BIT(5):pwm5 out high level first.
+ */
+#define reg_pwm_pol			    REG_ADDR8(REG_PWM_BASE+0x06)
+enum{
+	FLD_PWM0_FIRST_OUT_LEVEL  = 	BIT(0),
+	FLD_PWM1_FIRST_OUT_LEVEL  = 	BIT(1),
+	FLD_PWM2_FIRST_OUT_LEVEL  = 	BIT(2),
+	FLD_PWM3_FIRST_OUT_LEVEL  = 	BIT(3),
+	FLD_PWM4_FIRST_OUT_LEVEL  = 	BIT(4),
+	FLD_PWM5_FIRST_OUT_LEVEL  = 	BIT(5),
+};
+
+
+/*
+ * This register represents 32K clock source with PWM5 ~ PWM0 enabled
+ * If the system has a 32K clock source, whether it is 32K_RC or 32K_Crystal, as long as the corresponding
+ * BIT of 0x140407 is configured, the corresponding PWM Channel can get 32K clock source.
+ */
+#define reg_pwm_mode32k         REG_ADDR8(REG_PWM_BASE+0x07)
+enum{
+	FLD_PWM0_32K_ENABLE       = 	BIT(0),
+	FLD_PWM1_32K_ENABLE		  = 	BIT(1),
+	FLD_PWM2_32K_ENABLE 	  = 	BIT(2),
+	FLD_PWM3_32K_ENABLE		  = 	BIT(3),
+	FLD_PWM4_32K_ENABLE		  = 	BIT(4),
+	FLD_PWM5_32K_ENABLE       = 	BIT(5),
+};
+
+
+/**
+ * This register configures the length of the capture segment of PWM5 ~ PWM0.
+ * This value has a total of 16 bits, divided into lower 8 bits and higher 8 bits.
+ */
+#define reg_pwm_cmp(i)		    REG_ADDR16(REG_PWM_BASE+0x14 +(i << 2))
+
+
+/**
+ * This register is used to configure the period of the PWM waveform. There are 32 bits in total.
+ * The lower 16 bits indicate the length of the CMP segment. The higher 16 bits indicate the length of the MAX segment.
+ */
+#define reg_pwm_cycle(i)		REG_ADDR32(REG_PWM_BASE+0x14 + (i << 2))
+//enum{
+//	FLD_PWM_CMP  = 				BIT_RNG(0,15),
+//	FLD_PWM_MAX  = 				BIT_RNG(16,31),
+//};
+// in C99 FLD_PWM_MAX  = BIT_RNG(16,31) is error
+#define	FLD_PWM_CMP  = 				BIT_RNG(0,15),
+#define	FLD_PWM_MAX  = 				BIT_RNG(16,31),
+/**
+ * This register configures the length of the max segment of PWM5 ~ PWM0.
+ * This value has a total of 16 bits, divided into lower 8 bits and higher 8 bits.
+ */
+#define reg_pwm_max(i)			REG_ADDR16(REG_PWM_BASE+0x16 + (i << 2))
+
+
+/**
+ * When PWM0 is in count mode or ir mode, the total number of pulse_number is set by the following two registers.
+ */
+#define reg_pwm0_pulse_num		REG_ADDR16(REG_PWM_BASE+0x2c)//0x2c[7:0] 0x2d[5:0]
+
+
+
+/**
+ * This register is used to configure the PWM interrupt function.
+ * BIT[0]:If this bit is set, an interrupt will be generated after a set of pulses has been sent. When this interrupt is enabled, you can capture an interrupt after a pulse is sent by detecting whether bit[0] of 0x140431 is set.
+ * BIT[1]:Enable ir dma fifo mode interrupt.This bit is usually used with 0x140431BIT[1].
+ * BIT[2]:Enable pwm0 frame interrupt.
+ * BIT[3]:Enable pwm1 frame interrupt.
+ * BIT[4]:Enable pwm2 frame interrupt.
+ * BIT[5]:Enable pwm3 frame interrupt.
+ * BIT[6]:Enable pwm4 frame interrupt.
+ * BIT[7]:Enable pwm5 frame interrupt.
+ * BIT[16]:The Bit is to enable the mask_lvl(This level specifically indicates the number of bytes in the FIFO that can trigger an interrupt) interrupt.
+ */
+#define reg_pwm_irq_mask(i)		REG_ADDR8(REG_PWM_BASE+0x30+i*2)
+
+
+/**
+ * The bits in this register are used to indicate the various interrupt states of the PWM.
+ * BIT[0]:This bit is usually used with BIT[0] of 0x140430. If this bit is set to 1, it means that a pulse group of PWM has been sent.An interrupt was also generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[1]:In ir dma fifo mode. If this is set 1 Indicates that a set of pulse of group has been sent. You can manually write 1 to clear the interrupt flag.
+ * BIT[2]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[3]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[4]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[5]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[6]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[7]:If this is set 1 Indicates that a signal frame interrupt has been generated. You can manually write 1 to clear the interrupt flag.
+ * BIT[16]:When the FIFO value is less than the set value, an interrupt is generated(The premise is that this interrupt has been enabled by register 0x140432 previous).
+ *         The user can know whether this interrupt is generated by reading the status of this register.If BIT(16):1 Indicates that this interrupt has been generated.
+ */
+#define reg_pwm_irq_sta(i)		        REG_ADDR8(REG_PWM_BASE+0x31+i*2)
+
+typedef enum{
+	FLD_PWM0_PNUM_IRQ 			         =		BIT(0),
+	FLD_PWM0_IR_DMA_FIFO_IRQ 	  		 =		BIT(1),
+	FLD_PWM0_FRAME_DONE_IRQ              =		BIT(2),
+	FLD_PWM1_FRAME_DONE_IRQ              =		BIT(3),
+	FLD_PWM2_FRAME_DONE_IRQ 		  	 =		BIT(4),
+	FLD_PWM3_FRAME_DONE_IRQ             =		BIT(5),
+	FLD_PWM4_FRAME_DONE_IRQ             =		BIT(6),
+	FLD_PWM5_FRAME_DONE_IRQ             =		BIT(7),
+
+	FLD_PWM0_IR_FIFO_IRQ 	  	        =        BIT(16),
+
+}pwm_irq_e;
+
+
+
+
+/**
+ * PWM0~PWM5, counting from 0 at the beginning of each cycle, and adding 1 for each system clock.
+ */
+#define reg_pwm_cnt(i)		    REG_ADDR16(REG_PWM_BASE+0x34 +(i << 1))
+
+/*
+ * when update the duty cycle in 32K, this register bit(0) set 1.
+ */
+#define reg_pwm_cnt5_l      REG_ADDR8(REG_PWM_BASE+0x3e)
+
+enum{
+	FLD_PWM_32K_DUTY_CYCLE_UPDATE   =   BIT(0),
+};
+
+/**
+ * In count mode, each period is incremented by one.
+ */
+#define reg_pwm_ncnt		    REG_ADDR16(REG_PWM_BASE+0x40)
+
+
+
+
+/**
+ * [7:0] bits 7-0 of PWM0's high time or low time(if pola[0]=1),if shadow bit(fifo data[14]) is 1 in ir fifo mode or dma fifo mode.
+ */
+#define reg_pwm_tcmp0_shadow	REG_ADDR16(REG_PWM_BASE+0x44)
+
+
+/**
+ * [15:8] bits 15-8 of PWM0's high time or low time(if pola[0]=1),if shadow bit(fifo data[14]) is 1 in ir fifo mode or dma fifo mode.
+ */
+#define reg_pwm_tmax0_shadow	REG_ADDR16(REG_PWM_BASE+0x46)
+
+
+/**
+ * PWM data fifo.0x140448~0x14044b.
+ */
+#define reg_pwm_ir_fifo_dat(i)			REG_ADDR16(REG_PWM_BASE+0x48+i*2)
+
+
+/**
+ * This register BIT[3:0] indicates the interrupt trigger level in ir_fifo mode.
+ * When fifo numbers is less than this value.It's will take effect.
+ */
+#define reg_pwm_ir_fifo_irq_trig_level	REG_ADDR8(REG_PWM_BASE+0x4c)
+enum{
+	FLD_PWM0_FIFO_NUM_OF_TRIGGLE_LEVEL 	=		BIT_RNG(0,3),
+};
+
+
+/**
+ * This register indicates the fifo data status in.
+ * BIT[3:0]:Indicates the amount of data in the FIFO.
+ * BIT[4]:if BIT[4]=1,Indicates the data fifo is empty.
+ * BIT[5]:if BIT[5]=1,Indicates the data fifo is full.
+ */
+#define reg_pwm_ir_fifo_data_status		REG_ADDR8(0x14044d)
+enum{
+	FLD_PWM0_IR_FIFO_DATA_NUM 	=		BIT_RNG(0,3),
+	FLD_PWM0_IR_FIFO_EMPTY 		=		BIT(4),
+	FLD_PWM0_IR_FIFO_FULL 		=		BIT(5),
+};
+
+
+/**
+ * This register can be configured to clear the data FIFO.
+ * BIT[0]:if BIT[0]=1,Indicates the data FIFO is clear.
+ */
+#define reg_pwm_ir_clr_fifo_data		REG_ADDR8(0x14044e)
+enum{
+	FLD_PWM0_IR_FIFO_CLR_DATA 	=		BIT(0),
+
+};
+
+
+
+
+
+#endif
+
+
+
+
+
+
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/register.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/register.h
new file mode 100644
index 00000000..5ee5af51
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/register.h
@@ -0,0 +1,50 @@
+/********************************************************************************************************
+ * @file	register.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef  REGISTER_H
+#define  REGISTER_H
+
+#include "gpio_reg.h"
+#include "soc.h"
+#include "analog_reg.h"
+#include "audio_reg.h"
+#include "timer_reg.h"
+#include "dma_reg.h"
+#include "usb_reg.h"
+#include "pwm_reg.h"
+#include "spi_reg.h"
+#include "i2c_reg.h"
+#include "mspi_reg.h"
+#include "rf_reg.h"
+#include "trng_reg.h"
+#include "npe_reg.h"
+#include "pke_reg.h"
+#include "plic_reg.h"
+#include "uart_reg.h"
+#include "stimer_reg.h"
+#include "aes_reg.h"
+#include "adc_reg.h"
+#include "mdec_reg.h"
+#include "swire_reg.h"
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/rf_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/rf_reg.h
new file mode 100644
index 00000000..2f0b96e2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/rf_reg.h
@@ -0,0 +1,901 @@
+/********************************************************************************************************
+ * @file	rf_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef  RF_REG_H
+#define  RF_REG_H
+#include "soc.h"
+
+///*******************************      RF      ******************************/
+#define                 APBADDR           0x140000
+#define                 BBADDR            APBADDR+0x800                      //0x140800
+#define                 RADIOADDR         APBADDR+0xe00 //0x140e00
+#define                 MODEMADDR         APBADDR+0xc00 //0x140c00
+#define                 CHNADDR           0x100400
+#define 				APBRG_BASE        0x140000
+#define 				APBRG_APB_BASE	 (APBRG_BASE+0x0000)
+
+
+#define REG_TL_RADIO_BASE_ADDR						(APBRG_BASE+0x0e00)
+
+
+#define reg_rf_bb_auto_ctrl				REG_ADDR8(0x10050c)
+
+enum{
+	FLD_RF_TX_MULTI_EN					=	BIT(0),
+	FLD_RF_RX_MULTI_EN					=	BIT(1),
+	FLD_RF_CH_0_RNUM_EN_BK				=	BIT(2),
+	FLD_RF_CH_1_RNUM_EN_BK				=	BIT(3),
+	FLD_RF_CH1_RX_ERR_EN				=	BIT(4),
+	FLD_RF_DMA_REQ_D1_EN				=	BIT(5),
+};
+#define reg_rf_bb_tx_chn_dep				REG_ADDR8(0x1004f3)
+#define reg_rf_bb_tx_size					REG_ADDR8(0x1004f2)
+
+#define reg_rf_dma_rx_wptr				REG_ADDR8(0x001004f4)
+#define reg_rf_dma_rx_rptr				REG_ADDR8(0x001004f5)
+
+#define reg_rf_dma_tx_rptr(i)			REG_ADDR8(0x00100501 + (i << 1))
+#define reg_rf_dma_tx_wptr(i)			REG_ADDR8(0x00100500 + (i << 1))
+
+#define reg_rf_bb_rx_size					REG_ADDR8(CHNADDR+0xf6)
+
+
+
+#define reg_rf_rx_wptr_mask					REG_ADDR8(CHNADDR+0x10d)
+
+
+
+//******************************      RF_Register_list      ******************************/
+#define               REG_BASEBAND_BASE_ADDR          0x0140800
+
+
+#define    reg_rf_tx_mode1				REG_ADDR8(REG_BASEBAND_BASE_ADDR)
+enum{
+	FLD_RF_DMA_EN				=	BIT(0),
+	FLD_RF_CRC_EN				=	BIT(1),
+	FLD_RF_TX_FMT				=	BIT_RNG(2,3),
+	FLD_RF_TX_XOR_MODE			=	BIT(4),
+	FLD_RF_TX_TEST_DATA			=	BIT(5),
+	FLD_RF_TX_TEST_EN			=	BIT(6),
+	FLD_RF_BB_DEC    			=	BIT(7),
+};
+
+
+#define    reg_rf_tx_mode2				REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x01)
+enum{
+	FLD_RF_ZB_PN_EN				=	BIT(0),
+	FLD_RF_RESERVED0			=	BIT_RNG(1,2),
+	FLD_RF_V_PN_EN				=	BIT(3),
+	FLD_RF_RESERVED1			=	BIT_RNG(4,5),
+	FLD_RF_TX_OUT_PLR	        =	BIT(6),
+};
+
+
+#define    reg_rf_preamble_trail		REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x02)
+enum{
+	FLD_RF_PREAMBLE_LEN			=	BIT_RNG(0,4),
+	FLD_RF_TRAILER_LEN			=	BIT_RNG(5,7),
+};
+
+
+#define    reg_rf_bbdbg					REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x03)
+enum{
+	FLD_RF_SLOW_EN			    =	BIT(0),
+	FLD_RF_SLOW_SEL				=	BIT(1),
+	FLD_RF_XMODE_EN				=	BIT(2),
+	FLD_RF_REV_ORDER			=	BIT(3),
+	FLD_RF_TX_MODE				=	BIT(4),
+	FLD_RF_R_DBG_SEL0			=	BIT(5),
+	FLD_RF_MODEM1M_PAT			=	BIT(6),
+	FLD_RF_R_DBG_SEL1			=	BIT(7),
+};
+
+
+#define    reg_rf_format			    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x04)
+enum{
+	FLD_RF_HEAD_MODE			=   BIT_RNG(0,1),
+	FLD_RF_CRC_MODE 			=	BIT_RNG(2,3),
+	FLD_RF_BLE_1M				=	BIT(4),
+	FLD_RF_BLE_WT				=	BIT(5),
+	FLD_RF_TX_NOACK				=	BIT(6),
+	FLD_RF_PN_AUTO				=	BIT(7),
+};
+
+
+//#define    reg_rf_acclen			    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x05)
+#define  reg_rf_acc_len			        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x05)
+enum{
+	FLD_RF_ACC_LEN			    =   BIT_RNG(0,2),
+	FLD_RF_LR_TX_SEL 			=	BIT(4),
+	FLD_RF_BLE_LR				=	BIT(5),
+};
+
+
+
+#define    reg_rf_sblen			    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x06)
+
+
+#define    reg_rf_rxchn			    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x07)
+enum{
+	FLD_RF_TEST_TXON 			=	BIT(6),
+	FLD_RF_TEST_TXON_EN			=	BIT(7),
+};
+
+#define	   reg_rf_access_code		REG_ADDR32(REG_BASEBAND_BASE_ADDR+0x08)
+#define    reg_rf_access_0		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x08)
+#define    reg_rf_access_1		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x09)
+#define    reg_rf_access_2		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x0a)
+#define    reg_rf_access_3		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x0b)
+#define    reg_rf_access_4		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x0c)
+
+
+#define    reg_rf_pn		        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x0d)
+enum{
+	FLD_RF_PN_INIT 			    =	BIT_RNG(0,5),
+};
+
+
+#define    reg_rf_access_5		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x10)
+#define    reg_rf_access_6		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x11)
+#define    reg_rf_access_7		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x12)
+#define    reg_rf_access_8		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x13)
+#define    reg_rf_access_9		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x14)
+#define    reg_rf_access_10		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x18)
+#define    reg_rf_access_11		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x19)
+#define    reg_rf_access_12		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x1a)
+#define    reg_rf_access_13		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x1b)
+#define    reg_rf_access_code_base_pipe0   0x140808
+#define    reg_rf_access_code_base_pipe2   0x140818
+
+#define    reg_rf_txfifo		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x1c)
+enum{
+	FLD_RF_TX_FIFO_FULL 		=	BIT(0),
+	FLD_RF_TX_ACT_2D    		=	BIT(1),
+};
+
+
+#define    reg_rf_rxgth1		    REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x21)
+enum{
+	FLD_RF_R_PILOT_LEN_O 		=	BIT_RNG(0,3),
+	FLD_RF_R_ZB_SFD_O    		=	BIT(4),
+	FLD_RF_R_PKTLEN_O    		=	BIT(5),
+	FLD_RF_R_SN_LEN_O    		=	BIT(6),
+	FLD_RF_R_LEN_0_EN_O    		=	BIT(7),
+};
+
+
+#define    reg_rf_rxsfd0_num		 REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x22)
+enum{
+	FLD_RF_RXCHN_MAN_EN    		=	BIT(3),
+	FLD_RF_RXCHN_MAN 		    =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_crc_init0		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x24)
+#define    reg_rf_crc_init1		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x25)
+#define    reg_rf_crc_init2		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x26)
+
+
+#define    reg_rf_ctrl_0		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x27)
+enum{
+	FLD_RF_H1M_ODD       		=	BIT(0),
+	FLD_RF_REV_ZB_SAMP      	=	BIT(1),
+	FLD_RF_SFD_LAST_CHIP      	=	BIT(2),
+};
+
+
+#define    reg_rf_rxmode		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x28)
+enum{
+	FLD_RF_RX_ENABLE       		=	BIT(0),
+};
+
+
+#define    reg_rf_rxclk_on		     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x2a)
+enum{
+	FLD_RF_CLKON_O       		=	BIT_RNG(0,1),
+};
+
+
+#define    reg_rf_rxclk_auto		 REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x2b)
+enum{
+	FLD_RF_CLK_AUTO       		=	BIT_RNG(0,1),
+};
+
+
+#define    reg_rf_rxdma_hs	 	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x2c)
+enum{
+	FLD_RF_RXDMA_HS       		=	BIT(0),
+};
+
+
+#define    reg_rf_rxtcrcpkt	 	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x30)
+enum{
+	FLD_RF_FILTER_CRC_PKT       =	BIT(0),
+	FLD_RF_EN_TS_RX             =	BIT(2),
+	FLD_RF_EN_TS_TX             =	BIT(3),
+	FLD_RF_LEN_SET_O       		=	BIT_RNG(4,5),
+};
+
+
+#define    reg_rf_rxtmaxlen	 	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x31)
+
+
+#define    reg_rf_rxlatf	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x33)
+enum{
+	FLD_RF_R_LATF_CNT_O       	=	BIT_RNG(0,3),
+	FLD_RF_R_LATF_AT_END_O      =	BIT(4),
+};
+
+
+#define    reg_rf_bank_cnt	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x34)
+enum{
+	FLD_RF_BANK_CNT          	=	BIT_RNG(0,2),
+};
+
+
+#define    reg_rf_rxsupp	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x38)
+enum{
+	FLD_RF_RX_SUPP_D_EN         =	BIT(0),
+	FLD_RF_RX_SUPP_A_EN         =	BIT(1),
+	FLD_RF_TX_SUPP_D_EN         =	BIT(2),
+	FLD_RF_TX_SUPP_A_EN         =	BIT(3),
+	FLD_RF_ANT_NUM              =	BIT_RNG(4,7),
+};
+
+
+#define    reg_rf_tx_antoffset	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x39)
+#define    reg_rf_rx_antoffset	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3a)
+#define    reg_rf_samp_offset	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3b)
+
+
+#define    reg_rf_man_ant_slot	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3c)
+enum{
+	FLD_RF_ANT_SEL_MAN          =	BIT_RNG(0,2),
+	FLD_RF_ANT_SEL_MAN_EN       =	BIT(3),
+	FLD_RF_SLOT_1US_MAN_EN      =	BIT(4),
+	FLD_RF_SLOT_1US_MAN         =	BIT(5),
+	FLD_RF_ANT_PAT              =	BIT_RNG(6,7),
+};
+
+
+#define    reg_rf_sof_offset	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3d)
+enum{
+	FLD_RF_ANT_SOF_OFFSET       =	BIT_RNG(0,1),
+	FLD_RF_SAMP_SOF_OFFSET      =	BIT_RNG(2,3),
+	FLD_RF_SUPP_MODE            =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_mode_ctrl0	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3e)
+enum{
+	FLD_RF_INTV_MODE            =	BIT_RNG(0,1),
+	FLD_RF_IQ_SAMP_EN           =	BIT(2),
+	FLD_RF_IQ_SAMP_INTERVAL     =	BIT_RNG(4,7),
+};
+
+
+#define    reg_rf_iq_samp_start	     REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x3f)
+
+
+#define    reg_rf_dec_err	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x40)
+enum{
+	FLD_RF_SS                   =	BIT_RNG(0,2),
+	FLD_RF_PKT_DEC_ERR          =	BIT_RNG(4,7),
+};
+
+#define	   reg_rf_timestamp			REG_ADDR32(REG_BASEBAND_BASE_ADDR+0x50)
+#define    reg_rf_tstamp0	        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x50)
+enum{
+	FLD_RF_R_TSTAMP0             =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_tstamp1	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x51)
+enum{
+	FLD_RF_R_TSTAMP1             =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_tstamp2	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x52)
+enum{
+	FLD_RF_R_TSTAMP2             =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_tstamp3	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x53)
+enum{
+	FLD_RF_R_TSTAMP3             =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_ant_lut_0	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x68)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+#if 0
+#define    reg_rf_ant_lut_1	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x69)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_2	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6a)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_3	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6b)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_4	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6c)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_5	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6d)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_6	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6e)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+
+
+#define    reg_rf_ant_lut_7	         REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x6f)
+enum{
+	FLD_RF_ANT_LUT0              =	BIT_RNG(0,2),
+	FLD_RF_ANT_LUT1              =	BIT_RNG(4,6),
+};
+#endif
+
+#define	   reg_rf_rxdma_adr			 0x80140880
+#define    reg_rf_rxdma_fifo0        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x80)
+enum{
+	FLD_RF_RXDMA_FIFO0           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_rxdma_fifo1        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x81)
+enum{
+	FLD_RF_RXDMA_FIFO1           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_rxdma_fifo2        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x82)
+enum{
+	FLD_RF_RXDMA_FIFO2           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_rxdma_fifo3        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x83)
+enum{
+	FLD_RF_RXDMA_FIFO3           =	BIT_RNG(0,7),
+};
+
+#define	   reg_rf_txdma_adr			0x80140884
+#define    reg_rf_txdma_fifo0        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x84)
+enum{
+	FLD_RF_TXDMA_FIFO0           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_txdma_fifo1        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x85)
+enum{
+	FLD_RF_TXDMA_FIFO1           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_txdma_fifo2        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x86)
+enum{
+	FLD_RF_TXDMA_FIFO2           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_txdma_fifo3        REG_ADDR8(REG_BASEBAND_BASE_ADDR+0x87)
+enum{
+	FLD_RF_TXDMA_FIFO3           =	BIT_RNG(0,7),
+};
+
+
+
+/**
+ * BB_LL
+ */
+#define               REG_BB_LL_BASE_ADDR          0x0140a00
+
+
+#define    reg_rf_ll_cmd             REG_ADDR8(REG_BB_LL_BASE_ADDR)
+enum{
+	FLD_RF_R_CMD                 =	BIT_RNG(0,3),
+	FLD_RF_R_STOP                =	0,
+	FLD_RF_R_BTX                 =	1,
+	FLD_RF_R_BRX                 =	2,
+	FLD_RF_R_PTX                 =	3,
+	FLD_RF_R_PRX                 =	4,
+	FLD_RF_R_STX                 =	5,
+	FLD_RF_R_SRX                 =	6,
+	FLD_RF_R_STR                 =	7,
+	FLD_RF_R_SRT                 =	8,
+	FLD_RF_R_CMD_TRIG            =  BIT(7),
+};
+
+
+#define    reg_rf_ll_rest_pid        REG_ADDR8(REG_BB_LL_BASE_ADDR+0x01)
+enum{
+	FLD_RF_R_RESET_PID_0         =	BIT(0),
+	FLD_RF_R_RESET_PID_1         =	BIT(1),
+	FLD_RF_R_RESET_PID_2         =	BIT(2),
+	FLD_RF_R_RESET_PID_3         =	BIT(3),
+	FLD_RF_R_RESET_PID_4         =	BIT(4),
+	FLD_RF_R_RESET_PID_5         =	BIT(5),
+};
+
+
+#define    reg_rf_ll_ctrl0          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x02)
+enum{
+	FLD_RF_R_MD_EN               =	BIT(0),
+	FLD_RF_R_ID_EN               =	BIT(1),
+	FLD_RF_R_RX_NOACK_MAN        =	BIT(2),
+	FLD_RF_R_RX_NOACK_MAN_EN     =	BIT(3),
+	FLD_RF_R_TX_EN_MAN           =	BIT(4),
+	FLD_RF_R_RX_EN_MAN           =	BIT(5),
+	FLD_RF_R_TX_TRIQ_AUTO_EN     =	BIT(6),
+	FLD_RF_R_S_TX_TIMEOUT_EN     =	BIT(7),
+};
+
+
+#define    reg_rf_ll_ctrl_1			REG_ADDR8(REG_BB_LL_BASE_ADDR+0x03)
+
+enum{
+	FLD_RF_FSM_TIMEOUT_EN 		=   BIT(0),
+	FLD_RF_RX_FIRST_TIMEOUT_EN	=   BIT(1),
+	FLD_RF_RX_TIMEOUT_EN		=   BIT(2),
+	FLD_RF_CRC_2_EN 			=   BIT(3),
+
+	//BLE mode
+	FLD_RF_BRX_SN_INIT	 		=   BIT(4),
+	FLD_RF_BRX_NESN_INIT	 	=   BIT(5),
+	FLD_RF_BTX_SN_INIT	 		=   BIT(6),
+	FLD_RF_BTX_NESN_INIT	 	=   BIT(7),
+};
+
+#define  	FSM_TIMEOUT_ENABLE 	 	( reg_rf_ll_ctrl_1 |= FLD_RF_FSM_TIMEOUT_EN )
+#define  	FSM_TIMEOUT_DISABLE		( reg_rf_ll_ctrl_1 &= (~FLD_RF_FSM_TIMEOUT_EN) )
+
+#define    reg_rf_ll_tx_stl         REG_ADDR16(REG_BB_LL_BASE_ADDR+0x04)
+
+#define    reg_rf_ll_tx_stl_l       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x04)
+
+
+#define    reg_rf_ll_tx_stl_h       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x05)
+enum{
+	FLD_RF_R_T_TXSTL_H           =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_ll_rxwait_l       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x06)
+
+
+#define    reg_rf_ll_rxwait_h       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x07)
+enum{
+	FLD_RF_R_T_RXWAIT_H           =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_ll_rx_l           REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0a)
+
+#define    reg_rf_rx_timeout		REG_ADDR16(REG_BB_LL_BASE_ADDR+0x0a)
+
+#define    reg_rf_ll_rx_h           REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0b)
+enum{
+	FLD_RF_R_T_RX_H               =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_ll_rxstl_l        REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0c)
+
+
+#define    reg_rf_ll_rxstl_h        REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0d)
+enum{
+	FLD_RF_R_T_RXSTL_H            =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_ll_txwait_l       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0e)
+
+
+#define    reg_rf_ll_txwait_h       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x0f)
+enum{
+	FLD_RF_R_T_TXWAIT_H           =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_ll_ard_l          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x10)
+
+
+#define    reg_rf_ll_ard_h          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x11)
+enum{
+	FLD_RF_R_T_ARD_H              =	BIT_RNG(0,3),
+};
+
+
+#define    reg_rf_t_coex_t1         REG_ADDR8(REG_BB_LL_BASE_ADDR+0x12)
+#define    reg_rf_t_coex_t2         REG_ADDR8(REG_BB_LL_BASE_ADDR+0x13)
+#define    reg_rf_ll_max_reset_cnt  REG_ADDR8(REG_BB_LL_BASE_ADDR+0x14)
+
+
+#define    reg_rf_ll_ctrl2          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x15)
+enum{
+	FLD_RF_R_TXCHN_MAN            =	BIT_RNG(0,2),
+	FLD_RF_R_NOACK_RECNT_EN       =	BIT(3),
+	FLD_RF_R_TXCHN_MAN_EN         =	BIT(4),
+	FLD_RF_R_NOACK_REV_EN         =	BIT(5),
+	FLD_RF_R_RXIRQ_REPORT_ALL     =	BIT(6),
+	FLD_RF_R_REP_SN_PID_EN        =	BIT(7),
+};
+
+
+#define    reg_rf_ll_ctrl3          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x16)
+enum{
+	FLD_RF_R_TX_EN_DLY_EN         =	BIT(0),
+	FLD_RF_R_PLL_RESET_EN         =	BIT(1),
+	FLD_RF_R_CMD_SCHDULE_EN       =	BIT(2),
+	FLD_RF_R_PLL_EN_MAN           =	BIT(3),
+	FLD_RF_R_T_TX_EN_DLY          =	BIT_RNG(4,7),
+};
+
+
+#define    reg_rf_ll_pll_reset      REG_ADDR8(REG_BB_LL_BASE_ADDR+0x17)
+#define    reg_rf_ll_cmd_schedule   REG_ADDR32(REG_BB_LL_BASE_ADDR+0x18)
+#define    reg_rf_ll_cmd_schedule0  REG_ADDR8(REG_BB_LL_BASE_ADDR+0x18)
+#define    reg_rf_ll_cmd_schedule1  REG_ADDR8(REG_BB_LL_BASE_ADDR+0x19)
+#define    reg_rf_ll_cmd_schedule2  REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1a)
+#define    reg_rf_ll_cmd_schedule3  REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1b)
+#define    reg_rf_ll_irq_mask_l     REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1c)
+#define    reg_rf_ll_irq_mask_h     REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1d)
+#define 	reg_rf_irq_mask			REG_ADDR16(REG_BB_LL_BASE_ADDR+0x1c)
+
+
+#define    reg_rf_ll_tx_id          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1e)
+enum{
+	FLD_RF_R_TX_ID                =	BIT_RNG(0,6),
+};
+
+
+#define    reg_rf_ll_tx_committed   REG_ADDR8(REG_BB_LL_BASE_ADDR+0x1f)
+enum{
+	FLD_RF_R_TX_COMMITTED         =	BIT_RNG(0,5),
+};
+
+
+
+#define    reg_rf_irq_status     REG_ADDR16(REG_BB_LL_BASE_ADDR+0x20)
+
+typedef enum{
+	FLD_RF_IRQ_RX                =	BIT(0),
+	FLD_RF_IRQ_TX                =	BIT(1),
+	FLD_RF_IRQ_RX_TIMEOUT        =	BIT(2),
+	FLD_RF_IRQ_RX_FIFO_FULL      =	BIT(3),
+	FLD_RF_IRQ_RX_CRC_2           =	BIT(4),
+	FLD_RF_IRQ_CMD_DONE          =	BIT(5),
+	FLD_RF_IRQ_FSM_TIMEOUT       =	BIT(6),
+	FLD_RF_IRQ_TX_RETRYCNT       =	BIT(7),
+	FLD_RF_IRQ_TX_DS             =	BIT(8),
+	FLD_RF_IRQ_RX_DR             =	BIT(9),
+	FLD_RF_IRQ_FIRST_TIMEOUT     =	BIT(10),
+	FLD_RF_IRQ_INVALID_PID       =	BIT(11),
+	FLD_RF_IRQ_STX_TIMEOUT       =	BIT(12),
+	FLD_RF_IRQ_WIFI_DENY         =	BIT(13),
+	FLD_RF_IRQ_SUPP_OF           =	BIT(14),
+	FLD_RF_IRQ_RXDMA_OF          =	BIT(15),
+	FLD_RF_IRQ_ALL 				 =  0XFFFF,
+}rf_irq_e;
+
+
+
+#define    reg_rf_ll_pid_l         REG_ADDR8(REG_BB_LL_BASE_ADDR+0x22)
+enum{
+	FLD_RF_PID0                   =	BIT_RNG(0,1),
+	FLD_RF_PID1                   =	BIT_RNG(2,3),
+	FLD_RF_PID2                   =	BIT_RNG(4,5),
+	FLD_RF_PID3                   =	BIT_RNG(6,7),
+};
+
+
+#define    reg_rf_ll_pid_h         REG_ADDR8(REG_BB_LL_BASE_ADDR+0x23)
+enum{
+	FLD_RF_PID4                   =	BIT_RNG(0,1),
+	FLD_RF_PID5                   =	BIT_RNG(2,3),
+	FLD_RF_NESN                   =	BIT(4),
+};
+
+
+#define    reg_rf_ll_2d_sclk       REG_ADDR8(REG_BB_LL_BASE_ADDR+0x24)
+typedef enum {
+    FLD_RF_STATE_MACHINE_IDLE = 0,          /**< idle */
+    FLD_RF_STATE_MACHINE_TX_SETTLE,         /**< tx settle*/
+	FLD_RF_STATE_MACHINE_TX,                /**< tx */
+	FLD_RF_STATE_MACHINE_RX_WAIT,           /**< rx wait */
+	FLD_RF_STATE_MACHINE_RX,                /**< rx */
+	FLD_RF_STATE_MACHINE_TX_WAIT,           /**< tx wait */
+} state_machine_status_e;
+
+
+#define    reg_rf_ll_retry_cnt     REG_ADDR8(REG_BB_LL_BASE_ADDR+0x25)
+enum{
+	FLD_RF_LL_RETRY_CNT           =	BIT_RNG(0,7),
+};
+
+
+#define    reg_rf_ll_cnt0          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x26)
+enum{
+	FLD_RF_CRC_CNT                =	BIT_RNG(0,3),
+	FLD_RF_NAK_CNT                =	BIT_RNG(4,7),
+};
+
+
+#define    reg_rf_ll_cnt1          REG_ADDR8(REG_BB_LL_BASE_ADDR+0x27)
+enum{
+	FLD_RF_OLD_CNT                =	BIT_RNG(0,3),
+	FLD_RF_ID_CNT                 =	BIT_RNG(4,7),
+};
+
+#define    reg_rf_ll_rx_fst_timeout      REG_ADDR32(REG_BB_LL_BASE_ADDR+0x28)
+#define    reg_rf_ll_rx_fst_l      REG_ADDR8(REG_BB_LL_BASE_ADDR+0x28)
+#define    reg_rf_ll_rx_fst_m      REG_ADDR8(REG_BB_LL_BASE_ADDR+0x29)
+#define    reg_rf_ll_rx_fst_h      REG_ADDR8(REG_BB_LL_BASE_ADDR+0x2a)
+
+#define    reg_rf_ll_fsm_timeout   REG_ADDR32(REG_BB_LL_BASE_ADDR+0x2c)
+#define    reg_rf_ll_fsm_timeout_l REG_ADDR8(REG_BB_LL_BASE_ADDR+0x2c)
+#define    reg_rf_ll_fsm_timeout_m REG_ADDR8(REG_BB_LL_BASE_ADDR+0x2d)
+#define    reg_rf_ll_fsm_timeout_h REG_ADDR8(REG_BB_LL_BASE_ADDR+0x2e)
+
+#define    reg_rf_fsm_timeout		REG_ADDR32(0x80140a2c)
+
+#define    reg_rf_coex_enable      REG_ADDR8(REG_BB_LL_BASE_ADDR+0x30)
+enum{
+	FLD_RF_COEX_EN                =	BIT(0),
+	FLD_RF_COEX_WF_DN_POL         =	BIT(1),
+	FLD_RF_COEX_STATUS            =	BIT(2),
+	FLD_RF_COEX_TRX_POL           =	BIT(3),
+	FLD_RF_TRX_PRIO               =	BIT(4),
+	FLD_RF_TX_PRIO                =	BIT(5),
+	FLD_RF_RX_PRIO                =	BIT(6),
+};
+#define	  CLEAR_ALL_RFIRQ_STATUS   		(reg_rf_irq_status = 0xffff)
+#define	  REG_TL_MODEM_BASE_ADDR				0x140c00//140c00
+
+#define		reg_rf_modem_mode_cfg_rx1_0	REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x20)
+enum
+{
+	FLD_RF_LR_MODE					  =	BIT(0),
+	FLD_RF_BT_BLE_SEL_AUTO			  =	BIT(1),
+	FLD_RF_BT_BLE_SEL_EN_RX		  =	BIT(2),
+	FLD_RF_CONT_MODE				  =	BIT(3),
+	FLD_RF_NTL_CV					  =	BIT(4),
+	FLD_RF_RX_DATA_CLK_DBG			  =	BIT(5),
+	FLD_RF_LR_TRIG_MODE			  =	BIT(6),
+	FLD_RF_FDC_DBG_SEL				  =	BIT(7),
+
+};
+#define		reg_rf_modem_mode_ctrl_tx1_0	REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x22)
+enum
+{
+	FLD_RF_BLE_MODEM_TX			  = BIT(0),
+};
+
+#define		reg_rf_modem_mode_cfg_txrx_0    REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x26)
+enum
+{
+	FLD_RF_X1_CQ_N					  = BIT(0),
+	FLD_RF_SYNC_RST_SEL				  = BIT(1),
+	FLD_RF_GF_BT					  = BIT(2),
+};
+
+#define     reg_rf_modem_rxc_mi_flex_ble_0    REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x48)
+enum
+{
+	FLD_RF_RXC_MI_FLEX_BLE_L      =  BIT_RNG(0,7),
+};
+#define     reg_rf_modem_rxc_mi_flex_ble_1    REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x49)
+enum
+{
+	FLD_RF_RXC_MI_FLEX_BLE_H     = BIT(0),
+};
+
+#define		reg_rf_modem_rx_ctrl_0		REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x4c)
+enum
+{
+	FLD_RF_RX_ACC_LNE				  = BIT_RNG(0,2),
+	FLD_RF_RX_CRC_EN					  = BIT(3),
+	FLD_RF_SFD0_NUM				  = BIT_RNG(4,6),
+};
+
+#define		reg_rf_modem_sync_thre_ble		REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x4e)
+#define		reg_rf_modem_fdc_dbg_lat		REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x58)
+#define		reg_rf_modem_gain_lat0			REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x5c)
+#define		reg_rf_agc_rssi_lat		REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x5d)
+
+#define		ref_rf_tim_align_1			REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x79)
+#define		reg_rf_bypass_filt_1		REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x7b)
+#define 	reg_rf_tx_tl_ctrl			REG_ADDR8(REG_TL_MODEM_BASE_ADDR+0x9a)
+enum
+{
+	FLD_RF_TX_TP_EN					= BIT(0),
+	FLD_RF_TX_IQ_EN					= BIT(1),
+	FLD_RF_TX_MPSK_EN					= BIT(2),
+	FLD_RF_TX_TP_ALIGN					= BIT(3),
+
+};
+
+#define		reg_rf_mode_cfg_rx1_0		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x20)
+enum
+{
+	FLD_RF_BW_CODE					  = BIT_RNG(1,3),
+	FLD_RF_SC_CODE					  = BIT(4),
+};
+
+#define		reg_rf_mode_cfg_rx1_1		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x21)
+enum
+{
+	FLD_RF_MODE_VANT_RX			  =	BIT(1),
+	FLD_RF_FE_RTRIM_RX				  = BIT_RNG(2,4),
+	FLD_RF_IF_FREQ					  = BIT_RNG(5,6),
+
+};
+
+#define		reg_rf_mode_cfg_tx1_0		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x22)
+enum
+{
+	FLD_RF_BLE_MODE_TX			      =	BIT(0),
+	FLD_RF_VCO_TRIM_KVM			  = BIT_RNG(1,3),
+	FLD_RF_HPMC_EXP_DIFF_COUNT_L	  = BIT_RNG(4,7),
+};
+
+#define		reg_rf_mode_cfg_tx1_1		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x23)
+enum
+{
+	FLD_RF_HPMC_EXP_DIFF_COUNT_H	  = BIT_RNG(0,4),
+	FLD_RF_DAC_TRIM_CFBK	  		  = BIT_RNG(5,6),
+
+};
+
+#define		reg_rf_mode_cfg_txrx_0		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x26)
+enum
+{
+	FLD_RF_DIS_CLK_DIG_O			= BIT(0),
+	FLD_RF_VANT_PULLDN				= BIT(1),
+	FLD_RF_TX_IQ_MODE_EN_BT			= BIT(2),
+	FLD_RF_LDO_ANT_TRIM				= BIT_RNG(3,5),
+	FLD_RF_CBPF_TYPE				= BIT(6),
+	FLD_RF_TX_PA_PWR_L				= BIT(7),
+};
+
+
+#define		reg_rf_mode_cfg_txrx_1		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x27)
+
+enum
+{
+	FLD_RF_TX_PA_PWR_H				= BIT_RNG(0,4),
+};
+
+#define		reg_rf_burst_cfg_txrx_0	REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x28)
+enum
+{
+	FLD_RF_CHNL_NUM				= BIT_RNG(0,7),
+};
+
+#define		reg_rf_burst_cfg_txrx_1	REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x29)
+enum
+{
+	FLD_RF_CH_NUMLL_SEL			= BIT(0),
+	FLD_RF_TX_EN_PIF				= BIT(1),
+	FLD_RF_RX_EN_PIF				= BIT(2),
+	FLD_RF_RX_TIM_SRQ_SEL_TESQ		= BIT(3),
+	FLD_RF_TX_TIM_SRQ_SEL_TESQ		= BIT(4),
+	FLD_RF_FE_CTRIM				= BIT_RNG(5,7),
+};
+
+#define     reg_rf_mode_cfg_tx3_0		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x3c)
+enum
+{
+	FLD_RF_MODE_CFG_TX3				= BIT_RNG(0,5),
+	FLD_RF_MODE_VANT_TX_BLE			= BIT(6),
+	FLD_RF_TX_IQ_MODE_EN_BLE		= BIT(7),
+};
+
+
+
+#define		reg_rf_mode_cfg_tx3_1		REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x3d)
+enum
+{
+	FLD_RF_LDO_ANT_TRIM_BLE		= BIT_RNG(0,2),
+	FLD_RF_BT_BLE_SEL_EN			= BIT(3),
+	FLD_RF_TXC_PWR_SRL				= BIT(4),
+	FLD_RF_BW_CODE_BLE				= BIT_RNG(5,7),
+
+};
+
+#define   reg_rf_mode_cfg_rx2_0        REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x3e)
+enum
+{
+   FLD_RF_TXC_MI_FLEX_L     = BIT_RNG(0,7),
+};
+#define   reg_rf_mode_cfg_rx2_1        REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x3f)
+enum
+{
+  FLD_RF_TXC_MI_FLEX_H   = BIT(0),
+};
+#define		reg_rf_txrx_dbg3_0		    REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x44)
+enum
+{
+	FLD_RF_CHNL_FREQ_DIRECT			= BIT(0),
+	FLD_RF_CHNL_FREQ_L					= BIT_RNG(1,7),
+};
+
+#define		reg_rf_txrx_dbg3_1		    REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x45)
+enum
+{
+	FLD_RF_CHNL_FREQ_H					= BIT_RNG(0,5),
+	FLD_RF_DSN_DITHER_DISABLE			= BIT(6),
+	FLD_RF_DSM_INT_MODE				= BIT(7),
+};
+
+#define		reg_rf_lnm_pa_ow_ctrl_val	REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x178)
+enum
+{
+	FLD_RF_RX_LNA_PUP_OW			= BIT(0),
+	FLD_RF_RX_LNA_HGAIN_OW			= BIT(1),
+	FLD_RF_RX_LNA_LGAIN_OW			= BIT(2),
+	FLD_RF_RX_LNA_ATTN_OW			= BIT(3),
+	FLD_RF_RX_MIX_PUP_OW			= BIT(4),
+	FLD_RF_TX_PA_PUP_OW				= BIT(5),
+	FLD_RF_TX_PA_PWR_OW				= BIT(6),
+	FLD_RF_PA_RAMP_TSEQ_OR_TX_ON	= BIT(7),
+};
+
+#define		reg_rf_pa_ow_val			  REG_ADDR8(REG_TL_RADIO_BASE_ADDR+0x17c)
+enum
+{
+	FLD_RF_TX_PA_PUP				= BIT(0),
+	FLD_RF_TX_PA_PWR				= BIT_RNG(1,6),
+};
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/soc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/soc.h
new file mode 100644
index 00000000..6f2ad137
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/soc.h
@@ -0,0 +1,238 @@
+/********************************************************************************************************
+ * @file	soc.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#pragma once
+#include "bit.h"
+
+/*Operation register, the highest bit must be set to 1 (|0x80000000),marked by minghai,confirmed by jianzhi.20210610.*/
+#define FLASH_R_BASE_ADDR   		0x20000000
+#define REG_RW_BASE_ADDR  			0x80000000
+#define REG_ADDR8(a)				(*(volatile unsigned char*)(REG_RW_BASE_ADDR | (a)))
+#define REG_ADDR16(a)				(*(volatile unsigned short*)(REG_RW_BASE_ADDR | (a)))
+#define REG_ADDR32(a)				(*(volatile unsigned long*)(REG_RW_BASE_ADDR | (a)))
+
+#define write_reg8(addr,v)			(*(volatile unsigned char*)(REG_RW_BASE_ADDR | (addr)) = (unsigned char)(v))
+#define write_reg16(addr,v)			(*(volatile unsigned short*)(REG_RW_BASE_ADDR | (addr)) = (unsigned short)(v))
+#define write_reg32(addr,v)			(*(volatile unsigned long*)(REG_RW_BASE_ADDR | (addr)) = (unsigned long)(v))
+
+#define read_reg8(addr)				(*(volatile unsigned char*)(REG_RW_BASE_ADDR | (addr)))
+#define read_reg16(addr)            (*(volatile unsigned short*)(REG_RW_BASE_ADDR | (addr)))
+#define read_reg32(addr)            (*(volatile unsigned long*)(REG_RW_BASE_ADDR | (addr)))
+
+#define write_sram8(addr,v)			(*(volatile unsigned char*)( (addr)) = (unsigned char)(v))
+#define write_sram16(addr,v)		(*(volatile unsigned short*)( (addr)) = (unsigned short)(v))
+#define write_sram32(addr,v)		(*(volatile unsigned long*)( (addr)) = (unsigned long)(v))
+
+#define read_sram8(addr)			(*(volatile unsigned char*)((addr)))
+#define read_sram16(addr)           (*(volatile unsigned short*)((addr)))
+#define read_sram32(addr)           (*(volatile unsigned long*)((addr)))
+#define TCMD_UNDER_BOTH				0xc0
+#define TCMD_UNDER_RD				0x80
+#define TCMD_UNDER_WR				0x40
+
+#define TCMD_MASK					0x3f
+
+#define TCMD_WRITE					0x3
+#define TCMD_WAIT					0x7
+#define TCMD_WAREG					0x8
+//#if 1 //optimize
+/*
+ * IRAM area:0x00000~0x1FFFF BIT(19) is 0,BIT(16~0) 128K is address offset
+ * DRAM area:0x80000~0x9FFFF BIT(19) is 1,BIT(16~0) 128K is address offset
+ * ILM area:0xc0000000~0xc0020000 BIT(31~19) is 3,BIT(21) is 0, BIT(20~17) do not care  BIT(16~0) 128K is address offset 128K is address offset
+ * DLM area:0xc0200000~0xc0220000 BIT(31~19) is 3,BIT(21) is 1, BIT(20~17) do not care  BIT(16~0) 128K is address offset 128K is address offset
+ * BIT(19) is used to distinguish from IRAM to DRAM, BIT(21) is used to distinguish from ILM to DLM.
+ * so we can write it as follow
+ * #define  convert_ram_addr_cpu2bus  (((((addr))&0x80000)? ((addr)| 0xc0200000) : ((addr)|0xc0000000)))
+ * BIT(20~17) are invalid address line ,IRAM address is less than 0x80000, (address-0x80000)must borrow from BIT(21)
+ *   #define convert(addr) ((addr)-0x80000+0xc0200000)
+ *  to simplify
+ *  #define convert(addr) ((addr)+0xc0180000)
+ * */
+//#define convert_ram_addr_cpu2bus(addr)  ((unsigned int)(addr)+0xc0180000)
+//#else  //no optimize
+//#define  convert_ram_addr_cpu2bus  (((((unsigned int)(addr)) >=0x80000)?(((unsigned int)(addr))-0x80000+0xc0200000) : (((unsigned int)(addr)) + 0xc0000000)))
+//#endif
+
+// go further, if the source and destination  address is not in the sram(IRAM/DRAM)  interval, no address translation
+#define convert_ram_addr_cpu2bus(addr)  (unsigned int)(addr) < 0xa0000 ? ((unsigned int)(addr)+0xc0180000): (unsigned int)(addr)
+
+#define convert_ram_addr_bus2cpu(addr)  (((((unsigned int)(addr)) >=0xc0200000)?(((unsigned int)(addr)) + 0x80000-0xc0200000) : (((unsigned int)(addr)) - 0xc0000000)))
+
+
+#define LM_BASE                        0x80000000
+
+#define ILM_BASE                       (LM_BASE + 0x40000000)
+#define DLM_BASE                       (LM_BASE + 0x40200000)
+#define CPU_ILM_BASE                   (0x00000000)
+#define CPU_DLM_BASE                   (0x00080000)
+
+#define   SC_BASE_ADDR			        0x1401c0
+/*******************************      reset registers: 1401e0      ******************************/
+#define reg_rst						REG_ADDR32(0x1401e0)
+
+#define reg_rst0					REG_ADDR8(0x1401e0)
+enum{
+	FLD_RST0_HSPI 			= 	BIT(0),
+	FLD_RST0_I2C 			= 	BIT(1),
+	FLD_RST0_UART0 			= 	BIT(2),
+	FLD_RST0_USB 			= 	BIT(3),
+	FLD_RST0_PWM 			= 	BIT(4),
+	//RSVD
+	FLD_RST0_UART1 			= 	BIT(6),
+	FLD_RST0_SWIRE 			= 	BIT(7),
+};
+
+
+#define reg_rst1					REG_ADDR8(0x1401e1)
+enum{
+	//RSVD
+	FLD_RST1_SYS_STIMER 	= 	BIT(1),
+	FLD_RST1_DMA 			=	BIT(2),
+	FLD_RST1_ALGM 			= 	BIT(3),
+	FLD_RST1_PKE 			= 	BIT(4),
+	//RSVD
+	FLD_RST1_PSPI 			=	BIT(6),
+	FLD_RST1_SPISLV 		=	BIT(7),
+};
+
+#define reg_rst2					REG_ADDR8(0x1401e2)
+enum{
+	FLD_RST2_TIMER 			=	BIT(0),
+	FLD_RST2_AUD 			=	BIT(1),
+	FLD_RST2_TRNG 			=	BIT(2),
+	//RSVD
+	FLD_RST2_MCU 			=	BIT(4),
+	FLD_RST2_LM 			= 	BIT(5),
+	FLD_RST2_NPE 			=	BIT(6),
+	//RSVD
+};
+
+#define reg_rst3					REG_ADDR8(0x1401e3)
+enum{
+	FLD_RST3_ZB 			=	BIT(0),
+	FLD_RST3_MSTCLK 		=	BIT(1),
+	FLD_RST3_LPCLK 			=	BIT(2),
+	FLD_RST3_ZB_CRYPT 		=	BIT(3),
+	FLD_RST3_MSPI 	    	=	BIT(4),
+	FLD_RST3_CODEC  		=	BIT(5),
+	FLD_RST3_SARADC			= 	BIT(6),
+	FLD_RST3_ALG 			=	BIT(7),
+};
+
+#define reg_clk_en					REG_ADDR32(0x1401e4)
+
+#define reg_clk_en0					REG_ADDR8(0x1401e4)
+enum{
+	FLD_CLK0_HSPI_EN 		= 	BIT(0),
+	FLD_CLK0_I2C_EN 		= 	BIT(1),
+	FLD_CLK0_UART0_EN 		= 	BIT(2),
+	FLD_CLK0_USB_EN 		= 	BIT(3),
+	FLD_CLK0_PWM_EN 		= 	BIT(4),
+	FLD_CLK0_UART1_EN 		= 	BIT(6),
+	FLD_CLK0_SWIRE_EN 		= 	BIT(7),
+};
+
+#define reg_clk_en1					REG_ADDR8(0x1401e5)
+enum{
+	FLD_CLK1_SYS_TIMER_EN 	= 	BIT(1),
+	FLD_CLK1_ALGM_EN 		= 	BIT(3),
+	FLD_CLK1_PKE_EN 		= 	BIT(4),
+	FLD_CLK1_MACHINETIME_EN = 	BIT(5),
+	FLD_CLK1_PSPI_EN 		= 	BIT(6),
+	FLD_CLK1_SPISLV_EN 		= 	BIT(7),
+
+};
+
+#define reg_clk_en2					REG_ADDR8(0x1401e6)
+enum{
+	FLD_CLK2_TIMER_EN 		= 	BIT(0),
+	FLD_CLK2_AUD_EN 		= 	BIT(1),
+	FLD_CLK2_TRNG_EN 		= 	BIT(2),
+	FLD_CLK2_MCU_EN 		= 	BIT(4),
+
+	FLD_CLK2_NPE_EN 		= 	BIT(6),
+	FLD_CLK2_EOC_EN 		= 	BIT(7),
+};
+
+#define reg_clk_en3					REG_ADDR8(0x1401e7)
+enum{
+	FLD_CLK3_ZB_PCLK_EN 	=	BIT(0),
+	FLD_CLK3_ZB_MSTCLK_EN 	=	BIT(1),
+	FLD_CLK3_ZB_LPCLK_EN 	=	BIT(2),
+};
+
+#define reg_clk_sel0				REG_ADDR8(0x1401e8)
+enum{
+	FLD_CLK_SCLK_DIV 		=	BIT_RNG(0,3),
+	FLD_CLK_SCLK_SEL 		=	BIT_RNG(4,6),
+	FLD_CLK_MSPI_CLK_SEL	=	BIT(7),
+};
+
+#define reg_clk_sel1				REG_ADDR8(0x1401e9)
+enum{
+	FLD_CLK_MSPI_DIV	 	=	BIT_RNG(4,7),
+};
+
+#define reg_i2s_step				REG_ADDR8(SC_BASE_ADDR+0x2a)
+enum{
+	FLD_I2S_STEP         	=	BIT_RNG(0,6),
+	FLD_I2S_CLK_EN         	=	BIT(7),
+};
+
+#define reg_i2s_mod				   	REG_ADDR8(SC_BASE_ADDR+0x2b)
+
+
+#define reg_dmic_step				REG_ADDR8(SC_BASE_ADDR+0x2c)
+enum{
+	FLD_DMIC_STEP         	=	BIT_RNG(0,6),
+	FLD_DMIC_SEL        	=	BIT(7),
+};
+
+#define reg_dmic_mod				REG_ADDR8(SC_BASE_ADDR+0x2d)
+
+#define reg_wakeup_en				REG_ADDR8(SC_BASE_ADDR+0x2e)
+enum{
+	FLD_USB_PWDN_I        	=	BIT(0),
+	FLD_GPIO_WAKEUP_I       =	BIT(1),
+	FLD_USB_RESUME        	=	BIT(2),
+	FLD_STANDBY_EX        	=	BIT(3),
+};
+
+#define reg_pwdn_en					REG_ADDR8(SC_BASE_ADDR+0x2f)
+
+#define reg_dmic_clk_set			REG_ADDR8(SC_BASE_ADDR+0x33)
+
+
+#define reg_wakeup_status			0x64
+typedef enum{
+	FLD_WKUP_CMP			=	BIT(0),
+	FLD_WKUP_TIMER			=	BIT(1),
+	FLD_WKUP_DIG			=	BIT(2),
+	FLD_WKUP_PAD			=	BIT(3),
+	FLD_WKUP_MDEC			=	BIT(4),
+	FLD_MDEC_RSVD			=	BIT_RNG(5,7),
+}wakeup_status_e;
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/spi_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/spi_reg.h
new file mode 100644
index 00000000..9392d7b0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/spi_reg.h
@@ -0,0 +1,394 @@
+/********************************************************************************************************
+ * @file	spi_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef SPI_REG_H
+#define SPI_REG_H
+
+#include "soc.h"
+
+/*******************************      hspi registers: 0x1FFFFC0     ******************************/
+
+
+
+#define    HSPI_BASE_ADDR			        0x1FFFFC0
+#define    PSPI_BASE_ADDR			        0x140040
+#define    BASE_ADDR_DIFF			        0x1EBFF80
+
+#define   reg_hspi_data_buf_adr               0x1FFFFC8
+#define   reg_hspi_xip_base_adr               0x1000000
+#define   reg_spi_data_buf_adr(i)             0x80140048+(i)*BASE_ADDR_DIFF
+/**
+ * BIT[0:1] the minimum time between the edge of SPI_CS and  the edges of SPI_CLK.the actual duration is (SPI_CLK_OUT/2)*(cs2sclk+1).master only
+ * BIT[2]  set 3line mode ,MOSI is bi-directional signal in regular mode.master only
+ * BIT[3]  transfer data with least significant bit first.1: LSB  0: MSB default. master/slave
+ * BIT[4]  set dual io mode.master only
+ * BIT[5:6] set spi 4 mode. master/slave
+ *  *  *         bit5: CPHA-SPI_CLK Phase,bit6: CPOL-SPI_CLK Polarity
+ *            MODE0:  CPOL = 0, CPHA =0;
+ *            MODE1:  CPOL = 0, CPHA =1;
+ *            MODE2:  CPOL = 1, CPHA =0;
+ *            MODE3:  CPOL = 1, CPHA =1;
+ * BIT[7]  set master/slave mode. 0 slave 1 master default.master/slave
+ */
+#define reg_spi_mode0(i) 			REG_ADDR8(PSPI_BASE_ADDR+(i)*BASE_ADDR_DIFF)
+enum{
+	FLD_SPI_CS2SCLK 	        = BIT_RNG(0,1),
+	FLD_SPI_3LINE 	     	    = BIT(2),
+	FLD_SPI_LSB 		        = BIT(3),
+	FLD_SPI_DUAL			    = BIT(4),
+    FLD_SPI_MODE_WORK_MODE     = BIT_RNG(5,6),
+	FLD_SPI_MASTER_MODE      	= BIT(7),
+};
+
+/*the clock freq ratio between the source_clock and spi_clock.master only
+ * spi_clock=source_clock/((spi_clk_div+1)*2)
+ * spi_clk_div=reg_hspi_mode1[7:0]. max_value=0xff,spi_clock==source_clock
+ */
+//#define reg_hspi_mode1			REG_ADDR8(HSPI_BASE_ADDR+0x01)
+#define reg_spi_mode1(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x01+(i)*BASE_ADDR_DIFF)
+
+/**
+ * BIT[0]  set cmd format 0: single mode  1: the format of the cmd phase is the same as the data phase(Dual/Quad).master only
+ * BIT[1]  set spi quad I/O mode. master only
+ * BIT[2]  set the spi commnd phase enable.master only
+ * BIT[4:7]   the minimum time that SPI CS should stay HIGH.the actual duration is (SPI_CLK period_out / 2)*(csht+1).default=2,master only
+ */
+#define reg_spi_mode2(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x02+(i)*BASE_ADDR_DIFF)
+
+
+enum{
+	FLD_HSPI_CMD_FMT 	         =BIT(0),
+	FLD_HSPI_QUAD 	             =BIT(1),
+	FLD_SPI_CMD_EN 	       		 =BIT(2),
+	FLD_SPI_HSPI_MODE2_RESERVED  =BIT(3),
+	FLD_SPI_CSHT                 =BIT_RNG(4,7),
+};
+
+/**
+ * BIT[0:7]   transfer count0 for write data.master only
+ */
+#define reg_spi_tx_cnt0(i)		  	   REG_ADDR8(PSPI_BASE_ADDR+0x03+(i)*BASE_ADDR_DIFF)
+
+/**
+ * BIT[0:7]   transfer count1 for write data.master only
+ */
+
+#define reg_spi_tx_cnt1(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x12+(i)*(BASE_ADDR_DIFF-0x12+0x20))
+//#define reg_hspi_tx_cnt1		   REG_ADDR8(HSPI_BASE_ADDR+0x20)
+/**
+ * BIT[0:7]   transfer count2 for write data.master only
+ */
+
+#define reg_spi_tx_cnt2(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x13+(i)*(BASE_ADDR_DIFF-0x13+0x21))
+
+/**
+ * BIT[0:7]   transfer count0 for read data.master only
+ */
+#define reg_spi_rx_cnt0(i) 			 REG_ADDR8(PSPI_BASE_ADDR+0x04+(i)*BASE_ADDR_DIFF)
+
+/**
+ * BIT[0:7]   transfer count1 for read data.master only
+ */
+
+#define reg_spi_rx_cnt1(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x10+(i)*(BASE_ADDR_DIFF-0x10+0x1e))
+/**
+ * BIT[0:7]   transfer count2 for read data.master only
+ */
+
+#define reg_spi_rx_cnt2(i) 			REG_ADDR8(PSPI_BASE_ADDR+0x11+(i)*(BASE_ADDR_DIFF-0x11+0x1f))
+
+
+
+/**
+ * BIT[0:3]  dummy data cnt, dummy is always single wire mode, dummy number = dummy_cnt + 1.master only
+ * BIT[4:7]  the transfer mode.master only
+ * the transfer sequence could be:
+ * 0x0:write and read at the same time(must enbale CmdEn)
+ * 0x1:write only
+ * 0x2:read only(must enbale CmdEn)
+ * 0x3:write,read
+ * 0x4:read,write
+ * 0x5:write,dummy,read
+ * 0x6:read,dummy,write(must enbale CmdEn)
+ * 0x7:None Data(must enbale CmdEn)
+ * 0x8:Dummy,write
+ * 0x9:Dummy,read
+ * 0xa~0xf:reserved
+ */
+#define reg_spi_trans0(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x05+(i)*BASE_ADDR_DIFF)
+
+enum{
+	FLD_SPI_DUMMY_CNT	       = BIT_RNG(0,3),
+	FLD_SPI_TRANSMODE 	        =BIT_RNG(4,7),
+};
+
+
+
+/**
+ * BIT[0:7]  SPI Command.master only
+ */
+
+#define reg_spi_trans1(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x06+(i)*BASE_ADDR_DIFF)
+enum{
+	FLD_SPI_CMD_RESERVED            =BIT(0),
+	FLD_SPI_CMD_TRANS_HWORD         =BIT(1),//1 apb hword transfer
+	FLD_SPI_CMD_TRANS_WORD	         =BIT(2),//1 apb word transfer
+	FLD_SPI_CMD_RD_DUMMY_4CYCLE	 =BIT(3),// 0 8cycle 1 4cycle
+	FLD_SPI_CMD_ADDR_AUTO_INCREASE  =BIT(4),// 0 AUTO incease
+	FLD_SPI_CMD_DATA_DUAL	         =BIT(5),// 0 Single 1 DuaL
+	FLD_SPI_CMD_ADDR_DUAL           =BIT(6),// 0 Single 1 DuaL
+	FLD_SPI_CMD_RD_EN	             =BIT(7),// 0  write 1 read
+};
+
+/**
+ * BIT[0] enable the SPI Receive FIFO Overrun interrupt . slave only
+ * BIT[1] enable the SPI Transmit FIFO Underrun interrupt. slave only
+ * BIT[2] enable the SPI Receive FIFO Threshold interrupt.master/slave
+ * BIT[3] enable the SPI Transmit FIFO Threshold interrupt.master/slave
+ * BIT[4] enable the SPI Transmit end interrupt.master/slave
+ * BIT[5] enable  slvCmdint.The slave command interrupt is triggered each byte command received (starting 8 bit) .slave only
+ * BIT[6] enable RX DMA
+ * BIT[7] enable TX DMA
+ */
+
+#define reg_spi_trans2(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x07+(i)*BASE_ADDR_DIFF)
+enum{
+	FLD_SPI_RXFIFO_OR_INT_EN        =BIT(0),
+	FLD_SPI_TXFIFO_UR_INT_EN        =BIT(1),
+	FLD_SPI_RXFIFO_INT_EN 	        =BIT(2),
+	FLD_SPI_TXFIFO_INT_EN		    =BIT(3),
+	FLD_SPI_END_INT_EN              =BIT(4),
+	FLD_SPI_SLV_CMD_EN	            =BIT(5),
+	FLD_SPI_RX_DMA_EN               =BIT(6),
+	FLD_SPI_TX_DMA_EN 	            =BIT(7),
+};
+
+
+/**
+ * BIT[0:7]   data0[7:0] to transmit or received.
+ */
+
+#define reg_spi_wr_rd_data0(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x08+(i)*BASE_ADDR_DIFF)
+/**
+ * BIT[0:7]   data1[7:0] to transmit or received.
+ */
+
+#define reg_spi_wr_rd_data1(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x09+(i)*BASE_ADDR_DIFF)
+/**
+ * BIT[0:7]   data2[7:0] to transmit or received.
+ */
+#define reg_spi_wr_rd_data2(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x0a+(i)*BASE_ADDR_DIFF)
+
+/**
+ * BIT[0:7]   data3[7:0] to transmit or received.
+ */
+
+#define reg_spi_wr_rd_data3(i) 		  	REG_ADDR8(PSPI_BASE_ADDR+0x0b+(i)*BASE_ADDR_DIFF)
+
+#define reg_spi_wr_rd_data(i,j)		 REG_ADDR8(PSPI_BASE_ADDR+0x08+(j)+(i)*BASE_ADDR_DIFF)
+
+
+
+/**
+ * BIT[0:3]  number of valid entries in the rxfifo.
+ * BIT[4:7]  number of valid entries in the txfifo.
+ */
+#define reg_spi_fifo_num(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x0c+(i)*BASE_ADDR_DIFF)
+
+enum{
+	FLD_SPI_RXF_NUM          = BIT_RNG(0,3),
+	FLD_SPI_TXF_NUM          = BIT_RNG(4,7),
+};
+
+/**
+ * BIT[2]  rxfifo reset,write 1 to reset. Spi clock must turn on.
+ * BIT[3]  txfifo reset,write 1 to reset. Spi clock must turn on
+ * BIT[4]  rxfifo full flag.
+ * BIT[5]  rxfifo empty flag
+ * BIT[6]  txfifo full flag.
+ * BIT[7]  txfifo empty flag
+ */
+#define reg_spi_fifo_state(i) 		REG_ADDR8(PSPI_BASE_ADDR+0x0d+(i)*BASE_ADDR_DIFF)
+
+enum{
+	FLD_SPI_FIFO_STA_RESERVED 	= BIT_RNG(0,1),
+	FLD_SPI_RXF_CLR	      		=BIT(2),
+	FLD_SPI_TXF_CLR		        =BIT(3),
+	FLD_SPI_RXF_FULL            =BIT(4),
+	FLD_SPI_RXF_EMPTY	        =BIT(5),
+	FLD_SPI_TXF_FULL            =BIT(6),
+    FLD_SPI_TXF_EMPTY	        =BIT(7),
+};
+
+/**
+ * BIT[2]  RX FIFO Overrun interrupt status. slave only
+ * BIT[3]  TX FIFO Underrun interrupt status. slave only
+ * BIT[4]  RX FIFO Threshold interrupt status.set 1 to clear. master/slave
+ * BIT[5]  TX FIFO Threshold interrupt status.set 1 to clear. master/slave
+ * BIT[6]  End of SPI Transfer interrupt status.set 1 to clear.master/slave
+ * BIT[7]  Slave Command Interrupt status.set 1 to clear.slave only
+ */
+#define reg_spi_irq_state(i) 		REG_ADDR8(PSPI_BASE_ADDR + 0x0e +(i)*BASE_ADDR_DIFF)
+
+enum{
+	FLD_SPI_STATE_RESERVED  =BIT_RNG(0,1),
+	FLD_SPI_RXF_OR_INT	    =BIT(2),
+	FLD_SPI_TXF_UR_INT	    =BIT(3),
+	FLD_SPI_RXF_INT         =BIT(4),
+	FLD_SPI_TXF_INT 	    =BIT(5),
+	FLD_SPI_END_INT         =BIT(6),
+    FLD_SPI_SLV_CMD_INT	    =BIT(7),
+};
+
+/**
+ * BIT[0]  set this bit to indicate that spi as slave is ready for data transaction
+ * BIT[1]  spi soft reset.high valid.
+ * BIT[4:6] fifo threshold. 0x4 default.
+ * BIT[7]  SPI transfer status .1 is busy, 0 not busy.
+ */
+#define reg_spi_status(i) 		REG_ADDR8(PSPI_BASE_ADDR + 0x0f +(i)*BASE_ADDR_DIFF)
+enum{
+	FLD_HSPI_SLAVE_READY	       =BIT(0),
+	FLD_HSPI_SOFT_RESET	           =BIT(1),
+	FLD_HSPI_HSPI_STATUS_RESERVED  =BIT_RNG(2,3),
+	FLD_HSPI_FIFO_THRES            =BIT_RNG(4,6),
+	FLD_HSPI_BUSY                  =BIT(7),
+};
+
+/**
+ * BIT[0:7]  hspi_addr0.
+ */
+#define reg_hspi_addr0		REG_ADDR8(HSPI_BASE_ADDR+0x10)
+
+/**
+ * BIT[0:7]  hspi_addr1.
+ */
+#define reg_hspi_addr1		REG_ADDR8(HSPI_BASE_ADDR+0x11)
+
+/**
+ * BIT[0:7]  hspi_addr2.
+ */
+#define reg_hspi_addr2		REG_ADDR8(HSPI_BASE_ADDR+0x12)
+
+/**
+ * BIT[0:7]  hspi_addr3.
+ */
+#define reg_hspi_addr3		REG_ADDR8(HSPI_BASE_ADDR+0x13)
+
+#define reg_hspi_addr(i)	REG_ADDR8(HSPI_BASE_ADDR+0x10+i)
+
+/**   hspi_addr0~ hspi_addr3.
+ */
+#define reg_hspi_addr_32		REG_ADDR32(HSPI_BASE_ADDR+0x10)
+
+
+
+/**
+ * BIT[0]  1:enable addr phase, master only
+ * BIT[1]  0:single mode  1:the format of addr phase is the same as the data phase(Dual/Quad).master only
+ * BIT[2:3] address length.2'b00:1bye  2'b01:2bytes  2'b10:3bytes  2'b11:4bytes.master only
+ * BIT[4]  enable xip.
+ * BIT[5]  stop xip.
+ * BIT[6]  xip mode 0:xip normal mode  1:xip sequential mode
+ * BIT[7]  0:xip timeout ,disable 1:xip timeout enable .default 1
+ */
+#define reg_hspi_xip_ctrl		REG_ADDR8(HSPI_BASE_ADDR+0x14)
+enum{
+	FLD_HSPI_ADDR_EN	        = BIT(0),
+	FLD_HSPI_ADDR_FMT	        = BIT(1),
+	FLD_HSPI_ADDR_LEN           = BIT_RNG(2,3),
+	FLD_HSPI_XIP_ENABLE         = BIT(4),
+	FLD_HSPI_XIP_STOP           = BIT(5),
+	FLD_HSPI_XIP_MODE           = BIT(6),
+	FLD_HSPI_XIP_TIMEOUT_MODE   = BIT(7),
+};
+
+
+/**
+ * BIT[0:7] write command used for xip
+ */
+#define reg_hspi_xip_wr_cmd		 REG_ADDR8(HSPI_BASE_ADDR+0x15)
+
+/**
+ * BIT[0:7] read command used for xip
+ */
+#define reg_hspi_xip_rd_cmd		 REG_ADDR8(HSPI_BASE_ADDR+0x16)
+
+/**
+ * BIT[0:7]  Use this combined with xip_mode being xip sequential mode.default page boundary size is 32byte, 2^page_size.
+ */
+#define reg_hspi_page_size		 REG_ADDR8(HSPI_BASE_ADDR+0x17)
+
+
+/**
+ * BIT[0:3]  xip write mode .default 1, write trans mode is write only.
+ * BIT[4:7]  xip read mode.  default 2 ,read trans  mode is read only.
+ */
+#define reg_hspi_xip_trans_mode  REG_ADDR8(HSPI_BASE_ADDR+0x18)
+enum{
+ FLD_HSPI_XIP_WR_TRANS_MODE          = BIT_RNG(0,3),
+ FLD_HSPI_XIP_RD_TRANS_MODE          = BIT_RNG(4,7),
+};
+
+/**
+ * BIT[0:7]  xip_addr_offset0.
+ */
+#define reg_hspi_xip_addr_offset0  REG_ADDR8(HSPI_BASE_ADDR+0x19)
+
+/**
+ * BIT[0:7]  xip_addr_offset1.
+ */
+#define reg_hspi_xip_addr_offset1  REG_ADDR8(HSPI_BASE_ADDR+0x1a)
+
+
+/**
+ * BIT[0:7]  xip_addr_offset2.
+ */
+#define reg_hspi_xip_addr_offset2  REG_ADDR8(HSPI_BASE_ADDR+0x1b)
+
+/**
+ * BIT[0:7]  xip_addr_offset3.
+ */
+#define reg_hspi_xip_addr_offset3  REG_ADDR8(HSPI_BASE_ADDR+0x1c)
+
+
+
+/**
+ * BIT[0:7]  when XIP_TIMEOUT_MODE enable,timeout period=spi_clock_out_period*timeout_cnt
+ */
+#define reg_hspi_xip_timeout_cnt   REG_ADDR8(HSPI_BASE_ADDR+0x1d)
+/**
+ * BIT[0]    1:enable hspi 3line dcx (data/command selection), master only,for spi panel(LCD OLED ...)
+ * BIT[1]    hspi 3line dcx (data/command selection). 0:command 1:data
+ * BIT[4:2]  2data_lane mode.3'b000:2data_lane close  3'b001:RGB565  3'b011:RGB666  3'b011:RGB888.
+ */
+#define reg_hspi_panel_ctrl		REG_ADDR8(HSPI_BASE_ADDR+0x22)
+enum{
+	FLD_HSPI_PANEL_3LINE_DCX_EN     = BIT(0),
+	FLD_HSPI_PANEL_3LINE_DCX	    = BIT(1),
+	FLD_HSPI_PANEL_2DATA_LANE       = BIT_RNG(2,4),
+};
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/stimer_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/stimer_reg.h
new file mode 100644
index 00000000..b452fca6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/stimer_reg.h
@@ -0,0 +1,84 @@
+/********************************************************************************************************
+ * @file	stimer_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef STIMER_REG_H_
+#define STIMER_REG_H_
+
+#include "soc.h"
+/*******************************      sys clock registers: 0x140200       ******************************/
+#define STIMER_BASE_ADDR			   	0x140200
+#define reg_system_tick         		REG_ADDR32(STIMER_BASE_ADDR)
+
+#define reg_system_irq_level         	REG_ADDR32(STIMER_BASE_ADDR+0x4)
+
+#define reg_system_irq_mask				REG_ADDR8(STIMER_BASE_ADDR+0x8)
+enum{
+	FLD_SYSTEM_IRQ_MASK 	= 	BIT_RNG(0,2),
+	FLD_SYSTEM_TRIG_PAST_EN = 	BIT(3),
+};
+
+#define reg_system_cal_irq		REG_ADDR8(STIMER_BASE_ADDR+0x9)
+
+typedef enum{
+	FLD_SYSTEM_IRQ  		= 	BIT(0),
+	FLD_SYSTEM_32K_IRQ  	= 	BIT(1),
+}stimer_irq_e;
+
+#define reg_system_ctrl		    REG_ADDR8(STIMER_BASE_ADDR+0xa)
+enum{
+	FLD_SYSTEM_32K_WR_EN 		= 	BIT(0),
+	FLD_SYSTEM_TIMER_EN 	    = 	BIT(1),
+	FLD_SYSTEM_TIMER_AUTO 	    = 	BIT(2),
+	FLD_SYSTEM_32K_TRACK_EN 	= 	BIT(3),
+	FLD_SYSTEM_32K_CAL_MODE 	= 	BIT_RNG(4,7),
+
+};
+
+#define reg_system_st		    REG_ADDR8(STIMER_BASE_ADDR+0xb)
+
+enum{
+
+	FLD_SYSTEM_CMD_STOP 			=   BIT(1),
+	FLD_SYSTEM_CMD_SYNC		        =   BIT(3),
+	FLD_SYSTEM_CLK_32K		        =   BIT(4),
+	FLD_SYSTEM_CLR_RD_DONE			=   BIT(5),
+	FLD_SYSTEM_RD_BUSY			    =   BIT(6),
+	FLD_SYSTEM_CMD_SET_DLY_DONE	    =   BIT(7),
+
+};
+
+#define reg_system_timer_set_32k         	REG_ADDR32(STIMER_BASE_ADDR+0xc)
+
+#define reg_system_timer_read_32k         	REG_ADDR32(STIMER_BASE_ADDR+0x10)
+
+#define reg_system_cal_latch_32k         	REG_ADDR32(STIMER_BASE_ADDR+0x14)
+
+#define reg_system_up_32k					REG_ADDR32(STIMER_BASE_ADDR+0x18)
+enum{
+
+	FLD_SYSTEM_UPDATE_UPON_32K 			=   BIT(0),
+	FLD_SYSTEM_RUN_UPON_NXT_32K		    =   BIT(1),
+};
+
+#endif /* STIMER_REG_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/swire_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/swire_reg.h
new file mode 100644
index 00000000..002fe773
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/swire_reg.h
@@ -0,0 +1,59 @@
+/********************************************************************************************************
+ * @file	swire_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef SWIRE_REG_H
+#define SWIRE_REG_H
+#include "soc.h"
+
+
+
+
+#define    SWIRE_BASE_ADDR			        0x100c00
+
+
+#define   reg_swire_data      		    REG_ADDR8(SWIRE_BASE_ADDR)
+
+#define   reg_swire_ctl				    REG_ADDR8(SWIRE_BASE_ADDR+1)
+enum{
+	FLD_SWIRE_WR	        	= BIT(0),
+	FLD_SWIRE_RD 	     	    = BIT(1),
+	FLD_SWIRE_CMD 		        = BIT(2),
+	FLD_SWIRE_ERR_FLAG			= BIT(3),
+	// default :FLD_SWIRE_EOP = 1: 1byte format--- 1bit cmd + 8bit data +1 clock end(0)
+	// FLD_SWIRE_EOP = 0: 1byte format--- 1bit cmd + 8bit data +1bit(1) + 1 clock end(0)
+	FLD_SWIRE_EOP     			= BIT(4),
+	FLD_SWIRE_USB_DET    	  	= BIT(6),
+	FLD_SWIRE_USB_EN      		= BIT(7),
+};
+#define   reg_swire_ctl2				 REG_ADDR8(SWIRE_BASE_ADDR+2)
+enum{
+	FLD_SWIRE_CLK_DIV	        = BIT_RNG(0,6),
+};
+
+#define   reg_swire_id				    REG_ADDR8(SWIRE_BASE_ADDR+3)
+enum{
+	FLD_SWIRE_ID_VALID	        = BIT_RNG(0,4),
+	FLD_SWIRE_FIFO_MODE	        = BIT(7),
+};
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/timer_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/timer_reg.h
new file mode 100644
index 00000000..d3c6cfb6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/timer_reg.h
@@ -0,0 +1,72 @@
+/********************************************************************************************************
+ * @file	timer_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef TIMER_REG_H
+#define TIMER_REG_H
+#include "soc.h"
+
+/*******************************      timer registers: 0x140140     ******************************/
+#define reg_tmr_ctrl0			REG_ADDR8(0x140140)
+#define reg_tmr_ctrl16			REG_ADDR16(0x140140)
+#define reg_tmr_ctrl32			REG_ADDR32(0x140140)
+enum{
+	FLD_TMR0_MODE =				BIT_RNG(0,1),
+	FLD_TMR0_EN =				BIT(2),
+	FLD_TMR0_NOWRAP = 			BIT(3),
+	FLD_TMR1_MODE =				BIT_RNG(4,5),
+	FLD_TMR1_EN =				BIT(6),
+	FLD_TMR1_NOWRAP  = 			BIT(7),
+};
+
+#define reg_tmr_ctrl2			REG_ADDR8(0x140142)
+
+enum{
+	FLD_TMR_WD_EN =				BIT(7),
+};
+
+#define reg_tmr_sta				REG_ADDR8(0x140143)
+enum{
+	FLD_TMR_STA_TMR0   =		BIT(0),
+	FLD_TMR_STA_TMR1   =		BIT(1),
+	FLD_TMR_STA_WD     =		BIT(2),
+	FLD_TMR_WD_CNT_CLR =		BIT(3),
+	FLD_TMR_SW_IRQ     =		BIT(7),
+};
+
+#define  reg_tmr0_capt          REG_ADDR32(0x140144)
+#define  reg_tmr1_capt          REG_ADDR32(0x140148)
+#define  reg_tmr_capt(i)		REG_ADDR32(0x140144 + ((i) << 2))
+
+#define  reg_wt_target0         REG_ADDR8(0x14014c)// always is 0x00
+#define  reg_wt_target1         REG_ADDR8(0x14014d)
+#define  reg_wt_target2         REG_ADDR8(0x14014e)
+#define  reg_wt_target3         REG_ADDR8(0x14014f)
+#define  reg_wt_target          REG_ADDR32(0x14014c)
+
+
+#define reg_tmr0_tick			REG_ADDR32(0X140150)
+#define reg_tmr1_tick			REG_ADDR32(0X140154)
+#define reg_tmr_tick(i)			REG_ADDR32(0X140150 + ((i) << 2))
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/trng_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/trng_reg.h
new file mode 100644
index 00000000..d3a26ba6
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/trng_reg.h
@@ -0,0 +1,53 @@
+/********************************************************************************************************
+ * @file	trng_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef TRNG_REG_H_
+#define TRNG_REG_H_
+
+/*******************************      trng registers: 101800      ******************************/
+#define REG_TRNG_BASE					0x101800
+
+
+#define reg_trng_cr0					REG_ADDR8(REG_TRNG_BASE)
+enum{
+	FLD_TRNG_CR0_RBGEN		= 	BIT(0),
+	FLD_TRNG_CR0_ROSEN0 	= 	BIT(1),
+	FLD_TRNG_CR0_ROSEN1 	= 	BIT(2),
+	FLD_TRNG_CR0_ROSEN2 	= 	BIT(3),
+	FLD_TRNG_CR0_ROSEN3 	= 	BIT(4),
+};
+
+#define reg_trng_rtcr					REG_ADDR32(REG_TRNG_BASE+0x04)
+enum{
+	FLD_TRNG_RTCR_MSEL		= 	BIT(0),
+};
+
+#define reg_rbg_sr						REG_ADDR8(REG_TRNG_BASE+0x08)
+enum{
+	FLD_RBG_SR_DRDY			= 	BIT(0),
+};
+
+#define reg_rbg_dr						REG_ADDR32(REG_TRNG_BASE+0x0c)
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/uart_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/uart_reg.h
new file mode 100644
index 00000000..a78f3c71
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/uart_reg.h
@@ -0,0 +1,139 @@
+/********************************************************************************************************
+ * @file	uart_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef UART_REG_H
+#define UART_REG_H
+#include "soc.h"
+
+/*******************************      uart0 registers: 0x80140080   *******************************/
+/*******************************      uart1 registers: 0x801400c0      ******************************/
+#define reg_uart_data_buf_adr(i)  (0x80140080+(i)*0x40)  //uart(i)
+
+#define reg_uart_data_buf(i,j)    REG_ADDR8(reg_uart_data_buf_adr(i)+(j)) //uart(i)_buf(j)
+#define reg_uart_data_hword_buf(i,j)  REG_ADDR16(reg_uart_data_buf_adr(i)+(j)*2)
+
+#define reg_uart_data_word_buf(i)  REG_ADDR32(reg_uart_data_buf_adr(i)) //uart(i)
+
+#define reg_uart_clk_div(i)		REG_ADDR16(0x140084+(i)*0x40)
+
+enum{
+	FLD_UART_CLK_DIV = 			BIT_RNG(0,14),
+	FLD_UART_CLK_DIV_EN = 		BIT(15)
+};
+
+#define reg_uart_ctrl0(i)			REG_ADDR8(0x140086+(i)*0x40)
+
+enum{
+	FLD_UART_BPWC_O = 			BIT_RNG(0,3),
+	FLD_UART_MASK_RX_IRQ = 		BIT(6),
+	FLD_UART_MASK_TX_IRQ =		BIT(7)
+};
+
+#define reg_uart_ctrl1(i)         		REG_ADDR8(0x140087+(i)*0x40)
+
+enum {
+    FLD_UART_TX_CTS_POLARITY = 	BIT(0),
+    FLD_UART_TX_CTS_ENABLE = 	BIT(1),
+    FLD_UART_PARITY_ENABLE = 	BIT(2),
+    FLD_UART_PARITY_POLARITY = 	BIT(3),       //1:odd parity   0:even parity
+    FLD_UART_STOP_SEL = 		BIT_RNG(4,5),
+    FLD_UART_TTL_ENABLE = 		BIT(6),
+    FLD_UART_LOOPBACK_O = 		BIT(7),
+};
+
+
+#define reg_uart_ctrl2(i)			REG_ADDR16(0x140088+(i)*0x40)
+
+enum {
+    FLD_UART_RTS_TRIQ_LEV   	= BIT_RNG(0,3),
+    FLD_UART_RTS_POLARITY 		= BIT(4),
+    FLD_UART_RTS_MANUAL_V 	 	= BIT(5),
+    FLD_UART_RTS_MANUAL_M 		= BIT(6),
+    FLD_UART_RTS_EN 			= BIT(7),
+};
+
+#define reg_uart_ctrl3(i)        	REG_ADDR8(0x140089+(i)*0x40)
+
+enum {
+	FLD_UART_RX_IRQ_TRIQ_LEV 	= BIT_RNG(0,3),
+	FLD_UART_TX_IRQ_TRIQ_LEV 	= BIT_RNG(4,7),
+};
+////////////////////////////////////////////////////
+#define reg_uart_rx_timeout0(i)	REG_ADDR8(0x14008a+(i)*0x40)
+
+enum{
+	FLD_UART_TIMEOUT_BW		 = 	BIT_RNG(0,7),
+};
+
+#define reg_uart_rx_timeout1(i)  REG_ADDR8(0x14008b+0x40*(i))
+
+enum{
+	FLD_UART_TIMEOUT_MUL	 = 	BIT_RNG(0,1),
+	FLD_UART_MARK_RXDONE	 =  BIT(2),
+	//rsvd BIT(4)
+	FLD_UART_P7816_EN	 	 =  BIT(5),
+	FLD_UART_MASK_TXDONE	 =  BIT(6),
+	FLD_UART_MASK_ERR_IRQ 	 =  BIT(7),
+};
+
+
+
+#define reg_uart_buf_cnt(i)       REG_ADDR8(0x14008c+(i)*0x40)
+enum{
+	FLD_UART_RX_BUF_CNT		=  BIT_RNG(0,3),
+	FLD_UART_TX_BUF_CNT		=  BIT_RNG(4,7),
+};
+
+#define reg_uart_status1(i)			REG_ADDR8(0x14008d+((i)*0x40))
+enum{
+	FLD_UART_RBCNT 	     	=  BIT_RNG(0,2),
+	FLD_UART_IRQ_O    		=  BIT(3),
+	FLD_UART_WBCNT 	     	=  BIT_RNG(4,6), //R
+	FLD_UART_CLEAR_RX 		=  BIT(6),		 //Write 1 clear RX
+	FLD_UART_RX_ERR	 		=  BIT(7),		//R
+	FLD_UART_CLEAR_TX	 	=  BIT(7),		//Write 1 clear TX
+};
+
+
+#define reg_uart_status2(i)       REG_ADDR8((0x14008e) +(0x40*(i)))
+enum{
+	FLD_UART_TX_DONE   	  =  BIT(0),//only for dma default 1.
+	FLD_UART_TX_BUF_IRQ   =  BIT(1),
+	FLD_UART_RX_DONE   	  =  BIT(2),
+	FLD_UART_RX_BUF_IRQ   =  BIT(3),
+};
+
+//state machine use for IC debug
+#define reg_uart_state(i)       REG_ADDR8(0x14008f+0x40*(i))
+enum{
+	FLD_UART_TSTATE_i   	=  BIT_RNG(0,2),//only for dma default 1.
+	FLD_UART_RSTATE_i   	=  BIT_RNG(4,7),
+};
+
+/*******************************      7816 registers: 0x1401f0     ******************************/
+#define reg_7816_clk_div		REG_ADDR8(0x1401f0)
+enum{
+	FLD_7816_CLK_DIV = 			BIT_RNG(4,7),
+};
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/usb_reg.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/usb_reg.h
new file mode 100644
index 00000000..5ce4c6c5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/reg_include/usb_reg.h
@@ -0,0 +1,202 @@
+/********************************************************************************************************
+ * @file	usb_reg.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef USB_REG_H
+#define USB_REG_H
+#include "soc.h"
+
+/*******************************      usb registers: 0x100800      ******************************/
+#define reg_ctrl_ep_ptr			REG_ADDR8(0x100800)
+#define reg_ctrl_ep_dat			REG_ADDR8(0x100801)
+#define reg_ctrl_ep_ctrl		REG_ADDR8(0x100802)
+enum{
+	FLD_EP_DAT_ACK  = 			BIT(0),
+	FLD_EP_DAT_STALL =			BIT(1),
+	FLD_EP_STA_ACK = 			BIT(2),
+	FLD_EP_STA_STALL = 			BIT(3),
+};
+
+#define reg_ctrl_ep_irq_sta		REG_ADDR8(0x100803)
+enum{
+	FLD_CTRL_EP_IRQ_TRANS  = 	BIT_RNG(0,3),
+	FLD_CTRL_EP_IRQ_SETUP  =	BIT(4),
+	FLD_CTRL_EP_IRQ_DATA  =		BIT(5),
+	FLD_CTRL_EP_IRQ_STA  = 		BIT(6),
+	FLD_CTRL_EP_IRQ_INTF  = 	BIT(7),
+};
+
+#define reg_ctrl_ep_irq_mode	REG_ADDR8(0x100804)
+enum{
+	FLD_CTRL_EP_AUTO_ADDR = 	BIT(0),
+	FLD_CTRL_EP_AUTO_CFG =		BIT(1),
+	FLD_CTRL_EP_AUTO_INTF =		BIT(2),
+	FLD_CTRL_EP_AUTO_STA =		BIT(3),
+	FLD_CTRL_EP_AUTO_SYN =		BIT(4),
+	FLD_CTRL_EP_AUTO_DESC =		BIT(5),
+	FLD_CTRL_EP_AUTO_FEAT =		BIT(6),
+	FLD_CTRL_EP_AUTO_STD =		BIT(7),
+};
+
+#define reg_usb_ctrl			REG_ADDR8(0x100805)
+enum{
+	FLD_USB_CTRL_AUTO_CLK = 	BIT(0),
+	FLD_USB_CTRL_LOW_SPD = 		BIT(1),
+	FLD_USB_CTRL_LOW_JITT =		BIT(2),
+	FLD_USB_CTRL_TST_MODE = 	BIT(3),
+};
+
+#define reg_usb_cycl_cali		REG_ADDR16(0x100806)
+#define reg_usb_cych_cali		REG_ADDR16(0x100807)
+#define reg_usb_mdev			REG_ADDR8(0x10080a)
+enum{
+	FLD_USB_MDEV_SELF_PWR = 	BIT(0),
+	FLD_USB_MDEV_SUSP_STA = 	BIT(1),
+	FLD_USB_MDEV_WAKE_FEA = 	BIT(2),
+	FLD_USB_MDEV_VEND_CMD = 	BIT(3),
+	FLD_USB_MDEV_VEND_DIS = 	BIT(4),
+};
+
+#define reg_usb_host_conn		REG_ADDR8(0x10080b)
+#define reg_usb_sups_cyc_cali	REG_ADDR8(0x10080c)
+#define reg_usb_intf_alt		REG_ADDR8(0x10080d)
+#define reg_usb_edp_en			REG_ADDR8(0x10080e)
+typedef enum{
+	FLD_USB_EDP8_EN 		= 	BIT(0),	// printer
+	FLD_USB_EDP1_EN 		= 	BIT(1),	// keyboard
+	FLD_USB_EDP2_EN 		= 	BIT(2),	// mouse
+	FLD_USB_EDP3_EN 		= 	BIT(3),
+	FLD_USB_EDP4_EN 		= 	BIT(4),
+	FLD_USB_EDP5_EN 		= 	BIT(5),	// printer
+	FLD_USB_EDP6_EN 		= 	BIT(6),	// audio
+	FLD_USB_EDP7_EN 		= 	BIT(7),	// audio
+}usb_ep_en_e;
+
+#define reg_usb_irq_mask		REG_ADDR8(0x10080f)
+enum{
+	FLD_USB_IRQ_RESET_MASK   = 	BIT(0),
+	FLD_USB_IRQ_250US_MASK 	 = 	BIT(1),
+	FLD_USB_IRQ_SUSPEND_MASK = 	BIT(2),
+	FLD_USB_IRQ_RESET_LVL	 = 	BIT(3),
+	FLD_USB_IRQ_250US_LVL	 = 	BIT(4),
+	FLD_USB_IRQ_RESET_O 	 = 	BIT(5),
+	FLD_USB_IRQ_250US_O		 = 	BIT(6),
+	FLD_USB_IRQ_SUSPEND_O	 = 	BIT(7),
+};
+
+#define reg_usb_ep8123_ptr		REG_ADDR32(0x100810)
+#define reg_usb_ep8_ptr			REG_ADDR8(0x100810)
+#define reg_usb_ep1_ptr			REG_ADDR8(0x100811)
+#define reg_usb_ep2_ptr			REG_ADDR8(0x100812)
+#define reg_usb_ep3_ptr			REG_ADDR8(0x100813)
+#define reg_usb_ep4567_ptr		REG_ADDR32(0x100814)
+#define reg_usb_ep4_ptr			REG_ADDR8(0x100814)
+#define reg_usb_ep5_ptr			REG_ADDR8(0x100815)
+#define reg_usb_ep6_ptr			REG_ADDR8(0x100816)
+#define reg_usb_ep7_ptr			REG_ADDR8(0x100817)
+#define reg_usb_ep_ptr(i)		REG_ADDR8(0x100810+((i) & 0x07))
+
+#define reg_usb_ep8123_dat		REG_ADDR32(0x100818)
+#define reg_usb_ep8_dat			REG_ADDR8(0x100818)
+#define reg_usb_ep1_dat			REG_ADDR8(0x100819)
+#define reg_usb_ep2_dat			REG_ADDR8(0x10081a)
+#define reg_usb_ep3_dat			REG_ADDR8(0x10081b)
+#define reg_usb_ep4567_dat		REG_ADDR32(0x10081c)
+#define reg_usb_ep4_dat			REG_ADDR8(0x10081c)
+#define reg_usb_ep5_dat			REG_ADDR8(0x10081d)
+#define reg_usb_ep6_dat			REG_ADDR8(0x10081e)
+#define reg_usb_ep7_dat			REG_ADDR8(0x10081f)
+#define reg_usb_ep_dat(i)		REG_ADDR8(0x100818+((i) & 0x07))
+
+#define reg_usb_ep8_ctrl		REG_ADDR8(0x100820)
+#define reg_usb_ep1_ctrl		REG_ADDR8(0x100821)
+#define reg_usb_ep2_ctrl		REG_ADDR8(0x100822)
+#define reg_usb_ep3_ctrl		REG_ADDR8(0x100823)
+#define reg_usb_ep4_ctrl		REG_ADDR8(0x100824)
+#define reg_usb_ep5_ctrl		REG_ADDR8(0x100825)
+#define reg_usb_ep6_ctrl		REG_ADDR8(0x100826)
+#define reg_usb_ep7_ctrl		REG_ADDR8(0x100827)
+#define reg_usb_ep_ctrl(i)		REG_ADDR8(0x100820+((i) & 0x07))
+
+enum{
+	FLD_USB_EP_BUSY = 			BIT(0),
+	FLD_USB_EP_STALL =			BIT(1),
+	FLD_USB_EP_DAT0 =			BIT(2),
+	FLD_USB_EP_DAT1 =			BIT(3),
+	FLD_USB_EP_MONO =			BIT(6),
+	FLD_USB_EP_EOF_ISO =		BIT(7),
+};
+
+#define reg_usb_ep8123_buf_addr	REG_ADDR32(0x100828)
+#define reg_usb_ep8_buf_addr	REG_ADDR8(0x100828)
+#define reg_usb_ep1_buf_addr	REG_ADDR8(0x100829)
+#define reg_usb_ep2_buf_addr	REG_ADDR8(0x10082a)
+#define reg_usb_ep3_buf_addr	REG_ADDR8(0x10082b)
+#define reg_usb_ep4567_buf_addr	REG_ADDR32(0x10082c)
+#define reg_usb_ep4_buf_addr	REG_ADDR8(0x10082c)
+#define reg_usb_ep5_buf_addr	REG_ADDR8(0x10082d)
+#define reg_usb_ep6_buf_addr	REG_ADDR8(0x10082e)
+#define reg_usb_ep7_buf_addr	REG_ADDR8(0x10082f)
+#define reg_usb_ep_buf_addr(i)	REG_ADDR8(0x100828+((i) & 0x07))
+
+
+#define reg_usb_ram_ctrl		REG_ADDR8(0x100830)
+
+enum{
+	FLD_USB_CEN_PWR_DN =		BIT(0),
+	FLD_USB_CLK_PWR_DN =		BIT(1),
+	FLD_USB_WEN_PWR_DN =		BIT(3),
+	FLD_USB_CEN_FUNC =			BIT(4),
+};
+
+#define reg_usb_iso_mode		REG_ADDR8(0x100838)
+
+#define reg_usb_ep_irq_status	REG_ADDR8(0x100839)
+#define reg_usb_ep_irq_mask		REG_ADDR8(0x10083a)
+typedef enum{
+	FLD_USB_EDP8_IRQ 		= 	BIT(0),
+	FLD_USB_EDP1_IRQ 		= 	BIT(1),
+	FLD_USB_EDP2_IRQ 		= 	BIT(2),
+	FLD_USB_EDP3_IRQ 		= 	BIT(3),
+	FLD_USB_EDP4_IRQ 		= 	BIT(4),
+	FLD_USB_EDP5_IRQ 		= 	BIT(5),
+	FLD_USB_EDP6_IRQ 		= 	BIT(6),
+	FLD_USB_EDP7_IRQ 		= 	BIT(7),
+}usb_ep_irq_e ;
+
+
+#define reg_usb_ep8_send_max	REG_ADDR8(0x10083b)
+#define reg_usb_ep8_send_thre	REG_ADDR8(0x10083c)
+#define reg_usb_ep8_fifo_mode	REG_ADDR8(0x10083d)
+enum{
+	FLD_USB_ENP8_FIFO_MODE =	BIT(0),
+	FLD_USB_ENP8_FULL_FLAG =	BIT(1),
+};
+
+#define reg_usb_ep_max_size		REG_ADDR8(0x10083e)
+#define reg_usb_ep_tick			REG_ADDR8(0x10083f)
+
+#define reg_usb_mic_dat0		REG_ADDR16(0x1800)
+#define reg_usb_mic_dat1		REG_ADDR16(0x1802)
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/s7816.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/s7816.h
new file mode 100644
index 00000000..1b263c64
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/s7816.h
@@ -0,0 +1,149 @@
+/********************************************************************************************************
+ * @file	s7816.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef S7816_H_
+#define S7816_H_
+
+#include "gpio.h"
+#include "uart.h"
+#include "stimer.h"
+
+#define s7816_en(uart_num)                uart_rtx_en(uart_num)
+#define s7816_set_rtx_pin(s7816_trx_pin)  uart_set_rtx_pin(s7816_trx_pin)
+
+/**
+ *  @brief  Define 7816 TRX pin.
+ */
+typedef enum{
+	S7816_UART0_RTX_A4=GPIO_PA4,
+	S7816_UART0_RTX_B3=GPIO_PB3,
+	S7816_UART0_RTX_D3=GPIO_PD3,
+
+	S7816_UART1_RTX_C7=GPIO_PC7,
+	S7816_UART1_RTX_D7=GPIO_PD7,
+	S7816_UART1_RTX_E2=GPIO_PE2,
+}s7816_rtx_pin_e;
+
+/**
+ *  @brief  Define 7816 clock.
+ */
+typedef enum{
+	S7816_4MHZ=4,
+	S7816_6MHZ=6,
+	S7816_12MHZ=12,
+}s7816_clock_e;
+
+/**
+ *  @brief  Define 7816 clk pin.
+ */
+typedef enum{
+	S7817_CLK_PA0=GPIO_PA0,
+}s7816_clk_pin_e;
+
+
+/**
+ * @brief      	This function is used to set the s7816 clock.
+ * @param[in]  	div	- set the divider of clock of 7816 module.
+ * @return     	none.
+ * @note        the clk-source of s7816 is 24M-pad,the clk of clk-pin can be divided as follow.
+ * 				div:        0x06-4Mhz     0x04-6Mhz   0x02-12Mhz
+ * 				baudrate:   0x06-10752    0x04-16194  0x02-32388
+ */
+extern void s7816_set_clk(unsigned char div);
+
+
+/**
+ * @brief      	This function is used to initialize the s7816 module.
+ * @param[in]  	uart_num     - UART0 or UART1.
+ * @param[in]  	clock        - the clock of s7816.
+ * @param[in]  	f            - the clock frequency conversion factor of s7816.
+ * @param[in]  	d            - the bitrate regulator of s7816.
+ * @return     	none.
+ */
+extern void s7816_init(uart_num_e uart_num,s7816_clock_e clock,int f,int d);
+
+/**
+ * @brief      	This function is used to active the IC card,set the trx pin and coldreset.
+ * @param[in]  	none.
+ * @return     	none.
+ * @note        extra time is needed for initial-atr after the function.
+ */
+extern void s7816_coldreset();
+
+/**
+ * @brief      	This function is used to set all the pin of s7816 module.
+ * @param[in]  	rst_pin     - the rst pin of s7816.
+ * @param[in]  	vcc_pin     - the vcc pin of s7816.
+ * @param[in]  	clk_pin     - the clk pin of s7816.
+ * @param[in]  	trx_pin     - the trx pin of s7816.
+ * @return     	none.
+ */
+extern void s7816_set_pin(gpio_pin_e rst_pin,gpio_pin_e vcc_pin,s7816_clk_pin_e clk_pin,s7816_rtx_pin_e trx_pin);
+
+/**
+ * @brief      	This function is used to release the trigger
+ * @param[in]  	none.
+ * @return     	none.
+ */
+extern void s7816_release_trig();
+
+/**
+ * @brief      	This function is used to set the RST pin of s7816.
+ * @param[in]  	pin_7816_rst - the RST pin of s7816.
+ * @return     	none.
+ */
+extern void s7816_set_rst_pin(gpio_pin_e pin_7816_rst);
+
+/**
+ * @brief      	This function is used to set the VCC pin of s7816.
+ * @param[in]   pin_7816_vcc - the VCC pin of s7816.
+ * @return     	none.
+ */
+extern void s7816_set_vcc_pin(gpio_pin_e pin_7816_vcc);
+
+/**
+ * @brief      	This function is used to warmreset.
+ * @param[in]  	none.
+ * @return     	none.
+ * @note        the warmreset is required after the IC-CARD active,extra time is needed for initial-atr after the function.
+ */
+extern void s7816_warmreset();
+
+/**
+ * @brief      	This function is used to set the rst-wait time of the s7816 module.
+ * @param[in]  	rst_time_us - set the s7816_rst_time.
+ * @return     	none.
+ */
+extern void s7816_set_time(int rst_time_us);
+
+/**
+ * @brief      	This function is used to warmreset.
+ * @param[in]  	uart_num - UART0 or UART1.
+ * @param[in]   tx_data  - the data need to send.
+ * return       none.
+ */
+extern void s7816_send_byte(uart_num_e uart_num, unsigned char tx_data);
+
+#endif /* S7816_H_ */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/spi.h
new file mode 100644
index 00000000..620c627b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/spi.h
@@ -0,0 +1,1341 @@
+/********************************************************************************************************
+ * @file	spi.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef SPI_H
+#define SPI_H
+
+#include <reg_include/register.h>
+#include "gpio.h"
+#include "dma.h"
+/**	@page SPI
+ *
+ *	Introduction
+ *	===============
+ *	B91 supports two spi
+ *
+ *	API Reference
+ *	===============
+ *	Header File: spi.h
+ */
+
+typedef enum{
+	SPI_RXFIFO_OR_INT_EN        =BIT(0),
+	SPI_TXFIFO_UR_INT_EN        =BIT(1),
+	SPI_RXFIFO_INT_EN 	        =BIT(2),
+	SPI_TXFIFO_INT_EN		    =BIT(3),
+	SPI_END_INT_EN              =BIT(4),
+	SPI_SLV_CMD_EN	            =BIT(5),
+}spi_irq_mask;
+
+typedef enum{
+	SPI_RXF_OR_INT	    =BIT(2),
+	SPI_TXF_UR_INT	    =BIT(3),
+	SPI_RXF_INT         =BIT(4),
+	SPI_TXF_INT 	    =BIT(5),
+	SPI_END_INT         =BIT(6),
+    SPI_SLV_CMD_INT	    =BIT(7),
+}spi_irq_status_e;
+
+typedef enum{
+	PSPI_MODULE = 0,
+    HSPI_MODULE = 1 ,
+}spi_sel_e;
+
+/**
+ * @brief  Define the work mode.
+ */
+typedef enum{
+    SPI_MODE0 = 0,
+/**
+ * change enum SPI_MODE1 value to 1 from 2,
+ * 		  enum SPI_MODE2 value to 2 from 1,
+ * changed by chaofan.20210113.
+ */
+    SPI_MODE1,
+    SPI_MODE2,
+    SPI_MODE3,
+} spi_mode_type_e;
+
+/**
+ * @brief  Define the mode for SPI io mode.
+ */
+typedef enum{
+	SPI_SINGLE_MODE	 = 0,
+    SPI_DUAL_MODE	 = 1 ,
+    HSPI_QUAD_MODE 	 = 2,
+	SPI_3_LINE_MODE	 = 3
+} spi_io_mode_e;
+
+typedef enum{
+	SPI_NOMAL = 0,
+    SPI_3LINE = 3,
+} spi_nomal_3line_mode_e;
+
+typedef enum{
+	PSPI_SINGLE = 0,
+    PSPI_DUAL 	= 1,
+	PSPI_3LINE	= 3
+} pspi_single_dual_mode_e;
+
+typedef enum{
+	HSPI_SINGLE = 0,
+    HSPI_DUAL	= 1,
+    HSPI_QUAD 	= 2,
+	HSPI_3LINE	= 3
+} hspi_single_dual_quad_mode_e;
+
+
+/**
+ * @brief  Define the SPI command & translate mode.
+ */
+typedef enum{
+	SPI_MODE_WRITE_AND_READ = 0,//write and read at the same.must enbale CmdEn
+	SPI_MODE_WRITE_ONLY,//write
+	SPI_MODE_READ_ONLY,// read must enbale CmdEn
+	SPI_MODE_WRITE_READ,//write_ read
+	SPI_MODE_READ_WRITE,//read_write
+	SPI_MODE_WRITE_DUMMY_READ,//write_dummy_read
+	SPI_MODE_READ_DUMMY_WRITE,//read_ dummy_write must enbale CmdEn
+	SPI_MODE_NONE_DATA,//must enbale CmdEn
+	SPI_MODE_DUMMY_WRITE,//dummy_write
+	SPI_MODE_DUMMY_READ,//dummy_read
+	SPI_MODE_RESERVED,
+}spi_tans_mode_e;
+
+typedef enum{
+	SPI_MODE_WR_WRITE_ONLY  = 1,//write
+	SPI_MODE_WR_DUMMY_WRITE = 8,//dummy_write
+}spi_wr_tans_mode_e;
+
+typedef enum{
+	SPI_MODE_RD_READ_ONLY  = 2,//must enbale CmdEn
+	SPI_MODE_RD_DUMMY_READ = 9,//dummy_read
+}spi_rd_tans_mode_e;
+
+typedef enum{
+	SPI_MODE_WR_RD 		 = 3,//must enbale CmdEn
+	SPI_MODE_WR_DUMMY_RD = 5,//write_dummy_read
+}spi_wr_rd_tans_mode_e;
+
+typedef struct{
+	hspi_single_dual_quad_mode_e  hspi_io_mode;//set spi interface mode
+	unsigned char hspi_dummy_cnt;//set dummy cnt if tans_mode have dummy .
+	unsigned char hspi_cmd_en;//enable cmd phase
+	unsigned char hspi_addr_en;//enable address phase
+	unsigned char hspi_addr_len;//enable address phase
+	unsigned char hspi_cmd_fmt_en;//if cmd_en enable cmd fmt will follow the interface (dual/quad)
+	unsigned char hspi_addr_fmt_en;//if addr_en enable addr fmt will follow the interface (dual/quad)
+}hspi_config_t;
+
+typedef struct{
+	pspi_single_dual_mode_e  pspi_io_mode;//set spi interface mode
+	unsigned char pspi_dummy_cnt;//set dummy cnt if tans_mode have dummy .
+    _Bool  pspi_cmd_en;//enable cmd phase
+}pspi_config_t;
+
+
+typedef enum{
+	SPI_SLAVE_WRITE_DATA_CMD = 0x00,
+	SPI_SLAVE_WRITE_DATA_DUAL_CMD = FLD_SPI_CMD_DATA_DUAL,
+	SPI_SLAVE_WRITE_ADDR_DUAL_CMD = FLD_SPI_CMD_ADDR_DUAL,
+
+	SPI_SLAVE_WRITE_DATA_DUAL_4CYC_CMD = FLD_SPI_CMD_DATA_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+	SPI_SLAVE_WRITE_ADDR_DUAL_4CYC_CMD = FLD_SPI_CMD_ADDR_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+	SPI_SLAVE_WRITE_DATA_AND_ADDR_DUL_4CYC_CMD = FLD_SPI_CMD_ADDR_DUAL | FLD_SPI_CMD_DATA_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+}spi_slave_write_cmd_e;
+
+typedef enum{
+	SPI_SLAVE_READ_DATA_CMD = FLD_SPI_CMD_RD_EN,
+	SPI_SLAVE_READ_DATA_DUAL_CMD = FLD_SPI_CMD_RD_EN | FLD_SPI_CMD_DATA_DUAL,
+	SPI_SLAVE_READ_ADDR_DUAL_CMD = FLD_SPI_CMD_RD_EN | FLD_SPI_CMD_ADDR_DUAL,
+
+	SPI_SLAVE_READ_DATA_DUAL_4CYC_CMD = FLD_SPI_CMD_RD_EN | FLD_SPI_CMD_DATA_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+	SPI_SLAVE_READ_ADDR_DUAL_4CYC_CMD = FLD_SPI_CMD_RD_EN | FLD_SPI_CMD_ADDR_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+
+	SPI_SLAVE_READ_DATA_AND_ADDR_DUL_4CYC_CMD = FLD_SPI_CMD_RD_EN | FLD_SPI_CMD_ADDR_DUAL | FLD_SPI_CMD_DATA_DUAL | FLD_SPI_CMD_RD_DUMMY_4CYCLE,
+
+}spi_slave_read_cmd_e;
+
+typedef enum{
+	SPI_READ_STATUS_SINGLE_CMD  = 0x05,
+	SPI_READ_STATUS_DUAL_CMD 	= 0x15,
+	HSPI_READ_STATUS_QUAD_CMD   = 0x25,
+	SPI_READ_DATA_SINGLE_CMD    = 0x0B,
+	SPI_READ_DATA_DUAL_CMD 		= 0x0C,
+	HSPI_READ_DATA_QUAD_CMD 	= 0x0E,
+	SPI_WRITE_DATA_SINGLE_CMD   = 0x51,
+	SPI_WRITE_DATA_DUAL_CMD 	= 0x52,
+	HSPI_WRITE_DATA_QUAD_CMD 	= 0x54,
+}pspi_hspi_cmd_e;
+/**
+ * @brief Define APS1604M-3SQR QSPI PSRAM CMD.
+ */
+typedef enum{
+	PSRAM_READ_CMD				  = 0x03,
+	PSRAM_FAST_READ_CMD			  = 0x0B,
+	PSRAM_FAST_READ_QUAD_CMD	  = 0xEB,
+
+	PSRAM_WRITE_CMD				  = 0x02,
+	PSRAM_QUAD_WRITE_CMD		  = 0x38,//
+	PSRAM_WRAPPED_READ_CMD		  = 0x8B,
+	PSRAM_WRAPPED_WRITE_CMD		  = 0x82,
+
+	PSRAM_MODE_RG_READ_CMD		  = 0xB5,
+	PSRAM_MODE_RG_WRITE_CMD		  = 0xB1,
+
+	PSRAM_ENTER_QUAD_MODE_CMD	  = 0x35,
+	PSRAM_EXIT_QUAD_MODE_CMD	  = 0xF5,
+
+	PSRAM_REST_ENABLE_CMD		  = 0x66,
+	PSRAM_REST_CMD	    		  = 0x99,
+	PSRAM_BURST_LENGTH_TOGGLE_CMD = 0xC0,
+	PSRAM_READ_ID_CMD  		  	  = 0x95,
+
+}spi_xip_cmd_e;
+
+/**
+ * @brief Define panel 2data_lane_mode
+ */
+typedef enum{
+	HSPI_2DATA_LANE_CLOSE	= 0x00,
+	HSPI_2DATA_LANE_RGB565  = 0x01,
+	HSPI_2DATA_LANE_RGB666  = 0x03,
+	HSPI_2DATA_LANE_RGB888  = 0x07,
+}hspi_panel_2data_lane_mode_e;
+
+/**
+ * @brief  Define the SPI io.
+ */
+typedef enum{
+	HSPI_CLK_PB4 = GPIO_PB4,
+	HSPI_CLK_PA2 = GPIO_PA2,
+}hspi_clk_pin_def_e;
+
+typedef enum{
+	HSPI_CSN_PB6 = GPIO_PB6,
+	HSPI_CSN_PA1 = GPIO_PA1,
+}hspi_csn_pin_def_e;
+
+typedef enum{
+	HSPI_MOSI_IO0_PB3 = GPIO_PB3,
+	HSPI_MOSI_IO0_PA4 = GPIO_PA4,
+}hspi_mosi_io0_pin_def_e;
+
+typedef enum{
+	HSPI_MISO_IO1_PB2 = GPIO_PB2,
+	HSPI_MISO_IO1_PA3 = GPIO_PA3,
+}hspi_miso_io1_pin_def_e;
+
+typedef enum{
+	HSPI_WP_IO2_PB1 = GPIO_PB1,
+}hspi_wp_io2_pin_def_e;
+
+typedef enum{
+	HSPI_HOLD_IO3_PB0 = GPIO_PB0,
+}hspi_hold_io3_pin_def_e;
+
+typedef enum{
+	HSPI_CLK_PB4_PIN = GPIO_PB4,
+	HSPI_CLK_PA2_PIN = GPIO_PA2,
+
+	HSPI_CSN_PB6_PIN = GPIO_PB6,
+	HSPI_CSN_PA1_PIN = GPIO_PA1,
+
+	HSPI_MOSI_IO0_PB3_PIN = GPIO_PB3,
+	HSPI_MOSI_IO0_PA4_PIN = GPIO_PA4,
+
+	HSPI_MISO_IO1_PB2_PIN = GPIO_PB2,
+	HSPI_MISO_IO1_PA3_PIN = GPIO_PA3,
+
+	HSPI_WP_IO2_PB1_PIN   = GPIO_PB1,
+	HSPI_HOLD_IO3_PB0_PIN = GPIO_PB0,
+	HSPI_NONE_PIN = 0xfff,
+}hspi_pin_def_e;
+
+typedef struct{
+	hspi_clk_pin_def_e      	      hspi_clk_pin;
+	hspi_csn_pin_def_e         		  hspi_csn_pin;
+	hspi_mosi_io0_pin_def_e           hspi_mosi_io0_pin;
+	hspi_miso_io1_pin_def_e           hspi_miso_io1_pin;
+	hspi_wp_io2_pin_def_e             hspi_wp_io2_pin;
+	hspi_hold_io3_pin_def_e           hspi_hold_io3_pin;
+}hspi_pin_config_t;
+
+
+typedef enum{
+	PSPI_CLK_PC5 = GPIO_PC5,
+	PSPI_CLK_PB5 = GPIO_PB5,
+	PSPI_CLK_PD1 = GPIO_PD1,
+}pspi_clk_pin_def_e;
+
+typedef enum{
+	PSPI_CSN_PC4 = GPIO_PC4,
+	PSPI_CSN_PC0 = GPIO_PC0,
+	PSPI_CSN_PD0 = GPIO_PD0,
+}pspi_csn_pin_def_e;
+
+typedef enum{
+	PSPI_MOSI_IO0_PC7 = GPIO_PC7,
+	PSPI_MOSI_IO0_PB7 = GPIO_PB7,
+	PSPI_MOSI_IO0_PD3 = GPIO_PD3,
+}pspi_mosi_io0_pin_def_e;
+
+typedef enum{
+	PSPI_MISO_IO1_PC6 = GPIO_PC6,
+	PSPI_MISO_IO1_PB6 = GPIO_PB6,
+	PSPI_MISO_IO1_PD2 = GPIO_PD2,
+}pspi_miso_io1_pin_def_e;
+
+typedef enum{
+	PSPI_CLK_PC5_PIN = GPIO_PC5,
+	PSPI_CLK_PB5_PIN = GPIO_PB5,
+	PSPI_CLK_PD1_PIN = GPIO_PD1,
+
+	PSPI_CSN_PC4_PIN = GPIO_PC4,
+	PSPI_CSN_PC0_PIN = GPIO_PC0,
+	PSPI_CSN_PD0_PIN = GPIO_PD0,
+
+	PSPI_MOSI_IO0_PC7_PIN = GPIO_PC7,
+	PSPI_MOSI_IO0_PB7_PIN = GPIO_PB7,
+	PSPI_MOSI_IO0_PD3_PIN = GPIO_PD3,
+
+	PSPI_MISO_IO1_PC6_PIN = GPIO_PC6,
+	PSPI_MISO_IO1_PB6_PIN = GPIO_PB6,
+	PSPI_MISO_IO1_PD2_PIN = GPIO_PD2,
+	PSPI_NONE_PIN = 0xfff,
+}pspi_pin_def_e;
+
+typedef struct{
+	pspi_clk_pin_def_e      pspi_clk_pin;
+	pspi_csn_pin_def_e      pspi_csn_pin;
+	pspi_mosi_io0_pin_def_e pspi_mosi_io0_pin;
+	pspi_miso_io1_pin_def_e pspi_miso_io1_pin;
+}pspi_pin_config_t;
+
+
+/**
+ * @brief    This function reset HSPI module.
+ * @return   none
+ */
+static inline void hspi_reset(void)
+{
+	reg_rst0 &= (~FLD_RST0_HSPI);
+	reg_rst0 |= FLD_RST0_HSPI;
+	reg_spi_status(HSPI_MODULE)|=FLD_HSPI_SOFT_RESET;
+}
+/**
+ * @brief  This function reset PSPI module.
+ * @return none
+ */
+static inline void pspi_reset(void)
+{
+	reg_rst1 &= (~FLD_RST1_PSPI);
+	reg_rst1 |= FLD_RST1_PSPI;
+	reg_spi_status(PSPI_MODULE)|=FLD_HSPI_SOFT_RESET;
+}
+
+/**
+ * @brief 		This function get tx_fifo number.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		ntx_fifo 	- number that wait to be sent.
+ */
+static inline  unsigned char spi_get_txfifo_num(spi_sel_e spi_sel)
+{
+   return (reg_spi_fifo_num(spi_sel) & FLD_SPI_TXF_NUM) >> 4;
+}
+
+/**
+ * @brief 		This function get rx_fifo number.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		rx_fifo 	- num that have been received.
+ */
+static inline unsigned char spi_get_rxfifo_num(spi_sel_e spi_sel)
+{
+   return reg_spi_fifo_num(spi_sel) & FLD_SPI_RXF_NUM;
+}
+
+/**
+ * @brief 		This function set SPI rx_cnt.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	cnt 		- rx amount of data.
+ * @return 		none
+ */
+static inline void spi_rx_cnt(spi_sel_e spi_sel, unsigned int cnt)
+{
+	reg_spi_rx_cnt2(spi_sel) = ((cnt - 1) >> 16) & 0xff;
+	reg_spi_rx_cnt1(spi_sel) = ((cnt - 1) >> 8) & 0xff;
+	reg_spi_rx_cnt0(spi_sel) = (cnt - 1) & 0xff;
+
+}
+
+/**
+ * @brief 		This function set SPI tx_cnt.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	cnt 		- tx amount of data.
+ * @return 		none
+ */
+static inline void spi_tx_cnt(spi_sel_e spi_sel, unsigned int cnt)
+{
+	reg_spi_tx_cnt2(spi_sel) = ((cnt - 1) >> 16) & 0xff;
+	reg_spi_tx_cnt1(spi_sel) = ((cnt - 1) >> 8) & 0xff;
+    reg_spi_tx_cnt0(spi_sel) = (cnt - 1) & 0xff;
+
+}
+
+/**
+ * @brief 		This function clear tx_fifo.
+ * @param[in] 	spi_sel - the spi module.
+ * @return 		none
+ */
+static inline void spi_tx_fifo_clr(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_TXF_CLR);
+}
+
+/**
+ * @brief 		This function clear rx_fifo.
+ * @param[in]	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_rx_fifo_clr(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_fifo_state(spi_sel), FLD_SPI_RXF_CLR);
+}
+
+/**
+ * @brief 		This function set hspi command content.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	cmd 		- command content.
+ * @return 		none
+ */
+static inline void spi_set_cmd(spi_sel_e spi_sel, unsigned char cmd)
+{
+	reg_spi_trans1(spi_sel) = cmd;
+}
+
+/**
+ * @brief 		This function servers to enable cmd which will sent a byte cmd.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_cmd_en(spi_sel_e spi_sel)
+{
+	BM_SET(	reg_spi_mode2(spi_sel), FLD_SPI_CMD_EN);
+}
+
+/**
+ * @brief 		This function servers to disable cmd which will not sent cmd.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_cmd_dis(spi_sel_e spi_sel)
+{
+
+	BM_CLR(reg_spi_mode2(spi_sel), FLD_SPI_CMD_EN);
+}
+
+/**
+ * @brief 	This function servers enable cmd  format,the format of cmd phase is the same as the data phase(Dual/Quad).
+ * @return 	none
+ */
+static inline void hspi_cmd_fmt_en()
+{
+	BM_SET(	reg_spi_mode2(HSPI_MODULE), FLD_HSPI_CMD_FMT);
+}
+
+/**
+ * @brief 	This function servers disable cmd  format.
+ * @return 	none
+ */
+static inline void hspi_cmd_fmt_dis()
+{
+	BM_CLR(reg_spi_mode2(HSPI_MODULE), FLD_HSPI_CMD_FMT);
+}
+
+/**
+ * @brief 	This function servers to enable hspi quad mode.
+ * @return 	none
+ */
+static inline void hspi_quad_mode_en()
+{
+	BM_SET(reg_spi_mode2(HSPI_MODULE), FLD_HSPI_QUAD);
+}
+
+/**
+ * @brief 		This function servers to disable hspi quad mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void hspi_quad_mode_dis(spi_sel_e spi_sel)
+{
+	BM_CLR(reg_spi_mode2(spi_sel), FLD_HSPI_QUAD);
+}
+
+/**
+ * @brief 		This function servers to enable hspi dual mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_dual_mode_en(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_DUAL);
+}
+
+/**
+ * @brief 		This function servers to disable hspi dual mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_dual_mode_dis(spi_sel_e spi_sel)
+{
+	BM_CLR(reg_spi_mode0(spi_sel), FLD_SPI_DUAL);
+}
+
+/**
+ * @brief 		This function servers to enable hspi 3line mode.
+ * @param[in] 	spi_sel - the spi module.
+ * @return 		none
+ */
+static inline void spi_3line_mode_en(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_mode0(spi_sel), FLD_SPI_3LINE);
+}
+
+/**
+ * @brief 		This function servers to disable hspi 3line mode..
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_3line_mode_dis(spi_sel_e spi_sel)
+{
+	BM_CLR(reg_spi_mode0(spi_sel), FLD_SPI_3LINE);
+}
+
+/**
+ * @brief 	This function to enable address format.the format of addr phase is the same as the data phase(Dual/Quad).
+ * @return 	none
+ */
+static inline void hspi_addr_fmt_en(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_ADDR_FMT);
+
+}
+
+/**
+ * @brief 	This function to disable address format.
+ * @return 	none
+ */
+static inline void hspi_addr_fmt_dis(void)
+{
+	BM_CLR(	reg_hspi_xip_ctrl, FLD_HSPI_ADDR_FMT);
+
+}
+
+/**
+ * @brief 		This function to determine whether the bus is busy.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return   	1:Indicates that the bus is busy. 0:Indicates that the bus is free.
+ */
+static inline _Bool spi_is_busy(spi_sel_e spi_sel)
+{
+	return  reg_spi_status(spi_sel) & FLD_HSPI_BUSY;
+
+}
+
+/**
+ * @brief 		This function enable tx dma.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_tx_dma_en(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_trans2(spi_sel), FLD_SPI_TX_DMA_EN);
+}
+
+/**
+ * @brief 		This function disable tx dma.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_tx_dma_dis(spi_sel_e spi_sel)
+{
+	BM_CLR(reg_spi_trans2(spi_sel), FLD_SPI_TX_DMA_EN);
+}
+
+/**
+ * @brief 		This function enable rx dma.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_rx_dma_en(spi_sel_e spi_sel)
+{
+	BM_SET(reg_spi_trans2(spi_sel), FLD_SPI_RX_DMA_EN);
+}
+
+/**
+ * @brief 		This function disable rx dma.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_rx_dma_dis(spi_sel_e spi_sel)
+{
+	BM_CLR(reg_spi_trans2(spi_sel), FLD_SPI_RX_DMA_EN);
+}
+
+/**
+ * @brief 		This function set xip write command content.
+ * @param[in] 	wr_cmd 		- write command content.
+ * @return 		none
+ */
+static inline void hspi_xip_set_wr_cmd(unsigned char wr_cmd)
+{
+	reg_hspi_xip_wr_cmd	= wr_cmd;
+}
+
+/**
+ * @brief 		This function set xip read command content.
+ * @param[in] 	rd_cmd		- read command content.
+ * @return 		none
+ */
+static inline void hspi_xip_set_rd_cmd(unsigned char rd_cmd)
+{
+
+	reg_hspi_xip_rd_cmd	= rd_cmd;
+}
+
+/**
+ * @brief 		This function set xip address offset.
+ * @param[in] 	addr_offset 	- the offset of data.
+ * @return 		none
+ */
+static inline void hspi_xip_addr_offset(unsigned int addr_offset)
+{
+    reg_hspi_xip_addr_offset0 = addr_offset & 0xff;
+	reg_hspi_xip_addr_offset1 = (addr_offset >> 8) & 0xff;
+	reg_hspi_xip_addr_offset2 = (addr_offset >> 16) & 0xff;
+	reg_hspi_xip_addr_offset3 = (addr_offset >> 24) & 0xff;
+}
+
+/**
+ * @brief 		This function servers to set xip read transfer mode.
+ * @param[in] 	rd_mode 	- read mode in enum hspi_tans_mode_e.
+ * @return  	none
+ */
+static inline void hspi_xip_read_transmode(unsigned char rd_mode)
+{
+	reg_hspi_xip_trans_mode = ((reg_hspi_xip_trans_mode & (~FLD_HSPI_XIP_RD_TRANS_MODE)) | ((rd_mode & 0xf) << 4));
+}
+
+/**
+ * @brief 		This function servers to set xip write transfer mode.
+ * @param[in] 	wr_mode 	- write mode in enum hspi_tans_mode_e.
+ * @return  	none
+ */
+static inline void hspi_xip_write_transmode(unsigned char wr_mode)
+{
+	reg_hspi_xip_trans_mode = ((reg_hspi_xip_trans_mode & (~FLD_HSPI_XIP_WR_TRANS_MODE)) | (wr_mode & FLD_HSPI_XIP_WR_TRANS_MODE));
+}
+
+/**
+ * @brief 	This function enable address phase.
+ * @return 	none
+ */
+static inline void hspi_addr_en(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_ADDR_EN);
+}
+
+/**
+ * @brief 	This function disable address phase.
+ * @return 	none
+ */
+static inline void hspi_addr_dis(void)
+{
+	BM_CLR(reg_hspi_xip_ctrl, FLD_HSPI_ADDR_EN);
+}
+
+/**
+ * @brief 		This function servers to set hspi address length.
+ * @param[in] 	len 	The number of bytes of address, range is 1~4.
+ * @return 		none
+ */
+static inline void hspi_set_addr_len(unsigned char len)
+{
+	reg_hspi_xip_ctrl |= ((len - 1) & 0x3) << 2;
+}
+
+/**
+ * @brief 	This function servers to enable xip sequential mode.
+ * @return 	none
+ */
+static inline void hspi_xip_seq_mode_en(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_XIP_MODE);
+}
+
+/**
+ * @brief 	This function servers to disable xip sequential mode.
+ * @return 	none
+ */
+static inline void hspi_xip_seq_mode_dis(void)
+{
+	BM_CLR(reg_hspi_xip_ctrl, FLD_HSPI_XIP_MODE);
+}
+
+/**
+ * @brief 	This function servers to enable xip.
+ * @return 	none
+ */
+static inline void hspi_xip_en(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_XIP_ENABLE);
+}
+
+/**
+ * @brief 	This function servers to disable xip.
+ * @return 	none
+ */
+static inline void hspi_xip_dis(void)
+{
+	BM_CLR(reg_hspi_xip_ctrl, FLD_HSPI_XIP_ENABLE);
+}
+
+/**
+ * @brief 	This function servers to stop xip.
+ * @return 	none
+ */
+static inline void hspi_xip_stop(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_XIP_STOP);
+}
+
+/**
+ * @brief 	This function servers to enable xip timeout that set hight level.
+ * @return 	none
+ */
+static inline void hspi_xip_timeout_mode_en(void)
+{
+	BM_SET(reg_hspi_xip_ctrl, FLD_HSPI_XIP_TIMEOUT_MODE);
+}
+
+/**
+ * @brief 	This function servers to disable xip timeout.
+ * @return 	none
+ */
+static inline void hspi_xip_timeout_mode_dis(void)
+{
+	BM_CLR(reg_hspi_xip_ctrl, FLD_HSPI_XIP_TIMEOUT_MODE);
+}
+
+/**
+ * @brief 		This function servers to set xip timeout cnt,when two data frame intervals exceed spi_clock_out_period*timeout_cnt,cs will set high level.
+ * @param[in] 	cnt 	- xip timeout cnt.
+ * @return 		none
+ */
+static inline void hspi_xip_timeout_cnt(unsigned char cnt)
+{
+	reg_hspi_xip_timeout_cnt = cnt & 0xff;
+}
+
+/**
+ * @brief 		This function servers to set page_size.
+ * @param[in] 	page_size_i 	- page boundary 2^page_size_i bytes.
+ * @return 		none
+ */
+static inline void hspi_xip_page_size(unsigned char page_size_i)
+{
+	reg_hspi_page_size = page_size_i;
+}
+
+/**
+ * @brief 		This function servers to reply master slave is ready .
+ * When slave_ready is set to 1, after the master sends a read status command to the slave,
+ * the slave will automatically return to 0x5a by the hardware.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_slave_ready_en(spi_sel_e spi_sel)
+{
+	  BM_SET(reg_spi_status(spi_sel), FLD_HSPI_SLAVE_READY);
+}
+
+/**
+ * @brief 		This function servers to reply master slave is not ready.
+ * When slave_ready is set to 0, after the master sends a read status command to the slave,
+ * the slave will automatically return to 0x00 by the hardware.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return 		none
+ */
+static inline void spi_slave_ready_dis(spi_sel_e spi_sel)
+{
+	  BM_CLR(reg_spi_status(spi_sel), FLD_HSPI_SLAVE_READY);
+}
+
+/**
+ * @brief 		This function servers to read cmd from master for slave.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return  	cmd transferd by master.
+ */
+static inline unsigned char spi_slave_get_cmd(spi_sel_e spi_sel)
+{
+	return reg_spi_trans1(spi_sel);
+}
+
+/**
+ * @brief      	The function of this API is to set the number of bytes to triggered the receive and transmit interrupt.
+ *            	Its default value is 4. recommend setting 4.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in]  	cnt 	- the interrupt trigger level.
+ * @return   	none
+ */
+static inline void spi_rx_tx_irq_trig_cnt(spi_sel_e spi_sel, unsigned char cnt)
+{
+	reg_spi_status(spi_sel) = ((reg_spi_status(spi_sel) & (~FLD_HSPI_FIFO_THRES)) | ((cnt & 7) << 4));
+}
+
+/**
+ * @brief 		This function servers to get irq status.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	status 	- the irq status.
+ * @return    - the value of status is be set.
+ */
+static inline unsigned char spi_get_irq_status(spi_sel_e spi_sel,spi_irq_status_e status )
+{
+	return reg_spi_irq_state(spi_sel)&status;
+}
+
+/**
+ * @brief 		This function servers to clear irq status.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	status 	- the irq status.
+ * @return  	none.
+ */
+static inline void spi_clr_irq_status(spi_sel_e spi_sel, spi_irq_status_e status)
+{
+	reg_spi_irq_state(spi_sel) = status;
+}
+
+/**
+ * @brief 		This function servers to set irq mask.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mask 	- the irq mask.
+ * @return  	cmd 	- transferd by master.
+ */
+static inline void spi_set_irq_mask(spi_sel_e spi_sel, spi_irq_mask mask)
+{
+   BM_SET(reg_spi_trans2(spi_sel), mask);
+}
+/**
+ * @brief 		This function servers to get irq mask.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mask 	- the irq mask.
+ * @return  	irq mask.
+ */
+static inline unsigned char spi_get_irq_mask(spi_sel_e spi_sel, spi_irq_mask mask)
+{
+	return reg_spi_trans2(spi_sel)&mask;
+}
+
+/**
+ * @brief 		This function servers to clear irq mask.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mask 	- the irq mask.
+ * @return  	cmd 	- transferd by master.
+ */
+static inline void spi_clr_irq_mask(spi_sel_e spi_sel, spi_irq_mask mask)
+{
+	BM_CLR(reg_spi_trans2(spi_sel), mask);
+}
+
+/**
+ * @brief 		This function enable 3line_dcx module which is use for panel(lcd oled..).
+ * @return 		none
+ */
+static inline void hspi_3line_dcx_en(void)
+{
+	BM_SET(reg_hspi_panel_ctrl, FLD_HSPI_PANEL_3LINE_DCX_EN);
+}
+
+/**
+ * @brief 		This function disable 3line_dcx module which is use for panel(lcd oled..).
+ * @return 		none
+ */
+static inline void hspi_3line_dcx_dis(void)
+{
+	BM_CLR(reg_hspi_panel_ctrl, FLD_HSPI_PANEL_3LINE_DCX_EN);
+}
+
+/**
+ * @brief 		This function set 3line_dcx translate data.
+ * @return 		none
+ */
+static inline void hspi_set_3line_dcx_data(void)
+{
+	BM_SET(reg_hspi_panel_ctrl, FLD_HSPI_PANEL_3LINE_DCX);
+}
+
+/**
+ * @brief 		This function set 3line_dcx translate command.
+ * @return 		none
+ */
+static inline void hspi_set_3line_dcx_cmd(void)
+{
+	BM_CLR(reg_hspi_panel_ctrl, FLD_HSPI_PANEL_3LINE_DCX);
+}
+
+/**
+ * @brief 		This function set 2data_lane mode for panel.
+ * @return 		none
+ */
+static inline void hspi_set_panel_2data_lane_mode(hspi_panel_2data_lane_mode_e mode)
+{
+	reg_hspi_panel_ctrl = ((reg_hspi_panel_ctrl & (~FLD_HSPI_PANEL_2DATA_LANE)) | ((mode & 0xf) << 2));
+}
+
+/**
+ * @brief   This function selects  pin  for hspi master or slave.
+ * @return  none
+ */
+void spi_slave_set_pin(void);
+/**
+ * @brief     	This function configures hspi pin.
+ * @param[in] 	config - the pointer of pin config struct.
+ * @return  	none
+ */
+void hspi_set_pin(hspi_pin_config_t *config);
+
+/**
+ * @brief     	This function configures pspi pin.
+ * @param[in] 	config - the pointer of pin config struct.
+ * @return 		none
+ */
+void pspi_set_pin(pspi_pin_config_t *config);
+
+/**
+ * @brief     	This function enable hspi csn pin.
+ * @param[in] 	pin - the csn pin.
+ * @return 		none
+ */
+void hspi_cs_pin_en(hspi_csn_pin_def_e pin);
+
+/**
+ * @brief     	This function disable hspi csn pin.
+ * @param[in] 	pin - the csn pin.
+ * @return 		none
+ */
+void hspi_cs_pin_dis(hspi_csn_pin_def_e pin);
+
+/**
+ * @brief     	This function change hspi csn pin.
+ * @param[in] 	current_csn_pin - the current csn pin.
+ * @param[in] 	next_csn_pin - the next csn pin.
+ * @return 		none.
+ */
+void hspi_change_csn_pin(hspi_csn_pin_def_e current_csn_pin, hspi_csn_pin_def_e next_csn_pin);
+/**
+ * @brief     	This function enable pspi csn pin.
+ * @param[in] 	pin - the csn pin.
+ * @return 		none
+ */
+void pspi_cs_pin_en(pspi_csn_pin_def_e pin);
+
+/**
+ * @brief     	This function disable pspi csn pin.
+ * @param[in] 	pin - the csn pin.
+ * @return 		none
+ */
+void pspi_cs_pin_dis(pspi_csn_pin_def_e pin);
+
+/**
+ * @brief     	This function change pspi csn pin.
+ * @param[in] 	current_csn_pin - the current csn pin.
+ * @param[in] 	next_csn_pin - the next csn pin.
+ * @return 		none.
+ */
+void pspi_change_csn_pin(pspi_csn_pin_def_e current_csn_pin, pspi_csn_pin_def_e next_csn_pin);
+/**
+ * @brief     	This function configures the clock and working mode for SPI interface.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	div_clock 	- the division factor for SPI module.
+ *           	spi_clock_out = ahb_clock / ((div_clock+1)*2)
+ * @param[in]	 mode 		- the selected working mode of SPI module.
+ *           	bit5:CPHA-Clock Polarity ; bit6:CPOL:CPHA-Clock Phase
+ *        	    MODE0:  CPOL = 0, CPHA =0;
+ *        	    MODE1:  CPOL = 0, CPHA =1;
+ *        	    MODE2:  CPOL = 1, CPHA =0;
+ *        	    MODE3:  CPOL = 1, CPHA =1;
+ * @return  	none
+ */
+void spi_master_init(spi_sel_e spi_sel, unsigned char div_clock, spi_mode_type_e mode);
+
+/**
+ * @brief     	This function configures the clock and working mode for SPI interface.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mode 	- the selected working mode of SPI module.
+ *          	bit5:CPHA-Clock Polarity ; bit6:CPOL:CPHA-Clock Phase
+ *          	  MODE0:  CPOL = 0, CPHA =0;
+ *          	  MODE1:  CPOL = 0, CPHA =1;
+ *          	  MODE2:  CPOL = 1, CPHA =0;
+ *          	  MODE3:  CPOL = 1, CPHA =1;
+ * @return  	none
+ * @note  		spi_clock_in  (spi_slave_clock frequency)/3
+ */
+void spi_slave_init(spi_sel_e spi_sel, spi_mode_type_e mode);
+
+/**
+ * @brief     	This function servers to set dummy cycle cnt.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	dummy_cnt 	- the cnt of dummy clock.
+ * @return  	none
+ */
+void spi_set_dummy_cnt(spi_sel_e spi_sel, unsigned char dummy_cnt);
+
+/**
+ * @brief     	This function servers to set slave address hspi only.
+ * @param[in] 	addr 	- address of slave.
+ * @return  	none
+ */
+void hspi_set_address(unsigned int addr);
+
+/**
+ * @brief     	This function servers to set spi transfer mode.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mode 	- transfer mode.
+ * @return  	none
+ */
+void spi_set_transmode(spi_sel_e spi_sel, spi_tans_mode_e mode);
+
+
+/**
+ * @brief     	This function servers to set normal mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return  	none
+ */
+void spi_set_normal_mode(spi_sel_e spi_sel);
+
+/**
+ * @brief     	This function servers to set dual mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return  	none
+ */
+void spi_set_dual_mode(spi_sel_e spi_sel);
+
+/**
+ * @brief	This function servers to set quad mode.
+ * @return	none
+ */
+void hspi_set_quad_mode();
+
+/**
+ * @brief     	This function servers to set 3line mode.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @return  	none
+ */
+void spi_set_3line_mode(spi_sel_e spi_sel);
+
+/**
+ * @brief     	This function servers to set hspi io  mode.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in]	mode 	- single/dual/quad /3line.
+ * @return  	none
+  */
+void spi_set_io_mode(spi_sel_e spi_sel, spi_io_mode_e mode);
+
+/**
+ * @brief     	This function servers to config normal mode.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	mode 	- nomal ,mode 3line.
+ * @return  	none
+ */
+void spi_master_config(spi_sel_e spi_sel, spi_nomal_3line_mode_e mode);
+
+/**
+ * @brief     	This function servers to config hspi special mode.
+ * @param[in] 	config 	- the pointer of pin special config struct.
+ * @return  	none
+ */
+void hspi_master_config_plus(hspi_config_t *config);
+
+/**
+ * @brief     	This function servers to config pspi special mode.
+ * @param[in] 	config 	- the pointer of pin special config struct.
+ * @return  	none
+ */
+void pspi_master_config_plus(pspi_config_t *config);
+
+/**
+ * @brief     	This function servers to write hspi fifo.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	data 	- the pointer to the data for write.
+ * @param[in] 	len 	- write length.
+ * @return    	none
+ */
+void spi_write(spi_sel_e spi_sel, unsigned char *data, unsigned int len);
+
+/**
+ * @brief     	This function servers to read hspi fifo.
+ * @param[in] 	spi_sel	- the spi module.
+ * @param[in] 	data 	- the pointer to the data for read.
+ * @param[in] 	len 	- write length.
+ * @return    	none
+ */
+void spi_read(spi_sel_e spi_sel, unsigned char *data, unsigned int len);
+
+/**
+ * @brief     	This function serves to normal write data in normal.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	data 	- the pointer to the data for write.
+ * @param[in] 	len 	- write length.
+ * @return  	none
+ */
+void spi_master_write(spi_sel_e spi_sel, unsigned char *data, unsigned int len);
+
+/**
+ * @brief     	This function serves to normal write and read data.
+ * This interface cannot be used for full duplex.
+ * rd_len shouldn't set to 0. Must write first, then read.
+ * @param[in] 	spi_sel - the spi module.
+ * @param[in] 	wr_data - the pointer to the data for write.
+ * @param[in] 	wr_len 	- write length.
+ * @param[in] 	rd_data - the pointer to the data for read.
+ * @param[in] 	rd_len 	- read length.
+ * @return  	none
+ */
+void spi_master_write_read(spi_sel_e spi_sel, unsigned char *wr_data, unsigned int wr_len, unsigned char *rd_data, unsigned int rd_len);
+
+/**
+ * @brief     	This function serves to single/dual/quad write to the SPI slave.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	cmd 		- cmd one byte will first write.
+ * @param[in] 	addr 		- the address of slave.
+ * @param[in] 	data 		-  pointer to the data need to write.
+ * @param[in] 	data_len 	- length in byte of the data need to write.
+ * @param[in] 	wr_mode 	- write mode.dummy or not dummy.
+ * @return  	none
+ */
+void spi_master_write_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned int addr, unsigned char *data, unsigned int data_len, spi_wr_tans_mode_e wr_mode);
+
+/**
+ * @brief     	This function serves to single/dual/quad  read from the SPI slave.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr 		- the address of slave.
+ * @param[in]  	data 		- pointer to the data need to read.
+ * @param[in]  	data_len 	- the length of data.
+ * @param[in]  	rd_mode 	- read mode.dummy or not dummy.
+ * @return   	none
+ */
+void spi_master_read_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned int addr, unsigned char *data, unsigned int data_len, spi_rd_tans_mode_e rd_mode);
+
+/**
+ * @brief      	This function serves to write address, then read data from the SPI slave.
+ * This interface cannot be used for full duplex.
+ * @param[in]  	spi_sel	 	- the spi module.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addrs 		- pointer to the address of slave.
+ * @param[in]  	addr_len 	- the length of address.
+ * @param[in]  	data 		- the pointer to the data for read.
+ * @param[in]  	data_len 	- read length.
+ * @param[in] 	wr_mode 	- write mode.dummy or not dummy.
+ * @return   	none
+ */
+void spi_master_write_read_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned char *addrs, unsigned int addr_len, unsigned char *data, unsigned int data_len, spi_rd_tans_mode_e wr_mode);
+
+/**
+ * @brief     	This function serves to set tx_dma channel and config dma tx default.
+ * @param[in] 	chn 	- dma channel.
+ * @return  	none
+ * @note        In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *              If you must do this, you must perform the following sequence:
+ *              1.hspi_reset() 2.spi_tx_fifo_clr(HSPI_MODULE)/spi_rx_fifo_clr(HSPI_MODULE) 3. dma_chn_dis(s_hspi_tx_dma_chn) 4.spi_master_write_dma(HSPI_MODULE)/spi_master_write_read_dma(HSPI_MODULE)/spi_master_write_dma_plus(HSPI_MODULE)/spi_master_write_read_dma_plus(HSPI_MODULE)/spi_set_tx_dma(HSPI_MODULE).
+ */
+void hspi_set_tx_dma_config(dma_chn_e chn);
+
+/**
+ * @brief     	This function serves to set rx_dma channel and config dma rx default.
+ * @param[in] 	chn 	- dma channel.
+ * @return  	none
+ * @note        In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *              If you must do this, you must perform the following sequence:
+ *              1.hspi_reset() 2.spi_rx_fifo_clr(HSPI_MODULE)/spi_tx_fifo_clr(HSPI_MODULE) 3. dma_chn_dis(s_hspi_rx_dma_chn) 4.spi_master_write_read_dma(HSPI_MODULE)/spi_master_read_dma_plus(HSPI_MODULE)/spi_master_write_read_dma_plus(HSPI_MODULE)//spi_set_rx_dma(HSPI_MODULE).
+ */
+void hspi_set_rx_dma_config(dma_chn_e chn);
+
+/**
+ * @brief     	This function serves to set tx_dam channel and config dma tx default.
+ * @param[in] 	chn 	- dma channel.
+ * @return  	none
+ * @note        In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *              If you must do this, you must perform the following sequence:
+ *              1.pspi_reset() 2.spi_tx_fifo_clr(PSPI_MODULE)/spi_rx_fifo_clr(PSPI_MODULE) 3. dma_chn_dis(s_pspi_tx_dma_chn) 4.spi_master_write_dma(PSPI_MODULE)/spi_master_write_read_dma(PSPI_MODULE)/spi_master_write_dma_plus(PSPI_MODULE)/spi_master_write_read_dma_plus(PSPI_MODULE)/spi_set_tx_dma(PSPI_MODULE).
+ */
+void pspi_set_tx_dma_config(dma_chn_e chn);
+
+/**
+ * @brief     	This function serves to set rx_dma channel and config dma rx default.
+ * @param[in] 	chn 	- dma channel.
+ * @return  	none
+ * @note        In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *              If you must do this, you must perform the following sequence:
+ *              1.pspi_reset() 2.spi_rx_fifo_clr(PSPI_MODULE)/spi_tx_fifo_clr(PSPI_MODULE) 3. dma_chn_dis(s_pspi_rx_dma_chn) 4.spi_master_write_read_dma(PSPI_MODULE)/spi_master_read_dma_plus(PSPI_MODULE)/spi_master_write_read_dma_plus(PSPI_MODULE)/spi_set_rx_dma(PSPI_MODULE).
+ */
+void pspi_set_rx_dma_config(dma_chn_e chn);
+
+
+
+
+
+/**
+ * @brief   	this  function set spi tx dma channel.
+ * @param[in]  	spi_sel     - the spi module.
+ * @param[in]  	src_addr 	- the address of source.
+ * @param[in]  	len 		- the length of data.
+ * */
+_attribute_ram_code_sec_  void spi_set_tx_dma(spi_sel_e spi_sel, unsigned char* src_addr,unsigned int len);
+
+
+/**
+ * @brief   	this  function set spi rx dma channel.
+ * @param[in]  	spi_sel     - the spi module.
+ * @param[in]  	dst_addr 	- the address of destination.
+ * @param[in]  	len 		- the length of data.
+ * */
+_attribute_ram_code_sec_ void spi_set_rx_dma(spi_sel_e spi_sel, unsigned char* dst_addr,unsigned int len);
+/**
+ * @brief     	This function serves to normal write data by dma.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	src_addr 	- the pointer to the data for write.
+ * @param[in] 	len 		- write length.
+ * @return  	none
+ */
+void spi_master_write_dma(spi_sel_e spi_sel, unsigned char *src_addr, unsigned int len);
+
+/**
+ * @brief     	This function serves to normal write cmd and address, then read data by dma.
+ * The interface does not support full-duplex communication.
+ * @param[in] 	spi_sel 	- the spi module.
+ * @param[in] 	addr 		- the pointer to the cmd and address for write.
+ * @param[in] 	addr_len 	- write length.
+ * @param[in] 	data 		- the pointer to the data for read.
+ * @param[in] 	data_len 	- read length.
+ * @return  	none
+ */
+void spi_master_write_read_dma(spi_sel_e spi_sel, unsigned char *addr, unsigned int addr_len, unsigned char *data, unsigned int data_len);
+
+/**
+ * @brief      	This function serves to single/dual/quad  write to the SPI slave by dma.
+ * @param[in]  	spi_sel 	- the spi module.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr 		- the address of slave.
+ * @param[in]  	data 		- pointer to the data need to write.
+ * @param[in]  	data_len 	- length in byte of the data need to write.
+ * @param[in]  	wr_mode 	- write mode.dummy or not dummy.
+ * @return   	none
+ */
+void spi_master_write_dma_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned int addr, unsigned char *data, unsigned int data_len, spi_wr_tans_mode_e wr_mode);
+
+/**
+ * @brief      	This function serves to single/dual/quad  read from the SPI slave by dma.
+ * @param[in]  	spi_sel 	- the spi module.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr 		- the address of slave.
+ * @param[in]  	dst_addr 	- pointer to the buffer that will cache the reading out data.
+ * @param[in]  	data_len 	- length in byte of the data need to read.
+ * @param[in]  	rd_mode 	- read mode.dummy or not dummy.
+ * @return   	none
+ */
+void spi_master_read_dma_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned int addr, unsigned char *dst_addr, unsigned int data_len, spi_rd_tans_mode_e rd_mode);
+
+/**
+ * @brief      	This function serves to single/dual/quad write address and read from the SPI slave by dma.
+ * This interface could be used for full duplex.
+ * When this interface is used for full-duplex communication, it can only be used on the master side.
+ * 1.the spi_master_config() interface must be called first to disable hardware cmd and hardware address
+ * 2.must cmd is 0,addr_len is equal to rd_len,rd_mode is SPI_MODE_WRITE_AND_READ.
+ * @param[in]  	spi_sel 	- the spi module.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr 		- the address of slave.
+ * @param[in]  	addr_len 	- the length of address.
+ * @param[in]  	rd_data 	- pointer to the buffer that will cache the reading out data.
+ * @param[in]  	rd_len	 	- length in byte of the data need to read.
+ * @param[in]  	rd_mode 	- read mode.dummy or not dummy.
+ * @return   	none
+ */
+void spi_master_write_read_dma_plus(spi_sel_e spi_sel, unsigned char cmd, unsigned char *addr, unsigned int addr_len, unsigned char *rd_data, unsigned int rd_len, spi_rd_tans_mode_e rd_mode);
+
+/**
+ * @brief      	This function serves to single/dual (quad) write to the SPI slave by xip.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr_offset - offset of xip base address.
+ * @param[in]  	data 		- pointer to the data need to write.
+ * @param[in]  	data_len 	- length in byte of the data need to write.
+ * @param[in]  	wr_mode 	- write mode  dummy or not dummy.
+ * @return   	none
+ */
+void hspi_master_write_xip(unsigned char cmd, unsigned int addr_offset, unsigned char *data, unsigned int data_len, spi_wr_tans_mode_e wr_mode);
+
+/**
+ * @brief      	This function serves to single/dual (quad) read from the SPI slave by xip.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr_offset - offset of xip base address.
+ * @param[in]  	data 		- pointer to the data need to read.
+ * @param[in]  	data_len 	- length in byte of the data need to read.
+ * @param[in]  	rd_mode 	- read mode.dummy or not dummy.
+ * @return   	none
+ */
+void hspi_master_read_xip(unsigned char cmd, unsigned int addr_offset, unsigned char *data, unsigned int data_len, spi_rd_tans_mode_e rd_mode);
+
+/**
+ * @brief      	This function serves to a cmd and one data write to the SPI slave by xip.
+ * @param[in]  	cmd 		- cmd one byte will first write.
+ * @param[in]  	addr_offset - offset of xip base address.
+ * @param[in]  	data_in 	- data need to write.
+ * @param[in]  	wr_mode 	- write mode  dummy or not dummy.
+ * @return   	none
+ */
+void hspi_master_write_xip_cmd_data(unsigned char cmd, unsigned int addr_offset, unsigned char data_in, spi_wr_tans_mode_e wr_mode);
+/**
+ * @brief      	This function serves to write and read data simultaneously.
+ * This interface can only be used by the master.
+ * When initializing the master, call the spi_master_config() interface to disable the hardware cmd and hardware address,
+ * and then start sending and receiving data.
+ * The default chunk size sent and received by this interface is 8byte.
+ * @param[in]  	spi_sel 	- the spi module.
+ * @param[in]  	write_data  - write data pointer.
+ * @param[in]  	read_data 	- read data pointer.
+ * @param[in]  	len 	    - write/read length.
+ * @return   	none
+ */
+void spi_master_write_read_full_duplex(spi_sel_e spi_sel,unsigned char *write_data, unsigned char *read_data, unsigned int len);
+/**
+ * @brief      	This function serves to read data in normal.
+ * @param[in]  	spi_sel 	- the spi module.
+ * @param[in]  	data     	- read data pointer.
+ * @param[in]  	len 	    - read length.
+ * @return   	none
+ */
+void spi_master_read(spi_sel_e spi_sel, unsigned char *data, unsigned int len);
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/stimer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/stimer.h
new file mode 100644
index 00000000..217decc9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/stimer.h
@@ -0,0 +1,196 @@
+/********************************************************************************************************
+ * @file	stimer.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page STIMER
+ *
+ *	Introduction
+ *	===============
+ *	TLSRB91 stimer use 16M clock count, have stimer irq.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: uart.h
+ */
+#ifndef STIMER_H_
+#define STIMER_H_
+#include "compiler.h"
+#include "reg_include/stimer_reg.h"
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+#ifndef SYS_TIMER_AUTO_MODE
+#define SYS_TIMER_AUTO_MODE     			1
+#endif
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+/**
+ * @brief define system clock tick per us/ms/s.
+ */
+enum{
+	SYSTEM_TIMER_TICK_1US 		= 16,
+	SYSTEM_TIMER_TICK_1MS 		= 16000,
+	SYSTEM_TIMER_TICK_1S 		= 16000000,
+
+	SYSTEM_TIMER_TICK_625US  	= 10000,  //625*16
+	SYSTEM_TIMER_TICK_1250US 	= 20000,  //1250*16
+};
+
+
+/**
+ * @brief This function servers to set stimer irq mask.
+ * @param[in]	mask - the irq mask.
+ * @return  	none.
+ */
+static inline void stimer_set_irq_mask(stimer_irq_e mask)
+{
+	reg_system_irq_mask |= mask;
+}
+
+/**
+ * @brief This function servers to clear stimer irq mask.
+ * @param[in] 	mask - the irq mask.
+ * @return  	none.
+ */
+static inline void stimer_clr_irq_mask(stimer_irq_e mask)
+{
+	reg_system_irq_mask &= (~mask);
+}
+
+/**
+ * @brief This function servers to clear stimer irq status.
+ * @param[in] 	status - the irq status.
+ * @return  	none.
+ */
+static inline void stimer_clr_irq_status(stimer_irq_e status)
+{
+	reg_system_cal_irq = (status);
+}
+
+/**
+ * @brief This function servers to get stimer irq status.
+ * @param[in] 	status - the irq status.
+ * @return      none.
+ */
+static inline unsigned char stimer_get_irq_status(stimer_irq_e status)
+{
+	return (reg_system_cal_irq & status);
+}
+
+/**
+ * @brief This function servers to set tick irq capture.
+ * @param[in] tick - the value of irq tick.
+ * @return    none.
+ */
+static inline void stimer_set_irq_capture(unsigned int tick)
+{
+	reg_system_irq_level = (tick);
+}
+
+/**
+ * @brief This function servers to set stimer tick.
+ * @param[in] tick - the value of tick.
+ * @return    none.
+ */
+static inline void stimer_set_tick(unsigned int tick)
+{
+	reg_system_tick = (tick);
+}
+
+/**
+ * @brief This function servers to enable stimer.
+ * @return  none.
+ */
+static inline void stimer_enable(void)
+{
+#if SYS_TIMER_AUTO_MODE
+	reg_system_ctrl |= FLD_SYSTEM_TIMER_AUTO;
+#else
+	reg_system_ctrl |= FLD_SYSTEM_TIMER_EN;
+#endif
+}
+
+
+/**
+ * @brief This function servers to disable stimer.
+ * @return  none.
+ */
+static inline void stimer_disable(void)
+{
+#if SYS_TIMER_AUTO_MODE
+	reg_system_ctrl &= ~(FLD_SYSTEM_TIMER_AUTO);
+#else
+	reg_system_ctrl &= ~(FLD_SYSTEM_TIMER_EN);
+#endif
+}
+
+/*
+ * @brief     This function performs to get system timer tick.
+ * @return    system timer tick value.
+**/
+static inline unsigned int stimer_get_tick(void)
+{
+
+	return reg_system_tick;
+}
+
+/**
+ * @brief     This function serves to set timeout by us.
+ * @param[in] ref  - reference tick of system timer .
+ * @param[in] us   - count by us.
+ * @return    true - timeout, false - not timeout
+ */
+static inline _Bool clock_time_exceed(unsigned int ref, unsigned int us)
+{
+	return ((unsigned int)(stimer_get_tick() - ref) > us * SYSTEM_TIMER_TICK_1US);
+}
+/**
+ * @brief     This function performs to set delay time by us.
+ * @param[in] microsec - need to delay.
+ * @return    none
+ */
+_attribute_ram_code_sec_noinline_   void delay_us(unsigned int microsec);
+
+
+/**
+ * @brief     This function performs to set delay time by ms.
+ * @param[in] millisec - need to delay.
+ * @return    none
+ */
+_attribute_ram_code_sec_noinline_  void  delay_ms(unsigned int millisec);
+
+
+#endif /* STIMER_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/timer.h
new file mode 100644
index 00000000..2067d8ab
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/timer.h
@@ -0,0 +1,225 @@
+/********************************************************************************************************
+ * @file	timer.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page TIMER
+ *
+ *	Introduction
+ *	===============
+ *	B91 supports two timers: Timer0~ Timer1. The two timers all support four modes:
+ *		- Mode 0 (System Clock Mode),
+ *		- Mode 1 (GPIO Trigger Mode),
+ *		- Mode 2 (GPIO Pulse Width Mode),
+ *		- Mode 3 (Tick Mode),
+ *
+ *	Timer 1 can also be configured as "watchdog" to monitor firmware running.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: timer.h
+ */
+#ifndef TIMER_H_
+#define TIMER_H_
+
+#include <reg_include/register.h>
+#include "analog.h"
+#include "gpio.h"
+
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**
+ * @brief   Type of Timer
+ */
+typedef enum{
+	TIMER0		=0,
+	TIMER1		=1,
+}timer_type_e;
+
+
+/**
+ * @brief   Mode of Timer
+ */
+typedef enum{
+	TIMER_MODE_SYSCLK		=0,
+	TIMER_MODE_GPIO_TRIGGER	=1,
+	TIMER_MODE_GPIO_WIDTH	=2,
+	TIMER_MODE_TICK			=3,
+}timer_mode_e;
+
+typedef enum{
+	TMR_STA_TMR0   =		BIT(0),
+    TMR_STA_TMR1   =		BIT(1),
+}time_irq_e;
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+
+/*
+ * @brief    This function refer to get timer irq status.
+ * @param[in] status - variable of enum to select the timer interrupt source.
+ * @return   the status of timer0/timer1.
+ */
+static inline unsigned char timer_get_irq_status(time_irq_e status)
+{
+    return  reg_tmr_sta&status ;
+}
+
+/*
+ * @brief     This function refer to clr timer0 irq status.
+ * @param[in] status - variable of enum to select the timerinterrupt source.
+ * @return    none
+ */
+static inline void timer_clr_irq_status(time_irq_e status)
+{
+		reg_tmr_sta= status;
+}
+
+
+/*
+ * @brief   This function refer to get timer0 tick.
+ * @return  none
+ */
+static inline  unsigned int timer0_get_gpio_width(void)
+{
+	 return reg_tmr0_tick;
+
+}
+
+
+/*
+ * @brief   This function refer to get timer1 tick.
+ * @return  none
+ */
+static inline unsigned int timer1_get_gpio_width(void)
+{
+	return reg_tmr1_tick;
+
+}
+
+
+/*
+ * @brief   This function refer to set timer0 tick .
+ * @param[in] tick - the tick of timer0
+ * @return  none
+ */
+static inline void timer0_set_tick(unsigned int tick)
+{
+	reg_tmr0_tick = tick;
+}
+
+/*
+ * @brief   This function refer to get timer0 tick.
+ * @return  none
+ */
+static inline unsigned int timer0_get_tick(void)
+{
+	return reg_tmr0_tick ;
+}
+
+
+/*
+ * @brief   This function refer to set timer1 tick.
+ * @param[in] tick - the tick of timer1
+ * @return  none
+ */
+static inline void timer1_set_tick(unsigned int tick)
+{
+	reg_tmr1_tick = tick;
+}
+
+/*
+ * @brief   This function refer to get timer1 tick.
+ * @return  none
+ */
+static inline unsigned int timer1_get_tick(void)
+{
+	return reg_tmr1_tick;
+}
+
+/*
+ * @brief     This function set to initial tick for timr0/timer1.
+ * @param[in] type - timer0/timer1.
+ * @param[in] init_tick - initial tick value.
+ * @return    none
+ */
+static inline void timer_set_init_tick(timer_type_e type, unsigned int init_tick)
+{
+	reg_tmr_tick(type) = init_tick;
+}
+/*
+ * @brief     This function set to capture tick for timr0/timer1.
+ * @param[in] type - timer0/timer1.
+ * @param[in] cap_tick - initial tick value.
+ * @return    none
+ */
+static inline void timer_set_cap_tick(timer_type_e type, unsigned int cap_tick)
+{
+	reg_tmr_capt(type) = cap_tick;
+}
+
+
+
+/**
+ * @brief     the specifed timer start working.
+ * @param[in] type - select the timer to start.
+ * @return    none
+ */
+void timer_start(timer_type_e type);
+
+/**
+ * @brief     set mode, initial tick and capture of timer.
+ * @param[in] type - select the timer to start.
+ * @param[in] mode - select mode for timer.
+ * @return    none
+ */
+void timer_set_mode(timer_type_e type, timer_mode_e mode);
+
+/**
+ * @brief     initiate GPIO for gpio trigger and gpio width mode of timer.
+ * @param[in] type - select the timer to start.
+ * @param[in] pin - select pin for timer.
+ * @param[in] pol - select polarity for gpio trigger and gpio width
+ * @return    none
+ */
+void timer_gpio_init(timer_type_e type, gpio_pin_e pin, gpio_pol_e pol );
+
+
+
+/**
+ * @brief     the specifed timer stop working.
+ * @param[in] type - select the timer to stop.
+ * @return    none
+ */
+void timer_stop(timer_type_e type);
+
+
+
+#endif /* TIMER_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/uart.h
new file mode 100644
index 00000000..5c399e35
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/uart.h
@@ -0,0 +1,661 @@
+/********************************************************************************************************
+ * @file	uart.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page UART
+ *
+ *	Introduction
+ *	===============
+ *	B91 supports two uart: uart0~ uart1.
+ *
+ *	API Reference
+ *	===============
+ *	Header File: uart.h
+ */
+#ifndef     UART_H_
+#define     UART_H_
+
+#include <reg_include/register.h>
+#include "gpio.h"
+#include "dma.h"
+#include "timer.h"
+
+extern unsigned char uart_rx_byte_index[2];
+extern unsigned char uart_tx_byte_index[2];
+
+#define uart_rtx_pin_tx_trig(uart_num)  uart_clr_tx_done(uart_num)
+
+
+/**********************************************************************************************************************
+ *                                         global constants                                                           *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                           global macro                                                             *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                         global data type                                                           *
+ *********************************************************************************************************************/
+/**
+ *  @brief  Define parity type
+ */
+typedef enum {
+	UART_PARITY_NONE = 0,
+	UART_PARITY_EVEN,
+	UART_PARITY_ODD,
+} uart_parity_e;
+
+/**
+ *  @brief  Define UART chn
+ */
+typedef enum {
+	UART0 = 0,
+	UART1,
+}uart_num_e;
+
+/**
+ *  @brief  Define mul bits
+ */
+typedef enum{
+	UART_BW_MUL1  = 0,
+	UART_BW_MUL2  = 1,
+	UART_BW_MUL3  = 2,
+	UART_BW_MUL4  = 3,
+} uart_timeout_mul_e;
+
+/**
+ *  @brief  Define the length of stop bit
+ */
+typedef enum {
+	UART_STOP_BIT_ONE          = 0,
+	UART_STOP_BIT_ONE_DOT_FIVE = BIT(4),
+	UART_STOP_BIT_TWO          = BIT(5),
+} uart_stop_bit_e;
+
+/**
+ *  @brief  Define UART RTS mode
+ */
+typedef enum {
+    UART_RTS_MODE_AUTO = 0,
+    UART_RTS_MODE_MANUAL,
+} uart_rts_mode_e;
+
+/**
+ *  @brief  Define UART CTS pin : UART0(PA1 PB6 PD0), UART1(PC4 PD4 PE1)
+ */
+typedef enum{
+	UART0_CTS_PA1 = GPIO_PA1,
+	UART0_CTS_PB6 = GPIO_PB6,
+	UART0_CTS_PD0 = GPIO_PD0,
+
+	UART1_CTS_PC4 = GPIO_PC4,
+	UART1_CTS_PD4 = GPIO_PD4,
+	UART1_CTS_PE1 = GPIO_PE1,
+}uart_cts_pin_e;
+
+/**
+ *  @brief  Define UART RTS pin : UART0(PA2 PB4 PD1), UART1(PC5 PD5 PE3)
+ */
+typedef enum{
+	UART0_RTS_PA2 = GPIO_PA2,
+	UART0_RTS_PB4 = GPIO_PB4,
+	UART0_RTS_PD1 = GPIO_PD1,
+
+	UART1_RTS_PC5 = GPIO_PC5,
+	UART1_RTS_PD5 = GPIO_PD5,
+	UART1_RTS_PE3 = GPIO_PE3,
+}uart_rts_pin_e;
+
+/**
+ *  @brief  Define UART TX pin : UART0(PA3 PB2 PD2), UART1(PC6 PD6 PE0)
+ */
+typedef enum{
+	UART0_TX_PA3 = GPIO_PA3,
+	UART0_TX_PB2 = GPIO_PB2,
+	UART0_TX_PD2 = GPIO_PD2,
+
+	UART1_TX_PC6 = GPIO_PC6,
+	UART1_TX_PD6 = GPIO_PD6,
+	UART1_TX_PE0 = GPIO_PE0,
+}uart_tx_pin_e;
+
+
+/**
+ *  @brief  Define UART RX pin : UART0(PA4 PB3 PD3), UART1(PC7 PD7 PE2)
+ */
+typedef enum{
+	UART0_RX_PA4 = GPIO_PA4,
+	UART0_RX_PB3 = GPIO_PB3,
+	UART0_RX_PD3 = GPIO_PD3,
+
+	UART1_RX_PC7 = GPIO_PC7,
+	UART1_RX_PD7 = GPIO_PD7,
+	UART1_RX_PE2 = GPIO_PE2,
+}uart_rx_pin_e;
+
+/**
+ *  @brief  Define UART IRQ MASK.The enumeration variable is just a index, and actually needs to be operated registers behind.
+ */
+typedef enum{
+	UART_RX_IRQ_MASK  = BIT(0),//reg_uart_ctrl0(uart_num)       BIT(6)
+	UART_TX_IRQ_MASK  = BIT(1),//reg_uart_ctrl0(uart_num)       BIT(7)
+	UART_RXDONE_MASK  = BIT(2),//reg_uart_rx_timeout1(uart_num) BIT(2)
+	UART_TXDONE_MASK  = BIT(3),//reg_uart_rx_timeout1(uart_num) BIT(6)
+	UART_ERR_IRQ_MASK = BIT(4),//reg_uart_rx_timeout1(uart_num) BIT(7)
+}uart_irq_mask_e;
+
+/**
+ *  @brief  Define UART IRQ BIT STATUS FOR GET
+ */
+typedef enum{
+	UART_RX_ERR				= BIT(7),
+	UART_TXDONE				= BIT(0),
+	UART_TXBUF_IRQ_STATUS 	= BIT(1),
+	UART_RXDONE				= BIT(2),
+	UART_RXBUF_IRQ_STATUS 	= BIT(3),
+}uart_irq_status_get_e;
+
+/**
+ *  @brief  Define UART IRQ BIT STATUS FOR CLR
+ */
+typedef enum{
+	UART_CLR_RX				= BIT(6),
+	UART_CLR_TX				= BIT(7),
+}uart_irq_status_clr_e;
+
+/**********************************************************************************************************************
+ *                                     global variable declaration                                                    *
+ *********************************************************************************************************************/
+
+/**********************************************************************************************************************
+ *                                      global function prototype                                                     *
+ *********************************************************************************************************************/
+/**
+ * @brief     This function serves to get the rxfifo cnt.
+ * @param[in] uart_num - UART0/UART1.
+ * @return    none
+ */
+static inline unsigned char uart_get_rxfifo_num(uart_num_e uart_num)
+{
+	return reg_uart_buf_cnt(uart_num)&FLD_UART_RX_BUF_CNT ;
+}
+
+/**
+ * @brief     This function serves to get the txfifo cnt.
+ * @param[in] uart_num - UART0/UART1.
+ * @return    none
+ */
+static inline unsigned char uart_get_txfifo_num(uart_num_e uart_num)
+{
+	return (reg_uart_buf_cnt(uart_num)&FLD_UART_TX_BUF_CNT )>>4;
+}
+
+/**
+ * @brief     This function resets the UART module.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_reset(uart_num_e uart_num)
+{
+	/*
+	  In B91, tx_done is 1 by default, after uart reset(write 0, then write 1) write 0,tx_done will be restored to its default value,
+	  if tx mask is turned on in advance, it will enter interrupt,in the interrupt, there is the action of clearing tx_done, but after the clear, immediately becomes 1,
+	  out of the interrupt, and immediately in the interrupt, and so on loop, resulting in the feeling that the program did not go down.
+	 */
+	unsigned char tx_mask_flag=0;
+	if(reg_uart_rx_timeout1(uart_num)|FLD_UART_MASK_TXDONE)
+	{
+		tx_mask_flag=1;
+		reg_uart_rx_timeout1(uart_num)&=~FLD_UART_MASK_TXDONE;
+	}
+	reg_rst0 &= (~((uart_num)?FLD_RST0_UART1:FLD_RST0_UART0));
+	reg_rst0 |= ((uart_num)?FLD_RST0_UART1:FLD_RST0_UART0);
+	if(tx_mask_flag==1){
+		reg_uart_rx_timeout1(uart_num)|=FLD_UART_MASK_TXDONE;
+	}
+}
+
+/**
+ * @brief     This function enable the clock of UART module.
+ * @param[in] uart_num - UART0/UART1.
+ * @return    none
+ */
+static inline void uart_clk_en(uart_num_e uart_num)
+{
+	reg_clk_en0 |= ((uart_num)?FLD_CLK0_UART1_EN:FLD_CLK0_UART0_EN);
+}
+
+/**
+ * @brief      This function initializes the UART module.
+ * @param[in]  uart_num    - UART0 or UART1.
+ * @param[in]  div         - uart clock divider.
+ * @param[in]  bwpc        - bitwidth, should be set to larger than 2.
+ * @param[in]  parity      - selected parity type for UART interface.
+ * @param[in]  stop_bit    - selected length of stop bit for UART interface.
+ * @return     none
+ * @note 	   sys_clk      baudrate   g_uart_div         g_bwpc
+ *
+ *  	       16Mhz        9600          118   			 13
+ *                          19200         118     			  6
+ *          	            115200          9       		 13
+ *
+ * 	           24Mhz        9600          249       		  9
+ *           	 	    	19200		  124                 9
+ *          	 	    	115200         12    			 15
+ *
+ *   	       32Mhz        9600          235       		 13
+ *          	 	        19200		  235                 6
+ *           	 	 	    115200         17    			 13
+ *
+ *   	       48Mhz        9600          499       		  9
+ *          	 	 	    19200		  249                 9
+ *           	 	 	    115200         25    			 15
+*/
+extern void uart_init(uart_num_e uart_num,unsigned short div, unsigned char bwpc, uart_parity_e parity, uart_stop_bit_e stop_bit);
+
+/***********************************************************
+ * @brief  		This function serves to calculate the best bwpc(bit width) .i.e reg0x96.
+ * @param[in]	baudrate - baut rate of UART.
+ * @param[in]	sysclk   - system clock.
+ * @param[out]	div      - uart clock divider.
+ * @param[out]	bwpc     - bitwidth, should be set to larger than 2.
+ * @return 		none
+ * @note        BaudRate*(div+1)*(bwpc+1) = system clock.
+ *  		    simplify the expression: div*bwpc =  constant(z).
+ * 		        bwpc range from 3 to 15.so loop and get the minimum one decimal point.
+ */
+void uart_cal_div_and_bwpc(unsigned int baudrate, unsigned int sysclk, unsigned short* div, unsigned char *bwpc);
+
+/**
+ * @brief  		This function serves to set r_rxtimeout. this setting is transfer one bytes need cycles base on uart_clk.
+ * 				For example, if transfer one bytes (1start bit+8bits data+1 priority bit+2stop bits) total 12 bits,
+ * 				this register setting should be (bpwc+1)*12.
+ * @param[in]	uart_num - UART0 or UART1.
+ * @param[in]	bwpc     - bitwidth, should be set to larger than 2.
+ * @param[in]	bit_cnt  - bit number.
+ * @param[in]	mul	     - mul.
+ * @return 		none
+ */
+void uart_set_rx_timeout(uart_num_e uart_num,unsigned char bwpc, unsigned char bit_cnt, uart_timeout_mul_e mul);
+
+/**
+ * @brief     This function serves to config the number level setting the irq bit of status register.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] rx_level - receive level value. ie 0x140089[0,3].
+ * @return    none
+ */
+static inline void uart_rx_irq_trig_level(uart_num_e uart_num,unsigned char rx_level)
+{
+	reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_RX_IRQ_TRIQ_LEV)) | (rx_level & 0x0f);
+}
+
+/**
+ * @brief     This function serves to config the number level setting the irq bit of status register.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] tx_level - transmit level value.ie 0x140089[4,7].
+ * @return    none
+ */
+static inline void uart_tx_irq_trig_level(uart_num_e uart_num,unsigned char tx_level)
+{
+	reg_uart_ctrl3(uart_num) = (reg_uart_ctrl3(uart_num) & (~FLD_UART_TX_IRQ_TRIQ_LEV)) | (tx_level << 4);
+}
+
+/**
+ * @brief     This function serves to send data by byte with not DMA method.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] tx_data  - the data to be send.
+ * @return    none
+ */
+void uart_send_byte(uart_num_e uart_num,unsigned char tx_data);
+
+/**
+ * @brief     This function serves to receive uart data by byte with not DMA method.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+unsigned char uart_read_byte(uart_num_e uart_num);
+/**
+ * @brief     This function serves to judge if the transmission of uart is done.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    return the tx status
+ * -          0:tx is done     1:tx isn't done
+ */
+unsigned char uart_tx_is_busy(uart_num_e uart_num);
+/**
+ * @brief     This function serves to send uart data by halfword with not DMA method.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] data  - the data to be send.
+ * @return    none
+ */
+void uart_send_hword(uart_num_e uart_num, unsigned short data);
+
+/**
+ * @brief     This function serves to send uart data by word with not DMA method.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] data - the data to be send.
+ * @return    none
+ */
+void uart_send_word(uart_num_e uart_num, unsigned int data);
+
+
+/**
+ * @brief     This function sets the RTS pin's level manually.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] polarity - set the output of RTS pin(only for manual mode).
+ * @return    none
+ */
+void uart_set_rts_level(uart_num_e uart_num, unsigned char polarity);
+
+/**
+ *	@brief		This function serves to set pin for UART cts function .
+ *	@param[in]  cts_pin -To set cts pin.
+ *	@return		none
+ */
+void uart_set_cts_pin(uart_cts_pin_e cts_pin);
+
+/**
+ *	@brief		This function serves to set pin for UART rts function .
+ *	@param[in]  rts_pin - To set rts pin.
+ *	@return		none
+ */
+void uart_set_rts_pin(uart_rts_pin_e rts_pin);
+
+/**
+* @brief      This function serves to select pin for UART module.
+* @param[in]  tx_pin   - the pin to send data.
+* @param[in]  rx_pin   - the pin to receive data.
+* @return     none
+*/
+void uart_set_pin(uart_tx_pin_e tx_pin,uart_rx_pin_e rx_pin);
+
+/**
+* @brief      This function serves to set rx pin for UART module,
+*             this pin can be used as either tx or rx. this pin is only used as tx when there is a sending action, but it is used as an rx at all times.
+* @param[in]  rx_pin  - the rx pin need to set.
+* @return     none
+*/
+void uart_set_rtx_pin(uart_rx_pin_e rx_pin);
+
+
+/**
+ * @brief     	This function serves to send data by DMA, this function tell the DMA to get data from the RAM and start.
+ * @param[in]  	uart_num - UART0 or UART1.
+ * @param[in] 	addr     - pointer to the buffer containing data need to send.
+ * @param[in] 	len      - DMA transmission length.The maximum transmission length of DMA is 0xFFFFFC bytes, so dont'n over this length.
+ * @return      1  dma start send.
+ *              0  the length is error.
+ */
+unsigned char uart_send_dma(uart_num_e uart_num, unsigned char * addr, unsigned int len );
+
+/**
+* @brief     This function serves to send data with not DMA method.
+* @param[in] uart_num - UART0 or UART1.
+* @param[in] addr     - pointer to the buffer containing data need to send.
+* @param[in] len      - NDMA transmission length.
+* @return    1
+*/
+unsigned char uart_send(uart_num_e uart_num, unsigned char * addr, unsigned char len );
+
+/**
+ * @brief     	This function serves to receive data function by DMA, this  function tell the DMA to get data from the uart data fifo.
+ * @param[in]  	uart_num - UART0 or UART1.
+ * @param[in] 	addr     - pointer to the buffer  receive data.
+ * @param[in]   rev_size - the receive length of DMA,The maximum transmission length of DMA is 0xFFFFFC bytes, so dont'n over this length.
+ * @note        1. rev_size must be larger than the data you received actually.
+ *              2. the data length can be arbitrary if less than rev_size.
+ * @return    	none
+ */
+extern void uart_receive_dma(uart_num_e uart_num, unsigned char * addr,unsigned int rev_size);
+
+/**
+ * @brief     This function serves to get the length of the data that dma received.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] chn      - dma channel.
+ * @return    data length.
+ */
+extern unsigned int uart_get_dma_rev_data_len(uart_num_e uart_num,dma_chn_e chn);
+
+/**
+  * @brief     This function serves to set uart tx_dma channel and config dma tx default.
+  * @param[in] uart_num - UART0 or UART1.
+  * @param[in] chn      - dma channel.
+  * @return    none
+  * @note      In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+  *            If you must do this, you must perform the following sequence:
+  *            1. dma_chn_dis(uart_dma_tx_chn[uart_num]) 2.uart_reset() 3.uart_send_dma()
+  */
+extern void uart_set_tx_dma_config(uart_num_e uart_num, dma_chn_e chn);
+
+/**
+ * @brief     This function serves to set uart rx_dma channel and config dma rx default.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] chn      - dma channel.
+ * @return    none
+ * @note      In the case that the DMA transfer is not completed(bit 0 of reg_dma_ctr0(chn): 1-the transmission has not been completed,0-the transmission is completed), re-calling the DMA-related functions may cause problems.
+ *            If you must do this, you must perform the following sequence:
+ *            1. dma_chn_dis(uart_dma_rx_chn[uart_num]) 2.uart_reset() 3.uart_receive_dma()
+ */
+extern void uart_set_rx_dma_config(uart_num_e uart_num, dma_chn_e chn);
+
+/**
+ * @brief     This function serves to config the irq of uart tx and rx.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] mask     - uart irq mask.
+ * @return    none
+ */
+static inline void uart_set_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)
+{
+	if((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK))
+	{
+		reg_uart_ctrl0(uart_num) |= (((mask & UART_RX_IRQ_MASK)? 1:0) << 6) | (((mask & UART_TX_IRQ_MASK)? 1:0 )<< 7);
+	}
+
+	if((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK))
+	{
+		reg_uart_rx_timeout1(uart_num) |= (((mask & UART_RXDONE_MASK)? 1:0) << 2) | (((mask & UART_TXDONE_MASK) ? 1:0 )<< 6) | (((mask & UART_ERR_IRQ_MASK) ? 1:0 )<< 7);
+	}
+}
+
+/**
+ * @brief     This function serves to clear the irq of uart tx and rx.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] mask     - uart irq mask.
+ * @return    none
+ */
+static inline void uart_clr_irq_mask(uart_num_e uart_num,uart_irq_mask_e mask)
+{
+	if((mask & UART_RX_IRQ_MASK) || (mask & UART_TX_IRQ_MASK))
+	{
+		reg_uart_ctrl0(uart_num) &= ~((((mask & UART_RX_IRQ_MASK)? 1:0)<< 6) | (((mask & UART_TX_IRQ_MASK)? 1:0) << 7));
+	}
+	if((mask & UART_RXDONE_MASK) || (mask & UART_TXDONE_MASK) || (mask & UART_ERR_IRQ_MASK)){
+		reg_uart_rx_timeout1(uart_num) &= ~((((mask & UART_RXDONE_MASK)? 1:0) << 2) | (((mask & UART_TXDONE_MASK)? 1:0)<< 6) | (((mask & UART_ERR_IRQ_MASK)? 1:0) << 7));
+	}
+}
+
+
+/**
+ * @brief     This function serves to get the irq status of uart tx and rx.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] status   - uart irq status.
+ * @return    irq status
+ */
+static inline unsigned int  uart_get_irq_status(uart_num_e uart_num,uart_irq_status_get_e status)
+{
+	if(status == UART_RX_ERR){
+		return (reg_uart_status1(uart_num) & (status));
+	}
+	else
+	{
+		return (reg_uart_status2(uart_num) & (status));
+	}
+}
+
+
+/**
+ * @brief     This function serves to clear the irq status of uart tx and rx.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] status - uart irq status.
+ * @return    none
+ */
+static inline void uart_clr_irq_status(uart_num_e uart_num,uart_irq_status_clr_e status)
+{
+	reg_uart_status1(uart_num) |= (status);
+}
+
+/**
+ * @brief     This function serves to set uart rts enable.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_set_rts_en(uart_num_e uart_num)
+{
+	reg_uart_ctrl2(uart_num) |= FLD_UART_RTS_EN; //enable RTS function
+}
+
+/**
+ * @brief     This function serves to set uart rts disable.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_set_rts_dis(uart_num_e uart_num)
+{
+	reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_EN); //disable RTS function
+}
+
+/**
+ * @brief     This function serves to set uart cts enable.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_set_cts_en(uart_num_e uart_num)
+{
+	reg_uart_ctrl1(uart_num) |= FLD_UART_TX_CTS_ENABLE; //enable CTS function
+}
+
+/**
+ * @brief     This function serves to set uart cts disable.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_set_cts_dis(uart_num_e uart_num)
+{
+	reg_uart_ctrl1(uart_num) &= (~FLD_UART_TX_CTS_ENABLE); //disable CTS function
+}
+
+/**
+  * @brief     This function serves to configure UART hardware flow. Configure CTS.
+  * @param[in] uart_num   - UART0 or UART1.
+  * @param[in] cts_pin    - RTS pin select.
+  * @param[in] cts_parity - when CTS's input equals to select, tx will be stopped.
+  * @return    none
+  */
+extern void uart_cts_config(uart_num_e uart_num,uart_cts_pin_e cts_pin,unsigned char cts_parity);
+
+/**
+ * @brief     This function serves to configure UART hardware flow. Configure RTS.
+ * @param[in] uart_num     - UART0 or UART1.
+ * @param[in] rts_pin      - RTS pin select.
+ * @param[in] rts_parity   - whether invert the output of RTS pin(only for auto mode).
+ * @param[in] auto_mode_en - set the mode of RTS(auto or manual).
+ * @return    none
+ */
+extern void uart_rts_config(uart_num_e uart_num,uart_rts_pin_e rts_pin,unsigned char rts_parity,unsigned char auto_mode_en);
+
+/**
+ * @brief     This function serves to set uart rts trig lexel in auto mode.
+ * @param[in] uart_num - UART0 or UART1.
+ * @param[in] level    - threshold of trig RTS pin's level toggle(only for auto mode).
+ * @return    none
+ */
+static inline void uart_rts_trig_level_auto_mode(uart_num_e uart_num,unsigned char level)
+{
+    reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_TRIQ_LEV);
+    reg_uart_ctrl2(uart_num) |= (level & FLD_UART_RTS_TRIQ_LEV);
+}
+
+/**
+ * @brief     This function serves to set uart rts auto mode.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_rts_auto_mode(uart_num_e uart_num)
+{
+	reg_uart_ctrl2(uart_num) &= (~FLD_UART_RTS_MANUAL_M);
+}
+
+/**
+ * @brief     This function serves to set uart rts manual mode.
+ * @param[in] uart_num - UART0 or UART1.
+ * @return    none
+ */
+static inline void uart_rts_manual_mode(uart_num_e uart_num)
+{
+	reg_uart_ctrl2(uart_num) |= (FLD_UART_RTS_MANUAL_M);
+}
+
+
+/**
+ * @brief     This function is used to set the 'uart_rx_byte_index' to 0.
+ *			  after wakeup from power-saving mode or reset uart, you must call this function before receiving the data.
+ * @param[in] uart_num
+ * @return    none.
+ */
+static inline void uart_clr_rx_index(uart_num_e uart_num)
+{
+	uart_rx_byte_index[uart_num]=0;
+}
+
+/**
+ * @brief     This function is used to set the 'uart_tx_byte_index' to 0.
+ *			  after wakeup from power-saving mode or reset uart, you must call this function before sending the data.
+ * @param[in] uart_num
+ * @return    none.
+ */
+static inline void uart_clr_tx_index(uart_num_e uart_num)
+{
+	uart_tx_byte_index[uart_num]=0;
+}
+
+/**
+ * @brief     This function is used to clr uart tx-done,which means set tx-done to 0
+ * @param[in] uart_num
+ * @return    none.
+ */
+static inline void uart_clr_tx_done(uart_num_e uart_num)
+{
+	reg_uart_state(uart_num) |=BIT(7);
+}
+
+/**
+ * @brief      	This function is used to enable the rtx function of .
+ * @param[in]  	chn - UART0 or UART1.
+ * @return     	none.
+ */
+static inline void uart_rtx_en(uart_num_e chn)
+{
+	reg_uart_rx_timeout1(chn)|=FLD_UART_P7816_EN;
+}
+
+#endif	/* UART_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/usbhw.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/usbhw.h
new file mode 100644
index 00000000..13e1118c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/usbhw.h
@@ -0,0 +1,426 @@
+/********************************************************************************************************
+ * @file	usbhw.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/**	@page USBHW
+ *
+ *	Introduction
+ *	===============
+ *	USB hard ware .
+ *
+ *	API Reference
+ *	===============
+ *	Header File: usbhw.h
+ */
+
+#pragma once
+
+#include <reg_include/register.h>
+#include "analog.h"
+#include "gpio.h"
+
+typedef enum
+{
+	USB_IRQ_RESET_MASK   =BIT(0),
+	USB_IRQ_250US_MASK   =BIT(1),
+	USB_IRQ_SUSPEND_MASK =BIT(2),
+}usb_irq_mask_e;
+
+typedef enum
+{
+	USB_IRQ_RESET_STATUS   =BIT(5),
+	USB_IRQ_250US_STATUS   =BIT(6),
+	USB_IRQ_SUSPEND_STATUS =BIT(7),
+}usb_irq_status_e;
+
+
+
+/**
+ * @brief     This function servers to set ed8 to fifo mode.
+ * @return    none.
+ */
+static inline void usbhw_set_ep8_fifo_mode(void) {
+	BM_SET(reg_usb_ep8_fifo_mode,FLD_USB_ENP8_FIFO_MODE);
+}
+
+/**
+ * @brief     This function servers to reset the pointer of control Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_reset_ctrl_ep_ptr(void) {
+	reg_ctrl_ep_ptr = 0;
+}
+
+/**
+ * @brief     This function servers to get the irq status of control Endpoint.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_ctrl_ep_irq(void) {
+	return reg_ctrl_ep_irq_sta;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of control Endpoint.
+ * @param[in] ep - selected  the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_ctrl_ep_irq(int ep) {
+#ifdef WIN32
+	BM_CLR(reg_ctrl_ep_irq_sta, ep);
+#else
+	reg_ctrl_ep_irq_sta = ep;
+#endif
+}
+
+/**
+ * @brief     This function servers to set the value of control Endpoint.
+ * @param[in] data - the value of control Endpoint
+ * @return    none.
+ */
+static inline void usbhw_write_ctrl_ep_ctrl(unsigned char data) {
+	reg_ctrl_ep_ctrl = data;
+}
+
+/**
+ * @brief     This function servers to read the data of control Endpoint.
+ * @return    the value of control Endpoint data
+ */
+static inline unsigned char usbhw_read_ctrl_ep_data(void) {
+	return reg_ctrl_ep_dat;
+}
+
+/**
+ * @brief     This function servers to write the data of control Endpoint.
+ * @param[in] data -  the data of control Endpoint to write
+ * @return    none
+ */
+static inline void usbhw_write_ctrl_ep_data(unsigned char data) {
+	reg_ctrl_ep_dat = data;
+}
+
+/**
+ * @brief     This function servers to determine whether control Endpoint is busy.
+ * @return    1: busy; 0: not busy.
+ */
+static inline int usbhw_is_ctrl_ep_busy(void) {
+	return reg_ctrl_ep_irq_sta & FLD_USB_EP_BUSY;
+}
+
+
+/**
+ * @brief     This function servers to reset the pointer of Endpoint.
+ * @param[in] ep - select the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_reset_ep_ptr(unsigned int ep) {
+	reg_usb_ep_ptr(ep) = 0;
+}
+
+/**
+ * @brief     This function servers to set the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_set_eps_irq_mask(usb_ep_irq_e mask)
+{
+	reg_usb_ep_irq_mask|=mask;
+
+}
+
+/**
+ * @brief     This function servers to clr the irq mask of Endpoint.
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq_mask(usb_ep_irq_e mask)
+{
+	reg_usb_ep_irq_mask &=(~mask);
+
+}
+
+/**
+ * @brief     This function servers to get the irq status of Endpoint.
+ * @return    none.
+ */
+static inline unsigned int usbhw_get_eps_irq(void) {
+	return reg_usb_ep_irq_status;
+}
+
+/**
+ * @brief     This function servers to clear the irq status of Endpoint.
+ * @param[in] ep - selected  the Endpoint
+ * @return    none.
+ */
+static inline void usbhw_clr_eps_irq(int ep) {
+	reg_usb_ep_irq_status = ep;
+}
+
+/**
+ * @brief     This function servers to set usb irq mask.
+ * @param[in]  mask -the  irq mask of usb.
+ * @return    none.
+ */
+static inline void usbhw_set_irq_mask( usb_irq_mask_e mask)
+{
+	reg_usb_irq_mask|=mask;
+}
+
+/**
+ * @brief     This function servers to clr usb irq mask.
+ * @param[in]  mask -the  irq mask of usb.
+ * @return    none.
+ */
+static inline void usbhw_clr_irq_mask( usb_irq_mask_e mask)
+{
+	reg_usb_irq_mask &= (~mask);
+}
+
+/**
+ * @brief     This function servers to get usb irq status.
+ * @param[in]  status -the  irq status of usb.
+ * @return    the status of irq.
+ */
+static inline unsigned char  usbhw_get_irq_status(usb_irq_status_e status)
+{
+	return reg_usb_irq_mask&status;
+}
+
+/**
+ * @brief     This function servers to clr usb irq status.
+ * @param[in]  status -the  irq status of usb.
+ * @return    none.
+ */
+static inline void usbhw_clr_irq_status(usb_irq_status_e status)
+{
+	reg_usb_irq_mask|=status;
+}
+
+
+/**
+ * @brief     This function servers to enable Endpoint.
+ * @param[in] ep - selected  the Endpoint
+ * @return    none.
+ */
+static inline void  usbhw_set_eps_en(usb_ep_en_e ep)
+{
+	reg_usb_edp_en= ep;
+}
+
+/**
+ * @brief     This function servers to enable Endpoint.
+ * @param[in] ep - selected  the Endpoint
+ * @return    none.
+ */
+static inline void  usbhw_set_eps_dis(usb_ep_en_e ep)
+{
+	reg_usb_edp_en &=(~ ep);
+}
+
+/**
+ * @brief     This function servers to read the data of Endpoint.
+ * @param[in] ep - selected the Endpoint
+ * @return    the value of Endpoint
+ */
+static inline unsigned char usbhw_read_ep_data(unsigned int ep) {
+	return reg_usb_ep_dat(ep);
+}
+
+/**
+ * @brief     This function servers to write the data of Endpoint.
+ * @param[in] ep   -  selected the Endpoint
+ * @param[in] data -  the value of Endpoint
+ * @return    none
+ */
+static inline void usbhw_write_ep_data(unsigned int ep, unsigned char data) {
+	reg_usb_ep_dat(ep) = data;
+}
+
+
+
+/**
+ * @brief     This function servers to enable the specified Endpoint.
+ * @param[in] ep -  selected the Endpoint
+ * @param[in] en -  1:enable,0:disable
+ * @return    none
+ */
+static inline void usbhw_set_ep_en(unsigned int ep, unsigned char en) {
+	if(en)
+	{
+		reg_usb_edp_en |= ep;
+	}
+	else
+	{
+		reg_usb_edp_en &= ~(ep);
+	}
+}
+
+/**
+ * @brief     This function servers to determine whether Endpoint is busy.
+ * @param[in] ep -  selected the Endpoint
+ * @return    1: busy; 0: not busy.
+ */
+static inline unsigned int usbhw_is_ep_busy(unsigned int ep) {
+	return reg_usb_ep_ctrl(ep) & FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to ack.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_ack(unsigned int ep) {
+	reg_usb_ep_ctrl(ep) = FLD_USB_EP_BUSY;
+}
+
+/**
+ * @brief     This function servers to set the specified data EndPoint to stall.
+ * @param[in] ep -  select the data EndPoint.
+ * @return    none.
+ */
+static inline void usbhw_data_ep_stall(unsigned int ep) {
+	reg_usb_ep_ctrl(ep) = FLD_USB_EP_STALL;
+}
+
+
+/**
+ * @brief     This function servers to set the threshold of printer.
+ * @param[in] th - set the threshold for printer
+ * @return    none.
+ */
+static inline void usbhw_set_printer_threshold(unsigned char th) {
+	reg_usb_ep8_send_thre = th;
+}
+
+enum {
+	USB_EDP_PRINTER_IN = 8,     // default hw buf len = 64
+	USB_EDP_MOUSE = 2,			// default hw buf len = 8
+	USB_EDP_KEYBOARD_IN = 1,	// default hw buf len = 8
+	USB_EDP_IN = 3,				// default hw buf len = 16
+	USB_EDP_AUDIO_IN = 4,		// default hw buf len = 64
+	USB_EDP_PRINTER_OUT = 5,	// default hw buf len = 64
+	USB_EDP_SPEAKER = 6,		// default hw buf len = 16
+	USB_EDP_MIC = 7,			// default hw buf len = 16
+	USB_EDP_MS_IN = 4,		// mass storage
+	USB_EDP_MS_OUT = 5,
+	USB_EDP_SOMATIC_IN = USB_EDP_AUDIO_IN,		//  when USB_SOMATIC_ENABLE, USB_EDP_PRINTER_OUT disable
+	USB_EDP_SOMATIC_OUT = USB_EDP_PRINTER_OUT,
+    USB_EDP_CDC_IN = 4,
+    USB_EDP_CDC_OUT = 5,
+};
+
+// #defined in the standard spec
+enum {
+	USB_HID_AUDIO       	= 2,
+	USB_HID_MOUSE       	= 1,
+	USB_HID_KB_MEDIA    	= 3,// media
+	USB_HID_KB_SYS      	= 4,// system : power,sleep,wakeup
+	USB_HID_SOMATIC			= 5,// somatic sensor,  may have many report ids
+};
+
+
+/**
+ * @brief      This function disables the manual interrupt
+ *             (Endpont8 is the alias of endpoint0)
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_disable_manual_interrupt(int m);
+
+/**
+ * @brief      This function enable the manual interrupt
+ * @param[in]  m - the irq mode needs to set
+ * @return     none
+ */
+void usbhw_enable_manual_interrupt(int m);
+
+/**
+ * @brief      This function sends a bulk of data to host via the specified endpoint
+ * @param[in]  ep - the number of the endpoint
+ * @param[in]  data - pointer to the data need to send
+ * @param[in]  len - length in byte of the data need to send
+ * @return     none
+ */
+void usbhw_write_ep(unsigned int ep, unsigned char * data, int len);
+
+/**
+ * @brief      This function sends two bytes data to host via the control endpoint
+ *             (handy help function)
+ * @param[in]  v - the two bytes data need to send
+ * @return     none
+ */
+void usbhw_write_ctrl_ep_u16(unsigned short v);
+
+/**
+ * @brief   This function reads two bytes data from host via the control endpoint
+ * @return  the two bytes data read from the control endpoint
+ */
+unsigned short usbhw_read_ctrl_ep_u16(void);
+
+/**
+ * @brief      This function enables or disables the internal pull-up resistor of DP pin of USB interface
+ * @param[in]  en - enables or disables the internal pull-up resistor(1: enable 0: disable)
+ * @return     none
+ */
+static inline void usb_dp_pullup_en (int en)
+{
+	unsigned char dat = analog_read_reg8(0x0b);
+	if (en) {
+		dat = dat | BIT(7);
+	}
+	else
+	{
+		dat = dat & 0x7f ;
+	}
+
+	analog_write_reg8 (0x0b, dat);
+}
+
+/**
+ * @brief      This function serves to power on or down USB module
+ * @param[in]  en - 1: power on 0: power down
+ * @return     none
+ */
+static inline void usb_power_on(unsigned char en)
+{
+	if(en)
+	{
+		analog_write_reg8(0x7d,analog_read_reg8(0x7d)&0xfd);
+	}
+	else
+	{
+		analog_write_reg8(0x7d,analog_read_reg8(0x7d)|0x02);
+	}
+}
+
+/**
+ * @brief      This function serves to set GPIO MUX function as DP and DM pin of USB
+ * @return     none.
+ */
+static inline void usb_set_pin_en(void)
+{
+	reg_gpio_func_mux(GPIO_PA5)=reg_gpio_func_mux(GPIO_PA5)&(~BIT_RNG(2,3));
+	gpio_function_dis(GPIO_PA5);
+	reg_gpio_func_mux(GPIO_PA6)=reg_gpio_func_mux(GPIO_PA6)&(~BIT_RNG(4,5));
+	gpio_function_dis(GPIO_PA6);
+	gpio_input_en(GPIO_PA5|GPIO_PA6);//DP/DM must set input enable
+	usb_dp_pullup_en (1);
+	write_reg8(0x100c01, (read_reg8(0x100c01) | BIT(7)));   //swire_usb_en
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/watchdog.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/watchdog.h
new file mode 100644
index 00000000..cf04f210
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/chip_b91/watchdog.h
@@ -0,0 +1,84 @@
+/********************************************************************************************************
+ * @file	watchdog.h
+ *
+ * @brief	This is the header file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+#ifndef WATCHDOG_H_
+#define WATCHDOG_H_
+#include "analog.h"
+#include "gpio.h"
+
+/**
+ * @brief     start watchdog.
+ * @return    none
+ */
+static inline void wd_start(void){
+
+	BM_SET(reg_tmr_ctrl2, FLD_TMR_WD_EN);
+}
+
+
+/**
+ * @brief     stop watchdog.
+ * @return    none
+ */
+static inline void wd_stop(void){
+	BM_CLR(reg_tmr_ctrl2, FLD_TMR_WD_EN);
+}
+
+
+/**
+ * @brief     clear watchdog.
+ * @return    none
+ */
+static inline void wd_clear(void)
+{
+	reg_tmr_sta = FLD_TMR_STA_WD|FLD_TMR_WD_CNT_CLR;
+
+}
+
+/**
+ * @brief     clear watchdog timer tick cnt.
+ * @return    none
+ */
+static inline void wd_clear_cnt(void)
+{
+	reg_tmr_sta = FLD_TMR_WD_CNT_CLR;
+
+}
+
+/**
+ * @brief     This function set the watchdog trigger time.
+ * 			  Because the lower 8bit of the wd timer register will always be 0, there will be an error ,
+			  The time error = (0x00~0xff)/(APB clock frequency)
+ * @param[in] period_ms - The watchdog trigger time. Unit is  millisecond
+ * @return    none
+ * @attention  The clock source of watchdog comes from pclk, when pclk changes it needs to be reconfigured.
+ */
+static inline void wd_set_interval_ms(unsigned int period_ms)
+{
+	static unsigned int tmp_period_ms = 0;
+	tmp_period_ms=period_ms*sys_clk.pclk*1000;
+	reg_wt_target=tmp_period_ms;
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_8258.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_8258.a
new file mode 100644
index 00000000..201217fd
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diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_826x.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_826x.a
new file mode 100644
index 00000000..2fa35b76
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_826x.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_8278.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_8278.a
new file mode 100644
index 00000000..9d2fefb6
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_8278.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_b91.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_b91.a
new file mode 100644
index 00000000..fe939b5a
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/lib/libdrivers_b91.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/platform.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/platform.h
new file mode 100644
index 00000000..ce839472
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/platform.h
@@ -0,0 +1,42 @@
+/********************************************************************************************************
+ * @file    platform.h
+ *
+ * @brief   This is the header file for platform
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if defined (MCU_CORE_826x)
+#include "chip_826x/driver_826x.h"
+#include "chip_826x/gpio_default.h"
+#elif defined (MCU_CORE_8258)
+#include "chip_8258/driver_8258.h"
+#include "chip_8258/gpio_default.h"
+#elif defined (MCU_CORE_8278)
+#include "chip_8278/driver_8278.h"
+#include "chip_8278/gpio_default.h"
+#elif defined (MCU_CORE_B91)
+#include "chip_b91/driver.h"
+#include "chip_b91/gpio_default.h"
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/firmware_encrypt.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/firmware_encrypt.h
new file mode 100644
index 00000000..6aead878
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/firmware_encrypt.h
@@ -0,0 +1,31 @@
+/********************************************************************************************************
+ * @file    firmware_encrypt.h
+ *
+ * @brief   This is the header file of firmware_encrypt for b91m
+ *
+ * @author  Driver Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef ENCRYPT_H_
+#define ENCRYPT_H_
+
+void firmware_encrypt_based_on_uid(unsigned char* uid,unsigned char* ciphertext);
+
+#endif /* ENCRYPT_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/libfirmware_encrypt.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/libfirmware_encrypt.a
new file mode 100644
index 00000000..14c78fbd
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/riscv/libfirmware_encrypt.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b85m/irq_handler.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b85m/irq_handler.c
new file mode 100644
index 00000000..edb9dee5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b85m/irq_handler.c
@@ -0,0 +1,133 @@
+/********************************************************************************************************
+ * @file    irq_handler.c
+ *
+ * @brief   This is the source file of irq_handler for b85m
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+
+#if (__PROJECT_TL_SNIFFER__)
+extern void irq_sniffer_handler(void);
+#endif
+extern void rf_rx_irq_handler(void);
+extern void rf_tx_irq_handler(void);
+
+volatile u8 T_DBG_irqTest[16] = {0};
+
+//called by irq in cstartup.s
+_attribute_ram_code_ void irq_handler(void){
+#if (__PROJECT_TL_BOOT_LOADER__)
+#if UART_ENABLE
+    u16 dma_irq_source = dma_chn_irq_status_get();
+
+	if(dma_irq_source & FLD_DMA_CHN_UART_RX){
+		dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
+		T_DBG_irqTest[8]++;
+		drv_uart_rx_irq_handler();
+	}else if(dma_irq_source & FLD_DMA_CHN_UART_TX){
+		dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
+		T_DBG_irqTest[9]++;
+		drv_uart_tx_irq_handler();
+	}else{
+		dma_chn_irq_status_clr(~(FLD_DMA_CHN_UART_TX | FLD_DMA_CHN_UART_RX));
+	}
+#endif
+#elif (__PROJECT_TL_SNIFFER__)
+	irq_sniffer_handler();
+#else
+	u16 src_rf = rf_irq_src_get();
+	if(src_rf & FLD_RF_IRQ_TX){
+		rf_irq_clr_src(FLD_RF_IRQ_TX);
+		T_DBG_irqTest[0]++;
+		rf_tx_irq_handler();
+	}
+
+	if(src_rf & FLD_RF_IRQ_RX){
+		rf_irq_clr_src(FLD_RF_IRQ_RX);
+		T_DBG_irqTest[1]++;
+		rf_rx_irq_handler();
+	}
+
+	if(src_rf & FLD_RF_IRQ_RX_TIMEOUT){
+		rf_irq_clr_src(FLD_RF_IRQ_RX_TIMEOUT);
+	}
+
+	if(src_rf & FLD_RF_IRQ_FIRST_TIMEOUT){
+		rf_irq_clr_src(FLD_RF_IRQ_FIRST_TIMEOUT);
+	}
+
+	u32 src = irq_get_src();
+
+	if((src & FLD_IRQ_TMR0_EN)){
+		reg_irq_src = FLD_IRQ_TMR0_EN;
+		reg_tmr_sta = FLD_TMR_STA_TMR0;
+		T_DBG_irqTest[2]++;
+		drv_timer_irq0_handler();
+	}
+
+	if((src & FLD_IRQ_TMR1_EN)){
+		reg_irq_src = FLD_IRQ_TMR1_EN;
+		reg_tmr_sta = FLD_TMR_STA_TMR1;
+		T_DBG_irqTest[3]++;
+		drv_timer_irq1_handler();
+	}
+
+    if((src & FLD_IRQ_SYSTEM_TIMER)){
+    	reg_irq_src = FLD_IRQ_SYSTEM_TIMER;
+    	T_DBG_irqTest[4]++;
+    	drv_timer_irq3_handler();
+    }
+
+	if((src & FLD_IRQ_GPIO_EN)==FLD_IRQ_GPIO_EN){
+		reg_irq_src = FLD_IRQ_GPIO_EN;
+		T_DBG_irqTest[5]++;
+		drv_gpio_irq_handler();
+	}
+
+	if((src & FLD_IRQ_GPIO_RISC0_EN)==FLD_IRQ_GPIO_RISC0_EN){
+		reg_irq_src = FLD_IRQ_GPIO_RISC0_EN;
+		T_DBG_irqTest[6]++;
+		drv_gpio_irq_risc0_handler();
+	}
+
+	if((src & FLD_IRQ_GPIO_RISC1_EN)==FLD_IRQ_GPIO_RISC1_EN){
+		reg_irq_src = FLD_IRQ_GPIO_RISC1_EN;
+		T_DBG_irqTest[7]++;
+		drv_gpio_irq_risc1_handler();
+	}
+
+    u16 dma_irq_source = dma_chn_irq_status_get();
+
+	if(dma_irq_source & FLD_DMA_CHN_UART_RX){
+		dma_chn_irq_status_clr(FLD_DMA_CHN_UART_RX);
+		T_DBG_irqTest[8]++;
+		drv_uart_rx_irq_handler();
+	}else if(dma_irq_source & FLD_DMA_CHN_UART_TX){
+		dma_chn_irq_status_clr(FLD_DMA_CHN_UART_TX);
+		T_DBG_irqTest[9]++;
+		drv_uart_tx_irq_handler();
+	}else{
+		dma_chn_irq_status_clr(~(FLD_DMA_CHN_UART_TX | FLD_DMA_CHN_UART_RX));
+	}
+#endif
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/irq_handler.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/irq_handler.c
new file mode 100644
index 00000000..98dbbcde
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/irq_handler.c
@@ -0,0 +1,127 @@
+/********************************************************************************************************
+ * @file    irq_handler.c
+ *
+ * @brief   This is the source file of irq_handler for b91m
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "tl_common.h"
+
+extern void rf_rx_irq_handler(void);
+extern void rf_tx_irq_handler(void);
+
+
+
+volatile u8 T_DBG_testIrq[16] = {0};
+
+#if (__PROJECT_TL_BOOT_LOADER__)
+#if UART_ENABLE
+void uart0_irq_handler(void)
+{
+	if(uart_get_irq_status(UART0, UART_TXDONE)){
+		T_DBG_testIrq[8]++;
+		drv_uart_tx_irq_handler();
+	}
+
+	if(uart_get_irq_status(UART0, UART_RXDONE)){
+		T_DBG_testIrq[9]++;
+		drv_uart_rx_irq_handler();
+	}
+}
+#endif
+#else
+void rf_irq_handler(void)
+{
+	T_DBG_testIrq[0]++;
+	if(rf_get_irq_status(FLD_RF_IRQ_RX)){
+		rf_clr_irq_status(FLD_RF_IRQ_RX);
+		T_DBG_testIrq[1]++;
+		rf_rx_irq_handler();
+	}else if(rf_get_irq_status(FLD_RF_IRQ_TX)){
+		rf_clr_irq_status(FLD_RF_IRQ_TX);
+		T_DBG_testIrq[2]++;
+		rf_tx_irq_handler();
+	}else{
+		T_DBG_testIrq[3]++;
+		rf_clr_irq_status(0xffff);
+	}
+}
+
+void timer0_irq_handler(void)
+{
+	if(timer_get_irq_status(TMR_STA_TMR0)){
+		timer_clr_irq_status(TMR_STA_TMR0);
+		drv_timer_irq0_handler();
+	}
+}
+
+void timer1_irq_handler(void)
+{
+	if(timer_get_irq_status(TMR_STA_TMR1)){
+		timer_clr_irq_status(TMR_STA_TMR1);
+		drv_timer_irq1_handler();
+	}
+}
+
+void stimer_irq_handler(void)
+{
+	if(stimer_get_irq_status(FLD_SYSTEM_IRQ)){
+		stimer_clr_irq_status(FLD_SYSTEM_IRQ);
+		T_DBG_testIrq[4]++;
+		drv_timer_irq3_handler();
+	}
+}
+
+void gpio_irq_handler(void)
+{
+	T_DBG_testIrq[5]++;
+	gpio_clr_irq_status(FLD_GPIO_IRQ_CLR);
+	drv_gpio_irq_handler();
+}
+
+void gpio_risc0_irq_handler(void)
+{
+	T_DBG_testIrq[6]++;
+	gpio_clr_irq_status(FLD_GPIO_IRQ_GPIO2RISC0_CLR);
+	drv_gpio_irq_risc0_handler();
+}
+
+void gpio_risc1_irq_handler(void)
+{
+	T_DBG_testIrq[7]++;
+	gpio_clr_irq_status(FLD_GPIO_IRQ_GPIO2RISC1_CLR);
+	drv_gpio_irq_risc1_handler();
+}
+
+void uart0_irq_handler(void)
+{
+	if(uart_get_irq_status(UART0, UART_TXDONE)){
+		T_DBG_testIrq[8]++;
+		drv_uart_tx_irq_handler();
+	}
+
+	if(uart_get_irq_status(UART0, UART_RXDONE)){
+		T_DBG_testIrq[9]++;
+		drv_uart_rx_irq_handler();
+	}
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/plic_isr.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/plic_isr.c
new file mode 100644
index 00000000..e843d5bc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/services/b91m/plic_isr.c
@@ -0,0 +1,726 @@
+/********************************************************************************************************
+ * @file	plic_isr.c
+ *
+ * @brief	This is the source file for B91
+ *
+ * @author	Driver Group
+ * @date	2019
+ *
+ * @par     Copyright (c) 2019, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+/*
+ * All interrupt entry functions and weak definitions of related processing functions are defined here,If you dont use the relevant interrupt function,
+ *  you can delete it to save ram_code space.
+ ****************************************************************************************
+ */
+#include "tl_common.h"
+
+
+volatile unsigned long mcause;
+volatile unsigned long mepc;
+
+/**
+ * @brief  exception handler.this defines an exception handler to handle all the platform pre-defined exceptions.
+ * @return none
+ */
+_attribute_ram_code_sec_ __attribute__((weak)) void except_handler()
+{
+	mcause = core_get_mcause();
+	mepc   = core_get_mepc();
+ 	while(1){
+ 		/* Unhandled Trap */
+ 		for(volatile unsigned int i = 0; i < 0xffff; i++)
+ 		{
+ 			__asm__("nop");
+ 		}
+ 	}
+}
+
+_attribute_ram_code_sec_noinline_  __attribute__((weak)) void trap_entry(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void trap_entry(void)
+{
+ 	except_handler();
+}
+
+__attribute__((section(".ram_code"))) void default_irq_handler(void)
+{
+	
+}
+
+void stimer_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void analog_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void timer1_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void timer0_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void dma_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void bmc_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_ctrl_ep_setup_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_ctrl_ep_data_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_ctrl_ep_status_irq_handler(void)  __attribute__((weak, alias("default_irq_handler")));
+void usb_ctrl_ep_setinf_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_endpoint_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void rf_dm_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void rf_ble_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void rf_bt_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void rf_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void pwm_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void pke_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void uart1_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void uart0_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void audio_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void i2c_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void hspi_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void pspi_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_pwdn_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void gpio_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void gpio_risc0_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void gpio_risc1_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void soft_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus0_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus1_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus2_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus3_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus4_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_250us_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void usb_reset_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus7_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus8_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus13_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus14_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus15_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus17_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus21_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus22_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus23_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus24_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus25_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus26_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus27_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus28_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+void npe_bus29_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus30_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_bus31_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void npe_comb_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void pm_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+void eoc_irq_handler(void) __attribute__((weak, alias("default_irq_handler")));
+
+/**
+ * @brief system timer interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq1(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq1(void)
+{
+	plic_isr(stimer_irq_handler,IRQ1_SYSTIMER);
+}
+
+/**
+ * @brief analog interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq2(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq2(void)
+{
+	plic_isr(analog_irq_handler,IRQ2_ALG);
+}
+
+/**
+ * @brief timer1 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq3(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq3(void)
+{
+	plic_isr(timer1_irq_handler,IRQ3_TIMER1);
+}
+
+/**
+ * @brief timer0 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq4(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq4(void)
+{
+	plic_isr(timer0_irq_handler,IRQ4_TIMER0);
+}
+
+/**
+ * @brief dma interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq5(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq5(void)
+{
+	plic_isr(dma_irq_handler,IRQ5_DMA);
+}
+
+/**
+ * @brief bmc interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq6(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq6(void)
+{
+	plic_isr(bmc_irq_handler,IRQ6_BMC);
+}
+
+/**
+ * @brief usb control endpoint setup interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq7(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq7(void)
+{
+	plic_isr(usb_ctrl_ep_setup_irq_handler,IRQ7_USB_CTRL_EP_SETUP);
+}
+
+/**
+ * @brief usb control endpoint data interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq8(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq8(void)
+{
+	plic_isr(usb_ctrl_ep_data_irq_handler,IRQ8_USB_CTRL_EP_DATA);
+}
+
+/**
+ * @brief usb control endpoint status interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq9(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq9(void)
+{
+	plic_isr(usb_ctrl_ep_status_irq_handler,IRQ9_USB_CTRL_EP_STATUS);
+}
+
+/**
+ * @brief usb control endpoint setinf interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq10(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq10(void)
+{
+	plic_isr(usb_ctrl_ep_setinf_irq_handler,IRQ10_USB_CTRL_EP_SETINF);
+}
+
+/**
+ * @brief usb endpoint interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq11(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq11(void)
+{
+	plic_isr(usb_endpoint_irq_handler,IRQ11_USB_ENDPOINT);
+}
+
+/**
+ * @brief rf dual mode interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq12(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq12(void)
+{
+	plic_isr(rf_dm_irq_handler,IRQ12_ZB_DM);
+}
+
+/**
+ * @brief rf ble interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq13(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq13(void)
+{
+	plic_isr(rf_ble_irq_handler,IRQ13_ZB_BLE);
+}
+
+/**
+ * @brief rf BT  interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq14(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq14(void)
+{
+	plic_isr(rf_bt_irq_handler,IRQ14_ZB_BT);
+}
+
+/**
+ * @brief telink rf interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq15(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq15(void)
+{
+	plic_isr(rf_irq_handler,IRQ15_ZB_RT);
+}
+
+/**
+ * @brief pwm interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq16(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq16(void)
+{
+	plic_isr(pwm_irq_handler,IRQ16_PWM);
+}
+
+/**
+ * @brief pke interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq17(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq17(void)
+{
+	plic_isr(pke_irq_handler,IRQ17_PKE);
+}
+
+/**
+ * @brief uart1 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq18(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq18(void)
+{
+	plic_isr(uart1_irq_handler,IRQ18_UART1);
+}
+
+/**
+ * @brief uart0 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq19(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq19(void)
+{
+	plic_isr(uart0_irq_handler,IRQ19_UART0);
+}
+
+/**
+ * @brief audio interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq20(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq20(void)
+{
+	plic_isr(audio_irq_handler,IRQ20_DFIFO);
+}
+
+/**
+ * @brief i2c interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq21(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq21(void)
+{
+	plic_isr(i2c_irq_handler,IRQ21_I2C);
+}
+
+/**
+ * @brief hspi interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq22(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq22(void)
+{
+	plic_isr(hspi_irq_handler,IRQ22_SPI_AHB);
+}
+
+/**
+ * @brief pspi interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq23(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq23(void)
+{
+	plic_isr(pspi_irq_handler,IRQ23_SPI_APB);
+
+}
+
+/**
+ * @brief usb power down interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq24(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq24(void)
+{
+	plic_isr(usb_pwdn_irq_handler,IRQ24_USB_PWDN);
+}
+
+/**
+ * @brief gpio interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq25(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq25(void)
+{
+	plic_isr(gpio_irq_handler,IRQ25_GPIO);
+}
+
+/**
+ * @brief gpio_risc0 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq26(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq26(void)
+{
+	plic_isr(gpio_risc0_irq_handler,IRQ26_GPIO2RISC0);
+}
+
+/**
+ * @brief gpio_risc1 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq27(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq27(void)
+{
+	plic_isr(gpio_risc1_irq_handler,IRQ27_GPIO2RISC1);
+}
+
+/**
+ * @brief soft interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq28(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq28(void)
+{
+	plic_isr(soft_irq_handler,IRQ28_SOFT);
+}
+
+/**
+ * @brief npe bus0 interrupt handler.
+ * @return none
+ */
+
+_attribute_ram_code_sec_noinline_ void entry_irq29(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq29(void)
+{
+	plic_isr(npe_bus0_irq_handler,IRQ29_NPE_BUS0);
+}
+
+/**
+ * @brief npe bus1 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq30(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq30(void)
+{
+	plic_isr(npe_bus1_irq_handler,IRQ30_NPE_BUS1);
+}
+
+/**
+ * @brief npe bus2 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq31(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq31(void)
+{
+	plic_isr(npe_bus2_irq_handler,IRQ31_NPE_BUS2);
+}
+/**
+ * @brief npe bus3 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq32(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq32(void)
+{
+	plic_isr(npe_bus3_irq_handler,IRQ32_NPE_BUS3);
+}
+
+/**
+ * @brief npe bus4 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq33(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq33(void)
+{
+	plic_isr(npe_bus4_irq_handler,IRQ33_NPE_BUS4);
+}
+
+/**
+ * @brief usb 250us interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq34(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq34(void)
+{
+	plic_isr(usb_250us_irq_handler,IRQ34_USB_250US);
+}
+
+/**
+ * @brief usb reset interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq35(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq35(void)
+{
+	plic_isr(usb_reset_irq_handler,IRQ35_USB_RESET);
+}
+
+/**
+ * @brief npe bus7 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq36(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq36(void)
+{
+	plic_isr(npe_bus7_irq_handler,IRQ36_NPE_BUS7);
+}
+
+/**
+ * @brief npe bus8 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq37(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq37(void)
+{
+	plic_isr(npe_bus8_irq_handler,IRQ37_NPE_BUS8);
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq38(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq38(void)
+{
+
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq39(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq39(void)
+{
+
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq40(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq40(void)
+{
+
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq41(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq41(void)
+{
+
+}
+
+/**
+ * @brief npe bus13 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq42(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq42(void)
+{
+	plic_isr(npe_bus13_irq_handler,IRQ42_NPE_BUS13);
+}
+
+/**
+ * @brief npe bus14 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq43(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq43(void)
+{
+	plic_isr(npe_bus14_irq_handler,IRQ43_NPE_BUS14);
+}
+
+/**
+ * @brief npe bus15 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq44(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq44(void)
+{
+	plic_isr(npe_bus15_irq_handler,IRQ44_NPE_BUS15);
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq45(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq45(void)
+{
+
+}
+
+/**
+ * @brief npe bus17 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq46(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq46(void)
+{
+	plic_isr(npe_bus17_irq_handler,IRQ46_NPE_BUS17);
+}
+
+
+_attribute_ram_code_sec_noinline_ void entry_irq47(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq47(void)
+{
+
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq48(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq48(void)
+{
+
+}
+
+_attribute_ram_code_sec_noinline_ void entry_irq49(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq49(void)
+{
+
+}
+
+/**
+ * @brief npe bus21 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq50(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq50(void)
+{
+	plic_isr(npe_bus21_irq_handler,IRQ50_NPE_BUS21);
+}
+
+/**
+ * @brief npe bus22 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq51(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq51(void)
+{
+	plic_isr(npe_bus22_irq_handler,IRQ51_NPE_BUS22);
+}
+
+/**
+ * @brief npe bus23 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq52(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq52(void)
+{
+	plic_isr(npe_bus23_irq_handler,IRQ52_NPE_BUS23);
+}
+
+/**
+ * @brief npe bus24 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq53(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq53(void)
+{
+	plic_isr(npe_bus24_irq_handler,IRQ53_NPE_BUS24);
+}
+
+/**
+ * @brief npe bus25 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq54(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq54(void)
+{
+	plic_isr(npe_bus25_irq_handler,IRQ54_NPE_BUS25);
+}
+
+/**
+ * @brief npe bus26 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq55(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq55(void)
+{
+	plic_isr(npe_bus26_irq_handler,IRQ55_NPE_BUS26);
+}
+
+/**
+ * @brief npe bus27 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq56(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq56(void)
+{
+	plic_isr(npe_bus27_irq_handler,IRQ56_NPE_BUS27);
+}
+
+/**
+ * @brief npe bus28 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq57(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq57(void)
+{
+	plic_isr(npe_bus28_irq_handler,IRQ57_NPE_BUS28);
+}
+
+/**
+ * @brief npe bus29 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq58(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq58(void)
+{
+	plic_isr(npe_bus29_irq_handler,IRQ58_NPE_BUS29);
+}
+
+/**
+ * @brief npe bus30 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq59(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq59(void)
+{
+	plic_isr(npe_bus30_irq_handler,IRQ59_NPE_BUS30);
+}
+
+/**
+ * @brief npe bus31 interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq60(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq60(void)
+{
+	plic_isr(npe_bus31_irq_handler,IRQ60_NPE_BUS31);
+}
+
+/**
+ * @brief npe comb interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq61(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq61(void)
+{
+	plic_isr(npe_comb_irq_handler,IRQ61_NPE_COMB);
+}
+
+/**
+ * @brief pm interrupt handler.An interrupt will be generated after wake-up
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq62(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq62(void)
+{
+	plic_isr(pm_irq_handler,IRQ62_PM_TM);
+}
+
+/**
+ * @brief eoc interrupt handler.
+ * @return none
+ */
+_attribute_ram_code_sec_noinline_ void entry_irq63(void) __attribute__ ((interrupt ("machine") , aligned(4)));
+void entry_irq63(void)
+{
+	plic_isr(eoc_irq_handler,IRQ63_EOC);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/div_mod.S b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/div_mod.S
new file mode 100644
index 00000000..7efea30f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/div_mod.S
@@ -0,0 +1,116 @@
+/********************************************************************************************************
+ * @file    div_mod.S
+ *
+ * @brief   This is the div & mod file for b85m
+ *
+ * @author  Driver Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#define 	UDIV		#0
+#define 	SDIV		#1
+#define 	UMOD		#2
+#define 	SMOD		#3
+
+	.code	16
+	.text
+
+	.align	2
+	.global	__modsi3
+	.code 16
+	.thumb_func
+	.type	__modsi3, %function
+__modsi3:
+	tmov	r2, SMOD
+	tj	div
+	.size	__modsi3, .-__modsi3
+
+	.align	2
+	.global	__divsi3
+	.code 16
+	.thumb_func
+	.type	__divsi3, %function
+__divsi3:
+	tmov	r2, SDIV
+	tj	div
+	.size	__divsi3, .-__divsi3
+
+	.align	2
+	.global	__umodsi3
+	.code 16
+	.thumb_func
+	.type	__umodsi3, %function
+__umodsi3:
+	tmov	r2, UMOD
+	tj	div
+	.size	__umodsi3, .-__umodsi3
+
+	.align	2
+	.global	__udivsi3
+	.code 16
+	.thumb_func
+	.type	__udivsi3, %function
+__udivsi3:
+	tmov	r2, UDIV
+	tj	div
+	.size	__udivsi3, .-__udivsi3
+
+	.align	2
+	.global	div
+	.code 16
+	.thumb_func
+	.type	div, %function
+div:
+	tmrcs	r3
+	tpush	{r3, r4}
+	tmov	r4, #0x80
+	tor	r3, r4
+	tmcsr	r3
+	
+	tloadr	r3, .L11
+	tstorer	r0, [r3]
+	tadd	r3, r3, #4
+	tstorer	r1, [r3]
+	tsub	r3, r3, #8
+	tstorerb	r2, [r3]
+
+.L2:
+	tloadrb	r0, [r3]
+	tcmp	r0, #0
+	tjne	.L2
+	tcmp	r2, #1
+	tjls	.L4
+	tadd	r3, r3, #8
+	tloadr	r0, [r3]
+	tj	.L6
+.L4:
+	tadd	r3, r3, #4
+	tloadr	r0, [r3]
+
+.L6:
+	tpop	{r3, r4}
+	tmcsr	r3
+	tjex	lr
+
+	.align	4
+.L11:
+	.word(0x800664)
+	.word(0x800660)
+	.word(0x800668)
+	.size	div, .-div
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/firmware_encrypt.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/firmware_encrypt.h
new file mode 100644
index 00000000..05ea0975
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/firmware_encrypt.h
@@ -0,0 +1,31 @@
+/********************************************************************************************************
+ * @file    firmware_encrypt.h
+ *
+ * @brief   This is the header file of firmware_encrypt for b85m
+ *
+ * @author  Driver Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef ENCRYPT_H_
+#define ENCRYPT_H_
+
+void firmware_encrypt_based_on_uid(unsigned char* uid,unsigned char* ciphertext);
+
+#endif /* ENCRYPT_H_ */
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libfirmware_encrypt.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libfirmware_encrypt.a
new file mode 100644
index 00000000..6532a364
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libfirmware_encrypt.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libsoft-fp.a b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libsoft-fp.a
new file mode 100644
index 00000000..be0f7def
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/platform/tc32/libsoft-fp.a differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/assert.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/assert.h
new file mode 100644
index 00000000..c5162a93
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/assert.h
@@ -0,0 +1,86 @@
+/********************************************************************************************************
+ * @file    assert.h
+ *
+ * @brief   This is the header file for assert
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+//for  __DEBUG__
+#if (ASSERT_DEBUG_MODE)
+#define assert(exp) 	do{ \
+                        	if(!(exp)){ 											\
+                        		DEBUG_OUT("File:%s,Line:%d\n",__FILE__,__LINE__); 	\
+                        		while(1){;} 										\
+                        	} 														\
+						}while(0)
+
+#define trace_route 	do{ \
+                        	DEBUG_OUT("File:%s,Line:%d\n",__FILE__,__LINE__); 		\
+                    	}while(0)
+#else
+#define assert(ignore)  ((void) 0)
+#define trace_route
+#endif
+
+////////////////////  To do compiler warning  //////////////////
+// http://stackoverflow.com/questions/5966594/how-can-i-use-pragma-message-so-that-the-message-points-to-the-filelineno
+// http://gcc.gnu.org/ml/gcc-help/2010-10/msg00196.html
+// http://stackoverflow.com/questions/3030099/c-c-pragma-in-define-macro
+
+#define _STRINGIFY(x)	#x
+#define STRINGIFY(x) 	_STRINGIFY(x)
+
+#ifdef __GNUC__
+#define COMPILE_MESSAGE(x) _Pragma (#x)
+#endif
+
+#if (__SHOW_TODO__)
+#ifdef __GNUC__
+#define TODO(x) 		COMPILE_MESSAGE(message ("--TODO-- " #x))
+#else
+#define TODO(x) 		__pragma(message("--TODO-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define TODO(x)
+#endif
+
+#if (__SHOW_WARN__)
+#ifdef __GNUC__
+#define WARN(x) 		COMPILE_MESSAGE(message ("--WARN-- " #x))
+#else
+#define WARN(x) 		__pragma(message("--WARN-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define WARN(x)
+#endif
+
+#if (__SHOW_WARN__)
+#ifdef __GNUC__
+#define NOTE(x) 		COMPILE_MESSAGE(message ("--NOTE-- " #x))
+#else
+#define NOTE(x) 		__pragma(message("--NOTE-- "_STRINGIFY(x) " ::function: " __FUNCTION__ "@"STRINGIFY(__LINE__)))
+#endif
+#else
+#define NOTE(x)
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/bit.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/bit.h
new file mode 100644
index 00000000..a8818171
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/bit.h
@@ -0,0 +1,269 @@
+/********************************************************************************************************
+ * @file    bit.h
+ *
+ * @brief   This is the header file for bit
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+// http://www.coranac.com/documents/working-with-bits-and-bitfields/#sec-intro
+
+#include "macro_trick.h"
+
+#define BIT(n)                  		( 1<<(n) )
+
+// BITSx  are internal used macro, please use BITS instead
+#define BITS1(a)                 		BIT(a)
+#define BITS2(a, b)              		(BIT(a) | BIT(b))
+#define BITS3(a, b, c)          		(BIT(a) | BIT(b) | BIT(c))
+#define BITS4(a, b, c, d)        		(BIT(a) | BIT(b) | BIT(c) | BIT(d))
+#define BITS5(a, b, c, d, e)     		(BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e))
+#define BITS6(a, b, c, d, e, f)  		(BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f))
+#define BITS7(a, b, c, d, e, f, g)  	(BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f) | BIT(g))
+#define BITS8(a, b, c, d, e, f, g, h)  	(BIT(a) | BIT(b) | BIT(c) | BIT(d) | BIT(e) | BIT(f) | BIT(g) | BIT(h))
+
+#define BITS(...) 						VARARG(BITS, __VA_ARGS__) 
+
+
+// bits range: BITS_RNG(4, 5)  0b000111110000,  start from 4, length = 5
+#define BIT_RNG(s, e)  					(BIT_MASK_LEN((e)-(s)+1) << (s))
+
+#define BM_MASK_V(x, mask)        		( (x) | (mask) )
+#define BM_CLR_MASK_V(x, mask)    		( (x) & ~(mask) )
+
+#define BM_SET(x, mask)         		( (x) |= (mask) )
+#define BM_CLR(x, mask)       			( (x) &= ~(mask) )
+#define BM_IS_SET(x, mask)   			( (x) & (mask) )
+#define BM_IS_CLR(x, mask)   			( (~x) & (mask) )
+#define BM_FLIP(x, mask)      			( (x) ^=  (mask) )
+
+// !!!!   v is already a masked value,  no need to shift
+#define BM_MASK_VAL(x, mask, v)  		( ((x) & ~(mask)) | (v))
+#define BM_SET_MASK_VAL(x, mask, v)  	( (x) = BM_MASK_VAL(x, mask, v) )
+
+//-------------------SET_BIT---------------------
+#define SETB(v,n)						(*(volatile unsigned char  *)v |= n)
+#define CLRB(v,n)						(*(volatile unsigned char  *)v &= ~n)
+#define TEST(v,n)						(((*(volatile unsigned char  *)v) & n) ? 1:0)
+#define BIT_SET(x, n)         			((x) |=  BIT(n))
+#define BIT_CLR(x, n)       			((x) &= ~ BIT(n))
+#define BIT_IS_SET(x, n)   				((x) & BIT(n))
+#define BIT_FLIP(x, n)   				((x) ^= BIT(n))
+#define BIT_SET_HIGH(x) 				((x) |=  BIT((sizeof((x))*8-1)))				// set the highest bit
+#define BIT_CLR_HIGH(x) 				((x) &= ~ BIT((sizeof((x))*8-1)))				// clr the highest bit
+#define BIT_IS_SET_HIGH(x) 				((x) & BIT((sizeof((x))*8-1)))					// check the highest bit
+
+#define BIT_MASK_LEN(len)       		(BIT(len)-1)
+#define BIT_MASK(start, len)    		(BIT_MASK_LEN(len) << (start) )
+
+//! Prepare a bitmask for insertion or combining.
+#define BIT_PREP(x, start, len) 		((x) & BIT_MASK(start, len))
+
+//! Extract a bitfield of length \a len starting at bit \a start from \a y.
+#define BIT_GET(x, start, len)  		(((x) >> (start)) & BIT_MASK_LEN(len))
+#define BIT_GET_LOW(x, len)   			((x) & BIT_MASK_LEN(len))
+
+//! Insert a new bitfield value \a x into \a y.
+#define BIT_MERGE(y, x, start, len)    \
+    ( y = ((y) &~ BIT_MASK(start, len)) | BIT_PREP(x, start, len) )
+
+#define BIT_IS_EVEN(x)     				(((x)&1)==0)
+#define BIT_IS_ODD(x)      				(!BIT_IS_EVEN((x)))
+
+#define BIT_IS_POW2(x)     				(!((x) & ((x)-1)))
+
+/* turn off right-most 1-bit in x */
+#define BIT_TURNOFF_1(x)   				((x) &= ((x)-1))
+/* isolate right-most 1-bit in x */
+#define BIT_ISOLATE_1(x)   				((x) &= (-(x)))
+/* right-propagate right-most 1-bit in x */
+#define BIT_PROPAGATE_1(x) 				((x) |= ((x)-1))
+/* isolate right-most 0-bit in x */
+#define BIT_ISOLATE_0(x)   				((x) = ~(x) & ((x)+1))
+/* turn on right-most 0-bit in x */
+#define BIT_TURNON_0(x)    				((x) |= ((x)+1))
+
+#define CLAMP_TO_ONE(x) 				(!!(x))				// compiler defined, not stardard.    0 --> 0,   1 --> 0xffffffff
+
+#define ONES(x)							BIT_MASK_LEN(x)
+#define ONES_32							0xffffffff
+#define ALL_SET							0xffffffff
+
+#if 0
+//! Massage \a x for use in bitfield \a name.
+#define BFN_PREP(x, name)    			( ((x)<<name##_SHIFT) & name##_MASK )
+
+//! Get the value of bitfield \a name from \a y. Equivalent to (var=) y.name
+#define BFN_GET(y, name)     			( ((y) & name##_MASK)>>name##_SHIFT )
+
+//! Set bitfield \a name from \a y to \a x: y.name= x.
+#define BFN_SET(y, x, name)  			(y = ((y)&~name##_MASK) | BFN_PREP(x,name) )
+
+// Usage: prio get/set like before:
+prio = BFN_GET(attr2, ATTR2_PRIO);
+BFN_SET(attr2, x, ATTR2_PRIO);
+#endif
+
+/* 
+** bithacks.h - bit hacks macros. v1.0
+**
+** Peteris Krumins (peter@catonmat.net)
+** http://www.catonmat.net  --  good coders code, great reuse
+**
+** This file is explained in the following article:
+** http://www.catonmat.net/blog/bit-hacks-header-file
+**
+** Released under the MIT license.
+*/
+
+// Return the bit index of the lowest 1 in y.   ex:  0b00110111000  --> 3
+#define BIT_LOW_BIT(y)  (((y) & BIT(0))?0:(((y) & BIT(1))?1:(((y) & BIT(2))?2:(((y) & BIT(3))?3:			\
+						(((y) & BIT(4))?4:(((y) & BIT(5))?5:(((y) & BIT(6))?6:(((y) & BIT(7))?7:				\
+						(((y) & BIT(8))?8:(((y) & BIT(9))?9:(((y) & BIT(10))?10:(((y) & BIT(11))?11:			\
+						(((y) & BIT(12))?12:(((y) & BIT(13))?13:(((y) & BIT(14))?14:(((y) & BIT(15))?15:		\
+						(((y) & BIT(16))?16:(((y) & BIT(17))?17:(((y) & BIT(18))?18:(((y) & BIT(19))?19:		\
+						(((y) & BIT(20))?20:(((y) & BIT(21))?21:(((y) & BIT(22))?22:(((y) & BIT(23))?23:		\
+						(((y) & BIT(24))?24:(((y) & BIT(25))?25:(((y) & BIT(26))?26:(((y) & BIT(27))?27:		\
+						(((y) & BIT(28))?28:(((y) & BIT(29))?29:(((y) & BIT(30))?30:(((y) & BIT(31))?31:32		\
+						))))))))))))))))))))))))))))))))
+
+// Return the bit index of the highest 1 in (y).   ex:  0b00110111000  --> 8
+#define BIT_HIGH_BIT(y)  (((y) & BIT(31))?31:(((y) & BIT(30))?30:(((y) & BIT(29))?29:(((y) & BIT(28))?28:	\
+						(((y) & BIT(27))?27:(((y) & BIT(26))?26:(((y) & BIT(25))?25:(((y) & BIT(24))?24:		\
+						(((y) & BIT(23))?23:(((y) & BIT(22))?22:(((y) & BIT(21))?21:(((y) & BIT(20))?20:		\
+						(((y) & BIT(19))?19:(((y) & BIT(18))?18:(((y) & BIT(17))?17:(((y) & BIT(16))?16:		\
+						(((y) & BIT(15))?15:(((y) & BIT(14))?14:(((y) & BIT(13))?13:(((y) & BIT(12))?12:		\
+						(((y) & BIT(11))?11:(((y) & BIT(10))?10:(((y) & BIT(9))?9:(((y) & BIT(8))?8:			\
+						(((y) & BIT(7))?7:(((y) & BIT(6))?6:(((y) & BIT(5))?5:(((y) & BIT(4))?4:				\
+						(((y) & BIT(3))?3:(((y) & BIT(2))?2:(((y) & BIT(1))?1:(((y) & BIT(0))?0:32				\
+						))))))))))))))))))))))))))))))))
+
+#define BM_MASK_FLD(x, mask)    		(((x) & (mask)) >> BIT_LOW_BIT(mask))
+#define BM_SET_MASK_FLD(x, mask, v)    	( (x) = BM_MASK_VAL(x,mask,v) )
+
+//////////////////////
+#define MV(m, v)											(((v) << BIT_LOW_BIT(m)) & (m))
+
+// warning MASK_VALn  are internal used macro, please use MASK_VAL instead
+#define MASK_VAL2(m, v)    									(MV(m,v))
+#define MASK_VAL4(m1,v1,m2,v2)    							(MV(m1,v1)|MV(m2,v2))
+#define MASK_VAL6(m1,v1,m2,v2,m3,v3)    					(MV(m1,v1)|MV(m2,v2)|MV(m3,v3))
+#define MASK_VAL8(m1,v1,m2,v2,m3,v3,m4,v4)    				(MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4))
+#define MASK_VAL10(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5)    		(MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5))
+#define MASK_VAL12(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6)    	(MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6))
+#define MASK_VAL14(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7))
+#define MASK_VAL16(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6,m7,v7,m8,v8) (MV(m1,v1)|MV(m2,v2)|MV(m3,v3)|MV(m4,v4)|MV(m5,v5)|MV(m6,v6)|MV(m7,v7)|MV(m8,v8))
+
+#define MASK_VAL(...) 					VARARG(MASK_VAL, __VA_ARGS__) 
+
+#define FLD_MASK_VAL(x, mask, v)    	BM_MASK_VAL(x, mask, MV(mask,v))
+
+#define SET_FLD(x, mask)    			BM_SET(x, mask)
+#define CLR_FLD(x, mask)    			BM_CLR(x, mask)
+#define FLIP_FLD(x, mask)    			BM_FLIP(x, mask)
+
+#define GET_FLD(x, mask)    			BM_MASK_FLD(x, mask)
+
+#ifndef WIN32
+// warning SET_FLD_Vn  are internal used macro, please use SET_FLD_V instead
+#define SET_FLD_V3(x, m, v)    															\
+    BM_SET_MASK_FLD(x,m,MV(m,v))
+    
+#define SET_FLD_V5(x, m1, v1, m2, v2)    												\
+    BM_SET_MASK_FLD(x, m1|m2, MV(m1,v1)| MV(m2,v2))
+
+#define SET_FLD_V7(x, m1, v1, m2, v2, m3, v3)    										\
+    BM_SET_MASK_FLD(x, m1|m2|m3, MV(m1,v1)| MV(m2,v2)| MV(m3,v3))
+
+#define SET_FLD_V9(x, m1, v1, m2, v2, m3, v3, m4, v4)    								\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4))
+
+#define SET_FLD_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5)    						\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5))
+
+#define SET_FLD_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6)    				\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5|m6, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5)| MV(m6,v6))
+#else
+#define SET_FLD_V3(x, m, v)    															\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x,m,MV(m,v))		\
+	__pragma(warning(pop))
+    
+#define SET_FLD_V5(x, m1, v1, m2, v2)    												\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x, m1|m2, MV(m1,v1)| MV(m2,v2))		\
+	__pragma(warning(pop))
+
+#define SET_FLD_V7(x, m1, v1, m2, v2, m3, v3)    										\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x, m1|m2|m3, MV(m1,v1)| MV(m2,v2)| MV(m3,v3))						\
+	__pragma(warning(pop))
+
+#define SET_FLD_V9(x, m1, v1, m2, v2, m3, v3, m4, v4)    								\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4))			\
+	__pragma(warning(pop))
+
+#define SET_FLD_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5)    						\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5))	\
+	__pragma(warning(pop))
+
+#define SET_FLD_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6)    				\
+	__pragma(warning(push))				\
+	__pragma(warning(disable:4244)) 	\
+    BM_SET_MASK_FLD(x, m1|m2|m3|m4|m5|m6, MV(m1,v1)| MV(m2,v2)| MV(m3,v3)| MV(m4,v4)| MV(m5,v5)| MV(m6,v6))	\
+	__pragma(warning(pop))
+#endif
+
+#define SET_FLD_V(...) 				VARARG(SET_FLD_V, __VA_ARGS__) 
+
+
+//This means direct assignment
+#define SET_FLD_FULL_V3(x, m, v)											((x) = MASK_VAL2(m,v))
+#define SET_FLD_FULL_V5(x, m1, v1, m2, v2)  								((x) = MASK_VAL4(m1,v1,m2,v2))
+#define SET_FLD_FULL_V7(x, m1, v1, m2, v2, m3, v3)  						((x) = MASK_VAL6(m1,v1,m2,v2,m3,v3))
+#define SET_FLD_FULL_V9(x, m1, v1, m2, v2, m3, v3, m4, v4)    				((x) = MASK_VAL8(m1,v1,m2,v2,m3,v3,m4,v4))
+#define SET_FLD_FULL_V11(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5)    		((x) = MASK_VAL10(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5))
+#define SET_FLD_FULL_V13(x, m1, v1, m2, v2, m3, v3, m4, v4, m5, v5, m6, v6) ((x) = MASK_VAL12(m1,v1,m2,v2,m3,v3,m4,v4,m5,v5,m6,v6))
+#define SET_FLD_FULL_V(...) 			VARARG(SET_FLD_FULL_V, __VA_ARGS__) 
+
+////////////////////////////////////////////////////////////////////////
+#define HEXIFY(y) 0x##y##LU
+
+#define BIT_8IFY(y) (((y&0x0000000FLU)?1:0)  + \
+                  ((y&0x000000F0LU)?2:0)  + \
+                  ((y&0x00000F00LU)?4:0)  + \
+                  ((y&0x0000F000LU)?8:0)  + \
+                  ((y&0x000F0000LU)?16:0) + \
+                  ((y&0x00F00000LU)?32:0) + \
+                  ((y&0x0F000000LU)?64:0) + \
+                  ((y&0xF0000000LU)?128:0))
+
+#define BIT_8(Z) ((unsigned char)BIT_8IFY(HEXIFY(Z)))
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/compiler.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/compiler.h
new file mode 100644
index 00000000..129fc368
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/compiler.h
@@ -0,0 +1,44 @@
+/********************************************************************************************************
+ * @file    compiler.h
+ *
+ * @brief   This is the header file for compiler
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#define _attribute_packed_						__attribute__((packed))
+#define _attribute_aligned_(s)					__attribute__((aligned(s)))
+#define _attribute_session_(s)					__attribute__((section(s)))
+
+#define _attribute_no_inline_   				__attribute__((noinline))
+
+#define _attribute_data_retention_
+#define _attribute_data_retention_sec_
+
+#define _attribute_ram_code_					__attribute__((section(".ram_code")))
+#define _attribute_ram_code_sec_  				__attribute__((section(".ram_code")))
+#define _attribute_ram_code_sec_noinline_		__attribute__((section(".ram_code"))) __attribute__((noinline))
+#define _attribute_custom_data_  				__attribute__((section(".custom_data")))
+#define _attribute_custom_bss_  				__attribute__((section(".custom_bss")))
+#define _attribute_text_sec_   					__attribute__((section(".text")))
+#define _attribute_aes_data_sec_      			__attribute__((section(".aes_data")))
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.c
new file mode 100644
index 00000000..803b6e0f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.c
@@ -0,0 +1,144 @@
+/********************************************************************************************************
+ * @file    list.c
+ *
+ * @brief   This is the source file for list
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "types.h"
+#include "list.h"
+
+struct list{
+	struct list *next;
+};
+
+void listInit(list_t list){
+	*list = NULL;
+}
+
+void *listHead(list_t list){
+	return *list;
+}
+
+void listCopy(list_t dest, list_t src){
+	*dest = *src;
+}
+
+void *listTail(list_t list){
+	struct list *l;
+
+	if(*list == NULL){
+		return NULL;
+	}
+
+	for(l = *list; l->next != NULL; l = l->next);
+
+	return l;
+}
+
+void listAdd(list_t list, void *item){
+	struct list *l;
+
+	((struct list *)item)->next = NULL;
+
+	l = listTail(list);
+	if(l == NULL){
+		*list = item;
+	}else{
+		l->next = item;
+	}
+}
+
+void listPush(list_t list, void *item){
+	((struct list *)item)->next = *list;
+	*list = item;
+}
+
+void *listChop(list_t list){
+	struct list *l, *p;
+
+	if(*list == NULL){
+		return NULL;
+	}
+
+	if(((struct list *)*list)->next == NULL){
+		l = *list;
+		*list = NULL;
+		return l;
+	}
+
+	for(l = *list; l->next->next != NULL; l = l->next);
+
+	p = l->next;
+	l->next = NULL;
+
+	return p;
+}
+
+void *listPop(list_t list){
+	if(*list != NULL){
+		*list = ((struct list *)*list)->next;
+	}
+
+	return *list;
+}
+
+void listRemove(list_t list, void *item){
+	struct list *l, *p;
+
+	if(*list == NULL){
+		return;
+	}
+
+	p = NULL;
+	for(l = *list; l != NULL; l = l->next){
+		if(l == item){
+			if(p == NULL){
+				*list = l->next;
+			}else{
+				p->next = l->next;
+			}
+			l->next = NULL;
+			return;
+		}
+		p = l;
+	}
+}
+
+int listLength(list_t list){
+	struct list *l;
+	int num = 0;
+
+	for(l = *list; l != NULL; l = l->next){
+		++num;
+	}
+
+	return num;
+}
+
+void listInsert(list_t list, void *prevItem, void *newItem){
+	if(prevItem == NULL){
+		listPush(list, newItem);
+	}else{
+		((struct list *)newItem)->next = ((struct list *)prevItem)->next;
+		((struct list *)prevItem)->next = newItem;
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.h
new file mode 100644
index 00000000..7edd13dc
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/list.h
@@ -0,0 +1,53 @@
+/********************************************************************************************************
+ * @file    list.h
+ *
+ * @brief   This is the header file for list
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#define LIST_CONCAT2(a, b) a##b
+#define LIST_CONCAT(a, b) LIST_CONCAT2(a, b)
+
+#define LIST(name) 		\
+		static void *LIST_CONCAT(name, _list) = NULL; \
+		static list_t name = (list_t)&LIST_CONCAT(name, _list);
+
+
+typedef void ** list_t;
+
+void listInit(list_t list);
+void *listHead(list_t list);
+void *listTail(list_t list);
+void *listPop (list_t list);
+void listPush(list_t list, void *item);
+
+void *listChop(list_t list);
+
+void listAdd(list_t list, void *item);
+void listRemove(list_t list, void *item);
+
+int listLength(list_t list);
+
+void listCopy(list_t dest, list_t src);
+
+void listInsert(list_t list, void *prevItem, void *newItem);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/macro_trick.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/macro_trick.h
new file mode 100644
index 00000000..78357044
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/macro_trick.h
@@ -0,0 +1,61 @@
+/********************************************************************************************************
+ * @file    macro_trick.h
+ *
+ * @brief   This is the header file for macro_trick
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/////////////////  variadic macro  ////////////////////////
+
+#if 1
+// a little more complex version that works with GCC and visual studio
+
+///   http://stackoverflow.com/questions/9183993/msvc-variadic-macro-expansion
+#define COUNT_ARGS_IMPL2(_1, _2, _3, _4, _5, _6, _7, _8 , _9, _10, _11, _12, _13, _14, _15, _16, _17, _18, _19, _20, N, ...) N 
+#define COUNT_ARGS_IMPL(args)   COUNT_ARGS_IMPL2 args 
+#define COUNT_ARGS(...)    		COUNT_ARGS_IMPL((__VA_ARGS__, 20, 19, 18, 17, 16, 15, 14, 13, 12, 11, 10, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0))
+
+#define MACRO_CHOOSE_HELPER2(base, count) 	base##count 
+#define MACRO_CHOOSE_HELPER1(base, count) 	MACRO_CHOOSE_HELPER2(base, count) 
+#define MACRO_CHOOSE_HELPER(base, count) 	MACRO_CHOOSE_HELPER1(base, count) 
+
+#define MACRO_GLUE(x, y) x y 
+#define VARARG(base, ...)					MACRO_GLUE(MACRO_CHOOSE_HELPER(base, COUNT_ARGS(__VA_ARGS__)),(__VA_ARGS__)) 
+
+
+#else
+// a concise version that only works with GCC
+
+///   http://stackoverflow.com/questions/2124339/c-preprocessor-va-args-number-of-arguments
+
+#define VA_NARGS_IMPL(_1, _2, _3, _4, _5, _6, _7, _8 , _9, _10, N, ...) N 
+#define VA_NARGS(...) VA_NARGS_IMPL(X,##__VA_ARGS__, 9, 8, 7, 6, 5, 4, 3, 2, 1, 0) 
+#define VARARG_IMPL2(base, count, ...) base##count(__VA_ARGS__) 
+#define VARARG_IMPL(base, count, ...) VARARG_IMPL2(base, count, __VA_ARGS__)  
+#define VARARG(base, ...) VARARG_IMPL(base, VA_NARGS(__VA_ARGS__), __VA_ARGS__)  
+
+#endif
+// #define NUMARGS(...)  (sizeof((int[]){__VA_ARGS__})/sizeof(int))
+
+/////////////////  end of variadic macro  //////////////////////
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.c
new file mode 100644
index 00000000..afa05b24
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.c
@@ -0,0 +1,66 @@
+/********************************************************************************************************
+ * @file    mempool.c
+ *
+ * @brief   This is the source file for mempool
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "mempool.h"
+#include "utility.h"
+
+mem_pool_t *mempool_init(mem_pool_t *pool, void *mem, int itemsize, int itemcount)
+{
+    if(!pool || !mem)
+		return (0);
+	
+	pool->free_list = (mem_block_t *)mem;
+
+	unsigned int block_size = (unsigned int)(MEMPOOL_ITEMSIZE_2_BLOCKSIZE(itemsize));
+	mem_block_t *tmp = (mem_block_t *)mem;
+	int i;
+	for(i = 0; i < itemcount - 1; ++i){
+		tmp = tmp->next_block = (mem_block_t *)(((unsigned int)tmp) + block_size);
+	}
+	tmp->next_block = 0;
+	return pool;
+}
+
+mem_block_t *mempool_header(char *pd)
+{
+	return (mem_block_t *)(pd - OFFSETOF(mem_block_t, data));
+}
+
+void *mempool_alloc(mem_pool_t *pool)
+{
+	if(!pool->free_list)
+		return 0;
+
+	mem_block_t *tmp = pool->free_list;
+	pool->free_list = tmp->next_block;
+	return &tmp->data;
+}
+
+void mempool_free(mem_pool_t *pool, void *p)
+{
+	mem_block_t *tmp = mempool_header((char *)p);
+	tmp->next_block = pool->free_list;
+	pool->free_list = tmp;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.h
new file mode 100644
index 00000000..e08cdd0a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/mempool.h
@@ -0,0 +1,50 @@
+/********************************************************************************************************
+ * @file    mempool.h
+ *
+ * @brief   This is the header file for mempool
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+typedef struct mem_block_t{
+	struct mem_block_t	*next_block;
+    char        		data[4];		// must 4 or 8 aligned, padding
+}mem_block_t;
+
+typedef struct mem_pool_t{
+    mem_block_t	*free_list;
+}mem_pool_t;
+
+#define MEMPOOL_ALIGNMENT 	4
+#define MEMPOOL_ITEMSIZE_2_BLOCKSIZE(s)		((s + (MEMPOOL_ALIGNMENT - 1)) & ~(MEMPOOL_ALIGNMENT-1))
+
+#define MEMPOOL_DECLARE(pool_name, pool_mem, itemsize, itemcount)	\
+	mem_pool_t pool_name;											\
+	u8 pool_mem[MEMPOOL_ITEMSIZE_2_BLOCKSIZE(itemsize) * itemcount] _attribute_aligned_(4);
+
+mem_pool_t *mempool_init(mem_pool_t *pool, void *mem, int itemsize, int itemcount);
+void *mempool_alloc(mem_pool_t *pool);
+void mempool_free(mem_pool_t *pool, void *p);
+mem_block_t* mempool_header(char *pd);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/static_assert.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/static_assert.h
new file mode 100644
index 00000000..30869994
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/static_assert.h
@@ -0,0 +1,44 @@
+/********************************************************************************************************
+ * @file    static_assert.h
+ *
+ * @brief   This is the header file for static_assert
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+// static assertion. evaluate at compile time. It is very useful like,  STATIC_ASSERT(sizeof(a) == 5);
+
+// #define STATIC_ASSERT(expr)   			{ char static_assertion[(expr) ? 1 : -1]; ((void) static_assertion); }	// (void) array;  to remove compiler unused variable warning
+
+// more complicated version canbe used anywhere in the source
+#define STATIC_ASSERT_M(COND,MSG) typedef char static_assertion_##MSG[(!!(COND))*2-1] 
+// token pasting madness: 
+#define STATIC_ASSERT3(X,L) 	STATIC_ASSERT_M(X,static_assertion_at_line_##L) 
+#define STATIC_ASSERT2(X,L) 	STATIC_ASSERT3(X,L) 
+
+#define STATIC_ASSERT(X)    	STATIC_ASSERT2(X,__LINE__) 
+
+#define STATIC_ASSERT_POW2(expr)		STATIC_ASSERT(!((expr) & ((expr)-1)))					//  assert  expr  is  2**N
+#define STATIC_ASSERT_EVEN(expr)		STATIC_ASSERT(!((expr) & 1))
+#define STATIC_ASSERT_ODD(expr)			STATIC_ASSERT(((expr) & 1))
+#define STATIC_ASSERT_INT_DIV(a, b) 	STATIC_ASSERT((a) / (b) * (b) == (a))
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.c
new file mode 100644
index 00000000..5b202e9f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.c
@@ -0,0 +1,295 @@
+/********************************************************************************************************
+ * @file    string.c
+ *
+ * @brief   This is the source file for string
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "types.h"
+#include "string.h"
+#include "assert.h"
+#include "../os/ev_buffer.h"
+#include "../os/ev.h"
+
+char *strcpy(char *dst0, const char *src0){
+	char *s = dst0;
+	while((*dst0++ = *src0++));
+	return s;
+}
+
+char *strchr(const char *s, int c){
+	do{
+		if(*s == c){
+			return (char *)s;
+		}
+	}while(*s++);
+
+	return (0);
+}
+
+int memcmp(const void * m1, const void *m2, unsigned int n){
+	unsigned char *s1 = (unsigned char *)m1;
+	unsigned char *s2 = (unsigned char *)m2;
+
+	while(n--){
+		if(*s1 != *s2){
+			return *s1 - *s2;
+		}
+		s1++;
+		s2++;
+	}
+	return 0;
+}
+
+void *memchr(register const void *src_void, int c, unsigned int length){
+	const unsigned char *src = (const unsigned char *)src_void;
+
+	while(length-- > 0){
+		if(*src == c)
+			return (void *)src;
+		src++;
+	}
+	return NULL;
+}
+
+void *memmove(void *dest, const void *src, unsigned int n){
+	char *d = (char *)dest;
+	char *s = (char *)src;
+
+	if(d < s){
+		while(n--)
+			*d++ = *s++;
+	}else{
+		d = d + (n - 1);
+		s = s + (n - 1);
+
+		while(n--)
+			*d-- = *s--;
+	}
+
+	return dest;
+}
+
+void bcopy(register char *src, register char *dest, int len){
+	char *s = (char *)src;
+	char *d = (char *)dest;
+
+	if(d < s){
+		while(len--)
+			*d++ = *s++;
+	}else{
+		s = s + (len - 1);
+		d = d + (len - 1);
+
+		while(len--)
+			*d-- = *s--;
+	}
+}
+
+
+
+#if 1
+void *memset(void *dest, int val, unsigned int len){
+	if(dest == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+		return NULL;
+	}
+    if(is_ev_buf(dest) && (len > LARGE_BUFFER)){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    	return NULL;
+    }
+
+	register unsigned char *ptr = (unsigned char *)dest;
+	while(len-- > 0)
+		*ptr++ = (unsigned char)val;
+	return dest;
+}
+
+void *memcpy(void *out, const void *in, unsigned int length){
+	if(length == 0){
+		return NULL;
+	}
+	if(out == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+		return NULL;
+	}
+	if(in == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+		return NULL;
+	}
+    if(is_ev_buf(out) && (length > LARGE_BUFFER)){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    	return NULL;
+    }
+
+	bcopy((char *)in, (char *)out, (int)length);
+	return out;
+}
+#else
+volatile unsigned int AAtestLine0 = 0;
+void *mymemset(void *dest, int val, unsigned int len, unsigned int line){
+	AAtestLine0 = line;
+
+	if(dest == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+	}
+
+    if(is_ev_buf(dest) && (len > LARGE_BUFFER)){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    }
+
+    if(is_zb_buf(dest) && (len > ZB_BUF_SIZE)){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    }
+
+	register unsigned char *ptr = (unsigned char *)dest;
+	while(len-- > 0)
+		*ptr++ = (unsigned char)val;
+	return dest;
+}
+
+volatile unsigned int AAtestLine = 0;
+void *mymemcpy(void *out, const void *in, unsigned int length, unsigned int line){
+	AAtestLine = line;
+
+	if(length == 0){
+		return NULL;
+	}
+
+	if(out == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+	}
+
+	if(in == NULL){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+	}
+
+    if(is_ev_buf(out) && (length > LARGE_BUFFER)){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    }
+
+    if(is_zb_buf(out) && (length > ZB_BUF_SIZE) && (length != (ZB_BUF_SIZE + sizeof(zb_buf_hdr_t) - 1))){
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_MEM_ACCESS);
+    }
+
+	bcopy((char *)in, (char *)out, (int)length);
+	return out;
+}
+#endif
+
+// for performance, assume length % 4 == 0,  and no memory overlapped
+void memcpy4(void *d, const void *s, unsigned int length){
+	int *dst = (int *)d;
+	int *src = (int *)s;
+	assert((((int)dst) >> 2) << 2 == ((int)dst));			// address must alighn to 4
+	assert((((int)src) >> 2) << 2 == ((int)src));			// address must alighn to 4
+	assert((length >> 2) << 2 == length);					// length % 4 == 0
+	assert(( ((char *)dst) + length <= (const char *)src) || (((const char *)src) + length <= (char *)dst));	//  no overlapped
+	unsigned int len = length >> 2;
+	while(len --){
+		*dst++ = *src++;
+	}
+}
+
+unsigned int strlen(const char *str){
+	unsigned int len = 0;
+
+	if(str != NULL){
+		while(*str++){
+			len++;
+		}
+	}
+
+	return len;
+}
+
+int strcmp(const char *firstString, const char *secondString){
+	while(*firstString == *secondString){
+		if(*firstString == '\0'){
+			return 0;
+		}
+		++firstString;
+		++secondString;
+	}
+	if(((unsigned char)*firstString - (unsigned char)*secondString) < 0){
+		return -1;
+	}
+	return 1;
+}
+
+char *strncpy(char *s, const char *t, unsigned int n){
+	char *p = s;
+	unsigned int i = 0;
+
+	if(!s)
+		return s;
+
+	while(t && i < n){
+		*s++ = *t++;
+		i++;
+	}
+
+	if(!t){
+		do{
+			*s++ = '\0';
+		}while (i++ < n);
+	}
+	return p;
+}
+
+int ismemzero4(void *data, unsigned int len){
+	int *p = (int *)data;
+	len = len >> 2;
+	for(int i = 0; i < len; ++i){
+		if(*p){
+			return 0;
+		}
+		++p;
+	}
+	return 1;
+}
+
+int ismemf4(void *data, unsigned int len){
+	int *p = (int *)data;
+	len = len >> 2;
+	for(int i = 0; i < len; ++i){
+		if(*p != 0xffffffff){
+			return 0;
+		}
+		++p;
+	}
+	return 1;
+}
+
+void *memset4(void *dest, int val, unsigned int len){
+	int *p = (int *)dest;
+	len = len >> 2;
+	for(int i = 0; i < len; ++i){
+		*p++ = val;
+	}
+	return dest;
+}
+
+void zeromem4(void *data, unsigned int len){
+	memset4(data, 0, len);
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.h
new file mode 100644
index 00000000..c56425bf
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/string.h
@@ -0,0 +1,72 @@
+/********************************************************************************************************
+ * @file    string.h
+ *
+ * @brief   This is the header file for string
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#ifndef NULL
+#define NULL  0
+#endif
+
+void *memmove(void *dest, const void *src, unsigned int n);
+#if 1
+void *memset(void *d, int c, unsigned int n);
+void *memcpy(void *des_ptr, const void *src_ptr, unsigned int);
+#else
+void *mymemset(void *d, int c, unsigned int n,unsigned int);
+void *mymemcpy(void *des_ptr, const void *src_ptr, unsigned int, unsigned int);
+#define	memcpy(x,y,z)			mymemcpy(x,y,z,__LINE__)
+#define	memset(x,y,z)			mymemset(x,y,z,__LINE__)
+#endif
+
+// do not return void*,  otherwise, we must use a variable to store the dest porinter, that is not performance 
+void memcpy4(void *dest, const void *src, unsigned int);
+void *memchr(const void *_s, int _c, unsigned int _n);
+int	memcmp(const void *_s1, const void *_s2, unsigned int _n);
+
+char *strcat(char *_s1, const char *_s2);
+char *strchr(const char *_s, int _c);
+int	strcmp(const char *_s1, const char *_s2);
+int	strcoll(const char *_s1, const char *_s2);
+char *strcpy(char *_s1, const char *_s2);
+unsigned int strcspn(const char *_s1, const char *_s2);
+char *strerror(int _errcode);
+unsigned int strlen(const char *_s);
+char *strncat(char *_s1, const char *_s2, unsigned int _n);
+int	strncmp(const char *_s1, const char *_s2, unsigned int _n);
+char *strncpy(char *_s1, const char *_s2, unsigned int _n);
+char *strpbrk(const char *_s1, const char *_s2);
+char *strrchr(const char *_s, int _c);
+unsigned int strspn(const char *_s1, const char *_s2);
+char *strstr(const char *_s1, const char *_s2);
+char *strtok(char *_s1, const char *_s2);
+unsigned int strxfrm(char *_s1, const char *_s2, unsigned int _n);
+char *strchr(register const char *s, int c);
+void *memchr(register const void *src_void, int c, unsigned int length);
+int ismemzero4(void *data, unsigned int len);
+int ismemf4(void *data, unsigned int len);
+void *memset4(void *dest, int val, unsigned int len);
+void zeromem4(void *data, unsigned int len);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.c
new file mode 100644
index 00000000..7a42d73f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.c
@@ -0,0 +1,177 @@
+#include <stdarg.h>
+
+extern int putchar_custom(int c);
+static void printchar(char **str, int c) {
+	if (str) {
+		**str = c;
+		++(*str);
+	} else
+		(void) putchar_custom(c);
+}
+
+#define PAD_RIGHT 1
+#define PAD_ZERO 2
+
+static int prints(char **out, const char *string, int width, int pad) {
+	register int pc = 0, padchar = ' ';
+
+	if (width > 0) {
+		register int len = 0;
+		register const char *ptr;
+		for (ptr = string; *ptr; ++ptr)
+			++len;
+		if (len >= width)
+			width = 0;
+		else
+			width -= len;
+		if (pad & PAD_ZERO)
+			padchar = '0';
+	}
+	if (!(pad & PAD_RIGHT)) {
+		for (; width > 0; --width) {
+			printchar(out, padchar);
+			++pc;
+		}
+	}
+	for (; *string; ++string) {
+		printchar(out, *string);
+		++pc;
+	}
+	for (; width > 0; --width) {
+		printchar(out, padchar);
+		++pc;
+	}
+
+	return pc;
+}
+
+/* the following should be enough for 32 bit int */
+#define PRINT_BUF_LEN 12
+
+static int printi(char **out, int i, int b, int sg, int width, int pad,
+		int letbase) {
+	char print_buf[PRINT_BUF_LEN];
+	register char *s;
+	register int t, neg = 0, pc = 0;
+	register unsigned int u = i;
+
+	if (i == 0) {
+		print_buf[0] = '0';
+		print_buf[1] = '\0';
+		return prints(out, print_buf, width, pad);
+	}
+
+	if (sg && b == 10 && i < 0) {
+		neg = 1;
+		u = -i;
+	}
+
+	s = print_buf + PRINT_BUF_LEN - 1;
+	*s = '\0';
+
+	while (u) {
+		t = u % b;
+		if (t >= 10)
+			t += letbase - '0' - 10;
+		*--s = t + '0';
+		u /= b;
+	}
+
+	if (neg) {
+		if (width && (pad & PAD_ZERO)) {
+			printchar(out, '-');
+			++pc;
+			--width;
+		} else {
+			*--s = '-';
+		}
+	}
+
+	return pc + prints(out, s, width, pad);
+}
+
+static int print(char **out, const char *format, va_list args) {
+	register int width, pad;
+	register int pc = 0;
+	char scr[2];
+
+	for (; *format != 0; ++format) {
+		if (*format == '%') {
+			++format;
+			width = pad = 0;
+			if (*format == '\0')
+				break;
+			if (*format == '%')
+				goto out;
+			if (*format == '-') {
+				++format;
+				pad = PAD_RIGHT;
+			}
+			while (*format == '0') {
+				++format;
+				pad |= PAD_ZERO;
+			}
+			for (; *format >= '0' && *format <= '9'; ++format) {
+				width *= 10;
+				width += *format - '0';
+			}
+			if (*format == 's') {
+				register char *s = (char *) va_arg( args, int );
+				pc += prints(out, s ? s : "(null)", width, pad);
+				continue;
+			}
+			if (*format == 'd') {
+				pc += printi(out, va_arg( args, int ), 10, 1, width, pad, 'a');
+				continue;
+			}
+			if (*format == 'x') {
+				pc += printi(out, va_arg( args, int ), 16, 0, width, pad, 'a');
+				continue;
+			}
+			if (*format == 'X') {
+				pc += printi(out, va_arg( args, int ), 16, 0, width, pad, 'A');
+				continue;
+			}
+			if (*format == 'u') {
+				pc += printi(out, va_arg( args, int ), 10, 0, width, pad, 'a');
+				continue;
+			}
+			if (*format == 'c') {
+				/* char are converted to int then pushed on the stack */
+				scr[0] = (char) va_arg( args, int );
+				scr[1] = '\0';
+				pc += prints(out, scr, width, pad);
+				continue;
+			}
+		} else {
+			out: printchar(out, *format);
+			++pc;
+		}
+	}
+	if (out)
+		**out = '\0';
+	va_end( args );
+	return pc;
+}
+
+//extern void puts(const char* str);
+int u_printf(const char *format, ...) {	
+	va_list args;
+	va_start(args, format );
+	print(0, format, args);
+	return 0;
+}
+
+int u_sprintf(char *out, const char *format, ...) {
+	va_list args;
+	va_start( args, format );
+	return print(&out, format, args);
+}
+
+void u_array_printf(unsigned char*data, unsigned int len) {
+	u_printf("{");
+	for(int i = 0; i < len; ++i){
+		u_printf("%X%s", data[i], i<(len)-1? ":":" ");
+	}
+	u_printf("}\n");
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.h
new file mode 100644
index 00000000..e9af10bd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/tlPrintf.h
@@ -0,0 +1,9 @@
+#pragma once
+
+int  u_printf(const char *fmt, ...);
+int  u_sprintf(char* s, const char *fmt, ...);
+void u_array_printf(unsigned char*data, unsigned int len);
+
+#define printf	 		u_printf
+#define sprintf	 		u_sprintf
+#define array_printf	u_array_printf
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/types.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/types.h
new file mode 100644
index 00000000..4a4794c4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/types.h
@@ -0,0 +1,200 @@
+/********************************************************************************************************
+ * @file    types.h
+ *
+ * @brief   This is the header file for types
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#if 0
+typedef signed char int8_t;
+typedef unsigned char uint8_t;
+
+typedef signed short int16_t;
+typedef unsigned short uint16_t;
+
+typedef signed int int32_t;
+typedef unsigned int uint32_t;
+
+typedef int16_t coffee_page_t;
+#endif
+
+typedef unsigned char u8;
+typedef signed char s8;
+
+typedef unsigned short u16;
+typedef signed short s16;
+
+typedef unsigned int u32;
+typedef signed int s32;
+
+
+typedef long long s64;
+typedef unsigned long long u64;
+
+typedef void (*fn_ptr)(u8*);
+
+typedef u32  u24;
+typedef s32	 s24;
+
+// Generic Status return
+typedef u8 status_t;
+typedef u32 UTCTime;
+
+typedef u32 arg_t;
+
+enum {
+  ZB_FALSE = 0,
+  ZB_TRUE = 1
+};
+
+typedef u8 cId_t;
+
+/**
+ *  @brief Type definition for extended address
+ */
+typedef u8 addrExt_t[8];
+typedef u8 extPANId_t[8];
+
+typedef addrExt_t extAddr_t;
+
+typedef union {
+	u16  shortAddr;
+	addrExt_t extAddr;
+}tl_zb_addr_t;
+
+typedef union {
+	u32	srcId;
+	addrExt_t gpdIeeeAddr;
+}gpdId_t;
+
+/**
+ *  @brief Type definition for combined short/extended device address
+ */
+typedef struct {
+    union {
+        u16         shortAddr;         //!< Short address
+        addrExt_t   extAddr;           //!< Extended address
+    } addr;
+    u8  addrMode;                      //!< Address mode
+} addr_t;
+
+typedef struct {
+	u16 id;
+    u8  mode;                      //!< Address mode
+} pan_id_t;
+
+#ifdef WIN32
+#ifndef FALSE
+#define FALSE	0
+#endif
+#ifndef TRUE
+#define TRUE	1
+#endif
+
+#define PACK_1
+#define CODE
+#define __no_init
+#define GENERIC
+
+#define NULL_OK
+#define INP
+#define OUTP
+#define UNUSED
+#define ONLY
+#define READONLY
+#define SHARED
+#define KEEP
+#endif
+
+#ifndef NULL
+#define NULL	0
+#endif
+
+#ifndef __cplusplus
+
+#ifndef FALSE
+#define FALSE 	0
+#endif
+#ifndef TRUE
+#define TRUE 	(!FALSE)
+#endif
+
+#ifndef bool
+#define bool	u8
+#endif
+
+#ifndef false
+#define false	FALSE
+#endif
+
+#ifndef true
+#define true	TRUE
+#endif
+
+
+#elif defined WIN32
+
+#ifndef FALSE
+#define FALSE	0
+#endif
+#ifndef TRUE
+#define TRUE	1
+#endif
+
+#endif
+
+// There is no way to directly recognise whether a typedef is defined
+// http://stackoverflow.com/questions/3517174/how-to-check-if-a-datatype-is-defined-with-typedef
+#ifdef __GNUC__
+typedef	u16	wchar_t;		
+#endif
+
+#ifndef WIN32
+//typedef u32 size_t;
+#endif
+
+#define U32_MAX ((u32)0xffffffff)
+#define U16_MAX ((u16)0xffff)
+#define U8_MAX  ((u8)0xff)
+#define U31_MAX ((u32)0x7fffffff)
+#define U15_MAX ((u16)0x7fff)
+#define U7_MAX  ((u8)0x7f)
+
+
+/*** Generic Status Return Values ***/
+#define SUCCESS                   0x00
+#define FAILURE                   0x01
+#define INVALIDPARAMETER          0x02
+#define INVALID_TASK              0x03
+#define MSG_BUFFER_NOT_AVAIL      0x04
+#define INVALID_MSG_POINTER       0x05
+#define INVALID_EVENT_ID          0x06
+#define INVALID_INTERRUPT_ID      0x07
+#define NO_TIMER_AVAIL            0x08
+#define NV_ITEM_UNINIT            0x09
+#define NV_OPER_FAILED            0x0A
+#define INVALID_MEM_SIZE          0x0B
+#define NV_BAD_ITEM_LEN           0x0C
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.c
new file mode 100644
index 00000000..686bc127
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.c
@@ -0,0 +1,92 @@
+/********************************************************************************************************
+ * @file    utility.c
+ *
+ * @brief   This is the source file for utility
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "utility.h"
+
+static const unsigned int crc32_table[] = {
+    0x00000000L, 0x77073096L, 0xEE0E612CL, 0x990951BAL, 0x076DC419L,
+    0x706AF48FL, 0xE963A535L, 0x9E6495A3L, 0x0EDB8832L, 0x79DCB8A4L,
+    0xE0D5E91EL, 0x97D2D988L, 0x09B64C2BL, 0x7EB17CBDL, 0xE7B82D07L,
+    0x90BF1D91L, 0x1DB71064L, 0x6AB020F2L, 0xF3B97148L, 0x84BE41DEL,
+    0x1ADAD47DL, 0x6DDDE4EBL, 0xF4D4B551L, 0x83D385C7L, 0x136C9856L,
+    0x646BA8C0L, 0xFD62F97AL, 0x8A65C9ECL, 0x14015C4FL, 0x63066CD9L,
+    0xFA0F3D63L, 0x8D080DF5L, 0x3B6E20C8L, 0x4C69105EL, 0xD56041E4L,
+    0xA2677172L, 0x3C03E4D1L, 0x4B04D447L, 0xD20D85FDL, 0xA50AB56BL,
+    0x35B5A8FAL, 0x42B2986CL, 0xDBBBC9D6L, 0xACBCF940L, 0x32D86CE3L,
+    0x45DF5C75L, 0xDCD60DCFL, 0xABD13D59L, 0x26D930ACL, 0x51DE003AL,
+    0xC8D75180L, 0xBFD06116L, 0x21B4F4B5L, 0x56B3C423L, 0xCFBA9599L,
+    0xB8BDA50FL, 0x2802B89EL, 0x5F058808L, 0xC60CD9B2L, 0xB10BE924L,
+    0x2F6F7C87L, 0x58684C11L, 0xC1611DABL, 0xB6662D3DL, 0x76DC4190L,
+    0x01DB7106L, 0x98D220BCL, 0xEFD5102AL, 0x71B18589L, 0x06B6B51FL,
+    0x9FBFE4A5L, 0xE8B8D433L, 0x7807C9A2L, 0x0F00F934L, 0x9609A88EL,
+    0xE10E9818L, 0x7F6A0DBBL, 0x086D3D2DL, 0x91646C97L, 0xE6635C01L,
+    0x6B6B51F4L, 0x1C6C6162L, 0x856530D8L, 0xF262004EL, 0x6C0695EDL,
+    0x1B01A57BL, 0x8208F4C1L, 0xF50FC457L, 0x65B0D9C6L, 0x12B7E950L,
+    0x8BBEB8EAL, 0xFCB9887CL, 0x62DD1DDFL, 0x15DA2D49L, 0x8CD37CF3L,
+    0xFBD44C65L, 0x4DB26158L, 0x3AB551CEL, 0xA3BC0074L, 0xD4BB30E2L,
+    0x4ADFA541L, 0x3DD895D7L, 0xA4D1C46DL, 0xD3D6F4FBL, 0x4369E96AL,
+    0x346ED9FCL, 0xAD678846L, 0xDA60B8D0L, 0x44042D73L, 0x33031DE5L,
+    0xAA0A4C5FL, 0xDD0D7CC9L, 0x5005713CL, 0x270241AAL, 0xBE0B1010L,
+    0xC90C2086L, 0x5768B525L, 0x206F85B3L, 0xB966D409L, 0xCE61E49FL,
+    0x5EDEF90EL, 0x29D9C998L, 0xB0D09822L, 0xC7D7A8B4L, 0x59B33D17L,
+    0x2EB40D81L, 0xB7BD5C3BL, 0xC0BA6CADL, 0xEDB88320L, 0x9ABFB3B6L,
+    0x03B6E20CL, 0x74B1D29AL, 0xEAD54739L, 0x9DD277AFL, 0x04DB2615L,
+    0x73DC1683L, 0xE3630B12L, 0x94643B84L, 0x0D6D6A3EL, 0x7A6A5AA8L,
+    0xE40ECF0BL, 0x9309FF9DL, 0x0A00AE27L, 0x7D079EB1L, 0xF00F9344L,
+    0x8708A3D2L, 0x1E01F268L, 0x6906C2FEL, 0xF762575DL, 0x806567CBL,
+    0x196C3671L, 0x6E6B06E7L, 0xFED41B76L, 0x89D32BE0L, 0x10DA7A5AL,
+    0x67DD4ACCL, 0xF9B9DF6FL, 0x8EBEEFF9L, 0x17B7BE43L, 0x60B08ED5L,
+    0xD6D6A3E8L, 0xA1D1937EL, 0x38D8C2C4L, 0x4FDFF252L, 0xD1BB67F1L,
+    0xA6BC5767L, 0x3FB506DDL, 0x48B2364BL, 0xD80D2BDAL, 0xAF0A1B4CL,
+    0x36034AF6L, 0x41047A60L, 0xDF60EFC3L, 0xA867DF55L, 0x316E8EEFL,
+    0x4669BE79L, 0xCB61B38CL, 0xBC66831AL, 0x256FD2A0L, 0x5268E236L,
+    0xCC0C7795L, 0xBB0B4703L, 0x220216B9L, 0x5505262FL, 0xC5BA3BBEL,
+    0xB2BD0B28L, 0x2BB45A92L, 0x5CB36A04L, 0xC2D7FFA7L, 0xB5D0CF31L,
+    0x2CD99E8BL, 0x5BDEAE1DL, 0x9B64C2B0L, 0xEC63F226L, 0x756AA39CL,
+    0x026D930AL, 0x9C0906A9L, 0xEB0E363FL, 0x72076785L, 0x05005713L,
+    0x95BF4A82L, 0xE2B87A14L, 0x7BB12BAEL, 0x0CB61B38L, 0x92D28E9BL,
+    0xE5D5BE0DL, 0x7CDCEFB7L, 0x0BDBDF21L, 0x86D3D2D4L, 0xF1D4E242L,
+    0x68DDB3F8L, 0x1FDA836EL, 0x81BE16CDL, 0xF6B9265BL, 0x6FB077E1L,
+    0x18B74777L, 0x88085AE6L, 0xFF0F6A70L, 0x66063BCAL, 0x11010B5CL,
+    0x8F659EFFL, 0xF862AE69L, 0x616BFFD3L, 0x166CCF45L, 0xA00AE278L,
+    0xD70DD2EEL, 0x4E048354L, 0x3903B3C2L, 0xA7672661L, 0xD06016F7L,
+    0x4969474DL, 0x3E6E77DBL, 0xAED16A4AL, 0xD9D65ADCL, 0x40DF0B66L,
+    0x37D83BF0L, 0xA9BCAE53L, 0xDEBB9EC5L, 0x47B2CF7FL, 0x30B5FFE9L,
+    0xBDBDF21CL, 0xCABAC28AL, 0x53B39330L, 0x24B4A3A6L, 0xBAD03605L,
+    0xCDD70693L, 0x54DE5729L, 0x23D967BFL, 0xB3667A2EL, 0xC4614AB8L,
+    0x5D681B02L, 0x2A6F2B94L, 0xB40BBE37L, 0xC30C8EA1L, 0x5A05DF1BL,
+    0x2D02EF8DL
+};
+
+unsigned int xcrc32(const unsigned char *buf, int len, unsigned int init)
+{
+	unsigned int crc = init;
+	while (len--)
+    {
+      crc = (crc >> 8) ^ crc32_table[(crc ^ *buf) & 0xff];
+      buf++;
+    }
+	return crc;
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.h
new file mode 100644
index 00000000..f1bdbe68
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utility.h
@@ -0,0 +1,139 @@
+/********************************************************************************************************
+ * @file    utility.h
+ *
+ * @brief   This is the header file for utility
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+#define abs(a)   				(((a) > 0) ? ((a)) : (-(a)))
+#define absSub(a, b)  			((a) > (b) ? ((a)-(b)) : ((b)-(a)))
+
+#define cat2(i,j)       		i##j
+#define cat3(i,j,k)     		i##j##k
+
+#ifndef min
+#define min(a,b)				((a) < (b) ? (a) : (b))
+#endif
+#ifndef min2
+#define min2(a,b)				((a) < (b) ? (a) : (b))
+#endif
+#ifndef min3
+#define min3(a,b,c)				min2(min2(a, b), c)
+#endif
+#ifndef max2
+#define max2(a,b)				((a) > (b) ? (a): (b))
+#endif
+#ifndef max3
+#define max3(a,b,c)				max2(max2(a, b), c)
+#endif
+
+#define LENGTHOF(s, m)          (sizeof(((s*)0)->m))
+#define OFFSETOF(s, m)          ((unsigned int) &((s *)0)->m)
+#define ROUND_INT(x, r)         (((x) + (r) - 1) / (r) * (r))
+#define ROUND_TO_POW2(x, r)     (((x) + (r) - 1) & ~((r) - 1))
+
+//  direct memory access 
+#define U8_GET(addr)			(*(volatile unsigned char  *)(addr))
+#define U16_GET(addr)			(*(volatile unsigned short *)(addr))
+#define U32_GET(addr)			(*(volatile unsigned int  *)(addr))
+
+#define U8_SET(addr, v)			(*(volatile unsigned char  *)(addr) = (unsigned char)(v))
+#define U16_SET(addr, v)		(*(volatile unsigned short *)(addr) = (unsigned short)(v))
+#define U32_SET(addr, v)		(*(volatile unsigned int  *)(addr) = (v))
+
+#define U8_INC(addr)			U8_GET(addr) += 1
+#define U16_INC(addr)			U16_GET(addr) += 1
+#define U32_INC(addr)			U32_GET(addr) += 1
+
+#define U8_DEC(addr)			U8_GET(addr) -= 1
+#define U16_DEC(addr)			U16_GET(addr) -= 1
+#define U32_DEC(addr)			U32_GET(addr) -= 1
+
+#define U8_CPY(addr1,addr2)		U8_SET(addr1, U8_GET(addr2))
+#define U16_CPY(addr1,addr2)	U16_SET(addr1, U16_GET(addr2))
+#define U32_CPY(addr1,addr2)	U32_SET(addr1, U32_GET(addr2))
+
+#define BOUND(x, l, m)			((x) < (l) ? (l) : ((x) > (m) ? (m) : (x)))
+#define SET_BOUND(x, l, m)		((x) = BOUND(x, l, m))
+#define BOUND_INC(x, m)			do{++(x); (x) = (x) < (m) ? (x) : 0;} while(0)
+#define BOUND_INC_POW2(x, m)	do{								\
+									STATIC_ASSERT_POW2(m);		\
+									(x) = ((x)+1) & (m-1);		\
+								}while(0)
+
+#define IS_POWER_OF_2(x)		(!(x & (x-1)))
+#define IS_LITTLE_ENDIAN 		(*(unsigned short*)"\0\xff" > 0x100) 
+
+#define IMPLIES(x, y) 			(!(x) || (y))
+
+// x > y ? 1 : (x ==y : 0 ? -1)
+#define COMPARE(x, y) 			(((x) > (y)) - ((x) < (y)))
+#define SIGN(x) 				COMPARE(x, 0)
+
+// better than xor swap:  http://stackoverflow.com/questions/3912699/why-swap-with-xor-works-fine-in-c-but-in-java-doesn't-some-puzzle
+#define SWAP(x, y, T) 			do { T tmp = (x); (x) = (y); (y) = tmp; } while(0)
+#define SORT2(a, b, T) 			do { if ((a) > (b)) SWAP((a), (b), T); } while (0)
+
+#define foreach(i, n) 			for(int i = 0; i < (n); ++i)
+#define foreach_range(i, s, e) 	for(int i = (s); i < (e); ++i)
+#define foreach_arr(i, arr) 	for(int i = 0; i < ARRAY_SIZE(arr); ++i)
+//  round robbin foreach
+#define foreach_hint(i, n, h) 	for(int i = 0, ++h, h=h<n?h:0; i < n; ++h, h=h<n?h:0)
+
+#define ARRAY_SIZE(a) 			(sizeof(a) / sizeof(*a))
+
+#define everyN(i, n) 			++(i); (i)=((i) < N ? (i) : 0); if(0 == (i))
+
+
+#define HI_UINT16(a) 			(((a) >> 8) & 0xFF)
+#define LO_UINT16(a) 			((a) & 0xFF)
+
+#define U24_BYTE0(a) 			((a) & 0xFF)
+#define U24_BYTE1(a) 			(((a) >> 8) & 0xFF)
+#define U24_BYTE2(a) 			(((a) >> 16) & 0xFF)
+
+#define U32_BYTE0(a) 			((a) & 0xFF)
+#define U32_BYTE1(a) 			(((a) >> 8) & 0xFF)
+#define U32_BYTE2(a) 			(((a) >> 16) & 0xFF)
+#define U32_BYTE3(a) 			(((a) >> 24) & 0xFF)
+
+#define BUILD_U16(lo, hi)			( (unsigned short)((((hi) & 0x00FF) << 8) + ((lo) & 0x00FF)) )
+#define BUILD_U24(b0, b1, b2)		( (unsigned int)((((b2) & 0x000000FF) << 16) + (((b1) & 0x000000FF) << 8) + ((b0) & 0x000000FF)) )
+#define BUILD_U32(b0, b1, b2, b3)	( (unsigned int)((((b3) & 0x000000FF) << 24) + (((b2) & 0x000000FF) << 16) + (((b1) & 0x000000FF) << 8) + ((b0) & 0x000000FF)) )
+
+#define BUILD_S16(lo, hi)			( (signed short)((((hi) & 0x00FF) << 8) + ((lo) & 0x00FF)) )
+#define BUILD_S24(b0, b1, b2)		( (signed int)((((b2) & 0x000000FF) << 16) + (((b1) & 0x000000FF) << 8) + ((b0) & 0x000000FF)) )
+#define BUILD_S32(b0, b1, b2, b3)	( (signed int)((((b3) & 0x000000FF) << 24) + (((b2) & 0x000000FF) << 16) + (((b1) & 0x000000FF) << 8) + ((b0) & 0x000000FF)) )
+
+
+#define HASH_MAGIC_VAL 			5381u
+#define INT_MASK      			0x7fffffff
+
+/* TODO: check is this hash optimal for ints */
+#define HASH_FUNC_STEP(hash_var, v) 		((((hash_var) << 5) + (hash_var)) + (v))
+#define FOUR_INT_HASH_FUNC(v1, v2, v3, v4) 	(HASH_FUNC_STEP(HASH_FUNC_STEP( HASH_FUNC_STEP( HASH_FUNC_STEP(HASH_MAGIC_VAL, (v1)), (v2)), (v3)), (v4)) & INT_MASK)
+#define TWO_INT_HASH_FUNC(v1, v2)      		(HASH_FUNC_STEP(HASH_FUNC_STEP(HASH_MAGIC_VAL, (v1)), (v2)) & INT_MASK)
+
+extern unsigned int xcrc32(const unsigned char *buf, int len, unsigned int init);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utlist.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utlist.h
new file mode 100644
index 00000000..c2db75f5
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/common/utlist.h
@@ -0,0 +1,63 @@
+/********************************************************************************************************
+ * @file    utlist.h
+ *
+ * @brief   This is the header file for utlist
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#ifndef UTLIST_H
+#define UTLIST_H
+
+#define LIST_ADD(head, ele)							do{ \
+														(ele)->next = head;         							\
+														head = ele;                 							\
+													}while(0)
+
+
+#define LIST_DELETE(head, ele)						do{ \
+														__typeof(head) lst;                                 	\
+														if ((head) == (ele)) {                              	\
+															(head) = (head)->next;                          	\
+														} else {                                            	\
+															lst = head;                                     	\
+															while (lst->next && (lst->next != (ele))) {     	\
+																lst = lst->next;                            	\
+															}                                               	\
+															if (lst->next) {                                	\
+																lst->next = ((ele)->next);                  	\
+															}                                               	\
+														}                                                   	\
+													}while(0)
+
+
+
+
+#define LIST_EXIST(head, ele, result) 				do{	\
+														for(result = head; result; result = (result)->next){	\
+															if(result == ele){									\
+																break;											\
+															}													\
+														} 			       						 				\
+													}while(0)
+
+
+#endif /* UTLIST_H */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.c
new file mode 100644
index 00000000..90bd4490
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.c
@@ -0,0 +1,178 @@
+/********************************************************************************************************
+ * @file    drv_adc.c
+ *
+ * @brief   This is the source file for drv_adc
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if	defined(MCU_CORE_826x)
+	#define ADC_VALUE_GET_WITH_BASE_MODE(v)		(3300 * (v - 128)/(16384 - 256))//Vref(mV) * (v - 128)/(2^14 - 2^8)
+	#define ADC_VALUE_GET_WITH_VBAT_MODE(v)		(3*(1428*(v - 128)/(16384 - 256)))
+#elif defined(MCU_CORE_B91)
+	#define ADC_DMA_CHN							DMA7
+	#define ADC_SAMPLE_NUM						8
+#endif
+
+#if defined(MCU_CORE_B91)
+/**
+ * @brief This function serves to get adc sample code by dma and convert to voltage value.
+ * @return 		adc_vol_mv_average 	- the average value of adc voltage value.
+ */
+static u16 adc_get_voltage_dma(void)
+{
+	u16 adc_sample_buffer[ADC_SAMPLE_NUM] = {0};
+	u16 adc_code_average = 0;
+
+	adc_get_code_dma(adc_sample_buffer, ADC_SAMPLE_NUM);
+
+	/* insert sort and get average value */
+	u16 temp = 0;
+	s8 i, j;
+	for(i = 1; i < ADC_SAMPLE_NUM; i++){
+		if(adc_sample_buffer[i] < adc_sample_buffer[i - 1]){
+			temp = adc_sample_buffer[i];
+			adc_sample_buffer[i] = adc_sample_buffer[i - 1];
+			for(j = i - 1; j >= 0 && adc_sample_buffer[j] > temp; j--){
+				adc_sample_buffer[j + 1] = adc_sample_buffer[j];
+			}
+			adc_sample_buffer[j + 1] = temp;
+		}
+	}
+	/* get average value from raw data(abandon 1/4 small and 1/4 big data) */
+	for(i = ADC_SAMPLE_NUM >> 2; i < (ADC_SAMPLE_NUM - (ADC_SAMPLE_NUM >> 2)); i++){
+		adc_code_average += adc_sample_buffer[i] / (ADC_SAMPLE_NUM >> 1);
+	}
+
+	return adc_calculate_voltage(adc_code_average);
+}
+#endif
+
+/****
+* brief: ADC initiate function
+* param[in] null
+*
+* @return	  1: set success ;
+*             0: set error
+*/
+bool drv_adc_init(void)
+{
+#if	defined(MCU_CORE_826x)
+	ADC_Init();
+	AUDIO2ADC();
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	adc_init();
+#elif defined(MCU_CORE_B91)
+	adc_set_dma_config(ADC_DMA_CHN);
+#endif
+	return TRUE;
+}
+
+/****
+* brief: get the sample data
+* param[in] null
+* @return,the result
+*/
+u16 drv_get_adc_data(void)
+{
+#if defined(MCU_CORE_826x)
+	u32 tmpSum = 0;
+	for(u8 i = 0; i < 8; i++){
+		tmpSum += ADC_SampleValueGet();
+	}
+	tmpSum /= 8;
+	if(tmpSum < 128){
+		tmpSum = 128;
+	}
+	return (u16)ADC_VALUE_GET_WITH_VBAT_MODE(tmpSum);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	return (u16)adc_sample_and_get_result();
+#elif defined(MCU_CORE_B91)
+	return adc_get_voltage_dma();
+#endif
+}
+
+/****
+* brief: Set ADC mode and pin
+* param[in] mode, base or vbat mode
+* param[in] pin, the pin number
+* @return
+*/
+#if defined(MCU_CORE_826x)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, ADC_InputPTypeDef pin)
+{
+	if(mode == DRV_ADC_BASE_MODE){
+		ADC_ParamSetting(pin, SINGLEEND, RV_AVDD, RES14, S_3);
+	}else if(mode == DRV_ADC_VBAT_MODE){
+		ADC_BatteryCheckInit(Battery_Chn_VCC);
+	}
+}
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, GPIO_PinTypeDef pin)
+{
+	if(mode == DRV_ADC_BASE_MODE){
+		adc_base_init(pin);
+	}else if(mode == DRV_ADC_VBAT_MODE){
+		adc_vbat_init(pin);
+	}
+}
+#elif defined(MCU_CORE_B91)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, adc_input_pin_def_e pin)
+{
+	if(mode == DRV_ADC_BASE_MODE){
+		adc_gpio_sample_init(pin, ADC_VREF_1P2V, ADC_PRESCALE_1F4, ADC_SAMPLE_FREQ_96K);
+	}else if(mode == DRV_ADC_VBAT_MODE){
+		/* The battery voltage sample range is 1.8~3.5V,
+		 * and must set sys_init() function with the mode for battery voltage less than 3.6V.
+		 * For battery voltage > 3.6V, should take some external voltage divider.
+		 */
+		(void)pin;
+		adc_battery_voltage_sample_init();
+	}
+}
+#endif
+
+/**
+ * @brief      This function sets sar_adc power.
+ * @param[in]  enable enable=1 : power on. enable=0: power off.
+ * @return     none
+ */
+void drv_adc_enable(bool enable)
+{
+#if defined(MCU_CORE_826x)
+	if(enable){
+		EN_ADCCLK;
+	}else{
+		DIS_ADCCLK;
+	}
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	adc_power_on_sar_adc((unsigned char)enable);
+#elif defined(MCU_CORE_B91)
+	if(enable){
+		adc_power_on();
+	}else{
+		adc_power_off();
+	}
+#endif
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.h
new file mode 100644
index 00000000..dd9d5b34
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_adc.h
@@ -0,0 +1,71 @@
+/********************************************************************************************************
+ * @file    drv_adc.h
+ *
+ * @brief   This is the header file for drv_adc
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+typedef enum{
+	DRV_ADC_BASE_MODE,
+	DRV_ADC_VBAT_MODE,
+}drv_adc_mode_t;
+
+/****
+* brief: ADC initiate function
+* param[in] null
+*
+* @return	  1: set success ;
+*             0: set error
+*/
+bool drv_adc_init(void);
+
+/****
+* brief: get the sample data
+* param[in] null
+* @return,the result
+*/
+u16 drv_get_adc_data(void);
+
+/****
+* brief: set ADC test mode and pin
+* param[in]
+* @return
+*/
+#if defined (MCU_CORE_826x)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, ADC_InputPTypeDef pin);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, GPIO_PinTypeDef pin);
+#elif defined(MCU_CORE_B91)
+void drv_adc_mode_pin_set(drv_adc_mode_t mode, adc_input_pin_def_e pin);
+#endif
+
+/****
+* brief: start/stop ADC
+* param[in] TRUE/FALSE
+* @return
+*/
+void drv_adc_enable(bool enable);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.c
new file mode 100644
index 00000000..79436bfe
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.c
@@ -0,0 +1,126 @@
+/********************************************************************************************************
+ * @file    drv_calibration.c
+ *
+ * @brief   This is the source file for drv_calibration
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if defined(MCU_CORE_8258) || defined(MCU_CORE_8278) || defined(MCU_CORE_B91)
+static void drv_calib_adc_verf(void)
+{
+	u8 adc_vref_calib_value[7] = {0};
+	u16 gpio_calib_vref = 0;
+	s8 gpio_calib_vref_offset = 0;
+
+	flash_read(CFG_ADC_CALIBRATION, 7, adc_vref_calib_value);
+
+#if defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	//Check the two-point gpio calibration value whether is exist
+	if((adc_vref_calib_value[4] != 0xff) &&
+	   (adc_vref_calib_value[4] <= 0x7f) &&
+	   (adc_vref_calib_value[5] != 0xff) &&
+	   (adc_vref_calib_value[6] != 0xff)){
+		/****** Method of calculating two-point gpio calibration Flash_gain and Flash_offset value: ********/
+		/****** Vref = [(Seven_Byte << 8) + Six_Byte + 1000]mv ********/
+		/****** offset = [Five_Byte - 20] mv. ********/
+		gpio_calib_vref = (adc_vref_calib_value[6] << 8) + adc_vref_calib_value[5] + 1000;
+		gpio_calib_vref_offset = adc_vref_calib_value[4] - 20;
+
+		adc_set_gpio_calib_vref(gpio_calib_vref);
+		adc_set_gpio_two_point_calib_offset(gpio_calib_vref_offset);
+	}else{
+		/****** If flash do not exist the two-point gpio calibration value,use the one-point gpio calibration value ********/
+		/****** Method of calculating one-point gpio calibration Flash_gpio_Vref value: ********/
+		/****** Vref = [1175 +First_Byte-255+Second_Byte] mV = [920 + First_Byte + Second_Byte] mV ********/
+		gpio_calib_vref = 920 + adc_vref_calib_value[0] + adc_vref_calib_value[1];
+		/****** Check the one-point calibration value whether is correct ********/
+		if((gpio_calib_vref >= 1047) && (gpio_calib_vref <= 1302)){
+			adc_set_gpio_calib_vref(gpio_calib_vref);
+		}
+	}
+#if defined(MCU_CORE_8278)
+	/****** Method of calculating calibration Flash_vbat_Vref value: ********/
+	/****** Vref = [1175 +First_Byte-255+Second_Byte] mV = [920 + First_Byte + Second_Byte] mV ********/
+	u16 vbat_calib_vref = 920 + adc_vref_calib_value[2] + adc_vref_calib_value[3];
+	/****** If flash do not exist the vbat one-point calibration value or the value is incorrect,use the Efuse vbat calibration value ********/
+	if((vbat_calib_vref >= 1047) && (vbat_calib_vref <= 1302)){
+		adc_set_vbat_calib_vref(vbat_calib_vref);
+	}
+#endif
+#elif defined(MCU_CORE_B91)
+	//Check the two-point gpio calibration value whether is exist
+	if((adc_vref_calib_value[4] != 0xff) &&
+	   (adc_vref_calib_value[4] <= 0x7f) &&
+	   (adc_vref_calib_value[5] != 0xff) &&
+	   (adc_vref_calib_value[6] != 0xff)){
+		/****** Method of calculating two-point gpio calibration Flash_gain and Flash_offset value: ********/
+		/****** Vref = [(Seven_Byte << 8) + Six_Byte + 1000]mv ********/
+		/****** offset = [Five_Byte - 20] mv ********/
+		gpio_calib_vref = (adc_vref_calib_value[6] << 8) + adc_vref_calib_value[5] + 1000;
+		gpio_calib_vref_offset = adc_vref_calib_value[4] - 20;
+
+		adc_set_gpio_calib_vref(gpio_calib_vref);
+		adc_set_gpio_two_point_calib_offset(gpio_calib_vref_offset);
+	}else{
+		if(efuse_get_adc_calib_value(&gpio_calib_vref, &gpio_calib_vref_offset)){
+			adc_set_gpio_calib_vref(gpio_calib_vref);
+			adc_set_gpio_two_point_calib_offset(gpio_calib_vref_offset);
+		}else{
+			/****** Method of calculating one-point calibration Flash_gpio_Vref value: ********/
+			/****** Vref = [1175 +First_Byte-255+Second_Byte] mV = [920 + First_Byte + Second_Byte] mV ********/
+			gpio_calib_vref = 920 + adc_vref_calib_value[0] + adc_vref_calib_value[1];
+			/****** Check the calibration value whether is correct ********/
+			if((gpio_calib_vref > 1047) && (gpio_calib_vref < 1302)){
+				adc_set_gpio_calib_vref(gpio_calib_vref);
+			}
+		}
+	}
+#endif
+}
+
+static void drv_calib_freq_offset(void)
+{
+#if defined(MCU_CORE_B91)
+	u8 freq_offset_value = 0xff;
+
+	flash_read(CFG_FREQUENCY_OFFSET, 1, &freq_offset_value);
+
+	if(freq_offset_value != 0xff){
+		rf_update_internal_cap(freq_offset_value);
+	}
+#endif
+}
+#endif
+
+void drv_calibration(void)
+{
+#if defined(MCU_CORE_8258) || defined(MCU_CORE_8278) || defined(MCU_CORE_B91)
+	u32 flash_mid = 0;
+	u8 flash_uid[16] = {0};
+
+	if(flash_read_mid_uid_with_check(&flash_mid, flash_uid)){
+		drv_calib_adc_verf();
+		drv_calib_freq_offset();
+	}
+#endif
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.h
new file mode 100644
index 00000000..6711148c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_calibration.h
@@ -0,0 +1,28 @@
+/********************************************************************************************************
+ * @file    drv_calibration.h
+ *
+ * @brief   This is the header file for drv_calibration
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+void drv_calibration(void);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.c
new file mode 100644
index 00000000..1e461053
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.c
@@ -0,0 +1,162 @@
+/********************************************************************************************************
+ * @file    drv_flash.c
+ *
+ * @brief   This is the source file for drv_flash
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+void flash_write(u32 addr, u32 len, u8 *buf){
+#if (MODULE_WATCHDOG_ENABLE)
+	drv_wd_clear();
+#endif
+
+#if (VOLTAGE_DETECT_ENABLE)
+	if(drv_get_adc_data() < BATTERY_SAFETY_THRESHOLD){return;}
+#endif
+
+	flash_write_page(addr, len, buf);
+}
+
+bool flash_writeWithCheck(u32 addr, u32 len, u8 *buf){
+	s32 toalLen = (s32)len;
+	s8 copyLen = 48;
+	u8 pTemp[48];
+	u8 wLen = 0;
+	u32 sAddr = (u32)addr;
+	u8 *pSrc = buf;
+
+#if (MODULE_WATCHDOG_ENABLE)
+	drv_wd_clear();
+#endif
+
+#if (VOLTAGE_DETECT_ENABLE)
+	if(drv_get_adc_data() < BATTERY_SAFETY_THRESHOLD){
+        return FALSE;
+    }
+#endif
+
+	flash_write_page(addr, len, buf);
+
+	while(toalLen > 0){
+		wLen = (toalLen > copyLen) ? copyLen : toalLen;
+		flash_read(sAddr, wLen, pTemp);
+		if(memcmp(pTemp, pSrc, wLen)){
+			return FALSE;
+		}
+		toalLen -= wLen;
+		sAddr += wLen;
+		pSrc += wLen;
+	}
+	return TRUE;
+}
+
+
+void flash_read(u32 addr, u32 len, u8 *buf){
+	flash_read_page(addr, len, buf);
+}
+
+void flash_erase(u32 addr){
+#if (MODULE_WATCHDOG_ENABLE)
+	drv_wd_clear();
+#endif
+
+#if (VOLTAGE_DETECT_ENABLE)
+	if(drv_get_adc_data() < BATTERY_SAFETY_THRESHOLD){return;}
+#endif
+
+	flash_erase_sector(addr);
+}
+
+#ifdef CFS_ENABLE
+_attribute_ram_code_ void cfs_flash_write_page(u32 addr, u32 len, u8 *buf){
+	u32 r = drv_disable_irq();
+	// important:  buf must not reside at flash, such as constant string.  If that case, pls copy to memory first before write
+	flash_send_cmd(FLASH_WRITE_ENABLE_CMD);
+	flash_send_cmd(FLASH_WRITE_CMD);
+	flash_send_addr(addr);
+
+	u32 i;
+	for(i = 0; i < len; ++i){
+		mspi_write(~(buf[i]));		/* write data */
+		mspi_wait();
+	}
+	mspi_high();
+	flash_wait_done();
+	drv_restore_irq(r);
+}
+
+_attribute_ram_code_ void cfs_flash_read_page(u32 addr, u32 len, u8 *buf){
+	u32 r = drv_disable_irq();
+	flash_send_cmd(FLASH_READ_CMD);
+	flash_send_addr(addr);
+
+	mspi_write(0x00);		/* dummy,  to issue clock */
+	mspi_wait();
+	mspi_ctrl_write(0x0a);	/* auto mode */
+	mspi_wait();
+	/* get data */
+	for(int i = 0; i < len; ++i){
+		*buf++ = ~(mspi_get());
+		mspi_wait();
+	}
+	mspi_high();
+	drv_restore_irq(r);
+}
+
+void cfs_flash_op(u8 opmode, u32 addr, u32 len, u8 *buf){
+	u32 re = addr%256;
+
+	u32 pageReLen = (re)?(256 -re):256;
+
+	u32 writeLen = 0;
+	u32 remainLen = len;
+
+	do{
+		if(remainLen <= pageReLen){
+			writeLen = remainLen;
+			remainLen = 0;
+		}else{
+			remainLen -= pageReLen;
+			writeLen = pageReLen;
+			pageReLen = 256;
+		}
+		if(opmode){
+			cfs_flash_write_page(addr,writeLen,buf);
+		}else{
+			cfs_flash_read_page(addr,writeLen,buf);
+		}
+		buf += writeLen;
+		addr += writeLen;
+	}while(remainLen);
+}
+
+void cfs_flash_write(u32 addr, u32 len, u8 *buf){
+	cfs_flash_op(1, addr, len, buf);
+}
+
+void cfs_flash_read(u32 addr, u32 len, u8 *buf){
+	cfs_flash_op(0, addr, len, buf);
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.h
new file mode 100644
index 00000000..ce967ce3
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_flash.h
@@ -0,0 +1,42 @@
+/********************************************************************************************************
+ * @file    drv_flash.h
+ *
+ * @brief   This is the header file for drv_flash
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+typedef void (*drv_flash_write)(unsigned long addr, unsigned long len, unsigned char *buf);
+typedef void (*drv_flash_read)(unsigned long addr, unsigned long len, unsigned char *buf);
+typedef void (*drv_flash_erase)(unsigned long addr);
+
+typedef struct{
+	drv_flash_write write;
+	drv_flash_read read;
+	drv_flash_erase erase;
+}drv_flash_t;
+
+void flash_write(u32 addr, u32 len, u8 *buf);
+bool flash_writeWithCheck(u32 addr, u32 len, u8 *buf);
+void flash_read(u32 addr, u32 len, u8 *buf);
+void flash_erase(u32 addr);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.c
new file mode 100644
index 00000000..6f5e6e08
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.c
@@ -0,0 +1,314 @@
+/********************************************************************************************************
+ * @file    drv_gpio.c
+ *
+ * @brief   This is the source file for drv_gpio
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+typedef struct gpio_conf_list
+{
+	struct gpio_conf_list 	*next;
+	irq_callback 			gpio_irq_callback;
+	u32 					pin;
+	drv_gpioIrqMode_t 		mode;
+	drv_gpioPoll_e 			polarity;
+}gpio_conf_list;
+
+#define GPIO_IRQ_HANDLER_Q_NUM		3
+
+LIST(gpioIrqHandlerQ);
+
+struct gpio_conf_list *list_head = NULL;
+
+/****
+* brief: initialize the gpio interrupt
+* param[in] pin, the gpio interrupt pin
+* param[in] polarity, the falling edge or the rising edge.
+* param[in] gpio_irq_callback, the callback function
+* @return, 0 success, -1 failed(fail to allocate the node buffer)
+*/
+int drv_gpio_irq_config(drv_gpioIrqMode_t mode, u32 pin, drv_gpioPoll_e polarity, irq_callback gpio_irq_callback)
+{
+	bool searched = 0;
+	if(listLength(gpioIrqHandlerQ)){
+		gpio_conf_list *pList = listHead(gpioIrqHandlerQ);
+		while(pList){
+			if(pList->mode == mode && pList->pin == pin){
+				if(pList->polarity != polarity){
+					pList->polarity = polarity;
+				}
+				if(pList->gpio_irq_callback != gpio_irq_callback){
+					pList->gpio_irq_callback = gpio_irq_callback;
+				}
+
+				searched = 1;
+				break;
+			}
+
+			pList = pList->next;
+		}
+	}
+
+	if(!searched){
+		if(listLength(gpioIrqHandlerQ) >= GPIO_IRQ_HANDLER_Q_NUM){
+			return -1;
+		}
+
+		gpio_conf_list *list_node = (gpio_conf_list*)ev_buf_allocate(sizeof(gpio_conf_list));
+		if(!list_node){
+			return -1;
+		}
+
+		memset((u8 *)list_node, 0, sizeof(gpio_conf_list));
+		list_node->mode = mode;
+		list_node->pin = pin;
+		list_node->polarity = polarity;
+		list_node->gpio_irq_callback = gpio_irq_callback;
+		listAdd(gpioIrqHandlerQ, (void *)list_node);
+	}
+
+	if(mode == GPIO_IRQ_MODE){
+		drv_gpio_irq_set(pin, polarity);
+	}else if(mode == GPIO_IRQ_RISC0_MODE){
+		drv_gpio_irq_risc0_set(pin, polarity);
+	}else if(mode == GPIO_IRQ_RISC1_MODE){
+		drv_gpio_irq_risc1_set(pin, polarity);
+	}
+
+	return 0;
+}
+
+/****
+* brief: gpio interrupt handler
+* param[in]
+* @return
+*/
+static void drv_gpio_irq_process(drv_gpioIrqMode_t mode)
+{
+	if(listLength(gpioIrqHandlerQ)){
+		gpio_conf_list *pList = listHead(gpioIrqHandlerQ);
+		while(pList){
+			if(pList->mode == mode){
+				if(pList->gpio_irq_callback){
+					pList->gpio_irq_callback();
+					break;
+				}
+			}
+
+			pList = pList->next;
+		}
+	}
+}
+
+void drv_gpio_irq_handler(void)
+{
+	drv_gpio_irq_process(GPIO_IRQ_MODE);
+}
+
+void drv_gpio_irq_risc0_handler(void)
+{
+	drv_gpio_irq_process(GPIO_IRQ_RISC0_MODE);
+}
+
+void drv_gpio_irq_risc1_handler(void)
+{
+	drv_gpio_irq_process(GPIO_IRQ_RISC1_MODE);
+}
+
+void drv_gpio_func_set(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_func(pin, AS_GPIO);
+#elif defined(MCU_CORE_B91)
+	gpio_function_en(pin);
+#endif
+}
+
+void drv_gpio_output_en(u32 pin, bool enable)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_output_en(pin, enable);
+#elif defined(MCU_CORE_B91)
+	gpio_set_output(pin, enable);
+#endif
+}
+
+void drv_gpio_input_en(u32 pin, bool enable)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_input_en(pin, enable);
+#elif defined(MCU_CORE_B91)
+	gpio_set_input(pin, enable);
+#endif
+}
+
+void drv_gpio_up_down_resistor(u32 pin, u8 res)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_setup_up_down_resistor(pin, res);
+#elif defined(MCU_CORE_B91)
+	gpio_set_up_down_res(pin, res);
+#endif
+}
+
+void drv_gpio_write(u32 pin, bool value)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_write(pin, value);
+#elif defined(MCU_CORE_B91)
+	gpio_set_level(pin, value);
+#endif
+}
+
+bool drv_gpio_read(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	return gpio_read(pin);
+#elif defined(MCU_CORE_B91)
+	return gpio_get_level(pin);
+#endif
+}
+
+void drv_gpio_read_all(u8 *p)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_read_all(p);
+#elif defined(MCU_CORE_B91)
+	gpio_get_level_all(p);
+#endif
+}
+
+void drv_gpio_irq_set(u32 pin, drv_gpioPoll_e polarity)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_interrupt(pin, polarity);
+#elif defined(MCU_CORE_B91)
+	gpio_set_irq(pin, polarity);
+#endif
+}
+
+void drv_gpio_irq_risc0_set(u32 pin, drv_gpioPoll_e polarity)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_interrupt_risc0(pin, polarity);
+#elif defined(MCU_CORE_B91)
+	gpio_set_gpio2risc0_irq(pin, polarity);
+#endif
+}
+
+void drv_gpio_irq_risc1_set(u32 pin, drv_gpioPoll_e polarity)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_set_interrupt_risc1(pin, polarity);
+#elif defined(MCU_CORE_B91)
+	gpio_set_gpio2risc1_irq(pin, polarity);
+#endif
+}
+
+/****
+* brief: enable the gpio interrupt
+* param[in] pin, the pin of node.
+* @return
+*/
+void drv_gpio_irq_en(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt(pin, 1);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_enable(IRQ25_GPIO);
+#endif
+}
+
+void drv_gpio_irq_risc0_en(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt_risc0(pin, 1);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_enable(IRQ26_GPIO2RISC0);
+#endif
+}
+
+void drv_gpio_irq_risc1_en(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt_risc1(pin, 1);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_enable(IRQ27_GPIO2RISC1);
+#endif
+}
+
+void drv_gpio_irq_dis(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt(pin, 0);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_disable(IRQ25_GPIO);
+#endif
+}
+
+void drv_gpio_irq_risc0_dis(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt_risc0(pin, 0);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_disable(IRQ26_GPIO2RISC0);
+#endif
+}
+
+void drv_gpio_irq_risc1_dis(u32 pin)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	gpio_en_interrupt_risc1(pin, 0);
+#elif defined(MCU_CORE_B91)
+	plic_interrupt_disable(IRQ27_GPIO2RISC1);
+#endif
+}
+
+
+#if 0
+/****
+* brief: gpio interrupt handler
+* param[in]
+* @return
+*/
+extern void ev_synchronous_timer(void);
+void timer_synchronous_irq_callback()
+{
+	u32 r = drv_disable_irq();
+	ev_synchronous_timer();
+	drv_restore_irq(r);
+}
+
+
+/****
+* brief: configure the timer synchronous gpio and  polarity
+* param[in] pin, the pin of node.
+* param[in] polarity, the falling edge or the rising edge.
+* @return
+*/
+void gpio_timer_synchronous_set(u32 pin, drv_gpioPoll_e polarity)
+{
+	drv_gpio_irq_config(GPIO_IRQ_MODE, pin, polarity, timer_synchronous_irq_callback);
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.h
new file mode 100644
index 00000000..f166af6c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_gpio.h
@@ -0,0 +1,77 @@
+/********************************************************************************************************
+ * @file    drv_gpio.h
+ *
+ * @brief   This is the header file for drv_gpio
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+typedef enum{
+	RISING_EDGE,
+	FALLING_EDGE,
+	HIGH_LEVEL,	/* Only for b91 platform. */
+	LOW_LEVEL,	/* Only for b91 platform. */
+}drv_gpioPoll_e;
+
+typedef enum{
+	GPIO_IRQ_INVALID,
+	GPIO_IRQ_MODE,
+	GPIO_IRQ_RISC0_MODE,
+	GPIO_IRQ_RISC1_MODE,
+}drv_gpioIrqMode_t;
+
+typedef void (*irq_callback)(void);
+
+/****
+* brief: initialize the gpio interrupt
+* param[in] pin, the gpio interrupt pin
+* param[in] polarity, the falling edge or the rising edge.
+* param[in] gpio_irq_callback, the callback function
+* @return, 0 success, -1 failed(fail to allocate the node buffer)
+*/
+int drv_gpio_irq_config(drv_gpioIrqMode_t mode, u32 pin, drv_gpioPoll_e polarity, irq_callback gpio_irq_callback);
+
+void drv_gpio_irq_handler(void);
+void drv_gpio_irq_risc0_handler(void);
+void drv_gpio_irq_risc1_handler(void);
+
+void drv_gpio_irq_set(u32 pin, drv_gpioPoll_e polarity);
+void drv_gpio_irq_risc0_set(u32 pin, drv_gpioPoll_e polarity);
+void drv_gpio_irq_risc1_set(u32 pin, drv_gpioPoll_e polarity);
+
+void drv_gpio_irq_en(u32 pin);
+void drv_gpio_irq_risc0_en(u32 pin);
+void drv_gpio_irq_risc1_en(u32 pin);
+
+void drv_gpio_irq_dis(u32 pin);
+void drv_gpio_irq_risc0_dis(u32 pin);
+void drv_gpio_irq_risc1_dis(u32 pin);
+
+void drv_gpio_func_set(u32 pin);
+void drv_gpio_output_en(u32 pin, bool enable);
+void drv_gpio_input_en(u32 pin, bool enable);
+void drv_gpio_up_down_resistor(u32 pin, u8 res);
+void drv_gpio_write(u32 pin, bool value);
+bool drv_gpio_read(u32 pin);
+void drv_gpio_read_all(u8 *p);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.c
new file mode 100644
index 00000000..9c68350d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.c
@@ -0,0 +1,324 @@
+/********************************************************************************************************
+ * @file    drv_hw.c
+ *
+ * @brief   This is the source file for drv_hw
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+/*
+ * system clock configuration
+ */
+#if defined(MCU_CORE_826x)
+	#if(CLOCK_SYS_CLOCK_HZ == 32000000)
+		#define SYS_CLOCK_VALUE		SYS_CLK_32M_PLL
+	#elif(CLOCK_SYS_CLOCK_HZ == 16000000)
+		#define SYS_CLOCK_VALUE		SYS_CLK_16M_PLL
+	#else
+		#error please config system clock
+	#endif
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#if(CLOCK_SYS_CLOCK_HZ == 24000000)
+		#define SYS_CLOCK_VALUE		SYS_CLK_24M_Crystal
+	#elif(CLOCK_SYS_CLOCK_HZ == 16000000)
+		#define SYS_CLOCK_VALUE		SYS_CLK_16M_Crystal
+	#elif(CLOCK_SYS_CLOCK_HZ == 48000000)
+		#define SYS_CLOCK_VALUE		SYS_CLK_48M_Crystal
+	#else
+		#error please config system clock
+	#endif
+#elif defined(MCU_CORE_B91)
+	#if(CLOCK_SYS_CLOCK_HZ == 48000000)
+		#define CLOCK_INIT			CCLK_48M_HCLK_48M_PCLK_24M
+	#else
+		#error please config system clock
+	#endif
+#endif
+
+
+//system ticks per US
+u32 sysTimerPerUs;
+
+
+static void randInit(void)
+{
+#if defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	random_generator_init();
+#elif defined(MCU_CORE_B91)
+	trng_init();
+#endif
+}
+
+/*********************************************************************
+ * @fn      internalFlashSizeCheck
+ *
+ * @brief   This function is provided to get and update to the correct flash address
+ * 			where are stored the right MAC address and pre-configured parameters.
+ * 			NOTE: It should be called before ZB_RADIO_INIT().
+ *
+ * @param   None
+ *
+ * @return  None
+ */
+static void internalFlashSizeCheck(void){
+#if defined(MCU_CORE_8258) || defined(MCU_CORE_8278) || defined(MCU_CORE_B91)
+	u32 mid = flash_read_mid();
+	u8 *pMid = (u8 *)&mid;
+
+	if( (pMid[2] < FLASH_SIZE_512K) || \
+		((g_u32MacFlashAddr == FLASH_ADDR_OF_MAC_ADDR_1M) && (pMid[2] < FLASH_SIZE_1M)) || \
+		((g_u32MacFlashAddr == FLASH_ADDR_OF_MAC_ADDR_2M) && (pMid[2] < FLASH_SIZE_2M)) || \
+		((g_u32MacFlashAddr == FLASH_ADDR_OF_MAC_ADDR_4M) && (pMid[2] < FLASH_SIZE_4M))){
+		/* Flash space not matched. */
+		while(1);
+	}
+
+	switch(pMid[2]){
+		case FLASH_SIZE_1M:
+			g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_1M;
+			g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_1M;
+			break;
+		case FLASH_SIZE_2M:
+			g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_2M;
+			g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_2M;
+			break;
+		case FLASH_SIZE_4M:
+			g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_4M;
+			g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_4M;
+			break;
+		default:
+			break;
+	}
+#endif
+}
+
+
+static void voltage_detect_init(u32 detectPin)
+{
+	drv_adc_init();
+
+#if defined(MCU_CORE_826x)
+	(void)detectPin;
+	drv_adc_mode_pin_set(DRV_ADC_VBAT_MODE, NOINPUT);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	drv_adc_mode_pin_set(DRV_ADC_VBAT_MODE, (GPIO_PinTypeDef)detectPin);
+#elif defined(MCU_CORE_B91)
+	drv_adc_mode_pin_set(DRV_ADC_BASE_MODE, (adc_input_pin_def_e)detectPin);
+#endif
+
+	drv_adc_enable(1);
+}
+
+
+#if VOLTAGE_DETECT_ENABLE
+#define VOLTAGE_DEBOUNCE_NUM 	5
+void voltage_detect(bool powerOn)
+{
+	u16 voltage = drv_get_adc_data();
+	u32 curTick = clock_time();
+	s32 debounceNum = VOLTAGE_DEBOUNCE_NUM;
+
+	//printf("VDD: %d\n", voltage);
+	if(powerOn || voltage < BATTERY_SAFETY_THRESHOLD){
+		while(debounceNum > 0){
+			if(voltage > BATTERY_SAFETY_THRESHOLD){
+				debounceNum--;
+			}else{
+				debounceNum = VOLTAGE_DEBOUNCE_NUM;
+			}
+
+			if(clock_time_exceed(curTick, 1000 * 1000)){
+#if PM_ENABLE
+				drv_pm_sleep(PM_SLEEP_MODE_DEEPSLEEP, 0, 0);
+#else
+				SYSTEM_RESET();
+#endif
+			}
+
+			voltage = drv_get_adc_data();
+		}
+	}
+}
+#endif
+
+static startup_state_e platform_wakeup_init(void)
+{
+	startup_state_e state = SYSTEM_BOOT;
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258)
+	cpu_wakeup_init();
+#elif defined(MCU_CORE_8278)
+	cpu_wakeup_init(LDO_MODE, EXTERNAL_XTAL_24M);
+#elif defined(MCU_CORE_B91)
+	sys_init(LDO_1P4_LDO_1P8, VBAT_MAX_VALUE_GREATER_THAN_3V6);
+#endif
+
+#if defined(MCU_CORE_826x)
+	//826x not support ram retention.
+	state = (pm_mcu_status == MCU_STATUS_DEEP_BACK) ? SYSTEM_DEEP : SYSTEM_BOOT;
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	state = (startup_state_e)pm_get_mcu_status();
+#elif defined(MCU_CORE_B91)
+	if(g_pm_status_info.mcu_status == MCU_STATUS_DEEPRET_BACK){
+		state = SYSTEM_DEEP_RETENTION;
+	}else if(g_pm_status_info.mcu_status == MCU_STATUS_DEEP_BACK){
+		state = SYSTEM_DEEP;
+	}
+#endif
+
+	return state;
+}
+
+/****************************************************************************************************
+* @brief 		platform initialization function
+*
+* @param[in] 	none
+*
+* @return	  	startup_state_e.
+*/
+startup_state_e drv_platform_init(void)
+{
+	startup_state_e state = platform_wakeup_init();
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	clock_init(SYS_CLOCK_VALUE);
+#elif defined(MCU_CORE_B91)
+	CLOCK_INIT;
+#endif
+
+	/* Get system ticks per US, must be after the clock is initialized. */
+#if defined(MCU_CORE_826x)
+	sysTimerPerUs = tickPerUs;
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	sysTimerPerUs = sys_tick_per_us;
+#elif defined(MCU_CORE_B91)
+	sysTimerPerUs = SYSTEM_TIMER_TICK_1US;
+#endif
+
+	gpio_init(TRUE);
+
+
+	if(state != SYSTEM_DEEP_RETENTION){
+		randInit();
+		internalFlashSizeCheck();
+#if PM_ENABLE
+		PM_CLOCK_INIT();
+#endif
+	}else{
+#if PM_ENABLE
+		drv_pm_wakeupTimeUpdate();
+#endif
+	}
+
+	/* Get calibration info to improve performance */
+	drv_calibration();
+
+	/* ADC */
+#if VOLTAGE_DETECT_ENABLE
+	voltage_detect_init(VOLTAGE_DETECT_ADC_PIN);
+
+	voltage_detect((state == SYSTEM_BOOT) ? 1 : 0);
+#endif
+
+	/* RF */
+	ZB_RADIO_INIT();
+	ZB_TIMER_INIT();
+
+#if defined(MCU_CORE_8258)
+	if(flash_is_zb()){
+
+#if (!VOLTAGE_DETECT_ENABLE) || !defined(VOLTAGE_DETECT_ENABLE)
+		voltage_detect_init(VOLTAGE_DETECT_ADC_PIN);
+		flash_safe_voltage_set(BATTERY_SAFETY_THRESHOLD);
+#endif
+		flash_unlock_mid13325e();  //add it for the flash which sr is expired
+	}
+#endif
+
+	return state;
+}
+
+void drv_enable_irq(void)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	irq_enable();
+#elif defined(MCU_CORE_B91)
+	core_interrupt_enable();
+#endif
+}
+
+u32 drv_disable_irq(void)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	return (u32)irq_disable();
+#elif defined(MCU_CORE_B91)
+	return core_interrupt_disable();
+#endif
+}
+
+u32 drv_restore_irq(u32 en)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	irq_restore((u8)en);
+	return 0;
+#elif defined(MCU_CORE_B91)
+	return core_restore_interrupt(en);
+#endif
+}
+
+void drv_wd_setInterval(u32 ms)
+{
+	wd_set_interval_ms(ms);
+}
+
+void drv_wd_start(void)
+{
+	wd_start();
+}
+
+void drv_wd_clear(void)
+{
+	wd_clear();
+}
+
+u32 drv_u32Rand(void)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	return rand();
+#elif defined(MCU_CORE_B91)
+	return trng_rand();
+#endif
+}
+
+void drv_generateRandomData(u8 *pData, u8 len)
+{
+	u32 randNums = 0;
+	/* if len is odd */
+	for(u8 i = 0; i < len; i++){
+		if((i & 3) == 0){
+			randNums = drv_u32Rand();
+		}
+
+		pData[i] = randNums & 0xff;
+		randNums >>= 8;
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.h
new file mode 100644
index 00000000..af5a8084
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_hw.h
@@ -0,0 +1,58 @@
+/********************************************************************************************************
+ * @file    drv_hw.h
+ *
+ * @brief   This is the header file for drv_hw
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#define BATTERY_SAFETY_THRESHOLD	2200//2.2v
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define SYSTEM_RESET()			mcu_reset()
+#elif defined(MCU_CORE_B91)
+	#define SYSTEM_RESET()			sys_reboot()
+#endif
+
+typedef enum{
+	SYSTEM_BOOT,			//power on or boot
+	SYSTEM_DEEP_RETENTION,	//deep with retention back
+	SYSTEM_DEEP,			//deep back
+}startup_state_e;
+
+extern u32 sysTimerPerUs;
+
+startup_state_e drv_platform_init(void);
+
+void drv_enable_irq(void);
+u32 drv_disable_irq(void);
+u32 drv_restore_irq(u32 en);
+
+void drv_wd_setInterval(u32 ms);
+void drv_wd_start(void);
+void drv_wd_clear(void);
+
+u32 drv_u32Rand(void);
+void drv_generateRandomData(u8 *pData, u8 len);
+
+void voltage_detect(bool powerOn);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.c
new file mode 100644
index 00000000..0802c767
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.c
@@ -0,0 +1,219 @@
+/********************************************************************************************************
+ * @file    drv_i2c.c
+ *
+ * @brief   This is the source file for drv_i2c
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+
+/**
+ * @brief      This function set the id of slave device and the speed of I2C interface
+ * @param[in]  i2cClock - I2C clock,
+ *             I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return     none
+ */
+void drv_i2c_master_init(u32 i2cClock)
+{
+	u8 divClock = (u8)(I2C_CLOCK_SOURCE / (4 * i2cClock));
+
+#if	defined(MCU_CORE_826x)
+	I2C_MasterInit(divClock);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_master_init(divClock);
+#elif defined(MCU_CORE_B91)
+	i2c_master_init();
+	i2c_set_master_clk(divClock);
+#endif
+}
+
+/**
+ *  @brief      the function config the ID of slave and mode of slave.
+ *  @param[in]  deviceID - it contains write or read bit,the lsb is write or read bit.
+ *              ID|0x01 indicate read. ID&0xfe indicate write.
+ *  @return     none
+ */
+void drv_i2c_slave_init(u8 deviceID)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_SlaveInit(deviceID, 0, NULL);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_slave_init(deviceID, 0, NULL);
+#elif defined(MCU_CORE_B91)
+	i2c_slave_init(deviceID);
+#endif
+}
+
+
+/**
+ * @brief      This function writes one byte to the slave device at the specified address
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - i2c slave address where the one byte data will be written
+ * @param[in]  addrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @param[in]  data - the one byte data will be written via I2C interface
+ * @return     none
+ */
+void drv_i2c_write_byte(u8 slaveID, u32 addr, u32 addrLen, u8 data)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_SetId(slaveID);
+	I2C_WriteByte(addr, addrLen, data);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_set_id(slaveID);
+	i2c_write_byte(addr, addrLen, data);
+#elif defined(MCU_CORE_B91)
+	u8 buf[6] = {0};
+	u8 *pBuf = buf;
+
+	for(u8 i = 0; i < addrLen; i++){
+		*pBuf++ = (u8)(addr >> ((addrLen - 1 - i) << 3));
+	}
+	*pBuf++ = data;
+
+	i2c_master_write(slaveID, buf, (u8)(pBuf - buf));
+#endif
+}
+
+/**
+ *  @brief      write continuous data to slave
+ *  @param[in]  slaveID - id of the slave device
+ *  @param[in]  addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ *  @param[in]  addrLen - the length of register. enum 0 or 1 or 2 or 3. based on the spec of i2c slave.
+ *  @param[in]  dataBuf - the first SRAM buffer address to write data to slave in.
+ *  @param[in]  dataLen - the length of data master write to slave.
+ *  @return     none
+ */
+void drv_i2c_write_series(u8 slaveID, u32 addr, u32 addrLen, u8 *dataBuf, int dataLen)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_SetId(slaveID);
+	I2C_WriteSeries(addr, addrLen, dataBuf, dataLen);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_set_id(slaveID);
+	i2c_write_series(addr, addrLen, dataBuf, dataLen);
+#elif defined(MCU_CORE_B91)
+	u8 *pBuf = (u8 *)ev_buf_allocate(addrLen + dataLen);
+	if(pBuf){
+		u8 *pData = pBuf;
+
+		for(u8 i = 0; i < addrLen; i++){
+			*pData++ = (u8)(addr >> ((addrLen - 1 - i) << 3));
+		}
+		memcpy(pData, dataBuf, dataLen);
+		pData += dataLen;
+
+		i2c_master_write(slaveID, pBuf, (u8)(addrLen + dataLen));
+
+		ev_buf_free(pBuf);
+	}
+#endif
+}
+
+/**
+ * @brief      This function reads one byte from the slave device at the specified address
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - i2c slave address where the one byte data will be read
+ * @param[in]  addrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @return     the one byte data read from the slave device via I2C interface
+ */
+u8 drv_i2c_read_byte(u8 slaveID, u32 addr, u32 addrLen)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_SetId(slaveID);
+	return I2C_ReadByte(addr, addrLen);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_set_id(slaveID);
+	return i2c_read_byte(addr, addrLen);
+#elif defined(MCU_CORE_B91)
+	u8 data = 0;
+	u8 buf[4] = {0};
+	u8 *pBuf = buf;
+
+	for(u8 i = 0; i < addrLen; i++){
+		*pBuf++ = (u8)(addr >> ((addrLen - 1 - i) << 3));
+	}
+
+	i2c_master_write_read(slaveID, buf, (u8)addrLen, &data, 1);
+
+	return data;
+#endif
+}
+
+/**
+ * @brief      read continuous data from slave
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - the register master read data from slave in. support one byte and two bytes.
+ * @param[in]  addrLen - the length of register. enum 0 or 1 or 2 or 3 based on the spec of i2c slave.
+ * @param[out] dataBuf - the first address of SRAM buffer master store data in.
+ * @param[in]  dataLen - the length of data master read from slave.
+ * @return     none.
+ */
+void drv_i2c_read_series(u8 slaveID, u32 addr, u32 addrLen, u8 *dataBuf, int dataLen)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_SetId(slaveID);
+	I2C_ReadSeries(addr, addrLen, dataBuf, dataLen);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	i2c_set_id(slaveID);
+	i2c_read_series(addr, addrLen, dataBuf, dataLen);
+#elif defined(MCU_CORE_B91)
+	u8 buf[4] = {0};
+	u8 *pBuf = buf;
+
+	for(u8 i = 0; i < addrLen; i++){
+		*pBuf++ = (u8)(addr >> ((addrLen - 1 - i) << 3));
+	}
+
+	i2c_master_write_read(slaveID, buf, (u8)addrLen, dataBuf, (u8)dataLen);
+#endif
+}
+
+/**
+ * @brief      This function selects a pin port for I2C interface.
+ * @param[in]  Pin Group or Pins
+ * @return     none
+ */
+#if	defined(MCU_CORE_826x) || defined(MCU_CORE_8258)
+void drv_i2c_gpio_set(I2C_GPIO_GroupTypeDef i2c_pin_group)
+{
+#if	defined(MCU_CORE_826x)
+	I2C_PinSelect(i2c_pin_group);
+#else
+	i2c_gpio_set(i2c_pin_group);
+#endif
+}
+#elif defined(MCU_CORE_8278)
+void drv_i2c_gpio_set(I2C_GPIO_SdaTypeDef sda_pin, I2C_GPIO_SclTypeDef scl_pin)
+{
+	i2c_gpio_set(sda_pin, scl_pin);
+}
+#elif defined(MCU_CORE_B91)
+void drv_i2c_gpio_set(i2c_sda_pin_e sda_pin, i2c_scl_pin_e scl_pin)
+{
+	i2c_set_pin(sda_pin, scl_pin);
+}
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.h
new file mode 100644
index 00000000..d7b44cf1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_i2c.h
@@ -0,0 +1,107 @@
+/********************************************************************************************************
+ * @file    drv_i2c.h
+ *
+ * @brief   This is the header file for drv_i2c
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define I2C_CLOCK_SOURCE			CLOCK_SYS_CLOCK_HZ
+#elif defined(MCU_CORE_B91)
+	/* PCLK provides clock source for I2C module. */
+	#define I2C_CLOCK_SOURCE			(sys_clk.pclk * 1000 * 1000)
+#endif
+
+
+/**
+ * @brief      This function set the id of slave device and the speed of I2C interface
+ * @param[in]  i2cClock - I2C clock,
+ *             I2C clock = System clock / (4*DivClock);if the datasheet you look at is 2*,pls modify it.
+ * @return     none
+ */
+void drv_i2c_master_init(u32 i2cClock);
+
+/**
+ *	@brief      the function config the ID of slave and mode of slave.
+ *	@param[in]  deviceID - it contains write or read bit,the lsb is write or read bit.
+ *			    ID|0x01 indicate read. ID&0xfe indicate write.
+ *	@return     none
+ */
+void drv_i2c_slave_init(u8 deviceID);
+
+/**
+ * @brief      This function writes one byte to the slave device at the specified address
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - i2c slave address where the one byte data will be written
+ * @param[in]  addrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @param[in]  data - the one byte data will be written via I2C interface
+ * @return     none
+ */
+void drv_i2c_write_byte(u8 slaveID, u32 addr, u32 addrLen, u8 data);
+
+/**
+ * @brief      This function reads one byte from the slave device at the specified address
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - i2c slave address where the one byte data will be read
+ * @param[in]  addrLen - length in byte of the address, which makes this function is
+ *             compatible for slave device with both one-byte address and two-byte address
+ * @return     the one byte data read from the slave device via I2C interface
+ */
+u8 drv_i2c_read_byte(u8 slaveID, u32 addr, u32 addrLen);
+
+/**
+ *  @brief      write continuous data to slave
+ *  @param[in]  slaveID - id of the slave device
+ *  @param[in]  addr - the register that master write data to slave in. support one byte and two bytes. i.e param2 AddrLen may be 1 or 2.
+ *  @param[in]  addrLen - the length of register. enum 0 or 1 or 2 or 3. based on the spec of i2c slave.
+ *  @param[in]  dataBuf - the first SRAM buffer address to write data to slave in.
+ *  @param[in]  dataLen - the length of data master write to slave.
+ *  @return     none
+ */
+void drv_i2c_write_series(u8 slaveID, u32 addr, u32 addrLen, u8 *dataBuf, int dataLen);
+
+/**
+ * @brief      read continuous data from slave
+ * @param[in]  slaveID - id of the slave device
+ * @param[in]  addr - the register master read data from slave in. support one byte and two bytes.
+ * @param[in]  addrLen - the length of register. enum 0 or 1 or 2 or 3 based on the spec of i2c slave.
+ * @param[out] dataBuf - the first address of SRAM buffer master store data in.
+ * @param[in]  dataLen - the length of data master read from slave.
+ * @return     none.
+ */
+void drv_i2c_read_series(u8 slaveID, u32 addr, u32 addrLen, u8 *dataBuf, int dataLen);
+
+/**
+ * @brief      This function selects a pin port for I2C interface.
+ * @param[in]  Pin Group or Pins
+ * @return     none
+ */
+#if	defined(MCU_CORE_826x) || defined(MCU_CORE_8258)
+void drv_i2c_gpio_set(I2C_GPIO_GroupTypeDef i2c_pin_group);
+#elif defined(MCU_CORE_8278)
+void drv_i2c_gpio_set(I2C_GPIO_SdaTypeDef sda_pin, I2C_GPIO_SclTypeDef scl_pin);
+#elif defined(MCU_CORE_B91)
+void drv_i2c_gpio_set(i2c_sda_pin_e sda_pin, i2c_scl_pin_e scl_pin);
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.c
new file mode 100644
index 00000000..b866dd2d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.c
@@ -0,0 +1,343 @@
+/********************************************************************************************************
+ * @file    drv_keyboard.c
+ *
+ * @brief   This is the source file for drv_keyboard
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+#if (defined(KB_DRIVE_PINS) && defined(KB_SCAN_PINS))
+
+
+#ifndef	SCAN_PIN_50K_PULLUP_ENABLE
+#define	SCAN_PIN_50K_PULLUP_ENABLE		0
+#endif
+#ifndef	KB_MAP_DEFAULT
+#define	KB_MAP_DEFAULT					1
+#endif
+#ifndef	KB_LINE_MODE
+#define	KB_LINE_MODE					1
+#endif
+#ifndef	KB_LINE_HIGH_VALID
+#define	KB_LINE_HIGH_VALID				0
+#endif
+#ifndef	KB_KEY_FLASH_PIN_MULTI_USE
+#define	KB_KEY_FLASH_PIN_MULTI_USE		0
+#endif
+#ifndef	KB_HAS_CTRL_KEYS
+#define	KB_HAS_CTRL_KEYS				0
+#endif
+#ifndef	KB_ONLY_SINGLEKEY_SUPP
+#define	KB_ONLY_SINGLEKEY_SUPP			0
+#endif
+#ifndef	KB_RM_GHOST_KEY_EN
+#define	KB_RM_GHOST_KEY_EN				0
+#endif
+#ifndef	KB_HAS_FN_KEY
+#define	KB_HAS_FN_KEY					0
+#endif
+#ifndef	KB_DRV_DELAY_TIME
+#define	KB_DRV_DELAY_TIME				10
+#endif
+
+u32 drive_pins[] = KB_DRIVE_PINS;	//8
+u32 scan_pins[] = KB_SCAN_PINS;		//18
+
+kb_data_t kb_event;
+kb_data_t last_kb_event;
+
+typedef u8 kb_k_mp_t[ARRAY_SIZE(drive_pins)]; //typedef u8 kb_k_mp_t[8]
+
+
+static const u8 kb_map_normal[ARRAY_SIZE(scan_pins)][ARRAY_SIZE(drive_pins)] = KB_MAP_NORMAL;
+
+
+kb_k_mp_t *kb_p_map[2] = {
+	(kb_k_mp_t *)kb_map_normal,
+	(kb_k_mp_t *)kb_map_normal,
+};
+
+u32	scan_pin_need;
+static u8 kb_is_fn_pressed = 0;
+kb_k_mp_t *kb_k_mp;
+
+void kb_rmv_ghost_key(u32 *pressed_matrix){
+	u32 mix_final = 0;
+
+	foreach_arr(i, drive_pins){
+		for(int j = (i+1); j < ARRAY_SIZE(drive_pins); ++j){
+			u32 mix = (pressed_matrix[i] & pressed_matrix[j]);
+			//More than two lines overlap, that is ghost key
+			//four or three key at "#" is pressed at the same time, should remove ghost key
+			if( mix && (!BIT_IS_POW2(mix) || (pressed_matrix[i] ^ pressed_matrix[j])) ){
+				// remove ghost keys
+				//pressed_matrix[i] &= ~mix;
+				//pressed_matrix[j] &= ~mix;
+				mix_final |= mix;
+			}
+		}
+		pressed_matrix[i] &= ~mix_final;
+	}
+}
+
+
+u32 key_debounce_filter(u32 mtrx_cur[], u32 filt_en){
+    u32 kc = 0;
+    static u32 mtrx_pre[ARRAY_SIZE(drive_pins)];
+    static u32 mtrx_last[ARRAY_SIZE(drive_pins)];
+
+    foreach_arr(i, drive_pins){
+        u32 mtrx_tmp = mtrx_cur[i];
+        if(filt_en){
+            //mtrx_cur[i] = (mtrx_last[i] ^ mtrx_tmp) ^ (mtrx_last[i] | mtrx_tmp);  //key_matrix_pressed is valid when current and last value is the same
+            mtrx_cur[i] = ( ~mtrx_last[i] & (mtrx_pre[i] & mtrx_tmp) ) | ( mtrx_last[i] & (mtrx_pre[i] | mtrx_tmp) );
+        }
+        if(mtrx_cur[i] != mtrx_last[i]){
+        	kc = 1;
+        }
+        mtrx_pre[i] = mtrx_tmp;
+        mtrx_last[i] = mtrx_cur[i];
+    }
+    return kc;
+}
+
+
+// input:      pressed_matrix,
+// key_code:   output keys array
+// key_max:    max keys should be returned
+static inline void kb_remap_key_row(int drv_ind, u32 m, int key_max, kb_data_t *kb_data){
+	foreach_arr(i, scan_pins){
+		if(m & 0x01){
+			u8 kc = kb_k_mp[i][drv_ind];
+#if (KB_HAS_CTRL_KEYS)
+			if(kc >= VK_CTRL && kc <= VK_RWIN)
+				kb_data->ctrl_key |= BIT(kc - VK_CTRL);
+			//else if(kc == VK_MEDIA_END)
+				//lock_button_pressed = 1;
+			else if(VK_ZOOM_IN == kc || VK_ZOOM_OUT == kc){
+				kb_data->ctrl_key |= VK_MSK_LCTRL;
+				kb_data->keycode[kb_data->cnt++] = (VK_ZOOM_IN == kc)? VK_EQUAL : VK_MINUS;
+			}
+			else if(kc != VK_FN)//fix fn ghost bug
+				kb_data->keycode[kb_data->cnt++] = kc;
+#else
+			kb_data->keycode[kb_data->cnt++] = kc;
+#endif
+			if(kb_data->cnt >= key_max){
+				break;
+			}
+		}
+		m = m >> 1;
+		if(!m){
+			break;
+		}
+	}
+}
+
+static inline void kb_remap_key_code(u32 *pressed_matrix, int key_max, kb_data_t *kb_data, int numlock_status){
+	kb_k_mp = kb_p_map[0];
+
+	foreach_arr(i, drive_pins){
+		u32 m = pressed_matrix[i];
+		if(!m) continue;
+		kb_remap_key_row(i, m, key_max, kb_data);
+		if(kb_data->cnt >= key_max){
+			break;
+		}
+	}
+}
+
+static u32 kb_key_pressed(u8 *gpio)
+{
+#if(!KB_LINE_MODE)
+	foreach_arr(i, drive_pins){
+		drv_gpio_write(drive_pins[i], KB_LINE_HIGH_VALID);
+		drv_gpio_output_en(drive_pins[i], 1);
+	}
+	WaitUs(20);
+#endif
+	drv_gpio_read_all(gpio);
+
+	u32 ret = 0;
+	static u8 release_cnt = 0;
+	static u32 ret_last = 0;
+
+	foreach_arr(i, scan_pins){
+		if(KB_LINE_HIGH_VALID != !gpio_read_cache(scan_pins[i], gpio)){
+			ret |= (1 << i);
+			release_cnt = 6;
+			ret_last = ret;
+		}
+	}
+	if(release_cnt){
+		ret = ret_last;
+		release_cnt--;
+	}
+
+#if(!KB_LINE_MODE)
+	foreach_arr(i, drive_pins){
+		drv_gpio_write(drive_pins[i], 0);
+		drv_gpio_output_en(drive_pins[i], 0);
+	}
+#endif
+	return ret;
+}
+
+u32 kb_scan_row(int drv_ind, u8 *gpio){
+	/*
+	 * set as gpio mode if using spi flash pin
+	 * */
+	//u32 sr = drv_disable_irq();
+#if	(KB_KEY_FLASH_PIN_MULTI_USE)
+	MSPI_AS_GPIO;
+#endif
+
+#if(!KB_LINE_MODE)
+	u32 drv_pin = drive_pins[drv_ind];
+	drv_gpio_write(drv_pin, KB_LINE_HIGH_VALID);
+	drv_gpio_output_en(drv_pin, 1);
+#endif
+
+	u32 matrix = 0;
+	foreach_arr(j, scan_pins){
+		if(scan_pin_need & BIT(j)){
+			int key = !gpio_read_cache(scan_pins[j], gpio);
+			if(KB_LINE_HIGH_VALID != key) {
+				matrix |= (1 << j);
+			}
+		}
+	}
+	//WaitUs(KB_DRV_DELAY_TIME);
+	drv_gpio_read_all(gpio);
+	/*
+	 * set as spi mode  if using spi flash pin
+	 * */
+#if	(KB_KEY_FLASH_PIN_MULTI_USE)
+	MSPI_AS_SPI;
+#endif
+
+#if(!KB_LINE_MODE)
+	//float drive pin
+	//WaitUs(KB_SCAN_DELAY_TIME);
+	drv_gpio_write(drv_pin, 0);
+	drv_gpio_output_en(drv_pin, 0);
+#endif
+
+	//drv_restore_irq(sr);
+	return matrix;
+}
+
+u32 matrix_buff[4][ARRAY_SIZE(drive_pins)];
+int	matrix_wptr, matrix_rptr;
+
+u32 kb_scan_key(int numlock_status, int read_key){
+	u8 gpio[8];
+
+    scan_pin_need = kb_key_pressed(gpio);
+
+	if(scan_pin_need){
+		kb_event.cnt = 0;
+		kb_event.ctrl_key = 0;
+		kb_is_fn_pressed = 0;
+
+		u32 pressed_matrix[ARRAY_SIZE(drive_pins)] = {0};
+		kb_k_mp = kb_p_map[0];
+
+		kb_scan_row(0, gpio);
+
+		for(int i = 0; i <= ARRAY_SIZE(drive_pins); i++) {
+			u32 r = kb_scan_row(i < ARRAY_SIZE(drive_pins) ? i : 0, gpio);
+			if(i){
+				pressed_matrix[i - 1] = r;
+			}
+		}
+
+#if(KB_RM_GHOST_KEY_EN)
+		kb_rmv_ghost_key(&pressed_matrix[0]);
+#endif
+
+		u32 key_changed = key_debounce_filter(pressed_matrix, 1);
+
+		///////////////////////////////////////////////////////////////////
+		//	insert buffer here
+		//       key mapping requires NUMLOCK status
+		///////////////////////////////////////////////////////////////////
+		u32 *pd;
+		if(key_changed){
+			/////////// push to matrix buffer /////////////////////////
+			pd = matrix_buff[matrix_wptr & 3];
+			for(int k = 0; k < ARRAY_SIZE(drive_pins); k++){
+				*pd++ = pressed_matrix[k];
+			}
+			matrix_wptr = (matrix_wptr + 1) & 7;
+			if( ((matrix_wptr - matrix_rptr) & 7) > 4 ){	//overwrite older data
+				matrix_rptr = (matrix_wptr - 4) & 7;
+			}
+		}
+
+		if(numlock_status & KB_NUMLOCK_STATUS_INVALID){
+			return 1;		//return empty key
+		}
+
+		////////// read out //////////
+		if(matrix_wptr == matrix_rptr || !read_key){
+			return 0;			//buffer empty, no data
+		}
+		pd = matrix_buff[matrix_rptr&3];
+		matrix_rptr = (matrix_rptr + 1) & 7;
+
+		///////////////////////////////////////////////////////////////////
+
+#if(KB_ONLY_SINGLEKEY_SUPP)
+		kb_remap_key_code(pd, 2, &kb_event, numlock_status);
+		int multikey_pressed = 0;
+		// multi-key is invalid, that is assuming not press, that is last status
+		// do not set kb_event.cnt to zero, which may occur an bug, press A --> press AB --> Releae B
+		if(kb_event.cnt > 1){
+			kb_event.cnt = 0;
+			multikey_pressed = 1;
+		}
+#else
+		kb_remap_key_code(pd, KB_RETURN_KEY_MAX, &kb_event, numlock_status);
+#endif
+		return 1;
+	}
+
+    return 0;
+}
+#endif
+
+int kb_is_data_same(kb_data_t *a, kb_data_t *b){
+	if(!a || !b){
+		return 0;
+	}
+	if((a->cnt != b->cnt) || (a->ctrl_key != b->ctrl_key))
+		return 0;
+	foreach(i, a->cnt){
+		if(a->keycode[i] != b->keycode[i]){
+			return 0;
+		}
+	}
+	return 1;
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.h
new file mode 100644
index 00000000..e09a4a92
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_keyboard.h
@@ -0,0 +1,84 @@
+/********************************************************************************************************
+ * @file    drv_keyboard.h
+ *
+ * @brief   This is the header file for drv_keyboard
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+#define KB_RETURN_KEY_MAX					6
+#define	KB_NUMLOCK_STATUS_INVALID			BIT(7)
+
+typedef struct{
+	u8 cnt;
+	u8 ctrl_key;
+	u8 keycode[KB_RETURN_KEY_MAX];
+	//u8 padding[2];	//for 32bit padding, if KB_RETURN_KEY_MAX change, this should be changed
+}kb_data_t;
+
+typedef struct{
+	kb_data_t *last_send_data;
+	u32 last_send_time;
+	u8 resent_no_ack_cnt;
+	u8 key_pressed;
+	u8 frame_no;
+	u8 ack_frame_no;
+}rf_kb_ctrl_t;
+
+typedef struct{
+	u8 val_org;
+	u8 val_chg;
+	u8 this_pressed;
+	u8 last_pressed;
+	u32 longpress_th;
+	u32 press_start_time;
+	u8 longpressed;
+	u8 processed;
+}kb_longpress_ctrl_t;
+
+enum{
+    KB_NOT_LONGPRESS,
+	KB_IS_LONGPRESS,
+    KB_KEY_RELEASE,
+};
+
+extern kb_data_t kb_event;
+
+
+
+static inline unsigned int gpio_read_cache(u32 pin, u8 *p){
+	return p[pin>>8] & (pin & 0xff);
+}
+
+static inline int kb_is_key_valid(kb_data_t *p){
+	return (p->cnt || p->ctrl_key);
+}
+static inline void kb_set_key_invalid(kb_data_t *p){
+	p->cnt = p->ctrl_key = 0;
+}
+
+
+int kb_is_data_same(kb_data_t *a, kb_data_t *b);
+
+u32 kb_scan_key(int numlock_status, int read_key);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.c
new file mode 100644
index 00000000..bfcaf871
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.c
@@ -0,0 +1,1077 @@
+/********************************************************************************************************
+ * @file    drv_nv.c
+ *
+ * @brief   This is the source file for drv_nv
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if FLASH_CAP_SIZE_1M
+u32 g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_1M;
+u32 g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_1M;
+#elif FLASH_CAP_SIZE_2M
+u32 g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_2M;
+u32 g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_2M;
+#elif FLASH_CAP_SIZE_4M
+u32 g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_4M;
+u32 g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_4M;
+#else
+u32 g_u32MacFlashAddr = FLASH_ADDR_OF_MAC_ADDR_512K;
+u32 g_u32CfgFlashAddr = FLASH_ADDR_OF_F_CFG_INFO_512K;
+#endif
+
+
+#define NV_ITEM_LEN_CHK_TABBLE_NUM	 16
+
+#define UPDATE_FRAMECOUNT_THRES		 1024
+
+typedef struct{
+	u8   itemId;
+	u16  len;
+}nv_itemLenChk_t;
+
+enum{
+	NV_ERASE_NONE = 0x00,
+	NV_ERASE_ALL = 0x55,
+	NV_ERASE_FOR_FN = 0x33,
+}nv_erase_mode_e;
+
+
+
+#define SECT_VALID_CHECK(s)                 (s.usedFlag == NV_SECTOR_VALID || \
+		                                     s.usedFlag == NV_SECTOR_VALID_CHECKCRC)
+
+#define ITEM_VALID_FLAG_CHECK(v)  			(v == ITEM_FIELD_VALID ||   \
+		                           	   	   	 v == ITEM_FIELD_VALID_SINGLE)
+
+#define ITEM_FLAG_CHECK(v)  				(v == ITEM_FIELD_VALID ||   \
+		                     	 	 	 	 v == ITEM_FIELD_VALID_SINGLE || \
+		                     	 	 	 	 v == ITEM_FIELD_INVALID || \
+		                     	 	 	 	 v == ITEM_FIELD_OPERATION)
+
+
+#define ITEM_OFT_CHECK(oft, size, id, sec)  (((oft >= MODULE_CONTEXT_START(id, sec, 0)) &&   \
+	                                         (oft < MODULE_SECT_END(id, sec))) && \
+		                                    ((MODULE_SECT_END(id, sec) - oft) >= size))
+
+#define ITEM_HDR_VALID_CHECK(v)             (v == ITEM_HDR_FIELD_VALID_CHECKSUM ||   \
+                                             v == ITEM_HDR_FIELD_VALID_CHECKCRC)
+
+#define  NV_ITEMLEN_MATCH(len, unitLen) ((len % unitLen) ? FALSE : TRUE)
+
+static u8 g_nvItemLengthCheckNum = 0;
+
+
+
+nv_itemLenChk_t  g_nvItemLenCheckTbl[NV_ITEM_LEN_CHK_TABBLE_NUM];
+
+
+
+void nv_itemLengthCheckAdd(u8 itemId, u16 len){
+	for(s32 i = 0; i < g_nvItemLengthCheckNum; i++){
+		if(itemId == g_nvItemLenCheckTbl[i].itemId){
+			g_nvItemLenCheckTbl[i].len = len;
+			return;
+		}
+	}
+	if(g_nvItemLengthCheckNum >= NV_ITEM_LEN_CHK_TABBLE_NUM){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_NV_CHECK_TABLE_FULL);
+		return;
+	}
+	g_nvItemLenCheckTbl[g_nvItemLengthCheckNum].itemId = itemId;
+	g_nvItemLenCheckTbl[g_nvItemLengthCheckNum].len = len;
+	g_nvItemLengthCheckNum++;
+}
+
+u16 nv_itemLengthValidCheck(u8 itemId, u16 len){
+	for(s32 i= 0; i < NV_ITEM_LEN_CHK_TABBLE_NUM; i++){
+		if(g_nvItemLenCheckTbl[i].itemId == itemId){
+			return min2(g_nvItemLenCheckTbl[i].len , len);
+		}
+	}
+	return len;
+}
+
+static nv_sts_t nv_sect_info_check(u8 sect, u16 id){
+	u32 sectStartAddr = MODULE_SECT_START(id, sect);
+	nv_sect_info_t s;
+
+	flash_read(sectStartAddr, sizeof(nv_sect_info_t), (u8*)&s);
+
+	if(!SECT_VALID_CHECK(s)){
+		return NV_MODULE_NOT_FOUND;
+	}
+	return NV_SUCC;
+}
+
+
+static nv_sts_t nv_index_read_op(u16 id, u8 itemId, u16 *itemLen, u8 opSect, u32 totalItemNum, u16 *idxNo, bool lenCheck){
+	nv_sts_t ret = NV_SUCC;
+	u32 idxTotalNum = totalItemNum;
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect) + (idxTotalNum) * sizeof(nv_info_idx_t);
+	u16 opItemIdx = idxTotalNum;
+	u16 readIdxNum = 4;
+	nv_info_idx_t idxInfo[4];
+	u8 jump = 0;
+	u8 itemFlag = ITEM_FIELD_VALID;
+	u16 len = *itemLen;
+	u16 itemTotalSize = ITEM_TOTAL_LEN(len);
+
+	if(itemId == ITEM_FIELD_IDLE){
+		itemFlag = ITEM_FIELD_IDLE;
+		itemTotalSize = 0xffff;
+	}
+
+	ret = NV_ITEM_NOT_FOUND;
+	s32 i = 0;
+	while(idxTotalNum > 0){
+		readIdxNum = (idxTotalNum > 4) ? 4 : idxTotalNum;
+		idxStartAddr -= readIdxNum * sizeof(nv_info_idx_t);
+		opItemIdx -= readIdxNum;
+		idxTotalNum -= readIdxNum;
+		flash_read(idxStartAddr, readIdxNum * sizeof(nv_info_idx_t), (u8*)idxInfo);
+		for(i = readIdxNum - 1; i >= 0; i--){
+			if(itemId != ITEM_FIELD_IDLE){
+				if(ITEM_VALID_FLAG_CHECK(idxInfo[i].usedState) &&
+					idxInfo[i].itemId == itemId){
+					if(lenCheck){
+						if(NV_ITEMLEN_MATCH((idxInfo[i].size - sizeof(itemHdr_t)), len)){
+							jump = 1;
+							break;
+						}
+					}else{
+						*itemLen = idxInfo[i].size - sizeof(itemHdr_t);
+						ret = NV_SUCC;
+						break;
+					}
+				}
+			}else{
+				if(idxInfo[i].usedState != itemFlag || idxInfo[i].size != itemTotalSize || idxInfo[i].itemId != itemId){
+					jump = 1;
+					break;
+				}
+			}
+		}
+		if(jump){
+			opItemIdx += i;
+			*idxNo = opItemIdx;
+			ret = NV_SUCC;
+			break;
+		}
+	}
+
+	return ret;
+}
+
+nv_sts_t nv_index_read(u16 id, u8 itemId, u16 len, u8 opSect, u32 totalItemNum, u16 *idxNo){
+	return nv_index_read_op(id, itemId, &len, opSect, totalItemNum, idxNo, 1);
+}
+
+
+static inline bool nv_sectInfoCrcCheck(nv_sect_info_t s){
+	u32 sectCrc = 0xffffffff;
+	u8 crcR = 0;
+
+	crcR = (s.opSect >> NV_SECT_INFO_SECTNO_BITS) & NV_SECT_INFO_CHECK_BITMASK;
+	s.opSect &= NV_SECT_INFO_SECTNO_BITMASK;
+	sectCrc = xcrc32(&s.idName, 2, sectCrc);
+	if((sectCrc & NV_SECT_INFO_CHECK_BITMASK) == crcR){
+		return TRUE;
+	}else{
+		return FALSE;
+	}
+}
+
+nv_sts_t nv_sector_read(u16 id, u8 sectTotalNum, nv_sect_info_t *sectInfo){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t s;
+	u32 moduleStartAddr = MODULES_START_ADDR(id);
+	s32 i = 0;
+	u8 sectNo = 0;
+	u8 bitValid = 0;
+	for(s32 i = 0; i < NV_SECT_INFO_SECTNO_BITS; i++){
+		bitValid |= (1 << i);
+	}
+
+	for(i = 0; i < sectTotalNum; i++){
+		flash_read(moduleStartAddr, sizeof(nv_sect_info_t), (u8 *)&s);
+		sectNo = (s.opSect & bitValid);
+
+		if(s.usedFlag == NV_SECTOR_VALID_READY_CHECKCRC){
+			if(nv_sectInfoCrcCheck(s)){
+				/* if another sector is valid, set it as invalid */
+				u8 sectDel = (sectNo + 1) & (MODULE_SECTOR_NUM - 1);
+				s.usedFlag = NV_SECTOR_INVALID;
+				if(flash_writeWithCheck(MODULE_SECT_START(id, sectDel), sizeof(s.usedFlag), (u8 *)&s.usedFlag) == TRUE){
+					/* set itself as valid */
+					s.usedFlag = NV_SECTOR_VALID_CHECKCRC;
+					flash_writeWithCheck(moduleStartAddr, sizeof(s.usedFlag), (u8 *)&s.usedFlag);
+				}
+
+				s.opSect = sectNo;
+				memcpy(sectInfo, &s, sizeof(nv_sect_info_t));
+				break;
+			}
+		}else{
+			if((SECT_VALID_CHECK(s)) && s.idName == id){
+				if(s.usedFlag == NV_SECTOR_VALID_CHECKCRC){
+					if(nv_sectInfoCrcCheck(s)){
+						s.opSect = sectNo;
+						memcpy(sectInfo, &s, sizeof(nv_sect_info_t));
+						break;
+					}
+				}else{
+					s.opSect = sectNo;
+					memcpy(sectInfo, &s, sizeof(nv_sect_info_t));
+					break;
+				}
+			}
+		}
+
+		moduleStartAddr += NV_SECTOR_SIZE(id);
+	}
+	if( i == sectTotalNum){
+		ret = NV_ITEM_NOT_FOUND;
+	}
+	return ret;
+}
+
+
+nv_sts_t nv_write_item(u8 single, u16 id, u8 itemId, u8 opSect, u16 opItemIdx, u16 len, u8 *buf, bool isFlashCopy){
+	/* write index to flash */
+	nv_info_idx_t idxInfo;
+	memset((u8 *)&idxInfo, 0, sizeof(nv_info_idx_t));
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect);
+	u32 offset = 0;
+	u32 crcOri = 0xffffffff;
+	u32 crcDst = 0xffffffff;
+	itemHdr_t hdr;
+
+	if(opItemIdx == 0){
+		offset = MODULE_CONTEXT_START(id, opSect, len);
+	}else{
+		flash_read(idxStartAddr + (opItemIdx - 1)*sizeof(nv_info_idx_t), sizeof(nv_info_idx_t), (u8*)&idxInfo);
+
+		/* check item idex */
+		flash_read(idxInfo.offset, sizeof(itemHdr_t), (u8 *)&hdr);
+		if(hdr.used == ITEM_HDR_FIELD_VALID_CHECKCRC){
+			crcOri = 0xffffffff;
+			crcOri = xcrc32((u8 *)&idxInfo, sizeof(nv_info_idx_t)-1, crcOri);
+			if((crcOri & 0xffff) != ((hdr.checkSum >> 16)&0xffff)){
+				return NV_ITEM_CHECK_ERROR;
+			}
+		}
+		if(ITEM_FLAG_CHECK(idxInfo.usedState) && ITEM_OFT_CHECK(idxInfo.offset, idxInfo.size, id, opSect)){
+			offset = ((idxInfo.offset + idxInfo.size + 3) & (~0x03));
+		}else{
+			return NV_ITEM_CHECK_ERROR;
+		}
+	}
+	idxInfo.usedState = ITEM_FIELD_OPERATION;
+	idxInfo.size = len + sizeof(itemHdr_t);
+	idxInfo.offset = offset;
+	idxInfo.itemId = itemId;
+
+	if(!ITEM_OFT_CHECK(idxInfo.offset, idxInfo.size, id, opSect)){
+		return NV_ITEM_CHECK_ERROR;
+	}
+	if(flash_writeWithCheck(idxStartAddr+opItemIdx*sizeof(nv_info_idx_t), sizeof(nv_info_idx_t), (u8 *)&idxInfo) != TRUE){
+		return NV_ITEM_CHECK_ERROR;
+	}
+
+	/* write context to flash */
+	if(isFlashCopy){
+		/* if need copy th data from flash, read it into ram, and then write it to flash */
+		u8 copyLen = 48;
+		u8 pTemp[48];
+
+		u8 wLen = 0;
+		s32 toalLen = idxInfo.size - sizeof(itemHdr_t); //len;
+		u32 sAddr = (u32)buf;
+		u32 dAddr = idxInfo.offset + sizeof(itemHdr_t);
+		u32 checkSum = 0;
+		crcOri = 0xffffffff;
+		u32 crcOld = 0xffffffff;
+		flash_read(sAddr, sizeof(itemHdr_t), (u8 *)&hdr);
+		sAddr += sizeof(itemHdr_t);
+
+		while(toalLen > 0){
+			wLen = (toalLen > copyLen) ? copyLen : toalLen;
+			flash_read(sAddr, wLen, pTemp);
+			if(hdr.used == ITEM_HDR_FIELD_VALID_CHECKSUM){
+				for(s32 i = 0; i < wLen; i++){
+					checkSum += pTemp[i];
+				}
+				crcOld = xcrc32(pTemp, wLen, crcOld);
+			}else{
+				crcOri = xcrc32(pTemp, wLen, crcOri);
+			}
+			if(flash_writeWithCheck(dAddr, wLen, pTemp) != TRUE){
+				return NV_CHECK_SUM_ERROR;
+			}
+
+			toalLen -= wLen;
+			sAddr += wLen;
+			dAddr += wLen;
+		}
+
+		if(hdr.used == ITEM_HDR_FIELD_VALID_CHECKSUM){
+			if(hdr.checkSum != checkSum){
+				return NV_DATA_CHECK_ERROR;
+			}
+			crcOri = crcOld;
+			hdr.used = ITEM_HDR_FIELD_VALID_CHECKCRC;
+			crcOri = xcrc32((u8 *)(&(hdr.size)), 4, crcOri);
+		}else{
+			crcOri = xcrc32((u8 *)(&(hdr.size)), 4, crcOri);
+			if((crcOri & 0xffff) != (hdr.checkSum&0xffff)){
+				return NV_DATA_CHECK_ERROR;
+			}
+		}
+	}else{
+		u32 payloadAddr = idxInfo.offset+sizeof(itemHdr_t);
+		crcOri = 0xffffffff;
+		crcDst = 0xffffffff;
+
+		crcOri = xcrc32(buf, len, crcOri);
+		flash_write(payloadAddr, len, buf);
+
+		/* check the checksum */
+		u8 vCheck[16];
+		s32 tLen = len;
+		u16 unitLen;
+
+		while(tLen > 0){
+			unitLen = (tLen > 16) ? 16 : tLen;
+			flash_read(payloadAddr, unitLen, vCheck);
+			crcDst = xcrc32(vCheck, unitLen, crcDst);
+			tLen -= unitLen;
+			payloadAddr += unitLen;
+		}
+
+		if(crcDst == crcOri){
+			hdr.itemId = itemId;
+			hdr.size = len;
+			hdr.used = ITEM_HDR_FIELD_VALID_CHECKCRC;
+			crcOri = xcrc32((u8 *)(&(hdr.size)), 4, crcOri);
+		}else{
+			return NV_CHECK_SUM_ERROR;
+		}
+	}
+
+	/* check the correct, if correct, change the state in the index */
+	idxInfo.usedState = ITEM_FIELD_VALID;
+	if(single){
+		idxInfo.usedState = ITEM_FIELD_VALID_SINGLE;
+	}
+
+	u32 crcIdx = 0xffffffff;
+	crcIdx = xcrc32((u8 *)&idxInfo, sizeof(nv_info_idx_t)-1, crcIdx);
+	hdr.checkSum = ((crcIdx & 0xffff ) << 16) | (crcOri & 0xffff);  //checkSum;
+
+	if(flash_writeWithCheck(idxInfo.offset, sizeof(itemHdr_t), (u8*)&hdr) != TRUE){
+		return NV_CHECK_SUM_ERROR;
+	}
+
+	u8 staOffset = OFFSETOF(nv_info_idx_t, usedState);
+	flash_writeWithCheck(idxStartAddr+opItemIdx*sizeof(nv_info_idx_t)+staOffset, 1, (u8 *)&idxInfo.usedState);
+
+	return NV_SUCC;
+}
+
+
+nv_sts_t nv_flashReadByIndex(u8 id, u8 itemId, u8 opSect, u16 opIdx, u16 len, u8 *buf){
+	nv_sts_t ret = NV_SUCC;
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect);
+	nv_info_idx_t idx;
+
+	flash_read(idxStartAddr + opIdx * sizeof(nv_info_idx_t), sizeof(nv_info_idx_t), (u8 *)&idx);
+	if(!ITEM_VALID_FLAG_CHECK(idx.usedState)){
+		return NV_ITEM_NOT_FOUND;
+	}
+
+	itemHdr_t hdr;
+	flash_read(idx.offset, sizeof(itemHdr_t), (u8*)&hdr);
+
+	bool lenMatch = NV_ITEMLEN_MATCH(hdr.size, len);
+	u16  realLen = nv_itemLengthValidCheck(itemId, hdr.size);
+	u32 readOft = 0;
+
+	if(lenMatch && (ITEM_HDR_VALID_CHECK(hdr.used)) && hdr.itemId == itemId){
+		flash_read(idx.offset + sizeof(itemHdr_t), realLen, buf);
+		readOft = idx.offset + sizeof(itemHdr_t) + realLen;
+
+		u8 pTemp[32] = {0};
+		u32 opLen = 0;
+		s32 leftSize = 0;
+
+		// check check_sum
+		if(hdr.used == ITEM_HDR_FIELD_VALID_CHECKSUM){
+			u32 checkSum = 0;
+
+			for(s32 i = 0; i < realLen; i++){
+				checkSum += buf[i];
+			}
+
+			if(realLen < hdr.size){
+				leftSize = hdr.size - realLen;
+				while(leftSize > 0){
+					opLen = (leftSize < 32) ? leftSize : 32;
+					flash_read(readOft, opLen, pTemp);
+					for(s32 i = 0; i < opLen; i++){
+						checkSum += pTemp[i];
+					}
+					leftSize -= opLen;
+					readOft += opLen;
+				}
+			}
+			if(checkSum != hdr.checkSum){
+				ret = NV_CHECK_SUM_ERROR;
+			}
+		}else{
+			u32 crcRead = 0xffffffff;
+			crcRead = xcrc32(buf, realLen, crcRead);
+
+			if(realLen < hdr.size){
+				leftSize = hdr.size - realLen;
+				while(leftSize > 0){
+					opLen = (leftSize < 32) ? leftSize : 32;
+					flash_read(readOft, opLen, pTemp);
+					crcRead = xcrc32(pTemp, opLen, crcRead);
+					leftSize -= opLen;
+					readOft += opLen;
+				}
+			}
+
+			crcRead = xcrc32((u8 *)(&(hdr.size)), 4, crcRead);
+			if((crcRead & 0xffff) != (hdr.checkSum & 0xffff)){
+				ret = NV_CHECK_SUM_ERROR;
+			}
+		}
+	}else{
+		ret = NV_ITEM_NOT_FOUND;
+	}
+	return ret;
+}
+
+nv_sts_t nv_itemDeleteByIndex(u8 id, u8 itemId, u8 opSect, u16 opIdx){
+	nv_sts_t ret = NV_SUCC;
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect);
+	nv_info_idx_t idx;
+	u8 staOffset = OFFSETOF(nv_info_idx_t, usedState);
+	idx.usedState = ITEM_FIELD_INVALID;
+	flash_write(idxStartAddr+opIdx*sizeof(nv_info_idx_t)+staOffset, 1, &(idx.usedState));
+	return ret;
+}
+
+nv_sts_t nv_flashSingleItemRemove(u8 id, u8 itemId, u16 len){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t sectInfo;
+	u8 opSect = 0;
+	s32 idxTotalNum = 0;
+	u16 opIdx = 0;
+
+	ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+	if(ret != NV_SUCC){
+		return ret;
+	}
+
+	opSect = sectInfo.opSect;
+	idxTotalNum = MODULE_IDX_NUM(id);
+
+	ret = NV_ITEM_NOT_FOUND;
+	ret = nv_index_read(id, itemId, len, opSect, idxTotalNum, &opIdx);
+	if(ret == NV_SUCC){
+		ret = nv_itemDeleteByIndex(id, itemId, opSect, opIdx);
+	}
+
+	return ret;
+}
+
+nv_sts_t nv_flashSingleItemSizeGet(u8 id, u8 itemId, u16 *len){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t sectInfo;
+	u8 opSect = 0;
+	s32 idxTotalNum = 0;
+	u16 opIdx = 0;
+
+	ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+	if(ret != NV_SUCC){
+		return ret;
+	}
+
+	opSect = sectInfo.opSect;
+	idxTotalNum = MODULE_IDX_NUM(id);
+
+	ret = NV_ITEM_NOT_FOUND;
+	ret = nv_index_read_op(id, itemId, len, opSect, idxTotalNum, &opIdx, 0);
+	return ret;
+}
+
+static void nv_exceptionDataHandler(bool single, u8 opSect, u16 id, u8 itemId, u16 len){
+	s16 idxTotalNum = MODULE_IDX_NUM(id);
+	s16 validNum = 0;
+	s16 opIdx = 0;
+	nv_info_idx_t idx;
+	u8 *idxTbl = ev_buf_allocate(idxTotalNum);
+	opIdx = idxTotalNum - 1;
+	bool add = 0;
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect);
+
+	if(idxTbl){
+		//T_nv_exceptionDataHandler[0]++;
+		memset(idxTbl, 0, idxTotalNum);
+		for(; opIdx >= 0; opIdx--){
+			flash_read(idxStartAddr + opIdx * sizeof(nv_info_idx_t), sizeof(nv_info_idx_t), (u8 *)&idx);
+			if(!ITEM_VALID_FLAG_CHECK(idx.usedState)){
+				continue;
+			}
+
+			add = 1;
+			if(idx.usedState == ITEM_FIELD_VALID_SINGLE || (idx.itemId == id && single)){
+				for(s32 i = 0; i < validNum; i++){
+					if(idx.itemId == idxTbl[i]){
+						nv_itemDeleteByIndex(id, itemId, opSect, opIdx);
+						add =0;
+						//T_nv_exceptionDataHandler[1]++;
+					}
+				}
+				if(add){
+					idxTbl[validNum++] = idx.itemId;
+				}
+			}
+		}
+		ev_buf_free(idxTbl);
+	}
+}
+
+
+static nv_sts_t nv_flashWriteNewHandler(bool forceChgSec, u8 single, u16 id, u8 itemId, u16 len, u8 *buf){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t sectInfo;
+	u8 opSect = 0;
+	u32 moduleStartAddr = MODULES_START_ADDR(id);
+
+	s32 i = 0;
+
+	/* check item length, if  */
+	if(NV_SECTOR_SIZE(id) < ITEM_TOTAL_LEN(len) + MODULE_INFO_SIZE(id)){
+		return NV_NOT_ENOUGH_SAPCE;
+	}
+
+	/* search valid operation sub-sector */
+	ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+	if(ret != NV_SUCC){
+		opSect = 0;
+		for(s32 j = 0; j < NV_SECTOR_SIZE(id)/FLASH_SECTOR_SIZE; j++){
+			flash_erase(moduleStartAddr + j * FLASH_SECTOR_SIZE);
+		}
+	}else{
+		opSect = sectInfo.opSect;
+	}
+
+
+	/*
+	 * search the index, find a valid space to write
+	 * read 4 indexes once */
+	u32 idxStartAddr = MODULE_IDX_START(id, opSect);
+	u16 wItemIdx = 0;
+	nv_info_idx_t idxInfo[4];
+	u8 sectorUpdate = 0;
+	s32 idxTotalNum = MODULE_IDX_NUM(id);
+	itemHdr_t hdr;
+
+	if(forceChgSec){
+		sectorUpdate = 1;
+	}else{
+		ret = nv_index_read(id, ITEM_FIELD_IDLE, len, opSect, idxTotalNum, &wItemIdx);
+		if(ret == NV_SUCC){
+			flash_read(idxStartAddr + wItemIdx * sizeof(nv_info_idx_t), sizeof(nv_info_idx_t), (u8 *)idxInfo );
+
+			if((wItemIdx == idxTotalNum - 1) ||
+					(idxInfo[0].offset + idxInfo[0].size + ITEM_TOTAL_LEN(len)) > MODULE_SECT_END(id, opSect)){
+				sectorUpdate = 1;
+			}else{
+				if(ITEM_FLAG_CHECK(idxInfo[0].usedState) && ITEM_OFT_CHECK(idxInfo[0].offset, idxInfo[0].size, id, opSect)){
+					wItemIdx += 1;
+				}else{
+					sectorUpdate = 1;
+				}
+			}
+		}
+	}
+
+	u8 oldSect = opSect;
+	if(sectorUpdate){
+		wItemIdx = 0;
+		opSect = (opSect + 1) & (MODULE_SECTOR_NUM - 1);
+
+		u8 nv_realSectNum = NV_SECTOR_SIZE(id)/FLASH_SECTOR_SIZE;
+		u32 eraseAddr = moduleStartAddr + opSect * NV_SECTOR_SIZE(id);
+		for(s32 k = 0; k < nv_realSectNum; k++){
+			//flash_erase(moduleStartAddr + opSect * FLASH_SECTOR_SIZE);
+			flash_erase(eraseAddr);
+			eraseAddr += FLASH_SECTOR_SIZE;
+		}
+
+		u32 sizeusedAddr = 0;
+		u8 readIdxNum = 0;
+		bool startChk = 1;
+		bool search = 1;
+		u32 offsetPrev = 0;
+		u32 sizePrev = 0;
+		sizeusedAddr = MODULE_CONTEXT_START(id, opSect, len);
+		idxStartAddr = MODULE_IDX_START(id, oldSect);
+		idxTotalNum = MODULE_IDX_NUM(id);
+		/* copy valid items to new sector */
+		nv_exceptionDataHandler(single, oldSect, id, itemId, len);
+
+		ret = nv_sect_info_check(oldSect, id);
+		if(ret == NV_SUCC){
+			while(idxTotalNum > 0 && search){
+				readIdxNum = (idxTotalNum > 4) ? 4 : idxTotalNum;
+				flash_read(idxStartAddr, readIdxNum * sizeof(nv_info_idx_t), (u8*)idxInfo);
+				for( i = 0; i < readIdxNum; i++){
+					if(startChk){
+						if(idxInfo[i].offset != MODULE_CONTEXT_START(id, oldSect, len) ||
+						  (MODULE_SECT_END(id, oldSect)-idxInfo[i].offset) < idxInfo[i].size){
+							search = 0;
+							break;
+						}
+
+						startChk = 0;
+						offsetPrev = idxInfo[i].offset;
+						sizePrev = idxInfo[i].size;
+					}else{
+						if(idxInfo[i].offset != (((offsetPrev + sizePrev)+0x03)&(~0x03)) ||
+						  (MODULE_SECT_END(id, oldSect)-idxInfo[i].offset) < idxInfo[i].size){
+							search = 0;
+							break;
+						}
+						offsetPrev = idxInfo[i].offset;
+						sizePrev = idxInfo[i].size;
+					}
+
+					if(ITEM_VALID_FLAG_CHECK(idxInfo[i].usedState) &&
+						(idxInfo[i].itemId != itemId || ((idxInfo[i].itemId == itemId) && !single))){
+						u8 sgl = (idxInfo[i].usedState == ITEM_FIELD_VALID_SINGLE);
+
+						/* read item header, valid it */
+						flash_read(idxInfo[i].offset, sizeof(itemHdr_t), (u8 *)&hdr);
+						if(hdr.used == ITEM_HDR_FIELD_VALID_CHECKCRC){
+							u32 crcIdx = 0xffffffff;
+							crcIdx = xcrc32((u8 *)&idxInfo[i], sizeof(nv_info_idx_t)-1, crcIdx);
+							if((crcIdx & 0xffff) != ((hdr.checkSum >> 16)&0xffff)){
+								continue;
+							}
+						}
+
+						ret = nv_write_item(sgl, id, idxInfo[i].itemId, opSect, wItemIdx, idxInfo[i].size-sizeof(itemHdr_t), (u8*)idxInfo[i].offset, TRUE);
+						if(ret != NV_SUCC){
+							if(ret == NV_ITEM_CHECK_ERROR){
+								search = 0;
+								break;
+							}else if(ret == NV_NOT_ENOUGH_SAPCE || ret == NV_CHECK_SUM_ERROR){
+								return ret;
+							}else{
+								continue;
+							}
+						}
+						sizeusedAddr += idxInfo[i].size;
+						sizeusedAddr = ((sizeusedAddr + 0x03) & (~0x03));
+						wItemIdx += 1;
+					}
+				}
+				idxTotalNum -= readIdxNum;
+				idxStartAddr += readIdxNum * sizeof(nv_info_idx_t);
+			}
+		}
+
+		idxTotalNum = MODULE_IDX_NUM(id);
+		if(wItemIdx == idxTotalNum || (sizeusedAddr + ITEM_TOTAL_LEN(len)) > MODULE_SECT_END(id, opSect)){
+			return NV_NOT_ENOUGH_SAPCE;
+		}
+	}
+
+
+	/* search the same item id, need to delete after update */
+	u8 deleteItemEn = 0;
+	u16 deleteIdx = 0;
+	idxTotalNum = MODULE_IDX_NUM(id);
+	if(single){
+		if(NV_SUCC == nv_index_read(id, itemId, len, opSect, idxTotalNum, &deleteIdx)){
+			deleteItemEn = 1;
+		}
+	}
+
+	/* sector is full, and then need write in the another sector */
+	ret = nv_write_item(single, id, itemId, opSect, wItemIdx, len, buf, FALSE);
+	if(ret != NV_SUCC){
+		return ret;
+	}
+
+	/* the last item set as invalid */
+	idxStartAddr = MODULE_IDX_START(id, opSect);
+	if(deleteItemEn){
+		u8 staOffset = OFFSETOF(nv_info_idx_t, usedState);
+		idxInfo[0].usedState = ITEM_FIELD_INVALID;
+		if(flash_writeWithCheck(idxStartAddr+deleteIdx*sizeof(nv_info_idx_t)+staOffset, 1, &(idxInfo[0].usedState)) != TRUE){
+			return NV_CHECK_SUM_ERROR;
+		}
+	}
+
+
+	if(ret == NV_SUCC){
+		if(sectorUpdate){
+			sectInfo.idName = id;
+
+			sectInfo.usedFlag = NV_SECTOR_VALID_READY_CHECKCRC;
+			sectInfo.opSect = opSect;
+
+			u32 sectCrc = 0xffffffff;
+			sectCrc = xcrc32(&(sectInfo.idName), 2, sectCrc);   //add (idName, opsect) to crc validation
+			sectCrc = sectCrc & 0x3f;
+			sectInfo.opSect = (sectCrc << NV_SECT_INFO_SECTNO_BITS) | sectInfo.opSect;
+			if(flash_writeWithCheck(MODULE_SECT_START(id, opSect), sizeof(nv_sect_info_t), (u8*)&sectInfo) != TRUE){
+				return NV_CHECK_SUM_ERROR;
+			}
+
+			sectInfo.usedFlag = NV_SECTOR_INVALID;
+			if(flash_writeWithCheck(MODULE_SECT_START(id, oldSect), sizeof(sectInfo.usedFlag), (u8*)&sectInfo.usedFlag) == TRUE){
+				sectInfo.usedFlag = NV_SECTOR_VALID_CHECKCRC;
+				flash_writeWithCheck(MODULE_SECT_START(id, opSect), sizeof(sectInfo.usedFlag), (u8*)&sectInfo.usedFlag);
+			}
+		}else{
+			 if(wItemIdx == 0){
+				sectInfo.idName = id;
+				sectInfo.usedFlag = NV_SECTOR_VALID_CHECKCRC;
+				sectInfo.opSect = opSect;
+
+				u32 sectCrc = 0xffffffff;
+				sectCrc = xcrc32(&(sectInfo.idName), 2, sectCrc);  //add (idName, opsect) to crc validation
+				sectInfo.opSect = (sectCrc << NV_SECT_INFO_SECTNO_BITS) | sectInfo.opSect;
+				flash_writeWithCheck(MODULE_SECT_START(id, opSect), sizeof(nv_sect_info_t), (u8*)&sectInfo);
+			 }
+		}
+	}
+
+	return ret;
+}
+
+nv_sts_t nv_flashWriteNew(u8 single, u16 id, u8 itemId, u16 len, u8 *buf){
+	if(id == NV_MODULE_NWK_FRAME_COUNT){
+		return NV_INVALID_MODULS;
+	}
+
+	nv_sts_t ret = nv_flashWriteNewHandler(0, single, id, itemId, len, buf);
+
+	if(ret == NV_ITEM_CHECK_ERROR){
+		ret = nv_flashWriteNewHandler(1, single, id, itemId, len, buf);
+	}
+
+	return ret;
+}
+
+
+nv_sts_t nv_flashReadNew(u8 single, u8 id, u8 itemId, u16 len, u8 *buf){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t sectInfo;
+	u8 opSect = 0;
+	s32 idxTotalNum = 0;
+	u16 opIdx = 0;
+
+	if(id == NV_MODULE_NWK_FRAME_COUNT){
+		return NV_INVALID_MODULS;
+	}
+
+	ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+	if(ret != NV_SUCC){
+		return ret;
+	}
+
+	opSect = sectInfo.opSect;
+	idxTotalNum = MODULE_IDX_NUM(id);
+
+	ret = NV_ITEM_NOT_FOUND;
+	ret = nv_index_read(id, itemId, len, opSect, idxTotalNum, &opIdx);
+	if(single){
+		if(ret == NV_SUCC){
+			ret = nv_flashReadByIndex(id, itemId, opSect, opIdx, len, buf);
+			if(ret == NV_CHECK_SUM_ERROR){
+				nv_itemDeleteByIndex(id, itemId, opSect, opIdx);
+			}
+		}
+	}else{
+		itemIfno_t *pInfo = (itemIfno_t*)buf;
+		pInfo->opIndex = opIdx;
+		pInfo->opSect = opSect;
+	}
+
+	return ret;
+}
+
+
+nv_sts_t nv_nwkFrameCountSearch(u8 id, u8 opSect, u32 *frameCount, u32 *validAddr){
+	nv_sts_t ret = NV_ITEM_NOT_FOUND;
+	u16 frmCntTotalNum = FRAMECOUNT_NUM_PER_SECT();
+	u32 sizeUsed = frmCntTotalNum * 4;
+	u32 pageUsed = (sizeUsed & 0xff) ? sizeUsed/FLASH_PAGE_SIZE+1 : sizeUsed/FLASH_PAGE_SIZE;
+	u16 checkSize = 0;
+	*validAddr = FRAMECOUNT_PAYLOAD_START(opSect);
+
+	u32 *opPageAddr = (u32 *)(MODULE_SECT_END(id, opSect) - FLASH_PAGE_SIZE);
+	s32 i = 0;
+	u32 checkValid[4];
+
+	for(i = 0; i < pageUsed-1; i++){
+		flash_read((u32)opPageAddr, 4, (u8 *)checkValid);
+		if(checkValid[0] != 0xffffffff){
+			checkSize = FLASH_PAGE_SIZE;
+			break;
+		}else{
+			*validAddr = (u32)opPageAddr;	//???validAddr = opPageAddr;
+		}
+		opPageAddr -= FLASH_PAGE_SIZE/4;
+	}
+	if( i == pageUsed-1){
+		opPageAddr = (u32 *)(FRAMECOUNT_PAYLOAD_START(opSect));
+		checkSize = (FLASH_PAGE_SIZE - sizeof(nv_sect_info_t)) & (~0x03);
+	}
+
+	opPageAddr = (u32 *)(((u32)opPageAddr + FLASH_PAGE_SIZE) & (~(FLASH_PAGE_SIZE - 1)));
+	u8 unitSize = 16;
+	while(checkSize){
+		u8 readSize = (checkSize > unitSize) ? unitSize : checkSize;
+		opPageAddr -= readSize/4;
+		checkSize -= readSize;
+
+		flash_read((u32)opPageAddr, readSize, (u8 *)checkValid);
+		if(checkValid[0] != 0xffffffff){
+			*frameCount = checkValid[0];
+			for(s32 i = 1; i < readSize/4; i++){
+				if(checkValid[i] != 0xffffffff){
+					*frameCount = checkValid[i];
+					if(i == (readSize/4 - 1)){
+						*validAddr = (u32)(opPageAddr + i + 1);
+						return NV_SUCC;
+					}
+				}else{
+					*validAddr = (u32)(opPageAddr + i);
+					return NV_SUCC;
+				}
+			}
+		}else{
+			*validAddr = (u32)opPageAddr;
+		}
+	}
+
+	return ret;
+}
+
+
+nv_sts_t nv_nwkFrameCountSaveToFlashHandler(bool forceChgSec, u8 *errSect, u32 frameCount){
+	nv_sts_t ret = NV_SUCC;
+	nv_sect_info_t sectInfo;
+	u8 opSect = 0;
+	u8 id = NV_MODULE_NWK_FRAME_COUNT;
+	u32 moduleStartAddr = MODULES_START_ADDR(id);
+
+	/* search valid operation sub-sector */
+	if(forceChgSec){
+		opSect = (*errSect + 1) & (MODULE_SECTOR_NUM - 1);
+		u8 nv_realSectNum = NV_SECTOR_SIZE(id)/FLASH_SECTOR_SIZE;
+		u32 eraseAddr = moduleStartAddr + opSect * NV_SECTOR_SIZE(id);
+		for(s32 k = 0; k < nv_realSectNum; k++){
+			//flash_erase(moduleStartAddr + opSect * FLASH_SECTOR_SIZE);
+			flash_erase(eraseAddr);
+			eraseAddr += FLASH_SECTOR_SIZE;
+		}
+
+	}else{
+		ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+		if(ret != NV_SUCC){
+			for(s32 j = 0; j < MODULE_SECTOR_NUM; j++){
+				flash_erase(moduleStartAddr + j * FLASH_SECTOR_SIZE);
+			}
+			opSect = 0;
+		}else{
+			opSect = sectInfo.opSect;
+		}
+	}
+
+	u32 lastFrmCnt;
+	u32 wAddr;
+	u8 oldSect = opSect;
+	u8 sectorUpdate = 0;
+	if(NV_SUCC == nv_nwkFrameCountSearch(id, opSect, &lastFrmCnt, &wAddr)){
+		if(wAddr == (MODULE_SECT_END(id, opSect))){
+			opSect = (opSect + 1) & (MODULE_SECTOR_NUM - 1);
+			flash_erase(moduleStartAddr + opSect * FLASH_SECTOR_SIZE);
+
+			if(flash_writeWithCheck(FRAMECOUNT_PAYLOAD_START(opSect), 4, (u8*)&lastFrmCnt) != TRUE){
+				return NV_CHECK_SUM_ERROR;
+			}
+
+			wAddr = FRAMECOUNT_PAYLOAD_START(opSect) + 4;
+			sectorUpdate = 1;
+		}
+	}
+
+	if(flash_writeWithCheck(wAddr, 4, (u8*)&frameCount) != TRUE){
+		return NV_CHECK_SUM_ERROR;
+	}
+
+	if(sectorUpdate || (wAddr == FRAMECOUNT_PAYLOAD_START(opSect))){
+		sectInfo.idName = id;
+		sectInfo.usedFlag = NV_SECTOR_VALID_READY_CHECKCRC;
+		sectInfo.opSect = opSect;
+		u32 sectCrc = 0xffffffff;
+		sectCrc = xcrc32(&(sectInfo.idName), 2, sectCrc);   //add (idName, opsect) to crc validation
+		sectCrc = sectCrc & 0x3f;
+		sectInfo.opSect = (sectCrc << NV_SECT_INFO_SECTNO_BITS) | sectInfo.opSect;
+		if(flash_writeWithCheck(MODULE_SECT_START(id, opSect), sizeof(nv_sect_info_t), (u8*)&sectInfo) != TRUE){
+			return NV_CHECK_SUM_ERROR;
+		}
+
+		if(sectorUpdate || forceChgSec){
+			if(forceChgSec){
+				oldSect = *errSect;
+			}
+			sectInfo.usedFlag = NV_SECTOR_INVALID;
+			if(flash_writeWithCheck((u32)MODULE_SECT_START(id, oldSect), sizeof(sectInfo.usedFlag), (u8 *)&sectInfo.usedFlag) != TRUE){
+				return NV_CHECK_SUM_ERROR;
+			}
+
+			sectInfo.usedFlag = NV_SECTOR_VALID_CHECKCRC;
+			flash_writeWithCheck((u32)MODULE_SECT_START(id, opSect), sizeof(sectInfo.usedFlag), (u8 *)&sectInfo.usedFlag);
+		}
+	}
+
+	return ret;
+}
+
+nv_sts_t nv_nwkFrameCountSaveToFlash(u32 frameCount){
+	u8 sect = 0xff;
+	nv_sts_t ret = nv_nwkFrameCountSaveToFlashHandler(0, &sect, frameCount);
+	if(ret == NV_CHECK_SUM_ERROR){
+		nv_nwkFrameCountSaveToFlashHandler(1, &sect, frameCount);
+	}
+	return NV_SUCC;
+}
+
+
+nv_sts_t nv_nwkFrameCountFromFlash(u32 *frameCount){
+	nv_sts_t ret = NV_SUCC;
+	u8 id = NV_MODULE_NWK_FRAME_COUNT;
+	nv_sect_info_t sectInfo;
+	u32 lastFrmCnt;
+	u32 wAddr;
+	u8 opSect = 0;
+
+	/* search valid operation sub-sector */
+	ret = nv_sector_read(id, MODULE_SECTOR_NUM, &sectInfo);
+	if(ret != NV_SUCC){
+		return ret;
+	}
+	opSect = sectInfo.opSect;
+
+	ret = nv_nwkFrameCountSearch(id, opSect, &lastFrmCnt, &wAddr);
+	if(ret == NV_SUCC){
+		*frameCount = lastFrmCnt;
+
+		if(wAddr > FRAMECOUNT_PAYLOAD_START(opSect) + 8){
+			u32 pCnt[2];
+			flash_read(wAddr-8, 8, (u8 *)pCnt);
+
+			if((pCnt[1] - pCnt[0]) > UPDATE_FRAMECOUNT_THRES){
+				/* backoff valid framecount to another sector */
+				*frameCount = pCnt[0]+UPDATE_FRAMECOUNT_THRES;
+				nv_nwkFrameCountSaveToFlashHandler(1, &opSect, pCnt[0]+UPDATE_FRAMECOUNT_THRES);
+			}
+		}
+	}
+
+	return ret;
+}
+
+nv_sts_t nv_resetModule(u8 modules){
+	u32 eraseAddr = MODULES_START_ADDR(modules);
+	u8 sectNumber = NV_SECTOR_SIZE(modules)/FLASH_SECTOR_SIZE;
+	for(s32 i = 0; i < MODULE_SECTOR_NUM; i++){
+		for(s32 j = 0; j < sectNumber; j++){
+			flash_erase(eraseAddr);
+			eraseAddr += FLASH_SECTOR_SIZE;
+		}
+	}
+	return SUCCESS;
+}
+
+
+nv_sts_t nv_resetAll(void){
+#if NV_ENABLE
+	foreach(i, NV_MAX_MODULS){
+		nv_resetModule(i);
+	}
+#endif
+	return SUCCESS;
+}
+
+nv_sts_t nv_init(u8 rst){
+	if(rst){
+		/* if reset is true, erase all flash for NV */
+		nv_resetAll();
+	}
+	return NV_SUCC;
+}
+
+nv_sts_t nv_resetToFactoryNew(void){
+#if NV_ENABLE
+	if(!nv_facrotyNewRstFlagCheck()){
+		nv_facrotyNewRstFlagSet();
+	}
+
+	foreach(i, NV_MAX_MODULS){
+		if(i != NV_MODULE_NWK_FRAME_COUNT){
+			nv_resetModule(i);
+		}
+	}
+
+	nv_facrotyNewRstFlagClear();
+#endif
+	return SUCCESS;
+}
+
+bool nv_facrotyNewRstFlagCheck(void){
+	u8 flag = ITEM_FIELD_IDLE;
+	flash_read(CFG_FACTORY_RST_CNT, 1, &flag);
+
+	return ((flag == 0xff) ? FALSE : TRUE);
+}
+
+void nv_facrotyNewRstFlagSet(void){
+	u8 flag = ITEM_FIELD_VALID;
+	flash_writeWithCheck(CFG_FACTORY_RST_CNT, 1, &flag);
+}
+
+void nv_facrotyNewRstFlagClear(void){
+	flash_erase(CFG_FACTORY_RST_CNT);
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.h
new file mode 100644
index 00000000..e475ce00
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_nv.h
@@ -0,0 +1,439 @@
+/********************************************************************************************************
+ * @file    drv_nv.h
+ *
+ * @brief   This is the header file for drv_nv
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+/********************************************************************
+ * @brief	Flash map usage.
+ *
+* #if !defined(BOOT_LOADER_MODE) || (BOOT_LOADER_MODE == 0)
+ *																					  2M							  4M
+ *                                                                      0x200000  ------------       	0x400000  ------------
+ *	 				512k							  1M				    	 |  MAC_Addr  |      			 |  MAC_Addr  |
+ * 		0x80000  ------------			0x100000  ------------          0x1FF000 |------------|      	0x3FF000 |------------|
+ *	 			|		     |					 |  MAC_Addr  |     	    	 | F_CFG_Info |      			 | F_CFG_Info |
+ *	  		    |  	 NV_2 	 |			 0xFF000 |------------|         0x1FE000 |------------|  	    0x3FE000 |------------|
+ *	 		    |		     |					 | F_CFG_Info |     	   		 |	Reserved  |	       			 |	Reserved  |
+ *		0x7A000 |------------|			 0xFE000 |------------|     	 0xFE000 |------------| 	     0xFE000 |------------|
+ *	 		    | U_Cfg_Info |					 | U_Cfg_Info |     	   		 | U_Cfg_Info |      			 | U_Cfg_Info |
+ * 		0x78000 |------------|			 0xFC000 |------------|     	 0xFC000 |------------|      	 0xFC000 |------------|
+ *		   		| F_CFG_Info |					 |  Reserved  |     	    	 |  Reserved  |      			 |  Reserved  |
+ * 		0x77000 |------------|			 0x96000 |------------|     	 0x96000 |------------|      	 0x96000 |------------|
+ * 		   		|  MAC_Addr  |					 |     NV     |     	    	 |     NV     |      			 |     NV     |
+ * 		0x76000 |------------|			 0x80000 |------------|     	 0x80000 |------------|      	 0x80000 |------------|
+ * 		   		|		     |					 |			  |     	    	 |			  |      			 |			  |
+ * 		   		|  OTA_Image |					 |			  |     	    	 |			  |      			 |			  |
+ * 		   		|		     |					 |	OTA_Image |     	    	 |	OTA_Image |      			 |	OTA_Image |
+ * 		0x40000 |------------|					 |			  |     	    	 |			  |      			 |			  |
+ * 		   		|		     |					 |			  |     	    	 |			  |      			 |			  |
+ * 		   		|  	 NV_1 	 |			 0x40000 |------------|     	 0x40000 |------------|      	 0x40000 |------------|
+ * 		   		|		     |					 |			  |     	    	 |			  |      			 |			  |
+ * 		0x34000 |------------|					 |			  |     	    	 |			  |      			 |			  |
+ * 		   		|		     |					 |  Firmware  |     	    	 |  Firmware  |      			 |  Firmware  |
+ * 		   		|  Firmware  |	208k			 |			  | 256k	    	 |			  | 256k 			 |			  | 256k
+ * 		   		|		     |					 |			  |     	    	 |			  |         		 |			  |
+ * 		0x00000  ------------			 0x00000  ------------      	 0x00000  ------------           0x00000  ------------
+ *
+ *
+ *
+ * #else
+ *																					  2M							  4M
+ *                                                                      0x200000  ------------          0x400000  ------------
+ *	 				512k							  1M						 |  MAC_Addr  |         		 |  MAC_Addr  |
+ * 		0x80000  ------------			0x100000  ------------          0x1FF000 |------------|         0x3FF000 |------------|
+ *	 			|			 |					 |  MAC_Addr  |         		 | F_CFG_Info |         		 | F_CFG_Info |
+ *	 			|  	 NV_2 	 |			 0xFF000 |------------|         0x1FE000 |------------|         0x3FE000 |------------|
+ *	 			|			 |					 | F_CFG_Info |         		 |  Reserved  |         		 |  Reserved  |
+ *	 	0x7A000 |------------|			 0xFE000 |------------|          0xFE000 |------------|          0xFE000 |------------|
+ *	 			| U_Cfg_Info |					 | U_Cfg_Info |         		 | U_Cfg_Info |         		 | U_Cfg_Info |
+ *	 	0x78000 |------------|			 0xFC000 |------------|          0xFC000 |------------|          0xFC000 |------------|
+ *	 			| F_CFG_Info |					 |		      |         		 |		      |         		 |		      |
+ *	 	0x77000 |------------|					 |     NV     |         		 |     NV     |         		 |     NV     |
+ *	 			|  MAC_Addr  |					 |		      |         		 |		      |         		 |		      |
+ *	 	0x76000 |------------|			 0xE6000 |------------|          0xE6000 |------------|          0xE6000 |------------|
+ *	 			|		     |					 |		      |         		 |		      |         		 |		      |
+ *	 			|  	 NV_1	 |					 |		      |         		 |		      |         		 |		      |
+ *	 			|		     |					 |	OTA_Image |         		 |	OTA_Image |         		 |	OTA_Image |
+ *	 	0x6A000 |------------|					 |		      |         		 |		      |         		 |		      |
+ *	 			|		     |					 |		      |         		 |		      |         		 |		      |
+ *	 			|  OTA_Image |			 0x77000 |------------|          0x77000 |------------|          0x77000 |------------|
+ *	 			|		     |					 |		      |         		 |		      |         		 |		      |
+ *	 	0x39000 |------------|					 |		      |         		 |		      |         		 |		      |
+ *	 			|			 |					 |  Firmware  |         		 |  Firmware  |         		 |  Firmware  |
+ *	 			|  Firmware	 |	196k			 |		      | 444k    		 |		      | 444k    		 |		      | 444k
+ *	 			|			 |					 |		      |         		 |		      |         		 |		      |
+ *	 	0x08000 |------------|			 0x08000 |------------|          0x08000 |------------|          0x08000 |------------|
+ *	 			| BootLoader |					 | BootLoader |         		 | BootLoader |         		 | BootLoader |
+ *	 	0x00000  ------------			 0x00000  ------------           0x00000  ------------           0x00000  ------------
+ *
+ * #endif
+ */
+
+/* Flash Base Address define */
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define FLASH_TLNK_FLAG_OFFSET		8
+#elif defined(MCU_CORE_B91)
+	#define FLASH_TLNK_FLAG_OFFSET		32
+#endif
+
+
+
+/************************************************************************
+ * Flash address of factory setting parameters,
+ * where are stored the MAC ADDRESS and CALIBRATION information.
+ */
+//512k flash
+#define FLASH_ADDR_OF_MAC_ADDR_512K		0x76000
+#define FLASH_ADDR_OF_F_CFG_INFO_512K	0x77000
+//1M flash
+#define FLASH_ADDR_OF_MAC_ADDR_1M		0xFF000
+#define FLASH_ADDR_OF_F_CFG_INFO_1M		0xFE000
+//2M flash
+#define FLASH_ADDR_OF_MAC_ADDR_2M		0x1FF000
+#define FLASH_ADDR_OF_F_CFG_INFO_2M		0x1FE000
+//4M flash
+#define FLASH_ADDR_OF_MAC_ADDR_4M		0x3FF000
+#define FLASH_ADDR_OF_F_CFG_INFO_4M		0x3FE000
+
+/************************************************************************/
+extern u32 g_u32MacFlashAddr;
+extern u32 g_u32CfgFlashAddr;
+
+#define MAC_BASE_ADD					(g_u32MacFlashAddr)
+#define FACTORY_CFG_BASE_ADD			(g_u32CfgFlashAddr)
+/************************************************************************/
+
+/**************************************************************************************
+ * The following is the detailed factory configure information (F_CFG_Info).
+ */
+/* 8 bytes for MAC address. */
+#define CFG_MAC_ADDRESS              	(MAC_BASE_ADD)
+
+/* 2 bytes for USB ID. */
+#define CFG_TELINK_USB_ID				(MAC_BASE_ADD + 0x40)
+
+/* 1 byte for frequency offset calibration. */
+#define CFG_FREQUENCY_OFFSET			(FACTORY_CFG_BASE_ADD)
+
+/* 2 bytes for TP GAIN.
+ * 0x77040(or 0xFE040) for BLE TP_GAIN_0, 0x77041(or 0xFE041) for BLE TP_GAIN_1,
+ * 0x77042(or 0xFE042) for zigbee TP_GAIN_0, 0x77043(or 0xFE043) for zigbee TP_GAIN_1. */
+#define CFG_TP_GAIN                  	(FACTORY_CFG_BASE_ADD + 0x42)
+
+/* Not supported for current SDK. */
+#define CFG_32K_COUNTER_CALIBRATION	 	(FACTORY_CFG_BASE_ADD + 0x80)
+
+/* Not supported for current SDK. */
+#define CFG_ADC_CALIBRATION           	(FACTORY_CFG_BASE_ADD + 0xC0)
+
+/* Not supported for current SDK. */
+#define CFG_24M_CRYSTAL_CALIBRATION     (FACTORY_CFG_BASE_ADD + 0x100)
+
+/* Not supported for current SDK. */
+#define CFG_T_SENSOR_CALIBRATION     	(FACTORY_CFG_BASE_ADD + 0x140)
+
+/* UID-based Firmware Encryption data(16 bytes), 0x77180(or 0xFE180) ~ 0x7718F(or 0xFE18F). */
+#define CFG_FIRMWARE_ENCRYPTION			(FACTORY_CFG_BASE_ADD + 0x180)
+
+/* 2 bytes for VDD_F calibration.
+ * 0x771C0(or 0xFF1C0) for DCDC trim,
+ * 0x771C1(or 0xFF1C1) for LDO trim.
+ */
+#define CFG_VDD_F_CALIBRATION			(FACTORY_CFG_BASE_ADD + 0x1C0)
+
+
+/**************************************************************************************
+ * The following is the detailed user configure information (U_CFG_Info).
+ */
+/* 16 bytes for pre-install code. */
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+#define CFG_PRE_INSTALL_CODE			(0xFD000)
+#else
+#define CFG_PRE_INSTALL_CODE			(0x78000)
+#endif
+
+/* 1 byte for factory reset.
+ * If not 0xFF, means the device is doing factory reset(erase NV).
+ * The device will check this byte when powered on, if it is not 0xFF,
+ * it will erase NV first.
+ */
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+#define CFG_FACTORY_RST_CNT			  	(0xFC000)
+#else
+#define CFG_FACTORY_RST_CNT			  	(0x79000)
+#endif
+
+/**************************************************************************************
+ * Flash address of NV module.
+ */
+#if !defined(BOOT_LOADER_MODE) || (BOOT_LOADER_MODE == 0)
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+	#define NV_BASE_ADDRESS				(0x80000)
+#else
+	#define	NV_BASE_ADDRESS				(0x34000)
+	#define	NV_BASE_ADDRESS2			(0x7A000)
+#endif
+#else
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+	#define NV_BASE_ADDRESS				(0xE6000)
+#else
+	#define	NV_BASE_ADDRESS				(0x6A000)
+	#define	NV_BASE_ADDRESS2			(0x7A000)
+#endif
+#endif
+
+
+/************************************************************************
+ * Flash address of APP firmware.
+ */
+#define FLASH_ADDR_OF_APP_FW			APP_IMAGE_ADDR
+
+
+/************************************************************************
+ * Flash address of OTA image.
+ */
+#if !defined(BOOT_LOADER_MODE) || (BOOT_LOADER_MODE == 0)
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+	//max size = (0x80000 - 0) / 2 = 256k
+	#define FLASH_OTA_IMAGE_MAX_SIZE	((NV_BASE_ADDRESS - FLASH_ADDR_OF_APP_FW) / 2)
+#else
+	//max size = (0x34000 - 0) = 208k
+	#define FLASH_OTA_IMAGE_MAX_SIZE	(NV_BASE_ADDRESS - FLASH_ADDR_OF_APP_FW)
+#endif
+	//unchangeable address
+	#define FLASH_ADDR_OF_OTA_IMAGE		(0x40000)
+#else
+	//1M   Flash: max size = (0xE6000 - 0x8000) / 2 = 444k
+	//512k Flash: max size = (0x6A000 - 0x8000) / 2 = 196k
+	#define FLASH_OTA_IMAGE_MAX_SIZE	((NV_BASE_ADDRESS - FLASH_ADDR_OF_APP_FW) / 2)
+	//1M   Flash: ota addr = 0x8000 + 444k = 0x77000
+	//512k Flash: ota addr = 0x8000 + 196k = 0x39000
+	#define FLASH_ADDR_OF_OTA_IMAGE		(FLASH_ADDR_OF_APP_FW + FLASH_OTA_IMAGE_MAX_SIZE)
+#endif
+
+/******************************************* DUAL_MODE ********************************************************/
+/* Don't care, will be delete. */
+#if DUAL_MODE
+//NOTE: firmware must less then 192K if UDAL_MODE used
+typedef enum{
+	TYPE_TLK_MESH  						= 0x000000A3,// don't change, must same with telink mesh SDK
+	TYPE_SIG_MESH  						= 0x0000003A,// don't change, must same with telink mesh SDK
+	TYPE_TLK_BLE_SDK 					= 0x000000C3,// don't change, must same with telink mesh SDK
+	TYPE_TLK_ZIGBEE  					= 0x0000003C,// don't change, must same with telink mesh SDK
+	TYPE_DUAL_MODE_STANDBY				= 0x00000065,// dual mode state was standby to be selected
+	TYPE_DUAL_MODE_RECOVER 				= 0x00000056,// don't change, must same with telink mesh SDK, recover for mesh
+}telink_sdk_type_t;
+
+#define CFG_TELINK_SDK_TYPE				(0x73000)
+#define CFG_TELINK_SIG_MESH_CRC			(0x73040)
+#define CFG_TELINK_SIG_MESH_CODE_4K		(0x75000)
+#define CFG_TELINK_DUAL_MODE_ENABLE		(0x76080)
+#endif	/* DUAL_MODE */
+/******************************************** END ***********************************************************/
+
+
+
+
+#define NV_SECT_INFO_CHECK_BITS			6
+#define NV_SECT_INFO_CHECK_BITMASK		0x3f
+#define NV_SECT_INFO_SECTNO_BITS		(8-NV_SECT_INFO_CHECK_BITS)
+#define NV_SECT_INFO_SECTNO_BITMASK		0x3
+
+/* sector info(4Bytes) + index info(8Bytes) + index info(8Bytes) + ... */
+typedef struct{
+	u16 usedFlag;
+	u8  idName;
+	u8  opSect;    //crcCheckBit(6bits) + opSect(2bits)
+}nv_sect_info_t;
+
+typedef struct{
+	u32 offset;
+	u16 size;
+	u8  itemId;
+	u8  usedState;
+#if defined(MCU_CORE_B91)
+	u8  resv[8];   //PUYA flash only supports re-write 64 times
+#endif
+}nv_info_idx_t;
+
+/* item:  item_hdr(8Bytes) + payload*/
+typedef struct{
+	u32 checkSum;
+	u16 size;
+	u8  itemId;
+	u8  used;
+}itemHdr_t;
+
+typedef struct{
+	u16 opIndex;
+	u8 	opSect;
+}itemIfno_t;
+
+//If OTA enabled, the maximum space used for nv module t is 56K, thus the item num cannot over 14
+/*****************************************************************************************************************************
+ * Store zigbee information in flash.
+ * 		Module ID				|			512K Flash				|			1M Flash				|
+ * -----------------------------|-----------------------------------|-----------------------------------|
+ * NV_MODULE_ZB_INFO			|		0x34000 - 0x36000			|		0x80000 - 0x82000			|
+ * NV_MODULE_ADDRESS_TABLE		|		0x36000 - 0x38000			|		0x82000 - 0x84000			|
+ * NV_MODULE_APS				|		0x38000 - 0x3a000			|		0x84000 - 0x86000			|
+ * NV_MODULE_ZCL				|		0x3a000 - 0x3c000			|		0x86000 - 0x88000			|
+ * NV_MODULE_NWK_FRAME_COUNT	|		0x3c000 - 0x3e000			|		0x88000 - 0x8a000			|
+ * NV_MODULE_OTA				|		0x3e000 - 0x40000			|		0x8a000 - 0x8c000			|
+ * NV_MODULE_APP				|		0x7a000 - 0x7c000			|		0x8c000 - 0x8e000			|
+ * NV_MODULE_KEYPAIR			|		0x7c000 - 0x80000			|		0x8e000 - 0x96000			|
+ * 								|	*16K - can store 127 nodes		|	*32K - can store 302 nodes		|
+ * NV_MAX_MODULS
+ */
+typedef enum{
+	NV_MODULE_ZB_INFO 				= 0,      /* mustn't modify it */
+	NV_MODULE_ADDRESS_TABLE 		= 1,      /* mustn't modify it */
+    NV_MODULE_APS 					= 2,      /* mustn't modify it */
+    NV_MODULE_ZCL 					= 3,      /* mustn't modify it */
+	NV_MODULE_NWK_FRAME_COUNT 		= 4,      /* mustn't modify it */
+	NV_MODULE_OTA 					= 5,
+	NV_MODULE_APP 					= 6,
+	NV_MODULE_KEYPAIR 				= 7,
+    NV_MAX_MODULS
+}nv_module_t;
+
+typedef enum{
+	NV_ITEM_ID_INVALID				= 0,/* Item id 0 should not be used. */
+
+	NV_ITEM_ZB_INFO 				= 1, /* mustn't modify it */
+	NV_ITEM_ADDRESS_FOR_NEIGHBOR,        /* mustn't modify it */
+	NV_ITEM_ADDRESS_FOR_BIND,            /* mustn't modify it */
+	NV_ITEM_APS_SSIB,                    /* mustn't modify it */
+	NV_ITEM_APS_GROUP_TABLE,             /* mustn't modify it */
+	NV_ITEM_APS_BINDING_TABLE,           /* mustn't modify it */
+
+	NV_ITEM_NWK_FRAME_COUNT,             /* mustn't modify it */
+
+	NV_ITEM_SS_KEY_PAIR,                 /* mustn't modify it */
+
+	NV_ITEM_OTA_HDR_SERVERINFO,
+	NV_ITEM_OTA_CODE,
+
+	NV_ITEM_ED_TIMEOUT,
+
+	NV_ITEM_ZCL_REPORT 				= 0x20,
+	NV_ITEM_ZCL_ON_OFF,
+	NV_ITEM_ZCL_LEVEL,
+	NV_ITEM_ZCL_COLOR_CTRL,
+	NV_ITEM_ZCL_SCENE_TABLE,
+	NV_ITEM_ZCL_GP_PROXY_TABLE,
+	NV_ITEM_ZCL_GP_SINK_TABLE,
+	NV_ITEM_ZCL_WWAH_APS_AUTH_INFO,
+	NV_ITEM_ZCL_WWAH_APS_ACKS_INFO,
+	NV_ITEM_ZCL_WWAH_USE_TC_CLUSTER_INFO,
+
+	NV_ITEM_APP_SIMPLE_DESC,
+	NV_ITEM_APP_POWER_CNT,
+	NV_ITEM_APP_GP_TRANS_TABLE,
+
+	NV_ITEM_APS_BINDING_TABLE_V2    = 0x80,  /* mustn't modify it */
+
+	NV_ITEM_ID_MAX					= 0xFF,/* Item id 0xFF should not be used. */
+}nv_item_t;
+
+typedef enum{
+	NV_SUCC,
+    NV_INVALID_MODULS 				= 1,
+    NV_INVALID_ID ,
+    NV_ITEM_NOT_FOUND,
+    NV_NOT_ENOUGH_SAPCE,
+    NV_ITEM_LEN_NOT_MATCH,
+    NV_CHECK_SUM_ERROR,
+    NV_ENABLE_PROTECT_ERROR,
+    NV_NO_MEDIA,
+    NV_DATA_CHECK_ERROR,
+	NV_ITEM_CHECK_ERROR,
+	NV_MODULE_NOT_FOUND,
+	NV_MODULE_ERASE_NEED
+} nv_sts_t;
+
+
+#define FLASH_PAGE_SIZE							256
+#define	FLASH_SECTOR_SIZE						4096//4K
+
+#define NV_SECTOR_VALID							0x5A5A
+#define NV_SECTOR_VALID_CHECKCRC				0x7A7A
+#define NV_SECTOR_VALID_READY_CHECKCRC			0xFAFA
+#define NV_SECTOR_INVALID						0x5050
+#define NV_SECTOR_IDLE							0xFFFF
+
+#define ITEM_FIELD_VALID						0x5A
+#define ITEM_FIELD_VALID_SINGLE					0x7A
+#define ITEM_FIELD_INVALID						0x50
+#define ITEM_FIELD_OPERATION					0xFA
+#define ITEM_FIELD_IDLE							0xFF
+
+#define ITEM_HDR_FIELD_VALID_CHECKSUM			0x5A
+#define ITEM_HDR_FIELD_VALID_CHECKCRC			0x7A
+
+
+#if(FLASH_CAP_SIZE_1M || FLASH_CAP_SIZE_2M || FLASH_CAP_SIZE_4M)
+#define MODULES_START_ADDR(id)					(NV_BASE_ADDRESS + FLASH_SECTOR_SIZE * (2 * id))
+#define NV_SECTOR_SIZE(id)						((id == NV_MODULE_KEYPAIR) ? (4 * FLASH_SECTOR_SIZE) : FLASH_SECTOR_SIZE)
+#define MODULE_INFO_SIZE(id)					((id == NV_MODULE_OTA || id == NV_MODULE_KEYPAIR || id == NV_MODULE_ADDRESS_TABLE) ? ((id == NV_MODULE_KEYPAIR) ? (12*FLASH_PAGE_SIZE) : (4*FLASH_PAGE_SIZE)) : (2*FLASH_PAGE_SIZE))
+#else
+#define MODULES_START_ADDR(id)					((id < 6) ? (NV_BASE_ADDRESS + FLASH_SECTOR_SIZE * (2 * id)) : (NV_BASE_ADDRESS2 + FLASH_SECTOR_SIZE * (2 * (id-6))))
+#define NV_SECTOR_SIZE(id)						((id == NV_MODULE_KEYPAIR) ?  (2 * FLASH_SECTOR_SIZE) : FLASH_SECTOR_SIZE)
+#define MODULE_INFO_SIZE(id)					((id == NV_MODULE_OTA || id == NV_MODULE_KEYPAIR || id == NV_MODULE_ADDRESS_TABLE) ? (4*FLASH_PAGE_SIZE) : (2*FLASH_PAGE_SIZE))
+#endif
+
+#define MODULE_SECTOR_NUM						(2)
+
+#define MODULE_IDX_SIZE(id)						(MODULE_INFO_SIZE(id) - sizeof(nv_sect_info_t))
+#define MODULE_SECT_START(id, sectNo)   		(MODULES_START_ADDR(id) + sectNo * (NV_SECTOR_SIZE(id)))
+#define MODULE_SECT_END(id, sectNo)     		(MODULES_START_ADDR(id) + (sectNo + 1) * (NV_SECTOR_SIZE(id)))
+#define MODULE_IDX_START(id, sectNo)    		(MODULE_SECT_START(id, sectNo) + sizeof(nv_sect_info_t))
+#define MODULE_IDX_NUM(id)    					(MODULE_IDX_SIZE(id) / (sizeof(nv_info_idx_t)))
+#define MODULE_CONTEXT_START(id, sectNo, len)  	(MODULE_SECT_START(id, sectNo) + MODULE_INFO_SIZE(id))
+#define ITEM_TOTAL_LEN(len)						(len + sizeof(itemHdr_t))
+#define FRAMECOUNT_PAYLOAD_START(opSect)		(((MODULE_SECT_START(NV_MODULE_NWK_FRAME_COUNT, opSect) + sizeof(nv_sect_info_t)) + 0x03) & (~0x03))
+#define FRAMECOUNT_NUM_PER_SECT()				((((FLASH_SECTOR_SIZE - sizeof(nv_sect_info_t)) & (~0x03))) / 4)
+
+
+
+
+nv_sts_t nv_resetAll(void);
+nv_sts_t nv_resetModule(u8 modules);
+nv_sts_t nv_flashWriteNew(u8 single, u16 id, u8 itemId, u16 len, u8 *buf);
+nv_sts_t nv_flashReadNew(u8 single, u8 id, u8 itemId, u16 len, u8 *buf);
+nv_sts_t nv_itemDeleteByIndex(u8 id, u8 itemId, u8 opSect, u16 opIdx);
+nv_sts_t nv_flashSingleItemRemove(u8 id, u8 itemId, u16 len);
+nv_sts_t nv_flashReadByIndex(u8 id, u8 itemId, u8 opSect, u16 opIdx, u16 len, u8 *buf);
+void nv_itemLengthCheckAdd(u8 itemId, u16 len);
+nv_sts_t nv_resetToFactoryNew(void);
+bool nv_facrotyNewRstFlagCheck(void);
+void nv_facrotyNewRstFlagSet(void);
+void nv_facrotyNewRstFlagClear(void);
+nv_sts_t nv_nwkFrameCountSaveToFlash(u32 frameCount);
+nv_sts_t nv_nwkFrameCountFromFlash(u32 *frameCount);
+nv_sts_t nv_flashSingleItemSizeGet(u8 id, u8 itemId, u16 *len);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.c
new file mode 100644
index 00000000..9cbd0a8d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.c
@@ -0,0 +1,373 @@
+/********************************************************************************************************
+ * @file    drv_pm.c
+ *
+ * @brief   This is the source file for drv_pm
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if defined(__PROJECT_TL_BOOT_LOADER__) || defined(__PROJECT_TL_SNIFFER__)
+	#define RF_RECOVERY()
+#else
+	#define RF_RECOVERY()					do{ \
+												ZB_RADIO_INIT();	\
+											}while(0) 
+#endif
+
+#define PM_FC_SET_FLAG						0x5A
+#define PM_FC_CLR_FLAG						0x00
+
+#if defined(MCU_CORE_826x)
+	#define PM_ANA_REG_FRAME_COUNTER_FLAG	DEEP_ANA_REG0
+	#define PM_ANA_REG_FRAME_COUNTER		DEEP_ANA_REG4
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define PM_ANA_REG_FRAME_COUNTER_FLAG	DEEP_ANA_REG0
+	#define PM_ANA_REG_FRAME_COUNTER		DEEP_ANA_REG6
+#elif defined(MCU_CORE_B91)
+	#define PM_ANA_REG_FRAME_COUNTER_FLAG	PM_ANA_REG_POWER_ON_CLR_BUF1
+	#define PM_ANA_REG_FRAME_COUNTER		PM_ANA_REG_POWER_ON_CLR_BUF2
+#endif
+
+static u32 prevSleepTick = 0;
+
+
+u32 drv_pm_sleepTime_get(void)
+{
+	u32 sleepTime = 0;
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	sleepTime = (pm_get_32k_tick() - prevSleepTick) / 32;
+#elif defined(MCU_CORE_B91)
+	sleepTime = (clock_get_32k_tick() - prevSleepTick) / 32;
+#endif
+	return sleepTime;
+}
+
+void drv_pm_deepSleep_frameCnt_set(u32 frameCounter)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	analog_write(PM_ANA_REG_FRAME_COUNTER_FLAG, PM_FC_SET_FLAG);
+
+	analog_write(PM_ANA_REG_FRAME_COUNTER,     frameCounter);
+	analog_write(PM_ANA_REG_FRAME_COUNTER + 1, frameCounter >> 8);
+	analog_write(PM_ANA_REG_FRAME_COUNTER + 2, frameCounter >> 16);
+	analog_write(PM_ANA_REG_FRAME_COUNTER + 3, frameCounter >> 24);
+#elif defined(MCU_CORE_B91)
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER_FLAG, PM_FC_SET_FLAG);
+
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER,     frameCounter);
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER + 1, frameCounter >> 8);
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER + 2, frameCounter >> 16);
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER + 3, frameCounter >> 24);
+#endif
+}
+
+u32 drv_pm_deepSleep_frameCnt_get(void)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	analog_write(PM_ANA_REG_FRAME_COUNTER_FLAG, PM_FC_CLR_FLAG);
+	return ((analog_read(PM_ANA_REG_FRAME_COUNTER+3) << 24) | (analog_read(PM_ANA_REG_FRAME_COUNTER+2) << 16) | (analog_read(PM_ANA_REG_FRAME_COUNTER+1) << 8) | analog_read(PM_ANA_REG_FRAME_COUNTER) );
+#elif defined(MCU_CORE_B91)
+	analog_write_reg8(PM_ANA_REG_FRAME_COUNTER_FLAG, PM_FC_CLR_FLAG);
+	return ((analog_read_reg8(PM_ANA_REG_FRAME_COUNTER+3) << 24) | (analog_read_reg8(PM_ANA_REG_FRAME_COUNTER+2) << 16) | (analog_read_reg8(PM_ANA_REG_FRAME_COUNTER+1) << 8) | analog_read_reg8(PM_ANA_REG_FRAME_COUNTER) );
+#endif
+}
+
+bool drv_pm_deepSleep_flag_get(void)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	return ((pm_get_mcu_status() == MCU_STATUS_DEEP_BACK) && (analog_read(PM_ANA_REG_FRAME_COUNTER_FLAG) == PM_FC_SET_FLAG));
+#elif defined(MCU_CORE_B91)
+	return ((g_pm_status_info.mcu_status == MCU_STATUS_DEEP_BACK) && (analog_read_reg8(PM_ANA_REG_FRAME_COUNTER_FLAG) == PM_FC_SET_FLAG));
+#endif
+}
+
+void drv_pm_sleep(drv_pm_sleep_mode_e mode, drv_pm_wakeup_src_e src, u32 durationMs)
+{
+#if defined(MCU_CORE_826x)
+	u8 sleep_mode = SUSPEND_MODE;
+	WakeupSrc_TypeDef srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= WAKEUP_SRC_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= WAKEUP_SRC_TIMER;
+	}
+
+	prevSleepTick = pm_get_32k_tick();
+
+	pm_sleep_wakeup(sleep_mode, srcType, clock_time() + durationMs*1000*S_TIMER_CLOCK_1US);
+
+	drv_pm_wakeupTimeUpdate();
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	SleepMode_TypeDef sleep_mode = SUSPEND_MODE;
+	SleepWakeupSrc_TypeDef srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEP_WITH_RETENTION){
+		sleep_mode = DEEPSLEEP_MODE_RET_SRAM_LOW32K;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= PM_WAKEUP_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= PM_WAKEUP_TIMER;
+	}
+
+	prevSleepTick = pm_get_32k_tick();
+
+	cpu_sleep_wakeup(sleep_mode, srcType, clock_time() + durationMs*1000*S_TIMER_CLOCK_1US);
+
+	drv_pm_wakeupTimeUpdate();
+
+	RF_RECOVERY();
+#elif defined(MCU_CORE_B91)
+	pm_sleep_mode_e sleep_mode = SUSPEND_MODE;
+	pm_sleep_wakeup_src_e srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEP_WITH_RETENTION){
+		sleep_mode = DEEPSLEEP_MODE_RET_SRAM_LOW64K;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= PM_WAKEUP_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= PM_WAKEUP_TIMER;
+	}
+
+	prevSleepTick = clock_get_32k_tick();
+
+	pm_sleep_wakeup(sleep_mode, srcType, PM_TICK_STIMER_16M, clock_time() + durationMs*1000*S_TIMER_CLOCK_1US);
+
+	drv_pm_wakeupTimeUpdate();
+
+	RF_RECOVERY();
+#endif
+}
+
+void drv_pm_longSleep(drv_pm_sleep_mode_e mode, drv_pm_wakeup_src_e src, u32 durationMs)
+{
+#if defined(MCU_CORE_826x)
+	u8 sleep_mode = SUSPEND_MODE;
+	WakeupSrc_TypeDef srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= WAKEUP_SRC_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= WAKEUP_SRC_TIMER;
+	}
+
+	prevSleepTick = pm_get_32k_tick();
+
+	pm_long_sleep_wakeup(sleep_mode, srcType, durationMs * 32);
+
+	drv_pm_wakeupTimeUpdate();
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	SleepMode_TypeDef sleep_mode = SUSPEND_MODE;
+	SleepWakeupSrc_TypeDef srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEP_WITH_RETENTION){
+		sleep_mode = DEEPSLEEP_MODE_RET_SRAM_LOW32K;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= PM_WAKEUP_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= PM_WAKEUP_TIMER;
+	}
+
+	prevSleepTick = pm_get_32k_tick();
+
+	pm_long_sleep_wakeup(sleep_mode, srcType, durationMs * 32);
+
+	drv_pm_wakeupTimeUpdate();
+
+	RF_RECOVERY();
+#elif defined(MCU_CORE_B91)
+	pm_sleep_mode_e sleep_mode = SUSPEND_MODE;
+	pm_sleep_wakeup_src_e srcType = 0;
+
+	if(mode == PM_SLEEP_MODE_SUSPEND){
+		sleep_mode = SUSPEND_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEPSLEEP){
+		sleep_mode = DEEPSLEEP_MODE;
+	}else if(mode == PM_SLEEP_MODE_DEEP_WITH_RETENTION){
+		sleep_mode = DEEPSLEEP_MODE_RET_SRAM_LOW64K;
+	}else{
+		return;
+	}
+
+	if(src & PM_WAKEUP_SRC_PAD){
+		srcType |= PM_WAKEUP_PAD;
+	}
+	if(src & PM_WAKEUP_SRC_TIMER){
+		srcType |= PM_WAKEUP_TIMER;
+	}
+
+	prevSleepTick = clock_get_32k_tick();
+
+	pm_sleep_wakeup(sleep_mode, srcType, PM_TICK_32K, durationMs * 32);
+
+	drv_pm_wakeupTimeUpdate();
+
+	RF_RECOVERY();
+#endif
+}
+
+
+void pm_wakeup_pad_cfg(u32 pin, drv_pm_wakeup_level_e pol, int en)
+{
+#if defined(MCU_CORE_826x)
+	PM_PadSet(pin, pol, en);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	cpu_set_gpio_wakeup(pin, pol, en);
+#elif defined(MCU_CORE_B91)
+	pm_set_gpio_wakeup(pin, pol, en);
+#endif
+}
+
+u8 drv_pm_wakeupPinValid(drv_pm_pinCfg_t *pinCfg, u32 pinNum)
+{
+	drv_pm_pinCfg_t *p = pinCfg;
+
+	for(u32 i = 0; i < pinNum; i++){
+		if((p->wakeupLevel == PM_WAKEUP_LEVEL_HIGH) && drv_gpio_read(p->wakeupPin)){
+			return SUCCESS;
+		}
+
+		if((p->wakeupLevel == PM_WAKEUP_LEVEL_LOW) && !drv_gpio_read(p->wakeupPin)){
+			return SUCCESS;
+		}
+		p++;
+	}
+	return FAILURE;
+}
+
+void drv_pm_wakeupPinLevelChange(drv_pm_pinCfg_t *pinCfg, u32 pinNum)
+{
+	drv_pm_pinCfg_t *p = pinCfg;
+	for(u32 i = 0; i < pinNum; i++){
+		if((p->wakeupLevel == PM_WAKEUP_LEVEL_HIGH) && drv_gpio_read(p->wakeupPin)){
+			p->wakeupLevel = PM_WAKEUP_LEVEL_LOW;
+		}
+
+		if((p->wakeupLevel == PM_WAKEUP_LEVEL_LOW) && !drv_gpio_read(p->wakeupPin)){
+			p->wakeupLevel = PM_WAKEUP_LEVEL_HIGH;
+		}
+		pm_wakeup_pad_cfg(p->wakeupPin, p->wakeupLevel, 1);
+		p++;
+	}
+}
+
+void drv_pm_wakeupPinConfig(drv_pm_pinCfg_t *pinCfg, u32 pinNum)
+{
+	drv_pm_pinCfg_t *p = pinCfg;
+
+	for(u32 i = 0; i < pinNum; i++){
+		pm_wakeup_pad_cfg(p->wakeupPin, p->wakeupLevel, 1);
+		p++;
+	}
+}
+
+void drv_pm_lowPowerEnter(void)
+{
+	drv_pm_wakeup_src_e wakeupSrc = PM_WAKEUP_SRC_PAD;
+	u32 sleepTime = 0;
+	bool longSleep = 0;
+
+	u32 r = drv_disable_irq();
+
+	ev_timer_event_t *timerEvt = ev_timer_nearestGet();
+	if(timerEvt){
+		wakeupSrc |= PM_WAKEUP_SRC_TIMER;
+		sleepTime = timerEvt->timeout;
+	}
+
+#if defined(MCU_CORE_826x)
+	drv_pm_sleep_mode_e sleepMode = (wakeupSrc & PM_WAKEUP_SRC_TIMER) ? PM_SLEEP_MODE_SUSPEND : PM_SLEEP_MODE_DEEPSLEEP;
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278) || defined(MCU_CORE_B91)
+	drv_pm_sleep_mode_e sleepMode = (wakeupSrc & PM_WAKEUP_SRC_TIMER) ? PM_SLEEP_MODE_DEEP_WITH_RETENTION : PM_SLEEP_MODE_DEEPSLEEP;
+#endif
+
+	if(sleepTime){
+		if(sleepTime > PM_NORMAL_SLEEP_MAX){
+			longSleep = 1;
+		}else{
+			longSleep = 0;
+		}
+	}
+
+
+	if(!longSleep){
+		drv_pm_sleep(sleepMode, wakeupSrc, sleepTime);
+	}else{
+		drv_pm_longSleep(sleepMode, wakeupSrc, sleepTime);
+	}
+
+	drv_restore_irq(r);
+}
+
+void drv_pm_wakeupTimeUpdate(void)
+{
+	u32 sleepTime = drv_pm_sleepTime_get();
+	if(sleepTime){
+		ev_timer_update(sleepTime);
+		ev_timer_setPrevSysTick(clock_time());
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.h
new file mode 100644
index 00000000..8a24fcb8
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pm.h
@@ -0,0 +1,100 @@
+/********************************************************************************************************
+ * @file    drv_pm.h
+ *
+ * @brief   This is the header file for drv_pm
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+
+typedef enum{
+	PM_SLEEP_MODE_SUSPEND,
+	PM_SLEEP_MODE_DEEPSLEEP,
+	PM_SLEEP_MODE_DEEP_WITH_RETENTION,	//826x not support
+
+	PM_SLEEP_MODE_MCU_STALL,
+}drv_pm_sleep_mode_e;
+
+typedef enum{
+	PM_WAKEUP_SRC_PAD 	= BIT(0),
+	PM_WAKEUP_SRC_TIMER = BIT(1),
+}drv_pm_wakeup_src_e;
+
+typedef enum{
+	PM_WAKEUP_LEVEL_LOW,
+	PM_WAKEUP_LEVEL_HIGH,
+}drv_pm_wakeup_level_e;
+
+typedef struct{
+	u32 wakeupPin;
+	drv_pm_wakeup_level_e wakeupLevel;
+}drv_pm_pinCfg_t;
+
+#if defined(MCU_CORE_826x)
+	#define PM_CLOCK_INIT()					do{ rc_32k_cal(); }while(0)
+
+	#define PM_NORMAL_SLEEP_MAX				(100 * 1000)//100s, (0xC0000000 / 32)
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define PM_CLOCK_INIT()					do{ \
+												/* Initialize 32K for timer wakeup. */	\
+												clock_32k_init(CLK_32K_RC);				\
+												rc_32k_cal();							\
+												pm_select_internal_32k_rc();			\
+											}while(0)
+
+	#define PM_NORMAL_SLEEP_MAX				(230 * 1000)//230s, (0xE0000000 / 16)
+#elif defined(MCU_CORE_B91)
+	/* 24M RC is inaccurate, and it is greatly affected by temperature, so real-time calibration is required
+	 * The 24M RC needs to be calibrated before the pm_sleep_wakeup function,
+	 * because this clock will be used to kick 24m xtal start after wake up.
+	 * The more accurate this time, the faster the crystal will start. Calibration cycle depends on usage
+	 */
+	#define PM_CLOCK_INIT()					do{ \
+												clock_cal_24m_rc();						\
+												/* Initialize 32K for timer wakeup. */	\
+												clock_32k_init(CLK_32K_RC);				\
+												clock_cal_32k_rc();/*6.68ms*/			\
+											}while(0)
+
+	#define PM_NORMAL_SLEEP_MAX				(230 * 1000)//230s, (0xE0000000 / 16)
+#endif
+
+
+void drv_pm_deepSleep_frameCnt_set(u32 frameCounter);
+u32 drv_pm_deepSleep_frameCnt_get(void);
+bool drv_pm_deepSleep_flag_get(void);
+
+void pm_wakeup_pad_cfg(u32 pin, drv_pm_wakeup_level_e pol, int en);
+void drv_pm_wakeupPinConfig(drv_pm_pinCfg_t *pinCfg, u32 pinNum);
+u8 drv_pm_wakeupPinValid(drv_pm_pinCfg_t *pinCfg, u32 pinNum);
+
+void drv_pm_sleep(drv_pm_sleep_mode_e mode, drv_pm_wakeup_src_e src, u32 durationMs);
+void drv_pm_longSleep(drv_pm_sleep_mode_e mode, drv_pm_wakeup_src_e src, u32 durationMs);
+
+void drv_pm_lowPowerEnter(void);
+void drv_pm_wakeupTimeUpdate(void);
+
+void drv_pm_wakeupPinLevelChange(drv_pm_pinCfg_t *pinCfg, u32 pinNum);
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.c
new file mode 100644
index 00000000..ca837f8b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.c
@@ -0,0 +1,47 @@
+/********************************************************************************************************
+ * @file    drv_pwm.c
+ *
+ * @brief   This is the source file for drv_pwm
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+void drv_pwm_init(void){
+#if defined(MCU_CORE_826x)
+	pwm_Init(0);
+#elif defined(MCU_CORE_B91)
+	pwm_set_clk(0);
+#endif
+}
+
+void drv_pwm_cfg(u8 pwmId, u16 cmp_tick, u16 cycle_tick){
+#if defined(MCU_CORE_826x)
+	pwm_Open(pwmId, NORMAL, 0, cmp_tick, cycle_tick, 0x2fff);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	pwm_set_mode(pwmId, PWM_NORMAL_MODE);
+	pwm_set_phase(pwmId, 0);   //no phase at pwm beginning
+	pwm_set_cycle_and_duty(pwmId, cycle_tick, cmp_tick);
+#elif defined(MCU_CORE_B91)
+	pwm_set_tcmp(pwmId, cmp_tick);
+	pwm_set_tmax(pwmId, cycle_tick);
+#endif
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.h
new file mode 100644
index 00000000..7d14221b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_pwm.h
@@ -0,0 +1,57 @@
+/********************************************************************************************************
+ * @file    drv_pwm.h
+ *
+ * @brief   This is the header file for drv_pwm
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define PWM_CLOCK_SOURCE			CLOCK_SYS_CLOCK_HZ
+#elif defined(MCU_CORE_B91)
+	#define PWM_CLOCK_SOURCE			(sys_clk.pclk * 1000 * 1000)
+#endif
+
+
+#if defined(MCU_CORE_826x)
+	#define drv_pwm_start(pwmId)		pwm_Start(pwmId)
+	#define drv_pwm_stop(pwmId)			pwm_Stop(pwmId)
+	#define drv_pwm_invert(pwmId)		pwm_Invert(pwmId)
+	#define drv_pwm_n_invert(pwmId)		pwm_INVInvert(pwmId)
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define drv_pwm_start(pwmId)		pwm_start(pwmId)
+	#define drv_pwm_stop(pwmId)			pwm_stop(pwmId)
+	#define drv_pwm_invert(pwmId)		pwm_revert(pwmId)
+	#define drv_pwm_n_invert(pwmId)		pwm_n_revert(pwmId)
+#elif defined(MCU_CORE_B91)
+	#define drv_pwm_start(pwmId)		(pwmId == PWM0_ID) ? (pwm_start(FLD_PWM0_EN)) : (pwm_start(BIT(pwmId)))
+	#define drv_pwm_stop(pwmId)			(pwmId == PWM0_ID) ? (pwm_stop(FLD_PWM0_EN)) : (pwm_stop(BIT(pwmId)))
+	#define drv_pwm_invert(pwmId)		pwm_invert_en(pwmId)
+	#define drv_pwm_n_invert(pwmId)		pwm_n_invert_en(pwmId)
+#endif
+
+void drv_pwm_init(void);
+
+void drv_pwm_cfg(u8 pwmId, u16 cmp_tick, u16 cycle_tick);
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_radio.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_radio.h
new file mode 100644
index 00000000..98585b01
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_radio.h
@@ -0,0 +1,186 @@
+/********************************************************************************************************
+ * @file    drv_radio.h
+ *
+ * @brief   This is the header file for drv_radio
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/*******************************************************************************************************
+ * 									Radio interface for 8258
+ ******************************************************************************************************/
+/* radio module reset */
+#define ZB_RADIO_RESET()
+
+/* RF is busy */
+#define RF_DMA_BUSY()									is_rf_receiving_pkt()
+
+/* trx switch */
+#define ZB_RADIO_TRX_SWITCH(mode, chn) 					rf_trx_state_set(mode, chn)
+
+/* trx off auto mode */
+#define ZB_RADIO_TRX_OFF_AUTO_MODE()					rf_set_tx_rx_off_auto_mode()
+
+/* srx start*/
+#define ZB_RADIO_SRX_START(tick)						rf_start_srx(tick)
+
+/* set tx power */
+#define ZB_RADIO_TX_POWER_SET(level)					rf_set_power_level_index(level)
+
+/* set rx gain mode: max gain: only use auto gain mode */
+#define ZB_RADIO_MODE_MAX_GAIN()
+
+/* set rx gain mode: auto gain, only use auto gain mode */
+#define ZB_RADIO_MODE_AUTO_GAIN()
+
+/* get RSSI */
+#define ZB_RADIO_RSSI_GET()								rf_rssi_get_154()
+
+/* start sending a packet */
+#define ZB_RADIO_TX_START(txBuf)						rf_tx_pkt(txBuf)
+
+/* tx done */
+#define ZB_RADIO_TX_DONE								rf_tx_finish()
+
+/* clear tx status(interrupt status) */
+#define ZB_RADIO_TX_DONE_CLR							rf_tx_finish_clear_flag()
+
+/* rx done */
+#define ZB_RADIO_RX_DONE								rf_rx_finish()
+
+/* clear rx status(interrupt status) */
+#define ZB_RADIO_RX_DONE_CLR							rf_rx_finish_clear_flag()
+
+/* enable tx */
+#define ZB_RADIO_TX_ENABLE								RFDMA_TX_ENABLE
+
+/* disable tx */
+#define ZB_RADIO_TX_DISABLE								RFDMA_TX_DISABLE
+
+/* enable rx */
+#define ZB_RADIO_RX_ENABLE								RFDMA_RX_ENABLE
+
+/* disable rx */
+#define ZB_RADIO_RX_DISABLE								RFDMA_RX_DISABLE
+
+/* clear mask bit to disable tx irq */
+#define ZB_RADIO_IRQ_MASK_CLR							irq_clr_mask(FLD_IRQ_ZB_RT_EN)
+
+/* clear mask bit to disable tx irq */
+#define ZB_RADIO_IRQ_MASK_SET							irq_set_mask(FLD_IRQ_ZB_RT_EN)
+
+/* trx status get */
+#define ZB_RADIO_TRX_STA_GET()							rf_trx_state_get()
+
+/* rx buffer configure */
+#define ZB_RADIO_RX_BUF_SET(addr)						rf_rx_buffer_reconfig(addr)
+
+/* rx buffer clear */
+#define ZB_RADIO_RX_BUF_CLEAR(p)						do{ \
+															p[0] = 0;		\
+															p[4] = 0;		\
+														}while(0)
+
+/* set rx mode, maxium receiver buffer size, enable Rx/Tx interrupt */
+#define ZB_RADIO_TRX_CFG(size)							do{ \
+															/* disable SRX timeout interrupt */\
+															write_reg8(0xf03, read_reg8(0xf03) & 0xfb);	\
+															rf_rx_cfg(size, 0); \
+															dma_irq_disable(FLD_DMA_CHN_RF_RX | FLD_DMA_CHN_RF_TX); \
+															rf_irq_disable(FLD_RF_IRQ_ALL);	\
+															rf_irq_enable(FLD_RF_IRQ_RX | FLD_RF_IRQ_TX); \
+															irq_set_mask(FLD_IRQ_ZB_RT_EN); \
+														}while(0)
+
+#define ZB_RADIO_DMA_HDR_BUILD(pBuf, len)				do{	\
+															u8 *p = pBuf;	\
+															p[0] = len + 1;	\
+															p[1] = 0;		\
+															p[2] = 0;		\
+															p[3] = 0;		\
+														}while(0)
+
+/* tx packet header */
+#define ZB_RADIO_TX_HDR_LEN								5
+
+/* rx packet header */
+#define ZB_RADIO_RX_HDR_LEN								5
+
+/* delay after switch to Tx mode, and then start sending */
+#define ZB_TX_WAIT_US									120
+
+/* get real payload length */
+#define ZB_RADIO_ACTUAL_PAYLOAD_LEN(p)					RF_ZIGBEE_PACKET_PAYLOAD_LENGTH_GET(p)
+
+/* packet CRC check */
+#define ZB_RADIO_CRC_OK(p)								RF_ZIGBEE_PACKET_CRC_OK(p)
+
+/* packet length check */
+#define ZB_RADIO_PACKET_LENGTH_OK(p)					RF_ZIGBEE_PACKET_LENGTH_OK(p)
+
+/* enable timestamp */
+#define ZB_TIMESTAMP_ENABLE								do{ \
+															REG_ADDR8(0x430) |= BIT(1);\
+														}while(0)
+
+/* get time timestamp */
+#define ZB_RADIO_TIMESTAMP_GET(p)						RF_ZIGBEE_PACKET_TIMESTAMP_GET(p)
+
+#define ZB_RADION_PKT_RSSI_GET(p)						RF_ZIGBEE_PACKET_RSSI_GET(p)
+
+/* tx power 0dBm*/
+#define ZB_RADIO_TX_0DBM								RF_POWER_INDEX_P0p04dBm
+
+/* radio initialization */
+#define ZB_RADIO_INIT()									do{ \
+															rf_drv_init(RF_MODE_ZIGBEE_250K); \
+															rf_drv_cap(CFG_FREQUENCY_OFFSET); \
+														}while(0)
+
+/* sys timer initialization for mac-csma */
+#define ZB_TIMER_INIT()									drv_hwTmr_init(TIMER_IDX_3, TIMER_MODE_SCLK)
+
+#define ZB_RADIO_RSSI_TO_LQI(mode, rssi, lqi)			do{ \
+															(void)mode;									\
+															s16 minEd = -99;							\
+															s16 maxEd = -15;  /* AGC */					\
+															if(rssi > maxEd){rssi = maxEd;}				\
+															if(rssi < minEd){rssi = minEd;}				\
+															lqi = 255*(rssi - minEd)/(maxEd - minEd); 	\
+														}while(0)
+
+/* RSSI: [-99 ~ -15]
+ *
+ *  RSSI    LQI		COST
+ *  -60		118      1		//excellent
+ *  -68		94		 2		//good
+ *  -76		69		 3		//ok
+ *  -84		45		 5		//weak
+ *  -99		0		 7
+ */
+#define ZB_LQI_TO_PATH_COST(lqi, path_cost) 			do{ \
+															if(lqi > 118){path_cost = 1;}		\
+															else if(lqi > 94){path_cost = 2;}	\
+															else if(lqi > 69){path_cost = 3;}	\
+															else if(lqi > 45){path_cost = 5;}	\
+															else{path_cost = 7;}				\
+														}while(0)
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.c
new file mode 100644
index 00000000..accdfa7c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.c
@@ -0,0 +1,211 @@
+/********************************************************************************************************
+ * @file    drv_spi.c
+ *
+ * @brief   This is the source file for drv_spi
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if defined(MCU_CORE_B91)
+pspi_csn_pin_def_e drv_cs_pin;
+#endif
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] spiClock - SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] mode - the selected working mode of SPI module,mode 0~mode 3
+ * @return    none
+ */
+void drv_spi_master_init(u32 spiClock, drv_spi_mode_type_def mode)
+{
+	u8 divClock = ((2 * spiClock) >= SPI_CLOCK_SOURCE) ? 0 : (u8)(SPI_CLOCK_SOURCE / (2 * spiClock) - 1);
+
+#if	defined(MCU_CORE_826x)
+	SPI_MasterInit(divClock, mode);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	spi_master_init(divClock, mode);
+#elif defined(MCU_CORE_B91)
+	/* B91 supports normal SPI mode and SPI Plus mode,
+	 * here we use the commonly used normal mode.
+	 */
+	spi_master_init(PSPI_MODULE, divClock, mode);
+	spi_master_config(PSPI_MODULE, SPI_NOMAL);
+#endif
+}
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] mode - the selected working mode of SPI module,mode 0~mode 3
+ * @return    none
+ */
+void drv_spi_slave_init(drv_spi_mode_type_def mode)
+{
+#if	defined(MCU_CORE_826x)
+	SPI_SlaveInit(0, mode);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	spi_slave_init(0, mode);
+#elif defined(MCU_CORE_B91)
+	spi_slave_init(PSPI_MODULE, mode);
+#endif
+}
+
+/**
+ * @brief     This function selects a pin port for the SPI master interface
+ * @param[in] Pin Group or Pins
+ * @return    none
+ */
+#if	defined(MCU_CORE_826x)
+void drv_spi_master_pin_select(SPI_PinTypeDef pinGroup)
+{
+	SPI_MasterPinSelect(pinGroup);
+}
+#elif defined(MCU_CORE_8258)
+void drv_spi_master_pin_select(SPI_GPIO_GroupTypeDef pinGroup)
+{
+	spi_master_gpio_set(pinGroup);
+}
+#elif defined(MCU_CORE_8278)
+void drv_spi_master_pin_select(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin)
+{
+	spi_master_gpio_set(sclk_pin, cs_pin, sdo_pin, sdi_pin);
+}
+#elif defined(MCU_CORE_B91)
+void drv_spi_master_pin_select(pspi_clk_pin_def_e sclk_pin, pspi_csn_pin_def_e cs_pin, pspi_mosi_io0_pin_def_e mosi_pin, pspi_miso_io1_pin_def_e miso_pin)
+{
+	pspi_pin_config_t pspi_pin_config;
+
+	pspi_pin_config.pspi_clk_pin = sclk_pin;
+	pspi_pin_config.pspi_csn_pin = cs_pin;
+	pspi_pin_config.pspi_mosi_io0_pin = mosi_pin;
+	pspi_pin_config.pspi_miso_io1_pin = miso_pin;
+
+	drv_cs_pin = cs_pin;
+
+	pspi_set_pin(&pspi_pin_config);
+}
+#endif
+
+/**
+ * @brief     This function selects a pin port for the SPI slave interface
+ * @param[in] Pin Group or Pins
+ * @return    none
+ */
+#if	defined(MCU_CORE_826x)
+void drv_spi_slave_pin_select(SPI_PinTypeDef pinGroup)
+{
+	SPI_SlavePinSelect(pinGroup);
+}
+#elif defined(MCU_CORE_8258)
+void drv_spi_slave_pin_select(SPI_GPIO_GroupTypeDef pinGroup)
+{
+	spi_slave_gpio_set(pinGroup);
+}
+#elif defined(MCU_CORE_8278)
+void drv_spi_slave_pin_select(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin)
+{
+	spi_slave_gpio_set(sclk_pin, cs_pin, sdo_pin, sdi_pin);
+}
+#elif defined(MCU_CORE_B91)
+void drv_spi_slave_pin_select(pspi_clk_pin_def_e sclk_pin, pspi_csn_pin_def_e cs_pin, pspi_mosi_io0_pin_def_e mosi_pin, pspi_miso_io1_pin_def_e miso_pin)
+{
+	pspi_pin_config_t pspi_pin_config;
+
+	pspi_pin_config.pspi_clk_pin = sclk_pin;
+	pspi_pin_config.pspi_csn_pin = cs_pin;
+	pspi_pin_config.pspi_mosi_io0_pin = mosi_pin;
+	pspi_pin_config.pspi_miso_io1_pin = miso_pin;
+
+	drv_cs_pin = cs_pin;
+
+	pspi_set_pin(&pspi_pin_config);
+}
+#endif
+
+/**
+ * @brief      This function serves to write a bulk of data to the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  cmd - pointer to the command bytes needed written into the
+ *             slave device first before the writing operation of actual data
+ * @param[in]  cmdLen - length in byte of the command bytes
+ * @param[in]  data - pointer to the data need to write
+ * @param[in]  dataLen - length in byte of the data need to write
+ * @param[in]  csPin - the CS pin specifing the slave device
+ * @return     none
+ */
+void drv_spi_write(u8 *cmd, int cmdLen, u8 *data, int dataLen, u32 csPin)
+{
+#if	defined(MCU_CORE_826x)
+	SPI_Write(cmd, cmdLen, data, dataLen, csPin);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	spi_write(cmd, cmdLen, data, dataLen, csPin);
+#elif defined(MCU_CORE_B91)
+	u8 *pBuf = (u8 *)ev_buf_allocate(cmdLen + dataLen);
+	if(pBuf){
+		if(drv_cs_pin != csPin){
+			pspi_cs_pin_dis(drv_cs_pin);
+			pspi_cs_pin_en(csPin);
+			drv_cs_pin = csPin;
+		}
+
+		u8 *pData = pBuf;
+
+		memcpy(pData, cmd, cmdLen);
+		pData += cmdLen;
+		memcpy(pData, data, dataLen);
+		pData += dataLen;
+
+		spi_master_write(PSPI_MODULE, pBuf, cmdLen + dataLen);
+
+		ev_buf_free(pBuf);
+	}
+#endif
+}
+
+
+/**
+ * @brief      This function serves to read a bulk of data from the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  cmd - pointer to the command bytes needed written into the
+ *             slave device first before the reading operation of actual data
+ * @param[in]  cmdLen - length in byte of the command bytes
+ * @param[out] data - pointer to the buffer that will cache the reading out data
+ * @param[in]  dataLen - length in byte of the data need to read
+ * @param[in]  csPin - the CS pin specifing the slave device
+ * @return     none
+ */
+void drv_spi_read(u8 *cmd, int cmdLen, u8 *data, int dataLen, u32 csPin)
+{
+#if	defined(MCU_CORE_826x)
+	SPI_Read(cmd, cmdLen, data, dataLen, csPin);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	spi_read(cmd, cmdLen, data, dataLen, csPin);
+#elif defined(MCU_CORE_B91)
+	if(drv_cs_pin != csPin){
+		pspi_cs_pin_dis(drv_cs_pin);
+		pspi_cs_pin_en(csPin);
+		drv_cs_pin = csPin;
+	}
+	spi_master_write_read(PSPI_MODULE, cmd, cmdLen, data, dataLen);
+#endif
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.h
new file mode 100644
index 00000000..a29607f2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_spi.h
@@ -0,0 +1,119 @@
+/********************************************************************************************************
+ * @file    drv_spi.h
+ *
+ * @brief   This is the header file for drv_spi
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define SPI_CLOCK_SOURCE			CLOCK_SYS_CLOCK_HZ
+#elif defined(MCU_CORE_B91)
+	/* PCLK provides clock source for PSPI module. */
+	#define SPI_CLOCK_SOURCE			(sys_clk.pclk * 1000 * 1000)
+#endif
+
+/**
+ *  @brief  Define the mode for SPI interface
+ */
+typedef enum {
+    SPI_MODE_0 = 0,
+    SPI_MODE_2,
+    SPI_MODE_1,
+    SPI_MODE_3,
+}drv_spi_mode_type_def;
+
+
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] spiClock - SPI module
+ *            SPI clock = System clock / ((DivClock+1)*2)
+ * @param[in] mode - the selected working mode of SPI module,mode 0~mode 3
+ * @return    none
+ */
+void drv_spi_master_init(u32 spiClock, drv_spi_mode_type_def mode);
+
+/**
+ * @brief     This function configures the clock and working mode for SPI interface
+ * @param[in] mode - the selected working mode of SPI module,mode 0~mode 3
+ * @return    none
+ */
+void drv_spi_slave_init(drv_spi_mode_type_def mode);
+
+/**
+ * @brief     This function selects a pin port for the SPI master interface
+ * @param[in] Pin Group or Pins
+ * @return    none
+ */
+#if	defined(MCU_CORE_826x)
+void drv_spi_master_pin_select(SPI_PinTypeDef pinGroup);
+#elif defined(MCU_CORE_8258)
+void drv_spi_master_pin_select(SPI_GPIO_GroupTypeDef pinGroup);
+#elif defined(MCU_CORE_8278)
+void drv_spi_master_pin_select(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin);
+#elif defined(MCU_CORE_B91)
+void drv_spi_master_pin_select(pspi_clk_pin_def_e sclk_pin, pspi_csn_pin_def_e cs_pin, pspi_mosi_io0_pin_def_e mosi_pin, pspi_miso_io1_pin_def_e miso_pin);
+#endif
+
+/**
+ * @brief     This function selects a pin port for the SPI slave interface
+ * @param[in] Pin Group or Pins
+ * @return    none
+ */
+#if	defined(MCU_CORE_826x)
+void drv_spi_slave_pin_select(SPI_PinTypeDef pinGroup);
+#elif defined(MCU_CORE_8258)
+void drv_spi_slave_pin_select(SPI_GPIO_GroupTypeDef pinGroup);
+#elif defined(MCU_CORE_8278)
+void drv_spi_slave_pin_select(SPI_GPIO_SclkTypeDef sclk_pin, SPI_GPIO_CsTypeDef cs_pin, SPI_GPIO_SdoTypeDef sdo_pin, SPI_GPIO_SdiTypeDef sdi_pin);
+#elif defined(MCU_CORE_B91)
+void drv_spi_slave_pin_select(pspi_clk_pin_def_e sclk_pin, pspi_csn_pin_def_e cs_pin, pspi_mosi_io0_pin_def_e mosi_pin, pspi_miso_io1_pin_def_e miso_pin);
+#endif
+
+/**
+ * @brief      This function serves to write a bulk of data to the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  cmd - pointer to the command bytes needed written into the
+ *             slave device first before the writing operation of actual data
+ * @param[in]  cmdLen - length in byte of the command bytes
+ * @param[in]  data - pointer to the data need to write
+ * @param[in]  dataLen - length in byte of the data need to write
+ * @param[in]  csPin - the CS pin specific the slave device
+ * @return     none
+ */
+void drv_spi_write(u8 *cmd, int cmdLen, u8 *data, int dataLen, u32 csPin);
+
+/**
+ * @brief      This function serves to read a bulk of data from the SPI slave
+ *             device specified by the CS pin
+ * @param[in]  cmd - pointer to the command bytes needed written into the
+ *             slave device first before the reading operation of actual data
+ * @param[in]  cmdLen - length in byte of the command bytes
+ * @param[out] data - pointer to the buffer that will cache the reading out data
+ * @param[in]  dataLen - length in byte of the data need to read
+ * @param[in]  csPin - the CS pin specifing the slave device
+ * @return     none
+ */
+void drv_spi_read(u8 *cmd, int cmdLen, u8 *data, int dataLen, u32 csPin);
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.c
new file mode 100644
index 00000000..c4576297
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.c
@@ -0,0 +1,248 @@
+/********************************************************************************************************
+ * @file    drv_timer.c
+ *
+ * @brief   This is the source file for drv_timer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+#define TIMER_SAFE_BOUNDARY_IN_US(v)		(10 * v)
+#define TIMER_OVERFLOW_VALUE        		(0xFFFFFFFE)
+
+
+typedef struct{
+    /* Expire time and callback parameters */
+    ext_clk_t expireInfo;
+    timerCb_t cb;
+    void	  *arg;
+
+    /* Flags for useful information */
+    union{
+        struct{
+            u32 status:2;
+            u32 reserved:30;
+        }bf;
+        u32 byteVal;
+    }flags;
+}hwTmr_info_t;
+
+typedef struct{
+    hwTmr_info_t timerInfo[TIMER_NUM];
+}hwTmr_ctrl_t;
+
+
+hwTmr_ctrl_t hwTmr_vars;
+
+
+static void hwTimerInit(u8 tmrIdx, u8 mode)
+{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	if(tmrIdx < TIMER_IDX_3){
+		timer_set_mode(tmrIdx, mode);
+		timer_irq_enable(tmrIdx);
+	}else{
+		stimer_irq_enable();
+	}
+#elif defined(MCU_CORE_B91)
+	if(tmrIdx < TIMER_IDX_3){
+		timer_set_mode(tmrIdx, mode);
+		if(tmrIdx == TIMER_IDX_0){
+			plic_interrupt_enable(IRQ4_TIMER0);
+		}else if(tmrIdx == TIMER_IDX_1){
+			plic_interrupt_enable(IRQ3_TIMER1);
+		}
+	}else{
+		plic_interrupt_enable(IRQ1_SYSTIMER);
+	}
+#endif
+}
+
+static void hwTimerSet(u8 tmrIdx, u32 tick)
+{
+	/* Set capture tick value */
+	if(tmrIdx < TIMER_IDX_3){
+		timer_set_init_tick(tmrIdx, 0);
+		timer_set_cap_tick(tmrIdx, tick);
+	}else{
+		stimer_set_irq_capture(tick + clock_time());
+	}
+}
+
+static void hwTimerStart(u8 tmrIdx)
+{
+	if(tmrIdx < TIMER_IDX_3){
+		timer_start(tmrIdx);
+	}else{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+		stimer_set_irq_mask();
+#elif defined(MCU_CORE_B91)
+		stimer_set_irq_mask(FLD_SYSTEM_IRQ);
+#endif
+	}
+}
+
+static void hwTimerStop(u8 tmrIdx)
+{
+	if(tmrIdx < TIMER_IDX_3){
+		timer_stop(tmrIdx);
+	}else{
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+		stimer_clr_irq_mask();
+#elif defined(MCU_CORE_B91)
+		stimer_clr_irq_mask(FLD_SYSTEM_IRQ);
+#endif
+	}
+}
+
+
+static hw_timer_sts_t hwTmr_setAbs(u8 tmrIdx, ext_clk_t *absTimer, timerCb_t func, void *arg)
+{
+    hwTmr_info_t *pTimer = &hwTmr_vars.timerInfo[tmrIdx];
+
+    /* Validation */
+    if(TIMER_IDLE != pTimer->flags.bf.status){
+        return HW_TIMER_IS_RUNNING;
+    }
+
+    u32 r = drv_disable_irq();
+
+    /* Set expire information */
+    pTimer->expireInfo.high = absTimer->high;
+    pTimer->expireInfo.low  = absTimer->low;
+    pTimer->cb = func;
+    pTimer->arg = arg;
+
+    pTimer->flags.bf.status = pTimer->expireInfo.high ? TIMER_WOF : TIMER_WTO;
+
+    /* Safety Check - If time is already past, set timer as Expired */
+    if(!pTimer->expireInfo.high && pTimer->expireInfo.low < TIMER_SAFE_BOUNDARY_IN_US(TIMER_TICK_1US_GET(tmrIdx))){
+    	drv_restore_irq(r);
+        memset(pTimer, 0, sizeof(hwTmr_info_t));
+		if(func){
+            func(arg);
+		}
+        return HW_TIMER_SUCC;
+    }else{
+    	hwTimerSet(tmrIdx, pTimer->expireInfo.high ? TIMER_OVERFLOW_VALUE : pTimer->expireInfo.low);
+    	hwTimerStart(tmrIdx);
+    }
+
+    drv_restore_irq(r);
+
+    return HW_TIMER_SUCC;
+}
+
+static void drv_hwTmr_irq_process(u8 tmrIdx)
+{
+    hwTmr_info_t *pTimer = &hwTmr_vars.timerInfo[tmrIdx];
+
+    if(TIMER_WTO == pTimer->flags.bf.status){
+        /* Expired, callback */
+        if(pTimer->cb){
+        	int t;
+
+        	t = pTimer->cb(pTimer->arg);
+
+        	if(t < 0){
+        		hwTimerStop(tmrIdx);
+        		memset(pTimer, 0, sizeof(hwTmr_info_t));
+        	}else{
+        		if(t != 0){
+        			pTimer->expireInfo.low = t * TIMER_TICK_1US_GET(tmrIdx);
+        		}
+        		/* Set the capture tick again. */
+        		hwTimerSet(tmrIdx, pTimer->expireInfo.high ? TIMER_OVERFLOW_VALUE : pTimer->expireInfo.low);
+        	}
+        }
+    }else{
+        if(--pTimer->expireInfo.high){
+        	hwTimerSet(tmrIdx, TIMER_OVERFLOW_VALUE);
+        }else{
+        	hwTimerSet(tmrIdx, pTimer->expireInfo.low);
+
+            pTimer->flags.bf.status = TIMER_WTO;
+        }
+    }
+}
+
+static void hwTimerInfoReset(u8 tmrIdx)
+{
+	memset((u8*)&hwTmr_vars.timerInfo[tmrIdx], 0, sizeof(hwTmr_info_t));
+}
+
+void drv_hwTmr_init(u8 tmrIdx, u8 mode)
+{
+	if(tmrIdx >= TIMER_NUM){
+		return;
+	}
+
+	hwTimerInfoReset(tmrIdx);
+	hwTimerInit(tmrIdx, mode);
+}
+
+void drv_hwTmr_cancel(u8 tmrIdx)
+{
+	if(tmrIdx >= TIMER_NUM){
+		return;
+	}
+
+	u32 r = drv_disable_irq();
+
+	hwTimerStop(tmrIdx);
+
+	hwTmr_info_t *pTimer = &hwTmr_vars.timerInfo[tmrIdx];
+	memset(pTimer, 0, sizeof(hwTmr_info_t));
+
+	drv_restore_irq(r);
+}
+
+hw_timer_sts_t drv_hwTmr_set(u8 tmrIdx, u32 t_us, timerCb_t func, void *arg)
+{
+	if(tmrIdx >= TIMER_NUM){
+		return HW_TIMER_INVALID;
+	}
+
+    ext_clk_t t;
+    t.high = 0;
+    t.low = t_us * TIMER_TICK_1US_GET(tmrIdx);
+
+    return hwTmr_setAbs(tmrIdx, &t, func, arg);
+}
+
+
+
+void drv_timer_irq0_handler(void)
+{
+	drv_hwTmr_irq_process(TIMER_IDX_0);
+}
+
+void drv_timer_irq1_handler(void)
+{
+	drv_hwTmr_irq_process(TIMER_IDX_1);
+}
+
+void drv_timer_irq3_handler(void)
+{
+	drv_hwTmr_irq_process(TIMER_IDX_3);
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.h
new file mode 100644
index 00000000..382876f7
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_timer.h
@@ -0,0 +1,135 @@
+/********************************************************************************************************
+ * @file    drv_timer.h
+ *
+ * @brief   This is the header file for drv_timer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define S_TIMER_CLOCK_1US				sysTimerPerUs
+	#define H_TIMER_CLOCK_1US				(CLOCK_SYS_CLOCK_HZ / 1000000)
+#elif defined(MCU_CORE_B91)
+	#define S_TIMER_CLOCK_1US				sysTimerPerUs
+	#define H_TIMER_CLOCK_1US				(sys_clk.pclk)
+
+	#define clock_time()					stimer_get_tick()
+	#define WaitUs(us)						delay_us(us)
+	#define WaitMs(ms)						delay_ms(ms)
+#endif
+
+#define TIMER_TICK_1US_GET(idx)				((idx < TIMER_IDX_3) ? H_TIMER_CLOCK_1US : S_TIMER_CLOCK_1US)
+ 
+/**
+ * hardware_timer_index Hardware Timer Index
+ */
+#define TIMER_IDX_0             			0 //!< Timer0
+#define TIMER_IDX_1             			1 //!< Timer1
+#define TIMER_IDX_2             			2 //!< Timer2, for Watch dog.
+#define TIMER_IDX_3							3 //!< SYS Timer, for MAC-CSMA.
+#define TIMER_NUM               			4 //!< Total number of timer
+
+
+/**
+ * hardware_timer_mode Hardware Timer Mode
+ */
+#define TIMER_MODE_SCLK         			0 //!< Timer running in the system clock mode, it will free run from 0 to 0xffffffff
+#define TIMER_MODE_GPIO         			1
+#define TIMER_MODE_WIDTH_GPIO   			2
+#define TIMER_MODE_TICK_MODE    			3
+
+/**
+ * hardware_timer_state Hardware Timer State
+ */
+#define TIMER_IDLE              			0 //!< Indicating the timer is not running
+#define TIMER_WOF               			1 //!< Waiting for overflow
+#define TIMER_WTO               			2 //!< Waiting for time out
+
+
+/**
+ *  @brief  Definition for 64 bit timer unit
+ */
+typedef struct{
+    u32 low;
+    u32 high;
+}ext_clk_t;
+
+/**
+ *  @brief  Status of Hardware Timer
+ */
+typedef enum hw_timer_sts_e{
+	HW_TIMER_SUCC 		= 0,
+    HW_TIMER_IS_RUNNING = 1,
+	HW_TIMER_INVALID,
+}hw_timer_sts_t;
+
+/**
+ *  @brief  Definition for Timer callback function type
+ */
+typedef int (*timerCb_t)(void *p);
+
+
+ /**
+  * @brief       Initialize the specified hardware timer
+  *
+  * @param[in]   tmrIdx - Index of timer @ref hardware_timer_index
+  * @param[in]   mode   - Specify the timer running mode @ref hardware_timer_mode
+  *
+  * @return      None
+  */
+void drv_hwTmr_init(u8 tmrIdx, u8 mode);
+
+ /**
+  * @brief       Set a new timer through relative time value
+  *
+  * @param[in]   tmrIdx   - Index of timer @ref hardware_timer_index
+  * @param[in]   interval - The time interval from current time. The unit is microsecond
+  * @param[in]   func     - Pointer to the callback function to be invoked when the timer expiry
+  * @param[in]   arg      - Argument of callback function
+  *
+  * @return      Status
+  */
+hw_timer_sts_t drv_hwTmr_set(u8 tmrIdx, u32 t_us, timerCb_t func, void *arg);
+
+/**
+  * @brief       Cancel an existed timer
+  *
+  * @param[in]   tmrIdx  - Index of timer @ref hardware_timer_index
+  *
+  * @return      None
+  */
+void drv_hwTmr_cancel(u8 tmrIdx);
+
+/**
+  * @brief       Interrupt handler of Timer
+  *
+  * @param       None
+  *
+  * @return      None
+  */
+void drv_timer_irq0_handler(void);
+void drv_timer_irq1_handler(void);
+void drv_timer_irq3_handler(void);
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.c
new file mode 100644
index 00000000..a1c17cff
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.c
@@ -0,0 +1,224 @@
+/********************************************************************************************************
+ * @file    drv_uart.c
+ *
+ * @brief   This is the source file for drv_uart
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+#if defined(MCU_CORE_B91)
+#define UART_IDX					UART0
+#define UART_DMA_CHANNEL_RX			DMA2
+#define UART_DMA_CHANNEL_TX			DMA3
+
+static u8 *pUartRxBuf = NULL;
+static u32 uartRxBufLen = 0;
+
+#define UART_RCV_DMA_LEN_FIX()		do{	\
+										u32 rcvDataLen = uart_get_dma_rev_data_len(UART_IDX, UART_DMA_CHANNEL_RX);		\
+										if(pUartRxBuf){																	\
+											pUartRxBuf[0] = (u8)(rcvDataLen);											\
+											pUartRxBuf[1] = (u8)(rcvDataLen >> 8);										\
+											pUartRxBuf[2] = (u8)(rcvDataLen >> 16);										\
+											pUartRxBuf[3] = (u8)(rcvDataLen >> 24);										\
+										}																				\
+									}while(0)
+
+static u8 uart_dma_send(u8 *pBuf);
+#endif	/* MCU_CORE_B91 */
+
+drv_uart_t myUartDriver = {
+		.status = UART_STA_IDLE,
+		.recvCb = NULL,
+#if	defined(MCU_CORE_826x)
+		.send  = uart_pktSend,
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278) || defined(MCU_CORE_B91)
+		.send  = uart_dma_send,
+#endif
+};
+
+static u8 *uartDrvTxBuf = NULL;
+
+void drv_uart_init(u32 baudrate, u8 *rxBuf, u16 rxBufLen, uart_irq_callback uartRecvCb)
+{
+	myUartDriver.status = UART_STA_IDLE;
+	myUartDriver.recvCb = uartRecvCb;
+
+	if(uartDrvTxBuf){
+		ev_buf_free(uartDrvTxBuf);
+		uartDrvTxBuf = NULL;
+	}
+
+#if	defined(MCU_CORE_826x)
+	uart_Reset();
+	uart_Init(baudrate, 1, 1, NOCONTROL);
+	/* configure receive buffer */
+	uart_RecBuffInit(rxBuf, rxBufLen);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	uart_recbuff_init(rxBuf, rxBufLen);
+	uart_reset();  //will reset uart digital registers from 0x90 ~ 0x9f, so uart setting must set after this reset
+
+	uart_init_baudrate(baudrate, UART_CLOCK_SOURCE, PARITY_NONE, STOP_BIT_ONE);
+
+	// dma mode
+	uart_dma_enable(1, 1); 	//uart data in hardware buffer moved by dma, so we need enable them first
+	irq_set_mask(FLD_IRQ_DMA_EN);
+	dma_chn_irq_enable(FLD_DMA_CHN_UART_RX | FLD_DMA_CHN_UART_TX, 1); 	//uart Rx/Tx dma irq enable
+	uart_irq_enable(0, 0);  	//uart Rx/Tx irq no need, disable them
+#elif defined(MCU_CORE_B91)
+	u16 div = 0;
+	u8 bwpc = 0;
+
+	pUartRxBuf = rxBuf;
+	uartRxBufLen = rxBufLen;
+
+	uart_reset(UART_IDX);
+
+	uart_cal_div_and_bwpc(baudrate, UART_CLOCK_SOURCE, &div, &bwpc);
+	uart_set_rx_timeout(UART_IDX, bwpc, 12, UART_BW_MUL2);
+	uart_init(UART_IDX, div, bwpc, UART_PARITY_NONE, UART_STOP_BIT_ONE);
+
+	uart_set_tx_dma_config(UART_IDX, UART_DMA_CHANNEL_TX);
+	uart_set_rx_dma_config(UART_IDX, UART_DMA_CHANNEL_RX);
+
+	uart_receive_dma(UART_IDX, pUartRxBuf + 4, uartRxBufLen);
+
+	uart_clr_tx_done(UART_IDX);
+	uart_clr_irq_mask(UART_IDX, UART_RX_IRQ_MASK | UART_TX_IRQ_MASK | UART_TXDONE_MASK | UART_RXDONE_MASK);
+	uart_set_irq_mask(UART_IDX, UART_RXDONE_MASK | UART_TXDONE_MASK);
+	plic_interrupt_enable((UART_IDX == UART0) ? IRQ19_UART0 : IRQ18_UART1);
+#endif
+}
+
+void drv_uart_pin_set(u32 txPin, u32 rxPin)
+{
+#if	defined(MCU_CORE_826x)
+	gpio_set_func(txPin, AS_UART);
+	gpio_set_func(rxPin, AS_UART);
+	gpio_set_output_en(txPin, 1);
+	gpio_set_input_en(txPin, 0);
+	gpio_set_output_en(rxPin, 0);
+	gpio_set_input_en(rxPin, 1);
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	uart_gpio_set(txPin, rxPin);
+#elif defined(MCU_CORE_B91)
+	uart_set_pin(txPin, rxPin);
+#endif
+}
+
+void drv_uart_rx_irq_handler(void)
+{
+#if defined(MCU_CORE_B91)
+	bool uartRxErr = 0;
+
+	if((uart_get_irq_status(UART_IDX, UART_RX_ERR))){
+		uartRxErr = 1;
+	}else{
+		/* Fix lost DMA length information, must before clear irq status. */
+		UART_RCV_DMA_LEN_FIX();
+	}
+
+	uart_clr_irq_status(UART_IDX, UART_CLR_RX);
+
+	/* Need to reconfigure RX DMA. */
+	uart_receive_dma(UART_IDX, pUartRxBuf + 4, uartRxBufLen);
+
+	if(uartRxErr){
+		return;
+	}
+#endif
+
+	if(myUartDriver.recvCb){
+		myUartDriver.recvCb();
+	}
+}
+
+void drv_uart_tx_irq_handler(void)
+{
+#if defined(MCU_CORE_B91)
+	uart_clr_tx_done(UART_IDX);
+#endif
+
+	if(uartDrvTxBuf){
+		ev_buf_free(uartDrvTxBuf);
+		uartDrvTxBuf = NULL;
+	}
+	myUartDriver.status = UART_STA_TX_DONE;
+}
+
+#if defined(MCU_CORE_B91)
+static u8 uart_dma_send(u8 *pBuf)
+{
+	u32 len = BUILD_U32(pBuf[0], pBuf[1], pBuf[2], pBuf[3]);
+
+	return uart_send_dma(UART_IDX, pBuf + 4, len);
+}
+#endif
+
+static bool uart_tx_done(void)
+{
+	return ((myUartDriver.status == UART_STA_TX_DONE) ? TRUE : FALSE);
+}
+
+static bool uart_is_idel(void)
+{
+	return ((myUartDriver.status == UART_STA_IDLE) ? TRUE : FALSE);
+}
+
+u8 drv_uart_tx_start(u8 *data, u32 len)
+{
+	if(!uart_is_idel()){
+		while(!uart_tx_done());
+	}
+
+	if(!uartDrvTxBuf){
+		uartDrvTxBuf = (u8 *)ev_buf_allocate(len + 4);
+		if(uartDrvTxBuf){
+			myUartDriver.status = UART_STA_TX_DOING;
+			uartDrvTxBuf[0] = (u8)(len);
+			uartDrvTxBuf[1] = (u8)(len >> 8);
+			uartDrvTxBuf[2] = (u8)(len >> 16);
+			uartDrvTxBuf[3] = (u8)(len >> 24);
+			memcpy(uartDrvTxBuf + 4, data, len);
+			if(myUartDriver.send){
+				while(!myUartDriver.send(uartDrvTxBuf));
+				return 1;
+			}
+		}
+	}
+	return 0;
+}
+
+void drv_uart_exceptionProcess(void)
+{
+#if	defined(MCU_CORE_826x)
+	uart_ErrorCLR();
+#elif defined(MCU_CORE_8258) || defined(MCU_CORE_8278)  
+	if(uart_is_parity_error()){
+		uart_clear_parity_error();
+	}
+#elif defined(MCU_CORE_B91)
+	/* RX ERROR is handled in the RX interrupt processing function. */
+#endif
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.h
new file mode 100644
index 00000000..13fe6d2f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_uart.h
@@ -0,0 +1,101 @@
+/********************************************************************************************************
+ * @file    drv_uart.h
+ *
+ * @brief   This is the header file for drv_uart
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+	#define UART_CLOCK_SOURCE			CLOCK_SYS_CLOCK_HZ
+#elif defined(MCU_CORE_B91)
+	/* PCLK provides clock source for UART module. */
+	#define UART_CLOCK_SOURCE			(sys_clk.pclk * 1000 * 1000)
+#endif
+
+enum{
+	UART_STA_IDLE,
+	UART_STA_TX_DOING,
+	UART_STA_TX_DONE,
+	UART_STA_RX_DONE,
+};
+
+typedef void (*uart_irq_callback)(void);
+typedef u8 (*uart_data_send)(u8 *data);
+
+typedef struct{
+	uart_irq_callback recvCb;
+	uart_data_send send;
+	volatile u8 status;
+}drv_uart_t;
+
+
+/****************************************************************************************
+ *	@brief	uart tx/rx pin set
+ *
+ *	@param  txPin		TX pin
+ *	@param  rxPin		RX pin
+ *
+ *	@return	none
+ */
+void drv_uart_pin_set(u32 txPin, u32 rxPin);
+
+/****************************************************************************************
+ *	@brief	init UART receive callback function
+ *
+ *	@param  baudRate		baud rate
+ *	@param  rxBuf			the buffer for data receiving
+ *	@param  rxBufLen		the length of the uart RX buffer, must be a multiple of 4
+ *	@param	uart_recvCb		UART receive callback function.
+ *
+ *	@return	none
+ */
+void drv_uart_init(u32 baudRate, u8 *rxBuf, u16 rxBufLen, uart_irq_callback uartRecvCb);
+
+/****************************************************************************************
+ *	@brief	uart Rx ISR
+ *
+ */
+void drv_uart_rx_irq_handler(void);
+
+/****************************************************************************************
+ *	@brief	uart Tx ISR
+ *
+ */
+void drv_uart_tx_irq_handler(void);
+
+/****************************************************************************************
+ *	@brief	uart data send function
+ *
+ *	@param	data	start address of the data
+ *	@param	len		length of data
+ *
+ *	@return	1: finished, 0: failed
+ */
+u8 drv_uart_tx_start(u8 *data, u32 len);
+
+/****************************************************************************************
+ *	@brief	check if exception occurs
+ *
+ */
+void drv_uart_exceptionProcess(void);
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_usb.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_usb.h
new file mode 100644
index 00000000..90688113
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/drv_usb.h
@@ -0,0 +1,59 @@
+/********************************************************************************************************
+ * @file    drv_usb.h
+ *
+ * @brief   This is the header file for drv_usb
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#if defined(MCU_CORE_826x) || defined(MCU_CORE_8258) || defined(MCU_CORE_8278)
+
+static inline u8 usb_is_irq_reset(void){
+	return reg_irq_src & FLD_IRQ_USB_RST_EN;
+}
+
+static inline void usb_clear_irq_reset(void){
+	reg_irq_src = FLD_IRQ_USB_RST_EN;
+}
+
+#elif defined(MCU_CORE_B91)
+
+static inline u8 usb_is_irq_reset(void) {
+	return reg_usb_irq_mask & USB_IRQ_RESET_STATUS;
+}
+
+static inline void usb_clear_irq_reset(void) {
+	reg_usb_irq_mask |= USB_IRQ_RESET_STATUS;
+}
+
+static inline void usb_edp_en(void) {
+	usbhw_set_eps_en( FLD_USB_EDP8_EN |
+					  FLD_USB_EDP1_EN |
+					  FLD_USB_EDP2_EN |
+					  FLD_USB_EDP3_EN |
+					  FLD_USB_EDP4_EN |
+					  FLD_USB_EDP5_EN |
+					  FLD_USB_EDP6_EN |
+					  FLD_USB_EDP7_EN );
+	usbhw_set_irq_mask(USB_IRQ_RESET_MASK | USB_IRQ_SUSPEND_MASK);
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.c
new file mode 100644
index 00000000..d130ebb4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.c
@@ -0,0 +1,343 @@
+/********************************************************************************************************
+ * @file    usbcdc.c
+ *
+ * @brief   This is the source file for usbcdc
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbcdc.h"
+
+#if (USB_CDC_ENABLE)
+
+cdc_ctrl_t cdc_vs;
+cdc_ctrl_t *cdc_v = &cdc_vs;
+
+USB_ClassInfo_CDC_Device_t VirtualSerial_CDC_Interface =
+{
+	//.Config =
+    {
+	    0, //ControlInterfaceNumber
+
+		CDC_TX_EPNUM, // DataINEndpointNumber
+		CDC_TXRX_EPSIZE, // DataINEndpointSize
+		false, // DataINEndpointDoubleBank
+
+		CDC_RX_EPNUM,  // DataOUTEndpointNumber
+		CDC_TXRX_EPSIZE, // DataOUTEndpointSize
+		false, // DataOUTEndpointDoubleBank
+
+		CDC_NOTIFICATION_EPNUM, // NotificationEndpointNumber
+		CDC_NOTIFICATION_EPSIZE, // NotificationEndpointSize
+		false,  // NotificationEndpointDoubleBank
+	},
+};
+
+USB_ClassInfo_CDC_Device_t *CDCInterfaceInfo = &VirtualSerial_CDC_Interface;
+
+
+static void usbcdc_write32(u32 value)
+{
+	usbhw_write_ctrl_ep_data(value & 0xff);
+	usbhw_write_ctrl_ep_data((value >> 8) & 0xff);
+	usbhw_write_ctrl_ep_data((value >> 16) & 0xff);
+	usbhw_write_ctrl_ep_data((value >> 24) & 0xff);
+}
+
+static void usbcdc_read32(u32 *value)
+{
+	u32 temp = 0;
+	*value = usbhw_read_ctrl_ep_data();
+
+	temp =  usbhw_read_ctrl_ep_data();
+	*value = (temp << 8) | (*value);
+	temp = 0;
+
+	temp =  usbhw_read_ctrl_ep_data();
+	*value = (temp << 16) | (*value);
+	temp = 0;
+
+	temp =  usbhw_read_ctrl_ep_data();
+	*value = (temp << 24) | (*value);
+}
+
+/**
+ * @brief This function handles the USB CDC class-specific requests from host
+ * @param[in]   bRequest the request type
+ * @param[in]   wValue word-sized field that varies according to request
+ * @param[in]   wIndex word-sized field that varies according to request
+ *              typically used to pass an index or offset
+ * @param[in]   wLength number of bytes to transfer if there is a Data stage
+ * @return none
+ */
+void usbcdc_processControlRequest(u8 bRequest, u16 wValue, u16 wIndex, u16 wLength)
+{
+	if(wIndex != CDCInterfaceInfo->Config.ControlInterfaceNumber)
+	  return;
+
+	switch(bRequest){
+		case CDC_REQ_GetLineEncoding:
+            usbcdc_write32(CDCInterfaceInfo->State.LineEncoding.BaudRateBPS);
+			usbhw_write_ctrl_ep_data(CDCInterfaceInfo->State.LineEncoding.CharFormat);
+            usbhw_write_ctrl_ep_data(CDCInterfaceInfo->State.LineEncoding.ParityType);
+            usbhw_write_ctrl_ep_data(CDCInterfaceInfo->State.LineEncoding.DataBits);
+			break;
+		case CDC_REQ_SetLineEncoding:
+			usbcdc_read32(&CDCInterfaceInfo->State.LineEncoding.BaudRateBPS);
+			CDCInterfaceInfo->State.LineEncoding.CharFormat  = usbhw_read_ctrl_ep_data();
+			CDCInterfaceInfo->State.LineEncoding.ParityType  = usbhw_read_ctrl_ep_data();
+			CDCInterfaceInfo->State.LineEncoding.DataBits    = usbhw_read_ctrl_ep_data();
+			break;
+		case CDC_REQ_SetControlLineState:
+			CDCInterfaceInfo->State.ControlLineStates.HostToDevice = wValue;
+			break;
+		case CDC_REQ_SendBreak:
+			break;
+	}
+}
+
+
+u8 usbcdc_isAvailable(void)
+{
+	return (cdc_v->txBuf == NULL);
+}
+
+u8 usbcdc_isTxBusy(void)
+{
+    return usbhw_is_ep_busy(CDC_TX_EPNUM);
+}
+
+/**
+ * @brief This function initializes the USB CDC device
+ * @param   none
+ * @return none
+ */
+void usbcdc_init(void)
+{
+	/* Init UART parameters */
+	CDCInterfaceInfo->State.LineEncoding.BaudRateBPS = 115200;
+	CDCInterfaceInfo->State.LineEncoding.CharFormat = CDC_LINEENCODING_OneStopBit;
+	CDCInterfaceInfo->State.LineEncoding.ParityType = CDC_PARITY_None;
+	CDCInterfaceInfo->State.LineEncoding.DataBits = 8;
+
+    cdc_v->lastIndex = 0;
+}
+
+/**
+ * @brief This function sets the USB CDC rx buffer
+ * @param[in]   buf pointer to the rx buffer
+ * @return none
+ */
+void usbcdc_setRxBuf(u8 *buf)
+{
+	cdc_v->rxBuf = buf;
+}
+
+/**
+ * @brief This function sets the USB CDC tx and rx callback function
+ * @param[in]   rxFunc rx callback function
+ * @param[in]   txCb tx callback function
+ * @return none
+ */
+void usbcdc_setCb(cdc_handlerFn_t rxFunc, cdc_handlerFn_t txCb)
+{
+	cdc_v->rxCb = rxFunc;
+    cdc_v->txCb = txCb;
+}
+
+static s32 usbcdc_recvTimeoutCb(void *arg)
+{
+	u8 *p;
+
+	cdc_v->lastIndex = 0;
+
+	/* Clear the buffer */
+	p = cdc_v->rxBuf;
+	cdc_v->rxBuf = NULL;
+
+	/* Callback */
+	if(cdc_v->rxCb){
+		cdc_v->rxCb(p);
+	}
+
+	cdc_v->timer = NULL;
+	return -1;
+}
+
+static void usbcdc_recvData(void)
+{
+	u8 i;
+	u8 *p;
+	u8 len;
+	u8 fEnd = 0;
+
+	/* No buffer */
+	if(!cdc_v->rxBuf){
+		while(1);
+	}
+
+	if(cdc_v->timer){
+		TL_ZB_TIMER_CANCEL(&cdc_v->timer);
+	}
+
+	len = reg_usb_ep_ptr(CDC_RX_EPNUM & 0x07);
+	fEnd = (len == CDC_TXRX_EPSIZE) ? 0 : 1;
+	usbhw_reset_ep_ptr(CDC_RX_EPNUM);
+
+	for(i = 0; i < len; i++){
+		cdc_v->rxBuf[cdc_v->lastIndex++] = usbhw_read_ep_data(CDC_RX_EPNUM);
+	}
+
+	if(fEnd){
+		cdc_v->lastIndex = 0;
+
+		/* Clear the buffer */
+		p = cdc_v->rxBuf;
+		cdc_v->rxBuf = NULL;
+
+		/* Callback */
+		if(cdc_v->rxCb){
+			cdc_v->rxCb(p);
+		}
+	}else{
+		cdc_v->timer = TL_ZB_TIMER_SCHEDULE(usbcdc_recvTimeoutCb, NULL, 20);
+	}
+}
+
+/**
+ * @brief This function sends bulk data to host as the USB CDC device
+ * @param[in]   none
+ * @return the length of the data send out
+ */
+u8 usbcdc_sendBulkData(void)
+{
+	u16 len;
+
+	/* Wait until not busy */
+	if(usbhw_is_ep_busy(CDC_TX_EPNUM)){
+        /* Return to wait IRQ come again */
+        return 0;
+    }
+
+    /* Get the length to send in this bulk transaction */
+	len = (cdc_v->lenToSend > CDC_TXRX_EPSIZE) ? CDC_TXRX_EPSIZE : cdc_v->lenToSend;
+	cdc_v->lenToSend -= len;
+
+	if(len == 0){
+		return 0;
+	}
+
+    reg_usb_ep_ptr(CDC_TX_EPNUM) = 0;
+
+	/* Write data to USB fifo */
+    foreach(i, len){
+        reg_usb_ep_dat(CDC_TX_EPNUM) = cdc_v->txBuf->data[cdc_v->lastSendIndex++];
+    }
+
+	/* Write ACK */
+    reg_usb_ep_ctrl(CDC_TX_EPNUM) = FLD_EP_DAT_ACK;        // ACK
+    u16 t = 0;
+    while(usbhw_is_ep_busy(CDC_TX_EPNUM)){
+        if(t++ > 10000){
+            reg_usb_ep_ctrl(CDC_TX_EPNUM) &= 0xfe; // clear bit(0)
+        }
+    };
+
+    /* TX transaction finish */
+	if(cdc_v->lenToSend == 0){
+		cdc_v->lenToSend = 0;
+		cdc_v->lastSendIndex = 0;
+
+        if(cdc_v->txCb){
+            //EV_SCHEDULE_TASK(cdc_v->txCb, cdc_v->txBuf);
+            cdc_v->txCb((u8 *)cdc_v->txBuf);
+        }
+
+		cdc_v->txBuf = NULL;
+	}
+
+	return len;
+}
+
+/**
+ * @brief This function sends data to host as the USB CDC device
+ * @param[in]   buf pointer to the data need to send
+ * @param[in]   len length in byte of the data need to send
+ * @return none
+ */
+usbcdc_sts_t usbcdc_sendData(usbcdc_txBuf_t *txBuf)//u8 *buf, u8 len)
+{
+	if(cdc_v->txBuf){
+		return USB_CDC_BUSY;
+	}
+
+	/* Init the bulk transfer */
+    cdc_v->lenToSend = txBuf->len;
+	cdc_v->txBuf = txBuf;
+	cdc_v->lastSendIndex = 0;
+
+    /* Send first bulk */
+	usbcdc_sendBulkData();
+
+	usbhw_data_ep_ack(CDC_RX_EPNUM);
+
+	return USB_CDC_SUCCESS;
+}
+
+u8 usbWriteByte(u8 byte){
+	if(usbhw_is_ep_busy(CDC_TX_EPNUM)){
+		/* Return to wait IRQ come again */
+		return 0;
+	}
+	reg_usb_ep_ptr(CDC_TX_EPNUM) = 0;
+	reg_usb_ep_dat(CDC_TX_EPNUM) = byte;
+	/* Write ACK */
+	reg_usb_ep_ctrl(CDC_TX_EPNUM) = FLD_EP_DAT_ACK;        // ACK
+	u16 t = 0;
+	while(usbhw_is_ep_busy(CDC_TX_EPNUM)){
+		if(t++ > 10000){
+			reg_usb_ep_ctrl(CDC_TX_EPNUM) &= 0xfe; // clear bit(0)
+		}
+	}
+	return 1;
+}
+
+void usbcdc_dataHandler(void)
+{
+	u32 irq = usbhw_get_eps_irq();
+
+	if(irq & BIT((CDC_RX_EPNUM & 0x07))){
+		usbhw_clr_eps_irq(BIT((CDC_RX_EPNUM & 0x07))); // clear ime
+
+		usbcdc_recvData();
+
+		usbhw_data_ep_ack(CDC_RX_EPNUM);
+	}
+
+	if(irq & BIT((CDC_TX_EPNUM & 0x07))){
+		usbhw_clr_eps_irq(BIT((CDC_TX_EPNUM & 0x07))); // clear ime
+
+		if(usbcdc_sendBulkData()){
+			usbhw_data_ep_ack(CDC_RX_EPNUM);
+		}
+	}
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.h
new file mode 100644
index 00000000..e8b1f5c1
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbcdc.h
@@ -0,0 +1,139 @@
+/********************************************************************************************************
+ * @file    usbcdc.h
+ *
+ * @brief   This is the header file for usbcdc
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../usbdesc.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+    extern "C" {
+#endif
+
+
+typedef void (*cdc_handlerFn_t)(u8 *pData);
+
+typedef struct {
+    u16 len;
+    u8  data[1];
+} usbcdc_txBuf_t;
+
+typedef struct {
+    u8 *rxBuf;
+    usbcdc_txBuf_t *txBuf;
+
+	/* Following variables are used in the RX more than CDC_TXRX_EPSIZE */
+    ev_timer_event_t *timer;
+
+	cdc_handlerFn_t rxCb;
+    cdc_handlerFn_t txCb;
+
+	u16 lenToSend;
+	u16 lastSendIndex;
+	u8  lastIndex;
+} cdc_ctrl_t;
+
+typedef enum usbcdc_sts_e {
+	USB_CDC_SUCCESS = 0,
+    USB_CDC_BUSY 	= 1,
+    USB_CDC_MULTIBLOCK,
+} usbcdc_sts_t;
+
+
+/**
+ * @brief This function handles the USB CDC class-specific requests from host
+ * @param[in]   bRequest the request type
+ * @param[in]   wValue word-sized field that varies according to request
+ * @param[in]   wIndex word-sized field that varies according to request
+ *              typically used to pass an index or offset
+ * @param[in]   wLength number of bytes to transfer if there is a Data stage
+ * @return none
+ */
+void usbcdc_processControlRequest(u8 bRequest, u16 wValue, u16 wIndex, u16 wLength);
+
+/**
+ * @brief This function used to send or receive data as the USB CDC device
+ * @param   none
+ * @return  none
+ */
+void usbcdc_dataHandler(void);
+
+/**
+ * @brief This function initializes the USB CDC device
+ * @param   none
+ * @return none
+ */
+void usbcdc_init(void);
+
+/**
+ * @brief This function sets the USB CDC tx and rx callback function
+ * @param[in]   rxFunc rx callback function
+ * @param[in]   txCb tx callback function
+ * @return none
+ */
+void usbcdc_setCb(cdc_handlerFn_t rxFunc, cdc_handlerFn_t txCb);
+
+/**
+ * @brief This function sets the USB CDC rx buffer
+ * @param[in]   buf pointer to the rx buffer
+ * @return none
+ */
+void usbcdc_setRxBuf(u8 *buf);
+
+/**
+ * @brief This function used to send one byte to host
+ * @param   none
+ * @return 1: send out successfully 0: the USB interface is busy
+ */
+u8 usbWriteByte(u8 byte);
+
+/**
+ * @brief This function sends data to host as the USB CDC device
+ * @param[in]   buf pointer to the data need to send
+ * @param[in]   len length in byte of the data need to send
+ * @return none
+ */
+usbcdc_sts_t usbcdc_sendData(usbcdc_txBuf_t *txBuf);
+
+/**
+ * @brief This function determines whether the USB interface is available
+ * @param   none
+ * @return 1: the USB interface is available 0: the USB interface is busy
+ */
+u8 usbcdc_isAvailable(void);
+
+/**
+ * @brief This function used to check whether the Tx of the control endpoint is busy
+ * @param   none
+ * @return 1: the control endpoint is busy 0: the control endpoint is idle
+ */
+u8 usbcdc_isTxBusy(void);
+
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+    }
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.c
new file mode 100644
index 00000000..b6e909d9
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.c
@@ -0,0 +1,47 @@
+/********************************************************************************************************
+ * @file    usbkb.c
+ *
+ * @brief   This is the source file for usbkb
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbkb.h"
+
+#if (MODULE_KEYBOARD_ENABLE)
+
+u8 usbkb_hid_report_normal(u8 ctrl_key, u8 *keycode){
+	if(usbhw_is_ep_busy(USB_EDP_KEYBOARD_IN))
+		return 0;
+
+	reg_usb_ep_ptr(USB_EDP_KEYBOARD_IN) = 0;
+
+	// please refer to keyboard_report_desc
+	reg_usb_ep_dat(USB_EDP_KEYBOARD_IN) = ctrl_key;
+	reg_usb_ep_dat(USB_EDP_KEYBOARD_IN) = 0;//resv
+	foreach(i, KEYBOARD_REPORT_KEY_MAX){
+	    reg_usb_ep_dat(USB_EDP_KEYBOARD_IN) = keycode[i];
+	}
+	reg_usb_ep_ctrl(USB_EDP_KEYBOARD_IN) = FLD_EP_DAT_ACK;		// ACK
+	return 1;
+}
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.h
new file mode 100644
index 00000000..992c20e4
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb.h
@@ -0,0 +1,45 @@
+/********************************************************************************************************
+ * @file    usbkb.h
+ *
+ * @brief   This is the header file for usbkb
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "usbkb_i.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#define KEYBOARD_REPORT_KEY_MAX     6
+
+
+u8 usbkb_hid_report_normal(u8 ctrl_key, u8 *keycode);
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb_i.h
new file mode 100644
index 00000000..6e1fc5ef
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbkb_i.h
@@ -0,0 +1,51 @@
+/********************************************************************************************************
+ * @file    usbkb_i.h
+ *
+ * @brief   This is the header file for usbkb_i
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../usbdesc.h"
+
+#if (USB_KEYBOARD_ENABLE)
+
+/** HID class report descriptor. This is a special descriptor constructed with values from the
+ *  USBIF HID class specification to describe the reports and capabilities of the HID device. This
+ *  descriptor is parsed by the host and its contents used to determine what data (and in what encoding)
+ *  the device will send, and what it may be sent back from the host. Refer to the HID specification for
+ *  more details on HID report descriptors.
+ */
+static const USB_Descriptor_HIDReport_Datatype_t keyboard_report_desc[] = {
+    HID_DESCRIPTOR_KEYBOARD(KEYBOARD_REPORT_KEY_MAX),
+};
+
+static inline u8 *usbkb_get_report_desc(void){
+	return (u8 *)(keyboard_report_desc);
+}
+
+static inline u16 usbkb_get_report_desc_size(void){
+	return (u16)(sizeof(keyboard_report_desc));
+}
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.c
new file mode 100644
index 00000000..e4402766
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.c
@@ -0,0 +1,61 @@
+/********************************************************************************************************
+ * @file    usbmouse.c
+ *
+ * @brief   This is the source file for usbmouse
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbmouse.h"
+
+#if (USB_MOUSE_ENABLE)
+
+u8 usbmouse_hid_report(u8 report_id, u8 *data, int cnt){
+    if(!reg_usb_host_conn){
+    	reg_usb_ep_ctrl(USB_EDP_MOUSE) = 0;
+    	return 0;
+    }
+
+	if(usbhw_is_ep_busy(USB_EDP_MOUSE))
+		return 0;
+
+	reg_usb_ep_ptr(USB_EDP_MOUSE) = 0;
+
+	// please refer to usbmouse_i.h mouse_report_desc
+	extern u8 usb_mouse_report_proto;
+
+	if(!usb_mouse_report_proto){
+		reg_usb_ep_dat(USB_EDP_MOUSE) = data[0];
+		reg_usb_ep_dat(USB_EDP_MOUSE) = data[1];
+		reg_usb_ep_dat(USB_EDP_MOUSE) = data[2];
+	}else{
+		reg_usb_ep_dat(USB_EDP_MOUSE) = report_id;
+		foreach(i, cnt){
+			reg_usb_ep_dat(USB_EDP_MOUSE) = data[i];
+		}
+	}
+
+	reg_usb_ep_ctrl(USB_EDP_MOUSE) = FLD_EP_DAT_ACK;		// ACK
+
+	return 1;
+}
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.h
new file mode 100644
index 00000000..479c11ae
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse.h
@@ -0,0 +1,42 @@
+/********************************************************************************************************
+ * @file    usbmouse.h
+ *
+ * @brief   This is the header file for usbmouse
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "usbmouse_i.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	extern "C" {
+#endif
+
+
+
+u8 usbmouse_hid_report(u8 report_id, u8 *data, int cnt);
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse_i.h
new file mode 100644
index 00000000..03e3a40c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbmouse_i.h
@@ -0,0 +1,145 @@
+/********************************************************************************************************
+ * @file    usbmouse_i.h
+ *
+ * @brief   This is the header file for usbmouse_i
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../usbdesc.h"
+
+#if (USB_MOUSE_ENABLE)
+
+/** HID class report descriptor. This is a special descriptor constructed with values from the
+ *  USBIF HID class specification to describe the reports and capabilities of the HID device. This
+ *  descriptor is parsed by the host and its contents used to determine what data (and in what encoding)
+ *  the device will send, and what it may be sent back from the host. Refer to the HID specification for
+ *  more details on HID report descriptors.
+ */
+/* debug note: */
+/*
+ 0x85, 0x01, //Report ID (1) keyboard
+ 0x85, 0x02, //report ID 02 mouse
+ */
+static const USB_Descriptor_HIDReport_Datatype_t mouse_report_desc[] = {
+	0x05, 0x01,
+	0x09, 0x02,
+	0xa1, 0x01,
+	0x85, USB_HID_MOUSE,
+	0x09, 0x01, //   USAGE (Pointer)
+	0xa1, 0x00, //   COLLECTION (Physical)
+
+	0x05, 0x09, //     USAGE_PAGE (Button)
+	0x19, 0x01, //     USAGE_MINIMUM (Button 1)
+	0x29, 0x05, //     USAGE_MAXIMUM (Button 5)
+	0x15, 0x00, //     LOGICAL_MINIMUM (0)
+	0x25, 0x01, //     LOGICAL_MAXIMUM (1)
+	0x95, 0x05, //     REPORT_COUNT (3)
+	0x75, 0x01, //     REPORT_SIZE (1)
+
+
+	0x81, 0x02, //     INPUT (Data,Var,Abs)
+	0x95, 0x01, //     REPORT_COUNT (1)
+	0x75, 0x03, //     REPORT_SIZE (3)
+
+	0x81, 0x01, //     INPUT (Cnst,Var,Abs)
+	0x05, 0x01, //     USAGE_PAGE (Generic Desktop)
+	0x09, 0x30, //     USAGE (X)
+
+	0x09, 0x31, //     USAGE (Y)
+	0x15, 0x81, //     LOGICAL_MINIMUM (-127)
+	0x25, 0x7f, //     LOGICAL_MAXIMUM (127)
+
+	0x75, 0x08, //     REPORT_SIZE (16)
+	0x95, 0x02, //     REPORT_COUNT (2)
+	0x81, 0x06, //     INPUT (Data,Var,Rel)
+	0x09, 0x38, //     USAGE (Wheel)
+	0x15, 0x81, //LOGICAL_MINIMUM (-127)
+	0x25, 0x7f, //LOGICAL_MAXIMUM (127)
+	0x75, 0x08, //REPORT_SIZE (16)
+	0x95, 0x01, //REPORT_COUNT (1)
+	0x81, 0x06, //INPUT (Data,Var,Rel)
+	0xc0, //   END_COLLECTION
+	0xc0, // END_COLLECTION
+
+#if (ONEKEY_WEB==0)
+	// begin of media key
+	0x05,0x0c,     //global, usage page (follow 1 bytes) consumer page
+	0x09,0x01,     //local,  usage ID 01  Consumer Control
+	0xA1,0x01,     //main, collection
+	0x85,USB_HID_KB_MEDIA,     //global, report ID 0x03
+	0x75,0x10,     //global, report size 16 bits
+	0x95,0x02,     //global, report count 2
+	0x15,0x01,     //global, min  0x01
+	0x26,0x8c,0x02,  //global, max  0x28c
+#if CHIP_EOP_ERROR
+	0x19,0x01,     //local, min   0x01
+	0x2a,0xff,0x02,  //local, max    0x2ff
+#else
+	0x19,0x01,     //local, min   0x01
+	0x2a,0x8c,0x02,  //local, max    0x28c
+#endif
+	0x81,0x00,     //main,  input data varible, absolute
+	0xc0,        //main, end collection
+
+	0x05,0x01,     //gobal,  USAGE_PAGE 1 (Generic Desktop)
+	0x09,0x80,     //local, usage ID 0x80 system control
+	0xa1,0x01,     //main conllection
+	0x85,USB_HID_KB_SYS,     //global report ID 0x4
+	0x75,0x02,     //global, report size 2
+	0x95,0x01,     //report count  1
+	0x15,0x01,     //global min 01
+	0x25,0x03,     //gobal, max 3
+	0x09,0x82,     //local usage ID 0x82 system sleep
+	0x09,0x81,     //local usage ID 0x81 system power down
+	0x09,0x83,     //local usage ID 0x83 system wakeup
+	0x81,0x60,     //main, input data, var, abs, No Prefer, NULL state
+	0x75,0x06,     //global report size 6
+	0x81,0x03,     //main input, constant, array
+	0xc0,        //end of collection
+	// end of media key
+#endif
+
+    //need Jensen's help: report ID 5
+    HID_RI_USAGE_PAGE(8, 0x01),     //global,  USAGE_PAGE 1 (Generic Desktop)
+	0x09,0x00,     //usage undefined
+	0xa1,0x01,     //main collection
+	0x85,0x05,     //global report ID 0x5
+	0x06,0x00,0xff,  //global usage page
+	0x09,0x01,     //local,  usage ID 01  Consumer Control
+	0x15,0x81,     //global min 81
+	0x25,0x7f,     //global, max 7f
+	0x75,0x08,     //global, report size 8
+	0x95,0x07,     //report count  7
+	0xb1,0x02,     //feature (data, var, abs)
+	HID_RI_END_COLLECTION(0),         //main, end collection
+};
+
+static inline u8 *usbmouse_get_report_desc(void){
+	return (u8 *)(mouse_report_desc);
+}
+
+static inline u16 usbmouse_get_report_desc_size(void){
+	return (u16)(sizeof(mouse_report_desc));
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.c
new file mode 100644
index 00000000..cea2e155
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.c
@@ -0,0 +1,236 @@
+/********************************************************************************************************
+ * @file    usbvendor.c
+ *
+ * @brief   This is the source file for usbvendor
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbvendor.h"
+
+#if (USB_VENDOR_ENABLE)
+
+hidvendor_ctrl_t hidvendor_vs;
+hidvendor_ctrl_t *hidvendor_v = &hidvendor_vs;
+
+
+/**
+ * @brief This function initializes the USB vendor device
+ * @param   none
+ * @return none
+ */
+void hidvendor_init(void)
+{
+    hidvendor_v->lastIndex = 0;
+}
+
+u8 hidvendor_isAvailable(void)
+{
+	return (hidvendor_v->txBuf == NULL);
+}
+
+u8 hidvendor_isTxBusy(void)
+{
+    return usbhw_is_ep_busy(USB_EDP_HID_VENDOR_IN);
+}
+
+/**
+ * @brief This function sets the USB vendor rx buffer
+ * @param[in]   buf pointer to the rx buffer
+ * @return none
+ */
+void hidvendor_setRxBuf(u8 *buf)
+{
+	hidvendor_v->rxBuf = buf;
+}
+
+/**
+ * @brief This function sets the USB vendor tx and rx callback function
+ * @param[in]   rxFunc rx callback function
+ * @param[in]   txCb tx callback function
+ * @return none
+ */
+void hidvendor_setCb(hidvendor_handlerFn_t rxFunc, hidvendor_handlerFn_t txCb)
+{
+	hidvendor_v->rxCb = rxFunc;
+    hidvendor_v->txCb = txCb;
+}
+
+static s32 hidvendor_recvTimeoutCb(void *arg)
+{
+	u8 *p;
+
+	hidvendor_v->lastIndex = 0;
+
+	/* Clear the buffer */
+	p = hidvendor_v->rxBuf;
+	hidvendor_v->rxBuf = NULL;
+
+	/* Callback */
+	if(hidvendor_v->rxCb){
+		hidvendor_v->rxCb(p);
+	}
+
+	hidvendor_v->timer = NULL;
+	return -1;
+}
+
+static void hidvendor_recvData(void)
+{
+	u8 i;
+	u8 *p;
+	u8 len;
+	u8 fEnd = 0;
+
+	/* No buffer */
+	if(!hidvendor_v->rxBuf){
+		while(1);
+	}
+
+	if(hidvendor_v->timer){
+		TL_ZB_TIMER_CANCEL(&hidvendor_v->timer);
+	}
+
+	len = reg_usb_ep_ptr(USB_EDP_HID_VENDOR_OUT & 0x07);
+	fEnd = (len == HID_VENDOR_TXRX_EPSIZE) ? 0 : 1;
+	usbhw_reset_ep_ptr(USB_EDP_HID_VENDOR_OUT);
+
+	for(i = 0; i < len; i++){
+		hidvendor_v->rxBuf[hidvendor_v->lastIndex++] = usbhw_read_ep_data(USB_EDP_HID_VENDOR_OUT);
+	}
+
+	if(fEnd){
+		hidvendor_v->lastIndex = 0;
+
+		/* Clear the buffer */
+		p = hidvendor_v->rxBuf;
+		hidvendor_v->rxBuf = NULL;
+
+		/* Callback */
+		if(hidvendor_v->rxCb){
+			hidvendor_v->rxCb(p);
+		}
+	}else{
+		hidvendor_v->timer = TL_ZB_TIMER_SCHEDULE(hidvendor_recvTimeoutCb, NULL, 20);
+	}
+}
+
+/**
+ * @brief This function sends bulk data to host as the USB vendor device
+ * @param[in]   none
+ * @return the length of the data send out
+ */
+static u8 hidvendor_sendData(void)
+{
+	u16 len;
+
+	/* Wait until not busy */
+	if(usbhw_is_ep_busy(USB_EDP_HID_VENDOR_IN)){
+        /* Return to wait IRQ come again */
+        return 0;
+    }
+
+    /* Get the length to send in this bulk transaction */
+	len = (hidvendor_v->lenToSend > HID_VENDOR_TXRX_EPSIZE) ? HID_VENDOR_TXRX_EPSIZE : hidvendor_v->lenToSend;
+	hidvendor_v->lenToSend -= len;
+
+	if(len == 0){
+		return 0;
+	}
+
+    reg_usb_ep_ptr(USB_EDP_HID_VENDOR_IN) = 0;
+
+	/* Write data to USB fifo */
+    foreach(i, len){
+        reg_usb_ep_dat(USB_EDP_HID_VENDOR_IN) = hidvendor_v->txBuf->data[hidvendor_v->lastSendIndex++];
+    }
+
+	/* Write ACK */
+    reg_usb_ep_ctrl(USB_EDP_HID_VENDOR_IN) = FLD_EP_DAT_ACK;        // ACK
+    u16 t = 0;
+    while(usbhw_is_ep_busy(USB_EDP_HID_VENDOR_IN)){
+        if(t++ > 10000){
+            reg_usb_ep_ctrl(USB_EDP_HID_VENDOR_IN) &= 0xfe; // clear bit(0)
+        }
+    };
+
+    /* TX transaction finish */
+	if(hidvendor_v->lenToSend == 0){
+		hidvendor_v->lenToSend = 0;
+		hidvendor_v->lastSendIndex = 0;
+
+        if(hidvendor_v->txCb){
+            //EV_SCHEDULE_TASK(hid_v->txCb, hid_v->txBuf);
+            hidvendor_v->txCb((u8 *)hidvendor_v->txBuf);
+        }
+
+		hidvendor_v->txBuf = NULL;
+	}
+
+	return len;
+}
+
+/**
+ * @brief This function sends data to host as the USB vendor device
+ * @param[in]   buf pointer to the data need to send
+ * @param[in]   len length in byte of the data need to send
+ * @return none
+ */
+hidvendor_sts_t hidvendor_reportData(hidvendor_txBuf_t *txBuf)//u8 *buf, u8 len)
+{
+	if(hidvendor_v->txBuf){
+		return HID_VENDOR_BUSY;
+	}
+
+	/* Init the bulk transfer */
+    hidvendor_v->lenToSend = txBuf->len;
+	hidvendor_v->txBuf = txBuf;
+	hidvendor_v->lastSendIndex = 0;
+
+    /* Send first bulk */
+	hidvendor_sendData();
+
+	usbhw_data_ep_ack(USB_EDP_HID_VENDOR_OUT);
+
+	return HID_VENDOR_SUCCESS;
+}
+
+void hidvendor_dataHandler(void)
+{
+	u32 irq = usbhw_get_eps_irq();// data irq
+
+	if(irq & BIT((USB_EDP_HID_VENDOR_OUT & 0x07))){
+		usbhw_clr_eps_irq(BIT((USB_EDP_HID_VENDOR_OUT & 0x07))); // clear ime
+
+		hidvendor_recvData();
+
+		usbhw_data_ep_ack(USB_EDP_HID_VENDOR_OUT);
+	}
+
+	if(irq & BIT((USB_EDP_HID_VENDOR_IN & 0x07))){
+		usbhw_clr_eps_irq(BIT((USB_EDP_HID_VENDOR_IN & 0x07))); // clear ime
+
+		if(hidvendor_sendData()){
+			usbhw_data_ep_ack(USB_EDP_HID_VENDOR_OUT);
+		}
+	}
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.h
new file mode 100644
index 00000000..f1fa9163
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor.h
@@ -0,0 +1,118 @@
+/********************************************************************************************************
+ * @file    usbvendor.h
+ *
+ * @brief   This is the header file for usbvendor
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "usbvendor_i.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+    extern "C" {
+#endif
+
+
+typedef void (*hidvendor_handlerFn_t)(u8 *pData);
+
+typedef struct {
+    u16 len;
+    u8  data[1];
+} hidvendor_txBuf_t;
+
+typedef struct {
+    u8 *rxBuf;
+    hidvendor_txBuf_t *txBuf;
+
+	/* Following variables are used in the RX more than CDC_TXRX_EPSIZE */
+    ev_timer_event_t *timer;
+
+	hidvendor_handlerFn_t rxCb;
+	hidvendor_handlerFn_t txCb;
+
+	u16 lenToSend;
+	u16 lastSendIndex;
+	u8  lastIndex;
+} hidvendor_ctrl_t;
+
+typedef enum hidvendor_sts_e {
+	HID_VENDOR_SUCCESS  = 0,
+	HID_VENDOR_BUSY 	= 1,
+	HID_VENDOR_MULTIBLOCK,
+} hidvendor_sts_t;
+
+/**
+ * @brief This function used to send or receive data as the USB vendor device
+ * @param   none
+ * @return  none
+ */
+void hidvendor_dataHandler(void);
+
+/**
+ * @brief This function initializes the USB vendor device
+ * @param   none
+ * @return none
+ */
+void hidvendor_init(void);
+
+/**
+ * @brief This function sets the USB vendor tx and rx callback function
+ * @param[in]   rxFunc rx callback function
+ * @param[in]   txCb tx callback function
+ * @return none
+ */
+void hidvendor_setCb(hidvendor_handlerFn_t rxFunc, hidvendor_handlerFn_t txCb);
+
+/**
+ * @brief This function sets the USB vendor rx buffer
+ * @param[in]   buf pointer to the rx buffer
+ * @return none
+ */
+void hidvendor_setRxBuf(u8 *buf);
+
+/**
+ * @brief This function sends data to host as the USB vendor device
+ * @param[in]   buf pointer to the data need to send
+ * @param[in]   len length in byte of the data need to send
+ * @return none
+ */
+hidvendor_sts_t hidvendor_reportData(hidvendor_txBuf_t *txBuf);
+
+/**
+ * @brief This function determines whether the USB interface is available
+ * @param   none
+ * @return 1: the USB interface is available 0: the USB interface is busy
+ */
+u8 hidvendor_isAvailable(void);
+
+/**
+ * @brief This function used to check whether the Tx of the control endpoint is busy
+ * @param   none
+ * @return 1: the control endpoint is busy 0: the control endpoint is idle
+ */
+u8 hidvendor_isTxBusy(void);
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+    }
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor_i.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor_i.h
new file mode 100644
index 00000000..f5645d23
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/app/usbvendor_i.h
@@ -0,0 +1,44 @@
+/********************************************************************************************************
+ * @file    usbvendor_i.h
+ *
+ * @brief   This is the header file for usbvendor_i
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "../usbdesc.h"
+
+#if (USB_VENDOR_ENABLE)
+
+static const u8 vendor_report_desc[] = {
+	HID_DESCRIPTOR_VENDOR(1, 4, 0, 1, 64),
+};
+
+static inline u8 *usbvendor_get_report_desc(void){
+	return (u8*)(vendor_report_desc);
+}
+
+static inline u16 usbvendor_get_report_desc_size(void){
+	return (u16)(sizeof(vendor_report_desc));
+}
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.c
new file mode 100644
index 00000000..c753116d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.c
@@ -0,0 +1,423 @@
+/********************************************************************************************************
+ * @file    usb.c
+ *
+ * @brief   This is the source file for usb
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbdesc.h"
+#include "usb.h"
+#include "usb_common.h"
+
+#if (MODULE_USB_ENABLE)
+
+static USB_Request_Header_t control_request;
+static u8 *g_response = 0;
+static u16 g_response_len = 0;
+static u8 g_stall = 0;
+u8 g_rate = 0; //default 0 for all report
+u8 usb_mouse_report_proto = 0; //default 1 for report proto
+u8 host_keyboard_status;
+
+
+static void usb_send_response(void){
+	u16 n;
+	if(g_response_len < 8){
+		n = g_response_len;
+	} else {
+		n = 8;
+	}
+	g_response_len -= n;
+
+	usbhw_reset_ctrl_ep_ptr();
+	while(n-- > 0){
+		usbhw_write_ctrl_ep_data(*g_response);
+		++g_response;
+	}
+}
+
+static void usb_prepare_desc_data(void){
+	u8 value_l = (control_request.wValue) & 0xff;
+	u8 value_h = (control_request.wValue >> 8) & 0xff;
+
+	g_response = 0;
+	g_response_len = 0;
+
+	switch(value_h){
+		case DTYPE_Device:
+			g_response = usbdesc_get_device();
+			g_response_len = sizeof(USB_Descriptor_Device_t);
+			break;
+		case DTYPE_Configuration:
+			g_response = usbdesc_get_configuration();
+			g_response_len = sizeof(USB_Descriptor_Configuration_t);
+			break;
+		case DTYPE_String:
+			if(USB_STRING_LANGUAGE == value_l){
+				g_response = usbdesc_get_language();
+				g_response_len = sizeof(LANGUAGE_ID_ENG);
+			}else if(USB_STRING_VENDOR == value_l){
+				g_response = usbdesc_get_vendor();
+				g_response_len = sizeof(STRING_VENDOR);
+			}else if(USB_STRING_PRODUCT == value_l){
+				g_response = usbdesc_get_product();
+				g_response_len = sizeof(STRING_PRODUCT);
+			}else if(USB_STRING_SERIAL == value_l){
+				g_response = usbdesc_get_serial();
+				g_response_len = sizeof(STRING_SERIAL);
+			}else{
+				g_stall = 1;
+			}
+			break;
+		default:
+			g_stall = 1;
+			break;
+	}
+
+	if(control_request.wLength < g_response_len){
+		g_response_len = control_request.wLength;
+	}
+}
+
+static void usb_handle_std_intf_req(void){
+	g_response = 0;
+	g_response_len = 0;
+
+	u8 value_h = (control_request.wValue >> 8) & 0xff;
+#if (USB_MOUSE_ENABLE || USB_KEYBOARD_ENABLE || USB_VENDOR_ENABLE || USB_SOMATIC_ENABLE)
+	u8 index_l = (control_request.wIndex) & 0xff;
+#endif
+
+	switch(value_h){
+		case HID_DTYPE_HID://HID Descriptor
+			//index_l is the interface number
+#if (USB_MOUSE_ENABLE )
+			if(index_l == USB_INTF_MOUSE){
+				//mouse
+				g_response = usbdesc_get_mouse();
+				g_response_len = sizeof(USB_HID_Descriptor_HID_Mouse_t);
+			}
+#endif /* USB_MOUSE_ENABLE */
+#if (USB_KEYBOARD_ENABLE)
+			if(index_l == USB_INTF_KEYBOARD){
+				//keyboard
+				g_response = usbdesc_get_keyboard();
+				g_response_len = sizeof(USB_HID_Descriptor_HID_Keyboard_t);
+			}
+#endif /* USB_KEYBOARD_ENABLE */
+#if (USB_VENDOR_ENABLE)
+			if(index_l == USB_INTF_HID_VENDOR){
+				g_response = usbvendor_get_vendor_desc();
+				g_response_len = sizeof(USB_HID_Descriptor_HID_Vendor_t);
+			}
+#endif /* USB_VENDOR_ENABLE */
+			break;
+		case HID_DTYPE_Report://Report Descriptor
+#if (USB_MOUSE_ENABLE)
+			if(index_l == USB_INTF_MOUSE){
+				//mouse
+				g_response = usbmouse_get_report_desc();
+				g_response_len = usbmouse_get_report_desc_size();
+			}
+#endif /* USB_MOUSE_ENABLE */
+#if (USB_KEYBOARD_ENABLE)
+			if(index_l == USB_INTF_KEYBOARD){
+				//keyboard
+				g_response = usbkb_get_report_desc();
+				g_response_len = usbkb_get_report_desc_size();
+			}
+#endif /* USB_KEYBOARD_ENABLE */
+#if (USB_VENDOR_ENABLE)
+			if(index_l == USB_INTF_HID_VENDOR){
+				g_response = usbvendor_get_report_desc();
+				g_response_len = usbvendor_get_report_desc_size();
+			}
+#endif /* USB_VENDOR_ENABLE */
+			break;
+		case HID_DTYPE_Physical://Physical Descriptor
+			break;
+		default:
+			break;
+	}
+
+	if(control_request.wLength < g_response_len){
+		g_response_len = control_request.wLength;
+	}
+}
+
+static void usb_handle_out_class_intf_req(u8 data_request){
+	u8 property = control_request.bRequest;
+	u8 value_l = (control_request.wValue) & 0xff;
+	u8 value_h = (control_request.wValue >> 8) & 0xff;
+//	u8 Entity = (control_request.wIndex >> 8) & 0xff;
+
+	switch(property){
+		case HID_REQ_SetReport:
+			switch(value_h){
+				case HID_REPORT_ITEM_In:
+					break;
+				case HID_REPORT_ITEM_Out:
+					break;
+				case HID_REPORT_ITEM_Feature:
+					if(data_request){
+						host_keyboard_status = usbhw_read_ctrl_ep_data();
+					}
+					break;
+				case HID_REPORT_CUSTOM:
+					break;
+				default:
+					g_stall = 1;
+					break;
+			}
+			break;
+		case HID_REQ_SetIdle:
+			if(data_request){
+				g_rate = usbhw_read_ctrl_ep_data();
+			}
+			g_rate = value_h;
+			break;
+		case HID_REQ_SetProtocol:
+			if(data_request){
+				usb_mouse_report_proto = usbhw_read_ctrl_ep_data();
+			}
+			usb_mouse_report_proto = value_l;
+			break;
+#if (USB_CDC_ENABLE)
+	    case CDC_REQ_SetControlLineState:
+		case CDC_REQ_SetLineEncoding:
+			usbcdc_processControlRequest(control_request.bRequest, control_request.wValue, control_request.wIndex, control_request.wLength);
+			break;
+#endif /* USB_CDC_ENABLE */
+		default:
+			g_stall = 1;
+			break;
+	}
+}
+
+static void usb_handle_in_class_intf_req(void){
+	u8 property = control_request.bRequest;
+//	u8 value_h = (control_request.wValue >> 8);
+//	u8 Entity = (control_request.wIndex >> 8);
+
+	switch(property){
+		case CDC_REQ_SendEncapsulatedCommand:
+			usbhw_write_ctrl_ep_data(0x00);
+			break;
+		case HID_REQ_GetReport:
+			break;
+		case HID_REQ_GetIdle:
+			usbhw_write_ctrl_ep_data(g_rate);
+			break;
+		case HID_REQ_GetProtocol:
+			usbhw_write_ctrl_ep_data(usb_mouse_report_proto);
+			break;
+#if (USB_CDC_ENABLE)
+		case CDC_REQ_GetLineEncoding:
+			usbcdc_processControlRequest(control_request.bRequest, control_request.wValue, control_request.wIndex, control_request.wLength);
+			break;
+#endif /* USB_CDC_ENABLE */
+		default:
+			g_stall = 1;
+			break;
+	}
+}
+
+static void usb_handle_in_class_endp_req(void){
+	//u8 property = control_request.bRequest;
+	//u8 ep_ctrl = control_request.wValue >> 8;
+}
+
+static void usb_handle_out_class_endp_req(u8 data_request){
+
+}
+
+static void usb_handle_set_intf(void){
+
+}
+
+static void usb_handle_get_intf(void){
+
+}
+
+static void usb_handle_request(u8 data_request){
+	u8 bmRequestType = control_request.bmRequestType;
+	u8 bRequest = control_request.bRequest;
+
+	usbhw_reset_ctrl_ep_ptr();
+
+	switch(bmRequestType){
+		case (REQDIR_DEVICETOHOST | REQTYPE_STANDARD | REQREC_DEVICE):
+			if(REQ_GetDescriptor == bRequest){
+				if(USB_IRQ_SETUP_REQ == data_request){
+					usb_prepare_desc_data();
+				}
+				usb_send_response();
+			}
+			break;
+	case (REQDIR_DEVICETOHOST | REQTYPE_STANDARD | REQREC_INTERFACE):
+		if(REQ_GetDescriptor == bRequest){
+			if(USB_IRQ_SETUP_REQ == data_request){
+				usb_handle_std_intf_req();
+			}
+			usb_send_response();
+		}else if(REQ_GetInterface == bRequest){
+			usb_handle_get_intf();
+		}
+		break;
+	case (REQDIR_HOSTTODEVICE | REQTYPE_CLASS | REQREC_INTERFACE):
+		usb_handle_out_class_intf_req(data_request);
+		break;
+	case (REQDIR_HOSTTODEVICE | REQTYPE_CLASS | REQREC_ENDPOINT):
+		usb_handle_out_class_endp_req(data_request);
+		break;
+	case (REQDIR_DEVICETOHOST | REQTYPE_CLASS | REQREC_INTERFACE):
+		usb_handle_in_class_intf_req();
+		break;
+	case (REQDIR_DEVICETOHOST | REQTYPE_CLASS | REQREC_ENDPOINT):
+		usb_handle_in_class_endp_req();
+		break;
+	case (REQDIR_HOSTTODEVICE | REQTYPE_STANDARD | REQREC_INTERFACE):
+		if(REQ_SetInterface == bRequest){
+			usb_handle_set_intf();
+		}
+		break;
+#if (__PROJECT_TL_SNIFFER__)
+	case (REQDIR_DEVICETOHOST | REQTYPE_VENDOR | REQREC_DEVICE):
+		usbSniffer_processControlRequest(bmRequestType, data_request, bRequest, 0);
+		break;
+	case (REQDIR_HOSTTODEVICE | REQTYPE_VENDOR | REQREC_DEVICE):
+		usbSniffer_processControlRequest(bmRequestType, data_request, bRequest, control_request.wIndex);
+		break;
+#endif
+	default:
+		g_stall = 1;
+		break;
+	}
+}
+
+static void usb_handle_ctl_ep_setup(void){
+	usbhw_reset_ctrl_ep_ptr();
+	control_request.bmRequestType = usbhw_read_ctrl_ep_data();
+	control_request.bRequest = usbhw_read_ctrl_ep_data();
+	control_request.wValue = usbhw_read_ctrl_ep_u16();
+	control_request.wIndex = usbhw_read_ctrl_ep_u16();
+	control_request.wLength = usbhw_read_ctrl_ep_u16();
+	g_stall = 0;
+	usb_handle_request(USB_IRQ_SETUP_REQ);
+	if(g_stall){
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_DAT_STALL);
+	}else{
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_DAT_ACK);
+	}
+}
+
+static void usb_handle_ctl_ep_data(void){
+	usbhw_reset_ctrl_ep_ptr();
+	g_stall = 0;
+	usb_handle_request(USB_IRQ_DATA_REQ);
+	if(g_stall){
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_DAT_STALL);
+	}else{
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_DAT_ACK);
+	}
+}
+
+static void usb_handle_ctl_ep_status(void){
+	if(g_stall){
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_STA_STALL);
+	}else{
+		usbhw_write_ctrl_ep_ctrl(FLD_EP_STA_ACK);
+	}
+}
+
+/**
+ * @brief This function handles the USB related irq.
+ * @param   none
+ * @return none
+ */
+void usb_handle_irq(void){
+	u32 irq = usbhw_get_ctrl_ep_irq();
+
+	if(irq & FLD_CTRL_EP_IRQ_SETUP){
+		usbhw_clr_ctrl_ep_irq(FLD_CTRL_EP_IRQ_SETUP);
+		usb_handle_ctl_ep_setup();
+	}
+	if(irq & FLD_CTRL_EP_IRQ_DATA){
+		usbhw_clr_ctrl_ep_irq(FLD_CTRL_EP_IRQ_DATA);
+		usb_handle_ctl_ep_data();
+	}
+	if(irq & FLD_CTRL_EP_IRQ_STA){
+		usbhw_clr_ctrl_ep_irq(FLD_CTRL_EP_IRQ_STA);
+		usb_handle_ctl_ep_status();
+	}
+	if(usb_is_irq_reset()){//USB reset
+		usb_mouse_report_proto = 1;
+		usb_clear_irq_reset();//Clear USB reset flag
+		for(int i = 0; i < 8; i++){
+			reg_usb_ep_ctrl(i) = 0;
+		}
+#if (USB_CDC_ENABLE)
+		usbhw_data_ep_ack(CDC_RX_EPNUM);
+#endif
+	}
+
+#if (__PROJECT_TL_SNIFFER__)
+	g_stall = 0;
+#endif
+
+#if (USB_CDC_ENABLE)
+	g_stall = 0;
+	usbcdc_dataHandler();
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+	hidvendor_dataHandler();
+#endif /* USB_VENDOR_ENABLE */
+}
+
+static void usb_init_interrupt(void){
+	usbhw_enable_manual_interrupt(FLD_CTRL_EP_AUTO_STD | FLD_CTRL_EP_AUTO_DESC);
+
+#if (USB_CDC_ENABLE)
+    //BM_CLR(reg_usb_mask, BIT(CDC_TX_EPNUM & 0x07) | BIT(CDC_RX_EPNUM & 0x07));
+    usbhw_clr_eps_irq_mask(BIT(CDC_TX_EPNUM & 0x07) | BIT(CDC_RX_EPNUM & 0x07));
+    usbhw_data_ep_ack(CDC_RX_EPNUM);
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+    //BM_CLR(reg_usb_mask, BIT(USB_EDP_HID_VENDOR_IN & 0x07) | BIT(USB_EDP_HID_VENDOR_OUT & 0x07));
+    usbhw_clr_eps_irq_mask(BIT(USB_EDP_HID_VENDOR_IN & 0x07) | BIT(USB_EDP_HID_VENDOR_OUT & 0x07));
+    usbhw_data_ep_ack(USB_EDP_HID_VENDOR_OUT);
+#endif /* USB_VENDOR_ENABLE */
+}
+
+/**
+ * @brief This function initializes the USB interface
+ * @param   none
+ * @return none
+ */
+void usb_init(void){
+	//must switch to manual mode.
+	usb_init_interrupt();
+}
+
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.h
new file mode 100644
index 00000000..1614690b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb.h
@@ -0,0 +1,67 @@
+/********************************************************************************************************
+ * @file    usb.h
+ *
+ * @brief   This is the header file for usb
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+enum {
+	USB_TIME_BEFORE_ALLOW_SUSPEND = (3000*1000),//  3000 ms
+};
+
+enum {
+	USB_IRQ_SETUP_REQ = 0,
+	USB_IRQ_DATA_REQ,
+};
+
+// telink usb report ctrl command. used mixed with USB_AUD_PLAY_PAUSE...
+enum{
+	USB_REPORT_NO_EVENT		= 0xf0,
+	USB_REPORT_RELEASE 		= 0xff,
+};
+
+/**
+ * @brief This function initializes the USB interface
+ * @param   none
+ * @return none
+ */
+void usb_init(void);
+
+/**
+ * @brief This function handles the USB related irq.
+ * @param   none
+ * @return none
+ */
+void usb_handle_irq(void);
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb_common.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb_common.h
new file mode 100644
index 00000000..ce68ab57
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usb_common.h
@@ -0,0 +1,38 @@
+/********************************************************************************************************
+ * @file    usb_common.h
+ *
+ * @brief   This is the header file for usb_common
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+#include "usb.h"
+
+#include "app/usbcdc.h"
+#include "app/usbmouse.h"
+#include "app/usbkb.h"
+#include "app/usbvendor.h"
+#if (__PROJECT_TL_SNIFFER__)
+#include "app/usbsniffer.h"
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.c
new file mode 100644
index 00000000..7762995e
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.c
@@ -0,0 +1,368 @@
+/********************************************************************************************************
+ * @file    usbdesc.c
+ *
+ * @brief   This is the source file for usbdesc
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "usbdesc.h"
+#include "usb_common.h"
+
+#if (MODULE_USB_ENABLE)
+
+// request parameters
+/** Language descriptor structure. This descriptor, located in FLASH memory, is returned when the host requests
+ *  the string descriptor with index 0 (the first index). It is actually an array of 16-bit integers, which indicate
+ *  via the language ID table available at USB.org what languages the device supports for its string descriptors.
+ */
+const USB_Descriptor_String_t language_desc = {
+	{sizeof(USB_Descriptor_Header_t) + 2, DTYPE_String}, // Header
+	{LANGUAGE_ID_ENG}
+};
+
+/** Manufacturer descriptor string. This is a Unicode string containing the manufacturer's details in human readable
+ *  form, and is read out upon request by the host when the appropriate string ID is requested, listed in the Device
+ *  Descriptor.
+ */
+const USB_Descriptor_String_t vendor_desc = {
+	{sizeof(USB_Descriptor_Header_t) + sizeof(STRING_VENDOR) - 2, DTYPE_String}, // Header
+	{STRING_VENDOR}
+};
+
+/** Product descriptor string. This is a Unicode string containing the product's details in human readable form,
+ *  and is read out upon request by the host when the appropriate string ID is requested, listed in the Device
+ *  Descriptor.
+ */
+const USB_Descriptor_String_t product_desc = {
+	{sizeof(USB_Descriptor_Header_t) + sizeof(STRING_PRODUCT) - 2, DTYPE_String}, // Header
+	{STRING_PRODUCT}
+};
+
+/** Serial number string. This is a Unicode string containing the device's unique serial number, expressed as a
+ *  series of uppercase hexadecimal digits.
+ */
+const USB_Descriptor_String_t serial_desc = {
+	{sizeof(USB_Descriptor_Header_t) + sizeof(STRING_SERIAL) - 2, DTYPE_String}, // Header
+	{STRING_SERIAL}
+};
+
+/** Device descriptor.
+ */
+#if (__PROJECT_TL_SNIFFER__)
+USB_Descriptor_Device_t device_desc = SNIFFER_DEVICE_DESC;
+#else
+const USB_Descriptor_Device_t device_desc = {
+	{sizeof(USB_Descriptor_Device_t), DTYPE_Device}, // Header
+
+	0x0110, // USBSpecification, USB 1.1
+
+#if (USB_CDC_ENABLE)
+	USB_CSCP_IADDeviceClass, 	// Class
+    USB_CSCP_IADDeviceSubclass, // SubClass
+    USB_CSCP_IADDeviceProtocol, // Protocol
+#else
+    USB_CSCP_NoDeviceClass,		// Class
+    USB_CSCP_NoDeviceSubclass,  // SubClass
+    USB_CSCP_NoDeviceProtocol,  // Protocol
+#endif
+
+	8, 			// Endpoint0Size, Maximum Packet Size for Zero Endpoint. Valid Sizes are 8, 16, 32, 64
+	ID_VENDOR, 	// VendorID
+    ID_PRODUCT, // ProductID
+    ID_VERSION, // ReleaseNumber
+	USB_STRING_VENDOR, 	// .ManufacturerStrIndex
+	USB_STRING_PRODUCT, // .ProductStrIndex
+	USB_STRING_SERIAL, 	// .SerialNumStrIndex
+	1					// .NumberOfConfigurations
+};
+#endif
+
+/** Configuration descriptor.
+ */
+const USB_Descriptor_Configuration_t configuration_desc = {
+	{
+		{sizeof(USB_Descriptor_Configuration_Header_t), DTYPE_Configuration}, // Header
+		sizeof(USB_Descriptor_Configuration_t), // TotalLength: variable
+		USB_INTF_MAX, // NumInterfaces
+		1, // Configuration index
+		NO_DESCRIPTOR, // Configuration String
+		USB_CONFIG_ATTR_RESERVED, // Attributes
+		USB_CONFIG_POWER_MA(50) // MaxPower = 100mA
+	},
+
+#if (USB_CDC_ENABLE)
+	{
+		// iad0
+		{sizeof(USB_Descriptor_Interface_Association_t), DTYPE_InterfaceAssociation}, // Header
+		USB_INTF_CDC_CCI, // FirstInterfaceIndex
+		2, // TotalInterface
+		CDC_CSCP_CDCClass, // Class
+		CDC_CSCP_ACMSubclass, // Subclass
+		CDC_CSCP_ATCommandProtocol, // protocol
+		NO_DESCRIPTOR  // IADStrIndex
+	},
+
+	{
+		// cdc_interface
+		{sizeof(USB_Descriptor_Interface_t), DTYPE_Interface}, // Header
+		USB_INTF_CDC_CCI, // InterfaceNumber
+		0, // AlternateSetting
+		1, // TotalEndpoints
+		CDC_CSCP_CDCClass, // Class
+		CDC_CSCP_ACMSubclass, // SubClass
+		CDC_CSCP_ATCommandProtocol, // Protocol
+		NO_DESCRIPTOR //InterfaceStrIndex
+	},
+
+	{
+		// cdc_descriptor
+		// CDC_Functional_Header
+		{
+			{sizeof(USB_CDC_Descriptor_FunctionalHeader_t), DTYPE_CSInterface}, // Header
+			CDC_DSUBTYPE_CSInterface_Header, // Subtype
+			0x0110 // CDCSpecification
+		},
+
+		// CDC_Functional_ACM =
+		{
+			{sizeof(USB_CDC_Descriptor_FunctionalACM_t), DTYPE_CSInterface}, // Header
+			CDC_DSUBTYPE_CSInterface_ACM, // Subtype
+			0x02 // Capabilities
+		},
+
+		// CDC_Functional_Union =
+		{
+			{sizeof(USB_CDC_Descriptor_FunctionalUnion_t), DTYPE_CSInterface}, // Header
+			CDC_DSUBTYPE_CSInterface_Union, // Subtype
+			USB_INTF_CDC_CCI, // MasterInterfaceNumber
+			USB_INTF_CDC_DCI, // SlaveInterfaceNumber
+		},
+
+		// CDC_CallManagement =
+		{
+			{sizeof(USB_CDC_Descriptor_FunctionalUnion_t), DTYPE_CSInterface}, // Header
+			CDC_DSUBTYPE_CSInterface_CallManagement, // Subtype
+			0, // MasterInterfaceNumber
+			USB_INTF_CDC_DCI, // SlaveInterfaceNumber
+		},
+
+		// CDC_NotificationEndpoint =
+		{
+			{sizeof(USB_Descriptor_Endpoint_t), DTYPE_Endpoint}, // Header
+			(ENDPOINT_DIR_IN | CDC_NOTIFICATION_EPNUM), // EndpointAddress
+			(EP_TYPE_INTERRUPT | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), // Attributes
+			CDC_NOTIFICATION_EPSIZE, // EndpointSize
+			0x40 // PollingIntervalMS
+		},
+
+		// CDC_DCI_Interface =
+		{
+			{sizeof(USB_Descriptor_Interface_t), DTYPE_Interface}, // Header
+			USB_INTF_CDC_DCI, // InterfaceNumber
+			0, // AlternateSetting
+			2, // TotalEndpoints
+			CDC_CSCP_CDCDataClass, // Class
+			CDC_CSCP_NoDataSubclass, // SubClass
+			CDC_CSCP_NoDataProtocol, // Protocol
+			NO_DESCRIPTOR // InterfaceStrIndex
+		},
+
+		// CDC_DataOutEndpoint =
+		{
+			{sizeof(USB_Descriptor_Endpoint_t), DTYPE_Endpoint}, // Header
+			(ENDPOINT_DIR_OUT | CDC_RX_EPNUM), // EndpointAddress
+			(EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), // Attributes
+			CDC_TXRX_EPSIZE, // EndpointSize
+			0x00 // PollingIntervalMS
+		},
+
+		// CDC_DataInEndpoint =
+		{
+			{sizeof(USB_Descriptor_Endpoint_t),  DTYPE_Endpoint}, // Header
+			(ENDPOINT_DIR_IN | CDC_TX_EPNUM), // EndpointAddress
+			(EP_TYPE_BULK | ENDPOINT_ATTR_NO_SYNC | ENDPOINT_USAGE_DATA), // Attributes
+			CDC_TXRX_EPSIZE, // EndpointSize
+			0x00 // PollingIntervalMS
+		},
+	},
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_MOUSE_ENABLE)
+	{
+		// mouse_interface
+		{sizeof(USB_Descriptor_Interface_t), DTYPE_Interface}, // Header
+		USB_INTF_MOUSE, // InterfaceNumber
+		0, // AlternateSetting
+		1, // bNumEndpoints
+		HID_CSCP_HIDClass, // Class
+		HID_CSCP_BootSubclass, // SubClass
+		HID_CSCP_MouseBootProtocol, // Protocol
+		NO_DESCRIPTOR //InterfaceStrIndex
+	},
+
+	{
+		// mouse_hid
+		{
+			{sizeof(USB_HID_Descriptor_HID_t), HID_DTYPE_HID}, // Header
+			0x0111, // BCDEncodedVersion
+			USB_HID_COUNTRY_US, // CountryCode
+			1, // NumberOfDescriptors
+			HID_DTYPE_Report, // DescriptorType
+			{sizeof(mouse_report_desc), 0x00}, // DescriptorLength
+		},
+		// mouse_in_endpoint
+		{
+			{sizeof(USB_Descriptor_Endpoint_t), DTYPE_Endpoint}, // Header
+			ENDPOINT_DIR_IN | USB_EDP_MOUSE, // EndpointAddress
+			EP_TYPE_INTERRUPT, // Attributes
+			0x0008, // EndpointSize
+			4 // PollingIntervalMS
+		}
+	},
+#endif /* USB_MOUSE_ENABLE */
+#if (USB_KEYBOARD_ENABLE)
+	{
+		// keyboardInterface
+		{sizeof(USB_Descriptor_Interface_t), DTYPE_Interface}, // Header
+		USB_INTF_KEYBOARD, // InterfaceNumber
+		0, // AlternateSetting
+		1, // bNumEndpoints
+		HID_CSCP_HIDClass, // Class
+		HID_CSCP_BootSubclass, // SubClass
+		HID_CSCP_KeyboardBootProtocol, // Protocol
+		NO_DESCRIPTOR //InterfaceStrIndex
+	},
+
+	{
+		// keyboard_hid
+		{
+			{sizeof(USB_HID_Descriptor_HID_t), HID_DTYPE_HID}, // Header
+			0x0111, // BCDEncodedVersion
+			USB_HID_COUNTRY_US, // CountryCode
+			1, // NumberOfDescriptors
+			HID_DTYPE_Report, // DescriptorType
+			{sizeof(keyboard_report_desc), 0x00}, // DescriptorLength
+		},
+		// keyboard_in_endpoint
+		{
+			{sizeof(USB_Descriptor_Endpoint_t), DTYPE_Endpoint}, // Header
+			ENDPOINT_DIR_IN | USB_EDP_KEYBOARD_IN, // EndpointAddress
+			EP_TYPE_INTERRUPT, // Attributes
+			0x0008, // EndpointSize
+			10 // PollingIntervalMS
+		},
+	},
+#endif /* USB_KEYBOARD_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+	{
+		// vendor_interface
+		{sizeof(USB_Descriptor_Interface_t), DTYPE_Interface}, // Header
+		USB_INTF_HID_VENDOR, // InterfaceNumber
+		0, // AlternateSetting
+		2, // TotalEndpoints
+		HID_CSCP_HIDClass, // Class
+		HID_CSCP_NonBootSubclass, // SubClass
+		HID_CSCP_NonBootProtocol, // Protocol
+		NO_DESCRIPTOR //InterfaceStrIndex
+	},
+
+	{
+		// vendor_descriptor
+		// vendor_hid =
+		{
+			{sizeof(USB_HID_Descriptor_HID_t), HID_DTYPE_HID}, // Header
+			0x0111, // BCDEncodedVersion
+			USB_HID_COUNTRY_US, // CountryCode
+			1,	// NumberOfDescriptors
+			HID_DTYPE_Report,	// DescriptorType
+			{sizeof(vendor_report_desc), 0x00} // DescriptorLength
+		},
+
+		// vendor_in_endpoint =
+		{
+			{sizeof(USB_Descriptor_Endpoint_t), DTYPE_Endpoint}, // Header
+			(ENDPOINT_DIR_IN | USB_EDP_HID_VENDOR_IN), // EndpointAddress
+			EP_TYPE_INTERRUPT, // Attributes
+			HID_VENDOR_TXRX_EPSIZE, // EndpointSize
+			3 // PollingIntervalMS
+		},
+
+		// vendor_out_endpoint =
+		{
+			{sizeof(USB_Descriptor_Endpoint_t),  DTYPE_Endpoint}, // Header
+			(ENDPOINT_DIR_OUT | USB_EDP_HID_VENDOR_OUT), // EndpointAddress
+			EP_TYPE_INTERRUPT, // Attributes
+			HID_VENDOR_TXRX_EPSIZE, // EndpointSize
+			3 // PollingIntervalMS
+		},
+	},
+#endif /* USB_VENDOR_ENABLE */
+
+#if (__PROJECT_TL_SNIFFER__)
+	SNIFFER_INTERFACE,
+	SNIFFER_ENDPOINT,
+#endif
+};
+
+u8 *usbdesc_get_language(void){
+	return (u8 *)(&language_desc);
+}
+
+u8 *usbdesc_get_vendor(void){
+	return (u8 *)(&vendor_desc);
+}
+
+u8 *usbdesc_get_product(void){
+	return (u8 *)(&product_desc);
+}
+
+u8 *usbdesc_get_serial(void){
+	return (u8 *)(&serial_desc);
+}
+
+u8 *usbdesc_get_device(void){
+	return (u8 *)(&device_desc);
+}
+
+u8 *usbdesc_get_configuration(void){
+	return (u8 *)(&configuration_desc);
+}
+
+#if (USB_MOUSE_ENABLE)
+u8 *usbdesc_get_mouse(void){
+	return (u8 *)(&configuration_desc.mouse_descriptor);
+}
+#endif /* USB_MOUSE_ENABLE */
+
+#if (USB_KEYBOARD_ENABLE)
+u8 *usbdesc_get_keyboard(void){
+	return (u8 *)(&configuration_desc.keyboard_descriptor);
+}
+#endif /* USB_KEYBOARD_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+u8 *usbvendor_get_vendor_desc(void){
+	return (u8 *)(&configuration_desc.vendor_descriptor);
+}
+#endif /* USB_VENDOR_ENABLE */
+
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.h
new file mode 100644
index 00000000..f4658ecb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbdesc.h
@@ -0,0 +1,364 @@
+/********************************************************************************************************
+ * @file    usbdesc.h
+ *
+ * @brief   This is the header file for usbdesc
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "tl_common.h"
+#include "usbstd/usbstd.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#ifndef STRING_VENDOR
+#define STRING_VENDOR       		L"Telink"
+#endif
+#ifndef STRING_PRODUCT
+#define STRING_PRODUCT      		L"TelinkUSBDongle"
+#endif
+#ifndef STRING_SERIAL
+#define STRING_SERIAL       		L"TLSR82xx"
+#endif
+#ifndef ID_VENDOR
+#define ID_VENDOR					0x248A
+#endif
+#ifndef ID_VERSION
+#define ID_VERSION					0x0100
+#endif
+#ifndef ID_PRODUCT_BASE
+#define ID_PRODUCT_BASE				0x8800
+#endif
+#ifndef USB_PRINTER_ENABLE
+#define USB_PRINTER_ENABLE			0
+#endif
+#ifndef USB_SPEAKER_ENABLE
+#define USB_SPEAKER_ENABLE			0
+#endif
+#ifndef USB_MIC_ENABLE
+#define USB_MIC_ENABLE				0
+#endif
+#ifndef USB_MOUSE_ENABLE
+#define USB_MOUSE_ENABLE			0
+#endif
+#ifndef USB_KEYBOARD_ENABLE
+#define USB_KEYBOARD_ENABLE			0
+#endif
+#ifndef USB_SOMATIC_ENABLE
+#define USB_SOMATIC_ENABLE			0
+#endif
+#ifndef USB_CDC_ENABLE
+#define USB_CDC_ENABLE				0
+#endif
+#ifndef USB_VENDOR_ENABLE
+#define USB_VENDOR_ENABLE			0
+#endif
+#ifndef ID_PRODUCT
+#define ID_PRODUCT					(ID_PRODUCT_BASE | (USB_PRINTER_ENABLE?(1<<0):0) | (USB_SPEAKER_ENABLE?(1<<1):0) | (USB_MIC_ENABLE?(1<<2):0) |	\
+									(USB_MOUSE_ENABLE?(1<<3):0) | (USB_KEYBOARD_ENABLE?(1<<4):0) | (USB_SOMATIC_ENABLE?(1<<5):0) | (USB_CDC_ENABLE?(1<<6):0) | \
+									(USB_VENDOR_ENABLE?(1<<7):0))
+#endif
+
+// interface id
+typedef enum {
+#if (USB_CDC_ENABLE)
+	USB_INTF_CDC_CCI,
+	USB_INTF_CDC_DCI,
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_KEYBOARD_ENABLE)
+	USB_INTF_KEYBOARD,
+#endif /* USB_KEYBOARD_ENABLE */
+
+#if (USB_MOUSE_ENABLE)
+	USB_INTF_MOUSE,
+#endif /* USB_MOUSE_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+	USB_INTF_HID_VENDOR,
+#endif /* USB_VENDOR_ENABLE */
+
+#if (__PROJECT_TL_SNIFFER__)
+	USB_INTF_SNIFFER,
+#endif
+
+	USB_INTF_MAX,
+} USB_INTF_ID_E;
+
+#if (USB_CDC_ENABLE)
+/** Endpoint number of the CDC device-to-host notification IN endpoint. */
+#ifndef CDC_NOTIFICATION_EPNUM
+#define CDC_NOTIFICATION_EPNUM         2
+#endif
+/** Endpoint number of the CDC device-to-host data IN endpoint. */
+#ifndef CDC_TX_EPNUM
+#define CDC_TX_EPNUM                   USB_EDP_CDC_IN//4
+#endif
+/** Endpoint number of the CDC host-to-device data OUT endpoint. */
+#ifndef CDC_RX_EPNUM
+#define CDC_RX_EPNUM                   USB_EDP_CDC_OUT//5
+#endif
+/** Size in bytes of the CDC device-to-host notification IN endpoint. */
+#define CDC_NOTIFICATION_EPSIZE        8
+/** Size in bytes of the CDC data IN and OUT endpoints. */
+#define CDC_TXRX_EPSIZE                64
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+/** Endpoint number of the HID Vendor device-to-host data IN endpoint. */
+#define USB_EDP_HID_VENDOR_IN          4
+/** Endpoint number of the HID Vendor host-to-device data OUT endpoint. */
+#define USB_EDP_HID_VENDOR_OUT         5
+/** Size in bytes of the HID Vendor data IN and OUT endpoints. */
+#define HID_VENDOR_TXRX_EPSIZE         64
+#endif /* USB_VENDOR_ENABLE */
+
+#if (__PROJECT_TL_SNIFFER__)
+#define SNIFFER_TX_EPNUM               3
+#define SNIFFER_TX_EPSIZE         	   64
+#endif
+
+enum {
+	USB_AUDIO_FORMAT_UNKNOWN 				= 0,
+	USB_AUDIO_FORMAT_PCM,
+	USB_AUDIO_FORMAT_ADPCM,
+	USB_AUDIO_FORMAT_IEEE_FLOAT,
+	USB_AUDIO_FORMAT_IBM_CVSD,
+	USB_AUDIO_FORMAT_ALAW,
+	USB_AUDIO_FORMAT_MULAW,
+	USB_AUDIO_FORMAT_WMAVOICE9,
+	USB_AUDIO_FORMAT_OKI_ADPCM,
+	USB_AUDIO_FORMAT_DVI_ADPCM,
+	USB_AUDIO_FORMAT_IMA_ADPCM,
+	USB_AUDIO_FORMAT_MEDIASPACE_ADPCM,
+	USB_AUDIO_FORMAT_SIERRA_ADPCM,
+	USB_AUDIO_FORMAT_G723_ADPCM,
+	USB_AUDIO_FORMAT_DIGISTD,
+	USB_AUDIO_FORMAT_DIGIFIX,
+	USB_AUDIO_FORMAT_DIALOGIC_OKI_ADPCM,
+	USB_AUDIO_FORMAT_MEDIAVISION_ADPCM,
+	USB_AUDIO_FORMAT_YAMAHA_ADPCM,
+	USB_AUDIO_FORMAT_SONARC,
+	USB_AUDIO_FORMAT_DSPGROUP_TRUESPEECH,
+	USB_AUDIO_FORMAT_ECHOSC1,
+	USB_AUDIO_FORMAT_AUDIOFILE_AF36,
+	USB_AUDIO_FORMAT_APTX,
+	USB_AUDIO_FORMAT_AUDIOFILE_AF10,
+	USB_AUDIO_FORMAT_DOLBY_AC2,
+	USB_AUDIO_FORMAT_GSM610,
+	USB_AUDIO_FORMAT_MSNAUDIO,
+	USB_AUDIO_FORMAT_ANTEX_ADPCME,
+	USB_AUDIO_FORMAT_CONTROL_RES_VQLPC,
+	USB_AUDIO_FORMAT_DIGIREAL,
+	USB_AUDIO_FORMAT_DIGIADPCM,
+	USB_AUDIO_FORMAT_CONTROL_RES_CR10,
+	USB_AUDIO_FORMAT_NMS_VBXADPCM,
+	USB_AUDIO_FORMAT_CS_IMAADPCM,
+	USB_AUDIO_FORMAT_ECHOSC3,
+	USB_AUDIO_FORMAT_ROCKWELL_ADPCM,
+	USB_AUDIO_FORMAT_ROCKWELL_DIGITALK,
+	USB_AUDIO_FORMAT_XEBEC,
+	USB_AUDIO_FORMAT_G721_ADPCM,
+	USB_AUDIO_FORMAT_G728_CELP,
+	USB_AUDIO_FORMAT_MPEG,
+	USB_AUDIO_FORMAT_MPEGLAYER3,
+	USB_AUDIO_FORMAT_CIRRUS,
+	USB_AUDIO_FORMAT_ESPCM,
+	USB_AUDIO_FORMAT_VOXWARE,
+	USB_AUDIO_FORMAT_WAVEFORMAT_CANOPUS_ATRAC,
+	USB_AUDIO_FORMAT_G726_ADPCM,
+	USB_AUDIO_FORMAT_G722_ADPCM,
+	USB_AUDIO_FORMAT_DSAT,
+	USB_AUDIO_FORMAT_DSAT_DISPLAY,
+	USB_AUDIO_FORMAT_SOFTSOUND,
+	USB_AUDIO_FORMAT_RHETOREX_ADPCM,
+	USB_AUDIO_FORMAT_MSAUDIO1,
+	USB_AUDIO_FORMAT_WMAUDIO2,
+	USB_AUDIO_FORMAT_WMAUDIO3,
+	USB_AUDIO_FORMAT_WMAUDIO_LOSSLESS,
+	USB_AUDIO_FORMAT_CREATIVE_ADPCM,
+	USB_AUDIO_FORMAT_CREATIVE_FASTSPEECH8,
+	USB_AUDIO_FORMAT_CREATIVE_FASTSPEECH10,
+	USB_AUDIO_FORMAT_QUARTERDECK,
+	USB_AUDIO_FORMAT_FM_TOWNS_SND,
+	USB_AUDIO_FORMAT_BTV_DIGITAL,
+	USB_AUDIO_FORMAT_OLIGSM,
+	USB_AUDIO_FORMAT_OLIADPCM,
+	USB_AUDIO_FORMAT_OLICELP,
+	USB_AUDIO_FORMAT_OLISBC,
+	USB_AUDIO_FORMAT_OLIOPR,
+	USB_AUDIO_FORMAT_LH_CODEC,
+	USB_AUDIO_FORMAT_NORRIS,
+};
+
+enum {
+	USB_HID_COUNTRY_NONE = 0,
+	USB_HID_COUNTRY_ARABIC,
+	USB_HID_COUNTRY_BELGIAN,
+	USB_HID_COUNTRY_CANADA_BI,
+	USB_HID_COUNTRY_CANADA_FR,
+	USB_HID_COUNTRY_CZECH_REPUBLIC,
+	USB_HID_COUNTRY_DANISH,
+	USB_HID_COUNTRY_FINNISH,
+	USB_HID_COUNTRY_FRENCH,
+	USB_HID_COUNTRY_GERMAN,
+	USB_HID_COUNTRY_GREEK,
+	USB_HID_COUNTRY_HEBREW,
+	USB_HID_COUNTRY_HUNGARY,
+	USB_HID_COUNTRY_INTERNATIONAL_ISO,
+	USB_HID_COUNTRY_ITALIAN,
+	USB_HID_COUNTRY_JAPAN_KATAKANA,
+	USB_HID_COUNTRY_KOREAN,
+	USB_HID_COUNTRY_LATIN_AMERICAN,
+	USB_HID_COUNTRY_NETHERLANDS,
+	USB_HID_COUNTRY_NORWEGIAN,
+	USB_HID_COUNTRY_PERSIAN,
+	USB_HID_COUNTRY_POLAND,
+	USB_HID_COUNTRY_PORTUGUESE,
+	USB_HID_COUNTRY_RUSSIA,
+	USB_HID_COUNTRY_SLOVAKIA,
+	USB_HID_COUNTRY_SPANISH,
+	USB_HID_COUNTRY_SWEDISH,
+	USB_HID_COUNTRY_SWISS_FRENCH,
+	USB_HID_COUNTRY_SWISS_GERMAN,
+	USB_HID_COUNTRY_SWITZERLAND,
+	USB_HID_COUNTRY_TAIWAN,
+	USB_HID_COUNTRY_TURKISH_Q,
+	USB_HID_COUNTRY_UK,
+	USB_HID_COUNTRY_US,
+	USB_HID_COUNTRY_YUGOSLAVIA,
+	USB_HID_COUNTRY_TURKISH_F,
+};
+
+enum {
+	USB_STRING_LANGUAGE 			   = 0,
+	USB_STRING_VENDOR,
+	USB_STRING_PRODUCT,
+	USB_STRING_SERIAL,
+
+	USB_STRING_MS_OS 				   = 0xee,
+};
+
+typedef struct {
+	USB_HID_Descriptor_HID_t audio_hid;
+	USB_Descriptor_Endpoint_t audio_in_endpoint;
+} USB_HID_Descriptor_HID_Audio_t;
+
+typedef struct {
+	USB_HID_Descriptor_HID_t mouse_hid;
+	USB_Descriptor_Endpoint_t mouse_in_endpoint;
+} USB_HID_Descriptor_HID_Mouse_t;
+
+typedef struct {
+	USB_HID_Descriptor_HID_t keyboard_hid;
+	USB_Descriptor_Endpoint_t keyboard_in_endpoint;
+} USB_HID_Descriptor_HID_Keyboard_t;
+
+typedef struct {
+	USB_HID_Descriptor_HID_t somatic_hid;
+	USB_Descriptor_Endpoint_t somatic_in_endpoint;
+	USB_Descriptor_Endpoint_t somatic_out_endpoint;
+} USB_HID_Descriptor_HID_Somatic_t;
+
+typedef struct {
+	USB_HID_Descriptor_HID_t vendor_hid;
+	USB_Descriptor_Endpoint_t vendor_in_endpoint;
+	USB_Descriptor_Endpoint_t vendor_out_endpoint;
+} USB_HID_Descriptor_HID_Vendor_t;
+
+typedef struct {
+	// CDC Control Interface
+	USB_CDC_Descriptor_FunctionalHeader_t    CDC_Functional_Header;
+	USB_CDC_Descriptor_FunctionalACM_t       CDC_Functional_ACM;
+	USB_CDC_Descriptor_FunctionalUnion_t     CDC_Functional_Union;
+	USB_CDC_Descriptor_FunctionalUnion_t     CDC_Functional_CallManagement;
+	USB_Descriptor_Endpoint_t                CDC_NotificationEndpoint;
+
+	// CDC Data Interface
+	USB_Descriptor_Interface_t               CDC_DCI_Interface;
+	USB_Descriptor_Endpoint_t                CDC_DataOutEndpoint;
+	USB_Descriptor_Endpoint_t                CDC_DataInEndpoint;
+} USB_CDC_Descriptor_t;
+
+
+typedef struct {
+	USB_Descriptor_Configuration_Header_t 	Config;
+
+#if (USB_CDC_ENABLE)
+	// IAD0
+	USB_Descriptor_Interface_Association_t 	cdc_iad;
+    // CDC Interface
+    USB_Descriptor_Interface_t 				cdc_interface;
+    USB_CDC_Descriptor_t 					cdc_descriptor;
+#endif /* USB_CDC_ENABLE */
+
+#if (USB_MOUSE_ENABLE)
+	// Mouse HID Interface
+	USB_Descriptor_Interface_t 				mouse_interface;
+	USB_HID_Descriptor_HID_Mouse_t 			mouse_descriptor;
+#endif /* USB_MOUSE_ENABLE */
+
+#if (USB_KEYBOARD_ENABLE)
+	// Keyboard HID Interface
+	USB_Descriptor_Interface_t 				keyboard_interface;
+	USB_HID_Descriptor_HID_Keyboard_t 		keyboard_descriptor;
+#endif /* USB_KEYBOARD_ENABLE */
+
+#if (USB_VENDOR_ENABLE)
+    //Vendor HID Interface
+    USB_Descriptor_Interface_t 				vendor_interface;
+    USB_HID_Descriptor_HID_Vendor_t 		vendor_descriptor;
+#endif /* USB_VENDOR_ENABLE */
+
+#if (__PROJECT_TL_SNIFFER__)
+	USB_Descriptor_Interface_t 				sniffer_interface;
+	USB_Descriptor_Endpoint_t 				sniffer_endpoint;
+#endif
+} USB_Descriptor_Configuration_t;
+
+
+
+u8 *usbdesc_get_language(void);
+u8 *usbdesc_get_vendor(void);
+u8 *usbdesc_get_product(void);
+u8 *usbdesc_get_serial(void);
+u8 *usbdesc_get_device(void);
+u8 *usbdesc_get_configuration(void);
+
+#if (USB_MOUSE_ENABLE)
+u8 *usbdesc_get_mouse(void);
+#endif /* USB_MOUSE_ENABLE */
+#if (USB_KEYBOARD_ENABLE)
+u8 *usbdesc_get_keyboard(void);
+#endif /* USB_KEYBOARD_ENABLE */
+#if (USB_VENDOR_ENABLE)
+u8 *usbvendor_get_vendor_desc(void);
+#endif /* USB_VENDOR_ENABLE */
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/AudioClassCommon.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/AudioClassCommon.h
new file mode 100644
index 00000000..791cc675
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/AudioClassCommon.h
@@ -0,0 +1,779 @@
+/********************************************************************************************************
+ * @file    AudioClassCommon.h
+ *
+ * @brief   This is the header file for AudioClassCommon
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "bit.h"
+#include "StdDescriptors.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Macros: */
+/** \name Audio Channel Masks */
+//@{
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_LEFT_FRONT           BIT(0)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_RIGHT_FRONT          BIT(1)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_CENTER_FRONT         BIT(2)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_LOW_FREQ_ENHANCE     BIT(3)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_LEFT_SURROUND        BIT(4)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_RIGHT_SURROUND       BIT(5)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_LEFT_OF_CENTER       BIT(6)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_RIGHT_OF_CENTER      BIT(7)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_SURROUND             BIT(8)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_SIDE_LEFT            BIT(9)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_SIDE_RIGHT           BIT(10)
+
+/** Supported channel mask for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_CHANNEL_TOP                  BIT(11)
+//@}
+
+/** \name Audio Feature Masks */
+//@{
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_MUTE                 BIT(0)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_VOLUME               BIT(1)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_BASS                 BIT(2)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_MID                  BIT(3)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_TREBLE               BIT(4)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_GRAPHIC_EQUALIZER    BIT(5)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_AUTOMATIC_GAIN       BIT(6)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_DELAY                BIT(7)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_BASS_BOOST           BIT(8)
+
+/** Supported feature mask for an Audio class feature unit descriptor. See the Audio class specification for more details. */
+#define AUDIO_FEATURE_BASS_LOUDNESS        BIT(9)
+//@}
+
+/** \name Audio Terminal Types */
+//@{
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_UNDEFINED           0x0100
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_STREAMING           0x0101
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_VENDOR              0x01FF
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_UNDEFINED        0x0200
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_MIC              0x0201
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_DESKTOP_MIC      0x0202
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_PERSONAL_MIC     0x0203
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_OMNIDIR_MIC      0x0204
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_MIC_ARRAY        0x0205
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_PROCESSING_MIC   0x0206
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_IN_OUT_UNDEFINED    0x0300
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_SPEAKER         0x0301
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_HEADPHONES      0x0302
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_HEAD_MOUNTED    0x0303
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_DESKTOP         0x0304
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_ROOM            0x0305
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_COMMUNICATION   0x0306
+
+/** Terminal type constant for an Audio class terminal descriptor. See the Audio class specification for more details. */
+#define AUDIO_TERMINAL_OUT_LOWFREQ         0x0307
+//@}
+
+/** Convenience macro to fill a 24-bit \ref USB_Audio_SampleFreq_t structure with the given sample rate as a 24-bit number.
+ *
+ *  \param[in] freq  Required audio sampling frequency in HZ
+ */
+#define AUDIO_SAMPLE_FREQ(freq)            {										\
+												.Byte1 = ((u32)freq & 0xFF),		\
+												.Byte2 = (((u32)freq >> 8) & 0xFF),	\
+												.Byte3 = (((u32)freq >> 16) & 0xFF)	\
+											}
+
+/** Mask for the attributes parameter of an Audio class-specific Endpoint descriptor, indicating that the endpoint
+ *  accepts only filled endpoint packets of audio samples.
+ */
+#define AUDIO_EP_FULL_PACKETS_ONLY        BIT(7)
+
+/** Mask for the attributes parameter of an Audio class-specific Endpoint descriptor, indicating that the endpoint
+ *  will accept partially filled endpoint packets of audio samples.
+ */
+#define AUDIO_EP_ACCEPTS_SMALL_PACKETS    (0 << 7)
+
+/** Mask for the attributes parameter of an Audio class-specific Endpoint descriptor, indicating that the endpoint
+ *  allows for sampling frequency adjustments to be made via control requests directed at the endpoint.
+ */
+#define AUDIO_EP_SAMPLE_FREQ_CONTROL      BIT(0)
+
+/** Mask for the attributes parameter of an Audio class-specific Endpoint descriptor, indicating that the endpoint
+ *  allows for pitch adjustments to be made via control requests directed at the endpoint.
+ */
+#define AUDIO_EP_PITCH_CONTROL            BIT(1)
+
+/* Enums: */
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors relating to the Audio
+ *  device class.
+ */
+enum Audio_Descriptor_ClassSubclassProtocol_t
+{
+	AUDIO_CSCP_AudioClass                     = 0x01, /**< Descriptor Class value indicating that the device or
+	                                                   *   interface belongs to the USB Audio 1.0 class.
+	                                                   */
+	AUDIO_CSCP_ControlSubclass                = 0x01, /**< Descriptor Subclass value indicating that the device or
+	                                                   *   interface belongs to the Audio Control subclass.
+	                                                   */
+	AUDIO_CSCP_ControlProtocol                = 0x00, /**< Descriptor Protocol value indicating that the device or
+	                                                   *   interface belongs to the Audio Control protocol.
+	                                                   */
+	AUDIO_CSCP_AudioStreamingSubclass         = 0x02, /**< Descriptor Subclass value indicating that the device or
+	                                                   *   interface belongs to the MIDI Streaming subclass.
+	                                                   */
+	AUDIO_CSCP_MIDIStreamingSubclass          = 0x03, /**< Descriptor Subclass value indicating that the device or
+	                                                   *   interface belongs to the Audio streaming subclass.
+	                                                   */
+	AUDIO_CSCP_StreamingProtocol              = 0x00, /**< Descriptor Protocol value indicating that the device or
+	                                                   *   interface belongs to the Streaming Audio protocol.
+	                                                   */
+};
+
+/** Audio class specific interface description subtypes, for the Audio Control interface. */
+enum Audio_CSInterface_AC_SubTypes_t
+{
+	AUDIO_DSUBTYPE_CSInterface_Header         = 0x01, /**< Audio class specific control interface header. */
+	AUDIO_DSUBTYPE_CSInterface_InputTerminal  = 0x02, /**< Audio class specific control interface Input Terminal. */
+	AUDIO_DSUBTYPE_CSInterface_OutputTerminal = 0x03, /**< Audio class specific control interface Output Terminal. */
+	AUDIO_DSUBTYPE_CSInterface_Mixer          = 0x04, /**< Audio class specific control interface Mixer Unit. */
+	AUDIO_DSUBTYPE_CSInterface_Selector       = 0x05, /**< Audio class specific control interface Selector Unit. */
+	AUDIO_DSUBTYPE_CSInterface_Feature        = 0x06, /**< Audio class specific control interface Feature Unit. */
+	AUDIO_DSUBTYPE_CSInterface_Processing     = 0x07, /**< Audio class specific control interface Processing Unit. */
+	AUDIO_DSUBTYPE_CSInterface_Extension      = 0x08, /**< Audio class specific control interface Extension Unit. */
+};
+
+/** Audio class specific interface description subtypes, for the Audio Streaming interface. */
+enum Audio_CSInterface_AS_SubTypes_t
+{
+	AUDIO_DSUBTYPE_CSInterface_General        = 0x01, /**< Audio class specific streaming interface general descriptor. */
+	AUDIO_DSUBTYPE_CSInterface_FormatType     = 0x02, /**< Audio class specific streaming interface format type descriptor. */
+	AUDIO_DSUBTYPE_CSInterface_FormatSpecific = 0x03, /**< Audio class specific streaming interface format information descriptor. */
+};
+
+/** Audio class specific endpoint description subtypes, for the Audio Streaming interface. */
+enum Audio_CSEndpoint_SubTypes_t
+{
+	AUDIO_DSUBTYPE_CSEndpoint_General         = 0x01, /**< Audio class specific endpoint general descriptor. */
+};
+
+/** Enum for the Audio class specific control requests that can be issued by the USB bus host. */
+enum Audio_ClassRequests_t
+{
+	AUDIO_REQ_SetCurrent    = 0x01, /**< Audio class-specific request to set the current value of a parameter within the device. */
+	AUDIO_REQ_SetMinimum    = 0x02, /**< Audio class-specific request to set the minimum value of a parameter within the device. */
+	AUDIO_REQ_SetMaximum    = 0x03, /**< Audio class-specific request to set the maximum value of a parameter within the device. */
+	AUDIO_REQ_SetResolution = 0x04, /**< Audio class-specific request to set the resolution value of a parameter within the device. */
+	AUDIO_REQ_SetMemory     = 0x05, /**< Audio class-specific request to set the memory value of a parameter within the device. */
+	AUDIO_REQ_GetCurrent    = 0x81, /**< Audio class-specific request to get the current value of a parameter within the device. */
+	AUDIO_REQ_GetMinimum    = 0x82, /**< Audio class-specific request to get the minimum value of a parameter within the device. */
+	AUDIO_REQ_GetMaximum    = 0x83, /**< Audio class-specific request to get the maximum value of a parameter within the device. */
+	AUDIO_REQ_GetResolution = 0x84, /**< Audio class-specific request to get the resolution value of a parameter within the device. */
+	AUDIO_REQ_GetMemory     = 0x85, /**< Audio class-specific request to get the memory value of a parameter within the device. */
+	AUDIO_REQ_GetStatus     = 0xFF, /**< Audio class-specific request to get the device status. */
+};
+
+/** Enum for Audio class specific Endpoint control modifiers which can be set and retrieved by a USB host, if the corresponding
+ *  endpoint control is indicated to be supported in the Endpoint's Audio-class specific endpoint descriptor.
+ */
+enum Audio_EndpointControls_t
+{
+	AUDIO_EPCONTROL_SamplingFreq = 0x01, /**< Sampling frequency adjustment of the endpoint. */
+	AUDIO_EPCONTROL_Pitch        = 0x02, /**< Pitch adjustment of the endpoint. */
+};
+
+/* Type Defines: */
+/** \brief Audio class-specific Input Terminal Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific input terminal descriptor. This indicates to the host that the device
+ *  contains an input audio source, either from a physical terminal on the device, or a logical terminal (for example,
+ *  a USB endpoint). See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_InputTerminal_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   must be \ref AUDIO_DSUBTYPE_CSInterface_InputTerminal.
+	                                  */
+
+	u8                 TerminalID; /**< ID value of this terminal unit - must be a unique value within the device. */
+	u16                TerminalType; /**< Type of terminal, a \c TERMINAL_* mask. */
+	u8                 AssociatedOutputTerminal; /**< ID of associated output terminal, for physically grouped terminals
+	                                                   *   such as the speaker and microphone of a phone handset.
+	                                                   */
+	u8                 TotalChannels; /**< Total number of separate audio channels within this interface (right, left, etc.) */
+	u16                ChannelConfig; /**< \c CHANNEL_* masks indicating what channel layout is supported by this terminal. */
+
+	u8                 ChannelStrIndex; /**< Index of a string descriptor describing this channel within the device. */
+	u8                 TerminalStrIndex; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_Descriptor_InputTerminal_t;
+
+/** \brief Audio class-specific Input Terminal Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific input terminal descriptor. This indicates to the host that the device
+ *  contains an input audio source, either from a physical terminal on the device, or a logical terminal (for example,
+ *  a USB endpoint). See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_InputTerminal_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                           *   given by the specific class.
+	                           */
+
+	u8  bDescriptorSubtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                              *   must be \ref AUDIO_DSUBTYPE_CSInterface_InputTerminal.
+	                              */
+	u8  bTerminalID; /**< ID value of this terminal unit - must be a unique value within the device. */
+	u16 wTerminalType; /**< Type of terminal, a \c TERMINAL_* mask. */
+	u8  bAssocTerminal; /**< ID of associated output terminal, for physically grouped terminals
+	                          *   such as the speaker and microphone of a phone handset.
+	                          */
+	u8  bNrChannels; /**< Total number of separate audio channels within this interface (right, left, etc.) */
+	u16 wChannelConfig; /**< \c CHANNEL_* masks indicating what channel layout is supported by this terminal. */
+
+	u8  iChannelNames; /**< Index of a string descriptor describing this channel within the device. */
+	u8  iTerminal; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_StdDescriptor_InputTerminal_t;
+
+/** \brief Audio class-specific Output Terminal Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific output terminal descriptor. This indicates to the host that the device
+ *  contains an output audio sink, either to a physical terminal on the device, or a logical terminal (for example,
+ *  a USB endpoint). See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_OutputTerminal_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   must be \ref AUDIO_DSUBTYPE_CSInterface_OutputTerminal.
+	                                  */
+
+	u8                 TerminalID; /**< ID value of this terminal unit - must be a unique value within the device. */
+	u16                TerminalType; /**< Type of terminal, a \c TERMINAL_* mask. */
+	u8                 AssociatedInputTerminal; /**< ID of associated input terminal, for physically grouped terminals
+	                                                    *   such as the speaker and microphone of a phone handset.
+	                                                    */
+	u8                 SourceID; /**< ID value of the unit this terminal's audio is sourced from. */
+
+	u8                 TerminalStrIndex; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_Descriptor_OutputTerminal_t;
+
+/** \brief Audio class-specific Output Terminal Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific output terminal descriptor. This indicates to the host that the device
+ *  contains an output audio sink, either to a physical terminal on the device, or a logical terminal (for example,
+ *  a USB endpoint). See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_OutputTerminal_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                           *   must be \ref AUDIO_DSUBTYPE_CSInterface_OutputTerminal.
+	                           */
+
+	u8  bDescriptorSubtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                              *   a value from the \ref Audio_CSInterface_AC_SubTypes_t enum.
+	                              */
+	u8  bTerminalID; /**< ID value of this terminal unit - must be a unique value within the device. */
+	u16 wTerminalType; /**< Type of terminal, a \c TERMINAL_* mask. */
+	u8  bAssocTerminal; /**< ID of associated input terminal, for physically grouped terminals
+	                          *   such as the speaker and microphone of a phone handset.
+	                          */
+	u8  bSourceID; /**< ID value of the unit this terminal's audio is sourced from. */
+
+	u8  iTerminal; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_StdDescriptor_OutputTerminal_t;
+
+/** \brief Audio class-specific Interface Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific interface descriptor. This follows a regular interface descriptor to
+ *  supply extra information about the audio device's layout to the host. See the USB Audio specification for more
+ *  details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_Interface_AC_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                                  */
+
+	u8                 ACSpecification[2]; /**< Binary coded decimal value, indicating the supported Audio Class specification version. */
+	u8                 TotalLength[2]; /**< Total length of the Audio class-specific descriptors, including this descriptor. */
+
+	u8                 InCollection; /**< Total number of Audio Streaming interfaces linked to this Audio Control interface (must be 1). */
+	u8                 InterfaceNumber; /**< Interface number of the associated Audio Streaming interface. */
+}USB_Audio_Descriptor_Interface_AC_t;
+
+/*surport mic && speaker*/
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                                  */
+
+	u8                 ACSpecification[2]; /**< Binary coded decimal value, indicating the supported Audio Class specification version. */
+	u8                 TotalLength[2]; /**< Total length of the Audio class-specific descriptors, including this descriptor. */
+
+	u8                 InCollection; /**< Total number of Audio Streaming interfaces linked to this Audio Control interface. */
+	u8                 InterfaceNumber_speaker; /**< Interface number of the associated Audio Streaming interface for speaker. */
+	u8                 InterfaceNumber_mic; /**< Interface number of the associated Audio Streaming interface for mic. */
+}USB_Audio_Descriptor_Interface_AC_TL_t;
+
+/** \brief Audio class-specific Interface Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific interface descriptor. This follows a regular interface descriptor to
+ *  supply extra information about the audio device's layout to the host. See the USB Audio specification for more
+ *  details.
+ *
+ *  \see \ref USB_Audio_Descriptor_Interface_AC_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                           *   given by the specific class.
+	                           */
+
+	u8  bDescriptorSubtype;/**< Sub type value used to distinguish between audio class-specific descriptors,
+	                             *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                             */
+
+	u8  bcdADC[2]; /**< Binary coded decimal value, indicating the supported Audio Class specification version. */
+	u8 wTotalLength[2]; /**< Total length of the Audio class-specific descriptors, including this descriptor. */
+
+	u8  bInCollection; /**< Total number of Audio Streaming interfaces linked to this Audio Control interface (must be 1). */
+	u8  bInterfaceNumbers; /**< Interface number of the associated Audio Streaming interface. */
+}USB_Audio_StdDescriptor_Interface_AC_t;
+
+/** \brief Audio class-specific Feature Unit Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific Feature Unit descriptor. This indicates to the host what features
+ *  are present in the device's audio stream for basic control, such as per-channel volume. See the USB Audio
+ *  specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_FeatureUnit_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   must be \ref AUDIO_DSUBTYPE_CSInterface_Feature.
+	                                  */
+
+	u8                 UnitID; /**< ID value of this feature unit - must be a unique value within the device. */
+	u8                 SourceID; /**< Source ID value of the audio source input into this feature unit. */
+
+	u8                 ControlSize; /**< Size of each element in the \c ChannelControls array. */
+	u8                 ChannelControls[3]; /**< Feature masks for the control channel, and each separate audio channel. */
+
+	u8                 FeatureUnitStrIndex; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_Descriptor_FeatureUnit_t;
+
+/*just for usb_mic*/
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   must be \ref AUDIO_DSUBTYPE_CSInterface_Feature.
+	                                  */
+
+	u8                 UnitID; /**< ID value of this feature unit - must be a unique value within the device. */
+	u8                 SourceID; /**< Source ID value of the audio source input into this feature unit. */
+
+	u8                 ControlSize; /**< Size of each element in the \c ChannelControls array. */
+	u8                 ChannelControls[2]; /**< Feature masks for the control channel, and each separate audio channel. */
+
+	u8                 FeatureUnitStrIndex; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_Descriptor_FeatureUnit_Mic_t;
+
+/** \brief Audio class-specific Feature Unit Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific Feature Unit descriptor. This indicates to the host what features
+ *  are present in the device's audio stream for basic control, such as per-channel volume. See the USB Audio
+ *  specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_FeatureUnit_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                          *   given by the specific class.
+	                          */
+
+	u8 bDescriptorSubtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                             *   must be \ref AUDIO_DSUBTYPE_CSInterface_Feature.
+	                             */
+
+	u8 bUnitID; /**< ID value of this feature unit - must be a unique value within the device. */
+	u8 bSourceID; /**< Source ID value of the audio source input into this feature unit. */
+
+	u8 bControlSize; /**< Size of each element in the \c ChannelControls array. */
+	u8 bmaControls[3]; /**< Feature masks for the control channel, and each separate audio channel. */
+
+	u8 iFeature; /**< Index of a string descriptor describing this descriptor within the device. */
+}USB_Audio_StdDescriptor_FeatureUnit_t;
+
+/** \brief Audio class-specific Streaming Audio Interface Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific streaming interface descriptor. This indicates to the host
+ *  how audio streams within the device are formatted. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_Interface_AS_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                                  */
+
+	u8                 TerminalLink; /**< ID value of the output terminal this descriptor is describing. */
+
+	u8                 FrameDelay; /**< Delay in frames resulting from the complete sample processing from input to output. */
+	u8                 AudioFormat[2]; /**< Format of the audio stream, see Audio Device Formats specification. */
+}USB_Audio_Descriptor_Interface_AS_t;
+
+/** \brief Audio class-specific Streaming Audio Interface Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific streaming interface descriptor. This indicates to the host
+ *  how audio streams within the device are formatted. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_Interface_AS_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                           *   given by the specific class.
+	                           */
+
+	u8  bDescriptorSubtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                              *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                              */
+
+	u8  bTerminalLink; /**< ID value of the output terminal this descriptor is describing. */
+
+	u8  bDelay; /**< Delay in frames resulting from the complete sample processing from input to output. */
+	u16 wFormatTag; /**< Format of the audio stream, see Audio Device Formats specification. */
+}USB_Audio_StdDescriptor_Interface_AS_t;
+
+/** \brief Audio class-specific Format Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific audio format descriptor. This is used to give the host full details
+ *  about the number of channels, the sample resolution, acceptable sample frequencies and encoding method used
+ *  in the device's audio streams. See the USB Audio specification for more details.
+ *
+ *  \note This descriptor <b>must</b> be followed by one or more \ref USB_Audio_SampleFreq_t elements containing
+ *        the continuous or discrete sample frequencies.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_Format_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   must be \ref AUDIO_DSUBTYPE_CSInterface_FormatType.
+	                                  */
+
+	u8                 FormatType; /**< Format of the audio stream, see Audio Device Formats specification. */
+	u8                 Channels; /**< Total number of discrete channels in the stream. */
+
+	u8                 SubFrameSize; /**< Size in bytes of each channel's sample data in the stream. */
+	u8                 BitResolution; /**< Bits of resolution of each channel's samples in the stream. */
+
+	u8                 TotalDiscreteSampleRates; /**< Total number of discrete sample frequencies supported by the device. When
+	                                                   *   zero, this must be followed by the lower and upper continuous sampling
+	                                                   *   frequencies supported by the device; otherwise, this must be followed
+	                                                   *   by the given number of discrete sampling frequencies supported.
+	                                                   */
+}USB_Audio_Descriptor_Format_t;
+
+/** \brief 24-Bit Audio Frequency Structure.
+ *
+ *  Type define for a 24bit audio sample frequency structure. As GCC does not contain a built in 24-bit datatype,
+ *  this this structure is used to build up the value instead. Fill this structure with the \ref AUDIO_SAMPLE_FREQ() macro.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 Byte1; /**< Lowest 8 bits of the 24-bit value. */
+	u8 Byte2; /**< Middle 8 bits of the 24-bit value. */
+	u8 Byte3; /**< Upper 8 bits of the 24-bit value. */
+}USB_Audio_SampleFreq_t;
+
+/** \brief Audio class-specific Format Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific audio format descriptor. This is used to give the host full details
+ *  about the number of channels, the sample resolution, acceptable sample frequencies and encoding method used
+ *  in the device's audio streams. See the USB Audio specification for more details.
+ *
+ *  \note This descriptor <b>must</b> be followed by one or more 24-bit integer elements containing the continuous
+ *        or discrete sample frequencies.
+ *
+ *  \see \ref USB_Audio_Descriptor_Format_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                          *   must be \ref AUDIO_DSUBTYPE_CSInterface_FormatType.
+	                          */
+
+	u8 bDescriptorSubtype;/**< Sub type value used to distinguish between audio class-specific descriptors,
+	                            *   a value from the \ref Audio_CSInterface_AS_SubTypes_t enum.
+	                            */
+
+	u8 bFormatType; /**< Format of the audio stream, see Audio Device Formats specification. */
+	u8 bNrChannels; /**< Total number of discrete channels in the stream. */
+
+	u8 bSubFrameSize; /**< Size in bytes of each channel's sample data in the stream. */
+	u8 bBitResolution; /**< Bits of resolution of each channel's samples in the stream. */
+
+	u8 bSampleFrequencyType; /**< Total number of sample frequencies supported by the device. When
+	                               *   zero, this must be followed by the lower and upper continuous sampling
+	                               *   frequencies supported by the device; otherwise, this must be followed
+	                               *   by the given number of discrete sampling frequencies supported.
+	                               */
+}USB_Audio_StdDescriptor_Format_t;
+
+/** \brief Audio class-specific Streaming Endpoint Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific endpoint descriptor. This contains a regular endpoint
+ *  descriptor with a few Audio-class-specific extensions. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_StreamEndpoint_Std_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Endpoint_t Endpoint; /**< Standard endpoint descriptor describing the audio endpoint. */
+
+	u8                   Refresh; /**< Always set to zero for Audio class devices. */
+	u8                   SyncEndpointNumber; /**< Endpoint address to send synchronization information to, if needed (zero otherwise). */
+}USB_Audio_Descriptor_StreamEndpoint_Std_t;
+
+/** \brief Audio class-specific Streaming Endpoint Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific endpoint descriptor. This contains a regular endpoint
+ *  descriptor with a few Audio-class-specific extensions. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_StreamEndpoint_Std_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a
+	                           *   value given by the specific class.
+	                           */
+	u8  bEndpointAddress; /**< Logical address of the endpoint within the device for the current
+	                            *   configuration, including direction mask.
+	                            */
+	u8  bmAttributes; /**< Endpoint attributes, comprised of a mask of the endpoint type (\c EP_TYPE_*)
+	                        *   and attributes (\c ENDPOINT_ATTR_*) masks.
+	                        */
+	u16 wMaxPacketSize; /**< Size of the endpoint bank, in bytes. This indicates the maximum packet size
+	                          *   that the endpoint can receive at a time.
+	                          */
+	u8  bInterval; /**< Polling interval in milliseconds for the endpoint if it is an INTERRUPT or
+	                     *   ISOCHRONOUS type.
+	                     */
+
+	u8  bRefresh; /**< Always set to zero for Audio class devices. */
+	u8  bSynchAddress; /**< Endpoint address to send synchronization information to, if needed (zero otherwise). */
+}USB_Audio_StdDescriptor_StreamEndpoint_Std_t;
+
+/** \brief Audio class-specific Extended Endpoint Descriptor (LUFA naming conventions).
+ *
+ *  Type define for an Audio class-specific extended endpoint descriptor. This contains extra information
+ *  on the usage of endpoints used to stream audio in and out of the USB Audio device, and follows an Audio
+ *  class-specific extended endpoint descriptor. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_StdDescriptor_StreamEndpoint_Spc_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                 Subtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                                  *   a value from the \ref Audio_CSEndpoint_SubTypes_t enum.
+	                                  */
+
+	u8                 Attributes; /**< Audio class-specific endpoint attributes, such as \ref AUDIO_EP_FULL_PACKETS_ONLY. */
+
+	u8                 LockDelayUnits; /**< Units used for the LockDelay field, see Audio class specification. */
+	u8                 LockDelay[2]; /**< Time required to internally lock endpoint's internal clock recovery circuitry. */
+}USB_Audio_Descriptor_StreamEndpoint_Spc_t;
+
+/** \brief Audio class-specific Extended Endpoint Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for an Audio class-specific extended endpoint descriptor. This contains extra information
+ *  on the usage of endpoints used to stream audio in and out of the USB Audio device, and follows an Audio
+ *  class-specific extended endpoint descriptor. See the USB Audio specification for more details.
+ *
+ *  \see \ref USB_Audio_Descriptor_StreamEndpoint_Spc_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                           *   given by the specific class.
+	                           */
+
+	u8  bDescriptorSubtype; /**< Sub type value used to distinguish between audio class-specific descriptors,
+	                              *   a value from the \ref Audio_CSEndpoint_SubTypes_t enum.
+	                              */
+
+	u8  bmAttributes; /**< Audio class-specific endpoint attributes, such as \ref AUDIO_EP_FULL_PACKETS_ONLY. */
+
+	u8  bLockDelayUnits; /**< Units used for the LockDelay field, see Audio class specification. */
+	u16 wLockDelay; /**< Time required to internally lock endpoint's internal clock recovery circuitry. */
+}USB_Audio_StdDescriptor_StreamEndpoint_Spc_t;
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassCommon.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassCommon.h
new file mode 100644
index 00000000..73777839
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassCommon.h
@@ -0,0 +1,362 @@
+/********************************************************************************************************
+ * @file    CDCClassCommon.h
+ *
+ * @brief   This is the header file for CDCClassCommon
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "bit.h"
+#include "StdDescriptors.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+
+
+/* Macros: */
+/** \name Virtual Control Line Masks */
+//@{
+/** Mask for the DTR handshake line for use with the \ref CDC_REQ_SetControlLineState class-specific request
+ *  from the host, to indicate that the DTR line state should be high.
+ */
+#define CDC_CONTROL_LINE_OUT_DTR         BIT(0)
+
+/** Mask for the RTS handshake line for use with the \ref CDC_REQ_SetControlLineState class-specific request
+ *  from the host, to indicate that the RTS line state should be high.
+ */
+#define CDC_CONTROL_LINE_OUT_RTS         BIT(1)
+
+/** Mask for the DCD handshake line for use with the \ref CDC_NOTIF_SerialState class-specific notification
+ *  from the device to the host, to indicate that the DCD line state is currently high.
+ */
+#define CDC_CONTROL_LINE_IN_DCD          BIT(0)
+
+/** Mask for the DSR handshake line for use with the \ref CDC_NOTIF_SerialState class-specific notification
+ *  from the device to the host, to indicate that the DSR line state is currently high.
+ */
+#define CDC_CONTROL_LINE_IN_DSR          BIT(1)
+
+/** Mask for the BREAK handshake line for use with the \ref CDC_NOTIF_SerialState class-specific notification
+ *  from the device to the host, to indicate that the BREAK line state is currently high.
+ */
+#define CDC_CONTROL_LINE_IN_BREAK        BIT(2)
+
+/** Mask for the RING handshake line for use with the \ref CDC_NOTIF_SerialState class-specific notification
+ *  from the device to the host, to indicate that the RING line state is currently high.
+ */
+#define CDC_CONTROL_LINE_IN_RING         BIT(3)
+
+/** Mask for use with the \ref CDC_NOTIF_SerialState class-specific notification from the device to the host,
+ *  to indicate that a framing error has occurred on the virtual serial port.
+ */
+#define CDC_CONTROL_LINE_IN_FRAMEERROR   BIT(4)
+
+/** Mask for use with the \ref CDC_NOTIF_SerialState class-specific notification from the device to the host,
+ *  to indicate that a parity error has occurred on the virtual serial port.
+ */
+#define CDC_CONTROL_LINE_IN_PARITYERROR  BIT(5)
+
+/** Mask for use with the \ref CDC_NOTIF_SerialState class-specific notification from the device to the host,
+ *  to indicate that a data overrun error has occurred on the virtual serial port.
+ */
+#define CDC_CONTROL_LINE_IN_OVERRUNERROR BIT(6)
+//@}
+
+/** Macro to define a CDC class-specific functional descriptor. CDC functional descriptors have a
+ *  uniform structure but variable sized data payloads, thus cannot be represented accurately by
+ *  a single \c typedef \c struct. A macro is used instead so that functional descriptors can be created
+ *  easily by specifying the size of the payload. This allows \c sizeof() to work correctly.
+ *
+ *  \param[in] DataSize  Size in bytes of the CDC functional descriptor's data payload.
+ */
+#define CDC_FUNCTIONAL_DESCRIPTOR(DataSize)        \
+	 struct                                        \
+	 {                                             \
+		  USB_Descriptor_Header_t Header;          \
+		  u8                 	  SubType;         \
+		  u8                 	  Data[DataSize];  \
+	 }
+
+/* Enums: */
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors relating to the CDC
+ *  device class.
+ */
+enum CDC_Descriptor_ClassSubclassProtocol_t
+{
+	CDC_CSCP_CDCClass               = 0x02, /**< Descriptor Class value indicating that the device or interface
+											 *   belongs to the CDC class.
+											 */
+	CDC_CSCP_NoSpecificSubclass     = 0x00, /**< Descriptor Subclass value indicating that the device or interface
+											 *   belongs to no specific subclass of the CDC class.
+											 */
+	CDC_CSCP_ACMSubclass            = 0x02, /**< Descriptor Subclass value indicating that the device or interface
+											 *   belongs to the Abstract Control Model CDC subclass.
+											 */
+	CDC_CSCP_ATCommandProtocol      = 0x01, /**< Descriptor Protocol value indicating that the device or interface
+											 *   belongs to the AT Command protocol of the CDC class.
+											 */
+	CDC_CSCP_NoSpecificProtocol     = 0x00, /**< Descriptor Protocol value indicating that the device or interface
+											 *   belongs to no specific protocol of the CDC class.
+											 */
+	CDC_CSCP_VendorSpecificProtocol = 0xFF, /**< Descriptor Protocol value indicating that the device or interface
+											 *   belongs to a vendor-specific protocol of the CDC class.
+											 */
+	CDC_CSCP_CDCDataClass           = 0x0A, /**< Descriptor Class value indicating that the device or interface
+											 *   belongs to the CDC Data class.
+											 */
+	CDC_CSCP_NoDataSubclass         = 0x00, /**< Descriptor Subclass value indicating that the device or interface
+											 *   belongs to no specific subclass of the CDC data class.
+											 */
+	CDC_CSCP_NoDataProtocol         = 0x00, /**< Descriptor Protocol value indicating that the device or interface
+											 *   belongs to no specific protocol of the CDC data class.
+											 */
+};
+
+/** Enum for the CDC class specific control requests that can be issued by the USB bus host. */
+enum CDC_ClassRequests_t
+{
+	CDC_REQ_SendEncapsulatedCommand = 0x00, /**< CDC class-specific request to send an encapsulated command to the device. */
+	CDC_REQ_GetEncapsulatedResponse = 0x01, /**< CDC class-specific request to retrieve an encapsulated command response from the device. */
+	CDC_REQ_SetLineEncoding         = 0x20, /**< CDC class-specific request to set the current virtual serial port configuration settings. */
+	CDC_REQ_GetLineEncoding         = 0x21, /**< CDC class-specific request to get the current virtual serial port configuration settings. */
+	CDC_REQ_SetControlLineState     = 0x22, /**< CDC class-specific request to set the current virtual serial port handshake line states. */
+	CDC_REQ_SendBreak               = 0x23, /**< CDC class-specific request to send a break to the receiver via the carrier channel. */
+};
+
+/** Enum for the CDC class specific notification requests that can be issued by a CDC device to a host. */
+enum CDC_ClassNotifications_t
+{
+	CDC_NOTIF_SerialState = 0x20, /**< Notification type constant for a change in the virtual serial port
+								   *   handshake line states, for use with a \ref USB_Request_Header_t
+								   *   notification structure when sent to the host via the CDC notification
+								   *   endpoint.
+								   */
+};
+
+/** Enum for the CDC class specific interface descriptor subtypes. */
+enum CDC_DescriptorSubtypes_t
+{
+	CDC_DSUBTYPE_CSInterface_Header           = 0x00, /**< CDC class-specific Header functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_CallManagement   = 0x01, /**< CDC class-specific Call Management functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_ACM              = 0x02, /**< CDC class-specific Abstract Control Model functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_DirectLine       = 0x03, /**< CDC class-specific Direct Line functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_TelephoneRinger  = 0x04, /**< CDC class-specific Telephone Ringer functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_TelephoneCall    = 0x05, /**< CDC class-specific Telephone Call functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_Union            = 0x06, /**< CDC class-specific Union functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_CountrySelection = 0x07, /**< CDC class-specific Country Selection functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_TelephoneOpModes = 0x08, /**< CDC class-specific Telephone Operation Modes functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_USBTerminal      = 0x09, /**< CDC class-specific USB Terminal functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_NetworkChannel   = 0x0A, /**< CDC class-specific Network Channel functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_ProtocolUnit     = 0x0B, /**< CDC class-specific Protocol Unit functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_ExtensionUnit    = 0x0C, /**< CDC class-specific Extension Unit functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_MultiChannel     = 0x0D, /**< CDC class-specific Multi-Channel Management functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_CAPI             = 0x0E, /**< CDC class-specific Common ISDN API functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_Ethernet         = 0x0F, /**< CDC class-specific Ethernet functional descriptor. */
+	CDC_DSUBTYPE_CSInterface_ATM              = 0x10, /**< CDC class-specific Asynchronous Transfer Mode functional descriptor. */
+};
+
+/** Enum for the possible line encoding formats of a virtual serial port. */
+enum CDC_LineEncodingFormats_t
+{
+	CDC_LINEENCODING_OneStopBit          = 0, /**< Each frame contains one stop bit. */
+	CDC_LINEENCODING_OneAndAHalfStopBits = 1, /**< Each frame contains one and a half stop bits. */
+	CDC_LINEENCODING_TwoStopBits         = 2, /**< Each frame contains two stop bits. */
+};
+
+/** Enum for the possible line encoding parity settings of a virtual serial port. */
+enum CDC_LineEncodingParity_t
+{
+	CDC_PARITY_None  = 0, /**< No parity bit mode on each frame. */
+	CDC_PARITY_Odd   = 1, /**< Odd parity bit mode on each frame. */
+	CDC_PARITY_Even  = 2, /**< Even parity bit mode on each frame. */
+	CDC_PARITY_Mark  = 3, /**< Mark parity bit mode on each frame. */
+	CDC_PARITY_Space = 4, /**< Space parity bit mode on each frame. */
+};
+
+/* Type Defines: */
+/** \brief CDC class-specific Functional Header Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a CDC class-specific functional header descriptor. This indicates to the host that the device
+ *  contains one or more CDC functional data descriptors, which give the CDC interface's capabilities and configuration.
+ *  See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_StdDescriptor_FunctionalHeader_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                      Subtype; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+									  *   must be \ref CDC_DSUBTYPE_CSInterface_Header.
+									  */
+	u16                     CDCSpecification; /**< Version number of the CDC specification implemented by the device,
+											   *   encoded in BCD format.
+											   *
+											   *   \see \ref VERSION_BCD() utility macro.
+											   */
+} USB_CDC_Descriptor_FunctionalHeader_t;
+
+/** \brief CDC class-specific Functional Header Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a CDC class-specific functional header descriptor. This indicates to the host that the device
+ *  contains one or more CDC functional data descriptors, which give the CDC interface's capabilities and configuration.
+ *  See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_Descriptor_FunctionalHeader_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8       bFunctionLength; /**< Size of the descriptor, in bytes. */
+	u8       bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+							   *   given by the specific class.
+							   */
+	u8       bDescriptorSubType; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+								  *   must be \ref CDC_DSUBTYPE_CSInterface_Header.
+								  */
+	u16      bcdCDC; /**< Version number of the CDC specification implemented by the device, encoded in BCD format.
+					  *
+					  *   \see \ref VERSION_BCD() utility macro.
+					  */
+} USB_CDC_StdDescriptor_FunctionalHeader_t;
+
+/** \brief CDC class-specific Functional ACM Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a CDC class-specific functional ACM descriptor. This indicates to the host that the CDC interface
+ *  supports the CDC ACM subclass of the CDC specification. See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_StdDescriptor_FunctionalACM_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                      Subtype; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+									  *   must be \ref CDC_DSUBTYPE_CSInterface_ACM.
+									  */
+	u8                      Capabilities; /**< Capabilities of the ACM interface, given as a bit mask. For most devices,
+										   *   this should be set to a fixed value of 0x06 - for other capabilities, refer
+										   *   to the CDC ACM specification.
+										   */
+} USB_CDC_Descriptor_FunctionalACM_t;
+
+/** \brief CDC class-specific Functional ACM Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a CDC class-specific functional ACM descriptor. This indicates to the host that the CDC interface
+ *  supports the CDC ACM subclass of the CDC specification. See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_Descriptor_FunctionalACM_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8      bFunctionLength; /**< Size of the descriptor, in bytes. */
+	u8      bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+							  *   given by the specific class.
+							  */
+	u8      bDescriptorSubType; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+								 *   must be \ref CDC_DSUBTYPE_CSInterface_ACM.
+								 */
+	u8      bmCapabilities; /**< Capabilities of the ACM interface, given as a bit mask. For most devices,
+							 *   this should be set to a fixed value of 0x06 - for other capabilities, refer
+							 *   to the CDC ACM specification.
+							 */
+} USB_CDC_StdDescriptor_FunctionalACM_t;
+
+/** \brief CDC class-specific Functional Union Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a CDC class-specific functional Union descriptor. This indicates to the host that specific
+ *  CDC control and data interfaces are related. See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_StdDescriptor_FunctionalUnion_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+	u8                      Subtype; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+									  *   must be \ref CDC_DSUBTYPE_CSInterface_Union.
+									  */
+	u8                      MasterInterfaceNumber; /**< Interface number of the CDC Control interface. */
+	u8                      SlaveInterfaceNumber; /**< Interface number of the CDC Data interface. */
+} USB_CDC_Descriptor_FunctionalUnion_t;
+
+/** \brief CDC class-specific Functional Union Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a CDC class-specific functional Union descriptor. This indicates to the host that specific
+ *  CDC control and data interfaces are related. See the CDC class specification for more details.
+ *
+ *  \see \ref USB_CDC_Descriptor_FunctionalUnion_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8      bFunctionLength; /**< Size of the descriptor, in bytes. */
+	u8      bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+							  *   given by the specific class.
+							  */
+	u8      bDescriptorSubType; /**< Sub type value used to distinguish between CDC class-specific descriptors,
+								 *   must be \ref CDC_DSUBTYPE_CSInterface_Union.
+								 */
+	u8      bMasterInterface; /**< Interface number of the CDC Control interface. */
+	u8      bSlaveInterface0; /**< Interface number of the CDC Data interface. */
+} USB_CDC_StdDescriptor_FunctionalUnion_t;
+
+/** \brief CDC Virtual Serial Port Line Encoding Settings Structure.
+ *
+ *  Type define for a CDC Line Encoding structure, used to hold the various encoding parameters for a virtual
+ *  serial port.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u32      BaudRateBPS; /**< Baud rate of the virtual serial port, in bits per second. */
+	u8       CharFormat; /**< Character format of the virtual serial port, a value from the
+						  *   \ref CDC_LineEncodingFormats_t enum.
+						  */
+	u8       ParityType; /**< Parity setting of the virtual serial port, a value from the
+						  *   \ref CDC_LineEncodingParity_t enum.
+						  */
+	u8       DataBits; /**< Bits of data per character of the virtual serial port. */
+} CDC_LineEncoding_t;
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassDevice.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassDevice.h
new file mode 100644
index 00000000..f6bf5ba2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/CDCClassDevice.h
@@ -0,0 +1,93 @@
+/********************************************************************************************************
+ * @file    CDCClassDevice.h
+ *
+ * @brief   This is the header file for CDCClassDevice
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "CDCClassCommon.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+    extern "C" {
+#endif
+
+/* Public Interface - May be used in end-application: */
+/* Type Defines: */
+/** \brief CDC Class Device Mode Configuration and State Structure.
+ *
+ *  Class state structure. An instance of this structure should be made for each CDC interface
+ *  within the user application, and passed to each of the CDC class driver functions as the
+ *  CDCInterfaceInfo parameter. This stores each CDC interface's configuration and state information.
+ */
+typedef struct
+{
+	struct
+	{
+		u8       ControlInterfaceNumber; /**< Interface number of the CDC control interface within the device. */
+
+		u8       DataINEndpointNumber; /**< Endpoint number of the CDC interface's IN data endpoint. */
+		u16      DataINEndpointSize; /**< Size in bytes of the CDC interface's IN data endpoint. */
+		bool     DataINEndpointDoubleBank; /**< Indicates if the CDC interface's IN data endpoint should use double banking. */
+
+		u8       DataOUTEndpointNumber; /**< Endpoint number of the CDC interface's OUT data endpoint. */
+		u16      DataOUTEndpointSize;  /**< Size in bytes of the CDC interface's OUT data endpoint. */
+		bool     DataOUTEndpointDoubleBank; /**< Indicates if the CDC interface's OUT data endpoint should use double banking. */
+
+		u8       NotificationEndpointNumber; /**< Endpoint number of the CDC interface's IN notification endpoint, if used. */
+		u16      NotificationEndpointSize;  /**< Size in bytes of the CDC interface's IN notification endpoint, if used. */
+		bool     NotificationEndpointDoubleBank; /**< Indicates if the CDC interface's notification endpoint should use double banking. */
+	} Config; /**< Config data for the USB class interface within the device. All elements in this section
+			   *   <b>must</b> be set or the interface will fail to enumerate and operate correctly.
+			   */
+	struct
+	{
+		struct
+		{
+			u16      HostToDevice; /**< Control line states from the host to device, as a set of \c CDC_CONTROL_LINE_OUT_*
+									*   masks. This value is updated each time \ref CDC_Device_USBTask() is called.
+									*/
+			u16      DeviceToHost; /**< Control line states from the device to host, as a set of \c CDC_CONTROL_LINE_IN_*
+									*   masks - to notify the host of changes to these values, call the
+									*   \ref CDC_Device_SendControlLineStateChange() function.
+									*/
+		} ControlLineStates; /**< Current states of the virtual serial port's control lines between the device and host. */
+
+		CDC_LineEncoding_t LineEncoding; /** Line encoding used in the virtual serial port, for the device's information.
+										  *  This is generally only used if the virtual serial port data is to be
+										  *  reconstructed on a physical UART.
+										  */
+	} State; /**< State data for the USB class interface within the device. All elements in this section
+			  *   are reset to their defaults when the interface is enumerated.
+			  */
+} USB_ClassInfo_CDC_Device_t;
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassCommon.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassCommon.h
new file mode 100644
index 00000000..80cc094f
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassCommon.h
@@ -0,0 +1,628 @@
+/********************************************************************************************************
+ * @file    HIDClassCommon.h
+ *
+ * @brief   This is the header file for HIDClassCommon
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "bit.h"
+#include "StdDescriptors.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Macros: */
+/** \name Keyboard Standard Report Modifier Masks */
+//@{
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's left control key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_LEFTCTRL                    BIT(0)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's left shift key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_LEFTSHIFT                   BIT(1)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's left alt key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_LEFTALT                     BIT(2)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's left GUI key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_LEFTGUI                     BIT(3)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's right control key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_RIGHTCTRL                   BIT(4)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's right shift key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_RIGHTSHIFT                  BIT(5)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's right alt key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_RIGHTALT                    BIT(6)
+
+/** Constant for a keyboard report modifier byte, indicating that the keyboard's right GUI key is currently pressed. */
+#define HID_KEYBOARD_MODIFIER_RIGHTGUI                    BIT(7)
+//@}
+
+/** \name Keyboard Standard Report LED Masks */
+//@{
+/** Constant for a keyboard output report LED byte, indicating that the host's NUM LOCK mode is currently set. */
+#define HID_KEYBOARD_LED_NUMLOCK                          BIT(0)
+
+/** Constant for a keyboard output report LED byte, indicating that the host's CAPS LOCK mode is currently set. */
+#define HID_KEYBOARD_LED_CAPSLOCK                         BIT(1)
+
+/** Constant for a keyboard output report LED byte, indicating that the host's SCROLL LOCK mode is currently set. */
+#define HID_KEYBOARD_LED_SCROLLLOCK                       BIT(2)
+
+/** Constant for a keyboard output report LED byte, indicating that the host's KATANA mode is currently set. */
+#define HID_KEYBOARD_LED_KATANA                           BIT(3)
+//@}
+
+/** \name Keyboard Standard Report Key Scan-codes */
+//@{
+#define HID_KEYBOARD_SC_ERROR_ROLLOVER                    0x01
+#define HID_KEYBOARD_SC_POST_FAIL                         0x02
+#define HID_KEYBOARD_SC_ERROR_UNDEFINED                   0x03
+#define HID_KEYBOARD_SC_A                                 0x04
+#define HID_KEYBOARD_SC_B                                 0x05
+#define HID_KEYBOARD_SC_C                                 0x06
+#define HID_KEYBOARD_SC_D                                 0x07
+#define HID_KEYBOARD_SC_E                                 0x08
+#define HID_KEYBOARD_SC_F                                 0x09
+#define HID_KEYBOARD_SC_G                                 0x0A
+#define HID_KEYBOARD_SC_H                                 0x0B
+#define HID_KEYBOARD_SC_I                                 0x0C
+#define HID_KEYBOARD_SC_J                                 0x0D
+#define HID_KEYBOARD_SC_K                                 0x0E
+#define HID_KEYBOARD_SC_L                                 0x0F
+#define HID_KEYBOARD_SC_M                                 0x10
+#define HID_KEYBOARD_SC_N                                 0x11
+#define HID_KEYBOARD_SC_O                                 0x12
+#define HID_KEYBOARD_SC_P                                 0x13
+#define HID_KEYBOARD_SC_Q                                 0x14
+#define HID_KEYBOARD_SC_R                                 0x15
+#define HID_KEYBOARD_SC_S                                 0x16
+#define HID_KEYBOARD_SC_T                                 0x17
+#define HID_KEYBOARD_SC_U                                 0x18
+#define HID_KEYBOARD_SC_V                                 0x19
+#define HID_KEYBOARD_SC_W                                 0x1A
+#define HID_KEYBOARD_SC_X                                 0x1B
+#define HID_KEYBOARD_SC_Y                                 0x1C
+#define HID_KEYBOARD_SC_Z                                 0x1D
+#define HID_KEYBOARD_SC_1_AND_EXCLAMATION                 0x1E
+#define HID_KEYBOARD_SC_2_AND_AT                          0x1F
+#define HID_KEYBOARD_SC_3_AND_HASHMARK                    0x20
+#define HID_KEYBOARD_SC_4_AND_DOLLAR                      0x21
+#define HID_KEYBOARD_SC_5_AND_PERCENTAGE                  0x22
+#define HID_KEYBOARD_SC_6_AND_CARET                       0x23
+#define HID_KEYBOARD_SC_7_AND_AND_AMPERSAND               0x24
+#define HID_KEYBOARD_SC_8_AND_ASTERISK                    0x25
+#define HID_KEYBOARD_SC_9_AND_OPENING_PARENTHESIS         0x26
+#define HID_KEYBOARD_SC_0_AND_CLOSING_PARENTHESIS         0x27
+#define HID_KEYBOARD_SC_ENTER                             0x28
+#define HID_KEYBOARD_SC_ESCAPE                            0x29
+#define HID_KEYBOARD_SC_BACKSPACE                         0x2A
+#define HID_KEYBOARD_SC_TAB                               0x2B
+#define HID_KEYBOARD_SC_SPACE                             0x2C
+#define HID_KEYBOARD_SC_MINUS_AND_UNDERSCORE              0x2D
+#define HID_KEYBOARD_SC_EQUAL_AND_PLUS                    0x2E
+#define HID_KEYBOARD_SC_OPENING_BRACKET_AND_OPENING_BRACE 0x2F
+#define HID_KEYBOARD_SC_CLOSING_BRACKET_AND_CLOSING_BRACE 0x30
+#define HID_KEYBOARD_SC_BACKSLASH_AND_PIPE                0x31
+#define HID_KEYBOARD_SC_NON_US_HASHMARK_AND_TILDE         0x32
+#define HID_KEYBOARD_SC_SEMICOLON_AND_COLON               0x33
+#define HID_KEYBOARD_SC_APOSTROPHE_AND_QUOTE              0x34
+#define HID_KEYBOARD_SC_GRAVE_ACCENT_AND_TILDE            0x35
+#define HID_KEYBOARD_SC_COMMA_AND_LESS_THAN_SIGN          0x36
+#define HID_KEYBOARD_SC_DOT_AND_GREATER_THAN_SIGN         0x37
+#define HID_KEYBOARD_SC_SLASH_AND_QUESTION_MARK           0x38
+#define HID_KEYBOARD_SC_CAPS_LOCK                         0x39
+#define HID_KEYBOARD_SC_F1                                0x3A
+#define HID_KEYBOARD_SC_F2                                0x3B
+#define HID_KEYBOARD_SC_F3                                0x3C
+#define HID_KEYBOARD_SC_F4                                0x3D
+#define HID_KEYBOARD_SC_F5                                0x3E
+#define HID_KEYBOARD_SC_F6                                0x3F
+#define HID_KEYBOARD_SC_F7                                0x40
+#define HID_KEYBOARD_SC_F8                                0x41
+#define HID_KEYBOARD_SC_F9                                0x42
+#define HID_KEYBOARD_SC_F10                               0x43
+#define HID_KEYBOARD_SC_F11                               0x44
+#define HID_KEYBOARD_SC_F12                               0x45
+#define HID_KEYBOARD_SC_PRINT_SCREEN                      0x46
+#define HID_KEYBOARD_SC_SCROLL_LOCK                       0x47
+#define HID_KEYBOARD_SC_PAUSE                             0x48
+#define HID_KEYBOARD_SC_INSERT                            0x49
+#define HID_KEYBOARD_SC_HOME                              0x4A
+#define HID_KEYBOARD_SC_PAGE_UP                           0x4B
+#define HID_KEYBOARD_SC_DELETE                            0x4C
+#define HID_KEYBOARD_SC_END                               0x4D
+#define HID_KEYBOARD_SC_PAGE_DOWN                         0x4E
+#define HID_KEYBOARD_SC_RIGHT_ARROW                       0x4F
+#define HID_KEYBOARD_SC_LEFT_ARROW                        0x50
+#define HID_KEYBOARD_SC_DOWN_ARROW                        0x51
+#define HID_KEYBOARD_SC_UP_ARROW                          0x52
+#define HID_KEYBOARD_SC_NUM_LOCK                          0x53
+#define HID_KEYBOARD_SC_KEYPAD_SLASH                      0x54
+#define HID_KEYBOARD_SC_KEYPAD_ASTERISK                   0x55
+#define HID_KEYBOARD_SC_KEYPAD_MINUS                      0x56
+#define HID_KEYBOARD_SC_KEYPAD_PLUS                       0x57
+#define HID_KEYBOARD_SC_KEYPAD_ENTER                      0x58
+#define HID_KEYBOARD_SC_KEYPAD_1_AND_END                  0x59
+#define HID_KEYBOARD_SC_KEYPAD_2_AND_DOWN_ARROW           0x5A
+#define HID_KEYBOARD_SC_KEYPAD_3_AND_PAGE_DOWN            0x5B
+#define HID_KEYBOARD_SC_KEYPAD_4_AND_LEFT_ARROW           0x5C
+#define HID_KEYBOARD_SC_KEYPAD_5                          0x5D
+#define HID_KEYBOARD_SC_KEYPAD_6_AND_RIGHT_ARROW          0x5E
+#define HID_KEYBOARD_SC_KEYPAD_7_AND_HOME                 0x5F
+#define HID_KEYBOARD_SC_KEYPAD_8_AND_UP_ARROW             0x60
+#define HID_KEYBOARD_SC_KEYPAD_9_AND_PAGE_UP              0x61
+#define HID_KEYBOARD_SC_KEYPAD_0_AND_INSERT               0x62
+#define HID_KEYBOARD_SC_KEYPAD_DOT_AND_DELETE             0x63
+#define HID_KEYBOARD_SC_NON_US_BACKSLASH_AND_PIPE         0x64
+#define HID_KEYBOARD_SC_POWER                             0x66
+#define HID_KEYBOARD_SC_EQUAL_SIGN                        0x67
+#define HID_KEYBOARD_SC_F13                               0x68
+#define HID_KEYBOARD_SC_F14                               0x69
+#define HID_KEYBOARD_SC_F15                               0x6A
+#define HID_KEYBOARD_SC_F16                               0x6B
+#define HID_KEYBOARD_SC_F17                               0x6C
+#define HID_KEYBOARD_SC_F18                               0x6D
+#define HID_KEYBOARD_SC_F19                               0x6E
+#define HID_KEYBOARD_SC_F20                               0x6F
+#define HID_KEYBOARD_SC_F21                               0x70
+#define HID_KEYBOARD_SC_F22                               0x71
+#define HID_KEYBOARD_SC_F23                               0x72
+#define HID_KEYBOARD_SC_F24                               0x73
+#define HID_KEYBOARD_SC_EXECUTE                           0x74
+#define HID_KEYBOARD_SC_HELP                              0x75
+#define HID_KEYBOARD_SC_MANU                              0x76
+#define HID_KEYBOARD_SC_SELECT                            0x77
+#define HID_KEYBOARD_SC_STOP                              0x78
+#define HID_KEYBOARD_SC_AGAIN                             0x79
+#define HID_KEYBOARD_SC_UNDO                              0x7A
+#define HID_KEYBOARD_SC_CUT                               0x7B
+#define HID_KEYBOARD_SC_COPY                              0x7C
+#define HID_KEYBOARD_SC_PASTE                             0x7D
+#define HID_KEYBOARD_SC_FIND                              0x7E
+#define HID_KEYBOARD_SC_MUTE                              0x7F
+#define HID_KEYBOARD_SC_VOLUME_UP                         0x80
+#define HID_KEYBOARD_SC_VOLUME_DOWN                       0x81
+#define HID_KEYBOARD_SC_LOCKING_CAPS_LOCK                 0x82
+#define HID_KEYBOARD_SC_LOCKING_NUM_LOCK                  0x83
+#define HID_KEYBOARD_SC_LOCKING_SCROLL_LOCK               0x84
+#define HID_KEYBOARD_SC_KEYPAD_COMMA                      0x85
+#define HID_KEYBOARD_SC_KEYPAD_EQUAL_SIGN                 0x86
+#define HID_KEYBOARD_SC_INTERNATIONAL1                    0x87
+#define HID_KEYBOARD_SC_INTERNATIONAL2                    0x88
+#define HID_KEYBOARD_SC_INTERNATIONAL3                    0x89
+#define HID_KEYBOARD_SC_INTERNATIONAL4                    0x8A
+#define HID_KEYBOARD_SC_INTERNATIONAL5                    0x8B
+#define HID_KEYBOARD_SC_INTERNATIONAL6                    0x8C
+#define HID_KEYBOARD_SC_INTERNATIONAL7                    0x8D
+#define HID_KEYBOARD_SC_INTERNATIONAL8                    0x8E
+#define HID_KEYBOARD_SC_INTERNATIONAL9                    0x8F
+#define HID_KEYBOARD_SC_LANG1                             0x90
+#define HID_KEYBOARD_SC_LANG2                             0x91
+#define HID_KEYBOARD_SC_LANG3                             0x92
+#define HID_KEYBOARD_SC_LANG4                             0x93
+#define HID_KEYBOARD_SC_LANG5                             0x94
+#define HID_KEYBOARD_SC_LANG6                             0x95
+#define HID_KEYBOARD_SC_LANG7                             0x96
+#define HID_KEYBOARD_SC_LANG8                             0x97
+#define HID_KEYBOARD_SC_LANG9                             0x98
+#define HID_KEYBOARD_SC_ALTERNATE_ERASE                   0x99
+#define HID_KEYBOARD_SC_SISREQ                            0x9A
+#define HID_KEYBOARD_SC_CANCEL                            0x9B
+#define HID_KEYBOARD_SC_CLEAR                             0x9C
+#define HID_KEYBOARD_SC_PRIOR                             0x9D
+#define HID_KEYBOARD_SC_RETURN                            0x9E
+#define HID_KEYBOARD_SC_SEPARATOR                         0x9F
+#define HID_KEYBOARD_SC_OUT                               0xA0
+#define HID_KEYBOARD_SC_OPER                              0xA1
+#define HID_KEYBOARD_SC_CLEAR_AND_AGAIN                   0xA2
+#define HID_KEYBOARD_SC_CRSEL_ANDPROPS                    0xA3
+#define HID_KEYBOARD_SC_EXSEL                             0xA4
+#define HID_KEYBOARD_SC_KEYPAD_00                         0xB0
+#define HID_KEYBOARD_SC_KEYPAD_000                        0xB1
+#define HID_KEYBOARD_SC_THOUSANDS_SEPARATOR               0xB2
+#define HID_KEYBOARD_SC_DECIMAL_SEPARATOR                 0xB3
+#define HID_KEYBOARD_SC_CURRENCY_UNIT                     0xB4
+#define HID_KEYBOARD_SC_CURRENCY_SUB_UNIT                 0xB5
+#define HID_KEYBOARD_SC_KEYPAD_OPENING_PARENTHESIS        0xB6
+#define HID_KEYBOARD_SC_KEYPAD_CLOSING_PARENTHESIS        0xB7
+#define HID_KEYBOARD_SC_KEYPAD_OPENING_BRACE              0xB8
+#define HID_KEYBOARD_SC_KEYPAD_CLOSING_BRACE              0xB9
+#define HID_KEYBOARD_SC_KEYPAD_TAB                        0xBA
+#define HID_KEYBOARD_SC_KEYPAD_BACKSPACE                  0xBB
+#define HID_KEYBOARD_SC_KEYPAD_A                          0xBC
+#define HID_KEYBOARD_SC_KEYPAD_B                          0xBD
+#define HID_KEYBOARD_SC_KEYPAD_C                          0xBE
+#define HID_KEYBOARD_SC_KEYPAD_D                          0xBF
+#define HID_KEYBOARD_SC_KEYPAD_E                          0xC0
+#define HID_KEYBOARD_SC_KEYPAD_F                          0xC1
+#define HID_KEYBOARD_SC_KEYPAD_XOR                        0xC2
+#define HID_KEYBOARD_SC_KEYPAD_CARET                      0xC3
+#define HID_KEYBOARD_SC_KEYPAD_PERCENTAGE                 0xC4
+#define HID_KEYBOARD_SC_KEYPAD_LESS_THAN_SIGN             0xC5
+#define HID_KEYBOARD_SC_KEYPAD_GREATER_THAN_SIGN          0xC6
+#define HID_KEYBOARD_SC_KEYPAD_AMP                        0xC7
+#define HID_KEYBOARD_SC_KEYPAD_AMP_AMP                    0xC8
+#define HID_KEYBOARD_SC_KEYPAD_PIPE                       0xC9
+#define HID_KEYBOARD_SC_KEYPAD_PIPE_PIPE                  0xCA
+#define HID_KEYBOARD_SC_KEYPAD_COLON                      0xCB
+#define HID_KEYBOARD_SC_KEYPAD_HASHMARK                   0xCC
+#define HID_KEYBOARD_SC_KEYPAD_SPACE                      0xCD
+#define HID_KEYBOARD_SC_KEYPAD_AT                         0xCE
+#define HID_KEYBOARD_SC_KEYPAD_EXCLAMATION_SIGN           0xCF
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_STORE               0xD0
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_RECALL              0xD1
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_CLEAR               0xD2
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_ADD                 0xD3
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_SUBTRACT            0xD4
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_MULTIPLY            0xD5
+#define HID_KEYBOARD_SC_KEYPAD_MEMORY_DIVIDE              0xD6
+#define HID_KEYBOARD_SC_KEYPAD_PLUS_AND_MINUS             0xD7
+#define HID_KEYBOARD_SC_KEYPAD_CLEAR                      0xD8
+#define HID_KEYBOARD_SC_KEYPAD_CLEAR_ENTRY                0xD9
+#define HID_KEYBOARD_SC_KEYPAD_BINARY                     0xDA
+#define HID_KEYBOARD_SC_KEYPAD_OCTAL                      0xDB
+#define HID_KEYBOARD_SC_KEYPAD_DECIMAL                    0xDC
+#define HID_KEYBOARD_SC_KEYPAD_HEXADECIMAL                0xDD
+#define HID_KEYBOARD_SC_LEFT_CONTROL                      0xE0
+#define HID_KEYBOARD_SC_LEFT_SHIFT                        0xE1
+#define HID_KEYBOARD_SC_LEFT_ALT                          0xE2
+#define HID_KEYBOARD_SC_LEFT_GUI                          0xE3
+#define HID_KEYBOARD_SC_RIGHT_CONTROL                     0xE4
+#define HID_KEYBOARD_SC_RIGHT_SHIFT                       0xE5
+#define HID_KEYBOARD_SC_RIGHT_ALT                         0xE6
+#define HID_KEYBOARD_SC_RIGHT_GUI                         0xE7
+//@}
+
+/** \name Common HID Device Report Descriptors */
+//@{
+/** \hideinitializer
+ *  A list of HID report item array elements that describe a typical HID USB Joystick. The resulting report
+ *  descriptor is structured according to the following layout:
+ *
+ *  \code
+ *  struct
+ *  {
+ *      intB_t X; // Signed X axis value
+ *      intB_t Y; // Signed Y axis value
+ *      s8 Z; // Signed Z axis value
+ *      // Additional axis elements here
+ *      uintA_t Buttons; // Pressed buttons bitmask
+ *  } Joystick_Report;
+ *  \endcode
+ *
+ *  Where \c uintA_t is a type large enough to hold one bit per button, and \c intB_t is a type large enough to hold the
+ *  ranges of the signed \c MinAxisVal and \c MaxAxisVal values.
+ *
+ *  \param[in] NumAxis         Number of axis in the joystick (8-bit)
+ *  \param[in] MinAxisVal      Minimum logical axis value (16-bit).
+ *  \param[in] MaxAxisVal      Maximum logical axis value (16-bit).
+ *  \param[in] MinPhysicalVal  Minimum physical axis value, for movement resolution calculations (16-bit).
+ *  \param[in] MaxPhysicalVal  Maximum physical axis value, for movement resolution calculations (16-bit).
+ *  \param[in] Buttons         Total number of buttons in the device (8-bit).
+ */
+#define HID_DESCRIPTOR_JOYSTICK(NumAxis, MinAxisVal, MaxAxisVal, MinPhysicalVal, MaxPhysicalVal, Buttons) \
+	HID_RI_USAGE_PAGE(8, 0x01),                     \
+	HID_RI_USAGE(8, 0x04),                          \
+	HID_RI_COLLECTION(8, 0x01),                     \
+		HID_RI_USAGE(8, 0x01),                      \
+		HID_RI_COLLECTION(8, 0x00),                 \
+			HID_RI_USAGE_MINIMUM(8, 0x30),          \
+			HID_RI_USAGE_MAXIMUM(8, (0x30 + (NumAxis - 1))), \
+			HID_RI_LOGICAL_MINIMUM(16, MinAxisVal), \
+			HID_RI_LOGICAL_MAXIMUM(16, MaxAxisVal), \
+			HID_RI_PHYSICAL_MINIMUM(16, MinPhysicalVal), \
+			HID_RI_PHYSICAL_MAXIMUM(16, MaxPhysicalVal), \
+			HID_RI_REPORT_COUNT(8, NumAxis),        \
+			HID_RI_REPORT_SIZE(8, ((((MinAxisVal >= -0xFF) && (MaxAxisVal <= 0xFF)) ? 8 : 16))), \
+			HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), \
+		HID_RI_END_COLLECTION(0),                   \
+		HID_RI_USAGE_PAGE(8, 0x09),                 \
+		HID_RI_USAGE_MINIMUM(8, 0x01),              \
+		HID_RI_USAGE_MAXIMUM(8, Buttons),           \
+		HID_RI_LOGICAL_MINIMUM(8, 0x00),            \
+		HID_RI_LOGICAL_MAXIMUM(8, 0x01),            \
+		HID_RI_REPORT_SIZE(8, 0x01),                \
+		HID_RI_REPORT_COUNT(8, Buttons),            \
+		HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), \
+		HID_RI_REPORT_SIZE(8, (8 - (Buttons % 8))), \
+		HID_RI_REPORT_COUNT(8, 0x01),               \
+		HID_RI_INPUT(8, HID_IOF_CONSTANT),          \
+	HID_RI_END_COLLECTION(0)
+
+/** \hideinitializer
+ *  A list of HID report item array elements that describe a typical HID USB keyboard. The resulting report descriptor
+ *  is compatible with \ref USB_KeyboardReport_Data_t when \c MaxKeys is equal to 6. For other values, the report will
+ *  be structured according to the following layout:
+ *
+ *  \code
+ *  struct
+ *  {
+ *      u8 Modifier; // Keyboard modifier byte indicating pressed modifier keys (\c HID_KEYBOARD_MODIFER_* masks)
+ *      u8 Reserved; // Reserved for OEM use, always set to 0.
+ *      u8 KeyCode[MaxKeys]; // Length determined by the number of keys that can be reported
+ *  } Keyboard_Report;
+ *  \endcode
+ *
+ *  \param[in] MaxKeys  Number of simultaneous keys that can be reported at the one time (8-bit).
+ */
+#define HID_DESCRIPTOR_KEYBOARD(MaxKeys)            \
+	HID_RI_USAGE_PAGE(8, 0x01),                     \
+	HID_RI_USAGE(8, 0x06),                          \
+	HID_RI_COLLECTION(8, 0x01),                     \
+		HID_RI_USAGE_PAGE(8, 0x07),                 \
+		HID_RI_USAGE_MINIMUM(8, 0xE0),              \
+		HID_RI_USAGE_MAXIMUM(8, 0xE7),              \
+		HID_RI_LOGICAL_MINIMUM(8, 0x00),            \
+		HID_RI_LOGICAL_MAXIMUM(8, 0x01),            \
+		HID_RI_REPORT_COUNT(8, 0x08),               \
+		HID_RI_REPORT_SIZE(8, 0x01),                \
+		HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), \
+		HID_RI_INPUT(8, HID_IOF_CONSTANT | HID_IOF_VARIABLE), \
+		HID_RI_REPORT_COUNT(8, 0x05),               \
+		HID_RI_USAGE_PAGE(8, 0x08),                 \
+		HID_RI_USAGE_MINIMUM(8, 0x01),              \
+		HID_RI_USAGE_MAXIMUM(8, 0x05),              \
+		HID_RI_OUTPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE | HID_IOF_NON_VOLATILE), \
+		HID_RI_REPORT_COUNT(8, 0x01),               \
+		HID_RI_REPORT_SIZE(8, 0x03),                \
+		HID_RI_OUTPUT(8, HID_IOF_CONSTANT),         \
+		HID_RI_REPORT_COUNT(8, 0x06),               \
+		HID_RI_REPORT_SIZE(8, 0x08),                \
+		HID_RI_LOGICAL_MINIMUM(8, 0x00),            \
+		0x26,0xa4,0x00,								\
+		HID_RI_USAGE_PAGE(8, 0x07),                 \
+		HID_RI_USAGE_MINIMUM(8, 0x00),              \
+		0x2a,0xa4,0x00,								\
+		HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_ARRAY | HID_IOF_ABSOLUTE), \
+	HID_RI_END_COLLECTION(0)
+
+	////////////////////////////////////////////////////////
+	//HID_RI_LOGICAL_MAXIMUM(8, 0x00a4): 0x2a,0xa4,0x00
+	//HID_RI_USAGE_MAXIMUM(8, 0x00a4): 0x2a,0xa4,0x00
+	///////////////////////////////////////////////////////
+
+
+/** \hideinitializer
+ *  A list of HID report item array elements that describe a typical HID USB mouse. The resulting report descriptor
+ *  is compatible with \ref USB_MouseReport_Data_t if the \c MinAxisVal and \c MaxAxisVal values fit within a \c s8 range
+ *  and the number of Buttons is less than 8. For other values, the report is structured according to the following layout:
+ *
+ *  \code
+ *  struct
+ *  {
+ *      uintA_t Buttons; // Pressed buttons bitmask
+ *      intB_t X; // X axis value
+ *      intB_t Y; // Y axis value
+ *  } Mouse_Report;
+ *  \endcode
+ *
+ *  Where \c intA_t is a type large enough to hold one bit per button, and \c intB_t is a type large enough to hold the
+ *  ranges of the signed \c MinAxisVal and \c MaxAxisVal values.
+ *
+ *  \param[in] MinAxisVal      Minimum X/Y logical axis value (16-bit).
+ *  \param[in] MaxAxisVal      Maximum X/Y logical axis value (16-bit).
+ *  \param[in] MinPhysicalVal  Minimum X/Y physical axis value, for movement resolution calculations (16-bit).
+ *  \param[in] MaxPhysicalVal  Maximum X/Y physical axis value, for movement resolution calculations (16-bit).
+ *  \param[in] Buttons         Total number of buttons in the device (8-bit).
+ *  \param[in] AbsoluteCoords  Boolean \c true to use absolute X/Y coordinates (e.g. touchscreen).
+ */
+#define HID_DESCRIPTOR_MOUSE(MinAxisVal, MaxAxisVal, MinPhysicalVal, MaxPhysicalVal, Buttons, AbsoluteCoords) \
+	HID_RI_USAGE_PAGE(8, 0x01),                     \
+	HID_RI_USAGE(8, 0x02),                          \
+	HID_RI_COLLECTION(8, 0x01),                     \
+		HID_RI_USAGE(8, 0x01),                      \
+		HID_RI_COLLECTION(8, 0x00),                 \
+			HID_RI_USAGE_PAGE(8, 0x09),             \
+			HID_RI_USAGE_MINIMUM(8, 0x01),          \
+			HID_RI_USAGE_MAXIMUM(8, Buttons),       \
+			HID_RI_LOGICAL_MINIMUM(8, 0x00),        \
+			HID_RI_LOGICAL_MAXIMUM(8, 0x01),        \
+			HID_RI_REPORT_COUNT(8, Buttons),        \
+			HID_RI_REPORT_SIZE(8, 0x01),            \
+			HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), \
+			HID_RI_REPORT_COUNT(8, 0x01),           \
+			HID_RI_REPORT_SIZE(8, (8 - (Buttons % 8))), \
+			HID_RI_INPUT(8, HID_IOF_CONSTANT),      \
+			HID_RI_USAGE_PAGE(8, 0x01),             \
+			HID_RI_USAGE(8, 0x30),                  \
+			HID_RI_USAGE(8, 0x31),                  \
+			HID_RI_LOGICAL_MINIMUM(16, MinAxisVal), \
+			HID_RI_LOGICAL_MAXIMUM(16, MaxAxisVal), \
+			HID_RI_PHYSICAL_MINIMUM(16, MinPhysicalVal), \
+			HID_RI_PHYSICAL_MAXIMUM(16, MaxPhysicalVal), \
+			HID_RI_REPORT_COUNT(8, 0x02),           \
+			HID_RI_REPORT_SIZE(8, ((((MinAxisVal >= -0xFF) && (MaxAxisVal <= 0xFF)) ? 8 : 16))), \
+			HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | (AbsoluteCoords ? HID_IOF_ABSOLUTE : HID_IOF_RELATIVE)), \
+		HID_RI_END_COLLECTION(0),                   \
+	HID_RI_END_COLLECTION(0)
+
+/** \hideinitializer
+ *  A list of HID report item array elements that describe a typical Vendor Defined byte array HID report descriptor,
+ *  used for transporting arbitrary data between the USB host and device via HID reports. The resulting report should be
+ *  a \c u8 byte array of the specified length in both Device to Host (IN) and Host to Device (OUT) directions.
+ *
+ *  \param[in] VendorPageNum    Vendor Defined HID Usage Page index, ranging from 0x00 to 0xFF.
+ *  \param[in] CollectionUsage  Vendor Usage for the encompassing report IN and OUT collection, ranging from 0x00 to 0xFF.
+ *  \param[in] DataINUsage      Vendor Usage for the IN report data, ranging from 0x00 to 0xFF.
+ *  \param[in] DataOUTUsage     Vendor Usage for the OUT report data, ranging from 0x00 to 0xFF.
+ *  \param[in] NumBytes         Length of the data IN and OUT reports.
+ */
+#define HID_DESCRIPTOR_VENDOR(VendorPageNum, CollectionUsage, DataINUsage, DataOUTUsage, NumBytes) \
+	HID_RI_USAGE_PAGE(16, (0xFF00 | VendorPageNum)), \
+	HID_RI_USAGE(8, CollectionUsage),           \
+	HID_RI_COLLECTION(8, 0x01),                 \
+		HID_RI_USAGE(8, DataINUsage),           \
+		HID_RI_LOGICAL_MINIMUM(8, 0x00),        \
+		HID_RI_LOGICAL_MAXIMUM(8, 0xFF),        \
+		HID_RI_REPORT_SIZE(8, 0x08),            \
+		HID_RI_REPORT_COUNT(8, NumBytes),       \
+		HID_RI_INPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE), \
+		HID_RI_USAGE(8, DataOUTUsage),          \
+		HID_RI_LOGICAL_MINIMUM(8, 0x00),        \
+		HID_RI_LOGICAL_MAXIMUM(8, 0xFF),        \
+		HID_RI_REPORT_SIZE(8, 0x08),            \
+		HID_RI_REPORT_COUNT(8, NumBytes),       \
+		HID_RI_OUTPUT(8, HID_IOF_DATA | HID_IOF_VARIABLE | HID_IOF_ABSOLUTE | HID_IOF_NON_VOLATILE), \
+	HID_RI_END_COLLECTION(0)
+//@}
+
+/* Type Defines: */
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors relating to the HID
+ *  device class.
+ */
+enum HID_Descriptor_ClassSubclassProtocol_t
+{
+	HID_CSCP_HIDClass             = 0x03, /**< Descriptor Class value indicating that the device or interface
+	                                       *   belongs to the HID class.
+	                                       */
+	HID_CSCP_NonBootSubclass      = 0x00, /**< Descriptor Subclass value indicating that the device or interface
+	                                       *   does not implement a HID boot protocol.
+	                                       */
+	HID_CSCP_BootSubclass         = 0x01, /**< Descriptor Subclass value indicating that the device or interface
+	                                       *   implements a HID boot protocol.
+	                                       */
+	HID_CSCP_NonBootProtocol      = 0x00, /**< Descriptor Protocol value indicating that the device or interface
+	                                       *   does not belong to a HID boot protocol.
+	                                       */
+	HID_CSCP_KeyboardBootProtocol = 0x01, /**< Descriptor Protocol value indicating that the device or interface
+	                                       *   belongs to the Keyboard HID boot protocol.
+	                                       */
+	HID_CSCP_MouseBootProtocol    = 0x02, /**< Descriptor Protocol value indicating that the device or interface
+	                                       *   belongs to the Mouse HID boot protocol.
+	                                       */
+};
+
+/** Enum for the HID class specific control requests that can be issued by the USB bus host. */
+enum HID_ClassRequests_t
+{
+	HID_REQ_GetReport       = 0x01, /**< HID class-specific Request to get the current HID report from the device. */
+	HID_REQ_GetIdle         = 0x02, /**< HID class-specific Request to get the current device idle count. */
+	HID_REQ_GetProtocol     = 0x03, /**< HID class-specific Request to get the current HID report protocol mode. */
+	HID_REQ_SetReport       = 0x09, /**< HID class-specific Request to set the current HID report to the device. */
+	HID_REQ_SetIdle         = 0x0A, /**< HID class-specific Request to set the device's idle count. */
+	HID_REQ_SetProtocol     = 0x0B, /**< HID class-specific Request to set the current HID report protocol mode. */
+};
+
+/** Enum for the HID class specific descriptor types. */
+enum HID_DescriptorTypes_t
+{
+	HID_DTYPE_HID           = 0x21, /**< Descriptor header type value, to indicate a HID class HID descriptor. */
+	HID_DTYPE_Report        = 0x22, /**< Descriptor header type value, to indicate a HID class HID report descriptor. */
+	HID_DTYPE_Physical		= 0x23,
+};
+
+/** Enum for the different types of HID reports. */
+enum HID_ReportItemTypes_t
+{
+	HID_REPORT_ITEM_In      = 0, /**< Indicates that the item is an IN report type. */
+	HID_REPORT_ITEM_Out     = 1, /**< Indicates that the item is an OUT report type. */
+	HID_REPORT_ITEM_Feature = 2, /**< Indicates that the item is a FEATURE report type. */
+	HID_REPORT_CUSTOM 		= 3,
+};
+
+/** \brief HID class-specific HID Descriptor (LUFA naming conventions).
+ *
+ *  Type define for the HID class-specific HID descriptor, to describe the HID device's specifications. Refer to the HID
+ *  specification for details on the structure elements.
+ *
+ *  \see \ref USB_HID_StdDescriptor_HID_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Regular descriptor header containing the descriptor's type and length. */
+
+	u16                HIDSpec; /**< BCD encoded version that the HID descriptor and device complies to. */
+	u8                 CountryCode; /**< Country code of the localized device, or zero if universal. */
+
+	u8                 TotalReportDescriptors; /**< Total number of HID report descriptors for the interface. */
+
+	u8                 HIDReportType; /**< Type of HID report, set to \ref HID_DTYPE_Report. */
+	u8                 HIDReportLength[2]; /**< Length of the associated HID report descriptor, in bytes. */
+}USB_HID_Descriptor_HID_t;
+
+/** \brief HID class-specific HID Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for the HID class-specific HID descriptor, to describe the HID device's specifications. Refer to the HID
+ *  specification for details on the structure elements.
+ *
+ *  \see \ref USB_HID_Descriptor_HID_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                           *   given by the specific class.
+	                           */
+
+	u16 bcdHID; /**< BCD encoded version that the HID descriptor and device complies to. */
+	u8  bCountryCode; /**< Country code of the localized device, or zero if universal. */
+
+	u8  bNumDescriptors; /**< Total number of HID report descriptors for the interface. */
+
+	u8  bDescriptorType2; /**< Type of HID report, set to \ref HID_DTYPE_Report. */
+	u8  wDescriptorLength[2]; /**< Length of the associated HID report descriptor, in bytes. */
+}USB_HID_StdDescriptor_HID_t;
+
+/** \brief Standard HID Boot Protocol Mouse Report.
+ *
+ *  Type define for a standard Boot Protocol Mouse report
+ */
+typedef struct
+{
+	u8 Button; /**< Button mask for currently pressed buttons in the mouse. */
+	s8  X; /**< Current delta X movement of the mouse. */
+	s8  Y; /**< Current delta Y movement on the mouse. */
+}USB_MouseReport_Data_t;
+
+/** \brief Standard HID Boot Protocol Keyboard Report.
+ *
+ *  Type define for a standard Boot Protocol Keyboard report
+ */
+typedef struct
+{
+	u8 Modifier; /**< Keyboard modifier byte, indicating pressed modifier keys (a combination of
+	                   *   \c HID_KEYBOARD_MODIFER_* masks).
+	                   */
+	u8 Reserved; /**< Reserved for OEM use, always set to 0. */
+	u8 KeyCode[6]; /**< Key codes of the currently pressed keys. */
+}USB_KeyboardReport_Data_t;
+
+/** Type define for the data type used to store HID report descriptor elements. */
+typedef u8 USB_Descriptor_HIDReport_Datatype_t;
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassDevice.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassDevice.h
new file mode 100644
index 00000000..b2ff9688
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDClassDevice.h
@@ -0,0 +1,99 @@
+/********************************************************************************************************
+ * @file    HIDClassDevice.h
+ *
+ * @brief   This is the header file for HIDClassDevice
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	extern "C" {
+#endif
+
+/* Public Interface - May be used in end-application: */
+/* Type Defines: */
+/** \brief HID Class Device Mode Configuration and State Structure.
+ *
+ *  Class state structure. An instance of this structure should be made for each HID interface
+ *  within the user application, and passed to each of the HID class driver functions as the
+ *  \c HIDInterfaceInfo parameter. This stores each HID interface's configuration and state information.
+ *
+ *  \note Due to technical limitations, the HID device class driver does not utilize a separate OUT
+ *        endpoint for host->device communications. Instead, the host->device data (if any) is sent to
+ *        the device via the control endpoint.
+ */
+typedef struct usbhid_config_t
+{
+	u8  InterfaceNumber; /**< Interface number of the HID interface within the device. */
+
+	u8  ReportINEndpointNumber; /**< Endpoint number of the HID interface's IN report endpoint. */
+	u16 ReportINEndpointSize; /**< Size in bytes of the HID interface's IN report endpoint. */
+	bool ReportINEndpointDoubleBank; /**< Indicates if the HID interface's IN report endpoint should use double banking. */
+
+	void* PrevReportINBuffer; /**< Pointer to a buffer where the previously created HID input report can be
+	                              *  stored by the driver, for comparison purposes to detect report changes that
+	                              *  must be sent immediately to the host. This should point to a buffer big enough
+	                              *  to hold the largest HID input report sent from the HID interface. If this is set
+								  *  to \c NULL, it is up to the user to force transfers when needed in the
+								  *  \ref CALLBACK_HID_Device_CreateHIDReport() callback function.
+								  *
+								  *  \note Due to the single buffer, the internal driver can only correctly compare
+								  *        subsequent reports with identical report IDs. In multiple report devices,
+								  *        this buffer should be set to \c NULL and the decision to send reports made
+								  *        by the user application instead.
+	                              */
+	u8  PrevReportINBufferSize; /**< Size in bytes of the given input report buffer. This is used to create a
+	                                  *  second buffer of the same size within the driver so that subsequent reports
+	                                  *  can be compared. If the user app is to determine when reports are to be sent
+	                                  *  exclusively (i.e. \ref PrevReportINBuffer is \c NULL) this value must still be
+									  *  set to the size of the largest report the device can issue to the host.
+	                                  */
+} usbhid_config_t; /**< Config data for the USB class interface within the device. All elements in this section
+           *   <b>must</b> be set or the interface will fail to enumerate and operate correctly.
+           */
+typedef struct usbhid_state_t
+{
+	bool UsingReportProtocol; /**< Indicates if the HID interface is set to Boot or Report proto mode. */
+	u16 PrevFrameNum; /**< Frame number of the previous HID report packet opportunity. */
+	u16 IdleCount; /**< Report idle period, in milliseconds, set by the host. */
+	u16 IdleMSRemaining; /**< Total number of milliseconds remaining before the idle period elapsed - this
+							   *   should be decremented by the user application if non-zero each millisecond. */
+} usbhid_state_t; /**< State data for the USB class interface within the device. All elements in this section
+          *   are reset to their defaults when the interface is enumerated.
+          */
+typedef struct
+{
+	
+} USB_ClassInfo_HID_Device_t;
+
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDReportData.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDReportData.h
new file mode 100644
index 00000000..ac49ebbb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/HIDReportData.h
@@ -0,0 +1,100 @@
+/********************************************************************************************************
+ * @file    HIDReportData.h
+ *
+ * @brief   This is the header file for HIDReportData
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Private Interface - For use in library only: */
+#if !defined(__DOXYGEN__)
+/* Macros: */
+#define HID_RI_DATA_SIZE_MASK                   0x03
+#define HID_RI_TYPE_MASK                        0x0C
+#define HID_RI_TAG_MASK                         0xF0
+
+#define HID_RI_TYPE_MAIN                        0x00
+#define HID_RI_TYPE_GLOBAL                      0x04
+#define HID_RI_TYPE_LOCAL                       0x08
+
+#define HID_RI_DATA_BITS_0                      0x00
+#define HID_RI_DATA_BITS_8                      0x01
+#define HID_RI_DATA_BITS_16                     0x02
+#define HID_RI_DATA_BITS_32                     0x03
+#define HID_RI_DATA_BITS(DataBits)              HID_RI_DATA_BITS_ ## DataBits
+
+#define _HID_RI_ENCODE_0(Data)
+#define _HID_RI_ENCODE_8(Data)                  , (Data & 0xFF)
+#define _HID_RI_ENCODE_16(Data)                 _HID_RI_ENCODE_8(Data)  _HID_RI_ENCODE_8(Data >> 8)
+#define _HID_RI_ENCODE_32(Data)                 _HID_RI_ENCODE_16(Data) _HID_RI_ENCODE_16(Data >> 16)
+#define _HID_RI_ENCODE(DataBits, ...)           _HID_RI_ENCODE_ ## DataBits(__VA_ARGS__)
+
+#define _HID_RI_ENTRY(Type, Tag, DataBits, ...) (Type | Tag | HID_RI_DATA_BITS(DataBits)) _HID_RI_ENCODE(DataBits, (__VA_ARGS__))
+#endif
+
+/* Public Interface - May be used in end-application: */
+/* Macros: */
+/** \name HID Input, Output and Feature Report Descriptor Item Flags */
+//@{
+#define HID_IOF_CONSTANT                        (1 << 0)
+#define HID_IOF_DATA                            (0 << 0)
+#define HID_IOF_VARIABLE                        (1 << 1)
+#define HID_IOF_ARRAY                           (0 << 1)
+#define HID_IOF_RELATIVE                        (1 << 2)
+#define HID_IOF_ABSOLUTE                        (0 << 2)
+#define HID_IOF_WRAP                            (1 << 3)
+#define HID_IOF_NO_WRAP                         (0 << 3)
+#define HID_IOF_NON_LINEAR                      (1 << 4)
+#define HID_IOF_LINEAR                          (0 << 4)
+#define HID_IOF_NO_PREFERRED_STATE              (1 << 5)
+#define HID_IOF_PREFERRED_STATE                 (0 << 5)
+#define HID_IOF_NULLSTATE                       (1 << 6)
+#define HID_IOF_NO_NULL_POSITION                (0 << 6)
+#define HID_IOF_VOLATILE                        (1 << 7)
+#define HID_IOF_NON_VOLATILE                    (0 << 7)
+#define HID_IOF_BUFFERED_BYTES                  (1 << 8)
+#define HID_IOF_BITFIELD                        (0 << 8)
+//@}
+
+/** \name HID Report Descriptor Item Macros */
+//@{
+#define HID_RI_INPUT(DataBits, ...)             _HID_RI_ENTRY(HID_RI_TYPE_MAIN  , 0x80, DataBits, __VA_ARGS__)
+#define HID_RI_OUTPUT(DataBits, ...)            _HID_RI_ENTRY(HID_RI_TYPE_MAIN  , 0x90, DataBits, __VA_ARGS__)
+#define HID_RI_COLLECTION(DataBits, ...)        _HID_RI_ENTRY(HID_RI_TYPE_MAIN  , 0xA0, DataBits, __VA_ARGS__)
+#define HID_RI_FEATURE(DataBits, ...)           _HID_RI_ENTRY(HID_RI_TYPE_MAIN  , 0xB0, DataBits, __VA_ARGS__)
+#define HID_RI_END_COLLECTION(DataBits, ...)    _HID_RI_ENTRY(HID_RI_TYPE_MAIN  , 0xC0, DataBits, __VA_ARGS__)
+#define HID_RI_USAGE_PAGE(DataBits, ...)        _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x00, DataBits, __VA_ARGS__)
+#define HID_RI_LOGICAL_MINIMUM(DataBits, ...)   _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x10, DataBits, __VA_ARGS__)
+#define HID_RI_LOGICAL_MAXIMUM(DataBits, ...)   _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x20, DataBits, __VA_ARGS__)
+#define HID_RI_PHYSICAL_MINIMUM(DataBits, ...)  _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x30, DataBits, __VA_ARGS__)
+#define HID_RI_PHYSICAL_MAXIMUM(DataBits, ...)  _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x40, DataBits, __VA_ARGS__)
+#define HID_RI_UNIT_EXPONENT(DataBits, ...)     _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x50, DataBits, __VA_ARGS__)
+#define HID_RI_UNIT(DataBits, ...)              _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x60, DataBits, __VA_ARGS__)
+#define HID_RI_REPORT_SIZE(DataBits, ...)       _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x70, DataBits, __VA_ARGS__)
+#define HID_RI_REPORT_ID(DataBits, ...)         _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x80, DataBits, __VA_ARGS__)
+#define HID_RI_REPORT_COUNT(DataBits, ...)      _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0x90, DataBits, __VA_ARGS__)
+#define HID_RI_PUSH(DataBits, ...)              _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0xA0, DataBits, __VA_ARGS__)
+#define HID_RI_POP(DataBits, ...)               _HID_RI_ENTRY(HID_RI_TYPE_GLOBAL, 0xB0, DataBits, __VA_ARGS__)
+#define HID_RI_USAGE(DataBits, ...)             _HID_RI_ENTRY(HID_RI_TYPE_LOCAL , 0x00, DataBits, __VA_ARGS__)
+#define HID_RI_USAGE_MINIMUM(DataBits, ...)     _HID_RI_ENTRY(HID_RI_TYPE_LOCAL , 0x10, DataBits, __VA_ARGS__)
+#define HID_RI_USAGE_MAXIMUM(DataBits, ...)     _HID_RI_ENTRY(HID_RI_TYPE_LOCAL , 0x20, DataBits, __VA_ARGS__)
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/MassStorageClassCommon.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/MassStorageClassCommon.h
new file mode 100644
index 00000000..abaf993b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/MassStorageClassCommon.h
@@ -0,0 +1,338 @@
+/********************************************************************************************************
+ * @file    MassStorageClassCommon.h
+ *
+ * @brief   This is the header file for MassStorageClassCommon
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "StdDescriptors.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+#pragma pack(1)
+
+/* Macros: */
+/** Magic signature for a Command Block Wrapper used in the Mass Storage Bulk-Only transport protocol. */
+#define MS_CBW_SIGNATURE                               0x43425355UL
+
+/** Magic signature for a Command Status Wrapper used in the Mass Storage Bulk-Only transport protocol. */
+#define MS_CSW_SIGNATURE                               0x53425355UL
+
+/** Mask for a Command Block Wrapper's flags attribute to specify a command with data sent from host-to-device. */
+#define MS_COMMAND_DIR_DATA_OUT                        (0 << 7)
+
+/** Mask for a Command Block Wrapper's flags attribute to specify a command with data sent from device-to-host. */
+#define MS_COMMAND_DIR_DATA_IN                         (1 << 7)
+
+/** \name SCSI Commands*/
+//@{
+/** SCSI Command Code for an INQUIRY command. */
+#define SCSI_CMD_INQUIRY                               0x12
+
+/** SCSI Command Code for a REQUEST SENSE command. */
+#define SCSI_CMD_REQUEST_SENSE                         0x03
+
+/** SCSI Command Code for a TEST UNIT READY command. */
+#define SCSI_CMD_TEST_UNIT_READY                       0x00
+
+/** SCSI Command Code for a READ CAPACITY (10) command. */
+#define SCSI_CMD_READ_CAPACITY_10                      0x25
+
+/** SCSI Command Code for a SEND DIAGNOSTIC command. */
+#define SCSI_CMD_SEND_DIAGNOSTIC                       0x1D
+
+/** SCSI Command Code for a PREVENT ALLOW MEDIUM REMOVAL command. */
+#define SCSI_CMD_PREVENT_ALLOW_MEDIUM_REMOVAL          0x1E
+
+/** SCSI Command Code for a WRITE (10) command. */
+#define SCSI_CMD_WRITE_10                              0x2A
+
+/** SCSI Command Code for a READ (10) command. */
+#define SCSI_CMD_READ_10                               0x28
+
+/** SCSI Command Code for a WRITE (6) command. */
+#define SCSI_CMD_WRITE_6                               0x0A
+
+/** SCSI Command Code for a READ (6) command. */
+#define SCSI_CMD_READ_6                                0x08
+
+/** SCSI Command Code for a VERIFY (10) command. */
+#define SCSI_CMD_VERIFY_10                             0x2F
+
+/** SCSI Command Code for a MODE SENSE (6) command. */
+#define SCSI_CMD_MODE_SENSE_6                          0x1A
+
+/** SCSI Command Code for a MODE SENSE (10) command. */
+#define SCSI_CMD_MODE_SENSE_10                         0x5A
+//@}
+
+/** \name SCSI Sense Key Values */
+//@{
+/** SCSI Sense Code to indicate no error has occurred. */
+#define SCSI_SENSE_KEY_GOOD                            0x00
+
+/** SCSI Sense Code to indicate that the device has recovered from an error. */
+#define SCSI_SENSE_KEY_RECOVERED_ERROR                 0x01
+
+/** SCSI Sense Code to indicate that the device is not ready for a new command. */
+#define SCSI_SENSE_KEY_NOT_READY                       0x02
+
+/** SCSI Sense Code to indicate an error whilst accessing the medium. */
+#define SCSI_SENSE_KEY_MEDIUM_ERROR                    0x03
+
+/** SCSI Sense Code to indicate a hardware error has occurred. */
+#define SCSI_SENSE_KEY_HARDWARE_ERROR                  0x04
+
+/** SCSI Sense Code to indicate that an illegal request has been issued. */
+#define SCSI_SENSE_KEY_ILLEGAL_REQUEST                 0x05
+
+/** SCSI Sense Code to indicate that the unit requires attention from the host to indicate
+ *  a reset event, medium removal or other condition.
+ */
+#define SCSI_SENSE_KEY_UNIT_ATTENTION                  0x06
+
+/** SCSI Sense Code to indicate that a write attempt on a protected block has been made. */
+#define SCSI_SENSE_KEY_DATA_PROTECT                    0x07
+
+/** SCSI Sense Code to indicate an error while trying to write to a write-once medium. */
+#define SCSI_SENSE_KEY_BLANK_CHECK                     0x08
+
+/** SCSI Sense Code to indicate a vendor specific error has occurred. */
+#define SCSI_SENSE_KEY_VENDOR_SPECIFIC                 0x09
+
+/** SCSI Sense Code to indicate that an EXTENDED COPY command has aborted due to an error. */
+#define SCSI_SENSE_KEY_COPY_ABORTED                    0x0A
+
+/** SCSI Sense Code to indicate that the device has aborted the issued command. */
+#define SCSI_SENSE_KEY_ABORTED_COMMAND                 0x0B
+
+/** SCSI Sense Code to indicate an attempt to write past the end of a partition has been made. */
+#define SCSI_SENSE_KEY_VOLUME_OVERFLOW                 0x0D
+
+/** SCSI Sense Code to indicate that the source data did not match the data read from the medium. */
+#define SCSI_SENSE_KEY_MISCOMPARE                      0x0E
+//@}
+
+/** \name SCSI Additional Sense Codes */
+//@{
+/** SCSI Additional Sense Code to indicate no additional sense information is available. */
+#define SCSI_ASENSE_NO_ADDITIONAL_INFORMATION          0x00
+
+/** SCSI Additional Sense Code to indicate that the logical unit (LUN) addressed is not ready. */
+#define SCSI_ASENSE_LOGICAL_UNIT_NOT_READY             0x04
+
+/** SCSI Additional Sense Code to indicate an invalid field was encountered while processing the issued command. */
+#define SCSI_ASENSE_INVALID_FIELD_IN_CDB               0x24
+
+/** SCSI Additional Sense Code to indicate that a medium that was previously indicated as not ready has now
+ *  become ready for use.
+ */
+#define SCSI_ASENSE_NOT_READY_TO_READY_CHANGE          0x28
+
+/** SCSI Additional Sense Code to indicate that an attempt to write to a protected area was made. */
+#define SCSI_ASENSE_WRITE_PROTECTED                    0x27
+
+/** SCSI Additional Sense Code to indicate an error whilst formatting the device medium. */
+#define SCSI_ASENSE_FORMAT_ERROR                       0x31
+
+/** SCSI Additional Sense Code to indicate an invalid command was issued. */
+#define SCSI_ASENSE_INVALID_COMMAND                    0x20
+
+/** SCSI Additional Sense Code to indicate a write to a block out outside of the medium's range was issued. */
+#define SCSI_ASENSE_LOGICAL_BLOCK_ADDRESS_OUT_OF_RANGE 0x21
+
+/** SCSI Additional Sense Code to indicate that no removable medium is inserted into the device. */
+#define SCSI_ASENSE_MEDIUM_NOT_PRESENT                 0x3A
+//@}
+
+/** \name SCSI Additional Sense Key Code Qualifiers */
+//@{
+/** SCSI Additional Sense Qualifier Code to indicate no additional sense qualifier information is available. */
+#define SCSI_ASENSEQ_NO_QUALIFIER                      0x00
+
+/** SCSI Additional Sense Qualifier Code to indicate that a medium format command failed to complete. */
+#define SCSI_ASENSEQ_FORMAT_COMMAND_FAILED             0x01
+
+/** SCSI Additional Sense Qualifier Code to indicate that an initializing command must be issued before the issued
+ *  command can be executed.
+ */
+#define SCSI_ASENSEQ_INITIALIZING_COMMAND_REQUIRED     0x02
+
+/** SCSI Additional Sense Qualifier Code to indicate that an operation is currently in progress. */
+#define SCSI_ASENSEQ_OPERATION_IN_PROGRESS             0x07
+//@}
+
+/* Enums: */
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors relating to the Mass
+ *  Storage device class.
+ */
+enum MS_Descriptor_ClassSubclassProtocol_t
+{
+	MS_CSCP_MassStorageClass          = 0x08, /**< Descriptor Class value indicating that the device or interface
+	                                           *   belongs to the Mass Storage class.
+	                                           */
+	MS_CSCP_SCSITransparentSubclass   = 0x06, /**< Descriptor Subclass value indicating that the device or interface
+	                                           *   belongs to the SCSI Transparent Command Set subclass of the Mass
+	                                           *   storage class.
+	                                           */
+	MS_CSCP_BulkOnlyTransportProtocol = 0x50, /**< Descriptor Protocol value indicating that the device or interface
+	                                           *   belongs to the Bulk Only Transport protocol of the Mass Storage class.
+	                                           */
+};
+
+/** Enum for the Mass Storage class specific control requests that can be issued by the USB bus host. */
+enum MS_ClassRequests_t
+{
+	MS_REQ_GetMaxLUN                  = 0xFE, /**< Mass Storage class-specific request to retrieve the total number of Logical
+	                                           *   Units (drives) in the SCSI device.
+	                                           */
+	MS_REQ_MassStorageReset           = 0xFF, /**< Mass Storage class-specific request to reset the Mass Storage interface,
+	                                           *   ready for the next command.
+                                               */
+};
+
+/** Enum for the possible command status wrapper return status codes. */
+enum MS_CommandStatusCodes_t
+{
+	MS_SCSI_COMMAND_Pass              = 0, /**< Command completed with no error */
+	MS_SCSI_COMMAND_Fail              = 1, /**< Command failed to complete - host may check the exact error via a
+	                                        *   SCSI REQUEST SENSE command.
+	                                        */
+	MS_SCSI_COMMAND_PhaseError        = 2, /**< Command failed due to being invalid in the current phase. */
+};
+
+/* Type Defines: */
+/** \brief Mass Storage Class Command Block Wrapper.
+ *
+ *  Type define for a Command Block Wrapper, used in the Mass Storage Bulk-Only Transport protocol.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u32 Signature; /**< Command block signature, must be \ref MS_CBW_SIGNATURE to indicate a valid Command Block. */
+	u32 Tag; /**< Unique command ID value, to associate a command block wrapper with its command status wrapper. */
+	u32 DataTransferLength; /**< Length of the optional data portion of the issued command, in bytes. */
+	u8  Flags; /**< Command block flags, indicating command data direction. */
+	u8  LUN; /**< Logical Unit number this command is issued to. */
+	u8  SCSICommandLength; /**< Length of the issued SCSI command within the SCSI command data array. */
+	u8  SCSICommandData[16]; /**< Issued SCSI command in the Command Block. */
+}  MS_CommandBlockWrapper_t;
+
+/** \brief Mass Storage Class Command Status Wrapper.
+ *
+ *  Type define for a Command Status Wrapper, used in the Mass Storage Bulk-Only Transport protocol.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u32 Signature; /**< Status block signature, must be \ref MS_CSW_SIGNATURE to indicate a valid Command Status. */
+	u32 Tag; /**< Unique command ID value, to associate a command block wrapper with its command status wrapper. */
+	u32 DataTransferResidue; /**< Number of bytes of data not processed in the SCSI command. */
+	u8  Status; /**< Status code of the issued command - a value from the \ref MS_CommandStatusCodes_t enum. */
+}  MS_CommandStatusWrapper_t;
+
+/** \brief Mass Storage Class SCSI Sense Structure
+ *
+ *  Type define for a SCSI Sense structure. Structures of this type are filled out by the
+ *  device via the \ref MS_Host_RequestSense() function, indicating the current sense data of the
+ *  device (giving explicit error codes for the last issued command). For details of the
+ *  structure contents, refer to the SCSI specifications.
+ */
+typedef struct
+{
+	u8  ResponseCode;
+
+	u8  SegmentNumber;
+
+	u8 SenseKey            : 4;
+	u8 Reserved            : 1;
+	u8 ILI                 : 1;
+	u8 EOM                 : 1;
+	u8 FileMark            : 1;
+
+	u8  Information[4];
+	u8  AdditionalLength;
+	u8  CmdSpecificInformation[4];
+	u8  AdditionalSenseCode;
+	u8  AdditionalSenseQualifier;
+	u8  FieldReplaceableUnitCode;
+	u8  SenseKeySpecific[3];
+} SCSI_Request_Sense_Response_t;
+
+/** \brief Mass Storage Class SCSI Inquiry Structure.
+ *
+ *  Type define for a SCSI Inquiry structure. Structures of this type are filled out by the
+ *  device via the \ref MS_Host_GetInquiryData() function, retrieving the attached device's
+ *  information.
+ *
+ *  For details of the structure contents, refer to the SCSI specifications.
+ */
+typedef struct
+{
+	u8 DeviceType          : 5;
+	u8 PeripheralQualifier : 3;
+
+	u8 Reserved            : 7;
+	u8 Removable           : 1;
+
+	u8  Version;
+
+	u8 ResponseDataFormat  : 4;
+	u8 Reserved2           : 1;
+	u8 NormACA             : 1;
+	u8 TrmTsk              : 1;
+	u8 AERC                : 1;
+
+	u8  AdditionalLength;
+	u8  Reserved3[2];
+
+	u8 SoftReset           : 1;
+	u8 CmdQue              : 1;
+	u8 Reserved4           : 1;
+	u8 Linked              : 1;
+	u8 Sync                : 1;
+	u8 WideBus16Bit        : 1;
+	u8 WideBus32Bit        : 1;
+	u8 RelAddr             : 1;
+
+	u8  VendorID[8];
+	u8  ProductID[16];
+	u8  RevisionID[4];
+} SCSI_Inquiry_Response_t;
+
+#pragma pack()
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/PrinterClassCommon.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/PrinterClassCommon.h
new file mode 100644
index 00000000..e0ac8e8c
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/PrinterClassCommon.h
@@ -0,0 +1,87 @@
+/********************************************************************************************************
+ * @file    PrinterClassCommon.h
+ *
+ * @brief   This is the header file for PrinterClassCommon
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+#include "bit.h"
+	
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	extern "C" {
+#endif
+	
+
+/* Macros: */
+/** \name Virtual Printer Status Line Masks */
+//@{
+/** Port status mask for a printer device, indicating that an error has *not* occurred. */
+#define PRNT_PORTSTATUS_NOTERROR	BIT(3)
+
+/** Port status mask for a printer device, indicating that the device is currently selected. */
+#define PRNT_PORTSTATUS_SELECT		BIT(4)
+
+/** Port status mask for a printer device, indicating that the device is currently out of paper. */
+#define PRNT_PORTSTATUS_PAPEREMPTY	BIT(5)
+//@}
+
+/* Enums: */
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors relating to the Printer
+ *	device class.
+ */
+enum PRNT_Descriptor_ClassSubclassProtocol_t
+{
+	PRNT_CSCP_PrinterClass			= 0x07, /**< Descriptor Class value indicating that the device or interface
+											 *	 belongs to the Printer class.
+											 */
+	PRNT_CSCP_PrinterSubclass		= 0x01, /**< Descriptor Subclass value indicating that the device or interface
+											 *	 belongs to the Printer subclass.
+											 */
+	PRNT_CSCP_BidirectionalProtocol = 0x02, /**< Descriptor Protocol value indicating that the device or interface
+											 *	 belongs to the Bidirectional proto of the Printer class.
+											 */
+};
+
+/** Enum for the Printer class specific control requests that can be issued by the USB bus host. */
+enum PRNT_ClassRequests_t
+{
+	PRNT_REQ_GetDeviceID			= 0x00, /**< Printer class-specific request to retrieve the Unicode ID
+											 *	 string of the device, containing the device's name, manufacturer
+											 *	 and supported printer languages.
+											 */
+	PRNT_REQ_GetPortStatus			= 0x01, /**< Printer class-specific request to get the current status of the
+											 *	 virtual printer port, for device selection and ready states.
+											 */
+	PRNT_REQ_SoftReset				= 0x02, /**< Printer class-specific request to reset the device, ready for new
+											 *	 printer commands.
+											 */
+};
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdDescriptors.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdDescriptors.h
new file mode 100644
index 00000000..1711cd32
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdDescriptors.h
@@ -0,0 +1,698 @@
+/********************************************************************************************************
+ * @file    StdDescriptors.h
+ *
+ * @brief   This is the header file for StdDescriptors
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	extern "C" {
+#endif
+
+/* Public Interface - May be used in end-application: */
+/* Macros: */
+/** Indicates that a given descriptor does not exist in the device. This can be used inside descriptors
+ *  for string descriptor indexes, or may be use as a return value for GetDescriptor when the specified
+ *  descriptor does not exist.
+ */
+#define NO_DESCRIPTOR                     0
+
+/** Macro to calculate the power value for the configuration descriptor, from a given number of milliamperes.
+ *
+ *  \param[in] mA  Maximum number of milliamps the device consumes when the given configuration is selected.
+ */
+#define USB_CONFIG_POWER_MA(mA)           ((mA) >> 1)
+
+/** Macro to calculate the Unicode length of a string with a given number of Unicode characters.
+ *  Should be used in string descriptor's headers for giving the string descriptor's byte length.
+ *
+ *  \param[in] UnicodeChars  Number of Unicode characters in the string text.
+ */
+#define USB_STRING_LEN(UnicodeChars)      (sizeof(USB_Descriptor_Header_t) + ((UnicodeChars) << 1))
+
+/** String language ID for the English language. Should be used in \ref USB_Descriptor_String_t descriptors
+ *  to indicate that the English language is supported by the device in its string descriptors.
+ */
+#define LANGUAGE_ID_ENG                   0x0409
+
+/** \name USB Configuration Descriptor Attribute Masks */
+//@{
+/** Mask for the reserved bit in the Configuration Descriptor's \c ConfigAttributes field, which must be set on all
+ *  devices for historial purposes.
+ */
+#define USB_CONFIG_ATTR_RESERVED          0x80
+/** Can be masked with other configuration descriptor attributes for a \ref USB_Descriptor_Configuration_Header_t
+ *  descriptor's \c ConfigAttributes value to indicate that the specified configuration can draw its power
+ *  from the device's own power source.
+ */
+#define USB_CONFIG_ATTR_SELFPOWERED       0x40
+
+/** Can be masked with other configuration descriptor attributes for a \ref USB_Descriptor_Configuration_Header_t
+ *  descriptor's \c ConfigAttributes value to indicate that the specified configuration supports the
+ *  remote wakeup feature of the USB standard, allowing a suspended USB device to wake up the host upon
+ *  request.
+ */
+#define USB_CONFIG_ATTR_REMOTEWAKEUP      0x20
+//@}
+
+/** \name Endpoint Descriptor Attribute Masks */
+//@{
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is not synchronized.
+ *
+ *  \see The USB specification for more details on the possible Endpoint attributes.
+ */
+#define ENDPOINT_ATTR_NO_SYNC             (0 << 2)
+
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is asynchronous.
+ *
+ *  \see The USB specification for more details on the possible Endpoint attributes.
+ */
+#define ENDPOINT_ATTR_ASYNC               (1 << 2)
+
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is adaptive.
+ *
+ *  \see The USB specification for more details on the possible Endpoint attributes.
+ */
+#define ENDPOINT_ATTR_ADAPTIVE            (2 << 2)
+
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is synchronized.
+ *
+ *  \see The USB specification for more details on the possible Endpoint attributes.
+ */
+#define ENDPOINT_ATTR_SYNC                (3 << 2)
+//@}
+
+/** \name Endpoint Descriptor Usage Masks */
+//@{
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is used for data transfers.
+ *
+ *  \see The USB specification for more details on the possible Endpoint usage attributes.
+ */
+#define ENDPOINT_USAGE_DATA               (0 << 4)
+
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is used for feedback.
+ *
+ *  \see The USB specification for more details on the possible Endpoint usage attributes.
+ */
+#define ENDPOINT_USAGE_FEEDBACK           (1 << 4)
+
+/** Can be masked with other endpoint descriptor attributes for a \ref USB_Descriptor_Endpoint_t descriptor's
+ *  \c Attributes value to indicate that the specified endpoint is used for implicit feedback.
+ *
+ *  \see The USB specification for more details on the possible Endpoint usage attributes.
+ */
+#define ENDPOINT_USAGE_IMPLICIT_FEEDBACK  (2 << 4)
+//@}
+
+/* Enums: */
+/** Enum for the possible standard descriptor types, as given in each descriptor's header. */
+enum USB_DescriptorTypes_t
+{
+	DTYPE_Device                    = 0x01, /**< Indicates that the descriptor is a device descriptor. */
+	DTYPE_Configuration             = 0x02, /**< Indicates that the descriptor is a configuration descriptor. */
+	DTYPE_String                    = 0x03, /**< Indicates that the descriptor is a string descriptor. */
+	DTYPE_Interface                 = 0x04, /**< Indicates that the descriptor is an interface descriptor. */
+	DTYPE_Endpoint                  = 0x05, /**< Indicates that the descriptor is an endpoint descriptor. */
+	DTYPE_DeviceQualifier           = 0x06, /**< Indicates that the descriptor is a device qualifier descriptor. */
+	DTYPE_Other                     = 0x07, /**< Indicates that the descriptor is of other type. */
+	DTYPE_InterfacePower            = 0x08, /**< Indicates that the descriptor is an interface power descriptor. */
+	DTYPE_InterfaceAssociation      = 0x0B, /**< Indicates that the descriptor is an interface association descriptor. */
+	DTYPE_CSInterface               = 0x24, /**< Indicates that the descriptor is a class specific interface descriptor. */
+	DTYPE_CSEndpoint                = 0x25, /**< Indicates that the descriptor is a class specific endpoint descriptor. */
+};
+
+/** Enum for possible Class, Subclass and Protocol values of device and interface descriptors. */
+enum USB_Descriptor_ClassSubclassProtocol_t
+{
+	USB_CSCP_NoDeviceClass          = 0x00, /**< Descriptor Class value indicating that the device does not belong
+	                                         *   to a particular class at the device level.
+	                                         */
+	USB_CSCP_NoDeviceSubclass       = 0x00, /**< Descriptor Subclass value indicating that the device does not belong
+	                                         *   to a particular subclass at the device level.
+	                                         */
+	USB_CSCP_NoDeviceProtocol       = 0x00, /**< Descriptor Protocol value indicating that the device does not belong
+	                                         *   to a particular protocol at the device level.
+	                                         */
+	USB_CSCP_VendorSpecificClass    = 0xFF, /**< Descriptor Class value indicating that the device/interface belongs
+	                                         *   to a vendor specific class.
+	                                         */
+	USB_CSCP_VendorSpecificSubclass = 0xFF, /**< Descriptor Subclass value indicating that the device/interface belongs
+	                                         *   to a vendor specific subclass.
+	                                         */
+	USB_CSCP_VendorSpecificProtocol = 0xFF, /**< Descriptor Protocol value indicating that the device/interface belongs
+	                                         *   to a vendor specific protocol.
+	                                         */
+	USB_CSCP_IADDeviceClass         = 0xEF, /**< Descriptor Class value indicating that the device belongs to the
+	                                         *   Interface Association Descriptor class.
+	                                         */
+	USB_CSCP_IADDeviceSubclass      = 0x02, /**< Descriptor Subclass value indicating that the device belongs to the
+	                                         *   Interface Association Descriptor subclass.
+	                                         */
+	USB_CSCP_IADDeviceProtocol      = 0x01, /**< Descriptor Protocol value indicating that the device belongs to the
+	                                         *   Interface Association Descriptor protocol.
+	                                         */
+};
+
+/* Type Defines: */
+/** \brief Standard USB Descriptor Header (LUFA naming conventions).
+ *
+ *  Type define for all descriptors' standard header, indicating the descriptor's length and type. This structure
+ *  uses LUFA-specific element names to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_Header_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 Size; /**< Size of the descriptor, in bytes. */
+	u8 Type; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	               *   given by the specific class.
+	               */
+}USB_Descriptor_Header_t;
+
+/** \brief Standard USB Descriptor Header (USB-IF naming conventions).
+ *
+ *  Type define for all descriptors' standard header, indicating the descriptor's length and type. This structure
+ *  uses the relevant standard's given element names to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_Header_t for the version of this type with non-standard LUFA specific element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                          *   given by the specific class.
+	                          */
+}USB_StdDescriptor_Header_t;
+
+/** \brief Standard USB Device Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Device Descriptor. This structure uses LUFA-specific element names to make each
+ *  element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_Device_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u16 USBSpecification; /**< BCD of the supported USB specification. */
+	u8  Class; /**< USB device class. */
+	u8  SubClass; /**< USB device subclass. */
+	u8  Protocol; /**< USB device protocol. */
+
+	u8  Endpoint0Size; /**< Size of the control (address 0) endpoint's bank in bytes. */
+
+	u16 VendorID; /**< Vendor ID for the USB product. */
+	u16 ProductID; /**< Unique product ID for the USB product. */
+	u16 ReleaseNumber; /**< Product release (version) number. */
+
+	u8  ManufacturerStrIndex; /**< String index for the manufacturer's name. The
+	                                *   host will request this string via a separate
+	                                *   control request for the string descriptor.
+	                                *
+	                                *   \note If no string supplied, use \ref NO_DESCRIPTOR.
+	                                */
+	u8  ProductStrIndex; /**< String index for the product name/details.
+	                           *
+	                           *  \see ManufacturerStrIndex structure entry.
+	                           */
+	u8  SerialNumStrIndex; /**< String index for the product's globally unique hexadecimal
+	                             *   serial number, in uppercase Unicode ASCII.
+	                             *
+	                             *  \note On some microcontroller models, there is an embedded serial number
+	                             *        in the chip which can be used for the device serial number.
+	                             *        To use this serial number, set this to USE_INTERNAL_SERIAL.
+	                             *        On unsupported devices, this will evaluate to 0 and will cause
+	                             *        the host to generate a pseudo-unique value for the device upon
+	                             *        insertion.
+	                             *
+	                             *  \see ManufacturerStrIndex structure entry.
+	                             */
+	u8  NumberOfConfigurations; /**< Total number of configurations supported by
+	                                  *   the device.
+	                                  */
+}USB_Descriptor_Device_t;
+
+/** \brief Standard USB Device Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Device Descriptor. This structure uses the relevant standard's given element names
+ *  to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_Device_t for the version of this type with non-standard LUFA specific element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                              *   given by the specific class.
+	                              */
+	u16 bcdUSB; /**< BCD of the supported USB specification. */
+	u8  bDeviceClass; /**< USB device class. */
+	u8  bDeviceSubClass; /**< USB device subclass. */
+	u8  bDeviceProtocol; /**< USB device protocol. */
+	u8  bMaxPacketSize0; /**< Size of the control (address 0) endpoint's bank in bytes. */
+	u16 idVendor; /**< Vendor ID for the USB product. */
+	u16 idProduct; /**< Unique product ID for the USB product. */
+	u16 bcdDevice; /**< Product release (version) number. */
+	u8  iManufacturer; /**< String index for the manufacturer's name. The
+	                         *   host will request this string via a separate
+	                         *   control request for the string descriptor.
+	                         *
+	                         *   \note If no string supplied, use \ref NO_DESCRIPTOR.
+	                         */
+	u8  iProduct; /**< String index for the product name/details.
+	                    *
+	                    *  \see ManufacturerStrIndex structure entry.
+	                    */
+	u8 iSerialNumber; /**< String index for the product's globally unique hexadecimal
+	                        *   serial number, in uppercase Unicode ASCII.
+	                        *
+	                        *  \note On some microcontroller models, there is an embedded serial number
+	                        *        in the chip which can be used for the device serial number.
+	                        *        To use this serial number, set this to USE_INTERNAL_SERIAL.
+	                        *        On unsupported devices, this will evaluate to 0 and will cause
+	                        *        the host to generate a pseudo-unique value for the device upon
+	                        *        insertion.
+	                        *
+	                        *  \see ManufacturerStrIndex structure entry.
+	                        */
+	u8  bNumConfigurations; /**< Total number of configurations supported by
+	                              *   the device.
+	                              */
+}USB_StdDescriptor_Device_t;
+
+/** \brief Standard USB Device Qualifier Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Device Qualifier Descriptor. This structure uses LUFA-specific element names
+ *  to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_DeviceQualifier_t for the version of this type with standard element names.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u16 USBSpecification; /**< BCD of the supported USB specification. */
+	u8  Class; /**< USB device class. */
+	u8  SubClass; /**< USB device subclass. */
+	u8  Protocol; /**< USB device protocol. */
+
+	u8  Endpoint0Size; /**< Size of the control (address 0) endpoint's bank in bytes. */
+	u8  NumberOfConfigurations; /**< Total number of configurations supported by
+	                                  *   the device.
+	                                  */
+	u8  Reserved; /**< Reserved for future use, must be 0. */
+}USB_Descriptor_DeviceQualifier_t;
+
+/** \brief Standard USB Device Qualifier Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Device Qualifier Descriptor. This structure uses the relevant standard's given element names
+ *  to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_DeviceQualifier_t for the version of this type with non-standard LUFA specific element names.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                              *   given by the specific class.
+	                              */
+	u16 bcdUSB; /**< BCD of the supported USB specification. */
+	u8  bDeviceClass; /**< USB device class. */
+	u8  bDeviceSubClass; /**< USB device subclass. */
+	u8  bDeviceProtocol; /**< USB device protocol. */
+	u8  bMaxPacketSize0; /**< Size of the control (address 0) endpoint's bank in bytes. */
+	u8  bNumConfigurations; /**< Total number of configurations supported by
+	                              *   the device.
+	                              */
+	u8  bReserved; /**< Reserved for future use, must be 0. */
+}USB_StdDescriptor_DeviceQualifier_t;
+
+/** \brief Standard USB Configuration Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Configuration Descriptor header. This structure uses LUFA-specific element names
+ *  to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_Configuration_Header_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u16 TotalConfigurationSize; /**< Size of the configuration descriptor header,
+	                                  *   and all sub descriptors inside the configuration.
+	                                  */
+	u8  TotalInterfaces; /**< Total number of interfaces in the configuration. */
+
+	u8  ConfigurationNumber; /**< Configuration index of the current configuration. */
+	u8  ConfigurationStrIndex; /**< Index of a string descriptor describing the configuration. */
+
+	u8  ConfigAttributes; /**< Configuration attributes, comprised of a mask of \c USB_CONFIG_ATTR_* masks.
+	                            *   On all devices, this should include USB_CONFIG_ATTR_RESERVED at a minimum.
+	                            */
+
+	u8  MaxPowerConsumption; /**< Maximum power consumption of the device while in the
+	                               *   current configuration, calculated by the \ref USB_CONFIG_POWER_MA()
+	                               *   macro.
+	                               */
+}USB_Descriptor_Configuration_Header_t;
+
+/** \brief Standard USB Configuration Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Configuration Descriptor header. This structure uses the relevant standard's given element names
+ *  to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_Device_t for the version of this type with non-standard LUFA specific element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                              *   given by the specific class.
+	                              */
+	u16 wTotalLength; /**< Size of the configuration descriptor header,
+	                           *   and all sub descriptors inside the configuration.
+	                           */
+	u8  bNumInterfaces; /**< Total number of interfaces in the configuration. */
+	u8  bConfigurationValue; /**< Configuration index of the current configuration. */
+	u8  iConfiguration; /**< Index of a string descriptor describing the configuration. */
+	u8  bmAttributes; /**< Configuration attributes, comprised of a mask of \c USB_CONFIG_ATTR_* masks.
+	                        *   On all devices, this should include USB_CONFIG_ATTR_RESERVED at a minimum.
+	                        */
+	u8  bMaxPower; /**< Maximum power consumption of the device while in the
+	                     *   current configuration, calculated by the \ref USB_CONFIG_POWER_MA()
+	                     *   macro.
+	                     */
+}USB_StdDescriptor_Configuration_Header_t;
+
+/** \brief Standard USB Interface Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Interface Descriptor. This structure uses LUFA-specific element names
+ *  to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_Interface_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u8 InterfaceNumber; /**< Index of the interface in the current configuration. */
+	u8 AlternateSetting; /**< Alternate setting for the interface number. The same
+	                           *   interface number can have multiple alternate settings
+	                           *   with different endpoint configurations, which can be
+	                           *   selected by the host.
+	                           */
+	u8 TotalEndpoints; /**< Total number of endpoints in the interface. */
+
+	u8 Class; /**< Interface class ID. */
+	u8 SubClass; /**< Interface subclass ID. */
+	u8 Protocol; /**< Interface protocol ID. */
+
+	u8 InterfaceStrIndex; /**< Index of the string descriptor describing the interface. */
+}USB_Descriptor_Interface_t;
+
+/** \brief Standard USB Interface Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Interface Descriptor. This structure uses the relevant standard's given element names
+ *  to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_Interface_t for the version of this type with non-standard LUFA specific element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                          *   given by the specific class.
+	                          */
+	u8 bInterfaceNumber; /**< Index of the interface in the current configuration. */
+	u8 bAlternateSetting; /**< Alternate setting for the interface number. The same
+	                            *   interface number can have multiple alternate settings
+	                            *   with different endpoint configurations, which can be
+	                            *   selected by the host.
+	                            */
+	u8 bNumEndpoints; /**< Total number of endpoints in the interface. */
+	u8 bInterfaceClass; /**< Interface class ID. */
+	u8 bInterfaceSubClass; /**< Interface subclass ID. */
+	u8 bInterfaceProtocol; /**< Interface protocol ID. */
+	u8 iInterface; /**< Index of the string descriptor describing the
+	                     *   interface.
+	                     */
+}USB_StdDescriptor_Interface_t;
+
+/** \brief Standard USB Interface Association Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Interface Association Descriptor. This structure uses LUFA-specific element names
+ *  to make each element's purpose clearer.
+ *
+ *  This descriptor has been added as a supplement to the USB2.0 standard, in the ECN located at
+ *  <a>http://www.usb.org/developers/docs/InterfaceAssociationDescriptor_ecn.pdf</a>. It allows composite
+ *  devices with multiple interfaces related to the same function to have the multiple interfaces bound
+ *  together at the point of enumeration, loading one generic driver for all the interfaces in the single
+ *  function. Read the ECN for more information.
+ *
+ *  \see \ref USB_StdDescriptor_Interface_Association_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u8 FirstInterfaceIndex; /**< Index of the first associated interface. */
+	u8 TotalInterfaces; /**< Total number of associated interfaces. */
+
+	u8 Class; /**< Interface class ID. */
+	u8 SubClass; /**< Interface subclass ID. */
+	u8 Protocol; /**< Interface protocol ID. */
+
+	u8 IADStrIndex; /**< Index of the string descriptor describing the
+	                      *   interface association.
+	                      */
+}USB_Descriptor_Interface_Association_t;
+
+/** \brief Standard USB Interface Association Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Interface Association Descriptor. This structure uses the relevant standard's given
+ *  element names to ensure compatibility with the standard.
+ *
+ *  This descriptor has been added as a supplement to the USB2.0 standard, in the ECN located at
+ *  <a>http://www.usb.org/developers/docs/InterfaceAssociationDescriptor_ecn.pdf</a>. It allows composite
+ *  devices with multiple interfaces related to the same function to have the multiple interfaces bound
+ *  together at the point of enumeration, loading one generic driver for all the interfaces in the single
+ *  function. Read the ECN for more information.
+ *
+ *  \see \ref USB_Descriptor_Interface_Association_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a value
+	                          *   given by the specific class.
+	                          */
+	u8 bFirstInterface; /**< Index of the first associated interface. */
+	u8 bInterfaceCount; /**< Total number of associated interfaces. */
+	u8 bFunctionClass; /**< Interface class ID. */
+	u8 bFunctionSubClass; /**< Interface subclass ID. */
+	u8 bFunctionProtocol; /**< Interface protocol ID. */
+	u8 iFunction; /**< Index of the string descriptor describing the
+	                    *   interface association.
+	                    */
+}USB_StdDescriptor_Interface_Association_t;
+
+/** \brief Standard USB Endpoint Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard Endpoint Descriptor. This structure uses LUFA-specific element names
+ *  to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_Endpoint_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+
+	u8  EndpointAddress; /**< Logical address of the endpoint within the device for the current
+	                           *   configuration, including direction mask.
+	                           */
+	u8  Attributes; /**< Endpoint attributes, comprised of a mask of the endpoint type (EP_TYPE_*)
+	                      *   and attributes (ENDPOINT_ATTR_*) masks.
+	                      */
+	u16 EndpointSize; /**< Size of the endpoint bank, in bytes. This indicates the maximum packet
+	                        *   size that the endpoint can receive at a time.
+	                        */
+	u8  PollingIntervalMS; /**< Polling interval in milliseconds for the endpoint if it is an INTERRUPT
+	                             *   or ISOCHRONOUS type.
+	                             */
+}USB_Descriptor_Endpoint_t;
+
+/** \brief Standard USB Endpoint Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard Endpoint Descriptor. This structure uses the relevant standard's given
+ *  element names to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_Endpoint_t for the version of this type with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8  bLength; /**< Size of the descriptor, in bytes. */
+	u8  bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t or a
+	                           *   value given by the specific class.
+	                           */
+	u8  bEndpointAddress; /**< Logical address of the endpoint within the device for the current
+	                            *   configuration, including direction mask.
+	                            */
+	u8  bmAttributes; /**< Endpoint attributes, comprised of a mask of the endpoint type (EP_TYPE_*)
+	                        *   and attributes (ENDPOINT_ATTR_*) masks.
+	                        */
+	u16 wMaxPacketSize; /**< Size of the endpoint bank, in bytes. This indicates the maximum packet size
+	                          *   that the endpoint can receive at a time.
+	                          */
+	u8  bInterval; /**< Polling interval in milliseconds for the endpoint if it is an INTERRUPT or
+	                     *   ISOCHRONOUS type.
+	                     */
+}USB_StdDescriptor_Endpoint_t;
+
+/** \brief Standard USB String Descriptor (LUFA naming conventions).
+ *
+ *  Type define for a standard string descriptor. Unlike other standard descriptors, the length
+ *  of the descriptor for placement in the descriptor header must be determined by the \ref USB_STRING_LEN()
+ *  macro rather than by the size of the descriptor structure, as the length is not fixed.
+ *
+ *  This structure should also be used for string index 0, which contains the supported language IDs for
+ *  the device as an array.
+ *
+ *  This structure uses LUFA-specific element names to make each element's purpose clearer.
+ *
+ *  \see \ref USB_StdDescriptor_String_t for the version of this type with standard element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+#ifndef __GNUC__
+#pragma warning(push)
+#pragma warning(disable:4200)	// none standard zero length array
+#endif
+
+typedef struct
+{
+	USB_Descriptor_Header_t Header; /**< Descriptor header, including type and size. */
+	wchar_t UnicodeString[]; /**< String data, as unicode characters (alternatively,
+	                           *   string language IDs). If normal ASCII characters are
+	                           *   to be used, they must be added as an array of characters
+	                           *   rather than a normal C string so that they are widened to
+	                           *   Unicode size.
+	                           *
+	                           *   Under GCC, strings prefixed with the "L" character (before
+	                           *   the opening string quotation mark) are considered to be
+	                           *   Unicode strings, and may be used instead of an explicit
+	                           *   array of ASCII characters on little endian devices with
+	                           *   UTF-16-LE \c wchar_t encoding.
+	                           */
+}USB_Descriptor_String_t;
+
+/** \brief Standard USB String Descriptor (USB-IF naming conventions).
+ *
+ *  Type define for a standard string descriptor. Unlike other standard descriptors, the length
+ *  of the descriptor for placement in the descriptor header must be determined by the \ref USB_STRING_LEN()
+ *  macro rather than by the size of the descriptor structure, as the length is not fixed.
+ *
+ *  This structure should also be used for string index 0, which contains the supported language IDs for
+ *  the device as an array.
+ *
+ *  This structure uses the relevant standard's given element names to ensure compatibility with the standard.
+ *
+ *  \see \ref USB_Descriptor_String_t for the version of this type with with non-standard LUFA specific
+ *       element names.
+ *
+ *  \note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+typedef struct
+{
+	u8 bLength; /**< Size of the descriptor, in bytes. */
+	u8 bDescriptorType; /**< Type of the descriptor, either a value in \ref USB_DescriptorTypes_t
+	                          *   or a value given by the specific class.
+	                          */
+	wchar_t bString[]; /**< String data, as unicode characters (alternatively, string language IDs).
+	                     *   If normal ASCII characters are to be used, they must be added as an array
+	                     *   of characters rather than a normal C string so that they are widened to
+	                     *   Unicode size.
+	                     *
+	                     *   Under GCC, strings prefixed with the "L" character (before the opening string
+	                     *   quotation mark) are considered to be Unicode strings, and may be used instead
+	                     *   of an explicit array of ASCII characters.
+	                     */
+}USB_StdDescriptor_String_t;
+
+#ifndef __GNUC__
+#pragma warning(pop)
+#endif
+
+/** \brief HID class-specific HID Descriptor (LUFA naming conventions).
+ *
+ *	Type define for the HID class-specific HID descriptor, to describe the HID device's specifications. Refer to the HID
+ *	specification for details on the structure elements.
+ *
+ *	\see \ref USB_HID_StdDescriptor_HID_t for the version of this type with standard element names.
+ *
+ *	\note Regardless of CPU architecture, these values should be stored as little endian.
+ */
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdRequestType.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdRequestType.h
new file mode 100644
index 00000000..465d02ba
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/StdRequestType.h
@@ -0,0 +1,223 @@
+/********************************************************************************************************
+ * @file    StdRequestType.h
+ *
+ * @brief   This is the header file for StdRequestType
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "types.h"
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	extern "C" {
+#endif
+
+/* Public Interface - May be used in end-application: */
+/* Macros: */
+/** Mask for the request type parameter, to indicate the direction of the request data (Host to Device
+ *  or Device to Host). The result of this mask should then be compared to the request direction masks.
+ *
+ *  \see \c REQDIR_* macros for masks indicating the request data direction.
+ */
+#define CONTROL_REQTYPE_DIRECTION  0x80
+
+/** Mask for the request type parameter, to indicate the type of request (Device, Class or Vendor
+ *  Specific). The result of this mask should then be compared to the request type masks.
+ *
+ *  \see \c REQTYPE_* macros for masks indicating the request type.
+ */
+#define CONTROL_REQTYPE_TYPE       0x60
+
+/** Mask for the request type parameter, to indicate the recipient of the request (Device, Interface
+ *  Endpoint or Other). The result of this mask should then be compared to the request recipient
+ *  masks.
+ *
+ *  \see \c REQREC_* macros for masks indicating the request recipient.
+ */
+#define CONTROL_REQTYPE_RECIPIENT  0x1F
+
+/** \name Control Request Data Direction Masks */
+//@{
+/** Request data direction mask, indicating that the request data will flow from host to device.
+ *
+ *  \see \ref CONTROL_REQTYPE_DIRECTION macro.
+ */
+#define REQDIR_HOSTTODEVICE        (0 << 7)
+
+/** Request data direction mask, indicating that the request data will flow from device to host.
+ *
+ *  \see \ref CONTROL_REQTYPE_DIRECTION macro.
+ */
+#define REQDIR_DEVICETOHOST        (1 << 7)
+//@}
+
+/** \name Control Request Type Masks */
+//@{
+/** Request type mask, indicating that the request is a standard request.
+ *
+ *  \see \ref CONTROL_REQTYPE_TYPE macro.
+ */
+#define REQTYPE_STANDARD           (0 << 5)
+
+/** Request type mask, indicating that the request is a class-specific request.
+ *
+ *  \see \ref CONTROL_REQTYPE_TYPE macro.
+ */
+#define REQTYPE_CLASS              (1 << 5)
+
+/** Request type mask, indicating that the request is a vendor specific request.
+ *
+ *  \see \ref CONTROL_REQTYPE_TYPE macro.
+ */
+#define REQTYPE_VENDOR             (2 << 5)
+//@}
+
+/** \name Control Request Recipient Masks */
+//@{
+/** Request recipient mask, indicating that the request is to be issued to the device as a whole.
+ *
+ *  \see \ref CONTROL_REQTYPE_RECIPIENT macro.
+ */
+#define REQREC_DEVICE              (0 << 0)
+
+/** Request recipient mask, indicating that the request is to be issued to an interface in the
+ *  currently selected configuration.
+ *
+ *  \see \ref CONTROL_REQTYPE_RECIPIENT macro.
+ */
+#define REQREC_INTERFACE           (1 << 0)
+
+/** Request recipient mask, indicating that the request is to be issued to an endpoint in the
+ *  currently selected configuration.
+ *
+ *  \see \ref CONTROL_REQTYPE_RECIPIENT macro.
+ */
+#define REQREC_ENDPOINT            (2 << 0)
+
+/** Request recipient mask, indicating that the request is to be issued to an unspecified element
+ *  in the currently selected configuration.
+ *
+ *  \see \ref CONTROL_REQTYPE_RECIPIENT macro.
+ */
+#define REQREC_OTHER               (3 << 0)
+
+#define FEATURE_SELFPOWERED_ENABLED     (1 << 0)
+#define FEATURE_REMOTE_WAKEUP_ENABLED   (1 << 1)
+//@}
+
+/* Type Defines: */
+/** \brief Standard USB Control Request
+ *
+ *  Type define for a standard USB control request.
+ *
+ *  \see The USB 2.0 specification for more information on standard control requests.
+ */
+typedef struct
+{
+	u8  bmRequestType; /**< Type of the request. */
+	u8  bRequest; /**< Request command code. */
+	u16 wValue; /**< wValue parameter of the request. */
+	u16 wIndex; /**< wIndex parameter of the request. */
+	u16 wLength; /**< Length of the data to transfer in bytes. */
+}USB_Request_Header_t;
+
+/* Enums: */
+/** Enumeration for the various standard request commands. These commands are applicable when the
+ *  request type is \ref REQTYPE_STANDARD (with the exception of \ref REQ_GetDescriptor, which is always
+ *  handled regardless of the request type value).
+ *
+ *  \see Chapter 9 of the USB 2.0 Specification.
+ */
+enum USB_Control_Request_t
+{
+	REQ_GetStatus           = 0, /**< Implemented in the library for device and endpoint recipients. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_ClearFeature        = 1, /**< Implemented in the library for device and endpoint recipients. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SetFeature          = 3, /**< Implemented in the library for device and endpoint recipients. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SetAddress          = 5, /**< Implemented in the library for the device recipient. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_GetDescriptor       = 6, /**< Implemented in the library for device and interface recipients. Passed to the
+								  *   user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SetDescriptor       = 7, /**< Not implemented in the library, passed to the user application
+								  *   via the \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_GetConfiguration    = 8, /**< Implemented in the library for the device recipient. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SetConfiguration    = 9, /**< Implemented in the library for the device recipient. Passed
+								  *   to the user application for other recipients via the
+								  *   \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_GetInterface        = 10, /**< Not implemented in the library, passed to the user application
+								  *   via the \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SetInterface        = 11, /**< Not implemented in the library, passed to the user application
+								  *   via the \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+	REQ_SynchFrame          = 12, /**< Not implemented in the library, passed to the user application
+								  *   via the \ref EVENT_USB_Device_ControlRequest() event when received in
+								  *   device mode. */
+};
+
+/** Feature Selector values for Set Feature and Clear Feature standard control requests directed to the device, interface
+ *  and endpoint recipients.
+ */
+enum USB_Feature_Selectors_t
+{
+	FEATURE_SEL_EndpointHalt       = 0x00, /**< Feature selector for Clear Feature or Set Feature commands. When
+											*   used in a Set Feature or Clear Feature request this indicates that an
+											*   endpoint (whose address is given elsewhere in the request) should have
+											*   its stall condition changed.
+											*/
+	FEATURE_SEL_DeviceRemoteWakeup = 0x01, /**< Feature selector for Device level Remote Wakeup enable set or clear.
+											*   This feature can be controlled by the host on devices which indicate
+											*   remote wakeup support in their descriptors to selectively disable or
+											*   enable remote wakeup.
+											*/
+	FEATURE_SEL_TestMode           = 0x02, /**< Feature selector for Test Mode features, used to test the USB controller
+											*   to check for incorrect operation.
+											*/
+};
+
+	
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+	}
+#endif
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/USBController.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/USBController.h
new file mode 100644
index 00000000..6ac47243
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/USBController.h
@@ -0,0 +1,111 @@
+/********************************************************************************************************
+ * @file    USBController.h
+ *
+ * @brief   This is the header file for USBController
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Enable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+extern "C" {
+#endif
+
+/* Defines: */
+/** \name Endpoint Direction Masks */
+//@{
+/** Endpoint direction mask, for masking against endpoint addresses to retrieve the endpoint's
+ *	direction for comparing with the \c ENDPOINT_DIR_* masks.
+ */
+#define ENDPOINT_DIR_MASK				   0x80
+
+/** Endpoint address direction mask for an OUT direction (Host to Device) endpoint. This may be ORed with
+ *	the index of the address within a device to obtain the full endpoint address.
+ */
+#define ENDPOINT_DIR_OUT				   0x00
+
+/** Endpoint address direction mask for an IN direction (Device to Host) endpoint. This may be ORed with
+ *	the index of the address within a device to obtain the full endpoint address.
+ */
+#define ENDPOINT_DIR_IN 				   0x80
+//@}
+
+/** \name Endpoint/Pipe Type Masks */
+//@{
+/** Mask for determining the type of an endpoint from an endpoint descriptor. This should then be compared
+ *	with the \c EP_TYPE_* masks to determine the exact type of the endpoint.
+ */
+#define EP_TYPE_MASK					   0x03
+
+/** Mask for a CONTROL type endpoint or pipe.
+ *
+ *	\note See \ref Group_EndpointManagement and \ref Group_PipeManagement for endpoint/pipe functions.
+ */
+#define EP_TYPE_CONTROL 				   0x00
+
+/** Mask for an ISOCHRONOUS type endpoint or pipe.
+ *
+ *	\note See \ref Group_EndpointManagement and \ref Group_PipeManagement for endpoint/pipe functions.
+ */
+#define EP_TYPE_ISOCHRONOUS 			   0x01
+
+/** Mask for a BULK type endpoint or pipe.
+ *
+ *	\note See \ref Group_EndpointManagement and \ref Group_PipeManagement for endpoint/pipe functions.
+ */
+#define EP_TYPE_BULK					   0x02
+
+/** Mask for an INTERRUPT type endpoint or pipe.
+ *
+ *	\note See \ref Group_EndpointManagement and \ref Group_PipeManagement for endpoint/pipe functions.
+ */
+#define EP_TYPE_INTERRUPT				   0x03
+
+/**If Isochronous endpoint,
+Bits 3..2 = Synchronisation Type (Iso Mode)
+00 = No Synchonisation
+01 = Asynchronous
+10 = Adaptive
+11 = Synchronous
+Bits 5..4 = Usage Type (Iso Mode)
+00 = Data Endpoint
+01 = Feedback Endpoint
+10 = Explicit Feedback Data Endpoint
+11 = Reserved
+*/
+#define EP_SYNC_TYPE_NO_SYNC                0
+#define EP_SYNC_TYPE_ASYN                   1
+#define EP_SYNC_TYPE_ADAPTIVE               2
+#define EP_SYNC_TYPE_SYNC                   3
+
+#define EP_USAGE_TYPE_DATA                  0
+#define EP_USAGE_TYPE_FEEDBACK              1
+#define EP_USAGE_TYPE_FEEDBACK_DATA         2
+#define EP_USAGE_TYPE_RSV                   3
+
+//@}
+
+/* Disable C linkage for C++ Compilers: */
+#if defined(__cplusplus)
+}
+#endif
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/usbstd.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/usbstd.h
new file mode 100644
index 00000000..d29b3356
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/drivers/usb/usbstd/usbstd.h
@@ -0,0 +1,40 @@
+/********************************************************************************************************
+ * @file    usbstd.h
+ *
+ * @brief   This is the header file for usbstd
+ *
+ * @author  Driver & Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+/* Includes: */
+#include "AudioClassCommon.h"
+#include "CDCClassCommon.h"
+#include "CDCClassDevice.h"
+#include "HIDClassCommon.h"
+#include "HIDClassDevice.h"
+#include "HIDReportData.h"
+#include "PrinterClassCommon.h"
+#include "StdRequestType.h"
+#include "StdDescriptors.h"
+#include "USBController.h"
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.c
new file mode 100644
index 00000000..9021fc37
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.c
@@ -0,0 +1,76 @@
+/********************************************************************************************************
+ * @file    ev.c
+ *
+ * @brief   This is the source file for ev
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+#include "ev.h"
+
+sys_exception_cb_t g_sysExceptCallbak = NULL;
+
+
+volatile u16 T_evtExcept[4] = {0};
+u8 sys_exceptionPost(u16 line, u8 evt)
+{
+	T_evtExcept[0] = line;
+	T_evtExcept[1] = evt;
+
+	/* TODO: some information stored in NV */
+	if(g_sysExceptCallbak){
+		g_sysExceptCallbak();
+	}
+
+	return 0;
+}
+
+void sys_stackStatusCheck(void)
+{
+	extern u32 _end_bss_;
+	u8 *stackEnd = (u8*)&_end_bss_;
+	u8 stackOverflown = 0;
+	for(s32 i = 0; i < 4; i++){
+		if(stackEnd[i] != 0xff){
+			/* stack overflown */
+			stackOverflown = 1;
+			break;
+		}
+	}
+
+	if(stackOverflown){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_STACK_OVERFLOWN);
+	}
+}
+
+void sys_exceptHandlerRegister(sys_exception_cb_t cb)
+{
+	g_sysExceptCallbak = cb;
+}
+
+void ev_main(void)
+{
+	ev_timer_process();
+    ev_poll_process();
+
+	//sys_stackStatusCheck();
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.h
new file mode 100644
index 00000000..9ca8debe
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev.h
@@ -0,0 +1,83 @@
+/********************************************************************************************************
+ * @file    ev.h
+ *
+ * @brief   This is the header file for ev
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+enum {
+	SYS_EXCEPTTION_COMMON_MEM_ACCESS = 0,
+	SYS_EXCEPTTION_COMMON_TIMER_EVEVT,
+	SYS_EXCEPTTION_COMMON_BUFFER_OVERFLOWN,
+	SYS_EXCEPTTION_COMMON_STACK_OVERFLOWN,
+	SYS_EXCEPTTION_COMMON_PARAM_ERROR,
+	SYS_EXCEPTTION_COMMON_TASK_POST,
+
+	SYS_EXCEPTTION_ZB_BUFFER_OVERFLOWN = 0x10,
+	SYS_EXCEPTTION_ZB_BUFFER_EXCEPTION_FREE_OVERFLON,
+	SYS_EXCEPTTION_ZB_BUFFER_EXCEPTION_FREE_MULIT,
+	SYS_EXCEPTTION_ZB_BUFFER_EXCEPTION,
+	SYS_EXCEPTTION_ZB_TIMER_TASK,
+	SYS_EXCEPTTION_ZB_TASK_POST,
+
+	SYS_EXCEPTTION_ZB_MAC_TX_IRQ = 0x20,
+	SYS_EXCEPTTION_ZB_MAC_TX_TIMER,
+	SYS_EXCEPTTION_ZB_MAC_CSMA,
+	SYS_EXCEPTTION_ZB_MAC_TRX_TASK,
+
+	SYS_EXCEPTTION_ZB_NWK_ADDR_IDX = 0x30,
+	SYS_EXCEPTTION_ZB_NWK_BRC_INFO,
+	SYS_EXCEPTTION_ZB_NWK_GET_ENTRY,
+	SYS_EXCEPTTION_ZB_NWK_NEIGHBOR_TABLE,
+	SYS_EXCEPTTION_ZB_NWK_ROUTE_TABLE,
+	SYS_EXCEPTTION_ZB_NWK_LINK_STA_MEM_ALLOC_FAIL,
+
+	SYS_EXCEPTTION_ZB_SS_KEY_INDEX = 0x40,
+
+	SYS_EXCEPTTION_ZB_APS_PARAM = 0x50,
+	SYS_EXCEPTTION_ZB_APS_FRAGMENT_TRANS,
+	SYS_EXCEPTTION_ZB_APS_FRAGMENT_RCV,
+
+	SYS_EXCEPTTION_ZB_ZCL_ENTRY = 0x60,
+
+	SYS_EXCEPTTION_EV_BUFFER_OVERFLOWN = 0x70,
+	SYS_EXCEPTTION_EV_BUFFER_EXCEPTION_FREE_OVERFLON,
+	SYS_EXCEPTTION_EV_BUFFER_EXCEPTION_FREE_MULIT,
+	SYS_EXCEPTTION_EV_TASK_POST,
+
+	SYS_EXCEPTTION_NV_CHECK_TABLE_FULL = 0x80,
+};
+
+typedef void (*sys_exception_cb_t)(void);
+
+void sys_exceptHandlerRegister(sys_exception_cb_t cb);
+
+u8 sys_exceptionPost(u16 line, u8 evt);
+#define ZB_EXCEPTION_POST(evt)  sys_exceptionPost(__LINE__, evt)
+
+//will be called in every main loop
+void ev_main(void);
+
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.c
new file mode 100644
index 00000000..8b7395f0
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.c
@@ -0,0 +1,300 @@
+/********************************************************************************************************
+ * @file    ev_buffer.c
+ *
+ * @brief   This is the source file for ev_buffer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+#include "ev_buffer.h"
+
+
+#define DEFAULT_BUFFER_GROUP_NUM                 4
+
+/**************************** Private Variable Definitions *******************/
+typedef struct {
+	mem_pool_t *qHead;
+	u16 size;
+	u8 availBufNum;
+	u8 reserved;
+} ev_buf_groups_t;
+
+
+typedef struct bufm_vars {
+    ev_buf_groups_t bufGroups[DEFAULT_BUFFER_GROUP_NUM];
+} ev_buf_vars_t;
+
+
+ev_buf_vars_t ev_buf_vs;
+ev_buf_vars_t *ev_buf_v = &ev_buf_vs;
+
+
+MEMPOOL_DECLARE(size_0_pool, size_0_mem, BUFFER_GROUP_0, BUFFER_NUM_IN_GROUP0);
+MEMPOOL_DECLARE(size_1_pool, size_1_mem, BUFFER_GROUP_1, BUFFER_NUM_IN_GROUP1);
+MEMPOOL_DECLARE(size_2_pool, size_2_mem, BUFFER_GROUP_2, BUFFER_NUM_IN_GROUP2);
+MEMPOOL_DECLARE(size_3_pool, size_3_mem, BUFFER_GROUP_3, BUFFER_NUM_IN_GROUP3);
+
+/*********************************************************************
+ * @fn      ev_buf_isExisted
+ *
+ * @brief   Return whether the buffer is in the available buffer 
+ *
+ * @param   index
+ * @param   block
+ *
+ * @return  TRUE or FALSE
+ */
+u8 ev_buf_isExisted(u8 index, mem_block_t *block)
+{
+    mem_pool_t *pool = (mem_pool_t *)ev_buf_v->bufGroups[index].qHead;
+    mem_block_t *curBlock = pool->free_list;
+
+    while(curBlock){
+        if(block == curBlock){
+            return TRUE;
+        } 
+        curBlock = curBlock->next_block;
+    }
+
+    return FALSE;
+}
+
+u8 *ev_buf_retriveMempoolHeader(u8 *pd)
+{
+    return pd - (OFFSETOF(ev_bufItem_t, data) - OFFSETOF(mem_block_t, data));
+}
+
+
+/*********************************************************************
+ * @fn      ev_buf_reset
+ *
+ * @brief   Reset the EV Buffer module
+ *
+ * @param   None
+ *
+ * @return  None
+ */
+void ev_buf_reset(void)
+{
+    u16 size[DEFAULT_BUFFER_GROUP_NUM] = {BUFFER_GROUP_0, BUFFER_GROUP_1, BUFFER_GROUP_2, BUFFER_GROUP_3};
+    mem_pool_t *memPool[DEFAULT_BUFFER_GROUP_NUM] = {&size_0_pool, &size_1_pool, &size_2_pool, &size_3_pool};
+    u8 *mem[DEFAULT_BUFFER_GROUP_NUM] = {size_0_mem, size_1_mem, size_2_mem, size_3_mem};
+    u8 buffCnt[DEFAULT_BUFFER_GROUP_NUM] = {BUFFER_NUM_IN_GROUP0, BUFFER_NUM_IN_GROUP1, BUFFER_NUM_IN_GROUP2, BUFFER_NUM_IN_GROUP3};
+
+    memset((u8 *)ev_buf_v, 0, sizeof(ev_buf_vars_t));
+
+    /* reinitialize available buffer */
+    for(u8 i = 0; i < DEFAULT_BUFFER_GROUP_NUM; i++){
+        ev_buf_v->bufGroups[i].availBufNum = buffCnt[i];
+        ev_buf_v->bufGroups[i].qHead = mempool_init(memPool[i], mem[i], size[i], buffCnt[i]);
+        ev_buf_v->bufGroups[i].size = size[i];
+    }  
+}
+
+/*********************************************************************
+ * @fn      ev_buf_init
+ *
+ * @brief   Initialize the EV Buffer module
+ *
+ * @param   None
+ *
+ * @return  None
+ */
+void ev_buf_init(void)
+{
+    ev_buf_reset();
+}
+
+/*********************************************************************
+ * @fn      ev_buf_allocate
+ *
+ * @brief   Allocate an available buffer according to the requested size
+ *          The allocated buffer will have only three kind of size, defined 
+ *          in @ref EV_BUFFER_CONSTANT 
+ *
+ * @param   size - requested size
+ *
+ * @return  Pointer to an allocated buffer.
+ *          NULL means the there is no available buffer.
+ */
+
+#if EV_BUFFER_DEBUG
+u8 *my_ev_buf_allocate(u16 size, u16 line)
+#else
+u8 *ev_buf_allocate(u16 size)
+#endif
+{
+    if((size == 0) || (size > MAX_BUFFER_SIZE)){
+        /* the size parameter is wrong */
+        return NULL;
+    }
+    u32 r = drv_disable_irq();
+    u8 index = U8_MAX;
+
+    /* find related the buffer blocks */
+    for(u8 i = 0; i < DEFAULT_BUFFER_GROUP_NUM; i++){
+        if((size <= ev_buf_v->bufGroups[i].size - OFFSETOF(ev_bufItem_t, data)) && ev_buf_v->bufGroups[i].availBufNum){
+            index = i;
+            break;
+        }
+    }
+    if((index == U8_MAX ) || (!ev_buf_v->bufGroups[index].availBufNum)){
+        /* no available buffer */
+    	drv_restore_irq(r);
+        return NULL;
+    }
+    u8 *temp = (u8 *)mempool_alloc(ev_buf_v->bufGroups[index].qHead);
+    if(!temp){
+    	drv_restore_irq(r);
+    	return NULL;
+    }
+    ev_buf_v->bufGroups[index].availBufNum--;
+
+    ev_bufItem_t *pNewBuf = (ev_bufItem_t *)(temp - 4);
+    pNewBuf->groupIndex = index;
+#if EV_BUFFER_DEBUG
+    pNewBuf->line = line;
+    pNewBuf->flag = 0xfe;
+#endif
+    drv_restore_irq(r);
+    return pNewBuf->data;
+}
+
+u8 *long_ev_buf_get(void){
+	return ev_buf_allocate(MAX_BUFFER_SIZE);
+}
+
+/*********************************************************************
+ * @fn      ev_buf_free
+ *
+ * @brief   Free the specified buffer 
+ *
+ * @param   pBuf - the pointer to the specified buffer to free.
+ *
+ * @return  status
+ */
+#if EV_BUFFER_DEBUG
+volatile u32 T_DBG_evFreeBuf = 0;
+volatile u16 T_DBG_evFreeBufLine = 0;
+buf_sts_t my_ev_buf_free(u8 *pBuf, u16 line)
+#else
+buf_sts_t ev_buf_free(u8 *pBuf)
+#endif
+{
+    u32 r = drv_disable_irq();
+
+    if(!is_ev_buf(pBuf)){
+#if EV_BUFFER_DEBUG
+    	T_DBG_evFreeBuf = (u32)pBuf;
+    	T_DBG_evFreeBufLine = line;
+#endif
+
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_EV_BUFFER_EXCEPTION_FREE_OVERFLON);
+    }
+
+    ev_bufItem_t *pDelBuf = ev_buf_getHead(pBuf);
+
+    /* check whether the buffer is duplicated release */
+    if(ev_buf_isExisted(pDelBuf->groupIndex, (mem_block_t *)pDelBuf)){
+
+#if EV_BUFFER_DEBUG
+    	T_DBG_evFreeBuf = (u32)pBuf;
+    	T_DBG_evFreeBufLine = line;
+#endif
+
+    	ZB_EXCEPTION_POST(SYS_EXCEPTTION_EV_BUFFER_EXCEPTION_FREE_MULIT);
+
+    	drv_restore_irq(r);
+        return BUFFER_DUPLICATE_FREE;
+    }
+
+    mempool_free(ev_buf_v->bufGroups[pDelBuf->groupIndex].qHead, ev_buf_retriveMempoolHeader(pBuf));
+    ev_buf_v->bufGroups[pDelBuf->groupIndex].availBufNum++;    
+
+#if EV_BUFFER_DEBUG
+    pDelBuf->line = line;
+    pDelBuf->flag = 0xff;
+#endif
+
+    drv_restore_irq(r);
+    return BUFFER_SUCC;
+}
+
+/*********************************************************************
+ * @fn      ev_buf_getHead
+ *
+ * @brief   Get the header pointer of a buffer item 
+ *
+ * @param   pd - the pointer of a data, which is previously allocated
+ *
+ * @return  Pointer of bufferItem
+ */
+ev_bufItem_t *ev_buf_getHead(u8 *pd)
+{
+    return (ev_bufItem_t *)(pd - OFFSETOF(ev_bufItem_t, data));
+}
+
+/*********************************************************************
+ * @fn      ev_buf_getTail
+ *
+ * @brief   Get the pointer from a EV BUFFER tail.
+ *
+ * @param   pd - the pointer of a data, which is previously allocated
+ * @param   offsetToTail - The offset to Tail
+ *
+ * @return  Pointer of the specified memory
+ */
+u8 *ev_buf_getTail(u8 *pd, int offsetToTail)
+{
+	u32 index;
+	u16 size[DEFAULT_BUFFER_GROUP_NUM] = {BUFFER_GROUP_0, BUFFER_GROUP_1, BUFFER_GROUP_2};
+
+	memcpy((u8*)&index, pd - 4, 4);
+	assert((index < 3) && (index >= 0));
+	return (u8*)(pd - 8 + size[index] - offsetToTail);
+}
+
+u8 is_ev_buf(void *arg){
+	 if( ((u32)arg >= (u32)(size_0_mem) && (u32)arg <= ((u32)(size_0_mem) + sizeof(size_0_mem))) ||
+		 ((u32)arg >= (u32)(size_1_mem) && (u32)arg <= ((u32)(size_1_mem) + sizeof(size_1_mem))) ||
+		 ((u32)arg >= (u32)(size_2_mem) && (u32)arg <= ((u32)(size_2_mem) + sizeof(size_2_mem))) ||
+		 ((u32)arg >= (u32)(size_3_mem) && (u32)arg <= ((u32)(size_3_mem) + sizeof(size_3_mem))) ){
+		 return 1;
+	 }
+	 return 0;
+}
+
+u16 ev_buf_getFreeMaxSize(void)
+{
+	u16 size = 0;
+
+	for(u8 i = 0; i < DEFAULT_BUFFER_GROUP_NUM; i++){
+		if(ev_buf_v->bufGroups[i].availBufNum){
+			if((ev_buf_v->bufGroups[i].size - OFFSETOF(ev_bufItem_t, data)) > size){
+				size = ev_buf_v->bufGroups[i].size - OFFSETOF(ev_bufItem_t, data);
+			}
+		}
+	}
+
+	return size;
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.h
new file mode 100644
index 00000000..a0ace4da
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_buffer.h
@@ -0,0 +1,191 @@
+/********************************************************************************************************
+ * @file    ev_buffer.h
+ *
+ * @brief   This is the header file for ev_buffer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+
+/** @addtogroup  TELINK_COMMON_MODULE TELINK Common Module
+ *  @{
+ */
+#define EV_BUFFER_DEBUG						0
+
+/** @addtogroup  EV_BUFFER EV Buffer
+ *  @{
+ */
+ 
+/** @defgroup EV_BUFFER_CONSTANT EV Buffer Constants
+ *  @{
+ */
+
+
+/** @addtogroup ev_buffer_groups EV Buffer Groups 
+ * Definition the length of each buffer group
+ * @{
+ */
+#define BUFFER_GROUP_0                   	24
+#define BUFFER_GROUP_1                   	60
+#define BUFFER_GROUP_2                   	150
+#define BUFFER_GROUP_3                   	1024
+#define MAX_BUFFER_SIZE                  	(BUFFER_GROUP_3 - OFFSETOF(ev_bufItem_t, data))
+
+/** @} end of group ev_buffer_groups */
+
+/**
+ * @brief Default buffer number in each group
+ */
+#define BUFFER_NUM_IN_GROUP0             	8
+#define BUFFER_NUM_IN_GROUP1             	8
+#define BUFFER_NUM_IN_GROUP2             	8
+#define BUFFER_NUM_IN_GROUP3             	1
+
+/** @addtogroup ev_buffer_typical_size EV Buffer Typical Application Size
+ * Definition default buffer size for different typical usage
+ * @{
+ */
+#define SMALL_BUFFER                     	(BUFFER_GROUP_0 - 8)
+#define LARGE_BUFFER                     	(BUFFER_GROUP_3 - 8)
+
+
+/** @} end of group ev_buffer_typical_size */
+
+/** @} end of group EV_BUFFER_CONSTANT */
+
+
+/** @defgroup EV_BUFFER_TYPE EV Buffer Types
+ *  @{
+ */
+
+/**
+ *  @brief Definition of a buffer item, it is internal used.
+ */
+typedef struct ev_bufItem {
+    struct ev_bufItem *next;
+#if EV_BUFFER_DEBUG
+    u8  groupIndex;
+    u8  flag;
+    u16 line;
+#else
+    u32 groupIndex;
+#endif
+    u8  data[1];
+} ev_bufItem_t;
+
+/**
+ *  @brief Definition error code of EV buffer operation
+ */
+typedef enum buf_sts_e {
+    // SUCCESS always be ZERO
+	BUFFER_SUCC,
+    BUFFER_INVALID_PARAMETER = 1,  //!< Invalid parameter passed to the buffer API
+    BUFFER_DUPLICATE_FREE          //!< The same buffer is freed more than once
+} buf_sts_t;
+
+/**  @} end of group EV_BUFFER_TYPE */
+
+
+/** @defgroup EV_BUFFER_FUNCTIONS EV Buffer API
+ *  @brief Function declaration of EV Buffer module
+ *  @{
+ */
+
+/**
+ * @brief       Reset the EV Buffer module
+ *
+ * @param       None
+ *
+ * @return      None
+ */
+void ev_buf_reset(void);
+
+ /**
+  * @brief       Initialize the EV Buffer module
+  *
+  * @param       None
+  *
+  * @return      None
+  */
+void ev_buf_init(void);
+
+/**
+ * @brief       Allocate an available buffer according to the requested size
+ *              The allocated buffer will have only three kind of size, defined
+ *              in @ref EV_BUFFER_CONSTANT
+ *
+ * @param       size - The requested size
+ *
+ * @return      Pointer to an allocated buffer.
+ *              NULL means the there is no available buffer.
+ */
+#if EV_BUFFER_DEBUG
+u8 *my_ev_buf_allocate(u16 size, u16 line);
+#define ev_buf_allocate(size)	my_ev_buf_allocate(size, __LINE__)
+#else
+u8 *ev_buf_allocate(u16 size);
+#endif
+
+/**
+ * @brief       Free the specified buffer
+ *
+ * @param       pBuf - the pointer to the specified buffer to free.
+ *
+ * @return      Status.
+ */
+#if EV_BUFFER_DEBUG
+buf_sts_t my_ev_buf_free(u8 *pBuf, u16 line);
+#define ev_buf_free(pBuf)	my_ev_buf_free(pBuf, __LINE__)
+#else
+buf_sts_t ev_buf_free(u8 *pBuf);
+#endif
+
+/**
+ * @brief       Get the header of a buffer item
+ *
+ * @param       pd - the pointer of a data, which is previously allocated
+ *
+ * @return      Pointer of bufferItem
+ */
+ev_bufItem_t *ev_buf_getHead(u8 *pd);
+
+/**
+ * @brief       judge if the buffer is ev buffer
+ *
+ * @param       the buffer adrress
+ *
+ * @return      1: if ev buffer; 0: others
+ */
+u8 is_ev_buf(void *arg);
+
+u16 ev_buf_getFreeMaxSize(void);
+
+u8 *long_ev_buf_get(void);
+/**  @} end of group EV_BUFFER_FUNCTIONS */
+
+/**  @} end of group EV_BUFFER */
+
+/**  @} end of group TELINK_COMMON_MODULE */
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.c
new file mode 100644
index 00000000..1d3e47de
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.c
@@ -0,0 +1,85 @@
+/********************************************************************************************************
+ * @file    ev_poll.c
+ *
+ * @brief   This is the source file for ev_poll
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+#include "ev_poll.h"
+
+
+ev_poll_t ev_poll[EV_POLL_MAX];
+
+
+/**
+ * @brief       Schedule a new priority task
+ *
+ * @param[in]   e   - Specified poll event ID
+ * @param[in]   cb  - Pointer for the poll callback function
+ *
+ * @return      None
+ */
+void ev_on_poll(ev_poll_e e, ev_poll_callback_t cb)
+{
+	ev_poll[e].cb = cb;
+	ev_poll[e].valid = 1;
+}
+
+/**
+ * @brief       Enable the specified poll event
+ *
+ * @param[in]   e - Specified poll event ID
+ *
+ * @return      None
+ */
+void ev_enable_poll(ev_poll_e e)
+{
+	ev_poll[e].valid = 1;
+}
+
+/**
+ * @brief       Schedule a LOW Medium task
+ *
+ * @param[in]   e - Specified poll event ID
+ *
+ * @return      None
+ */
+void ev_disable_poll(ev_poll_e e)
+{
+	ev_poll[e].valid = 0;
+}
+
+/**
+ * @brief       Process poll events
+ *
+ * @param[in]   None
+ *
+ * @return      None
+ */
+void ev_poll_process(void){
+    for(u8 i = 0; i < EV_POLL_MAX; i++){
+        if(ev_poll[i].valid){
+        	ev_poll[i].cb();
+        }
+    }
+}
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.h
new file mode 100644
index 00000000..4d0d4bbd
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_poll.h
@@ -0,0 +1,92 @@
+/********************************************************************************************************
+ * @file    ev_poll.h
+ *
+ * @brief   This is the header file for ev_poll
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+/**
+ *  @brief Definition for poll callback function 
+ */
+typedef void (*ev_poll_callback_t)(void);
+ 
+/**
+ *  @brief Definition for each poll item 
+ */
+typedef struct ev_poll_s {
+    ev_poll_callback_t  cb;                 //!< Callback of the poll task
+    u32                 valid;              //!< Indicate the poll task is used or not
+} ev_poll_t; 
+
+
+extern ev_poll_t ev_poll[];
+
+/**
+ * @brief       Process poll events
+ *
+ * @param[in]   None
+ *
+ * @return      None
+ */
+void ev_poll_process(void);
+
+/**
+ * @brief       Schedule a new priority task
+ *
+ * @param[in]   e   - Specified poll event ID
+ * @param[in]   cb  - Pointer for the poll callback function
+ *
+ * @return      None
+ */
+void ev_on_poll(ev_poll_e e, ev_poll_callback_t cb);
+
+/**
+ * @brief       Enable the specified poll event
+ *
+ * @param[in]   e - Specified poll event ID
+ *
+ * @return      None
+ */
+void ev_enable_poll(ev_poll_e e);
+
+/**
+ * @brief       Schedule a LOW Medium task
+ *
+ * @param[in]   e - Specified poll event ID
+ *
+ * @return      None
+ */
+void ev_disable_poll(ev_poll_e e);
+
+ /**
+  * @brief       Schedule a Poll Task
+  *
+  * @param[in]   e    - Specified poll event ID
+  * @param[in]   task - Pointer for the task callback function
+  *
+  * @return      None
+  */
+#define EV_SCHEDULE_POLL(e, task) (ev_on_poll(e, task))
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.c
new file mode 100644
index 00000000..6d94b21a
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.c
@@ -0,0 +1,295 @@
+/********************************************************************************************************
+ * @file    ev_queue.c
+ *
+ * @brief   This is the source file for ev_queue
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+
+
+
+/*********************************************************************
+ * @fn      ev_queue_rawPush
+ *
+ * @brief   Push a raw data into a queue
+ *          The element must compatible with the format @ref queue_item_t
+ *
+ * @param   q - The specified queue
+ * @param   payload - Pointer to the new element 
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_rawPush( ev_queue_t* q, queue_item_t* newElement )
+{
+    queue_item_t* previous;
+    queue_item_t* current;
+
+    if (NULL == q || NULL == newElement) {
+        return QUEUE_INVALID_PARAMETER;
+    }
+
+    u32 r = drv_disable_irq();
+
+    /* if the Q was empty, then update the head */
+    if (NULL==q->head) {
+        q->head = newElement;
+        q->tail = newElement;
+        newElement->next = NULL;
+        q->curNum++;
+        drv_restore_irq(r);
+        return (ev_queue_sts_t)SUCCESS;
+    }
+    /* find a place for insertion */
+    previous = NULL;
+    current = q->head;
+
+    if (NULL == q->priFunc) { /* if priority is not used, insert at the end as in a FIFO */
+        q->tail->next = newElement;
+        newElement->next = NULL;
+        q->tail = newElement;
+    } else { /* if priority is used, insert at the end */
+        while (current!=NULL) {
+            /* Here, a small priority value has a higher priority */
+            if(q->priFunc((arg_t)(newElement)) < q->priFunc((arg_t)(current))) {
+                break;
+            } else {
+                previous = current;
+                current = current->next;
+            }
+        }
+        /* insert between previous and current */
+        if(NULL==previous) { /* insert at the head */
+            q->head = newElement;
+        } else {
+            previous->next = newElement;
+        }
+        newElement->next = current;
+        if (NULL==current){
+            q->tail = newElement;
+        }
+    }
+    q->curNum++;
+
+    drv_restore_irq(r);
+    return (ev_queue_sts_t)SUCCESS;
+}
+
+/*********************************************************************
+ * @fn      ev_queue_rawPop
+ *
+ * @brief   Pop data part of the element from the speified queue.
+ *
+ * @param   q - The specified queue
+ *
+ * @return  Pointer to first element in the queue
+ */
+queue_item_t* ev_queue_rawPop(ev_queue_t* q)
+{
+    queue_item_t* oldHead;
+
+    u32 r = drv_disable_irq();
+
+    oldHead = q->head;
+    if (NULL!=oldHead){
+        if (oldHead == q->tail) {
+            q->tail = NULL;
+        }
+        /* update the head pointer */
+        q->head = oldHead->next;
+        q->curNum--;
+    }
+
+	if ( q->curNum == 0 ) {
+		q->head = q->tail = NULL;
+	}
+	drv_restore_irq(r);
+    return oldHead;
+}
+
+/*********************************************************************
+ * @fn      ev_queue_rawDelete
+ *
+ * @brief   Delete an element from the queue
+ *
+ * @param   q - The specified queue
+ * @param   payload - Pointer to data part of the bufferItem that is to be deleted
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_rawDelete(ev_queue_t* q, queue_item_t* delElement)
+{
+    queue_item_t* previous;
+    queue_item_t* current;
+
+    if (NULL == q || NULL == delElement) {
+        return QUEUE_INVALID_PARAMETER;
+    }
+
+    u32 r = drv_disable_irq();
+
+    if (NULL == q->head) { /* invalid q or newElement */
+    	drv_restore_irq(r);
+        return QUEUE_EMPTY;
+    }
+
+    if (q->head == delElement) {
+        q->head = q->head->next;
+        if (NULL == q->head){
+            q->tail = NULL;
+        }
+        q->curNum--;
+        drv_restore_irq(r);
+        return (ev_queue_sts_t)SUCCESS;
+    }
+
+    /* find the to be delete node */
+    previous = NULL;
+    current = q->head;
+
+    while(current != delElement && current) {
+        previous = current;
+        current = current->next;
+    }
+
+    if (current) {
+        /* find it. */
+        previous->next = current->next;
+        if (NULL == current->next) {
+            q->tail = previous;
+        }
+        q->curNum--;
+    }
+    else {
+        /* element not in the Queue */
+    	drv_restore_irq(r);
+        return QUEUE_NOT_FOUND;
+
+    }
+
+    drv_restore_irq(r);
+    return (ev_queue_sts_t)SUCCESS;
+}
+
+
+
+/*********************************************************************
+ * @fn      ev_queue_init
+ *
+ * @brief   Initialize the EV queue 
+ *
+ * @param   q - The queue need to use
+ * @param   priFunc - Pointer to the function that calculates a priority
+ *                    NULL means not use the priority feature
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_init( ev_queue_t *q, ev_priFunc_t priFunc)
+{
+    if (NULL == q) {
+        return QUEUE_INVALID_PARAMETER;
+    }
+
+    memset((u8*)q, 0 , sizeof(ev_queue_t));
+    q->priFunc = priFunc;
+    return (ev_queue_sts_t)SUCCESS;
+}
+
+
+/*********************************************************************
+ * @fn      ev_queue_push
+ *
+ * @brief   Push a data part of an element into a queue
+ *
+ * @param   q - The queue that a new element need to push to
+ * @param   payload - The payload of the new element   
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_push( ev_queue_t* q, u8* payload )
+{
+    queue_item_t* newElement;
+    newElement = (queue_item_t*)ev_buf_getHead(payload);
+    return ev_queue_rawPush(q, newElement);
+}
+
+
+/*********************************************************************
+ * @fn      ev_queue_pop
+ *
+ * @brief   Pop data part of the element from the specified queue.
+ *
+ * @param   q - The queue that element need to pop from
+ *
+ * @return  Pointer to data part of the @ev_bufItem_t
+ */
+u8* ev_queue_pop( ev_queue_t* q )
+{
+    queue_item_t* oneItem = ev_queue_rawPop(q);
+
+    if (NULL==oneItem) {
+        return NULL;
+    } else {
+        return ((ev_bufItem_t*)oneItem)->data;
+    }
+}
+
+/*********************************************************************
+ * @fn      ev_queue_delete
+ *
+ * @brief   Delete an element from the queue
+ *
+ * @param   q - The specified queue
+ * @param   payload - Pointer to data part of the buffer that is to be deleted
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_delete( ev_queue_t* q, u8* payload )
+{
+    queue_item_t* delElement = (queue_item_t*)ev_buf_getHead(payload);
+    return ev_queue_rawDelete(q, delElement);
+}
+
+
+/*********************************************************************
+ * @fn      ev_queue_freeQ
+ *
+ * @brief   Free a queue. This also deallocates all buffers in the queue.
+ *
+ * @param   q - The specified queue to free
+ *
+ * @return  Status
+ */
+ev_queue_sts_t ev_queue_freeQ( ev_queue_t *q )
+{
+    u8 *buffer_ptr;
+    if (NULL == q) { /* invalid q or newElement */
+        return QUEUE_INVALID_PARAMETER;
+    }
+
+    while (NULL != (buffer_ptr = ev_queue_pop(q))) {
+        ev_buf_free(buffer_ptr);
+    }
+
+    return (ev_queue_sts_t)SUCCESS;
+}
+
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.h
new file mode 100644
index 00000000..512deb88
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_queue.h
@@ -0,0 +1,180 @@
+/********************************************************************************************************
+ * @file    ev_queue.h
+ *
+ * @brief   This is the header file for ev_queue
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+
+
+/** @addtogroup  TELINK_COMMON_MODULE TELINK Common Module
+ *  @{
+ */
+
+/** @addtogroup  EV_QUEUE EV Queue
+ *  @{
+ */
+ 
+/** @defgroup EV_QUEUE_TYPE EV QUEUE Types
+ *  @{
+ */
+
+/**        
+ *  @brief Definition for priority calculate function
+ */
+typedef u32 (*ev_priFunc_t)(arg_t);
+
+/**        
+ *  @brief Structure of an item in the EV Queue
+ */
+typedef struct queue_item {
+    struct queue_item *next;        //!<  Pointer to the next element
+    u32 idx;
+    u8 data[1];                     //!<  Pointer to the data
+} queue_item_t;
+
+
+/**
+ *  @brief Definition for the EV Queue structure
+ */
+typedef struct priQueue {
+    queue_item_t *head;             //!<  Pointer to the head item of the queue
+    queue_item_t *tail;             //!<  Pointer to the tail item of the queue
+    ev_priFunc_t priFunc;           //!<  Priority function, NULL means not use priority
+    u32 curNum;                     //!<  Current number of entries in the queue
+} ev_queue_t;
+
+/**
+ *  @brief Definition for the status of the EV Queue Module
+ */
+typedef enum ev_queue_sts_e {
+    // SUCCESS should always be ZERO
+	QUEUE_SUCC = 0,
+    QUEUE_INVALID_PARAMETER = 1,    //!< Invalid parameter of the API
+    QUEUE_EMPTY,                    //!< Queue is empty
+    QUEUE_NOT_FOUND,                //!< Queue is not found
+    QUEUE_OVERFLOW,                 //!< Queue is overflowed
+} ev_queue_sts_t;
+
+/**  @} end of group EV_QUEUE_TYPE */
+
+
+/** @defgroup EV_QUEUE_FUNCTIONS EV Queue API
+ *  @brief Function declaration of EV Queue module
+ *  @{
+ */
+
+ /**
+   * @brief       Initialize the EV queue 
+   *
+   * @param[in]   q        - The queue need to use
+   * @param[in]   priFunc  - Pointer to the function that calculates a priority
+   *                         NULL means not use the priority feature
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_init( ev_queue_t *q, ev_priFunc_t priFunc);
+
+
+ /**
+   * @brief       Push a data part of an element into a queue
+   *
+   * @param[in]   q        - The queue that a new element need to push to
+   * @param[in]   payload  - The payload of the new element  
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_push( ev_queue_t* q, u8* payload );
+
+
+/**
+  * @brief       Pop data part of the element from the specified queue.
+  *
+  * @param[in]   q - The queue that element need to pop from
+  *
+  * @return      Pointer to data part of the @ev_bufItem_t
+  */
+u8* ev_queue_pop( ev_queue_t* q );
+
+
+  /**
+   * @brief       Delete an element from the queue
+   *
+   * @param[in]   q        - The specified queue
+   * @param[in]   payload  - Pointer to data part of the buffer that is to be deleted
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_delete( ev_queue_t* q, u8* payload );
+
+
+  /**
+   * @brief       Free a queue. This also deallocates all buffers in the queue.
+   *
+   * @param[in]   q - The specified queue to free
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_freeQ( ev_queue_t* q);
+
+
+  /**
+   * @brief       Push a raw data into a queue
+   *              The element must compatible with the format @ref queue_item_t
+   *
+   * @param[in]   q       - The specified queue
+   * @param[in]   element - Pointer to the new element  
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_rawPush( ev_queue_t* q, queue_item_t* element );
+
+
+ /**
+   * @brief       Delete an element from the queue
+   *              The element must compatible with the format @ref queue_item_t
+   *
+   * @param[in]   q       - The specified queue
+   * @param[in]   element - Pointer to data part of the bufferItem that is to be deleted
+   *
+   * @return      Status
+   */
+ev_queue_sts_t ev_queue_rawDelete(ev_queue_t* q, queue_item_t* element);
+
+
+ /**
+  * @brief       Pop data part of the element from the speified queue. 
+  *
+  * @param[in]   q - The specified queue
+  *
+  * @return      Pointer to first element in the queue
+  */
+queue_item_t* ev_queue_rawPop(ev_queue_t* q);
+
+/**  @} end of group EV_QUEUE_FUNCTIONS */
+
+/**  @} end of group EV_QUEUE */
+
+/**  @} end of group TELINK_COMMON_MODULE */
+
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.c b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.c
new file mode 100644
index 00000000..3ce4291d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.c
@@ -0,0 +1,312 @@
+/********************************************************************************************************
+ * @file    ev_timer.c
+ *
+ * @brief   This is the source file for ev_timer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#include "../tl_common.h"
+#include "ev_timer.h"
+
+typedef struct{
+	ev_timer_event_t *timer_head;		//timer events is sorted, use single linked list
+	ev_timer_event_t *timer_nearest;	//the nearest fired timer
+
+	ev_timer_event_pool_t timerEventPool;
+}ev_timer_ctrl_t;
+
+u8 g_ev_timer_maxNum = TIMER_EVENT_NUM;
+ev_timer_ctrl_t ev_timer;
+
+static u32 prevSysTick = 0;
+static u32 remSysTick = 0;
+
+void ev_timer_init(void)
+{
+	memset((u8 *)&ev_timer, 0, sizeof(ev_timer));
+}
+
+void ev_timer_setPrevSysTick(u32 tick)
+{
+	prevSysTick = tick;
+}
+
+ev_timer_event_t *ev_timer_nearestGet(void)
+{
+	return ev_timer.timer_nearest;
+}
+
+ev_timer_event_t *ev_timer_freeGet(void)
+{
+	if(ev_timer.timerEventPool.used_num >= g_ev_timer_maxNum){
+		return NULL;
+	}
+
+	for(u8 i = 0; i < g_ev_timer_maxNum; i++){
+		if(ev_timer.timerEventPool.evt[i].used == 0){
+			ev_timer.timerEventPool.evt[i].used = 1;
+			ev_timer.timerEventPool.used_num++;
+			return &ev_timer.timerEventPool.evt[i];
+		}
+	}
+
+	return NULL;
+}
+
+void ev_timer_poolDelUpdate(ev_timer_event_t *evt)
+{
+	evt->isRunning = 0;
+	evt->curSysTick = 0;
+
+	if(((u32)evt >= (u32)&ev_timer.timerEventPool.evt[0]) &&
+	   ((u32)evt <= (u32)&ev_timer.timerEventPool.evt[g_ev_timer_maxNum - 1]) &&
+	   (evt->used)){
+		evt->used = 0;
+		ev_timer.timerEventPool.used_num--;
+	}
+}
+
+void ev_timer_nearestUpdate(void)
+{
+	ev_timer_event_t *timerEvt = ev_timer.timer_head;
+
+	ev_timer.timer_nearest = ev_timer.timer_head;
+
+	while(timerEvt){
+		if(timerEvt->timeout < ev_timer.timer_nearest->timeout){
+			ev_timer.timer_nearest = timerEvt;
+		}
+		timerEvt = timerEvt->next;
+	}
+}
+
+bool ev_timer_enough(void)
+{
+	if(ev_timer.timerEventPool.used_num < TIMER_EVENT_ENOUGH_NUM){
+		return TRUE;
+	}
+	return FALSE;
+}
+
+bool ev_timer_exist(ev_timer_event_t *evt)
+{
+	ev_timer_event_t *timerEvt = ev_timer.timer_head;
+
+    while(timerEvt){
+        if(timerEvt == evt){
+            return TRUE;
+        }
+        timerEvt = timerEvt->next;
+    }
+    return FALSE;
+}
+
+void ev_on_timer(ev_timer_event_t *evt, u32 timeout)
+{
+	if(!evt){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_TIMER_EVEVT);
+		return;
+	}
+
+	evt->period = timeout;
+
+	u32 r = drv_disable_irq();
+
+	ev_timer_event_t *out = NULL;
+
+	LIST_EXIST(ev_timer.timer_head, evt, out);
+	if(out){
+		out->timeout = evt->period;
+	}else{
+		if(evt->isRunning == 0){
+			evt->curSysTick = clock_time();
+		}
+		evt->timeout = evt->period;
+		LIST_ADD(ev_timer.timer_head, evt);
+	}
+
+	ev_timer_nearestUpdate();
+
+	drv_restore_irq(r);
+}
+
+void ev_unon_timer(ev_timer_event_t *evt)
+{
+	if(!evt){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_TIMER_EVEVT);
+		return;
+	}
+
+	ev_timer_event_t *out = NULL;
+	LIST_EXIST(ev_timer.timer_head, evt, out);
+	if(!out){
+		return;
+	}
+
+	u32 r = drv_disable_irq();
+
+	ev_timer_poolDelUpdate(evt);
+
+	LIST_DELETE(ev_timer.timer_head, evt);
+
+	ev_timer_nearestUpdate();
+
+	drv_restore_irq(r);
+}
+
+ev_timer_event_t *ev_timer_add(ev_timer_callback_t func, void *arg, u32 timeout)
+{
+	ev_timer_event_t *timerEvt = ev_timer_freeGet();
+	if(!timerEvt){
+		ZB_EXCEPTION_POST(SYS_EXCEPTTION_COMMON_TIMER_EVEVT);
+		return NULL;
+	}
+
+	timerEvt->cb = func;
+	timerEvt->data = arg;
+
+	ev_on_timer(timerEvt, timeout);
+
+	return timerEvt;
+}
+
+ev_timer_event_t *ev_timer_taskPost(ev_timer_callback_t func, void *arg, u32 t_ms)
+{
+	ev_timer_event_t *timerEvt = NULL;
+
+	u32 r = drv_disable_irq();
+
+	timerEvt = ev_timer_add(func, arg, t_ms);
+
+	drv_restore_irq(r);
+
+	return timerEvt;
+}
+
+u8 ev_timer_taskCancel(ev_timer_event_t **evt)
+{
+	u8 ret = NO_TIMER_AVAIL;
+	ev_timer_event_t *timerEvt = *evt;
+
+	if(!timerEvt || !timerEvt->used){
+		return ret;
+	}
+
+	ev_unon_timer(timerEvt);
+
+	*evt = NULL;
+
+	return SUCCESS;
+}
+
+void ev_timer_update(u32 updateTime)
+{
+	u32 updateTimeMs = 0;
+	u32 curSysTick = clock_time();
+
+	if(updateTime == 0){
+		return;
+	}
+
+	u32 r = drv_disable_irq();
+
+	ev_timer_event_t *timerEvt = ev_timer.timer_head;
+
+	while(timerEvt){
+		if(timerEvt->isRunning){
+			/* Elapsed time, including time that may be blocked. */
+			updateTimeMs = updateTime;
+		}else{
+			/* Just calculate the elapsed time from the time of registration to the present. */
+			updateTimeMs = (curSysTick - timerEvt->curSysTick) / (S_TIMER_CLOCK_1US * 1000);
+
+			timerEvt->isRunning = 1;
+		}
+
+		if(timerEvt->timeout > updateTimeMs){
+			timerEvt->timeout -= updateTimeMs;
+		}else{
+			timerEvt->timeout = 0;
+		}
+
+		timerEvt = timerEvt->next;
+	}
+
+	drv_restore_irq(r);
+}
+
+void ev_timer_executeCB(void)
+{
+	ev_timer_event_t *timerEvt = ev_timer.timer_head;
+	ev_timer_event_t *prev_head = timerEvt;
+
+	while(timerEvt){
+		if(timerEvt->timeout == 0){
+			s32 t = timerEvt->cb(timerEvt->data);
+
+			if(t < 0){
+				ev_unon_timer(timerEvt);
+			}else if(t == 0){
+				timerEvt->timeout = timerEvt->period;
+			}else{
+				timerEvt->period = (u32)t;
+				timerEvt->timeout = timerEvt->period;
+			}
+
+			if(prev_head != ev_timer.timer_head){
+				timerEvt = ev_timer.timer_head;
+				prev_head = timerEvt;
+			}else{
+				timerEvt = timerEvt->next;
+			}
+		}else{
+			timerEvt = timerEvt->next;
+		}
+	}
+
+	ev_timer_nearestUpdate();
+}
+
+void ev_timer_process(void)
+{
+	u32 updateTime = 0;
+	u32 sysTicks = 0;
+	u32 currSysTick = clock_time();
+
+	if(currSysTick != prevSysTick){
+		sysTicks = (u32)(currSysTick - prevSysTick);
+
+		/* store current ticks. */
+		prevSysTick = currSysTick;
+
+		updateTime = sysTicks / (S_TIMER_CLOCK_1US * 1000);
+		remSysTick += sysTicks % (S_TIMER_CLOCK_1US * 1000);
+
+		updateTime += remSysTick / (S_TIMER_CLOCK_1US * 1000);
+		remSysTick = remSysTick % (S_TIMER_CLOCK_1US * 1000);
+
+		/* more than 1 ms. */
+		if(updateTime){
+			ev_timer_update(updateTime);
+			ev_timer_executeCB();
+		}
+	}
+}
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.h
new file mode 100644
index 00000000..102c824b
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/os/ev_timer.h
@@ -0,0 +1,144 @@
+/********************************************************************************************************
+ * @file    ev_timer.h
+ *
+ * @brief   This is the header file for ev_timer
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+/**
+ *  @brief Definition for timer event
+ */
+#define TIMER_EVENT_NUM				(24)
+#define TIMER_EVENT_ENOUGH_NUM		(TIMER_EVENT_NUM - 4)
+
+/**
+ *  @brief Type definition for timer callback function
+ */
+typedef int (*ev_timer_callback_t)(void *data);
+ 
+/**
+ *  @brief Type definition for timer event
+ */
+typedef struct ev_timer_event_t {
+	struct ev_timer_event_t *next;  //!< Used internal
+
+    ev_timer_callback_t     cb;     //!< Callback function when expire, this must be specified
+    void *data;         			//!< Callback function arguments.
+    u32 timeout;             		//!< In millisecond
+    u32 period;      				//!< Used internal
+    u32 curSysTick;					//!< Used internal, system tick when registering
+	u8 resv[2];
+	u8 isRunning;					//!< Used internal
+    u8 used;						//!< Used internal
+} ev_timer_event_t;
+
+typedef struct ev_timer_event_pool_s {
+	ev_timer_event_t evt[TIMER_EVENT_NUM];
+    u32 used_num;
+} ev_timer_event_pool_t;
+
+
+bool ev_timer_enough(void);
+void ev_timer_update(u32 updateTime);
+void ev_timer_setPrevSysTick(u32 tick);
+
+/**
+ * @brief       EV timer pool initialization
+ *
+ * @param[in]   None
+ *
+ * @return      None
+ */
+void ev_timer_init(void);
+
+/**
+ * @brief       Process EV timer events
+ *
+ * @param[in]   None
+ *
+ * @return      None
+ */
+void ev_timer_process(void);
+
+/**
+ * @brief       Get the nearest EV timer events
+ *
+ * @param[in]   None
+ *
+ * @return      None
+ */
+ev_timer_event_t *ev_timer_nearestGet(void);
+
+/**
+  * @brief       Check whether a specified timer exist or not
+  *
+  * @param[in]   evt  - The specified timer event
+  *
+  * @return      True indicating the timer is already exist. <BR>
+  *              False indicating the timer is not exist. <BR>
+  */
+bool ev_timer_exist(ev_timer_event_t *evt);
+
+/**
+  * @brief       Set a new timer
+  *
+  * @param[in]   evt  		- The timer event including the callback function
+  * @param[in]   timeout 	- Timeout in millisecond
+  *
+  * @return      None
+  */
+void ev_on_timer(ev_timer_event_t *evt, u32 timeout);
+
+/**
+  * @brief       Cancel an existed timer
+  *
+  * @param[in]   e  - The existed timer event
+  *
+  * @return      None
+  */
+void ev_unon_timer(ev_timer_event_t *evt);
+
+/**
+  * @brief       push timer task to task list
+  *
+  * @param[in]   func - the callback of the timer event
+  *
+  * @param[in]   arg - the parameter to the callback
+  *
+  * @param		 cycle - the timer interval
+  *
+  * @return      the status
+  */
+ev_timer_event_t *ev_timer_taskPost(ev_timer_callback_t func, void *arg, u32 t_ms);
+#define TL_ZB_TIMER_SCHEDULE(cb, arg, timeout) 	(ev_timer_taskPost((cb), (arg), (timeout)))
+
+/**
+  * @brief       cancel timer task from task list
+  *
+  * @param[in]   te - the pointer to the the timer event pointer
+  *
+  * @return      the status
+  */
+u8 ev_timer_taskCancel(ev_timer_event_t **evt);
+#define TL_ZB_TIMER_CANCEL(evt)	(ev_timer_taskCancel(evt))
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/tl_common.h b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/tl_common.h
new file mode 100644
index 00000000..1a8d81ec
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/proj/tl_common.h
@@ -0,0 +1,64 @@
+/********************************************************************************************************
+ * @file    tl_common.h
+ *
+ * @brief   This is the header file for tl_common
+ *
+ * @author  Zigbee Group
+ * @date    2021
+ *
+ * @par     Copyright (c) 2021, Telink Semiconductor (Shanghai) Co., Ltd. ("TELINK")
+ *          All rights reserved.
+ *
+ *          Licensed under the Apache License, Version 2.0 (the "License");
+ *          you may not use this file except in compliance with the License.
+ *          You may obtain a copy of the License at
+ *
+ *              http://www.apache.org/licenses/LICENSE-2.0
+ *
+ *          Unless required by applicable law or agreed to in writing, software
+ *          distributed under the License is distributed on an "AS IS" BASIS,
+ *          WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ *          See the License for the specific language governing permissions and
+ *          limitations under the License.
+ *
+ *******************************************************************************************************/
+
+#pragma once
+
+
+#include "app_cfg.h"
+#include "platform.h"
+
+#include "common/types.h"
+#include "common/compiler.h"
+#include "common/static_assert.h"
+#include "common/assert.h"
+#include "common/bit.h"
+#include "common/utility.h"
+#include "common/utlist.h"
+#include "common/list.h"
+#include "common/string.h"
+#include "common/tlPrintf.h"
+#include "common/mempool.h"
+
+#include "os/ev_poll.h"
+#include "os/ev_buffer.h"
+#include "os/ev_queue.h"
+#include "os/ev_timer.h"
+#include "os/ev.h"
+
+#include "drivers/drv_hw.h"
+#include "drivers/drv_radio.h"
+#include "drivers/drv_gpio.h"
+#include "drivers/drv_adc.h"
+#include "drivers/drv_flash.h"
+#include "drivers/drv_i2c.h"
+#include "drivers/drv_spi.h"
+#include "drivers/drv_pwm.h"
+#include "drivers/drv_uart.h"
+#include "drivers/drv_pm.h"
+#include "drivers/drv_timer.h"
+#include "drivers/drv_keyboard.h"
+#include "drivers/drv_nv.h"
+#include "drivers/drv_usb.h"
+#include "drivers/drv_calibration.h"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw.sh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw.sh
new file mode 100644
index 00000000..fb6e8846
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw.sh
@@ -0,0 +1,11 @@
+#!/bin/bash 
+echo "*****************************************************"
+echo "this is post build!! current configure is :$1"
+if [[ $2 = tc32 ]]; then
+	tc32-elf-objcopy -v -O binary $1.elf  $1.bin
+	../../../tools/tl_check_fw2.exe  $1.bin
+elif [[ $2 = riscv ]]; then
+	riscv32-elf-objcopy -S -O binary $1.elf  output/$1.bin
+	../../../tools/tl_check_fw2.exe  output/$1.bin
+fi
+echo "**************** end of post build ******************"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw2.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw2.exe
new file mode 100644
index 00000000..cf83f0bb
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_check_fw2.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_link_load.sh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_link_load.sh
new file mode 100644
index 00000000..09667d28
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tl_zigbee_sdk/tools/tl_link_load.sh
@@ -0,0 +1,6 @@
+#!/bin/bash 
+echo "*****************************************************"
+echo "this is post build!! current configure is :$1"
+rm -rf $2
+cp -f $1 $2
+echo "**************** end of post build ******************"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrComProg.py b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrComProg.py
new file mode 100644
index 00000000..00146990
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrComProg.py
@@ -0,0 +1,519 @@
+#!/usr/bin/env python
+ 
+### TlsrComProg.py ###
+###  Autor: pvvx   ###
+ 
+import sys
+import signal
+import struct
+import serial
+import platform
+import time
+import argparse
+import os
+import io
+
+__progname__ = 'TLSR825x Floader'
+__filename__ = 'TlsrComProg'
+__version__ = "10.11.20"
+
+CMD_VER	 = b'\x00'	# Get version 
+CMD_RBF	 = b'\x01'	# Read Block Flash
+CMD_WBF	 = b'\x02'	# Write Block Flash
+CMD_EFS	 = b'\x03'	# Erase Flash Sectors
+CMD_EAF  = b'\x04'	# Erase All Flash
+CMD_JDC	 = b'\x05'	# Get Flash JEDEC ID
+
+FLASH_SECTOR_SIZE = 4096
+
+class FatalError(RuntimeError):
+	def __init__(self, message):
+		RuntimeError.__init__(self, message)
+
+	@staticmethod
+	def WithResult(message, result):
+		message += " (result was %s)" % hexify(result)
+		return FatalError(message)
+
+def signal_handler(signal, frame):
+	print()
+	print('Keyboard Break!')
+	sys.exit(0)
+
+crctable = (
+0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
+0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
+0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
+0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
+0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
+0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
+0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
+0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
+0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
+0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
+0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
+0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
+0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
+0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
+0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
+0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
+0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
+0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
+0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
+0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
+0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
+0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
+0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
+0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
+0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
+0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
+0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
+0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
+0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
+0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
+0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
+0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 )
+def crc16(data: bytearray, length):
+	crc = 0xFFFF
+	for i in range(0, length):
+		crc = (crc >> 8) ^ crctable[(crc ^ data[i]) & 0xFF]
+	return bytearray([crc&0xFF,(crc>>8)&0xFF])
+def crc_blk(data: bytearray):
+	return data+crc16(data, len(data))
+def crc_chk(data: bytearray):
+	c = data[len(data)-2:];
+	if c == crc16(data, len(data)-2):
+		return 1
+	return 0
+def arg_auto_int(x):
+	return int(x, 0)
+def sws_code_blk(blk):
+	pkt=[]
+	d = bytearray([0xe8,0xef,0xef,0xef,0xef])
+	for el in blk:
+		if (el & 0x80) != 0:
+			d[0] &= 0x0f
+		if (el & 0x40) != 0:
+			d[1] &= 0xe8
+		if (el & 0x20) != 0:
+			d[1] &= 0x0f
+		if (el & 0x10) != 0:
+			d[2] &= 0xe8
+		if (el & 0x08) != 0:
+			d[2] &= 0x0f
+		if (el & 0x04) != 0:
+			d[3] &= 0xe8
+		if (el & 0x02) != 0:
+			d[3] &= 0x0f
+		if (el & 0x01) != 0:
+			d[4] &= 0xe8
+		pkt += d 
+		d = bytearray([0xef,0xef,0xef,0xef,0xef])
+	return pkt
+def sws_rd_addr(addr):
+	return sws_code_blk(bytearray([0x5a, (addr>>16)&0xff, (addr>>8)&0xff, addr & 0xff, 0x80]))
+def sws_code_end():
+	return sws_code_blk(b'\xff')
+def sws_wr_addr(addr, data):
+	return sws_code_blk(bytearray([0x5a, (addr>>16)&0xff, (addr>>8)&0xff, addr & 0xff, 0x00]) + bytearray(data)) + sws_code_end()
+
+#--------------------
+def EraseSectorsFlash(rs, offset = 0, count = 1):
+	cnt_err = 2
+	size = count * FLASH_SECTOR_SIZE
+	offset = offset & (0xffffff^(FLASH_SECTOR_SIZE-1))
+	ret = 1
+	for i in range(count):
+		print('\rErase sector at 0x%06x...' % offset, end = '')
+		while 1:
+			blk = struct.pack('<BBH', ord(CMD_EFS), offset & 0xff,	(offset>>8) & 0xffff)
+			ret = rs.write(crc_blk(blk))
+			data = rs.read(6)
+			if len(data) != 6 or data[0] != ord(CMD_EFS) or not crc_chk(data):
+				cnt_err -= 1
+				if cnt_err == 0:
+					print('\rError Erase sector at 0x%06x!' % offset)
+					return 0
+				print(' Error', cnt_err)
+			else:
+				cnt_err = 2
+			break
+		offset += FLASH_SECTOR_SIZE
+	print('\r                               \r',  end = '')
+	return ret
+#--------------------
+def EraseAllFlash(rs):
+	blk = struct.pack('<BBH', ord(CMD_EAF), 0, 0)
+	ret = rs.write(crc_blk(blk))
+	data = rs.read(6)
+	if len(data) != 6 or data[0] != ord(CMD_EAF) or not crc_chk(data):
+		print('\rError Erase All Flash!')
+		return 0
+	return ret
+#--------------------
+def WriteBlockFlash(rs, stream, offset = 0, size = 0, erase = True):
+	cnt_err = 2
+	offset &= 0xffffff
+	wrsize = 1024
+	ret = 1
+	if erase and (offset & (FLASH_SECTOR_SIZE-1)) != 0:
+		erasec = offset & (0xffffff^(FLASH_SECTOR_SIZE-1))
+	else:
+		erasec = 0xffffffff
+	while size > 0:
+		if erase:
+			wrsec = offset & (0xffffff^(FLASH_SECTOR_SIZE-1))
+			if erasec != wrsec:
+				print('\rErase at 0x%06x...' % offset, end = '')
+				while 1:
+					blk = struct.pack('<BBH', ord(CMD_EFS), offset & 0xff,	(offset>>8) & 0xffff)
+					ret = rs.write(crc_blk(blk))
+					data = rs.read(6)
+					if len(data) != 6 or data[0] != ord(CMD_EFS) or not crc_chk(data):
+						cnt_err -= 1
+						if cnt_err == 0:
+							print('\rError Erase sector at 0x%06x!' % offset)
+							return 0
+						print(' Error', cnt_err)
+					else:
+						cnt_err = 2
+					break
+				erasec = wrsec
+		data = stream.read(wrsize)
+		wrsize = len(data)
+		if not data or wrsize == 0: # end of stream
+			print(' Error Read file!')
+			return 0
+		for e in data:
+			if e != 0xff:
+				while 1:
+					print('\rWrite to 0x%04x...' % offset, end = '')
+					ret = rs.write(crc_blk(struct.pack('<BBH',ord(CMD_WBF),offset & 0xff,(offset>>8) & 0xffff)+data))
+					rdata = rs.read(6);
+					if len(rdata) != 6 or rdata[0] != ord(CMD_WBF) or not crc_chk(rdata):
+						cnt_err -= 1
+						if cnt_err == 0:
+							print('\rError Write Flash data at 0x%06x!' % offset)
+							return 0
+						print(' Error', cnt_err)
+					else:
+						cnt_err = 2
+					break
+				break
+		offset += wrsize
+		size -= wrsize
+	print('\r                               \r',  end = '')
+	return ret
+#--------------------
+def ReadBlockFlash(rs, stream, offset = 0, size = 0x80000):
+	cnt_err = 2
+	offset &= 0xffffff
+	rdsize = 1024
+	ret = 1
+	while size > 0:
+		if rdsize > size:
+			rdsize = size
+		print('\rRead from 0x%06x...' % offset, end = '')
+		while 1:
+			blk = struct.pack('<BBHH', ord(CMD_RBF), offset & 0xff,	(offset>>8) & 0xffff, rdsize)
+			ret = rs.write(crc_blk(blk))
+			data = rs.read(rdsize+6)
+			if len(data) != rdsize + 6 or data[0] != ord(CMD_RBF) or not crc_chk(data):
+				cnt_err -= 1
+				if cnt_err == 0:
+					print('\rError Read Flash data at 0x%06x!' % offset)
+					return 0
+				print(' Error', cnt_err)
+			else:
+				cnt_err = 2
+			break
+		stream.write(data[4:rdsize+4]);
+		size -= rdsize
+		offset += rdsize
+	print('\r                               \r',  end = '')
+	return ret
+#============================= main()
+def main():
+	signal.signal(signal.SIGINT, signal_handler)
+	parser = argparse.ArgumentParser(description='%s version %s' % (__progname__, __version__), prog=__filename__)
+	parser.add_argument(
+		'--port', '-p',
+		help='Serial port device (default: COM1)',
+		default='COM1')
+	parser.add_argument(
+		'--tact','-t', 
+		help='Time Activation ms (0-off, default: 600 ms)', 
+		type=arg_auto_int, 
+		default=600)
+	parser.add_argument(
+		'--fldr','-f', 
+		help='Filename floader (default: floader.bin)', 
+		default='floader.bin')
+	parser.add_argument(
+		'--baud','-b', 
+		help='UART Baud Rate (default: 230400)', 
+		type=arg_auto_int, 
+		default=230400)
+	subparsers = parser.add_subparsers(
+			dest='operation',
+			help='Run '+__filename__+' {command} -h for additional help')
+
+	parser_read_flash = subparsers.add_parser(
+			'rf',
+			help='Read Flash to binary file')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash.add_argument('filename', help='Name of binary file')
+
+	parser_burn_flash = subparsers.add_parser(
+			'we',
+			help='Write file to Flash with sectors erases')
+	parser_burn_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_burn_flash.add_argument('filename', help='Name of binary file')
+
+	parser_write_flash = subparsers.add_parser(
+			'wf',
+			help='Write file to Flash without sectors erases')
+	parser_write_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_write_flash.add_argument('filename', help='Name of binary file')
+
+	parser_erase_sec_flash = subparsers.add_parser(
+			'es',
+			help='Erase Region (sectors) of Flash')
+	parser_erase_sec_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_erase_sec_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+
+	parser_erase_all_flash = subparsers.add_parser(
+			'ea',
+			help='Erase All Flash')
+
+	args = parser.parse_args()
+	print('================================================')
+	print('%s version %s' % (__progname__, __version__))
+	print('------------------------------------------------')
+	print ('Open %s, %d baud...' % (args.port, args.baud))
+	try:
+		serialPort = serial.Serial(args.port, args.baud, \
+								   serial.EIGHTBITS,\
+								   serial.PARITY_NONE, \
+								   serial.STOPBITS_ONE)
+		serialPort.setRTS(False)
+		serialPort.setDTR(False)
+		# time.sleep(0.01)
+		serialPort.flushInput()
+		serialPort.flushOutput()
+		serialPort.reset_input_buffer()
+		serialPort.reset_output_buffer()
+	except:
+		print ('Error: Open %s, %d baud!' % (args.port, args.baud))
+		sys.exit(1)
+	warn = 0
+	serialPort.timeout = 33*12/args.baud + 0.001
+	#--------------------------------
+	# Test Floader Already: Send BAD CMD
+	# 1F 34 56 78 79 BC -> 9F 34 56 78 50 7C ?
+	byteSent = serialPort.write(crc_blk(b'\x1f\x34\x56\x78'))
+	read = serialPort.read(33)
+	if read != crc_blk(b'\x9f\x34\x56\x78'):
+		#--------------------------------
+		# Open Floader
+		try:
+			stream = open(args.fldr, 'rb')
+			size = os.path.getsize(args.fldr)
+		except:
+			serialPort.close
+			print('Error: Not open input file <%s>!' % args.fldr)
+			sys.exit(2)
+		if size < 8:
+			stream.close
+			serialPort.close
+			print('Error: File size = %d!'% size)
+			sys.exit(3)
+		#--------------------------------
+   	    # Stop CPU|: [0x0602]=5
+		serialPort.write(sws_code_end())
+		blk = sws_wr_addr(0x0602, b'\x05')
+		serialPort.write(blk)
+		if args.tact != 0:
+			#--------------------------------
+			# issue reset-to-bootloader:
+			# RTS = either RESET (active low = chip in reset)
+			# DTR = active low
+			print('Reset module (RTS low)...')
+			serialPort.setDTR(True)
+			serialPort.setRTS(True)
+			time.sleep(0.05)
+			print('Activate (%d ms)...' % args.tact)
+			tact = args.tact/1000.0
+			for _ in range(5):
+				byteSent +=	serialPort.write(blk)
+			serialPort.setRTS(False)
+			for _ in range(5):
+				byteSent +=	serialPort.write(blk)
+			serialPort.setDTR(False)
+			byteSent = serialPort.write(blk)
+			t1 = time.time()
+			while time.time()-t1 < tact:
+				for _ in range(5):
+					serialPort.write(blk)
+		time.sleep(0.001)
+		serialPort.flushOutput()
+		serialPort.flushInput()
+		serialPort.reset_input_buffer()
+		#--------------------------------
+		# Set SWS speed low: [0x00b2]=50
+		byteSent = serialPort.write(sws_code_end())
+		x = int(32000000/args.baud)
+		if x > 127:
+			x = 127
+		byteSent += serialPort.write(sws_wr_addr(0x00b2, bytearray([x])))
+		#--------------------------------
+		# Test read bytes [0x00b2]
+		byteSent += serialPort.write(sws_rd_addr(0x00b2))
+		byteRead = len(serialPort.read(byteSent+33))
+		# print(byteRead, byteSent)
+		if byteRead != byteSent:
+			byteSent = 0
+			warn += 1
+			print('Warning: Wrong RX-TX connection?')
+		# Start read
+		serialPort.write(b'\xff')
+		read = serialPort.read(33)
+		byteRead = len(read)
+		if byteRead == 1 and read[0] == b'\xff':
+			print('Warning: Pin RX no connection to the module?')		
+			warn += 1
+		else:
+			print('Connection...')		
+		# stop read
+		byteSent = serialPort.write(sws_code_end())
+		serialPort.read(33)
+		#--------------------------------
+		# Load floader.bin
+		binWrite = 0
+		rdsize = 0x100
+		addr = 0x40000
+		print('Load <%s> to 0x%04x...' % (args.fldr, addr))		
+		while size > 0:
+			print('\r0x%04x' % addr, end = '')		
+			data = stream.read(rdsize)
+			if not data: # end of stream
+				print('send: at EOF')
+				break
+			byteSent += serialPort.write(sws_wr_addr(addr, data))
+			serialPort.reset_input_buffer()
+			binWrite += len(data)
+			addr += len(data)
+			size -= len(data)
+		stream.close
+		print('\rBin bytes writen:', binWrite)		
+		print('CPU go Start...')
+		byteSent += serialPort.write(sws_wr_addr(0x0602, b'\x88')) # cpu go Start
+		time.sleep(0.07)
+		serialPort.flushInput()
+		serialPort.flushOutput()
+		serialPort.reset_input_buffer()
+		serialPort.reset_output_buffer()
+		time.sleep(0.07)
+	# print('COM bytes sent:', byteSent)
+	print('------------------------------------------------')
+	# print('Get version floader...')
+	byteSent = serialPort.write(crc_blk(b'\x00\x00\x00\x00'))
+	read = serialPort.read(10)
+	if len(read)==6 and  read[0]==0  and crc_chk(read):
+		cid = read[2] | (read[3]<<8)
+		ver = read[1]
+		if cid == 0 and ver == 0:
+			print('Error: Check connection to the module!')
+			serialPort.close
+			sys.exit(10)
+		if cid == 0x5562:
+			chip = 'TLSR8253'
+		else:	
+			chip = '?'
+		print('ChipID: 0x%04x (%s), Floader ver: %x.%x' % (cid, chip, (ver>>4)&0x0f, ver&0x0f))
+	else:
+		print('Error get version floader!')
+		serialPort.close
+		sys.exit(4)
+	# print('Get Flash Info...')
+	byteSent = serialPort.write(crc_blk(b'\x05\x00\x00\x00'))
+	read = serialPort.read(10)
+	if len(read)==6 and  read[0]==5 and crc_chk(read):
+		jedecid = (read[1]<<16) | (read[2]<<8) | read[3]
+		if jedecid == 0xffffff:
+			print('Power Off in the module, Reset and Restart!')
+			serialPort.close
+			sys.exit(5)
+		elif jedecid == 0:					
+			print('Error: Check connection to the module!')
+			serialPort.close
+			sys.exit(10)
+		else:			
+			print('Flash JEDEC ID: %06x, Size: %d kbytes' % (jedecid, ((1<<read[3])>>10)))
+	else:
+		print('Error get version floader!')
+		serialPort.close
+		sys.exit(6)
+	print('------------------------------------------------')
+	if args.operation == 'rf':
+		serialPort.timeout = 1024*12/args.baud + 0.004
+		print('Read Flash from 0x%06x to 0x%06x...' % (args.address, args.address+args.size))
+		print('Outfile: %s' % args.filename)
+		try:
+			stream = open(args.filename, 'wb')
+		except:
+			print('Error: Not open Outfile file <%s>!' % args.filename)
+			sys.exit(2)
+		if not ReadBlockFlash(serialPort, stream, args.address, args.size):
+			stream.close
+			serialPort.close
+			sys.exit(5)
+		stream.close
+	elif args.operation == 'wf' or args.operation == 'we':
+		serialPort.timeout = 0.15
+		print('Inputfile: %s' % (args.filename))
+		try:
+			stream = open(args.filename, 'rb')
+			size = os.path.getsize(args.filename)
+		except:
+			serialPort.close
+			print('Error: Not open input file <%s>!' % args.fldr)
+			sys.exit(2)
+		if size < 1:
+			stream.close
+			serialPort.close
+			print('Error: File size = %d!'% size)
+			sys.exit(3)
+		offset = args.address & 0x00ffffff
+		print('Write Flash data 0x%08x to 0x%08x...' % (offset, offset + size))
+		if not WriteBlockFlash(serialPort, stream, offset, size, bool(args.operation == 'we')):
+			stream.close
+			serialPort.close
+			sys.exit(9)
+		stream.close
+	elif args.operation == 'es':
+		serialPort.timeout = 0.15
+		count = int((args.size + FLASH_SECTOR_SIZE - 1) / FLASH_SECTOR_SIZE)
+		size = (count * FLASH_SECTOR_SIZE)
+		offset = args.address & (0xffffff^(FLASH_SECTOR_SIZE-1))
+		print('Erase Flash %d sectors,\r\ndata from 0x%06x to 0x%06x ...' % (count, offset, offset + size))
+		if not EraseSectorsFlash(serialPort,offset,count):
+			serialPort.close
+			sys.exit(6)
+	elif args.operation == 'ea':
+		serialPort.timeout = 2.5
+		print('Erase All Flash ...')
+		if not EraseAllFlash(serialPort):
+			serialPort.close
+			sys.exit(7)
+	serialPort.close
+	print('------------------------------------------------')
+	if warn == 0:
+		print('Done!')
+	else:
+		print('(%d) Warning' % warn)
+	sys.exit(0)
+
+if __name__ == '__main__':
+	main()
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrPgm.py b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrPgm.py
new file mode 100644
index 00000000..c0d2bac2
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/TlsrPgm.py
@@ -0,0 +1,1191 @@
+#!/usr/bin/env python
+
+##### TlsrPgm.py #####
+###  Autor: pvvx   ###
+## https://github.com/pvvx/TLSRPGM ##
+
+import sys
+import signal
+import struct
+import serial
+import platform
+import time
+import argparse
+import os
+import io
+
+__progname__ = 'TLSR82xx TlsrPgm'
+__filename__ = 'TlsrPgm'
+__version__ = '27.04.21'
+
+DEFAULT_UART_BAUD = 230400
+
+FLASH_SECTOR_SIZE = 4096
+
+class FatalError(RuntimeError):
+	def __init__(self, message):
+		RuntimeError.__init__(self, message)
+
+	@staticmethod
+	def WithResult(message, result):
+		message += " (result was %s)" % hexify(result)
+		return FatalError(message)
+
+def signal_handler(signal, frame):
+	print()
+	print('Keyboard Break!')
+	sys.exit(1)
+
+crctable = (
+0x0000, 0xC0C1, 0xC181, 0x0140, 0xC301, 0x03C0, 0x0280, 0xC241,
+0xC601, 0x06C0, 0x0780, 0xC741, 0x0500, 0xC5C1, 0xC481, 0x0440,
+0xCC01, 0x0CC0, 0x0D80, 0xCD41, 0x0F00, 0xCFC1, 0xCE81, 0x0E40,
+0x0A00, 0xCAC1, 0xCB81, 0x0B40, 0xC901, 0x09C0, 0x0880, 0xC841,
+0xD801, 0x18C0, 0x1980, 0xD941, 0x1B00, 0xDBC1, 0xDA81, 0x1A40,
+0x1E00, 0xDEC1, 0xDF81, 0x1F40, 0xDD01, 0x1DC0, 0x1C80, 0xDC41,
+0x1400, 0xD4C1, 0xD581, 0x1540, 0xD701, 0x17C0, 0x1680, 0xD641,
+0xD201, 0x12C0, 0x1380, 0xD341, 0x1100, 0xD1C1, 0xD081, 0x1040,
+0xF001, 0x30C0, 0x3180, 0xF141, 0x3300, 0xF3C1, 0xF281, 0x3240,
+0x3600, 0xF6C1, 0xF781, 0x3740, 0xF501, 0x35C0, 0x3480, 0xF441,
+0x3C00, 0xFCC1, 0xFD81, 0x3D40, 0xFF01, 0x3FC0, 0x3E80, 0xFE41,
+0xFA01, 0x3AC0, 0x3B80, 0xFB41, 0x3900, 0xF9C1, 0xF881, 0x3840,
+0x2800, 0xE8C1, 0xE981, 0x2940, 0xEB01, 0x2BC0, 0x2A80, 0xEA41,
+0xEE01, 0x2EC0, 0x2F80, 0xEF41, 0x2D00, 0xEDC1, 0xEC81, 0x2C40,
+0xE401, 0x24C0, 0x2580, 0xE541, 0x2700, 0xE7C1, 0xE681, 0x2640,
+0x2200, 0xE2C1, 0xE381, 0x2340, 0xE101, 0x21C0, 0x2080, 0xE041,
+0xA001, 0x60C0, 0x6180, 0xA141, 0x6300, 0xA3C1, 0xA281, 0x6240,
+0x6600, 0xA6C1, 0xA781, 0x6740, 0xA501, 0x65C0, 0x6480, 0xA441,
+0x6C00, 0xACC1, 0xAD81, 0x6D40, 0xAF01, 0x6FC0, 0x6E80, 0xAE41,
+0xAA01, 0x6AC0, 0x6B80, 0xAB41, 0x6900, 0xA9C1, 0xA881, 0x6840,
+0x7800, 0xB8C1, 0xB981, 0x7940, 0xBB01, 0x7BC0, 0x7A80, 0xBA41,
+0xBE01, 0x7EC0, 0x7F80, 0xBF41, 0x7D00, 0xBDC1, 0xBC81, 0x7C40,
+0xB401, 0x74C0, 0x7580, 0xB541, 0x7700, 0xB7C1, 0xB681, 0x7640,
+0x7200, 0xB2C1, 0xB381, 0x7340, 0xB101, 0x71C0, 0x7080, 0xB041,
+0x5000, 0x90C1, 0x9181, 0x5140, 0x9301, 0x53C0, 0x5280, 0x9241,
+0x9601, 0x56C0, 0x5780, 0x9741, 0x5500, 0x95C1, 0x9481, 0x5440,
+0x9C01, 0x5CC0, 0x5D80, 0x9D41, 0x5F00, 0x9FC1, 0x9E81, 0x5E40,
+0x5A00, 0x9AC1, 0x9B81, 0x5B40, 0x9901, 0x59C0, 0x5880, 0x9841,
+0x8801, 0x48C0, 0x4980, 0x8941, 0x4B00, 0x8BC1, 0x8A81, 0x4A40,
+0x4E00, 0x8EC1, 0x8F81, 0x4F40, 0x8D01, 0x4DC0, 0x4C80, 0x8C41,
+0x4400, 0x84C1, 0x8581, 0x4540, 0x8701, 0x47C0, 0x4680, 0x8641,
+0x8201, 0x42C0, 0x4380, 0x8341, 0x4100, 0x81C1, 0x8081, 0x4040 )
+def crc16(data: bytearray, length):
+	crc = 0xFFFF
+	for i in range(0, length):
+		crc = (crc >> 8) ^ crctable[(crc ^ data[i]) & 0xFF]
+	return bytearray([crc&0xFF,(crc>>8)&0xFF])
+def crc_blk(data: bytearray):
+	return data+crc16(data, len(data))
+def crc_chk(data: bytearray):
+	c = data[len(data)-2:];
+	if c == crc16(data, len(data)-2):
+		return 1
+	return 0
+def arg_auto_int(x):
+	return int(x, 0)
+def hex_dump(addr, blk):
+	print('%06x: ' % addr, end='')
+	for i in range(len(blk)):
+		if (i+1) % 16 == 0:
+			print('%02x ' % blk[i])
+			if i < len(blk) - 1:
+				print('%06x: ' % (addr + i + 1), end='')
+		else:
+			print('%02x ' % blk[i], end='')
+	if len(blk) % 16 != 0:
+		print('')
+def hex2str(blk):
+	s = ''
+	for i in range(len(blk)):
+		s += '%02x' % (blk[i])
+		if i < len(blk)-1:
+			s += ' '
+	return s
+def bcd2str(blk):
+	s = ''
+	for i in range(len(blk)):
+		s += '%d.%d' % ((blk[i]>>8)&0x0f, blk[i]&0x0f)
+		if i < len(blk)-1:
+			s += '.'
+	return s
+
+class TLSRPGM:
+	MAX_BUF_READ_SIZE = 1024
+	MAX_RESPONSE_SIZE = 1026
+	MIN_RESPONSE_SIZE = 6
+
+	FLASH_SECTOR_SIZE = FLASH_SECTOR_SIZE
+
+	CMD_FUNCS = 0
+	CMD_FLASH_READ = 1
+	CMD_FLASH_WRITE = 2
+	CMD_FLASH_SECT_ERASE = 3
+	CMD_FLASH_ALL_ERASE = 4
+	CMD_FLASH_GET_JEDEC_ID = 5
+	CMD_FLASH_GET_STATUS = 6
+	CMD_SWIRE_READ = 7
+	CMD_SWIRE_WRITE = 8
+	CMD_SWIRE_AREAD = 9
+	CMD_SWIRE_AWRITE = 10
+	CMD_SWIRE_FIFO_READ = 11
+	CMD_SWIRE_FIFO_FWRITE = 12
+	CMD_FLASH_WRRD = 13
+
+	CMDF_GET_VERSION = 0
+	CMDF_MCU_REBOOT = 1
+	CMDF_SWIRE_CFG = 2
+	CMDF_EXT_POWER = 3
+	CMDF_SWIRE_ACTIVATE = 4
+	CMDF_UART_BAUD = 5
+
+	ERR_NONE = 0
+	ERR_FUNC = 1
+	ERR_LEN  = 2
+	ERR_READ = 3
+	ERR_BUSY = 4
+	ERR_CRC  = 5
+	ERR_BAUD = 6
+	ERR_MAX  = 7
+
+	ERR_RETRY_COUNT = 3
+
+	port = None
+	err = 0
+	wcnt = 0
+
+	tab_err = [ \
+		"Errors None", \
+		"Function number error!", \
+		"Data length error!", \
+		"SWire read timeout!", \
+		"Timeout flag while reading analog register!" \
+		"Error CRC!"
+		"Invalid baud rate number!", \
+	]
+
+	tab_uart_baud = [ \
+		115200, \
+		230400, \
+		460800, \
+		500000, \
+		921600, \
+		1000000, \
+		1500000, \
+		2000000, \
+		3000000, \
+	]
+
+	pgm_version = 0
+	pgm_cid = 0
+	pgm_pwr = 1
+
+	pgm_swsps = 0.96
+	pgm_clk = 24
+	pgm_swdiv = 5
+	pgm_swaddrlen = 3
+	pgm_swbuf = [b'\x5a\x00\x06\x02\x00\x05']
+	
+	pgm_chip = '?'
+	#-----------------------------------------------
+	# Functions for an PGM device
+	#-----------------------------------------------
+	def __init__(self, port, baud = DEFAULT_UART_BAUD):
+		self.reopen(baud, port)
+	# Open/ReOpen com-port
+	def reopen(self, baud, port = None):
+		if port == None:
+			if self.port == None:
+				print ('ReOpen ?')
+				return False
+			else:
+				self._port.close();
+				port = self.port
+			print ('ReOpen %s, %d bit/s...' % (port, baud), end = ' ')
+		else:
+			print ('Open %s, %d bit/s...' % (port, baud), end = ' ')
+		try:
+			self._port = serial.Serial(port, baud, \
+									   serial.EIGHTBITS,\
+									   serial.PARITY_NONE, \
+									   serial.STOPBITS_ONE)
+			self._port.setRTS(False)
+			self._port.setDTR(False)
+			time.sleep(0.05)
+			self._port.flushOutput()
+			self._port.flushInput()
+			self._port.reset_output_buffer()
+			self._port.reset_input_buffer()
+			self._port.timeout = 0.1
+		except:
+			print('Error!')
+			return False
+		print('ok')
+		self.port = port
+		return True
+	# Send to usb-com-port
+	def write(self, wblk):
+		self._port.reset_input_buffer()
+		return self._port.write(wblk)
+	# Read usb-com-port
+	def read(self, rdlen):
+		try:
+			rblk = self._port.read(rdlen)
+			#if len(rblk) < rdlen:
+			#	rblk += self._port.read(rdlen - len(rblk))
+		except:
+			print('\rError read %s!' % (self.port))
+			return None
+		return rblk
+	def command(self, wblk, rdlen = None):
+		w = self.write(crc_blk(wblk))
+		if w != len(wblk)+2:
+			self.err = 100
+			return None
+		if rdlen == None:
+			rdlen = self.MAX_RESPONSE_SIZE
+			chklen = self.MIN_RESPONSE_SIZE
+		else:
+			chklen = rdlen
+		self.wcnt = 0
+		rblk = self.read(rdlen)
+		if rblk == None or len(rblk) < chklen:
+			self.err =  self.ERR_LEN +100
+			return None;
+		if not crc_chk(rblk):
+			self.err =  self.ERR_CRC +100
+			return None;
+		if rblk[0] != wblk[0]:
+			self.err =  self.ERR_FUNC +100
+			return None;
+		self.err = rblk[1];
+		self.wcnt = rblk[2] | (rblk[3]<<8)
+		if self.err != self.ERR_NONE:
+			return None;
+		return rblk
+	# Set Default UART speed on PGM board
+	def close(self):
+		self.command(struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_UART_BAUD, 1), 6)
+		self._port.close()
+	# Set UART speed on PGM board
+	def SetUartBaud(self, baud = DEFAULT_UART_BAUD):
+		for i in range(len(self.tab_uart_baud)):
+			if self.tab_uart_baud[i] == baud:
+				print('Set Speed UART PGM board %d bits/s...' % (baud), end = ' ')
+				data = self.command(struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_UART_BAUD, i), 6)
+				if data == None:
+					print('Error(%d)', self.err)
+					return False
+				print('ok')
+				if self._port.baudrate != baud:
+					if not self.reopen(baud):
+						print('Plese reset PGM board!')
+						return False
+				return True
+		print('Invalid PGM baud rate (%d)!' % (baud))
+		return False
+	# Reset/Power pin On/Off
+	def SetPinRST(self, out = 1):
+		data = self.command(struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_EXT_POWER, out), 7)
+		if data == None:
+			print('\rError[%d] Set pin RST/Power!' % self.err)
+			return False
+		return True
+	# Get version pgm board
+	def GetVersion(self):
+		data = self.command(struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_GET_VERSION, 0), 19)
+		if data == None:
+			print('\rError[%d] Read PGM Version and Config!' % self.err)
+			return False
+		self.pgm_version = [data[5], data[4]]
+		(self.pgm_cid, self.pgm_pwr, self.pgm_swdiv, self.pgm_swaddrlen) = struct.unpack('<HBBB', data[6:11])
+		self.pgm_swbuf = data[11:17]
+		if self.pgm_cid == 0 and self.pgm_ver == 0:
+			print('Connection to the PGM board?')
+			return False
+		if self.pgm_cid == 0x5562:
+			self.pgm_chip = 'TLSR825x'
+			self.pgm_clk = 24
+		elif self.pgm_cid == 0x5325:
+			self.pgm_chip = 'TLSR8266'
+			self.pgm_clk = 32
+		elif self.pgm_cid == 0x5326:
+			self.pgm_chip = 'TLSR8267'
+			self.pgm_clk = 32
+		elif self.pgm_cid == 0x5327:
+			self.pgm_chip = 'TLSR8269'
+			self.pgm_clk = 32
+		else:
+			self.pgm_clk = 32
+			self.pgm_chip = '?'
+		print('PGM: ChipID: 0x%04x (%s), ver:' % (self.pgm_cid, self.pgm_chip), bcd2str(self.pgm_version))
+		self.pgm_swsps = self.pgm_clk/5/self.pgm_swdiv
+		print('swdiv %d, addrlen %d, swbuf [%s], ' % (self.pgm_swdiv, self.pgm_swaddrlen, hex2str(self.pgm_swbuf)), end = '')
+		if self.pgm_pwr != 0:
+			print('pwr On')
+		else:
+			print('pfr Off')
+		print('SWire bit rate: %.4f Mbits/s' % self.pgm_swsps)
+		return True
+	# Set Speed SWM pgm board
+	def SetPgmConfig(self, swdiv = None, swaddrlen = None, swbuf = None):
+		if swdiv == None:
+			swdiv = self.pgm_swdiv;
+		if swaddrlen == None:
+			swaddrlen = self.pgm_swaddrlen;
+		if swbuf == None:
+			swbuf = self.pgm_swbuf;
+		data = self.command(struct.pack('<BBHBB', self.CMD_FUNCS, self.CMDF_SWIRE_CFG, 0, swdiv, swaddrlen) + swbuf, 14)
+		if data == None:
+			print('Error[%d] Set PGM Config!' % self.err)
+			return False
+		(self.pgm_swdiv, self.pgm_swaddrlen) = struct.unpack('<BB', data[4:6])
+		self.pgm_swbuf = data[6:12]
+		print('PGM: swdiv %d, addrlen %d, swbuf [%s]' % (self.pgm_swdiv, self.pgm_swaddrlen, hex2str(self.pgm_swbuf)))
+		return True
+	# Reset/Power pin On, Activate, get PC
+	def Activate(self, tms):
+		count = 0
+		if tms > 0:
+			count = int(tms/((self.pgm_swaddrlen + 5.7)*5*self.pgm_swdiv/2400))
+			if count > 0xffff:
+				count = 0xffff
+		t = self._port.timeout
+		self._port.timeout = tms/1000 + 0.5
+		#print('Count = %d, timeout = %.6f' % (count, self._port.timeout))
+		print('Activate %d ms... ' % tms, end = '')
+		# simple version of the function:
+		''' 
+		data = self.command(struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_SWIRE_ACTIVATE, count), 10)
+		self._port.timeout = t
+		if data == None:
+			print('Activate Error[%d]!' % self.err)
+			return False
+		print('ok')
+		self.ext_pc = struct.unpack('<I', data[4:8])
+		print('CPU PC=0x%08x' % self.ext_pc)
+		return True
+		'''
+		# multiple choice function
+		wblk = struct.pack('<BBH', self.CMD_FUNCS, self.CMDF_SWIRE_ACTIVATE, count)
+		self.write(crc_blk(wblk))
+		rblk = self.read(6)
+		self._port.timeout = t
+		if rblk == None or len(rblk) < 6:
+			self.err =  self.ERR_LEN +100
+			print('\r\nTimeout response - Check PGM connected!') 
+			return False
+		if len(rblk) != 6 or rblk[0] != wblk[0]:
+			self.err =  self.ERR_FUNC +100
+			print('\r\nIncorrect response - Check PGM connected!') 
+			return False
+		self.err = rblk[1];
+		self.wcnt = rblk[2] | (rblk[3]<<8)
+		if self.wcnt > 0 and self.wcnt <= 4:
+			rblk += self.read(self.wcnt)
+		if not crc_chk(rblk):
+			self.err =  self.ERR_CRC +100
+			print('\r\nIncorrect response - BAD CRC!') 
+			return False
+		if self.err != self.ERR_NONE:
+			if self.err >= len(self.tab_err):
+				print('\r\nError[%d]: Unknown error!' % (self.err))
+			else:
+				if self.err == self.ERR_READ:
+					print('Error!')
+					print('Check SWM<->SWS connection or Reset/Activation time!')
+				print('\r\nError[%d]: %s' % (self.err, self.tab_err[self.err]))
+			return False
+		if len(rblk) >= 10:
+			self.ext_pc = struct.unpack('<I', rblk[4:8])
+			print('ok')
+			print('CPU PC=0x%08x' % (self.ext_pc))
+		else:
+			print('\r\nUnknown response!') 
+			return False
+		return True
+	#-----------------------------------------------
+	# Functions for an external device
+	#-----------------------------------------------
+	# Read Flash Status
+	def ReadFlashStatus(self):
+		data = self.command(struct.pack('<BBH', self.CMD_FLASH_GET_STATUS, 0, 0), 7)
+		if data == None or self.wcnt != 1:
+			print('\rError get Flash status! (%d)' % self.err) 
+			return None
+		#print('Flash status 0x%02x' % data[4])
+		return data[4]
+	# Waiting for Flash to be ready
+	def WaitingFlashReady(self, count = 300):
+		while count > 0:
+			data = self.command(struct.pack('<BBH', self.CMD_FLASH_GET_STATUS, 0, 0), 7)
+			if data == None or self.wcnt != 1:
+				print('\rError get Flash status! (%d)' % self.err) 
+				return False
+			if (data[4] & 0x01) == 0:
+				#print('Flash status 0x%02x, cnt %d' % (data[4], count))
+				return True
+			count -= 1
+		print('\rTimeout! Flash status 0x%02x!' % data[4]) 
+		return False
+	# CPcpu Ext. Chip
+	def ReadPCcpu(self):
+		rdsize = 0x4
+		offset = 0x6bc
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError Read SWire data! (%d)' % self.err) 
+			return False
+		self.ext_pc = struct.unpack('<I', data[4:8])
+		rdsize = 0x1
+		offset = 0x602
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError Read SWire data! (%d)' % self.err) 
+			return False
+		print('CPU PC=0x%08x' % self.ext_pc, '([0x0602] = 0x%02x)' % data[4])
+		return True
+	# Dump Ext. Chip regs
+	def DumpChipRegs(self, offset = 0x60, rdsize = 0x20):
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError Read SWire data! (%d)' % self.err) 
+			return False
+		print('-------------------------------------------------------')
+		print('\rREGISTERS:')
+		hex_dump(offset, data[4:rdsize+4])
+		return True
+	# Dump Ext. Chip Flash
+	def DumpChipFlash(self, offset = 0x0, rdsize = 0x20):
+		data = self.command(struct.pack('<BBHH', self.CMD_FLASH_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError Read SWire data! (%d)' % self.err) 
+			return False
+		print('-------------------------------------------------------')
+		print('\rFLASH:')
+		hex_dump(offset, data[4:rdsize+4])
+		return True
+	# Dump Ext. Chip Ana regs
+	def DumpChipARegs(self, offset = 0x0, rdsize = None):
+		if not self.EnableClkALGM():
+			return False
+		if rdsize == None:
+			if self.pgm_swaddrlen == 3:
+				rdsize = 0x100
+			else:
+				rdsize = 0x80
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_AREAD, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError Read SWire data! (%d)' % self.err) 
+			return False
+		print('-------------------------------------------------------')
+		print('\rANALOG REGISTERS:')
+		hex_dump(offset, data[4:rdsize+4])
+		return True
+	# Dump Ext. Chip FlashUID
+	def DumpChipFlashUID(self, offset = 0, rdsize = 0x20):
+		rdsize +=4 # +4 dimmy
+		data = self.command(struct.pack('<BBHHB', self.CMD_FLASH_WRRD, offset & 0xff, (offset>>8) & 0xffff, rdsize, 0x4B), rdsize+6)
+		if data == None or self.wcnt != rdsize + 1:
+			print('\rError Read Flash UID! (%d)' % self.err)
+			return False
+		print('-------------------------------------------------------')
+		print('\rFLASH UID:')
+		hex_dump(offset, data[8:rdsize+4])
+		return True
+	# Read Ext. Chip ID
+	def ReadChipID(self):
+		rdsize = 3
+		offset = 0x7d
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('\rError get Chip ID! (%d)' % self.err) 
+			return False
+		self.ext_cver = data[4]
+		self.ext_cid = data[5] | (data[6]<<8)
+		if self.ext_cid == 0x5562:
+			self.ext_chip = 'TLSR825x'
+		elif self.ext_cid == 0x5325:
+			self.ext_chip = 'TLSR8266'
+		elif self.ext_cid == 0x5326:
+			self.ext_chip = 'TLSR8267'
+		elif self.ext_cid == 0x5327:
+			self.ext_chip = 'TLSR8269'
+		else:
+			self.ext_chip = None
+		if self.ext_chip == None:
+			print('Chip ID: 0x%04X, rev: 0x%02X' % (self.ext_cid, self.ext_cver))
+		else:
+			print('Chip %s ID: 0x%04X, rev: 0x%02X' % (self.ext_chip, self.ext_cid, self.ext_cver))
+		return True
+	# Read Flash JEDEC ID
+	def ReadFlashJEDECID(self):
+		data = self.command(struct.pack('<BBH', self.CMD_FLASH_GET_JEDEC_ID, 0, 0), 6+3)
+		if data == None or self.wcnt != 3:
+			print('\rError get Flash JEDEC ID! (%d)' % self.err) 
+			return False
+		self.jedecid = (data[4]<<16) | (data[5]<<8) | data[6]
+		print('Flash JEDEC ID: 0x%06X, Size: %d kbytes' % (self.jedecid, ((1<<data[6])>>10)))
+		return True
+	# Read Blocks Flash to stream
+	def ReadBlockFlash(self, stream, offset = 0, size = 0x80000):
+		offset &= 0xffffff
+		rdsize = self.MAX_BUF_READ_SIZE
+		while size > 0:
+			if rdsize > size:
+				rdsize = size
+			print('\rRead from 0x%06x...' % offset, end = '')
+			data = self.command(struct.pack('<BBHH', self.CMD_FLASH_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+			if data == None or self.wcnt != rdsize:
+				print('\rError Read Flash data at 0x%06x! ' % offset, end = '')
+				return False
+			stream.write(data[4:rdsize+4]);
+			size -= rdsize
+			offset += rdsize
+		print('\r                               \r',  end = '')
+		return True
+	# Read Blocks Reg/Sram to stream
+	def ReadBlockRegs(self, stream, offset = 0x40000, size = 0x10000):
+		offset &= 0xffffff
+		rdsize = self.MAX_BUF_READ_SIZE
+		while size > 0:
+			if rdsize > size:
+				rdsize = size
+			print('\rRead from 0x%06x...' % offset, end = '')
+			data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+			if data == None or self.wcnt != rdsize:
+				print('\rError Read SWire data at 0x%06x! ' % offset, end = '')
+				return False
+			stream.write(data[4:rdsize+4]);
+			size -= rdsize
+			offset += rdsize
+		print('\r                               \r',  end = '')
+		return True
+	# Write Reg/Sram Data 
+	def WriteRegsData(self, offset = 0x602, wdata = b'\x05'):
+		offset &= 0xffffff
+		wrsize = len(wdata)
+		data = self.command(struct.pack('<BBH', self.CMD_SWIRE_WRITE, offset & 0xff, (offset>>8) & 0xffff) + wdata, 6)
+		if data == None or self.wcnt != wrsize:
+			print('\rError Write SWire data at 0x%06x! ' % offset, end = '')
+			return False
+		return True
+	# Write Blocks Reg/Sram from stream
+	def WriteBlockRegs(self, stream, offset = 0, size = 0):
+		wrsize = self.MAX_BUF_READ_SIZE
+		cnt_err = self.ERR_RETRY_COUNT
+		while size > 0:
+			offset &= 0xffffff
+			data = stream.read(wrsize)
+			wrsize = len(data)
+			if not data or wrsize == 0: # end of stream
+				print(' Error Read file!')
+				return False
+			while 1:
+				print('\rWrite to 0x%06x...' % offset, end = '')
+				rdata = self.command(struct.pack('<BBH', self.CMD_SWIRE_WRITE, offset & 0xff, (offset>>8) & 0xffff)+data, 6)
+				if rdata == None or self.wcnt != wrsize:
+					cnt_err -= 1
+					if cnt_err == 0:
+						print('\rError Write Swire data at 0x%06x!' % offset)
+						return False
+					print(' Error', cnt_err)
+				else:
+					cnt_err = self.ERR_RETRY_COUNT
+				break
+			offset += wrsize
+			size -= wrsize
+		print('\r                               \r',  end = '')
+		return True
+	# Read Blocks Analog Reg to stream
+	def ReadBlockAnalogRegs(self, stream, offset = 0x000, size = None):
+		if not self.EnableClkALGM():
+			return False
+		if size == None:
+			if self.pgm_swaddrlen == 3:
+				size = 0x100
+			else:
+				size = 0x80
+		offset &= 0xff
+		rdsize = self.MAX_BUF_READ_SIZE
+		cnt_err = self.ERR_RETRY_COUNT
+		while size > 0:
+			if rdsize > size:
+				rdsize = size
+			print('\rRead from 0x%06x...' % offset, end = '')
+			data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_AREAD, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+			if data == None  or self.wcnt != rdsize:
+				print('\rError Read SWire data at 0x%06x! ' % offset, end = '')
+				return False
+			stream.write(data[4:rdsize+4]);
+			size -= rdsize
+			offset += rdsize
+		print('\r                               \r',  end = '')
+		return True
+	# Write Blocks Analog Reg from stream
+	def WriteBlockAnalogRegs(self, stream, offset = 0x000, size = 0x100):
+		if not self.EnableClkALGM():
+			return False
+		wrsize = 0x100
+		cnt_err = self.ERR_RETRY_COUNT
+		while size > 0:
+			offset &= 0x0ff
+			data = stream.read(wrsize)
+			wrsize = len(data)
+			if not data or wrsize == 0: # end of stream
+				print(' Error Read file!')
+				return False
+			while 1:
+				print('\rWrite to 0x%06x...' % offset, end = '')
+				rdata = self.command(struct.pack('<BBH', self.CMD_SWIRE_AWRITE, offset & 0xff, (offset>>8) & 0xffff)+data, 6)
+				if rdata == None or self.wcnt != wrsize:
+					cnt_err -= 1
+					if cnt_err == 0:
+						print('\rError Write aregs data at 0x%06x!' % offset)
+						return False
+					print(' Error', cnt_err)
+				else:
+					cnt_err = self.ERR_RETRY_COUNT
+				break
+			offset += wrsize
+			size -= wrsize
+		print('\r                               \r',  end = '')
+		return True
+	# Read FlashUID
+	def ReadFlashUID(self):
+		offset = 0
+		rdsize = 256+4 # 8+4
+		data = self.command(struct.pack('<BBHHB', self.CMD_FLASH_WRRD, offset & 0xff, (offset>>8) & 0xffff, rdsize, 0x4B), rdsize+6)
+		if data == None: # or self.wcnt+1 != rdsize:
+			print('\rError Read Flash UID! (%d)' % self.err)
+			return False
+		self.FlashUID = data[8:16]
+		print('Flash UID:' , self.FlashUID)
+		hex_dump(0, data[8:264])
+		return True
+	# Erase Sectors Flash
+	def EraseSectorsFlash(self, offset = 0, count = 1):
+		cnt_err = self.ERR_RETRY_COUNT
+		size = count * self.FLASH_SECTOR_SIZE
+		for i in range(count):
+			offset = offset & (0xffffff^(self.FLASH_SECTOR_SIZE-1))
+			print('\rErase sector at 0x%06x...' % offset, end = '')
+			while 1:
+				data = self.command(struct.pack('<BBH', self.CMD_FLASH_SECT_ERASE, offset & 0xff, (offset>>8) & 0xffff), 6)
+				if data == None:
+					if not self.WaitingFlashReady():
+						return False
+					cnt_err -= 1
+					if cnt_err == 0:
+						print('\rError Erase sector at 0x%06x!' % offset)
+						return False
+					print(' Error', cnt_err)
+				else:
+					if not self.WaitingFlashReady():
+						return False
+					cnt_err = self.ERR_RETRY_COUNT
+				break
+			offset += self.FLASH_SECTOR_SIZE
+		print('\r                               \r',  end = '')
+		return True
+	# Erase All Blocks Flash
+	def EraseAllFlash(self):
+		data = self.command(struct.pack('<BBH', self.CMD_FLASH_ALL_ERASE, 0, 0))
+		if data == None:
+			print('\rError Erase All Flash! (%d)' % self.err)
+			return False
+		return self.WaitingFlashReady(1000)
+	# Write Blocks Flash from stream
+	def WriteBlockFlash(self, stream, offset = 0, size = 0, erase = True):
+		wrsize = 0x100
+		cnt_err = self.ERR_RETRY_COUNT
+		if erase and (offset & (self.FLASH_SECTOR_SIZE-1)) != 0:
+			erasec = offset & (0xffffff^(self.FLASH_SECTOR_SIZE-1))
+		else:
+			erasec = 0xffffffff # = flag
+		while size > 0:
+			offset &= 0xffffff
+			if erase:
+				wrsec = offset & (0xffffff^(self.FLASH_SECTOR_SIZE-1))
+				if erasec != wrsec:
+					print('\rErase at 0x%06x...' % offset, end = '')
+					while 1:
+						data = self.command(struct.pack('<BBH', self.CMD_FLASH_SECT_ERASE, offset & 0xff, (offset>>8) & 0xffff), 6)
+						if data == None:
+							if not self.WaitingFlashReady():
+								return False
+							cnt_err -= 1
+							if cnt_err == 0:
+								print('\rError Erase sector at 0x%06x!' % offset)
+								return 0
+							print(' Error', cnt_err)
+						else:
+							if not self.WaitingFlashReady():
+								return False
+							cnt_err = self.ERR_RETRY_COUNT
+						break
+					erasec = wrsec
+			data = stream.read(wrsize)
+			wrsize = len(data)
+			if not data or wrsize == 0: # end of stream
+				print(' Error Read file!')
+				return False
+			for e in data:
+				if e != 0xff:
+					while 1:
+						print('\rWrite to 0x%06x...' % offset, end = '')
+						rdata = self.command(struct.pack('<BBH', self.CMD_FLASH_WRITE, offset & 0xff, (offset>>8) & 0xffff)+data, 6)
+						if rdata == None or self.wcnt != wrsize:
+							if not self.WaitingFlashReady():
+								return False
+							cnt_err -= 1
+							if cnt_err == 0:
+								print('\rError Write Flash data at 0x%06x!' % offset)
+								return False
+							print(' Error', cnt_err)
+						else:
+							if not self.WaitingFlashReady():
+								return False
+							cnt_err = self.ERR_RETRY_COUNT
+						break
+					break
+			offset += wrsize
+			size -= wrsize
+		print('\r                               \r',  end = '')
+		return True
+	# Enable CLK ALGM on 825x
+	def EnableClkALGM(self):
+		rdsize = 4
+		offset = 0x61
+		data = self.command(struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, rdsize), rdsize+6)
+		if data == None or self.wcnt != rdsize:
+			print('Error Read SWire data! (%d)' % self.err) 
+			return False
+		x = bytearray(data[4:8])
+		# TLSR825x - bit 3, TLSR826x - bit 1
+		if self.pgm_swaddrlen == 3:
+			msk_bit = 0x08
+		else:
+			msk_bit = 0x02
+		if (x[0] & msk_bit) != 0 or (x[3] & msk_bit) == 0:
+			x[0] &= ~msk_bit
+			x[3] |= msk_bit # reg 0x64
+			data = self.command(struct.pack('<BBH', self.CMD_SWIRE_WRITE, offset & 0xff, (offset>>8) & 0xffff) + x, 6)
+			if data == None or self.wcnt != rdsize:
+				#print('Error!') 
+				print('Error Write SWire data! (%d)' % self.err) 
+				print('Error Activate ALGM!')
+				return False
+		return True
+	# Test
+	def TestDebugPC(self, count = 1, offset = 0x6bc):
+		if count < 1:
+			count = 1
+		flgsleep = False
+		flgrun = False
+		i = 0
+		wblk = struct.pack('<BBHH', self.CMD_SWIRE_READ, offset & 0xff, (offset>>8) & 0xffff, 4) 
+		t1 = time.time()
+		while i < count:
+			self.write(crc_blk(wblk))
+			rblk = self.read(6)
+			t2 = time.time()
+			if rblk == None or len(rblk) < 6 or rblk[0] != wblk[0]:
+				print('\r\nError Read response!') 
+				return False
+			self.err = rblk[1];
+			self.wcnt = rblk[2] | (rblk[3]<<8)
+			data = None
+			if self.wcnt == 4 and self.err == 0:
+				rblk += self.read(4)
+				if crc_chk(rblk):
+					if flgsleep:
+						t1 = t2
+						print()
+					self.ext_pc = struct.unpack('<I', rblk[4:8])
+					print('\rCPU PC=0x%08x' % self.ext_pc, end = '')
+					if count != 1 or i != 0:
+						print(' (%.3f)' % (t2-t1), end = '')
+					#if flgsleep:
+					#	return True
+					flgsleep = False
+					flgrun = True
+				else:
+					print('\r\nError Read response!') 
+					return False
+			else:
+				if flgrun:
+					print()
+				print('\rCPU sleep? ', end = '')
+				if count != 1 or i != 0:
+					print(' (%.3f sec)' % (t2-t1), end = '')
+				if not flgsleep:
+					t1 = t2
+				flgsleep = True
+				flgrun = False
+			i += 1
+		print()
+		return True
+#============================= 
+# main()
+#============================= 
+def main():
+	# First time slice
+	t1 = time.time()
+	signal.signal(signal.SIGINT, signal_handler)
+	comport_def_name='COM1'
+	if sys.platform == "linux" or sys.platform == "linux2":
+		comport_def_name = '/dev/ttyS0'
+	elif sys.platform == "win32":
+		comport_def_name='COM1'
+	#elif sys.platform == "darwin":
+	#else:
+	#	print(sys.platform)
+	#
+	parser = argparse.ArgumentParser(description='%s version %s' % (__progname__, __version__), prog=__filename__)
+	parser.add_argument(
+		'-p', '--port', 
+		help='Serial port device (default: %s)' % comport_def_name,
+		default=comport_def_name)
+	parser.add_argument(
+		'-b', '--baud',
+		help='UART Baud Rate (default: %d)' % DEFAULT_UART_BAUD,
+		type=arg_auto_int,
+		default=DEFAULT_UART_BAUD)
+	parser.add_argument(
+		'-t', '--trst',
+		help='Hard Reset Time ms (default: 0 ms)',
+		type=arg_auto_int,
+		default = 0)
+	parser.add_argument(
+		'-a', '--act',
+		help='Activation Time ms (0-off, default: 0 ms)',
+		type=arg_auto_int,
+		default = 0)
+	parser.add_argument(
+		'-s', '--stopcpu',
+		help='CPU Stop (before main processing)',
+		action="store_true")
+	parser.add_argument(
+		'-c', '--cpustall',
+		help='CPU Stall (before main processing)',
+		action="store_true")
+	parser.add_argument(
+		'-r', '--run',
+		help='CPU Run (post main processing)',
+		action="store_true")
+	parser.add_argument(
+		'-g', '--go',
+		help='CPU Go (post main processing)',
+		action="store_true")
+	parser.add_argument(
+		'-m', '--mrst',
+		help='Soft Reset (MCU Reboot) (post main processing)',
+		action="store_true")
+	parser.add_argument(
+		'-w', '--wrktime',
+		help='Show Worked Time',
+		action="store_true")
+	parser.add_argument(
+		'-u', '--u2b',
+		help='Use 2 bytes swire address (TLSR826x)',
+		action="store_true")
+	subparsers = parser.add_subparsers(
+			dest='operation',
+			help='Run '+__filename__+' {command} -h for additional help')
+
+	parser_read_flash = subparsers.add_parser(
+			'rf',
+			help='Read Flash to binary file')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash.add_argument('filename', help='Name of binary file')
+
+	parser_burn_flash = subparsers.add_parser(
+			'we',
+			help='Write file to Flash with sectors erases')
+	parser_burn_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_burn_flash.add_argument('filename', help='Name of binary file')
+
+	parser_write_flash = subparsers.add_parser(
+			'wf',
+			help='Write file to Flash without sectors erases')
+	parser_write_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_write_flash.add_argument('filename', help='Name of binary file')
+
+	parser_erase_sec_flash = subparsers.add_parser(
+			'es',
+			help='Erase Region (sectors) of Flash')
+	parser_erase_sec_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_erase_sec_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+
+	parser_erase_all_flash = subparsers.add_parser(
+			'ea',
+			help='Erase All Flash')
+
+	parser_read_flash = subparsers.add_parser(
+			'rs',
+			help='Read SWire address to binary file')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash.add_argument('filename', help='Name of binary file')
+
+	parser_read_flash = subparsers.add_parser(
+			'ra',
+			help='Read Analog Registers to binary file')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash.add_argument('filename', help='Name of binary file')
+
+	parser_read_flash = subparsers.add_parser(
+			'wa',
+			help='Write file to Analog Registers')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('filename', help='Name of binary file')
+
+	parser_read_flash = subparsers.add_parser(
+			'i', help='External Chip Information')
+	parser_read_flash = subparsers.add_parser(
+			'ds',
+			help='Dump Swire (Registers or SRAM)')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash = subparsers.add_parser(
+			'df',
+			help='Dump Flash')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash = subparsers.add_parser(
+			'da',
+			help='Dump Analog Registers')
+	parser_read_flash.add_argument('address', help='Start address', type=arg_auto_int)
+	parser_read_flash.add_argument('size', help='Size of region', type=arg_auto_int)
+	parser_read_flash = subparsers.add_parser(
+			'dc',
+			help='Chow PC')
+	parser_read_flash.add_argument('count', help='cycle count', type=arg_auto_int)
+
+	args = parser.parse_args()
+	print('=======================================================')
+	print('%s version %s' % (__progname__, __version__))
+	print('-------------------------------------------------------')
+	pgm = TLSRPGM(args.port, DEFAULT_UART_BAUD)
+	if pgm.port == None:
+		sys.exit(1)
+	if not pgm.GetVersion():
+		sys.exit(1)
+	if args.u2b:
+		if pgm.pgm_swaddrlen != 2:
+			if not pgm.SetPgmConfig(swdiv = int(round(pgm.pgm_clk/4.8,0)), swaddrlen=2, swbuf = b'\x5a\x00\x06\x02\x00\x05'):
+				pgm.close()
+				sys.exit(1)
+	else:
+		if pgm.pgm_swaddrlen != 3:
+			if not pgm.SetPgmConfig(swdiv = int(round(pgm.pgm_clk/4.8,0)), swaddrlen=3, swbuf = b'\x5a\x00\x06\x02\x00\x05'):
+				pgm.close()
+				sys.exit(1)
+	# set speed up?
+	if args.baud != DEFAULT_UART_BAUD:
+		if not pgm.SetUartBaud(args.baud):
+			sys.exit(1)
+	if args.trst > 0 or args.act != 0 or args.stopcpu or args.cpustall:
+		print('=== PreProcess ========================================')
+	if args.trst > 0: # Hard reset (Pin RST set '0')?	
+		if args.trst < 5: # min 5 ms
+			args.trst = 5
+		print('Hard reset Ext.MCU %d ms...' % (args.trst), end = ' ')
+		if not pgm.SetPinRST(0): # Hard reset (Pin RST set '0')
+			pgm.close()
+			sys.exit(1)
+		time.sleep(args.trst/1000) # Wait trst ms
+		print('ok')
+		if args.act > 0: # activate ?
+			if not pgm.Activate(args.act):
+				pgm.close()
+				sys.exit(1)
+		else: # no activate
+			if not pgm.SetPinRST(1):
+				pgm.close()
+				sys.exit(1)
+			time.sleep(0.07) # wait ext. MCU init
+	else:
+		if args.act > 0:
+			print('Hard reset Ext.MCU 50 ms...', end = ' ')
+			if not pgm.SetPinRST(0):
+				pgm.close()
+				sys.exit(1)
+			time.sleep(0.05)
+			print('ok')
+			if not pgm.Activate(args.act):
+				pgm.close()
+				sys.exit(1)
+	if args.act < 0: # No Hard reset (Pin RST set '0'), MCU Soft Reset + Activate 70 ms
+		print('MCU Reboot...', end = ' ')
+		if not pgm.WriteRegsData(0x6f, b'\x20'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+		if not pgm.Activate(70): # Activate 70 ms
+			pgm.close()
+			sys.exit(1)
+	if args.stopcpu:	# CPU Stop ?
+		print('CPU Stop...', end = ' ')
+		if not pgm.WriteRegsData(0x602, b'\x05'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+	if args.cpustall:	# CPU Stall ?
+		print('CPU Stall...', end = ' ')
+		if not pgm.WriteRegsData(0x602, b'\x06'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+	# Command Read to File
+	print('=== Process ===========================================')
+	if args.operation == 'rs' \
+	or args.operation == 'rf' \
+	or args.operation == 'ra':
+		offset = args.address & 0x00ffffff
+		size = args.size & 0x00ffffff
+		if size == 0:
+			print('\rError: Read size = %d!' % size)
+			pgm.close()
+			sys.exit(1)
+		print('Outfile: %s' % args.filename)
+		try:
+			stream = open(args.filename, 'wb')
+		except:
+			print('Error: Not open Outfile file <%s>!' % args.filename)
+			pgm.close()
+			sys.exit(1)
+		ret = False
+		if args.operation == 'rs':
+			print('Read SWire from 0x%06x to 0x%06x...' % (offset, offset + size))
+			ret = pgm.ReadBlockRegs(stream, offset, size)
+		elif args.operation == 'rf':
+			print('Read Flash from 0x%06x to 0x%06x...' % (offset, offset + size))
+			ret = pgm.ReadBlockFlash(stream, offset, size)
+		elif args.operation == 'ra':
+			if size > 0x100 or offset + size > 0x100:
+				print('Warning: Maximum number of analog registers 256!')
+				if size > 0x100:
+					size = 0x100
+			offset &= 0x00ff
+			print('Read Analog Registers from 0x%06x to 0x%06x...' % (offset, offset + size))
+			ret = pgm.ReadBlockAnalogRegs(stream, offset, size)
+		stream.close
+		if not ret:
+			pgm.close()
+			sys.exit(1)
+	# Command Write from File
+	elif args.operation == 'ws' \
+	  or args.operation == 'wf' \
+	  or args.operation == 'we' \
+	  or args.operation == 'wa':
+		offset = args.address & 0x00ffffff
+		print('Inputfile: %s' % (args.filename))
+		try:
+			stream = open(args.filename, 'rb')
+			size = os.path.getsize(args.filename)
+		except:
+			print('Error: Not open input file <%s>!' % args.fldr)
+			pgm.close()
+			sys.exit(1)
+		ret = False
+		if size < 1:
+			print('Error: File size = %d!'% size)
+		elif args.operation == 'ws':
+			print('Write Swire register 0x%08x to 0x%08x...' % (offset, offset + size))
+			ret = pgm.WriteBlockRegs(stream, offset, size)
+		elif args.operation == 'wf' or args.operation == 'we':
+			print('Write Flash data 0x%08x to 0x%08x...' % (offset, offset + size))
+			ret = pgm.WriteBlockFlash(stream, offset, size, bool(args.operation == 'we'))
+		elif args.operation == 'wa':
+			if size > 0x100 or offset + size > 0x100:
+				print('Warning: Maximum number of analog registers 256!')
+				if size > 0x100:
+					size = 0x100
+			offset &= 0x00ff
+			print('Write Analog register 0x%08x to 0x%08x...' % (offset, offset + size))
+			ret = pgm.WriteBlockAnalogRegs(stream, offset, size)
+		stream.close
+		if not ret:
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'es':
+		count = int((args.size + FLASH_SECTOR_SIZE - 1) / FLASH_SECTOR_SIZE)
+		size = (count * FLASH_SECTOR_SIZE)
+		offset = args.address & (0xffffff^(FLASH_SECTOR_SIZE-1))
+		print('Erase Flash %d sectors,\r\ndata from 0x%06x to 0x%06x ...' % (count, offset, offset + size))
+		if not pgm.EraseSectorsFlash(offset,count):
+			pgm.close()			
+			sys.exit(1)
+	elif args.operation == 'ea':
+		print('Erase All Flash ...')
+		if not pgm.EraseAllFlash():
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'i':
+		if not pgm.ReadChipID() \
+		or not pgm.ReadPCcpu() \
+		or not pgm.ReadFlashJEDECID() \
+		or not pgm.DumpChipFlashUID() \
+		or not pgm.DumpChipFlash() \
+		or not pgm.DumpChipARegs() \
+		or not pgm.DumpChipRegs():
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'ds':
+		if not pgm.DumpChipRegs(args.address, args.size):
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'df':
+		if not pgm.DumpChipFlash(args.address, args.size):
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'da':
+		if not pgm.DumpChipARegs(args.address, args.size):
+			pgm.close()
+			sys.exit(1)
+	elif args.operation == 'dc':
+		#print('CPU Run...', end = ' ')
+		#if not pgm.WriteRegsData(0x602, b'\x88'):
+		#	pgm.close()
+		#	sys.exit(1)
+		#print('ok')
+		if not pgm.TestDebugPC(args.count):
+			pgm.close()
+			sys.exit(1)
+	else:
+		print('No action assigned.')
+	if args.run or args.go or args.mrst:
+		print('=== Post-Process ======================================')
+		if args.operation != 'dc':
+			pgm.TestDebugPC()
+	# Commands / flags post main processing
+	if args.run:
+		print('CPU Run...', end = ' ')
+		if not pgm.WriteRegsData(0x602, b'\x88'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+	if args.go:
+		print('CPU Go...', end = ' ')
+		if not pgm.WriteRegsData(0x602, b'\x08'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+	if args.mrst:
+		print('MCU Reboot...', end = ' ')
+		if not pgm.WriteRegsData(0x6f, b'\x20'):
+			pgm.close()
+			sys.exit(1)
+		print('ok')
+	if args.wrktime:
+		# Second time slice
+		t2 = time.time()
+		print(" Worked Time: %.3f sec" % (t2-t1))
+	pgm.close()
+	sys.exit(0)
+
+if __name__ == '__main__':
+	main()
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.py b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.py
new file mode 100644
index 00000000..f762abcb
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.py
@@ -0,0 +1,25 @@
+#! /usr/bin/env python3
+import binascii
+import sys
+# https://github.com/pvvx/ATC_MiThermometer/issues/186#issuecomment-1030410603
+with open(sys.argv[1], 'rb') as f:
+    firmware = bytearray(f.read(-1))
+
+if firmware[6:8] != b'\x5d\x02':
+    # Ensure FW size is multiple of 16
+    padding = 16 - len(firmware) % 16
+    if padding < 16:
+        firmware += b'\xFF' * padding
+    # Fix FW length
+    firmware[0x18:0x1c] = (len(firmware)+4).to_bytes(4, byteorder='little')
+    # Add magic constant
+    firmware[6:8] = b'\x5d\x02'
+    # Add CRC
+    crc = binascii.crc32(firmware) ^ 0xffffffff
+    firmware += crc.to_bytes(4, byteorder='little')
+    # Write the new firwmare back to the file
+    with open(sys.argv[1], 'wb') as f:
+        f.write(firmware)
+    print(f"Firmware patched!")
+else:
+    print(f"Firmware already patched!")
\ No newline at end of file
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.sh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.sh
new file mode 100644
index 00000000..4e23af6d
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw.sh
@@ -0,0 +1,11 @@
+#!/bin/bash 
+echo "*****************************************************"
+echo "this is post build!! current configure is :$1"
+if [[ $2 = tc32 ]]; then
+	tc32-elf-objcopy -v -O binary $1.elf  $1.bin
+	./tools/tl_check_fw2.exe  $1.bin
+elif [[ $2 = riscv ]]; then
+	riscv32-elf-objcopy -S -O binary $1.elf  output/$1.bin
+	../../../tools/tl_check_fw2.exe  output/$1.bin
+fi
+echo "**************** end of post build ******************"
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw2.exe b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw2.exe
new file mode 100644
index 00000000..6874f5f7
Binary files /dev/null and b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_check_fw2.exe differ
diff --git a/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_link_load.sh b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_link_load.sh
new file mode 100644
index 00000000..09667d28
--- /dev/null
+++ b/ARM_Tag_FW/OpenEPaperLink_TLSR/tools/tl_link_load.sh
@@ -0,0 +1,6 @@
+#!/bin/bash 
+echo "*****************************************************"
+echo "this is post build!! current configure is :$1"
+rm -rf $2
+cp -f $1 $2
+echo "**************** end of post build ******************"